diff --git a/src/api/_api_internal/_api_internal.cc b/src/api/_api_internal/_api_internal.cc
index ae14f1fefeeb..dc0dac811037 100644
--- a/src/api/_api_internal/_api_internal.cc
+++ b/src/api/_api_internal/_api_internal.cc
@@ -35,80 +35,72 @@
 namespace mxnet {
 
 MXNET_REGISTER_GLOBAL("_Integer")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-    using namespace runtime;
-    if (args[0].type_code() == kDLInt) {
-      *ret = Integer(args[0].operator int64_t());
-    } else {
-      LOG(FATAL) << "only accept int";
-    }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      if (args[0].type_code() == kDLInt) {
+        *ret = Integer(args[0].operator int64_t());
+      } else {
+        LOG(FATAL) << "only accept int";
+      }
+    });
 
-MXNET_REGISTER_GLOBAL("_Float")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-    using namespace runtime;
-    if (args[0].type_code() == kDLFloat) {
-      *ret = Float(args[0].operator double());
-    } else {
-      LOG(FATAL) << "only accept float";
-    }
+MXNET_REGISTER_GLOBAL("_Float").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+  using namespace runtime;
+  if (args[0].type_code() == kDLFloat) {
+    *ret = Float(args[0].operator double());
+  } else {
+    LOG(FATAL) << "only accept float";
+  }
 });
 
-MXNET_REGISTER_GLOBAL("_ADT")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-    using namespace runtime;
-    std::vector<ObjectRef> data;
-    for (int i = 0; i < args.size(); ++i) {
-      if (args[i].type_code() == kNDArrayHandle) {
-        mxnet::NDArray *array = args[i].operator mxnet::NDArray*();
-        ObjectRef input = NDArrayHandle(array);
-        data.push_back(input);
-      } else if (args[i].type_code() != kNull) {
-        ObjectRef input = String::CanConvertFrom(args[i]) ? args[i].operator String()
-                                                          : args[i].operator ObjectRef();
-        data.push_back(input);
-      } else {
-        data.emplace_back(nullptr);
-      }
+MXNET_REGISTER_GLOBAL("_ADT").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+  using namespace runtime;
+  std::vector<ObjectRef> data;
+  for (int i = 0; i < args.size(); ++i) {
+    if (args[i].type_code() == kNDArrayHandle) {
+      mxnet::NDArray* array = args[i].operator mxnet::NDArray*();
+      ObjectRef input       = NDArrayHandle(array);
+      data.push_back(input);
+    } else if (args[i].type_code() != kNull) {
+      ObjectRef input = String::CanConvertFrom(args[i]) ? args[i].operator String()
+                                                        : args[i].operator ObjectRef();
+      data.push_back(input);
+    } else {
+      data.emplace_back(nullptr);
     }
-    *ret = ADT(0, data.begin(), data.end());
+  }
+  *ret = ADT(0, data.begin(), data.end());
 });
 
-MXNET_REGISTER_GLOBAL("_Map")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-    using namespace runtime;
-    CHECK_EQ(args.size() % 2, 0);
-    std::unordered_map<ObjectRef, ObjectRef, ObjectHash, ObjectEqual> data;
-    for (int i = 0; i < args.num_args; i += 2) {
-      ObjectRef k =
-          String::CanConvertFrom(args[i]) ? args[i].operator String()
-                                          : args[i].operator ObjectRef();
-      ObjectRef v;
-      if (args[i + 1].type_code() == kNDArrayHandle) {
-        mxnet::NDArray *array = args[i + 1].operator mxnet::NDArray*();
-        v = NDArrayHandle(array);
-      } else {
-        v = args[i + 1];
-      }
-      data.emplace(std::move(k), std::move(v));
+MXNET_REGISTER_GLOBAL("_Map").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+  using namespace runtime;
+  CHECK_EQ(args.size() % 2, 0);
+  std::unordered_map<ObjectRef, ObjectRef, ObjectHash, ObjectEqual> data;
+  for (int i = 0; i < args.num_args; i += 2) {
+    ObjectRef k =
+        String::CanConvertFrom(args[i]) ? args[i].operator String() : args[i].operator ObjectRef();
+    ObjectRef v;
+    if (args[i + 1].type_code() == kNDArrayHandle) {
+      mxnet::NDArray* array = args[i + 1].operator mxnet::NDArray*();
+      v                     = NDArrayHandle(array);
+    } else {
+      v = args[i + 1];
     }
-    *ret = Map<ObjectRef, ObjectRef>(data);
+    data.emplace(std::move(k), std::move(v));
+  }
+  *ret = Map<ObjectRef, ObjectRef>(data);
 });
 
-MXNET_REGISTER_GLOBAL("_String")
-.set_body([] (runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_GLOBAL("_String").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   std::string str = args[0].operator std::string();
-  *ret = String(std::move(str));
+  *ret            = String(std::move(str));
 });
 
-MXNET_REGISTER_GLOBAL("_echo")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_GLOBAL("_echo").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   *ret = args[0];
 });
 
-MXNET_REGISTER_API("_nop")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-});
+MXNET_REGISTER_API("_nop").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {});
 
 }  // namespace mxnet
diff --git a/src/api/cached_op_api.cc b/src/api/cached_op_api.cc
index 1c325d229da3..79494ea80bcf 100644
--- a/src/api/cached_op_api.cc
+++ b/src/api/cached_op_api.cc
@@ -30,119 +30,118 @@
 namespace mxnet {
 
 MXNET_REGISTER_GLOBAL("cached_op.invoke")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  CachedOpPtr op_shared = *static_cast<CachedOpPtr*>(args[0].value().v_handle);
-  // CachedOp* points to CachedOpThreadSafe object if CreateCachedOpEX
-  // was called with thread_safe=true
-  CachedOp* op = dynamic_cast<CachedOp*>(op_shared.get());
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      CachedOpPtr op_shared = *static_cast<CachedOpPtr*>(args[0].value().v_handle);
+      // CachedOp* points to CachedOpThreadSafe object if CreateCachedOpEX
+      // was called with thread_safe=true
+      CachedOp* op = dynamic_cast<CachedOp*>(op_shared.get());
 
-  int num_inputs = args[1];
-  int args_size = args.size();
-  std::vector<NDArray*> ndinputs;
-  ndinputs.reserve(num_inputs);
-  for (int i = 2; i < num_inputs + 2; ++i) {
-    ndinputs.push_back(static_cast<mxnet::NDArray*>(args[i]));
-  }
+      int num_inputs = args[1];
+      int args_size  = args.size();
+      std::vector<NDArray*> ndinputs;
+      ndinputs.reserve(num_inputs);
+      for (int i = 2; i < num_inputs + 2; ++i) {
+        ndinputs.push_back(static_cast<mxnet::NDArray*>(args[i]));
+      }
 
-  std::vector<NDArray*> ndoutputs;
-  ndoutputs.reserve(op->num_outputs());
-  if (args[num_inputs + 4].type_code() == kNull) {
-    for (int i = 0; i < op->num_outputs(); ++i) ndoutputs.push_back(new NDArray());
-  } else {
-    int array_size = args_size - num_inputs - 4;
-    CHECK_EQ(array_size, op->num_outputs())
-        << "CachedOp expects " << op->num_outputs() << " outputs, but "
-        << array_size << " was given.";
-    for (int i = num_inputs + 4; i < array_size; ++i) {
-      ndoutputs.push_back(args[i].operator mxnet::NDArray*());
-    }
-  }
+      std::vector<NDArray*> ndoutputs;
+      ndoutputs.reserve(op->num_outputs());
+      if (args[num_inputs + 4].type_code() == kNull) {
+        for (int i = 0; i < op->num_outputs(); ++i)
+          ndoutputs.push_back(new NDArray());
+      } else {
+        int array_size = args_size - num_inputs - 4;
+        CHECK_EQ(array_size, op->num_outputs()) << "CachedOp expects " << op->num_outputs()
+                                                << " outputs, but " << array_size << " was given.";
+        for (int i = num_inputs + 4; i < array_size; ++i) {
+          ndoutputs.push_back(args[i].operator mxnet::NDArray*());
+        }
+      }
 
-  int default_dev_type;
-  int default_dev_id;
-  if (args[num_inputs + 2].type_code() != kNull) {
-    default_dev_type = args[num_inputs + 2];
-    default_dev_id = args[num_inputs + 3];
-  } else {
-    const Context &ctx = ndinputs[0]->ctx();
-    default_dev_type = ctx.dev_type;
-    default_dev_id = ctx.dev_id;
-  }
+      int default_dev_type;
+      int default_dev_id;
+      if (args[num_inputs + 2].type_code() != kNull) {
+        default_dev_type = args[num_inputs + 2];
+        default_dev_id   = args[num_inputs + 3];
+      } else {
+        const Context& ctx = ndinputs[0]->ctx();
+        default_dev_type   = ctx.dev_type;
+        default_dev_id     = ctx.dev_id;
+      }
 
-  // construct default context
-  Context ctx = Context::Create(static_cast<Context::DeviceType>(default_dev_type),
-                                default_dev_id);
-  op->Forward(op_shared, ndinputs, ndoutputs, ctx);
+      // construct default context
+      Context ctx =
+          Context::Create(static_cast<Context::DeviceType>(default_dev_type), default_dev_id);
+      op->Forward(op_shared, ndinputs, ndoutputs, ctx);
 
-  if (op->num_outputs() == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<ObjectRef> outputs;
-    outputs.reserve(op->num_outputs());
-    for (int i = 0; i < op->num_outputs(); ++i) {
-      ObjectRef out = NDArrayHandle(ndoutputs[i]);
-      outputs.push_back(out);
-      delete ndoutputs[i];
-    }
-    *ret = runtime::ADT(0, outputs.begin(), outputs.end());
-  }
-});
+      if (op->num_outputs() == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<ObjectRef> outputs;
+        outputs.reserve(op->num_outputs());
+        for (int i = 0; i < op->num_outputs(); ++i) {
+          ObjectRef out = NDArrayHandle(ndoutputs[i]);
+          outputs.push_back(out);
+          delete ndoutputs[i];
+        }
+        *ret = runtime::ADT(0, outputs.begin(), outputs.end());
+      }
+    });
 
 MXNET_REGISTER_GLOBAL("cached_op.create")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(args[0].value().v_handle);
-  Object* flags_ptr = static_cast<Object*>(args[1].value().v_handle);
-  auto* n = static_cast<const runtime::MapObj*>(flags_ptr);
-  int num_flags = static_cast<int>(n->size());
-  bool thread_safe = args[2];
-  std::vector<std::pair<std::string, std::string> > flags;
-  flags.reserve(num_flags);
-  for (const auto& kv : *n) {
-    flags.emplace_back(std::string(runtime::Downcast<runtime::String>(kv.first)),
-                       std::string(runtime::Downcast<runtime::String>(kv.second)));
-  }
-  mxnet::CachedOpPtr *out;
-  if (!thread_safe) {
-    out = new CachedOpPtr(new CachedOp(*sym, flags));
-  } else {
-    out = new CachedOpPtr(new CachedOpThreadSafe(*sym, flags));
-  }
-  *ret = static_cast<void*>(out);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(args[0].value().v_handle);
+      Object* flags_ptr = static_cast<Object*>(args[1].value().v_handle);
+      auto* n           = static_cast<const runtime::MapObj*>(flags_ptr);
+      int num_flags     = static_cast<int>(n->size());
+      bool thread_safe  = args[2];
+      std::vector<std::pair<std::string, std::string> > flags;
+      flags.reserve(num_flags);
+      for (const auto& kv : *n) {
+        flags.emplace_back(std::string(runtime::Downcast<runtime::String>(kv.first)),
+                           std::string(runtime::Downcast<runtime::String>(kv.second)));
+      }
+      mxnet::CachedOpPtr* out;
+      if (!thread_safe) {
+        out = new CachedOpPtr(new CachedOp(*sym, flags));
+      } else {
+        out = new CachedOpPtr(new CachedOpThreadSafe(*sym, flags));
+      }
+      *ret = static_cast<void*>(out);
+    });
 
 MXNET_REGISTER_GLOBAL("cached_op.free")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  CachedOpPtr* g = static_cast<CachedOpPtr*>(args[0].value().v_handle);
-  delete g;
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      CachedOpPtr* g = static_cast<CachedOpPtr*>(args[0].value().v_handle);
+      delete g;
+    });
 
 MXNET_REGISTER_GLOBAL("cached_op.get_optimized_symbol")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  auto s = new nnvm::Symbol();
-  CachedOpPtr op = *static_cast<CachedOpPtr*>(args[0].value().v_handle);
-  *s = op->GetOptimizedSymbol();
-  *ret = static_cast<void*>(static_cast<SymbolHandle>(s));
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      auto s         = new nnvm::Symbol();
+      CachedOpPtr op = *static_cast<CachedOpPtr*>(args[0].value().v_handle);
+      *s             = op->GetOptimizedSymbol();
+      *ret           = static_cast<void*>(static_cast<SymbolHandle>(s));
+    });
 
 MXNET_REGISTER_GLOBAL("cached_op.register_op_hook")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  CachedOpHandle handle = static_cast<CachedOpHandle>(args[0].value().v_handle);
-  CachedOpMonitorCallback callback = reinterpret_cast<CachedOpMonitorCallback>(
-    reinterpret_cast<void (*)(const char *, const char *, void *)>(args[1].value().v_handle));
-  bool monitor_all = args[2];
-  CachedOpMonitorCallback callback_temp = nullptr;
-  std::function<void(const char *, const char *, void*)> clbk;
-  if (callback) {
-    callback_temp = callback;
-    clbk = [callback_temp](const char *name, const char *opr_name,
-                           void *handle) {
-      callback_temp(name, opr_name, handle);
-    };
-  } else {
-      clbk = nullptr;
-  }
-  CachedOpPtr op = *static_cast<CachedOpPtr *>(handle);
-  op->RegisterOpHook(clbk, monitor_all);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      CachedOpHandle handle            = static_cast<CachedOpHandle>(args[0].value().v_handle);
+      CachedOpMonitorCallback callback = reinterpret_cast<CachedOpMonitorCallback>(
+          reinterpret_cast<void (*)(const char*, const char*, void*)>(args[1].value().v_handle));
+      bool monitor_all                      = args[2];
+      CachedOpMonitorCallback callback_temp = nullptr;
+      std::function<void(const char*, const char*, void*)> clbk;
+      if (callback) {
+        callback_temp = callback;
+        clbk          = [callback_temp](const char* name, const char* opr_name, void* handle) {
+          callback_temp(name, opr_name, handle);
+        };
+      } else {
+        clbk = nullptr;
+      }
+      CachedOpPtr op = *static_cast<CachedOpPtr*>(handle);
+      op->RegisterOpHook(clbk, monitor_all);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_det.cc b/src/api/operator/numpy/linalg/np_det.cc
index 2a415d1d56b5..62fcf28b4b04 100644
--- a/src/api/operator/numpy/linalg/np_det.cc
+++ b/src/api/operator/numpy/linalg/np_det.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,17 +27,16 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.det")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.det").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_det");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 1;
-  int num_outputs = 0;
+  attrs.op          = op;
+  int num_inputs    = 1;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = NDArrayHandle(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = NDArrayHandle(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_eig.cc b/src/api/operator/numpy/linalg/np_eig.cc
index 69f92a4762a1..05cfa6c71a9d 100644
--- a/src/api/operator/numpy/linalg/np_eig.cc
+++ b/src/api/operator/numpy/linalg/np_eig.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,36 +29,32 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.eig")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.eig").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_eig");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 1;
+  attrs.op          = op;
+  int num_inputs    = 1;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1])});
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
 });
 
-MXNET_REGISTER_API("_npi.eigh")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.eigh").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_eigh");
   nnvm::NodeAttrs attrs;
   op::EighParam param;
-  param.UPLO = *((args[1].operator std::string()).c_str());
+  param.UPLO   = *((args[1].operator std::string()).c_str());
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::EighParam>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
+  int num_inputs    = 1;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1])});
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_eigvals.cc b/src/api/operator/numpy/linalg/np_eigvals.cc
index acde49f87b74..04982ded7d06 100644
--- a/src/api/operator/numpy/linalg/np_eigvals.cc
+++ b/src/api/operator/numpy/linalg/np_eigvals.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,33 +29,33 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.eigvals")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_eigvals");
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 1;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_eigvals");
+      nnvm::NodeAttrs attrs;
+      attrs.op          = op;
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 MXNET_REGISTER_API("_npi.eigvalsh")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_eigvalsh");
-  nnvm::NodeAttrs attrs;
-  op::EigvalshParam param;
-  param.UPLO = *((args[1].operator std::string()).c_str());
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::EigvalshParam>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_eigvalsh");
+      nnvm::NodeAttrs attrs;
+      op::EigvalshParam param;
+      param.UPLO   = *((args[1].operator std::string()).c_str());
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::EigvalshParam>(&attrs);
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_gesvd.cc b/src/api/operator/numpy/linalg/np_gesvd.cc
index a4517849cbaf..5feb5ae8c8d1 100644
--- a/src/api/operator/numpy/linalg/np_gesvd.cc
+++ b/src/api/operator/numpy/linalg/np_gesvd.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,21 +27,19 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.svd")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.svd").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npi_svd");
-  attrs.op = op;
+  attrs.op           = op;
   // inputs
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
+  int num_inputs    = 1;
   // outputs
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1]),
-                 NDArrayHandle(ndoutputs[2])});
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret            = ADT(
+      0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1]), NDArrayHandle(ndoutputs[2])});
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_inv.cc b/src/api/operator/numpy/linalg/np_inv.cc
index 238f666f29bd..bc9853e96616 100644
--- a/src/api/operator/numpy/linalg/np_inv.cc
+++ b/src/api/operator/numpy/linalg/np_inv.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,17 +27,16 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.inv")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.inv").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_inv");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 1;
-  int num_outputs = 0;
+  attrs.op          = op;
+  int num_inputs    = 1;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_lstsq.cc b/src/api/operator/numpy/linalg/np_lstsq.cc
index fbeafbee6054..e2ac7673c38b 100644
--- a/src/api/operator/numpy/linalg/np_lstsq.cc
+++ b/src/api/operator/numpy/linalg/np_lstsq.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,8 +28,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.lstsq")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.lstsq").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_lstsq");
   nnvm::NodeAttrs attrs;
@@ -46,20 +45,21 @@ MXNET_REGISTER_API("_npi.lstsq")
   } else {
     param.rcond = args[2].operator double();
   }
-  param.finfoEps32 = args[3].operator double();
-  param.finfoEps64 = args[4].operator double();
+  param.finfoEps32  = args[3].operator double();
+  param.finfoEps64  = args[4].operator double();
   param.new_default = args[2].type_code() == kNull ? true : false;
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::LstsqParam>(&attrs);
-  int num_inputs = 2;
-  int num_outputs = 0;
+  int num_inputs    = 2;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1]),
-                 NDArrayHandle(ndoutputs[2]),
-                 NDArrayHandle(ndoutputs[3])});
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ADT(0,
+             {NDArrayHandle(ndoutputs[0]),
+              NDArrayHandle(ndoutputs[1]),
+              NDArrayHandle(ndoutputs[2]),
+              NDArrayHandle(ndoutputs[3])});
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_matrix_rank.cc b/src/api/operator/numpy/linalg/np_matrix_rank.cc
index 4bfe66664ef8..5849973c5333 100644
--- a/src/api/operator/numpy/linalg/np_matrix_rank.cc
+++ b/src/api/operator/numpy/linalg/np_matrix_rank.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,49 +28,47 @@
 
 namespace mxnet {
 
-inline static void _npi_matrix_rank_none_tol(runtime::MXNetArgs args,
-                                             runtime::MXNetRetValue* ret) {
+inline static void _npi_matrix_rank_none_tol(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_matrix_rank_none_tol");
   op::MatrixRankNoneTolParam param;
   nnvm::NodeAttrs attrs;
-  param.hermitian = args[2].operator bool();
+  param.hermitian  = args[2].operator bool();
   param.finfoEps32 = args[3].operator double();
   param.finfoEps64 = args[4].operator double();
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed     = param;
+  attrs.op         = op;
   SetAttrDict<op::MatrixRankNoneTolParam>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
+  int num_inputs    = 1;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
-inline static void _npi_matrix_rank(runtime::MXNetArgs args,
-                                    runtime::MXNetRetValue* ret) {
+inline static void _npi_matrix_rank(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_matrix_rank");
   op::MatrixRankParam param;
   nnvm::NodeAttrs attrs;
   param.hermitian = args[2].operator bool();
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed    = param;
+  attrs.op        = op;
   SetAttrDict<op::MatrixRankParam>(&attrs);
-  int num_inputs = 2;
-  int num_outputs = 0;
+  int num_inputs    = 2;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
 MXNET_REGISTER_API("_npi.matrix_rank")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  if (args[1].type_code() == kNull) {
-    _npi_matrix_rank_none_tol(args, ret);
-  } else {
-    _npi_matrix_rank(args, ret);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      if (args[1].type_code() == kNull) {
+        _npi_matrix_rank_none_tol(args, ret);
+      } else {
+        _npi_matrix_rank(args, ret);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_norm.cc b/src/api/operator/numpy/linalg/np_norm.cc
index 1928321ad206..b3a45701fd68 100644
--- a/src/api/operator/numpy/linalg/np_norm.cc
+++ b/src/api/operator/numpy/linalg/np_norm.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,8 +28,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.norm")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.norm").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npi_norm");
@@ -41,19 +40,19 @@ MXNET_REGISTER_API("_npi.norm")
     param.axis = mxnet::TShape(args[2].operator ObjectRef());
   }
   param.keepdims = args[3].operator bool();
-  param.flag = args[4].operator int();
+  param.flag     = args[4].operator int();
 
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyNormParam>(&attrs);
 
   // inputs
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
+  int num_inputs    = 1;
   // outputs
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret            = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_pinv.cc b/src/api/operator/numpy/linalg/np_pinv.cc
index b14407c7b69f..531d7c0f8d44 100644
--- a/src/api/operator/numpy/linalg/np_pinv.cc
+++ b/src/api/operator/numpy/linalg/np_pinv.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -34,14 +34,14 @@ inline static void _npi_pinv(runtime::MXNetArgs args, runtime::MXNetRetValue* re
   op::PinvParam param;
   nnvm::NodeAttrs attrs;
   param.hermitian = args[2].operator bool();
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed    = param;
+  attrs.op        = op;
   SetAttrDict<op::PinvParam>(&attrs);
-  int num_inputs = 2;
-  int num_outputs = 0;
+  int num_inputs    = 2;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
 inline static void _npi_pinv_scalar_rcond(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
@@ -49,20 +49,19 @@ inline static void _npi_pinv_scalar_rcond(runtime::MXNetArgs args, runtime::MXNe
   const nnvm::Op* op = Op::Get("_npi_pinv_scalar_rcond");
   op::PinvScalarRcondParam param;
   nnvm::NodeAttrs attrs;
-  param.rcond = args[1].operator double();
+  param.rcond     = args[1].operator double();
   param.hermitian = args[2].operator bool();
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed    = param;
+  attrs.op        = op;
   SetAttrDict<op::PinvScalarRcondParam>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
+  int num_inputs    = 1;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
-MXNET_REGISTER_API("_npi.pinv")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.pinv").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
     _npi_pinv_scalar_rcond(args, ret);
   } else {
diff --git a/src/api/operator/numpy/linalg/np_potrf.cc b/src/api/operator/numpy/linalg/np_potrf.cc
index 811ce74f8692..bd11a56d4796 100644
--- a/src/api/operator/numpy/linalg/np_potrf.cc
+++ b/src/api/operator/numpy/linalg/np_potrf.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,20 +29,20 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.cholesky")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_cholesky");
-  nnvm::NodeAttrs attrs;
-  op::LaCholeskyParam param;
-  param.lower = args[1].operator bool();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::LaCholeskyParam>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_cholesky");
+      nnvm::NodeAttrs attrs;
+      op::LaCholeskyParam param;
+      param.lower  = args[1].operator bool();
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::LaCholeskyParam>(&attrs);
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_qr.cc b/src/api/operator/numpy/linalg/np_qr.cc
index e9c0ec5d66d3..359b5bca1394 100644
--- a/src/api/operator/numpy/linalg/np_qr.cc
+++ b/src/api/operator/numpy/linalg/np_qr.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,18 +27,16 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.qr")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.qr").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_qr");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 1;
+  attrs.op          = op;
+  int num_inputs    = 1;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1])});
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_slogdet.cc b/src/api/operator/numpy/linalg/np_slogdet.cc
index 28c90265cdc7..8b2c36ddb6b0 100644
--- a/src/api/operator/numpy/linalg/np_slogdet.cc
+++ b/src/api/operator/numpy/linalg/np_slogdet.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,17 +28,16 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.slogdet")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_slogdet");
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 1;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1])});
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_slogdet");
+      nnvm::NodeAttrs attrs;
+      attrs.op          = op;
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_solve.cc b/src/api/operator/numpy/linalg/np_solve.cc
index d0d263881701..e3e13b06a3a9 100644
--- a/src/api/operator/numpy/linalg/np_solve.cc
+++ b/src/api/operator/numpy/linalg/np_solve.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,17 +27,16 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.solve")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.solve").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_solve");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 2;
-  int num_outputs = 0;
+  attrs.op          = op;
+  int num_inputs    = 2;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_tensorinv.cc b/src/api/operator/numpy/linalg/np_tensorinv.cc
index c3062eee637f..9392f2e8c9bc 100644
--- a/src/api/operator/numpy/linalg/np_tensorinv.cc
+++ b/src/api/operator/numpy/linalg/np_tensorinv.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,20 +29,20 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.tensorinv")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_tensorinv");
-  nnvm::NodeAttrs attrs;
-  op::TensorinvParam param;
-  param.ind = args[1].operator int();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::TensorinvParam>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_tensorinv");
+      nnvm::NodeAttrs attrs;
+      op::TensorinvParam param;
+      param.ind    = args[1].operator int();
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::TensorinvParam>(&attrs);
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/linalg/np_tensorsolve.cc b/src/api/operator/numpy/linalg/np_tensorsolve.cc
index 5a50c22ea94e..9d1224063ee4 100644
--- a/src/api/operator/numpy/linalg/np_tensorsolve.cc
+++ b/src/api/operator/numpy/linalg/np_tensorsolve.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,28 +29,28 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.tensorsolve")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_tensorsolve");
-  nnvm::NodeAttrs attrs;
-  op::TensorsolveParam param;
-  if (args[2].type_code() == kNull) {
-    param.a_axes = Tuple<int>();
-  } else {
-    if (args[2].type_code() == kDLInt) {
-      param.a_axes = Tuple<int>(1, args[2].operator int64_t());
-    } else {
-      param.a_axes = Tuple<int>(args[2].operator ObjectRef());
-    }
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::TensorsolveParam>(&attrs);
-  int num_inputs = 2;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_tensorsolve");
+      nnvm::NodeAttrs attrs;
+      op::TensorsolveParam param;
+      if (args[2].type_code() == kNull) {
+        param.a_axes = Tuple<int>();
+      } else {
+        if (args[2].type_code() == kDLInt) {
+          param.a_axes = Tuple<int>(1, args[2].operator int64_t());
+        } else {
+          param.a_axes = Tuple<int>(args[2].operator ObjectRef());
+        }
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::TensorsolveParam>(&attrs);
+      int num_inputs    = 2;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_bincount_op.cc b/src/api/operator/numpy/np_bincount_op.cc
index 7be884aefb1a..27495e98182d 100644
--- a/src/api/operator/numpy/np_bincount_op.cc
+++ b/src/api/operator/numpy/np_bincount_op.cc
@@ -28,34 +28,35 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.bincount")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_bincount");
-  nnvm::NodeAttrs attrs;
-  op::NumpyBincountParam param;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_bincount");
+      nnvm::NodeAttrs attrs;
+      op::NumpyBincountParam param;
 
-  int num_outputs = 0;
-  if (args[1].type_code() == kNull) {
-    param.minlength = args[2].operator int64_t();
-    param.has_weights = false;
-    NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-    int num_inputs = 1;
-    attrs.parsed = param;
-    attrs.op = op;
-    SetAttrDict<op::NumpyBincountParam>(&attrs);
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  } else {
-    param.minlength = args[2].operator int64_t();
-    param.has_weights = true;
-    NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-    int num_inputs = 2;
-    attrs.parsed = param;
-    attrs.op = op;
-    SetAttrDict<op::NumpyBincountParam>(&attrs);
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-    }
-});
+      int num_outputs = 0;
+      if (args[1].type_code() == kNull) {
+        param.minlength   = args[2].operator int64_t();
+        param.has_weights = false;
+        NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+        int num_inputs    = 1;
+        attrs.parsed      = param;
+        attrs.op          = op;
+        SetAttrDict<op::NumpyBincountParam>(&attrs);
+        auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+        *ret           = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      } else {
+        param.minlength   = args[2].operator int64_t();
+        param.has_weights = true;
+        NDArray* inputs[] = {args[0].operator mxnet::NDArray*(),
+                             args[1].operator mxnet::NDArray*()};
+        int num_inputs    = 2;
+        attrs.parsed      = param;
+        attrs.op          = op;
+        SetAttrDict<op::NumpyBincountParam>(&attrs);
+        auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+        *ret           = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_broadcast_reduce_op_boolean.cc b/src/api/operator/numpy/np_broadcast_reduce_op_boolean.cc
index c3e186195dca..f2494f0d5672 100644
--- a/src/api/operator/numpy/np_broadcast_reduce_op_boolean.cc
+++ b/src/api/operator/numpy/np_broadcast_reduce_op_boolean.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -19,7 +19,8 @@
 
 /*!
  * \file np_broadcast_reduce_op_boolean.cc
- * \brief Implementation of the API of functions in src/operator/numpy/np_broadcast_reduce_op_boolean.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy/np_broadcast_reduce_op_boolean.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -28,16 +29,15 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.all")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.all").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_all");
   nnvm::NodeAttrs attrs;
   op::NumpyReduceAxesBoolParam param;
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
   } else if (args[1].type_code() == kDLInt) {
@@ -45,11 +45,11 @@ MXNET_REGISTER_API("_npi.all")
   } else {
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
-  param.keepdims = args[2].operator bool();
+  param.keepdims    = args[2].operator bool();
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::NumpyReduceAxesBoolParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
@@ -59,16 +59,15 @@ MXNET_REGISTER_API("_npi.all")
   }
 });
 
-MXNET_REGISTER_API("_npi.any")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.any").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_any");
   nnvm::NodeAttrs attrs;
   op::NumpyReduceAxesBoolParam param;
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
   } else if (args[1].type_code() == kDLInt) {
@@ -76,11 +75,11 @@ MXNET_REGISTER_API("_npi.any")
   } else {
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
-  param.keepdims = args[2].operator bool();
+  param.keepdims    = args[2].operator bool();
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::NumpyReduceAxesBoolParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
diff --git a/src/api/operator/numpy/np_broadcast_reduce_op_index.cc b/src/api/operator/numpy/np_broadcast_reduce_op_index.cc
index 83e16999417b..1d46ec037aef 100644
--- a/src/api/operator/numpy/np_broadcast_reduce_op_index.cc
+++ b/src/api/operator/numpy/np_broadcast_reduce_op_index.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,69 +30,69 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.argmax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_argmax");
-  nnvm::NodeAttrs attrs;
-  op::ReduceAxisParam param;
-  // param.axis
-  if (args[1].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[1].operator int();
-  }
-  // param.keepdims
-  param.keepdims = args[2].operator bool();
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_argmax");
+      nnvm::NodeAttrs attrs;
+      op::ReduceAxisParam param;
+      // param.axis
+      if (args[1].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[1].operator int();
+      }
+      // param.keepdims
+      param.keepdims = args[2].operator bool();
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ReduceAxisParam>(&attrs);
-  // inputs
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  // outputs
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::ReduceAxisParam>(&attrs);
+      // inputs
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      // outputs
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 MXNET_REGISTER_API("_npi.argmin")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_argmin");
-  nnvm::NodeAttrs attrs;
-  op::ReduceAxisParam param;
-  // param.axis
-  if (args[1].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[1].operator int();
-  }
-  // param.keepdims
-  param.keepdims = args[2].operator bool();
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_argmin");
+      nnvm::NodeAttrs attrs;
+      op::ReduceAxisParam param;
+      // param.axis
+      if (args[1].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[1].operator int();
+      }
+      // param.keepdims
+      param.keepdims = args[2].operator bool();
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ReduceAxisParam>(&attrs);
-  // inputs
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  // outputs
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::ReduceAxisParam>(&attrs);
+      // inputs
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      // outputs
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_broadcast_reduce_op_value.cc b/src/api/operator/numpy/np_broadcast_reduce_op_value.cc
index 277bf4a65b42..f7238e8b24d2 100644
--- a/src/api/operator/numpy/np_broadcast_reduce_op_value.cc
+++ b/src/api/operator/numpy/np_broadcast_reduce_op_value.cc
@@ -30,29 +30,28 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.broadcast_to")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_broadcast_to");
-  nnvm::NodeAttrs attrs;
-  op::BroadcastToParam param;
-  if (args[1].type_code() == kDLInt) {
-    param.shape = TShape(1, args[1].operator int64_t());
-  } else {
-    param.shape = TShape(args[1].operator ObjectRef());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::BroadcastToParam>(&attrs);
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_broadcast_to");
+      nnvm::NodeAttrs attrs;
+      op::BroadcastToParam param;
+      if (args[1].type_code() == kDLInt) {
+        param.shape = TShape(1, args[1].operator int64_t());
+      } else {
+        param.shape = TShape(args[1].operator ObjectRef());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::BroadcastToParam>(&attrs);
 
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
-MXNET_REGISTER_API("_npi.sum")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.sum").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_sum");
   op::NumpyReduceAxesParam param;
@@ -96,12 +95,12 @@ MXNET_REGISTER_API("_npi.sum")
   SetAttrDict<op::NumpyReduceAxesParam>(&attrs);
 
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
+  int num_inputs    = 1;
 
   NDArray* outputs[] = {args[5].operator NDArray*()};
-  NDArray** out = (outputs[0] == nullptr) ? nullptr : outputs;
-  int num_outputs = (outputs[0] != nullptr);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
+  NDArray** out      = (outputs[0] == nullptr) ? nullptr : outputs;
+  int num_outputs    = (outputs[0] != nullptr);
+  auto ndoutputs     = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
 
   if (out) {
     *ret = PythonArg(5);
@@ -110,8 +109,7 @@ MXNET_REGISTER_API("_npi.sum")
   }
 });
 
-MXNET_REGISTER_API("_npi.mean")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.mean").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_mean");
   nnvm::NodeAttrs attrs;
@@ -135,15 +133,15 @@ MXNET_REGISTER_API("_npi.mean")
     param.keepdims = args[3].operator bool();
   }
   param.initial = dmlc::optional<double>();
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed  = param;
+  attrs.op      = op;
   SetAttrDict<op::NumpyReduceAxesParam>(&attrs);
-  int num_inputs = 1;
+  int num_inputs    = 1;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  NDArray* out = args[4].operator mxnet::NDArray*();
+  NDArray* out      = args[4].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
     *ret = PythonArg(4);
   } else {
@@ -151,8 +149,7 @@ MXNET_REGISTER_API("_npi.mean")
   }
 });
 
-MXNET_REGISTER_API("_npi.prod")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.prod").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_prod");
   nnvm::NodeAttrs attrs;
@@ -180,14 +177,14 @@ MXNET_REGISTER_API("_npi.prod")
     param.initial = args[4].operator double();
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyReduceAxesParam>(&attrs);
-  int num_inputs = 1;
+  int num_inputs    = 1;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  NDArray* out = args[5].operator mxnet::NDArray*();
+  NDArray* out      = args[5].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
     *ret = PythonArg(5);
   } else {
@@ -195,16 +192,15 @@ MXNET_REGISTER_API("_npi.prod")
   }
 });
 
-MXNET_REGISTER_API("_npi.max")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.max").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   static const nnvm::Op* op = Op::Get("_npi_max");
   nnvm::NodeAttrs attrs;
   op::NumpyReduceAxesNoDTypeParam param;
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
   } else if (args[1].type_code() == kDLInt) {
@@ -212,11 +208,11 @@ MXNET_REGISTER_API("_npi.max")
   } else {
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
-  param.keepdims = args[2].operator bool();
+  param.keepdims    = args[2].operator bool();
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::NumpyReduceAxesNoDTypeParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
@@ -226,16 +222,15 @@ MXNET_REGISTER_API("_npi.max")
   }
 });
 
-MXNET_REGISTER_API("_npi.min")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.min").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   static const nnvm::Op* op = Op::Get("_npi_min");
   nnvm::NodeAttrs attrs;
   op::NumpyReduceAxesNoDTypeParam param;
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
   } else if (args[1].type_code() == kDLInt) {
@@ -243,11 +238,11 @@ MXNET_REGISTER_API("_npi.min")
   } else {
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
-  param.keepdims = args[2].operator bool();
+  param.keepdims    = args[2].operator bool();
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::NumpyReduceAxesNoDTypeParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
@@ -257,16 +252,15 @@ MXNET_REGISTER_API("_npi.min")
   }
 });
 
-MXNET_REGISTER_API("_npi.amax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.amax").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   static const nnvm::Op* op = Op::Get("_npi_amax");
   nnvm::NodeAttrs attrs;
   op::NumpyReduceAxesNoDTypeParam param;
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
   } else if (args[1].type_code() == kDLInt) {
@@ -274,11 +268,11 @@ MXNET_REGISTER_API("_npi.amax")
   } else {
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
-  param.keepdims = args[2].operator bool();
+  param.keepdims    = args[2].operator bool();
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::NumpyReduceAxesNoDTypeParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
@@ -288,16 +282,15 @@ MXNET_REGISTER_API("_npi.amax")
   }
 });
 
-MXNET_REGISTER_API("_npi.amin")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.amin").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   static const nnvm::Op* op = Op::Get("_npi_amin");
   nnvm::NodeAttrs attrs;
   op::NumpyReduceAxesNoDTypeParam param;
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
   } else if (args[1].type_code() == kDLInt) {
@@ -305,11 +298,11 @@ MXNET_REGISTER_API("_npi.amin")
   } else {
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
-  param.keepdims = args[2].operator bool();
+  param.keepdims    = args[2].operator bool();
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::NumpyReduceAxesNoDTypeParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
diff --git a/src/api/operator/numpy/np_cross.cc b/src/api/operator/numpy/np_cross.cc
index 0dd4644cad59..2bf9675148ca 100644
--- a/src/api/operator/numpy/np_cross.cc
+++ b/src/api/operator/numpy/np_cross.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,23 +28,22 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.cross")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.cross").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npi_cross");
   op::NumpyCrossParam param;
-  param.axisa = args[2].operator int();
-  param.axisb = args[3].operator int();
-  param.axisc = args[4].operator int();
-  attrs.op = op;
+  param.axisa  = args[2].operator int();
+  param.axisb  = args[3].operator int();
+  param.axisc  = args[4].operator int();
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyCrossParam>(&attrs);
-  int num_inputs = 2;
+  int num_inputs    = 2;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_cumsum.cc b/src/api/operator/numpy/np_cumsum.cc
index a0f68cca1b6b..227ac0531e0d 100644
--- a/src/api/operator/numpy/np_cumsum.cc
+++ b/src/api/operator/numpy/np_cumsum.cc
@@ -29,39 +29,39 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.cumsum")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npi_cumsum");
-  op::CumsumParam param;
-  // axis
-  if (args[1].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[1].operator int();
-  }
-  // dtype
-  if (args[2].type_code() == kNull) {
-    param.dtype = dmlc::nullopt;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[2].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::CumsumParam>(&attrs);
-  // inputs
-  NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
-  // outputs
-  NDArray* outputs[] = {args[3].operator NDArray*()};
-  NDArray** out = outputs[0] == nullptr ? nullptr : outputs;
-  int num_outputs = outputs[0] != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npi_cumsum");
+      op::CumsumParam param;
+      // axis
+      if (args[1].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[1].operator int();
+      }
+      // dtype
+      if (args[2].type_code() == kNull) {
+        param.dtype = dmlc::nullopt;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[2].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::CumsumParam>(&attrs);
+      // inputs
+      NDArray* inputs[] = {args[0].operator NDArray*()};
+      int num_inputs    = 1;
+      // outputs
+      NDArray* outputs[] = {args[3].operator NDArray*()};
+      NDArray** out      = outputs[0] == nullptr ? nullptr : outputs;
+      int num_outputs    = outputs[0] != nullptr;
+      auto ndoutputs     = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_delete_op.cc b/src/api/operator/numpy/np_delete_op.cc
index 76b2a709a270..dd5746994a29 100644
--- a/src/api/operator/numpy/np_delete_op.cc
+++ b/src/api/operator/numpy/np_delete_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,73 +30,72 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.delete")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_delete");
-  nnvm::NodeAttrs attrs;
-  op::NumpyDeleteParam param;
-  int num_inputs = 0;
-  param.start = dmlc::nullopt;
-  param.step = dmlc::nullopt;
-  param.stop = dmlc::nullopt;
-  param.int_ind = dmlc::nullopt;
-  param.axis = dmlc::nullopt;
-  if (args.num_args == 3) {
-    if (args[1].type_code() == kDLInt ||
-        args[1].type_code() == kDLFloat) {
-      if (args[1].type_code() == kDLInt) {
-        param.int_ind = args[1].operator int64_t();
-      } else if (args[1].type_code() == kDLFloat) {
-        param.int_ind = static_cast<int64_t>(args[1].operator double());
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_delete");
+      nnvm::NodeAttrs attrs;
+      op::NumpyDeleteParam param;
+      int num_inputs = 0;
+      param.start    = dmlc::nullopt;
+      param.step     = dmlc::nullopt;
+      param.stop     = dmlc::nullopt;
+      param.int_ind  = dmlc::nullopt;
+      param.axis     = dmlc::nullopt;
+      if (args.num_args == 3) {
+        if (args[1].type_code() == kDLInt || args[1].type_code() == kDLFloat) {
+          if (args[1].type_code() == kDLInt) {
+            param.int_ind = args[1].operator int64_t();
+          } else if (args[1].type_code() == kDLFloat) {
+            param.int_ind = static_cast<int64_t>(args[1].operator double());
+          }
+          if (args[2].type_code() == kDLInt) {
+            param.axis = args[2].operator int();
+          } else if (args[2].type_code() == kDLFloat) {
+            param.axis = static_cast<int>(args[2].operator double());
+          }
+          num_inputs = 1;
+        } else {
+          if (args[2].type_code() == kDLInt) {
+            param.axis = args[2].operator int();
+          } else if (args[2].type_code() == kDLFloat) {
+            param.axis = static_cast<int>(args[2].operator double());
+          }
+          num_inputs = 2;
+        }
+      } else {
+        num_inputs = 1;
+        if (args[1].type_code() == kDLInt) {
+          param.start = args[1].operator int64_t();
+        } else if (args[1].type_code() == kDLFloat) {
+          param.start = static_cast<int64_t>(args[1].operator double());
+        }
+        if (args[2].type_code() == kDLInt) {
+          param.stop = args[2].operator int64_t();
+        } else if (args[2].type_code() == kDLFloat) {
+          param.stop = static_cast<int64_t>(args[2].operator double());
+        }
+        if (args[3].type_code() == kDLInt) {
+          param.step = args[3].operator int64_t();
+        } else if (args[3].type_code() == kDLFloat) {
+          param.step = static_cast<int64_t>(args[3].operator double());
+        }
+        if (args[4].type_code() == kDLInt) {
+          param.axis = args[4].operator int();
+        } else if (args[4].type_code() == kDLFloat) {
+          param.axis = static_cast<int>(args[4].operator double());
+        }
       }
-      if (args[2].type_code() == kDLInt) {
-        param.axis = args[2].operator int();
-      } else if (args[2].type_code() == kDLFloat) {
-        param.axis = static_cast<int>(args[2].operator double());
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
       }
-      num_inputs = 1;
-    } else {
-      if (args[2].type_code() == kDLInt) {
-        param.axis = args[2].operator int();
-      } else if (args[2].type_code() == kDLFloat) {
-        param.axis = static_cast<int>(args[2].operator double());
-      }
-      num_inputs = 2;
-    }
-  } else {
-    num_inputs = 1;
-    if (args[1].type_code() == kDLInt) {
-      param.start = args[1].operator int64_t();
-    } else if (args[1].type_code() == kDLFloat) {
-      param.start = static_cast<int64_t>(args[1].operator double());
-    }
-    if (args[2].type_code() == kDLInt) {
-      param.stop = args[2].operator int64_t();
-    } else if (args[2].type_code() == kDLFloat) {
-      param.stop = static_cast<int64_t>(args[2].operator double());
-    }
-    if (args[3].type_code() == kDLInt) {
-      param.step = args[3].operator int64_t();
-    } else if (args[3].type_code() == kDLFloat) {
-      param.step = static_cast<int64_t>(args[3].operator double());
-    }
-    if (args[4].type_code() == kDLInt) {
-      param.axis = args[4].operator int();
-    } else if (args[4].type_code() == kDLFloat) {
-      param.axis = static_cast<int>(args[4].operator double());
-    }
-  }
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyDeleteParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyDeleteParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_diff_op.cc b/src/api/operator/numpy/np_diff_op.cc
index 7be5b804eade..a89063b93eb2 100644
--- a/src/api/operator/numpy/np_diff_op.cc
+++ b/src/api/operator/numpy/np_diff_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,25 +27,24 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.diff")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.diff").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_diff");
   nnvm::NodeAttrs attrs;
   op::DiffParam param;
-  param.n = args[1].operator int();
+  param.n    = args[1].operator int();
   param.axis = args[2].operator int();
 
   // we directly copy DiffParam, which is trivially-copyable
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::DiffParam>(&attrs);
 
-  int num_outputs = 0;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_dot_op.cc b/src/api/operator/numpy/np_dot_op.cc
index 66a0f1116052..1ce67c40c5d5 100644
--- a/src/api/operator/numpy/np_dot_op.cc
+++ b/src/api/operator/numpy/np_dot_op.cc
@@ -27,19 +27,17 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.dot")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.dot").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_dot");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*(),
-                       args[1].operator mxnet::NDArray*()};
-  NDArray* out = args[2].operator NDArray*();
+  attrs.op          = op;
+  NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
+  NDArray* out      = args[2].operator NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_inputs = 2;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_inputs    = 2;
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(2);
   } else {
diff --git a/src/api/operator/numpy/np_ediff1d_op.cc b/src/api/operator/numpy/np_ediff1d_op.cc
index 64e15064889a..ee88eac54908 100644
--- a/src/api/operator/numpy/np_ediff1d_op.cc
+++ b/src/api/operator/numpy/np_ediff1d_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,48 +28,48 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.ediff1d")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_ediff1d");
-  nnvm::NodeAttrs attrs;
-  op::EDiff1DParam param;
-  int num_inputs = 1;
-  NDArray* inputs[3];
-  inputs[0] = args[0].operator mxnet::NDArray*();
-  // the order of `to_end` and `to_begin` array in the backend is different from the front-end
-  if (args[2].type_code() == kDLFloat || args[2].type_code() == kDLInt) {
-    param.to_begin_scalar = args[2].operator double();
-    param.to_begin_arr_given = false;
-  } else if (args[2].type_code() == kNull) {
-    param.to_begin_scalar = dmlc::nullopt;
-    param.to_begin_arr_given = false;
-  } else {
-    param.to_begin_scalar = dmlc::nullopt;
-    param.to_begin_arr_given = true;
-    inputs[num_inputs] = args[2].operator mxnet::NDArray*();
-    num_inputs++;
-  }
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_ediff1d");
+      nnvm::NodeAttrs attrs;
+      op::EDiff1DParam param;
+      int num_inputs = 1;
+      NDArray* inputs[3];
+      inputs[0] = args[0].operator mxnet::NDArray*();
+      // the order of `to_end` and `to_begin` array in the backend is different from the front-end
+      if (args[2].type_code() == kDLFloat || args[2].type_code() == kDLInt) {
+        param.to_begin_scalar    = args[2].operator double();
+        param.to_begin_arr_given = false;
+      } else if (args[2].type_code() == kNull) {
+        param.to_begin_scalar    = dmlc::nullopt;
+        param.to_begin_arr_given = false;
+      } else {
+        param.to_begin_scalar    = dmlc::nullopt;
+        param.to_begin_arr_given = true;
+        inputs[num_inputs]       = args[2].operator mxnet::NDArray*();
+        num_inputs++;
+      }
 
-  if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
-    param.to_end_scalar = args[1].operator double();
-    param.to_end_arr_given = false;
-  } else if (args[1].type_code() == kNull) {
-    param.to_end_scalar = dmlc::nullopt;
-    param.to_end_arr_given = false;
-  } else {
-    param.to_end_scalar = dmlc::nullopt;
-    param.to_end_arr_given = true;
-    inputs[num_inputs] = args[1].operator mxnet::NDArray*();
-    num_inputs++;
-  }
+      if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
+        param.to_end_scalar    = args[1].operator double();
+        param.to_end_arr_given = false;
+      } else if (args[1].type_code() == kNull) {
+        param.to_end_scalar    = dmlc::nullopt;
+        param.to_end_arr_given = false;
+      } else {
+        param.to_end_scalar    = dmlc::nullopt;
+        param.to_end_arr_given = true;
+        inputs[num_inputs]     = args[1].operator mxnet::NDArray*();
+        num_inputs++;
+      }
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::EDiff1DParam>(&attrs);
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::EDiff1DParam>(&attrs);
 
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_einsum_op.cc b/src/api/operator/numpy/np_einsum_op.cc
index 900739ac10ab..8c96297a4433 100644
--- a/src/api/operator/numpy/np_einsum_op.cc
+++ b/src/api/operator/numpy/np_einsum_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,42 +30,42 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.einsum")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_einsum");
-  nnvm::NodeAttrs attrs;
-  op::NumpyEinsumParam param;
-  int args_size = args.size();
-  // param.num_args
-  param.num_args = args_size - 3;
-  // param.subscripts
-  param.subscripts = args[args_size - 3].operator std::string();
-  // param.optimize
-  param.optimize = args[args_size - 1].operator int();
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_einsum");
+      nnvm::NodeAttrs attrs;
+      op::NumpyEinsumParam param;
+      int args_size = args.size();
+      // param.num_args
+      param.num_args = args_size - 3;
+      // param.subscripts
+      param.subscripts = args[args_size - 3].operator std::string();
+      // param.optimize
+      param.optimize = args[args_size - 1].operator int();
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyEinsumParam>(&attrs);
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyEinsumParam>(&attrs);
 
-  // inputs
-  int num_inputs = param.num_args;
-  std::vector<NDArray*> inputs_vec(num_inputs, nullptr);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs_vec[i] = args[i].operator mxnet::NDArray*();
-  }
-  NDArray** inputs = inputs_vec.data();
+      // inputs
+      int num_inputs = param.num_args;
+      std::vector<NDArray*> inputs_vec(num_inputs, nullptr);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs_vec[i] = args[i].operator mxnet::NDArray*();
+      }
+      NDArray** inputs = inputs_vec.data();
 
-  // outputs
-  NDArray* out = args[args_size - 2].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+      // outputs
+      NDArray* out      = args[args_size - 2].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
 
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(args_size - 2);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(args_size - 2);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_elemwise_broadcast_logic_op.cc b/src/api/operator/numpy/np_elemwise_broadcast_logic_op.cc
index 224843358526..20e0b83b750f 100644
--- a/src/api/operator/numpy/np_elemwise_broadcast_logic_op.cc
+++ b/src/api/operator/numpy/np_elemwise_broadcast_logic_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -19,7 +19,8 @@
 
 /*!
  * \file np_elemwise_broadcast_logic_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy/np_elemwise_broadcast_logic_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy/np_elemwise_broadcast_logic_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -28,27 +29,27 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.equal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.equal").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_equal");
+  const nnvm::Op* op        = Op::Get("_npi_equal");
   const nnvm::Op* op_scalar = Op::Get("_npi_equal_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
 MXNET_REGISTER_API("_npi.not_equal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_not_equal");
-  const nnvm::Op* op_scalar = Op::Get("_npi_not_equal_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_not_equal");
+      const nnvm::Op* op_scalar = Op::Get("_npi_not_equal_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
-void SetUFuncHelper(runtime::MXNetArgs args, runtime::MXNetRetValue* ret,
-                     const nnvm::Op* op, const nnvm::Op* op_scalar,
-                     const nnvm::Op* op_rscalar) {
-  if (args[0].type_code() == kNDArrayHandle &&
-      args[1].type_code() == kNDArrayHandle) {
+void SetUFuncHelper(runtime::MXNetArgs args,
+                    runtime::MXNetRetValue* ret,
+                    const nnvm::Op* op,
+                    const nnvm::Op* op_scalar,
+                    const nnvm::Op* op_rscalar) {
+  if (args[0].type_code() == kNDArrayHandle && args[1].type_code() == kNDArrayHandle) {
     UFuncHelper(args, ret, op, nullptr, nullptr);
   } else if (args[0].type_code() == kNDArrayHandle) {
     UFuncHelper(args, ret, nullptr, op_scalar, nullptr);
@@ -58,39 +59,38 @@ void SetUFuncHelper(runtime::MXNetArgs args, runtime::MXNetRetValue* ret,
 }
 
 MXNET_REGISTER_API("_npi.greater")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_greater");
-  const nnvm::Op* op_scalar = Op::Get("_npi_greater_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_less_scalar");
-  SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_greater");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_greater_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_less_scalar");
+      SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
 
-MXNET_REGISTER_API("_npi.less")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.less").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_less");
-  const nnvm::Op* op_scalar = Op::Get("_npi_less_scalar");
+  const nnvm::Op* op         = Op::Get("_npi_less");
+  const nnvm::Op* op_scalar  = Op::Get("_npi_less_scalar");
   const nnvm::Op* op_rscalar = Op::Get("_npi_greater_scalar");
   SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
 });
 
 MXNET_REGISTER_API("_npi.greater_equal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_greater_equal");
-  const nnvm::Op* op_scalar = Op::Get("_npi_greater_equal_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_less_equal_scalar");
-  SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_greater_equal");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_greater_equal_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_less_equal_scalar");
+      SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
 
 MXNET_REGISTER_API("_npi.less_equal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_less_equal");
-  const nnvm::Op* op_scalar = Op::Get("_npi_less_equal_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_greater_equal_scalar");
-  SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_less_equal");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_less_equal_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_greater_equal_scalar");
+      SetUFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_elemwise_broadcast_op.cc b/src/api/operator/numpy/np_elemwise_broadcast_op.cc
index a411b067f1c0..184a4e241eff 100644
--- a/src/api/operator/numpy/np_elemwise_broadcast_op.cc
+++ b/src/api/operator/numpy/np_elemwise_broadcast_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,153 +28,146 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.add")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.add").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_add");
+  const nnvm::Op* op        = Op::Get("_npi_add");
   const nnvm::Op* op_scalar = Op::Get("_npi_add_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
 MXNET_REGISTER_API("_npi.subtract")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_subtract");
-  const nnvm::Op* op_scalar = Op::Get("_npi_subtract_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_rsubtract_scalar");
-  UFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_subtract");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_subtract_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_rsubtract_scalar");
+      UFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
 
 MXNET_REGISTER_API("_npi.multiply")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_multiply");
-  const nnvm::Op* op_scalar = Op::Get("_npi_multiply_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_multiply");
+      const nnvm::Op* op_scalar = Op::Get("_npi_multiply_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.true_divide")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_true_divide");
-  const nnvm::Op* op_scalar = Op::Get("_npi_true_divide_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_rtrue_divide_scalar");
-  UFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
-
-MXNET_REGISTER_API("_npi.mod")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_mod");
-  const nnvm::Op* op_scalar = Op::Get("_npi_mod_scalar");
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_true_divide");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_true_divide_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_rtrue_divide_scalar");
+      UFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
+
+MXNET_REGISTER_API("_npi.mod").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+  using namespace runtime;
+  const nnvm::Op* op         = Op::Get("_npi_mod");
+  const nnvm::Op* op_scalar  = Op::Get("_npi_mod_scalar");
   const nnvm::Op* op_rscalar = Op::Get("_npi_rmod_scalar");
   UFuncHelper(args, ret, op, op_scalar, op_rscalar);
 });
 
-MXNET_REGISTER_API("_npi.power")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.power").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_power");
-  const nnvm::Op* op_scalar = Op::Get("_npi_power_scalar");
+  const nnvm::Op* op         = Op::Get("_npi_power");
+  const nnvm::Op* op_scalar  = Op::Get("_npi_power_scalar");
   const nnvm::Op* op_rscalar = Op::Get("_npi_rpower_scalar");
   UFuncHelper(args, ret, op, op_scalar, op_rscalar);
 });
 
-MXNET_REGISTER_API("_npi.lcm")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.lcm").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_lcm");
+  const nnvm::Op* op        = Op::Get("_npi_lcm");
   const nnvm::Op* op_scalar = Op::Get("_npi_lcm_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
-MXNET_REGISTER_API("_npi.gcd")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.gcd").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_gcd");
+  const nnvm::Op* op        = Op::Get("_npi_gcd");
   const nnvm::Op* op_scalar = Op::Get("_npi_gcd_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
 MXNET_REGISTER_API("_npi.logical_and")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_logical_and");
-  const nnvm::Op* op_scalar = Op::Get("_npi_logical_and_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_logical_and");
+      const nnvm::Op* op_scalar = Op::Get("_npi_logical_and_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.logical_or")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_logical_or");
-  const nnvm::Op* op_scalar = Op::Get("_npi_logical_or_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_logical_or");
+      const nnvm::Op* op_scalar = Op::Get("_npi_logical_or_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.logical_xor")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_logical_xor");
-  const nnvm::Op* op_scalar = Op::Get("_npi_logical_xor_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_logical_xor");
+      const nnvm::Op* op_scalar = Op::Get("_npi_logical_xor_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.bitwise_or")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_bitwise_or");
-  const nnvm::Op* op_scalar = Op::Get("_npi_bitwise_or_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_bitwise_or");
+      const nnvm::Op* op_scalar = Op::Get("_npi_bitwise_or_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.bitwise_xor")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_bitwise_xor");
-  const nnvm::Op* op_scalar = Op::Get("_npi_bitwise_xor_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_bitwise_xor");
+      const nnvm::Op* op_scalar = Op::Get("_npi_bitwise_xor_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.bitwise_and")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_bitwise_and");
-  const nnvm::Op* op_scalar = Op::Get("_npi_bitwise_and_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_bitwise_and");
+      const nnvm::Op* op_scalar = Op::Get("_npi_bitwise_and_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.copysign")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_copysign");
-  const nnvm::Op* op_scalar = Op::Get("_npi_copysign_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_rcopysign_scalar");
-  UFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_copysign");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_copysign_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_rcopysign_scalar");
+      UFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
 
 MXNET_REGISTER_API("_npi.arctan2")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_arctan2");
-  const nnvm::Op* op_scalar = Op::Get("_npi_arctan2_scalar");
-  const nnvm::Op* op_rscalar = Op::Get("_npi_rarctan2_scalar");
-  UFuncHelper(args, ret, op, op_scalar, op_rscalar);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op         = Op::Get("_npi_arctan2");
+      const nnvm::Op* op_scalar  = Op::Get("_npi_arctan2_scalar");
+      const nnvm::Op* op_rscalar = Op::Get("_npi_rarctan2_scalar");
+      UFuncHelper(args, ret, op, op_scalar, op_rscalar);
+    });
 
-MXNET_REGISTER_API("_npi.hypot")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.hypot").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_hypot");
+  const nnvm::Op* op        = Op::Get("_npi_hypot");
   const nnvm::Op* op_scalar = Op::Get("_npi_hypot_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
-MXNET_REGISTER_API("_npi.ldexp")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.ldexp").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_ldexp");
-  const nnvm::Op* op_scalar = Op::Get("_npi_ldexp_scalar");
+  const nnvm::Op* op         = Op::Get("_npi_ldexp");
+  const nnvm::Op* op_scalar  = Op::Get("_npi_ldexp_scalar");
   const nnvm::Op* op_rscalar = Op::Get("_npi_rldexp_scalar");
   UFuncHelper(args, ret, op, op_scalar, op_rscalar);
 });
diff --git a/src/api/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc b/src/api/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
index 248af4dd6e3e..1367e0d28830 100644
--- a/src/api/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
+++ b/src/api/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -19,7 +19,8 @@
 
 /*!
  * \file np_elemwise_broadcast_op_extended_sec.cc
- * \brief Implementation of the API of functions in src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -28,27 +29,24 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.fmax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.fmax").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_fmax");
+  const nnvm::Op* op        = Op::Get("_npi_fmax");
   const nnvm::Op* op_scalar = Op::Get("_npi_fmax_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
-MXNET_REGISTER_API("_npi.fmin")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.fmin").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_fmin");
+  const nnvm::Op* op        = Op::Get("_npi_fmin");
   const nnvm::Op* op_scalar = Op::Get("_npi_fmin_scalar");
   UFuncHelper(args, ret, op, op_scalar, nullptr);
 });
 
-MXNET_REGISTER_API("_npi.fmod")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.fmod").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_fmod");
-  const nnvm::Op* op_scalar = Op::Get("_npi_fmod_scalar");
+  const nnvm::Op* op         = Op::Get("_npi_fmod");
+  const nnvm::Op* op_scalar  = Op::Get("_npi_fmod_scalar");
   const nnvm::Op* op_rscalar = Op::Get("_npi_rfmod_scalar");
   UFuncHelper(args, ret, op, op_scalar, op_rscalar);
 });
diff --git a/src/api/operator/numpy/np_elemwise_unary_op_basic.cc b/src/api/operator/numpy/np_elemwise_unary_op_basic.cc
index 7d2b4bb66eb0..be5afcfed2c0 100644
--- a/src/api/operator/numpy/np_elemwise_unary_op_basic.cc
+++ b/src/api/operator/numpy/np_elemwise_unary_op_basic.cc
@@ -29,12 +29,12 @@
 
 namespace mxnet {
 
-#define MXNET_REGISTER_UNARY_API(op_name)                                      \
-MXNET_REGISTER_API("_npi." #op_name)                                           \
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {           \
-  const nnvm::Op* op = Op::Get("_npi_" #op_name);                              \
-  UFuncHelper(args, ret, op);                                                  \
-})
+#define MXNET_REGISTER_UNARY_API(op_name)                                  \
+  MXNET_REGISTER_API("_npi." #op_name)                                     \
+      .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) { \
+        const nnvm::Op* op = Op::Get("_npi_" #op_name);                    \
+        UFuncHelper(args, ret, op);                                        \
+      })
 
 MXNET_REGISTER_UNARY_API(negative);
 MXNET_REGISTER_UNARY_API(reciprocal);
@@ -72,18 +72,18 @@ MXNET_REGISTER_UNARY_API(radians);
 #if MXNET_USE_TVM_OP
 MXNET_REGISTER_UNARY_API(rad2deg);  // from src/operator/contrib/tvmop/ufunc.cc
 MXNET_REGISTER_UNARY_API(deg2rad);  // from src/operator/contrib/tvmop/ufunc.cc
-#else  // MXNET_USE_TVM_OP
+#else                               // MXNET_USE_TVM_OP
 MXNET_REGISTER_API("_npi.rad2deg")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  const nnvm::Op* op = Op::Get("_npi_degrees");
-  UFuncHelper(args, ret, op);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      const nnvm::Op* op = Op::Get("_npi_degrees");
+      UFuncHelper(args, ret, op);
+    });
 MXNET_REGISTER_API("_npi.deg2rad")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  const nnvm::Op* op = Op::Get("_npi_radians");
-  UFuncHelper(args, ret, op);
-});
-#endif  // MXNET_USE_TVM_OP
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      const nnvm::Op* op = Op::Get("_npi_radians");
+      UFuncHelper(args, ret, op);
+    });
+#endif                              // MXNET_USE_TVM_OP
 MXNET_REGISTER_UNARY_API(sinh);
 MXNET_REGISTER_UNARY_API(cosh);
 MXNET_REGISTER_UNARY_API(tanh);
@@ -92,39 +92,38 @@ MXNET_REGISTER_UNARY_API(arccosh);
 MXNET_REGISTER_UNARY_API(arctanh);
 
 MXNET_REGISTER_API("_npi.around")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_around");
-  nnvm::NodeAttrs attrs;
-  op::AroundParam param;
-  param.decimals = args[1].operator int64_t();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::AroundParam>(&attrs);
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  NDArray* out = args[2].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(2);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_around");
+      nnvm::NodeAttrs attrs;
+      op::AroundParam param;
+      param.decimals = args[1].operator int64_t();
+      attrs.parsed   = param;
+      attrs.op       = op;
+      SetAttrDict<op::AroundParam>(&attrs);
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      NDArray* out      = args[2].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(2);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
-MXNET_REGISTER_API("_npi.copy")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.copy").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_copy");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
+  attrs.op          = op;
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_fill_diagonal_op.cc b/src/api/operator/numpy/np_fill_diagonal_op.cc
index f087e7d2e608..089d7cd95903 100644
--- a/src/api/operator/numpy/np_fill_diagonal_op.cc
+++ b/src/api/operator/numpy/np_fill_diagonal_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,37 +27,37 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.fill_diagonal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_fill_diagonal");
-  nnvm::NodeAttrs attrs;
-
-  op::NumpyFillDiagonalParam param;
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-
-  if (args[1].type_code() == kDLInt || args[1].type_code() == kDLUInt
-      || args[1].type_code() == kDLFloat || args[1].type_code() == kDLBfloat) {
-    param.val = Tuple<double>(1, args[1].operator double());
-  } else {
-    param.val = Obj2Tuple<double, Float>(args[1].operator ObjectRef());
-  }
-  param.wrap = args[2].operator bool();
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyFillDiagonalParam>(&attrs);
-
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  // set the number of outputs provided by the `out` arugment
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_fill_diagonal");
+      nnvm::NodeAttrs attrs;
+
+      op::NumpyFillDiagonalParam param;
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+
+      if (args[1].type_code() == kDLInt || args[1].type_code() == kDLUInt ||
+          args[1].type_code() == kDLFloat || args[1].type_code() == kDLBfloat) {
+        param.val = Tuple<double>(1, args[1].operator double());
+      } else {
+        param.val = Obj2Tuple<double, Float>(args[1].operator ObjectRef());
+      }
+      param.wrap = args[2].operator bool();
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyFillDiagonalParam>(&attrs);
+
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      // set the number of outputs provided by the `out` arugment
+      int num_outputs = out != nullptr;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_histogram_op.cc b/src/api/operator/numpy/np_histogram_op.cc
index fa911268e39b..daeb3c730ca6 100644
--- a/src/api/operator/numpy/np_histogram_op.cc
+++ b/src/api/operator/numpy/np_histogram_op.cc
@@ -30,52 +30,50 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.histogram")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npi_histogram");
-  op::HistogramParam param;
-  // parse bin_cnt
-  if (args[2].type_code() == kNull) {
-    param.bin_cnt = dmlc::nullopt;
-  } else {
-    param.bin_cnt = args[2].operator int();
-  }
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npi_histogram");
+      op::HistogramParam param;
+      // parse bin_cnt
+      if (args[2].type_code() == kNull) {
+        param.bin_cnt = dmlc::nullopt;
+      } else {
+        param.bin_cnt = args[2].operator int();
+      }
 
-  // parse range
-  if (args[3].type_code() == kNull) {
-    param.range = dmlc::nullopt;
-  } else {
-    param.range = Obj2Tuple<double, Float>(args[3].operator ObjectRef());
-  }
+      // parse range
+      if (args[3].type_code() == kNull) {
+        param.range = dmlc::nullopt;
+      } else {
+        param.range = Obj2Tuple<double, Float>(args[3].operator ObjectRef());
+      }
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::HistogramParam>(&attrs);
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::HistogramParam>(&attrs);
 
-  std::vector<NDArray*> inputs_vec;
-  int num_inputs = 0;
+      std::vector<NDArray*> inputs_vec;
+      int num_inputs = 0;
 
-  if (args[2].type_code() != kNull) {
-    CHECK_EQ(args[1].type_code(), kNull)
-      << "bins should be None when bin_cnt is provided";
-    inputs_vec.push_back((args[0].operator NDArray*()));
-    num_inputs = 1;
-  } else {
-    CHECK_NE(args[1].type_code(), kNull)
-      << "bins should not be None when bin_cnt is not provided";
-    // inputs
-    inputs_vec.push_back((args[0].operator NDArray*()));
-    inputs_vec.push_back((args[1].operator NDArray*()));
-    num_inputs = 2;
-  }
+      if (args[2].type_code() != kNull) {
+        CHECK_EQ(args[1].type_code(), kNull) << "bins should be None when bin_cnt is provided";
+        inputs_vec.push_back((args[0].operator NDArray*()));
+        num_inputs = 1;
+      } else {
+        CHECK_NE(args[1].type_code(), kNull)
+            << "bins should not be None when bin_cnt is not provided";
+        // inputs
+        inputs_vec.push_back((args[0].operator NDArray*()));
+        inputs_vec.push_back((args[1].operator NDArray*()));
+        num_inputs = 2;
+      }
 
-  // outputs
-  NDArray** out = nullptr;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs_vec.data(), &num_outputs, out);
-  *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                 NDArrayHandle(ndoutputs[1])});
-});
+      // outputs
+      NDArray** out   = nullptr;
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs_vec.data(), &num_outputs, out);
+      *ret            = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_init_op.cc b/src/api/operator/numpy/np_init_op.cc
index 0c617725fa47..46c41a142d53 100644
--- a/src/api/operator/numpy/np_init_op.cc
+++ b/src/api/operator/numpy/np_init_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -31,8 +31,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.zeros")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.zeros").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_zeros");
   nnvm::NodeAttrs attrs;
@@ -48,194 +47,192 @@ MXNET_REGISTER_API("_npi.zeros")
     param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::InitOpParam>(&attrs);
   if (args[2].type_code() != kNull) {
     attrs.dict["ctx"] = args[2].operator std::string();
   }
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+  *ret            = ndoutputs[0];
 });
 
 MXNET_REGISTER_API("_npi.full_like")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_full_like");
-  nnvm::NodeAttrs attrs;
-  op::FullLikeOpParam param;
-  param.fill_value = args[1].operator double();
-  if (args[2].type_code() == kNull) {
-    param.dtype = dmlc::nullopt;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[2].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  if (args[3].type_code() != kNull) {
-    attrs.dict["ctx"] = args[3].operator std::string();
-  }
-  SetAttrDict<op::FullLikeOpParam>(&attrs);
-  NDArray* out = args[4].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(4);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_full_like");
+      nnvm::NodeAttrs attrs;
+      op::FullLikeOpParam param;
+      param.fill_value = args[1].operator double();
+      if (args[2].type_code() == kNull) {
+        param.dtype = dmlc::nullopt;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[2].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      if (args[3].type_code() != kNull) {
+        attrs.dict["ctx"] = args[3].operator std::string();
+      }
+      SetAttrDict<op::FullLikeOpParam>(&attrs);
+      NDArray* out      = args[4].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(4);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 MXNET_REGISTER_API("_npi.indices")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_indices");
-  nnvm::NodeAttrs attrs;
-  op::IndicesOpParam param;
-  // param.dimensions
-  if (args[0].type_code() == kDLInt) {
-    param.dimensions = TShape(1, args[0].operator int64_t());
-  } else {
-    param.dimensions = TShape(args[0].operator ObjectRef());
-  }
-  // param.dtype
-  if (args[1].type_code() == kNull) {
-    param.dtype = -1;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::IndicesOpParam>(&attrs);
-  // param.ctx
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  int num_inputs = 0;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_indices");
+      nnvm::NodeAttrs attrs;
+      op::IndicesOpParam param;
+      // param.dimensions
+      if (args[0].type_code() == kDLInt) {
+        param.dimensions = TShape(1, args[0].operator int64_t());
+      } else {
+        param.dimensions = TShape(args[0].operator ObjectRef());
+      }
+      // param.dtype
+      if (args[1].type_code() == kNull) {
+        param.dtype = -1;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::IndicesOpParam>(&attrs);
+      // param.ctx
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      int num_inputs  = 0;
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, nullptr, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.atleast_1d")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_atleast_1d");
-  nnvm::NodeAttrs attrs;
-  op::AtleastNDParam param;
-  int args_size = args.size();
-  param.num_args = args_size;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::AtleastNDParam>(&attrs);
-  int num_inputs = args_size;
-  std::vector<NDArray*> inputs_vec(args_size, nullptr);
-  for (int i = 0; i < args_size; ++i) {
-    inputs_vec[i] = args[i].operator mxnet::NDArray*();
-  }
-  NDArray** inputs = inputs_vec.data();
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_atleast_1d");
+      nnvm::NodeAttrs attrs;
+      op::AtleastNDParam param;
+      int args_size  = args.size();
+      param.num_args = args_size;
+      attrs.parsed   = param;
+      attrs.op       = op;
+      SetAttrDict<op::AtleastNDParam>(&attrs);
+      int num_inputs = args_size;
+      std::vector<NDArray*> inputs_vec(args_size, nullptr);
+      for (int i = 0; i < args_size; ++i) {
+        inputs_vec[i] = args[i].operator mxnet::NDArray*();
+      }
+      NDArray** inputs = inputs_vec.data();
+      int num_outputs  = 0;
+      auto ndoutputs   = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.atleast_2d")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_atleast_2d");
-  nnvm::NodeAttrs attrs;
-  op::AtleastNDParam param;
-  int args_size = args.size();
-  param.num_args = args_size;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::AtleastNDParam>(&attrs);
-  int num_inputs = args_size;
-  std::vector<NDArray*> inputs_vec(args_size, nullptr);
-  for (int i = 0; i < args_size; ++i) {
-    inputs_vec[i] = args[i].operator mxnet::NDArray*();
-  }
-  NDArray** inputs = inputs_vec.data();
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_atleast_2d");
+      nnvm::NodeAttrs attrs;
+      op::AtleastNDParam param;
+      int args_size  = args.size();
+      param.num_args = args_size;
+      attrs.parsed   = param;
+      attrs.op       = op;
+      SetAttrDict<op::AtleastNDParam>(&attrs);
+      int num_inputs = args_size;
+      std::vector<NDArray*> inputs_vec(args_size, nullptr);
+      for (int i = 0; i < args_size; ++i) {
+        inputs_vec[i] = args[i].operator mxnet::NDArray*();
+      }
+      NDArray** inputs = inputs_vec.data();
+      int num_outputs  = 0;
+      auto ndoutputs   = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.atleast_3d")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_atleast_3d");
-  nnvm::NodeAttrs attrs;
-  op::AtleastNDParam param;
-  int args_size = args.size();
-  param.num_args = args_size;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::AtleastNDParam>(&attrs);
-  int num_inputs = args_size;
-  std::vector<NDArray*> inputs_vec(args_size, nullptr);
-  for (int i = 0; i < args_size; ++i) {
-    inputs_vec[i] = args[i].operator mxnet::NDArray*();
-  }
-  NDArray** inputs = inputs_vec.data();
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_atleast_3d");
+      nnvm::NodeAttrs attrs;
+      op::AtleastNDParam param;
+      int args_size  = args.size();
+      param.num_args = args_size;
+      attrs.parsed   = param;
+      attrs.op       = op;
+      SetAttrDict<op::AtleastNDParam>(&attrs);
+      int num_inputs = args_size;
+      std::vector<NDArray*> inputs_vec(args_size, nullptr);
+      for (int i = 0; i < args_size; ++i) {
+        inputs_vec[i] = args[i].operator mxnet::NDArray*();
+      }
+      NDArray** inputs = inputs_vec.data();
+      int num_outputs  = 0;
+      auto ndoutputs   = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.arange")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_arange");
-  nnvm::NodeAttrs attrs;
-  op::RangeParam param;
-  param.start = args[0].operator double();
-  if (args[1].type_code() == kNull) {
-    param.stop = dmlc::nullopt;
-  } else {
-    param.stop = args[1].operator double();
-  }
-  param.step = args[2].operator double();
-  param.repeat = 1;
-  param.infer_range = false;
-  if (args[3].type_code() == kNull) {
-    param.dtype = Imperative::Get()->is_np_default_dtype() ?
-                  mshadow::kInt64 :
-                  mshadow::kFloat32;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::RangeParam>(&attrs);
-  if (args[4].type_code() != kNull) {
-    attrs.dict["ctx"] = args[4].operator std::string();
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_arange");
+      nnvm::NodeAttrs attrs;
+      op::RangeParam param;
+      param.start = args[0].operator double();
+      if (args[1].type_code() == kNull) {
+        param.stop = dmlc::nullopt;
+      } else {
+        param.stop = args[1].operator double();
+      }
+      param.step        = args[2].operator double();
+      param.repeat      = 1;
+      param.infer_range = false;
+      if (args[3].type_code() == kNull) {
+        param.dtype =
+            Imperative::Get()->is_np_default_dtype() ? mshadow::kInt64 : mshadow::kFloat32;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::RangeParam>(&attrs);
+      if (args[4].type_code() != kNull) {
+        attrs.dict["ctx"] = args[4].operator std::string();
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
-MXNET_REGISTER_API("_npi.eye")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.eye").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_eye");
   nnvm::NodeAttrs attrs;
@@ -253,89 +250,88 @@ MXNET_REGISTER_API("_npi.eye")
     param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyEyeParam>(&attrs);
   if (args[3].type_code() != kNull) {
     attrs.dict["ctx"] = args[3].operator std::string();
   }
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+  *ret            = ndoutputs[0];
 });
 
 MXNET_REGISTER_API("_npi.linspace")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_linspace");
-  nnvm::NodeAttrs attrs;
-  op::LinspaceParam param;
-  param.start = args[0].operator double();
-  param.stop = args[1].operator double();
-  if (features::is_enabled(features::INT64_TENSOR_SIZE))
-    param.num = args[2].operator int64_t();
-  else
-    param.num = args[2].operator int();
-  if (args[3].type_code() == kNull) {
-    param.endpoint = true;
-  } else {
-    param.endpoint = args[3].operator bool();
-  }
-  if (args[5].type_code() == kNull) {
-    param.dtype = mxnet::common::GetDefaultDtype();
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[5].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::LinspaceParam>(&attrs);
-  if (args[4].type_code() != kNull) {
-    attrs.dict["ctx"] = args[4].operator std::string();
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_linspace");
+      nnvm::NodeAttrs attrs;
+      op::LinspaceParam param;
+      param.start = args[0].operator double();
+      param.stop  = args[1].operator double();
+      if (features::is_enabled(features::INT64_TENSOR_SIZE))
+        param.num = args[2].operator int64_t();
+      else
+        param.num = args[2].operator int();
+      if (args[3].type_code() == kNull) {
+        param.endpoint = true;
+      } else {
+        param.endpoint = args[3].operator bool();
+      }
+      if (args[5].type_code() == kNull) {
+        param.dtype = mxnet::common::GetDefaultDtype();
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[5].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::LinspaceParam>(&attrs);
+      if (args[4].type_code() != kNull) {
+        attrs.dict["ctx"] = args[4].operator std::string();
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.logspace")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_logspace");
-  nnvm::NodeAttrs attrs;
-  op::LogspaceParam param;
-  param.start = args[0].operator double();
-  param.stop = args[1].operator double();
-  if (features::is_enabled(features::INT64_TENSOR_SIZE))
-    param.num = args[2].operator int64_t();
-  else
-    param.num = args[2].operator int();
-  if (args[3].type_code() == kNull) {
-    param.endpoint = true;
-  } else {
-    param.endpoint = args[3].operator bool();
-  }
-  if (args[4].type_code() == kNull) {
-    param.base = 10.0;
-  } else {
-    param.base = args[4].operator double();
-  }
-  if (args[6].type_code() == kNull) {
-    param.dtype = mxnet::common::GetDefaultDtype();
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[6].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::LogspaceParam>(&attrs);
-  if (args[5].type_code() != kNull) {
-    attrs.dict["ctx"] = args[5].operator std::string();
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_logspace");
+      nnvm::NodeAttrs attrs;
+      op::LogspaceParam param;
+      param.start = args[0].operator double();
+      param.stop  = args[1].operator double();
+      if (features::is_enabled(features::INT64_TENSOR_SIZE))
+        param.num = args[2].operator int64_t();
+      else
+        param.num = args[2].operator int();
+      if (args[3].type_code() == kNull) {
+        param.endpoint = true;
+      } else {
+        param.endpoint = args[3].operator bool();
+      }
+      if (args[4].type_code() == kNull) {
+        param.base = 10.0;
+      } else {
+        param.base = args[4].operator double();
+      }
+      if (args[6].type_code() == kNull) {
+        param.dtype = mxnet::common::GetDefaultDtype();
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[6].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::LogspaceParam>(&attrs);
+      if (args[5].type_code() != kNull) {
+        attrs.dict["ctx"] = args[5].operator std::string();
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
-MXNET_REGISTER_API("_npi.ones")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.ones").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_ones");
   nnvm::NodeAttrs attrs;
@@ -351,18 +347,17 @@ MXNET_REGISTER_API("_npi.ones")
     param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   if (args[2].type_code() != kNull) {
     attrs.dict["ctx"] = args[2].operator std::string();
   }
   int num_outputs = 0;
   SetAttrDict<op::InitOpParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  *ret           = ndoutputs[0];
 });
 
-MXNET_REGISTER_API("_npi.full")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.full").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_full");
   nnvm::NodeAttrs attrs;
@@ -377,17 +372,17 @@ MXNET_REGISTER_API("_npi.full")
   } else {
     param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
   }
-  param.value = args[2].operator double();
+  param.value  = args[2].operator double();
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   if (args[3].type_code() != kNull) {
     attrs.dict["ctx"] = args[3].operator std::string();
   }
   SetAttrDict<op::InitOpWithScalarParam>(&attrs);
-  NDArray* out = args[4].operator mxnet::NDArray*();
+  NDArray* out      = args[4].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, 0, nullptr, &num_outputs, outputs);
   if (out) {
     *ret = PythonArg(4);
   } else {
@@ -396,26 +391,26 @@ MXNET_REGISTER_API("_npi.full")
 });
 
 MXNET_REGISTER_API("_npi.identity")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_identity");
-  nnvm::NodeAttrs attrs;
-  op::InitOpParam param;
-  param.shape = TShape(args[0].operator ObjectRef());
-  if (args[1].type_code() == kNull) {
-    param.dtype = mxnet::common::GetDefaultDtype();
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  int num_outputs = 0;
-  SetAttrDict<op::InitOpParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_identity");
+      nnvm::NodeAttrs attrs;
+      op::InitOpParam param;
+      param.shape = TShape(args[0].operator ObjectRef());
+      if (args[1].type_code() == kNull) {
+        param.dtype = mxnet::common::GetDefaultDtype();
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      int num_outputs = 0;
+      SetAttrDict<op::InitOpParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+      *ret           = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_insert_op.cc b/src/api/operator/numpy/np_insert_op.cc
index 4a5610fe46dd..2d6b7574ecb9 100644
--- a/src/api/operator/numpy/np_insert_op.cc
+++ b/src/api/operator/numpy/np_insert_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -33,131 +33,128 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.insert_scalar")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_insert_scalar");
-  nnvm::NodeAttrs attrs;
-  op::NumpyInsertParam param;
-  int num_inputs = 0;
-  param.start = dmlc::nullopt;
-  param.step = dmlc::nullopt;
-  param.stop = dmlc::nullopt;
-  if (args[1].type_code() == kDLInt ||
-      args[1].type_code() == kDLUInt ||
-      args[1].type_code() == kDLFloat) {
-    param.val = args[1].operator double();
-    num_inputs = 1;
-  } else {
-    param.val = dmlc::nullopt;
-    num_inputs = 2;
-  }
-  if (features::is_enabled(features::INT64_TENSOR_SIZE)) {
-    param.int_ind = args[2].operator int64_t();
-  } else {
-    param.int_ind = args[2].operator int();
-  }
-  if (args[3].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[3].operator int();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyInsertParam>(&attrs);
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_insert_scalar");
+      nnvm::NodeAttrs attrs;
+      op::NumpyInsertParam param;
+      int num_inputs = 0;
+      param.start    = dmlc::nullopt;
+      param.step     = dmlc::nullopt;
+      param.stop     = dmlc::nullopt;
+      if (args[1].type_code() == kDLInt || args[1].type_code() == kDLUInt ||
+          args[1].type_code() == kDLFloat) {
+        param.val  = args[1].operator double();
+        num_inputs = 1;
+      } else {
+        param.val  = dmlc::nullopt;
+        num_inputs = 2;
+      }
+      if (features::is_enabled(features::INT64_TENSOR_SIZE)) {
+        param.int_ind = args[2].operator int64_t();
+      } else {
+        param.int_ind = args[2].operator int();
+      }
+      if (args[3].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[3].operator int();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyInsertParam>(&attrs);
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.insert_slice")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_insert_slice");
-  nnvm::NodeAttrs attrs;
-  op::NumpyInsertParam param;
-  int num_inputs = 0;
-  if (args[1].type_code() == kDLInt ||
-      args[1].type_code() == kDLUInt ||
-      args[1].type_code() == kDLFloat) {
-    param.val = args[1].operator double();
-    num_inputs = 1;
-  } else {
-    param.val = dmlc::nullopt;
-    num_inputs = 2;
-  }
-  if (args[2].type_code() == kNull) {
-    param.start = dmlc::nullopt;
-  } else {
-    param.start = args[2].operator int64_t();
-  }
-  if (args[3].type_code() == kNull) {
-    param.stop = dmlc::nullopt;
-  } else {
-    param.stop = args[3].operator int64_t();
-  }
-  if (args[4].type_code() == kNull) {
-    param.step = dmlc::nullopt;
-  } else {
-    param.step = args[4].operator int64_t();
-  }
-  if (args[5].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[5].operator int();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyInsertParam>(&attrs);
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_insert_slice");
+      nnvm::NodeAttrs attrs;
+      op::NumpyInsertParam param;
+      int num_inputs = 0;
+      if (args[1].type_code() == kDLInt || args[1].type_code() == kDLUInt ||
+          args[1].type_code() == kDLFloat) {
+        param.val  = args[1].operator double();
+        num_inputs = 1;
+      } else {
+        param.val  = dmlc::nullopt;
+        num_inputs = 2;
+      }
+      if (args[2].type_code() == kNull) {
+        param.start = dmlc::nullopt;
+      } else {
+        param.start = args[2].operator int64_t();
+      }
+      if (args[3].type_code() == kNull) {
+        param.stop = dmlc::nullopt;
+      } else {
+        param.stop = args[3].operator int64_t();
+      }
+      if (args[4].type_code() == kNull) {
+        param.step = dmlc::nullopt;
+      } else {
+        param.step = args[4].operator int64_t();
+      }
+      if (args[5].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[5].operator int();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyInsertParam>(&attrs);
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.insert_tensor")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_insert_tensor");
-  nnvm::NodeAttrs attrs;
-  op::NumpyInsertParam param;
-  param.start = dmlc::nullopt;
-  param.step = dmlc::nullopt;
-  param.stop = dmlc::nullopt;
-  int num_inputs = 0;
-  if (args[2].type_code() == kDLInt ||
-      args[2].type_code() == kDLUInt ||
-      args[2].type_code() == kDLFloat) {
-    param.val = args[2].operator double();
-    num_inputs = 2;
-  } else {
-    param.val = dmlc::nullopt;
-    num_inputs = 3;
-  }
-  if (args[3].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[3].operator int();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyInsertParam>(&attrs);
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_insert_tensor");
+      nnvm::NodeAttrs attrs;
+      op::NumpyInsertParam param;
+      param.start    = dmlc::nullopt;
+      param.step     = dmlc::nullopt;
+      param.stop     = dmlc::nullopt;
+      int num_inputs = 0;
+      if (args[2].type_code() == kDLInt || args[2].type_code() == kDLUInt ||
+          args[2].type_code() == kDLFloat) {
+        param.val  = args[2].operator double();
+        num_inputs = 2;
+      } else {
+        param.val  = dmlc::nullopt;
+        num_inputs = 3;
+      }
+      if (args[3].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[3].operator int();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyInsertParam>(&attrs);
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_interp_op.cc b/src/api/operator/numpy/np_interp_op.cc
index 0b89373b1a88..c3682ded7314 100644
--- a/src/api/operator/numpy/np_interp_op.cc
+++ b/src/api/operator/numpy/np_interp_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,50 +29,52 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.interp")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_interp");
-  nnvm::NodeAttrs attrs;
-  op::NumpyInterpParam param;
-  if (args[3].type_code() == kNull) {
-    param.left = dmlc::nullopt;
-  } else {
-    param.left = args[3].operator double();
-  }
-  if (args[4].type_code() == kNull) {
-    param.right = dmlc::nullopt;
-  } else {
-    param.right = args[4].operator double();
-  }
-  if (args[5].type_code() == kNull) {
-    param.period = dmlc::nullopt;
-  } else {
-    param.period = args[5].operator double();
-  }
-  if (args[2].type_code() == kDLInt || args[2].type_code() == kDLFloat) {
-    param.x_scalar = args[2].operator double();
-    param.x_is_scalar = true;
-    attrs.op = op;
-    attrs.parsed = param;
-    SetAttrDict<op::NumpyInterpParam>(&attrs);
-    NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-    int num_inputs = 2;
-    int num_outputs = 0;
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  } else {
-    param.x_scalar = 0.0;
-    param.x_is_scalar = false;
-    attrs.op = op;
-    attrs.parsed = param;
-    SetAttrDict<op::NumpyInterpParam>(&attrs);
-    NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*(),
-                         args[2].operator mxnet::NDArray*()};
-    int num_inputs = 3;
-    int num_outputs = 0;
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_interp");
+      nnvm::NodeAttrs attrs;
+      op::NumpyInterpParam param;
+      if (args[3].type_code() == kNull) {
+        param.left = dmlc::nullopt;
+      } else {
+        param.left = args[3].operator double();
+      }
+      if (args[4].type_code() == kNull) {
+        param.right = dmlc::nullopt;
+      } else {
+        param.right = args[4].operator double();
+      }
+      if (args[5].type_code() == kNull) {
+        param.period = dmlc::nullopt;
+      } else {
+        param.period = args[5].operator double();
+      }
+      if (args[2].type_code() == kDLInt || args[2].type_code() == kDLFloat) {
+        param.x_scalar    = args[2].operator double();
+        param.x_is_scalar = true;
+        attrs.op          = op;
+        attrs.parsed      = param;
+        SetAttrDict<op::NumpyInterpParam>(&attrs);
+        NDArray* inputs[] = {args[0].operator mxnet::NDArray*(),
+                             args[1].operator mxnet::NDArray*()};
+        int num_inputs    = 2;
+        int num_outputs   = 0;
+        auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+        *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      } else {
+        param.x_scalar    = 0.0;
+        param.x_is_scalar = false;
+        attrs.op          = op;
+        attrs.parsed      = param;
+        SetAttrDict<op::NumpyInterpParam>(&attrs);
+        NDArray* inputs[] = {args[0].operator mxnet::NDArray*(),
+                             args[1].operator mxnet::NDArray*(),
+                             args[2].operator mxnet::NDArray*()};
+        int num_inputs    = 3;
+        int num_outputs   = 0;
+        auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+        *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_kron.cc b/src/api/operator/numpy/np_kron.cc
index 753798208b4f..0bc59eecebc3 100644
--- a/src/api/operator/numpy/np_kron.cc
+++ b/src/api/operator/numpy/np_kron.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,17 +28,16 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.kron")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.kron").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npi_kron");
-  attrs.op = op;
-  NDArray* inputs[] = {args[0].operator NDArray*(), args[1].operator NDArray*()};
-  int num_inputs = 2;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  attrs.op           = op;
+  NDArray* inputs[]  = {args[0].operator NDArray*(), args[1].operator NDArray*()};
+  int num_inputs     = 2;
+  int num_outputs    = 0;
+  auto ndoutputs     = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret               = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_matmul_op.cc b/src/api/operator/numpy/np_matmul_op.cc
index 48f4ec06fe83..d8b5250ed61a 100644
--- a/src/api/operator/numpy/np_matmul_op.cc
+++ b/src/api/operator/numpy/np_matmul_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,23 +29,22 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.matmul")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_matmul");
-  nnvm::NodeAttrs attrs;
-  int num_inputs = 2;
-  NDArray* inputs[2] = {args[0].operator mxnet::NDArray*(),
-                        args[1].operator mxnet::NDArray*()};
-  attrs.op = op;
-  NDArray* out = args[2].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(2);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_matmul");
+      nnvm::NodeAttrs attrs;
+      int num_inputs     = 2;
+      NDArray* inputs[2] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
+      attrs.op           = op;
+      NDArray* out       = args[2].operator mxnet::NDArray*();
+      NDArray** outputs  = out == nullptr ? nullptr : &out;
+      int num_outputs    = out != nullptr;
+      auto ndoutputs     = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(2);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_matrix_op.cc b/src/api/operator/numpy/np_matrix_op.cc
index 96f481db56ae..921dd5fbbc3d 100644
--- a/src/api/operator/numpy/np_matrix_op.cc
+++ b/src/api/operator/numpy/np_matrix_op.cc
@@ -32,56 +32,55 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.transpose")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_transpose");
-  nnvm::NodeAttrs attrs;
-  op::NumpyTransposeParam param;
-  if (args[1].type_code() == kNull) {
-    param.axes = TShape(-1, 0);
-  } else if (args[1].type_code() == kDLInt) {
-    param.axes = TShape(1, args[1].operator int64_t());
-  } else {
-    param.axes = TShape(args[1].operator ObjectRef());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyTransposeParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_transpose");
+      nnvm::NodeAttrs attrs;
+      op::NumpyTransposeParam param;
+      if (args[1].type_code() == kNull) {
+        param.axes = TShape(-1, 0);
+      } else if (args[1].type_code() == kDLInt) {
+        param.axes = TShape(1, args[1].operator int64_t());
+      } else {
+        param.axes = TShape(args[1].operator ObjectRef());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyTransposeParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.expand_dims")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_expand_dims");
-  nnvm::NodeAttrs attrs;
-  op::ExpandDimParam param;
-  param.axis = args[1].operator int();
-
-  // we directly copy ExpandDimParam, which is trivially-copyable
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ExpandDimParam>(&attrs);
-
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
-
-MXNET_REGISTER_API("_npi.stack")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_expand_dims");
+      nnvm::NodeAttrs attrs;
+      op::ExpandDimParam param;
+      param.axis = args[1].operator int();
+
+      // we directly copy ExpandDimParam, which is trivially-copyable
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::ExpandDimParam>(&attrs);
+
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
+
+MXNET_REGISTER_API("_npi.stack").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_stack");
   nnvm::NodeAttrs attrs;
   op::StackParam param;
 
-  int i = 0;
+  int i          = 0;
   int num_inputs = 0;
   std::vector<NDArray*> inputs;
   while (args[i].type_code() != kDLInt) {
@@ -91,32 +90,30 @@ MXNET_REGISTER_API("_npi.stack")
   }
 
   param.num_args = i;
-  param.axis = args[i].operator int64_t();
-  attrs.parsed = param;
-  attrs.op = op;
+  param.axis     = args[i].operator int64_t();
+  attrs.parsed   = param;
+  attrs.op       = op;
   SetAttrDict<op::StackParam>(&attrs);
-  NDArray* out = args[i+1].operator mxnet::NDArray*();
+  NDArray* out      = args[i + 1].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(),
-                          &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
   if (out) {
-    *ret = PythonArg(i+1);
+    *ret = PythonArg(i + 1);
   } else {
     *ret = ndoutputs[0];
   }
 });
 
-MXNET_REGISTER_API("_npi.flip")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.flip").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_flip");
   nnvm::NodeAttrs attrs;
   op::FlipParam param;
 
-  NDArray* out = args[2].operator mxnet::NDArray*();
+  NDArray* out      = args[2].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
+  int num_outputs   = out != nullptr;
   if (args[1].type_code() == kNull) {
     param.axis = mxnet::Tuple<int>(-1, dim_t(0));
   } else if (args[1].type_code() == kDLInt) {
@@ -125,9 +122,9 @@ MXNET_REGISTER_API("_npi.flip")
     param.axis = Tuple<int>(args[1].operator ObjectRef());
   }
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_inputs    = 1;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::FlipParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
@@ -138,85 +135,82 @@ MXNET_REGISTER_API("_npi.flip")
 });
 
 MXNET_REGISTER_API("_npi.concatenate")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_concatenate");
-  nnvm::NodeAttrs attrs;
-  op::NumpyConcatenateParam param;
-  int arg_size = args.num_args;
-  param.num_args = arg_size - 2;
-  if (args[arg_size - 2].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[arg_size - 2].operator int();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyConcatenateParam>(&attrs);
-  int num_inputs = arg_size - 2;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  NDArray* out = args[arg_size - 1].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(arg_size - 1);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_concatenate");
+      nnvm::NodeAttrs attrs;
+      op::NumpyConcatenateParam param;
+      int arg_size   = args.num_args;
+      param.num_args = arg_size - 2;
+      if (args[arg_size - 2].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[arg_size - 2].operator int();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyConcatenateParam>(&attrs);
+      int num_inputs = arg_size - 2;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      NDArray* out      = args[arg_size - 1].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(arg_size - 1);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 MXNET_REGISTER_API("_npi.dstack")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_dstack");
-  nnvm::NodeAttrs attrs;
-  op::ConcatParam param;
-  int args_size = args.size();
-  // param.num_args
-  param.num_args = args_size;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ConcatParam>(&attrs);
-  // inputs
-  int num_inputs = args_size;
-  std::vector<NDArray*> inputs_vec(args_size, nullptr);
-  for (int i = 0; i < args_size; ++i) {
-    inputs_vec[i] = args[i].operator mxnet::NDArray*();
-  }
-  NDArray** inputs = inputs_vec.data();
-  // outputs
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
-
-MXNET_REGISTER_API("_npi.split")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_dstack");
+      nnvm::NodeAttrs attrs;
+      op::ConcatParam param;
+      int args_size = args.size();
+      // param.num_args
+      param.num_args = args_size;
+      attrs.parsed   = param;
+      attrs.op       = op;
+      SetAttrDict<op::ConcatParam>(&attrs);
+      // inputs
+      int num_inputs = args_size;
+      std::vector<NDArray*> inputs_vec(args_size, nullptr);
+      for (int i = 0; i < args_size; ++i) {
+        inputs_vec[i] = args[i].operator mxnet::NDArray*();
+      }
+      NDArray** inputs = inputs_vec.data();
+      // outputs
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
+
+MXNET_REGISTER_API("_npi.split").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_split");
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+  int num_inputs     = 1;
+  NDArray* inputs[]  = {args[0].operator mxnet::NDArray*()};
   nnvm::NodeAttrs attrs;
   op::SplitParam param;
-  param.axis = args[2].operator int();
+  param.axis         = args[2].operator int();
   param.squeeze_axis = false;
   if (args[1].type_code() == kDLInt) {
-    param.indices = TShape(0, 0);
+    param.indices  = TShape(0, 0);
     param.sections = args[1].operator int();
-    int index = param.axis >= 0 ? param.axis :
-                                  param.axis + inputs[0]->shape().ndim();
+    int index      = param.axis >= 0 ? param.axis : param.axis + inputs[0]->shape().ndim();
     CHECK_GE(index, 0) << "IndexError: tuple index out of range";
-    CHECK_GT(param.sections, 0)
-      << "ValueError: number sections must be larger than 0";
+    CHECK_GT(param.sections, 0) << "ValueError: number sections must be larger than 0";
     CHECK_EQ(inputs[0]->shape()[index] % param.sections, 0)
-      << "ValueError: array split does not result in an equal division";
+        << "ValueError: array split does not result in an equal division";
   } else {
-    TShape t = TShape(args[1].operator ObjectRef());
+    TShape t      = TShape(args[1].operator ObjectRef());
     param.indices = TShape(t.ndim() + 1, 0);
     for (int i = 0; i < t.ndim(); ++i) {
       param.indices[i + 1] = t[i];
@@ -224,11 +218,11 @@ MXNET_REGISTER_API("_npi.split")
     param.sections = 0;
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::SplitParam>(&attrs);
 
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
   std::vector<NDArrayHandle> ndarray_handles;
   ndarray_handles.reserve(num_outputs);
   for (int i = 0; i < num_outputs; ++i) {
@@ -237,8 +231,7 @@ MXNET_REGISTER_API("_npi.split")
   *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
 });
 
-MXNET_REGISTER_API("_npi.roll")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.roll").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   static const nnvm::Op* op = Op::Get("_npi_roll");
   nnvm::NodeAttrs attrs;
@@ -258,17 +251,16 @@ MXNET_REGISTER_API("_npi.roll")
     param.axis = TShape(args[2].operator ObjectRef());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyRollParam>(&attrs);
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
-MXNET_REGISTER_API("_npi.rot90")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.rot90").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   static const nnvm::Op* op = Op::Get("_npi_rot90");
   nnvm::NodeAttrs attrs;
@@ -282,213 +274,208 @@ MXNET_REGISTER_API("_npi.rot90")
     param.axes = TShape(args[2].operator ObjectRef());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyRot90Param>(&attrs);
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
 MXNET_REGISTER_API("_npi.column_stack")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_column_stack");
-  nnvm::NodeAttrs attrs;
-  op::NumpyColumnStackParam param;
-  param.num_args = args.size();
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyColumnStackParam>(&attrs);
-  int num_outputs = 0;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(param.num_args);
-  for (int i = 0; i < param.num_args; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  auto ndoutputs = Invoke(op, &attrs, param.num_args, &inputs[0], &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_column_stack");
+      nnvm::NodeAttrs attrs;
+      op::NumpyColumnStackParam param;
+      param.num_args = args.size();
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyColumnStackParam>(&attrs);
+      int num_outputs = 0;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(param.num_args);
+      for (int i = 0; i < param.num_args; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      auto ndoutputs = Invoke(op, &attrs, param.num_args, &inputs[0], &num_outputs, nullptr);
+      *ret           = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.hstack")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_hstack");
-  nnvm::NodeAttrs attrs;
-  op::ConcatParam param;
-  param.num_args = args.size();
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ConcatParam>(&attrs);
-  int num_outputs = 0;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(param.num_args);
-  for (int i = 0; i < param.num_args; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  auto ndoutputs = Invoke(op, &attrs, param.num_args, &inputs[0], &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_hstack");
+      nnvm::NodeAttrs attrs;
+      op::ConcatParam param;
+      param.num_args = args.size();
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::ConcatParam>(&attrs);
+      int num_outputs = 0;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(param.num_args);
+      for (int i = 0; i < param.num_args; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      auto ndoutputs = Invoke(op, &attrs, param.num_args, &inputs[0], &num_outputs, nullptr);
+      *ret           = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.array_split")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_array_split");
-  nnvm::NodeAttrs attrs;
-  op::SplitParam param;
-  param.axis = args[2].operator int();
-  param.squeeze_axis = false;
-  if (args[1].type_code() == kDLInt) {
-    param.indices = TShape(0, 0);
-    param.sections = args[1].operator int();
-    CHECK_GT(param.sections, 0)
-      << "ValueError: number sections must be larger than 0";
-  } else {
-    TShape t = TShape(args[1].operator ObjectRef());
-    param.indices = TShape(t.ndim() + 1, 0);
-    for (int i = 0; i < t.ndim(); ++i) {
-      param.indices[i + 1] = t[i];
-    }
-    param.sections = 0;
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SplitParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_array_split");
+      nnvm::NodeAttrs attrs;
+      op::SplitParam param;
+      param.axis         = args[2].operator int();
+      param.squeeze_axis = false;
+      if (args[1].type_code() == kDLInt) {
+        param.indices  = TShape(0, 0);
+        param.sections = args[1].operator int();
+        CHECK_GT(param.sections, 0) << "ValueError: number sections must be larger than 0";
+      } else {
+        TShape t      = TShape(args[1].operator ObjectRef());
+        param.indices = TShape(t.ndim() + 1, 0);
+        for (int i = 0; i < t.ndim(); ++i) {
+          param.indices[i + 1] = t[i];
+        }
+        param.sections = 0;
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::SplitParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.dsplit")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_split");
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  CHECK_GE(inputs[0]->shape().ndim(), 3)
-      << "ValueError: dsplit only works on arrays of 3 or more dimensions";
-  nnvm::NodeAttrs attrs;
-  op::SplitParam param;
-  param.axis = 2;
-  param.squeeze_axis = false;
-  if (args[1].type_code() == kDLInt) {
-    param.indices = TShape(0, 0);
-    param.sections = args[1].operator int();
-    CHECK_EQ(inputs[0]->shape()[2] % param.sections, 0)
-      << "ValueError: array split does not result in an equal division";
-    CHECK_GT(param.sections, 0)
-      << "ValueError: number sections must be larger than 0";
-  } else {
-    TShape t = TShape(args[1].operator ObjectRef());
-    param.indices = TShape(t.ndim() + 1, 0);
-    for (int i = 0; i < t.ndim(); ++i) {
-      param.indices[i + 1] = t[i];
-    }
-    param.sections = 0;
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SplitParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_split");
+      int num_inputs            = 1;
+      NDArray* inputs[]         = {args[0].operator mxnet::NDArray*()};
+      CHECK_GE(inputs[0]->shape().ndim(), 3)
+          << "ValueError: dsplit only works on arrays of 3 or more dimensions";
+      nnvm::NodeAttrs attrs;
+      op::SplitParam param;
+      param.axis         = 2;
+      param.squeeze_axis = false;
+      if (args[1].type_code() == kDLInt) {
+        param.indices  = TShape(0, 0);
+        param.sections = args[1].operator int();
+        CHECK_EQ(inputs[0]->shape()[2] % param.sections, 0)
+            << "ValueError: array split does not result in an equal division";
+        CHECK_GT(param.sections, 0) << "ValueError: number sections must be larger than 0";
+      } else {
+        TShape t      = TShape(args[1].operator ObjectRef());
+        param.indices = TShape(t.ndim() + 1, 0);
+        for (int i = 0; i < t.ndim(); ++i) {
+          param.indices[i + 1] = t[i];
+        }
+        param.sections = 0;
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::SplitParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.hsplit")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_hsplit");
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  CHECK_GE(inputs[0]->shape().ndim(), 1)
-    << "ValueError: hsplit only works on arrays of 1 or more dimensions";
-  nnvm::NodeAttrs attrs;
-  op::SplitParam param;
-  param.axis = 0;
-  param.squeeze_axis = false;
-  if (args[1].type_code() == kDLInt) {
-    param.indices = TShape(0, 0);
-    param.sections = args[1].operator int();
-    CHECK_GT(param.sections, 0)
-      << "ValueError: number sections must be larger than 0";
-  } else {
-    TShape t = TShape(args[1].operator ObjectRef());
-    param.indices = TShape(t.ndim() + 1, 0);
-    for (int i = 0; i < t.ndim(); ++i) {
-      param.indices[i + 1] = t[i];
-    }
-    param.sections = 0;
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SplitParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_hsplit");
+      int num_inputs            = 1;
+      NDArray* inputs[]         = {args[0].operator mxnet::NDArray*()};
+      CHECK_GE(inputs[0]->shape().ndim(), 1)
+          << "ValueError: hsplit only works on arrays of 1 or more dimensions";
+      nnvm::NodeAttrs attrs;
+      op::SplitParam param;
+      param.axis         = 0;
+      param.squeeze_axis = false;
+      if (args[1].type_code() == kDLInt) {
+        param.indices  = TShape(0, 0);
+        param.sections = args[1].operator int();
+        CHECK_GT(param.sections, 0) << "ValueError: number sections must be larger than 0";
+      } else {
+        TShape t      = TShape(args[1].operator ObjectRef());
+        param.indices = TShape(t.ndim() + 1, 0);
+        for (int i = 0; i < t.ndim(); ++i) {
+          param.indices[i + 1] = t[i];
+        }
+        param.sections = 0;
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::SplitParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.vsplit")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  static const nnvm::Op* op = Op::Get("_npi_split");
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  CHECK_GE(inputs[0]->shape().ndim(), 2)
-      << "ValueError: vsplit only works on arrays of 2 or more dimensions";
-  nnvm::NodeAttrs attrs;
-  op::SplitParam param;
-  param.axis = 0;
-  param.squeeze_axis = false;
-  if (args[1].type_code() == kDLInt) {
-    param.indices = TShape(0, 0);
-    param.sections = args[1].operator int();
-    CHECK_EQ(inputs[0]->shape()[0] % param.sections, 0)
-      << "ValueError: array split does not result in an equal division";
-    CHECK_GT(param.sections, 0)
-      << "ValueError: number sections must be larger than 0";
-  } else {
-    TShape t = TShape(args[1].operator ObjectRef());
-    param.indices = TShape(t.ndim() + 1, 0);
-    for (int i = 0; i < t.ndim(); ++i) {
-      param.indices[i + 1] = t[i];
-    }
-    param.sections = 0;
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SplitParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
-
-MXNET_REGISTER_API("_npi.diag")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      static const nnvm::Op* op = Op::Get("_npi_split");
+      int num_inputs            = 1;
+      NDArray* inputs[]         = {args[0].operator mxnet::NDArray*()};
+      CHECK_GE(inputs[0]->shape().ndim(), 2)
+          << "ValueError: vsplit only works on arrays of 2 or more dimensions";
+      nnvm::NodeAttrs attrs;
+      op::SplitParam param;
+      param.axis         = 0;
+      param.squeeze_axis = false;
+      if (args[1].type_code() == kDLInt) {
+        param.indices  = TShape(0, 0);
+        param.sections = args[1].operator int();
+        CHECK_EQ(inputs[0]->shape()[0] % param.sections, 0)
+            << "ValueError: array split does not result in an equal division";
+        CHECK_GT(param.sections, 0) << "ValueError: number sections must be larger than 0";
+      } else {
+        TShape t      = TShape(args[1].operator ObjectRef());
+        param.indices = TShape(t.ndim() + 1, 0);
+        for (int i = 0; i < t.ndim(); ++i) {
+          param.indices[i + 1] = t[i];
+        }
+        param.sections = 0;
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::SplitParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
+
+MXNET_REGISTER_API("_npi.diag").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_diag");
   nnvm::NodeAttrs attrs;
@@ -498,211 +485,211 @@ MXNET_REGISTER_API("_npi.diag")
   else
     param.k = args[1].operator int();
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyDiagParam>(&attrs);
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  int num_outputs   = 0;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
 MXNET_REGISTER_API("_npi.rollaxis")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_rollaxis");
-  nnvm::NodeAttrs attrs;
-  op::NumpyRollaxisParam param;
-  param.axis = args[1].operator int();
-  param.start = args[2].operator int();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyRollaxisParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_rollaxis");
+      nnvm::NodeAttrs attrs;
+      op::NumpyRollaxisParam param;
+      param.axis   = args[1].operator int();
+      param.start  = args[2].operator int();
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyRollaxisParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.reshape")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_reshape");
-  nnvm::NodeAttrs attrs;
-  op::NumpyXReshapeParam param;
-  if (args[1].type_code() == kNull) {
-    param.newshape = TShape(-1, 0);
-  } else if (args[1].type_code() == kDLInt) {
-    param.newshape = TShape(1, args[1].operator int64_t());
-  } else {
-    param.newshape = TShape(args[1].operator ObjectRef());
-  }
-  param.reverse = args[2].operator bool();
-  param.order = args[3].operator std::string();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyXReshapeParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_reshape");
+      nnvm::NodeAttrs attrs;
+      op::NumpyXReshapeParam param;
+      if (args[1].type_code() == kNull) {
+        param.newshape = TShape(-1, 0);
+      } else if (args[1].type_code() == kDLInt) {
+        param.newshape = TShape(1, args[1].operator int64_t());
+      } else {
+        param.newshape = TShape(args[1].operator ObjectRef());
+      }
+      param.reverse = args[2].operator bool();
+      param.order   = args[3].operator std::string();
+      attrs.parsed  = param;
+      attrs.op      = op;
+      SetAttrDict<op::NumpyXReshapeParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.moveaxis")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_moveaxis");
-  nnvm::NodeAttrs attrs;
-  op::NumpyMoveaxisParam param;
-  if (args[1].type_code() == kNull) {
-    param.source = TShape(-1, 0);
-  } else if (args[1].type_code() == kDLInt) {
-    param.source = TShape(1, args[1].operator int64_t());
-  } else {
-    param.source = TShape(args[1].operator ObjectRef());
-  }
-  if (args[2].type_code() == kNull) {
-    param.destination = TShape(-1, 0);
-  } else if (args[2].type_code() == kDLInt) {
-    param.destination = TShape(1, args[2].operator int64_t());
-  } else {
-    param.destination = TShape(args[2].operator ObjectRef());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyMoveaxisParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_moveaxis");
+      nnvm::NodeAttrs attrs;
+      op::NumpyMoveaxisParam param;
+      if (args[1].type_code() == kNull) {
+        param.source = TShape(-1, 0);
+      } else if (args[1].type_code() == kDLInt) {
+        param.source = TShape(1, args[1].operator int64_t());
+      } else {
+        param.source = TShape(args[1].operator ObjectRef());
+      }
+      if (args[2].type_code() == kNull) {
+        param.destination = TShape(-1, 0);
+      } else if (args[2].type_code() == kDLInt) {
+        param.destination = TShape(1, args[2].operator int64_t());
+      } else {
+        param.destination = TShape(args[2].operator ObjectRef());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyMoveaxisParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.diagonal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_diagonal");
-  nnvm::NodeAttrs attrs;
-  op::NumpyDiagonalParam param;
-  if (features::is_enabled(features::INT64_TENSOR_SIZE))
-    param.offset = args[1].operator int64_t();
-  else
-    param.offset = args[1].operator int();
-  param.axis1 = args[2].operator int();
-  param.axis2 = args[3].operator int();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyDiagonalParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_diagonal");
+      nnvm::NodeAttrs attrs;
+      op::NumpyDiagonalParam param;
+      if (features::is_enabled(features::INT64_TENSOR_SIZE))
+        param.offset = args[1].operator int64_t();
+      else
+        param.offset = args[1].operator int();
+      param.axis1  = args[2].operator int();
+      param.axis2  = args[3].operator int();
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyDiagonalParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.diag_indices_from")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_diag_indices_from");
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_diag_indices_from");
+      nnvm::NodeAttrs attrs;
+      attrs.op          = op;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.diagflat")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_diagflat");
-  nnvm::NodeAttrs attrs;
-  op::NumpyDiagflatParam param;
-  param.k = args[1].operator int();
-  int num_inputs = 1;
-  int num_outputs = 0;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyDiagflatParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_diagflat");
+      nnvm::NodeAttrs attrs;
+      op::NumpyDiagflatParam param;
+      param.k         = args[1].operator int();
+      int num_inputs  = 1;
+      int num_outputs = 0;
+      attrs.parsed    = param;
+      attrs.op        = op;
+      SetAttrDict<op::NumpyDiagflatParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.squeeze")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_squeeze");
-  nnvm::NodeAttrs attrs;
-  op::SqueezeParam param;
-  if (args[1].type_code() == kNull) {
-    param.axis = dmlc::optional<mxnet::Tuple<int>>();
-  } else if (args[1].type_code() == kDLInt) {
-    param.axis = Tuple<int>(1, args[1].operator int64_t());
-  } else {
-    param.axis = Tuple<int>(args[1].operator ObjectRef());
-  }
-  int num_inputs = 1;
-  int num_outputs = 0;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SqueezeParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_squeeze");
+      nnvm::NodeAttrs attrs;
+      op::SqueezeParam param;
+      if (args[1].type_code() == kNull) {
+        param.axis = dmlc::optional<mxnet::Tuple<int>>();
+      } else if (args[1].type_code() == kDLInt) {
+        param.axis = Tuple<int>(1, args[1].operator int64_t());
+      } else {
+        param.axis = Tuple<int>(args[1].operator ObjectRef());
+      }
+      int num_inputs  = 1;
+      int num_outputs = 0;
+      attrs.parsed    = param;
+      attrs.op        = op;
+      SetAttrDict<op::SqueezeParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npi.tril_indices")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_tril_indices");
-  nnvm::NodeAttrs attrs;
-  op::NumpyTrilindicesParam param;
-  if (features::is_enabled(features::INT64_TENSOR_SIZE)) {
-    param.n = args[0].operator int64_t();
-    param.k = args[1].operator int64_t();
-    param.m = args[2].operator int64_t();
-  } else {
-    param.n = args[0].operator int();
-    param.k = args[1].operator int();
-    param.m = args[2].operator int();
-  }
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyTrilindicesParam>(&attrs);
-
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_tril_indices");
+      nnvm::NodeAttrs attrs;
+      op::NumpyTrilindicesParam param;
+      if (features::is_enabled(features::INT64_TENSOR_SIZE)) {
+        param.n = args[0].operator int64_t();
+        param.k = args[1].operator int64_t();
+        param.m = args[2].operator int64_t();
+      } else {
+        param.n = args[0].operator int();
+        param.k = args[1].operator int();
+        param.m = args[2].operator int();
+      }
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyTrilindicesParam>(&attrs);
+
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 MXNET_REGISTER_API("_npi.vstack")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_vstack");
-  nnvm::NodeAttrs attrs;
-  op::NumpyVstackParam param;
-  param.num_args = args.size();
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyVstackParam>(&attrs);
-  int num_outputs = 0;
-  std::vector<NDArray*> inputs_vec(args.size(), nullptr);
-  for (int i = 0; i < args.size(); ++i) {
-    inputs_vec[i] = args[i].operator mxnet::NDArray*();
-  }
-  NDArray** inputs = inputs_vec.data();
-  auto ndoutputs = Invoke(op, &attrs, param.num_args, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_vstack");
+      nnvm::NodeAttrs attrs;
+      op::NumpyVstackParam param;
+      param.num_args = args.size();
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyVstackParam>(&attrs);
+      int num_outputs = 0;
+      std::vector<NDArray*> inputs_vec(args.size(), nullptr);
+      for (int i = 0; i < args.size(); ++i) {
+        inputs_vec[i] = args[i].operator mxnet::NDArray*();
+      }
+      NDArray** inputs = inputs_vec.data();
+      auto ndoutputs   = Invoke(op, &attrs, param.num_args, inputs, &num_outputs, nullptr);
+      *ret             = ndoutputs[0];
+    });
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_memory_op.cc b/src/api/operator/numpy/np_memory_op.cc
index 33e5d4cfb7d8..d13cb3d38980 100644
--- a/src/api/operator/numpy/np_memory_op.cc
+++ b/src/api/operator/numpy/np_memory_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,16 +28,16 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.share_memory")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_share_memory");
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 2;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_share_memory");
+      nnvm::NodeAttrs attrs;
+      attrs.op          = op;
+      int num_inputs    = 2;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_moments_op.cc b/src/api/operator/numpy/np_moments_op.cc
index 45dd45e8f4c9..5cb0cfaf6531 100644
--- a/src/api/operator/numpy/np_moments_op.cc
+++ b/src/api/operator/numpy/np_moments_op.cc
@@ -29,8 +29,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.std")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.std").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_std");
   op::NumpyMomentsParam param;
@@ -70,12 +69,12 @@ MXNET_REGISTER_API("_npi.std")
   SetAttrDict<op::NumpyMomentsParam>(&attrs);
 
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
+  int num_inputs    = 1;
 
   NDArray* outputs[] = {args[5].operator NDArray*()};
-  NDArray** out = (outputs[0] == nullptr) ? nullptr : outputs;
-  int num_outputs = (outputs[0] != nullptr);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
+  NDArray** out      = (outputs[0] == nullptr) ? nullptr : outputs;
+  int num_outputs    = (outputs[0] != nullptr);
+  auto ndoutputs     = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
 
   if (out) {
     *ret = PythonArg(5);
@@ -84,8 +83,7 @@ MXNET_REGISTER_API("_npi.std")
   }
 });
 
-MXNET_REGISTER_API("_npi.var")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.var").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_var");
   op::NumpyMomentsParam param;
@@ -125,12 +123,12 @@ MXNET_REGISTER_API("_npi.var")
   SetAttrDict<op::NumpyMomentsParam>(&attrs);
 
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
+  int num_inputs    = 1;
 
   NDArray* outputs[] = {args[5].operator NDArray*()};
-  NDArray** out = (outputs[0] == nullptr) ? nullptr : outputs;
-  int num_outputs = (outputs[0] != nullptr);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
+  NDArray** out      = (outputs[0] == nullptr) ? nullptr : outputs;
+  int num_outputs    = (outputs[0] != nullptr);
+  auto ndoutputs     = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
 
   if (out) {
     *ret = PythonArg(5);
@@ -140,70 +138,66 @@ MXNET_REGISTER_API("_npi.var")
 });
 
 MXNET_REGISTER_API("_npi.average")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_average");
-  op::NumpyWeightedAverageParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-
-  // parse axis
-  if (args[2].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    if (args[2].type_code() == kDLInt) {
-      param.axis = Tuple<int>(1, args[2].operator int64_t());
-    } else {
-      param.axis = Tuple<int>(args[2].operator ObjectRef());
-    }
-  }
-
-  // parse returned
-  CHECK_NE(args[3].type_code(), kNull)
-    << "returned cannot be None";
-  param.returned = args[3].operator bool();
-
-  // parse weighted
-  CHECK_NE(args[4].type_code(), kNull)
-    << "weighted cannot be None";
-  param.weighted = args[4].operator bool();
-
-  attrs.parsed = param;
-
-  SetAttrDict<op::NumpyWeightedAverageParam>(&attrs);
-
-  int num_inputs = param.weighted ? 2 : 1;
-  NDArray* outputs[] = {args[5].operator NDArray*()};
-  NDArray** out = (outputs[0] == nullptr) ? nullptr : outputs;
-  int num_outputs = (outputs[0] != nullptr);
-
-  if (param.weighted) {
-    NDArray* inputs[] = {args[0].operator NDArray*(), args[1].operator NDArray*()};
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
-    if (out) {
-      *ret = PythonArg(5);
-    } else {
-      if (param.returned) {
-        *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                       NDArrayHandle(ndoutputs[1])});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_average");
+      op::NumpyWeightedAverageParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+
+      // parse axis
+      if (args[2].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
       } else {
-        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+        if (args[2].type_code() == kDLInt) {
+          param.axis = Tuple<int>(1, args[2].operator int64_t());
+        } else {
+          param.axis = Tuple<int>(args[2].operator ObjectRef());
+        }
       }
-    }
-  } else {
-    NDArray* inputs[] = {args[0].operator NDArray*()};
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
-    if (out) {
-      *ret = PythonArg(5);
-    } else {
-      if (param.returned) {
-        *ret = ADT(0, {NDArrayHandle(ndoutputs[0]),
-                       NDArrayHandle(ndoutputs[1])});
+
+      // parse returned
+      CHECK_NE(args[3].type_code(), kNull) << "returned cannot be None";
+      param.returned = args[3].operator bool();
+
+      // parse weighted
+      CHECK_NE(args[4].type_code(), kNull) << "weighted cannot be None";
+      param.weighted = args[4].operator bool();
+
+      attrs.parsed = param;
+
+      SetAttrDict<op::NumpyWeightedAverageParam>(&attrs);
+
+      int num_inputs     = param.weighted ? 2 : 1;
+      NDArray* outputs[] = {args[5].operator NDArray*()};
+      NDArray** out      = (outputs[0] == nullptr) ? nullptr : outputs;
+      int num_outputs    = (outputs[0] != nullptr);
+
+      if (param.weighted) {
+        NDArray* inputs[] = {args[0].operator NDArray*(), args[1].operator NDArray*()};
+        auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
+        if (out) {
+          *ret = PythonArg(5);
+        } else {
+          if (param.returned) {
+            *ret = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
+          } else {
+            *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+          }
+        }
       } else {
-        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+        NDArray* inputs[] = {args[0].operator NDArray*()};
+        auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, out);
+        if (out) {
+          *ret = PythonArg(5);
+        } else {
+          if (param.returned) {
+            *ret = ADT(0, {NDArrayHandle(ndoutputs[0]), NDArrayHandle(ndoutputs[1])});
+          } else {
+            *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+          }
+        }
       }
-    }
-  }
-});
+    });
 
 };  // namespace mxnet
diff --git a/src/api/operator/numpy/np_nan_to_num_op.cc b/src/api/operator/numpy/np_nan_to_num_op.cc
index 65fd26e5432e..804d757a035b 100644
--- a/src/api/operator/numpy/np_nan_to_num_op.cc
+++ b/src/api/operator/numpy/np_nan_to_num_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,44 +29,44 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.nan_to_num")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_nan_to_num");
-  nnvm::NodeAttrs attrs;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_nan_to_num");
+      nnvm::NodeAttrs attrs;
 
-  op::NumpyNanToNumParam param;
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      op::NumpyNanToNumParam param;
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
 
-  param.copy = args[1].operator bool();
-  param.nan = args[2].operator double();
+      param.copy = args[1].operator bool();
+      param.nan  = args[2].operator double();
 
-  if (args[3].type_code() == kNull) {
-    param.posinf = dmlc::nullopt;
-  } else {
-    param.posinf = args[3].operator double();
-  }
+      if (args[3].type_code() == kNull) {
+        param.posinf = dmlc::nullopt;
+      } else {
+        param.posinf = args[3].operator double();
+      }
 
-  if (args[4].type_code() == kNull) {
-    param.neginf = dmlc::nullopt;
-  } else {
-    param.neginf = args[4].operator double();
-  }
+      if (args[4].type_code() == kNull) {
+        param.neginf = dmlc::nullopt;
+      } else {
+        param.neginf = args[4].operator double();
+      }
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyNanToNumParam>(&attrs);
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyNanToNumParam>(&attrs);
 
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  // set the number of outputs provided by the `out` arugment
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(5);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      // set the number of outputs provided by the `out` arugment
+      int num_outputs = out != nullptr;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(5);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_nonzero_op.cc b/src/api/operator/numpy/np_nonzero_op.cc
index 85510633c054..7558b4fadad4 100644
--- a/src/api/operator/numpy/np_nonzero_op.cc
+++ b/src/api/operator/numpy/np_nonzero_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,18 +28,18 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.nonzero")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_nonzero");
-  nnvm::NodeAttrs attrs;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_nonzero");
+      nnvm::NodeAttrs attrs;
 
-  attrs.op = op;
+      attrs.op = op;
 
-  int num_inputs = 1;
-  int num_outputs = 0;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_ordering_op.cc b/src/api/operator/numpy/np_ordering_op.cc
index ec0db28b4f9a..11c00fbfb71e 100644
--- a/src/api/operator/numpy/np_ordering_op.cc
+++ b/src/api/operator/numpy/np_ordering_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,8 +28,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.sort")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.sort").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_sort");
   nnvm::NodeAttrs attrs;
@@ -43,46 +42,46 @@ MXNET_REGISTER_API("_npi.sort")
   param.is_ascend = true;
 
   attrs.parsed = std::move(param);
-  attrs.op = op;
+  attrs.op     = op;
 
-  int num_inputs = 1;
+  int num_inputs    = 1;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
 
   int num_outputs = 0;
   SetAttrDict<op::SortParam>(&attrs);
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  *ret           = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 MXNET_REGISTER_API("_npi.argsort")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_argsort");
-  nnvm::NodeAttrs attrs;
-  op::ArgSortParam param;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_argsort");
+      nnvm::NodeAttrs attrs;
+      op::ArgSortParam param;
 
-  if (args[1].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[1].operator int();
-  }
-  param.is_ascend = true;
-  if (args[3].type_code() == kNull) {
-    param.dtype = mshadow::kFloat32;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
-  }
+      if (args[1].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[1].operator int();
+      }
+      param.is_ascend = true;
+      if (args[3].type_code() == kNull) {
+        param.dtype = mshadow::kFloat32;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
+      }
 
-  attrs.parsed = std::move(param);
-  attrs.op = op;
+      attrs.parsed = std::move(param);
+      attrs.op     = op;
 
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
 
-  int num_outputs = 0;
-  SetAttrDict<op::ArgSortParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+      int num_outputs = 0;
+      SetAttrDict<op::ArgSortParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret           = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_pad_op.cc b/src/api/operator/numpy/np_pad_op.cc
index 1351c26dd5ba..4f3b46cf0a28 100644
--- a/src/api/operator/numpy/np_pad_op.cc
+++ b/src/api/operator/numpy/np_pad_op.cc
@@ -7,9 +7,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -68,7 +68,7 @@ inline Tuple<Tuple<int>> BroadcastPadWidth(int ndim, runtime::ADT adt) {
     } else {
       CHECK_EQ(adt_size, 2) << "Invalid Input pad_width";
       int pad_before = static_cast<int>(pad->value);
-      int pad_after = static_cast<int>(Downcast<runtime::Integer, ObjectRef>(adt[1])->value);
+      int pad_after  = static_cast<int>(Downcast<runtime::Integer, ObjectRef>(adt[1])->value);
       if (ndim == 1) {
         temp.emplace_back(mxnet::Tuple<int>({pad_before}));
         temp.emplace_back(mxnet::Tuple<int>({pad_after}));
@@ -82,10 +82,8 @@ inline Tuple<Tuple<int>> BroadcastPadWidth(int ndim, runtime::ADT adt) {
     if (adt_size == 1) {
       if (ndim == 1) {
         runtime::ADT pad_adt = Downcast<runtime::ADT, ObjectRef>(adt[0]);
-        int pad_before =
-            static_cast<int>(Downcast<runtime::Integer, ObjectRef>(pad_adt[0])->value);
-        int pad_after =
-            static_cast<int>(Downcast<runtime::Integer, ObjectRef>(pad_adt[1])->value);
+        int pad_before = static_cast<int>(Downcast<runtime::Integer, ObjectRef>(pad_adt[0])->value);
+        int pad_after  = static_cast<int>(Downcast<runtime::Integer, ObjectRef>(pad_adt[1])->value);
         temp.emplace_back(mxnet::Tuple<int>({pad_before}));
         temp.emplace_back(mxnet::Tuple<int>({pad_after}));
       } else {
@@ -103,32 +101,31 @@ inline Tuple<Tuple<int>> BroadcastPadWidth(int ndim, runtime::ADT adt) {
   return Tuple<Tuple<int>>(temp.begin(), temp.end());
 }
 
-MXNET_REGISTER_API("_npi.pad")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.pad").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_pad");
   nnvm::NodeAttrs attrs;
   op::NumpyPadParam param;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+  NDArray* inputs[]    = {args[0].operator mxnet::NDArray*()};
   mxnet::TShape ashape = inputs[0]->shape();
-  int ndim = ashape.ndim();
-  ADT adt = Downcast<ADT, ObjectRef>(args[1].operator ObjectRef());
+  int ndim             = ashape.ndim();
+  ADT adt              = Downcast<ADT, ObjectRef>(args[1].operator ObjectRef());
   // broadcast pad_width to (ndim, 2)
   param.pad_width = BroadcastPadWidth(ndim, adt);
-  param.mode = String2MXNetPadType(args[2].operator std::string());
+  param.mode      = String2MXNetPadType(args[2].operator std::string());
   if (args[3].type_code() != kNull) {
     param.constant_values = args[3].operator double();
   }
   if (args[4].type_code() != kNull) {
     param.reflect_type = args[4].operator std::string();
   }
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyPadParam>(&attrs);
-  int num_inputs = 1;
+  int num_inputs  = 1;
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret            = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_percentile_op.cc b/src/api/operator/numpy/np_percentile_op.cc
index 196cca9baaf9..fd311c73aeb3 100644
--- a/src/api/operator/numpy/np_percentile_op.cc
+++ b/src/api/operator/numpy/np_percentile_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -38,7 +38,7 @@ inline int String2MXNetPercentileType(const std::string& s) {
     return percentile_enum::kHigher;
   } else if (s == "midpoint") {
     return percentile_enum::kMidpoint;
-  } else if (s== "nearest") {
+  } else if (s == "nearest") {
     return percentile_enum::kNearest;
   } else {
     LOG(FATAL) << "unknown type " << s;
@@ -48,51 +48,52 @@ inline int String2MXNetPercentileType(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npi.percentile")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_percentile");
-  nnvm::NodeAttrs attrs;
-  op::NumpyPercentileParam param;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_percentile");
+      nnvm::NodeAttrs attrs;
+      op::NumpyPercentileParam param;
 
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  if (args[2].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else if (args[2].type_code() == kDLInt) {
-    param.axis = Tuple<int>(1, args[2].operator int64_t());
-  } else {
-    param.axis = Tuple<int>(args[2].operator ObjectRef());
-  }
-  param.interpolation = String2MXNetPercentileType(args[3].operator std::string());
-  param.keepdims = args[4].operator bool();
-  if (args[1].type_code() == kDLInt || args[1].type_code() == kDLFloat) {
-    param.q_scalar = args[1].operator double();
-    NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-    int num_inputs = 1;
-    attrs.parsed = param;
-    attrs.op = op;
-    SetAttrDict<op::NumpyPercentileParam>(&attrs);
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-    if (out) {
-      *ret = PythonArg(5);
-    } else {
-      *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-    }
-  } else {
-    param.q_scalar = dmlc::nullopt;
-    NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-    int num_inputs = 2;
-    attrs.parsed = param;
-    attrs.op = op;
-    SetAttrDict<op::NumpyPercentileParam>(&attrs);
-    auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-    if (out) {
-      *ret = PythonArg(5);
-    } else {
-      *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-    }
-  }
-});
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      if (args[2].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else if (args[2].type_code() == kDLInt) {
+        param.axis = Tuple<int>(1, args[2].operator int64_t());
+      } else {
+        param.axis = Tuple<int>(args[2].operator ObjectRef());
+      }
+      param.interpolation = String2MXNetPercentileType(args[3].operator std::string());
+      param.keepdims      = args[4].operator bool();
+      if (args[1].type_code() == kDLInt || args[1].type_code() == kDLFloat) {
+        param.q_scalar    = args[1].operator double();
+        NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+        int num_inputs    = 1;
+        attrs.parsed      = param;
+        attrs.op          = op;
+        SetAttrDict<op::NumpyPercentileParam>(&attrs);
+        auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+        if (out) {
+          *ret = PythonArg(5);
+        } else {
+          *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+        }
+      } else {
+        param.q_scalar    = dmlc::nullopt;
+        NDArray* inputs[] = {args[0].operator mxnet::NDArray*(),
+                             args[1].operator mxnet::NDArray*()};
+        int num_inputs    = 2;
+        attrs.parsed      = param;
+        attrs.op          = op;
+        SetAttrDict<op::NumpyPercentileParam>(&attrs);
+        auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+        if (out) {
+          *ret = PythonArg(5);
+        } else {
+          *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+        }
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_polynomial_op.cc b/src/api/operator/numpy/np_polynomial_op.cc
index 87081d2952ca..749cf6b859d2 100644
--- a/src/api/operator/numpy/np_polynomial_op.cc
+++ b/src/api/operator/numpy/np_polynomial_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,17 +28,17 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.polyval")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_polyval");
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_polyval");
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
 
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  int num_inputs = 2;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
+      int num_inputs    = 2;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_repeat_op.cc b/src/api/operator/numpy/np_repeat_op.cc
index c98a1711050a..c7bed2b3ec69 100644
--- a/src/api/operator/numpy/np_repeat_op.cc
+++ b/src/api/operator/numpy/np_repeat_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,25 +28,25 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.repeats")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_repeats");
-  nnvm::NodeAttrs attrs;
-  op::RepeatsParam param;
-  param.repeats = Tuple<int>(args[1].operator ObjectRef());;
-  if (args[2].type_code() == kNull) {
-    param.axis = dmlc::optional<int>();
-  } else {
-    param.axis = args[2].operator int64_t();
-  }
-  int num_inputs = 1;
-  int num_outputs = 0;
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::RepeatsParam>(&attrs);
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_repeats");
+      nnvm::NodeAttrs attrs;
+      op::RepeatsParam param;
+      param.repeats = Tuple<int>(args[1].operator ObjectRef());
+      if (args[2].type_code() == kNull) {
+        param.axis = dmlc::optional<int>();
+      } else {
+        param.axis = args[2].operator int64_t();
+      }
+      int num_inputs  = 1;
+      int num_outputs = 0;
+      attrs.parsed    = param;
+      attrs.op        = op;
+      SetAttrDict<op::RepeatsParam>(&attrs);
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_tensordot_op.cc b/src/api/operator/numpy/np_tensordot_op.cc
index 0cc74d9355e1..cf1c0fc0fefb 100644
--- a/src/api/operator/numpy/np_tensordot_op.cc
+++ b/src/api/operator/numpy/np_tensordot_op.cc
@@ -27,26 +27,24 @@
 
 namespace mxnet {
 
-inline static void _npi_tensordot_int_axes(runtime::MXNetArgs args,
-                                           runtime::MXNetRetValue* ret) {
+inline static void _npi_tensordot_int_axes(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_tensordot_int_axes");
   op::TensordotIntAxesParam param;
   nnvm::NodeAttrs attrs;
   param.axes = args[2].operator int();
-  attrs.op = op;
+  attrs.op   = op;
   // we directly copy TensordotIntAxesParam, which is trivially-copyable
   attrs.parsed = param;
   SetAttrDict<op::TensordotIntAxesParam>(&attrs);
-  int num_outputs = 0;
-  int num_inputs = 2;
+  int num_outputs   = 0;
+  int num_inputs    = 2;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
-inline static void _npi_tensordot(runtime::MXNetArgs args,
-                                  runtime::MXNetRetValue* ret) {
+inline static void _npi_tensordot(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_tensordot");
   op::TensordotParam param;
@@ -61,23 +59,23 @@ inline static void _npi_tensordot(runtime::MXNetArgs args,
     param.a_axes_summed = Tuple<int>(adt[0]);
     param.b_axes_summed = Tuple<int>(adt[1]);
   }
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::TensordotParam>(&attrs);
-  int num_outputs = 0;
-  int num_inputs = 2;
+  int num_outputs   = 0;
+  int num_inputs    = 2;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(), args[1].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
 MXNET_REGISTER_API("_npi.tensordot")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  if (args[2].type_code() == kDLInt) {
-    _npi_tensordot_int_axes(args, ret);
-  } else {
-    _npi_tensordot(args, ret);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      if (args[2].type_code() == kDLInt) {
+        _npi_tensordot_int_axes(args, ret);
+      } else {
+        _npi_tensordot(args, ret);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_trace_op.cc b/src/api/operator/numpy/np_trace_op.cc
index 2979d21dbdc9..125f96d2d01e 100644
--- a/src/api/operator/numpy/np_trace_op.cc
+++ b/src/api/operator/numpy/np_trace_op.cc
@@ -28,24 +28,23 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.trace")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.trace").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_trace");
   nnvm::NodeAttrs attrs;
   op::NumpyTraceParam param;
   param.offset = args[1].operator int64_t();
-  param.axis1 = args[2].operator int64_t();
-  param.axis2 = args[3].operator int64_t();
+  param.axis1  = args[2].operator int64_t();
+  param.axis2  = args[3].operator int64_t();
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyTraceParam>(&attrs);
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  NDArray* out = args[4].operator mxnet::NDArray*();
+  int num_inputs    = 1;
+  NDArray* out      = args[4].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (out) {
     *ret = PythonArg(4);
   } else {
diff --git a/src/api/operator/numpy/np_tri_op.cc b/src/api/operator/numpy/np_tri_op.cc
index 972d7864493a..915c68ca4eb0 100644
--- a/src/api/operator/numpy/np_tri_op.cc
+++ b/src/api/operator/numpy/np_tri_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,8 +27,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.tri")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.tri").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_tri");
   nnvm::NodeAttrs attrs;
@@ -39,20 +38,21 @@ MXNET_REGISTER_API("_npi.tri")
   } else {
     param.M = args[1].operator nnvm::dim_t();
   }
-  param.k = args[2].operator int();
-  param.dtype = args[3].type_code() == kNull ? mshadow::kFloat32 :
-                String2MXNetTypeWithBool(args[3].operator std::string());
+  param.k     = args[2].operator int();
+  param.dtype = args[3].type_code() == kNull
+                    ? mshadow::kFloat32
+                    : String2MXNetTypeWithBool(args[3].operator std::string());
   if (args[4].type_code() != kNull) {
     attrs.dict["ctx"] = args[4].operator std::string();
   }
 
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::TriParam>(&attrs);
 
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+  *ret            = ndoutputs[0];
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_tril_op.cc b/src/api/operator/numpy/np_tril_op.cc
index 1acb1b8e4b10..8388797ad24a 100644
--- a/src/api/operator/numpy/np_tril_op.cc
+++ b/src/api/operator/numpy/np_tril_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -27,8 +27,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.tril")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.tril").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_tril");
   nnvm::NodeAttrs attrs;
@@ -37,14 +36,14 @@ MXNET_REGISTER_API("_npi.tril")
 
   // we directly copy TrilParam, which is trivially-copyable
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::TrilParam>(&attrs);
 
-  int num_outputs = 0;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_triu_op.cc b/src/api/operator/numpy/np_triu_op.cc
index e42169aca43b..8bad12e018a9 100644
--- a/src/api/operator/numpy/np_triu_op.cc
+++ b/src/api/operator/numpy/np_triu_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,23 +28,22 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.triu")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.triu").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   op::TriuParam param;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npi_triu");
   // inputs
-  param.k = args[1].operator int();
+  param.k           = args[1].operator int();
   NDArray* inputs[] = {args[0].operator NDArray*()};
 
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::TriuParam>(&attrs);
 
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 1, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs  = Invoke(op, &attrs, 1, inputs, &num_outputs, nullptr);
+  *ret            = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_unique_op.cc b/src/api/operator/numpy/np_unique_op.cc
index a669025e108f..19f64d714b97 100644
--- a/src/api/operator/numpy/np_unique_op.cc
+++ b/src/api/operator/numpy/np_unique_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,35 +30,35 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.unique")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_unique");
-  nnvm::NodeAttrs attrs;
-  op::NumpyUniqueParam param;
-  // param
-  param.return_index = args[1].operator bool();
-  param.return_inverse = args[2].operator bool();
-  param.return_counts = args[3].operator bool();
-  if (args[4].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[4].operator int();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyUniqueParam>(&attrs);
-  // inputs
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  // outputs
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  std::vector<NDArrayHandle> ndarray_handles;
-  ndarray_handles.reserve(num_outputs);
-  for (int i = 0; i < num_outputs; ++i) {
-    ndarray_handles.emplace_back(ndoutputs[i]);
-  }
-  *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_unique");
+      nnvm::NodeAttrs attrs;
+      op::NumpyUniqueParam param;
+      // param
+      param.return_index   = args[1].operator bool();
+      param.return_inverse = args[2].operator bool();
+      param.return_counts  = args[3].operator bool();
+      if (args[4].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[4].operator int();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyUniqueParam>(&attrs);
+      // inputs
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      // outputs
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      std::vector<NDArrayHandle> ndarray_handles;
+      ndarray_handles.reserve(num_outputs);
+      for (int i = 0; i < num_outputs; ++i) {
+        ndarray_handles.emplace_back(ndoutputs[i]);
+      }
+      *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/np_where_op.cc b/src/api/operator/numpy/np_where_op.cc
index aca4e075d62d..8b458a274f6d 100644
--- a/src/api/operator/numpy/np_where_op.cc
+++ b/src/api/operator/numpy/np_where_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,24 +29,21 @@
 namespace mxnet {
 
 inline static bool isScalar(const runtime::MXNetArgValue& arg) {
-  return arg.type_code() == kDLInt ||
-         arg.type_code() == kDLUInt ||
-         arg.type_code() == kDLFloat;
+  return arg.type_code() == kDLInt || arg.type_code() == kDLUInt || arg.type_code() == kDLFloat;
 }
 
-inline static void _npi_where(runtime::MXNetArgs args,
-                              runtime::MXNetRetValue* ret) {
+inline static void _npi_where(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_where");
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  int num_inputs = 3;
-  int num_outputs = 0;
+  attrs.op          = op;
+  int num_inputs    = 3;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*(),
                        args[1].operator mxnet::NDArray*(),
                        args[2].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
 inline static void _npi_where_scalar1(runtime::MXNetArgs args,
@@ -57,38 +54,36 @@ inline static void _npi_where_scalar1(runtime::MXNetArgs args,
   const nnvm::Op* op = isl ? Op::Get("_npi_where_lscalar") : Op::Get("_npi_where_rscalar");
   op::NumpyWhereScalarParam param;
   param.scalar = isl ? args[1].operator double() : args[2].operator double();
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyWhereScalarParam>(&attrs);
-  int num_inputs = 2;
-  int num_outputs = 0;
-  NDArray* inputs[] =
-    {args[0].operator mxnet::NDArray*(),
-     isl ? args[2].operator mxnet::NDArray*() : args[1].operator mxnet::NDArray*()};
+  int num_inputs    = 2;
+  int num_outputs   = 0;
+  NDArray* inputs[] = {
+      args[0].operator mxnet::NDArray*(),
+      isl ? args[2].operator mxnet::NDArray*() : args[1].operator mxnet::NDArray*()};
   auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  *ret           = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
-inline static void _npi_where_scalar2(runtime::MXNetArgs args,
-                                      runtime::MXNetRetValue* ret) {
+inline static void _npi_where_scalar2(runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_where_scalar2");
   op::NumpyWhereScalar2Param param;
   nnvm::NodeAttrs attrs;
-  param.x = args[1].operator double();
-  param.y = args[2].operator double();
-  attrs.op = op;
+  param.x      = args[1].operator double();
+  param.y      = args[2].operator double();
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyWhereScalar2Param>(&attrs);
-  int num_inputs = 1;
-  int num_outputs = 0;
+  int num_inputs    = 1;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
 }
 
-MXNET_REGISTER_API("_npi.where")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.where").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   if (isScalar(args[1]) && isScalar(args[2])) {
     _npi_where_scalar2(args, ret);
   } else if (!isScalar(args[1]) && !isScalar(args[2])) {
diff --git a/src/api/operator/numpy/np_window_op.cc b/src/api/operator/numpy/np_window_op.cc
index 41c78cb16b6d..848f5c64cbe5 100644
--- a/src/api/operator/numpy/np_window_op.cc
+++ b/src/api/operator/numpy/np_window_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -46,35 +46,35 @@ inline static void SetNumpyWindowsParam(runtime::MXNetArgs args,
     param.dtype = String2MXNetTypeWithBool(args[1].operator std::string());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::NumpyWindowsParam>(&attrs);
   if (args[2].type_code() != kNull) {
     attrs.dict["ctx"] = args[2].operator std::string();
   }
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  auto ndoutputs  = Invoke(op, &attrs, 0, nullptr, &num_outputs, nullptr);
+  *ret            = ndoutputs[0];
 }
 
 MXNET_REGISTER_API("_npi.blackman")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_blackman");
-  SetNumpyWindowsParam(args, ret, op);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_blackman");
+      SetNumpyWindowsParam(args, ret, op);
+    });
 
 MXNET_REGISTER_API("_npi.hamming")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_hamming");
-  SetNumpyWindowsParam(args, ret, op);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_hamming");
+      SetNumpyWindowsParam(args, ret, op);
+    });
 
 MXNET_REGISTER_API("_npi.hanning")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_hanning");
-  SetNumpyWindowsParam(args, ret, op);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_hanning");
+      SetNumpyWindowsParam(args, ret, op);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_choice_op.cc b/src/api/operator/numpy/random/np_choice_op.cc
index bc5ebbcffa58..7f64a697ecaf 100644
--- a/src/api/operator/numpy/random/np_choice_op.cc
+++ b/src/api/operator/numpy/random/np_choice_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,61 +29,61 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.choice")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_choice");
-  nnvm::NodeAttrs attrs;
-  op::NumpyChoiceParam param;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_choice");
+      nnvm::NodeAttrs attrs;
+      op::NumpyChoiceParam param;
 
-  NDArray* inputs[2];
-  int num_inputs = 0;
+      NDArray* inputs[2];
+      int num_inputs = 0;
 
-  if (args[0].type_code() == kDLInt) {
-    param.a = args[0].operator int();
-  } else if (args[0].type_code() == kNDArrayHandle) {
-    param.a = dmlc::nullopt;
-    inputs[num_inputs] = args[0].operator mxnet::NDArray*();
-    num_inputs++;
-  }
+      if (args[0].type_code() == kDLInt) {
+        param.a = args[0].operator int();
+      } else if (args[0].type_code() == kNDArrayHandle) {
+        param.a            = dmlc::nullopt;
+        inputs[num_inputs] = args[0].operator mxnet::NDArray*();
+        num_inputs++;
+      }
 
-  if (args[1].type_code() == kNull) {
-    param.size = dmlc::nullopt;
-  } else {
-    if (args[1].type_code() == kDLInt) {
-      param.size = mxnet::Tuple<int64_t>(1, args[1].operator int64_t());
-    } else {
-      param.size = mxnet::Tuple<int64_t>(args[1].operator ObjectRef());
-    }
-  }
+      if (args[1].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        if (args[1].type_code() == kDLInt) {
+          param.size = mxnet::Tuple<int64_t>(1, args[1].operator int64_t());
+        } else {
+          param.size = mxnet::Tuple<int64_t>(args[1].operator ObjectRef());
+        }
+      }
 
-  if (args[2].type_code() == kNull) {
-    param.replace = true;
-  } else {
-    param.replace = args[2].operator bool();
-  }
+      if (args[2].type_code() == kNull) {
+        param.replace = true;
+      } else {
+        param.replace = args[2].operator bool();
+      }
 
-  if (args[3].type_code() == kNull) {
-    param.weighted = false;
-  } else if (args[0].type_code() == kNDArrayHandle) {
-    param.weighted = true;
-    inputs[num_inputs] = args[3].operator mxnet::NDArray*();
-    num_inputs++;
-  }
+      if (args[3].type_code() == kNull) {
+        param.weighted = false;
+      } else if (args[0].type_code() == kNDArrayHandle) {
+        param.weighted     = true;
+        inputs[num_inputs] = args[3].operator mxnet::NDArray*();
+        num_inputs++;
+      }
 
-  attrs.parsed = param;
-  attrs.op = op;
-  if (args[4].type_code() != kNull) {
-    attrs.dict["ctx"] = args[4].operator std::string();
-  }
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(5);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      if (args[4].type_code() != kNull) {
+        attrs.dict["ctx"] = args[4].operator std::string();
+      }
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(5);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_exponential_op.cc b/src/api/operator/numpy/random/np_exponential_op.cc
index e95ebc8ed136..15347a0893d2 100644
--- a/src/api/operator/numpy/random/np_exponential_op.cc
+++ b/src/api/operator/numpy/random/np_exponential_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,43 +29,42 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.exponential")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_exponential");
-  op::NumpyExponentialParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[1].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[1].operator int64_t());
-  } else if (args[1].type_code() == kNull) {
-      param.size = dmlc::nullopt;
-  } else {
-      param.size = Tuple<index_t>(args[1].operator ObjectRef());
-  }
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  NDArray* inputs[1];
-  int num_inputs = 0;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    param.scale = args[0].operator double();
-    num_inputs = 0;
-  } else {
-    param.scale = dmlc::nullopt;
-    inputs[0] = args[0].operator mxnet::NDArray*();
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyExponentialParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs,
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_exponential");
+      op::NumpyExponentialParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[1].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[1].operator int64_t());
+      } else if (args[1].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        param.size = Tuple<index_t>(args[1].operator ObjectRef());
+      }
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      NDArray* inputs[1];
+      int num_inputs = 0;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        param.scale = args[0].operator double();
+        num_inputs  = 0;
+      } else {
+        param.scale = dmlc::nullopt;
+        inputs[0]   = args[0].operator mxnet::NDArray*();
+        num_inputs  = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyExponentialParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_laplace_op.cc b/src/api/operator/numpy/random/np_laplace_op.cc
index 6d8158384aa1..594b4b79413b 100644
--- a/src/api/operator/numpy/random/np_laplace_op.cc
+++ b/src/api/operator/numpy/random/np_laplace_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,68 +29,68 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.laplace")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_laplace");
-  nnvm::NodeAttrs attrs;
-  op::NumpyLaplaceParam param;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_laplace");
+      nnvm::NodeAttrs attrs;
+      op::NumpyLaplaceParam param;
 
-  NDArray** inputs = new NDArray*[2]();
-  int num_inputs = 0;
+      NDArray** inputs = new NDArray*[2]();
+      int num_inputs   = 0;
 
-  if (args[0].type_code() == kNull) {
-    param.loc = dmlc::nullopt;
-  } else if (args[0].type_code() == kNDArrayHandle) {
-    param.loc = dmlc::nullopt;
-    inputs[num_inputs] = args[0].operator mxnet::NDArray *();
-    num_inputs++;
-  } else {
-    param.loc = args[0].operator double();  // convert arg to T
-  }
+      if (args[0].type_code() == kNull) {
+        param.loc = dmlc::nullopt;
+      } else if (args[0].type_code() == kNDArrayHandle) {
+        param.loc          = dmlc::nullopt;
+        inputs[num_inputs] = args[0].operator mxnet::NDArray*();
+        num_inputs++;
+      } else {
+        param.loc = args[0].operator double();  // convert arg to T
+      }
 
-  if (args[1].type_code() == kNull) {
-    param.scale = dmlc::nullopt;
-  } else if (args[1].type_code() == kNDArrayHandle) {
-    param.scale = dmlc::nullopt;
-    inputs[num_inputs] = args[1].operator mxnet::NDArray *();
-    num_inputs++;
-  } else {
-    param.scale = args[1].operator double();  // convert arg to T
-  }
+      if (args[1].type_code() == kNull) {
+        param.scale = dmlc::nullopt;
+      } else if (args[1].type_code() == kNDArrayHandle) {
+        param.scale        = dmlc::nullopt;
+        inputs[num_inputs] = args[1].operator mxnet::NDArray*();
+        num_inputs++;
+      } else {
+        param.scale = args[1].operator double();  // convert arg to T
+      }
 
-  if (args[2].type_code() == kNull) {
-    param.size = dmlc::nullopt;
-  } else {
-    if (args[2].type_code() == kDLInt) {
-      param.size = mxnet::Tuple<index_t>(1, args[2].operator int64_t());
-    } else {
-      param.size = mxnet::Tuple<index_t>(args[2].operator ObjectRef());
-    }
-  }
+      if (args[2].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        if (args[2].type_code() == kDLInt) {
+          param.size = mxnet::Tuple<index_t>(1, args[2].operator int64_t());
+        } else {
+          param.size = mxnet::Tuple<index_t>(args[2].operator ObjectRef());
+        }
+      }
 
-  if (args[3].type_code() == kNull) {
-    param.dtype = mshadow::kFloat32;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::NumpyLaplaceParam>(&attrs);
-  if (args[4].type_code() != kNull) {
-    attrs.dict["ctx"] = args[4].operator std::string();
-  }
+      if (args[3].type_code() == kNull) {
+        param.dtype = mshadow::kFloat32;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::NumpyLaplaceParam>(&attrs);
+      if (args[4].type_code() != kNull) {
+        attrs.dict["ctx"] = args[4].operator std::string();
+      }
 
-  inputs = inputs == nullptr ? nullptr : inputs;
+      inputs = inputs == nullptr ? nullptr : inputs;
 
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(5);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(5);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_location_scale_op.cc b/src/api/operator/numpy/random/np_location_scale_op.cc
index 3f0fbb3c8f91..30785352369c 100644
--- a/src/api/operator/numpy/random/np_location_scale_op.cc
+++ b/src/api/operator/numpy/random/np_location_scale_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,122 +30,120 @@
 namespace mxnet {
 
 int scalar_number(const runtime::MXNetArgs& args) {
-    int result = 0;
-    if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt)
-         result++;
-    if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt)
-        result++;
-    return result;
+  int result = 0;
+  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt)
+    result++;
+  if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt)
+    result++;
+  return result;
 }
 
 MXNET_REGISTER_API("_npi.gumbel")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_gumbel");
-  op::NumpyLocationScaleParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[2].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[2].operator int64_t());
-  } else if (args[2].type_code() == kNull) {
-      param.size = dmlc::optional<mxnet::Tuple<index_t>>();
-  } else {
-      param.size = Tuple<index_t>(args[2].operator ObjectRef());
-  }
-  if (args[3].type_code() != kNull) {
-    attrs.dict["ctx"] = args[3].operator std::string();
-  }
-  NDArray* out = args[4].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  int scalar = scalar_number(args);
-  std::vector<NDArray*> inputs;
-  int num_inputs = 0;
-  if (scalar == 2) {
-    param.loc = args[0].operator double();
-    param.scale = args[1].operator double();
-  } else if (scalar == 0) {
-    param.loc = dmlc::nullopt;
-    param.scale = dmlc::nullopt;
-    inputs.push_back(args[0].operator mxnet::NDArray*());
-    inputs.push_back(args[1].operator mxnet::NDArray*());
-    num_inputs = 2;
-  } else {
-    if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-      param.loc = args[0].operator double();
-      param.scale = dmlc::nullopt;
-      inputs.push_back(args[1].operator mxnet::NDArray*());
-    } else {
-      param.loc = dmlc::nullopt;
-      param.scale = args[1].operator double();
-      inputs.push_back(args[0].operator mxnet::NDArray*());
-    }
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyLocationScaleParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(),
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(4);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_gumbel");
+      op::NumpyLocationScaleParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[2].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[2].operator int64_t());
+      } else if (args[2].type_code() == kNull) {
+        param.size = dmlc::optional<mxnet::Tuple<index_t>>();
+      } else {
+        param.size = Tuple<index_t>(args[2].operator ObjectRef());
+      }
+      if (args[3].type_code() != kNull) {
+        attrs.dict["ctx"] = args[3].operator std::string();
+      }
+      NDArray* out      = args[4].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      int scalar        = scalar_number(args);
+      std::vector<NDArray*> inputs;
+      int num_inputs = 0;
+      if (scalar == 2) {
+        param.loc   = args[0].operator double();
+        param.scale = args[1].operator double();
+      } else if (scalar == 0) {
+        param.loc   = dmlc::nullopt;
+        param.scale = dmlc::nullopt;
+        inputs.push_back(args[0].operator mxnet::NDArray*());
+        inputs.push_back(args[1].operator mxnet::NDArray*());
+        num_inputs = 2;
+      } else {
+        if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+          param.loc   = args[0].operator double();
+          param.scale = dmlc::nullopt;
+          inputs.push_back(args[1].operator mxnet::NDArray*());
+        } else {
+          param.loc   = dmlc::nullopt;
+          param.scale = args[1].operator double();
+          inputs.push_back(args[0].operator mxnet::NDArray*());
+        }
+        num_inputs = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyLocationScaleParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(4);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 MXNET_REGISTER_API("_npi.logistic")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_logistic");
-  op::NumpyLocationScaleParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[2].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[2].operator int64_t());
-  } else if (args[2].type_code() == kNull) {
-      param.size = dmlc::nullopt;
-  } else {
-      param.size = Tuple<index_t>(args[2].operator ObjectRef());
-  }
-  if (args[3].type_code() != kNull) {
-    attrs.dict["ctx"] = args[3].operator std::string();
-  }
-  NDArray* out = args[4].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  int scalar = scalar_number(args);
-  std::vector<NDArray*> inputs;
-  int num_inputs = 0;
-  if (scalar == 2) {
-    param.loc = args[0].operator double();
-    param.scale = args[1].operator double();
-  } else if (scalar == 0) {
-    param.loc = dmlc::nullopt;
-    param.scale = dmlc::nullopt;
-    inputs.push_back(args[0].operator mxnet::NDArray*());
-    inputs.push_back(args[1].operator mxnet::NDArray*());
-    num_inputs = 2;
-  } else {
-    if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-      param.loc = args[0].operator double();
-      param.scale = dmlc::nullopt;
-      inputs.push_back(args[1].operator mxnet::NDArray*());
-    } else {
-      param.loc = dmlc::nullopt;
-      param.scale = args[1].operator double();
-      inputs.push_back(args[0].operator mxnet::NDArray*());
-    }
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyLocationScaleParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(),
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(4);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_logistic");
+      op::NumpyLocationScaleParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[2].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[2].operator int64_t());
+      } else if (args[2].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        param.size = Tuple<index_t>(args[2].operator ObjectRef());
+      }
+      if (args[3].type_code() != kNull) {
+        attrs.dict["ctx"] = args[3].operator std::string();
+      }
+      NDArray* out      = args[4].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      int scalar        = scalar_number(args);
+      std::vector<NDArray*> inputs;
+      int num_inputs = 0;
+      if (scalar == 2) {
+        param.loc   = args[0].operator double();
+        param.scale = args[1].operator double();
+      } else if (scalar == 0) {
+        param.loc   = dmlc::nullopt;
+        param.scale = dmlc::nullopt;
+        inputs.push_back(args[0].operator mxnet::NDArray*());
+        inputs.push_back(args[1].operator mxnet::NDArray*());
+        num_inputs = 2;
+      } else {
+        if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+          param.loc   = args[0].operator double();
+          param.scale = dmlc::nullopt;
+          inputs.push_back(args[1].operator mxnet::NDArray*());
+        } else {
+          param.loc   = dmlc::nullopt;
+          param.scale = args[1].operator double();
+          inputs.push_back(args[0].operator mxnet::NDArray*());
+        }
+        num_inputs = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyLocationScaleParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(4);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_multinomial_op.cc b/src/api/operator/numpy/random/np_multinomial_op.cc
index 13f18bea23ff..ad4d80838b45 100644
--- a/src/api/operator/numpy/random/np_multinomial_op.cc
+++ b/src/api/operator/numpy/random/np_multinomial_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,46 +30,46 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.multinomial")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_multinomial");
-  nnvm::NodeAttrs attrs;
-  op::NumpyMultinomialParam param;
-  NDArray** inputs = new NDArray*[1]();
-  int num_inputs = 0;
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_multinomial");
+      nnvm::NodeAttrs attrs;
+      op::NumpyMultinomialParam param;
+      NDArray** inputs = new NDArray*[1]();
+      int num_inputs   = 0;
 
-  // parse int
-  param.n = args[0].operator int();
+      // parse int
+      param.n = args[0].operator int();
 
-  // parse pvals
-  if (args[1].type_code() == kNull) {
-    param.pvals = dmlc::nullopt;
-  } else if (args[1].type_code() == kNDArrayHandle) {
-    param.pvals = dmlc::nullopt;
-    inputs[0] = args[1].operator mxnet::NDArray*();
-    num_inputs = 1;
-  } else {
-    param.pvals = Obj2Tuple<double, Float>(args[1].operator ObjectRef());
-  }
+      // parse pvals
+      if (args[1].type_code() == kNull) {
+        param.pvals = dmlc::nullopt;
+      } else if (args[1].type_code() == kNDArrayHandle) {
+        param.pvals = dmlc::nullopt;
+        inputs[0]   = args[1].operator mxnet::NDArray*();
+        num_inputs  = 1;
+      } else {
+        param.pvals = Obj2Tuple<double, Float>(args[1].operator ObjectRef());
+      }
 
-  // parse size
-  if (args[2].type_code() == kNull) {
-    param.size = dmlc::nullopt;
-  } else {
-    if (args[2].type_code() == kDLInt) {
-      param.size = mxnet::Tuple<index_t>(1, args[2].operator int64_t());
-    } else {
-      param.size = mxnet::Tuple<index_t>(args[2].operator ObjectRef());
-    }
-  }
+      // parse size
+      if (args[2].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        if (args[2].type_code() == kDLInt) {
+          param.size = mxnet::Tuple<index_t>(1, args[2].operator int64_t());
+        } else {
+          param.size = mxnet::Tuple<index_t>(args[2].operator ObjectRef());
+        }
+      }
 
-  attrs.parsed = std::move(param);
-  attrs.op = op;
-  SetAttrDict<op::NumpyMultinomialParam>(&attrs);
-  inputs = num_inputs == 0 ? nullptr : inputs;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      attrs.parsed = std::move(param);
+      attrs.op     = op;
+      SetAttrDict<op::NumpyMultinomialParam>(&attrs);
+      inputs          = num_inputs == 0 ? nullptr : inputs;
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_pareto_op.cc b/src/api/operator/numpy/random/np_pareto_op.cc
index 6d85a2810adf..079b4810adbf 100644
--- a/src/api/operator/numpy/random/np_pareto_op.cc
+++ b/src/api/operator/numpy/random/np_pareto_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,44 +29,43 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.pareto")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_pareto");
-  op::NumpyParetoParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[1].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[1].operator int64_t());
-  } else if (args[1].type_code() == kNull) {
-      param.size = dmlc::nullopt;
-  } else {
-      param.size = Tuple<index_t>(args[1].operator ObjectRef());
-  }
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  NDArray* inputs[1];
-  int num_inputs = 0;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    param.a = args[0].operator double();
-    num_inputs = 0;
-  } else {
-    param.a = dmlc::nullopt;
-    inputs[0] = args[0].operator mxnet::NDArray*();
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyParetoParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs,
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_pareto");
+      op::NumpyParetoParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[1].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[1].operator int64_t());
+      } else if (args[1].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        param.size = Tuple<index_t>(args[1].operator ObjectRef());
+      }
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      NDArray* inputs[1];
+      int num_inputs = 0;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        param.a    = args[0].operator double();
+        num_inputs = 0;
+      } else {
+        param.a    = dmlc::nullopt;
+        inputs[0]  = args[0].operator mxnet::NDArray*();
+        num_inputs = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyParetoParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_power_op.cc b/src/api/operator/numpy/random/np_power_op.cc
index d532c6d4703b..8543c613e46d 100644
--- a/src/api/operator/numpy/random/np_power_op.cc
+++ b/src/api/operator/numpy/random/np_power_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,44 +29,43 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.powerd")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_powerd");
-  op::NumpyPowerParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[1].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[1].operator int64_t());
-  } else if (args[1].type_code() == kNull) {
-      param.size = dmlc::nullopt;
-  } else {
-      param.size = Tuple<index_t>(args[1].operator ObjectRef());
-  }
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  NDArray* inputs[1];
-  int num_inputs = 0;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    param.a = args[0].operator double();
-    num_inputs = 0;
-  } else {
-    param.a = dmlc::nullopt;
-    inputs[0] = args[0].operator mxnet::NDArray*();
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyPowerParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs,
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_powerd");
+      op::NumpyPowerParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[1].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[1].operator int64_t());
+      } else if (args[1].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        param.size = Tuple<index_t>(args[1].operator ObjectRef());
+      }
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      NDArray* inputs[1];
+      int num_inputs = 0;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        param.a    = args[0].operator double();
+        num_inputs = 0;
+      } else {
+        param.a    = dmlc::nullopt;
+        inputs[0]  = args[0].operator mxnet::NDArray*();
+        num_inputs = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyPowerParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_rayleigh_op.cc b/src/api/operator/numpy/random/np_rayleigh_op.cc
index 387e2cf61d20..df1d61c40dba 100644
--- a/src/api/operator/numpy/random/np_rayleigh_op.cc
+++ b/src/api/operator/numpy/random/np_rayleigh_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,44 +29,43 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.rayleigh")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_rayleigh");
-  op::NumpyRayleighParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[1].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[1].operator int64_t());
-  } else if (args[1].type_code() == kNull) {
-      param.size = dmlc::nullopt;
-  } else {
-      param.size = Tuple<index_t>(args[1].operator ObjectRef());
-  }
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  NDArray* inputs[1];
-  int num_inputs = 0;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    param.scale = args[0].operator double();
-    num_inputs = 0;
-  } else {
-    param.scale = dmlc::nullopt;
-    inputs[0] = args[0].operator mxnet::NDArray*();
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyRayleighParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs,
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_rayleigh");
+      op::NumpyRayleighParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[1].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[1].operator int64_t());
+      } else if (args[1].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        param.size = Tuple<index_t>(args[1].operator ObjectRef());
+      }
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      NDArray* inputs[1];
+      int num_inputs = 0;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        param.scale = args[0].operator double();
+        num_inputs  = 0;
+      } else {
+        param.scale = dmlc::nullopt;
+        inputs[0]   = args[0].operator mxnet::NDArray*();
+        num_inputs  = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyRayleighParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy/random/np_weibull_op.cc b/src/api/operator/numpy/random/np_weibull_op.cc
index a91b72f8cf74..3504f569f92f 100644
--- a/src/api/operator/numpy/random/np_weibull_op.cc
+++ b/src/api/operator/numpy/random/np_weibull_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,44 +29,43 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.weibull")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_weibull");
-  op::NumpyWeibullParam param;
-  nnvm::NodeAttrs attrs;
-  attrs.op = op;
-  if (args[1].type_code() == kDLInt) {
-      param.size = Tuple<index_t>(1, args[1].operator int64_t());
-  } else if (args[1].type_code() == kNull) {
-      param.size = dmlc::nullopt;
-  } else {
-      param.size = Tuple<index_t>(args[1].operator ObjectRef());
-  }
-  if (args[2].type_code() != kNull) {
-    attrs.dict["ctx"] = args[2].operator std::string();
-  }
-  NDArray* out = args[3].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  NDArray* inputs[1];
-  int num_inputs = 0;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    param.a = args[0].operator double();
-    num_inputs = 0;
-  } else {
-    param.a = dmlc::nullopt;
-    inputs[0] = args[0].operator mxnet::NDArray*();
-    num_inputs = 1;
-  }
-  attrs.parsed = param;
-  SetAttrDict<op::NumpyWeibullParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs,
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(3);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_weibull");
+      op::NumpyWeibullParam param;
+      nnvm::NodeAttrs attrs;
+      attrs.op = op;
+      if (args[1].type_code() == kDLInt) {
+        param.size = Tuple<index_t>(1, args[1].operator int64_t());
+      } else if (args[1].type_code() == kNull) {
+        param.size = dmlc::nullopt;
+      } else {
+        param.size = Tuple<index_t>(args[1].operator ObjectRef());
+      }
+      if (args[2].type_code() != kNull) {
+        attrs.dict["ctx"] = args[2].operator std::string();
+      }
+      NDArray* out      = args[3].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      NDArray* inputs[1];
+      int num_inputs = 0;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        param.a    = args[0].operator double();
+        num_inputs = 0;
+      } else {
+        param.a    = dmlc::nullopt;
+        inputs[0]  = args[0].operator mxnet::NDArray*();
+        num_inputs = 1;
+      }
+      attrs.parsed = param;
+      SetAttrDict<op::NumpyWeibullParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(3);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_activation_op.cc b/src/api/operator/numpy_extension/npx_activation_op.cc
index 27810fbc8ca6..32a0d6661d28 100644
--- a/src/api/operator/numpy_extension/npx_activation_op.cc
+++ b/src/api/operator/numpy_extension/npx_activation_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_activation_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_activation_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_activation_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -52,22 +53,22 @@ inline int String2MXNetActType(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.activation")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_activation");
-  op::ActivationParam param;
-  // act_type
-  param.act_type = String2MXNetActType(args[1].operator std::string());
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ActivationParam>(&attrs);
-  // inputs
-  NDArray* inputs[] = {args[0].operator NDArray*()};
-  int num_inputs = 1;
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_activation");
+      op::ActivationParam param;
+      // act_type
+      param.act_type = String2MXNetActType(args[1].operator std::string());
+      attrs.parsed   = param;
+      attrs.op       = op;
+      SetAttrDict<op::ActivationParam>(&attrs);
+      // inputs
+      NDArray* inputs[] = {args[0].operator NDArray*()};
+      int num_inputs    = 1;
+      int num_outputs   = 0;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret              = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_arange_like_op.cc b/src/api/operator/numpy_extension/npx_arange_like_op.cc
index 859e96373c86..07e37efe8145 100644
--- a/src/api/operator/numpy_extension/npx_arange_like_op.cc
+++ b/src/api/operator/numpy_extension/npx_arange_like_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_arange_like_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_arange_like_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_arange_like_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,50 +30,50 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.arange_like")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_arange_like");
-  op::RangeLikeParam param;
-  // inputs
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  // start
-  if (args[1].type_code() == kNull) {
-    param.start = 0.0;
-  } else {
-    param.start = args[1].operator double();
-  }
-  // step
-  if (args[2].type_code() == kNull) {
-    param.step = 1.0;
-  } else {
-    param.step = args[2].operator double();
-  }
-  // repeat
-  if (args[3].type_code() == kNull) {
-    param.repeat = 1;
-  } else {
-    param.repeat = args[3].operator int();
-  }
-  // ctx
-  if (args[4].type_code() != kNull) {
-    attrs.dict["ctx"] = args[4].operator std::string();
-  }
-  // axis
-  if (args[5].type_code() == kNull) {
-    param.axis = dmlc::nullopt;
-  } else {
-    param.axis = args[5].operator int();
-  }
-  attrs.op = op;
-  attrs.parsed = param;
-  SetAttrDict<op::RangeLikeParam>(&attrs);
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_arange_like");
+      op::RangeLikeParam param;
+      // inputs
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      // start
+      if (args[1].type_code() == kNull) {
+        param.start = 0.0;
+      } else {
+        param.start = args[1].operator double();
+      }
+      // step
+      if (args[2].type_code() == kNull) {
+        param.step = 1.0;
+      } else {
+        param.step = args[2].operator double();
+      }
+      // repeat
+      if (args[3].type_code() == kNull) {
+        param.repeat = 1;
+      } else {
+        param.repeat = args[3].operator int();
+      }
+      // ctx
+      if (args[4].type_code() != kNull) {
+        attrs.dict["ctx"] = args[4].operator std::string();
+      }
+      // axis
+      if (args[5].type_code() == kNull) {
+        param.axis = dmlc::nullopt;
+      } else {
+        param.axis = args[5].operator int();
+      }
+      attrs.op     = op;
+      attrs.parsed = param;
+      SetAttrDict<op::RangeLikeParam>(&attrs);
 
-  // outputs
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+      // outputs
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret            = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_batch_dot_op.cc b/src/api/operator/numpy_extension/npx_batch_dot_op.cc
index 314e8e528908..d764801859c5 100644
--- a/src/api/operator/numpy_extension/npx_batch_dot_op.cc
+++ b/src/api/operator/numpy_extension/npx_batch_dot_op.cc
@@ -44,42 +44,42 @@ inline int String2ForwardStype(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.batch_dot")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_batch_dot");
-  op::DotParam param;
-  // inputs
-  int num_inputs = 2;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // transpose_a
-  if (args[2].type_code() == kNull) {
-    param.transpose_a = false;
-  } else {
-    param.transpose_a = args[2].operator bool();
-  }
-  // transpose_b
-  if (args[3].type_code() == kNull) {
-    param.transpose_b = false;
-  } else {
-    param.transpose_b = args[3].operator bool();
-  }
-  // forward_stype
-  if (args[4].type_code() == kNull) {
-    param.forward_stype = dmlc::nullopt;
-  } else {
-    param.forward_stype = String2ForwardStype(args[4].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::DotParam>(&attrs);
-  int num_outputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_batch_dot");
+      op::DotParam param;
+      // inputs
+      int num_inputs = 2;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // transpose_a
+      if (args[2].type_code() == kNull) {
+        param.transpose_a = false;
+      } else {
+        param.transpose_a = args[2].operator bool();
+      }
+      // transpose_b
+      if (args[3].type_code() == kNull) {
+        param.transpose_b = false;
+      } else {
+        param.transpose_b = args[3].operator bool();
+      }
+      // forward_stype
+      if (args[4].type_code() == kNull) {
+        param.forward_stype = dmlc::nullopt;
+      } else {
+        param.forward_stype = String2ForwardStype(args[4].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::DotParam>(&attrs);
+      int num_outputs = 1;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_batch_norm_op.cc b/src/api/operator/numpy_extension/npx_batch_norm_op.cc
index dcf3ac4f0df7..a82703d9212e 100644
--- a/src/api/operator/numpy_extension/npx_batch_norm_op.cc
+++ b/src/api/operator/numpy_extension/npx_batch_norm_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_batch_norm_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_batch_norm_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_batch_norm_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,59 +30,59 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.batch_norm")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_batch_norm");
-  op::BatchNormParam param;
-  // eps
-  param.eps = args[5].operator double();
-  // momentum
-  param.momentum = args[6].operator double();
-  // fix_gamma
-  param.fix_gamma = args[7].operator bool();
-  // use_global_stats
-  param.use_global_stats = args[8].operator bool();
-  // output_mean_var
-  param.output_mean_var = args[9].operator bool();
-  // axis
-  param.axis = args[10].operator int();
-  // cudnn_off
-  param.cudnn_off = args[11].operator bool();
-  // min_calib_range
-  if (args[12].type_code() == kDLFloat || args[12].type_code() == kDLInt) {
-    param.min_calib_range = args[12].operator double();
-  } else {
-    param.min_calib_range = dmlc::nullopt;
-  }
-  // max_calib_range
-  if (args[13].type_code() == kDLFloat || args[13].type_code() == kDLInt) {
-    param.max_calib_range = args[13].operator double();
-  } else {
-    param.max_calib_range = dmlc::nullopt;
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::BatchNormParam>(&attrs);
-  // inputs
-  int num_inputs = 5;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_batch_norm");
+      op::BatchNormParam param;
+      // eps
+      param.eps = args[5].operator double();
+      // momentum
+      param.momentum = args[6].operator double();
+      // fix_gamma
+      param.fix_gamma = args[7].operator bool();
+      // use_global_stats
+      param.use_global_stats = args[8].operator bool();
+      // output_mean_var
+      param.output_mean_var = args[9].operator bool();
+      // axis
+      param.axis = args[10].operator int();
+      // cudnn_off
+      param.cudnn_off = args[11].operator bool();
+      // min_calib_range
+      if (args[12].type_code() == kDLFloat || args[12].type_code() == kDLInt) {
+        param.min_calib_range = args[12].operator double();
+      } else {
+        param.min_calib_range = dmlc::nullopt;
+      }
+      // max_calib_range
+      if (args[13].type_code() == kDLFloat || args[13].type_code() == kDLInt) {
+        param.max_calib_range = args[13].operator double();
+      } else {
+        param.max_calib_range = dmlc::nullopt;
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::BatchNormParam>(&attrs);
+      // inputs
+      int num_inputs = 5;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_broadcast_like_op.cc b/src/api/operator/numpy_extension/npx_broadcast_like_op.cc
index bd882665208e..3929a516f116 100644
--- a/src/api/operator/numpy_extension/npx_broadcast_like_op.cc
+++ b/src/api/operator/numpy_extension/npx_broadcast_like_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_broadcast_like_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_broadcast_like_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_broadcast_like_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,43 +30,43 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.broadcast_like")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_broadcast_like");
-  op::BroadcastLikeParam param;
-  // inputs
-  int num_inputs = 2;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // lhs_axes
-  if (args[2].type_code() == kNull) {
-    param.lhs_axes = dmlc::optional<mxnet::TShape>();
-  } else if (args[2].type_code() == kDLInt) {
-    param.lhs_axes = TShape(1, args[2].operator int64_t());
-  } else {
-    param.lhs_axes = mxnet::TShape(args[2].operator ObjectRef());
-  }
-  // rhs_axes
-  if (args[3].type_code() == kNull) {
-    param.rhs_axes = dmlc::optional<mxnet::TShape>();
-  } else if (args[3].type_code() == kDLInt) {
-    param.rhs_axes = TShape(1, args[3].operator int64_t());
-  } else {
-    param.rhs_axes = mxnet::TShape(args[3].operator ObjectRef());
-  }
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_broadcast_like");
+      op::BroadcastLikeParam param;
+      // inputs
+      int num_inputs = 2;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // lhs_axes
+      if (args[2].type_code() == kNull) {
+        param.lhs_axes = dmlc::optional<mxnet::TShape>();
+      } else if (args[2].type_code() == kDLInt) {
+        param.lhs_axes = TShape(1, args[2].operator int64_t());
+      } else {
+        param.lhs_axes = mxnet::TShape(args[2].operator ObjectRef());
+      }
+      // rhs_axes
+      if (args[3].type_code() == kNull) {
+        param.rhs_axes = dmlc::optional<mxnet::TShape>();
+      } else if (args[3].type_code() == kDLInt) {
+        param.rhs_axes = TShape(1, args[3].operator int64_t());
+      } else {
+        param.rhs_axes = mxnet::TShape(args[3].operator ObjectRef());
+      }
 
-  attrs.op = op;
-  attrs.parsed = param;
-  SetAttrDict<op::BroadcastLikeParam>(&attrs);
+      attrs.op     = op;
+      attrs.parsed = param;
+      SetAttrDict<op::BroadcastLikeParam>(&attrs);
 
-  // outputs
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-});
+      // outputs
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_control_flow_op.cc b/src/api/operator/numpy_extension/npx_control_flow_op.cc
index 52001d8f7bd1..5e422381e1e1 100644
--- a/src/api/operator/numpy_extension/npx_control_flow_op.cc
+++ b/src/api/operator/numpy_extension/npx_control_flow_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_control_flow_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_control_flow_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_control_flow_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -30,130 +31,128 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.foreach")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_foreach");
-  op::NPXForeachParam param;
-  int args_size = args.size();
-  int num_inputs = args_size - 7;
-  // inputs
-  nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(args[0].value().v_handle);
-  std::vector<std::shared_ptr<nnvm::Symbol> > subgraphs;
-  subgraphs.push_back(std::make_shared<nnvm::Symbol>(*sym));
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 1; i < num_inputs + 1; ++i) {
-    inputs.push_back(static_cast<mxnet::NDArray*>(args[i]));
-  }
-
-  param.num_args = num_inputs;
-  param.num_outputs = args[1+num_inputs].operator int();
-  param.num_out_data = args[2+num_inputs].operator int();
-  if (args[3+num_inputs].type_code() == kDLInt) {
-    param.in_state_locs = mxnet::Tuple<int64_t>(1, args[3+num_inputs].operator int64_t());
-  } else {
-    param.in_state_locs = mxnet::Tuple<int64_t>(args[3+num_inputs].operator ObjectRef());
-  }
-  if (args[4+num_inputs].type_code() == kDLInt) {
-    param.in_data_locs = mxnet::Tuple<int64_t>(1, args[4+num_inputs].operator int64_t());
-  } else {
-    param.in_data_locs = mxnet::Tuple<int64_t>(args[4+num_inputs].operator ObjectRef());
-  }
-  if (args[5+num_inputs].type_code() == kDLInt) {
-    param.remain_locs = mxnet::Tuple<int64_t>(1, args[5+num_inputs].operator int64_t());
-  } else {
-    param.remain_locs = mxnet::Tuple<int64_t>(args[5+num_inputs].operator ObjectRef());
-  }
-  if (args[6+num_inputs].type_code() == kDLInt) {
-    param.in_state_index = mxnet::Tuple<int64_t>(1, args[6+num_inputs].operator int64_t());
-  } else {
-    param.in_state_index = mxnet::Tuple<int64_t>(args[6+num_inputs].operator ObjectRef());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  attrs.subgraphs = subgraphs;
-  SetAttrDict<op::NPXForeachParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_foreach");
+      op::NPXForeachParam param;
+      int args_size  = args.size();
+      int num_inputs = args_size - 7;
+      // inputs
+      nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(args[0].value().v_handle);
+      std::vector<std::shared_ptr<nnvm::Symbol> > subgraphs;
+      subgraphs.push_back(std::make_shared<nnvm::Symbol>(*sym));
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 1; i < num_inputs + 1; ++i) {
+        inputs.push_back(static_cast<mxnet::NDArray*>(args[i]));
+      }
 
+      param.num_args     = num_inputs;
+      param.num_outputs  = args[1 + num_inputs].operator int();
+      param.num_out_data = args[2 + num_inputs].operator int();
+      if (args[3 + num_inputs].type_code() == kDLInt) {
+        param.in_state_locs = mxnet::Tuple<int64_t>(1, args[3 + num_inputs].operator int64_t());
+      } else {
+        param.in_state_locs = mxnet::Tuple<int64_t>(args[3 + num_inputs].operator ObjectRef());
+      }
+      if (args[4 + num_inputs].type_code() == kDLInt) {
+        param.in_data_locs = mxnet::Tuple<int64_t>(1, args[4 + num_inputs].operator int64_t());
+      } else {
+        param.in_data_locs = mxnet::Tuple<int64_t>(args[4 + num_inputs].operator ObjectRef());
+      }
+      if (args[5 + num_inputs].type_code() == kDLInt) {
+        param.remain_locs = mxnet::Tuple<int64_t>(1, args[5 + num_inputs].operator int64_t());
+      } else {
+        param.remain_locs = mxnet::Tuple<int64_t>(args[5 + num_inputs].operator ObjectRef());
+      }
+      if (args[6 + num_inputs].type_code() == kDLInt) {
+        param.in_state_index = mxnet::Tuple<int64_t>(1, args[6 + num_inputs].operator int64_t());
+      } else {
+        param.in_state_index = mxnet::Tuple<int64_t>(args[6 + num_inputs].operator ObjectRef());
+      }
+      attrs.parsed    = param;
+      attrs.op        = op;
+      attrs.subgraphs = subgraphs;
+      SetAttrDict<op::NPXForeachParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
 MXNET_REGISTER_API("_npx.while_loop")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_while_loop");
-  op::NPXWhileLoopParam param;
-  int args_size = args.size();
-  int num_inputs = args_size - 8;
-  // inputs
-  std::vector<std::shared_ptr<nnvm::Symbol> > subgraphs;
-  subgraphs.reserve(2);
-  for (int i = 0; i < 2; i++) {
-    nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(args[i].value().v_handle);
-    subgraphs.push_back(std::make_shared<nnvm::Symbol>(*sym));
-  }
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 2; i < num_inputs + 2; ++i) {
-    inputs.push_back(static_cast<mxnet::NDArray*>(args[i]));
-  }
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_while_loop");
+      op::NPXWhileLoopParam param;
+      int args_size  = args.size();
+      int num_inputs = args_size - 8;
+      // inputs
+      std::vector<std::shared_ptr<nnvm::Symbol> > subgraphs;
+      subgraphs.reserve(2);
+      for (int i = 0; i < 2; i++) {
+        nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(args[i].value().v_handle);
+        subgraphs.push_back(std::make_shared<nnvm::Symbol>(*sym));
+      }
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 2; i < num_inputs + 2; ++i) {
+        inputs.push_back(static_cast<mxnet::NDArray*>(args[i]));
+      }
 
-  param.num_args = num_inputs;
-  param.max_iterations = args[2+num_inputs].operator int();
-  if (args[3+num_inputs].type_code() == kDLInt) {
-    param.cond_input_locs = mxnet::Tuple<int64_t>(1, args[3+num_inputs].operator int64_t());
-  } else {
-    param.cond_input_locs = mxnet::Tuple<int64_t>(args[3+num_inputs].operator ObjectRef());
-  }
-  if (args[4+num_inputs].type_code() == kDLInt) {
-    param.func_input_locs = mxnet::Tuple<int64_t>(1, args[4+num_inputs].operator int64_t());
-  } else {
-    param.func_input_locs = mxnet::Tuple<int64_t>(args[4+num_inputs].operator ObjectRef());
-  }
-  if (args[5+num_inputs].type_code() == kDLInt) {
-    param.func_var_locs = mxnet::Tuple<int64_t>(1, args[5+num_inputs].operator int64_t());
-  } else {
-    param.func_var_locs = mxnet::Tuple<int64_t>(args[5+num_inputs].operator ObjectRef());
-  }
-  param.num_out_data = args[6+num_inputs].operator int();
-  param.num_outputs = args[7+num_inputs].operator int();
-  attrs.parsed = param;
-  attrs.op = op;
-  attrs.subgraphs = subgraphs;
-  SetAttrDict<op::NPXWhileLoopParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+      param.num_args       = num_inputs;
+      param.max_iterations = args[2 + num_inputs].operator int();
+      if (args[3 + num_inputs].type_code() == kDLInt) {
+        param.cond_input_locs = mxnet::Tuple<int64_t>(1, args[3 + num_inputs].operator int64_t());
+      } else {
+        param.cond_input_locs = mxnet::Tuple<int64_t>(args[3 + num_inputs].operator ObjectRef());
+      }
+      if (args[4 + num_inputs].type_code() == kDLInt) {
+        param.func_input_locs = mxnet::Tuple<int64_t>(1, args[4 + num_inputs].operator int64_t());
+      } else {
+        param.func_input_locs = mxnet::Tuple<int64_t>(args[4 + num_inputs].operator ObjectRef());
+      }
+      if (args[5 + num_inputs].type_code() == kDLInt) {
+        param.func_var_locs = mxnet::Tuple<int64_t>(1, args[5 + num_inputs].operator int64_t());
+      } else {
+        param.func_var_locs = mxnet::Tuple<int64_t>(args[5 + num_inputs].operator ObjectRef());
+      }
+      param.num_out_data = args[6 + num_inputs].operator int();
+      param.num_outputs  = args[7 + num_inputs].operator int();
+      attrs.parsed       = param;
+      attrs.op           = op;
+      attrs.subgraphs    = subgraphs;
+      SetAttrDict<op::NPXWhileLoopParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
-MXNET_REGISTER_API("_npx.cond")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npx.cond").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npx_cond");
   op::NPXCondParam param;
-  int args_size = args.size();
+  int args_size  = args.size();
   int num_inputs = args_size - 7;
   // inputs
   std::vector<std::shared_ptr<nnvm::Symbol> > subgraphs;
@@ -169,28 +168,28 @@ MXNET_REGISTER_API("_npx.cond")
   }
 
   param.num_args = num_inputs;
-  if (args[3+num_inputs].type_code() == kDLInt) {
-    param.cond_input_locs = mxnet::Tuple<int64_t>(1, args[3+num_inputs].operator int64_t());
+  if (args[3 + num_inputs].type_code() == kDLInt) {
+    param.cond_input_locs = mxnet::Tuple<int64_t>(1, args[3 + num_inputs].operator int64_t());
   } else {
-    param.cond_input_locs = mxnet::Tuple<int64_t>(args[3+num_inputs].operator ObjectRef());
+    param.cond_input_locs = mxnet::Tuple<int64_t>(args[3 + num_inputs].operator ObjectRef());
   }
-  if (args[4+num_inputs].type_code() == kDLInt) {
-    param.then_input_locs = mxnet::Tuple<int64_t>(1, args[4+num_inputs].operator int64_t());
+  if (args[4 + num_inputs].type_code() == kDLInt) {
+    param.then_input_locs = mxnet::Tuple<int64_t>(1, args[4 + num_inputs].operator int64_t());
   } else {
-    param.then_input_locs = mxnet::Tuple<int64_t>(args[4+num_inputs].operator ObjectRef());
+    param.then_input_locs = mxnet::Tuple<int64_t>(args[4 + num_inputs].operator ObjectRef());
   }
-  if (args[5+num_inputs].type_code() == kDLInt) {
-    param.else_input_locs = mxnet::Tuple<int64_t>(1, args[5+num_inputs].operator int64_t());
+  if (args[5 + num_inputs].type_code() == kDLInt) {
+    param.else_input_locs = mxnet::Tuple<int64_t>(1, args[5 + num_inputs].operator int64_t());
   } else {
-    param.else_input_locs = mxnet::Tuple<int64_t>(args[5+num_inputs].operator ObjectRef());
+    param.else_input_locs = mxnet::Tuple<int64_t>(args[5 + num_inputs].operator ObjectRef());
   }
-  param.num_outputs = args[6+num_inputs].operator int();
-  attrs.parsed = param;
-  attrs.op = op;
-  attrs.subgraphs = subgraphs;
+  param.num_outputs = args[6 + num_inputs].operator int();
+  attrs.parsed      = param;
+  attrs.op          = op;
+  attrs.subgraphs   = subgraphs;
   SetAttrDict<op::NPXCondParam>(&attrs);
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
   if (num_outputs == 1) {
     *ret = ndoutputs[0];
   } else {
diff --git a/src/api/operator/numpy_extension/npx_convolution_op.cc b/src/api/operator/numpy_extension/npx_convolution_op.cc
index adb1ec379283..9174d9190032 100644
--- a/src/api/operator/numpy_extension/npx_convolution_op.cc
+++ b/src/api/operator/numpy_extension/npx_convolution_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_convolution_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_convolution_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_convolution_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -63,126 +64,123 @@ inline int String2CudnnTune(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.convolution")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_convolution");
-  op::ConvolutionParam param;
-  int args_size = args.size();
-  // no_bias
-  if (args[args_size - 4].type_code() == kNull) {
-    param.no_bias = false;
-  } else {
-    param.no_bias = args[args_size - 4].operator bool();
-  }
-  // inputs
-  int num_inputs = param.no_bias ? 2 : 3;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // kernel
-  if (args[num_inputs].type_code() == kDLInt) {
-    param.kernel = TShape(1, args[num_inputs].operator int64_t());
-  } else {
-    param.kernel = TShape(args[num_inputs].operator ObjectRef());
-  }
-  // layout
-  if (args[num_inputs + 10].type_code() == kNull) {
-    param.layout = dmlc::nullopt;
-  } else {
-    param.layout = String2Layout(args[num_inputs + 10]);
-  }
-  // Check
-  if (param.kernel.ndim() == 1) {
-    param.layout = param.layout? param.layout.value() : mshadow::kNCW;
-  } else if (param.kernel.ndim() == 2) {
-    param.layout = param.layout ? param.layout.value() : mshadow::kNCHW;
-  } else {
-    CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim() << "D convolution not supported";
-    param.layout = param.layout ? param.layout.value(): mshadow::kNCDHW;
-  }
-  // stride
-  if (args[num_inputs + 1].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.stride = Shape1(1);
-    } else if (param.kernel.ndim() == 2) {
-      param.stride = Shape2(1, 1);
-    } else {
-      param.stride = Shape3(1, 1, 1);
-    }
-  } else if (args[num_inputs + 1].type_code() == kDLInt) {
-    param.stride = TShape(1, args[num_inputs + 1].operator int64_t());
-  } else {
-    param.stride = TShape(args[num_inputs + 1].operator ObjectRef());
-  }
-  // dilate
-  if (args[num_inputs + 2].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.dilate = Shape1(1);
-    } else if (param.kernel.ndim() == 2) {
-      param.dilate = Shape2(1, 1);
-    } else {
-      param.dilate = Shape3(1, 1, 1);
-    }
-  } else if (args[num_inputs + 2].type_code() == kDLInt) {
-    param.dilate = TShape(1, args[num_inputs + 2].operator int64_t());
-  } else {
-    param.dilate = TShape(args[num_inputs + 2].operator ObjectRef());
-  }
-  // pad
-  if (args[num_inputs + 3].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.pad = Shape1(0);
-    } else if (param.kernel.ndim() == 2) {
-      param.pad = Shape2(0, 0);
-    } else {
-      param.pad = Shape3(0, 0, 0);
-    }
-  } else if (args[num_inputs + 3].type_code() == kDLInt) {
-    param.pad = TShape(1, args[num_inputs + 3].operator int64_t());
-  } else {
-    param.pad = TShape(args[num_inputs + 3].operator ObjectRef());
-  }
-  // num_filter
-  param.num_filter = (uint32_t) (args[num_inputs + 4].operator int());
-  // num_group
-  param.num_group = (uint32_t) (args[num_inputs + 5].operator int());
-  // workspace
-  param.workspace = args[num_inputs + 6].operator uint64_t();
-  // cudnn_tune
-  if (args[num_inputs + 8].type_code() == kNull) {
-    param.cudnn_tune = dmlc::nullopt;
-  } else {
-    param.cudnn_tune = String2CudnnTune(args[num_inputs + 8]);
-  }
-  // cudnn_off
-  if (args[num_inputs + 9].type_code() == kNull) {
-    param.cudnn_off = false;
-  } else {
-    param.cudnn_off = args[num_inputs + 9].operator bool();
-  }
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_convolution");
+      op::ConvolutionParam param;
+      int args_size = args.size();
+      // no_bias
+      if (args[args_size - 4].type_code() == kNull) {
+        param.no_bias = false;
+      } else {
+        param.no_bias = args[args_size - 4].operator bool();
+      }
+      // inputs
+      int num_inputs = param.no_bias ? 2 : 3;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // kernel
+      if (args[num_inputs].type_code() == kDLInt) {
+        param.kernel = TShape(1, args[num_inputs].operator int64_t());
+      } else {
+        param.kernel = TShape(args[num_inputs].operator ObjectRef());
+      }
+      // layout
+      if (args[num_inputs + 10].type_code() == kNull) {
+        param.layout = dmlc::nullopt;
+      } else {
+        param.layout = String2Layout(args[num_inputs + 10]);
+      }
+      // Check
+      if (param.kernel.ndim() == 1) {
+        param.layout = param.layout ? param.layout.value() : mshadow::kNCW;
+      } else if (param.kernel.ndim() == 2) {
+        param.layout = param.layout ? param.layout.value() : mshadow::kNCHW;
+      } else {
+        CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim() << "D convolution not supported";
+        param.layout = param.layout ? param.layout.value() : mshadow::kNCDHW;
+      }
+      // stride
+      if (args[num_inputs + 1].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.stride = Shape1(1);
+        } else if (param.kernel.ndim() == 2) {
+          param.stride = Shape2(1, 1);
+        } else {
+          param.stride = Shape3(1, 1, 1);
+        }
+      } else if (args[num_inputs + 1].type_code() == kDLInt) {
+        param.stride = TShape(1, args[num_inputs + 1].operator int64_t());
+      } else {
+        param.stride = TShape(args[num_inputs + 1].operator ObjectRef());
+      }
+      // dilate
+      if (args[num_inputs + 2].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.dilate = Shape1(1);
+        } else if (param.kernel.ndim() == 2) {
+          param.dilate = Shape2(1, 1);
+        } else {
+          param.dilate = Shape3(1, 1, 1);
+        }
+      } else if (args[num_inputs + 2].type_code() == kDLInt) {
+        param.dilate = TShape(1, args[num_inputs + 2].operator int64_t());
+      } else {
+        param.dilate = TShape(args[num_inputs + 2].operator ObjectRef());
+      }
+      // pad
+      if (args[num_inputs + 3].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.pad = Shape1(0);
+        } else if (param.kernel.ndim() == 2) {
+          param.pad = Shape2(0, 0);
+        } else {
+          param.pad = Shape3(0, 0, 0);
+        }
+      } else if (args[num_inputs + 3].type_code() == kDLInt) {
+        param.pad = TShape(1, args[num_inputs + 3].operator int64_t());
+      } else {
+        param.pad = TShape(args[num_inputs + 3].operator ObjectRef());
+      }
+      // num_filter
+      param.num_filter = (uint32_t)(args[num_inputs + 4].operator int());
+      // num_group
+      param.num_group = (uint32_t)(args[num_inputs + 5].operator int());
+      // workspace
+      param.workspace = args[num_inputs + 6].operator uint64_t();
+      // cudnn_tune
+      if (args[num_inputs + 8].type_code() == kNull) {
+        param.cudnn_tune = dmlc::nullopt;
+      } else {
+        param.cudnn_tune = String2CudnnTune(args[num_inputs + 8]);
+      }
+      // cudnn_off
+      if (args[num_inputs + 9].type_code() == kNull) {
+        param.cudnn_off = false;
+      } else {
+        param.cudnn_off = args[num_inputs + 9].operator bool();
+      }
 
-  CHECK_EQ(param.kernel.ndim(), param.stride.ndim())
-    << "Stride must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while stride is "
-    << param.stride;
-  CHECK_EQ(param.kernel.ndim(), param.dilate.ndim())
-    << "Dilate must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while dilate is "
-    << param.dilate;
-  CHECK_EQ(param.kernel.ndim(), param.pad.ndim())
-    << "Padding must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while padding is "
-    << param.pad;
+      CHECK_EQ(param.kernel.ndim(), param.stride.ndim())
+          << "Stride must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while stride is " << param.stride;
+      CHECK_EQ(param.kernel.ndim(), param.dilate.ndim())
+          << "Dilate must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while dilate is " << param.dilate;
+      CHECK_EQ(param.kernel.ndim(), param.pad.ndim())
+          << "Padding must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while padding is " << param.pad;
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::ConvolutionParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::ConvolutionParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_deconvolution_op.cc b/src/api/operator/numpy_extension/npx_deconvolution_op.cc
index 838f4408bfa1..763d7402cfa4 100644
--- a/src/api/operator/numpy_extension/npx_deconvolution_op.cc
+++ b/src/api/operator/numpy_extension/npx_deconvolution_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_deconvolution_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_deconvolution_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_deconvolution_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -63,152 +64,148 @@ inline int String2CudnnTune(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.deconvolution")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_deconvolution");
-  op::DeconvolutionParam param;
-  int args_size = args.size();
-  // no_bias
-  if (args[args_size - 4].type_code() == kNull) {
-    param.no_bias = false;
-  } else {
-    param.no_bias = args[args_size - 4].operator bool();
-  }
-  // inputs
-  int num_inputs = param.no_bias ? 2 : 3;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // kernel
-  if (args[num_inputs].type_code() == kDLInt) {
-    param.kernel = TShape(1, args[num_inputs].operator int64_t());
-  } else {
-    param.kernel = TShape(args[num_inputs].operator ObjectRef());
-  }
-  // layout
-  if (args[num_inputs + 12].type_code() == kNull) {
-    param.layout = dmlc::nullopt;
-  } else {
-    param.layout = String2Layout(args[num_inputs + 12]);
-  }
-  // Check
-  if (param.kernel.ndim() == 1) {
-    param.layout = param.layout? param.layout.value() : mshadow::kNCW;
-  } else if (param.kernel.ndim() == 2) {
-    param.layout = param.layout ? param.layout.value() : mshadow::kNCHW;
-  } else {
-    CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim() << "D convolution not supported";
-    param.layout = param.layout ? param.layout.value(): mshadow::kNCDHW;
-  }
-  // stride
-  if (args[num_inputs + 1].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.stride = Shape1(1);
-    } else if (param.kernel.ndim() == 2) {
-      param.stride = Shape2(1, 1);
-    } else {
-      param.stride = Shape3(1, 1, 1);
-    }
-  } else if (args[num_inputs + 1].type_code() == kDLInt) {
-    param.stride = TShape(1, args[num_inputs + 1].operator int64_t());
-  } else {
-    param.stride = TShape(args[num_inputs + 1].operator ObjectRef());
-  }
-  // dilate
-  if (args[num_inputs + 2].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.dilate = Shape1(1);
-    } else if (param.kernel.ndim() == 2) {
-      param.dilate = Shape2(1, 1);
-    } else {
-      param.dilate = Shape3(1, 1, 1);
-    }
-  } else if (args[num_inputs + 2].type_code() == kDLInt) {
-    param.dilate = TShape(1, args[num_inputs + 2].operator int64_t());
-  } else {
-    param.dilate = TShape(args[num_inputs + 2].operator ObjectRef());
-  }
-  // pad
-  if (args[num_inputs + 3].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.pad = Shape1(0);
-    } else if (param.kernel.ndim() == 2) {
-      param.pad = Shape2(0, 0);
-    } else {
-      param.pad = Shape3(0, 0, 0);
-    }
-  } else if (args[num_inputs + 3].type_code() == kDLInt) {
-    param.pad = TShape(1, args[num_inputs + 3].operator int64_t());
-  } else {
-    param.pad = TShape(args[num_inputs + 3].operator ObjectRef());
-  }
-  // adj
-  if (args[num_inputs + 4].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.adj = Shape1(0);
-    } else if (param.kernel.ndim() == 2) {
-      param.adj = Shape2(0, 0);
-    } else {
-      param.adj = Shape3(0, 0, 0);
-    }
-  } else if (args[num_inputs + 4].type_code() == kDLInt) {
-    param.adj = TShape(1, args[num_inputs + 4].operator int64_t());
-  } else {
-    param.adj = TShape(args[num_inputs + 4].operator ObjectRef());
-  }
-  // target_shape
-  if (args[num_inputs + 5].type_code() != kNull) {
-    if (args[num_inputs + 5].type_code() == kDLInt) {
-      param.target_shape = TShape(1, args[num_inputs + 5].operator int64_t());
-    } else {
-      param.target_shape = TShape(args[num_inputs + 5].operator ObjectRef());
-    }
-  }
-  // num_filter
-  param.num_filter = (uint32_t) (args[num_inputs + 6].operator int());
-  // num_group
-  param.num_group = (uint32_t) (args[num_inputs + 7].operator int());
-  // workspace
-  param.workspace = args[num_inputs + 8].operator uint64_t();
-  // cudnn_tune
-  if (args[num_inputs + 10].type_code() == kNull) {
-    param.cudnn_tune = dmlc::nullopt;
-  } else {
-    param.cudnn_tune = String2CudnnTune(args[num_inputs + 10]);
-  }
-  // cudnn_off
-  if (args[num_inputs + 11].type_code() == kNull) {
-    param.cudnn_off = false;
-  } else {
-    param.cudnn_off = args[num_inputs + 11].operator bool();
-  }
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_deconvolution");
+      op::DeconvolutionParam param;
+      int args_size = args.size();
+      // no_bias
+      if (args[args_size - 4].type_code() == kNull) {
+        param.no_bias = false;
+      } else {
+        param.no_bias = args[args_size - 4].operator bool();
+      }
+      // inputs
+      int num_inputs = param.no_bias ? 2 : 3;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // kernel
+      if (args[num_inputs].type_code() == kDLInt) {
+        param.kernel = TShape(1, args[num_inputs].operator int64_t());
+      } else {
+        param.kernel = TShape(args[num_inputs].operator ObjectRef());
+      }
+      // layout
+      if (args[num_inputs + 12].type_code() == kNull) {
+        param.layout = dmlc::nullopt;
+      } else {
+        param.layout = String2Layout(args[num_inputs + 12]);
+      }
+      // Check
+      if (param.kernel.ndim() == 1) {
+        param.layout = param.layout ? param.layout.value() : mshadow::kNCW;
+      } else if (param.kernel.ndim() == 2) {
+        param.layout = param.layout ? param.layout.value() : mshadow::kNCHW;
+      } else {
+        CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim() << "D convolution not supported";
+        param.layout = param.layout ? param.layout.value() : mshadow::kNCDHW;
+      }
+      // stride
+      if (args[num_inputs + 1].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.stride = Shape1(1);
+        } else if (param.kernel.ndim() == 2) {
+          param.stride = Shape2(1, 1);
+        } else {
+          param.stride = Shape3(1, 1, 1);
+        }
+      } else if (args[num_inputs + 1].type_code() == kDLInt) {
+        param.stride = TShape(1, args[num_inputs + 1].operator int64_t());
+      } else {
+        param.stride = TShape(args[num_inputs + 1].operator ObjectRef());
+      }
+      // dilate
+      if (args[num_inputs + 2].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.dilate = Shape1(1);
+        } else if (param.kernel.ndim() == 2) {
+          param.dilate = Shape2(1, 1);
+        } else {
+          param.dilate = Shape3(1, 1, 1);
+        }
+      } else if (args[num_inputs + 2].type_code() == kDLInt) {
+        param.dilate = TShape(1, args[num_inputs + 2].operator int64_t());
+      } else {
+        param.dilate = TShape(args[num_inputs + 2].operator ObjectRef());
+      }
+      // pad
+      if (args[num_inputs + 3].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.pad = Shape1(0);
+        } else if (param.kernel.ndim() == 2) {
+          param.pad = Shape2(0, 0);
+        } else {
+          param.pad = Shape3(0, 0, 0);
+        }
+      } else if (args[num_inputs + 3].type_code() == kDLInt) {
+        param.pad = TShape(1, args[num_inputs + 3].operator int64_t());
+      } else {
+        param.pad = TShape(args[num_inputs + 3].operator ObjectRef());
+      }
+      // adj
+      if (args[num_inputs + 4].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.adj = Shape1(0);
+        } else if (param.kernel.ndim() == 2) {
+          param.adj = Shape2(0, 0);
+        } else {
+          param.adj = Shape3(0, 0, 0);
+        }
+      } else if (args[num_inputs + 4].type_code() == kDLInt) {
+        param.adj = TShape(1, args[num_inputs + 4].operator int64_t());
+      } else {
+        param.adj = TShape(args[num_inputs + 4].operator ObjectRef());
+      }
+      // target_shape
+      if (args[num_inputs + 5].type_code() != kNull) {
+        if (args[num_inputs + 5].type_code() == kDLInt) {
+          param.target_shape = TShape(1, args[num_inputs + 5].operator int64_t());
+        } else {
+          param.target_shape = TShape(args[num_inputs + 5].operator ObjectRef());
+        }
+      }
+      // num_filter
+      param.num_filter = (uint32_t)(args[num_inputs + 6].operator int());
+      // num_group
+      param.num_group = (uint32_t)(args[num_inputs + 7].operator int());
+      // workspace
+      param.workspace = args[num_inputs + 8].operator uint64_t();
+      // cudnn_tune
+      if (args[num_inputs + 10].type_code() == kNull) {
+        param.cudnn_tune = dmlc::nullopt;
+      } else {
+        param.cudnn_tune = String2CudnnTune(args[num_inputs + 10]);
+      }
+      // cudnn_off
+      if (args[num_inputs + 11].type_code() == kNull) {
+        param.cudnn_off = false;
+      } else {
+        param.cudnn_off = args[num_inputs + 11].operator bool();
+      }
 
-  CHECK_EQ(param.kernel.ndim(), param.stride.ndim())
-    << "Stride must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while stride is "
-    << param.stride;
-  CHECK_EQ(param.kernel.ndim(), param.dilate.ndim())
-    << "Dilate must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while dilate is "
-    << param.dilate;
-  CHECK_EQ(param.kernel.ndim(), param.pad.ndim())
-    << "Padding must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while padding is "
-    << param.pad;
-  CHECK_EQ(param.kernel.ndim(), param.adj.ndim())
-    << "Adjustment must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while adjustment is "
-    << param.adj;
+      CHECK_EQ(param.kernel.ndim(), param.stride.ndim())
+          << "Stride must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while stride is " << param.stride;
+      CHECK_EQ(param.kernel.ndim(), param.dilate.ndim())
+          << "Dilate must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while dilate is " << param.dilate;
+      CHECK_EQ(param.kernel.ndim(), param.pad.ndim())
+          << "Padding must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while padding is " << param.pad;
+      CHECK_EQ(param.kernel.ndim(), param.adj.ndim())
+          << "Adjustment must have the same number of dimensions with kernel_size,"
+          << "but kernel_size is set to " << param.kernel << " while adjustment is " << param.adj;
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::DeconvolutionParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::DeconvolutionParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_dropout_op.cc b/src/api/operator/numpy_extension/npx_dropout_op.cc
index e17320f30a2e..3ccc7f62fe9b 100644
--- a/src/api/operator/numpy_extension/npx_dropout_op.cc
+++ b/src/api/operator/numpy_extension/npx_dropout_op.cc
@@ -42,38 +42,38 @@ inline int String2Mode(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.dropout")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_dropout");
-  op::DropoutParam param;
-  // inputs
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  // p
-  param.p = args[1].operator double();
-  // mode
-  param.mode = String2Mode(args[2].operator std::string());
-  // axes
-  if (args[3].type_code() == kNull) {
-    param.axes = TShape(0, 0);
-  } else if (args[3].type_code() == kDLInt) {
-    param.axes = TShape(1, args[3].operator int64_t());
-  } else {
-    param.axes = TShape(args[3].operator ObjectRef());
-  }
-  // cudnn_off
-  if (args[4].type_code() == kNull) {
-    param.cudnn_off = false;
-  } else {
-    param.cudnn_off = args[4].operator bool();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::DropoutParam>(&attrs);
-  int num_outputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_dropout");
+      op::DropoutParam param;
+      // inputs
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      // p
+      param.p = args[1].operator double();
+      // mode
+      param.mode = String2Mode(args[2].operator std::string());
+      // axes
+      if (args[3].type_code() == kNull) {
+        param.axes = TShape(0, 0);
+      } else if (args[3].type_code() == kDLInt) {
+        param.axes = TShape(1, args[3].operator int64_t());
+      } else {
+        param.axes = TShape(args[3].operator ObjectRef());
+      }
+      // cudnn_off
+      if (args[4].type_code() == kNull) {
+        param.cudnn_off = false;
+      } else {
+        param.cudnn_off = args[4].operator bool();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::DropoutParam>(&attrs);
+      int num_outputs = 1;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_embedding_op.cc b/src/api/operator/numpy_extension/npx_embedding_op.cc
index 58b5e3ff740f..73d47c83c441 100644
--- a/src/api/operator/numpy_extension/npx_embedding_op.cc
+++ b/src/api/operator/numpy_extension/npx_embedding_op.cc
@@ -29,36 +29,36 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.embedding")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_embedding");
-  op::EmbeddingParam param;
-  // inputs
-  int num_inputs = 2;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // input_dim
-  param.input_dim = args[2].operator int64_t();
-  // output_dim
-  param.output_dim = args[3].operator int64_t();
-  // dtype
-  param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
-  // sparse_grad;
-  if (args[5].type_code() == kNull) {
-    param.sparse_grad = false;
-  } else {
-    param.sparse_grad = args[5].operator bool();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::EmbeddingParam>(&attrs);
-  int num_outputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_embedding");
+      op::EmbeddingParam param;
+      // inputs
+      int num_inputs = 2;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // input_dim
+      param.input_dim = args[2].operator int64_t();
+      // output_dim
+      param.output_dim = args[3].operator int64_t();
+      // dtype
+      param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
+      // sparse_grad;
+      if (args[5].type_code() == kNull) {
+        param.sparse_grad = false;
+      } else {
+        param.sparse_grad = args[5].operator bool();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::EmbeddingParam>(&attrs);
+      int num_outputs = 1;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_fully_connected_op.cc b/src/api/operator/numpy_extension/npx_fully_connected_op.cc
index d9ab3c02c61b..892c3e0037c9 100644
--- a/src/api/operator/numpy_extension/npx_fully_connected_op.cc
+++ b/src/api/operator/numpy_extension/npx_fully_connected_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_fully_connected_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_fully_connected_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_fully_connected_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,38 +30,38 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.fully_connected")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  int args_size = args.size();
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_fully_connected");
-  op::FullyConnectedParam param;
-  // no_bias
-  param.no_bias = args[args_size - 2].operator bool();
-  // inputs
-  int num_inputs = 2;
-  if (param.no_bias) {
-    num_inputs = 2;
-  } else {
-    num_inputs = 3;
-  }
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // num_hidden
-  param.num_hidden = args[args_size - 3].operator int();
-  // flatten
-  param.flatten = args[args_size - 1].operator bool();
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      int args_size = args.size();
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_fully_connected");
+      op::FullyConnectedParam param;
+      // no_bias
+      param.no_bias = args[args_size - 2].operator bool();
+      // inputs
+      int num_inputs = 2;
+      if (param.no_bias) {
+        num_inputs = 2;
+      } else {
+        num_inputs = 3;
+      }
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // num_hidden
+      param.num_hidden = args[args_size - 3].operator int();
+      // flatten
+      param.flatten = args[args_size - 1].operator bool();
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::FullyConnectedParam>(&attrs);
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::FullyConnectedParam>(&attrs);
 
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_group_norm_op.cc b/src/api/operator/numpy_extension/npx_group_norm_op.cc
index aff66c999b72..473e43e20616 100644
--- a/src/api/operator/numpy_extension/npx_group_norm_op.cc
+++ b/src/api/operator/numpy_extension/npx_group_norm_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_group_norm_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_group_norm_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_group_norm_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,39 +30,39 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.group_norm")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_group_norm");
-  op::GroupNormParam param;
-  // num_groups
-  param.num_groups = args[3];
-  // eps
-  param.eps = args[4].operator double();
-  // output_mean_var
-  param.output_mean_var = args[5].operator bool();
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::GroupNormParam>(&attrs);
-  // inputs
-  int num_inputs = 3;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_group_norm");
+      op::GroupNormParam param;
+      // num_groups
+      param.num_groups = args[3];
+      // eps
+      param.eps = args[4].operator double();
+      // output_mean_var
+      param.output_mean_var = args[5].operator bool();
+      attrs.parsed          = param;
+      attrs.op              = op;
+      SetAttrDict<op::GroupNormParam>(&attrs);
+      // inputs
+      int num_inputs = 3;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_layer_norm_op.cc b/src/api/operator/numpy_extension/npx_layer_norm_op.cc
index b638088d328d..6b79a95f7237 100644
--- a/src/api/operator/numpy_extension/npx_layer_norm_op.cc
+++ b/src/api/operator/numpy_extension/npx_layer_norm_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_layer_norm_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_layer_norm_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_layer_norm_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,51 +30,51 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.layer_norm")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_layer_norm");
-  op::LayerNormParam param;
-  // inputs
-  int num_inputs = 3;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // axis
-  if (args[3].type_code() == kNull) {
-    param.axis = -1;
-  } else {
-    param.axis = args[3].operator int();
-  }
-  // eps
-  if (args[4].type_code() == kNull) {
-    param.eps = 1e-5f;
-  } else {
-    param.eps = args[4].operator double();
-  }
-  // output_mean_var
-  if (args[5].type_code() == kNull) {
-    param.output_mean_var = false;
-  } else {
-    param.output_mean_var = args[5].operator bool();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::LayerNormParam>(&attrs);
-  int num_outputs = 3;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_layer_norm");
+      op::LayerNormParam param;
+      // inputs
+      int num_inputs = 3;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // axis
+      if (args[3].type_code() == kNull) {
+        param.axis = -1;
+      } else {
+        param.axis = args[3].operator int();
+      }
+      // eps
+      if (args[4].type_code() == kNull) {
+        param.eps = 1e-5f;
+      } else {
+        param.eps = args[4].operator double();
+      }
+      // output_mean_var
+      if (args[5].type_code() == kNull) {
+        param.output_mean_var = false;
+      } else {
+        param.output_mean_var = args[5].operator bool();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::LayerNormParam>(&attrs);
+      int num_outputs = 3;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_leaky_relu_op.cc b/src/api/operator/numpy_extension/npx_leaky_relu_op.cc
index 7717cf79c8ab..d4723bf46852 100644
--- a/src/api/operator/numpy_extension/npx_leaky_relu_op.cc
+++ b/src/api/operator/numpy_extension/npx_leaky_relu_op.cc
@@ -19,7 +19,8 @@
 
 /*!
  * \file npx_leaky_relu_op.cc
- * \brief Implementation of the API of functions in src/operator/numpy_extension/npx_leaky_relu_op.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/numpy_extension/npx_leaky_relu_op.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -50,55 +51,55 @@ inline int String2ActType(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.leaky_relu")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_leaky_relu");
-  op::LeakyReLUParam param;
-  int args_size = args.size();
-  // act_type
-  param.act_type = String2ActType(args[args_size - 4].operator std::string());
-  // inputs
-  int num_inputs = param.act_type == op::leakyrelu::kPReLU ? 2 : 1;
-  int num_outputs = param.act_type == op::leakyrelu::kPReLU ? 2 : 1;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // slope
-  if (args[args_size - 3].type_code() == kNull) {
-    param.slope = 0.25f;
-  } else {
-    param.slope = args[args_size - 3].operator double();
-  }
-  // lower_bound
-  if (args[args_size - 2].type_code() == kNull) {
-    param.lower_bound = 0.125f;
-  } else {
-    param.lower_bound = args[args_size - 2].operator double();
-  }
-  // upper_bound
-  if (args[args_size - 1].type_code() == kNull) {
-    param.upper_bound = 0.334f;
-  } else {
-    param.upper_bound = args[args_size - 1].operator double();
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::LeakyReLUParam>(&attrs);
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_leaky_relu");
+      op::LeakyReLUParam param;
+      int args_size = args.size();
+      // act_type
+      param.act_type = String2ActType(args[args_size - 4].operator std::string());
+      // inputs
+      int num_inputs  = param.act_type == op::leakyrelu::kPReLU ? 2 : 1;
+      int num_outputs = param.act_type == op::leakyrelu::kPReLU ? 2 : 1;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // slope
+      if (args[args_size - 3].type_code() == kNull) {
+        param.slope = 0.25f;
+      } else {
+        param.slope = args[args_size - 3].operator double();
+      }
+      // lower_bound
+      if (args[args_size - 2].type_code() == kNull) {
+        param.lower_bound = 0.125f;
+      } else {
+        param.lower_bound = args[args_size - 2].operator double();
+      }
+      // upper_bound
+      if (args[args_size - 1].type_code() == kNull) {
+        param.upper_bound = 0.334f;
+      } else {
+        param.upper_bound = args[args_size - 1].operator double();
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::LeakyReLUParam>(&attrs);
 
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_one_hot_op.cc b/src/api/operator/numpy_extension/npx_one_hot_op.cc
index 090d56e3b22e..e8d66af0d4de 100644
--- a/src/api/operator/numpy_extension/npx_one_hot_op.cc
+++ b/src/api/operator/numpy_extension/npx_one_hot_op.cc
@@ -29,38 +29,38 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.one_hot")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_one_hot");
-  op::OneHotParam param;
-  // inputs
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  // depth
-  param.depth = args[1].operator int64_t();
-  // on_value
-  if (args[2].type_code() == kNull) {
-    param.on_value = 1.0;
-  } else {
-    param.on_value = args[2].operator double();
-  }
-  // off_value
-  if (args[3].type_code() == kNull) {
-    param.off_value = 0.0;
-  } else {
-    param.off_value = args[3].operator double();
-  }
-  // dtype
-  if (args[4].type_code() != kNull) {
-    param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::OneHotParam>(&attrs);
-  int num_outputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_one_hot");
+      op::OneHotParam param;
+      // inputs
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+      // depth
+      param.depth = args[1].operator int64_t();
+      // on_value
+      if (args[2].type_code() == kNull) {
+        param.on_value = 1.0;
+      } else {
+        param.on_value = args[2].operator double();
+      }
+      // off_value
+      if (args[3].type_code() == kNull) {
+        param.off_value = 0.0;
+      } else {
+        param.off_value = args[3].operator double();
+      }
+      // dtype
+      if (args[4].type_code() != kNull) {
+        param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::OneHotParam>(&attrs);
+      int num_outputs = 1;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_pick_op.cc b/src/api/operator/numpy_extension/npx_pick_op.cc
index 423a91f41cfe..22cbc84ec44a 100644
--- a/src/api/operator/numpy_extension/npx_pick_op.cc
+++ b/src/api/operator/numpy_extension/npx_pick_op.cc
@@ -41,8 +41,7 @@ inline int String2PickMode(const std::string& s) {
   return 0;
 }
 
-MXNET_REGISTER_API("_npx.pick")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npx.pick").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npx_pick");
@@ -62,7 +61,7 @@ MXNET_REGISTER_API("_npx.pick")
     param.keepdims = args[4].operator bool();
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::PickParam>(&attrs);
   // inputs
   int num_inputs = 2;
@@ -72,8 +71,8 @@ MXNET_REGISTER_API("_npx.pick")
     inputs.push_back(args[i].operator mxnet::NDArray*());
   }
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+  *ret            = ndoutputs[0];
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_pooling_op.cc b/src/api/operator/numpy_extension/npx_pooling_op.cc
index 923e116f2a0f..0b743bda9909 100644
--- a/src/api/operator/numpy_extension/npx_pooling_op.cc
+++ b/src/api/operator/numpy_extension/npx_pooling_op.cc
@@ -82,99 +82,100 @@ inline int String2Convention(const std::string& s) {
 }
 
 MXNET_REGISTER_API("_npx.pooling")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  const nnvm::Op* op = Op::Get("_npx_pooling");
-  op::PoolingParam param;
-  // inputs
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      const nnvm::Op* op = Op::Get("_npx_pooling");
+      op::PoolingParam param;
+      // inputs
+      int num_inputs    = 1;
+      NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
 
-  // kernel
-  if (args[1].type_code() == kDLInt) {
-    param.kernel = TShape(1, args[1].operator int64_t());
-  } else {
-    param.kernel = TShape(args[1].operator ObjectRef());
-  }
-  // global pool
-  param.global_pool = args[6].operator bool();
-  // stride
-  if (args[2].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.stride = mshadow::Shape1(1);
-    } else if (param.kernel.ndim() == 2) {
-      param.stride = mshadow::Shape2(1, 1);
-    } else {
-      if (param.global_pool == false) {
-        CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim()
-            << "D pooling not supported. Only 1D, 2D, and 3D pooling are supported.";
+      // kernel
+      if (args[1].type_code() == kDLInt) {
+        param.kernel = TShape(1, args[1].operator int64_t());
+      } else {
+        param.kernel = TShape(args[1].operator ObjectRef());
+      }
+      // global pool
+      param.global_pool = args[6].operator bool();
+      // stride
+      if (args[2].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.stride = mshadow::Shape1(1);
+        } else if (param.kernel.ndim() == 2) {
+          param.stride = mshadow::Shape2(1, 1);
+        } else {
+          if (param.global_pool == false) {
+            CHECK_EQ(param.kernel.ndim(), 3U)
+                << param.kernel.ndim()
+                << "D pooling not supported. Only 1D, 2D, and 3D pooling are supported.";
+          }
+          param.stride = mshadow::Shape3(1, 1, 1);
+        }
+      } else if (args[2].type_code() == kDLInt) {
+        param.stride = TShape(1, args[2].operator int64_t());
+      } else {
+        param.stride = TShape(args[2].operator ObjectRef());
+      }
+      // pad
+      if (args[3].type_code() == kNull) {
+        if (param.kernel.ndim() == 1) {
+          param.pad = mshadow::Shape1(0);
+        } else if (param.kernel.ndim() == 2) {
+          param.pad = mshadow::Shape2(0, 0);
+        } else {
+          param.pad = mshadow::Shape3(0, 0, 0);
+        }
+      } else if (args[3].type_code() == kDLInt) {
+        param.pad = TShape(1, args[3].operator int64_t());
+      } else {
+        param.pad = TShape(args[3].operator ObjectRef());
+      }
+      // pool type
+      param.pool_type = String2PoolType(args[4].operator std::string());
+      // pooling convention
+      param.pooling_convention = String2Convention(args[5].operator std::string());
+      // cudnn_off
+      if (args[7].type_code() == kNull) {
+        param.cudnn_off = false;
+      } else {
+        param.cudnn_off = args[7].operator bool();
+      }
+      // p_value
+      if (args[8].type_code() == kNull) {
+        param.p_value = dmlc::nullopt;
+      } else {
+        param.p_value = args[8].operator int();
+      }
+      // count_include_pad
+      if (args[9].type_code() == kNull) {
+        param.count_include_pad = dmlc::nullopt;
+      } else {
+        param.count_include_pad = args[9].operator bool();
+      }
+      // layout
+      if (args[10].type_code() == kNull) {
+        param.layout = dmlc::nullopt;
+      } else {
+        param.layout = String2PoolingLayout(args[10]);
       }
-      param.stride = mshadow::Shape3(1, 1, 1);
-    }
-  } else if (args[2].type_code() == kDLInt) {
-    param.stride = TShape(1, args[2].operator int64_t());
-  } else {
-    param.stride = TShape(args[2].operator ObjectRef());
-  }
-  // pad
-  if (args[3].type_code() == kNull) {
-    if (param.kernel.ndim() == 1) {
-      param.pad = mshadow::Shape1(0);
-    } else if (param.kernel.ndim() == 2) {
-      param.pad = mshadow::Shape2(0, 0);
-    } else {
-      param.pad = mshadow::Shape3(0, 0, 0);
-    }
-  } else if (args[3].type_code() == kDLInt) {
-    param.pad = TShape(1, args[3].operator int64_t());
-  } else {
-    param.pad = TShape(args[3].operator ObjectRef());
-  }
-  // pool type
-  param.pool_type = String2PoolType(args[4].operator std::string());
-  // pooling convention
-  param.pooling_convention = String2Convention(args[5].operator std::string());
-  // cudnn_off
-  if (args[7].type_code() == kNull) {
-    param.cudnn_off = false;
-  } else {
-    param.cudnn_off = args[7].operator bool();
-  }
-  // p_value
-  if (args[8].type_code() == kNull) {
-    param.p_value = dmlc::nullopt;
-  } else {
-    param.p_value = args[8].operator int();
-  }
-  // count_include_pad
-  if (args[9].type_code() == kNull) {
-    param.count_include_pad = dmlc::nullopt;
-  } else {
-    param.count_include_pad = args[9].operator bool();
-  }
-  // layout
-  if (args[10].type_code() == kNull) {
-    param.layout = dmlc::nullopt;
-  } else {
-    param.layout = String2PoolingLayout(args[10]);
-  }
 
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::PoolingParam>(&attrs);
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  if (num_outputs == 1) {
-    *ret = ndoutputs[0];
-  } else {
-    std::vector<NDArrayHandle> ndarray_handles;
-    ndarray_handles.reserve(num_outputs);
-    for (int i = 0; i < num_outputs; ++i) {
-      ndarray_handles.emplace_back(ndoutputs[i]);
-    }
-    *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
-  }
-});
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::PoolingParam>(&attrs);
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+      if (num_outputs == 1) {
+        *ret = ndoutputs[0];
+      } else {
+        std::vector<NDArrayHandle> ndarray_handles;
+        ndarray_handles.reserve(num_outputs);
+        for (int i = 0; i < num_outputs; ++i) {
+          ndarray_handles.emplace_back(ndoutputs[i]);
+        }
+        *ret = ADT(0, ndarray_handles.begin(), ndarray_handles.end());
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_rnn_op.cc b/src/api/operator/numpy_extension/npx_rnn_op.cc
index 6d94b390c4d2..7d75e13dfb5e 100644
--- a/src/api/operator/numpy_extension/npx_rnn_op.cc
+++ b/src/api/operator/numpy_extension/npx_rnn_op.cc
@@ -45,13 +45,12 @@ inline int String2ComputeMode(const std::string& s) {
   return 0;
 }
 
-MXNET_REGISTER_API("_npx.rnn")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npx.rnn").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npx_rnn");
   op::RNNParam param;
-  int args_size = args.size();
+  int args_size  = args.size();
   int num_inputs = 0;
 
   // mode
@@ -63,7 +62,8 @@ MXNET_REGISTER_API("_npx.rnn")
   } else {
     param.use_sequence_length = args[args_size - 5].operator bool();
   }
-  if (param.use_sequence_length) num_inputs += 1;
+  if (param.use_sequence_length)
+    num_inputs += 1;
   // inputs
   std::vector<NDArray*> inputs;
   inputs.reserve(num_inputs);
@@ -71,9 +71,9 @@ MXNET_REGISTER_API("_npx.rnn")
     inputs.push_back(args[i].operator mxnet::NDArray*());
   }
   // state_size
-  param.state_size = (uint32_t) (args[args_size - 11].operator int());
+  param.state_size = (uint32_t)(args[args_size - 11].operator int());
   // num_layers
-  param.num_layers = (uint32_t) (args[args_size - 10].operator int());
+  param.num_layers = (uint32_t)(args[args_size - 10].operator int());
   // bidirectional
   if (args[args_size - 9].type_code() == kNull) {
     param.bidirectional = false;
@@ -120,11 +120,11 @@ MXNET_REGISTER_API("_npx.rnn")
   param.seq_length_ = 0;
   param.batch_size_ = 0;
   param.input_size_ = 0;
-  attrs.parsed = param;
-  attrs.op = op;
+  attrs.parsed      = param;
+  attrs.op          = op;
   SetAttrDict<op::RNNParam>(&attrs);
   int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
   if (num_outputs == 1) {
     *ret = ndoutputs[0];
   } else {
diff --git a/src/api/operator/numpy_extension/npx_softmax_op.cc b/src/api/operator/numpy_extension/npx_softmax_op.cc
index 6e934ed4a64f..6c8f9f438499 100644
--- a/src/api/operator/numpy_extension/npx_softmax_op.cc
+++ b/src/api/operator/numpy_extension/npx_softmax_op.cc
@@ -29,200 +29,200 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npx.softmax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  static const nnvm::Op* op = Op::Get("_npx_softmax");
-  op::SoftmaxParam param;
-  int args_size = args.size();
-  // inputs
-  int num_inputs = args_size - 4;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-
-  // parse use_length
-  if (args[args_size - 2].type_code() == kNull) {
-    param.use_length = false;
-  } else {
-    param.use_length = args[args_size - 2].operator bool();
-  }
-
-  // parse axis
-  if (args[args_size - 4].type_code() == kDLInt) {
-    param.axis = args[args_size - 4].operator int();
-  } else if (args[args_size - 4].type_code() == kDLFloat) {
-    param.axis = static_cast<int>(args[args_size - 4].operator double());
-  } else {
-    param.axis = -1;
-  }
-
-  // parse temperature
-  if (args[args_size - 3].type_code() == kNull) {
-    param.temperature = dmlc::nullopt;
-  } else {
-    param.temperature = args[args_size - 3].operator double();
-  }
-
-  // parse dtype
-  if (args[args_size - 1].type_code() == kNull) {
-    param.dtype = dmlc::nullopt;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[args_size - 1].operator std::string());
-  }
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SoftmaxParam>(&attrs);
-
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      static const nnvm::Op* op = Op::Get("_npx_softmax");
+      op::SoftmaxParam param;
+      int args_size = args.size();
+      // inputs
+      int num_inputs = args_size - 4;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+
+      // parse use_length
+      if (args[args_size - 2].type_code() == kNull) {
+        param.use_length = false;
+      } else {
+        param.use_length = args[args_size - 2].operator bool();
+      }
+
+      // parse axis
+      if (args[args_size - 4].type_code() == kDLInt) {
+        param.axis = args[args_size - 4].operator int();
+      } else if (args[args_size - 4].type_code() == kDLFloat) {
+        param.axis = static_cast<int>(args[args_size - 4].operator double());
+      } else {
+        param.axis = -1;
+      }
+
+      // parse temperature
+      if (args[args_size - 3].type_code() == kNull) {
+        param.temperature = dmlc::nullopt;
+      } else {
+        param.temperature = args[args_size - 3].operator double();
+      }
+
+      // parse dtype
+      if (args[args_size - 1].type_code() == kNull) {
+        param.dtype = dmlc::nullopt;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[args_size - 1].operator std::string());
+      }
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::SoftmaxParam>(&attrs);
+
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npx.log_softmax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  static const nnvm::Op* op = Op::Get("_npx_log_softmax");
-  op::SoftmaxParam param;
-
-  int args_size = args.size();
-  // inputs
-  int num_inputs = args_size - 4;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-
-  // parse use_length
-  if (args[args_size - 2].type_code() == kNull) {
-    param.use_length = false;
-  } else {
-    param.use_length = args[args_size - 2].operator bool();
-  }
-
-  // parse axis
-  if (args[args_size - 4].type_code() == kDLInt) {
-    param.axis = args[args_size - 4].operator int();
-  } else if (args[args_size - 4].type_code() == kDLFloat) {
-    param.axis = static_cast<int>(args[args_size - 4].operator double());
-  } else {
-    param.axis = -1;
-  }
-
-  // parse temperature
-  if (args[args_size - 3].type_code() == kNull) {
-    param.temperature = dmlc::nullopt;
-  } else {
-    param.temperature = args[args_size - 3].operator double();
-  }
-
-  // parse dtype
-  if (args[args_size - 1].type_code() == kNull) {
-    param.dtype = dmlc::nullopt;
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[args_size - 1].operator std::string());
-  }
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::SoftmaxParam>(&attrs);
-
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      static const nnvm::Op* op = Op::Get("_npx_log_softmax");
+      op::SoftmaxParam param;
+
+      int args_size = args.size();
+      // inputs
+      int num_inputs = args_size - 4;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+
+      // parse use_length
+      if (args[args_size - 2].type_code() == kNull) {
+        param.use_length = false;
+      } else {
+        param.use_length = args[args_size - 2].operator bool();
+      }
+
+      // parse axis
+      if (args[args_size - 4].type_code() == kDLInt) {
+        param.axis = args[args_size - 4].operator int();
+      } else if (args[args_size - 4].type_code() == kDLFloat) {
+        param.axis = static_cast<int>(args[args_size - 4].operator double());
+      } else {
+        param.axis = -1;
+      }
+
+      // parse temperature
+      if (args[args_size - 3].type_code() == kNull) {
+        param.temperature = dmlc::nullopt;
+      } else {
+        param.temperature = args[args_size - 3].operator double();
+      }
+
+      // parse dtype
+      if (args[args_size - 1].type_code() == kNull) {
+        param.dtype = dmlc::nullopt;
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[args_size - 1].operator std::string());
+      }
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::SoftmaxParam>(&attrs);
+
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npx.masked_softmax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  static const nnvm::Op* op = Op::Get("_npx_masked_softmax");
-  op::MaskedSoftmaxParam param;
-
-  // inputs
-  int num_inputs = 2;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // parse axis
-  if (args[2].type_code() == kDLInt) {
-    param.axis = args[2].operator int();
-  } else if (args[2].type_code() == kDLFloat) {
-    param.axis = static_cast<int>(args[2].operator double());
-  } else {
-    param.axis = -1;
-  }
-  // parse temperature
-  if (args[3].type_code() == kNull) {
-    param.temperature = dmlc::nullopt;
-  } else {
-    param.temperature = args[3].operator double();
-  }
-  // parse normalize
-  if (args[4].type_code() == kNull) {
-    param.normalize = true;
-  } else {
-    param.normalize = args[4].operator bool();
-  }
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::MaskedSoftmaxParam>(&attrs);
-
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      static const nnvm::Op* op = Op::Get("_npx_masked_softmax");
+      op::MaskedSoftmaxParam param;
+
+      // inputs
+      int num_inputs = 2;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // parse axis
+      if (args[2].type_code() == kDLInt) {
+        param.axis = args[2].operator int();
+      } else if (args[2].type_code() == kDLFloat) {
+        param.axis = static_cast<int>(args[2].operator double());
+      } else {
+        param.axis = -1;
+      }
+      // parse temperature
+      if (args[3].type_code() == kNull) {
+        param.temperature = dmlc::nullopt;
+      } else {
+        param.temperature = args[3].operator double();
+      }
+      // parse normalize
+      if (args[4].type_code() == kNull) {
+        param.normalize = true;
+      } else {
+        param.normalize = args[4].operator bool();
+      }
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::MaskedSoftmaxParam>(&attrs);
+
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 MXNET_REGISTER_API("_npx.masked_log_softmax")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  nnvm::NodeAttrs attrs;
-  static const nnvm::Op* op = Op::Get("_npx_masked_log_softmax");
-  op::MaskedSoftmaxParam param;
-
-  // inputs
-  int num_inputs = 2;
-  std::vector<NDArray*> inputs;
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  // parse axis
-  if (args[2].type_code() == kDLInt) {
-    param.axis = args[2].operator int();
-  } else if (args[2].type_code() == kDLFloat) {
-    param.axis = static_cast<int>(args[2].operator double());
-  } else {
-    param.axis = -1;
-  }
-  // parse temperature
-  if (args[3].type_code() == kNull) {
-    param.temperature = dmlc::nullopt;
-  } else {
-    param.temperature = args[3].operator double();
-  }
-  // parse normalize
-  if (args[4].type_code() == kNull) {
-    param.normalize = true;
-  } else {
-    param.normalize = args[4].operator bool();
-  }
-
-  attrs.parsed = param;
-  attrs.op = op;
-  SetAttrDict<op::MaskedSoftmaxParam>(&attrs);
-
-  int num_outputs = 0;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
-  *ret = ndoutputs[0];
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      nnvm::NodeAttrs attrs;
+      static const nnvm::Op* op = Op::Get("_npx_masked_log_softmax");
+      op::MaskedSoftmaxParam param;
+
+      // inputs
+      int num_inputs = 2;
+      std::vector<NDArray*> inputs;
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      // parse axis
+      if (args[2].type_code() == kDLInt) {
+        param.axis = args[2].operator int();
+      } else if (args[2].type_code() == kDLFloat) {
+        param.axis = static_cast<int>(args[2].operator double());
+      } else {
+        param.axis = -1;
+      }
+      // parse temperature
+      if (args[3].type_code() == kNull) {
+        param.temperature = dmlc::nullopt;
+      } else {
+        param.temperature = args[3].operator double();
+      }
+      // parse normalize
+      if (args[4].type_code() == kNull) {
+        param.normalize = true;
+      } else {
+        param.normalize = args[4].operator bool();
+      }
+
+      attrs.parsed = param;
+      attrs.op     = op;
+      SetAttrDict<op::MaskedSoftmaxParam>(&attrs);
+
+      int num_outputs = 0;
+      auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, nullptr);
+      *ret            = ndoutputs[0];
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/numpy_extension/npx_topk_op.cc b/src/api/operator/numpy_extension/npx_topk_op.cc
index 6fcea5ae5591..af200f59e5f8 100644
--- a/src/api/operator/numpy_extension/npx_topk_op.cc
+++ b/src/api/operator/numpy_extension/npx_topk_op.cc
@@ -45,15 +45,14 @@ inline int String2ReturnType(const std::string& s) {
   return 0;
 }
 
-MXNET_REGISTER_API("_npx.topk")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npx.topk").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   const nnvm::Op* op = Op::Get("_npx_topk");
   op::TopKParam param;
   // inputs
-  int num_inputs = 1;
-  NDArray* inputs[] = {args[0].operator mxnet::NDArray *()};
+  int num_inputs    = 1;
+  NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
   // axis
   if (args[1].type_code() == kNull) {
     param.axis = dmlc::nullopt;
@@ -75,12 +74,12 @@ MXNET_REGISTER_API("_npx.topk")
     param.is_ascend = args[4].operator bool();
   }
   // dtype
-  param.dtype = String2MXNetTypeWithBool(args[5].operator std::string());
+  param.dtype  = String2MXNetTypeWithBool(args[5].operator std::string());
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::TopKParam>(&attrs);
   int num_outputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  auto ndoutputs  = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
   if (num_outputs == 1) {
     *ret = ndoutputs[0];
   } else {
diff --git a/src/api/operator/op_utils.cc b/src/api/operator/op_utils.cc
index 1cf813eb8688..2424ef67d7ab 100644
--- a/src/api/operator/op_utils.cc
+++ b/src/api/operator/op_utils.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
diff --git a/src/api/operator/op_utils.h b/src/api/operator/op_utils.h
index 285919cd14c4..b50a4f6a6fb8 100644
--- a/src/api/operator/op_utils.h
+++ b/src/api/operator/op_utils.h
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
diff --git a/src/api/operator/random/np_gamma_op.cc b/src/api/operator/random/np_gamma_op.cc
index 2778ff6450e6..a543e2b6c4d3 100644
--- a/src/api/operator/random/np_gamma_op.cc
+++ b/src/api/operator/random/np_gamma_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,8 +29,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.gamma")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.gamma").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_gamma");
   nnvm::NodeAttrs attrs;
@@ -53,7 +52,7 @@ MXNET_REGISTER_API("_npi.gamma")
       }
     } else {
       // 'shape' is numeric types but 'scale' is not
-      num_inputs = 1;
+      num_inputs  = 1;
       param.scale = dmlc::nullopt;
       inputs.push_back(args[1].operator mxnet::NDArray*());
     }
@@ -70,15 +69,14 @@ MXNET_REGISTER_API("_npi.gamma")
       }
     } else {
       // nither 'shape' or 'scale' is numeric types
-      num_inputs = 2;
+      num_inputs  = 2;
       param.scale = dmlc::nullopt;
       inputs.push_back(args[1].operator mxnet::NDArray*());
     }
   }
   if (args[2].type_code() == kNull) {
     param.size = dmlc::optional<mxnet::Tuple<index_t>>();
-  } else if (args[2].type_code() == kDLInt ||
-             args[2].type_code() == kDLFloat) {
+  } else if (args[2].type_code() == kDLInt || args[2].type_code() == kDLFloat) {
     param.size = Tuple<index_t>(1, args[2].operator int64_t());
   } else {
     param.size = Tuple<index_t>(args[2].operator ObjectRef());
@@ -88,11 +86,11 @@ MXNET_REGISTER_API("_npi.gamma")
   } else {
     param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
   }
-  NDArray* out = args[5].operator mxnet::NDArray*();
+  NDArray* out      = args[5].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  attrs.parsed = param;
-  attrs.op = op;
+  int num_outputs   = out != nullptr;
+  attrs.parsed      = param;
+  attrs.op          = op;
   if (args[3].type_code() != kNull) {
     attrs.dict["ctx"] = args[3].operator std::string();
   }
diff --git a/src/api/operator/random/np_normal_op.cc b/src/api/operator/random/np_normal_op.cc
index 08cf4d0ec644..5fd22eed8048 100644
--- a/src/api/operator/random/np_normal_op.cc
+++ b/src/api/operator/random/np_normal_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,69 +30,67 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.normal")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_normal");
-  nnvm::NodeAttrs attrs;
-  op::NumpyNormalParam param;
-  int num_inputs = 0;
-  std::vector<NDArray*> inputs;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
-      // 'loc' and 'scale' are both numeric types
-      num_inputs = 0;
-      param.loc = args[0].operator double();
-      param.scale = args[1].operator double();
-    } else {
-      // 'loc' is numeric types but 'scale' is not numeric types
-      num_inputs = 1;
-      param.loc = args[0].operator double();
-      param.scale = dmlc::nullopt;
-      inputs.push_back(args[1].operator mxnet::NDArray*());
-    }
-  } else {
-    if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
-      // 'loc' is not numeric types but 'scale' is numeric types
-      num_inputs = 1;
-      param.loc = dmlc::nullopt;
-      param.scale = args[1].operator double();
-      inputs.push_back(args[0].operator mxnet::NDArray*());
-    } else {
-      // nither 'loc' or 'scale' is numeric types
-      num_inputs = 2;
-      inputs.push_back(args[0].operator mxnet::NDArray*());
-      inputs.push_back(args[1].operator mxnet::NDArray*());
-    }
-  }
-  if (args[2].type_code() == kNull) {
-    param.size = dmlc::optional<mxnet::Tuple<index_t>>();
-  } else if (args[2].type_code() == kDLInt ||
-             args[2].type_code() == kDLFloat) {
-    param.size = Tuple<index_t>(1, args[2].operator int64_t());
-  } else {
-    param.size = Tuple<index_t>(args[2].operator ObjectRef());
-  }
-  if (args[4].type_code() == kNull) {
-    param.dtype = mxnet::common::GetDefaultDtype();
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  if (args[3].type_code() != kNull) {
-    attrs.dict["ctx"] = args[3].operator std::string();
-  }
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  SetAttrDict<op::NumpyNormalParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(),
-                          &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(5);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_normal");
+      nnvm::NodeAttrs attrs;
+      op::NumpyNormalParam param;
+      int num_inputs = 0;
+      std::vector<NDArray*> inputs;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
+          // 'loc' and 'scale' are both numeric types
+          num_inputs  = 0;
+          param.loc   = args[0].operator double();
+          param.scale = args[1].operator double();
+        } else {
+          // 'loc' is numeric types but 'scale' is not numeric types
+          num_inputs  = 1;
+          param.loc   = args[0].operator double();
+          param.scale = dmlc::nullopt;
+          inputs.push_back(args[1].operator mxnet::NDArray*());
+        }
+      } else {
+        if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
+          // 'loc' is not numeric types but 'scale' is numeric types
+          num_inputs  = 1;
+          param.loc   = dmlc::nullopt;
+          param.scale = args[1].operator double();
+          inputs.push_back(args[0].operator mxnet::NDArray*());
+        } else {
+          // nither 'loc' or 'scale' is numeric types
+          num_inputs = 2;
+          inputs.push_back(args[0].operator mxnet::NDArray*());
+          inputs.push_back(args[1].operator mxnet::NDArray*());
+        }
+      }
+      if (args[2].type_code() == kNull) {
+        param.size = dmlc::optional<mxnet::Tuple<index_t>>();
+      } else if (args[2].type_code() == kDLInt || args[2].type_code() == kDLFloat) {
+        param.size = Tuple<index_t>(1, args[2].operator int64_t());
+      } else {
+        param.size = Tuple<index_t>(args[2].operator ObjectRef());
+      }
+      if (args[4].type_code() == kNull) {
+        param.dtype = mxnet::common::GetDefaultDtype();
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      if (args[3].type_code() != kNull) {
+        attrs.dict["ctx"] = args[3].operator std::string();
+      }
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      SetAttrDict<op::NumpyNormalParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(5);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/random/np_randint_op.cc b/src/api/operator/random/np_randint_op.cc
index 8e05822fa907..4f6128cde038 100644
--- a/src/api/operator/random/np_randint_op.cc
+++ b/src/api/operator/random/np_randint_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,39 +30,39 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.randint")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_random_randint");
-  nnvm::NodeAttrs attrs;
-  op::SampleRandIntParam param;
-  int num_inputs = 0;
-  param.low = args[0].operator int();
-  param.high = args[1].operator int();
-  if (args[2].type_code() == kDLInt) {
-    param.shape = TShape(1, args[2].operator int64_t());
-  } else {
-    param.shape = TShape(args[2].operator ObjectRef());
-  }
-  if (args[3].type_code() == kNull) {
-    param.dtype = mxnet::common::GetDefaultDtype();
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  if (args[4].type_code() != kNull) {
-    attrs.dict["ctx"] = args[4].operator std::string();
-  }
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  SetAttrDict<op::SampleRandIntParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, nullptr, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(5);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_random_randint");
+      nnvm::NodeAttrs attrs;
+      op::SampleRandIntParam param;
+      int num_inputs = 0;
+      param.low      = args[0].operator int();
+      param.high     = args[1].operator int();
+      if (args[2].type_code() == kDLInt) {
+        param.shape = TShape(1, args[2].operator int64_t());
+      } else {
+        param.shape = TShape(args[2].operator ObjectRef());
+      }
+      if (args[3].type_code() == kNull) {
+        param.dtype = mxnet::common::GetDefaultDtype();
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[3].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      if (args[4].type_code() != kNull) {
+        attrs.dict["ctx"] = args[4].operator std::string();
+      }
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      SetAttrDict<op::SampleRandIntParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, nullptr, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(5);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/random/np_uniform_op.cc b/src/api/operator/random/np_uniform_op.cc
index cbe791ca2a72..3cb2daa720ea 100644
--- a/src/api/operator/random/np_uniform_op.cc
+++ b/src/api/operator/random/np_uniform_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -30,68 +30,67 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.uniform")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_uniform");
-  nnvm::NodeAttrs attrs;
-  op::NumpyUniformParam param;
-  int num_inputs = 0;
-  std::vector<NDArray*> inputs;
-  if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
-    if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
-      // 'low' and 'high' are both numeric types
-      num_inputs = 0;
-      param.low = args[0].operator double();
-      param.high = args[1].operator double();
-    } else {
-      // 'low' is numeric types but 'high' is not numeric types
-      num_inputs = 1;
-      param.low = args[0].operator double();
-      param.high = dmlc::nullopt;
-    }
-  } else {
-    if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
-      // 'low' is not numeric types but 'high' is numeric types
-      num_inputs = 1;
-      param.low = dmlc::nullopt;
-      param.high = args[1].operator double();
-    } else {
-      // nither 'low' or 'high' is numeric types
-      num_inputs = 2;
-    }
-  }
-  inputs.reserve(num_inputs);
-  for (int i = 0; i < num_inputs; ++i) {
-    inputs.push_back(args[i].operator mxnet::NDArray*());
-  }
-  if (args[2].type_code() == kNull) {
-    param.size = dmlc::optional<mxnet::Tuple<index_t>>();
-  } else if (args[2].type_code() == kDLInt ||
-             args[2].type_code() == kDLFloat) {
-    param.size = Tuple<index_t>(1, args[2].operator int64_t());
-  } else {
-    param.size = Tuple<index_t>(args[2].operator ObjectRef());
-  }
-  if (args[4].type_code() == kNull) {
-    param.dtype = mxnet::common::GetDefaultDtype();
-  } else {
-    param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
-  }
-  attrs.parsed = param;
-  attrs.op = op;
-  if (args[3].type_code() != kNull) {
-    attrs.dict["ctx"] = args[3].operator std::string();
-  }
-  NDArray* out = args[5].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  SetAttrDict<op::NumpyUniformParam>(&attrs);
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(5);
-  } else {
-    *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_uniform");
+      nnvm::NodeAttrs attrs;
+      op::NumpyUniformParam param;
+      int num_inputs = 0;
+      std::vector<NDArray*> inputs;
+      if (args[0].type_code() == kDLFloat || args[0].type_code() == kDLInt) {
+        if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
+          // 'low' and 'high' are both numeric types
+          num_inputs = 0;
+          param.low  = args[0].operator double();
+          param.high = args[1].operator double();
+        } else {
+          // 'low' is numeric types but 'high' is not numeric types
+          num_inputs = 1;
+          param.low  = args[0].operator double();
+          param.high = dmlc::nullopt;
+        }
+      } else {
+        if (args[1].type_code() == kDLFloat || args[1].type_code() == kDLInt) {
+          // 'low' is not numeric types but 'high' is numeric types
+          num_inputs = 1;
+          param.low  = dmlc::nullopt;
+          param.high = args[1].operator double();
+        } else {
+          // nither 'low' or 'high' is numeric types
+          num_inputs = 2;
+        }
+      }
+      inputs.reserve(num_inputs);
+      for (int i = 0; i < num_inputs; ++i) {
+        inputs.push_back(args[i].operator mxnet::NDArray*());
+      }
+      if (args[2].type_code() == kNull) {
+        param.size = dmlc::optional<mxnet::Tuple<index_t>>();
+      } else if (args[2].type_code() == kDLInt || args[2].type_code() == kDLFloat) {
+        param.size = Tuple<index_t>(1, args[2].operator int64_t());
+      } else {
+        param.size = Tuple<index_t>(args[2].operator ObjectRef());
+      }
+      if (args[4].type_code() == kNull) {
+        param.dtype = mxnet::common::GetDefaultDtype();
+      } else {
+        param.dtype = String2MXNetTypeWithBool(args[4].operator std::string());
+      }
+      attrs.parsed = param;
+      attrs.op     = op;
+      if (args[3].type_code() != kNull) {
+        attrs.dict["ctx"] = args[3].operator std::string();
+      }
+      NDArray* out      = args[5].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      SetAttrDict<op::NumpyUniformParam>(&attrs);
+      auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs.data(), &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(5);
+      } else {
+        *ret = reinterpret_cast<mxnet::NDArray*>(ndoutputs[0]);
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/random/shuffle_op.cc b/src/api/operator/random/shuffle_op.cc
index 222451cb0f3b..54e59ba5e5bd 100644
--- a/src/api/operator/random/shuffle_op.cc
+++ b/src/api/operator/random/shuffle_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -29,29 +29,29 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.shuffle")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_shuffle");
-  nnvm::NodeAttrs attrs;
-
-  NDArray* inputs[1];
-  int num_inputs = 1;
-
-  if (args[0].type_code() != kNull) {
-    inputs[0] = args[0].operator mxnet::NDArray *();
-  }
-
-  attrs.op = op;
-
-  NDArray* out = args[1].operator mxnet::NDArray*();
-  NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
-  if (out) {
-    *ret = PythonArg(1);
-  } else {
-    *ret = ndoutputs[0];
-  }
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op = Op::Get("_npi_shuffle");
+      nnvm::NodeAttrs attrs;
+
+      NDArray* inputs[1];
+      int num_inputs = 1;
+
+      if (args[0].type_code() != kNull) {
+        inputs[0] = args[0].operator mxnet::NDArray*();
+      }
+
+      attrs.op = op;
+
+      NDArray* out      = args[1].operator mxnet::NDArray*();
+      NDArray** outputs = out == nullptr ? nullptr : &out;
+      int num_outputs   = out != nullptr;
+      auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+      if (out) {
+        *ret = PythonArg(1);
+      } else {
+        *ret = ndoutputs[0];
+      }
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/tensor/elemwise_binary_broadcast_op_extended.cc b/src/api/operator/tensor/elemwise_binary_broadcast_op_extended.cc
index f25e30a8b081..14c6dbb922bf 100644
--- a/src/api/operator/tensor/elemwise_binary_broadcast_op_extended.cc
+++ b/src/api/operator/tensor/elemwise_binary_broadcast_op_extended.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -19,7 +19,8 @@
 
 /*!
  * \file elemwise_binary_broadcast_op_extended.cc
- * \brief Implementation of the API of functions in src/operator/tensor/elemwise_binary_broadcast_op_extended.cc
+ * \brief Implementation of the API of functions in
+ * src/operator/tensor/elemwise_binary_broadcast_op_extended.cc
  */
 #include <mxnet/api_registry.h>
 #include <mxnet/runtime/packed_func.h>
@@ -29,19 +30,19 @@
 namespace mxnet {
 
 MXNET_REGISTER_API("_npi.maximum")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_maximum");
-  const nnvm::Op* op_scalar = Op::Get("_npi_maximum_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_maximum");
+      const nnvm::Op* op_scalar = Op::Get("_npi_maximum_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 MXNET_REGISTER_API("_npi.minimum")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
-  using namespace runtime;
-  const nnvm::Op* op = Op::Get("_npi_minimum");
-  const nnvm::Op* op_scalar = Op::Get("_npi_minimum_scalar");
-  UFuncHelper(args, ret, op, op_scalar, nullptr);
-});
+    .set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+      using namespace runtime;
+      const nnvm::Op* op        = Op::Get("_npi_minimum");
+      const nnvm::Op* op_scalar = Op::Get("_npi_minimum_scalar");
+      UFuncHelper(args, ret, op, op_scalar, nullptr);
+    });
 
 }  // namespace mxnet
diff --git a/src/api/operator/tensor/indexing_op.cc b/src/api/operator/tensor/indexing_op.cc
index df194018c712..bfd39aadfc34 100644
--- a/src/api/operator/tensor/indexing_op.cc
+++ b/src/api/operator/tensor/indexing_op.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -28,8 +28,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.take")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.take").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_take");
   nnvm::NodeAttrs attrs;
@@ -37,11 +36,11 @@ MXNET_REGISTER_API("_npi.take")
   NDArray* inputs[2];
 
   if (args[0].type_code() != kNull) {
-    inputs[0] = args[0].operator mxnet::NDArray *();
+    inputs[0] = args[0].operator mxnet::NDArray*();
   }
 
   if (args[1].type_code() != kNull) {
-    inputs[1] = args[1].operator mxnet::NDArray *();
+    inputs[1] = args[1].operator mxnet::NDArray*();
   }
 
   if (args[2].type_code() == kDLInt) {
@@ -60,14 +59,14 @@ MXNET_REGISTER_API("_npi.take")
   }
 
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::TakeParam>(&attrs);
 
-  NDArray* out = args[4].operator mxnet::NDArray*();
+  NDArray* out      = args[4].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
   // set the number of outputs provided by the `out` arugment
   int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, 2, inputs, &num_outputs, outputs);
+  auto ndoutputs  = Invoke(op, &attrs, 2, inputs, &num_outputs, outputs);
   if (out) {
     *ret = PythonArg(4);
   } else {
diff --git a/src/api/operator/tensor/matrix_op.cc b/src/api/operator/tensor/matrix_op.cc
index 5b275d5c38a9..4b18ef15094f 100644
--- a/src/api/operator/tensor/matrix_op.cc
+++ b/src/api/operator/tensor/matrix_op.cc
@@ -28,8 +28,7 @@
 
 namespace mxnet {
 
-MXNET_REGISTER_API("_npi.clip")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.clip").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_clip");
   nnvm::NodeAttrs attrs;
@@ -37,7 +36,7 @@ MXNET_REGISTER_API("_npi.clip")
   NDArray* inputs[1];
 
   if (args[0].type_code() != kNull) {
-    inputs[0] = args[0].operator mxnet::NDArray *();
+    inputs[0] = args[0].operator mxnet::NDArray*();
   }
 
   if (args[1].type_code() != kNull) {
@@ -53,14 +52,14 @@ MXNET_REGISTER_API("_npi.clip")
   }
 
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::ClipParam>(&attrs);
 
-  NDArray* out = args[3].operator mxnet::NDArray*();
+  NDArray* out      = args[3].operator mxnet::NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
   // set the number of outputs provided by the `out` arugment
   int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, 1, inputs, &num_outputs, outputs);
+  auto ndoutputs  = Invoke(op, &attrs, 1, inputs, &num_outputs, outputs);
   if (out) {
     *ret = PythonArg(3);
   } else {
@@ -68,8 +67,7 @@ MXNET_REGISTER_API("_npi.clip")
   }
 });
 
-MXNET_REGISTER_API("_npi.tile")
-.set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
+MXNET_REGISTER_API("_npi.tile").set_body([](runtime::MXNetArgs args, runtime::MXNetRetValue* ret) {
   using namespace runtime;
   const nnvm::Op* op = Op::Get("_npi_tile");
   nnvm::NodeAttrs attrs;
@@ -77,16 +75,16 @@ MXNET_REGISTER_API("_npi.tile")
   if (args[1].type_code() == kDLInt) {
     param.reps = Tuple<int>(1, args[1].operator int64_t());
   } else {
-  param.reps = Tuple<int>(args[1].operator ObjectRef());
+    param.reps = Tuple<int>(args[1].operator ObjectRef());
   }
   attrs.parsed = param;
-  attrs.op = op;
+  attrs.op     = op;
   SetAttrDict<op::TileParam>(&attrs);
-  int num_outputs = 0;
+  int num_outputs   = 0;
   NDArray* inputs[] = {args[0].operator mxnet::NDArray*()};
-  int num_inputs = 1;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
-  *ret = ndoutputs[0];
+  int num_inputs    = 1;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, nullptr);
+  *ret              = ndoutputs[0];
 });
 
 }  // namespace mxnet
diff --git a/src/api/operator/ufunc_helper.cc b/src/api/operator/ufunc_helper.cc
index b960267d4469..978e9d4840f7 100644
--- a/src/api/operator/ufunc_helper.cc
+++ b/src/api/operator/ufunc_helper.cc
@@ -28,23 +28,26 @@
 
 namespace mxnet {
 
-template<>
+template <>
 void SetAttrDict<double>(nnvm::NodeAttrs* attrs) {
   if (Imperative::Get()->is_recording()) {
     attrs->dict["scalar"] = std::to_string(::dmlc::get<double>(attrs->parsed));
   }
 }
 
-void UFuncHelper(NDArray* lhs, NDArray* rhs, NDArray* out,
-                 runtime::MXNetRetValue* ret, const nnvm::Op* op) {
+void UFuncHelper(NDArray* lhs,
+                 NDArray* rhs,
+                 NDArray* out,
+                 runtime::MXNetRetValue* ret,
+                 const nnvm::Op* op) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
+  attrs.op          = op;
   NDArray* inputs[] = {lhs, rhs};
-  int num_inputs = 2;
+  int num_inputs    = 2;
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(2);
   } else {
@@ -52,21 +55,24 @@ void UFuncHelper(NDArray* lhs, NDArray* rhs, NDArray* out,
   }
 }
 
-void UFuncHelper(NDArray* lhs, int64_t rhs, NDArray* out,
-                 runtime::MXNetRetValue* ret, const nnvm::Op* op) {
+void UFuncHelper(NDArray* lhs,
+                 int64_t rhs,
+                 NDArray* out,
+                 runtime::MXNetRetValue* ret,
+                 const nnvm::Op* op) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   op::NumpyBinaryScalarParam param;
   param.scalar = rhs;
   param.is_int = true;
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyBinaryScalarParam>(&attrs);
-  NDArray** inputs = &lhs;
-  int num_inputs = 1;
+  NDArray** inputs  = &lhs;
+  int num_inputs    = 1;
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(2);
   } else {
@@ -74,21 +80,24 @@ void UFuncHelper(NDArray* lhs, int64_t rhs, NDArray* out,
   }
 }
 
-void UFuncHelper(NDArray* lhs, double rhs, NDArray* out,
-                 runtime::MXNetRetValue* ret, const nnvm::Op* op) {
+void UFuncHelper(NDArray* lhs,
+                 double rhs,
+                 NDArray* out,
+                 runtime::MXNetRetValue* ret,
+                 const nnvm::Op* op) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   op::NumpyBinaryScalarParam param;
   param.scalar = rhs;
   param.is_int = false;
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyBinaryScalarParam>(&attrs);
-  NDArray** inputs = &lhs;
-  int num_inputs = 1;
+  NDArray** inputs  = &lhs;
+  int num_inputs    = 1;
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(2);
   } else {
@@ -96,21 +105,24 @@ void UFuncHelper(NDArray* lhs, double rhs, NDArray* out,
   }
 }
 
-void UFuncHelper(int64_t lhs, NDArray* rhs, NDArray* out,
-                 runtime::MXNetRetValue* ret, const nnvm::Op* op) {
+void UFuncHelper(int64_t lhs,
+                 NDArray* rhs,
+                 NDArray* out,
+                 runtime::MXNetRetValue* ret,
+                 const nnvm::Op* op) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   op::NumpyBinaryScalarParam param;
   param.scalar = lhs;
   param.is_int = true;
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyBinaryScalarParam>(&attrs);
-  NDArray** inputs = &rhs;
-  int num_inputs = 1;
+  NDArray** inputs  = &rhs;
+  int num_inputs    = 1;
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(2);
   } else {
@@ -118,21 +130,24 @@ void UFuncHelper(int64_t lhs, NDArray* rhs, NDArray* out,
   }
 }
 
-void UFuncHelper(double lhs, NDArray* rhs, NDArray* out,
-                 runtime::MXNetRetValue* ret, const nnvm::Op* op) {
+void UFuncHelper(double lhs,
+                 NDArray* rhs,
+                 NDArray* out,
+                 runtime::MXNetRetValue* ret,
+                 const nnvm::Op* op) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
   op::NumpyBinaryScalarParam param;
   param.scalar = lhs;
   param.is_int = false;
-  attrs.op = op;
+  attrs.op     = op;
   attrs.parsed = param;
   SetAttrDict<op::NumpyBinaryScalarParam>(&attrs);
-  NDArray** inputs = &rhs;
-  int num_inputs = 1;
+  NDArray** inputs  = &rhs;
+  int num_inputs    = 1;
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(2);
   } else {
@@ -156,26 +171,30 @@ void UFuncHelper(runtime::MXNetArgs args,
       UFuncHelper(args[0].operator NDArray*(), args[1].operator double(), out, ret, lfn_scalar);
     }
   } else if (args[0].type_code() == kDLInt) {
-    UFuncHelper(args[0].operator int64_t(), args[1].operator NDArray*(), out, ret,
+    UFuncHelper(args[0].operator int64_t(),
+                args[1].operator NDArray*(),
+                out,
+                ret,
                 rfn_scalar ? rfn_scalar : lfn_scalar);
   } else {
-    UFuncHelper(args[0].operator double(), args[1].operator NDArray*(), out, ret,
+    UFuncHelper(args[0].operator double(),
+                args[1].operator NDArray*(),
+                out,
+                ret,
                 rfn_scalar ? rfn_scalar : lfn_scalar);
   }
 }
 
-void UFuncHelper(runtime::MXNetArgs args,
-                 runtime::MXNetRetValue* ret,
-                 const nnvm::Op* op) {
+void UFuncHelper(runtime::MXNetArgs args, runtime::MXNetRetValue* ret, const nnvm::Op* op) {
   using namespace runtime;
   nnvm::NodeAttrs attrs;
-  attrs.op = op;
+  attrs.op          = op;
   NDArray* inputs[] = {args[0].operator NDArray*()};
-  NDArray* out = args[1].operator NDArray*();
+  NDArray* out      = args[1].operator NDArray*();
   NDArray** outputs = out == nullptr ? nullptr : &out;
-  int num_inputs = 1;
-  int num_outputs = out != nullptr;
-  auto ndoutputs = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
+  int num_inputs    = 1;
+  int num_outputs   = out != nullptr;
+  auto ndoutputs    = Invoke(op, &attrs, num_inputs, inputs, &num_outputs, outputs);
   if (outputs) {
     *ret = PythonArg(1);
   } else {
diff --git a/src/api/operator/ufunc_helper.h b/src/api/operator/ufunc_helper.h
index 67303200c559..848301de5365 100644
--- a/src/api/operator/ufunc_helper.h
+++ b/src/api/operator/ufunc_helper.h
@@ -29,9 +29,7 @@ namespace mxnet {
 /*
  * Ufunc helper for unary operators
  */
-void UFuncHelper(runtime::MXNetArgs args,
-                 runtime::MXNetRetValue* ret,
-                 const nnvm::Op* fn_array);
+void UFuncHelper(runtime::MXNetArgs args, runtime::MXNetRetValue* ret, const nnvm::Op* fn_array);
 
 /*
  * Ufunc helper for binary operators
diff --git a/src/api/operator/utils.cc b/src/api/operator/utils.cc
index 6cfbd27471f0..534b07dd2b7c 100644
--- a/src/api/operator/utils.cc
+++ b/src/api/operator/utils.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -38,7 +38,7 @@ void SetInOut(std::vector<NDArray*>* ndinputs,
               std::vector<NDArray*>* ndoutputs,
               int num_inputs,
               NDArray** inputs,
-              int *num_outputs,
+              int* num_outputs,
               int infered_num_outputs,
               int num_visible_outputs,
               NDArray** out_array) {
@@ -49,7 +49,7 @@ void SetInOut(std::vector<NDArray*>* ndinputs,
     if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
       if (shape_is_known(inp->shape())) {  // Shape may be unknown after dynamic shape operators
         CHECK_LT(inp->shape().Size(), (int64_t{1} << 31) - 1)
-          << "[SetInOut] Size of tensor you are trying to allocate is larger than "
+            << "[SetInOut] Size of tensor you are trying to allocate is larger than "
                "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
       }
     }
@@ -65,9 +65,8 @@ void SetInOut(std::vector<NDArray*>* ndinputs,
     *num_outputs = num_visible_outputs;
   } else {
     CHECK(*num_outputs == infered_num_outputs || *num_outputs == num_visible_outputs)
-      << "Operator expects " << infered_num_outputs << " (all) or "
-      << num_visible_outputs << " (visible only) outputs, but got "
-      << *num_outputs << " instead.";
+        << "Operator expects " << infered_num_outputs << " (all) or " << num_visible_outputs
+        << " (visible only) outputs, but got " << *num_outputs << " instead.";
     for (int i = 0; i < *num_outputs; ++i) {
       ndoutputs->emplace_back(out_array[i]);
     }
@@ -88,13 +87,19 @@ std::vector<NDArray*> Invoke(const nnvm::Op* op,
   imperative::SetNumOutputs(op, *attrs, num_inputs, &infered_num_outputs, &num_visible_outputs);
 
   std::vector<NDArray*> ndinputs, ndoutputs;
-  SetInOut(&ndinputs, &ndoutputs, num_inputs, inputs,
-      num_outputs, infered_num_outputs, num_visible_outputs, outputs);
+  SetInOut(&ndinputs,
+           &ndoutputs,
+           num_inputs,
+           inputs,
+           num_outputs,
+           infered_num_outputs,
+           num_visible_outputs,
+           outputs);
 
   if (Imperative::Get()->is_deferred_compute()) {
     Imperative::Get()->RecordDeferredCompute(std::move(*attrs), ndinputs, ndoutputs);
   } else {
-    for (NDArray *input : ndinputs) {
+    for (NDArray* input : ndinputs) {
       Imperative::DCInfo::Compute(*input);
     }
     auto state = Imperative::Get()->Invoke(Context::CPU(), *attrs, ndinputs, ndoutputs);
@@ -102,7 +107,8 @@ std::vector<NDArray*> Invoke(const nnvm::Op* op,
       Imperative::Get()->RecordOp(std::move(*attrs), ndinputs, ndoutputs, state);
     }
   }
-  for (int i = *num_outputs; i < infered_num_outputs; ++i) delete ndoutputs[i];
+  for (int i = *num_outputs; i < infered_num_outputs; ++i)
+    delete ndoutputs[i];
   return ndoutputs;
 }
 
diff --git a/src/api/operator/utils.h b/src/api/operator/utils.h
index 014ff15188b9..9b2085f76a43 100644
--- a/src/api/operator/utils.h
+++ b/src/api/operator/utils.h
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -35,7 +35,7 @@ void SetInOut(std::vector<NDArray*>* ndinputs,
               std::vector<NDArray*>* ndoutputs,
               int num_inputs,
               NDArray** inputs,
-              int *num_outputs,
+              int* num_outputs,
               int infered_num_outputs,
               int num_visible_outputs,
               NDArray** out_array);
@@ -50,14 +50,14 @@ std::vector<NDArray*> Invoke(const nnvm::Op* op,
 bool is_recording();
 bool is_deferred_compute();
 
-template<typename T>
+template <typename T>
 void SetAttrDict(nnvm::NodeAttrs* attrs) {
   if (is_recording() || is_deferred_compute()) {
     ::dmlc::get<T>(attrs->parsed).SetAttrDict(&(attrs->dict));
   }
 }
 
-template<typename ValueType, typename T>
+template <typename ValueType, typename T>
 Tuple<ValueType> Obj2Tuple(const runtime::ObjectRef& src) {
   runtime::ADT adt = Downcast<runtime::ADT, runtime::ObjectRef>(src);
   Tuple<ValueType> ret(adt.size(), 0);
diff --git a/src/base.cc b/src/base.cc
index 96d66ad1d379..d67e130cc465 100644
--- a/src/base.cc
+++ b/src/base.cc
@@ -33,7 +33,7 @@ namespace mxnet {
 // Users that have rebuilt MXNet against older versions will we advised with a warning to upgrade
 // their systems to match the CI level.  Minimally, users should rerun the CI locally.
 #if defined(_MSC_VER)
-#define MXNET_CI_OLDEST_CUDA_VERSION  9020
+#define MXNET_CI_OLDEST_CUDA_VERSION 9020
 #else
 #define MXNET_CI_OLDEST_CUDA_VERSION 10000
 #endif
@@ -82,7 +82,7 @@ void Context::CuDNNLibChecks() {
                      << "Set MXNET_CUDNN_LIB_CHECKING=0 to quiet this warning.";
       if (CUDNN_VERSION < MXNET_CI_OLDEST_CUDNN_VERSION)
         LOG(WARNING) << "Upgrade advisory: this mxnet has been built against cuDNN lib version "
-                     <<  CUDNN_VERSION << ", which is older than the oldest version tested by CI ("
+                     << CUDNN_VERSION << ", which is older than the oldest version tested by CI ("
                      << MXNET_CI_OLDEST_CUDNN_VERSION << ").  "
                      << "Set MXNET_CUDNN_LIB_CHECKING=0 to quiet this warning.";
     }
diff --git a/src/c_api/c_api.cc b/src/c_api/c_api.cc
index c54cc0e6f470..65f8efa93457 100644
--- a/src/c_api/c_api.cc
+++ b/src/c_api/c_api.cc
@@ -78,28 +78,28 @@
 #include <x86intrin.h>
 #endif
 
-
 using namespace mxnet;
 
 // Internal function to get the information
 // from function registry
 // Used to implement MXSymbolGetAtomicSymbolInfo and MXFuncGetInfo
-template<typename FunRegType>
-inline int MXAPIGetFunctionRegInfo(const FunRegType *e,
-                                   const char **name,
-                                   const char **description,
-                                   uint32_t *num_args,
-                                   const char ***arg_names,
-                                   const char ***arg_type_infos,
-                                   const char ***arg_descriptions,
-                                   const char **return_type) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
-
-  API_BEGIN();
-  *name = e->name.c_str();
+template <typename FunRegType>
+inline int MXAPIGetFunctionRegInfo(const FunRegType* e,
+                                   const char** name,
+                                   const char** description,
+                                   uint32_t* num_args,
+                                   const char*** arg_names,
+                                   const char*** arg_type_infos,
+                                   const char*** arg_descriptions,
+                                   const char** return_type) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
+
+  API_BEGIN();
+  *name        = e->name.c_str();
   *description = e->description.c_str();
-  *num_args = static_cast<uint32_t>(e->arguments.size());
-  if (return_type) *return_type = e->return_type.c_str();
+  *num_args    = static_cast<uint32_t>(e->arguments.size());
+  if (return_type)
+    *return_type = e->return_type.c_str();
   ret->ret_vec_charp.clear();
   for (size_t i = 0; i < e->arguments.size(); ++i) {
     ret->ret_vec_charp.push_back(e->arguments[i].name.c_str());
@@ -110,16 +110,15 @@ inline int MXAPIGetFunctionRegInfo(const FunRegType *e,
   for (size_t i = 0; i < e->arguments.size(); ++i) {
     ret->ret_vec_charp.push_back(e->arguments[i].description.c_str());
   }
-  *arg_names = dmlc::BeginPtr(ret->ret_vec_charp);
-  *arg_type_infos = dmlc::BeginPtr(ret->ret_vec_charp) + e->arguments.size();
+  *arg_names        = dmlc::BeginPtr(ret->ret_vec_charp);
+  *arg_type_infos   = dmlc::BeginPtr(ret->ret_vec_charp) + e->arguments.size();
   *arg_descriptions = dmlc::BeginPtr(ret->ret_vec_charp) + (e->arguments.size() * 2);
   API_END();
 }
 
 // NOTE: return value is added in API_END
 
-std::string getExtensionMsgs(mxnet::ext::msgSize_t msgSize,
-                             mxnet::ext::msgGet_t msgGet) {
+std::string getExtensionMsgs(mxnet::ext::msgSize_t msgSize, mxnet::ext::msgGet_t msgGet) {
   std::string str;
   if (msgSize() > 0) {
     str = "\nExtension Traceback:\n";
@@ -127,8 +126,8 @@ std::string getExtensionMsgs(mxnet::ext::msgSize_t msgSize,
       const char* tmp;
       msgGet(i, &tmp);
       // format: [i] message
-      str += std::string("\t[") + std::to_string(i) + std::string("] ")
-        + std::string(tmp) + std::string("\n");
+      str += std::string("\t[") + std::to_string(i) + std::string("] ") + std::string(tmp) +
+             std::string("\n");
     }
   }
   return str;
@@ -192,15 +191,15 @@ void CustomFComputeDispatcher(const std::string op_name,
 
     in_dev_id.push_back(in_nd->ctx().real_dev_id());
     if (inputs[i].storage_type() == mxnet::kRowSparseStorage) {
-      in_stypes[i] = 1;
-      in_indices[i] = inputs[i].aux_data(rowsparse::kIdx).dptr_;
+      in_stypes[i]         = 1;
+      in_indices[i]        = inputs[i].aux_data(rowsparse::kIdx).dptr_;
       in_indices_shapes[i] = inputs[i].aux_shape(rowsparse::kIdx).Size();
     } else if (inputs[i].storage_type() == mxnet::kCSRStorage) {
-      in_stypes[i] = 2;
-      in_indices[i] = inputs[i].aux_data(csr::kIdx).dptr_;
-      in_indptr[i] = inputs[i].aux_data(csr::kIndPtr).dptr_;
+      in_stypes[i]         = 2;
+      in_indices[i]        = inputs[i].aux_data(csr::kIdx).dptr_;
+      in_indptr[i]         = inputs[i].aux_data(csr::kIndPtr).dptr_;
       in_indices_shapes[i] = inputs[i].aux_shape(csr::kIdx).Size();
-      in_indptr_shapes[i] = inputs[i].aux_shape(csr::kIndPtr).Size();
+      in_indptr_shapes[i]  = inputs[i].aux_shape(csr::kIndPtr).Size();
     }
   }
 
@@ -215,53 +214,57 @@ void CustomFComputeDispatcher(const std::string op_name,
     out_dev_id.push_back(outputs[i].ctx().real_dev_id());
 
     if (outputs[i].storage_type() == mxnet::kRowSparseStorage) {
-      out_stypes[i] = 1;
-      out_indices[i] = outputs[i].aux_data(rowsparse::kIdx).dptr_;
+      out_stypes[i]         = 1;
+      out_indices[i]        = outputs[i].aux_data(rowsparse::kIdx).dptr_;
       out_indices_shapes[i] = outputs[i].aux_shape(rowsparse::kIdx).Size();
     } else if (outputs[i].storage_type() == mxnet::kCSRStorage) {
-      out_stypes[i] = 2;
-      out_indices[i] = outputs[i].aux_data(csr::kIdx).dptr_;
-      out_indptr[i] = outputs[i].aux_data(csr::kIndPtr).dptr_;
+      out_stypes[i]         = 2;
+      out_indices[i]        = outputs[i].aux_data(csr::kIdx).dptr_;
+      out_indptr[i]         = outputs[i].aux_data(csr::kIndPtr).dptr_;
       out_indices_shapes[i] = outputs[i].aux_shape(csr::kIdx).Size();
-      out_indptr_shapes[i] = outputs[i].aux_shape(csr::kIndPtr).Size();
+      out_indptr_shapes[i]  = outputs[i].aux_shape(csr::kIndPtr).Size();
     }
   }
 
   // get memory resource and mxnet backend streams
   CHECK(ctx.requested.size() >= 2)
-    << "Custom operator should register at least memory resource and parallel random resource";
-  const Resource &resource = ctx.requested.at(0);
-  mshadow::Stream<mxnet::cpu> *cpu_stream = ctx.get_stream<mxnet::cpu>();
-  mshadow::Stream<mxnet::gpu> *gpu_stream = ctx.get_stream<mxnet::gpu>();
+      << "Custom operator should register at least memory resource and parallel random resource";
+  const Resource& resource                = ctx.requested.at(0);
+  mshadow::Stream<mxnet::cpu>* cpu_stream = ctx.get_stream<mxnet::cpu>();
+  mshadow::Stream<mxnet::gpu>* gpu_stream = ctx.get_stream<mxnet::gpu>();
 
   // create lambda that captures stream & resource objects
   // this temp workspace holds memory allocated by custom library via OpResource
   auto cpu_alloc = [&](int size) {
     mshadow::Tensor<mxnet::cpu, 1, char> workspace =
-      resource.get_space_typed<mxnet::cpu, 1, char>(mshadow::Shape1(size), cpu_stream);
+        resource.get_space_typed<mxnet::cpu, 1, char>(mshadow::Shape1(size), cpu_stream);
     return workspace.dptr_;
   };
   auto gpu_alloc = [&](int size) {
     mshadow::Tensor<mxnet::gpu, 1, char> workspace =
-      resource.get_space_typed<mxnet::gpu, 1, char>(mshadow::Shape1(size), gpu_stream);
+        resource.get_space_typed<mxnet::gpu, 1, char>(mshadow::Shape1(size), gpu_stream);
     return workspace.dptr_;
   };
 
   // create lambda that allocates memory for sparse and
   // returns allocated arrays for data, indices and indptr.
-  auto sparse_alloc = [&](int index, int indices_len, int idxptr_len,
-                          void** data, int64_t** indices, int64_t** indptr) {
+  auto sparse_alloc = [&](int index,
+                          int indices_len,
+                          int idxptr_len,
+                          void** data,
+                          int64_t** indices,
+                          int64_t** indptr) {
     if (idxptr_len == 0) {
       // Row Sparse
       outputs[index].CheckAndAlloc({mshadow::Shape1(indices_len)});
-      *data = outputs[index].data().dptr_;
+      *data    = outputs[index].data().dptr_;
       *indices = reinterpret_cast<int64_t*>(outputs[index].aux_data(rowsparse::kIdx).dptr_);
     } else {
       // CSR
       outputs[index].CheckAndAlloc({mshadow::Shape1(idxptr_len), mshadow::Shape1(indices_len)});
-      *data = outputs[index].data().dptr_;
+      *data    = outputs[index].data().dptr_;
       *indices = reinterpret_cast<int64_t*>(outputs[index].aux_data(csr::kIdx).dptr_);
-      *indptr = reinterpret_cast<int64_t*>(outputs[index].aux_data(csr::kIndPtr).dptr_);
+      *indptr  = reinterpret_cast<int64_t*>(outputs[index].aux_data(csr::kIndPtr).dptr_);
     }
   };
 
@@ -277,20 +280,25 @@ void CustomFComputeDispatcher(const std::string op_name,
   };
 
   using alloc_type_gpu = decltype(gpu_alloc);
-  auto gpu_malloc = [](void* _gpu_alloc, int size) {
+  auto gpu_malloc      = [](void* _gpu_alloc, int size) {
     alloc_type_gpu* gpualloc = static_cast<alloc_type_gpu*>(_gpu_alloc);
     return static_cast<void*>((*gpualloc)(size));
   };
 
   using alloc_type_sparse = decltype(sparse_alloc);
-  auto sparse_malloc = [](void* _sparse_alloc, int index, int indices_len, int idxptr_len,
-                           void** data, int64_t** indices, int64_t** indptr) {
+  auto sparse_malloc      = [](void* _sparse_alloc,
+                          int index,
+                          int indices_len,
+                          int idxptr_len,
+                          void** data,
+                          int64_t** indices,
+                          int64_t** indptr) {
     alloc_type_sparse* sparsealloc = static_cast<alloc_type_sparse*>(_sparse_alloc);
     (*sparsealloc)(index, indices_len, idxptr_len, data, indices, indptr);
   };
 
   // get actual cudaStream_t out of mxnet gpu stream and pass to lib_api.h
-  void *cuda_stream = nullptr;
+  void* cuda_stream = nullptr;
 #if MXNET_USE_CUDA
   if ((inputs.size() > 0 && inputs[0].ctx().dev_mask() == Context::kGPU) ||
       (outputs.size() > 0 && outputs[0].ctx().dev_mask() == Context::kGPU)) {
@@ -301,90 +309,158 @@ void CustomFComputeDispatcher(const std::string op_name,
   // get mxnet initialized and seeded RNG states and pass to lib_api.h
   void *rng_cpu_states = nullptr, *rng_gpu_states = nullptr;
   using mxnet::common::random::RandGenerator;
-  RandGenerator<cpu, float> *pgen_cpu = ctx.requested.at(1).get_parallel_random<cpu, float>();
-  rng_cpu_states = pgen_cpu->GetStates();
+  RandGenerator<cpu, float>* pgen_cpu = ctx.requested.at(1).get_parallel_random<cpu, float>();
+  rng_cpu_states                      = pgen_cpu->GetStates();
 #if MXNET_USE_CUDA
-  RandGenerator<gpu, float> *pgen_gpu = ctx.requested.at(1).get_parallel_random<gpu, float>();
-  rng_gpu_states = pgen_gpu->GetStates();
+  RandGenerator<gpu, float>* pgen_gpu = ctx.requested.at(1).get_parallel_random<gpu, float>();
+  rng_gpu_states                      = pgen_gpu->GetStates();
 #endif
 
-  CHECK((fcomp_fp != nullptr && state_ptr == nullptr)
-        || (fcomp_fp == nullptr && state_ptr != nullptr))
-    << "Can only register either regular op or stateful op for '" << op_name << "'";
+  CHECK((fcomp_fp != nullptr && state_ptr == nullptr) ||
+        (fcomp_fp == nullptr && state_ptr != nullptr))
+      << "Can only register either regular op or stateful op for '" << op_name << "'";
 
   if (fcomp_fp != nullptr) {
     // convert attributes to vector of char*
     std::vector<const char*> attr_keys, attr_vals;
-    for (auto &kv : attrs->dict) {
+    for (auto& kv : attrs->dict) {
       attr_keys.push_back(kv.first.c_str());
       attr_vals.push_back(kv.second.c_str());
     }
 
     // call fcompute function
-    int retval = callFComp(fcomp_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                           in_shapes.data(), in_dims.data(), in_data.data(), in_types.data(),
-                           in_verIDs.data(), in_dev_type.data(), in_dev_id.data(), in_data.size(),
-                           out_shapes.data(), out_dims.data(), out_data.data(), out_types.data(),
-                           out_verIDs.data(), out_dev_type.data(), out_dev_id.data(),
+    int retval       = callFComp(fcomp_fp,
+                           attr_keys.data(),
+                           attr_vals.data(),
+                           attr_keys.size(),
+                           in_shapes.data(),
+                           in_dims.data(),
+                           in_data.data(),
+                           in_types.data(),
+                           in_verIDs.data(),
+                           in_dev_type.data(),
+                           in_dev_id.data(),
+                           in_data.size(),
+                           out_shapes.data(),
+                           out_dims.data(),
+                           out_data.data(),
+                           out_types.data(),
+                           out_verIDs.data(),
+                           out_dev_type.data(),
+                           out_dev_id.data(),
                            out_data.size(),
-                           cpu_malloc, &cpu_alloc, gpu_malloc, &gpu_alloc, cuda_stream,
-                           sparse_malloc, &sparse_alloc, in_stypes.data(), out_stypes.data(),
-                           in_indices.data(), out_indices.data(), in_indptr.data(),
+                           cpu_malloc,
+                           &cpu_alloc,
+                           gpu_malloc,
+                           &gpu_alloc,
+                           cuda_stream,
+                           sparse_malloc,
+                           &sparse_alloc,
+                           in_stypes.data(),
+                           out_stypes.data(),
+                           in_indices.data(),
+                           out_indices.data(),
+                           in_indptr.data(),
                            out_indptr.data(),
-                           in_indices_shapes.data(), out_indices_shapes.data(),
-                           in_indptr_shapes.data(), out_indptr_shapes.data(),
-                           rng_cpu_states, rng_gpu_states);
+                           in_indices_shapes.data(),
+                           out_indices_shapes.data(),
+                           in_indptr_shapes.data(),
+                           out_indptr_shapes.data(),
+                           rng_cpu_states,
+                           rng_gpu_states);
     std::string msgs = getExtensionMsgs(msgSize, msgGet);
     CHECK(retval) << "Error calling FCompute for custom operator '" << op_name << "'" << msgs;
   }
 
   if (state_ptr != nullptr) {
     // retrieve op state object created from CreateOpState
-    CustomStatefulOpWrapper& op = state_ptr->get_state<CustomStatefulOpWrapper>();
+    CustomStatefulOpWrapper& op     = state_ptr->get_state<CustomStatefulOpWrapper>();
     CustomStatefulOp* state_op_inst = op.get_instance();
-    std::string msgs = getExtensionMsgs(msgSize, msgGet);
+    std::string msgs                = getExtensionMsgs(msgSize, msgGet);
     CHECK(state_op_inst != nullptr)
-      << "Error custom stateful operator is null for operator '" << op_name << "'" << msgs;
+        << "Error custom stateful operator is null for operator '" << op_name << "'" << msgs;
 
     // call fcompute function
-    int retval = callFStatefulComp(stateful_forward_flag, state_op_inst,
-                                   in_shapes.data(), in_dims.data(), in_data.data(),
+    int retval = callFStatefulComp(stateful_forward_flag,
+                                   state_op_inst,
+                                   in_shapes.data(),
+                                   in_dims.data(),
+                                   in_data.data(),
                                    in_types.data(),
-                                   in_verIDs.data(), in_dev_type.data(), in_dev_id.data(),
+                                   in_verIDs.data(),
+                                   in_dev_type.data(),
+                                   in_dev_id.data(),
                                    in_data.size(),
-                                   out_shapes.data(), out_dims.data(), out_data.data(),
+                                   out_shapes.data(),
+                                   out_dims.data(),
+                                   out_data.data(),
                                    out_types.data(),
-                                   out_verIDs.data(), out_dev_type.data(), out_dev_id.data(),
+                                   out_verIDs.data(),
+                                   out_dev_type.data(),
+                                   out_dev_id.data(),
                                    out_data.size(),
-                                   cpu_malloc, &cpu_alloc, gpu_malloc, &gpu_alloc, cuda_stream,
-                                   sparse_malloc, &sparse_alloc, in_stypes.data(),
-                                   out_stypes.data(), in_indices.data(), out_indices.data(),
-                                   in_indptr.data(), out_indptr.data(),
-                                   in_indices_shapes.data(), out_indices_shapes.data(),
-                                   in_indptr_shapes.data(), out_indptr_shapes.data(),
-                                   rng_cpu_states, rng_gpu_states);
-    msgs = getExtensionMsgs(msgSize, msgGet);
+                                   cpu_malloc,
+                                   &cpu_alloc,
+                                   gpu_malloc,
+                                   &gpu_alloc,
+                                   cuda_stream,
+                                   sparse_malloc,
+                                   &sparse_alloc,
+                                   in_stypes.data(),
+                                   out_stypes.data(),
+                                   in_indices.data(),
+                                   out_indices.data(),
+                                   in_indptr.data(),
+                                   out_indptr.data(),
+                                   in_indices_shapes.data(),
+                                   out_indices_shapes.data(),
+                                   in_indptr_shapes.data(),
+                                   out_indptr_shapes.data(),
+                                   rng_cpu_states,
+                                   rng_gpu_states);
+    msgs       = getExtensionMsgs(msgSize, msgGet);
     CHECK(retval) << "Error calling FStatefulCompute for custom operator '" << op_name << "'"
                   << msgs;
   }
 }
 
-template <typename RescReq, typename AttrParser, typename NumInputs, typename NumOutputs,
+template <typename RescReq,
+          typename AttrParser,
+          typename NumInputs,
+          typename NumOutputs,
           typename NumInOuts,
-          typename InferType, typename InferShape, typename InferSType, typename MutateInputs,
-          typename SubgraphNumInputs, typename SubgraphInferType, typename SubgraphInferShape,
-          typename SubgraphInferSType, typename CreateOpState, typename GradReg>
-void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp,
-                RescReq resc_req, AttrParser attr_parser, NumInputs num_inputs,
-                NumOutputs num_outputs, NumInOuts num_inouts, InferType infer_type,
-                InferShape infer_shape, InferSType infer_storage_type,
-                MutateInputs mutate_inputs, SubgraphNumInputs num_subgraph_inputs,
-                SubgraphInferType infer_subgraph_type, SubgraphInferShape infer_subgraph_shape,
-                SubgraphInferSType infer_subgraph_storage_type, CreateOpState create_opstate,
-                GradReg grad_reg, mxnet::ext::mutateInputs_t mutate_fp,
-                const std::unordered_map<std::string, mxnet::ext::createOpState_t> &createop_map,
-                const std::unordered_map<std::string, mxnet::ext::fcomp_t> &forward_ctx_map,
-                const std::unordered_map<std::string, mxnet::ext::fcomp_t> &backward_ctx_map,
+          typename InferType,
+          typename InferShape,
+          typename InferSType,
+          typename MutateInputs,
+          typename SubgraphNumInputs,
+          typename SubgraphInferType,
+          typename SubgraphInferShape,
+          typename SubgraphInferSType,
+          typename CreateOpState,
+          typename GradReg>
+void registerOp(const char* name,
+                const std::string& name_str,
+                bool isSubgraphOp,
+                RescReq resc_req,
+                AttrParser attr_parser,
+                NumInputs num_inputs,
+                NumOutputs num_outputs,
+                NumInOuts num_inouts,
+                InferType infer_type,
+                InferShape infer_shape,
+                InferSType infer_storage_type,
+                MutateInputs mutate_inputs,
+                SubgraphNumInputs num_subgraph_inputs,
+                SubgraphInferType infer_subgraph_type,
+                SubgraphInferShape infer_subgraph_shape,
+                SubgraphInferSType infer_subgraph_storage_type,
+                CreateOpState create_opstate,
+                GradReg grad_reg,
+                mxnet::ext::mutateInputs_t mutate_fp,
+                const std::unordered_map<std::string, mxnet::ext::createOpState_t>& createop_map,
+                const std::unordered_map<std::string, mxnet::ext::fcomp_t>& forward_ctx_map,
+                const std::unordered_map<std::string, mxnet::ext::fcomp_t>& backward_ctx_map,
                 mxnet::ext::opCallFComp_t callFComp,
                 mxnet::ext::opCallFStatefulComp_t callFStatefulComp,
                 mxnet::ext::msgSize_t msgSize,
@@ -392,9 +468,9 @@ void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp
   using namespace mxnet::ext;
 
   // check if operator is already registered
-  const nnvm::Op *regOpPtr = dmlc::Registry<nnvm::Op>::Get()->Find(name);
-  nnvm::Op &regOp = dmlc::Registry<nnvm::Op>::Get()->__REGISTER_OR_GET__(name);
-  int plevel = 10;
+  const nnvm::Op* regOpPtr = dmlc::Registry<nnvm::Op>::Get()->Find(name);
+  nnvm::Op& regOp          = dmlc::Registry<nnvm::Op>::Get()->__REGISTER_OR_GET__(name);
+  int plevel               = 10;
   if (regOpPtr != nullptr) {
     // overwrite registration of existing op with custom op
     regOp.arguments.clear();
@@ -420,10 +496,8 @@ void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp
     regOp.set_num_outputs(DefaultSubgraphOpNumOutputs);
     regOp.set_attr<nnvm::FInferType>("FInferType", infer_subgraph_type, plevel);
     regOp.set_attr<mxnet::FInferShape>("FInferShape", infer_subgraph_shape, plevel);
-    regOp.set_attr<FInferStorageType>("FInferStorageType",
-                                      infer_subgraph_storage_type, plevel);
-    regOp.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-                                        DefaultSubgraphOpMutableInputs, plevel);
+    regOp.set_attr<FInferStorageType>("FInferStorageType", infer_subgraph_storage_type, plevel);
+    regOp.set_attr<nnvm::FMutateInputs>("FMutateInputs", DefaultSubgraphOpMutableInputs, plevel);
   }
   // optionally add stateful forward
   if (createop_map.size() != 0) {
@@ -433,9 +507,19 @@ void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp
                               const std::vector<NDArray>& inputs,
                               const std::vector<OpReqType>& req,
                               const std::vector<NDArray>& outputs) {
-      CustomFComputeDispatcher(name_str, nullptr, nullptr, nullptr,
-                               callFStatefulComp, 1, &state_ptr, ctx, inputs, req, outputs,
-                               msgSize, msgGet);
+      CustomFComputeDispatcher(name_str,
+                               nullptr,
+                               nullptr,
+                               nullptr,
+                               callFStatefulComp,
+                               1,
+                               &state_ptr,
+                               ctx,
+                               inputs,
+                               req,
+                               outputs,
+                               msgSize,
+                               msgGet);
     };
     if (createop_map.count("cpu") > 0)
       regOp.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", fstate_forward, plevel);
@@ -450,13 +534,35 @@ void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp
       if (ctx.run_ctx.ctx.dev_mask() == Context::kCPU) {
         CHECK_GT(forward_ctx_map.count("cpu"), 0);
         fcomp_t fcomp = forward_ctx_map.at("cpu");
-        CustomFComputeDispatcher(name_str, callFComp, fcomp, &attrs,
-                                 nullptr, 0, nullptr, ctx, inputs, req, outputs, msgSize, msgGet);
+        CustomFComputeDispatcher(name_str,
+                                 callFComp,
+                                 fcomp,
+                                 &attrs,
+                                 nullptr,
+                                 0,
+                                 nullptr,
+                                 ctx,
+                                 inputs,
+                                 req,
+                                 outputs,
+                                 msgSize,
+                                 msgGet);
       } else if (ctx.run_ctx.ctx.dev_mask() == Context::kGPU) {
         CHECK_GT(forward_ctx_map.count("gpu"), 0);
         fcomp_t fcomp = forward_ctx_map.at("gpu");
-        CustomFComputeDispatcher(name_str, callFComp, fcomp, &attrs,
-                                 nullptr, 0, nullptr, ctx, inputs, req, outputs, msgSize, msgGet);
+        CustomFComputeDispatcher(name_str,
+                                 callFComp,
+                                 fcomp,
+                                 &attrs,
+                                 nullptr,
+                                 0,
+                                 nullptr,
+                                 ctx,
+                                 inputs,
+                                 req,
+                                 outputs,
+                                 msgSize,
+                                 msgGet);
       }
     };
     if (forward_ctx_map.count("cpu") > 0)
@@ -467,7 +573,7 @@ void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp
   // optionally add fgradient if user specified a function, or for stateful ops
   if (backward_ctx_map.size() != 0 || createop_map.size() != 0) {
     std::string grad_name = "_backward_" + name_str;
-    nnvm::Op &gradOp = dmlc::Registry<nnvm::Op>::Get()->__REGISTER_OR_GET__(grad_name);
+    nnvm::Op& gradOp      = dmlc::Registry<nnvm::Op>::Get()->__REGISTER_OR_GET__(grad_name);
     regOp.set_attr<nnvm::FGradient>("FGradient", grad_reg, plevel);
     gradOp.set_attr<nnvm::TIsBackward>("TIsBackward", true, plevel);
     gradOp.set_attr<FInferStorageType>("FInferStorageType", infer_storage_type, plevel);
@@ -499,44 +605,78 @@ void registerOp(const char* name, const std::string& name_str, bool isSubgraphOp
                                  const std::vector<NDArray>& inputs,
                                  const std::vector<OpReqType>& req,
                                  const std::vector<NDArray>& outputs) {
-        CustomFComputeDispatcher(name_str, nullptr, nullptr, nullptr,
-                                 callFStatefulComp, 0, &state_ptr, ctx, inputs, req, outputs,
-                                 msgSize, msgGet);
+        CustomFComputeDispatcher(name_str,
+                                 nullptr,
+                                 nullptr,
+                                 nullptr,
+                                 callFStatefulComp,
+                                 0,
+                                 &state_ptr,
+                                 ctx,
+                                 inputs,
+                                 req,
+                                 outputs,
+                                 msgSize,
+                                 msgGet);
       };
       gradOp.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", fstate_backward, plevel);
       gradOp.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", fstate_backward, plevel);
     } else {
       // for stateless operators
       if (backward_ctx_map.count("cpu") > 0) {
-        fcomp_t fcomp_back_cpu = backward_ctx_map.at("cpu");
+        fcomp_t fcomp_back_cpu   = backward_ctx_map.at("cpu");
         auto backward_cpu_lambda = [=](const nnvm::NodeAttrs& attrs,
                                        const OpContext& ctx,
                                        const std::vector<NDArray>& inputs,
                                        const std::vector<OpReqType>& req,
                                        const std::vector<NDArray>& outputs) {
-          CustomFComputeDispatcher(name_str, callFComp, fcomp_back_cpu, &attrs,
-                                   nullptr, 0, nullptr, ctx, inputs, req, outputs, msgSize, msgGet);
+          CustomFComputeDispatcher(name_str,
+                                   callFComp,
+                                   fcomp_back_cpu,
+                                   &attrs,
+                                   nullptr,
+                                   0,
+                                   nullptr,
+                                   ctx,
+                                   inputs,
+                                   req,
+                                   outputs,
+                                   msgSize,
+                                   msgGet);
         };
         gradOp.set_attr<FComputeEx>("FComputeEx<cpu>", backward_cpu_lambda, plevel);
       }
       if (backward_ctx_map.count("gpu") > 0) {
-        fcomp_t fcomp_back_gpu = backward_ctx_map.at("gpu");
+        fcomp_t fcomp_back_gpu   = backward_ctx_map.at("gpu");
         auto backward_gpu_lambda = [=](const nnvm::NodeAttrs& attrs,
                                        const OpContext& ctx,
                                        const std::vector<NDArray>& inputs,
                                        const std::vector<OpReqType>& req,
                                        const std::vector<NDArray>& outputs) {
-          CustomFComputeDispatcher(name_str, callFComp, fcomp_back_gpu, &attrs,
-                                   nullptr, 0, nullptr, ctx, inputs, req, outputs, msgSize, msgGet);
+          CustomFComputeDispatcher(name_str,
+                                   callFComp,
+                                   fcomp_back_gpu,
+                                   &attrs,
+                                   nullptr,
+                                   0,
+                                   nullptr,
+                                   ctx,
+                                   inputs,
+                                   req,
+                                   outputs,
+                                   msgSize,
+                                   msgGet);
         };
         gradOp.set_attr<FComputeEx>("FComputeEx<gpu>", backward_gpu_lambda, plevel);
       }
     }
-    }
+  }
   regOp.add_argument("data", "NDArray[]", "Source inputs");
 }
 
-void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
+void registerOperators(void* lib,
+                       int verbose,
+                       mxnet::ext::msgSize_t msgSize,
                        mxnet::ext::msgGet_t msgGet) {
   using namespace mxnet::ext;
 
@@ -544,36 +684,36 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
   opCallFree_t callFree = get_func<opCallFree_t>(lib, const_cast<char*>(MXLIB_OPCALLFREE_STR));
 
   opCallParseAttrs_t callParseAttrs =
-    get_func<opCallParseAttrs_t>(lib, const_cast<char*>(MXLIB_OPCALLPARSEATTRS_STR));
+      get_func<opCallParseAttrs_t>(lib, const_cast<char*>(MXLIB_OPCALLPARSEATTRS_STR));
 
   opCallInferShape_t callInferShape =
-    get_func<opCallInferShape_t>(lib, const_cast<char*>(MXLIB_OPCALLINFERSHAPE_STR));
+      get_func<opCallInferShape_t>(lib, const_cast<char*>(MXLIB_OPCALLINFERSHAPE_STR));
 
   opCallInferType_t callInferType =
-    get_func<opCallInferType_t>(lib, const_cast<char*>(MXLIB_OPCALLINFERTYPE_STR));
+      get_func<opCallInferType_t>(lib, const_cast<char*>(MXLIB_OPCALLINFERTYPE_STR));
 
   opCallInferSType_t callInferSType =
-    get_func<opCallInferSType_t>(lib, const_cast<char*>(MXLIB_OPCALLINFERSTYPE_STR));
+      get_func<opCallInferSType_t>(lib, const_cast<char*>(MXLIB_OPCALLINFERSTYPE_STR));
 
-  opCallFComp_t callFComp =
-    get_func<opCallFComp_t>(lib, const_cast<char*>(MXLIB_OPCALLFCOMP_STR));
+  opCallFComp_t callFComp = get_func<opCallFComp_t>(lib, const_cast<char*>(MXLIB_OPCALLFCOMP_STR));
 
   opCallMutateInputs_t callMutateInputs =
-    get_func<opCallMutateInputs_t>(lib, const_cast<char*>(MXLIB_OPCALLMUTATEINPUTS_STR));
+      get_func<opCallMutateInputs_t>(lib, const_cast<char*>(MXLIB_OPCALLMUTATEINPUTS_STR));
 
   opCallCreateOpState_t callCreateOpState =
-    get_func<opCallCreateOpState_t>(lib, const_cast<char*>(MXLIB_OPCALLCREATEOPSTATE_STR));
+      get_func<opCallCreateOpState_t>(lib, const_cast<char*>(MXLIB_OPCALLCREATEOPSTATE_STR));
 
   opCallDestroyOpState_t callDestroyOpState =
-    get_func<opCallDestroyOpState_t>(lib, const_cast<char*>(MXLIB_OPCALLDESTROYOPSTATE_STR));
+      get_func<opCallDestroyOpState_t>(lib, const_cast<char*>(MXLIB_OPCALLDESTROYOPSTATE_STR));
 
   opCallFStatefulComp_t callFStatefulComp =
-    get_func<opCallFStatefulComp_t>(lib, const_cast<char*>(MXLIB_OPCALLFSTATEFULCOMP_STR));
+      get_func<opCallFStatefulComp_t>(lib, const_cast<char*>(MXLIB_OPCALLFSTATEFULCOMP_STR));
 
   // get number of operators registered in the library
   opRegSize_t opRegSize = get_func<opRegSize_t>(lib, const_cast<char*>(MXLIB_OPREGSIZE_STR));
-  int numOps = opRegSize();
-  if (verbose) LOG(INFO) << "Found " << numOps << " operators in library";
+  int numOps            = opRegSize();
+  if (verbose)
+    LOG(INFO) << "Found " << numOps << " operators in library";
 
   /*
    * Get all custom operators implementation from custom library
@@ -584,39 +724,51 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     const char* name;
     // function pointers holding implementation from custom library
     parseAttrs_t parse_fp = nullptr;
-    inferType_t type_fp = nullptr;
+    inferType_t type_fp   = nullptr;
     inferSType_t stype_fp = nullptr;
     inferShape_t shape_fp = nullptr;
     // optional attributes
     mutateInputs_t mutate_fp = nullptr;
-    bool isSubgraphOp = false;
-    int _isSubgraphOp = 0;
+    bool isSubgraphOp        = false;
+    int _isSubgraphOp        = 0;
     // lists of forward and backward function associated with each context
     const char **forward_ctx, **backward_ctx, **createop_ctx;
     fcomp_t *forward_fcomp, *backward_fcomp;
-    createOpState_t *createop_fp;
+    createOpState_t* createop_fp;
     int forward_count, backward_count, createop_count;
 
     // main function to get custom operator implemenation from the custom library
-    opRegGet(i, &name, &_isSubgraphOp,
-             &forward_ctx, &forward_fcomp, &forward_count,
-             &backward_ctx, &backward_fcomp, &backward_count,
-             &createop_ctx, &createop_fp, &createop_count,
-             &parse_fp, &type_fp, &stype_fp, &shape_fp, &mutate_fp);
+    opRegGet(i,
+             &name,
+             &_isSubgraphOp,
+             &forward_ctx,
+             &forward_fcomp,
+             &forward_count,
+             &backward_ctx,
+             &backward_fcomp,
+             &backward_count,
+             &createop_ctx,
+             &createop_fp,
+             &createop_count,
+             &parse_fp,
+             &type_fp,
+             &stype_fp,
+             &shape_fp,
+             &mutate_fp);
 
     // construct maps of context to forward/backward custom library function
     std::unordered_map<std::string, fcomp_t> forward_ctx_map;
     std::unordered_map<std::string, fcomp_t> backward_ctx_map;
     std::unordered_map<std::string, createOpState_t> createop_map;
-    for (int i=0; i < forward_count; i++) {
+    for (int i = 0; i < forward_count; i++) {
       std::string ctx_str(forward_ctx[i]);
       forward_ctx_map[ctx_str] = forward_fcomp[i];
     }
-    for (int i=0; i < backward_count; i++) {
+    for (int i = 0; i < backward_count; i++) {
       std::string ctx_str(backward_ctx[i]);
       backward_ctx_map[ctx_str] = backward_fcomp[i];
     }
-    for (int i=0; i < createop_count; i++) {
+    for (int i = 0; i < createop_count; i++) {
       std::string ctx_str(createop_ctx[i]);
       createop_map[ctx_str] = createop_fp[i];
     }
@@ -628,18 +780,21 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       CHECK(parse_fp != nullptr) << "Error loading '" << name
                                  << "' custom op, ParseAttrs function was not set.";
       CHECK(forward_ctx_map.size() != 0 || createop_map.size() != 0)
-                            << "Error loading '" << name
-                            << "' custom op, Forward or CreateOpState function was not set.";
+          << "Error loading '" << name
+          << "' custom op, Forward or CreateOpState function was not set.";
       CHECK(type_fp != nullptr) << "Error loading '" << name
-                            << "' custom op, InferType function was not set.";
+                                << "' custom op, InferType function was not set.";
       CHECK(shape_fp != nullptr) << "Error loading '" << name
-                            << "' custom op, InferShape function was not set.";
+                                 << "' custom op, InferShape function was not set.";
     } else {
-      CHECK(createop_map.size() != 0) << "Error loading '" << name
-                            << "' custom subgraph op, CreateOpState function was not set.";
+      CHECK(createop_map.size() != 0)
+          << "Error loading '" << name
+          << "' custom subgraph op, CreateOpState function was not set.";
     }
-    if (verbose) LOG(INFO) << "\tOp[" << i << "] " << name;
-    if (verbose && isSubgraphOp) LOG(INFO) << "\t\tisSubgraphOp";
+    if (verbose)
+      LOG(INFO) << "\tOp[" << i << "] " << name;
+    if (verbose && isSubgraphOp)
+      LOG(INFO) << "\t\tisSubgraphOp";
     std::string name_str(name);
 
     /*
@@ -652,7 +807,7 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     auto attr_parser = [=](const NodeAttrs* attrs) {
       // convert attributes to vector of char
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs->dict) {
+      for (auto& kv : attrs->dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
@@ -660,16 +815,16 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       std::string subgraph_json;
       if (!attrs->subgraphs.empty()) {
         nnvm::Graph g;
-        g.outputs = attrs->subgraphs[0].get()->outputs;
+        g.outputs     = attrs->subgraphs[0].get()->outputs;
         subgraph_json = nnvm::pass::SaveJSON(g);
         attr_keys.push_back(MX_STR_SUBGRAPH_SYM_JSON);
         attr_vals.push_back(subgraph_json.c_str());
       }
 
-      int num_in = -1;
+      int num_in  = -1;
       int num_out = -1;
-      int retval = callParseAttrs(parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                  &num_in, &num_out);
+      int retval  = callParseAttrs(
+          parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(), &num_in, &num_out);
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling ParseAttrs for custom operator '" << name_str << "'" << msgs;
 
@@ -680,18 +835,18 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     auto num_inputs = [=](const NodeAttrs& attrs) {
       // convert attributes to vector of char
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
 
-      int num_in = -1;
+      int num_in  = -1;
       int num_out = -1;
-      int retval = callParseAttrs(parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                  &num_in, &num_out);
+      int retval  = callParseAttrs(
+          parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(), &num_in, &num_out);
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling ParseAttrs::num_inputs for custom operator '" << name_str
-      << "'" << msgs;
+                    << "'" << msgs;
 
       // get extra inputs, if exists
       int extra_inputs = 0;
@@ -718,18 +873,18 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     auto num_outputs = [=](const NodeAttrs& attrs) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
 
-      int num_in = -1;
+      int num_in  = -1;
       int num_out = -1;
-      int retval = callParseAttrs(parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                  &num_in, &num_out);
+      int retval  = callParseAttrs(
+          parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(), &num_in, &num_out);
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling ParseAttrs::num_outputs for custom operator '" << name_str
-      << "'" << msgs;
+                    << "'" << msgs;
 
       return num_out;
     };
@@ -739,18 +894,18 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     auto num_inouts = [=](const NodeAttrs& attrs) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
 
-      int num_in = -1;
+      int num_in  = -1;
       int num_out = -1;
-      int retval = callParseAttrs(parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                  &num_in, &num_out);
+      int retval  = callParseAttrs(
+          parse_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(), &num_in, &num_out);
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling ParseAttrs::num_outputs for custom operator '" << name_str
-      << "'" << msgs;
+                    << "'" << msgs;
       // for backward passes, inputs + outputs + input gradients (one for each output)
 
       // get extra inputs, if exists
@@ -762,12 +917,12 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     };
 
     // lambda function to call infer shape
-    auto infer_shape = [=] (const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_shape,
-                            mxnet::ShapeVector *out_shape) {
+    auto infer_shape = [=](const nnvm::NodeAttrs& attrs,
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
@@ -788,10 +943,10 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
       // copy input shapes from ShapeVector to raw memory layout
       std::vector<uint32_t> inbuff(buff_size);
-      uint32_t *ptr = inbuff.data();
+      uint32_t* ptr = inbuff.data();
       for (size_t i = 0; i < num_inputs; ++i) {
         inshapes[i] = ptr;
-        indims[i] = (*in_shape)[i].ndim();
+        indims[i]   = (*in_shape)[i].ndim();
         for (int j = 0; j < (*in_shape)[i].ndim(); ++j, ++ptr) {
           *ptr = static_cast<uint32_t>((*in_shape)[i][j]);
         }
@@ -799,15 +954,23 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
       // modified input shapes will be allocated by infer shape function
       uint32_t** mod_inshapes = nullptr;
-      int* mod_indims = nullptr;
+      int* mod_indims         = nullptr;
       // output shapes will be allocated by infer shape function
       uint32_t** outshapes = nullptr;
-      int* outdims = nullptr;
-
-      int retval = callInferShape(shape_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                  inshapes.data(), indims.data(), num_inputs,
-                                  &mod_inshapes, &mod_indims,
-                                  &outshapes, &outdims, out_shape->size());
+      int* outdims         = nullptr;
+
+      int retval       = callInferShape(shape_fp,
+                                  attr_keys.data(),
+                                  attr_vals.data(),
+                                  attr_keys.size(),
+                                  inshapes.data(),
+                                  indims.data(),
+                                  num_inputs,
+                                  &mod_inshapes,
+                                  &mod_indims,
+                                  &outshapes,
+                                  &outdims,
+                                  out_shape->size());
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling InferShape for custom operator '" << name_str << "'" << msgs;
 
@@ -830,8 +993,7 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
       // assign modified input shapes to ShapeVector
       for (unsigned i = 0; i < num_inputs; ++i) {
-        SHAPE_ASSIGN_CHECK(*in_shape, i,
-                           mxnet::TShape(in_shapes[i], in_shapes[i]+mod_indims[i]));
+        SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(in_shapes[i], in_shapes[i] + mod_indims[i]));
       }
 
       std::vector<uint32_t*> out_shapes(out_shape->size());
@@ -853,8 +1015,7 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
       // assign output shapes to ShapeVector
       for (unsigned i = 0; i < out_shape->size(); ++i) {
-        SHAPE_ASSIGN_CHECK(*out_shape, i,
-                           mxnet::TShape(out_shapes[i], out_shapes[i]+outdims[i]));
+        SHAPE_ASSIGN_CHECK(*out_shape, i, mxnet::TShape(out_shapes[i], out_shapes[i] + outdims[i]));
       }
 
       // free memory used by custom op to allocate shapes/dims
@@ -874,12 +1035,12 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     };
 
     // lambda function to call infer shape for subgraph ops
-    auto infer_subgraph_shape = [=] (const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_shape,
-                            mxnet::ShapeVector *out_shape) {
+    auto infer_subgraph_shape = [=](const nnvm::NodeAttrs& attrs,
+                                    mxnet::ShapeVector* in_shape,
+                                    mxnet::ShapeVector* out_shape) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
@@ -889,9 +1050,9 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       if (attrs.dict.count(MX_STR_EXTRA_INPUTS) > 0)
         extra_inputs = std::stoi(attrs.dict.at(MX_STR_EXTRA_INPUTS));
 
-      auto in_first = in_shape->begin();
-      auto in_last  = in_first + in_shape->size() - extra_inputs;
-      mxnet::ShapeVector *sg_in_shapes = new mxnet::ShapeVector(in_first, in_last);
+      auto in_first                    = in_shape->begin();
+      auto in_last                     = in_first + in_shape->size() - extra_inputs;
+      mxnet::ShapeVector* sg_in_shapes = new mxnet::ShapeVector(in_first, in_last);
       bool res = mxnet::op::DefaultSubgraphOpShape(attrs, sg_in_shapes, out_shape);
 
       // assign modified input shapes to ShapeVector
@@ -902,12 +1063,12 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     };
 
     // lambda function to call infer type
-    auto infer_type = [=] (const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_type,
-                            std::vector<int> *out_type) {
+    auto infer_type = [=](const nnvm::NodeAttrs& attrs,
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
@@ -924,9 +1085,14 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       // output types will be populated by inferType function
       std::vector<int> outtypes(out_type->size());
 
-      int retval = callInferType(type_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                 intypes.data(), num_inputs,
-                                 outtypes.data(), out_type->size());
+      int retval       = callInferType(type_fp,
+                                 attr_keys.data(),
+                                 attr_vals.data(),
+                                 attr_keys.size(),
+                                 intypes.data(),
+                                 num_inputs,
+                                 outtypes.data(),
+                                 out_type->size());
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling InferType for custom operator '" << name_str << "'" << msgs;
 
@@ -943,55 +1109,58 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     };
 
     // lambda function to call infer type for subgraph ops
-    auto infer_subgraph_type = [=] (const nnvm::NodeAttrs& attrs,
-                                    std::vector<int> *in_type,
-                                    std::vector<int> *out_type) {
-      // convert attributes to vector of char*
-      std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
-        attr_keys.push_back(kv.first.c_str());
-        attr_vals.push_back(kv.second.c_str());
-      }
+    auto infer_subgraph_type =
+        [=](const nnvm::NodeAttrs& attrs, std::vector<int>* in_type, std::vector<int>* out_type) {
+          // convert attributes to vector of char*
+          std::vector<const char*> attr_keys, attr_vals;
+          for (auto& kv : attrs.dict) {
+            attr_keys.push_back(kv.first.c_str());
+            attr_vals.push_back(kv.second.c_str());
+          }
 
-      // get extra inputs, if exists
-      int extra_inputs = 0;
-      if (attrs.dict.count(MX_STR_EXTRA_INPUTS) > 0)
-        extra_inputs = std::stoi(attrs.dict.at(MX_STR_EXTRA_INPUTS));
+          // get extra inputs, if exists
+          int extra_inputs = 0;
+          if (attrs.dict.count(MX_STR_EXTRA_INPUTS) > 0)
+            extra_inputs = std::stoi(attrs.dict.at(MX_STR_EXTRA_INPUTS));
 
-      auto in_first = in_type->begin();
-      auto in_last  = in_first + in_type->size() - extra_inputs;
-      std::vector<int> *sg_in_types = new std::vector<int>(in_first, in_last);
+          auto in_first                 = in_type->begin();
+          auto in_last                  = in_first + in_type->size() - extra_inputs;
+          std::vector<int>* sg_in_types = new std::vector<int>(in_first, in_last);
 
-      bool res = mxnet::op::DefaultSubgraphOpType(attrs, sg_in_types, out_type);
-      // copy and assign modified input types
-      for (size_t i = 0; i < sg_in_types->size(); i++) {
-        TYPE_ASSIGN_CHECK(*in_type, i, sg_in_types->at(i));
-      }
-      return res;
-    };
+          bool res = mxnet::op::DefaultSubgraphOpType(attrs, sg_in_types, out_type);
+          // copy and assign modified input types
+          for (size_t i = 0; i < sg_in_types->size(); i++) {
+            TYPE_ASSIGN_CHECK(*in_type, i, sg_in_types->at(i));
+          }
+          return res;
+        };
 
     // lambda function to convert from external mutate_inputs to internal MXNet types
     auto mutate_inputs = [=](const nnvm::NodeAttrs& attrs) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
 
       // C type placeholder for mutate input indices vector
       int* mutate_indices = nullptr;
-      int indices_size = 0;
+      int indices_size    = 0;
 
       // call mutate inputs function
-      int retval = callMutateInputs(mutate_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                    &mutate_indices, &indices_size);
+      int retval       = callMutateInputs(mutate_fp,
+                                    attr_keys.data(),
+                                    attr_vals.data(),
+                                    attr_keys.size(),
+                                    &mutate_indices,
+                                    &indices_size);
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling MutateInputs for custom operator '" << name_str << "'"
-      << msgs;
+                    << msgs;
 
       std::vector<uint32_t> mutate_indices_list(indices_size);
-      for (int i=0; i < indices_size; i++) {
+      for (int i = 0; i < indices_size; i++) {
         mutate_indices_list[i] = static_cast<uint32_t>(mutate_indices[i]);
       }
 
@@ -1000,17 +1169,17 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
     // lambda function to set storage types
     auto infer_storage_type = [=](const nnvm::NodeAttrs& attrs,
-                                const int dev_mask,
-                                DispatchMode* dispatch_mode,
-                                std::vector<int>* in_stypes,
-                                std::vector<int>* out_stypes) {
+                                  const int dev_mask,
+                                  DispatchMode* dispatch_mode,
+                                  std::vector<int>* in_stypes,
+                                  std::vector<int>* out_stypes) {
       if (stype_fp == nullptr) {
         // InferSType is not defined in customized lib.
         CHECK(mxnet::common::ContainsOnlyStorage(*in_stypes, mxnet::kDefaultStorage))
-        << "Error input tensors are not dense for custom operator '" << name_str << "'";
+            << "Error input tensors are not dense for custom operator '" << name_str << "'";
         // set outputs as dense
-        return op::storage_type_assign(out_stypes, mxnet::kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFComputeEx);
+        return op::storage_type_assign(
+            out_stypes, mxnet::kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
       } else {
         // InferSType is defined in customized lib.
         // convert attributes to vector of char*
@@ -1031,12 +1200,17 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
         // output types will be populated by inferType function
         std::vector<int> outstypes(out_stypes->size());
-        int retval = callInferSType(stype_fp, attr_keys.data(), attr_vals.data(), attr_keys.size(),
-                                    instypes.data(), num_inputs,
-                                    outstypes.data(), out_stypes->size());
+        int retval       = callInferSType(stype_fp,
+                                    attr_keys.data(),
+                                    attr_vals.data(),
+                                    attr_keys.size(),
+                                    instypes.data(),
+                                    num_inputs,
+                                    outstypes.data(),
+                                    out_stypes->size());
         std::string msgs = getExtensionMsgs(msgSize, msgGet);
         CHECK(retval) << "Error calling InferSType for custom operator '" << name_str << "'"
-        << msgs;
+                      << msgs;
 
         // copy and assign modified input storage types from custom op to MXNet memory.
         for (size_t i = 0; i < num_inputs; i++) {
@@ -1058,31 +1232,31 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
                                            DispatchMode* dispatch_mode,
                                            std::vector<int>* in_stypes,
                                            std::vector<int>* out_stypes) {
-        // get extra inputs, if exists
-        int extra_inputs = 0;
-        if (attrs.dict.count(MX_STR_EXTRA_INPUTS) > 0)
-          extra_inputs = std::stoi(attrs.dict.at(MX_STR_EXTRA_INPUTS));
+      // get extra inputs, if exists
+      int extra_inputs = 0;
+      if (attrs.dict.count(MX_STR_EXTRA_INPUTS) > 0)
+        extra_inputs = std::stoi(attrs.dict.at(MX_STR_EXTRA_INPUTS));
 
-        auto in_first = in_stypes->begin();
-        auto in_last  = in_first + in_stypes->size() - extra_inputs;
-        std::vector<int> *sg_in_stypes = new std::vector<int>(in_first, in_last);
+      auto in_first                  = in_stypes->begin();
+      auto in_last                   = in_first + in_stypes->size() - extra_inputs;
+      std::vector<int>* sg_in_stypes = new std::vector<int>(in_first, in_last);
 
-        bool res = mxnet::op::DefaultSubgraphOpStorageType(attrs, dev_mask, dispatch_mode,
-                                                           sg_in_stypes, out_stypes);
-        // copy and assign modified input storage types
-        for (size_t i = 0; i < sg_in_stypes->size(); i++) {
-          STORAGE_TYPE_ASSIGN_CHECK(*in_stypes, i, sg_in_stypes->at(i));
-        }
-        return res;
+      bool res = mxnet::op::DefaultSubgraphOpStorageType(
+          attrs, dev_mask, dispatch_mode, sg_in_stypes, out_stypes);
+      // copy and assign modified input storage types
+      for (size_t i = 0; i < sg_in_stypes->size(); i++) {
+        STORAGE_TYPE_ASSIGN_CHECK(*in_stypes, i, sg_in_stypes->at(i));
+      }
+      return res;
     };
 
     // FGradient register lambda
     auto grad_reg = [=](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
       // create node for gradient
-      auto p = nnvm::Node::Create();
+      auto p                = nnvm::Node::Create();
       std::string grad_name = "_backward_" + name_str;
-      p->attrs.op = nnvm::Op::Get(grad_name.c_str());
-      p->attrs.name = n->attrs.name + "_backward";
+      p->attrs.op           = nnvm::Op::Get(grad_name.c_str());
+      p->attrs.name         = n->attrs.name + "_backward";
       // copy attributes and subgraphs
       p->attrs.dict = n->attrs.dict;
       for (const auto& s : n->attrs.subgraphs)
@@ -1106,9 +1280,9 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       // set inputs to gradient node
       p->inputs = heads;
       CHECK_EQ(p->num_inputs(), p->inputs.size())
-      << "Number of inputs to operator " << grad_name << " (" << p->num_inputs()
-      << ") does not match the actual number of inputs provided to operator "
-      << p->attrs.name << " (" << p->inputs.size() << ").";
+          << "Number of inputs to operator " << grad_name << " (" << p->num_inputs()
+          << ") does not match the actual number of inputs provided to operator " << p->attrs.name
+          << " (" << p->inputs.size() << ").";
       // create output node entries
       return mxnet::op::CreateNodeEntries(p);
     };
@@ -1120,13 +1294,13 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
     // library author should implement and return a 'state' which points to an instance
     // in lambda we create OpStatePtr using the returned 'state'
-    auto create_opstate = [=] (const NodeAttrs& attrs,
-                               Context ctx,
-                               const std::vector<TShape>& in_shapes,
-                               const std::vector<int>& in_types) {
+    auto create_opstate = [=](const NodeAttrs& attrs,
+                              Context ctx,
+                              const std::vector<TShape>& in_shapes,
+                              const std::vector<int>& in_types) {
       // convert attributes to vector of char*
       std::vector<const char*> attr_keys, attr_vals;
-      for (auto &kv : attrs.dict) {
+      for (auto& kv : attrs.dict) {
         attr_keys.push_back(kv.first.c_str());
         attr_vals.push_back(kv.second.c_str());
       }
@@ -1139,15 +1313,15 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
       // determine amount of memory needed to store all the input shapes
       size_t buff_size = 0;
-      for (const auto & in_shape : in_shapes)
+      for (const auto& in_shape : in_shapes)
         buff_size += in_shape.ndim();
 
       // copy input shapes to raw memory layout
       std::vector<uint32_t> inbuff(buff_size);
-      uint32_t *ptr = inbuff.data();
+      uint32_t* ptr = inbuff.data();
       for (size_t i = 0; i < in_shapes.size(); ++i) {
         inshapes[i] = ptr;
-        indims[i] = in_shapes[i].ndim();
+        indims[i]   = in_shapes[i].ndim();
         for (int j = 0; j < in_shapes[i].ndim(); ++j, ++ptr) {
           *ptr = static_cast<uint32_t>(in_shapes[i][j]);
         }
@@ -1157,7 +1331,7 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       std::string subgraph_json;
       if (!attrs.subgraphs.empty()) {
         nnvm::Graph g;
-        g.outputs = attrs.subgraphs[0].get()->outputs;
+        g.outputs     = attrs.subgraphs[0].get()->outputs;
         subgraph_json = nnvm::pass::SaveJSON(g);
         attr_keys.push_back(MX_STR_SUBGRAPH_SYM_JSON);
         attr_vals.push_back(subgraph_json.c_str());
@@ -1169,29 +1343,43 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       void* state_op_inst = nullptr;
       if (ctx.dev_mask() == Context::kCPU) {
         CHECK(createop_map.count("cpu") > 0)
-          << "CPU CreateOpState not implemented for '" << name_str << "'";
-        int retval = callCreateOpState(createop_map.at("cpu"), attr_keys.data(), attr_vals.data(),
-                                       attr_keys.size(), ctx_str, ctx.real_dev_id(),
-                                       inshapes.data(), indims.data(),
-                                       in_shapes.size(), in_types.data(), &state_op_inst);
+            << "CPU CreateOpState not implemented for '" << name_str << "'";
+        int retval       = callCreateOpState(createop_map.at("cpu"),
+                                       attr_keys.data(),
+                                       attr_vals.data(),
+                                       attr_keys.size(),
+                                       ctx_str,
+                                       ctx.real_dev_id(),
+                                       inshapes.data(),
+                                       indims.data(),
+                                       in_shapes.size(),
+                                       in_types.data(),
+                                       &state_op_inst);
         std::string msgs = getExtensionMsgs(msgSize, msgGet);
         CHECK(retval) << "Error calling CreateOpState CPU for custom operator '" << name_str << "'"
                       << msgs;
       } else if (ctx.dev_mask() == Context::kGPU) {
         CHECK(createop_map.count("gpu") > 0)
-          << "GPU CreateOpState not implemented for '" << name_str << "'";
-        int retval = callCreateOpState(createop_map.at("gpu"), attr_keys.data(), attr_vals.data(),
-                                       attr_keys.size(), ctx_str, ctx.real_dev_id(),
-                                       inshapes.data(), indims.data(),
-                                       in_shapes.size(), in_types.data(), &state_op_inst);
+            << "GPU CreateOpState not implemented for '" << name_str << "'";
+        int retval       = callCreateOpState(createop_map.at("gpu"),
+                                       attr_keys.data(),
+                                       attr_vals.data(),
+                                       attr_keys.size(),
+                                       ctx_str,
+                                       ctx.real_dev_id(),
+                                       inshapes.data(),
+                                       indims.data(),
+                                       in_shapes.size(),
+                                       in_types.data(),
+                                       &state_op_inst);
         std::string msgs = getExtensionMsgs(msgSize, msgGet);
         CHECK(retval) << "Error calling CreateOpState GPU for custom operator '" << name_str << "'"
-        << msgs;
+                      << msgs;
       }
 
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(state_op_inst != nullptr)
-      << "Error custom library failed to create stateful operator '" << name_str << "'" << msgs;
+          << "Error custom library failed to create stateful operator '" << name_str << "'" << msgs;
 
       CustomStatefulOp* state_op = reinterpret_cast<CustomStatefulOp*>(state_op_inst);
       if (!state_op->wasCreated() && !state_op->ignore_warn)
@@ -1205,115 +1393,152 @@ void registerOperators(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
     /* -------------- BELOW IS THE REGISTRATION FOR CUSTOM OPERATORS --------------- */
 
-    registerOp(name, name_str, isSubgraphOp, resc_req, attr_parser, num_inputs, num_outputs,
-               num_inouts, infer_type, infer_shape, infer_storage_type, mutate_inputs,
-               num_subgraph_inputs, infer_subgraph_type, infer_subgraph_shape,
-               infer_subgraph_storage_type, create_opstate, grad_reg, mutate_fp,
-               createop_map, forward_ctx_map, backward_ctx_map, callFComp, callFStatefulComp,
-               msgSize, msgGet);
-  }
-}
-
-void registerPartitioners(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
-                       mxnet::ext::msgGet_t msgGet) {
+    registerOp(name,
+               name_str,
+               isSubgraphOp,
+               resc_req,
+               attr_parser,
+               num_inputs,
+               num_outputs,
+               num_inouts,
+               infer_type,
+               infer_shape,
+               infer_storage_type,
+               mutate_inputs,
+               num_subgraph_inputs,
+               infer_subgraph_type,
+               infer_subgraph_shape,
+               infer_subgraph_storage_type,
+               create_opstate,
+               grad_reg,
+               mutate_fp,
+               createop_map,
+               forward_ctx_map,
+               backward_ctx_map,
+               callFComp,
+               callFStatefulComp,
+               msgSize,
+               msgGet);
+  }
+}  // NOLINT
+
+void registerPartitioners(void* lib,
+                          int verbose,
+                          mxnet::ext::msgSize_t msgSize,
+                          mxnet::ext::msgGet_t msgGet) {
   using namespace mxnet::ext;
 
   // get C type interface functions
   opCallFree_t callFree = get_func<opCallFree_t>(lib, const_cast<char*>(MXLIB_OPCALLFREE_STR));
 
   partCallSupportedOps_t callSupportedOps =
-    get_func<partCallSupportedOps_t>(lib, const_cast<char*>(MXLIB_PARTCALLSUPPORTEDOPS_STR));
+      get_func<partCallSupportedOps_t>(lib, const_cast<char*>(MXLIB_PARTCALLSUPPORTEDOPS_STR));
 
   partCallCreateSelector_t callCreateSelector =
-    get_func<partCallCreateSelector_t>(lib, const_cast<char*>(MXLIB_PARTCALLCREATESELECTOR_STR));
+      get_func<partCallCreateSelector_t>(lib, const_cast<char*>(MXLIB_PARTCALLCREATESELECTOR_STR));
 
   partCallSelect_t callSelect =
-    get_func<partCallSelect_t>(lib, const_cast<char*>(MXLIB_PARTCALLSELECT_STR));
+      get_func<partCallSelect_t>(lib, const_cast<char*>(MXLIB_PARTCALLSELECT_STR));
 
   partCallSelectInput_t callSelectInput =
-    get_func<partCallSelectInput_t>(lib, const_cast<char*>(MXLIB_PARTCALLSELECTINPUT_STR));
+      get_func<partCallSelectInput_t>(lib, const_cast<char*>(MXLIB_PARTCALLSELECTINPUT_STR));
 
   partCallSelectOutput_t callSelectOutput =
-    get_func<partCallSelectOutput_t>(lib, const_cast<char*>(MXLIB_PARTCALLSELECTOUTPUT_STR));
+      get_func<partCallSelectOutput_t>(lib, const_cast<char*>(MXLIB_PARTCALLSELECTOUTPUT_STR));
 
   partCallFilter_t callFilter =
-    get_func<partCallFilter_t>(lib, const_cast<char*>(MXLIB_PARTCALLFILTER_STR));
+      get_func<partCallFilter_t>(lib, const_cast<char*>(MXLIB_PARTCALLFILTER_STR));
 
   partCallReset_t callReset =
-    get_func<partCallReset_t>(lib, const_cast<char*>(MXLIB_PARTCALLRESET_STR));
+      get_func<partCallReset_t>(lib, const_cast<char*>(MXLIB_PARTCALLRESET_STR));
 
   partCallReviewSubgraph_t callReviewSubgraph =
-    get_func<partCallReviewSubgraph_t>(lib, const_cast<char*>(MXLIB_PARTCALLREVIEWSUBGRAPH_STR));
+      get_func<partCallReviewSubgraph_t>(lib, const_cast<char*>(MXLIB_PARTCALLREVIEWSUBGRAPH_STR));
 
   // get number of partitioners registered in the library
-  partRegSize_t partRegSize = get_func<partRegSize_t>(lib,
-                                                      const_cast<char*>(MXLIB_PARTREGSIZE_STR));
+  partRegSize_t partRegSize =
+      get_func<partRegSize_t>(lib, const_cast<char*>(MXLIB_PARTREGSIZE_STR));
   int numParts = partRegSize();
-  if (verbose) LOG(INFO) << "Found " << numParts << " partitioners in library";
+  if (verbose)
+    LOG(INFO) << "Found " << numParts << " partitioners in library";
 
   /*
    * Get all custom partitioners implementation from custom library
    * loop and register each partitioner in the library to NNVM
    */
-  partRegGetCount_t partRegGetCount = get_func<partRegGetCount_t>(lib,
-                                                  const_cast<char*>(MXLIB_PARTREGGETCOUNT_STR));
+  partRegGetCount_t partRegGetCount =
+      get_func<partRegGetCount_t>(lib, const_cast<char*>(MXLIB_PARTREGGETCOUNT_STR));
   partRegGet_t partRegGet = get_func<partRegGet_t>(lib, const_cast<char*>(MXLIB_PARTREGGET_STR));
   for (int i = 0; i < numParts; i++) {
     const char* name;
     // get custom partitioner strategy count from the dynamic library
     int count = partRegGetCount(i, &name);
-    CHECK(count > 0) << "Error loading '" << name
-                     << "' custom partitioner, no strategies defined";
+    CHECK(count > 0) << "Error loading '" << name << "' custom partitioner, no strategies defined";
     std::string name_str(name);
-    if (verbose) LOG(INFO) << "\tPartitioner[" << i << "] " << name;
+    if (verbose)
+      LOG(INFO) << "\tPartitioner[" << i << "] " << name;
 
     mxnet::op::SubgraphBackendRegistry::Get()->__REGISTER_BACKEND__(name);
 
     for (int j = 0; j < count; j++) {
       const char* strategy;
       // function pointers holding implementation from custom library
-      supportedOps_t supportedOps_fp = nullptr;
+      supportedOps_t supportedOps_fp     = nullptr;
       createSelector_t createSelector_fp = nullptr;
       reviewSubgraph_t reviewSubgraph_fp = nullptr;
       // name of subgraph op
       const char* op_name = nullptr;
 
       // get custom partitioner strategy from the dynamic library
-      partRegGet(i, j, &strategy, &supportedOps_fp, &createSelector_fp,
-                 &reviewSubgraph_fp, &op_name);
+      partRegGet(
+          i, j, &strategy, &supportedOps_fp, &createSelector_fp, &reviewSubgraph_fp, &op_name);
       // validate custom partitioner functions from the dynamic library
       if (supportedOps_fp == nullptr && createSelector_fp == nullptr)
-        LOG(ERROR) << "Error loading '" << name << "' custom partitioner strategy '"
-                   << strategy << "', must implement supportedOps or createSelector";
+        LOG(ERROR) << "Error loading '" << name << "' custom partitioner strategy '" << strategy
+                   << "', must implement supportedOps or createSelector";
       std::string strategy_str(strategy);
       std::string op_name_str(op_name);
-      if (verbose) LOG(INFO) << "\t\tStrategy[" << j << "] " << strategy_str
-                             << " subgraphOp: '" << op_name_str << "'";
-      mxnet::op::SubgraphBackendRegistry::Get()->__REGISTER_CUSTOM_PROPERTY__
-        (name_str, std::make_shared<mxnet::op::CustomSubgraphProperty>
-         (strategy_str, callSupportedOps, supportedOps_fp, callCreateSelector,
-          createSelector_fp, callSelect, callSelectInput, callSelectOutput,
-          callFilter, callReset, callReviewSubgraph, reviewSubgraph_fp, callFree,
-          op_name_str));
+      if (verbose)
+        LOG(INFO) << "\t\tStrategy[" << j << "] " << strategy_str << " subgraphOp: '" << op_name_str
+                  << "'";
+      mxnet::op::SubgraphBackendRegistry::Get()->__REGISTER_CUSTOM_PROPERTY__(
+          name_str,
+          std::make_shared<mxnet::op::CustomSubgraphProperty>(strategy_str,
+                                                              callSupportedOps,
+                                                              supportedOps_fp,
+                                                              callCreateSelector,
+                                                              createSelector_fp,
+                                                              callSelect,
+                                                              callSelectInput,
+                                                              callSelectOutput,
+                                                              callFilter,
+                                                              callReset,
+                                                              callReviewSubgraph,
+                                                              reviewSubgraph_fp,
+                                                              callFree,
+                                                              op_name_str));
     }
   }
 }
 
-void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
-                       mxnet::ext::msgGet_t msgGet) {
+void registerPasses(void* lib,
+                    int verbose,
+                    mxnet::ext::msgSize_t msgSize,
+                    mxnet::ext::msgGet_t msgGet) {
   using namespace mxnet::ext;
 
   // get C type interface functions
   opCallFree_t callFree = get_func<opCallFree_t>(lib, const_cast<char*>(MXLIB_OPCALLFREE_STR));
 
   passCallGraphPass_t callGraphPass =
-    get_func<passCallGraphPass_t>(lib, const_cast<char*>(MXLIB_PASSCALLGRAPHPASS_STR));
+      get_func<passCallGraphPass_t>(lib, const_cast<char*>(MXLIB_PASSCALLGRAPHPASS_STR));
 
   // get number of passes registered in the library
-  partRegSize_t passRegSize = get_func<passRegSize_t>(lib,
-                                                      const_cast<char*>(MXLIB_PASSREGSIZE_STR));
+  partRegSize_t passRegSize =
+      get_func<passRegSize_t>(lib, const_cast<char*>(MXLIB_PASSREGSIZE_STR));
   int numPasses = passRegSize();
-  if (verbose) LOG(INFO) << "Found " << numPasses << " graph passes in library";
+  if (verbose)
+    LOG(INFO) << "Found " << numPasses << " graph passes in library";
 
   /*
    * Get all custom pass implementation from custom library
@@ -1328,14 +1553,15 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
     // main function to get custom pass implemenation from the custom library
     passRegGet(i, &pass_fp, &name);
 
-    if (verbose) LOG(INFO) << "\tGraph Pass [" << i << "] " << name;
+    if (verbose)
+      LOG(INFO) << "\tGraph Pass [" << i << "] " << name;
 
-    auto pass_lambda = [=] (nnvm::Graph&& g) {
+    auto pass_lambda = [=](nnvm::Graph&& g) {
       // get pass name
       const char* pass_name = g.GetAttr<const char*>("pass_name");
       // get options
       const std::unordered_map<std::string, std::string>& options_map =
-            g.GetAttr<const std::unordered_map<std::string, std::string>>("options_map");
+          g.GetAttr<const std::unordered_map<std::string, std::string>>("options_map");
       // convert options_map_ to char* to pass to backend library
       std::vector<const char*> opt_keys, opt_vals;
       for (auto& kv : options_map) {
@@ -1346,8 +1572,8 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       // get input args and arg names
       std::vector<std::string> in_arg_names = g.GetAttr<std::vector<std::string>>("in_arg_names");
       std::vector<std::string> in_aux_names = g.GetAttr<std::vector<std::string>>("in_aux_names");
-      NDArray **in_args_ptr = g.GetAttr<NDArray**>("in_args");
-      NDArray **in_aux_ptr = g.GetAttr<NDArray**>("in_aux");
+      NDArray** in_args_ptr                 = g.GetAttr<NDArray**>("in_args");
+      NDArray** in_aux_ptr                  = g.GetAttr<NDArray**>("in_aux");
 
       // get shapes/types
       mxnet::ShapeVector shapes;
@@ -1355,7 +1581,7 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
         shapes = g.GetAttr<mxnet::ShapeVector>("shape");
       std::vector<int> dtypes;
       if (g.HasAttr("dtype"))
-        dtypes = g.GetAttr<std::vector<int> >("dtype");
+        dtypes = g.GetAttr<std::vector<int>>("dtype");
       g.attrs.clear();
       const nnvm::IndexedGraph& indexed_graph = g.indexed_graph();
 
@@ -1368,9 +1594,10 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
           // set the output shapes for this node
           for (unsigned oid = 0; oid < node->num_outputs(); oid++) {
             const uint32_t out_entry_id = indexed_graph.entry_id(nid, oid);
-            mxnet::TShape& shape = shapes[out_entry_id];
+            mxnet::TShape& shape        = shapes[out_entry_id];
             ss << shape;
-            if (oid < node->num_outputs()-1) ss << ",";
+            if (oid < node->num_outputs() - 1)
+              ss << ",";
           }
           ss << "]";
           node->attrs.dict[MX_STR_SHAPE] = ss.str();
@@ -1385,9 +1612,10 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
           // set the output dtypes for this node
           for (unsigned oid = 0; oid < node->num_outputs(); oid++) {
             const uint32_t out_entry_id = indexed_graph.entry_id(nid, oid);
-            int dtype = dtypes[out_entry_id];
+            int dtype                   = dtypes[out_entry_id];
             ss << dtype;
-            if (oid < node->num_outputs()-1) ss << ",";
+            if (oid < node->num_outputs() - 1)
+              ss << ",";
           }
           ss << "]";
           node->attrs.dict[MX_STR_DTYPE] = ss.str();
@@ -1404,10 +1632,10 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       std::vector<int> arg_dev_id, aux_dev_id;
 
       // convert input args
-      for (size_t i=0; i < in_arg_names.size(); i++) {
+      for (size_t i = 0; i < in_arg_names.size(); i++) {
         if (in_args_ptr[i] != nullptr) {
           arg_names.push_back(in_arg_names[i].c_str());
-          const NDArray &in_arg = *(in_args_ptr[i]);
+          const NDArray& in_arg = *(in_args_ptr[i]);
 
 #if MXNET_USE_ONEDNN == 1
           // reorder data if in MKLDNN format
@@ -1430,10 +1658,10 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
       }
 
       // convert input aux
-      for (size_t i=0; i < in_aux_names.size(); i++) {
+      for (size_t i = 0; i < in_aux_names.size(); i++) {
         if (in_aux_ptr[i] != nullptr) {
           aux_names.push_back(in_aux_names[i].c_str());
-          const auto &in_aux = *(in_aux_ptr[i]);
+          const auto& in_aux = *(in_aux_ptr[i]);
 
 #if MXNET_USE_ONEDNN == 1
           // reorder data if in MKLDNN format
@@ -1463,26 +1691,32 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
 
       // create lambda that captures stream & resource objects
       // this temp workspace holds memory allocated by custom library via OpResource
-      auto ndarray_alloc = [&](const mxnet::TShape &shape, Context ctx, int dtype,
-                               std::string name, bool isArg) {
-        NDArray* arr = new NDArray(shape, ctx, false, dtype);
-        if (isArg) {
-          new_args.push_back(arr);
-          new_arg_names.push_back(name);
-        } else {
-          new_aux.push_back(arr);
-          new_aux_names.push_back(name);
-        }
-        return arr;
-      };
+      auto ndarray_alloc =
+          [&](const mxnet::TShape& shape, Context ctx, int dtype, std::string name, bool isArg) {
+            NDArray* arr = new NDArray(shape, ctx, false, dtype);
+            if (isArg) {
+              new_args.push_back(arr);
+              new_arg_names.push_back(name);
+            } else {
+              new_aux.push_back(arr);
+              new_aux_names.push_back(name);
+            }
+            return arr;
+          };
 
       // create no-capture lambda so that we can cast it to function pointer
       // lambda with captures cannot be cast to function pointer and pass to lib_api.h
       // this needs to be a lambda function so that we can do the decltype cast
       using alloc_type_ndarray = decltype(ndarray_alloc);
-      auto ndarray_malloc = [](const void* _ndarray_alloc, const int64_t* shapes, int num_shapes,
-                               const char* dev_str, int dev_id, int dtype, const char* name,
-                               int isArg, void** data) {
+      auto ndarray_malloc      = [](const void* _ndarray_alloc,
+                               const int64_t* shapes,
+                               int num_shapes,
+                               const char* dev_str,
+                               int dev_id,
+                               int dtype,
+                               const char* name,
+                               int isArg,
+                               void** data) {
         mxnet::TShape shape(num_shapes, 0);
         for (int i = 0; i < num_shapes; i++)
           shape[i] = shapes[i];
@@ -1497,29 +1731,46 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
         const alloc_type_ndarray* ndalloc = static_cast<const alloc_type_ndarray*>(_ndarray_alloc);
         // call cpu_alloc to actually allocate memory and return the pointer
         NDArray* arr = (*ndalloc)(shape, ctx, dtype, name, isArg);
-        *data = arr->data().dptr_;
+        *data        = arr->data().dptr_;
       };
 
       char* out_json;
-      int retval = callGraphPass(pass_fp, in_json.c_str(), &out_json, opt_keys.data(),
-                                 opt_vals.data(), opt_keys.size(), pass_name,
-                                 arg_names.data(), arg_names.size(), arg_data.data(),
-                                 arg_shapes.data(), arg_dims.data(), arg_types.data(),
-                                 arg_verIDs.data(), arg_dev_type.data(),
-                                 arg_dev_id.data(), aux_names.data(), aux_names.size(),
-                                 aux_data.data(), aux_shapes.data(), aux_dims.data(),
-                                 aux_types.data(), aux_verIDs.data(),
-                                 aux_dev_type.data(), aux_dev_id.data(),
-                                 ndarray_malloc, &ndarray_alloc);
+      int retval       = callGraphPass(pass_fp,
+                                 in_json.c_str(),
+                                 &out_json,
+                                 opt_keys.data(),
+                                 opt_vals.data(),
+                                 opt_keys.size(),
+                                 pass_name,
+                                 arg_names.data(),
+                                 arg_names.size(),
+                                 arg_data.data(),
+                                 arg_shapes.data(),
+                                 arg_dims.data(),
+                                 arg_types.data(),
+                                 arg_verIDs.data(),
+                                 arg_dev_type.data(),
+                                 arg_dev_id.data(),
+                                 aux_names.data(),
+                                 aux_names.size(),
+                                 aux_data.data(),
+                                 aux_shapes.data(),
+                                 aux_dims.data(),
+                                 aux_types.data(),
+                                 aux_verIDs.data(),
+                                 aux_dev_type.data(),
+                                 aux_dev_id.data(),
+                                 ndarray_malloc,
+                                 &ndarray_alloc);
       std::string msgs = getExtensionMsgs(msgSize, msgGet);
       CHECK(retval) << "Error calling graph pass for '" << pass_name << "'" << msgs;
 
       std::string out_string(out_json);
       nnvm::Graph out_graph = nnvm::pass::LoadJSON(out_string);
 
-      out_graph.attrs["new_args"] = std::make_shared<nnvm::any>(new_args);
+      out_graph.attrs["new_args"]      = std::make_shared<nnvm::any>(new_args);
       out_graph.attrs["new_arg_names"] = std::make_shared<nnvm::any>(new_arg_names);
-      out_graph.attrs["new_aux"] = std::make_shared<nnvm::any>(new_aux);
+      out_graph.attrs["new_aux"]       = std::make_shared<nnvm::any>(new_aux);
       out_graph.attrs["new_aux_names"] = std::make_shared<nnvm::any>(new_aux_names);
 
       callFree(out_json);
@@ -1536,7 +1787,7 @@ void registerPasses(void *lib, int verbose, mxnet::ext::msgSize_t msgSize,
  * \brief Loads dynamic custom library and initializes it
  * \param path library path
  */
-int MXLoadLib(const char *path, unsigned verbose, void** lib) {
+int MXLoadLib(const char* path, unsigned verbose, void** lib) {
   API_BEGIN();
   *lib = LibraryInitializer::Get()->lib_load(path);
   if (!*lib)
@@ -1544,21 +1795,21 @@ int MXLoadLib(const char *path, unsigned verbose, void** lib) {
 
   // check that library and MXNet use same version of library API
   mxnet::ext::opVersion_t opVersion =
-    get_func<mxnet::ext::opVersion_t>(*lib, const_cast<char*>(MXLIB_OPVERSION_STR));
-  int libVersion =  opVersion();
+      get_func<mxnet::ext::opVersion_t>(*lib, const_cast<char*>(MXLIB_OPVERSION_STR));
+  int libVersion = opVersion();
   if (MX_LIBRARY_VERSION != libVersion)
     LOG(FATAL) << "Library version (" << libVersion << ") does not match MXNet version ("
                << MX_LIBRARY_VERSION << ")";
 
   // get error messaging APIs
   mxnet::ext::msgSize_t msgSize =
-    get_func<mxnet::ext::msgSize_t>(*lib, const_cast<char*>(MXLIB_MSGSIZE_STR));
+      get_func<mxnet::ext::msgSize_t>(*lib, const_cast<char*>(MXLIB_MSGSIZE_STR));
   mxnet::ext::msgGet_t msgGet =
-    get_func<mxnet::ext::msgGet_t>(*lib, const_cast<char*>(MXLIB_MSGGET_STR));
+      get_func<mxnet::ext::msgGet_t>(*lib, const_cast<char*>(MXLIB_MSGGET_STR));
 
   // initialize library by passing MXNet version
   mxnet::ext::initialize_t initialize =
-    get_func<mxnet::ext::initialize_t>(*lib, const_cast<char*>(MXLIB_INITIALIZE_STR));
+      get_func<mxnet::ext::initialize_t>(*lib, const_cast<char*>(MXLIB_INITIALIZE_STR));
   if (!initialize(static_cast<int>(MXNET_VERSION))) {
     std::string msgs = getExtensionMsgs(msgSize, msgGet);
     LOG(FATAL) << "Library failed to initialize" << msgs;
@@ -1571,12 +1822,12 @@ int MXLoadLib(const char *path, unsigned verbose, void** lib) {
   API_END();
 }
 
-int MXLibInfoFeatures(const struct LibFeature **lib_features, size_t *size) {
+int MXLibInfoFeatures(const struct LibFeature** lib_features, size_t* size) {
   using namespace features;
   API_BEGIN();
   LibInfo* lib_info = LibInfo::getInstance();
-  *lib_features = lib_info->getFeatures().data();
-  *size = lib_info->getFeatures().size();
+  *lib_features     = lib_info->getFeatures().data();
+  *size             = lib_info->getFeatures().size();
   API_END();
 }
 
@@ -1590,7 +1841,6 @@ int MXLibInfoCompiledWithCXX11ABI(int* result) {
   API_END();
 }
 
-
 int MXRandomSeed(int seed) {
   API_BEGIN();
   mxnet::RandomSeed(seed);
@@ -1608,31 +1858,31 @@ int MXSetFlushDenorms(bool value, bool* prev_state) {
   API_BEGIN();
   *prev_state = false;
 
-  #if SUPPORT_FTZ_DMZ
-    std::function<bool()> is_dmz_flag_available = []() {
-      // Intel 64 and IA-32 Architectures Software Developer’s Manual: Vol. 1
-      // "Checking for the DAZ Flag in the MXCSR Register"
-      constexpr unsigned int mxcsr_mask_offset = 28;
-      constexpr unsigned int dmz_flag_offset = 5;
-      constexpr unsigned int fxsave_req_bytes = 512;
-
-      char* fxsave_area_ptr = reinterpret_cast<char*>(malloc(fxsave_req_bytes));
-      memset(fxsave_area_ptr, 0, fxsave_req_bytes);  // fill memory with 0
-      _fxsave(fxsave_area_ptr);
-
-      char* mxcsr_mask_ptr = fxsave_area_ptr + mxcsr_mask_offset;
-      uint32_t mxcsr_mask = *(reinterpret_cast<uint32_t*>((mxcsr_mask_ptr)));
-      // DMZ flag is supported if sixth bit of MXCSR_MASK is hot
-      bool dmz_flag = (mxcsr_mask >> dmz_flag_offset) & 0x1;
-      free(fxsave_area_ptr);
-      return dmz_flag;
-    };
+#if SUPPORT_FTZ_DMZ
+  std::function<bool()> is_dmz_flag_available = []() {
+    // Intel 64 and IA-32 Architectures Software Developer’s Manual: Vol. 1
+    // "Checking for the DAZ Flag in the MXCSR Register"
+    constexpr unsigned int mxcsr_mask_offset = 28;
+    constexpr unsigned int dmz_flag_offset   = 5;
+    constexpr unsigned int fxsave_req_bytes  = 512;
+
+    char* fxsave_area_ptr = reinterpret_cast<char*>(malloc(fxsave_req_bytes));
+    memset(fxsave_area_ptr, 0, fxsave_req_bytes);  // fill memory with 0
+    _fxsave(fxsave_area_ptr);
+
+    char* mxcsr_mask_ptr = fxsave_area_ptr + mxcsr_mask_offset;
+    uint32_t mxcsr_mask  = *(reinterpret_cast<uint32_t*>((mxcsr_mask_ptr)));
+    // DMZ flag is supported if sixth bit of MXCSR_MASK is hot
+    bool dmz_flag = (mxcsr_mask >> dmz_flag_offset) & 0x1;
+    free(fxsave_area_ptr);
+    return dmz_flag;
+  };
 
-    Engine::Get()->PushSync(
+  Engine::Get()->PushSync(
       [value, prev_state, is_dmz_flag_available](RunContext rctx) {
         const unsigned int DMZ_STATE = value ? _MM_DENORMALS_ZERO_ON : _MM_DENORMALS_ZERO_OFF;
         const unsigned int FTZ_STATE = value ? _MM_FLUSH_ZERO_ON : _MM_FLUSH_ZERO_OFF;
-        *prev_state = _MM_GET_FLUSH_ZERO_MODE();
+        *prev_state                  = _MM_GET_FLUSH_ZERO_MODE();
         _MM_SET_FLUSH_ZERO_MODE(FTZ_STATE);
 
         // If the DAZ flag is not supported, then it is a reserved bit and attempting to write a 1
@@ -1640,12 +1890,17 @@ int MXSetFlushDenorms(bool value, bool* prev_state) {
         if (is_dmz_flag_available()) {
           _MM_SET_DENORMALS_ZERO_MODE(DMZ_STATE);
         }
-      }, Context::CPU(), {}, {},
-      FnProperty::kNormal, 0, "SetFlushDenorms");
+      },
+      Context::CPU(),
+      {},
+      {},
+      FnProperty::kNormal,
+      0,
+      "SetFlushDenorms");
 
-    Engine::Get()->WaitForAll();
+  Engine::Get()->WaitForAll();
 
-  #endif
+#endif
 
   API_END();
 }
@@ -1677,33 +1932,33 @@ int MXGetGPUCount(int* out) {
 }
 
 // Deprecated: use MXGetGPUMemoryInformation64() instead.
-int MXGetGPUMemoryInformation(int dev, int *free_mem, int *total_mem) {
+int MXGetGPUMemoryInformation(int dev, int* free_mem, int* total_mem) {
   API_BEGIN();
-  uint64_t free_mem64 = 0UL;
+  uint64_t free_mem64  = 0UL;
   uint64_t total_mem64 = 0UL;
   Context::GetGPUMemoryInformation(dev, &free_mem64, &total_mem64);
-  *free_mem = static_cast<int>(free_mem64);
+  *free_mem  = static_cast<int>(free_mem64);
   *total_mem = static_cast<int>(total_mem64);
   API_END();
 }
 
-int MXGetGPUMemoryInformation64(int dev, uint64_t *free_mem, uint64_t *total_mem) {
+int MXGetGPUMemoryInformation64(int dev, uint64_t* free_mem, uint64_t* total_mem) {
   API_BEGIN();
   Context::GetGPUMemoryInformation(dev, free_mem, total_mem);
   API_END();
 }
 
-int MXGetVersion(int *out) {
+int MXGetVersion(int* out) {
   API_BEGIN();
   *out = static_cast<int>(MXNET_VERSION);
   API_END();
 }
 
 #if MXNET_USE_TVM_OP
-int MXLoadTVMOp(const char *libpath) {
+int MXLoadTVMOp(const char* libpath) {
   API_BEGIN();
   tvm::runtime::TVMOpModule::Get()->Load(libpath);
-  tvm::runtime::TVMOpModule *global_module =  tvm::runtime::TVMOpModule::Get();
+  tvm::runtime::TVMOpModule* global_module = tvm::runtime::TVMOpModule::Get();
   global_module->Load(libpath);
 #if MXNET_USE_CUDA
   std::string libpathstr(libpath);
@@ -1718,8 +1973,9 @@ int MXLoadTVMOp(const char *libpath) {
 int MXLoadTVMConfig(ConfigSpaces config) {
   API_BEGIN();
   for (int k = 0; k < config.spaces_size; ++k) {
-    tvm::runtime::TVMOpConfig& entry = ::dmlc::Registry<tvm::runtime::TVMOpConfig>::Get()
-      ->__REGISTER_OR_GET__(std::string(config.spaces_key[k]));
+    tvm::runtime::TVMOpConfig& entry =
+        ::dmlc::Registry<tvm::runtime::TVMOpConfig>::Get()->__REGISTER_OR_GET__(
+            std::string(config.spaces_key[k]));
     const ConfigSpace& c = config.spaces_val[k];
     for (int i = 0; i < c.entity_map_size; ++i) {
       entry.add_entity(std::string(c.entity_map_key[i]), c.entity_map_val[i].val);
@@ -1739,13 +1995,13 @@ int MXLoadTVMConfig(ConfigSpaces config) {
 
 #endif  // MXNET_USE_TVM_OP
 
-int MXNDArrayCreateNone(NDArrayHandle *out) {
+int MXNDArrayCreateNone(NDArrayHandle* out) {
   API_BEGIN();
   *out = new NDArray();
   API_END();
 }
 
-template<typename DataType>
+template <typename DataType>
 void CreateNDArray(const DataType* shape,
                    int ndim,
                    int dev_type,
@@ -1755,55 +2011,56 @@ void CreateNDArray(const DataType* shape,
                    NDArrayHandle* out) {
   mxnet::TShape requested_shape = mxnet::TShape(shape, shape + ndim);
   if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
-    CHECK_LT(requested_shape.Size(), (int64_t{1} << 31) - 1) <<
-              "[CreateNDArray] Size of tensor you are trying to allocate is larger than "
-              "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+    CHECK_LT(requested_shape.Size(), (int64_t{1} << 31) - 1)
+        << "[CreateNDArray] Size of tensor you are trying to allocate is larger than "
+           "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
   }
   NDArray* nd = new NDArray(requested_shape,
                             Context::Create(static_cast<Context::DeviceType>(dev_type), dev_id),
-                            delay_alloc != 0, dtype);
+                            delay_alloc != 0,
+                            dtype);
   nd->AssignStorageInfo(profiler::ProfilerScope::Get()->GetCurrentProfilerScope(),
                         MXNET_STORAGE_DEFAULT_NAME_CSTR);
   *out = nd;
 }
 
-int MXNDArrayCreate64(const int64_t *shape,
+int MXNDArrayCreate64(const int64_t* shape,
                       int ndim,
                       int dev_type,
                       int dev_id,
                       int delay_alloc,
                       int dtype,
-                      NDArrayHandle *out) {
+                      NDArrayHandle* out) {
   API_BEGIN();
   CreateNDArray<int64_t>(shape, ndim, dev_type, dev_id, delay_alloc, dtype, out);
   API_END();
 }
 
-int MXNDArrayCreate(const uint32_t *shape,
+int MXNDArrayCreate(const uint32_t* shape,
                     uint32_t ndim,
                     int dev_type,
                     int dev_id,
                     int delay_alloc,
                     int dtype,
-                    NDArrayHandle *out) {
+                    NDArrayHandle* out) {
   API_BEGIN();
   CreateNDArray<uint32_t>(shape, static_cast<int>(ndim), dev_type, dev_id, delay_alloc, dtype, out);
   API_END();
 }
 
-template<typename DType>
+template <typename DType>
 void CreateSparseNDArray(int storage_type,
-                         const DType *shape,
+                         const DType* shape,
                          int ndim,
                          int dev_type,
                          int dev_id,
                          int delay_alloc,
                          int dtype,
                          uint32_t num_aux,
-                         int *aux_type,
-                         int *aux_ndims,
-                         const DType *aux_shape,
-                         NDArrayHandle *out) {
+                         int* aux_type,
+                         int* aux_ndims,
+                         const DType* aux_shape,
+                         NDArrayHandle* out) {
   std::vector<int> aux_types;
   mxnet::ShapeVector aux_shapes;
   auto shape_start = aux_shape;
@@ -1814,63 +2071,78 @@ void CreateSparseNDArray(int storage_type,
     aux_shapes.emplace_back(shape_start, shape_start + aux_ndims[i]);
     shape_start += aux_ndims[i];
   }
-  NDArray* nd = new NDArray(
-      NDArrayStorageType(storage_type),
-      mxnet::TShape(shape, shape + ndim),
-      Context::Create(static_cast<Context::DeviceType>(dev_type), dev_id),
-      delay_alloc != 0,
-      dtype, aux_types, aux_shapes);
+  NDArray* nd = new NDArray(NDArrayStorageType(storage_type),
+                            mxnet::TShape(shape, shape + ndim),
+                            Context::Create(static_cast<Context::DeviceType>(dev_type), dev_id),
+                            delay_alloc != 0,
+                            dtype,
+                            aux_types,
+                            aux_shapes);
   nd->AssignStorageInfo(profiler::ProfilerScope::Get()->GetCurrentProfilerScope(),
                         MXNET_STORAGE_DEFAULT_NAME_CSTR);
   *out = nd;
 }
 
 int MXNDArrayCreateSparseEx(int storage_type,
-                            const uint32_t *shape,
+                            const uint32_t* shape,
                             uint32_t ndim,
                             int dev_type,
                             int dev_id,
                             int delay_alloc,
                             int dtype,
                             uint32_t num_aux,
-                            int *aux_type,
-                            uint32_t *aux_ndims,
-                            const uint32_t *aux_shape,
-                            NDArrayHandle *out) {
-  API_BEGIN();
-  CreateSparseNDArray<uint32_t>(storage_type, shape, static_cast<int>(ndim), dev_type, dev_id,
-                                delay_alloc, dtype, num_aux, aux_type,
-                                reinterpret_cast<int *>(aux_ndims), aux_shape, out);
+                            int* aux_type,
+                            uint32_t* aux_ndims,
+                            const uint32_t* aux_shape,
+                            NDArrayHandle* out) {
+  API_BEGIN();
+  CreateSparseNDArray<uint32_t>(storage_type,
+                                shape,
+                                static_cast<int>(ndim),
+                                dev_type,
+                                dev_id,
+                                delay_alloc,
+                                dtype,
+                                num_aux,
+                                aux_type,
+                                reinterpret_cast<int*>(aux_ndims),
+                                aux_shape,
+                                out);
   API_END();
 }
 
-
 int MXNDArrayCreateSparseEx64(int storage_type,
-                            const int64_t *shape,
-                            int ndim,
-                            int dev_type,
-                            int dev_id,
-                            int delay_alloc,
-                            int dtype,
-                            uint32_t num_aux,
-                            int *aux_type,
-                            int *aux_ndims,
-                            const int64_t *aux_shape,
-                            NDArrayHandle *out) {
-  API_BEGIN();
-  CreateSparseNDArray<int64_t>(storage_type, shape, static_cast<int>(ndim), dev_type, dev_id,
-                               delay_alloc, dtype, num_aux, aux_type,
-                               reinterpret_cast<int *>(aux_ndims), aux_shape, out);
-  API_END();
-}
-
-
-int MXNDArrayLoadFromRawBytes(const void *buf,
-                              size_t size,
-                              NDArrayHandle *out) {
-  NDArray *ptr = nullptr;
-  API_BEGIN();
-  dmlc::MemoryFixedSizeStream strm((void*)buf, size); // NOLINT(*)
+                              const int64_t* shape,
+                              int ndim,
+                              int dev_type,
+                              int dev_id,
+                              int delay_alloc,
+                              int dtype,
+                              uint32_t num_aux,
+                              int* aux_type,
+                              int* aux_ndims,
+                              const int64_t* aux_shape,
+                              NDArrayHandle* out) {
+  API_BEGIN();
+  CreateSparseNDArray<int64_t>(storage_type,
+                               shape,
+                               static_cast<int>(ndim),
+                               dev_type,
+                               dev_id,
+                               delay_alloc,
+                               dtype,
+                               num_aux,
+                               aux_type,
+                               reinterpret_cast<int*>(aux_ndims),
+                               aux_shape,
+                               out);
+  API_END();
+}
+
+int MXNDArrayLoadFromRawBytes(const void* buf, size_t size, NDArrayHandle* out) {
+  NDArray* ptr = nullptr;
+  API_BEGIN();
+  dmlc::MemoryFixedSizeStream strm((void*)buf, size);  // NOLINT(*)
   ptr = new NDArray();
   if (!ptr->Load(&strm)) {
     throw dmlc::Error("Invalid NDArray serialization format");
@@ -1879,30 +2151,24 @@ int MXNDArrayLoadFromRawBytes(const void *buf,
   API_END_HANDLE_ERROR(delete ptr);
 }
 
-int MXNDArraySaveRawBytes(NDArrayHandle handle,
-                          size_t *out_size,
-                          const char **out_buf) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXNDArraySaveRawBytes(NDArrayHandle handle, size_t* out_size, const char** out_buf) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   ret->ret_str.resize(0);
   dmlc::MemoryStringStream strm(&ret->ret_str);
   static_cast<NDArray*>(handle)->Save(&strm);
   *out_size = ret->ret_str.length();
-  *out_buf = ret->ret_str.c_str();
+  *out_buf  = ret->ret_str.c_str();
   API_END();
 }
 
-int MXNDArraySyncCopyFromCPU(NDArrayHandle handle,
-                             const void *data,
-                             size_t size) {
+int MXNDArraySyncCopyFromCPU(NDArrayHandle handle, const void* data, size_t size) {
   API_BEGIN();
   static_cast<NDArray*>(handle)->SyncCopyFromCPU(data, size);
   API_END();
 }
 
-int MXNDArraySyncCopyToCPU(NDArrayHandle handle,
-                           void *data,
-                           size_t size) {
+int MXNDArraySyncCopyToCPU(NDArrayHandle handle, void* data, size_t size) {
   API_BEGIN();
   static_cast<NDArray*>(handle)->SyncCopyToCPU(data, size);
   API_END();
@@ -1927,7 +2193,7 @@ int MXNDArraySyncCopyFromNDArray(NDArrayHandle handle_dst,
 
 int MXNDArraySyncCheckFormat(NDArrayHandle handle, const bool full_check) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
+  NDArray* arr = static_cast<NDArray*>(handle);
   arr->SyncCheckFormat(full_check);
   API_END();
 }
@@ -1973,10 +2239,7 @@ int MXNDArrayLegacySave(const char* fname,
   API_END();
 }
 
-int MXNDArraySave(const char* fname,
-                  uint32_t num_args,
-                  NDArrayHandle* args,
-                  const char** keys) {
+int MXNDArraySave(const char* fname, uint32_t num_args, NDArrayHandle* args, const char** keys) {
   API_BEGIN();
 
   CHECK_NOTNULL(fname);
@@ -1985,142 +2248,141 @@ int MXNDArraySave(const char* fname,
   // and write an adapter for DMLC stream based on pZip->m_pWrite (and
   // pZip->m_pIO_opaque)
   if (num_args == 1 && keys == nullptr) {
-      NDArray *array = static_cast<NDArray *>(args[0]);
-      if (array->storage_type() == kDefaultStorage) {
-          npy::save_array(fname, *array);
-      } else {
-          mz_zip_archive archive {};
-          CHECK(mz_zip_writer_init_file(&archive, fname, 0))
-              << "Failed to open archive " << fname << ": "
-              << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-          npz::save_array(&archive, "", *array);
-          CHECK(mz_zip_writer_finalize_archive(&archive))
-              << "Failed to finalize archive " << fname
-              << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-          CHECK(mz_zip_writer_end(&archive))
-              << "Failed to end archive " << fname
-              << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-      }
-  } else {
-      mz_zip_archive archive {};
+    NDArray* array = static_cast<NDArray*>(args[0]);
+    if (array->storage_type() == kDefaultStorage) {
+      npy::save_array(fname, *array);
+    } else {
+      mz_zip_archive archive{};
       CHECK(mz_zip_writer_init_file(&archive, fname, 0))
           << "Failed to open archive " << fname << ": "
           << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-      for (uint32_t i = 0; i < num_args; ++i) {
-          NDArray *array = static_cast<NDArray *>(args[i]);
-          const std::string array_key = keys == nullptr ? "arr_" + std::to_string(i) : keys[i];
-          npz::save_array(&archive, array_key, *array);
-      }
+      npz::save_array(&archive, "", *array);
       CHECK(mz_zip_writer_finalize_archive(&archive))
           << "Failed to finalize archive " << fname
           << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
       CHECK(mz_zip_writer_end(&archive))
           << "Failed to end archive " << fname
           << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
+    }
+  } else {
+    mz_zip_archive archive{};
+    CHECK(mz_zip_writer_init_file(&archive, fname, 0))
+        << "Failed to open archive " << fname << ": "
+        << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
+    for (uint32_t i = 0; i < num_args; ++i) {
+      NDArray* array              = static_cast<NDArray*>(args[i]);
+      const std::string array_key = keys == nullptr ? "arr_" + std::to_string(i) : keys[i];
+      npz::save_array(&archive, array_key, *array);
+    }
+    CHECK(mz_zip_writer_finalize_archive(&archive))
+        << "Failed to finalize archive " << fname
+        << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
+    CHECK(mz_zip_writer_end(&archive)) << "Failed to end archive " << fname
+                                       << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
   }
   API_END();
 }
 
 int MXNDArrayLoad(const char* fname,
-                  uint32_t *out_size,
+                  uint32_t* out_size,
                   NDArrayHandle** out_arr,
-                  uint32_t *out_name_size,
+                  uint32_t* out_name_size,
                   const char*** out_names) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   ret->ret_vec_str.clear();
   API_BEGIN();
 
   uint32_t magic;
   {
-      std::unique_ptr<dmlc::Stream> strm(dmlc::Stream::Create(fname, "r"));
-      CHECK_EQ(strm->Read(&magic, sizeof(uint32_t)), sizeof(uint32_t))
+    std::unique_ptr<dmlc::Stream> strm(dmlc::Stream::Create(fname, "r"));
+    CHECK_EQ(strm->Read(&magic, sizeof(uint32_t)), sizeof(uint32_t))
         << "Failed to read 32 bits from file.";
   }
 
-  if (magic == 0x04034b50 || magic == 0x504b0304 ||
-      magic == 0x06054b50 || magic == 0x504b0506) {  // zip file format; assumed to be npz
-      auto[data, names] = npz::load_arrays(fname);
-      ret->ret_handles.resize(data.size());
-      for (size_t i = 0; i < data.size(); ++i) {
-          NDArray *ptr = new NDArray();
-          *ptr = data[i];
-          ret->ret_handles[i] = ptr;
-      }
-      ret->ret_vec_str.resize(names.size());
-      for (size_t i = 0; i < names.size(); ++i) {
-          ret->ret_vec_str[i] = names[i];
-      }
-      ret->ret_vec_charp.resize(names.size());
-      for (size_t i = 0; i < names.size(); ++i) {
-          ret->ret_vec_charp[i] = ret->ret_vec_str[i].c_str();
-      }
-      *out_size = static_cast<uint32_t>(data.size());
-      *out_arr = dmlc::BeginPtr(ret->ret_handles);
-      *out_name_size = static_cast<uint32_t>(names.size());
-      *out_names = dmlc::BeginPtr(ret->ret_vec_charp);
+  if (magic == 0x04034b50 || magic == 0x504b0304 || magic == 0x06054b50 ||
+      magic == 0x504b0506) {                       // zip file format; assumed to be npz
+    auto [data, names] = npz::load_arrays(fname);  // NOLINT
+    ret->ret_handles.resize(data.size());
+    for (size_t i = 0; i < data.size(); ++i) {
+      NDArray* ptr        = new NDArray();
+      *ptr                = data[i];
+      ret->ret_handles[i] = ptr;
+    }
+    ret->ret_vec_str.resize(names.size());
+    for (size_t i = 0; i < names.size(); ++i) {
+      ret->ret_vec_str[i] = names[i];
+    }
+    ret->ret_vec_charp.resize(names.size());
+    for (size_t i = 0; i < names.size(); ++i) {
+      ret->ret_vec_charp[i] = ret->ret_vec_str[i].c_str();
+    }
+    *out_size      = static_cast<uint32_t>(data.size());
+    *out_arr       = dmlc::BeginPtr(ret->ret_handles);
+    *out_name_size = static_cast<uint32_t>(names.size());
+    *out_names     = dmlc::BeginPtr(ret->ret_vec_charp);
   } else if (magic == 0x4d554e93 || magic == 0x934e554d) {  // first bytes of npy format
-      *out_size = 1;
-      ret->ret_handles.resize(1);
-      NDArray *ptr = new NDArray();
-      *ptr = npy::load_array(fname);  // Only supports local filesystem at this point in time
-      ret->ret_handles[0] = ptr;
-      *out_arr = dmlc::BeginPtr(ret->ret_handles);
+    *out_size = 1;
+    ret->ret_handles.resize(1);
+    NDArray* ptr = new NDArray();
+    *ptr         = npy::load_array(fname);  // Only supports local filesystem at this point in time
+    ret->ret_handles[0] = ptr;
+    *out_arr            = dmlc::BeginPtr(ret->ret_handles);
   } else {
-      std::vector<NDArray> data;
-      std::vector<std::string> &names = ret->ret_vec_str;
-      {
-          std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(fname, "r"));
-          mxnet::NDArray::Load(fi.get(), &data, &names);
-      }
-      ret->ret_handles.resize(data.size());
-      for (size_t i = 0; i < data.size(); ++i) {
-          NDArray *ptr = new NDArray();
-          *ptr = data[i];
-          ret->ret_handles[i] = ptr;
-      }
-      ret->ret_vec_charp.resize(names.size());
-      for (size_t i = 0; i < names.size(); ++i) {
-          ret->ret_vec_charp[i] = names[i].c_str();
-      }
-      *out_size = static_cast<uint32_t>(data.size());
-      *out_arr = dmlc::BeginPtr(ret->ret_handles);
-      *out_name_size = static_cast<uint32_t>(names.size());
-      *out_names = dmlc::BeginPtr(ret->ret_vec_charp);
+    std::vector<NDArray> data;
+    std::vector<std::string>& names = ret->ret_vec_str;
+    {
+      std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(fname, "r"));
+      mxnet::NDArray::Load(fi.get(), &data, &names);
+    }
+    ret->ret_handles.resize(data.size());
+    for (size_t i = 0; i < data.size(); ++i) {
+      NDArray* ptr        = new NDArray();
+      *ptr                = data[i];
+      ret->ret_handles[i] = ptr;
+    }
+    ret->ret_vec_charp.resize(names.size());
+    for (size_t i = 0; i < names.size(); ++i) {
+      ret->ret_vec_charp[i] = names[i].c_str();
+    }
+    *out_size      = static_cast<uint32_t>(data.size());
+    *out_arr       = dmlc::BeginPtr(ret->ret_handles);
+    *out_name_size = static_cast<uint32_t>(names.size());
+    *out_names     = dmlc::BeginPtr(ret->ret_vec_charp);
   }
   API_END();
 }
 
-int MXNDArrayLoadFromBuffer(const void *ndarray_buffer,
+int MXNDArrayLoadFromBuffer(const void* ndarray_buffer,
                             size_t size,
-                            uint32_t *out_size,
+                            uint32_t* out_size,
                             NDArrayHandle** out_arr,
-                            uint32_t *out_name_size,
+                            uint32_t* out_name_size,
                             const char*** out_names) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   ret->ret_vec_str.clear();
   API_BEGIN();
   CHECK_NOTNULL(ndarray_buffer);
   std::vector<NDArray> data;
-  std::vector<std::string> &names = ret->ret_vec_str;
+  std::vector<std::string>& names = ret->ret_vec_str;
   {
-    std::unique_ptr<dmlc::MemoryFixedSizeStream> fi(new dmlc::MemoryFixedSizeStream(
-        const_cast<void*>(ndarray_buffer), size));
+    std::unique_ptr<dmlc::MemoryFixedSizeStream> fi(
+        new dmlc::MemoryFixedSizeStream(const_cast<void*>(ndarray_buffer), size));
     mxnet::NDArray::Load(fi.get(), &data, &names);
   }
   ret->ret_handles.resize(data.size());
   for (size_t i = 0; i < data.size(); ++i) {
-    NDArray *ptr = new NDArray();
-    *ptr = data[i];
+    NDArray* ptr        = new NDArray();
+    *ptr                = data[i];
     ret->ret_handles[i] = ptr;
   }
   ret->ret_vec_charp.resize(names.size());
   for (size_t i = 0; i < names.size(); ++i) {
     ret->ret_vec_charp[i] = names[i].c_str();
   }
-  *out_size = static_cast<uint32_t>(data.size());
-  *out_arr = dmlc::BeginPtr(ret->ret_handles);
+  *out_size      = static_cast<uint32_t>(data.size());
+  *out_arr       = dmlc::BeginPtr(ret->ret_handles);
   *out_name_size = static_cast<uint32_t>(names.size());
-  *out_names = dmlc::BeginPtr(ret->ret_vec_charp);
+  *out_names     = dmlc::BeginPtr(ret->ret_vec_charp);
   API_END();
 }
 
@@ -2130,8 +2392,11 @@ int MXNDArrayFree(NDArrayHandle handle) {
   API_END();
 }
 
-template<typename dtype>
-void SliceArray(NDArrayHandle handle, dtype slice_begin, dtype slice_end, NDArray* ptr,
+template <typename dtype>
+void SliceArray(NDArrayHandle handle,
+                dtype slice_begin,
+                dtype slice_end,
+                NDArray* ptr,
                 NDArrayHandle* out) {
   *ptr = static_cast<NDArray*>(handle)->SliceWithRecord(slice_begin, slice_end);
   *out = ptr;
@@ -2140,8 +2405,8 @@ void SliceArray(NDArrayHandle handle, dtype slice_begin, dtype slice_end, NDArra
 int MXNDArraySlice(NDArrayHandle handle,
                    uint32_t slice_begin,
                    uint32_t slice_end,
-                   NDArrayHandle *out) {
-  NDArray *ptr = new NDArray();
+                   NDArrayHandle* out) {
+  NDArray* ptr = new NDArray();
   API_BEGIN();
   SliceArray<uint32_t>(handle, slice_begin, slice_end, ptr, out);
   API_END_HANDLE_ERROR(delete ptr);
@@ -2150,55 +2415,45 @@ int MXNDArraySlice(NDArrayHandle handle,
 int MXNDArraySlice64(NDArrayHandle handle,
                      int64_t slice_begin,
                      int64_t slice_end,
-                     NDArrayHandle *out) {
-  NDArray *ptr = new NDArray();
+                     NDArrayHandle* out) {
+  NDArray* ptr = new NDArray();
   API_BEGIN();
   SliceArray<int64_t>(handle, slice_begin, slice_end, ptr, out);
   API_END_HANDLE_ERROR(delete ptr);
 }
 
-int MXNDArrayAt(NDArrayHandle handle,
-                uint32_t idx,
-                NDArrayHandle *out) {
-  NDArray *ptr = new NDArray();
+int MXNDArrayAt(NDArrayHandle handle, uint32_t idx, NDArrayHandle* out) {
+  NDArray* ptr = new NDArray();
   API_BEGIN();
   *ptr = static_cast<NDArray*>(handle)->AtWithRecord(idx);
   *out = ptr;
   API_END_HANDLE_ERROR(delete ptr);
 }
 
-int MXNDArrayAt64(NDArrayHandle handle,
-                  int64_t idx,
-                  NDArrayHandle *out) {
-  NDArray *ptr = new NDArray();
+int MXNDArrayAt64(NDArrayHandle handle, int64_t idx, NDArrayHandle* out) {
+  NDArray* ptr = new NDArray();
   API_BEGIN();
   *ptr = static_cast<NDArray*>(handle)->AtWithRecord(idx);
   *out = ptr;
   API_END_HANDLE_ERROR(delete ptr);
 }
 
-int MXNDArrayReshape(NDArrayHandle handle,
-                               int ndim,
-                               int *dims,
-                               NDArrayHandle *out) {
-  NDArray *ptr = new NDArray();
+int MXNDArrayReshape(NDArrayHandle handle, int ndim, int* dims, NDArrayHandle* out) {
+  NDArray* ptr = new NDArray();
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  mxnet::TShape new_shape(dims, dims+ndim);
+  NDArray* arr = static_cast<NDArray*>(handle);
+  mxnet::TShape new_shape(dims, dims + ndim);
   int size = 1;
-  int pos = -1;
+  int pos  = -1;
   for (int i = 0; i < ndim; ++i) {
     int dim = dims[i];
     if (dim == -1) {
-      CHECK_EQ(pos, -1)
-        << "Invalid new shape " << new_shape
-        << ": more than one dimensions are -1";
+      CHECK_EQ(pos, -1) << "Invalid new shape " << new_shape << ": more than one dimensions are -1";
       pos = i;
     } else {
       if (dim == 0) {
-        CHECK_LT(i, arr->shape().ndim())
-          << "Invalid new shape " << new_shape
-          << ": 0 dimension exceeds original shape " << arr->shape();
+        CHECK_LT(i, arr->shape().ndim()) << "Invalid new shape " << new_shape
+                                         << ": 0 dimension exceeds original shape " << arr->shape();
         dim = arr->shape()[i];
       }
       size *= dim;
@@ -2214,24 +2469,23 @@ int MXNDArrayReshape(NDArrayHandle handle,
 }
 
 int MXNDArrayReshape64(NDArrayHandle handle,
-                                 int ndim,
-                                 dim_t *dims,
-                                 bool reverse,
-                                 NDArrayHandle *out) {
-  NDArray *ptr = new NDArray();
+                       int ndim,
+                       dim_t* dims,
+                       bool reverse,
+                       NDArrayHandle* out) {
+  NDArray* ptr = new NDArray();
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  mxnet::Tuple<dim_t> shape(dims, dims+ndim);
+  NDArray* arr = static_cast<NDArray*>(handle);
+  mxnet::Tuple<dim_t> shape(dims, dims + ndim);
   mxnet::TShape new_shape = mxnet::op::InferReshapeShape(shape, arr->shape(), reverse);
-  *ptr = arr->ReshapeWithRecord(new_shape);
-  *out = ptr;
+  *ptr                    = arr->ReshapeWithRecord(new_shape);
+  *out                    = ptr;
   API_END_HANDLE_ERROR(delete ptr);
 }
 
-int MXNDArrayGetStorageType(NDArrayHandle handle,
-                     int *out_storage_type) {
+int MXNDArrayGetStorageType(NDArrayHandle handle, int* out_storage_type) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
+  NDArray* arr = static_cast<NDArray*>(handle);
   if (!arr->is_none()) {
     *out_storage_type = arr->storage_type();
   } else {
@@ -2240,8 +2494,10 @@ int MXNDArrayGetStorageType(NDArrayHandle handle,
   API_END();
 }
 
-template<typename dtype>
-inline void GetShape(NDArrayHandle handle, const dtype** out_pdata, int* out_dim,
+template <typename dtype>
+inline void GetShape(NDArrayHandle handle,
+                     const dtype** out_pdata,
+                     int* out_dim,
                      MXAPIThreadLocalEntry<dtype>* ret) {
   NDArray* arr = static_cast<NDArray*>(handle);
   if (!arr->is_none()) {
@@ -2255,9 +2511,9 @@ inline void GetShape(NDArrayHandle handle, const dtype** out_pdata, int* out_dim
     }
 
     if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
-      CHECK_LT(s.Size(), (int64_t{1} << 31) - 1) <<
-        "[Get Shape] Size of tensor you are trying to allocate is larger than "
-        "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+      CHECK_LT(s.Size(), (int64_t{1} << 31) - 1)
+          << "[Get Shape] Size of tensor you are trying to allocate is larger than "
+             "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
     }
 
     if (!Imperative::Get()->is_np_shape()) {
@@ -2265,7 +2521,7 @@ inline void GetShape(NDArrayHandle handle, const dtype** out_pdata, int* out_dim
     }
     *out_dim = s.ndim();
     if (s.ndim() >= 0) {
-      std::vector<dtype> &buffer = ret->arg_shape_buffer_ex;
+      std::vector<dtype>& buffer = ret->arg_shape_buffer_ex;
       buffer.resize(s.ndim());
       mxnet::ShapeTypeCast(s.begin(), s.end(), buffer.data());
       *out_pdata = buffer.data();
@@ -2279,28 +2535,23 @@ inline void GetShape(NDArrayHandle handle, const dtype** out_pdata, int* out_dim
   }
 }
 
-int MXNDArrayGetShape(NDArrayHandle handle,
-                      int *out_dim,
-                      const int **out_pdata) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXNDArrayGetShape(NDArrayHandle handle, int* out_dim, const int** out_pdata) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   GetShape<int>(handle, out_pdata, out_dim, ret);
   API_END();
 }
 
-int MXNDArrayGetShape64(NDArrayHandle handle,
-                        int *out_dim,
-                        const int64_t **out_pdata) {
-  MXAPIThreadLocalEntry<int64_t> *ret = MXAPIThreadLocalStore<int64_t>::Get();
+int MXNDArrayGetShape64(NDArrayHandle handle, int* out_dim, const int64_t** out_pdata) {
+  MXAPIThreadLocalEntry<int64_t>* ret = MXAPIThreadLocalStore<int64_t>::Get();
   API_BEGIN();
   GetShape<int64_t>(handle, out_pdata, out_dim, ret);
   API_END();
 }
 
-int MXNDArrayGetData(NDArrayHandle handle,
-                     void **out_pdata) {
+int MXNDArrayGetData(NDArrayHandle handle, void** out_pdata) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
+  NDArray* arr = static_cast<NDArray*>(handle);
 #if MXNET_USE_ONEDNN == 1
   if (arr->IsMKLDNNData()) {
     arr->Reorder2DefaultAsync();
@@ -2315,37 +2566,34 @@ int MXNDArrayGetData(NDArrayHandle handle,
   API_END();
 }
 
-int MXNDArrayToDLPack(NDArrayHandle handle,
-                      DLManagedTensorHandle *out_dlpack) {
+int MXNDArrayToDLPack(NDArrayHandle handle, DLManagedTensorHandle* out_dlpack) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  *out_dlpack = arr->ToDLPack();
+  NDArray* arr = static_cast<NDArray*>(handle);
+  *out_dlpack  = arr->ToDLPack();
   API_END();
 }
 
 int MXNDArrayFromDLPack(DLManagedTensorHandle dlpack,
                         const bool transient_handle,
-                        NDArrayHandle *out_handle) {
+                        NDArrayHandle* out_handle) {
   API_BEGIN();
-  *out_handle = new NDArray(NDArray::FromDLPack(
-              static_cast<DLManagedTensor*>(dlpack),
-              transient_handle));
+  *out_handle =
+      new NDArray(NDArray::FromDLPack(static_cast<DLManagedTensor*>(dlpack), transient_handle));
   API_END();
 }
 
 int MXNDArrayCallDLPackDeleter(DLManagedTensorHandle dlpack) {
   API_BEGIN();
   if (dlpack != nullptr) {
-    DLManagedTensor *p_dlpack = static_cast<DLManagedTensor*>(dlpack);
+    DLManagedTensor* p_dlpack = static_cast<DLManagedTensor*>(dlpack);
     p_dlpack->deleter(p_dlpack);
   }
   API_END();
 }
 
-int MXNDArrayGetDType(NDArrayHandle handle,
-                     int *out_dtype) {
+int MXNDArrayGetDType(NDArrayHandle handle, int* out_dtype) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
+  NDArray* arr = static_cast<NDArray*>(handle);
   if (!arr->is_none()) {
     *out_dtype = arr->dtype();
   } else {
@@ -2354,12 +2602,10 @@ int MXNDArrayGetDType(NDArrayHandle handle,
   API_END();
 }
 
-int MXNDArrayGetAuxType(NDArrayHandle handle,
-                        uint32_t i,
-                        int *out_type) {
+int MXNDArrayGetAuxType(NDArrayHandle handle, uint32_t i, int* out_type) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  *out_type = arr->aux_type(i);
+  NDArray* arr = static_cast<NDArray*>(handle);
+  *out_type    = arr->aux_type(i);
   API_END();
 }
 
@@ -2368,12 +2614,10 @@ int MXNDArrayGetAuxType(NDArrayHandle handle,
  * in the form of an NDArray of default storage type.
  * This function blocks. Do not use it in performance critical code.
  */
-int MXNDArrayGetAuxNDArray(NDArrayHandle handle,
-                           uint32_t i,
-                           NDArrayHandle *out) {
+int MXNDArrayGetAuxNDArray(NDArrayHandle handle, uint32_t i, NDArrayHandle* out) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  *out = new NDArray(arr->aux_ndarray(i));
+  NDArray* arr = static_cast<NDArray*>(handle);
+  *out         = new NDArray(arr->aux_ndarray(i));
   API_END();
 }
 
@@ -2382,35 +2626,31 @@ int MXNDArrayGetAuxNDArray(NDArrayHandle handle,
  * in the form of an NDArray of default storage type.
  * This function blocks. Do not use it in performance critical code.
  */
-int MXNDArrayGetDataNDArray(NDArrayHandle handle,
-                            NDArrayHandle *out) {
+int MXNDArrayGetDataNDArray(NDArrayHandle handle, NDArrayHandle* out) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  *out = new NDArray(arr->data_ndarray());
+  NDArray* arr = static_cast<NDArray*>(handle);
+  *out         = new NDArray(arr->data_ndarray());
   API_END();
 }
 
-int MXNDArrayGetContext(NDArrayHandle handle,
-                        int *out_dev_type,
-                        int *out_dev_id) {
+int MXNDArrayGetContext(NDArrayHandle handle, int* out_dev_type, int* out_dev_id) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
+  NDArray* arr = static_cast<NDArray*>(handle);
   if (!arr->is_none()) {
-    const Context &ctx = arr->ctx();
-    *out_dev_type = ctx.dev_type;
-    *out_dev_id = ctx.dev_id;
+    const Context& ctx = arr->ctx();
+    *out_dev_type      = ctx.dev_type;
+    *out_dev_id        = ctx.dev_id;
   } else {
     *out_dev_type = 0;
-    *out_dev_id = 0;
+    *out_dev_id   = 0;
   }
   API_END();
 }
 
-
-int MXNDArrayGetGrad(NDArrayHandle handle, NDArrayHandle *out) {
+int MXNDArrayGetGrad(NDArrayHandle handle, NDArrayHandle* out) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  NDArray ret = arr->grad();
+  NDArray* arr = static_cast<NDArray*>(handle);
+  NDArray ret  = arr->grad();
   if (ret.is_none()) {
     *out = nullptr;
   } else {
@@ -2419,80 +2659,82 @@ int MXNDArrayGetGrad(NDArrayHandle handle, NDArrayHandle *out) {
   API_END();
 }
 
-int MXNDArrayDetach(NDArrayHandle handle, NDArrayHandle *out) {
+int MXNDArrayDetach(NDArrayHandle handle, NDArrayHandle* out) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  *out = new NDArray(arr->Detach());
+  NDArray* arr = static_cast<NDArray*>(handle);
+  *out         = new NDArray(arr->Detach());
   API_END();
 }
 
 int MXNDArraySetGradState(NDArrayHandle handle, int state) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
+  NDArray* arr = static_cast<NDArray*>(handle);
   arr->set_fresh_out_grad(static_cast<bool>(state));
   API_END();
 }
 
-int MXNDArrayGetGradState(NDArrayHandle handle, int *out) {
+int MXNDArrayGetGradState(NDArrayHandle handle, int* out) {
   API_BEGIN();
-  NDArray *arr = static_cast<NDArray*>(handle);
-  *out = arr->fresh_out_grad();
+  NDArray* arr = static_cast<NDArray*>(handle);
+  *out         = arr->fresh_out_grad();
   API_END();
 }
 
-int MXListFunctions(uint32_t *out_size,
-                    FunctionHandle **out_array) {
+int MXListFunctions(uint32_t* out_size, FunctionHandle** out_array) {
   API_BEGIN();
-  auto &vec = dmlc::Registry<NDArrayFunctionReg>::List();
-  *out_size = static_cast<uint32_t>(vec.size());
+  auto& vec  = dmlc::Registry<NDArrayFunctionReg>::List();
+  *out_size  = static_cast<uint32_t>(vec.size());
   *out_array = (FunctionHandle*)(dmlc::BeginPtr(vec));  //  NOLINT(*)
   API_END();
 }
 
-int MXGetFunction(const char *name,
-                  FunctionHandle *out) {
+int MXGetFunction(const char* name, FunctionHandle* out) {
   API_BEGIN();
   *out = dmlc::Registry<NDArrayFunctionReg>::Find(name);
   API_END();
 }
 
 int MXFuncGetInfo(FunctionHandle fun,
-                  const char **name,
-                  const char **description,
-                  uint32_t *num_args,
-                  const char ***arg_names,
-                  const char ***arg_type_infos,
-                  const char ***arg_descriptions,
-                  const char **return_type) {
-  return MXAPIGetFunctionRegInfo(static_cast<const NDArrayFunctionReg *>(fun),
-                                 name, description, num_args,
-                                 arg_names, arg_type_infos, arg_descriptions,
+                  const char** name,
+                  const char** description,
+                  uint32_t* num_args,
+                  const char*** arg_names,
+                  const char*** arg_type_infos,
+                  const char*** arg_descriptions,
+                  const char** return_type) {
+  return MXAPIGetFunctionRegInfo(static_cast<const NDArrayFunctionReg*>(fun),
+                                 name,
+                                 description,
+                                 num_args,
+                                 arg_names,
+                                 arg_type_infos,
+                                 arg_descriptions,
                                  return_type);
 }
 
 int MXFuncDescribe(FunctionHandle fun,
-                   uint32_t *num_use_vars,
-                   uint32_t *num_scalars,
-                   uint32_t *num_mutate_vars,
-                   int *type_mask) {
-  API_BEGIN();
-  auto *f = static_cast<const NDArrayFunctionReg*>(fun);
-  *num_use_vars = f->num_use_vars;
-  *num_scalars = f->num_scalars;
+                   uint32_t* num_use_vars,
+                   uint32_t* num_scalars,
+                   uint32_t* num_mutate_vars,
+                   int* type_mask) {
+  API_BEGIN();
+  auto* f          = static_cast<const NDArrayFunctionReg*>(fun);
+  *num_use_vars    = f->num_use_vars;
+  *num_scalars     = f->num_scalars;
   *num_mutate_vars = f->num_mutate_vars;
-  *type_mask = f->type_mask;
+  *type_mask       = f->type_mask;
   API_END();
 }
 
 int MXFuncInvoke(FunctionHandle fun,
-                 NDArrayHandle *use_vars,
-                 float *scalar_args,
-                 NDArrayHandle *mutate_vars,
+                 NDArrayHandle* use_vars,
+                 float* scalar_args,
+                 NDArrayHandle* mutate_vars,
                  int num_params,
-                 char **param_keys,
-                 char **param_vals) {
+                 char** param_keys,
+                 char** param_vals) {
   API_BEGIN();
-  auto *f = static_cast<const NDArrayFunctionReg*>(fun);
+  auto* f = static_cast<const NDArrayFunctionReg*>(fun);
   f->body((NDArray**)(use_vars),  //  NOLINT(*)
           scalar_args,
           (NDArray**)(mutate_vars),  //  NOLINT(*)
@@ -2505,38 +2747,36 @@ int MXFuncInvoke(FunctionHandle fun,
 //--------------------------------------------
 // Part 5: IO Interface
 //--------------------------------------------
-int MXListDataIters(uint32_t *out_size,
-                    DataIterCreator **out_array) {
+int MXListDataIters(uint32_t* out_size, DataIterCreator** out_array) {
   API_BEGIN();
-  auto &vec = dmlc::Registry<DataIteratorReg>::List();
-  *out_size = static_cast<uint32_t>(vec.size());
+  auto& vec  = dmlc::Registry<DataIteratorReg>::List();
+  *out_size  = static_cast<uint32_t>(vec.size());
   *out_array = (DataIterCreator*)(dmlc::BeginPtr(vec));  //  NOLINT(*)
   API_END();
 }
 
 int MXDataIterGetIterInfo(DataIterCreator creator,
-                          const char **name,
-                          const char **description,
-                          uint32_t *num_args,
-                          const char ***arg_names,
-                          const char ***arg_type_infos,
-                          const char ***arg_descriptions) {
-  DataIteratorReg *e = static_cast<DataIteratorReg *>(creator);
-  return MXAPIGetFunctionRegInfo(e, name, description, num_args,
-                                 arg_names, arg_type_infos, arg_descriptions,
-                                 nullptr);
+                          const char** name,
+                          const char** description,
+                          uint32_t* num_args,
+                          const char*** arg_names,
+                          const char*** arg_type_infos,
+                          const char*** arg_descriptions) {
+  DataIteratorReg* e = static_cast<DataIteratorReg*>(creator);
+  return MXAPIGetFunctionRegInfo(
+      e, name, description, num_args, arg_names, arg_type_infos, arg_descriptions, nullptr);
 }
 
 int MXDataIterCreateIter(DataIterCreator creator,
                          uint32_t num_param,
-                         const char **keys,
-                         const char **vals,
-                         DataIterHandle *out) {
-  IIterator<DataBatch> *iter = nullptr;
-  API_BEGIN();
-  DataIteratorReg *e = static_cast<DataIteratorReg *>(creator);
-  iter = e->body();
-  std::vector<std::pair<std::string, std::string> > kwargs;
+                         const char** keys,
+                         const char** vals,
+                         DataIterHandle* out) {
+  IIterator<DataBatch>* iter = nullptr;
+  API_BEGIN();
+  DataIteratorReg* e = static_cast<DataIteratorReg*>(creator);
+  iter               = e->body();
+  std::vector<std::pair<std::string, std::string>> kwargs;
   for (uint32_t i = 0; i < num_param; ++i) {
     kwargs.emplace_back(std::string(keys[i]), std::string(vals[i]));
   }
@@ -2547,36 +2787,39 @@ int MXDataIterCreateIter(DataIterCreator creator,
 
 int MXDataIterFree(DataIterHandle handle) {
   API_BEGIN();
-  delete static_cast<IIterator<DataBatch> *>(handle);
+  delete static_cast<IIterator<DataBatch>*>(handle);
   API_END();
 }
 
 int MXDataIterBeforeFirst(DataIterHandle handle) {
   API_BEGIN();
-  static_cast<IIterator<DataBatch>* >(handle)->BeforeFirst();
+  static_cast<IIterator<DataBatch>*>(handle)->BeforeFirst();
   API_END();
 }
 
-int MXDataIterGetLenHint(DataIterHandle handle, int64_t *len) {
+int MXDataIterGetLenHint(DataIterHandle handle, int64_t* len) {
   API_BEGIN();
-  *len = static_cast<IIterator<DataBatch>* >(handle)->GetLenHint();
+  *len = static_cast<IIterator<DataBatch>*>(handle)->GetLenHint();
   API_END();
 }
 
-int MXDataIterNext(DataIterHandle handle, int *out) {
+int MXDataIterNext(DataIterHandle handle, int* out) {
   API_BEGIN();
-  *out = static_cast<IIterator<DataBatch>* >(handle)->Next();
+  *out = static_cast<IIterator<DataBatch>*>(handle)->Next();
   API_END();
 }
 
-int MXDataIterGetLabel(DataIterHandle handle, NDArrayHandle *out) {
+int MXDataIterGetLabel(DataIterHandle handle, NDArrayHandle* out) {
   API_BEGIN();
-  const DataBatch& db = static_cast<IIterator<DataBatch>* >(handle)->Value();
-  bool no_label = db.data.size() < 2U;
-  NDArray* pndarray = new NDArray();
+  const DataBatch& db = static_cast<IIterator<DataBatch>*>(handle)->Value();
+  bool no_label       = db.data.size() < 2U;
+  NDArray* pndarray   = new NDArray();
   // temp hack to make label 1D
   // TODO(tianjun) make label 1D when label_width=0
-  mxnet::TShape shape = no_label ? TShape({1, }) : db.data[1].shape();
+  mxnet::TShape shape = no_label ? TShape({
+                                       1,
+                                   })
+                                 : db.data[1].shape();
   if (no_label || shape.Size() < 1) {
     // it's possible that label is not available and not required
     // but we need to bypass the invalid copy
@@ -2590,26 +2833,27 @@ int MXDataIterGetLabel(DataIterHandle handle, NDArrayHandle *out) {
   API_END();
 }
 
-int MXDataIterGetItems(DataIterHandle handle, int* num_outputs, NDArrayHandle **outputs) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXDataIterGetItems(DataIterHandle handle, int* num_outputs, NDArrayHandle** outputs) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
-  const DataBatch& db = static_cast<IIterator<DataBatch>* >(handle)->Value();
+  const DataBatch& db = static_cast<IIterator<DataBatch>*>(handle)->Value();
   std::vector<NDArray*> ndoutputs;
   ndoutputs.reserve(db.data.size());
   if (*outputs == nullptr) {
     *num_outputs = db.data.size();
-    for (int i = 0; i < *num_outputs; ++i) ndoutputs.push_back(new NDArray());
+    for (int i = 0; i < *num_outputs; ++i)
+      ndoutputs.push_back(new NDArray());
   } else {
-    CHECK_EQ(*num_outputs, db.data.size())
-        << "MXDataIterGetItems expects " << db.data.size() << " outputs, but "
-        << *num_outputs << " was given.";
+    CHECK_EQ(*num_outputs, db.data.size()) << "MXDataIterGetItems expects " << db.data.size()
+                                           << " outputs, but " << *num_outputs << " was given.";
     for (int i = 0; i < *num_outputs; ++i) {
       ndoutputs.push_back(reinterpret_cast<NDArray*>((*outputs)[i]));
     }
   }
 
   // copy outputs
-  for (int i = 0; i < *num_outputs; ++i) *ndoutputs[i] = db.data[i];
+  for (int i = 0; i < *num_outputs; ++i)
+    *ndoutputs[i] = db.data[i];
 
   if (*outputs == nullptr) {
     ret->ret_handles.clear();
@@ -2622,67 +2866,65 @@ int MXDataIterGetItems(DataIterHandle handle, int* num_outputs, NDArrayHandle **
   API_END();
 }
 
-int MXDataIterGetIndex(DataIterHandle handle, uint64_t **out_index, uint64_t *out_size) {
+int MXDataIterGetIndex(DataIterHandle handle, uint64_t** out_index, uint64_t* out_size) {
   API_BEGIN();
-  const DataBatch& db = static_cast<IIterator<DataBatch>* >(handle)->Value();
-  *out_size = db.index.size();
-  *out_index = const_cast<uint64_t*>(db.index.data());
+  const DataBatch& db = static_cast<IIterator<DataBatch>*>(handle)->Value();
+  *out_size           = db.index.size();
+  *out_index          = const_cast<uint64_t*>(db.index.data());
   API_END();
 }
 
-int MXDataIterGetData(DataIterHandle handle, NDArrayHandle *out) {
+int MXDataIterGetData(DataIterHandle handle, NDArrayHandle* out) {
   API_BEGIN();
-  const DataBatch& db = static_cast<IIterator<DataBatch>* >(handle)->Value();
-  NDArray* pndarray = new NDArray();
-  *pndarray = db.data[0];
-  *out = pndarray;
+  const DataBatch& db = static_cast<IIterator<DataBatch>*>(handle)->Value();
+  NDArray* pndarray   = new NDArray();
+  *pndarray           = db.data[0];
+  *out                = pndarray;
   API_END();
 }
 
-int MXDataIterGetPadNum(DataIterHandle handle, int *pad) {
+int MXDataIterGetPadNum(DataIterHandle handle, int* pad) {
   API_BEGIN();
-  const DataBatch& db = static_cast<IIterator<DataBatch>* >(handle)->Value();
-  *pad = db.num_batch_padd;
+  const DataBatch& db = static_cast<IIterator<DataBatch>*>(handle)->Value();
+  *pad                = db.num_batch_padd;
   API_END();
 }
 
-int MXListDatasets(uint32_t *out_size,
-                             DatasetCreator **out_array) {
+int MXListDatasets(uint32_t* out_size, DatasetCreator** out_array) {
   API_BEGIN();
-  auto &vec = dmlc::Registry<DatasetReg>::List();
-  *out_size = static_cast<uint32_t>(vec.size());
+  auto& vec  = dmlc::Registry<DatasetReg>::List();
+  *out_size  = static_cast<uint32_t>(vec.size());
   *out_array = (DatasetCreator*)(dmlc::BeginPtr(vec));  //  NOLINT(*)
   API_END();
 }
 
 int MXDatasetCreateDataset(DatasetCreator handle,
                            uint32_t num_param,
-                           const char **keys,
-                           const char **vals,
-                           DatasetHandle *out) {
-  Dataset *dataset = nullptr;
+                           const char** keys,
+                           const char** vals,
+                           DatasetHandle* out) {
+  Dataset* dataset = nullptr;
   API_BEGIN();
-  DatasetReg *e = static_cast<DatasetReg *>(handle);
-  std::vector<std::pair<std::string, std::string> > kwargs;
+  DatasetReg* e = static_cast<DatasetReg*>(handle);
+  std::vector<std::pair<std::string, std::string>> kwargs;
   for (uint32_t i = 0; i < num_param; ++i) {
     kwargs.emplace_back(std::string(keys[i]), std::string(vals[i]));
   }
   dataset = e->body(kwargs);
-  *out = new std::shared_ptr<Dataset>(dataset);
+  *out    = new std::shared_ptr<Dataset>(dataset);
   API_END_HANDLE_ERROR(delete dataset);
 }
 
 int MXDatasetGetDatasetInfo(DatasetCreator creator,
-                                      const char **name,
-                                      const char **description,
-                                      uint32_t *num_args,
-                                      const char ***arg_names,
-                                      const char ***arg_type_infos,
-                                      const char ***arg_descriptions) {
-  DatasetReg *e = static_cast<DatasetReg *>(creator);
-  return MXAPIGetFunctionRegInfo(e, name, description, num_args,
-                                 arg_names, arg_type_infos, arg_descriptions,
-                                 nullptr);
+                            const char** name,
+                            const char** description,
+                            uint32_t* num_args,
+                            const char*** arg_names,
+                            const char*** arg_type_infos,
+                            const char*** arg_descriptions) {
+  DatasetReg* e = static_cast<DatasetReg*>(creator);
+  return MXAPIGetFunctionRegInfo(
+      e, name, description, num_args, arg_names, arg_type_infos, arg_descriptions, nullptr);
 }
 
 int MXDatasetFree(DatasetHandle handle) {
@@ -2691,37 +2933,38 @@ int MXDatasetFree(DatasetHandle handle) {
   API_END();
 }
 
-int MXDatasetGetLen(DatasetHandle handle, uint64_t *out) {
+int MXDatasetGetLen(DatasetHandle handle, uint64_t* out) {
   API_BEGIN();
   uint64_t len = (*static_cast<std::shared_ptr<Dataset>*>(handle))->GetLen();
-  *out = len;
+  *out         = len;
   API_END();
 }
 
 int MXDatasetGetItems(DatasetHandle handle,
                       uint64_t index,
                       int* num_outputs,
-                      NDArrayHandle **outputs) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                      NDArrayHandle** outputs) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   std::vector<NDArray> res;
   CHECK((*static_cast<std::shared_ptr<Dataset>*>(handle))->GetItem(index, &res))
-    << "Error getting item at index: " << index;
+      << "Error getting item at index: " << index;
   std::vector<NDArray*> ndoutputs;
   ndoutputs.reserve(res.size());
   if (*outputs == nullptr) {
     *num_outputs = res.size();
-    for (int i = 0; i < *num_outputs; ++i) ndoutputs.push_back(new NDArray());
+    for (int i = 0; i < *num_outputs; ++i)
+      ndoutputs.push_back(new NDArray());
   } else {
-    CHECK_EQ(*num_outputs, res.size())
-        << "MXDatasetGetItems expects " << res.size() << " outputs, but "
-        << *num_outputs << " was given.";
+    CHECK_EQ(*num_outputs, res.size()) << "MXDatasetGetItems expects " << res.size()
+                                       << " outputs, but " << *num_outputs << " was given.";
     for (int i = 0; i < *num_outputs; ++i) {
       ndoutputs.push_back(reinterpret_cast<NDArray*>((*outputs)[i]));
     }
   }
   // copy ndarrays
-  for (int i = 0; i < *num_outputs; ++i) *(ndoutputs[i]) = res[i];
+  for (int i = 0; i < *num_outputs; ++i)
+    *(ndoutputs[i]) = res[i];
 
   if (*outputs == nullptr) {
     ret->ret_handles.clear();
@@ -2734,54 +2977,52 @@ int MXDatasetGetItems(DatasetHandle handle,
   API_END();
 }
 
-int MXListBatchifyFunctions(uint32_t *out_size,
-                            BatchifyFunctionCreator **out_array) {
+int MXListBatchifyFunctions(uint32_t* out_size, BatchifyFunctionCreator** out_array) {
   API_BEGIN();
-  auto &vec = dmlc::Registry<BatchifyFunctionReg>::List();
-  *out_size = static_cast<uint32_t>(vec.size());
+  auto& vec  = dmlc::Registry<BatchifyFunctionReg>::List();
+  *out_size  = static_cast<uint32_t>(vec.size());
   *out_array = (BatchifyFunctionCreator*)(dmlc::BeginPtr(vec));  //  NOLINT(*)
   API_END();
 }
 
 int MXBatchifyFunctionCreateFunction(BatchifyFunctionCreator handle,
                                      uint32_t num_param,
-                                     const char **keys,
-                                     const char **vals,
-                                     BatchifyFunctionHandle *out) {
-  BatchifyFunction *bf = nullptr;
+                                     const char** keys,
+                                     const char** vals,
+                                     BatchifyFunctionHandle* out) {
+  BatchifyFunction* bf = nullptr;
   API_BEGIN();
-  BatchifyFunctionReg *e = static_cast<BatchifyFunctionReg *>(handle);
-  std::vector<std::pair<std::string, std::string> > kwargs;
+  BatchifyFunctionReg* e = static_cast<BatchifyFunctionReg*>(handle);
+  std::vector<std::pair<std::string, std::string>> kwargs;
   for (uint32_t i = 0; i < num_param; ++i) {
     kwargs.emplace_back(std::string(keys[i]), std::string(vals[i]));
   }
-  bf = e->body(kwargs);
+  bf   = e->body(kwargs);
   *out = new BatchifyFunctionPtr(bf);
   API_END_HANDLE_ERROR(delete bf);
 }
 
 int MXBatchifyFunctionGetFunctionInfo(BatchifyFunctionCreator creator,
-                                      const char **name,
-                                      const char **description,
-                                      uint32_t *num_args,
-                                      const char ***arg_names,
-                                      const char ***arg_type_infos,
-                                      const char ***arg_descriptions) {
-  BatchifyFunctionReg *e = static_cast<BatchifyFunctionReg *>(creator);
-  return MXAPIGetFunctionRegInfo(e, name, description, num_args,
-                                 arg_names, arg_type_infos, arg_descriptions,
-                                 nullptr);
+                                      const char** name,
+                                      const char** description,
+                                      uint32_t* num_args,
+                                      const char*** arg_names,
+                                      const char*** arg_type_infos,
+                                      const char*** arg_descriptions) {
+  BatchifyFunctionReg* e = static_cast<BatchifyFunctionReg*>(creator);
+  return MXAPIGetFunctionRegInfo(
+      e, name, description, num_args, arg_names, arg_type_infos, arg_descriptions, nullptr);
 }
 int MXBatchifyFunctionInvoke(BatchifyFunctionHandle handle,
                              int batch_size,
                              int num_output,
-                             NDArrayHandle *inputs,
-                             NDArrayHandle **outputs) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                             NDArrayHandle* inputs,
+                             NDArrayHandle** outputs) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   CHECK_GT(batch_size, 0);
   CHECK_GT(num_output, 0);
-  std::vector<std::vector<NDArray> > ndinputs;
+  std::vector<std::vector<NDArray>> ndinputs;
   ndinputs.reserve(batch_size);
   int pos = 0;
   for (int i = 0; i < batch_size; ++i) {
@@ -2795,22 +3036,23 @@ int MXBatchifyFunctionInvoke(BatchifyFunctionHandle handle,
   }
   std::vector<NDArray> res;
   CHECK((*static_cast<BatchifyFunctionPtr*>(handle))->Batchify(ndinputs, &res))
-    << "Error call batchify with " << ndinputs.size() << " inputs";
+      << "Error call batchify with " << ndinputs.size() << " inputs";
   std::vector<NDArray*> ndoutputs;
   ndoutputs.reserve(res.size());
   if (*outputs == nullptr) {
-    for (int i = 0; i < num_output; ++i) ndoutputs.push_back(new NDArray());
+    for (int i = 0; i < num_output; ++i)
+      ndoutputs.push_back(new NDArray());
   } else {
-    CHECK_EQ(num_output, res.size())
-        << "MXBatchifyFunctionInvoke expects " << res.size() << " outputs, but "
-        << num_output << " was given.";
+    CHECK_EQ(num_output, res.size()) << "MXBatchifyFunctionInvoke expects " << res.size()
+                                     << " outputs, but " << num_output << " was given.";
     for (int i = 0; i < num_output; ++i) {
       ndoutputs.push_back(reinterpret_cast<NDArray*>((*outputs)[i]));
     }
   }
 
   // copy ndarrays
-  for (int i = 0; i < num_output; ++i) *(ndoutputs[i]) = res[i];
+  for (int i = 0; i < num_output; ++i)
+    *(ndoutputs[i]) = res[i];
 
   if (*outputs == nullptr) {
     ret->ret_handles.clear();
@@ -2832,20 +3074,21 @@ int MXBatchifyFunctionFree(BatchifyFunctionHandle handle) {
 // Part 6: basic KVStore interface
 //--------------------------------------------
 
-int MXKVStoreCreate(const char *type,
-                    KVStoreHandle *out) {
+int MXKVStoreCreate(const char* type, KVStoreHandle* out) {
   API_BEGIN();
   *out = KVStore::Create(type);
   API_END();
 }
 
-int MXKVStoreSetGradientCompression(KVStoreHandle handle, uint32_t num_params,
-                                    const char** keys, const char** vals) {
+int MXKVStoreSetGradientCompression(KVStoreHandle handle,
+                                    uint32_t num_params,
+                                    const char** keys,
+                                    const char** vals) {
   API_BEGIN();
-  std::vector<std::pair<std::string, std::string> > params;
+  std::vector<std::pair<std::string, std::string>> params;
   for (uint32_t i = 0; i < num_params; ++i) {
     std::pair<std::string, std::string> p;
-    p.first = keys[i];
+    p.first  = keys[i];
     p.second = vals[i];
     params.push_back(p);
   }
@@ -2859,10 +3102,7 @@ int MXKVStoreFree(KVStoreHandle handle) {
   API_END();
 }
 
-int MXKVStoreInit(KVStoreHandle handle,
-                  uint32_t num,
-                  const int* keys,
-                  NDArrayHandle* vals) {
+int MXKVStoreInit(KVStoreHandle handle, uint32_t num, const int* keys, NDArrayHandle* vals) {
   API_BEGIN();
   std::vector<int> v_keys(num);
   std::vector<NDArray> v_vals(num);
@@ -2874,10 +3114,7 @@ int MXKVStoreInit(KVStoreHandle handle,
   API_END();
 }
 
-int MXKVStoreInitEx(KVStoreHandle handle,
-                  uint32_t num,
-                  const char** keys,
-                  NDArrayHandle* vals) {
+int MXKVStoreInitEx(KVStoreHandle handle, uint32_t num, const char** keys, NDArrayHandle* vals) {
   API_BEGIN();
   std::vector<std::string> v_keys(num);
   std::vector<NDArray> v_vals(num);
@@ -2906,10 +3143,10 @@ int MXKVStorePush(KVStoreHandle handle,
 }
 
 int MXKVStorePushEx(KVStoreHandle handle,
-                  uint32_t num,
-                  const char** keys,
-                  NDArrayHandle* vals,
-                  int priority) {
+                    uint32_t num,
+                    const char** keys,
+                    NDArrayHandle* vals,
+                    int priority) {
   API_BEGIN();
   std::vector<std::string> v_keys(num);
   std::vector<NDArray> v_vals(num);
@@ -2968,14 +3205,13 @@ int MXKVStoreBroadcast(KVStoreHandle handle,
   std::vector<NDArray*> v_outs(onum);
   for (mx_uint i = 0; i < vnum; ++i) {
     v_vkeys[i] = vkeys[i];
-    v_vals[i] = *static_cast<NDArray*>(vals[i]);
+    v_vals[i]  = *static_cast<NDArray*>(vals[i]);
   }
   for (mx_uint i = 0; i < onum; ++i) {
     v_okeys[i] = okeys[i];
-    v_outs[i] = static_cast<NDArray*>(outs[i]);
+    v_outs[i]  = static_cast<NDArray*>(outs[i]);
   }
-  static_cast<KVStore*>(handle)->Broadcast(v_vkeys, v_okeys, v_vals, v_outs,
-    priority);
+  static_cast<KVStore*>(handle)->Broadcast(v_vkeys, v_okeys, v_vals, v_outs, priority);
   API_END();
 }
 
@@ -2994,14 +3230,13 @@ int MXKVStoreBroadcastEx(KVStoreHandle handle,
   std::vector<NDArray*> v_outs(onum);
   for (mx_uint i = 0; i < vnum; ++i) {
     v_vkeys[i] = vkeys[i];
-    v_vals[i] = *static_cast<NDArray*>(vals[i]);
+    v_vals[i]  = *static_cast<NDArray*>(vals[i]);
   }
   for (mx_uint i = 0; i < onum; ++i) {
     v_okeys[i] = okeys[i];
-    v_outs[i] = static_cast<NDArray*>(outs[i]);
+    v_outs[i]  = static_cast<NDArray*>(outs[i]);
   }
-  static_cast<KVStore*>(handle)->Broadcast(v_vkeys, v_okeys, v_vals, v_outs,
-    priority);
+  static_cast<KVStore*>(handle)->Broadcast(v_vkeys, v_okeys, v_vals, v_outs, priority);
   API_END();
 }
 
@@ -3020,14 +3255,13 @@ int MXKVStorePushPull(KVStoreHandle handle,
   std::vector<NDArray*> v_outs(onum);
   for (mx_uint i = 0; i < vnum; ++i) {
     v_vkeys[i] = vkeys[i];
-    v_vals[i] = *static_cast<NDArray*>(vals[i]);
+    v_vals[i]  = *static_cast<NDArray*>(vals[i]);
   }
   for (mx_uint i = 0; i < onum; ++i) {
     v_okeys[i] = okeys[i];
-    v_outs[i] = static_cast<NDArray*>(outs[i]);
+    v_outs[i]  = static_cast<NDArray*>(outs[i]);
   }
-  static_cast<KVStore*>(handle)->PushPull(v_vkeys, v_okeys, v_vals, v_outs,
-    priority);
+  static_cast<KVStore*>(handle)->PushPull(v_vkeys, v_okeys, v_vals, v_outs, priority);
   API_END();
 }
 
@@ -3046,14 +3280,13 @@ int MXKVStorePushPullEx(KVStoreHandle handle,
   std::vector<NDArray*> v_outs(onum);
   for (mx_uint i = 0; i < vnum; ++i) {
     v_vkeys[i] = vkeys[i];
-    v_vals[i] = *static_cast<NDArray*>(vals[i]);
+    v_vals[i]  = *static_cast<NDArray*>(vals[i]);
   }
   for (mx_uint i = 0; i < onum; ++i) {
     v_okeys[i] = okeys[i];
-    v_outs[i] = static_cast<NDArray*>(outs[i]);
+    v_outs[i]  = static_cast<NDArray*>(outs[i]);
   }
-  static_cast<KVStore*>(handle)->PushPull(v_vkeys, v_okeys, v_vals, v_outs,
-    priority);
+  static_cast<KVStore*>(handle)->PushPull(v_vkeys, v_okeys, v_vals, v_outs, priority);
   API_END();
 }
 
@@ -3102,8 +3335,8 @@ int MXKVStorePullRowSparse(KVStoreHandle handle,
   std::vector<std::pair<NDArray*, NDArray>> v_val_rowids(num);
   for (uint32_t i = 0; i < num; ++i) {
     v_keys[i] = keys[i];
-    v_val_rowids[i] = std::make_pair(static_cast<NDArray*>(vals[i]),
-                                     *static_cast<NDArray*>(row_ids[i]));
+    v_val_rowids[i] =
+        std::make_pair(static_cast<NDArray*>(vals[i]), *static_cast<NDArray*>(row_ids[i]));
   }
   static_cast<KVStore*>(handle)->PullRowSparse(v_keys, v_val_rowids, priority);
   API_END();
@@ -3120,32 +3353,28 @@ int MXKVStorePullRowSparseEx(KVStoreHandle handle,
   std::vector<std::pair<NDArray*, NDArray>> v_val_rowids(num);
   for (uint32_t i = 0; i < num; ++i) {
     v_keys[i] = keys[i];
-    v_val_rowids[i] = std::make_pair(static_cast<NDArray*>(vals[i]),
-                                     *static_cast<NDArray*>(row_ids[i]));
+    v_val_rowids[i] =
+        std::make_pair(static_cast<NDArray*>(vals[i]), *static_cast<NDArray*>(row_ids[i]));
   }
   static_cast<KVStore*>(handle)->PullRowSparse(v_keys, v_val_rowids, priority);
   API_END();
 }
 
-void MXKVStoreSetUpdaterImpl(KVStoreHandle handle,
-                             MXKVStoreUpdater updater,
-                             void* updater_handle) {
-  MXKVStoreUpdater * updater_temp = updater;
-  void* updater_handle_temp = updater_handle;
-  std::function<void(int, const NDArray&, NDArray*)> updt
-  = [updater_temp, updater_handle_temp](int key, const NDArray& recv, NDArray* local) {
-    NDArray* recv_copy = new NDArray();
-    *recv_copy = recv;
-    NDArray* local_copy = new NDArray();
-    *local_copy = *local;
-    updater_temp(key, recv_copy, local_copy, updater_handle_temp);
-  };
+void MXKVStoreSetUpdaterImpl(KVStoreHandle handle, MXKVStoreUpdater updater, void* updater_handle) {
+  MXKVStoreUpdater* updater_temp = updater;
+  void* updater_handle_temp      = updater_handle;
+  std::function<void(int, const NDArray&, NDArray*)> updt =
+      [updater_temp, updater_handle_temp](int key, const NDArray& recv, NDArray* local) {
+        NDArray* recv_copy  = new NDArray();
+        *recv_copy          = recv;
+        NDArray* local_copy = new NDArray();
+        *local_copy         = *local;
+        updater_temp(key, recv_copy, local_copy, updater_handle_temp);
+      };
   static_cast<KVStore*>(handle)->set_updater(updt);
 }
 
-int MXKVStoreSetUpdater(KVStoreHandle handle,
-                        MXKVStoreUpdater updater,
-                        void* updater_handle) {
+int MXKVStoreSetUpdater(KVStoreHandle handle, MXKVStoreUpdater updater, void* updater_handle) {
   API_BEGIN();
   MXKVStoreSetUpdaterImpl(handle, updater, updater_handle);
   API_END();
@@ -3159,28 +3388,28 @@ int MXKVStoreSetUpdaterEx(KVStoreHandle handle,
   // set updater with int keys
   MXKVStoreSetUpdaterImpl(handle, updater, updater_handle);
   // set updater with string keys
-  MXKVStoreStrUpdater * updater_temp = str_updater;
-  void* updater_handle_temp = updater_handle;
-  std::function<void(const std::string&, const NDArray&, NDArray*)> updt
-  = [updater_temp, updater_handle_temp]
-    (const std::string& key, const NDArray& recv, NDArray* local) {
-    NDArray* recv_copy = new NDArray();
-    *recv_copy = recv;
-    NDArray* local_copy = new NDArray();
-    *local_copy = *local;
-    updater_temp(key.c_str(), recv_copy, local_copy, updater_handle_temp);
-  };
+  MXKVStoreStrUpdater* updater_temp = str_updater;
+  void* updater_handle_temp         = updater_handle;
+  std::function<void(const std::string&, const NDArray&, NDArray*)> updt =
+      [updater_temp, updater_handle_temp](
+          const std::string& key, const NDArray& recv, NDArray* local) {
+        NDArray* recv_copy  = new NDArray();
+        *recv_copy          = recv;
+        NDArray* local_copy = new NDArray();
+        *local_copy         = *local;
+        updater_temp(key.c_str(), recv_copy, local_copy, updater_handle_temp);
+      };
   static_cast<KVStore*>(handle)->set_updater(updt);
   API_END();
 }
 
-int MXKVStoreGetRank(KVStoreHandle handle, int *rank) {
+int MXKVStoreGetRank(KVStoreHandle handle, int* rank) {
   API_BEGIN();
   *rank = static_cast<KVStore*>(handle)->get_rank();
   API_END();
 }
 
-int MXKVStoreGetGroupSize(KVStoreHandle handle, int *size) {
+int MXKVStoreGetGroupSize(KVStoreHandle handle, int* size) {
   API_BEGIN();
   *size = static_cast<KVStore*>(handle)->get_group_size();
   API_END();
@@ -3192,16 +3421,13 @@ int MXKVStoreBarrier(KVStoreHandle handle) {
   API_END();
 }
 
-int MXKVStoreSetBarrierBeforeExit(KVStoreHandle handle,
-                                  const int barrier_before_exit) {
+int MXKVStoreSetBarrierBeforeExit(KVStoreHandle handle, const int barrier_before_exit) {
   API_BEGIN();
   static_cast<KVStore*>(handle)->set_barrier_before_exit(barrier_before_exit);
   API_END();
 }
 
-int MXInitPSEnv(uint32_t num_vars,
-                const char **keys,
-                const char **vals) {
+int MXInitPSEnv(uint32_t num_vars, const char** keys, const char** vals) {
   API_BEGIN();
   std::unordered_map<std::string, std::string> kwargs;
   for (uint32_t i = 0; i < num_vars; ++i) {
@@ -3211,19 +3437,19 @@ int MXInitPSEnv(uint32_t num_vars,
   API_END();
 }
 
-int MXKVStoreIsWorkerNode(int *ret) {
+int MXKVStoreIsWorkerNode(int* ret) {
   API_BEGIN();
   *ret = KVStore::IsWorkerNode();
   API_END();
 }
 
-int MXKVStoreIsServerNode(int *ret) {
+int MXKVStoreIsServerNode(int* ret) {
   API_BEGIN();
   *ret = KVStore::IsServerNode();
   API_END();
 }
 
-int MXKVStoreIsSchedulerNode(int *ret) {
+int MXKVStoreIsSchedulerNode(int* ret) {
   API_BEGIN();
   *ret = KVStore::IsSchedulerNode();
   API_END();
@@ -3231,28 +3457,24 @@ int MXKVStoreIsSchedulerNode(int *ret) {
 
 int MXKVStoreRunServer(KVStoreHandle handle,
                        MXKVStoreServerController controller,
-                       void *controller_handle) {
+                       void* controller_handle) {
   API_BEGIN();
-  MXKVStoreServerController *controller_temp = controller;
-  void *controller_handle_temp = controller_handle;
+  MXKVStoreServerController* controller_temp = controller;
+  void* controller_handle_temp               = controller_handle;
   auto ctrl = [controller_temp, controller_handle_temp](int head, const std::string& body) {
-      controller_temp(head, body.c_str(), controller_handle_temp);
+    controller_temp(head, body.c_str(), controller_handle_temp);
   };
   static_cast<KVStore*>(handle)->RunServer(ctrl);
   API_END();
 }
 
-int MXKVStoreSendCommmandToServers(KVStoreHandle handle,
-                                   int cmd_id,
-                                   const char* cmd_body) {
+int MXKVStoreSendCommmandToServers(KVStoreHandle handle, int cmd_id, const char* cmd_body) {
   API_BEGIN();
-  static_cast<KVStore*>(handle)->SendCommandToServers(
-      cmd_id, std::string(cmd_body));
+  static_cast<KVStore*>(handle)->SendCommandToServers(cmd_id, std::string(cmd_body));
   API_END();
 }
 
-int MXKVStoreGetType(KVStoreHandle handle,
-                     const char** type) {
+int MXKVStoreGetType(KVStoreHandle handle, const char** type) {
   API_BEGIN();
   *CHECK_NOTNULL(type) = static_cast<KVStore*>(handle)->type().c_str();
   API_END();
@@ -3260,7 +3482,7 @@ int MXKVStoreGetType(KVStoreHandle handle,
 
 int MXKVStoreGetNumDeadNode(KVStoreHandle handle,
                             const int node_id,
-                            int *number,
+                            int* number,
                             const int timeout_sec) {
   API_BEGIN();
   *number = static_cast<KVStore*>(handle)->get_num_dead_node(node_id, timeout_sec);
@@ -3268,69 +3490,62 @@ int MXKVStoreGetNumDeadNode(KVStoreHandle handle,
 }
 
 struct MXRecordIOContext {
-  dmlc::RecordIOWriter *writer;
-  dmlc::RecordIOReader *reader;
-  dmlc::Stream *stream;
-  std::string *read_buff;
+  dmlc::RecordIOWriter* writer;
+  dmlc::RecordIOReader* reader;
+  dmlc::Stream* stream;
+  std::string* read_buff;
 };
 
-int MXRecordIOWriterCreate(const char *uri,
-                           RecordIOHandle *out) {
+int MXRecordIOWriterCreate(const char* uri, RecordIOHandle* out) {
   API_BEGIN();
-  dmlc::Stream *stream = dmlc::Stream::Create(uri, "w");
-  MXRecordIOContext *context = new MXRecordIOContext;
-  context->writer = new dmlc::RecordIOWriter(stream);
-  context->reader = nullptr;
-  context->stream = stream;
-  context->read_buff = nullptr;
-  *out = reinterpret_cast<RecordIOHandle>(context);
+  dmlc::Stream* stream       = dmlc::Stream::Create(uri, "w");
+  MXRecordIOContext* context = new MXRecordIOContext;
+  context->writer            = new dmlc::RecordIOWriter(stream);
+  context->reader            = nullptr;
+  context->stream            = stream;
+  context->read_buff         = nullptr;
+  *out                       = reinterpret_cast<RecordIOHandle>(context);
   API_END();
 }
 
 int MXRecordIOWriterFree(RecordIOHandle handle) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
   delete context->writer;
   delete context->stream;
   delete context;
   API_END();
 }
 
-int MXRecordIOWriterWriteRecord(RecordIOHandle handle,
-                                const char *buf, size_t size) {
+int MXRecordIOWriterWriteRecord(RecordIOHandle handle, const char* buf, size_t size) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
   context->writer->WriteRecord(reinterpret_cast<const void*>(buf), size);
   API_END();
 }
 
-int MXRecordIOWriterTell(RecordIOHandle handle, size_t *pos) {
+int MXRecordIOWriterTell(RecordIOHandle handle, size_t* pos) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
-  *pos = context->writer->Tell();
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
+  *pos                       = context->writer->Tell();
   API_END();
 }
 
-int MXRecordIOReaderCreate(const char *uri,
-                           RecordIOHandle *out) {
+int MXRecordIOReaderCreate(const char* uri, RecordIOHandle* out) {
   API_BEGIN();
-  dmlc::Stream *stream = dmlc::Stream::Create(uri, "r");
-  MXRecordIOContext *context = new MXRecordIOContext;
-  context->reader = new dmlc::RecordIOReader(stream);
-  context->writer = nullptr;
-  context->stream = stream;
-  context->read_buff = new std::string();
-  *out = reinterpret_cast<RecordIOHandle>(context);
+  dmlc::Stream* stream       = dmlc::Stream::Create(uri, "r");
+  MXRecordIOContext* context = new MXRecordIOContext;
+  context->reader            = new dmlc::RecordIOReader(stream);
+  context->writer            = nullptr;
+  context->stream            = stream;
+  context->read_buff         = new std::string();
+  *out                       = reinterpret_cast<RecordIOHandle>(context);
   API_END();
 }
 
 int MXRecordIOReaderFree(RecordIOHandle handle) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
   delete context->reader;
   delete context->stream;
   delete context->read_buff;
@@ -3338,16 +3553,14 @@ int MXRecordIOReaderFree(RecordIOHandle handle) {
   API_END();
 }
 
-int MXRecordIOReaderReadRecord(RecordIOHandle handle,
-                              char const **buf, size_t *size) {
+int MXRecordIOReaderReadRecord(RecordIOHandle handle, char const** buf, size_t* size) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
   if (context->reader->NextRecord(context->read_buff)) {
-    *buf = context->read_buff->c_str();
+    *buf  = context->read_buff->c_str();
     *size = context->read_buff->size();
   } else {
-    *buf = nullptr;
+    *buf  = nullptr;
     *size = 0;
   }
   API_END();
@@ -3355,31 +3568,37 @@ int MXRecordIOReaderReadRecord(RecordIOHandle handle,
 
 int MXRecordIOReaderSeek(RecordIOHandle handle, size_t pos) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
   context->reader->Seek(pos);
   API_END();
 }
 
-int MXRecordIOReaderTell(RecordIOHandle handle, size_t *pos) {
+int MXRecordIOReaderTell(RecordIOHandle handle, size_t* pos) {
   API_BEGIN();
-  MXRecordIOContext *context =
-    reinterpret_cast<MXRecordIOContext*>(handle);
-  *pos = context->reader->Tell();
+  MXRecordIOContext* context = reinterpret_cast<MXRecordIOContext*>(handle);
+  *pos                       = context->reader->Tell();
   API_END();
 }
 
-int MXRtcCreate(char* name, uint32_t num_input, uint32_t num_output,
-                char** input_names, char** output_names,
-                NDArrayHandle* inputs, NDArrayHandle* outputs,
-                char* kernel, RtcHandle *out) {
+int MXRtcCreate(char* name,
+                uint32_t num_input,
+                uint32_t num_output,
+                char** input_names,
+                char** output_names,
+                NDArrayHandle* inputs,
+                NDArrayHandle* outputs,
+                char* kernel,
+                RtcHandle* out) {
   API_BEGIN();
   LOG(FATAL) << "Old rtc API is deprecated. Please use CudaModule";
   API_END();
 }
 
-int MXRtcPush(RtcHandle handle, uint32_t num_input, uint32_t num_output,
-              NDArrayHandle* inputs, NDArrayHandle* outputs,
+int MXRtcPush(RtcHandle handle,
+              uint32_t num_input,
+              uint32_t num_output,
+              NDArrayHandle* inputs,
+              NDArrayHandle* outputs,
               uint32_t gridDimX,
               uint32_t gridDimY,
               uint32_t gridDimZ,
@@ -3403,16 +3622,20 @@ int MXCustomOpRegister(const char* op_type, CustomOpPropCreator creator) {
   API_END();
 }
 
-
-int MXRtcCudaModuleCreate(const char* source, int num_options,
-                          const char** options, int num_exports,
-                          const char** exports, CudaModuleHandle *out) {
+int MXRtcCudaModuleCreate(const char* source,
+                          int num_options,
+                          const char** options,
+                          int num_exports,
+                          const char** exports,
+                          CudaModuleHandle* out) {
   API_BEGIN();
 #if MXNET_USE_CUDA
   std::vector<std::string> str_opts;
-  for (int i = 0; i < num_options; ++i) str_opts.emplace_back(options[i]);
+  for (int i = 0; i < num_options; ++i)
+    str_opts.emplace_back(options[i]);
   std::vector<std::string> str_exports;
-  for (int i = 0; i < num_exports; ++i) str_exports.emplace_back(exports[i]);
+  for (int i = 0; i < num_exports; ++i)
+    str_exports.emplace_back(exports[i]);
   *out = new rtc::CudaModule(source, str_opts, str_exports);
 #else
   LOG(FATAL) << "Compile with USE_CUDA=1 to have CUDA runtime compilation.";
@@ -3430,20 +3653,24 @@ int MXRtcCudaModuleFree(CudaModuleHandle handle) {
   API_END();
 }
 
-int MXRtcCudaKernelCreate(CudaModuleHandle handle, const char* name, int num_args,
-                          int* is_ndarray, int* is_const, int* arg_types,
-                          CudaKernelHandle *out) {
+int MXRtcCudaKernelCreate(CudaModuleHandle handle,
+                          const char* name,
+                          int num_args,
+                          int* is_ndarray,
+                          int* is_const,
+                          int* arg_types,
+                          CudaKernelHandle* out) {
   API_BEGIN();
 #if MXNET_USE_CUDA
   auto module = reinterpret_cast<rtc::CudaModule*>(handle);
   std::vector<rtc::CudaModule::ArgType> signature;
   for (int i = 0; i < num_args; ++i) {
-    signature.push_back(rtc::CudaModule::ArgType{
-        static_cast<bool>(is_ndarray[i]), static_cast<bool>(is_const[i]),
-        static_cast<mshadow::TypeFlag>(arg_types[i])});
+    signature.push_back(rtc::CudaModule::ArgType{static_cast<bool>(is_ndarray[i]),
+                                                 static_cast<bool>(is_const[i]),
+                                                 static_cast<mshadow::TypeFlag>(arg_types[i])});
   }
   auto kernel = module->GetKernel(name, signature);
-  *out = new std::shared_ptr<rtc::CudaModule::Kernel>(kernel);
+  *out        = new std::shared_ptr<rtc::CudaModule::Kernel>(kernel);
 #else
   LOG(FATAL) << "Compile with USE_CUDA=1 to have CUDA runtime compilation.";
 #endif
@@ -3460,27 +3687,38 @@ int MXRtcCudaKernelFree(CudaKernelHandle handle) {
   API_END();
 }
 
-int MXRtcCudaKernelCall(CudaKernelHandle handle, int dev_id, void** args,
-                        uint32_t grid_dim_x, uint32_t grid_dim_y,
-                        uint32_t grid_dim_z, uint32_t block_dim_x,
-                        uint32_t block_dim_y, uint32_t block_dim_z,
+int MXRtcCudaKernelCall(CudaKernelHandle handle,
+                        int dev_id,
+                        void** args,
+                        uint32_t grid_dim_x,
+                        uint32_t grid_dim_y,
+                        uint32_t grid_dim_z,
+                        uint32_t block_dim_x,
+                        uint32_t block_dim_y,
+                        uint32_t block_dim_z,
                         uint32_t shared_mem) {
   API_BEGIN();
 #if MXNET_USE_CUDA
-  auto kernel = reinterpret_cast<std::shared_ptr<rtc::CudaModule::Kernel>*>(handle);
+  auto kernel           = reinterpret_cast<std::shared_ptr<rtc::CudaModule::Kernel>*>(handle);
   const auto& signature = (*kernel)->signature();
   std::vector<dmlc::any> any_args;
   for (size_t i = 0; i < signature.size(); ++i) {
     if (signature[i].is_ndarray) {
       any_args.emplace_back(*static_cast<NDArray*>(args[i]));
     } else {
-      MSHADOW_TYPE_SWITCH(signature[i].dtype, DType, {
-        any_args.emplace_back(*static_cast<DType*>(args[i]));
-      });
+      MSHADOW_TYPE_SWITCH(
+          signature[i].dtype, DType, { any_args.emplace_back(*static_cast<DType*>(args[i])); });
     }
   }
-  (*kernel)->Launch(Context::GPU(dev_id), any_args, grid_dim_x, grid_dim_y,
-                    grid_dim_z, block_dim_x, block_dim_y, block_dim_z, shared_mem);
+  (*kernel)->Launch(Context::GPU(dev_id),
+                    any_args,
+                    grid_dim_x,
+                    grid_dim_y,
+                    grid_dim_z,
+                    block_dim_x,
+                    block_dim_y,
+                    block_dim_z,
+                    shared_mem);
 #else
   LOG(FATAL) << "Compile with USE_CUDA=1 to have CUDA runtime compilation.";
 #endif
@@ -3503,12 +3741,16 @@ int MXNDArrayGetSharedMemHandle(NDArrayHandle handle, int* shared_pid, int* shar
     Storage::Get()->SharedIncrementRefCount(shandle);
   }
   *shared_pid = shandle.shared_pid;
-  *shared_id = shandle.shared_id;
+  *shared_id  = shandle.shared_id;
   API_END();
 }
 
-int MXNDArrayCreateFromSharedMem(int shared_pid, int shared_id, const int *shape,
-                                 int ndim, int dtype, NDArrayHandle *out) {
+int MXNDArrayCreateFromSharedMem(int shared_pid,
+                                 int shared_id,
+                                 const int* shape,
+                                 int ndim,
+                                 int dtype,
+                                 NDArrayHandle* out) {
   API_BEGIN();
   NDArray* nd = new NDArray(shared_pid, shared_id, mxnet::TShape(shape, shape + ndim), dtype);
   nd->AssignStorageInfo(profiler::ProfilerScope::Get()->GetCurrentProfilerScope(),
@@ -3517,7 +3759,7 @@ int MXNDArrayCreateFromSharedMem(int shared_pid, int shared_id, const int *shape
   API_END();
 }
 
-using VarHandle = Engine::VarHandle;
+using VarHandle          = Engine::VarHandle;
 using CallbackOnComplete = Engine::CallbackOnComplete;
 
 void AssertValidNumberVars(int num_const_vars, int num_mutable_vars) {
@@ -3525,34 +3767,38 @@ void AssertValidNumberVars(int num_const_vars, int num_mutable_vars) {
   CHECK_GE(num_mutable_vars, 0) << "Non-negative number of mutable vars expected.";
 }
 
-int MXEnginePushAsync(EngineAsyncFunc async_func, void* func_param,
-                      EngineFuncParamDeleter deleter, ContextHandle ctx_handle,
-                      EngineVarHandle const_vars_handle, int num_const_vars,
-                      EngineVarHandle mutable_vars_handle, int num_mutable_vars,
-                      EngineFnPropertyHandle prop_handle, int priority,
-                      const char* opr_name, bool wait) {
+int MXEnginePushAsync(EngineAsyncFunc async_func,
+                      void* func_param,
+                      EngineFuncParamDeleter deleter,
+                      ContextHandle ctx_handle,
+                      EngineVarHandle const_vars_handle,
+                      int num_const_vars,
+                      EngineVarHandle mutable_vars_handle,
+                      int num_mutable_vars,
+                      EngineFnPropertyHandle prop_handle,
+                      int priority,
+                      const char* opr_name,
+                      bool wait) {
   API_BEGIN();
 
-  auto exec_ctx = *static_cast<const Context*>(ctx_handle);
-  auto const_vars = static_cast<VarHandle*>(const_vars_handle);
+  auto exec_ctx     = *static_cast<const Context*>(ctx_handle);
+  auto const_vars   = static_cast<VarHandle*>(const_vars_handle);
   auto mutable_vars = static_cast<VarHandle*>(mutable_vars_handle);
-  auto prop = FnProperty::kNormal;
+  auto prop         = FnProperty::kNormal;
   if (prop_handle) {
     prop = *static_cast<const FnProperty*>(prop_handle);
   }
 
   Engine::AsyncFn exec_fn;
   if (deleter == nullptr) {
-    exec_fn = [async_func, func_param](RunContext rctx,
-                                       CallbackOnComplete on_complete) {
+    exec_fn = [async_func, func_param](RunContext rctx, CallbackOnComplete on_complete) {
       async_func(&rctx, &on_complete, func_param);
     };
   } else {
     // Wrap func_param in a shared_ptr with deleter such that deleter
     // will be called when the lambda goes out of scope.
     std::shared_ptr<void> shared_func_param(func_param, deleter);
-    exec_fn = [async_func, shared_func_param](RunContext rctx,
-                                              CallbackOnComplete on_complete) {
+    exec_fn = [async_func, shared_func_param](RunContext rctx, CallbackOnComplete on_complete) {
       async_func(&rctx, &on_complete, shared_func_param.get());
     };
   }
@@ -3560,33 +3806,36 @@ int MXEnginePushAsync(EngineAsyncFunc async_func, void* func_param,
   AssertValidNumberVars(num_const_vars, num_mutable_vars);
   std::vector<VarHandle> const_var_vec(const_vars, const_vars + num_const_vars);
   std::vector<VarHandle> mutable_var_vec(mutable_vars, mutable_vars + num_mutable_vars);
-  Engine::Get()->PushAsync(exec_fn, exec_ctx, const_var_vec, mutable_var_vec,
-                           prop, priority, opr_name, wait);
+  Engine::Get()->PushAsync(
+      exec_fn, exec_ctx, const_var_vec, mutable_var_vec, prop, priority, opr_name, wait);
 
   API_END();
 }
 
-int MXEnginePushSync(EngineSyncFunc sync_func, void* func_param,
-                     EngineFuncParamDeleter deleter, ContextHandle ctx_handle,
-                     EngineVarHandle const_vars_handle, int num_const_vars,
-                     EngineVarHandle mutable_vars_handle, int num_mutable_vars,
-                     EngineFnPropertyHandle prop_handle, int priority,
+int MXEnginePushSync(EngineSyncFunc sync_func,
+                     void* func_param,
+                     EngineFuncParamDeleter deleter,
+                     ContextHandle ctx_handle,
+                     EngineVarHandle const_vars_handle,
+                     int num_const_vars,
+                     EngineVarHandle mutable_vars_handle,
+                     int num_mutable_vars,
+                     EngineFnPropertyHandle prop_handle,
+                     int priority,
                      const char* opr_name) {
   API_BEGIN();
 
-  auto exec_ctx = *static_cast<const Context*>(ctx_handle);
-  auto const_vars = static_cast<VarHandle*>(const_vars_handle);
+  auto exec_ctx     = *static_cast<const Context*>(ctx_handle);
+  auto const_vars   = static_cast<VarHandle*>(const_vars_handle);
   auto mutable_vars = static_cast<VarHandle*>(mutable_vars_handle);
-  auto prop = FnProperty::kNormal;
+  auto prop         = FnProperty::kNormal;
   if (prop_handle) {
     prop = *static_cast<const FnProperty*>(prop_handle);
   }
 
   Engine::SyncFn exec_fn;
   if (deleter == nullptr) {
-    exec_fn = [sync_func, func_param](RunContext rctx) {
-      sync_func(&rctx, func_param);
-    };
+    exec_fn = [sync_func, func_param](RunContext rctx) { sync_func(&rctx, func_param); };
   } else {
     // Wrap func_param in a shared_ptr with deleter such that deleter
     // will be called when the lambda goes out of scope.
@@ -3599,49 +3848,79 @@ int MXEnginePushSync(EngineSyncFunc sync_func, void* func_param,
   AssertValidNumberVars(num_const_vars, num_mutable_vars);
   std::vector<VarHandle> const_var_vec(const_vars, const_vars + num_const_vars);
   std::vector<VarHandle> mutable_var_vec(mutable_vars, mutable_vars + num_mutable_vars);
-  Engine::Get()->PushSync(exec_fn, exec_ctx, const_var_vec, mutable_var_vec,
-                          prop, priority, opr_name);
+  Engine::Get()->PushSync(
+      exec_fn, exec_ctx, const_var_vec, mutable_var_vec, prop, priority, opr_name);
 
   API_END();
 }
 
-int MXEnginePushAsyncND(EngineAsyncFunc async_func, void* func_param,
-                        EngineFuncParamDeleter deleter, ContextHandle ctx_handle,
-                        NDArrayHandle* const_nds_handle, int num_const_nds,
-                        NDArrayHandle* mutable_nds_handle, int num_mutable_nds,
-                        EngineFnPropertyHandle prop_handle, int priority,
-                        const char* opr_name, bool wait) {
+int MXEnginePushAsyncND(EngineAsyncFunc async_func,
+                        void* func_param,
+                        EngineFuncParamDeleter deleter,
+                        ContextHandle ctx_handle,
+                        NDArrayHandle* const_nds_handle,
+                        int num_const_nds,
+                        NDArrayHandle* mutable_nds_handle,
+                        int num_mutable_nds,
+                        EngineFnPropertyHandle prop_handle,
+                        int priority,
+                        const char* opr_name,
+                        bool wait) {
   API_BEGIN();
-  NDArray** const_nds = reinterpret_cast<NDArray**>(const_nds_handle);
+  NDArray** const_nds   = reinterpret_cast<NDArray**>(const_nds_handle);
   NDArray** mutable_nds = reinterpret_cast<NDArray**>(mutable_nds_handle);
   std::vector<VarHandle> const_var_vec(num_const_nds);
-  for (int i = 0; i < num_const_nds; ++i) const_var_vec[i] = const_nds[i]->var();
+  for (int i = 0; i < num_const_nds; ++i)
+    const_var_vec[i] = const_nds[i]->var();
   std::vector<VarHandle> mutable_var_vec(num_mutable_nds);
-  for (int i = 0; i < num_mutable_nds; ++i) mutable_var_vec[i] = mutable_nds[i]->var();
-  return MXEnginePushAsync(async_func, func_param, deleter, ctx_handle,
-                           const_var_vec.data(), num_const_nds,
-                           mutable_var_vec.data(), num_mutable_nds,
-                           prop_handle, priority, opr_name, wait);
-  API_END();
-}
-
-int MXEnginePushSyncND(EngineSyncFunc sync_func, void* func_param,
-                       EngineFuncParamDeleter deleter, ContextHandle ctx_handle,
-                       NDArrayHandle* const_nds_handle, int num_const_nds,
-                       NDArrayHandle* mutable_nds_handle, int num_mutable_nds,
-                       EngineFnPropertyHandle prop_handle, int priority,
+  for (int i = 0; i < num_mutable_nds; ++i)
+    mutable_var_vec[i] = mutable_nds[i]->var();
+  return MXEnginePushAsync(async_func,
+                           func_param,
+                           deleter,
+                           ctx_handle,
+                           const_var_vec.data(),
+                           num_const_nds,
+                           mutable_var_vec.data(),
+                           num_mutable_nds,
+                           prop_handle,
+                           priority,
+                           opr_name,
+                           wait);
+  API_END();
+}
+
+int MXEnginePushSyncND(EngineSyncFunc sync_func,
+                       void* func_param,
+                       EngineFuncParamDeleter deleter,
+                       ContextHandle ctx_handle,
+                       NDArrayHandle* const_nds_handle,
+                       int num_const_nds,
+                       NDArrayHandle* mutable_nds_handle,
+                       int num_mutable_nds,
+                       EngineFnPropertyHandle prop_handle,
+                       int priority,
                        const char* opr_name) {
   API_BEGIN();
-  NDArray** const_nds = reinterpret_cast<NDArray**>(const_nds_handle);
+  NDArray** const_nds   = reinterpret_cast<NDArray**>(const_nds_handle);
   NDArray** mutable_nds = reinterpret_cast<NDArray**>(mutable_nds_handle);
   std::vector<VarHandle> const_var_vec(num_const_nds);
-  for (int i = 0; i < num_const_nds; ++i) const_var_vec[i] = const_nds[i]->var();
+  for (int i = 0; i < num_const_nds; ++i)
+    const_var_vec[i] = const_nds[i]->var();
   std::vector<VarHandle> mutable_var_vec(num_mutable_nds);
-  for (int i = 0; i < num_mutable_nds; ++i) mutable_var_vec[i] = mutable_nds[i]->var();
-  return MXEnginePushSync(sync_func, func_param, deleter, ctx_handle,
-                          const_var_vec.data(), num_const_nds,
-                          mutable_var_vec.data(), num_mutable_nds,
-                          prop_handle, priority, opr_name);
+  for (int i = 0; i < num_mutable_nds; ++i)
+    mutable_var_vec[i] = mutable_nds[i]->var();
+  return MXEnginePushSync(sync_func,
+                          func_param,
+                          deleter,
+                          ctx_handle,
+                          const_var_vec.data(),
+                          num_const_nds,
+                          mutable_var_vec.data(),
+                          num_mutable_nds,
+                          prop_handle,
+                          priority,
+                          opr_name);
   API_END();
 }
 
@@ -3656,7 +3935,7 @@ int MXShallowCopyNDArray(NDArrayHandle src_handle, NDArrayHandle* out) {
   NDArray* ret = nullptr;
   API_BEGIN();
   NDArray* src_array = static_cast<NDArray*>(src_handle);
-  ret = new NDArray(*src_array);
-  *out = ret;
+  ret                = new NDArray(*src_array);
+  *out               = ret;
   API_END_HANDLE_ERROR(delete ret);
 }
diff --git a/src/c_api/c_api_common.h b/src/c_api/c_api_common.h
index 7f673ee871b2..781b51f195c3 100644
--- a/src/c_api/c_api_common.h
+++ b/src/c_api/c_api_common.h
@@ -57,16 +57,16 @@
 using namespace mxnet;
 
 /*! \brief entry to to easily hold returning information */
-template<typename dtype = int>
+template <typename dtype = int>
 struct MXAPIThreadLocalEntry {
   /*! \brief result holder for returning string */
   std::string ret_str;
   /*! \brief result holder for returning strings */
   std::vector<std::string> ret_vec_str;
   /*! \brief result holder for returning string pointers */
-  std::vector<const char *> ret_vec_charp;
+  std::vector<const char*> ret_vec_charp;
   /*! \brief result holder for returning handles */
-  std::vector<void *> ret_handles;
+  std::vector<void*> ret_handles;
   /*! \brief holder for NDArray handles */
   std::vector<NDArray*> ndinputs, ndoutputs;
   /*! \brief result holder for returning shapes */
@@ -91,29 +91,28 @@ struct MXAPIThreadLocalEntry {
   std::vector<bool> save_inputs, save_outputs;
   // DEPRECATED. Use SetupShapeArrayReturnWithBufferEx instead.
   // helper function to setup return value of shape array
-  inline static void SetupShapeArrayReturnWithBuffer(
-      const mxnet::ShapeVector &shapes,
-      std::vector<uint32_t> *ndim,
-      std::vector<const uint32_t*> *data,
-      std::vector<uint32_t> *buffer) {
+  inline static void SetupShapeArrayReturnWithBuffer(const mxnet::ShapeVector& shapes,
+                                                     std::vector<uint32_t>* ndim,
+                                                     std::vector<const uint32_t*>* data,
+                                                     std::vector<uint32_t>* buffer) {
     ndim->resize(shapes.size());
     data->resize(shapes.size());
     size_t size = 0;
-    for (const auto& s : shapes) size += s.ndim();
+    for (const auto& s : shapes)
+      size += s.ndim();
     buffer->resize(size);
-    uint32_t *ptr = buffer->data();
+    uint32_t* ptr = buffer->data();
     for (size_t i = 0; i < shapes.size(); ++i) {
       ndim->at(i) = shapes[i].ndim();
       data->at(i) = ptr;
-      ptr = nnvm::ShapeTypeCast(shapes[i].begin(), shapes[i].end(), ptr);
+      ptr         = nnvm::ShapeTypeCast(shapes[i].begin(), shapes[i].end(), ptr);
     }
   }
   // helper function to setup return value of shape array
-  inline static void SetupShapeArrayReturnWithBufferEx(
-      const mxnet::ShapeVector &shapes,
-      std::vector<int> *ndim,
-      std::vector<const dtype*> *data,
-      std::vector<dtype> *buffer) {
+  inline static void SetupShapeArrayReturnWithBufferEx(const mxnet::ShapeVector& shapes,
+                                                       std::vector<int>* ndim,
+                                                       std::vector<const dtype*>* data,
+                                                       std::vector<dtype>* buffer) {
     ndim->resize(shapes.size());
     data->resize(shapes.size());
     size_t size = 0;
@@ -135,12 +134,12 @@ struct MXAPIThreadLocalEntry {
 };
 
 // define the threadlocal store.
-template<typename dtype = int>
+template <typename dtype = int>
 using MXAPIThreadLocalStore = dmlc::ThreadLocalStore<MXAPIThreadLocalEntry<dtype>>;
 
 namespace mxnet {
 // copy attributes from inferred vector back to the vector of each type.
-template<typename AttrType>
+template <typename AttrType>
 inline void CopyAttr(const nnvm::IndexedGraph& idx,
                      const std::vector<AttrType>& attr_vec,
                      std::vector<AttrType>* in_attr,
diff --git a/src/c_api/c_api_function.cc b/src/c_api/c_api_function.cc
index f1dd8d98eaa1..2e3e84e8491a 100644
--- a/src/c_api/c_api_function.cc
+++ b/src/c_api/c_api_function.cc
@@ -21,7 +21,7 @@
  * \file custom.cc
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #include <mxnet/c_api.h>
 #include <mxnet/base.h>
 #include <mxnet/ndarray.h>
@@ -41,15 +41,14 @@ struct CustomFunctionParam {
   std::vector<int> out_dtypes;
 };
 
-std::vector<nnvm::NodeEntry> Gradient(
-    const nnvm::ObjectPtr& n,
-    const std::vector<nnvm::NodeEntry>& out_grads) {
+std::vector<nnvm::NodeEntry> Gradient(const nnvm::ObjectPtr& n,
+                                      const std::vector<nnvm::NodeEntry>& out_grads) {
   const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(n->attrs.parsed);
 
   nnvm::ObjectPtr g = nnvm::Node::Create();
-  g->attrs.op = nnvm::Op::Get("_backward_CustomFunction");
-  g->attrs.name = n->attrs.name + "_backward";
-  g->attrs.parsed = params;
+  g->attrs.op       = nnvm::Op::Get("_backward_CustomFunction");
+  g->attrs.name     = n->attrs.name + "_backward";
+  g->attrs.parsed   = params;
   g->control_deps.emplace_back(n);
 
   g->inputs = out_grads;
@@ -107,19 +106,30 @@ void Backward(const OpStatePtr& state,
   }
 
   op::custom::CustomOperator::Get()->Push(
-    [=]() {
-      CHECK(reinterpret_cast<CustomFunctionBwdFunc>(
-          params.info->callbacks[kCustomFunctionBackward])(
-              inputs.size(), outputs.size(),
-              const_cast<NDArrayHandle*>(ptrs.data()),
-              reinterpret_cast<const int*>(req.data()), ctx.is_train,
-              params.info->contexts[kCustomFunctionBackward]));
-    }, ctx, false, ctx.is_train, cpys, tags, output_tags, outputs);
+      [=]() {
+        CHECK(reinterpret_cast<CustomFunctionBwdFunc>(
+            params.info->callbacks[kCustomFunctionBackward])(
+            inputs.size(),
+            outputs.size(),
+            const_cast<NDArrayHandle*>(ptrs.data()),
+            reinterpret_cast<const int*>(req.data()),
+            ctx.is_train,
+            params.info->contexts[kCustomFunctionBackward]));
+      },
+      ctx,
+      false,
+      ctx.is_train,
+      cpys,
+      tags,
+      output_tags,
+      outputs);
 }
 
-inline bool InferStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
+inline bool InferStorageType(const nnvm::NodeAttrs& attrs,
+                             const int dev_mask,
                              DispatchMode* dispatch_mode,
-                             std::vector<int>* iattr, std::vector<int>* oattr) {
+                             std::vector<int>* iattr,
+                             std::vector<int>* oattr) {
   using namespace op;
 
   for (size_t i = 0; i < iattr->size(); ++i) {
@@ -133,71 +143,70 @@ inline bool InferStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
 }
 
 NNVM_REGISTER_OP(_CustomFunction)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
-    return params.num_args;
-  })
-.set_num_outputs([](const NodeAttrs& attrs) {
-    const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
-    return params.num_outs;
-  })
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const NodeAttrs& attrs, mxnet::ShapeVector *in_shape,
-     mxnet::ShapeVector *out_shape) {
-    const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
-    *out_shape = params.out_shapes;
-    return true;
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const NodeAttrs& attrs, std::vector<int> *in_type,
-     std::vector<int> *out_type) {
-    const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
-    *out_type = params.out_dtypes;
-    return true;
-  })
-.set_attr<FCreateOpState>("FCreateOpState", CreateState)
-.set_attr<nnvm::FGradient>("FGradient", Gradient)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", Forward)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", Forward)
-.set_attr<FInferStorageType>("FInferStorageType", InferStorageType);
-
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
+      return params.num_outs;
+    })
+    .set_attr<mxnet::FInferShape>(
+        "FInferShape",
+        [](const NodeAttrs& attrs, mxnet::ShapeVector* in_shape, mxnet::ShapeVector* out_shape) {
+          const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
+          *out_shape                        = params.out_shapes;
+          return true;
+        })
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const NodeAttrs& attrs, std::vector<int>* in_type, std::vector<int>* out_type) {
+          const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
+          *out_type                         = params.out_dtypes;
+          return true;
+        })
+    .set_attr<FCreateOpState>("FCreateOpState", CreateState)
+    .set_attr<nnvm::FGradient>("FGradient", Gradient)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", Forward)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", Forward)
+    .set_attr<FInferStorageType>("FInferStorageType", InferStorageType);
 
 NNVM_REGISTER_OP(_backward_CustomFunction)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
-    return params.num_outs;
-  })
-.set_num_outputs([](const NodeAttrs& attrs) {
-    const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
-    return params.num_args;
-  })
-.set_attr<bool>("TIsBackward", true)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-    return ExecType::kAsync;
-  })
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", Backward)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", Backward)
-.set_attr<FInferStorageType>("FInferStorageType", InferStorageType);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
+      return params.num_outs;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CustomFunctionParam& params = nnvm::get<CustomFunctionParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr<bool>("TIsBackward", true)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) { return ExecType::kAsync; })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", Backward)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", Backward)
+    .set_attr<FInferStorageType>("FInferStorageType", InferStorageType);
 
 }  // namespace custom_function
 }  // namespace mxnet
 
-int MXCustomFunctionRecord(int num_inputs, NDArrayHandle *inputs,
-                           int num_outputs, NDArrayHandle *outputs,
-                           MXCallbackList *callbacks) {
+int MXCustomFunctionRecord(int num_inputs,
+                           NDArrayHandle* inputs,
+                           int num_outputs,
+                           NDArrayHandle* outputs,
+                           MXCallbackList* callbacks) {
   using namespace mxnet;
   using namespace mxnet::custom_function;
   API_BEGIN();
   CHECK(Imperative::Get()->is_recording());
-  auto state = OpStatePtr::Create<CustomFunctionParam>();
+  auto state                  = OpStatePtr::Create<CustomFunctionParam>();
   CustomFunctionParam& params = state.get_state<CustomFunctionParam>();
-  params.num_args = num_inputs;
-  params.num_outs = num_outputs;
-  params.info.reset(callbacks, [](MXCallbackList* ptr){
-      reinterpret_cast<CustomFunctionDelFunc>(ptr->callbacks[kCustomFunctionDelete])(
+  params.num_args             = num_inputs;
+  params.num_outs             = num_outputs;
+  params.info.reset(callbacks, [](MXCallbackList* ptr) {
+    reinterpret_cast<CustomFunctionDelFunc>(ptr->callbacks[kCustomFunctionDelete])(
         ptr->contexts[kCustomFunctionDelete]);
-    });
+  });
   std::vector<NDArray*> ndinputs, ndoutputs;
   ndinputs.reserve(num_inputs);
   ndoutputs.reserve(num_outputs);
@@ -213,10 +222,9 @@ int MXCustomFunctionRecord(int num_inputs, NDArrayHandle *inputs,
     params.out_dtypes.emplace_back(arr->dtype());
   }
   nnvm::NodeAttrs attrs;
-  attrs.op = nnvm::Op::Get("_CustomFunction");
+  attrs.op     = nnvm::Op::Get("_CustomFunction");
   attrs.parsed = params;
-  Imperative::Get()->RecordOp(
-      std::move(attrs), ndinputs, ndoutputs, state);
+  Imperative::Get()->RecordOp(std::move(attrs), ndinputs, ndoutputs, state);
 
   API_END();
 }
diff --git a/src/c_api/c_api_ndarray.cc b/src/c_api/c_api_ndarray.cc
index a03868ad594a..d967ae6e12b3 100644
--- a/src/c_api/c_api_ndarray.cc
+++ b/src/c_api/c_api_ndarray.cc
@@ -46,11 +46,11 @@ void SetNDInputsOutputs(const nnvm::Op* op,
                         std::vector<NDArray*>* ndinputs,
                         std::vector<NDArray*>* ndoutputs,
                         int num_inputs,
-                        const NDArrayHandle *inputs,
-                        int *num_outputs,
+                        const NDArrayHandle* inputs,
+                        int* num_outputs,
                         int infered_num_outputs,
                         int num_visible_outputs,
-                        NDArrayHandle **outputs) {
+                        NDArrayHandle** outputs) {
   NDArray** out_array = *reinterpret_cast<NDArray***>(outputs);
 
   ndinputs->clear();
@@ -59,9 +59,9 @@ void SetNDInputsOutputs(const nnvm::Op* op,
     NDArray* inp = reinterpret_cast<NDArray*>(inputs[i]);
     if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
       if (shape_is_known(inp->shape())) {  // Shape may be unknown after dynamic shape operators
-        CHECK_LT(inp->shape().Size(), (int64_t{1} << 31) - 1) <<
-          "[SetNDInputsOutputs] Size of tensor you are trying to allocate is larger than "
-          "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+        CHECK_LT(inp->shape().Size(), (int64_t{1} << 31) - 1)
+            << "[SetNDInputsOutputs] Size of tensor you are trying to allocate is larger than "
+               "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
       }
     }
     ndinputs->emplace_back(inp);
@@ -76,9 +76,8 @@ void SetNDInputsOutputs(const nnvm::Op* op,
     *num_outputs = num_visible_outputs;
   } else {
     CHECK(*num_outputs == infered_num_outputs || *num_outputs == num_visible_outputs)
-      << "Operator expects " << infered_num_outputs << " (all) or "
-      << num_visible_outputs << " (visible only) outputs, but got "
-      << *num_outputs << " instead.";
+        << "Operator expects " << infered_num_outputs << " (all) or " << num_visible_outputs
+        << " (visible only) outputs, but got " << *num_outputs << " instead.";
     for (int i = 0; i < *num_outputs; ++i) {
       ndoutputs->emplace_back(out_array[i]);
     }
@@ -90,17 +89,17 @@ void SetNDInputsOutputs(const nnvm::Op* op,
 
 void MXImperativeInvokeImpl(AtomicSymbolCreator creator,
                             int num_inputs,
-                            NDArrayHandle *inputs,
-                            int *num_outputs,
-                            NDArrayHandle **outputs,
+                            NDArrayHandle* inputs,
+                            int* num_outputs,
+                            NDArrayHandle** outputs,
                             int num_params,
-                            const char **param_keys,
-                            const char **param_vals) {
-  const nnvm::Op* op = static_cast<nnvm::Op*>(creator);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                            const char** param_keys,
+                            const char** param_vals) {
+  const nnvm::Op* op           = static_cast<nnvm::Op*>(creator);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
 
-  nnvm::NodeAttrs attrs = imperative::ParseAttrs(op, num_inputs, num_params,
-                                                 param_keys, param_vals);
+  nnvm::NodeAttrs attrs =
+      imperative::ParseAttrs(op, num_inputs, num_params, param_keys, param_vals);
   attrs.dict["__profiler_scope__"] = profiler::ProfilerScope::Get()->GetCurrentProfilerScope();
   if (attrs.op) {
     attrs.name = attrs.op->name;
@@ -111,8 +110,15 @@ void MXImperativeInvokeImpl(AtomicSymbolCreator creator,
   imperative::SetNumOutputs(op, attrs, num_inputs, &infered_num_outputs, &num_visible_outputs);
 
   std::vector<NDArray*> ndinputs, ndoutputs;
-  SetNDInputsOutputs(op, &ndinputs, &ndoutputs, num_inputs, inputs,
-      num_outputs, infered_num_outputs, num_visible_outputs, outputs);
+  SetNDInputsOutputs(op,
+                     &ndinputs,
+                     &ndoutputs,
+                     num_inputs,
+                     inputs,
+                     num_outputs,
+                     infered_num_outputs,
+                     num_visible_outputs,
+                     outputs);
 
   if (Imperative::Get()->is_deferred_compute()) {
     Imperative::Get()->RecordDeferredCompute(std::move(attrs), ndinputs, ndoutputs);
@@ -126,29 +132,31 @@ void MXImperativeInvokeImpl(AtomicSymbolCreator creator,
     }
   }
 
-  for (int i = *num_outputs; i < infered_num_outputs; ++i) delete ndoutputs[i];
+  for (int i = *num_outputs; i < infered_num_outputs; ++i)
+    delete ndoutputs[i];
 
   if (*outputs == nullptr) {
     ret->ret_handles.clear();
     ret->ret_handles.reserve(*num_outputs);
-    for (int i = 0; i < *num_outputs; ++i) ret->ret_handles.push_back(ndoutputs[i]);
+    for (int i = 0; i < *num_outputs; ++i)
+      ret->ret_handles.push_back(ndoutputs[i]);
     *outputs = reinterpret_cast<NDArrayHandle*>(dmlc::BeginPtr(ret->ret_handles));
   }
 }
 
 int MXImperativeInvoke(AtomicSymbolCreator creator,
                        int num_inputs,
-                       NDArrayHandle *inputs,
-                       int *num_outputs,
-                       NDArrayHandle **outputs,
+                       NDArrayHandle* inputs,
+                       int* num_outputs,
+                       NDArrayHandle** outputs,
                        int num_params,
-                       const char **param_keys,
-                       const char **param_vals,
-                       const int **out_stypes) {  // outputs storage types
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                       const char** param_keys,
+                       const char** param_vals,
+                       const int** out_stypes) {  // outputs storage types
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
-  MXImperativeInvokeImpl(creator, num_inputs, inputs, num_outputs, outputs,
-                         num_params, param_keys, param_vals);
+  MXImperativeInvokeImpl(
+      creator, num_inputs, inputs, num_outputs, outputs, num_params, param_keys, param_vals);
   if (out_stypes != nullptr) {
     NDArray** out_array = *reinterpret_cast<NDArray***>(outputs);
     ret->out_types.clear();
@@ -165,7 +173,7 @@ int MXCreateCachedOp(SymbolHandle handle,
                      int num_flags,
                      const char** keys,
                      const char** vals,
-                     CachedOpHandle *out,
+                     CachedOpHandle* out,
                      bool thread_safe) {
   nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(handle);
   API_BEGIN();
@@ -192,25 +200,24 @@ int MXFreeCachedOp(CachedOpHandle handle) {
 /*!
  * \brief get optimized graph from the cached op
  */
-int MXCachedOpGetOptimizedSymbol(CachedOpHandle handle,
-                                 SymbolHandle *out) {
+int MXCachedOpGetOptimizedSymbol(CachedOpHandle handle, SymbolHandle* out) {
   auto s = new nnvm::Symbol();
   API_BEGIN();
   CachedOpPtr op = *static_cast<CachedOpPtr*>(handle);
-  *s = op->GetOptimizedSymbol();
-  *out = s;
+  *s             = op->GetOptimizedSymbol();
+  *out           = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
 int MXInvokeCachedOp(CachedOpHandle handle,
                      int num_inputs,
-                     NDArrayHandle *inputs,
+                     NDArrayHandle* inputs,
                      int default_dev_type,
                      int default_dev_id,
-                     int *num_outputs,
-                     NDArrayHandle **outputs,
-                     const int **out_stypes) {  // outputs storage types
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                     int* num_outputs,
+                     NDArrayHandle** outputs,
+                     const int** out_stypes) {  // outputs storage types
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
 
   API_BEGIN();
   CachedOpPtr op_shared = *static_cast<CachedOpPtr*>(handle);
@@ -227,18 +234,17 @@ int MXInvokeCachedOp(CachedOpHandle handle,
   ndoutputs.reserve(op->num_outputs());
   if (*outputs == nullptr) {
     *num_outputs = op->num_outputs();
-    for (int i = 0; i < *num_outputs; ++i) ndoutputs.push_back(new NDArray());
+    for (int i = 0; i < *num_outputs; ++i)
+      ndoutputs.push_back(new NDArray());
   } else {
-    CHECK_EQ(*num_outputs, op->num_outputs())
-        << "CachedOp expects " << op->num_outputs() << " outputs, but "
-        << *num_outputs << " was given.";
+    CHECK_EQ(*num_outputs, op->num_outputs()) << "CachedOp expects " << op->num_outputs()
+                                              << " outputs, but " << *num_outputs << " was given.";
     for (int i = 0; i < *num_outputs; ++i) {
       ndoutputs.push_back(reinterpret_cast<NDArray*>((*outputs)[i]));
     }
   }
   // construct default context
-  Context ctx = Context::Create(static_cast<Context::DeviceType>(default_dev_type),
-                                default_dev_id);
+  Context ctx = Context::Create(static_cast<Context::DeviceType>(default_dev_type), default_dev_id);
   op->Forward(op_shared, ndinputs, ndoutputs, ctx);
 
   if (*outputs == nullptr) {
@@ -311,9 +317,9 @@ int MXSetIsNumpyDefaultDtype(bool default_dtype, bool* prev) {
 }
 
 int MXAutogradMarkVariables(uint32_t num_var,
-                            NDArrayHandle *var_handles,
-                            uint32_t *reqs_array,
-                            NDArrayHandle *grad_handles) {
+                            NDArrayHandle* var_handles,
+                            uint32_t* reqs_array,
+                            NDArrayHandle* grad_handles) {
   API_BEGIN();
   std::vector<NDArray*> variables, gradients;
   std::vector<uint32_t> grad_reqs;
@@ -329,31 +335,37 @@ int MXAutogradMarkVariables(uint32_t num_var,
   API_END();
 }
 
-int MXAutogradComputeGradient(uint32_t num_output,
-                              NDArrayHandle *output_handles) {
+int MXAutogradComputeGradient(uint32_t num_output, NDArrayHandle* output_handles) {
   return MXAutogradBackward(num_output, output_handles, nullptr, 0);
 }
 
 int MXAutogradBackward(uint32_t num_output,
-                       NDArrayHandle *output_handles,
-                       NDArrayHandle *ograd_handles,
+                       NDArrayHandle* output_handles,
+                       NDArrayHandle* ograd_handles,
                        int retain_graph) {
-  return MXAutogradBackwardEx(num_output, output_handles, ograd_handles,
-                              0, nullptr, retain_graph, false, true,
-                              nullptr, nullptr);
+  return MXAutogradBackwardEx(num_output,
+                              output_handles,
+                              ograd_handles,
+                              0,
+                              nullptr,
+                              retain_graph,
+                              false,
+                              true,
+                              nullptr,
+                              nullptr);
 }
 
 int MXAutogradBackwardEx(uint32_t num_output,
-                         NDArrayHandle *output_handles,
-                         NDArrayHandle *ograd_handles,
+                         NDArrayHandle* output_handles,
+                         NDArrayHandle* ograd_handles,
                          uint32_t num_variables,
-                         NDArrayHandle *var_handles,
+                         NDArrayHandle* var_handles,
                          int retain_graph,
                          int create_graph,
                          int is_train,
-                         NDArrayHandle **grad_handles,
-                         int **grad_stypes) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                         NDArrayHandle** grad_handles,
+                         int** grad_stypes) {
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
 
   std::vector<NDArray*> outputs, ograds, variables;
@@ -376,8 +388,8 @@ int MXAutogradBackwardEx(uint32_t num_output,
     variables.emplace_back(reinterpret_cast<NDArray*>(var_handles[i]));
   }
 
-  auto grads = Imperative::Get()->Backward(outputs, ograds, variables, is_train,
-                                                  retain_graph, create_graph);
+  auto grads =
+      Imperative::Get()->Backward(outputs, ograds, variables, is_train, retain_graph, create_graph);
   if (num_variables != 0) {
     ret->ret_handles.clear();
     ret->out_types.clear();
@@ -388,16 +400,16 @@ int MXAutogradBackwardEx(uint32_t num_output,
       ret->out_types.push_back(i->storage_type());
     }
     *grad_handles = dmlc::BeginPtr(ret->ret_handles);
-    *grad_stypes = dmlc::BeginPtr(ret->out_types);
+    *grad_stypes  = dmlc::BeginPtr(ret->out_types);
   }
   API_END();
 }
 
-int MXAutogradGetSymbol(NDArrayHandle handle, SymbolHandle *out) {
+int MXAutogradGetSymbol(NDArrayHandle handle, SymbolHandle* out) {
   API_BEGIN();
-  NDArray *head = reinterpret_cast<NDArray*>(handle);
-  auto sym = new nnvm::Symbol(head->get_autograd_symbol());
-  *out = reinterpret_cast<SymbolHandle>(sym);
+  NDArray* head = reinterpret_cast<NDArray*>(handle);
+  auto sym      = new nnvm::Symbol(head->get_autograd_symbol());
+  *out          = reinterpret_cast<SymbolHandle>(sym);
   API_END();
 }
 
@@ -406,57 +418,57 @@ int MXCachedOpRegisterOpHook(CachedOpHandle handle,
                              bool monitor_all) {
   API_BEGIN();
   CachedOpMonitorCallback callback_temp = nullptr;
-  std::function<void(const char *, const char *, void*)> clbk;
+  std::function<void(const char*, const char*, void*)> clbk;
   if (callback) {
     callback_temp = callback;
-    clbk = [callback_temp](const char *name, const char *opr_name,
-                           void *handle) {
+    clbk          = [callback_temp](const char* name, const char* opr_name, void* handle) {
       callback_temp(name, opr_name, handle);
     };
   } else {
-      clbk = nullptr;
+    clbk = nullptr;
   }
-  CachedOpPtr op = *static_cast<CachedOpPtr *>(handle);
+  CachedOpPtr op = *static_cast<CachedOpPtr*>(handle);
   op->RegisterOpHook(clbk, monitor_all);
   API_END();
 }
 
-int MXNDArrayIsDeferredCompute(int *curr) {
+int MXNDArrayIsDeferredCompute(int* curr) {
   API_BEGIN();
   *curr = Imperative::Get()->is_deferred_compute();
   API_END();
 }
 
-int MXNDArraySetIsDeferredCompute(int deferred_compute, int *prev) {
+int MXNDArraySetIsDeferredCompute(int deferred_compute, int* prev) {
   API_BEGIN();
   *prev = Imperative::Get()->set_is_deferred_compute(static_cast<bool>(deferred_compute));
   API_END();
 }
 
-int MXNDArraySetDeferredComputeVariable(NDArrayHandle *arrays, SymbolHandle *variables, int num) {
+int MXNDArraySetDeferredComputeVariable(NDArrayHandle* arrays, SymbolHandle* variables, int num) {
   API_BEGIN();
   Imperative::Get()->SetDeferredComputeVariable(arrays, variables, num);
   API_END();
 }
 
-int MXNDArrayClearDeferredCompute(NDArrayHandle *arrays, int num) {
+int MXNDArrayClearDeferredCompute(NDArrayHandle* arrays, int num) {
   API_BEGIN();
   Imperative::Get()->DeferredComputeClear(arrays, num);
   API_END();
 }
 
-int MXNDArrayGetDeferredComputeSymbol(NDArrayHandle *output_handles, int num_outputs,
-                                      SymbolHandle *out) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXNDArrayGetDeferredComputeSymbol(NDArrayHandle* output_handles,
+                                      int num_outputs,
+                                      SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  std::vector<NDArray *> outputs;
+  std::vector<NDArray*> outputs;
   outputs.reserve(num_outputs);
   for (int i = 0; i < num_outputs; ++i) {
-    NDArray *array = reinterpret_cast<NDArray *>(output_handles[i]);
+    NDArray* array = reinterpret_cast<NDArray*>(output_handles[i]);
     outputs.emplace_back(array);
   }
   // Obtain Symbol
-  *s = Imperative::Get()->GetDeferredComputeSymbol(outputs);
+  *s   = Imperative::Get()->GetDeferredComputeSymbol(outputs);
   *out = s;
   API_END_HANDLE_ERROR(delete s;);
 }
diff --git a/src/c_api/c_api_profile.cc b/src/c_api/c_api_profile.cc
index d7768e199a64..c5f719c0b618 100644
--- a/src/c_api/c_api_profile.cc
+++ b/src/c_api/c_api_profile.cc
@@ -39,13 +39,12 @@ namespace mxnet {
 
 static profiler::ProfileDomain api_domain("MXNET_C_API");
 static profiler::ProfileCounter api_call_counter("MXNet C API Calls", &api_domain);
-static profiler::ProfileCounter api_concurrency_counter("MXNet C API Concurrency",
-                                                        &api_domain);
+static profiler::ProfileCounter api_concurrency_counter("MXNet C API Concurrency", &api_domain);
 
 /*! \brief Per-API-call timing data */
 struct APICallTimingData {
-  const char *name_;
-  profiler::ProfileTask *task_;
+  const char* name_;
+  profiler::ProfileTask* task_;
 };
 
 /*!
@@ -64,12 +63,14 @@ class ProfilingThreadData {
    * \param domain Domain of the task
    * \return Pointer to the stored or created ProfileTask object
    */
-  profiler::ProfileTask *profile_task(const char *name, profiler::ProfileDomain *domain) {
+  profiler::ProfileTask* profile_task(const char* name, profiler::ProfileDomain* domain) {
     // Per-thread so no lock necessary
     auto iter = tasks_.find(name);
     if (iter == tasks_.end()) {
-      iter = tasks_.emplace(std::make_pair(
-        name, std::make_unique<profiler::ProfileTask>(name, domain))).first;
+      iter =
+          tasks_
+              .emplace(std::make_pair(name, std::make_unique<profiler::ProfileTask>(name, domain)))
+              .first;
     }
     return iter->second.get();
   }
@@ -90,15 +91,13 @@ static thread_local ProfilingThreadData thread_profiling_data;
 static MX_THREAD_LOCAL ProfilingThreadData thread_profiling_data;
 #endif
 
-extern void on_enter_api(const char *function) {
+extern void on_enter_api(const char* function) {
   if (profiler::Profiler::Get()->IsProfiling(profiler::Profiler::kAPI)) {
     if (!thread_profiling_data.ignore_call_) {
       ++api_call_counter;
       ++api_concurrency_counter;
-      APICallTimingData data = {
-        function
-        , thread_profiling_data.profile_task(function, &api_domain)
-      };
+      APICallTimingData data = {function,
+                                thread_profiling_data.profile_task(function, &api_domain)};
       thread_profiling_data.calls_.push(data);
       data.task_->start();
     }
@@ -120,7 +119,7 @@ extern void on_exit_api() {
  * \brief Don't profile calls in this scope using RAII
  */
 struct IgnoreProfileCallScope {
-  IgnoreProfileCallScope()  {
+  IgnoreProfileCallScope() {
     DCHECK_EQ(thread_profiling_data.ignore_call_, false);
     thread_profiling_data.ignore_call_ = true;
   }
@@ -149,24 +148,19 @@ struct PythonProfileObjects {
   std::mutex cs_frames_;
   std::mutex cs_events_;
   std::list<std::shared_ptr<profiler::ProfileDomain>> domains_;
-  std::unordered_map<profiler::ProfileCounter *, std::shared_ptr<profiler::ProfileCounter>>
-    counters_;
-  std::unordered_map<profiler::ProfileDuration *, std::shared_ptr<profiler::ProfileDuration>>
-    tasks_;
-  std::unordered_map<profiler::ProfileDuration *, std::shared_ptr<profiler::ProfileDuration>>
-    frames_;
-  std::unordered_map<profiler::ProfileDuration *, std::shared_ptr<profiler::ProfileDuration>>
-    events_;
+  std::unordered_map<profiler::ProfileCounter*, std::shared_ptr<profiler::ProfileCounter>>
+      counters_;
+  std::unordered_map<profiler::ProfileDuration*, std::shared_ptr<profiler::ProfileDuration>> tasks_;
+  std::unordered_map<profiler::ProfileDuration*, std::shared_ptr<profiler::ProfileDuration>>
+      frames_;
+  std::unordered_map<profiler::ProfileDuration*, std::shared_ptr<profiler::ProfileDuration>>
+      events_;
 };
 static PythonProfileObjects python_profile_objects;
 
-enum class ProfileProcess {
-  kWorker, kServer
-};
+enum class ProfileProcess { kWorker, kServer };
 
-enum class PrintFormat {
-  table, json
-};
+enum class PrintFormat { table, json };
 
 struct ProfileConfigParam : public dmlc::Parameter<ProfileConfigParam> {
   bool profile_all;
@@ -181,38 +175,48 @@ struct ProfileConfigParam : public dmlc::Parameter<ProfileConfigParam> {
   bool aggregate_stats;
   int profile_process;
   DMLC_DECLARE_PARAMETER(ProfileConfigParam) {
-    DMLC_DECLARE_FIELD(profile_all).set_default(false)
-      .describe("Profile all. Default is False.");
-    DMLC_DECLARE_FIELD(profile_symbolic).set_default(true)
-      .describe("Profile symbolic operators.  Default is True.");
-    DMLC_DECLARE_FIELD(profile_imperative).set_default(true)
-      .describe("Profile imperative operators.  Default is True.");
-    DMLC_DECLARE_FIELD(profile_memory).set_default(true)
-      .describe("Profile memory.  Default is True.");
-    DMLC_DECLARE_FIELD(profile_api).set_default(true)
-      .describe("Profile C API.  Default is True.");
-    DMLC_DECLARE_FIELD(filename).set_default("profile.json")
-      .describe("File name to write profiling info.");
+    DMLC_DECLARE_FIELD(profile_all).set_default(false).describe("Profile all. Default is False.");
+    DMLC_DECLARE_FIELD(profile_symbolic)
+        .set_default(true)
+        .describe("Profile symbolic operators.  Default is True.");
+    DMLC_DECLARE_FIELD(profile_imperative)
+        .set_default(true)
+        .describe("Profile imperative operators.  Default is True.");
+    DMLC_DECLARE_FIELD(profile_memory)
+        .set_default(true)
+        .describe("Profile memory.  Default is True.");
+    DMLC_DECLARE_FIELD(profile_api).set_default(true).describe("Profile C API.  Default is True.");
+    DMLC_DECLARE_FIELD(filename)
+        .set_default("profile.json")
+        .describe("File name to write profiling info.");
 #if MXNET_USE_CUDA
-    DMLC_DECLARE_FIELD(gpu_memory_profile_filename_prefix).set_default("gpu_memory_profile")
-      .describe("File name prefix to write GPU memory profile info.");
+    DMLC_DECLARE_FIELD(gpu_memory_profile_filename_prefix)
+        .set_default("gpu_memory_profile")
+        .describe("File name prefix to write GPU memory profile info.");
 #endif  // MXNET_USE_CUDA
-    DMLC_DECLARE_FIELD(continuous_dump).set_default(true)
-      .describe("Periodically dump (and append) profiling data to file while running. "
-                "Default is True.");
-    DMLC_DECLARE_FIELD(dump_period).set_default(1.0f)
-      .describe("When continuous dump is enabled, the period between subsequent "
-                  "profile info dumping.");
-    DMLC_DECLARE_FIELD(aggregate_stats).set_default(false)
-      .describe("Maintain aggregate stats, required for MXDumpAggregateStats.  Note that "
-      "this can have a negative performance impact. Default is False.");
+    DMLC_DECLARE_FIELD(continuous_dump)
+        .set_default(true)
+        .describe(
+            "Periodically dump (and append) profiling data to file while running. "
+            "Default is True.");
+    DMLC_DECLARE_FIELD(dump_period)
+        .set_default(1.0f)
+        .describe(
+            "When continuous dump is enabled, the period between subsequent "
+            "profile info dumping.");
+    DMLC_DECLARE_FIELD(aggregate_stats)
+        .set_default(false)
+        .describe(
+            "Maintain aggregate stats, required for MXDumpAggregateStats.  Note that "
+            "this can have a negative performance impact. Default is False.");
     DMLC_DECLARE_FIELD(profile_process)
-      .add_enum("worker", static_cast<int>(ProfileProcess::kWorker))
-      .add_enum("server", static_cast<int>(ProfileProcess::kServer))
-      .set_default(static_cast<int>(ProfileProcess::kWorker))
-      .describe("Specifies which process to profile: "
-                "worker: this is default. for single node training it should always be worker."
-                "server: for distributed training, this profiles server process");
+        .add_enum("worker", static_cast<int>(ProfileProcess::kWorker))
+        .add_enum("server", static_cast<int>(ProfileProcess::kServer))
+        .set_default(static_cast<int>(ProfileProcess::kWorker))
+        .describe(
+            "Specifies which process to profile: "
+            "worker: this is default. for single node training it should always be worker."
+            "server: for distributed training, this profiles server process");
   }
 };
 
@@ -221,59 +225,70 @@ DMLC_REGISTER_PARAMETER(ProfileConfigParam);
 struct ProfileMarkerScopeParam : public dmlc::Parameter<ProfileMarkerScopeParam> {
   int scope;
   DMLC_DECLARE_PARAMETER(ProfileMarkerScopeParam) {
-    DMLC_DECLARE_FIELD(scope).set_default(profiler::ProfileMarker::kProcess)
-      .add_enum("global", profiler::ProfileMarker::kGlobal)
-      .add_enum("process", profiler::ProfileMarker::kProcess)
-      .add_enum("thread", profiler::ProfileMarker::kThread)
-      .add_enum("task", profiler::ProfileMarker::kTask)
-      .add_enum("marker", profiler::ProfileMarker::kMarker)
-      .describe("Profile Instant-Marker scope.");
+    DMLC_DECLARE_FIELD(scope)
+        .set_default(profiler::ProfileMarker::kProcess)
+        .add_enum("global", profiler::ProfileMarker::kGlobal)
+        .add_enum("process", profiler::ProfileMarker::kProcess)
+        .add_enum("thread", profiler::ProfileMarker::kThread)
+        .add_enum("task", profiler::ProfileMarker::kTask)
+        .add_enum("marker", profiler::ProfileMarker::kMarker)
+        .describe("Profile Instant-Marker scope.");
   }
 };
 
 DMLC_REGISTER_PARAMETER(ProfileMarkerScopeParam);
 
-int MXSetProcessProfilerConfig(int num_params, const char* const* keys, const char* const* vals,
+int MXSetProcessProfilerConfig(int num_params,
+                               const char* const* keys,
+                               const char* const* vals,
                                KVStoreHandle kvstoreHandle) {
-    mxnet::IgnoreProfileCallScope ignore;
+  mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    std::vector<std::pair<std::string, std::string>> kwargs;
-    kwargs.reserve(num_params);
+  std::vector<std::pair<std::string, std::string>> kwargs;
+  kwargs.reserve(num_params);
+  for (int i = 0; i < num_params; ++i) {
+    CHECK_NOTNULL(keys[i]);
+    CHECK_NOTNULL(vals[i]);
+    kwargs.emplace_back(std::make_pair(keys[i], vals[i]));
+  }
+  ProfileConfigParam param;
+  param.Init(kwargs);
+  if (static_cast<ProfileProcess>(param.profile_process) == ProfileProcess::kServer) {
+    std::ostringstream os;
     for (int i = 0; i < num_params; ++i) {
-      CHECK_NOTNULL(keys[i]);
-      CHECK_NOTNULL(vals[i]);
-      kwargs.emplace_back(std::make_pair(keys[i], vals[i]));
+      // this will be sent to the server now, those configs shouldn't have profile server again
+      if (strcmp(keys[i], "profile_process") == 0)
+        continue;
+      os << keys[i] << ":" << vals[i];
+      if (i != num_params - 1)
+        os << ",";
     }
-    ProfileConfigParam param;
-    param.Init(kwargs);
-    if (static_cast<ProfileProcess>(param.profile_process) == ProfileProcess::kServer) {
-      std::ostringstream os;
-      for (int i = 0; i < num_params; ++i) {
-        // this will be sent to the server now, those configs shouldn't have profile server again
-        if (strcmp(keys[i], "profile_process") == 0) continue;
-        os << keys[i] << ":" << vals[i];
-        if (i != num_params - 1) os << ",";
-      }
-      CHECK(kvstoreHandle) << "KVStoreHandle passed to profiler is null";
-      static_cast<KVStore*>(kvstoreHandle)->SetServerProfilerCommand(
-      mxnet::KVStoreServerProfilerCommand::kSetConfig, os.str());
-    } else {
-      int mode = 0;
-      if (param.profile_api || param.profile_all)        { mode |= profiler::Profiler::kAPI; }
-      if (param.profile_symbolic || param.profile_all)   { mode |= profiler::Profiler::kSymbolic; }
-      if (param.profile_imperative ||
-          param.profile_all) { mode |= profiler::Profiler::kImperative; }
-      if (param.profile_memory || param.profile_all)     { mode |= profiler::Profiler::kMemory; }
-      profiler::Profiler::Get()->SetConfig(profiler::Profiler::ProfilerMode(mode),
-                                           std::string(param.filename),
-                                           param.continuous_dump,
-                                           param.dump_period,
-                                           param.aggregate_stats);
+    CHECK(kvstoreHandle) << "KVStoreHandle passed to profiler is null";
+    static_cast<KVStore*>(kvstoreHandle)
+        ->SetServerProfilerCommand(mxnet::KVStoreServerProfilerCommand::kSetConfig, os.str());
+  } else {
+    int mode = 0;
+    if (param.profile_api || param.profile_all) {
+      mode |= profiler::Profiler::kAPI;
+    }
+    if (param.profile_symbolic || param.profile_all) {
+      mode |= profiler::Profiler::kSymbolic;
+    }
+    if (param.profile_imperative || param.profile_all) {
+      mode |= profiler::Profiler::kImperative;
+    }
+    if (param.profile_memory || param.profile_all) {
+      mode |= profiler::Profiler::kMemory;
+    }
+    profiler::Profiler::Get()->SetConfig(profiler::Profiler::ProfilerMode(mode),
+                                         std::string(param.filename),
+                                         param.continuous_dump,
+                                         param.dump_period,
+                                         param.aggregate_stats);
 #if MXNET_USE_CUDA
-      profiler::GpuDeviceStorageProfiler::Get()->SetConfig(
-          param.gpu_memory_profile_filename_prefix);
+    profiler::GpuDeviceStorageProfiler::Get()->SetConfig(param.gpu_memory_profile_filename_prefix);
 #endif  // MXNET_USE_CUDA
-    }
+  }
   API_END();
 }
 
@@ -281,30 +296,33 @@ int MXSetProfilerConfig(int num_params, const char* const* keys, const char* con
   return MXSetProcessProfilerConfig(num_params, keys, vals, nullptr);
 }
 
-int MXAggregateProfileStatsPrint(const char **out_str, int reset, int format, int sort_by,
+int MXAggregateProfileStatsPrint(const char** out_str,
+                                 int reset,
+                                 int format,
+                                 int sort_by,
                                  int ascending) {
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
-    CHECK_NOTNULL(out_str);
-    profiler::Profiler *profiler = profiler::Profiler::Get();
-    if (profiler->IsEnableOutput()) {
-      // Register stats up until now
-      profiler->DumpProfile(false);
-    }
-    std::shared_ptr<profiler::AggregateStats> stats = profiler->GetAggregateStats();
-    std::ostringstream os;
-    if (stats) {
-      if (static_cast<PrintFormat>(format) == PrintFormat::table)
-        stats->DumpTable(os, sort_by, ascending);
-      else if (static_cast<PrintFormat>(format) == PrintFormat::json)
-        stats->DumpJson(os, sort_by, ascending);
-      else
-        LOG(FATAL) << "Invalid value for parameter format";
-    }
-    if (reset != 0)
-      stats->clear();
-    ret->ret_str = os.str();
-    *out_str = (ret->ret_str).c_str();
+  CHECK_NOTNULL(out_str);
+  profiler::Profiler* profiler = profiler::Profiler::Get();
+  if (profiler->IsEnableOutput()) {
+    // Register stats up until now
+    profiler->DumpProfile(false);
+  }
+  std::shared_ptr<profiler::AggregateStats> stats = profiler->GetAggregateStats();
+  std::ostringstream os;
+  if (stats) {
+    if (static_cast<PrintFormat>(format) == PrintFormat::table)
+      stats->DumpTable(os, sort_by, ascending);
+    else if (static_cast<PrintFormat>(format) == PrintFormat::json)
+      stats->DumpJson(os, sort_by, ascending);
+    else
+      LOG(FATAL) << "Invalid value for parameter format";
+  }
+  if (reset != 0)
+    stats->clear();
+  ret->ret_str = os.str();
+  *out_str     = (ret->ret_str).c_str();
   API_END();
 }
 
@@ -317,13 +335,13 @@ int MXDumpProcessProfile(int finished, int profile_process, KVStoreHandle kvStor
   API_BEGIN();
   if (static_cast<ProfileProcess>(profile_process) == ProfileProcess::kServer) {
     CHECK(kvStoreHandle) << "Kvstore Handle passed to profiler is null";
-    static_cast<KVStore*>(kvStoreHandle)->SetServerProfilerCommand(
-      mxnet::KVStoreServerProfilerCommand::kDump,
-      std::to_string(finished));
+    static_cast<KVStore*>(kvStoreHandle)
+        ->SetServerProfilerCommand(mxnet::KVStoreServerProfilerCommand::kDump,
+                                   std::to_string(finished));
   } else {
-    profiler::Profiler *profiler = profiler::Profiler::Get();
+    profiler::Profiler* profiler = profiler::Profiler::Get();
     CHECK(profiler->IsEnableOutput())
-      << "Profiler hasn't been run. Config and start profiler first";
+        << "Profiler hasn't been run. Config and start profiler first";
     profiler->DumpProfile(finished != 0);
 #if MXNET_USE_CUDA
     profiler::GpuDeviceStorageProfiler::Get()->DumpProfile();
@@ -348,9 +366,9 @@ int MXSetProcessProfilerState(int state, int profile_process, KVStoreHandle kvSt
   API_BEGIN();
   if (static_cast<ProfileProcess>(profile_process) == ProfileProcess::kServer) {
     CHECK(kvStoreHandle) << "Kvstore Handle passed to profiler is null";
-    static_cast<KVStore*>(kvStoreHandle)->SetServerProfilerCommand(
-      mxnet::KVStoreServerProfilerCommand::kState,
-      std::to_string(state));
+    static_cast<KVStore*>(kvStoreHandle)
+        ->SetServerProfilerCommand(mxnet::KVStoreServerProfilerCommand::kState,
+                                   std::to_string(state));
   } else {
     switch (state) {
       case profiler::Profiler::kNotRunning:
@@ -365,134 +383,127 @@ int MXSetProcessProfilerState(int state, int profile_process, KVStoreHandle kvSt
   API_END();
 }
 
-int MXProfileCreateDomain(const char *domain, ProfileHandle *out) {
+int MXProfileCreateDomain(const char* domain, ProfileHandle* out) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    auto dom = std::make_shared<profiler::ProfileDomain>(domain);
-    {
-      std::unique_lock<std::mutex> lock(python_profile_objects.cs_domains_);
-      python_profile_objects.domains_.push_back(dom);
-    }
-    *out = dom.get();
+  auto dom = std::make_shared<profiler::ProfileDomain>(domain);
+  {
+    std::unique_lock<std::mutex> lock(python_profile_objects.cs_domains_);
+    python_profile_objects.domains_.push_back(dom);
+  }
+  *out = dom.get();
   API_END();
 }
 
-int MXProfileCreateTask(ProfileHandle domain,
-                        const char *task_name,
-                        ProfileHandle *out) {
+int MXProfileCreateTask(ProfileHandle domain, const char* task_name, ProfileHandle* out) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    auto ctr =
-      std::make_shared<profiler::ProfileTask>(task_name,
-                                                static_cast<profiler::ProfileDomain *>(domain));
-    {
-      std::unique_lock<std::mutex> lock(python_profile_objects.cs_tasks_);
-      python_profile_objects.tasks_.emplace(std::make_pair(ctr.get(), ctr));
-    }
-    *out = ctr.get();
+  auto ctr = std::make_shared<profiler::ProfileTask>(task_name,
+                                                     static_cast<profiler::ProfileDomain*>(domain));
+  {
+    std::unique_lock<std::mutex> lock(python_profile_objects.cs_tasks_);
+    python_profile_objects.tasks_.emplace(std::make_pair(ctr.get(), ctr));
+  }
+  *out = ctr.get();
   API_END();
 }
 
-int MXProfileCreateFrame(ProfileHandle domain,
-                         const char *frame_name,
-                         ProfileHandle *out) {
+int MXProfileCreateFrame(ProfileHandle domain, const char* frame_name, ProfileHandle* out) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    auto ctr =
-      std::make_shared<profiler::ProfileFrame>(frame_name,
-                                              static_cast<profiler::ProfileDomain *>(domain));
-    {
-      std::unique_lock<std::mutex> lock(python_profile_objects.cs_frames_);
-      python_profile_objects.frames_.emplace(std::make_pair(ctr.get(), ctr));
-    }
-    *out = ctr.get();
+  auto ctr = std::make_shared<profiler::ProfileFrame>(
+      frame_name, static_cast<profiler::ProfileDomain*>(domain));
+  {
+    std::unique_lock<std::mutex> lock(python_profile_objects.cs_frames_);
+    python_profile_objects.frames_.emplace(std::make_pair(ctr.get(), ctr));
+  }
+  *out = ctr.get();
   API_END();
 }
 
-int MXProfileCreateEvent(const char *event_name, ProfileHandle *out) {
+int MXProfileCreateEvent(const char* event_name, ProfileHandle* out) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    auto ctr =
-      std::make_shared<profiler::ProfileEvent>(event_name);
-    {
-      std::unique_lock<std::mutex> lock(python_profile_objects.cs_events_);
-      python_profile_objects.events_.emplace(std::make_pair(ctr.get(), ctr));
-    }
-    *out = ctr.get();
+  auto ctr = std::make_shared<profiler::ProfileEvent>(event_name);
+  {
+    std::unique_lock<std::mutex> lock(python_profile_objects.cs_events_);
+    python_profile_objects.events_.emplace(std::make_pair(ctr.get(), ctr));
+  }
+  *out = ctr.get();
   API_END();
 }
 
 int MXProfileDestroyHandle(ProfileHandle object_handle) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    CHECK_NE(object_handle, static_cast<ProfileHandle>(nullptr))
+  CHECK_NE(object_handle, static_cast<ProfileHandle>(nullptr))
       << "Invalid NULL handle passed to MXProfileDestroyHandle";
-    std::shared_ptr<profiler::ProfileObject> shared_object_ptr(nullptr);
-    {
-      auto object = static_cast<profiler::ProfileObject *>(object_handle);
-      switch (object->type()) {
-        case profiler::kTask: {
-          auto p = static_cast<profiler::ProfileDuration *>(object_handle);
-          std::unique_lock<std::mutex> lock(python_profile_objects.cs_tasks_);
-          auto iter = python_profile_objects.tasks_.find(p);
-          if (iter != python_profile_objects.tasks_.end()) {
-            shared_object_ptr = iter->second;
-            python_profile_objects.tasks_.erase(iter);
-          }
-          break;
+  std::shared_ptr<profiler::ProfileObject> shared_object_ptr(nullptr);
+  {
+    auto object = static_cast<profiler::ProfileObject*>(object_handle);
+    switch (object->type()) {
+      case profiler::kTask: {
+        auto p = static_cast<profiler::ProfileDuration*>(object_handle);
+        std::unique_lock<std::mutex> lock(python_profile_objects.cs_tasks_);
+        auto iter = python_profile_objects.tasks_.find(p);
+        if (iter != python_profile_objects.tasks_.end()) {
+          shared_object_ptr = iter->second;
+          python_profile_objects.tasks_.erase(iter);
         }
-        case profiler::kEvent: {
-          auto p = static_cast<profiler::ProfileDuration *>(object_handle);
-          std::unique_lock<std::mutex> lock(python_profile_objects.cs_events_);
-          auto iter = python_profile_objects.events_.find(p);
-          if (iter != python_profile_objects.events_.end()) {
-            shared_object_ptr = iter->second;
-            python_profile_objects.events_.erase(iter);
-          }
-          break;
+        break;
+      }
+      case profiler::kEvent: {
+        auto p = static_cast<profiler::ProfileDuration*>(object_handle);
+        std::unique_lock<std::mutex> lock(python_profile_objects.cs_events_);
+        auto iter = python_profile_objects.events_.find(p);
+        if (iter != python_profile_objects.events_.end()) {
+          shared_object_ptr = iter->second;
+          python_profile_objects.events_.erase(iter);
         }
-        case profiler::kFrame: {
-          auto p = static_cast<profiler::ProfileDuration *>(object_handle);
-          std::unique_lock<std::mutex> lock(python_profile_objects.cs_frames_);
-          auto iter = python_profile_objects.frames_.find(p);
-          if (iter != python_profile_objects.frames_.end()) {
-            shared_object_ptr = iter->second;
-            python_profile_objects.frames_.erase(iter);
-          }
-          break;
+        break;
+      }
+      case profiler::kFrame: {
+        auto p = static_cast<profiler::ProfileDuration*>(object_handle);
+        std::unique_lock<std::mutex> lock(python_profile_objects.cs_frames_);
+        auto iter = python_profile_objects.frames_.find(p);
+        if (iter != python_profile_objects.frames_.end()) {
+          shared_object_ptr = iter->second;
+          python_profile_objects.frames_.erase(iter);
         }
-        case profiler::kCounter: {
-          auto p = static_cast<profiler::ProfileCounter *>(object_handle);
-          std::unique_lock<std::mutex> lock(python_profile_objects.cs_counters_);
-          auto iter = python_profile_objects.counters_.find(p);
-          if (iter != python_profile_objects.counters_.end()) {
-            shared_object_ptr = iter->second;
-            python_profile_objects.counters_.erase(iter);
-          }
-          break;
+        break;
+      }
+      case profiler::kCounter: {
+        auto p = static_cast<profiler::ProfileCounter*>(object_handle);
+        std::unique_lock<std::mutex> lock(python_profile_objects.cs_counters_);
+        auto iter = python_profile_objects.counters_.find(p);
+        if (iter != python_profile_objects.counters_.end()) {
+          shared_object_ptr = iter->second;
+          python_profile_objects.counters_.erase(iter);
         }
-        case profiler::kDomain:
-          // Not destroyed
-          break;
+        break;
       }
+      case profiler::kDomain:
+        // Not destroyed
+        break;
     }
-    shared_object_ptr.reset();  // Destroy out of lock scope
+  }
+  shared_object_ptr.reset();  // Destroy out of lock scope
   API_END();
 }
 
 int MXProfileDurationStart(ProfileHandle duration_handle) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    CHECK_NOTNULL(duration_handle);
-    static_cast<profiler::ProfileDuration *>(duration_handle)->start();
+  CHECK_NOTNULL(duration_handle);
+  static_cast<profiler::ProfileDuration*>(duration_handle)->start();
   API_END();
 }
 
 int MXProfileDurationStop(ProfileHandle duration_handle) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    CHECK_NOTNULL(duration_handle);
-    static_cast<profiler::ProfileDuration *>(duration_handle)->stop();
+  CHECK_NOTNULL(duration_handle);
+  static_cast<profiler::ProfileDuration*>(duration_handle)->stop();
   API_END();
 }
 
@@ -505,9 +516,9 @@ int MXProcessProfilePause(int paused, int profile_process, KVStoreHandle kvStore
   API_BEGIN();
   if (static_cast<ProfileProcess>(profile_process) == ProfileProcess::kServer) {
     CHECK(kvStoreHandle) << "Kvstore Handle passed to profiler is null";
-    static_cast<KVStore*>(kvStoreHandle)->SetServerProfilerCommand(
-      mxnet::KVStoreServerProfilerCommand::kPause,
-      std::to_string(paused));
+    static_cast<KVStore*>(kvStoreHandle)
+        ->SetServerProfilerCommand(mxnet::KVStoreServerProfilerCommand::kPause,
+                                   std::to_string(paused));
   } else {
     if (paused) {
       profiler::vtune::vtune_pause();
@@ -520,48 +531,42 @@ int MXProcessProfilePause(int paused, int profile_process, KVStoreHandle kvStore
   API_END();
 }
 
-int MXProfileCreateCounter(ProfileHandle domain,
-                           const char *counter_name,
-                           ProfileHandle *out) {
+int MXProfileCreateCounter(ProfileHandle domain, const char* counter_name, ProfileHandle* out) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    auto ctr =
-      std::make_shared<profiler::ProfileCounter>(counter_name,
-                                                static_cast<profiler::ProfileDomain *>(domain));
-    {
-      std::unique_lock<std::mutex> lock(python_profile_objects.cs_counters_);
-      python_profile_objects.counters_.emplace(std::make_pair(ctr.get(), ctr));
-    }
-    *out = ctr.get();
+  auto ctr = std::make_shared<profiler::ProfileCounter>(
+      counter_name, static_cast<profiler::ProfileDomain*>(domain));
+  {
+    std::unique_lock<std::mutex> lock(python_profile_objects.cs_counters_);
+    python_profile_objects.counters_.emplace(std::make_pair(ctr.get(), ctr));
+  }
+  *out = ctr.get();
   API_END();
 }
 
 int MXProfileSetCounter(ProfileHandle counter_handle, uint64_t value) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    static_cast<profiler::ProfileCounter *>(counter_handle)->operator=(value);
+  static_cast<profiler::ProfileCounter*>(counter_handle)->operator=(value);
   API_END();
 }
 
 int MXProfileAdjustCounter(ProfileHandle counter_handle, int64_t by_value) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    static_cast<profiler::ProfileCounter *>(counter_handle)->operator+=(by_value);
+  static_cast<profiler::ProfileCounter*>(counter_handle)->operator+=(by_value);
   API_END();
 }
 
-int MXProfileSetMarker(ProfileHandle domain,
-                       const char *instant_marker_name,
-                       const char *scope) {
+int MXProfileSetMarker(ProfileHandle domain, const char* instant_marker_name, const char* scope) {
   mxnet::IgnoreProfileCallScope ignore;
   API_BEGIN();
-    ProfileMarkerScopeParam param;
-    std::vector<std::pair<std::string, std::string>> kwargs = {{ "scope", scope }};
-    param.Init(kwargs);
-    profiler::ProfileMarker marker(instant_marker_name,
-                                         static_cast<profiler::ProfileDomain *>(domain),
-                                         static_cast<profiler::ProfileMarker::MarkerScope>(
-                                           param.scope));
-    marker.mark();
+  ProfileMarkerScopeParam param;
+  std::vector<std::pair<std::string, std::string>> kwargs = {{"scope", scope}};
+  param.Init(kwargs);
+  profiler::ProfileMarker marker(instant_marker_name,
+                                 static_cast<profiler::ProfileDomain*>(domain),
+                                 static_cast<profiler::ProfileMarker::MarkerScope>(param.scope));
+  marker.mark();
   API_END();
 }
diff --git a/src/c_api/c_api_symbolic.cc b/src/c_api/c_api_symbolic.cc
index 8990e8ac6b29..69b46e436e5e 100644
--- a/src/c_api/c_api_symbolic.cc
+++ b/src/c_api/c_api_symbolic.cc
@@ -39,36 +39,27 @@ namespace mxnet {
 namespace op {
 void RegisterLegacyOpProp();
 void RegisterLegacyNDFunc();
-}
-const std::vector<std::string> kHiddenKeys = {
-  "ctx_group",
-  "lr_mult",
-  "wd_mult",
-  "force_mirroring",
-  "mirror_stage",
-  "profiler_scope"
-};
-const std::vector<std::string> kReplacedHiddenKeys = {
-  "__ctx_group__",
-  "__lr_mult__",
-  "__wd_mult__",
-  "__force_mirroring__",
-  "__mirror_stage__",
-  "__profiler_scope__"
-};
-const char *kNamespaceSeparator = "$";
-
+}  // namespace op
+const std::vector<std::string> kHiddenKeys =
+    {"ctx_group", "lr_mult", "wd_mult", "force_mirroring", "mirror_stage", "profiler_scope"};
+const std::vector<std::string> kReplacedHiddenKeys = {"__ctx_group__",
+                                                      "__lr_mult__",
+                                                      "__wd_mult__",
+                                                      "__force_mirroring__",
+                                                      "__mirror_stage__",
+                                                      "__profiler_scope__"};
+const char* kNamespaceSeparator                    = "$";
 
 DMLC_JSON_ENABLE_ANY(int, int);
 
 // convert nnvm symbol to a nnvm graph.
-nnvm::Graph Symbol2Graph(const nnvm::Symbol &s) {
+nnvm::Graph Symbol2Graph(const nnvm::Symbol& s) {
   nnvm::Graph g;
-  g.outputs = s.outputs;
+  g.outputs                = s.outputs;
   g.attrs["mxnet_version"] = std::make_shared<nnvm::any>(static_cast<int>(MXNET_VERSION));
   if (Imperative::Get()->is_np_shape()) {
-    g.attrs["is_np_shape"] = std::make_shared<nnvm::any>(
-        static_cast<int>(Imperative::Get()->is_np_shape()));
+    g.attrs["is_np_shape"] =
+        std::make_shared<nnvm::any>(static_cast<int>(Imperative::Get()->is_np_shape()));
   }
   return g;
 }
@@ -88,32 +79,30 @@ std::vector<uint32_t> ReadOnlyArgIndices(const nnvm::IndexedGraph& idx) {
 
 // symbolic configuration generation API.
 // Redirect to NNVM's C API
-int MXListAllOpNames(nn_uint *out_size,
-                     const char ***out_array) {
+int MXListAllOpNames(nn_uint* out_size, const char*** out_array) {
   mxnet::op::RegisterLegacyOpProp();
   mxnet::op::RegisterLegacyNDFunc();
   return NNListAllOpNames(out_size, out_array);
 }
 
-int MXSymbolListAtomicSymbolCreators(uint32_t *out_size,
-                                     AtomicSymbolCreator **out_array) {
+int MXSymbolListAtomicSymbolCreators(uint32_t* out_size, AtomicSymbolCreator** out_array) {
   mxnet::op::RegisterLegacyOpProp();
   mxnet::op::RegisterLegacyNDFunc();
   return NNListUniqueOps(out_size, out_array);
 }
 
 int MXSymbolGetAtomicSymbolInfo(AtomicSymbolCreator creator,
-                                const char **name,
-                                const char **description,
-                                uint32_t *num_args,
-                                const char ***arg_names,
-                                const char ***arg_type_infos,
-                                const char ***arg_descriptions,
-                                const char **key_var_num_args,
-                                const char **return_type) {
+                                const char** name,
+                                const char** description,
+                                uint32_t* num_args,
+                                const char*** arg_names,
+                                const char*** arg_type_infos,
+                                const char*** arg_descriptions,
+                                const char** key_var_num_args,
+                                const char** return_type) {
   static auto& map_key_var_args = nnvm::Op::GetAttr<std::string>("key_var_num_args");
-  const Op* op = static_cast<Op*>(creator);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  const Op* op                  = static_cast<Op*>(creator);
+  MXAPIThreadLocalEntry<>* ret  = MXAPIThreadLocalStore<>::Get();
   ret->ret_str.resize(0);
 
   if (map_key_var_args.count(op) != 0) {
@@ -121,24 +110,28 @@ int MXSymbolGetAtomicSymbolInfo(AtomicSymbolCreator creator,
   } else {
     *key_var_num_args = ret->ret_str.c_str();
   }
-  return NNGetOpInfo(
-      creator, name, description,
-      num_args, arg_names, arg_type_infos,
-      arg_descriptions, return_type);
+  return NNGetOpInfo(creator,
+                     name,
+                     description,
+                     num_args,
+                     arg_names,
+                     arg_type_infos,
+                     arg_descriptions,
+                     return_type);
 }
 
 int MXSymbolCreateAtomicSymbol(AtomicSymbolCreator creator,
                                uint32_t num_param,
-                               const char **keys,
-                               const char **vals,
-                               SymbolHandle *out) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+                               const char** keys,
+                               const char** vals,
+                               SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
   const nnvm::Op* op = static_cast<const nnvm::Op*>(creator);
   std::unordered_map<std::string, std::string> kwargs;
   for (nn_uint i = 0; i < num_param; ++i) {
     bool flag = false;
-    for (const auto &k : kHiddenKeys) {
+    for (const auto& k : kHiddenKeys) {
       std::string tmp(keys[i]);
       size_t pos = tmp.rfind(k);
       if (pos == 0) {
@@ -149,62 +142,55 @@ int MXSymbolCreateAtomicSymbol(AtomicSymbolCreator creator,
         std::ostringstream os;
         os << "setting variable attributes with " << keys[i] << " is deprecated. "
            << "please instead use\nw = Variable(" << k << "=" << vals[i] << ")\n"
-           << "sym = YourSymbolName(" << tmp.substr(0, pos-1) << "=w)";
+           << "sym = YourSymbolName(" << tmp.substr(0, pos - 1) << "=w)";
         throw dmlc::Error(os.str());
       }
     }
     if (!flag)
       kwargs.insert({std::string(keys[i]), std::string(vals[i])});
   }
-  *s = nnvm::Symbol::CreateFunctor(op, std::move(kwargs));
+  *s   = nnvm::Symbol::CreateFunctor(op, std::move(kwargs));
   *out = s;
   API_END_HANDLE_ERROR(delete s;);
 }
 
-int MXSymbolCreateVariable(const char *name, SymbolHandle *out) {
+int MXSymbolCreateVariable(const char* name, SymbolHandle* out) {
   return NNSymbolCreateVariable(name, out);
 }
 
-int MXSymbolCreateGroup(uint32_t num_symbols,
-                        SymbolHandle *symbols,
-                        SymbolHandle *out) {
+int MXSymbolCreateGroup(uint32_t num_symbols, SymbolHandle* symbols, SymbolHandle* out) {
   return NNSymbolCreateGroup(num_symbols, symbols, out);
 }
 
-int MXSymbolGetOutput(SymbolHandle symbol,
-                      uint32_t index,
-                      SymbolHandle *out) {
+int MXSymbolGetOutput(SymbolHandle symbol, uint32_t index, SymbolHandle* out) {
   return NNSymbolGetOutput(symbol, index, out);
 }
 
-int MXSymbolGetInputs(SymbolHandle symbol,
-                      SymbolHandle *out) {
-    nnvm::Symbol *s = new nnvm::Symbol();
-    API_BEGIN();
-    std::vector<nnvm::ObjectPtr> inputs = static_cast<nnvm::Symbol*>(symbol)->ListInputs(
-        nnvm::Symbol::ListInputOption(0));
-    for (const nnvm::ObjectPtr &o : inputs) {
-        nnvm::NodeEntry e(o);
-        s->outputs.push_back(e);
-    }
-    *out = s;
-    API_END_HANDLE_ERROR(delete s);
+int MXSymbolGetInputs(SymbolHandle symbol, SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
+  API_BEGIN();
+  std::vector<nnvm::ObjectPtr> inputs =
+      static_cast<nnvm::Symbol*>(symbol)->ListInputs(nnvm::Symbol::ListInputOption(0));
+  for (const nnvm::ObjectPtr& o : inputs) {
+    nnvm::NodeEntry e(o);
+    s->outputs.push_back(e);
+  }
+  *out = s;
+  API_END_HANDLE_ERROR(delete s);
 }
 
-int MXSymbolGetInternals(SymbolHandle symbol,
-                         SymbolHandle *out) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXSymbolGetInternals(SymbolHandle symbol, SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  *s = static_cast<nnvm::Symbol*>(symbol)->GetInternals();
+  *s   = static_cast<nnvm::Symbol*>(symbol)->GetInternals();
   *out = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
-int MXSymbolGetChildren(SymbolHandle symbol,
-                        SymbolHandle *out) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXSymbolGetChildren(SymbolHandle symbol, SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  *s = static_cast<nnvm::Symbol*>(symbol)->GetChildren();
+  *s   = static_cast<nnvm::Symbol*>(symbol)->GetChildren();
   *out = s;
   API_END_HANDLE_ERROR(delete s);
 }
@@ -213,37 +199,32 @@ int MXSymbolFree(SymbolHandle symbol) {
   return NNSymbolFree(symbol);
 }
 
-int MXSymbolCopy(SymbolHandle symbol, SymbolHandle *out) {
+int MXSymbolCopy(SymbolHandle symbol, SymbolHandle* out) {
   return NNSymbolCopy(symbol, out);
 }
 
-int MXSymbolPrint(SymbolHandle symbol, const char **out_str) {
+int MXSymbolPrint(SymbolHandle symbol, const char** out_str) {
   return NNSymbolPrint(symbol, out_str);
 }
 
-int MXSymbolGetName(SymbolHandle symbol,
-                    const char** out,
-                    int* success) {
+int MXSymbolGetName(SymbolHandle symbol, const char** out, int* success) {
   return NNSymbolGetAttr(symbol, "name", out, success);
 }
 
-int MXSymbolGetAttr(SymbolHandle symbol,
-                    const char* key,
-                    const char** out,
-                    int* success) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(symbol);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXSymbolGetAttr(SymbolHandle symbol, const char* key, const char** out, int* success) {
+  nnvm::Symbol* s              = static_cast<nnvm::Symbol*>(symbol);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   if (s->GetAttr(key, &(ret->ret_str))) {
-    *out = (ret->ret_str).c_str();
+    *out     = (ret->ret_str).c_str();
     *success = 1;
   } else {
-    *out = nullptr;
+    *out     = nullptr;
     *success = 0;
     if (std::find(kHiddenKeys.begin(), kHiddenKeys.end(), key) != kHiddenKeys.end()) {
       std::string skey = "__" + std::string(key) + "__";
       if (s->GetAttr(skey, &(ret->ret_str))) {
-        *out = (ret->ret_str).c_str();
+        *out     = (ret->ret_str).c_str();
         *success = 1;
       }
     }
@@ -251,14 +232,12 @@ int MXSymbolGetAttr(SymbolHandle symbol,
   API_END();
 }
 
-int MXSymbolSetAttr(SymbolHandle symbol,
-                    const char* key,
-                    const char* value) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(symbol);
+int MXSymbolSetAttr(SymbolHandle symbol, const char* key, const char* value) {
+  nnvm::Symbol* s = static_cast<nnvm::Symbol*>(symbol);
   API_BEGIN();
-  std::vector<std::pair<std::string, std::string> > kwargs;
+  std::vector<std::pair<std::string, std::string>> kwargs;
   std::string skey(key), sval(value);
-  for (const auto &k : kHiddenKeys) {
+  for (const auto& k : kHiddenKeys) {
     size_t pos = skey.rfind(k);
     if (pos == 0 && k.length() == skey.length()) {
       skey = "__" + skey + "__";
@@ -267,7 +246,7 @@ int MXSymbolSetAttr(SymbolHandle symbol,
       std::ostringstream os;
       os << "setting variable attributes with " << key << " is deprecated. "
          << "please instead use\nw = Variable(" << k << "=" << value << ")\n"
-         << "sym = YourSymbolName(" << skey.substr(0, pos-1) << "=w)";
+         << "sym = YourSymbolName(" << skey.substr(0, pos - 1) << "=w)";
       throw dmlc::Error(os.str());
     }
   }
@@ -276,28 +255,25 @@ int MXSymbolSetAttr(SymbolHandle symbol,
   API_END();
 }
 
-int MXSymbolListAttr(SymbolHandle symbol,
-                     uint32_t *out_size,
-                     const char*** out) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(symbol);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXSymbolListAttr(SymbolHandle symbol, uint32_t* out_size, const char*** out) {
+  nnvm::Symbol* s              = static_cast<nnvm::Symbol*>(symbol);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
-  std::vector<std::tuple<std::string, std::string, std::string> > attr =
-      s->ListAttrsRecursive();
+  std::vector<std::tuple<std::string, std::string, std::string>> attr = s->ListAttrsRecursive();
 
   std::vector<std::string>& attr_list = ret->ret_vec_str;
   attr_list.clear();
   for (const auto& tp : attr) {
     attr_list.emplace_back(std::get<0>(tp) + kNamespaceSeparator + std::get<1>(tp));
     attr_list.emplace_back(std::get<2>(tp));
-    if (find(kReplacedHiddenKeys.begin(), kReplacedHiddenKeys.end(), std::get<1>(tp))
-          != kReplacedHiddenKeys.end()) {
+    if (find(kReplacedHiddenKeys.begin(), kReplacedHiddenKeys.end(), std::get<1>(tp)) !=
+        kReplacedHiddenKeys.end()) {
       attr_list.push_back(std::get<0>(tp) + kNamespaceSeparator +
                           std::get<1>(tp).substr(2, std::get<1>(tp).length() - 4));
       attr_list.push_back(std::get<2>(tp));
     }
   }
-  *out_size = attr_list.size()/2;
+  *out_size = attr_list.size() / 2;
   ret->ret_vec_charp.clear();
   for (const auto& attr : attr_list) {
     ret->ret_vec_charp.push_back(attr.c_str());
@@ -306,11 +282,9 @@ int MXSymbolListAttr(SymbolHandle symbol,
   API_END();
 }
 
-int MXSymbolListAttrShallow(SymbolHandle symbol,
-                            uint32_t *out_size,
-                            const char*** out) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(symbol);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXSymbolListAttrShallow(SymbolHandle symbol, uint32_t* out_size, const char*** out) {
+  nnvm::Symbol* s              = static_cast<nnvm::Symbol*>(symbol);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   std::unordered_map<std::string, std::string> attr =
       s->ListAttrs(static_cast<nnvm::Symbol::ListAttrOption>(1));  // NOLINT(*)
@@ -320,34 +294,31 @@ int MXSymbolListAttrShallow(SymbolHandle symbol,
   for (const auto& kv : attr) {
     attr_list.push_back(kv.first);
     attr_list.push_back(kv.second);
-    if (find(kReplacedHiddenKeys.begin(), kReplacedHiddenKeys.end(), kv.first)
-          != kReplacedHiddenKeys.end()) {
+    if (find(kReplacedHiddenKeys.begin(), kReplacedHiddenKeys.end(), kv.first) !=
+        kReplacedHiddenKeys.end()) {
       attr_list.push_back(kv.first.substr(2, kv.first.length() - 4));
       attr_list.push_back(kv.second);
     }
   }
-  *out_size = attr_list.size()/2;
+  *out_size = attr_list.size() / 2;
   ret->ret_vec_charp.clear();
-  for (auto &attr : attr_list) {
+  for (auto& attr : attr_list) {
     ret->ret_vec_charp.push_back(attr.c_str());
   }
   *out = dmlc::BeginPtr(ret->ret_vec_charp);
   API_END();
 }
 
-int MXSymbolListOutputs(SymbolHandle symbol,
-                        uint32_t *out_size,
-                        const char ***out_str_array) {
+int MXSymbolListOutputs(SymbolHandle symbol, uint32_t* out_size, const char*** out_str_array) {
   return NNSymbolListOutputNames(symbol, out_size, out_str_array);
 }
 
-int MXSymbolGetNumOutputs(SymbolHandle symbol,
-                           uint32_t *output_count) {
+int MXSymbolGetNumOutputs(SymbolHandle symbol, uint32_t* output_count) {
   return NNSymbolGetNumOutputs(symbol, output_count);
 }
 
 int MXSymbolCompose(SymbolHandle sym,
-                    const char *name,
+                    const char* name,
                     uint32_t num_args,
                     const char** keys,
                     SymbolHandle* args) {
@@ -355,62 +326,59 @@ int MXSymbolCompose(SymbolHandle sym,
 }
 
 // adapter functions that re-implements the functions.
-int MXSymbolListArguments(SymbolHandle symbol,
-                          uint32_t *out_size,
-                          const char ***out_str_array) {
+int MXSymbolListArguments(SymbolHandle symbol, uint32_t* out_size, const char*** out_str_array) {
   return NNSymbolListInputNames(symbol, 1, out_size, out_str_array);
 }
 
 int MXSymbolListAuxiliaryStates(SymbolHandle symbol,
-                                uint32_t *out_size,
-                                const char ***out_str_array) {
+                                uint32_t* out_size,
+                                const char*** out_str_array) {
   return NNSymbolListInputNames(symbol, 2, out_size, out_str_array);
 }
 
-int MXSymbolGetAtomicSymbolName(AtomicSymbolCreator creator,
-                                const char **out) {
+int MXSymbolGetAtomicSymbolName(AtomicSymbolCreator creator, const char** out) {
   API_BEGIN();
-  Op *e = static_cast<Op *>(creator);
-  *out = e->name.c_str();
+  Op* e = static_cast<Op*>(creator);
+  *out  = e->name.c_str();
   API_END();
 }
 
 namespace mxnet {
 
-extern std::vector<nnvm::Symbol *> GetInputSymbols(const nnvm::Symbol &sym);
-extern bool CutGraphInputs(const std::vector<nnvm::NodeEntry *> &input_entries,
-                           bool skip_var, std::vector<nnvm::NodeEntry> *orig_entries);
+extern std::vector<nnvm::Symbol*> GetInputSymbols(const nnvm::Symbol& sym);
+extern bool CutGraphInputs(const std::vector<nnvm::NodeEntry*>& input_entries,
+                           bool skip_var,
+                           std::vector<nnvm::NodeEntry>* orig_entries);
 
-}
+}  // namespace mxnet
 
-int MXSymbolGetInputSymbols(SymbolHandle sym, SymbolHandle **input_arr, int *input_size) {
+int MXSymbolGetInputSymbols(SymbolHandle sym, SymbolHandle** input_arr, int* input_size) {
   API_BEGIN();
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(sym);
-  std::vector<nnvm::Symbol *> input_syms = mxnet::GetInputSymbols(*s);
-  *input_size = input_syms.size();
+  nnvm::Symbol* s                       = static_cast<nnvm::Symbol*>(sym);
+  std::vector<nnvm::Symbol*> input_syms = mxnet::GetInputSymbols(*s);
+  *input_size                           = input_syms.size();
 
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   ret->ret_handles.clear();
   ret->ret_handles.reserve(*input_size);
-  for (int i = 0; i < *input_size; ++i) ret->ret_handles.push_back(input_syms[i]);
+  for (int i = 0; i < *input_size; ++i)
+    ret->ret_handles.push_back(input_syms[i]);
   *input_arr = reinterpret_cast<SymbolHandle*>(dmlc::BeginPtr(ret->ret_handles));
   API_END_HANDLE_ERROR();
 }
 
-int MXSymbolCutSubgraph(SymbolHandle sym, SymbolHandle **input_symbols,
-                        int *input_size) {
+int MXSymbolCutSubgraph(SymbolHandle sym, SymbolHandle** input_symbols, int* input_size) {
   // Given a graph, we want to fetch the nodes that have been marked as part of
   // a subgraph.
   API_BEGIN();
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(sym);
+  nnvm::Symbol* s             = static_cast<nnvm::Symbol*>(sym);
   const std::string subg_attr = "__subgraph_name__";
-  auto out_node = s->outputs[0].node;
-  auto it = out_node->attrs.dict.find(subg_attr);
+  auto out_node               = s->outputs[0].node;
+  auto it                     = out_node->attrs.dict.find(subg_attr);
   if (it != out_node->attrs.dict.end()) {
-    const std::string &subg_name = it->second;
-    std::vector<nnvm::NodeEntry *> input_entries;
-    DFSVisit(s->outputs, [&subg_attr, &subg_name, &input_entries]
-             (nnvm::ObjectPtr n) {
+    const std::string& subg_name = it->second;
+    std::vector<nnvm::NodeEntry*> input_entries;
+    DFSVisit(s->outputs, [&subg_attr, &subg_name, &input_entries](nnvm::ObjectPtr n) {
       // If the node itself isn't in the subgraph, we ignore it.
       auto it = n->attrs.dict.find(subg_attr);
       if (it == n->attrs.dict.end() || it->second != subg_name)
@@ -419,7 +387,7 @@ int MXSymbolCutSubgraph(SymbolHandle sym, SymbolHandle **input_symbols,
       // We search for nodes whose node entries aren't in the subgraph.
       for (size_t j = 0; j < n->inputs.size(); j++) {
         auto in_node = n->inputs[j].node;
-        auto it = in_node->attrs.dict.find(subg_attr);
+        auto it      = in_node->attrs.dict.find(subg_attr);
         if (it == in_node->attrs.dict.end() || it->second != subg_name)
           input_entries.push_back(&n->inputs[j]);
       }
@@ -427,17 +395,18 @@ int MXSymbolCutSubgraph(SymbolHandle sym, SymbolHandle **input_symbols,
 
     std::vector<nnvm::NodeEntry> orig_entries;
     CutGraphInputs(input_entries, false, &orig_entries);
-    std::vector<nnvm::Symbol *> input_syms(orig_entries.size());
+    std::vector<nnvm::Symbol*> input_syms(orig_entries.size());
     for (size_t i = 0; i < input_syms.size(); i++) {
       input_syms[i] = new nnvm::Symbol();
       input_syms[i]->outputs.push_back(orig_entries[i]);
     }
     *input_size = input_syms.size();
 
-    MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+    MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
     ret->ret_handles.clear();
     ret->ret_handles.reserve(*input_size);
-    for (int i = 0; i < *input_size; ++i) ret->ret_handles.push_back(input_syms[i]);
+    for (int i = 0; i < *input_size; ++i)
+      ret->ret_handles.push_back(input_syms[i]);
     *input_symbols = reinterpret_cast<SymbolHandle*>(dmlc::BeginPtr(ret->ret_handles));
   } else {
     *input_size = 0;
@@ -446,15 +415,14 @@ int MXSymbolCutSubgraph(SymbolHandle sym, SymbolHandle **input_symbols,
   API_END_HANDLE_ERROR();
 }
 
-
 /*!
  * \brief Convert shape attr in graph nodes to comply with NumPy semantics for
  * legacy models (before 1.6.0) if global flag is_np_shape has been turned on,
  * i.e., use -1 to indicate unknown number of dimensions and unknown dimension sizes.
  */
 void ConvertShapeAttrToNumPyCompatible(nnvm::Graph* g) {
-  if (Imperative::Get()->is_np_shape()
-    && (!g->HasAttr("is_np_shape") || !g->GetAttr<int>("is_np_shape"))) {
+  if (Imperative::Get()->is_np_shape() &&
+      (!g->HasAttr("is_np_shape") || !g->GetAttr<int>("is_np_shape"))) {
     DFSVisit(g->outputs, [](nnvm::ObjectPtr n) {
       if (n->is_variable()) {
         auto it = n->attrs.dict.find("__shape__");
@@ -472,46 +440,46 @@ void ConvertShapeAttrToNumPyCompatible(nnvm::Graph* g) {
   }
 }
 
-int MXSymbolCreateFromFile(const char *fname, SymbolHandle *out) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXSymbolCreateFromFile(const char* fname, SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
   std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(fname, "r"));
   dmlc::istream is(fi.get());
   nnvm::Graph g;
   g.attrs["json"] = std::make_shared<nnvm::any>(
-    std::string(std::istreambuf_iterator<char>(is), std::istreambuf_iterator<char>()));
+      std::string(std::istreambuf_iterator<char>(is), std::istreambuf_iterator<char>()));
   g = nnvm::ApplyPass(g, "LoadLegacyJSON");
   ConvertShapeAttrToNumPyCompatible(&g);
   s->outputs = g.outputs;
-  *out = s;
+  *out       = s;
   is.set_stream(nullptr);
   API_END_HANDLE_ERROR(delete s);
 }
 
-int MXSymbolCreateFromJSON(const char *json, SymbolHandle *out) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXSymbolCreateFromJSON(const char* json, SymbolHandle* out) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
   nnvm::Graph g;
   g.attrs["json"] = std::make_shared<nnvm::any>(std::string(json));
-  g = nnvm::ApplyPass(g, "LoadLegacyJSON");
+  g               = nnvm::ApplyPass(g, "LoadLegacyJSON");
   ConvertShapeAttrToNumPyCompatible(&g);
   s->outputs = g.outputs;
-  *out = s;
+  *out       = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
 int MXSymbolRemoveAmpCast(SymbolHandle sym_handle, SymbolHandle* ret_sym_handle) {
   nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  nnvm::Symbol *source = static_cast<nnvm::Symbol*>(sym_handle);
-  *s = source->Copy();
-  s->outputs = nnvm::ApplyPass(Symbol2Graph(*s), "RemoveAmpCast").outputs;
-  *ret_sym_handle = s;
+  nnvm::Symbol* source = static_cast<nnvm::Symbol*>(sym_handle);
+  *s                   = source->Copy();
+  s->outputs           = nnvm::ApplyPass(Symbol2Graph(*s), "RemoveAmpCast").outputs;
+  *ret_sym_handle      = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
-int MXSymbolSaveToFile(SymbolHandle symbol, const char *fname) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(symbol);
+int MXSymbolSaveToFile(SymbolHandle symbol, const char* fname) {
+  nnvm::Symbol* s = static_cast<nnvm::Symbol*>(symbol);
   API_BEGIN();
   std::unique_ptr<dmlc::Stream> fo(dmlc::Stream::Create(fname, "w"));
   dmlc::ostream os(fo.get());
@@ -521,29 +489,28 @@ int MXSymbolSaveToFile(SymbolHandle symbol, const char *fname) {
   API_END();
 }
 
-int MXSymbolSaveToJSON(SymbolHandle symbol, const char **out_json) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(symbol);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+int MXSymbolSaveToJSON(SymbolHandle symbol, const char** out_json) {
+  nnvm::Symbol* s              = static_cast<nnvm::Symbol*>(symbol);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   ret->ret_str = nnvm::pass::SaveJSON(Symbol2Graph(*s));
-  *out_json = ret->ret_str.c_str();
+  *out_json    = ret->ret_str.c_str();
   API_END();
 }
 
 namespace mxnet {
 
-template<typename AttrType>
-void MatchArguments(
-    const nnvm::IndexedGraph& idx,
-    const std::unordered_map<std::string, AttrType>& known_arg_attrs,
-    std::vector<AttrType>* arg_attrs,
-    const char* source) {
+template <typename AttrType>
+void MatchArguments(const nnvm::IndexedGraph& idx,
+                    const std::unordered_map<std::string, AttrType>& known_arg_attrs,
+                    std::vector<AttrType>* arg_attrs,
+                    const char* source) {
   auto& arg_nodes = idx.input_nodes();
   CHECK_EQ(arg_attrs->size(), arg_nodes.size());
   size_t nmatched = 0;
   for (size_t i = 0; i < arg_nodes.size(); ++i) {
     const std::string& name = idx[arg_nodes[i]].source->attrs.name;
-    auto it = known_arg_attrs.find(name);
+    auto it                 = known_arg_attrs.find(name);
     if (it != known_arg_attrs.end()) {
       arg_attrs->at(i) = it->second;
       ++nmatched;
@@ -561,9 +528,7 @@ void MatchArguments(
     for (const auto& kv : known_arg_attrs) {
       const std::string& key = kv.first;
       if (keys.count(key) == 0) {
-        LOG(FATAL) << source
-                   << "Keyword argument name " << key << " not found."
-                   << msg.str();
+        LOG(FATAL) << source << "Keyword argument name " << key << " not found." << msg.str();
       }
     }
   }
@@ -571,7 +536,7 @@ void MatchArguments(
 
 }  // namespace mxnet
 
-template<typename dtype, typename stype, typename itype>
+template <typename dtype, typename stype, typename itype>
 inline void SymbolInferShape(const char** keys,
                              uint32_t num_args,
                              const dtype* arg_shape_data,
@@ -591,7 +556,7 @@ inline void SymbolInferShape(const char** keys,
   nnvm::Graph g = Symbol2Graph(*s);
   mxnet::ShapeVector arg_shapes(g.indexed_graph().input_nodes().size(), mxnet::TShape());
   if (keys == nullptr && num_args != 0) {
-    std::vector < uint32_t > read_only_args = mxnet::ReadOnlyArgIndices(g.indexed_graph());
+    std::vector<uint32_t> read_only_args = mxnet::ReadOnlyArgIndices(g.indexed_graph());
     CHECK_LE(num_args, read_only_args.size());
     for (uint32_t i = 0; i < num_args; ++i) {
       arg_shapes[read_only_args[i]] = mxnet::ShapeTypeCast(arg_shape_data + arg_ind_ptr[i],
@@ -630,9 +595,9 @@ inline void SymbolInferShape(const char** keys,
                                                                   &(ret->aux_shape_ndim_ex),
                                                                   &(ret->aux_shape_data_ex),
                                                                   &(ret->aux_shape_buffer_ex));
-  *in_shape_size = static_cast<stype>(ret->arg_shapes.size());
-  *in_shape_ndim = dmlc::BeginPtr(ret->arg_shape_ndim_ex);
-  *in_shape_data = dmlc::BeginPtr(ret->arg_shape_data_ex);
+  *in_shape_size  = static_cast<stype>(ret->arg_shapes.size());
+  *in_shape_ndim  = dmlc::BeginPtr(ret->arg_shape_ndim_ex);
+  *in_shape_data  = dmlc::BeginPtr(ret->arg_shape_data_ex);
   *out_shape_size = static_cast<stype>(ret->out_shapes.size());
   *out_shape_ndim = dmlc::BeginPtr(ret->out_shape_ndim_ex);
   *out_shape_data = dmlc::BeginPtr(ret->out_shape_data_ex);
@@ -667,37 +632,37 @@ inline void SymbolInferShape(const char** keys,
 int MXSymbolInferShape(SymbolHandle sym,
                        uint32_t num_args,
                        const char** keys,
-                       const uint32_t *arg_ind_ptr,
-                       const int *arg_shape_data,
-                       uint32_t *in_shape_size,
-                       const int **in_shape_ndim,
-                       const int ***in_shape_data,
-                       uint32_t *out_shape_size,
-                       const int **out_shape_ndim,
-                       const int ***out_shape_data,
-                       uint32_t *aux_shape_size,
-                       const int **aux_shape_ndim,
-                       const int ***aux_shape_data,
-                       int *complete) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(sym);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                       const uint32_t* arg_ind_ptr,
+                       const int* arg_shape_data,
+                       uint32_t* in_shape_size,
+                       const int** in_shape_ndim,
+                       const int*** in_shape_data,
+                       uint32_t* out_shape_size,
+                       const int** out_shape_ndim,
+                       const int*** out_shape_data,
+                       uint32_t* aux_shape_size,
+                       const int** aux_shape_ndim,
+                       const int*** aux_shape_data,
+                       int* complete) {
+  nnvm::Symbol* s              = static_cast<nnvm::Symbol*>(sym);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   SymbolInferShape<int, uint32_t, uint32_t>(keys,
-                                              num_args,
-                                              arg_shape_data,
-                                              arg_ind_ptr,
-                                              in_shape_ndim,
-                                              in_shape_data,
-                                              out_shape_ndim,
-                                              out_shape_data,
-                                              aux_shape_ndim,
-                                              aux_shape_data,
-                                              s,
-                                              ret,
-                                              in_shape_size,
-                                              out_shape_size,
-                                              aux_shape_size,
-                                              complete);
+                                            num_args,
+                                            arg_shape_data,
+                                            arg_ind_ptr,
+                                            in_shape_ndim,
+                                            in_shape_data,
+                                            out_shape_ndim,
+                                            out_shape_data,
+                                            aux_shape_ndim,
+                                            aux_shape_data,
+                                            s,
+                                            ret,
+                                            in_shape_size,
+                                            out_shape_size,
+                                            aux_shape_size,
+                                            complete);
   API_END();
 }
 
@@ -725,37 +690,37 @@ int MXSymbolInferShape(SymbolHandle sym,
 int MXSymbolInferShape64(SymbolHandle sym,
                          uint32_t num_args,
                          const char** keys,
-                         const int64_t *arg_ind_ptr,
-                         const int64_t *arg_shape_data,
-                         size_t *in_shape_size,
-                         const int **in_shape_ndim,
-                         const int64_t ***in_shape_data,
-                         size_t *out_shape_size,
-                         const int **out_shape_ndim,
-                         const int64_t ***out_shape_data,
-                         size_t *aux_shape_size,
-                         const int **aux_shape_ndim,
-                         const int64_t ***aux_shape_data,
-                         int *complete) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(sym);
-  MXAPIThreadLocalEntry<int64_t> *ret = MXAPIThreadLocalStore<int64_t>::Get();
+                         const int64_t* arg_ind_ptr,
+                         const int64_t* arg_shape_data,
+                         size_t* in_shape_size,
+                         const int** in_shape_ndim,
+                         const int64_t*** in_shape_data,
+                         size_t* out_shape_size,
+                         const int** out_shape_ndim,
+                         const int64_t*** out_shape_data,
+                         size_t* aux_shape_size,
+                         const int** aux_shape_ndim,
+                         const int64_t*** aux_shape_data,
+                         int* complete) {
+  nnvm::Symbol* s                     = static_cast<nnvm::Symbol*>(sym);
+  MXAPIThreadLocalEntry<int64_t>* ret = MXAPIThreadLocalStore<int64_t>::Get();
   API_BEGIN();
   SymbolInferShape<int64_t, size_t, int64_t>(keys,
-                                                 num_args,
-                                                 arg_shape_data,
-                                                 arg_ind_ptr,
-                                                 in_shape_ndim,
-                                                 in_shape_data,
-                                                 out_shape_ndim,
-                                                 out_shape_data,
-                                                 aux_shape_ndim,
-                                                 aux_shape_data,
-                                                 s,
-                                                 ret,
-                                                 in_shape_size,
-                                                 out_shape_size,
-                                                 aux_shape_size,
-                                                 complete);
+                                             num_args,
+                                             arg_shape_data,
+                                             arg_ind_ptr,
+                                             in_shape_ndim,
+                                             in_shape_data,
+                                             out_shape_ndim,
+                                             out_shape_data,
+                                             aux_shape_ndim,
+                                             aux_shape_data,
+                                             s,
+                                             ret,
+                                             in_shape_size,
+                                             out_shape_size,
+                                             aux_shape_size,
+                                             complete);
   API_END();
 }
 
@@ -783,25 +748,34 @@ int MXSymbolInferShape64(SymbolHandle sym,
 int MXSymbolInferShapePartial(SymbolHandle sym,
                               uint32_t num_args,
                               const char** keys,
-                              const uint32_t *arg_ind_ptr,
-                              const int *arg_shape_data,
-                              uint32_t *in_shape_size,
-                              const int **in_shape_ndim,
-                              const int ***in_shape_data,
-                              uint32_t *out_shape_size,
-                              const int **out_shape_ndim,
-                              const int ***out_shape_data,
-                              uint32_t *aux_shape_size,
-                              const int **aux_shape_ndim,
-                              const int ***aux_shape_data,
-                              int *complete) {
-  int succ = 0;
+                              const uint32_t* arg_ind_ptr,
+                              const int* arg_shape_data,
+                              uint32_t* in_shape_size,
+                              const int** in_shape_ndim,
+                              const int*** in_shape_data,
+                              uint32_t* out_shape_size,
+                              const int** out_shape_ndim,
+                              const int*** out_shape_data,
+                              uint32_t* aux_shape_size,
+                              const int** aux_shape_ndim,
+                              const int*** aux_shape_data,
+                              int* complete) {
+  int succ  = 0;
   *complete = 1;
-  return MXSymbolInferShape(sym, num_args, keys,
-                            arg_ind_ptr, arg_shape_data,
-                            in_shape_size, in_shape_ndim, in_shape_data,
-                            out_shape_size, out_shape_ndim, out_shape_data,
-                            aux_shape_size, aux_shape_ndim, aux_shape_data,
+  return MXSymbolInferShape(sym,
+                            num_args,
+                            keys,
+                            arg_ind_ptr,
+                            arg_shape_data,
+                            in_shape_size,
+                            in_shape_ndim,
+                            in_shape_data,
+                            out_shape_size,
+                            out_shape_ndim,
+                            out_shape_data,
+                            aux_shape_size,
+                            aux_shape_ndim,
+                            aux_shape_data,
                             &succ);
 }
 
@@ -829,41 +803,50 @@ int MXSymbolInferShapePartial(SymbolHandle sym,
 int MXSymbolInferShapePartial64(SymbolHandle sym,
                                 uint32_t num_args,
                                 const char** keys,
-                                const int64_t *arg_ind_ptr,
-                                const int64_t *arg_shape_data,
-                                size_t *in_shape_size,
-                                const int **in_shape_ndim,
-                                const int64_t ***in_shape_data,
-                                size_t *out_shape_size,
-                                const int **out_shape_ndim,
-                                const int64_t ***out_shape_data,
-                                size_t *aux_shape_size,
-                                const int **aux_shape_ndim,
-                                const int64_t ***aux_shape_data,
-                                int *complete) {
-  int succ = 0;
+                                const int64_t* arg_ind_ptr,
+                                const int64_t* arg_shape_data,
+                                size_t* in_shape_size,
+                                const int** in_shape_ndim,
+                                const int64_t*** in_shape_data,
+                                size_t* out_shape_size,
+                                const int** out_shape_ndim,
+                                const int64_t*** out_shape_data,
+                                size_t* aux_shape_size,
+                                const int** aux_shape_ndim,
+                                const int64_t*** aux_shape_data,
+                                int* complete) {
+  int succ  = 0;
   *complete = 1;
-  return MXSymbolInferShape64(sym, num_args, keys,
-                              arg_ind_ptr, arg_shape_data,
-                              in_shape_size, in_shape_ndim, in_shape_data,
-                              out_shape_size, out_shape_ndim, out_shape_data,
-                              aux_shape_size, aux_shape_ndim, aux_shape_data,
+  return MXSymbolInferShape64(sym,
+                              num_args,
+                              keys,
+                              arg_ind_ptr,
+                              arg_shape_data,
+                              in_shape_size,
+                              in_shape_ndim,
+                              in_shape_data,
+                              out_shape_size,
+                              out_shape_ndim,
+                              out_shape_data,
+                              aux_shape_size,
+                              aux_shape_ndim,
+                              aux_shape_data,
                               &succ);
 }
 
 int MXSymbolInferType(SymbolHandle sym,
                       uint32_t num_args,
                       const char** keys,
-                      const int *arg_type_data,
-                      uint32_t *in_type_size,
-                      const int **in_type_data,
-                      uint32_t *out_type_size,
-                      const int **out_type_data,
-                      uint32_t *aux_type_size,
-                      const int **aux_type_data,
-                      int *complete) {
-  nnvm::Symbol *s = static_cast<nnvm::Symbol*>(sym);
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+                      const int* arg_type_data,
+                      uint32_t* in_type_size,
+                      const int** in_type_data,
+                      uint32_t* out_type_size,
+                      const int** out_type_data,
+                      uint32_t* aux_type_size,
+                      const int** aux_type_data,
+                      int* complete) {
+  nnvm::Symbol* s              = static_cast<nnvm::Symbol*>(sym);
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   API_BEGIN();
   nnvm::Graph g = Symbol2Graph(*s);
   nnvm::DTypeVector arg_types(g.indexed_graph().input_nodes().size(), -1);
@@ -883,38 +866,46 @@ int MXSymbolInferType(SymbolHandle sym,
 
   g = mxnet::exec::InferType(std::move(g), std::move(arg_types), "__dtype__");
   // copy back
-  CopyAttr(g.indexed_graph(), g.GetAttr<nnvm::DTypeVector>("dtype"),
-           &(ret->arg_types), &(ret->out_types), &(ret->aux_types));
-
-  *in_type_size = static_cast<uint32_t>(ret->arg_types.size());
-  *in_type_data = dmlc::BeginPtr(ret->arg_types);
+  CopyAttr(g.indexed_graph(),
+           g.GetAttr<nnvm::DTypeVector>("dtype"),
+           &(ret->arg_types),
+           &(ret->out_types),
+           &(ret->aux_types));
+
+  *in_type_size  = static_cast<uint32_t>(ret->arg_types.size());
+  *in_type_data  = dmlc::BeginPtr(ret->arg_types);
   *out_type_size = static_cast<uint32_t>(ret->out_types.size());
   *out_type_data = dmlc::BeginPtr(ret->out_types);
   *aux_type_size = static_cast<uint32_t>(ret->aux_types.size());
   *aux_type_data = dmlc::BeginPtr(ret->aux_types);
-  *complete = (g.GetAttr<size_t>("dtype_num_unknown_nodes") == 0);
+  *complete      = (g.GetAttr<size_t>("dtype_num_unknown_nodes") == 0);
   API_END();
 }
 
 int MXSymbolInferTypePartial(SymbolHandle sym,
                              uint32_t num_args,
                              const char** keys,
-                             const int *arg_type_data,
-                             uint32_t *in_type_size,
-                             const int **in_type_data,
-                             uint32_t *out_type_size,
-                             const int **out_type_data,
-                             uint32_t *aux_type_size,
-                             const int **aux_type_data,
-                             int *complete) {
-  int succ = 0;
+                             const int* arg_type_data,
+                             uint32_t* in_type_size,
+                             const int** in_type_data,
+                             uint32_t* out_type_size,
+                             const int** out_type_data,
+                             uint32_t* aux_type_size,
+                             const int** aux_type_data,
+                             int* complete) {
+  int succ  = 0;
   *complete = 1;
-  return MXSymbolInferType(sym, num_args, keys,
-                            arg_type_data,
-                            in_type_size, in_type_data,
-                            out_type_size, out_type_data,
-                            aux_type_size, aux_type_data,
-                            &succ);
+  return MXSymbolInferType(sym,
+                           num_args,
+                           keys,
+                           arg_type_data,
+                           in_type_size,
+                           in_type_data,
+                           out_type_size,
+                           out_type_data,
+                           aux_type_size,
+                           aux_type_data,
+                           &succ);
 }
 
 int MXSymbolGrad(SymbolHandle sym, uint32_t num_wrt, const char** wrt, SymbolHandle* out) {
@@ -924,25 +915,25 @@ int MXSymbolGrad(SymbolHandle sym, uint32_t num_wrt, const char** wrt, SymbolHan
 }
 
 int MXQuantizeSymbol(SymbolHandle sym_handle,
-                     SymbolHandle *ret_sym_handle,
+                     SymbolHandle* ret_sym_handle,
                      const int* dev_type,
                      const uint32_t num_excluded_sym_names,
-                     const char **excluded_sym_names,
+                     const char** excluded_sym_names,
                      const uint32_t num_excluded_op_names,
-                     const char **excluded_op_names,
+                     const char** excluded_op_names,
                      const uint32_t num_offline,
-                     const char **offline_params,
-                     const char *quantized_dtype,
+                     const char** offline_params,
+                     const char* quantized_dtype,
                      const bool calib_quantize,
-                     const char *quantize_mode,
-                     const char *quantize_granularity,
+                     const char* quantize_mode,
+                     const char* quantize_granularity,
                      mx_uint* out_num_calib_names,
-                     const char ***out_calib_names) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+                     const char*** out_calib_names) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  nnvm::Symbol *sym = static_cast<nnvm::Symbol*>(sym_handle);
-  nnvm::Graph g = Symbol2Graph(*sym);
-  int target_dev = *dev_type;
+  nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(sym_handle);
+  nnvm::Graph g     = Symbol2Graph(*sym);
+  int target_dev    = *dev_type;
   std::unordered_set<std::string> excluded_node_names;
   for (size_t i = 0; i < num_excluded_sym_names; ++i) {
     excluded_node_names.emplace(excluded_sym_names[i]);
@@ -958,39 +949,38 @@ int MXQuantizeSymbol(SymbolHandle sym_handle,
   std::string quantized_type(quantized_dtype);
   std::string quantized_mode(quantize_mode);
   std::string quantized_granularity(quantize_granularity);
-  g.attrs["excluded_nodes"] = std::make_shared<nnvm::any>(std::move(excluded_node_names));
-  g.attrs["excluded_ops"] = std::make_shared<nnvm::any>(std::move(excluded_op));
-  g.attrs["offline_params"] = std::make_shared<nnvm::any>(std::move(offline));
-  g.attrs["quantized_dtype"] = std::make_shared<nnvm::any>(std::move(quantized_type));
-  g.attrs["target_ctx"] = std::make_shared<nnvm::any>(target_dev);
-  g.attrs["quantize_mode"] = std::make_shared<nnvm::any>(std::move(quantized_mode));
+  g.attrs["excluded_nodes"]       = std::make_shared<nnvm::any>(std::move(excluded_node_names));
+  g.attrs["excluded_ops"]         = std::make_shared<nnvm::any>(std::move(excluded_op));
+  g.attrs["offline_params"]       = std::make_shared<nnvm::any>(std::move(offline));
+  g.attrs["quantized_dtype"]      = std::make_shared<nnvm::any>(std::move(quantized_type));
+  g.attrs["target_ctx"]           = std::make_shared<nnvm::any>(target_dev);
+  g.attrs["quantize_mode"]        = std::make_shared<nnvm::any>(std::move(quantized_mode));
   g.attrs["quantize_granularity"] = std::make_shared<nnvm::any>(std::move(quantized_granularity));
-  g = ApplyPass(std::move(g), "QuantizeGraph");
-  const auto& calib_nodes = g.GetAttr<std::vector<std::string>>("calib_nodes");
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
-  ret->ret_vec_str = calib_nodes;
-  *out_num_calib_names = ret->ret_vec_str.size();
+  g                               = ApplyPass(std::move(g), "QuantizeGraph");
+  const auto& calib_nodes         = g.GetAttr<std::vector<std::string>>("calib_nodes");
+  MXAPIThreadLocalEntry<>* ret    = MXAPIThreadLocalStore<>::Get();
+  ret->ret_vec_str                = calib_nodes;
+  *out_num_calib_names            = ret->ret_vec_str.size();
   ret->ret_vec_charp.clear();
   ret->ret_vec_charp.reserve(ret->ret_vec_str.size());
-  for (const auto &str : ret->ret_vec_str) {
+  for (const auto& str : ret->ret_vec_str) {
     ret->ret_vec_charp.push_back(str.c_str());
   }
   *out_calib_names = dmlc::BeginPtr(ret->ret_vec_charp);
-  s->outputs = g.outputs;
-  *ret_sym_handle = s;
+  s->outputs       = g.outputs;
+  *ret_sym_handle  = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
 // helper function to add mapping of node_name -> dtype map
 // for the given indexed graph and inferred_dtypes
-static void _SetInputDTypes(
-    const nnvm::IndexedGraph& idx,
-    const nnvm::DTypeVector& inferred_dtypes,
-    std::unordered_map<std::string, int>* node_name_dtype_map,
-    std::unordered_map<std::string, int>* node_without_dtype_map) {
+static void _SetInputDTypes(const nnvm::IndexedGraph& idx,
+                            const nnvm::DTypeVector& inferred_dtypes,
+                            std::unordered_map<std::string, int>* node_name_dtype_map,
+                            std::unordered_map<std::string, int>* node_without_dtype_map) {
   const std::string dtype_keyword = "__dtype__";
   for (uint32_t nid : idx.input_nodes()) {
-    const auto& node = idx[nid].source;
+    const auto& node            = idx[nid].source;
     const auto& node_with_dtype = node->attrs.dict.find(dtype_keyword);
     // input nodes classified into nodes_with_dtype, nodes_without_dtype
     // This classification required because if param_names not provided
@@ -1001,15 +991,13 @@ static void _SetInputDTypes(
       if (inferred_dtypes[idx.entry_id(nid, 0)] == -1) {
         (*node_name_dtype_map)[node->attrs.name] = 0;
       } else {
-        (*node_name_dtype_map)[node->attrs.name] =
-            inferred_dtypes[idx.entry_id(nid, 0)];
+        (*node_name_dtype_map)[node->attrs.name] = inferred_dtypes[idx.entry_id(nid, 0)];
       }
     } else {
       if (inferred_dtypes[idx.entry_id(nid, 0)] == -1) {
         (*node_without_dtype_map)[node->attrs.name] = 0;
       } else {
-        (*node_without_dtype_map)[node->attrs.name] =
-            inferred_dtypes[idx.entry_id(nid, 0)];
+        (*node_without_dtype_map)[node->attrs.name] = inferred_dtypes[idx.entry_id(nid, 0)];
       }
     }
   }
@@ -1022,43 +1010,39 @@ static void _SetInputDTypes(
 // a prior dtype set.
 // args is a const_reference vector of ObjectPtrs. ObjectPtrs are immutable but
 // the Nodes they are pointing will be mutated in this function
-static void _UpdateSymDTypeAttrs(
-    const std::unordered_map<std::string, int>& node_name_dtype_map,
-    const std::unordered_map<std::string, int>& node_without_dtype_map,
-    const std::unordered_set<std::string>& model_params,
-    const std::vector<nnvm::ObjectPtr>& args) {
+static void _UpdateSymDTypeAttrs(const std::unordered_map<std::string, int>& node_name_dtype_map,
+                                 const std::unordered_map<std::string, int>& node_without_dtype_map,
+                                 const std::unordered_set<std::string>& model_params,
+                                 const std::vector<nnvm::ObjectPtr>& args) {
   const std::string dtype_keyword = "__dtype__";
 
   // Update args to have the right dtype attrs
   if (model_params.size() > 0) {
     // if model params provided, set dtype only for model params
-    for (const auto & arg : args) {
+    for (const auto& arg : args) {
       const std::string& node_name = arg->attrs.name;
-      auto it_model_params = model_params.find(node_name);
-      auto it_with_dtype = node_name_dtype_map.find(node_name);
-      auto it_without_dtype = node_without_dtype_map.find(node_name);
+      auto it_model_params         = model_params.find(node_name);
+      auto it_with_dtype           = node_name_dtype_map.find(node_name);
+      auto it_without_dtype        = node_without_dtype_map.find(node_name);
       if (it_model_params != model_params.end()) {
         // need to update __dtype__ attribute if already set, else set it
         if (it_with_dtype != node_name_dtype_map.end()) {
-          arg->attrs.dict[dtype_keyword] =
-              std::to_string(it_with_dtype->second);
+          arg->attrs.dict[dtype_keyword] = std::to_string(it_with_dtype->second);
         } else {
           CHECK(it_without_dtype != node_without_dtype_map.end())
               << "make sure all nodes without dtype have properly been added "
                  "in node_without_dtype_map";
-          arg->attrs.dict[dtype_keyword] =
-              std::to_string(it_without_dtype->second);
+          arg->attrs.dict[dtype_keyword] = std::to_string(it_without_dtype->second);
         }
       }
     }
   } else {
     // if model params not provided, update __dtype__ for all inputs,
     // which already had it set, don't touch the rest
-    for (const auto & arg : args) {
+    for (const auto& arg : args) {
       auto it = node_name_dtype_map.find(arg->attrs.name);
       if (it != node_name_dtype_map.end()) {
-        if (arg->attrs.dict.find(dtype_keyword) !=
-            arg->attrs.dict.end()) {
+        if (arg->attrs.dict.find(dtype_keyword) != arg->attrs.dict.end()) {
           arg->attrs.dict[dtype_keyword] = std::to_string(it->second);
         }
       }
@@ -1067,9 +1051,9 @@ static void _UpdateSymDTypeAttrs(
 }
 
 int MXReducePrecisionSymbol(SymbolHandle sym_handle,
-                            SymbolHandle *ret_sym_handle,
+                            SymbolHandle* ret_sym_handle,
                             uint32_t num_args,
-                            const int *arg_type_data,
+                            const int* arg_type_data,
                             uint32_t num_ind_ptr,
                             const int* ind_ptr,
                             const int* target_dtype,
@@ -1080,19 +1064,19 @@ int MXReducePrecisionSymbol(SymbolHandle sym_handle,
                             const uint32_t num_conditional_fp32_op_names,
                             const uint32_t num_excluded_symbols,
                             const uint32_t num_model_params,
-                            const char **target_dtype_op_names,
-                            const char **fp32_op_names,
-                            const char **widest_dtype_op_names,
-                            const char **conditional_fp32_op_names,
-                            const char **excluded_symbols,
-                            const char **param_names,
-                            const char **param_vals,
-                            const char **model_param_names,
-                            const char **arg_names) {
-  nnvm::Symbol *result_sym = new nnvm::Symbol();
+                            const char** target_dtype_op_names,
+                            const char** fp32_op_names,
+                            const char** widest_dtype_op_names,
+                            const char** conditional_fp32_op_names,
+                            const char** excluded_symbols,
+                            const char** param_names,
+                            const char** param_vals,
+                            const char** model_param_names,
+                            const char** arg_names) {
+  nnvm::Symbol* result_sym = new nnvm::Symbol();
   API_BEGIN();
-  nnvm::Symbol *sym = static_cast<nnvm::Symbol *>(sym_handle);
-  nnvm::Graph g = Symbol2Graph(*sym);
+  nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(sym_handle);
+  nnvm::Graph g     = Symbol2Graph(*sym);
   std::unordered_set<std::string> target_dtype_ops;
   std::unordered_set<std::string> fp32_ops;
   std::unordered_set<std::string> widest_dtype_ops;
@@ -1101,9 +1085,8 @@ int MXReducePrecisionSymbol(SymbolHandle sym_handle,
 
   // conditional_fp32_ops contains the mapping of op_name -> (map of param_name -> param_values)
   // which need to be conditionally selected to be casted to FP32
-  std::unordered_map<std::string,
-                     std::unordered_map<std::string,
-                                        std::vector<std::string>>> conditional_fp32_ops;
+  std::unordered_map<std::string, std::unordered_map<std::string, std::vector<std::string>>>
+      conditional_fp32_ops;
   int target_dt = *target_dtype;
 
   for (size_t i = 0; i < num_target_dtype_op_names; ++i) {
@@ -1124,8 +1107,8 @@ int MXReducePrecisionSymbol(SymbolHandle sym_handle,
 
   for (size_t i = 0; i < num_ind_ptr - 1; ++i) {
     for (int j = ind_ptr[i]; j < ind_ptr[i + 1]; ++j) {
-      conditional_fp32_ops[conditional_fp32_op_names[i]][param_names[i]]
-          .emplace_back(std::string(param_vals[j]));
+      conditional_fp32_ops[conditional_fp32_op_names[i]][param_names[i]].emplace_back(
+          std::string(param_vals[j]));
     }
   }
 
@@ -1133,51 +1116,45 @@ int MXReducePrecisionSymbol(SymbolHandle sym_handle,
   std::unordered_map<std::string, int> node_name_dtype_map, node_without_dtype_map;
   nnvm::DTypeVector arg_types(g.indexed_graph().input_nodes().size(), -1);
   for (uint32_t i = 0; i < num_args; ++i) {
-    kwargs[arg_names[i]] = arg_type_data[i];
+    kwargs[arg_names[i]]              = arg_type_data[i];
     node_name_dtype_map[arg_names[i]] = arg_type_data[i];
   }
   mxnet::MatchArguments(g.indexed_graph(), kwargs, &arg_types, "InferType");
 
-  g.attrs["target_dtype_ops"] =
-      std::make_shared<nnvm::any>(std::move(target_dtype_ops));
-  g.attrs["fp32_ops"] = std::make_shared<nnvm::any>(std::move(fp32_ops));
-  g.attrs["widest_dtype_ops"] =
-      std::make_shared<nnvm::any>(std::move(widest_dtype_ops));
-  g.attrs["conditional_fp32_ops"] =
-      std::make_shared<nnvm::any>(std::move(conditional_fp32_ops));
-  g.attrs["excluded_syms"] =
-      std::make_shared<nnvm::any>(std::move(excluded_syms));
-  g.attrs["target_dtype"] = std::make_shared<nnvm::any>(target_dt);
-  g.attrs["data_name_types"] = std::make_shared<nnvm::any>(kwargs);
+  g.attrs["target_dtype_ops"]     = std::make_shared<nnvm::any>(std::move(target_dtype_ops));
+  g.attrs["fp32_ops"]             = std::make_shared<nnvm::any>(std::move(fp32_ops));
+  g.attrs["widest_dtype_ops"]     = std::make_shared<nnvm::any>(std::move(widest_dtype_ops));
+  g.attrs["conditional_fp32_ops"] = std::make_shared<nnvm::any>(std::move(conditional_fp32_ops));
+  g.attrs["excluded_syms"]        = std::make_shared<nnvm::any>(std::move(excluded_syms));
+  g.attrs["target_dtype"]         = std::make_shared<nnvm::any>(target_dt);
+  g.attrs["data_name_types"]      = std::make_shared<nnvm::any>(kwargs);
   g.attrs["cast_optional_params"] = std::make_shared<nnvm::any>(cast_optional_params);
 
   g = ApplyPass(std::move(g), "ReducePrecision");
   // Need to run type inference since it is possible that inferred
   // type of some inputs has changed
   g = mxnet::exec::InferType(std::move(g), std::move(arg_types), "");
-  const nnvm::DTypeVector &inferred_dtypes =
-      g.GetAttr<nnvm::DTypeVector>("dtype");
+  const nnvm::DTypeVector& inferred_dtypes = g.GetAttr<nnvm::DTypeVector>("dtype");
 
   g.attrs["inferred_dtypes"] = std::make_shared<dmlc::any>(inferred_dtypes);
-  g.attrs["target_dtype"] = std::make_shared<nnvm::any>(target_dt);
+  g.attrs["target_dtype"]    = std::make_shared<nnvm::any>(target_dt);
 
   if (cast_optional_params) {
     g = ApplyPass(std::move(g), "AMPInferUnknown");
-    const nnvm::DTypeVector &inferred_dtype_result =
+    const nnvm::DTypeVector& inferred_dtype_result =
         g.GetAttr<nnvm::DTypeVector>("inferred_dtype_result");
-    const nnvm::IndexedGraph &idx = g.indexed_graph();
+    const nnvm::IndexedGraph& idx = g.indexed_graph();
     // set node name -> input dtype mapping using infer dtype
     _SetInputDTypes(idx, inferred_dtype_result, &node_name_dtype_map, &node_without_dtype_map);
   } else {
-    const nnvm::IndexedGraph &idx = g.indexed_graph();
+    const nnvm::IndexedGraph& idx = g.indexed_graph();
     // set node name -> input dtype mapping using infer dtype
     _SetInputDTypes(idx, inferred_dtypes, &node_name_dtype_map, &node_without_dtype_map);
   }
 
-
-  result_sym->outputs = g.outputs;
-  *ret_sym_handle = result_sym;
-  nnvm::Symbol *ret_sym = static_cast<nnvm::Symbol *>(*ret_sym_handle);
+  result_sym->outputs                      = g.outputs;
+  *ret_sym_handle                          = result_sym;
+  nnvm::Symbol* ret_sym                    = static_cast<nnvm::Symbol*>(*ret_sym_handle);
   const std::vector<nnvm::ObjectPtr>& args = ret_sym->ListInputs(nnvm::Symbol::kAll);
 
   // update symbol dtype attrs using the node name -> dtype mapping, if dtype is already set
@@ -1196,25 +1173,26 @@ int MXSetCalibTableToQuantizedSymbol(SymbolHandle qsym_handle,
   nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
   nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(qsym_handle);
-  nnvm::Graph g = Symbol2Graph(*sym);
+  nnvm::Graph g     = Symbol2Graph(*sym);
   std::unordered_map<std::string, std::pair<float, float>> calib_table;
   for (size_t i = 0; i < num_layers; ++i) {
     calib_table.emplace(layer_names[i], std::make_pair(min_ranges[i], max_ranges[i]));
   }
   g.attrs["calib_table"] = std::make_shared<nnvm::any>(std::move(calib_table));
-  g = ApplyPass(std::move(g), "SetCalibTableToQuantizedGraph");
-  s->outputs = g.outputs;
-  *ret_qsym_handle = s;
+  g                      = ApplyPass(std::move(g), "SetCalibTableToQuantizedGraph");
+  s->outputs             = g.outputs;
+  *ret_qsym_handle       = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
-int MXGenBackendSubgraph(SymbolHandle sym_handle, const char *backend_name,
-                         SymbolHandle *ret_sym_handle) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXGenBackendSubgraph(SymbolHandle sym_handle,
+                         const char* backend_name,
+                         SymbolHandle* ret_sym_handle) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  nnvm::Symbol *sym = static_cast<nnvm::Symbol *>(sym_handle);
-  *s = sym->Copy();
-  auto backend = mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(backend_name);
+  nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(sym_handle);
+  *s                = sym->Copy();
+  auto backend      = mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(backend_name);
   const auto& subgraph_prop_list = backend->GetSubgraphProperties();
   for (auto property : subgraph_prop_list) {
     if (property->HasAttr("disable") && property->GetAttr<bool>("disable") == true) {
@@ -1228,7 +1206,7 @@ int MXGenBackendSubgraph(SymbolHandle sym_handle, const char *backend_name,
     nnvm::Graph g = Symbol2Graph(*s);
     property->SetAttr("graph", g);
     g.attrs["subgraph_property"] = std::make_shared<nnvm::any>(property);
-    g = ApplyPass(std::move(g), "BuildSubgraph");
+    g                            = ApplyPass(std::move(g), "BuildSubgraph");
     property->RemoveAttr("graph");
     g.attrs.erase("subgraph_property");
     s->outputs = g.outputs;
@@ -1237,22 +1215,21 @@ int MXGenBackendSubgraph(SymbolHandle sym_handle, const char *backend_name,
   API_END_HANDLE_ERROR(delete s);
 }
 
-int MXGenAtomicSymbolFromSymbol(SymbolHandle sym_handle, SymbolHandle *ret_sym_handle) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXGenAtomicSymbolFromSymbol(SymbolHandle sym_handle, SymbolHandle* ret_sym_handle) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  nnvm::Symbol *source = static_cast<nnvm::Symbol *>(sym_handle);
+  nnvm::Symbol* source = static_cast<nnvm::Symbol*>(sym_handle);
   CHECK_GE(source->outputs.size(), 1) << "Input symbol does not have outputs.";
-  const auto &node = source->outputs[0].node;
-  for (const auto &other_node : source->outputs) {
+  const auto& node = source->outputs[0].node;
+  for (const auto& other_node : source->outputs) {
     if (node.get() != other_node.node.get()) {
-      LOG(FATAL)
-        << "Generating atomic symbol from other symbol only works for nongrouped symbol.";
+      LOG(FATAL) << "Generating atomic symbol from other symbol only works for nongrouped symbol.";
     }
   }
-  const auto *op = node->op();
+  const auto* op   = node->op();
   const auto attrs = source->ListAttrs(nnvm::Symbol::ListAttrOption::kShallow);
-  *s = nnvm::Symbol::CreateFunctor(op, attrs);
-  *ret_sym_handle = s;
+  *s               = nnvm::Symbol::CreateFunctor(op, attrs);
+  *ret_sym_handle  = s;
   API_END_HANDLE_ERROR(delete s);
 }
 
@@ -1260,8 +1237,8 @@ int MXShallowCopySymbol(SymbolHandle src, SymbolHandle* out) {
   nnvm::Symbol* out_sym = new nnvm::Symbol;
   API_BEGIN();
   nnvm::Symbol* src_sym = static_cast<nnvm::Symbol*>(src);
-  *out_sym = *src_sym;
-  *out = out_sym;
+  *out_sym              = *src_sym;
+  *out                  = out_sym;
   API_END_HANDLE_ERROR(delete out_sym);
 }
 
@@ -1294,27 +1271,27 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
                          NDArrayHandle** new_aux_handle,
                          char*** new_aux_names_handle) {
   // create copy of input symbol
-  nnvm::Symbol *s = new nnvm::Symbol();
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
-  nnvm::Symbol *sym = static_cast<nnvm::Symbol *>(sym_handle);
-  *s = sym->Copy();
+  nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(sym_handle);
+  *s                = sym->Copy();
 
   // create a data structure from pointer array
   std::unordered_map<std::string, std::string> options_map;
   for (mx_uint i = 0; i < num_options; ++i)
     options_map.emplace(keys[i], vals[i]);
 
-  NDArray ***new_args_ptr = reinterpret_cast<NDArray***>(new_args_handle);
-  NDArray ***new_aux_ptr = reinterpret_cast<NDArray***>(new_aux_handle);
-  NDArray **in_args_ptr = reinterpret_cast<NDArray**>(in_args_handle);
-  NDArray **in_aux_ptr = reinterpret_cast<NDArray**>(in_aux_handle);
+  NDArray*** new_args_ptr = reinterpret_cast<NDArray***>(new_args_handle);
+  NDArray*** new_aux_ptr  = reinterpret_cast<NDArray***>(new_aux_handle);
+  NDArray** in_args_ptr   = reinterpret_cast<NDArray**>(in_args_handle);
+  NDArray** in_aux_ptr    = reinterpret_cast<NDArray**>(in_aux_handle);
 
   auto init_graph = [&](auto s) {
-    nnvm::Graph g = Symbol2Graph(*s);
-    const auto& indexed_graph = g.indexed_graph();
-    const auto& mutable_nodes = indexed_graph.mutable_input_nodes();
+    nnvm::Graph g                        = Symbol2Graph(*s);
+    const auto& indexed_graph            = g.indexed_graph();
+    const auto& mutable_nodes            = indexed_graph.mutable_input_nodes();
     std::vector<std::string> input_names = s->ListInputNames(nnvm::Symbol::kAll);
-    size_t num_forward_inputs = input_names.size();
+    size_t num_forward_inputs            = input_names.size();
 
     if (args_len || aux_len) {
       if (!skip_infer) {
@@ -1327,8 +1304,8 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
         std::unordered_map<std::string, mxnet::TShape> input_shape_map(num_input_shapes);
         for (uint32_t i = 0; i < num_input_shapes; ++i) {
           input_shape_map.emplace(input_shape_names[i],
-                    mxnet::TShape(input_shape_data + input_shape_idx[i],
-                    input_shape_data + input_shape_idx[i+1]));
+                                  mxnet::TShape(input_shape_data + input_shape_idx[i],
+                                                input_shape_data + input_shape_idx[i + 1]));
         }
         std::unordered_map<std::string, int> input_dtype_map(num_input_dtypes);
         for (uint32_t i = 0; i < num_input_dtypes; ++i) {
@@ -1345,23 +1322,23 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
           const uint32_t nid = indexed_graph.input_nodes().at(i);
           if (mutable_nodes.count(nid)) {
             CHECK_LT(aux_top, aux_len)
-              << "Cannot find aux '" << input_names[i] << "' in provided aux to optimize_for";
+                << "Cannot find aux '" << input_names[i] << "' in provided aux to optimize_for";
             if (in_aux_ptr[aux_top] != nullptr) {
-              const auto &in_arg = *(in_aux_ptr[aux_top]);
-              arg_shapes[i] = in_arg.shape();
-              arg_dtypes[i] = in_arg.dtype();
-              arg_stypes[i] = in_arg.storage_type();
+              const auto& in_arg = *(in_aux_ptr[aux_top]);
+              arg_shapes[i]      = in_arg.shape();
+              arg_dtypes[i]      = in_arg.dtype();
+              arg_stypes[i]      = in_arg.storage_type();
             }
             aux_top++;
           } else {
             auto name = input_names[i];
             CHECK_LT(args_top, args_len)
-              << "Cannot find arg '" << name << "' in provided args to optimize_for";
+                << "Cannot find arg '" << name << "' in provided args to optimize_for";
             if (in_args_ptr[args_top] != nullptr) {
-              const auto &in_arg = *(in_args_ptr[args_top]);
-              arg_shapes[i] = in_arg.shape();
-              arg_dtypes[i] = in_arg.dtype();
-              arg_stypes[i] = in_arg.storage_type();
+              const auto& in_arg = *(in_args_ptr[args_top]);
+              arg_shapes[i]      = in_arg.shape();
+              arg_dtypes[i]      = in_arg.dtype();
+              arg_stypes[i]      = in_arg.storage_type();
             } else {
               // input_names[i] is not in args but can be in the optional
               // shape/type/stype attribute dicts.
@@ -1383,7 +1360,7 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
         }
 
         g.attrs["context"] = std::make_shared<nnvm::any>(
-          exec::ContextVector(indexed_graph.num_nodes(), default_ctx));
+            exec::ContextVector(indexed_graph.num_nodes(), default_ctx));
 
         // infer shapes
         g = exec::InferShape(std::move(g), std::move(arg_shapes), "__shape__");
@@ -1394,22 +1371,22 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
       }
       // set args/aux as attributes on graph so that subgraph property can use them
       std::vector<std::string> arg_names = s->ListInputNames(nnvm::Symbol::kReadOnlyArgs);
-      g.attrs["in_args"] = std::make_shared<nnvm::any>(in_args_ptr);
-      g.attrs["in_arg_names"] = std::make_shared<nnvm::any>(arg_names);
+      g.attrs["in_args"]                 = std::make_shared<nnvm::any>(in_args_ptr);
+      g.attrs["in_arg_names"]            = std::make_shared<nnvm::any>(arg_names);
 
       std::vector<std::string> aux_names = s->ListInputNames(nnvm::Symbol::kAuxiliaryStates);
-      g.attrs["in_aux"] = std::make_shared<nnvm::any>(in_aux_ptr);
-      g.attrs["in_aux_names"] = std::make_shared<nnvm::any>(aux_names);
+      g.attrs["in_aux"]                  = std::make_shared<nnvm::any>(in_aux_ptr);
+      g.attrs["in_aux_names"]            = std::make_shared<nnvm::any>(aux_names);
     } else {
       // args/aux were not specified, so set nullptr/empty-lists
-      NDArray **in_args_ptr = static_cast<NDArray**>(nullptr);
+      NDArray** in_args_ptr = static_cast<NDArray**>(nullptr);
       std::vector<std::string> arg_names;
-      g.attrs["in_args"] = std::make_shared<nnvm::any>(in_args_ptr);
+      g.attrs["in_args"]      = std::make_shared<nnvm::any>(in_args_ptr);
       g.attrs["in_arg_names"] = std::make_shared<nnvm::any>(arg_names);
 
-      NDArray **in_aux_ptr = static_cast<NDArray**>(nullptr);
+      NDArray** in_aux_ptr = static_cast<NDArray**>(nullptr);
       std::vector<std::string> aux_names;
-      g.attrs["in_aux"] = std::make_shared<nnvm::any>(in_aux_ptr);
+      g.attrs["in_aux"]       = std::make_shared<nnvm::any>(in_aux_ptr);
       g.attrs["in_aux_names"] = std::make_shared<nnvm::any>(aux_names);
     }
 
@@ -1422,27 +1399,27 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
 
   if (mxnet::op::SubgraphBackendRegistry::Get()->backend_map_.count(backend_name) > 0) {
     // use subgraph backend
-    const auto backend = mxnet::op::SubgraphBackendRegistry
-                                      ::Get()->GetSubgraphBackend(backend_name);
+    const auto backend =
+        mxnet::op::SubgraphBackendRegistry ::Get()->GetSubgraphBackend(backend_name);
     const auto& subgraph_prop_list = backend->GetSubgraphProperties();
     for (auto property : subgraph_prop_list) {
       nnvm::Graph g = init_graph(s);
       property->PrePartition(g, options_map);
       g.attrs["subgraph_property"] = std::make_shared<nnvm::any>(property);
-      g = ApplyPass(std::move(g), "BuildSubgraph");
+      g                            = ApplyPass(std::move(g), "BuildSubgraph");
       g.attrs.erase("subgraph_property");
       property->PostPartition(g);
       s->outputs = g.outputs;
     }
   } else if (dmlc::Registry<nnvm::PassFunctionReg>::Find(backend_name) != nullptr) {
     // use graph pass
-    nnvm::Graph g = init_graph(s);
+    nnvm::Graph g          = init_graph(s);
     g.attrs["options_map"] = std::make_shared<nnvm::any>(options_map);
-    g.attrs["pass_name"] = std::make_shared<nnvm::any>(backend_name);
-    g = ApplyPass(std::move(g), backend_name);
+    g.attrs["pass_name"]   = std::make_shared<nnvm::any>(backend_name);
+    g                      = ApplyPass(std::move(g), backend_name);
 
-    std::vector<NDArray*> new_args = g.GetAttr<std::vector<NDArray*>>("new_args");
-    std::vector<NDArray*> new_aux = g.GetAttr<std::vector<NDArray*>>("new_aux");
+    std::vector<NDArray*> new_args         = g.GetAttr<std::vector<NDArray*>>("new_args");
+    std::vector<NDArray*> new_aux          = g.GetAttr<std::vector<NDArray*>>("new_aux");
     std::vector<std::string> new_arg_names = g.GetAttr<std::vector<std::string>>("new_arg_names");
     std::vector<std::string> new_aux_names = g.GetAttr<std::vector<std::string>>("new_aux_names");
     g.attrs.erase("new_args");
@@ -1453,12 +1430,12 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
 
     NDArray** new_arg_arr = new NDArray*[new_arg_names.size()];
     NDArray** new_aux_arr = new NDArray*[new_aux_names.size()];
-    char** new_arg_cstr = new char*[new_arg_names.size()];
-    char** new_aux_cstr = new char*[new_aux_names.size()];
+    char** new_arg_cstr   = new char*[new_arg_names.size()];
+    char** new_aux_cstr   = new char*[new_aux_names.size()];
     for (unsigned i = 0; i < new_arg_names.size(); i++) {
       new_arg_arr[i] = new_args[i];
       std::string& s = new_arg_names[i];
-      char* tmp = new char[s.length()+1];
+      char* tmp      = new char[s.length() + 1];
       s.copy(tmp, s.length());
       tmp[s.length()] = '\0';
       new_arg_cstr[i] = tmp;
@@ -1466,17 +1443,17 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
     for (unsigned i = 0; i < new_aux_names.size(); i++) {
       new_aux_arr[i] = new_aux[i];
       std::string& s = new_aux_names[i];
-      char* tmp = new char[s.length()+1];
+      char* tmp      = new char[s.length() + 1];
       s.copy(tmp, s.length());
       tmp[s.length()] = '\0';
       new_aux_cstr[i] = tmp;
     }
-    *new_args_cnt = new_arg_names.size();
-    *new_aux_cnt = new_aux_names.size();
+    *new_args_cnt         = new_arg_names.size();
+    *new_aux_cnt          = new_aux_names.size();
     *new_arg_names_handle = new_arg_cstr;
     *new_aux_names_handle = new_aux_cstr;
-    *new_args_ptr = new_arg_arr;
-    *new_aux_ptr = new_aux_arr;
+    *new_args_ptr         = new_arg_arr;
+    *new_aux_ptr          = new_aux_arr;
   } else {
     // cannot find graph pass or subgraph backend registered in this name
     LOG(ERROR) << "Error optimizing for backend '" << backend_name << "' cannot be found";
@@ -1486,18 +1463,18 @@ int MXOptimizeForBackend(SymbolHandle sym_handle,
   API_END_HANDLE_ERROR(delete s);
 }
 
-int MXCheckDynamicShapeOp(SymbolHandle sym_handle,
-                          bool* has_dynamic_shape) {
-  nnvm::Symbol *s = new nnvm::Symbol();
+int MXCheckDynamicShapeOp(SymbolHandle sym_handle, bool* has_dynamic_shape) {
+  nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
   *has_dynamic_shape = false;
   // traverse the symbol and check if any dynamic shape is present
-  nnvm::Symbol *sym = static_cast<nnvm::Symbol *>(sym_handle);
-  *s = sym->Copy();
-  nnvm::Graph g = Symbol2Graph(*s);
+  nnvm::Symbol* sym      = static_cast<nnvm::Symbol*>(sym_handle);
+  *s                     = sym->Copy();
+  nnvm::Graph g          = Symbol2Graph(*s);
   const auto& infershape = nnvm::Op::GetAttr<mxnet::FInferShape>("FInferShape");
   DFSVisit(g.outputs, [infershape, has_dynamic_shape](const nnvm::ObjectPtr n) {
-    if (*has_dynamic_shape) return;
+    if (*has_dynamic_shape)
+      return;
     if (!n->is_variable() && !infershape.count(n->op())) {
       *has_dynamic_shape = true;
       return;
diff --git a/src/c_api/c_api_test.cc b/src/c_api/c_api_test.cc
index ac691234fcf0..9295c13b84a0 100644
--- a/src/c_api/c_api_test.cc
+++ b/src/c_api/c_api_test.cc
@@ -29,10 +29,10 @@
 #include "../common/cuda/rtc.h"
 
 int MXBuildSubgraphByOpNames(SymbolHandle sym_handle,
-                              const char* prop_name,
-                              const uint32_t num_ops,
-                              const char** op_names,
-                              SymbolHandle* ret_sym_handle) {
+                             const char* prop_name,
+                             const uint32_t num_ops,
+                             const char** op_names,
+                             SymbolHandle* ret_sym_handle) {
   nnvm::Symbol* s = new nnvm::Symbol();
   API_BEGIN();
   std::unordered_set<std::string> op_name_set;
@@ -40,10 +40,9 @@ int MXBuildSubgraphByOpNames(SymbolHandle sym_handle,
     op_name_set.emplace(op_names[i]);
   }
   nnvm::Symbol* sym = static_cast<nnvm::Symbol*>(sym_handle);
-  *s = sym->Copy();
+  *s                = sym->Copy();
   if (!op_name_set.empty()) {
-    auto& backend =
-        mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(prop_name);
+    auto& backend = mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(prop_name);
     LOG(INFO) << "Subgraph backend " << backend->GetName() << " is activated.";
     const auto& subgraph_prop_list = backend->GetSubgraphProperties();
     for (auto property : subgraph_prop_list) {
@@ -52,7 +51,7 @@ int MXBuildSubgraphByOpNames(SymbolHandle sym_handle,
       property->SetAttr("graph", g);
       property->SetAttr("op_names", op_name_set);
       g.attrs["subgraph_property"] = std::make_shared<nnvm::any>(property);
-      g = nnvm::ApplyPass(std::move(g), "BuildSubgraph");
+      g                            = nnvm::ApplyPass(std::move(g), "BuildSubgraph");
       property->RemoveAttr("graph");
       g.attrs.erase("subgraph_property");
       s->outputs = g.outputs;
@@ -75,15 +74,14 @@ int MXSetSubgraphPropertyOpNames(const char* prop_name,
 }
 
 int MXSetSubgraphPropertyOpNamesV2(const char* prop_name,
-                                 const uint32_t num_ops,
-                                 const char** op_names) {
+                                   const uint32_t num_ops,
+                                   const char** op_names) {
   API_BEGIN();
   std::unordered_set<std::string> op_name_set;
   for (size_t i = 0; i < num_ops; ++i) {
     op_name_set.emplace(op_names[i]);
   }
-  auto& backend =
-      mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(prop_name);
+  auto& backend = mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(prop_name);
   const auto& subgraph_prop_list = backend->GetSubgraphProperties();
   for (auto& property : subgraph_prop_list) {
     property->SetAttr("op_names", op_name_set);
@@ -99,8 +97,7 @@ int MXRemoveSubgraphPropertyOpNames(const char* prop_name) {
 
 int MXRemoveSubgraphPropertyOpNamesV2(const char* prop_name) {
   API_BEGIN();
-  auto& backend =
-      mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(prop_name);
+  auto& backend = mxnet::op::SubgraphBackendRegistry::Get()->GetSubgraphBackend(prop_name);
   const auto& subgraph_prop_list = backend->GetSubgraphProperties();
   for (auto& property : subgraph_prop_list) {
     property->RemoveAttr("op_names");
@@ -108,15 +105,13 @@ int MXRemoveSubgraphPropertyOpNamesV2(const char* prop_name) {
   API_END();
 }
 
-int MXGetEnv(const char* name,
-             const char** value) {
+int MXGetEnv(const char* name, const char** value) {
   API_BEGIN();
   *value = getenv(name);
   API_END();
 }
 
-int MXSetEnv(const char* name,
-             const char* value) {
+int MXSetEnv(const char* name, const char* value) {
   API_BEGIN();
 #ifdef _WIN32
   auto value_arg = (value == nullptr) ? "" : value;
@@ -130,7 +125,7 @@ int MXSetEnv(const char* name,
   API_END();
 }
 
-int MXGetMaxSupportedArch(uint32_t *max_arch) {
+int MXGetMaxSupportedArch(uint32_t* max_arch) {
   API_BEGIN();
 #if MXNET_USE_CUDA
   *max_arch = static_cast<uint32_t>(mxnet::common::cuda::rtc::GetMaxSupportedArch());
diff --git a/src/common/cuda/rtc.cc b/src/common/cuda/rtc.cc
index 2294feaa9e2f..45bccea718fc 100644
--- a/src/common/cuda/rtc.cc
+++ b/src/common/cuda/rtc.cc
@@ -42,18 +42,26 @@
 #include "rtc/reducer-inl.h"
 #include "utils.h"
 
-typedef CUresult (*cuDeviceGetPtr) (CUdevice* device, int ordinal);
-typedef CUresult (*cuDevicePrimaryCtxRetainPtr) (CUcontext* pctx, CUdevice dev);
-typedef CUresult (*cuModuleLoadDataExPtr) (CUmodule* module, const void* image,
-  unsigned int numOptions, CUjit_option* options, void** optionValues);
-typedef CUresult (*cuModuleGetFunctionPtr) (CUfunction* hfunc, CUmodule hmod,
-  const char* name);
-typedef CUresult (*cuLaunchKernelPtr) (CUfunction f, unsigned int  gridDimX,
-  unsigned int  gridDimY, unsigned int  gridDimZ,
-  unsigned int  blockDimX, unsigned int blockDimY, unsigned int blockDimZ,
-  unsigned int sharedMemBytes, CUstream hStream, void** kernelParams,
-  void** extra);
-typedef CUresult (*cuGetErrorStringPtr) (CUresult error, const char** pStr);
+typedef CUresult (*cuDeviceGetPtr)(CUdevice* device, int ordinal);
+typedef CUresult (*cuDevicePrimaryCtxRetainPtr)(CUcontext* pctx, CUdevice dev);
+typedef CUresult (*cuModuleLoadDataExPtr)(CUmodule* module,
+                                          const void* image,
+                                          unsigned int numOptions,
+                                          CUjit_option* options,
+                                          void** optionValues);
+typedef CUresult (*cuModuleGetFunctionPtr)(CUfunction* hfunc, CUmodule hmod, const char* name);
+typedef CUresult (*cuLaunchKernelPtr)(CUfunction f,
+                                      unsigned int gridDimX,
+                                      unsigned int gridDimY,
+                                      unsigned int gridDimZ,
+                                      unsigned int blockDimX,
+                                      unsigned int blockDimY,
+                                      unsigned int blockDimZ,
+                                      unsigned int sharedMemBytes,
+                                      CUstream hStream,
+                                      void** kernelParams,
+                                      void** extra);
+typedef CUresult (*cuGetErrorStringPtr)(CUresult error, const char** pStr);
 
 namespace mxnet {
 namespace common {
@@ -61,9 +69,9 @@ namespace cuda {
 namespace rtc {
 
 #if defined(_WIN32) || defined(_WIN64) || defined(__WINDOWS__)
-  const char cuda_lib_name[] = "nvcuda.dll";
+const char cuda_lib_name[] = "nvcuda.dll";
 #else
-  const char cuda_lib_name[] = "libcuda.so.1";
+const char cuda_lib_name[] = "libcuda.so.1";
 #endif
 
 std::mutex lock;
@@ -131,8 +139,8 @@ std::string GetCompiledCode(nvrtcProgram program, bool use_cubin) {
   const auto getSize = use_cubin ? nvrtcGetCUBINSize : nvrtcGetPTXSize;
   const auto getFunc = use_cubin ? nvrtcGetCUBIN : nvrtcGetPTX;
 #else
-  const auto getSize = nvrtcGetPTXSize;
-  const auto getFunc = nvrtcGetPTX;
+  const auto getSize                  = nvrtcGetPTXSize;
+  const auto getFunc                  = nvrtcGetPTX;
 #endif
   size_t ptx_size_including_null;
   NVRTC_CALL(getSize(program, &ptx_size_including_null));
@@ -145,8 +153,7 @@ std::string GetCompiledCode(nvrtcProgram program, bool use_cubin) {
 std::tuple<bool, std::string> GetArchString(const int sm_arch) {
   const int sm_arch_as_used = std::min(sm_arch, GetMaxSupportedArch());
   // Always use PTX for CUDA <= 11.0
-  const bool known_arch = (CUDA_VERSION > 11000) &&
-                          (sm_arch == sm_arch_as_used);
+  const bool known_arch = (CUDA_VERSION > 11000) && (sm_arch == sm_arch_as_used);
   if (known_arch) {
     return {known_arch, "sm_" + std::to_string(sm_arch_as_used)};
   } else {
@@ -156,9 +163,9 @@ std::tuple<bool, std::string> GetArchString(const int sm_arch) {
 
 }  // namespace
 
-CUfunction get_function(const std::string &parameters,
-                        const std::string &kernel_name,
-                        const std::string &code,
+CUfunction get_function(const std::string& parameters,
+                        const std::string& kernel_name,
+                        const std::string& code,
                         int dev_id) {
   constexpr int CACHESIZE_WARN_THRESHOLD = 10000;
   std::lock_guard<std::mutex> l(lock);
@@ -182,19 +189,11 @@ CUfunction get_function(const std::string &parameters,
   if (kinfo.ptx.size() == 0) {
     // It's the first time we've seen this kernel, so we need to generate the ptx and mangled_name.
     static std::string common_header =
-        std::string(fp16_support_string) + "\n" +
-        type_support_string + "\n" +
-        util_string + "\n" +
-        limits + "\n" +
-        special_functions_definitions + '\n' +
-        vectorization_support_string + "\n" +
-        function_definitions_util + "\n" +
-        function_definitions_binary + "\n" +
-        function_definitions_unary + "\n" +
-        backward_function_definitions + "\n" +
-        grad_function_definitions + "\n" +
-        reducer + "\n" +
-        logic_reducer + "\n";
+        std::string(fp16_support_string) + "\n" + type_support_string + "\n" + util_string + "\n" +
+        limits + "\n" + special_functions_definitions + '\n' + vectorization_support_string + "\n" +
+        function_definitions_util + "\n" + function_definitions_binary + "\n" +
+        function_definitions_unary + "\n" + backward_function_definitions + "\n" +
+        grad_function_definitions + "\n" + reducer + "\n" + logic_reducer + "\n";
     std::string code_with_header = common_header + parameters + code;
     // If verbose mode, output kernel source, though not including the common header
     if (dmlc::GetEnv("MXNET_RTC_VERBOSE", false)) {
@@ -207,25 +206,27 @@ CUfunction get_function(const std::string &parameters,
                    << ".  Set MXNET_RTC_SIZE_WARNING=0 to quiet this warning.";
     }
     nvrtcProgram program;
-    NVRTC_CALL(nvrtcCreateProgram(&program,                                  // prog
-                                  &code_with_header[0],                      // buffer
-                                  (kernel_name + "_kernel.cu").c_str(),      // name
-                                  0,                                         // num headers
-                                  nullptr,                                   // headers
-                                  nullptr));                                 // include names
-    const auto [use_cubin, gpu_arch] = GetArchString(sm_arch);  // NOLINT(*)
-    std::string gpu_arch_arg = "--gpu-architecture=" + gpu_arch;
-    const char *opts[] = {gpu_arch_arg.c_str(),
+    NVRTC_CALL(nvrtcCreateProgram(&program,                              // prog
+                                  &code_with_header[0],                  // buffer
+                                  (kernel_name + "_kernel.cu").c_str(),  // name
+                                  0,                                     // num headers
+                                  nullptr,                               // headers
+                                  nullptr));                             // include names
+    const auto [use_cubin, gpu_arch] = GetArchString(sm_arch);           // NOLINT(*)
+    std::string gpu_arch_arg         = "--gpu-architecture=" + gpu_arch;
+    const char* opts[]               = {
+      gpu_arch_arg.c_str(),
 #if NDEBUG == 0
-                          "-G",
+      "-G",
 #endif
-                          "--std=c++14"};
+      "--std=c++14"
+    };
     const std::string& kernel_name_demangled = kernel_name;
     NVRTC_CALL(nvrtcAddNameExpression(program, (kernel_name_demangled).c_str()));
 
-    nvrtcResult compileResult = nvrtcCompileProgram(program,                         // prog
+    nvrtcResult compileResult          = nvrtcCompileProgram(program,  // prog
                                                     sizeof(opts) / sizeof(opts[0]),  // num options
-                                                    opts);                           // options
+                                                    opts);  // options
     static const std::string dump_file = "mxnet_rtc_debug_code.log";
     if (compileResult != NVRTC_SUCCESS) {
       std::ofstream f(dump_file);
@@ -238,10 +239,8 @@ CUfunction get_function(const std::string &parameters,
         << GetCompileLog(program);
 
     kinfo.ptx = GetCompiledCode(program, use_cubin);
-    const char *mangled_name;
-    NVRTC_CALL(nvrtcGetLoweredName(program,
-                                   kernel_name_demangled.c_str(),
-                                   &mangled_name));
+    const char* mangled_name;
+    NVRTC_CALL(nvrtcGetLoweredName(program, kernel_name_demangled.c_str(), &mangled_name));
     kinfo.mangled_name = mangled_name;
     // Destroy the program.
     NVRTC_CALL(nvrtcDestroyProgram(&program));
@@ -257,7 +256,7 @@ CUfunction get_function(const std::string &parameters,
     cuDeviceGetPtr device_get_ptr = get_func<cuDeviceGetPtr>(cuda_lib_handle, "cuDeviceGet");
     CUDA_DRIVER_CALL((*device_get_ptr)(&cu_device, dev_id));
     cuDevicePrimaryCtxRetainPtr device_primary_ctx_retain_ptr =
-      get_func<cuDevicePrimaryCtxRetainPtr>(cuda_lib_handle, "cuDevicePrimaryCtxRetain");
+        get_func<cuDevicePrimaryCtxRetainPtr>(cuda_lib_handle, "cuDevicePrimaryCtxRetain");
     CUDA_DRIVER_CALL((*device_primary_ctx_retain_ptr)(&context, cu_device));
 
     // Jit-compile ptx for the driver's current context
@@ -265,25 +264,24 @@ CUfunction get_function(const std::string &parameters,
 
 #if NDEBUG == 0
     intptr_t debug_info = 1;
-    intptr_t line_info = 1;
+    intptr_t line_info  = 1;
 #else
     intptr_t debug_info = 0;
-    intptr_t line_info = 0;
+    intptr_t line_info  = 0;
 #endif
 
     CUjit_option jit_opts[] = {CU_JIT_GENERATE_DEBUG_INFO, CU_JIT_GENERATE_LINE_INFO};
-    void* jit_opt_values[] = {reinterpret_cast<void*>(debug_info),
+    void* jit_opt_values[]  = {reinterpret_cast<void*>(debug_info),
                               reinterpret_cast<void*>(line_info)};
 
     cuModuleLoadDataExPtr module_load_data_ex_ptr =
-      get_func<cuModuleLoadDataExPtr>(cuda_lib_handle, "cuModuleLoadDataEx");
-    CUDA_DRIVER_CALL((*module_load_data_ex_ptr)(&module, kinfo.ptx.c_str(), 2,
-                                                jit_opts, jit_opt_values));
+        get_func<cuModuleLoadDataExPtr>(cuda_lib_handle, "cuModuleLoadDataEx");
+    CUDA_DRIVER_CALL(
+        (*module_load_data_ex_ptr)(&module, kinfo.ptx.c_str(), 2, jit_opts, jit_opt_values));
     cuModuleGetFunctionPtr module_get_function_ptr =
-      get_func<cuModuleGetFunctionPtr>(cuda_lib_handle, "cuModuleGetFunction");
-    CUDA_DRIVER_CALL((*module_get_function_ptr)(&kinfo.functions[dev_id],
-                                                module,
-                                                kinfo.mangled_name.c_str()));
+        get_func<cuModuleGetFunctionPtr>(cuda_lib_handle, "cuModuleGetFunction");
+    CUDA_DRIVER_CALL(
+        (*module_get_function_ptr)(&kinfo.functions[dev_id], module, kinfo.mangled_name.c_str()));
   }
   return kinfo.functions[dev_id];
 }
@@ -292,32 +290,33 @@ void launch(CUfunction function,
             const dim3 grid_dim,
             const dim3 block_dim,
             unsigned int shared_mem_bytes,
-            mshadow::Stream<gpu> *stream,
-            std::vector<const void*> *args) {
-  CHECK(args->size() != 0) <<
-    "Empty argument list passed to a kernel.";
+            mshadow::Stream<gpu>* stream,
+            std::vector<const void*>* args) {
+  CHECK(args->size() != 0) << "Empty argument list passed to a kernel.";
   void* cuda_lib_handle = LibraryInitializer::Get()->lib_load(cuda_lib_name);
   cuLaunchKernelPtr launch_kernel_ptr =
-    get_func<cuLaunchKernelPtr>(cuda_lib_handle, "cuLaunchKernel");
+      get_func<cuLaunchKernelPtr>(cuda_lib_handle, "cuLaunchKernel");
   CUresult err = (*launch_kernel_ptr)(function,  // function to launch
-    grid_dim.x, grid_dim.y, grid_dim.z,       // grid dim
-    block_dim.x, block_dim.y, block_dim.z,    // block dim
-    shared_mem_bytes,                         // shared memory
-    mshadow::Stream<gpu>::GetStream(stream),  // stream
-    const_cast<void**>(args->data()),         // arguments
-    nullptr);  // );
+                                      grid_dim.x,
+                                      grid_dim.y,
+                                      grid_dim.z,  // grid dim
+                                      block_dim.x,
+                                      block_dim.y,
+                                      block_dim.z,                              // block dim
+                                      shared_mem_bytes,                         // shared memory
+                                      mshadow::Stream<gpu>::GetStream(stream),  // stream
+                                      const_cast<void**>(args->data()),         // arguments
+                                      nullptr);                                 // );
   if (err != CUDA_SUCCESS) {
     const char* error_string;
     cuGetErrorStringPtr get_error_string_ptr =
-      get_func<cuGetErrorStringPtr>(cuda_lib_handle, "cuGetErrorString");
+        get_func<cuGetErrorStringPtr>(cuda_lib_handle, "cuGetErrorString");
     (*get_error_string_ptr)(err, &error_string);
-    LOG(FATAL) << "cuLaunchKernel failed: "
-               << err << " " << error_string << ": "
+    LOG(FATAL) << "cuLaunchKernel failed: " << err << " " << error_string << ": "
                << reinterpret_cast<void*>(function) << " "
                << "(" << grid_dim.x << ", " << grid_dim.y << ", " << grid_dim.z << ") "
                << "(" << block_dim.x << ", " << block_dim.y << ", " << block_dim.z << ") "
-               << shared_mem_bytes << " "
-               << args->size();
+               << shared_mem_bytes << " " << args->size();
   }
 }
 
diff --git a/src/common/cuda/rtc.h b/src/common/cuda/rtc.h
index 8c36aa161927..449fb9f0a3ad 100644
--- a/src/common/cuda/rtc.h
+++ b/src/common/cuda/rtc.h
@@ -64,9 +64,9 @@ extern std::mutex lock;
  *  \param code used for compilation of the kernel if not found in cache
  *  \param dev_id id of the device which the kernel will be launched on
  */
-CUfunction get_function(const std::string &parameters,
-                        const std::string &kernel_name,
-                        const std::string &code,
+CUfunction get_function(const std::string& parameters,
+                        const std::string& kernel_name,
+                        const std::string& code,
                         int dev_id);
 
 /*! \brief Launch a GPU kernel.
@@ -81,8 +81,8 @@ void launch(CUfunction function,
             const dim3 grid_dim,
             const dim3 block_dim,
             unsigned int shared_mem_bytes,
-            mshadow::Stream<gpu> *stream,
-            std::vector<const void*> *args);
+            mshadow::Stream<gpu>* stream,
+            std::vector<const void*>* args);
 
 }  // namespace rtc
 }  // namespace cuda
diff --git a/src/common/cuda/rtc/reducer-inl.h b/src/common/cuda/rtc/reducer-inl.h
index f5b70d832594..b25cc55e5c7e 100644
--- a/src/common/cuda/rtc/reducer-inl.h
+++ b/src/common/cuda/rtc/reducer-inl.h
@@ -27,7 +27,6 @@ namespace common {
 namespace cuda {
 namespace rtc {
 
-
 const char reducer[] = R"code(
 namespace red {
 
@@ -617,4 +616,3 @@ struct argmin {
 #endif  // MXNET_USE_CUDA
 
 #endif  // MXNET_COMMON_CUDA_RTC_REDUCER_INL_H_
-
diff --git a/src/common/cuda/rtc/util-inl.h b/src/common/cuda/rtc/util-inl.h
index bafa8cf3f7e5..f294aa0ef2eb 100644
--- a/src/common/cuda/rtc/util-inl.h
+++ b/src/common/cuda/rtc/util-inl.h
@@ -48,11 +48,11 @@ static_assert(sizeof(int64) == 8, "Size of int64 is expected to be 8B");
 
 )code"
 #if MSHADOW_INT64_TENSOR_SIZE == 1
-"typedef int64 index_t;\n"
+                                   "typedef int64 index_t;\n"
 #else
-"typedef int32 index_t;\n"
+                                   "typedef int32 index_t;\n"
 #endif
-R"code(
+                                   R"code(
 // bool and int8 need to be accumulated in index_t
 // but bool needs to be treated in the special way
 // for ops like bitwise_not
diff --git a/src/common/cuda/rtc/vectorization-inl.h b/src/common/cuda/rtc/vectorization-inl.h
index 96205fceab3e..f5feab5fe2eb 100644
--- a/src/common/cuda/rtc/vectorization-inl.h
+++ b/src/common/cuda/rtc/vectorization-inl.h
@@ -265,20 +265,22 @@ class VectorizedStorer : public VectorizedAccessor<DType, nvec, aligned> {
 
 namespace {
 
-inline index_t get_num_aligned_elements(const void *ptr, const index_t lead_dim,
-                                        const int nvec, const int size) {
+inline index_t get_num_aligned_elements(const void* ptr,
+                                        const index_t lead_dim,
+                                        const int nvec,
+                                        const int size) {
   size_t ptr_as_number = reinterpret_cast<size_t>(ptr);
-  int alignment = (ptr_as_number % (nvec * size)) / size;
+  int alignment        = (ptr_as_number % (nvec * size)) / size;
   return (lead_dim + alignment + nvec - 1) / nvec;
 }
 
 enum class Alignment {
-  SAME_ALIGNED,  // All tensors aligned
+  SAME_ALIGNED,    // All tensors aligned
   SAME_UNALIGNED,  // All tensors have the same misalignment
-  DIFFERENT  // Tensors have different alignment
+  DIFFERENT        // Tensors have different alignment
 };
 
-inline int CalcAlignment(const void *ptr, const int size) {
+inline int CalcAlignment(const void* ptr, const int size) {
   size_t ptr_as_number = reinterpret_cast<size_t>(ptr);
   return ptr_as_number % size;
 }
@@ -292,18 +294,19 @@ inline int CalcAlignment(const void *ptr, const int size) {
    \param outputs Outputs of the operator.
 */
 template <typename Params>
-Alignment CheckAlignment(const Params& params, const index_t lead_dim,
-                         const index_t other_dim, const int nvec,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<TBlob> &outputs) {
+Alignment CheckAlignment(const Params& params,
+                         const index_t lead_dim,
+                         const index_t other_dim,
+                         const int nvec,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<TBlob>& outputs) {
   using namespace common;
   int align = -1;
 
   size_t i = 0;
-  for (const void *ptr : params.inputs) {
+  for (const void* ptr : params.inputs) {
     if (ptr != nullptr) {
-      int new_align = CalcAlignment(ptr,
-                                    mshadow_type_info(inputs[i].type_flag_).size * nvec);
+      int new_align = CalcAlignment(ptr, mshadow_type_info(inputs[i].type_flag_).size * nvec);
       if (align == -1) {
         align = new_align;
       } else {
@@ -316,10 +319,9 @@ Alignment CheckAlignment(const Params& params, const index_t lead_dim,
   }
 
   i = 0;
-  for (const void *ptr : params.outputs) {
+  for (const void* ptr : params.outputs) {
     if (ptr != nullptr) {
-      int new_align = CalcAlignment(ptr,
-                                    mshadow_type_info(outputs[i].type_flag_).size * nvec);
+      int new_align = CalcAlignment(ptr, mshadow_type_info(outputs[i].type_flag_).size * nvec);
       if (align == -1) {
         align = new_align;
       } else {
@@ -331,13 +333,11 @@ Alignment CheckAlignment(const Params& params, const index_t lead_dim,
     ++i;
   }
 
-  if ((other_dim != 1) &&
-      (lead_dim % nvec != 0)) {
+  if ((other_dim != 1) && (lead_dim % nvec != 0)) {
     return Alignment::DIFFERENT;
   }
 
-  if ((align == 0) &&
-      (lead_dim % nvec == 0)) {
+  if ((align == 0) && (lead_dim % nvec == 0)) {
     return Alignment::SAME_ALIGNED;
   } else {
     return Alignment::SAME_UNALIGNED;
@@ -366,24 +366,23 @@ constexpr int vectorized_kernel_thread_num = 512;
  *                Default is 0.
  */
 template <typename Params>
-void VectorizedKernelRTCLauncher(const std::string &parameters,
-                                 const std::string &kernel_name,
-                                 const std::string &code,
+void VectorizedKernelRTCLauncher(const std::string& parameters,
+                                 const std::string& kernel_name,
+                                 const std::string& code,
                                  int nvec,
                                  const index_t lead_dim,
                                  const index_t other_dim,
-                                 mshadow::Stream<gpu> *s,
+                                 mshadow::Stream<gpu>* s,
                                  const Params params,
-                                 const std::vector<TBlob> &inputs,
-                                 const std::vector<TBlob> &outputs,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<TBlob>& outputs,
                                  const int dev_id,
                                  const int lead_input_num = 0,
-                                 const index_t blocks = 0) {
+                                 const index_t blocks     = 0) {
   const index_t N = lead_dim * other_dim;
-  nvec = std::min(nvec, 4);  // Use at most 4-wide vectors
+  nvec            = std::min(nvec, 4);  // Use at most 4-wide vectors
   if (N != 0) {
-    auto align = CheckAlignment(params, lead_dim, other_dim,
-                                nvec, inputs, outputs);
+    auto align = CheckAlignment(params, lead_dim, other_dim, nvec, inputs, outputs);
     std::string kernel_builder;
     kernel_builder.reserve(2560);
 
@@ -413,21 +412,24 @@ void VectorizedKernelRTCLauncher(const std::string &parameters,
 
     switch (align) {
       case Alignment::SAME_ALIGNED:
-        kernel_builder += "const bool aligned = true;\n"
-                          "const int nvec = ";
+        kernel_builder +=
+            "const bool aligned = true;\n"
+            "const int nvec = ";
         kernel_builder += std::to_string(nvec);
         kernel_builder += ";\n";
         break;
       case Alignment::SAME_UNALIGNED:
-        kernel_builder += "const bool aligned = false;\n"
-                          "const int nvec = ";
+        kernel_builder +=
+            "const bool aligned = false;\n"
+            "const int nvec = ";
         kernel_builder += std::to_string(nvec);
         kernel_builder += ";\n";
         break;
       case Alignment::DIFFERENT: {
         // If the pointers are aligned differently we cannot vectorize
-        kernel_builder += "const bool aligned = true;\n"
-                          "const int nvec = 1;\n";
+        kernel_builder +=
+            "const bool aligned = true;\n"
+            "const int nvec = 1;\n";
         nvec = 1;
         break;
       }
@@ -435,36 +437,33 @@ void VectorizedKernelRTCLauncher(const std::string &parameters,
 
     kernel_builder += parameters;
 
-    index_t num_aligned_elements = get_num_aligned_elements(
-                                    params.inputs[lead_input_num],
-                                    lead_dim, nvec,
-                                    common::mshadow_type_info(
-                                      inputs[lead_input_num].type_flag_).size);
+    index_t num_aligned_elements =
+        get_num_aligned_elements(params.inputs[lead_input_num],
+                                 lead_dim,
+                                 nvec,
+                                 common::mshadow_type_info(inputs[lead_input_num].type_flag_).size);
     constexpr int threads = vectorized_kernel_thread_num;
     index_t num_blocks;
     if (blocks != 0) {
       num_blocks = blocks;
     } else {
-      size_t num_elements = other_dim * num_aligned_elements;
-      num_blocks = (num_elements + threads - 1) / threads;
+      size_t num_elements      = other_dim * num_aligned_elements;
+      num_blocks               = (num_elements + threads - 1) / threads;
       constexpr int max_blocks = 65535;
-      num_blocks = std::min(static_cast<int>(num_blocks), max_blocks);
+      num_blocks               = std::min(static_cast<int>(num_blocks), max_blocks);
     }
-    std::vector<const void*> args = {&params, &lead_dim, &other_dim,
-                                     &N, &num_aligned_elements};
-    auto function = common::cuda::rtc::get_function(kernel_builder,
-                                                    kernel_name,
-                                                    code,
-                                                    dev_id);
+    std::vector<const void*> args = {&params, &lead_dim, &other_dim, &N, &num_aligned_elements};
+    auto function = common::cuda::rtc::get_function(kernel_builder, kernel_name, code, dev_id);
 
     common::cuda::rtc::launch(function,
                               {static_cast<unsigned int>(num_blocks), 1, 1},
                               {static_cast<unsigned int>(threads), 1, 1},
-                              0, s, &args);
+                              0,
+                              s,
+                              &args);
   }
 }
 
-
 }  // namespace rtc
 }  // namespace cuda
 }  // namespace common
diff --git a/src/common/cuda/utils.cc b/src/common/cuda/utils.cc
index 7aa936dc9d4d..d04097bf1c57 100644
--- a/src/common/cuda/utils.cc
+++ b/src/common/cuda/utils.cc
@@ -53,13 +53,13 @@ int get_load_type(size_t N) {
 int get_rows_per_block(size_t row_size, int num_threads_per_block) {
   const int warp_size = 32;
   CHECK(IsPower2(num_threads_per_block))
-    << "Number of threads in a block must be power of 2 to use get_rows_per_block function";
+      << "Number of threads in a block must be power of 2 to use get_rows_per_block function";
   // How many read instructions should 1 thread at least do
-  const int read_instructions = 2;
+  const int read_instructions           = 2;
   const int desired_num_threads_per_row = (row_size + read_instructions - 1) / read_instructions;
-  int desired_num_warps_per_row = (desired_num_threads_per_row + warp_size - 1) / warp_size;
-  int actual_num_warps_per_row = std::min(desired_num_warps_per_row,
-                                          num_threads_per_block / warp_size);
+  int desired_num_warps_per_row         = (desired_num_threads_per_row + warp_size - 1) / warp_size;
+  int actual_num_warps_per_row =
+      std::min(desired_num_warps_per_row, num_threads_per_block / warp_size);
   // actual number of warps needs to be power of 2
   actual_num_warps_per_row = RoundToPower2(actual_num_warps_per_row);
   return num_threads_per_block / (warp_size * actual_num_warps_per_row);
diff --git a/src/common/cuda/utils.h b/src/common/cuda/utils.h
index a203ba55a773..63df34bf07d2 100644
--- a/src/common/cuda/utils.h
+++ b/src/common/cuda/utils.h
@@ -41,14 +41,21 @@
 #define __shared__
 inline void __syncthreads() {}
 inline void __threadfence_block() {}
-template<class T> inline T __clz(const T val) { return val; }
-struct __cuda_fake_struct { int x; int y; int z; };
+template <class T>
+inline T __clz(const T val) {
+  return val;
+}
+struct __cuda_fake_struct {
+  int x;
+  int y;
+  int z;
+};
 extern __cuda_fake_struct blockDim;
 extern __cuda_fake_struct threadIdx;
 extern __cuda_fake_struct blockIdx;
 #endif
 
-#define QUOTE(x) #x
+#define QUOTE(x)      #x
 #define QUOTEVALUE(x) QUOTE(x)
 
 #if MXNET_USE_CUDA
@@ -98,11 +105,10 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for CUDA errors after invocation of the expression.
  */
-#define CUDA_CALL(func)                                            \
-  {                                                                \
-    cudaError_t e = (func);                                        \
-    CHECK(e == cudaSuccess || e == cudaErrorCudartUnloading)       \
-        << "CUDA: " << cudaGetErrorString(e);                      \
+#define CUDA_CALL(func)                                                                            \
+  {                                                                                                \
+    cudaError_t e = (func);                                                                        \
+    CHECK(e == cudaSuccess || e == cudaErrorCudartUnloading) << "CUDA: " << cudaGetErrorString(e); \
   }
 
 /*!
@@ -111,10 +117,10 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for cuBLAS errors after invocation of the expression.
  */
-#define CUBLAS_CALL(func)                                       \
-  {                                                             \
-    cublasStatus_t e = (func);                                  \
-    CHECK_EQ(e, CUBLAS_STATUS_SUCCESS)                          \
+#define CUBLAS_CALL(func)                                              \
+  {                                                                    \
+    cublasStatus_t e = (func);                                         \
+    CHECK_EQ(e, CUBLAS_STATUS_SUCCESS)                                 \
         << "cuBLAS: " << mxnet::common::cuda::CublasGetErrorString(e); \
   }
 
@@ -124,10 +130,10 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for cuSolver errors after invocation of the expression.
  */
-#define CUSOLVER_CALL(func)                                         \
-  {                                                                 \
-    cusolverStatus_t e = (func);                                    \
-    CHECK_EQ(e, CUSOLVER_STATUS_SUCCESS)                            \
+#define CUSOLVER_CALL(func)                                                \
+  {                                                                        \
+    cusolverStatus_t e = (func);                                           \
+    CHECK_EQ(e, CUSOLVER_STATUS_SUCCESS)                                   \
         << "cuSolver: " << mxnet::common::cuda::CusolverGetErrorString(e); \
   }
 
@@ -137,10 +143,10 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for cuRAND errors after invocation of the expression.
  */
-#define CURAND_CALL(func)                                       \
-  {                                                             \
-    curandStatus_t e = (func);                                  \
-    CHECK_EQ(e, CURAND_STATUS_SUCCESS)                          \
+#define CURAND_CALL(func)                                              \
+  {                                                                    \
+    curandStatus_t e = (func);                                         \
+    CHECK_EQ(e, CURAND_STATUS_SUCCESS)                                 \
         << "cuRAND: " << mxnet::common::cuda::CurandGetErrorString(e); \
   }
 
@@ -150,12 +156,10 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for NVRTC errors after invocation of the expression.
  */
-#define NVRTC_CALL(x)                                   \
-  {                                                     \
-    nvrtcResult result = x;                             \
-    CHECK_EQ(result, NVRTC_SUCCESS)                     \
-      << #x " failed with error "                       \
-      << nvrtcGetErrorString(result);                   \
+#define NVRTC_CALL(x)                                                                           \
+  {                                                                                             \
+    nvrtcResult result = x;                                                                     \
+    CHECK_EQ(result, NVRTC_SUCCESS) << #x " failed with error " << nvrtcGetErrorString(result); \
   }
 
 /*!
@@ -164,20 +168,19 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for CUDA driver errors after invocation of the expression.
  */
-#define CUDA_DRIVER_CALL(func)                                          \
-  {                                                                     \
-    CUresult e = (func);                                                \
-    if (e != CUDA_SUCCESS) {                                            \
-      char const * err_msg = nullptr;                                   \
-      if (cuGetErrorString(e, &err_msg) == CUDA_ERROR_INVALID_VALUE) {  \
-        LOG(FATAL) << "CUDA Driver: Unknown error " << e;               \
-      } else {                                                          \
-        LOG(FATAL) << "CUDA Driver: " << e << " " << err_msg;           \
-      }                                                                 \
-    }                                                                   \
+#define CUDA_DRIVER_CALL(func)                                         \
+  {                                                                    \
+    CUresult e = (func);                                               \
+    if (e != CUDA_SUCCESS) {                                           \
+      char const* err_msg = nullptr;                                   \
+      if (cuGetErrorString(e, &err_msg) == CUDA_ERROR_INVALID_VALUE) { \
+        LOG(FATAL) << "CUDA Driver: Unknown error " << e;              \
+      } else {                                                         \
+        LOG(FATAL) << "CUDA Driver: " << e << " " << err_msg;          \
+      }                                                                \
+    }                                                                  \
   }
 
-
 #if MXNET_USE_NVML
 /*!
  * \brief Protected NVML call.
@@ -185,17 +188,15 @@ inline __device__ bool __is_supported_cuda_architecture() {
  *
  * It checks for NVML errors after invocation of the expression.
  */
-#define NVML_CALL(func)                                 \
-  {                                                     \
-    nvmlReturn_t result = (func);                       \
-    CHECK_EQ(result, NVML_SUCCESS)                      \
-      << #func " failed with error "                    \
-      << nvmlErrorString(result);                       \
+#define NVML_CALL(func)                                                                       \
+  {                                                                                           \
+    nvmlReturn_t result = (func);                                                             \
+    CHECK_EQ(result, NVML_SUCCESS) << #func " failed with error " << nvmlErrorString(result); \
   }
 #endif  // MXNET_USE_NVML
 
 #if !defined(_MSC_VER)
-#define CUDA_UNROLL _Pragma("unroll")
+#define CUDA_UNROLL   _Pragma("unroll")
 #define CUDA_NOUNROLL _Pragma("nounroll")
 #else
 #define CUDA_UNROLL
@@ -209,7 +210,7 @@ namespace cuda {
 /*!
  * \brief Converts between C++ datatypes and enums/constants needed by cuBLAS.
  */
-template<typename DType>
+template <typename DType>
 struct CublasType;
 
 // With CUDA v8, cuBLAS adopted use of cudaDataType_t instead of its own
@@ -218,7 +219,7 @@ struct CublasType;
 // call cublasGemmEx(), burdening the class with the legacy type values
 // was not needed.
 
-template<>
+template <>
 struct CublasType<float> {
   static const int kFlag = mshadow::kFloat32;
 #if CUDA_VERSION >= 8000
@@ -228,7 +229,7 @@ struct CublasType<float> {
   static const float one;
   static const float zero;
 };
-template<>
+template <>
 struct CublasType<double> {
   static const int kFlag = mshadow::kFloat64;
 #if CUDA_VERSION >= 8000
@@ -238,7 +239,7 @@ struct CublasType<double> {
   static const double one;
   static const double zero;
 };
-template<>
+template <>
 struct CublasType<mshadow::half::half_t> {
   static const int kFlag = mshadow::kFloat16;
 #if CUDA_VERSION >= 8000
@@ -248,24 +249,24 @@ struct CublasType<mshadow::half::half_t> {
   static const mshadow::half::half_t one;
   static const mshadow::half::half_t zero;
 };
-template<>
+template <>
 struct CublasType<uint8_t> {
   static const int kFlag = mshadow::kUint8;
 #if CUDA_VERSION >= 8000
   static const cudaDataType_t kCudaFlag = CUDA_R_8I;
 #endif
   typedef uint8_t ScaleType;
-  static const uint8_t one = 1;
+  static const uint8_t one  = 1;
   static const uint8_t zero = 0;
 };
-template<>
+template <>
 struct CublasType<int32_t> {
   static const int kFlag = mshadow::kInt32;
 #if CUDA_VERSION >= 8000
   static const cudaDataType_t kCudaFlag = CUDA_R_32I;
 #endif
   typedef int32_t ScaleType;
-  static const int32_t one = 1;
+  static const int32_t one  = 1;
   static const int32_t zero = 0;
 };
 
@@ -276,26 +277,26 @@ struct CublasType<int32_t> {
  */
 inline const char* CublasGetErrorString(cublasStatus_t error) {
   switch (error) {
-  case CUBLAS_STATUS_SUCCESS:
-    return "CUBLAS_STATUS_SUCCESS";
-  case CUBLAS_STATUS_NOT_INITIALIZED:
-    return "CUBLAS_STATUS_NOT_INITIALIZED";
-  case CUBLAS_STATUS_ALLOC_FAILED:
-    return "CUBLAS_STATUS_ALLOC_FAILED";
-  case CUBLAS_STATUS_INVALID_VALUE:
-    return "CUBLAS_STATUS_INVALID_VALUE";
-  case CUBLAS_STATUS_ARCH_MISMATCH:
-    return "CUBLAS_STATUS_ARCH_MISMATCH";
-  case CUBLAS_STATUS_MAPPING_ERROR:
-    return "CUBLAS_STATUS_MAPPING_ERROR";
-  case CUBLAS_STATUS_EXECUTION_FAILED:
-    return "CUBLAS_STATUS_EXECUTION_FAILED";
-  case CUBLAS_STATUS_INTERNAL_ERROR:
-    return "CUBLAS_STATUS_INTERNAL_ERROR";
-  case CUBLAS_STATUS_NOT_SUPPORTED:
-    return "CUBLAS_STATUS_NOT_SUPPORTED";
-  default:
-    break;
+    case CUBLAS_STATUS_SUCCESS:
+      return "CUBLAS_STATUS_SUCCESS";
+    case CUBLAS_STATUS_NOT_INITIALIZED:
+      return "CUBLAS_STATUS_NOT_INITIALIZED";
+    case CUBLAS_STATUS_ALLOC_FAILED:
+      return "CUBLAS_STATUS_ALLOC_FAILED";
+    case CUBLAS_STATUS_INVALID_VALUE:
+      return "CUBLAS_STATUS_INVALID_VALUE";
+    case CUBLAS_STATUS_ARCH_MISMATCH:
+      return "CUBLAS_STATUS_ARCH_MISMATCH";
+    case CUBLAS_STATUS_MAPPING_ERROR:
+      return "CUBLAS_STATUS_MAPPING_ERROR";
+    case CUBLAS_STATUS_EXECUTION_FAILED:
+      return "CUBLAS_STATUS_EXECUTION_FAILED";
+    case CUBLAS_STATUS_INTERNAL_ERROR:
+      return "CUBLAS_STATUS_INTERNAL_ERROR";
+    case CUBLAS_STATUS_NOT_SUPPORTED:
+      return "CUBLAS_STATUS_NOT_SUPPORTED";
+    default:
+      break;
   }
   return "Unknown cuBLAS status";
 }
@@ -318,24 +319,24 @@ inline cublasOperation_t CublasTransposeOp(bool transpose) {
  */
 inline const char* CusolverGetErrorString(cusolverStatus_t error) {
   switch (error) {
-  case CUSOLVER_STATUS_SUCCESS:
-    return "CUSOLVER_STATUS_SUCCESS";
-  case CUSOLVER_STATUS_NOT_INITIALIZED:
-    return "CUSOLVER_STATUS_NOT_INITIALIZED";
-  case CUSOLVER_STATUS_ALLOC_FAILED:
-    return "CUSOLVER_STATUS_ALLOC_FAILED";
-  case CUSOLVER_STATUS_INVALID_VALUE:
-    return "CUSOLVER_STATUS_INVALID_VALUE";
-  case CUSOLVER_STATUS_ARCH_MISMATCH:
-    return "CUSOLVER_STATUS_ARCH_MISMATCH";
-  case CUSOLVER_STATUS_EXECUTION_FAILED:
-    return "CUSOLVER_STATUS_EXECUTION_FAILED";
-  case CUSOLVER_STATUS_INTERNAL_ERROR:
-    return "CUSOLVER_STATUS_INTERNAL_ERROR";
-  case CUSOLVER_STATUS_MATRIX_TYPE_NOT_SUPPORTED:
-    return "CUSOLVER_STATUS_MATRIX_TYPE_NOT_SUPPORTED";
-  default:
-    break;
+    case CUSOLVER_STATUS_SUCCESS:
+      return "CUSOLVER_STATUS_SUCCESS";
+    case CUSOLVER_STATUS_NOT_INITIALIZED:
+      return "CUSOLVER_STATUS_NOT_INITIALIZED";
+    case CUSOLVER_STATUS_ALLOC_FAILED:
+      return "CUSOLVER_STATUS_ALLOC_FAILED";
+    case CUSOLVER_STATUS_INVALID_VALUE:
+      return "CUSOLVER_STATUS_INVALID_VALUE";
+    case CUSOLVER_STATUS_ARCH_MISMATCH:
+      return "CUSOLVER_STATUS_ARCH_MISMATCH";
+    case CUSOLVER_STATUS_EXECUTION_FAILED:
+      return "CUSOLVER_STATUS_EXECUTION_FAILED";
+    case CUSOLVER_STATUS_INTERNAL_ERROR:
+      return "CUSOLVER_STATUS_INTERNAL_ERROR";
+    case CUSOLVER_STATUS_MATRIX_TYPE_NOT_SUPPORTED:
+      return "CUSOLVER_STATUS_MATRIX_TYPE_NOT_SUPPORTED";
+    default:
+      break;
   }
   return "Unknown cuSOLVER status";
 }
@@ -347,53 +348,51 @@ inline const char* CusolverGetErrorString(cusolverStatus_t error) {
  */
 inline const char* CurandGetErrorString(curandStatus_t status) {
   switch (status) {
-  case CURAND_STATUS_SUCCESS:
-    return "CURAND_STATUS_SUCCESS";
-  case CURAND_STATUS_VERSION_MISMATCH:
-    return "CURAND_STATUS_VERSION_MISMATCH";
-  case CURAND_STATUS_NOT_INITIALIZED:
-    return "CURAND_STATUS_NOT_INITIALIZED";
-  case CURAND_STATUS_ALLOCATION_FAILED:
-    return "CURAND_STATUS_ALLOCATION_FAILED";
-  case CURAND_STATUS_TYPE_ERROR:
-    return "CURAND_STATUS_TYPE_ERROR";
-  case CURAND_STATUS_OUT_OF_RANGE:
-    return "CURAND_STATUS_OUT_OF_RANGE";
-  case CURAND_STATUS_LENGTH_NOT_MULTIPLE:
-    return "CURAND_STATUS_LENGTH_NOT_MULTIPLE";
-  case CURAND_STATUS_DOUBLE_PRECISION_REQUIRED:
-    return "CURAND_STATUS_DOUBLE_PRECISION_REQUIRED";
-  case CURAND_STATUS_LAUNCH_FAILURE:
-    return "CURAND_STATUS_LAUNCH_FAILURE";
-  case CURAND_STATUS_PREEXISTING_FAILURE:
-    return "CURAND_STATUS_PREEXISTING_FAILURE";
-  case CURAND_STATUS_INITIALIZATION_FAILED:
-    return "CURAND_STATUS_INITIALIZATION_FAILED";
-  case CURAND_STATUS_ARCH_MISMATCH:
-    return "CURAND_STATUS_ARCH_MISMATCH";
-  case CURAND_STATUS_INTERNAL_ERROR:
-    return "CURAND_STATUS_INTERNAL_ERROR";
+    case CURAND_STATUS_SUCCESS:
+      return "CURAND_STATUS_SUCCESS";
+    case CURAND_STATUS_VERSION_MISMATCH:
+      return "CURAND_STATUS_VERSION_MISMATCH";
+    case CURAND_STATUS_NOT_INITIALIZED:
+      return "CURAND_STATUS_NOT_INITIALIZED";
+    case CURAND_STATUS_ALLOCATION_FAILED:
+      return "CURAND_STATUS_ALLOCATION_FAILED";
+    case CURAND_STATUS_TYPE_ERROR:
+      return "CURAND_STATUS_TYPE_ERROR";
+    case CURAND_STATUS_OUT_OF_RANGE:
+      return "CURAND_STATUS_OUT_OF_RANGE";
+    case CURAND_STATUS_LENGTH_NOT_MULTIPLE:
+      return "CURAND_STATUS_LENGTH_NOT_MULTIPLE";
+    case CURAND_STATUS_DOUBLE_PRECISION_REQUIRED:
+      return "CURAND_STATUS_DOUBLE_PRECISION_REQUIRED";
+    case CURAND_STATUS_LAUNCH_FAILURE:
+      return "CURAND_STATUS_LAUNCH_FAILURE";
+    case CURAND_STATUS_PREEXISTING_FAILURE:
+      return "CURAND_STATUS_PREEXISTING_FAILURE";
+    case CURAND_STATUS_INITIALIZATION_FAILED:
+      return "CURAND_STATUS_INITIALIZATION_FAILED";
+    case CURAND_STATUS_ARCH_MISMATCH:
+      return "CURAND_STATUS_ARCH_MISMATCH";
+    case CURAND_STATUS_INTERNAL_ERROR:
+      return "CURAND_STATUS_INTERNAL_ERROR";
   }
   return "Unknown cuRAND status";
 }
 
 template <typename DType>
 inline DType __device__ CudaMax(DType a, DType b) {
-    return a > b ? a : b;
+  return a > b ? a : b;
 }
 
 template <typename DType>
 inline DType __device__ CudaMin(DType a, DType b) {
-    return a < b ? a : b;
+  return a < b ? a : b;
 }
 
 class DeviceStore {
  public:
   /*! \brief default constructor- only optionally restores previous device */
-  explicit DeviceStore(int requested_device = -1, bool restore = true) :
-    restore_device_(-1),
-    current_device_(requested_device),
-    restore_(restore) {
+  explicit DeviceStore(int requested_device = -1, bool restore = true)
+      : restore_device_(-1), current_device_(requested_device), restore_(restore) {
     if (restore_)
       CUDA_CALL(cudaGetDevice(&restore_device_));
     if (requested_device != restore_device_) {
@@ -402,9 +401,7 @@ class DeviceStore {
   }
 
   ~DeviceStore() {
-    if (restore_ &&
-        current_device_ != restore_device_ &&
-        current_device_ != -1 &&
+    if (restore_ && current_device_ != restore_device_ && current_device_ != -1 &&
         restore_device_ != -1)
       CUDA_CALL(cudaSetDevice(restore_device_));
   }
@@ -462,8 +459,10 @@ constexpr size_t kMaxNumGpus = 64;
  * \param attr_name A string representation of the attribute, for error messages.
  * \return the gpu's attribute value.
  */
-inline int cudaAttributeLookup(int device_id, std::vector<int32_t> *cached_values,
-                               cudaDeviceAttr attr, const char *attr_name) {
+inline int cudaAttributeLookup(int device_id,
+                               std::vector<int32_t>* cached_values,
+                               cudaDeviceAttr attr,
+                               const char* attr_name) {
   if (device_id < 0 || device_id >= static_cast<int>(cached_values->size())) {
     LOG(FATAL) << attr_name << "(device_id) called with invalid id: " << device_id;
   } else if ((*cached_values)[device_id] < 0) {
@@ -481,8 +480,8 @@ inline int cudaAttributeLookup(int device_id, std::vector<int32_t> *cached_value
  */
 inline int ComputeCapabilityMajor(int device_id) {
   static std::vector<int32_t> capability_major(kMaxNumGpus, -1);
-  return cudaAttributeLookup(device_id, &capability_major,
-                             cudaDevAttrComputeCapabilityMajor, "ComputeCapabilityMajor");
+  return cudaAttributeLookup(
+      device_id, &capability_major, cudaDevAttrComputeCapabilityMajor, "ComputeCapabilityMajor");
 }
 
 /*!
@@ -492,8 +491,8 @@ inline int ComputeCapabilityMajor(int device_id) {
  */
 inline int ComputeCapabilityMinor(int device_id) {
   static std::vector<int32_t> capability_minor(kMaxNumGpus, -1);
-  return cudaAttributeLookup(device_id, &capability_minor,
-                             cudaDevAttrComputeCapabilityMinor, "ComputeCapabilityMinor");
+  return cudaAttributeLookup(
+      device_id, &capability_minor, cudaDevAttrComputeCapabilityMinor, "ComputeCapabilityMinor");
 }
 
 /*!
@@ -514,8 +513,8 @@ inline int SMArch(int device_id) {
  */
 inline int MultiprocessorCount(int device_id) {
   static std::vector<int32_t> sm_counts(kMaxNumGpus, -1);
-  return cudaAttributeLookup(device_id, &sm_counts,
-                             cudaDevAttrMultiProcessorCount, "MultiprocessorCount");
+  return cudaAttributeLookup(
+      device_id, &sm_counts, cudaDevAttrMultiProcessorCount, "MultiprocessorCount");
 }
 
 /*!
@@ -525,7 +524,8 @@ inline int MultiprocessorCount(int device_id) {
  */
 inline int MaxSharedMemoryPerMultiprocessor(int device_id) {
   static std::vector<int32_t> max_smem_per_mutiprocessor(kMaxNumGpus, -1);
-  return cudaAttributeLookup(device_id, &max_smem_per_mutiprocessor,
+  return cudaAttributeLookup(device_id,
+                             &max_smem_per_mutiprocessor,
                              cudaDevAttrMaxSharedMemoryPerMultiprocessor,
                              "MaxSharedMemoryPerMultiprocessor");
 }
@@ -537,8 +537,8 @@ inline int MaxSharedMemoryPerMultiprocessor(int device_id) {
  */
 inline bool SupportsCooperativeLaunch(int device_id) {
   static std::vector<int32_t> coop_launch(kMaxNumGpus, -1);
-  return cudaAttributeLookup(device_id, &coop_launch,
-                             cudaDevAttrCooperativeLaunch, "SupportsCooperativeLaunch");
+  return cudaAttributeLookup(
+      device_id, &coop_launch, cudaDevAttrCooperativeLaunch, "SupportsCooperativeLaunch");
 }
 
 /*!
@@ -566,8 +566,7 @@ inline bool SupportsFloat16Compute(int device_id) {
  */
 inline bool SupportsTensorCore(int device_id) {
   // Volta (sm_70) supports TensorCore algos
-  return device_id >= 0 &&
-         ComputeCapabilityMajor(device_id) >=7;
+  return device_id >= 0 && ComputeCapabilityMajor(device_id) >= 7;
 }
 
 // The policy if the user hasn't set the environment variable MXNET_CUDA_ALLOW_TENSOR_CORE
@@ -582,12 +581,12 @@ inline bool GetEnvAllowTensorCore() {
   // separately in each compilation unit.  Not ideal, but cleaner than creating a
   // cuda_utils.cc solely to have a single instance and initialization.
   static bool allow_tensor_core = false;
-  static bool is_set = false;
+  static bool is_set            = false;
   if (!is_set) {
     // Use of optional<bool> here permits: "0", "1", "true" and "false" to all be legal.
     bool default_value = MXNET_CUDA_ALLOW_TENSOR_CORE_DEFAULT;
-    allow_tensor_core = dmlc::GetEnv("MXNET_CUDA_ALLOW_TENSOR_CORE",
-                                     dmlc::optional<bool>(default_value)).value();
+    allow_tensor_core =
+        dmlc::GetEnv("MXNET_CUDA_ALLOW_TENSOR_CORE", dmlc::optional<bool>(default_value)).value();
     is_set = true;
   }
   return allow_tensor_core;
@@ -630,19 +629,22 @@ inline cublasMath_t SetCublasMathMode(cublasHandle_t blas_handle, cublasMath_t n
 static_assert(CUDNN_PATCHLEVEL < 100 && CUDNN_MINOR < 10,
               "CUDNN_VERSION_AS_STRING macro assumptions violated.");
 #if CUDNN_PATCHLEVEL >= 10
-#define CUDNN_VERSION_AS_STRING QUOTEVALUE(CUDNN_MAJOR) \
-                                QUOTEVALUE(CUDNN_MINOR) \
-                                QUOTEVALUE(CUDNN_PATCHLEVEL)
+#define CUDNN_VERSION_AS_STRING \
+  QUOTEVALUE(CUDNN_MAJOR)       \
+  QUOTEVALUE(CUDNN_MINOR)       \
+  QUOTEVALUE(CUDNN_PATCHLEVEL)
 #else
-#define CUDNN_VERSION_AS_STRING QUOTEVALUE(CUDNN_MAJOR) \
-                                QUOTEVALUE(CUDNN_MINOR) \
-                                "0" QUOTEVALUE(CUDNN_PATCHLEVEL)
+#define CUDNN_VERSION_AS_STRING \
+  QUOTEVALUE(CUDNN_MAJOR)       \
+  QUOTEVALUE(CUDNN_MINOR)       \
+  "0" QUOTEVALUE(CUDNN_PATCHLEVEL)
 #endif
 
-#define STATIC_ASSERT_CUDNN_VERSION_GE(min_version) \
-  static_assert(CUDNN_VERSION >= min_version, "Compiled-against cuDNN version " \
-      CUDNN_VERSION_AS_STRING " is too old, please upgrade system to version " \
-      QUOTEVALUE(min_version) " or later.")
+#define STATIC_ASSERT_CUDNN_VERSION_GE(min_version)             \
+  static_assert(                                                \
+      CUDNN_VERSION >= min_version,                             \
+      "Compiled-against cuDNN version " CUDNN_VERSION_AS_STRING \
+      " is too old, please upgrade system to version " QUOTEVALUE(min_version) " or later.")
 
 #define CUDNN_CALL(func)                                                      \
   {                                                                           \
@@ -703,17 +705,16 @@ inline int MaxBackwardDataAlgos(cudnnHandle_t cudnn_handle) {
 // Overload atomicAdd to work for floats on all architectures
 #if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 600
 // From CUDA Programming Guide
-static inline  __device__  void atomicAdd(double *address, double val) {
-  unsigned long long* address_as_ull =                  // NOLINT(*)
-    reinterpret_cast<unsigned long long*>(address);     // NOLINT(*)
-  unsigned long long old = *address_as_ull;             // NOLINT(*)
-  unsigned long long assumed;                           // NOLINT(*)
+static inline __device__ void atomicAdd(double* address, double val) {
+  unsigned long long* address_as_ull =                 // NOLINT(*)
+      reinterpret_cast<unsigned long long*>(address);  // NOLINT(*)
+  unsigned long long old = *address_as_ull;            // NOLINT(*)
+  unsigned long long assumed;                          // NOLINT(*)
 
   do {
     assumed = old;
-    old = atomicCAS(address_as_ull, assumed,
-                    __double_as_longlong(val +
-                    __longlong_as_double(assumed)));
+    old     = atomicCAS(
+        address_as_ull, assumed, __double_as_longlong(val + __longlong_as_double(assumed)));
 
     // Note: uses integer comparison to avoid hang in case of NaN (since NaN != NaN)
   } while (assumed != old);
@@ -724,68 +725,65 @@ static inline  __device__  void atomicAdd(double *address, double val) {
 // Taken from:
 // https://github.com/torch/cutorch/blob/master/lib/THC/THCAtomics.cuh
 #ifdef __CUDACC__
-static inline __device__ void atomicAdd(mshadow::half::half_t *address,
-                                        mshadow::half::half_t val) {
-  unsigned int *address_as_ui =
-      reinterpret_cast<unsigned int *>(reinterpret_cast<char *>(address) -
-                                   (reinterpret_cast<size_t>(address) & 2));
+static inline __device__ void atomicAdd(mshadow::half::half_t* address, mshadow::half::half_t val) {
+  unsigned int* address_as_ui = reinterpret_cast<unsigned int*>(
+      reinterpret_cast<char*>(address) - (reinterpret_cast<size_t>(address) & 2));
   unsigned int old = *address_as_ui;
   unsigned int assumed;
 
   do {
     assumed = old;
     mshadow::half::half_t hsum;
-    hsum.half_ =
-        reinterpret_cast<size_t>(address) & 2 ? (old >> 16) : (old & 0xffff);
+    hsum.half_ = reinterpret_cast<size_t>(address) & 2 ? (old >> 16) : (old & 0xffff);
     hsum += val;
-    old = reinterpret_cast<size_t>(address) & 2
-              ? (old & 0xffff) | (hsum.half_ << 16)
-              : (old & 0xffff0000) | hsum.half_;
+    old = reinterpret_cast<size_t>(address) & 2 ? (old & 0xffff) | (hsum.half_ << 16)
+                                                : (old & 0xffff0000) | hsum.half_;
     old = atomicCAS(address_as_ui, assumed, old);
   } while (assumed != old);
 }
 
-static inline __device__ void atomicAdd(uint8_t *address, uint8_t val) {
-  unsigned int * address_as_ui = (unsigned int *) (address - ((size_t)address & 0x3));
-  unsigned int old = *address_as_ui;
-  unsigned int shift = (((size_t)address & 0x3) << 3);
+static inline __device__ void atomicAdd(uint8_t* address, uint8_t val) {
+  unsigned int* address_as_ui = (unsigned int*)(address - ((size_t)address & 0x3));
+  unsigned int old            = *address_as_ui;
+  unsigned int shift          = (((size_t)address & 0x3) << 3);
   unsigned int sum;
   unsigned int assumed;
 
   do {
     assumed = old;
-    sum = val + static_cast<uint8_t>((old >> shift) & 0xff);
-    old = (old & ~(0x000000ff << shift)) | (sum << shift);
-    old = atomicCAS(address_as_ui, assumed, old);
+    sum     = val + static_cast<uint8_t>((old >> shift) & 0xff);
+    old     = (old & ~(0x000000ff << shift)) | (sum << shift);
+    old     = atomicCAS(address_as_ui, assumed, old);
   } while (assumed != old);
 }
 
-static inline __device__ void atomicAdd(int8_t *address, int8_t val) {
-  unsigned int * address_as_ui = (unsigned int *) (address - ((size_t)address & 0x3));
-  unsigned int old = *address_as_ui;
-  unsigned int shift = (((size_t)address & 0x3) << 3);
+static inline __device__ void atomicAdd(int8_t* address, int8_t val) {
+  unsigned int* address_as_ui = (unsigned int*)(address - ((size_t)address & 0x3));
+  unsigned int old            = *address_as_ui;
+  unsigned int shift          = (((size_t)address & 0x3) << 3);
   unsigned int sum;
   unsigned int assumed;
 
   do {
     assumed = old;
-    sum = val + static_cast<int8_t>((old >> shift) & 0xff);
-    old = (old & ~(0x000000ff << shift)) | (sum << shift);
-    old = atomicCAS(address_as_ui, assumed, old);
+    sum     = val + static_cast<int8_t>((old >> shift) & 0xff);
+    old     = (old & ~(0x000000ff << shift)) | (sum << shift);
+    old     = atomicCAS(address_as_ui, assumed, old);
   } while (assumed != old);
 }
 
 // Overload atomicAdd to work for signed int64 on all architectures
-static inline  __device__  void atomicAdd(int64_t *address, int64_t val) {
-  atomicAdd(reinterpret_cast<unsigned long long*>(address), static_cast<unsigned long long>(val)); // NOLINT
+static inline __device__ void atomicAdd(int64_t* address, int64_t val) {
+  atomicAdd(reinterpret_cast<unsigned long long*>(address),  // NOLINT
+            static_cast<unsigned long long>(val));           // NOLINT
 }
 
 template <typename DType>
 __device__ inline DType ldg(const DType* address) {
 #if __CUDA_ARCH__ >= 350
-    return __ldg(address);
+  return __ldg(address);
 #else
-    return *address;
+  return *address;
 #endif
 }
 
@@ -806,7 +804,8 @@ template <int NVALUES = warp_size, typename OP, typename T>
 __device__ inline T warp_reduce(T value, OP redfun) {
 #pragma unroll
   for (int i = warp_size / 2; i >= 1; i /= 2) {
-    if (NVALUES > i) value = redfun(value, __shfl_down_sync(0xffffffff, value, i));
+    if (NVALUES > i)
+      value = redfun(value, __shfl_down_sync(0xffffffff, value, i));
   }
   return value;
 }
@@ -824,7 +823,8 @@ __device__ inline mshadow::half::half_t warp_reduce(mshadow::half::half_t value,
   float v = static_cast<float>(value);
 #pragma unroll
   for (int i = warp_size / 2; i >= 1; i /= 2) {
-    if (NValues > i) v = redfun(v, __shfl_down_sync(0xffffffff, v, i));
+    if (NValues > i)
+      v = redfun(v, __shfl_down_sync(0xffffffff, v, i));
   }
   return mshadow::half::half_t(v);
 }
@@ -843,12 +843,11 @@ __device__ inline mshadow::half::half_t warp_reduce(mshadow::half::half_t value,
  */
 template <int NTHREADS, bool all_reduce = true, typename OP, typename T>
 __device__ inline T reduce(const T& value, OP redfun) {
-  static_assert(NTHREADS <= warp_size * warp_size,
-                "Number of threads too large for reduction");
+  static_assert(NTHREADS <= warp_size * warp_size, "Number of threads too large for reduction");
   __shared__ T scratch[NTHREADS / warp_size];
   const int thread_idx_in_warp = threadIdx.x % warp_size;
-  const int warp_id = threadIdx.x / warp_size;
-  const T my_val = warp_reduce<warp_size>(value, redfun);
+  const int warp_id            = threadIdx.x / warp_size;
+  const T my_val               = warp_reduce<warp_size>(value, redfun);
   if (thread_idx_in_warp == 0) {
     scratch[warp_id] = my_val;
   }
@@ -856,7 +855,7 @@ __device__ inline T reduce(const T& value, OP redfun) {
   T ret = 0;
   if (warp_id == 0) {
     const T prev_val = threadIdx.x < (NTHREADS / warp_size) ? scratch[threadIdx.x] : 0;
-    const T my_val = warp_reduce<NTHREADS / warp_size>(prev_val, redfun);
+    const T my_val   = warp_reduce<NTHREADS / warp_size>(prev_val, redfun);
     if (all_reduce) {
       scratch[threadIdx.x] = my_val;
     } else {
diff --git a/src/common/exec_utils.cc b/src/common/exec_utils.cc
index 601d1c0b6d96..bbc11e12a708 100644
--- a/src/common/exec_utils.cc
+++ b/src/common/exec_utils.cc
@@ -30,26 +30,26 @@
 namespace mxnet {
 namespace common {
 
-void CopyGraph(nnvm::Graph *dst, const nnvm::Graph &src, bool copy_variables) {
+void CopyGraph(nnvm::Graph* dst, const nnvm::Graph& src, bool copy_variables) {
   using nnvm::Node;
-  using nnvm::ObjectPtr;
   using nnvm::NodeEntry;
+  using nnvm::ObjectPtr;
   std::unordered_map<Node*, ObjectPtr> old_new;
   // use DFSVisit to copy all the nodes
   DFSVisit(src.outputs, [&old_new, copy_variables](const ObjectPtr& node) {
-      ObjectPtr np;
-      if (copy_variables || !node->is_variable()) {
-        np = Node::Create();
-        np->attrs = node->attrs;
-      } else {
-        np = node;
-      }
-      old_new[node.get()] = std::move(np);
-    });
+    ObjectPtr np;
+    if (copy_variables || !node->is_variable()) {
+      np        = Node::Create();
+      np->attrs = node->attrs;
+    } else {
+      np = node;
+    }
+    old_new[node.get()] = std::move(np);
+  });
   // connect nodes of new graph
-  for (const auto &kv : old_new) {
+  for (const auto& kv : old_new) {
     for (const NodeEntry& e : kv.first->inputs) {
-      Node *ptr = e.node.get();
+      Node* ptr = e.node.get();
       kv.second->inputs.emplace_back(NodeEntry{old_new[ptr], e.index, e.version});
     }
     for (const ObjectPtr& p : kv.first->control_deps) {
@@ -57,15 +57,15 @@ void CopyGraph(nnvm::Graph *dst, const nnvm::Graph &src, bool copy_variables) {
     }
   }
   // set the head
-  for (const NodeEntry &e : src.outputs) {
+  for (const NodeEntry& e : src.outputs) {
     (*dst).outputs.emplace_back(NodeEntry{old_new[e.node.get()], e.index, e.version});
   }
 }
 
-bool CheckForInputNameDuplicates(const nnvm::IndexedGraph &idx) {
+bool CheckForInputNameDuplicates(const nnvm::IndexedGraph& idx) {
   std::unordered_set<std::string> names;
   for (const auto& nid : idx.input_nodes()) {
-    const std::string &name = idx[nid].source->attrs.name;
+    const std::string& name = idx[nid].source->attrs.name;
     if (names.count(name)) {
       LOG(WARNING) << "Variable name " << name << " is used more than once!";
       return false;
diff --git a/src/common/exec_utils.h b/src/common/exec_utils.h
index 80936a916b4d..ec2aa7cb6975 100644
--- a/src/common/exec_utils.h
+++ b/src/common/exec_utils.h
@@ -37,10 +37,10 @@ namespace mxnet {
 namespace common {
 
 #if MXNET_USE_ONEDNN == 1
-     // We have to make sure it's default storage and default layout.
-#define DEFAULT_DATA(x)    x.IsDefaultData()
+// We have to make sure it's default storage and default layout.
+#define DEFAULT_DATA(x) x.IsDefaultData()
 #else
-#define DEFAULT_DATA(x)    (x.storage_type() == kDefaultStorage)
+#define DEFAULT_DATA(x) (x.storage_type() == kDefaultStorage)
 #endif
 
 /*
@@ -57,18 +57,18 @@ namespace common {
  * \return true if any source NDArray need to cast storage
  */
 inline bool SetupDefaultBlobsIn(const std::vector<NDArray>& src,
-                                const std::vector<NDArray> *bufs,
-                                std::vector<TBlob> *blobs,
-                                std::vector<NDArray> *temp_src,
-                                std::vector<NDArray> *temp_dst,
-                                std::unordered_map<uint32_t, uint32_t> *idx_map) {
+                                const std::vector<NDArray>* bufs,
+                                std::vector<TBlob>* blobs,
+                                std::vector<NDArray>* temp_src,
+                                std::vector<NDArray>* temp_dst,
+                                std::unordered_map<uint32_t, uint32_t>* idx_map) {
   bool require_cast = false;
   for (size_t i = 0; i < src.size(); i++) {
     const auto& nd = src[i];
     if (!DEFAULT_DATA(nd)) {
       (*idx_map)[i] = temp_dst->size();
-      NDArray temp = bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(),
-                                                             true, nd.dtype());
+      NDArray temp =
+          bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(), true, nd.dtype());
 #if MXNET_USE_ONEDNN == 1
       CHECK(temp.IsDefaultData());
 #endif
@@ -84,11 +84,11 @@ inline bool SetupDefaultBlobsIn(const std::vector<NDArray>& src,
 }
 
 inline bool SetupDefaultBlobsOut(const std::vector<NDArray>& src,
-                                 const std::vector<NDArray> *bufs,
-                                 std::vector<OpReqType> *req,
-                                 std::vector<TBlob> *blobs,
-                                 std::vector<NDArray> *temp_src,
-                                 std::vector<NDArray> *temp_dst) {
+                                 const std::vector<NDArray>* bufs,
+                                 std::vector<OpReqType>* req,
+                                 std::vector<TBlob>* blobs,
+                                 std::vector<NDArray>* temp_src,
+                                 std::vector<NDArray>* temp_dst) {
   bool require_cast = false;
   for (size_t i = 0; i < src.size(); i++) {
     const auto& nd = src[i];
@@ -100,7 +100,7 @@ inline bool SetupDefaultBlobsOut(const std::vector<NDArray>& src,
       // the input array and the output array are no longer the same array.
       // we should change the request type.
       req->at(i) = kWriteTo;
-    // We have to make sure it's default storage and default layout.
+      // We have to make sure it's default storage and default layout.
 #endif
     if (!DEFAULT_DATA(nd)) {
 #if MXNET_USE_ONEDNN == 1
@@ -108,14 +108,14 @@ inline bool SetupDefaultBlobsOut(const std::vector<NDArray>& src,
       if (bufs != nullptr) {
         temp = bufs->at(i);
       } else if (kAddTo == req->at(i)) {
-        temp = nd.IsMKLDNNData()? nd.Reorder2Default() : nd;
+        temp = nd.IsMKLDNNData() ? nd.Reorder2Default() : nd;
       } else {
         temp = NDArray(nd.shape(), nd.ctx(), true, nd.dtype());
       }
       CHECK(temp.IsDefaultData());
 #else
-      NDArray temp = bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(),
-          true, nd.dtype());
+      NDArray temp =
+          bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(), true, nd.dtype());
 #endif
       temp_src->emplace_back(nd);
       temp_dst->emplace_back(temp);
@@ -135,25 +135,23 @@ inline bool SetupDefaultBlobsOut(const std::vector<NDArray>& src,
  *        function also records the indices of non-default source NDArrays and the indices of
  *        their corresponding temporary NDArrays in the temp array.
  */
-inline void SetupDefaultBlobsInOut(const std::vector<NDArray> &ndinputs,
-                                   const std::vector<NDArray> &ndoutputs,
-                                   const std::vector<NDArray> *in_bufs,
-                                   const std::vector<NDArray> *out_bufs,
-                                   std::vector<OpReqType> *req,
-                                   std::vector<TBlob> *input_blobs,
-                                   std::vector<TBlob> *output_blobs,
-                                   std::vector<NDArray> *pre_temp_src,
-                                   std::vector<NDArray> *pre_temp_dst,
-                                   std::vector<NDArray> *post_temp_src,
-                                   std::vector<NDArray> *post_temp_dst,
-                                   std::unordered_map<uint32_t, uint32_t> *in_temp_idx_map,
-                                   const std::vector<uint32_t> &mutate_idx) {
+inline void SetupDefaultBlobsInOut(const std::vector<NDArray>& ndinputs,
+                                   const std::vector<NDArray>& ndoutputs,
+                                   const std::vector<NDArray>* in_bufs,
+                                   const std::vector<NDArray>* out_bufs,
+                                   std::vector<OpReqType>* req,
+                                   std::vector<TBlob>* input_blobs,
+                                   std::vector<TBlob>* output_blobs,
+                                   std::vector<NDArray>* pre_temp_src,
+                                   std::vector<NDArray>* pre_temp_dst,
+                                   std::vector<NDArray>* post_temp_src,
+                                   std::vector<NDArray>* post_temp_dst,
+                                   std::unordered_map<uint32_t, uint32_t>* in_temp_idx_map,
+                                   const std::vector<uint32_t>& mutate_idx) {
   // populate input blobs
-  SetupDefaultBlobsIn(ndinputs, in_bufs, input_blobs, pre_temp_src, pre_temp_dst,
-                      in_temp_idx_map);
+  SetupDefaultBlobsIn(ndinputs, in_bufs, input_blobs, pre_temp_src, pre_temp_dst, in_temp_idx_map);
   // populate output blobs
-  SetupDefaultBlobsOut(ndoutputs, out_bufs, req, output_blobs, post_temp_dst,
-                       post_temp_src);
+  SetupDefaultBlobsOut(ndoutputs, out_bufs, req, output_blobs, post_temp_dst, post_temp_src);
   // add mutable inputs to post temp list
   for (const auto idx : mutate_idx) {
     auto map_iter = in_temp_idx_map->find(idx);
@@ -193,22 +191,25 @@ inline void CastNonDefaultStorage(const std::vector<NDArray>& src,
  *         types to the same type of one of the inputs or outputs.
  */
 inline bool SameType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *iattr,
-                     std::vector<int> *oattr) {
+                     std::vector<int>* iattr,
+                     std::vector<int>* oattr) {
   int def_v = -1;
   for (int v : *oattr) {
     if (v != -1) {
-      def_v = v; break;
+      def_v = v;
+      break;
     }
   }
   if (def_v == -1) {
     for (int v : *iattr) {
       if (v != -1) {
-        def_v = v; break;
+        def_v = v;
+        break;
       }
     }
   }
-  if (def_v == -1) return false;
+  if (def_v == -1)
+    return false;
   for (int& v : *oattr) {
     v = def_v;
   }
@@ -218,7 +219,6 @@ inline bool SameType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-
 /*! \brief The default storage type inference function, which assigns all undefined
  *         storage types to kDefaultStorage. If all of input and output storage types
  *         are kDefaultStorage, DispatchMode::kFCompute is assigned to dispatch_mode. Otherwise,
@@ -227,16 +227,20 @@ inline bool SameType(const nnvm::NodeAttrs& attrs,
 inline bool DefaultStorageType(const nnvm::NodeAttrs& attrs,
                                const int dev_mask,
                                DispatchMode* dispatch_mode,
-                               std::vector<int> *iattr,
-                               std::vector<int> *oattr) {
+                               std::vector<int>* iattr,
+                               std::vector<int>* oattr) {
   bool fallback = false;
   for (int& v : *oattr) {
-    if (v == -1) v = kDefaultStorage;
-    if (v != kDefaultStorage) fallback = true;
+    if (v == -1)
+      v = kDefaultStorage;
+    if (v != kDefaultStorage)
+      fallback = true;
   }
   for (int& v : *iattr) {
-    if (v == -1) v = kDefaultStorage;
-    if (v != kDefaultStorage) fallback = true;
+    if (v == -1)
+      v = kDefaultStorage;
+    if (v != kDefaultStorage)
+      fallback = true;
   }
   if (*dispatch_mode == DispatchMode::kUndefined) {
     if (fallback) {
@@ -282,15 +286,15 @@ inline std::string storage_str(int storage_id) {
    ...
  */
 inline void LogMemoryPlan(const nnvm::Graph& g) {
-  const auto &idx = g.indexed_graph();
+  const auto& idx    = g.indexed_graph();
   const auto& vshape = g.GetAttr<mxnet::ShapeVector>("shape");
-  const auto& vtype = g.GetAttr<nnvm::DTypeVector>("dtype");
+  const auto& vtype  = g.GetAttr<nnvm::DTypeVector>("dtype");
   // find node range
   uint32_t node_start = 0, node_end = idx.num_nodes();
   if (g.attrs.count("node_range")) {
     const auto& range = g.GetAttr<std::pair<uint32_t, uint32_t> >("node_range");
-    node_start = range.first;
-    node_end = range.second;
+    node_start        = range.first;
+    node_end          = range.second;
   }
   for (uint32_t nid = node_start; nid < node_end; ++nid) {
     const auto& inode = idx[nid];
@@ -299,16 +303,14 @@ inline void LogMemoryPlan(const nnvm::Graph& g) {
     } else {
       LOG(INFO) << "node " << nid << " " << inode.source->attrs.op->name;
       for (const auto& e : inode.inputs) {
-        auto eid = idx.entry_id(e);
+        auto eid          = idx.entry_id(e);
         size_t kilo_bytes = vshape[eid].Size() * mshadow::mshadow_sizeof(vtype[eid]) / 1024;
-        LOG(INFO) << "\t\tinput " << eid << ": " << vshape[eid] << " ("
-                  << kilo_bytes << " KB)";
+        LOG(INFO) << "\t\tinput " << eid << ": " << vshape[eid] << " (" << kilo_bytes << " KB)";
       }
       for (uint32_t index = 0; index < inode.source->num_outputs(); ++index) {
-        uint32_t eid = idx.entry_id(nid, index);
+        uint32_t eid      = idx.entry_id(nid, index);
         size_t kilo_bytes = vshape[eid].Size() * mshadow::mshadow_sizeof(vtype[eid]) / 1024;
-        LOG(INFO) << "\t\toutput " << eid << ": " << vshape[eid] << " ("
-                  << kilo_bytes << " KB)";
+        LOG(INFO) << "\t\toutput " << eid << ": " << vshape[eid] << " (" << kilo_bytes << " KB)";
       }
     }
   }
@@ -340,22 +342,22 @@ inline void LogMemoryPlan(const nnvm::Graph& g) {
     ...
  */
 inline void LogInferStorage(const nnvm::Graph& g) {
-  const auto &idx = g.indexed_graph();
-  const auto& vstorage_type = g.GetAttr<StorageTypeVector>("storage_type");
+  const auto& idx            = g.indexed_graph();
+  const auto& vstorage_type  = g.GetAttr<StorageTypeVector>("storage_type");
   const auto& dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
   uint32_t node_start = 0, node_end = idx.num_nodes();
   if (g.attrs.count("node_range")) {
     const auto& range = g.GetAttr<std::pair<uint32_t, uint32_t> >("node_range");
-    node_start = range.first;
-    node_end = range.second;
+    node_start        = range.first;
+    node_end          = range.second;
   }
   for (uint32_t nid = node_start; nid < node_end; ++nid) {
     const auto& inode = idx[nid];
     if (inode.source->is_variable()) {
       LOG(INFO) << "node " << nid << " var";
     } else {
-      LOG(INFO) << "node " << nid << " " << inode.source->attrs.op->name
-                << ": " << dispatch_mode_string(dispatch_modes[nid]);
+      LOG(INFO) << "node " << nid << " " << inode.source->attrs.op->name << ": "
+                << dispatch_mode_string(dispatch_modes[nid]);
       for (const auto& e : inode.inputs) {
         auto eid = idx.entry_id(e);
         LOG(INFO) << "\t\tinput " << eid << ": " << stype_string(vstorage_type[eid]);
@@ -432,39 +434,39 @@ inline nnvm::Graph AssignContext(nnvm::Graph g,
                                  const std::vector<OpReqType>& grad_req_types,
                                  size_t num_forward_inputs,
                                  size_t num_forward_outputs) {
-  const auto& idx = g.indexed_graph();
+  const auto& idx           = g.indexed_graph();
   const auto& mutable_nodes = idx.mutable_input_nodes();
   // default use default context.
   if (ctx_map.size() == 0) {
-    g.attrs["context"] = std::make_shared<nnvm::any>(
-        exec::ContextVector(idx.num_nodes(), default_ctx));
+    g.attrs["context"] =
+        std::make_shared<nnvm::any>(exec::ContextVector(idx.num_nodes(), default_ctx));
     for (const auto& x : in_arg_ctxes) {
-      CHECK(x == default_ctx)
-          << "Input array is in " << x << " while binding with ctx=" << default_ctx
-          << ". All arguments must be in global context (" << default_ctx
-          << ") unless group2ctx is specified for cross-device graph.";
+      CHECK(x == default_ctx) << "Input array is in " << x
+                              << " while binding with ctx=" << default_ctx
+                              << ". All arguments must be in global context (" << default_ctx
+                              << ") unless group2ctx is specified for cross-device graph.";
     }
     for (const auto& x : arg_grad_ctxes) {
-      CHECK(x == default_ctx)
-          << "Gradient array is in " << x << " while binding with ctx="
-          << default_ctx << ". All gradients must be in global context (" << default_ctx
-          << ") unless group2ctx is specified for cross-device graph.";
+      CHECK(x == default_ctx) << "Gradient array is in " << x
+                              << " while binding with ctx=" << default_ctx
+                              << ". All gradients must be in global context (" << default_ctx
+                              << ") unless group2ctx is specified for cross-device graph.";
     }
     return g;
   }
 
   // otherwise, use context assignment.
-  std::map<Context, int> ctx2id;  // map ctx to device id
-  std::vector<Context> ctx_list;  // index is device id
+  std::map<Context, int> ctx2id;                   // map ctx to device id
+  std::vector<Context> ctx_list;                   // index is device id
   nnvm::DeviceVector device(idx.num_nodes(), -1);  // index is node id
-  nnvm::DeviceAssignMap device_map;  // map arg name to device id
+  nnvm::DeviceAssignMap device_map;                // map arg name to device id
 
   // loop through the user input ctx_map and
   // populate maps and lists
-  for (auto &kv : ctx_map) {
+  for (auto& kv : ctx_map) {
     if (ctx2id.count(kv.second) == 0) {  // if context has no device id, create one
       ctx2id[kv.second] = static_cast<int>(ctx_list.size());  // assign device id to ctx
-      ctx_list.push_back(kv.second);  // save ctx to the list
+      ctx_list.push_back(kv.second);                          // save ctx to the list
     }
     // assign device id to to the arg name with the corresponding ctx
     device_map[kv.first] = ctx2id.at(kv.second);
@@ -487,7 +489,7 @@ inline nnvm::Graph AssignContext(nnvm::Graph g,
     }
     if (ctx2id.count(ctx) == 0) {  // if the current ctx is not in the map of ctx and device id
       ctx2id[ctx] = static_cast<int>(ctx_list.size());  // assign the current ctx with device id
-      ctx_list.push_back(ctx);  // save the current ctx in the list
+      ctx_list.push_back(ctx);                          // save the current ctx in the list
     }
     device[nid] = ctx2id.at(ctx);  // assign device id to the current node
   }
@@ -500,9 +502,10 @@ inline nnvm::Graph AssignContext(nnvm::Graph g,
   CHECK_GE(grad_req_types.size(), g.outputs.size() - num_forward_outputs)
       << "insufficient number of grad_reqs";
   for (size_t i = num_forward_outputs; i < g.outputs.size(); ++i, ++arg_grad_offset) {
-    while (grad_req_types[arg_grad_offset] == kNullOp) ++arg_grad_offset;
+    while (grad_req_types[arg_grad_offset] == kNullOp)
+      ++arg_grad_offset;
     const uint32_t nid = idx.outputs()[i].node_id;
-    Context ctx = arg_grad_ctxes[arg_grad_offset];
+    Context ctx        = arg_grad_ctxes[arg_grad_offset];
     if (ctx2id.count(ctx) == 0) {
       ctx2id[ctx] = static_cast<int>(ctx_list.size());
       ctx_list.push_back(ctx);
@@ -516,7 +519,7 @@ inline nnvm::Graph AssignContext(nnvm::Graph g,
   }
 
   g.attrs["device"] = std::make_shared<dmlc::any>(std::move(device));
-  g = nnvm::pass::PlaceDevice(g, "__ctx_group__", device_map, "_CrossDeviceCopy");
+  g                 = nnvm::pass::PlaceDevice(g, "__ctx_group__", device_map, "_CrossDeviceCopy");
   const auto& assigned_devices = g.GetAttr<nnvm::DeviceVector>("device");
 
   exec::ContextVector vcontext;
@@ -531,17 +534,17 @@ inline nnvm::Graph AssignContext(nnvm::Graph g,
   // after device planning, we should check again
   // if the assigned device of gradient node
   // corresponds to storage of grads
-  auto &new_idx = g.indexed_graph();
+  auto& new_idx   = g.indexed_graph();
   arg_grad_offset = 0;
   for (size_t i = num_forward_outputs; i < g.outputs.size(); ++i, ++arg_grad_offset) {
-    while (grad_req_types[arg_grad_offset] == kNullOp) ++arg_grad_offset;
+    while (grad_req_types[arg_grad_offset] == kNullOp)
+      ++arg_grad_offset;
     const uint32_t nid = new_idx.outputs()[i].node_id;
-    Context ctx = arg_grad_ctxes[arg_grad_offset];
-    CHECK(ctx == vcontext[nid])
-        << "Trying to save gradient to " << ctx
-        << " while its source node \"" << new_idx[nid].source->attrs.name
-        << "\" computes it on " << vcontext[nid]
-        << ". Check your ctx in NDArray allocation.";
+    Context ctx        = arg_grad_ctxes[arg_grad_offset];
+    CHECK(ctx == vcontext[nid]) << "Trying to save gradient to " << ctx
+                                << " while its source node \"" << new_idx[nid].source->attrs.name
+                                << "\" computes it on " << vcontext[nid]
+                                << ". Check your ctx in NDArray allocation.";
   }
 
   g.attrs["context"] = std::make_shared<nnvm::any>(std::move(vcontext));
@@ -556,7 +559,7 @@ inline nnvm::Graph AssignContext(nnvm::Graph g,
  * \param copy_variable whether to copy or reuse Variable nodes from the
  *                      source graph
  */
-void CopyGraph(nnvm::Graph *dst, const nnvm::Graph &src, bool copy_variables);
+void CopyGraph(nnvm::Graph* dst, const nnvm::Graph& src, bool copy_variables);
 
 /*!
  * \brief Check whether graph contains any duplicated names in its inputs.
@@ -565,9 +568,8 @@ void CopyGraph(nnvm::Graph *dst, const nnvm::Graph &src, bool copy_variables);
  *
  * \return true if there are no duplicates, false otherwise
  */
-bool CheckForInputNameDuplicates(const nnvm::IndexedGraph &idx);
+bool CheckForInputNameDuplicates(const nnvm::IndexedGraph& idx);
 
 }  // namespace common
 }  // namespace mxnet
 #endif  // MXNET_COMMON_EXEC_UTILS_H_
-
diff --git a/src/common/lazy_alloc_array.h b/src/common/lazy_alloc_array.h
index 0fd5acd63d59..f6b4dac2d87d 100644
--- a/src/common/lazy_alloc_array.h
+++ b/src/common/lazy_alloc_array.h
@@ -36,7 +36,7 @@
 namespace mxnet {
 namespace common {
 
-template<typename TElem>
+template <typename TElem>
 class LazyAllocArray {
  public:
   LazyAllocArray();
@@ -46,23 +46,22 @@ class LazyAllocArray {
    * \param index the array index position
    * \param creator a lambda function to create new element when needed.
    */
-  template<typename FCreate>
+  template <typename FCreate>
   inline std::shared_ptr<TElem> Get(int index, FCreate creator);
   /*!
    * \brief for each not null element of the array, call fvisit
    * \param fvisit a function of (size_t, TElem*)
    */
-  template<typename FVisit>
+  template <typename FVisit>
   inline void ForEach(FVisit fvisit);
   /*! \brief clear all the allocated elements in array */
   inline void Clear();
 
  private:
-  template<typename SyncObject>
+  template <typename SyncObject>
   class unique_unlock {
    public:
-    explicit unique_unlock(std::unique_lock<SyncObject> *lock)
-      : lock_(lock) {
+    explicit unique_unlock(std::unique_lock<SyncObject>* lock) : lock_(lock) {
       if (lock_) {
         lock_->unlock();
       }
@@ -72,8 +71,9 @@ class LazyAllocArray {
         lock_->lock();
       }
     }
+
    private:
-    std::unique_lock<SyncObject> *lock_;
+    std::unique_lock<SyncObject>* lock_;
   };
 
   /*! \brief the initial size of the array */
@@ -88,14 +88,12 @@ class LazyAllocArray {
   std::atomic<bool> is_clearing_;
 };
 
-template<typename TElem>
-inline LazyAllocArray<TElem>::LazyAllocArray()
-  : is_clearing_(false) {
-}
+template <typename TElem>
+inline LazyAllocArray<TElem>::LazyAllocArray() : is_clearing_(false) {}
 
 // implementations
-template<typename TElem>
-template<typename FCreate>
+template <typename TElem>
+template <typename FCreate>
 inline std::shared_ptr<TElem> LazyAllocArray<TElem>::Get(int index, FCreate creator) {
   CHECK_GE(index, 0);
   size_t idx = static_cast<size_t>(index);
@@ -135,7 +133,7 @@ inline std::shared_ptr<TElem> LazyAllocArray<TElem>::Get(int index, FCreate crea
   return nullptr;
 }
 
-template<typename TElem>
+template <typename TElem>
 inline void LazyAllocArray<TElem>::Clear() {
   std::unique_lock<std::mutex> lock(create_mutex_);
   is_clearing_.store(true);
@@ -144,13 +142,13 @@ inline void LazyAllocArray<TElem>::Clear() {
   // any growth which might happen when create_mutex_ is unlocked
   for (size_t i = 0; i < head_.size(); ++i) {
     std::shared_ptr<TElem> p = head_[i];
-    head_[i] = std::shared_ptr<TElem>(nullptr);
+    head_[i]                 = std::shared_ptr<TElem>(nullptr);
     unique_unlock<std::mutex> unlocker(&lock);
     p = std::shared_ptr<TElem>(nullptr);
   }
   for (size_t i = 0; i < more_.size(); ++i) {
     std::shared_ptr<TElem> p = more_[i];
-    more_[i] = std::shared_ptr<TElem>(nullptr);
+    more_[i]                 = std::shared_ptr<TElem>(nullptr);
     unique_unlock<std::mutex> unlocker(&lock);
     p = std::shared_ptr<TElem>(nullptr);
   }
@@ -158,8 +156,8 @@ inline void LazyAllocArray<TElem>::Clear() {
   is_clearing_.store(false);
 }
 
-template<typename TElem>
-template<typename FVisit>
+template <typename TElem>
+template <typename FVisit>
 inline void LazyAllocArray<TElem>::ForEach(FVisit fvisit) {
   std::lock_guard<std::mutex> lock(create_mutex_);
   for (size_t i = 0; i < head_.size(); ++i) {
diff --git a/src/common/object_pool.h b/src/common/object_pool.h
index f0a651182431..f822604ce912 100644
--- a/src/common/object_pool.h
+++ b/src/common/object_pool.h
@@ -150,7 +150,7 @@ T* ObjectPool<T>::New(Args&&... args) {
     if (head_->next == nullptr) {
       AllocateChunk();
     }
-    ret = head_;
+    ret   = head_;
     head_ = head_->next;
   }
   return new (static_cast<void*>(ret)) T(std::forward<Args>(args)...);
@@ -163,7 +163,7 @@ void ObjectPool<T>::Delete(T* ptr) {
   {
     std::lock_guard<std::mutex> lock{m_};
     linked_list_ptr->next = head_;
-    head_ = linked_list_ptr;
+    head_                 = linked_list_ptr;
   }
 }
 
@@ -199,12 +199,12 @@ void ObjectPool<T>::AllocateChunk() {
 #endif
   allocated_.emplace_back(new_chunk_ptr);
   auto new_chunk = static_cast<LinkedList*>(new_chunk_ptr);
-  auto size = kPageSize / sizeof(LinkedList);
+  auto size      = kPageSize / sizeof(LinkedList);
   for (std::size_t i = 0; i < size - 1; ++i) {
     new_chunk[i].next = &new_chunk[i + 1];
   }
   new_chunk[size - 1].next = head_;
-  head_ = new_chunk;
+  head_                    = new_chunk;
 }
 
 template <typename T>
diff --git a/src/common/random_generator.cu b/src/common/random_generator.cu
index 8f7b95985d02..caced2b95b00 100644
--- a/src/common/random_generator.cu
+++ b/src/common/random_generator.cu
@@ -31,46 +31,43 @@ namespace mxnet {
 namespace common {
 namespace random {
 
-template<>
+template <>
 const int RandGenerator<gpu, float>::kMinNumRandomPerThread = 64;
 
-template<>
+template <>
 const int RandGenerator<gpu, float>::kNumRandomStates = 32768;
 
-__global__ void rand_generator_seed_kernel(curandStatePhilox4_32_10_t *states_,
+__global__ void rand_generator_seed_kernel(curandStatePhilox4_32_10_t* states_,
                                            const int size,
                                            uint32_t seed) {
   int id = blockIdx.x * blockDim.x + threadIdx.x;
-  if (id < size) curand_init(seed, id, 0, states_ + id);
+  if (id < size)
+    curand_init(seed, id, 0, states_ + id);
 }
 
-template<>
-void RandGenerator<gpu, float>::Seed(mshadow::Stream<gpu> *s, uint32_t seed) {
+template <>
+void RandGenerator<gpu, float>::Seed(mshadow::Stream<gpu>* s, uint32_t seed) {
   using namespace mshadow::cuda;
-  int ngrid = std::min(kMaxGridNum,
-                       (RandGenerator<gpu, float>::kNumRandomStates + kBaseThreadNum - 1) /
-                         kBaseThreadNum);
-  rand_generator_seed_kernel
-      <<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
-          states_,
-          RandGenerator<gpu, float>::kNumRandomStates,
-          seed);
+  int ngrid =
+      std::min(kMaxGridNum,
+               (RandGenerator<gpu, float>::kNumRandomStates + kBaseThreadNum - 1) / kBaseThreadNum);
+  rand_generator_seed_kernel<<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
+      states_, RandGenerator<gpu, float>::kNumRandomStates, seed);
   MSHADOW_CUDA_POST_KERNEL_CHECK(rand_generator_seed_kernel);
   s->Wait();
 }
 
-template<>
-void RandGenerator<gpu, float>::AllocState(RandGenerator<gpu> *inst) {
-  CUDA_CALL(cudaMalloc(&inst->states_,
-                       kNumRandomStates * sizeof(curandStatePhilox4_32_10_t)));
+template <>
+void RandGenerator<gpu, float>::AllocState(RandGenerator<gpu>* inst) {
+  CUDA_CALL(cudaMalloc(&inst->states_, kNumRandomStates * sizeof(curandStatePhilox4_32_10_t)));
 }
 
-template<>
-void RandGenerator<gpu, float>::FreeState(RandGenerator<gpu> *inst) {
+template <>
+void RandGenerator<gpu, float>::FreeState(RandGenerator<gpu>* inst) {
   CUDA_CALL(cudaFree(inst->states_));
 }
 
-template<>
+template <>
 void* RandGenerator<gpu, float>::GetStates() {
   return static_cast<void*>(states_);
 }
diff --git a/src/common/rtc.cc b/src/common/rtc.cc
index ece9c0566acd..683cc7c8faf0 100644
--- a/src/common/rtc.cc
+++ b/src/common/rtc.cc
@@ -28,12 +28,12 @@
 namespace mxnet {
 namespace rtc {
 
-CudaModule::Chunk::Chunk(
-    const char* source,
-    const std::vector<std::string>& options,
-    const std::vector<std::string>& exports) {
+CudaModule::Chunk::Chunk(const char* source,
+                         const std::vector<std::string>& options,
+                         const std::vector<std::string>& exports) {
   NVRTC_CALL(nvrtcCreateProgram(&prog_, source, "source.cu", 0, nullptr, nullptr));
-  for (const auto& i : exports) exports_.insert(i);
+  for (const auto& i : exports)
+    exports_.insert(i);
 #if CUDA_VERSION >= 8000
   for (const auto& func : exports) {
     NVRTC_CALL(nvrtcAddNameExpression(prog_, func.c_str()));
@@ -45,7 +45,8 @@ CudaModule::Chunk::Chunk(
       << "with extern \"C\" instead.";
 #endif
   std::vector<const char*> c_options;
-  for (const auto& i : options) c_options.push_back(i.c_str());
+  for (const auto& i : options)
+    c_options.push_back(i.c_str());
   nvrtcResult compile_res = nvrtcCompileProgram(prog_, c_options.size(), c_options.data());
   if (compile_res != NVRTC_SUCCESS) {
     size_t err_size;
@@ -81,7 +82,6 @@ CudaModule::Chunk::Chunk(
   }
 }
 
-
 CudaModule::Chunk::~Chunk() {
   for (const auto& kv : mod_) {
     CUDA_DRIVER_CALL(cuModuleUnload(kv.second));
@@ -89,12 +89,8 @@ CudaModule::Chunk::~Chunk() {
   NVRTC_CALL(nvrtcDestroyProgram(&prog_));
 }
 
-
-CUfunction CudaModule::Chunk::GetFunction(
-    const std::string& mangled_name,
-    const Context& ctx) {
-  CHECK_EQ(ctx.dev_mask(), Context::kGPU)
-      << "CUDA Runtime compilation only supports Nvidia GPU.";
+CUfunction CudaModule::Chunk::GetFunction(const std::string& mangled_name, const Context& ctx) {
+  CHECK_EQ(ctx.dev_mask(), Context::kGPU) << "CUDA Runtime compilation only supports Nvidia GPU.";
   auto iter = mod_.find(ctx.dev_id);
   mxnet::common::cuda::DeviceStore device_store;
   CUmodule module;
@@ -117,13 +113,12 @@ CUfunction CudaModule::Chunk::GetFunction(
   return function;
 }
 
-
-std::shared_ptr<CudaModule::Kernel> CudaModule::GetKernel(
-    const std::string& name, const std::vector<ArgType>& signature) {
+std::shared_ptr<CudaModule::Kernel> CudaModule::GetKernel(const std::string& name,
+                                                          const std::vector<ArgType>& signature) {
   std::string mangled_name = name;
 #if CUDA_VERSION >= 8000
   if (ptr_->exports_.count(name)) {
-    const char * c_mangled_name;
+    const char* c_mangled_name;
     NVRTC_CALL(nvrtcGetLoweredName(ptr_->prog_, name.c_str(), &c_mangled_name));
     mangled_name = c_mangled_name;
   }
@@ -131,23 +126,23 @@ std::shared_ptr<CudaModule::Kernel> CudaModule::GetKernel(
   return std::shared_ptr<Kernel>(new Kernel(ptr_, mangled_name, signature));
 }
 
-
-CudaModule::Kernel::Kernel(
-    const std::shared_ptr<CudaModule::Chunk>& mod,
-    const std::string& mangled_name,
-    const std::vector<ArgType>& signature)
-      : mangled_name_(mangled_name), signature_(signature), mod_(mod) {
-}
-
-void CudaModule::Kernel::Launch(
-    const Context& ctx, const std::vector<dmlc::any>& args,
-    uint32_t grid_dim_x, uint32_t grid_dim_y, uint32_t grid_dim_z,
-    uint32_t block_dim_x, uint32_t block_dim_y, uint32_t block_dim_z,
-    uint32_t shared_mem) {
-  CHECK_EQ(ctx.dev_mask(), Context::kGPU)
-      << "CUDA Runtime compilation only supports Nvidia GPU.";
-
-  auto mod = mod_;
+CudaModule::Kernel::Kernel(const std::shared_ptr<CudaModule::Chunk>& mod,
+                           const std::string& mangled_name,
+                           const std::vector<ArgType>& signature)
+    : mangled_name_(mangled_name), signature_(signature), mod_(mod) {}
+
+void CudaModule::Kernel::Launch(const Context& ctx,
+                                const std::vector<dmlc::any>& args,
+                                uint32_t grid_dim_x,
+                                uint32_t grid_dim_y,
+                                uint32_t grid_dim_z,
+                                uint32_t block_dim_x,
+                                uint32_t block_dim_y,
+                                uint32_t block_dim_z,
+                                uint32_t shared_mem) {
+  CHECK_EQ(ctx.dev_mask(), Context::kGPU) << "CUDA Runtime compilation only supports Nvidia GPU.";
+
+  auto mod       = mod_;
   auto arg_types = signature();
 
   CUfunction function;
@@ -155,13 +150,14 @@ void CudaModule::Kernel::Launch(
   if (iter != func_.end()) {
     function = iter->second;
   } else {
-    function = mod_->GetFunction(mangled_name_, ctx);
+    function          = mod_->GetFunction(mangled_name_, ctx);
     func_[ctx.dev_id] = function;
   }
 
   std::vector<Engine::VarHandle> read_vars, write_vars;
   for (size_t i = 0; i < arg_types.size(); ++i) {
-    if (!arg_types[i].is_ndarray) continue;
+    if (!arg_types[i].is_ndarray)
+      continue;
     const auto& array = dmlc::get<NDArray>(args[i]);
     CHECK_EQ(array.dtype(), arg_types[i].dtype)
         << "The i-th argument is expected to be an NDArray of "
@@ -175,33 +171,52 @@ void CudaModule::Kernel::Launch(
   }
 
   Engine::Get()->PushSync(
-    [function, mod, args, arg_types, grid_dim_x, grid_dim_y, grid_dim_z,
-     block_dim_x, block_dim_y, block_dim_z, shared_mem](RunContext rctx) {
-    std::vector<void*> p_args;
-    for (size_t i = 0; i < arg_types.size(); ++i) {
-      if (arg_types[i].is_ndarray) {
-        const auto& array = dmlc::get<NDArray>(args[i]);
-        p_args.push_back(reinterpret_cast<void*>(const_cast<void**>(&array.data().dptr_)));
-      } else {
-        MSHADOW_TYPE_SWITCH(arg_types[i].dtype, DType, {
-          const auto& number = dmlc::get<DType>(args[i]);
-          p_args.push_back(const_cast<DType*>(&number));
-        });
-      }
-    }
-
-    mshadow::Stream<gpu> *s = rctx.get_stream<gpu>();
-    CUDA_DRIVER_CALL(cuLaunchKernel(
-        function, grid_dim_x, grid_dim_y, grid_dim_z,
-        block_dim_x, block_dim_y, block_dim_z,
-        shared_mem, s->stream_,
-        p_args.data(), nullptr));
-    CUDA_CALL(cudaStreamSynchronize(s->stream_));
-  }, ctx, read_vars, write_vars, FnProperty::kNormal, 0,
-  mangled_name_.c_str());
+      [function,
+       mod,
+       args,
+       arg_types,
+       grid_dim_x,
+       grid_dim_y,
+       grid_dim_z,
+       block_dim_x,
+       block_dim_y,
+       block_dim_z,
+       shared_mem](RunContext rctx) {
+        std::vector<void*> p_args;
+        for (size_t i = 0; i < arg_types.size(); ++i) {
+          if (arg_types[i].is_ndarray) {
+            const auto& array = dmlc::get<NDArray>(args[i]);
+            p_args.push_back(reinterpret_cast<void*>(const_cast<void**>(&array.data().dptr_)));
+          } else {
+            MSHADOW_TYPE_SWITCH(arg_types[i].dtype, DType, {
+              const auto& number = dmlc::get<DType>(args[i]);
+              p_args.push_back(const_cast<DType*>(&number));
+            });
+          }
+        }
+
+        mshadow::Stream<gpu>* s = rctx.get_stream<gpu>();
+        CUDA_DRIVER_CALL(cuLaunchKernel(function,
+                                        grid_dim_x,
+                                        grid_dim_y,
+                                        grid_dim_z,
+                                        block_dim_x,
+                                        block_dim_y,
+                                        block_dim_z,
+                                        shared_mem,
+                                        s->stream_,
+                                        p_args.data(),
+                                        nullptr));
+        CUDA_CALL(cudaStreamSynchronize(s->stream_));
+      },
+      ctx,
+      read_vars,
+      write_vars,
+      FnProperty::kNormal,
+      0,
+      mangled_name_.c_str());
 }
 
-
 }  // namespace rtc
 }  // namespace mxnet
 
diff --git a/src/common/static_array.h b/src/common/static_array.h
index 8d51967b172d..238560e1916e 100644
--- a/src/common/static_array.h
+++ b/src/common/static_array.h
@@ -36,7 +36,7 @@ namespace common {
  * \tparam T element type of the array, must be copyable between CPU and GPU
  * \tparam num number of elements in the array
  */
-template<typename T, int num>
+template <typename T, int num>
 struct StaticArray {
   static const int kNum = num;
 
@@ -47,7 +47,7 @@ struct StaticArray {
 
   /*! \brief constructor, fill in the array with the input value */
   MSHADOW_XINLINE StaticArray(const T& val) {
-    #pragma unroll
+#pragma unroll
     for (int i = 0; i < num; ++i) {
       this->array_[i] = val;
     }
@@ -55,7 +55,7 @@ struct StaticArray {
 
   /*! \brief constuctor */
   MSHADOW_XINLINE StaticArray(const StaticArray<T, num>& sa) {
-    #pragma unroll
+#pragma unroll
     for (int i = 0; i < num; ++i) {
       this->array_[i] = sa[i];
     }
diff --git a/src/common/tensor_inspector.h b/src/common/tensor_inspector.h
index d1ff595f5c91..aa7feba80ebe 100644
--- a/src/common/tensor_inspector.h
+++ b/src/common/tensor_inspector.h
@@ -71,27 +71,27 @@ struct InspectorManager {
 enum CheckerType {
   NegativeChecker,  // check if is negative
   PositiveChecker,  // check if is positive
-  ZeroChecker,  // check if is zero
-  NaNChecker,  // check if is NaN, will always return false if DType is not a float type
-  InfChecker,  // check if is infinity, will always return false if DType is not a float type
+  ZeroChecker,      // check if is zero
+  NaNChecker,       // check if is NaN, will always return false if DType is not a float type
+  InfChecker,       // check if is infinity, will always return false if DType is not a float type
   PositiveInfChecker,  // check if is positive infinity,
                        // will always return false if DType is not a float type
   NegativeInfChecker,  // check if is nagative infinity,
                        // will always return false if DType is not a float type
-  FiniteChecker,  // check if is finite, will always return false if DType is not a float type
-  NormalChecker,  // check if is neither infinity nor NaN
-  AbnormalChecker,  // chekck if is infinity or nan
+  FiniteChecker,       // check if is finite, will always return false if DType is not a float type
+  NormalChecker,       // check if is neither infinity nor NaN
+  AbnormalChecker,     // chekck if is infinity or nan
 };
 
 /**
- *  _______                      _____                           _             
- * |__   __|                    |_   _|                         | |            
- *    | | ___ _ __  ___  ___  _ __| |  _ __  ___ _ __   ___  ___| |_ ___  _ __ 
+ *  _______                      _____                           _
+ * |__   __|                    |_   _|                         | |
+ *    | | ___ _ __  ___  ___  _ __| |  _ __  ___ _ __   ___  ___| |_ ___  _ __
  *    | |/ _ \ '_ \/ __|/ _ \| '__| | | '_ \/ __| '_ \ / _ \/ __| __/ _ \| '__|
- *    | |  __/ | | \__ \ (_) | | _| |_| | | \__ \ |_) |  __/ (__| || (_) | |   
- *    |_|\___|_| |_|___/\___/|_||_____|_| |_|___/ .__/ \___|\___|\__\___/|_|   
- *                                              | |                            
- *                                              |_|   
+ *    | |  __/ | | \__ \ (_) | | _| |_| | | \__ \ |_) |  __/ (__| || (_) | |
+ *    |_|\___|_| |_|___/\___/|_||_____|_| |_|___/ .__/ \___|\___|\__\___/|_|
+ *                                              | |
+ *                                              |_|
  */
 
 /*!
@@ -103,12 +103,12 @@ enum CheckerType {
 class TensorInspector {
  private:
   /*!
-   * \brief generate the tensor info, including data type and shape 
+   * \brief generate the tensor info, including data type and shape
    * \tparam DType the data type
    * \tparam StreamType the type of the stream object
    * \param os stream object to output to
    */
-  template<typename DType, typename StreamType>
+  template <typename DType, typename StreamType>
   void tensor_info_to_string(StreamType* os) {
     const int dimension = tb_.ndim();
     *os << "<" << infer_type_string(typeid(DType)) << " Tensor ";
@@ -120,13 +120,13 @@ class TensorInspector {
   }
 
   /*!
-   * \brief output the tensor info, including data type and shape 
+   * \brief output the tensor info, including data type and shape
    * \tparam DType the data type
    * \tparam StreamType the type of the stream object
    * \param os stream object to output to
    * \param shape the shape of the tensor
    */
-  template<typename DType, typename StreamType>
+  template <typename DType, typename StreamType>
   void tensor_info_to_string(StreamType* os, const std::vector<index_t>& shape) {
     const int dimension = shape.size();
     *os << "<" << infer_type_string(typeid(DType)) << " Tensor ";
@@ -138,17 +138,16 @@ class TensorInspector {
   }
 
   /*!
-   * \brief output the tensor in a structured format 
+   * \brief output the tensor in a structured format
    * \tparam DType the data type
    * \tparam StreamType the type of the stream object
    * \param os stream object to output to
    */
-  template<typename DType, typename StreamType>
+  template <typename DType, typename StreamType>
   void to_string_helper(StreamType* os) {
 #if MXNET_USE_CUDA
     if (tb_.dev_mask() == gpu::kDevMask) {
-      TensorInspector(test::CAccessAsCPU(ctx_, tb_, false)(), ctx_)
-          .to_string_helper<DType>(os);
+      TensorInspector(test::CAccessAsCPU(ctx_, tb_, false)(), ctx_).to_string_helper<DType>(os);
       return;
     }
 #endif  // MXNET_USE_CUDA
@@ -167,8 +166,8 @@ class TensorInspector {
         n += (i % off == 0);
       }
       if (n) {
-        *os << std::string(n, ']') << ", " <<  std::string(n, '[');
-      } else  {
+        *os << std::string(n, ']') << ", " << std::string(n, '[');
+      } else {
         *os << ", ";
       }
       *os << tb_.dptr<DType>()[i];
@@ -178,13 +177,13 @@ class TensorInspector {
   }
 
   /*!
-   * \brief output the tensor in a structured format 
+   * \brief output the tensor in a structured format
    * \tparam DType the data type
    * \tparam StreamType the type of the stream object
    * \param os stream object to output to
    * \param dptr the data pointer
    */
-  template<typename DType, typename StreamType>
+  template <typename DType, typename StreamType>
   void to_string_helper(StreamType* os, const DType* dptr) {
 #if MXNET_USE_CUDA
     if (tb_.dev_mask() == gpu::kDevMask) {
@@ -198,14 +197,14 @@ class TensorInspector {
   }
 
   /*!
-   * \brief output a part of the tensor in a structed format 
+   * \brief output a part of the tensor in a structed format
    * \tparam DType the data type
    * \tparam StreamType the type of the stream object
    * \param os stream object to output to
    * \param sub_shape the sub-shape of the desired part of the tensor
    * \param offset the position of the first value of the desired part of the tensor
    */
-  template<typename DType, typename StreamType>
+  template <typename DType, typename StreamType>
   void to_string_helper(StreamType* os, const std::vector<index_t>& sub_shape, index_t offset) {
 #if MXNET_USE_CUDA
     if (tb_.dev_mask() == gpu::kDevMask) {
@@ -235,8 +234,8 @@ class TensorInspector {
         n += (i % off == 0);
       }
       if (n) {
-        *os << std::string(n, ']') << ", " <<  std::string(n, '[');
-      } else  {
+        *os << std::string(n, ']') << ", " << std::string(n, '[');
+      } else {
         *os << ", ";
       }
       *os << dptr[i];
@@ -246,16 +245,17 @@ class TensorInspector {
   }
 
   /*!
-   * \brief helper function to calculate the sub_shape and offset for the desired part of the tensor,
-   * given its coordinates in the original tensor
-   * \param pos the coordinates of the desired part of the tensor
-   * \param sub_shape the sub-shape of the desired part of the tensor; calculated here
-   * \param offset the position of the first value of the desired part of the tensor; calculated here
+   * \brief helper function to calculate the sub_shape and offset for the desired part of the
+   * tensor, given its coordinates in the original tensor \param pos the coordinates of the desired
+   * part of the tensor \param sub_shape the sub-shape of the desired part of the tensor; calculated
+   * here \param offset the position of the first value of the desired part of the tensor;
+   * calculated here
    */
-  void print_locator(const std::vector<index_t>& pos, std::vector<index_t>* sub_shape,
-      index_t* offset) {
+  void print_locator(const std::vector<index_t>& pos,
+                     std::vector<index_t>* sub_shape,
+                     index_t* offset) {
     const int dimension = tb_.ndim();
-    const int sub_dim = dimension - pos.size();
+    const int sub_dim   = dimension - pos.size();
     sub_shape->resize(sub_dim);
     index_t multiple = 1;
     for (size_t i = pos.size(), j = 0; i < static_cast<size_t>(dimension); ++i, ++j) {
@@ -263,7 +263,7 @@ class TensorInspector {
       multiple *= tb_.shape_[i];
     }
     index_t sum = 0;
-    index_t m = 1;
+    index_t m   = 1;
     for (index_t i = pos.size() - 1; i >= 0; --i) {
       sum += pos[i] * m;
       m *= tb_.shape_[i];
@@ -272,9 +272,8 @@ class TensorInspector {
   }
 
   /*!
-   * \brief parse the coordinate of the desired part of the tensor, given a string that represents that
-   * coordinate
-   * \param pos the coordinates of the desired part of the tensor, calculated here
+   * \brief parse the coordinate of the desired part of the tensor, given a string that represents
+   * that coordinate \param pos the coordinates of the desired part of the tensor, calculated here
    * \param str the string that represents the coordinate
    */
   bool parse_position(std::vector<index_t>* pos, const std::string& str) {
@@ -303,7 +302,7 @@ class TensorInspector {
    * \tparam DType the data type
    * \param tag the name given to this call
    */
-  template<typename DType>
+  template <typename DType>
   void interactive_print_helper(std::string tag) {
 #if MXNET_USE_CUDA
     if (tb_.dev_mask() == gpu::kDevMask) {
@@ -317,16 +316,17 @@ class TensorInspector {
     while (!InspectorManager::get()->interactive_print_skip_all_) {
       std::cout << "----------Interactive Print----------" << std::endl;
       if (tag != "") {
-        std::cout << "Tag: " << tag << "  Visit: " <<
-            InspectorManager::get()->interactive_print_tag_counter_[tag] <<  std::endl;
+        std::cout << "Tag: " << tag
+                  << "  Visit: " << InspectorManager::get()->interactive_print_tag_counter_[tag]
+                  << std::endl;
       }
       tensor_info_to_string<DType>(&std::cout);
-      std::cout << "To print a part of the tensor, " <<
-          "please specify a position, seperated by \",\"" << std::endl;
-      std::cout << "\"e\" for the entire tensor, " <<
-          "\"d\" to dump value to file, " <<
-          "\"b\" to break, " <<
-          "\"s\" to skip all: ";
+      std::cout << "To print a part of the tensor, "
+                << "please specify a position, seperated by \",\"" << std::endl;
+      std::cout << "\"e\" for the entire tensor, "
+                << "\"d\" to dump value to file, "
+                << "\"b\" to break, "
+                << "\"s\" to skip all: ";
       std::string str;
       std::cin >> str;
       if (str == "b") {
@@ -367,106 +367,84 @@ class TensorInspector {
    * \tparam DType the data type
    * \param ct the type of the checker
    */
-  template<typename DType>
+  template <typename DType>
   std::function<bool(DType)> get_checker(CheckerType ct) {
     switch (ct) {
       case NegativeChecker:
-        return [] (DType x) {
-              return x < 0;
-            };
+        return [](DType x) { return x < 0; };
       case PositiveChecker:
-        return [] (DType x) {
-              return x > 0;
-            };
+        return [](DType x) { return x > 0; };
       case ZeroChecker:
-        return [] (DType x) {
-              return x == 0;
-            };
+        return [](DType x) { return x == 0; };
       case NaNChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x != x;
-              };
+          return [](DType x) { return x != x; };
         } else {
-          LOG(WARNING) << "NaNChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "NaNChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       case InfChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x == (DType)1.0 / 0.0f || x == -(DType)1.0 / 0.0f;
-              };
+          return [](DType x) { return x == (DType)1.0 / 0.0f || x == -(DType)1.0 / 0.0f; };
         } else {
-          LOG(WARNING) << "InfChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "InfChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       case PositiveInfChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x == (DType)1.0 /  0.0f;
-              };
+          return [](DType x) { return x == (DType)1.0 / 0.0f; };
         } else {
-          LOG(WARNING) << "PositiveInfChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "PositiveInfChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       case NegativeInfChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x == -(DType)1.0 /  0.0f;
-              };
+          return [](DType x) { return x == -(DType)1.0 / 0.0f; };
         } else {
-          LOG(WARNING) << "NegativeInfChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "NegativeInfChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       case FiniteChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x != (DType)1.0 /  0.0f && x != -(DType)1.0 /  0.0f;
-              };
+          return [](DType x) { return x != (DType)1.0 / 0.0f && x != -(DType)1.0 / 0.0f; };
         } else {
-          LOG(WARNING) << "FiniteChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "FiniteChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       case NormalChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x != (DType)1.0 /  0.0f && x != -(DType)1.0 /  0.0f &&
-                    x == x;
-              };
+          return
+              [](DType x) { return x != (DType)1.0 / 0.0f && x != -(DType)1.0 / 0.0f && x == x; };
         } else {
-          LOG(WARNING) << "NormalChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "NormalChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       case AbnormalChecker:
         if (std::is_same<DType, float>::value || std::is_same<DType, double>::value ||
             std::is_same<DType, mshadow::half::half_t>::value) {
-          return [] (DType x) {
-                return x == (DType)1.0 /  0.0f || x == -(DType)1.0 /  0.0f ||
-                    x != x;
-              };
+          return
+              [](DType x) { return x == (DType)1.0 / 0.0f || x == -(DType)1.0 / 0.0f || x != x; };
         } else {
-          LOG(WARNING) << "AbnormalChecker only applies to float types. " <<
-              "Lambda will always return false.";
+          LOG(WARNING) << "AbnormalChecker only applies to float types. "
+                       << "Lambda will always return false.";
         }
         break;
       default:
-        return [] (DType x) {
-              return false;
-            };
+        return [](DType x) { return false; };
     }
-    return [] (DType x) {return false;};
+    return [](DType x) { return false; };
   }
 
   /*!
@@ -493,9 +471,11 @@ class TensorInspector {
    * \param interactive wherether to allow the user to interactively check the coordinates
    * \param tag the name given to this call
    */
-  template<typename DType>
+  template <typename DType>
   void check_value_helper(std::vector<std::vector<index_t>>* ret,
-      const std::function<bool(DType)>& checker, bool interactive, std::string tag) {
+                          const std::function<bool(DType)>& checker,
+                          bool interactive,
+                          std::string tag) {
 #if MXNET_USE_CUDA
     if (tb_.dev_mask() == gpu::kDevMask) {
       return TensorInspector(test::CAccessAsCPU(ctx_, tb_, false)(), ctx_)
@@ -506,13 +486,13 @@ class TensorInspector {
     std::stringstream ss;
     ss << "[";
     bool first_pass = true;
-    for (index_t i = 0; i <static_cast<index_t>(tb_.shape_.Size()); ++i) {
+    for (index_t i = 0; i < static_cast<index_t>(tb_.shape_.Size()); ++i) {
       if (checker(tb_.dptr<DType>()[i])) {
         ++count;
         if (!first_pass) {
-          ss  << ", ";
+          ss << ", ";
         }
-        first_pass = false;
+        first_pass                  = false;
         std::vector<index_t> coords = index_to_coordinates(i);
         ss << "(" << coords[0];
         for (size_t i = 1; i < coords.size(); ++i) {
@@ -525,21 +505,22 @@ class TensorInspector {
     ss << "]" << std::endl;
     if (interactive) {
       std::lock_guard<std::mutex> lock(InspectorManager::get()->mutex_);
-       InspectorManager::get()->check_value_tag_counter_[tag] += 1;
+      InspectorManager::get()->check_value_tag_counter_[tag] += 1;
       while (!InspectorManager::get()->check_value_skip_all_) {
         std::cout << "----------Value Check----------" << std::endl;
         tensor_info_to_string<DType>(&std::cout);
         if (tag != "") {
-          std::cout << "Tag: " << tag << "  Visit: " <<
-              InspectorManager::get()->check_value_tag_counter_[tag] <<  std::endl;
+          std::cout << "Tag: " << tag
+                    << "  Visit: " << InspectorManager::get()->check_value_tag_counter_[tag]
+                    << std::endl;
         }
         std::cout << count << " value(s) found." << std::endl;
-        std::cout << "To print a part of the tensor," <<
-            " please specify a position, seperated by \",\"" << std::endl;
-        std::cout << "\"e\" for the entire tensor, " <<
-            "\"p\" to print the coordinates of the values found, " <<
-            "\"b\" to break, " <<
-            "\"s\" to skip all: ";
+        std::cout << "To print a part of the tensor,"
+                  << " please specify a position, seperated by \",\"" << std::endl;
+        std::cout << "\"e\" for the entire tensor, "
+                  << "\"p\" to print the coordinates of the values found, "
+                  << "\"b\" to break, "
+                  << "\"s\" to skip all: ";
         std::string str;
         std::cin >> str;
         if (str == "b") {
@@ -569,30 +550,42 @@ class TensorInspector {
 
   /*!
    * \brief infer the python type, given the c++ type
-   * \tparam ti the type info 
+   * \tparam ti the type info
    */
   inline char infer_type(const std::type_info& ti) {
-    if (ti == typeid(float)) return 'f';
-    else if (ti == typeid(double)) return 'f';
-    else if (ti == typeid(mshadow::half::half_t) ) return 'f';
-    else if (ti == typeid(uint8_t)) return 'u';
-    else if (ti == typeid(int32_t)) return 'i';
-    else if (ti == typeid(int64_t)) return 'i';
+    if (ti == typeid(float))
+      return 'f';
+    else if (ti == typeid(double))
+      return 'f';
+    else if (ti == typeid(mshadow::half::half_t))
+      return 'f';
+    else if (ti == typeid(uint8_t))
+      return 'u';
+    else if (ti == typeid(int32_t))
+      return 'i';
+    else if (ti == typeid(int64_t))
+      return 'i';
     else
       return '?';
   }
 
   /*!
    * \brief infer the python type, given the c++ type
-   * \tparam ti the type info 
+   * \tparam ti the type info
    */
   inline std::string infer_type_string(const std::type_info& ti) {
-    if (ti == typeid(float)) return "float";
-    else if (ti == typeid(double)) return "double";
-    else if (ti == typeid(mshadow::half::half_t) ) return "mshasow::half::half_t";
-    else if (ti == typeid(uint8_t)) return "uint8_t";
-    else if (ti == typeid(int32_t)) return "int32_t";
-    else if (ti == typeid(int64_t)) return "int64_t";
+    if (ti == typeid(float))
+      return "float";
+    else if (ti == typeid(double))
+      return "double";
+    else if (ti == typeid(mshadow::half::half_t))
+      return "mshasow::half::half_t";
+    else if (ti == typeid(uint8_t))
+      return "uint8_t";
+    else if (ti == typeid(int32_t))
+      return "int32_t";
+    else if (ti == typeid(int64_t))
+      return "int64_t";
     else
       return "unknown tyoe";
   }
@@ -609,7 +602,7 @@ class TensorInspector {
    * \brief generate the header following npy 1.0 format
    * \tparam DType the data type
    */
-  template<typename DType>
+  template <typename DType>
   std::string get_header() {
     const int dimension = tb_.ndim();
     std::string dict;
@@ -624,7 +617,7 @@ class TensorInspector {
       dict += std::to_string(tb_.shape_[i]);
     }
     if (dimension == 1) {
-       dict += ",";
+      dict += ",";
     }
     dict += ")} ";
     int padding_size = 64 - ((10 + dict.size()) % 64);
@@ -647,7 +640,7 @@ class TensorInspector {
    * \param header the header of the file
    * \param filename the file name
    */
-  template<typename DType>
+  template <typename DType>
   void write_npy(const std::string& header, const std::string& filename) {
     std::ofstream file;
     file.exceptions(std::ofstream::failbit | std::ofstream::badbit);
@@ -668,29 +661,28 @@ class TensorInspector {
    * \tparam DType the data type
    * \param tag the name given to this call
    */
-  template<typename DType>
+  template <typename DType>
   void dump_to_file_helper(const std::string& tag) {
 #if MXNET_USE_CUDA
     if (tb_.dev_mask() == gpu::kDevMask) {
-      TensorInspector(test::CAccessAsCPU(ctx_, tb_, false)(), ctx_)
-          .dump_to_file_helper<DType>(tag);
+      TensorInspector(test::CAccessAsCPU(ctx_, tb_, false)(), ctx_).dump_to_file_helper<DType>(tag);
       return;
     }
 #endif  // MXNET_USE_CUDA
     std::string header = get_header<DType>();
     InspectorManager::get()->dump_to_file_tag_counter_[tag] += 1;
-    const int visit = InspectorManager::get()->dump_to_file_tag_counter_[tag];
+    const int visit      = InspectorManager::get()->dump_to_file_tag_counter_[tag];
     std::string filename = tag + "_" + std::to_string(visit) + ".npy";
     write_npy<DType>(header, filename);
   }
 
-   /*!
+  /*!
    * \brief validate that the shape
    */
   inline void validate_shape() {
     const int dimension = tb_.ndim();
-    CHECK(dimension > 0) << "Tensor Inspector does not support empty tensors " <<
-        "or tensors of unknow shape.";
+    CHECK(dimension > 0) << "Tensor Inspector does not support empty tensors "
+                         << "or tensors of unknow shape.";
     for (int i = 0; i < dimension; ++i) {
       CHECK(tb_.shape_[i] != 0) << "Invalid tensor shape: shape_[" << i << "] is 0";
     }
@@ -702,7 +694,7 @@ class TensorInspector {
   const RunContext& ctx_;
 
  public:
-   /*!
+  /*!
    * \brief construct from Tensor object
    * \tparam Device the device the tensor resides in
    * \tparam dimension the dimension of the tensor
@@ -710,9 +702,9 @@ class TensorInspector {
    * \param ts the source tensor object
    * \param ctx the run context of the tensor
    */
-  template<typename Device, int dimension, typename DType>
-  TensorInspector(const mshadow::Tensor<Device, dimension, DType>& ts, const RunContext& ctx):
-      tb_(ts), ctx_(ctx) {
+  template <typename Device, int dimension, typename DType>
+  TensorInspector(const mshadow::Tensor<Device, dimension, DType>& ts, const RunContext& ctx)
+      : tb_(ts), ctx_(ctx) {
     validate_shape();
   }
 
@@ -721,8 +713,7 @@ class TensorInspector {
    * \param tb the source tblob object
    * \param ctx the run context of the tensor
    */
-  TensorInspector(const TBlob& tb, const RunContext& ctx):
-      tb_(tb), ctx_(ctx) {
+  TensorInspector(const TBlob& tb, const RunContext& ctx) : tb_(tb), ctx_(ctx) {
     validate_shape();
   }
 
@@ -731,8 +722,7 @@ class TensorInspector {
    * \param arr the source ndarray object
    * \param ctx the run context of the tensor
    */
-  TensorInspector(const NDArray& arr, const RunContext& ctx):
-      tb_(arr.data()), ctx_(ctx) {
+  TensorInspector(const NDArray& arr, const RunContext& ctx) : tb_(arr.data()), ctx_(ctx) {
     validate_shape();
   }
 
@@ -748,9 +738,7 @@ class TensorInspector {
    */
   std::string to_string() {
     std::stringstream ss;
-    MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, {
-      to_string_helper<DType>(&ss);
-    });
+    MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, { to_string_helper<DType>(&ss); });
     return ss.str();
   }
 
@@ -759,9 +747,7 @@ class TensorInspector {
    * \param tag the name given to this call
    */
   void interactive_print(std::string tag = "") {
-    MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, {
-      interactive_print_helper<DType>(tag);
-    });
+    MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, { interactive_print_helper<DType>(tag); });
   }
 
   /*!
@@ -772,9 +758,10 @@ class TensorInspector {
    * \param interactive wherether to allow the user to interactively check the coordinates
    * \param tag the name given to this call
    */
-  template<typename ValueChecker>
+  template <typename ValueChecker>
   std::vector<std::vector<index_t>> check_value(const ValueChecker& checker,
-      bool interactive = false, std::string tag = "") {
+                                                bool interactive = false,
+                                                std::string tag  = "") {
     std::vector<std::vector<index_t>> ret;
     MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, {
       check_value_helper<DType>(&ret, checker, ret, interactive, tag);
@@ -789,8 +776,9 @@ class TensorInspector {
    * \param interactive wherether to allow the user to interactively check the coordinates
    * \param tag the name given to this call
    */
-  std::vector<std::vector<index_t>> check_value(CheckerType ct, bool interactive = false,
-      std::string tag = "") {
+  std::vector<std::vector<index_t>> check_value(CheckerType ct,
+                                                bool interactive = false,
+                                                std::string tag  = "") {
     std::vector<std::vector<index_t>> ret;
     MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, {
       check_value_helper<DType>(&ret, get_checker<DType>(ct), interactive, tag);
@@ -803,9 +791,7 @@ class TensorInspector {
    * \param tag the name given to this call
    */
   void dump_to_file(std::string tag) {
-    MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, {
-      dump_to_file_helper<DType>(tag);
-    });
+    MSHADOW_TYPE_SWITCH(tb_.type_flag_, DType, { dump_to_file_helper<DType>(tag); });
   }
 };
 
diff --git a/src/common/utils.cc b/src/common/utils.cc
index 67f1f3137c9f..f400093cc9b5 100644
--- a/src/common/utils.cc
+++ b/src/common/utils.cc
@@ -29,14 +29,16 @@
 namespace mxnet {
 namespace common {
 
-template<>
-void CheckFormatWrapper<cpu>(const RunContext &rctx, const NDArray &input,
-                             const TBlob &err_cpu, const bool full_check) {
+template <>
+void CheckFormatWrapper<cpu>(const RunContext& rctx,
+                             const NDArray& input,
+                             const TBlob& err_cpu,
+                             const bool full_check) {
   CheckFormatImpl<cpu>(rctx, input, err_cpu, full_check);
 }
 
-template<>
-void SparseRetainOpForwardRspWrapper<cpu>(mshadow::Stream<cpu> *s,
+template <>
+void SparseRetainOpForwardRspWrapper<cpu>(mshadow::Stream<cpu>* s,
                                           const NDArray& input_nd,
                                           const TBlob& idx_data,
                                           const OpReqType req,
@@ -44,22 +46,20 @@ void SparseRetainOpForwardRspWrapper<cpu>(mshadow::Stream<cpu> *s,
   mxnet::op::SparseRetainOpForwardRspImpl<cpu>(s, input_nd, idx_data, req, output_nd);
 }
 
-template<>
-void CastStorageDispatch<cpu>(const OpContext& ctx,
-                              const NDArray& input,
-                              const NDArray& output) {
+template <>
+void CastStorageDispatch<cpu>(const OpContext& ctx, const NDArray& input, const NDArray& output) {
   mxnet::op::CastStorageComputeImpl<cpu>(ctx, input, output);
 }
 
 void ExecuteMonInputCallback(
-    const nnvm::IndexedGraph &idx, const std::vector<NDArray *> &state_arrays,
-    size_t nid, const std::function<void(const char *, const char *, void *)>
-                    &monitor_callback) {
-  static const auto &flist_inputs =
-      nnvm::Op::GetAttr<nnvm::FListInputNames>("FListInputNames");
+    const nnvm::IndexedGraph& idx,
+    const std::vector<NDArray*>& state_arrays,
+    size_t nid,
+    const std::function<void(const char*, const char*, void*)>& monitor_callback) {
+  static const auto& flist_inputs = nnvm::Op::GetAttr<nnvm::FListInputNames>("FListInputNames");
   std::vector<std::string> input_names;
-  const nnvm::IndexedGraph::Node &inode = idx[nid];
-  const nnvm::Node *node = inode.source;
+  const nnvm::IndexedGraph::Node& inode = idx[nid];
+  const nnvm::Node* node                = inode.source;
   if (flist_inputs.count(node->op())) {
     input_names = flist_inputs[node->op()](node->attrs);
   } else {
@@ -69,26 +69,25 @@ void ExecuteMonInputCallback(
   }
 
   for (size_t i = 0; i < node->num_inputs(); ++i) {
-    const nnvm::NodeEntry &input = node->inputs[i];
+    const nnvm::NodeEntry& input = node->inputs[i];
     if (state_arrays[idx.entry_id(input)]->is_none()) {
       continue;
     }
-    NDArray *cpy = new NDArray(*state_arrays[idx.entry_id(input)]);
+    NDArray* cpy     = new NDArray(*state_arrays[idx.entry_id(input)]);
     std::string name = inode.source->attrs.name + "_" + input_names[i];
-    monitor_callback(name.c_str(), inode.source->op()->name.c_str(),
-                     reinterpret_cast<void *>(cpy));
+    monitor_callback(name.c_str(), inode.source->op()->name.c_str(), reinterpret_cast<void*>(cpy));
   }
 }
 
 void ExecuteMonOutputCallback(
-    const nnvm::IndexedGraph &idx, const std::vector<NDArray *> &state_arrays,
-    size_t nid, const std::function<void(const char *, const char *, void *)>
-                    &monitor_callback) {
-  static const auto &flist_outputs =
-      nnvm::Op::GetAttr<nnvm::FListOutputNames>("FListOutputNames");
+    const nnvm::IndexedGraph& idx,
+    const std::vector<NDArray*>& state_arrays,
+    size_t nid,
+    const std::function<void(const char*, const char*, void*)>& monitor_callback) {
+  static const auto& flist_outputs = nnvm::Op::GetAttr<nnvm::FListOutputNames>("FListOutputNames");
   std::vector<std::string> output_names;
-  const nnvm::IndexedGraph::Node &inode = idx[nid];
-  const nnvm::Node *node = inode.source;
+  const nnvm::IndexedGraph::Node& inode = idx[nid];
+  const nnvm::Node* node                = inode.source;
   if (flist_outputs.count(node->op())) {
     output_names = flist_outputs[node->op()](node->attrs);
   } else {
@@ -101,10 +100,9 @@ void ExecuteMonOutputCallback(
     if (state_arrays[idx.entry_id(nid, i)]->is_none()) {
       continue;
     }
-    NDArray *cpy = new NDArray(*state_arrays[idx.entry_id(nid, i)]);
+    NDArray* cpy     = new NDArray(*state_arrays[idx.entry_id(nid, i)]);
     std::string name = inode.source->attrs.name + "_" + output_names[i];
-    monitor_callback(name.c_str(), inode.source->op()->name.c_str(),
-                     reinterpret_cast<void *>(cpy));
+    monitor_callback(name.c_str(), inode.source->op()->name.c_str(), reinterpret_cast<void*>(cpy));
   }
 }
 
diff --git a/src/common/utils.cu b/src/common/utils.cu
index 0937d7aa5145..e8f65d531096 100644
--- a/src/common/utils.cu
+++ b/src/common/utils.cu
@@ -29,14 +29,16 @@
 namespace mxnet {
 namespace common {
 
-template<>
-void CheckFormatWrapper<gpu>(const RunContext &rctx, const NDArray &input,
-                             const TBlob &err_cpu,  const bool full_check) {
+template <>
+void CheckFormatWrapper<gpu>(const RunContext& rctx,
+                             const NDArray& input,
+                             const TBlob& err_cpu,
+                             const bool full_check) {
   CheckFormatImpl<gpu>(rctx, input, err_cpu, full_check);
 }
 
-template<>
-void SparseRetainOpForwardRspWrapper<gpu>(mshadow::Stream<gpu> *s,
+template <>
+void SparseRetainOpForwardRspWrapper<gpu>(mshadow::Stream<gpu>* s,
                                           const NDArray& input_nd,
                                           const TBlob& idx_data,
                                           const OpReqType req,
@@ -44,10 +46,8 @@ void SparseRetainOpForwardRspWrapper<gpu>(mshadow::Stream<gpu> *s,
   mxnet::op::SparseRetainOpForwardRspImpl<gpu>(s, input_nd, idx_data, req, output_nd);
 }
 
-template<>
-void CastStorageDispatch<gpu>(const OpContext& ctx,
-                              const NDArray& input,
-                              const NDArray& output) {
+template <>
+void CastStorageDispatch<gpu>(const OpContext& ctx, const NDArray& input, const NDArray& output) {
   mxnet::op::CastStorageComputeImpl<gpu>(ctx, input, output);
 }
 
diff --git a/src/common/utils.h b/src/common/utils.h
index 40376e993a0b..b3eb98f3f320 100644
--- a/src/common/utils.h
+++ b/src/common/utils.h
@@ -59,25 +59,30 @@
 #include <unistd.h>
 #endif
 
-
 namespace mxnet {
 namespace common {
 
 #if defined(_WIN32) || defined(_WIN64) || defined(__WINDOWS__)
-inline size_t current_process_id() { return ::GetCurrentProcessId(); }
+inline size_t current_process_id() {
+  return ::GetCurrentProcessId();
+}
 #else
-inline size_t current_process_id() { return getpid(); }
+inline size_t current_process_id() {
+  return getpid();
+}
 #endif
 /*!
  * \brief IndPtr should be non-negative, in non-decreasing order, start with 0
  *           and end with value equal with size of indices.
  */
 struct csr_indptr_check {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, const IType* indptr,
-                                  const nnvm::dim_t end, const nnvm::dim_t idx_size) {
-    if (indptr[i+1] < 0 || indptr[i+1] < indptr[i] ||
-        (i == 0 && indptr[i] != 0) ||
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  const IType* indptr,
+                                  const nnvm::dim_t end,
+                                  const nnvm::dim_t idx_size) {
+    if (indptr[i + 1] < 0 || indptr[i + 1] < indptr[i] || (i == 0 && indptr[i] != 0) ||
         (i == end - 1 && indptr[end] != idx_size))
       *out = kCSRIndPtrErr;
   }
@@ -88,12 +93,14 @@ struct csr_indptr_check {
  *           and in ascending order per row.
  */
 struct csr_idx_check {
-  template<typename DType, typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, const IType* idx,
-                                  const RType* indptr, const nnvm::dim_t ncols) {
-    for (RType j = indptr[i]; j < indptr[i+1]; j++) {
-      if (idx[j] >= ncols || idx[j] < 0 ||
-          (j < indptr[i+1] - 1 && idx[j] >= idx[j+1])) {
+  template <typename DType, typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  const IType* idx,
+                                  const RType* indptr,
+                                  const nnvm::dim_t ncols) {
+    for (RType j = indptr[i]; j < indptr[i + 1]; j++) {
+      if (idx[j] >= ncols || idx[j] < 0 || (j < indptr[i + 1] - 1 && idx[j] >= idx[j + 1])) {
         *out = kCSRIdxErr;
         break;
       }
@@ -106,18 +113,22 @@ struct csr_idx_check {
  *           less than the size of first dimension and in ascending order
  */
 struct rsp_idx_check {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, const IType* idx,
-                                  const nnvm::dim_t end, const nnvm::dim_t nrows) {
-    if ((i < end && idx[i+1] <= idx[i])
-        || idx[i] < 0 || idx[i] >= nrows)
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  const IType* idx,
+                                  const nnvm::dim_t end,
+                                  const nnvm::dim_t nrows) {
+    if ((i < end && idx[i + 1] <= idx[i]) || idx[i] < 0 || idx[i] >= nrows)
       *out = kRSPIdxErr;
   }
 };
 
-template<typename xpu>
-void CheckFormatWrapper(const RunContext &rctx, const NDArray &input,
-                        const TBlob &err_cpu, const bool full_check);
+template <typename xpu>
+void CheckFormatWrapper(const RunContext& rctx,
+                        const NDArray& input,
+                        const TBlob& err_cpu,
+                        const bool full_check);
 
 /*!
  * \brief Check the validity of CSRNDArray.
@@ -127,46 +138,50 @@ void CheckFormatWrapper(const RunContext &rctx, const NDArray &input,
  * \param full_check If true, rigorous check, O(N) operations,
  *          otherwise basic check, O(1) operations.
  */
-template<typename xpu>
-void CheckFormatCSRImpl(const RunContext &rctx, const NDArray &input,
-                        const TBlob &err_cpu, const bool full_check) {
+template <typename xpu>
+void CheckFormatCSRImpl(const RunContext& rctx,
+                        const NDArray& input,
+                        const TBlob& err_cpu,
+                        const bool full_check) {
   using namespace op::mxnet_op;
-  CHECK_EQ(input.storage_type(), kCSRStorage)
-          << "CheckFormatCSRImpl is for CSRNDArray";
-  const mxnet::TShape shape = input.shape();
-  const mxnet::TShape idx_shape = input.aux_shape(csr::kIdx);
-  const mxnet::TShape indptr_shape = input.aux_shape(csr::kIndPtr);
+  CHECK_EQ(input.storage_type(), kCSRStorage) << "CheckFormatCSRImpl is for CSRNDArray";
+  const mxnet::TShape shape         = input.shape();
+  const mxnet::TShape idx_shape     = input.aux_shape(csr::kIdx);
+  const mxnet::TShape indptr_shape  = input.aux_shape(csr::kIndPtr);
   const mxnet::TShape storage_shape = input.storage_shape();
   if ((shape.ndim() != 2) ||
       (idx_shape.ndim() != 1 || indptr_shape.ndim() != 1 || storage_shape.ndim() != 1) ||
-      (indptr_shape[0] != shape[0] + 1) ||
-      (idx_shape[0] != storage_shape[0])) {
-     MSHADOW_TYPE_SWITCH(err_cpu.type_flag_, DType, {
-       DType* err = err_cpu.dptr<DType>();
-       *err = kCSRShapeErr;
-     });
-     return;
+      (indptr_shape[0] != shape[0] + 1) || (idx_shape[0] != storage_shape[0])) {
+    MSHADOW_TYPE_SWITCH(err_cpu.type_flag_, DType, {
+      DType* err = err_cpu.dptr<DType>();
+      *err       = kCSRShapeErr;
+    });
+    return;
   }
   if (full_check) {
     MSHADOW_TYPE_SWITCH(err_cpu.type_flag_, DType, {
       MSHADOW_IDX_TYPE_SWITCH(input.aux_type(csr::kIndPtr), RType, {
         MSHADOW_IDX_TYPE_SWITCH(input.aux_type(csr::kIdx), IType, {
-          mshadow::Stream<xpu> *s = rctx.get_stream<xpu>();
-          NDArray ret_xpu = NDArray(mshadow::Shape1(1),
-                                    rctx.get_ctx(), false, err_cpu.type_flag_);
-          TBlob val_xpu = ret_xpu.data();
+          mshadow::Stream<xpu>* s = rctx.get_stream<xpu>();
+          NDArray ret_xpu = NDArray(mshadow::Shape1(1), rctx.get_ctx(), false, err_cpu.type_flag_);
+          TBlob val_xpu   = ret_xpu.data();
           Kernel<set_to_int<kNormalErr>, xpu>::Launch(s, val_xpu.Size(), val_xpu.dptr<DType>());
-          Kernel<csr_indptr_check, xpu>::Launch(s, indptr_shape[0] - 1, val_xpu.dptr<DType>(),
-            input.aux_data(csr::kIndPtr).dptr<RType>(),
-            indptr_shape[0] - 1, idx_shape[0]);
+          Kernel<csr_indptr_check, xpu>::Launch(s,
+                                                indptr_shape[0] - 1,
+                                                val_xpu.dptr<DType>(),
+                                                input.aux_data(csr::kIndPtr).dptr<RType>(),
+                                                indptr_shape[0] - 1,
+                                                idx_shape[0]);
           // no need to check indices if indices are empty
           if (idx_shape[0] != 0) {
-            Kernel<csr_idx_check, xpu>::Launch(s, indptr_shape[0] - 1, val_xpu.dptr<DType>(),
-              input.aux_data(csr::kIdx).dptr<IType>(),
-              input.aux_data(csr::kIndPtr).dptr<RType>(), shape[1]);
+            Kernel<csr_idx_check, xpu>::Launch(s,
+                                               indptr_shape[0] - 1,
+                                               val_xpu.dptr<DType>(),
+                                               input.aux_data(csr::kIdx).dptr<IType>(),
+                                               input.aux_data(csr::kIndPtr).dptr<RType>(),
+                                               shape[1]);
           }
-          mshadow::Copy(err_cpu.get<cpu, 1, DType>(),
-                        val_xpu.get<xpu, 1, DType>(s), s);
+          mshadow::Copy(err_cpu.get<cpu, 1, DType>(), val_xpu.get<xpu, 1, DType>(s), s);
         });
       });
     });
@@ -181,17 +196,18 @@ void CheckFormatCSRImpl(const RunContext &rctx, const NDArray &input,
  * \param full_check If true, rigorous check, O(N) operations,
  *          otherwise basic check, O(1) operations.
  */
-template<typename xpu>
-void CheckFormatRSPImpl(const RunContext &rctx, const NDArray &input,
-                        const TBlob &err_cpu, const bool full_check) {
+template <typename xpu>
+void CheckFormatRSPImpl(const RunContext& rctx,
+                        const NDArray& input,
+                        const TBlob& err_cpu,
+                        const bool full_check) {
   using namespace op::mxnet_op;
-  CHECK_EQ(input.storage_type(), kRowSparseStorage)
-          << "CheckFormatRSPImpl is for RSPNDArray";
+  CHECK_EQ(input.storage_type(), kRowSparseStorage) << "CheckFormatRSPImpl is for RSPNDArray";
   const mxnet::TShape idx_shape = input.aux_shape(rowsparse::kIdx);
   if (idx_shape[0] != input.storage_shape()[0]) {
     MSHADOW_TYPE_SWITCH(err_cpu.type_flag_, DType, {
       DType* err = err_cpu.dptr<DType>();
-      *err = kRSPShapeErr;
+      *err       = kRSPShapeErr;
     });
     return;
   }
@@ -201,25 +217,28 @@ void CheckFormatRSPImpl(const RunContext &rctx, const NDArray &input,
   if (full_check) {
     MSHADOW_TYPE_SWITCH(err_cpu.type_flag_, DType, {
       MSHADOW_IDX_TYPE_SWITCH(input.aux_type(rowsparse::kIdx), IType, {
-        mshadow::Stream<xpu> *s = rctx.get_stream<xpu>();
-        NDArray ret_xpu = NDArray(mshadow::Shape1(1),
-                                  rctx.get_ctx(), false, err_cpu.type_flag_);
-        TBlob val_xpu = ret_xpu.data();
+        mshadow::Stream<xpu>* s = rctx.get_stream<xpu>();
+        NDArray ret_xpu = NDArray(mshadow::Shape1(1), rctx.get_ctx(), false, err_cpu.type_flag_);
+        TBlob val_xpu   = ret_xpu.data();
         Kernel<set_to_int<kNormalErr>, xpu>::Launch(s, val_xpu.Size(), val_xpu.dptr<DType>());
 
-        Kernel<rsp_idx_check, xpu>::Launch(s, idx_shape[0],
-          val_xpu.dptr<DType>(), input.aux_data(rowsparse::kIdx).dptr<IType>(),
-          idx_shape[0] - 1, input.shape()[0]);
-        mshadow::Copy(err_cpu.get<cpu, 1, DType>(),
-                      val_xpu.get<xpu, 1, DType>(s), s);
+        Kernel<rsp_idx_check, xpu>::Launch(s,
+                                           idx_shape[0],
+                                           val_xpu.dptr<DType>(),
+                                           input.aux_data(rowsparse::kIdx).dptr<IType>(),
+                                           idx_shape[0] - 1,
+                                           input.shape()[0]);
+        mshadow::Copy(err_cpu.get<cpu, 1, DType>(), val_xpu.get<xpu, 1, DType>(s), s);
       });
     });
   }
 }
 
-template<typename xpu>
-void CheckFormatImpl(const RunContext &rctx, const NDArray &input,
-                     const TBlob &err_cpu, const bool full_check) {
+template <typename xpu>
+void CheckFormatImpl(const RunContext& rctx,
+                     const NDArray& input,
+                     const TBlob& err_cpu,
+                     const bool full_check) {
   int stype = input.storage_type();
   if (stype == kCSRStorage) {
     CheckFormatCSRImpl<xpu>(rctx, input, err_cpu, full_check);
@@ -235,8 +254,8 @@ void CheckFormatImpl(const RunContext &rctx, const NDArray &input,
 /*! \brief Pick rows specified by user input index array from a row sparse ndarray
  *         and save them in the output sparse ndarray.
  */
-template<typename xpu>
-void SparseRetainOpForwardRspWrapper(mshadow::Stream<xpu> *s,
+template <typename xpu>
+void SparseRetainOpForwardRspWrapper(mshadow::Stream<xpu>* s,
                                      const NDArray& input_nd,
                                      const TBlob& idx_data,
                                      const OpReqType req,
@@ -244,17 +263,17 @@ void SparseRetainOpForwardRspWrapper(mshadow::Stream<xpu> *s,
 
 /* \brief Casts tensor storage type to the new type.
  */
-template<typename xpu>
+template <typename xpu>
 void CastStorageDispatch(const OpContext& ctx, const NDArray& input, const NDArray& output);
 
 /*! \brief returns true if all storage types in `vstorage` are the same as target `stype`.
  *         false is returned for empty inputs.
  */
-inline bool ContainsOnlyStorage(const StorageTypeVector& vstorage,
-                                const NDArrayStorageType stype) {
+inline bool ContainsOnlyStorage(const StorageTypeVector& vstorage, const NDArrayStorageType stype) {
   if (!vstorage.empty()) {
     for (const auto& i : vstorage) {
-      if (i != stype) return false;
+      if (i != stype)
+        return false;
     }
     return true;
   }
@@ -268,7 +287,7 @@ inline bool ContainsOnlyStorage(const StorageTypeVector& vstorage,
 inline bool ContainsOnlyStorage(const StorageTypeVector& vstorage,
                                 const NDArrayStorageType stype1,
                                 const NDArrayStorageType stype2,
-                                bool *has_both) {
+                                bool* has_both) {
   if (has_both) {
     *has_both = false;
   }
@@ -313,7 +332,7 @@ inline bool ContainsOnlyStorage(const std::vector<NDArray>& ndarrays,
 inline bool ContainsOnlyStorage(const std::vector<NDArray>& ndarrays,
                                 const NDArrayStorageType stype1,
                                 const NDArrayStorageType stype2,
-                                bool *has_both) {
+                                bool* has_both) {
   if (has_both) {
     *has_both = false;
   }
@@ -355,8 +374,7 @@ inline bool ContainsStorageType(const std::vector<NDArray>& ndarrays,
 /*! \brief returns true if any storage type `ndstype` in `ndstypes`
  *         is the same as the target `stype`. false is returned for empty inputs.
  */
-inline bool ContainsStorageType(const std::vector<int>& ndstypes,
-                                const NDArrayStorageType stype) {
+inline bool ContainsStorageType(const std::vector<int>& ndstypes, const NDArrayStorageType stype) {
   if (!ndstypes.empty()) {
     for (const auto& ndstype : ndstypes) {
       if (ndstype == stype) {
@@ -384,7 +402,6 @@ inline std::string dispatch_mode_string(const DispatchMode x) {
   return "unknown";
 }
 
-
 /*! \brief get string representation of storage_type */
 inline std::string stype_string(const int x) {
   switch (x) {
@@ -428,8 +445,7 @@ inline std::string operator_stype_string(const nnvm::NodeAttrs& attrs,
                                          const std::vector<int>& in_attrs,
                                          const std::vector<int>& out_attrs) {
   std::ostringstream os;
-  os << "operator = " << attrs.op->name
-     << "\ninput storage types = [";
+  os << "operator = " << attrs.op->name << "\ninput storage types = [";
   for (const int attr : in_attrs) {
     os << stype_string(attr) << ", ";
   }
@@ -483,25 +499,31 @@ inline void LogStorageFallback(const nnvm::NodeAttrs& attrs,
                                const std::vector<int>* in_attrs,
                                const std::vector<int>* out_attrs) {
   static bool log = dmlc::GetEnv("MXNET_STORAGE_FALLBACK_LOG_VERBOSE", true);
-  if (!log) return;
+  if (!log)
+    return;
   const std::string op_str = operator_stype_string(attrs, dev_mask, *in_attrs, *out_attrs);
   std::ostringstream os;
-  const char* warning = "\nThe operator with default storage type will be dispatched "
-    "for execution. You're seeing this warning message because the operator above is unable "
-    "to process the given ndarrays with specified storage types, context and parameter. "
-    "Temporary dense ndarrays are generated in order to execute the operator. "
-    "This does not affect the correctness of the programme. "
-    "You can set environment variable MXNET_STORAGE_FALLBACK_LOG_VERBOSE to "
-    "0 to suppress this warning.";
+  const char* warning =
+      "\nThe operator with default storage type will be dispatched "
+      "for execution. You're seeing this warning message because the operator above is unable "
+      "to process the given ndarrays with specified storage types, context and parameter. "
+      "Temporary dense ndarrays are generated in order to execute the operator. "
+      "This does not affect the correctness of the programme. "
+      "You can set environment variable MXNET_STORAGE_FALLBACK_LOG_VERBOSE to "
+      "0 to suppress this warning.";
   os << "\nStorage type fallback detected:\n" << op_str << warning;
   LogOnce(os.str());
 #if MXNET_USE_ONEDNN == 1
-  if (!MKLDNNEnvSet()) common::LogOnce("MXNET_ONEDNN_ENABLED flag is off. "
-                                       "You can re-enable by setting MXNET_ONEDNN_ENABLED=1");
-  if (GetMKLDNNCacheSize() != -1) common::LogOnce("MXNET_ONEDNN_CACHE_NUM is set."
-                                       "Should only be set if "
-                                       "your model has variable input shapes, "
-                                       "as cache size may grow unbounded");
+  if (!MKLDNNEnvSet())
+    common::LogOnce(
+        "MXNET_ONEDNN_ENABLED flag is off. "
+        "You can re-enable by setting MXNET_ONEDNN_ENABLED=1");
+  if (GetMKLDNNCacheSize() != -1)
+    common::LogOnce(
+        "MXNET_ONEDNN_CACHE_NUM is set."
+        "Should only be set if "
+        "your model has variable input shapes, "
+        "as cache size may grow unbounded");
 #endif
 }
 
@@ -519,10 +541,10 @@ inline int GetExecNumMatchColor() {
   return std::min(num_match_color, GetNumThreadsPerGPU());
 }
 
-template<typename T, typename V>
+template <typename T, typename V>
 V ParallelAccumulate(const T* a, const int n, V start) {
   V sum = start;
-#pragma omp parallel for reduction(+:sum)
+#pragma omp parallel for reduction(+ : sum)
   for (int i = 0; i < n; ++i) {
     sum += a[i];
   }
@@ -536,16 +558,15 @@ V ParallelAccumulate(const T* a, const int n, V start) {
  * Use the interface ParallelSort instead.
  * Ref: https://github.com/dmlc/difacto/blob/master/src/common/parallel_sort.h
  */
-template<typename RandomIt, typename Compare>
-void ParallelSortHelper(RandomIt first, size_t len,
-                        size_t grainsize, const Compare& comp) {
+template <typename RandomIt, typename Compare>
+void ParallelSortHelper(RandomIt first, size_t len, size_t grainsize, const Compare& comp) {
   if (len < grainsize) {
-    std::sort(first, first+len, comp);
+    std::sort(first, first + len, comp);
   } else {
-    std::thread thr(ParallelSortHelper<RandomIt, Compare>, first, len/2, grainsize, comp);
-    ParallelSortHelper(first+len/2, len - len/2, grainsize, comp);
+    std::thread thr(ParallelSortHelper<RandomIt, Compare>, first, len / 2, grainsize, comp);
+    ParallelSortHelper(first + len / 2, len - len / 2, grainsize, comp);
     thr.join();
-    std::inplace_merge(first, first+len/2, first+len, comp);
+    std::inplace_merge(first, first + len / 2, first + len, comp);
   }
 }
 
@@ -558,10 +579,10 @@ void ParallelSortHelper(RandomIt first, size_t len,
  * to sort each half range.
  * Ref: https://github.com/dmlc/difacto/blob/master/src/common/parallel_sort.h
  */
-template<typename RandomIt, typename Compare>
+template <typename RandomIt, typename Compare>
 void ParallelSort(RandomIt first, RandomIt last, size_t num_threads, Compare comp) {
-  const auto num = std::distance(first, last);
-  size_t grainsize = std::max(num / num_threads + 5, static_cast<size_t>(1024*16));
+  const auto num   = std::distance(first, last);
+  size_t grainsize = std::max(num / num_threads + 5, static_cast<size_t>(1024 * 16));
   ParallelSortHelper(first, num, grainsize, comp);
 }
 
@@ -574,10 +595,10 @@ void ParallelSort(RandomIt first, RandomIt last, size_t num_threads, Compare com
  * to sort each half range.
  * Ref: https://github.com/dmlc/difacto/blob/master/src/common/parallel_sort.h
  */
-template<typename RandomIt>
+template <typename RandomIt>
 void ParallelSort(RandomIt first, RandomIt last, size_t num_threads) {
-  ParallelSort(first, last, num_threads,
-               std::less<typename std::iterator_traits<RandomIt>::value_type>());
+  ParallelSort(
+      first, last, num_threads, std::less<typename std::iterator_traits<RandomIt>::value_type>());
 }
 
 /*!
@@ -667,9 +688,8 @@ typename helper::UniqueIf<T>::UnknownBound MakeUnique(size_t n) {
 template <class T, class... Args>
 typename helper::UniqueIf<T>::KnownBound MakeUnique(Args&&... args) = delete;
 
-template<typename FCompType>
-FCompType GetFCompute(const nnvm::Op* op, const std::string& name,
-                      const Context& ctx) {
+template <typename FCompType>
+FCompType GetFCompute(const nnvm::Op* op, const std::string& name, const Context& ctx) {
   static auto& fcompute_cpu = nnvm::Op::GetAttr<FCompType>(name + "<cpu>");
   static auto& fcompute_gpu = nnvm::Op::GetAttr<FCompType>(name + "<gpu>");
 
@@ -688,9 +708,8 @@ FCompType GetFCompute(const nnvm::Op* op, const std::string& name,
  */
 template <typename T>
 constexpr size_t MaxIntegerValue() {
-  return std::is_integral<T>::value ?
-    std::numeric_limits<T>::max():
-    size_t(2) << (std::numeric_limits<T>::digits - 1);
+  return std::is_integral<T>::value ? std::numeric_limits<T>::max()
+                                    : size_t(2) << (std::numeric_limits<T>::digits - 1);
 }
 
 template <>
@@ -705,21 +724,25 @@ constexpr size_t MaxIntegerValue<mshadow::bfloat::bf16_t>() {
 
 MSHADOW_XINLINE int ilog2ul(size_t a) {
   int k = 1;
-  while (a >>= 1) ++k;
+  while (a >>= 1)
+    ++k;
   return k;
 }
 
 MSHADOW_XINLINE int ilog2ui(unsigned int a) {
   int k = 1;
-  while (a >>= 1) ++k;
+  while (a >>= 1)
+    ++k;
   return k;
 }
 
 /*!
  * \brief Return an NDArray of all zeros.
  */
-inline NDArray InitZeros(const NDArrayStorageType stype, const mxnet::TShape &shape,
-                         const Context &ctx, const int dtype) {
+inline NDArray InitZeros(const NDArrayStorageType stype,
+                         const mxnet::TShape& shape,
+                         const Context& ctx,
+                         const int dtype) {
   // NDArray with default storage
   if (stype == kDefaultStorage) {
     NDArray ret(shape, ctx, false, dtype);
@@ -734,10 +757,10 @@ inline NDArray InitZeros(const NDArrayStorageType stype, const mxnet::TShape &sh
  * \brief Helper to add a NDArray of zeros to a std::vector.
  */
 inline void EmplaceBackZeros(const NDArrayStorageType stype,
-                             const mxnet::TShape &shape,
-                             const Context &ctx,
+                             const mxnet::TShape& shape,
+                             const Context& ctx,
                              const int dtype,
-                             std::vector<NDArray> *vec) {
+                             std::vector<NDArray>* vec) {
   // NDArray with default storage
   if (stype == kDefaultStorage) {
     vec->emplace_back(shape, ctx, false, dtype);
@@ -748,15 +771,14 @@ inline void EmplaceBackZeros(const NDArrayStorageType stype,
   }
 }
 
-
 /*!
  * \brief parallelize copy by OpenMP.
  */
-template<typename DType>
+template <typename DType>
 inline void ParallelCopy(DType* dst, const DType* src, index_t size) {
   static index_t copy_block_size = dmlc::GetEnv("MXNET_CPU_PARALLEL_SIZE", 200000);
   if (size >= copy_block_size) {
-    #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (index_t i = 0; i < size; ++i) {
       dst[i] = src[i];
     }
@@ -773,11 +795,11 @@ inline void ParallelCopy(DType* dst, const DType* src, index_t size) {
 /*!
  * \breif parallelize add by OpenMP
  */
-template<typename DType>
+template <typename DType>
 inline void ParallelAdd(DType* dst, const DType* src, index_t size) {
   static index_t add_block_size = dmlc::GetEnv("MXNET_CPU_PARALLEL_SIZE", 200000);
   if (size >= add_block_size) {
-    #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (index_t i = 0; i < size; ++i) {
       dst[i] += src[i];
     }
@@ -807,12 +829,12 @@ inline void ParallelAdd(DType* dst, const DType* src, index_t size) {
  * compatible shapes.
  */
 inline void ConvertToNumpyShape(mxnet::TShape* shape) {
-  if (shape->ndim() == 0) {  // legacy shape ndim = 0 means unknown
+  if (shape->ndim() == 0) {    // legacy shape ndim = 0 means unknown
     *shape = mxnet::TShape();  // unknown shape ndim = -1
   } else {
     for (int j = 0; j < shape->ndim(); ++j) {
       if ((*shape)[j] == 0) {  // legacy shape dim_size = 0 means unknown
-        (*shape)[j] = -1;  // unknown dim size = -1
+        (*shape)[j] = -1;      // unknown dim size = -1
       }
     }
   }
@@ -846,26 +868,27 @@ inline void ConvertToLegacyShape(mxnet::ShapeVector* shapes) {
   }
 }
 void ExecuteMonInputCallback(
-    const nnvm::IndexedGraph &idx, const std::vector<NDArray *> &state_arrays,
-    size_t nid, const std::function<void(const char *, const char *, void *)>
-                    &monitor_callback);
+    const nnvm::IndexedGraph& idx,
+    const std::vector<NDArray*>& state_arrays,
+    size_t nid,
+    const std::function<void(const char*, const char*, void*)>& monitor_callback);
 
 void ExecuteMonOutputCallback(
-    const nnvm::IndexedGraph &idx, const std::vector<NDArray *> &state_arrays,
-    size_t nid, const std::function<void(const char *, const char *, void *)>
-                    &monitor_callback);
+    const nnvm::IndexedGraph& idx,
+    const std::vector<NDArray*>& state_arrays,
+    size_t nid,
+    const std::function<void(const char*, const char*, void*)>& monitor_callback);
 
 inline mxnet::TShape CanonicalizeAxes(const mxnet::TShape& src) {
   // convert negative axes to positive values
-  const int ndim = src.ndim();
+  const int ndim     = src.ndim();
   mxnet::TShape axes = src;
   for (int i = 0; i < ndim; ++i) {
     if (axes[i] < 0) {
       axes[i] += ndim;
     }
-    CHECK(axes[i] >= 0 && axes[i] < ndim) << "axes[" << i << "]="
-                                          << axes[i] << " exceeds the range ["
-                                          << 0 << ", " << ndim << ")";
+    CHECK(axes[i] >= 0 && axes[i] < ndim)
+        << "axes[" << i << "]=" << axes[i] << " exceeds the range [" << 0 << ", " << ndim << ")";
   }
   return axes;
 }
@@ -875,12 +898,13 @@ inline bool is_float(const int dtype) {
 }
 
 inline bool is_int(const int dtype) {
-  return dtype == mshadow::kUint8 || dtype == mshadow::kInt8 ||
-         dtype == mshadow::kInt32 || dtype == mshadow::kInt64;
+  return dtype == mshadow::kUint8 || dtype == mshadow::kInt8 || dtype == mshadow::kInt32 ||
+         dtype == mshadow::kInt64;
 }
 
 inline int get_more_precise_type(const int type1, const int type2) {
-  if (type1 == type2) return type1;
+  if (type1 == type2)
+    return type1;
   if (is_float(type1) && is_float(type2)) {
     if (type1 == mshadow::kFloat64 || type2 == mshadow::kFloat64) {
       return mshadow::kFloat64;
@@ -900,7 +924,7 @@ inline int get_more_precise_type(const int type1, const int type2) {
   }
   CHECK(!((type1 == mshadow::kUint8 && type2 == mshadow::kInt8) ||
           (type1 == mshadow::kInt8 && type2 == mshadow::kUint8)))
-    << "1 is UInt8 and 1 is Int8 should not get here";
+      << "1 is UInt8 and 1 is Int8 should not get here";
   if (type1 == mshadow::kUint8 || type2 == mshadow::kUint8) {
     return mshadow::kUint8;
   }
@@ -915,13 +939,12 @@ inline int np_binary_out_infer_type(const int type1, const int type2) {
   return get_more_precise_type(type1, type2);
 }
 
-inline const std::string
-NodeAttrsGetProfilerScope(const nnvm::NodeAttrs& attrs) {
+inline const std::string NodeAttrsGetProfilerScope(const nnvm::NodeAttrs& attrs) {
   // obtain the profiler scope name, if assigned previously
   std::string profiler_scope = MXNET_STORAGE_DEFAULT_PROFILER_SCOPE_CSTR;
   const std::unordered_map<std::string, std::string>& node_attrs_dict = attrs.dict;
-  const std::unordered_map<std::string, std::string>::const_iterator
-      profiler_scope_iter  = node_attrs_dict.find("__profiler_scope__");
+  const std::unordered_map<std::string, std::string>::const_iterator profiler_scope_iter =
+      node_attrs_dict.find("__profiler_scope__");
   if (profiler_scope_iter != node_attrs_dict.end()) {
     profiler_scope = profiler_scope_iter->second;
   }
@@ -929,16 +952,13 @@ NodeAttrsGetProfilerScope(const nnvm::NodeAttrs& attrs) {
 }
 
 inline int GetDefaultDtype() {
-  return Imperative::Get()->is_np_default_dtype() ?
-         mshadow::kFloat64 :
-         mshadow::kFloat32;
+  return Imperative::Get()->is_np_default_dtype() ? mshadow::kFloat64 : mshadow::kFloat32;
 }
 
 inline int GetDefaultDtype(int dtype) {
-  if (dtype != -1) return dtype;
-  return Imperative::Get()->is_np_default_dtype() ?
-         mshadow::kFloat64 :
-         mshadow::kFloat32;
+  if (dtype != -1)
+    return dtype;
+  return Imperative::Get()->is_np_default_dtype() ? mshadow::kFloat64 : mshadow::kFloat32;
 }
 
 struct MShadowTypeInfo {
@@ -946,11 +966,10 @@ struct MShadowTypeInfo {
   int size;
   int acc_size;
 
-  MShadowTypeInfo(const std::string name, const int size, const int acc_size) :
-    name(std::move(name)), size(size), acc_size(acc_size) {}
+  MShadowTypeInfo(const std::string name, const int size, const int acc_size)
+      : name(std::move(name)), size(size), acc_size(acc_size) {}
 
-  MShadowTypeInfo(const std::string name, const int size) :
-    MShadowTypeInfo(name, size, size) {}
+  MShadowTypeInfo(const std::string name, const int size) : MShadowTypeInfo(name, size, size) {}
 };
 
 MShadowTypeInfo mshadow_type_info(const int type_flag);
@@ -976,7 +995,6 @@ inline void AlignedMemFree(void* ptr) {
 #endif
 }
 
-
 inline index_t div_round(const index_t a, const index_t b) {
   return (a + b - 1) / b;
 }
@@ -986,7 +1004,7 @@ inline bool IsPower2(size_t N) {
 }
 
 inline size_t RoundToPower2(size_t N) {
-  size_t ret = 1;
+  size_t ret   = 1;
   size_t copyN = N;
   while (N >= 2) {
     ret *= 2;
diff --git a/src/engine/engine.cc b/src/engine/engine.cc
index a33f0b2c1442..5725fa4fd7df 100644
--- a/src/engine/engine.cc
+++ b/src/engine/engine.cc
@@ -30,13 +30,14 @@
 namespace mxnet {
 namespace engine {
 inline Engine* CreateEngine() {
-  const char *type = getenv("MXNET_ENGINE_TYPE");
+  const char* type          = getenv("MXNET_ENGINE_TYPE");
   const bool default_engine = (type == nullptr);
-  if (type == nullptr) type = "ThreadedEnginePerDevice";
+  if (type == nullptr)
+    type = "ThreadedEnginePerDevice";
   std::string stype = type;
 
-  Engine *ret = nullptr;
-  #if MXNET_PREDICT_ONLY == 0
+  Engine* ret = nullptr;
+#if MXNET_PREDICT_ONLY == 0
   if (stype == "NaiveEngine") {
     ret = CreateNaiveEngine();
   } else if (stype == "ThreadedEngine") {
@@ -44,9 +45,9 @@ inline Engine* CreateEngine() {
   } else if (stype == "ThreadedEnginePerDevice") {
     ret = CreateThreadedEnginePerDevice();
   }
-  #else
+#else
   ret = CreateNaiveEngine();
-  #endif
+#endif
 
   if (ret == nullptr) {
     LOG(FATAL) << "Cannot find Engine " << type;
@@ -64,7 +65,7 @@ std::shared_ptr<Engine> Engine::_GetSharedRef() {
 }
 
 Engine* Engine::Get() {
-  static Engine *inst = _GetSharedRef().get();
+  static Engine* inst = _GetSharedRef().get();
   return inst;
 }
 }  // namespace mxnet
diff --git a/src/engine/engine_impl.h b/src/engine/engine_impl.h
index f15141f4e7a2..d83eea4ab662 100644
--- a/src/engine/engine_impl.h
+++ b/src/engine/engine_impl.h
@@ -50,8 +50,7 @@ struct Opr {
 // implementation of the inline functions
 template <typename T>
 inline T* Var::Cast() {
-  static_assert(std::is_base_of<Var, T>::value,
-                "must inherit `mxnet::engine::Var`");
+  static_assert(std::is_base_of<Var, T>::value, "must inherit `mxnet::engine::Var`");
 #if ENGINE_DEBUG
   return dynamic_cast<T*>(this);
 #else
@@ -61,8 +60,7 @@ inline T* Var::Cast() {
 
 template <typename T>
 inline T* Opr::Cast() {
-  static_assert(std::is_base_of<Opr, T>::value,
-                "must inherit `mxnet::engine::Opr`");
+  static_assert(std::is_base_of<Opr, T>::value, "must inherit `mxnet::engine::Opr`");
 #if ENGINE_DEBUG
   return dynamic_cast<T*>(this);
 #else
@@ -75,12 +73,12 @@ static constexpr std::size_t kMaxNumGPUs = 16;
 
 // predeclare factory function for each type of engine
 /*! \return NaiveEngine instance */
-Engine *CreateNaiveEngine();
+Engine* CreateNaiveEngine();
 #if MXNET_PREDICT_ONLY == 0
 /*! \return ThreadedEnginePooled instance */
-Engine *CreateThreadedEnginePooled();
+Engine* CreateThreadedEnginePooled();
 /*! \return ThreadedEnginePerDevie instance */
-Engine *CreateThreadedEnginePerDevice();
+Engine* CreateThreadedEnginePerDevice();
 #endif
 }  // namespace engine
 }  // namespace mxnet
diff --git a/src/engine/naive_engine.cc b/src/engine/naive_engine.cc
index 95528a934c6c..e1ab240bbde4 100644
--- a/src/engine/naive_engine.cc
+++ b/src/engine/naive_engine.cc
@@ -40,15 +40,13 @@ namespace engine {
  * \brief var used in Naive Engine for tracking the version
  * of the objects it is associated with.
  */
-class NaiveVar final
-    : public Var, public common::ObjectPoolAllocatable<NaiveVar> {
+class NaiveVar final : public Var, public common::ObjectPoolAllocatable<NaiveVar> {
  public:
   inline static NaiveVar* CastFromBase(Var* ptr) {
     return ptr->Cast<NaiveVar>();
   }
 };  // class NaiveVar
 
-
 // implement naive engine
 class NaiveEngine final : public Engine {
  public:
@@ -87,11 +85,9 @@ class NaiveEngine final : public Engine {
   ~NaiveEngine() override = default;
 #endif
 
-  void Stop() override {
-  }
+  void Stop() override {}
 
-  void Start() override {
-  }
+  void Start() override {}
 
   // new variables
   VarHandle NewVariable() override {
@@ -101,86 +97,84 @@ class NaiveEngine final : public Engine {
   OprHandle NewOperator(AsyncFn fn,
                         std::vector<VarHandle> const& const_vars,
                         std::vector<VarHandle> const& mutable_vars,
-                        FnProperty prop = FnProperty::kNormal,
+                        FnProperty prop      = FnProperty::kNormal,
                         const char* opr_name = nullptr,
-                        bool wait = false) override {
-    NaiveOpr *opr = new NaiveOpr();
-    opr->fn = fn;
-    opr->const_vars = const_vars;
+                        bool wait            = false) override {
+    NaiveOpr* opr     = new NaiveOpr();
+    opr->fn           = fn;
+    opr->const_vars   = const_vars;
     opr->mutable_vars = mutable_vars;
-    opr->prop = prop;
-    opr->opr_name = opr_name ? std::string(opr_name) : std::string();
+    opr->prop         = prop;
+    opr->opr_name     = opr_name ? std::string(opr_name) : std::string();
     return opr;
   }
 
   void DeleteOperator(OprHandle op) override {
-    NaiveOpr *opr = op->Cast<NaiveOpr>();
+    NaiveOpr* opr = op->Cast<NaiveOpr>();
     delete opr;
   }
 
   void Push(OprHandle op, Context exec_ctx, int priority = 0, bool profiling = false) override {
-    profiler::Profiler *profiler = profiler::Profiler::Get();
-    NaiveOpr *opr = op->Cast<NaiveOpr>();
+    profiler::Profiler* profiler = profiler::Profiler::Get();
+    NaiveOpr* opr                = op->Cast<NaiveOpr>();
     opr->profiling = profiling && profiler->IsProfiling(profiler::Profiler::kSymbolic);
-    this->PushAsync([&](RunContext ctx, CallbackOnComplete on_complete) {
-        if (opr->profiling) {
-          std::unique_ptr<profiler::ProfileOperator::Attributes> attrs;
-          if (profiler->AggregateEnabled()) {
-            attrs = std::make_unique<profiler::ProfileOperator::Attributes>();
+    this->PushAsync(
+        [&](RunContext ctx, CallbackOnComplete on_complete) {
+          if (opr->profiling) {
+            std::unique_ptr<profiler::ProfileOperator::Attributes> attrs;
+            if (profiler->AggregateEnabled()) {
+              attrs = std::make_unique<profiler::ProfileOperator::Attributes>();
+            }
+            opr->opr_profile =
+                std::make_unique<profiler::ProfileOperator>(opr->opr_name.c_str(), attrs.release());
+            opr->opr_profile->startForDevice(exec_ctx.dev_type, exec_ctx.dev_id);
           }
-          opr->opr_profile = std::make_unique<profiler::ProfileOperator>(opr->opr_name.c_str(),
-                                                               attrs.release());
-          opr->opr_profile->startForDevice(exec_ctx.dev_type, exec_ctx.dev_id);
-        }
-        opr->fn(ctx, on_complete);
-        if (opr->profiling) {
-          opr->opr_profile->stop();
-        }
-      },
-      exec_ctx,
-      opr->const_vars,
-      opr->mutable_vars,
-      opr->prop,
-      priority,
-      opr->opr_name.c_str());
+          opr->fn(ctx, on_complete);
+          if (opr->profiling) {
+            opr->opr_profile->stop();
+          }
+        },
+        exec_ctx,
+        opr->const_vars,
+        opr->mutable_vars,
+        opr->prop,
+        priority,
+        opr->opr_name.c_str());
   }
 
-/*!
- * \brief NaiveEngine's PushAsync was intentionally synchronous.
- * User should not make any assumption about execution order when using async interface of any engine.
- */
+  /*!
+   * \brief NaiveEngine's PushAsync was intentionally synchronous.
+   * User should not make any assumption about execution order when using async interface of any
+   * engine.
+   */
   void PushAsync(AsyncFn exec_fun,
                  Context exec_ctx,
                  std::vector<VarHandle> const& const_vars,
                  std::vector<VarHandle> const& mutable_vars,
-                 FnProperty prop = FnProperty::kNormal,
-                 int priority = 0,
+                 FnProperty prop      = FnProperty::kNormal,
+                 int priority         = 0,
                  const char* opr_name = nullptr,
-                 bool wait = false) override {
+                 bool wait            = false) override {
     std::promise<void> promise;
-    std::future<void> future = promise.get_future();
-    CallbackOnComplete callback = CreateCallback(
-        NaiveEngine::OnComplete, &promise);
-    profiler::Profiler *profiler = profiler::Profiler::Get();
-    auto opr_deleter = [this](NaiveOpr* p) {
-      this->DeleteOperator(p);
-    };
+    std::future<void> future     = promise.get_future();
+    CallbackOnComplete callback  = CreateCallback(NaiveEngine::OnComplete, &promise);
+    profiler::Profiler* profiler = profiler::Profiler::Get();
+    auto opr_deleter             = [this](NaiveOpr* p) { this->DeleteOperator(p); };
     std::unique_ptr<NaiveOpr, decltype(opr_deleter)> opr(nullptr, opr_deleter);
     const bool profiling = opr_name && profiler->IsProfiling(profiler::Profiler::kImperative);
     // GenerateDisplayName() will return a pointer to the correct name of the operator
-    const char* display_name = profiling ?
-                               profiler::CustomOpProfiler::Get()->GenerateDisplayName(opr_name) :
-                               opr_name;
+    const char* display_name =
+        profiling ? profiler::CustomOpProfiler::Get()->GenerateDisplayName(opr_name) : opr_name;
     if (profiling) {
-      opr.reset(NewOperator(exec_fun, const_vars, mutable_vars,
-                        prop, display_name)->Cast<NaiveOpr>());
+      opr.reset(
+          NewOperator(exec_fun, const_vars, mutable_vars, prop, display_name)->Cast<NaiveOpr>());
       opr->profiling = profiling;
       std::unique_ptr<profiler::ProfileOperator::Attributes> attrs;
       if (profiler->AggregateEnabled()) {
         attrs = std::make_unique<profiler::ProfileOperator::Attributes>();
       }
-      opr->opr_profile = std::make_unique<profiler::ProfileOperator>(opr->opr_name.c_str(),
-                                                                     attrs.release());
+      opr->opr_profile =
+          std::make_unique<profiler::ProfileOperator>(opr->opr_name.c_str(), attrs.release());
       opr->opr_profile->startForDevice(exec_ctx.dev_type, exec_ctx.dev_id);
     }
     if (exec_ctx.dev_mask() == gpu::kDevMask) {
@@ -193,7 +187,7 @@ class NaiveEngine final : public Engine {
         aux_streams_.resize(dev_id + 1, nullptr);
       }
       if (streams_[dev_id] == nullptr) {
-        streams_[dev_id] = mshadow::NewStream<gpu>(true, MXNET_USE_CUDNN != 0, dev_id);
+        streams_[dev_id]     = mshadow::NewStream<gpu>(true, MXNET_USE_CUDNN != 0, dev_id);
         aux_streams_[dev_id] = new GPUAuxStream(streams_[dev_id]);
       }
       exec_fun(RunContext{exec_ctx, streams_[dev_id], aux_streams_[dev_id], false}, callback);
@@ -215,21 +209,25 @@ class NaiveEngine final : public Engine {
 
   void DeleteVariable(SyncFn delete_fn, Context exec_ctx, VarHandle var) override {
     NaiveVar* naive_var = NaiveVar::CastFromBase(var);
-    this->PushAsync([delete_fn, naive_var](RunContext ctx, CallbackOnComplete on_complete) mutable {
-        delete_fn(ctx);
-        NaiveVar::Delete(naive_var);
-        on_complete();
-      }, exec_ctx, {}, {var}, FnProperty::kDeleteVar, 0, "DeleteVariable");
+    this->PushAsync(
+        [delete_fn, naive_var](RunContext ctx, CallbackOnComplete on_complete) mutable {
+          delete_fn(ctx);
+          NaiveVar::Delete(naive_var);
+          on_complete();
+        },
+        exec_ctx,
+        {},
+        {var},
+        FnProperty::kDeleteVar,
+        0,
+        "DeleteVariable");
   }
 
-  void WaitForVar(VarHandle var) override {
-  }
+  void WaitForVar(VarHandle var) override {}
 
-  void WaitForAll() override {
-  }
+  void WaitForAll() override {}
 
-  void Throw(VarHandle var) override {
-  }
+  void Throw(VarHandle var) override {}
 
   void NotifyShutdown() override {
     shutdown_phase_.store(true);
@@ -237,8 +235,7 @@ class NaiveEngine final : public Engine {
 
  private:
   // callback to oncomplete
-  static void OnComplete(Engine *engine, void *param,
-                         const dmlc::Error* error) {
+  static void OnComplete(Engine* engine, void* param, const dmlc::Error* error) {
     static_cast<std::promise<void>*>(param)->set_value();
   }
   /*! \brief whether it is during shutdown phase*/
@@ -251,16 +248,17 @@ class NaiveEngine final : public Engine {
   // GPU auxiliary streams
   std::vector<GPUAuxStream*> aux_streams_;
 #endif
-/*!
- * \brief Holding a shared_ptr to the object pool to prevent it from being destructed too early
- * See also #309 (https://github.com/dmlc/mxnet/issues/309) and similar fix in threaded_engine.h.
- * Without this, segfaults seen on CentOS7 in test_operator_gpu.py:test_convolution_multiple_streams
- */
+  /*!
+   * \brief Holding a shared_ptr to the object pool to prevent it from being destructed too early
+   * See also #309 (https://github.com/dmlc/mxnet/issues/309) and similar fix in threaded_engine.h.
+   * Without this, segfaults seen on CentOS7 in
+   * test_operator_gpu.py:test_convolution_multiple_streams
+   */
   std::shared_ptr<common::ObjectPool<NaiveOpr> > objpool_opr_ref_;
   std::shared_ptr<common::ObjectPool<NaiveVar> > objpool_var_ref_;
 };  // class NaiveEngine
 
-Engine *CreateNaiveEngine() {
+Engine* CreateNaiveEngine() {
   return new NaiveEngine();
 }
 
diff --git a/src/engine/openmp.cc b/src/engine/openmp.cc
index 0d31f71aa9a3..c031b089b61a 100644
--- a/src/engine/openmp.cc
+++ b/src/engine/openmp.cc
@@ -29,17 +29,16 @@ namespace engine {
 #define ARCH_IS_INTEL_X86
 #endif
 
-static inline bool is_env_set(const char *var) {
+static inline bool is_env_set(const char* var) {
   return dmlc::GetEnv(var, INT_MIN) != INT_MIN;
 }
 
-OpenMP *OpenMP::Get() {
+OpenMP* OpenMP::Get() {
   static OpenMP openMP;
   return &openMP;
 }
 
-OpenMP::OpenMP()
-  : omp_num_threads_set_in_environment_(is_env_set("OMP_NUM_THREADS")) {
+OpenMP::OpenMP() : omp_num_threads_set_in_environment_(is_env_set("OMP_NUM_THREADS")) {
 #ifdef _OPENMP
   initialize_process();
   const int max = dmlc::GetEnv("MXNET_OMP_MAX_THREADS", INT_MIN);
@@ -57,12 +56,12 @@ OpenMP::OpenMP()
     }
   }
 #else
-  enabled_ = false;
+  enabled_        = false;
   omp_thread_max_ = 1;
 #endif
 }
 
-void OpenMP:: initialize_process() {
+void OpenMP::initialize_process() {
 #ifdef _OPENMP
   omp_get_num_procs();  // will force OpenMP to be initialized
 #endif
@@ -116,8 +115,7 @@ int OpenMP::GetRecommendedOMPThreadCount(bool exclude_reserved) const {
 #endif
 }
 
-OpenMP *__init_omp__ = OpenMP::Get();
+OpenMP* __init_omp__ = OpenMP::Get();
 
 }  // namespace engine
 }  // namespace mxnet
-
diff --git a/src/engine/openmp.h b/src/engine/openmp.h
index 94b83e3aa25b..83f22a4bf42c 100644
--- a/src/engine/openmp.h
+++ b/src/engine/openmp.h
@@ -42,19 +42,27 @@ class OpenMP {
    * \brief Set whether clients of this class receive pro-OMP behavior guidance
    * \param enabled Set to 'true' if this class should provide OMP behavior
    */
-  void set_enabled(bool enabled) { enabled_ = enabled; }
-  bool enabled() const { return enabled_; }
+  void set_enabled(bool enabled) {
+    enabled_ = enabled;
+  }
+  bool enabled() const {
+    return enabled_;
+  }
 
   /*!
    * \brief Set maximum number of threads to be used in an OMP region
    * \param thread_max Maximum number of threads to be used in an OMP region
    */
-  void set_thread_max(int thread_max) { omp_thread_max_ = thread_max; }
+  void set_thread_max(int thread_max) {
+    omp_thread_max_ = thread_max;
+  }
   /*!
    * \brief Maximum number of threads to be used in an OMP region
    * \return Maximum number of threads
    */
-  int thread_max() const { return omp_thread_max_; }
+  int thread_max() const {
+    return omp_thread_max_;
+  }
 
   /*!
    * \brief Reserve cores to be excluded from OMP regions
@@ -65,7 +73,9 @@ class OpenMP {
    * \brief Get number of cores to be excluded from OMP regions
    * \return Number of cores to be excluded from OMP regions
    */
-  int reserve_cores() const { return reserve_cores_; }
+  int reserve_cores() const {
+    return reserve_cores_;
+  }
 
   /*!
    * \brief Call at the beginning of a worker thread's life.  This will set the omp_num_threads
@@ -85,7 +95,7 @@ class OpenMP {
    * \brief Get the OpenMP object's singleton pointer
    * \return Singleton OpenMP object pointer
    */
-  static OpenMP *Get();
+  static OpenMP* Get();
 
  private:
   /*!
diff --git a/src/engine/stream_manager.h b/src/engine/stream_manager.h
index da1e4bc436ab..342e47519557 100644
--- a/src/engine/stream_manager.h
+++ b/src/engine/stream_manager.h
@@ -50,13 +50,12 @@ class StreamManager {
   RunContext GetRunContext(Context const& ctx);
   RunContext GetIORunContext(Context const& ctx);
   void Finalize();
+
  private:
   std::mutex mutex_;
 #if MXNET_USE_CUDA
-  std::array<std::array<mshadow::Stream<gpu>*, kStreams>, kNumGpus>
-      gpu_streams_;
-  std::array<std::array<GPUAuxStream*, kStreams>, kNumGpus>
-      gpu_aux_streams_;
+  std::array<std::array<mshadow::Stream<gpu>*, kStreams>, kNumGpus> gpu_streams_;
+  std::array<std::array<GPUAuxStream*, kStreams>, kNumGpus> gpu_aux_streams_;
   std::array<mshadow::Stream<gpu>*, kNumGpus> gpu_io_streams_;
   std::array<int, kNumGpus> gpu_cnt_;
 #endif  // MXNET_USE_CUDA
@@ -64,8 +63,7 @@ class StreamManager {
 };  // class StreamManager
 
 template <std::size_t kNumGpus, std::size_t kStreams>
-RunContext StreamManager<kNumGpus, kStreams>::GetRunContext(
-    Context const& ctx) {
+RunContext StreamManager<kNumGpus, kStreams>::GetRunContext(Context const& ctx) {
   RunContext ret;
   switch (ctx.dev_mask()) {
     case cpu::kDevMask:
@@ -85,12 +83,12 @@ RunContext StreamManager<kNumGpus, kStreams>::GetRunContext(
           int idx = 0;
           for (auto&& aux_stream : gpu_aux_streams_.at(ctx.dev_id)) {
             auto primary_stream = gpu_streams_.at(ctx.dev_id).at(idx++);
-            aux_stream = new GPUAuxStream(primary_stream);
+            aux_stream          = new GPUAuxStream(primary_stream);
           }
           counter = 0;
         }
         use_counter = counter;
-        counter = (counter + 1) % kStreams;
+        counter     = (counter + 1) % kStreams;
       }
       ret = RunContext{ctx,
                        gpu_streams_.at(ctx.dev_id).at(use_counter),
@@ -100,16 +98,15 @@ RunContext StreamManager<kNumGpus, kStreams>::GetRunContext(
 #else
       LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
 #endif  // MXNET_USE_CUDA
-    default:
-      LOG(FATAL) << "Not Reached";
+      default:
+        LOG(FATAL) << "Not Reached";
     }
   }
   return ret;
 }
 
 template <std::size_t kNumGpus, std::size_t kStreams>
-RunContext StreamManager<kNumGpus, kStreams>::GetIORunContext(
-    Context const& ctx) {
+RunContext StreamManager<kNumGpus, kStreams>::GetIORunContext(Context const& ctx) {
   RunContext ret;
   switch (ctx.dev_mask()) {
     case cpu::kDevMask:
@@ -129,8 +126,8 @@ RunContext StreamManager<kNumGpus, kStreams>::GetIORunContext(
 #else
       LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
 #endif  // MXNET_USE_CUDA
-    default:
-      LOG(FATAL) << "Not Reached";
+      default:
+        LOG(FATAL) << "Not Reached";
     }
   }
   return ret;
diff --git a/src/engine/thread_pool.h b/src/engine/thread_pool.h
index a48ac1bb1555..580f22820843 100644
--- a/src/engine/thread_pool.h
+++ b/src/engine/thread_pool.h
@@ -43,14 +43,13 @@ class ThreadPool {
   /*! \brief Signal event upon destruction, even for exceptions (RAII) */
   struct SetReadyOnDestroy {
     explicit inline SetReadyOnDestroy(const std::shared_ptr<dmlc::ManualEvent>& event)
-      : event_(event) {
-    }
+        : event_(event) {}
     inline ~SetReadyOnDestroy() {
       if (event_) {
         event_->signal();
       }
     }
-    std::shared_ptr<dmlc::ManualEvent>  event_;
+    std::shared_ptr<dmlc::ManualEvent> event_;
   };
 
   /*!
@@ -58,8 +57,7 @@ class ThreadPool {
    * \param size size of the thread pool.
    * \param func the function to run on the thread pool.
    */
-  explicit ThreadPool(size_t size, std::function<void()> func)
-      : worker_threads_(size) {
+  explicit ThreadPool(size_t size, std::function<void()> func) : worker_threads_(size) {
     CHECK_GT(size, 0);
     for (auto& i : worker_threads_) {
       i = std::thread(func);
diff --git a/src/engine/threaded_engine.cc b/src/engine/threaded_engine.cc
index 3eda2c8712f7..0e206c89a201 100644
--- a/src/engine/threaded_engine.cc
+++ b/src/engine/threaded_engine.cc
@@ -63,9 +63,9 @@ inline void ThreadedVar::AppendReadDependency(OprBlock* opr_block) {
     assert(head_->trigger == nullptr);
     assert(head_->write == false);
     // append things to next.
-    head_->next = new_var_block;
+    head_->next    = new_var_block;
     head_->trigger = opr_block;
-    head_ = new_var_block;
+    head_          = new_var_block;
   }
 }
 
@@ -77,9 +77,9 @@ inline void ThreadedVar::AppendWriteDependency(OprBlock* opr_block) {
   assert(head_->trigger == nullptr);
   assert(head_->write == false);
   // attach to head.
-  head_->next = new_var_block;
+  head_->next    = new_var_block;
   head_->trigger = opr_block;
-  head_->write = true;
+  head_->write   = true;
 
   // check if it is ready to write
   if (pending_write_ == nullptr) {
@@ -99,7 +99,7 @@ inline void ThreadedVar::AppendWriteDependency(OprBlock* opr_block) {
 
 template <typename Dispatcher>
 inline void ThreadedVar::CompleteReadDependency(Dispatcher dispatcher) {
-  OprBlock *trigger = nullptr;
+  OprBlock* trigger = nullptr;
   {
     // this is lock scope
     std::lock_guard<std::mutex> lock{mutex_};
@@ -108,7 +108,7 @@ inline void ThreadedVar::CompleteReadDependency(Dispatcher dispatcher) {
     if (--num_pending_reads_ == 0) {
       if (pending_write_ != nullptr) {
         // STATE CHANGE
-        trigger = pending_write_->trigger;
+        trigger            = pending_write_->trigger;
         num_pending_reads_ = kWriteTriggered;
       }
     }
@@ -135,7 +135,7 @@ inline bool ThreadedVar::CompleteWriteDependency(Dispatcher dispatcher) {
 
     // really delete
     if (to_delete_) {
-      VersionedVarBlock *head = pending_write_->next;
+      VersionedVarBlock* head = pending_write_->next;
       VersionedVarBlock::Delete(pending_write_);
       assert(head_ == head);
       VersionedVarBlock::Delete(head);
@@ -147,8 +147,7 @@ inline bool ThreadedVar::CompleteWriteDependency(Dispatcher dispatcher) {
     end_of_read_chain = old_pending_write->next;
     // reset to 0 pending reads
     num_pending_reads_ = 0;
-    while (end_of_read_chain != head_ &&
-           end_of_read_chain->write == false) {
+    while (end_of_read_chain != head_ && end_of_read_chain->write == false) {
       ++num_pending_reads_;
       end_of_read_chain = end_of_read_chain->next;
     }
@@ -161,7 +160,7 @@ inline bool ThreadedVar::CompleteWriteDependency(Dispatcher dispatcher) {
       if (num_pending_reads_ == 0) {
         // mark write as already activated in this var
         num_pending_reads_ = kWriteTriggered;
-        trigger_write = end_of_read_chain->trigger;
+        trigger_write      = end_of_read_chain->trigger;
       }
     }
   }
@@ -171,7 +170,7 @@ inline bool ThreadedVar::CompleteWriteDependency(Dispatcher dispatcher) {
   // The linked list \in [old_pending_write, end_of_read_chain)
   // is already detached from this Var.
   // So it is safe to modify these
-  VersionedVarBlock *cur_head = old_pending_write->next;
+  VersionedVarBlock* cur_head = old_pending_write->next;
   VersionedVarBlock::Delete(old_pending_write);
   // dispatch all the events
   while (cur_head != end_of_read_chain) {
@@ -179,7 +178,7 @@ inline bool ThreadedVar::CompleteWriteDependency(Dispatcher dispatcher) {
       dispatcher(cur_head->trigger);
     }
     auto prev = cur_head;
-    cur_head = cur_head->next;
+    cur_head  = cur_head->next;
     assert(cur_head != nullptr);
     VersionedVarBlock::Delete(prev);
   }
@@ -209,24 +208,25 @@ ThreadedVar* ThreadedEngine::NewVariable() {
   return ThreadedVar::New(VersionedVarBlock::New());
 }
 
-ThreadedOpr* ThreadedEngine::NewOperator(
-    ThreadedEngine::AsyncFn fn,
-    std::vector<VarHandle> const& const_vars,
-    std::vector<VarHandle> const& mutable_vars,
-    FnProperty prop,
-    const char* opr_name,
-    bool wait) {
-  auto ret = ThreadedOpr::New();
+ThreadedOpr* ThreadedEngine::NewOperator(ThreadedEngine::AsyncFn fn,
+                                         std::vector<VarHandle> const& const_vars,
+                                         std::vector<VarHandle> const& mutable_vars,
+                                         FnProperty prop,
+                                         const char* opr_name,
+                                         bool wait) {
+  auto ret      = ThreadedOpr::New();
   ret->opr_name = opr_name ? std::string(opr_name) : std::string();
-  ret->fn = std::move(fn);
-  ret->prop = prop;
+  ret->fn       = std::move(fn);
+  ret->prop     = prop;
   ret->const_vars.resize(const_vars.size());
   ret->mutable_vars.resize(mutable_vars.size());
   ret->wait = wait;
-  std::transform(const_vars.begin(), const_vars.end(),
-                 ret->const_vars.begin(), ThreadedVar::CastFromBase);
-  std::transform(mutable_vars.begin(), mutable_vars.end(),
-                 ret->mutable_vars.begin(), ThreadedVar::CastFromBase);
+  std::transform(
+      const_vars.begin(), const_vars.end(), ret->const_vars.begin(), ThreadedVar::CastFromBase);
+  std::transform(mutable_vars.begin(),
+                 mutable_vars.end(),
+                 ret->mutable_vars.begin(),
+                 ThreadedVar::CastFromBase);
   if (ENGINE_DEBUG != 0) {
     CheckDuplicate(const_vars, mutable_vars);
   }
@@ -236,9 +236,9 @@ ThreadedOpr* ThreadedEngine::NewOperator(
 void ThreadedEngine::CheckDuplicate(std::vector<VarHandle> const& const_vars,
                                     std::vector<VarHandle> const& mutable_vars) {
   // Check for duplicates.
-  auto use = const_vars;
-  auto mutate = mutable_vars;
-  const size_t use_size = use.size();
+  auto use                 = const_vars;
+  auto mutate              = mutable_vars;
+  const size_t use_size    = use.size();
   const size_t mutate_size = mutate.size();
   std::sort(use.begin(), use.end());
   std::sort(mutate.begin(), mutate.end());
@@ -261,8 +261,7 @@ void ThreadedEngine::CheckDuplicate(std::vector<VarHandle> const& const_vars,
       break;
     }
     if (mutate.at(j) == use.at(i)) {
-      LOG(FATAL)
-          << "duplicate items found between `const_vars` and `mutable_vars`";
+      LOG(FATAL) << "duplicate items found between `const_vars` and `mutable_vars`";
     }
   }
 }
@@ -270,19 +269,20 @@ void ThreadedEngine::CheckDuplicate(std::vector<VarHandle> const& const_vars,
 void ThreadedEngine::DeleteOperator(OprHandle op) {
   ThreadedOpr* threaded_opr = ThreadedOpr::CastFromBase(op);
   std::vector<VarHandle> deps;
-  deps.reserve(threaded_opr->const_vars.size() +
-               threaded_opr->mutable_vars.size());
-  deps.insert(deps.end(),
-              threaded_opr->const_vars.begin(),
-              threaded_opr->const_vars.end());
-  deps.insert(deps.end(),
-              threaded_opr->mutable_vars.begin(),
-              threaded_opr->mutable_vars.end());
-  this->PushAsync([threaded_opr](RunContext, CallbackOnComplete on_complete) {
-      ThreadedOpr::Delete(threaded_opr);
-      on_complete();
-    }, Context::CPU(), {}, deps, FnProperty::kDeleteVar, 0,
-    "DeleteOperator");
+  deps.reserve(threaded_opr->const_vars.size() + threaded_opr->mutable_vars.size());
+  deps.insert(deps.end(), threaded_opr->const_vars.begin(), threaded_opr->const_vars.end());
+  deps.insert(deps.end(), threaded_opr->mutable_vars.begin(), threaded_opr->mutable_vars.end());
+  this->PushAsync(
+      [threaded_opr](RunContext, CallbackOnComplete on_complete) {
+        ThreadedOpr::Delete(threaded_opr);
+        on_complete();
+      },
+      Context::CPU(),
+      {},
+      deps,
+      FnProperty::kDeleteVar,
+      0,
+      "DeleteOperator");
 }
 
 void ThreadedEngine::Push(OprHandle op, Context exec_ctx, int priority, bool profiling) {
@@ -293,13 +293,12 @@ void ThreadedEngine::Push(OprHandle op, Context exec_ctx, int priority, bool pro
         profiler::CustomOpProfiler::Get()->GenerateDisplayName(threaded_opr->opr_name.c_str());
   }
   OprBlock* opr_block = OprBlock::New();
-  opr_block->opr = threaded_opr;
+  opr_block->opr      = threaded_opr;
 
-  opr_block->wait.store(static_cast<int>(
-      threaded_opr->const_vars.size() +
-      threaded_opr->mutable_vars.size() + 1));
-  opr_block->ctx = exec_ctx;
-  opr_block->priority = priority;
+  opr_block->wait.store(
+      static_cast<int>(threaded_opr->const_vars.size() + threaded_opr->mutable_vars.size() + 1));
+  opr_block->ctx       = exec_ctx;
+  opr_block->priority  = priority;
   opr_block->profiling = profiling;
   ++pending_;
   // Add read dependencies.
@@ -315,7 +314,8 @@ void ThreadedEngine::Push(OprHandle op, Context exec_ctx, int priority, bool pro
   }
 }
 
-void ThreadedEngine::PushAsync(AsyncFn fn, Context exec_ctx,
+void ThreadedEngine::PushAsync(AsyncFn fn,
+                               Context exec_ctx,
                                std::vector<VarHandle> const& const_vars,
                                std::vector<VarHandle> const& mutable_vars,
                                FnProperty prop,
@@ -332,48 +332,59 @@ void ThreadedEngine::PushAsync(AsyncFn fn, Context exec_ctx,
     }
     CHECK_LT(exec_ctx.dev_id, device_count_)
         << "Invalid GPU Id: " << exec_ctx.dev_id
-        << ", Valid device id should be less than device_count: "
-        << device_count_;
+        << ", Valid device id should be less than device_count: " << device_count_;
   }
 #endif
   const bool profiling = profiler_->IsProfiling(profiler::Profiler::kImperative);
-  ThreadedOpr *opr = NewOperator(std::move(fn), const_vars, mutable_vars,
-                                 prop, opr_name, wait);
-  opr->temporary = true;
+  ThreadedOpr* opr     = NewOperator(std::move(fn), const_vars, mutable_vars, prop, opr_name, wait);
+  opr->temporary       = true;
   Push(opr, exec_ctx, priority, profiling);
 }
 
-void ThreadedEngine::PushSync(SyncFn exec_fn, Context exec_ctx,
+void ThreadedEngine::PushSync(SyncFn exec_fn,
+                              Context exec_ctx,
                               std::vector<VarHandle> const& const_vars,
                               std::vector<VarHandle> const& mutable_vars,
                               FnProperty prop,
                               int priority,
                               const char* opr_name) {
   if (!bulk_size() || prop != FnProperty::kNormal || priority) {
-    this->PushAsync([exec_fn](RunContext ctx, CallbackOnComplete on_complete) {
-        exec_fn(ctx);
-        on_complete();
-      }, exec_ctx, const_vars, mutable_vars, prop, priority, opr_name);
+    this->PushAsync(
+        [exec_fn](RunContext ctx, CallbackOnComplete on_complete) {
+          exec_fn(ctx);
+          on_complete();
+        },
+        exec_ctx,
+        const_vars,
+        mutable_vars,
+        prop,
+        priority,
+        opr_name);
     return;
   }
 
   const BulkStatus& bulk_status = *BulkStatusStore::Get();
-  if (bulk_status.count && exec_ctx != bulk_status.ctx) BulkFlush();
+  if (bulk_status.count && exec_ctx != bulk_status.ctx)
+    BulkFlush();
   BulkAppend(exec_fn, exec_ctx, const_vars, mutable_vars);
 }
 
-void ThreadedEngine::DeleteVariable(SyncFn delete_fn,
-                                    Context exec_ctx,
-                                    VarHandle var) {
+void ThreadedEngine::DeleteVariable(SyncFn delete_fn, Context exec_ctx, VarHandle var) {
   ThreadedVar* threaded_var = ThreadedVar::CastFromBase(var);
-  this->PushAsync([delete_fn, threaded_var](RunContext ctx, CallbackOnComplete on_complete) {
-      // Mark variable as orphan,
-      // so during `ThreadedEngine::OnComplete` it could be recycled.
-      threaded_var->SetToDelete();
-      delete_fn(ctx);
-      on_complete();
-    }, exec_ctx, {}, {var}, FnProperty::kDeleteVar, 0,
-    "DeleteVariable");
+  this->PushAsync(
+      [delete_fn, threaded_var](RunContext ctx, CallbackOnComplete on_complete) {
+        // Mark variable as orphan,
+        // so during `ThreadedEngine::OnComplete` it could be recycled.
+        threaded_var->SetToDelete();
+        delete_fn(ctx);
+        on_complete();
+      },
+      exec_ctx,
+      {},
+      {var},
+      FnProperty::kDeleteVar,
+      0,
+      "DeleteVariable");
 }
 
 void ThreadedEngine::WaitForVar(VarHandle var) {
@@ -388,26 +399,31 @@ void ThreadedEngine::WaitForVar(VarHandle var) {
     debug_wait_var_ = threaded_var;
   }
   std::atomic<bool> done{false};
-  this->PushAsync([this, &done](RunContext, CallbackOnComplete on_complete) {
-      if (engine_info_) {
-        LOG(INFO) << "Sync is executed";
-      }
-      {
-        std::unique_lock<std::mutex> lock{finished_m_};
-        done.store(true);
-      }
-      finished_cv_.notify_all();
-      if (engine_info_) {
-        LOG(INFO) << "Sync is notified";
-      }
-      on_complete();
-    }, Context::CPU(), {var}, {}, FnProperty::kNormal, 0,
-    "WaitForVar", true);
+  this->PushAsync(
+      [this, &done](RunContext, CallbackOnComplete on_complete) {
+        if (engine_info_) {
+          LOG(INFO) << "Sync is executed";
+        }
+        {
+          std::unique_lock<std::mutex> lock{finished_m_};
+          done.store(true);
+        }
+        finished_cv_.notify_all();
+        if (engine_info_) {
+          LOG(INFO) << "Sync is notified";
+        }
+        on_complete();
+      },
+      Context::CPU(),
+      {var},
+      {},
+      FnProperty::kNormal,
+      0,
+      "WaitForVar",
+      true);
   {
     std::unique_lock<std::mutex> lock{finished_m_};
-    finished_cv_.wait(lock, [this, &done]() {
-        return done.load() || kill_.load();
-    });
+    finished_cv_.wait(lock, [this, &done]() { return done.load() || kill_.load(); });
   }
 
   ThrowException(threaded_var);
@@ -416,9 +432,7 @@ void ThreadedEngine::WaitForVar(VarHandle var) {
 void ThreadedEngine::WaitForAll() {
   BulkFlush();
   std::unique_lock<std::mutex> lock{finished_m_};
-  finished_cv_.wait(lock, [this]() {
-      return pending_.load() == 0 || kill_.load();
-    });
+  finished_cv_.wait(lock, [this]() { return pending_.load() == 0 || kill_.load(); });
   std::exception_ptr exception_to_rethrow = nullptr;
   if (!global_exception_refs_.empty()) {
     // iterate through all exception refs
@@ -442,8 +456,7 @@ inline void ThreadedEngine::OnComplete(ThreadedOpr* threaded_opr) {
   bool is_temporary_opr = threaded_opr->temporary;
   // Mark complete for read variables
   for (auto&& i : threaded_opr->const_vars) {
-    i->CompleteReadDependency(
-        [this](OprBlock* opr) { this->PushToExecute(opr, false); });
+    i->CompleteReadDependency([this](OprBlock* opr) { this->PushToExecute(opr, false); });
   }
   // Mark complete for write variables.
   for (auto&& i : threaded_opr->mutable_vars) {
@@ -457,17 +470,16 @@ inline void ThreadedEngine::OnComplete(ThreadedOpr* threaded_opr) {
     if (debug_info) {
       LOG(INFO) << "Complete write dep for " << i;
     }
-    const bool to_delete =
-        i->CompleteWriteDependency([this, debug_info](OprBlock* opr) {
-          if (debug_info) {
-            LOG(INFO) << "PushToExecute " << opr;
-            debug_push_opr_ = opr;
-          }
-          this->PushToExecute(opr, false);
-          if (debug_info) {
-            LOG(INFO) << "Fin PushToExecute " << opr;
-          }
-        });
+    const bool to_delete = i->CompleteWriteDependency([this, debug_info](OprBlock* opr) {
+      if (debug_info) {
+        LOG(INFO) << "PushToExecute " << opr;
+        debug_push_opr_ = opr;
+      }
+      this->PushToExecute(opr, false);
+      if (debug_info) {
+        LOG(INFO) << "Fin PushToExecute " << opr;
+      }
+    });
     if (to_delete) {
       ThreadedVar::Delete(i);
     }
@@ -495,7 +507,7 @@ inline void ThreadedEngine::OnComplete(ThreadedOpr* threaded_opr) {
 
 inline void ThreadedEngine::ThrowException(ThreadedVar* threaded_var) {
   if (threaded_var->var_exception && *threaded_var->var_exception) {
-    std::exception_ptr tmp = *threaded_var->var_exception;
+    std::exception_ptr tmp       = *threaded_var->var_exception;
     *threaded_var->var_exception = nullptr;
     std::rethrow_exception(tmp);
   }
@@ -503,16 +515,15 @@ inline void ThreadedEngine::ThrowException(ThreadedVar* threaded_var) {
 }
 
 void ThreadedEngine::Throw(VarHandle var) {
-  ThreadedVar *threaded_var = ThreadedVar::CastFromBase(var);
+  ThreadedVar* threaded_var = ThreadedVar::CastFromBase(var);
   ThrowException(threaded_var);
 }
 
-void ThreadedEngine::OnCompleteStatic(Engine *engine, void *opr_block_,
-                                      const dmlc::Error* error) {
-  OprBlock *opr_block = static_cast<OprBlock*>(opr_block_);
-  ThreadedOpr *threaded_opr = opr_block->opr;
+void ThreadedEngine::OnCompleteStatic(Engine* engine, void* opr_block_, const dmlc::Error* error) {
+  OprBlock* opr_block       = static_cast<OprBlock*>(opr_block_);
+  ThreadedOpr* threaded_opr = opr_block->opr;
   if (error != nullptr) {
-    auto ex_p = std::make_exception_ptr(*error);
+    auto ex_p                   = std::make_exception_ptr(*error);
     threaded_opr->opr_exception = std::make_shared<std::exception_ptr>(ex_p);
   }
   if (opr_block->profiling && threaded_opr->opr_name.size()) {
diff --git a/src/engine/threaded_engine.h b/src/engine/threaded_engine.h
index aa0e5a22fb1e..45a02a57a931 100644
--- a/src/engine/threaded_engine.h
+++ b/src/engine/threaded_engine.h
@@ -50,10 +50,14 @@ namespace engine {
 
 // Define helper macros for debug information.
 #if ENGINE_DEBUG
-#define DEFINE_ENGINE_DEBUG_INFO(Type)                          \
-  static std::atomic<std::size_t> counter;                      \
-  Type() { LOG(INFO) << __func__ << " " << ++counter; }         \
-  ~Type() { LOG(INFO) << __func__ << " " << --counter; }
+#define DEFINE_ENGINE_DEBUG_INFO(Type)         \
+  static std::atomic<std::size_t> counter;     \
+  Type() {                                     \
+    LOG(INFO) << __func__ << " " << ++counter; \
+  }                                            \
+  ~Type() {                                    \
+    LOG(INFO) << __func__ << " " << --counter; \
+  }
 #else
 #define DEFINE_ENGINE_DEBUG_INFO(Type)
 #endif
@@ -101,8 +105,7 @@ struct OprBlock : public common::ObjectPoolAllocatable<OprBlock> {
  * \brief VersionedVarBlock that corresponding to a variable version.
  *  This is a basic unit of LinkedList in the ThreadedVar.
  */
-struct VersionedVarBlock
-    : public common::ObjectPoolAllocatable<VersionedVarBlock> {
+struct VersionedVarBlock : public common::ObjectPoolAllocatable<VersionedVarBlock> {
   /*! \brief next block in the LinkedList */
   VersionedVarBlock* next{nullptr};
   /*! \brief the operation this block triggers */
@@ -117,8 +120,7 @@ struct VersionedVarBlock
  * \brief Variable implementation.
  *  Each ThreadedVar is a linked list(queue) of operations to be performed.
  */
-class ThreadedVar final
-    : public Var, public common::ObjectPoolAllocatable<ThreadedVar> {
+class ThreadedVar final : public Var, public common::ObjectPoolAllocatable<ThreadedVar> {
  public:
   /*!
    * \brief constructor
@@ -179,7 +181,9 @@ class ThreadedVar final
   // code for debug.
 #if ENGINE_DEBUG
   static std::atomic<std::size_t> counter;
-  ~ThreadedVar() { LOG(INFO) << __func__ << " " << --counter; }
+  ~ThreadedVar() {
+    LOG(INFO) << __func__ << " " << --counter;
+  }
 #endif  // ENGINE_DEBUG
   /*!
    * \brief exception_ptr associated with the ThreadedOpr
@@ -231,8 +235,7 @@ class ThreadedVar final
 /*!
  * \brief Operator used in ThreadedEngine.
  */
-struct ThreadedOpr final : public Opr,
-                           public common::ObjectPoolAllocatable<ThreadedOpr> {
+struct ThreadedOpr final : public Opr, public common::ObjectPoolAllocatable<ThreadedOpr> {
   /*! \brief The function to be invoked each time. */
   Engine::AsyncFn fn;
   /*! \brief The variable this operation will read from. */
@@ -286,23 +289,25 @@ class ThreadedEngine : public Engine {
   ThreadedOpr* NewOperator(AsyncFn fn,
                            std::vector<VarHandle> const& const_vars,
                            std::vector<VarHandle> const& mutable_vars,
-                           FnProperty prop = FnProperty::kNormal,
+                           FnProperty prop      = FnProperty::kNormal,
                            const char* opr_name = nullptr,
-                           bool wait = false) override;
+                           bool wait            = false) override;
   void DeleteOperator(OprHandle op) override;
   void Push(OprHandle op, Context exec_ctx, int priority = 0, bool profiling = false) override;
-  void PushAsync(AsyncFn exec_fun, Context exec_ctx,
+  void PushAsync(AsyncFn exec_fun,
+                 Context exec_ctx,
                  std::vector<VarHandle> const& const_vars,
                  std::vector<VarHandle> const& mutable_vars,
-                 FnProperty prop = FnProperty::kNormal,
-                 int priority = 0,
+                 FnProperty prop      = FnProperty::kNormal,
+                 int priority         = 0,
                  const char* opr_name = nullptr,
-                 bool wait = false) override;
-  void PushSync(SyncFn exec_fn, Context exec_ctx,
+                 bool wait            = false) override;
+  void PushSync(SyncFn exec_fn,
+                Context exec_ctx,
                 std::vector<VarHandle> const& const_vars,
                 std::vector<VarHandle> const& mutable_vars,
-                FnProperty prop = FnProperty::kNormal,
-                int priority = 0,
+                FnProperty prop      = FnProperty::kNormal,
+                int priority         = 0,
                 const char* opr_name = nullptr) override;
   void DeleteVariable(SyncFn delete_fn, Context exec_ctx, VarHandle var) override;
   void WaitForVar(VarHandle var) override;
@@ -357,16 +362,14 @@ class ThreadedEngine : public Engine {
         attrs.reset(new profiler::ProfileOperator::Attributes());
       }
       const Context& ctx = opr_block->ctx;
-      opr_block->opr_profile.reset(new profiler::ProfileOperator(threaded_opr->opr_name.c_str(),
-                                                                 attrs.release()));
+      opr_block->opr_profile.reset(
+          new profiler::ProfileOperator(threaded_opr->opr_name.c_str(), attrs.release()));
       opr_block->opr_profile->startForDevice(ctx.dev_type, ctx.dev_id);
     }
-    CallbackOnComplete callback =
-        this->CreateCallback(ThreadedEngine::OnCompleteStatic, opr_block);
-    const bool debug_info = (engine_info_ && debug_push_opr_ == opr_block);
+    CallbackOnComplete callback = this->CreateCallback(ThreadedEngine::OnCompleteStatic, opr_block);
+    const bool debug_info       = (engine_info_ && debug_push_opr_ == opr_block);
     if (debug_info) {
-      LOG(INFO) << "ExecuteOprBlock " << opr_block
-                << "shutdown_phase=" << shutdown_phase_;
+      LOG(INFO) << "ExecuteOprBlock " << opr_block << "shutdown_phase=" << shutdown_phase_;
     }
     // still run cleanup in shutdown_phase
     if (!shutdown_phase_ || threaded_opr->prop == FnProperty::kDeleteVar) {
@@ -377,7 +380,8 @@ class ThreadedEngine : public Engine {
         }
         try {
           if ((!(threaded_opr->opr_exception && *threaded_opr->opr_exception) ||
-              threaded_opr->prop == FnProperty::kNoSkip) || threaded_opr->wait) {
+               threaded_opr->prop == FnProperty::kNoSkip) ||
+              threaded_opr->wait) {
             threaded_opr->fn(run_ctx, callback);
           } else {
             callback();
@@ -392,18 +396,16 @@ class ThreadedEngine : public Engine {
         }
       } catch (std::exception& e) {
         std::string what = e.what();
-        if (what.find("driver shutting down") == std::string::npos &&
-            !shutdown_phase_) {
-          LOG(FATAL)
-              << e.what() << "\n"
-              << "A fatal error occurred in asynchronous engine operation. "
-                 "If you do not know what caused this error, "
-                 "you can try set environment variable MXNET_ENGINE_TYPE "
-                 "to NaiveEngine and run with debugger (i.e. gdb). "
-                 "This will force all operations to be synchronous and "
-                 "backtrace will give you the series of calls that lead "
-                 "to this error. Remember to set MXNET_ENGINE_TYPE back to "
-                 "empty after debugging.";
+        if (what.find("driver shutting down") == std::string::npos && !shutdown_phase_) {
+          LOG(FATAL) << e.what() << "\n"
+                     << "A fatal error occurred in asynchronous engine operation. "
+                        "If you do not know what caused this error, "
+                        "you can try set environment variable MXNET_ENGINE_TYPE "
+                        "to NaiveEngine and run with debugger (i.e. gdb). "
+                        "This will force all operations to be synchronous and "
+                        "backtrace will give you the series of calls that lead "
+                        "to this error. Remember to set MXNET_ENGINE_TYPE back to "
+                        "empty after debugging.";
         }
       }
     } else {
@@ -412,14 +414,15 @@ class ThreadedEngine : public Engine {
   }
 
   int bulk_size() const override {
-    const profiler::Profiler *prof = profiler::Profiler::Get();
-    return (prof && prof->AggregateRunning()) ? 0 :  BulkStatusStore::Get()->bulk_size;
+    const profiler::Profiler* prof = profiler::Profiler::Get();
+    return (prof && prof->AggregateRunning()) ? 0 : BulkStatusStore::Get()->bulk_size;
   }
 
   int set_bulk_size(int bulk_size) override {
     BulkStatus& bulk_status = *BulkStatusStore::Get();
     std::swap(bulk_status.bulk_size, bulk_size);
-    if (bulk_status.count >= bulk_status.bulk_size) BulkFlush();
+    if (bulk_status.count >= bulk_status.bulk_size)
+      BulkFlush();
     if (!bulk_status.functions) {
       bulk_status.functions.reset(new std::vector<SyncFn>());
     }
@@ -489,22 +492,22 @@ class ThreadedEngine : public Engine {
     }
   }
 
-  static void OnCompleteStatic(Engine *engine, void *threaded_opr,
-                               const dmlc::Error* error);
+  static void OnCompleteStatic(Engine* engine, void* threaded_opr, const dmlc::Error* error);
   /*!
    * \brief find exception in global_exception_refs and add it if missing
    * \param opr_exception the exception to be added to global_exception_refs
    */
   inline void AddToGlobalExceptions(const ExceptionRef& opr_exception) {
-    auto it = std::find(global_exception_refs_.begin(),
-                        global_exception_refs_.end(), opr_exception);
+    auto it =
+        std::find(global_exception_refs_.begin(), global_exception_refs_.end(), opr_exception);
     if (it == global_exception_refs_.end()) {
       global_exception_refs_.push_back(opr_exception);
     }
     return;
   }
   /*! \brief append an operator to bulk */
-  inline void BulkAppend(SyncFn exec_fn, Context exec_ctx,
+  inline void BulkAppend(SyncFn exec_fn,
+                         Context exec_ctx,
                          std::vector<VarHandle> const& const_vars,
                          std::vector<VarHandle> const& mutable_vars) {
     BulkStatus& bulk_status = *BulkStatusStore::Get();
@@ -522,28 +525,36 @@ class ThreadedEngine : public Engine {
     bulk_status.mutable_vars.insert(
         bulk_status.mutable_vars.end(), mutable_vars.begin(), mutable_vars.end());
 
-    if (bulk_status.count >= bulk_status.bulk_size) BulkFlush();
+    if (bulk_status.count >= bulk_status.bulk_size)
+      BulkFlush();
   }
   /*! \brief flush current bulk to execution */
   inline void BulkFlush() {
     BulkStatus& bulk_status = *BulkStatusStore::Get();
-    if (!bulk_status.count) return;
+    if (!bulk_status.count)
+      return;
     bulk_status.count = 0;
     DeduplicateVarHandle(&bulk_status.const_vars, &bulk_status.mutable_vars);
     auto functions = bulk_status.functions;
-    this->PushAsync([functions](RunContext ctx, CallbackOnComplete on_complete) {
-        ctx.is_bulk = true;
-        for (auto& fn : *functions) {
-          fn(ctx);
-        }
-        ctx.is_bulk = false;
-        bool is_gpu = ctx.ctx.dev_mask() == gpu::kDevMask;
-        if (is_gpu) {
-          ctx.get_stream<gpu>()->Wait();
-        }
-        on_complete();
-      }, bulk_status.ctx, bulk_status.const_vars, bulk_status.mutable_vars,
-      FnProperty::kNormal, 0, "ImperativeBulk");
+    this->PushAsync(
+        [functions](RunContext ctx, CallbackOnComplete on_complete) {
+          ctx.is_bulk = true;
+          for (auto& fn : *functions) {
+            fn(ctx);
+          }
+          ctx.is_bulk = false;
+          bool is_gpu = ctx.ctx.dev_mask() == gpu::kDevMask;
+          if (is_gpu) {
+            ctx.get_stream<gpu>()->Wait();
+          }
+          on_complete();
+        },
+        bulk_status.ctx,
+        bulk_status.const_vars,
+        bulk_status.mutable_vars,
+        FnProperty::kNormal,
+        0,
+        "ImperativeBulk");
 
     bulk_status.functions.reset(new std::vector<SyncFn>());
     bulk_status.functions->reserve(bulk_status.bulk_size);
@@ -577,10 +588,10 @@ class ThreadedEngine : public Engine {
    * \brief Holding a shared_ptr to the object pool to prevent it from being destructed too early
    * See also #309 (https://github.com/dmlc/mxnet/issues/309)
    */
-  std::shared_ptr<common::ObjectPool<ThreadedOpr> >       objpool_opr_ref_;
-  std::shared_ptr<common::ObjectPool<OprBlock> >          objpool_blk_ref_;
-  std::shared_ptr<common::ObjectPool<VersionedVarBlock> > objpool_varblk_ref_;
-  std::shared_ptr<common::ObjectPool<ThreadedVar> >       objpool_var_ref_;
+  std::shared_ptr<common::ObjectPool<ThreadedOpr>> objpool_opr_ref_;
+  std::shared_ptr<common::ObjectPool<OprBlock>> objpool_blk_ref_;
+  std::shared_ptr<common::ObjectPool<VersionedVarBlock>> objpool_varblk_ref_;
+  std::shared_ptr<common::ObjectPool<ThreadedVar>> objpool_var_ref_;
 
   /*!
    * \brief Async destruction of some objects is relied on storage,
diff --git a/src/engine/threaded_engine_perdevice.cc b/src/engine/threaded_engine_perdevice.cc
index 4c5d1befb8b3..8faec911d3d8 100644
--- a/src/engine/threaded_engine_perdevice.cc
+++ b/src/engine/threaded_engine_perdevice.cc
@@ -48,11 +48,11 @@ namespace engine {
  */
 class ThreadedEnginePerDevice : public ThreadedEngine {
  public:
-  static auto constexpr kFIFO = dmlc::ConcurrentQueueType::kFIFO;
-  static auto constexpr kPriority = dmlc::ConcurrentQueueType::kPriority;
-  static auto constexpr kCopyQueue = kPriority;
+  static auto constexpr kFIFO          = dmlc::ConcurrentQueueType::kFIFO;
+  static auto constexpr kPriority      = dmlc::ConcurrentQueueType::kPriority;
+  static auto constexpr kCopyQueue     = kPriority;
   static auto constexpr kPriorityQueue = kPriority;
-  static auto constexpr kWorkerQueue = kFIFO;
+  static auto constexpr kWorkerQueue   = kFIFO;
 
   ThreadedEnginePerDevice() noexcept(false) {
     this->Start();
@@ -71,37 +71,41 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
   }
 
   void Stop() override {
-    if (is_worker_) return;
+    if (is_worker_)
+      return;
     WaitForAll();
     StopNoWait();
   }
 
   void Start() override {
-    if (is_worker_) return;
+    if (is_worker_)
+      return;
     gpu_worker_nthreads_ = common::GetNumThreadsPerGPU();
     // MXNET_CPU_WORKER_NTHREADS
     cpu_worker_nthreads_ = LibraryInitializer::Get()->cpu_worker_nthreads_;
-    gpu_copy_nthreads_ = dmlc::GetEnv("MXNET_GPU_COPY_NTHREADS", 2);
+    gpu_copy_nthreads_   = dmlc::GetEnv("MXNET_GPU_COPY_NTHREADS", 2);
     // create CPU task
-    int cpu_priority_nthreads = dmlc::GetEnv("MXNET_CPU_PRIORITY_NTHREADS", 4);
-    cpu_priority_worker_ = std::make_unique<ThreadWorkerBlock<kPriorityQueue>>();
+    int cpu_priority_nthreads  = dmlc::GetEnv("MXNET_CPU_PRIORITY_NTHREADS", 4);
+    cpu_priority_worker_       = std::make_unique<ThreadWorkerBlock<kPriorityQueue>>();
     cpu_priority_worker_->pool = std::make_unique<ThreadPool>(
         cpu_priority_nthreads,
         [this](std::shared_ptr<dmlc::ManualEvent> ready_event) {
           this->CPUWorker(Context(), cpu_priority_worker_.get(), ready_event);
-        }, true);
+        },
+        true);
     // GPU tasks will be created lazily
   }
 
  protected:
-  void PushToExecute(OprBlock *opr_block, bool pusher_thread) override {
+  void PushToExecute(OprBlock* opr_block, bool pusher_thread) override {
     const Context& ctx = opr_block->ctx;
     if ((opr_block->opr->prop == FnProperty::kAsync ||
-         opr_block->opr->prop == FnProperty::kDeleteVar) && pusher_thread) {
+         opr_block->opr->prop == FnProperty::kDeleteVar) &&
+        pusher_thread) {
       if (ctx.dev_mask() == Context::kGPU) {
-        #if MXNET_USE_CUDA
+#if MXNET_USE_CUDA
         MSHADOW_CATCH_ERROR(mshadow::SetDevice<gpu>(ctx.dev_id));
-        #endif
+#endif
       }
       this->ExecuteOprBlock(RunContext{ctx, nullptr, nullptr, false}, opr_block);
     } else {
@@ -110,15 +114,16 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
         if (opr_block->opr->prop == FnProperty::kCPUPrioritized) {
           cpu_priority_worker_->task_queue.Push(opr_block, opr_block->priority);
         } else {
-          int dev_id = ctx.dev_id;
+          int dev_id  = ctx.dev_id;
           int nthread = cpu_worker_nthreads_;
-          auto ptr =
-          cpu_normal_workers_.Get(dev_id, [this, ctx, nthread]() {
-              auto blk = new ThreadWorkerBlock<kWorkerQueue>();
-              blk->pool = std::make_unique<ThreadPool>(nthread,
-                  [this, ctx, blk](std::shared_ptr<dmlc::ManualEvent> ready_event) {
-                    this->CPUWorker(ctx, blk, ready_event);
-                  }, true);
+          auto ptr    = cpu_normal_workers_.Get(dev_id, [this, ctx, nthread]() {
+            auto blk  = new ThreadWorkerBlock<kWorkerQueue>();
+            blk->pool = std::make_unique<ThreadPool>(
+                nthread,
+                [this, ctx, blk](std::shared_ptr<dmlc::ManualEvent> ready_event) {
+                  this->CPUWorker(ctx, blk, ready_event);
+                },
+                true);
             return blk;
           });
           if (ptr) {
@@ -133,22 +138,21 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
         CHECK_EQ(ctx.dev_mask(), Context::kGPU);
         // GPU execution.
         const FnProperty prop = opr_block->opr->prop;
-        const bool is_copy = (prop == FnProperty::kCopyFromGPU ||
-                              prop == FnProperty::kCopyToGPU);
+        const bool is_copy = (prop == FnProperty::kCopyFromGPU || prop == FnProperty::kCopyToGPU);
         if (is_copy) {
           const size_t nthread = gpu_copy_nthreads_;
-          auto ptr = gpu_copy_workers_.Get(ctx.dev_id, [this, ctx, is_copy, nthread]() {
+          auto ptr             = gpu_copy_workers_.Get(ctx.dev_id, [this, ctx, is_copy, nthread]() {
             // Signify to kernel that GPU is being used, so reserve cores as necessary
             OpenMP::Get()->set_reserve_cores(GetReserveCoreCount(true));
-            auto blk = new ThreadWorkerBlock<kCopyQueue>();
-              blk->pool = std::make_unique<ThreadPool>(
+            auto blk  = new ThreadWorkerBlock<kCopyQueue>();
+            blk->pool = std::make_unique<ThreadPool>(
                 nthread,
-                [this, ctx, is_copy, blk]
-                  (std::shared_ptr<dmlc::ManualEvent> ready_event) {
-                    this->GPUWorker(ctx, is_copy, blk, ready_event);
-                  }, true);
-              return blk;
-            });
+                [this, ctx, is_copy, blk](std::shared_ptr<dmlc::ManualEvent> ready_event) {
+                  this->GPUWorker(ctx, is_copy, blk, ready_event);
+                },
+                true);
+            return blk;
+          });
           if (ptr) {
             if (opr_block->opr->prop == FnProperty::kDeleteVar) {
               ptr->task_queue.PushFront(opr_block, opr_block->priority);
@@ -163,14 +167,14 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
             auto ptr = gpu_priority_workers_.Get(ctx.dev_id, [this, ctx, is_copy, nthread]() {
               // Signify to kernel that GPU is being used, so reserve cores as necessary
               OpenMP::Get()->set_reserve_cores(GetReserveCoreCount(true));
-                auto blk = new ThreadWorkerBlock<kPriorityQueue>();
-                blk->pool = std::make_unique<ThreadPool>(
+              auto blk  = new ThreadWorkerBlock<kPriorityQueue>();
+              blk->pool = std::make_unique<ThreadPool>(
                   nthread,
-                  [this, ctx, is_copy, blk]
-                    (std::shared_ptr<dmlc::ManualEvent> ready_event) {
-                      this->GPUWorker(ctx, is_copy, blk, ready_event);
-                    }, true);
-                return blk;
+                  [this, ctx, is_copy, blk](std::shared_ptr<dmlc::ManualEvent> ready_event) {
+                    this->GPUWorker(ctx, is_copy, blk, ready_event);
+                  },
+                  true);
+              return blk;
             });
             if (ptr) {
               ptr->task_queue.Push(opr_block, opr_block->priority);
@@ -180,14 +184,14 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
             auto ptr = gpu_normal_workers_.Get(ctx.dev_id, [this, ctx, is_copy, nthread]() {
               // Signify to kernel that GPU is being used, so reserve cores as necessary
               OpenMP::Get()->set_reserve_cores(GetReserveCoreCount(true));
-                auto blk = new ThreadWorkerBlock<kWorkerQueue>();
-                blk->pool = std::make_unique<ThreadPool>(
+              auto blk  = new ThreadWorkerBlock<kWorkerQueue>();
+              blk->pool = std::make_unique<ThreadPool>(
                   nthread,
-                  [this, ctx, is_copy, blk]
-                    (std::shared_ptr<dmlc::ManualEvent> ready_event) {
-                      this->GPUWorker(ctx, is_copy, blk, ready_event);
-                    }, true);
-                return blk;
+                  [this, ctx, is_copy, blk](std::shared_ptr<dmlc::ManualEvent> ready_event) {
+                    this->GPUWorker(ctx, is_copy, blk, ready_event);
+                  },
+                  true);
+              return blk;
             });
             if (ptr) {
               if (opr_block->opr->prop == FnProperty::kDeleteVar) {
@@ -204,10 +208,10 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
 
  private:
   // working unit for each of the task.
-  template<dmlc::ConcurrentQueueType type>
+  template <dmlc::ConcurrentQueueType type>
   struct ThreadWorkerBlock {
     // task queue on this task
-    dmlc::ConcurrentBlockingQueue<OprBlock*, type>  task_queue;
+    dmlc::ConcurrentBlockingQueue<OprBlock*, type> task_queue;
     // thread pool that works on this task
     std::unique_ptr<ThreadPool> pool;
     // constructor
@@ -225,31 +229,31 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
   /*! \brief number of concurrent thread each gpu copy worker uses */
   size_t gpu_copy_nthreads_;
   // cpu worker
-  common::LazyAllocArray<ThreadWorkerBlock<kWorkerQueue> > cpu_normal_workers_;
+  common::LazyAllocArray<ThreadWorkerBlock<kWorkerQueue>> cpu_normal_workers_;
   // cpu priority worker
-  std::unique_ptr<ThreadWorkerBlock<kPriorityQueue> > cpu_priority_worker_;
+  std::unique_ptr<ThreadWorkerBlock<kPriorityQueue>> cpu_priority_worker_;
   // workers doing normal works on GPU
-  common::LazyAllocArray<ThreadWorkerBlock<kWorkerQueue> > gpu_normal_workers_;
+  common::LazyAllocArray<ThreadWorkerBlock<kWorkerQueue>> gpu_normal_workers_;
   // workers doing copy works from/to GPU
-  common::LazyAllocArray<ThreadWorkerBlock<kCopyQueue> > gpu_copy_workers_;
+  common::LazyAllocArray<ThreadWorkerBlock<kCopyQueue>> gpu_copy_workers_;
   // gpu priority workers
-  common::LazyAllocArray<ThreadWorkerBlock<kPriorityQueue> > gpu_priority_workers_;
+  common::LazyAllocArray<ThreadWorkerBlock<kPriorityQueue>> gpu_priority_workers_;
   /*!
    * \brief GPU worker that performs operations on a certain device.
    * \param dev_id The device id of the worker.
    * \param is_copy_worker whether the worker only do copy job
    * \param block The task block of the worker.
    */
-  template<dmlc::ConcurrentQueueType type>
+  template <dmlc::ConcurrentQueueType type>
   inline void GPUWorker(Context ctx,
                         bool is_copy_worker,
-                        ThreadWorkerBlock<type> *block,
+                        ThreadWorkerBlock<type>* block,
                         const std::shared_ptr<dmlc::ManualEvent>& ready_event) {
     this->is_worker_ = true;
 #if MXNET_USE_CUDA
     CHECK(block != nullptr);
-    mshadow::Stream<gpu> *stream = nullptr;
-    GPUAuxStream *aux_stream = nullptr;
+    mshadow::Stream<gpu>* stream = nullptr;
+    GPUAuxStream* aux_stream     = nullptr;
     do {
       ThreadPool::SetReadyOnDestroy setReady(ready_event);
       // allocate stream
@@ -257,7 +261,7 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
       if (is_copy_worker) {
         stream = mshadow::NewStream<gpu>(false, false, ctx.dev_id);
       } else {
-        stream = mshadow::NewStream<gpu>(true, MXNET_USE_CUDNN != 0, ctx.dev_id);
+        stream     = mshadow::NewStream<gpu>(true, MXNET_USE_CUDNN != 0, ctx.dev_id);
         aux_stream = new GPUAuxStream(stream);
       }
     } while (false);
@@ -281,9 +285,9 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
    * \brief CPU worker that performs operations on CPU.
    * \param block The task block of the worker.
    */
-  template<dmlc::ConcurrentQueueType type>
+  template <dmlc::ConcurrentQueueType type>
   inline void CPUWorker(Context ctx,
-                        ThreadWorkerBlock<type> *block,
+                        ThreadWorkerBlock<type>* block,
                         const std::shared_ptr<dmlc::ManualEvent>& ready_event) {
     this->is_worker_ = true;
     auto* task_queue = &(block->task_queue);
@@ -323,11 +327,9 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
   }
 
   /*! \brief Signal a single queue for shutdown */
-  template<typename Object>
-  static inline void SignalQueueForKill(common::LazyAllocArray<Object> *array) {
-    array->ForEach([](size_t i, Object *block) {
-      block->task_queue.SignalForKill();
-    });
+  template <typename Object>
+  static inline void SignalQueueForKill(common::LazyAllocArray<Object>* array) {
+    array->ForEach([](size_t i, Object* block) { block->task_queue.SignalForKill(); });
   }
 
   /*! Signal all queues for shutdown */
@@ -342,7 +344,7 @@ class ThreadedEnginePerDevice : public ThreadedEngine {
   }
 };
 
-Engine *CreateThreadedEnginePerDevice() {
+Engine* CreateThreadedEnginePerDevice() {
   return new ThreadedEnginePerDevice();
 }
 
diff --git a/src/engine/threaded_engine_pooled.cc b/src/engine/threaded_engine_pooled.cc
index dde16bc8fe5d..99b7726fc4e4 100644
--- a/src/engine/threaded_engine_pooled.cc
+++ b/src/engine/threaded_engine_pooled.cc
@@ -59,11 +59,11 @@ class ThreadedEnginePooled : public ThreadedEngine {
     streams_->Finalize();
     task_queue_->SignalForKill();
     io_task_queue_->SignalForKill();
-    task_queue_ = nullptr;
-    io_task_queue_ = nullptr;
-    thread_pool_ = nullptr;
+    task_queue_     = nullptr;
+    io_task_queue_  = nullptr;
+    thread_pool_    = nullptr;
     io_thread_pool_ = nullptr;
-    streams_ = nullptr;
+    streams_        = nullptr;
   }
 
   void Stop() override {
@@ -75,18 +75,22 @@ class ThreadedEnginePooled : public ThreadedEngine {
     streams_ = std::make_unique<StreamManager<kMaxNumGpus, kNumStreamsPerGpu>>();
     task_queue_.reset(new dmlc::ConcurrentBlockingQueue<OprBlock*>());
     io_task_queue_.reset(new dmlc::ConcurrentBlockingQueue<OprBlock*>());
-    thread_pool_ = std::make_unique<ThreadPool>(kNumWorkingThreads,
-                                      [this](std::shared_ptr<dmlc::ManualEvent> ready_event) {
-                                        ThreadWorker(task_queue_, ready_event); },
-                                      true);
-    io_thread_pool_ = std::make_unique<ThreadPool>(1,
-                                         [this](std::shared_ptr<dmlc::ManualEvent> ready_event) {
-                                           ThreadWorker(io_task_queue_, ready_event); },
-                                         true);
+    thread_pool_ = std::make_unique<ThreadPool>(
+        kNumWorkingThreads,
+        [this](std::shared_ptr<dmlc::ManualEvent> ready_event) {
+          ThreadWorker(task_queue_, ready_event);
+        },
+        true);
+    io_thread_pool_ = std::make_unique<ThreadPool>(
+        1,
+        [this](std::shared_ptr<dmlc::ManualEvent> ready_event) {
+          ThreadWorker(io_task_queue_, ready_event);
+        },
+        true);
   }
 
  protected:
-  void PushToExecute(OprBlock *opr_block, bool pusher_thread) override {
+  void PushToExecute(OprBlock* opr_block, bool pusher_thread) override {
     if (opr_block->opr->prop == FnProperty::kAsync && pusher_thread) {
       DoExecute(opr_block);
     } else {
@@ -139,17 +143,16 @@ class ThreadedEnginePooled : public ThreadedEngine {
 #endif
     assert(opr_block->wait.load() == 0);
     if (opr_block->ctx.dev_mask() == gpu::kDevMask) {
-      #if MXNET_USE_CUDA
+#if MXNET_USE_CUDA
       device_store.SetDevice(opr_block->ctx.dev_id);
-      #else   // MXNET_USE_CUDA
+#else   // MXNET_USE_CUDA
       LOG(FATAL) << "Please compile with CUDA enabled";
-      #endif  // MXNET_USE_CUDA
+#endif  // MXNET_USE_CUDA
     }
     bool is_copy = (opr_block->opr->prop == FnProperty::kCopyFromGPU ||
                     opr_block->opr->prop == FnProperty::kCopyToGPU);
-    auto&& rctx = is_copy
-        ? streams_->GetIORunContext(opr_block->ctx)
-        : streams_->GetRunContext(opr_block->ctx);
+    auto&& rctx  = is_copy ? streams_->GetIORunContext(opr_block->ctx)
+                           : streams_->GetRunContext(opr_block->ctx);
     this->ExecuteOprBlock(rctx, opr_block);
   }
   /*!
@@ -171,7 +174,7 @@ class ThreadedEnginePooled : public ThreadedEngine {
   }
 };
 
-Engine *CreateThreadedEnginePooled() {
+Engine* CreateThreadedEnginePooled() {
   return new ThreadedEnginePooled();
 }
 }  // namespace engine
diff --git a/src/imperative/attach_op_execs_pass.cc b/src/imperative/attach_op_execs_pass.cc
index 30e67f44a80b..57be3d5a1001 100644
--- a/src/imperative/attach_op_execs_pass.cc
+++ b/src/imperative/attach_op_execs_pass.cc
@@ -37,13 +37,12 @@ namespace mxnet {
 namespace exec {
 
 #if MXNET_USE_ONEDNN == 1
-#define CREATE_DEFAULT_INPUTS_MKLDNN(in_array, in_array_fallback, attrs)  \
-        CREATE_DEFAULT_INPUTS(true, attrs, CreateDefaultInputs(in_array, in_array_fallback))
+#define CREATE_DEFAULT_INPUTS_MKLDNN(in_array, in_array_fallback, attrs) \
+  CREATE_DEFAULT_INPUTS(true, attrs, CreateDefaultInputs(in_array, in_array_fallback))
 #else
 #define CREATE_DEFAULT_INPUTS_MKLDNN(in_array, in_array_fallback, attrs)  // empty macro
 #endif
 
-
 // abstract OpExecutor which provides storage fallback procedure on
 // non-default inputs and outputs
 // FComputeExecutor and FStatefulComputeExecutor inherit from this class
@@ -76,16 +75,27 @@ class StorageFallbackOpExecutor : public OpExecutor {
   void PreFCompute(bool is_gpu) {
     using namespace common;
     InitBlobs();
-    in_data_.clear(); out_data_.clear();
-    pre_temp_src_.clear(); pre_temp_dst_.clear();
-    post_temp_src_.clear(); post_temp_dst_.clear();
+    in_data_.clear();
+    out_data_.clear();
+    pre_temp_src_.clear();
+    pre_temp_dst_.clear();
+    post_temp_src_.clear();
+    post_temp_dst_.clear();
     in_temp_idx_map_.clear();
     tmp_req = req;
-    SetupDefaultBlobsInOut(in_array, out_array, &pre_temp_buf_, &post_temp_buf_, &req,
-                           &in_data_, &out_data_,
-                           &pre_temp_src_, &pre_temp_dst_,
-                           &post_temp_src_, &post_temp_dst_,
-                           &in_temp_idx_map_, mutate_idx_);
+    SetupDefaultBlobsInOut(in_array,
+                           out_array,
+                           &pre_temp_buf_,
+                           &post_temp_buf_,
+                           &req,
+                           &in_data_,
+                           &out_data_,
+                           &pre_temp_src_,
+                           &pre_temp_dst_,
+                           &post_temp_src_,
+                           &post_temp_dst_,
+                           &in_temp_idx_map_,
+                           mutate_idx_);
     common::CastNonDefaultStorage(pre_temp_src_, pre_temp_dst_, op_ctx, is_gpu);
   }
 
@@ -137,12 +147,14 @@ class StatefulComputeExecutor : public StorageFallbackOpExecutor {
     return state_;
   }
 
-  explicit StatefulComputeExecutor(OpStatePtr  state,
-                                   FStatefulCompute  fcompute,
+  explicit StatefulComputeExecutor(OpStatePtr state,
+                                   FStatefulCompute fcompute,
                                    ExecType exec_type,
-                                   const std::vector<uint32_t> &mutate_idx)
+                                   const std::vector<uint32_t>& mutate_idx)
       : StorageFallbackOpExecutor(mutate_idx),
-        state_(std::move(state)), fcompute_(std::move(fcompute)), exec_type_(exec_type) {}
+        state_(std::move(state)),
+        fcompute_(std::move(fcompute)),
+        exec_type_(exec_type) {}
 
  private:
   OpStatePtr state_;
@@ -150,14 +162,13 @@ class StatefulComputeExecutor : public StorageFallbackOpExecutor {
   ExecType exec_type_;
 };
 
-
 // stateful compute_ex executor
 class StatefulComputeExExecutor : public OpExecutor {
  public:
   void Run(RunContext rctx, bool is_gpu) override {
     op_ctx.run_ctx = rctx;
     INVALIDATE_OUTPUTS(out_array, req);
-    std::vector<NDArray> *pInArray = &in_array;
+    std::vector<NDArray>* pInArray = &in_array;
     CREATE_DEFAULT_INPUTS_MKLDNN(in_array, pInArray = &in_array_fallback, attrs_);
     fcompute_(state_, op_ctx, *pInArray, req, out_array);
   }
@@ -176,11 +187,13 @@ class StatefulComputeExExecutor : public OpExecutor {
     return state_;
   }
 
-  explicit StatefulComputeExExecutor(NodeAttrs  attrs,
-                                     OpStatePtr  state,
-                                     FStatefulComputeEx  fcompute,
+  explicit StatefulComputeExExecutor(NodeAttrs attrs,
+                                     OpStatePtr state,
+                                     FStatefulComputeEx fcompute,
                                      ExecType exec_type)
-      : attrs_(std::move(attrs)), state_(std::move(state)), fcompute_(std::move(fcompute)),
+      : attrs_(std::move(attrs)),
+        state_(std::move(state)),
+        fcompute_(std::move(fcompute)),
         exec_type_(exec_type) {}
 
  private:
@@ -190,7 +203,6 @@ class StatefulComputeExExecutor : public OpExecutor {
   ExecType exec_type_;
 };
 
-
 // fcompute executor
 class FComputeExecutor : public StorageFallbackOpExecutor {
  public:
@@ -207,11 +219,14 @@ class FComputeExecutor : public StorageFallbackOpExecutor {
     return exec_type_;
   }
 
-  explicit FComputeExecutor(NodeAttrs  attrs, FCompute fcompute,
-                            ExecType exec_type, const std::vector<uint32_t> &mutate_idx)
+  explicit FComputeExecutor(NodeAttrs attrs,
+                            FCompute fcompute,
+                            ExecType exec_type,
+                            const std::vector<uint32_t>& mutate_idx)
       : StorageFallbackOpExecutor(mutate_idx),
-        attrs_(std::move(attrs)), fcompute_(std::move(fcompute)), exec_type_(exec_type) {
-  }
+        attrs_(std::move(attrs)),
+        fcompute_(std::move(fcompute)),
+        exec_type_(exec_type) {}
 
  private:
   NodeAttrs attrs_;
@@ -225,7 +240,7 @@ class FComputeExExecutor : public OpExecutor {
   void Run(RunContext rctx, bool is_gpu) override {
     op_ctx.run_ctx = rctx;
     INVALIDATE_OUTPUTS(out_array, req);
-    std::vector<NDArray> *pInArray = &in_array;
+    std::vector<NDArray>* pInArray = &in_array;
     CREATE_DEFAULT_INPUTS_MKLDNN(in_array, pInArray = &in_array_fallback, attrs_);
     fcompute_(attrs_, op_ctx, *pInArray, req, out_array);
   }
@@ -236,10 +251,8 @@ class FComputeExExecutor : public OpExecutor {
     return exec_type_;
   }
 
-  explicit FComputeExExecutor(NodeAttrs  attrs, FComputeEx fcompute,
-                              ExecType exec_type)
-      : attrs_(std::move(attrs)), fcompute_(std::move(fcompute)), exec_type_(exec_type) {
-  }
+  explicit FComputeExExecutor(NodeAttrs attrs, FComputeEx fcompute, ExecType exec_type)
+      : attrs_(std::move(attrs)), fcompute_(std::move(fcompute)), exec_type_(exec_type) {}
 
  private:
   NodeAttrs attrs_;
@@ -248,27 +261,28 @@ class FComputeExExecutor : public OpExecutor {
 };
 
 void CreateOpExecs(const Graph& g, OpExecVector* p_ret, OpStateVector* p_state, size_t i) {
-  using nnvm::DTypeVector;
   using mxnet::ShapeVector;
+  using nnvm::DTypeVector;
   using nnvm::FMutateInputs;
 
-  static auto& fcreate_op_state = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
-  static auto& fmutate_inputs = nnvm::Op::GetAttr<FMutateInputs>("FMutateInputs");
-  static auto& fexec_type = nnvm::Op::GetAttr<FExecType>("FExecType");
+  static auto& fcreate_op_state  = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
+  static auto& fmutate_inputs    = nnvm::Op::GetAttr<FMutateInputs>("FMutateInputs");
+  static auto& fexec_type        = nnvm::Op::GetAttr<FExecType>("FExecType");
   static auto& is_layer_backward = nnvm::Op::GetAttr<bool>("TIsLayerOpBackward");
 
-  const auto& vdtype = g.GetAttr<DTypeVector>("dtype");
-  const auto& vshape = g.GetAttr<mxnet::ShapeVector>("shape");
-  const auto& vctx = g.GetAttr<ContextVector>("context");
+  const auto& vdtype         = g.GetAttr<DTypeVector>("dtype");
+  const auto& vshape         = g.GetAttr<mxnet::ShapeVector>("shape");
+  const auto& vctx           = g.GetAttr<ContextVector>("context");
   const auto& dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
   // get the graph
-  const auto& idx = g.indexed_graph();
+  const auto& idx   = g.indexed_graph();
   OpExecVector& ret = *p_ret;
 
   // initialize the nodes
   const auto& inode = idx[i];
-  if (inode.source->is_variable()) return;
-  const nnvm::Op *op = inode.source->op();
+  if (inode.source->is_variable())
+    return;
+  const nnvm::Op* op = inode.source->op();
   ExecType exec_type = ExecType::kSync;
   std::vector<uint32_t> mutate_index;
   if (fmutate_inputs.count(op)) {
@@ -286,42 +300,39 @@ void CreateOpExecs(const Graph& g, OpExecVector* p_ret, OpStateVector* p_state,
       itype.emplace_back(vdtype[idx.entry_id(e)]);
     }
 
-    OpStatePtr state = fcreate_op_state[op](
-        inode.source->attrs, vctx[i], ishape, itype);
+    OpStatePtr state = fcreate_op_state[op](inode.source->attrs, vctx[i], ishape, itype);
     if (p_state) {
       CHECK_GT(p_state->size(), i);
       p_state->at(i) = state;
     }
-    FStatefulComputeEx fcompute_ex = common::GetFCompute<FStatefulComputeEx>(
-        op, "FStatefulComputeEx", vctx[i]);
+    FStatefulComputeEx fcompute_ex =
+        common::GetFCompute<FStatefulComputeEx>(op, "FStatefulComputeEx", vctx[i]);
     // FStatefulComputeEx is dispatched only when dispatch_mode is DispatchMode::kFComputeEx
     if (fcompute_ex != nullptr && dispatch_modes[i] == DispatchMode::kFComputeEx) {
-      ret[i] = std::make_shared<StatefulComputeExExecutor>(inode.source->attrs, state,
-                                                           fcompute_ex, exec_type);
+      ret[i] = std::make_shared<StatefulComputeExExecutor>(
+          inode.source->attrs, state, fcompute_ex, exec_type);
     } else {
-      FStatefulCompute fcompute = common::GetFCompute<FStatefulCompute>(
-          op, "FStatefulCompute", vctx[i]);
+      FStatefulCompute fcompute =
+          common::GetFCompute<FStatefulCompute>(op, "FStatefulCompute", vctx[i]);
       CHECK(fcompute != nullptr)
           << "One of FStatefulCompute and FStatefulComputeEx must be registered "
           << "for stateful operator " << op->name;
-      ret[i] = std::make_shared<StatefulComputeExecutor>(state, fcompute,
-                                                         exec_type, mutate_index);
+      ret[i] = std::make_shared<StatefulComputeExecutor>(state, fcompute, exec_type, mutate_index);
     }
   } else if (is_layer_backward.get(op, false)) {
     CHECK_GE(inode.control_deps.size(), 1);
     uint32_t fwd_id = inode.control_deps[0];
     CHECK(vctx[fwd_id] == vctx[i]);
     CHECK(ret[fwd_id] != nullptr);
-    FStatefulComputeEx fcompute_ex = common::GetFCompute<FStatefulComputeEx>(
-        op, "FStatefulComputeEx", vctx[i]);
+    FStatefulComputeEx fcompute_ex =
+        common::GetFCompute<FStatefulComputeEx>(op, "FStatefulComputeEx", vctx[i]);
     // FStatefulComputeEx is dispatched only when dispatch_mode is DispatchMode::kFComputeEx
     if (fcompute_ex != nullptr && dispatch_modes[i] == DispatchMode::kFComputeEx) {
       ret[i] = std::make_shared<StatefulComputeExExecutor>(
-          inode.source->attrs, ret[fwd_id].get()->state(), fcompute_ex,
-          exec_type);
+          inode.source->attrs, ret[fwd_id].get()->state(), fcompute_ex, exec_type);
     } else {
-      FStatefulCompute fcompute = common::GetFCompute<FStatefulCompute>(
-          op, "FStatefulCompute", vctx[i]);
+      FStatefulCompute fcompute =
+          common::GetFCompute<FStatefulCompute>(op, "FStatefulCompute", vctx[i]);
       CHECK(fcompute != nullptr)
           << "One of FStatefulCompute and FStatefulComputeEx must be registered "
           << "for stateful operator " << op->name;
@@ -329,11 +340,10 @@ void CreateOpExecs(const Graph& g, OpExecVector* p_ret, OpStateVector* p_state,
           ret[fwd_id].get()->state(), fcompute, exec_type, mutate_index);
     }
   } else {
-    FCompute fcompute = common::GetFCompute<FCompute>(op, "FCompute", vctx[i]);
+    FCompute fcompute   = common::GetFCompute<FCompute>(op, "FCompute", vctx[i]);
     FComputeEx fcomp_ex = common::GetFCompute<FComputeEx>(op, "FComputeEx", vctx[i]);
     if (fcomp_ex != nullptr && dispatch_modes[i] == DispatchMode::kFComputeEx) {
-      ret[i] = std::make_shared<FComputeExExecutor>(
-          inode.source->attrs, fcomp_ex, exec_type);
+      ret[i] = std::make_shared<FComputeExExecutor>(inode.source->attrs, fcomp_ex, exec_type);
     } else if (fcompute != nullptr) {
       ret[i] = std::make_shared<FComputeExecutor>(
           inode.source->attrs, fcompute, exec_type, mutate_index);
@@ -343,7 +353,6 @@ void CreateOpExecs(const Graph& g, OpExecVector* p_ret, OpStateVector* p_state,
   }
 }
 
-
 // pass to attach operator executors
 Graph AttachOpExecs(Graph g) {
   const auto& idx = g.indexed_graph();
diff --git a/src/imperative/attach_op_resource_pass.cc b/src/imperative/attach_op_resource_pass.cc
index 160ba8fb8d63..7364e674e9b6 100644
--- a/src/imperative/attach_op_resource_pass.cc
+++ b/src/imperative/attach_op_resource_pass.cc
@@ -17,7 +17,6 @@
  * under the License.
  */
 
-
 /*!
  * Copyright (c) 2016 by Contributors
  * \file attach_op_resource_pass.cc
@@ -30,35 +29,31 @@
 namespace mxnet {
 namespace exec {
 
-void AttachOpResources(
-    const Graph& g,
-    const OpExecVector& op_execs,
-    size_t start_nid,
-    size_t end_nid) {
-  static auto& fresource =
-      nnvm::Op::GetAttr<FResourceRequest>("FResourceRequest");
-  static auto& fresource_ex =
-      nnvm::Op::GetAttr<FResourceRequestEx>("FResourceRequestEx");
-  const auto& vctx = g.GetAttr<ContextVector>("context");
-  const auto& vdispatch = g.GetAttr<DispatchModeVector>("dispatch_mode");
-  const auto& dev_masks = g.GetAttr<DevMaskVector>("dev_mask");
-  const auto& idx = g.indexed_graph();
+void AttachOpResources(const Graph& g,
+                       const OpExecVector& op_execs,
+                       size_t start_nid,
+                       size_t end_nid) {
+  static auto& fresource    = nnvm::Op::GetAttr<FResourceRequest>("FResourceRequest");
+  static auto& fresource_ex = nnvm::Op::GetAttr<FResourceRequestEx>("FResourceRequestEx");
+  const auto& vctx          = g.GetAttr<ContextVector>("context");
+  const auto& vdispatch     = g.GetAttr<DispatchModeVector>("dispatch_mode");
+  const auto& dev_masks     = g.GetAttr<DevMaskVector>("dev_mask");
+  const auto& idx           = g.indexed_graph();
   // Use global resource pool for each executor for now.
   std::map<Context, Resource> cached_temp;
   // Resource allocation
   for (uint32_t nid = start_nid; nid < end_nid; ++nid) {
     const auto& inode = idx[nid];
-    if (inode.source->is_variable()) continue;
-    const Context &ctx = vctx[nid];
-    auto& requested = op_execs[nid]->op_ctx.requested;
+    if (inode.source->is_variable())
+      continue;
+    const Context& ctx = vctx[nid];
+    auto& requested    = op_execs[nid]->op_ctx.requested;
     requested.clear();
-    const auto op = inode.source->op();
-    const bool rsc_req = (fresource.count(op) != 0);
+    const auto op         = inode.source->op();
+    const bool rsc_req    = (fresource.count(op) != 0);
     const bool rsc_ex_req = (fresource_ex.count(op) != 0);
     if (rsc_req || rsc_ex_req) {
-      auto reqs = rsc_ex_req ? fresource_ex[op](inode.source->attrs,
-                                                dev_masks[nid],
-                                                vdispatch[nid])
+      auto reqs = rsc_ex_req ? fresource_ex[op](inode.source->attrs, dev_masks[nid], vdispatch[nid])
                              : fresource[op](inode.source->attrs);
       // Get the resource of temporal space.
       for (const ResourceRequest& req : reqs) {
diff --git a/src/imperative/cached_op.cc b/src/imperative/cached_op.cc
index ab640587276c..692f9d6b55ad 100644
--- a/src/imperative/cached_op.cc
+++ b/src/imperative/cached_op.cc
@@ -26,7 +26,6 @@
 #include "../operator/operator_common.h"
 #include "../operator/subgraph/common.h"
 
-
 namespace mxnet {
 
 DMLC_REGISTER_PARAMETER(CachedOpConfig);
@@ -40,9 +39,9 @@ nnvm::Symbol CachedOp::GetOptimizedSymbol() const {
   return ret.Copy();
 }
 
-CachedOp::CachedOp(
-    const nnvm::Symbol& sym,
-    const std::vector<std::pair<std::string, std::string> >& flags) : sym_(sym), flags_(flags) {
+CachedOp::CachedOp(const nnvm::Symbol& sym,
+                   const std::vector<std::pair<std::string, std::string> >& flags)
+    : sym_(sym), flags_(flags) {
   config_.Init(flags);
   this->dynamic_shape_checked_ = false;
 
@@ -52,25 +51,30 @@ CachedOp::CachedOp(
 
   auto grad_graph = nnvm::Graph();
   std::unordered_map<uint32_t, uint32_t> fwd_input_to_grad_output;
-  CreateFullGraph(sym.Copy(), &fwd_graph_, &grad_graph, &full_graph_,
-                  &ograd_entries_, &fwd_input_to_grad_output);
+  CreateFullGraph(sym.Copy(),
+                  &fwd_graph_,
+                  &grad_graph,
+                  &full_graph_,
+                  &ograd_entries_,
+                  &fwd_input_to_grad_output);
 
   {
-    const auto& idx = fwd_graph_.indexed_graph();
+    const auto& idx  = fwd_graph_.indexed_graph();
     bwd_output_reqs_ = std::vector<OpReqType>(grad_graph.outputs.size(), kWriteTo);
-    inlining_ = !config_.static_alloc &&
-        (idx.num_nodes() - idx.input_nodes().size()) <= config_.inline_limit;
+    inlining_        = !config_.static_alloc &&
+                (idx.num_nodes() - idx.input_nodes().size()) <= config_.inline_limit;
   }
 
   SetInputIndices(fwd_graph_, config_.param_indices, &config_.data_indices);
 
   // Set the backward dependency vectors
   {
-    const auto& idx = full_graph_.indexed_graph();
-    size_t num_forward_inputs = num_inputs();
+    const auto& idx            = full_graph_.indexed_graph();
+    size_t num_forward_inputs  = num_inputs();
     size_t num_forward_outputs = num_outputs();
     for (uint32_t i = 0; i < ograd_entries_.size(); ++i) {
-      if (!idx.exist(ograd_entries_[i].node.get())) continue;
+      if (!idx.exist(ograd_entries_[i].node.get()))
+        continue;
       bwd_ograd_dep_.push_back(i);
     }
     save_inputs_.resize(num_forward_inputs, false);
@@ -90,16 +94,15 @@ CachedOp::CachedOp(
 
 CachedOp::~CachedOp() = default;
 
-std::vector<nnvm::NodeEntry> CachedOp::Gradient(
-    const nnvm::ObjectPtr& node,
-    const std::vector<nnvm::NodeEntry>& ograds) const {
+std::vector<nnvm::NodeEntry> CachedOp::Gradient(const nnvm::ObjectPtr& node,
+                                                const std::vector<nnvm::NodeEntry>& ograds) const {
   using namespace nnvm;
   static const auto _backward_CachedOp = Op::Get("_backward_CachedOp");
-  static const auto _NoGrad = Op::Get("_NoGradient");
+  static const auto _NoGrad            = Op::Get("_NoGradient");
 
-  auto p = Node::Create();
-  p->attrs.op = _backward_CachedOp;
-  p->attrs.name = node->attrs.name + "_backward";
+  auto p          = Node::Create();
+  p->attrs.op     = _backward_CachedOp;
+  p->attrs.name   = node->attrs.name + "_backward";
   p->attrs.parsed = node->attrs.parsed;
   p->control_deps.push_back(node);
   p->inputs.reserve(bwd_ograd_dep_.size() + bwd_in_dep_.size() + bwd_out_dep_.size());
@@ -113,10 +116,10 @@ std::vector<nnvm::NodeEntry> CachedOp::Gradient(
   ret.reserve(num_inputs());
   const auto& auxs = mutable_input_nodes();
   if (auxs.size()) {
-    auto nop = Node::Create();
-    nop->attrs.op = _NoGrad;
+    auto nop        = Node::Create();
+    nop->attrs.op   = _NoGrad;
     nop->attrs.name = "NoGradient";
-    uint32_t k = 0;
+    uint32_t k      = 0;
     for (const auto& i : fwd_graph_.indexed_graph().input_nodes()) {
       if (auxs.count(i)) {
         ret.emplace_back(nop);
@@ -126,7 +129,7 @@ std::vector<nnvm::NodeEntry> CachedOp::Gradient(
     }
   } else {
     for (uint32_t i = 0; i < num_inputs(); ++i)
-        ret.emplace_back(p, i, 0);
+      ret.emplace_back(p, i, 0);
   }
   return ret;
 }
@@ -144,7 +147,7 @@ bool CachedOp::CheckDynamicShapeExists(const Context& default_ctx,
   CHECK_EQ(inputs.size(), num_inputs());
 
   auto state_ptr = GetCachedOpState(default_ctx);
-  auto& state = state_ptr.get_state<CachedOpState>();
+  auto& state    = state_ptr.get_state<CachedOpState>();
 
   nnvm::Graph& g = state.info.fwd_graph;
   ShapeVector shape_inputs(inputs.size());
@@ -155,9 +158,7 @@ bool CachedOp::CheckDynamicShapeExists(const Context& default_ctx,
   // If so, the pass will fail with `contain_dynamic_shape = true`,
   // This method is only called once, so the overhead is negligible.
   bool contain_dynamic_shape = false;
-  CheckAndInferShape(&g, std::move(shape_inputs), true,
-                     {0, 0}, {0, 0},
-                     &contain_dynamic_shape);
+  CheckAndInferShape(&g, std::move(shape_inputs), true, {0, 0}, {0, 0}, &contain_dynamic_shape);
   if (!config_.static_shape && erase_result) {
     g.attrs.erase("shape");
     g.attrs.erase("shape_inputs");
@@ -165,11 +166,10 @@ bool CachedOp::CheckDynamicShapeExists(const Context& default_ctx,
   return contain_dynamic_shape;
 }
 
-bool CachedOp::SetForwardGraph(
-    const Context& default_ctx,
-    GraphInfo* info,
-    const bool recording,
-    const std::vector<NDArray*>& inputs) {
+bool CachedOp::SetForwardGraph(const Context& default_ctx,
+                               GraphInfo* info,
+                               const bool recording,
+                               const std::vector<NDArray*>& inputs) {
   using namespace nnvm;
   using namespace imperative;
   CHECK_EQ(inputs.size(), num_inputs());
@@ -179,19 +179,18 @@ bool CachedOp::SetForwardGraph(
   DTypeVector dtype_inputs(inputs.size());
   StorageTypeVector storage_type_inputs(inputs.size());
   for (size_t i = 0; i < inputs.size(); ++i) {
-    shape_inputs[i] = inputs[info->input_map[i]]->shape();
-    dtype_inputs[i] = inputs[info->input_map[i]]->dtype();
+    shape_inputs[i]        = inputs[info->input_map[i]]->shape();
+    dtype_inputs[i]        = inputs[info->input_map[i]]->dtype();
     storage_type_inputs[i] = inputs[info->input_map[i]]->storage_type();
   }
 
-  bool match = true;
+  bool match                 = true;
   bool contain_dynamic_shape = false;
-  match &= CheckAndInferShape(&g, std::move(shape_inputs), true,
-                              {0, 0}, {0, 0}, &contain_dynamic_shape);
+  match &=
+      CheckAndInferShape(&g, std::move(shape_inputs), true, {0, 0}, {0, 0}, &contain_dynamic_shape);
   match &= CheckAndInferType(&g, std::move(dtype_inputs), true);
   exec::DevMaskVector dev_mask(g.indexed_graph().num_nodes(), default_ctx.dev_mask());
-  match &= CheckAndInferStorageType(&g, std::move(dev_mask),
-                                    std::move(storage_type_inputs), true);
+  match &= CheckAndInferStorageType(&g, std::move(dev_mask), std::move(storage_type_inputs), true);
 
   // When dynmaic shape exists, it is not feasible to plan memory ahead of time
   if (contain_dynamic_shape) {
@@ -213,7 +212,8 @@ bool CachedOp::SetForwardGraph(
   const auto& stypes = g.GetAttr<StorageTypeVector>("storage_type");
   CHECK_EQ(stypes.size(), storage.size());
   for (size_t i = 0; i < stypes.size(); i++) {
-    if (stypes[i] != kDefaultStorage) storage[i] = exec::kDynamicStorageID;
+    if (stypes[i] != kDefaultStorage)
+      storage[i] = exec::kDynamicStorageID;
   }
   for (const auto i : idx.input_nodes()) {
     storage[idx.entry_id(i, 0)] = exec::kExternalStorageID;
@@ -222,11 +222,11 @@ bool CachedOp::SetForwardGraph(
     storage[idx.entry_id(idx.outputs()[i])] = exec::kExternalStorageID;
   }
 
-  auto mem_plan = MXPlanMemory(
-      &g, std::move(storage), g.GetAttr<std::vector<uint32_t> >(AddPrefix(prefix, REF_COUNT)),
-      AddPrefix(prefix, STORAGE_PLAN));
-  g.attrs[AddPrefix(prefix, MEM_PLAN)] =
-      std::make_shared<dmlc::any>(std::move(mem_plan));
+  auto mem_plan                        = MXPlanMemory(&g,
+                               std::move(storage),
+                               g.GetAttr<std::vector<uint32_t> >(AddPrefix(prefix, REF_COUNT)),
+                               AddPrefix(prefix, STORAGE_PLAN));
+  g.attrs[AddPrefix(prefix, MEM_PLAN)] = std::make_shared<dmlc::any>(std::move(mem_plan));
 
   return false;
 }
@@ -237,7 +237,7 @@ void SetBackwardInputEid(const std::vector<uint32_t>& bwd_in_dep,
                          const std::vector<uint32_t>& bwd_ograd_dep,
                          const std::vector<nnvm::NodeEntry>& ograd_entries,
                          const nnvm::IndexedGraph& idx,
-                         std::vector<uint32_t> *bwd_input_eid) {
+                         std::vector<uint32_t>* bwd_input_eid) {
   for (const auto& i : bwd_ograd_dep) {
     auto ograd = ograd_entries[i];
     if (idx.exist(ograd.node.get())) {
@@ -256,24 +256,24 @@ void SetBackwardInputEid(const std::vector<uint32_t>& bwd_in_dep,
   }
 }
 
-bool CachedOp::SetBackwardGraph(
-    GraphInfo* info,
-    const std::vector<OpReqType>& reqs,
-    const std::vector<NDArray*>& inputs,
-    bool detect_inplace_addto) {
+bool CachedOp::SetBackwardGraph(GraphInfo* info,
+                                const std::vector<OpReqType>& reqs,
+                                const std::vector<NDArray*>& inputs,
+                                bool detect_inplace_addto) {
   using namespace nnvm;
   using namespace imperative;
   std::lock_guard<std::mutex> lock(mutex_);
   Context default_ctx = inputs[0]->ctx();
-  nnvm::Graph& g = info->full_graph;
+  nnvm::Graph& g      = info->full_graph;
 
   if (info->bwd_output_reqs != reqs) {
     info->bwd_output_reqs = reqs;
     info->bwd_input_eid.clear();
-    g = nnvm::Graph();
+    g         = nnvm::Graph();
     g.outputs = info->fwd_graph.outputs;
     for (size_t i = 0; i < info->grad_graph.outputs.size(); ++i) {
-      if (info->bwd_output_reqs[i] == kNullOp) continue;
+      if (info->bwd_output_reqs[i] == kNullOp)
+        continue;
       g.outputs.emplace_back(info->grad_graph.outputs[i]);
     }
     g.attrs["context"] = std::make_shared<dmlc::any>(
@@ -284,25 +284,27 @@ bool CachedOp::SetBackwardGraph(
 
   if (info->bwd_input_eid.size() != inputs.size()) {
     info->bwd_input_eid.clear();
-    SetBackwardInputEid(bwd_in_dep_, bwd_out_dep_, bwd_ograd_dep_,
-                        info->ograd_entries, idx, &info->bwd_input_eid);
+    SetBackwardInputEid(
+        bwd_in_dep_, bwd_out_dep_, bwd_ograd_dep_, info->ograd_entries, idx, &info->bwd_input_eid);
     CHECK_EQ(inputs.size(), info->bwd_input_eid.size());
   }
 
-  size_t num_forward_nodes = info->fwd_graph.indexed_graph().num_nodes();
+  size_t num_forward_nodes   = info->fwd_graph.indexed_graph().num_nodes();
   size_t num_forward_entries = info->fwd_graph.indexed_graph().num_node_entries();
 
   if (!g.attrs.count(AddPrefix(BACKWARD, REF_COUNT))) {
     std::vector<uint32_t> ref_count(idx.num_node_entries(), 0);
     for (size_t i = num_forward_nodes; i < idx.num_nodes(); ++i) {
-      for (const auto& j : idx[i].inputs) ++ref_count[idx.entry_id(j)];
+      for (const auto& j : idx[i].inputs)
+        ++ref_count[idx.entry_id(j)];
     }
     for (size_t i = 0; i < inputs.size(); ++i) {
       if (info->bwd_input_eid[i] != kEidNotExist) {
         ++ref_count[info->bwd_input_eid[i]];
       }
     }
-    for (const auto& i : idx.outputs()) ++ref_count[idx.entry_id(i)];
+    for (const auto& i : idx.outputs())
+      ++ref_count[idx.entry_id(i)];
     g.attrs[AddPrefix(BACKWARD, REF_COUNT)] = std::make_shared<dmlc::any>(std::move(ref_count));
   }
 
@@ -317,24 +319,22 @@ bool CachedOp::SetBackwardGraph(
     if (info->bwd_input_eid[i] == kEidNotExist) {
       continue;
     }
-    size_t oi = BwdOriginalInput(info->input_map, i);
+    size_t oi                      = BwdOriginalInput(info->input_map, i);
     shapes[info->bwd_input_eid[i]] = inputs[oi]->shape();
     dtypes[info->bwd_input_eid[i]] = inputs[oi]->dtype();
     stypes[info->bwd_input_eid[i]] = inputs[oi]->storage_type();
   }
 
   std::pair<uint32_t, uint32_t> node_range, entry_range;
-  node_range = {num_forward_nodes, idx.num_nodes()};
+  node_range  = {num_forward_nodes, idx.num_nodes()};
   entry_range = {num_forward_entries, idx.num_node_entries()};
 
   bool match = true;
-  match &= CheckAndInferShape(&g, std::move(shapes), false,
-                              node_range, entry_range);
-  match &= CheckAndInferType(&g, std::move(dtypes), false,
-                             node_range, entry_range);
+  match &= CheckAndInferShape(&g, std::move(shapes), false, node_range, entry_range);
+  match &= CheckAndInferType(&g, std::move(dtypes), false, node_range, entry_range);
   exec::DevMaskVector dev_mask(idx.num_nodes(), default_ctx.dev_mask());
-  match &= CheckAndInferStorageType(&g, std::move(dev_mask), std::move(stypes),
-                                    false, node_range, entry_range);
+  match &= CheckAndInferStorageType(
+      &g, std::move(dev_mask), std::move(stypes), false, node_range, entry_range);
 
   if (!match) {
     g.attrs.erase(AddPrefix(BACKWARD, MEM_PLAN));
@@ -345,26 +345,29 @@ bool CachedOp::SetBackwardGraph(
   StorageVector storage(idx.num_node_entries(), exec::kBadStorageID);
   const auto& bwd_stypes = g.GetAttr<StorageTypeVector>("storage_type");
   for (size_t i = 0; i < bwd_stypes.size(); i++) {
-    if (bwd_stypes[i] != kDefaultStorage) storage[i] = exec::kDynamicStorageID;
-  }
-  for (size_t i = 0; i < num_forward_entries; ++i) storage[i] = exec::kExternalStorageID;
-  for (const auto i : idx.input_nodes()) storage[idx.entry_id(i, 0)] = exec::kExternalStorageID;
-  for (const auto i : idx.outputs()) storage[idx.entry_id(i)] = exec::kExternalStorageID;
-
-  auto mem_plan = MXPlanMemory(
-      &g, std::move(storage),
-      g.GetAttr<std::vector<uint32_t> >(AddPrefix(BACKWARD, REF_COUNT)),
-      AddPrefix(BACKWARD, STORAGE_PLAN),
-      {num_forward_nodes, idx.num_nodes()},
-      {num_forward_entries, idx.num_node_entries()},
-      detect_inplace_addto);
+    if (bwd_stypes[i] != kDefaultStorage)
+      storage[i] = exec::kDynamicStorageID;
+  }
+  for (size_t i = 0; i < num_forward_entries; ++i)
+    storage[i] = exec::kExternalStorageID;
+  for (const auto i : idx.input_nodes())
+    storage[idx.entry_id(i, 0)] = exec::kExternalStorageID;
+  for (const auto i : idx.outputs())
+    storage[idx.entry_id(i)] = exec::kExternalStorageID;
+
+  auto mem_plan                          = MXPlanMemory(&g,
+                               std::move(storage),
+                               g.GetAttr<std::vector<uint32_t> >(AddPrefix(BACKWARD, REF_COUNT)),
+                               AddPrefix(BACKWARD, STORAGE_PLAN),
+                               {num_forward_nodes, idx.num_nodes()},
+                               {num_forward_entries, idx.num_node_entries()},
+                               detect_inplace_addto);
   g.attrs[AddPrefix(BACKWARD, MEM_PLAN)] = std::make_shared<dmlc::any>(std::move(mem_plan));
 
   return false;
 }
 
-OpStatePtr CachedOp::GetCachedOpState(
-    const Context& ctx) {
+OpStatePtr CachedOp::GetCachedOpState(const Context& ctx) {
   std::lock_guard<std::mutex> lock(mutex_);
   for (const auto& i : cached_op_states_[ctx]) {
     // only create one state per device when not using static memory
@@ -372,52 +375,50 @@ OpStatePtr CachedOp::GetCachedOpState(
       return i;
     }
   }
-  auto state_ptr = OpStatePtr::Create<CachedOpState>(ctx, fwd_graph_, full_graph_,
-                                                     inlining_);
+  auto state_ptr = OpStatePtr::Create<CachedOpState>(ctx, fwd_graph_, full_graph_, inlining_);
 
   cached_op_states_[ctx].push_back(state_ptr);
   return state_ptr;
 }
 
-void CachedOp::StaticAllocMemory(
-    const OpStatePtr& state_ptr,
-    bool recording,
-    bool keep_fwd) {
+void CachedOp::StaticAllocMemory(const OpStatePtr& state_ptr, bool recording, bool keep_fwd) {
   using namespace nnvm;
   using namespace imperative;
 
-  auto& state = state_ptr.get_state<CachedOpState>();
-  const auto& default_ctx = state.context;
-  nnvm::Graph& g = keep_fwd ? state.info.full_graph : state.info.fwd_graph;
-  const auto& idx = g.indexed_graph();
+  auto& state                   = state_ptr.get_state<CachedOpState>();
+  const auto& default_ctx       = state.context;
+  nnvm::Graph& g                = keep_fwd ? state.info.full_graph : state.info.fwd_graph;
+  const auto& idx               = g.indexed_graph();
   const std::string& graph_type = keep_fwd ? BACKWARD : (recording ? FULL : FORWARD);
   const auto& storage_plan_attr = AddPrefix(graph_type, STORAGE_PLAN);
-  const auto& storage_plan = g.GetAttr<std::vector<int> >(storage_plan_attr);
-  const auto& mem_plan = g.GetAttr<MemoryPlanVector>(AddPrefix(graph_type, MEM_PLAN));
+  const auto& storage_plan      = g.GetAttr<std::vector<int> >(storage_plan_attr);
+  const auto& mem_plan          = g.GetAttr<MemoryPlanVector>(AddPrefix(graph_type, MEM_PLAN));
   std::vector<int> addto_entry;
   if (g.attrs.count("addto_entry")) {
     addto_entry = g.GetAttr<std::vector<int> >("addto_entry");
   }
-  size_t start_eid =
-      keep_fwd ? state.info.fwd_graph.indexed_graph().num_node_entries() : 0;
-  size_t end_eid = idx.num_node_entries();
+  size_t start_eid = keep_fwd ? state.info.fwd_graph.indexed_graph().num_node_entries() : 0;
+  size_t end_eid   = idx.num_node_entries();
 
-  if (!keep_fwd) state.fwd_alloc = false;
+  if (!keep_fwd)
+    state.fwd_alloc = false;
   state.bwd_alloc = false;
   for (size_t i = start_eid; i < state.buff.size(); ++i) {
-    state.buff[i] = NDArray();
-    state.arrays[i] = &state.buff[i];
-    state.array_reqs[i] = kNullOp;
+    state.buff[i]            = NDArray();
+    state.arrays[i]          = &state.buff[i];
+    state.array_reqs[i]      = kNullOp;
     state.dynamic_entries[i] = false;
   }
 
   for (auto i : idx.input_nodes()) {
     auto eid = idx.entry_id(i, 0);
-    if (eid >= start_eid) state.dynamic_entries[eid] = true;
+    if (eid >= start_eid)
+      state.dynamic_entries[eid] = true;
   }
   for (auto i : idx.outputs()) {
     auto eid = idx.entry_id(i);
-    if (eid >= start_eid) state.dynamic_entries[eid] = true;
+    if (eid >= start_eid)
+      state.dynamic_entries[eid] = true;
   }
 
   for (size_t i = start_eid; i < end_eid; ++i) {
@@ -434,9 +435,15 @@ void CachedOp::StaticAllocMemory(
   }
 
   auto& reuse_pool = keep_fwd ? state.bwd_reuse_pool : state.fwd_reuse_pool;
-  reuse_pool = imperative::AllocateMemory(
-      g, idx, default_ctx, start_eid, end_eid, mem_plan,
-      state.arrays, &state.array_reqs, std::move(reuse_pool));
+  reuse_pool       = imperative::AllocateMemory(g,
+                                          idx,
+                                          default_ctx,
+                                          start_eid,
+                                          end_eid,
+                                          mem_plan,
+                                          state.arrays,
+                                          &state.array_reqs,
+                                          std::move(reuse_pool));
 
   state.recording = recording;
   if (keep_fwd) {
@@ -446,26 +453,23 @@ void CachedOp::StaticAllocMemory(
   }
 }
 
-void CachedOp::StaticInitExec(
-    const OpStatePtr& state_ptr,
-    bool recording,
-    bool keep_fwd) {
+void CachedOp::StaticInitExec(const OpStatePtr& state_ptr, bool recording, bool keep_fwd) {
   using namespace nnvm;
   using namespace imperative;
 
-  auto& state = state_ptr.get_state<CachedOpState>();
+  auto& state             = state_ptr.get_state<CachedOpState>();
   const auto& default_ctx = state.context;
-  nnvm::Graph& g = keep_fwd ? state.info.full_graph : state.info.fwd_graph;
-  const auto& idx = g.indexed_graph();
+  nnvm::Graph& g          = keep_fwd ? state.info.full_graph : state.info.fwd_graph;
+  const auto& idx         = g.indexed_graph();
   std::vector<int> skip_plus_node;
   if (g.attrs.count("skip_plus_node")) {
     skip_plus_node = g.GetAttr<std::vector<int> >("skip_plus_node");
   }
-  size_t start_nid =
-      keep_fwd ? state.info.fwd_graph.indexed_graph().num_nodes() : 0;
-  size_t end_nid = idx.num_nodes();
+  size_t start_nid = keep_fwd ? state.info.fwd_graph.indexed_graph().num_nodes() : 0;
+  size_t end_nid   = idx.num_nodes();
 
-  if (!keep_fwd) state.fwd_exec_init = false;
+  if (!keep_fwd)
+    state.fwd_exec_init = false;
   state.bwd_exec_init = false;
 
   for (size_t i = start_nid; i < state.execs.size(); ++i) {
@@ -476,7 +480,7 @@ void CachedOp::StaticInitExec(
   if (!config_.static_shape) {
     for (size_t i = start_nid; i < end_nid; ++i) {
       state.opr_segs[i].next_nid = i + 1;
-      state.opr_segs[i].skip = skip_plus_node.size() && skip_plus_node[i];
+      state.opr_segs[i].skip     = skip_plus_node.size() && skip_plus_node[i];
     }
   } else {
     for (size_t i = start_nid; i < end_nid; ++i) {
@@ -492,7 +496,8 @@ void CachedOp::StaticInitExec(
       for (size_t j = 0; !skip && j < idx[i].source->num_outputs(); ++j) {
         skip = state.dynamic_entries[idx.entry_id(i, j)];
       }
-      if (skip) continue;
+      if (skip)
+        continue;
       SetupOpExec(g, i, state.execs[i], state.arrays, state.array_reqs);
     }
 
@@ -510,8 +515,14 @@ void CachedOp::StaticInitExec(
         bulk_size = 0;
     }
 
-    CreateEngineOpSeg(idx, default_ctx, start_nid, end_nid, bulk_size,
-                      state.execs, skip_plus_node, &state.opr_segs);
+    CreateEngineOpSeg(idx,
+                      default_ctx,
+                      start_nid,
+                      end_nid,
+                      bulk_size,
+                      state.execs,
+                      skip_plus_node,
+                      &state.opr_segs);
   }
 
   if (keep_fwd) {
@@ -521,22 +532,21 @@ void CachedOp::StaticInitExec(
   }
 }
 
-void CachedOp::StaticRunOps(
-    const Context& default_ctx,
-    const nnvm::Graph& g,
-    const OpStatePtr& state_ptr,
-    const std::vector<NDArray *> &state_arrays,
-    size_t start_nid,
-    size_t end_nid) {
-  static auto& createop = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
+void CachedOp::StaticRunOps(const Context& default_ctx,
+                            const nnvm::Graph& g,
+                            const OpStatePtr& state_ptr,
+                            const std::vector<NDArray*>& state_arrays,
+                            size_t start_nid,
+                            size_t end_nid) {
+  static auto& createop          = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
   static auto& is_layer_backward = Op::GetAttr<bool>("TIsLayerOpBackward");
 
-  bool profiling = profiler::Profiler::Get()->GetState() == profiler::Profiler::kRunning;
+  bool profiling   = profiler::Profiler::Get()->GetState() == profiler::Profiler::kRunning;
   bool is_training = Imperative::Get()->is_training();
-  auto& state = state_ptr.get_state<CachedOpState>();
-  const auto& idx = g.indexed_graph();
+  auto& state      = state_ptr.get_state<CachedOpState>();
+  const auto& idx  = g.indexed_graph();
   const auto& dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
-  const auto& op_execs = state.execs;
+  const auto& op_execs       = state.execs;
 
   std::vector<NDArray*> ndinputs, ndoutputs;
   mxnet::ShapeVector arg_shapes;
@@ -544,17 +554,20 @@ void CachedOp::StaticRunOps(
   std::vector<OpReqType> req;
 
   for (size_t i = start_nid; config_.static_shape && i < end_nid; ++i) {
-    if (op_execs[i]) op_execs[i]->op_ctx.is_train = is_training;
+    if (op_execs[i])
+      op_execs[i]->op_ctx.is_train = is_training;
   }
 
   for (size_t i = start_nid; i < end_nid; i = state.opr_segs[i].next_nid) {
     const auto& opr_seg = state.opr_segs[i];
-    if (opr_seg.skip) continue;
+    if (opr_seg.skip)
+      continue;
     if (opr_seg.opr != nullptr) {
       Engine::Get()->Push(opr_seg.opr.get(), default_ctx, 0, profiling);
     } else {
       const nnvm::IndexedGraph::Node& node = idx[i];
-      if (node.source->is_variable()) continue;
+      if (node.source->is_variable())
+        continue;
       auto num_outputs = node.source->num_outputs();
       ndinputs.clear();
       ndinputs.reserve(node.inputs.size());
@@ -563,7 +576,7 @@ void CachedOp::StaticRunOps(
         CHECK(!ndinputs.back()->is_none());
       }
       if (monitor_callback_ && monitor_all_) {
-          mxnet::common::ExecuteMonInputCallback(idx, state_arrays, i, monitor_callback_);
+        mxnet::common::ExecuteMonInputCallback(idx, state_arrays, i, monitor_callback_);
       }
       ndoutputs.clear();
       ndoutputs.reserve(num_outputs);
@@ -590,39 +603,50 @@ void CachedOp::StaticRunOps(
           state.op_states[i] =
               createop[node.source->op()](node.source->attrs, default_ctx, arg_shapes, arg_dtypes);
         }
-        Imperative::Get()->InvokeOp(
-            default_ctx, node.source->attrs, ndinputs, ndoutputs, req,
-            dispatch_mode, state.op_states[i]);
+        Imperative::Get()->InvokeOp(default_ctx,
+                                    node.source->attrs,
+                                    ndinputs,
+                                    ndoutputs,
+                                    req,
+                                    dispatch_mode,
+                                    state.op_states[i]);
       } else if (is_layer_backward.get(node.source->op(), false)) {
         nnvm::Node* fwd_node = node.source->control_deps[0].get();
-        auto fwd_node_id = idx.node_id(fwd_node);
-        Imperative::Get()->InvokeOp(
-            default_ctx, node.source->attrs, ndinputs, ndoutputs,
-            req, dispatch_mode, state.op_states[fwd_node_id]);
+        auto fwd_node_id     = idx.node_id(fwd_node);
+        Imperative::Get()->InvokeOp(default_ctx,
+                                    node.source->attrs,
+                                    ndinputs,
+                                    ndoutputs,
+                                    req,
+                                    dispatch_mode,
+                                    state.op_states[fwd_node_id]);
       } else {
         Imperative::Get()->InvokeOp(
-            default_ctx, node.source->attrs, ndinputs, ndoutputs, req,
-            dispatch_mode);
+            default_ctx, node.source->attrs, ndinputs, ndoutputs, req, dispatch_mode);
       }
       if (monitor_callback_) {
-          mxnet::common::ExecuteMonOutputCallback(idx, state_arrays, i, monitor_callback_);
+        mxnet::common::ExecuteMonOutputCallback(idx, state_arrays, i, monitor_callback_);
       }
     }
   }
 }
 
-#define INIT_DETACHED(x, y)   if (!y->is_none()) x->InitDetached(y)
+#define INIT_DETACHED(x, y) \
+  if (!y->is_none())        \
+  x->InitDetached(y)
 
-static void PrepareOutputs(const nnvm::Graph& g, const Context& default_ctx,
-                           const std::vector<NDArray*> &outputs,
-                           std::vector<NDArray*> *pArrays, bool detach) {
+static void PrepareOutputs(const nnvm::Graph& g,
+                           const Context& default_ctx,
+                           const std::vector<NDArray*>& outputs,
+                           std::vector<NDArray*>* pArrays,
+                           bool detach) {
   using namespace nnvm;
   const auto& dtypes = g.GetAttr<DTypeVector>("dtype");
   const auto& shapes = g.GetAttr<mxnet::ShapeVector>("shape");
   const auto& stypes = g.GetAttr<StorageTypeVector>("storage_type");
 
   const auto& idx = g.indexed_graph();
-  auto &arrays = *pArrays;
+  auto& arrays    = *pArrays;
   for (size_t i = 0; i < outputs.size(); ++i) {
     const auto eid = idx.entry_id(idx.outputs()[i]);
     // An input and an output may share the same array.
@@ -631,24 +655,22 @@ static void PrepareOutputs(const nnvm::Graph& g, const Context& default_ctx,
 
     arrays[eid] = outputs[i];
     if (arrays[eid]->is_none())
-      arrays[eid]->ReInit(static_cast<NDArrayStorageType>(stypes[eid]),
-                          shapes[eid], default_ctx, dtypes[eid]);
+      arrays[eid]->ReInit(
+          static_cast<NDArrayStorageType>(stypes[eid]), shapes[eid], default_ctx, dtypes[eid]);
     const nnvm::NodeAttrs& attrs = idx[idx.outputs()[i].node_id].source->attrs;
-    outputs[i]->AssignStorageInfo(common::NodeAttrsGetProfilerScope(attrs),
-                                  attrs.name);
+    outputs[i]->AssignStorageInfo(common::NodeAttrsGetProfilerScope(attrs), attrs.name);
   }
 }
 
-OpStatePtr CachedOp::StaticForward(
-    const Context& default_ctx,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs) {
+OpStatePtr CachedOp::StaticForward(const Context& default_ctx,
+                                   const std::vector<NDArray*>& inputs,
+                                   const std::vector<NDArray*>& outputs) {
   using namespace nnvm;
   using namespace imperative;
 
   bool recording = Imperative::Get()->is_recording();
   auto state_ptr = GetCachedOpState(default_ctx);
-  auto& state = state_ptr.get_state<CachedOpState>();
+  auto& state    = state_ptr.get_state<CachedOpState>();
 
   // Need to lock the mutex on the state, this allows
   // for multi context push of ops to dependency engine.
@@ -658,11 +680,11 @@ OpStatePtr CachedOp::StaticForward(
   std::lock_guard<std::mutex> lock(state.mutex);
 
   bool match = SetForwardGraph(default_ctx, &state.info, recording, inputs);
-  match = match && state.recording == recording;
+  match      = match && state.recording == recording;
 
-  nnvm::Graph& g = state.info.fwd_graph;
+  nnvm::Graph& g  = state.info.fwd_graph;
   const auto& idx = g.indexed_graph();
-  if (!state.fwd_alloc || !match)  {
+  if (!state.fwd_alloc || !match) {
     StaticAllocMemory(state_ptr, recording, false);
   }
 
@@ -670,25 +692,25 @@ OpStatePtr CachedOp::StaticForward(
   // The input and output arrays should only be valid for this run,
   // so we shouldn't modify the state's array list.
   state.arrays_with_in_out = state.arrays;
-  auto& arrays = state.arrays_with_in_out;
+  auto& arrays             = state.arrays_with_in_out;
   if (config_.static_shape) {
     for (auto i : config_.param_indices) {
       auto nid = idx.input_nodes()[i];
       if (!arrays[idx.entry_id(nid, 0)]->IsSame(*inputs[state.info.input_map[i]])) {
-        match = false;
+        match    = false;
         auto ptr = &state.buff[idx.entry_id(nid, 0)];
         CHECK_EQ(arrays[idx.entry_id(nid, 0)], ptr);
-        *arrays[idx.entry_id(nid, 0)] = *inputs[state.info.input_map[i]];
+        *arrays[idx.entry_id(nid, 0)]               = *inputs[state.info.input_map[i]];
         state.dynamic_entries[idx.entry_id(nid, 0)] = false;
       }
     }
     for (auto i : config_.data_indices) {
-      auto eid = idx.entry_id(idx.input_nodes()[i], 0);
+      auto eid    = idx.entry_id(idx.input_nodes()[i], 0);
       arrays[eid] = inputs[state.info.input_map[i]];
     }
   } else {
     for (size_t i = 0; i < num_inputs(); ++i) {
-      auto nid = idx.input_nodes()[i];
+      auto nid                     = idx.input_nodes()[i];
       arrays[idx.entry_id(nid, 0)] = inputs[state.info.input_map[i]];
     }
   }
@@ -703,31 +725,29 @@ OpStatePtr CachedOp::StaticForward(
   return recording ? state_ptr : OpStatePtr();
 }
 
-
-OpStatePtr CachedOp::DynamicForward(
-    const Context& default_ctx,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs,
-    bool use_naive_run) {
+OpStatePtr CachedOp::DynamicForward(const Context& default_ctx,
+                                    const std::vector<NDArray*>& inputs,
+                                    const std::vector<NDArray*>& outputs,
+                                    bool use_naive_run) {
   using namespace nnvm;
   using namespace imperative;
 
   // Initialize
   bool recording = Imperative::Get()->is_recording();
-  auto op_state = OpStatePtr::Create<DynamicRuntime>();
-  auto& runtime = op_state.get_state<DynamicRuntime>();
+  auto op_state  = OpStatePtr::Create<DynamicRuntime>();
+  auto& runtime  = op_state.get_state<DynamicRuntime>();
   {
     auto state_ptr = GetCachedOpState(default_ctx);
-    auto& state = state_ptr.get_state<CachedOpState>();
+    auto& state    = state_ptr.get_state<CachedOpState>();
     std::lock_guard<std::mutex> lock(state.mutex);
     SetForwardGraph(default_ctx, &state.info, recording, inputs);
     runtime.info.fwd_graph = state.info.fwd_graph;
     runtime.info.input_map = state.info.input_map;
   }
-  nnvm::Graph& g = runtime.info.fwd_graph;
+  nnvm::Graph& g  = runtime.info.fwd_graph;
   const auto& idx = g.indexed_graph();
-  auto& buff = runtime.buff;
-  auto& states = runtime.op_states;
+  auto& buff      = runtime.buff;
+  auto& states    = runtime.op_states;
 
   // Allocate entries
   buff.resize(idx.num_node_entries());
@@ -738,32 +758,54 @@ OpStatePtr CachedOp::DynamicForward(
     arrays.push_back(&buffered_array);
   }
   std::vector<OpReqType> array_reqs(arrays.size(), kWriteTo);
-  const auto& dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
+  const auto& dispatch_modes    = g.GetAttr<DispatchModeVector>("dispatch_mode");
   const std::string& graph_type = recording ? FULL : FORWARD;
   std::vector<uint32_t> ref_count =
-    g.GetAttr<std::vector<uint32_t> >(AddPrefix(graph_type, REF_COUNT));
+      g.GetAttr<std::vector<uint32_t> >(AddPrefix(graph_type, REF_COUNT));
   for (size_t i = 0; i < idx.num_node_entries(); ++i) {
-    if (ref_count[i] == 0) array_reqs[i] = kNullOp;
+    if (ref_count[i] == 0)
+      array_reqs[i] = kNullOp;
   }
   CollectInputOutputNDRefs(g, inputs, runtime.info.input_map, outputs, &arrays);
 
   if (!use_naive_run) {
-    const auto& mem_plan = g.GetAttr<MemoryPlanVector >(AddPrefix(graph_type, MEM_PLAN));
+    const auto& mem_plan = g.GetAttr<MemoryPlanVector>(AddPrefix(graph_type, MEM_PLAN));
     CreateGraphNDs(g, default_ctx, mem_plan, &array_reqs, &arrays);
     // If CachedOp is running in the inline mode, it uses RunGraph to record
     // computation; otherwise, CachedOp records computation itself.
     // So if it's not the inline mode, we disable recording.
-    RunGraph(false, idx, arrays, 0, idx.num_nodes(), std::move(array_reqs),
-            std::move(ref_count), &states, dispatch_modes,
-            recording && inlining_, nullptr, monitor_callback_, monitor_all_);
+    RunGraph(false,
+             idx,
+             arrays,
+             0,
+             idx.num_nodes(),
+             std::move(array_reqs),
+             std::move(ref_count),
+             &states,
+             dispatch_modes,
+             recording && inlining_,
+             nullptr,
+             monitor_callback_,
+             monitor_all_);
   } else {
     mxnet::ShapeVector shapes = g.GetAttr<mxnet::ShapeVector>("shape");
-    NaiveRunGraph(false, default_ctx, idx, arrays, 0, idx.num_nodes(),
-                  std::move(array_reqs), std::move(ref_count), &states,
-                  dispatch_modes, recording && inlining_, &shapes, monitor_callback_, monitor_all_);
+    NaiveRunGraph(false,
+                  default_ctx,
+                  idx,
+                  arrays,
+                  0,
+                  idx.num_nodes(),
+                  std::move(array_reqs),
+                  std::move(ref_count),
+                  &states,
+                  dispatch_modes,
+                  recording && inlining_,
+                  &shapes,
+                  monitor_callback_,
+                  monitor_all_);
     {
-      auto state_ptr = GetCachedOpState(default_ctx);
-      auto& state = state_ptr.get_state<CachedOpState>();
+      auto state_ptr    = GetCachedOpState(default_ctx);
+      auto& state       = state_ptr.get_state<CachedOpState>();
       auto copied_shape = shapes;
       std::lock_guard<std::mutex> lock(state.mutex);
       state.info.fwd_graph.attrs["shape"] = std::make_shared<dmlc::any>(std::move(copied_shape));
@@ -773,23 +815,22 @@ OpStatePtr CachedOp::DynamicForward(
   return op_state;
 }
 
-OpStatePtr CachedOp::Forward(
-    const std::shared_ptr<CachedOp>& op_ptr,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs,
-    const Context& default_ctx) {
+OpStatePtr CachedOp::Forward(const std::shared_ptr<CachedOp>& op_ptr,
+                             const std::vector<NDArray*>& inputs,
+                             const std::vector<NDArray*>& outputs,
+                             const Context& default_ctx) {
   static const auto cached_op = nnvm::Op::Get("_CachedOp");
 
   CHECK_EQ(inputs.size(), num_inputs());
   // Assign the storage information for the input arguments. Similar to the
   // implementation in `graph_executor.cc`, we use `mutable_input_nodes()` to
   // distinguish between weight parameters and auxiliary states.
-  const auto& fwd_idx = fwd_graph_.indexed_graph();
+  const auto& fwd_idx             = fwd_graph_.indexed_graph();
   const auto& mutable_input_nodes = fwd_idx.mutable_input_nodes();
   for (size_t i = 0; i < fwd_idx.input_nodes().size(); ++i) {
-    const uint32_t nid = fwd_idx.input_nodes().at(i);
-    const nnvm::NodeAttrs& attrs = fwd_idx[nid].source->attrs;
-    const std::string& arg_name = attrs.name;
+    const uint32_t nid               = fwd_idx.input_nodes().at(i);
+    const nnvm::NodeAttrs& attrs     = fwd_idx[nid].source->attrs;
+    const std::string& arg_name      = attrs.name;
     const std::string profiler_scope = common::NodeAttrsGetProfilerScope(attrs);
     if (mutable_input_nodes.count(nid)) {
       inputs[i]->AssignStorageInfo(profiler_scope + "aux_state:", arg_name);
@@ -800,16 +841,14 @@ OpStatePtr CachedOp::Forward(
 
   {
     auto state_ptr = GetCachedOpState(default_ctx);
-    auto& state = state_ptr.get_state<CachedOpState>();
+    auto& state    = state_ptr.get_state<CachedOpState>();
 
     const auto& idx = state.info.fwd_graph.indexed_graph();
     for (size_t i = 0; i < inputs.size(); ++i) {
       CHECK_EQ(inputs[i]->ctx(), default_ctx)
           << "CachedOp requires all inputs to live on the same context. But "
-          << idx[idx.input_nodes()[0]].source->attrs.name
-          << " is on " << default_ctx << " while "
-          << idx[idx.input_nodes()[i]].source->attrs.name
-          << " is on " << inputs[i]->ctx();
+          << idx[idx.input_nodes()[0]].source->attrs.name << " is on " << default_ctx << " while "
+          << idx[idx.input_nodes()[i]].source->attrs.name << " is on " << inputs[i]->ctx();
     }
   }
 
@@ -818,9 +857,9 @@ OpStatePtr CachedOp::Forward(
   OpStatePtr op_state;
   try {
     if (config_.is_dynamic || CheckDynamicShapeExists(default_ctx, inputs, true)) {
-      config_.is_dynamic = true;
+      config_.is_dynamic   = true;
       config_.static_alloc = false;
-      op_state = DynamicForward(default_ctx, inputs, outputs, true);
+      op_state             = DynamicForward(default_ctx, inputs, outputs, true);
     } else if (config_.static_alloc) {
       op_state = StaticForward(default_ctx, inputs, outputs);
     } else {
@@ -835,45 +874,43 @@ OpStatePtr CachedOp::Forward(
 
   if (Imperative::Get()->is_recording() && !inlining_) {
     nnvm::NodeAttrs attrs;
-    attrs.op = cached_op;
-    attrs.name = "_cachedop";
+    attrs.op     = cached_op;
+    attrs.name   = "_cachedop";
     attrs.parsed = op_ptr;
     Imperative::Get()->RecordOp(
-        std::move(attrs), inputs, outputs, op_state,
-        &save_inputs(), &save_outputs());
+        std::move(attrs), inputs, outputs, op_state, &save_inputs(), &save_outputs());
   }
   return op_state;
 }
 
-void CachedOp::DynamicBackward(
-    const bool retain_graph,
-    const OpStatePtr& op_state,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<OpReqType>& reqs,
-    const std::vector<NDArray*>& outputs) {
+void CachedOp::DynamicBackward(const bool retain_graph,
+                               const OpStatePtr& op_state,
+                               const std::vector<NDArray*>& inputs,
+                               const std::vector<OpReqType>& reqs,
+                               const std::vector<NDArray*>& outputs) {
   using namespace nnvm;
   using namespace imperative;
 
   // Initialize
   Context default_ctx = outputs[0]->ctx();
-  auto& runtime = op_state.get_state<DynamicRuntime>();
+  auto& runtime       = op_state.get_state<DynamicRuntime>();
   {
     auto state_ptr = GetCachedOpState(default_ctx);
-    auto& state = state_ptr.get_state<CachedOpState>();
+    auto& state    = state_ptr.get_state<CachedOpState>();
     std::lock_guard<std::mutex> lock(state.mutex);
     state.info.fwd_graph = runtime.info.fwd_graph;
     state.info.input_map = runtime.info.input_map;
     SetBackwardGraph(&state.info, reqs, inputs);
-    runtime.info.full_graph = state.info.full_graph;
+    runtime.info.full_graph    = state.info.full_graph;
     runtime.info.bwd_input_eid = state.info.bwd_input_eid;
   }
-  nnvm::Graph& g = runtime.info.full_graph;
+  nnvm::Graph& g  = runtime.info.full_graph;
   const auto& idx = g.indexed_graph();
-  auto& buff = runtime.buff;
-  auto& states = runtime.op_states;
+  auto& buff      = runtime.buff;
+  auto& states    = runtime.op_states;
 
   size_t num_forward_outputs = runtime.info.fwd_graph.outputs.size();
-  size_t num_forward_nodes = runtime.info.fwd_graph.indexed_graph().num_nodes();
+  size_t num_forward_nodes   = runtime.info.fwd_graph.indexed_graph().num_nodes();
   size_t num_forward_entries = runtime.info.fwd_graph.indexed_graph().num_node_entries();
   buff.resize(idx.num_node_entries());
   std::vector<NDArray*> arrays;
@@ -888,7 +925,8 @@ void CachedOp::DynamicBackward(
     arrays[runtime.info.bwd_input_eid[i]] = inputs[BwdOriginalInput(runtime.info.input_map, i)];
   }
   for (size_t i = 0, j = num_forward_outputs; i < reqs.size(); ++i) {
-    if (reqs[i] == kNullOp) continue;
+    if (reqs[i] == kNullOp)
+      continue;
     const auto eid = idx.entry_id(idx.outputs()[j++]);
     // An input and an output may share the same array.
     INIT_DETACHED(outputs[i], arrays[eid]);
@@ -898,29 +936,47 @@ void CachedOp::DynamicBackward(
   // Allocate NDArrays
   auto ref_count = g.GetAttr<std::vector<uint32_t> >(AddPrefix(BACKWARD, REF_COUNT));
   if (retain_graph) {
-    for (size_t i = 0; i < num_forward_entries; ++i) ++ref_count[i];
+    for (size_t i = 0; i < num_forward_entries; ++i)
+      ++ref_count[i];
   }
 
   std::vector<OpReqType> array_reqs(arrays.size(), kWriteTo);
   // set output reqs
   for (size_t i = 0, j = num_forward_outputs; i < reqs.size(); ++i) {
-    if (reqs[i] == kNullOp) continue;
+    if (reqs[i] == kNullOp)
+      continue;
     array_reqs[idx.entry_id(idx.outputs()[j++])] = reqs[i];
   }
   // set null reqs based on ref counts
   for (size_t i = num_forward_entries; i < idx.num_node_entries(); ++i) {
-    if (ref_count[i] == 0) array_reqs[i] = kNullOp;
+    if (ref_count[i] == 0)
+      array_reqs[i] = kNullOp;
   }
 
-  const auto& mem_plan = g.GetAttr<MemoryPlanVector >(AddPrefix(BACKWARD, MEM_PLAN));
-  AllocateMemory(g, idx, default_ctx, num_forward_entries, idx.num_node_entries(),
-                 mem_plan, arrays, &array_reqs);
+  const auto& mem_plan = g.GetAttr<MemoryPlanVector>(AddPrefix(BACKWARD, MEM_PLAN));
+  AllocateMemory(g,
+                 idx,
+                 default_ctx,
+                 num_forward_entries,
+                 idx.num_node_entries(),
+                 mem_plan,
+                 arrays,
+                 &array_reqs);
 
   const auto& dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
 
-  RunGraph(retain_graph, idx, arrays, num_forward_nodes, idx.num_nodes(),
-           std::move(array_reqs), std::move(ref_count), &states, dispatch_modes,
-           Imperative::Get()->is_recording(), nullptr, monitor_callback_);
+  RunGraph(retain_graph,
+           idx,
+           arrays,
+           num_forward_nodes,
+           idx.num_nodes(),
+           std::move(array_reqs),
+           std::move(ref_count),
+           &states,
+           dispatch_modes,
+           Imperative::Get()->is_recording(),
+           nullptr,
+           monitor_callback_);
 
   if (retain_graph) {
     buff.resize(num_forward_entries);
@@ -930,12 +986,11 @@ void CachedOp::DynamicBackward(
   }
 }
 
-void CachedOp::StaticBackward(
-    const bool retain_graph,
-    const OpStatePtr& state_ptr,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<OpReqType>& reqs,
-    const std::vector<NDArray*>& outputs) {
+void CachedOp::StaticBackward(const bool retain_graph,
+                              const OpStatePtr& state_ptr,
+                              const std::vector<NDArray*>& inputs,
+                              const std::vector<OpReqType>& reqs,
+                              const std::vector<NDArray*>& outputs) {
   using namespace nnvm;
   using namespace imperative;
 
@@ -946,8 +1001,8 @@ void CachedOp::StaticBackward(
 
   bool match = SetBackwardGraph(&state.info, reqs, inputs, true);
 
-  nnvm::Graph& g = state.info.full_graph;
-  const auto& idx = g.indexed_graph();
+  nnvm::Graph& g         = state.info.full_graph;
+  const auto& idx        = g.indexed_graph();
   auto num_forward_nodes = state.info.fwd_graph.indexed_graph().num_nodes();
 
   if (!state.bwd_alloc || !match) {
@@ -958,37 +1013,41 @@ void CachedOp::StaticBackward(
   // The input and output arrays should only be valid for this run,
   // so we shouldn't modify the state's array list.
   state.arrays_with_in_out = state.arrays;
-  auto& arrays = state.arrays_with_in_out;
+  auto& arrays             = state.arrays_with_in_out;
   for (size_t i = 0; i < state.info.bwd_input_eid.size(); ++i) {
     auto eid = state.info.bwd_input_eid[i];
-    if (eid == kEidNotExist || !state.dynamic_entries[eid]) continue;
+    if (eid == kEidNotExist || !state.dynamic_entries[eid])
+      continue;
     arrays[eid] = inputs[BwdOriginalInput(state.info.input_map, i)];
   }
 
   if (config_.static_shape) {
     for (auto i : config_.param_indices) {
       const auto iter = state.info.fwd_input_to_grad_output.find(i);
-      if (iter == state.info.fwd_input_to_grad_output.end()) continue;
+      if (iter == state.info.fwd_input_to_grad_output.end())
+        continue;
       auto entry = state.info.grad_graph.outputs[iter->second];
-      if (!idx.exist(entry.node.get())) continue;
+      if (!idx.exist(entry.node.get()))
+        continue;
       auto eid = idx.entry_id(entry);
-      if ((!arrays[eid]->IsSame(*outputs[iter->second]) &&
-            state.array_reqs[eid] != kNullOp) ||
+      if ((!arrays[eid]->IsSame(*outputs[iter->second]) && state.array_reqs[eid] != kNullOp) ||
           !(state.array_reqs[eid] == reqs[iter->second])) {
-        match = false;
+        match                 = false;
         state.array_reqs[eid] = reqs[iter->second];
         // An input and an output may share the same array.
         INIT_DETACHED(outputs[iter->second], arrays[eid]);
-        *arrays[eid] = *outputs[iter->second];
+        *arrays[eid]               = *outputs[iter->second];
         state.dynamic_entries[eid] = false;
       }
     }
     for (auto i : config_.data_indices) {
       const auto iter = state.info.fwd_input_to_grad_output.find(i);
-      if (iter == state.info.fwd_input_to_grad_output.end()) continue;
+      if (iter == state.info.fwd_input_to_grad_output.end())
+        continue;
       auto entry = state.info.grad_graph.outputs[iter->second];
-      if (!idx.exist(entry.node.get())) continue;
-      auto eid = idx.entry_id(entry);
+      if (!idx.exist(entry.node.get()))
+        continue;
+      auto eid              = idx.entry_id(entry);
       state.array_reqs[eid] = reqs[iter->second];
       // An input and an output may share the same array.
       INIT_DETACHED(outputs[iter->second], arrays[eid]);
@@ -997,8 +1056,9 @@ void CachedOp::StaticBackward(
   } else {
     for (size_t i = 0; i < state.info.grad_graph.outputs.size(); ++i) {
       auto entry = state.info.grad_graph.outputs[i];
-      if (!idx.exist(entry.node.get())) continue;
-      auto eid = idx.entry_id(entry);
+      if (!idx.exist(entry.node.get()))
+        continue;
+      auto eid              = idx.entry_id(entry);
       state.array_reqs[eid] = reqs[i];
       // An input and an output may share the same array.
       INIT_DETACHED(outputs[i], arrays[eid]);
@@ -1013,17 +1073,16 @@ void CachedOp::StaticBackward(
   StaticRunOps(default_ctx, g, state_ptr, arrays, num_forward_nodes, idx.num_nodes());
 }
 
-void CachedOp::Backward(
-    const bool retain_graph,
-    const OpStatePtr& state,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<OpReqType>& reqs,
-    const std::vector<NDArray*>& outputs) {
-  const auto& fwd_idx = fwd_graph_.indexed_graph();
-  const auto& full_idx = full_graph_.indexed_graph();
+void CachedOp::Backward(const bool retain_graph,
+                        const OpStatePtr& state,
+                        const std::vector<NDArray*>& inputs,
+                        const std::vector<OpReqType>& reqs,
+                        const std::vector<NDArray*>& outputs) {
+  const auto& fwd_idx             = fwd_graph_.indexed_graph();
+  const auto& full_idx            = full_graph_.indexed_graph();
   const auto& mutable_input_nodes = fwd_idx.mutable_input_nodes();
   for (size_t i = 0, j = 0; i < fwd_idx.input_nodes().size(); ++i) {
-    const uint32_t nid = fwd_idx.input_nodes().at(i);
+    const uint32_t nid          = fwd_idx.input_nodes().at(i);
     const std::string& arg_name = fwd_idx[nid].source->attrs.name;
     const std::string profiler_scope =
         common::NodeAttrsGetProfilerScope(fwd_idx[nid].source->attrs);
@@ -1032,10 +1091,9 @@ void CachedOp::Backward(
     }
     outputs[j++]->AssignStorageInfo(profiler_scope + "arg_grad:", arg_name);
   }
-  for (size_t i = fwd_idx.input_nodes().size(), j = 0;
-       i < full_idx.input_nodes().size(); ++i) {
-    const nnvm::NodeAttrs& attrs = full_idx[full_idx.input_nodes().at(i)].source->attrs;
-    const std::string& entry_name = attrs.name;
+  for (size_t i = fwd_idx.input_nodes().size(), j = 0; i < full_idx.input_nodes().size(); ++i) {
+    const nnvm::NodeAttrs& attrs     = full_idx[full_idx.input_nodes().at(i)].source->attrs;
+    const std::string& entry_name    = attrs.name;
     const std::string profiler_scope = common::NodeAttrsGetProfilerScope(attrs);
     inputs[j++]->AssignStorageInfo(profiler_scope, entry_name);
   }
@@ -1089,11 +1147,11 @@ void CachedOpForward(const OpStatePtr& state_ptr,
                      const std::vector<NDArray>& inputs,
                      const std::vector<OpReqType>& req,
                      const std::vector<NDArray>& outputs) {
-  CachedOpActualState &s = state_ptr.get_state<CachedOpActualState>();
-  std::vector<NDArray> in_bufs = inputs;
+  CachedOpActualState& s        = state_ptr.get_state<CachedOpActualState>();
+  std::vector<NDArray> in_bufs  = inputs;
   std::vector<NDArray> out_bufs = outputs;
-  std::vector<NDArray *> in_ptrs(in_bufs.size());
-  std::vector<NDArray *> out_ptrs(out_bufs.size());
+  std::vector<NDArray*> in_ptrs(in_bufs.size());
+  std::vector<NDArray*> out_ptrs(out_bufs.size());
   for (size_t i = 0; i < in_ptrs.size(); i++)
     in_ptrs[i] = &in_bufs[i];
   for (size_t i = 0; i < out_ptrs.size(); i++)
@@ -1113,7 +1171,7 @@ void CachedOpForward(const OpStatePtr& state_ptr,
     orig_is_train = Imperative::Get()->is_training();
   CHECK(inputs.size() > 0) << "cached op forward requires at least 1 input";
   Context default_ctx = inputs[0].ctx();
-  s.forward_state = s.op->Forward(nullptr, in_ptrs, out_ptrs, default_ctx);
+  s.forward_state     = s.op->Forward(nullptr, in_ptrs, out_ptrs, default_ctx);
   Imperative::Get()->set_is_training(orig_is_train);
   Imperative::Get()->set_is_recording(orig_is_record);
   // The arrays in out_ptrs may be changed by CachedOp.
@@ -1134,29 +1192,29 @@ void CachedOpBackward(const OpStatePtr& state_ptr,
                       const std::vector<NDArray>& outputs) {
   using namespace nnvm;
   using namespace imperative;
-  CachedOpActualState &s = state_ptr.get_state<CachedOpActualState>();
-  std::vector<NDArray> in_bufs = inputs;
+  CachedOpActualState& s        = state_ptr.get_state<CachedOpActualState>();
+  std::vector<NDArray> in_bufs  = inputs;
   std::vector<NDArray> out_bufs = outputs;
-  std::vector<NDArray *> in_ptrs;
-  std::vector<NDArray *> out_ptrs;
+  std::vector<NDArray*> in_ptrs;
+  std::vector<NDArray*> out_ptrs;
   CHECK_EQ(s.op->num_backward_inputs(), inputs.size());
   in_ptrs.reserve(s.op->num_backward_inputs());
   out_ptrs.reserve(s.op->num_inputs());
 
-  const std::vector<bool> &save_inputs = s.op->save_inputs();
-  const std::vector<bool> &save_outputs = s.op->save_outputs();
-  size_t bwd_in_dep = s.op->num_inputs();
-  size_t bwd_out_dep = s.op->num_outputs();
+  const std::vector<bool>& save_inputs  = s.op->save_inputs();
+  const std::vector<bool>& save_outputs = s.op->save_outputs();
+  size_t bwd_in_dep                     = s.op->num_inputs();
+  size_t bwd_out_dep                    = s.op->num_outputs();
   CHECK(s.op->num_backward_inputs() > bwd_in_dep + bwd_out_dep);
   size_t bwd_ograd_dep = s.op->num_backward_inputs() - bwd_in_dep - bwd_out_dep;
 
   // Find inputs, outputs and ograds
   auto ograds_begin = in_bufs.begin();
-  auto ograds_end = in_bufs.begin() + bwd_ograd_dep;
-  auto in_begin = ograds_end;
-  auto in_end = in_begin + bwd_in_dep;
-  auto out_begin = in_end;
-  auto out_end = in_bufs.end();
+  auto ograds_end   = in_bufs.begin() + bwd_ograd_dep;
+  auto in_begin     = ograds_end;
+  auto in_end       = in_begin + bwd_in_dep;
+  auto out_begin    = in_end;
+  auto out_end      = in_bufs.end();
 
   for (auto it = ograds_begin; it != ograds_end; it++)
     in_ptrs.push_back(&(*it));
@@ -1209,11 +1267,10 @@ void CachedOpBackward(const OpStatePtr& state_ptr,
 /*
  * Register the callback to be called when the operator is executed
  */
-void CachedOp::RegisterOpHook(const CachedOp::CachedOpMonCallback& callback,
-                              bool monitor_all) {
-    CHECK(callback) << "invalid callback";
-    monitor_callback_ = callback;
-    monitor_all_ = monitor_all;
+void CachedOp::RegisterOpHook(const CachedOp::CachedOpMonCallback& callback, bool monitor_all) {
+  CHECK(callback) << "invalid callback";
+  monitor_callback_ = callback;
+  monitor_all_      = monitor_all;
 }
 
 OpStatePtr CreateCachedOpState(const NodeAttrs& attrs,
@@ -1227,19 +1284,19 @@ OpStatePtr CreateCachedOpState(const NodeAttrs& attrs,
 bool CachedOp::BackwardStorageType(const nnvm::NodeAttrs& attrs,
                                    const int dev_mask,
                                    DispatchMode* dispatch_mode,
-                                   std::vector<int> *in_attrs,
-                                   std::vector<int> *out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   using namespace imperative;
   nnvm::Graph g(full_graph_);
-  const auto& idx = g.indexed_graph();
-  const auto &outputs = idx.outputs();
+  const auto& idx                  = g.indexed_graph();
+  const auto& outputs              = idx.outputs();
   const size_t num_forward_outputs = fwd_graph_.outputs.size();
   CHECK_EQ(outputs.size(), num_forward_outputs + out_attrs->size());
 
   // Construct bwd_input_eid
   std::vector<uint32_t> bwd_input_eid;
-  SetBackwardInputEid(bwd_in_dep_, bwd_out_dep_, bwd_ograd_dep_,
-                      ograd_entries_, idx, &bwd_input_eid);
+  SetBackwardInputEid(
+      bwd_in_dep_, bwd_out_dep_, bwd_ograd_dep_, ograd_entries_, idx, &bwd_input_eid);
   CHECK_EQ(in_attrs->size(), bwd_input_eid.size());
 
   // Prepare stypes and contexts based on inputs
@@ -1305,92 +1362,98 @@ size_t CachedOp::BwdOriginalInput(const std::vector<size_t>& input_map, size_t n
 }
 
 NNVM_REGISTER_OP(_CachedOp)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->num_inputs();
-  })
-.set_num_outputs([](const NodeAttrs& attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->num_outputs();
-  })
-.set_attr_parser(CachedOpParamParser)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(n->attrs.parsed);
-    return op->Gradient(n, ograds);
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->ListForwardInputNames();
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->ListForwardOutputNames();
-  })
-.set_attr<FCreateOpState>("FCreateOpState", CreateCachedOpState)
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     mxnet::ShapeVector *in_shapes,
-     mxnet::ShapeVector *out_shapes) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op::DefaultSubgraphOpShapeHelper(op->GetForwardSym(), in_shapes, out_shapes);
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int> *in_types,
-     std::vector<int> *out_types) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op::DefaultSubgraphOpTypeHelper(op->GetForwardSym(), in_types, out_types);
-  })
-.set_attr<FInferStorageType>("FInferStorageType",
-  [](const nnvm::NodeAttrs& attrs,
-     const int dev_mask,
-     DispatchMode* dispatch_mode,
-     std::vector<int>* in_stypes,
-     std::vector<int>* out_stypes) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op::DefaultSubgraphOpStorageTypeHelper(op->GetForwardSym(),
-                                                  dev_mask, dispatch_mode,
-                                                  in_stypes, out_stypes);
-  })
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CachedOpForward)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CachedOpForward)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op::DefaultSubgraphOpMutableInputsHelper(op->GetForwardSym());
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op::DefaultSubgraphOpResourceRequestHelper(op->GetForwardSym());
-  })
-.set_attr<FExecType>("FExecType", op::DefaultSubgraphOpExecType)
-.add_argument("data", "NDArray-or-Symbol[]", "input data list");
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+      return op->num_inputs();
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+      return op->num_outputs();
+    })
+    .set_attr_parser(CachedOpParamParser)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 const CachedOpPtr& op = nnvm::get<CachedOpPtr>(n->attrs.parsed);
+                                 return op->Gradient(n, ograds);
+                               })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const nnvm::NodeAttrs& attrs) {
+                                       const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+                                       return op->ListForwardInputNames();
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const nnvm::NodeAttrs& attrs) {
+                                        const CachedOpPtr& op =
+                                            nnvm::get<CachedOpPtr>(attrs.parsed);
+                                        return op->ListForwardOutputNames();
+                                      })
+    .set_attr<FCreateOpState>("FCreateOpState", CreateCachedOpState)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_shapes,
+                                     mxnet::ShapeVector* out_shapes) {
+                                    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+                                    return op::DefaultSubgraphOpShapeHelper(
+                                        op->GetForwardSym(), in_shapes, out_shapes);
+                                  })
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_types, std::vector<int>* out_types) {
+          const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+          return op::DefaultSubgraphOpTypeHelper(op->GetForwardSym(), in_types, out_types);
+        })
+    .set_attr<FInferStorageType>(
+        "FInferStorageType",
+        [](const nnvm::NodeAttrs& attrs,
+           const int dev_mask,
+           DispatchMode* dispatch_mode,
+           std::vector<int>* in_stypes,
+           std::vector<int>* out_stypes) {
+          const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+          return op::DefaultSubgraphOpStorageTypeHelper(
+              op->GetForwardSym(), dev_mask, dispatch_mode, in_stypes, out_stypes);
+        })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CachedOpForward)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CachedOpForward)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+                                     return op::DefaultSubgraphOpMutableInputsHelper(
+                                         op->GetForwardSym());
+                                   })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+                                  return op::DefaultSubgraphOpResourceRequestHelper(
+                                      op->GetForwardSym());
+                                })
+    .set_attr<FExecType>("FExecType", op::DefaultSubgraphOpExecType)
+    .add_argument("data", "NDArray-or-Symbol[]", "input data list");
 
 NNVM_REGISTER_OP(_backward_CachedOp)
-.set_num_inputs([](const NodeAttrs& attrs){
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->num_backward_inputs();
-  })
-.set_num_outputs([](const NodeAttrs& attrs){
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->num_inputs() - op->mutable_input_nodes().size();
-  })
-.set_attr<FInferStorageType>("FInferStorageType", [](const nnvm::NodeAttrs& attrs,
-                                                     const int dev_mask,
-                                                     DispatchMode* dispatch_mode,
-                                                     std::vector<int> *in_attrs,
-                                                     std::vector<int> *out_attrs) {
-    const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
-    return op->BackwardStorageType(attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
-  })
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CachedOpBackward)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CachedOpBackward)
-.set_attr<FExecType>("FExecType", op::DefaultSubgraphOpExecType)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<bool>("TIsBackward", true);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+      return op->num_backward_inputs();
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+      return op->num_inputs() - op->mutable_input_nodes().size();
+    })
+    .set_attr<FInferStorageType>("FInferStorageType",
+                                 [](const nnvm::NodeAttrs& attrs,
+                                    const int dev_mask,
+                                    DispatchMode* dispatch_mode,
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
+                                   const CachedOpPtr& op = nnvm::get<CachedOpPtr>(attrs.parsed);
+                                   return op->BackwardStorageType(
+                                       attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
+                                 })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CachedOpBackward)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CachedOpBackward)
+    .set_attr<FExecType>("FExecType", op::DefaultSubgraphOpExecType)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<bool>("TIsBackward", true);
 
 }  // namespace mxnet
diff --git a/src/imperative/cached_op.h b/src/imperative/cached_op.h
index 4ac9a0f52497..97ac23cc3a11 100644
--- a/src/imperative/cached_op.h
+++ b/src/imperative/cached_op.h
@@ -36,41 +36,41 @@
 namespace mxnet {
 namespace {
 
-  static const char FULL[] = "full";
-  static const char FORWARD[] = "forward";
-  static const char BACKWARD[] = "backward";
-  static const char REF_COUNT[] = "ref_count";
-  static const char MEM_PLAN[] = "mem_plan";
-  static const char STORAGE_PLAN[] = "storage_plan";
-
-std::string AddPrefix(const std::string& prefix,
-                      const std::string& s) {
+static const char FULL[]         = "full";
+static const char FORWARD[]      = "forward";
+static const char BACKWARD[]     = "backward";
+static const char REF_COUNT[]    = "ref_count";
+static const char MEM_PLAN[]     = "mem_plan";
+static const char STORAGE_PLAN[] = "storage_plan";
+
+std::string AddPrefix(const std::string& prefix, const std::string& s) {
   return prefix + "_" + s;
 }
 
 nnvm::NodeEntry AggregateGradient(std::vector<nnvm::NodeEntry>&& v) {
   using nnvm::Op;
-  static size_t inplace_sum_cap = dmlc::GetEnv("MXNET_EXEC_INPLACE_GRAD_SUM_CAP", 8);
+  static size_t inplace_sum_cap  = dmlc::GetEnv("MXNET_EXEC_INPLACE_GRAD_SUM_CAP", 8);
   static const Op* ewise_plus_op = Op::Get("_grad_add");
-  static const Op* ewise_sum_op = Op::Get("ElementWiseSum");
-  static const Op* identity_op = Op::Get("identity");
-  static const Op* zeros_op = Op::Get("_zeros");
+  static const Op* ewise_sum_op  = Op::Get("ElementWiseSum");
+  static const Op* identity_op   = Op::Get("identity");
+  static const Op* zeros_op      = Op::Get("_zeros");
   static const Op* zeros_like_op = Op::Get("zeros_like");
 
   if (v.empty()) {
     nnvm::ObjectPtr ng = nnvm::Node::Create();
-    ng->attrs.op = Op::Get("_zeros_without_dtype");
-    ng->attrs.name = "zeros_without_dtype";
+    ng->attrs.op       = Op::Get("_zeros_without_dtype");
+    ng->attrs.name     = "zeros_without_dtype";
     ng->attrs.op->attr_parser(&(ng->attrs));
     return nnvm::NodeEntry(std::move(ng), 0, 0);
   }
 
   // remove zero in the sum. at least keep 1.
   auto begin = std::remove_if(v.begin(), v.end(), [](const nnvm::NodeEntry& nodeEntry) {
-     CHECK(nodeEntry.node);
-     return nodeEntry.node->op() == zeros_op || nodeEntry.node->op() == zeros_like_op;
+    CHECK(nodeEntry.node);
+    return nodeEntry.node->op() == zeros_op || nodeEntry.node->op() == zeros_like_op;
   });
-  if (begin == v.begin()) ++begin;
+  if (begin == v.begin())
+    ++begin;
   v.erase(begin, v.end());
   CHECK(!v.empty());
 
@@ -78,9 +78,9 @@ nnvm::NodeEntry AggregateGradient(std::vector<nnvm::NodeEntry>&& v) {
     return std::move(v[0]);
   } else {
     if (v.size() < inplace_sum_cap) {
-      nnvm::ObjectPtr sum_node = nnvm::Node::Create();
-      sum_node->attrs.op = ewise_sum_op;
-      sum_node->attrs.name = "sum_grad";
+      nnvm::ObjectPtr sum_node         = nnvm::Node::Create();
+      sum_node->attrs.op               = ewise_sum_op;
+      sum_node->attrs.name             = "sum_grad";
       sum_node->attrs.dict["num_args"] = std::to_string(v.size());
       sum_node->attrs.op->attr_parser(&(sum_node->attrs));
       sum_node->inputs = std::move(v);
@@ -104,30 +104,29 @@ nnvm::NodeEntry AggregateGradient(std::vector<nnvm::NodeEntry>&& v) {
         // the node entries v passed in here are of the same node of
         // op _identity_with_attr_like_rhs. We should skip adding a node
         // to its own control_deps.
-        if (v[i-1].node != v[i].node) {
+        if (v[i - 1].node != v[i].node) {
           v[i].node->control_deps.push_back(ret.node);
         }
 
         std::ostringstream os;
         os << "sum_grad_" << i;
         nnvm::ObjectPtr x = nnvm::Node::Create();
-        x->attrs.op = ewise_plus_op;
-        x->attrs.name = os.str();
-        x->inputs = {ret, v[i]};
-        ret = nnvm::NodeEntry(std::move(x), 0, 0);
+        x->attrs.op       = ewise_plus_op;
+        x->attrs.name     = os.str();
+        x->inputs         = {ret, v[i]};
+        ret               = nnvm::NodeEntry(std::move(x), 0, 0);
       }
       // identity node is used to avoid exposure of dummy plus node
       // when its output get assigned to another space.
       nnvm::ObjectPtr id_node = nnvm::Node::Create();
-      id_node->attrs.op = identity_op;
-      id_node->attrs.name = "sum_grad_final";
-      id_node->inputs = {ret};
+      id_node->attrs.op       = identity_op;
+      id_node->attrs.name     = "sum_grad_final";
+      id_node->inputs         = {ret};
       return nnvm::NodeEntry{id_node, 0, 0};
     }
   }
 }
 
-
 /* \brief collect pointers to input and output ndarrays
  * into a single data structure, this data structure can
  * be used for Memory allocation pass*/
@@ -142,7 +141,7 @@ void CollectInputOutputNDRefs(const nnvm::Graph& g,
                               const std::vector<size_t>& input_map,
                               const std::vector<NDArray*>& outputs,
                               std::vector<NDArray*>* arrays) {
-  const auto& idx = g.indexed_graph();
+  const auto& idx   = g.indexed_graph();
   size_t num_inputs = idx.input_nodes().size();
   for (size_t i = 0; i < num_inputs; ++i) {
     (*arrays)[idx.entry_id(idx.input_nodes()[i], 0)] = inputs[input_map[i]];
@@ -168,27 +167,24 @@ void CreateGraphNDs(const nnvm::Graph& g,
                     std::vector<OpReqType>* array_reqs,
                     std::vector<NDArray*>* arrays) {
   const auto& idx = g.indexed_graph();
-  mxnet::imperative::AllocateMemory(g, idx, default_ctx, 0,
-                                    idx.num_node_entries(), mem_plan, *arrays,
-                                    array_reqs);
-  const auto &dtypes = g.GetAttr<nnvm::DTypeVector>("dtype");
-  const auto &shapes = g.GetAttr<mxnet::ShapeVector>("shape");
-  const auto &stypes = g.GetAttr<mxnet::StorageTypeVector>("storage_type");
+  mxnet::imperative::AllocateMemory(
+      g, idx, default_ctx, 0, idx.num_node_entries(), mem_plan, *arrays, array_reqs);
+  const auto& dtypes = g.GetAttr<nnvm::DTypeVector>("dtype");
+  const auto& shapes = g.GetAttr<mxnet::ShapeVector>("shape");
+  const auto& stypes = g.GetAttr<mxnet::StorageTypeVector>("storage_type");
   for (size_t i = 0; i < idx.outputs().size(); ++i) {
     auto eid = idx.entry_id(idx.outputs()[i]);
     if (!(*arrays)[eid]->is_none())
       continue;
-    *((*arrays)[eid]) = NDArray(static_cast<NDArrayStorageType>(stypes[eid]),
-                                shapes[eid], default_ctx, true, dtypes[eid]);
+    *((*arrays)[eid]) = NDArray(
+        static_cast<NDArrayStorageType>(stypes[eid]), shapes[eid], default_ctx, true, dtypes[eid]);
     const nnvm::NodeAttrs& attrs = idx[idx.outputs()[i].node_id].source->attrs;
-    (*arrays)[eid]->AssignStorageInfo(
-        common::NodeAttrsGetProfilerScope(attrs),
-        attrs.name);
+    (*arrays)[eid]->AssignStorageInfo(common::NodeAttrsGetProfilerScope(attrs), attrs.name);
   }
 }
 
 /* \brief create a forward graph from they Symbol */
-void CreateForwardGraph(const nnvm::Symbol &sym, nnvm::Graph *fwd_graph) {
+void CreateForwardGraph(const nnvm::Symbol& sym, nnvm::Graph* fwd_graph) {
   using namespace nnvm;
   static const auto _copy_op = Op::Get("_copy");
   NodeEntryMap<size_t> dedup_out;
@@ -196,12 +192,12 @@ void CreateForwardGraph(const nnvm::Symbol &sym, nnvm::Graph *fwd_graph) {
   // to graph outputs. Since node entry stores information about the node
   // as well as the input node of the graph, a graph can be recreated from a
   // symbol by just copying the outputs
-  for (const NodeEntry &nodeEntry : sym.outputs) {
+  for (const NodeEntry& nodeEntry : sym.outputs) {
     if (dedup_out.find(nodeEntry) != dedup_out.end()) {
       ObjectPtr copy_node = Node::Create();
       copy_node->attrs.op = _copy_op;
-      copy_node->attrs.name = nodeEntry.node->attrs.name + "_copy" +
-                              std::to_string(dedup_out[nodeEntry]++);
+      copy_node->attrs.name =
+          nodeEntry.node->attrs.name + "_copy" + std::to_string(dedup_out[nodeEntry]++);
       copy_node->inputs.emplace_back(nodeEntry);
       if (_copy_op->attr_parser != nullptr) {
         _copy_op->attr_parser(&(copy_node->attrs));
@@ -223,15 +219,15 @@ void CreateBackwardGraph(nnvm::Graph* fwd_graph,
   static const std::vector<const Op*> zero_ops{Op::Get("zeros_like"), Op::Get("_zeros")};
   ograd_entries->reserve(fwd_graph->outputs.size());
   for (size_t i = 0; i < fwd_graph->outputs.size(); ++i) {
-    nnvm::ObjectPtr np = Node::Create();
-    const nnvm::NodeAttrs& attrs = fwd_graph->outputs[i].node->attrs;
-    np->attrs.name = attrs.name + "_head_grad";
+    nnvm::ObjectPtr np                   = Node::Create();
+    const nnvm::NodeAttrs& attrs         = fwd_graph->outputs[i].node->attrs;
+    np->attrs.name                       = attrs.name + "_head_grad";
     np->attrs.dict["__profiler_scope__"] = common::NodeAttrsGetProfilerScope(attrs);
     ograd_entries->emplace_back(np);
   }
 
   std::vector<NodeEntry> xs;
-  const IndexedGraph &indexed_graph = fwd_graph->indexed_graph();
+  const IndexedGraph& indexed_graph = fwd_graph->indexed_graph();
   // Create vector of inputs to be passed to the gradient pass
   for (size_t i = 0; i < indexed_graph.input_nodes().size(); ++i) {
     const uint32_t node_id = indexed_graph.input_nodes()[i];
@@ -249,11 +245,15 @@ void CreateBackwardGraph(nnvm::Graph* fwd_graph,
   // There are inputs in computation graph that require gradients
   if (!xs.empty()) {
     try {
-      *grad_graph = pass::MXGradient(
-           *fwd_graph, fwd_graph->outputs, xs, *ograd_entries,
-           mxnet::AggregateGradient, nullptr,
-           zero_ops, "_copy");
-    } catch (const nnvm::pass::InvalidGraphError &e) {
+      *grad_graph = pass::MXGradient(*fwd_graph,
+                                     fwd_graph->outputs,
+                                     xs,
+                                     *ograd_entries,
+                                     mxnet::AggregateGradient,
+                                     nullptr,
+                                     zero_ops,
+                                     "_copy");
+    } catch (const nnvm::pass::InvalidGraphError& e) {
       *grad_graph = nnvm::Graph();
     }
   } else {
@@ -276,25 +276,27 @@ void CreateFullGraph(const nnvm::Symbol& sym,
     *fwd_graph = exec::EliminateCommonExpr(std::move(*fwd_graph));
 
   // construct backward graph
-  CreateBackwardGraph(fwd_graph, grad_graph, ograd_entries,
-                      fwd_input_to_grad_output);
+  CreateBackwardGraph(fwd_graph, grad_graph, ograd_entries, fwd_input_to_grad_output);
 
   full_graph->outputs = fwd_graph->outputs;
   // add backward graph outputs to full graph
-  for (const auto &i : grad_graph->outputs) {
+  for (const auto& i : grad_graph->outputs) {
     full_graph->outputs.emplace_back(i);
   }
 }
 
 /* \brief Set Ref counts for node entries for forward graph */
-void SetForwardRefCounts(nnvm::Graph *fwd_graph) {
+void SetForwardRefCounts(nnvm::Graph* fwd_graph) {
   const auto& idx = fwd_graph->indexed_graph();
 
   std::vector<uint32_t> ref_count(idx.num_node_entries(), 0);
-  for (const auto& i : idx.input_nodes()) ++ref_count[idx.entry_id(i, 0)];
-  for (const auto& i : idx.outputs()) ++ref_count[idx.entry_id(i)];
+  for (const auto& i : idx.input_nodes())
+    ++ref_count[idx.entry_id(i, 0)];
+  for (const auto& i : idx.outputs())
+    ++ref_count[idx.entry_id(i)];
   for (size_t i = 0; i < idx.num_nodes(); ++i) {
-    for (const auto& j : idx[i].inputs) ++ref_count[idx.entry_id(j)];
+    for (const auto& j : idx[i].inputs)
+      ++ref_count[idx.entry_id(j)];
   }
 
   fwd_graph->attrs[AddPrefix(FORWARD, REF_COUNT)] =
@@ -306,7 +308,7 @@ void SetRefCounts(nnvm::Graph* fwd_graph, const nnvm::Graph& full_graph) {
   const auto& idx = fwd_graph->indexed_graph();
   SetForwardRefCounts(fwd_graph);
 
-  size_t num_forward_nodes = idx.num_nodes();
+  size_t num_forward_nodes   = idx.num_nodes();
   size_t num_forward_entries = idx.num_node_entries();
 
   const auto& full_idx = full_graph.indexed_graph();
@@ -314,38 +316,39 @@ void SetRefCounts(nnvm::Graph* fwd_graph, const nnvm::Graph& full_graph) {
   std::vector<uint32_t> temp_ref_count(full_idx.num_node_entries(), 0);
   for (size_t i = num_forward_nodes; i < full_idx.num_nodes(); ++i) {
     for (const auto& j : full_idx[i].inputs) {
-       ++temp_ref_count[full_idx.entry_id(j)];
+      ++temp_ref_count[full_idx.entry_id(j)];
     }
   }
 
-  auto full_ref_count = fwd_graph->GetAttr<std::vector<uint32_t> >(AddPrefix(FORWARD,
-                                                                             REF_COUNT));
-  for (size_t i = 0; i < num_forward_entries; ++i) full_ref_count.at(i) += temp_ref_count[i];
+  auto full_ref_count = fwd_graph->GetAttr<std::vector<uint32_t>>(AddPrefix(FORWARD, REF_COUNT));
+  for (size_t i = 0; i < num_forward_entries; ++i)
+    full_ref_count.at(i) += temp_ref_count[i];
   fwd_graph->attrs[AddPrefix(FULL, REF_COUNT)] =
       std::make_shared<dmlc::any>(std::move(full_ref_count));
 }
 
-void OptimizeGraph(nnvm::Graph* full_graph, nnvm::Graph* fwd_graph, nnvm::Graph* grad_graph,
-                   std::vector<size_t>* input_map, const Context& context,
-                   size_t num_forward_outputs, const bool inlining) {
+void OptimizeGraph(nnvm::Graph* full_graph,
+                   nnvm::Graph* fwd_graph,
+                   nnvm::Graph* grad_graph,
+                   std::vector<size_t>* input_map,
+                   const Context& context,
+                   size_t num_forward_outputs,
+                   const bool inlining) {
   input_map->resize(full_graph->indexed_graph().input_nodes().size());
   std::iota(input_map->begin(), input_map->end(), 0);
 #if MXNET_USE_CUDA && !defined(_WIN32)
-  if (context.dev_mask() == kGPU &&
-      !inlining &&
-      dmlc::GetEnv("MXNET_USE_FUSION", true)) {
+  if (context.dev_mask() == kGPU && !inlining && dmlc::GetEnv("MXNET_USE_FUSION", true)) {
     nnvm::Graph unoptimized_graph;
     common::CopyGraph(&unoptimized_graph, *full_graph, false);
 
     if (common::CheckForInputNameDuplicates(unoptimized_graph.indexed_graph())) {
       *full_graph = exec::FusePointwise(*full_graph, num_forward_outputs);
       // Fill in input_map - mapping from the new to the original input indices.
-      const auto &original_inputs = unoptimized_graph.indexed_graph().input_nodes();
-      const auto &new_inputs = full_graph->indexed_graph().input_nodes();
+      const auto& original_inputs = unoptimized_graph.indexed_graph().input_nodes();
+      const auto& new_inputs      = full_graph->indexed_graph().input_nodes();
       if (original_inputs.size() != new_inputs.size()) {
-        LOG(WARNING)
-          << "Number of inputs after fusion does not match original number of inputs. "
-          << "This is most probably a bug. Disabling fusion for this run.";
+        LOG(WARNING) << "Number of inputs after fusion does not match original number of inputs. "
+                     << "This is most probably a bug. Disabling fusion for this run.";
         *full_graph = unoptimized_graph;
       } else {
         std::unordered_map<std::string, size_t> original_input_map;
@@ -363,25 +366,22 @@ void OptimizeGraph(nnvm::Graph* full_graph, nnvm::Graph* fwd_graph, nnvm::Graph*
       }
     } else {
       LOG(WARNING)
-        << "Graph contains duplicate names for some of its inputs - fusion is NOT enabled!";
-     }
+          << "Graph contains duplicate names for some of its inputs - fusion is NOT enabled!";
+    }
   }
 #else
   // Only warn user if MXNET_USE_FUSION env var is explicitly set
-  if (context.dev_mask() == kGPU && !inlining &&
-      dmlc::GetEnv("MXNET_USE_FUSION", false)) {
+  if (context.dev_mask() == kGPU && !inlining && dmlc::GetEnv("MXNET_USE_FUSION", false)) {
     exec::WarnFusionNotSupported();
   }
 #endif  // MXNET_USE_CUDA && !defined(_WIN32)
 
-  *fwd_graph = nnvm::Graph();
-  fwd_graph->outputs = std::vector<nnvm::NodeEntry>(full_graph->outputs.begin(),
-                                                    full_graph->outputs.begin() +
-                                                    num_forward_outputs);
-  *grad_graph = nnvm::Graph();
-  grad_graph->outputs = std::vector<nnvm::NodeEntry>(full_graph->outputs.begin() +
-                                                     num_forward_outputs,
-                                                     full_graph->outputs.end());
+  *fwd_graph         = nnvm::Graph();
+  fwd_graph->outputs = std::vector<nnvm::NodeEntry>(
+      full_graph->outputs.begin(), full_graph->outputs.begin() + num_forward_outputs);
+  *grad_graph         = nnvm::Graph();
+  grad_graph->outputs = std::vector<nnvm::NodeEntry>(
+      full_graph->outputs.begin() + num_forward_outputs, full_graph->outputs.end());
   SetRefCounts(fwd_graph, *full_graph);
 }
 
@@ -421,35 +421,37 @@ struct CachedOpConfig : public dmlc::Parameter<CachedOpConfig> {
   std::string subgraph;
   DMLC_DECLARE_PARAMETER(CachedOpConfig) {
     DMLC_DECLARE_FIELD(static_alloc)
-    .set_default(false)
-    .describe("Statically allocate memory to improve speed. "
-              "Memory usage may increase.");
+        .set_default(false)
+        .describe(
+            "Statically allocate memory to improve speed. "
+            "Memory usage may increase.");
     DMLC_DECLARE_FIELD(static_shape)
-    .set_default(false)
-    .describe("Optimize for invariant input shapes between iterations. "
-              "Must also set static_alloc to True. "
-              "Change of input shapes is still allowed but slower.");
+        .set_default(false)
+        .describe(
+            "Optimize for invariant input shapes between iterations. "
+            "Must also set static_alloc to True. "
+            "Change of input shapes is still allowed but slower.");
     DMLC_DECLARE_FIELD(inline_limit)
-    .set_default(2)
-    .describe("Maximum number of operators that can be inlined.");
+        .set_default(2)
+        .describe("Maximum number of operators that can be inlined.");
     DMLC_DECLARE_FIELD(forward_bulk_size)
-    .set_default(Imperative::BulkExecMaxNodeTrainFwd())
-    .describe("Segment size of bulk execution during forward pass.");
+        .set_default(Imperative::BulkExecMaxNodeTrainFwd())
+        .describe("Segment size of bulk execution during forward pass.");
     DMLC_DECLARE_FIELD(backward_bulk_size)
-    .set_default(Imperative::BulkExecMaxNodeTrainBwd())
-    .describe("Segment size of bulk execution during backward pass.");
+        .set_default(Imperative::BulkExecMaxNodeTrainBwd())
+        .describe("Segment size of bulk execution during backward pass.");
     DMLC_DECLARE_FIELD(data_indices)
-    .set_default(mxnet::Tuple<uint32_t>())
-    .describe("Position of argument variables.");
+        .set_default(mxnet::Tuple<uint32_t>())
+        .describe("Position of argument variables.");
     DMLC_DECLARE_FIELD(param_indices)
-    .set_default(mxnet::Tuple<uint32_t>())
-    .describe("Position of parameters.");
+        .set_default(mxnet::Tuple<uint32_t>())
+        .describe("Position of parameters.");
     DMLC_DECLARE_FIELD(subgraph)
-    .set_default(std::string(""))
-    .describe("JSON string of a subgraph.");
+        .set_default(std::string(""))
+        .describe("JSON string of a subgraph.");
     DMLC_DECLARE_FIELD(is_dynamic)
-    .set_default(false)
-    .describe("Whether the graph contains dynamic shape operators.");
+        .set_default(false)
+        .describe("Whether the graph contains dynamic shape operators.");
   }
 };
 
@@ -458,13 +460,10 @@ class LazyTransformDataset;
 }
 
 class CachedOp {
-  using CachedOpMonCallback =
-      std::function<void(const char *, const char *, void *)>;
+  using CachedOpMonCallback = std::function<void(const char*, const char*, void*)>;
 
  public:
-  CachedOp(
-      const nnvm::Symbol& sym,
-      const std::vector<std::pair<std::string, std::string> >& flags);
+  CachedOp(const nnvm::Symbol& sym, const std::vector<std::pair<std::string, std::string>>& flags);
   virtual ~CachedOp();
   nnvm::Symbol GetOptimizedSymbol() const;
   uint32_t num_inputs() const {
@@ -477,7 +476,7 @@ class CachedOp {
     return bwd_ograd_dep_.size() + bwd_in_dep_.size() + bwd_out_dep_.size();
   }
   uint32_t num_backward_outputs() const {
-    auto &idx = fwd_graph_.indexed_graph();
+    auto& idx = fwd_graph_.indexed_graph();
     return idx.input_nodes().size() - idx.mutable_input_nodes().size();
   }
   std::vector<bool>& save_inputs() {
@@ -489,27 +488,23 @@ class CachedOp {
   const std::unordered_set<uint32_t>& mutable_input_nodes() const {
     return fwd_graph_.indexed_graph().mutable_input_nodes();
   }
-  virtual std::vector<nnvm::NodeEntry> Gradient(
-      const nnvm::ObjectPtr& node,
-      const std::vector<nnvm::NodeEntry>& ograds) const;
-  virtual OpStatePtr Forward(
-      const std::shared_ptr<CachedOp>& op_ptr,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<NDArray*>& outputs,
-      const Context &default_context);
-  virtual void Backward(
-      const bool retain_graph,
-      const OpStatePtr& state,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<OpReqType>& reqs,
-      const std::vector<NDArray*>& outputs);
+  virtual std::vector<nnvm::NodeEntry> Gradient(const nnvm::ObjectPtr& node,
+                                                const std::vector<nnvm::NodeEntry>& ograds) const;
+  virtual OpStatePtr Forward(const std::shared_ptr<CachedOp>& op_ptr,
+                             const std::vector<NDArray*>& inputs,
+                             const std::vector<NDArray*>& outputs,
+                             const Context& default_context);
+  virtual void Backward(const bool retain_graph,
+                        const OpStatePtr& state,
+                        const std::vector<NDArray*>& inputs,
+                        const std::vector<OpReqType>& reqs,
+                        const std::vector<NDArray*>& outputs);
   // backward storage type inference
-  virtual bool BackwardStorageType(
-      const nnvm::NodeAttrs& attrs,
-      const int dev_mask,
-      DispatchMode* dispatch_mode,
-      std::vector<int> *in_attrs,
-      std::vector<int> *out_attrs);
+  virtual bool BackwardStorageType(const nnvm::NodeAttrs& attrs,
+                                   const int dev_mask,
+                                   DispatchMode* dispatch_mode,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs);
   std::vector<std::string> ListForwardInputNames() const {
     nnvm::Symbol sym = GetForwardSym();
     return sym.ListInputNames(nnvm::Symbol::kAll);
@@ -523,8 +518,7 @@ class CachedOp {
     sym.outputs = fwd_graph_.outputs;
     return sym;
   }
-  void RegisterOpHook(const CachedOp::CachedOpMonCallback& callback,
-                      bool monitor_all = false);
+  void RegisterOpHook(const CachedOp::CachedOpMonCallback& callback, bool monitor_all = false);
 
  protected:
   struct GraphInfo {
@@ -539,23 +533,32 @@ class CachedOp {
   };
 
   struct CachedOpState {
-    CachedOpState(const Context &context_, const nnvm::Graph &fwd_graph_,
-                  const nnvm::Graph &full_graph_, const bool inlining_) {
+    CachedOpState(const Context& context_,
+                  const nnvm::Graph& fwd_graph_,
+                  const nnvm::Graph& full_graph_,
+                  const bool inlining_) {
       context = context_;
       nnvm::Symbol sym;
       sym.outputs = fwd_graph_.outputs;
-      CreateFullGraph(sym.Copy(), &info.fwd_graph, &info.grad_graph,
-                      &info.full_graph, &info.ograd_entries,
+      CreateFullGraph(sym.Copy(),
+                      &info.fwd_graph,
+                      &info.grad_graph,
+                      &info.full_graph,
+                      &info.ograd_entries,
                       &info.fwd_input_to_grad_output);
 
-      OptimizeGraph(&info.full_graph, &info.fwd_graph, &info.grad_graph, &info.input_map,
-                    context_, fwd_graph_.outputs.size(), inlining_);
-
-      size_t max_nodes = info.full_graph.indexed_graph().num_nodes();
-      size_t max_entries = info.full_graph.indexed_graph().num_node_entries();
-      info.fwd_graph.attrs["context"] =
-          std::make_shared<dmlc::any>(std::vector<Context>(
-              info.fwd_graph.indexed_graph().num_nodes(), context));
+      OptimizeGraph(&info.full_graph,
+                    &info.fwd_graph,
+                    &info.grad_graph,
+                    &info.input_map,
+                    context_,
+                    fwd_graph_.outputs.size(),
+                    inlining_);
+
+      size_t max_nodes                = info.full_graph.indexed_graph().num_nodes();
+      size_t max_entries              = info.full_graph.indexed_graph().num_node_entries();
+      info.fwd_graph.attrs["context"] = std::make_shared<dmlc::any>(
+          std::vector<Context>(info.fwd_graph.indexed_graph().num_nodes(), context));
       info.full_graph.attrs["context"] =
           std::make_shared<dmlc::any>(std::vector<Context>(max_nodes, context));
 
@@ -572,15 +575,15 @@ class CachedOp {
     Context context;
     GraphInfo info;
 
-    bool recording = false;
-    bool fwd_alloc = false;
-    bool bwd_alloc = false;
+    bool recording     = false;
+    bool fwd_alloc     = false;
+    bool bwd_alloc     = false;
     bool fwd_exec_init = false;
     bool bwd_exec_init = false;
 
     std::vector<NDArray> buff;
-    std::vector<NDArray *> arrays;
-    std::vector<NDArray *> arrays_with_in_out;
+    std::vector<NDArray*> arrays;
+    std::vector<NDArray*> arrays_with_in_out;
     std::vector<OpReqType> array_reqs;
 
     std::vector<OpStatePtr> op_states;
@@ -593,59 +596,45 @@ class CachedOp {
   };
 
   OpStatePtr GetCachedOpState(const Context& ctx);
-  bool SetForwardGraph(
-      const Context& default_ctx,
-      GraphInfo* info,
-      const bool recording,
-      const std::vector<NDArray*>& inputs);
-  bool SetBackwardGraph(
-      GraphInfo* info,
-      const std::vector<OpReqType>& reqs,
-      const std::vector<NDArray*>& inputs,
-      bool detect_inplace_addto = false);
-  bool CheckDynamicShapeExists(
-      const Context& default_ctx,
-      const std::vector<NDArray*>& inputs,
-      bool erase_result);
-  void StaticAllocMemory(
-      const OpStatePtr& state_ptr,
-      bool recording,
-      bool keep_fwd);
-  void StaticInitExec(
-      const OpStatePtr& state_ptr,
-      bool recording,
-      bool keep_fwd);
-  void StaticRunOps(
-      const Context& default_ctx,
-      const nnvm::Graph& g,
-      const OpStatePtr& state_ptr,
-      const std::vector<NDArray *> &state_arrays,
-      size_t start_nid,
-      size_t end_nid);
-  OpStatePtr StaticForward(
-      const Context& default_ctx,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<NDArray*>& outputs);
+  bool SetForwardGraph(const Context& default_ctx,
+                       GraphInfo* info,
+                       const bool recording,
+                       const std::vector<NDArray*>& inputs);
+  bool SetBackwardGraph(GraphInfo* info,
+                        const std::vector<OpReqType>& reqs,
+                        const std::vector<NDArray*>& inputs,
+                        bool detect_inplace_addto = false);
+  bool CheckDynamicShapeExists(const Context& default_ctx,
+                               const std::vector<NDArray*>& inputs,
+                               bool erase_result);
+  void StaticAllocMemory(const OpStatePtr& state_ptr, bool recording, bool keep_fwd);
+  void StaticInitExec(const OpStatePtr& state_ptr, bool recording, bool keep_fwd);
+  void StaticRunOps(const Context& default_ctx,
+                    const nnvm::Graph& g,
+                    const OpStatePtr& state_ptr,
+                    const std::vector<NDArray*>& state_arrays,
+                    size_t start_nid,
+                    size_t end_nid);
+  OpStatePtr StaticForward(const Context& default_ctx,
+                           const std::vector<NDArray*>& inputs,
+                           const std::vector<NDArray*>& outputs);
   struct DynamicRuntime;
 
  private:
-  OpStatePtr DynamicForward(
-      const Context& default_ctx,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<NDArray*>& outputs,
-      bool use_naive_run = false);
-  void DynamicBackward(
-      const bool retain_graph,
-      const OpStatePtr& op_state,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<OpReqType>& reqs,
-      const std::vector<NDArray*>& outputs);
-  void StaticBackward(
-      const bool retain_graph,
-      const OpStatePtr& state_ptr,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<OpReqType>& reqs,
-      const std::vector<NDArray*>& outputs);
+  OpStatePtr DynamicForward(const Context& default_ctx,
+                            const std::vector<NDArray*>& inputs,
+                            const std::vector<NDArray*>& outputs,
+                            bool use_naive_run = false);
+  void DynamicBackward(const bool retain_graph,
+                       const OpStatePtr& op_state,
+                       const std::vector<NDArray*>& inputs,
+                       const std::vector<OpReqType>& reqs,
+                       const std::vector<NDArray*>& outputs);
+  void StaticBackward(const bool retain_graph,
+                      const OpStatePtr& state_ptr,
+                      const std::vector<NDArray*>& inputs,
+                      const std::vector<OpReqType>& reqs,
+                      const std::vector<NDArray*>& outputs);
   size_t BwdOriginalInput(const std::vector<size_t>& input_map, size_t new_i);
 
   CachedOpConfig config_;
@@ -662,11 +651,11 @@ class CachedOp {
   bool monitor_all_{false};
 
   std::mutex mutex_;
-  std::unordered_map<Context, std::vector<OpStatePtr> > cached_op_states_;
+  std::unordered_map<Context, std::vector<OpStatePtr>> cached_op_states_;
 
   friend class ::mxnet::io::LazyTransformDataset;
   nnvm::Symbol sym_;
-  std::vector<std::pair<std::string, std::string> > flags_;
+  std::vector<std::pair<std::string, std::string>> flags_;
 };
 
 struct CachedOp::DynamicRuntime {
diff --git a/src/imperative/cached_op_threadsafe.cc b/src/imperative/cached_op_threadsafe.cc
index 7d93eb84bd11..9ae0cb50ffe8 100644
--- a/src/imperative/cached_op_threadsafe.cc
+++ b/src/imperative/cached_op_threadsafe.cc
@@ -39,9 +39,7 @@ struct CachedOpThreadSafe::DynamicRuntime {
   std::vector<OpStatePtr> op_states;
 };
 
-OpStatePtr CachedOpThreadSafe::GetCachedOpState(
-    const Context& ctx) {
-
+OpStatePtr CachedOpThreadSafe::GetCachedOpState(const Context& ctx) {
   for (const auto& i : cached_op_states_[ctx]) {
     // only create one state per device when not using static memory
     if (!config_.static_alloc || i.unique()) {
@@ -55,26 +53,24 @@ OpStatePtr CachedOpThreadSafe::GetCachedOpState(
   return state_ptr;
 }
 
-
-CachedOpThreadSafe::CachedOpThreadSafe(const nnvm::Symbol& sym,
-                                       const std::vector<std::pair<std::string,
-                                       std::string> >& flags) : CachedOp(sym, flags) {
+CachedOpThreadSafe::CachedOpThreadSafe(
+    const nnvm::Symbol& sym,
+    const std::vector<std::pair<std::string, std::string>>& flags)
+    : CachedOp(sym, flags) {
   using namespace nnvm;
   using namespace imperative;
-  static const std::vector<const Op *> zero_ops{Op::Get("zeros_like"),
-                                                Op::Get("_zeros")};
+  static const std::vector<const Op*> zero_ops{Op::Get("zeros_like"), Op::Get("_zeros")};
   config_.Init(flags);
 
   if (config_.static_shape) {
-      CHECK(config_.static_alloc) << "static_alloc must be True when static_shape is True";
+    CHECK(config_.static_alloc) << "static_alloc must be True when static_shape is True";
   }
 
   // construct forward graph
   CreateForwardGraph(sym.Copy(), &fwd_graph_);
   SetForwardRefCounts(&fwd_graph_);
 
-  SetInputIndices(fwd_graph_, config_.param_indices,
-                  &config_.data_indices);
+  SetInputIndices(fwd_graph_, config_.param_indices, &config_.data_indices);
 }
 
 /*
@@ -88,10 +84,10 @@ OpStatePtr CachedOpThreadSafe::DynamicForward(const Context& default_ctx,
   using namespace imperative;
 
   auto state_ptr = GetCachedOpState(default_ctx);
-  auto op_state = OpStatePtr::Create<DynamicRuntime>();
-  auto &runtime = op_state.get_state<DynamicRuntime>();
+  auto op_state  = OpStatePtr::Create<DynamicRuntime>();
+  auto& runtime  = op_state.get_state<DynamicRuntime>();
   {
-    auto &state = state_ptr.get_state<CachedOpState>();
+    auto& state = state_ptr.get_state<CachedOpState>();
     // Need to lock the mutex on the state, this allows
     // for multi context push of ops to dependency engine.
     // SetForwardGraph runs infer passes on graphs as well
@@ -104,28 +100,28 @@ OpStatePtr CachedOpThreadSafe::DynamicForward(const Context& default_ctx,
     SetForwardGraph(default_ctx, &state.info, false, inputs);
     runtime.info.fwd_graph = state.info.fwd_graph;
   }
-  nnvm::Graph &g = runtime.info.fwd_graph;
-  const auto &idx = g.indexed_graph();
+  nnvm::Graph& g   = runtime.info.fwd_graph;
+  const auto& idx  = g.indexed_graph();
   size_t max_nodes = runtime.info.fwd_graph.indexed_graph().num_nodes();
   runtime.op_states.resize(max_nodes);
-  auto &states = runtime.op_states;
+  auto& states = runtime.op_states;
 
   // Allocate entries
   // This buff is thread local and used to store intermediate
   // nodes in the graph
   buff.resize(idx.num_node_entries());
   states.resize(idx.num_nodes());
-  std::vector<NDArray *> arrays;
+  std::vector<NDArray*> arrays;
   arrays.reserve(buff.size());
-  for (auto &buffered_array : buff) {
+  for (auto& buffered_array : buff) {
     arrays.push_back(&buffered_array);
   }
   std::vector<OpReqType> array_reqs(arrays.size(), kWriteTo);
-  const auto &dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
-  std::vector<uint32_t> ref_count = g.GetAttr<std::vector<uint32_t>>(
-      "forward_ref_count");
+  const auto& dispatch_modes      = g.GetAttr<DispatchModeVector>("dispatch_mode");
+  std::vector<uint32_t> ref_count = g.GetAttr<std::vector<uint32_t>>("forward_ref_count");
   for (size_t i = 0; i < idx.num_node_entries(); ++i) {
-    if (ref_count[i] == 0) array_reqs[i] = kNullOp;
+    if (ref_count[i] == 0)
+      array_reqs[i] = kNullOp;
   }
 
   const MemoryPlanVector& mem_plan = g.GetAttr<MemoryPlanVector>("forward_mem_plan");
@@ -140,8 +136,16 @@ OpStatePtr CachedOpThreadSafe::DynamicForward(const Context& default_ctx,
   // that.
   CreateGraphNDs(g, default_ctx, mem_plan, &array_reqs, &arrays);
   // Invokes operators in the graph in a topologically sorted manner
-  RunGraph(false, idx, arrays, 0, idx.num_nodes(), std::move(array_reqs),
-           std::move(ref_count), &states, dispatch_modes, false);
+  RunGraph(false,
+           idx,
+           arrays,
+           0,
+           idx.num_nodes(),
+           std::move(array_reqs),
+           std::move(ref_count),
+           &states,
+           dispatch_modes,
+           false);
   return op_state;
 }
 
@@ -165,10 +169,8 @@ OpStatePtr CachedOpThreadSafe::Forward(const std::shared_ptr<CachedOp>& op_ptr,
   for (size_t i = 0; i < inputs.size(); ++i) {
     CHECK_EQ(inputs[i]->ctx(), default_ctx)
         << "CachedOp requires all inputs to live on the same context. But "
-        << idx[idx.input_nodes()[0]].source->attrs.name
-        << " is on " << default_ctx << " while "
-        << idx[idx.input_nodes()[i]].source->attrs.name
-        << " is on " << inputs[i]->ctx();
+        << idx[idx.input_nodes()[0]].source->attrs.name << " is on " << default_ctx << " while "
+        << idx[idx.input_nodes()[i]].source->attrs.name << " is on " << inputs[i]->ctx();
   }
 
   int prev_bulk_size = Engine::Get()->set_bulk_size(config_.forward_bulk_size);
@@ -199,9 +201,9 @@ struct CachedOpThreadSafeActualState {
   }
 };
 OpStatePtr CreateCachedOpThreadSafeState(const NodeAttrs& attrs,
-                               Context ctx,
-                               const mxnet::ShapeVector& in_shapes,
-                               const std::vector<int>& in_types) {
+                                         Context ctx,
+                                         const mxnet::ShapeVector& in_shapes,
+                                         const std::vector<int>& in_types) {
   const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
   return OpStatePtr::Create<CachedOpThreadSafeActualState>(op);
 }
@@ -211,11 +213,11 @@ void CachedOpThreadSafeForward(const OpStatePtr& state_ptr,
                                const std::vector<NDArray>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<NDArray>& outputs) {
-  CachedOpThreadSafeActualState &s = state_ptr.get_state<CachedOpThreadSafeActualState>();
-  std::vector<NDArray> in_bufs = inputs;
-  std::vector<NDArray> out_bufs = outputs;
-  std::vector<NDArray *> in_ptrs(in_bufs.size());
-  std::vector<NDArray *> out_ptrs(out_bufs.size());
+  CachedOpThreadSafeActualState& s = state_ptr.get_state<CachedOpThreadSafeActualState>();
+  std::vector<NDArray> in_bufs     = inputs;
+  std::vector<NDArray> out_bufs    = outputs;
+  std::vector<NDArray*> in_ptrs(in_bufs.size());
+  std::vector<NDArray*> out_ptrs(out_bufs.size());
   for (size_t i = 0; i < in_ptrs.size(); i++)
     in_ptrs[i] = &in_bufs[i];
   for (size_t i = 0; i < out_ptrs.size(); i++)
@@ -226,7 +228,7 @@ void CachedOpThreadSafeForward(const OpStatePtr& state_ptr,
   CHECK(!ctx.is_train) << "Only inference use case supported with thread safe cached op";
   CHECK(inputs.size() > 0) << "thread safe cached op requires at least one input";
   Context default_ctx = inputs[0].ctx();
-  s.forward_state = s.op->Forward(nullptr, in_ptrs, out_ptrs, default_ctx);
+  s.forward_state     = s.op->Forward(nullptr, in_ptrs, out_ptrs, default_ctx);
   // The arrays in out_ptrs may be changed by CachedOp.
   // If it is, we need to copy data back.
   for (size_t i = 0; i < out_bufs.size(); i++)
@@ -253,64 +255,71 @@ void CachedOpThreadSafeParamParser(nnvm::NodeAttrs* attrs) {
 CachedOpThreadSafe::~CachedOpThreadSafe() = default;
 
 NNVM_REGISTER_OP(_CachedOpThreadSafe)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op->num_inputs();
-  })
-.set_num_outputs([](const NodeAttrs& attrs) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op->num_outputs();
-  })
-.set_attr_parser(CachedOpThreadSafeParamParser)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op->ListForwardInputNames();
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op->ListForwardOutputNames();
-  })
-.set_attr<FCreateOpState>("FCreateOpState", CreateCachedOpThreadSafeState)
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     mxnet::ShapeVector *in_shapes,
-     mxnet::ShapeVector *out_shapes) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op::DefaultSubgraphOpShapeHelper(op->GetForwardSym(), in_shapes, out_shapes);
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int> *in_types,
-     std::vector<int> *out_types) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op::DefaultSubgraphOpTypeHelper(op->GetForwardSym(), in_types, out_types);
-  })
-.set_attr<FInferStorageType>("FInferStorageType",
-  [](const nnvm::NodeAttrs& attrs,
-     const int dev_mask,
-     DispatchMode* dispatch_mode,
-     std::vector<int>* in_stypes,
-     std::vector<int>* out_stypes) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op::DefaultSubgraphOpStorageTypeHelper(op->GetForwardSym(),
-                                                  dev_mask, dispatch_mode,
-                                                  in_stypes, out_stypes);
-  })
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CachedOpThreadSafeForward)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CachedOpThreadSafeForward)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op::DefaultSubgraphOpMutableInputsHelper(op->GetForwardSym());
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-    const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
-    return op::DefaultSubgraphOpResourceRequestHelper(op->GetForwardSym());
-  })
-.set_attr<FExecType>("FExecType", op::DefaultSubgraphOpExecType)
-.add_argument("data", "NDArray-or-Symbol[]", "input data list");
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+      return op->num_inputs();
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+      return op->num_outputs();
+    })
+    .set_attr_parser(CachedOpThreadSafeParamParser)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const nnvm::NodeAttrs& attrs) {
+                                       const CachedOpThreadSafePtr& op =
+                                           nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+                                       return op->ListForwardInputNames();
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const nnvm::NodeAttrs& attrs) {
+                                        const CachedOpThreadSafePtr& op =
+                                            nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+                                        return op->ListForwardOutputNames();
+                                      })
+    .set_attr<FCreateOpState>("FCreateOpState", CreateCachedOpThreadSafeState)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_shapes,
+                                     mxnet::ShapeVector* out_shapes) {
+                                    const CachedOpThreadSafePtr& op =
+                                        nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+                                    return op::DefaultSubgraphOpShapeHelper(
+                                        op->GetForwardSym(), in_shapes, out_shapes);
+                                  })
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_types, std::vector<int>* out_types) {
+          const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+          return op::DefaultSubgraphOpTypeHelper(op->GetForwardSym(), in_types, out_types);
+        })
+    .set_attr<FInferStorageType>(
+        "FInferStorageType",
+        [](const nnvm::NodeAttrs& attrs,
+           const int dev_mask,
+           DispatchMode* dispatch_mode,
+           std::vector<int>* in_stypes,
+           std::vector<int>* out_stypes) {
+          const CachedOpThreadSafePtr& op = nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+          return op::DefaultSubgraphOpStorageTypeHelper(
+              op->GetForwardSym(), dev_mask, dispatch_mode, in_stypes, out_stypes);
+        })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CachedOpThreadSafeForward)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CachedOpThreadSafeForward)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     const CachedOpThreadSafePtr& op =
+                                         nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+                                     return op::DefaultSubgraphOpMutableInputsHelper(
+                                         op->GetForwardSym());
+                                   })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  const CachedOpThreadSafePtr& op =
+                                      nnvm::get<CachedOpThreadSafePtr>(attrs.parsed);
+                                  return op::DefaultSubgraphOpResourceRequestHelper(
+                                      op->GetForwardSym());
+                                })
+    .set_attr<FExecType>("FExecType", op::DefaultSubgraphOpExecType)
+    .add_argument("data", "NDArray-or-Symbol[]", "input data list");
 
 }  // namespace mxnet
diff --git a/src/imperative/cached_op_threadsafe.h b/src/imperative/cached_op_threadsafe.h
index 63521c7219e7..590f72dc12d0 100644
--- a/src/imperative/cached_op_threadsafe.h
+++ b/src/imperative/cached_op_threadsafe.h
@@ -30,12 +30,9 @@
 #include <unordered_map>
 #include "./cached_op.h"
 
-
-
 namespace mxnet {
 /*! \brief CachedOp Parameters*/
-struct CachedOpThreadSafeConfig
-    : public dmlc::Parameter<CachedOpThreadSafeConfig> {
+struct CachedOpThreadSafeConfig : public dmlc::Parameter<CachedOpThreadSafeConfig> {
   // keeping the config minimal
   // inlining, bulking, dynamic shapes, static allocing and shaping not
   // supported
@@ -49,21 +46,23 @@ struct CachedOpThreadSafeConfig
   bool static_shape;
   DMLC_DECLARE_PARAMETER(CachedOpThreadSafeConfig) {
     DMLC_DECLARE_FIELD(static_alloc)
-    .set_default(false)
-    .describe("Statically allocate memory to improve speed. "
-              "Memory usage may increase.");
+        .set_default(false)
+        .describe(
+            "Statically allocate memory to improve speed. "
+            "Memory usage may increase.");
     DMLC_DECLARE_FIELD(static_shape)
-    .set_default(false)
-    .describe("Optimize for invariant input shapes between iterations. "
-              "Must also set static_alloc to True. "
-              "Change of input shapes is still allowed but slower.");
+        .set_default(false)
+        .describe(
+            "Optimize for invariant input shapes between iterations. "
+            "Must also set static_alloc to True. "
+            "Change of input shapes is still allowed but slower.");
     DMLC_DECLARE_FIELD(forward_bulk_size)
-     .set_default(Imperative::BulkExecMaxNodeTrainFwd())
-     .describe("Segment size of bulk execution during dynamic forward");
+        .set_default(Imperative::BulkExecMaxNodeTrainFwd())
+        .describe("Segment size of bulk execution during dynamic forward");
     DMLC_DECLARE_FIELD(data_indices)
         .set_default(mxnet::Tuple<uint32_t>())
         .describe("Position of argument variables.");
-            DMLC_DECLARE_FIELD(param_indices)
+    DMLC_DECLARE_FIELD(param_indices)
         .set_default(mxnet::Tuple<uint32_t>())
         .describe("Position of parameters.");
   }
@@ -72,33 +71,29 @@ struct CachedOpThreadSafeConfig
 // Thread local buff to store internal states of the graph
 // Used in dynamic_forward
 #if DMLC_CXX11_THREAD_LOCAL
-    static thread_local std::vector<NDArray> buff;
+static thread_local std::vector<NDArray> buff;
 #else
-    static MX_THREAD_LOCAL std::vector<NDArray> buff;
+static MX_THREAD_LOCAL std::vector<NDArray> buff;
 #endif
 
-
-
 class CachedOpThreadSafe : public CachedOp {
  public:
-  CachedOpThreadSafe(
-      const nnvm::Symbol &sym,
-      const std::vector<std::pair<std::string, std::string>> &flags);
+  CachedOpThreadSafe(const nnvm::Symbol& sym,
+                     const std::vector<std::pair<std::string, std::string>>& flags);
   ~CachedOpThreadSafe();
   uint32_t num_inputs() const {
-      return fwd_graph_.indexed_graph().input_nodes().size();
+    return fwd_graph_.indexed_graph().input_nodes().size();
   }
   uint32_t num_outputs() const {
-      return fwd_graph_.outputs.size();
+    return fwd_graph_.outputs.size();
   }
   const std::unordered_set<uint32_t>& mutable_input_nodes() const {
     return fwd_graph_.indexed_graph().mutable_input_nodes();
   }
-  OpStatePtr Forward(
-      const std::shared_ptr<CachedOp>& op_ptr,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<NDArray*>& outputs,
-      const Context& default_ctx);
+  OpStatePtr Forward(const std::shared_ptr<CachedOp>& op_ptr,
+                     const std::vector<NDArray*>& inputs,
+                     const std::vector<NDArray*>& outputs,
+                     const Context& default_ctx);
   std::vector<std::string> ListForwardInputNames() const {
     nnvm::Symbol sym = GetForwardSym();
     return sym.ListInputNames(nnvm::Symbol::kAll);
@@ -114,6 +109,7 @@ class CachedOpThreadSafe : public CachedOp {
   }
 
   struct GraphInfo;
+
  private:
   struct DynamicRuntime;
 
diff --git a/src/imperative/eliminate_common_expr_pass.cc b/src/imperative/eliminate_common_expr_pass.cc
index bee1d159057b..0ef204cdeca6 100644
--- a/src/imperative/eliminate_common_expr_pass.cc
+++ b/src/imperative/eliminate_common_expr_pass.cc
@@ -37,10 +37,10 @@ namespace exec {
 
 namespace {
 
-using nnvm::Node;
-using nnvm::ObjectPtr;
 using nnvm::Graph;
 using nnvm::IndexedGraph;
+using nnvm::Node;
+using nnvm::ObjectPtr;
 
 // NodeInput holds the sufficient subset of NodeEntry fields for Node-input equality tests
 using NodeInput = std::pair<const Node*, uint32_t>;
@@ -61,15 +61,19 @@ std::vector<NodeInput> ConvertInputs(const std::vector<nnvm::NodeEntry>& inputs)
  * \brief Determine if two Nodes have equal function such that one Node can be eliminated.
  */
 bool NodeEqual(const Node* n, const Node* m) {
-  if (n->is_variable() || m->is_variable()) return false;
-  if (n->op() != m->op()) return false;
+  if (n->is_variable() || m->is_variable())
+    return false;
+  if (n->op() != m->op())
+    return false;
   // Nodes with different attributes are considered not identical,
   // though this may reject Node pairs that are in fact functionally the same.
-  if (n->attrs.dict != m->attrs.dict) return false;
+  if (n->attrs.dict != m->attrs.dict)
+    return false;
 
   // Ops that mutate inputs cannot be optimized out
   static auto& fmutate_inputs = Op::GetAttr<nnvm::FMutateInputs>("FMutateInputs");
-  if (fmutate_inputs.get(n->op(), nullptr) != nullptr) return false;
+  if (fmutate_inputs.get(n->op(), nullptr) != nullptr)
+    return false;
 
   // Stateful ops cannot be be equal to each other
   static auto& fstateful = Op::GetAttr<FCreateOpState>("FCreateOpState");
@@ -86,9 +90,9 @@ bool NodeEqual(const Node* n, const Node* m) {
   // Ops that require resource could ask for
   // random resource, so need to be explicitly marked
   // to be eligible
-  static auto& resource_request = Op::GetAttr<FResourceRequest>("FResourceRequest");
+  static auto& resource_request    = Op::GetAttr<FResourceRequest>("FResourceRequest");
   static auto& resource_request_ex = Op::GetAttr<FResourceRequestEx>("FResourceRequestEx");
-  const auto fresource_request = resource_request.get(n->op(), nullptr);
+  const auto fresource_request     = resource_request.get(n->op(), nullptr);
   if (fresource_request != nullptr) {
     const auto& requests = fresource_request(n->attrs);
     for (const auto& req : requests) {
@@ -97,7 +101,8 @@ bool NodeEqual(const Node* n, const Node* m) {
       }
     }
   }
-  if (resource_request_ex.get(n->op(), nullptr) != nullptr) return false;
+  if (resource_request_ex.get(n->op(), nullptr) != nullptr)
+    return false;
 
   return true;
 }
@@ -115,17 +120,18 @@ std::vector<std::pair<ObjectPtr, ObjectPtr> > GetCommonNodes(const Graph& g) {
   });
   // Now check for identical node ops within the node groups (having identical inputs)
   for (const auto& pair : grouped_nodes) {
-    auto &node_group = pair.second;  // Group of nodes that share the same vector of inputs
+    auto& node_group = pair.second;  // Group of nodes that share the same vector of inputs
     if (node_group.size() > 1) {
       std::unordered_set<size_t> visited;
       for (size_t i = 0; i < node_group.size(); ++i) {
-        if (visited.count(i)) continue;
+        if (visited.count(i))
+          continue;
         for (size_t j = i + 1; j < node_group.size(); ++j) {
           // If the two Nodes have equal function, then one Node (called the 'replaced') can
           // be eliminated in favor of the other Node (the 'src').
           if (NodeEqual(node_group[i]->get(), node_group[j]->get())) {
             visited.insert(j);
-            ObjectPtr src = *node_group[i];
+            ObjectPtr src      = *node_group[i];
             ObjectPtr replaced = *node_group[j];
             ret.emplace_back(src, replaced);
           }
@@ -141,20 +147,20 @@ std::vector<std::pair<ObjectPtr, ObjectPtr> > GetCommonNodes(const Graph& g) {
  */
 void EliminateCommonNodes(Graph* g,
                           const std::vector<std::pair<ObjectPtr, ObjectPtr> >& common_nodes) {
-  for (const auto &p : common_nodes) {
-    std::vector <ObjectPtr> nodes_to_change;
-    const ObjectPtr &src = p.first;
-    const ObjectPtr &replaced = p.second;
+  for (const auto& p : common_nodes) {
+    std::vector<ObjectPtr> nodes_to_change;
+    const ObjectPtr& src      = p.first;
+    const ObjectPtr& replaced = p.second;
     // Create a `nodes_to_change` list containing the Nodes that refer to the `replaced` Node
     // that is targeted for elimination.
-    DFSVisit(g->outputs, [replaced, &nodes_to_change](const ObjectPtr &n) {
-      for (const auto &dep : n->control_deps) {
+    DFSVisit(g->outputs, [replaced, &nodes_to_change](const ObjectPtr& n) {
+      for (const auto& dep : n->control_deps) {
         if (dep == replaced) {
           nodes_to_change.push_back(n);
           return;
         }
       }
-      for (const auto &inp : n->inputs) {
+      for (const auto& inp : n->inputs) {
         if (inp.node == replaced) {
           nodes_to_change.push_back(n);
           return;
@@ -164,13 +170,13 @@ void EliminateCommonNodes(Graph* g,
 
     // Change references to the `replaced` Node within the `nodes_to_change` list to be
     // references to the equivalent `src` Node.
-    for (auto &n : nodes_to_change) {
-      for (auto &dep : n->control_deps) {
+    for (auto& n : nodes_to_change) {
+      for (auto& dep : n->control_deps) {
         if (dep == replaced) {
           dep = src;
         }
       }
-      for (auto &inp : n->inputs) {
+      for (auto& inp : n->inputs) {
         if (inp.node == replaced) {
           inp.node = src;
         }
@@ -178,7 +184,7 @@ void EliminateCommonNodes(Graph* g,
     }
 
     // Add `replaced` Node control dependencies to those of the `src` Node.
-    for (const auto &n : replaced->control_deps) {
+    for (const auto& n : replaced->control_deps) {
       src->control_deps.push_back(n);
     }
 
@@ -193,7 +199,7 @@ void EliminateCommonNodes(Graph* g,
   // insert Copy nodes as appropriate
   const Op* copy_op = Op::Get("_copy");
   nnvm::NodeEntryMap<size_t> unique_outputs;
-  for (auto & output : g->outputs) {
+  for (auto& output : g->outputs) {
     auto kv = unique_outputs.find(output);
     if (kv == unique_outputs.end()) {
       unique_outputs.emplace(output, 0);
@@ -202,7 +208,7 @@ void EliminateCommonNodes(Graph* g,
       std::ostringstream os;
       os << kv->first.node->attrs.name << "_" << kv->second << "_copy";
       kv->second++;
-      copy_node->attrs.op = copy_op;
+      copy_node->attrs.op   = copy_op;
       copy_node->attrs.name = os.str();
       copy_node->inputs.emplace_back(kv->first);
       output = nnvm::NodeEntry{copy_node, 0, 0};
diff --git a/src/imperative/exec_pass.h b/src/imperative/exec_pass.h
index 341f5109ebdd..440fc6b937ca 100644
--- a/src/imperative/exec_pass.h
+++ b/src/imperative/exec_pass.h
@@ -41,33 +41,32 @@ namespace mxnet {
 namespace exec {
 
 template <typename Attr>
-using FAccessSubgraphAttr = std::function<std::tuple<const nnvm::ObjectPtr,
-                                          std::vector<Attr>,
-                                          std::vector<Attr>>
-                              (const NodeAttrs& attrs)>;
+using FAccessSubgraphAttr =
+    std::function<std::tuple<const nnvm::ObjectPtr, std::vector<Attr>, std::vector<Attr>>(
+        const NodeAttrs& attrs)>;
 
-using FAccessSubgraphShape = FAccessSubgraphAttr<mxnet::TShape>;
-using FAccessSubgraphType = FAccessSubgraphAttr<int>;
+using FAccessSubgraphShape       = FAccessSubgraphAttr<mxnet::TShape>;
+using FAccessSubgraphType        = FAccessSubgraphAttr<int>;
 using FAccessSubgraphStorageType = FAccessSubgraphAttr<int>;
 
 template <typename Attr>
-using FProvideSubgraphAttr = std::function<void (const NodeAttrs& attrs,
-                                                 const std::vector<nnvm::ObjectPtr> &nodes,
-                                                 const std::vector<std::vector<Attr>> &in_attrs,
-                                                 const std::vector<std::vector<Attr>> &out_attrs)>;
-using FProvideSubgraphShape = FProvideSubgraphAttr<mxnet::TShape>;
-using FProvideSubgraphType = FProvideSubgraphAttr<int>;
+using FProvideSubgraphAttr        = std::function<void(const NodeAttrs& attrs,
+                                                const std::vector<nnvm::ObjectPtr>& nodes,
+                                                const std::vector<std::vector<Attr>>& in_attrs,
+                                                const std::vector<std::vector<Attr>>& out_attrs)>;
+using FProvideSubgraphShape       = FProvideSubgraphAttr<mxnet::TShape>;
+using FProvideSubgraphType        = FProvideSubgraphAttr<int>;
 using FProvideSubgraphStorageType = FProvideSubgraphAttr<int>;
 
-using TIsFusion = bool;
+using TIsFusion       = bool;
 using TIsFusionHelper = bool;
 
 /*! \brief reuse graph definition */
 using nnvm::Graph;
 
-const int kBadStorageID = -1;
+const int kBadStorageID      = -1;
 const int kExternalStorageID = -2;
-const int kDynamicStorageID = -3;
+const int kDynamicStorageID  = -3;
 
 const int kNonDefaultStorage = -2;
 
@@ -120,7 +119,7 @@ class OpExecutor {
  * \brief per node vector of operator executors.
  * \note stored under attribute "op_exec"
  */
-using OpExecVector = std::vector<std::shared_ptr<OpExecutor> >;
+using OpExecVector = std::vector<std::shared_ptr<OpExecutor>>;
 
 /*!
  * \brief per node vector of operator states.
@@ -201,7 +200,7 @@ Graph DetectInplaceAddTo(Graph g);
  *
  * \return graph with common expressions eliminated
  */
-Graph EliminateCommonExpr(Graph && g);
+Graph EliminateCommonExpr(Graph&& g);
 
 /*!
  * \brief Fuse pointwise operations in the graph.
@@ -241,7 +240,7 @@ Graph InferShape(Graph&& graph,
  *         The index of ShapeVector is given by graph.indexed_graph().entry_id.
  */
 Graph InferType(Graph&& graph,
-                nnvm::DTypeVector&& dtype_inputs = nnvm::DTypeVector(),
+                nnvm::DTypeVector&& dtype_inputs  = nnvm::DTypeVector(),
                 const std::string& dtype_attr_key = "");
 
 /*!
@@ -254,7 +253,7 @@ Graph InferType(Graph&& graph,
  *         The index of StorageTypeVector is given by graph.indexed_graph().entry_id.
  */
 Graph InferStorageType(Graph&& graph,
-                       StorageTypeVector&& storage_type_inputs = StorageTypeVector(),
+                       StorageTypeVector&& storage_type_inputs  = StorageTypeVector(),
                        const std::string& storage_type_attr_key = "");
 
 }  // namespace exec
@@ -284,16 +283,16 @@ inline Graph MXGradient(
     std::vector<NodeEntry> xs,
     std::vector<NodeEntry> ys_out_grad,
     std::function<NodeEntry(std::vector<NodeEntry>&& inputs)> aggregate_fun = nullptr,
-    std::function<int(const Node& node)> mirror_fun = nullptr,
-    std::vector<const Op*> zero_ops = std::vector<const Op*>(),
-    std::string copy_op_str = std::string(),
+    std::function<int(const Node& node)> mirror_fun                         = nullptr,
+    std::vector<const Op*> zero_ops  = std::vector<const Op*>(),
+    std::string copy_op_str          = std::string(),
     mxnet::ShapeVector in_arg_shapes = mxnet::ShapeVector(),
-    DTypeVector in_arg_dtypes = DTypeVector()) {
-  graph.attrs["grad_ys"] = std::make_shared<any>(std::move(ys));
-  graph.attrs["grad_xs"] = std::make_shared<any>(std::move(xs));
+    DTypeVector in_arg_dtypes        = DTypeVector()) {
+  graph.attrs["grad_ys"]          = std::make_shared<any>(std::move(ys));
+  graph.attrs["grad_xs"]          = std::make_shared<any>(std::move(xs));
   graph.attrs["grad_ys_out_grad"] = std::make_shared<any>(std::move(ys_out_grad));
-  graph.attrs["in_arg_shapes"] = std::make_shared<any>(std::move(in_arg_shapes));
-  graph.attrs["in_arg_dtypes"] = std::make_shared<any>(std::move(in_arg_dtypes));
+  graph.attrs["in_arg_shapes"]    = std::make_shared<any>(std::move(in_arg_shapes));
+  graph.attrs["in_arg_dtypes"]    = std::make_shared<any>(std::move(in_arg_dtypes));
 
   if (aggregate_fun != nullptr) {
     graph.attrs["grad_aggregate_fun"] = std::make_shared<any>(aggregate_fun);
diff --git a/src/imperative/imperative.cc b/src/imperative/imperative.cc
index a42a60b919fe..0ec5ae579dce 100644
--- a/src/imperative/imperative.cc
+++ b/src/imperative/imperative.cc
@@ -25,19 +25,19 @@
 #include "./cached_op.h"
 
 namespace nnvm {
-ObjectPtr CreateVariableNode(const std::string &name);
+ObjectPtr CreateVariableNode(const std::string& name);
 }
 
 namespace mxnet {
 #if DMLC_CXX11_THREAD_LOCAL
-thread_local bool Imperative::is_train_ = false;
-thread_local bool Imperative::is_recording_ = false;
-thread_local bool Imperative::is_deferred_compute_ = false;
+thread_local bool Imperative::is_train_                 = false;
+thread_local bool Imperative::is_recording_             = false;
+thread_local bool Imperative::is_deferred_compute_      = false;
 thread_local bool Imperative::is_np_shape_thread_local_ = false;
 #else
-MX_THREAD_LOCAL bool Imperative::is_train_ = false;
-MX_THREAD_LOCAL bool Imperative::is_recording_ = false;
-MX_THREAD_LOCAL bool Imperative::is_deferred_compute_ = false;
+MX_THREAD_LOCAL bool Imperative::is_train_                 = false;
+MX_THREAD_LOCAL bool Imperative::is_recording_             = false;
+MX_THREAD_LOCAL bool Imperative::is_deferred_compute_      = false;
 MX_THREAD_LOCAL bool Imperative::is_np_shape_thread_local_ = false;
 #endif
 
@@ -46,60 +46,66 @@ Imperative* Imperative::Get() {
   return &inst;
 }
 
-OpStatePtr Imperative::InvokeOp(
-    const Context& ctx,
-    const nnvm::NodeAttrs& attrs,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs,
-    const std::vector<OpReqType>& req,
-    const DispatchMode dispatch_mode,
-    OpStatePtr state) {
+OpStatePtr Imperative::InvokeOp(const Context& ctx,
+                                const nnvm::NodeAttrs& attrs,
+                                const std::vector<NDArray*>& inputs,
+                                const std::vector<NDArray*>& outputs,
+                                const std::vector<OpReqType>& req,
+                                const DispatchMode dispatch_mode,
+                                OpStatePtr state) {
   using namespace imperative;
-  static auto& createop = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
+  static auto& createop          = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
   static auto& is_layer_backward = Op::GetAttr<bool>("TIsLayerOpBackward");
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  MXAPIThreadLocalEntry<>* ret   = MXAPIThreadLocalStore<>::Get();
 
-  const nnvm::Op *op = attrs.op;
+  const nnvm::Op* op = attrs.op;
 
   std::vector<engine::VarHandle> read_vars, write_vars;
   std::vector<Resource> requested;
   std::vector<uint32_t> mutate_idx;
-  SetDependency(attrs, ctx, inputs, outputs,
-      &read_vars, &write_vars, &requested, &mutate_idx, dispatch_mode);
+  SetDependency(
+      attrs, ctx, inputs, outputs, &read_vars, &write_vars, &requested, &mutate_idx, dispatch_mode);
 
-  FCompute fn = common::GetFCompute<FCompute>(op, "FCompute", ctx);
+  FCompute fn      = common::GetFCompute<FCompute>(op, "FCompute", ctx);
   FComputeEx fn_ex = common::GetFCompute<FComputeEx>(op, "FComputeEx", ctx);
 
   // FComputeEx is dispatched only when dispatch_mode is DispatchMode::kFComputeEx
   CHECK(dispatch_mode != DispatchMode::kUndefined);
   bool dispatch_fcompex = dispatch_mode == DispatchMode::kFComputeEx;
   if (fn_ex && dispatch_fcompex) {
-    PushFComputeEx(fn_ex, op, attrs, ctx, read_vars, write_vars,
-        requested, inputs, outputs, req);
+    PushFComputeEx(fn_ex, op, attrs, ctx, read_vars, write_vars, requested, inputs, outputs, req);
   } else if (fn) {
-    PushFCompute(fn, op, attrs, ctx, read_vars, write_vars,
-        requested, inputs, outputs, mutate_idx, req);
+    PushFCompute(
+        fn, op, attrs, ctx, read_vars, write_vars, requested, inputs, outputs, mutate_idx, req);
   } else if (createop.count(op) || is_layer_backward.get(op, false)) {
     if (!state) {
       state = createop[op](attrs, ctx, ret->arg_shapes, ret->arg_types);
     }
     write_vars.push_back(state.get_var());
-    PushOperator(state, op, attrs, ctx, read_vars, write_vars,
-        requested, inputs, outputs, mutate_idx, req, dispatch_mode);
+    PushOperator(state,
+                 op,
+                 attrs,
+                 ctx,
+                 read_vars,
+                 write_vars,
+                 requested,
+                 inputs,
+                 outputs,
+                 mutate_idx,
+                 req,
+                 dispatch_mode);
   } else {
-    LOG(FATAL)
-      << "Operator " << op->name << " is not implemented for "
-      << (ctx.dev_mask() == gpu::kDevMask ? "GPU." : "CPU.");
+    LOG(FATAL) << "Operator " << op->name << " is not implemented for "
+               << (ctx.dev_mask() == gpu::kDevMask ? "GPU." : "CPU.");
   }
 
   return state;
 }
 
-OpStatePtr Imperative::Invoke(
-    const Context& default_ctx,
-    const nnvm::NodeAttrs& attrs,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs) {
+OpStatePtr Imperative::Invoke(const Context& default_ctx,
+                              const nnvm::NodeAttrs& attrs,
+                              const std::vector<NDArray*>& inputs,
+                              const std::vector<NDArray*>& outputs) {
   using namespace imperative;
   static auto& ndfunc = nnvm::Op::GetAttr<FNDArrayFunction>("FNDArrayFunction");
 
@@ -107,13 +113,14 @@ OpStatePtr Imperative::Invoke(
     std::vector<NDArray> p_inputs, p_outputs;
     DerefInputOutput(inputs, outputs, &p_inputs, &p_outputs);
     ndfunc[attrs.op](attrs, p_inputs, &p_outputs);
-    for (size_t i = 0; i < outputs.size(); ++i) *outputs[i] = std::move(p_outputs[i]);
+    for (size_t i = 0; i < outputs.size(); ++i)
+      *outputs[i] = std::move(p_outputs[i]);
     return OpStatePtr();
   }
 
   // TODO(piiswrong): infer ctx
   DispatchMode dispatch_mode = DispatchMode::kUndefined;
-  Context ctx = GetContext(attrs, inputs, outputs, default_ctx);
+  Context ctx                = GetContext(attrs, inputs, outputs, default_ctx);
   SetShapeType(ctx, attrs, inputs, outputs, &dispatch_mode);
   std::vector<OpReqType> req;
   SetWriteInplaceReq(inputs, outputs, &req);
@@ -131,37 +138,35 @@ OpStatePtr Imperative::Invoke(
 
 // Create nnvm::NodeEntry for variables' and gradients' autograd_entry_
 // attribute and associate AGInfo with it's info attribute
-void Imperative::MarkVariables(
-    const std::vector<NDArray*>& variables,
-    const std::vector<uint32_t>& grad_reqs,
-    const std::vector<NDArray*>& gradients) {
+void Imperative::MarkVariables(const std::vector<NDArray*>& variables,
+                               const std::vector<uint32_t>& grad_reqs,
+                               const std::vector<NDArray*>& gradients) {
   for (uint32_t i = 0; i < variables.size(); ++i) {
     std::string str_c(std::to_string(variable_count_++));
 
-    variables[i]->autograd_entry_ = nnvm::NodeEntry{
-        nnvm::Symbol::CreateVariable("var" + str_c).outputs[0].node, 0, 0};
+    variables[i]->autograd_entry_ =
+        nnvm::NodeEntry{nnvm::Symbol::CreateVariable("var" + str_c).outputs[0].node, 0, 0};
     AGInfo& info = AGInfo::Create(variables[i]->autograd_entry_.node);
     info.outputs.emplace_back(variables[i]->Detach());
     info.out_grads.emplace_back(gradients[i]->Detach());
     info.grad_req = static_cast<OpReqType>(grad_reqs[i]);
-    info.ctx = variables[i]->ctx();
+    info.ctx      = variables[i]->ctx();
 
-    gradients[i]->autograd_entry_ = nnvm::NodeEntry{
-        nnvm::Symbol::CreateVariable("grad" + str_c).outputs[0].node, 0, 0};
+    gradients[i]->autograd_entry_ =
+        nnvm::NodeEntry{nnvm::Symbol::CreateVariable("grad" + str_c).outputs[0].node, 0, 0};
     AGInfo& grad_info = AGInfo::Create(gradients[i]->autograd_entry_.node);
     grad_info.outputs.emplace_back(gradients[i]->Detach());
     grad_info.ctx = gradients[i]->ctx();
   }
 }
 
-
-void Imperative::GetBackwardDependency(
-    const nnvm::ObjectPtr& node,
-    uint32_t num_inputs, uint32_t num_outputs,
-    std::vector<bool> *p_save_inputs,
-    std::vector<bool> *p_save_outputs) {
-  static auto& fgradient = nnvm::Op::GetAttr<nnvm::FGradient>("FGradient");
-  std::vector<bool>& save_inputs = *p_save_inputs;
+void Imperative::GetBackwardDependency(const nnvm::ObjectPtr& node,
+                                       uint32_t num_inputs,
+                                       uint32_t num_outputs,
+                                       std::vector<bool>* p_save_inputs,
+                                       std::vector<bool>* p_save_outputs) {
+  static auto& fgradient          = nnvm::Op::GetAttr<nnvm::FGradient>("FGradient");
+  std::vector<bool>& save_inputs  = *p_save_inputs;
   std::vector<bool>& save_outputs = *p_save_outputs;
   save_inputs.resize(num_inputs);
   save_outputs.resize(num_outputs);
@@ -189,50 +194,52 @@ void Imperative::GetBackwardDependency(
       }
     }
     DFSVisit(igrad_entries, [&](const nnvm::ObjectPtr& gnode) {
-        if (!gnode || gnode == node) return;
-        for (const auto& i : gnode->inputs) {
-          if (i.node == nullptr && i.version == 0) {
-            save_inputs[i.index] = true;
-          } else if (i.node == node) {
-            save_outputs[i.index] = true;
-          }
+      if (!gnode || gnode == node)
+        return;
+      for (const auto& i : gnode->inputs) {
+        if (i.node == nullptr && i.version == 0) {
+          save_inputs[i.index] = true;
+        } else if (i.node == node) {
+          save_outputs[i.index] = true;
         }
-      });
+      }
+    });
   }
 }
 
-void Imperative::RecordOp(
-    nnvm::NodeAttrs&& attrs,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs,
-    const OpStatePtr& state,
-    std::vector<bool>* p_save_inputs,
-    std::vector<bool>* p_save_outputs) {
-  MXAPIThreadLocalEntry<> *local_buff = MXAPIThreadLocalStore<>::Get();
+void Imperative::RecordOp(nnvm::NodeAttrs&& attrs,
+                          const std::vector<NDArray*>& inputs,
+                          const std::vector<NDArray*>& outputs,
+                          const OpStatePtr& state,
+                          std::vector<bool>* p_save_inputs,
+                          std::vector<bool>* p_save_outputs) {
+  MXAPIThreadLocalEntry<>* local_buff = MXAPIThreadLocalStore<>::Get();
 
   CHECK(!is_deferred_compute())
       << "Autograd recording is not supported during deferred compute mode.";
 
   for (auto output : outputs) {
     CHECK(AGInfo::IsNone(*output))
-      << "Assigning to NDArrays that are already in a computational graph "
-      << "will cause undefined behavior when evaluating gradients. "
-      << "Please call backward first to clear the graph or do this out side of "
-      << "a record section. Also note that you cannot use inplace operations "
-      << "like +=, *=, relu(x, out=x), y[idx]=x, etc inside a record section. "
-      << "Issue occurred while recording op: " << attrs.name;
+        << "Assigning to NDArrays that are already in a computational graph "
+        << "will cause undefined behavior when evaluating gradients. "
+        << "Please call backward first to clear the graph or do this out side of "
+        << "a record section. Also note that you cannot use inplace operations "
+        << "like +=, *=, relu(x, out=x), y[idx]=x, etc inside a record section. "
+        << "Issue occurred while recording op: " << attrs.name;
   }
 
   bool need_grad = false;
   for (const auto& i : inputs) {
-    if (AGInfo::IsNone(*i)) continue;
+    if (AGInfo::IsNone(*i))
+      continue;
     need_grad = true;
     break;
   }
-  if (!need_grad) return;
+  if (!need_grad)
+    return;
 
   nnvm::ObjectPtr node = nnvm::Node::Create();
-  node->attrs = std::move(attrs);
+  node->attrs          = std::move(attrs);
   // if node name is empty or node name is equal to op name - name it with unique name
   if (node->attrs.name == "" || node->attrs.op->name == node->attrs.name) {
     node->attrs.name = "node_" + std::to_string(node_count_++);
@@ -240,39 +247,40 @@ void Imperative::RecordOp(
     node_count_++;
   }
   AGInfo& info = AGInfo::Create(node);
-  info.state = state;
-  info.ctx = outputs[0]->ctx();
+  info.state   = state;
+  info.ctx     = outputs[0]->ctx();
 
   if (p_save_inputs == nullptr) {
-    p_save_inputs = &(local_buff->save_inputs);
+    p_save_inputs  = &(local_buff->save_inputs);
     p_save_outputs = &(local_buff->save_outputs);
-    GetBackwardDependency(
-        node, inputs.size(), outputs.size(), p_save_inputs, p_save_outputs);
+    GetBackwardDependency(node, inputs.size(), outputs.size(), p_save_inputs, p_save_outputs);
   } else {
     node->inputs.resize(inputs.size());
   }
 
-  std::vector<bool>& save_inputs = *p_save_inputs;
+  std::vector<bool>& save_inputs  = *p_save_inputs;
   std::vector<bool>& save_outputs = *p_save_outputs;
 
   for (size_t i = 0; i < inputs.size(); ++i) {
     if (AGInfo::IsNone(*(inputs[i]))) {
-      nnvm::NodeEntry entry{nnvm::Symbol::CreateVariable(
-          "null" + std::to_string(variable_count_++)).outputs[0].node, 0, 0};
+      nnvm::NodeEntry entry{
+          nnvm::Symbol::CreateVariable("null" + std::to_string(variable_count_++)).outputs[0].node,
+          0,
+          0};
       AGInfo& input_info = AGInfo::Create(entry.node);
-      input_info.ctx = inputs[i]->ctx();
+      input_info.ctx     = inputs[i]->ctx();
       if (save_inputs[i]) {
         input_info.outputs.emplace_back(*inputs[i]);
       } else {
         // Put a dummy array here since it will not be used.
         input_info.outputs.emplace_back();
-        input_info.outputs.back().shape_ = inputs[i]->shape();
-        input_info.outputs.back().dtype_ = inputs[i]->dtype();
+        input_info.outputs.back().shape_        = inputs[i]->shape();
+        input_info.outputs.back().dtype_        = inputs[i]->dtype();
         input_info.outputs.back().storage_type_ = inputs[i]->storage_type();
       }
       inputs[i]->autograd_entry_ = std::move(entry);  // assign last to prevent cyclic reference
     } else if (save_inputs[i]) {
-      nnvm::NodeEntry& entry = inputs[i]->autograd_entry_;
+      nnvm::NodeEntry& entry                       = inputs[i]->autograd_entry_;
       AGInfo::Get(entry.node).outputs[entry.index] = inputs[i]->Detach();
     }
     node->inputs[i] = inputs[i]->autograd_entry_;
@@ -290,38 +298,38 @@ void Imperative::RecordOp(
     } else {
       // Put a dummy array here since it will not be used.
       info.outputs.emplace_back();
-      info.outputs.back().shape_ = outputs[i]->shape();
-      info.outputs.back().dtype_ = outputs[i]->dtype();
+      info.outputs.back().shape_        = outputs[i]->shape();
+      info.outputs.back().dtype_        = outputs[i]->dtype();
       info.outputs.back().storage_type_ = outputs[i]->storage_type();
     }
     outputs[i]->autograd_entry_ = nnvm::NodeEntry{node, i, 0};
   }
 }
 
-void Imperative::RecordDeferredCompute(nnvm::NodeAttrs &&attrs,
-                                       const std::vector<NDArray *> &inputs,
-                                       const std::vector<NDArray *> &outputs) {
+void Imperative::RecordDeferredCompute(nnvm::NodeAttrs&& attrs,
+                                       const std::vector<NDArray*>& inputs,
+                                       const std::vector<NDArray*>& outputs) {
   CHECK(!is_recording())
       << "MXNetError: Autograd recording is not supported during deferred compute mode.";
 
-  for (const NDArray *input : inputs) {
+  for (const NDArray* input : inputs) {
     CHECK(!DCInfo::IsNone(*input))
         << "ValueError: All inputs to deferred compute recording must be associated "
         << "with a symbolic variable or be the output of a deferred compute operator.";
   }
-  for (const NDArray *output : outputs) {
+  for (const NDArray* output : outputs) {
     CHECK(DCInfo::IsNone(*output))
         << "NotImplementedError: Inplace operations (+=, -=, x[:]=, etc) "
         << "are not supported when recording in deferred compute mode.";
   }
   DispatchMode dispatch_mode = DispatchMode::kUndefined;
-  Context ctx = imperative::GetContext(attrs, inputs, outputs, Context::CPU());
+  Context ctx                = imperative::GetContext(attrs, inputs, outputs, Context::CPU());
   imperative::SetShapeType(ctx, attrs, inputs, outputs, &dispatch_mode);
 
   nnvm::ObjectPtr node = nnvm::Node::Create();
   node->inputs.reserve(inputs.size());
   // Get NodeEntries for inputs
-  for (const NDArray *array : inputs) {
+  for (const NDArray* array : inputs) {
     CHECK(array->deferredcompute_entry_.node);  // Must not be nullptr
     node->inputs.emplace_back(array->deferredcompute_entry_);
   }
@@ -341,10 +349,10 @@ void Imperative::RecordDeferredCompute(nnvm::NodeAttrs &&attrs,
   DCInfo::Create(node, inputs, outputs);
 }
 
-nnvm::Symbol Imperative::GetDeferredComputeSymbol(const std::vector<NDArray *> &outputs) {
+nnvm::Symbol Imperative::GetDeferredComputeSymbol(const std::vector<NDArray*>& outputs) {
   nnvm::Symbol s;
   s.outputs.reserve(outputs.size());
-  for (NDArray * ndoutput : outputs) {
+  for (NDArray* ndoutput : outputs) {
     CHECK(!Imperative::DCInfo::IsNone(*ndoutput))
         << "ValueError: output_arrays for GetDeferredComputeSymbol "
         << "must have a deferred compute history associated with them.";
@@ -353,16 +361,16 @@ nnvm::Symbol Imperative::GetDeferredComputeSymbol(const std::vector<NDArray *> &
   return s.Copy();
 }
 
-void Imperative::SetDeferredComputeVariable(NDArrayHandle *arrays,
-                                            SymbolHandle *variables, const int num) {
+void Imperative::SetDeferredComputeVariable(NDArrayHandle* arrays,
+                                            SymbolHandle* variables,
+                                            const int num) {
   // Sanity check all inputs
   for (int i = 0; i < num; i++) {
-    nnvm::Symbol *s = reinterpret_cast<nnvm::Symbol *>(variables[i]);
-    NDArray *nd = reinterpret_cast<NDArray *>(arrays[i]);
+    nnvm::Symbol* s = reinterpret_cast<nnvm::Symbol*>(variables[i]);
+    NDArray* nd     = reinterpret_cast<NDArray*>(arrays[i]);
     CHECK_EQ(s->outputs.size(), 1)
         << "MXNDArraySetDeferredComputeVariable expects variables as input. "
-        << "Instead got a Symbol with " << s->outputs.size()
-        << " outputs as input " << i;
+        << "Instead got a Symbol with " << s->outputs.size() << " outputs as input " << i;
     CHECK(s->outputs[0].node->is_variable())
         << "MXNDArraySetDeferredComputeVariable expects variables as input. "
         << "Instead got a Symbol associated with an operator as input " << i;
@@ -373,22 +381,22 @@ void Imperative::SetDeferredComputeVariable(NDArrayHandle *arrays,
 
   // Store variables in DCInfo of arrays
   for (int i = 0; i < num; i++) {
-    nnvm::Symbol *s = reinterpret_cast<nnvm::Symbol *>(variables[i]);
-    NDArray *nd = reinterpret_cast<NDArray *>(arrays[i]);
+    nnvm::Symbol* s            = reinterpret_cast<nnvm::Symbol*>(variables[i]);
+    NDArray* nd                = reinterpret_cast<NDArray*>(arrays[i]);
     nd->deferredcompute_entry_ = nnvm::NodeEntry{s->outputs[0].node, 0, 0};
 
-    std::vector<NDArray *> inputs;
-    std::vector<NDArray *> outputs;  // No need to specify outputs, as we will set is_computed_
+    std::vector<NDArray*> inputs;
+    std::vector<NDArray*> outputs;  // No need to specify outputs, as we will set is_computed_
     Imperative::DCInfo& info = Imperative::DCInfo::Create(s->outputs[0].node, inputs, outputs);
-    info.is_computed_ = true;
+    info.is_computed_        = true;
   }
 }
 
-void Imperative::DeferredComputeClear(NDArrayHandle *arrays, const int num) {
+void Imperative::DeferredComputeClear(NDArrayHandle* arrays, const int num) {
   std::vector<nnvm::NodeEntry> outputs;
   outputs.reserve(num);
   for (int i = 0; i < num; i++) {
-    NDArray *nd = reinterpret_cast<NDArray *>(arrays[i]);
+    NDArray* nd = reinterpret_cast<NDArray*>(arrays[i]);
     outputs.emplace_back(nd->deferredcompute_entry_);
   }
   nnvm::DFSVisit(outputs, [&](const nnvm::ObjectPtr& n) {
@@ -402,12 +410,12 @@ void Imperative::DeferredComputeClear(NDArrayHandle *arrays, const int num) {
   });
 }
 
-std::vector<NDArray*> Imperative::Backward(
-    const std::vector<NDArray*>& outputs,
-    const std::vector<NDArray*>& ograds,
-    const std::vector<NDArray*>& variables,
-    bool is_train, bool retain_graph,
-    bool create_graph) {
+std::vector<NDArray*> Imperative::Backward(const std::vector<NDArray*>& outputs,
+                                           const std::vector<NDArray*>& ograds,
+                                           const std::vector<NDArray*>& variables,
+                                           bool is_train,
+                                           bool retain_graph,
+                                           bool create_graph) {
   using namespace nnvm;
   using namespace imperative;
   static const std::vector<const Op*> zero_ops{Op::Get("zeros_like"), Op::Get("_zeros")};
@@ -418,10 +426,10 @@ std::vector<NDArray*> Imperative::Backward(
   graph.outputs.reserve(outputs.size());
   for (const auto& i : outputs) {
     CHECK(!AGInfo::IsNone(*i))
-      << "Cannot differentiate node because it is not in a computational graph. "
-      << "You need to set is_recording to true or use autograd.record() to save "
-      << "computational graphs for backward. If you want to differentiate the same "
-      << "graph twice, you need to pass retain_graph=True to backward.";
+        << "Cannot differentiate node because it is not in a computational graph. "
+        << "You need to set is_recording to true or use autograd.record() to save "
+        << "computational graphs for backward. If you want to differentiate the same "
+        << "graph twice, you need to pass retain_graph=True to backward.";
     graph.outputs.emplace_back(i->autograd_entry_);
   }
   size_t num_forward_outputs = graph.outputs.size();
@@ -431,15 +439,14 @@ std::vector<NDArray*> Imperative::Backward(
   ograd_entries.reserve(ograds.size());
   for (size_t i = 0; i < outputs.size(); ++i) {
     nnvm::ObjectPtr np = Node::Create();
-    np->attrs.name = "_head_grad_" + std::to_string(i);
+    np->attrs.name     = "_head_grad_" + std::to_string(i);
     ograd_entries.emplace_back(NodeEntry{np, 0, 0});
     AGInfo& info = AGInfo::Create(ograd_entries.back().node);
-    info.ctx = outputs[i]->ctx();
+    info.ctx     = outputs[i]->ctx();
     if (ograds[i] != nullptr) {
       info.outputs.emplace_back(*ograds[i]);
     } else {
-      info.outputs.emplace_back(outputs[i]->shape(), outputs[i]->ctx(),
-                                true, outputs[i]->dtype());
+      info.outputs.emplace_back(outputs[i]->shape(), outputs[i]->ctx(), true, outputs[i]->dtype());
       if (info.outputs.back().shape().Size() != 0) {
         info.outputs.back() = static_cast<real_t>(1.0);
       }
@@ -459,7 +466,7 @@ std::vector<NDArray*> Imperative::Backward(
     for (size_t i = 0; i < variables.size(); ++i) {
       CHECK(!AGInfo::IsNone(*variables[i]) &&
             AGInfo::IsVariable(variables[i]->autograd_entry_.node))
-          << "Cannot differentiate with respect to the " << i+1 << "-th variable"
+          << "Cannot differentiate with respect to the " << i + 1 << "-th variable"
           << " because it does not require gradient.";
       xs.emplace_back(variables[i]->autograd_entry_);
       x_grads.push_back(new NDArray());
@@ -472,24 +479,28 @@ std::vector<NDArray*> Imperative::Backward(
     x_reqs.reserve(args.size());
     for (const auto& i : args) {
       AGInfo& info = AGInfo::Get(i);
-      if (info.grad_req == kNullOp) continue;
+      if (info.grad_req == kNullOp)
+        continue;
       xs.emplace_back(NodeEntry{i, 0, 0});
       x_grads.push_back(&info.out_grads[0]);
       x_reqs.push_back(info.grad_req);
       info.fresh_out_grad = true;
     }
-    CHECK_GT(xs.size(), 0)
-        << "There are no inputs in computation graph that require gradients.";
+    CHECK_GT(xs.size(), 0) << "There are no inputs in computation graph that require gradients.";
   }
 
-  Graph g_graph = pass::MXGradient(
-      graph, graph.outputs, xs, ograd_entries,
-      mxnet::AggregateGradient, nullptr,
-      zero_ops, "_copy");
+  Graph g_graph = pass::MXGradient(graph,
+                                   graph.outputs,
+                                   xs,
+                                   ograd_entries,
+                                   mxnet::AggregateGradient,
+                                   nullptr,
+                                   zero_ops,
+                                   "_copy");
   CHECK_EQ(g_graph.outputs.size(), xs.size());
   for (const auto& e : g_graph.outputs) {
     if (e.node->op() == nullptr) {
-      auto node = Node::Create();
+      auto node      = Node::Create();
       node->attrs.op = copy_op;
       node->inputs.push_back(e);
       graph.outputs.emplace_back(std::move(node));
@@ -499,13 +510,13 @@ std::vector<NDArray*> Imperative::Backward(
   }
   const auto& idx = graph.indexed_graph();
   // get number of nodes used in forward pass
-  size_t num_forward_nodes = 0;
+  size_t num_forward_nodes   = 0;
   size_t num_forward_entries = 0;
   for (size_t i = 0; i < num_forward_outputs; ++i) {
-    num_forward_nodes = std::max(
-        num_forward_nodes, static_cast<size_t>(idx.outputs()[i].node_id + 1));
-    num_forward_entries = std::max(
-        num_forward_entries, static_cast<size_t>(idx.entry_id(idx.outputs()[i])) + 1);
+    num_forward_nodes =
+        std::max(num_forward_nodes, static_cast<size_t>(idx.outputs()[i].node_id + 1));
+    num_forward_entries =
+        std::max(num_forward_entries, static_cast<size_t>(idx.entry_id(idx.outputs()[i])) + 1);
   }
 
   // Allocate buffer
@@ -520,22 +531,23 @@ std::vector<NDArray*> Imperative::Backward(
   if (create_graph) {
     states.resize(num_forward_nodes);
     nnvm::DFSVisit(sym.outputs, [&](const nnvm::ObjectPtr& n) {
-      AGInfo& info = AGInfo::Get(n);
+      AGInfo& info                 = AGInfo::Get(n);
       states[idx.node_id(n.get())] = info.state;
       for (uint32_t i = 0; i < info.outputs.size(); ++i) {
         CHECK(idx.exist(n.get()));
-        size_t nid = idx.node_id(n.get());
-        size_t eid = idx.entry_id(nid, i);
-        buff[eid] = info.outputs[i];
+        size_t nid                = idx.node_id(n.get());
+        size_t eid                = idx.entry_id(nid, i);
+        buff[eid]                 = info.outputs[i];
         buff[eid].autograd_entry_ = NodeEntry{n, i, 0};
-        ref_count[eid] = 1;
+        ref_count[eid]            = 1;
       }
     });
     for (auto& ograd_entry : ograd_entries) {
       AGInfo& info = AGInfo::Get(ograd_entry.node);
-      if (!idx.exist(ograd_entry.node.get())) continue;
-      size_t eid = idx.entry_id(ograd_entry);
-      buff[eid] = info.outputs[0];
+      if (!idx.exist(ograd_entry.node.get()))
+        continue;
+      size_t eid                = idx.entry_id(ograd_entry);
+      buff[eid]                 = info.outputs[0];
       buff[eid].autograd_entry_ = ograd_entry;
     }
   } else {
@@ -544,21 +556,23 @@ std::vector<NDArray*> Imperative::Backward(
       const AGInfo& info = dmlc::get<AGInfo>(idx[i].source->info);
       states.emplace_back(info.state);
       for (size_t j = 0; j < info.outputs.size(); ++j) {
-        size_t eid = idx.entry_id(i, j);
+        size_t eid  = idx.entry_id(i, j);
         arrays[eid] = const_cast<NDArray*>(&(info.outputs[j]));
 
-        if (retain_graph || info.grad_req != kNullOp) ref_count[eid] = 1;
+        if (retain_graph || info.grad_req != kNullOp)
+          ref_count[eid] = 1;
       }
     }
     for (auto& ograd_entry : ograd_entries) {
-      if (!idx.exist(ograd_entry.node.get())) continue;
-      AGInfo& info = AGInfo::Get(ograd_entry.node);
+      if (!idx.exist(ograd_entry.node.get()))
+        continue;
+      AGInfo& info                      = AGInfo::Get(ograd_entry.node);
       arrays[idx.entry_id(ograd_entry)] = &info.outputs[0];
     }
   }
   for (size_t i = num_forward_outputs; i < graph.outputs.size(); ++i) {
-    size_t eid = idx.entry_id(graph.outputs[i]);
-    arrays[eid] = x_grads[i - num_forward_outputs];
+    size_t eid     = idx.entry_id(graph.outputs[i]);
+    arrays[eid]    = x_grads[i - num_forward_outputs];
     ref_count[eid] = 1;
   }
 
@@ -568,52 +582,55 @@ std::vector<NDArray*> Imperative::Backward(
   // Infer shape type
   {
     std::pair<uint32_t, uint32_t> node_range, entry_range;
-    node_range = {num_forward_nodes, idx.num_nodes()};
+    node_range  = {num_forward_nodes, idx.num_nodes()};
     entry_range = {num_forward_entries, idx.num_node_entries()};
 
     ShapeVector shapes;
     shapes.reserve(idx.num_node_entries());
     bool contain_unknown = false;
-    for (const auto& i : arrays) shapes.emplace_back(i->shape());
-    CheckAndInferShape(&graph, std::move(shapes), false,
-                       node_range, entry_range, &contain_unknown);
+    for (const auto& i : arrays)
+      shapes.emplace_back(i->shape());
+    CheckAndInferShape(&graph, std::move(shapes), false, node_range, entry_range, &contain_unknown);
 
     DTypeVector dtypes;
     dtypes.reserve(idx.num_node_entries());
-    for (const auto& i : arrays) dtypes.emplace_back(i->dtype());
-    CheckAndInferType(&graph, std::move(dtypes), false,
-                      node_range, entry_range);
+    for (const auto& i : arrays)
+      dtypes.emplace_back(i->dtype());
+    CheckAndInferType(&graph, std::move(dtypes), false, node_range, entry_range);
 
     StorageTypeVector stypes;
     stypes.reserve(idx.num_node_entries());
-    for (const auto& i : arrays) stypes.emplace_back(i->storage_type());
+    for (const auto& i : arrays)
+      stypes.emplace_back(i->storage_type());
     exec::DevMaskVector dev_mask;
     dev_mask.reserve(idx.num_nodes());
-    for (const auto& i : vctx) dev_mask.emplace_back(i.dev_mask());
-    CheckAndInferStorageType(&graph, std::move(dev_mask), std::move(stypes), false,
-                             node_range, entry_range);
+    for (const auto& i : vctx)
+      dev_mask.emplace_back(i.dev_mask());
+    CheckAndInferStorageType(
+        &graph, std::move(dev_mask), std::move(stypes), false, node_range, entry_range);
   }
 
   // Calculate ref count
   for (size_t i = num_forward_nodes; i < idx.num_nodes(); ++i) {
     for (const auto& j : idx[i].inputs) {
-       ++ref_count[idx.entry_id(j)];
+      ++ref_count[idx.entry_id(j)];
     }
   }
 
   // Assign reqs
   std::vector<OpReqType> array_reqs(arrays.size(), kWriteTo);
   for (size_t i = num_forward_entries; i < idx.num_node_entries(); ++i) {
-    if (ref_count[i] == 0) array_reqs[i] = kNullOp;
+    if (ref_count[i] == 0)
+      array_reqs[i] = kNullOp;
   }
   for (size_t i = num_forward_outputs; i < idx.outputs().size(); ++i) {
-    size_t eid = idx.entry_id(idx.outputs()[i]);
+    size_t eid      = idx.entry_id(idx.outputs()[i]);
     array_reqs[eid] = x_reqs[i - num_forward_outputs];
   }
 
-  const auto& shapes = graph.GetAttr<mxnet::ShapeVector>("shape");
-  const auto& dtypes = graph.GetAttr<DTypeVector>("dtype");
-  const auto& stypes = graph.GetAttr<StorageTypeVector>("storage_type");
+  const auto& shapes         = graph.GetAttr<mxnet::ShapeVector>("shape");
+  const auto& dtypes         = graph.GetAttr<DTypeVector>("dtype");
+  const auto& stypes         = graph.GetAttr<StorageTypeVector>("storage_type");
   const auto& dispatch_modes = graph.GetAttr<DispatchModeVector>("dispatch_mode");
 
   for (size_t i = num_forward_nodes; i < idx.num_nodes(); ++i) {
@@ -621,18 +638,16 @@ std::vector<NDArray*> Imperative::Backward(
     for (size_t j = 0; j < num_outputs; ++j) {
       auto eid = idx.entry_id(i, j);
       if (arrays[eid]->is_none())
-        arrays[eid]->ReInit(static_cast<NDArrayStorageType>(stypes[eid]),
-                            shapes[eid], vctx[i], dtypes[eid]);
+        arrays[eid]->ReInit(
+            static_cast<NDArrayStorageType>(stypes[eid]), shapes[eid], vctx[i], dtypes[eid]);
     }
   }
 
-  for (size_t nid = num_forward_nodes;
-       nid < idx.num_nodes(); ++nid) {
+  for (size_t nid = num_forward_nodes; nid < idx.num_nodes(); ++nid) {
     const nnvm::NodeAttrs& attrs = idx[nid].source->attrs;
     for (size_t oid = 0; oid < idx[nid].source->num_outputs(); ++oid) {
       size_t eid = idx.entry_id(nid, oid);
-      arrays[eid]->AssignStorageInfo(common::NodeAttrsGetProfilerScope(attrs),
-                                     attrs.name);
+      arrays[eid]->AssignStorageInfo(common::NodeAttrsGetProfilerScope(attrs), attrs.name);
     }
   }  // for (nid ∈ [num_forward_nodes, idx.num_nodes()))
 
@@ -643,13 +658,20 @@ std::vector<NDArray*> Imperative::Backward(
   // Execution
 
   bool prev_recording = set_is_recording(create_graph);
-  bool prev_training = set_is_training(is_train);
-  int prev_bulk_size = Engine::Get()->set_bulk_size(backward_bulk_size_);
+  bool prev_training  = set_is_training(is_train);
+  int prev_bulk_size  = Engine::Get()->set_bulk_size(backward_bulk_size_);
 
   try {
-    RunGraph(retain_graph, idx, arrays, num_forward_nodes, idx.num_nodes(),
-            std::move(array_reqs), std::move(ref_count), &states, dispatch_modes,
-            is_recording());
+    RunGraph(retain_graph,
+             idx,
+             arrays,
+             num_forward_nodes,
+             idx.num_nodes(),
+             std::move(array_reqs),
+             std::move(ref_count),
+             &states,
+             dispatch_modes,
+             is_recording());
   } catch (const dmlc::Error& e) {
     Engine::Get()->set_bulk_size(prev_bulk_size);
     set_is_recording(prev_recording);
@@ -675,32 +697,31 @@ std::vector<NDArray*> Imperative::Backward(
   return {};
 }
 
-Imperative::DCInfo::DCInfo(const std::vector<NDArray *> &inputs,
-                           const std::vector<NDArray *> &outputs) {
+Imperative::DCInfo::DCInfo(const std::vector<NDArray*>& inputs,
+                           const std::vector<NDArray*>& outputs) {
   this->inputs_.reserve(inputs.size());
   this->input_handles_.reserve(inputs.size());
-  for (const NDArray *arr : inputs) {
+  for (const NDArray* arr : inputs) {
     CHECK(!arr->is_none());
     this->inputs_.push_back(*arr);
     this->input_handles_.push_back(arr);
   }
 
   this->outputs_.reserve(outputs.size());
-  for (const NDArray *arr : outputs) {
+  for (const NDArray* arr : outputs) {
     CHECK(!arr->is_none());
     this->outputs_.push_back(*arr);
   }
 }
 
-Imperative::DCInfo &
-Imperative::DCInfo::Create(const nnvm::ObjectPtr &node,
-                           const std::vector<NDArray *> &inputs,
-                           const std::vector<NDArray *> &outputs) {
+Imperative::DCInfo& Imperative::DCInfo::Create(const nnvm::ObjectPtr& node,
+                                               const std::vector<NDArray*>& inputs,
+                                               const std::vector<NDArray*>& outputs) {
   node->info.construct<DCInfo>(inputs, outputs);
   return Imperative::DCInfo::Get(node);
 }
 
-void Imperative::DCInfo::Compute(const NDArray &arr) {
+void Imperative::DCInfo::Compute(const NDArray& arr) {
   if (Imperative::DCInfo::IsComputed(arr)) {
     if (!shape_is_known(arr.shape())) {
       // We can't call arr.WaitToRead(); here, as WaitToRead calls Compute
@@ -715,30 +736,29 @@ void Imperative::DCInfo::Compute(const NDArray &arr) {
     return;
   }
 
-  DCInfo &info = Imperative::DCInfo::Get(arr.deferredcompute_entry_.node);
+  DCInfo& info      = Imperative::DCInfo::Get(arr.deferredcompute_entry_.node);
   info.is_computed_ = true;  // We will Invoke at the end of this function.
 
   // Recursively compute input arrays
-  for (const NDArray &input : info.inputs_) {
+  for (const NDArray& input : info.inputs_) {
     Compute(input);
   }
 
   // Prepare pointers
-  std::vector<NDArray *> ndinputs, ndoutputs;
+  std::vector<NDArray*> ndinputs, ndoutputs;
   ndinputs.reserve(info.inputs_.size());
   ndoutputs.reserve(info.outputs_.size());
-  for (NDArray &input : info.inputs_)
+  for (NDArray& input : info.inputs_)
     ndinputs.push_back(&input);
-  for (NDArray &output : info.outputs_)
+  for (NDArray& output : info.outputs_)
     ndoutputs.push_back(&output);
 
   // Compute this array
-  Imperative::Get()->Invoke(Context::CPU(),
-                            arr.deferredcompute_entry_.node->attrs, ndinputs,
-                            ndoutputs);
+  Imperative::Get()->Invoke(
+      Context::CPU(), arr.deferredcompute_entry_.node->attrs, ndinputs, ndoutputs);
   if (!shape_is_known(arr.shape())) {
-      arr.WaitToRead();
-      arr.SetShapeFromChunk();
+    arr.WaitToRead();
+    arr.SetShapeFromChunk();
   }
 
   // Deallocate copies
diff --git a/src/imperative/imperative_utils.cc b/src/imperative/imperative_utils.cc
index 9d15084003de..e3a58804d8ac 100644
--- a/src/imperative/imperative_utils.cc
+++ b/src/imperative/imperative_utils.cc
@@ -27,7 +27,7 @@ std::vector<NDArray*> NodeInputs(const nnvm::IndexedGraph& idx,
                                  const int node_idx,
                                  const std::vector<NDArray*>& arrays) {
   const nnvm::IndexedGraph::Node& node = idx[node_idx];
-  const size_t num_inputs = node.inputs.size();
+  const size_t num_inputs              = node.inputs.size();
   std::vector<NDArray*> ndinputs;
   ndinputs.reserve(num_inputs);
   for (const auto& j : node.inputs) {
@@ -41,7 +41,7 @@ std::vector<NDArray*> NodeOutputs(const nnvm::IndexedGraph& idx,
                                   const int node_idx,
                                   const std::vector<NDArray*>& arrays) {
   const nnvm::IndexedGraph::Node& node = idx[node_idx];
-  const size_t num_outputs = node.source->num_outputs();
+  const size_t num_outputs             = node.source->num_outputs();
   std::vector<NDArray*> ndoutputs;
   ndoutputs.reserve(num_outputs);
   for (size_t j = 0; j < num_outputs; ++j) {
@@ -55,7 +55,7 @@ std::vector<OpReqType> NodeReq(const nnvm::IndexedGraph& idx,
                                const int node_idx,
                                const std::vector<OpReqType>& array_reqs) {
   const nnvm::IndexedGraph::Node& node = idx[node_idx];
-  const size_t num_outputs = node.source->num_outputs();
+  const size_t num_outputs             = node.source->num_outputs();
   std::vector<OpReqType> req;
   req.reserve(num_outputs);
   for (size_t j = 0; j < num_outputs; ++j) {
@@ -73,21 +73,21 @@ void InvokeOperator(const nnvm::IndexedGraph& idx,
                     std::vector<OpStatePtr>* p_states,
                     const std::vector<NDArray*>& ndinputs,
                     const std::vector<NDArray*>& ndoutputs,
-                    std::vector<OpReqType> *p_req,
-                    std::vector<uint32_t> *p_ref_count,
-                    std::function<void(const OpStatePtr &state)> invoke) {
-  static const auto bwd_cached_op = Op::Get("_backward_CachedOp");
-  static auto& createop = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
-  static auto& is_layer_backward = Op::GetAttr<bool>("TIsLayerOpBackward");
-  std::vector<OpStatePtr>& states = *p_states;
-  std::vector<OpReqType> &req = *p_req;
-  std::vector<uint32_t> &ref_count = *p_ref_count;
+                    std::vector<OpReqType>* p_req,
+                    std::vector<uint32_t>* p_ref_count,
+                    std::function<void(const OpStatePtr& state)> invoke) {
+  static const auto bwd_cached_op  = Op::Get("_backward_CachedOp");
+  static auto& createop            = nnvm::Op::GetAttr<FCreateOpState>("FCreateOpState");
+  static auto& is_layer_backward   = Op::GetAttr<bool>("TIsLayerOpBackward");
+  std::vector<OpStatePtr>& states  = *p_states;
+  std::vector<OpReqType>& req      = *p_req;
+  std::vector<uint32_t>& ref_count = *p_ref_count;
 
   const nnvm::IndexedGraph::Node& node = idx[node_idx];
   if (node.source->op() == bwd_cached_op && node.source->attrs.name == "_cachedop_backward") {
     const auto& cached_op = dmlc::get<CachedOpPtr>(node.source->attrs.parsed);
-    nnvm::Node* fwd_node = node.source->control_deps[0].get();
-    auto fwd_node_id = idx.node_id(fwd_node);
+    nnvm::Node* fwd_node  = node.source->control_deps[0].get();
+    auto fwd_node_id      = idx.node_id(fwd_node);
     cached_op->Backward(retain_graph, states[fwd_node_id], ndinputs, req, ndoutputs);
   } else if (createop.count(node.source->op())) {
     mxnet::ShapeVector arg_shapes;
@@ -102,7 +102,7 @@ void InvokeOperator(const nnvm::IndexedGraph& idx,
     invoke(states[node_idx]);
   } else if (is_layer_backward.get(node.source->op(), false)) {
     nnvm::Node* fwd_node = node.source->control_deps[0].get();
-    auto fwd_node_id = idx.node_id(fwd_node);
+    auto fwd_node_id     = idx.node_id(fwd_node);
     invoke(states[fwd_node_id]);
   } else {
     invoke(OpStatePtr());
@@ -126,108 +126,107 @@ void InvokeOperator(const nnvm::IndexedGraph& idx,
 namespace mxnet {
 namespace imperative {
 
-void RunGraph(
-    const bool retain_graph,
-    const nnvm::IndexedGraph& idx,
-    const std::vector<NDArray*>& arrays,
-    size_t node_start, size_t node_end,
-    std::vector<OpReqType>&& array_reqs,
-    std::vector<uint32_t>&& ref_count,
-    std::vector<OpStatePtr> *p_states,
-    const DispatchModeVector &dispatch_modes,
-    bool recording,
-    mxnet::ShapeVector *shapes,
-    const imperative::CachedOpMonCallback& callback,
-    const bool monitor_all) {
+void RunGraph(const bool retain_graph,
+              const nnvm::IndexedGraph& idx,
+              const std::vector<NDArray*>& arrays,
+              size_t node_start,
+              size_t node_end,
+              std::vector<OpReqType>&& array_reqs,
+              std::vector<uint32_t>&& ref_count,
+              std::vector<OpStatePtr>* p_states,
+              const DispatchModeVector& dispatch_modes,
+              bool recording,
+              mxnet::ShapeVector* shapes,
+              const imperative::CachedOpMonCallback& callback,
+              const bool monitor_all) {
   CHECK(shapes == nullptr);
   for (size_t i = node_start; i < node_end; ++i) {
     const nnvm::IndexedGraph::Node& node = idx[i];
     if (node.source->op() == nullptr) {
       continue;
     }
-    std::vector<NDArray*> ndinputs = NodeInputs(idx, i, arrays);
+    std::vector<NDArray*> ndinputs  = NodeInputs(idx, i, arrays);
     std::vector<NDArray*> ndoutputs = NodeOutputs(idx, i, arrays);
-    std::vector<OpReqType> req = NodeReq(idx, i, array_reqs);
-    Context ctx = ndoutputs[0]->ctx();
+    std::vector<OpReqType> req      = NodeReq(idx, i, array_reqs);
+    Context ctx                     = ndoutputs[0]->ctx();
     if (callback && monitor_all) {
-        mxnet::common::ExecuteMonInputCallback(idx, arrays, i, callback);
+      mxnet::common::ExecuteMonInputCallback(idx, arrays, i, callback);
     }
-    auto invoke = [&](const OpStatePtr &state) {
+    auto invoke = [&](const OpStatePtr& state) {
       const nnvm::IndexedGraph::Node& node = idx[i];
-      DispatchMode dispatch_mode = dispatch_modes[i];
-      Imperative::Get()->InvokeOp(ctx, node.source->attrs, ndinputs, ndoutputs,
-                                  req, dispatch_mode, state);
+      DispatchMode dispatch_mode           = dispatch_modes[i];
+      Imperative::Get()->InvokeOp(
+          ctx, node.source->attrs, ndinputs, ndoutputs, req, dispatch_mode, state);
       if (recording) {
         Imperative::Get()->RecordOp(NodeAttrs(node.source->attrs), ndinputs, ndoutputs, state);
       }
     };
-    InvokeOperator(idx, i, retain_graph, arrays, ctx, p_states, ndinputs, ndoutputs,
-                   &req, &ref_count, invoke);
+    InvokeOperator(
+        idx, i, retain_graph, arrays, ctx, p_states, ndinputs, ndoutputs, &req, &ref_count, invoke);
     if (callback) {
-        mxnet::common::ExecuteMonOutputCallback(idx, arrays, i, callback);
+      mxnet::common::ExecuteMonOutputCallback(idx, arrays, i, callback);
     }
   }
 }
 
-void NaiveRunGraph(
-    const bool retain_graph,
-    const Context& default_ctx,
-    const nnvm::IndexedGraph& idx,
-    const std::vector<NDArray*>& arrays,
-    size_t node_start, size_t node_end,
-    std::vector<OpReqType>&& array_reqs,
-    std::vector<uint32_t>&& ref_count,
-    std::vector<OpStatePtr> *p_states,
-    const DispatchModeVector &dispatch_modes,
-    bool recording,
-    mxnet::ShapeVector *shapes,
-    const imperative::CachedOpMonCallback& callback,
-    const bool monitor_all,
-    const bool skip_engine) {
+void NaiveRunGraph(const bool retain_graph,
+                   const Context& default_ctx,
+                   const nnvm::IndexedGraph& idx,
+                   const std::vector<NDArray*>& arrays,
+                   size_t node_start,
+                   size_t node_end,
+                   std::vector<OpReqType>&& array_reqs,
+                   std::vector<uint32_t>&& ref_count,
+                   std::vector<OpStatePtr>* p_states,
+                   const DispatchModeVector& dispatch_modes,
+                   bool recording,
+                   mxnet::ShapeVector* shapes,
+                   const imperative::CachedOpMonCallback& callback,
+                   const bool monitor_all,
+                   const bool skip_engine) {
   for (size_t i = node_start; i < node_end; ++i) {
     const nnvm::IndexedGraph::Node& node = idx[i];
     if (node.source->op() == nullptr) {
       continue;
     }
-    std::vector<NDArray*> ndinputs = NodeInputs(idx, i, arrays);
+    std::vector<NDArray*> ndinputs  = NodeInputs(idx, i, arrays);
     std::vector<NDArray*> ndoutputs = NodeOutputs(idx, i, arrays);
     std::vector<OpReqType> req;
     Context ctx = GetContext(node.source->attrs, ndinputs, ndoutputs, default_ctx);
     if (callback && monitor_all) {
-        mxnet::common::ExecuteMonInputCallback(idx, arrays, i, callback);
+      mxnet::common::ExecuteMonInputCallback(idx, arrays, i, callback);
     }
-    auto invoke = [&](const OpStatePtr &state) {
+    auto invoke = [&](const OpStatePtr& state) {
       const nnvm::IndexedGraph::Node& node = idx[i];
-      DispatchMode dispatch_mode = DispatchMode::kUndefined;
+      DispatchMode dispatch_mode           = DispatchMode::kUndefined;
       SetShapeType(ctx, node.source->attrs, ndinputs, ndoutputs, &dispatch_mode);
       SetWriteInplaceReq(ndinputs, ndoutputs, &req);
       if (skip_engine) {
         auto new_attr = node.source->attrs;
         CHECK(new_attr.dict.find(SKIP_ENGINE) == new_attr.dict.end());
         new_attr.dict[SKIP_ENGINE] = SKIP_ENGINE_SET;
-        Imperative::Get()->InvokeOp(ctx, new_attr, ndinputs, ndoutputs,
-                                  req, dispatch_mode, state);
+        Imperative::Get()->InvokeOp(ctx, new_attr, ndinputs, ndoutputs, req, dispatch_mode, state);
       } else {
-        Imperative::Get()->InvokeOp(ctx, node.source->attrs, ndinputs, ndoutputs,
-                                    req, dispatch_mode, state);
+        Imperative::Get()->InvokeOp(
+            ctx, node.source->attrs, ndinputs, ndoutputs, req, dispatch_mode, state);
       }
       for (size_t j = 0; j < ndoutputs.size(); ++j) {
         if (mxnet::op::shape_is_none(ndoutputs[j]->shape())) {
           ndoutputs[j]->WaitToRead();
           ndoutputs[j]->SetShapeFromChunk();
         }
-        size_t eid = idx.entry_id(i, j);
-        auto shape = ndoutputs[j]->shape();
+        size_t eid     = idx.entry_id(i, j);
+        auto shape     = ndoutputs[j]->shape();
         (*shapes)[eid] = shape;
       }
       if (recording) {
         Imperative::Get()->RecordOp(NodeAttrs(node.source->attrs), ndinputs, ndoutputs, state);
       }
     };
-    InvokeOperator(idx, i, retain_graph, arrays, ctx, p_states, ndinputs, ndoutputs,
-                   &req, &ref_count, invoke);
+    InvokeOperator(
+        idx, i, retain_graph, arrays, ctx, p_states, ndinputs, ndoutputs, &req, &ref_count, invoke);
     if (callback) {
-        mxnet::common::ExecuteMonOutputCallback(idx, arrays, i, callback);
+      mxnet::common::ExecuteMonOutputCallback(idx, arrays, i, callback);
     }
   }
 }
diff --git a/src/imperative/imperative_utils.h b/src/imperative/imperative_utils.h
index f53b0db91b2b..31c7333e08ba 100644
--- a/src/imperative/imperative_utils.h
+++ b/src/imperative/imperative_utils.h
@@ -37,12 +37,17 @@
 namespace mxnet {
 
 #if MXNET_USE_ONEDNN == 1
-template<typename T>T *pntr(T &obj)           { return &obj; }  // NOLINT
-template<typename T>T *pntr(T *obj)           { return obj; }
+template <typename T>
+T* pntr(T& obj) {  // NOLINT
+  return &obj;
+}
+template <typename T>
+T* pntr(T* obj) {
+  return obj;
+}
 
-template<typename T>
-void InvalidateOutputs(const std::vector<T> *pArrs,
-                        const std::vector<OpReqType> &reqs) {
+template <typename T>
+void InvalidateOutputs(const std::vector<T>* pArrs, const std::vector<OpReqType>& reqs) {
   auto arrs = *pArrs;
   for (size_t i = 0; i < arrs.size(); i++) {
     if (reqs[i] == kWriteTo || reqs[i] == kNullOp)
@@ -51,8 +56,8 @@ void InvalidateOutputs(const std::vector<T> *pArrs,
 }
 
 // TODO(alexzai): (MXNET-856) Remove helper function after subgraph feature added
-static inline void CreateDefaultInputs(const std::vector<NDArray> &arrs,
-                                       std::vector<NDArray> *out_arrs) {
+static inline void CreateDefaultInputs(const std::vector<NDArray>& arrs,
+                                       std::vector<NDArray>* out_arrs) {
   out_arrs->clear();
   for (size_t i = 0; i < arrs.size(); ++i) {
     if (arrs[i].IsMKLDNNData())
@@ -63,8 +68,8 @@ static inline void CreateDefaultInputs(const std::vector<NDArray> &arrs,
 }
 
 // TODO(alexzai): (MXNET-856) Remove helper function after subgraph feature added
-static inline void CreateDefaultInputs(std::vector<NDArray> *pArrs) {
-  auto &&arrs = *pArrs;
+static inline void CreateDefaultInputs(std::vector<NDArray>* pArrs) {
+  auto&& arrs = *pArrs;
   for (size_t i = 0; i < arrs.size(); ++i)
     arrs[i].SelfReorder2Default();
 }
@@ -75,14 +80,18 @@ static inline void CreateDefaultInputs(std::vector<NDArray> *pArrs) {
 // So for the case that A is holding mkldnn memory, and then copy A to B, and then copy B
 // back to A, we shouldn't invalidate outputs for copying B back to A, because at this time,
 // copying A to B may not happen, and will corrupt A's memory.
-#define INVALIDATE_OUTPUTS_COND(cond, outputs, req) if (cond) INVALIDATE_OUTPUTS(outputs, req)
+#define INVALIDATE_OUTPUTS_COND(cond, outputs, req) \
+  if (cond) {                                       \
+    INVALIDATE_OUTPUTS(outputs, req);               \
+  }
 
 // add for mkldnn OP + no mkldnn OP
-#define CREATE_DEFAULT_INPUTS(cond, attrs, func_call)  \
-                          if (cond) {                                               \
-                            const auto is_mkldnn = Op::GetAttr<bool>("TIsMKLDNN");  \
-                            if (!is_mkldnn.get(attrs.op, false)) func_call;         \
-                          }
+#define CREATE_DEFAULT_INPUTS(cond, attrs, func_call)      \
+  if (cond) {                                              \
+    const auto is_mkldnn = Op::GetAttr<bool>("TIsMKLDNN"); \
+    if (!is_mkldnn.get(attrs.op, false))                   \
+      func_call;                                           \
+  }
 
 #else
 #define INVALIDATE_OUTPUTS(outputs, ...)       // empty macros
@@ -93,15 +102,16 @@ static inline void CreateDefaultInputs(std::vector<NDArray> *pArrs) {
 namespace imperative {
 
 namespace {
-  static const char SKIP_ENGINE[] = "__skip_engine__";
-  static const char SKIP_ENGINE_SET[] = "__true__";
-
-  inline bool CheckIfSkipEngine(const nnvm::NodeAttrs& attrs) {
-    const auto& skip_engine_attr = attrs.dict.find(SKIP_ENGINE);
-    if (skip_engine_attr == attrs.dict.end()) return false;
-    return (*skip_engine_attr).second == SKIP_ENGINE_SET;
-  }
+static const char SKIP_ENGINE[]     = "__skip_engine__";
+static const char SKIP_ENGINE_SET[] = "__true__";
+
+inline bool CheckIfSkipEngine(const nnvm::NodeAttrs& attrs) {
+  const auto& skip_engine_attr = attrs.dict.find(SKIP_ENGINE);
+  if (skip_engine_attr == attrs.dict.end())
+    return false;
+  return (*skip_engine_attr).second == SKIP_ENGINE_SET;
 }
+}  // namespace
 
 struct MemoryPlanInfo {
   int storage_id;
@@ -122,23 +132,21 @@ struct EngineOprSeg {
   std::unique_ptr<engine::Opr, EngineOprDeleter> opr;
 };
 
-using MemoryPlanVector = std::vector<MemoryPlanInfo>;
+using MemoryPlanVector    = std::vector<MemoryPlanInfo>;
 using CachedOpMonCallback = std::function<void(const char*, const char*, void*)>;
 
 inline Context GetContext(const nnvm::NodeAttrs& attrs,
-                const std::vector<NDArray*>& inputs,
-                const std::vector<NDArray*>& outputs,
-                const Context& default_ctx) {
+                          const std::vector<NDArray*>& inputs,
+                          const std::vector<NDArray*>& outputs,
+                          const Context& default_ctx) {
   Context ctx;
   if (inputs.size()) {
     ctx = inputs[0]->ctx();
     for (size_t i = 1; i < inputs.size(); ++i) {
       CHECK_EQ(inputs[i]->ctx().dev_mask(), ctx.dev_mask())
-          << "Operator " << attrs.op->name
-          << " require all inputs live on the same context. "
-          << "But the first argument is on "
-          << ctx << " while the " << i+1 << "-th argument is on "
-          << inputs[i]->ctx();
+          << "Operator " << attrs.op->name << " require all inputs live on the same context. "
+          << "But the first argument is on " << ctx << " while the " << i + 1
+          << "-th argument is on " << inputs[i]->ctx();
     }
   } else if (outputs.size() && !outputs[0]->is_none()) {
     ctx = outputs[0]->ctx();
@@ -171,12 +179,12 @@ inline void SetShapeType(const Context& ctx,
                          const std::vector<NDArray*>& inputs,
                          const std::vector<NDArray*>& outputs,
                          DispatchMode* dispatch_mode) {
-  static auto& infershape = nnvm::Op::GetAttr<mxnet::FInferShape>("FInferShape");
-  static auto& infertype = nnvm::Op::GetAttr<nnvm::FInferType>("FInferType");
-  static auto& inferstorage = nnvm::Op::GetAttr<FInferStorageType>("FInferStorageType");
-  MXAPIThreadLocalEntry<> *ret = MXAPIThreadLocalStore<>::Get();
+  static auto& infershape      = nnvm::Op::GetAttr<mxnet::FInferShape>("FInferShape");
+  static auto& infertype       = nnvm::Op::GetAttr<nnvm::FInferType>("FInferType");
+  static auto& inferstorage    = nnvm::Op::GetAttr<FInferStorageType>("FInferStorageType");
+  MXAPIThreadLocalEntry<>* ret = MXAPIThreadLocalStore<>::Get();
   // infer shape
-  mxnet::ShapeVector& in_shapes  = ret->arg_shapes;
+  mxnet::ShapeVector& in_shapes = ret->arg_shapes;
   in_shapes.clear();
   in_shapes.reserve(inputs.size());
   for (auto& i : inputs) {
@@ -192,7 +200,7 @@ inline void SetShapeType(const Context& ctx,
   if (!is_dynamic_shape_existing) {
     // If any of the inputs is a deferred computed array with unknown shape, we
     // can't infer shapes.
-    for (const NDArray *i : inputs) {
+    for (const NDArray* i : inputs) {
       if (!shape_is_known(i->shape()) && !Imperative::DCInfo::IsNone(*i)) {
         is_dynamic_shape_existing = true;
         break;
@@ -262,15 +270,16 @@ inline void SetShapeType(const Context& ctx,
   }
   bool infer_stype_success = false;
   if (inferstorage.count(attrs.op)) {
-    infer_stype_success = inferstorage[attrs.op](attrs, ctx.dev_mask(), dispatch_mode,
-                                                 &in_storage_types, &out_storage_types);
+    infer_stype_success = inferstorage[attrs.op](
+        attrs, ctx.dev_mask(), dispatch_mode, &in_storage_types, &out_storage_types);
   } else {
     // if infer storage attr is not present, apply the default infer storage function
-    infer_stype_success = common::DefaultStorageType(attrs, ctx.dev_mask(), dispatch_mode,
-                                                     &in_storage_types, &out_storage_types);
+    infer_stype_success = common::DefaultStorageType(
+        attrs, ctx.dev_mask(), dispatch_mode, &in_storage_types, &out_storage_types);
   }
   CHECK(infer_stype_success) << "Operator not implemented: "
-     << common::operator_stype_string(attrs, ctx.dev_mask(), in_storage_types, out_storage_types);
+                             << common::operator_stype_string(
+                                    attrs, ctx.dev_mask(), in_storage_types, out_storage_types);
   if (*dispatch_mode == DispatchMode::kFComputeFallback) {
     common::LogStorageFallback(attrs, ctx.dev_mask(), &in_storage_types, &out_storage_types);
   }
@@ -279,12 +288,12 @@ inline void SetShapeType(const Context& ctx,
   CHECK(*dispatch_mode != DispatchMode::kUndefined);
   for (size_t i = 0; i < outputs.size(); ++i) {
     if (outputs[i]->is_none() || (mxnet::op::shape_is_none(outputs[i]->shape()) &&
-                                   Imperative::DCInfo::IsNone(*outputs[i]))) {
+                                  Imperative::DCInfo::IsNone(*outputs[i]))) {
       if (!is_dynamic_shape_existing) {
         const auto storage_type = static_cast<NDArrayStorageType>(out_storage_types[i]);
         outputs[i]->ReInit(storage_type, out_shapes[i], ctx, out_types[i]);
       } else {
-       *outputs[i] = NDArray(ctx, out_types[i]);
+        *outputs[i] = NDArray(ctx, out_types[i]);
       }
       outputs[i]->AssignStorageInfo(common::NodeAttrsGetProfilerScope(attrs), attrs.name);
     } else if (mxnet::op::shape_is_none(outputs[i]->shape())) {
@@ -295,18 +304,18 @@ inline void SetShapeType(const Context& ctx,
         outputs[i]->Init(out_shapes[i]);
       }
       CHECK_EQ(outputs[i]->dtype(), out_types[i])
-        << i << "-th output has invalid dtype. "
-        << "Expecting " << out_types[i] << " got " << outputs[i]->dtype()
-        << " in operator " << attrs.op->name;
+          << i << "-th output has invalid dtype. "
+          << "Expecting " << out_types[i] << " got " << outputs[i]->dtype() << " in operator "
+          << attrs.op->name;
     } else {
       CHECK_EQ(outputs[i]->shape(), out_shapes[i])
-        << i << "-th output has invalid shape. "
-        << "Expecting " << out_shapes[i] << " got "
-        << outputs[i]->shape() << " in operator " << attrs.op->name;
+          << i << "-th output has invalid shape. "
+          << "Expecting " << out_shapes[i] << " got " << outputs[i]->shape() << " in operator "
+          << attrs.op->name;
       CHECK_EQ(outputs[i]->dtype(), out_types[i])
-        << i << "-th output has invalid dtype. "
-        << "Expecting " << out_types[i] << " got "
-        << outputs[i]->dtype()  << " in operator " << attrs.op->name;
+          << i << "-th output has invalid dtype. "
+          << "Expecting " << out_types[i] << " got " << outputs[i]->dtype() << " in operator "
+          << attrs.op->name;
     }
   }
 }
@@ -316,53 +325,53 @@ inline void SetShapeType(const Context& ctx,
  * For inputs and outputs arguments only NDArray::var() is accessed.
  */
 inline void SetDependency(const nnvm::NodeAttrs& attrs,
-                   const Context& ctx,
-                   const std::vector<NDArray*>& inputs,
-                   const std::vector<NDArray*>& outputs,
-                   std::vector<engine::VarHandle> *p_read_vars,
-                   std::vector<engine::VarHandle> *p_write_vars,
-                   std::vector<Resource> *p_requested,
-                   std::vector<uint32_t> *p_mutate_idx,
-                   const DispatchMode dispatch_mode) {
-  static auto& fmutate = nnvm::Op::GetAttr<nnvm::FMutateInputs>("FMutateInputs");
-  static auto& ftmp_resource = nnvm::Op::GetAttr<FResourceRequest>("FResourceRequest");
+                          const Context& ctx,
+                          const std::vector<NDArray*>& inputs,
+                          const std::vector<NDArray*>& outputs,
+                          std::vector<engine::VarHandle>* p_read_vars,
+                          std::vector<engine::VarHandle>* p_write_vars,
+                          std::vector<Resource>* p_requested,
+                          std::vector<uint32_t>* p_mutate_idx,
+                          const DispatchMode dispatch_mode) {
+  static auto& fmutate          = nnvm::Op::GetAttr<nnvm::FMutateInputs>("FMutateInputs");
+  static auto& ftmp_resource    = nnvm::Op::GetAttr<FResourceRequest>("FResourceRequest");
   static auto& ftmp_resource_ex = nnvm::Op::GetAttr<FResourceRequestEx>("FResourceRequestEx");
 
   std::vector<engine::VarHandle>& read_vars  = *p_read_vars;
   std::vector<engine::VarHandle>& write_vars = *p_write_vars;
-  std::vector<Resource>& requested = *p_requested;
-  std::vector<uint32_t>& mutate_idx = *p_mutate_idx;
+  std::vector<Resource>& requested           = *p_requested;
+  std::vector<uint32_t>& mutate_idx          = *p_mutate_idx;
 
   if (fmutate.count(attrs.op)) {
     mutate_idx = fmutate[attrs.op](attrs);
   }
-  const bool rsc_req = (ftmp_resource.count(attrs.op) != 0);
+  const bool rsc_req    = (ftmp_resource.count(attrs.op) != 0);
   const bool rsc_ex_req = (ftmp_resource_ex.count(attrs.op) != 0);
   if (rsc_req || rsc_ex_req) {
-    int ntmp = 0;
-    auto resource_reqs = rsc_ex_req ? ftmp_resource_ex[attrs.op](attrs,
-                                          static_cast<int>(ctx.dev_mask()), dispatch_mode)
+    int ntmp           = 0;
+    auto resource_reqs = rsc_ex_req ? ftmp_resource_ex[attrs.op](
+                                          attrs, static_cast<int>(ctx.dev_mask()), dispatch_mode)
                                     : ftmp_resource[attrs.op](attrs);
     for (const auto& req : resource_reqs) {
       switch (req.type) {
-       case ResourceRequest::kTempSpace:
-        ++ntmp;
-       case ResourceRequest::kRandom:
-        requested.push_back(ResourceManager::Get()->Request(ctx, req));
-        write_vars.push_back(requested.back().var);
-        break;
-       case ResourceRequest::kParallelRandom:
-        requested.push_back(ResourceManager::Get()->Request(ctx, req));
-        write_vars.push_back(requested.back().var);
-        break;
+        case ResourceRequest::kTempSpace:
+          ++ntmp;
+        case ResourceRequest::kRandom:
+          requested.push_back(ResourceManager::Get()->Request(ctx, req));
+          write_vars.push_back(requested.back().var);
+          break;
+        case ResourceRequest::kParallelRandom:
+          requested.push_back(ResourceManager::Get()->Request(ctx, req));
+          write_vars.push_back(requested.back().var);
+          break;
 #if MXNET_USE_CUDNN == 1
-       case ResourceRequest::kCuDNNDropoutDesc:
-        requested.push_back(ResourceManager::Get()->Request(ctx, req));
-        write_vars.push_back(requested.back().var);
-        break;
+        case ResourceRequest::kCuDNNDropoutDesc:
+          requested.push_back(ResourceManager::Get()->Request(ctx, req));
+          write_vars.push_back(requested.back().var);
+          break;
 #endif  // MXNET_USE_CUDNN == 1
-       default:
-        LOG(FATAL) << "resource type not yet supported";
+        default:
+          LOG(FATAL) << "resource type not yet supported";
       }
     }
     CHECK_LE(ntmp, 1) << "Only support 1 temp space request";
@@ -382,7 +391,7 @@ inline void SetDependency(const nnvm::NodeAttrs& attrs,
   for (auto& i : outputs) {
     write_vars.push_back(i->var());
   }
-  for (auto & i : mutate_idx) {
+  for (auto& i : mutate_idx) {
     write_vars.push_back(inputs[i]->var());
   }
   Engine::Get()->DeduplicateVarHandle(&read_vars, &write_vars);
@@ -394,11 +403,11 @@ inline void SetDependency(const nnvm::NodeAttrs& attrs,
  * NDArray. Set to kWriteTo otherwise.
  */
 inline void SetWriteInplaceReq(const std::vector<NDArray*>& inputs,
-                        const std::vector<NDArray*>& outputs,
-                        std::vector<OpReqType> *req) {
+                               const std::vector<NDArray*>& outputs,
+                               std::vector<OpReqType>* req) {
   std::unordered_set<engine::VarHandle> in_vars;
   in_vars.reserve(inputs.size());
-  for (auto &i : inputs) {
+  for (auto& i : inputs) {
     in_vars.insert(i->var());
   }
   req->clear();
@@ -420,16 +429,16 @@ inline void SetWriteInplaceReq(const std::vector<NDArray*>& inputs,
  * \param param_vals Array of string pointers representing the associated values
  * \return nnvm::NodeAttrs structure representing the parsed attributes
  */
-inline nnvm::NodeAttrs ParseAttrs(const nnvm::Op *op,
+inline nnvm::NodeAttrs ParseAttrs(const nnvm::Op* op,
                                   const int num_inputs,
                                   const int num_params,
-                                  const char **param_keys,
-                                  const char **param_vals) {
+                                  const char** param_keys,
+                                  const char** param_vals) {
   static auto& num_args = nnvm::Op::GetAttr<std::string>("key_var_num_args");
 
   nnvm::NodeAttrs attrs;
   attrs.op = op;
-  attrs.dict.reserve(num_params+1);
+  attrs.dict.reserve(num_params + 1);
   for (int i = 0; i < num_params; ++i) {
     attrs.dict.emplace(param_keys[i], param_vals[i]);
   }
@@ -451,7 +460,7 @@ inline nnvm::NodeAttrs ParseAttrs(const nnvm::Op *op,
  * \param infered_num_outputs The inferred number of outputs
  * \param num_visible_outputs The actual number of visible outputs
  */
-inline void SetNumOutputs(const nnvm::Op *op,
+inline void SetNumOutputs(const nnvm::Op* op,
                           const nnvm::NodeAttrs& attrs,
                           const int& num_inputs,
                           int* infered_num_outputs,
@@ -464,8 +473,8 @@ inline void SetNumOutputs(const nnvm::Op *op,
     infered_num_inputs = op->num_inputs;
   }
   CHECK_EQ(num_inputs, infered_num_inputs)
-    << "Operator " << op->name << " expects " << infered_num_inputs
-    << " inputs, but got " << num_inputs << " instead.";
+      << "Operator " << op->name << " expects " << infered_num_inputs << " inputs, but got "
+      << num_inputs << " instead.";
   if (op->get_num_outputs != nullptr) {
     *infered_num_outputs = op->get_num_outputs(attrs);
   } else {
@@ -481,33 +490,38 @@ inline void SetNumOutputs(const nnvm::Op *op,
 /*!
  * \brief Copy-construct NDArrays referenced by inputs and outputs to p_inputs and p_outputs
  */
-inline void DerefInputOutput(const std::vector<NDArray *>& inputs,
-                             const std::vector<NDArray *>& outputs,
+inline void DerefInputOutput(const std::vector<NDArray*>& inputs,
+                             const std::vector<NDArray*>& outputs,
                              std::vector<NDArray>* p_inputs,
                              std::vector<NDArray>* p_outputs) {
   p_inputs->reserve(inputs.size());
   p_outputs->reserve(outputs.size());
-  for (const auto i : inputs) p_inputs->emplace_back(*i);
-  for (const auto i : outputs) p_outputs->emplace_back(*i);
+  for (const auto i : inputs)
+    p_inputs->emplace_back(*i);
+  for (const auto i : outputs)
+    p_outputs->emplace_back(*i);
 }
 
 inline void DerefInputOutput(const std::vector<NDArray*>& inputs,
                              const std::vector<NDArray*>& outputs,
-                             std::vector<NDArray *>* p_inputs,
-                             std::vector<NDArray *>* p_outputs) {
+                             std::vector<NDArray*>* p_inputs,
+                             std::vector<NDArray*>* p_outputs) {
   p_inputs->reserve(inputs.size());
   p_outputs->reserve(outputs.size());
-  for (const auto i : inputs) p_inputs->emplace_back(new NDArray(*i));
-  for (const auto i : outputs) p_outputs->emplace_back(new NDArray(*i));
+  for (const auto i : inputs)
+    p_inputs->emplace_back(new NDArray(*i));
+  for (const auto i : outputs)
+    p_outputs->emplace_back(new NDArray(*i));
 }
 
-inline void DerefInputOutputRelease(const std::vector<NDArray *>& inputs,
-                                    const std::vector<NDArray *>& outputs) {
-  for (auto i : inputs) delete i;
-  for (auto i : outputs) delete i;
+inline void DerefInputOutputRelease(const std::vector<NDArray*>& inputs,
+                                    const std::vector<NDArray*>& outputs) {
+  for (auto i : inputs)
+    delete i;
+  for (auto i : outputs)
+    delete i;
 }
 
-
 /*
  * \brief setup default-storage tblobs from source NDArrays. If any source NDArray has non-default
  *        storage, it creates a temp NDArray with default storage and uses the temp tblob. The
@@ -521,19 +535,19 @@ inline void DerefInputOutputRelease(const std::vector<NDArray *>& inputs,
           indices are not recorded
  * \return true if any source NDArray need to cast storage
  */
-inline bool SetupDefaultBlobsIn(const std::vector<NDArray *>& src,
-                                const std::vector<NDArray> *bufs,
-                                std::vector<TBlob> *blobs,
-                                std::vector<NDArray> *temp_src,
-                                std::vector<NDArray> *temp_dst,
-                                std::unordered_map<uint32_t, uint32_t> *idx_map) {
+inline bool SetupDefaultBlobsIn(const std::vector<NDArray*>& src,
+                                const std::vector<NDArray>* bufs,
+                                std::vector<TBlob>* blobs,
+                                std::vector<NDArray>* temp_src,
+                                std::vector<NDArray>* temp_dst,
+                                std::unordered_map<uint32_t, uint32_t>* idx_map) {
   bool require_cast = false;
   for (size_t i = 0; i < src.size(); i++) {
     const auto& nd = *src[i];
     if (!DEFAULT_DATA(nd)) {
       (*idx_map)[i] = temp_dst->size();
-      NDArray temp = bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(),
-                                                             true, nd.dtype());
+      NDArray temp =
+          bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(), true, nd.dtype());
 #if MXNET_USE_ONEDNN == 1
       CHECK(temp.IsDefaultData());
 #endif
@@ -548,12 +562,12 @@ inline bool SetupDefaultBlobsIn(const std::vector<NDArray *>& src,
   return require_cast;
 }
 
-inline bool SetupDefaultBlobsOut(const std::vector<NDArray *>& src,
-                                 const std::vector<NDArray> *bufs,
-                                 std::vector<OpReqType> *req,
-                                 std::vector<TBlob> *blobs,
-                                 std::vector<NDArray> *temp_src,
-                                 std::vector<NDArray> *temp_dst) {
+inline bool SetupDefaultBlobsOut(const std::vector<NDArray*>& src,
+                                 const std::vector<NDArray>* bufs,
+                                 std::vector<OpReqType>* req,
+                                 std::vector<TBlob>* blobs,
+                                 std::vector<NDArray>* temp_src,
+                                 std::vector<NDArray>* temp_dst) {
   bool require_cast = false;
   for (size_t i = 0; i < src.size(); i++) {
     const auto& nd = *src[i];
@@ -572,14 +586,14 @@ inline bool SetupDefaultBlobsOut(const std::vector<NDArray *>& src,
       if (bufs != nullptr) {
         temp = bufs->at(i);
       } else if (kAddTo == req->at(i)) {
-        temp = nd.IsMKLDNNData()? nd.Reorder2Default() : nd;
+        temp = nd.IsMKLDNNData() ? nd.Reorder2Default() : nd;
       } else {
         temp = NDArray(nd.shape(), nd.ctx(), true, nd.dtype());
       }
       CHECK(temp.IsDefaultData());
 #else
-      NDArray temp = bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(),
-          true, nd.dtype());
+      NDArray temp =
+          bufs != nullptr ? bufs->at(i) : NDArray(nd.shape(), nd.ctx(), true, nd.dtype());
 #endif
       temp_src->emplace_back(nd);
       temp_dst->emplace_back(temp);
@@ -599,25 +613,23 @@ inline bool SetupDefaultBlobsOut(const std::vector<NDArray *>& src,
  *        function also records the indices of non-default source NDArrays and the indices of
  *        their corresponding temporary NDArrays in the temp array.
  */
-inline void SetupDefaultBlobsInOut(const std::vector<NDArray *> &ndinputs,
-                                   const std::vector<NDArray *> &ndoutputs,
-                                   const std::vector<NDArray> *in_bufs,
-                                   const std::vector<NDArray> *out_bufs,
-                                   std::vector<OpReqType> *req,
-                                   std::vector<TBlob> *input_blobs,
-                                   std::vector<TBlob> *output_blobs,
-                                   std::vector<NDArray> *pre_temp_src,
-                                   std::vector<NDArray> *pre_temp_dst,
-                                   std::vector<NDArray> *post_temp_src,
-                                   std::vector<NDArray> *post_temp_dst,
-                                   std::unordered_map<uint32_t, uint32_t> *in_temp_idx_map,
-                                   const std::vector<uint32_t> &mutate_idx) {
+inline void SetupDefaultBlobsInOut(const std::vector<NDArray*>& ndinputs,
+                                   const std::vector<NDArray*>& ndoutputs,
+                                   const std::vector<NDArray>* in_bufs,
+                                   const std::vector<NDArray>* out_bufs,
+                                   std::vector<OpReqType>* req,
+                                   std::vector<TBlob>* input_blobs,
+                                   std::vector<TBlob>* output_blobs,
+                                   std::vector<NDArray>* pre_temp_src,
+                                   std::vector<NDArray>* pre_temp_dst,
+                                   std::vector<NDArray>* post_temp_src,
+                                   std::vector<NDArray>* post_temp_dst,
+                                   std::unordered_map<uint32_t, uint32_t>* in_temp_idx_map,
+                                   const std::vector<uint32_t>& mutate_idx) {
   // populate input blobs
-  SetupDefaultBlobsIn(ndinputs, in_bufs, input_blobs, pre_temp_src, pre_temp_dst,
-                      in_temp_idx_map);
+  SetupDefaultBlobsIn(ndinputs, in_bufs, input_blobs, pre_temp_src, pre_temp_dst, in_temp_idx_map);
   // populate output blobs
-  SetupDefaultBlobsOut(ndoutputs, out_bufs, req, output_blobs, post_temp_dst,
-                       post_temp_src);
+  SetupDefaultBlobsOut(ndoutputs, out_bufs, req, output_blobs, post_temp_dst, post_temp_src);
   // add mutable inputs to post temp list
   for (const auto idx : mutate_idx) {
     auto map_iter = in_temp_idx_map->find(idx);
@@ -628,30 +640,30 @@ inline void SetupDefaultBlobsInOut(const std::vector<NDArray *> &ndinputs,
   }
 }
 
-#define REDEFINE_INPUTS_OUTPUTS(in, out, newIn, newOut)       \
-      std::vector<NDArray> newIn, newOut;                     \
-      DerefInputOutput(in, out, &newIn, &newOut);             \
-      DerefInputOutputRelease(in, out)
+#define REDEFINE_INPUTS_OUTPUTS(in, out, newIn, newOut) \
+  std::vector<NDArray> newIn, newOut;                   \
+  DerefInputOutput(in, out, &newIn, &newOut);           \
+  DerefInputOutputRelease(in, out)
 
 inline void PushFCompute(const FCompute& fn,
-                  const nnvm::Op* op,
-                  const nnvm::NodeAttrs& attrs,
-                  const Context& ctx,
-                  const std::vector<engine::VarHandle>& read_vars,
-                  const std::vector<engine::VarHandle>& write_vars,
-                  const std::vector<Resource>& requested,
-                  const std::vector<NDArray*>& p_inputs,
-                  const std::vector<NDArray*>& p_outputs,
-                  const std::vector<uint32_t>& mutate_idx,
-                  const std::vector<OpReqType>& req) {
+                         const nnvm::Op* op,
+                         const nnvm::NodeAttrs& attrs,
+                         const Context& ctx,
+                         const std::vector<engine::VarHandle>& read_vars,
+                         const std::vector<engine::VarHandle>& write_vars,
+                         const std::vector<Resource>& requested,
+                         const std::vector<NDArray*>& p_inputs,
+                         const std::vector<NDArray*>& p_outputs,
+                         const std::vector<uint32_t>& mutate_idx,
+                         const std::vector<OpReqType>& req) {
   using namespace common;
   static auto& fexec_type = nnvm::Op::GetAttr<FExecType>("FExecType");
 
-  bool is_train = Imperative::Get()->is_training();
-  bool need_grad = Imperative::Get()->is_recording();
+  bool is_train      = Imperative::Get()->is_training();
+  bool need_grad     = Imperative::Get()->is_recording();
   ExecType exec_type = fexec_type.count(op) ? fexec_type[op](attrs) : ExecType::kSync;
   CHECK(exec_type == ExecType::kSync);
-  std::vector<NDArray *> inputs, outputs;
+  std::vector<NDArray*> inputs, outputs;
   DerefInputOutput(p_inputs, p_outputs, &inputs, &outputs);
   const auto& run = [=](RunContext rctx) {
     std::vector<TBlob> input_blobs, output_blobs;
@@ -662,9 +674,19 @@ inline void PushFCompute(const FCompute& fn,
     INVALIDATE_OUTPUTS_COND(exec_type != ExecType::kCrossDeviceCopy, outputs, req);
     std::vector<OpReqType> tmp_req = req;
     // setup blobs
-    SetupDefaultBlobsInOut(inputs, outputs, nullptr, nullptr, &tmp_req,
-                            &input_blobs, &output_blobs, &pre_temp_src, &pre_temp_dst,
-                            &post_temp_src, &post_temp_dst, &in_temp_idx_map, mutate_idx);
+    SetupDefaultBlobsInOut(inputs,
+                           outputs,
+                           nullptr,
+                           nullptr,
+                           &tmp_req,
+                           &input_blobs,
+                           &output_blobs,
+                           &pre_temp_src,
+                           &pre_temp_dst,
+                           &post_temp_src,
+                           &post_temp_dst,
+                           &in_temp_idx_map,
+                           mutate_idx);
     // setup context
     OpContext opctx{need_grad, is_train, rctx, engine::CallbackOnComplete(), requested};
     bool is_gpu = ctx.dev_mask() == gpu::kDevMask;
@@ -683,82 +705,81 @@ inline void PushFCompute(const FCompute& fn,
     run(RunContext{ctx, nullptr, nullptr, false});
   } else {
     Engine::Get()->PushSync(
-    run, ctx, read_vars, write_vars, FnProperty::kNormal,
-    0, op->name.c_str());
+        run, ctx, read_vars, write_vars, FnProperty::kNormal, 0, op->name.c_str());
   }
 }
 
 inline void PushFComputeEx(const FComputeEx& fn,
-                    const nnvm::Op* op,
-                    const nnvm::NodeAttrs& attrs,
-                    const Context& ctx,
-                    const std::vector<engine::VarHandle>& read_vars,
-                    const std::vector<engine::VarHandle>& write_vars,
-                    const std::vector<Resource>& requested,
-                    const std::vector<NDArray*>& p_inputs,
-                    const std::vector<NDArray*>& p_outputs,
-                    const std::vector<OpReqType>& req) {
+                           const nnvm::Op* op,
+                           const nnvm::NodeAttrs& attrs,
+                           const Context& ctx,
+                           const std::vector<engine::VarHandle>& read_vars,
+                           const std::vector<engine::VarHandle>& write_vars,
+                           const std::vector<Resource>& requested,
+                           const std::vector<NDArray*>& p_inputs,
+                           const std::vector<NDArray*>& p_outputs,
+                           const std::vector<OpReqType>& req) {
   static auto& fexec_type = nnvm::Op::GetAttr<FExecType>("FExecType");
 
-  const bool is_train = Imperative::Get()->is_training();
-  const bool need_grad = Imperative::Get()->is_recording();
-  const auto exec_type = fexec_type.count(op) ? fexec_type[op](attrs) : ExecType::kSync;
+  const bool is_train          = Imperative::Get()->is_training();
+  const bool need_grad         = Imperative::Get()->is_recording();
+  const auto exec_type         = fexec_type.count(op) ? fexec_type[op](attrs) : ExecType::kSync;
   const auto cross_device_copy = exec_type == ExecType::kCrossDeviceCopy;
-  std::vector<NDArray *> inputs, outputs;
+  std::vector<NDArray*> inputs, outputs;
   DerefInputOutput(p_inputs, p_outputs, &inputs, &outputs);
   const auto& run = [=](RunContext rctx) {
-      OpContext opctx{need_grad, is_train, rctx, engine::CallbackOnComplete(), requested};
-      REDEFINE_INPUTS_OUTPUTS(inputs, outputs, inputsA, outputsA);
-      INVALIDATE_OUTPUTS_COND(!cross_device_copy, outputsA, req);
-      CREATE_DEFAULT_INPUTS(!cross_device_copy, attrs, CreateDefaultInputs(&inputsA));
-      fn(attrs, opctx, inputsA, req, outputsA);
-      if (ctx.dev_mask() == gpu::kDevMask && exec_type == ExecType::kSync && !rctx.is_bulk) {
-        rctx.get_stream<gpu>()->Wait();
-      }
-    };
+    OpContext opctx{need_grad, is_train, rctx, engine::CallbackOnComplete(), requested};
+    REDEFINE_INPUTS_OUTPUTS(inputs, outputs, inputsA, outputsA);
+    INVALIDATE_OUTPUTS_COND(!cross_device_copy, outputsA, req);
+    CREATE_DEFAULT_INPUTS(!cross_device_copy, attrs, CreateDefaultInputs(&inputsA));
+    fn(attrs, opctx, inputsA, req, outputsA);
+    if (ctx.dev_mask() == gpu::kDevMask && exec_type == ExecType::kSync && !rctx.is_bulk) {
+      rctx.get_stream<gpu>()->Wait();
+    }
+  };
   if (cross_device_copy || CheckIfSkipEngine(attrs)) {
     run(RunContext{ctx, nullptr, nullptr, false});
   } else {
     CHECK(exec_type == ExecType::kSync);
-    Engine::Get()->PushSync(run, ctx, read_vars, write_vars, FnProperty::kNormal,
-                            0, op->name.c_str());
+    Engine::Get()->PushSync(
+        run, ctx, read_vars, write_vars, FnProperty::kNormal, 0, op->name.c_str());
   }
 }
 
 inline void PushOperator(const OpStatePtr& state,
-                  const nnvm::Op* op,
-                  const nnvm::NodeAttrs& attrs,
-                  const Context& ctx,
-                  const std::vector<engine::VarHandle>& read_vars,
-                  const std::vector<engine::VarHandle>& write_vars,
-                  const std::vector<Resource>& requested,
-                  const std::vector<NDArray*>& p_inputs,
-                  const std::vector<NDArray*>& p_outputs,
-                  const std::vector<uint32_t>& mutate_idx,
-                  const std::vector<OpReqType>& req,
-                  const DispatchMode dispatch_mode) {
+                         const nnvm::Op* op,
+                         const nnvm::NodeAttrs& attrs,
+                         const Context& ctx,
+                         const std::vector<engine::VarHandle>& read_vars,
+                         const std::vector<engine::VarHandle>& write_vars,
+                         const std::vector<Resource>& requested,
+                         const std::vector<NDArray*>& p_inputs,
+                         const std::vector<NDArray*>& p_outputs,
+                         const std::vector<uint32_t>& mutate_idx,
+                         const std::vector<OpReqType>& req,
+                         const DispatchMode dispatch_mode) {
   using namespace common;
   static auto& fexec_type = nnvm::Op::GetAttr<FExecType>("FExecType");
 
-  bool is_train = Imperative::Get()->is_training();
-  bool need_grad = Imperative::Get()->is_recording();
+  bool is_train      = Imperative::Get()->is_training();
+  bool need_grad     = Imperative::Get()->is_recording();
   ExecType exec_type = fexec_type.count(op) ? fexec_type[op](attrs) : ExecType::kSync;
-  std::vector<NDArray *> inputs, outputs;
+  std::vector<NDArray*> inputs, outputs;
   DerefInputOutput(p_inputs, p_outputs, &inputs, &outputs);
 
   auto fcompute_ex = common::GetFCompute<FStatefulComputeEx>(op, "FStatefulComputeEx", ctx);
   if (fcompute_ex != nullptr && dispatch_mode == DispatchMode::kFComputeEx) {
-    const auto& run = [=](RunContext rctx,
-                          engine::CallbackOnComplete on_complete) {
+    const auto& run = [=](RunContext rctx, engine::CallbackOnComplete on_complete) {
       OpContext opctx{need_grad, is_train, rctx, on_complete, requested};
       REDEFINE_INPUTS_OUTPUTS(inputs, outputs, inputsA, outputsA);
-      INVALIDATE_OUTPUTS_COND(exec_type != ExecType::kCrossDeviceCopy && op->name != "_CachedOp",
-                              outputsA, req);
+      INVALIDATE_OUTPUTS_COND(
+          exec_type != ExecType::kCrossDeviceCopy && op->name != "_CachedOp", outputsA, req);
       CREATE_DEFAULT_INPUTS(exec_type != ExecType::kCrossDeviceCopy && op->name != "_CachedOp",
-                            attrs, CreateDefaultInputs(&inputsA));
+                            attrs,
+                            CreateDefaultInputs(&inputsA));
       fcompute_ex(state, opctx, inputsA, req, outputsA);
-      if (ctx.dev_mask() == gpu::kDevMask && exec_type == ExecType::kSync
-          && rctx.get_stream<gpu>() && !rctx.is_bulk) {
+      if (ctx.dev_mask() == gpu::kDevMask && exec_type == ExecType::kSync &&
+          rctx.get_stream<gpu>() && !rctx.is_bulk) {
         rctx.get_stream<gpu>()->Wait();
       }
     };
@@ -769,15 +790,17 @@ inline void PushOperator(const OpStatePtr& state,
       RunContext rctx{ctx, nullptr, nullptr, false};
       run(rctx, engine::CallbackOnComplete());
     } else if (exec_type == ExecType::kSync) {
-      Engine::Get()->PushSync(
-          [=](RunContext rctx) { run(rctx, engine::CallbackOnComplete()); },
-          ctx, read_vars, write_vars, FnProperty::kNormal, 0,
-          op->name.c_str());
+      Engine::Get()->PushSync([=](RunContext rctx) { run(rctx, engine::CallbackOnComplete()); },
+                              ctx,
+                              read_vars,
+                              write_vars,
+                              FnProperty::kNormal,
+                              0,
+                              op->name.c_str());
     } else {
       CHECK(exec_type == ExecType::kAsync);
-      Engine::Get()->PushAsync(run, ctx, read_vars, write_vars,
-                               FnProperty::kAsync, 0,
-                               op->name.c_str());
+      Engine::Get()->PushAsync(
+          run, ctx, read_vars, write_vars, FnProperty::kAsync, 0, op->name.c_str());
     }
   } else {
     auto fcompute = common::GetFCompute<FStatefulCompute>(op, "FStatefulCompute", ctx);
@@ -786,57 +809,68 @@ inline void PushOperator(const OpStatePtr& state,
         << "for stateful operator " << op->name;
 
     const auto& run = [=](RunContext rctx, engine::CallbackOnComplete on_complete) {
-        OpContext opctx{need_grad, is_train, rctx, on_complete, requested};
-
-        std::vector<TBlob> input_blobs, output_blobs;
-        // pre-fcompute and post-fcompute storage fallback src NDArrays and dst NDArrays
-        std::vector<NDArray> pre_temp_src, pre_temp_dst, post_temp_dst, post_temp_src;
-        // mapping from index in input_blobs to index in pre_temp_dst
-        std::unordered_map<uint32_t, uint32_t> in_temp_idx_map;
-        INVALIDATE_OUTPUTS_COND(exec_type != ExecType::kCrossDeviceCopy, outputs, req);
-
-        std::vector<OpReqType> tmp_req = req;
-        // populate input blobs and output blobs
-        SetupDefaultBlobsInOut(inputs, outputs, nullptr, nullptr, &tmp_req,
-                               &input_blobs, &output_blobs, &pre_temp_src, &pre_temp_dst,
-                               &post_temp_src, &post_temp_dst, &in_temp_idx_map, mutate_idx);
-        // setup contexts
-        const bool is_gpu = rctx.get_ctx().dev_mask() == gpu::kDevMask;
-        // pre-fcompute fallback
-        CastNonDefaultStorage(pre_temp_src, pre_temp_dst, opctx, is_gpu);
-        fcompute(state, opctx, input_blobs, tmp_req, output_blobs);
-        // post-fcompute fallback, cast to original storage type, if necessary
-        CastNonDefaultStorage(post_temp_src, post_temp_dst, opctx, is_gpu);
-        if (is_gpu && exec_type == ExecType::kSync
-            && rctx.get_stream<gpu>() && !rctx.is_bulk) {
-          rctx.get_stream<gpu>()->Wait();
-        }
-        DerefInputOutputRelease(inputs, outputs);
-      };
+      OpContext opctx{need_grad, is_train, rctx, on_complete, requested};
+
+      std::vector<TBlob> input_blobs, output_blobs;
+      // pre-fcompute and post-fcompute storage fallback src NDArrays and dst NDArrays
+      std::vector<NDArray> pre_temp_src, pre_temp_dst, post_temp_dst, post_temp_src;
+      // mapping from index in input_blobs to index in pre_temp_dst
+      std::unordered_map<uint32_t, uint32_t> in_temp_idx_map;
+      INVALIDATE_OUTPUTS_COND(exec_type != ExecType::kCrossDeviceCopy, outputs, req);
+
+      std::vector<OpReqType> tmp_req = req;
+      // populate input blobs and output blobs
+      SetupDefaultBlobsInOut(inputs,
+                             outputs,
+                             nullptr,
+                             nullptr,
+                             &tmp_req,
+                             &input_blobs,
+                             &output_blobs,
+                             &pre_temp_src,
+                             &pre_temp_dst,
+                             &post_temp_src,
+                             &post_temp_dst,
+                             &in_temp_idx_map,
+                             mutate_idx);
+      // setup contexts
+      const bool is_gpu = rctx.get_ctx().dev_mask() == gpu::kDevMask;
+      // pre-fcompute fallback
+      CastNonDefaultStorage(pre_temp_src, pre_temp_dst, opctx, is_gpu);
+      fcompute(state, opctx, input_blobs, tmp_req, output_blobs);
+      // post-fcompute fallback, cast to original storage type, if necessary
+      CastNonDefaultStorage(post_temp_src, post_temp_dst, opctx, is_gpu);
+      if (is_gpu && exec_type == ExecType::kSync && rctx.get_stream<gpu>() && !rctx.is_bulk) {
+        rctx.get_stream<gpu>()->Wait();
+      }
+      DerefInputOutputRelease(inputs, outputs);
+    };
 
     if (exec_type == ExecType::kSubgraphExec || CheckIfSkipEngine(attrs)) {
       RunContext rctx{ctx, nullptr, nullptr, false};
       run(rctx, engine::CallbackOnComplete());
     } else if (exec_type == ExecType::kSync) {
-      Engine::Get()->PushSync(
-          [=](RunContext rctx) {
-            run(rctx, engine::CallbackOnComplete());
-          }, ctx, read_vars, write_vars, FnProperty::kNormal,
-          0, op->name.c_str());
+      Engine::Get()->PushSync([=](RunContext rctx) { run(rctx, engine::CallbackOnComplete()); },
+                              ctx,
+                              read_vars,
+                              write_vars,
+                              FnProperty::kNormal,
+                              0,
+                              op->name.c_str());
     } else {
       CHECK(exec_type == ExecType::kAsync);
       Engine::Get()->PushAsync(
-          run, ctx, read_vars, write_vars, FnProperty::kAsync,
-          0, op->name.c_str());
+          run, ctx, read_vars, write_vars, FnProperty::kAsync, 0, op->name.c_str());
     }
   }
 }
 
-inline bool CheckAndInferShape(nnvm::Graph* p_g, mxnet::ShapeVector&& shapes,
+inline bool CheckAndInferShape(nnvm::Graph* p_g,
+                               mxnet::ShapeVector&& shapes,
                                bool use_inputs,
-                               std::pair<uint32_t, uint32_t> node_range = {0, 0},
+                               std::pair<uint32_t, uint32_t> node_range  = {0, 0},
                                std::pair<uint32_t, uint32_t> entry_range = {0, 0},
-                               bool *contain_unknown = nullptr) {
+                               bool* contain_unknown                     = nullptr) {
   using namespace nnvm;
   if (contain_unknown != nullptr) {
     *contain_unknown = false;
@@ -852,13 +886,16 @@ inline bool CheckAndInferShape(nnvm::Graph* p_g, mxnet::ShapeVector&& shapes,
       for (size_t i = 0; i < shapes.size(); ++i) {
         if (i == entry_range.first) {
           i = entry_range.second;
-          if (i >= shapes.size()) break;
+          if (i >= shapes.size())
+            break;
         }
-        if (shapes[i] == prev_shapes[i]) continue;
+        if (shapes[i] == prev_shapes[i])
+          continue;
         match = false;
         break;
       }
-      if (match) return true;
+      if (match)
+        return true;
     }
   }
   g.attrs.erase("shape");
@@ -870,7 +907,7 @@ inline bool CheckAndInferShape(nnvm::Graph* p_g, mxnet::ShapeVector&& shapes,
     g = exec::InferShape(std::move(g), std::move(shapes));
   } else {
     g.attrs["shape"] = std::make_shared<dmlc::any>(std::move(shapes));
-    g = exec::InferShape(std::move(g));
+    g                = exec::InferShape(std::move(g));
   }
   if (contain_unknown == nullptr) {
     CHECK_EQ(g.GetAttr<size_t>("shape_num_unknown_nodes"), 0U);
@@ -880,16 +917,16 @@ inline bool CheckAndInferShape(nnvm::Graph* p_g, mxnet::ShapeVector&& shapes,
   return false;
 }
 
-
-inline bool CheckAndInferType(nnvm::Graph* p_g, nnvm::DTypeVector&& dtypes,
+inline bool CheckAndInferType(nnvm::Graph* p_g,
+                              nnvm::DTypeVector&& dtypes,
                               bool use_inputs,
-                              std::pair<uint32_t, uint32_t> node_range = {0, 0},
+                              std::pair<uint32_t, uint32_t> node_range  = {0, 0},
                               std::pair<uint32_t, uint32_t> entry_range = {0, 0}) {
   using namespace nnvm;
   nnvm::Graph& g = *p_g;
   if (use_inputs) {
-    if (g.attrs.count("dtype_inputs") &&
-        g.GetAttr<DTypeVector>("dtype_inputs") == dtypes) return true;
+    if (g.attrs.count("dtype_inputs") && g.GetAttr<DTypeVector>("dtype_inputs") == dtypes)
+      return true;
   } else if (g.attrs.count("dtype")) {
     const auto& prev_dtypes = g.GetAttr<DTypeVector>("dtype");
     CHECK_EQ(prev_dtypes.size(), dtypes.size());
@@ -897,13 +934,16 @@ inline bool CheckAndInferType(nnvm::Graph* p_g, nnvm::DTypeVector&& dtypes,
     for (size_t i = 0; i < dtypes.size(); ++i) {
       if (i == entry_range.first) {
         i = entry_range.second;
-        if (i >= dtypes.size()) break;
+        if (i >= dtypes.size())
+          break;
       }
-      if (dtypes[i] == prev_dtypes[i]) continue;
+      if (dtypes[i] == prev_dtypes[i])
+        continue;
       match = false;
       break;
     }
-    if (match) return true;
+    if (match)
+      return true;
   }
   g.attrs.erase("dtype");
   g.attrs.erase("dtype_inputs");
@@ -917,28 +957,31 @@ inline bool CheckAndInferType(nnvm::Graph* p_g, nnvm::DTypeVector&& dtypes,
     g = exec::InferType(std::move(g), std::move(dtypes));
   } else {
     g.attrs["dtype"] = std::make_shared<dmlc::any>(std::move(dtypes));
-    g = exec::InferType(std::move(g));
+    g                = exec::InferType(std::move(g));
   }
   CHECK_EQ(g.GetAttr<size_t>("dtype_num_unknown_nodes"), 0U);
 
   return false;
 }
 
-inline bool CheckAndInferStorageType(nnvm::Graph* p_g, exec::DevMaskVector&& dev_mask,
-                                     StorageTypeVector&& storage_types, bool use_inputs,
-                                     std::pair<uint32_t, uint32_t> node_range = {0, 0},
+inline bool CheckAndInferStorageType(nnvm::Graph* p_g,
+                                     exec::DevMaskVector&& dev_mask,
+                                     StorageTypeVector&& storage_types,
+                                     bool use_inputs,
+                                     std::pair<uint32_t, uint32_t> node_range  = {0, 0},
                                      std::pair<uint32_t, uint32_t> entry_range = {0, 0}) {
   using namespace nnvm;
   nnvm::Graph& g = *p_g;
-  bool dev_match = g.attrs.count("dev_mask") &&
-                   g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_mask;
+  bool dev_match =
+      g.attrs.count("dev_mask") && g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_mask;
   if (!dev_match) {
     g.attrs["dev_mask"] = std::make_shared<dmlc::any>(std::move(dev_mask));
   }
 
   if (dev_match && use_inputs) {
     if (g.attrs.count("storage_type_inputs") &&
-        g.GetAttr<StorageTypeVector>("storage_type_inputs") == storage_types) return true;
+        g.GetAttr<StorageTypeVector>("storage_type_inputs") == storage_types)
+      return true;
   } else if (dev_match && g.attrs.count("storage_type")) {
     const auto& prev_storage_types = g.GetAttr<StorageTypeVector>("storage_type");
     CHECK_EQ(prev_storage_types.size(), storage_types.size());
@@ -946,13 +989,16 @@ inline bool CheckAndInferStorageType(nnvm::Graph* p_g, exec::DevMaskVector&& dev
     for (size_t i = 0; i < storage_types.size(); ++i) {
       if (i == entry_range.first) {
         i = entry_range.second;
-        if (i >= storage_types.size()) break;
+        if (i >= storage_types.size())
+          break;
       }
-      if (storage_types[i] == prev_storage_types[i]) continue;
+      if (storage_types[i] == prev_storage_types[i])
+        continue;
       match = false;
       break;
     }
-    if (match) return true;
+    if (match)
+      return true;
   }
   g.attrs.erase("dispatch_mode");
   g.attrs.erase("storage_type");
@@ -964,18 +1010,17 @@ inline bool CheckAndInferStorageType(nnvm::Graph* p_g, exec::DevMaskVector&& dev
     g = exec::InferStorageType(std::move(g), std::move(storage_types));
   } else {
     g.attrs["storage_type"] = std::make_shared<dmlc::any>(std::move(storage_types));
-    g = exec::InferStorageType(std::move(g));
+    g                       = exec::InferStorageType(std::move(g));
   }
   CHECK_EQ(g.GetAttr<size_t>("storage_type_num_unknown_nodes"), 0U);
   return false;
 }
 
-
 inline std::vector<Context> PlaceDevice(const nnvm::IndexedGraph& idx) {
   static const auto& _copyto = Op::Get("_copyto");
 
-  std::vector<Context> vctx(
-      idx.num_nodes(), Context::Create(static_cast<Context::DeviceType>(-1), 0));
+  std::vector<Context> vctx(idx.num_nodes(),
+                            Context::Create(static_cast<Context::DeviceType>(-1), 0));
   // forward pass
   for (size_t i = 0; i < idx.num_nodes(); ++i) {
     if (!idx[i].source->info.empty()) {
@@ -990,7 +1035,8 @@ inline std::vector<Context> PlaceDevice(const nnvm::IndexedGraph& idx) {
       vctx[i] = vctx[idx[i].control_deps[0]];
     } else {
       for (const auto& in : idx[i].inputs) {
-        if (vctx[in.node_id].dev_type == static_cast<Context::DeviceType>(-1)) continue;
+        if (vctx[in.node_id].dev_type == static_cast<Context::DeviceType>(-1))
+          continue;
         vctx[i] = vctx[in.node_id];
         break;
       }
@@ -998,10 +1044,12 @@ inline std::vector<Context> PlaceDevice(const nnvm::IndexedGraph& idx) {
   }
   // backward pass
   for (int i = idx.num_nodes() - 1; i >= 0; --i) {
-    if (vctx[i].dev_type == static_cast<Context::DeviceType>(-1)) continue;
+    if (vctx[i].dev_type == static_cast<Context::DeviceType>(-1))
+      continue;
     if (idx[i].source->op() == _copyto) {
       auto in_nid = idx[i].inputs[0].node_id;
-      if (vctx[in_nid].dev_type != static_cast<Context::DeviceType>(-1)) continue;
+      if (vctx[in_nid].dev_type != static_cast<Context::DeviceType>(-1))
+        continue;
       CHECK_GT(idx[i].source->control_deps.size(), 0);
       auto fwd_nid = idx.node_id(idx[i].source->control_deps[0].get());
       CHECK_EQ(idx[fwd_nid].source->op(), _copyto);
@@ -1009,7 +1057,8 @@ inline std::vector<Context> PlaceDevice(const nnvm::IndexedGraph& idx) {
       continue;
     }
     for (const auto& j : idx[i].inputs) {
-      if (vctx[j.node_id].dev_type != static_cast<Context::DeviceType>(-1)) continue;
+      if (vctx[j.node_id].dev_type != static_cast<Context::DeviceType>(-1))
+        continue;
       vctx[j.node_id] = vctx[i];
     }
   }
@@ -1024,32 +1073,31 @@ inline std::vector<Context> PlaceDevice(const nnvm::IndexedGraph& idx) {
   return vctx;
 }
 
-
-inline MemoryPlanVector MXPlanMemory(
-    nnvm::Graph* p_g,
-    nnvm::StorageVector&& storage,
-    const std::vector<uint32_t>& ref_count,
-    const std::string& storage_plan,
-    const std::pair<uint32_t, uint32_t>& node_range = {0, 0},
-    const std::pair<uint32_t, uint32_t>& entry_range = {0, 0},
-    bool detect_inplace_addto = false) {
+inline MemoryPlanVector MXPlanMemory(nnvm::Graph* p_g,
+                                     nnvm::StorageVector&& storage,
+                                     const std::vector<uint32_t>& ref_count,
+                                     const std::string& storage_plan,
+                                     const std::pair<uint32_t, uint32_t>& node_range  = {0, 0},
+                                     const std::pair<uint32_t, uint32_t>& entry_range = {0, 0},
+                                     bool detect_inplace_addto                        = false) {
   using namespace nnvm;
-  nnvm::Graph& g = *p_g;
+  nnvm::Graph& g  = *p_g;
   const auto& idx = g.indexed_graph();
   if (node_range.second > node_range.first) {
     g.attrs["node_range"] = std::make_shared<dmlc::any>(node_range);
   }
   g.attrs["ref_count"] = std::make_shared<dmlc::any>(ref_count);
-  g.attrs["storage"] = std::make_shared<dmlc::any>(std::move(storage));
-  g = nnvm::ApplyPass(g, "MXPlanMemory");
-  if (detect_inplace_addto) g = exec::DetectInplaceAddTo(g);
+  g.attrs["storage"]   = std::make_shared<dmlc::any>(std::move(storage));
+  g                    = nnvm::ApplyPass(g, "MXPlanMemory");
+  if (detect_inplace_addto)
+    g = exec::DetectInplaceAddTo(g);
 
-  const auto& dtypes = g.GetAttr<DTypeVector>("dtype");
-  const auto& shapes = g.GetAttr<mxnet::ShapeVector>("shape");
+  const auto& dtypes          = g.GetAttr<DTypeVector>("dtype");
+  const auto& shapes          = g.GetAttr<mxnet::ShapeVector>("shape");
   const auto& storage_inplace = g.GetAttr<std::vector<int> >("storage_inplace_index");
-  g.attrs[storage_plan] = std::make_shared<any>(storage_inplace);
-  const auto& storage_ids = g.GetAttr<StorageVector>("storage_id");
-  uint32_t entry_start = entry_range.first;
+  g.attrs[storage_plan]       = std::make_shared<any>(storage_inplace);
+  const auto& storage_ids     = g.GetAttr<StorageVector>("storage_id");
+  uint32_t entry_start        = entry_range.first;
   uint32_t entry_end =
       entry_range.second > entry_start ? entry_range.second : idx.num_node_entries();
   MemoryPlanVector mem_plan(idx.num_node_entries());
@@ -1061,29 +1109,28 @@ inline MemoryPlanVector MXPlanMemory(
     } else if (!sid_to_root.count(storage_ids[i])) {
       CHECK_LT(storage_inplace[i], 0);
       sid_to_root[storage_ids[i]] = i;
-      mem_plan[i] = {storage_ids[i], i,
-                     mshadow::mshadow_sizeof(dtypes[i]) * shapes[i].Size(),
-                     false};
+      mem_plan[i]                 = {
+          storage_ids[i], i, mshadow::mshadow_sizeof(dtypes[i]) * shapes[i].Size(), false};
     } else {
       uint32_t root = sid_to_root[storage_ids[i]];
-      mem_plan[i] = {storage_ids[i], root, 0, storage_inplace[i] >= 0};
-      mem_plan[root].size = std::max(mem_plan[root].size,
-          mshadow::mshadow_sizeof(dtypes[i]) * shapes[i].Size());
+      mem_plan[i]   = {storage_ids[i], root, 0, storage_inplace[i] >= 0};
+      mem_plan[root].size =
+          std::max(mem_plan[root].size, mshadow::mshadow_sizeof(dtypes[i]) * shapes[i].Size());
     }
   }
 
   return mem_plan;
 }
 
-
 inline std::multimap<size_t, NDArray> AllocateMemory(
     const nnvm::Graph& g,
     const nnvm::IndexedGraph& idx,
     const Context& default_ctx,
-    const uint32_t entry_start, const uint32_t entry_end,
+    const uint32_t entry_start,
+    const uint32_t entry_end,
     const MemoryPlanVector& mem_plan,
     const std::vector<NDArray*>& arrays,
-    std::vector<OpReqType> *array_reqs,
+    std::vector<OpReqType>* array_reqs,
     std::multimap<size_t, NDArray>&& pool = std::multimap<size_t, NDArray>()) {
   using namespace nnvm;
   const auto& dtypes = g.GetAttr<DTypeVector>("dtype");
@@ -1102,18 +1149,19 @@ inline std::multimap<size_t, NDArray> AllocateMemory(
         continue;
       }
       data_entry_profiler_scopes[eid - entry_start] = profiler_scope;
-      data_entry_names[eid - entry_start] = idx[nid].source->attrs.name;
+      data_entry_names[eid - entry_start]           = idx[nid].source->attrs.name;
     }
   }
 
-  const NDArray *pntr;
+  const NDArray* pntr;
   for (uint32_t i = entry_start; i < entry_end; ++i) {
-    const auto &plan = mem_plan[i];
-    if (plan.storage_id == exec::kExternalStorageID) continue;
+    const auto& plan = mem_plan[i];
+    if (plan.storage_id == exec::kExternalStorageID)
+      continue;
     CHECK(arrays[i]->is_none());
     if (plan.storage_id == exec::kDynamicStorageID) {
-      *arrays[i] = NDArray(static_cast<NDArrayStorageType>(stypes[i]),
-                           shapes[i], default_ctx, true, dtypes[i]);
+      *arrays[i] = NDArray(
+          static_cast<NDArrayStorageType>(stypes[i]), shapes[i], default_ctx, true, dtypes[i]);
       arrays[i]->AssignStorageInfo(data_entry_profiler_scopes[i - entry_start],
                                    data_entry_names[i - entry_start]);
       continue;
@@ -1126,7 +1174,9 @@ inline std::multimap<size_t, NDArray> AllocateMemory(
         pool.erase(iter);
       } else {
         NDArray buff(mxnet::TShape({static_cast<nnvm::dim_t>(plan.size)}),
-                     default_ctx, true, mshadow::kUint8);
+                     default_ctx,
+                     true,
+                     mshadow::kUint8);
         buff.AssignStorageInfo(data_entry_profiler_scopes[i - entry_start],
                                data_entry_names[i - entry_start]);
         pntr = &new_pool.insert({plan.size, buff})->second;
@@ -1143,13 +1193,12 @@ inline std::multimap<size_t, NDArray> AllocateMemory(
   return new_pool;
 }
 
-inline void SetupOpExec(
-    const nnvm::Graph& g,
-    size_t nid,
-    const std::shared_ptr<exec::OpExecutor>& exec,
-    const std::vector<NDArray*> arrays,
-    const std::vector<OpReqType> array_reqs) {
-  const auto& idx = g.indexed_graph();
+inline void SetupOpExec(const nnvm::Graph& g,
+                        size_t nid,
+                        const std::shared_ptr<exec::OpExecutor>& exec,
+                        const std::vector<NDArray*> arrays,
+                        const std::vector<OpReqType> array_reqs) {
+  const auto& idx   = g.indexed_graph();
   const auto& inode = idx[nid];
   CHECK_EQ(exec->in_array.size(), 0U);
   CHECK_EQ(exec->out_array.size(), 0U);
@@ -1195,24 +1244,25 @@ inline Engine::OprHandle CreateEngineOp(
 
   // dedup vars
   Engine::Get()->DeduplicateVarHandle(&use_vars, &mutate_vars);
-  bool is_gpu = default_ctx.dev_mask() == gpu::kDevMask;
+  bool is_gpu   = default_ctx.dev_mask() == gpu::kDevMask;
   bool is_async = execs.size() > 1 ? false : execs[0]->exec_type() == ExecType::kAsync;
 
-  auto exec_fun = [execs, is_async, is_gpu] (
-      RunContext ctx, Engine::CallbackOnComplete on_complete) {
+  auto exec_fun = [execs, is_async, is_gpu](RunContext ctx,
+                                            Engine::CallbackOnComplete on_complete) {
     if (is_async) {
       execs[0]->op_ctx.async_on_complete = on_complete;
     }
-    for (const auto& exec : execs) exec->Run(ctx, is_gpu);
+    for (const auto& exec : execs)
+      exec->Run(ctx, is_gpu);
     // call on complete only if it is async op
     if (!is_async) {
       if (is_gpu) {
-      #if MXNET_USE_CUDA
+#if MXNET_USE_CUDA
         // Wait GPU kernel to finish.
         ctx.get_stream<gpu>()->Wait();
-      #else
+#else
         LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
-      #endif
+#endif
       }
       on_complete();
     }
@@ -1222,26 +1272,27 @@ inline Engine::OprHandle CreateEngineOp(
       exec_fun, use_vars, mutate_vars, FnProperty::kNormal, opr_names);
 }
 
-inline void CreateEngineOpSeg(
-    const nnvm::IndexedGraph& idx,
-    const Context default_ctx,
-    const size_t start_nid,
-    const size_t end_nid,
-    const size_t bulk_size,
-    const std::vector<std::shared_ptr<exec::OpExecutor> >& execs,
-    const std::vector<int> skip_plus_node,
-    std::vector<EngineOprSeg> *opr_segs) {
+inline void CreateEngineOpSeg(const nnvm::IndexedGraph& idx,
+                              const Context default_ctx,
+                              const size_t start_nid,
+                              const size_t end_nid,
+                              const size_t bulk_size,
+                              const std::vector<std::shared_ptr<exec::OpExecutor> >& execs,
+                              const std::vector<int> skip_plus_node,
+                              std::vector<EngineOprSeg>* opr_segs) {
   size_t seg_start = start_nid;
   std::vector<std::shared_ptr<exec::OpExecutor> > seg_execs;
   std::string opr_names;
   for (size_t nid = start_nid; nid < end_nid; ++nid) {
     const auto& node = idx[nid];
-    if (node.source->is_variable()) continue;
-    if (skip_plus_node.size() && skip_plus_node[nid]) continue;
-    auto& exec = execs[nid];
-    const auto &op_name = node.source->op()->name;
-    bool is_async = exec->exec_type() != ExecType::kSync;
-    bool valid = exec->out_array.size() > 0;
+    if (node.source->is_variable())
+      continue;
+    if (skip_plus_node.size() && skip_plus_node[nid])
+      continue;
+    auto& exec          = execs[nid];
+    const auto& op_name = node.source->op()->name;
+    bool is_async       = exec->exec_type() != ExecType::kSync;
+    bool valid          = exec->out_array.size() > 0;
 
     // Stop at async nodes and invalid node (due to input/output is not allocated)
     bool stop = is_async || !valid || seg_execs.size() >= bulk_size;
@@ -1261,7 +1312,8 @@ inline void CreateEngineOpSeg(
     }
 
     seg_execs.push_back(exec);
-    if (opr_names.size()) opr_names += ",";
+    if (opr_names.size())
+      opr_names += ",";
     opr_names += op_name;
 
     auto& seg = (*opr_segs)[nid];
@@ -1290,34 +1342,35 @@ inline void CreateEngineOpSeg(
   }
 }
 
-
 void RunGraph(const bool retain_graph,
               const nnvm::IndexedGraph& idx,
               const std::vector<NDArray*>& arrays,
-              size_t node_start, size_t node_end,
+              size_t node_start,
+              size_t node_end,
               std::vector<OpReqType>&& array_reqs,
               std::vector<uint32_t>&& ref_count,
-              std::vector<OpStatePtr> *p_states,
-              const DispatchModeVector &dispatch_modes,
+              std::vector<OpStatePtr>* p_states,
+              const DispatchModeVector& dispatch_modes,
               bool recording,
-              mxnet::ShapeVector *shapes = nullptr,
+              mxnet::ShapeVector* shapes          = nullptr,
               const CachedOpMonCallback& callback = nullptr,
-              const bool monitor_all_ = false);
+              const bool monitor_all_             = false);
 
 void NaiveRunGraph(const bool retain_graph,
                    const Context& default_ctx,
                    const nnvm::IndexedGraph& idx,
                    const std::vector<NDArray*>& arrays,
-                   size_t node_start, size_t node_end,
+                   size_t node_start,
+                   size_t node_end,
                    std::vector<OpReqType>&& array_reqs,
                    std::vector<uint32_t>&& ref_count,
-                   std::vector<OpStatePtr> *p_states,
-                   const DispatchModeVector &dispatch_modes,
+                   std::vector<OpStatePtr>* p_states,
+                   const DispatchModeVector& dispatch_modes,
                    bool recording,
-                   mxnet::ShapeVector *shapes,
+                   mxnet::ShapeVector* shapes,
                    const CachedOpMonCallback& callback = nullptr,
-                   const bool monitor_all_ = false,
-                   const bool skip_engine = false);
+                   const bool monitor_all_             = false,
+                   const bool skip_engine              = false);
 
 }  // namespace imperative
 }  // namespace mxnet
diff --git a/src/imperative/infer_graph_attr_pass.cc b/src/imperative/infer_graph_attr_pass.cc
index d5d969618f87..13d0e07c174c 100644
--- a/src/imperative/infer_graph_attr_pass.cc
+++ b/src/imperative/infer_graph_attr_pass.cc
@@ -32,7 +32,7 @@
 namespace mxnet {
 namespace exec {
 
-template<typename AttrType, typename FInfer>
+template <typename AttrType, typename FInfer>
 bool ApplyOpInferAttr(const nnvm::Graph& g,
                       const FInfer& finfer,
                       const NodeAttrs& attrs,
@@ -43,7 +43,7 @@ bool ApplyOpInferAttr(const nnvm::Graph& g,
   return finfer(attrs, in_attrs, out_attrs);
 }
 
-template<>
+template <>
 bool ApplyOpInferAttr<int, FInferStorageType>(const nnvm::Graph& g,
                                               const FInferStorageType& finfer,
                                               const NodeAttrs& attrs,
@@ -63,18 +63,17 @@ bool ApplyOpInferAttr<int, FInferStorageType>(const nnvm::Graph& g,
   return true;
 }
 
-template<typename AttrType, typename IsNone>
+template <typename AttrType, typename IsNone>
 inline void GetAttrFromForwardNode(const uint32_t nid,
-                                   const nnvm::IndexedGraph &idx,
+                                   const nnvm::IndexedGraph& idx,
                                    std::vector<AttrType>* rshape_ptr,
                                    std::vector<bool>* inference_finished,
                                    IsNone fis_none) {
-  std::vector<AttrType>& rshape = *rshape_ptr;
+  std::vector<AttrType>& rshape         = *rshape_ptr;
   const nnvm::IndexedGraph::Node& inode = idx[nid];
   // gradient function, used to get node correspondence.
-  static auto& fgrad =
-      Op::GetAttr<nnvm::FGradient>("FGradient");
-  nnvm::ObjectPtr fwd_ptr = inode.source->control_deps[0];
+  static auto& fgrad                    = Op::GetAttr<nnvm::FGradient>("FGradient");
+  nnvm::ObjectPtr fwd_ptr               = inode.source->control_deps[0];
   const nnvm::IndexedGraph::Node& fnode = idx[inode.control_deps[0]];
   // use gradient function to find out the correspondence.
   std::vector<nnvm::NodeEntry> ograd(fwd_ptr->num_outputs());
@@ -83,8 +82,8 @@ inline void GetAttrFromForwardNode(const uint32_t nid,
   }
   // input gradient list
   const std::vector<nnvm::NodeEntry>& igrad = fgrad[fwd_ptr->op()](fwd_ptr, ograd);
-  const nnvm::Node* igrad_node = nullptr;
-  bool all_attrs_known = true;
+  const nnvm::Node* igrad_node              = nullptr;
+  bool all_attrs_known                      = true;
   // Input gradient assignement
   for (size_t i = 0; i < igrad.size(); ++i) {
     if (igrad[i].node->op() == inode.source->op()) {
@@ -110,8 +109,8 @@ inline void GetAttrFromForwardNode(const uint32_t nid,
     }
   }
   // out grad entries
-  CHECK(igrad_node != nullptr)
-    << "Cannot find matching backward op for " << inode.source->attrs.name;
+  CHECK(igrad_node != nullptr) << "Cannot find matching backward op for "
+                               << inode.source->attrs.name;
   for (size_t i = 0; i < igrad_node->inputs.size(); ++i) {
     const nnvm::NodeEntry& e = igrad_node->inputs[i];
     if (e.node == nullptr) {
@@ -128,7 +127,7 @@ inline void GetAttrFromForwardNode(const uint32_t nid,
   (*inference_finished)[nid] = all_attrs_known;
 }
 
-template<typename FAccessSubgraphType, typename AttrType, typename IsNone>
+template <typename FAccessSubgraphType, typename AttrType, typename IsNone>
 void GetAttrFromFusedNode(uint32_t nid,
                           const nnvm::IndexedGraph& idx,
                           std::vector<AttrType>* rshape_ptr,
@@ -136,20 +135,18 @@ void GetAttrFromFusedNode(uint32_t nid,
                           IsNone fis_none,
                           const std::string& infer_fusion_name) {
   std::vector<AttrType>& rshape = *rshape_ptr;
-  const auto& inode = idx[nid];
+  const auto& inode             = idx[nid];
   // gradient function, used to get node correspondence.
-  static auto& fgrad =
-      Op::GetAttr<nnvm::FGradient>("FGradient");
-  nnvm::ObjectPtr fused_fwd_ptr = inode.source->control_deps[0];
-  static auto& finfer_fused_shape =
-    Op::GetAttr<FAccessSubgraphType>(infer_fusion_name);
-  auto finfer = finfer_fused_shape.get(fused_fwd_ptr->op(), nullptr);
-  CHECK(finfer != nullptr) << "Operator " << fused_fwd_ptr->attrs.name <<
-    " is marked as Fusion but does not allow accessing attributes";
+  static auto& fgrad              = Op::GetAttr<nnvm::FGradient>("FGradient");
+  nnvm::ObjectPtr fused_fwd_ptr   = inode.source->control_deps[0];
+  static auto& finfer_fused_shape = Op::GetAttr<FAccessSubgraphType>(infer_fusion_name);
+  auto finfer                     = finfer_fused_shape.get(fused_fwd_ptr->op(), nullptr);
+  CHECK(finfer != nullptr) << "Operator " << fused_fwd_ptr->attrs.name
+                           << " is marked as Fusion but does not allow accessing attributes";
   const auto& inferred_attrs = finfer(fused_fwd_ptr->attrs);
-  const auto& fwd_ptr = std::get<0>(inferred_attrs);
-  const auto& input_attrs = std::get<1>(inferred_attrs);
-  const auto& output_attrs = std::get<2>(inferred_attrs);
+  const auto& fwd_ptr        = std::get<0>(inferred_attrs);
+  const auto& input_attrs    = std::get<1>(inferred_attrs);
+  const auto& output_attrs   = std::get<2>(inferred_attrs);
 
   // use gradient function to find out the correspondence.
   std::vector<nnvm::NodeEntry> ograd(fwd_ptr->num_outputs());
@@ -158,8 +155,8 @@ void GetAttrFromFusedNode(uint32_t nid,
   }
   // input gradient list
   const std::vector<nnvm::NodeEntry>& igrad = fgrad[fwd_ptr->op()](fwd_ptr, ograd);
-  const nnvm::Node* igrad_node = nullptr;
-  bool all_attrs_known = true;
+  const nnvm::Node* igrad_node              = nullptr;
+  bool all_attrs_known                      = true;
   // Set the attributes of output gradients
   // using attributes of forward node inputs
   for (size_t i = 0; i < igrad.size(); ++i) {
@@ -188,8 +185,8 @@ void GetAttrFromFusedNode(uint32_t nid,
 
   // Set the attributes of input gradients
   // using attributes of forward node outputs
-  CHECK(igrad_node != nullptr)
-    << "Cannot find matching backward op for " << inode.source->attrs.name;
+  CHECK(igrad_node != nullptr) << "Cannot find matching backward op for "
+                               << inode.source->attrs.name;
   for (size_t i = 0; i < igrad_node->inputs.size(); ++i) {
     const nnvm::NodeEntry& e = igrad_node->inputs[i];
     if (e.node == nullptr) {
@@ -217,9 +214,9 @@ void ProvideAttrToFusion(const uint32_t nid,
   for (const auto& dep_node : inode.source->control_deps) {
     in_attrs.push_back({});
     out_attrs.push_back({});
-    auto &current_in_attrs = in_attrs.back();
-    auto &current_out_attrs = out_attrs.back();
-    uint32_t dep_node_id = idx.node_id(dep_node.get());
+    auto& current_in_attrs  = in_attrs.back();
+    auto& current_out_attrs = out_attrs.back();
+    uint32_t dep_node_id    = idx.node_id(dep_node.get());
     for (const auto& e : idx[dep_node_id].inputs) {
       current_in_attrs.push_back(rshape[idx.entry_id(e)]);
     }
@@ -228,10 +225,10 @@ void ProvideAttrToFusion(const uint32_t nid,
     }
   }
   auto provide =
-    Op::GetAttr<FProvideSubgraphType>(provide_fusion_name).get(inode.source->op(), nullptr);
-  CHECK(provide != nullptr) <<
-    "Encountered Fusion operator that does not implement providing subgraph attr " <<
-    provide_fusion_name << ".";
+      Op::GetAttr<FProvideSubgraphType>(provide_fusion_name).get(inode.source->op(), nullptr);
+  CHECK(provide != nullptr)
+      << "Encountered Fusion operator that does not implement providing subgraph attr "
+      << provide_fusion_name << ".";
   provide(inode.source->attrs, inode.source->control_deps, in_attrs, out_attrs);
 }
 
@@ -263,9 +260,13 @@ void ProvideAttrToFusion(const uint32_t nid,
  * \param default_mode_val default value of the dispatch mode attribute on the node. Used
  *                         for storage type inference
  */
-template<typename AttrType, typename FInferType, typename FAccessSubgraphType,
-         typename FProvideSubgraphType, typename IsNone, typename FDefault>
-nnvm::Graph InferAttr(nnvm::Graph &&ret,
+template <typename AttrType,
+          typename FInferType,
+          typename FAccessSubgraphType,
+          typename FProvideSubgraphType,
+          typename IsNone,
+          typename FDefault>
+nnvm::Graph InferAttr(nnvm::Graph&& ret,
                       const AttrType empty_val,
                       const char* infer_name,
                       const char* infer_fusion_name,
@@ -281,15 +282,13 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
                       const DispatchMode default_mode_val = DispatchMode::kUndefined) {
   using nnvm::IndexedGraph;
   using nnvm::Op;
-  using AttrVector = std::vector<AttrType>;
+  using AttrVector     = std::vector<AttrType>;
   using NodeAttrVector = std::vector<DispatchMode>;
   using dmlc::any;
 
-  const IndexedGraph& idx = ret.indexed_graph();
-  static auto& finfer_shape =
-      Op::GetAttr<FInferType>(infer_name);
-  static auto& is_backward =
-      Op::GetAttr<nnvm::TIsBackward>("TIsBackward");
+  const IndexedGraph& idx   = ret.indexed_graph();
+  static auto& finfer_shape = Op::GetAttr<FInferType>(infer_name);
+  static auto& is_backward  = Op::GetAttr<nnvm::TIsBackward>("TIsBackward");
   // reshape shape vector
   AttrVector rshape;
   // vector holding information which operators
@@ -316,7 +315,7 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
   std::string shape_hints_key = std::string(attr_name) + "_hints";
   if (ret.attrs.count(shape_hints_key)) {
     nnvm::NodeEntryMap<AttrType> shape_hints =
-      ret.GetAttr<nnvm::NodeEntryMap<AttrType>>(shape_hints_key);
+        ret.GetAttr<nnvm::NodeEntryMap<AttrType>>(shape_hints_key);
     for (const auto& kv : shape_hints) {
       nnvm::NodeEntry e = kv.first;
       if (idx.exist(e.node.get())) {
@@ -335,18 +334,18 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
   // limit inference to part of the graph
   uint32_t node_start = 0, node_end = idx.num_nodes();
   if (ret.attrs.count("node_range")) {
-    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t> >("node_range");
-    node_start = range.first;
-    node_end = range.second;
+    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t>>("node_range");
+    node_start        = range.first;
+    node_end          = range.second;
     CHECK_GE(node_start, 0);
     CHECK_LE(node_end, idx.num_nodes());
     ret.attrs.erase("node_range");
   }
   uint32_t entry_start = 0, entry_end = idx.num_node_entries();
   if (ret.attrs.count("entry_range")) {
-    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t> >("entry_range");
-    entry_start = range.first;
-    entry_end = range.second;
+    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t>>("entry_range");
+    entry_start       = range.first;
+    entry_end         = range.second;
     CHECK_GE(entry_start, 0);
     CHECK_LE(entry_end, idx.num_node_entries());
     ret.attrs.erase("entry_range");
@@ -365,9 +364,10 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
 
   // inference step function for nid
   auto infer_step = [&](uint32_t nid, bool last_iter) {
-    if (inference_finished[nid]) return;
-    const auto& inode = idx[nid];
-    const uint32_t num_inputs = inode.inputs.size();
+    if (inference_finished[nid])
+      return;
+    const auto& inode          = idx[nid];
+    const uint32_t num_inputs  = inode.inputs.size();
     const uint32_t num_outputs = inode.source->num_outputs();
     if (inode.source->is_variable()) {
       // Variable node. No operator. Only one output entry.
@@ -388,12 +388,12 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
       if (dispatch_mode_name != nullptr) {
         op::dispatch_mode_assign(&dispatch_modes[nid], default_mode_val);
       }
-    } else if (is_backward.get(inode.source->op(), false) &&
-               inode.source->control_deps.size() && bwd_identity_assign) {
+    } else if (is_backward.get(inode.source->op(), false) && inode.source->control_deps.size() &&
+               bwd_identity_assign) {
       CHECK(dispatch_mode_name == nullptr)
-        << "Backward inference for node attributes is not available";
+          << "Backward inference for node attributes is not available";
       CHECK_GE(inode.source->control_deps.size(), 1U)
-        << "BackwardOp need to have control_deps to its forward op";
+          << "BackwardOp need to have control_deps to its forward op";
       nnvm::ObjectPtr fwd_ptr = inode.source->control_deps[0];
       CHECK(fwd_ptr->op() != nullptr) << "Forward op cannot be a variable";
 
@@ -401,8 +401,8 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
       if (!is_fusion_helper.get(fwd_ptr->op(), false)) {
         GetAttrFromForwardNode(nid, idx, &rshape, &inference_finished, fis_none);
       } else {
-        GetAttrFromFusedNode<FAccessSubgraphType>(nid, idx, &rshape, &inference_finished,
-                                                  fis_none, infer_fusion_name);
+        GetAttrFromFusedNode<FAccessSubgraphType>(
+            nid, idx, &rshape, &inference_finished, fis_none, infer_fusion_name);
       }
     } else {
       DispatchMode* dispatch_mode = nullptr;
@@ -426,14 +426,15 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
           if (is_fusion.get(inode.source->op(), false)) {
             ProvideAttrToFusion<FProvideSubgraphType>(nid, idx, rshape, provide_fusion_name);
           }
-          ApplyOpInferAttr(ret, finfer, inode.source->attrs,
-                           nid, &ishape, &oshape, dispatch_mode);
+          ApplyOpInferAttr(ret, finfer, inode.source->attrs, nid, &ishape, &oshape, dispatch_mode);
           bool finished = true;
           for (const auto& attr : ishape) {
-            if (fis_none(attr)) finished = false;
+            if (fis_none(attr))
+              finished = false;
           }
           for (const auto& attr : oshape) {
-            if (fis_none(attr)) finished = false;
+            if (fis_none(attr))
+              finished = false;
           }
           inference_finished[nid] = finished;
         } catch (const std::exception& e) {
@@ -455,10 +456,9 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
         }
         inference_finished[nid] = all_attrs_known;
         if (!all_attrs_known) {
-          CHECK(!last_iter)
-              << "Attribute " << infer_name
-              << " is not registered by op " << inode.source->op()->name
-              << ". We are not able to complete the inference because of this";
+          CHECK(!last_iter) << "Attribute " << infer_name << " is not registered by op "
+                            << inode.source->op()->name
+                            << ". We are not able to complete the inference because of this";
         }
       }
       // Save to the result map.
@@ -473,11 +473,11 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
 
   size_t last_num_unknown;
   size_t num_unknown_dispatch_mode = dispatch_mode_name ? node_end - node_start : 0;
-  size_t num_unknown_entry_attr = entry_end - entry_start;
-  size_t num_unknown = num_unknown_entry_attr + num_unknown_dispatch_mode;
-  bool last_iter = false;
-  bool do_next_iteration = true;
-  int i = 0;
+  size_t num_unknown_entry_attr    = entry_end - entry_start;
+  size_t num_unknown               = num_unknown_entry_attr + num_unknown_dispatch_mode;
+  bool last_iter                   = false;
+  bool do_next_iteration           = true;
+  int i                            = 0;
   do {
     if (i % 2 == 0) {
       for (uint32_t nid = node_start; nid < node_end; ++nid) {
@@ -490,7 +490,7 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
       }
     }
     last_num_unknown = num_unknown;
-    num_unknown = 0;
+    num_unknown      = 0;
     for (size_t j = entry_start; j < entry_end; ++j) {
       if (fis_none(rshape[j])) {
         ++num_unknown;
@@ -498,7 +498,8 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
     }
     if (dispatch_mode_name) {
       for (size_t i = node_start; i < node_end; i++) {
-        if (dispatch_modes[i] == DispatchMode::kUndefined) ++num_unknown;
+        if (dispatch_modes[i] == DispatchMode::kUndefined)
+          ++num_unknown;
       }
     }
     do_next_iteration = num_unknown > 0 && last_num_unknown > num_unknown;
@@ -549,8 +550,8 @@ nnvm::Graph InferAttr(nnvm::Graph &&ret,
  * \param default_mode_val default value of the dispatch mode attribute on the node. Used
  *                         for storage type inference
  */
-template<typename IsNone, typename FDefault, typename FNumUnknown>
-nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
+template <typename IsNone, typename FDefault, typename FNumUnknown>
+nnvm::Graph InferShapeAttr(nnvm::Graph&& ret,
                            const mxnet::TShape empty_val,
                            const char* infer_name,
                            const char* input_name,
@@ -565,16 +566,14 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
                            const DispatchMode default_mode_val = DispatchMode::kUndefined) {
   using nnvm::IndexedGraph;
   using nnvm::Op;
-  using AttrType = mxnet::TShape;
-  using FInferType = mxnet::FInferShape;
-  using AttrVector = std::vector<AttrType>;
+  using AttrType       = mxnet::TShape;
+  using FInferType     = mxnet::FInferShape;
+  using AttrVector     = std::vector<AttrType>;
   using NodeAttrVector = std::vector<DispatchMode>;
   using dmlc::any;
-  const IndexedGraph& idx = ret.indexed_graph();
-  static auto& finfer_shape =
-      Op::GetAttr<FInferType>(infer_name);
-  static auto& is_backward =
-      Op::GetAttr<nnvm::TIsBackward>("TIsBackward");
+  const IndexedGraph& idx   = ret.indexed_graph();
+  static auto& finfer_shape = Op::GetAttr<FInferType>(infer_name);
+  static auto& is_backward  = Op::GetAttr<nnvm::TIsBackward>("TIsBackward");
   // reshape shape vector
   AttrVector rshape;
   // vector holding information which operators
@@ -601,7 +600,7 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
   std::string shape_hints_key = std::string(attr_name) + "_hints";
   if (ret.attrs.count(shape_hints_key)) {
     nnvm::NodeEntryMap<AttrType> shape_hints =
-      ret.GetAttr<nnvm::NodeEntryMap<AttrType>>(shape_hints_key);
+        ret.GetAttr<nnvm::NodeEntryMap<AttrType>>(shape_hints_key);
     for (const auto& kv : shape_hints) {
       nnvm::NodeEntry e = kv.first;
       if (idx.exist(e.node.get())) {
@@ -620,18 +619,18 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
   // limit inference to part of the graph
   uint32_t node_start = 0, node_end = idx.num_nodes();
   if (ret.attrs.count("node_range")) {
-    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t> >("node_range");
-    node_start = range.first;
-    node_end = range.second;
+    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t>>("node_range");
+    node_start        = range.first;
+    node_end          = range.second;
     CHECK_GE(node_start, 0);
     CHECK_LE(node_end, idx.num_nodes());
     ret.attrs.erase("node_range");
   }
   uint32_t entry_start = 0, entry_end = idx.num_node_entries();
   if (ret.attrs.count("entry_range")) {
-    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t> >("entry_range");
-    entry_start = range.first;
-    entry_end = range.second;
+    const auto& range = ret.GetAttr<std::pair<uint32_t, uint32_t>>("entry_range");
+    entry_start       = range.first;
+    entry_end         = range.second;
     CHECK_GE(entry_start, 0);
     CHECK_LE(entry_end, idx.num_node_entries());
     ret.attrs.erase("entry_range");
@@ -657,10 +656,11 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
 
   // inference step function for nid
   auto infer_step = [&](uint32_t nid, bool last_iter) {
-    if (inference_finished[nid]) return;
-    const auto& inode = idx[nid];
-    const std::string name = inode.source->attrs.name;
-    const uint32_t num_inputs = inode.inputs.size();
+    if (inference_finished[nid])
+      return;
+    const auto& inode          = idx[nid];
+    const std::string name     = inode.source->attrs.name;
+    const uint32_t num_inputs  = inode.inputs.size();
     const uint32_t num_outputs = inode.source->num_outputs();
 
     if (inode.source->is_variable()) {
@@ -685,12 +685,12 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
       if (dispatch_mode_name != nullptr) {
         op::dispatch_mode_assign(&dispatch_modes[nid], default_mode_val);
       }
-    } else if (is_backward.get(inode.source->op(), false) &&
-               inode.source->control_deps.size() && bwd_identity_assign) {
+    } else if (is_backward.get(inode.source->op(), false) && inode.source->control_deps.size() &&
+               bwd_identity_assign) {
       CHECK(dispatch_mode_name == nullptr)
-        << "Backward inference for node attributes is not available";
+          << "Backward inference for node attributes is not available";
       CHECK_GE(inode.source->control_deps.size(), 1U)
-        << "BackwardOp need to have control_deps to its forward op";
+          << "BackwardOp need to have control_deps to its forward op";
       nnvm::ObjectPtr fwd_ptr = inode.source->control_deps[0];
       CHECK(fwd_ptr->op() != nullptr) << "Forward op cannot be a variable";
 
@@ -698,10 +698,8 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
       if (!is_fusion_helper.get(fwd_ptr->op(), false)) {
         GetAttrFromForwardNode(nid, idx, &rshape, &inference_finished, fis_none);
       } else {
-        GetAttrFromFusedNode<exec::FAccessSubgraphShape>(nid, idx, &rshape,
-                                                         &inference_finished,
-                                                         fis_none,
-                                                         "FAccessSubgraphShape");
+        GetAttrFromFusedNode<exec::FAccessSubgraphShape>(
+            nid, idx, &rshape, &inference_finished, fis_none, "FAccessSubgraphShape");
       }
     } else {
       DispatchMode* dispatch_mode = nullptr;
@@ -734,17 +732,18 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
         try {
           static auto& is_fusion = Op::GetAttr<exec::TIsFusion>("TIsFusion");
           if (is_fusion.get(inode.source->op(), false)) {
-            ProvideAttrToFusion<exec::FProvideSubgraphShape>(nid, idx, rshape,
-                                                             "FProvideSubgraphShape");
+            ProvideAttrToFusion<exec::FProvideSubgraphShape>(
+                nid, idx, rshape, "FProvideSubgraphShape");
           }
-          ApplyOpInferAttr(ret, finfer, inode.source->attrs,
-                           nid, &ishape, &oshape, dispatch_mode);
+          ApplyOpInferAttr(ret, finfer, inode.source->attrs, nid, &ishape, &oshape, dispatch_mode);
           bool finished = true;
           for (const auto& attr : ishape) {
-            if (fis_none(attr)) finished = false;
+            if (fis_none(attr))
+              finished = false;
           }
           for (const auto& attr : oshape) {
-            if (fis_none(attr)) finished = false;
+            if (fis_none(attr))
+              finished = false;
           }
           inference_finished[nid] = finished;
         } catch (const std::exception& e) {
@@ -762,8 +761,8 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
   };
 
   size_t last_num_unknown;
-  size_t num_unknown = static_cast<size_t>(-1);  // Infinity
-  bool last_iter = false;
+  size_t num_unknown     = static_cast<size_t>(-1);  // Infinity
+  bool last_iter         = false;
   bool do_next_iteration = true;
 
   int i = 0;
@@ -780,7 +779,7 @@ nnvm::Graph InferShapeAttr(nnvm::Graph &&ret,
       }
     }
     last_num_unknown = num_unknown;
-    num_unknown = 0;
+    num_unknown      = 0;
     for (size_t j = entry_start; j < entry_end; ++j) {
       if (fis_none(rshape[j])) {
         num_unknown += fnum_unknown(rshape[j]);
@@ -827,9 +826,13 @@ nnvm::Graph InferShape(nnvm::Graph&& graph,
     graph.attrs["shape_attr_key"] = std::make_shared<any>(shape_attr_key);
   }
   return InferShapeAttr(
-      std::move(graph), mxnet::TShape(),
-      "FInferShape", "shape_inputs", "shape_attr_key",
-      "shape", "shape_num_unknown_nodes",
+      std::move(graph),
+      mxnet::TShape(),
+      "FInferShape",
+      "shape_inputs",
+      "shape_attr_key",
+      "shape",
+      "shape_num_unknown_nodes",
       [](const mxnet::TShape& s) { return !mxnet::shape_is_known(s); },
       [](const mxnet::TShape& s) {
         if (!mxnet::ndim_is_known(s)) {
@@ -843,7 +846,9 @@ nnvm::Graph InferShape(nnvm::Graph&& graph,
         }
         return ret;
       },
-      nullptr, true, nullptr);
+      nullptr,
+      true,
+      nullptr);
 }
 
 nnvm::Graph InferType(nnvm::Graph&& graph,
@@ -856,13 +861,20 @@ nnvm::Graph InferType(nnvm::Graph&& graph,
   if (dtype_attr_key.length() != 0) {
     graph.attrs["dtype_attr_key"] = std::make_shared<any>(dtype_attr_key);
   }
-  return InferAttr<int, nnvm::FInferType, exec::FAccessSubgraphType,
-                   exec::FProvideSubgraphType>(
-      std::move(graph), -1,
-      "FInferType", "FAccessSubgraphType", "FProvideSubgraphType",
-      "dtype_inputs", "dtype_attr_key", "dtype", "dtype_num_unknown_nodes",
+  return InferAttr<int, nnvm::FInferType, exec::FAccessSubgraphType, exec::FProvideSubgraphType>(
+      std::move(graph),
+      -1,
+      "FInferType",
+      "FAccessSubgraphType",
+      "FProvideSubgraphType",
+      "dtype_inputs",
+      "dtype_attr_key",
+      "dtype",
+      "dtype_num_unknown_nodes",
       [](const int t) { return t == -1; },
-      common::SameType, true, nullptr);
+      common::SameType,
+      true,
+      nullptr);
 }
 
 nnvm::Graph InferStorageType(nnvm::Graph&& graph,
@@ -885,19 +897,30 @@ nnvm::Graph InferStorageType(nnvm::Graph&& graph,
     CHECK_GT(graph.attrs.count("context"), 0);
     DevMaskVector dev_masks(graph.indexed_graph().num_nodes());
     const ContextVector& vctx = graph.GetAttr<ContextVector>("context");
-    for (size_t i = 0; i < vctx.size(); i++) dev_masks[i] = vctx[i].dev_mask();
+    for (size_t i = 0; i < vctx.size(); i++)
+      dev_masks[i] = vctx[i].dev_mask();
     graph.attrs["dev_mask"] = std::make_shared<any>(std::move(dev_masks));
   }
 
   // for storage type, the backward attr is not necessarily the same as it's correspondence
-  nnvm::Graph ret = InferAttr<int, FInferStorageType, exec::FAccessSubgraphStorageType,
+  nnvm::Graph ret = InferAttr<int,
+                              FInferStorageType,
+                              exec::FAccessSubgraphStorageType,
                               exec::FProvideSubgraphStorageType>(
-      std::move(graph), -1,
-      "FInferStorageType", "FAccessSubgraphStorageType", "FProvideSubgraphStorageType",
-      "storage_type_inputs", "storage_type_attr_key", "storage_type",
+      std::move(graph),
+      -1,
+      "FInferStorageType",
+      "FAccessSubgraphStorageType",
+      "FProvideSubgraphStorageType",
+      "storage_type_inputs",
+      "storage_type_attr_key",
+      "storage_type",
       "storage_type_num_unknown_nodes",
       [](const int t) { return t == -1; },
-      common::DefaultStorageType, false, "dispatch_mode", DispatchMode::kVariable);
+      common::DefaultStorageType,
+      false,
+      "dispatch_mode",
+      DispatchMode::kVariable);
 
   // log the storage types and dispatch modes of the graph
   static bool log_verbose = dmlc::GetEnv("MXNET_INFER_STORAGE_TYPE_VERBOSE_LOGGING", false);
diff --git a/src/imperative/inplace_addto_detect_pass.cc b/src/imperative/inplace_addto_detect_pass.cc
index 4af2dcd66306..a087b210849c 100644
--- a/src/imperative/inplace_addto_detect_pass.cc
+++ b/src/imperative/inplace_addto_detect_pass.cc
@@ -33,12 +33,11 @@ namespace mxnet {
 namespace exec {
 
 Graph DetectInplaceAddTo(Graph g) {
-  nnvm::StorageVector storage_id =
-      g.MoveCopyAttr<nnvm::StorageVector>("storage_id");
+  nnvm::StorageVector storage_id = g.MoveCopyAttr<nnvm::StorageVector>("storage_id");
   std::vector<int> storage_inplace_index =
       g.MoveCopyAttr<std::vector<int> >("storage_inplace_index");
   static const Op* ewise_plus_op = Op::Get("_grad_add");
-  auto& idx = g.indexed_graph();
+  auto& idx                      = g.indexed_graph();
   // reference cont.
   std::vector<int> ref_count(idx.num_node_entries(), 0);
   std::vector<int> addto_entry(idx.num_node_entries(), 0);
@@ -48,35 +47,41 @@ Graph DetectInplaceAddTo(Graph g) {
     ++ref_count[idx.entry_id(e)];
   }
   for (uint32_t nid = 0; nid < idx.num_nodes(); ++nid) {
-    for (auto &e : idx[nid].inputs) {
+    for (auto& e : idx[nid].inputs) {
       ++ref_count[idx.entry_id(e)];
     }
   }
 
   for (uint32_t nid = 0; nid < idx.num_nodes(); ++nid) {
     const auto& inode = idx[nid];
-    if (inode.source->op() != ewise_plus_op) continue;
+    if (inode.source->op() != ewise_plus_op)
+      continue;
     int sid = storage_id[idx.entry_id(inode.inputs[0])];
-    if (sid != storage_id[idx.entry_id(nid, 0)]) continue;
-    if (idx[inode.inputs[0].node_id].source->is_variable()) continue;
-    if (idx[inode.inputs[1].node_id].source->is_variable()) continue;
-    uint32_t eid_rhs  = idx.entry_id(inode.inputs[1]);
-    if (ref_count[eid_rhs] != 1) continue;
-    if (inode.inputs[0].node_id >= inode.inputs[1].node_id) continue;
+    if (sid != storage_id[idx.entry_id(nid, 0)])
+      continue;
+    if (idx[inode.inputs[0].node_id].source->is_variable())
+      continue;
+    if (idx[inode.inputs[1].node_id].source->is_variable())
+      continue;
+    uint32_t eid_rhs = idx.entry_id(inode.inputs[1]);
+    if (ref_count[eid_rhs] != 1)
+      continue;
+    if (inode.inputs[0].node_id >= inode.inputs[1].node_id)
+      continue;
     // TODO(haibin) support inplace addto for Dynamic Storage
-    if (storage_id[eid_rhs] == kDynamicStorageID) continue;
+    if (storage_id[eid_rhs] == kDynamicStorageID)
+      continue;
     CHECK_NE(storage_id[eid_rhs], sid);
-    storage_id[eid_rhs] = sid;
-    addto_entry[eid_rhs] = 1;
+    storage_id[eid_rhs]            = sid;
+    addto_entry[eid_rhs]           = 1;
     storage_inplace_index[eid_rhs] = -1;
-    skip_plus_node[nid] = 1;
+    skip_plus_node[nid]            = 1;
   }
 
-  g.attrs["storage_id"] = std::make_shared<nnvm::any>(std::move(storage_id));
-  g.attrs["storage_inplace_index"] = std::make_shared<nnvm::any>(
-      std::move(storage_inplace_index));
-  g.attrs["addto_entry"] = std::make_shared<nnvm::any>(std::move(addto_entry));
-  g.attrs["skip_plus_node"] = std::make_shared<nnvm::any>(std::move(skip_plus_node));
+  g.attrs["storage_id"]            = std::make_shared<nnvm::any>(std::move(storage_id));
+  g.attrs["storage_inplace_index"] = std::make_shared<nnvm::any>(std::move(storage_inplace_index));
+  g.attrs["addto_entry"]           = std::make_shared<nnvm::any>(std::move(addto_entry));
+  g.attrs["skip_plus_node"]        = std::make_shared<nnvm::any>(std::move(skip_plus_node));
   return g;
 }
 
diff --git a/src/imperative/naive_cached_op.cc b/src/imperative/naive_cached_op.cc
index 8ca0b09cd109..851501d427f5 100644
--- a/src/imperative/naive_cached_op.cc
+++ b/src/imperative/naive_cached_op.cc
@@ -25,28 +25,23 @@
 #include "../operator/operator_common.h"
 #include "../operator/subgraph/common.h"
 
-
 namespace mxnet {
-OpStatePtr NaiveCachedOp::Forward(
-    const std::shared_ptr<CachedOp>& op_ptr,
-    const std::vector<NDArray*>& inputs,
-    const std::vector<NDArray*>& outputs,
-    const Context& default_ctx) {
-
+OpStatePtr NaiveCachedOp::Forward(const std::shared_ptr<CachedOp>& op_ptr,
+                                  const std::vector<NDArray*>& inputs,
+                                  const std::vector<NDArray*>& outputs,
+                                  const Context& default_ctx) {
   CHECK_EQ(inputs.size(), num_inputs());
 
   {
     auto state_ptr = GetCachedOpState(default_ctx);
-    auto& state = state_ptr.get_state<CachedOpState>();
+    auto& state    = state_ptr.get_state<CachedOpState>();
 
     const auto& idx = state.info.fwd_graph.indexed_graph();
     for (size_t i = 0; i < inputs.size(); ++i) {
       CHECK_EQ(inputs[i]->ctx(), default_ctx)
           << "CachedOp requires all inputs to live on the same context. But "
-          << idx[idx.input_nodes()[0]].source->attrs.name
-          << " is on " << default_ctx << " while "
-          << idx[idx.input_nodes()[i]].source->attrs.name
-          << " is on " << inputs[i]->ctx();
+          << idx[idx.input_nodes()[0]].source->attrs.name << " is on " << default_ctx << " while "
+          << idx[idx.input_nodes()[i]].source->attrs.name << " is on " << inputs[i]->ctx();
     }
   }
 
@@ -54,20 +49,20 @@ OpStatePtr NaiveCachedOp::Forward(
   try {
     // Initialize
     bool recording = false;
-    op_state = OpStatePtr::Create<DynamicRuntime>();
-    auto& runtime = op_state.get_state<DynamicRuntime>();
+    op_state       = OpStatePtr::Create<DynamicRuntime>();
+    auto& runtime  = op_state.get_state<DynamicRuntime>();
     {
       auto state_ptr = GetCachedOpState(default_ctx);
-      auto& state = state_ptr.get_state<CachedOpState>();
+      auto& state    = state_ptr.get_state<CachedOpState>();
       std::lock_guard<std::mutex> lock(state.mutex);
       SetForwardGraph(default_ctx, &state.info, recording, inputs);
       runtime.info.fwd_graph = state.info.fwd_graph;
       runtime.info.input_map = state.info.input_map;
     }
-    nnvm::Graph& g = runtime.info.fwd_graph;
+    nnvm::Graph& g  = runtime.info.fwd_graph;
     const auto& idx = g.indexed_graph();
-    auto& buff = runtime.buff;
-    auto& states = runtime.op_states;
+    auto& buff      = runtime.buff;
+    auto& states    = runtime.op_states;
 
     // Allocate entries
     buff.resize(idx.num_node_entries());
@@ -78,22 +73,35 @@ OpStatePtr NaiveCachedOp::Forward(
       arrays.push_back(&buffered_array);
     }
     std::vector<OpReqType> array_reqs(arrays.size(), kWriteTo);
-    const auto& dispatch_modes = g.GetAttr<DispatchModeVector>("dispatch_mode");
+    const auto& dispatch_modes    = g.GetAttr<DispatchModeVector>("dispatch_mode");
     const std::string& graph_type = recording ? FULL : FORWARD;
     std::vector<uint32_t> ref_count =
-      g.GetAttr<std::vector<uint32_t> >(AddPrefix(graph_type, REF_COUNT));
+        g.GetAttr<std::vector<uint32_t> >(AddPrefix(graph_type, REF_COUNT));
     for (size_t i = 0; i < idx.num_node_entries(); ++i) {
-      if (ref_count[i] == 0) array_reqs[i] = kNullOp;
+      if (ref_count[i] == 0)
+        array_reqs[i] = kNullOp;
     }
     CollectInputOutputNDRefs(g, inputs, runtime.info.input_map, outputs, &arrays);
 
     mxnet::ShapeVector shapes = g.GetAttr<mxnet::ShapeVector>("shape");
-    imperative::NaiveRunGraph(false, default_ctx, idx, arrays, 0, idx.num_nodes(),
-                  std::move(array_reqs), std::move(ref_count), &states,
-                  dispatch_modes, false, &shapes, nullptr, false, true);
+    imperative::NaiveRunGraph(false,
+                              default_ctx,
+                              idx,
+                              arrays,
+                              0,
+                              idx.num_nodes(),
+                              std::move(array_reqs),
+                              std::move(ref_count),
+                              &states,
+                              dispatch_modes,
+                              false,
+                              &shapes,
+                              nullptr,
+                              false,
+                              true);
     {
-      auto state_ptr = GetCachedOpState(default_ctx);
-      auto& state = state_ptr.get_state<CachedOpState>();
+      auto state_ptr    = GetCachedOpState(default_ctx);
+      auto& state       = state_ptr.get_state<CachedOpState>();
       auto copied_shape = shapes;
       std::lock_guard<std::mutex> lock(state.mutex);
       state.info.fwd_graph.attrs["shape"] = std::make_shared<dmlc::any>(std::move(copied_shape));
@@ -105,5 +113,4 @@ OpStatePtr NaiveCachedOp::Forward(
   return op_state;
 }
 
-
 }  // namespace mxnet
diff --git a/src/imperative/naive_cached_op.h b/src/imperative/naive_cached_op.h
index f762f0bcc92e..cd1365508f97 100644
--- a/src/imperative/naive_cached_op.h
+++ b/src/imperative/naive_cached_op.h
@@ -30,41 +30,36 @@
 #include <unordered_map>
 #include "./cached_op.h"
 
-
-
 namespace mxnet {
 /*! \brief NaiveCachedOp which does not involve engine which is useful when executed in parallel.
     It does not support advanced features of CachedOp, including backward/recording, etc...
  */
 class NaiveCachedOp : public CachedOp {
  public:
-  NaiveCachedOp(
-      const nnvm::Symbol &sym,
-      const std::vector<std::pair<std::string, std::string>> &flags) : CachedOp(sym, flags) {}
+  NaiveCachedOp(const nnvm::Symbol& sym,
+                const std::vector<std::pair<std::string, std::string>>& flags)
+      : CachedOp(sym, flags) {}
   virtual ~NaiveCachedOp() {}
-  OpStatePtr Forward(
-      const std::shared_ptr<CachedOp>& op_ptr,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<NDArray*>& outputs,
-      const Context& default_ctx) override;
-  void Backward(
-      const bool retain_graph,
-      const OpStatePtr& state,
-      const std::vector<NDArray*>& inputs,
-      const std::vector<OpReqType>& reqs,
-      const std::vector<NDArray*>& outputs) override {
-          LOG(FATAL) << "Backward is not supported in NaiveCachedOp.";
-      }
+  OpStatePtr Forward(const std::shared_ptr<CachedOp>& op_ptr,
+                     const std::vector<NDArray*>& inputs,
+                     const std::vector<NDArray*>& outputs,
+                     const Context& default_ctx) override;
+  void Backward(const bool retain_graph,
+                const OpStatePtr& state,
+                const std::vector<NDArray*>& inputs,
+                const std::vector<OpReqType>& reqs,
+                const std::vector<NDArray*>& outputs) override {
+    LOG(FATAL) << "Backward is not supported in NaiveCachedOp.";
+  }
   // backward storage type inference
-  bool BackwardStorageType(
-      const nnvm::NodeAttrs& attrs,
-      const int dev_mask,
-      DispatchMode* dispatch_mode,
-      std::vector<int> *in_attrs,
-      std::vector<int> *out_attrs) override {
-          LOG(FATAL) << "Backward is not supported in NaiveCachedOp.";
-          return false;
-      }
+  bool BackwardStorageType(const nnvm::NodeAttrs& attrs,
+                           const int dev_mask,
+                           DispatchMode* dispatch_mode,
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) override {
+    LOG(FATAL) << "Backward is not supported in NaiveCachedOp.";
+    return false;
+  }
 };  // NaiveCachedOp
 
 using NaiveCachedOpPtr = std::shared_ptr<NaiveCachedOp>;
diff --git a/src/imperative/pointwise_fusion_pass.cc b/src/imperative/pointwise_fusion_pass.cc
index 860b77f2617c..1b47e9270c71 100644
--- a/src/imperative/pointwise_fusion_pass.cc
+++ b/src/imperative/pointwise_fusion_pass.cc
@@ -49,8 +49,8 @@ void WarnFusionNotSupported() {
                  << "Unset env var MXNET_USE_FUSION=1 to quiet this message.";
 #else
     LOG(WARNING) << "Omitting dynamic fused op creation- needs MXNet lib built with "
-                   << "USE_CUDA=1.  Unset env var MXNET_USE_FUSION=1 "
-                   << "to quiet this message.";
+                 << "USE_CUDA=1.  Unset env var MXNET_USE_FUSION=1 "
+                 << "to quiet this message.";
 #endif  // defined(_WIN32)
   }
 }
@@ -68,24 +68,21 @@ bool IsFusionCompatible(const nnvm::Node* n) {
     return true;
   if (slice_ops.count(op_name))
     return false;
-  if (std::find(variable_io_ops.begin(),
-                variable_io_ops.end(),
-                op_name) !=
-      variable_io_ops.end())
+  if (std::find(variable_io_ops.begin(), variable_io_ops.end(), op_name) != variable_io_ops.end())
     return true;
   if (op_name == "LeakyReLU") {
-      std::string act_type = n->attrs.dict.at("act_type");
-      if (LeakyReLU_ops.count(act_type))
-        return true;
-      else
-        return false;
+    std::string act_type = n->attrs.dict.at("act_type");
+    if (LeakyReLU_ops.count(act_type))
+      return true;
+    else
+      return false;
   }
   if (op_name == "_backward_LeakyReLU") {
-      std::string act_type = n->attrs.dict.at("act_type");
-      if (LeakyReLU_bwd_ops.count(act_type))
-        return true;
-      else
-        return false;
+    std::string act_type = n->attrs.dict.at("act_type");
+    if (LeakyReLU_bwd_ops.count(act_type))
+      return true;
+    else
+      return false;
   }
   return false;
 }
@@ -100,8 +97,7 @@ bool IsInputsOnlyCompatible(const nnvm::Node* n) {
       // slice with non-default step attribute is not supported
       // currently
       if (n->attrs.dict.count("step") &&
-          !(n->attrs.dict.at("step") == "()" ||
-            n->attrs.dict.at("step") == "[]")) {
+          !(n->attrs.dict.at("step") == "()" || n->attrs.dict.at("step") == "[]")) {
         return false;
       }
     }
@@ -116,9 +112,9 @@ void CreateSubgraphNode(const nnvm::Graph& subgraph,
   static const Op* fused_op_ptr = Op::Get("_FusedOp");
   subgraph_node->attrs.subgraphs.emplace_back(std::make_shared<nnvm::Symbol>());
   subgraph_node->attrs.subgraphs.back()->outputs = subgraph.outputs;
-  subgraph_node->attrs.dict["num_inputs"] = std::to_string(inputs_size);
-  subgraph_node->attrs.dict["num_outputs"] = std::to_string(subgraph.outputs.size());
-  subgraph_node->attrs.op = fused_op_ptr;
+  subgraph_node->attrs.dict["num_inputs"]        = std::to_string(inputs_size);
+  subgraph_node->attrs.dict["num_outputs"]       = std::to_string(subgraph.outputs.size());
+  subgraph_node->attrs.op                        = fused_op_ptr;
   subgraph_node->op()->attr_parser(&(subgraph_node->attrs));
 }
 
@@ -127,8 +123,7 @@ struct EntryInfo {
   int index;
 };
 
-inline int SetInsert(const EntryInfo& new_elem,
-                     std::vector<EntryInfo>* elements) {
+inline int SetInsert(const EntryInfo& new_elem, std::vector<EntryInfo>* elements) {
   for (size_t i = 0; i < elements->size(); ++i) {
     if ((new_elem.source_node == elements->at(i).source_node) &&
         (new_elem.index == elements->at(i).index)) {
@@ -152,7 +147,7 @@ inline int SetInsert(const EntryInfo& new_elem,
  * \param num_subgraphs number of subgraphs.
  * \param create_subgraph_node function used to prepare the subgraph node.
  */
-template<typename FCreateNode>
+template <typename FCreateNode>
 Graph CopyAndReplaceSubgraphs(const Graph& g,
                               const std::vector<int>& subgraph_assignment,
                               const int num_subgraphs,
@@ -165,8 +160,8 @@ Graph CopyAndReplaceSubgraphs(const Graph& g,
 
   const auto& idx = g.indexed_graph();
 
-  CHECK_EQ(idx.num_nodes(), subgraph_assignment.size()) <<
-    "Every node in the graph needs to be included in subgraph assignment.";
+  CHECK_EQ(idx.num_nodes(), subgraph_assignment.size())
+      << "Every node in the graph needs to be included in subgraph assignment.";
 
   std::vector<nnvm::ObjectPtr> new_nodes;
   new_nodes.reserve(idx.num_nodes());
@@ -190,49 +185,43 @@ Graph CopyAndReplaceSubgraphs(const Graph& g,
     // subgraph. Variables are not copied.
     if (idx[i].source->op() != nullptr) {
       new_nodes.emplace_back(nnvm::Node::Create());
-      auto& node_copy = new_nodes.back();
+      auto& node_copy  = new_nodes.back();
       node_copy->attrs = idx[i].source->attrs;
-      node_copy->info = idx[i].source->info;
+      node_copy->info  = idx[i].source->info;
     } else {
       new_nodes.emplace_back(idx[i].weak_ref.lock());
       continue;
     }
-    auto& node_copy = new_nodes.back();
+    auto& node_copy       = new_nodes.back();
     const int subgraph_id = subgraph_assignment[i];
     if (subgraph_id != -1) {
       auto& info = subgraphs[subgraph_id];
       for (const auto& input : idx[i].inputs) {
         const int their_subgraph = subgraph_assignment[input.node_id];
         if (their_subgraph == subgraph_id) {
-          node_copy->inputs.emplace_back(new_nodes[input.node_id],
-                                         input.index,
-                                         input.version);
+          node_copy->inputs.emplace_back(new_nodes[input.node_id], input.index, input.version);
         } else {
           int input_num;
           int output_num;
           if (their_subgraph == -1) {
-            input_num = SetInsert({static_cast<int>(input.node_id),
-                                   static_cast<int>(input.index)}, &(info.inputs));
+            input_num = SetInsert({static_cast<int>(input.node_id), static_cast<int>(input.index)},
+                                  &(info.inputs));
           } else {
             auto& their_subgraph_info = subgraphs[their_subgraph];
-            output_num = SetInsert({static_cast<int>(input.node_id),
-                                    static_cast<int>(input.index)},
+            output_num = SetInsert({static_cast<int>(input.node_id), static_cast<int>(input.index)},
                                    &(their_subgraph_info.outputs));
-            input_num = SetInsert({static_cast<int>(idx.num_nodes() + their_subgraph),
-                                   output_num},
+            input_num  = SetInsert({static_cast<int>(idx.num_nodes() + their_subgraph), output_num},
                                   &(info.inputs));
           }
           if (static_cast<size_t>(input_num) == info.input_nodes.size()) {
             info.input_nodes.emplace_back(nnvm::Node::Create());
             info.input_nodes.back()->attrs.name = "input_" + std::to_string(input_num);
             if (their_subgraph == -1) {
-              info.subgraph_node->inputs.emplace_back(new_nodes[input.node_id],
-                                                      input.index,
-                                                      input.version);
+              info.subgraph_node->inputs.emplace_back(
+                  new_nodes[input.node_id], input.index, input.version);
             } else {
-              info.subgraph_node->inputs.emplace_back(subgraphs[their_subgraph].subgraph_node,
-                                                      output_num,
-                                                      input.version);
+              info.subgraph_node->inputs.emplace_back(
+                  subgraphs[their_subgraph].subgraph_node, output_num, input.version);
             }
           }
           node_copy->inputs.emplace_back(info.input_nodes[input_num], 0, 0);
@@ -242,17 +231,12 @@ Graph CopyAndReplaceSubgraphs(const Graph& g,
       for (const auto& input : idx[i].inputs) {
         const int subgraph_id = subgraph_assignment[input.node_id];
         if (subgraph_id == -1) {
-          node_copy->inputs.emplace_back(new_nodes[input.node_id],
-                                         input.index,
-                                         input.version);
+          node_copy->inputs.emplace_back(new_nodes[input.node_id], input.index, input.version);
         } else {
-          auto& info = subgraphs[subgraph_id];
-          const int output_num = SetInsert({static_cast<int>(input.node_id),
-                                            static_cast<int>(input.index)},
-                                           &(info.outputs));
-          node_copy->inputs.emplace_back(info.subgraph_node,
-                                         output_num,
-                                         input.version);
+          auto& info           = subgraphs[subgraph_id];
+          const int output_num = SetInsert(
+              {static_cast<int>(input.node_id), static_cast<int>(input.index)}, &(info.outputs));
+          node_copy->inputs.emplace_back(info.subgraph_node, output_num, input.version);
         }
       }
     }
@@ -269,25 +253,19 @@ Graph CopyAndReplaceSubgraphs(const Graph& g,
   for (const auto& output : idx.outputs()) {
     const int subgraph_id = subgraph_assignment[output.node_id];
     if (subgraph_id == -1) {
-      ret.outputs.emplace_back(new_nodes[output.node_id],
-                               output.index,
-                               output.version);
+      ret.outputs.emplace_back(new_nodes[output.node_id], output.index, output.version);
     } else {
-      const int output_num = SetInsert({static_cast<int>(output.node_id),
-                                        static_cast<int>(output.index)},
-                                       &(subgraphs[subgraph_id].outputs));
-      ret.outputs.emplace_back(subgraphs[subgraph_id].subgraph_node,
-                               output_num,
-                               output.version);
+      const int output_num =
+          SetInsert({static_cast<int>(output.node_id), static_cast<int>(output.index)},
+                    &(subgraphs[subgraph_id].outputs));
+      ret.outputs.emplace_back(subgraphs[subgraph_id].subgraph_node, output_num, output.version);
     }
   }
 
   for (auto& info : subgraphs) {
     info.graph.outputs.reserve(info.outputs.size());
     for (const auto& entry_info : info.outputs) {
-      info.graph.outputs.emplace_back(new_nodes[entry_info.source_node],
-                                      entry_info.index,
-                                      0);
+      info.graph.outputs.emplace_back(new_nodes[entry_info.source_node], entry_info.index, 0);
     }
     create_subgraph_node(info.graph, info.inputs.size(), info.subgraph_node.get());
   }
@@ -296,46 +274,41 @@ Graph CopyAndReplaceSubgraphs(const Graph& g,
     // Add _FusedOpHelper nodes
     const int subgraph_id = subgraph_assignment[i];
     for (size_t dep_num = 0; dep_num < idx[i].control_deps.size(); ++dep_num) {
-      const auto& dep = idx[i].control_deps[dep_num];
+      const auto& dep             = idx[i].control_deps[dep_num];
       const int their_subgraph_id = subgraph_assignment[dep];
       if (subgraph_id != -1 && their_subgraph_id == -1) {
         // Not in any subgraph, use FusedOpOutHelper
-        auto& info = subgraphs[subgraph_id];
+        auto& info     = subgraphs[subgraph_id];
         size_t node_id = info.subgraph_node->control_deps.size();
         info.subgraph_node->control_deps.emplace_back(new_nodes[dep]);
-        auto helper_node = op::MakeNode("_FusedOpOutHelper",
+        auto helper_node          = op::MakeNode("_FusedOpOutHelper",
                                         "FusedOp_" + new_nodes[i]->attrs.name + "_outhelper",
                                         nullptr,
                                         nullptr,
                                         nullptr);
-        helper_node->attrs.parsed =
-          FusedOpHelperParamPtr(new FusedOpHelperParam(
-                nnvm::get<FusedOpPtr>(info.subgraph_node->attrs.parsed),
-                node_id));
+        helper_node->attrs.parsed = FusedOpHelperParamPtr(new FusedOpHelperParam(
+            nnvm::get<FusedOpPtr>(info.subgraph_node->attrs.parsed), node_id));
         new_nodes[i]->control_deps.insert(new_nodes[i]->control_deps.begin() + dep_num,
                                           std::move(helper_node));
-      } else if (their_subgraph_id != subgraph_id &&
-                 their_subgraph_id != -1) {
-        auto& info = subgraphs[their_subgraph_id];
+      } else if (their_subgraph_id != subgraph_id && their_subgraph_id != -1) {
+        auto& info               = subgraphs[their_subgraph_id];
         const auto& subgraph_idx = info.graph.indexed_graph();
-        uint32_t node_id = subgraph_idx.node_id(new_nodes[dep].get());
-        auto helper_node = op::MakeNode("_FusedOpHelper",
-                                        info.subgraph_node->attrs.name + "_"
-                                        + idx[i].source->attrs.name + "_helper",
-                                        nullptr,
-                                        nullptr,
-                                        nullptr);
-        helper_node->attrs.parsed =
-          FusedOpHelperParamPtr(new FusedOpHelperParam(
-                nnvm::get<FusedOpPtr>(info.subgraph_node->attrs.parsed),
-                node_id));
+        uint32_t node_id         = subgraph_idx.node_id(new_nodes[dep].get());
+        auto helper_node         = op::MakeNode(
+            "_FusedOpHelper",
+            info.subgraph_node->attrs.name + "_" + idx[i].source->attrs.name + "_helper",
+            nullptr,
+            nullptr,
+            nullptr);
+        helper_node->attrs.parsed = FusedOpHelperParamPtr(new FusedOpHelperParam(
+            nnvm::get<FusedOpPtr>(info.subgraph_node->attrs.parsed), node_id));
         new_nodes[i]->control_deps.insert(new_nodes[i]->control_deps.begin() + dep_num,
                                           std::move(helper_node));
       }
     }
   }
   for (auto& info : subgraphs) {
-    const auto& idx = info.graph.indexed_graph();
+    const auto& idx         = info.graph.indexed_graph();
     const auto& input_nodes = idx.input_nodes();
     std::vector<nnvm::NodeEntry> subgraph_inputs;
     subgraph_inputs.reserve(info.subgraph_node->inputs.size());
@@ -359,19 +332,18 @@ Graph CopyAndReplaceSubgraphs(const Graph& g,
   return ret;
 }
 
-Graph FusePointwise(const Graph &g, const size_t num_forward_outputs) {
-  auto start = std::chrono::steady_clock::now();
-  auto [subset_assignment, num_subsets] = GetCompatibleSubsets(g, num_forward_outputs,  // NOLINT(*)
+Graph FusePointwise(const Graph& g, const size_t num_forward_outputs) {
+  auto start                            = std::chrono::steady_clock::now();
+  auto [subset_assignment, num_subsets] = GetCompatibleSubsets(g,                    // NOLINT(*)
+                                                               num_forward_outputs,  // NOLINT(*)
                                                                IsFusionCompatible,
                                                                IsInputsOnlyCompatible);
-  Graph ret = CopyAndReplaceSubgraphs(g, subset_assignment, num_subsets,
-                                      CreateSubgraphNode);
-  auto end = std::chrono::steady_clock::now();
+  Graph ret = CopyAndReplaceSubgraphs(g, subset_assignment, num_subsets, CreateSubgraphNode);
+  auto end  = std::chrono::steady_clock::now();
   if (dmlc::GetEnv("MXNET_RTC_VERBOSE", false)) {
     auto diff = end - start;
     LOG(INFO) << "Pointwise fusion graph pass took: "
-              << std::chrono::duration<double, std::milli>(diff).count()
-              << "ms.";
+              << std::chrono::duration<double, std::milli>(diff).count() << "ms.";
   }
   return ret;
 }
@@ -379,4 +351,3 @@ Graph FusePointwise(const Graph &g, const size_t num_forward_outputs) {
 
 }  // namespace exec
 }  // namespace mxnet
-
diff --git a/src/imperative/simple_partition_pass.cc b/src/imperative/simple_partition_pass.cc
index 941959d4bb45..fc5e3f002d2f 100644
--- a/src/imperative/simple_partition_pass.cc
+++ b/src/imperative/simple_partition_pass.cc
@@ -36,10 +36,9 @@ namespace detail {
 const IntervalVec* LargerSet(const IntervalVec* const first,
                              const IntervalVec* const second) noexcept {
   const IntervalVec* ret = nullptr;
-  auto first_iter = first->begin();
-  auto second_iter = second->begin();
-  while (first_iter != first->end() &&
-         second_iter != second->end()) {
+  auto first_iter        = first->begin();
+  auto second_iter       = second->begin();
+  while (first_iter != first->end() && second_iter != second->end()) {
     if (*first_iter == *second_iter) {
       ++first_iter;
       ++second_iter;
@@ -65,8 +64,7 @@ const IntervalVec* LargerSet(const IntervalVec* const first,
         continue;
       }
       // Entry in first set fully encloses the entry in the second set
-      if (first_iter->first <= second_iter->first &&
-          first_iter->second >= second_iter->second) {
+      if (first_iter->first <= second_iter->first && first_iter->second >= second_iter->second) {
         if (ret == first || ret == nullptr) {
           ret = first;
           ++second_iter;
@@ -76,8 +74,7 @@ const IntervalVec* LargerSet(const IntervalVec* const first,
         continue;
       }
       // Entry in second set fully encloses the entry in the first set
-      if (second_iter->first <= first_iter->first &&
-          second_iter->second >= first_iter->second) {
+      if (second_iter->first <= first_iter->first && second_iter->second >= first_iter->second) {
         if (ret == second || ret == nullptr) {
           ret = second;
           ++first_iter;
@@ -117,13 +114,12 @@ void MergeSets(const IntervalVec** const my_set,
     *my_set = larger_set;
     return;
   }
-  auto my_iter = (*my_set)->cbegin();
+  auto my_iter    = (*my_set)->cbegin();
   auto other_iter = other_set->cbegin();
-  auto new_set = IntervalVec();
-  int last_end = -10;  // less than -1
-  while (my_iter != (*my_set)->cend() &&
-         other_iter != other_set->cend()) {
-    const auto& mine = *my_iter;
+  auto new_set    = IntervalVec();
+  int last_end    = -10;  // less than -1
+  while (my_iter != (*my_set)->cend() && other_iter != other_set->cend()) {
+    const auto& mine  = *my_iter;
     const auto& other = *other_iter;
     if (other.second < mine.first - 1) {
       // other interval is before ours
@@ -145,8 +141,7 @@ void MergeSets(const IntervalVec** const my_set,
       ++my_iter;
     } else {
       // Intervals can be merged together
-      Interval n(std::min(mine.first, other.first),
-                 std::max(mine.second, other.second));
+      Interval n(std::min(mine.first, other.first), std::max(mine.second, other.second));
       if (last_end >= n.first - 1) {
         new_set.back().second = n.second;
       } else {
@@ -162,10 +157,10 @@ void MergeSets(const IntervalVec** const my_set,
     }
   }
   auto remaining_iter = my_iter == (*my_set)->cend() ? other_iter : my_iter;
-  auto remaining_end = my_iter == (*my_set)->cend() ? other_set->cend() : (*my_set)->cend();
+  auto remaining_end  = my_iter == (*my_set)->cend() ? other_set->cend() : (*my_set)->cend();
   // Add the rest of entries
   for (; remaining_iter != remaining_end; ++remaining_iter) {
-    auto& mine = new_set.back();
+    auto& mine        = new_set.back();
     const auto& other = *remaining_iter;
     if (other.second < mine.first - 1) {
       // other interval is before ours, should never happen
@@ -175,7 +170,7 @@ void MergeSets(const IntervalVec** const my_set,
       new_set.emplace_back(other);
     } else {
       // Intervals can be merged together
-      mine.first = std::min(mine.first, other.first);
+      mine.first  = std::min(mine.first, other.first);
       mine.second = std::max(mine.second, other.second);
     }
   }
@@ -183,12 +178,10 @@ void MergeSets(const IntervalVec** const my_set,
   *my_set = storage->back().get();
 }
 
-bool Intersect(const IntervalVec& checked_sets,
-               const IntervalVec& excluded_sets) noexcept {
+bool Intersect(const IntervalVec& checked_sets, const IntervalVec& excluded_sets) noexcept {
   size_t current_interval = 0, current_other_interval = 0;
-  while (current_interval < checked_sets.size() &&
-         current_other_interval < excluded_sets.size()) {
-    const auto& mine = checked_sets[current_interval];
+  while (current_interval < checked_sets.size() && current_other_interval < excluded_sets.size()) {
+    const auto& mine  = checked_sets[current_interval];
     const auto& other = excluded_sets[current_other_interval];
     if (other.second < mine.first) {
       // other interval is before ours
@@ -204,23 +197,23 @@ bool Intersect(const IntervalVec& checked_sets,
   return false;
 }
 
-void AddSet(const IntervalVec** const sets, const int set_to_add,
+void AddSet(const IntervalVec** const sets,
+            const int set_to_add,
             std::vector<std::unique_ptr<const IntervalVec>>* const storage) noexcept {
   if (*sets != nullptr && (*sets)->size() != 0) {
     for (auto& interval : (**sets)) {
-      if (set_to_add >= interval.first &&
-          set_to_add <= interval.second) {
+      if (set_to_add >= interval.first && set_to_add <= interval.second) {
         return;
       }
     }
   }
-  storage->emplace_back(
-      std::make_unique<IntervalVec>(1, std::make_pair(set_to_add, set_to_add)));
+  storage->emplace_back(std::make_unique<IntervalVec>(1, std::make_pair(set_to_add, set_to_add)));
   MergeSets(sets, storage->back().get(), storage);
 }
 
 int GetSetMapping(const int set, std::vector<int>* const set_mapping) noexcept {
-  if (set == -1) return -1;
+  if (set == -1)
+    return -1;
   int temp = set;
   while ((*set_mapping)[temp] != temp) {
     temp = (*set_mapping)[temp];
@@ -229,17 +222,17 @@ int GetSetMapping(const int set, std::vector<int>* const set_mapping) noexcept {
   return temp;
 }
 
-void CheckAndUpdateCombinedExcludedSets(const IntervalVec** const combined_excluded_sets_ptr,
-                                        const IntervalVec* const new_excluded_sets,
-                                        std::vector<const IntervalVec*>* const excluded_sets_ptr,
-                                        const int set_id,
-                                        const int first_node_in_set,
-                                        const size_t new_node_id,
-                                        const std::vector<int>& set_assignment,
-                                        std::vector<int>* const set_mapping_ptr,
-                                        const IntervalVec& inverse_set_mapping,
-                                        std::vector<std::unique_ptr<const IntervalVec>>* const
-                                          storage) noexcept {
+void CheckAndUpdateCombinedExcludedSets(
+    const IntervalVec** const combined_excluded_sets_ptr,
+    const IntervalVec* const new_excluded_sets,
+    std::vector<const IntervalVec*>* const excluded_sets_ptr,
+    const int set_id,
+    const int first_node_in_set,
+    const size_t new_node_id,
+    const std::vector<int>& set_assignment,
+    std::vector<int>* const set_mapping_ptr,
+    const IntervalVec& inverse_set_mapping,
+    std::vector<std::unique_ptr<const IntervalVec>>* const storage) noexcept {
   const auto* previous_excluded_sets = *combined_excluded_sets_ptr;
   MergeSets(combined_excluded_sets_ptr, new_excluded_sets, storage);
   if (new_excluded_sets != nullptr) {
@@ -250,8 +243,7 @@ void CheckAndUpdateCombinedExcludedSets(const IntervalVec** const combined_exclu
       auto& excluded_sets = *excluded_sets_ptr;
       for (size_t j = first_node_in_set; j < new_node_id; ++j) {
         if (GetSetMapping(set_assignment[j], set_mapping_ptr) == set_id ||
-            (excluded_sets[j] != nullptr &&
-             Intersect(inverse_set_mapping, *excluded_sets[j]))) {
+            (excluded_sets[j] != nullptr && Intersect(inverse_set_mapping, *excluded_sets[j]))) {
           MergeSets(&excluded_sets[j], *combined_excluded_sets_ptr, storage);
         }
       }
diff --git a/src/imperative/simple_partition_pass.h b/src/imperative/simple_partition_pass.h
index 5b28c1796094..1d3825f3b630 100644
--- a/src/imperative/simple_partition_pass.h
+++ b/src/imperative/simple_partition_pass.h
@@ -43,14 +43,14 @@ namespace exec {
 
 namespace detail {
 
-using Interval = std::pair<int, int>;
+using Interval    = std::pair<int, int>;
 using IntervalVec = std::vector<Interval>;
 
 /* \brief Return the set that fully contains the other set, or nullptr
  *        if neither set is a subset of another.
  */
-const IntervalVec*  LargerSet(const IntervalVec* const first,
-                              const IntervalVec* const second) noexcept;
+const IntervalVec* LargerSet(const IntervalVec* const first,
+                             const IntervalVec* const second) noexcept;
 
 /* \brief Compute the sum of the 2 sets and store it in my_set.
  */
@@ -61,12 +61,12 @@ void MergeSets(const IntervalVec** const my_set,
 /* \brief Returns true if there is non-empty intersection
  *        between the 2 sets.
  */
-bool Intersect(const IntervalVec& checked_sets,
-               const IntervalVec& excluded_sets) noexcept;
+bool Intersect(const IntervalVec& checked_sets, const IntervalVec& excluded_sets) noexcept;
 
 /* \brief Add a single entry to the sets.
  */
-void AddSet(const IntervalVec** const sets, const int set_to_add,
+void AddSet(const IntervalVec** const sets,
+            const int set_to_add,
             std::vector<std::unique_ptr<const IntervalVec>>* const storage) noexcept;
 
 /* \brief Get the true mapping of the set (which could change
@@ -78,8 +78,7 @@ int GetSetMapping(const int set, std::vector<int>* const set_mapping) noexcept;
  *        (so either both on the FWD side or the BWD side).
  */
 inline bool IsSamePass(const int my_id, const int their_id, const int cutoff) noexcept {
-  return (my_id > cutoff && their_id > cutoff) ||
-         (my_id <= cutoff && their_id <= cutoff);
+  return (my_id > cutoff && their_id > cutoff) || (my_id <= cutoff && their_id <= cutoff);
 }
 
 /* \brief Check if adding a new node to the set changes the excluded set of the future
@@ -97,21 +96,20 @@ inline bool IsSamePass(const int my_id, const int their_id, const int cutoff) no
  * \param inverse_set_mapping inverse mapping of the set
  * \param storage memory storage
  */
-void CheckAndUpdateCombinedExcludedSets(const IntervalVec** const combined_excluded_sets_ptr,
-                                        const IntervalVec* const new_excluded_sets,
-                                        std::vector<const IntervalVec*>* const excluded_sets_ptr,
-                                        const int set_id,
-                                        const int first_node_in_set,
-                                        const size_t new_node_id,
-                                        const std::vector<int>& set_assignment,
-                                        std::vector<int>* const set_mapping_ptr,
-                                        const IntervalVec& inverse_set_mapping,
-                                        std::vector<std::unique_ptr<const IntervalVec>>* const
-                                          storage) noexcept;
+void CheckAndUpdateCombinedExcludedSets(
+    const IntervalVec** const combined_excluded_sets_ptr,
+    const IntervalVec* const new_excluded_sets,
+    std::vector<const IntervalVec*>* const excluded_sets_ptr,
+    const int set_id,
+    const int first_node_in_set,
+    const size_t new_node_id,
+    const std::vector<int>& set_assignment,
+    std::vector<int>* const set_mapping_ptr,
+    const IntervalVec& inverse_set_mapping,
+    std::vector<std::unique_ptr<const IntervalVec>>* const storage) noexcept;
 
 }  // namespace detail
 
-
 /* \brief Get all subsets of nodes, where:
  *  - graph constructed from nodes in each subset is a connected graph
  *  - every node fulfills a predicate is_compatible
@@ -131,13 +129,12 @@ void CheckAndUpdateCombinedExcludedSets(const IntervalVec** const combined_exclu
  *                                 need to be excluded).
  * \return tuple (subset assignment, number of found subsets)
  */
-template<typename FCompatible, typename FInputOnlyCompatible>
+template <typename FCompatible, typename FInputOnlyCompatible>
 std::tuple<std::vector<int>, int> GetCompatibleSubsets(
     const Graph& g,
     const size_t num_forward_outputs,
     FCompatible is_compatible,
     FInputOnlyCompatible is_input_only_compatible) {
-
   using namespace detail;
   const auto& idx = g.indexed_graph();
   std::vector<int> set_assignment(idx.num_nodes(), -1);
@@ -158,7 +155,7 @@ std::tuple<std::vector<int>, int> GetCompatibleSubsets(
 
   int num_sets = 0;
   for (size_t i = 0; i < idx.num_nodes(); ++i) {
-    const auto& node = idx[i];
+    const auto& node       = idx[i];
     auto& my_excluded_sets = excluded_sets[i];
     for (const auto& input : node.inputs) {
       MergeSets(&my_excluded_sets, excluded_sets[input.node_id], &storage);
@@ -167,11 +164,10 @@ std::tuple<std::vector<int>, int> GetCompatibleSubsets(
       int my_set = -1;
       for (const auto& input : node.inputs) {
         int their_set = GetSetMapping(set_assignment[input.node_id], &set_mapping);
-        if (their_set != -1 &&
-            their_set != my_set &&
+        if (their_set != -1 && their_set != my_set &&
             IsSamePass(i, input.node_id, last_forward_node) &&
             (my_excluded_sets == nullptr ||
-            !Intersect(*inverse_set_mapping[their_set], *my_excluded_sets))) {
+             !Intersect(*inverse_set_mapping[their_set], *my_excluded_sets))) {
           if (my_set == -1) {
             my_set = their_set;
             CheckAndUpdateCombinedExcludedSets(&(combined_excluded_sets[their_set]),
@@ -185,12 +181,10 @@ std::tuple<std::vector<int>, int> GetCompatibleSubsets(
                                                *(inverse_set_mapping[their_set]),
                                                &storage);
           } else {
-            MergeSets(&inverse_set_mapping[my_set],
-                      inverse_set_mapping[their_set],
-                      &storage);
+            MergeSets(&inverse_set_mapping[my_set], inverse_set_mapping[their_set], &storage);
             set_mapping[their_set] = my_set;
-            first_node_in_set[my_set] = std::min(first_node_in_set[my_set],
-                                                 first_node_in_set[their_set]);
+            first_node_in_set[my_set] =
+                std::min(first_node_in_set[my_set], first_node_in_set[their_set]);
             CheckAndUpdateCombinedExcludedSets(&(combined_excluded_sets[their_set]),
                                                combined_excluded_sets[my_set],
                                                &excluded_sets,
@@ -208,9 +202,8 @@ std::tuple<std::vector<int>, int> GetCompatibleSubsets(
         set_mapping.emplace_back(num_sets);
         combined_excluded_sets.emplace_back(my_excluded_sets);
         first_node_in_set.emplace_back(i);
-        storage.emplace_back(std::make_unique<std::vector<Interval>>(
-                               1, std::make_pair(num_sets,
-                                                 num_sets)));
+        storage.emplace_back(
+            std::make_unique<std::vector<Interval>>(1, std::make_pair(num_sets, num_sets)));
         inverse_set_mapping.emplace_back(storage.back().get());
         my_set = num_sets++;
       }
@@ -222,14 +215,12 @@ std::tuple<std::vector<int>, int> GetCompatibleSubsets(
           AddSet(&my_excluded_sets, their_set, &storage);
         }
       }
-      if ((is_input_only_compatible != nullptr) &&
-          is_input_only_compatible(node.source)) {
+      if ((is_input_only_compatible != nullptr) && is_input_only_compatible(node.source)) {
         set_mapping.emplace_back(num_sets);
         combined_excluded_sets.emplace_back(my_excluded_sets);
         first_node_in_set.emplace_back(i);
-        storage.emplace_back(std::make_unique<std::vector<Interval>>(
-                               1, std::make_pair(num_sets,
-                                                 num_sets)));
+        storage.emplace_back(
+            std::make_unique<std::vector<Interval>>(1, std::make_pair(num_sets, num_sets)));
         inverse_set_mapping.emplace_back(storage.back().get());
         set_assignment[i] = num_sets++;
       }
diff --git a/src/initialize.cc b/src/initialize.cc
index 6be13e61ae9e..b1a472bf9d3b 100644
--- a/src/initialize.cc
+++ b/src/initialize.cc
@@ -1,4 +1,4 @@
-  /*
+/*
  * Licensed to the Apache Software Foundation (ASF) under one
  * or more contributor license agreements.  See the NOTICE file
  * distributed with this work for additional information
@@ -32,17 +32,16 @@
  * \brief Retrieve the system error message for the last-error code
  * \param err string that gets the error message
  */
-void win_err(char **err) {
+void win_err(char** err) {
   uint32_t dw = GetLastError();
   FormatMessage(
-        FORMAT_MESSAGE_ALLOCATE_BUFFER |
-        FORMAT_MESSAGE_FROM_SYSTEM |
-        FORMAT_MESSAGE_IGNORE_INSERTS,
-        nullptr,
-        dw,
-        MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
-        reinterpret_cast<char*>(err),
-        0, nullptr);
+      FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS,
+      nullptr,
+      dw,
+      MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
+      reinterpret_cast<char*>(err),
+      0,
+      nullptr);
 }
 #else
 #include <cxxabi.h>
@@ -64,8 +63,6 @@ void win_err(char **err) {
 #include "common/utils.h"
 #include "engine/openmp.h"
 
-
-
 namespace mxnet {
 
 // pthread_atfork handlers, delegated to LibraryInitializer members.
@@ -88,12 +85,12 @@ void pthread_atfork_child() {
 // LibraryInitializer member functions
 
 LibraryInitializer::LibraryInitializer()
-  : original_pid_(common::current_process_id()),
-    mp_worker_nthreads_(dmlc::GetEnv("MXNET_MP_WORKER_NTHREADS", 1)),
-    cpu_worker_nthreads_(dmlc::GetEnv("MXNET_CPU_WORKER_NTHREADS", 1)),
-    mp_cv_num_threads_(dmlc::GetEnv("MXNET_MP_OPENCV_NUM_THREADS", 0)) {
+    : original_pid_(common::current_process_id()),
+      mp_worker_nthreads_(dmlc::GetEnv("MXNET_MP_WORKER_NTHREADS", 1)),
+      cpu_worker_nthreads_(dmlc::GetEnv("MXNET_CPU_WORKER_NTHREADS", 1)),
+      mp_cv_num_threads_(dmlc::GetEnv("MXNET_MP_OPENCV_NUM_THREADS", 0)) {
   dmlc::InitLogging("mxnet");
-  engine::OpenMP::Get();   // force OpenMP initialization
+  engine::OpenMP::Get();  // force OpenMP initialization
   install_pthread_atfork_handlers();
 }
 
@@ -109,14 +106,14 @@ bool LibraryInitializer::lib_is_loaded(const std::string& path) const {
  * \return handle a pointer for the loaded library, throws dmlc::error if library can't be loaded
  */
 void* LibraryInitializer::lib_load(const char* path) {
-  void *handle = nullptr;
+  void* handle = nullptr;
   // check if library was already loaded
   if (!lib_is_loaded(path)) {
     // if not, load it
 #if defined(_WIN32) || defined(_WIN64) || defined(__WINDOWS__)
     handle = LoadLibrary(path);
     if (!handle) {
-      char *err_msg = nullptr;
+      char* err_msg = nullptr;
       win_err(&err_msg);
       LOG(FATAL) << "Error loading library: '" << path << "'\n" << err_msg;
       LocalFree(err_msg);
@@ -161,7 +158,7 @@ void LibraryInitializer::lib_close(void* handle) {
 #else
   if (dlclose(handle)) {
     LOG(WARNING) << "LibraryInitializer::lib_close: couldn't close library at address: " << handle
-        << " loaded from: '" << libpath << "': " << dlerror();
+                 << " loaded from: '" << libpath << "': " << dlerror();
   }
 #endif  // _WIN32 or _WIN64 or __WINDOWS__
   loaded_libs.erase(libpath);
@@ -177,7 +174,7 @@ void LibraryInitializer::get_sym(void* handle, void** func, const char* name) {
 #if defined(_WIN32) || defined(_WIN64) || defined(__WINDOWS__)
   *func = GetProcAddress((HMODULE)handle, name);
   if (!(*func)) {
-    char *err_msg = nullptr;
+    char* err_msg = nullptr;
     win_err(&err_msg);
     LOG(FATAL) << "Error getting function '" << name << "' from library\n" << err_msg;
     LocalFree(err_msg);
@@ -220,7 +217,6 @@ void LibraryInitializer::atfork_child() {
   CustomOperator::Get()->Start();
 }
 
-
 void LibraryInitializer::install_pthread_atfork_handlers() {
 #ifndef _WIN32
   engine::OpenMP::Get()->initialize_process();  // force omp to set its atfork handler first
@@ -228,20 +224,15 @@ void LibraryInitializer::install_pthread_atfork_handlers() {
 #endif
 }
 
-
-
-
 #if MXNET_USE_SIGNAL_HANDLER && DMLC_LOG_STACK_TRACE
 
-static inline void printStackTrace(FILE *out = stderr,
-    const unsigned int max_frames = 63) {
-
+static inline void printStackTrace(FILE* out = stderr, const unsigned int max_frames = 63) {
 #if !defined(_WIN32) && !defined(_WIN64) && !defined(__WINDOWS__)
   // storage array for stack trace address data
-  void* addrlist[max_frames+1];
+  void* addrlist[max_frames + 1];
 
   // retrieve current stack addresses
-  size_t addrlen = backtrace(addrlist, sizeof(addrlist)/sizeof(void*));
+  size_t addrlen = backtrace(addrlist, sizeof(addrlist) / sizeof(void*));
 
   if (addrlen < 5) {
     return;
@@ -250,7 +241,6 @@ static inline void printStackTrace(FILE *out = stderr,
   }
   fprintf(out, "Stack trace:\n");
 
-
   // resolve addresses into strings containing "filename(function+address)",
   // Actually it will be ## program address function + offset
   // this array must be free()-ed
@@ -261,7 +251,7 @@ static inline void printStackTrace(FILE *out = stderr,
 
   // iterate over the returned symbol lines. skip the first, it is the
   // address of this function.
-  for (unsigned int i = 4; i < addrlen ; i++) {
+  for (unsigned int i = 4; i < addrlen; i++) {
     char* begin_name   = nullptr;
     char* begin_offset = nullptr;
     char* end_offset   = nullptr;
@@ -269,40 +259,37 @@ static inline void printStackTrace(FILE *out = stderr,
     // find parentheses and +address offset surrounding the mangled name
 #ifdef DARWIN
     // OSX style stack trace
-    for (char *p = symbollist[i]; *p; ++p) {
-      if (*p == '_' && *(p-1) == ' ') {
-        begin_name = p-1;
+    for (char* p = symbollist[i]; *p; ++p) {
+      if (*p == '_' && *(p - 1) == ' ') {
+        begin_name = p - 1;
       } else if (*p == '+') {
-        begin_offset = p-1;
+        begin_offset = p - 1;
       }
     }
 
     if (begin_name && begin_offset && begin_name < begin_offset) {
-      *begin_name++ = '\0';
+      *begin_name++   = '\0';
       *begin_offset++ = '\0';
 
       // mangled name is now in [begin_name, begin_offset) and caller
       // offset in [begin_offset, end_offset). now apply
       // __cxa_demangle():
       int status;
-      char* ret = abi::__cxa_demangle(begin_name, &funcname[0],
-                                      &funcnamesize, &status);
+      char* ret = abi::__cxa_demangle(begin_name, &funcname[0], &funcnamesize, &status);
       if (status == 0) {
         funcname = ret;  // use possibly realloc()-ed string
-        fprintf(out, "  %-30s %-40s %s\n",
-                symbollist[i], funcname, begin_offset);
+        fprintf(out, "  %-30s %-40s %s\n", symbollist[i], funcname, begin_offset);
       } else {
         // demangling failed. Output function name as a C function with
         // no arguments.
-        fprintf(out, "  %-30s %-38s() %s\n",
-                symbollist[i], begin_name, begin_offset);
+        fprintf(out, "  %-30s %-38s() %s\n", symbollist[i], begin_name, begin_offset);
       }
     } else {
-       // couldn't parse the line? print the whole line.
-       fprintf(out, "  %-40s\n", symbollist[i]);
+      // couldn't parse the line? print the whole line.
+      fprintf(out, "  %-40s\n", symbollist[i]);
     }
 #else
-    for (char *p = symbollist[i]; *p; ++p) {
+    for (char* p = symbollist[i]; *p; ++p) {
       if (*p == '(') {
         begin_name = p;
       } else if (*p == '+') {
@@ -323,24 +310,22 @@ static inline void printStackTrace(FILE *out = stderr,
       // offset in [begin_offset, end_offset). now apply
       // __cxa_demangle():
 
-      int status = 0;
-      char* ret = abi::__cxa_demangle(begin_name, funcname,
-                                      &funcnamesize, &status);
+      int status  = 0;
+      char* ret   = abi::__cxa_demangle(begin_name, funcname, &funcnamesize, &status);
       char* fname = begin_name;
       if (status == 0) {
         fname = ret;
       }
 
       if (begin_offset) {
-        fprintf(out, "  %-30s ( %-40s  + %-6s) %s\n",
-                symbollist[i], fname, begin_offset, end_offset);
+        fprintf(
+            out, "  %-30s ( %-40s  + %-6s) %s\n", symbollist[i], fname, begin_offset, end_offset);
       } else {
-        fprintf(out, "  %-30s ( %-40s    %-6s) %s\n",
-                symbollist[i], fname, "", end_offset);
+        fprintf(out, "  %-30s ( %-40s    %-6s) %s\n", symbollist[i], fname, "", end_offset);
       }
     } else {
-       // couldn't parse the line? print the whole line.
-       fprintf(out, "  %-40s\n", symbollist[i]);
+      // couldn't parse the line? print the whole line.
+      fprintf(out, "  %-40s\n", symbollist[i]);
     }
 #endif  // !DARWIN - but is posix
   }
@@ -348,32 +333,33 @@ static inline void printStackTrace(FILE *out = stderr,
 #endif
 }
 
-#define SIGNAL_HANDLER(SIGNAL, HANDLER_NAME, IS_FATAL)               \
-std::shared_ptr<void(int)> HANDLER_NAME(                             \
-  signal(SIGNAL, [](int signum) {                                    \
-    if (IS_FATAL) {                                                  \
-      printf("\nFatal Error: %s\n", strsignal(SIGNAL));              \
-      printStackTrace();                                             \
-      signal(signum, SIG_DFL);                                       \
-      raise(signum);                                                 \
-    } else {                                                         \
-      switch (signum) {                                              \
-        case SIGSEGV:                                                \
-          LOG(FATAL) << "InternalError: " << strsignal(SIGNAL);      \
-          break;                                                     \
-        case SIGFPE:                                                 \
-          LOG(FATAL) << "FloatingPointError: " << strsignal(SIGNAL); \
-          break;                                                     \
-        case SIGBUS:                                                 \
-          LOG(FATAL) << "IOError: " << strsignal(SIGNAL);            \
-          break;                                                     \
-        default:                                                     \
-          LOG(FATAL) << "RuntimeError: " << strsignal(SIGNAL);       \
-          break;                                                     \
-      }                                                              \
-    }                                                                \
-  }),                                                                \
-  [](auto f) { signal(SIGNAL, f); });
+#define SIGNAL_HANDLER(SIGNAL, HANDLER_NAME, IS_FATAL)                          \
+  std::shared_ptr<void(int)> HANDLER_NAME(                                      \
+      signal(SIGNAL,                                                            \
+             [](int signum) {                                                   \
+               if (IS_FATAL) {                                                  \
+                 printf("\nFatal Error: %s\n", strsignal(SIGNAL));              \
+                 printStackTrace();                                             \
+                 signal(signum, SIG_DFL);                                       \
+                 raise(signum);                                                 \
+               } else {                                                         \
+                 switch (signum) {                                              \
+                   case SIGSEGV:                                                \
+                     LOG(FATAL) << "InternalError: " << strsignal(SIGNAL);      \
+                     break;                                                     \
+                   case SIGFPE:                                                 \
+                     LOG(FATAL) << "FloatingPointError: " << strsignal(SIGNAL); \
+                     break;                                                     \
+                   case SIGBUS:                                                 \
+                     LOG(FATAL) << "IOError: " << strsignal(SIGNAL);            \
+                     break;                                                     \
+                   default:                                                     \
+                     LOG(FATAL) << "RuntimeError: " << strsignal(SIGNAL);       \
+                     break;                                                     \
+                 }                                                              \
+               }                                                                \
+             }),                                                                \
+      [](auto f) { signal(SIGNAL, f); });
 
 SIGNAL_HANDLER(SIGSEGV, SIGSEGVHandler, true);
 SIGNAL_HANDLER(SIGFPE, SIGFPEHandler, false);
diff --git a/src/initialize.h b/src/initialize.h
index d792613aefb2..5ee650c81654 100644
--- a/src/initialize.h
+++ b/src/initialize.h
@@ -1,4 +1,4 @@
-  /*
+/*
  * Licensed to the Apache Software Foundation (ASF) under one
  * or more contributor license agreements.  See the NOTICE file
  * distributed with this work for additional information
@@ -28,14 +28,11 @@
 #include <map>
 #include "dmlc/io.h"
 
-
 #ifndef MXNET_INITIALIZE_H_
 #define MXNET_INITIALIZE_H_
 
 namespace mxnet {
 
-
-
 void pthread_atfork_prepare();
 void pthread_atfork_parent();
 void pthread_atfork_child();
@@ -64,7 +61,6 @@ class LibraryInitializer {
    */
   bool was_forked() const;
 
-
   // Library loading
   bool lib_is_loaded(const std::string& path) const;
   void* lib_load(const char* path);
@@ -113,8 +109,8 @@ class LibraryInitializer {
  * \param func_name function name to search for in the library
  * \return func a function pointer
  */
-template<typename T>
-T get_func(void *lib, const char *func_name) {
+template <typename T>
+T get_func(void* lib, const char* func_name) {
   T func;
   LibraryInitializer::Get()->get_sym(lib, reinterpret_cast<void**>(&func), func_name);
   if (!func)
diff --git a/src/io/batchify.cc b/src/io/batchify.cc
index 01d93f5cad8f..acdcf4c74f57 100644
--- a/src/io/batchify.cc
+++ b/src/io/batchify.cc
@@ -38,58 +38,58 @@
 namespace mxnet {
 namespace io {
 
-
 #define tostr(s) #s
 
 #ifdef _MSC_VER
-  #if _MSC_VER < 1925
-    #define omp_parallel(t) __pragma(omp parallel for num_threads(t))
-  #else
-    #define omp_parallel(t) _Pragma(tostr(omp parallel for num_threads( ## t ## )))
-  #endif
+#if _MSC_VER < 1925
+#define omp_parallel(t) __pragma(omp parallel for num_threads(t))
+#else
+#define omp_parallel(t) _Pragma(tostr(omp parallel for num_threads( ## t ## )))
+#endif
 #else
-  #define omp_parallel(t) _Pragma(tostr(omp parallel for num_threads(t)))
+#define omp_parallel(t) _Pragma(tostr(omp parallel for num_threads(t)))
 #endif
 
 struct GroupBatchifyParam : public dmlc::Parameter<GroupBatchifyParam> {
   mxnet::Tuple<std::intptr_t> functions;
   // declare parameters
   DMLC_DECLARE_PARAMETER(GroupBatchifyParam) {
-      DMLC_DECLARE_FIELD(functions)
-          .describe("Internal sequentially applied batchify functions. "
-                    "The number of functions must match output of dataset items.");
+    DMLC_DECLARE_FIELD(functions).describe(
+        "Internal sequentially applied batchify functions. "
+        "The number of functions must match output of dataset items.");
   }
 };  // struct GroupBatchifyParam
 DMLC_REGISTER_PARAMETER(GroupBatchifyParam);
 
 class GroupBatchify : public BatchifyFunction {
  public:
-  explicit GroupBatchify(const std::vector<std::pair<std::string, std::string> >& kwargs) {
+  explicit GroupBatchify(const std::vector<std::pair<std::string, std::string>>& kwargs) {
     param_.InitAllowUnknown(kwargs);
     fs_.reserve(param_.functions.ndim());
     for (int i = 0; i < param_.functions.ndim(); ++i) {
-        fs_.emplace_back(*static_cast<BatchifyFunctionPtr*>(
-            reinterpret_cast<void*>(param_.functions[i])));
+      fs_.emplace_back(
+          *static_cast<BatchifyFunctionPtr*>(reinterpret_cast<void*>(param_.functions[i])));
     }
   }
 
-  bool Batchify(const std::vector<std::vector<NDArray> >& inputs,
-                        std::vector<NDArray>* outputs) override {
+  bool Batchify(const std::vector<std::vector<NDArray>>& inputs,
+                std::vector<NDArray>* outputs) override {
     auto bs = inputs.size();
     CHECK_GT(bs, 0) << "BatchifyFunction should handle at lease 1 sample";
     auto out_size = inputs[0].size();
-    CHECK_EQ(out_size, fs_.size()) << "In GroupBatchifyFunction, Elem size "
-      << out_size << " and batchify function size " << fs_.size() << " must match";
+    CHECK_EQ(out_size, fs_.size()) << "In GroupBatchifyFunction, Elem size " << out_size
+                                   << " and batchify function size " << fs_.size() << " must match";
     outputs->resize(out_size);
     for (size_t i = 0; i < out_size; ++i) {
-      std::vector<std::vector<NDArray> > inp;
+      std::vector<std::vector<NDArray>> inp;
       inp.reserve(inputs.size());
-      for (const auto & input : inputs) {
-          std::vector<NDArray> curr({input[i]});
-          inp.emplace_back(curr);
+      for (const auto& input : inputs) {
+        std::vector<NDArray> curr({input[i]});
+        inp.emplace_back(curr);
       }
       std::vector<NDArray> tmp;
-      if (!fs_[i]->Batchify(inp, &tmp)) return false;
+      if (!fs_[i]->Batchify(inp, &tmp))
+        return false;
       (*outputs)[i] = tmp[0];
     }
     return true;
@@ -103,20 +103,19 @@ class GroupBatchify : public BatchifyFunction {
 };  // class GroupBatchify
 
 MXNET_REGISTER_IO_BATCHIFY_FUNCTION(GroupBatchify)
-  .describe(R"code(Returns the GroupBatchify function.
+    .describe(R"code(Returns the GroupBatchify function.
     )code" ADD_FILELINE)
-  .add_arguments(GroupBatchifyParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    return new GroupBatchify(kwargs);
-});
+    .add_arguments(GroupBatchifyParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new GroupBatchify(kwargs);
+    });
 
 struct StackBatchifyParam : public dmlc::Parameter<StackBatchifyParam> {
   /*! \brief Length of the sequence. */
   int use_shared_mem;
   // declare parameters
   DMLC_DECLARE_PARAMETER(StackBatchifyParam) {
-      DMLC_DECLARE_FIELD(use_shared_mem).set_default(0)
-          .describe("If 1, use shared memory.");
+    DMLC_DECLARE_FIELD(use_shared_mem).set_default(0).describe("If 1, use shared memory.");
   }
 };  // struct StackBatchifyParam
 
@@ -124,90 +123,87 @@ DMLC_REGISTER_PARAMETER(StackBatchifyParam);
 
 class StackBatchify : public BatchifyFunction {
  public:
-  explicit StackBatchify(const std::vector<std::pair<std::string, std::string> >& kwargs) {
+  explicit StackBatchify(const std::vector<std::pair<std::string, std::string>>& kwargs) {
     param_.InitAllowUnknown(kwargs);
   }
 
-  bool Batchify(const std::vector<std::vector<NDArray> >& inputs,
-                        std::vector<NDArray>* outputs) override {
+  bool Batchify(const std::vector<std::vector<NDArray>>& inputs,
+                std::vector<NDArray>* outputs) override {
     auto out_size = SanityCheck(inputs);
-    auto bs = inputs.size();
+    auto bs       = inputs.size();
     outputs->resize(out_size);
     for (size_t i = 0; i < out_size; ++i) {
-        // Process i-th output
-        mxnet::TShape ashape = inputs[0][i].shape();
-        CHECK_GE(ashape.ndim(), 0) << "Data dim must be larger than 0";
-        // check if all shapes are same
-        for (size_t j = 1; j < bs; ++j) {
-            CHECK_EQ(ashape, inputs[j][i].shape())
-              << "StackBatchify requires all data along batch dim to be the same, "
-              << "mismatch " << ashape << " vs. " << inputs[j][i].shape();
-        }
+      // Process i-th output
+      mxnet::TShape ashape = inputs[0][i].shape();
+      CHECK_GE(ashape.ndim(), 0) << "Data dim must be larger than 0";
+      // check if all shapes are same
+      for (size_t j = 1; j < bs; ++j) {
+        CHECK_EQ(ashape, inputs[j][i].shape())
+            << "StackBatchify requires all data along batch dim to be the same, "
+            << "mismatch " << ashape << " vs. " << inputs[j][i].shape();
+      }
 
-        // calculate output ndarray size
-        TShape sshape(ashape.ndim() + 1, 0);
-        sshape[0] = bs;
-        for (int k = 0; k < ashape.ndim(); ++k) {
-          sshape[k + 1] = ashape[k];
-        }
+      // calculate output ndarray size
+      TShape sshape(ashape.ndim() + 1, 0);
+      sshape[0] = bs;
+      for (int k = 0; k < ashape.ndim(); ++k) {
+        sshape[k + 1] = ashape[k];
+      }
 
-        int dtype = inputs[0][i].dtype();
-        if (!(*outputs)[i].is_none() && (*outputs)[i].ctx() == mxnet::Context::CPU(0) &&
-            (*outputs)[i].dtype() == dtype &&
-            (*outputs)[i].storage_type() == kDefaultStorage) {
-          if ((*outputs)[i].shape() != sshape) {
-            // realloc
-            (*outputs)[i].ReshapeAndAlloc(sshape);
-          }
-        } else {
-          (*outputs)[i] = NDArray(sshape, mxnet::Context::CPU(0), false, inputs[0][i].dtype());
+      int dtype = inputs[0][i].dtype();
+      if (!(*outputs)[i].is_none() && (*outputs)[i].ctx() == mxnet::Context::CPU(0) &&
+          (*outputs)[i].dtype() == dtype && (*outputs)[i].storage_type() == kDefaultStorage) {
+        if ((*outputs)[i].shape() != sshape) {
+          // realloc
+          (*outputs)[i].ReshapeAndAlloc(sshape);
         }
-        int sbs = static_cast<int>(bs);
-        MSHADOW_TYPE_SWITCH_WITH_BOOL(dtype, DType, {
-          omp_parallel(bs)
-          for (int j = 0; j < sbs; ++j) {
-            omp_exc_.Run([&] {
-              // inputs[j][i].WaitToRead();
-              DType *ptr = (*outputs)[i].data().dptr<DType>();
-              auto asize = ashape.Size();
-              RunContext rctx{(*outputs)[i].ctx(), nullptr, nullptr, false};
-              auto dst = TBlob(
-                ptr + asize * j, inputs[j][i].data().shape_, cpu::kDevMask, dtype, 0);
-              mxnet::ndarray::Copy<cpu, cpu>(
+      } else {
+        (*outputs)[i] = NDArray(sshape, mxnet::Context::CPU(0), false, inputs[0][i].dtype());
+      }
+      int sbs = static_cast<int>(bs);
+      MSHADOW_TYPE_SWITCH_WITH_BOOL(dtype, DType, {
+        omp_parallel(bs) for (int j = 0; j < sbs; ++j) {
+          omp_exc_.Run([&] {
+            // inputs[j][i].WaitToRead();
+            DType* ptr = (*outputs)[i].data().dptr<DType>();
+            auto asize = ashape.Size();
+            RunContext rctx{(*outputs)[i].ctx(), nullptr, nullptr, false};
+            auto dst = TBlob(ptr + asize * j, inputs[j][i].data().shape_, cpu::kDevMask, dtype, 0);
+            mxnet::ndarray::Copy<cpu, cpu>(
                 inputs[j][i].data(), &dst, Context::CPU(), Context::CPU(), rctx);
-            });
-          }
-          omp_exc_.Rethrow();
-        })
+          });
+        }
+        omp_exc_.Rethrow();
+      })
     }
     return true;
   }
+
  private:
   /*! \brief parameters */
   StackBatchifyParam param_;
   /*! \brief OMPException obj to store and rethrow exceptions from omp blocks*/
   dmlc::OMPException omp_exc_;
 
-  std::size_t SanityCheck(const std::vector<std::vector<NDArray> >& inputs) {
+  std::size_t SanityCheck(const std::vector<std::vector<NDArray>>& inputs) {
     auto bs = inputs.size();
     CHECK_GT(bs, 0) << "BatchifyFunction should handle at lease 1 sample";
     auto out_size = inputs[0].size();
     // sanity check: each input has same size
     for (size_t i = 1; i < bs; ++i) {
-        CHECK_EQ(inputs[i].size(), out_size)
-          << i << "-th input size does not match " << out_size;
+      CHECK_EQ(inputs[i].size(), out_size) << i << "-th input size does not match " << out_size;
     }
     return out_size;
   }
 };  // class StackBatchify
 
 MXNET_REGISTER_IO_BATCHIFY_FUNCTION(StackBatchify)
-  .describe(R"code(Returns the StackBatchify function.
+    .describe(R"code(Returns the StackBatchify function.
     )code" ADD_FILELINE)
-  .add_arguments(StackBatchifyParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    return new StackBatchify(kwargs);
-});
+    .add_arguments(StackBatchifyParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new StackBatchify(kwargs);
+    });
 
 struct PadBatchifyParam : public dmlc::Parameter<PadBatchifyParam> {
   int use_shared_mem;
@@ -216,14 +212,12 @@ struct PadBatchifyParam : public dmlc::Parameter<PadBatchifyParam> {
   int round_to;
   // declare parameters
   DMLC_DECLARE_PARAMETER(PadBatchifyParam) {
-      DMLC_DECLARE_FIELD(use_shared_mem).set_default(0)
-          .describe("If 1, use shared memory.");
-      DMLC_DECLARE_FIELD(pad_val).set_default(0)
-          .describe("The filled values, default to 0.");
-      DMLC_DECLARE_FIELD(dtype).set_default(-1)
-        .describe("If not -1, force to use dtype as output type, otherwise use input type.");
-      DMLC_DECLARE_FIELD(round_to).set_default(-1)
-        .describe("If > 0, the padded dimension will be rounded to be multiple of this value.");
+    DMLC_DECLARE_FIELD(use_shared_mem).set_default(0).describe("If 1, use shared memory.");
+    DMLC_DECLARE_FIELD(pad_val).set_default(0).describe("The filled values, default to 0.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).describe(
+        "If not -1, force to use dtype as output type, otherwise use input type.");
+    DMLC_DECLARE_FIELD(round_to).set_default(-1).describe(
+        "If > 0, the padded dimension will be rounded to be multiple of this value.");
   }
 };  // struct PadBatchifyParam
 
@@ -231,128 +225,136 @@ DMLC_REGISTER_PARAMETER(PadBatchifyParam);
 
 class PadBatchify : public BatchifyFunction {
  public:
-  explicit PadBatchify(const std::vector<std::pair<std::string, std::string> >& kwargs) {
+  explicit PadBatchify(const std::vector<std::pair<std::string, std::string>>& kwargs) {
     param_.InitAllowUnknown(kwargs);
   }
 
-  bool Batchify(const std::vector<std::vector<NDArray> >& inputs,
-                        std::vector<NDArray>* outputs) override {
+  bool Batchify(const std::vector<std::vector<NDArray>>& inputs,
+                std::vector<NDArray>* outputs) override {
     auto bs = inputs.size();
     CHECK_GT(bs, 0) << "BatchifyFunction should handle at lease 1 sample";
     auto out_size = inputs[0].size();
     outputs->resize(out_size);
     for (size_t i = 0; i < out_size; ++i) {
-        // Process i-th output
-        mxnet::TShape ashape = inputs[0][i].shape();
-        CHECK_GE(ashape.ndim(), 0) << "Data dim must be larger than 0";
-        // find the maximum size in each dim
-        for (size_t j = 1; j < bs; ++j) {
-          mxnet::TShape other_shape = inputs[j][i].shape();
-          CHECK_EQ(ashape.ndim(), other_shape.ndim())
-            << "PadBatchify expects all inputs to have same dimensionality: given "
-            << ashape.ndim() << " vs. " << other_shape.ndim();
-            for (dim_t k = 0; k < ashape.ndim(); ++k) {
-              ashape[k] = std::max(ashape[k], other_shape[k]);
-            }
-        }
+      // Process i-th output
+      mxnet::TShape ashape = inputs[0][i].shape();
+      CHECK_GE(ashape.ndim(), 0) << "Data dim must be larger than 0";
+      // find the maximum size in each dim
+      for (size_t j = 1; j < bs; ++j) {
+        mxnet::TShape other_shape = inputs[j][i].shape();
+        CHECK_EQ(ashape.ndim(), other_shape.ndim())
+            << "PadBatchify expects all inputs to have same dimensionality: given " << ashape.ndim()
+            << " vs. " << other_shape.ndim();
         for (dim_t k = 0; k < ashape.ndim(); ++k) {
-          // pad to multiple of round_to
-          if (param_.round_to > 0) {
-            ashape[k] = param_.round_to * static_cast<int>(
-              std::ceil(static_cast<double>(ashape[k] / param_.round_to)));
-          }
+          ashape[k] = std::max(ashape[k], other_shape[k]);
         }
-
-        // calculate output ndarray size
-        TShape sshape(ashape.ndim() + 1, 0);
-        sshape[0] = bs;
-        for (int k = 0; k < ashape.ndim(); ++k) {
-          sshape[k + 1] = ashape[k];
+      }
+      for (dim_t k = 0; k < ashape.ndim(); ++k) {
+        // pad to multiple of round_to
+        if (param_.round_to > 0) {
+          ashape[k] = param_.round_to *
+                      static_cast<int>(std::ceil(static_cast<double>(ashape[k] / param_.round_to)));
         }
+      }
 
-        int dtype = param_.dtype > -1 ? param_.dtype : inputs[0][i].dtype();
-        if (!(*outputs)[i].is_none() &&
-            (*outputs)[i].ctx() == mxnet::Context::CPU(0) &&
-            (*outputs)[i].dtype() == dtype &&
-            (*outputs)[i].storage_type() == kDefaultStorage) {
-          if ((*outputs)[i].shape() != sshape) {
-            // realloc
-            (*outputs)[i].ReshapeAndAlloc(sshape);
-          }
-        } else {
-          (*outputs)[i] = NDArray(sshape, mxnet::Context::CPU(0), false, inputs[0][i].dtype());
+      // calculate output ndarray size
+      TShape sshape(ashape.ndim() + 1, 0);
+      sshape[0] = bs;
+      for (int k = 0; k < ashape.ndim(); ++k) {
+        sshape[k + 1] = ashape[k];
+      }
+
+      int dtype = param_.dtype > -1 ? param_.dtype : inputs[0][i].dtype();
+      if (!(*outputs)[i].is_none() && (*outputs)[i].ctx() == mxnet::Context::CPU(0) &&
+          (*outputs)[i].dtype() == dtype && (*outputs)[i].storage_type() == kDefaultStorage) {
+        if ((*outputs)[i].shape() != sshape) {
+          // realloc
+          (*outputs)[i].ReshapeAndAlloc(sshape);
         }
-        MSHADOW_TYPE_SWITCH_WITH_BOOL(dtype, DType, {
-          // fill pad value first
-          std::fill((*outputs)[i].data().dptr<DType>(),
-                    (*outputs)[i].data().dptr<DType>() + sshape.Size(),
-                    static_cast<DType>(param_.pad_val));
-          DType *ptr = (*outputs)[i].data().dptr<DType>();
-          auto asize = ashape.Size();
-          int sbs = static_cast<int>(bs);
-          omp_parallel(bs)
-          for (int j = 0; j < sbs; ++j) {
-            using namespace mshadow::expr;
-            auto compact_shapes = CompactShapes(ashape, inputs[j][i].shape());
-            // inputs[j][i].WaitToRead();
-            auto& fshape = compact_shapes.first;
-            auto& cshape = compact_shapes.second;
-            switch (fshape.size()) {
-              case 1U: {
-                mshadow::Tensor<cpu, 1, DType> dst = TBlob(
-                  ptr + asize * j, ashape, cpu::kDevMask, dtype, 0).get_with_shape<cpu, 1, DType>(
-                    mshadow::Shape1(fshape[0]));
-                mshadow::Tensor<cpu, 1, DType> src = inputs[j][i].data().get_with_shape<
-                  cpu, 1, DType>(mshadow::Shape1(cshape[0]));
-                slice<0>(dst, 0, cshape[0]) = src;
-                break;
-              }
-              case 2U: {
-                mshadow::Tensor<cpu, 2, DType> dst = TBlob(
-                  ptr + asize * j, ashape, cpu::kDevMask, dtype, 0).get_with_shape<cpu, 2, DType>(
-                    mshadow::Shape2(fshape[0], fshape[1]));
-                mshadow::Tensor<cpu, 2, DType> src = inputs[j][i].data().get_with_shape<
-                  cpu, 2, DType>(mshadow::Shape2(cshape[0], cshape[1]));
-                slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]) = src;
-                break;
-              }
-              case 3U: {
-                mshadow::Tensor<cpu, 3, DType> dst = TBlob(
-                  ptr + asize * j, ashape, cpu::kDevMask, dtype, 0).get_with_shape<cpu, 3, DType>(
-                    mshadow::Shape3(fshape[0], fshape[1], fshape[2]));
-                mshadow::Tensor<cpu, 3, DType> src = inputs[j][i].data().get_with_shape<
-                  cpu, 3, DType>(mshadow::Shape3(cshape[0], cshape[1], cshape[2]));
-                slice<2>(slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]), 0, cshape[2]) = src;
-                break;
-              }
-              case 4U: {
-                mshadow::Tensor<cpu, 4, DType> dst = TBlob(
-                  ptr + asize * j, ashape, cpu::kDevMask, dtype, 0).get_with_shape<cpu, 4, DType>(
-                    mshadow::Shape4(fshape[0], fshape[1], fshape[2], fshape[3]));
-                mshadow::Tensor<cpu, 4, DType> src = inputs[j][i].data().get_with_shape<
-                  cpu, 4, DType>(mshadow::Shape4(cshape[0], cshape[1], cshape[2], cshape[3]));
-                slice<3>(slice<2>(slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]),
-                                                    0, cshape[2]), 0, cshape[3]) = src;
-                break;
-              }
-              case 5U: {
-                mshadow::Tensor<cpu, 5, DType> dst = TBlob(
-                  ptr + asize * j, ashape, cpu::kDevMask, dtype, 0).get_with_shape<cpu, 5, DType>(
-                    mshadow::Shape5(fshape[0], fshape[1], fshape[2], fshape[3], fshape[4]));
-                mshadow::Tensor<cpu, 5, DType> src = inputs[j][i].data().get_with_shape<
-                  cpu, 5, DType>(mshadow::Shape5(
-                    cshape[0], cshape[1], cshape[2], cshape[3], cshape[4]));
-                slice<4>(slice<3>(slice<2>(slice<1>(slice<0>(
-                  dst, 0, cshape[0]), 0, cshape[1]), 0, cshape[2]),
-                  0, cshape[3]), 0, cshape[4]) = src;
-                break;
-              }
-              default: {
-                LOG(FATAL) << "# dim to pad: " << cshape.size() << " exceeds limit of 5.";
-              }
+      } else {
+        (*outputs)[i] = NDArray(sshape, mxnet::Context::CPU(0), false, inputs[0][i].dtype());
+      }
+      MSHADOW_TYPE_SWITCH_WITH_BOOL(dtype, DType, {
+        // fill pad value first
+        std::fill((*outputs)[i].data().dptr<DType>(),
+                  (*outputs)[i].data().dptr<DType>() + sshape.Size(),
+                  static_cast<DType>(param_.pad_val));
+        DType* ptr = (*outputs)[i].data().dptr<DType>();
+        auto asize = ashape.Size();
+        int sbs    = static_cast<int>(bs);
+        omp_parallel(bs) for (int j = 0; j < sbs; ++j) {
+          using namespace mshadow::expr;
+          auto compact_shapes = CompactShapes(ashape, inputs[j][i].shape());
+          // inputs[j][i].WaitToRead();
+          auto& fshape = compact_shapes.first;
+          auto& cshape = compact_shapes.second;
+          switch (fshape.size()) {
+            case 1U: {
+              mshadow::Tensor<cpu, 1, DType> dst =
+                  TBlob(ptr + asize * j, ashape, cpu::kDevMask, dtype, 0)
+                      .get_with_shape<cpu, 1, DType>(mshadow::Shape1(fshape[0]));
+              mshadow::Tensor<cpu, 1, DType> src =
+                  inputs[j][i].data().get_with_shape<cpu, 1, DType>(mshadow::Shape1(cshape[0]));
+              slice<0>(dst, 0, cshape[0]) = src;
+              break;
+            }
+            case 2U: {
+              mshadow::Tensor<cpu, 2, DType> dst =
+                  TBlob(ptr + asize * j, ashape, cpu::kDevMask, dtype, 0)
+                      .get_with_shape<cpu, 2, DType>(mshadow::Shape2(fshape[0], fshape[1]));
+              mshadow::Tensor<cpu, 2, DType> src =
+                  inputs[j][i].data().get_with_shape<cpu, 2, DType>(
+                      mshadow::Shape2(cshape[0], cshape[1]));
+              slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]) = src;
+              break;
+            }
+            case 3U: {
+              mshadow::Tensor<cpu, 3, DType> dst =
+                  TBlob(ptr + asize * j, ashape, cpu::kDevMask, dtype, 0)
+                      .get_with_shape<cpu, 3, DType>(
+                          mshadow::Shape3(fshape[0], fshape[1], fshape[2]));
+              mshadow::Tensor<cpu, 3, DType> src =
+                  inputs[j][i].data().get_with_shape<cpu, 3, DType>(
+                      mshadow::Shape3(cshape[0], cshape[1], cshape[2]));
+              slice<2>(slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]), 0, cshape[2]) = src;
+              break;
+            }
+            case 4U: {
+              mshadow::Tensor<cpu, 4, DType> dst =
+                  TBlob(ptr + asize * j, ashape, cpu::kDevMask, dtype, 0)
+                      .get_with_shape<cpu, 4, DType>(
+                          mshadow::Shape4(fshape[0], fshape[1], fshape[2], fshape[3]));
+              mshadow::Tensor<cpu, 4, DType> src =
+                  inputs[j][i].data().get_with_shape<cpu, 4, DType>(
+                      mshadow::Shape4(cshape[0], cshape[1], cshape[2], cshape[3]));
+              slice<3>(slice<2>(slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]), 0, cshape[2]),
+                       0,
+                       cshape[3]) = src;
+              break;
+            }
+            case 5U: {
+              mshadow::Tensor<cpu, 5, DType> dst =
+                  TBlob(ptr + asize * j, ashape, cpu::kDevMask, dtype, 0)
+                      .get_with_shape<cpu, 5, DType>(
+                          mshadow::Shape5(fshape[0], fshape[1], fshape[2], fshape[3], fshape[4]));
+              mshadow::Tensor<cpu, 5, DType> src =
+                  inputs[j][i].data().get_with_shape<cpu, 5, DType>(
+                      mshadow::Shape5(cshape[0], cshape[1], cshape[2], cshape[3], cshape[4]));
+              slice<4>(
+                  slice<3>(
+                      slice<2>(slice<1>(slice<0>(dst, 0, cshape[0]), 0, cshape[1]), 0, cshape[2]),
+                      0,
+                      cshape[3]),
+                  0,
+                  cshape[4]) = src;
+              break;
+            }
+            default: {
+              LOG(FATAL) << "# dim to pad: " << cshape.size() << " exceeds limit of 5.";
             }
           }
-        })
+        }
+      })
     }
     return true;
   }
@@ -403,11 +405,11 @@ class PadBatchify : public BatchifyFunction {
 };  // class PadBatchify
 
 MXNET_REGISTER_IO_BATCHIFY_FUNCTION(PadBatchify)
-  .describe(R"code(Returns the StackBatchify function.
+    .describe(R"code(Returns the StackBatchify function.
     )code" ADD_FILELINE)
-  .add_arguments(PadBatchifyParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    return new PadBatchify(kwargs);
-});
+    .add_arguments(PadBatchifyParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new PadBatchify(kwargs);
+    });
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/dataloader.cc b/src/io/dataloader.cc
index 47754470453c..a3808e2128bc 100644
--- a/src/io/dataloader.cc
+++ b/src/io/dataloader.cc
@@ -45,22 +45,19 @@ struct ThreadedDataLoaderParam : public dmlc::Parameter<ThreadedDataLoaderParam>
   int pin_device_id;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ThreadedDataLoaderParam) {
-      DMLC_DECLARE_FIELD(num_workers).set_default(0)
-          .describe("Number of thread workers.");
-      DMLC_DECLARE_FIELD(dataset)
-          .describe("Pointer to shared Dataset.");
-      DMLC_DECLARE_FIELD(sampler)
-          .describe("Pointer to Sampler.");
-      DMLC_DECLARE_FIELD(batchify_fn)
-          .describe("Pointer to Batchify function.");
-      DMLC_DECLARE_FIELD(pin_device_id).set_default(-1)
-          .describe("If not negative, will move data to pinned memory.");
+    DMLC_DECLARE_FIELD(num_workers).set_default(0).describe("Number of thread workers.");
+    DMLC_DECLARE_FIELD(dataset).describe("Pointer to shared Dataset.");
+    DMLC_DECLARE_FIELD(sampler).describe("Pointer to Sampler.");
+    DMLC_DECLARE_FIELD(batchify_fn).describe("Pointer to Batchify function.");
+    DMLC_DECLARE_FIELD(pin_device_id)
+        .set_default(-1)
+        .describe("If not negative, will move data to pinned memory.");
   }
 };  // struct ThreadedDataLoaderParam
 
 DMLC_REGISTER_PARAMETER(ThreadedDataLoaderParam);
 
-template<typename DType = real_t>
+template <typename DType = real_t>
 class ThreadedDataLoader : public IIterator<TBlobBatch> {
  public:
   ThreadedDataLoader() = default;
@@ -70,20 +67,18 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
   void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.InitAllowUnknown(kwargs);
     int maxthread, threadget;
-    #pragma omp parallel
+#pragma omp parallel
     {
       // be conservative, set number of real cores
       maxthread = std::max(omp_get_num_procs(), 1);
     }
     param_.num_workers = std::min(maxthread, param_.num_workers);
-    #pragma omp parallel num_threads(param_.num_workers)
-    {
-      threadget = omp_get_num_threads();
-    }
+#pragma omp parallel num_threads(param_.num_workers)
+    { threadget = omp_get_num_threads(); }
     param_.num_workers = std::max(1, threadget);
-    dataset_ = *static_cast<std::shared_ptr<Dataset>*>(reinterpret_cast<void*>(param_.dataset));
+    dataset_     = *static_cast<std::shared_ptr<Dataset>*>(reinterpret_cast<void*>(param_.dataset));
     dataset_len_ = dataset_->GetLen();
-    sampler_ = static_cast<IIterator<DataBatch>* >(reinterpret_cast<void*>(param_.sampler));
+    sampler_     = static_cast<IIterator<DataBatch>*>(reinterpret_cast<void*>(param_.sampler));
     batchify_fn_ = *static_cast<BatchifyFunctionPtr*>(reinterpret_cast<void*>(param_.batchify_fn));
     this->BeforeFirst();
   }
@@ -98,12 +93,12 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
 
   bool Next() override {
     bool has_next = sampler_->Next();
-    if (!has_next) return false;
-    auto samples = sampler_->Value();
-    auto batch_size = samples.data[0].shape().Size();
-    int real_batch_size = batch_size - samples.num_batch_padd;
-    const int64_t *idx_ptr = static_cast<int64_t*>(
-        samples.data[0].data().dptr_);
+    if (!has_next)
+      return false;
+    auto samples           = sampler_->Value();
+    auto batch_size        = samples.data[0].shape().Size();
+    int real_batch_size    = batch_size - samples.num_batch_padd;
+    const int64_t* idx_ptr = static_cast<int64_t*>(samples.data[0].data().dptr_);
     std::vector<int64_t> idx_ptrs;
     idx_ptrs.assign(idx_ptr, idx_ptr + real_batch_size);
 
@@ -114,12 +109,11 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
     if (profiling) {
       profiler::CustomOpProfiler::Get()->OnCustomBegin("MXThreadedDataLoaderGetItems");
     }
-    #pragma omp parallel for num_threads(param_.num_workers)
+#pragma omp parallel for num_threads(param_.num_workers)
     for (int i = 0; i < real_batch_size; ++i) {
       omp_exc_.Run([&] {
         auto idx = idx_ptrs[i];
-        CHECK(dataset_->GetItem(idx, &inputs[i]))
-          << "Error getting data # " << idx;
+        CHECK(dataset_->GetItem(idx, &inputs[i])) << "Error getting data # " << idx;
       });
     }
     if (profiling) {
@@ -137,7 +131,7 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
       profiler::CustomOpProfiler::Get()->OnCustomBegin("MXThreadedDataLoaderBatchify");
     }
     CHECK(batchify_fn_->Batchify(inputs, &batched_buffer_))
-      << "Error call batchify inside dataloader";
+        << "Error call batchify inside dataloader";
     if (profiling) {
       profiler::CustomOpProfiler::Get()->OnCustomEnd();
     }
@@ -150,7 +144,7 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
     return true;
   }
 
-  const TBlobBatch &Value() const override {
+  const TBlobBatch& Value() const override {
     return out_;
   }
 
@@ -166,7 +160,7 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
   /*! \brief dataset length */
   int64_t dataset_len_;
   /*! \brief pointer to sampler iterator */
-  IIterator<DataBatch> *sampler_;
+  IIterator<DataBatch>* sampler_;
   /*! \brief pointer to batchify function */
   BatchifyFunctionPtr batchify_fn_;
   /*! \brief OMPException obj to store and rethrow exceptions from omp blocks*/
@@ -174,13 +168,10 @@ class ThreadedDataLoader : public IIterator<TBlobBatch> {
 };  // class ThreadedDataLoader
 
 MXNET_REGISTER_IO_ITER(ThreadedDataLoader)
-.describe(R"code(Returns a threaded data loader iterator.
+    .describe(R"code(Returns a threaded data loader iterator.
 )code" ADD_FILELINE)
-.add_arguments(ThreadedDataLoaderParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.set_body([]() {
-    return new PrefetcherIter(
-            new ThreadedDataLoader<mxnet::real_t>());
-  });
+    .add_arguments(ThreadedDataLoaderParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .set_body([]() { return new PrefetcherIter(new ThreadedDataLoader<mxnet::real_t>()); });
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/dataset.cc b/src/io/dataset.cc
index 31bffed88460..4690d340f06c 100644
--- a/src/io/dataset.cc
+++ b/src/io/dataset.cc
@@ -52,10 +52,8 @@ struct RecordFileDatasetParam : public dmlc::Parameter<RecordFileDatasetParam> {
   std::string idx_file;
   // declare parameters
   DMLC_DECLARE_PARAMETER(RecordFileDatasetParam) {
-      DMLC_DECLARE_FIELD(rec_file)
-          .describe("The absolute path of record file.");
-      DMLC_DECLARE_FIELD(idx_file)
-          .describe("The path of the idx file.");
+    DMLC_DECLARE_FIELD(rec_file).describe("The absolute path of record file.");
+    DMLC_DECLARE_FIELD(idx_file).describe("The path of the idx file.");
   }
 };  // struct RecordFileDatasetParam
 
@@ -63,11 +61,11 @@ DMLC_REGISTER_PARAMETER(RecordFileDatasetParam);
 
 class RecordFileDataset final : public Dataset {
  public:
-  explicit RecordFileDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    std::vector<std::pair<std::string, std::string> > kwargs_left;
+  explicit RecordFileDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
+    std::vector<std::pair<std::string, std::string>> kwargs_left;
     param_.InitAllowUnknown(kwargs);
     // read and process idx file
-    dmlc::Stream *idx_stream = dmlc::Stream::Create(param_.idx_file.c_str(), "r");
+    dmlc::Stream* idx_stream = dmlc::Stream::Create(param_.idx_file.c_str(), "r");
     dmlc::istream is(idx_stream);
     size_t key, idx;
     while (is >> key >> idx) {
@@ -94,15 +92,20 @@ class RecordFileDataset final : public Dataset {
     reader->Seek(pos);
     static thread_local std::string read_buff;
     if (reader->NextRecord(&read_buff)) {
-      const char *buf = read_buff.c_str();
+      const char* buf   = read_buff.c_str();
       const size_t size = read_buff.size();
       out = NDArray(TShape({static_cast<dim_t>(size)}), Context::CPU(), false, mshadow::kInt8);
       TBlob dst = out.data();
       RunContext rctx{Context::CPU(), nullptr, nullptr, false};
-      mxnet::ndarray::Copy<cpu, cpu>(
-        TBlob(const_cast<void*>(reinterpret_cast<const void*>(buf)),
-          out.shape(), cpu::kDevMask, out.dtype(), 0),
-          &dst, Context::CPU(), Context::CPU(), rctx);
+      mxnet::ndarray::Copy<cpu, cpu>(TBlob(const_cast<void*>(reinterpret_cast<const void*>(buf)),
+                                           out.shape(),
+                                           cpu::kDevMask,
+                                           out.dtype(),
+                                           0),
+                                     &dst,
+                                     Context::CPU(),
+                                     Context::CPU(),
+                                     rctx);
     }
     return true;
   }
@@ -115,11 +118,11 @@ class RecordFileDataset final : public Dataset {
 };
 
 MXNET_REGISTER_IO_DATASET(RecordFileDataset)
-  .describe("MXNet Record File Dataset")
-  .add_arguments(RecordFileDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new RecordFileDataset(kwargs);
-});
+    .describe("MXNet Record File Dataset")
+    .add_arguments(RecordFileDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new RecordFileDataset(kwargs);
+    });
 
 struct ImageRecordFileDatasetParam : public dmlc::Parameter<ImageRecordFileDatasetParam> {
   std::string rec_file;
@@ -127,21 +130,19 @@ struct ImageRecordFileDatasetParam : public dmlc::Parameter<ImageRecordFileDatas
   int flag;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageRecordFileDatasetParam) {
-      DMLC_DECLARE_FIELD(rec_file)
-          .describe("The absolute path of record file.");
-      DMLC_DECLARE_FIELD(idx_file)
-          .describe("The path of the idx file.");
-      DMLC_DECLARE_FIELD(flag).set_default(1)
-          .describe("If 1, always convert to colored, if 0 always convert to grayscale.");
+    DMLC_DECLARE_FIELD(rec_file).describe("The absolute path of record file.");
+    DMLC_DECLARE_FIELD(idx_file).describe("The path of the idx file.");
+    DMLC_DECLARE_FIELD(flag).set_default(1).describe(
+        "If 1, always convert to colored, if 0 always convert to grayscale.");
   }
 };  // struct ImageRecordFileDatasetParam
 
 DMLC_REGISTER_PARAMETER(ImageRecordFileDatasetParam);
 
 #if MXNET_USE_OPENCV
-template<int n_channels>
-void SwapImageChannels(const cv::Mat &img, NDArray* arr) {
-  int swap_indices[n_channels]; // NOLINT(*)
+template <int n_channels>
+void SwapImageChannels(const cv::Mat& img, NDArray* arr) {
+  int swap_indices[n_channels];  // NOLINT(*)
   if (n_channels == 1) {
     swap_indices[0] = 0;
   } else if (n_channels == 3) {
@@ -165,7 +166,7 @@ void SwapImageChannels(const cv::Mat &img, NDArray* arr) {
   // swap channels while copying elements into buffer
   for (int i = 0; i < img.rows; ++i) {
     const uint8_t* im_data = img.ptr<uint8_t>(i);
-    uint8_t* buffer_data = ptr + i * img.cols * n_channels;
+    uint8_t* buffer_data   = ptr + i * img.cols * n_channels;
     for (int j = 0; j < img.cols; ++j) {
       for (int k = 0; k < n_channels; ++k) {
         buffer_data[k] = im_data[swap_indices[k]];
@@ -188,8 +189,8 @@ struct IRHeader {
 
 class ImageRecordFileDataset : public Dataset {
  public:
-  explicit ImageRecordFileDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    std::vector<std::pair<std::string, std::string> > kwargs_left;
+  explicit ImageRecordFileDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
+    std::vector<std::pair<std::string, std::string>> kwargs_left;
     param_.InitAllowUnknown(kwargs);
     base_ = std::make_shared<RecordFileDataset>(kwargs);
   }
@@ -201,9 +202,10 @@ class ImageRecordFileDataset : public Dataset {
   bool GetItem(uint64_t idx, std::vector<NDArray>* ret) override {
     CHECK_LT(idx, GetLen());
     std::vector<NDArray> raw;
-    if (!base_->GetItem(idx, &raw)) return false;
+    if (!base_->GetItem(idx, &raw))
+      return false;
     CHECK_EQ(raw.size(), 1U) << "RecordFileDataset should return size 1 NDArray vector";
-    uint8_t *s = reinterpret_cast<uint8_t*>(raw[0].data().dptr_);
+    uint8_t* s  = reinterpret_cast<uint8_t*>(raw[0].data().dptr_);
     size_t size = raw[0].shape().Size();
     CHECK_GT(size, sizeof(IRHeader)) << "Invalid size of bytes from Record File";
     IRHeader header;
@@ -217,14 +219,17 @@ class ImageRecordFileDataset : public Dataset {
       label.ReshapeAndAlloc(label_shape);
       TBlob dst = label.data();
       mxnet::ndarray::Copy<cpu, cpu>(
-        TBlob(reinterpret_cast<void*>(s), label.shape(), cpu::kDevMask, label.dtype(), 0),
-        &dst, Context::CPU(), Context::CPU(), rctx);
+          TBlob(reinterpret_cast<void*>(s), label.shape(), cpu::kDevMask, label.dtype(), 0),
+          &dst,
+          Context::CPU(),
+          Context::CPU(),
+          rctx);
       s += sizeof(float) * header.flag;
       size -= sizeof(float) * header.flag;
     } else {
       // label is a scalar with ndim() == 0
       label.ReshapeAndAlloc(TShape(0, 1));
-      TBlob dst = label.data();
+      TBlob dst            = label.data();
       *(dst.dptr<float>()) = header.label;
     }
     ret->resize(2);
@@ -243,9 +248,9 @@ class ImageRecordFileDataset : public Dataset {
     }
     return true;
 #else
-  LOG(FATAL) << "Opencv is needed for image decoding.";
+    LOG(FATAL) << "Opencv is needed for image decoding.";
 #endif
-  return false;  // should not reach here
+    return false;  // should not reach here
   }
 
  private:
@@ -256,11 +261,11 @@ class ImageRecordFileDataset : public Dataset {
 };
 
 MXNET_REGISTER_IO_DATASET(ImageRecordFileDataset)
-  .describe("MXNet Image Record File Dataset")
-  .add_arguments(ImageRecordFileDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new ImageRecordFileDataset(kwargs);
-});
+    .describe("MXNet Image Record File Dataset")
+    .add_arguments(ImageRecordFileDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new ImageRecordFileDataset(kwargs);
+    });
 
 struct ImageSequenceDatasetParam : public dmlc::Parameter<ImageSequenceDatasetParam> {
   /*! \brief the list of absolute image paths, separated by \0 characters */
@@ -268,18 +273,17 @@ struct ImageSequenceDatasetParam : public dmlc::Parameter<ImageSequenceDatasetPa
   /*! \brief the path separator character, by default it's ; */
   char path_sep;
   /*! \brief If flag is 0, always convert to grayscale(1 channel).
-  * If flag is 1, always convert to colored (3 channels).
-  * If flag is -1, keep channels unchanged.
-  */
+   * If flag is 1, always convert to colored (3 channels).
+   * If flag is -1, keep channels unchanged.
+   */
   int flag;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageSequenceDatasetParam) {
-      DMLC_DECLARE_FIELD(img_list)
-          .describe("The list of image absolute paths.");
-      DMLC_DECLARE_FIELD(path_sep).set_default('|')
-          .describe("The path separator for joined image paths.");
-      DMLC_DECLARE_FIELD(flag).set_default(1)
-          .describe("If 1, always convert to colored, if 0 always convert to grayscale.");
+    DMLC_DECLARE_FIELD(img_list).describe("The list of image absolute paths.");
+    DMLC_DECLARE_FIELD(path_sep).set_default('|').describe(
+        "The path separator for joined image paths.");
+    DMLC_DECLARE_FIELD(flag).set_default(1).describe(
+        "If 1, always convert to colored, if 0 always convert to grayscale.");
   }
 };  // struct ImageSequenceDatasetParam
 
@@ -287,8 +291,8 @@ DMLC_REGISTER_PARAMETER(ImageSequenceDatasetParam);
 
 class ImageSequenceDataset final : public Dataset {
  public:
-  explicit ImageSequenceDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    std::vector<std::pair<std::string, std::string> > kwargs_left;
+  explicit ImageSequenceDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
+    std::vector<std::pair<std::string, std::string>> kwargs_left;
     param_.InitAllowUnknown(kwargs);
     img_list_ = dmlc::Split(param_.img_list, param_.path_sep);
   }
@@ -300,7 +304,7 @@ class ImageSequenceDataset final : public Dataset {
   bool GetItem(uint64_t idx, std::vector<NDArray>* ret) override {
 #if MXNET_USE_OPENCV
     CHECK_LT(idx, img_list_.size())
-      << "GetItem index: " << idx << " out of bound: " << img_list_.size();
+        << "GetItem index: " << idx << " out of bound: " << img_list_.size();
     cv::Mat res = cv::imread(img_list_[idx], param_.flag);
     CHECK(!res.empty()) << "Decoding failed. Invalid image file.";
     const int n_channels = res.channels();
@@ -314,9 +318,9 @@ class ImageSequenceDataset final : public Dataset {
     }
     return true;
 #else
-  LOG(FATAL) << "Opencv is needed for image decoding.";
+    LOG(FATAL) << "Opencv is needed for image decoding.";
 #endif
-  return false;
+    return false;
   }
 
  private:
@@ -327,19 +331,18 @@ class ImageSequenceDataset final : public Dataset {
 };
 
 MXNET_REGISTER_IO_DATASET(ImageSequenceDataset)
-  .describe("Image Sequence Dataset")
-  .add_arguments(ImageSequenceDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new ImageSequenceDataset(kwargs);
-});
+    .describe("Image Sequence Dataset")
+    .add_arguments(ImageSequenceDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new ImageSequenceDataset(kwargs);
+    });
 
 struct NDArrayDatasetParam : public dmlc::Parameter<NDArrayDatasetParam> {
   /*! \brief the source ndarray */
   std::intptr_t arr;
   // declare parameters
   DMLC_DECLARE_PARAMETER(NDArrayDatasetParam) {
-      DMLC_DECLARE_FIELD(arr)
-          .describe("Pointer to NDArray.");
+    DMLC_DECLARE_FIELD(arr).describe("Pointer to NDArray.");
   }
 };  // struct NDArrayDatasetParam
 
@@ -347,7 +350,7 @@ DMLC_REGISTER_PARAMETER(NDArrayDatasetParam);
 
 class NDArrayDataset final : public Dataset {
  public:
-  explicit NDArrayDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
+  explicit NDArrayDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
     param_.InitAllowUnknown(kwargs);
     data_ = *(static_cast<NDArray*>(reinterpret_cast<void*>(param_.arr)));
     if (data_.shape().ndim() < 1) {
@@ -361,11 +364,10 @@ class NDArrayDataset final : public Dataset {
   }
 
   bool GetItem(uint64_t idx, std::vector<NDArray>* rets) override {
-    CHECK_LT(idx, size_)
-      << "GetItem index: " << idx << " out of bound: " << size_;
+    CHECK_LT(idx, size_) << "GetItem index: " << idx << " out of bound: " << size_;
     rets->resize(1);
     auto& ret = (*rets)[0];
-    ret = data_.Slice(idx, idx + 1);
+    ret       = data_.Slice(idx, idx + 1);
     if (ret.shape().ndim() > 1) {
       // remove first dim to be consistent with numpy
       TShape new_shape;
@@ -391,19 +393,18 @@ class NDArrayDataset final : public Dataset {
 };  // class NDArrayDataset
 
 MXNET_REGISTER_IO_DATASET(NDArrayDataset)
-  .describe("Single NDArray Dataset")
-  .add_arguments(NDArrayDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new NDArrayDataset(kwargs);
-});
+    .describe("Single NDArray Dataset")
+    .add_arguments(NDArrayDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new NDArrayDataset(kwargs);
+    });
 
 struct GroupDatasetParam : public dmlc::Parameter<GroupDatasetParam> {
   /*! \brief the source ndarray */
   Tuple<std::intptr_t> datasets;
   // declare parameters
   DMLC_DECLARE_PARAMETER(GroupDatasetParam) {
-      DMLC_DECLARE_FIELD(datasets)
-          .describe("A small set of pointers to other c++ datasets.");
+    DMLC_DECLARE_FIELD(datasets).describe("A small set of pointers to other c++ datasets.");
   }
 };  // struct GroupDatasetParam
 
@@ -411,8 +412,8 @@ DMLC_REGISTER_PARAMETER(GroupDatasetParam);
 
 class GroupDataset final : public Dataset {
  public:
-  explicit GroupDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
-    std::vector<std::pair<std::string, std::string> > kwargs_left;
+  explicit GroupDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
+    std::vector<std::pair<std::string, std::string>> kwargs_left;
     param_.InitAllowUnknown(kwargs);
     auto childs = param_.datasets;
     childs_.reserve(childs.ndim());
@@ -422,9 +423,8 @@ class GroupDataset final : public Dataset {
       if (child_cnt == 0) {
         size_ = d->GetLen();
       } else {
-        CHECK_EQ(size_, d->GetLen())
-          << "All child dataset of GroupDataset must be identical "
-          << "Given mismatch: " << size_ << " vs " << d->GetLen();
+        CHECK_EQ(size_, d->GetLen()) << "All child dataset of GroupDataset must be identical "
+                                     << "Given mismatch: " << size_ << " vs " << d->GetLen();
       }
       childs_.emplace_back(d);
       child_cnt++;
@@ -436,12 +436,12 @@ class GroupDataset final : public Dataset {
   }
 
   bool GetItem(uint64_t idx, std::vector<NDArray>* ret) override {
-    CHECK_LT(idx, size_)
-      << "GetItem index: " << idx << " out of bound: " << size_;
+    CHECK_LT(idx, size_) << "GetItem index: " << idx << " out of bound: " << size_;
     ret->clear();
     for (const auto& child : childs_) {
       std::vector<NDArray> temp_ret;
-      if (!child->GetItem(idx, &temp_ret)) return false;
+      if (!child->GetItem(idx, &temp_ret))
+        return false;
       ret->insert(ret->end(), temp_ret.begin(), temp_ret.end());
     }
     return true;
@@ -454,14 +454,14 @@ class GroupDataset final : public Dataset {
   std::vector<std::shared_ptr<Dataset>> childs_;
   /*! \brief overall dataset size, equals to all child datasets */
   uint64_t size_;
-};   // class GroupDataset
+};  // class GroupDataset
 
 MXNET_REGISTER_IO_DATASET(GroupDataset)
-  .describe("Grouped Dataset that combine a bunch of datasets")
-  .add_arguments(GroupDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new GroupDataset(kwargs);
-});
+    .describe("Grouped Dataset that combine a bunch of datasets")
+    .add_arguments(GroupDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new GroupDataset(kwargs);
+    });
 
 struct IndexedDatasetParam : public dmlc::Parameter<IndexedDatasetParam> {
   /*! \brief the base dataset */
@@ -470,10 +470,10 @@ struct IndexedDatasetParam : public dmlc::Parameter<IndexedDatasetParam> {
   Tuple<uint64_t> indices;
   // declare parameters
   DMLC_DECLARE_PARAMETER(IndexedDatasetParam) {
-      DMLC_DECLARE_FIELD(base)
-          .describe("Pointer to the internal c++ dataset that is going to be indexed.");
-      DMLC_DECLARE_FIELD(indices)
-          .describe("The indices for the internal dataset. Output[i] will be base[indices[i]].");
+    DMLC_DECLARE_FIELD(base).describe(
+        "Pointer to the internal c++ dataset that is going to be indexed.");
+    DMLC_DECLARE_FIELD(indices).describe(
+        "The indices for the internal dataset. Output[i] will be base[indices[i]].");
   }
 };  // struct IndexedDatasetParam
 
@@ -481,7 +481,7 @@ DMLC_REGISTER_PARAMETER(IndexedDatasetParam);
 
 class IndexedDataset final : public Dataset {
  public:
-  explicit IndexedDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
+  explicit IndexedDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
     param_.InitAllowUnknown(kwargs);
     base_data_ = *static_cast<std::shared_ptr<Dataset>*>(reinterpret_cast<void*>(param_.base));
   }
@@ -491,11 +491,12 @@ class IndexedDataset final : public Dataset {
   }
 
   bool GetItem(uint64_t idx, std::vector<NDArray>* ret) override {
-    CHECK_GT(param_.indices.ndim(), idx) << "IndexError: " << idx
-      << " from total: " << param_.indices.ndim();
+    CHECK_GT(param_.indices.ndim(), idx)
+        << "IndexError: " << idx << " from total: " << param_.indices.ndim();
     auto new_idx = param_.indices[idx];
-    CHECK_GT(base_data_->GetLen(), new_idx) << "IndexError: " << new_idx
-      << " from original dataset with size: " << base_data_->GetLen();
+    CHECK_GT(base_data_->GetLen(), new_idx)
+        << "IndexError: " << new_idx
+        << " from original dataset with size: " << base_data_->GetLen();
     return base_data_->GetItem(new_idx, ret);
   }
 
@@ -504,14 +505,14 @@ class IndexedDataset final : public Dataset {
   IndexedDatasetParam param_;
   /*! \brief stored child dataset */
   std::shared_ptr<Dataset> base_data_;
-};   // class IndexedDataset
+};  // class IndexedDataset
 
 MXNET_REGISTER_IO_DATASET(IndexedDataset)
-  .describe("Grouped Dataset that combine a bunch of datasets")
-  .add_arguments(IndexedDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new IndexedDataset(kwargs);
-});
+    .describe("Grouped Dataset that combine a bunch of datasets")
+    .add_arguments(IndexedDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new IndexedDataset(kwargs);
+    });
 
 struct LazyTransformDatasetParam : public dmlc::Parameter<LazyTransformDatasetParam> {
   /*! \brief the source ndarray */
@@ -524,16 +525,16 @@ struct LazyTransformDatasetParam : public dmlc::Parameter<LazyTransformDatasetPa
   Tuple<int> scalar_outputs;
   // declare parameters
   DMLC_DECLARE_PARAMETER(LazyTransformDatasetParam) {
-      DMLC_DECLARE_FIELD(cached_op)
-          .describe("Pointer to cached transform function.");
-      DMLC_DECLARE_FIELD(dataset)
-          .describe("Pointer to internal dataset.");
-      DMLC_DECLARE_FIELD(transform_indices).set_default(Tuple<int>({}))
-          .describe("The indices for dataset items that need to be transformed/processed. "
-                    "If `transform_indices` is empty(default), "
-                    "then all items will be processed.");
-      DMLC_DECLARE_FIELD(scalar_outputs)
-          .describe("Indicate whether outputs are scalars, the size must match the output size.");
+    DMLC_DECLARE_FIELD(cached_op).describe("Pointer to cached transform function.");
+    DMLC_DECLARE_FIELD(dataset).describe("Pointer to internal dataset.");
+    DMLC_DECLARE_FIELD(transform_indices)
+        .set_default(Tuple<int>({}))
+        .describe(
+            "The indices for dataset items that need to be transformed/processed. "
+            "If `transform_indices` is empty(default), "
+            "then all items will be processed.");
+    DMLC_DECLARE_FIELD(scalar_outputs)
+        .describe("Indicate whether outputs are scalars, the size must match the output size.");
   }
 };  // struct LazyTransformDatasetParam
 
@@ -542,30 +543,29 @@ DMLC_REGISTER_PARAMETER(LazyTransformDatasetParam);
 class LazyTransformDataset final : public Dataset {
  public:
   LazyTransformDataset(const LazyTransformDataset& other) {
-    this->param_ = other.param_;
+    this->param_                = other.param_;
     this->pass_through_indices_ = other.pass_through_indices_;
-    this->use_input_indices_ = other.use_input_indices_;
-    this->num_outputs_ = other.num_outputs_;
-    this->cached_op_ = std::make_shared<NaiveCachedOp>(
-      other.cached_op_->sym_, other.cached_op_->flags_);
+    this->use_input_indices_    = other.use_input_indices_;
+    this->num_outputs_          = other.num_outputs_;
+    this->cached_op_ =
+        std::make_shared<NaiveCachedOp>(other.cached_op_->sym_, other.cached_op_->flags_);
     this->base_data_ = other.base_data_;
   }
 
-  explicit LazyTransformDataset(const std::vector<std::pair<std::string, std::string> >& kwargs) {
+  explicit LazyTransformDataset(const std::vector<std::pair<std::string, std::string>>& kwargs) {
     param_.InitAllowUnknown(kwargs);
-    auto op = *static_cast<CachedOpPtr*>(reinterpret_cast<void*>(param_.cached_op));
+    auto op    = *static_cast<CachedOpPtr*>(reinterpret_cast<void*>(param_.cached_op));
     cached_op_ = std::make_shared<NaiveCachedOp>(op->sym_, op->flags_);
     base_data_ = *static_cast<std::shared_ptr<Dataset>*>(reinterpret_cast<void*>(param_.dataset));
 
     // use first item to calculate size info
-    CHECK_GT(GetLen(), 0)
-      << "LazyTransformDataset expect the base dataset to have at least 1 item";
+    CHECK_GT(GetLen(), 0) << "LazyTransformDataset expect the base dataset to have at least 1 item";
     std::vector<NDArray> inputs;
     CHECK(base_data_->GetItem(0, &inputs));
     // check output size
     CHECK_EQ(param_.scalar_outputs.ndim(), cached_op_->num_outputs())
-      << "Output scalar info size: " << param_.scalar_outputs.ndim() << " vs. output size: "
-      << cached_op_->num_outputs() << " mismatch!";
+        << "Output scalar info size: " << param_.scalar_outputs.ndim()
+        << " vs. output size: " << cached_op_->num_outputs() << " mismatch!";
     // check input size
     if (param_.transform_indices.ndim() == 0) {
       std::vector<int> default_indices;
@@ -575,22 +575,20 @@ class LazyTransformDataset final : public Dataset {
       }
       use_input_indices_ = default_indices;
     } else {
-      use_input_indices_ = std::vector<int>(param_.transform_indices.begin(),
-                                            param_.transform_indices.end());
+      use_input_indices_ =
+          std::vector<int>(param_.transform_indices.begin(), param_.transform_indices.end());
     }
     CHECK_EQ(use_input_indices_.size(), cached_op_->num_inputs())
-      << "Mismatched transform indices and transform inputs: " << use_input_indices_.size()
-      << " vs. " << cached_op_->num_inputs();
+        << "Mismatched transform indices and transform inputs: " << use_input_indices_.size()
+        << " vs. " << cached_op_->num_inputs();
     auto num_inputs = use_input_indices_.size();
-    CHECK_GE(inputs.size(), num_inputs)
-      << "LazyTransformDataset input size " << inputs.size()
-      << " smaller than transform input size: "
-      << num_inputs;
+    CHECK_GE(inputs.size(), num_inputs) << "LazyTransformDataset input size " << inputs.size()
+                                        << " smaller than transform input size: " << num_inputs;
     pass_through_indices_.clear();
     for (size_t i = 0; i < inputs.size(); ++i) {
       // filling output ndarray from unaltered inputs, transformed outputs are already inserted
-      if (std::find(use_input_indices_.begin(),
-                    use_input_indices_.end(), i) == use_input_indices_.end()) {
+      if (std::find(use_input_indices_.begin(), use_input_indices_.end(), i) ==
+          use_input_indices_.end()) {
         pass_through_indices_.emplace_back(i);
       }
     }
@@ -605,7 +603,8 @@ class LazyTransformDataset final : public Dataset {
 
   bool GetItem(uint64_t idx, std::vector<NDArray>* outputs) override {
     std::vector<NDArray> inputs;
-    if (!base_data_->GetItem(idx, &inputs)) return false;
+    if (!base_data_->GetItem(idx, &inputs))
+      return false;
     outputs->reserve(num_outputs_);
     outputs->resize(cached_op_->num_outputs());
     for (auto i : pass_through_indices_) {
@@ -625,7 +624,7 @@ class LazyTransformDataset final : public Dataset {
       ndoutputs.emplace_back(&(outputs->at(i)));
     }
 
-    for (auto & input : inputs) {
+    for (auto& input : inputs) {
       input.WaitToRead();
     }
     CHECK(inputs.size() > 0) << "dataset getitem requires at least one input";
@@ -644,13 +643,13 @@ class LazyTransformDataset final : public Dataset {
   std::vector<int> use_input_indices_;
   std::vector<int> pass_through_indices_;
   size_t num_outputs_;
-};   // class LazyTransformDataset
+};  // class LazyTransformDataset
 
 MXNET_REGISTER_IO_DATASET(LazyTransformDataset)
-  .describe("Dataset that apply lazy transformation to internal dataset")
-  .add_arguments(LazyTransformDatasetParam::__FIELDS__())
-  .set_body([](const std::vector<std::pair<std::string, std::string> >& kwargs) {
-     return new LazyTransformDataset(kwargs);
-});
+    .describe("Dataset that apply lazy transformation to internal dataset")
+    .add_arguments(LazyTransformDatasetParam::__FIELDS__())
+    .set_body([](const std::vector<std::pair<std::string, std::string>>& kwargs) {
+      return new LazyTransformDataset(kwargs);
+    });
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/image_aug_default.cc b/src/io/image_aug_default.cc
index c39777ba3054..0c29e44a2754 100644
--- a/src/io/image_aug_default.cc
+++ b/src/io/image_aug_default.cc
@@ -101,92 +101,123 @@ struct DefaultImageAugmentParam : public dmlc::Parameter<DefaultImageAugmentPara
 
   // declare parameters
   DMLC_DECLARE_PARAMETER(DefaultImageAugmentParam) {
-    DMLC_DECLARE_FIELD(resize).set_default(-1)
-        .describe("Down scale the shorter edge to a new size  "
-                  "before applying other augmentations.");
-    DMLC_DECLARE_FIELD(rand_crop).set_default(false)
-        .describe("If or not randomly crop the image");
-    DMLC_DECLARE_FIELD(random_resized_crop).set_default(false)
-        .describe("If or not perform random resized cropping "
-                  "on the image, as a standard preprocessing "
-                  "for resnet training on ImageNet data.");
-    DMLC_DECLARE_FIELD(max_rotate_angle).set_default(0.0f)
+    DMLC_DECLARE_FIELD(resize).set_default(-1).describe(
+        "Down scale the shorter edge to a new size  "
+        "before applying other augmentations.");
+    DMLC_DECLARE_FIELD(rand_crop).set_default(false).describe("If or not randomly crop the image");
+    DMLC_DECLARE_FIELD(random_resized_crop)
+        .set_default(false)
+        .describe(
+            "If or not perform random resized cropping "
+            "on the image, as a standard preprocessing "
+            "for resnet training on ImageNet data.");
+    DMLC_DECLARE_FIELD(max_rotate_angle)
+        .set_default(0.0f)
         .describe("Rotate by a random degree in ``[-v, v]``");
-    DMLC_DECLARE_FIELD(max_aspect_ratio).set_default(0.0f)
-        .describe("Change the aspect (namely width/height) to a random value. "
-                  "If min_aspect_ratio is None then the aspect ratio ins sampled from "
-                  "[1 - max_aspect_ratio, 1 + max_aspect_ratio], "
-                  "else it is in ``[min_aspect_ratio, max_aspect_ratio]``");
-    DMLC_DECLARE_FIELD(min_aspect_ratio).set_default(dmlc::optional<float>())
-        .describe("Change the aspect (namely width/height) to a random value "
-                  "in ``[min_aspect_ratio, max_aspect_ratio]``");
-    DMLC_DECLARE_FIELD(max_shear_ratio).set_default(0.0f)
-        .describe("Apply a shear transformation (namely ``(x,y)->(x+my,y)``) "
-                  "with ``m`` randomly chose from "
-                  "``[-max_shear_ratio, max_shear_ratio]``");
-    DMLC_DECLARE_FIELD(max_crop_size).set_default(-1)
-        .describe("Crop both width and height into a random size in "
-                  "``[min_crop_size, max_crop_size].``"
-                  "Ignored if ``random_resized_crop`` is True.");
-    DMLC_DECLARE_FIELD(min_crop_size).set_default(-1)
-        .describe("Crop both width and height into a random size in "
-                  "``[min_crop_size, max_crop_size].``"
-                  "Ignored if ``random_resized_crop`` is True.");
-    DMLC_DECLARE_FIELD(max_random_scale).set_default(1.0f)
-        .describe("Resize into ``[width*s, height*s]`` with ``s`` randomly"
-                  " chosen from ``[min_random_scale, max_random_scale]``. "
-                  "Ignored if ``random_resized_crop`` is True.");
-    DMLC_DECLARE_FIELD(min_random_scale).set_default(1.0f)
-        .describe("Resize into ``[width*s, height*s]`` with ``s`` randomly"
-                  " chosen from ``[min_random_scale, max_random_scale]``"
-                  "Ignored if ``random_resized_crop`` is True.");
-    DMLC_DECLARE_FIELD(max_random_area).set_default(1.0f)
-        .describe("Change the area (namely width * height) to a random value "
-                  "in ``[min_random_area, max_random_area]``. "
-                  "Ignored if ``random_resized_crop`` is False.");
-    DMLC_DECLARE_FIELD(min_random_area).set_default(1.0f)
-        .describe("Change the area (namely width * height) to a random value "
-                  "in ``[min_random_area, max_random_area]``. "
-                  "Ignored if ``random_resized_crop`` is False.");
-    DMLC_DECLARE_FIELD(max_img_size).set_default(1e10f)
-        .describe("Set the maximal width and height after all resize and"
-                  " rotate argumentation  are applied");
-    DMLC_DECLARE_FIELD(min_img_size).set_default(0.0f)
-        .describe("Set the minimal width and height after all resize and"
-                  " rotate argumentation  are applied");
-    DMLC_DECLARE_FIELD(brightness).set_default(0.0f)
-        .describe("Add a random value in ``[-brightness, brightness]`` to "
-                  "the brightness of image.");
-    DMLC_DECLARE_FIELD(contrast).set_default(0.0f)
-        .describe("Add a random value in ``[-contrast, contrast]`` to "
-                  "the contrast of image.");
-    DMLC_DECLARE_FIELD(saturation).set_default(0.0f)
-        .describe("Add a random value in ``[-saturation, saturation]`` to "
-                  "the saturation of image.");
-    DMLC_DECLARE_FIELD(pca_noise).set_default(0.0f)
-        .describe("Add PCA based noise to the image.");
-    DMLC_DECLARE_FIELD(random_h).set_default(0)
-        .describe("Add a random value in ``[-random_h, random_h]`` to "
-                  "the H channel in HSL color space.");
-    DMLC_DECLARE_FIELD(random_s).set_default(0)
-        .describe("Add a random value in ``[-random_s, random_s]`` to "
-                  "the S channel in HSL color space.");
-    DMLC_DECLARE_FIELD(random_l).set_default(0)
-        .describe("Add a random value in ``[-random_l, random_l]`` to "
-                  "the L channel in HSL color space.");
-    DMLC_DECLARE_FIELD(rotate).set_default(-1.0f)
-        .describe("Rotate by an angle. If set, it overwrites the ``max_rotate_angle`` option.");
-    DMLC_DECLARE_FIELD(fill_value).set_default(255)
+    DMLC_DECLARE_FIELD(max_aspect_ratio)
+        .set_default(0.0f)
+        .describe(
+            "Change the aspect (namely width/height) to a random value. "
+            "If min_aspect_ratio is None then the aspect ratio ins sampled from "
+            "[1 - max_aspect_ratio, 1 + max_aspect_ratio], "
+            "else it is in ``[min_aspect_ratio, max_aspect_ratio]``");
+    DMLC_DECLARE_FIELD(min_aspect_ratio)
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "Change the aspect (namely width/height) to a random value "
+            "in ``[min_aspect_ratio, max_aspect_ratio]``");
+    DMLC_DECLARE_FIELD(max_shear_ratio)
+        .set_default(0.0f)
+        .describe(
+            "Apply a shear transformation (namely ``(x,y)->(x+my,y)``) "
+            "with ``m`` randomly chose from "
+            "``[-max_shear_ratio, max_shear_ratio]``");
+    DMLC_DECLARE_FIELD(max_crop_size)
+        .set_default(-1)
+        .describe(
+            "Crop both width and height into a random size in "
+            "``[min_crop_size, max_crop_size].``"
+            "Ignored if ``random_resized_crop`` is True.");
+    DMLC_DECLARE_FIELD(min_crop_size)
+        .set_default(-1)
+        .describe(
+            "Crop both width and height into a random size in "
+            "``[min_crop_size, max_crop_size].``"
+            "Ignored if ``random_resized_crop`` is True.");
+    DMLC_DECLARE_FIELD(max_random_scale)
+        .set_default(1.0f)
+        .describe(
+            "Resize into ``[width*s, height*s]`` with ``s`` randomly"
+            " chosen from ``[min_random_scale, max_random_scale]``. "
+            "Ignored if ``random_resized_crop`` is True.");
+    DMLC_DECLARE_FIELD(min_random_scale)
+        .set_default(1.0f)
+        .describe(
+            "Resize into ``[width*s, height*s]`` with ``s`` randomly"
+            " chosen from ``[min_random_scale, max_random_scale]``"
+            "Ignored if ``random_resized_crop`` is True.");
+    DMLC_DECLARE_FIELD(max_random_area)
+        .set_default(1.0f)
+        .describe(
+            "Change the area (namely width * height) to a random value "
+            "in ``[min_random_area, max_random_area]``. "
+            "Ignored if ``random_resized_crop`` is False.");
+    DMLC_DECLARE_FIELD(min_random_area)
+        .set_default(1.0f)
+        .describe(
+            "Change the area (namely width * height) to a random value "
+            "in ``[min_random_area, max_random_area]``. "
+            "Ignored if ``random_resized_crop`` is False.");
+    DMLC_DECLARE_FIELD(max_img_size)
+        .set_default(1e10f)
+        .describe(
+            "Set the maximal width and height after all resize and"
+            " rotate argumentation  are applied");
+    DMLC_DECLARE_FIELD(min_img_size)
+        .set_default(0.0f)
+        .describe(
+            "Set the minimal width and height after all resize and"
+            " rotate argumentation  are applied");
+    DMLC_DECLARE_FIELD(brightness)
+        .set_default(0.0f)
+        .describe(
+            "Add a random value in ``[-brightness, brightness]`` to "
+            "the brightness of image.");
+    DMLC_DECLARE_FIELD(contrast).set_default(0.0f).describe(
+        "Add a random value in ``[-contrast, contrast]`` to "
+        "the contrast of image.");
+    DMLC_DECLARE_FIELD(saturation)
+        .set_default(0.0f)
+        .describe(
+            "Add a random value in ``[-saturation, saturation]`` to "
+            "the saturation of image.");
+    DMLC_DECLARE_FIELD(pca_noise).set_default(0.0f).describe("Add PCA based noise to the image.");
+    DMLC_DECLARE_FIELD(random_h).set_default(0).describe(
+        "Add a random value in ``[-random_h, random_h]`` to "
+        "the H channel in HSL color space.");
+    DMLC_DECLARE_FIELD(random_s).set_default(0).describe(
+        "Add a random value in ``[-random_s, random_s]`` to "
+        "the S channel in HSL color space.");
+    DMLC_DECLARE_FIELD(random_l).set_default(0).describe(
+        "Add a random value in ``[-random_l, random_l]`` to "
+        "the L channel in HSL color space.");
+    DMLC_DECLARE_FIELD(rotate).set_default(-1.0f).describe(
+        "Rotate by an angle. If set, it overwrites the ``max_rotate_angle`` option.");
+    DMLC_DECLARE_FIELD(fill_value)
+        .set_default(255)
         .describe("Set the padding pixels value to ``fill_value``.");
     DMLC_DECLARE_FIELD(data_shape)
-        .set_expect_ndim(3).enforce_nonzero()
+        .set_expect_ndim(3)
+        .enforce_nonzero()
         .describe("The shape of a output image.");
-    DMLC_DECLARE_FIELD(inter_method).set_default(1)
-        .describe("The interpolation method: 0-NN 1-bilinear 2-cubic 3-area "
-                  "4-lanczos4 9-auto 10-rand.");
-    DMLC_DECLARE_FIELD(pad).set_default(0)
-        .describe("Change size from ``[width, height]`` into "
-                  "``[pad + width + pad, pad + height + pad]`` by padding pixes");
+    DMLC_DECLARE_FIELD(inter_method)
+        .set_default(1)
+        .describe(
+            "The interpolation method: 0-NN 1-bilinear 2-cubic 3-area "
+            "4-lanczos4 9-auto 10-rand.");
+    DMLC_DECLARE_FIELD(pad).set_default(0).describe(
+        "Change size from ``[width, height]`` into "
+        "``[pad + width + pad, pad + height + pad]`` by padding pixes");
   }
 };
 
@@ -210,28 +241,33 @@ class DefaultImageAugmenter : public ImageAugmenter {
     std::vector<std::pair<std::string, std::string> > kwargs_left;
     kwargs_left = param_.InitAllowUnknown(kwargs);
     for (auto& kwarg : kwargs_left) {
-        if (!strcmp(kwarg.first.c_str(), "rotate_list")) {
-          const char* val = kwarg.second.c_str();
-          const char *end = val + strlen(val);
-          char buf[128];
-          while (val < end) {
-            sscanf(val, "%[^,]", buf);
-            val += strlen(buf) + 1;
-            rotate_list_.push_back(atoi(buf));
-          }
+      if (!strcmp(kwarg.first.c_str(), "rotate_list")) {
+        const char* val = kwarg.second.c_str();
+        const char* end = val + strlen(val);
+        char buf[128];
+        while (val < end) {
+          sscanf(val, "%[^,]", buf);
+          val += strlen(buf) + 1;
+          rotate_list_.push_back(atoi(buf));
         }
+      }
     }
   }
   /*!
-   * \brief get interpolation method with given inter_method, 0-CV_INTER_NN 1-CV_INTER_LINEAR 2-CV_INTER_CUBIC
-   * \ 3-CV_INTER_AREA 4-CV_INTER_LANCZOS4 9-AUTO(cubic for enlarge, area for shrink, bilinear for others) 10-RAND
+   * \brief get interpolation method with given inter_method, 0-CV_INTER_NN 1-CV_INTER_LINEAR
+   * 2-CV_INTER_CUBIC \ 3-CV_INTER_AREA 4-CV_INTER_LANCZOS4 9-AUTO(cubic for enlarge, area for
+   * shrink, bilinear for others) 10-RAND
    */
-  int GetInterMethod(int inter_method, int old_width, int old_height, int new_width,
-    int new_height, common::RANDOM_ENGINE *prnd) {
+  int GetInterMethod(int inter_method,
+                     int old_width,
+                     int old_height,
+                     int new_width,
+                     int new_height,
+                     common::RANDOM_ENGINE* prnd) {
     if (inter_method == 9) {
       if (new_width > old_width && new_height > old_height) {
         return 2;  // CV_INTER_CUBIC for enlarge
-      } else if (new_width <old_width && new_height < old_height) {
+      } else if (new_width < old_width && new_height < old_height) {
         return 3;  // CV_INTER_AREA for shrink
       } else {
         return 1;  // CV_INTER_LINEAR for others
@@ -243,8 +279,9 @@ class DefaultImageAugmenter : public ImageAugmenter {
       return inter_method;
     }
   }
-  cv::Mat Process(const cv::Mat &src, std::vector<float> *label,
-                  common::RANDOM_ENGINE *prnd) override {
+  cv::Mat Process(const cv::Mat& src,
+                  std::vector<float>* label,
+                  common::RANDOM_ENGINE* prnd) override {
     using mshadow::index_t;
     bool is_cropped = false;
 
@@ -262,36 +299,36 @@ class DefaultImageAugmenter : public ImageAugmenter {
     if (param_.resize != -1) {
       int new_height, new_width;
       if (src.rows > src.cols) {
-        new_height = param_.resize*src.rows/src.cols;
-        new_width = param_.resize;
+        new_height = param_.resize * src.rows / src.cols;
+        new_width  = param_.resize;
       } else {
         new_height = param_.resize;
-        new_width = param_.resize*src.cols/src.rows;
+        new_width  = param_.resize * src.cols / src.rows;
       }
       CHECK((param_.inter_method >= 0 && param_.inter_method <= 4) ||
-       (param_.inter_method >= 9 && param_.inter_method <= 10))
-        << "invalid inter_method: valid value 0,1,2,3,4,9,10";
-      int interpolation_method = GetInterMethod(param_.inter_method,
-                   src.cols, src.rows, new_width, new_height, prnd);
-      cv::resize(src, res, cv::Size(new_width, new_height),
-                   0, 0, interpolation_method);
+            (param_.inter_method >= 9 && param_.inter_method <= 10))
+          << "invalid inter_method: valid value 0,1,2,3,4,9,10";
+      int interpolation_method =
+          GetInterMethod(param_.inter_method, src.cols, src.rows, new_width, new_height, prnd);
+      cv::resize(src, res, cv::Size(new_width, new_height), 0, 0, interpolation_method);
     } else {
       res = src;
     }
 
     // normal augmentation by affine transformation.
-    if (param_.max_rotate_angle > 0 || param_.max_shear_ratio > 0.0f
-        || param_.rotate > 0 || rotate_list_.size() > 0
-        || param_.max_random_scale != 1.0f || param_.min_random_scale != 1.0
-        || (!param_.random_resized_crop && (min_aspect_ratio != 1.0f || max_aspect_ratio != 1.0f))
-        || param_.max_img_size != 1e10f || param_.min_img_size != 0.0f) {
+    if (param_.max_rotate_angle > 0 || param_.max_shear_ratio > 0.0f || param_.rotate > 0 ||
+        rotate_list_.size() > 0 || param_.max_random_scale != 1.0f ||
+        param_.min_random_scale != 1.0 ||
+        (!param_.random_resized_crop && (min_aspect_ratio != 1.0f || max_aspect_ratio != 1.0f)) ||
+        param_.max_img_size != 1e10f || param_.min_img_size != 0.0f) {
       std::uniform_real_distribution<float> rand_uniform(0, 1);
       // shear
       float s = rand_uniform(*prnd) * param_.max_shear_ratio * 2 - param_.max_shear_ratio;
       // rotate
-      int angle = std::uniform_int_distribution<int>(
-          -param_.max_rotate_angle, param_.max_rotate_angle)(*prnd);
-      if (param_.rotate > 0) angle = param_.rotate;
+      int angle = std::uniform_int_distribution<int>(-param_.max_rotate_angle,
+                                                     param_.max_rotate_angle)(*prnd);
+      if (param_.rotate > 0)
+        angle = param_.rotate;
       if (rotate_list_.size() > 0) {
         angle = rotate_list_[std::uniform_int_distribution<int>(0, rotate_list_.size() - 1)(*prnd)];
       }
@@ -300,37 +337,39 @@ class DefaultImageAugmenter : public ImageAugmenter {
       // scale
       float scale = 1.0f;
       if (!param_.random_resized_crop) {
-        scale = rand_uniform(*prnd) *
-            (param_.max_random_scale - param_.min_random_scale) + param_.min_random_scale;
+        scale = rand_uniform(*prnd) * (param_.max_random_scale - param_.min_random_scale) +
+                param_.min_random_scale;
       }
       // aspect ratio
       float ratio = 1.0f;
       if (!param_.random_resized_crop) {
-        ratio = rand_uniform(*prnd) *
-            (max_aspect_ratio - min_aspect_ratio) + min_aspect_ratio;
+        ratio = rand_uniform(*prnd) * (max_aspect_ratio - min_aspect_ratio) + min_aspect_ratio;
       }
       float hs = 2 * scale / (1 + ratio);
       float ws = ratio * hs;
       // new width and height
-      float new_width = std::max(param_.min_img_size,
-                                 std::min(param_.max_img_size, scale * res.cols));
-      float new_height = std::max(param_.min_img_size,
-                                  std::min(param_.max_img_size, scale * res.rows));
+      float new_width =
+          std::max(param_.min_img_size, std::min(param_.max_img_size, scale * res.cols));
+      float new_height =
+          std::max(param_.min_img_size, std::min(param_.max_img_size, scale * res.rows));
       cv::Mat M(2, 3, CV_32F);
-      M.at<float>(0, 0) = hs * a - s * b * ws;
-      M.at<float>(1, 0) = -b * ws;
-      M.at<float>(0, 1) = hs * b + s * a * ws;
-      M.at<float>(1, 1) = a * ws;
-      float ori_center_width = M.at<float>(0, 0) * res.cols + M.at<float>(0, 1) * res.rows;
+      M.at<float>(0, 0)       = hs * a - s * b * ws;
+      M.at<float>(1, 0)       = -b * ws;
+      M.at<float>(0, 1)       = hs * b + s * a * ws;
+      M.at<float>(1, 1)       = a * ws;
+      float ori_center_width  = M.at<float>(0, 0) * res.cols + M.at<float>(0, 1) * res.rows;
       float ori_center_height = M.at<float>(1, 0) * res.cols + M.at<float>(1, 1) * res.rows;
-      M.at<float>(0, 2) = (new_width - ori_center_width) / 2;
-      M.at<float>(1, 2) = (new_height - ori_center_height) / 2;
+      M.at<float>(0, 2)       = (new_width - ori_center_width) / 2;
+      M.at<float>(1, 2)       = (new_height - ori_center_height) / 2;
       CHECK((param_.inter_method >= 0 && param_.inter_method <= 4) ||
-        (param_.inter_method >= 9 && param_.inter_method <= 10))
-         << "invalid inter_method: valid value 0,1,2,3,4,9,10";
-      int interpolation_method = GetInterMethod(param_.inter_method,
-                    res.cols, res.rows, new_width, new_height, prnd);
-      cv::warpAffine(res, temp_, M, cv::Size(new_width, new_height),
+            (param_.inter_method >= 9 && param_.inter_method <= 10))
+          << "invalid inter_method: valid value 0,1,2,3,4,9,10";
+      int interpolation_method =
+          GetInterMethod(param_.inter_method, res.cols, res.rows, new_width, new_height, prnd);
+      cv::warpAffine(res,
+                     temp_,
+                     M,
+                     cv::Size(new_width, new_height),
                      interpolation_method,
                      cv::BORDER_CONSTANT,
                      cv::Scalar(param_.fill_value, param_.fill_value, param_.fill_value));
@@ -339,66 +378,75 @@ class DefaultImageAugmenter : public ImageAugmenter {
 
     // pad logic
     if (param_.pad > 0) {
-      cv::copyMakeBorder(res, res, param_.pad, param_.pad, param_.pad, param_.pad,
+      cv::copyMakeBorder(res,
+                         res,
+                         param_.pad,
+                         param_.pad,
+                         param_.pad,
+                         param_.pad,
                          cv::BORDER_CONSTANT,
                          cv::Scalar(param_.fill_value, param_.fill_value, param_.fill_value));
     }
 
     if (param_.random_resized_crop) {
       // random resize crop
-      CHECK(param_.min_random_scale == 1.0f &&
-        param_.max_random_scale == 1.0f &&
-        param_.min_crop_size == -1 &&
-        param_.max_crop_size == -1 &&
-        !param_.rand_crop) <<
-        "\nSetting random_resized_crop to true conflicts with "
-        "min_random_scale, max_random_scale, "
-        "min_crop_size, max_crop_size, "
-        "and rand_crop.";
+      CHECK(param_.min_random_scale == 1.0f && param_.max_random_scale == 1.0f &&
+            param_.min_crop_size == -1 && param_.max_crop_size == -1 && !param_.rand_crop)
+          << "\nSetting random_resized_crop to true conflicts with "
+             "min_random_scale, max_random_scale, "
+             "min_crop_size, max_crop_size, "
+             "and rand_crop.";
 
-      if (param_.max_random_area != 1.0f || param_.min_random_area != 1.0f
-          || max_aspect_ratio != 1.0f || min_aspect_ratio != 1.0f) {
-            CHECK(min_aspect_ratio > 0.0f);
-            CHECK(param_.min_random_area <= param_.max_random_area);
-            CHECK(min_aspect_ratio <= max_aspect_ratio);
-            std::uniform_real_distribution<float> rand_uniform_area(param_.min_random_area,
-                                                                    param_.max_random_area);
-            std::uniform_real_distribution<float> rand_uniform_ratio(min_aspect_ratio,
-                                                                     max_aspect_ratio);
-            std::uniform_real_distribution<float> rand_uniform(0, 1);
-            float area = res.rows * res.cols;
-            for (int i = 0; i < 10; ++i) {
-              float rand_area = rand_uniform_area(*prnd);
-              float ratio = rand_uniform_ratio(*prnd);
-              float target_area = area * rand_area;
-              int y_area = std::round(std::sqrt(target_area / ratio));
-              int x_area = std::round(std::sqrt(target_area * ratio));
-              if (rand_uniform(*prnd) > 0.5) {
-                float temp_y_area = y_area;
-                y_area = x_area;
-                x_area = temp_y_area;
-              }
-              if (y_area <= res.rows && x_area <= res.cols) {
-                index_t rand_y_area =
-                    std::uniform_int_distribution<index_t>(0, res.rows - y_area)(*prnd);
-                index_t rand_x_area =
-                    std::uniform_int_distribution<index_t>(0, res.cols - x_area)(*prnd);
-                cv::Rect roi(rand_x_area, rand_y_area, x_area, y_area);
-                int interpolation_method = GetInterMethod(param_.inter_method, x_area, y_area,
-                                                          param_.data_shape[2],
-                                                          param_.data_shape[1], prnd);
-                cv::resize(res(roi), res, cv::Size(param_.data_shape[2], param_.data_shape[1]),
-                           0, 0, interpolation_method);
-                is_cropped = true;
-                break;
-              }
-            }
+      if (param_.max_random_area != 1.0f || param_.min_random_area != 1.0f ||
+          max_aspect_ratio != 1.0f || min_aspect_ratio != 1.0f) {
+        CHECK(min_aspect_ratio > 0.0f);
+        CHECK(param_.min_random_area <= param_.max_random_area);
+        CHECK(min_aspect_ratio <= max_aspect_ratio);
+        std::uniform_real_distribution<float> rand_uniform_area(param_.min_random_area,
+                                                                param_.max_random_area);
+        std::uniform_real_distribution<float> rand_uniform_ratio(min_aspect_ratio,
+                                                                 max_aspect_ratio);
+        std::uniform_real_distribution<float> rand_uniform(0, 1);
+        float area = res.rows * res.cols;
+        for (int i = 0; i < 10; ++i) {
+          float rand_area   = rand_uniform_area(*prnd);
+          float ratio       = rand_uniform_ratio(*prnd);
+          float target_area = area * rand_area;
+          int y_area        = std::round(std::sqrt(target_area / ratio));
+          int x_area        = std::round(std::sqrt(target_area * ratio));
+          if (rand_uniform(*prnd) > 0.5) {
+            float temp_y_area = y_area;
+            y_area            = x_area;
+            x_area            = temp_y_area;
+          }
+          if (y_area <= res.rows && x_area <= res.cols) {
+            index_t rand_y_area =
+                std::uniform_int_distribution<index_t>(0, res.rows - y_area)(*prnd);
+            index_t rand_x_area =
+                std::uniform_int_distribution<index_t>(0, res.cols - x_area)(*prnd);
+            cv::Rect roi(rand_x_area, rand_y_area, x_area, y_area);
+            int interpolation_method = GetInterMethod(param_.inter_method,
+                                                      x_area,
+                                                      y_area,
+                                                      param_.data_shape[2],
+                                                      param_.data_shape[1],
+                                                      prnd);
+            cv::resize(res(roi),
+                       res,
+                       cv::Size(param_.data_shape[2], param_.data_shape[1]),
+                       0,
+                       0,
+                       interpolation_method);
+            is_cropped = true;
+            break;
+          }
+        }
       }
     } else if (!param_.random_resized_crop &&
-        (param_.max_crop_size != -1 || param_.min_crop_size != -1)) {
+               (param_.max_crop_size != -1 || param_.min_crop_size != -1)) {
       // random_crop
-      CHECK(res.cols >= param_.max_crop_size && res.rows >= \
-              param_.max_crop_size && param_.max_crop_size >= param_.min_crop_size)
+      CHECK(res.cols >= param_.max_crop_size && res.rows >= param_.max_crop_size &&
+            param_.max_crop_size >= param_.min_crop_size)
           << "input image size smaller than max_crop_size";
       index_t rand_crop_size =
           std::uniform_int_distribution<index_t>(param_.min_crop_size, param_.max_crop_size)(*prnd);
@@ -408,37 +456,47 @@ class DefaultImageAugmenter : public ImageAugmenter {
         y = std::uniform_int_distribution<index_t>(0, y)(*prnd);
         x = std::uniform_int_distribution<index_t>(0, x)(*prnd);
       } else {
-        y /= 2; x /= 2;
+        y /= 2;
+        x /= 2;
       }
       cv::Rect roi(x, y, rand_crop_size, rand_crop_size);
-      int interpolation_method = GetInterMethod(param_.inter_method, rand_crop_size, rand_crop_size,
-                                                param_.data_shape[2], param_.data_shape[1], prnd);
-      cv::resize(res(roi), res, cv::Size(param_.data_shape[2], param_.data_shape[1])
-                , 0, 0, interpolation_method);
+      int interpolation_method = GetInterMethod(param_.inter_method,
+                                                rand_crop_size,
+                                                rand_crop_size,
+                                                param_.data_shape[2],
+                                                param_.data_shape[1],
+                                                prnd);
+      cv::resize(res(roi),
+                 res,
+                 cv::Size(param_.data_shape[2], param_.data_shape[1]),
+                 0,
+                 0,
+                 interpolation_method);
       is_cropped = true;
     }
 
     if (!is_cropped) {
       // center crop
-      int interpolation_method = GetInterMethod(param_.inter_method, res.cols, res.rows,
+      int interpolation_method = GetInterMethod(param_.inter_method,
+                                                res.cols,
+                                                res.rows,
                                                 param_.data_shape[2],
-                                                param_.data_shape[1], prnd);
+                                                param_.data_shape[1],
+                                                prnd);
       if (res.rows < param_.data_shape[1]) {
-        index_t new_cols = static_cast<index_t>(static_cast<float>(param_.data_shape[1]) /
-                                                static_cast<float>(res.rows) *
-                                                static_cast<float>(res.cols));
-        cv::resize(res, res, cv::Size(new_cols, param_.data_shape[1]),
-                   0, 0, interpolation_method);
+        index_t new_cols =
+            static_cast<index_t>(static_cast<float>(param_.data_shape[1]) /
+                                 static_cast<float>(res.rows) * static_cast<float>(res.cols));
+        cv::resize(res, res, cv::Size(new_cols, param_.data_shape[1]), 0, 0, interpolation_method);
       }
       if (res.cols < param_.data_shape[2]) {
-        index_t new_rows = static_cast<index_t>(static_cast<float>(param_.data_shape[2]) /
-                                                static_cast<float>(res.cols) *
-                                                static_cast<float>(res.rows));
-        cv::resize(res, res, cv::Size(param_.data_shape[2], new_rows),
-                   0, 0, interpolation_method);
+        index_t new_rows =
+            static_cast<index_t>(static_cast<float>(param_.data_shape[2]) /
+                                 static_cast<float>(res.cols) * static_cast<float>(res.rows));
+        cv::resize(res, res, cv::Size(param_.data_shape[2], new_rows), 0, 0, interpolation_method);
       }
-      CHECK(static_cast<index_t>(res.rows) >= param_.data_shape[1]
-            && static_cast<index_t>(res.cols) >= param_.data_shape[2])
+      CHECK(static_cast<index_t>(res.rows) >= param_.data_shape[1] &&
+            static_cast<index_t>(res.cols) >= param_.data_shape[2])
           << "input image size smaller than input shape";
       index_t y = res.rows - param_.data_shape[1];
       index_t x = res.cols - param_.data_shape[2];
@@ -446,7 +504,8 @@ class DefaultImageAugmenter : public ImageAugmenter {
         y = std::uniform_int_distribution<index_t>(0, y)(*prnd);
         x = std::uniform_int_distribution<index_t>(0, x)(*prnd);
       } else {
-        y /= 2; x /= 2;
+        y /= 2;
+        x /= 2;
       }
       cv::Rect roi(x, y, param_.data_shape[2], param_.data_shape[1]);
       res = res(roi);
@@ -455,12 +514,12 @@ class DefaultImageAugmenter : public ImageAugmenter {
     // color jitter
     if (param_.brightness > 0.0f || param_.contrast > 0.0f || param_.saturation > 0.0f) {
       std::uniform_real_distribution<float> rand_uniform(0, 1);
-      float alpha_b = 1.0 + std::uniform_real_distribution<float>(-param_.brightness,
-                                                                  param_.brightness)(*prnd);
-      float alpha_c = 1.0 + std::uniform_real_distribution<float>(-param_.contrast,
-                                                                  param_.contrast)(*prnd);
-      float alpha_s = 1.0 + std::uniform_real_distribution<float>(-param_.saturation,
-                                                                  param_.saturation)(*prnd);
+      float alpha_b =
+          1.0 + std::uniform_real_distribution<float>(-param_.brightness, param_.brightness)(*prnd);
+      float alpha_c =
+          1.0 + std::uniform_real_distribution<float>(-param_.contrast, param_.contrast)(*prnd);
+      float alpha_s =
+          1.0 + std::uniform_real_distribution<float>(-param_.saturation, param_.saturation)(*prnd);
       int rand_order[3] = {0, 1, 2};
       std::shuffle(std::begin(rand_order), std::end(rand_order), *prnd);
       for (int i : rand_order) {
@@ -488,20 +547,26 @@ class DefaultImageAugmenter : public ImageAugmenter {
       std::uniform_real_distribution<float> rand_uniform(0, 1);
       cvtColor(res, res, CV_BGR2HLS);
       // use an approximation of gaussian distribution to reduce extreme value
-      float rh = rand_uniform(*prnd); rh += 4 * rand_uniform(*prnd); rh = rh / 5;
-      float rs = rand_uniform(*prnd); rs += 4 * rand_uniform(*prnd); rs = rs / 5;
-      float rl = rand_uniform(*prnd); rl += 4 * rand_uniform(*prnd); rl = rl / 5;
-      int h = rh * param_.random_h * 2 - param_.random_h;
-      int s = rs * param_.random_s * 2 - param_.random_s;
-      int l = rl * param_.random_l * 2 - param_.random_l;
-      int temp[3] = {h, l, s};
+      float rh = rand_uniform(*prnd);
+      rh += 4 * rand_uniform(*prnd);
+      rh       = rh / 5;
+      float rs = rand_uniform(*prnd);
+      rs += 4 * rand_uniform(*prnd);
+      rs       = rs / 5;
+      float rl = rand_uniform(*prnd);
+      rl += 4 * rand_uniform(*prnd);
+      rl           = rl / 5;
+      int h        = rh * param_.random_h * 2 - param_.random_h;
+      int s        = rs * param_.random_s * 2 - param_.random_s;
+      int l        = rl * param_.random_l * 2 - param_.random_l;
+      int temp[3]  = {h, l, s};
       int limit[3] = {180, 255, 255};
       for (int i = 0; i < res.rows; ++i) {
         for (int j = 0; j < res.cols; ++j) {
           for (int k = 0; k < 3; ++k) {
             int v = res.at<cv::Vec3b>(i, j)[k];
             v += temp[k];
-            v = std::max(0, std::min(limit[k], v));
+            v                          = std::max(0, std::min(limit[k], v));
             res.at<cv::Vec3b>(i, j)[k] = v;
           }
         }
@@ -515,19 +580,19 @@ class DefaultImageAugmenter : public ImageAugmenter {
       float pca_alpha_r = rand_normal(*prnd);
       float pca_alpha_g = rand_normal(*prnd);
       float pca_alpha_b = rand_normal(*prnd);
-      float pca_r = eigvec[0][0] * pca_alpha_r + eigvec[0][1] * pca_alpha_g +
-           eigvec[0][2] * pca_alpha_b;
-      float pca_g = eigvec[1][0] * pca_alpha_r + eigvec[1][1] * pca_alpha_g +
-           eigvec[1][2] * pca_alpha_b;
-      float pca_b = eigvec[2][0] * pca_alpha_r + eigvec[2][1] * pca_alpha_g +
-           eigvec[2][2] * pca_alpha_b;
-      float pca[3] = { pca_b, pca_g, pca_r };
+      float pca_r =
+          eigvec[0][0] * pca_alpha_r + eigvec[0][1] * pca_alpha_g + eigvec[0][2] * pca_alpha_b;
+      float pca_g =
+          eigvec[1][0] * pca_alpha_r + eigvec[1][1] * pca_alpha_g + eigvec[1][2] * pca_alpha_b;
+      float pca_b =
+          eigvec[2][0] * pca_alpha_r + eigvec[2][1] * pca_alpha_g + eigvec[2][2] * pca_alpha_b;
+      float pca[3] = {pca_b, pca_g, pca_r};
       for (int i = 0; i < res.rows; ++i) {
         for (int j = 0; j < res.cols; ++j) {
           for (int k = 0; k < 3; ++k) {
             int vp = res.at<cv::Vec3b>(i, j)[k];
             vp += pca[k];
-            vp = std::max(0, std::min(255, vp));
+            vp                         = std::max(0, std::min(255, vp));
             res.at<cv::Vec3b>(i, j)[k] = vp;
           }
         }
@@ -536,15 +601,14 @@ class DefaultImageAugmenter : public ImageAugmenter {
     return res;
   }
 
-
  private:
   // temporal space
   cv::Mat temp_;
   // eigval and eigvec for adding pca noise
   // store eigval * eigvec as eigvec
-  float eigvec[3][3] = { { 55.46f * -0.5675f, 4.794f * 0.7192f,  1.148f * 0.4009f },
-                         { 55.46f * -0.5808f, 4.794f * -0.0045f, 1.148f * -0.8140f },
-                         { 55.46f * -0.5836f, 4.794f * -0.6948f, 1.148f * 0.4203f } };
+  float eigvec[3][3] = {{55.46f * -0.5675f, 4.794f * 0.7192f, 1.148f * 0.4009f},
+                        {55.46f * -0.5808f, 4.794f * -0.0045f, 1.148f * -0.8140f},
+                        {55.46f * -0.5836f, 4.794f * -0.6948f, 1.148f * 0.4203f}};
   // parameters
   DefaultImageAugmentParam param_;
   /*! \brief list of possible rotate angle */
@@ -555,11 +619,9 @@ ImageAugmenter* ImageAugmenter::Create(const std::string& name) {
   return dmlc::Registry<ImageAugmenterReg>::Find(name)->body();
 }
 
-MXNET_REGISTER_IMAGE_AUGMENTER(aug_default)
-.describe("default augmenter")
-.set_body([]() {
-    return new DefaultImageAugmenter();
-  });
+MXNET_REGISTER_IMAGE_AUGMENTER(aug_default).describe("default augmenter").set_body([]() {
+  return new DefaultImageAugmenter();
+});
 #endif  // MXNET_USE_OPENCV
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/image_augmenter.h b/src/io/image_augmenter.h
index e8a56ba2e5b7..44c80abcbaee 100644
--- a/src/io/image_augmenter.h
+++ b/src/io/image_augmenter.h
@@ -29,9 +29,9 @@
 
 #if MXNET_USE_OPENCV
 #include <opencv2/opencv.hpp>
-#include <vector>  // NOLINT(*)
-#include <utility> // NOLINT(*)
-#include <string> // NOLINT(*)
+#include <vector>   // NOLINT(*)
+#include <utility>  // NOLINT(*)
+#include <string>   // NOLINT(*)
 
 #include "../common/utils.h"
 
@@ -57,8 +57,9 @@ class ImageAugmenter {
    * \param prnd pointer to random number generator.
    * \return The processed image.
    */
-  virtual cv::Mat Process(const cv::Mat &src, std::vector<float> *label,
-                          common::RANDOM_ENGINE *prnd) = 0;
+  virtual cv::Mat Process(const cv::Mat& src,
+                          std::vector<float>* label,
+                          common::RANDOM_ENGINE* prnd) = 0;
   // virtual destructor
   virtual ~ImageAugmenter() {}
   /*!
@@ -70,14 +71,12 @@ class ImageAugmenter {
 };
 
 /*! \brief typedef the factory function of data iterator */
-typedef std::function<ImageAugmenter *()> ImageAugmenterFactory;
+typedef std::function<ImageAugmenter*()> ImageAugmenterFactory;
 /*!
  * \brief Registry entry for DataIterator factory functions.
  */
 struct ImageAugmenterReg
-    : public dmlc::FunctionRegEntryBase<ImageAugmenterReg,
-                                        ImageAugmenterFactory> {
-};
+    : public dmlc::FunctionRegEntryBase<ImageAugmenterReg, ImageAugmenterFactory> {};
 //--------------------------------------------------------------
 // The following part are API Registration of Iterators
 //--------------------------------------------------------------
@@ -93,7 +92,7 @@ struct ImageAugmenterReg
  *   });
  * \endcode
  */
-#define MXNET_REGISTER_IMAGE_AUGMENTER(name)                            \
+#define MXNET_REGISTER_IMAGE_AUGMENTER(name) \
   DMLC_REGISTRY_REGISTER(::mxnet::io::ImageAugmenterReg, ImageAugmenterReg, name)
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/image_det_aug_default.cc b/src/io/image_det_aug_default.cc
index 6b3109fbce19..7f9a5e570803 100644
--- a/src/io/image_det_aug_default.cc
+++ b/src/io/image_det_aug_default.cc
@@ -37,9 +37,9 @@ namespace io {
 using mxnet::Tuple;
 
 namespace image_det_aug_default_enum {
-enum ImageDetAugDefaultCropEmitMode {kCenter, kOverlap};
-enum ImageDetAugDefaultResizeMode {kForce, kShrink, kFit};
-}
+enum ImageDetAugDefaultCropEmitMode { kCenter, kOverlap };
+enum ImageDetAugDefaultResizeMode { kForce, kShrink, kFit };
+}  // namespace image_det_aug_default_enum
 
 /*! \brief image detection augmentation parameters*/
 struct DefaultImageDetAugmentParam : public dmlc::Parameter<DefaultImageDetAugmentParam> {
@@ -112,87 +112,122 @@ struct DefaultImageDetAugmentParam : public dmlc::Parameter<DefaultImageDetAugme
   int resize_mode;
   // declare parameters
   DMLC_DECLARE_PARAMETER(DefaultImageDetAugmentParam) {
-    DMLC_DECLARE_FIELD(resize).set_default(-1)
-        .describe("Augmentation Param: scale shorter edge to size "
-                  "before applying other augmentations, -1 to disable.");
-    DMLC_DECLARE_FIELD(rand_crop_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(resize).set_default(-1).describe(
+        "Augmentation Param: scale shorter edge to size "
+        "before applying other augmentations, -1 to disable.");
+    DMLC_DECLARE_FIELD(rand_crop_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability of random cropping, <= 0 to disable");
-    DMLC_DECLARE_FIELD(min_crop_scales).set_default(Tuple<float>({0.0f}))
+    DMLC_DECLARE_FIELD(min_crop_scales)
+        .set_default(Tuple<float>({0.0f}))
         .describe("Augmentation Param: Min crop scales.");
-    DMLC_DECLARE_FIELD(max_crop_scales).set_default(Tuple<float>({1.0f}))
+    DMLC_DECLARE_FIELD(max_crop_scales)
+        .set_default(Tuple<float>({1.0f}))
         .describe("Augmentation Param: Max crop scales.");
-    DMLC_DECLARE_FIELD(min_crop_aspect_ratios).set_default(Tuple<float>({1.0f}))
+    DMLC_DECLARE_FIELD(min_crop_aspect_ratios)
+        .set_default(Tuple<float>({1.0f}))
         .describe("Augmentation Param: Min crop aspect ratios.");
-    DMLC_DECLARE_FIELD(max_crop_aspect_ratios).set_default(Tuple<float>({1.0f}))
+    DMLC_DECLARE_FIELD(max_crop_aspect_ratios)
+        .set_default(Tuple<float>({1.0f}))
         .describe("Augmentation Param: Max crop aspect ratios.");
-    DMLC_DECLARE_FIELD(min_crop_overlaps).set_default(Tuple<float>({0.0f}))
+    DMLC_DECLARE_FIELD(min_crop_overlaps)
+        .set_default(Tuple<float>({0.0f}))
         .describe("Augmentation Param: Minimum crop IOU between crop_box and ground-truths.");
-    DMLC_DECLARE_FIELD(max_crop_overlaps).set_default(Tuple<float>({1.0f}))
+    DMLC_DECLARE_FIELD(max_crop_overlaps)
+        .set_default(Tuple<float>({1.0f}))
         .describe("Augmentation Param: Maximum crop IOU between crop_box and ground-truth.");
-    DMLC_DECLARE_FIELD(min_crop_sample_coverages).set_default(Tuple<float>({0.0f}))
-        .describe("Augmentation Param: Minimum ratio of intersect/crop_area "
-                  "between crop box and ground-truths.");
-    DMLC_DECLARE_FIELD(max_crop_sample_coverages).set_default(Tuple<float>({1.0f}))
-        .describe("Augmentation Param: Maximum ratio of intersect/crop_area "
-                  "between crop box and ground-truths.");
-    DMLC_DECLARE_FIELD(min_crop_object_coverages).set_default(Tuple<float>({0.0f}))
-        .describe("Augmentation Param: Minimum ratio of intersect/gt_area "
-                  "between crop box and ground-truths.");
-    DMLC_DECLARE_FIELD(max_crop_object_coverages).set_default(Tuple<float>({1.0f}))
-        .describe("Augmentation Param: Maximum ratio of intersect/gt_area "
-                  "between crop box and ground-truths.");
-    DMLC_DECLARE_FIELD(num_crop_sampler).set_default(1)
+    DMLC_DECLARE_FIELD(min_crop_sample_coverages)
+        .set_default(Tuple<float>({0.0f}))
+        .describe(
+            "Augmentation Param: Minimum ratio of intersect/crop_area "
+            "between crop box and ground-truths.");
+    DMLC_DECLARE_FIELD(max_crop_sample_coverages)
+        .set_default(Tuple<float>({1.0f}))
+        .describe(
+            "Augmentation Param: Maximum ratio of intersect/crop_area "
+            "between crop box and ground-truths.");
+    DMLC_DECLARE_FIELD(min_crop_object_coverages)
+        .set_default(Tuple<float>({0.0f}))
+        .describe(
+            "Augmentation Param: Minimum ratio of intersect/gt_area "
+            "between crop box and ground-truths.");
+    DMLC_DECLARE_FIELD(max_crop_object_coverages)
+        .set_default(Tuple<float>({1.0f}))
+        .describe(
+            "Augmentation Param: Maximum ratio of intersect/gt_area "
+            "between crop box and ground-truths.");
+    DMLC_DECLARE_FIELD(num_crop_sampler)
+        .set_default(1)
         .describe("Augmentation Param: Number of crop samplers.");
     DMLC_DECLARE_FIELD(crop_emit_mode)
         .add_enum("center", image_det_aug_default_enum::kCenter)
         .add_enum("overlap", image_det_aug_default_enum::kOverlap)
         .set_default(image_det_aug_default_enum::kCenter)
-        .describe("Augmentation Param: Emition mode for invalid ground-truths after crop. "
-                  "center: emit if centroid of object is out of crop region; "
-                  "overlap: emit if overlap is less than emit_overlap_thresh. ");
-    DMLC_DECLARE_FIELD(emit_overlap_thresh).set_default(0.3f)
+        .describe(
+            "Augmentation Param: Emition mode for invalid ground-truths after crop. "
+            "center: emit if centroid of object is out of crop region; "
+            "overlap: emit if overlap is less than emit_overlap_thresh. ");
+    DMLC_DECLARE_FIELD(emit_overlap_thresh)
+        .set_default(0.3f)
         .describe("Augmentation Param: Emit overlap thresh for emit mode overlap only.");
-    DMLC_DECLARE_FIELD(max_crop_trials).set_default(Tuple<int>({25}))
-        .describe("Augmentation Param: Skip cropping if fail crop trail count "
-                  "exceeds this number.");
-    DMLC_DECLARE_FIELD(rand_pad_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(max_crop_trials)
+        .set_default(Tuple<int>({25}))
+        .describe(
+            "Augmentation Param: Skip cropping if fail crop trail count "
+            "exceeds this number.");
+    DMLC_DECLARE_FIELD(rand_pad_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability for random padding.");
-    DMLC_DECLARE_FIELD(max_pad_scale).set_default(1.0f)
+    DMLC_DECLARE_FIELD(max_pad_scale)
+        .set_default(1.0f)
         .describe("Augmentation Param: Maximum padding scale.");
-    DMLC_DECLARE_FIELD(max_random_hue).set_default(0)
+    DMLC_DECLARE_FIELD(max_random_hue)
+        .set_default(0)
         .describe("Augmentation Param: Maximum random value of H channel in HSL color space.");
-    DMLC_DECLARE_FIELD(random_hue_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(random_hue_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability to apply random hue.");
-    DMLC_DECLARE_FIELD(max_random_saturation).set_default(0)
+    DMLC_DECLARE_FIELD(max_random_saturation)
+        .set_default(0)
         .describe("Augmentation Param: Maximum random value of S channel in HSL color space.");
-    DMLC_DECLARE_FIELD(random_saturation_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(random_saturation_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability to apply random saturation.");
-    DMLC_DECLARE_FIELD(max_random_illumination).set_default(0)
+    DMLC_DECLARE_FIELD(max_random_illumination)
+        .set_default(0)
         .describe("Augmentation Param: Maximum random value of L channel in HSL color space.");
-    DMLC_DECLARE_FIELD(random_illumination_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(random_illumination_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability to apply random illumination.");
-    DMLC_DECLARE_FIELD(max_random_contrast).set_default(0)
+    DMLC_DECLARE_FIELD(max_random_contrast)
+        .set_default(0)
         .describe("Augmentation Param: Maximum random value of delta contrast.");
-    DMLC_DECLARE_FIELD(random_contrast_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(random_contrast_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability to apply random contrast.");
-    DMLC_DECLARE_FIELD(rand_mirror_prob).set_default(0.0f)
+    DMLC_DECLARE_FIELD(rand_mirror_prob)
+        .set_default(0.0f)
         .describe("Augmentation Param: Probability to apply horizontal flip aka. mirror.");
-    DMLC_DECLARE_FIELD(fill_value).set_default(127)
+    DMLC_DECLARE_FIELD(fill_value)
+        .set_default(127)
         .describe("Augmentation Param: Filled color value while padding.");
-    DMLC_DECLARE_FIELD(inter_method).set_default(1)
+    DMLC_DECLARE_FIELD(inter_method)
+        .set_default(1)
         .describe("Augmentation Param: 0-NN 1-bilinear 2-cubic 3-area 4-lanczos4 9-auto 10-rand.");
     DMLC_DECLARE_FIELD(data_shape)
-        .set_expect_ndim(3).enforce_nonzero()
+        .set_expect_ndim(3)
+        .enforce_nonzero()
         .describe("Dataset Param: Shape of each instance generated by the DataIter.");
     DMLC_DECLARE_FIELD(resize_mode)
-      .add_enum("force", image_det_aug_default_enum::kForce)
-      .add_enum("shrink", image_det_aug_default_enum::kShrink)
-      .add_enum("fit", image_det_aug_default_enum::kFit)
-      .set_default(image_det_aug_default_enum::kForce)
-      .describe("Augmentation Param: How image data fit in data_shape. "
-                "force: force reshape to data_shape regardless of aspect ratio; "
-                "shrink: ensure each side fit in data_shape, preserve aspect ratio; "
-                "fit: fit image to data_shape, preserve ratio, will upscale if applicable.");
+        .add_enum("force", image_det_aug_default_enum::kForce)
+        .add_enum("shrink", image_det_aug_default_enum::kShrink)
+        .add_enum("fit", image_det_aug_default_enum::kFit)
+        .set_default(image_det_aug_default_enum::kForce)
+        .describe(
+            "Augmentation Param: How image data fit in data_shape. "
+            "force: force reshape to data_shape regardless of aspect ratio; "
+            "shrink: ensure each side fit in data_shape, preserve aspect ratio; "
+            "fit: fit image to data_shape, preserve ratio, will upscale if applicable.");
   }
 };
 
@@ -227,27 +262,27 @@ class ImageDetLabel {
       return Rect(left, top, right - left, bottom - top);
     }
 
-     /*! \brief Return projected coordinates according to new region */
-     ImageDetObject Project(Rect box) const {
-       ImageDetObject ret = *this;
-       ret.left = std::max(0.f, (ret.left - box.x) / box.width);
-       ret.top = std::max(0.f, (ret.top - box.y) / box.height);
-       ret.right = std::min(1.f, (ret.right - box.x) / box.width);
-       ret.bottom = std::min(1.f, (ret.bottom - box.y) / box.height);
-       return ret;
-     }
-
-     /*! \brief Return Horizontally fliped coordinates */
-     ImageDetObject HorizontalFlip() const {
-       ImageDetObject ret = *this;
-       ret.left = 1.f - this->right;
-       ret.right = 1.f - this->left;
-       return ret;
-     }
+    /*! \brief Return projected coordinates according to new region */
+    ImageDetObject Project(Rect box) const {
+      ImageDetObject ret = *this;
+      ret.left           = std::max(0.f, (ret.left - box.x) / box.width);
+      ret.top            = std::max(0.f, (ret.top - box.y) / box.height);
+      ret.right          = std::min(1.f, (ret.right - box.x) / box.width);
+      ret.bottom         = std::min(1.f, (ret.bottom - box.y) / box.height);
+      return ret;
+    }
+
+    /*! \brief Return Horizontally fliped coordinates */
+    ImageDetObject HorizontalFlip() const {
+      ImageDetObject ret = *this;
+      ret.left           = 1.f - this->right;
+      ret.right          = 1.f - this->left;
+      return ret;
+    }
   };  // struct ImageDetObject
 
   /*! \brief constructor from raw array of detection labels */
-  explicit ImageDetLabel(const std::vector<float> &raw_label) {
+  explicit ImageDetLabel(const std::vector<float>& raw_label) {
     FromArray(raw_label);
   }
 
@@ -255,7 +290,7 @@ class ImageDetLabel {
    * header_width, object_width, (extra_headers...),
    * [id, xmin, ymin, xmax, ymax, (extra_object_info)] x N
    */
-  void FromArray(const std::vector<float> &raw_label) {
+  void FromArray(const std::vector<float>& raw_label) {
     int label_width = static_cast<int>(raw_label.size());
     CHECK_GE(label_width, 7);  // at least 2(header) + 5(1 object)
     int header_width = static_cast<int>(raw_label[0]);
@@ -268,11 +303,11 @@ class ImageDetLabel {
     objects_.reserve(num);
     for (int i = header_width; i < label_width; i += object_width_) {
       ImageDetObject obj;
-      auto it = raw_label.cbegin() + i;
-      obj.id = *(it++);
-      obj.left = *(it++);
-      obj.top = *(it++);
-      obj.right = *(it++);
+      auto it    = raw_label.cbegin() + i;
+      obj.id     = *(it++);
+      obj.left   = *(it++);
+      obj.top    = *(it++);
+      obj.right  = *(it++);
       obj.bottom = *(it++);
       obj.extra.assign(it, it - 5 + object_width_);
       if (obj.right > obj.left && obj.bottom > obj.top) {
@@ -299,7 +334,8 @@ class ImageDetLabel {
   /*! \brief Intersection over Union between two rects */
   static float RectIOU(Rect a, Rect b) {
     float intersect = (a & b).area();
-    if (intersect <= 0.f) return 0.f;
+    if (intersect <= 0.f)
+      return 0.f;
     return intersect / (a.area() + b.area() - intersect);
   }
 
@@ -308,18 +344,22 @@ class ImageDetLabel {
    * convert all objects if success
    */
   bool TryCrop(const Rect crop_box,
-    const float min_crop_overlap, const float max_crop_overlap,
-    const float min_crop_sample_coverage, const float max_crop_sample_coverage,
-    const float min_crop_object_coverage, const float max_crop_object_coverage,
-    const int crop_emit_mode, const float emit_overlap_thresh) {
+               const float min_crop_overlap,
+               const float max_crop_overlap,
+               const float min_crop_sample_coverage,
+               const float max_crop_sample_coverage,
+               const float min_crop_object_coverage,
+               const float max_crop_object_coverage,
+               const int crop_emit_mode,
+               const float emit_overlap_thresh) {
     if (objects_.size() < 1) {
       return true;  // no object, raise error or just skip?
     }
     // check if crop_box valid
     bool valid = false;
-    if (min_crop_overlap > 0.f || max_crop_overlap < 1.f ||
-        min_crop_sample_coverage > 0.f || max_crop_sample_coverage < 1.f ||
-        min_crop_object_coverage > 0.f || max_crop_object_coverage < 1.f) {
+    if (min_crop_overlap > 0.f || max_crop_overlap < 1.f || min_crop_sample_coverage > 0.f ||
+        max_crop_sample_coverage < 1.f || min_crop_object_coverage > 0.f ||
+        max_crop_object_coverage < 1.f) {
       for (auto& obj : objects_) {
         Rect gt_box = obj.ToRect();
         if (min_crop_overlap > 0.f || max_crop_overlap < 1.f) {
@@ -347,7 +387,8 @@ class ImageDetLabel {
       valid = true;
     }
 
-    if (!valid) return false;
+    if (!valid)
+      return false;
     // transform ground-truth labels
     std::vector<ImageDetObject> new_objects;
     for (auto& object : objects_) {
@@ -359,14 +400,15 @@ class ImageDetLabel {
         }
         new_objects.push_back(object.Project(crop_box));
       } else if (image_det_aug_default_enum::kOverlap == crop_emit_mode) {
-        Rect gt_box = object.ToRect();
+        Rect gt_box   = object.ToRect();
         float overlap = (crop_box & gt_box).area() / gt_box.area();
         if (overlap > emit_overlap_thresh) {
           new_objects.push_back(object.Project(crop_box));
         }
       }
     }
-    if (new_objects.size() < 1) return false;
+    if (new_objects.size() < 1)
+      return false;
     objects_ = new_objects;  // replace the old objects
     return true;
   }
@@ -411,8 +453,8 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
     kwargs_left = param_.InitAllowUnknown(kwargs);
 
     CHECK((param_.inter_method >= 0 && param_.inter_method <= 4) ||
-     (param_.inter_method >= 9 && param_.inter_method <= 10))
-      << "invalid inter_method: valid value 0,1,2,3,9,10";
+          (param_.inter_method >= 9 && param_.inter_method <= 10))
+        << "invalid inter_method: valid value 0,1,2,3,9,10";
 
     // validate crop parameters
     ValidateCropParameters(&param_.min_crop_scales, param_.num_crop_sampler);
@@ -439,20 +481,25 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
     CHECK_GE(param_.emit_overlap_thresh, 0.0f);
   }
   /*!
-   * \brief get interpolation method with given inter_method, 0-CV_INTER_NN 1-CV_INTER_LINEAR 2-CV_INTER_CUBIC
-   * \ 3-CV_INTER_AREA 4-CV_INTER_LANCZOS4 9-AUTO(cubic for enlarge, area for shrink, bilinear for others) 10-RAND
+   * \brief get interpolation method with given inter_method, 0-CV_INTER_NN 1-CV_INTER_LINEAR
+   * 2-CV_INTER_CUBIC \ 3-CV_INTER_AREA 4-CV_INTER_LANCZOS4 9-AUTO(cubic for enlarge, area for
+   * shrink, bilinear for others) 10-RAND
    */
-  int GetInterMethod(int inter_method, int old_width, int old_height, int new_width,
-    int new_height, common::RANDOM_ENGINE *prnd) {
+  int GetInterMethod(int inter_method,
+                     int old_width,
+                     int old_height,
+                     int new_width,
+                     int new_height,
+                     common::RANDOM_ENGINE* prnd) {
     if (inter_method == 9) {
       if (new_width > old_width && new_height > old_height) {
         return 2;  // CV_INTER_CUBIC for enlarge
-      } else if (new_width <old_width && new_height < old_height) {
+      } else if (new_width < old_width && new_height < old_height) {
         return 3;  // CV_INTER_AREA for shrink
       } else {
         return 1;  // CV_INTER_LINEAR for others
       }
-      } else if (inter_method == 10) {
+    } else if (inter_method == 10) {
       std::uniform_int_distribution<size_t> rand_uniform_int(0, 4);
       return rand_uniform_int(*prnd);
     } else {
@@ -461,8 +508,8 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
   }
 
   /*! \brief Check number of crop samplers and given parameters */
-  template<typename DType>
-  void ValidateCropParameters(mxnet::Tuple<DType> *param, const int num_sampler) {
+  template <typename DType>
+  void ValidateCropParameters(mxnet::Tuple<DType>* param, const int num_sampler) {
     if (num_sampler == 1) {
       CHECK_EQ(param->ndim(), 1);
     } else if (num_sampler > 1) {
@@ -477,53 +524,55 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
 
   /*! \brief Generate crop box region given cropping parameters */
   Rect GenerateCropBox(const float min_crop_scale,
-    const float max_crop_scale, const float min_crop_aspect_ratio,
-    const float max_crop_aspect_ratio, common::RANDOM_ENGINE *prnd,
-    const float img_aspect_ratio) {
-    float new_scale = std::uniform_real_distribution<float>(
-        min_crop_scale, max_crop_scale)(*prnd) + 1e-12f;
-    float min_ratio = std::max<float>(min_crop_aspect_ratio / img_aspect_ratio,
-        new_scale * new_scale);
-    float max_ratio = std::min<float>(max_crop_aspect_ratio / img_aspect_ratio,
-        1. / (new_scale * new_scale));
-    float new_ratio = std::sqrt(std::uniform_real_distribution<float>(
-        min_ratio, max_ratio)(*prnd));
+                       const float max_crop_scale,
+                       const float min_crop_aspect_ratio,
+                       const float max_crop_aspect_ratio,
+                       common::RANDOM_ENGINE* prnd,
+                       const float img_aspect_ratio) {
+    float new_scale =
+        std::uniform_real_distribution<float>(min_crop_scale, max_crop_scale)(*prnd) + 1e-12f;
+    float min_ratio =
+        std::max<float>(min_crop_aspect_ratio / img_aspect_ratio, new_scale * new_scale);
+    float max_ratio =
+        std::min<float>(max_crop_aspect_ratio / img_aspect_ratio, 1. / (new_scale * new_scale));
+    float new_ratio = std::sqrt(std::uniform_real_distribution<float>(min_ratio, max_ratio)(*prnd));
     float new_width = std::min(1.f, new_scale * new_ratio);
     float new_height = std::min(1.f, new_scale / new_ratio);
-    float x0 = std::uniform_real_distribution<float>(0.f, 1 - new_width)(*prnd);
-    float y0 = std::uniform_real_distribution<float>(0.f, 1 - new_height)(*prnd);
+    float x0         = std::uniform_real_distribution<float>(0.f, 1 - new_width)(*prnd);
+    float y0         = std::uniform_real_distribution<float>(0.f, 1 - new_height)(*prnd);
     return Rect(x0, y0, new_width, new_height);
   }
 
   /*! \brief Generate padding box region given padding parameters */
   Rect GeneratePadBox(const float max_pad_scale,
-    common::RANDOM_ENGINE *prnd, const float threshold = 1.05f) {
-      float new_scale = std::uniform_real_distribution<float>(
-        1.f, max_pad_scale)(*prnd);
-      if (new_scale < threshold) return Rect(0, 0, 0, 0);
-      auto rand_uniform = std::uniform_real_distribution<float>(0.f, new_scale - 1);
-      float x0 = rand_uniform(*prnd);
-      float y0 = rand_uniform(*prnd);
-      return Rect(-x0, -y0, new_scale, new_scale);
-    }
+                      common::RANDOM_ENGINE* prnd,
+                      const float threshold = 1.05f) {
+    float new_scale = std::uniform_real_distribution<float>(1.f, max_pad_scale)(*prnd);
+    if (new_scale < threshold)
+      return Rect(0, 0, 0, 0);
+    auto rand_uniform = std::uniform_real_distribution<float>(0.f, new_scale - 1);
+    float x0          = rand_uniform(*prnd);
+    float y0          = rand_uniform(*prnd);
+    return Rect(-x0, -y0, new_scale, new_scale);
+  }
 
-  cv::Mat Process(const cv::Mat &src, std::vector<float> *label,
-                  common::RANDOM_ENGINE *prnd) override {
+  cv::Mat Process(const cv::Mat& src,
+                  std::vector<float>* label,
+                  common::RANDOM_ENGINE* prnd) override {
     using mshadow::index_t;
     cv::Mat res;
     if (param_.resize != -1) {
       int new_height, new_width;
       if (src.rows > src.cols) {
-        new_height = param_.resize*src.rows/src.cols;
-        new_width = param_.resize;
+        new_height = param_.resize * src.rows / src.cols;
+        new_width  = param_.resize;
       } else {
         new_height = param_.resize;
-        new_width = param_.resize*src.cols/src.rows;
+        new_width  = param_.resize * src.cols / src.rows;
       }
-      int interpolation_method = GetInterMethod(param_.inter_method,
-                   src.cols, src.rows, new_width, new_height, prnd);
-      cv::resize(src, res, cv::Size(new_width, new_height),
-                   0, 0, interpolation_method);
+      int interpolation_method =
+          GetInterMethod(param_.inter_method, src.cols, src.rows, new_width, new_height, prnd);
+      cv::resize(src, res, cv::Size(new_width, new_height), 0, 0, interpolation_method);
     } else {
       res = src;
     }
@@ -537,16 +586,16 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
     if (param_.random_hue_prob > 0.f || param_.random_saturation_prob > 0.f ||
         param_.random_illumination_prob > 0.f || param_.random_contrast_prob > 0.f) {
       std::uniform_real_distribution<float> uniform_range(-1.f, 1.f);
-      int h = uniform_range(*prnd) * param_.max_random_hue;
-      int s = uniform_range(*prnd) * param_.max_random_saturation;
-      int l = uniform_range(*prnd) * param_.max_random_illumination;
+      int h   = uniform_range(*prnd) * param_.max_random_hue;
+      int s   = uniform_range(*prnd) * param_.max_random_saturation;
+      int l   = uniform_range(*prnd) * param_.max_random_illumination;
       float c = uniform_range(*prnd) * param_.max_random_contrast;
-      h = rand_uniform(*prnd) < param_.random_hue_prob ? h : 0;
-      s = rand_uniform(*prnd) < param_.random_saturation_prob ? s : 0;
-      l = rand_uniform(*prnd) < param_.random_illumination_prob ? l : 0;
-      c = rand_uniform(*prnd) < param_.random_contrast_prob ? c : 0;
+      h       = rand_uniform(*prnd) < param_.random_hue_prob ? h : 0;
+      s       = rand_uniform(*prnd) < param_.random_saturation_prob ? s : 0;
+      l       = rand_uniform(*prnd) < param_.random_illumination_prob ? l : 0;
+      c       = rand_uniform(*prnd) < param_.random_contrast_prob ? c : 0;
       if (h != 0 || s != 0 || l != 0) {
-        int temp[3] = {h, l, s};
+        int temp[3]  = {h, l, s};
         int limit[3] = {180, 255, 255};
         cv::cvtColor(res, res, CV_BGR2HLS);
         for (int i = 0; i < res.rows; ++i) {
@@ -554,7 +603,7 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
             for (int k = 0; k < 3; ++k) {
               int v = res.at<cv::Vec3b>(i, j)[k];
               v += temp[k];
-              v = std::max(0, std::min(limit[k], v));
+              v                          = std::max(0, std::min(limit[k], v));
               res.at<cv::Vec3b>(i, j)[k] = v;
             }
           }
@@ -583,13 +632,19 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
         if (pad_box.area() > 0) {
           if (det_label.TryPad(pad_box)) {
             // pad image
-            temp_ = res;
-            int left = static_cast<int>(-pad_box.x * res.cols);
-            int top = static_cast<int>(-pad_box.y * res.rows);
+            temp_     = res;
+            int left  = static_cast<int>(-pad_box.x * res.cols);
+            int top   = static_cast<int>(-pad_box.y * res.rows);
             int right = static_cast<int>((pad_box.width + pad_box.x - 1) * res.cols);
-            int bot = static_cast<int>((pad_box.height + pad_box.y - 1) * res.rows);
-            cv::copyMakeBorder(temp_, res, top, bot, left, right, cv::BORDER_ISOLATED,
-              cv::Scalar(param_.fill_value, param_.fill_value, param_.fill_value));
+            int bot   = static_cast<int>((pad_box.height + pad_box.y - 1) * res.rows);
+            cv::copyMakeBorder(temp_,
+                               res,
+                               top,
+                               bot,
+                               left,
+                               right,
+                               cv::BORDER_ISOLATED,
+                               cv::Scalar(param_.fill_value, param_.fill_value, param_.fill_value));
           }
         }
       }
@@ -608,24 +663,31 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
         std::shuffle(indices.begin(), indices.end(), *prnd);
         int num_processed = 0;
         for (auto idx : indices) {
-          if (num_processed > 0) break;
+          if (num_processed > 0)
+            break;
           for (int t = 0; t < param_.max_crop_trials[idx]; ++t) {
             Rect crop_box = GenerateCropBox(param_.min_crop_scales[idx],
-              param_.max_crop_scales[idx], param_.min_crop_aspect_ratios[idx],
-              param_.max_crop_aspect_ratios[idx], prnd,
-              static_cast<float>(res.cols) / res.rows);
-            if (det_label.TryCrop(crop_box, param_.min_crop_overlaps[idx],
-                param_.max_crop_overlaps[idx], param_.min_crop_sample_coverages[idx],
-                param_.max_crop_sample_coverages[idx], param_.min_crop_object_coverages[idx],
-                param_.max_crop_object_coverages[idx], param_.crop_emit_mode,
-                param_.emit_overlap_thresh)) {
+                                            param_.max_crop_scales[idx],
+                                            param_.min_crop_aspect_ratios[idx],
+                                            param_.max_crop_aspect_ratios[idx],
+                                            prnd,
+                                            static_cast<float>(res.cols) / res.rows);
+            if (det_label.TryCrop(crop_box,
+                                  param_.min_crop_overlaps[idx],
+                                  param_.max_crop_overlaps[idx],
+                                  param_.min_crop_sample_coverages[idx],
+                                  param_.max_crop_sample_coverages[idx],
+                                  param_.min_crop_object_coverages[idx],
+                                  param_.max_crop_object_coverages[idx],
+                                  param_.crop_emit_mode,
+                                  param_.emit_overlap_thresh)) {
               ++num_processed;
               // crop image
-              int left = static_cast<int>(crop_box.x * res.cols);
-              int top = static_cast<int>(crop_box.y * res.rows);
-              int width = static_cast<int>(crop_box.width * res.cols);
+              int left   = static_cast<int>(crop_box.x * res.cols);
+              int top    = static_cast<int>(crop_box.y * res.rows);
+              int width  = static_cast<int>(crop_box.width * res.cols);
               int height = static_cast<int>(crop_box.height * res.rows);
-              res = res(cv::Rect(left, top, width, height));
+              res        = res(cv::Rect(left, top, width, height));
               break;
             }
           }
@@ -636,34 +698,31 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
     if (image_det_aug_default_enum::kForce == param_.resize_mode) {
       // force resize to specified data_shape, regardless of aspect ratio
       int new_height = param_.data_shape[1];
-      int new_width = param_.data_shape[2];
-      int interpolation_method = GetInterMethod(param_.inter_method,
-                   res.cols, res.rows, new_width, new_height, prnd);
-      cv::resize(res, res, cv::Size(new_width, new_height),
-                   0, 0, interpolation_method);
+      int new_width  = param_.data_shape[2];
+      int interpolation_method =
+          GetInterMethod(param_.inter_method, res.cols, res.rows, new_width, new_height, prnd);
+      cv::resize(res, res, cv::Size(new_width, new_height), 0, 0, interpolation_method);
     } else if (image_det_aug_default_enum::kShrink == param_.resize_mode) {
       // try to keep original size, shrink if too large
       float h = param_.data_shape[1];
       float w = param_.data_shape[2];
       if (res.rows > h || res.cols > w) {
-        float ratio = std::min(h / res.rows, w / res.cols);
+        float ratio    = std::min(h / res.rows, w / res.cols);
         int new_height = ratio * res.rows;
-        int new_width = ratio * res.cols;
-        int interpolation_method = GetInterMethod(param_.inter_method,
-                     res.cols, res.rows, new_width, new_height, prnd);
-        cv::resize(res, res, cv::Size(new_width, new_height),
-                    0, 0, interpolation_method);
+        int new_width  = ratio * res.cols;
+        int interpolation_method =
+            GetInterMethod(param_.inter_method, res.cols, res.rows, new_width, new_height, prnd);
+        cv::resize(res, res, cv::Size(new_width, new_height), 0, 0, interpolation_method);
       }
     } else if (image_det_aug_default_enum::kFit == param_.resize_mode) {
-      float h = param_.data_shape[1];
-      float w = param_.data_shape[2];
-      float ratio = std::min(h / res.rows, w / res.cols);
+      float h        = param_.data_shape[1];
+      float w        = param_.data_shape[2];
+      float ratio    = std::min(h / res.rows, w / res.cols);
       int new_height = ratio * res.rows;
-      int new_width = ratio * res.cols;
-      int interpolation_method = GetInterMethod(param_.inter_method,
-                   res.cols, res.rows, new_width, new_height, prnd);
-      cv::resize(res, res, cv::Size(new_width, new_height),
-                  0, 0, interpolation_method);
+      int new_width  = ratio * res.cols;
+      int interpolation_method =
+          GetInterMethod(param_.inter_method, res.cols, res.rows, new_width, new_height, prnd);
+      cv::resize(res, res, cv::Size(new_width, new_height), 0, 0, interpolation_method);
     }
 
     *label = det_label.ToArray();  // put back processed labels
@@ -678,10 +737,8 @@ class DefaultImageDetAugmenter : public ImageAugmenter {
 };
 
 MXNET_REGISTER_IMAGE_AUGMENTER(det_aug_default)
-.describe("default detection augmenter")
-.set_body([]() {
-    return new DefaultImageDetAugmenter();
-  });
+    .describe("default detection augmenter")
+    .set_body([]() { return new DefaultImageDetAugmenter(); });
 #endif  // MXNET_USE_OPENCV
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/image_io.cc b/src/io/image_io.cc
index db9ac7682287..f737c2c25307 100644
--- a/src/io/image_io.cc
+++ b/src/io/image_io.cc
@@ -40,8 +40,8 @@
 #include "../operator/image/resize-inl.h"
 
 #if MXNET_USE_OPENCV
-  #include <opencv2/opencv.hpp>
-  #include "./opencv_compatibility.h"
+#include <opencv2/opencv.hpp>
+#include "./opencv_compatibility.h"
 #endif  // MXNET_USE_OPENCV
 
 namespace mxnet {
@@ -50,32 +50,34 @@ namespace io {
 // http://www.64lines.com/jpeg-width-height
 // Gets the JPEG size from the array of data passed to the function,
 // file reference: http://www.obrador.com/essentialjpeg/headerinfo.htm
-bool get_jpeg_size(const uint8_t* data, uint32_t data_size, int64_t *width, int64_t *height) {
+bool get_jpeg_size(const uint8_t* data, uint32_t data_size, int64_t* width, int64_t* height) {
   // Check for valid JPEG image
   uint32_t i = 0;  // Keeps track of the position within the file
-  if (data[i] == 0xFF && data[i+1] == 0xD8 && data[i+2] == 0xFF && data[i+3] == 0xE0) {
+  if (data[i] == 0xFF && data[i + 1] == 0xD8 && data[i + 2] == 0xFF && data[i + 3] == 0xE0) {
     i += 4;
     // Check for valid JPEG header (null terminated JFIF)
-    if (data[i+2] == 'J' && data[i+3] == 'F' && data[i+4] == 'I'
-        && data[i+5] == 'F' && data[i+6] == 0x00) {
+    if (data[i + 2] == 'J' && data[i + 3] == 'F' && data[i + 4] == 'I' && data[i + 5] == 'F' &&
+        data[i + 6] == 0x00) {
       // Retrieve the block length of the first block since
       // the first block will not contain the size of file
-      uint16_t block_length = data[i] * 256 + data[i+1];
+      uint16_t block_length = data[i] * 256 + data[i + 1];
       while (i < data_size) {
-        i+=block_length;  // Increase the file index to get to the next block
-        if (i >= data_size) return false;  // Check to protect against segmentation faults
-        if (data[i] != 0xFF) return false;  // Check that we are truly at the start of another block
-        uint8_t m = data[i+1];
+        i += block_length;  // Increase the file index to get to the next block
+        if (i >= data_size)
+          return false;  // Check to protect against segmentation faults
+        if (data[i] != 0xFF)
+          return false;  // Check that we are truly at the start of another block
+        uint8_t m = data[i + 1];
         if (m == 0xC0 || (m >= 0xC1 && m <= 0xCF && m != 0xC4 && m != 0xC8 && m != 0xCC)) {
           // 0xFFC0 is the "Start of frame" marker which contains the file size
           // The structure of the 0xFFC0 block is quite simple
           // [0xFFC0][ushort length][uchar precision][ushort x][ushort y]
-          *height = data[i+5]*256 + data[i+6];
-          *width = data[i+7]*256 + data[i+8];
+          *height = data[i + 5] * 256 + data[i + 6];
+          *width  = data[i + 7] * 256 + data[i + 8];
           return true;
         } else {
-          i+=2;  // Skip the block marker
-          block_length = data[i] * 256 + data[i+1];  // Go to the next block
+          i += 2;                                      // Skip the block marker
+          block_length = data[i] * 256 + data[i + 1];  // Go to the next block
         }
       }
       return false;  // If this point is reached then no size was found
@@ -87,12 +89,12 @@ bool get_jpeg_size(const uint8_t* data, uint32_t data_size, int64_t *width, int6
   }
 }
 
-bool get_png_size(const uint8_t* data, uint32_t data_size, int64_t *width, int64_t *height) {
-  if (data[0] == 0x89 && data[1] == 0x50 && data[2] ==0x4E && data[3] == 0x47) {
+bool get_png_size(const uint8_t* data, uint32_t data_size, int64_t* width, int64_t* height) {
+  if (data[0] == 0x89 && data[1] == 0x50 && data[2] == 0x4E && data[3] == 0x47) {
     uint8_t const* p = data + 16;
-    *width = ((p[0]*256 + p[1])*256 + p[2])*256 + p[3];
+    *width           = ((p[0] * 256 + p[1]) * 256 + p[2]) * 256 + p[3];
     p += 4;
-    *height = ((p[0]*256 + p[1])*256 + p[2])*256 + p[3];
+    *height = ((p[0] * 256 + p[1]) * 256 + p[2]) * 256 + p[3];
     return true;
   } else {
     return false;
@@ -103,14 +105,11 @@ struct ImdecodeParam : public dmlc::Parameter<ImdecodeParam> {
   int flag;
   bool to_rgb;
   DMLC_DECLARE_PARAMETER(ImdecodeParam) {
-    DMLC_DECLARE_FIELD(flag)
-    .set_lower_bound(0)
-    .set_default(1)
-    .describe("Convert decoded image to grayscale (0) or color (1).");
-    DMLC_DECLARE_FIELD(to_rgb)
-    .set_default(true)
-    .describe("Whether to convert decoded image to mxnet's default RGB format "
-              "(instead of opencv's default BGR).");
+    DMLC_DECLARE_FIELD(flag).set_lower_bound(0).set_default(1).describe(
+        "Convert decoded image to grayscale (0) or color (1).");
+    DMLC_DECLARE_FIELD(to_rgb).set_default(true).describe(
+        "Whether to convert decoded image to mxnet's default RGB format "
+        "(instead of opencv's default BGR).");
   }
 };
 
@@ -121,25 +120,19 @@ struct ImreadParam : public dmlc::Parameter<ImreadParam> {
   int flag;
   bool to_rgb;
   DMLC_DECLARE_PARAMETER(ImreadParam) {
-    DMLC_DECLARE_FIELD(filename)
-    .describe("Name of the image file to be loaded.");
-    DMLC_DECLARE_FIELD(flag)
-    .set_lower_bound(0)
-    .set_default(1)
-    .describe("Convert decoded image to grayscale (0) or color (1).");
-    DMLC_DECLARE_FIELD(to_rgb)
-    .set_default(true)
-    .describe("Whether to convert decoded image to mxnet's default RGB format "
-              "(instead of opencv's default BGR).");
+    DMLC_DECLARE_FIELD(filename).describe("Name of the image file to be loaded.");
+    DMLC_DECLARE_FIELD(flag).set_lower_bound(0).set_default(1).describe(
+        "Convert decoded image to grayscale (0) or color (1).");
+    DMLC_DECLARE_FIELD(to_rgb).set_default(true).describe(
+        "Whether to convert decoded image to mxnet's default RGB format "
+        "(instead of opencv's default BGR).");
   }
 };
 
 DMLC_REGISTER_PARAMETER(ImreadParam);
 
-
 #if MXNET_USE_OPENCV
-void ImdecodeImpl(int flag, bool to_rgb, void* data, size_t size,
-                  NDArray* out) {
+void ImdecodeImpl(int flag, bool to_rgb, void* data, size_t size, NDArray* out) {
   cv::Mat buf(1, size, CV_8U, data);
   cv::Mat dst;
   if (out->is_none()) {
@@ -147,18 +140,18 @@ void ImdecodeImpl(int flag, bool to_rgb, void* data, size_t size,
     CHECK(!res.empty()) << "Decoding failed. Invalid image file.";
 
     *out = NDArray(mshadow::Shape3(res.rows, res.cols, flag == 0 ? 1 : 3),
-                   Context::CPU(), false, mshadow::kUint8);
-    dst = cv::Mat(out->shape()[0], out->shape()[1], flag == 0 ? CV_8U : CV_8UC3,
-                  out->data().dptr_);
+                   Context::CPU(),
+                   false,
+                   mshadow::kUint8);
+    dst = cv::Mat(out->shape()[0], out->shape()[1], flag == 0 ? CV_8U : CV_8UC3, out->data().dptr_);
     res.copyTo(dst);
     CHECK(!dst.empty()) << "Failed copying buffer to output.";
   } else {
-    dst = cv::Mat(out->shape()[0], out->shape()[1], flag == 0 ? CV_8U : CV_8UC3,
-                out->data().dptr_);
+    dst = cv::Mat(out->shape()[0], out->shape()[1], flag == 0 ? CV_8U : CV_8UC3, out->data().dptr_);
 #if (CV_MAJOR_VERSION > 3 || (CV_MAJOR_VERSION == 3 && CV_MINOR_VERSION >= 3))
     cv::imdecode(buf, flag | cv::IMREAD_IGNORE_ORIENTATION, &dst);
     CHECK(!dst.empty()) << "Decoding failed. Invalid image file.";
-#elif(CV_MAJOR_VERSION > 2 || (CV_MAJOR_VERSION == 2 && CV_MINOR_VERSION >= 4))
+#elif (CV_MAJOR_VERSION > 2 || (CV_MAJOR_VERSION == 2 && CV_MINOR_VERSION >= 4))  // NOLINT
     cv::imdecode(buf, flag, &dst);
     CHECK(!dst.empty()) << "Decoding failed. Invalid image file.";
 #else
@@ -186,7 +179,7 @@ void Imdecode(const nnvm::NodeAttrs& attrs,
   inputs[0].WaitToRead();
 
   uint8_t* str_img = inputs[0].data().dptr<uint8_t>();
-  size_t len = inputs[0].shape().Size();
+  size_t len       = inputs[0].shape().Size();
   CHECK(len > 0) << "Input cannot be an empty buffer";
 
   mxnet::TShape oshape(3, 1);
@@ -200,13 +193,18 @@ void Imdecode(const nnvm::NodeAttrs& attrs,
   }
 
   const NDArray& ndin = inputs[0];
-  NDArray& ndout = (*outputs)[0];
-  ndout = NDArray(oshape, Context::CPU(), true, mshadow::kUint8);
-  Engine::Get()->PushSync([ndin, ndout, str_img, len, param](RunContext ctx){
-      ImdecodeImpl(param.flag, param.to_rgb, str_img, len,
-                   const_cast<NDArray*>(&ndout));
-    }, ndout.ctx(), {ndin.var()}, {ndout.var()},
-    FnProperty::kNormal, 0, "Imdecode");
+  NDArray& ndout      = (*outputs)[0];
+  ndout               = NDArray(oshape, Context::CPU(), true, mshadow::kUint8);
+  Engine::Get()->PushSync(
+      [ndin, ndout, str_img, len, param](RunContext ctx) {
+        ImdecodeImpl(param.flag, param.to_rgb, str_img, len, const_cast<NDArray*>(&ndout));
+      },
+      ndout.ctx(),
+      {ndin.var()},
+      {ndout.var()},
+      FnProperty::kNormal,
+      0,
+      "Imdecode");
 #else
   LOG(FATAL) << "Build with USE_OPENCV=1 for image io.";
 #endif  // MXNET_USE_OPENCV
@@ -221,13 +219,12 @@ void Imread(const nnvm::NodeAttrs& attrs,
   std::ifstream file(param.filename, std::ios::binary | std::ios::ate);
   // if file is not open we get bad alloc after tellg
   CHECK(file.is_open()) << "Imread: '" << param.filename
-      << "' couldn't open file: " << strerror(errno);
+                        << "' couldn't open file: " << strerror(errno);
   size_t fsize = file.tellg();
   file.seekg(0, std::ios::beg);
   std::shared_ptr<uint8_t> buff(new uint8_t[fsize], std::default_delete<uint8_t[]>());
   file.read(reinterpret_cast<char*>(buff.get()), fsize);
-  CHECK(file.good()) << "Failed reading image file: '" << param.filename << "' "
-            << strerror(errno);
+  CHECK(file.good()) << "Failed reading image file: '" << param.filename << "' " << strerror(errno);
 
   mxnet::TShape oshape(3, 1);
   oshape[2] = param.flag == 0 ? 1 : 3;
@@ -240,41 +237,41 @@ void Imread(const nnvm::NodeAttrs& attrs,
   }
 
   NDArray& ndout = (*outputs)[0];
-  ndout = NDArray(oshape, Context::CPU(), true, mshadow::kUint8);
-  Engine::Get()->PushSync([ndout, buff, fsize, param](RunContext ctx){
-      ImdecodeImpl(param.flag, param.to_rgb, buff.get(), fsize,
-                   const_cast<NDArray*>(&ndout));
-    }, ndout.ctx(), {}, {ndout.var()},
-    FnProperty::kNormal, 0, "Imread");
+  ndout          = NDArray(oshape, Context::CPU(), true, mshadow::kUint8);
+  Engine::Get()->PushSync(
+      [ndout, buff, fsize, param](RunContext ctx) {
+        ImdecodeImpl(param.flag, param.to_rgb, buff.get(), fsize, const_cast<NDArray*>(&ndout));
+      },
+      ndout.ctx(),
+      {},
+      {ndout.var()},
+      FnProperty::kNormal,
+      0,
+      "Imread");
 #else
   LOG(FATAL) << "Build with USE_OPENCV=1 for image io.";
 #endif  // MXNET_USE_OPENCV
 }
 
-
 struct ResizeParam : public dmlc::Parameter<ResizeParam> {
   int w;
   int h;
   int interp;
   DMLC_DECLARE_PARAMETER(ResizeParam) {
-    DMLC_DECLARE_FIELD(w)
-    .set_lower_bound(1)
-    .describe("Width of resized image.");
-    DMLC_DECLARE_FIELD(h)
-    .set_lower_bound(1)
-    .describe("Height of resized image.");
-    DMLC_DECLARE_FIELD(interp)
-    .set_default(1)
-    .describe("Interpolation method (default=cv2.INTER_LINEAR).");
+    DMLC_DECLARE_FIELD(w).set_lower_bound(1).describe("Width of resized image.");
+    DMLC_DECLARE_FIELD(h).set_lower_bound(1).describe("Height of resized image.");
+    DMLC_DECLARE_FIELD(interp).set_default(1).describe(
+        "Interpolation method (default=cv2.INTER_LINEAR).");
   }
 };
 DMLC_REGISTER_PARAMETER(ResizeParam);
 
 inline bool ResizeShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *ishape,
-                        mxnet::ShapeVector *oshape) {
+                        mxnet::ShapeVector* ishape,
+                        mxnet::ShapeVector* oshape) {
   const auto& param = nnvm::get<ResizeParam>(attrs.parsed);
-  if (ishape->size() != 1 || (*ishape)[0].ndim() != 3) return false;
+  if (ishape->size() != 1 || (*ishape)[0].ndim() != 3)
+    return false;
 
   oshape->clear();
   oshape->push_back(mshadow::Shape3(param.h, param.w, (*ishape)[0][2]));
@@ -282,65 +279,56 @@ inline bool ResizeShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline void Imresize(const nnvm::NodeAttrs& attrs,
-                     const OpContext &ctx,
-                     const std::vector<TBlob> &inputs,
-                     const std::vector<OpReqType> &req,
-                     const std::vector<TBlob> &outputs) {
+                     const OpContext& ctx,
+                     const std::vector<TBlob>& inputs,
+                     const std::vector<OpReqType>& req,
+                     const std::vector<TBlob>& outputs) {
   const auto& param = nnvm::get<ResizeParam>(attrs.parsed);
   op::image::ResizeImpl(inputs, outputs, param.h, param.w, param.interp);
 }
 
-
 struct MakeBorderParam : public dmlc::Parameter<MakeBorderParam> {
   int top, bot, left, right;
   int type;
   double value;
   mxnet::Tuple<double> values;
   DMLC_DECLARE_PARAMETER(MakeBorderParam) {
-    DMLC_DECLARE_FIELD(top)
-    .describe("Top margin.");
-    DMLC_DECLARE_FIELD(bot)
-    .describe("Bottom margin.");
-    DMLC_DECLARE_FIELD(left)
-    .describe("Left margin.");
-    DMLC_DECLARE_FIELD(right)
-    .describe("Right margin.");
-    DMLC_DECLARE_FIELD(type)
-    .set_default(0)
-    .describe("Filling type (default=cv2.BORDER_CONSTANT).");
-    DMLC_DECLARE_FIELD(value)
-    .set_default(0.0)
-    .describe("(Deprecated! Use ``values`` instead.) Fill with single value.");
-    DMLC_DECLARE_FIELD(values)
-    .set_default({})
-    .describe("Fill with value(RGB[A] or gray), up to 4 channels.");
+    DMLC_DECLARE_FIELD(top).describe("Top margin.");
+    DMLC_DECLARE_FIELD(bot).describe("Bottom margin.");
+    DMLC_DECLARE_FIELD(left).describe("Left margin.");
+    DMLC_DECLARE_FIELD(right).describe("Right margin.");
+    DMLC_DECLARE_FIELD(type).set_default(0).describe("Filling type (default=cv2.BORDER_CONSTANT).");
+    DMLC_DECLARE_FIELD(value).set_default(0.0).describe(
+        "(Deprecated! Use ``values`` instead.) Fill with single value.");
+    DMLC_DECLARE_FIELD(values).set_default({}).describe(
+        "Fill with value(RGB[A] or gray), up to 4 channels.");
   }
 };
 DMLC_REGISTER_PARAMETER(MakeBorderParam);
 
 inline bool MakeBorderShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *ishape,
-                        mxnet::ShapeVector *oshape) {
+                            mxnet::ShapeVector* ishape,
+                            mxnet::ShapeVector* oshape) {
   const auto& param = nnvm::get<MakeBorderParam>(attrs.parsed);
-  if (ishape->size() != 1 || (*ishape)[0].ndim() != 3) return false;
+  if (ishape->size() != 1 || (*ishape)[0].ndim() != 3)
+    return false;
 
   oshape->clear();
-  oshape->push_back(
-    mshadow::Shape3((*ishape)[0][0]+param.top+param.bot,
-                    (*ishape)[0][1]+param.left+param.right,
-                    (*ishape)[0][2]));
+  oshape->push_back(mshadow::Shape3((*ishape)[0][0] + param.top + param.bot,
+                                    (*ishape)[0][1] + param.left + param.right,
+                                    (*ishape)[0][2]));
   return true;
 }
 
 inline void copyMakeBorder(const nnvm::NodeAttrs& attrs,
-                           const OpContext &ctx,
-                           const std::vector<TBlob> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &outputs) {
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
 #if MXNET_USE_OPENCV
   CHECK_NE(inputs[0].type_flag_, mshadow::kFloat16) << "imresize doesn't support fp16";
   const int DTYPE[] = {CV_32F, CV_64F, -1, CV_8U, CV_32S};
-  int cv_type = CV_MAKETYPE(DTYPE[inputs[0].type_flag_], inputs[0].shape_[2]);
+  int cv_type       = CV_MAKETYPE(DTYPE[inputs[0].type_flag_], inputs[0].shape_[2]);
   const auto& param = nnvm::get<MakeBorderParam>(attrs.parsed);
   cv::Mat buf(inputs[0].shape_[0], inputs[0].shape_[1], cv_type, inputs[0].dptr_);
   cv::Mat dst(outputs[0].shape_[0], outputs[0].shape_[1], cv_type, outputs[0].dptr_);
@@ -357,50 +345,52 @@ inline void copyMakeBorder(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_cvimdecode)
-.add_alias("_npi_cvimdecode")
-.describe("Decode image with OpenCV. \n"
-          "Note: return image in RGB by default, "
-          "instead of OpenCV's default BGR.")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(op::ParamParser<ImdecodeParam>)
-.set_attr<FNDArrayFunction>("FNDArrayFunction", Imdecode)
-.add_argument("buf", "NDArray", "Buffer containing binary encoded image")
-.add_arguments(ImdecodeParam::__FIELDS__());
+    .add_alias("_npi_cvimdecode")
+    .describe(
+        "Decode image with OpenCV. \n"
+        "Note: return image in RGB by default, "
+        "instead of OpenCV's default BGR.")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(op::ParamParser<ImdecodeParam>)
+    .set_attr<FNDArrayFunction>("FNDArrayFunction", Imdecode)
+    .add_argument("buf", "NDArray", "Buffer containing binary encoded image")
+    .add_arguments(ImdecodeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_cvimread)
-.add_alias("_npi_cvimread")
-.describe("Read and decode image with OpenCV. \n"
-          "Note: return image in RGB by default, "
-          "instead of OpenCV's default BGR.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(op::ParamParser<ImreadParam>)
-.set_attr<FNDArrayFunction>("FNDArrayFunction", Imread)
-.add_arguments(ImreadParam::__FIELDS__());
+    .add_alias("_npi_cvimread")
+    .describe(
+        "Read and decode image with OpenCV. \n"
+        "Note: return image in RGB by default, "
+        "instead of OpenCV's default BGR.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(op::ParamParser<ImreadParam>)
+    .set_attr<FNDArrayFunction>("FNDArrayFunction", Imread)
+    .add_arguments(ImreadParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_cvimresize)
-.add_alias("_npi_cvimresize")
-.describe("Resize image with OpenCV. \n")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(op::ParamParser<ResizeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ResizeShape)
-.set_attr<nnvm::FInferType>("FInferType", op::ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", Imresize)
-.add_argument("src", "NDArray", "source image")
-.add_arguments(ResizeParam::__FIELDS__());
+    .add_alias("_npi_cvimresize")
+    .describe("Resize image with OpenCV. \n")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(op::ParamParser<ResizeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ResizeShape)
+    .set_attr<nnvm::FInferType>("FInferType", op::ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", Imresize)
+    .add_argument("src", "NDArray", "source image")
+    .add_arguments(ResizeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_cvcopyMakeBorder)
-.describe("Pad image border with OpenCV. \n")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(op::ParamParser<MakeBorderParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MakeBorderShape)
-.set_attr<nnvm::FInferType>("FInferType", op::ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", copyMakeBorder)
-.add_argument("src", "NDArray", "source image")
-.add_arguments(MakeBorderParam::__FIELDS__());
+    .describe("Pad image border with OpenCV. \n")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(op::ParamParser<MakeBorderParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MakeBorderShape)
+    .set_attr<nnvm::FInferType>("FInferType", op::ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", copyMakeBorder)
+    .add_argument("src", "NDArray", "source image")
+    .add_arguments(MakeBorderParam::__FIELDS__());
 
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/image_iter_common.h b/src/io/image_iter_common.h
index edda3d9dfe97..2b6276aa7779 100644
--- a/src/io/image_iter_common.h
+++ b/src/io/image_iter_common.h
@@ -41,28 +41,28 @@ class ImageLabelMap {
    * \param path_imglist path to the image list
    * \param label_width predefined label_width
    */
-  explicit ImageLabelMap(const char *path_imglist,
-                         index_t label_width,
-                         bool silent) {
+  explicit ImageLabelMap(const char* path_imglist, index_t label_width, bool silent) {
     this->label_width = label_width;
     image_index_.clear();
     label_.clear();
     idx2label_.clear();
-    dmlc::InputSplit *fi = dmlc::InputSplit::Create
-        (path_imglist, 0, 1, "text");
+    dmlc::InputSplit* fi = dmlc::InputSplit::Create(path_imglist, 0, 1, "text");
     dmlc::InputSplit::Blob rec;
     while (fi->NextRecord(&rec)) {
       // quick manual parsing
-      char *p = reinterpret_cast<char*>(rec.dptr);
-      char *end = p + rec.size;
+      char* p   = reinterpret_cast<char*>(rec.dptr);
+      char* end = p + rec.size;
       // skip space
-      while (isspace(*p) && p != end) ++p;
+      while (isspace(*p) && p != end)
+        ++p;
       image_index_.push_back(static_cast<size_t>(atol(p)));
       for (index_t i = 0; i < label_width; ++i) {
         // skip till space
-        while (!isspace(*p) && p != end) ++p;
+        while (!isspace(*p) && p != end)
+          ++p;
         // skip space
-        while (isspace(*p) && p != end) ++p;
+        while (isspace(*p) && p != end)
+          ++p;
         CHECK(p != end) << "Bad ImageList format";
         label_.push_back(static_cast<real_t>(atof(p)));
       }
@@ -74,23 +74,21 @@ class ImageLabelMap {
       idx2label_[image_index_[i]] = dmlc::BeginPtr(label_) + i * label_width;
     }
     if (!silent) {
-      LOG(INFO) << "Loaded ImageList from " << path_imglist << ' '
-                << image_index_.size() << " Image records";
+      LOG(INFO) << "Loaded ImageList from " << path_imglist << ' ' << image_index_.size()
+                << " Image records";
     }
   }
   /*! \brief find a label for corresponding index */
   inline mshadow::Tensor<cpu, 1> Find(size_t imid) const {
-    std::unordered_map<size_t, real_t*>::const_iterator it
-        = idx2label_.find(imid);
+    std::unordered_map<size_t, real_t*>::const_iterator it = idx2label_.find(imid);
     CHECK(it != idx2label_.end()) << "fail to find imagelabel for id " << imid;
     return mshadow::Tensor<cpu, 1>(it->second, mshadow::Shape1(label_width));
   }
   /*! \brief find a label for corresponding index, return vector as copy */
   inline std::vector<float> FindCopy(size_t imid) const {
-    std::unordered_map<size_t, real_t*>::const_iterator it
-        = idx2label_.find(imid);
+    std::unordered_map<size_t, real_t*>::const_iterator it = idx2label_.find(imid);
     CHECK(it != idx2label_.end()) << "fail to find imagelabel for id " << imid;
-    const real_t *ptr = it->second;
+    const real_t* ptr = it->second;
     return std::vector<float>(ptr, ptr + label_width);
   }
 
@@ -138,43 +136,57 @@ struct ImageRecParserParam : public dmlc::Parameter<ImageRecParserParam> {
 
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageRecParserParam) {
-    DMLC_DECLARE_FIELD(path_imglist).set_default("")
-        .describe("Path to the image list (.lst) file. Generally created with tools/im2rec.py. "\
-                  "Format (Tab separated): "\
-                  "<index of record>\t<one or more labels>\t<relative path from root folder>.");
-    DMLC_DECLARE_FIELD(path_imgrec).set_default("")
-        .describe("Path to the image RecordIO (.rec) file or a directory path. "\
-                  "Created with tools/im2rec.py.");
-    DMLC_DECLARE_FIELD(path_imgidx).set_default("")
-        .describe("Path to the image RecordIO index (.idx) file. "\
-                  "Created with tools/im2rec.py.");
-    DMLC_DECLARE_FIELD(aug_seq).set_default("aug_default")
-        .describe("The augmenter names to represent"\
-                  " sequence of augmenters to be applied, seperated by comma." \
-                  " Additional keyword parameters will be seen by these augmenters.");
-    DMLC_DECLARE_FIELD(label_width).set_lower_bound(1).set_default(1)
+    DMLC_DECLARE_FIELD(path_imglist)
+        .set_default("")
+        .describe(
+            "Path to the image list (.lst) file. Generally created with tools/im2rec.py. "
+            "Format (Tab separated): "
+            "<index of record>\t<one or more labels>\t<relative path from root folder>.");
+    DMLC_DECLARE_FIELD(path_imgrec)
+        .set_default("")
+        .describe(
+            "Path to the image RecordIO (.rec) file or a directory path. "
+            "Created with tools/im2rec.py.");
+    DMLC_DECLARE_FIELD(path_imgidx)
+        .set_default("")
+        .describe(
+            "Path to the image RecordIO index (.idx) file. "
+            "Created with tools/im2rec.py.");
+    DMLC_DECLARE_FIELD(aug_seq)
+        .set_default("aug_default")
+        .describe(
+            "The augmenter names to represent"
+            " sequence of augmenters to be applied, seperated by comma."
+            " Additional keyword parameters will be seen by these augmenters.");
+    DMLC_DECLARE_FIELD(label_width)
+        .set_lower_bound(1)
+        .set_default(1)
         .describe("The number of labels per image.");
     DMLC_DECLARE_FIELD(data_shape)
-        .set_expect_ndim(3).enforce_nonzero()
+        .set_expect_ndim(3)
+        .enforce_nonzero()
         .describe("The shape of one output image in (channels, height, width) format.");
-    DMLC_DECLARE_FIELD(preprocess_threads).set_lower_bound(1).set_default(4)
+    DMLC_DECLARE_FIELD(preprocess_threads)
+        .set_lower_bound(1)
+        .set_default(4)
         .describe("The number of threads to do preprocessing.");
-    DMLC_DECLARE_FIELD(verbose).set_default(true)
-        .describe("If or not output verbose information.");
-    DMLC_DECLARE_FIELD(num_parts).set_default(1)
-        .describe("Virtually partition the data into these many parts.");
-    DMLC_DECLARE_FIELD(part_index).set_default(0)
+    DMLC_DECLARE_FIELD(verbose).set_default(true).describe("If or not output verbose information.");
+    DMLC_DECLARE_FIELD(num_parts).set_default(1).describe(
+        "Virtually partition the data into these many parts.");
+    DMLC_DECLARE_FIELD(part_index)
+        .set_default(0)
         .describe("The *i*-th virtual partition to be read.");
-    DMLC_DECLARE_FIELD(device_id).set_default(0)
-        .describe("The device id used to create context for internal NDArray. "\
-                  "Setting device_id to -1 will create Context::CPU(0). Setting "
-                  "device_id to valid positive device id will create "
-                  "Context::CPUPinned(device_id). Default is 0.");
-    DMLC_DECLARE_FIELD(shuffle_chunk_size).set_default(0)
+    DMLC_DECLARE_FIELD(device_id).set_default(0).describe(
+        "The device id used to create context for internal NDArray. "
+        "Setting device_id to -1 will create Context::CPU(0). Setting "
+        "device_id to valid positive device id will create "
+        "Context::CPUPinned(device_id). Default is 0.");
+    DMLC_DECLARE_FIELD(shuffle_chunk_size)
+        .set_default(0)
         .describe("The data shuffle buffer size in MB. Only valid if shuffle is true.");
-    DMLC_DECLARE_FIELD(shuffle_chunk_seed).set_default(0)
-        .describe("The random seed for shuffling");
-    DMLC_DECLARE_FIELD(seed_aug).set_default(dmlc::optional<int>())
+    DMLC_DECLARE_FIELD(shuffle_chunk_seed).set_default(0).describe("The random seed for shuffling");
+    DMLC_DECLARE_FIELD(seed_aug)
+        .set_default(dmlc::optional<int>())
         .describe("Random seed for augmentations.");
   }
 };
@@ -187,9 +199,9 @@ struct BatchParam : public dmlc::Parameter<BatchParam> {
   bool round_batch;
   // declare parameters
   DMLC_DECLARE_PARAMETER(BatchParam) {
-    DMLC_DECLARE_FIELD(batch_size)
-        .describe("Batch size.");
-    DMLC_DECLARE_FIELD(round_batch).set_default(true)
+    DMLC_DECLARE_FIELD(batch_size).describe("Batch size.");
+    DMLC_DECLARE_FIELD(round_batch)
+        .set_default(true)
         .describe("Whether to use round robin to handle overflow batch or not.");
   }
 };
@@ -211,26 +223,27 @@ struct BatchSamplerParam : public dmlc::Parameter<BatchSamplerParam> {
   int last_batch;
   // declare parameters
   DMLC_DECLARE_PARAMETER(BatchSamplerParam) {
-    DMLC_DECLARE_FIELD(batch_size)
-        .describe("Batch size.");
-    DMLC_DECLARE_FIELD(last_batch).set_default(kKeep)
+    DMLC_DECLARE_FIELD(batch_size).describe("Batch size.");
+    DMLC_DECLARE_FIELD(last_batch)
+        .set_default(kKeep)
         .add_enum("keep", kKeep)
         .add_enum("rollover", kRollOver)
         .add_enum("discard", kDiscard)
-        .describe("Specifies how the last batch is handled if batch_size does not evenly "
-                  "divide sequence length. "
-                  "If 'keep', the last batch will be returned directly, but will contain "
-                  "less element than `batch_size` requires. "
-                  "If 'discard', the last batch will be discarded. "
-                  "If 'rollover', the remaining elements will be rolled over to the next "
-                  "iteration. Note: legacy batch param with round_batch will always round data "
-                  "in order to always provide full batchs. Rollover behavior will instead result "
-                  "in different iteration sizes for each epoch.");
+        .describe(
+            "Specifies how the last batch is handled if batch_size does not evenly "
+            "divide sequence length. "
+            "If 'keep', the last batch will be returned directly, but will contain "
+            "less element than `batch_size` requires. "
+            "If 'discard', the last batch will be discarded. "
+            "If 'rollover', the remaining elements will be rolled over to the next "
+            "iteration. Note: legacy batch param with round_batch will always round data "
+            "in order to always provide full batchs. Rollover behavior will instead result "
+            "in different iteration sizes for each epoch.");
   }
 };
 
 // Define image record parameters
-struct ImageRecordParam: public dmlc::Parameter<ImageRecordParam> {
+struct ImageRecordParam : public dmlc::Parameter<ImageRecordParam> {
   /*! \brief whether to do shuffle */
   bool shuffle;
   /*! \brief random seed */
@@ -239,17 +252,16 @@ struct ImageRecordParam: public dmlc::Parameter<ImageRecordParam> {
   bool verbose;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageRecordParam) {
-    DMLC_DECLARE_FIELD(shuffle).set_default(false)
-        .describe("Whether to shuffle data randomly or not.");
-    DMLC_DECLARE_FIELD(seed).set_default(0)
-        .describe("The random seed.");
-    DMLC_DECLARE_FIELD(verbose).set_default(true)
-        .describe("Whether to output verbose information or not.");
+    DMLC_DECLARE_FIELD(shuffle).set_default(false).describe(
+        "Whether to shuffle data randomly or not.");
+    DMLC_DECLARE_FIELD(seed).set_default(0).describe("The random seed.");
+    DMLC_DECLARE_FIELD(verbose).set_default(true).describe(
+        "Whether to output verbose information or not.");
   }
 };
 
 // normalize parameters
-struct ImageNormalizeParam :  public dmlc::Parameter<ImageNormalizeParam> {
+struct ImageNormalizeParam : public dmlc::Parameter<ImageNormalizeParam> {
   /*! \brief random seed */
   int seed;
   /*! \brief whether to mirror the image */
@@ -284,48 +296,50 @@ struct ImageNormalizeParam :  public dmlc::Parameter<ImageNormalizeParam> {
   bool verbose;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageNormalizeParam) {
-    DMLC_DECLARE_FIELD(seed).set_default(0)
-        .describe("The random seed.");
-    DMLC_DECLARE_FIELD(mirror).set_default(false)
-        .describe("Whether to mirror the image or not. If true, images are "\
-                  "flipped along the horizontal axis.");
-    DMLC_DECLARE_FIELD(rand_mirror).set_default(false)
-        .describe("Whether to randomly mirror images or not. If true, 50% of "\
-                  "the images will be randomly mirrored (flipped along the "\
-                  "horizontal axis)");
-    DMLC_DECLARE_FIELD(mean_img).set_default("")
-        .describe("Filename of the mean image.");
-    DMLC_DECLARE_FIELD(mean_r).set_default(0.0f)
-        .describe("The mean value to be subtracted on the R channel");
-    DMLC_DECLARE_FIELD(mean_g).set_default(0.0f)
-        .describe("The mean value to be subtracted on the G channel");
-    DMLC_DECLARE_FIELD(mean_b).set_default(0.0f)
-        .describe("The mean value to be subtracted on the B channel");
-    DMLC_DECLARE_FIELD(mean_a).set_default(0.0f)
-        .describe("The mean value to be subtracted on the alpha channel");
-    DMLC_DECLARE_FIELD(std_r).set_default(1.0f)
-        .describe("Augmentation Param: Standard deviation on R channel.");
-    DMLC_DECLARE_FIELD(std_g).set_default(1.0f)
-        .describe("Augmentation Param: Standard deviation on G channel.");
-    DMLC_DECLARE_FIELD(std_b).set_default(1.0f)
-        .describe("Augmentation Param: Standard deviation on B channel.");
-    DMLC_DECLARE_FIELD(std_a).set_default(1.0f)
-        .describe("Augmentation Param: Standard deviation on Alpha channel.");
-    DMLC_DECLARE_FIELD(scale).set_default(1.0f)
-        .describe("Multiply the image with a scale value.");
-    DMLC_DECLARE_FIELD(max_random_contrast).set_default(0.0f)
-        .describe("Change the contrast with a value randomly chosen from "
-                  "``[-max_random_contrast, max_random_contrast]``");
-    DMLC_DECLARE_FIELD(max_random_illumination).set_default(0.0f)
-        .describe("Change the illumination with a value randomly chosen from "
-                  "``[-max_random_illumination, max_random_illumination]``");
-    DMLC_DECLARE_FIELD(verbose).set_default(true)
-        .describe("If or not output verbose information.");
+    DMLC_DECLARE_FIELD(seed).set_default(0).describe("The random seed.");
+    DMLC_DECLARE_FIELD(mirror).set_default(false).describe(
+        "Whether to mirror the image or not. If true, images are "
+        "flipped along the horizontal axis.");
+    DMLC_DECLARE_FIELD(rand_mirror)
+        .set_default(false)
+        .describe(
+            "Whether to randomly mirror images or not. If true, 50% of "
+            "the images will be randomly mirrored (flipped along the "
+            "horizontal axis)");
+    DMLC_DECLARE_FIELD(mean_img).set_default("").describe("Filename of the mean image.");
+    DMLC_DECLARE_FIELD(mean_r).set_default(0.0f).describe(
+        "The mean value to be subtracted on the R channel");
+    DMLC_DECLARE_FIELD(mean_g).set_default(0.0f).describe(
+        "The mean value to be subtracted on the G channel");
+    DMLC_DECLARE_FIELD(mean_b).set_default(0.0f).describe(
+        "The mean value to be subtracted on the B channel");
+    DMLC_DECLARE_FIELD(mean_a).set_default(0.0f).describe(
+        "The mean value to be subtracted on the alpha channel");
+    DMLC_DECLARE_FIELD(std_r).set_default(1.0f).describe(
+        "Augmentation Param: Standard deviation on R channel.");
+    DMLC_DECLARE_FIELD(std_g).set_default(1.0f).describe(
+        "Augmentation Param: Standard deviation on G channel.");
+    DMLC_DECLARE_FIELD(std_b).set_default(1.0f).describe(
+        "Augmentation Param: Standard deviation on B channel.");
+    DMLC_DECLARE_FIELD(std_a).set_default(1.0f).describe(
+        "Augmentation Param: Standard deviation on Alpha channel.");
+    DMLC_DECLARE_FIELD(scale).set_default(1.0f).describe("Multiply the image with a scale value.");
+    DMLC_DECLARE_FIELD(max_random_contrast)
+        .set_default(0.0f)
+        .describe(
+            "Change the contrast with a value randomly chosen from "
+            "``[-max_random_contrast, max_random_contrast]``");
+    DMLC_DECLARE_FIELD(max_random_illumination)
+        .set_default(0.0f)
+        .describe(
+            "Change the illumination with a value randomly chosen from "
+            "``[-max_random_illumination, max_random_illumination]``");
+    DMLC_DECLARE_FIELD(verbose).set_default(true).describe("If or not output verbose information.");
   }
 };
 
 // normalize det parameters
-struct ImageDetNormalizeParam :  public dmlc::Parameter<ImageDetNormalizeParam> {
+struct ImageDetNormalizeParam : public dmlc::Parameter<ImageDetNormalizeParam> {
   /*! \brief random seed */
   int seed;
   /*! \brief mean file string */
@@ -352,36 +366,35 @@ struct ImageDetNormalizeParam :  public dmlc::Parameter<ImageDetNormalizeParam>
   bool verbose;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageDetNormalizeParam) {
-    DMLC_DECLARE_FIELD(seed).set_default(0)
-        .describe("Augmentation Param: Random Seed.");
-    DMLC_DECLARE_FIELD(mean_img).set_default("")
-        .describe("Augmentation Param: Mean Image to be subtracted.");
-    DMLC_DECLARE_FIELD(mean_r).set_default(0.0f)
-        .describe("Augmentation Param: Mean value on R channel.");
-    DMLC_DECLARE_FIELD(mean_g).set_default(0.0f)
-        .describe("Augmentation Param: Mean value on G channel.");
-    DMLC_DECLARE_FIELD(mean_b).set_default(0.0f)
-        .describe("Augmentation Param: Mean value on B channel.");
-    DMLC_DECLARE_FIELD(mean_a).set_default(0.0f)
-        .describe("Augmentation Param: Mean value on Alpha channel.");
-    DMLC_DECLARE_FIELD(std_r).set_default(0.0f)
-        .describe("Augmentation Param: Standard deviation on R channel.");
-    DMLC_DECLARE_FIELD(std_g).set_default(0.0f)
-        .describe("Augmentation Param: Standard deviation on G channel.");
-    DMLC_DECLARE_FIELD(std_b).set_default(0.0f)
-        .describe("Augmentation Param: Standard deviation on B channel.");
-    DMLC_DECLARE_FIELD(std_a).set_default(0.0f)
-        .describe("Augmentation Param: Standard deviation on Alpha channel.");
-    DMLC_DECLARE_FIELD(scale).set_default(1.0f)
-        .describe("Augmentation Param: Scale in color space.");
-    DMLC_DECLARE_FIELD(verbose).set_default(true)
-        .describe("Augmentation Param: Whether to print augmentor info.");
+    DMLC_DECLARE_FIELD(seed).set_default(0).describe("Augmentation Param: Random Seed.");
+    DMLC_DECLARE_FIELD(mean_img).set_default("").describe(
+        "Augmentation Param: Mean Image to be subtracted.");
+    DMLC_DECLARE_FIELD(mean_r).set_default(0.0f).describe(
+        "Augmentation Param: Mean value on R channel.");
+    DMLC_DECLARE_FIELD(mean_g).set_default(0.0f).describe(
+        "Augmentation Param: Mean value on G channel.");
+    DMLC_DECLARE_FIELD(mean_b).set_default(0.0f).describe(
+        "Augmentation Param: Mean value on B channel.");
+    DMLC_DECLARE_FIELD(mean_a).set_default(0.0f).describe(
+        "Augmentation Param: Mean value on Alpha channel.");
+    DMLC_DECLARE_FIELD(std_r).set_default(0.0f).describe(
+        "Augmentation Param: Standard deviation on R channel.");
+    DMLC_DECLARE_FIELD(std_g).set_default(0.0f).describe(
+        "Augmentation Param: Standard deviation on G channel.");
+    DMLC_DECLARE_FIELD(std_b).set_default(0.0f).describe(
+        "Augmentation Param: Standard deviation on B channel.");
+    DMLC_DECLARE_FIELD(std_a).set_default(0.0f).describe(
+        "Augmentation Param: Standard deviation on Alpha channel.");
+    DMLC_DECLARE_FIELD(scale).set_default(1.0f).describe(
+        "Augmentation Param: Scale in color space.");
+    DMLC_DECLARE_FIELD(verbose).set_default(true).describe(
+        "Augmentation Param: Whether to print augmentor info.");
   }
 };
 
 // Define prefetcher parameters
 struct PrefetcherParam : public dmlc::Parameter<PrefetcherParam> {
-  enum CtxType { kGPU = 0, kCPU, kCPUPinned, kCPUShared};
+  enum CtxType { kGPU = 0, kCPU, kCPUPinned, kCPUShared };
   /*! \brief number of prefetched batches */
   size_t prefetch_buffer;
 
@@ -393,30 +406,33 @@ struct PrefetcherParam : public dmlc::Parameter<PrefetcherParam> {
 
   // declare parameters
   DMLC_DECLARE_PARAMETER(PrefetcherParam) {
-    DMLC_DECLARE_FIELD(prefetch_buffer).set_default(4)
+    DMLC_DECLARE_FIELD(prefetch_buffer)
+        .set_default(4)
         .describe("Maximum number of batches to prefetch.");
-    DMLC_DECLARE_FIELD(ctx).set_default(kGPU)
+    DMLC_DECLARE_FIELD(ctx)
+        .set_default(kGPU)
         .add_enum("cpu", kCPU)
         .add_enum("gpu", kGPU)
         .add_enum("cpu_pinned", kCPUPinned)
-        .describe("Context data loader optimized for. "
-                  "Note that it only indicates the optimization strategy for devices, "
-                  "by no means the prefetcher will load data to GPUs. "
-                  "If ctx is 'cpu_pinned' and device_id is not -1, "
-                  "it will use cpu_pinned(device_id) as ctx");
-    DMLC_DECLARE_FIELD(device_id).set_default(-1)
-        .describe("The default device id for context. -1 indicate it's on default device");
+        .describe(
+            "Context data loader optimized for. "
+            "Note that it only indicates the optimization strategy for devices, "
+            "by no means the prefetcher will load data to GPUs. "
+            "If ctx is 'cpu_pinned' and device_id is not -1, "
+            "it will use cpu_pinned(device_id) as ctx");
+    DMLC_DECLARE_FIELD(device_id).set_default(-1).describe(
+        "The default device id for context. -1 indicate it's on default device");
     DMLC_DECLARE_FIELD(dtype)
-      .add_enum("float32", mshadow::kFloat32)
-      .add_enum("float64", mshadow::kFloat64)
-      .add_enum("float16", mshadow::kFloat16)
-      .add_enum("bfloat16", mshadow::kBfloat16)
-      .add_enum("int64", mshadow::kInt64)
-      .add_enum("int32", mshadow::kInt32)
-      .add_enum("uint8", mshadow::kUint8)
-      .add_enum("int8", mshadow::kInt8)
-      .set_default(dmlc::optional<int>())
-      .describe("Output data type. ``None`` means no change.");
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("bfloat16", mshadow::kBfloat16)
+        .add_enum("int64", mshadow::kInt64)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("uint8", mshadow::kUint8)
+        .add_enum("int8", mshadow::kInt8)
+        .set_default(dmlc::optional<int>())
+        .describe("Output data type. ``None`` means no change.");
   }
 };
 
diff --git a/src/io/image_recordio.h b/src/io/image_recordio.h
index 131bfda905f9..d2ee44779ea2 100644
--- a/src/io/image_recordio.h
+++ b/src/io/image_recordio.h
@@ -60,16 +60,15 @@ struct ImageRecordIO {
   /*! \brief header of image recordio */
   Header header;
   /*! \brief point to label */
-  float *label;
+  float* label;
   /*! \brief number of float labels */
   int num_label;
   /*! \brief pointer to data content */
-  uint8_t *content;
+  uint8_t* content;
   /*! \brief size of the content */
   size_t content_size;
   /*! \brief constructor */
-  ImageRecordIO(void)
-      : label(nullptr), num_label(0), content(nullptr), content_size(0) {
+  ImageRecordIO(void) : label(nullptr), num_label(0), content(nullptr), content_size(0) {
     memset(&header, 0, sizeof(header));
   }
   /*! \brief get image id from record */
@@ -81,26 +80,26 @@ struct ImageRecordIO {
    * \param buf the head of record
    * \param size the size of the entire record
    */
-  inline void Load(void *buf, size_t size) {
+  inline void Load(void* buf, size_t size) {
     CHECK(size >= sizeof(header));
     std::memcpy(&header, buf, sizeof(header));
-    content = reinterpret_cast<uint8_t*>(buf) + sizeof(header);
+    content      = reinterpret_cast<uint8_t*>(buf) + sizeof(header);
     content_size = size - sizeof(header);
     if (header.flag > 0) {
-      CHECK(content_size >= sizeof(float)*header.flag);
-      label = reinterpret_cast<float*>(content);
+      CHECK(content_size >= sizeof(float) * header.flag);
+      label     = reinterpret_cast<float*>(content);
       num_label = header.flag;
-      content = reinterpret_cast<uint8_t*>(label + header.flag);
-      content_size -= sizeof(float)*header.flag;
+      content   = reinterpret_cast<uint8_t*>(label + header.flag);
+      content_size -= sizeof(float) * header.flag;
     } else {
-      label = nullptr;
+      label     = nullptr;
       num_label = 0;
     }
   }
   /*!
    * \brief save the record header
    */
-  inline void SaveHeader(std::string *blob) const {
+  inline void SaveHeader(std::string* blob) const {
     blob->resize(sizeof(header));
     std::memcpy(dmlc::BeginPtr(*blob), &header, sizeof(header));
   }
diff --git a/src/io/inst_vector.h b/src/io/inst_vector.h
index 78630f3959f3..21d2fbed6a80 100644
--- a/src/io/inst_vector.h
+++ b/src/io/inst_vector.h
@@ -42,19 +42,19 @@ namespace io {
  *
  * data are stored in memory continuously
  */
-template<int dim, typename DType>
+template <int dim, typename DType>
 class TensorVector {
  public:
   TensorVector(void) {
     this->Clear();
   }
   /*! \brief get the buffer to the i-th tensor */
-  inline mshadow::Tensor<cpu, dim, DType>
-  operator[](size_t i) const {
+  inline mshadow::Tensor<cpu, dim, DType> operator[](size_t i) const {
     CHECK_LT(i + 1, offset_.size());
     CHECK_EQ(shape_[i].Size(), offset_[i + 1] - offset_[i]);
-    return mshadow::Tensor<cpu, dim, DType>
-        ((DType*)dmlc::BeginPtr(content_) + offset_[i], shape_[i]);  // NOLINT(*)
+    return mshadow::Tensor<cpu, dim, DType>(
+        (DType*)dmlc::BeginPtr(content_) + offset_[i],  // NOLINT(*)
+        shape_[i]);                                     // NOLINT(*)
   }
   inline mshadow::Tensor<cpu, dim, DType> Back() const {
     return (*this)[Size() - 1];
@@ -87,7 +87,7 @@ class TensorVector {
 /*!
  * \brief a list of (label, example) pairs, examples can have various shape
  */
-template<typename DType = real_t>
+template <typename DType = real_t>
 class InstVector {
  public:
   /*! \brief return the number of (label, example) pairs */
@@ -124,9 +124,7 @@ class InstVector {
    * \brief push a (label, example) pair
    * only reserved the space, while the data is not copied
    */
-  inline void Push(unsigned index,
-                   mshadow::Shape<3> dshape,
-                   mshadow::Shape<1> lshape) {
+  inline void Push(unsigned index, mshadow::Shape<3> dshape, mshadow::Shape<1> lshape) {
     index_.push_back(index);
     data_.Push(dshape);
     label_.Push(lshape);
@@ -157,11 +155,12 @@ class InstVector {
 struct TBlobBatch {
  public:
   /*! \brief unique id for instance, can be NULL, sometimes is useful */
-  unsigned *inst_index;
+  unsigned* inst_index;
   /*! \brief number of instance */
   mshadow::index_t batch_size;
   /*! \brief number of padding elements in this batch,
-       this is used to indicate the last elements in the batch are only padded up to match the batch, and should be discarded */
+       this is used to indicate the last elements in the batch are only padded up to match the
+     batch, and should be discarded */
   mshadow::index_t num_batch_padd;
   /*! \brief content of dense data */
   std::vector<TBlob> data;
@@ -169,8 +168,9 @@ struct TBlobBatch {
   std::string extra_data;
   /*! \brief constructor */
   TBlobBatch(void) {
-    inst_index = nullptr;
-    batch_size = 0; num_batch_padd = 0;
+    inst_index     = nullptr;
+    batch_size     = 0;
+    num_batch_padd = 0;
   }
   /*! \brief destructor */
   ~TBlobBatch() {
@@ -180,21 +180,20 @@ struct TBlobBatch {
 
 class TBlobContainer : public TBlob {
  public:
-  TBlobContainer(void)
-    : TBlob(), tensor_container_(nullptr) {}
+  TBlobContainer(void) : TBlob(), tensor_container_(nullptr) {}
   ~TBlobContainer() {
     if (tensor_container_) {
       release();
     }
   }
-  void resize(const mxnet::TShape &shape, int type_flag) {
+  void resize(const mxnet::TShape& shape, int type_flag) {
     if (tensor_container_) {
       CHECK_EQ(this->type_flag_, type_flag);
       this->shape_ = shape;
       resize();
     } else {
       this->type_flag_ = type_flag;
-      this->shape_ = shape;
+      this->shape_     = shape;
       create();
     }
   }
@@ -204,24 +203,22 @@ class TBlobContainer : public TBlob {
     CHECK(tensor_container_ == nullptr);
     CHECK_EQ(this->dev_mask(), mshadow::cpu::kDevMask);
     MSHADOW_TYPE_SWITCH(this->type_flag_, DType, {
-        auto tensor_container = new mshadow::TensorContainer<mshadow::cpu, 1, DType>(false);
-        tensor_container->Resize(mshadow::Shape1(shape_.Size()));
-        dptr_ = tensor_container->dptr_;
-        tensor_container_ = tensor_container;
+      auto tensor_container = new mshadow::TensorContainer<mshadow::cpu, 1, DType>(false);
+      tensor_container->Resize(mshadow::Shape1(shape_.Size()));
+      dptr_             = tensor_container->dptr_;
+      tensor_container_ = tensor_container;
     });
   }
   void resize() {
     MSHADOW_TYPE_SWITCH(this->type_flag_, DType, {
-        auto tensor_container =
-          (mshadow::TensorContainer<mshadow::cpu, 1, DType>*) tensor_container_;
-        tensor_container->Resize(mshadow::Shape1(shape_.Size()));
+      auto tensor_container = (mshadow::TensorContainer<mshadow::cpu, 1, DType>*)tensor_container_;
+      tensor_container->Resize(mshadow::Shape1(shape_.Size()));
     });
   }
   void release() {
     MSHADOW_TYPE_SWITCH(this->type_flag_, DType, {
-        auto tensor_container =
-          (mshadow::TensorContainer<mshadow::cpu, 1, DType>*) tensor_container_;
-        delete tensor_container;
+      auto tensor_container = (mshadow::TensorContainer<mshadow::cpu, 1, DType>*)tensor_container_;
+      delete tensor_container;
     });
   }
 
diff --git a/src/io/iter_batchloader.h b/src/io/iter_batchloader.h
index 7532033fefdd..00b0642cbfe1 100644
--- a/src/io/iter_batchloader.h
+++ b/src/io/iter_batchloader.h
@@ -41,9 +41,7 @@ namespace io {
 /*! \brief create a batch iterator from single instance iterator */
 class BatchLoader : public IIterator<TBlobBatch> {
  public:
-  explicit BatchLoader(IIterator<DataInst> *base):
-    head_(1), num_overflow_(0), base_(base) {
-  }
+  explicit BatchLoader(IIterator<DataInst>* base) : head_(1), num_overflow_(0), base_(base) {}
 
   virtual ~BatchLoader(void) {
     delete base_;
@@ -73,15 +71,16 @@ class BatchLoader : public IIterator<TBlobBatch> {
 
   virtual bool Next(void) {
     out_.num_batch_padd = 0;
-    out_.batch_size = param_.batch_size;
-    this->head_ = 0;
+    out_.batch_size     = param_.batch_size;
+    this->head_         = 0;
 
     // if overflow from previous round, directly return false, until before first is called
-    if (num_overflow_ != 0) return false;
+    if (num_overflow_ != 0)
+      return false;
     size_t top = 0;
 
     while (base_->Next()) {
-      const DataInst& d = base_->Value();
+      const DataInst& d    = base_->Value();
       out_.inst_index[top] = d.index;
       if (data_.size() == 0) {
         this->InitData(d);
@@ -89,11 +88,10 @@ class BatchLoader : public IIterator<TBlobBatch> {
       for (size_t i = 0; i < d.data.size(); ++i) {
         CHECK_EQ(unit_size_[i], d.data[i].Size());
         MSHADOW_TYPE_SWITCH(data_[i].type_flag_, DType, {
-            mshadow::Copy(
-              data_[i].get<cpu, 1, DType>().Slice(top * unit_size_[i],
-                                                  (top + 1) * unit_size_[i]),
+          mshadow::Copy(
+              data_[i].get<cpu, 1, DType>().Slice(top * unit_size_[i], (top + 1) * unit_size_[i]),
               d.data[i].get_with_shape<cpu, 1, DType>(mshadow::Shape1(unit_size_[i])));
-          });
+        });
       }
       if (++top >= param_.batch_size) {
         return true;
@@ -105,17 +103,17 @@ class BatchLoader : public IIterator<TBlobBatch> {
         base_->BeforeFirst();
         for (; top < param_.batch_size; ++top, ++num_overflow_) {
           CHECK(base_->Next()) << "number of input must be bigger than batch size";
-          const DataInst& d = base_->Value();
+          const DataInst& d    = base_->Value();
           out_.inst_index[top] = d.index;
           // copy data
           for (size_t i = 0; i < d.data.size(); ++i) {
             CHECK_EQ(unit_size_[i], d.data[i].Size());
             MSHADOW_TYPE_SWITCH(data_[i].type_flag_, DType, {
-                mshadow::Copy(
+              mshadow::Copy(
                   data_[i].get<cpu, 1, DType>().Slice(top * unit_size_[i],
                                                       (top + 1) * unit_size_[i]),
                   d.data[i].get_with_shape<cpu, 1, DType>(mshadow::Shape1(unit_size_[i])));
-              });
+            });
           }
         }
         out_.num_batch_padd = num_overflow_;
@@ -126,7 +124,7 @@ class BatchLoader : public IIterator<TBlobBatch> {
     }
     return false;
   }
-  virtual const TBlobBatch &Value(void) const {
+  virtual const TBlobBatch& Value(void) const {
     return out_;
   }
 
@@ -144,7 +142,7 @@ class BatchLoader : public IIterator<TBlobBatch> {
 
  private:
   /*! \brief base iterator */
-  IIterator<DataInst> *base_;
+  IIterator<DataInst>* base_;
   /*! \brief data shape */
   mxnet::ShapeVector shape_;
   /*! \brief unit size */
@@ -156,7 +154,7 @@ class BatchLoader : public IIterator<TBlobBatch> {
     unit_size_.resize(first_batch.data.size());
     for (size_t i = 0; i < first_batch.data.size(); ++i) {
       mxnet::TShape src_shape = first_batch.data[i].shape_;
-      int src_type_flag = first_batch.data[i].type_flag_;
+      int src_type_flag       = first_batch.data[i].type_flag_;
       // init object attributes
       std::vector<index_t> shape_vec;
       shape_vec.push_back(param_.batch_size);
@@ -177,9 +175,7 @@ class BatchLoader : public IIterator<TBlobBatch> {
  */
 class BatchSampler : public IIterator<DataBatch> {
  public:
-  explicit BatchSampler(IIterator<DataInst> *base):
-    num_overflow_(0), base_(base) {
-  }
+  explicit BatchSampler(IIterator<DataInst>* base) : num_overflow_(0), base_(base) {}
 
   virtual ~BatchSampler(void) {
     delete base_;
@@ -214,7 +210,7 @@ class BatchSampler : public IIterator<DataBatch> {
       return (base_hint + num_overflow_) / param_.batch_size;
     } else {
       LOG(FATAL) << "last_batch must be one of 'keep', 'discard', or 'rollover'"
-        << " but got: " << param_.last_batch;
+                 << " but got: " << param_.last_batch;
     }
     return -1;
   }
@@ -233,11 +229,10 @@ class BatchSampler : public IIterator<DataBatch> {
       for (size_t i = 0; i < d.data.size(); ++i) {
         CHECK_EQ(unit_size_[i], d.data[i].Size());
         MSHADOW_TYPE_SWITCH(data_[i].type_flag_, DType, {
-            mshadow::Copy(
-              data_[i].get<cpu, 1, DType>().Slice(top * unit_size_[i],
-                                                  (top + 1) * unit_size_[i]),
+          mshadow::Copy(
+              data_[i].get<cpu, 1, DType>().Slice(top * unit_size_[i], (top + 1) * unit_size_[i]),
               d.data[i].get_with_shape<cpu, 1, DType>(mshadow::Shape1(unit_size_[i])));
-          });
+        });
       }
       if (++top >= param_.batch_size) {
         num_overflow_ = 0;
@@ -251,7 +246,7 @@ class BatchSampler : public IIterator<DataBatch> {
         return false;
       } else if (param_.last_batch == param_.kKeep) {
         out_.num_batch_padd = param_.batch_size - top;
-        num_overflow_ = 0;
+        num_overflow_       = 0;
         return true;
       } else if (param_.last_batch == param_.kRollOver) {
         if (num_overflow_ > 0) {
@@ -268,7 +263,7 @@ class BatchSampler : public IIterator<DataBatch> {
     }
     return false;
   }
-  virtual const DataBatch &Value(void) const {
+  virtual const DataBatch& Value(void) const {
     return out_;
   }
 
@@ -284,7 +279,7 @@ class BatchSampler : public IIterator<DataBatch> {
 
  private:
   /*! \brief base iterator */
-  IIterator<DataInst> *base_;
+  IIterator<DataInst>* base_;
   /*! \brief data shape */
   mxnet::ShapeVector shape_;
   /*! \brief unit size */
@@ -296,7 +291,7 @@ class BatchSampler : public IIterator<DataBatch> {
     unit_size_.resize(first_batch.data.size());
     for (size_t i = 0; i < first_batch.data.size(); ++i) {
       mxnet::TShape src_shape = first_batch.data[i].shape_;
-      int src_type_flag = first_batch.data[i].type_flag_;
+      int src_type_flag       = first_batch.data[i].type_flag_;
       // init object attributes
       std::vector<index_t> shape_vec;
       shape_vec.push_back(param_.batch_size);
@@ -307,8 +302,8 @@ class BatchSampler : public IIterator<DataBatch> {
       shape_[i] = dst_shape;
       data_[i].resize(mshadow::Shape1(dst_shape.Size()), src_type_flag);
       unit_size_[i] = src_shape.Size();
-      out_.data.push_back(NDArray(TBlob(
-        data_[i].dptr_, dst_shape, cpu::kDevMask, src_type_flag, 0), 0));
+      out_.data.push_back(
+          NDArray(TBlob(data_[i].dptr_, dst_shape, cpu::kDevMask, src_type_flag, 0), 0));
     }
   }
 };  // class BatchSampler
diff --git a/src/io/iter_csv.cc b/src/io/iter_csv.cc
index 87f295df544f..43560ffafc0c 100644
--- a/src/io/iter_csv.cc
+++ b/src/io/iter_csv.cc
@@ -44,20 +44,19 @@ struct CSVIterParam : public dmlc::Parameter<CSVIterParam> {
   mxnet::TShape label_shape;
   // declare parameters
   DMLC_DECLARE_PARAMETER(CSVIterParam) {
-    DMLC_DECLARE_FIELD(data_csv)
-        .describe("The input CSV file or a directory path.");
-    DMLC_DECLARE_FIELD(data_shape)
-        .describe("The shape of one example.");
-    DMLC_DECLARE_FIELD(label_csv).set_default("NULL")
-        .describe("The input CSV file or a directory path. "
-                  "If NULL, all labels will be returned as 0.");
+    DMLC_DECLARE_FIELD(data_csv).describe("The input CSV file or a directory path.");
+    DMLC_DECLARE_FIELD(data_shape).describe("The shape of one example.");
+    DMLC_DECLARE_FIELD(label_csv).set_default("NULL").describe(
+        "The input CSV file or a directory path. "
+        "If NULL, all labels will be returned as 0.");
     index_t shape1[] = {1};
-    DMLC_DECLARE_FIELD(label_shape).set_default(mxnet::TShape(shape1, shape1 + 1))
+    DMLC_DECLARE_FIELD(label_shape)
+        .set_default(mxnet::TShape(shape1, shape1 + 1))
         .describe("The shape of one label.");
   }
 };
 
-class CSVIterBase: public IIterator<DataInst> {
+class CSVIterBase : public IIterator<DataInst> {
  public:
   CSVIterBase() {
     out_.data.resize(2);
@@ -71,7 +70,7 @@ class CSVIterBase: public IIterator<DataInst> {
   /*! \brief move to next item */
   bool Next() override = 0;
   /*! \brief get current data */
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return out_;
   }
 
@@ -91,7 +90,7 @@ class CSVIterBase: public IIterator<DataInst> {
 };
 
 template <typename DType>
-class CSVIterTyped: public CSVIterBase {
+class CSVIterTyped : public CSVIterBase {
  public:
   ~CSVIterTyped() override = default;
   // intialize iterator loads data in
@@ -100,7 +99,7 @@ class CSVIterTyped: public CSVIterBase {
     data_parser_.reset(dmlc::Parser<uint32_t, DType>::Create(param_.data_csv.c_str(), 0, 1, "csv"));
     if (param_.label_csv != "NULL") {
       label_parser_.reset(
-        dmlc::Parser<uint32_t, DType>::Create(param_.label_csv.c_str(), 0, 1, "csv"));
+          dmlc::Parser<uint32_t, DType>::Create(param_.label_csv.c_str(), 0, 1, "csv"));
     } else {
       dummy_label.set_pad(false);
       dummy_label.Resize(mshadow::Shape1(1));
@@ -115,17 +114,19 @@ class CSVIterTyped: public CSVIterBase {
     }
     data_ptr_ = label_ptr_ = 0;
     data_size_ = label_size_ = 0;
-    inst_counter_ = 0;
-    end_ = false;
+    inst_counter_            = 0;
+    end_                     = false;
   }
 
   bool Next() override {
-    if (end_) return false;
+    if (end_)
+      return false;
     while (data_ptr_ >= data_size_) {
       if (!data_parser_->Next()) {
-        end_ = true; return false;
+        end_ = true;
+        return false;
       }
-      data_ptr_ = 0;
+      data_ptr_  = 0;
       data_size_ = data_parser_->Value().size;
     }
     out_.index = inst_counter_++;
@@ -136,7 +137,7 @@ class CSVIterTyped: public CSVIterBase {
       while (label_ptr_ >= label_size_) {
         CHECK(label_parser_->Next())
             << "Data CSV's row is smaller than the number of rows in label_csv";
-        label_ptr_ = 0;
+        label_ptr_  = 0;
         label_size_ = label_parser_->Value().size;
       }
       CHECK_LT(label_ptr_, label_size_);
@@ -161,16 +162,16 @@ class CSVIterTyped: public CSVIterBase {
   std::unique_ptr<dmlc::Parser<uint32_t, DType> > data_parser_;
 };
 
-class CSVIter: public IIterator<DataInst> {
+class CSVIter : public IIterator<DataInst> {
  public:
-  CSVIter() = default;
+  CSVIter()           = default;
   ~CSVIter() override = default;
 
   // intialize iterator loads data in
   void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.InitAllowUnknown(kwargs);
     bool dtype_has_value = false;
-    int target_dtype = -1;
+    int target_dtype     = -1;
     for (const auto& arg : kwargs) {
       if (arg.first == "dtype") {
         dtype_has_value = true;
@@ -203,7 +204,7 @@ class CSVIter: public IIterator<DataInst> {
     return iterator_->Next();
   }
 
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return iterator_->Value();
   }
 
@@ -212,11 +213,10 @@ class CSVIter: public IIterator<DataInst> {
   std::unique_ptr<CSVIterBase> iterator_;
 };
 
-
 DMLC_REGISTER_PARAMETER(CSVIterParam);
 
 MXNET_REGISTER_IO_ITER(CSVIter)
-.describe(R"code(Returns the CSV file iterator.
+    .describe(R"code(Returns the CSV file iterator.
 
 In this function, the `data_shape` parameter is used to set the shape of each line of the input data.
 If a row in an input file is `1,2,3,4,5,6`` and `data_shape` is (3,2), that row
@@ -306,14 +306,10 @@ Examples::
   [3  4  5]]
 
 )code" ADD_FILELINE)
-.add_arguments(CSVIterParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.set_body([]() {
-    return new PrefetcherIter(
-        new BatchLoader(
-            new CSVIter()));
-  });
+    .add_arguments(CSVIterParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .set_body([]() { return new PrefetcherIter(new BatchLoader(new CSVIter())); });
 
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_image_det_recordio.cc b/src/io/iter_image_det_recordio.cc
index 3fe0ec7f3e17..a6705cc09631 100644
--- a/src/io/iter_image_det_recordio.cc
+++ b/src/io/iter_image_det_recordio.cc
@@ -56,69 +56,75 @@ class ImageDetLabelMap {
    * \param path_imglist path to the image list
    * \param label_width predefined label_width, -1 for arbitrary width
    */
-  explicit ImageDetLabelMap(const char *path_imglist,
-                            int label_width,
-                            bool silent) {
+  explicit ImageDetLabelMap(const char* path_imglist, int label_width, bool silent) {
     image_index_.clear();
     label_.clear();
     idx2label_.clear();
-    dmlc::InputSplit *fi = dmlc::InputSplit::Create
-        (path_imglist, 0, 1, "text");
+    dmlc::InputSplit* fi = dmlc::InputSplit::Create(path_imglist, 0, 1, "text");
     dmlc::InputSplit::Blob rec;
     while (fi->NextRecord(&rec)) {
       // quick manual parsing
-      char *p = reinterpret_cast<char*>(rec.dptr);
-      char *end = p + rec.size;
+      char* p   = reinterpret_cast<char*>(rec.dptr);
+      char* end = p + rec.size;
       // skip space
-      while (isspace(*p) && p != end) ++p;
+      while (isspace(*p) && p != end)
+        ++p;
       image_index_.push_back(static_cast<size_t>(atol(p)));
       size_t start_pos = label_.size();
       if (label_width > 0) {
         // provided label_width > 0, require width check
         for (int i = 0; i < label_width; ++i) {
           // skip till space
-          while (!isspace(*p) && p != end) ++p;
+          while (!isspace(*p) && p != end)
+            ++p;
           // skip space
-          while (isspace(*p) && p != end) ++p;
+          while (isspace(*p) && p != end)
+            ++p;
           CHECK(p != end) << "Bad ImageList format";
           label_.push_back(static_cast<real_t>(atof(p)));
         }
         CHECK_EQ(label_.size() - start_pos, label_width);
       } else {
         // arbitrary label width for each sample
-        while (!isspace(*p) && p != end) ++p;
-        while (isspace(*p) && p != end) ++p;
-        char *curr = p;
+        while (!isspace(*p) && p != end)
+          ++p;
+        while (isspace(*p) && p != end)
+          ++p;
+        char* curr = p;
         CHECK(curr != end) << "Bad ImageList format";
-        while (!isspace(*p) && p != end) ++p;
-        while (isspace(*p) && p != end) ++p;
-        char *next = p;
+        while (!isspace(*p) && p != end)
+          ++p;
+        while (isspace(*p) && p != end)
+          ++p;
+        char* next = p;
         while (next != end) {
           label_.push_back(static_cast<real_t>(atof(curr)));
           curr = next;
-          while (!isspace(*next) && next != end) ++next;
-          while (isspace(*next) && next != end) ++next;
+          while (!isspace(*next) && next != end)
+            ++next;
+          while (isspace(*next) && next != end)
+            ++next;
         }
         // skip the last one which should be the image_path
         CHECK_GT(label_.size(), start_pos) << "Bad ImageList format: empty label";
       }
       // record label start_pos and width in map
-      idx2label_[image_index_.back()] = std::pair<size_t, size_t>(
-        start_pos, label_.size() - start_pos);
+      idx2label_[image_index_.back()] =
+          std::pair<size_t, size_t>(start_pos, label_.size() - start_pos);
     }
     delete fi;
     if (!silent) {
-      LOG(INFO) << "Loaded ImageList from " << path_imglist << ' '
-                << image_index_.size() << " Image records";
+      LOG(INFO) << "Loaded ImageList from " << path_imglist << ' ' << image_index_.size()
+                << " Image records";
     }
   }
 
   /*! \brief find a label for corresponding index, return vector as copy */
   inline std::vector<float> FindCopy(size_t imid) const {
-    std::unordered_map<size_t, std::pair<size_t, size_t> >::const_iterator it
-        = idx2label_.find(imid);
+    std::unordered_map<size_t, std::pair<size_t, size_t>>::const_iterator it =
+        idx2label_.find(imid);
     CHECK(it != idx2label_.end()) << "fail to find imagelabel for id " << imid;
-    const real_t *ptr = dmlc::BeginPtr(label_) + it->second.first;
+    const real_t* ptr = dmlc::BeginPtr(label_) + it->second.first;
     return std::vector<float>(ptr, ptr + it->second.second);
   }
 
@@ -127,7 +133,8 @@ class ImageDetLabelMap {
     size_t max_width = 0;
     for (auto i : idx2label_) {
       size_t width = i.second.second;
-      if (width > max_width) max_width = width;
+      if (width > max_width)
+        max_width = width;
     }
     return max_width;
   }
@@ -138,7 +145,7 @@ class ImageDetLabelMap {
   /*! \brief vectors storing raw labels in 1D */
   std::vector<real_t> label_;
   /*! \brief map storing image index to pair<label_start_pos, label_end_pos> */
-  std::unordered_map<size_t, std::pair<size_t, size_t> > idx2label_;
+  std::unordered_map<size_t, std::pair<size_t, size_t>> idx2label_;
 };  // class ImageDetLabelMap
 
 // Define image record parser parameters
@@ -172,46 +179,53 @@ struct ImageDetRecParserParam : public dmlc::Parameter<ImageDetRecParserParam> {
 
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageDetRecParserParam) {
-    DMLC_DECLARE_FIELD(path_imglist).set_default("")
-        .describe("Dataset Param: Path to image list.");
-    DMLC_DECLARE_FIELD(path_imgrec).set_default("./data/imgrec.rec")
+    DMLC_DECLARE_FIELD(path_imglist).set_default("").describe("Dataset Param: Path to image list.");
+    DMLC_DECLARE_FIELD(path_imgrec)
+        .set_default("./data/imgrec.rec")
         .describe("Dataset Param: Path to image record file.");
-    DMLC_DECLARE_FIELD(aug_seq).set_default("det_aug_default")
-        .describe("Augmentation Param: the augmenter names to represent"\
-                  " sequence of augmenters to be applied, seperated by comma." \
-                  " Additional keyword parameters will be seen by these augmenters."
-                  " Make sure you don't use normal augmenters for detection tasks.");
-    DMLC_DECLARE_FIELD(label_width).set_default(-1)
+    DMLC_DECLARE_FIELD(aug_seq)
+        .set_default("det_aug_default")
+        .describe(
+            "Augmentation Param: the augmenter names to represent"
+            " sequence of augmenters to be applied, seperated by comma."
+            " Additional keyword parameters will be seen by these augmenters."
+            " Make sure you don't use normal augmenters for detection tasks.");
+    DMLC_DECLARE_FIELD(label_width)
+        .set_default(-1)
         .describe("Dataset Param: How many labels for an image, -1 for variable label size.");
     DMLC_DECLARE_FIELD(data_shape)
-        .set_expect_ndim(3).enforce_nonzero()
+        .set_expect_ndim(3)
+        .enforce_nonzero()
         .describe("Dataset Param: Shape of each instance generated by the DataIter.");
-    DMLC_DECLARE_FIELD(preprocess_threads).set_lower_bound(1).set_default(4)
+    DMLC_DECLARE_FIELD(preprocess_threads)
+        .set_lower_bound(1)
+        .set_default(4)
         .describe("Backend Param: Number of thread to do preprocessing.");
-    DMLC_DECLARE_FIELD(verbose).set_default(true)
-        .describe("Auxiliary Param: Whether to output parser information.");
-    DMLC_DECLARE_FIELD(num_parts).set_default(1)
-        .describe("partition the data into multiple parts");
-    DMLC_DECLARE_FIELD(part_index).set_default(0)
-        .describe("the index of the part will read");
-    DMLC_DECLARE_FIELD(shuffle_chunk_size).set_default(0)
-        .describe("the size(MB) of the shuffle chunk, used with shuffle=True,"\
-                  " it can enable global shuffling");
-    DMLC_DECLARE_FIELD(shuffle_chunk_seed).set_default(0)
-        .describe("the seed for chunk shuffling");
-    DMLC_DECLARE_FIELD(label_pad_width).set_default(0)
+    DMLC_DECLARE_FIELD(verbose).set_default(true).describe(
+        "Auxiliary Param: Whether to output parser information.");
+    DMLC_DECLARE_FIELD(num_parts).set_default(1).describe("partition the data into multiple parts");
+    DMLC_DECLARE_FIELD(part_index).set_default(0).describe("the index of the part will read");
+    DMLC_DECLARE_FIELD(shuffle_chunk_size)
+        .set_default(0)
+        .describe(
+            "the size(MB) of the shuffle chunk, used with shuffle=True,"
+            " it can enable global shuffling");
+    DMLC_DECLARE_FIELD(shuffle_chunk_seed).set_default(0).describe("the seed for chunk shuffling");
+    DMLC_DECLARE_FIELD(label_pad_width)
+        .set_default(0)
         .describe("pad output label width if set larger than 0, -1 for auto estimate");
-    DMLC_DECLARE_FIELD(label_pad_value).set_default(-1.f)
+    DMLC_DECLARE_FIELD(label_pad_value)
+        .set_default(-1.f)
         .describe("label padding value if enabled");
   }
 };
 
 // parser to parse image recordio
-template<typename DType>
+template <typename DType>
 class ImageDetRecordIOParser {
  public:
   // initialize the parser
-  inline void Init(const std::vector<std::pair<std::string, std::string> >& kwargs);
+  inline void Init(const std::vector<std::pair<std::string, std::string>>& kwargs);
 
   // set record to the head
   inline void BeforeFirst() {
@@ -219,19 +233,19 @@ class ImageDetRecordIOParser {
   }
   // parse next set of records, return an array of
   // instance vector to the user
-  virtual inline bool ParseNext(std::vector<InstVector<DType>> *out);
+  virtual inline bool ParseNext(std::vector<InstVector<DType>>* out);
 
  protected:
   // magic number to see prng
   static const int kRandMagic = 233;
   /*! \brief parameters */
   ImageDetRecParserParam param_;
-  #if MXNET_USE_OPENCV
+#if MXNET_USE_OPENCV
   /*! \brief augmenters */
-  std::vector<std::vector<std::unique_ptr<ImageAugmenter> > > augmenters_;
-  #endif
+  std::vector<std::vector<std::unique_ptr<ImageAugmenter>>> augmenters_;
+#endif
   /*! \brief random samplers */
-  std::vector<std::unique_ptr<common::RANDOM_ENGINE> > prnds_;
+  std::vector<std::unique_ptr<common::RANDOM_ENGINE>> prnds_;
   /*! \brief data source */
   std::unique_ptr<dmlc::InputSplit> source_;
   /*! \brief label information, if any */
@@ -244,22 +258,20 @@ class ImageDetRecordIOParser {
 
 template <typename DType>
 inline void ImageDetRecordIOParser<DType>::Init(
-    const std::vector<std::pair<std::string, std::string> >& kwargs) {
+    const std::vector<std::pair<std::string, std::string>>& kwargs) {
 #if MXNET_USE_OPENCV
   // initialize parameter
   // init image rec param
   param_.InitAllowUnknown(kwargs);
   int maxthread, threadget;
-  #pragma omp parallel
+#pragma omp parallel
   {
     // be conservative, set number of real cores - 1
     maxthread = std::max(omp_get_num_procs() - 1, 1);
   }
   param_.preprocess_threads = std::min(maxthread, param_.preprocess_threads);
-  #pragma omp parallel num_threads(param_.preprocess_threads)
-  {
-    threadget = omp_get_num_threads();
-  }
+#pragma omp parallel num_threads(param_.preprocess_threads)
+  { threadget = omp_get_num_threads(); }
   param_.preprocess_threads = threadget;
 
   std::vector<std::string> aug_names = dmlc::Split(param_.aug_seq, ',');
@@ -274,20 +286,17 @@ inline void ImageDetRecordIOParser<DType>::Init(
     prnds_.emplace_back(new common::RANDOM_ENGINE((i + 1) * kRandMagic));
   }
   if (param_.path_imglist.length() != 0) {
-    label_map_ = std::make_unique<ImageDetLabelMap>(param_.path_imglist.c_str(),
-      param_.label_width, !param_.verbose);
+    label_map_ = std::make_unique<ImageDetLabelMap>(
+        param_.path_imglist.c_str(), param_.label_width, !param_.verbose);
   }
-  CHECK(param_.path_imgrec.length() != 0)
-      << "ImageDetRecordIOIterator: must specify image_rec";
+  CHECK(param_.path_imgrec.length() != 0) << "ImageDetRecordIOIterator: must specify image_rec";
 
   if (param_.verbose) {
-    LOG(INFO) << "ImageDetRecordIOParser: " << param_.path_imgrec
-              << ", use " << threadget << " threads for decoding..";
+    LOG(INFO) << "ImageDetRecordIOParser: " << param_.path_imgrec << ", use " << threadget
+              << " threads for decoding..";
   }
   source_.reset(dmlc::InputSplit::Create(
-      param_.path_imgrec.c_str(),
-      param_.part_index, param_.num_parts,
-      "recordio"));
+      param_.path_imgrec.c_str(), param_.part_index, param_.num_parts, "recordio"));
 
   // estimate padding width for labels
   int max_label_width = 0;
@@ -297,23 +306,23 @@ inline void ImageDetRecordIOParser<DType>::Init(
     // iterate through recordio
     dmlc::InputSplit::Blob chunk;
     while (source_->NextChunk(&chunk)) {
-      #pragma omp parallel num_threads(param_.preprocess_threads)
+#pragma omp parallel num_threads(param_.preprocess_threads)
       {
         omp_exc_.Run([&] {
           CHECK(omp_get_num_threads() == param_.preprocess_threads);
           int max_width = 0;
-          int tid = omp_get_thread_num();
-          dmlc::RecordIOChunkReader reader(chunk, tid,
-                                           param_.preprocess_threads);
+          int tid       = omp_get_thread_num();
+          dmlc::RecordIOChunkReader reader(chunk, tid, param_.preprocess_threads);
           ImageRecordIO rec;
           dmlc::InputSplit::Blob blob;
           while (reader.NextRecord(&blob)) {
             rec.Load(blob.dptr, blob.size);
             if (rec.label != nullptr) {
               if (param_.label_width > 0) {
-                CHECK_EQ(param_.label_width, rec.num_label)
-                  << "rec file provide " << rec.num_label << "-dimensional label "
-                     "but label_width is set to " << param_.label_width;
+                CHECK_EQ(param_.label_width, rec.num_label) << "rec file provide " << rec.num_label
+                                                            << "-dimensional label "
+                                                               "but label_width is set to "
+                                                            << param_.label_width;
               }
               // update max value
               max_width = std::max(max_width, rec.num_label);
@@ -321,10 +330,8 @@ inline void ImageDetRecordIOParser<DType>::Init(
               LOG(FATAL) << "Not enough label packed in img_list or rec file.";
             }
           }
-          #pragma omp critical
-          {
-            max_label_width = std::max(max_label_width, max_width);
-          }
+#pragma omp critical
+          { max_label_width = std::max(max_label_width, max_width); }
         });
       }
       omp_exc_.Rethrow();
@@ -332,8 +339,8 @@ inline void ImageDetRecordIOParser<DType>::Init(
   }
   if (max_label_width > param_.label_pad_width) {
     if (param_.label_pad_width > 0) {
-      LOG(FATAL) << "ImageDetRecordIOParser: label_pad_width: "
-                 << param_.label_pad_width << " smaller than estimated width: " << max_label_width;
+      LOG(FATAL) << "ImageDetRecordIOParser: label_pad_width: " << param_.label_pad_width
+                 << " smaller than estimated width: " << max_label_width;
     }
     param_.label_pad_width = max_label_width;
   }
@@ -343,9 +350,7 @@ inline void ImageDetRecordIOParser<DType>::Init(
   }
 
   source_.reset(dmlc::InputSplit::Create(
-      param_.path_imgrec.c_str(),
-      param_.part_index, param_.num_parts,
-      "recordio"));
+      param_.path_imgrec.c_str(), param_.part_index, param_.num_parts, "recordio"));
 
   if (param_.shuffle_chunk_size > 0) {
     if (param_.shuffle_chunk_size > 4096) {
@@ -359,14 +364,16 @@ inline void ImageDetRecordIOParser<DType>::Init(
                    "larger chunk size";
     }
     // 1.1 ratio is for a bit more shuffle parts to avoid boundary issue
-    unsigned num_shuffle_parts =
-        std::ceil(source_->GetTotalSize() * 1.1 /
-                  (param_.num_parts * (param_.shuffle_chunk_size << 20UL)));
+    unsigned num_shuffle_parts = std::ceil(
+        source_->GetTotalSize() * 1.1 / (param_.num_parts * (param_.shuffle_chunk_size << 20UL)));
 
     if (num_shuffle_parts > 1) {
-      source_.reset(dmlc::InputSplitShuffle::Create(
-          param_.path_imgrec.c_str(), param_.part_index,
-          param_.num_parts, "recordio", num_shuffle_parts, param_.shuffle_chunk_seed));
+      source_.reset(dmlc::InputSplitShuffle::Create(param_.path_imgrec.c_str(),
+                                                    param_.part_index,
+                                                    param_.num_parts,
+                                                    "recordio",
+                                                    num_shuffle_parts,
+                                                    param_.shuffle_chunk_seed));
     }
     source_->HintChunkSize(param_.shuffle_chunk_size << 17UL);
   } else {
@@ -378,16 +385,16 @@ inline void ImageDetRecordIOParser<DType>::Init(
 #endif
 }
 
-template<typename DType>
-inline bool ImageDetRecordIOParser<DType>::
-ParseNext(std::vector<InstVector<DType>> *out_vec) {
+template <typename DType>
+inline bool ImageDetRecordIOParser<DType>::ParseNext(std::vector<InstVector<DType>>* out_vec) {
   CHECK(source_ != nullptr);
   dmlc::InputSplit::Blob chunk;
-  if (!source_->NextChunk(&chunk)) return false;
+  if (!source_->NextChunk(&chunk))
+    return false;
 #if MXNET_USE_OPENCV
   // save opencv out
   out_vec->resize(param_.preprocess_threads);
-  #pragma omp parallel num_threads(param_.preprocess_threads)
+#pragma omp parallel num_threads(param_.preprocess_threads)
   {
     omp_exc_.Run([&] {
       CHECK(omp_get_num_threads() == param_.preprocess_threads);
@@ -396,7 +403,7 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
       ImageRecordIO rec;
       dmlc::InputSplit::Blob blob;
       // image data
-      InstVector<DType> &out = (*out_vec)[tid];
+      InstVector<DType>& out = (*out_vec)[tid];
       out.Clear();
       while (reader.NextRecord(&blob)) {
         // Opencv decode and augments
@@ -414,9 +421,8 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
             // -1 to keep the number of channel of the encoded image, and not
             // force gray or color.
             res = cv::imdecode(buf, -1);
-            CHECK_EQ(res.channels(), 4)
-                << "Invalid image with index " << rec.image_index()
-                << ". Expected 4 channels, got " << res.channels();
+            CHECK_EQ(res.channels(), 4) << "Invalid image with index " << rec.image_index()
+                                        << ". Expected 4 channels, got " << res.channels();
             break;
           default:
             LOG(FATAL) << "Invalid output shape " << param_.data_shape;
@@ -428,22 +434,20 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
           label_buf = label_map_->FindCopy(rec.image_index());
         } else if (rec.label != nullptr) {
           if (param_.label_width > 0) {
-            CHECK_EQ(param_.label_width, rec.num_label)
-                << "rec file provide " << rec.num_label
-                << "-dimensional label "
-                   "but label_width is set to "
-                << param_.label_width;
+            CHECK_EQ(param_.label_width, rec.num_label) << "rec file provide " << rec.num_label
+                                                        << "-dimensional label "
+                                                           "but label_width is set to "
+                                                        << param_.label_width;
           }
           label_buf.assign(rec.label, rec.label + rec.num_label);
         } else {
           LOG(FATAL) << "Not enough label packed in img_list or rec file.";
         }
-        for (auto &aug : this->augmenters_[tid]) {
+        for (auto& aug : this->augmenters_[tid]) {
           res = aug->Process(res, &label_buf, this->prnds_[tid].get());
         }
         out.Push(static_cast<unsigned>(rec.image_index()),
-                 mshadow::Shape3(n_channels, param_.data_shape[1],
-                                 param_.data_shape[2]),
+                 mshadow::Shape3(n_channels, param_.data_shape[1], param_.data_shape[2]),
                  mshadow::Shape1(param_.label_pad_width + 4));
 
         mshadow::Tensor<cpu, 3, DType> data = out.data().Back();
@@ -451,12 +455,15 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
         // For RGB or RGBA data, swap the B and R channel:
         // OpenCV store as BGR (or BGRA) and we want RGB (or RGBA)
         std::vector<int> swap_indices;
-        if (n_channels == 1) swap_indices = {0};
-        if (n_channels == 3) swap_indices = {2, 1, 0};
-        if (n_channels == 4) swap_indices = {2, 1, 0, 3};
+        if (n_channels == 1)
+          swap_indices = {0};
+        if (n_channels == 3)
+          swap_indices = {2, 1, 0};
+        if (n_channels == 4)
+          swap_indices = {2, 1, 0, 3};
 
         for (int i = 0; i < res.rows; ++i) {
-          uchar *im_data = res.ptr<uchar>(i);
+          uchar* im_data = res.ptr<uchar>(i);
           for (int j = 0; j < res.cols; ++j) {
             for (int k = 0; k < n_channels; ++k) {
               data[k][i][j] = im_data[swap_indices[k]];
@@ -465,7 +472,7 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
           }
         }
         mshadow::Tensor<cpu, 1> label = out.label().Back();
-        label = param_.label_pad_value;
+        label                         = param_.label_pad_value;
         // store info for real data_shape and label_width
         label[0] = res.channels();
         label[1] = res.rows;
@@ -473,21 +480,20 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
         label[3] = label_buf.size();
         mshadow::Copy(
             label.Slice(4, 4 + label_buf.size()),
-            mshadow::Tensor<cpu, 1>(dmlc::BeginPtr(label_buf),
-                                    mshadow::Shape1(label_buf.size())));
+            mshadow::Tensor<cpu, 1>(dmlc::BeginPtr(label_buf), mshadow::Shape1(label_buf.size())));
         res.release();
       }
     });
   }
 #else
-      LOG(FATAL) << "Opencv is needed for image decoding and augmenting.";
+  LOG(FATAL) << "Opencv is needed for image decoding and augmenting.";
 #endif
   omp_exc_.Rethrow();
   return true;
 }
 
 // Define image record parameters
-struct ImageDetRecordParam: public dmlc::Parameter<ImageDetRecordParam> {
+struct ImageDetRecordParam : public dmlc::Parameter<ImageDetRecordParam> {
   /*! \brief whether to do shuffle */
   bool shuffle;
   /*! \brief random seed */
@@ -496,40 +502,40 @@ struct ImageDetRecordParam: public dmlc::Parameter<ImageDetRecordParam> {
   bool verbose;
   // declare parameters
   DMLC_DECLARE_PARAMETER(ImageDetRecordParam) {
-    DMLC_DECLARE_FIELD(shuffle).set_default(false)
-        .describe("Augmentation Param: Whether to shuffle data.");
-    DMLC_DECLARE_FIELD(seed).set_default(0)
-        .describe("Augmentation Param: Random Seed.");
-    DMLC_DECLARE_FIELD(verbose).set_default(true)
-        .describe("Auxiliary Param: Whether to output information.");
+    DMLC_DECLARE_FIELD(shuffle).set_default(false).describe(
+        "Augmentation Param: Whether to shuffle data.");
+    DMLC_DECLARE_FIELD(seed).set_default(0).describe("Augmentation Param: Random Seed.");
+    DMLC_DECLARE_FIELD(verbose).set_default(true).describe(
+        "Auxiliary Param: Whether to output information.");
   }
 };
 
 // iterator on image recordio
-template<typename DType = real_t>
+template <typename DType = real_t>
 class ImageDetRecordIter : public IIterator<DataInst> {
  public:
-  ImageDetRecordIter() : data_(nullptr) { }
+  ImageDetRecordIter() : data_(nullptr) {}
   // destructor
   ~ImageDetRecordIter() override {
     iter_.Destroy();
     delete data_;
   }
   // constructor
-  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
+  void Init(const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     param_.InitAllowUnknown(kwargs);
     // use the kwarg to init parser
     parser_.Init(kwargs);
     // prefetch at most 4 minbatches
     iter_.set_max_capacity(4);
     // init thread iter
-    iter_.Init([this](std::vector<InstVector<DType>> **dptr) {
-        if (*dptr == nullptr) {
-          *dptr = new std::vector<InstVector<DType>>();
-        }
-        return parser_.ParseNext(*dptr);
-      },
-      [this]() { parser_.BeforeFirst(); });
+    iter_.Init(
+        [this](std::vector<InstVector<DType>>** dptr) {
+          if (*dptr == nullptr) {
+            *dptr = new std::vector<InstVector<DType>>();
+          }
+          return parser_.ParseNext(*dptr);
+        },
+        [this]() { parser_.BeforeFirst(); });
     inst_ptr_ = 0;
     rnd_.seed(kRandMagic + param_.seed);
   }
@@ -544,12 +550,14 @@ class ImageDetRecordIter : public IIterator<DataInst> {
     while (true) {
       if (inst_ptr_ < inst_order_.size()) {
         std::pair<unsigned, unsigned> p = inst_order_[inst_ptr_];
-        out_ = (*data_)[p.first][p.second];
+        out_                            = (*data_)[p.first][p.second];
         ++inst_ptr_;
         return true;
       } else {
-        if (data_ != nullptr) iter_.Recycle(&data_);
-        if (!iter_.Next(&data_)) return false;
+        if (data_ != nullptr)
+          iter_.Recycle(&data_);
+        if (!iter_.Next(&data_))
+          return false;
         inst_order_.clear();
         for (unsigned i = 0; i < data_->size(); ++i) {
           const InstVector<DType>& tmp = (*data_)[i];
@@ -567,7 +575,7 @@ class ImageDetRecordIter : public IIterator<DataInst> {
     return false;
   }
 
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return out_;
   }
 
@@ -579,13 +587,13 @@ class ImageDetRecordIter : public IIterator<DataInst> {
   // data ptr
   size_t inst_ptr_;
   // internal instance order
-  std::vector<std::pair<unsigned, unsigned> > inst_order_;
+  std::vector<std::pair<unsigned, unsigned>> inst_order_;
   // data
-  std::vector<InstVector<DType>> *data_;
+  std::vector<InstVector<DType>>* data_;
   // internal parser
   ImageDetRecordIOParser<DType> parser_;
   // backend thread
-  dmlc::ThreadedIter<std::vector<InstVector<DType>> > iter_;
+  dmlc::ThreadedIter<std::vector<InstVector<DType>>> iter_;
   // parameters
   ImageDetRecordParam param_;
   // random number generator
@@ -596,18 +604,16 @@ DMLC_REGISTER_PARAMETER(ImageDetRecParserParam);
 DMLC_REGISTER_PARAMETER(ImageDetRecordParam);
 
 MXNET_REGISTER_IO_ITER(ImageDetRecordIter)
-.describe("Create iterator for image detection dataset packed in recordio.")
-.add_arguments(ImageDetRecParserParam::__FIELDS__())
-.add_arguments(ImageDetRecordParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.add_arguments(ListDefaultDetAugParams())
-.add_arguments(ImageDetNormalizeParam::__FIELDS__())
-.set_body([]() {
-  return new PrefetcherIter(
-        new BatchLoader(
-            new ImageDetNormalizeIter(
-                new ImageDetRecordIter<real_t>())));
-});
+    .describe("Create iterator for image detection dataset packed in recordio.")
+    .add_arguments(ImageDetRecParserParam::__FIELDS__())
+    .add_arguments(ImageDetRecordParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .add_arguments(ListDefaultDetAugParams())
+    .add_arguments(ImageDetNormalizeParam::__FIELDS__())
+    .set_body([]() {
+      return new PrefetcherIter(
+          new BatchLoader(new ImageDetNormalizeIter(new ImageDetRecordIter<real_t>())));
+    });
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_image_recordio.cc b/src/io/iter_image_recordio.cc
index 23008050ec28..41955b2a34be 100644
--- a/src/io/iter_image_recordio.cc
+++ b/src/io/iter_image_recordio.cc
@@ -47,11 +47,11 @@
 namespace mxnet {
 namespace io {
 // parser to parse image recordio
-template<typename DType>
+template <typename DType>
 class ImageRecordIOParser {
  public:
   // initialize the parser
-  inline void Init(const std::vector<std::pair<std::string, std::string> >& kwargs);
+  inline void Init(const std::vector<std::pair<std::string, std::string>>& kwargs);
 
   // set record to the head
   inline void BeforeFirst() {
@@ -59,19 +59,19 @@ class ImageRecordIOParser {
   }
   // parse next set of records, return an array of
   // instance vector to the user
-  inline bool ParseNext(std::vector<InstVector<DType>> *out);
+  inline bool ParseNext(std::vector<InstVector<DType>>* out);
 
  private:
   // magic number to see prng
   static const int kRandMagic = 111;
   /*! \brief parameters */
   ImageRecParserParam param_;
-  #if MXNET_USE_OPENCV
+#if MXNET_USE_OPENCV
   /*! \brief augmenters */
-  std::vector<std::vector<std::unique_ptr<ImageAugmenter> > > augmenters_;
-  #endif
+  std::vector<std::vector<std::unique_ptr<ImageAugmenter>>> augmenters_;
+#endif
   /*! \brief random samplers */
-  std::vector<std::unique_ptr<common::RANDOM_ENGINE> > prnds_;
+  std::vector<std::unique_ptr<common::RANDOM_ENGINE>> prnds_;
   /*! \brief data source */
   std::unique_ptr<dmlc::InputSplit> source_;
   /*! \brief label information, if any */
@@ -80,24 +80,22 @@ class ImageRecordIOParser {
   mshadow::TensorContainer<cpu, 3> img_;
 };
 
-template<typename DType>
+template <typename DType>
 inline void ImageRecordIOParser<DType>::Init(
-    const std::vector<std::pair<std::string, std::string> >& kwargs) {
+    const std::vector<std::pair<std::string, std::string>>& kwargs) {
 #if MXNET_USE_OPENCV
   // initialize parameter
   // init image rec param
   param_.InitAllowUnknown(kwargs);
   int maxthread, threadget;
-  #pragma omp parallel
+#pragma omp parallel
   {
     // be conservative, set number of real cores
     maxthread = std::max(omp_get_num_procs() / 2 - 1, 1);
   }
   param_.preprocess_threads = std::min(maxthread, param_.preprocess_threads);
-  #pragma omp parallel num_threads(param_.preprocess_threads)
-  {
-    threadget = omp_get_num_threads();
-  }
+#pragma omp parallel num_threads(param_.preprocess_threads)
+  { threadget = omp_get_num_threads(); }
   param_.preprocess_threads = threadget;
 
   std::vector<std::string> aug_names = dmlc::Split(param_.aug_seq, ',');
@@ -112,39 +110,39 @@ inline void ImageRecordIOParser<DType>::Init(
     prnds_.emplace_back(new common::RANDOM_ENGINE((i + 1) * kRandMagic));
   }
   if (param_.path_imglist.length() != 0) {
-    label_map_ = std::make_unique<ImageLabelMap>(param_.path_imglist.c_str(),
-      param_.label_width, !param_.verbose);
+    label_map_ = std::make_unique<ImageLabelMap>(
+        param_.path_imglist.c_str(), param_.label_width, !param_.verbose);
   }
-  CHECK(param_.path_imgrec.length() != 0)
-      << "ImageRecordIOIterator: must specify image_rec";
+  CHECK(param_.path_imgrec.length() != 0) << "ImageRecordIOIterator: must specify image_rec";
 
   if (param_.verbose) {
-    LOG(INFO) << "ImageRecordIOParser: " << param_.path_imgrec
-              << ", use " << threadget << " threads for decoding..";
+    LOG(INFO) << "ImageRecordIOParser: " << param_.path_imgrec << ", use " << threadget
+              << " threads for decoding..";
   }
   source_.reset(dmlc::InputSplit::Create(
-      param_.path_imgrec.c_str(), param_.part_index,
-      param_.num_parts, "recordio"));
+      param_.path_imgrec.c_str(), param_.part_index, param_.num_parts, "recordio"));
   if (param_.shuffle_chunk_size > 0) {
     if (param_.shuffle_chunk_size > 4096) {
       LOG(INFO) << "Chunk size: " << param_.shuffle_chunk_size
-                 << " MB which is larger than 4096 MB, please set "
-                    "smaller chunk size";
+                << " MB which is larger than 4096 MB, please set "
+                   "smaller chunk size";
     }
     if (param_.shuffle_chunk_size < 4) {
       LOG(INFO) << "Chunk size: " << param_.shuffle_chunk_size
-                 << " MB which is less than 4 MB, please set "
-                    "larger chunk size";
+                << " MB which is less than 4 MB, please set "
+                   "larger chunk size";
     }
     // 1.1 ratio is for a bit more shuffle parts to avoid boundary issue
-    unsigned num_shuffle_parts =
-        std::ceil(source_->GetTotalSize() * 1.1 /
-                  (param_.num_parts * (param_.shuffle_chunk_size << 20UL)));
+    unsigned num_shuffle_parts = std::ceil(
+        source_->GetTotalSize() * 1.1 / (param_.num_parts * (param_.shuffle_chunk_size << 20UL)));
 
     if (num_shuffle_parts > 1) {
-      source_.reset(dmlc::InputSplitShuffle::Create(
-          param_.path_imgrec.c_str(), param_.part_index,
-          param_.num_parts, "recordio", num_shuffle_parts, param_.shuffle_chunk_seed));
+      source_.reset(dmlc::InputSplitShuffle::Create(param_.path_imgrec.c_str(),
+                                                    param_.part_index,
+                                                    param_.num_parts,
+                                                    "recordio",
+                                                    num_shuffle_parts,
+                                                    param_.shuffle_chunk_seed));
     }
     source_->HintChunkSize(param_.shuffle_chunk_size << 17UL);
   } else {
@@ -156,16 +154,16 @@ inline void ImageRecordIOParser<DType>::Init(
 #endif
 }
 
-template<typename DType>
-inline bool ImageRecordIOParser<DType>::
-ParseNext(std::vector<InstVector<DType>> *out_vec) {
+template <typename DType>
+inline bool ImageRecordIOParser<DType>::ParseNext(std::vector<InstVector<DType>>* out_vec) {
   CHECK(source_ != nullptr);
   dmlc::InputSplit::Blob chunk;
-  if (!source_->NextChunk(&chunk)) return false;
+  if (!source_->NextChunk(&chunk))
+    return false;
 #if MXNET_USE_OPENCV
   // save opencv out
   out_vec->resize(param_.preprocess_threads);
-  #pragma omp parallel num_threads(param_.preprocess_threads)
+#pragma omp parallel num_threads(param_.preprocess_threads)
   {
     CHECK(omp_get_num_threads() == param_.preprocess_threads);
     int tid = omp_get_thread_num();
@@ -173,7 +171,7 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
     ImageRecordIO rec;
     dmlc::InputSplit::Blob blob;
     // image data
-    InstVector<DType> &out = (*out_vec)[tid];
+    InstVector<DType>& out = (*out_vec)[tid];
     out.Clear();
     while (reader.NextRecord(&blob)) {
       // Opencv decode and augments
@@ -181,21 +179,20 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
       rec.Load(blob.dptr, blob.size);
       cv::Mat buf(1, rec.content_size, CV_8U, rec.content);
       switch (param_.data_shape[0]) {
-       case 1:
-        res = cv::imdecode(buf, 0);
-        break;
-       case 3:
-        res = cv::imdecode(buf, 1);
-        break;
-       case 4:
-        // -1 to keep the number of channel of the encoded image, and not force gray or color.
-        res = cv::imdecode(buf, -1);
-        CHECK_EQ(res.channels(), 4)
-          << "Invalid image with index " << rec.image_index()
-          << ". Expected 4 channels, got " << res.channels();
-        break;
-       default:
-        LOG(FATAL) << "Invalid output shape " << param_.data_shape;
+        case 1:
+          res = cv::imdecode(buf, 0);
+          break;
+        case 3:
+          res = cv::imdecode(buf, 1);
+          break;
+        case 4:
+          // -1 to keep the number of channel of the encoded image, and not force gray or color.
+          res = cv::imdecode(buf, -1);
+          CHECK_EQ(res.channels(), 4) << "Invalid image with index " << rec.image_index()
+                                      << ". Expected 4 channels, got " << res.channels();
+          break;
+        default:
+          LOG(FATAL) << "Invalid output shape " << param_.data_shape;
       }
       const int n_channels = res.channels();
       for (auto& aug : augmenters_[tid]) {
@@ -210,15 +207,18 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
       // For RGB or RGBA data, swap the B and R channel:
       // OpenCV store as BGR (or BGRA) and we want RGB (or RGBA)
       std::vector<int> swap_indices;
-      if (n_channels == 1) swap_indices = {0};
-      if (n_channels == 3) swap_indices = {2, 1, 0};
-      if (n_channels == 4) swap_indices = {2, 1, 0, 3};
+      if (n_channels == 1)
+        swap_indices = {0};
+      if (n_channels == 3)
+        swap_indices = {2, 1, 0};
+      if (n_channels == 4)
+        swap_indices = {2, 1, 0, 3};
 
       for (int i = 0; i < res.rows; ++i) {
         uchar* im_data = res.ptr<uchar>(i);
         for (int j = 0; j < res.cols; ++j) {
           for (int k = 0; k < n_channels; ++k) {
-              data[k][i][j] = im_data[swap_indices[k]];
+            data[k][i][j] = im_data[swap_indices[k]];
           }
           im_data += n_channels;
         }
@@ -228,15 +228,14 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
       if (label_map_ != nullptr) {
         mshadow::Copy(label, label_map_->Find(rec.image_index()));
       } else if (rec.label != nullptr) {
-        CHECK_EQ(param_.label_width, rec.num_label)
-          << "rec file provide " << rec.num_label << "-dimensional label "
-             "but label_width is set to " << param_.label_width;
-        mshadow::Copy(label, mshadow::Tensor<cpu, 1>(rec.label,
-                                                     mshadow::Shape1(rec.num_label)));
+        CHECK_EQ(param_.label_width, rec.num_label) << "rec file provide " << rec.num_label
+                                                    << "-dimensional label "
+                                                       "but label_width is set to "
+                                                    << param_.label_width;
+        mshadow::Copy(label, mshadow::Tensor<cpu, 1>(rec.label, mshadow::Shape1(rec.num_label)));
       } else {
-        CHECK_EQ(param_.label_width, 1)
-          << "label_width must be 1 unless an imglist is provided "
-             "or the rec file is packed with multi dimensional label";
+        CHECK_EQ(param_.label_width, 1) << "label_width must be 1 unless an imglist is provided "
+                                           "or the rec file is packed with multi dimensional label";
         label[0] = rec.header.label;
       }
       res.release();
@@ -249,30 +248,31 @@ ParseNext(std::vector<InstVector<DType>> *out_vec) {
 }
 
 // iterator on image recordio
-template<typename DType = real_t>
+template <typename DType = real_t>
 class ImageRecordIter : public IIterator<DataInst> {
  public:
-  ImageRecordIter() : data_(nullptr) { }
+  ImageRecordIter() : data_(nullptr) {}
   // destructor
   ~ImageRecordIter() override {
     iter_.Destroy();
     delete data_;
   }
   // constructor
-  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
+  void Init(const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     param_.InitAllowUnknown(kwargs);
     // use the kwarg to init parser
     parser_.Init(kwargs);
     // prefetch at most 4 minbatches
     iter_.set_max_capacity(4);
     // init thread iter
-    iter_.Init([this](std::vector<InstVector<DType>> **dptr) {
-        if (*dptr == nullptr) {
-          *dptr = new std::vector<InstVector<DType>>();
-        }
-        return parser_.ParseNext(*dptr);
-      },
-      [this]() { parser_.BeforeFirst(); });
+    iter_.Init(
+        [this](std::vector<InstVector<DType>>** dptr) {
+          if (*dptr == nullptr) {
+            *dptr = new std::vector<InstVector<DType>>();
+          }
+          return parser_.ParseNext(*dptr);
+        },
+        [this]() { parser_.BeforeFirst(); });
     inst_ptr_ = 0;
     rnd_.seed(kRandMagic + param_.seed);
   }
@@ -287,12 +287,14 @@ class ImageRecordIter : public IIterator<DataInst> {
     while (true) {
       if (inst_ptr_ < inst_order_.size()) {
         std::pair<unsigned, unsigned> p = inst_order_[inst_ptr_];
-        out_ = (*data_)[p.first][p.second];
+        out_                            = (*data_)[p.first][p.second];
         ++inst_ptr_;
         return true;
       } else {
-        if (data_ != nullptr) iter_.Recycle(&data_);
-        if (!iter_.Next(&data_)) return false;
+        if (data_ != nullptr)
+          iter_.Recycle(&data_);
+        if (!iter_.Next(&data_))
+          return false;
         inst_order_.clear();
         for (unsigned i = 0; i < data_->size(); ++i) {
           const InstVector<DType>& tmp = (*data_)[i];
@@ -310,7 +312,7 @@ class ImageRecordIter : public IIterator<DataInst> {
     return false;
   }
 
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return out_;
   }
 
@@ -322,13 +324,13 @@ class ImageRecordIter : public IIterator<DataInst> {
   // data ptr
   size_t inst_ptr_;
   // internal instance order
-  std::vector<std::pair<unsigned, unsigned> > inst_order_;
+  std::vector<std::pair<unsigned, unsigned>> inst_order_;
   // data
-  std::vector<InstVector<DType>> *data_;
+  std::vector<InstVector<DType>>* data_;
   // internal parser
   ImageRecordIOParser<DType> parser_;
   // backend thread
-  dmlc::ThreadedIter<std::vector<InstVector<DType>> > iter_;
+  dmlc::ThreadedIter<std::vector<InstVector<DType>>> iter_;
   // parameters
   ImageRecordParam param_;
   // random number generator
@@ -337,7 +339,7 @@ class ImageRecordIter : public IIterator<DataInst> {
 
 // OLD VERSION - DEPRECATED
 MXNET_REGISTER_IO_ITER(ImageRecordIter_v1)
-.describe(R"code(Iterating on image RecordIO files
+    .describe(R"code(Iterating on image RecordIO files
 
 .. note::
 
@@ -351,22 +353,20 @@ One can use ``tools/im2rec.py`` to pack individual image files into RecordIO
 files.
 
 )code" ADD_FILELINE)
-.add_arguments(ImageRecParserParam::__FIELDS__())
-.add_arguments(ImageRecordParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.add_arguments(ListDefaultAugParams())
-.add_arguments(ImageNormalizeParam::__FIELDS__())
-.set_body([]() {
-    return new PrefetcherIter(
-        new BatchLoader(
-            new ImageNormalizeIter(
-                new ImageRecordIter<real_t>())));
-  });
+    .add_arguments(ImageRecParserParam::__FIELDS__())
+    .add_arguments(ImageRecordParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .add_arguments(ListDefaultAugParams())
+    .add_arguments(ImageNormalizeParam::__FIELDS__())
+    .set_body([]() {
+      return new PrefetcherIter(
+          new BatchLoader(new ImageNormalizeIter(new ImageRecordIter<real_t>())));
+    });
 
 // OLD VERSION - DEPRECATED
 MXNET_REGISTER_IO_ITER(ImageRecordUInt8Iter_v1)
-.describe(R"code(Iterating on image RecordIO files
+    .describe(R"code(Iterating on image RecordIO files
 
 .. note::
 
@@ -376,15 +376,11 @@ This iterator is identical to ``ImageRecordIter`` except for using ``uint8`` as
 the data type instead of ``float``.
 
 )code" ADD_FILELINE)
-.add_arguments(ImageRecParserParam::__FIELDS__())
-.add_arguments(ImageRecordParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.add_arguments(ListDefaultAugParams())
-.set_body([]() {
-    return new PrefetcherIter(
-        new BatchLoader(
-            new ImageRecordIter<uint8_t>()));
-  });
+    .add_arguments(ImageRecParserParam::__FIELDS__())
+    .add_arguments(ImageRecordParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .add_arguments(ListDefaultAugParams())
+    .set_body([]() { return new PrefetcherIter(new BatchLoader(new ImageRecordIter<uint8_t>())); });
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_image_recordio_2.cc b/src/io/iter_image_recordio_2.cc
index f4f88b76d65c..375fdaabe7f2 100644
--- a/src/io/iter_image_recordio_2.cc
+++ b/src/io/iter_image_recordio_2.cc
@@ -49,11 +49,11 @@ namespace mxnet {
 
 namespace io {
 // parser to parse image recordio
-template<typename DType>
+template <typename DType>
 class ImageRecordIOParser2 {
  public:
   // initialize the parser
-  inline void Init(const std::vector<std::pair<std::string, std::string> >& kwargs);
+  inline void Init(const std::vector<std::pair<std::string, std::string>>& kwargs);
 
   // set record to the head
   inline void BeforeFirst() {
@@ -66,24 +66,28 @@ class ImageRecordIOParser2 {
   }
   // parse next set of records, return an array of
   // instance vector to the user
-  inline bool ParseNext(DataBatch *out);
+  inline bool ParseNext(DataBatch* out);
 
  private:
 #if MXNET_USE_OPENCV
-  template<int n_channels>
+  template <int n_channels>
   void ProcessImage(const cv::Mat& res,
-    mshadow::Tensor<cpu, 3, DType>* data_ptr, const bool is_mirrored, const float contrast_scaled,
-    const float illumination_scaled);
+                    mshadow::Tensor<cpu, 3, DType>* data_ptr,
+                    const bool is_mirrored,
+                    const float contrast_scaled,
+                    const float illumination_scaled);
 #if MXNET_USE_LIBJPEG_TURBO
   cv::Mat TJimdecode(cv::Mat buf, int color);
 #endif
 #endif
-  inline size_t ParseChunk(DType* data_dptr, real_t* label_dptr, const size_t current_size,
-    dmlc::InputSplit::Blob * chunk);
+  inline size_t ParseChunk(DType* data_dptr,
+                           real_t* label_dptr,
+                           const size_t current_size,
+                           dmlc::InputSplit::Blob* chunk);
   inline void CreateMeanImg();
 
   // magic number to seed prng
-  static const int kRandMagic = 111;
+  static const int kRandMagic          = 111;
   static const int kRandMagicNormalize = 0;
   /*! \brief parameters */
   ImageRecParserParam param_;
@@ -91,12 +95,12 @@ class ImageRecordIOParser2 {
   BatchParam batch_param_;
   ImageNormalizeParam normalize_param_;
 
-  #if MXNET_USE_OPENCV
+#if MXNET_USE_OPENCV
   /*! \brief augmenters */
-  std::vector<std::vector<std::unique_ptr<ImageAugmenter> > > augmenters_;
-  #endif
+  std::vector<std::vector<std::unique_ptr<ImageAugmenter>>> augmenters_;
+#endif
   /*! \brief random samplers */
-  std::vector<std::unique_ptr<common::RANDOM_ENGINE> > prnds_;
+  std::vector<std::unique_ptr<common::RANDOM_ENGINE>> prnds_;
   common::RANDOM_ENGINE rnd_;
   /*! \brief data source */
   std::unique_ptr<dmlc::InputSplit> source_;
@@ -107,7 +111,7 @@ class ImageRecordIOParser2 {
   /*! \brief temp space */
   mshadow::TensorContainer<cpu, 3> img_;
   /*! \brief internal instance order */
-  std::vector<std::pair<size_t, size_t> > inst_order_;
+  std::vector<std::pair<size_t, size_t>> inst_order_;
   size_t inst_index_;
   /*! \brief internal counter tracking number of already parsed entries */
   size_t n_parsed_;
@@ -126,9 +130,9 @@ class ImageRecordIOParser2 {
   dmlc::OMPException omp_exc_;
 };
 
-template<typename DType>
+template <typename DType>
 inline void ImageRecordIOParser2<DType>::Init(
-    const std::vector<std::pair<std::string, std::string> >& kwargs) {
+    const std::vector<std::pair<std::string, std::string>>& kwargs) {
 #if MXNET_USE_OPENCV
   // initialize parameter
   // init image rec param
@@ -139,22 +143,20 @@ inline void ImageRecordIOParser2<DType>::Init(
   PrefetcherParam prefetch_param;
   prefetch_param.InitAllowUnknown(kwargs);
   n_parsed_ = 0;
-  overflow = false;
+  overflow  = false;
   rnd_.seed(kRandMagic + record_param_.seed);
   int maxthread, threadget;
   if (prefetch_param.ctx == PrefetcherParam::CtxType::kCPU) {
     threadget = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   } else {
-    #pragma omp parallel
+#pragma omp parallel
     {
       // be conservative, set number of real cores
       maxthread = std::max(omp_get_num_procs() / 2, 1);
     }
     param_.preprocess_threads = std::min(maxthread, param_.preprocess_threads);
-    #pragma omp parallel num_threads(param_.preprocess_threads)
-    {
-      threadget = omp_get_num_threads();
-    }
+#pragma omp parallel num_threads(param_.preprocess_threads)
+    { threadget = omp_get_num_threads(); }
   }
   param_.preprocess_threads = threadget;
 
@@ -170,52 +172,52 @@ inline void ImageRecordIOParser2<DType>::Init(
     prnds_.emplace_back(new common::RANDOM_ENGINE((i + 1) * kRandMagic));
   }
   if (param_.path_imglist.length() != 0) {
-    label_map_ = std::make_unique<ImageLabelMap>(param_.path_imglist.c_str(),
-      param_.label_width, !param_.verbose);
+    label_map_ = std::make_unique<ImageLabelMap>(
+        param_.path_imglist.c_str(), param_.label_width, !param_.verbose);
   }
-  CHECK(param_.path_imgrec.length() != 0)
-      << "ImageRecordIter2: must specify image_rec";
+  CHECK(param_.path_imgrec.length() != 0) << "ImageRecordIter2: must specify image_rec";
 
   if (param_.verbose) {
-    LOG(INFO) << "ImageRecordIOParser2: " << param_.path_imgrec
-              << ", use " << threadget << " threads for decoding..";
+    LOG(INFO) << "ImageRecordIOParser2: " << param_.path_imgrec << ", use " << threadget
+              << " threads for decoding..";
   }
   legacy_shuffle_ = false;
   if (param_.path_imgidx.length() != 0) {
-    source_.reset(dmlc::InputSplit::Create(
-        param_.path_imgrec.c_str(),
-        param_.path_imgidx.c_str(),
-        param_.part_index,
-        param_.num_parts, "indexed_recordio",
-        record_param_.shuffle,
-        record_param_.seed,
-        batch_param_.batch_size));
+    source_.reset(dmlc::InputSplit::Create(param_.path_imgrec.c_str(),
+                                           param_.path_imgidx.c_str(),
+                                           param_.part_index,
+                                           param_.num_parts,
+                                           "indexed_recordio",
+                                           record_param_.shuffle,
+                                           record_param_.seed,
+                                           batch_param_.batch_size));
   } else {
     source_.reset(dmlc::InputSplit::Create(
-        param_.path_imgrec.c_str(), param_.part_index,
-        param_.num_parts, "recordio"));
+        param_.path_imgrec.c_str(), param_.part_index, param_.num_parts, "recordio"));
     if (record_param_.shuffle)
       legacy_shuffle_ = true;
     if (param_.shuffle_chunk_size > 0) {
       if (param_.shuffle_chunk_size > 4096) {
         LOG(INFO) << "Chunk size: " << param_.shuffle_chunk_size
-                   << " MB which is larger than 4096 MB, please set "
-                      "smaller chunk size";
+                  << " MB which is larger than 4096 MB, please set "
+                     "smaller chunk size";
       }
       if (param_.shuffle_chunk_size < 4) {
         LOG(INFO) << "Chunk size: " << param_.shuffle_chunk_size
-                   << " MB which is less than 4 MB, please set "
-                      "larger chunk size";
+                  << " MB which is less than 4 MB, please set "
+                     "larger chunk size";
       }
       // 1.1 ratio is for a bit more shuffle parts to avoid boundary issue
-      size_t num_shuffle_parts =
-          std::ceil(source_->GetTotalSize() * 1.1 /
-                    (param_.num_parts * (param_.shuffle_chunk_size << 20UL)));
+      size_t num_shuffle_parts = std::ceil(
+          source_->GetTotalSize() * 1.1 / (param_.num_parts * (param_.shuffle_chunk_size << 20UL)));
 
       if (num_shuffle_parts > 1) {
-        source_.reset(dmlc::InputSplitShuffle::Create(
-            param_.path_imgrec.c_str(), param_.part_index,
-            param_.num_parts, "recordio", num_shuffle_parts, param_.shuffle_chunk_seed));
+        source_.reset(dmlc::InputSplitShuffle::Create(param_.path_imgrec.c_str(),
+                                                      param_.part_index,
+                                                      param_.num_parts,
+                                                      "recordio",
+                                                      num_shuffle_parts,
+                                                      param_.shuffle_chunk_seed));
       }
       source_->HintChunkSize(param_.shuffle_chunk_size << 17UL);
     } else {
@@ -241,12 +243,11 @@ inline void ImageRecordIOParser2<DType>::Init(
         std::vector<NDArray> data;
         std::vector<std::string> keys;
         {
-          std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(normalize_param_.mean_img.c_str(),
-                                                                "r"));
+          std::unique_ptr<dmlc::Stream> fi(
+              dmlc::Stream::Create(normalize_param_.mean_img.c_str(), "r"));
           NDArray::Load(fi.get(), &data, &keys);
         }
-        CHECK_EQ(data.size(), 1)
-          << "Invalid mean image file format";
+        CHECK_EQ(data.size(), 1) << "Invalid mean image file format";
         data[0].WaitToRead();
         mshadow::Tensor<cpu, 3> src = data[0].data().get<cpu, 3, real_t>();
         meanimg_.Resize(src.shape_);
@@ -263,8 +264,8 @@ inline void ImageRecordIOParser2<DType>::Init(
 #endif
 }
 
-template<typename DType>
-inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch *out) {
+template <typename DType>
+inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch* out) {
   if (overflow) {
     return false;
   }
@@ -293,7 +294,7 @@ inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch *out) {
     shape_vec.push_back(param_.label_width);
     mxnet::TShape label_shape(shape_vec.begin(), shape_vec.end());
 
-    auto ctx = Context::CPU(0);
+    auto ctx    = Context::CPU(0);
     auto dev_id = param_.device_id;
     if (dev_id != -1) {
       ctx = Context::CPUPinned(dev_id);
@@ -302,11 +303,9 @@ inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch *out) {
     const std::string profiler_scope =
         profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "image_io:";
 
-    out->data.at(0) = NDArray(data_shape, ctx, false,
-      mshadow::DataType<DType>::kFlag);
+    out->data.at(0) = NDArray(data_shape, ctx, false, mshadow::DataType<DType>::kFlag);
     out->data.at(0).AssignStorageInfo(profiler_scope, "data");
-    out->data.at(1) = NDArray(label_shape, ctx, false,
-      mshadow::DataType<real_t>::kFlag);
+    out->data.at(1) = NDArray(label_shape, ctx, false, mshadow::DataType<real_t>::kFlag);
     out->data.at(1).AssignStorageInfo(profiler_scope, "label");
     unit_size_[0] = param_.data_shape.Size();
     unit_size_[1] = param_.label_width;
@@ -318,8 +317,8 @@ inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch *out) {
     if (n_parsed_ == 0) {
       if (source_->NextBatch(&chunk, batch_param_.batch_size)) {
         inst_order_.clear();
-        inst_index_ = 0;
-        DType* data_dptr = static_cast<DType*>(out->data[0].data().dptr_);
+        inst_index_        = 0;
+        DType* data_dptr   = static_cast<DType*>(out->data[0].data().dptr_);
         real_t* label_dptr = static_cast<real_t*>(out->data[1].data().dptr_);
         if (!legacy_shuffle_) {
           n_to_out = ParseChunk(data_dptr, label_dptr, current_size, &chunk);
@@ -344,27 +343,27 @@ inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch *out) {
           current_size = batch_param_.batch_size;
         }
         out->num_batch_padd = batch_param_.batch_size - current_size;
-        n_to_out = 0;
+        n_to_out            = 0;
       }
     } else {
-      size_t n_to_copy = std::min(n_parsed_,
-                                  static_cast<size_t>(batch_param_.batch_size) - current_size);
+      size_t n_to_copy =
+          std::min(n_parsed_, static_cast<size_t>(batch_param_.batch_size) - current_size);
       n_parsed_ -= n_to_copy;
-      // Copy
-      #pragma omp parallel for num_threads(param_.preprocess_threads)
+// Copy
+#pragma omp parallel for num_threads(param_.preprocess_threads)
       for (int i = 0; i < static_cast<int>(n_to_copy); ++i) {
         omp_exc_.Run([&] {
-        std::pair<size_t, size_t> place = inst_order_[inst_index_ + i];
-        const DataInst& batch = temp_[place.first][place.second];
-        for (size_t j = 0; j < batch.data.size(); ++j) {
-          CHECK_EQ(unit_size_[j], batch.data[j].Size());
-          MSHADOW_TYPE_SWITCH(out->data[j].data().type_flag_, dtype, {
-          mshadow::Copy(
-              out->data[j].data().FlatTo1D<cpu, dtype>().Slice((current_size + i) * unit_size_[j],
-                (current_size + i + 1) * unit_size_[j]),
-              batch.data[j].get_with_shape<cpu, 1, dtype>(mshadow::Shape1(unit_size_[j])));
-          });
-        }
+          std::pair<size_t, size_t> place = inst_order_[inst_index_ + i];
+          const DataInst& batch           = temp_[place.first][place.second];
+          for (size_t j = 0; j < batch.data.size(); ++j) {
+            CHECK_EQ(unit_size_[j], batch.data[j].Size());
+            MSHADOW_TYPE_SWITCH(out->data[j].data().type_flag_, dtype, {
+              mshadow::Copy(
+                  out->data[j].data().FlatTo1D<cpu, dtype>().Slice(
+                      (current_size + i) * unit_size_[j], (current_size + i + 1) * unit_size_[j]),
+                  batch.data[j].get_with_shape<cpu, 1, dtype>(mshadow::Shape1(unit_size_[j])));
+            });
+          }
         });
       }
       omp_exc_.Rethrow();
@@ -378,15 +377,17 @@ inline bool ImageRecordIOParser2<DType>::ParseNext(DataBatch *out) {
 }
 
 #if MXNET_USE_OPENCV
-template<typename DType>
-template<int n_channels>
+template <typename DType>
+template <int n_channels>
 void ImageRecordIOParser2<DType>::ProcessImage(const cv::Mat& res,
-  mshadow::Tensor<cpu, 3, DType>* data_ptr, const bool is_mirrored, const float contrast_scaled,
-  const float illumination_scaled) {
-  float RGBA_MULT[4] = { 0 };
-  float RGBA_BIAS[4] = { 0 };
-  float RGBA_MEAN[4] = { 0 };
-  int16_t RGBA_MEAN_INT[4] = {0};
+                                               mshadow::Tensor<cpu, 3, DType>* data_ptr,
+                                               const bool is_mirrored,
+                                               const float contrast_scaled,
+                                               const float illumination_scaled) {
+  float RGBA_MULT[4]                   = {0};
+  float RGBA_BIAS[4]                   = {0};
+  float RGBA_MEAN[4]                   = {0};
+  int16_t RGBA_MEAN_INT[4]             = {0};
   mshadow::Tensor<cpu, 3, DType>& data = (*data_ptr);
   if (!std::is_same<DType, uint8_t>::value) {
     RGBA_MULT[0] = contrast_scaled / normalize_param_.std_r;
@@ -398,10 +399,10 @@ void ImageRecordIOParser2<DType>::ProcessImage(const cv::Mat& res,
     RGBA_BIAS[2] = illumination_scaled / normalize_param_.std_b;
     RGBA_BIAS[3] = illumination_scaled / normalize_param_.std_a;
     if (!meanfile_ready_) {
-      RGBA_MEAN[0] = normalize_param_.mean_r;
-      RGBA_MEAN[1] = normalize_param_.mean_g;
-      RGBA_MEAN[2] = normalize_param_.mean_b;
-      RGBA_MEAN[3] = normalize_param_.mean_a;
+      RGBA_MEAN[0]     = normalize_param_.mean_r;
+      RGBA_MEAN[1]     = normalize_param_.mean_g;
+      RGBA_MEAN[2]     = normalize_param_.mean_b;
+      RGBA_MEAN[3]     = normalize_param_.mean_a;
       RGBA_MEAN_INT[0] = std::round(normalize_param_.mean_r);
       RGBA_MEAN_INT[1] = std::round(normalize_param_.mean_g);
       RGBA_MEAN_INT[2] = std::round(normalize_param_.mean_b);
@@ -409,7 +410,7 @@ void ImageRecordIOParser2<DType>::ProcessImage(const cv::Mat& res,
     }
   }
 
-  int swap_indices[n_channels]; // NOLINT(*)
+  int swap_indices[n_channels];  // NOLINT(*)
   if (n_channels == 1) {
     swap_indices[0] = 0;
   } else if (n_channels == 3) {
@@ -430,8 +431,8 @@ void ImageRecordIOParser2<DType>::ProcessImage(const cv::Mat& res,
       if (std::is_same<DType, int8_t>::value) {
         if (meanfile_ready_) {
           for (int k = 0; k < n_channels; ++k) {
-            RGBA[k] = cv::saturate_cast<int8_t>(im_data[swap_indices[k]] -
-                                    static_cast<int16_t>(std::round(meanimg_[k][i][j])));
+            RGBA[k] = cv::saturate_cast<int8_t>(
+                im_data[swap_indices[k]] - static_cast<int16_t>(std::round(meanimg_[k][i][j])));
           }
         } else {
           for (int k = 0; k < n_channels; ++k) {
@@ -470,7 +471,7 @@ void ImageRecordIOParser2<DType>::ProcessImage(const cv::Mat& res,
 
 #if MXNET_USE_LIBJPEG_TURBO
 
-bool is_jpeg(unsigned char * file) {
+bool is_jpeg(unsigned char* file) {
   if ((file[0] == 255) && (file[1] == 216)) {
     return true;
   } else {
@@ -478,10 +479,10 @@ bool is_jpeg(unsigned char * file) {
   }
 }
 
-template<typename DType>
+template <typename DType>
 cv::Mat ImageRecordIOParser2<DType>::TJimdecode(cv::Mat image, int color) {
   unsigned char* jpeg = image.ptr();
-  size_t jpeg_size = image.rows * image.cols;
+  size_t jpeg_size    = image.rows * image.cols;
 
   if (!is_jpeg(jpeg)) {
     // If it is not JPEG then fall back to OpenCV
@@ -490,24 +491,13 @@ cv::Mat ImageRecordIOParser2<DType>::TJimdecode(cv::Mat image, int color) {
 
   tjhandle handle = tjInitDecompress();
   int h, w, subsamp;
-  int err = tjDecompressHeader2(handle,
-                                jpeg,
-                                jpeg_size,
-                                &w, &h, &subsamp);
+  int err = tjDecompressHeader2(handle, jpeg, jpeg_size, &w, &h, &subsamp);
   if (err != 0) {
     // If it is a malformed JPEG then fall back to OpenCV
     return cv::imdecode(image, color);
   }
   cv::Mat ret = cv::Mat(h, w, color ? CV_8UC3 : CV_8UC1);
-  err = tjDecompress2(handle,
-                      jpeg,
-                      jpeg_size,
-                      ret.ptr(),
-                      w,
-                      0,
-                      h,
-                      color ? TJPF_BGR : TJPF_GRAY,
-                      0);
+  err = tjDecompress2(handle, jpeg, jpeg_size, ret.ptr(), w, 0, h, color ? TJPF_BGR : TJPF_GRAY, 0);
   if (err != 0) {
     // If it is a malformed JPEG then fall back to OpenCV
     return cv::imdecode(image, color);
@@ -519,142 +509,148 @@ cv::Mat ImageRecordIOParser2<DType>::TJimdecode(cv::Mat image, int color) {
 #endif
 
 // Returns the number of images that are put into output
-template<typename DType>
-inline size_t ImageRecordIOParser2<DType>::ParseChunk(DType* data_dptr, real_t* label_dptr,
-  const size_t current_size, dmlc::InputSplit::Blob * chunk) {
+template <typename DType>
+inline size_t ImageRecordIOParser2<DType>::ParseChunk(DType* data_dptr,
+                                                      real_t* label_dptr,
+                                                      const size_t current_size,
+                                                      dmlc::InputSplit::Blob* chunk) {
   temp_.resize(param_.preprocess_threads);
 #if MXNET_USE_OPENCV
   // save opencv out
   dmlc::RecordIOChunkReader reader(*chunk, 0, 1);
   size_t gl_idx = current_size;
-  #pragma omp parallel num_threads(param_.preprocess_threads)
+#pragma omp parallel num_threads(param_.preprocess_threads)
   {
     omp_exc_.Run([&] {
-    CHECK(omp_get_num_threads() == param_.preprocess_threads);
-    int tid = omp_get_thread_num();
-    // dmlc::RecordIOChunkReader reader(*chunk, tid, param_.preprocess_threads);
-    ImageRecordIO rec;
-    dmlc::InputSplit::Blob blob;
-    // image data
-    InstVector<DType> &out_tmp = temp_[tid];
-    out_tmp.Clear();
-    while (true) {
-      bool reader_has_data;
-      size_t idx;
-      #pragma omp critical
-      {
-        reader_has_data = reader.NextRecord(&blob);
-        if (reader_has_data) {
-          idx = gl_idx++;
-          if (idx >= batch_param_.batch_size) {
-            inst_order_.push_back(std::make_pair(tid, out_tmp.Size()));
+      CHECK(omp_get_num_threads() == param_.preprocess_threads);
+      int tid = omp_get_thread_num();
+      // dmlc::RecordIOChunkReader reader(*chunk, tid, param_.preprocess_threads);
+      ImageRecordIO rec;
+      dmlc::InputSplit::Blob blob;
+      // image data
+      InstVector<DType>& out_tmp = temp_[tid];
+      out_tmp.Clear();
+      while (true) {
+        bool reader_has_data;
+        size_t idx;
+#pragma omp critical
+        {
+          reader_has_data = reader.NextRecord(&blob);
+          if (reader_has_data) {
+            idx = gl_idx++;
+            if (idx >= batch_param_.batch_size) {
+              inst_order_.push_back(std::make_pair(tid, out_tmp.Size()));
+            }
           }
         }
-      }
-      if (!reader_has_data) break;
-      // Opencv decode and augments
-      cv::Mat res;
-      rec.Load(blob.dptr, blob.size);
-      cv::Mat buf(1, rec.content_size, CV_8U, rec.content);
-
-      // If augmentation seed is supplied
-      // Re-seed RNG to guarantee reproducible results
-      if (param_.seed_aug.has_value()) {
-        prnds_[tid]->seed(idx + param_.seed_aug.value() + kRandMagic);
-      }
+        if (!reader_has_data)
+          break;
+        // Opencv decode and augments
+        cv::Mat res;
+        rec.Load(blob.dptr, blob.size);
+        cv::Mat buf(1, rec.content_size, CV_8U, rec.content);
+
+        // If augmentation seed is supplied
+        // Re-seed RNG to guarantee reproducible results
+        if (param_.seed_aug.has_value()) {
+          prnds_[tid]->seed(idx + param_.seed_aug.value() + kRandMagic);
+        }
 
-      switch (param_.data_shape[0]) {
-       case 1:
+        switch (param_.data_shape[0]) {
+          case 1:
 #if MXNET_USE_LIBJPEG_TURBO
-        res = TJimdecode(buf, 0);
+            res = TJimdecode(buf, 0);
 #else
-        res = cv::imdecode(buf, 0);
+            res = cv::imdecode(buf, 0);
 #endif
-        break;
-       case 3:
+            break;
+          case 3:
 #if MXNET_USE_LIBJPEG_TURBO
-        res = TJimdecode(buf, 1);
+            res = TJimdecode(buf, 1);
 #else
-        res = cv::imdecode(buf, 1);
+            res = cv::imdecode(buf, 1);
 #endif
-        break;
-       case 4:
-        // -1 to keep the number of channel of the encoded image, and not force gray or color.
-        res = cv::imdecode(buf, -1);
-        CHECK_EQ(res.channels(), 4)
-          << "Invalid image with index " << rec.image_index()
-          << ". Expected 4 channels, got " << res.channels();
-        break;
-       default:
-        LOG(FATAL) << "Invalid output shape " << param_.data_shape;
-      }
-      const int n_channels = res.channels();
-      // load label before augmentations
-      std::vector<float> label_buf;
-      if (label_map_ != nullptr) {
-        label_buf = label_map_->FindCopy(rec.image_index());
-      } else if (rec.label != nullptr) {
-        CHECK_EQ(param_.label_width, rec.num_label)
-          << "rec file provide " << rec.num_label << "-dimensional label "
-             "but label_width is set to " << param_.label_width;
-        label_buf.assign(rec.label, rec.label + rec.num_label);
-      } else {
-        CHECK_EQ(param_.label_width, 1)
-          << "label_width must be 1 unless an imglist is provided "
-             "or the rec file is packed with multi dimensional label";
-        label_buf.assign(&rec.header.label, &rec.header.label + 1);
-      }
-      for (auto& aug : augmenters_[tid]) {
-        res = aug->Process(res, &label_buf, prnds_[tid].get());
-      }
-      mshadow::Tensor<cpu, 3, DType> data;
-      if (idx < batch_param_.batch_size) {
-        data = mshadow::Tensor<cpu, 3, DType>(data_dptr + idx*unit_size_[0],
-          mshadow::Shape3(n_channels, res.rows, res.cols));
-      } else {
-        out_tmp.Push(static_cast<size_t>(rec.image_index()),
-                 mshadow::Shape3(n_channels, res.rows, res.cols),
-                 mshadow::Shape1(param_.label_width));
-        data = out_tmp.data().Back();
-      }
+            break;
+          case 4:
+            // -1 to keep the number of channel of the encoded image, and not force gray or color.
+            res = cv::imdecode(buf, -1);
+            CHECK_EQ(res.channels(), 4) << "Invalid image with index " << rec.image_index()
+                                        << ". Expected 4 channels, got " << res.channels();
+            break;
+          default:
+            LOG(FATAL) << "Invalid output shape " << param_.data_shape;
+        }
+        const int n_channels = res.channels();
+        // load label before augmentations
+        std::vector<float> label_buf;
+        if (label_map_ != nullptr) {
+          label_buf = label_map_->FindCopy(rec.image_index());
+        } else if (rec.label != nullptr) {
+          CHECK_EQ(param_.label_width, rec.num_label) << "rec file provide " << rec.num_label
+                                                      << "-dimensional label "
+                                                         "but label_width is set to "
+                                                      << param_.label_width;
+          label_buf.assign(rec.label, rec.label + rec.num_label);
+        } else {
+          CHECK_EQ(param_.label_width, 1)
+              << "label_width must be 1 unless an imglist is provided "
+                 "or the rec file is packed with multi dimensional label";
+          label_buf.assign(&rec.header.label, &rec.header.label + 1);
+        }
+        for (auto& aug : augmenters_[tid]) {
+          res = aug->Process(res, &label_buf, prnds_[tid].get());
+        }
+        mshadow::Tensor<cpu, 3, DType> data;
+        if (idx < batch_param_.batch_size) {
+          data = mshadow::Tensor<cpu, 3, DType>(data_dptr + idx * unit_size_[0],
+                                                mshadow::Shape3(n_channels, res.rows, res.cols));
+        } else {
+          out_tmp.Push(static_cast<size_t>(rec.image_index()),
+                       mshadow::Shape3(n_channels, res.rows, res.cols),
+                       mshadow::Shape1(param_.label_width));
+          data = out_tmp.data().Back();
+        }
 
-      std::uniform_real_distribution<float> rand_uniform(0, 1);
-      std::bernoulli_distribution coin_flip(0.5);
-      bool is_mirrored = (normalize_param_.rand_mirror && coin_flip(*(prnds_[tid])))
-                         || normalize_param_.mirror;
-      float contrast_scaled = 1;
-      float illumination_scaled = 0;
-      if (!std::is_same<DType, uint8_t>::value) {
-        contrast_scaled =
-          (rand_uniform(*(prnds_[tid])) * normalize_param_.max_random_contrast * 2
-          - normalize_param_.max_random_contrast + 1)*normalize_param_.scale;
-        illumination_scaled =
-          (rand_uniform(*(prnds_[tid])) * normalize_param_.max_random_illumination * 2
-          - normalize_param_.max_random_illumination) * normalize_param_.scale;
-      }
-      // For RGB or RGBA data, swap the B and R channel:
-      // OpenCV store as BGR (or BGRA) and we want RGB (or RGBA)
-      if (n_channels == 1) {
-        ProcessImage<1>(res, &data, is_mirrored, contrast_scaled, illumination_scaled);
-      } else if (n_channels == 3) {
-        ProcessImage<3>(res, &data, is_mirrored, contrast_scaled, illumination_scaled);
-      } else if (n_channels == 4) {
-        ProcessImage<4>(res, &data, is_mirrored, contrast_scaled, illumination_scaled);
-      }
+        std::uniform_real_distribution<float> rand_uniform(0, 1);
+        std::bernoulli_distribution coin_flip(0.5);
+        bool is_mirrored =
+            (normalize_param_.rand_mirror && coin_flip(*(prnds_[tid]))) || normalize_param_.mirror;
+        float contrast_scaled     = 1;
+        float illumination_scaled = 0;
+        if (!std::is_same<DType, uint8_t>::value) {
+          contrast_scaled =
+              (rand_uniform(*(prnds_[tid])) * normalize_param_.max_random_contrast * 2 -
+               normalize_param_.max_random_contrast + 1) *
+              normalize_param_.scale;
+          illumination_scaled =
+              (rand_uniform(*(prnds_[tid])) * normalize_param_.max_random_illumination * 2 -
+               normalize_param_.max_random_illumination) *
+              normalize_param_.scale;
+        }
+        // For RGB or RGBA data, swap the B and R channel:
+        // OpenCV store as BGR (or BGRA) and we want RGB (or RGBA)
+        if (n_channels == 1) {
+          ProcessImage<1>(res, &data, is_mirrored, contrast_scaled, illumination_scaled);
+        } else if (n_channels == 3) {
+          ProcessImage<3>(res, &data, is_mirrored, contrast_scaled, illumination_scaled);
+        } else if (n_channels == 4) {
+          ProcessImage<4>(res, &data, is_mirrored, contrast_scaled, illumination_scaled);
+        }
 
-      mshadow::Tensor<cpu, 1, real_t> label;
-      if (idx < batch_param_.batch_size) {
-        label = mshadow::Tensor<cpu, 1, real_t>(label_dptr + idx*unit_size_[1],
-          mshadow::Shape1(param_.label_width));
-      } else {
-        label = out_tmp.label().Back();
-      }
+        mshadow::Tensor<cpu, 1, real_t> label;
+        if (idx < batch_param_.batch_size) {
+          label = mshadow::Tensor<cpu, 1, real_t>(label_dptr + idx * unit_size_[1],
+                                                  mshadow::Shape1(param_.label_width));
+        } else {
+          label = out_tmp.label().Back();
+        }
 
-      mshadow::Copy(label, mshadow::Tensor<cpu, 1>(dmlc::BeginPtr(label_buf),
-        mshadow::Shape1(label_buf.size())));
-      res.release();
-    }
-  });
+        mshadow::Copy(
+            label,
+            mshadow::Tensor<cpu, 1>(dmlc::BeginPtr(label_buf), mshadow::Shape1(label_buf.size())));
+        res.release();
+      }
+    });
   }
   omp_exc_.Rethrow();
   return (std::min(static_cast<size_t>(batch_param_.batch_size), gl_idx) - current_size);
@@ -665,118 +661,117 @@ inline size_t ImageRecordIOParser2<DType>::ParseChunk(DType* data_dptr, real_t*
 }
 
 // create mean image.
-template<typename DType>
+template <typename DType>
 inline void ImageRecordIOParser2<DType>::CreateMeanImg() {
-    if (param_.verbose) {
-      LOG(INFO) << "Cannot find " << normalize_param_.mean_img
-                << ": create mean image, this will take some time...";
-    }
-    double start = dmlc::GetTime();
-    dmlc::InputSplit::Blob chunk;
-    size_t imcnt = 0;  // NOLINT(*)
-    while (source_->NextChunk(&chunk)) {
-      inst_order_.clear();
-      // Parse chunk w/o putting anything in out
-      ParseChunk(nullptr, nullptr, batch_param_.batch_size, &chunk);
-      for (auto place : inst_order_) {
-        mshadow::Tensor<cpu, 3> outimg =
+  if (param_.verbose) {
+    LOG(INFO) << "Cannot find " << normalize_param_.mean_img
+              << ": create mean image, this will take some time...";
+  }
+  double start = dmlc::GetTime();
+  dmlc::InputSplit::Blob chunk;
+  size_t imcnt = 0;  // NOLINT(*)
+  while (source_->NextChunk(&chunk)) {
+    inst_order_.clear();
+    // Parse chunk w/o putting anything in out
+    ParseChunk(nullptr, nullptr, batch_param_.batch_size, &chunk);
+    for (auto place : inst_order_) {
+      mshadow::Tensor<cpu, 3> outimg =
           temp_[place.first][place.second].data[0].template get<cpu, 3, real_t>();
-        if (imcnt == 0) {
-          meanimg_.Resize(outimg.shape_);
-          mshadow::Copy(meanimg_, outimg);
-        } else {
-          meanimg_ += outimg;
-        }
-        imcnt += 1;
-        double elapsed = dmlc::GetTime() - start;
-        if (imcnt % 10000L == 0 && param_.verbose) {
-          LOG(INFO) << imcnt << " images processed, " << elapsed << " sec elapsed";
-        }
+      if (imcnt == 0) {
+        meanimg_.Resize(outimg.shape_);
+        mshadow::Copy(meanimg_, outimg);
+      } else {
+        meanimg_ += outimg;
+      }
+      imcnt += 1;
+      double elapsed = dmlc::GetTime() - start;
+      if (imcnt % 10000L == 0 && param_.verbose) {
+        LOG(INFO) << imcnt << " images processed, " << elapsed << " sec elapsed";
       }
     }
-    meanimg_ *= (1.0f / imcnt);
-    // save as mxnet python compatible format.
-    TBlob tmp = meanimg_;
-    {
-      std::unique_ptr<dmlc::Stream> fo(
-          dmlc::Stream::Create(normalize_param_.mean_img.c_str(), "w"));
-      NDArray::Save(fo.get(),
-                    {NDArray(tmp, 0)},
-                    {"mean_img"});
-    }
-    if (param_.verbose) {
-      LOG(INFO) << "Save mean image to " << normalize_param_.mean_img << "..";
-    }
-    meanfile_ready_ = true;
-    this->BeforeFirst();
+  }
+  meanimg_ *= (1.0f / imcnt);
+  // save as mxnet python compatible format.
+  TBlob tmp = meanimg_;
+  {
+    std::unique_ptr<dmlc::Stream> fo(dmlc::Stream::Create(normalize_param_.mean_img.c_str(), "w"));
+    NDArray::Save(fo.get(), {NDArray(tmp, 0)}, {"mean_img"});
+  }
+  if (param_.verbose) {
+    LOG(INFO) << "Save mean image to " << normalize_param_.mean_img << "..";
+  }
+  meanfile_ready_ = true;
+  this->BeforeFirst();
 }
 
-template<typename DType = real_t>
+template <typename DType = real_t>
 class ImageRecordIter2 : public IIterator<DataBatch> {
  public:
-    ImageRecordIter2()  = default;
+  ImageRecordIter2() = default;
 
-    ~ImageRecordIter2() override {
-      iter_.Destroy();
-    }
+  ~ImageRecordIter2() override {
+    iter_.Destroy();
+  }
 
-    void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
-      prefetch_param_.InitAllowUnknown(kwargs);
-      parser_.Init(kwargs);
-      // maximum prefetch threaded iter internal size
-      const int kMaxPrefetchBuffer = 16;
-      // init thread iter
-      iter_.set_max_capacity(kMaxPrefetchBuffer);
-      // init thread iter
-      iter_.Init([this](DataBatch **dptr) {
+  void Init(const std::vector<std::pair<std::string, std::string>>& kwargs) override {
+    prefetch_param_.InitAllowUnknown(kwargs);
+    parser_.Init(kwargs);
+    // maximum prefetch threaded iter internal size
+    const int kMaxPrefetchBuffer = 16;
+    // init thread iter
+    iter_.set_max_capacity(kMaxPrefetchBuffer);
+    // init thread iter
+    iter_.Init(
+        [this](DataBatch** dptr) {
           if (*dptr == nullptr) {
             *dptr = new DataBatch();
           }
           return parser_.ParseNext(*dptr);
-          },
-          [this]() { parser_.BeforeFirst(); });
-    }
+        },
+        [this]() { parser_.BeforeFirst(); });
+  }
 
-    void BeforeFirst() override {
-      iter_.BeforeFirst();
-    }
+  void BeforeFirst() override {
+    iter_.BeforeFirst();
+  }
 
-    // From iter_prefetcher.h
-    bool Next() override {
-      if (out_ != nullptr) {
-        recycle_queue_.push(out_); out_ = nullptr;
-      }
-      // do recycle
-      if (recycle_queue_.size() == prefetch_param_.prefetch_buffer) {
-        DataBatch *old_batch =  recycle_queue_.front();
-        // can be more efficient on engine
-        for (NDArray& arr : old_batch->data) {
-          arr.WaitToWrite();
-        }
-        recycle_queue_.pop();
-        iter_.Recycle(&old_batch);
+  // From iter_prefetcher.h
+  bool Next() override {
+    if (out_ != nullptr) {
+      recycle_queue_.push(out_);
+      out_ = nullptr;
+    }
+    // do recycle
+    if (recycle_queue_.size() == prefetch_param_.prefetch_buffer) {
+      DataBatch* old_batch = recycle_queue_.front();
+      // can be more efficient on engine
+      for (NDArray& arr : old_batch->data) {
+        arr.WaitToWrite();
       }
-      return iter_.Next(&out_);
+      recycle_queue_.pop();
+      iter_.Recycle(&old_batch);
     }
+    return iter_.Next(&out_);
+  }
 
-    const DataBatch &Value() const override {
-      return *out_;
-    }
+  const DataBatch& Value() const override {
+    return *out_;
+  }
 
  private:
-    /*! \brief Backend thread */
-    dmlc::ThreadedIter<DataBatch> iter_;
-    /*! \brief Parameters */
-    PrefetcherParam prefetch_param_;
-    /*! \brief output data */
-    DataBatch *out_{nullptr};
-    /*! \brief queue to be recycled */
-    std::queue<DataBatch*> recycle_queue_;
-    /* \brief parser */
-    ImageRecordIOParser2<DType> parser_;
+  /*! \brief Backend thread */
+  dmlc::ThreadedIter<DataBatch> iter_;
+  /*! \brief Parameters */
+  PrefetcherParam prefetch_param_;
+  /*! \brief output data */
+  DataBatch* out_{nullptr};
+  /*! \brief queue to be recycled */
+  std::queue<DataBatch*> recycle_queue_;
+  /* \brief parser */
+  ImageRecordIOParser2<DType> parser_;
 };
 
-template<typename DType = real_t>
+template <typename DType = real_t>
 class ImageRecordIter2CPU : public IIterator<DataBatch> {
  public:
   ImageRecordIter2CPU() {
@@ -793,22 +788,28 @@ class ImageRecordIter2CPU : public IIterator<DataBatch> {
     parser_.Init(kwargs);
   }
 
-  void BeforeFirst() override { parser_.BeforeFirst(); }
+  void BeforeFirst() override {
+    parser_.BeforeFirst();
+  }
 
   // From iter_prefetcher.h
   bool Next() override {
-    bool result = false;
+    bool result       = false;
     const auto engine = Engine::Get();
-    engine->PushSync(
-        [this, &result](RunContext ctx) {
-          result = this->parser_.ParseNext(out_);
-        },
-        Context::CPU(), {}, {var_}, FnProperty::kNormal, 0, "DataLoader");
+    engine->PushSync([this, &result](RunContext ctx) { result = this->parser_.ParseNext(out_); },
+                     Context::CPU(),
+                     {},
+                     {var_},
+                     FnProperty::kNormal,
+                     0,
+                     "DataLoader");
     engine->WaitForVar(var_);
     return result;
   }
 
-  const DataBatch& Value() const override { return *out_; }
+  const DataBatch& Value() const override {
+    return *out_;
+  }
 
  private:
   /*! \brief Backend thread */
@@ -825,7 +826,8 @@ class ImageRecordIter2CPU : public IIterator<DataBatch> {
 class ImageRecordIter2Wrapper : public IIterator<DataBatch> {
  public:
   ~ImageRecordIter2Wrapper() override {
-    if (record_iter_) delete record_iter_;
+    if (record_iter_)
+      delete record_iter_;
   }
   void Init(const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     PrefetcherParam prefetch_param;
@@ -867,25 +869,27 @@ class ImageRecordIter2Wrapper : public IIterator<DataBatch> {
       }
     }
     record_iter_->Init(kwargs);
-    }
+  }
 
-    void BeforeFirst() override {
-      record_iter_->BeforeFirst();
-    }
+  void BeforeFirst() override {
+    record_iter_->BeforeFirst();
+  }
 
-    // From iter_prefetcher.h
-    bool Next() override { return record_iter_->Next(); }
+  // From iter_prefetcher.h
+  bool Next() override {
+    return record_iter_->Next();
+  }
 
-    const DataBatch &Value() const override {
-      return record_iter_->Value();
-    }
+  const DataBatch& Value() const override {
+    return record_iter_->Value();
+  }
 
  private:
   IIterator<DataBatch>* record_iter_ = nullptr;
 };
 
 MXNET_REGISTER_IO_ITER(ImageRecordIter)
-.describe(R"code(Iterates on image RecordIO files
+    .describe(R"code(Iterates on image RecordIO files
 
 Reads batches of images from .rec RecordIO files. One can use ``im2rec.py`` tool
 (in tools/) to pack raw image files into RecordIO files. This iterator is less
@@ -909,18 +913,16 @@ Example::
   data_iter.reset() # To restart the iterator from the beginning.
 
 )code" ADD_FILELINE)
-.add_arguments(ImageRecParserParam::__FIELDS__())
-.add_arguments(ImageRecordParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.add_arguments(ListDefaultAugParams())
-.add_arguments(ImageNormalizeParam::__FIELDS__())
-.set_body([]() {
-    return new ImageRecordIter2Wrapper();
-    });
+    .add_arguments(ImageRecParserParam::__FIELDS__())
+    .add_arguments(ImageRecordParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .add_arguments(ListDefaultAugParams())
+    .add_arguments(ImageNormalizeParam::__FIELDS__())
+    .set_body([]() { return new ImageRecordIter2Wrapper(); });
 
 MXNET_REGISTER_IO_ITER(ImageRecordUInt8Iter)
-.describe(R"code(Iterating on image RecordIO files
+    .describe(R"code(Iterating on image RecordIO files
 
 .. note:: ImageRecordUInt8Iter is deprecated. Use ImageRecordIter(dtype='uint8') instead.
 
@@ -928,17 +930,15 @@ This iterator is identical to ``ImageRecordIter`` except for using ``uint8`` as
 the data type instead of ``float``.
 
 )code" ADD_FILELINE)
-.add_arguments(ImageRecParserParam::__FIELDS__())
-.add_arguments(ImageRecordParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.add_arguments(ListDefaultAugParams())
-.set_body([]() {
-    return new ImageRecordIter2<uint8_t>();
-  });
+    .add_arguments(ImageRecParserParam::__FIELDS__())
+    .add_arguments(ImageRecordParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .add_arguments(ListDefaultAugParams())
+    .set_body([]() { return new ImageRecordIter2<uint8_t>(); });
 
 MXNET_REGISTER_IO_ITER(ImageRecordInt8Iter)
-.describe(R"code(Iterating on image RecordIO files
+    .describe(R"code(Iterating on image RecordIO files
 
 .. note:: ``ImageRecordInt8Iter`` is deprecated. Use ImageRecordIter(dtype='int8') instead.
 
@@ -946,14 +946,12 @@ This iterator is identical to ``ImageRecordIter`` except for using ``int8`` as
 the data type instead of ``float``.
 
 )code" ADD_FILELINE)
-.add_arguments(ImageRecParserParam::__FIELDS__())
-.add_arguments(ImageRecordParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.add_arguments(ListDefaultAugParams())
-.set_body([]() {
-    return new ImageRecordIter2<int8_t>();
-  });
+    .add_arguments(ImageRecParserParam::__FIELDS__())
+    .add_arguments(ImageRecordParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .add_arguments(ListDefaultAugParams())
+    .set_body([]() { return new ImageRecordIter2<int8_t>(); });
 
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_libsvm.cc b/src/io/iter_libsvm.cc
index 0965bfc5192e..3e0f079c9138 100644
--- a/src/io/iter_libsvm.cc
+++ b/src/io/iter_libsvm.cc
@@ -49,24 +49,24 @@ struct LibSVMIterParam : public dmlc::Parameter<LibSVMIterParam> {
   DMLC_DECLARE_PARAMETER(LibSVMIterParam) {
     DMLC_DECLARE_FIELD(data_libsvm)
         .describe("The input zero-base indexed LibSVM data file or a directory path.");
-    DMLC_DECLARE_FIELD(data_shape)
-        .describe("The shape of one example.");
-    DMLC_DECLARE_FIELD(label_libsvm).set_default("NULL")
-        .describe("The input LibSVM label file or a directory path. "
-                  "If NULL, all labels will be read from ``data_libsvm``.");
+    DMLC_DECLARE_FIELD(data_shape).describe("The shape of one example.");
+    DMLC_DECLARE_FIELD(label_libsvm)
+        .set_default("NULL")
+        .describe(
+            "The input LibSVM label file or a directory path. "
+            "If NULL, all labels will be read from ``data_libsvm``.");
     index_t shape1[] = {1};
-    DMLC_DECLARE_FIELD(label_shape).set_default(mxnet::TShape(shape1, shape1 + 1))
+    DMLC_DECLARE_FIELD(label_shape)
+        .set_default(mxnet::TShape(shape1, shape1 + 1))
         .describe("The shape of one label.");
-    DMLC_DECLARE_FIELD(num_parts).set_default(1)
-        .describe("partition the data into multiple parts");
-    DMLC_DECLARE_FIELD(part_index).set_default(0)
-        .describe("the index of the part will read");
+    DMLC_DECLARE_FIELD(num_parts).set_default(1).describe("partition the data into multiple parts");
+    DMLC_DECLARE_FIELD(part_index).set_default(0).describe("the index of the part will read");
   }
 };
 
-class LibSVMIter: public SparseIIterator<DataInst> {
+class LibSVMIter : public SparseIIterator<DataInst> {
  public:
-  LibSVMIter() = default;
+  LibSVMIter()           = default;
   ~LibSVMIter() override = default;
 
   // intialize iterator loads data in
@@ -75,18 +75,16 @@ class LibSVMIter: public SparseIIterator<DataInst> {
     CHECK_EQ(param_.data_shape.ndim(), 1) << "dimension of data_shape is expected to be 1";
     CHECK_GT(param_.num_parts, 0) << "number of parts should be positive";
     CHECK_GE(param_.part_index, 0) << "part index should be non-negative";
-    data_parser_.reset(dmlc::Parser<uint64_t>::Create(param_.data_libsvm.c_str(),
-                                                      param_.part_index,
-                                                      param_.num_parts, "libsvm"));
+    data_parser_.reset(dmlc::Parser<uint64_t>::Create(
+        param_.data_libsvm.c_str(), param_.part_index, param_.num_parts, "libsvm"));
     if (param_.label_libsvm != "NULL") {
-      label_parser_.reset(dmlc::Parser<uint64_t>::Create(param_.label_libsvm.c_str(),
-                                                         param_.part_index,
-                                                         param_.num_parts, "libsvm"));
+      label_parser_.reset(dmlc::Parser<uint64_t>::Create(
+          param_.label_libsvm.c_str(), param_.part_index, param_.num_parts, "libsvm"));
       CHECK_GT(param_.label_shape.Size(), 1)
-        << "label_shape is not expected to be (1,) when param_.label_libsvm is set.";
+          << "label_shape is not expected to be (1,) when param_.label_libsvm is set.";
     } else {
       CHECK_EQ(param_.label_shape.Size(), 1)
-        << "label_shape is expected to be (1,) when param_.label_libsvm is NULL";
+          << "label_shape is expected to be (1,) when param_.label_libsvm is NULL";
     }
     // both data and label are of CSRStorage in libsvm format
     if (param_.label_shape.Size() > 1) {
@@ -104,17 +102,19 @@ class LibSVMIter: public SparseIIterator<DataInst> {
     }
     data_ptr_ = label_ptr_ = 0;
     data_size_ = label_size_ = 0;
-    inst_counter_ = 0;
-    end_ = false;
+    inst_counter_            = 0;
+    end_                     = false;
   }
 
   bool Next() override {
-    if (end_) return false;
+    if (end_)
+      return false;
     while (data_ptr_ >= data_size_) {
       if (!data_parser_->Next()) {
-        end_ = true; return false;
+        end_ = true;
+        return false;
       }
-      data_ptr_ = 0;
+      data_ptr_  = 0;
       data_size_ = data_parser_->Value().size;
     }
     out_.index = inst_counter_++;
@@ -129,7 +129,7 @@ class LibSVMIter: public SparseIIterator<DataInst> {
       while (label_ptr_ >= label_size_) {
         CHECK(label_parser_->Next())
             << "Data LibSVM's row is smaller than the number of rows in label_libsvm";
-        label_ptr_ = 0;
+        label_ptr_  = 0;
         label_size_ = label_parser_->Value().size;
       }
       CHECK_LT(label_ptr_, label_size_);
@@ -144,17 +144,19 @@ class LibSVMIter: public SparseIIterator<DataInst> {
     return true;
   }
 
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return out_;
   }
 
   const NDArrayStorageType GetStorageType(bool is_data) const override {
-    if (is_data) return kCSRStorage;
+    if (is_data)
+      return kCSRStorage;
     return param_.label_shape.Size() > 1 ? kCSRStorage : kDefaultStorage;
   }
 
   const mxnet::TShape GetShape(bool is_data) const override {
-    if (is_data) return param_.data_shape;
+    if (is_data)
+      return param_.data_shape;
     return param_.label_shape;
   }
 
@@ -162,13 +164,13 @@ class LibSVMIter: public SparseIIterator<DataInst> {
   inline TBlob AsDataBlob(const dmlc::Row<uint64_t>& row) {
     const real_t* ptr = row.value;
     mxnet::TShape shape(mshadow::Shape1(row.length));
-    return TBlob((real_t*) ptr, shape, cpu::kDevMask);  // NOLINT(*)
+    return TBlob((real_t*)ptr, shape, cpu::kDevMask);  // NOLINT(*)
   }
 
   inline TBlob AsIdxBlob(const dmlc::Row<uint64_t>& row) {
     const uint64_t* ptr = row.index;
     mxnet::TShape shape(mshadow::Shape1(row.length));
-    return TBlob((int64_t*) ptr, shape, cpu::kDevMask, mshadow::kInt64);  // NOLINT(*)
+    return TBlob((int64_t*)ptr, shape, cpu::kDevMask, mshadow::kInt64);  // NOLINT(*)
   }
 
   inline TBlob AsIndPtrPlaceholder(const dmlc::Row<uint64_t>& row) {
@@ -177,7 +179,7 @@ class LibSVMIter: public SparseIIterator<DataInst> {
 
   inline TBlob AsScalarLabelBlob(const dmlc::Row<uint64_t>& row) {
     const real_t* ptr = row.label;
-    return TBlob((real_t*) ptr, mshadow::Shape1(1), cpu::kDevMask);  // NOLINT(*)
+    return TBlob((real_t*)ptr, mshadow::Shape1(1), cpu::kDevMask);  // NOLINT(*)
   }
 
   LibSVMIterParam param_;
@@ -194,11 +196,10 @@ class LibSVMIter: public SparseIIterator<DataInst> {
   std::unique_ptr<dmlc::Parser<uint64_t> > data_parser_;
 };
 
-
 DMLC_REGISTER_PARAMETER(LibSVMIterParam);
 
 MXNET_REGISTER_IO_ITER(LibSVMIter)
-.describe(R"code(Returns the LibSVM iterator which returns data with `csr`
+    .describe(R"code(Returns the LibSVM iterator which returns data with `csr`
 storage type. This iterator is experimental and should be used with care.
 
 The input data is stored in a format similar to LibSVM file format, except that the **indices
@@ -296,14 +297,10 @@ Example::
    [ 0.          0.          1.2 ]]
 
 )code" ADD_FILELINE)
-.add_arguments(LibSVMIterParam::__FIELDS__())
-.add_arguments(BatchParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.set_body([]() {
-    return new SparsePrefetcherIter(
-        new SparseBatchLoader(
-            new LibSVMIter()));
-  });
+    .add_arguments(LibSVMIterParam::__FIELDS__())
+    .add_arguments(BatchParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .set_body([]() { return new SparsePrefetcherIter(new SparseBatchLoader(new LibSVMIter())); });
 
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_mnist.cc b/src/io/iter_mnist.cc
index bf590170ca9f..20c28fbd9021 100644
--- a/src/io/iter_mnist.cc
+++ b/src/io/iter_mnist.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file iter_mnist.cc
  * \brief register mnist iterator
-*/
+ */
 #include <mxnet/io.h>
 #include <mxnet/base.h>
 #include <dmlc/io.h>
@@ -56,35 +56,36 @@ struct MNISTParam : public dmlc::Parameter<MNISTParam> {
   int part_index;
   // declare parameters
   DMLC_DECLARE_PARAMETER(MNISTParam) {
-    DMLC_DECLARE_FIELD(image).set_default("./train-images-idx3-ubyte")
+    DMLC_DECLARE_FIELD(image)
+        .set_default("./train-images-idx3-ubyte")
         .describe("Dataset Param: Mnist image path.");
-    DMLC_DECLARE_FIELD(label).set_default("./train-labels-idx1-ubyte")
+    DMLC_DECLARE_FIELD(label)
+        .set_default("./train-labels-idx1-ubyte")
         .describe("Dataset Param: Mnist label path.");
-    DMLC_DECLARE_FIELD(batch_size).set_lower_bound(1).set_default(128)
+    DMLC_DECLARE_FIELD(batch_size)
+        .set_lower_bound(1)
+        .set_default(128)
         .describe("Batch Param: Batch Size.");
-    DMLC_DECLARE_FIELD(shuffle).set_default(true)
-        .describe("Augmentation Param: Whether to shuffle data.");
-    DMLC_DECLARE_FIELD(flat).set_default(false)
-        .describe("Augmentation Param: Whether to flat the data into 1D.");
-    DMLC_DECLARE_FIELD(seed).set_default(0)
-        .describe("Augmentation Param: Random Seed.");
-    DMLC_DECLARE_FIELD(silent).set_default(false)
-        .describe("Auxiliary Param: Whether to print out data info.");
-    DMLC_DECLARE_FIELD(num_parts).set_default(1)
-        .describe("partition the data into multiple parts");
-    DMLC_DECLARE_FIELD(part_index).set_default(0)
-        .describe("the index of the part will read");
+    DMLC_DECLARE_FIELD(shuffle).set_default(true).describe(
+        "Augmentation Param: Whether to shuffle data.");
+    DMLC_DECLARE_FIELD(flat).set_default(false).describe(
+        "Augmentation Param: Whether to flat the data into 1D.");
+    DMLC_DECLARE_FIELD(seed).set_default(0).describe("Augmentation Param: Random Seed.");
+    DMLC_DECLARE_FIELD(silent).set_default(false).describe(
+        "Auxiliary Param: Whether to print out data info.");
+    DMLC_DECLARE_FIELD(num_parts).set_default(1).describe("partition the data into multiple parts");
+    DMLC_DECLARE_FIELD(part_index).set_default(0).describe("the index of the part will read");
   }
 };
 
-class MNISTIter: public IIterator<TBlobBatch> {
+class MNISTIter : public IIterator<TBlobBatch> {
  public:
-  MNISTIter()  {
+  MNISTIter() {
     img_.dptr_ = nullptr;
     out_.data.resize(2);
   }
   ~MNISTIter() override {
-    delete []img_.dptr_;
+    delete[] img_.dptr_;
   }
   // intialize iterator loads data in
   void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
@@ -98,20 +99,21 @@ class MNISTIter: public IIterator<TBlobBatch> {
       batch_data_.shape_ = mshadow::Shape4(param_.batch_size, 1, img_.size(1), img_.size(2));
     }
     out_.data.clear();
-    batch_label_.shape_ = mshadow::Shape2(param_.batch_size, 1);
+    batch_label_.shape_  = mshadow::Shape2(param_.batch_size, 1);
     batch_label_.stride_ = 1;
-    batch_data_.stride_ = batch_data_.size(3);
-    out_.batch_size = param_.batch_size;
-    if (param_.shuffle) this->Shuffle();
+    batch_data_.stride_  = batch_data_.size(3);
+    out_.batch_size      = param_.batch_size;
+    if (param_.shuffle)
+      this->Shuffle();
     if (param_.silent == 0) {
       mxnet::TShape s;
       s = batch_data_.shape_;
       if (param_.flat) {
-        LOG(INFO) << "MNISTIter: load " << (unsigned)img_.size(0) << " images, shuffle="
-            << param_.shuffle << ", shape=" << s.FlatTo2D();
+        LOG(INFO) << "MNISTIter: load " << (unsigned)img_.size(0)
+                  << " images, shuffle=" << param_.shuffle << ", shape=" << s.FlatTo2D();
       } else {
-        LOG(INFO) << "MNISTIter: load " << (unsigned)img_.size(0) << " images, shuffle="
-            << param_.shuffle << ", shape=" << s;
+        LOG(INFO) << "MNISTIter: load " << (unsigned)img_.size(0)
+                  << " images, shuffle=" << param_.shuffle << ", shape=" << s;
       }
     }
   }
@@ -120,13 +122,13 @@ class MNISTIter: public IIterator<TBlobBatch> {
   }
   bool Next() override {
     if (loc_ + param_.batch_size <= img_.size(0)) {
-      batch_data_.dptr_ = img_[loc_].dptr_;
+      batch_data_.dptr_  = img_[loc_].dptr_;
       batch_label_.dptr_ = &labels_[loc_];
       out_.data.clear();
       if (param_.flat) {
-          out_.data.emplace_back(batch_data_.FlatTo2D());
+        out_.data.emplace_back(batch_data_.FlatTo2D());
       } else {
-          out_.data.emplace_back(batch_data_);
+        out_.data.emplace_back(batch_data_);
       }
       out_.data.emplace_back(batch_label_);
       loc_ += param_.batch_size;
@@ -135,25 +137,23 @@ class MNISTIter: public IIterator<TBlobBatch> {
       return false;
     }
   }
-  const TBlobBatch &Value() const override {
+  const TBlobBatch& Value() const override {
     return out_;
   }
 
  private:
-  inline void GetPart(int count, int* start, int *end) {
+  inline void GetPart(int count, int* start, int* end) {
     CHECK_GE(param_.part_index, 0);
     CHECK_GT(param_.num_parts, 0);
     CHECK_GT(param_.num_parts, param_.part_index);
 
-    *start = static_cast<int>(
-        static_cast<double>(count) / param_.num_parts * param_.part_index);
-    *end = static_cast<int>(
-        static_cast<double>(count) / param_.num_parts * (param_.part_index+1));
+    *start = static_cast<int>(static_cast<double>(count) / param_.num_parts * param_.part_index);
+    *end =
+        static_cast<int>(static_cast<double>(count) / param_.num_parts * (param_.part_index + 1));
   }
 
   inline void LoadImage() {
-    dmlc::SeekStream* stdimg
-        = dmlc::SeekStream::CreateForRead(param_.image.c_str());
+    dmlc::SeekStream* stdimg = dmlc::SeekStream::CreateForRead(param_.image.c_str());
     ReadInt(stdimg);
     int image_count = ReadInt(stdimg);
     int image_rows  = ReadInt(stdimg);
@@ -166,7 +166,7 @@ class MNISTIter: public IIterator<TBlobBatch> {
       stdimg->Seek(stdimg->Tell() + start * image_rows * image_cols);
     }
 
-    img_.shape_ = mshadow::Shape3(image_count, image_rows, image_cols);
+    img_.shape_  = mshadow::Shape3(image_count, image_rows, image_cols);
     img_.stride_ = img_.size(2);
 
     // allocate continuous memory
@@ -185,8 +185,7 @@ class MNISTIter: public IIterator<TBlobBatch> {
     delete stdimg;
   }
   inline void LoadLabel() {
-    dmlc::SeekStream* stdlabel
-        = dmlc::SeekStream::CreateForRead(param_.label.c_str());
+    dmlc::SeekStream* stdlabel = dmlc::SeekStream::CreateForRead(param_.label.c_str());
     ReadInt(stdlabel);
     int labels_count = ReadInt(stdlabel);
 
@@ -221,10 +220,9 @@ class MNISTIter: public IIterator<TBlobBatch> {
   }
 
  private:
-  inline static int ReadInt(dmlc::Stream *fi) {
+  inline static int ReadInt(dmlc::Stream* fi) {
     unsigned char buf[4];
-    CHECK(fi->Read(buf, sizeof(buf)) == sizeof(buf))
-        << "invalid mnist format";
+    CHECK(fi->Read(buf, sizeof(buf)) == sizeof(buf)) << "invalid mnist format";
 #ifdef _MSC_VER
     return (buf[0] << 24 | buf[1] << 16 | buf[2] << 8 | buf[3]);
 #else
@@ -258,12 +256,10 @@ class MNISTIter: public IIterator<TBlobBatch> {
 DMLC_REGISTER_PARAMETER(MNISTParam);
 
 MXNET_REGISTER_IO_ITER(MNISTIter)
-.describe("Iterating on the MNIST dataset." ADD_FILELINE)
-.add_arguments(MNISTParam::__FIELDS__())
-.add_arguments(PrefetcherParam::__FIELDS__())
-.set_body([]() {
-    return new PrefetcherIter(new MNISTIter());
-  });
+    .describe("Iterating on the MNIST dataset." ADD_FILELINE)
+    .add_arguments(MNISTParam::__FIELDS__())
+    .add_arguments(PrefetcherParam::__FIELDS__())
+    .set_body([]() { return new PrefetcherIter(new MNISTIter()); });
 
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_normalize.h b/src/io/iter_normalize.h
index 4bc7d53d2b76..eda7af445e7e 100644
--- a/src/io/iter_normalize.h
+++ b/src/io/iter_normalize.h
@@ -47,9 +47,7 @@ namespace io {
  */
 class ImageNormalizeIter : public IIterator<DataInst> {
  public:
-  explicit ImageNormalizeIter(IIterator<DataInst> *base)
-      : base_(base), meanfile_ready_(false) {
-  }
+  explicit ImageNormalizeIter(IIterator<DataInst>* base) : base_(base), meanfile_ready_(false) {}
 
   virtual void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) {
     param_.InitAllowUnknown(kwargs);
@@ -58,8 +56,7 @@ class ImageNormalizeIter : public IIterator<DataInst> {
     outimg_.set_pad(false);
     meanimg_.set_pad(false);
     if (param_.mean_img.length() != 0) {
-      std::unique_ptr<dmlc::Stream> fi(
-          dmlc::Stream::Create(param_.mean_img.c_str(), "r", true));
+      std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(param_.mean_img.c_str(), "r", true));
       if (fi.get() == nullptr) {
         this->CreateMeanImg();
       } else {
@@ -74,8 +71,7 @@ class ImageNormalizeIter : public IIterator<DataInst> {
           std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(param_.mean_img.c_str(), "r"));
           NDArray::Load(fi.get(), &data, &keys);
         }
-        CHECK_EQ(data.size(), 1U)
-            << "Invalid mean image file format";
+        CHECK_EQ(data.size(), 1U) << "Invalid mean image file format";
         data[0].WaitToRead();
         mshadow::Tensor<cpu, 3> src = data[0].data().get<cpu, 3, real_t>();
         meanimg_.Resize(src.shape_);
@@ -94,7 +90,8 @@ class ImageNormalizeIter : public IIterator<DataInst> {
   }
 
   virtual bool Next(void) {
-    if (!this->Next_()) return false;
+    if (!this->Next_())
+      return false;
     return true;
   }
 
@@ -118,13 +115,14 @@ class ImageNormalizeIter : public IIterator<DataInst> {
 
   /*! \brief internal next function, inlined for fater processing. */
   inline bool Next_(void) {
-    if (!base_->Next()) return false;
-    const DataInst &src = base_->Value();
+    if (!base_->Next())
+      return false;
+    const DataInst& src = base_->Value();
     this->SetOutImg(src);
     out_.data.resize(2);
-    out_.data[0] = outimg_;
-    out_.data[1] = src.data[1];
-    out_.index = src.index;
+    out_.data[0]    = outimg_;
+    out_.data[1]    = src.data[1];
+    out_.index      = src.index;
     out_.extra_data = src.extra_data;
     return true;
   }
@@ -132,7 +130,7 @@ class ImageNormalizeIter : public IIterator<DataInst> {
    * \brief Set the output image, after augmentation and normalization.
    * \param src The source image.
    */
-  inline void SetOutImg(const DataInst &src) {
+  inline void SetOutImg(const DataInst& src) {
     using namespace mshadow::expr;  // NOLINT(*)
 
     std::uniform_real_distribution<float> rand_uniform(0, 1);
@@ -150,59 +148,59 @@ class ImageNormalizeIter : public IIterator<DataInst> {
     switch (data.shape_[0]) {
       case 4:
         if (meanfile_ready_ && flip) {
-          outimg_[3] = mirror((data[3] - meanimg_[3]) * contrast + illumination)
-            * param_.scale / param_.std_a;
+          outimg_[3] = mirror((data[3] - meanimg_[3]) * contrast + illumination) * param_.scale /
+                       param_.std_a;
         } else if (meanfile_ready_ && (!flip)) {
-          outimg_[3] = ((data[3] - meanimg_[3]) * contrast + illumination)
-            * param_.scale / param_.std_a;
+          outimg_[3] =
+              ((data[3] - meanimg_[3]) * contrast + illumination) * param_.scale / param_.std_a;
         } else if (!meanfile_ready_ && flip) {
-          outimg_[3] = mirror((data[3] - param_.mean_a) * contrast + illumination)
-            * param_.scale / param_.std_a;
+          outimg_[3] = mirror((data[3] - param_.mean_a) * contrast + illumination) * param_.scale /
+                       param_.std_a;
         } else {
-          outimg_[3] = ((data[3] - param_.mean_a) * contrast + illumination)
-            * param_.scale / param_.std_a;
+          outimg_[3] =
+              ((data[3] - param_.mean_a) * contrast + illumination) * param_.scale / param_.std_a;
         }
       case 3:
         if (meanfile_ready_ && flip) {
-          outimg_[2] = mirror((data[2] - meanimg_[2]) * contrast + illumination)
-            * param_.scale / param_.std_b;
+          outimg_[2] = mirror((data[2] - meanimg_[2]) * contrast + illumination) * param_.scale /
+                       param_.std_b;
         } else if (meanfile_ready_ && (!flip)) {
-          outimg_[2] = ((data[2] - meanimg_[2]) * contrast + illumination)
-            * param_.scale / param_.std_b;
+          outimg_[2] =
+              ((data[2] - meanimg_[2]) * contrast + illumination) * param_.scale / param_.std_b;
         } else if (!meanfile_ready_ && flip) {
-          outimg_[2] = mirror((data[2] - param_.mean_b) * contrast + illumination)
-            * param_.scale / param_.std_b;
+          outimg_[2] = mirror((data[2] - param_.mean_b) * contrast + illumination) * param_.scale /
+                       param_.std_b;
         } else {
-          outimg_[2] = ((data[2] - param_.mean_b) * contrast + illumination)
-            * param_.scale / param_.std_b;
+          outimg_[2] =
+              ((data[2] - param_.mean_b) * contrast + illumination) * param_.scale / param_.std_b;
         }
       case 2:
         if (meanfile_ready_ && flip) {
-          outimg_[1] = mirror((data[1] - meanimg_[1]) * contrast + illumination)
-            * param_.scale / param_.std_g;
+          outimg_[1] = mirror((data[1] - meanimg_[1]) * contrast + illumination) * param_.scale /
+                       param_.std_g;
         } else if (meanfile_ready_ && (!flip)) {
-          outimg_[1] = ((data[1] - meanimg_[1]) * contrast + illumination)
-            * param_.scale / param_.std_g;
+          outimg_[1] =
+              ((data[1] - meanimg_[1]) * contrast + illumination) * param_.scale / param_.std_g;
         } else if (!meanfile_ready_ && flip) {
-          outimg_[1] = mirror((data[1] - param_.mean_g) * contrast + illumination)
-            * param_.scale / param_.std_g;
+          outimg_[1] = mirror((data[1] - param_.mean_g) * contrast + illumination) * param_.scale /
+                       param_.std_g;
         } else {
-          outimg_[1] = ((data[1] - param_.mean_g) * contrast + illumination)
-            * param_.scale / param_.std_g;
+          outimg_[1] =
+              ((data[1] - param_.mean_g) * contrast + illumination) * param_.scale / param_.std_g;
         }
       case 1:
         if (meanfile_ready_ && flip) {
-          outimg_[0] = mirror((data[0] - meanimg_[0]) * contrast + illumination)
-            * param_.scale / param_.std_r;
+          outimg_[0] = mirror((data[0] - meanimg_[0]) * contrast + illumination) * param_.scale /
+                       param_.std_r;
         } else if (meanfile_ready_ && (!flip)) {
-          outimg_[0] = ((data[0] - meanimg_[0]) * contrast + illumination)
-            * param_.scale / param_.std_r;
+          outimg_[0] =
+              ((data[0] - meanimg_[0]) * contrast + illumination) * param_.scale / param_.std_r;
         } else if (!meanfile_ready_ && flip) {
-          outimg_[0] = mirror((data[0] - param_.mean_r) * contrast + illumination)
-            * param_.scale / param_.std_r;
+          outimg_[0] = mirror((data[0] - param_.mean_r) * contrast + illumination) * param_.scale /
+                       param_.std_r;
         } else {
-          outimg_[0] = ((data[0] - param_.mean_r) * contrast + illumination)
-            * param_.scale / param_.std_r;
+          outimg_[0] =
+              ((data[0] - param_.mean_r) * contrast + illumination) * param_.scale / param_.std_r;
         }
         break;
       default:
@@ -234,9 +232,7 @@ class ImageNormalizeIter : public IIterator<DataInst> {
     TBlob tmp = meanimg_;
     {
       std::unique_ptr<dmlc::Stream> fo(dmlc::Stream::Create(param_.mean_img.c_str(), "w"));
-      NDArray::Save(fo.get(),
-                    {NDArray(tmp, 0)},
-                    {"mean_img"});
+      NDArray::Save(fo.get(), {NDArray(tmp, 0)}, {"mean_img"});
     }
     if (param_.verbose) {
       LOG(INFO) << "Save mean image to " << param_.mean_img << "..";
@@ -252,9 +248,7 @@ class ImageNormalizeIter : public IIterator<DataInst> {
  */
 class ImageDetNormalizeIter : public IIterator<DataInst> {
  public:
-  explicit ImageDetNormalizeIter(IIterator<DataInst> *base)
-      : base_(base), meanfile_ready_(false) {
-  }
+  explicit ImageDetNormalizeIter(IIterator<DataInst>* base) : base_(base), meanfile_ready_(false) {}
 
   virtual void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) {
     param_.InitAllowUnknown(kwargs);
@@ -263,8 +257,7 @@ class ImageDetNormalizeIter : public IIterator<DataInst> {
     outimg_.set_pad(false);
     meanimg_.set_pad(false);
     if (param_.mean_img.length() != 0) {
-      std::unique_ptr<dmlc::Stream> fi(
-          dmlc::Stream::Create(param_.mean_img.c_str(), "r", true));
+      std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(param_.mean_img.c_str(), "r", true));
       if (fi.get() == nullptr) {
         this->CreateMeanImg();
       } else {
@@ -279,8 +272,7 @@ class ImageDetNormalizeIter : public IIterator<DataInst> {
           std::unique_ptr<dmlc::Stream> fi(dmlc::Stream::Create(param_.mean_img.c_str(), "r"));
           NDArray::Load(fi.get(), &data, &keys);
         }
-        CHECK_EQ(data.size(), 1)
-            << "Invalid mean image file format";
+        CHECK_EQ(data.size(), 1) << "Invalid mean image file format";
         data[0].WaitToRead();
         mshadow::Tensor<cpu, 3> src = data[0].data().get<cpu, 3, real_t>();
         meanimg_.Resize(src.shape_);
@@ -299,7 +291,8 @@ class ImageDetNormalizeIter : public IIterator<DataInst> {
   }
 
   virtual bool Next(void) {
-    if (!this->Next_()) return false;
+    if (!this->Next_())
+      return false;
     return true;
   }
 
@@ -323,13 +316,14 @@ class ImageDetNormalizeIter : public IIterator<DataInst> {
 
   /*! \brief internal next function, inlined for fater processing. */
   inline bool Next_(void) {
-    if (!base_->Next()) return false;
-    const DataInst &src = base_->Value();
+    if (!base_->Next())
+      return false;
+    const DataInst& src = base_->Value();
     this->SetOutImg(src);
     out_.data.resize(2);
-    out_.data[0] = outimg_;
-    out_.data[1] = src.data[1];
-    out_.index = src.index;
+    out_.data[0]    = outimg_;
+    out_.data[1]    = src.data[1];
+    out_.index      = src.index;
     out_.extra_data = src.extra_data;
     return true;
   }
@@ -337,14 +331,14 @@ class ImageDetNormalizeIter : public IIterator<DataInst> {
    * \brief Set the output image, after augmentation and normalization.
    * \param src The source image.
    */
-  inline void SetOutImg(const DataInst &src) {
+  inline void SetOutImg(const DataInst& src) {
     using namespace mshadow::expr;  // NOLINT(*)
     mshadow::Tensor<cpu, 3> data = src.data[0].get<cpu, 3, real_t>();
 
     outimg_.Resize(data.shape_);
 
-    if (param_.mean_r > 0.0f || param_.mean_g > 0.0f ||
-        param_.mean_b > 0.0f || param_.mean_a > 0.0f) {
+    if (param_.mean_r > 0.0f || param_.mean_g > 0.0f || param_.mean_b > 0.0f ||
+        param_.mean_a > 0.0f) {
       // subtract mean per channel
       data[0] -= param_.mean_r;
       if (data.shape_[0] >= 3) {
@@ -401,9 +395,7 @@ class ImageDetNormalizeIter : public IIterator<DataInst> {
     TBlob tmp = meanimg_;
     {
       std::unique_ptr<dmlc::Stream> fo(dmlc::Stream::Create(param_.mean_img.c_str(), "w"));
-      NDArray::Save(fo.get(),
-                    {NDArray(tmp, 0)},
-                    {"mean_img"});
+      NDArray::Save(fo.get(), {NDArray(tmp, 0)}, {"mean_img"});
     }
     if (param_.verbose) {
       LOG(INFO) << "Save mean image to " << param_.mean_img << "..";
diff --git a/src/io/iter_prefetcher.h b/src/io/iter_prefetcher.h
index c416c9d7b9be..66e18e5d3e32 100644
--- a/src/io/iter_prefetcher.h
+++ b/src/io/iter_prefetcher.h
@@ -51,7 +51,7 @@ class PrefetcherIter : public IIterator<DataBatch> {
 
   ~PrefetcherIter() {
     while (recycle_queue_.size() != 0) {
-      DataBatch *batch = recycle_queue_.front();
+      DataBatch* batch = recycle_queue_.front();
       recycle_queue_.pop();
       delete batch;
     }
@@ -75,48 +75,49 @@ class PrefetcherIter : public IIterator<DataBatch> {
     // use the kwarg to init batch loader
     loader_->Init(kwargs);
     length_hint_ = loader_->GetLenHint();
-    iter.Init([this](DataBatch **dptr) {
-        if (!loader_->Next()) return false;
-        const TBlobBatch& batch = loader_->Value();
-        if (*dptr == nullptr) {
-          // allocate databatch
-          *dptr = new DataBatch();
-          (*dptr)->num_batch_padd = batch.num_batch_padd;
-          (*dptr)->data.resize(batch.data.size());
-          (*dptr)->index.resize(batch.batch_size);
+    iter.Init(
+        [this](DataBatch** dptr) {
+          if (!loader_->Next())
+            return false;
+          const TBlobBatch& batch = loader_->Value();
+          if (*dptr == nullptr) {
+            // allocate databatch
+            *dptr                   = new DataBatch();
+            (*dptr)->num_batch_padd = batch.num_batch_padd;
+            (*dptr)->data.resize(batch.data.size());
+            (*dptr)->index.resize(batch.batch_size);
+            for (size_t i = 0; i < batch.data.size(); ++i) {
+              auto dtype = param_.dtype ? param_.dtype.value() : batch.data[i].type_flag_;
+              auto ctx   = ((param_.ctx == PrefetcherParam::kCPUPinned) && (param_.device_id >= 0))
+                               ? Context::CPUPinned(param_.device_id)
+                               : Context::CPU();
+              (*dptr)->data.at(i) = NDArray(batch.data[i].shape_, ctx, false, dtype);
+            }
+          }
+          CHECK(batch.data.size() == (*dptr)->data.size());
+          // copy data over
           for (size_t i = 0; i < batch.data.size(); ++i) {
-            auto dtype = param_.dtype
-                             ? param_.dtype.value()
-                             : batch.data[i].type_flag_;
-            auto ctx = ((param_.ctx == PrefetcherParam::kCPUPinned) && (param_.device_id >= 0)) ?
-              Context::CPUPinned(param_.device_id) : Context::CPU();
-            (*dptr)->data.at(i) = NDArray(batch.data[i].shape_,
-                                          ctx, false,
-                                          dtype);
+            if ((*dptr)->data.at(i).shape() != batch.data[i].shape_) {
+              // TODO(zhreshold): memory pool for dynamic shaped data
+              (*dptr)->data.at(i).ReshapeAndAlloc(batch.data[i].shape_);
+            }
+            CHECK_EQ((*dptr)->data.at(i).shape(), batch.data[i].shape_);
+            MSHADOW_TYPE_SWITCH(batch.data[i].type_flag_, DType, {
+              mshadow::Copy(((*dptr)->data)[i].data().FlatTo2D<cpu, DType>(),
+                            batch.data[i].FlatTo2D<cpu, DType>());
+            });
+            (*dptr)->num_batch_padd = batch.num_batch_padd;
           }
-        }
-        CHECK(batch.data.size() == (*dptr)->data.size());
-        // copy data over
-        for (size_t i = 0; i < batch.data.size(); ++i) {
-          if ((*dptr)->data.at(i).shape() != batch.data[i].shape_) {
-            // TODO(zhreshold): memory pool for dynamic shaped data
-            (*dptr)->data.at(i).ReshapeAndAlloc(batch.data[i].shape_);
+          if (batch.inst_index) {
+            std::copy(
+                batch.inst_index, batch.inst_index + batch.batch_size, (*dptr)->index.begin());
           }
-          CHECK_EQ((*dptr)->data.at(i).shape(), batch.data[i].shape_);
-          MSHADOW_TYPE_SWITCH(batch.data[i].type_flag_, DType, {
-              mshadow::Copy(((*dptr)->data)[i].data().FlatTo2D<cpu, DType>(),
-                        batch.data[i].FlatTo2D<cpu, DType>());
-          });
-          (*dptr)->num_batch_padd = batch.num_batch_padd;
-        }
-        if (batch.inst_index) {
-          std::copy(batch.inst_index,
-                    batch.inst_index + batch.batch_size,
-                    (*dptr)->index.begin());
-        }
-       return true;
-      },
-      [this]() { loader_->BeforeFirst(); length_hint_ = loader_->GetLenHint();});
+          return true;
+        },
+        [this]() {
+          loader_->BeforeFirst();
+          length_hint_ = loader_->GetLenHint();
+        });
   }
 
   virtual void BeforeFirst(void) {
@@ -129,11 +130,12 @@ class PrefetcherIter : public IIterator<DataBatch> {
 
   virtual bool Next(void) {
     if (out_ != nullptr) {
-      recycle_queue_.push(out_); out_ = nullptr;
+      recycle_queue_.push(out_);
+      out_ = nullptr;
     }
     // do recycle
     if (recycle_queue_.size() == param_.prefetch_buffer) {
-      DataBatch *old_batch =  recycle_queue_.front();
+      DataBatch* old_batch = recycle_queue_.front();
       // can be more efficient on engine
       for (NDArray& arr : old_batch->data) {
         arr.WaitToWrite();
@@ -143,7 +145,7 @@ class PrefetcherIter : public IIterator<DataBatch> {
     }
     return iter.Next(&out_);
   }
-  virtual const DataBatch &Value(void) const {
+  virtual const DataBatch& Value(void) const {
     return *out_;
   }
 
@@ -157,7 +159,7 @@ class PrefetcherIter : public IIterator<DataBatch> {
 
  private:
   /*! \brief output data */
-  DataBatch *out_;
+  DataBatch* out_;
   /*! \brief queue to be recycled */
   std::queue<DataBatch*> recycle_queue_;
   /*! \brief size hint cache */
diff --git a/src/io/iter_sampler.cc b/src/io/iter_sampler.cc
index 049347dfd9cf..d38b8244128a 100644
--- a/src/io/iter_sampler.cc
+++ b/src/io/iter_sampler.cc
@@ -42,10 +42,8 @@ struct SequentialSamplerParam : public dmlc::Parameter<SequentialSamplerParam> {
   int start;
   // declare parameters
   DMLC_DECLARE_PARAMETER(SequentialSamplerParam) {
-      DMLC_DECLARE_FIELD(length)
-          .describe("Length of the sequence.");
-      DMLC_DECLARE_FIELD(start).set_default(0)
-          .describe("Start of the index.");
+    DMLC_DECLARE_FIELD(length).describe("Length of the sequence.");
+    DMLC_DECLARE_FIELD(start).set_default(0).describe("Start of the index.");
   }
 };  // struct SequentialSamplerParam
 
@@ -70,15 +68,20 @@ class SequentialSampler : public IIterator<DataInst> {
 
   bool Next() override {
     if (pos_ < indices_.size()) {
-      int64_t *ptr = indices_.data() + pos_;
-      out_.data[0] = TBlob(ptr, TShape({1, }), cpu::kDevMask, 0);
+      int64_t* ptr = indices_.data() + pos_;
+      out_.data[0] = TBlob(ptr,
+                           TShape({
+                               1,
+                           }),
+                           cpu::kDevMask,
+                           0);
       ++pos_;
       return true;
     }
     return false;
   }
 
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return out_;
   }
 
@@ -94,23 +97,18 @@ class SequentialSampler : public IIterator<DataInst> {
 };  // class SequentialSampler
 
 MXNET_REGISTER_IO_ITER(SequentialSampler)
-.describe(R"code(Returns the sequential sampler iterator.
+    .describe(R"code(Returns the sequential sampler iterator.
 )code" ADD_FILELINE)
-.add_arguments(SequentialSamplerParam::__FIELDS__())
-.add_arguments(BatchSamplerParam::__FIELDS__())
-.set_body([]() {
-    return
-        new BatchSampler(
-            new SequentialSampler());
-  });
+    .add_arguments(SequentialSamplerParam::__FIELDS__())
+    .add_arguments(BatchSamplerParam::__FIELDS__())
+    .set_body([]() { return new BatchSampler(new SequentialSampler()); });
 
 struct RandomSamplerParam : public dmlc::Parameter<RandomSamplerParam> {
   /*! \brief Length of the sequence. */
   size_t length;
   // declare parameters
   DMLC_DECLARE_PARAMETER(RandomSamplerParam) {
-      DMLC_DECLARE_FIELD(length)
-          .describe("Length of the sequence.");
+    DMLC_DECLARE_FIELD(length).describe("Length of the sequence.");
   }
 };  // struct RandomSamplerParam
 
@@ -122,8 +120,9 @@ class RandomSampler : public IIterator<DataInst> {
     param_.InitAllowUnknown(kwargs);
     indices_.resize(param_.length);
     std::iota(std::begin(indices_), std::end(indices_), 0);  // fill like arange
-    mshadow::Random<cpu> *ctx_rng = ResourceManager::Get()->Request(
-      Context::CPU(), ResourceRequest::kRandom).get_random<cpu, real_t>(nullptr);
+    mshadow::Random<cpu>* ctx_rng = ResourceManager::Get()
+                                        ->Request(Context::CPU(), ResourceRequest::kRandom)
+                                        .get_random<cpu, real_t>(nullptr);
     rng_ = std::make_unique<common::RANDOM_ENGINE>(ctx_rng->GetSeed());
     out_.data.resize(1);
     BeforeFirst();
@@ -140,17 +139,23 @@ class RandomSampler : public IIterator<DataInst> {
 
   bool Next() override {
     if (pos_ < indices_.size()) {
-      int64_t *ptr = indices_.data() + pos_;
-      out_.data[0] = TBlob(ptr, TShape({1, }), cpu::kDevMask, 0);
+      int64_t* ptr = indices_.data() + pos_;
+      out_.data[0] = TBlob(ptr,
+                           TShape({
+                               1,
+                           }),
+                           cpu::kDevMask,
+                           0);
       ++pos_;
       return true;
     }
     return false;
   }
 
-  const DataInst &Value() const override {
+  const DataInst& Value() const override {
     return out_;
   }
+
  private:
   /*! \brief Stored integer indices */
   std::vector<int64_t> indices_;
@@ -165,14 +170,11 @@ class RandomSampler : public IIterator<DataInst> {
 };  // class RandomSampler
 
 MXNET_REGISTER_IO_ITER(RandomSampler)
-.describe(R"code(Returns the random sampler iterator.
+    .describe(R"code(Returns the random sampler iterator.
 )code" ADD_FILELINE)
-.add_arguments(RandomSamplerParam::__FIELDS__())
-.add_arguments(BatchSamplerParam::__FIELDS__())
-.set_body([]() {
-    return new BatchSampler(
-            new RandomSampler());
-  });
+    .add_arguments(RandomSamplerParam::__FIELDS__())
+    .add_arguments(BatchSamplerParam::__FIELDS__())
+    .set_body([]() { return new BatchSampler(new RandomSampler()); });
 
 }  // namespace io
 }  // namespace mxnet
diff --git a/src/io/iter_sparse.h b/src/io/iter_sparse.h
index 22b1836be419..e7f2bc526b25 100644
--- a/src/io/iter_sparse.h
+++ b/src/io/iter_sparse.h
@@ -32,7 +32,7 @@ namespace mxnet {
  * \brief iterator type
  * \param DType data type
  */
-template<typename DType>
+template <typename DType>
 class SparseIIterator : public IIterator<DType> {
  public:
   /*! \brief storage type of the data or label */
diff --git a/src/io/iter_sparse_batchloader.h b/src/io/iter_sparse_batchloader.h
index c0d856df89ec..02e38fca4154 100644
--- a/src/io/iter_sparse_batchloader.h
+++ b/src/io/iter_sparse_batchloader.h
@@ -42,15 +42,14 @@ namespace io {
 /*! \brief create a batch iterator from single instance iterator */
 class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch> {
  public:
-  explicit SparseBatchLoader(SparseIIterator<DataInst> *base):
-      BatchLoader(base), sparse_base_(base) {
-  }
+  explicit SparseBatchLoader(SparseIIterator<DataInst>* base)
+      : BatchLoader(base), sparse_base_(base) {}
 
   virtual ~SparseBatchLoader(void) {}
 
   inline void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) {
     BatchLoader::Init(kwargs);
-    data_stype_ = sparse_base_->GetStorageType(true);
+    data_stype_  = sparse_base_->GetStorageType(true);
     label_stype_ = sparse_base_->GetStorageType(false);
     if (param_.round_batch == 0) {
       LOG(FATAL) << "sparse batch loader doesn't support round_batch == false yet";
@@ -63,18 +62,21 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
 
   virtual bool Next(void) {
     out_.num_batch_padd = 0;
-    out_.batch_size = param_.batch_size;
-    this->head_ = 0;
+    out_.batch_size     = param_.batch_size;
+    this->head_         = 0;
     // if overflown from previous round, directly return false, until before first is called
-    if (num_overflow_ != 0) return false;
+    if (num_overflow_ != 0)
+      return false;
     size_t top = 0;
     offsets_.clear();
     while (sparse_base_->Next()) {
       const DataInst& inst = sparse_base_->Value();
       // initialize the data buffer, only called once
-      if (data_.size() == 0) this->InitData(inst);
+      if (data_.size() == 0)
+        this->InitData(inst);
       // initialize the number of elements in each buffer, called once per batch
-      if (offsets_.size() == 0) offsets_.resize(inst.data.size(), 0);
+      if (offsets_.size() == 0)
+        offsets_.resize(inst.data.size(), 0);
       CopyData(inst, top);
       if (++top >= param_.batch_size) {
         SetOutputShape();
@@ -83,7 +85,7 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
     }
     if (top != 0) {
       CHECK_NE(param_.round_batch, 0)
-        << "round_batch = False is not supported for sparse data iterator";
+          << "round_batch = False is not supported for sparse data iterator";
       num_overflow_ = 0;
       sparse_base_->BeforeFirst();
       for (; top < param_.batch_size; ++top, ++num_overflow_) {
@@ -100,7 +102,7 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
     return false;
   }
 
-  virtual const TBlobBatch &Value(void) const {
+  virtual const TBlobBatch& Value(void) const {
     return BatchLoader::Value();
   }
 
@@ -120,7 +122,7 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
 
  private:
   /*! \brief base sparse iterator */
-  SparseIIterator<DataInst> *sparse_base_;
+  SparseIIterator<DataInst>* sparse_base_;
   /*! \brief data storage type */
   NDArrayStorageType data_stype_;
   /*! \brief data label type */
@@ -134,16 +136,15 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
 
   // check whether ith position is the indptr tensor for a CSR tensor
   inline bool IsIndPtr(size_t i) {
-    auto data_num_aux = num_aux_data(data_stype_);
-    auto label_num_aux = num_aux_data(label_stype_);
+    auto data_num_aux        = num_aux_data(data_stype_);
+    auto label_num_aux       = num_aux_data(label_stype_);
     auto label_indptr_offset = data_num_aux + 1 + label_num_aux;
     // data indptr
     if (i == data_num_aux && data_stype_ == kCSRStorage) {
       return true;
     }
     // label indptr
-    if (i == label_indptr_offset && label_stype_ == kCSRStorage &&
-        data_stype_ == kCSRStorage) {
+    if (i == label_indptr_offset && label_stype_ == kCSRStorage && data_stype_ == kCSRStorage) {
       return true;
     }
     return false;
@@ -173,11 +174,11 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
       // shape for indptr
       if (IsIndPtr(i)) {
         buff_sizes[i] = param_.batch_size + 1;
-        indptr_[i] = true;
+        indptr_[i]    = true;
       } else {
         // estimated the size for the whole batch based on the first instance
         buff_sizes[i] = first_inst.data[i].Size() * param_.batch_size;
-        indptr_[i] = false;
+        indptr_[i]    = false;
       }
       dtypes_[i] = first_inst.data[i].type_flag_;
     }
@@ -195,8 +196,7 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
   /* \brief set the shape of the outputs based on actual shapes */
   inline void SetOutputShape() {
     for (size_t i = 0; i < out_.data.size(); i++) {
-      out_.data[i] = TBlob(data_[i].dptr_, mshadow::Shape1(offsets_[i]),
-                           Context::kCPU, dtypes_[i]);
+      out_.data[i] = TBlob(data_[i].dptr_, mshadow::Shape1(offsets_[i]), Context::kCPU, dtypes_[i]);
     }
   }
 
@@ -208,8 +208,8 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
       mshadow::Copy(temp.get<cpu, 1, DType>(), data_[i].get<cpu, 1, DType>().Slice(0, src_size));
       // increase the size of space exponentially
       size_t capacity = data_[i].Size();
-      capacity = capacity * 2 + 1;
-      data_[i] = TBlobContainer();
+      capacity        = capacity * 2 + 1;
+      data_[i]        = TBlobContainer();
       data_[i].resize(mshadow::Shape1(capacity), dtypes_[i]);
       // copy back
       mshadow::Copy(data_[i].get<cpu, 1, DType>().Slice(0, src_size), temp.get<cpu, 1, DType>());
@@ -218,7 +218,7 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
 
   /* \brief copy the data instance to data buffer */
   void CopyData(const DataInst& inst, const size_t top) {
-    int64_t unit_size = 0;
+    int64_t unit_size    = 0;
     out_.inst_index[top] = inst.index;
     for (size_t i = 0; i < inst.data.size(); ++i) {
       if (!indptr_[i]) {
@@ -226,8 +226,8 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
         unit_size = inst.data[i].shape_.Size();
         MSHADOW_TYPE_SWITCH(data_[i].type_flag_, DType, {
           const size_t begin = offsets_[i];
-          const size_t end = offsets_[i] + unit_size;
-          size_t capacity = data_[i].Size();
+          const size_t end   = offsets_[i] + unit_size;
+          size_t capacity    = data_[i].Size();
           // resize the data buffer if estimated space is not sufficient
           while (capacity < end) {
             ResizeBuffer(begin, i);
@@ -241,9 +241,10 @@ class SparseBatchLoader : public BatchLoader, public SparseIIterator<TBlobBatch>
         // indptr placeholder
         auto indptr = data_[i].get<cpu, 1, int64_t>();
         // initialize the first indptr, which is always 0
-        if (top == 0) indptr[0] = 0;
+        if (top == 0)
+          indptr[0] = 0;
         indptr[top + 1] = indptr[top] + unit_size;
-        offsets_[i] = top + 2;
+        offsets_[i]     = top + 2;
       }
     }
   }
diff --git a/src/io/iter_sparse_prefetcher.h b/src/io/iter_sparse_prefetcher.h
index 3f06052b0292..d6e258112c81 100644
--- a/src/io/iter_sparse_prefetcher.h
+++ b/src/io/iter_sparse_prefetcher.h
@@ -56,67 +56,68 @@ class SparsePrefetcherIter : public PrefetcherIter {
     PrefetcherIter::InitParams(kwargs);
     // use the kwarg to init batch loader
     sparse_loader_->Init(kwargs);
-    iter.Init([this](DataBatch **dptr) {
-        if (!sparse_loader_->Next()) return false;
-        const TBlobBatch& batch = sparse_loader_->Value();
-        if (*dptr == nullptr) {
-          // allocate databatch
-          *dptr = new DataBatch();
-          (*dptr)->num_batch_padd = batch.num_batch_padd;
-          // (*dptr)->data.at(0) => data
-          // (*dptr)->data.at(1) => label
-          (*dptr)->data.resize(2);
-          (*dptr)->index.resize(batch.batch_size);
+    iter.Init(
+        [this](DataBatch** dptr) {
+          if (!sparse_loader_->Next())
+            return false;
+          const TBlobBatch& batch = sparse_loader_->Value();
+          if (*dptr == nullptr) {
+            // allocate databatch
+            *dptr                   = new DataBatch();
+            (*dptr)->num_batch_padd = batch.num_batch_padd;
+            // (*dptr)->data.at(0) => data
+            // (*dptr)->data.at(1) => label
+            (*dptr)->data.resize(2);
+            (*dptr)->index.resize(batch.batch_size);
+            size_t data_iter = 0;
+            for (size_t i = 0; i < (*dptr)->data.size(); ++i) {
+              bool is_data = i == 0;
+              auto stype   = this->GetStorageType(is_data);
+              auto dtype   = param_.dtype ? param_.dtype.value() : batch.data[data_iter].type_flag_;
+              if (stype == kDefaultStorage) {
+                (*dptr)->data.at(i) =
+                    NDArray(batch.data[data_iter].shape_, Context::CPU(), false, dtype);
+              } else {
+                (*dptr)->data.at(i) =
+                    NDArray(stype, this->GetShape(is_data), Context::CPU(), false, dtype);
+              }
+              data_iter += num_aux_data(stype) + 1;
+            }
+          }
+          // copy data over
           size_t data_iter = 0;
           for (size_t i = 0; i < (*dptr)->data.size(); ++i) {
-            bool is_data = i == 0;
-            auto stype = this->GetStorageType(is_data);
-            auto dtype = param_.dtype ? param_.dtype.value() : batch.data[data_iter].type_flag_;
+            auto& nd     = ((*dptr)->data)[i];
+            auto stype   = nd.storage_type();
+            auto& data_i = ((*dptr)->data)[i];
             if (stype == kDefaultStorage) {
-              (*dptr)->data.at(i) = NDArray(batch.data[data_iter].shape_,
-                                            Context::CPU(), false, dtype);
+              CopyFromTo(data_i.data(), batch.data[data_iter]);
+            } else if (stype == kCSRStorage) {
+              auto& values  = batch.data[data_iter];
+              auto& indices = batch.data[data_iter + 1];
+              auto& indptr  = batch.data[data_iter + 2];
+              // allocate memory
+              CHECK_EQ(indices.shape_.Size(), values.shape_.Size());
+              nd.CheckAndAllocAuxData(csr::kIdx, indices.shape_);
+              nd.CheckAndAllocData(values.shape_);
+              nd.CheckAndAllocAuxData(csr::kIndPtr, indptr.shape_);
+              // copy values, indices and indptr
+              CopyFromTo(data_i.data(), values);
+              CopyFromTo(data_i.aux_data(csr::kIdx), indices);
+              CopyFromTo(data_i.aux_data(csr::kIndPtr), indptr);
             } else {
-              (*dptr)->data.at(i) = NDArray(stype, this->GetShape(is_data),
-                                            Context::CPU(), false, dtype);
+              LOG(FATAL) << "Storage type not implemented: " << stype;
             }
             data_iter += num_aux_data(stype) + 1;
+            (*dptr)->num_batch_padd = batch.num_batch_padd;
           }
-        }
-        // copy data over
-        size_t data_iter = 0;
-        for (size_t i = 0; i < (*dptr)->data.size(); ++i) {
-          auto& nd = ((*dptr)->data)[i];
-          auto stype = nd.storage_type();
-          auto& data_i = ((*dptr)->data)[i];
-          if (stype == kDefaultStorage) {
-            CopyFromTo(data_i.data(), batch.data[data_iter]);
-          } else if (stype == kCSRStorage) {
-            auto& values = batch.data[data_iter];
-            auto& indices = batch.data[data_iter + 1];
-            auto& indptr = batch.data[data_iter + 2];
-            // allocate memory
-            CHECK_EQ(indices.shape_.Size(), values.shape_.Size());
-            nd.CheckAndAllocAuxData(csr::kIdx, indices.shape_);
-            nd.CheckAndAllocData(values.shape_);
-            nd.CheckAndAllocAuxData(csr::kIndPtr, indptr.shape_);
-            // copy values, indices and indptr
-            CopyFromTo(data_i.data(), values);
-            CopyFromTo(data_i.aux_data(csr::kIdx), indices);
-            CopyFromTo(data_i.aux_data(csr::kIndPtr), indptr);
-          } else {
-            LOG(FATAL) << "Storage type not implemented: " << stype;
+          if (batch.inst_index) {
+            std::copy(
+                batch.inst_index, batch.inst_index + batch.batch_size, (*dptr)->index.begin());
           }
-          data_iter += num_aux_data(stype) + 1;
-          (*dptr)->num_batch_padd = batch.num_batch_padd;
-        }
-        if (batch.inst_index) {
-          std::copy(batch.inst_index,
-                    batch.inst_index + batch.batch_size,
-                    (*dptr)->index.begin());
-        }
-       return true;
-      },
-      [this]() { sparse_loader_->BeforeFirst(); });
+          return true;
+        },
+        [this]() { sparse_loader_->BeforeFirst(); });
   }
 
   virtual void BeforeFirst(void) {
@@ -126,7 +127,7 @@ class SparsePrefetcherIter : public PrefetcherIter {
   virtual bool Next(void) {
     return PrefetcherIter::Next();
   }
-  virtual const DataBatch &Value(void) const {
+  virtual const DataBatch& Value(void) const {
     return PrefetcherIter::Value();
   }
 
diff --git a/src/io/opencv_compatibility.h b/src/io/opencv_compatibility.h
index 7f42328497ed..76512258dff8 100644
--- a/src/io/opencv_compatibility.h
+++ b/src/io/opencv_compatibility.h
@@ -45,12 +45,12 @@
 #define CV_RGB2BGR cv::COLOR_RGB2BGR
 #define CV_BGR2RGB cv::COLOR_BGR2RGB
 
-#define CV_INTER_LINEAR cv::INTER_LINEAR
+#define CV_INTER_LINEAR  cv::INTER_LINEAR
 #define CV_INTER_NEAREST cv::INTER_NEAREST
 
-#define CV_LOAD_IMAGE_COLOR cv::IMREAD_COLOR
+#define CV_LOAD_IMAGE_COLOR        cv::IMREAD_COLOR
 #define CV_IMWRITE_PNG_COMPRESSION cv::IMWRITE_PNG_COMPRESSION
-#define CV_IMWRITE_JPEG_QUALITY cv::IMWRITE_JPEG_QUALITY
+#define CV_IMWRITE_JPEG_QUALITY    cv::IMWRITE_JPEG_QUALITY
 
 #endif  // CV_VERSION_MAJOR >= 4
 
diff --git a/src/ir/expr.cc b/src/ir/expr.cc
index 75d76edfff5d..1e71daa50b0f 100644
--- a/src/ir/expr.cc
+++ b/src/ir/expr.cc
@@ -28,26 +28,23 @@
 namespace mxnet {
 
 IntImm::IntImm(MXNetDataType dtype, int64_t value) {
-  CHECK(dtype.is_scalar())
-      << "ValueError: IntImm can only take scalar.";
-  CHECK(dtype.is_int() || dtype.is_uint())
-      << "ValueError: IntImm can only take scalar.";
+  CHECK(dtype.is_scalar()) << "ValueError: IntImm can only take scalar.";
+  CHECK(dtype.is_int() || dtype.is_uint()) << "ValueError: IntImm can only take scalar.";
   if (dtype.is_uint()) {
     CHECK_GE(value, 0U);
   }
   runtime::ObjectPtr<IntImmNode> node = make_object<IntImmNode>();
-  node->dtype = dtype;
-  node->value = value;
-  data_ = std::move(node);
+  node->dtype                         = dtype;
+  node->value                         = value;
+  data_                               = std::move(node);
 }
 
 FloatImm::FloatImm(MXNetDataType dtype, double value) {
-  CHECK_EQ(dtype.lanes(), 1)
-      << "ValueError: FloatImm can only take scalar.";
+  CHECK_EQ(dtype.lanes(), 1) << "ValueError: FloatImm can only take scalar.";
   runtime::ObjectPtr<FloatImmNode> node = make_object<FloatImmNode>();
-  node->dtype = dtype;
-  node->value = value;
-  data_ = std::move(node);
+  node->dtype                           = dtype;
+  node->value                           = value;
+  data_                                 = std::move(node);
 }
 
 }  // namespace mxnet
diff --git a/src/kvstore/comm.h b/src/kvstore/comm.h
index b03b74c73bad..4f4edcafac80 100644
--- a/src/kvstore/comm.h
+++ b/src/kvstore/comm.h
@@ -46,23 +46,25 @@ class Comm {
   Comm() {
     pinned_ctx_ = Context::CPUPinned(0);
   }
-  virtual ~Comm() { }
+  virtual ~Comm() {}
   /**
    * \brief init key with the data shape and storage shape
    */
-  virtual void Init(int key, const NDArrayStorageType stype,
-                    const mxnet::TShape& shape, int dtype = mshadow::kFloat32) = 0;
+  virtual void Init(int key,
+                    const NDArrayStorageType stype,
+                    const mxnet::TShape& shape,
+                    int dtype = mshadow::kFloat32) = 0;
   /**
    * \brief returns src[0] + .. + src[src.size()-1]
    */
-  virtual const NDArray& Reduce(
-      int key, const std::vector<NDArray>& src, int priority) = 0;
+  virtual const NDArray& Reduce(int key, const std::vector<NDArray>& src, int priority) = 0;
   /**
    * \brief copy from src to dst[i] for every i
    */
-  virtual void Broadcast(
-      int key, const NDArray& src,
-      const std::vector<NDArray*> dst, int priority) = 0;
+  virtual void Broadcast(int key,
+                         const NDArray& src,
+                         const std::vector<NDArray*> dst,
+                         int priority) = 0;
 
   /**
    * \brief broadcast src to dst[i] with target row_ids for every i
@@ -72,7 +74,8 @@ class Comm {
             where the row_ids are expected to be unique and sorted in row_id.data()
    * \param priority the priority of the operation
    */
-  virtual void BroadcastRowSparse(int key, const NDArray& src,
+  virtual void BroadcastRowSparse(int key,
+                                  const NDArray& src,
                                   const std::vector<std::pair<NDArray*, NDArray>>& dst,
                                   const int priority) = 0;
 
@@ -105,23 +108,24 @@ class CommCPU : public Comm {
  public:
   CommCPU() {
     nthread_reduction_ = dmlc::GetEnv("MXNET_KVSTORE_REDUCTION_NTHREADS", 4);
-    bigarray_bound_ = dmlc::GetEnv("MXNET_KVSTORE_BIGARRAY_BOUND", 1000 * 1000);
+    bigarray_bound_    = dmlc::GetEnv("MXNET_KVSTORE_BIGARRAY_BOUND", 1000 * 1000);
     // TODO(junwu) delete the following data member, now for benchmark only
     is_serial_push_ = dmlc::GetEnv("MXNET_KVSTORE_SERIAL_PUSH", 0);
   }
-  virtual ~CommCPU() { }
+  virtual ~CommCPU() {}
 
-  void Init(int key, const NDArrayStorageType stype, const mxnet::TShape& shape,
+  void Init(int key,
+            const NDArrayStorageType stype,
+            const mxnet::TShape& shape,
             int type = mshadow::kFloat32) override {
     // Delayed allocation - the dense merged buffer might not be used at all if push()
     // only sees sparse arrays
-    bool delay_alloc = true;
+    bool delay_alloc       = true;
     merge_buf_[key].merged = NDArray(shape, pinned_ctx_, delay_alloc, type);
   }
 
-  const NDArray& Reduce(int key, const std::vector<NDArray>& src,
-                        int priority) override {
-    auto& buf = merge_buf_[key];
+  const NDArray& Reduce(int key, const std::vector<NDArray>& src, int priority) override {
+    auto& buf        = merge_buf_[key];
     const auto stype = src[0].storage_type();
     // avoid extra copy for single device, but it may bring problems for
     // abnormal usage of kvstore
@@ -148,28 +152,32 @@ class CommCPU : public Comm {
       reduce[0] = buf_merged;
 
       if (buf.copy_buf.empty()) {
-        buf.copy_buf.resize(src.size()-1);
+        buf.copy_buf.resize(src.size() - 1);
         for (size_t j = 0; j < src.size() - 1; ++j) {
           // allocate copy buffer
-          buf.copy_buf[j] = NDArray(
-            src[0].shape(), pinned_ctx_, false, src[0].dtype());
+          buf.copy_buf[j] = NDArray(src[0].shape(), pinned_ctx_, false, src[0].dtype());
         }
       }
       CHECK(stype == buf.copy_buf[0].storage_type())
-           << "Storage type mismatch detected. " << stype << "(src) vs. "
-           << buf.copy_buf[0].storage_type() << "(buf.copy_buf)";
+          << "Storage type mismatch detected. " << stype << "(src) vs. "
+          << buf.copy_buf[0].storage_type() << "(buf.copy_buf)";
       for (size_t i = 1; i < src.size(); ++i) {
-        CopyFromTo(src[i], &(buf.copy_buf[i-1]), priority);
-        reduce[i] = buf.copy_buf[i-1];
-        const_vars[i-1] = reduce[i].var();
+        CopyFromTo(src[i], &(buf.copy_buf[i - 1]), priority);
+        reduce[i]         = buf.copy_buf[i - 1];
+        const_vars[i - 1] = reduce[i].var();
       }
 
       Engine::Get()->PushAsync(
-        [reduce, this](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-          ReduceSumCPU(reduce);
-          on_complete();
-        }, Context::CPU(), const_vars, {reduce[0].var()},
-        FnProperty::kCPUPrioritized, priority, "KVStoreReduce");
+          [reduce, this](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            ReduceSumCPU(reduce);
+            on_complete();
+          },
+          Context::CPU(),
+          const_vars,
+          {reduce[0].var()},
+          FnProperty::kCPUPrioritized,
+          priority,
+          "KVStoreReduce");
 
     } else {
       // sparse reduce
@@ -179,39 +187,47 @@ class CommCPU : public Comm {
       if (buf.copy_buf.empty()) {
         buf.copy_buf.resize(src.size());
         for (size_t j = 0; j < src.size(); ++j) {
-          buf.copy_buf[j] = NDArray(
-            src[0].storage_type(), src[0].shape(), pinned_ctx_, true, src[0].dtype());
+          buf.copy_buf[j] =
+              NDArray(src[0].storage_type(), src[0].shape(), pinned_ctx_, true, src[0].dtype());
         }
       }
       CHECK(stype == buf.copy_buf[0].storage_type())
-           << "Storage type mismatch detected. " << stype << "(src) vs. "
-           << buf.copy_buf[0].storage_type() << "(buf.copy_buf)";
+          << "Storage type mismatch detected. " << stype << "(src) vs. "
+          << buf.copy_buf[0].storage_type() << "(buf.copy_buf)";
       for (size_t i = 0; i < src.size(); ++i) {
         CopyFromTo(src[i], &(buf.copy_buf[i]), priority);
-        reduce[i] = buf.copy_buf[i];
+        reduce[i]     = buf.copy_buf[i];
         const_vars[i] = reduce[i].var();
       }
       Resource rsc = ResourceManager::Get()->Request(buf_merged.ctx(),
-          ResourceRequest(ResourceRequest::kTempSpace));
+                                                     ResourceRequest(ResourceRequest::kTempSpace));
       Engine::Get()->PushAsync(
-        [reduce, buf_merged, rsc, this](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-          NDArray out = buf_merged;
-          is_serial_push_?
-            ReduceSumCPUExSerial(reduce, &out)
-            : mxnet::ndarray::ElementwiseSum(rctx.get_stream<cpu>(), rsc, reduce, &out);
-          on_complete();
-        }, Context::CPU(), const_vars, {buf_merged.var(), rsc.var},
-        FnProperty::kCPUPrioritized, priority, "KVStoreReduce");
+          [reduce, buf_merged, rsc, this](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            NDArray out = buf_merged;
+            is_serial_push_
+                ? ReduceSumCPUExSerial(reduce, &out)
+                : mxnet::ndarray::ElementwiseSum(rctx.get_stream<cpu>(), rsc, reduce, &out);
+            on_complete();
+          },
+          Context::CPU(),
+          const_vars,
+          {buf_merged.var(), rsc.var},
+          FnProperty::kCPUPrioritized,
+          priority,
+          "KVStoreReduce");
     }
 
     return buf_merged;
   }
 
-  void Broadcast(int key, const NDArray& src,
-                 const std::vector<NDArray*> dst, int priority) override {
+  void Broadcast(int key,
+                 const NDArray& src,
+                 const std::vector<NDArray*> dst,
+                 int priority) override {
     int mask = src.ctx().dev_mask();
     if (mask == Context::kCPU) {
-      for (auto d : dst) CopyFromTo(src, d, priority);
+      for (auto d : dst)
+        CopyFromTo(src, d, priority);
     } else {
       // First copy data to pinned_ctx, then broadcast.
       // Note that kv.init initializes the data on pinned_ctx.
@@ -220,31 +236,35 @@ class CommCPU : public Comm {
       // Also indicates that buffers are already initialized during push().
       auto& buf = merge_buf_[key].merged_buf(src.storage_type());
       CopyFromTo(src, &buf, priority);
-      for (auto d : dst) CopyFromTo(buf, d, priority);
+      for (auto d : dst)
+        CopyFromTo(buf, d, priority);
     }
   }
 
-  void BroadcastRowSparse(int key, const NDArray& src,
+  void BroadcastRowSparse(int key,
+                          const NDArray& src,
                           const std::vector<std::pair<NDArray*, NDArray>>& dst,
                           const int priority) override {
     using namespace mshadow;
     CHECK_EQ(src.storage_type(), kRowSparseStorage)
-      << "BroadcastRowSparse expects row-sparse src NDArray";
+        << "BroadcastRowSparse expects row-sparse src NDArray";
     CHECK_EQ(src.ctx().dev_mask(), Context::kCPU)
-      << "BroadcastRowSparse with src on gpu context not supported";
+        << "BroadcastRowSparse with src on gpu context not supported";
     for (const auto& dst_kv : dst) {
-      NDArray* out = dst_kv.first;
+      NDArray* out   = dst_kv.first;
       NDArray row_id = dst_kv.second;
       CHECK_EQ(out->storage_type(), kRowSparseStorage)
-               << "BroadcastRowSparse expects row_sparse dst NDArray";
+          << "BroadcastRowSparse expects row_sparse dst NDArray";
       CHECK_EQ(row_id.ctx().dev_mask(), Context::kCPU)
-               << "BroadcastRowSparse with row_indices on gpu context not supported";
+          << "BroadcastRowSparse with row_indices on gpu context not supported";
       // retain according to unique indices
       const bool is_same_ctx = out->ctx() == src.ctx();
       const bool is_diff_var = out->var() != src.var();
-      NDArray retained_cpu = (is_same_ctx && is_diff_var) ? *out :
-          NDArray(kRowSparseStorage, src.shape(), src.ctx(), true,
-                  src.dtype(), src.aux_types());
+      NDArray retained_cpu =
+          (is_same_ctx && is_diff_var)
+              ? *out
+              : NDArray(
+                    kRowSparseStorage, src.shape(), src.ctx(), true, src.dtype(), src.aux_types());
       if (!is_diff_var) {
         common::LogOnce("The output of row_sparse_pull() on key " + std::to_string(key) +
                         "refers to the same NDArray as the one stored in KVStore."
@@ -254,15 +274,19 @@ class CommCPU : public Comm {
                         "consider create a new NDArray buffer to store the output.");
       }
       Engine::Get()->PushAsync(
-        [=](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-          const TBlob& indices = row_id.data();
-          NDArray temp = retained_cpu;  // get rid the of const qualifier
-          op::SparseRetainOpForwardRspImpl<cpu>(rctx.get_stream<cpu>(),
-                                                src, indices, kWriteTo,
-                                                &temp);
-          on_complete();
-        }, Context::CPU(), {src.var(), row_id.var()}, {retained_cpu.var()},
-        FnProperty::kNormal, priority, "KVStoreSparseRetain");
+          [=](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            const TBlob& indices = row_id.data();
+            NDArray temp         = retained_cpu;  // get rid the of const qualifier
+            op::SparseRetainOpForwardRspImpl<cpu>(
+                rctx.get_stream<cpu>(), src, indices, kWriteTo, &temp);
+            on_complete();
+          },
+          Context::CPU(),
+          {src.var(), row_id.var()},
+          {retained_cpu.var()},
+          FnProperty::kNormal,
+          priority,
+          "KVStoreSparseRetain");
       // if retained_cpu == out, CopyFromTo will ignore the copy operation
       CopyFromTo(retained_cpu, out, priority);
     }
@@ -270,7 +294,7 @@ class CommCPU : public Comm {
 
  private:
   // reduce sum into val[0]
-  inline void ReduceSumCPU(const std::vector<NDArray> &in_data) {
+  inline void ReduceSumCPU(const std::vector<NDArray>& in_data) {
     MSHADOW_TYPE_SWITCH(in_data[0].dtype(), DType, {
       std::vector<DType*> dptr(in_data.size());
       for (size_t i = 0; i < in_data.size(); ++i) {
@@ -284,13 +308,13 @@ class CommCPU : public Comm {
   }
 
   // serial implementation of reduce sum for row sparse NDArray.
-  inline void ReduceSumCPUExSerial(const std::vector<NDArray> &in, NDArray *out) {
+  inline void ReduceSumCPUExSerial(const std::vector<NDArray>& in, NDArray* out) {
     using namespace rowsparse;
     using namespace mshadow;
     auto stype = out->storage_type();
     CHECK_EQ(stype, kRowSparseStorage) << "Unexpected storage type " << stype;
     size_t total_num_rows = 0;
-    size_t num_in = in.size();
+    size_t num_in         = in.size();
     // skip the ones with empty indices and values
     std::vector<bool> skip(num_in, false);
     // the values tensor of the inputs
@@ -306,10 +330,10 @@ class CommCPU : public Comm {
             skip[i] = true;
             continue;
           }
-          auto size = in[i].aux_shape(kIdx).Size();
+          auto size   = in[i].aux_shape(kIdx).Size();
           num_rows[i] = size;
           total_num_rows += size;
-          in_vals[i] = in[i].data().FlatTo2D<cpu, DType>();
+          in_vals[i]    = in[i].data().FlatTo2D<cpu, DType>();
           in_indices[i] = in[i].aux_data(kIdx).FlatTo1D<cpu, IType>();
         }
         std::vector<IType> indices;
@@ -334,9 +358,10 @@ class CommCPU : public Comm {
         for (size_t i = 0; i < nnr; i++) {
           // copy indices back
           idx_data[i] = indices[i];
-          bool zeros = true;
+          bool zeros  = true;
           for (size_t j = 0; j < num_in; j++) {
-            if (skip[j]) continue;
+            if (skip[j])
+              continue;
             size_t offset = offsets[j];
             if (offset < num_rows[j]) {
               if (indices[i] == in_indices[j][offset]) {
@@ -355,12 +380,11 @@ class CommCPU : public Comm {
     });
   }
 
-  template<typename DType>
-  inline static void ReduceSumCPU(
-      const std::vector<DType*> &dptr, size_t offset, index_t size) {
+  template <typename DType>
+  inline static void ReduceSumCPU(const std::vector<DType*>& dptr, size_t offset, index_t size) {
     using namespace mshadow;  // NOLINT(*)
     Tensor<cpu, 1, DType> in_0(dptr[0] + offset, Shape1(size));
-    for (size_t i = 1; i < dptr.size(); i+=4) {
+    for (size_t i = 1; i < dptr.size(); i += 4) {
       switch (dptr.size() - i) {
         case 1: {
           Tensor<cpu, 1, DType> in_1(dptr[i] + offset, Shape1(size));
@@ -369,22 +393,22 @@ class CommCPU : public Comm {
         }
         case 2: {
           Tensor<cpu, 1, DType> in_1(dptr[i] + offset, Shape1(size));
-          Tensor<cpu, 1, DType> in_2(dptr[i+1] + offset, Shape1(size));
+          Tensor<cpu, 1, DType> in_2(dptr[i + 1] + offset, Shape1(size));
           in_0 += in_1 + in_2;
           break;
         }
         case 3: {
           Tensor<cpu, 1, DType> in_1(dptr[i] + offset, Shape1(size));
-          Tensor<cpu, 1, DType> in_2(dptr[i+1] + offset, Shape1(size));
-          Tensor<cpu, 1, DType> in_3(dptr[i+2] + offset, Shape1(size));
+          Tensor<cpu, 1, DType> in_2(dptr[i + 1] + offset, Shape1(size));
+          Tensor<cpu, 1, DType> in_3(dptr[i + 2] + offset, Shape1(size));
           in_0 += in_1 + in_2 + in_3;
           break;
         }
         default: {
           Tensor<cpu, 1, DType> in_1(dptr[i] + offset, Shape1(size));
-          Tensor<cpu, 1, DType> in_2(dptr[i+1] + offset, Shape1(size));
-          Tensor<cpu, 1, DType> in_3(dptr[i+2] + offset, Shape1(size));
-          Tensor<cpu, 1, DType> in_4(dptr[i+3] + offset, Shape1(size));
+          Tensor<cpu, 1, DType> in_2(dptr[i + 1] + offset, Shape1(size));
+          Tensor<cpu, 1, DType> in_3(dptr[i + 2] + offset, Shape1(size));
+          Tensor<cpu, 1, DType> in_4(dptr[i + 3] + offset, Shape1(size));
           in_0 += in_1 + in_2 + in_3 + in_4;
           break;
         }
@@ -392,19 +416,20 @@ class CommCPU : public Comm {
     }
   }
 
-  template<typename DType>
+  template <typename DType>
   inline void ReduceSumCPUImpl(std::vector<DType*> dptr, size_t total) {
     const size_t step = std::min(bigarray_bound_, static_cast<size_t>(4 << 10));
-    long ntask = (total + step - 1) / step; // NOLINT(*)
+    long ntask        = (total + step - 1) / step;  // NOLINT(*)
     if (total < bigarray_bound_ || nthread_reduction_ <= 1) {
       ReduceSumCPU(dptr, 0, total);
     } else {
-      #pragma omp parallel for schedule(static) num_threads(nthread_reduction_)
-      for (long j = 0; j < ntask; ++j) { // NOLINT(*)
-        size_t k = static_cast<size_t>(j);
+#pragma omp parallel for schedule(static) num_threads(nthread_reduction_)
+      for (long j = 0; j < ntask; ++j) {  // NOLINT(*)
+        size_t k     = static_cast<size_t>(j);
         size_t begin = std::min(k * step, total);
-        size_t end = std::min((k + 1) * step, total);
-        if (j == ntask - 1) CHECK_EQ(end, total);
+        size_t end   = std::min((k + 1) * step, total);
+        if (j == ntask - 1)
+          CHECK_EQ(end, total);
         ReduceSumCPU(dptr, begin, static_cast<index_t>(end - begin));
       }
     }
@@ -425,8 +450,8 @@ class CommCPU : public Comm {
       // check if sparse_merged is initialized
       if (sparse_merged.is_none()) {
         CHECK(!merged.is_none());
-        sparse_merged = NDArray(kRowSparseStorage, merged.shape(), merged.ctx(),
-                                true, merged.dtype());
+        sparse_merged =
+            NDArray(kRowSparseStorage, merged.shape(), merged.ctx(), true, merged.dtype());
       }
       return sparse_merged;
     }
@@ -455,9 +480,11 @@ class CommDevice : public Comm {
     inited_ = false;
   }
 
-  virtual ~CommDevice() { }
+  virtual ~CommDevice() {}
 
-  void Init(int key, const NDArrayStorageType stype, const mxnet::TShape& shape,
+  void Init(int key,
+            const NDArrayStorageType stype,
+            const mxnet::TShape& shape,
             int dtype = mshadow::kFloat32) override {
     sorted_key_attrs_.emplace_back(key, shape, dtype);
     inited_ = false;
@@ -476,13 +503,12 @@ class CommDevice : public Comm {
     }
   }
 
-  const NDArray& ReduceRowSparse(int key, const std::vector<NDArray>& src,
-                                 int priority) {
+  const NDArray& ReduceRowSparse(int key, const std::vector<NDArray>& src, int priority) {
     auto& buf = merge_buf_[key];
     std::vector<NDArray> reduce(src.size());
 
     const NDArrayStorageType stype = src[0].storage_type();
-    NDArray& buf_merged = buf.merged_buf(stype);
+    NDArray& buf_merged            = buf.merged_buf(stype);
     if (buf.copy_buf.empty()) {
       // initialize buffer for copying during reduce
       buf.copy_buf.resize(src.size());
@@ -491,8 +517,8 @@ class CommDevice : public Comm {
       }
     }
     CHECK(src[0].storage_type() == buf.copy_buf[0].storage_type())
-         << "Storage type mismatch detected. " << src[0].storage_type() << "(src) vs. "
-         << buf.copy_buf[0].storage_type() << "(buf.copy_buf)";
+        << "Storage type mismatch detected. " << src[0].storage_type() << "(src) vs. "
+        << buf.copy_buf[0].storage_type() << "(buf.copy_buf)";
     for (size_t i = 0; i < src.size(); ++i) {
       CopyFromTo(src[i], &(buf.copy_buf[i]), priority);
       reduce[i] = buf.copy_buf[i];
@@ -501,8 +527,7 @@ class CommDevice : public Comm {
     return buf_merged;
   }
 
-  const NDArray& Reduce(int key, const std::vector<NDArray>& src,
-                        int priority) override {
+  const NDArray& Reduce(int key, const std::vector<NDArray>& src, int priority) override {
     // when this reduce is called from kvstore_dist, gc is not set
     // we don't do compression twice in dist_sync_device
     if ((gc_ != nullptr) && (gc_->get_type() != CompressionType::kNone)) {
@@ -519,7 +544,7 @@ class CommDevice : public Comm {
     auto& buf = merge_buf_[key];
 
     const NDArrayStorageType stype = src[0].storage_type();
-    NDArray& buf_merged = buf.merged_buf(stype);
+    NDArray& buf_merged            = buf.merged_buf(stype);
     // normal dense reduce
     if (stype == kDefaultStorage) {
       CopyFromTo(src[0], &buf_merged, priority);
@@ -532,18 +557,18 @@ class CommDevice : public Comm {
         // such as the largest fullc in VGG. consider to do segment reduce with
         // NDArray.Slice or gpu direct memory access. for the latter, we need to
         // remove some ctx check, and also it reduces 20% perf
-        buf.copy_buf.resize(src.size()-1);
+        buf.copy_buf.resize(src.size() - 1);
         const std::string profiler_scope =
             profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "comm_dev:";
-        for (size_t i = 0; i < src.size()-1; ++i) {
-          buf.copy_buf[i] = NDArray(
-            buf_merged.shape(), buf_merged.ctx(), false, buf_merged.dtype());
+        for (size_t i = 0; i < src.size() - 1; ++i) {
+          buf.copy_buf[i] =
+              NDArray(buf_merged.shape(), buf_merged.ctx(), false, buf_merged.dtype());
           buf.copy_buf[i].AssignStorageInfo(profiler_scope, "copy_buf");
         }
       }
-      for (size_t i = 0; i < src.size()-1; ++i) {
-        CopyFromTo(src[i+1], &(buf.copy_buf[i]), priority);
-        reduce[i+1] = buf.copy_buf[i];
+      for (size_t i = 0; i < src.size() - 1; ++i) {
+        CopyFromTo(src[i + 1], &(buf.copy_buf[i]), priority);
+        reduce[i + 1] = buf.copy_buf[i];
       }
       ElementwiseSum(reduce, &buf_merged, priority);
     } else {
@@ -553,8 +578,7 @@ class CommDevice : public Comm {
     return buf_merged;
   }
 
-  const NDArray& ReduceCompressed(int key, const std::vector<NDArray>& src,
-                                  int priority) {
+  const NDArray& ReduceCompressed(int key, const std::vector<NDArray>& src, int priority) {
     InitBuffersAndComm(src);
     auto& buf = merge_buf_[key];
     std::vector<NDArray> reduce(src.size());
@@ -567,19 +591,17 @@ class CommDevice : public Comm {
       const std::string profiler_scope =
           profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "comm_dev:";
       for (size_t i = 0; i < src.size(); ++i) {
-        buf.copy_buf[i] = NDArray(buf.merged.shape(), buf.merged.ctx(),
-                                  false, buf.merged.dtype());
+        buf.copy_buf[i] = NDArray(buf.merged.shape(), buf.merged.ctx(), false, buf.merged.dtype());
         buf.copy_buf[i].AssignStorageInfo(profiler_scope, "copy_buf");
-        buf.residual[i] = NDArray(buf.merged.shape(), src[i].ctx(),
-                                  false, buf.merged.dtype());
+        buf.residual[i] = NDArray(buf.merged.shape(), src[i].ctx(), false, buf.merged.dtype());
         buf.residual[i].AssignStorageInfo(profiler_scope, "residual");
-        buf.residual[i] = 0;
+        buf.residual[i]    = 0;
         int64_t small_size = gc_->GetCompressedSize(buf.merged.shape().Size());
-        buf.compressed_recv_buf[i] = NDArray(mxnet::TShape{small_size}, buf.merged.ctx(),
-                                             false, buf.merged.dtype());
+        buf.compressed_recv_buf[i] =
+            NDArray(mxnet::TShape{small_size}, buf.merged.ctx(), false, buf.merged.dtype());
         buf.compressed_recv_buf[i].AssignStorageInfo(profiler_scope, "compressed_recv_buf");
-        buf.compressed_send_buf[i] = NDArray(mxnet::TShape{small_size}, src[i].ctx(),
-                                             false, buf.merged.dtype());
+        buf.compressed_send_buf[i] =
+            NDArray(mxnet::TShape{small_size}, src[i].ctx(), false, buf.merged.dtype());
         buf.compressed_send_buf[i].AssignStorageInfo(profiler_scope, "compressed_send_buf");
       }
     }
@@ -604,8 +626,10 @@ class CommDevice : public Comm {
     return buf.merged;
   }
 
-  void Broadcast(int key, const NDArray& src,
-                 const std::vector<NDArray*> dst, int priority) override {
+  void Broadcast(int key,
+                 const NDArray& src,
+                 const std::vector<NDArray*> dst,
+                 int priority) override {
     if (!inited_) {
       // copy to a random device first
       int dev_id = key % dst.size();
@@ -624,26 +648,30 @@ class CommDevice : public Comm {
     }
   }
 
-  void BroadcastRowSparse(int key, const NDArray& src,
+  void BroadcastRowSparse(int key,
+                          const NDArray& src,
                           const std::vector<std::pair<NDArray*, NDArray>>& dst,
                           const int priority) override {
     CHECK_EQ(src.storage_type(), kRowSparseStorage)
-      << "BroadcastRowSparse expects row-sparse src NDArray";
+        << "BroadcastRowSparse expects row-sparse src NDArray";
 
     for (const auto& dst_kv : dst) {
-      NDArray* out = dst_kv.first;
+      NDArray* out   = dst_kv.first;
       NDArray row_id = dst_kv.second;
       CHECK_EQ(out->storage_type(), kRowSparseStorage)
-               << "BroadcastRowSparse expects row_sparse dst NDArray";
-      CHECK_EQ(row_id.ctx(), src.ctx())
-              << "row_id and src are expected to be on the same context";
+          << "BroadcastRowSparse expects row_sparse dst NDArray";
+      CHECK_EQ(row_id.ctx(), src.ctx()) << "row_id and src are expected to be on the same context";
 
       // retain according to indices
       const bool is_same_ctx = out->ctx() == src.ctx();
       const bool is_diff_var = out->var() != src.var();
-      NDArray retained_gpu = (is_same_ctx && is_diff_var) ? *out :
-          NDArray(kRowSparseStorage, out->shape(), src.ctx(), true,
-                  out->dtype(), out->aux_types());
+      NDArray retained_gpu   = (is_same_ctx && is_diff_var) ? *out
+                                                            : NDArray(kRowSparseStorage,
+                                                                    out->shape(),
+                                                                    src.ctx(),
+                                                                    true,
+                                                                    out->dtype(),
+                                                                    out->aux_types());
       if (!is_diff_var) {
         common::LogOnce("The output of row_sparse_pull() on key " + std::to_string(key) +
                         "refers to the same NDArray as the one stored in KVStore."
@@ -653,31 +681,37 @@ class CommDevice : public Comm {
                         "consider create a new NDArray buffer to store the output.");
       }
       bool is_gpu = retained_gpu.ctx().dev_mask() == gpu::kDevMask;
-      Engine::Get()->PushAsync([=](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-          const TBlob& indices = row_id.data();
-          using namespace mxnet::common;
-          NDArray temp = retained_gpu;
-          switch (temp.ctx().dev_mask()) {
-            case cpu::kDevMask: {
-              SparseRetainOpForwardRspWrapper<cpu>(rctx.get_stream<cpu>(),
-                  src, indices, kWriteTo, &temp);
-              break;
-            }
+      Engine::Get()->PushAsync(
+          [=](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            const TBlob& indices = row_id.data();
+            using namespace mxnet::common;
+            NDArray temp = retained_gpu;
+            switch (temp.ctx().dev_mask()) {
+              case cpu::kDevMask: {
+                SparseRetainOpForwardRspWrapper<cpu>(
+                    rctx.get_stream<cpu>(), src, indices, kWriteTo, &temp);
+                break;
+              }
 #if MXNET_USE_CUDA
-            case gpu::kDevMask: {
-              SparseRetainOpForwardRspWrapper<gpu>(rctx.get_stream<gpu>(),
-                  src, indices, kWriteTo, &temp);
-              // wait for GPU operations to complete
-              rctx.get_stream<gpu>()->Wait();
-              break;
-            }
+              case gpu::kDevMask: {
+                SparseRetainOpForwardRspWrapper<gpu>(
+                    rctx.get_stream<gpu>(), src, indices, kWriteTo, &temp);
+                // wait for GPU operations to complete
+                rctx.get_stream<gpu>()->Wait();
+                break;
+              }
 #endif
-            default: LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
-          }
-          on_complete();
-        }, retained_gpu.ctx(), {src.var(), row_id.var()}, {retained_gpu.var()},
-      is_gpu ? FnProperty::kGPUPrioritized : FnProperty::kCPUPrioritized,
-      priority, "KVStoreSparseRetain");
+              default:
+                LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
+            }
+            on_complete();
+          },
+          retained_gpu.ctx(),
+          {src.var(), row_id.var()},
+          {retained_gpu.var()},
+          is_gpu ? FnProperty::kGPUPrioritized : FnProperty::kCPUPrioritized,
+          priority,
+          "KVStoreSparseRetain");
       CopyFromTo(retained_gpu, out, priority);
     }
   }
@@ -685,10 +719,11 @@ class CommDevice : public Comm {
   using KeyAttrs = std::tuple<int, mxnet::TShape, int>;
   // try to allocate buff on device evenly
   void InitMergeBuffer(const std::vector<Context>& devs) {
-    std::sort(sorted_key_attrs_.begin(), sorted_key_attrs_.end(), [](
-              const KeyAttrs& a, const KeyAttrs& b) {
-      return std::get<1>(a).Size() > std::get<1>(b).Size();
-    });
+    std::sort(sorted_key_attrs_.begin(),
+              sorted_key_attrs_.end(),
+              [](const KeyAttrs& a, const KeyAttrs& b) {
+                return std::get<1>(a).Size() > std::get<1>(b).Size();
+              });
 
     std::unordered_map<int, std::pair<Context, size_t>> ctx_info;
     for (auto d : devs) {
@@ -699,16 +734,16 @@ class CommDevice : public Comm {
         profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "kvstore:comm_dev:";
 
     for (auto& sorted_key_attr : sorted_key_attrs_) {
-      const int key  = std::get<0>(sorted_key_attr);
+      const int key              = std::get<0>(sorted_key_attr);
       const mxnet::TShape& shape = std::get<1>(sorted_key_attr);
-      const int type = std::get<2>(sorted_key_attr);
-      auto& buf = merge_buf_[key];
+      const int type             = std::get<2>(sorted_key_attr);
+      auto& buf                  = merge_buf_[key];
       Context ctx;
       size_t min_size = std::numeric_limits<size_t>::max();
       for (auto& ctx_info_kv : ctx_info) {
         size_t size = ctx_info_kv.second.second;
         if (size <= min_size) {
-          ctx = ctx_info_kv.second.first;
+          ctx      = ctx_info_kv.second.first;
           min_size = size;
         }
       }
@@ -716,7 +751,7 @@ class CommDevice : public Comm {
       // only sees sparse arrays
       if (buf.merged.is_none()) {
         bool delay_alloc = true;
-        buf.merged = NDArray(shape, ctx, delay_alloc, type);
+        buf.merged       = NDArray(shape, ctx, delay_alloc, type);
         buf.merged.AssignStorageInfo(profiler_scope, "merge_buf_" + std::to_string(key));
       }
       ctx_info[ctx.dev_id].second += shape.Size();
@@ -733,9 +768,9 @@ class CommDevice : public Comm {
         gpus.push_back(d.dev_id);
       }
     }
-    int n = static_cast<int>(gpus.size());
+    int n       = static_cast<int>(gpus.size());
     int enabled = 0;
-    std::vector<int> p2p(n*n);
+    std::vector<int> p2p(n * n);
 
     for (int i = 0; i < n; ++i) {
       // Restores active device to what it was before EnableP2P
@@ -747,21 +782,21 @@ class CommDevice : public Comm {
           cudaError_t e = cudaDeviceEnablePeerAccess(gpus[j], 0);
           if (e == cudaSuccess || e == cudaErrorPeerAccessAlreadyEnabled) {
             ++enabled;
-            p2p[i*n+j] = 1;
+            p2p[i * n + j] = 1;
           }
         }
       }
     }
-    if (enabled != n*(n-1)) {
+    if (enabled != n * (n - 1)) {
       // print warning info if not fully enabled
-      LOG(WARNING) << "only " << enabled <<  " out of "
-                   << n*(n-1) << " GPU pairs are enabled direct access. "
+      LOG(WARNING) << "only " << enabled << " out of " << n * (n - 1)
+                   << " GPU pairs are enabled direct access. "
                    << "It may affect the performance. "
                    << "You can set MXNET_ENABLE_GPU_P2P=0 to turn it off";
       std::string access(n, '.');
       for (int i = 0; i < n; ++i) {
         for (int j = 0; j < n; ++j) {
-          access[j] = p2p[i*n+j] ? 'v' : '.';
+          access[j] = p2p[i * n + j] ? 'v' : '.';
         }
         LOG(WARNING) << access;
       }
@@ -792,8 +827,8 @@ class CommDevice : public Comm {
       // check if sparse_merged is initialized
       if (sparse_merged.is_none()) {
         CHECK(!merged.is_none());
-        sparse_merged = NDArray(kRowSparseStorage, merged.shape(), merged.ctx(),
-                                true, merged.dtype());
+        sparse_merged =
+            NDArray(kRowSparseStorage, merged.shape(), merged.ctx(), true, merged.dtype());
       }
       return sparse_merged;
     }
diff --git a/src/kvstore/comm_tree.h b/src/kvstore/comm_tree.h
index 07ffba53cb8b..f855845b297f 100644
--- a/src/kvstore/comm_tree.h
+++ b/src/kvstore/comm_tree.h
@@ -50,15 +50,17 @@ namespace kvstore {
 class CommDeviceTree : public CommDevice {
  public:
   CommDeviceTree() {
-    inited_ = false;
-    gpuarray_bound_ = dmlc::GetEnv("MXNET_KVSTORE_TREE_ARRAY_BOUND", 10000000);
-    backtrack_ = dmlc::GetEnv("MXNET_KVSTORE_TREE_BACKTRACK", 0);
+    inited_             = false;
+    gpuarray_bound_     = dmlc::GetEnv("MXNET_KVSTORE_TREE_ARRAY_BOUND", 10000000);
+    backtrack_          = dmlc::GetEnv("MXNET_KVSTORE_TREE_BACKTRACK", 0);
     link_usage_penalty_ = dmlc::GetEnv("MXNET_KVSTORE_TREE_LINK_USAGE_PENALTY", 0.7);
   }
 
-  virtual ~CommDeviceTree() { }
+  virtual ~CommDeviceTree() {}
 
-  void Init(int key, const NDArrayStorageType stype, const mxnet::TShape& shape,
+  void Init(int key,
+            const NDArrayStorageType stype,
+            const mxnet::TShape& shape,
             int dtype = mshadow::kFloat32) override {
     tree_sorted_key_attrs_.emplace_back(key, shape, dtype);
     sorted_key_attrs_.emplace_back(key, shape, dtype);
@@ -88,23 +90,26 @@ class CommDeviceTree : public CommDevice {
    * \param merged_row is the id of the slice we are taking
    * \param priority the priority of the operation
    */
-  const NDArray& ReduceInner(int key, const std::vector<NDArray>& src, int root,
-                             int merged_row, int priority) {
+  const NDArray& ReduceInner(int key,
+                             const std::vector<NDArray>& src,
+                             int root,
+                             int merged_row,
+                             int priority) {
     std::vector<std::vector<NDArray>> reduce(devs_.size());
 
-    TreeBufferEntry& random_buf = tree_merge_buf_[0][key];
+    TreeBufferEntry& random_buf    = tree_merge_buf_[0][key];
     const NDArrayStorageType stype = random_buf.merged[0].storage_type();
-    std::vector<size_t>& topology = topology_[root];
+    std::vector<size_t>& topology  = topology_[root];
     NDArray buf_slice;
 
     if (stype == kDefaultStorage) {
       // Copy everything into buf.merged for each gpu
       for (const auto& src_gpu_value : src) {
         int start = scan_[root][depth_];
-        int end = scan_[root][depth_+1];
+        int end   = scan_[root][depth_ + 1];
 
         for (int j = start; j < end; ++j) {
-          int topo_id = topology[j];
+          int topo_id          = topology[j];
           TreeBufferEntry& buf = tree_merge_buf_[topo_id][key];
 
           if (devs_[topo_id] == src_gpu_value.ctx()) {
@@ -114,14 +119,14 @@ class CommDeviceTree : public CommDevice {
       }
 
       for (int level = depth_; level > 0; --level) {
-        int start = scan_[root][level  ];
-        int end = scan_[root][level+1];
+        int start = scan_[root][level];
+        int end   = scan_[root][level + 1];
 
         unsigned is_dest = 0;
-        int dest_id = 0;
+        int dest_id      = 0;
         for (int j = start; j < end; ++j) {
           int topo_id = topology[j];
-          dest_id = (is_dest == 0) ? topo_id : dest_id;
+          dest_id     = (is_dest == 0) ? topo_id : dest_id;
 
           TreeBufferEntry& buf_dest = tree_merge_buf_[dest_id][key];
           TreeBufferEntry& buf_from = tree_merge_buf_[topo_id][key];
@@ -133,26 +138,24 @@ class CommDeviceTree : public CommDevice {
           } else {
             if (dest_id != topo_id) {
               CopyFromTo(buf_from.merged[merged_row],
-                         &(buf_dest.copy_buf[merged_row][is_dest-1]),
+                         &(buf_dest.copy_buf[merged_row][is_dest - 1]),
                          priority);
-              reduce[dest_id].push_back(
-                  buf_dest.copy_buf[merged_row][is_dest-1]);
+              reduce[dest_id].push_back(buf_dest.copy_buf[merged_row][is_dest - 1]);
             }
           }
 
-          is_dest = (is_dest == static_cast<unsigned>(kBranch)-1) ?
-              0 : is_dest+1;
+          is_dest = (is_dest == static_cast<unsigned>(kBranch) - 1) ? 0 : is_dest + 1;
         }
 
-        start = scan_[root][level-1];
-        end = scan_[root][level];
+        start      = scan_[root][level - 1];
+        end        = scan_[root][level];
         int source = end;
         for (int i = start; i < end; ++i) {
           int gpu_id = topology[i];
 
           // source keeps track of 2 leaf nodes, while start keeps track of parent
           int dest_id = topology[source];
-          int from_id = topology[source+1];
+          int from_id = topology[source + 1];
           source += 2;
 
           // conditional to detect whether operation must be done
@@ -171,13 +174,12 @@ class CommDeviceTree : public CommDevice {
       LOG(FATAL) << "Only dense input supported for now";
     }
 
-    int topo_id = topology[0];
+    int topo_id          = topology[0];
     TreeBufferEntry& buf = tree_merge_buf_[topo_id][key];
     return buf.merged[merged_row];
   }
 
-  const NDArray& Reduce(int key, const std::vector<NDArray>& src,
-                        int priority) override {
+  const NDArray& Reduce(int key, const std::vector<NDArray>& src, int priority) override {
     // when this reduce is called from kvstore_dist, gc is not set
     // we don't do compression twice in dist_sync_device
     if ((gc_ != nullptr) && (gc_->get_type() != CompressionType::kNone)) {
@@ -191,22 +193,22 @@ class CommDeviceTree : public CommDevice {
     }
 
     InitBuffersAndComm(src);
-    std::vector<std::vector<NDArray>>  slice(devs_.size());
+    std::vector<std::vector<NDArray>> slice(devs_.size());
     std::vector<std::vector<NDArray*>> broadcast_slice(devs_.size());
-    std::vector<int>                   slice_scan(devs_.size()+1);
+    std::vector<int> slice_scan(devs_.size() + 1);
 
-    int total_size = src[0].shape().Size();
+    int total_size      = src[0].shape().Size();
     unsigned first_size = src[0].shape()[0];
 
     const NDArrayStorageType stype = src[0].storage_type();
     // normal dense reduce
     if (stype == kDefaultStorage) {
-      if (total_size > gpuarray_bound_ && first_size >= 2*devs_.size()) {
+      if (total_size > gpuarray_bound_ && first_size >= 2 * devs_.size()) {
         // Find slice bounds
-        slice_scan[0] = 0;
-        int slice_size = first_size/devs_.size();
+        slice_scan[0]  = 0;
+        int slice_size = first_size / devs_.size();
         for (unsigned i = 1; i < devs_.size(); ++i) {
-          slice_scan[i] = slice_scan[i-1] + slice_size;
+          slice_scan[i] = slice_scan[i - 1] + slice_size;
         }
         slice_scan[devs_.size()] = src[0].shape()[0];
 
@@ -215,8 +217,7 @@ class CommDeviceTree : public CommDevice {
         for (unsigned row = 0; row < devs_.size(); ++row) {
           for (unsigned col = 0; col < devs_.size(); ++col) {
             TreeBufferEntry& buf = tree_merge_buf_[col][key];
-            NDArray curr_slice = src[col].Slice(slice_scan[row],
-                slice_scan[row+1]);
+            NDArray curr_slice   = src[col].Slice(slice_scan[row], slice_scan[row + 1]);
             slice[row].push_back(curr_slice);
             broadcast_slice[row].push_back(&(buf.merged[row]));
           }
@@ -249,9 +250,12 @@ class CommDeviceTree : public CommDevice {
     }
   }
 
-  void BroadcastInner(int key, const NDArray& src,
-                      const std::vector<NDArray*>& dst, int root,
-                      int merged_row, int priority) {
+  void BroadcastInner(int key,
+                      const NDArray& src,
+                      const std::vector<NDArray*>& dst,
+                      int root,
+                      int merged_row,
+                      int priority) {
     // copy to root of tree
     std::vector<size_t>& topology = topology_[root];
     std::vector<NDArray> temp(devs_.size());
@@ -262,26 +266,28 @@ class CommDeviceTree : public CommDevice {
 
     for (int level = 1; level <= depth_; ++level) {
       int start = scan_[root][level];
-      int end = scan_[root][level+1];
+      int end   = scan_[root][level + 1];
 
       unsigned is_src = 0;
-      int src_id = 0;
+      int src_id      = 0;
       for (int j = start; j < end; ++j) {
         int topo_id = topology[j];
-        src_id = (is_src == 0) ? topo_id : src_id;
+        src_id      = (is_src == 0) ? topo_id : src_id;
 
         if (is_src && src_id != topo_id) {
           CopyFromTo(temp[src_id], dst[topo_id], priority);
           temp[topo_id] = *dst[topo_id];
         }
 
-        is_src = (is_src == static_cast<unsigned>(kBranch)-1) ? 0 : is_src+1;
+        is_src = (is_src == static_cast<unsigned>(kBranch) - 1) ? 0 : is_src + 1;
       }
     }
   }
 
-  void Broadcast(int key, const NDArray& src,
-                 const std::vector<NDArray*> dst, int priority) override {
+  void Broadcast(int key,
+                 const NDArray& src,
+                 const std::vector<NDArray*> dst,
+                 int priority) override {
     if (!inited_) {
       // copy to a random device first
       int dev_id = key % dst.size();
@@ -292,33 +298,34 @@ class CommDeviceTree : public CommDevice {
         }
       }
     } else {
-      int total_size = src.shape().Size();
-      unsigned first_size = src.shape()[0];
+      int total_size                 = src.shape().Size();
+      unsigned first_size            = src.shape()[0];
       const NDArrayStorageType stype = src.storage_type();
       // normal dense reduce
       if (stype == kDefaultStorage) {
-      if (total_size > gpuarray_bound_ && first_size >= 2*devs_.size()) {
-        std::vector<int> slice_scan(devs_.size()+1);
-        slice_scan[0] = 0;
-        int slice_size = (dst[0]->shape()[0])/devs_.size();
-        for (unsigned i = 1; i < devs_.size(); ++i) {
-          slice_scan[i] = slice_scan[i-1] + slice_size;
-        }
-        slice_scan[devs_.size()] = dst[0]->shape()[0];
-
-        for (unsigned gpu_id = 0; gpu_id < dst.size(); ++gpu_id) {
-          TreeBufferEntry& buf = tree_merge_buf_[gpu_id][key];
-          for (unsigned i = 0; i < devs_.size(); ++i) {
-            if (devs_[gpu_id] == dst[gpu_id]->ctx()) {
-              NDArray curr_slice = dst[gpu_id]->Slice(slice_scan[i], slice_scan[i+1]);
-              CopyFromTo(buf.merged[i], &curr_slice, priority);
+        if (total_size > gpuarray_bound_ && first_size >= 2 * devs_.size()) {
+          std::vector<int> slice_scan(devs_.size() + 1);
+          slice_scan[0]  = 0;
+          int slice_size = (dst[0]->shape()[0]) / devs_.size();
+          for (unsigned i = 1; i < devs_.size(); ++i) {
+            slice_scan[i] = slice_scan[i - 1] + slice_size;
+          }
+          slice_scan[devs_.size()] = dst[0]->shape()[0];
+
+          for (unsigned gpu_id = 0; gpu_id < dst.size(); ++gpu_id) {
+            TreeBufferEntry& buf = tree_merge_buf_[gpu_id][key];
+            for (unsigned i = 0; i < devs_.size(); ++i) {
+              if (devs_[gpu_id] == dst[gpu_id]->ctx()) {
+                NDArray curr_slice = dst[gpu_id]->Slice(slice_scan[i], slice_scan[i + 1]);
+                CopyFromTo(buf.merged[i], &curr_slice, priority);
+              }
             }
           }
+        } else {
+          int root = 0;
+          BroadcastInner(key, src, dst, root, -1, priority);
         }
       } else {
-        int root = 0;
-        BroadcastInner(key, src, dst, root, -1, priority);
-      }} else {
         LOG(FATAL) << "Only dense input supported for now";
       }
     }
@@ -333,10 +340,10 @@ class CommDeviceTree : public CommDevice {
         gpus.push_back(d.dev_id);
       }
     }
-    int n = static_cast<int>(gpus.size());
+    int n       = static_cast<int>(gpus.size());
     int enabled = 0;
     p2p->clear();
-    p2p->resize(n*n, 0);
+    p2p->resize(n * n, 0);
     for (int i = 0; i < n; ++i) {
       mxnet::common::cuda::DeviceStore device_store(gpus[i]);
       for (int j = 0; j < n; j++) {
@@ -346,21 +353,21 @@ class CommDeviceTree : public CommDevice {
           cudaError_t e = cudaDeviceEnablePeerAccess(gpus[j], 0);
           if (e == cudaSuccess || e == cudaErrorPeerAccessAlreadyEnabled) {
             ++enabled;
-            (*p2p)[i*n+j] = 1;
+            (*p2p)[i * n + j] = 1;
           }
         }
       }
     }
-    if (enabled != n*(n-1)) {
+    if (enabled != n * (n - 1)) {
       // print warning info if not fully enabled
-      LOG(WARNING) << "only " << enabled <<  " out of "
-                   << n*(n-1) << " GPU pairs are enabled direct access. "
+      LOG(WARNING) << "only " << enabled << " out of " << n * (n - 1)
+                   << " GPU pairs are enabled direct access. "
                    << "It may affect the performance. "
                    << "You can set MXNET_ENABLE_GPU_P2P=0 to turn it off";
       std::string access(n, '.');
       for (int i = 0; i < n; ++i) {
         for (int j = 0; j < n; ++j) {
-          access[j] = (*p2p)[i*n+j] ? 'v' : '.';
+          access[j] = (*p2p)[i * n + j] ? 'v' : '.';
         }
         LOG(WARNING) << access;
       }
@@ -370,16 +377,15 @@ class CommDeviceTree : public CommDevice {
 
   void QueryTopology() {
 #if MXNET_USE_CUDA
-    std::vector<float> link_matrix(devs_.size()*devs_.size());
-    std::vector<int> p2p_matrix(devs_.size()*devs_.size());
+    std::vector<float> link_matrix(devs_.size() * devs_.size());
+    std::vector<int> p2p_matrix(devs_.size() * devs_.size());
     EnableP2P(&p2p_matrix);
     GetP2PWeight(devs_, p2p_matrix, &link_matrix);
     if (backtrack_)
       LOG(INFO) << "Using Backtracking to generate trees";
     else
       LOG(INFO) << "Using Kernighan-Lin to generate trees";
-    ComputeTrees(link_matrix, devs_.size(), link_usage_penalty_, backtrack_,
-        &topology_, &scan_);
+    ComputeTrees(link_matrix, devs_.size(), link_usage_penalty_, backtrack_, &topology_, &scan_);
 
     depth_ = ComputeDepth(devs_.size());
 #endif
@@ -404,9 +410,9 @@ class CommDeviceTree : public CommDevice {
         profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "comm_dev_tree:";
 
     for (auto& tree_sorted_key_attr : tree_sorted_key_attrs_) {
-      const int key  = std::get<0>(tree_sorted_key_attr);
+      const int key              = std::get<0>(tree_sorted_key_attr);
       const mxnet::TShape& shape = std::get<1>(tree_sorted_key_attr);
-      const int type = std::get<2>(tree_sorted_key_attr);
+      const int type             = std::get<2>(tree_sorted_key_attr);
 
       if (key_dist.find(shape.Size()) == key_dist.end())
         key_dist[shape.Size()] = 1;
@@ -414,7 +420,7 @@ class CommDeviceTree : public CommDevice {
         key_dist[shape.Size()]++;
 
       int start = scan_[0][depth_];
-      int end = scan_[0][depth_+1];
+      int end   = scan_[0][depth_ + 1];
 
       // In order to generalize to any number of GPUs in arbitrary order, we use
       // strategy of having found the mapping from 0, 1, ..., n_gpus to dev_id.
@@ -442,29 +448,28 @@ class CommDeviceTree : public CommDevice {
       // 3) We use the mapping (devs_) to retrieve dev_id and device context
       for (int j = start; j < end; ++j) {
         int topo_id = topology_[0][j];
-        auto& buf = tree_merge_buf_[topo_id][key];
+        auto& buf   = tree_merge_buf_[topo_id][key];
         Context ctx = devs_[topo_id];
 
         // buf.merged enforces that we only visit each GPU once
         if (buf.merged.empty()) {
           mxnet::TShape shape_copy = shape;
-          int total_size = shape.Size();
-          unsigned first_size = shape[0];
-          if (total_size > gpuarray_bound_ && first_size >= 2*devs_.size()) {
+          int total_size           = shape.Size();
+          unsigned first_size      = shape[0];
+          if (total_size > gpuarray_bound_ && first_size >= 2 * devs_.size()) {
             // Find slice bounds
-            int slice_size = first_size/devs_.size();
-            int last_slice = first_size-(devs_.size()-1)*slice_size;
-            shape_copy[0]   = slice_size;
+            int slice_size = first_size / devs_.size();
+            int last_slice = first_size - (devs_.size() - 1) * slice_size;
+            shape_copy[0]  = slice_size;
             buf.merged.resize(devs_.size());
             for (unsigned row = 0; row < devs_.size(); ++row) {
-              if (row == devs_.size()-1)
+              if (row == devs_.size() - 1)
                 shape_copy[0] = last_slice;
               buf.merged[row] = NDArray(shape_copy, ctx, delay_alloc, type);
-              buf.merged[row].AssignStorageInfo(
-                  profiler_scope, "merged_" + std::to_string(key));
+              buf.merged[row].AssignStorageInfo(profiler_scope, "merged_" + std::to_string(key));
               buf.copy_buf.emplace_back();
               if (buf.copy_buf[row].empty()) {
-                buf.copy_buf[row].resize(kBranch-1);
+                buf.copy_buf[row].resize(kBranch - 1);
                 for (size_t col = 0; col < buf.copy_buf[0].size(); ++col) {
                   buf.copy_buf[row][col] = NDArray(buf.merged[row].shape(),
                                                    buf.merged[row].ctx(),
@@ -476,16 +481,13 @@ class CommDeviceTree : public CommDevice {
             }
           } else {
             buf.merged.emplace_back(shape, ctx, false, type);
-            buf.merged.back().AssignStorageInfo(
-                profiler_scope, "merged_" + std::to_string(key));
+            buf.merged.back().AssignStorageInfo(profiler_scope, "merged_" + std::to_string(key));
             if (buf.copy_buf.empty()) {
               buf.copy_buf.emplace_back();
-              buf.copy_buf[0].resize(kBranch-1);
+              buf.copy_buf[0].resize(kBranch - 1);
               for (size_t col = 0; col < buf.copy_buf[0].size(); ++col) {
-                buf.copy_buf[0][col] = NDArray(buf.merged[0].shape(),
-                                               buf.merged[0].ctx(),
-                                               delay_alloc,
-                                               buf.merged[0].dtype());
+                buf.copy_buf[0][col] = NDArray(
+                    buf.merged[0].shape(), buf.merged[0].ctx(), delay_alloc, buf.merged[0].dtype());
                 buf.copy_buf[0][col].AssignStorageInfo(profiler_scope, "copy_buf");
               }
             }
diff --git a/src/kvstore/gpu_topology.h b/src/kvstore/gpu_topology.h
index 777fb47f9945..70a4f555008c 100644
--- a/src/kvstore/gpu_topology.h
+++ b/src/kvstore/gpu_topology.h
@@ -23,8 +23,8 @@
 #ifndef MXNET_KVSTORE_GPU_TOPOLOGY_H_
 #define MXNET_KVSTORE_GPU_TOPOLOGY_H_
 #if MXNET_USE_CUDA
-  #include <cuda_runtime_api.h>
-  #include <cuda.h>
+#include <cuda_runtime_api.h>
+#include <cuda.h>
 #endif
 #include <iostream>
 #include <vector>
@@ -55,8 +55,10 @@ inline void PrintVector(const std::string& str, const std::vector<T>& vec) {
 }
 
 template <typename T>
-inline void PrintMatrix(const std::string& str, const std::vector<T>& matrix,
-    int num_rows, int num_cols) {
+inline void PrintMatrix(const std::string& str,
+                        const std::vector<T>& matrix,
+                        int num_rows,
+                        int num_cols) {
   LOG(INFO) << str << ":";
   int count = 0;
   for (int row = 0; row < num_rows; ++row) {
@@ -68,16 +70,17 @@ inline void PrintMatrix(const std::string& str, const std::vector<T>& matrix,
   }
 }
 
-inline void PrintTopo(const std::string& str, const std::vector<size_t>& topo_row,
-    std::vector<size_t> scan_row) {
+inline void PrintTopo(const std::string& str,
+                      const std::vector<size_t>& topo_row,
+                      std::vector<size_t> scan_row) {
   LOG(INFO) << str << ":";
-  int depth = scan_row.size()-1;
+  int depth = scan_row.size() - 1;
   for (int row = 0; row < depth; ++row) {
     int start = scan_row[row];
-    int end = scan_row[row+1];
+    int end   = scan_row[row + 1];
     std::string output;
     for (; start < end; start++) {
-      for (int i = 0; i < (2 << (depth-row-2))+1; ++i) {
+      for (int i = 0; i < (2 << (depth - row - 2)) + 1; ++i) {
         output += " ";
       }
       output += std::to_string(topo_row[start]);
@@ -86,7 +89,7 @@ inline void PrintTopo(const std::string& str, const std::vector<size_t>& topo_ro
   }
 }
 
-/** 
+/**
  * \brief Uses BFS to find whether undirected graph is connected or not given its
  * adjacency matrix
  * Note: only consider matrix values > 1, because we care about whether it is
@@ -105,7 +108,7 @@ inline bool IsConnected(const std::vector<T>& matrix, int num_gpus) {
     work_list.pop();
 
     for (int i = 0; i < num_gpus; ++i) {
-      int neighbour = matrix[curr*num_gpus + i];
+      int neighbour = matrix[curr * num_gpus + i];
       if (i != curr && neighbour > 1 && visited[i] == false) {
         visited[i] = true;
         work_list.push(i);
@@ -153,7 +156,7 @@ inline void GetP2PWeight(const std::vector<Context>& devs,
   for (int row = 0; row < num_gpus; ++row) {
     for (int col = 0; col < num_gpus; ++col) {
       if (row == col) {
-        (*matrix)[row*num_gpus+col] = 0;
+        (*matrix)[row * num_gpus + col] = 0;
       } else {
         int value;
         int row_gpu = zero_dev_id[row];
@@ -161,7 +164,7 @@ inline void GetP2PWeight(const std::vector<Context>& devs,
         cudaDeviceGetP2PAttribute(&value, attr, row_gpu, col_gpu);
         if (value > max[row])
           max[row] = value;
-        (*matrix)[row*num_gpus+col] = static_cast<T>(value)+1;
+        (*matrix)[row * num_gpus + col] = static_cast<T>(value) + 1;
       }
     }
   }
@@ -240,7 +243,7 @@ inline void GetP2PWeight(const std::vector<Context>& devs,
     }
   } else {
     for (auto& matrix_value : *matrix) {
-      matrix_value = (matrix_value == 1) ? 1./num_gpus : matrix_value;
+      matrix_value = (matrix_value == 1) ? 1. / num_gpus : matrix_value;
     }
   }
   if (kLogTree)
@@ -257,14 +260,13 @@ inline void GetP2PWeight(const std::vector<Context>& devs,
  *   y = A*x (no accumulate)
  */
 template <typename T>
-inline void gemv(const std::vector<T>& A, const std::vector<int>& x,
-                 std::vector<T>* y) {
+inline void gemv(const std::vector<T>& A, const std::vector<int>& x, std::vector<T>* y) {
   int nrows = x.size();
   int count = 0;
-  for (int row=0; row < nrows; ++row) {
+  for (int row = 0; row < nrows; ++row) {
     (*y)[row] = 0;
-    for (int col=0; col < nrows; ++col) {
-      (*y)[row] += A[count]*static_cast<T>(x[col]);
+    for (int col = 0; col < nrows; ++col) {
+      (*y)[row] += A[count] * static_cast<T>(x[col]);
       count++;
     }
   }
@@ -277,8 +279,8 @@ inline void gemv(const std::vector<T>& A, const std::vector<int>& x,
 template <typename T>
 inline void ewisemult(const std::vector<int>& u, T alpha, std::vector<T>* w) {
   int nelem = u.size();
-  for (int i=0; i < nelem; ++i) {
-    (*w)[i] *= alpha*static_cast<T>(u[i]);
+  for (int i = 0; i < nelem; ++i) {
+    (*w)[i] *= alpha * static_cast<T>(u[i]);
   }
 }
 
@@ -294,17 +296,21 @@ inline void FindBestMove(const std::vector<T>& W,
                          const std::vector<int>& P_temp,
                          const std::vector<T>& D,
                          const std::unordered_set<int>& used,
-                         int* a, int* b, T* g) {
+                         int* a,
+                         int* b,
+                         T* g) {
   int nrows = P_temp.size();
-  *g = 0;
-  *a = -1;
-  *b = -1;
-  for (int row=0; row < nrows; ++row) {
-    if (P_temp[row] == 0 || used.find(row) != used.end()) continue;
-    for (int col=row+1; col < nrows; ++col) {
-      if (P_temp[col] == 0 || P_temp[row] == P_temp[col]) continue;
-
-      T cost = D[row]+D[col]-2*W[row*nrows+col];
+  *g        = 0;
+  *a        = -1;
+  *b        = -1;
+  for (int row = 0; row < nrows; ++row) {
+    if (P_temp[row] == 0 || used.find(row) != used.end())
+      continue;
+    for (int col = row + 1; col < nrows; ++col) {
+      if (P_temp[col] == 0 || P_temp[row] == P_temp[col])
+        continue;
+
+      T cost = D[row] + D[col] - 2 * W[row * nrows + col];
       if (cost > *g) {
         *g = cost;
         *a = row;
@@ -323,7 +329,8 @@ inline void FindBestMove(const std::vector<T>& W,
  *        the output of partitioning one large cluster
  */
 template <typename T>
-inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
+inline bool KernighanLin(const std::vector<T>& W,
+                         std::vector<int>* P,
                          int* num_partitions,
                          std::vector<std::pair<int, int>>* cluster_pairs,
                          std::mt19937* gen) {
@@ -340,14 +347,13 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
   }
 
   bool stop = true;
-  for (unsigned color=0; color < histogram.size(); ++color) {
+  for (unsigned color = 0; color < histogram.size(); ++color) {
     int partition_size = histogram[color];
     // Save cluster in preparation for push to topo in GenerateBinaryTree()
     if (partition_size <= 2) {
-      cluster_pairs->push_back(
-         std::pair<int, int>(static_cast<int>(color), -partition_size));
+      cluster_pairs->push_back(std::pair<int, int>(static_cast<int>(color), -partition_size));
 
-    // Do Kernighan-Lin if clustering is necessary
+      // Do Kernighan-Lin if clustering is necessary
     } else {
       stop = false;
 
@@ -355,8 +361,8 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
       //    Assign random balanced partition of it
       //   -balanced is more important than random, so allocate first half to A
       //    and rest to B
-      int first_partition = 0;
-      int target_partition = partition_size/2;
+      int first_partition  = 0;
+      int target_partition = partition_size / 2;
       std::vector<int> cluster_list;
 
       for (unsigned i = 0; i < P->size(); ++i) {
@@ -374,18 +380,18 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
       std::shuffle(cluster_list.begin(), cluster_list.end(), *gen);
       for (int cluster : cluster_list) {
         if (first_partition < target_partition) {
-          int dest = cluster;
+          int dest     = cluster;
           P_temp[dest] = 1;
           first_partition++;
         } else {
-          int dest = cluster;
+          int dest     = cluster;
           P_temp[dest] = -1;
         }
       }
 
       // 2) Do iterations of Kernighan-Lin until convergence
-      T g_max = 0;
-      int g_k = -1;
+      T g_max        = 0;
+      int g_k        = -1;
       unsigned count = 0;
       do {
         count++;
@@ -404,7 +410,7 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
 
         std::unordered_set<int> used;
 
-        for (int iter=0; iter < partition_size/2; ++iter) {
+        for (int iter = 0; iter < partition_size / 2; ++iter) {
           // b) Find best move by looking through upper triangular of W matrix
           int a, b;
           T g;
@@ -437,10 +443,10 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
         //    Recompute score g_max
         for (unsigned k = 0; k < gv.size(); ++k) {
           if (k > 0)
-            gv[k] += gv[k-1];
+            gv[k] += gv[k - 1];
           if (gv[k] > g_max) {
             g_max = gv[k];
-            g_k = k + 1;
+            g_k   = k + 1;
           }
         }
 
@@ -448,9 +454,9 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
         //    Otherwise, rollback changes to P_temp2
         if (g_max > 0) {
           for (int i = 0; i < g_k; i++) {
-            int a = av[i];
-            int b = bv[i];
-            int temp = P_temp2[a];
+            int a      = av[i];
+            int b      = bv[i];
+            int temp   = P_temp2[a];
             P_temp2[a] = P_temp2[b];
             P_temp2[b] = temp;
 
@@ -463,14 +469,14 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
 
       // 5) Update P using P_temp
       int moves = 0;
-      for (unsigned i=0; i < P->size(); ++i) {
+      for (unsigned i = 0; i < P->size(); ++i) {
         if (P_temp[i] == -1) {
           (*P)[i] = *num_partitions;
           moves++;
         }
       }
-      cluster_pairs->push_back(std::pair<int, int>(static_cast<int>(color),
-          static_cast<int>(*num_partitions)));
+      cluster_pairs->push_back(
+          std::pair<int, int>(static_cast<int>(color), static_cast<int>(*num_partitions)));
 
       (*num_partitions)++;
     }
@@ -483,8 +489,7 @@ inline bool KernighanLin(const std::vector<T>& W, std::vector<int>* P,
  * \brief Returns root of a given color if found in roots
  *        Returns -1 if it is not found
  */
-inline int GetRoot(const std::vector<int>& P, int color,
-                   const std::unordered_set<int>& roots) {
+inline int GetRoot(const std::vector<int>& P, int color, const std::unordered_set<int>& roots) {
   for (auto root : roots) {
     if (P[root] == color)
       return root;
@@ -514,16 +519,21 @@ inline int GetChild(const std::vector<int>& P, int color, int parent) {
 //          g is weight of edge
 // Optimization: Only need to look at row a in matrix
 template <typename T>
-inline void FindBestEdge(const std::vector<T>& W, const std::vector<int>& P,
-                         int parent, int dest_cluster, std::vector<int>* b, T* g) {
+inline void FindBestEdge(const std::vector<T>& W,
+                         const std::vector<int>& P,
+                         int parent,
+                         int dest_cluster,
+                         std::vector<int>* b,
+                         T* g) {
   int nrows = P.size();
-  int row = parent;
-  *g = 0;
+  int row   = parent;
+  *g        = 0;
   b->push_back(-1);
-  for (int col=0; col < nrows; ++col) {
-    if (col == row || P[col] != dest_cluster) continue;
+  for (int col = 0; col < nrows; ++col) {
+    if (col == row || P[col] != dest_cluster)
+      continue;
 
-    T cost = W[row*nrows+col];
+    T cost = W[row * nrows + col];
     if (cost > *g) {
       b->clear();
     }
@@ -562,25 +572,27 @@ inline int KLGenerateBinaryTree(const std::vector<T>& W,
     int parent, child = -1;
     if ((*cluster_pairs)[i].second == -2) {
       // Root must be color of pair.first
-      int color  = (*cluster_pairs)[i].first;
-      parent = GetRoot(P, color, *roots);
-      if (parent == -1) return 1;
+      int color = (*cluster_pairs)[i].first;
+      parent    = GetRoot(P, color, *roots);
+      if (parent == -1)
+        return 1;
       child = GetChild(P, color, parent);
     } else if ((*cluster_pairs)[i].second == -1) {
       int color = (*cluster_pairs)[i].first;
-      parent = GetRoot(P, color, *roots);
-      if (parent == -1) return 1;
+      parent    = GetRoot(P, color, *roots);
+      if (parent == -1)
+        return 1;
       child = parent;
     } else {
       // Root must exist in either first or second element of pair
       int color = (*cluster_pairs)[i].first;
-      parent = GetRoot(P, color, *roots);
-      color = (parent == -1) ? (*cluster_pairs)[i].second  : color;
-      parent = (parent == -1) ? GetRoot(P, color, *roots) : parent;
+      parent    = GetRoot(P, color, *roots);
+      color     = (parent == -1) ? (*cluster_pairs)[i].second : color;
+      parent    = (parent == -1) ? GetRoot(P, color, *roots) : parent;
 
       int from_cluster = color;
-      int dest_cluster = (from_cluster == (*cluster_pairs)[i].first) ?
-          (*cluster_pairs)[i].second : (*cluster_pairs)[i].first;
+      int dest_cluster = (from_cluster == (*cluster_pairs)[i].first) ? (*cluster_pairs)[i].second
+                                                                     : (*cluster_pairs)[i].first;
 
       std::vector<int> candidates;
       T weight;
@@ -605,8 +617,8 @@ inline int KLGenerateBinaryTree(const std::vector<T>& W,
   }
 
   int depth = scan_row->size();
-  int start = (*scan_row)[depth-2];
-  int end = (*scan_row)[depth-1];
+  int start = (*scan_row)[depth - 2];
+  int end   = (*scan_row)[depth - 1];
 
   for (int i = start; i < end; ++i) {
     int parent = (*topo_row)[i];
@@ -614,7 +626,7 @@ inline int KLGenerateBinaryTree(const std::vector<T>& W,
 
     // If not first, check previous level whether or not we are encountering
     // this root for the first time in this level of the tree
-    if (i != start && parent == static_cast<int>((*topo_row)[i-1]))
+    if (i != start && parent == static_cast<int>((*topo_row)[i - 1]))
       child = parent;
     else
       child = new_topo[parent];
@@ -635,7 +647,7 @@ inline int ComputeDepth(int n) {
   for (int depth = 0; depth < MXNET_KVSTORE_MAXDEPTH; ++depth) {
     int num = 2 << depth;
     if (n <= num)
-      return depth+1;
+      return depth + 1;
   }
   return 0;
 }
@@ -646,17 +658,20 @@ inline int ComputeDepth(int n) {
 //   -each edge in tree corresponds to link in network topology
 //   -each edge in tree does not form self-loop
 template <typename T>
-inline bool IsValid(const std::vector<T>& W, const std::vector<int>& state,
-                    int num_elements, int row, int depth) {
+inline bool IsValid(const std::vector<T>& W,
+                    const std::vector<int>& state,
+                    int num_elements,
+                    int row,
+                    int depth) {
   // At each level of tree, check whether edge:
   //   -corresponds to link in network topology
   //   -corresponds to self-loop
   for (int i = 0; i < depth; ++i) {
     int stride = 1 << i;
-    for (int j = 0; j+stride < row; j += 2*stride) {
+    for (int j = 0; j + stride < row; j += 2 * stride) {
       int from = state[j];
-      int dest = state[j+stride];
-      if (W[from*num_elements + dest] == static_cast<T>(0) && from != dest) {
+      int dest = state[j + stride];
+      if (W[from * num_elements + dest] == static_cast<T>(0) && from != dest) {
         return false;
       }
     }
@@ -682,7 +697,7 @@ inline bool IsValid(const std::vector<T>& W, const std::vector<int>& state,
   // modifier is maximum number of repeats a single GPU can take
   //   e.g. 5 GPUs in 3-level binary tree => one GPU can repeat 3x
   //        GPU0 GPU0 GPU0 GPU0 GPU1 GPU2 GPU3 GPU4
-  int modifier = (1 << depth) - num_elements;
+  int modifier  = (1 << depth) - num_elements;
   int num_found = found.size();
 
   // So we know we have an invalid state if we find:
@@ -693,8 +708,8 @@ inline bool IsValid(const std::vector<T>& W, const std::vector<int>& state,
       return false;
     }
 
-  // If we are at last recursive level, we can apply a more stringent check:
-  //   -if some GPU is not found, then we are in invalid state
+    // If we are at last recursive level, we can apply a more stringent check:
+    //   -if some GPU is not found, then we are in invalid state
   } else if (row == static_cast<int>(state.size())) {
     for (int i = 0; i < num_elements; ++i) {
       if (found_vec[i] == 0) {
@@ -729,7 +744,7 @@ inline void Postprocess(std::vector<int>* result, int num_elements, int depth) {
   for (int level = depth - 1; level >= 0; --level) {
     int stride = 1 << level;
     std::vector<int> histogram_above(num_elements, 0);
-    for (unsigned i = 0; i < result->size(); i += 2*stride) {
+    for (unsigned i = 0; i < result->size(); i += 2 * stride) {
       int val = (*result)[i];
       histogram_above[val]++;
     }
@@ -739,9 +754,9 @@ inline void Postprocess(std::vector<int>* result, int num_elements, int depth) {
       histogram[val]++;
     }
 
-    for (int i = result->size()-stride; i-stride >= 0; i -= 2*stride) {
+    for (int i = result->size() - stride; i - stride >= 0; i -= 2 * stride) {
       int from = (*result)[i];
-      int dest = (*result)[i-stride];
+      int dest = (*result)[i - stride];
       if ((histogram[from] > 1 || histogram_above[from] >= 1) && from != dest) {
         (*result)[i] = dest;
         histogram[from]--;
@@ -756,29 +771,31 @@ inline void Postprocess(std::vector<int>* result, int num_elements, int depth) {
 //         -usually turned on when backtracking to get better solutions
 //         -usually turned off when outside the penalty to get weight of tree
 template <typename T>
-inline T ComputeTreeWeight(const std::vector<T>& W, const std::vector<int>& result,
-                           int num_elements, int depth, bool penalty) {
+inline T ComputeTreeWeight(const std::vector<T>& W,
+                           const std::vector<int>& result,
+                           int num_elements,
+                           int depth,
+                           bool penalty) {
   T weight = 0.f;
   std::unordered_set<int> links_used;
 
   for (int i = 0; i < depth; ++i) {
     int stride = 1 << i;
     std::vector<bool> nodes_used(num_elements, false);
-    for (unsigned j = 0; j+stride < result.size(); j += 2*stride) {
+    for (unsigned j = 0; j + stride < result.size(); j += 2 * stride) {
       int from = result[j];
-      int dest = result[j+stride];
+      int dest = result[j + stride];
       if (from != dest) {
-        weight += W[from*num_elements+dest];
+        weight += W[from * num_elements + dest];
 
         // Penalize: (1) use of redundant edges in a single tree
         //           (2) repeated use of a GPU in a single tree at the same
         //               level above the leaf level
-        if (links_used.find(from*num_elements+dest) != links_used.end()
-                            && penalty) {
+        if (links_used.find(from * num_elements + dest) != links_used.end() && penalty) {
           weight -= 100;
         }
-        links_used.insert(from*num_elements+dest);
-        links_used.insert(dest*num_elements+from);
+        links_used.insert(from * num_elements + dest);
+        links_used.insert(dest * num_elements + from);
       }
 
       nodes_used[from] = true;
@@ -868,9 +885,9 @@ inline bool RecursiveBacktrack(const std::vector<T>& W,
   bool stop = false;
   for (int j = 0; j < num_elements; ++j) {
     (*state)[row] = j;
-    if (IsValid(W, state, num_elements, row+1, depth))
-      stop = RecursiveBacktrack(W, state, best_result, best_result_weight,
-                                row+1, num_elements, depth, optimal);
+    if (IsValid(W, state, num_elements, row + 1, depth))
+      stop = RecursiveBacktrack(
+          W, state, best_result, best_result_weight, row + 1, num_elements, depth, optimal);
     (*state)[row] = -1;
     if (stop)
       return stop;
@@ -888,7 +905,7 @@ inline void IterativeBacktrack(const std::vector<T>& W,
                                int depth,
                                bool optimal) {
   std::stack<int> state_stack;
-  row = 1;
+  row     = 1;
   int pos = 0;
   state_stack.push(pos);
 
@@ -901,15 +918,16 @@ inline void IterativeBacktrack(const std::vector<T>& W,
       pos = state_stack.top();
       pos++;
       state_stack.pop();
-      (*state)[state_stack.size()+1] = -1;
+      (*state)[state_stack.size() + 1] = -1;
       row--;
     }
-    if (state_stack.empty()) break;
+    if (state_stack.empty())
+      break;
 
     (*state)[row] = pos;
     // If there is a valid position push the position to stack, set current
     // position to 0 and move to next row
-    if (IsValid(W, *state, num_elements, row+1, depth)) {
+    if (IsValid(W, *state, num_elements, row + 1, depth)) {
       state_stack.push(pos);
       pos = 0;
       row++;
@@ -931,7 +949,8 @@ inline void IterativeBacktrack(const std::vector<T>& W,
         std::swap(*best_result_weight, weight);
         *best_result = result;
       }
-      if (!optimal) break;
+      if (!optimal)
+        break;
 
       pos = state_stack.top();
       pos++;
@@ -947,20 +966,22 @@ inline void IterativeBacktrack(const std::vector<T>& W,
  * by the spanning tree
  */
 template <typename T>
-inline void UpdateWeight(std::vector<T>* W, const std::vector<size_t>& topo_row,
-                         int num_elements, float alpha) {
+inline void UpdateWeight(std::vector<T>* W,
+                         const std::vector<size_t>& topo_row,
+                         int num_elements,
+                         float alpha) {
   for (unsigned i = 1; i < topo_row.size() - 1; i += 2) {
     unsigned parent = topo_row[i];
-    unsigned child = topo_row[i+1];
-    if (!(parent >= num_elements*num_elements ||
-        child >= num_elements*num_elements) && (parent != child)) {
-      (*W)[parent*num_elements+child] *= alpha;
-      (*W)[child*num_elements+parent] *= alpha;
+    unsigned child  = topo_row[i + 1];
+    if (!(parent >= num_elements * num_elements || child >= num_elements * num_elements) &&
+        (parent != child)) {
+      (*W)[parent * num_elements + child] *= alpha;
+      (*W)[child * num_elements + parent] *= alpha;
     }
   }
 }
 
-/** 
+/**
  * \brief Do brute-force backtracking approach if Kernighan-Lin fails to find a binary
  * tree of height Log P.
  *
@@ -986,7 +1007,7 @@ inline bool BacktrackGenerateBinaryTree(std::vector<T>* W,
   // 7: 3 8
   // 8: 3 8
   // 9: 4 16
-  int depth = ComputeDepth(num_elements);
+  int depth        = ComputeDepth(num_elements);
   int depth_leaves = 1 << depth;
 
   // State vector
@@ -1002,11 +1023,9 @@ inline bool BacktrackGenerateBinaryTree(std::vector<T>* W,
   // For larger numbers of GPUs, settle for first tree found (non-optimal), but
   // this saves a lot of runtime, because Backtrack is exponential time
   if (depth <= 3) {
-    IterativeBacktrack(*W, &state, &result, &result_weight, 1, num_elements,
-                       depth, true);
+    IterativeBacktrack(*W, &state, &result, &result_weight, 1, num_elements, depth, true);
   } else {
-    IterativeBacktrack(*W, &state, &result, &result_weight, 1, num_elements,
-                       depth, false);
+    IterativeBacktrack(*W, &state, &result, &result_weight, 1, num_elements, depth, false);
   }
   return FormTopology(result, topo_row, scan_row, depth);
 }
@@ -1060,26 +1079,26 @@ inline void ComputeTreesFromRoot(std::vector<T>* W,
   while (!backtrack && (!stop || reset)) {
     if (reset == 1) {
       cluster_pairs.clear();
-      P_temp = P;
+      P_temp              = P;
       num_partitions_temp = num_partitions;
-      roots_temp = roots;
-      topo_temp = *topo;
-      scan_temp = *scan;
+      roots_temp          = roots;
+      topo_temp           = *topo;
+      scan_temp           = *scan;
     }
 
     // Run Kernighan-Lin to generate partition
-    stop = KernighanLin(*W, &P_temp, &num_partitions_temp, &cluster_pairs,
-                        &gen);
+    stop = KernighanLin(*W, &P_temp, &num_partitions_temp, &cluster_pairs, &gen);
 
     // Use partitions found and a given root to find best inter-cluster edge for
     // each pair of clusters, and returns them as roots of next cluster
     // If reset is true, then rewind back to previous clustering
-    reset = KLGenerateBinaryTree(*W, P_temp, &cluster_pairs, &roots_temp,
-                                 &topo_temp, &scan_temp, &gen);
+    reset =
+        KLGenerateBinaryTree(*W, P_temp, &cluster_pairs, &roots_temp, &topo_temp, &scan_temp, &gen);
 
     if (reset)
       level++;
-    if (level > 10) break;
+    if (level > 10)
+      break;
   }
 
   bool success = true;
@@ -1123,8 +1142,7 @@ inline void ComputeTrees(const std::vector<T>& W,
     scan->push_back(std::vector<size_t>());
     (*topo)[i].push_back(i);
     (*scan)[i].push_back(0);
-    ComputeTreesFromRoot(&W_copy, num_elements, i, alpha, backtrack,
-                         &((*topo)[i]), &((*scan)[i]));
+    ComputeTreesFromRoot(&W_copy, num_elements, i, alpha, backtrack, &((*topo)[i]), &((*scan)[i]));
   }
 
   // Note: must sum up adj matrix to show link usage before we readjust topo
@@ -1132,21 +1150,20 @@ inline void ComputeTrees(const std::vector<T>& W,
   std::vector<int> adj(W.size(), 0);
   for (int row = 0; row < num_elements; ++row) {
     for (unsigned col = 1; col < (*topo)[0].size(); col += 2) {
-      int from = std::min((*topo)[row][col], (*topo)[row][col+1]);
-      int dest = std::max((*topo)[row][col], (*topo)[row][col+1]);
+      int from = std::min((*topo)[row][col], (*topo)[row][col + 1]);
+      int dest = std::max((*topo)[row][col], (*topo)[row][col + 1]);
       if (from != dest) {
-        adj.at(from*num_elements+dest) += 1;
-        adj.at(dest*num_elements+from) += 1;
+        adj.at(from * num_elements + dest) += 1;
+        adj.at(dest * num_elements + from) += 1;
       }
     }
   }
 
-  std::vector<std::vector<size_t>> topo_temp(num_elements,
-      std::vector<size_t>());
+  std::vector<std::vector<size_t>> topo_temp(num_elements, std::vector<size_t>());
 
   if (kLogTree) {
     for (int i = 0; i < num_elements; ++i)
-      PrintTopo("Tree "+std::to_string(i), (*topo)[i], (*scan)[i]);
+      PrintTopo("Tree " + std::to_string(i), (*topo)[i], (*scan)[i]);
 
     PrintMatrix("W", W, num_elements, num_elements);
     PrintMatrix("Links", adj, num_elements, num_elements);
diff --git a/src/kvstore/gradient_compression-inl.h b/src/kvstore/gradient_compression-inl.h
index 7b906fd9f234..f50cb71c5912 100644
--- a/src/kvstore/gradient_compression-inl.h
+++ b/src/kvstore/gradient_compression-inl.h
@@ -32,31 +32,35 @@ namespace mxnet {
 namespace kvstore {
 
 // these gpu functions are defined in gradient_compression.cu
-void Quantize1BitImpl(mshadow::Stream<mshadow::gpu> *s, const std::vector<mxnet::TBlob> &inputs,
+void Quantize1BitImpl(mshadow::Stream<mshadow::gpu>* s,
+                      const std::vector<mxnet::TBlob>& inputs,
                       const float threshold);
-void Dequantize1BitImpl(mshadow::Stream<mshadow::gpu> *s, const std::vector<mxnet::TBlob> &inputs,
+void Dequantize1BitImpl(mshadow::Stream<mshadow::gpu>* s,
+                        const std::vector<mxnet::TBlob>& inputs,
                         const float threshold);
-void Quantize2BitImpl(mshadow::Stream<mshadow::gpu> *s, const std::vector<mxnet::TBlob> &inputs,
+void Quantize2BitImpl(mshadow::Stream<mshadow::gpu>* s,
+                      const std::vector<mxnet::TBlob>& inputs,
                       const float threshold);
-void Dequantize2BitImpl(mshadow::Stream<mshadow::gpu> *s, const std::vector<mxnet::TBlob> &inputs,
+void Dequantize2BitImpl(mshadow::Stream<mshadow::gpu>* s,
+                        const std::vector<mxnet::TBlob>& inputs,
                         const float threshold);
 
 struct quantize_1bit {
   MSHADOW_XINLINE static void Map(int out_byte_id,
                                   int original_size,
-                                  float *out,
-                                  float *grad,
-                                  float *residual,
+                                  float* out,
+                                  float* grad,
+                                  float* residual,
                                   const float threshold) {
     // this byte contains the compressed representation of
     // upto 8 values starting from (char*)out + out_byte_id
-    char *compr_byte = reinterpret_cast<char *>(out) + out_byte_id;
+    char* compr_byte = reinterpret_cast<char*>(out) + out_byte_id;
 
     // init to 0
     *compr_byte = 0;
     // start and end are indices in original grad array
     const int start = out_byte_id << 3;
-    const int end = (start + 8 <= original_size) ? start + 8 : original_size;
+    const int end   = (start + 8 <= original_size) ? start + 8 : original_size;
 
     // masks used to quantize data
     const uint8_t bits[] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
@@ -78,35 +82,33 @@ struct quantize_1bit {
   }
 };
 
-template<typename xpu>
-void Quantize1BitKernelLaunch(mshadow::Stream<xpu> *s, const std::vector<mxnet::TBlob> &inputs,
+template <typename xpu>
+void Quantize1BitKernelLaunch(mshadow::Stream<xpu>* s,
+                              const std::vector<mxnet::TBlob>& inputs,
                               const float threshold) {
-  mxnet::op::mxnet_op::Kernel<quantize_1bit, xpu>
-    ::Launch(s,
-            inputs[2].Size() * 4,         // compressed array byte size
-            inputs[0].Size(),             // original size
-            inputs[2].dptr<float>(),      // compressed array
-            inputs[0].dptr<float>(),      // original array
-            inputs[1].dptr<float>(),      // residual array
-            threshold);                   // threshold
+  mxnet::op::mxnet_op::Kernel<quantize_1bit, xpu>::Launch(
+      s,
+      inputs[2].Size() * 4,     // compressed array byte size
+      inputs[0].Size(),         // original size
+      inputs[2].dptr<float>(),  // compressed array
+      inputs[0].dptr<float>(),  // original array
+      inputs[1].dptr<float>(),  // residual array
+      threshold);               // threshold
 }
 
 struct dequantize_1bit {
-  MSHADOW_XINLINE static void Map(int i,
-                                  float *out,
-                                  float *in,
-                                  const float threshold) {
+  MSHADOW_XINLINE static void Map(int i, float* out, float* in, const float threshold) {
     // get position of dequantized value to fill
-    float *outval = out + i;
+    float* outval = out + i;
     // gets byte which holds quantized value for this position
-    char *ch_ptr = reinterpret_cast < char * > (in + (i >> 5));
+    char* ch_ptr = reinterpret_cast<char*>(in + (i >> 5));
     ch_ptr += ((i & 31) >> 3);
     // masks used to quantize data
     const uint8_t bits[] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
     // col denotes which bit of a byte is set for this value
     // col=0 implies the first bit, col=1 implies the second bit,...
-    const int col = i & 7;
-    const uint8_t mask = bits[col];
+    const int col        = i & 7;
+    const uint8_t mask   = bits[col];
     const uint8_t masked = *ch_ptr & mask;
     if (masked == mask) {
       *outval = +1;
@@ -118,33 +120,34 @@ struct dequantize_1bit {
   }
 };
 
-template<typename xpu>
-void Dequantize1BitKernelLaunch(mshadow::Stream<xpu> *s, const std::vector<mxnet::TBlob> &inputs,
+template <typename xpu>
+void Dequantize1BitKernelLaunch(mshadow::Stream<xpu>* s,
+                                const std::vector<mxnet::TBlob>& inputs,
                                 const float threshold) {
-  mxnet::op::mxnet_op::Kernel<dequantize_1bit, xpu>
-  ::Launch(s,
-          inputs[1].Size(),         // original size
-          inputs[1].dptr<float>(),  // out array
-          inputs[0].dptr<float>(),  // compressed array
-          threshold);               // threshold
+  mxnet::op::mxnet_op::Kernel<dequantize_1bit, xpu>::Launch(
+      s,
+      inputs[1].Size(),         // original size
+      inputs[1].dptr<float>(),  // out array
+      inputs[0].dptr<float>(),  // compressed array
+      threshold);               // threshold
 }
 
 struct quantize_2bit {
   MSHADOW_XINLINE static void Map(int out_byte_id,
                                   int original_size,
-                                  float *out,
-                                  float *grad,
-                                  float *residual,
+                                  float* out,
+                                  float* grad,
+                                  float* residual,
                                   const float neg_threshold,
                                   const float pos_threshold) {
     // this block contains the compressed representation of
     // upto 4 values starting from (char*)out + out_byte_id
-    char *compr_byte = reinterpret_cast<char *>(out) + out_byte_id;
+    char* compr_byte = reinterpret_cast<char*>(out) + out_byte_id;
     // init to 0
     *compr_byte = 0;
     // start and end are indices in original grad array
     const int start = out_byte_id << 2;
-    const int end = (start + 4 <= original_size) ? start + 4 : original_size;
+    const int end   = (start + 4 <= original_size) ? start + 4 : original_size;
 
     // masks to set bits when value meets pos_threshold
     // 0xc0 is mask when value is to be represented by the first two bits in a char*
@@ -169,40 +172,41 @@ struct quantize_2bit {
   }
 };
 
-template<typename xpu>
-void Quantize2BitKernelLaunch(mshadow::Stream<xpu> *s, const std::vector<mxnet::TBlob> &inputs,
+template <typename xpu>
+void Quantize2BitKernelLaunch(mshadow::Stream<xpu>* s,
+                              const std::vector<mxnet::TBlob>& inputs,
                               const float threshold) {
-  mxnet::op::mxnet_op::Kernel<quantize_2bit, xpu>
-    ::Launch(s,
-            inputs[2].Size() * 4,         // compressed array byte size
-            inputs[0].Size(),             // original size
-            inputs[2].dptr<float>(),      // compressed array
-            inputs[0].dptr<float>(),      // original array
-            inputs[1].dptr<float>(),      // residual array
-            -1 *threshold,                // negative threshold
-            threshold);                   // positive threshold
+  mxnet::op::mxnet_op::Kernel<quantize_2bit, xpu>::Launch(
+      s,
+      inputs[2].Size() * 4,     // compressed array byte size
+      inputs[0].Size(),         // original size
+      inputs[2].dptr<float>(),  // compressed array
+      inputs[0].dptr<float>(),  // original array
+      inputs[1].dptr<float>(),  // residual array
+      -1 * threshold,           // negative threshold
+      threshold);               // positive threshold
 }
 
 struct dequantize_2bit {
   MSHADOW_XINLINE static void Map(int i,
-                                  float *out,
-                                  float *in,
+                                  float* out,
+                                  float* in,
                                   const float neg_threshold,
                                   const float pos_threshold) {
     // get position of dequantized value to fill
-    float *outval = out + i;
+    float* outval = out + i;
     // gets byte which holds quantized value for this position
-    char *ch_ptr = reinterpret_cast<char *>(in + (i >> 4));
+    char* ch_ptr = reinterpret_cast<char*>(in + (i >> 4));
     ch_ptr += ((i & 15) >> 2);
     // masks used to quantize data
     const uint8_t posbits[] = {0xc0, 0x30, 0x0c, 0x03};
     const uint8_t negbits[] = {0x80, 0x20, 0x08, 0x02};
     // col denotes which two bits of a byte are set for this value
     // col=0 implies first two bits, col=3 implies last two bits,...
-    const int col = i & 3;
-    const uint8_t mask = posbits[col];
+    const int col         = i & 3;
+    const uint8_t mask    = posbits[col];
     const uint8_t negmask = negbits[col];
-    const uint8_t masked = *ch_ptr & mask;
+    const uint8_t masked  = *ch_ptr & mask;
     if (masked == mask) {
       *outval = pos_threshold;
     } else if (masked == negmask) {
@@ -215,38 +219,39 @@ struct dequantize_2bit {
   }
 };
 
-template<typename xpu>
-void Dequantize2BitKernelLaunch(mshadow::Stream<xpu> *s, const std::vector<mxnet::TBlob> &inputs,
+template <typename xpu>
+void Dequantize2BitKernelLaunch(mshadow::Stream<xpu>* s,
+                                const std::vector<mxnet::TBlob>& inputs,
                                 const float threshold) {
-  mxnet::op::mxnet_op::Kernel<dequantize_2bit, xpu>
-  ::Launch(s,
-          inputs[1].Size(),         // original size
-          inputs[1].dptr<float>(),  // out array
-          inputs[0].dptr<float>(),  // compressed array
-          -1 *threshold,            // negative threshold
-          threshold);               // positive threshold
+  mxnet::op::mxnet_op::Kernel<dequantize_2bit, xpu>::Launch(
+      s,
+      inputs[1].Size(),         // original size
+      inputs[1].dptr<float>(),  // out array
+      inputs[0].dptr<float>(),  // compressed array
+      -1 * threshold,           // negative threshold
+      threshold);               // positive threshold
 }
 
-inline void Quantize1BitImpl(mshadow::Stream<mshadow::cpu> *s,
-                             const std::vector<mxnet::TBlob> &inputs,
+inline void Quantize1BitImpl(mshadow::Stream<mshadow::cpu>* s,
+                             const std::vector<mxnet::TBlob>& inputs,
                              const float threshold) {
   Quantize1BitKernelLaunch(s, inputs, threshold);
 }
 
-inline void Dequantize1BitImpl(mshadow::Stream<mshadow::cpu> *s,
-                               const std::vector<mxnet::TBlob> &inputs,
+inline void Dequantize1BitImpl(mshadow::Stream<mshadow::cpu>* s,
+                               const std::vector<mxnet::TBlob>& inputs,
                                const float threshold) {
   Dequantize1BitKernelLaunch(s, inputs, threshold);
 }
 
-inline void Quantize2BitImpl(mshadow::Stream<mshadow::cpu> *s,
-                             const std::vector<mxnet::TBlob> &inputs,
+inline void Quantize2BitImpl(mshadow::Stream<mshadow::cpu>* s,
+                             const std::vector<mxnet::TBlob>& inputs,
                              const float threshold) {
   Quantize2BitKernelLaunch(s, inputs, threshold);
 }
 
-inline void Dequantize2BitImpl(mshadow::Stream<mshadow::cpu> *s,
-                               const std::vector<mxnet::TBlob> &inputs,
+inline void Dequantize2BitImpl(mshadow::Stream<mshadow::cpu>* s,
+                               const std::vector<mxnet::TBlob>& inputs,
                                const float threshold) {
   Dequantize2BitKernelLaunch(s, inputs, threshold);
 }
diff --git a/src/kvstore/gradient_compression.cc b/src/kvstore/gradient_compression.cc
index d59035a77470..bfec4fe16ee1 100644
--- a/src/kvstore/gradient_compression.cc
+++ b/src/kvstore/gradient_compression.cc
@@ -37,8 +37,8 @@ GradientCompression::GradientCompression() {
   type_ = CompressionType::kNone;
 }
 
-void GradientCompression::SetParams(const std::vector<std::pair<std::string, std::string> >
-                                    & kwargs) {
+void GradientCompression::SetParams(
+    const std::vector<std::pair<std::string, std::string> >& kwargs) {
   GradientCompressionParam params;
   params.InitAllowUnknown(kwargs);
   if (params.type == "1bit") {
@@ -60,12 +60,12 @@ std::string GradientCompression::get_type_str() {
 }
 
 void GradientCompression::SetOneBitCompression(const float threshold) {
-  type_ = CompressionType::kOneBit;
+  type_      = CompressionType::kOneBit;
   threshold_ = threshold;
 }
 
 void GradientCompression::SetTwoBitCompression(const float threshold) {
-  type_ = CompressionType::kTwoBit;
+  type_      = CompressionType::kTwoBit;
   threshold_ = threshold;
 }
 
@@ -78,7 +78,7 @@ std::string GradientCompression::EncodeParams() {
   return rval;
 }
 
-void GradientCompression::DecodeParams(const std::string &s) {
+void GradientCompression::DecodeParams(const std::string& s) {
   std::vector<std::string> elems;
   mxnet::kvstore::split(s, ',', std::back_inserter(elems));
   type_ = static_cast<CompressionType>(stoi(elems[0]));
@@ -102,32 +102,44 @@ int GradientCompression::GetCompressionFactor() {
 
 int64_t GradientCompression::GetCompressedSize(const int64_t original_size) {
   const int bits = GetCompressionFactor();
-  return ((original_size % bits == 0) ?
-          original_size / bits :
-          original_size / bits + 1);
+  return ((original_size % bits == 0) ? original_size / bits : original_size / bits + 1);
 }
 
-void GradientCompression::Quantize(const mxnet::NDArray &from, mxnet::NDArray *to,
-                  mxnet::NDArray *residual, const int priority) {
+void GradientCompression::Quantize(const mxnet::NDArray& from,
+                                   mxnet::NDArray* to,
+                                   mxnet::NDArray* residual,
+                                   const int priority) {
   CHECK(shape_is_known(from.shape())) << "source operand has undefined shape";
   CHECK(shape_is_known(to->shape())) << "destination operand has undefined shape";
   CHECK(shape_is_known(residual->shape())) << "residual operand has undefined shape";
-  const int a = from.ctx().dev_mask();
-  const int b = to->ctx().dev_mask();
+  const int a           = from.ctx().dev_mask();
+  const int b           = to->ctx().dev_mask();
   const float threshold = threshold_;
   if (a == mshadow::cpu::kDevMask && b == mshadow::cpu::kDevMask) {
     if (type_ == CompressionType::kOneBit) {
-      mxnet::Engine::Get()->PushSync([from, to, residual, threshold](mxnet::RunContext ctx) {
-        std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
-        Quantize1BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
-      }, from.ctx(), {from.var()}, {to->var(), residual->var()},
-      mxnet::FnProperty::kNormal, priority, "QuantizeCPU");
+      mxnet::Engine::Get()->PushSync(
+          [from, to, residual, threshold](mxnet::RunContext ctx) {
+            std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
+            Quantize1BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
+          },
+          from.ctx(),
+          {from.var()},
+          {to->var(), residual->var()},
+          mxnet::FnProperty::kNormal,
+          priority,
+          "QuantizeCPU");
     } else if (type_ == CompressionType::kTwoBit) {
-      mxnet::Engine::Get()->PushSync([from, to, residual, threshold](mxnet::RunContext ctx) {
-        std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
-        Quantize2BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
-      }, from.ctx(), {from.var()}, {to->var(), residual->var()},
-      mxnet::FnProperty::kNormal, priority, "QuantizeCPU");
+      mxnet::Engine::Get()->PushSync(
+          [from, to, residual, threshold](mxnet::RunContext ctx) {
+            std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
+            Quantize2BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
+          },
+          from.ctx(),
+          {from.var()},
+          {to->var(), residual->var()},
+          mxnet::FnProperty::kNormal,
+          priority,
+          "QuantizeCPU");
     } else {
       LOG(FATAL) << "Unsupported quantization of type " << get_type_str();
     }
@@ -135,26 +147,38 @@ void GradientCompression::Quantize(const mxnet::NDArray &from, mxnet::NDArray *t
     if (a == mshadow::gpu::kDevMask && b == mshadow::gpu::kDevMask) {
 #if MXNET_USE_CUDA
       if (type_ == CompressionType::kOneBit) {
-        mxnet::Engine::Get()->PushSync([from, to, residual, threshold](mxnet::RunContext ctx) {
-          std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
-          Quantize1BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
-          // Wait GPU kernel to complete
-          ctx.get_stream<mshadow::gpu>()->Wait();
-        }, from.ctx(), {from.var()}, {to->var(), residual->var()},
-        mxnet::FnProperty::kNormal, priority, "QuantizeGPU");
+        mxnet::Engine::Get()->PushSync(
+            [from, to, residual, threshold](mxnet::RunContext ctx) {
+              std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
+              Quantize1BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
+              // Wait GPU kernel to complete
+              ctx.get_stream<mshadow::gpu>()->Wait();
+            },
+            from.ctx(),
+            {from.var()},
+            {to->var(), residual->var()},
+            mxnet::FnProperty::kNormal,
+            priority,
+            "QuantizeGPU");
       } else if (type_ == CompressionType::kTwoBit) {
-        mxnet::Engine::Get()->PushSync([from, to, residual, threshold](mxnet::RunContext ctx) {
-          std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
-          Quantize2BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
-          // Wait GPU kernel to complete
-          ctx.get_stream<mshadow::gpu>()->Wait();
-        }, from.ctx(), {from.var()}, {to->var(), residual->var()},
-        mxnet::FnProperty::kNormal, priority, "QuantizeGPU");
+        mxnet::Engine::Get()->PushSync(
+            [from, to, residual, threshold](mxnet::RunContext ctx) {
+              std::vector<mxnet::TBlob> inputs = {from.data(), residual->data(), to->data()};
+              Quantize2BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
+              // Wait GPU kernel to complete
+              ctx.get_stream<mshadow::gpu>()->Wait();
+            },
+            from.ctx(),
+            {from.var()},
+            {to->var(), residual->var()},
+            mxnet::FnProperty::kNormal,
+            priority,
+            "QuantizeGPU");
       } else {
         LOG(FATAL) << "Unsupported quantization of type " << get_type_str();
       }
 #else
-    LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
+      LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
 #endif
     } else {
       LOG(FATAL) << "Unknown device mask, from device mask " << a << " to device mask " << b;
@@ -162,26 +186,39 @@ void GradientCompression::Quantize(const mxnet::NDArray &from, mxnet::NDArray *t
   }
 }
 
-void GradientCompression::Dequantize(const mxnet::NDArray &from, mxnet::NDArray *to,
+void GradientCompression::Dequantize(const mxnet::NDArray& from,
+                                     mxnet::NDArray* to,
                                      const int priority) {
   CHECK(shape_is_known(from.shape())) << "source operand has undefined shape";
   CHECK(shape_is_known(to->shape())) << "destination operand has undefined shape";
-  const int a = from.ctx().dev_mask();
-  const int b = to->ctx().dev_mask();
+  const int a           = from.ctx().dev_mask();
+  const int b           = to->ctx().dev_mask();
   const float threshold = threshold_;
   if (a == mshadow::cpu::kDevMask && b == mshadow::cpu::kDevMask) {
     if (type_ == CompressionType::kOneBit) {
-      mxnet::Engine::Get()->PushSync([from, to, threshold](mxnet::RunContext ctx) {
-        std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
-        Dequantize1BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
-      }, from.ctx(), {from.var()}, {to->var()},
-      mxnet::FnProperty::kNormal, priority, "DequantizeCPU");
+      mxnet::Engine::Get()->PushSync(
+          [from, to, threshold](mxnet::RunContext ctx) {
+            std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
+            Dequantize1BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
+          },
+          from.ctx(),
+          {from.var()},
+          {to->var()},
+          mxnet::FnProperty::kNormal,
+          priority,
+          "DequantizeCPU");
     } else if (type_ == CompressionType::kTwoBit) {
-      mxnet::Engine::Get()->PushSync([from, to, threshold](mxnet::RunContext ctx) {
-        std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
-        Dequantize2BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
-      }, from.ctx(), {from.var()}, {to->var()},
-      mxnet::FnProperty::kNormal, priority, "DequantizeCPU");
+      mxnet::Engine::Get()->PushSync(
+          [from, to, threshold](mxnet::RunContext ctx) {
+            std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
+            Dequantize2BitImpl(ctx.get_stream<mshadow::cpu>(), inputs, threshold);
+          },
+          from.ctx(),
+          {from.var()},
+          {to->var()},
+          mxnet::FnProperty::kNormal,
+          priority,
+          "DequantizeCPU");
     } else {
       LOG(FATAL) << "Unsupported dequantization of type " << get_type_str();
     }
@@ -189,26 +226,38 @@ void GradientCompression::Dequantize(const mxnet::NDArray &from, mxnet::NDArray
     if (a == mshadow::gpu::kDevMask && b == mshadow::gpu::kDevMask) {
 #if MXNET_USE_CUDA
       if (type_ == CompressionType::kOneBit) {
-        mxnet::Engine::Get()->PushSync([from, to, threshold](mxnet::RunContext ctx) {
-          std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
-          Dequantize1BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
-          // Wait GPU kernel to complete
-          ctx.get_stream<mshadow::gpu>()->Wait();
-        }, from.ctx(), {from.var()}, {to->var()},
-        mxnet::FnProperty::kNormal, priority, "DequantizeGPU");
+        mxnet::Engine::Get()->PushSync(
+            [from, to, threshold](mxnet::RunContext ctx) {
+              std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
+              Dequantize1BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
+              // Wait GPU kernel to complete
+              ctx.get_stream<mshadow::gpu>()->Wait();
+            },
+            from.ctx(),
+            {from.var()},
+            {to->var()},
+            mxnet::FnProperty::kNormal,
+            priority,
+            "DequantizeGPU");
       } else if (type_ == CompressionType::kTwoBit) {
-        mxnet::Engine::Get()->PushSync([from, to, threshold](mxnet::RunContext ctx) {
-          std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
-          Dequantize2BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
-          // Wait GPU kernel to completes
-          ctx.get_stream<mshadow::gpu>()->Wait();
-        }, from.ctx(), {from.var()}, {to->var()},
-        mxnet::FnProperty::kNormal, priority, "DequantizeGPU");
+        mxnet::Engine::Get()->PushSync(
+            [from, to, threshold](mxnet::RunContext ctx) {
+              std::vector<mxnet::TBlob> inputs = {from.data(), to->data()};
+              Dequantize2BitImpl(ctx.get_stream<mshadow::gpu>(), inputs, threshold);
+              // Wait GPU kernel to completes
+              ctx.get_stream<mshadow::gpu>()->Wait();
+            },
+            from.ctx(),
+            {from.var()},
+            {to->var()},
+            mxnet::FnProperty::kNormal,
+            priority,
+            "DequantizeGPU");
       } else {
         LOG(FATAL) << "Unsupported dequantization of type " << get_type_str();
       }
 #else
-    LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
+      LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
 #endif
     } else {
       LOG(FATAL) << "Unknown device mask, from device mask " << a << " to device mask " << b;
@@ -217,4 +266,3 @@ void GradientCompression::Dequantize(const mxnet::NDArray &from, mxnet::NDArray
 }
 }  // namespace kvstore
 }  // namespace mxnet
-
diff --git a/src/kvstore/gradient_compression.cu b/src/kvstore/gradient_compression.cu
index c5bacc227306..389623570665 100644
--- a/src/kvstore/gradient_compression.cu
+++ b/src/kvstore/gradient_compression.cu
@@ -27,22 +27,26 @@
 
 namespace mxnet {
 namespace kvstore {
-void Quantize1BitImpl(mshadow::Stream<gpu>* s, const std::vector<TBlob>& inputs,
+void Quantize1BitImpl(mshadow::Stream<gpu>* s,
+                      const std::vector<TBlob>& inputs,
                       const float threshold) {
   Quantize1BitKernelLaunch(s, inputs, threshold);
 }
 
-void Dequantize1BitImpl(mshadow::Stream<gpu>* s, const std::vector<TBlob>& inputs,
+void Dequantize1BitImpl(mshadow::Stream<gpu>* s,
+                        const std::vector<TBlob>& inputs,
                         const float threshold) {
   Dequantize1BitKernelLaunch(s, inputs, threshold);
 }
 
-void Quantize2BitImpl(mshadow::Stream<gpu>* s, const std::vector<TBlob>& inputs,
+void Quantize2BitImpl(mshadow::Stream<gpu>* s,
+                      const std::vector<TBlob>& inputs,
                       const float threshold) {
   Quantize2BitKernelLaunch(s, inputs, threshold);
 }
 
-void Dequantize2BitImpl(mshadow::Stream<gpu>* s, const std::vector<TBlob>& inputs,
+void Dequantize2BitImpl(mshadow::Stream<gpu>* s,
+                        const std::vector<TBlob>& inputs,
                         const float threshold) {
   Dequantize2BitKernelLaunch(s, inputs, threshold);
 }
diff --git a/src/kvstore/gradient_compression.h b/src/kvstore/gradient_compression.h
index 5496ada31bba..efd449f7eda1 100644
--- a/src/kvstore/gradient_compression.h
+++ b/src/kvstore/gradient_compression.h
@@ -34,18 +34,16 @@
 namespace mxnet {
 namespace kvstore {
 
-enum class CompressionType {
-  kNone, kOneBit, kTwoBit
-};
+enum class CompressionType { kNone, kOneBit, kTwoBit };
 
 struct GradientCompressionParam : public dmlc::Parameter<GradientCompressionParam> {
   std::string type;
   float threshold;
   DMLC_DECLARE_PARAMETER(GradientCompressionParam) {
-    DMLC_DECLARE_FIELD(type)
-      .describe("Type of gradient compression to use, like `2bit` for example");
-    DMLC_DECLARE_FIELD(threshold).set_default(0.5)
-      .describe("Threshold to use for 2bit gradient compression");
+    DMLC_DECLARE_FIELD(type).describe(
+        "Type of gradient compression to use, like `2bit` for example");
+    DMLC_DECLARE_FIELD(threshold).set_default(0.5).describe(
+        "Threshold to use for 2bit gradient compression");
   }
 };
 
@@ -92,7 +90,7 @@ class GradientCompression {
   /*!
    * \brief decodes parameters of gc from a string and assigns them to member variables
    */
-  void DecodeParams(const std::string &s);
+  void DecodeParams(const std::string& s);
 
   /*!
    * \brief returns compression factor, which is the factor by which size of gradient
@@ -106,25 +104,27 @@ class GradientCompression {
   int64_t GetCompressedSize(const int64_t original_size);
 
   /*!
-  * \brief Issues quantize operation to be scheduled by the engine
-  * Compresses `from` into `to` and accumulates the quantization error
-  * into 'residual', using the quantization of type `type_`
-  * \param from the ndarray containing original data to be quantized
-  * \param to the target ndarray which contains quantized data
-  * \param residual the ndarray which accumulates quantization error
-  * \param priority Priority of the action.
-  */
-  void Quantize(const mxnet::NDArray &from, mxnet::NDArray *to,
-                mxnet::NDArray *residual, const int priority);
+   * \brief Issues quantize operation to be scheduled by the engine
+   * Compresses `from` into `to` and accumulates the quantization error
+   * into 'residual', using the quantization of type `type_`
+   * \param from the ndarray containing original data to be quantized
+   * \param to the target ndarray which contains quantized data
+   * \param residual the ndarray which accumulates quantization error
+   * \param priority Priority of the action.
+   */
+  void Quantize(const mxnet::NDArray& from,
+                mxnet::NDArray* to,
+                mxnet::NDArray* residual,
+                const int priority);
 
   /*!
-  * \brief Issues dequantize operation to be scheduled by the engine
-  * Decompresses `from` into `to` using current parameters of `type` and `threshold`
-  * \param from the ndarray containing quantized data
-  * \param to the target ndarray which contains final dequantized data
-  * \param priority Priority of the action.
-  */
-  void Dequantize(const mxnet::NDArray &from, mxnet::NDArray *to, const int priority);
+   * \brief Issues dequantize operation to be scheduled by the engine
+   * Decompresses `from` into `to` using current parameters of `type` and `threshold`
+   * \param from the ndarray containing quantized data
+   * \param to the target ndarray which contains final dequantized data
+   * \param priority Priority of the action.
+   */
+  void Dequantize(const mxnet::NDArray& from, mxnet::NDArray* to, const int priority);
 
  private:
   /*!
diff --git a/src/kvstore/kvstore.cc b/src/kvstore/kvstore.cc
index 87daad60ccc2..fb8d31f7ae26 100644
--- a/src/kvstore/kvstore.cc
+++ b/src/kvstore/kvstore.cc
@@ -39,12 +39,12 @@ std::atomic<int> mxnet::kvstore::KVStoreDist::customer_id_{0};
 
 namespace mxnet {
 
-KVStore* KVStore::Create(const char *type_name) {
+KVStore* KVStore::Create(const char* type_name) {
   std::string tname = type_name;
   std::transform(tname.begin(), tname.end(), tname.begin(), ::tolower);
-  KVStore* kv = nullptr;
+  KVStore* kv          = nullptr;
   bool use_device_comm = false;
-  auto has = [tname](const std::string& pattern) {
+  auto has             = [tname](const std::string& pattern) {
     return tname.find(pattern) != std::string::npos;
   };
   if (has("device")) {
@@ -77,7 +77,7 @@ KVStore* KVStore::Create(const char *type_name) {
       return nullptr;
 #endif
     } else {
-      kv =  new kvstore::KVStoreLocal(use_device_comm);
+      kv = new kvstore::KVStoreLocal(use_device_comm);
     }
   }
   kv->type_ = tname;
diff --git a/src/kvstore/kvstore_dist.h b/src/kvstore/kvstore_dist.h
index 28bf19be561d..876888611b9a 100644
--- a/src/kvstore/kvstore_dist.h
+++ b/src/kvstore/kvstore_dist.h
@@ -47,16 +47,15 @@ class KVStoreDist : public KVStoreLocal {
       : KVStoreLocal(use_device_comm), ps_worker_(nullptr), server_(nullptr) {
     if (IsWorkerNode()) {
       int new_customer_id = GetNewCustomerId();
-      ps_worker_ = new ps::KVWorker<char>(0, new_customer_id);
+      ps_worker_          = new ps::KVWorker<char>(0, new_customer_id);
       ps::StartAsync(new_customer_id, "mxnet\0");
       if (!ps::Postoffice::Get()->is_recovery()) {
-        ps::Postoffice::Get()->Barrier(
-          new_customer_id,
-          ps::kWorkerGroup + ps::kServerGroup + ps::kScheduler);
+        ps::Postoffice::Get()->Barrier(new_customer_id,
+                                       ps::kWorkerGroup + ps::kServerGroup + ps::kScheduler);
       }
     }
     bigarray_bound_ = dmlc::GetEnv("MXNET_KVSTORE_BIGARRAY_BOUND", 1000 * 1000);
-    log_verbose_ = dmlc::GetEnv("MXNET_KVSTORE_DIST_ROW_SPARSE_VERBOSE", false);
+    log_verbose_    = dmlc::GetEnv("MXNET_KVSTORE_DIST_ROW_SPARSE_VERBOSE", false);
   }
 
   virtual ~KVStoreDist() {
@@ -84,8 +83,8 @@ class KVStoreDist : public KVStoreLocal {
     }
   }
 
-  void SetGradientCompression(const std::vector<std::pair<std::string, std::string> >
-                              & kwargs) override {
+  void SetGradientCompression(
+      const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     KVStoreLocal::SetGradientCompression(kwargs);
     if (get_rank() == 0) {
       SendCommandToServers(static_cast<int>(CommandType::kSetGradientCompression),
@@ -101,28 +100,31 @@ class KVStoreDist : public KVStoreLocal {
     }
   }
 
-
   void Barrier() override {
     ps::Postoffice::Get()->Barrier(ps_worker_->get_customer()->customer_id(), ps::kWorkerGroup);
   }
 
-  void SendCommandToServers(int cmd_id,
-                            const std::string& cmd_body) override {
+  void SendCommandToServers(int cmd_id, const std::string& cmd_body) override {
     CHECK_NOTNULL(ps_worker_);
     ps_worker_->Wait(ps_worker_->Request(cmd_id, cmd_body, ps::kServerGroup));
   }
 
-  int get_group_size() const override { return ps::NumWorkers(); }
+  int get_group_size() const override {
+    return ps::NumWorkers();
+  }
 
-  int get_rank() const override { return ps::MyRank(); }
+  int get_rank() const override {
+    return ps::MyRank();
+  }
 
   int get_num_dead_node(int node_id, int timeout) const override {
-    int number = 0;
-    auto dead_nodes = ps::Postoffice::Get()->GetDeadNodes(timeout);
+    int number              = 0;
+    auto dead_nodes         = ps::Postoffice::Get()->GetDeadNodes(timeout);
     const auto& watch_nodes = ps::Postoffice::Get()->GetNodeIDs(node_id);
     std::unordered_set<int> watch_set(watch_nodes.begin(), watch_nodes.end());
     for (int r : dead_nodes) {
-      if (watch_set.find(r) != watch_set.end()) number++;
+      if (watch_set.find(r) != watch_set.end())
+        number++;
     }
     return number;
   }
@@ -136,10 +138,10 @@ class KVStoreDist : public KVStoreLocal {
 
     ps::StartAsync(0, "mxnet_server\0");
     if (!ps::Postoffice::Get()->is_recovery()) {
-      ps::Postoffice::Get()->Barrier(0,
-        ps::kWorkerGroup + ps::kServerGroup + ps::kScheduler);
+      ps::Postoffice::Get()->Barrier(0, ps::kWorkerGroup + ps::kServerGroup + ps::kScheduler);
     }
-    if (server_) server_->Run();
+    if (server_)
+      server_->Run();
     ps::Finalize(0, true);
     delete server_;
     server_ = nullptr;
@@ -161,7 +163,7 @@ class KVStoreDist : public KVStoreLocal {
    */
   struct PSKV {
     ps::SArray<ps::Key> keys;  // n keys
-    ps::SArray<int> lens;  // the length of the i-th value
+    ps::SArray<int> lens;      // the length of the i-th value
     int size;
   };
 
@@ -190,8 +192,7 @@ class KVStoreDist : public KVStoreLocal {
     return customer_id_++;
   }
 
-  void InitImpl(const std::vector<int>& keys,
-                const std::vector<NDArray>& values) override {
+  void InitImpl(const std::vector<int>& keys, const std::vector<NDArray>& values) override {
     CheckUnique(keys);
     for (size_t i = 0; i < keys.size(); ++i) {
       InitKV(keys[i], values[i]);
@@ -227,13 +228,11 @@ class KVStoreDist : public KVStoreLocal {
 
     GroupKVPairsPush(vkeys, values, &uniq_vkeys, &grouped_vals, false);
     GroupKVPairsPull(okeys, outputs, &uniq_okeys, &grouped_outs, true);
-    CHECK_EQ(uniq_vkeys.size(), uniq_okeys.size())
-             << "List of push and pull keys are different";
+    CHECK_EQ(uniq_vkeys.size(), uniq_okeys.size()) << "List of push and pull keys are different";
 
     for (size_t i = 0; i < uniq_vkeys.size(); ++i) {
-      CHECK_EQ(uniq_vkeys[i], uniq_okeys[i])
-             << "Mismatch in push and pull key";
-      int key = uniq_vkeys[i];
+      CHECK_EQ(uniq_vkeys[i], uniq_okeys[i]) << "Mismatch in push and pull key";
+      int key          = uniq_vkeys[i];
       const auto& vals = grouped_vals[i];
       const auto& outs = grouped_outs[i];
 
@@ -241,16 +240,14 @@ class KVStoreDist : public KVStoreLocal {
 
       const auto push_stype = merged.storage_type();
       const auto pull_stype = outs[0]->storage_type();
-      CHECK_EQ(push_stype, kDefaultStorage)
-               << "Expected push_stype of value to be kDefaultStorage";
-      CHECK_EQ(pull_stype, kDefaultStorage)
-               << "Expected pull_stype of value to be kDefaultStorage";
+      CHECK_EQ(push_stype, kDefaultStorage) << "Expected push_stype of value to be kDefaultStorage";
+      CHECK_EQ(pull_stype, kDefaultStorage) << "Expected pull_stype of value to be kDefaultStorage";
 
       const int push_dtype = merged.dtype();
       const int pull_dtype = outs[0]->dtype();
       CHECK_EQ(push_dtype, pull_dtype) << "Output buffer dtype is different";
 
-      auto &comm_buf = comm_buf_[key];
+      auto& comm_buf = comm_buf_[key];
       if (merged.ctx().dev_mask() == cpu::kDevMask) {
         comm_buf = merged;  // avoid memory copy
       } else {
@@ -261,7 +258,7 @@ class KVStoreDist : public KVStoreLocal {
       }
 
       CHECK(gradient_compression_->get_type() == CompressionType::kNone)
-               << "Compression not supported with PushPull";
+          << "Compression not supported with PushPull";
       PushPullDefault(key, comm_buf, priority);
       comm_->Broadcast(key, comm_buf, outs, priority);
     }
@@ -275,24 +272,24 @@ class KVStoreDist : public KVStoreLocal {
 
   void PullImpl(const std::vector<int>& keys,
                 const std::vector<NDArray*>& values,
-                int priority, bool ignore_sparse) override {
+                int priority,
+                bool ignore_sparse) override {
     CHECK(ignore_sparse) << "dist kvstore pull doesn't support ignore_sparse=False";
     std::vector<int> uniq_keys;
-    std::vector<std::vector<NDArray*> > grouped_vals;
+    std::vector<std::vector<NDArray*>> grouped_vals;
     GroupKVPairsPull(keys, values, &uniq_keys, &grouped_vals, true);
 
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
       int key = uniq_keys[i];
       // use the same array for merging to guarantee that pull always happens
       // after the previous push on this key
-      auto& recv_buf = comm_buf_[key];
+      auto& recv_buf          = comm_buf_[key];
       const auto storage_type = grouped_vals[i][0]->storage_type();
-      CHECK_EQ(storage_type, kDefaultStorage)
-               << "Expected stype of value to be kDefaultStorage";
+      CHECK_EQ(storage_type, kDefaultStorage) << "Expected stype of value to be kDefaultStorage";
       if (recv_buf.is_none()) {
         // it may happen for the first time a no-rank-0 worker pull the weight.
-        recv_buf = NDArray(grouped_vals[i][0]->shape(), pinned_ctx_,
-                           true, grouped_vals[i][0]->dtype());
+        recv_buf =
+            NDArray(grouped_vals[i][0]->shape(), pinned_ctx_, true, grouped_vals[i][0]->dtype());
       }
       PullDefault(key, recv_buf, priority);
 
@@ -311,20 +308,23 @@ class KVStoreDist : public KVStoreLocal {
       int key = uniq_keys[i];
       // use the same array for merging to guarantee that pull always happens
       // after the previous push on this key
-      auto& recv_buf = comm_buf_[key];
+      auto& recv_buf          = comm_buf_[key];
       auto& grouped_val_rowid = grouped_val_rowids[i];
       const auto storage_type = grouped_val_rowid[0].first->storage_type();
       CHECK_EQ(storage_type, kRowSparseStorage)
-               << "expected kRowSparseStorage, but got " << storage_type;
+          << "expected kRowSparseStorage, but got " << storage_type;
       if (recv_buf.is_none()) {
         // it may happen for the first time a no-rank-0 worker pull the weight.
-        recv_buf = NDArray(storage_type, grouped_val_rowid[0].first->shape(),
-                           pinned_ctx_, true, grouped_val_rowid[0].first->dtype());
+        recv_buf = NDArray(storage_type,
+                           grouped_val_rowid[0].first->shape(),
+                           pinned_ctx_,
+                           true,
+                           grouped_val_rowid[0].first->dtype());
       }
-      auto &target_val_rowids = grouped_val_rowids[i];
-      const size_t num_vals = target_val_rowids.size();
+      auto& target_val_rowids = grouped_val_rowids[i];
+      const size_t num_vals   = target_val_rowids.size();
       for (size_t i = 0; i < num_vals; i++) {
-        auto &row_id = target_val_rowids[i].second;
+        auto& row_id                = target_val_rowids[i].second;
         target_val_rowids[i].second = Unique(row_id, pinned_ctx_, 0);
       }
       CHECK_EQ(num_vals, 1) << "RowSparsePull with multiple values is not supported yet";
@@ -334,8 +334,8 @@ class KVStoreDist : public KVStoreLocal {
       // Directly broadcast w/o rowids if num_vals == 1
       auto get_val = [](const std::pair<NDArray*, NDArray>& p) { return p.first; };
       std::vector<NDArray*> grouped_val(grouped_val_rowid.size());
-      std::transform(grouped_val_rowid.begin(), grouped_val_rowid.end(),
-                     grouped_val.begin(), get_val);
+      std::transform(
+          grouped_val_rowid.begin(), grouped_val_rowid.end(), grouped_val.begin(), get_val);
       comm_->Broadcast(key, recv_buf, grouped_val, priority);
     }
   }
@@ -346,17 +346,17 @@ class KVStoreDist : public KVStoreLocal {
              bool do_merge) {
     // first aggregate the values over keys
     std::vector<int> uniq_keys;
-    std::vector<std::vector<NDArray> > grouped_vals;
+    std::vector<std::vector<NDArray>> grouped_vals;
     GroupKVPairsPush(keys, values, &uniq_keys, &grouped_vals, false);
 
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
       // merge over devices
-      int key = uniq_keys[i];
+      int key          = uniq_keys[i];
       const auto& vals = grouped_vals[i];
-      NDArray merged = do_merge ? comm_->Reduce(key, vals, priority) : vals[0];
+      NDArray merged   = do_merge ? comm_->Reduce(key, vals, priority) : vals[0];
 
       const auto storage_type = merged.storage_type();
-      auto &comm_buf = comm_buf_[key];
+      auto& comm_buf          = comm_buf_[key];
       if (merged.ctx().dev_mask() == cpu::kDevMask) {
         // Start of a push doesn't guarantee that the previous pushes are completed.
         // This shouldn't affect training of networks though because training involves
@@ -373,7 +373,7 @@ class KVStoreDist : public KVStoreLocal {
         }
         CopyFromTo(merged, &comm_buf);
       }
-      const int dtype = merged.dtype();
+      const int dtype     = merged.dtype();
       const int num_bytes = mshadow::mshadow_sizeof(dtype);
       // push to servers
       if (storage_type == kDefaultStorage) {
@@ -387,7 +387,7 @@ class KVStoreDist : public KVStoreLocal {
           // detect whether the push is initialization of a key or not.
           // is_active is false when push is initialization of key
           bool is_active = do_merge;
-          PSKV &pskv = EncodeCompressedKey(key, comm_buf.shape().Size(), is_active, num_bytes);
+          PSKV& pskv     = EncodeCompressedKey(key, comm_buf.shape().Size(), is_active, num_bytes);
           // Returns push_pskv if active, else pull_pskv
           // we want inactive gc to send uncompressed gradients,
           // but sharded in the same way as later pushes would when gc becomes active
@@ -399,7 +399,7 @@ class KVStoreDist : public KVStoreLocal {
         }
       } else if (storage_type == kRowSparseStorage) {
         CHECK(gradient_compression_->get_type() == CompressionType::kNone)
-          << "Gradient compression for row sparse storage type is not supported";
+            << "Gradient compression for row sparse storage type is not supported";
         PushRowSparse(key, comm_buf, priority);
       } else {
         LOG(FATAL) << "unknown storage type";
@@ -408,197 +408,196 @@ class KVStoreDist : public KVStoreLocal {
   }
 
   virtual void PushCompressed(int key, const NDArray& comm_buf, const PSKV& pskv, int priority) {
-    auto &small_buf = compr_buf_[key];
-    auto &res_buf = residual_[key];
+    auto& small_buf            = compr_buf_[key];
+    auto& res_buf              = residual_[key];
     const size_t original_size = comm_buf.shape().Size();
-    const int dtype = comm_buf.dtype();
+    const int dtype            = comm_buf.dtype();
 
     // Init the small buffer and residual_ buffer for quantize
     if (small_buf.is_none()) {
       small_buf = NDArray(mxnet::TShape{pskv.size}, comm_buf.ctx(), false, dtype);
-      res_buf = NDArray(mxnet::TShape{static_cast<int64_t>(original_size)},
-                        comm_buf.ctx(), false, dtype);
+      res_buf =
+          NDArray(mxnet::TShape{static_cast<int64_t>(original_size)}, comm_buf.ctx(), false, dtype);
       res_buf = 0;
     }
     gradient_compression_->Quantize(comm_buf, &small_buf, &res_buf, priority);
-    auto push_to_servers =
-      [this, key, dtype, pskv, small_buf](RunContext rctx, Engine::CallbackOnComplete cb) {
-        size_t size = small_buf.shape().Size() * mshadow::mshadow_sizeof(dtype);
-        char* data = static_cast<char *> (small_buf.data().dptr_);
-        // do push. false means no delete
-        ps::SArray<char> vals(data, size, false);
-        int cmd = GetCommandType(RequestType::kCompressedPushPull, dtype);
-        CHECK_NOTNULL(ps_worker_)->ZPush(pskv.keys, vals, pskv.lens, cmd, [cb]() { cb(); });
-      };
+    auto push_to_servers = [this, key, dtype, pskv, small_buf](RunContext rctx,
+                                                               Engine::CallbackOnComplete cb) {
+      size_t size = small_buf.shape().Size() * mshadow::mshadow_sizeof(dtype);
+      char* data  = static_cast<char*>(small_buf.data().dptr_);
+      // do push. false means no delete
+      ps::SArray<char> vals(data, size, false);
+      int cmd = GetCommandType(RequestType::kCompressedPushPull, dtype);
+      CHECK_NOTNULL(ps_worker_)->ZPush(pskv.keys, vals, pskv.lens, cmd, [cb]() { cb(); });
+    };
     // acquire locks on both comm_buf and small_buf so that
     // pull (which uses comm_buf) for the same key waits till push finishes
-    Engine::Get()->PushAsync(
-      push_to_servers,
-      pinned_ctx_,
-      {small_buf.var(), comm_buf.var()},
-      {},
-      FnProperty::kNormal,
-      priority,
-      "KVStoreDistCompressedPush");
+    Engine::Get()->PushAsync(push_to_servers,
+                             pinned_ctx_,
+                             {small_buf.var(), comm_buf.var()},
+                             {},
+                             FnProperty::kNormal,
+                             priority,
+                             "KVStoreDistCompressedPush");
   }
 
-  virtual void PushDefault(int key, const NDArray &send_buf, const PSKV& pskv, int priority) {
-    auto push_to_servers =
-        [this, key, pskv, send_buf](RunContext rctx, Engine::CallbackOnComplete cb) {
-          const int dtype = send_buf.dtype();
-          // convert to ps keys
-          const size_t size = send_buf.shape().Size() * mshadow::mshadow_sizeof(dtype);
-          char* data = static_cast<char *>(send_buf.data().dptr_);
-          // do push. false means no delete
-          ps::SArray<char> vals(data, size, false);
-          int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
-          CHECK_NOTNULL(ps_worker_)->ZPush(
-              pskv.keys, vals, pskv.lens,
-              cmd, [cb]() { cb(); });
-        };
-    Engine::Get()->PushAsync(
-        push_to_servers,
-        pinned_ctx_,
-        {send_buf.var()},
-        {},
-        FnProperty::kNormal,
-        priority,
-        "KVStoreDistDefaultPush");
+  virtual void PushDefault(int key, const NDArray& send_buf, const PSKV& pskv, int priority) {
+    auto push_to_servers = [this, key, pskv, send_buf](RunContext rctx,
+                                                       Engine::CallbackOnComplete cb) {
+      const int dtype = send_buf.dtype();
+      // convert to ps keys
+      const size_t size = send_buf.shape().Size() * mshadow::mshadow_sizeof(dtype);
+      char* data        = static_cast<char*>(send_buf.data().dptr_);
+      // do push. false means no delete
+      ps::SArray<char> vals(data, size, false);
+      int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
+      CHECK_NOTNULL(ps_worker_)->ZPush(pskv.keys, vals, pskv.lens, cmd, [cb]() { cb(); });
+    };
+    Engine::Get()->PushAsync(push_to_servers,
+                             pinned_ctx_,
+                             {send_buf.var()},
+                             {},
+                             FnProperty::kNormal,
+                             priority,
+                             "KVStoreDistDefaultPush");
   }
 
   // push row sparse gradient
-  virtual void PushRowSparse(int key, const NDArray &send_buf, int priority) {
+  virtual void PushRowSparse(int key, const NDArray& send_buf, int priority) {
     using namespace rowsparse;
-    auto push_to_servers = [this, key, send_buf]
-                           (RunContext rctx, Engine::CallbackOnComplete cb) {
-      char* data = static_cast<char *>(send_buf.data().dptr_);
+    auto push_to_servers = [this, key, send_buf](RunContext rctx, Engine::CallbackOnComplete cb) {
+      char* data             = static_cast<char*>(send_buf.data().dptr_);
       const int64_t num_rows = send_buf.aux_shape(kIdx)[0];
-      const auto offsets = send_buf.aux_data(kIdx).dptr<int64_t>();
-      const auto unit_len = send_buf.shape().ProdShape(1, send_buf.shape().ndim());
-      const int num_bytes = mshadow::mshadow_sizeof(send_buf.dtype());
-      const int64_t size = num_rows * unit_len;
-       // convert to ps keys in row sparse format
-      PSKV& pskv = EncodeRowSparseKey(key, size, num_rows, offsets,
-                                      unit_len, send_buf.shape()[0], num_bytes);
+      const auto offsets     = send_buf.aux_data(kIdx).dptr<int64_t>();
+      const auto unit_len    = send_buf.shape().ProdShape(1, send_buf.shape().ndim());
+      const int num_bytes    = mshadow::mshadow_sizeof(send_buf.dtype());
+      const int64_t size     = num_rows * unit_len;
+      // convert to ps keys in row sparse format
+      PSKV& pskv = EncodeRowSparseKey(
+          key, size, num_rows, offsets, unit_len, send_buf.shape()[0], num_bytes);
       if (this->log_verbose_) {
-        LOG(INFO) << "worker " << get_rank() << " push lens: " << pskv.lens << " keys: "
-                  << pskv.keys << " size: " << size;
+        LOG(INFO) << "worker " << get_rank() << " push lens: " << pskv.lens
+                  << " keys: " << pskv.keys << " size: " << size;
       }
       ps::SArray<char> vals(data, size * num_bytes, false);
       const int cmd = GetCommandType(RequestType::kRowSparsePushPull, send_buf.dtype());
       CHECK_NOTNULL(ps_worker_)->ZPush(pskv.keys, vals, pskv.lens, cmd, [cb]() { cb(); });
     };
-    Engine::Get()->PushAsync(
-        push_to_servers,
-        pinned_ctx_,
-        {send_buf.var()},
-        {},
-        FnProperty::kNormal,
-        priority,
-        "KVStoreDistRowSparsePush");
+    Engine::Get()->PushAsync(push_to_servers,
+                             pinned_ctx_,
+                             {send_buf.var()},
+                             {},
+                             FnProperty::kNormal,
+                             priority,
+                             "KVStoreDistRowSparsePush");
   }
 
-  virtual void PullDefault(int key, const NDArray &recv_buf, int priority) {
-    auto pull_from_servers = [this, key, recv_buf](
-        RunContext rctx, Engine::CallbackOnComplete cb) {
+  virtual void PullDefault(int key, const NDArray& recv_buf, int priority) {
+    auto pull_from_servers = [this, key, recv_buf](RunContext rctx, Engine::CallbackOnComplete cb) {
       // convert to ps keys
-      size_t size = recv_buf.shape().Size();
-      const int dtype = recv_buf.dtype();
+      size_t size         = recv_buf.shape().Size();
+      const int dtype     = recv_buf.dtype();
       const int num_bytes = mshadow::mshadow_sizeof(dtype);
-      PSKV& pskv = (gradient_compression_->get_type() == CompressionType::kNone) ?
-                    EncodeDefaultKey(key, size, num_bytes) :
-                    EncodeCompressedKey(key, size, false, num_bytes);
-      char* data = static_cast<char*> (recv_buf.data().dptr_);
+      PSKV& pskv          = (gradient_compression_->get_type() == CompressionType::kNone)
+                                ? EncodeDefaultKey(key, size, num_bytes)
+                                : EncodeCompressedKey(key, size, false, num_bytes);
+      char* data          = static_cast<char*>(recv_buf.data().dptr_);
       // false means not to delete data when SArray is deleted
       auto vals = new ps::SArray<char>(data, size * num_bytes, false);
       // issue pull
-      RequestType mode = (gradient_compression_->get_type() != CompressionType::kNone) ?
-                RequestType::kCompressedPushPull : RequestType::kDefaultPushPull;
-      const int cmd = GetCommandType(mode, dtype);
-      CHECK_NOTNULL(ps_worker_)->ZPull(
-        pskv.keys, vals, &pskv.lens, cmd, [vals, cb](){ delete vals; cb(); });
+      RequestType mode = (gradient_compression_->get_type() != CompressionType::kNone)
+                             ? RequestType::kCompressedPushPull
+                             : RequestType::kDefaultPushPull;
+      const int cmd    = GetCommandType(mode, dtype);
+      CHECK_NOTNULL(ps_worker_)->ZPull(pskv.keys, vals, &pskv.lens, cmd, [vals, cb]() {
+        delete vals;
+        cb();
+      });
     };
 
-    CHECK_NOTNULL(Engine::Get())->PushAsync(
-        pull_from_servers,
-        pinned_ctx_,
-        {},
-        {recv_buf.var()},
-        FnProperty::kNormal,
-        priority,
-        "KVStoreDistDefaultStoragePull");
+    CHECK_NOTNULL(Engine::Get())
+        ->PushAsync(pull_from_servers,
+                    pinned_ctx_,
+                    {},
+                    {recv_buf.var()},
+                    FnProperty::kNormal,
+                    priority,
+                    "KVStoreDistDefaultStoragePull");
   }
 
   // pull row sparse weight into `recv_buf` based on indices given by `indices`
-  virtual void PullRowSparse_(const int key, const NDArray& recv_buf,
-                              const NDArray& indices, int priority) {
+  virtual void PullRowSparse_(const int key,
+                              const NDArray& recv_buf,
+                              const NDArray& indices,
+                              int priority) {
     using namespace rowsparse;
-    auto pull_from_servers = [this, key, recv_buf, indices]
-      (RunContext rctx, Engine::CallbackOnComplete cb) {
+    auto pull_from_servers = [this, key, recv_buf, indices](RunContext rctx,
+                                                            Engine::CallbackOnComplete cb) {
       // allocate memory for the buffer
       CHECK_EQ(indices.dtype(), mshadow::kInt64);
-      const TBlob idx_data = indices.data();
+      const TBlob idx_data  = indices.data();
       const size_t num_rows = idx_data.shape_.Size();
       recv_buf.CheckAndAlloc({mshadow::Shape1(num_rows)});
-      const int dtype = recv_buf.dtype();
-      char* data = static_cast<char *>(recv_buf.data().dptr_);
-      const auto offsets = idx_data.dptr<int64_t>();
+      const int dtype     = recv_buf.dtype();
+      char* data          = static_cast<char*>(recv_buf.data().dptr_);
+      const auto offsets  = idx_data.dptr<int64_t>();
       const auto unit_len = recv_buf.shape().ProdShape(1, recv_buf.shape().ndim());
-      const int64_t size = num_rows * unit_len;
+      const int64_t size  = num_rows * unit_len;
       const int num_bytes = mshadow::mshadow_sizeof(dtype);
       // convert to ps keys in row sparse format
-      PSKV& pskv = EncodeRowSparseKey(key, size, num_rows, offsets,
-                                      unit_len, recv_buf.shape()[0],
-                                      num_bytes);
+      PSKV& pskv = EncodeRowSparseKey(
+          key, size, num_rows, offsets, unit_len, recv_buf.shape()[0], num_bytes);
       if (this->log_verbose_) {
-        LOG(INFO) << "worker " << get_rank() << " pull lens: " << pskv.lens << " keys: "
-                  << pskv.keys << " size: " << size;
+        LOG(INFO) << "worker " << get_rank() << " pull lens: " << pskv.lens
+                  << " keys: " << pskv.keys << " size: " << size;
       }
-      auto vals = new ps::SArray<char>(data, size * num_bytes, false);
+      auto vals     = new ps::SArray<char>(data, size * num_bytes, false);
       const int cmd = GetCommandType(RequestType::kRowSparsePushPull, recv_buf.dtype());
       // copy indices to recv_buf. this needs to be done before ZPull
       // because after pull is done, the callback function returns and locks are released.
       // at this point, later functions may access the indices variable while copy happens
       mshadow::Copy(recv_buf.aux_data(kIdx).FlatTo1D<cpu, int64_t>(),
                     idx_data.FlatTo1D<cpu, int64_t>());
-      CHECK_NOTNULL(ps_worker_)->ZPull(pskv.keys, vals, &pskv.lens,
-                                       cmd,
-                                       [vals, cb]() { delete vals; cb(); });
+      CHECK_NOTNULL(ps_worker_)->ZPull(pskv.keys, vals, &pskv.lens, cmd, [vals, cb]() {
+        delete vals;
+        cb();
+      });
     };
-    CHECK_NOTNULL(Engine::Get())->PushAsync(
-      pull_from_servers,
-      pinned_ctx_,
-      {indices.var()},
-      {recv_buf.var()},
-      FnProperty::kNormal,
-      priority,
-      "KVStoreDistRowSparsePull");
+    CHECK_NOTNULL(Engine::Get())
+        ->PushAsync(pull_from_servers,
+                    pinned_ctx_,
+                    {indices.var()},
+                    {recv_buf.var()},
+                    FnProperty::kNormal,
+                    priority,
+                    "KVStoreDistRowSparsePull");
   }
 
-  virtual void PushPullDefault(int key, const NDArray &comm_buf, int priority) {
-    auto pushpull = [this, key, comm_buf](
-        RunContext rctx, Engine::CallbackOnComplete cb) {
-      size_t size = comm_buf.shape().Size();
-      const int dtype = comm_buf.dtype();
+  virtual void PushPullDefault(int key, const NDArray& comm_buf, int priority) {
+    auto pushpull = [this, key, comm_buf](RunContext rctx, Engine::CallbackOnComplete cb) {
+      size_t size         = comm_buf.shape().Size();
+      const int dtype     = comm_buf.dtype();
       const int num_bytes = mshadow::mshadow_sizeof(dtype);
-      const int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
+      const int cmd       = GetCommandType(RequestType::kDefaultPushPull, dtype);
 
       PSKV& pskv = EncodeDefaultKey(key, size, num_bytes);
       char* data = static_cast<char*>(comm_buf.data().dptr_);
-      auto vals = new ps::SArray<char>(data, size * num_bytes, false);
+      auto vals  = new ps::SArray<char>(data, size * num_bytes, false);
 
-      CHECK_NOTNULL(ps_worker_)->ZPushPull(
-        pskv.keys, *vals, vals, &pskv.lens, cmd, [vals, cb](){ delete vals; cb(); });
+      CHECK_NOTNULL(ps_worker_)->ZPushPull(pskv.keys, *vals, vals, &pskv.lens, cmd, [vals, cb]() {
+        delete vals;
+        cb();
+      });
     };
 
-    CHECK_NOTNULL(Engine::Get())->PushAsync(
-        pushpull,
-        pinned_ctx_,
-        {},
-        {comm_buf.var()},
-        FnProperty::kNormal,
-        priority,
-        "KVStoreDistDefaultStoragePushPull");
+    CHECK_NOTNULL(Engine::Get())
+        ->PushAsync(pushpull,
+                    pinned_ctx_,
+                    {},
+                    {comm_buf.var()},
+                    FnProperty::kNormal,
+                    priority,
+                    "KVStoreDistDefaultStoragePushPull");
   }
 
   /**
@@ -606,7 +605,7 @@ class KVStoreDist : public KVStoreLocal {
    */
   void CheckUnique(const std::vector<int>& keys) {
     auto keys_copy = keys;
-    auto last = std::unique(keys_copy.begin(), keys_copy.end());
+    auto last      = std::unique(keys_copy.begin(), keys_copy.end());
     CHECK_EQ(static_cast<size_t>(std::distance(keys_copy.begin(), last)),
              static_cast<size_t>(keys.size()));
   }
@@ -618,7 +617,8 @@ class KVStoreDist : public KVStoreLocal {
    * \param num_bytes size of each element in number of bytes
    * \return PSKV used for both push and pull
    */
-  virtual inline PSKV& EncodeDefaultKey(const int key, const size_t num_arr_elems,
+  virtual inline PSKV& EncodeDefaultKey(const int key,
+                                        const size_t num_arr_elems,
                                         const int num_bytes) {
     mu_.lock();
     PSKV& pskv = ps_kv_[key];
@@ -626,16 +626,16 @@ class KVStoreDist : public KVStoreLocal {
     size_t pskv_size = num_arr_elems * num_bytes;
     if (!pskv.keys.empty()) {
       CHECK_EQ(static_cast<size_t>(pskv.size), pskv_size)
-        << "The value size cannot be changed " << pskv_size << ". Key is " << key;
+          << "The value size cannot be changed " << pskv_size << ". Key is " << key;
     } else {
-      auto krs = ps::Postoffice::Get()->GetServerKeyRanges();
+      auto krs              = ps::Postoffice::Get()->GetServerKeyRanges();
       const int num_servers = krs.size();
       CHECK_GT(num_servers, 0);
 
       // a simple heuristic for load balance
       if (num_arr_elems < bigarray_bound_) {
         // send it to a single random picked server
-        int server = (key * 9973) % num_servers;
+        int server     = (key * 9973) % num_servers;
         ps::Key ps_key = krs[server].begin() + key;
         CHECK_LT(ps_key, krs[server].end());
         pskv.keys.push_back(ps_key);
@@ -647,8 +647,9 @@ class KVStoreDist : public KVStoreLocal {
         pskv.size = 0;
         for (int i = 0; i < num_servers; ++i) {
           size_t part_size =
-            static_cast<size_t>(round(static_cast<double>(num_arr_elems)/num_servers*(i+1))) -
-            static_cast<size_t>(round(static_cast<double>(num_arr_elems)/num_servers*i));
+              static_cast<size_t>(
+                  round(static_cast<double>(num_arr_elems) / num_servers * (i + 1))) -
+              static_cast<size_t>(round(static_cast<double>(num_arr_elems) / num_servers * i));
           ps::Key ps_key = krs[i].begin() + key;
           CHECK_LT(ps_key, krs[i].end());
           pskv.keys.push_back(ps_key);
@@ -672,9 +673,11 @@ class KVStoreDist : public KVStoreLocal {
    * \param num_bytes size of each element in number of bytes
    * \return PSKV used for both push and pull
    */
-  virtual inline PSKV& EncodeCompressedKey(const int key, const size_t original_num_elem,
-                                           const bool is_push, const int num_bytes) {
-    auto krs = ps::Postoffice::Get()->GetServerKeyRanges();
+  virtual inline PSKV& EncodeCompressedKey(const int key,
+                                           const size_t original_num_elem,
+                                           const bool is_push,
+                                           const int num_bytes) {
+    auto krs              = ps::Postoffice::Get()->GetServerKeyRanges();
     const int num_servers = krs.size();
     CHECK_GT(num_servers, 0);
 
@@ -686,8 +689,8 @@ class KVStoreDist : public KVStoreLocal {
 
     if (!pskv.keys.empty()) {
       const size_t num_elem = (is_push) ? compr_num_elem : original_num_elem;
-      CHECK_EQ(static_cast<size_t >(pskv.size), num_elem * num_bytes)
-        << "The value size can't be changed. For key " << key;
+      CHECK_EQ(static_cast<size_t>(pskv.size), num_elem * num_bytes)
+          << "The value size can't be changed. For key " << key;
     } else {
       // populate both pull and push pskvs
       // push pskv has sizes corresponding to compressed data
@@ -701,7 +704,7 @@ class KVStoreDist : public KVStoreLocal {
         // a simple heuristic for load balancing
         // send it to a single random picked server
         const int server = (key * 9973) % num_servers;
-        ps::Key ps_key = krs[server].begin() + key;
+        ps::Key ps_key   = krs[server].begin() + key;
         CHECK_LT(ps_key, krs[server].end());
         // meta info
         push_pskv.keys.push_back(krs[server].begin() + original_num_elem);
@@ -709,7 +712,7 @@ class KVStoreDist : public KVStoreLocal {
         // data
         push_pskv.keys.push_back(ps_key);
         pull_pskv.keys.push_back(ps_key);
-        const int compr_size = compr_num_elem * num_bytes;
+        const int compr_size    = compr_num_elem * num_bytes;
         const int original_size = original_num_elem * num_bytes;
         push_pskv.lens.push_back(compr_size);
         pull_pskv.lens.push_back(original_size);
@@ -722,13 +725,14 @@ class KVStoreDist : public KVStoreLocal {
 
         for (int i = 0; i < num_servers; ++i) {
           size_t part_compr, part_orig;
-          if (i == num_servers-1) {
+          if (i == num_servers - 1) {
             part_compr = compr_num_elem - push_pskv.size;
-            part_orig = original_num_elem - pull_pskv.size;
+            part_orig  = original_num_elem - pull_pskv.size;
           } else {
             part_compr =
-              static_cast<size_t> (round(static_cast<double>(compr_num_elem)/num_servers*(i+1))) -
-              static_cast<size_t> (round(static_cast<double>(compr_num_elem)/num_servers*(i)));
+                static_cast<size_t>(
+                    round(static_cast<double>(compr_num_elem) / num_servers * (i + 1))) -
+                static_cast<size_t>(round(static_cast<double>(compr_num_elem) / num_servers * (i)));
             part_orig = part_compr * gradient_compression_->GetCompressionFactor();
           }
 
@@ -755,15 +759,18 @@ class KVStoreDist : public KVStoreLocal {
         push_pskv.size *= num_bytes;
         pull_pskv.size *= num_bytes;
         CHECK_EQ(push_pskv.lens.size(), num_servers * 2);
-        }
       }
+    }
     return pskv;
   }
 
   // Note: this encoding method for row sparse keys doesn't allow cross-layer batching
-  virtual inline PSKV& EncodeRowSparseKey(const int key, const int64_t num_elem,
-                                          const int64_t num_rows, const int64_t *offsets,
-                                          const size_t unit_len, const int64_t total_num_rows,
+  virtual inline PSKV& EncodeRowSparseKey(const int key,
+                                          const int64_t num_elem,
+                                          const int64_t num_rows,
+                                          const int64_t* offsets,
+                                          const size_t unit_len,
+                                          const int64_t total_num_rows,
                                           const int num_bytes) {
     using namespace common;
     mu_.lock();
@@ -772,12 +779,12 @@ class KVStoreDist : public KVStoreLocal {
     pskv.keys.clear();
     pskv.lens.clear();
     // TODO(haibin) cache this information
-    auto krs = ps::Postoffice::Get()->GetServerKeyRanges();
+    auto krs              = ps::Postoffice::Get()->GetServerKeyRanges();
     const int num_servers = krs.size();
     CHECK_GT(num_servers, 0);
 
     if (total_num_rows * unit_len >= bigarray_bound_) {
-      pskv.size = 0;
+      pskv.size         = 0;
       int64_t start_row = 0;
       // parition it to all servers
       for (int i = 0; i < num_servers; ++i) {
@@ -787,8 +794,8 @@ class KVStoreDist : public KVStoreLocal {
         if (offsets && num_elem > 0) {
           // calculate partition ranges
           int64_t part_num_rows =
-            llround(static_cast<double>(total_num_rows) / num_servers * (i + 1)) -
-            llround(static_cast<double>(total_num_rows) / num_servers * i);
+              llround(static_cast<double>(total_num_rows) / num_servers * (i + 1)) -
+              llround(static_cast<double>(total_num_rows) / num_servers * i);
           auto end_row = start_row + part_num_rows;
           // search for offsets in [start_row, end_row)
           auto lb = std::lower_bound(offsets, offsets + num_rows, start_row);
@@ -807,7 +814,7 @@ class KVStoreDist : public KVStoreLocal {
       CHECK_EQ(static_cast<size_t>(pskv.size), num_elem * num_bytes);
     } else {
       // send it to a single random picked server
-      const int server = (key * 9973) % num_servers;
+      const int server   = (key * 9973) % num_servers;
       ps::Key master_key = krs[server].begin() + key;
       pskv.keys.push_back(master_key);
       pskv.lens.push_back(0);
@@ -853,5 +860,4 @@ class KVStoreDist : public KVStoreLocal {
 }  // namespace kvstore
 }  // namespace mxnet
 
-
 #endif  // MXNET_KVSTORE_KVSTORE_DIST_H_
diff --git a/src/kvstore/kvstore_dist_server.h b/src/kvstore/kvstore_dist_server.h
index 1dc222c0d7da..caa094dadd6a 100644
--- a/src/kvstore/kvstore_dist_server.h
+++ b/src/kvstore/kvstore_dist_server.h
@@ -44,13 +44,15 @@ namespace kvstore {
 
 // maintain same order in frontend.
 enum class CommandType {
-  kController, kSetMultiPrecision, kStopServer, kSyncMode,
-  kSetGradientCompression, kSetProfilerParams
+  kController,
+  kSetMultiPrecision,
+  kStopServer,
+  kSyncMode,
+  kSetGradientCompression,
+  kSetProfilerParams
 };
 
-enum class RequestType {
-  kDefaultPushPull, kRowSparsePushPull, kCompressedPushPull
-};
+enum class RequestType { kDefaultPushPull, kRowSparsePushPull, kCompressedPushPull };
 
 struct DataHandleType {
   RequestType requestType;
@@ -77,7 +79,7 @@ static int GetCommandType(RequestType requestType, int d) {
  * \return DataHandleType
  */
 static DataHandleType DepairDataHandleType(int cmd) {
-  int w = std::floor((std::sqrt(8 * cmd + 1) - 1)/2);
+  int w = std::floor((std::sqrt(8 * cmd + 1) - 1) / 2);
   int t = ((w * w) + w) / 2;
   int y = cmd - t;
   int x = w - y;
@@ -85,7 +87,7 @@ static DataHandleType DepairDataHandleType(int cmd) {
   CHECK_GE(y, 0);
   DataHandleType type;
   type.requestType = static_cast<RequestType>(x);
-  type.dtype = y;
+  type.dtype       = y;
   return type;
 }
 
@@ -100,7 +102,7 @@ class Executor {
   void Start() {
     std::unique_lock<std::mutex> lk(mu_);
     while (true) {
-      cond_.wait(lk, [this]{return !queue_.empty();});
+      cond_.wait(lk, [this] { return !queue_.empty(); });
       Block blk = std::move(queue_.front());
       queue_.pop();
       lk.unlock();
@@ -109,7 +111,8 @@ class Executor {
         blk.f();
         blk.p->set_value();
       } else {
-        blk.p->set_value(); break;
+        blk.p->set_value();
+        break;
       }
       lk.lock();
     }
@@ -143,7 +146,7 @@ class Executor {
 
  private:
   struct Block {
-  explicit Block(const Func& func) : f(func), p(std::make_shared<std::promise<void>>()) { }
+    explicit Block(const Func& func) : f(func), p(std::make_shared<std::promise<void>>()) {}
     Func f;
     std::shared_ptr<std::promise<void>> p;
   };
@@ -157,13 +160,12 @@ class KVStoreDistServer {
   KVStoreDistServer() {
     using namespace std::placeholders;
     ps_server_ = new ps::KVServer<char>(0);
-    static_cast<ps::SimpleApp*>(ps_server_)->set_request_handle(
-        std::bind(&KVStoreDistServer::CommandHandle, this, _1, _2));
-    ps_server_->set_request_handle(
-        std::bind(&KVStoreDistServer::DataHandleEx, this, _1, _2, _3));
-    sync_mode_ = false;
+    static_cast<ps::SimpleApp*>(ps_server_)
+        ->set_request_handle(std::bind(&KVStoreDistServer::CommandHandle, this, _1, _2));
+    ps_server_->set_request_handle(std::bind(&KVStoreDistServer::DataHandleEx, this, _1, _2, _3));
+    sync_mode_            = false;
     gradient_compression_ = std::make_shared<GradientCompression>();
-    log_verbose_ = dmlc::GetEnv("MXNET_KVSTORE_DIST_ROW_SPARSE_VERBOSE", false);
+    log_verbose_          = dmlc::GetEnv("MXNET_KVSTORE_DIST_ROW_SPARSE_VERBOSE", false);
   }
 
   ~KVStoreDistServer() {
@@ -176,7 +178,7 @@ class KVStoreDistServer {
     controller_ = controller;
   }
 
-  void set_updater(const KVStore::Updater& updater)  {
+  void set_updater(const KVStore::Updater& updater) {
     CHECK(updater);
     updater_ = updater;
   }
@@ -210,9 +212,8 @@ class KVStoreDistServer {
         break;
       case CommandType::kSetProfilerParams:
         // last char is the type of profiler command
-        ProcessServerProfilerCommands(static_cast<KVStoreServerProfilerCommand>
-                                                  (recved.body.back() - '0'),
-                                      recved.body);
+        ProcessServerProfilerCommands(
+            static_cast<KVStoreServerProfilerCommand>(recved.body.back() - '0'), recved.body);
         break;
       case CommandType::kSetMultiPrecision:
         // uses value 1 for message id from frontend
@@ -225,9 +226,9 @@ class KVStoreDistServer {
         // this uses value 0 for message id from frontend
         // let the main thread to execute ctrl, which is necessary for python
         exec_.Exec([this, recved]() {
-            CHECK(controller_);
-            controller_(recved.head, recved.body);
-          });
+          CHECK(controller_);
+          controller_(recved.head, recved.body);
+        });
         break;
     }
     app->Response(recved);
@@ -239,36 +240,39 @@ class KVStoreDistServer {
    * some keys are initialized before optimizer is set.
    */
   void CreateMultiPrecisionCopies() {
-    for (auto const &stored_entry : store_) {
-      const int key = stored_entry.first;
-      const NDArray &stored = stored_entry.second;
+    for (auto const& stored_entry : store_) {
+      const int key         = stored_entry.first;
+      const NDArray& stored = stored_entry.second;
       if (stored.dtype() != mshadow::kFloat32) {
-        auto &stored_realt = store_realt_[key];
+        auto& stored_realt = store_realt_[key];
         if (stored.storage_type() == kRowSparseStorage) {
-          stored_realt = NDArray(kRowSparseStorage, stored.shape(), stored.ctx(),
-                                 true, mshadow::kFloat32);
+          stored_realt =
+              NDArray(kRowSparseStorage, stored.shape(), stored.ctx(), true, mshadow::kFloat32);
         } else {
           stored_realt = NDArray(stored.shape(), stored.ctx(), false, mshadow::kFloat32);
         }
 
-        auto &update = update_buf_[key];
+        auto& update = update_buf_[key];
         if (!update.merged.is_none()) {
           if (update.merged.storage_type() == kRowSparseStorage) {
-            update.merged = NDArray(kRowSparseStorage, update.merged.shape(), update.merged.ctx(),
-                                    true, mshadow::kFloat32);
-          } else {
-            update.merged = NDArray(update.merged.shape(), update.merged.ctx(), false,
+            update.merged = NDArray(kRowSparseStorage,
+                                    update.merged.shape(),
+                                    update.merged.ctx(),
+                                    true,
                                     mshadow::kFloat32);
+          } else {
+            update.merged =
+                NDArray(update.merged.shape(), update.merged.ctx(), false, mshadow::kFloat32);
           }
         }
         CHECK(update.request.size() == 0)
-          << ps::MyRank() << "Multiprecision mode can not be set while pushes are underway."
-          << "Please set optimizer before pushing keys." << key << " " << update.request.size();
+            << ps::MyRank() << "Multiprecision mode can not be set while pushes are underway."
+            << "Please set optimizer before pushing keys." << key << " " << update.request.size();
 
         CopyFromTo(stored, stored_realt);
       }
     }
-    for (auto const &stored_realt_entry : store_realt_) {
+    for (auto const& stored_realt_entry : store_realt_) {
       stored_realt_entry.second.WaitToRead();
     }
   }
@@ -298,12 +302,12 @@ class KVStoreDistServer {
     ckeys.reserve(elems.size());
     cvals.reserve(elems.size());
 
-    for (size_t i=0; i < elems.size(); i++) {
+    for (size_t i = 0; i < elems.size(); i++) {
       std::vector<std::string> parts;
       mxnet::kvstore::split(elems[i], ':', std::back_inserter(parts));
       CHECK_EQ(parts.size(), 2) << "Improper profiler config passed from worker";
       CHECK(!parts[0].empty()) << "ProfilerConfig parameter is empty";
-      CHECK(!parts[1].empty()) << "ProfilerConfig value is empty for parameter "<< parts[0];
+      CHECK(!parts[1].empty()) << "ProfilerConfig value is empty for parameter " << parts[0];
       if (parts[0] == "filename") {
         parts[1] = "rank" + std::to_string(ps::MyRank()) + "_" + parts[1];
       }
@@ -316,7 +320,7 @@ class KVStoreDistServer {
       cvals.push_back(cval);
     }
     MXSetProfilerConfig(elems.size(), &ckeys[0], &cvals[0]);
-    for (size_t i=0; i < ckeys.size(); i++) {
+    for (size_t i = 0; i < ckeys.size(); i++) {
       delete[] ckeys[i];
       delete[] cvals[i];
     }
@@ -343,15 +347,17 @@ class KVStoreDistServer {
     return multi_precision_ && type.dtype != mshadow::kFloat32;
   }
 
-  inline void ApplyUpdates(const DataHandleType type, const int key,
-                           const ps::KVPairs<char>& req_data, UpdateBuf *update_buf,
+  inline void ApplyUpdates(const DataHandleType type,
+                           const int key,
+                           const ps::KVPairs<char>& req_data,
+                           UpdateBuf* update_buf,
                            ps::KVServer<char>* server) {
-    if (!sync_mode_ || update_buf->request.size() == (size_t) ps::NumWorkers()) {
+    if (!sync_mode_ || update_buf->request.size() == (size_t)ps::NumWorkers()) {
       // let the main thread to execute updater_, which is necessary for python
       auto& stored = has_multi_precision_copy(type) ? store_realt_[key] : store_[key];
-      auto& update =  sync_mode_ ? update_buf->merged : update_buf->temp_array;
+      auto& update = sync_mode_ ? update_buf->merged : update_buf->temp_array;
       if (updater_) {
-        exec_.Exec([this, key, &update, &stored](){
+        exec_.Exec([this, key, &update, &stored]() {
           CHECK(updater_);
           updater_(key, update, &stored);
         });
@@ -361,7 +367,7 @@ class KVStoreDistServer {
         CopyFromTo(update_buf->merged, &stored);
       }
 
-      if (log_verbose_)  {
+      if (log_verbose_) {
         LOG(INFO) << "sent response to " << update_buf->request.size() << " workers";
       }
       /**
@@ -375,7 +381,8 @@ class KVStoreDistServer {
       }
       if (has_pull) {
         // if there is a pull request, perform WaitToRead() once before DefaultStorageResponse
-        if (has_multi_precision_copy(type)) CopyFromTo(stored, store_[key]);
+        if (has_multi_precision_copy(type))
+          CopyFromTo(stored, store_[key]);
         stored.WaitToRead();
         for (const auto& req : update_buf->request) {
           if (req.pull) {
@@ -389,7 +396,8 @@ class KVStoreDistServer {
           server->Response(req);
         }
         update_buf->request.clear();
-        if (has_multi_precision_copy(type)) CopyFromTo(stored, store_[key]);
+        if (has_multi_precision_copy(type))
+          CopyFromTo(stored, store_[key]);
         stored.WaitToRead();
       }
     } else {
@@ -397,12 +405,14 @@ class KVStoreDistServer {
     }
   }
 
-  void DecodeRowIds(const ps::SArray<ps::Key> &keys, int64_t *indices,
-                    const int64_t master_key, const int64_t num_rows) {
+  void DecodeRowIds(const ps::SArray<ps::Key>& keys,
+                    int64_t* indices,
+                    const int64_t master_key,
+                    const int64_t num_rows) {
     indices[0] = 0;
     for (int64_t i = 1; i <= num_rows; i++) {
-      int key = DecodeKey(keys[i]);
-      auto row_id = key - master_key;
+      int key        = DecodeKey(keys[i]);
+      auto row_id    = key - master_key;
       indices[i - 1] = row_id;
     }
   }
@@ -410,19 +420,28 @@ class KVStoreDistServer {
   void AccumulateRowSparseGrads(const DataHandleType type,
                                 const NDArray& recved,
                                 UpdateBuf* updateBuf) {
-    NDArray out(kRowSparseStorage, updateBuf->merged.shape(), Context(), true,
+    NDArray out(kRowSparseStorage,
+                updateBuf->merged.shape(),
+                Context(),
+                true,
                 has_multi_precision_copy(type) ? mshadow::kFloat32 : type.dtype);
-    if (has_multi_precision_copy(type)) CopyFromTo(recved, updateBuf->temp_array);
+    if (has_multi_precision_copy(type))
+      CopyFromTo(recved, updateBuf->temp_array);
     const NDArray& to_merge = has_multi_precision_copy(type) ? updateBuf->temp_array : recved;
     // accumulate row_sparse gradients
     using namespace mshadow;
     Engine::Get()->PushAsync(
-    [to_merge, updateBuf, out](RunContext ctx, Engine::CallbackOnComplete on_complete) {
-      op::ElemwiseBinaryOp::ComputeEx<cpu, op::mshadow_op::plus>(
-      {}, {}, {to_merge, updateBuf->merged}, {kWriteTo}, {out});
-      on_complete();
-    }, to_merge.ctx(), {to_merge.var(), updateBuf->merged.var()}, {out.var()},
-    FnProperty::kNormal, 0, PROFILER_MESSAGE_FUNCNAME);
+        [to_merge, updateBuf, out](RunContext ctx, Engine::CallbackOnComplete on_complete) {
+          op::ElemwiseBinaryOp::ComputeEx<cpu, op::mshadow_op::plus>(
+              {}, {}, {to_merge, updateBuf->merged}, {kWriteTo}, {out});
+          on_complete();
+        },
+        to_merge.ctx(),
+        {to_merge.var(), updateBuf->merged.var()},
+        {out.var()},
+        FnProperty::kNormal,
+        0,
+        PROFILER_MESSAGE_FUNCNAME);
     CopyFromTo(out, &(updateBuf->merged), 0);
     updateBuf->merged.WaitToRead();
   }
@@ -433,7 +452,8 @@ class KVStoreDistServer {
                              const ps::KVMeta& req_meta,
                              const ps::KVPairs<char>& req_data,
                              ps::KVServer<char>* server) {
-    if (log_verbose_) LOG(INFO) << "pull: " << master_key;
+    if (log_verbose_)
+      LOG(INFO) << "pull: " << master_key;
     ps::KVPairs<char> response;
     if (num_rows == 0) {
       std::vector<int> lens(req_data.keys.size(), 0);
@@ -443,23 +463,24 @@ class KVStoreDistServer {
       return;
     }
     const NDArray& stored = store_[master_key];
-    if (has_multi_precision_copy(type)) stored.WaitToRead();
+    if (has_multi_precision_copy(type))
+      stored.WaitToRead();
     CHECK(!stored.is_none()) << "init " << master_key << " first";
-    auto shape = stored.shape();
-    auto unit_len = shape.ProdShape(1, shape.ndim());
+    auto shape          = stored.shape();
+    auto unit_len       = shape.ProdShape(1, shape.ndim());
     const int num_bytes = mshadow::mshadow_sizeof(type.dtype);
     const int unit_size = unit_len * num_bytes;
-    const char* data = static_cast<char *> (stored.data().dptr_);
-    auto len = num_rows * unit_size;
+    const char* data    = static_cast<char*>(stored.data().dptr_);
+    auto len            = num_rows * unit_size;
     // concat values
     response.vals.resize(len);
-    #pragma omp parallel for
+#pragma omp parallel for
     for (size_t i = 1; i <= num_rows; i++) {
-      int key = DecodeKey(req_data.keys[i]);
+      int key        = DecodeKey(req_data.keys[i]);
       int64_t row_id = key - master_key;
       const auto src = data + row_id * unit_size;
-      auto begin = (i - 1) * unit_size;
-      auto end = i * unit_size;
+      auto begin     = (i - 1) * unit_size;
+      auto end       = i * unit_size;
       response.vals.segment(begin, end).CopyFrom(src, unit_size);
     }
     // setup response
@@ -476,12 +497,12 @@ class KVStoreDistServer {
                            const ps::KVMeta& req_meta,
                            const ps::KVPairs<char>& req_data,
                            ps::KVServer<char>* server) {
-    auto& stored = has_multi_precision_copy(type) ? store_realt_[master_key] : store_[master_key];
-    int dtype = type.dtype;
+    auto& stored  = has_multi_precision_copy(type) ? store_realt_[master_key] : store_[master_key];
+    int dtype     = type.dtype;
     int num_bytes = mshadow::mshadow_sizeof(dtype);
     auto unit_len = req_data.lens[1] / num_bytes;
     CHECK_GT(unit_len, 0);
-    size_t ds[] = {num_rows, (size_t) unit_len};
+    size_t ds[] = {num_rows, (size_t)unit_len};
     mxnet::TShape dshape(ds, ds + 2);
     CHECK_EQ(req_data.vals.size(), num_rows * unit_len * num_bytes);
     TBlob recv_blob;
@@ -489,28 +510,36 @@ class KVStoreDistServer {
       recv_blob = TBlob(reinterpret_cast<DType*>(req_data.vals.data()), dshape, cpu::kDevMask);
     })
     NDArray recved = NDArray(recv_blob, 0);
-    stored = NDArray(kRowSparseStorage, dshape, Context(), true,
+    stored         = NDArray(kRowSparseStorage,
+                     dshape,
+                     Context(),
+                     true,
                      has_multi_precision_copy(type) ? mshadow::kFloat32 : type.dtype);
     if (has_multi_precision_copy(type)) {
       store_[master_key] = NDArray(kRowSparseStorage, dshape, Context(), true, type.dtype);
     }
     Engine::Get()->PushAsync(
-    [this, recved, stored, type](RunContext ctx, Engine::CallbackOnComplete on_complete) {
-      NDArray rsp = stored;
-      stored.CheckAndAlloc({mshadow::Shape1(recved.shape()[0])});
-      mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
-      using namespace mxnet::op;
-      nnvm::dim_t nnr = rsp.shape()[0];
-      MSHADOW_IDX_TYPE_SWITCH(rsp.aux_type(rowsparse::kIdx), IType, {
-        IType* idx = rsp.aux_data(rowsparse::kIdx).dptr<IType>();
-        mxnet_op::Kernel<PopulateFullIdxRspKernel, cpu>::Launch(s, nnr, idx);
-      });
-      TBlob rsp_data = rsp.data();
-      // copies or casts as appropriate
-      ndarray::Copy<cpu, cpu>(recved.data(), &rsp_data, Context(), Context(), RunContext());
-      on_complete();
-    }, recved.ctx(), {recved.var()}, {stored.var()},
-    FnProperty::kNormal, 0, PROFILER_MESSAGE_FUNCNAME);
+        [this, recved, stored, type](RunContext ctx, Engine::CallbackOnComplete on_complete) {
+          NDArray rsp = stored;
+          stored.CheckAndAlloc({mshadow::Shape1(recved.shape()[0])});
+          mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
+          using namespace mxnet::op;
+          nnvm::dim_t nnr = rsp.shape()[0];
+          MSHADOW_IDX_TYPE_SWITCH(rsp.aux_type(rowsparse::kIdx), IType, {
+            IType* idx = rsp.aux_data(rowsparse::kIdx).dptr<IType>();
+            mxnet_op::Kernel<PopulateFullIdxRspKernel, cpu>::Launch(s, nnr, idx);
+          });
+          TBlob rsp_data = rsp.data();
+          // copies or casts as appropriate
+          ndarray::Copy<cpu, cpu>(recved.data(), &rsp_data, Context(), Context(), RunContext());
+          on_complete();
+        },
+        recved.ctx(),
+        {recved.var()},
+        {stored.var()},
+        FnProperty::kNormal,
+        0,
+        PROFILER_MESSAGE_FUNCNAME);
     if (has_multi_precision_copy(type)) {
       CopyFromTo(stored, store_[master_key]);
       store_[master_key].WaitToRead();
@@ -519,31 +548,37 @@ class KVStoreDistServer {
     server->Response(req_meta);
   }
 
-  void DataHandleRowSparse(const DataHandleType type, const ps::KVMeta& req_meta,
+  void DataHandleRowSparse(const DataHandleType type,
+                           const ps::KVMeta& req_meta,
                            const ps::KVPairs<char>& req_data,
                            ps::KVServer<char>* server) {
     int master_key = DecodeKey(req_data.keys[0]);
-    auto num_rows = req_data.keys.size() - 1;
-    auto& stored = store_[master_key];
+    auto num_rows  = req_data.keys.size() - 1;
+    auto& stored   = store_[master_key];
     if (req_meta.push) {
       CHECK_GT(req_data.lens.size(), 0) << "req_data.lens cannot be empty";
       CHECK_EQ(req_data.lens[0], 0);
       if (stored.is_none()) {
-        if (log_verbose_) LOG(INFO) << "initial push: " << master_key;
+        if (log_verbose_)
+          LOG(INFO) << "initial push: " << master_key;
         // initialization
         CHECK_GT(num_rows, 0) << "init with empty data is not supported";
         InitRowSparseStored(type, master_key, num_rows, req_meta, req_data, server);
         return;
       } else {
-        if (log_verbose_) LOG(INFO) << "push: " << master_key << " " << req_data.keys;
+        if (log_verbose_)
+          LOG(INFO) << "push: " << master_key << " " << req_data.keys;
         auto& updates = update_buf_[master_key];
         if (sync_mode_ && updates.merged.is_none()) {
-          updates.merged = NDArray(kRowSparseStorage, stored.shape(), Context(), true,
+          updates.merged = NDArray(kRowSparseStorage,
+                                   stored.shape(),
+                                   Context(),
+                                   true,
                                    has_multi_precision_copy(type) ? mshadow::kFloat32 : type.dtype);
         }
         if (has_multi_precision_copy(type) && updates.temp_array.is_none()) {
-          updates.temp_array = NDArray(kRowSparseStorage, stored.shape(), Context(), false,
-                                       mshadow::kFloat32);
+          updates.temp_array =
+              NDArray(kRowSparseStorage, stored.shape(), Context(), false, mshadow::kFloat32);
         }
 
         if (num_rows == 0) {
@@ -551,8 +586,8 @@ class KVStoreDistServer {
             if (updates.request.empty()) {
               // reset to zeros
               int merged_dtype = has_multi_precision_copy(type) ? mshadow::kFloat32 : type.dtype;
-              updates.merged = NDArray(kRowSparseStorage, stored.shape(), Context(),
-                                       true, merged_dtype);
+              updates.merged =
+                  NDArray(kRowSparseStorage, stored.shape(), Context(), true, merged_dtype);
             }  // else nothing to aggregate
             updates.request.push_back(req_meta);
             ApplyUpdates(type, master_key, req_data, &updates, server);
@@ -568,12 +603,12 @@ class KVStoreDistServer {
 
           // data
           TBlob idx_blob(indices.data(), mshadow::Shape1(num_rows), cpu::kDevMask);
-          size_t ds[] = {(size_t) num_rows, (size_t) unit_len};
+          size_t ds[] = {(size_t)num_rows, (size_t)unit_len};
           mxnet::TShape dshape(ds, ds + 2);
           TBlob recv_blob;
           MSHADOW_REAL_TYPE_SWITCH(type.dtype, DType, {
-            recv_blob = TBlob(reinterpret_cast<DType*>(req_data.vals.data()),
-                              dshape, cpu::kDevMask);
+            recv_blob =
+                TBlob(reinterpret_cast<DType*>(req_data.vals.data()), dshape, cpu::kDevMask);
           })
           // row_sparse NDArray
           NDArray recved(kRowSparseStorage, stored.shape(), recv_blob, {idx_blob}, 0);
@@ -605,16 +640,17 @@ class KVStoreDistServer {
   void DefaultStorageResponse(const DataHandleType type,
                               const int key,
                               const ps::KVMeta& req_meta,
-                              const ps::KVPairs<char> &req_data,
+                              const ps::KVPairs<char>& req_data,
                               ps::KVServer<char>* server) {
     ps::KVPairs<char> response;
     const NDArray& stored = store_[key];
     CHECK(!stored.is_none()) << "init " << key << " first";
 
     // as server returns when store_realt is ready in this case
-    if (has_multi_precision_copy(type)) stored.WaitToRead();
+    if (has_multi_precision_copy(type))
+      stored.WaitToRead();
 
-    auto len = stored.shape().Size() * mshadow::mshadow_sizeof(stored.dtype());
+    auto len      = stored.shape().Size() * mshadow::mshadow_sizeof(stored.dtype());
     response.keys = req_data.keys;
     response.lens = {len};
     // TODO(mli) try to remove this CopyFrom
@@ -624,10 +660,10 @@ class KVStoreDistServer {
 
   void DataHandleCompressed(const DataHandleType type,
                             const ps::KVMeta& req_meta,
-                            const ps::KVPairs<char> &req_data,
+                            const ps::KVPairs<char>& req_data,
                             ps::KVServer<char>* server) {
     CHECK_EQ(type.dtype, mshadow::kFloat32)
-      << "Gradient compression is currently supported for fp32 only";
+        << "Gradient compression is currently supported for fp32 only";
     if (req_meta.push) {
       // there used several WaitToRead, this is because \a recved's memory
       // could be deallocated when this function returns. so we need to make sure
@@ -639,8 +675,8 @@ class KVStoreDistServer {
       CHECK_EQ(req_data.vals.size(), (size_t)req_data.lens[1]);
 
       int original_size = DecodeKey(req_data.keys[0]);
-      int key = DecodeKey(req_data.keys[1]);
-      auto& stored = store_[key];
+      int key           = DecodeKey(req_data.keys[1]);
+      auto& stored      = store_[key];
 
       size_t ds[] = {(size_t)req_data.lens[1] / mshadow::mshadow_sizeof(type.dtype)};
       mxnet::TShape dshape(ds, ds + 1);
@@ -648,7 +684,7 @@ class KVStoreDistServer {
       NDArray recved = NDArray(recv_blob, 0);
 
       NDArray decomp_buf = decomp_buf_[key];
-      dshape = mxnet::TShape{(int64_t) original_size};
+      dshape             = mxnet::TShape{(int64_t)original_size};
 
       if (decomp_buf.is_none()) {
         decomp_buf = NDArray(dshape, Context());
@@ -683,7 +719,7 @@ class KVStoreDistServer {
         server->Response(req_meta);
         stored.WaitToRead();
       }
-    } else {       // pull
+    } else {  // pull
       CHECK_EQ(req_data.keys.size(), (size_t)1);
       CHECK_EQ(req_data.lens.size(), (size_t)0);
       int key = DecodeKey(req_data.keys[0]);
@@ -691,8 +727,9 @@ class KVStoreDistServer {
     }
   }
 
-  void DataHandleDefault(const DataHandleType type, const ps::KVMeta& req_meta,
-                         const ps::KVPairs<char> &req_data,
+  void DataHandleDefault(const DataHandleType type,
+                         const ps::KVMeta& req_meta,
+                         const ps::KVPairs<char>& req_data,
                          ps::KVServer<char>* server) {
     // do some check
     CHECK_EQ(req_data.keys.size(), (size_t)1);
@@ -700,13 +737,13 @@ class KVStoreDistServer {
       CHECK_EQ(req_data.lens.size(), (size_t)1);
       CHECK_EQ(req_data.vals.size(), (size_t)req_data.lens[0]);
     }
-    int key = DecodeKey(req_data.keys[0]);
+    int key      = DecodeKey(req_data.keys[0]);
     auto& stored = has_multi_precision_copy(type) ? store_realt_[key] : store_[key];
     // there used several WaitToRead, this is because \a recved's memory
     // could be deallocated when this function returns. so we need to make sure
     // the operators with \a NDArray are actually finished
     if (req_meta.push) {
-      size_t ds[] = {(size_t) req_data.lens[0] / mshadow::mshadow_sizeof(type.dtype)};
+      size_t ds[] = {(size_t)req_data.lens[0] / mshadow::mshadow_sizeof(type.dtype)};
       mxnet::TShape dshape(ds, ds + 1);
       TBlob recv_blob;
       MSHADOW_REAL_TYPE_SWITCH(type.dtype, DType, {
@@ -715,21 +752,25 @@ class KVStoreDistServer {
       NDArray recved = NDArray(recv_blob, 0);
       if (stored.is_none()) {
         // initialization
-        stored = NDArray(dshape, Context(), false,
+        stored = NDArray(dshape,
+                         Context(),
+                         false,
                          has_multi_precision_copy(type) ? mshadow::kFloat32 : type.dtype);
         CopyFromTo(recved, &stored, 0);
         server->Response(req_meta);
         if (has_multi_precision_copy(type)) {
           auto& stored_dtype = store_[key];
-          stored_dtype = NDArray(dshape, Context(), false, type.dtype);
+          stored_dtype       = NDArray(dshape, Context(), false, type.dtype);
           CopyFromTo(stored, stored_dtype);
           stored_dtype.WaitToRead();
         }
         stored.WaitToRead();
       } else {
-        auto &updates = update_buf_[key];
+        auto& updates = update_buf_[key];
         if (sync_mode_ && updates.merged.is_none()) {
-          updates.merged = NDArray(dshape, Context(), false,
+          updates.merged = NDArray(dshape,
+                                   Context(),
+                                   false,
                                    has_multi_precision_copy(type) ? mshadow::kFloat32 : type.dtype);
         }
         if (has_multi_precision_copy(type) && updates.temp_array.is_none()) {
@@ -767,7 +808,6 @@ class KVStoreDistServer {
     return key - kr.begin();
   }
 
-
   /**
    * \brief user defined mode for push
    */
diff --git a/src/kvstore/kvstore_local.h b/src/kvstore/kvstore_local.h
index bc4e9337568b..6362a4fc7d90 100644
--- a/src/kvstore/kvstore_local.h
+++ b/src/kvstore/kvstore_local.h
@@ -48,8 +48,8 @@ namespace kvstore {
  * \param delim char to split string around
  * \param result container for tokens extracted after splitting
  */
-template<typename Out>
-void split(const std::string &s, const char delim, Out result) {
+template <typename Out>
+void split(const std::string& s, const char delim, Out result) {
   std::stringstream ss;
   ss.str(s);
   std::string item;
@@ -58,11 +58,7 @@ void split(const std::string &s, const char delim, Out result) {
   }
 }
 
-enum KeyType {
-  kUndefinedKey = -1,
-  kStringKey,
-  kIntKey
-};
+enum KeyType { kUndefinedKey = -1, kStringKey, kIntKey };
 
 /**
  * \brief store data in local machine
@@ -83,7 +79,7 @@ class KVStoreLocal : public KVStore {
     } else {
       comm_ = new CommCPU();
     }
-    pinned_ctx_ = comm_->pinned_ctx();
+    pinned_ctx_           = comm_->pinned_ctx();
     gradient_compression_ = std::make_shared<GradientCompression>();
   }
 
@@ -92,25 +88,23 @@ class KVStoreLocal : public KVStore {
     comm_ = nullptr;
   }
 
-  void Init(const std::vector<int>& keys,
-            const std::vector<NDArray>& values) override {
+  void Init(const std::vector<int>& keys, const std::vector<NDArray>& values) override {
     SetKeyType(kIntKey);
     InitImpl(keys, values);
   }
 
-  void Init(const std::vector<std::string>& str_keys,
-            const std::vector<NDArray>& values) override {
+  void Init(const std::vector<std::string>& str_keys, const std::vector<NDArray>& values) override {
     SetKeyType(kStringKey);
     std::vector<int> keys(str_keys.size());
     for (size_t i = 0; i < str_keys.size(); ++i) {
-      auto &str_key = str_keys[i];
+      auto& str_key = str_keys[i];
       CHECK(str_key_dict_.find(str_key) == str_key_dict_.end())
-            << "duplicate init of key " << str_key;
-      auto key = next_str_key_++;
+          << "duplicate init of key " << str_key;
+      auto key               = next_str_key_++;
       str_key_dict_[str_key] = key;
       // record reverse mapping from int to string
       reverse_str_key_dict_[key] = str_key;
-      keys[i] = key;
+      keys[i]                    = key;
     }
     InitImpl(keys, values);
   }
@@ -183,14 +177,14 @@ class KVStoreLocal : public KVStore {
     std::vector<int> vkeys(str_vkeys.size());
     std::vector<int> okeys(str_okeys.size());
     for (size_t i = 0; i < str_vkeys.size(); ++i) {
-      auto &str_key = str_vkeys[i];
+      auto& str_key = str_vkeys[i];
       CHECK(str_key_dict_.find(str_key) == str_key_dict_.end())
-            << "duplicate init of key " << str_key;
-      auto key = next_str_key_++;
+          << "duplicate init of key " << str_key;
+      auto key               = next_str_key_++;
       str_key_dict_[str_key] = key;
       // record reverse mapping from int to string
       reverse_str_key_dict_[key] = str_key;
-      vkeys[i] = key;
+      vkeys[i]                   = key;
     }
     LookupKeys(str_okeys, &okeys);
     BroadcastImpl(vkeys, okeys, values, outs, priority);
@@ -218,14 +212,13 @@ class KVStoreLocal : public KVStore {
     PullRowSparseImpl(keys, val_rowids, priority);
   }
 
-  void SetGradientCompression(const std::vector<std::pair<std::string, std::string> >
-                              & kwargs) override {
+  void SetGradientCompression(
+      const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     gradient_compression_->SetParams(kwargs);
   }
 
  private:
-  virtual void InitImpl(const std::vector<int>& keys,
-                        const std::vector<NDArray>& values) {
+  virtual void InitImpl(const std::vector<int>& keys, const std::vector<NDArray>& values) {
     for (size_t i = 0; i < keys.size(); ++i) {
       CHECK(local_.find(keys[i]) == local_.end())
           << "duplicate init of key " << keys[i]
@@ -241,12 +234,12 @@ class KVStoreLocal : public KVStore {
                         const std::vector<NDArray>& values,
                         int priority) {
     std::vector<int> uniq_keys;
-    std::vector<std::vector<NDArray> > grouped_vals;
+    std::vector<std::vector<NDArray>> grouped_vals;
     GroupKVPairsPush(keys, values, &uniq_keys, &grouped_vals, false);
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
-      int key = uniq_keys[i];
+      int key               = uniq_keys[i];
       const NDArray& merged = comm_->Reduce(key, grouped_vals[i], priority);
-      NDArray& local = local_[key];
+      NDArray& local        = local_[key];
       if (key_type_ == kStringKey) {
         local.AssignStorageInfo(
             profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "kvstore:push:",
@@ -259,8 +252,7 @@ class KVStoreLocal : public KVStore {
       if (updater_ != nullptr) {
         CHECK(!local.is_none()) << "key " << key << " has not been inited";
         // if merged is on gpu, we may need copy weight from cpu to gpu
-        if (merged.ctx().dev_mask() != cpu::kDevMask &&
-            local.ctx().dev_mask() == cpu::kDevMask) {
+        if (merged.ctx().dev_mask() != cpu::kDevMask && local.ctx().dev_mask() == cpu::kDevMask) {
           local = local.Copy(merged.ctx());
         }
         // call the updater with string keys
@@ -269,11 +261,11 @@ class KVStoreLocal : public KVStore {
         if (key_type_ == kStringKey && str_updater_ != nullptr) {
           // TODO(haibin) CHECK(str_updater_ != nullptr) if use_str_key
           // after all language bindings picks up string interface changes
-          const std::string &str_key = reverse_str_key_dict_[key];
+          const std::string& str_key = reverse_str_key_dict_[key];
           // TODO(haibin) avoid reverse key lookup if use_str_key
-          str_updater_(str_key, merged,  &local);
+          str_updater_(str_key, merged, &local);
         } else {
-          updater_(key, merged,  &local);
+          updater_(key, merged, &local);
         }
       } else {
         if (merged.storage_type() != local.storage_type()) {
@@ -290,16 +282,17 @@ class KVStoreLocal : public KVStore {
                         int priority,
                         bool ignore_sparse) {
     std::vector<int> uniq_keys;
-    std::vector<std::vector<NDArray*> > grouped_vals;
+    std::vector<std::vector<NDArray*>> grouped_vals;
     GroupKVPairsPull(keys, values, &uniq_keys, &grouped_vals, ignore_sparse);
 
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
-      int key = uniq_keys[i];
+      int key              = uniq_keys[i];
       const NDArray& local = local_[key];
       CHECK(!local.is_none()) << "key " << key << " has not been inited";
       comm_->Broadcast(key, local, grouped_vals[i], priority);
       for (std::vector<NDArray*>::iterator iter = grouped_vals[i].begin();
-           iter != grouped_vals[i].end(); ++iter) {
+           iter != grouped_vals[i].end();
+           ++iter) {
         if (key_type_ == kStringKey) {
           (*iter)->AssignStorageInfo(
               profiler::ProfilerScope::Get()->GetCurrentProfilerScope() + "kvstore:pull:",
@@ -320,15 +313,15 @@ class KVStoreLocal : public KVStore {
     std::vector<std::vector<std::pair<NDArray*, NDArray>>> grouped_val_rowids;
     GroupKVPairsPullRsp(keys, val_rowids, &uniq_keys, &grouped_val_rowids, false);
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
-      int key = uniq_keys[i];
+      int key              = uniq_keys[i];
       const NDArray& local = local_[key];
       CHECK(!local.is_none()) << "key " << key << " has not been inited";
       CHECK_EQ(local.storage_type(), kRowSparseStorage)
-               << "PullRowSparse expects row_sparse src NDArray";
-      auto &target_val_rowids = grouped_val_rowids[i];
-      const size_t num_vals = target_val_rowids.size();
+          << "PullRowSparse expects row_sparse src NDArray";
+      auto& target_val_rowids = grouped_val_rowids[i];
+      const size_t num_vals   = target_val_rowids.size();
       for (size_t j = 0; j < num_vals; j++) {
-        auto &row_id = target_val_rowids[j].second;
+        auto& row_id                = target_val_rowids[j].second;
         target_val_rowids[j].second = Unique(row_id, local.ctx(), 0);
       }
       comm_->BroadcastRowSparse(key, local, grouped_val_rowids[i], priority);
@@ -342,7 +335,8 @@ class KVStoreLocal : public KVStore {
    * If the key type is already defined, check if it matches the provided key type
    */
   void SetKeyType(const KeyType key_type) {
-    if (key_type_ == kUndefinedKey) key_type_ = key_type;
+    if (key_type_ == kUndefinedKey)
+      key_type_ = key_type;
     CHECK_EQ(key_type_, key_type) << "Mixed key types are not allowed";
   }
 
@@ -369,15 +363,16 @@ class KVStoreLocal : public KVStore {
    */
   virtual void GroupKVPairsPush(const std::vector<int>& keys,
                                 const std::vector<NDArray>& values,
-                                std::vector<int> *uniq_keys,
-                                std::vector<std::vector<NDArray>> *grouped_vals,
+                                std::vector<int>* uniq_keys,
+                                std::vector<std::vector<NDArray>>* grouped_vals,
                                 bool ignore_sparse) {
     // check if the storage type of a value is valid
     auto validator = [](const int key, const NDArray& nd, bool ignore_sparse) -> bool {
       CHECK(!ignore_sparse) << "Cannot ignore sparse arrays for push";
       auto stype = nd.storage_type();
       // valid NDArray
-      if (stype == kDefaultStorage || stype == kRowSparseStorage) return true;
+      if (stype == kDefaultStorage || stype == kRowSparseStorage)
+        return true;
       // invalid NDArray, abort
       LOG(FATAL) << "Unexpected storage type detected during kvstore push: " << stype;
       return false;
@@ -389,13 +384,14 @@ class KVStoreLocal : public KVStore {
    */
   virtual void GroupKVPairsPull(const std::vector<int>& keys,
                                 const std::vector<NDArray*>& values,
-                                std::vector<int> *uniq_keys,
-                                std::vector<std::vector<NDArray*>> *grouped_vals,
+                                std::vector<int>* uniq_keys,
+                                std::vector<std::vector<NDArray*>>* grouped_vals,
                                 bool ignore_sparse) {
     // check if the storage type of a value is valid
     auto validator = [this](const int key, const NDArray* nd, bool ignore_sparse) -> bool {
       // valid
-      if (nd->storage_type() == kDefaultStorage || !ignore_sparse) return true;
+      if (nd->storage_type() == kDefaultStorage || !ignore_sparse)
+        return true;
       // invalid, print warning messages once
       if (this->warnings_printed_.find(key) == this->warnings_printed_.end()) {
         LOG(INFO) << "Warning: non-default weights detected during kvstore pull. "
@@ -414,19 +410,21 @@ class KVStoreLocal : public KVStore {
    */
   virtual void GroupKVPairsPullRsp(const std::vector<int>& keys,
                                    const std::vector<RSPVal>& values,
-                                   std::vector<int> *uniq_keys,
-                                   std::vector<std::vector<RSPVal>> *grouped_vals,
+                                   std::vector<int>* uniq_keys,
+                                   std::vector<std::vector<RSPVal>>* grouped_vals,
                                    bool ignore_sparse) {
     // check if the storage type of a value is valid
     auto validator = [](const int key, const RSPVal& val_rowid, bool ignore_sparse) -> bool {
       CHECK(!ignore_sparse) << "Cannot ignore sparse arrays in row_sparse_pull";
-      auto val_stype = val_rowid.first->storage_type();
+      auto val_stype   = val_rowid.first->storage_type();
       auto rowid_stype = val_rowid.second.storage_type();
       // check storage types
-      CHECK_EQ(val_stype, kRowSparseStorage) << "Expected row_sparse storage type for "
-              << "row_sparse_pull values, but detected storage type " << val_stype;
-      CHECK_EQ(rowid_stype, kDefaultStorage) << "Expected default storage type for "
-              << "row_sparse_pull rowids, but detected storage type " << rowid_stype;
+      CHECK_EQ(val_stype, kRowSparseStorage)
+          << "Expected row_sparse storage type for "
+          << "row_sparse_pull values, but detected storage type " << val_stype;
+      CHECK_EQ(rowid_stype, kDefaultStorage)
+          << "Expected default storage type for "
+          << "row_sparse_pull rowids, but detected storage type " << rowid_stype;
       return true;
     };
     GroupKVPairs(keys, values, uniq_keys, grouped_vals, validator, ignore_sparse);
@@ -440,7 +438,7 @@ class KVStoreLocal : public KVStore {
   void GroupKVPairs(const std::vector<int>& keys,
                     const std::vector<V>& values,
                     std::vector<int>* uniq_keys,
-                    std::vector<std::vector<V> >* grouped_vals,
+                    std::vector<std::vector<V>>* grouped_vals,
                     const FValidate& is_valid,
                     bool ignore_sparse) {
     CHECK_EQ(keys.size(), values.size());
@@ -448,11 +446,10 @@ class KVStoreLocal : public KVStore {
     using Idx = std::pair<int, int>;
     std::vector<Idx> idx(keys.size());
     for (size_t i = 0; i < keys.size(); ++i) {
-      idx[i].first = keys[i]; idx[i].second = i;
+      idx[i].first  = keys[i];
+      idx[i].second = i;
     }
-    std::sort(idx.begin(), idx.end(), [](const Idx& a, const Idx& b) {
-        return a.first < b.first;
-      });
+    std::sort(idx.begin(), idx.end(), [](const Idx& a, const Idx& b) { return a.first < b.first; });
 
     int pre_key = idx[0].first - 1;
     for (auto i : idx) {
@@ -468,12 +465,11 @@ class KVStoreLocal : public KVStore {
     }
   }
 
-  void LookupKeys(const std::vector<std::string>& str_keys,
-                  std::vector<int> *keys) {
+  void LookupKeys(const std::vector<std::string>& str_keys, std::vector<int>* keys) {
     for (size_t i = 0; i < str_keys.size(); ++i) {
-      auto &str_key = str_keys[i];
+      auto& str_key = str_keys[i];
       CHECK(str_key_dict_.find(str_key) != str_key_dict_.end())
-            << "key " << str_key << " doesn't exist. Did you init?";
+          << "key " << str_key << " doesn't exist. Did you init?";
       keys->at(i) = str_key_dict_[str_key];
     }
   }
@@ -487,49 +483,50 @@ class KVStoreLocal : public KVStore {
    * \param ctx the target context
    * \param priority the priority of the operation
    */
-  NDArray Unique(const NDArray &data, Context ctx, int priority) {
+  NDArray Unique(const NDArray& data, Context ctx, int priority) {
     // create kRowSparseStorage output ndarray
     const size_t num_elements = data.shape().Size();
-    NDArray out(kRowSparseStorage, mshadow::Shape2(num_elements, 1),
-                ctx, true, mshadow::kInt64);
-    bool diff_ctx = data.ctx() != ctx;
+    NDArray out(kRowSparseStorage, mshadow::Shape2(num_elements, 1), ctx, true, mshadow::kInt64);
+    bool diff_ctx       = data.ctx() != ctx;
     NDArray data_in_ctx = diff_ctx ? NDArray(data.shape(), ctx, true, data.dtype()) : data;
     // if data == data_in_ctx, CopyFromTo is smart enough to skip the copy
     CopyFromTo(data, &data_in_ctx, priority);
     // GPU requires temp resources
     bool is_gpu = out.ctx().dev_mask() == gpu::kDevMask;
     Engine::Get()->PushAsync(
-      [=](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-        // copy data.data() to out.data()
-        out.CheckAndAlloc({mshadow::Shape1(num_elements)});
-        TBlob out_data = out.data();
-        NDArray workspace;
-        switch (out.ctx().dev_mask()) {
-          case cpu::kDevMask: {
-            mshadow::Stream<cpu> *s = rctx.get_stream<cpu>();
-            ndarray::Copy<cpu, cpu>(data_in_ctx.data(), &out_data,
-                                    ctx, ctx, rctx);
-            UniqueImpl(&workspace, s, out);
-            break;
-          }
-  #if MXNET_USE_CUDA
-          case gpu::kDevMask: {
-            mshadow::Stream<gpu> *s = rctx.get_stream<gpu>();
-            ndarray::Copy<gpu, gpu>(data_in_ctx.data(), &out_data,
-                                    ctx, ctx, rctx);
-            UniqueImpl(&workspace, s, out);
-            // wait for GPU operations to complete
-            s->Wait();
-            break;
+        [=](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+          // copy data.data() to out.data()
+          out.CheckAndAlloc({mshadow::Shape1(num_elements)});
+          TBlob out_data = out.data();
+          NDArray workspace;
+          switch (out.ctx().dev_mask()) {
+            case cpu::kDevMask: {
+              mshadow::Stream<cpu>* s = rctx.get_stream<cpu>();
+              ndarray::Copy<cpu, cpu>(data_in_ctx.data(), &out_data, ctx, ctx, rctx);
+              UniqueImpl(&workspace, s, out);
+              break;
+            }
+#if MXNET_USE_CUDA
+            case gpu::kDevMask: {
+              mshadow::Stream<gpu>* s = rctx.get_stream<gpu>();
+              ndarray::Copy<gpu, gpu>(data_in_ctx.data(), &out_data, ctx, ctx, rctx);
+              UniqueImpl(&workspace, s, out);
+              // wait for GPU operations to complete
+              s->Wait();
+              break;
+            }
+#endif
+            default:
+              LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
           }
-  #endif
-          default:
-            LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
-        }
-        on_complete();
-      }, out.ctx(), {data_in_ctx.var()}, {out.var()},
-      is_gpu ? FnProperty::kGPUPrioritized : FnProperty::kCPUPrioritized,
-      priority, "KVStoreUnique");
+          on_complete();
+        },
+        out.ctx(),
+        {data_in_ctx.var()},
+        {out.var()},
+        is_gpu ? FnProperty::kGPUPrioritized : FnProperty::kCPUPrioritized,
+        priority,
+        "KVStoreUnique");
     return out;
   }
 
diff --git a/src/kvstore/kvstore_nccl.h b/src/kvstore/kvstore_nccl.h
index 09bd880bfd68..736794ab1ddf 100644
--- a/src/kvstore/kvstore_nccl.h
+++ b/src/kvstore/kvstore_nccl.h
@@ -63,9 +63,9 @@ class KVStoreNCCL : public KVStoreLocal {
  public:
   KVStoreNCCL() : KVStoreLocal() {
     // Due to aggregation, we do not use the Comm interface
-    comm_ = nullptr;
+    comm_       = nullptr;
     pinned_ctx_ = Context::CPUPinned(0);
-    inited_ = false;
+    inited_     = false;
   }
 
   virtual ~KVStoreNCCL() {
@@ -76,11 +76,9 @@ class KVStoreNCCL : public KVStoreLocal {
   }
 
  private:
-  void InitImpl(const std::vector<int>& keys,
-                const std::vector<NDArray>& values) override {
+  void InitImpl(const std::vector<int>& keys, const std::vector<NDArray>& values) override {
     for (size_t i = 0; i < keys.size(); ++i) {
-      CHECK(local_.find(keys[i]) == local_.end())
-          << "duplicate init of key " << keys[i];
+      CHECK(local_.find(keys[i]) == local_.end()) << "duplicate init of key " << keys[i];
       local_[keys[i]] = values[i].Copy(pinned_ctx_);
       InitKey(keys[i], values[i].storage_type(), values[i].shape(), values[i].dtype());
     }
@@ -90,7 +88,7 @@ class KVStoreNCCL : public KVStoreLocal {
                 const std::vector<NDArray>& values,
                 int priority) override {
     std::vector<int> uniq_keys;
-    std::vector<std::vector<NDArray> > grouped_vals;
+    std::vector<std::vector<NDArray>> grouped_vals;
     // nccl kvstore doesn't support sparse ndarray
     GroupKVPairsHelper(keys, values, &uniq_keys, &grouped_vals, true);
 
@@ -106,13 +104,12 @@ class KVStoreNCCL : public KVStoreLocal {
         // We issued NCCL kernels, need to synchronize
         nccl_called = true;
       }
-      auto& merged = *(merged_ptrs[i]);
+      auto& merged   = *(merged_ptrs[i]);
       NDArray& local = local_[key];
       if (updater_ != nullptr) {
         CHECK(!local.is_none()) << "key " << key << " has not been inited";
         // if merged is on gpu, we may need copy weight from cpu to gpu
-        if (merged.ctx().dev_mask() != cpu::kDevMask &&
-            local.ctx().dev_mask() == cpu::kDevMask) {
+        if (merged.ctx().dev_mask() != cpu::kDevMask && local.ctx().dev_mask() == cpu::kDevMask) {
           local = local.Copy(merged.ctx());
         }
       }
@@ -125,8 +122,8 @@ class KVStoreNCCL : public KVStoreLocal {
     }
 
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
-      int key = uniq_keys[i];
-      auto& merged = *(merged_ptrs[i]);
+      int key        = uniq_keys[i];
+      auto& merged   = *(merged_ptrs[i]);
       NDArray& local = *(local_ptrs[i]);
       if (updater_ != nullptr) {
         // call the updater with string keys
@@ -134,10 +131,10 @@ class KVStoreNCCL : public KVStoreLocal {
         // otherwise fallback to updater_ which uses int key interface
         if (key_type_ == kStringKey && str_updater_ != nullptr) {
           // after all language bindings picks up string interface changes
-          const std::string &str_key = reverse_str_key_dict_[key];
-          str_updater_(str_key, merged,  &local);
+          const std::string& str_key = reverse_str_key_dict_[key];
+          str_updater_(str_key, merged, &local);
         } else {
-          updater_(key, merged,  &local);
+          updater_(key, merged, &local);
         }
       } else {
         local = merged;
@@ -147,16 +144,17 @@ class KVStoreNCCL : public KVStoreLocal {
 
   void PullImpl(const std::vector<int>& keys,
                 const std::vector<NDArray*>& values,
-                int priority, bool ignore_sparse) override {
+                int priority,
+                bool ignore_sparse) override {
     CHECK(ignore_sparse) << "nccl kvstore pull doesn't support ignore_sparse=False";
     std::vector<int> uniq_keys;
-    std::vector<std::vector<NDArray*> > grouped_vals;
+    std::vector<std::vector<NDArray*>> grouped_vals;
     GroupKVPairsHelper(keys, values, &uniq_keys, &grouped_vals, true);
     std::vector<NDArray> locals;
     bool nccl_called = false;
 
     for (size_t i = 0; i < uniq_keys.size(); ++i) {
-      int key = uniq_keys[i];
+      int key              = uniq_keys[i];
       const NDArray& local = local_[key];
       locals.push_back(local_[key]);
       CHECK(!local.is_none()) << "key " << key << " has not been inited";
@@ -180,8 +178,8 @@ class KVStoreNCCL : public KVStoreLocal {
     LOG(FATAL) << "NCCL kvstore does not support sparse storage type";
   }
 
-  void SetGradientCompression(const std::vector<std::pair<std::string, std::string> >
-                                      & kwargs) override {
+  void SetGradientCompression(
+      const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     LOG(FATAL) << "NCCL kvstore does not support gradient compression";
   }
 
@@ -192,15 +190,16 @@ class KVStoreNCCL : public KVStoreLocal {
   template <typename T>
   void GroupKVPairsHelper(const std::vector<int>& keys,
                           const std::vector<T>& values,
-                          std::vector<int> *uniq_keys,
-                          std::vector<std::vector<T>> *grouped_vals,
+                          std::vector<int>* uniq_keys,
+                          std::vector<std::vector<T>>* grouped_vals,
                           bool ignore_sparse) {
     // check if the storage type of a value is valid
     auto validator = [this](const int key, const T nd, bool ignore_sparse) -> bool {
       CHECK(ignore_sparse) << "nccl kvstore pull doesn't support ignore_sparse=False";
       auto stype = ptr(nd)->storage_type();
       // valid NDArray
-      if (stype == kDefaultStorage) return true;
+      if (stype == kDefaultStorage)
+        return true;
       // invalid NDArray, abort
       LOG(FATAL) << "NCCL kvstore does not support sparse storage type";
       return false;
@@ -221,8 +220,8 @@ class KVStoreNCCL : public KVStoreLocal {
     std::vector<Engine::VarHandle> mutate_vars;
 
     for (size_t k = 0; k < keys.size(); ++k) {
-      auto& key = keys[k];
-      auto& src = srcs[k];
+      auto& key     = keys[k];
+      auto& src     = srcs[k];
       auto& root_id = root_ids[k];
 
       // avoid extra copy for single device, but it may bring problems for
@@ -250,10 +249,10 @@ class KVStoreNCCL : public KVStoreLocal {
       CHECK(device_ids_ == dev_ids) << "NCCL KVStore supports only single set of devices";
 
       auto& buf = merge_buf_[key];
-      int root = buf.merged.ctx().dev_id;
-      root_id = FindRootId(src, root);
+      int root  = buf.merged.ctx().dev_id;
+      root_id   = FindRootId(src, root);
 
-      auto& reduce = buf.merged;
+      auto& reduce      = buf.merged;
       (*merged_ptrs)[k] = &reduce;
       // Need to pass NDArrays by value to the engine
       reduces[k] = reduce;
@@ -264,70 +263,73 @@ class KVStoreNCCL : public KVStoreLocal {
       mutate_vars.push_back(reduce.var());
     }
 
-    Engine::Get()->PushSync([srcs, reduces, root_ids, this](RunContext rctx) {
-        std::lock_guard<std::mutex> l(Storage::Get()->GetMutex(Context::kGPU));
+    Engine::Get()->PushSync(
+        [srcs, reduces, root_ids, this](RunContext rctx) {
+          std::lock_guard<std::mutex> l(Storage::Get()->GetMutex(Context::kGPU));
 #if (NCCL_MAJOR > 2 || (NCCL_MAJOR == 2 && NCCL_MINOR > 1))
-        ncclGroupStart();
-#endif
-        for (size_t k = 0; k < srcs.size(); ++k) {
-          auto& src = srcs[k];
-          auto& root_id = root_ids[k];
-          auto& reduce = reduces[k];
-          if (src.size() <= 1) {
-            continue;
-          }
-          int root = nccl_data_[src[root_id].ctx().dev_id].rank;
           ncclGroupStart();
-          for (size_t i = 0; i < src.size(); ++i) {
-            NCCLEntry cur = nccl_data_[src[i].ctx().dev_id];
-            if (i == root_id) {
-            MSHADOW_TYPE_SWITCH(src[i].dtype(), DType,
-            ncclReduce(src[i].data().dptr<DType>(),
-                              reduce.data().dptr<DType>(),
-                              src[i].shape().Size(),
-                              GetNCCLType(src[i].dtype()),
-                              ncclSum,
-                              root,
-                              cur.comm,
-                              cur.stream););
-            } else {
-            MSHADOW_TYPE_SWITCH(src[i].dtype(), DType,
-            ncclReduce(src[i].data().dptr<DType>(),
-                              nullptr,
-                              src[i].shape().Size(),
-                              GetNCCLType(src[i].dtype()),
-                              ncclSum,
-                              root,
-                              cur.comm,
-                              cur.stream););
+#endif
+          for (size_t k = 0; k < srcs.size(); ++k) {
+            auto& src     = srcs[k];
+            auto& root_id = root_ids[k];
+            auto& reduce  = reduces[k];
+            if (src.size() <= 1) {
+              continue;
+            }
+            int root = nccl_data_[src[root_id].ctx().dev_id].rank;
+            ncclGroupStart();
+            for (size_t i = 0; i < src.size(); ++i) {
+              NCCLEntry cur = nccl_data_[src[i].ctx().dev_id];
+              if (i == root_id) {
+                MSHADOW_TYPE_SWITCH(src[i].dtype(),
+                                    DType,
+                                    ncclReduce(src[i].data().dptr<DType>(),
+                                               reduce.data().dptr<DType>(),
+                                               src[i].shape().Size(),
+                                               GetNCCLType(src[i].dtype()),
+                                               ncclSum,
+                                               root,
+                                               cur.comm,
+                                               cur.stream););
+              } else {
+                MSHADOW_TYPE_SWITCH(src[i].dtype(),
+                                    DType,
+                                    ncclReduce(src[i].data().dptr<DType>(),
+                                               nullptr,
+                                               src[i].shape().Size(),
+                                               GetNCCLType(src[i].dtype()),
+                                               ncclSum,
+                                               root,
+                                               cur.comm,
+                                               cur.stream););
+              }
             }
+            ncclGroupEnd();
           }
-          ncclGroupEnd();
-        }
 #if (NCCL_MAJOR > 2 || (NCCL_MAJOR == 2 && NCCL_MINOR > 1))
-        ncclGroupEnd();
+          ncclGroupEnd();
 #endif
-      },
-      Context::CPU(),
-      const_vars,
-      mutate_vars,
-      FnProperty::kCPUPrioritized,
-      priority,
-      "KVStoreReduce");
+        },
+        Context::CPU(),
+        const_vars,
+        mutate_vars,
+        FnProperty::kCPUPrioritized,
+        priority,
+        "KVStoreReduce");
   }
 
   virtual void Broadcast(const std::vector<int> keys,
-      const std::vector<NDArray>& srcs,
-      const std::vector<std::vector<NDArray*>>& dsts,
-      int priority) {
+                         const std::vector<NDArray>& srcs,
+                         const std::vector<std::vector<NDArray*>>& dsts,
+                         int priority) {
     std::vector<size_t> root_ids(keys.size());
     std::vector<Engine::VarHandle> const_vars;
     std::vector<Engine::VarHandle> mutable_vars;
 
     for (size_t k = 0; k < keys.size(); ++k) {
-      auto& key = keys[k];
-      auto& src = srcs[k];
-      auto& dst = dsts[k];
+      auto& key     = keys[k];
+      auto& src     = srcs[k];
+      auto& dst     = dsts[k];
       auto& root_id = root_ids[k];
 
       if (!inited_) {
@@ -341,7 +343,7 @@ class KVStoreNCCL : public KVStoreLocal {
         }
       } else {
         auto& buf = merge_buf_[key];
-        int root = src.ctx().dev_id;
+        int root  = src.ctx().dev_id;
         assert(root == buf.merged.ctx().dev_id);
         root_id = FindRootId(dst, root);
 
@@ -357,7 +359,7 @@ class KVStoreNCCL : public KVStoreLocal {
         // On root perform simple copy to the output
         CopyFromTo(src, *dst[root_id], priority);
         for (size_t i = 0; i < dst.size(); ++i) {
-          if ( i != root_id)
+          if (i != root_id)
             mutable_vars.push_back(dst[i]->var());
         }
         const_vars.push_back(src.var());
@@ -380,44 +382,46 @@ class KVStoreNCCL : public KVStoreLocal {
       }
     }
 
-    Engine::Get()->PushSync([srcs, broadcasts, root_ids, this](RunContext rctx) {
-        std::lock_guard<std::mutex> l(Storage::Get()->GetMutex(Context::kGPU));
+    Engine::Get()->PushSync(
+        [srcs, broadcasts, root_ids, this](RunContext rctx) {
+          std::lock_guard<std::mutex> l(Storage::Get()->GetMutex(Context::kGPU));
 #if (NCCL_MAJOR > 2 || (NCCL_MAJOR == 2 && NCCL_MINOR > 1))
-        ncclGroupStart();
+          ncclGroupStart();
 #endif
-        for (size_t k = 0; k < srcs.size(); ++k) {
-          auto& src = srcs[k];
-          auto& dst = broadcasts[k];
-          auto& root_id = root_ids[k];
-          if (dst.size() <= 1) {
-            continue;
-          }
+          for (size_t k = 0; k < srcs.size(); ++k) {
+            auto& src     = srcs[k];
+            auto& dst     = broadcasts[k];
+            auto& root_id = root_ids[k];
+            if (dst.size() <= 1) {
+              continue;
+            }
 
-          int root = nccl_data_[src.ctx().dev_id].rank;
-          ncclGroupStart();
-          for (size_t i = 0; i < dst.size(); ++i) {
-            auto& bcast = (i == root_id) ? src : dst[i];
-            NCCLEntry cur = nccl_data_[bcast.ctx().dev_id];
-            MSHADOW_TYPE_SWITCH(bcast.dtype(), DType,
-                ncclBcast(bcast.data().dptr<DType>(),
-                  bcast.shape().Size(),
-                  GetNCCLType(bcast.dtype()),
-                  root,
-                  cur.comm,
-                  cur.stream););
+            int root = nccl_data_[src.ctx().dev_id].rank;
+            ncclGroupStart();
+            for (size_t i = 0; i < dst.size(); ++i) {
+              auto& bcast   = (i == root_id) ? src : dst[i];
+              NCCLEntry cur = nccl_data_[bcast.ctx().dev_id];
+              MSHADOW_TYPE_SWITCH(bcast.dtype(),
+                                  DType,
+                                  ncclBcast(bcast.data().dptr<DType>(),
+                                            bcast.shape().Size(),
+                                            GetNCCLType(bcast.dtype()),
+                                            root,
+                                            cur.comm,
+                                            cur.stream););
+            }
+            ncclGroupEnd();
           }
-          ncclGroupEnd();
-        }
 #if (NCCL_MAJOR > 2 || (NCCL_MAJOR == 2 && NCCL_MINOR > 1))
-        ncclGroupEnd();
+          ncclGroupEnd();
 #endif
-      },
-      Context::CPU(),
-      const_vars,
-      mutable_vars,
-      FnProperty::kCPUPrioritized,
-      priority,
-      "KVStoreBCast");
+        },
+        Context::CPU(),
+        const_vars,
+        mutable_vars,
+        FnProperty::kCPUPrioritized,
+        priority,
+        "KVStoreBCast");
   }
 
   // Function that waits for NCCL collective to complete
@@ -425,26 +429,29 @@ class KVStoreNCCL : public KVStoreLocal {
   void CommSync(const std::vector<T>& dst, int priority) {
     std::vector<Engine::VarHandle> mutate_vars;
     for (size_t i = 0; i < dst.size(); ++i) {
-        mutate_vars.push_back(ptr(dst[i])->var());
+      mutate_vars.push_back(ptr(dst[i])->var());
     }
-    Engine::Get()->PushSync([this](RunContext rctx) {
-        mxnet::common::cuda::DeviceStore device_store;
-        for (auto cur : nccl_data_) {
-          device_store.SetDevice(cur.second.dev_id);
-          CUDA_CALL(cudaStreamSynchronize(cur.second.stream));
-        }
-      },
-      Context::CPU(),
-      {},
-      mutate_vars,
-      FnProperty::kCPUPrioritized,
-      priority,
-      "KVStoreStreamSync");
+    Engine::Get()->PushSync(
+        [this](RunContext rctx) {
+          mxnet::common::cuda::DeviceStore device_store;
+          for (auto cur : nccl_data_) {
+            device_store.SetDevice(cur.second.dev_id);
+            CUDA_CALL(cudaStreamSynchronize(cur.second.stream));
+          }
+        },
+        Context::CPU(),
+        {},
+        mutate_vars,
+        FnProperty::kCPUPrioritized,
+        priority,
+        "KVStoreStreamSync");
   }
 
   // Initialize single key
-  void InitKey(int key, const NDArrayStorageType stype, const mxnet::TShape& shape,
-            int dtype = mshadow::kFloat32) {
+  void InitKey(int key,
+               const NDArrayStorageType stype,
+               const mxnet::TShape& shape,
+               int dtype = mshadow::kFloat32) {
     if (stype == kDefaultStorage) {
       key_attrs_.push_back(std::make_tuple(key, shape, dtype));
     } else {
@@ -484,8 +491,8 @@ class KVStoreNCCL : public KVStoreLocal {
     for (size_t i = 0; i < devs.size(); ++i) {
       NCCLEntry e;
       e.dev_id = device_ids_[i];
-      e.comm = comms[i];
-      e.rank = i;
+      e.comm   = comms[i];
+      e.rank   = i;
       device_store.SetDevice(e.dev_id);
       cudaStreamCreate(&(e.stream));
       nccl_data_[device_ids_[i]] = e;
@@ -495,10 +502,10 @@ class KVStoreNCCL : public KVStoreLocal {
   using KeyAttrs = std::tuple<int, mxnet::TShape, int>;
   void InitMergeBuffer(const std::vector<Context>& devs) {
     for (size_t i = 0; i < key_attrs_.size(); ++i) {
-      int key  = std::get<0>(key_attrs_[i]);
+      int key         = std::get<0>(key_attrs_[i]);
       mxnet::TShape s = std::get<1>(key_attrs_[i]);
-      int type = std::get<2>(key_attrs_[i]);
-      auto& buf = merge_buf_[key];
+      int type        = std::get<2>(key_attrs_[i]);
+      auto& buf       = merge_buf_[key];
       // always use devs[0] as root
       buf.merged = NDArray(s, devs[0], false, type);
     }
@@ -507,11 +514,15 @@ class KVStoreNCCL : public KVStoreLocal {
 
   // Functions that enable templates to work on both references
   // and pointers
-  template<typename T>
-  const T * ptr(const T & obj) { return &obj; }
+  template <typename T>
+  const T* ptr(const T& obj) {
+    return &obj;
+  }
 
-  template<typename T>
-  const T * ptr(T * obj) { return obj; }
+  template <typename T>
+  const T* ptr(T* obj) {
+    return obj;
+  }
 
   // Find which element of the vector
   // corresponds to root dev_id
diff --git a/src/kvstore/kvstore_utils.cc b/src/kvstore/kvstore_utils.cc
index b53eca433e97..57cb0b058e2e 100644
--- a/src/kvstore/kvstore_utils.cc
+++ b/src/kvstore/kvstore_utils.cc
@@ -28,21 +28,19 @@
 namespace mxnet {
 namespace kvstore {
 
-template<>
-void UniqueImpl<cpu>(NDArray* workspace, mshadow::Stream<cpu> *s,
-                     const NDArray& out) {
+template <>
+void UniqueImpl<cpu>(NDArray* workspace, mshadow::Stream<cpu>* s, const NDArray& out) {
   const size_t num_elements = out.shape().Size();
   CHECK_EQ(out.storage_type(), kRowSparseStorage) << "row_sparse NDArray is expected";
   MSHADOW_IDX_TYPE_SWITCH(out.dtype(), IType, {
-    IType *dptr = out.data().dptr<IType>();
-    common::ParallelSort(dptr, dptr + num_elements,
-                         engine::OpenMP::Get()->GetRecommendedOMPThreadCount());
+    IType* dptr = out.data().dptr<IType>();
+    common::ParallelSort(
+        dptr, dptr + num_elements, engine::OpenMP::Get()->GetRecommendedOMPThreadCount());
     const size_t num_selected_out = std::unique(dptr, dptr + num_elements) - dptr;
     // set the shape of data/aux_data according to the number of unique values
     out.set_aux_shape(rowsparse::kIdx, mshadow::Shape1(num_selected_out));
   });
 }
 
-
 }  // namespace kvstore
 }  // namespace mxnet
diff --git a/src/kvstore/kvstore_utils.cu b/src/kvstore/kvstore_utils.cu
index bcecaea75fb6..bca6e7be36d5 100644
--- a/src/kvstore/kvstore_utils.cu
+++ b/src/kvstore/kvstore_utils.cu
@@ -40,68 +40,69 @@
 namespace mxnet {
 namespace kvstore {
 
-template<typename IType>
-size_t UniqueImplGPU(NDArray *workspace, mshadow::Stream<gpu> *s,
-                   IType *dptr, const size_t size, Context ctx) {
+template <typename IType>
+size_t UniqueImplGPU(NDArray* workspace,
+                     mshadow::Stream<gpu>* s,
+                     IType* dptr,
+                     const size_t size,
+                     Context ctx) {
   // estimate unique temp space. The first byte is reserved to store the number
   // of unique values selected
   const size_t num_selected_bytes = sizeof(size_t);
-  size_t unique_temp_bytes = 0;
-  size_t *null_ptr = nullptr;
-  size_t *null_dptr = nullptr;
-  cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-  cub::DeviceSelect::Unique(nullptr, unique_temp_bytes, null_dptr, null_dptr,
-                            null_ptr, size, stream);
+  size_t unique_temp_bytes        = 0;
+  size_t* null_ptr                = nullptr;
+  size_t* null_dptr               = nullptr;
+  cudaStream_t stream             = mshadow::Stream<gpu>::GetStream(s);
+  cub::DeviceSelect::Unique(
+      nullptr, unique_temp_bytes, null_dptr, null_dptr, null_ptr, size, stream);
   // estimate sort temp space
   const size_t sort_output_bytes = size * sizeof(IType);
-  size_t sort_temp_bytes = 0;
+  size_t sort_temp_bytes         = 0;
 #ifndef SORT_WITH_THRUST
   // The least-significant bit index (inclusive) needed for key comparison
   const int begin_bit = 0;
   // The most-significant bit index (exclusive) needed for key comparison
   const int end_bit = sizeof(IType) * 8;
-  cub::DeviceRadixSort::SortKeys(nullptr, sort_temp_bytes, null_dptr, null_dptr,
-                                 size, begin_bit, end_bit, stream);
+  cub::DeviceRadixSort::SortKeys(
+      nullptr, sort_temp_bytes, null_dptr, null_dptr, size, begin_bit, end_bit, stream);
 #else
   // sort_temp_bytes remains 0 because thrust request memory by itself
 #endif
   // request temp storage
-  const size_t total_workspace = num_selected_bytes + sort_output_bytes +
-                                 std::max(sort_temp_bytes, unique_temp_bytes);
-  *workspace = NDArray(mshadow::Shape1((total_workspace + 3) / 4), ctx, false);
+  const size_t total_workspace =
+      num_selected_bytes + sort_output_bytes + std::max(sort_temp_bytes, unique_temp_bytes);
+  *workspace           = NDArray(mshadow::Shape1((total_workspace + 3) / 4), ctx, false);
   char* workspace_dptr = reinterpret_cast<char*>(workspace->data().dptr_);
   // temp space layout: num_selected_ptr, sort_output_bytes, unique/sort_temp_storage
   size_t* num_selected_ptr = reinterpret_cast<size_t*>(workspace_dptr);
-  IType* sort_output_ptr = reinterpret_cast<IType*>(workspace_dptr + num_selected_bytes);
-  void *temp_storage = static_cast<void*>(workspace_dptr +
-                                          num_selected_bytes + sort_output_bytes);
+  IType* sort_output_ptr   = reinterpret_cast<IType*>(workspace_dptr + num_selected_bytes);
+  void* temp_storage = static_cast<void*>(workspace_dptr + num_selected_bytes + sort_output_bytes);
   // execute the sort kernel
 #ifndef SORT_WITH_THRUST
-  cub::DeviceRadixSort::SortKeys(temp_storage, sort_temp_bytes, dptr, sort_output_ptr,
-                                 size, begin_bit, end_bit, stream);
+  cub::DeviceRadixSort::SortKeys(
+      temp_storage, sort_temp_bytes, dptr, sort_output_ptr, size, begin_bit, end_bit, stream);
 #else
-  thrust::sort(thrust::cuda::par.on(stream),
-               dptr, dptr + size, thrust::greater<IType>());
-  CUDA_CALL(cudaMemcpyAsync(sort_output_ptr, dptr, sort_output_bytes,
-                            cudaMemcpyDeviceToDevice, stream));
+  thrust::sort(thrust::cuda::par.on(stream), dptr, dptr + size, thrust::greater<IType>());
+  CUDA_CALL(
+      cudaMemcpyAsync(sort_output_ptr, dptr, sort_output_bytes, cudaMemcpyDeviceToDevice, stream));
 #endif
   // execute unique kernel
-  cub::DeviceSelect::Unique(temp_storage, unique_temp_bytes, sort_output_ptr, dptr,
-                            num_selected_ptr, size, stream);
+  cub::DeviceSelect::Unique(
+      temp_storage, unique_temp_bytes, sort_output_ptr, dptr, num_selected_ptr, size, stream);
   // retrieve num selected unique values
   size_t num_selected_out = 0;
-  CUDA_CALL(cudaMemcpyAsync(&num_selected_out, num_selected_ptr, num_selected_bytes,
-                            cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      &num_selected_out, num_selected_ptr, num_selected_bytes, cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   return num_selected_out;
 }
 
-template<>
-void UniqueImpl<gpu>(NDArray *workspace, mshadow::Stream<gpu> *s, const NDArray &out) {
+template <>
+void UniqueImpl<gpu>(NDArray* workspace, mshadow::Stream<gpu>* s, const NDArray& out) {
   const size_t num_elements = out.shape().Size();
   CHECK_EQ(out.storage_type(), kRowSparseStorage) << "row_sparse NDArray is expected";
   MSHADOW_IDX_TYPE_SWITCH(out.dtype(), IType, {
-    IType *dptr = out.data().dptr<IType>();
+    IType* dptr             = out.data().dptr<IType>();
     size_t num_selected_out = UniqueImplGPU(workspace, s, dptr, num_elements, out.ctx());
     // set the shape of data/aux_data according to the number of unique values
     out.set_aux_shape(rowsparse::kIdx, mshadow::Shape1(num_selected_out));
diff --git a/src/kvstore/kvstore_utils.h b/src/kvstore/kvstore_utils.h
index 2527f7ed0ce2..53b77ee41f4f 100644
--- a/src/kvstore/kvstore_utils.h
+++ b/src/kvstore/kvstore_utils.h
@@ -33,7 +33,6 @@
 namespace mxnet {
 namespace kvstore {
 
-
 /*!
  * \brief compute unique and sorted values in a row_sparse ndarray.
  * \param workspace Temp workspace for computation. Its a pointer to a
@@ -43,8 +42,8 @@ namespace kvstore {
  * \param out Input and output ndarray. The ndarray stores the
  *            unique elements in out.data().
  */
-template<typename xpu>
-void UniqueImpl(NDArray* workspace, mshadow::Stream<xpu> *s, const NDArray& out);
+template <typename xpu>
+void UniqueImpl(NDArray* workspace, mshadow::Stream<xpu>* s, const NDArray& out);
 }  // namespace kvstore
 }  // namespace mxnet
 
diff --git a/src/kvstore/p3store_dist.h b/src/kvstore/p3store_dist.h
index 3c99515e27b1..d167a51248a9 100644
--- a/src/kvstore/p3store_dist.h
+++ b/src/kvstore/p3store_dist.h
@@ -39,8 +39,7 @@ namespace kvstore {
  */
 class P3StoreDist : public KVStoreDist {
  public:
-  explicit P3StoreDist(bool use_device_comm)
-      : KVStoreDist(use_device_comm) {
+  explicit P3StoreDist(bool use_device_comm) : KVStoreDist(use_device_comm) {
     slice_threshold_ = dmlc::GetEnv("MXNET_KVSTORE_SLICE_THRESHOLD", 40 * 1000);
   }
 
@@ -57,12 +56,12 @@ class P3StoreDist : public KVStoreDist {
   }
 
   void set_updater(const Updater& updater) final {
-      LOG(FATAL) << "NotImplementedError: Update on P3StoreDist is not supported. "
-          << "Please set MXNET_UPDATE_ON_KVSTORE to false.";
+    LOG(FATAL) << "NotImplementedError: Update on P3StoreDist is not supported. "
+               << "Please set MXNET_UPDATE_ON_KVSTORE to false.";
   }
 
-  void SetGradientCompression(const std::vector<std::pair<std::string, std::string>>
-                              & kwargs) final {
+  void SetGradientCompression(
+      const std::vector<std::pair<std::string, std::string>>& kwargs) final {
     LOG(FATAL) << "NotImplementedError: Gradient compression not supported in P3StoreDist.";
   }
 
@@ -75,141 +74,160 @@ class P3StoreDist : public KVStoreDist {
     EncodeDefaultKey(key, value.shape().Size(), mshadow::mshadow_sizeof(value.dtype()));
   }
 
-  void PushCompressed(int key, const NDArray& comm_buf, const PSKV& pskv,
-                      int priority) final {
+  void PushCompressed(int key, const NDArray& comm_buf, const PSKV& pskv, int priority) final {
     LOG(FATAL) << "NotImplementedError: PushCompressed not implemented in P3StoreDist.";
   }
 
-  void PushDefault(int key, const NDArray &send_buf, const PSKV& pskv,
-                   int priority) override {
-    auto push_to_servers = [this, key, pskv, send_buf, priority]
-      (RunContext rctx, Engine::CallbackOnComplete cb) {
-        const int dtype = send_buf.dtype();
-        // convert to ps keys
-        const size_t size = send_buf.shape().Size() * mshadow::mshadow_sizeof(dtype);
-        char* data = static_cast<char *>(send_buf.data().dptr_);
-        // do push. false means no delete
-        ps::SArray<char> vals(data, size, false);
-        int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
+  void PushDefault(int key, const NDArray& send_buf, const PSKV& pskv, int priority) override {
+    auto push_to_servers = [this, key, pskv, send_buf, priority](RunContext rctx,
+                                                                 Engine::CallbackOnComplete cb) {
+      const int dtype = send_buf.dtype();
+      // convert to ps keys
+      const size_t size = send_buf.shape().Size() * mshadow::mshadow_sizeof(dtype);
+      char* data        = static_cast<char*>(send_buf.data().dptr_);
+      // do push. false means no delete
+      ps::SArray<char> vals(data, size, false);
+      int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
 
-        size_t off = 0;
-        auto counter = new std::atomic<int>(pskv.keys.size());
-        for (size_t idx = 0; idx < pskv.keys.size(); idx++) {
-          auto ks = pskv.keys.segment(idx, idx+1);
-          auto ls = pskv.lens.segment(idx, idx+1);
-          auto vs = vals.segment(off, off + pskv.lens[idx]);
-          CHECK_NOTNULL(ps_worker_)->ZPush(
-            ks, vs, ls, cmd, [counter, cb]() {
-                if (--(*counter) == 0) {
-                  delete counter;
-                  cb();
-                }
-              }, priority);
-          off += pskv.lens[idx];
-        }
-      };
-    Engine::Get()->PushAsync(
-        push_to_servers,
-        pinned_ctx_,
-        {send_buf.var()},
-        {},
-        FnProperty::kNormal,
-        priority,
-        "P3StoreDistDefaultPush");
+      size_t off   = 0;
+      auto counter = new std::atomic<int>(pskv.keys.size());
+      for (size_t idx = 0; idx < pskv.keys.size(); idx++) {
+        auto ks = pskv.keys.segment(idx, idx + 1);
+        auto ls = pskv.lens.segment(idx, idx + 1);
+        auto vs = vals.segment(off, off + pskv.lens[idx]);
+        CHECK_NOTNULL(ps_worker_)
+            ->ZPush(
+                ks,
+                vs,
+                ls,
+                cmd,
+                [counter, cb]() {
+                  if (--(*counter) == 0) {
+                    delete counter;
+                    cb();
+                  }
+                },
+                priority);
+        off += pskv.lens[idx];
+      }
+    };
+    Engine::Get()->PushAsync(push_to_servers,
+                             pinned_ctx_,
+                             {send_buf.var()},
+                             {},
+                             FnProperty::kNormal,
+                             priority,
+                             "P3StoreDistDefaultPush");
   }
 
-  void PushRowSparse(int key, const NDArray &send_buf, int priority) override {
+  void PushRowSparse(int key, const NDArray& send_buf, int priority) override {
     LOG(FATAL) << "NotImplementedError: PushRowSparse not implemented in P3StoreDist.";
   }
 
-  void PullDefault(int key, const NDArray &recv_buf, int priority) override {
+  void PullDefault(int key, const NDArray& recv_buf, int priority) override {
     CHECK(gradient_compression_->get_type() == CompressionType::kNone)
-       << "Gradient compression not supported in P3StoreDist.";
-    auto pull_from_servers = [this, key, recv_buf, priority](
-        RunContext rctx, Engine::CallbackOnComplete cb) {
+        << "Gradient compression not supported in P3StoreDist.";
+    auto pull_from_servers = [this, key, recv_buf, priority](RunContext rctx,
+                                                             Engine::CallbackOnComplete cb) {
       // convert to ps keys
-      size_t size = recv_buf.shape().Size();
-      const int dtype = recv_buf.dtype();
+      size_t size         = recv_buf.shape().Size();
+      const int dtype     = recv_buf.dtype();
       const int num_bytes = mshadow::mshadow_sizeof(dtype);
-      PSKV& pskv = EncodeDefaultKey(key, size, num_bytes);
-      char* data = static_cast<char*> (recv_buf.data().dptr_);
+      PSKV& pskv          = EncodeDefaultKey(key, size, num_bytes);
+      char* data          = static_cast<char*>(recv_buf.data().dptr_);
       // issue pull
       const int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
-      size_t off = 0;
-      auto counter = new std::atomic<int>(pskv.keys.size());
+      size_t off    = 0;
+      auto counter  = new std::atomic<int>(pskv.keys.size());
       for (size_t idx = 0; idx < pskv.keys.size(); idx++) {
-        auto ks = pskv.keys.segment(idx, idx+1);
+        auto ks = pskv.keys.segment(idx, idx + 1);
         auto ls = new ps::SArray<int>(1, pskv.lens[idx]);
         auto vs = new ps::SArray<char>(data + off, pskv.lens[idx], false);
-        CHECK_NOTNULL(ps_worker_)->ZPull(
-          ks, vs, ls, cmd, [vs, ls, counter, cb]() {
-              delete vs;
-              delete ls;
-              if (--(*counter) == 0) {
-                delete counter;
-                cb();
-              }
-            }, priority);
+        CHECK_NOTNULL(ps_worker_)
+            ->ZPull(
+                ks,
+                vs,
+                ls,
+                cmd,
+                [vs, ls, counter, cb]() {
+                  delete vs;
+                  delete ls;
+                  if (--(*counter) == 0) {
+                    delete counter;
+                    cb();
+                  }
+                },
+                priority);
         off += pskv.lens[idx];
       }
     };
-    CHECK_NOTNULL(Engine::Get())->PushAsync(
-        pull_from_servers,
-        pinned_ctx_,
-        {},
-        {recv_buf.var()},
-        FnProperty::kNormal,
-        priority,
-        "P3StoreDistDefaultStoragePull");
+    CHECK_NOTNULL(Engine::Get())
+        ->PushAsync(pull_from_servers,
+                    pinned_ctx_,
+                    {},
+                    {recv_buf.var()},
+                    FnProperty::kNormal,
+                    priority,
+                    "P3StoreDistDefaultStoragePull");
   }
 
-  void PullRowSparse_(const int key, const NDArray& recv_buf,
-                      const NDArray& indices, int priority) override {
+  void PullRowSparse_(const int key,
+                      const NDArray& recv_buf,
+                      const NDArray& indices,
+                      int priority) override {
     LOG(FATAL) << "NotImplementedError: PullRowSparse not implemented in P3StoreDist.";
   }
 
-  void PushPullDefault(int key, const NDArray &comm_buf, int priority) override {
+  void PushPullDefault(int key, const NDArray& comm_buf, int priority) override {
     CHECK(gradient_compression_->get_type() == CompressionType::kNone)
-             << "Compression not supported in P3StoreDist";
-    auto pushpull = [this, key, comm_buf, priority](
-        RunContext rctx, Engine::CallbackOnComplete cb) {
-      size_t size = comm_buf.shape().Size();
-      const int dtype = comm_buf.dtype();
+        << "Compression not supported in P3StoreDist";
+    auto pushpull = [this, key, comm_buf, priority](RunContext rctx,
+                                                    Engine::CallbackOnComplete cb) {
+      size_t size         = comm_buf.shape().Size();
+      const int dtype     = comm_buf.dtype();
       const int num_bytes = mshadow::mshadow_sizeof(dtype);
-      const int cmd = GetCommandType(RequestType::kDefaultPushPull, dtype);
+      const int cmd       = GetCommandType(RequestType::kDefaultPushPull, dtype);
 
       PSKV& pskv = EncodeDefaultKey(key, size, num_bytes);
       char* data = static_cast<char*>(comm_buf.data().dptr_);
 
-      size_t off = 0;
+      size_t off   = 0;
       auto counter = new std::atomic<int>(pskv.keys.size());
       for (size_t idx = 0; idx < pskv.keys.size(); idx++) {
-        auto ks = pskv.keys.segment(idx, idx+1);
+        auto ks = pskv.keys.segment(idx, idx + 1);
         auto ls = new ps::SArray<int>(1, pskv.lens[idx]);
         auto vs = new ps::SArray<char>(data + off, pskv.lens[idx], false);
-        CHECK_NOTNULL(ps_worker_)->ZPushPull(
-          ks, *vs, vs, ls, cmd, [vs, ls, counter, cb]() {
-              delete vs;
-              delete ls;
-              if (--(*counter) == 0) {
-                delete counter;
-                cb();
-              }
-            }, priority);
+        CHECK_NOTNULL(ps_worker_)
+            ->ZPushPull(
+                ks,
+                *vs,
+                vs,
+                ls,
+                cmd,
+                [vs, ls, counter, cb]() {
+                  delete vs;
+                  delete ls;
+                  if (--(*counter) == 0) {
+                    delete counter;
+                    cb();
+                  }
+                },
+                priority);
         off += pskv.lens[idx];
       }
     };
-    CHECK_NOTNULL(Engine::Get())->PushAsync(
-        pushpull,
-        pinned_ctx_,
-        {},
-        {comm_buf.var()},
-        FnProperty::kNormal,
-        priority,
-        "P3StoreDistDefaultStoragePushPull");
+    CHECK_NOTNULL(Engine::Get())
+        ->PushAsync(pushpull,
+                    pinned_ctx_,
+                    {},
+                    {comm_buf.var()},
+                    FnProperty::kNormal,
+                    priority,
+                    "P3StoreDistDefaultStoragePushPull");
   }
 
-  inline PSKV& EncodeDefaultKey(const int key, const size_t num_arr_elems,
+  inline PSKV& EncodeDefaultKey(const int key,
+                                const size_t num_arr_elems,
                                 const int num_bytes) override {
     mu_.lock();
     PSKV& pskv = ps_kv_[key];
@@ -217,22 +235,21 @@ class P3StoreDist : public KVStoreDist {
     size_t pskv_size = num_arr_elems * num_bytes;
     if (!pskv.keys.empty()) {
       CHECK_EQ(static_cast<size_t>(pskv.size), pskv_size)
-        << "The value size cannot be changed " << pskv_size << ". Key is " << key;
+          << "The value size cannot be changed " << pskv_size << ". Key is " << key;
     } else {
-      auto krs = ps::Postoffice::Get()->GetServerKeyRanges();
+      auto krs              = ps::Postoffice::Get()->GetServerKeyRanges();
       const int num_servers = krs.size();
       CHECK_GT(num_servers, 0);
 
-      int64_t num_params = num_arr_elems * num_bytes;
-      int64_t slice_bound = slice_threshold_ * num_bytes;
+      int64_t num_params   = num_arr_elems * num_bytes;
+      int64_t slice_bound  = slice_threshold_ * num_bytes;
       static size_t server = 0;
       while (num_params > 0) {
-        ps::Key ps_key = krs[server%num_servers].begin()
-                         + (ps::Key)(key + server/num_servers);
-        CHECK_LT(ps_key, krs[server%num_servers].end());
+        ps::Key ps_key = krs[server % num_servers].begin() + (ps::Key)(key + server / num_servers);
+        CHECK_LT(ps_key, krs[server % num_servers].end());
         pskv.keys.push_back(ps_key);
-        const size_t part_size = static_cast<size_t>((num_params > slice_bound)
-                ? slice_bound : num_params);
+        const size_t part_size =
+            static_cast<size_t>((num_params > slice_bound) ? slice_bound : num_params);
         pskv.lens.push_back(part_size);
         pskv.size += part_size;
 
@@ -252,5 +269,4 @@ class P3StoreDist : public KVStoreDist {
 }  // namespace kvstore
 }  // namespace mxnet
 
-
 #endif  // MXNET_KVSTORE_P3STORE_DIST_H_
diff --git a/src/lib_api.cc b/src/lib_api.cc
index c0fea4ab3302..7bfa3a928b54 100644
--- a/src/lib_api.cc
+++ b/src/lib_api.cc
@@ -32,9 +32,9 @@
 #include "mxnet/lib_api.h"
 
 mxnet::ext::MXerrorMsgs* mxnet::ext::MXerrorMsgs::get() {
-    static MXerrorMsgs inst;
-    return &inst;
-  }
+  static MXerrorMsgs inst;
+  return &inst;
+}
 
 std::stringstream& mxnet::ext::MXerrorMsgs::add(const char* file, int line) {
   messages.emplace_back();
@@ -53,21 +53,34 @@ const std::string* mxnet::ext::MXerrorMsgs::get(int idx) {
 mxnet::ext::MXContext::MXContext() : dev_type("error"), dev_id(-1) {}
 
 mxnet::ext::MXContext::MXContext(std::string dev_type_, int dev_id_)
-  : dev_type(std::move(dev_type_)), dev_id(dev_id_) {}
+    : dev_type(std::move(dev_type_)), dev_id(dev_id_) {}
 
 mxnet::ext::MXContext::MXContext(const char* dev_type_, int dev_id_)
-  : dev_type(dev_type_), dev_id(dev_id_) {}
+    : dev_type(dev_type_), dev_id(dev_id_) {}
 
-mxnet::ext::MXContext mxnet::ext::MXContext::CPU() { return MXContext("cpu", 0); }
+mxnet::ext::MXContext mxnet::ext::MXContext::CPU() {
+  return MXContext("cpu", 0);
+}
 
-mxnet::ext::MXContext mxnet::ext::MXContext::GPU() { return MXContext("gpu", 0); }
+mxnet::ext::MXContext mxnet::ext::MXContext::GPU() {
+  return MXContext("gpu", 0);
+}
 
-mxnet::ext::MXContext mxnet::ext::MXContext::CPU(int dev_id) { return MXContext("cpu", dev_id); }
+mxnet::ext::MXContext mxnet::ext::MXContext::CPU(int dev_id) {
+  return MXContext("cpu", dev_id);
+}
 
-mxnet::ext::MXContext mxnet::ext::MXContext::GPU(int dev_id) { return MXContext("gpu", dev_id); }
+mxnet::ext::MXContext mxnet::ext::MXContext::GPU(int dev_id) {
+  return MXContext("gpu", dev_id);
+}
 
-void mxnet::ext::MXSparse::set(void *data_ptr, const int64_t* dims, int ndims, void *idx,
-                               int64_t num_idx, void *idx_ptr, int64_t num_idx_ptr) {
+void mxnet::ext::MXSparse::set(void* data_ptr,
+                               const int64_t* dims,
+                               int ndims,
+                               void* idx,
+                               int64_t num_idx,
+                               void* idx_ptr,
+                               int64_t num_idx_ptr) {
   data = data_ptr;
   // If CSR, num of non-zero elemets is num_idx,
   // If row sparse, num of elements is num_idx * width.
@@ -77,33 +90,54 @@ void mxnet::ext::MXSparse::set(void *data_ptr, const int64_t* dims, int ndims, v
       data_len *= dims[i];
   }
 
-  indices = reinterpret_cast<int64_t*>(idx);
+  indices     = reinterpret_cast<int64_t*>(idx);
   indices_len = num_idx;
 
   if (idx_ptr) {
-    indptr = reinterpret_cast<int64_t*>(idx_ptr);
+    indptr     = reinterpret_cast<int64_t*>(idx_ptr);
     indptr_len = num_idx_ptr;
   }
 }
 
-mxnet::ext::MXTensor::MXTensor() : data_ptr(nullptr), dtype(kUNSET), verID(0),
-                                   stype(kDefaultStorage) {}
-mxnet::ext::MXTensor::MXTensor(const MXTensor& oth) : data_ptr(oth.data_ptr), shape(oth.shape),
-                                                      dtype(oth.dtype), verID(oth.verID),
-                                                      ctx(oth.ctx), stype(oth.stype) {
+mxnet::ext::MXTensor::MXTensor()
+    : data_ptr(nullptr), dtype(kUNSET), verID(0), stype(kDefaultStorage) {}
+mxnet::ext::MXTensor::MXTensor(const MXTensor& oth)
+    : data_ptr(oth.data_ptr),
+      shape(oth.shape),
+      dtype(oth.dtype),
+      verID(oth.verID),
+      ctx(oth.ctx),
+      stype(oth.stype) {
   setDLTensor();
 }
 
-mxnet::ext::MXTensor::MXTensor(void *data_ptr, std::vector<int64_t> shape, MXDType dtype,
-                               size_t vID, MXContext mx_ctx, MXStorageType stype)
-  : data_ptr(data_ptr), shape(std::move(shape)), dtype(dtype), verID(vID), ctx(std::move(mx_ctx)),
-    stype(stype) {
+mxnet::ext::MXTensor::MXTensor(void* data_ptr,
+                               std::vector<int64_t> shape,
+                               MXDType dtype,
+                               size_t vID,
+                               MXContext mx_ctx,
+                               MXStorageType stype)
+    : data_ptr(data_ptr),
+      shape(std::move(shape)),
+      dtype(dtype),
+      verID(vID),
+      ctx(std::move(mx_ctx)),
+      stype(stype) {
   setDLTensor();
 }
 
-void mxnet::ext::MXTensor::setTensor(void *dptr, MXDType type, const int64_t* dims, int ndims,
-                                     size_t vID, MXContext mx_ctx, MXStorageType storage_type) {
-  data_ptr = dptr; dtype = type; verID = vID; ctx = mx_ctx; stype = storage_type;
+void mxnet::ext::MXTensor::setTensor(void* dptr,
+                                     MXDType type,
+                                     const int64_t* dims,
+                                     int ndims,
+                                     size_t vID,
+                                     MXContext mx_ctx,
+                                     MXStorageType storage_type) {
+  data_ptr = dptr;
+  dtype    = type;
+  verID    = vID;
+  ctx      = mx_ctx;
+  stype    = storage_type;
   shape.clear();
   for (int j = 0; j < ndims; j++) {
     shape.push_back(dims[j]);
@@ -112,12 +146,12 @@ void mxnet::ext::MXTensor::setTensor(void *dptr, MXDType type, const int64_t* di
 }
 
 void mxnet::ext::MXTensor::setDLTensor() {
-  dltensor.data = data_ptr;
-  dltensor.ndim = shape.size();
-  dltensor.shape = const_cast<int64_t*>(shape.data());
-  dltensor.strides = nullptr;
-  dltensor.byte_offset = 0;
-  dltensor.dtype.lanes = 1;
+  dltensor.data          = data_ptr;
+  dltensor.ndim          = shape.size();
+  dltensor.shape         = const_cast<int64_t*>(shape.data());
+  dltensor.strides       = nullptr;
+  dltensor.byte_offset   = 0;
+  dltensor.dtype.lanes   = 1;
   dltensor.ctx.device_id = ctx.dev_id;
   if (ctx.dev_type == "cpu")
     dltensor.ctx.device_type = kDLCPU;
@@ -136,72 +170,76 @@ void mxnet::ext::MXTensor::setDLTensor() {
   else
     dltensor.ctx.device_type = kDLExtDev;
   switch (dtype) {
-  case kFloat32:
-    dltensor.dtype.code = kDLFloat;
-    dltensor.dtype.bits = 32;
-    break;
-  case kFloat64:
-    dltensor.dtype.code = kDLFloat;
-    dltensor.dtype.bits = 64;
-    break;
-  case kFloat16:
-    dltensor.dtype.code = kDLFloat;
-    dltensor.dtype.bits = 16;
-    break;
-  case kUint8:
-    dltensor.dtype.code = kDLUInt;
-    dltensor.dtype.bits = 8;
-    break;
-  case kInt32:
-    dltensor.dtype.code = kDLInt;
-    dltensor.dtype.bits = 32;
-    break;
-  case kInt8:
-    dltensor.dtype.code = kDLInt;
-    dltensor.dtype.bits = 8;
-    break;
-  case kInt64:
-    dltensor.dtype.code = kDLInt;
-    dltensor.dtype.bits = 64;
-    break;
-  default:
-    dltensor.dtype.code = 0;
-    dltensor.dtype.bits = 0;
-    throw std::runtime_error("Error! Invalid dtype flag: "
-                             + std::to_string(static_cast<int>(dtype))
-                             + " when constructing MXTensor");
+    case kFloat32:
+      dltensor.dtype.code = kDLFloat;
+      dltensor.dtype.bits = 32;
+      break;
+    case kFloat64:
+      dltensor.dtype.code = kDLFloat;
+      dltensor.dtype.bits = 64;
+      break;
+    case kFloat16:
+      dltensor.dtype.code = kDLFloat;
+      dltensor.dtype.bits = 16;
+      break;
+    case kUint8:
+      dltensor.dtype.code = kDLUInt;
+      dltensor.dtype.bits = 8;
+      break;
+    case kInt32:
+      dltensor.dtype.code = kDLInt;
+      dltensor.dtype.bits = 32;
+      break;
+    case kInt8:
+      dltensor.dtype.code = kDLInt;
+      dltensor.dtype.bits = 8;
+      break;
+    case kInt64:
+      dltensor.dtype.code = kDLInt;
+      dltensor.dtype.bits = 64;
+      break;
+    default:
+      dltensor.dtype.code = 0;
+      dltensor.dtype.bits = 0;
+      throw std::runtime_error(
+          "Error! Invalid dtype flag: " + std::to_string(static_cast<int>(dtype)) +
+          " when constructing MXTensor");
   }
 }
 
 int64_t mxnet::ext::MXTensor::size() const {
   int64_t size = 1;
-  for (auto &s : shape)
+  for (auto& s : shape)
     size *= s;
   return size;
 }
 
-bool mxnet::ext::MXTensor::isSame(const MXTensor &oth) const {
-  return data_ptr == oth.data_ptr &&
-    dtype == oth.dtype &&
-    verID == oth.verID &&
-    ctx.dev_type == oth.ctx.dev_type &&
-    ctx.dev_id == oth.ctx.dev_id &&
-    shape == oth.shape &&
-    stype == oth.stype;
+bool mxnet::ext::MXTensor::isSame(const MXTensor& oth) const {
+  return data_ptr == oth.data_ptr && dtype == oth.dtype && verID == oth.verID &&
+         ctx.dev_type == oth.ctx.dev_type && ctx.dev_id == oth.ctx.dev_id && shape == oth.shape &&
+         stype == oth.stype;
 }
 
 mxnet::ext::PassResource::PassResource(std::unordered_map<std::string, MXTensor>* new_args,
                                        std::unordered_map<std::string, MXTensor>* new_aux,
-                                       nd_malloc_t nd_malloc, const void* nd_alloc)
-  : new_args_(new_args), new_aux_(new_aux), nd_malloc_(nd_malloc), nd_alloc_(nd_alloc) {}
+                                       nd_malloc_t nd_malloc,
+                                       const void* nd_alloc)
+    : new_args_(new_args), new_aux_(new_aux), nd_malloc_(nd_malloc), nd_alloc_(nd_alloc) {}
 
 mxnet::ext::MXTensor* mxnet::ext::PassResource::alloc_arg(const std::string& name,
                                                           const std::vector<int64_t>& shapes,
-                                                          const mxnet::ext::MXContext &ctx,
+                                                          const mxnet::ext::MXContext& ctx,
                                                           mxnet::ext::MXDType dtype) const {
   void* data;
-  nd_malloc_(nd_alloc_, shapes.data(), shapes.size(), ctx.dev_type.c_str(), ctx.dev_id,
-             dtype, name.c_str(), 1, &data);
+  nd_malloc_(nd_alloc_,
+             shapes.data(),
+             shapes.size(),
+             ctx.dev_type.c_str(),
+             ctx.dev_id,
+             dtype,
+             name.c_str(),
+             1,
+             &data);
   MXTensor tensor(data, shapes, dtype, 0, ctx, kDefaultStorage);
   (*new_args_)[name] = tensor;
   return &(new_args_->at(name));
@@ -209,24 +247,41 @@ mxnet::ext::MXTensor* mxnet::ext::PassResource::alloc_arg(const std::string& nam
 
 mxnet::ext::MXTensor* mxnet::ext::PassResource::alloc_aux(const std::string& name,
                                                           const std::vector<int64_t>& shapes,
-                                                          const mxnet::ext::MXContext &ctx,
+                                                          const mxnet::ext::MXContext& ctx,
                                                           mxnet::ext::MXDType dtype) const {
   void* data;
-  nd_malloc_(nd_alloc_, shapes.data(), shapes.size(), ctx.dev_type.c_str(), ctx.dev_id,
-             dtype, name.c_str(), 0, &data);
+  nd_malloc_(nd_alloc_,
+             shapes.data(),
+             shapes.size(),
+             ctx.dev_type.c_str(),
+             ctx.dev_id,
+             dtype,
+             name.c_str(),
+             0,
+             &data);
   MXTensor tensor(data, shapes, dtype, 0, ctx, kDefaultStorage);
   (*new_aux_)[name] = tensor;
   return &(new_aux_->at(name));
 }
 
-mxnet::ext::OpResource::OpResource(xpu_malloc_t cpu_malloc_fp, void* cpu_alloc_fp,
-                                   xpu_malloc_t gpu_malloc_fp, void* gpu_alloc_fp, void* stream,
-                                   sparse_malloc_t sparse_malloc_fp, void* sparse_alloc_fp,
-                                   void* rng_cpu_states, void* rng_gpu_states)
-  : cpu_malloc(cpu_malloc_fp), gpu_malloc(gpu_malloc_fp),
-    cpu_alloc(cpu_alloc_fp), gpu_alloc(gpu_alloc_fp), cuda_stream(stream),
-    sparse_malloc(sparse_malloc_fp), sparse_alloc(sparse_alloc_fp),
-    rand_cpu_states(rng_cpu_states), rand_gpu_states(rng_gpu_states) {}
+mxnet::ext::OpResource::OpResource(xpu_malloc_t cpu_malloc_fp,
+                                   void* cpu_alloc_fp,
+                                   xpu_malloc_t gpu_malloc_fp,
+                                   void* gpu_alloc_fp,
+                                   void* stream,
+                                   sparse_malloc_t sparse_malloc_fp,
+                                   void* sparse_alloc_fp,
+                                   void* rng_cpu_states,
+                                   void* rng_gpu_states)
+    : cpu_malloc(cpu_malloc_fp),
+      gpu_malloc(gpu_malloc_fp),
+      cpu_alloc(cpu_alloc_fp),
+      gpu_alloc(gpu_alloc_fp),
+      cuda_stream(stream),
+      sparse_malloc(sparse_malloc_fp),
+      sparse_alloc(sparse_alloc_fp),
+      rand_cpu_states(rng_cpu_states),
+      rand_gpu_states(rng_gpu_states) {}
 
 void* mxnet::ext::OpResource::alloc_cpu(int size) const {
   return cpu_malloc(cpu_alloc, size);
@@ -236,10 +291,17 @@ void* mxnet::ext::OpResource::alloc_gpu(int size) const {
   return gpu_malloc(gpu_alloc, size);
 }
 
-void mxnet::ext::OpResource::alloc_sparse(mxnet::ext::MXSparse* sparse, int index,
-                                          int indices_len, int indptr_len) const {
-  sparse_malloc(sparse_alloc, index, indices_len, indptr_len,
-                &(sparse->data), &(sparse->indices), &(sparse->indptr));
+void mxnet::ext::OpResource::alloc_sparse(mxnet::ext::MXSparse* sparse,
+                                          int index,
+                                          int indices_len,
+                                          int indptr_len) const {
+  sparse_malloc(sparse_alloc,
+                index,
+                indices_len,
+                indptr_len,
+                &(sparse->data),
+                &(sparse->indices),
+                &(sparse->indptr));
 }
 
 mxnet::ext::mx_cpu_rand_t* mxnet::ext::OpResource::get_cpu_rand_states() const {
@@ -249,50 +311,57 @@ mxnet::ext::mx_cpu_rand_t* mxnet::ext::OpResource::get_cpu_rand_states() const {
 std::string mxnet::ext::getShapeAt(const std::string& shape, unsigned index) {
   int idx = 1;  // start at 1 to skip the first square bracket [
   // find the beginning of the output shape for the particular output index
-  for (unsigned x=0; x < index; x++)
-    idx = shape.find('[', idx+1);
+  for (unsigned x = 0; x < index; x++)
+    idx = shape.find('[', idx + 1);
   int stop = shape.find(']', idx);  // find stop index for this output shape
   // add this shape to the list
-  return shape.substr(idx, stop-idx+1);
+  return shape.substr(idx, stop - idx + 1);
 }
 
 std::string mxnet::ext::getDtypeAt(const std::string& dtype, unsigned index) {
   // find the beginning of the output dtype for the particular output index
   int idx = 0;
-  for (unsigned x=0; x < index; x++)
-    idx = dtype.find(',', idx+1);
-  int stop = dtype.find(',', idx+1);  // find stop index for this output dtype
-  if (stop == -1) stop = dtype.find(']', idx+1);
-  return dtype.substr(idx+1, stop-idx-1);
+  for (unsigned x = 0; x < index; x++)
+    idx = dtype.find(',', idx + 1);
+  int stop = dtype.find(',', idx + 1);  // find stop index for this output dtype
+  if (stop == -1)
+    stop = dtype.find(']', idx + 1);
+  return dtype.substr(idx + 1, stop - idx - 1);
 }
 
 mxnet::ext::JsonVal::JsonVal() : type(ERR), num(-1), str("") {}
 mxnet::ext::JsonVal::JsonVal(mxnet::ext::JsonType t) : type(t), num(-1), str("") {}
 mxnet::ext::JsonVal::JsonVal(std::string s) : type(STR), num(-1), str(std::move(s)) {}
 mxnet::ext::JsonVal::JsonVal(int n) : type(NUM), num(n), str(std::to_string(n)) {}
-mxnet::ext::JsonVal::JsonVal(JsonType t, int n, std::string s) : type(t), num(n),
-                                                                 str(std::move(s)) {}
+mxnet::ext::JsonVal::JsonVal(JsonType t, int n, std::string s)
+    : type(t), num(n), str(std::move(s)) {}
 
-bool mxnet::ext::JsonVal::operator<(const mxnet::ext::JsonVal &o) const {
+bool mxnet::ext::JsonVal::operator<(const mxnet::ext::JsonVal& o) const {
   // for string JSON objects compare the string
-  if (type == STR) return type == o.type && str < o.str;
+  if (type == STR)
+    return type == o.type && str < o.str;
   // for number JSON objects compare the number
-  if (type == NUM) return type == o.type && num < o.num;
+  if (type == NUM)
+    return type == o.type && num < o.num;
   // for list JSON objects, compare the size of list, and then each object in the list
   if (type == LIST) {
-    if (list.size() != o.list.size()) return false;
-    for (unsigned int i=0; i< list.size(); i++)
+    if (list.size() != o.list.size())
+      return false;
+    for (unsigned int i = 0; i < list.size(); i++)
       if (list[i] < o.list[i])
         return false;  // if we find an object that doesnt match return
-    return true;  // all objects in lists matched
+    return true;       // all objects in lists matched
   }
   // for map JSON objects, compare the size of map, and then each key/value in the maps
   if (type == MAP) {
-    if (map.size() != o.map.size()) return false;
-    for (auto &item : map) {
+    if (map.size() != o.map.size())
+      return false;
+    for (auto& item : map) {
       // if one map is missing a key in another return
-      if (o.map.find(item.first) == o.map.end()) return false;
-      if (item.second < o.map.at(item.first)) return false;
+      if (o.map.find(item.first) == o.map.end())
+        return false;
+      if (item.second < o.map.at(item.first))
+        return false;
     }
     return true;
   }
@@ -302,35 +371,35 @@ bool mxnet::ext::JsonVal::operator<(const mxnet::ext::JsonVal &o) const {
 std::string mxnet::ext::JsonVal::dump() const {
   std::string ret;
   switch (type) {
-  case ERR:
-    ret = "json(Error)";
-    break;
-  case STR:
-    ret = "\"" + str + "\"";
-    break;
-  case NUM:
-    ret = str;
-    break;
-  case LIST:
-    ret = "[";
-    for (unsigned i=0; i < list.size(); i++) {
-      auto &item = list[i];
-      ret += item.dump();
-      if (i < list.size()-1)
-        ret += ",";
-    }
-    ret += "]";
-    break;
-  case MAP:
-    ret = "{";
-    unsigned cnt = 0;
-    for (auto &item : map) {
-      ret += item.first.dump() + " : " + item.second.dump();
-      if (cnt++ < map.size()-1)
-        ret += ",";
-    }
-    ret += "}";
-    break;
+    case ERR:
+      ret = "json(Error)";
+      break;
+    case STR:
+      ret = "\"" + str + "\"";
+      break;
+    case NUM:
+      ret = str;
+      break;
+    case LIST:
+      ret = "[";
+      for (unsigned i = 0; i < list.size(); i++) {
+        auto& item = list[i];
+        ret += item.dump();
+        if (i < list.size() - 1)
+          ret += ",";
+      }
+      ret += "]";
+      break;
+    case MAP:
+      ret          = "{";
+      unsigned cnt = 0;
+      for (auto& item : map) {
+        ret += item.first.dump() + " : " + item.second.dump();
+        if (cnt++ < map.size() - 1)
+          ret += ",";
+      }
+      ret += "}";
+      break;
   }
   return ret;
 }
@@ -343,8 +412,8 @@ mxnet::ext::JsonVal mxnet::ext::JsonVal::parse(const std::string& json) {
 mxnet::ext::JsonVal mxnet::ext::JsonVal::parse_string(const std::string& json, unsigned int* idx) {
   JsonVal ret(STR);
   while (*idx < json.size()) {
-    if (json[*idx] == '"' && (ret.str.size() == 0 ||
-                              (ret.str.size() > 0 && ret.str.back() != '\\'))) {
+    if (json[*idx] == '"' &&
+        (ret.str.size() == 0 || (ret.str.size() > 0 && ret.str.back() != '\\'))) {
       ++(*idx);
       return ret;
     } else {
@@ -398,7 +467,7 @@ mxnet::ext::JsonVal mxnet::ext::JsonVal::parse_map(const std::string& json, unsi
         key = item;
       } else {
         ret.map[key] = item;
-        key.type = ERR;
+        key.type     = ERR;
       }
     }
   }
@@ -406,7 +475,7 @@ mxnet::ext::JsonVal mxnet::ext::JsonVal::parse_map(const std::string& json, unsi
   return mxnet::ext::JsonVal();
 }
 
-mxnet::ext::JsonVal mxnet::ext::JsonVal::parse(const std::string& json, unsigned int *idx) {
+mxnet::ext::JsonVal mxnet::ext::JsonVal::parse(const std::string& json, unsigned int* idx) {
   JsonVal ret;
   while (*idx < json.size()) {
     if (json[*idx] == '"') {
@@ -420,8 +489,11 @@ mxnet::ext::JsonVal mxnet::ext::JsonVal::parse(const std::string& json, unsigned
     } else if (json[*idx] == '{') {
       ++(*idx);
       ret = JsonVal::parse_map(json, idx);
-    } else if (json[*idx] == ']' || json[*idx] == '}') {return ret;}
-    if (ret.type != ERR) return ret;
+    } else if (json[*idx] == ']' || json[*idx] == '}') {
+      return ret;
+    }
+    if (ret.type != ERR)
+      return ret;
     ++(*idx);
   }
   return ret;
@@ -430,44 +502,50 @@ mxnet::ext::JsonVal mxnet::ext::JsonVal::parse(const std::string& json, unsigned
 std::string mxnet::ext::JsonVal::toString() const {
   std::string ret;
   switch (type) {
-  case ERR:
-    ret = "json(Error)";
-    break;
-  case STR:
-    ret = "json(STR:" + str + ")";
-    break;
-  case NUM:
-    ret = "json(INT:" + str + ")";
-    break;
-  case LIST:
-    ret = "json(LIST:[";
-    for (auto &item : list)
-      ret += item.toString() + ",";
-    ret += "])";
-    break;
-  case MAP:
-    ret = "json(MAP:{";
-    for (auto &item : map)
-      ret += item.first.toString() + " : " + item.second.toString() + ",";
-    ret += "})";
-    break;
+    case ERR:
+      ret = "json(Error)";
+      break;
+    case STR:
+      ret = "json(STR:" + str + ")";
+      break;
+    case NUM:
+      ret = "json(INT:" + str + ")";
+      break;
+    case LIST:
+      ret = "json(LIST:[";
+      for (auto& item : list)
+        ret += item.toString() + ",";
+      ret += "])";
+      break;
+    case MAP:
+      ret = "json(MAP:{";
+      for (auto& item : map)
+        ret += item.first.toString() + " : " + item.second.toString() + ",";
+      ret += "})";
+      break;
   }
   return ret;
 }
 
-mxnet::ext::Node::Node() {tensor = nullptr;}
+mxnet::ext::Node::Node() {
+  tensor = nullptr;
+}
 
-void mxnet::ext::Node::_setPassResource(mxnet::ext::PassResource* res_) {res = res_;}
+void mxnet::ext::Node::_setPassResource(mxnet::ext::PassResource* res_) {
+  res = res_;
+}
 
 void mxnet::ext::Node::alloc_arg(const std::vector<int64_t>& shapes,
-                                 const mxnet::ext::MXContext &ctx, mxnet::ext::MXDType dtype) {
+                                 const mxnet::ext::MXContext& ctx,
+                                 mxnet::ext::MXDType dtype) {
   if (!res)
     throw std::runtime_error("Node not initialized. Cannot use alloc_arg outside of graph passes.");
   tensor = res->alloc_arg(name, shapes, ctx, dtype);
 }
 
 void mxnet::ext::Node::alloc_aux(const std::vector<int64_t>& shapes,
-                                 const mxnet::ext::MXContext &ctx, mxnet::ext::MXDType dtype) {
+                                 const mxnet::ext::MXContext& ctx,
+                                 mxnet::ext::MXDType dtype) {
   if (!res)
     throw std::runtime_error("Node not initialized. Cannot use alloc_aux outside of graph passes.");
   tensor = res->alloc_aux(name, shapes, ctx, dtype);
@@ -476,7 +554,7 @@ void mxnet::ext::Node::alloc_aux(const std::vector<int64_t>& shapes,
 mxnet::ext::Graph::Graph() : res(nullptr) {}
 
 mxnet::ext::Graph::~Graph() {
-  for (auto &node : nodes)
+  for (auto& node : nodes)
     delete node;
 }
 
@@ -488,7 +566,7 @@ mxnet::ext::Graph* mxnet::ext::Graph::fromString(const std::string& json) {
 mxnet::ext::Graph* mxnet::ext::Graph::fromJson(mxnet::ext::JsonVal val) {
   // get nodes list
   JsonVal nodes = val.map[JsonVal("nodes")];
-  Graph *g = new Graph();
+  Graph* g      = new Graph();
 
   std::map<int, Node*> nodeMap;
   // loop over nodes
@@ -498,7 +576,7 @@ mxnet::ext::Graph* mxnet::ext::Graph::fromJson(mxnet::ext::JsonVal val) {
     JsonVal node = nodes.list[i];
 
     // set the op info
-    n->op = node.map[JsonVal("op")].str;
+    n->op   = node.map[JsonVal("op")].str;
     n->name = node.map[JsonVal("name")].str;
 
     // if op is null it is an input to the graph
@@ -514,7 +592,7 @@ mxnet::ext::Graph* mxnet::ext::Graph::fromJson(mxnet::ext::JsonVal val) {
     // set subgraphs, parsing each into a graph
     if (node.map.count(JsonVal("subgraphs")) > 0) {
       JsonVal subgraphs = node.map[JsonVal("subgraphs")];
-      for (auto &subgraph : subgraphs.list) {
+      for (auto& subgraph : subgraphs.list) {
         n->subgraphs.push_back(fromJson(subgraph));
       }
     }
@@ -523,7 +601,7 @@ mxnet::ext::Graph* mxnet::ext::Graph::fromJson(mxnet::ext::JsonVal val) {
     JsonVal node_inputs = node.map[JsonVal("inputs")];
     n->inputs.resize(node_inputs.list.size());
     for (int j = 0; j < node_inputs.list.size(); j++) {
-      JsonVal input = node_inputs.list[j];
+      JsonVal input    = node_inputs.list[j];
       NodeEntry& entry = n->inputs[j];
       // get pointer to other node
       entry.node = nodeMap[input.list[0].num];
@@ -539,17 +617,15 @@ mxnet::ext::Graph* mxnet::ext::Graph::fromJson(mxnet::ext::JsonVal val) {
   JsonVal& heads = val.map[JsonVal("heads")];
   g->outputs.resize(heads.list.size());
   for (int i = 0; i < heads.list.size(); i++) {
-    JsonVal head = heads.list[i];
-    g->outputs[i].node = nodeMap[head.list[0].num];
+    JsonVal head        = heads.list[i];
+    g->outputs[i].node  = nodeMap[head.list[0].num];
     g->outputs[i].entry = head.list[1].num;
   }
 
   // add all attributes to the graph
   for (auto& kv : val.map) {
-    if (kv.first.str.compare("nodes") != 0 &&
-        kv.first.str.compare("heads") != 0 &&
-        kv.first.str.compare("node_row_ptr") != 0 &&
-        kv.first.str.compare("arg_nodes") != 0) {
+    if (kv.first.str.compare("nodes") != 0 && kv.first.str.compare("heads") != 0 &&
+        kv.first.str.compare("node_row_ptr") != 0 && kv.first.str.compare("arg_nodes") != 0) {
       g->attrs[kv.first.str] = kv.second;
     }
   }
@@ -571,25 +647,25 @@ mxnet::ext::JsonVal mxnet::ext::Graph::toJson() const {
   std::vector<Node*> sorted = topological_sort();
   // nodes are in reverse topological order in the vector (back is first)
   // so loop from end to front over the vector 'sorted'
-  for (int i = sorted.size()-1; i >= 0; i--) {
-    nodeMap[sorted[i]] = sorted.size()-1-i;
+  for (int i = sorted.size() - 1; i >= 0; i--) {
+    nodeMap[sorted[i]] = sorted.size() - 1 - i;
   }
 
   // create node_row_ptr entry
   val.map[JsonVal("node_row_ptr")] = JsonVal(LIST);
-  JsonVal& node_row_ptr = val.map[JsonVal("node_row_ptr")];
+  JsonVal& node_row_ptr            = val.map[JsonVal("node_row_ptr")];
   for (int i = 0; i < nodes.size(); i++)
     node_row_ptr.list.emplace_back(i);
 
   // add all input nodes
   val.map[JsonVal("arg_nodes")] = JsonVal(LIST);
-  JsonVal& arg_nodes = val.map[JsonVal("arg_nodes")];
-  for (auto &input : inputs)
+  JsonVal& arg_nodes            = val.map[JsonVal("arg_nodes")];
+  for (auto& input : inputs)
     arg_nodes.list.emplace_back(nodeMap[input]);
 
   // add all output nodes
   val.map[JsonVal("heads")] = JsonVal(LIST);
-  JsonVal& heads = val.map[JsonVal("heads")];
+  JsonVal& heads            = val.map[JsonVal("heads")];
   for (int i = 0; i < outputs.size(); i++) {
     heads.list.emplace_back(LIST);
     JsonVal& out = heads.list[i];
@@ -600,15 +676,15 @@ mxnet::ext::JsonVal mxnet::ext::Graph::toJson() const {
 
   // add all graph nodes
   val.map[JsonVal("nodes")] = JsonVal(LIST);
-  JsonVal& nodes_ = val.map[JsonVal("nodes")];
-  for (int i = sorted.size()-1; i >= 0; i--) {
+  JsonVal& nodes_           = val.map[JsonVal("nodes")];
+  for (int i = sorted.size() - 1; i >= 0; i--) {
     // each node is a map
     nodes_.list.emplace_back(MAP);
-    Node* n = sorted[i];
-    JsonVal& n_ = nodes_.list[nodes_.list.size()-1];
+    Node* n     = sorted[i];
+    JsonVal& n_ = nodes_.list[nodes_.list.size() - 1];
 
-    n_.map[JsonVal("op")] = JsonVal(n->op);
-    n_.map[JsonVal("name")] = JsonVal(n->name);
+    n_.map[JsonVal("op")]     = JsonVal(n->op);
+    n_.map[JsonVal("name")]   = JsonVal(n->name);
     n_.map[JsonVal("inputs")] = JsonVal(LIST);
 
     // add inputs for this node
@@ -616,7 +692,7 @@ mxnet::ext::JsonVal mxnet::ext::Graph::toJson() const {
     for (int j = 0; j < n->inputs.size(); j++) {
       inputs_.list.emplace_back(LIST);
       NodeEntry& entry = n->inputs[j];
-      JsonVal& in = inputs_.list[j];
+      JsonVal& in      = inputs_.list[j];
       in.list.emplace_back(nodeMap[entry.node]);
       in.list.emplace_back(entry.entry);
       in.list.emplace_back(0);
@@ -625,15 +701,15 @@ mxnet::ext::JsonVal mxnet::ext::Graph::toJson() const {
     // add subgraphs for this node, convert each back to JSON
     if (n->subgraphs.size() > 0) {
       n_.map[JsonVal("subgraphs")] = JsonVal(LIST);
-      JsonVal &subgraphs_ = n_.map[JsonVal("subgraphs")];
-      for (Graph *subgraph : n->subgraphs) {
+      JsonVal& subgraphs_          = n_.map[JsonVal("subgraphs")];
+      for (Graph* subgraph : n->subgraphs) {
         subgraphs_.list.push_back(subgraph->toJson());
       }
     }
 
     // add attributes for this node
     n_.map[JsonVal("attrs")] = JsonVal(MAP);
-    JsonVal& attrs_ = n_.map[JsonVal("attrs")];
+    JsonVal& attrs_          = n_.map[JsonVal("attrs")];
     for (auto& kv : n->attrs) {
       attrs_.map[JsonVal(kv.first)] = JsonVal(kv.second);
     }
@@ -646,8 +722,9 @@ std::string mxnet::ext::Graph::toString() const {
   return toJson().dump();
 }
 
-  /* \brief visits a node "n" */
-void mxnet::ext::Graph::_dfs_util(Node* n, std::unordered_set<mxnet::ext::Node*>* to_visit,
+/* \brief visits a node "n" */
+void mxnet::ext::Graph::_dfs_util(Node* n,
+                                  std::unordered_set<mxnet::ext::Node*>* to_visit,
                                   std::function<void(mxnet::ext::Node*)> handler) const {
   to_visit->erase(n);  // remove node now that we're visiting it
   for (NodeEntry& e : n->outputs) {
@@ -687,31 +764,30 @@ std::vector<mxnet::ext::Node*> mxnet::ext::Graph::topological_sort() const {
 /* \brief print out graph details */
 void mxnet::ext::Graph::print(int indent) const {
   std::string space = "";
-  for (int i = 0; i < indent; i++) space+=" ";
+  for (int i = 0; i < indent; i++)
+    space += " ";
 
   std::cout << space << "########### Graph #############" << std::endl;
   std::cout << space << "attributes: " << std::endl;
-  for (auto &kv : attrs)
+  for (auto& kv : attrs)
     std::cout << space << "\t" << kv.first << " : " << kv.second.str << std::endl;
   std::cout << space << "inputs: " << inputs.size() << std::endl;
   std::cout << space << "outputs: " << outputs.size() << std::endl;
   std::cout << space << "nodes: " << nodes.size() << std::endl;
   std::vector<mxnet::ext::Node*> sorted = topological_sort();
   // loop over each node and print out its inputs/outputs
-  for (int i = sorted.size()-1; i >= 0; i--) {
+  for (int i = sorted.size() - 1; i >= 0; i--) {
     std::cout << space << "Node: " << sorted[i]->name << std::endl;
-    for (auto &input : sorted[i]->inputs) {
-      std::cout << space << "\tInput: " << input.node->name << " "
-                << input.entry << std::endl;
+    for (auto& input : sorted[i]->inputs) {
+      std::cout << space << "\tInput: " << input.node->name << " " << input.entry << std::endl;
     }
-    for (auto &output : sorted[i]->outputs) {
-      std::cout << space << "\tOutput: " << output.node->name << " "
-                << output.entry << std::endl;
+    for (auto& output : sorted[i]->outputs) {
+      std::cout << space << "\tOutput: " << output.node->name << " " << output.entry << std::endl;
     }
     if (sorted[i]->subgraphs.size() > 0) {
-      for (auto &subgraph : sorted[i]->subgraphs) {
+      for (auto& subgraph : sorted[i]->subgraphs) {
         std::cout << space << "\tSubgraph:" << std::endl;
-        subgraph->print(indent+2);
+        subgraph->print(indent + 2);
       }
     }
   }
@@ -723,7 +799,7 @@ mxnet::ext::Node* mxnet::ext::Graph::addNode(const std::string& name, const std:
   Node* n = new Node();
   nodes.push_back(n);
   n->name = name;
-  n->op = op;
+  n->op   = op;
   if (res)
     n->_setPassResource(res);
   return n;
@@ -775,8 +851,13 @@ void mxnet::ext::Graph::_setParams(std::unordered_map<std::string, mxnet::ext::M
 }
 
 mxnet::ext::CustomOp::CustomOp(const char* op_name)
-  : name(op_name), parse_attrs(nullptr), infer_type(nullptr), infer_storage_type(nullptr),
-    infer_shape(nullptr), mutate_inputs(nullptr), isSGop(false) {}
+    : name(op_name),
+      parse_attrs(nullptr),
+      infer_type(nullptr),
+      infer_storage_type(nullptr),
+      infer_shape(nullptr),
+      mutate_inputs(nullptr),
+      isSGop(false) {}
 
 mxnet::ext::CustomOp& mxnet::ext::CustomOp::setForward(mxnet::ext::fcomp_t fcomp, const char* ctx) {
   if (forward_ctx_map.count(ctx) > 0)
@@ -849,8 +930,8 @@ void mxnet::ext::CustomOp::mapToVector() {
 void mxnet::ext::CustomOp::raiseDuplicateContextError() {
   std::string op_name_str(name);
   throw std::runtime_error(
-    "Error! Error! Cannot register multiple functions under same context for operator '"
-    + op_name_str + "'");
+      "Error! Error! Cannot register multiple functions under same context for operator '" +
+      op_name_str + "'");
 }
 
 mxnet::ext::CustomStatefulOp::CustomStatefulOp() : ignore_warn(false), created(false) {}
@@ -861,16 +942,14 @@ mxnet::ext::CustomStatefulOpWrapper::~CustomStatefulOpWrapper() {
 }
 
 mxnet::ext::CustomPass::CustomPass() : name("ERROR") {}
-mxnet::ext::CustomPass::CustomPass(const char* pass_name)
-  : name(pass_name) {}
+mxnet::ext::CustomPass::CustomPass(const char* pass_name) : name(pass_name) {}
 mxnet::ext::CustomPass& mxnet::ext::CustomPass::setBody(graphPass_t fn) {
   pass = fn;
   return *this;
 }
 
 mxnet::ext::CustomPartitioner::CustomPartitioner() : name("ERROR") {}
-mxnet::ext::CustomPartitioner::CustomPartitioner(const char* backend_name) :
-  name(backend_name) {}
+mxnet::ext::CustomPartitioner::CustomPartitioner(const char* backend_name) : name(backend_name) {}
 
 mxnet::ext::CustomPartitioner& mxnet::ext::CustomPartitioner::addStrategy(const char* prop_name,
                                                                           const char* sg_name) {
@@ -879,20 +958,23 @@ mxnet::ext::CustomPartitioner& mxnet::ext::CustomPartitioner::addStrategy(const
   return *this;
 }
 
-mxnet::ext::CustomPartitioner& mxnet::ext::CustomPartitioner::setSupportedOps(const char* prop_name,
-                                                                    mxnet::ext::supportedOps_t fn) {
+mxnet::ext::CustomPartitioner& mxnet::ext::CustomPartitioner::setSupportedOps(
+    const char* prop_name,
+    mxnet::ext::supportedOps_t fn) {
   supported_map[std::string(prop_name)] = fn;
   return *this;
 }
 
 mxnet::ext::CustomPartitioner& mxnet::ext::CustomPartitioner::setCreateSelector(
-                                           const char* prop_name, mxnet::ext::createSelector_t fn) {
+    const char* prop_name,
+    mxnet::ext::createSelector_t fn) {
   selector_map[std::string(prop_name)] = fn;
   return *this;
 }
 
 mxnet::ext::CustomPartitioner& mxnet::ext::CustomPartitioner::setReviewSubgraph(
-                                           const char* prop_name, mxnet::ext::reviewSubgraph_t fn) {
+    const char* prop_name,
+    mxnet::ext::reviewSubgraph_t fn) {
   review_map[std::string(prop_name)] = fn;
   return *this;
 }
@@ -932,31 +1014,40 @@ MX_INT_RET _opRegSize() {
 }
 
 /*! \brief returns operator registration at specified index */
-MX_VOID_RET _opRegGet(int idx, const char** name, int *isSGop,
-                      const char*** forward_ctx, mxnet::ext::fcomp_t** forward_fp,
-                      int* forward_count, const char*** backward_ctx,
-                      mxnet::ext::fcomp_t** backward_fp, int* backward_count,
-                      const char*** create_op_ctx, mxnet::ext::createOpState_t** create_op_fp,
-                      int* create_op_count, mxnet::ext::parseAttrs_t* parse,
-                      mxnet::ext::inferType_t* type, mxnet::ext::inferSType_t* stype,
-                      mxnet::ext::inferShape_t* shape, mxnet::ext::mutateInputs_t* mutate) {
-  mxnet::ext::CustomOp &op = mxnet::ext::Registry<mxnet::ext::CustomOp>::get()->get(idx);
-  *name = op.name;
-  *parse = op.parse_attrs;
-  *type = op.infer_type;
-  *stype = op.infer_storage_type;
-  *shape = op.infer_shape;
-  *mutate = op.mutate_inputs;
-  *isSGop = op.isSGop;
+MX_VOID_RET _opRegGet(int idx,
+                      const char** name,
+                      int* isSGop,
+                      const char*** forward_ctx,
+                      mxnet::ext::fcomp_t** forward_fp,
+                      int* forward_count,
+                      const char*** backward_ctx,
+                      mxnet::ext::fcomp_t** backward_fp,
+                      int* backward_count,
+                      const char*** create_op_ctx,
+                      mxnet::ext::createOpState_t** create_op_fp,
+                      int* create_op_count,
+                      mxnet::ext::parseAttrs_t* parse,
+                      mxnet::ext::inferType_t* type,
+                      mxnet::ext::inferSType_t* stype,
+                      mxnet::ext::inferShape_t* shape,
+                      mxnet::ext::mutateInputs_t* mutate) {
+  mxnet::ext::CustomOp& op = mxnet::ext::Registry<mxnet::ext::CustomOp>::get()->get(idx);
+  *name                    = op.name;
+  *parse                   = op.parse_attrs;
+  *type                    = op.infer_type;
+  *stype                   = op.infer_storage_type;
+  *shape                   = op.infer_shape;
+  *mutate                  = op.mutate_inputs;
+  *isSGop                  = op.isSGop;
   op.mapToVector();
-  *forward_ctx = op.forward_ctx_cstr.data();
-  *forward_fp = op.forward_fp.data();
-  *forward_count = op.forward_fp.size();
-  *backward_ctx = op.backward_ctx_cstr.data();
-  *backward_fp = op.backward_fp.data();
-  *backward_count = op.backward_fp.size();
-  *create_op_ctx = op.create_op_ctx_cstr.data();
-  *create_op_fp = op.create_op_fp.data();
+  *forward_ctx     = op.forward_ctx_cstr.data();
+  *forward_fp      = op.forward_fp.data();
+  *forward_count   = op.forward_fp.size();
+  *backward_ctx    = op.backward_ctx_cstr.data();
+  *backward_fp     = op.backward_fp.data();
+  *backward_count  = op.backward_fp.size();
+  *create_op_ctx   = op.create_op_ctx_cstr.data();
+  *create_op_fp    = op.create_op_fp.data();
   *create_op_count = op.create_op_fp.size();
 }
 
@@ -966,9 +1057,12 @@ MX_VOID_RET _opCallFree(void* ptr) {
 }
 
 /*! \brief returns status of calling parse attributes function for operator from library */
-MX_INT_RET _opCallParseAttrs(mxnet::ext::parseAttrs_t parseAttrs, const char* const* keys,
-                             const char* const* vals, int num,
-                             int* num_in, int* num_out) {
+MX_INT_RET _opCallParseAttrs(mxnet::ext::parseAttrs_t parseAttrs,
+                             const char* const* keys,
+                             const char* const* vals,
+                             int num,
+                             int* num_in,
+                             int* num_out) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -978,11 +1072,18 @@ MX_INT_RET _opCallParseAttrs(mxnet::ext::parseAttrs_t parseAttrs, const char* co
 }
 
 /*! \brief returns status of calling inferShape function for operator from library */
-MX_INT_RET _opCallInferShape(mxnet::ext::inferShape_t inferShape, const char* const* keys,
-                             const char* const* vals, int num,
-                             unsigned int** inshapes, int* indims, int num_in,
-                             unsigned int*** mod_inshapes, int** mod_indims,
-                             unsigned int*** outshapes, int** outdims, int num_out) {
+MX_INT_RET _opCallInferShape(mxnet::ext::inferShape_t inferShape,
+                             const char* const* keys,
+                             const char* const* vals,
+                             int num,
+                             unsigned int** inshapes,
+                             int* indims,
+                             int num_in,
+                             unsigned int*** mod_inshapes,
+                             int** mod_indims,
+                             unsigned int*** outshapes,
+                             int** outdims,
+                             int num_out) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -1001,29 +1102,30 @@ MX_INT_RET _opCallInferShape(mxnet::ext::inferShape_t inferShape, const char* co
   std::vector<std::vector<unsigned int> > out_shapes(num_out);
 
   int retval = inferShape(attrs, &in_shapes, &out_shapes);
-  if (!retval) return retval;
+  if (!retval)
+    return retval;
 
   // allocate space for modified input dims, shape
-  *mod_indims = static_cast<int*>(malloc (num_in * sizeof(int)));
-  *mod_inshapes = static_cast<unsigned**>(malloc (num_in * sizeof(unsigned*)));
+  *mod_indims   = static_cast<int*>(malloc(num_in * sizeof(int)));
+  *mod_inshapes = static_cast<unsigned**>(malloc(num_in * sizeof(unsigned*)));
 
   // copy modified input shapes
   for (int i = 0; i < num_in; i++) {
-    (*mod_indims)[i] = in_shapes[i].size();
-    (*mod_inshapes)[i] = static_cast<unsigned*>(malloc ((*mod_indims)[i] * sizeof(unsigned)));
+    (*mod_indims)[i]   = in_shapes[i].size();
+    (*mod_inshapes)[i] = static_cast<unsigned*>(malloc((*mod_indims)[i] * sizeof(unsigned)));
     for (int j = 0; j < (*mod_indims)[i]; j++) {
       (*mod_inshapes)[i][j] = in_shapes[i][j];
     }
   }
 
   // allocate space for output dims, shape
-  *outdims = static_cast<int*>(malloc (num_out * sizeof(int)));
-  *outshapes = static_cast<unsigned**>(malloc (num_out * sizeof(unsigned*)));
+  *outdims   = static_cast<int*>(malloc(num_out * sizeof(int)));
+  *outshapes = static_cast<unsigned**>(malloc(num_out * sizeof(unsigned*)));
 
   // copy output shapes
   for (int i = 0; i < num_out; i++) {
-    (*outdims)[i] = out_shapes[i].size();
-    (*outshapes)[i] = static_cast<unsigned*>(malloc ((*outdims)[i] * sizeof(unsigned)));
+    (*outdims)[i]   = out_shapes[i].size();
+    (*outshapes)[i] = static_cast<unsigned*>(malloc((*outdims)[i] * sizeof(unsigned)));
     for (int j = 0; j < (*outdims)[i]; j++) {
       (*outshapes)[i][j] = out_shapes[i][j];
     }
@@ -1032,9 +1134,14 @@ MX_INT_RET _opCallInferShape(mxnet::ext::inferShape_t inferShape, const char* co
 }
 
 /*! \brief returns status of calling inferType function for operator from library */
-MX_INT_RET _opCallInferType(mxnet::ext::inferType_t inferType, const char* const* keys,
-                            const char* const* vals, int num,
-                            int* intypes, int num_in, int* outtypes, int num_out) {
+MX_INT_RET _opCallInferType(mxnet::ext::inferType_t inferType,
+                            const char* const* keys,
+                            const char* const* vals,
+                            int num,
+                            int* intypes,
+                            int num_in,
+                            int* outtypes,
+                            int num_out) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -1067,9 +1174,14 @@ MX_INT_RET _opCallInferType(mxnet::ext::inferType_t inferType, const char* const
 }
 
 /*! \brief returns status of calling inferSType function for operator from library */
-MX_INT_RET _opCallInferSType(mxnet::ext::inferSType_t inferSType, const char* const* keys,
-                             const char* const* vals, int num,
-                             int* instypes, int num_in, int* outstypes, int num_out) {
+MX_INT_RET _opCallInferSType(mxnet::ext::inferSType_t inferSType,
+                             const char* const* keys,
+                             const char* const* vals,
+                             int num,
+                             int* instypes,
+                             int num_in,
+                             int* outstypes,
+                             int num_out) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -1103,22 +1215,45 @@ MX_INT_RET _opCallInferSType(mxnet::ext::inferSType_t inferSType, const char* co
 }
 
 /*! \brief returns status of calling Forward/Backward function for operator from library */
-MX_INT_RET _opCallFCompute(mxnet::ext::fcomp_t fcomp, const char* const* keys,
+MX_INT_RET _opCallFCompute(mxnet::ext::fcomp_t fcomp,
+                           const char* const* keys,
                            const char* const* vals,
-                           int num, const int64_t** inshapes, int* indims, void** indata,
-                           int* intypes, size_t* inIDs, const char** indev_type, int* indev_id,
-                           int num_in, const int64_t** outshapes, int* outdims, void** outdata,
-                           int* outtypes, size_t* outIDs, const char** outdev_type,
-                           int* outdev_id, int num_out, mxnet::ext::xpu_malloc_t cpu_malloc,
+                           int num,
+                           const int64_t** inshapes,
+                           int* indims,
+                           void** indata,
+                           int* intypes,
+                           size_t* inIDs,
+                           const char** indev_type,
+                           int* indev_id,
+                           int num_in,
+                           const int64_t** outshapes,
+                           int* outdims,
+                           void** outdata,
+                           int* outtypes,
+                           size_t* outIDs,
+                           const char** outdev_type,
+                           int* outdev_id,
+                           int num_out,
+                           mxnet::ext::xpu_malloc_t cpu_malloc,
                            void* cpu_alloc,
-                           mxnet::ext::xpu_malloc_t gpu_malloc, void* gpu_alloc,
+                           mxnet::ext::xpu_malloc_t gpu_malloc,
+                           void* gpu_alloc,
                            void* cuda_stream,
-                           mxnet::ext::sparse_malloc_t sparse_malloc, void* sparse_alloc,
-                           int* instypes, int* outstypes, void** in_indices, void** out_indices,
-                           void** in_indptr, void** out_indptr,
-                           int64_t* in_indices_shapes, int64_t* out_indices_shapes,
-                           int64_t* in_indptr_shapes, int64_t* out_indptr_shapes,
-                           void* rng_cpu_states, void* rng_gpu_states) {
+                           mxnet::ext::sparse_malloc_t sparse_malloc,
+                           void* sparse_alloc,
+                           int* instypes,
+                           int* outstypes,
+                           void** in_indices,
+                           void** out_indices,
+                           void** in_indptr,
+                           void** out_indptr,
+                           int64_t* in_indices_shapes,
+                           int64_t* out_indices_shapes,
+                           int64_t* in_indptr_shapes,
+                           int64_t* out_indptr_shapes,
+                           void* rng_cpu_states,
+                           void* rng_gpu_states) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -1133,8 +1268,12 @@ MX_INT_RET _opCallFCompute(mxnet::ext::fcomp_t fcomp, const char* const* keys,
   for (int i = 0; i < num_in; i++) {
     // Dense representation.
     if (instypes[i] == 0) {
-      inputs[i].setTensor(indata[i], (mxnet::ext::MXDType)intypes[i], inshapes[i], indims[i],
-                          inIDs[i], mxnet::ext::MXContext(indev_type[i], indev_id[i]),
+      inputs[i].setTensor(indata[i],
+                          (mxnet::ext::MXDType)intypes[i],
+                          inshapes[i],
+                          indims[i],
+                          inIDs[i],
+                          mxnet::ext::MXContext(indev_type[i], indev_id[i]),
                           mxnet::ext::kDefaultStorage);
     } else {
       // Sparse representation.
@@ -1144,12 +1283,21 @@ MX_INT_RET _opCallFCompute(mxnet::ext::fcomp_t fcomp, const char* const* keys,
         in_sparse[i].set(indata[i], inshapes[i], indims[i], in_indices[i], in_indices_shapes[i]);
       } else {
         type = mxnet::ext::kCSRStorage;
-        in_sparse[i].set(indata[i], inshapes[i], indims[i], in_indices[i],
-                         in_indices_shapes[i], in_indptr[i], in_indptr_shapes[i]);
+        in_sparse[i].set(indata[i],
+                         inshapes[i],
+                         indims[i],
+                         in_indices[i],
+                         in_indices_shapes[i],
+                         in_indptr[i],
+                         in_indptr_shapes[i]);
       }
-      inputs[i].setTensor(reinterpret_cast<void*>(&in_sparse[i]), (mxnet::ext::MXDType)intypes[i],
-                          inshapes[i], indims[i], inIDs[i],
-                          mxnet::ext::MXContext(indev_type[i], indev_id[i]), type);
+      inputs[i].setTensor(reinterpret_cast<void*>(&in_sparse[i]),
+                          (mxnet::ext::MXDType)intypes[i],
+                          inshapes[i],
+                          indims[i],
+                          inIDs[i],
+                          mxnet::ext::MXContext(indev_type[i], indev_id[i]),
+                          type);
     }
   }
 
@@ -1160,38 +1308,59 @@ MX_INT_RET _opCallFCompute(mxnet::ext::fcomp_t fcomp, const char* const* keys,
   for (int i = 0; i < num_out; i++) {
     // Dense representation.
     if (outstypes[i] == 0) {
-      outputs[i].setTensor(outdata[i], (mxnet::ext::MXDType)outtypes[i], outshapes[i], outdims[i],
-                           outIDs[i], mxnet::ext::MXContext(outdev_type[i], outdev_id[i]),
+      outputs[i].setTensor(outdata[i],
+                           (mxnet::ext::MXDType)outtypes[i],
+                           outshapes[i],
+                           outdims[i],
+                           outIDs[i],
+                           mxnet::ext::MXContext(outdev_type[i], outdev_id[i]),
                            mxnet::ext::kDefaultStorage);
     } else {
       // Sparse representation.
       mxnet::ext::MXStorageType type;
       if (outstypes[i] == 1) {
         type = mxnet::ext::kRowSparseStorage;
-        out_sparse[i].set(outdata[i], outshapes[i], outdims[i],
-                          out_indices[i], out_indices_shapes[i]);
+        out_sparse[i].set(
+            outdata[i], outshapes[i], outdims[i], out_indices[i], out_indices_shapes[i]);
       } else {
         type = mxnet::ext::kCSRStorage;
-        out_sparse[i].set(outdata[i], outshapes[i], outdims[i], out_indices[i],
-                          out_indices_shapes[i], out_indptr[i], out_indptr_shapes[i]);
+        out_sparse[i].set(outdata[i],
+                          outshapes[i],
+                          outdims[i],
+                          out_indices[i],
+                          out_indices_shapes[i],
+                          out_indptr[i],
+                          out_indptr_shapes[i]);
       }
       outputs[i].setTensor(reinterpret_cast<void*>(&out_sparse[i]),
                            (mxnet::ext::MXDType)outtypes[i],
-                           outshapes[i], outdims[i], outIDs[i],
-                           mxnet::ext::MXContext(outdev_type[i], outdev_id[i]), type);
+                           outshapes[i],
+                           outdims[i],
+                           outIDs[i],
+                           mxnet::ext::MXContext(outdev_type[i], outdev_id[i]),
+                           type);
     }
   }
 
-  mxnet::ext::OpResource res(cpu_malloc, cpu_alloc, gpu_malloc, gpu_alloc,
-                             cuda_stream, sparse_malloc, sparse_alloc,
-                             rng_cpu_states, rng_gpu_states);
+  mxnet::ext::OpResource res(cpu_malloc,
+                             cpu_alloc,
+                             gpu_malloc,
+                             gpu_alloc,
+                             cuda_stream,
+                             sparse_malloc,
+                             sparse_alloc,
+                             rng_cpu_states,
+                             rng_gpu_states);
   return fcomp(attrs, &inputs, &outputs, res);
 }
 
 /*! \brief returns status of calling mutateInputs function for operator from library */
-MX_INT_RET _opCallMutateInputs(mxnet::ext::mutateInputs_t mutate, const char* const* keys,
-                               const char* const* vals, int num,
-                               int** mutate_indices, int* indices_size) {
+MX_INT_RET _opCallMutateInputs(mxnet::ext::mutateInputs_t mutate,
+                               const char* const* keys,
+                               const char* const* vals,
+                               int num,
+                               int** mutate_indices,
+                               int* indices_size) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -1206,8 +1375,8 @@ MX_INT_RET _opCallMutateInputs(mxnet::ext::mutateInputs_t mutate, const char* co
     return retval;
 
   // output the input indices
-  *indices_size = mut_ind.size();
-  *mutate_indices = static_cast<int*>(malloc (*indices_size * sizeof(int)));
+  *indices_size   = mut_ind.size();
+  *mutate_indices = static_cast<int*>(malloc(*indices_size * sizeof(int)));
   for (int i = 0; i < *indices_size; i++) {
     (*mutate_indices)[i] = mut_ind[i];
   }
@@ -1216,10 +1385,17 @@ MX_INT_RET _opCallMutateInputs(mxnet::ext::mutateInputs_t mutate, const char* co
 }
 
 /*! \brief returns status of calling createStatefulOp function for operator from library */
-MX_INT_RET _opCallCreateOpState(mxnet::ext::createOpState_t create_op, const char* const* keys,
-                                     const char* const* vals, int num, const char* dev_type,
-                                     int dev_id, unsigned int** inshapes, int* indims,
-                                     int num_in, const int* intypes, void** state_op) {
+MX_INT_RET _opCallCreateOpState(mxnet::ext::createOpState_t create_op,
+                                const char* const* keys,
+                                const char* const* vals,
+                                int num,
+                                const char* dev_type,
+                                int dev_id,
+                                unsigned int** inshapes,
+                                int* indims,
+                                int num_in,
+                                const int* intypes,
+                                void** state_op) {
   // create map of attributes from list
   std::unordered_map<std::string, std::string> attrs;
   for (int i = 0; i < num; i++) {
@@ -1245,34 +1421,54 @@ MX_INT_RET _opCallCreateOpState(mxnet::ext::createOpState_t create_op, const cha
   // void pointer to hold custom state op instance created in custom library
   // eventually state_op pointer is populated by instance from custom library
   mxnet::ext::CustomStatefulOp** op_ptr =
-    reinterpret_cast<mxnet::ext::CustomStatefulOp**>(state_op);
+      reinterpret_cast<mxnet::ext::CustomStatefulOp**>(state_op);
   return create_op(attrs, ctx, in_shapes, in_types, op_ptr);
 }
 
 /*! \brief calls StatefulOp destructor for operator from library */
 MX_VOID_RET _opCallDestroyOpState(void* state_op) {
-  mxnet::ext::CustomStatefulOp* op_ptr =
-    reinterpret_cast<mxnet::ext::CustomStatefulOp*>(state_op);
+  mxnet::ext::CustomStatefulOp* op_ptr = reinterpret_cast<mxnet::ext::CustomStatefulOp*>(state_op);
   delete op_ptr;
 }
 
 /*! \brief returns status of calling Stateful Forward/Backward for operator from library */
-MX_INT_RET _opCallFStatefulCompute(int is_forward, void* state_op, const int64_t** inshapes,
-                                   int* indims, void** indata, int* intypes, size_t* inIDs,
-                                   const char** indev_type, int* indev_id, int num_in,
-                                   const int64_t** outshapes, int* outdims, void** outdata,
-                                   int* outtypes, size_t* outIDs, const char** outdev_type,
-                                   int* outdev_id, int num_out,
+MX_INT_RET _opCallFStatefulCompute(int is_forward,
+                                   void* state_op,
+                                   const int64_t** inshapes,
+                                   int* indims,
+                                   void** indata,
+                                   int* intypes,
+                                   size_t* inIDs,
+                                   const char** indev_type,
+                                   int* indev_id,
+                                   int num_in,
+                                   const int64_t** outshapes,
+                                   int* outdims,
+                                   void** outdata,
+                                   int* outtypes,
+                                   size_t* outIDs,
+                                   const char** outdev_type,
+                                   int* outdev_id,
+                                   int num_out,
                                    mxnet::ext::xpu_malloc_t cpu_malloc,
-                                   void* cpu_alloc, mxnet::ext::xpu_malloc_t gpu_malloc,
+                                   void* cpu_alloc,
+                                   mxnet::ext::xpu_malloc_t gpu_malloc,
                                    void* gpu_alloc,
-                                   void* stream, mxnet::ext::sparse_malloc_t sparse_malloc,
-                                   void* sparse_alloc, int* instypes, int* outstypes,
-                                   void** in_indices, void** out_indices, void** in_indptr,
-                                   void** out_indptr, int64_t* in_indices_shapes,
-                                   int64_t* out_indices_shapes, int64_t* in_indptr_shapes,
+                                   void* stream,
+                                   mxnet::ext::sparse_malloc_t sparse_malloc,
+                                   void* sparse_alloc,
+                                   int* instypes,
+                                   int* outstypes,
+                                   void** in_indices,
+                                   void** out_indices,
+                                   void** in_indptr,
+                                   void** out_indptr,
+                                   int64_t* in_indices_shapes,
+                                   int64_t* out_indices_shapes,
+                                   int64_t* in_indptr_shapes,
                                    int64_t* out_indptr_shapes,
-                                   void* rng_cpu_states, void* rng_gpu_states) {
+                                   void* rng_cpu_states,
+                                   void* rng_gpu_states) {
   // create a vector of tensors for inputs
   std::vector<mxnet::ext::MXTensor> inputs(num_in);
   // create a vector for sparse inputs
@@ -1281,8 +1477,12 @@ MX_INT_RET _opCallFStatefulCompute(int is_forward, void* state_op, const int64_t
   for (int i = 0; i < num_in; i++) {
     if (instypes[i] == 0) {
       // Dense representation.
-      inputs[i].setTensor(indata[i], (mxnet::ext::MXDType)intypes[i], inshapes[i], indims[i],
-                          inIDs[i], mxnet::ext::MXContext(indev_type[i], indev_id[i]),
+      inputs[i].setTensor(indata[i],
+                          (mxnet::ext::MXDType)intypes[i],
+                          inshapes[i],
+                          indims[i],
+                          inIDs[i],
+                          mxnet::ext::MXContext(indev_type[i], indev_id[i]),
                           mxnet::ext::kDefaultStorage);
     } else {
       // Sparse representation.
@@ -1292,12 +1492,21 @@ MX_INT_RET _opCallFStatefulCompute(int is_forward, void* state_op, const int64_t
         in_sparse[i].set(indata[i], inshapes[i], indims[i], in_indices[i], in_indices_shapes[i]);
       } else {
         type = mxnet::ext::kCSRStorage;
-        in_sparse[i].set(indata[i], inshapes[i], indims[i], in_indices[i],
-                         in_indices_shapes[i], in_indptr[i], in_indptr_shapes[i]);
+        in_sparse[i].set(indata[i],
+                         inshapes[i],
+                         indims[i],
+                         in_indices[i],
+                         in_indices_shapes[i],
+                         in_indptr[i],
+                         in_indptr_shapes[i]);
       }
-      inputs[i].setTensor(reinterpret_cast<void*>(&in_sparse[i]), (mxnet::ext::MXDType)intypes[i],
-                          inshapes[i], indims[i], inIDs[i],
-                          mxnet::ext::MXContext(indev_type[i], indev_id[i]), type);
+      inputs[i].setTensor(reinterpret_cast<void*>(&in_sparse[i]),
+                          (mxnet::ext::MXDType)intypes[i],
+                          inshapes[i],
+                          indims[i],
+                          inIDs[i],
+                          mxnet::ext::MXContext(indev_type[i], indev_id[i]),
+                          type);
     }
   }
 
@@ -1309,33 +1518,51 @@ MX_INT_RET _opCallFStatefulCompute(int is_forward, void* state_op, const int64_t
   for (int i = 0; i < num_out; i++) {
     if (outstypes[i] == 0) {
       // Dense representation.
-      outputs[i].setTensor(outdata[i], (mxnet::ext::MXDType)outtypes[i], outshapes[i], outdims[i],
-                           outIDs[i], mxnet::ext::MXContext(outdev_type[i], outdev_id[i]),
+      outputs[i].setTensor(outdata[i],
+                           (mxnet::ext::MXDType)outtypes[i],
+                           outshapes[i],
+                           outdims[i],
+                           outIDs[i],
+                           mxnet::ext::MXContext(outdev_type[i], outdev_id[i]),
                            mxnet::ext::kDefaultStorage);
     } else {
       // Sparse representation.
       mxnet::ext::MXStorageType type;
       if (outstypes[i] == 1) {
         type = mxnet::ext::kRowSparseStorage;
-        out_sparse[i].set(outdata[i], outshapes[i], outdims[i], out_indices[i],
-                          out_indices_shapes[i]);
+        out_sparse[i].set(
+            outdata[i], outshapes[i], outdims[i], out_indices[i], out_indices_shapes[i]);
       } else {
         type = mxnet::ext::kCSRStorage;
-        out_sparse[i].set(outdata[i], outshapes[i], outdims[i], out_indices[i],
-                          out_indices_shapes[i], out_indptr[i], out_indptr_shapes[i]);
+        out_sparse[i].set(outdata[i],
+                          outshapes[i],
+                          outdims[i],
+                          out_indices[i],
+                          out_indices_shapes[i],
+                          out_indptr[i],
+                          out_indptr_shapes[i]);
       }
       outputs[i].setTensor(reinterpret_cast<void*>(&out_sparse[i]),
                            (mxnet::ext::MXDType)outtypes[i],
-                           outshapes[i], outdims[i], outIDs[i],
-                           mxnet::ext::MXContext(outdev_type[i], outdev_id[i]), type);
+                           outshapes[i],
+                           outdims[i],
+                           outIDs[i],
+                           mxnet::ext::MXContext(outdev_type[i], outdev_id[i]),
+                           type);
     }
   }
 
-  mxnet::ext::OpResource res(cpu_malloc, cpu_alloc, gpu_malloc, gpu_alloc,
-                             stream, sparse_malloc, sparse_alloc, rng_cpu_states, rng_gpu_states);
-
-  mxnet::ext::CustomStatefulOp* op_ptr =
-    reinterpret_cast<mxnet::ext::CustomStatefulOp*>(state_op);
+  mxnet::ext::OpResource res(cpu_malloc,
+                             cpu_alloc,
+                             gpu_malloc,
+                             gpu_alloc,
+                             stream,
+                             sparse_malloc,
+                             sparse_alloc,
+                             rng_cpu_states,
+                             rng_gpu_states);
+
+  mxnet::ext::CustomStatefulOp* op_ptr = reinterpret_cast<mxnet::ext::CustomStatefulOp*>(state_op);
   if (is_forward) {
     return op_ptr->Forward(&inputs, &outputs, res);
   }
@@ -1351,30 +1578,37 @@ MX_INT_RET _partRegSize() {
  * at specified index */
 MX_INT_RET _partRegGetCount(int idx, const char** name) {
   mxnet::ext::CustomPartitioner part =
-    mxnet::ext::Registry<mxnet::ext::CustomPartitioner>::get()->get(idx);
+      mxnet::ext::Registry<mxnet::ext::CustomPartitioner>::get()->get(idx);
   *name = part.name;
   return part.strategies.size();
 }
 
 /*! \brief returns partitioner registration at specified index */
-MX_VOID_RET _partRegGet(int part_idx, int stg_idx, const char** strategy,
+MX_VOID_RET _partRegGet(int part_idx,
+                        int stg_idx,
+                        const char** strategy,
                         mxnet::ext::supportedOps_t* supportedOps,
                         mxnet::ext::createSelector_t* createSelector,
-                        mxnet::ext::reviewSubgraph_t* reviewSubgraph, const char** op_name) {
+                        mxnet::ext::reviewSubgraph_t* reviewSubgraph,
+                        const char** op_name) {
   mxnet::ext::CustomPartitioner part =
-    mxnet::ext::Registry<mxnet::ext::CustomPartitioner>::get()->get(part_idx);
-  *strategy = part.strategies[stg_idx];
-  *op_name = part.op_names[stg_idx];
-  *supportedOps = part.getSupportedOps(stg_idx);
+      mxnet::ext::Registry<mxnet::ext::CustomPartitioner>::get()->get(part_idx);
+  *strategy       = part.strategies[stg_idx];
+  *op_name        = part.op_names[stg_idx];
+  *supportedOps   = part.getSupportedOps(stg_idx);
   *createSelector = part.getCreateSelector(stg_idx);
   *reviewSubgraph = part.getReviewSubgraph(stg_idx);
 }
 
 /*! \brief returns status of calling supported ops function from library */
-MX_INT_RET _partCallSupportedOps(mxnet::ext::supportedOps_t supportedOps, const char *json,
-                                 int num_ids, int *ids, const char* const* opt_keys,
-                                 const char* const* opt_vals, int num_opts) {
-  mxnet::ext::Graph *graph = mxnet::ext::Graph::fromString(json);
+MX_INT_RET _partCallSupportedOps(mxnet::ext::supportedOps_t supportedOps,
+                                 const char* json,
+                                 int num_ids,
+                                 int* ids,
+                                 const char* const* opt_keys,
+                                 const char* const* opt_vals,
+                                 int num_opts) {
+  mxnet::ext::Graph* graph = mxnet::ext::Graph::fromString(json);
   // create map of options from list
   std::unordered_map<std::string, std::string> opts;
   for (int i = 0; i < num_opts; i++)
@@ -1384,7 +1618,8 @@ MX_INT_RET _partCallSupportedOps(mxnet::ext::supportedOps_t supportedOps, const
   std::vector<int> _ids(num_ids, -2);
   // call user's supportedOps function
   mxnet::ext::MXReturnValue retval = supportedOps(graph, &_ids, opts);
-  if (!retval) return retval;
+  if (!retval)
+    return retval;
 
   // copy bools in ids to ints
   for (int i = 0; i < num_ids; i++)
@@ -1394,10 +1629,13 @@ MX_INT_RET _partCallSupportedOps(mxnet::ext::supportedOps_t supportedOps, const
 }
 
 /*! \brief returns status of calling create selector function from library */
-MX_INT_RET _partCallCreateSelector(mxnet::ext::createSelector_t createSelector, const char *json,
-                                   void** selector, const char* const* opt_keys,
-                                   const char* const* opt_vals, int num_opts) {
-  mxnet::ext::Graph *graph = mxnet::ext::Graph::fromString(json);
+MX_INT_RET _partCallCreateSelector(mxnet::ext::createSelector_t createSelector,
+                                   const char* json,
+                                   void** selector,
+                                   const char* const* opt_keys,
+                                   const char* const* opt_vals,
+                                   int num_opts) {
+  mxnet::ext::Graph* graph = mxnet::ext::Graph::fromString(json);
   // create map of options from list
   std::unordered_map<std::string, std::string> opts;
   for (int i = 0; i < num_opts; i++)
@@ -1406,7 +1644,7 @@ MX_INT_RET _partCallCreateSelector(mxnet::ext::createSelector_t createSelector,
   // void pointer to hold selector instance created in custom library
   // eventually pointer is populated by instance from custom library
   mxnet::ext::CustomOpSelector** sel_ptr =
-    reinterpret_cast<mxnet::ext::CustomOpSelector**>(selector);
+      reinterpret_cast<mxnet::ext::CustomOpSelector**>(selector);
 
   // call user's createSelector function
   return createSelector(graph, sel_ptr, opts);
@@ -1414,34 +1652,31 @@ MX_INT_RET _partCallCreateSelector(mxnet::ext::createSelector_t createSelector,
 
 /*! \brief returns status of calling select function from library */
 MX_VOID_RET _partCallSelect(void* sel_inst, int nodeID, int* selected) {
-  mxnet::ext::CustomOpSelector* sel_ptr =
-    reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
-  *selected = sel_ptr->Select(nodeID);
+  mxnet::ext::CustomOpSelector* sel_ptr = reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
+  *selected                             = sel_ptr->Select(nodeID);
 }
 
 /*! \brief returns status of calling select input function from library */
-MX_VOID_RET _partCallSelectInput(void* sel_inst, int nodeID,
-                                 int input_nodeID, int* selected) {
-  mxnet::ext::CustomOpSelector* sel_ptr =
-    reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
-  *selected = sel_ptr->SelectInput(nodeID, input_nodeID);
+MX_VOID_RET _partCallSelectInput(void* sel_inst, int nodeID, int input_nodeID, int* selected) {
+  mxnet::ext::CustomOpSelector* sel_ptr = reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
+  *selected                             = sel_ptr->SelectInput(nodeID, input_nodeID);
 }
 
 /*! \brief returns status of calling select output function from library */
-MX_VOID_RET _partCallSelectOutput(void* sel_inst, int nodeID,
-                                  int output_nodeID, int* selected) {
-  mxnet::ext::CustomOpSelector* sel_ptr =
-    reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
-  *selected = sel_ptr->SelectOutput(nodeID, output_nodeID);
+MX_VOID_RET _partCallSelectOutput(void* sel_inst, int nodeID, int output_nodeID, int* selected) {
+  mxnet::ext::CustomOpSelector* sel_ptr = reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
+  *selected                             = sel_ptr->SelectOutput(nodeID, output_nodeID);
 }
 
 /*! \brief returns status of calling filter function from library */
-MX_VOID_RET _partCallFilter(void* sel_inst, int* candidates, int num_candidates,
-                            int** keep, int* num_keep) {
-  mxnet::ext::CustomOpSelector* sel_ptr =
-    reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
+MX_VOID_RET _partCallFilter(void* sel_inst,
+                            int* candidates,
+                            int num_candidates,
+                            int** keep,
+                            int* num_keep) {
+  mxnet::ext::CustomOpSelector* sel_ptr = reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
   std::vector<int> candidates_(num_candidates);
-  for (int i=0; i < num_candidates; i++) {
+  for (int i = 0; i < num_candidates; i++) {
     candidates_[i] = candidates[i];
   }
   std::vector<int> keep_;
@@ -1449,35 +1684,48 @@ MX_VOID_RET _partCallFilter(void* sel_inst, int* candidates, int num_candidates,
   sel_ptr->Filter(candidates_, &keep_);
 
   *num_keep = keep_.size();
-  *keep = static_cast<int*>(malloc(keep_.size() * sizeof(int)));
-  for (unsigned i=0; i < keep_.size(); i++)
+  *keep     = static_cast<int*>(malloc(keep_.size() * sizeof(int)));
+  for (unsigned i = 0; i < keep_.size(); i++)
     (*keep)[i] = keep_[i];
 }
 
 /*! \brief returns status of calling reset selector function from library */
 MX_VOID_RET _partCallReset(void* sel_inst) {
-  mxnet::ext::CustomOpSelector* sel_ptr =
-    reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
-    sel_ptr->Reset();
+  mxnet::ext::CustomOpSelector* sel_ptr = reinterpret_cast<mxnet::ext::CustomOpSelector*>(sel_inst);
+  sel_ptr->Reset();
 }
 
 /*! \brief returns status of calling review subgraph function from library */
-MX_INT_RET _partCallReviewSubgraph(mxnet::ext::reviewSubgraph_t reviewSubgraph, const char *json,
-                                   int subgraph_id, int *accept, const char* const* opt_keys,
-                                   const char* const* opt_vals, int num_opts,
-                                   char*** attr_keys, char*** attr_vals, int *num_attrs,
-                                   const char* const* arg_names, int num_args,
-                                   void* const* arg_data, const int64_t* const* arg_shapes,
-                                   const int* arg_dims, const int* arg_types,
-                                   const size_t* arg_IDs, const char* const* arg_dev_type,
+MX_INT_RET _partCallReviewSubgraph(mxnet::ext::reviewSubgraph_t reviewSubgraph,
+                                   const char* json,
+                                   int subgraph_id,
+                                   int* accept,
+                                   const char* const* opt_keys,
+                                   const char* const* opt_vals,
+                                   int num_opts,
+                                   char*** attr_keys,
+                                   char*** attr_vals,
+                                   int* num_attrs,
+                                   const char* const* arg_names,
+                                   int num_args,
+                                   void* const* arg_data,
+                                   const int64_t* const* arg_shapes,
+                                   const int* arg_dims,
+                                   const int* arg_types,
+                                   const size_t* arg_IDs,
+                                   const char* const* arg_dev_type,
                                    const int* arg_dev_id,
-                                   const char* const* aux_names, int num_aux,
-                                   void* const* aux_data, const int64_t* const* aux_shapes,
-                                   const int* aux_dims, const int* aux_types,
-                                   const size_t* aux_IDs, const char* const* aux_dev_type,
+                                   const char* const* aux_names,
+                                   int num_aux,
+                                   void* const* aux_data,
+                                   const int64_t* const* aux_shapes,
+                                   const int* aux_dims,
+                                   const int* aux_types,
+                                   const size_t* aux_IDs,
+                                   const char* const* aux_dev_type,
                                    const int* aux_dev_id) {
-  mxnet::ext::Graph *subgraph = mxnet::ext::Graph::fromString(json);
-  bool accept_bool = false;
+  mxnet::ext::Graph* subgraph = mxnet::ext::Graph::fromString(json);
+  bool accept_bool            = false;
   // create map of attributes from list
   std::unordered_map<std::string, std::string> opts;
   for (int i = 0; i < num_opts; i++)
@@ -1491,8 +1739,11 @@ MX_INT_RET _partCallReviewSubgraph(mxnet::ext::reviewSubgraph_t reviewSubgraph,
     for (int j = 0; j < arg_dims[i]; j++)
       shapes.push_back(arg_shapes[i][j]);
 
-    mxnet::ext::MXTensor tensor(arg_data[i], shapes, (mxnet::ext::MXDType)arg_types[i],
-                                arg_IDs[i], mxnet::ext::MXContext(arg_dev_type[i], arg_dev_id[i]));
+    mxnet::ext::MXTensor tensor(arg_data[i],
+                                shapes,
+                                (mxnet::ext::MXDType)arg_types[i],
+                                arg_IDs[i],
+                                mxnet::ext::MXContext(arg_dev_type[i], arg_dev_id[i]));
     args[arg_names[i]] = tensor;
   }
   // create a map of named tensors for aux
@@ -1503,34 +1754,38 @@ MX_INT_RET _partCallReviewSubgraph(mxnet::ext::reviewSubgraph_t reviewSubgraph,
     for (int j = 0; j < aux_dims[i]; j++)
       shapes.push_back(aux_shapes[i][j]);
 
-    mxnet::ext::MXTensor tensor(aux_data[i], shapes, (mxnet::ext::MXDType)aux_types[i],
-                                aux_IDs[i], mxnet::ext::MXContext(aux_dev_type[i],
-                                                                  aux_dev_id[i]));
+    mxnet::ext::MXTensor tensor(aux_data[i],
+                                shapes,
+                                (mxnet::ext::MXDType)aux_types[i],
+                                aux_IDs[i],
+                                mxnet::ext::MXContext(aux_dev_type[i], aux_dev_id[i]));
     aux[aux_names[i]] = tensor;
   }
 
   subgraph->_setParams(&args, &aux);
 
   std::unordered_map<std::string, std::string> attrs;
-  mxnet::ext::MXReturnValue retval = reviewSubgraph(subgraph, subgraph_id, &accept_bool,
-                                                    opts, &attrs);
-  if (!retval) return retval;
+  mxnet::ext::MXReturnValue retval =
+      reviewSubgraph(subgraph, subgraph_id, &accept_bool, opts, &attrs);
+  if (!retval)
+    return retval;
 
   *accept = accept_bool;
 
   if (attrs.size() > 0) {
     *num_attrs = attrs.size();
     // allocate space for attributes
-    *attr_keys = static_cast<char**>(malloc (*num_attrs * sizeof(char*)));
-    *attr_vals = static_cast<char**>(malloc (*num_attrs * sizeof(char*)));
+    *attr_keys = static_cast<char**>(malloc(*num_attrs * sizeof(char*)));
+    *attr_vals = static_cast<char**>(malloc(*num_attrs * sizeof(char*)));
 
     // copy attributes
     int i = 0;
     for (auto kv : attrs) {
-      (*attr_keys)[i] = static_cast<char*>(malloc ((kv.first.size()+1) * sizeof(char)));  // NOLINT
-      (*attr_vals)[i] = static_cast<char*>(malloc ((kv.second.size()+1) * sizeof(char)));  // NOLINT
-      snprintf((*attr_keys)[i], kv.first.size()+1, "%s", kv.first.c_str());
-      snprintf((*attr_vals)[i], kv.second.size()+1, "%s", kv.second.c_str());
+      (*attr_keys)[i] = static_cast<char*>(malloc((kv.first.size() + 1) * sizeof(char)));  // NOLINT
+      (*attr_vals)[i] =
+          static_cast<char*>(malloc((kv.second.size() + 1) * sizeof(char)));  // NOLINT
+      snprintf((*attr_keys)[i], kv.first.size() + 1, "%s", kv.first.c_str());
+      snprintf((*attr_vals)[i], kv.second.size() + 1, "%s", kv.second.c_str());
       i++;
     }
   }
@@ -1544,29 +1799,41 @@ MX_INT_RET _passRegSize() {
 }
 
 /*! \brief returns pass registration at specified index */
-MX_VOID_RET _passRegGet(int pass_idx, mxnet::ext::graphPass_t* graphPass,
-                        const char** pass_name) {
-  mxnet::ext::CustomPass pass =
-    mxnet::ext::Registry<mxnet::ext::CustomPass>::get()->get(pass_idx);
-  *graphPass = pass.pass;
-  *pass_name = pass.name;
+MX_VOID_RET _passRegGet(int pass_idx, mxnet::ext::graphPass_t* graphPass, const char** pass_name) {
+  mxnet::ext::CustomPass pass = mxnet::ext::Registry<mxnet::ext::CustomPass>::get()->get(pass_idx);
+  *graphPass                  = pass.pass;
+  *pass_name                  = pass.name;
 }
 
 /*! \brief returns status of calling graph pass function from library */
-MX_INT_RET _passCallGraphPass(mxnet::ext::graphPass_t graphPass, const char *json,
-                              char** out_graph, const char* const* opt_keys,
-                              const char* const* opt_vals, int num_opts,
-                              const char* pass_name, const char* const* arg_names, int num_args,
-                              void* const* arg_data, const int64_t* const* arg_shapes,
-                              const int* arg_dims, const int* arg_types,
-                              const size_t* arg_IDs, const char* const* arg_dev_type,
-                              const int* arg_dev_id, const char* const* aux_names, int num_aux,
-                              void* const* aux_data, const int64_t* const* aux_shapes,
-                              const int* aux_dims, const int* aux_types,
-                              const size_t* aux_IDs, const char* const* aux_dev_type,
-                              const int* aux_dev_id, mxnet::ext::nd_malloc_t nd_malloc,
+MX_INT_RET _passCallGraphPass(mxnet::ext::graphPass_t graphPass,
+                              const char* json,
+                              char** out_graph,
+                              const char* const* opt_keys,
+                              const char* const* opt_vals,
+                              int num_opts,
+                              const char* pass_name,
+                              const char* const* arg_names,
+                              int num_args,
+                              void* const* arg_data,
+                              const int64_t* const* arg_shapes,
+                              const int* arg_dims,
+                              const int* arg_types,
+                              const size_t* arg_IDs,
+                              const char* const* arg_dev_type,
+                              const int* arg_dev_id,
+                              const char* const* aux_names,
+                              int num_aux,
+                              void* const* aux_data,
+                              const int64_t* const* aux_shapes,
+                              const int* aux_dims,
+                              const int* aux_types,
+                              const size_t* aux_IDs,
+                              const char* const* aux_dev_type,
+                              const int* aux_dev_id,
+                              mxnet::ext::nd_malloc_t nd_malloc,
                               const void* nd_alloc) {
-  mxnet::ext::Graph *graph = mxnet::ext::Graph::fromString(json);
+  mxnet::ext::Graph* graph = mxnet::ext::Graph::fromString(json);
   // create map of attributes from list
   std::unordered_map<std::string, std::string> opts;
   for (int i = 0; i < num_opts; i++)
@@ -1580,9 +1847,11 @@ MX_INT_RET _passCallGraphPass(mxnet::ext::graphPass_t graphPass, const char *jso
     for (int j = 0; j < arg_dims[i]; j++)
       shapes.push_back(arg_shapes[i][j]);
 
-    mxnet::ext::MXTensor tensor(arg_data[i], shapes, (mxnet::ext::MXDType)arg_types[i],
-                                arg_IDs[i], mxnet::ext::MXContext(arg_dev_type[i],
-                                                                  arg_dev_id[i]));
+    mxnet::ext::MXTensor tensor(arg_data[i],
+                                shapes,
+                                (mxnet::ext::MXDType)arg_types[i],
+                                arg_IDs[i],
+                                mxnet::ext::MXContext(arg_dev_type[i], arg_dev_id[i]));
     args[arg_names[i]] = tensor;
   }
   // create a map of named tensors for aux
@@ -1593,9 +1862,11 @@ MX_INT_RET _passCallGraphPass(mxnet::ext::graphPass_t graphPass, const char *jso
     for (int j = 0; j < aux_dims[i]; j++)
       shapes.push_back(aux_shapes[i][j]);
 
-    mxnet::ext::MXTensor tensor(aux_data[i], shapes, (mxnet::ext::MXDType)aux_types[i],
-                                aux_IDs[i], mxnet::ext::MXContext(aux_dev_type[i],
-                                                                  aux_dev_id[i]));
+    mxnet::ext::MXTensor tensor(aux_data[i],
+                                shapes,
+                                (mxnet::ext::MXDType)aux_types[i],
+                                aux_IDs[i],
+                                mxnet::ext::MXContext(aux_dev_type[i], aux_dev_id[i]));
     aux[aux_names[i]] = tensor;
   }
 
@@ -1604,11 +1875,12 @@ MX_INT_RET _passCallGraphPass(mxnet::ext::graphPass_t graphPass, const char *jso
   graph->_setParams(&args, &aux);
   graph->_setPassResource(&res);
   mxnet::ext::MXReturnValue retval = graphPass(graph, opts);
-  if (!retval) return retval;
+  if (!retval)
+    return retval;
 
   std::string tmp = graph->toString();
-  *out_graph = static_cast<char*>(malloc ((tmp.size()+1) * sizeof(char)));  // NOLINT
-  snprintf((*out_graph), tmp.size()+1, "%s", tmp.c_str());
+  *out_graph      = static_cast<char*>(malloc((tmp.size() + 1) * sizeof(char)));  // NOLINT
+  snprintf((*out_graph), tmp.size() + 1, "%s", tmp.c_str());
   return retval;
 }
 
@@ -1624,7 +1896,7 @@ __declspec(dllexport) mxnet::ext::MXReturnValue __cdecl
 #else
 mxnet::ext::MXReturnValue
 #endif
-initialize(int version);
+    initialize(int version);
 
 MX_INT_RET _msgSize() {
   return mxnet::ext::MXerrorMsgs::get()->size();
diff --git a/src/libinfo.cc b/src/libinfo.cc
index 27898adc96d5..292fbe615d09 100644
--- a/src/libinfo.cc
+++ b/src/libinfo.cc
@@ -33,8 +33,7 @@ namespace features {
 
 class FeatureSet {
  public:
-  FeatureSet() :
-      feature_bits() {
+  FeatureSet() : feature_bits() {
     // GPU
     feature_bits.set(CUDA, MXNET_USE_CUDA);
     feature_bits.set(CUDNN, MXNET_USE_CUDNN);
@@ -115,50 +114,50 @@ bool is_enabled(const unsigned feat) {
 }
 
 LibInfo::LibInfo() {
-    for (size_t i = 0; i < MAX_FEATURES; ++i) {
-        m_lib_features[i].name = EnumNames::names[i].c_str();
-        m_lib_features[i].enabled = is_enabled(i);
-    }
+  for (size_t i = 0; i < MAX_FEATURES; ++i) {
+    m_lib_features[i].name    = EnumNames::names[i].c_str();
+    m_lib_features[i].enabled = is_enabled(i);
+  }
 }
 
-LibInfo *LibInfo::getInstance() {
-    if (!m_inst)
-        m_inst = std::make_unique<LibInfo>();
-    return m_inst.get();
+LibInfo* LibInfo::getInstance() {
+  if (!m_inst)
+    m_inst = std::make_unique<LibInfo>();
+  return m_inst.get();
 }
 
 std::unique_ptr<LibInfo> LibInfo::m_inst = nullptr;
 
 const std::vector<std::string> EnumNames::names = {
-  "CUDA",
-  "CUDNN",
-  "NCCL",
-  "TENSORRT",
-  "CUTENSOR",
-  "CPU_SSE",
-  "CPU_SSE2",
-  "CPU_SSE3",
-  "CPU_SSE4_1",
-  "CPU_SSE4_2",
-  "CPU_SSE4A",
-  "CPU_AVX",
-  "CPU_AVX2",
-  "OPENMP",
-  "SSE",
-  "F16C",
-  "JEMALLOC",
-  "BLAS_OPEN",
-  "BLAS_ATLAS",
-  "BLAS_MKL",
-  "BLAS_APPLE",
-  "LAPACK",
-  "ONEDNN",
-  "OPENCV",
-  "DIST_KVSTORE",
-  "INT64_TENSOR_SIZE",
-  "SIGNAL_HANDLER",
-  "DEBUG",
-  "TVM_OP",
+    "CUDA",
+    "CUDNN",
+    "NCCL",
+    "TENSORRT",
+    "CUTENSOR",
+    "CPU_SSE",
+    "CPU_SSE2",
+    "CPU_SSE3",
+    "CPU_SSE4_1",
+    "CPU_SSE4_2",
+    "CPU_SSE4A",
+    "CPU_AVX",
+    "CPU_AVX2",
+    "OPENMP",
+    "SSE",
+    "F16C",
+    "JEMALLOC",
+    "BLAS_OPEN",
+    "BLAS_ATLAS",
+    "BLAS_MKL",
+    "BLAS_APPLE",
+    "LAPACK",
+    "ONEDNN",
+    "OPENCV",
+    "DIST_KVSTORE",
+    "INT64_TENSOR_SIZE",
+    "SIGNAL_HANDLER",
+    "DEBUG",
+    "TVM_OP",
 };
 
 }  // namespace features
diff --git a/src/ndarray/ndarray_function-inl.h b/src/ndarray/ndarray_function-inl.h
index beb40c73b8ad..fc20fb1c8841 100644
--- a/src/ndarray/ndarray_function-inl.h
+++ b/src/ndarray/ndarray_function-inl.h
@@ -31,37 +31,36 @@
 // macro to help specialize evaluation function
 
 #ifndef DECL_TERNARY
-#define DECL_TERNARY(XPU, OP, FUN)                                          \
-  template<>                                                                \
-  void Eval<XPU, OP>(const TBlob &lhs, const TBlob &mhs,                    \
-                     const TBlob &rhs, TBlob *ret, RunContext ctx) {        \
-    FUN<XPU, OP>(lhs, mhs, rhs, ret, ctx);                                  \
+#define DECL_TERNARY(XPU, OP, FUN)                                                        \
+  template <>                                                                             \
+  void Eval<XPU, OP>(                                                                     \
+      const TBlob& lhs, const TBlob& mhs, const TBlob& rhs, TBlob* ret, RunContext ctx) { \
+    FUN<XPU, OP>(lhs, mhs, rhs, ret, ctx);                                                \
   }
 #endif
 
 #ifndef DECL_BINARY
 #define DECL_BINARY(XPU, OP, FUN)                                                      \
-  template<>                                                                           \
-  void Eval<XPU, OP>(const TBlob &lhs, const TBlob &rhs, TBlob *ret, RunContext ctx) { \
+  template <>                                                                          \
+  void Eval<XPU, OP>(const TBlob& lhs, const TBlob& rhs, TBlob* ret, RunContext ctx) { \
     FUN<XPU, OP>(lhs, rhs, ret, ctx);                                                  \
   }
 #endif
 
 #ifndef DECL_BINARY_LAUNCH
 #define DECL_BINARY_LAUNCH(XPU, OP)                                               \
-  template <> \
-  void BinaryOpKernelImpl<OP, XPU>(mshadow::Stream<XPU> *s, \
-                          const TBlob& lhs, const TBlob& rhs, TBlob *out) { \
-    BinaryOpKernelLaunch<OP>(s, lhs, rhs, out); \
+  template <>                                                                     \
+  void BinaryOpKernelImpl<OP, XPU>(                                               \
+      mshadow::Stream<XPU> * s, const TBlob& lhs, const TBlob& rhs, TBlob* out) { \
+    BinaryOpKernelLaunch<OP>(s, lhs, rhs, out);                                   \
   }
 #endif
 
 #ifndef DECL_SCALAR
-#define DECL_SCALAR(XPU, OP, FUN, REVERSE)                           \
-  template<>                                                         \
-  void Eval<XPU, OP, REVERSE>(const TBlob &lhs, const real_t &rhs,   \
-                                     TBlob *ret, RunContext ctx) {   \
-    FUN<XPU, OP, REVERSE>(lhs, rhs, ret, ctx);                       \
+#define DECL_SCALAR(XPU, OP, FUN, REVERSE)                                                       \
+  template <>                                                                                    \
+  void Eval<XPU, OP, REVERSE>(const TBlob& lhs, const real_t& rhs, TBlob* ret, RunContext ctx) { \
+    FUN<XPU, OP, REVERSE>(lhs, rhs, ret, ctx);                                                   \
   }
 #endif
 
@@ -75,381 +74,348 @@ namespace mxnet {
 namespace ndarray {
 
 // true implementation
-template<typename xpu, typename OP>
-void EvalBinary_(const TBlob &lhs, const TBlob &rhs,
-                 TBlob *ret, RunContext ctx) {
+template <typename xpu, typename OP>
+void EvalBinary_(const TBlob& lhs, const TBlob& rhs, TBlob* ret, RunContext ctx) {
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  CHECK_EQ(ret->type_flag_, lhs.type_flag_)
-    << "Only support input/output with the same data type";
-  CHECK_EQ(ret->type_flag_, rhs.type_flag_)
-    << "Only support input/output with the same data type";
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  CHECK_EQ(ret->type_flag_, lhs.type_flag_) << "Only support input/output with the same data type";
+  CHECK_EQ(ret->type_flag_, rhs.type_flag_) << "Only support input/output with the same data type";
   MSHADOW_TYPE_SWITCH(ret->type_flag_, DType, {
-    ret->FlatTo2D<xpu, DType>(s)
-      = F<typename OP::mshadow_op>(lhs.FlatTo2D<xpu, DType>(s),
-                                   rhs.FlatTo2D<xpu, DType>(s));
+    ret->FlatTo2D<xpu, DType>(s) =
+        F<typename OP::mshadow_op>(lhs.FlatTo2D<xpu, DType>(s), rhs.FlatTo2D<xpu, DType>(s));
   });
 }
 
-template<typename xpu, typename OP>
-void EvalOneHot_(const TBlob &index, const TBlob &rhs,
-                 TBlob *ret, RunContext ctx) {
+template <typename xpu, typename OP>
+void EvalOneHot_(const TBlob& index, const TBlob& rhs, TBlob* ret, RunContext ctx) {
   LOG(INFO) << "The operator onehot_encode is deprecated; use one_hot instead.";
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   // TODO(eric): support mixed type encoding, i.e. int index and float rhs.
   CHECK_EQ(ret->type_flag_, mshadow::default_type_flag)
-    << "one_hot_encode only support float32 as input/output";
+      << "one_hot_encode only support float32 as input/output";
   CHECK_EQ(rhs.type_flag_, mshadow::default_type_flag)
-    << "one_hot_encode only support float32 as input/output";
+      << "one_hot_encode only support float32 as input/output";
   CHECK_EQ(index.type_flag_, mshadow::default_type_flag)
-    << "one_hot_encode only support float32 as input/output";
-  ret->get<xpu, 2, real_t>(s) =
-    one_hot_encode(index.get<xpu, 1, real_t>(s),
-                   rhs.shape_[1]);
+      << "one_hot_encode only support float32 as input/output";
+  ret->get<xpu, 2, real_t>(s) = one_hot_encode(index.get<xpu, 1, real_t>(s), rhs.shape_[1]);
 }
 
-template<typename xpu, typename OP>
-void EvalMatChooseRowElem_(const TBlob &lhs, const TBlob &rhs,
-                           TBlob *ret, RunContext ctx) {
+template <typename xpu, typename OP>
+void EvalMatChooseRowElem_(const TBlob& lhs, const TBlob& rhs, TBlob* ret, RunContext ctx) {
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   // TODO(eric): support mixed type choose, i.e. int index and float rhs.
   CHECK_EQ(ret->type_flag_, mshadow::default_type_flag)
-    << "mat_choose_row_element only support float32 as input/output";
+      << "mat_choose_row_element only support float32 as input/output";
   CHECK_EQ(rhs.type_flag_, mshadow::default_type_flag)
-    << "mat_choose_row_element only support float32 as input/output";
+      << "mat_choose_row_element only support float32 as input/output";
   CHECK_EQ(lhs.type_flag_, mshadow::default_type_flag)
-    << "mat_choose_row_element only support float32 as input/output";
-  ret->get<xpu, 1, real_t>(s)
-      = mat_choose_row_element(lhs.get<xpu, 2, real_t>(s),
-                               rhs.get<xpu, 1, real_t>(s));
+      << "mat_choose_row_element only support float32 as input/output";
+  ret->get<xpu, 1, real_t>(s) =
+      mat_choose_row_element(lhs.get<xpu, 2, real_t>(s), rhs.get<xpu, 1, real_t>(s));
 }
 
-template<typename xpu, typename OP>
-void EvalMatFillRowElem_(const TBlob &lhs, const TBlob &mhs, const TBlob &rhs,
-                         TBlob *ret, RunContext ctx) {
+template <typename xpu, typename OP>
+void EvalMatFillRowElem_(const TBlob& lhs,
+                         const TBlob& mhs,
+                         const TBlob& rhs,
+                         TBlob* ret,
+                         RunContext ctx) {
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  ret->get<xpu, 2, real_t>(s)
-          = mat_fill_row_element(lhs.get<xpu, 2, real_t>(s),
-                                 mhs.get<xpu, 1, real_t>(s),
-                                 rhs.get<xpu, 1, real_t>(s));
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
+  ret->get<xpu, 2, real_t>(s) = mat_fill_row_element(
+      lhs.get<xpu, 2, real_t>(s), mhs.get<xpu, 1, real_t>(s), rhs.get<xpu, 1, real_t>(s));
 }
 
-template<typename xpu, typename OP, bool reverse>
-void EvalScalar_(const TBlob &lhs, const real_t &rhs,
-                 TBlob *ret, RunContext ctx) {
+template <typename xpu, typename OP, bool reverse>
+void EvalScalar_(const TBlob& lhs, const real_t& rhs, TBlob* ret, RunContext ctx) {
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  CHECK_EQ(ret->type_flag_, lhs.type_flag_)
-    << "Only support input/output with the same data type";
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  CHECK_EQ(ret->type_flag_, lhs.type_flag_) << "Only support input/output with the same data type";
   if (reverse) {
     MSHADOW_TYPE_SWITCH(ret->type_flag_, DType, {
-      ret->FlatTo2D<xpu, DType>(s)
-        = F<typename OP::mshadow_op>(scalar(DType(rhs)), lhs.FlatTo2D<xpu, DType>(s));
+      ret->FlatTo2D<xpu, DType>(s) =
+          F<typename OP::mshadow_op>(scalar(DType(rhs)), lhs.FlatTo2D<xpu, DType>(s));
     });
   } else {
     MSHADOW_TYPE_SWITCH(ret->type_flag_, DType, {
-      ret->FlatTo2D<xpu, DType>(s)
-        = F<typename OP::mshadow_op>(lhs.FlatTo2D<xpu, DType>(s), scalar(DType(rhs)));
+      ret->FlatTo2D<xpu, DType>(s) =
+          F<typename OP::mshadow_op>(lhs.FlatTo2D<xpu, DType>(s), scalar(DType(rhs)));
     });
   }
 }
 
-template<>
-void EvalClip<DEVICE>(const TBlob &src, const real_t &a_min, const real_t &a_max,
-                             TBlob *ret, RunContext ctx) {
+template <>
+void EvalClip<DEVICE>(const TBlob& src,
+                      const real_t& a_min,
+                      const real_t& a_max,
+                      TBlob* ret,
+                      RunContext ctx) {
   typedef DEVICE xpu;
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  CHECK_EQ(ret->type_flag_, src.type_flag_)
-    << "Only support input/output with the same data type";
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  CHECK_EQ(ret->type_flag_, src.type_flag_) << "Only support input/output with the same data type";
   MSHADOW_TYPE_SWITCH(ret->type_flag_, DType, {
-    ret->FlatTo2D<xpu, DType>(s)
-      = F<ClipMax::mshadow_op>(
-          F<ClipMin::mshadow_op>(src.FlatTo2D<xpu, DType>(s), scalar(DType(a_min))),
-          scalar(DType(a_max)));
+    ret->FlatTo2D<xpu, DType>(s) = F<ClipMax::mshadow_op>(
+        F<ClipMin::mshadow_op>(src.FlatTo2D<xpu, DType>(s), scalar(DType(a_min))),
+        scalar(DType(a_max)));
   });
 }
 
-template<>
-void EvalRandom<DEVICE, UniformDistribution>(const real_t &a,
-                                             const real_t &b,
-                                             const Resource &resource,
-                                             TBlob *ret,
+template <>
+void EvalRandom<DEVICE, UniformDistribution>(const real_t& a,
+                                             const real_t& b,
+                                             const Resource& resource,
+                                             TBlob* ret,
                                              RunContext ctx) {
   typedef DEVICE xpu;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SampleUniform(&tmp, float(a), float(b));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SampleUniform(&tmp, double(a), double(b));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
-template<>
-void EvalRandom<DEVICE, GaussianDistribution>(
-    const real_t &mu,
-    const real_t &sigma,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<DEVICE, GaussianDistribution>(const real_t& mu,
+                                              const real_t& sigma,
+                                              const Resource& resource,
+                                              TBlob* ret,
+                                              RunContext ctx) {
   typedef DEVICE xpu;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SampleGaussian(&tmp, float(mu), float(sigma));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SampleGaussian(&tmp, double(mu), double(sigma));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
 #if defined(__CUDACC__)
 
-template<>
-void EvalRandom<gpu, GammaDistribution>(
-    const real_t &alpha,
-    const real_t &beta,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<gpu, GammaDistribution>(const real_t& alpha,
+                                        const real_t& beta,
+                                        const Resource& resource,
+                                        TBlob* ret,
+                                        RunContext ctx) {
   EvalRandom<cpu, GammaDistribution>(alpha, beta, resource, ret, ctx);
 }
 
-template<>
+template <>
 void EvalRandom<gpu, ExponentialDistribution>(
-    const real_t &lambda,
-    const real_t &dummy,  // this is to satisfy the SampleOp lambda signature
-    const Resource &resource,
-    TBlob *ret,
+    const real_t& lambda,
+    const real_t& dummy,  // this is to satisfy the SampleOp lambda signature
+    const Resource& resource,
+    TBlob* ret,
     RunContext ctx) {
   EvalRandom<cpu, ExponentialDistribution>(lambda, dummy, resource, ret, ctx);
 }
 
-template<>
+template <>
 void EvalRandom<gpu, PoissonDistribution>(
-    const real_t &lambda,
-    const real_t &dummy,  // this is to satisfy the SampleOp lambda signature
-    const Resource &resource,
-    TBlob *ret,
+    const real_t& lambda,
+    const real_t& dummy,  // this is to satisfy the SampleOp lambda signature
+    const Resource& resource,
+    TBlob* ret,
     RunContext ctx) {
   EvalRandom<cpu, PoissonDistribution>(lambda, dummy, resource, ret, ctx);
 }
 
-template<>
-void EvalRandom<gpu, NegBinomialDistribution>(
-    const real_t &k,
-    const real_t &p,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<gpu, NegBinomialDistribution>(const real_t& k,
+                                              const real_t& p,
+                                              const Resource& resource,
+                                              TBlob* ret,
+                                              RunContext ctx) {
   EvalRandom<cpu, NegBinomialDistribution>(k, p, resource, ret, ctx);
 }
 
-template<>
-void EvalRandom<gpu, GenNegBinomialDistribution>(
-    const real_t &mu,
-    const real_t &alpha,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<gpu, GenNegBinomialDistribution>(const real_t& mu,
+                                                 const real_t& alpha,
+                                                 const Resource& resource,
+                                                 TBlob* ret,
+                                                 RunContext ctx) {
   EvalRandom<cpu, GenNegBinomialDistribution>(mu, alpha, resource, ret, ctx);
 }
 
 #else
 
-template<>
-void EvalRandom<cpu, GammaDistribution>(
-    const real_t &alpha,
-    const real_t &beta,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<cpu, GammaDistribution>(const real_t& alpha,
+                                        const real_t& beta,
+                                        const Resource& resource,
+                                        TBlob* ret,
+                                        RunContext ctx) {
   typedef cpu xpu;  // No support for gpu for this distribution.
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SampleGamma(&tmp, float(alpha), float(beta));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SampleGamma(&tmp, double(alpha), double(beta));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
-template<>
+template <>
 void EvalRandom<cpu, ExponentialDistribution>(
-    const real_t &lambda,
-    const real_t &dummy,  // this is to satisfy the SampleOp lambda signature
-    const Resource &resource,
-    TBlob *ret,
+    const real_t& lambda,
+    const real_t& dummy,  // this is to satisfy the SampleOp lambda signature
+    const Resource& resource,
+    TBlob* ret,
     RunContext ctx) {
   typedef cpu xpu;  // No support for gpu for this distribution.
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SampleExponential(&tmp, float(lambda));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SampleExponential(&tmp, double(lambda));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
-template<>
+template <>
 void EvalRandom<cpu, PoissonDistribution>(
-    const real_t &lambda,
-    const real_t &dummy,  // this is to satisfy the SampleOp lambda signature
-    const Resource &resource,
-    TBlob *ret,
+    const real_t& lambda,
+    const real_t& dummy,  // this is to satisfy the SampleOp lambda signature
+    const Resource& resource,
+    TBlob* ret,
     RunContext ctx) {
   typedef cpu xpu;  // No support for gpu for this distribution.
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SamplePoisson(&tmp, float(lambda));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SamplePoisson(&tmp, double(lambda));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
-template<>
-void EvalRandom<cpu, NegBinomialDistribution>(
-    const real_t &k,
-    const real_t &p,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<cpu, NegBinomialDistribution>(const real_t& k,
+                                              const real_t& p,
+                                              const Resource& resource,
+                                              TBlob* ret,
+                                              RunContext ctx) {
   typedef cpu xpu;  // No support for gpu for this distribution.
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SampleNegativeBinomial(&tmp, float(k), float(p));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SampleNegativeBinomial(&tmp, double(k), double(p));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
-template<>
-void EvalRandom<cpu, GenNegBinomialDistribution>(
-    const real_t &mu,
-    const real_t &alpha,
-    const Resource &resource,
-    TBlob *ret,
-    RunContext ctx) {
+template <>
+void EvalRandom<cpu, GenNegBinomialDistribution>(const real_t& mu,
+                                                 const real_t& alpha,
+                                                 const Resource& resource,
+                                                 TBlob* ret,
+                                                 RunContext ctx) {
   typedef cpu xpu;  // No support for gpu for this distribution.
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   switch (ret->type_flag_) {
-  case mshadow::kFloat32:
-    {
-      mshadow::Random<xpu, float> *prnd = resource.get_random<xpu, float>(s);
+    case mshadow::kFloat32: {
+      mshadow::Random<xpu, float>* prnd  = resource.get_random<xpu, float>(s);
       mshadow::Tensor<xpu, 2, float> tmp = ret->FlatTo2D<xpu, float>(s);
       prnd->SampleGeneralizedNegativeBinomial(&tmp, float(mu), float(alpha));  // NOLINT(*)
       break;
     }
-  case mshadow::kFloat64:
-    {
-      mshadow::Random<xpu, double> *prnd = resource.get_random<xpu, double>(s);
+    case mshadow::kFloat64: {
+      mshadow::Random<xpu, double>* prnd  = resource.get_random<xpu, double>(s);
       mshadow::Tensor<xpu, 2, double> tmp = ret->FlatTo2D<xpu, double>(s);
       prnd->SampleGeneralizedNegativeBinomial(&tmp, double(mu), double(alpha));  // NOLINT(*)
       break;
     }
-  default:
-    LOG(FATAL) << "Random only support float32 and float64";
+    default:
+      LOG(FATAL) << "Random only support float32 and float64";
   }
 }
 
 #endif  // #ifndef __CUDACC__
 
-template<>
-void Eval<DEVICE>(const real_t &rhs, TBlob *ret, RunContext ctx) {
-  mshadow::Stream<DEVICE> *s = ctx.get_stream<DEVICE>();
-  MSHADOW_TYPE_SWITCH_WITH_BOOL(ret->type_flag_, DType, {
-    ret->FlatTo2D<DEVICE, DType>(s) = DType(rhs);
-  });
+template <>
+void Eval<DEVICE>(const real_t& rhs, TBlob* ret, RunContext ctx) {
+  mshadow::Stream<DEVICE>* s = ctx.get_stream<DEVICE>();
+  MSHADOW_TYPE_SWITCH_WITH_BOOL(
+      ret->type_flag_, DType, { ret->FlatTo2D<DEVICE, DType>(s) = DType(rhs); });
 }
 
-template<>
-void ElementwiseSum<DEVICE>(const std::vector<TBlob> source,
-                            TBlob *dst,
-                            RunContext ctx) {
+template <>
+void ElementwiseSum<DEVICE>(const std::vector<TBlob> source, TBlob* dst, RunContext ctx) {
   typedef DEVICE xpu;
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   for (size_t i = 1; i < source.size(); ++i) {
     CHECK_EQ(source[i].type_flag_, dst->type_flag_)
-      << "Only support input/output with the same data type";
+        << "Only support input/output with the same data type";
   }
   MSHADOW_TYPE_SWITCH(dst->type_flag_, DType, {
     Tensor<xpu, 2, DType> out = dst->FlatTo2D<xpu, DType>(s);
@@ -458,14 +424,14 @@ void ElementwiseSum<DEVICE>(const std::vector<TBlob> source,
       case 2: {
         Tensor<xpu, 2, DType> in_0 = source[0].FlatTo2D<xpu, DType>(s);
         Tensor<xpu, 2, DType> in_1 = source[1].FlatTo2D<xpu, DType>(s);
-        out = in_0 + in_1;
+        out                        = in_0 + in_1;
         break;
       }
       case 3: {
         Tensor<xpu, 2, DType> in_0 = source[0].FlatTo2D<xpu, DType>(s);
         Tensor<xpu, 2, DType> in_1 = source[1].FlatTo2D<xpu, DType>(s);
         Tensor<xpu, 2, DType> in_2 = source[2].FlatTo2D<xpu, DType>(s);
-        out = in_0 + in_1 + in_2;
+        out                        = in_0 + in_1 + in_2;
         break;
       }
       case 4: {
@@ -473,12 +439,12 @@ void ElementwiseSum<DEVICE>(const std::vector<TBlob> source,
         Tensor<xpu, 2, DType> in_1 = source[1].FlatTo2D<xpu, DType>(s);
         Tensor<xpu, 2, DType> in_2 = source[2].FlatTo2D<xpu, DType>(s);
         Tensor<xpu, 2, DType> in_3 = source[3].FlatTo2D<xpu, DType>(s);
-        out = in_0 + in_1 + in_2 + in_3;
+        out                        = in_0 + in_1 + in_2 + in_3;
         break;
       }
       default: {
         Tensor<xpu, 2, DType> in_0 = source[0].FlatTo2D<xpu, DType>(s);
-        out = F<op::mshadow_op::identity>(in_0);
+        out                        = F<op::mshadow_op::identity>(in_0);
         for (size_t i = 1; i < source.size(); ++i) {
           out += source[i].FlatTo2D<xpu, DType>(s);
         }
@@ -491,23 +457,19 @@ void ElementwiseSum<DEVICE>(const std::vector<TBlob> source,
 template <>
 void EvalBroadcast<DEVICE>(TBlob const& src, TBlob* ret, int size, RunContext ctx) {
   typedef DEVICE xpu;
-  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
   mshadow::Tensor<xpu, 3> out = ret->get<xpu, 3, real_t>(s);
-  mshadow::Tensor<xpu, 2> in = src.get<xpu, 2, real_t>(s);
-  out = mshadow::expr::broadcast_with_axis(in, 0, size);
+  mshadow::Tensor<xpu, 2> in  = src.get<xpu, 2, real_t>(s);
+  out                         = mshadow::expr::broadcast_with_axis(in, 0, size);
 }
 
-template<typename OP, typename xpu>
-void BinaryOpKernelLaunch(mshadow::Stream<xpu>* s, const TBlob& lhs, const TBlob& rhs, TBlob *out) {
+template <typename OP, typename xpu>
+void BinaryOpKernelLaunch(mshadow::Stream<xpu>* s, const TBlob& lhs, const TBlob& rhs, TBlob* out) {
   using namespace op::mxnet_op;
   using namespace mshadow;
   MSHADOW_TYPE_SWITCH(out->type_flag_, DType, {
-    Kernel<op_with_req<OP, kWriteInplace>, xpu >::
-    Launch(s,
-           lhs.Size(),
-           out->dptr<DType>(),
-           lhs.dptr<DType>(),
-           rhs.dptr<DType>());
+    Kernel<op_with_req<OP, kWriteInplace>, xpu>::Launch(
+        s, lhs.Size(), out->dptr<DType>(), lhs.dptr<DType>(), rhs.dptr<DType>());
   });
 }
 // declarations
diff --git a/src/ndarray/ndarray_function.cc b/src/ndarray/ndarray_function.cc
index e0a445814314..c1a9a54ac05b 100644
--- a/src/ndarray/ndarray_function.cc
+++ b/src/ndarray/ndarray_function.cc
@@ -32,31 +32,32 @@
 
 namespace mxnet {
 namespace ndarray {
-template<>
-void Copy<cpu, cpu>(const TBlob &from, TBlob *to,
-                    Context from_ctx, Context to_ctx,
+template <>
+void Copy<cpu, cpu>(const TBlob& from,
+                    TBlob* to,
+                    Context from_ctx,
+                    Context to_ctx,
                     RunContext ctx) {
   MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(to->type_flag_, DType, {
     if (to->type_flag_ == from.type_flag_) {
       if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
-        CHECK_LT(from.Size(), (int64_t{1} << 31) - 1) <<
-                  "Size of tensor you are trying to allocate is larger than "
-                  "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+        CHECK_LT(from.Size(), (int64_t{1} << 31) - 1)
+            << "Size of tensor you are trying to allocate is larger than "
+               "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
       }
       const index_t size = static_cast<index_t>(from.Size());
       CHECK_EQ(size, to->Size()) << "copying size mismatch, from: " << size * sizeof(DType)
-               << " bytes, to: " << to->Size() * sizeof(DType) << " bytes.";
+                                 << " bytes, to: " << to->Size() * sizeof(DType) << " bytes.";
       common::ParallelCopy(to->dptr<DType>(), from.dptr<DType>(), size);
     } else {
       MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(from.type_flag_, SrcDType, {
-          to->FlatTo1D<cpu, DType>() =
-              mshadow::expr::tcast<DType>(from.FlatTo1D<cpu, SrcDType>());
+        to->FlatTo1D<cpu, DType>() = mshadow::expr::tcast<DType>(from.FlatTo1D<cpu, SrcDType>());
       })
     }
   })
 }
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 void ElementwiseSumRspImpl(mshadow::Stream<cpu>* s,
                            const std::vector<NDArray>& nds,
                            const std::vector<IType>& uniq_row_idx,
@@ -64,15 +65,15 @@ void ElementwiseSumRspImpl(mshadow::Stream<cpu>* s,
                            const int nthreads = 4) {
 #pragma omp parallel num_threads(nthreads)
   {
-    const size_t nnr = uniq_row_idx.size();
-    const int num_threads = omp_get_num_threads();
-    size_t row_block_len = (nnr + num_threads  - 1) / num_threads;
+    const size_t nnr             = uniq_row_idx.size();
+    const int num_threads        = omp_get_num_threads();
+    size_t row_block_len         = (nnr + num_threads - 1) / num_threads;
     const size_t row_block_start = omp_get_thread_num() * row_block_len;
     if (row_block_start < nnr) {
-      const size_t row_block_end = std::min(row_block_start+row_block_len, nnr);
+      const size_t row_block_end = std::min(row_block_start + row_block_len, nnr);
 
       const size_t row_length = out->data().shape_.ProdShape(1, out->data().shape_.ndim());
-      auto out_values = out->data().get_with_shape<cpu, 2, DType>(
+      auto out_values         = out->data().get_with_shape<cpu, 2, DType>(
           mshadow::Shape2(out->storage_shape()[0], row_length), s);
       auto out_indices = out->aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>();
       for (size_t i = row_block_start; i < row_block_end; ++i) {
@@ -81,24 +82,24 @@ void ElementwiseSumRspImpl(mshadow::Stream<cpu>* s,
       for (const auto& nd : nds) {
         if (nd.storage_initialized()) {
           const auto nd_indices = nd.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>();
-          const auto nd_values = nd.data().get_with_shape<cpu, 2, DType>(
+          const auto nd_values  = nd.data().get_with_shape<cpu, 2, DType>(
               mshadow::Shape2(nd.storage_shape()[0], row_length), s);
-          const auto nd_num_rows = nd.aux_shape(rowsparse::kIdx).Size();
+          const auto nd_num_rows        = nd.aux_shape(rowsparse::kIdx).Size();
           const IType* nd_indices_start = &nd_indices[0];
-          const IType* nd_indices_end = nd_indices_start + nd_num_rows;
-          const IType* row_idx_ptr = std::lower_bound(nd_indices_start, nd_indices_end,
-                                                      out_indices[row_block_start]);
+          const IType* nd_indices_end   = nd_indices_start + nd_num_rows;
+          const IType* row_idx_ptr =
+              std::lower_bound(nd_indices_start, nd_indices_end, out_indices[row_block_start]);
           // skip this nd if all of its row indices are smaller than out_indices[row_block_start]
           // or current row block is not covered by [*row_idx_ptr, nd_indices_end).
-          if (nd_indices_end == row_idx_ptr || *row_idx_ptr > out_indices[row_block_end-1]) {
+          if (nd_indices_end == row_idx_ptr || *row_idx_ptr > out_indices[row_block_end - 1]) {
             continue;
           }
           for (size_t irow = row_block_start;
                irow < row_block_end && row_idx_ptr != nd_indices_end;) {
             if (out_indices[irow] == *row_idx_ptr) {
               auto out_value_cur_row = out_values[irow];
-              const auto offset = row_idx_ptr - nd_indices_start;
-              auto nd_value_cur_row = nd_values[offset];
+              const auto offset      = row_idx_ptr - nd_indices_start;
+              auto nd_value_cur_row  = nd_values[offset];
               for (index_t j = 0; j < nd_value_cur_row.shape_[0]; ++j) {
                 out_value_cur_row[j] += nd_value_cur_row[j];
               }
@@ -120,9 +121,8 @@ void ElementwiseSumRspImpl(mshadow::Stream<cpu>* s,
  * \brief Given a vector of ndarrays, generate a index vector containing
  * all the unique row indices of the ndarrays.
  */
-template<typename IType>
-void GetUniqueRspRowIdx(const std::vector<NDArray>& nds,
-                        std::vector<IType>* uniq_row_idx) {
+template <typename IType>
+void GetUniqueRspRowIdx(const std::vector<NDArray>& nds, std::vector<IType>* uniq_row_idx) {
   using namespace rowsparse;
   size_t total_num_rows = 0;
   for (const auto& nd : nds) {
@@ -134,14 +134,14 @@ void GetUniqueRspRowIdx(const std::vector<NDArray>& nds,
 
   uniq_row_idx->resize(total_num_rows);
   int nthreads = omp_get_max_threads();
-  int offset = 0;
+  int offset   = 0;
   for (const auto& nd : nds) {
     if (nd.storage_initialized()) {
       const IType* nd_row_idx = nd.aux_data(kIdx).dptr<IType>();
-      const int num_rows = nd.aux_shape(kIdx).Size();
+      const int num_rows      = nd.aux_shape(kIdx).Size();
 #pragma omp parallel for num_threads(nthreads)
       for (int i = 0; i < num_rows; ++i) {
-        (*uniq_row_idx)[offset+i] = nd_row_idx[i];
+        (*uniq_row_idx)[offset + i] = nd_row_idx[i];
       }
       offset += num_rows;
     }
@@ -156,11 +156,11 @@ void ElementwiseSumRsp(mshadow::Stream<cpu>* s,
                        const Resource& rsc,
                        const std::vector<NDArray>& nds,
                        NDArray* out) {
-  if (nds.empty()) return;
+  if (nds.empty())
+    return;
   using namespace rowsparse;
   CHECK_EQ(out->storage_type(), kRowSparseStorage)
-    << "Expected row sparse storage type ("
-    << out->storage_type() << " given)";
+      << "Expected row sparse storage type (" << out->storage_type() << " given)";
 
   MSHADOW_TYPE_SWITCH(out->dtype(), DType, {
     MSHADOW_IDX_TYPE_SWITCH(out->aux_type(kIdx), IType, {
@@ -183,21 +183,30 @@ void ElementwiseSumDnsCsrDnsImpl(mshadow::Stream<cpu>* s,
   using namespace mxnet::op::mxnet_op;
   const TBlob& out_data = out->data();
   MSHADOW_TYPE_SWITCH(out->dtype(), DType, {  // data type
-    Kernel<Sum, cpu>::Launch(
-      s, out_data.Size(), out_data.dptr<DType>(), kWriteTo, nds[0].data().dptr<DType>(),
-      nds[2].data().dptr<DType>());
-    const TBlob& csr_data = nds[1].data();
-    const TBlob& csr_indices = nds[1].aux_data(csr::kIdx);
-    const TBlob& csr_indptr = nds[1].aux_data(csr::kIndPtr);
+    Kernel<Sum, cpu>::Launch(s,
+                             out_data.Size(),
+                             out_data.dptr<DType>(),
+                             kWriteTo,
+                             nds[0].data().dptr<DType>(),
+                             nds[2].data().dptr<DType>());
+    const TBlob& csr_data      = nds[1].data();
+    const TBlob& csr_indices   = nds[1].aux_data(csr::kIdx);
+    const TBlob& csr_indptr    = nds[1].aux_data(csr::kIndPtr);
     const nnvm::dim_t num_rows = nds[1].shape()[0];
     const nnvm::dim_t num_cols = nds[1].shape()[1];
-    MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {  // indices type
+    MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {   // indices type
       MSHADOW_IDX_TYPE_SWITCH(csr_indptr.type_flag_, CType, {  // indptr type
         if (nds[1].storage_initialized()) {
           Kernel<ElemwiseDnsCsrDnsKernel<kWriteTo, mshadow_op::plus>, cpu>::Launch(
-            s, num_rows, out_data.dptr<DType>(), out_data.dptr<DType>(),
-            csr_data.dptr<DType>(), csr_indices.dptr<IType>(),
-            csr_indptr.dptr<CType>(), num_rows, num_cols);
+              s,
+              num_rows,
+              out_data.dptr<DType>(),
+              out_data.dptr<DType>(),
+              csr_data.dptr<DType>(),
+              csr_indices.dptr<IType>(),
+              csr_indptr.dptr<CType>(),
+              num_rows,
+              num_cols);
         }
       });
     });
@@ -218,13 +227,13 @@ void ElementwiseSumContainsDnsImpl(mshadow::Stream<cpu>* s,
       Kernel<set_zero, cpu>::Launch(s, out_data.Size(), out_data.dptr<DType>());
     }
     for (size_t i = 0; i < nds.size(); ++i) {
-      const NDArray& nd = nds[i];
+      const NDArray& nd    = nds[i];
       const TBlob& nd_data = nd.data();
 
       if (i == 0) {
         if (nd.storage_type() == kDefaultStorage) {
           Kernel<op_with_req<mshadow_op::identity, kWriteTo>, cpu>::Launch(
-            s, out_data.Size(), out_data.dptr<DType>(), nd_data.dptr<DType>());
+              s, out_data.Size(), out_data.dptr<DType>(), nd_data.dptr<DType>());
           continue;
         } else {
           Kernel<set_zero, cpu>::Launch(s, out_data.Size(), out_data.dptr<DType>());
@@ -233,39 +242,53 @@ void ElementwiseSumContainsDnsImpl(mshadow::Stream<cpu>* s,
 
       switch (nd.storage_type()) {
         case kDefaultStorage: {
-          Kernel<op_with_req<mshadow_op::plus, kWriteTo>, cpu>::Launch(
-            s, out_data.Size(), out_data.dptr<DType>(), out_data.dptr<DType>(),
-            nd_data.dptr<DType>());
+          Kernel<op_with_req<mshadow_op::plus, kWriteTo>, cpu>::Launch(s,
+                                                                       out_data.Size(),
+                                                                       out_data.dptr<DType>(),
+                                                                       out_data.dptr<DType>(),
+                                                                       nd_data.dptr<DType>());
           break;
         }
         case kCSRStorage: {
-          const TBlob& nd_indices = nd.aux_data(csr::kIdx);
-          const TBlob& nd_indptr = nd.aux_data(csr::kIndPtr);
+          const TBlob& nd_indices    = nd.aux_data(csr::kIdx);
+          const TBlob& nd_indptr     = nd.aux_data(csr::kIndPtr);
           const nnvm::dim_t num_rows = nd.shape()[0];
           const nnvm::dim_t num_cols = nd.shape()[1];
-          MSHADOW_IDX_TYPE_SWITCH(nd_indices.type_flag_, IType, {  // indices type
+          MSHADOW_IDX_TYPE_SWITCH(nd_indices.type_flag_, IType, {   // indices type
             MSHADOW_IDX_TYPE_SWITCH(nd_indptr.type_flag_, CType, {  // indptr type
               if (nd.storage_initialized()) {
                 Kernel<ElemwiseDnsCsrDnsKernel<kWriteTo, mshadow_op::plus>, cpu>::Launch(
-                  s, num_rows, out_data.dptr<DType>(), out_data.dptr<DType>(),
-                  nd_data.dptr<DType>(), nd_indices.dptr<IType>(),
-                  nd_indptr.dptr<CType>(), num_rows, num_cols);
+                    s,
+                    num_rows,
+                    out_data.dptr<DType>(),
+                    out_data.dptr<DType>(),
+                    nd_data.dptr<DType>(),
+                    nd_indices.dptr<IType>(),
+                    nd_indptr.dptr<CType>(),
+                    num_rows,
+                    num_cols);
               }
             });
           });
           break;
         }
         case kRowSparseStorage: {
-          const TBlob& nd_indices = nd.aux_data(rowsparse::kIdx);
+          const TBlob& nd_indices    = nd.aux_data(rowsparse::kIdx);
           const nnvm::dim_t num_rows = nd.shape()[0];
           const nnvm::dim_t num_cols = nd.shape()[1];
           MSHADOW_IDX_TYPE_SWITCH(nd_indices.type_flag_, IType, {  // indices type
             if (nd.storage_initialized()) {
               const nnvm::dim_t nz_rows = nd_indices.Size();
               Kernel<ElemwiseDnsRspDnsKernel<kWriteTo, mshadow_op::plus>, cpu>::Launch(
-                s, nz_rows * num_cols, out_data.dptr<DType>(),
-                out_data.dptr<DType>(), nd_data.dptr<DType>(), nd_indices.dptr<IType>(),
-                num_rows, nz_rows, num_cols);
+                  s,
+                  nz_rows * num_cols,
+                  out_data.dptr<DType>(),
+                  out_data.dptr<DType>(),
+                  nd_data.dptr<DType>(),
+                  nd_indices.dptr<IType>(),
+                  num_rows,
+                  nz_rows,
+                  num_cols);
             }
           });
           break;
@@ -281,12 +304,13 @@ void ElementwiseSumContainsDnsImpl(mshadow::Stream<cpu>* s,
  * \brief Parallel cpu impl of elemwise sum for sparse tensors.
  * Currently only support row sparse sum.
  */
-template<>
+template <>
 void ElementwiseSum<cpu>(mshadow::Stream<cpu>* s,
                          const Resource& rsc,
                          const std::vector<NDArray>& nds,
                          NDArray* out) {
-  if (nds.empty()) return;
+  if (nds.empty())
+    return;
   if (common::ContainsOnlyStorage(nds, kRowSparseStorage)) {
     ElementwiseSumRsp(s, rsc, nds, out);
   } else if (nds.size() == 3U && nds[0].storage_type() == kDefaultStorage &&
@@ -302,11 +326,9 @@ void ElementwiseSum<cpu>(mshadow::Stream<cpu>* s,
   }
 }
 
-
-template<>
-void Eval<cpu>(mshadow::Stream<cpu> *s,
-               const real_t val, const NDArray& dst) {
-  NDArray temp = dst;
+template <>
+void Eval<cpu>(mshadow::Stream<cpu>* s, const real_t val, const NDArray& dst) {
+  NDArray temp                   = dst;
   const NDArrayStorageType stype = temp.storage_type();
   if (stype == kRowSparseStorage) {
     SetValueRspImpl(s, val, &temp);
diff --git a/src/ndarray/ndarray_function.cu b/src/ndarray/ndarray_function.cu
index e00b4c3f948e..f6189f939131 100644
--- a/src/ndarray/ndarray_function.cu
+++ b/src/ndarray/ndarray_function.cu
@@ -38,56 +38,56 @@
 
 namespace mxnet {
 namespace ndarray {
-template<>
-void Copy<cpu, gpu>(const TBlob &from, TBlob *to,
-                    Context from_ctx, Context to_ctx,
+template <>
+void Copy<cpu, gpu>(const TBlob& from,
+                    TBlob* to,
+                    Context from_ctx,
+                    Context to_ctx,
                     RunContext ctx) {
   CHECK_EQ(to->type_flag_, from.type_flag_)
-    << "Source and target must have the same data type when copying across devices.";
+      << "Source and target must have the same data type when copying across devices.";
   MSHADOW_TYPE_SWITCH_WITH_BOOL(to->type_flag_, DType, {
-    mshadow::Copy(to->FlatTo1D<gpu, DType>(),
-                  from.FlatTo1D<cpu, DType>(),
-                  ctx.get_stream<gpu>());
+    mshadow::Copy(to->FlatTo1D<gpu, DType>(), from.FlatTo1D<cpu, DType>(), ctx.get_stream<gpu>());
   });
 }
 
-template<>
-void Copy<gpu, cpu>(const TBlob &from, TBlob *to,
-                    Context from_ctx, Context to_ctx,
+template <>
+void Copy<gpu, cpu>(const TBlob& from,
+                    TBlob* to,
+                    Context from_ctx,
+                    Context to_ctx,
                     RunContext ctx) {
   CHECK_EQ(to->type_flag_, from.type_flag_)
-    << "Source and target must have the same data type when copying across devices.";
+      << "Source and target must have the same data type when copying across devices.";
   MSHADOW_TYPE_SWITCH_WITH_BOOL(to->type_flag_, DType, {
-    mshadow::Copy(to->FlatTo1D<cpu, DType>(),
-                  from.FlatTo1D<gpu, DType>(),
-                  ctx.get_stream<gpu>());
+    mshadow::Copy(to->FlatTo1D<cpu, DType>(), from.FlatTo1D<gpu, DType>(), ctx.get_stream<gpu>());
   });
 }
 
-template<>
-void Copy<gpu, gpu>(const TBlob &from, TBlob *to,
-                    Context from_ctx, Context to_ctx,
+template <>
+void Copy<gpu, gpu>(const TBlob& from,
+                    TBlob* to,
+                    Context from_ctx,
+                    Context to_ctx,
                     RunContext ctx) {
   if (from_ctx.dev_id == to_ctx.dev_id) {
     mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
     MSHADOW_TYPE_SWITCH_WITH_BOOL(to->type_flag_, DType, {
       if (to->type_flag_ == from.type_flag_) {
-        mshadow::Copy(to->FlatTo1D<gpu, DType>(s),
-                      from.FlatTo1D<gpu, DType>(s),
-                      s);
+        mshadow::Copy(to->FlatTo1D<gpu, DType>(s), from.FlatTo1D<gpu, DType>(s), s);
       } else {
         MSHADOW_TYPE_SWITCH_WITH_BOOL(from.type_flag_, SrcDType, {
           to->FlatTo1D<gpu, DType>(s) =
-            mshadow::expr::tcast<DType>(from.FlatTo1D<gpu, SrcDType>(s));
+              mshadow::expr::tcast<DType>(from.FlatTo1D<gpu, SrcDType>(s));
         })
       }
     })
   } else {
     CHECK(from.CheckContiguous() && to->CheckContiguous())
-      << "copy across only support contiguous memory";
+        << "copy across only support contiguous memory";
     CHECK_EQ(to->type_flag_, from.type_flag_)
-      << "Source and target must have the same data type when copying across devices.";
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+        << "Source and target must have the same data type when copying across devices.";
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
     CHECK(s != nullptr) << "need stream in GPU context";
     cudaMemcpyPeerAsync(to->dptr_,
                         to_ctx.dev_id,
@@ -109,7 +109,7 @@ void ElementwiseSumRspImpl(mshadow::Stream<gpu>* s,
   using namespace rowsparse;
   using nnvm::dim_t;
   CHECK_EQ(out->storage_type(), kRowSparseStorage)
-    << "Expected rowsparse storage_type (" << out->storage_type() << " given)";
+      << "Expected rowsparse storage_type (" << out->storage_type() << " given)";
   int init = 0;
   for (const auto& nd : nds) {
     if (nd.storage_initialized()) {
@@ -121,68 +121,59 @@ void ElementwiseSumRspImpl(mshadow::Stream<gpu>* s,
     FillZerosRspImpl(s, *out);
     return;
   }
-  const dim_t num_rows = out->shape()[0];
+  const dim_t num_rows   = out->shape()[0];
   const dim_t row_length = out->shape().ProdShape(1, out->shape().ndim());
-  MSHADOW_TYPE_SWITCH(out->dtype(), DType, {  // data type
+  MSHADOW_TYPE_SWITCH(out->dtype(), DType, {               // data type
     MSHADOW_IDX_TYPE_SWITCH(out->aux_type(kIdx), IType, {  // row_idx type
       // Allocate temporary storage for row_flg array and cub's prefix sum operation
-      IType* row_flg = nullptr;
-      void* d_temp_storage = nullptr;
+      IType* row_flg            = nullptr;
+      void* d_temp_storage      = nullptr;
       size_t temp_storage_bytes = 0;
-      cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-      cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                    temp_storage_bytes,
-                                    row_flg,
-                                    row_flg,
-                                    num_rows,
-                                    stream);
-      mshadow::Tensor<gpu, 1, char> workspace = rsc
-          .get_space_typed<gpu, 1, char>(mshadow::Shape1(num_rows * sizeof(IType) +
-                                                         temp_storage_bytes), s);
-      row_flg = reinterpret_cast<IType*>(workspace.dptr_);
-      d_temp_storage = workspace.dptr_ + num_rows*sizeof(IType);
+      cudaStream_t stream       = mshadow::Stream<gpu>::GetStream(s);
+      cub::DeviceScan::InclusiveSum(
+          d_temp_storage, temp_storage_bytes, row_flg, row_flg, num_rows, stream);
+      mshadow::Tensor<gpu, 1, char> workspace = rsc.get_space_typed<gpu, 1, char>(
+          mshadow::Shape1(num_rows * sizeof(IType) + temp_storage_bytes), s);
+      row_flg        = reinterpret_cast<IType*>(workspace.dptr_);
+      d_temp_storage = workspace.dptr_ + num_rows * sizeof(IType);
       // Mark row_flg array with 0 for zero rows and 1 for non-zero rows
       dim_t num_threads = num_rows;
       mxnet_op::Kernel<mxnet_op::set_zero, gpu>::Launch(s, num_threads, row_flg);
       for (const auto& nd : nds) {
         if (nd.storage_initialized()) {
           const IType* nd_row_idx = nd.aux_data(kIdx).dptr<IType>();
-          const dim_t nd_nnr = nd.storage_shape()[0];
-          num_threads = nd_nnr;
-          mxnet_op::Kernel<MarkRspRowFlgKernel, gpu>::Launch(s, num_threads,
-              row_flg, nd_row_idx, nd_nnr);
+          const dim_t nd_nnr      = nd.storage_shape()[0];
+          num_threads             = nd_nnr;
+          mxnet_op::Kernel<MarkRspRowFlgKernel, gpu>::Launch(
+              s, num_threads, row_flg, nd_row_idx, nd_nnr);
         }
       }
       // Compute inclusive prefix sum over row_flg
-      cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                    temp_storage_bytes,
-                                    row_flg,
-                                    row_flg,
-                                    num_rows,
-                                    stream);
+      cub::DeviceScan::InclusiveSum(
+          d_temp_storage, temp_storage_bytes, row_flg, row_flg, num_rows, stream);
       // Get total number of output non-zero rows from GPU and allocate out data and row_idx
       dim_t nnr_out = 0;
-      CUDA_CALL(cudaMemcpyAsync(&nnr_out, &row_flg[num_rows-1], sizeof(dim_t),
-                                cudaMemcpyDeviceToHost, stream));
+      CUDA_CALL(cudaMemcpyAsync(
+          &nnr_out, &row_flg[num_rows - 1], sizeof(dim_t), cudaMemcpyDeviceToHost, stream));
       CUDA_CALL(cudaStreamSynchronize(stream));
       out->CheckAndAlloc({mshadow::Shape1(nnr_out)});
       IType* out_row_idx = out->aux_data(kIdx).dptr<IType>();
-      DType* out_data = out->data().dptr<DType>();
+      DType* out_data    = out->data().dptr<DType>();
       // Fill row_idx array of output using row_flg
       num_threads = num_rows;
-      mxnet_op::Kernel<FillRspRowIdxKernel, gpu>::Launch(s, num_threads,
-          out_row_idx, row_flg, num_rows);
+      mxnet_op::Kernel<FillRspRowIdxKernel, gpu>::Launch(
+          s, num_threads, out_row_idx, row_flg, num_rows);
       // Perform elementwise addition, writing to output data
       num_threads = nnr_out * row_length;
       mxnet_op::Kernel<mxnet_op::set_zero, gpu>::Launch(s, num_threads, out_data);
       for (const auto& nd : nds) {
         if (nd.storage_initialized()) {
           const IType* nd_row_idx = nd.aux_data(kIdx).dptr<IType>();
-          const DType* nd_data = nd.data().dptr<DType>();
-          const dim_t nd_nnr = nd.storage_shape()[0];
-          num_threads = nd_nnr * row_length;
-          mxnet_op::Kernel<ElementWiseRspAdditionKernel, gpu>::Launch(s, num_threads,
-              out_data, row_flg, nd_row_idx, nd_data, nd_nnr, row_length);
+          const DType* nd_data    = nd.data().dptr<DType>();
+          const dim_t nd_nnr      = nd.storage_shape()[0];
+          num_threads             = nd_nnr * row_length;
+          mxnet_op::Kernel<ElementWiseRspAdditionKernel, gpu>::Launch(
+              s, num_threads, out_data, row_flg, nd_row_idx, nd_data, nd_nnr, row_length);
         }
       }
     });
@@ -197,21 +188,30 @@ void ElementwiseSumDnsCsrDnsImpl(mshadow::Stream<gpu>* s,
   using namespace mxnet::op::mxnet_op;
   const TBlob& out_data = out->data();
   MSHADOW_TYPE_SWITCH(out->dtype(), DType, {  // data type
-    Kernel<Sum, gpu>::Launch(
-      s, out_data.Size(), out_data.dptr<DType>(), kWriteTo, nds[0].data().dptr<DType>(),
-      nds[2].data().dptr<DType>());
-    const TBlob& csr_data = nds[1].data();
-    const TBlob& csr_indices = nds[1].aux_data(csr::kIdx);
-    const TBlob& csr_indptr = nds[1].aux_data(csr::kIndPtr);
+    Kernel<Sum, gpu>::Launch(s,
+                             out_data.Size(),
+                             out_data.dptr<DType>(),
+                             kWriteTo,
+                             nds[0].data().dptr<DType>(),
+                             nds[2].data().dptr<DType>());
+    const TBlob& csr_data      = nds[1].data();
+    const TBlob& csr_indices   = nds[1].aux_data(csr::kIdx);
+    const TBlob& csr_indptr    = nds[1].aux_data(csr::kIndPtr);
     const nnvm::dim_t num_rows = nds[1].shape()[0];
     const nnvm::dim_t num_cols = nds[1].shape()[1];
-    MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {  // indices type
+    MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {   // indices type
       MSHADOW_IDX_TYPE_SWITCH(csr_indptr.type_flag_, CType, {  // indptr type
         if (nds[1].storage_initialized()) {
           Kernel<ElemwiseDnsCsrDnsWarpKernel<kWriteTo, mshadow_op::plus>, gpu>::Launch(
-            s, kWarpSize * num_rows, out_data.dptr<DType>(), out_data.dptr<DType>(),
-            csr_data.dptr<DType>(), csr_indices.dptr<IType>(),
-            csr_indptr.dptr<CType>(), num_rows, num_cols);
+              s,
+              kWarpSize * num_rows,
+              out_data.dptr<DType>(),
+              out_data.dptr<DType>(),
+              csr_data.dptr<DType>(),
+              csr_indices.dptr<IType>(),
+              csr_indptr.dptr<CType>(),
+              num_rows,
+              num_cols);
         }
       });
     });
@@ -219,23 +219,23 @@ void ElementwiseSumDnsCsrDnsImpl(mshadow::Stream<gpu>* s,
 }
 
 void ElementwiseSumContainsDnsImpl(mshadow::Stream<gpu>* s,
-                                 const Resource& rsc,
-                                 const std::vector<NDArray>& nds,
-                                 NDArray* out) {
+                                   const Resource& rsc,
+                                   const std::vector<NDArray>& nds,
+                                   NDArray* out) {
   using namespace mxnet::op;
   using namespace mxnet::op::mxnet_op;
   const TBlob& out_data = out->data();
   MSHADOW_TYPE_SWITCH(out->dtype(), DType, {  // data type
     for (size_t i = 0; i < nds.size(); ++i) {
-      const NDArray& nd = nds[i];
+      const NDArray& nd          = nds[i];
       const nnvm::dim_t num_rows = nd.shape()[0];
       const nnvm::dim_t num_cols = nd.shape()[1];
-      const TBlob& nd_data = nd.data();
+      const TBlob& nd_data       = nd.data();
 
       if (i == 0) {
         if (nd.storage_type() == kDefaultStorage) {
           Kernel<op_with_req<mshadow_op::identity, kWriteTo>, gpu>::Launch(
-            s, out_data.Size(), out_data.dptr<DType>(), nd_data.dptr<DType>());
+              s, out_data.Size(), out_data.dptr<DType>(), nd_data.dptr<DType>());
           continue;
         } else {
           Kernel<set_zero, gpu>::Launch(s, out_data.Size(), out_data.dptr<DType>());
@@ -244,21 +244,29 @@ void ElementwiseSumContainsDnsImpl(mshadow::Stream<gpu>* s,
 
       switch (nd.storage_type()) {
         case kDefaultStorage: {
-          Kernel<op_with_req<mshadow_op::plus, kWriteTo>, gpu>::Launch(
-            s, out_data.Size(), out_data.dptr<DType>(), out_data.dptr<DType>(),
-            nd_data.dptr<DType>());
+          Kernel<op_with_req<mshadow_op::plus, kWriteTo>, gpu>::Launch(s,
+                                                                       out_data.Size(),
+                                                                       out_data.dptr<DType>(),
+                                                                       out_data.dptr<DType>(),
+                                                                       nd_data.dptr<DType>());
           break;
         }
         case kCSRStorage: {
           const TBlob& nd_indices = nd.aux_data(csr::kIdx);
-          const TBlob& nd_indptr = nd.aux_data(csr::kIndPtr);
-          MSHADOW_IDX_TYPE_SWITCH(nd_indices.type_flag_, IType, {  // indices type
+          const TBlob& nd_indptr  = nd.aux_data(csr::kIndPtr);
+          MSHADOW_IDX_TYPE_SWITCH(nd_indices.type_flag_, IType, {   // indices type
             MSHADOW_IDX_TYPE_SWITCH(nd_indptr.type_flag_, CType, {  // indptr type
               if (nd.storage_initialized()) {
                 Kernel<ElemwiseDnsCsrDnsWarpKernel<kWriteTo, mshadow_op::plus>, gpu>::Launch(
-                  s, kWarpSize * num_rows, out_data.dptr<DType>(), out_data.dptr<DType>(),
-                  nd_data.dptr<DType>(), nd_indices.dptr<IType>(),
-                  nd_indptr.dptr<CType>(), num_rows, num_cols);
+                    s,
+                    kWarpSize * num_rows,
+                    out_data.dptr<DType>(),
+                    out_data.dptr<DType>(),
+                    nd_data.dptr<DType>(),
+                    nd_indices.dptr<IType>(),
+                    nd_indptr.dptr<CType>(),
+                    num_rows,
+                    num_cols);
               }
             });
           });
@@ -270,9 +278,15 @@ void ElementwiseSumContainsDnsImpl(mshadow::Stream<gpu>* s,
             if (nd.storage_initialized()) {
               const nnvm::dim_t nz_rows = nd_indices.Size();
               Kernel<ElemwiseDnsRspDnsKernel<kWriteTo, mshadow_op::plus>, gpu>::Launch(
-                s, nz_rows * num_cols, out_data.dptr<DType>(),
-                out_data.dptr<DType>(), nd_data.dptr<DType>(), nd_indices.dptr<IType>(),
-                num_rows, nz_rows, num_cols);
+                  s,
+                  nz_rows * num_cols,
+                  out_data.dptr<DType>(),
+                  out_data.dptr<DType>(),
+                  nd_data.dptr<DType>(),
+                  nd_indices.dptr<IType>(),
+                  num_rows,
+                  nz_rows,
+                  num_cols);
             }
           });
           break;
@@ -288,12 +302,13 @@ void ElementwiseSumContainsDnsImpl(mshadow::Stream<gpu>* s,
  * \brief Parallel gpu impl of elemwise sum for sparse tensors.
  * Currently only support row sparse sum.
  */
-template<>
+template <>
 void ElementwiseSum<gpu>(mshadow::Stream<gpu>* s,
                          const Resource& rsc,
                          const std::vector<NDArray>& nds,
                          NDArray* out) {
-  if (nds.empty()) return;
+  if (nds.empty())
+    return;
   if (common::ContainsOnlyStorage(nds, kRowSparseStorage)) {
     ElementwiseSumRspImpl(s, rsc, nds, out);
   } else if (nds.size() == 3U && nds[0].storage_type() == kDefaultStorage &&
@@ -305,14 +320,13 @@ void ElementwiseSum<gpu>(mshadow::Stream<gpu>* s,
     ElementwiseSumContainsDnsImpl(s, rsc, nds, out);
   } else {
     LOG(FATAL) << "ElementwiseSum<gpu> has not been implemented for storage_type = << "
-        << nds[0].storage_type();
+               << nds[0].storage_type();
   }
 }
 
-template<>
-void Eval<gpu>(mshadow::Stream<gpu> *s,
-               const real_t val, const NDArray& dst) {
-  NDArray temp = dst;
+template <>
+void Eval<gpu>(mshadow::Stream<gpu>* s, const real_t val, const NDArray& dst) {
+  NDArray temp                   = dst;
   const NDArrayStorageType stype = temp.storage_type();
   if (stype == kRowSparseStorage) {
     SetValueRspImpl(s, val, &temp);
diff --git a/src/ndarray/ndarray_function.h b/src/ndarray/ndarray_function.h
index 505bd205a8d5..003eda951905 100644
--- a/src/ndarray/ndarray_function.h
+++ b/src/ndarray/ndarray_function.h
@@ -38,7 +38,7 @@ namespace mxnet {
 /*! \brief namespace to support all possible Ndarray operator */
 namespace ndarray {
 struct BinaryBase {
-  inline static mxnet::TShape GetShape(const mxnet::TShape &lshape, const mxnet::TShape &rshape) {
+  inline static mxnet::TShape GetShape(const mxnet::TShape& lshape, const mxnet::TShape& rshape) {
     CHECK(lshape == rshape) << "operands shape mismatch";
     CHECK(!mxnet::op::shape_is_none(lshape)) << "source operand have zero dimension shape";
     return lshape;
@@ -68,7 +68,7 @@ struct Mod : public BinaryBase {
 
 struct ClipMin : public BinaryBase {
   struct mshadow_op {
-    template<typename DType>
+    template <typename DType>
     MSHADOW_XINLINE static DType Map(DType a, DType b) {
       if (a < b) {
         return b;
@@ -81,7 +81,7 @@ struct ClipMin : public BinaryBase {
 
 struct ClipMax : public BinaryBase {
   struct mshadow_op {
-    template<typename DType>
+    template <typename DType>
     MSHADOW_XINLINE static DType Map(DType a, DType b) {
       if (a > b) {
         return b;
@@ -92,9 +92,8 @@ struct ClipMax : public BinaryBase {
   };
 };
 
-
 struct OneHotEncode {
-  inline static mxnet::TShape GetShape(const mxnet::TShape &index, const mxnet::TShape &proptype) {
+  inline static mxnet::TShape GetShape(const mxnet::TShape& index, const mxnet::TShape& proptype) {
     CHECK(index.ndim() == 1 && proptype.ndim() == 2) << "OneHotEncode only support 1d index.";
     CHECK_EQ(index[0], proptype[0]) << "OneHotEncode shape inconsistent";
     return proptype;
@@ -102,7 +101,7 @@ struct OneHotEncode {
 };
 
 struct MatChooseRowElem {
-  inline static mxnet::TShape GetShape(const mxnet::TShape &lshape, const mxnet::TShape &rshape) {
+  inline static mxnet::TShape GetShape(const mxnet::TShape& lshape, const mxnet::TShape& rshape) {
     CHECK(lshape.ndim() == 2 && rshape.ndim() == 1)
         << "choose_row_element only support 2D Matrix and 1D index";
     CHECK_EQ(lshape[0], rshape[0]) << "choose_row_element index and matrix shape mismatch";
@@ -111,9 +110,9 @@ struct MatChooseRowElem {
 };
 
 struct MatFillRowElem {
-  inline static mxnet::TShape GetShape(const mxnet::TShape &lshape,
-                                       const mxnet::TShape &mshape,
-                                       const mxnet::TShape &rshape) {
+  inline static mxnet::TShape GetShape(const mxnet::TShape& lshape,
+                                       const mxnet::TShape& mshape,
+                                       const mxnet::TShape& rshape) {
     CHECK(lshape.ndim() == 2 && mshape.ndim() == 1 && rshape.ndim() == 1)
         << "fill_row_element only support 2D Matrix, 1D value and 1D index";
     CHECK((lshape[0] == mshape[0]) && (mshape[0] == rshape[0]))
@@ -137,46 +136,46 @@ struct NegBinomialDistribution {};
 
 struct GenNegBinomialDistribution {};
 
-template<typename Device>
-void EvalClip(const TBlob &src, const real_t &a_min, const real_t &a_max,
-              TBlob *ret, RunContext ctx);
+template <typename Device>
+void EvalClip(const TBlob& src,
+              const real_t& a_min,
+              const real_t& a_max,
+              TBlob* ret,
+              RunContext ctx);
 
-template<typename Device, typename OP>
-void Eval(const TBlob &lhs, const TBlob &mhs, const TBlob &rhs, TBlob *ret, RunContext ctx);
+template <typename Device, typename OP>
+void Eval(const TBlob& lhs, const TBlob& mhs, const TBlob& rhs, TBlob* ret, RunContext ctx);
 
-template<typename Device, typename OP>
-void Eval(const TBlob &lhs, const TBlob &rhs, TBlob *ret, RunContext ctx);
+template <typename Device, typename OP>
+void Eval(const TBlob& lhs, const TBlob& rhs, TBlob* ret, RunContext ctx);
 
-template<typename Device, typename OP>
-void Eval(const TBlob &src, TBlob *ret, RunContext ctx);
+template <typename Device, typename OP>
+void Eval(const TBlob& src, TBlob* ret, RunContext ctx);
 
-template<typename Device, typename OP, bool reverse>
-void Eval(const TBlob &lhs, const real_t &rhs, TBlob *ret, RunContext ctx);
+template <typename Device, typename OP, bool reverse>
+void Eval(const TBlob& lhs, const real_t& rhs, TBlob* ret, RunContext ctx);
 
-template<typename Device>
-void Eval(const real_t &rhs, TBlob *ret, RunContext ctx);
+template <typename Device>
+void Eval(const real_t& rhs, TBlob* ret, RunContext ctx);
 
-template<typename Device, typename Distribution>
-void EvalRandom(const real_t &a,
-                const real_t &b,
-                const Resource &resource,
-                TBlob *ret,  RunContext ctx);
+template <typename Device, typename Distribution>
+void EvalRandom(const real_t& a,
+                const real_t& b,
+                const Resource& resource,
+                TBlob* ret,
+                RunContext ctx);
 
 // copy function when only cpu is involved
-template<typename DeviceFrom, typename DeviceTo>
-void Copy(const TBlob &from, TBlob *to,
-          Context from_ctx, Context to_ctx,
-          RunContext ctx);
+template <typename DeviceFrom, typename DeviceTo>
+void Copy(const TBlob& from, TBlob* to, Context from_ctx, Context to_ctx, RunContext ctx);
 
-template<typename Device>
-void ElementwiseSum(const std::vector<TBlob> source,
-                    TBlob *out,
-                    RunContext ctx);
+template <typename Device>
+void ElementwiseSum(const std::vector<TBlob> source, TBlob* out, RunContext ctx);
 
 /*!
  * \brief Interface for parallel impl of elemwise sum for sparse matrices
  */
-template<typename xpu>
+template <typename xpu>
 void ElementwiseSum(mshadow::Stream<xpu>* s,
                     const Resource& rsc,
                     const std::vector<NDArray>& nds,
@@ -188,9 +187,8 @@ void ElementwiseSum(mshadow::Stream<xpu>* s,
  * \param val - The value to be set
  * \param dst - NDArray which is to be set to val
  */
-template<typename xpu>
-void SetValueRspImpl(mshadow::Stream<xpu> *s,
-                     const real_t val, NDArray *dst) {
+template <typename xpu>
+void SetValueRspImpl(mshadow::Stream<xpu>* s, const real_t val, NDArray* dst) {
   CHECK_EQ(dst->storage_type(), kRowSparseStorage);
   using namespace mxnet::op;
   nnvm::dim_t nnr = dst->shape()[0];
@@ -202,17 +200,15 @@ void SetValueRspImpl(mshadow::Stream<xpu> *s,
   Fill<false>(s, dst->data(), kWriteTo, val);
 }
 
-template<typename xpu>
-void Eval(mshadow::Stream<xpu> *s,
-          const real_t val, const NDArray& dst);
+template <typename xpu>
+void Eval(mshadow::Stream<xpu>* s, const real_t val, const NDArray& dst);
 
 // broadcasting
 template <typename Device>
 void EvalBroadcast(TBlob const& src, TBlob* ret, int size, RunContext ctx);
 
 template <typename OP, typename xpu>
-void BinaryOpKernelImpl(mshadow::Stream<xpu> *s, const TBlob& lhs,
-                        const TBlob& rhs, TBlob *out);
+void BinaryOpKernelImpl(mshadow::Stream<xpu>* s, const TBlob& lhs, const TBlob& rhs, TBlob* out);
 
 }  // namespace ndarray
 }  // namespace mxnet
diff --git a/src/nnvm/amp_infer_unknown.cc b/src/nnvm/amp_infer_unknown.cc
index c457905a3b68..3353a28f4b43 100644
--- a/src/nnvm/amp_infer_unknown.cc
+++ b/src/nnvm/amp_infer_unknown.cc
@@ -36,24 +36,25 @@
 #include "../operator/tensor/amp_cast.h"
 
 namespace mxnet {
-using nnvm::Graph;
-using nnvm::ObjectPtr;
-using nnvm::NodeEntry;
 using dmlc::any;
 using mxnet::op::AMPCastParam;
+using nnvm::Graph;
+using nnvm::NodeEntry;
+using nnvm::ObjectPtr;
 
 // If a var node is not visited, visit it and set inferred_dtype_result as result_dtype,
 // If already visited compare the result_dtype with existing inferred_dtype_result
 static void CheckAndUpdateInferredDtypes(
-    const nnvm::DTypeVector &inferred_dtypes, const nnvm::IndexedGraph &idx,
-    const NodeEntry &node_entry,
+    const nnvm::DTypeVector& inferred_dtypes,
+    const nnvm::IndexedGraph& idx,
+    const NodeEntry& node_entry,
     mshadow::TypeFlag result_dtype,
-    std::unordered_map<std::string, mshadow::TypeFlag> *visited_vars,
-    nnvm::DTypeVector *inferred_dtype_result) {
-  const ObjectPtr &input_node = node_entry.node;
+    std::unordered_map<std::string, mshadow::TypeFlag>* visited_vars,
+    nnvm::DTypeVector* inferred_dtype_result) {
+  const ObjectPtr& input_node = node_entry.node;
   if (!visited_vars->count(input_node->attrs.name)) {
     if ((*inferred_dtype_result)[idx.entry_id(node_entry)] == -1) {
-      (*visited_vars)[input_node->attrs.name] = result_dtype;
+      (*visited_vars)[input_node->attrs.name]            = result_dtype;
       (*inferred_dtype_result)[idx.entry_id(node_entry)] = result_dtype;
     }
   } else {
@@ -68,15 +69,14 @@ static void CheckAndUpdateInferredDtypes(
 
 // Graph pass to infer unknown nodes which are input nodes
 // as LP16 if possible
-Graph AMPInferUnknown(Graph &&src) {
-  const nnvm::DTypeVector &inferred_dtypes =
-      src.GetAttr<nnvm::DTypeVector>("inferred_dtypes");
-  const int target_dtype = src.GetAttr<int>("target_dtype");
+Graph AMPInferUnknown(Graph&& src) {
+  const nnvm::DTypeVector& inferred_dtypes = src.GetAttr<nnvm::DTypeVector>("inferred_dtypes");
+  const int target_dtype                   = src.GetAttr<int>("target_dtype");
   CHECK(target_dtype == mshadow::kFloat16 || target_dtype == mshadow::kBfloat16)
       << "Only float16 and bfloat16 target_dtypes are supported yet";
 
   nnvm::DTypeVector inferred_dtype_result(inferred_dtypes);
-  const nnvm::IndexedGraph &idx = src.indexed_graph();
+  const nnvm::IndexedGraph& idx = src.indexed_graph();
 
   std::unordered_map<std::string, mshadow::TypeFlag> visited_vars;
 
@@ -84,7 +84,7 @@ Graph AMPInferUnknown(Graph &&src) {
   // and check if inputs to these nodes are variables.
   // If input nodes are variables, set dtype for these inputs
   // and check for conflicts if an input node goes to two cast nodes
-  DFSVisit(src.outputs, [&](const ObjectPtr &node) {
+  DFSVisit(src.outputs, [&](const ObjectPtr& node) {
     if (!node->is_variable()) {
       std::string op_name = node->op()->name;
 
@@ -93,17 +93,18 @@ Graph AMPInferUnknown(Graph &&src) {
         // to visited_vars, if a var is being visited second time
         // and already has dtype set, make sure the dtype inferred again
         // is same, otherwise reset dtype to original dtype
-        for (const NodeEntry &node_entry : node->inputs) {
-          const ObjectPtr &input_node = node_entry.node;
+        for (const NodeEntry& node_entry : node->inputs) {
+          const ObjectPtr& input_node = node_entry.node;
           if (input_node->is_variable() &&
               (node->attrs.dict.find("dtype") != node->attrs.dict.end())) {
-            const AMPCastParam &param =
-                nnvm::get<AMPCastParam>(node->attrs.parsed);
-            CHECK(param.dtype != -1)
-                << "amp_cast node shouldn't have unknown dtype";
-            CheckAndUpdateInferredDtypes(inferred_dtypes, idx, node_entry,
+            const AMPCastParam& param = nnvm::get<AMPCastParam>(node->attrs.parsed);
+            CHECK(param.dtype != -1) << "amp_cast node shouldn't have unknown dtype";
+            CheckAndUpdateInferredDtypes(inferred_dtypes,
+                                         idx,
+                                         node_entry,
                                          static_cast<mshadow::TypeFlag>(param.dtype),
-                                         &visited_vars, &inferred_dtype_result);
+                                         &visited_vars,
+                                         &inferred_dtype_result);
           }
         }
       } else if (op_name == "amp_multicast") {
@@ -120,11 +121,14 @@ Graph AMPInferUnknown(Graph &&src) {
           }
         }
         if (max_dtype == target_dtype) {
-          for (const NodeEntry &node_entry : node->inputs) {
-            const ObjectPtr &input_node = node_entry.node;
+          for (const NodeEntry& node_entry : node->inputs) {
+            const ObjectPtr& input_node = node_entry.node;
             if (input_node->is_variable()) {
-              CheckAndUpdateInferredDtypes(inferred_dtypes, idx, node_entry,
-                                           max_dtype, &visited_vars,
+              CheckAndUpdateInferredDtypes(inferred_dtypes,
+                                           idx,
+                                           node_entry,
+                                           max_dtype,
+                                           &visited_vars,
                                            &inferred_dtype_result);
             }
           }
diff --git a/src/nnvm/error.h b/src/nnvm/error.h
index 863513964d91..c98016d0f71c 100644
--- a/src/nnvm/error.h
+++ b/src/nnvm/error.h
@@ -28,11 +28,12 @@ namespace pass {
 
 class InvalidGraphError : public std::exception {
  public:
-  explicit InvalidGraphError(const std::string& msg = "invalid graph error"): msg_(msg) { }
+  explicit InvalidGraphError(const std::string& msg = "invalid graph error") : msg_(msg) {}
   ~InvalidGraphError() throw() {}
   virtual const char* what() const throw() {
     return msg_.c_str();
   }
+
  private:
   std::string msg_;
 };
diff --git a/src/nnvm/gradient.cc b/src/nnvm/gradient.cc
index 447f658890d8..2609f78d7579 100644
--- a/src/nnvm/gradient.cc
+++ b/src/nnvm/gradient.cc
@@ -53,18 +53,16 @@ struct GradEntry {
   std::vector<NodeEntry> grads;
 };
 
-
 /*!
  * \brief Build the backward graph from the mirror map. This function will be
  *        invoked twice if backward mirroring has been enabled.
  */
-Graph BuildGradientGraph(
-    const Graph& src,
-    const std::vector<NodeEntry>& xs,
-    const std::vector<ObjectPtr>& topo_order,
-    std::unordered_map<const Node*, std::vector<GradEntry> > output_grads,
-    std::function<int(const Node&)> mirror_fun,
-    const std::unordered_map<const Node*, ObjectPtr>& mirror_map);
+Graph BuildGradientGraph(const Graph& src,
+                         const std::vector<NodeEntry>& xs,
+                         const std::vector<ObjectPtr>& topo_order,
+                         std::unordered_map<const Node*, std::vector<GradEntry> > output_grads,
+                         std::function<int(const Node&)> mirror_fun,
+                         const std::unordered_map<const Node*, ObjectPtr>& mirror_map);
 
 /*!
  * \brief Auxiliary function that maps the forward node of the source graph to
@@ -74,25 +72,19 @@ inline const ObjectPtr& MapFwdNodeToMirrorPath(
     const ObjectPtr& n,
     const std::unordered_map<const Node*, ObjectPtr>& mirror_map) {
   auto iter = mirror_map.find(n.get());
-  if (iter == mirror_map.end() ||
-      iter->second == nullptr) {
+  if (iter == mirror_map.end() || iter->second == nullptr) {
     return n;
   }
   return iter->second;
 }
 
-
 Graph Gradient(Graph src) {
-  CHECK_NE(src.attrs.count("grad_ys"), 0U)
-      << "Gradient require grad_ys to be presented.";
-  CHECK_NE(src.attrs.count("grad_xs"), 0U)
-      << "Gradient require grad_xs to be presented.";
+  CHECK_NE(src.attrs.count("grad_ys"), 0U) << "Gradient require grad_ys to be presented.";
+  CHECK_NE(src.attrs.count("grad_xs"), 0U) << "Gradient require grad_xs to be presented.";
   CHECK_NE(src.attrs.count("grad_ys_out_grad"), 0U)
       << "Gradient require grad_ys_out_grad to be presented.";
-  const std::vector<NodeEntry>& xs =
-      src.GetAttr<std::vector<NodeEntry> >("grad_xs");
-  const std::vector<NodeEntry>& ys =
-      src.GetAttr<std::vector<NodeEntry> >("grad_ys");
+  const std::vector<NodeEntry>& xs = src.GetAttr<std::vector<NodeEntry> >("grad_xs");
+  const std::vector<NodeEntry>& ys = src.GetAttr<std::vector<NodeEntry> >("grad_ys");
   const std::vector<NodeEntry>& ys_out_grad =
       src.GetAttr<std::vector<NodeEntry> >("grad_ys_out_grad");
   CHECK_EQ(ys.size(), ys_out_grad.size());
@@ -102,13 +94,12 @@ Graph Gradient(Graph src) {
   std::vector<ObjectPtr> topo_order;
   std::unordered_map<const Node*, std::vector<GradEntry> > output_grads;
 
-  DFSVisit(ys,
-           [&](const ObjectPtr& node) {
-             if (output_grads.count(node.get()) == 0) {
-               output_grads[node.get()].resize(node->num_outputs());
-             }
-             topo_order.push_back(node);
-           });
+  DFSVisit(ys, [&](const ObjectPtr& node) {
+    if (output_grads.count(node.get()) == 0) {
+      output_grads[node.get()].resize(node->num_outputs());
+    }
+    topo_order.push_back(node);
+  });
 
   for (size_t i = 0; i < ys.size(); ++i) {
     output_grads[ys[i].node.get()][ys[i].index].grads = {ys_out_grad[i]};
@@ -117,12 +108,11 @@ Graph Gradient(Graph src) {
   // check that all xs are reachable from ys
   for (size_t i = 0; i < xs.size(); ++i) {
     CHECK(output_grads.find(xs[i].node.get()) != output_grads.end())
-        << "Cannot differentiate with respect to the "
-        << (i + 1) << "-th variable "
+        << "Cannot differentiate with respect to the " << (i + 1) << "-th variable "
         << "because it is unreachable from the outputs.";
   }
 
-  using MirrorFun = std::function<int (const Node&)>;
+  using MirrorFun      = std::function<int(const Node&)>;
   MirrorFun mirror_fun = nullptr;
   if (src.attrs.count("mirror_fun") != 0) {
     mirror_fun = src.GetAttr<MirrorFun>("mirror_fun");
@@ -130,22 +120,18 @@ Graph Gradient(Graph src) {
   std::unordered_map<const Node*, ObjectPtr> mirror_map;
 
   // complete the backward graph of the src, but without backward mirroring
-  nnvm::Graph gsrc = BuildGradientGraph(src, xs, topo_order,
-                                        output_grads,
-                                        nullptr, mirror_map);
+  nnvm::Graph gsrc = BuildGradientGraph(src, xs, topo_order, output_grads, nullptr, mirror_map);
   if (mirror_fun == nullptr) {
     return gsrc;  // Gradient pass without mirroring ends here.
   }
-  const IndexedGraph& idx = src.indexed_graph(),
-                    & gidx = gsrc.indexed_graph();
+  const IndexedGraph &idx = src.indexed_graph(), &gidx = gsrc.indexed_graph();
   // ===========================================================================
   // ----- Gradient Pass w/ Backward Mirroring -----
   // ===========================================================================
   // Record, for each node entry ∈ gsrc, the nodes that reference it as inputs.
   // It is important to note that since the node entry reference mapping is
   // constructed from gradient graph, it can only be indexed using gidx entry ID.
-  std::vector<std::unordered_set<const Node*> > node_entry_ref_map(
-      gidx.num_node_entries());
+  std::vector<std::unordered_set<const Node*> > node_entry_ref_map(gidx.num_node_entries());
   static const auto& fignore_inputs = Op::GetAttr<FIgnoreInputs>("FIgnoreInputs");
   for (uint32_t gnid = 0; gnid < gidx.num_nodes(); ++gnid) {
     const IndexedGraph::Node& inode = gidx[gnid];
@@ -156,8 +142,7 @@ Graph Gradient(Graph src) {
       if (fignore_inputs.count(inode.source->op()) != 0) {
         std::vector<uint32_t> ignore_inputs =
             fignore_inputs[inode.source->op()](inode.source->attrs);
-        if (std::find(ignore_inputs.begin(), ignore_inputs.end(), i)
-            != ignore_inputs.end()) {
+        if (std::find(ignore_inputs.begin(), ignore_inputs.end(), i) != ignore_inputs.end()) {
           continue;
         }
       }
@@ -208,9 +193,8 @@ Graph Gradient(Graph src) {
     // B
     // After invoking this function. `subgraph` will become {A, B}.
     // Note that this function will be invoked multiple times.
-    auto subworklist_backprop = [&subworklist, &subgraph,
-                                 &subgraph_topo_order,
-                                 &mirror_fun, &worklist]() {
+    auto subworklist_backprop =
+        [&subworklist, &subgraph, &subgraph_topo_order, &mirror_fun, &worklist]() {
           std::deque<const Node*> subworklist_topo_order;
           for (; !subworklist.empty(); subworklist.pop()) {
             const Node* const subworkitem = subworklist.front();
@@ -266,8 +250,7 @@ Graph Gradient(Graph src) {
     do {
       has_subgraph_converged = true;
       for (const Node* const subgraph_node : subgraph_topo_order) {
-        for (const NodeEntry& subgraph_node_entry :
-             subgraph_node->inputs) {
+        for (const NodeEntry& subgraph_node_entry : subgraph_node->inputs) {
           const std::unordered_set<const Node*> ref_nodes =
               node_entry_ref_map[gidx.entry_id(subgraph_node_entry)];
 
@@ -289,7 +272,7 @@ Graph Gradient(Graph src) {
               ref_node_heads.push(ref_node);
               for (; !ref_node_heads.empty(); ref_node_heads.pop()) {
                 const Node* const ref_node_head = ref_node_heads.front();
-                bool is_ref_node_head_output = false;
+                bool is_ref_node_head_output    = false;
                 for (const NodeEntry& y : ys) {
                   if (ref_node_head == y.node.get()) {
                     is_ref_node_head_output = true;
@@ -309,7 +292,7 @@ Graph Gradient(Graph src) {
                     }
                   }
                 }  // for (oid ∈ [0, ref_node_head->num_outputs()))
-              }  // for (ref_node_head ∈ ref_node_heads)
+              }    // for (ref_node_head ∈ ref_node_heads)
               // Do the backpropagation again. The topological order of the
               // subworklist can be directly appended to the end of the existing
               // order. E,g, in our previous example, we expect to have
@@ -320,7 +303,7 @@ Graph Gradient(Graph src) {
               break;
             }  // if (ref_node != subgraph_node && idx.exist(ref_node) &&
                //     subgraph.find(ref_node) == subgraph.end()
-          }  // for (ref_node ∈ ref_nodes)
+          }    // for (ref_node ∈ ref_nodes)
           if (!has_subgraph_converged) {
             break;
           }
@@ -365,15 +348,13 @@ Graph Gradient(Graph src) {
         bool is_frontier = true;
         for (const NodeEntry& e : subgraph_node->inputs) {
           auto iter = mirror_map.find(e.node.get());
-          if (mirror_fun(*(e.node)) &&
-              !(iter != mirror_map.end() && iter->second == nullptr)) {
+          if (mirror_fun(*(e.node)) && !(iter != mirror_map.end() && iter->second == nullptr)) {
             is_frontier = false;
           }
         }
         for (const ObjectPtr& n : subgraph_node->control_deps) {
           auto iter = mirror_map.find(n.get());
-          if (mirror_fun(*n) &&
-              !(iter != mirror_map.end() && iter->second == nullptr)) {
+          if (mirror_fun(*n) && !(iter != mirror_map.end() && iter->second == nullptr)) {
             is_frontier = false;
           }
         }
@@ -404,7 +385,7 @@ Graph Gradient(Graph src) {
           has_forward_candidates_converged = true;
           for (const Node* const candidate : forward_candidates) {
             for (const NodeEntry& candidate_input : candidate->inputs) {
-              uint32_t geid = gidx.entry_id(candidate_input);
+              uint32_t geid                                    = gidx.entry_id(candidate_input);
               const std::unordered_set<const Node*>& ref_nodes = node_entry_ref_map[geid];
               for (const Node* const ref_node : ref_nodes) {
                 if (ref_node != frontier_node.first &&
@@ -427,23 +408,19 @@ Graph Gradient(Graph src) {
         // Record the node entries that are newly allocated and those that are
         // released. A node entry can be released if all its referencing nodes
         // are part of the subgraph frontier. Otherwise, it is in the allocated set.
-        std::unordered_set<uint32_t> newly_allocated_node_entries,
-                                     released_node_entries;
+        std::unordered_set<uint32_t> newly_allocated_node_entries, released_node_entries;
         for (const Node* const candidate : forward_candidates) {
-          uint32_t nid = idx.node_id(candidate),
-                   gnid = gidx.node_id(candidate);
+          uint32_t nid = idx.node_id(candidate), gnid = gidx.node_id(candidate);
           for (uint32_t oid = 0; oid < candidate->num_outputs(); ++oid) {
-            uint32_t eid = idx.entry_id(nid, oid),
-                     geid = gidx.entry_id(gnid, oid);
+            uint32_t eid = idx.entry_id(nid, oid), geid = gidx.entry_id(gnid, oid);
             if (node_entry_ref_map[geid].size() != 0) {
               newly_allocated_node_entries.insert(eid);
             }
           }
           for (const NodeEntry& candidate_input : candidate->inputs) {
-            uint32_t eid = idx.entry_id(candidate_input),
-                     geid = gidx.entry_id(candidate_input);
+            uint32_t eid = idx.entry_id(candidate_input), geid = gidx.entry_id(candidate_input);
             const std::unordered_set<const Node*>& ref_nodes = node_entry_ref_map[geid];
-            bool can_be_released = true;
+            bool can_be_released                             = true;
             for (const Node* const ref_node : ref_nodes) {
               if (subgraph_frontier.find(ref_node) == subgraph_frontier.end()) {
                 newly_allocated_node_entries.insert(eid);
@@ -454,7 +431,7 @@ Graph Gradient(Graph src) {
               released_node_entries.insert(eid);
             }
           }  // for (candidate_input ∈ candidate->input)
-        }  // for (candidate ∈ forward_candidates)
+        }    // for (candidate ∈ forward_candidates)
 
         // Now, compare the total amount of newly allocated storage versus the
         // released storage, if the latter is greater or equal to the former,
@@ -462,8 +439,7 @@ Graph Gradient(Graph src) {
         // forward candidate nodes are marked as on the mirror path.
         size_t newly_allocated_storage = 0, released_storage = 0;
         for (const uint32_t eid : newly_allocated_node_entries) {
-          newly_allocated_storage += src_shapes[eid].Size() *
-                                     MXGetDTypeSize(src_dtypes[eid]);
+          newly_allocated_storage += src_shapes[eid].Size() * MXGetDTypeSize(src_dtypes[eid]);
         }
         for (const uint32_t eid : released_node_entries) {
           released_storage += src_shapes[eid].Size() * MXGetDTypeSize(src_dtypes[eid]);
@@ -477,7 +453,7 @@ Graph Gradient(Graph src) {
           has_subgraph_converged = false;
           break;
         }  // if (released_storage >= newly_allocated_storage)
-      }  // for (frontier_node ∈ subgraph_frontier)
+      }    // for (frontier_node ∈ subgraph_frontier)
     } while (!has_subgraph_converged);
 
     // Finally, mark all the remaining nodes of the subgraph as on the mirror path.
@@ -486,7 +462,7 @@ Graph Gradient(Graph src) {
         continue;
       }
       ObjectPtr subgraph_node_mirror = Node::Create();
-      *subgraph_node_mirror = *subgraph_node;
+      *subgraph_node_mirror          = *subgraph_node;
       subgraph_node_mirror->attrs.name += "_mirror";
       for (NodeEntry& e : subgraph_node_mirror->inputs) {
         e.node = MapFwdNodeToMirrorPath(e.node, mirror_map);
@@ -497,26 +473,23 @@ Graph Gradient(Graph src) {
       mirror_map[subgraph_node] = subgraph_node_mirror;
     }
   }  // for (workitem ∈ worklist)
-  DFSVisit(ys,
-           [&](const ObjectPtr& node) {
-             if (mirror_map.at(node.get()) != nullptr) {
-               node->attrs.dict["__mirror_stage__"] = "1";
-             } else {
-               node->attrs.dict["__mirror_stage__"] = "0";
-             }
-           });
-  return BuildGradientGraph(src, xs, topo_order,
-                            output_grads,
-                            mirror_fun, mirror_map);
+  DFSVisit(ys, [&](const ObjectPtr& node) {
+    if (mirror_map.at(node.get()) != nullptr) {
+      node->attrs.dict["__mirror_stage__"] = "1";
+    } else {
+      node->attrs.dict["__mirror_stage__"] = "0";
+    }
+  });
+  return BuildGradientGraph(src, xs, topo_order, output_grads, mirror_fun, mirror_map);
 }
 
-
 /*!
  * \brief Auxiliary function that checks whether all the gradients are zero or not.
  */
 inline bool CheckGradAllZero(const std::vector<NodeEntry>& grads,
                              const std::vector<const Op*>& zero_ops) {
-  if (!grads.size() || !zero_ops.size()) return false;
+  if (!grads.size() || !zero_ops.size())
+    return false;
   for (const auto& g : grads) {
     bool found = false;
     for (const auto& op : zero_ops) {
@@ -525,43 +498,41 @@ inline bool CheckGradAllZero(const std::vector<NodeEntry>& grads,
         break;
       }
     }
-    if (!found) return false;
+    if (!found)
+      return false;
   }
   return true;
 }
 
-
-Graph BuildGradientGraph(
-    const Graph& src,
-    const std::vector<NodeEntry>& xs,
-    const std::vector<ObjectPtr>& topo_order,
-    std::unordered_map<const Node*, std::vector<GradEntry> > output_grads,
-    std::function<int(const Node&)> mirror_fun,
-    const std::unordered_map<const Node*, ObjectPtr>& mirror_map) {
+Graph BuildGradientGraph(const Graph& src,
+                         const std::vector<NodeEntry>& xs,
+                         const std::vector<ObjectPtr>& topo_order,
+                         std::unordered_map<const Node*, std::vector<GradEntry> > output_grads,
+                         std::function<int(const Node&)> mirror_fun,
+                         const std::unordered_map<const Node*, ObjectPtr>& mirror_map) {
   static auto& grad_fun_map = Op::GetAttr<nnvm::FGradient>("FGradient");
 
   // gradient aggregation function
-  using AggFun = std::function<NodeEntry (std::vector<NodeEntry>&&)>;
-  AggFun agg_fun = [](std::vector<NodeEntry>&& v)->NodeEntry {
-        if (v.size() == 1) {
-          return std::move(v[0]);
-        } else if (v.size() == 0) {
-          ObjectPtr zero_grad_node = Node::Create();
-          zero_grad_node->attrs.op = Op::Get("zeros");
-          zero_grad_node->attrs.name = "zero_grad";
-          zero_grad_node->attrs.op->attr_parser(&(zero_grad_node->attrs));
-          return NodeEntry{zero_grad_node, 0, 0};
-        } else {
-          ObjectPtr grad_sum_node = Node::Create();
-          grad_sum_node->attrs.op = Op::Get("elemwise_sum");
-          grad_sum_node->inputs = std::move(v);
-          grad_sum_node->attrs.name = "grad_sum";
-          grad_sum_node->attrs.dict["num_args"] =
-              std::to_string(grad_sum_node->inputs.size());
-          grad_sum_node->attrs.op->attr_parser(&(grad_sum_node->attrs));
-          return NodeEntry{grad_sum_node, 0, 0};
-        }
-      };
+  using AggFun   = std::function<NodeEntry(std::vector<NodeEntry> &&)>;
+  AggFun agg_fun = [](std::vector<NodeEntry>&& v) -> NodeEntry {
+    if (v.size() == 1) {
+      return std::move(v[0]);
+    } else if (v.size() == 0) {
+      ObjectPtr zero_grad_node   = Node::Create();
+      zero_grad_node->attrs.op   = Op::Get("zeros");
+      zero_grad_node->attrs.name = "zero_grad";
+      zero_grad_node->attrs.op->attr_parser(&(zero_grad_node->attrs));
+      return NodeEntry{zero_grad_node, 0, 0};
+    } else {
+      ObjectPtr grad_sum_node               = Node::Create();
+      grad_sum_node->attrs.op               = Op::Get("elemwise_sum");
+      grad_sum_node->inputs                 = std::move(v);
+      grad_sum_node->attrs.name             = "grad_sum";
+      grad_sum_node->attrs.dict["num_args"] = std::to_string(grad_sum_node->inputs.size());
+      grad_sum_node->attrs.op->attr_parser(&(grad_sum_node->attrs));
+      return NodeEntry{grad_sum_node, 0, 0};
+    }
+  };
   if (src.attrs.count("grad_aggregate_fun") != 0) {
     agg_fun = src.GetAttr<AggFun>("grad_aggregate_fun");
   }
@@ -571,19 +542,21 @@ Graph BuildGradientGraph(
   if (src.attrs.count("zero_ops") != 0) {
     zero_ops = src.GetAttr<std::vector<const Op*> >("zero_ops");
   }
-  const Op* copy_op = (src.attrs.count("copy_op_str") != 0) ?
-      Op::Get(src.GetAttr<std::string>("copy_op_str")) : nullptr;
+  const Op* copy_op = (src.attrs.count("copy_op_str") != 0)
+                          ? Op::Get(src.GetAttr<std::string>("copy_op_str"))
+                          : nullptr;
 
   std::vector<NodeEntry> out_agg_grads;
-  for (auto topo_order_rit = topo_order.rbegin();
-       topo_order_rit != topo_order.rend(); ++topo_order_rit) {
+  for (auto topo_order_rit = topo_order.rbegin(); topo_order_rit != topo_order.rend();
+       ++topo_order_rit) {
     const ObjectPtr& src_fwd_node = *topo_order_rit;
-    if (src_fwd_node->is_variable()) continue;
+    if (src_fwd_node->is_variable())
+      continue;
 
     // gather all the output gradient entries and apply the aggregation function
     out_agg_grads.clear();
     auto& out_grad_vec = output_grads.at(src_fwd_node.get());
-    for (auto & e : out_grad_vec) {
+    for (auto& e : out_grad_vec) {
       e.sum = agg_fun(std::move(e.grads));
       out_agg_grads.push_back(e.sum);
     }
@@ -606,15 +579,13 @@ Graph BuildGradientGraph(
         if (mirror_fun != nullptr && !mirror_fun(*fwd_node)) {
           for (NodeEntry& input_grad : input_grads) {
             for (NodeEntry& grad_input : input_grad.node->inputs) {
-              const ObjectPtr& grad_input_node_mirrored = MapFwdNodeToMirrorPath(
-                  grad_input.node, mirror_map);
-              grad_input = NodeEntry(
-                  grad_input_node_mirrored,
-                  grad_input.index,
-                  grad_input.version);
+              const ObjectPtr& grad_input_node_mirrored =
+                  MapFwdNodeToMirrorPath(grad_input.node, mirror_map);
+              grad_input =
+                  NodeEntry(grad_input_node_mirrored, grad_input.index, grad_input.version);
             }  // for (grad_input ∈ input_grad.node->inputs)
-          }  // for (input_grad ∈ input_grads)
-        }  // if (mirror_fun != nullptr && !mirror_fun(*fwd_node))
+          }    // for (input_grad ∈ input_grads)
+        }      // if (mirror_fun != nullptr && !mirror_fun(*fwd_node))
       } else if (CheckGradAllZero(out_agg_grads, zero_ops)) {
         for (size_t i = 0; i < src_fwd_node->num_inputs(); ++i) {
           std::ostringstream os;
@@ -623,8 +594,8 @@ Graph BuildGradientGraph(
           } else {
             os << fwd_node->attrs.name << "_in" << i << "_backward";
           }
-          auto p = Node::Create();
-          p->attrs.op = zero_ops[0];
+          auto p        = Node::Create();
+          p->attrs.op   = zero_ops[0];
           p->attrs.name = os.str();
           p->inputs.push_back(fwd_node->inputs[i]);
           p->control_deps.emplace_back(fwd_node);
@@ -634,8 +605,9 @@ Graph BuildGradientGraph(
           input_grads.emplace_back(p, 0, 0);
         }  // for (i ∈ src_fwd_node->num_inputs())
       } else {
-        std::string message = "Operator " + std::string(src_fwd_node->op()->name)
-          + "is non-differentiable because it didn't register FGradient attribute.";
+        std::string message =
+            "Operator " + std::string(src_fwd_node->op()->name) +
+            "is non-differentiable because it didn't register FGradient attribute.";
         throw nnvm::pass::InvalidGraphError(message);
       }
       for (const auto& e : input_grads) {
@@ -643,15 +615,14 @@ Graph BuildGradientGraph(
       }
       auto input_grad_iter = input_grads.begin();
       CHECK(src_fwd_node->inputs.size() <= input_grads.size());
-      for (auto input_iter = src_fwd_node->inputs.begin();
-           input_iter != src_fwd_node->inputs.end();
+      for (auto input_iter = src_fwd_node->inputs.begin(); input_iter != src_fwd_node->inputs.end();
            ++input_iter, ++input_grad_iter) {
         // propagate the input gradients to the output gradients of the input nodes
-        output_grads[input_iter->node.get()][input_iter->index]
-            .grads.emplace_back(std::move(*input_grad_iter));
+        output_grads[input_iter->node.get()][input_iter->index].grads.emplace_back(
+            std::move(*input_grad_iter));
       }
     }  // if (src_fwd_node->inputs.size() != 0)
-  }  // for (topo_order_rit ∈ reverse(topo_order))
+  }    // for (topo_order_rit ∈ reverse(topo_order))
   // take out the xs' grads
   Graph ret;
   ret.outputs.resize(xs.size());
@@ -672,14 +643,13 @@ Graph BuildGradientGraph(
         std::ostringstream os;
         os << entry.sum.node->attrs.name << "_" << kv->second.first << "_copy";
         kv->second.first++;
-        copy_node->attrs.op = copy_op;
+        copy_node->attrs.op   = copy_op;
         copy_node->attrs.name = os.str();
         copy_node->inputs.emplace_back(entry.sum);
         if (copy_node->attrs.op->attr_parser != nullptr) {
           copy_node->attrs.op->attr_parser(&(copy_node->attrs));
         }
-        unique_grads.emplace(NodeEntry{std::move(copy_node), 0, 0},
-                             std::make_pair(1, counter));
+        unique_grads.emplace(NodeEntry{std::move(copy_node), 0, 0}, std::make_pair(1, counter));
       }
     } else {
       ret.outputs[counter] = entry.sum;
@@ -694,17 +664,16 @@ Graph BuildGradientGraph(
   return ret;
 }
 
-
 // register pass
 NNVM_REGISTER_PASS(MXGradient)
-.describe(R"(Return a gradient graph of src.attrs["ys"] wrt src.attrs["xs"])")
-.set_body(Gradient)
-.set_change_graph(true)
-.depend_graph_attr("grad_ys")
-.depend_graph_attr("grad_xs")
-.depend_graph_attr("in_arg_shapes")
-.depend_graph_attr("in_arg_dtypes")
-.depend_graph_attr("grad_ys_out_grad");
+    .describe(R"(Return a gradient graph of src.attrs["ys"] wrt src.attrs["xs"])")
+    .set_body(Gradient)
+    .set_change_graph(true)
+    .depend_graph_attr("grad_ys")
+    .depend_graph_attr("grad_xs")
+    .depend_graph_attr("in_arg_shapes")
+    .depend_graph_attr("in_arg_dtypes")
+    .depend_graph_attr("grad_ys_out_grad");
 
 }  // namespace
 
diff --git a/src/nnvm/graph_algorithm.h b/src/nnvm/graph_algorithm.h
index 031e62254db7..49c6420392af 100644
--- a/src/nnvm/graph_algorithm.h
+++ b/src/nnvm/graph_algorithm.h
@@ -23,7 +23,7 @@
  * \brief This header contains graph algorithms on StaticGraph.
  *  It is used  compute informations such as whether two
  *  operations can run in parallel, and helps allocation.
-*/
+ */
 #ifndef MXNET_NNVM_GRAPH_ALGORITHM_H_
 #define MXNET_NNVM_GRAPH_ALGORITHM_H_
 
@@ -42,10 +42,9 @@ namespace pass {
  * \param path the output path of nodes.
  * \return the total reward of best path.
  */
-inline uint32_t MXFindBestPath(
-    const IndexedGraph& graph,
-    const std::vector<uint32_t>& node_reward,
-    std::vector<uint32_t>* path) {
+inline uint32_t MXFindBestPath(const IndexedGraph& graph,
+                               const std::vector<uint32_t>& node_reward,
+                               std::vector<uint32_t>* path) {
   const uint32_t num_nodes = static_cast<uint32_t>(graph.num_nodes());
   CHECK_EQ(num_nodes, node_reward.size());
 
@@ -58,21 +57,22 @@ inline uint32_t MXFindBestPath(
     const uint32_t nid = i - 1;
     best_reward[nid] += node_reward[nid];
     if (best_reward[nid] > best_solution) {
-      best_solution = best_reward[nid];
+      best_solution   = best_reward[nid];
       best_start_node = nid;
     }
     for (const auto& e : graph[nid].inputs) {
       const uint32_t prev = e.node_id;
       if (best_reward[nid] > best_reward[prev]) {
         best_reward[prev] = best_reward[nid];
-        next_node[prev] = nid;
+        next_node[prev]   = nid;
       }
     }
   }
   path->clear();
   uint32_t reward = 0;
   for (uint32_t nid = best_start_node; nid < num_nodes; nid = next_node[nid]) {
-    path->push_back(nid); reward += node_reward[nid];
+    path->push_back(nid);
+    reward += node_reward[nid];
   }
   CHECK_EQ(reward, best_solution);
   return best_solution;
@@ -89,11 +89,10 @@ inline uint32_t MXFindBestPath(
  * \param color the color index of each of the node.
  * \return the total number of colors.
  */
-inline uint32_t MXColorNodeGroup(
-    const IndexedGraph &graph,
-    std::vector<uint32_t> node_importance,
-    uint32_t max_ncolor,
-    std::vector<uint32_t> *color) {
+inline uint32_t MXColorNodeGroup(const IndexedGraph& graph,
+                                 std::vector<uint32_t> node_importance,
+                                 uint32_t max_ncolor,
+                                 std::vector<uint32_t>* color) {
   CHECK_NE(max_ncolor, 0U);
   CHECK_EQ(graph.num_nodes(), node_importance.size());
 
@@ -106,7 +105,8 @@ inline uint32_t MXColorNodeGroup(
   for (cindex = 0; cindex < max_ncolor - 1; ++cindex) {
     std::vector<uint32_t> path;
     uint32_t reward = MXFindBestPath(graph, node_importance, &path);
-    if (reward == 0) break;
+    if (reward == 0)
+      break;
     for (uint32_t nid : path) {
       if (node_importance[nid] != 0) {
         CHECK_EQ(color->at(nid), max_ncolor);
diff --git a/src/nnvm/graph_editor.cc b/src/nnvm/graph_editor.cc
index 44a807eda174..eef96ddd1676 100644
--- a/src/nnvm/graph_editor.cc
+++ b/src/nnvm/graph_editor.cc
@@ -39,18 +39,18 @@ namespace mxnet {
  * Given a computation graph, this function finds the input nodes of the graph
  * and create symbols for the input nodes. It returns the input symbols.
  */
-std::vector<nnvm::Symbol *> GetInputSymbols(const nnvm::Symbol &sym) {
+std::vector<nnvm::Symbol*> GetInputSymbols(const nnvm::Symbol& sym) {
   nnvm::Graph g;
-  std::vector<nnvm::Symbol *> input_syms;
-  g.outputs = sym.outputs;
+  std::vector<nnvm::Symbol*> input_syms;
+  g.outputs                     = sym.outputs;
   const nnvm::IndexedGraph& idx = g.indexed_graph();
   // Go through all nodes and return the ones representing variables.
   for (size_t i = 0; i < idx.num_nodes(); i++) {
-    const nnvm::Node &n = *idx[i].source;
-    for (const nnvm::NodeEntry &e : n.inputs) {
+    const nnvm::Node& n = *idx[i].source;
+    for (const nnvm::NodeEntry& e : n.inputs) {
       auto p = e.node;
       if (p->is_variable()) {
-        nnvm::Symbol *s = new nnvm::Symbol();
+        nnvm::Symbol* s = new nnvm::Symbol();
         s->outputs.push_back(e);
         input_syms.push_back(s);
       }
@@ -65,11 +65,12 @@ std::vector<nnvm::Symbol *> GetInputSymbols(const nnvm::Symbol &sym) {
  * subgraph. It returns the nodes that connect to the subgraph directly and
  * the names of the new variable nodes.
  */
-bool CutGraphInputs(const std::vector<nnvm::NodeEntry *> &input_entries,
-                    bool skip_var, std::vector<nnvm::NodeEntry> *orig_entries) {
+bool CutGraphInputs(const std::vector<nnvm::NodeEntry*>& input_entries,
+                    bool skip_var,
+                    std::vector<nnvm::NodeEntry>* orig_entries) {
   struct pred_entry {
     nnvm::NodeEntry e;
-    explicit pred_entry(nnvm::NodeEntry _e): e(std::move(_e)) {}
+    explicit pred_entry(nnvm::NodeEntry _e) : e(std::move(_e)) {}
     bool operator()(const nnvm::NodeEntry e1) {
       return e.node == e1.node && e.index == e1.index;
     }
@@ -83,8 +84,7 @@ bool CutGraphInputs(const std::vector<nnvm::NodeEntry *> &input_entries,
     if (input_entry->node->is_variable() && skip_var)
       continue;
 
-    auto it = std::find_if(orig_entries->begin(), orig_entries->end(),
-                           pred_entry(*input_entry));
+    auto it    = std::find_if(orig_entries->begin(), orig_entries->end(), pred_entry(*input_entry));
     bool exist = (it != orig_entries->end());
     orig_entries->push_back(*input_entry);
     nnvm::ObjectPtr n;
diff --git a/src/nnvm/legacy_json_util.cc b/src/nnvm/legacy_json_util.cc
index 64e1228b37f0..e0bc07dd64cb 100644
--- a/src/nnvm/legacy_json_util.cc
+++ b/src/nnvm/legacy_json_util.cc
@@ -36,94 +36,95 @@
 #include "../c_api/c_api_common.h"
 
 namespace mxnet {
+using nnvm::FListInputNames;
 using nnvm::Graph;
-using nnvm::Op;
 using nnvm::Node;
-using nnvm::ObjectPtr;
 using nnvm::NodeAttrs;
 using nnvm::NodeEntry;
+using nnvm::ObjectPtr;
+using nnvm::Op;
 using nnvm::Symbol;
-using nnvm::FListInputNames;
 
 // First fix things that prevent attr_parser success.
 Graph UpgradeJSON_FixParsing(Graph g) {
   nnvm::DFSVisit(g.outputs, [](const std::shared_ptr<Node>& n) {
-      static auto& flist_inputs = Op::GetAttr<FListInputNames>("FListInputNames");
-
-      // hold keys that should be converted to hidden keys
-      std::vector<std::pair<std::string, std::string> > hidden_keys;
-
-      // remove attrs that prevent parsing
-      for (auto it = n->attrs.dict.begin(); it != n->attrs.dict.end();) {
-        bool erase = false;
-        // remove hidden keys
-        for (const auto& key : kHiddenKeys) {
-          size_t pos = it->first.rfind(key);
-          if (pos == 0 || (pos != std::string::npos && pos == it->first.length() - key.length())) {
-            hidden_keys.emplace_back(*it);
-            erase = true;
-            break;
-          }
+    static auto& flist_inputs = Op::GetAttr<FListInputNames>("FListInputNames");
+
+    // hold keys that should be converted to hidden keys
+    std::vector<std::pair<std::string, std::string> > hidden_keys;
+
+    // remove attrs that prevent parsing
+    for (auto it = n->attrs.dict.begin(); it != n->attrs.dict.end();) {
+      bool erase = false;
+      // remove hidden keys
+      for (const auto& key : kHiddenKeys) {
+        size_t pos = it->first.rfind(key);
+        if (pos == 0 || (pos != std::string::npos && pos == it->first.length() - key.length())) {
+          hidden_keys.emplace_back(*it);
+          erase = true;
+          break;
         }
-
-        auto tmp = it;
-        ++it;
-        if (erase) n->attrs.dict.erase(tmp);
       }
 
-      // parse
-      if (n->op() != nullptr && n->op()->attr_parser != nullptr)
-        n->op()->attr_parser(&(n->attrs));
+      auto tmp = it;
+      ++it;
+      if (erase)
+        n->attrs.dict.erase(tmp);
+    }
+
+    // parse
+    if (n->op() != nullptr && n->op()->attr_parser != nullptr)
+      n->op()->attr_parser(&(n->attrs));
 
-      // add back removed hidden keys
-      for (const auto& kv : hidden_keys) {
-        bool flag = false;
-        for (const auto& key : kHiddenKeys) {
-          size_t pos = kv.first.rfind(key);
-          if (pos == 0 && key.length() == kv.first.length()) {
-            n->attrs.dict["__"+key+"__"] = kv.second;
-            flag = true;
+    // add back removed hidden keys
+    for (const auto& kv : hidden_keys) {
+      bool flag = false;
+      for (const auto& key : kHiddenKeys) {
+        size_t pos = kv.first.rfind(key);
+        if (pos == 0 && key.length() == kv.first.length()) {
+          n->attrs.dict["__" + key + "__"] = kv.second;
+          flag                             = true;
+          break;
+        } else if (pos != std::string::npos && pos > 1 && pos == kv.first.length() - key.length()) {
+          if (n->is_variable())
             break;
-          } else if (pos != std::string::npos && pos > 1
-                     && pos == kv.first.length() - key.length()) {
-            if (n->is_variable()) break;
-            FListInputNames fn = flist_inputs.get(n->op(), nullptr);
-            if (fn == nullptr) break;
-            auto arg_names = fn(n->attrs);
-            auto name = kv.first.substr(0, pos-1);
-            auto it = std::find(arg_names.begin(), arg_names.end(), name);
-            if (it != arg_names.end()) {
-              int idx = it - arg_names.begin();
-              if (n->inputs[idx].node->is_variable()) {
-                n->inputs[idx].node->attrs.dict["__"+key+"__"] = kv.second;
-                flag = true;
-              }
-            }
+          FListInputNames fn = flist_inputs.get(n->op(), nullptr);
+          if (fn == nullptr)
             break;
+          auto arg_names = fn(n->attrs);
+          auto name      = kv.first.substr(0, pos - 1);
+          auto it        = std::find(arg_names.begin(), arg_names.end(), name);
+          if (it != arg_names.end()) {
+            int idx = it - arg_names.begin();
+            if (n->inputs[idx].node->is_variable()) {
+              n->inputs[idx].node->attrs.dict["__" + key + "__"] = kv.second;
+              flag                                               = true;
+            }
           }
+          break;
         }
-        if (!flag) n->attrs.dict[kv.first] = kv.second;
       }
-    });
+      if (!flag)
+        n->attrs.dict[kv.first] = kv.second;
+    }
+  });
   return g;
 }
 
 Graph UpgradeJSON_Parse(Graph g) {
   nnvm::DFSVisit(g.outputs, [](const std::shared_ptr<Node>& n) {
-      if (n->op() != nullptr) {
-        if (n->op()->attr_parser != nullptr)
-          n->op()->attr_parser(&(n->attrs));
-      } else {
-        // ugly workaround due to VariableParam is not exposed.
-        n->attrs.parsed =
-          nnvm::Symbol::CreateVariable(n->attrs.name).outputs[0].node->attrs.parsed;
-      }
-    });
+    if (n->op() != nullptr) {
+      if (n->op()->attr_parser != nullptr)
+        n->op()->attr_parser(&(n->attrs));
+    } else {
+      // ugly workaround due to VariableParam is not exposed.
+      n->attrs.parsed = nnvm::Symbol::CreateVariable(n->attrs.name).outputs[0].node->attrs.parsed;
+    }
+  });
   return g;
 }
 
-inline std::string DefaultVarName(const std::string &op_name,
-                                  const std::string &arg_name) {
+inline std::string DefaultVarName(const std::string& op_name, const std::string& arg_name) {
   if (op_name.length() == 0) {
     return arg_name;
   } else {
@@ -134,68 +135,70 @@ inline std::string DefaultVarName(const std::string &op_name,
 // aux variables are not stored in json before 0.9.0. Add them here.
 Graph UpgradeJSON_000800_000900(Graph g) {
   nnvm::DFSVisit(g.outputs, [](const std::shared_ptr<Node>& n) {
-      static auto& flist_inputs = Op::GetAttr<FListInputNames>("FListInputNames");
-      if (n->inputs.size() < n->num_inputs()) {
-        FListInputNames fn = flist_inputs.get(n->op(), nullptr);
-        if (fn == nullptr) return;
-
-        auto arg_names = fn(n->attrs);
-        for (size_t i = n->inputs.size(); i < n->num_inputs(); ++i) {
-          auto var = Symbol::CreateVariable(
-                      DefaultVarName(n->attrs.name, arg_names[i])).outputs[0];
-          var.node->attrs.dict = n->attrs.dict;
-          n->inputs.push_back(var);
-        }
+    static auto& flist_inputs = Op::GetAttr<FListInputNames>("FListInputNames");
+    if (n->inputs.size() < n->num_inputs()) {
+      FListInputNames fn = flist_inputs.get(n->op(), nullptr);
+      if (fn == nullptr)
+        return;
+
+      auto arg_names = fn(n->attrs);
+      for (size_t i = n->inputs.size(); i < n->num_inputs(); ++i) {
+        auto var = Symbol::CreateVariable(DefaultVarName(n->attrs.name, arg_names[i])).outputs[0];
+        var.node->attrs.dict = n->attrs.dict;
+        n->inputs.push_back(var);
       }
-    });
+    }
+  });
   return g;
 }
 
 // Refactor initializer in v0.9.2
 Graph UpgradeJSON_000903_000904(Graph g) {
   nnvm::DFSVisit(g.outputs, [](const std::shared_ptr<Node>& n) {
-      static auto& fset_attrs =
+    static auto& fset_attrs =
         Op::GetAttr<nnvm::FSetInputVarAttrOnCompose>("FSetInputVarAttrOnCompose");
 
-      if (n->op() != nullptr) {
-        nnvm::FSetInputVarAttrOnCompose fn = fset_attrs.get(n->op(), nullptr);
-        if (fn != nullptr) {
-          for (size_t i = 0; i < n->inputs.size(); ++i) {
-            if (n->inputs[i].node->is_variable()) {
-              fn(n->attrs, n->inputs[i].node, i);
-            }
+    if (n->op() != nullptr) {
+      nnvm::FSetInputVarAttrOnCompose fn = fset_attrs.get(n->op(), nullptr);
+      if (fn != nullptr) {
+        for (size_t i = 0; i < n->inputs.size(); ++i) {
+          if (n->inputs[i].node->is_variable()) {
+            fn(n->attrs, n->inputs[i].node, i);
           }
         }
       }
-    });
+    }
+  });
   return g;
 }
 
 // ReduceAxisParam: int axis -> optional<int> axis
 Graph UpgradeJSON_000904_000905(Graph g) {
   nnvm::DFSVisit(g.outputs, [](const std::shared_ptr<Node>& n) {
-      if (n->op() == nullptr) return;
-      if (n->op()->name != "argmin" && n->op()->name != "argmax") return;
-      if (n->attrs.dict.find("axis") == n->attrs.dict.end() || n->attrs.dict["axis"] != "-1")
-        return;
-      n->attrs.dict.erase("axis");
-      n->op()->attr_parser(&(n->attrs));
-    });
+    if (n->op() == nullptr)
+      return;
+    if (n->op()->name != "argmin" && n->op()->name != "argmax")
+      return;
+    if (n->attrs.dict.find("axis") == n->attrs.dict.end() || n->attrs.dict["axis"] != "-1")
+      return;
+    n->attrs.dict.erase("axis");
+    n->op()->attr_parser(&(n->attrs));
+  });
   return g;
 }
 
 static std::vector<std::pair<int, std::function<Graph(Graph)> > > upgrader_list = {
-  {MXNET_VERSION, UpgradeJSON_FixParsing},
-  {MXNET_MAKE_VERSION(100, 0, 0), UpgradeJSON_Parse},
-  {MXNET_MAKE_VERSION(0, 9, 0), UpgradeJSON_000800_000900},
-  {MXNET_MAKE_VERSION(0, 9, 4), UpgradeJSON_000903_000904},
-  {MXNET_MAKE_VERSION(0, 9, 5), UpgradeJSON_000904_000905},
+    {MXNET_VERSION, UpgradeJSON_FixParsing},
+    {MXNET_MAKE_VERSION(100, 0, 0), UpgradeJSON_Parse},
+    {MXNET_MAKE_VERSION(0, 9, 0), UpgradeJSON_000800_000900},
+    {MXNET_MAKE_VERSION(0, 9, 4), UpgradeJSON_000903_000904},
+    {MXNET_MAKE_VERSION(0, 9, 5), UpgradeJSON_000904_000905},
 };
 
 Graph LoadLegacyJSONPass(Graph g) {
   g.attrs["load_json_no_parse"] = std::make_shared<nnvm::any>(true);
-  Graph load = nnvm::ApplyPass(g, "LoadJSON");
-  int version = MXNET_MAKE_VERSION(0, 8, 0);
+  Graph load                    = nnvm::ApplyPass(g, "LoadJSON");
+  int version                   = MXNET_MAKE_VERSION(0, 8, 0);
   if (load.attrs.find("mxnet_version") != load.attrs.end()) {
     version = nnvm::get<int>(*load.attrs["mxnet_version"]);
   }
@@ -206,23 +209,24 @@ Graph LoadLegacyJSONPass(Graph g) {
               << ". May cause undefined behavior. "
               << "Please update MXNet if you encounter any issue";
   } else if (version < MXNET_VERSION) {
-    LOG(INFO) << "Loading symbol saved by previous version v"
-              << version/10000 << "." << (version/100)%100 << "." << version%100
-              << ". Attempting to upgrade...";
+    LOG(INFO) << "Loading symbol saved by previous version v" << version / 10000 << "."
+              << (version / 100) % 100 << "." << version % 100 << ". Attempting to upgrade...";
     upgrading = true;
   }
   for (auto& upgrader : upgrader_list) {
-    if (upgrader.first > version) load = upgrader.second(load);
+    if (upgrader.first > version)
+      load = upgrader.second(load);
   }
-  if (upgrading) LOG(INFO) << "Symbol successfully upgraded!";
+  if (upgrading)
+    LOG(INFO) << "Symbol successfully upgraded!";
   return load;
 }
 
 // register pass
 NNVM_REGISTER_PASS(LoadLegacyJSON)
-.describe("Return a new Graph, loaded from src.attrs[\"json\"] and upgraded to current version")
-.set_body(LoadLegacyJSONPass)
-.set_change_graph(true)
-.depend_graph_attr("json");
+    .describe("Return a new Graph, loaded from src.attrs[\"json\"] and upgraded to current version")
+    .set_body(LoadLegacyJSONPass)
+    .set_change_graph(true)
+    .depend_graph_attr("json");
 
 }  // namespace mxnet
diff --git a/src/nnvm/legacy_op_util.cc b/src/nnvm/legacy_op_util.cc
index 851552a56016..53dd5725679d 100644
--- a/src/nnvm/legacy_op_util.cc
+++ b/src/nnvm/legacy_op_util.cc
@@ -34,11 +34,11 @@
 namespace mxnet {
 namespace op {
 
-using nnvm::Op;
 using nnvm::Node;
-using nnvm::ObjectPtr;
 using nnvm::NodeAttrs;
 using nnvm::NodeEntry;
+using nnvm::ObjectPtr;
+using nnvm::Op;
 
 class ParsedOpProp {
  public:
@@ -50,7 +50,7 @@ class ParsedOpProp {
   // initializer
   void Init(const NodeAttrs& attrs) {
     // For performance, do a reserve first and then copy attrs.dict
-    std::vector<std::pair<std::string, std::string> > kwargs;
+    std::vector<std::pair<std::string, std::string>> kwargs;
     kwargs.reserve(attrs.dict.size());
     kwargs.insert(kwargs.end(), attrs.dict.begin(), attrs.dict.end());
     try {
@@ -66,18 +66,17 @@ class ParsedOpProp {
       os << ")";
       throw dmlc::ParamError(os.str());
     }
-    arguments = ptr->ListArguments();
+    arguments  = ptr->ListArguments();
     aux_states = ptr->ListAuxiliaryStates();
-    outputs = ptr->ListOutputs();
-    inputs = arguments;
-    inputs.insert(
-        inputs.end(), aux_states.begin(), aux_states.end());
+    outputs    = ptr->ListOutputs();
+    inputs     = arguments;
+    inputs.insert(inputs.end(), aux_states.begin(), aux_states.end());
   }
 };
 
 class OperatorState {
  public:
-  OperatorState(Operator *opr, const OperatorProperty *prop) {
+  OperatorState(Operator* opr, const OperatorProperty* prop) {
     opr_ = opr;
 
     in_data_fwd_.resize(prop->ListArguments().size());
@@ -99,13 +98,14 @@ class OperatorState {
     for (size_t i = 0; i < out_data_.size(); ++i) {
       out_data_ptr[i] = &out_data_[i];
     }
-    arg_data_ptr_ = prop->BackwardInputs(
-        out_grad_ptr, in_data_ptr, out_data_ptr);
+    arg_data_ptr_ = prop->BackwardInputs(out_grad_ptr, in_data_ptr, out_data_ptr);
   }
 
-  ~OperatorState() { delete opr_; }
+  ~OperatorState() {
+    delete opr_;
+  }
 
-  void Forward(const OpContext &ctx,
+  void Forward(const OpContext& ctx,
                const std::vector<TBlob>& inputs,
                const std::vector<OpReqType>& req,
                const std::vector<TBlob>& outputs) {
@@ -113,16 +113,19 @@ class OperatorState {
     CHECK_EQ(outputs.size(), out_data_.size());
     // in_data_bwd_ has the same tblobs as the ones in in_data_fwd_, except that the ones
     // referred by arg_data_ptr_ will be overriden
-    for (size_t i = 0; i < in_data_fwd_.size(); ++i) in_data_fwd_[i] = inputs[i];
-    for (size_t i = 0; i < in_data_fwd_.size(); ++i) in_data_bwd_[i] = inputs[i];
+    for (size_t i = 0; i < in_data_fwd_.size(); ++i)
+      in_data_fwd_[i] = inputs[i];
+    for (size_t i = 0; i < in_data_fwd_.size(); ++i)
+      in_data_bwd_[i] = inputs[i];
     for (size_t i = 0; i < aux_data_.size(); ++i) {
       aux_data_[i] = inputs[i + in_data_fwd_.size()];
     }
-    for (size_t i = 0; i < out_data_.size(); ++i) out_data_[i] = outputs[i];
+    for (size_t i = 0; i < out_data_.size(); ++i)
+      out_data_[i] = outputs[i];
     opr_->Forward(ctx, in_data_fwd_, req, out_data_, aux_data_);
   }
 
-  void Backward(const OpContext &ctx,
+  void Backward(const OpContext& ctx,
                 const std::vector<TBlob>& inputs,
                 const std::vector<OpReqType>& req,
                 const std::vector<TBlob>& outputs) {
@@ -136,12 +139,13 @@ class OperatorState {
       aux_data_[i] = inputs[inputs.size() - aux_data_.size() + i];
     }
     CHECK_EQ(outputs.size(), in_grad_.size());
-    for (size_t i = 0; i < outputs.size(); ++i) in_grad_[i] = outputs[i];
+    for (size_t i = 0; i < outputs.size(); ++i)
+      in_grad_[i] = outputs[i];
     opr_->Backward(ctx, out_grad_, in_data_bwd_, out_data_, req, in_grad_, aux_data_);
   }
 
  private:
-  Operator *opr_;
+  Operator* opr_;
   // input data blobs for forward and backward
   // in_data_fwd_ and in_data_bwd_ will hold different tblobs when StorageFallbackOpExecutor
   // performs storage fallback on a non-default input NDArray. The one in in_data_fwd_ is
@@ -176,17 +180,15 @@ const OperatorProperty* OpPropGetOpProperty(const NodeAttrs& attrs) {
   return nnvm::get<ParsedOpProp>(attrs.parsed).ptr.get();
 }
 
-template<typename AttrType, typename FInfer>
+template <typename AttrType, typename FInfer>
 bool OpPropInferAttr(const NodeAttrs& attrs,
-                     std::vector<AttrType> *iattr,
-                     std::vector<AttrType> *oattr,
+                     std::vector<AttrType>* iattr,
+                     std::vector<AttrType>* oattr,
                      FInfer finfer) {
   auto& prop = nnvm::get<ParsedOpProp>(attrs.parsed);
   CHECK_EQ(prop.inputs.size(), iattr->size())
-      << "op=" << attrs.op->name
-      << ", inputs.size=" << prop.inputs.size()
-      << ", iattr.size=" << iattr->size()
-      << ", arg.size=" << prop.arguments.size();
+      << "op=" << attrs.op->name << ", inputs.size=" << prop.inputs.size()
+      << ", iattr.size=" << iattr->size() << ", arg.size=" << prop.arguments.size();
   std::vector<AttrType> in_attr(prop.arguments.size());
   std::vector<AttrType> aux_attr(prop.aux_states.size());
 
@@ -196,7 +198,8 @@ bool OpPropInferAttr(const NodeAttrs& attrs,
   for (size_t i = 0; i < prop.aux_states.size(); ++i) {
     aux_attr[i] = (*iattr)[i + prop.arguments.size()];
   }
-  if (!finfer(prop.ptr.get(), &in_attr, oattr, &aux_attr)) return false;
+  if (!finfer(prop.ptr.get(), &in_attr, oattr, &aux_attr))
+    return false;
 
   for (size_t i = 0; i < prop.arguments.size(); ++i) {
     (*iattr)[i] = in_attr[i];
@@ -208,26 +211,20 @@ bool OpPropInferAttr(const NodeAttrs& attrs,
 }
 
 bool OpPropInferShape(const NodeAttrs& attrs,
-                      mxnet::ShapeVector *iattr,
-                      mxnet::ShapeVector *oattr) {
+                      mxnet::ShapeVector* iattr,
+                      mxnet::ShapeVector* oattr) {
   auto finfer = [](const OperatorProperty* op,
-                   mxnet::ShapeVector *in,
-                   mxnet::ShapeVector *out,
-                   mxnet::ShapeVector *aux) {
-    return op->InferShape(in, out, aux);
-  };
+                   mxnet::ShapeVector* in,
+                   mxnet::ShapeVector* out,
+                   mxnet::ShapeVector* aux) { return op->InferShape(in, out, aux); };
   return OpPropInferAttr(attrs, iattr, oattr, finfer);
 }
 
-bool OpPropInferType(const NodeAttrs& attrs,
-                      std::vector<int> *iattr,
-                      std::vector<int> *oattr) {
+bool OpPropInferType(const NodeAttrs& attrs, std::vector<int>* iattr, std::vector<int>* oattr) {
   auto finfer = [](const OperatorProperty* op,
-                   std::vector<int> *in,
-                   std::vector<int> *out,
-                   std::vector<int> *aux) {
-    return op->InferType(in, out, aux);
-  };
+                   std::vector<int>* in,
+                   std::vector<int>* out,
+                   std::vector<int>* aux) { return op->InferType(in, out, aux); };
   return OpPropInferAttr(attrs, iattr, oattr, finfer);
 }
 
@@ -265,7 +262,7 @@ std::vector<uint32_t> OpPropMutateInputs(const NodeAttrs& attrs) {
   return ret;
 }
 
-std::vector<std::pair<int, int> > OpPropInplaceOption(const NodeAttrs& attrs) {
+std::vector<std::pair<int, int>> OpPropInplaceOption(const NodeAttrs& attrs) {
   auto& prop = nnvm::get<ParsedOpProp>(attrs.parsed);
   std::vector<int> in_data(prop.arguments.size());
   std::vector<int> out_data(prop.outputs.size());
@@ -277,7 +274,7 @@ std::vector<std::pair<int, int> > OpPropInplaceOption(const NodeAttrs& attrs) {
     out_data[i] = static_cast<int>(i);
     out_addr[i] = &out_data[i];
   }
-  std::vector<std::pair<int, int> > forward_inplace;
+  std::vector<std::pair<int, int>> forward_inplace;
   for (auto& kv : prop.ptr->ForwardInplaceOption(in_data, out_addr)) {
     forward_inplace.emplace_back(kv.first, *static_cast<int*>(kv.second));
   }
@@ -307,30 +304,28 @@ OpStatePtr OpPropCreateLayerOp(const NodeAttrs& attrs,
                                            prop.ptr.get());
 }
 
-inline std::vector<NodeEntry> OpPropGradient(
-    const Op* back_op,
-    const ObjectPtr& ptr,
-    const std::vector<NodeEntry>& out_grads) {
+inline std::vector<NodeEntry> OpPropGradient(const Op* back_op,
+                                             const ObjectPtr& ptr,
+                                             const std::vector<NodeEntry>& out_grads) {
   auto& prop = nnvm::get<ParsedOpProp>(ptr->attrs.parsed);
   std::vector<NodeEntry> out_data;
   out_data.reserve(prop.outputs.size());
   for (size_t i = 0; i < prop.outputs.size(); ++i)
     out_data.emplace_back(ptr, i, 0);
 
-  std::vector<NodeEntry> in_data(
-      ptr->inputs.begin(), ptr->inputs.begin() + prop.arguments.size());
-  std::vector<NodeEntry> ograd(
-      out_grads.begin(), out_grads.begin() + prop.ptr->NumVisibleOutputs());
+  std::vector<NodeEntry> in_data(ptr->inputs.begin(), ptr->inputs.begin() + prop.arguments.size());
+  std::vector<NodeEntry> ograd(out_grads.begin(),
+                               out_grads.begin() + prop.ptr->NumVisibleOutputs());
   auto inputs = prop.ptr->BackwardInputs(ograd, in_data, out_data);
   // add all the auxiliary data
   for (size_t i = 0; i < prop.aux_states.size(); ++i) {
     inputs.emplace_back(ptr->inputs[i + prop.arguments.size()]);
   }
   ObjectPtr gnode = Node::Create();
-  gnode->inputs = std::move(inputs);
+  gnode->inputs   = std::move(inputs);
   gnode->control_deps.emplace_back(ptr);
-  gnode->attrs = ptr->attrs;
-  gnode->attrs.op = back_op;
+  gnode->attrs      = ptr->attrs;
+  gnode->attrs.op   = back_op;
   gnode->attrs.name = ptr->attrs.name + "_backward";
   std::vector<NodeEntry> in_grad;
   in_grad.reserve(prop.arguments.size() + prop.aux_states.size());
@@ -358,12 +353,13 @@ std::vector<std::string> OpBackListOutputNames(const NodeAttrs& attrs) {
 
 std::vector<uint32_t> OpBackMutateInputs(const NodeAttrs& attrs) {
   auto& prop = nnvm::get<ParsedOpProp>(attrs.parsed);
-  if (prop.aux_states.size() == 0) return std::vector<uint32_t>{};
+  if (prop.aux_states.size() == 0)
+    return std::vector<uint32_t>{};
   std::vector<int> out_grad_index(prop.ptr->NumVisibleOutputs());
   std::vector<int> in_data_index(prop.arguments.size());
   std::vector<int> out_data_index(prop.outputs.size());
-  size_t arg_size = prop.ptr->DeclareBackwardDependency(
-      out_grad_index, in_data_index, out_data_index).size();
+  size_t arg_size =
+      prop.ptr->DeclareBackwardDependency(out_grad_index, in_data_index, out_data_index).size();
   std::vector<uint32_t> ret;
   for (uint32_t i = 0; i < prop.aux_states.size(); ++i) {
     ret.push_back(static_cast<uint32_t>(i + arg_size));
@@ -371,7 +367,7 @@ std::vector<uint32_t> OpBackMutateInputs(const NodeAttrs& attrs) {
   return ret;
 }
 
-std::vector<std::pair<int, int> > OpBackInplaceOption(const NodeAttrs& attrs) {
+std::vector<std::pair<int, int>> OpBackInplaceOption(const NodeAttrs& attrs) {
   auto& prop = nnvm::get<ParsedOpProp>(attrs.parsed);
   std::vector<int> out_grad_index(prop.ptr->NumVisibleOutputs());
   std::vector<int> in_data_index(prop.arguments.size());
@@ -388,8 +384,8 @@ std::vector<std::pair<int, int> > OpBackInplaceOption(const NodeAttrs& attrs) {
     out_data_index[i] = counter++;
   }
 
-  auto args_index = prop.ptr->DeclareBackwardDependency(
-      out_grad_index, in_data_index, out_data_index);
+  auto args_index =
+      prop.ptr->DeclareBackwardDependency(out_grad_index, in_data_index, out_data_index);
   std::vector<int> args_array(counter, -1);
   for (size_t i = 0; i < args_index.size(); ++i) {
     args_array[args_index[i]] = static_cast<int>(i);
@@ -401,14 +397,14 @@ std::vector<std::pair<int, int> > OpBackInplaceOption(const NodeAttrs& attrs) {
     in_grad_ptr[i] = (void*)&in_data_index[i];  // NOLINT(*)
   }
 
-  auto remap_index = prop.ptr->BackwardInplaceOption(
-      out_grad_index, in_data_index, out_data_index, in_grad_ptr);
-  std::vector<std::pair<int, int> > remap(remap_index.size());
+  auto remap_index =
+      prop.ptr->BackwardInplaceOption(out_grad_index, in_data_index, out_data_index, in_grad_ptr);
+  std::vector<std::pair<int, int>> remap(remap_index.size());
   for (size_t i = 0; i < remap_index.size(); ++i) {
     if (args_array[remap_index[i].first] == -1) {
       LOG(FATAL) << "BackwardInplaceOption not consistent with DeclareBackwardDependency";
     }
-    remap[i].first = args_array[remap_index[i].first];
+    remap[i].first  = args_array[remap_index[i].first];
     remap[i].second = *static_cast<int*>(remap_index[i].second);
   }
   return remap;
@@ -423,8 +419,9 @@ inline ExecType OpExecType(const NodeAttrs& attrs) {
 void RegisterLegacyOpProp() {
   for (auto reg : dmlc::Registry<OperatorPropertyReg>::List()) {
     Op& op = ::dmlc::Registry<::nnvm::Op>::Get()->__REGISTER_OR_GET__(reg->name);
-    if (op.attr_parser != nullptr) continue;
-    auto creator = reg->body;
+    if (op.attr_parser != nullptr)
+      continue;
+    auto creator     = reg->body;
     auto attr_parser = [creator](NodeAttrs* attrs) {
       if (attrs->parsed.empty()) {
         ParsedOpProp op;
@@ -457,18 +454,17 @@ void RegisterLegacyOpProp() {
 
     // register BackwardOps
     std::string back_op_name = "_backward_" + reg->name;
-    Op& back_op = ::dmlc::Registry<::nnvm::Op>::Get()->__REGISTER__(back_op_name);
-    op.set_attr<nnvm::FGradient>("FGradient", std::bind(
-        OpPropGradient, &back_op,
-        std::placeholders::_1, std::placeholders::_2));
+    Op& back_op              = ::dmlc::Registry<::nnvm::Op>::Get()->__REGISTER__(back_op_name);
+    op.set_attr<nnvm::FGradient>(
+        "FGradient",
+        std::bind(OpPropGradient, &back_op, std::placeholders::_1, std::placeholders::_2));
     back_op.set_attr_parser(attr_parser);
     back_op.set_num_inputs(nnvm::kVarg);
     back_op.set_num_outputs(OpBackNumOutputs);
     back_op.set_attr<nnvm::FListOutputNames>("FListOutputNames", OpBackListOutputNames);
     back_op.set_attr<nnvm::FMutateInputs>("FMutateInputs", OpBackMutateInputs);
     back_op.set_attr<nnvm::FInplaceOption>("FInplaceOption", OpBackInplaceOption);
-    back_op.set_attr<FResourceRequest>(
-        "FResourceRequest", OpBackResourceRequest);
+    back_op.set_attr<FResourceRequest>("FResourceRequest", OpBackResourceRequest);
     back_op.set_attr<bool>("TIsLayerOpBackward", true);
     back_op.set_attr<bool>("TIsBackward", true);
     back_op.set_attr<FExecType>("FExecType", OpExecType);
@@ -479,64 +475,67 @@ void RegisterLegacyOpProp() {
 
 // no gradient operator
 NNVM_REGISTER_OP(_NoGradient)
-.set_num_inputs(0)
-.set_num_outputs(1)
-.describe("Place holder for variable who cannot perform gradient");
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .describe("Place holder for variable who cannot perform gradient");
 
 void RegisterLegacyNDFunc() {
   for (auto reg : dmlc::Registry<NDArrayFunctionReg>::List()) {
-    if (reg->type_mask & kScalarArgBeforeNDArray) continue;
+    if (reg->type_mask & kScalarArgBeforeNDArray)
+      continue;
     Op& op = ::dmlc::Registry<::nnvm::Op>::Get()->__REGISTER_OR_GET__(reg->name);
-    if (op.attr_parser != nullptr) continue;
+    if (op.attr_parser != nullptr)
+      continue;
 
-    CHECK_LE(reg->num_scalars + reg->num_use_vars, reg->arguments.size())
-        << reg->name;
+    CHECK_LE(reg->num_scalars + reg->num_use_vars, reg->arguments.size()) << reg->name;
     auto func = reg->body;
     op.describe(reg->description);
     op.add_arguments(reg->arguments);
     op.set_num_inputs(reg->num_use_vars);
     op.set_num_outputs(reg->num_mutate_vars);
-    op.set_attr_parser([](NodeAttrs* attrs){});
-    op.set_attr<FNDArrayFunction>("FNDArrayFunction", [reg](const nnvm::NodeAttrs& attrs,
-                                                            const std::vector<NDArray>& inputs,
-                                                            std::vector<NDArray>* outputs) {
-        CHECK_EQ(inputs.size(), reg->num_use_vars);
-        CHECK_EQ(outputs->size(), reg->num_mutate_vars);
-
-        int n_scalars = reg->num_scalars;
-        std::vector<float> scalars;
-        scalars.reserve(n_scalars);
-        auto dict = attrs.dict;
-        for (int i = 0; i < n_scalars; ++i) {
-          const std::string& name = reg->arguments[i+reg->num_use_vars].name;
-          auto s = dict.find(name);
-          CHECK(s != dict.end()) << "Missing scalar param " << name;
-          scalars.push_back(std::stof(s->second));
-          dict.erase(s);
-        }
-
-        int n_params = dict.size();
-        std::vector<const char*> keys, vals;
-        keys.reserve(n_params);
-        vals.reserve(n_params);
-        for (auto& i : dict) {
-          keys.push_back(dmlc::BeginPtr(i.first));
-          vals.push_back(dmlc::BeginPtr(i.second));
-        }
-        std::vector<NDArray*> input_ptrs, output_ptrs;
-        for (auto& i : inputs) {
-          input_ptrs.push_back(const_cast<NDArray*>(&i));
-        }
-        for (auto& i : *outputs) {
-          output_ptrs.push_back(&i);
-        }
-        reg->body(input_ptrs.data(),
-                  scalars.data(),
-                  output_ptrs.data(),
-                  n_params,
-                  const_cast<char**>(keys.data()),
-                  const_cast<char**>(vals.data()));
-      });
+    op.set_attr_parser([](NodeAttrs* attrs) {});
+    op.set_attr<FNDArrayFunction>("FNDArrayFunction",
+                                  [reg](const nnvm::NodeAttrs& attrs,
+                                        const std::vector<NDArray>& inputs,
+                                        std::vector<NDArray>* outputs) {
+                                    CHECK_EQ(inputs.size(), reg->num_use_vars);
+                                    CHECK_EQ(outputs->size(), reg->num_mutate_vars);
+
+                                    int n_scalars = reg->num_scalars;
+                                    std::vector<float> scalars;
+                                    scalars.reserve(n_scalars);
+                                    auto dict = attrs.dict;
+                                    for (int i = 0; i < n_scalars; ++i) {
+                                      const std::string& name =
+                                          reg->arguments[i + reg->num_use_vars].name;
+                                      auto s = dict.find(name);
+                                      CHECK(s != dict.end()) << "Missing scalar param " << name;
+                                      scalars.push_back(std::stof(s->second));
+                                      dict.erase(s);
+                                    }
+
+                                    int n_params = dict.size();
+                                    std::vector<const char*> keys, vals;
+                                    keys.reserve(n_params);
+                                    vals.reserve(n_params);
+                                    for (auto& i : dict) {
+                                      keys.push_back(dmlc::BeginPtr(i.first));
+                                      vals.push_back(dmlc::BeginPtr(i.second));
+                                    }
+                                    std::vector<NDArray*> input_ptrs, output_ptrs;
+                                    for (auto& i : inputs) {
+                                      input_ptrs.push_back(const_cast<NDArray*>(&i));
+                                    }
+                                    for (auto& i : *outputs) {
+                                      output_ptrs.push_back(&i);
+                                    }
+                                    reg->body(input_ptrs.data(),
+                                              scalars.data(),
+                                              output_ptrs.data(),
+                                              n_params,
+                                              const_cast<char**>(keys.data()),
+                                              const_cast<char**>(vals.data()));
+                                  });
   }
 }
 
diff --git a/src/nnvm/low_precision_pass.cc b/src/nnvm/low_precision_pass.cc
index a13344dfccf5..48575c00bccd 100644
--- a/src/nnvm/low_precision_pass.cc
+++ b/src/nnvm/low_precision_pass.cc
@@ -32,63 +32,65 @@
 #include <functional>
 
 namespace mxnet {
-using nnvm::Symbol;
+using nnvm::Graph;
 using nnvm::Node;
-using nnvm::ObjectPtr;
 using nnvm::NodeEntry;
-using nnvm::Graph;
+using nnvm::ObjectPtr;
+using nnvm::Symbol;
 
 // create a node for operator : op_name with name : node_name
 static ObjectPtr CreateNode(std::string op_name, std::string node_name) {
-  ObjectPtr node = Node::Create();
+  ObjectPtr node   = Node::Create();
   node->attrs.name = node_name;
   if (op_name == "nullptr") {
     node->attrs.op = nullptr;
     // ugly workaround because VariableParam is not exposed
-    node->attrs.parsed = nnvm::Symbol::CreateVariable(node->attrs.name)
-                             .outputs[0]
-                             .node->attrs.parsed;
+    node->attrs.parsed =
+        nnvm::Symbol::CreateVariable(node->attrs.name).outputs[0].node->attrs.parsed;
   } else {
     node->attrs.op = Op::Get(op_name);
   }
   return node;
 }
 
-static ObjectPtr InsertNode(std::string op_name, std::string node_name, ObjectPtr current,
-                          NodeEntry previous) {
-    ObjectPtr node = CreateNode(op_name, node_name);
-    node->inputs.emplace_back(previous);
-    if (current) current->inputs.emplace_back(NodeEntry{node, 0, 0});
-    return node;
+static ObjectPtr InsertNode(std::string op_name,
+                            std::string node_name,
+                            ObjectPtr current,
+                            NodeEntry previous) {
+  ObjectPtr node = CreateNode(op_name, node_name);
+  node->inputs.emplace_back(previous);
+  if (current)
+    current->inputs.emplace_back(NodeEntry{node, 0, 0});
+  return node;
 }
 
 // get suffix for a node entry so that it can be used for amp_cast/amp_multicast node name
-static std::string GetSuffix(const nnvm::NodeEntry &node_entry,
-                             const std::unordered_map<Node*, ObjectPtr> &mirror_map) {
-  static const auto &flist_outputs =
-      nnvm::Op::GetAttr<nnvm::FListOutputNames>("FListOutputNames");
-  std::string suffix = "";
-  ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+static std::string GetSuffix(const nnvm::NodeEntry& node_entry,
+                             const std::unordered_map<Node*, ObjectPtr>& mirror_map) {
+  static const auto& flist_outputs = nnvm::Op::GetAttr<nnvm::FListOutputNames>("FListOutputNames");
+  std::string suffix               = "";
+  ObjectPtr mirror_node            = mirror_map.at(node_entry.node.get());
   if (mirror_node->op() != nullptr) {
-      auto list_output_names_func = flist_outputs.get(node_entry.node->op(), nullptr);
-      if (list_output_names_func != nullptr) {
-          std::vector<std::string> names = list_output_names_func(node_entry.node->attrs);
-          suffix = "_" + names[node_entry.index];
-      } else {
-          suffix = "_" + std::to_string(node_entry.index);
-      }
+    auto list_output_names_func = flist_outputs.get(node_entry.node->op(), nullptr);
+    if (list_output_names_func != nullptr) {
+      std::vector<std::string> names = list_output_names_func(node_entry.node->attrs);
+      suffix                         = "_" + names[node_entry.index];
+    } else {
+      suffix = "_" + std::to_string(node_entry.index);
+    }
   }
   return suffix;
 }
 
 // add amp_cast node between curr_node and input
-static void AddCastNode(const nnvm::NodeEntry &e, const std::string &suffix,
-                        const nnvm::NodeEntry &input, const std::string dtype,
-                        nnvm::NodeEntryMap<NodeEntry> *mirror_entry_map,
+static void AddCastNode(const nnvm::NodeEntry& e,
+                        const std::string& suffix,
+                        const nnvm::NodeEntry& input,
+                        const std::string dtype,
+                        nnvm::NodeEntryMap<NodeEntry>* mirror_entry_map,
                         ObjectPtr curr_node) {
   ObjectPtr cast_node =
-      InsertNode("amp_cast", e.node->attrs.name + suffix + "_amp_cast_" + dtype,
-                 curr_node, input);
+      InsertNode("amp_cast", e.node->attrs.name + suffix + "_amp_cast_" + dtype, curr_node, input);
   cast_node->attrs.dict["dtype"] = dtype;
   cast_node->op()->attr_parser(&(cast_node->attrs));
   (*mirror_entry_map)[e] = NodeEntry{std::move(cast_node), 0, e.version};
@@ -96,34 +98,33 @@ static void AddCastNode(const nnvm::NodeEntry &e, const std::string &suffix,
 }
 
 // add amp_multicast node between curr_node and inputs
-static void AddMultiCastNode(const std::vector<NodeEntry> &inputs,
-                             const std::string &node_name,
-                             const std::unordered_map<Node *, ObjectPtr> &mirror_map,
+static void AddMultiCastNode(const std::vector<NodeEntry>& inputs,
+                             const std::string& node_name,
+                             const std::unordered_map<Node*, ObjectPtr>& mirror_map,
                              ObjectPtr curr_node) {
   ObjectPtr node =
-      CreateNode("amp_multicast",
-                 inputs[0].node->attrs.name + node_name + "_amp_multicast");
-  for (const auto &node_entry : inputs) {
+      CreateNode("amp_multicast", inputs[0].node->attrs.name + node_name + "_amp_multicast");
+  for (const auto& node_entry : inputs) {
     ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
-    NodeEntry mirror_entry = NodeEntry{std::move(mirror_node), node_entry.index,
-                                       node_entry.version};
+    NodeEntry mirror_entry =
+        NodeEntry{std::move(mirror_node), node_entry.index, node_entry.version};
     node->inputs.emplace_back(mirror_entry);
   }
   node->attrs.dict["num_outputs"] = std::to_string(inputs.size());
   node->op()->attr_parser(&(node->attrs));
   for (uint32_t i = 0; i < inputs.size(); ++i) {
-    const auto &e = inputs[i];
-    curr_node->inputs.emplace_back(
-        NodeEntry{node, static_cast<uint32_t>(i), e.version});
+    const auto& e = inputs[i];
+    curr_node->inputs.emplace_back(NodeEntry{node, static_cast<uint32_t>(i), e.version});
   }
   return;
 }
 
 static bool CheckConditionalFP32(
-    const std::unordered_map<
-        std::string, std::unordered_map<std::string, std::vector<std::string>>>
-        &conditional_fp32_ops,
-    const std::unordered_set<std::string> &excluded_syms, ObjectPtr node) {
+    const std::unordered_map<std::string,
+                             std::unordered_map<std::string, std::vector<std::string>>>&
+        conditional_fp32_ops,
+    const std::unordered_set<std::string>& excluded_syms,
+    ObjectPtr node) {
   if (node->is_variable() || (excluded_syms.count(node->attrs.name) > 0) ||
       conditional_fp32_ops.count(node->op()->name) == 0) {
     return false;
@@ -134,12 +135,12 @@ static bool CheckConditionalFP32(
       auto it_params = it->second;
       // For each param name, iterate through param values to check
       // if the provided param name is equal to any of the values
-      for (auto & it_param : it_params) {
+      for (auto& it_param : it_params) {
         auto param_key = node->attrs.dict.find(it_param.first);
         if (param_key != node->attrs.dict.end()) {
           auto it_param_vals = it_param.second;
-          if (std::find(it_param_vals.begin(), it_param_vals.end(),
-                        param_key->second) != it_param_vals.end()) {
+          if (std::find(it_param_vals.begin(), it_param_vals.end(), param_key->second) !=
+              it_param_vals.end()) {
             return true;
           }
         }
@@ -149,19 +150,16 @@ static bool CheckConditionalFP32(
   }
 }
 
-Graph ReducePrecision(Graph &&src) {
+Graph ReducePrecision(Graph&& src) {
   static auto& fmutate_inputs = Op::GetAttr<nnvm::FMutateInputs>("FMutateInputs");
-  static auto& infertype = nnvm::Op::GetAttr<nnvm::FInferType>("FInferType");
-  const auto target_dtype_ops =
-      src.GetAttr<std::unordered_set<std::string>>("target_dtype_ops");
-  const auto fp32_ops =
-      src.GetAttr<std::unordered_set<std::string>>("fp32_ops");
-  const auto widest_dtype_ops =
-      src.GetAttr<std::unordered_set<std::string>>("widest_dtype_ops");
-  const auto target_dtype = src.GetAttr<int>("target_dtype");
-  const auto excluded_syms = src.GetAttr<std::unordered_set<std::string>>("excluded_syms");
-  const auto conditional_fp32_ops = src.GetAttr<std::unordered_map<
-      std::string, std::unordered_map<std::string, std::vector<std::string>>>>(
+  static auto& infertype      = nnvm::Op::GetAttr<nnvm::FInferType>("FInferType");
+  const auto target_dtype_ops = src.GetAttr<std::unordered_set<std::string>>("target_dtype_ops");
+  const auto fp32_ops         = src.GetAttr<std::unordered_set<std::string>>("fp32_ops");
+  const auto widest_dtype_ops = src.GetAttr<std::unordered_set<std::string>>("widest_dtype_ops");
+  const auto target_dtype     = src.GetAttr<int>("target_dtype");
+  const auto excluded_syms    = src.GetAttr<std::unordered_set<std::string>>("excluded_syms");
+  const auto conditional_fp32_ops = src.GetAttr<
+      std::unordered_map<std::string, std::unordered_map<std::string, std::vector<std::string>>>>(
       "conditional_fp32_ops");
   const auto data_name_types = src.GetAttr<std::unordered_map<std::string, int>>("data_name_types");
   const auto cast_optional_params = src.GetAttr<int>("cast_optional_params");
@@ -177,12 +175,12 @@ Graph ReducePrecision(Graph &&src) {
   }
 
   // Additional data structures to share common cast node inputs among different nodes
-  std::unordered_map<Node *, ObjectPtr> mirror_map;
+  std::unordered_map<Node*, ObjectPtr> mirror_map;
   nnvm::NodeEntryMap<NodeEntry> mirror_fp32_map;
   nnvm::NodeEntryMap<NodeEntry> mirror_target_dtype_map;
 
   // Visit nodes in a topologically sorted order
-  DFSVisit(src.outputs, [&](const ObjectPtr &node) {
+  DFSVisit(src.outputs, [&](const ObjectPtr& node) {
     ObjectPtr new_node = Node::Create(*node);
     new_node->inputs.clear();
     std::vector<uint32_t> mutable_inputs;
@@ -203,11 +201,11 @@ Graph ReducePrecision(Graph &&src) {
         (excluded_syms.count(node->attrs.name) > 0)) {
       // Add output entry to fp32_map
       for (size_t i = 0; i < node->num_outputs(); ++i) {
-        const auto out_entry = NodeEntry(node, i, 0);
+        const auto out_entry       = NodeEntry(node, i, 0);
         mirror_fp32_map[out_entry] = NodeEntry(new_node, i, 0);
       }
       for (size_t i = 0; i < node->inputs.size(); ++i) {
-        const auto &node_entry = node->inputs[i];
+        const auto& node_entry = node->inputs[i];
         if (mirror_fp32_map.count(node_entry)) {
           new_node->inputs.emplace_back(mirror_fp32_map[node_entry]);
         } else if (node_entry.node->is_variable()) {
@@ -215,9 +213,9 @@ Graph ReducePrecision(Graph &&src) {
           ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
           new_node->inputs.emplace_back(mirror_node, node_entry.index, node_entry.version);
         } else {
-          ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+          ObjectPtr mirror_node  = mirror_map.at(node_entry.node.get());
           NodeEntry mirror_entry = NodeEntry{mirror_node, node_entry.index, node_entry.version};
-          std::string suffix = GetSuffix(node_entry, mirror_map);
+          std::string suffix     = GetSuffix(node_entry, mirror_map);
           AddCastNode(node_entry, suffix, mirror_entry, "float32", &mirror_fp32_map, new_node);
         }
       }
@@ -228,7 +226,7 @@ Graph ReducePrecision(Graph &&src) {
       if (infertype.count(node->op())) {
         // Try to infertype with target dtype. And add output entry to mirror_target_dtype_map or
         // mirror_fp32_map based on infered result.
-        in_types[0] = target_dtype;
+        in_types[0]             = target_dtype;
         bool infer_type_success = infertype[node->op()](node->attrs, &in_types, &out_types);
         CHECK(infer_type_success == true);
         for (size_t i = 0; i < node->num_outputs(); ++i) {
@@ -241,7 +239,7 @@ Graph ReducePrecision(Graph &&src) {
         }
       }
       for (size_t i = 0; i < node->inputs.size(); ++i) {
-        const auto &node_entry = node->inputs[i];
+        const auto& node_entry = node->inputs[i];
         if (mirror_target_dtype_map.count(node_entry)) {
           new_node->inputs.emplace_back(mirror_target_dtype_map[node_entry]);
         } else if ((cast_optional_params && node_entry.node->is_variable() &&
@@ -255,7 +253,7 @@ Graph ReducePrecision(Graph &&src) {
           // 2. Mutable inputs.
           // 3. Even the input[0] is target dtype, some operations still require float32 for other
           //    inputs. For example, Batchnorm.
-          ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+          ObjectPtr mirror_node   = mirror_map.at(node_entry.node.get());
           const auto mirror_entry = NodeEntry(mirror_node, node_entry.index, node_entry.version);
           new_node->inputs.push_back(mirror_entry);
           if ((cast_optional_params && node_entry.node->is_variable())) {
@@ -263,28 +261,30 @@ Graph ReducePrecision(Graph &&src) {
             mirror_target_dtype_map[node_entry] = mirror_entry;
           }
         } else {
-          ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+          ObjectPtr mirror_node  = mirror_map.at(node_entry.node.get());
           NodeEntry mirror_entry = NodeEntry{mirror_node, node_entry.index, node_entry.version};
-          std::string suffix = GetSuffix(node_entry, mirror_map);
-          AddCastNode(node_entry, suffix, mirror_entry, target_dtype_str, &mirror_target_dtype_map,
+          std::string suffix     = GetSuffix(node_entry, mirror_map);
+          AddCastNode(node_entry,
+                      suffix,
+                      mirror_entry,
+                      target_dtype_str,
+                      &mirror_target_dtype_map,
                       new_node);
         }
       }
-    } else if (!node->is_variable() &&
-               widest_dtype_ops.count(node->op()->name) > 0 &&
+    } else if (!node->is_variable() && widest_dtype_ops.count(node->op()->name) > 0 &&
                excluded_syms.count(node->attrs.name) == 0) {
       CHECK(node->inputs.size() > 0)
-          << "Please check the symbol. node name: " << node->attrs.name
-          << "op name " << node->op()->name << " has no inputs."
+          << "Please check the symbol. node name: " << node->attrs.name << "op name "
+          << node->op()->name << " has no inputs."
           << "It is likely that something went wrong during symbolic construction.";
       CHECK_EQ(mutable_inputs.size(), 0)
           << "can't handle the widest_dtype_ops with mutable inputs.";
-      int out_dtype = target_dtype;
+      int out_dtype           = target_dtype;
       bool have_unknown_dtype = false;
-      for (auto & input : node->inputs) {
+      for (auto& input : node->inputs) {
         // Try to infer output dtype based on input dtype
-        if (!mirror_target_dtype_map.count(input)
-            && !mirror_fp32_map.count(input)) {
+        if (!mirror_target_dtype_map.count(input) && !mirror_fp32_map.count(input)) {
           have_unknown_dtype = true;
           break;
         } else if (mirror_fp32_map.count(input)) {
@@ -293,7 +293,7 @@ Graph ReducePrecision(Graph &&src) {
       }
       if (have_unknown_dtype) {
         // We can't infer all dtype for inputs, so we need to add AddMultiCastNode here.
-        const auto &e = node->inputs[0];
+        const auto& e      = node->inputs[0];
         std::string suffix = GetSuffix(e, mirror_map);
         AddMultiCastNode(node->inputs, suffix, mirror_map, new_node);
       } else {
@@ -307,24 +307,28 @@ Graph ReducePrecision(Graph &&src) {
         }
         // we know all dtype from inputs, then we can use amp_cast instead.
         for (size_t i = 0; i < node->inputs.size(); ++i) {
-          const auto &node_entry = node->inputs[i];
+          const auto& node_entry = node->inputs[i];
           if (out_dtype == target_dtype) {
             if (mirror_target_dtype_map.count(node_entry)) {
               new_node->inputs.emplace_back(mirror_target_dtype_map[node_entry]);
             } else {
-              ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+              ObjectPtr mirror_node  = mirror_map.at(node_entry.node.get());
               NodeEntry mirror_entry = NodeEntry{mirror_node, node_entry.index, node_entry.version};
-              std::string suffix = GetSuffix(node_entry, mirror_map);
-              AddCastNode(node_entry, suffix, mirror_entry, target_dtype_str,
-                          &mirror_target_dtype_map, new_node);
+              std::string suffix     = GetSuffix(node_entry, mirror_map);
+              AddCastNode(node_entry,
+                          suffix,
+                          mirror_entry,
+                          target_dtype_str,
+                          &mirror_target_dtype_map,
+                          new_node);
             }
           } else {
             if (mirror_fp32_map.count(node_entry)) {
               new_node->inputs.emplace_back(mirror_fp32_map[node_entry]);
             } else {
-              ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+              ObjectPtr mirror_node  = mirror_map.at(node_entry.node.get());
               NodeEntry mirror_entry = NodeEntry{mirror_node, node_entry.index, node_entry.version};
-              std::string suffix = GetSuffix(node_entry, mirror_map);
+              std::string suffix     = GetSuffix(node_entry, mirror_map);
               AddCastNode(node_entry, suffix, mirror_entry, "float32", &mirror_fp32_map, new_node);
             }
           }
@@ -332,11 +336,11 @@ Graph ReducePrecision(Graph &&src) {
       }
     } else if (CheckConditionalFP32(conditional_fp32_ops, excluded_syms, node)) {
       for (size_t i = 0; i < node->num_outputs(); ++i) {
-        const auto out_entry = NodeEntry(node, i, 0);
+        const auto out_entry       = NodeEntry(node, i, 0);
         mirror_fp32_map[out_entry] = NodeEntry(new_node, i, 0);
       }
       for (size_t i = 0; i < node->inputs.size(); ++i) {
-        const auto &node_entry = node->inputs[i];
+        const auto& node_entry = node->inputs[i];
         if (mirror_fp32_map.count(node_entry)) {
           new_node->inputs.emplace_back(mirror_fp32_map[node_entry]);
         } else if (std::find(mutable_inputs.begin(), mutable_inputs.end(), i) !=
@@ -345,9 +349,9 @@ Graph ReducePrecision(Graph &&src) {
           ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
           new_node->inputs.emplace_back(mirror_node, node_entry.index, node_entry.version);
         } else {
-          ObjectPtr mirror_node = mirror_map.at(node_entry.node.get());
+          ObjectPtr mirror_node  = mirror_map.at(node_entry.node.get());
           NodeEntry mirror_entry = NodeEntry{mirror_node, node_entry.index, node_entry.version};
-          std::string suffix = GetSuffix(node_entry, mirror_map);
+          std::string suffix     = GetSuffix(node_entry, mirror_map);
           AddCastNode(node_entry, suffix, mirror_entry, "float32", &mirror_fp32_map, new_node);
         }
       }
@@ -361,7 +365,7 @@ Graph ReducePrecision(Graph &&src) {
         std::vector<int> in_types(node->inputs.size(), -1);
         std::vector<int> out_types(node->num_outputs(), -1);
         if (infertype.count(node->op())) {
-          in_types[0] = in_type;
+          in_types[0]             = in_type;
           bool infer_type_success = infertype[node->op()](node->attrs, &in_types, &out_types);
           if (infer_type_success) {
             for (size_t i = 0; i < node->num_outputs(); ++i) {
@@ -384,13 +388,13 @@ Graph ReducePrecision(Graph &&src) {
   });
 
   std::vector<NodeEntry> outputs;
-  for (const auto &e : src.outputs) {
+  for (const auto& e : src.outputs) {
     if (mirror_fp32_map.count(e)) {
       outputs.emplace_back(mirror_fp32_map[e]);
     } else {
-      ObjectPtr mirror_node = mirror_map.at(e.node.get());
+      ObjectPtr mirror_node  = mirror_map.at(e.node.get());
       NodeEntry mirror_entry = NodeEntry{mirror_node, e.index, e.version};
-      std::string suffix = GetSuffix(e, mirror_map);
+      std::string suffix     = GetSuffix(e, mirror_map);
       AddCastNode(e, suffix, mirror_entry, "float32", &mirror_fp32_map, nullptr);
       outputs.emplace_back(mirror_fp32_map[e]);
     }
diff --git a/src/nnvm/node_op_util.h b/src/nnvm/node_op_util.h
index cba6fb8286af..c3a277aa4e22 100644
--- a/src/nnvm/node_op_util.h
+++ b/src/nnvm/node_op_util.h
@@ -34,58 +34,54 @@ namespace util {
 
 class NodeOpGen {
  private:
-    const nnvm::ObjectPtr &dependent_node;
+  const nnvm::ObjectPtr& dependent_node;
 
  public:
-    explicit NodeOpGen(const nnvm::ObjectPtr &dependent_node) : dependent_node{dependent_node} {}
+  explicit NodeOpGen(const nnvm::ObjectPtr& dependent_node) : dependent_node{dependent_node} {}
 
-    nnvm::NodeEntry mul(const nnvm::NodeEntry &lhs, const nnvm::NodeEntry &rhs) {
-        return nnvm::NodeEntry{mxnet::op::MakeNode("elemwise_mul",
-                                                   dependent_node->attrs.name + "_mul",
-                                                   {lhs, rhs}, nullptr, &dependent_node)};
-    }
+  nnvm::NodeEntry mul(const nnvm::NodeEntry& lhs, const nnvm::NodeEntry& rhs) {
+    return nnvm::NodeEntry{mxnet::op::MakeNode(
+        "elemwise_mul", dependent_node->attrs.name + "_mul", {lhs, rhs}, nullptr, &dependent_node)};
+  }
 
-    nnvm::NodeEntry mul(const nnvm::NodeEntry &x, double scalar) {
-        const std::unordered_map<std::string, std::string> scalar_dict =
-            {{"scalar", std::to_string(scalar)}};
-        return nnvm::NodeEntry{mxnet::op::MakeNode("_mul_scalar",
-                                                   dependent_node->attrs.name + "_mul_scalar",
-                                                   {x}, &scalar_dict, &dependent_node)};
-    }
+  nnvm::NodeEntry mul(const nnvm::NodeEntry& x, double scalar) {
+    const std::unordered_map<std::string, std::string> scalar_dict = {
+        {"scalar", std::to_string(scalar)}};
+    return nnvm::NodeEntry{mxnet::op::MakeNode("_mul_scalar",
+                                               dependent_node->attrs.name + "_mul_scalar",
+                                               {x},
+                                               &scalar_dict,
+                                               &dependent_node)};
+  }
 
-    nnvm::NodeEntry mul(double scalar, const nnvm::NodeEntry &x) {
-        return NodeOpGen::mul(x, scalar);
-    }
+  nnvm::NodeEntry mul(double scalar, const nnvm::NodeEntry& x) {
+    return NodeOpGen::mul(x, scalar);
+  }
 
-    nnvm::NodeEntry div(const nnvm::NodeEntry &lhs, const nnvm::NodeEntry &rhs) {
-        return nnvm::NodeEntry{mxnet::op::MakeNode("elemwise_div",
-                                                   dependent_node->attrs.name + "_div",
-                                                   {lhs, rhs}, nullptr, &dependent_node)};
-    }
+  nnvm::NodeEntry div(const nnvm::NodeEntry& lhs, const nnvm::NodeEntry& rhs) {
+    return nnvm::NodeEntry{mxnet::op::MakeNode(
+        "elemwise_div", dependent_node->attrs.name + "_div", {lhs, rhs}, nullptr, &dependent_node)};
+  }
 
-    nnvm::NodeEntry square(const nnvm::NodeEntry &x) {
-        return nnvm::NodeEntry{mxnet::op::MakeNode("square",
-                                                   dependent_node->attrs.name + "_square",
-                                                   {x}, nullptr, &dependent_node)};
-    }
+  nnvm::NodeEntry square(const nnvm::NodeEntry& x) {
+    return nnvm::NodeEntry{mxnet::op::MakeNode(
+        "square", dependent_node->attrs.name + "_square", {x}, nullptr, &dependent_node)};
+  }
 
-    nnvm::NodeEntry reciprocal(const nnvm::NodeEntry &x) {
-        return nnvm::NodeEntry{mxnet::op::MakeNode("reciprocal",
-                                                   dependent_node->attrs.name + "_reciprocal",
-                                                   {x}, nullptr, &dependent_node)};
-    }
+  nnvm::NodeEntry reciprocal(const nnvm::NodeEntry& x) {
+    return nnvm::NodeEntry{mxnet::op::MakeNode(
+        "reciprocal", dependent_node->attrs.name + "_reciprocal", {x}, nullptr, &dependent_node)};
+  }
 
-    nnvm::NodeEntry negative(const nnvm::NodeEntry &x) {
-        return nnvm::NodeEntry{mxnet::op::MakeNode("negative",
-                                                   dependent_node->attrs.name + "_negative",
-                                                   {x}, nullptr, &dependent_node)};
-    }
+  nnvm::NodeEntry negative(const nnvm::NodeEntry& x) {
+    return nnvm::NodeEntry{mxnet::op::MakeNode(
+        "negative", dependent_node->attrs.name + "_negative", {x}, nullptr, &dependent_node)};
+  }
 
-    nnvm::NodeEntry ones_like(const nnvm::NodeEntry &x) {
-        return nnvm::NodeEntry{mxnet::op::MakeNode("ones_like",
-                                                   dependent_node->attrs.name + "_oneslike",
-                                                   {x}, nullptr, &dependent_node)};
-    }
+  nnvm::NodeEntry ones_like(const nnvm::NodeEntry& x) {
+    return nnvm::NodeEntry{mxnet::op::MakeNode(
+        "ones_like", dependent_node->attrs.name + "_oneslike", {x}, nullptr, &dependent_node)};
+  }
 };
 
 }  // namespace util
diff --git a/src/nnvm/plan_memory.cc b/src/nnvm/plan_memory.cc
index f6c13e247e6a..4c9ce06d3362 100644
--- a/src/nnvm/plan_memory.cc
+++ b/src/nnvm/plan_memory.cc
@@ -79,19 +79,22 @@ class MXGraphAllocator {
 
   // request a free storage
   StorageID Request(int dev_id, int dtype, mxnet::TShape shape, uint32_t node_id) {
-    if (!mxnet::shape_is_known(shape)) return kBadStorageID;
+    if (!mxnet::shape_is_known(shape))
+      return kBadStorageID;
     // search memory block in [size / match_range_, size * match_range_)
     size_t size = shape.Size() * MXGetDTypeSize(dtype);
-    if (match_range_ == 0) return this->Alloc(dev_id, size);
+    if (match_range_ == 0)
+      return this->Alloc(dev_id, size);
     auto begin = free_.lower_bound(size / match_range_);
-    auto mid = free_.lower_bound(size);
-    auto end = free_.upper_bound(size * match_range_);
+    auto mid   = free_.lower_bound(size);
+    auto end   = free_.upper_bound(size * match_range_);
     // search for memory blocks larger than requested
     for (auto it = mid; it != end; ++it) {
-      StorageEntry *e = it->second;
-      if (e->device_id != dev_id) continue;
-      if (node_color_.size() != 0 &&
-          node_color_[e->released_by_node] != node_color_[node_id]) continue;
+      StorageEntry* e = it->second;
+      if (e->device_id != dev_id)
+        continue;
+      if (node_color_.size() != 0 && node_color_[e->released_by_node] != node_color_[node_id])
+        continue;
       // Use exect matching strategy
       e->max_bytes = std::max(size, e->max_bytes);
       // find a exact match, erase from map and return
@@ -101,10 +104,11 @@ class MXGraphAllocator {
     // then search for memory blocks smaller than requested space
     for (auto it = mid; it != begin;) {
       --it;
-      StorageEntry *e = it->second;
-      if (e->device_id != dev_id) continue;
-      if (node_color_.size() != 0 &&
-          node_color_[e->released_by_node] != node_color_[node_id]) continue;
+      StorageEntry* e = it->second;
+      if (e->device_id != dev_id)
+        continue;
+      if (node_color_.size() != 0 && node_color_[e->released_by_node] != node_color_[node_id])
+        continue;
       // Use exect matching strategy
       e->max_bytes = std::max(size, e->max_bytes);
       // erase from map and return
@@ -117,8 +121,9 @@ class MXGraphAllocator {
   // release a memory space.
   void Release(StorageID id, uint32_t node_id) {
     CHECK_NE(id, kBadStorageID);
-    if (id == kExternalStorageID || id == kDynamicStorageID) return;
-    StorageEntry *e = data_[id].get();
+    if (id == kExternalStorageID || id == kDynamicStorageID)
+      return;
+    StorageEntry* e     = data_[id].get();
     e->released_by_node = node_id;
     free_.insert({e->max_bytes, e});
   }
@@ -126,7 +131,7 @@ class MXGraphAllocator {
   // totoal number of bytes allocated
   size_t TotalAllocBytes() const {
     size_t total = 0;
-    for (auto &p : data_) {
+    for (auto& p : data_) {
       total += p->max_bytes;
     }
     return total;
@@ -140,23 +145,23 @@ class MXGraphAllocator {
  private:
   // initialize the graph allocator
   void Init(const size_t match_range, const uint32_t num_match_color) {
-    match_range_ = match_range;
+    match_range_     = match_range;
     num_match_color_ = num_match_color;
     if (num_match_color_ > 1) {
       std::vector<uint32_t> importance(idx_->num_nodes(), 0);
       for (uint32_t nid = 0; nid < idx_->num_nodes(); ++nid) {
-        if ((*idx_)[nid].source->is_variable()) continue;
+        if ((*idx_)[nid].source->is_variable())
+          continue;
         importance[nid] = 1;
       }
-      num_match_color_ = pass::MXColorNodeGroup(
-          *idx_, importance, num_match_color_, &node_color_);
+      num_match_color_ = pass::MXColorNodeGroup(*idx_, importance, num_match_color_, &node_color_);
     }
   }
 
   StorageID Alloc(int dev_id, size_t size) {
     StorageID id = static_cast<StorageID>(data_.size());
     std::unique_ptr<StorageEntry> ptr(new StorageEntry());
-    ptr->id = id;
+    ptr->id        = id;
     ptr->device_id = dev_id;
     ptr->max_bytes = size;
     data_.emplace_back(std::move(ptr));
@@ -192,24 +197,25 @@ class MXGraphAllocator {
 /*
  * Internal method to perform the memory allocation for a graph
  * */
-size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
-                   const std::pair<uint32_t, uint32_t>& node_range,
-                   StorageVector* storage_ptr,
-                   std::vector<int>* storage_inplace_index_ptr,
-                   const std::vector<uint32_t>& entry_ref_count,
-                   MXGraphAllocator* allocator) {
-  static auto& finplace_option = Op::GetAttr<FInplaceOption>("FInplaceOption");
+size_t MXAllocMemory(const Graph& ret,
+                     const IndexedGraph& idx,
+                     const std::pair<uint32_t, uint32_t>& node_range,
+                     StorageVector* storage_ptr,
+                     std::vector<int>* storage_inplace_index_ptr,
+                     const std::vector<uint32_t>& entry_ref_count,
+                     MXGraphAllocator* allocator) {
+  static auto& finplace_option   = Op::GetAttr<FInplaceOption>("FInplaceOption");
   static auto& finplace_identity = Op::GetAttr<FInplaceIdentity>("FInplaceIdentity");
-  static auto& fignore_inputs = Op::GetAttr<FIgnoreInputs>("FIgnoreInputs");
+  static auto& fignore_inputs    = Op::GetAttr<FIgnoreInputs>("FIgnoreInputs");
 
   // Get reference
-  auto &storage = *storage_ptr;
-  auto &storage_inplace_index = *storage_inplace_index_ptr;
+  auto& storage               = *storage_ptr;
+  auto& storage_inplace_index = *storage_inplace_index_ptr;
 
   // Get attributes from the graph
   const mxnet::ShapeVector& shape_vec = ret.GetAttr<mxnet::ShapeVector>("shape");
-  const DTypeVector& dtype_vec = ret.GetAttr<DTypeVector>("dtype");
-  const DeviceVector* device_vec = nullptr;
+  const DTypeVector& dtype_vec        = ret.GetAttr<DTypeVector>("dtype");
+  const DeviceVector* device_vec      = nullptr;
 
   if (ret.attrs.count("device") != 0) {
     device_vec = &(ret.GetAttr<DeviceVector>("device"));
@@ -219,7 +225,8 @@ size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
 
   for (uint32_t nid = node_range.first; nid < node_range.second; ++nid) {
     const auto& inode = idx[nid];
-    if (inode.source->is_variable()) continue;
+    if (inode.source->is_variable())
+      continue;
     // check inplace option
     if (finplace_option.count(inode.source->op()) != 0) {
       auto inplace_pairs = finplace_option[inode.source->op()](inode.source->attrs);
@@ -234,30 +241,26 @@ size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
       }
       std::vector<bool> taken(inode.inputs.size(), false);
       for (size_t ipair = 0; ipair < inplace_pairs.size(); ++ipair) {
-        const auto& kv = inplace_pairs[ipair];
-        uint32_t eid_out = idx.entry_id(nid, kv.second);
-        uint32_t eid_in = idx.entry_id(inode.inputs[kv.first]);
-        auto sid_out = storage[eid_out];
-        auto sid_in = storage[eid_in];
+        const auto& kv         = inplace_pairs[ipair];
+        uint32_t eid_out       = idx.entry_id(nid, kv.second);
+        uint32_t eid_in        = idx.entry_id(inode.inputs[kv.first]);
+        auto sid_out           = storage[eid_out];
+        auto sid_in            = storage[eid_in];
         bool ignore_all_inputs = (fignore_inputs.count(inode.source->op()) != 0 &&
-                                  fignore_inputs[inode.source->op()](
-                                      inode.source->attrs).size() == inode.source->num_inputs());
+                                  fignore_inputs[inode.source->op()](inode.source->attrs).size() ==
+                                      inode.source->num_inputs());
         // Identity should only be true if shape.Size() and types match
-        bool real_identity = identity[ipair] &&
-                             ndim_is_known(shape_vec[eid_out]) &&
+        bool real_identity = identity[ipair] && ndim_is_known(shape_vec[eid_out]) &&
                              ndim_is_known(shape_vec[eid_in]) &&
                              shape_vec[eid_out].Size() == shape_vec[eid_in].Size() &&
                              dtype_vec[eid_out] == dtype_vec[eid_in];
-        if (taken[kv.first] == false &&
-            sid_out == MXGraphAllocator::kBadStorageID &&
-            sid_in >= 0 &&
+        if (taken[kv.first] == false && sid_out == MXGraphAllocator::kBadStorageID && sid_in >= 0 &&
             ((storage_ref_count[sid_in] == 1 && !ignore_all_inputs) || real_identity) &&
-            entry_ref_count[eid_out] > 0 &&
-            shape_vec[eid_out].Size() == shape_vec[eid_in].Size() &&
-             (dtype_vec[eid_out] == dtype_vec[eid_in] ||
+            entry_ref_count[eid_out] > 0 && shape_vec[eid_out].Size() == shape_vec[eid_in].Size() &&
+            (dtype_vec[eid_out] == dtype_vec[eid_in] ||
              MXGetDTypeSize(dtype_vec[eid_out]) == MXGetDTypeSize(dtype_vec[eid_in]))) {
           // inplace optimization
-          taken[kv.first] = true;
+          taken[kv.first]  = true;
           storage[eid_out] = sid_in;
           // Reuse storage for output and add ref count of output
           // to storage. This will get substracted later in free
@@ -275,18 +278,18 @@ size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
       uint32_t eid = idx.entry_id(nid, index);
       // only request memory for kBadStorageID
       if (storage[eid] == MXGraphAllocator::kBadStorageID) {
-        auto &eshape = shape_vec[eid];
+        auto& eshape = shape_vec[eid];
         size_t esize = ndim_is_known(shape_vec[eid]) ? eshape.Size() : 0;
         eids.insert(std::make_pair(esize, eid));
       }
     }
     for (auto rit = eids.rbegin(); rit != eids.rend(); ++rit) {
-        uint32_t eid = rit->second;
-        auto sid = allocator->Request(dev_id, dtype_vec[eid], shape_vec[eid], nid);
-        if (sid >= 0) {
-          storage_ref_count[sid] = entry_ref_count[eid];
-        }
-        storage[eid] = sid;
+      uint32_t eid = rit->second;
+      auto sid     = allocator->Request(dev_id, dtype_vec[eid], shape_vec[eid], nid);
+      if (sid >= 0) {
+        storage_ref_count[sid] = entry_ref_count[eid];
+      }
+      storage[eid] = sid;
     }
     // check if certain inputs is ignored.
     std::vector<uint32_t> ignore_inputs;
@@ -297,12 +300,14 @@ size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
     // then free inputs
     for (size_t i = 0; i < inode.inputs.size(); ++i) {
       // ref counter of ignored input is already decreased.
-      if (std::binary_search(ignore_inputs.begin(), ignore_inputs.end(), i)) continue;
+      if (std::binary_search(ignore_inputs.begin(), ignore_inputs.end(), i))
+        continue;
       const auto& e = inode.inputs[i];
-      uint32_t eid = idx.entry_id(e);
-      auto sid = storage[eid];
+      uint32_t eid  = idx.entry_id(e);
+      auto sid      = storage[eid];
       // storage_ref_count == 0 means it is taken by inplace op
-      if (sid < 0) continue;
+      if (sid < 0)
+        continue;
       // if we decrease it to zero, means we are ready to release
       --storage_ref_count[sid];
       if (storage_ref_count[sid] == 0) {
@@ -313,7 +318,7 @@ size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
     // these output are not referenced by any operator.
     for (uint32_t index = 0; index < inode.source->num_outputs(); ++index) {
       uint32_t eid = idx.entry_id(nid, index);
-      auto sid = storage[eid];
+      auto sid     = storage[eid];
       if (sid >= 0 && storage_ref_count[sid] == 0) {
         allocator->Release(sid, nid);
         // use -2 to indicate that the node was never touched.
@@ -327,12 +332,11 @@ size_t MXAllocMemory(const Graph& ret, const IndexedGraph& idx,
   return num_not_allocated;
 }
 
-
 // function to plan memory
 Graph MXPlanMemory(Graph ret) {
   // setup ref counter
-  const IndexedGraph& idx = ret.indexed_graph();
-  static auto& fignore_inputs = Op::GetAttr<FIgnoreInputs>("FIgnoreInputs");
+  const IndexedGraph& idx                  = ret.indexed_graph();
+  static auto& fignore_inputs              = Op::GetAttr<FIgnoreInputs>("FIgnoreInputs");
   std::pair<uint32_t, uint32_t> node_range = {0, idx.num_nodes()};
   if (ret.attrs.count("node_range")) {
     node_range = ret.MoveCopyAttr<std::pair<uint32_t, uint32_t> >("node_range");
@@ -346,7 +350,8 @@ Graph MXPlanMemory(Graph ret) {
     ref_count.resize(idx.num_node_entries(), 0);
     for (uint32_t nid = 0; nid < idx.num_nodes(); ++nid) {
       const auto& inode = idx[nid];
-      if (inode.source->is_variable()) continue;
+      if (inode.source->is_variable())
+        continue;
       for (const auto& e : inode.inputs) {
         ++ref_count[idx.entry_id(e)];
       }
@@ -373,10 +378,11 @@ Graph MXPlanMemory(Graph ret) {
 
   // Search the best NNVM_EXEC_MATCH_RANGE parameter. This is turned off by default
   size_t min_allocated_bytes = -1;
-  size_t max_match_range = dmlc::GetEnv("NNVM_EXEC_MATCH_RANGE", 16);
+  size_t max_match_range     = dmlc::GetEnv("NNVM_EXEC_MATCH_RANGE", 16);
   size_t min_match_range =
-      dmlc::GetEnv("MXNET_MEMORY_OPT", 0) ||
-      dmlc::GetEnv("NNVM_AUTO_SEARCH_MATCH_RANGE", false) ? 1 : max_match_range;
+      dmlc::GetEnv("MXNET_MEMORY_OPT", 0) || dmlc::GetEnv("NNVM_AUTO_SEARCH_MATCH_RANGE", false)
+          ? 1
+          : max_match_range;
   for (size_t match_range = min_match_range; match_range <= max_match_range; match_range *= 2) {
     // Make a copy of related fields
     StorageVector storage_vec(storage);
@@ -386,18 +392,17 @@ Graph MXPlanMemory(Graph ret) {
     MXGraphAllocator allocator(&idx, match_range);
 
     // number of entries that are not statically allocated.
-    size_t storage_num_not_allocated =
-      MXAllocMemory(ret, idx, node_range, &storage_vec, &storage_inplace_index,
-                  ref_count, &allocator);
+    size_t storage_num_not_allocated = MXAllocMemory(
+        ret, idx, node_range, &storage_vec, &storage_inplace_index, ref_count, &allocator);
     size_t storage_allocated_bytes = allocator.TotalAllocBytes();
 
     // Choose the plan which leads to minimal memory usage
     if (min_allocated_bytes > storage_allocated_bytes) {
-      ret.attrs["storage_id"] = std::make_shared<any>(std::move(storage_vec));
+      ret.attrs["storage_id"]            = std::make_shared<any>(std::move(storage_vec));
       ret.attrs["storage_inplace_index"] = std::make_shared<any>(std::move(storage_inplace_index));
-      ret.attrs["storage_allocated_bytes"] = std::make_shared<any>(storage_allocated_bytes);
+      ret.attrs["storage_allocated_bytes"]   = std::make_shared<any>(storage_allocated_bytes);
       ret.attrs["storage_num_not_allocated"] = std::make_shared<any>(storage_num_not_allocated);
-      min_allocated_bytes = storage_allocated_bytes;
+      min_allocated_bytes                    = storage_allocated_bytes;
     }
 
     if (max_match_range == 0) {
@@ -408,13 +413,13 @@ Graph MXPlanMemory(Graph ret) {
 }
 
 NNVM_REGISTER_PASS(MXPlanMemory)
-.describe("Plan the memory allocation of each node entries.")
-.set_body(MXPlanMemory)
-.set_change_graph(false)
-.depend_graph_attr("dtype")
-.depend_graph_attr("shape")
-.provide_graph_attr("storage_id")
-.provide_graph_attr("storage_inplace_index");
+    .describe("Plan the memory allocation of each node entries.")
+    .set_body(MXPlanMemory)
+    .set_change_graph(false)
+    .depend_graph_attr("dtype")
+    .depend_graph_attr("shape")
+    .provide_graph_attr("storage_id")
+    .provide_graph_attr("storage_inplace_index");
 
 }  // namespace
 }  // namespace pass
diff --git a/src/nnvm/tvm_bridge.cc b/src/nnvm/tvm_bridge.cc
index 20700f60054e..27c42aaabbb6 100644
--- a/src/nnvm/tvm_bridge.cc
+++ b/src/nnvm/tvm_bridge.cc
@@ -65,30 +65,26 @@ class TVMFunctor {
     values_.clear();
     type_codes_.clear();
     values_.insert(values_.end(), args.values, args.values + args.size());
-    type_codes_.insert(
-        type_codes_.end(), args.type_codes, args.type_codes + args.size());
+    type_codes_.insert(type_codes_.end(), args.type_codes, args.type_codes + args.size());
 
     size_t const_loc_ptr = 0;
     for (int i = 0; i < args.size(); ++i) {
       if (args.type_codes[i] == kTVMNDArrayTypeCode) {
-        const NDArray& nd =
-            static_cast<NDArray*>(args.values[i].v_handle)[0];
+        const NDArray& nd = static_cast<NDArray*>(args.values[i].v_handle)[0];
         // We cannot set the value until
         type_codes_[i] = kTVMDLTensorHandle;
         array_data_.push_back(nd);
         array_loc_.push_back(i);
         // check if there is read or mutate
         // by default assume we mutate the array.
-        if (const_loc_ptr < const_loc.size() &&
-            i == const_loc[const_loc_ptr]) {
+        if (const_loc_ptr < const_loc.size() && i == const_loc[const_loc_ptr]) {
           const_vars->push_back(nd.var());
           ++const_loc_ptr;
         } else {
           mutate_vars->push_back(nd.var());
         }
       } else {
-        CHECK_LT(args.type_codes[i], kTVMDataType)
-            << "Only allow POD type in mxnet async call";
+        CHECK_LT(args.type_codes[i], kTVMDataType) << "Only allow POD type in mxnet async call";
       }
     }
   }
@@ -100,8 +96,7 @@ class TVMFunctor {
   void Run(const RunContext& rctx) {
     // setup DLTensor
     for (size_t i = 0; i < array_loc_.size(); ++i) {
-      values_[array_loc_[i]].v_handle =
-          const_cast<DLTensor*>(&(array_data_[i].data().dltensor()));
+      values_[array_loc_[i]].v_handle = const_cast<DLTensor*>(&(array_data_[i].data().dltensor()));
     }
     // run the packed function
     TVMRetValue rv;
@@ -109,7 +104,7 @@ class TVMFunctor {
     if (ctx().dev_type == Context::kGPU) {
 #if MXNET_USE_CUDA
       // pass stream via last argument.
-      void* strm = static_cast<void*>(rctx.get_stream<gpu>()->stream_);
+      void* strm   = static_cast<void*>(rctx.get_stream<gpu>()->stream_);
       int dev_type = kDLGPU;
       fset_stream_(dev_type, rctx.ctx.dev_id, strm);
       func_.CallPacked(args, &rv);
@@ -137,14 +132,13 @@ class TVMFunctor {
   std::vector<int> array_loc_;
 };
 
-
 // Wrap a TVM function to a function that invokes MXNet's Engine
 // It does two things: call the engine properly
 // set up the NDArray to DLTensor during invocation.
 void WrapAsyncCall(TVMArgs wrap_args, TVMRetValue* wrap_rv) {
-  PackedFunc f = wrap_args[0];
-  PackedFunc fset_stream =  wrap_args[1];
-  int num_const = wrap_args[2];
+  PackedFunc f           = wrap_args[0];
+  PackedFunc fset_stream = wrap_args[1];
+  int num_const          = wrap_args[2];
 
   // sorted position of constant arguments
   std::vector<int> const_loc;
@@ -156,15 +150,13 @@ void WrapAsyncCall(TVMArgs wrap_args, TVMRetValue* wrap_rv) {
   // wrapped function
   // This is the function that called by the user.
   auto wrapped = [f, fset_stream, const_loc](TVMArgs args, TVMRetValue* rv) {
-    std::shared_ptr<TVMFunctor> func =
-      std::make_shared<TVMFunctor>(f, fset_stream);
+    std::shared_ptr<TVMFunctor> func = std::make_shared<TVMFunctor>(f, fset_stream);
     std::vector<Engine::VarHandle> const_vars, mutate_vars;
     func->Init(args, const_loc, &const_vars, &mutate_vars);
-    Engine *engine = Engine::Get();
+    Engine* engine = Engine::Get();
     engine->DeduplicateVarHandle(&const_vars, &mutate_vars);
-    engine->PushSync([func](RunContext ctx) {
-        func->Run(ctx);
-      }, func->ctx(), const_vars, mutate_vars);
+    engine->PushSync(
+        [func](RunContext ctx) { func->Run(ctx); }, func->ctx(), const_vars, mutate_vars);
   };
   *wrap_rv = PackedFunc(wrapped);
 }
@@ -175,8 +167,7 @@ void WrapAsyncCall(TVMArgs wrap_args, TVMRetValue* wrap_rv) {
 // the WrapAsyncCall function.
 extern "C" MXNET_DLL int MXTVMBridge(TVMFunctionHandle pregister) {
   using tvm::runtime::PackedFunc;
-  const PackedFunc& fregister =
-      *static_cast<PackedFunc*>(pregister);
+  const PackedFunc& fregister = *static_cast<PackedFunc*>(pregister);
   fregister("WrapAsyncCall", PackedFunc(mxnet::WrapAsyncCall));
   return 0;
 }
diff --git a/src/operator/all_finite-inl.h b/src/operator/all_finite-inl.h
index d646d5b19336..68ecf0648b0a 100644
--- a/src/operator/all_finite-inl.h
+++ b/src/operator/all_finite-inl.h
@@ -44,12 +44,10 @@
 namespace mxnet {
 namespace op {
 
-struct AllFiniteParam: public dmlc::Parameter<AllFiniteParam> {
+struct AllFiniteParam : public dmlc::Parameter<AllFiniteParam> {
   bool init_output;
   DMLC_DECLARE_PARAMETER(AllFiniteParam) {
-    DMLC_DECLARE_FIELD(init_output)
-    .set_default(true)
-    .describe("Initialize output to 1.");
+    DMLC_DECLARE_FIELD(init_output).set_default(true).describe("Initialize output to 1.");
   }
 };
 
@@ -57,32 +55,28 @@ struct MultiAllFiniteParam : public dmlc::Parameter<MultiAllFiniteParam> {
   int num_arrays;
   bool init_output;
   DMLC_DECLARE_PARAMETER(MultiAllFiniteParam) {
-    DMLC_DECLARE_FIELD(num_arrays)
-    .set_default(1)
-    .describe("Number of arrays.");
-    DMLC_DECLARE_FIELD(init_output)
-    .set_default(true)
-    .describe("Initialize output to 1.");
+    DMLC_DECLARE_FIELD(num_arrays).set_default(1).describe("Number of arrays.");
+    DMLC_DECLARE_FIELD(init_output).set_default(true).describe("Initialize output to 1.");
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct MultiAllFiniteKernelParam {
   static const int N = 200;
   int count;
   size_t max_size;
   size_t sizes[N];
-  DType *arrays[N];
+  DType* arrays[N];
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 MultiAllFiniteKernelParam<DType> FillMultiAllFiniteParam(const MultiAllFiniteParam& op_param,
-                                                         const OpContext &ctx,
-                                                         const std::vector<TBlob> &inputs) {
+                                                         const OpContext& ctx,
+                                                         const std::vector<TBlob>& inputs) {
   MultiAllFiniteKernelParam<DType> param;
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  param.count = op_param.num_arrays;
+  param.count    = op_param.num_arrays;
   param.max_size = 0;
   for (int i = 0; i < param.count; ++i) {
     param.sizes[i] = inputs[i].shape_.Size();
diff --git a/src/operator/all_finite.cc b/src/operator/all_finite.cc
index 8ef36711e888..3bb4336f74e7 100644
--- a/src/operator/all_finite.cc
+++ b/src/operator/all_finite.cc
@@ -19,7 +19,7 @@
 
 /*!
  *  Copyright (c) 2019 by Contributors
- * \file all_finite.cc 
+ * \file all_finite.cc
  * \brief operator for checking if a group of array is all finite
  * \author Clement Fuji Tsang
  */
@@ -29,11 +29,11 @@
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 struct AllFiniteCPUKernel {
   MSHADOW_XINLINE static void Map(int i, const DType* in, float* out) {
     bool is_finite = true;
-    is_finite = std::isfinite(static_cast<float>(in[i]))  ? is_finite : false;
+    is_finite      = std::isfinite(static_cast<float>(in[i])) ? is_finite : false;
     if (!is_finite) {
       out[0] = 0.;
     }
@@ -41,28 +41,27 @@ struct AllFiniteCPUKernel {
 };
 
 inline void AllFiniteCPU(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<cpu>* s = ctx.get_stream<cpu>();
+  Stream<cpu>* s                 = ctx.get_stream<cpu>();
   const AllFiniteParam& op_param = nnvm::get<AllFiniteParam>(attrs.parsed);
-  Tensor<cpu, 2, float> out = outputs[0].FlatTo2D<cpu, float>(s);
+  Tensor<cpu, 2, float> out      = outputs[0].FlatTo2D<cpu, float>(s);
   if (op_param.init_output) {
     out = 1.;
   }
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<cpu, 2, DType> in = inputs[0].FlatTo2D<cpu, DType>(s);
-    const int n = in.shape_.Size();
+    const int n              = in.shape_.Size();
     Kernel<AllFiniteCPUKernel<DType>, cpu>::Launch(s, n, in.dptr_, out.dptr_);
   });
 }
 
-template<typename DType>
+template <typename DType>
 struct MultiAllFiniteCPUKernel {
-  MSHADOW_XINLINE static void Map(int i, const MultiAllFiniteKernelParam<DType> param,
-                                  float* out) {
+  MSHADOW_XINLINE static void Map(int i, const MultiAllFiniteKernelParam<DType> param, float* out) {
     bool is_finite = true;
     for (int index = 0; index < param.count; ++index) {
       if ((size_t)i < param.sizes[index]) {
@@ -76,95 +75,95 @@ struct MultiAllFiniteCPUKernel {
 };
 
 inline void MultiAllFiniteCPU(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<cpu>* s = ctx.get_stream<cpu>();
+  Stream<cpu>* s                      = ctx.get_stream<cpu>();
   const MultiAllFiniteParam& op_param = nnvm::get<MultiAllFiniteParam>(attrs.parsed);
-  Tensor<cpu, 2, float> out = outputs[0].FlatTo2D<cpu, float>(s);
+  Tensor<cpu, 2, float> out           = outputs[0].FlatTo2D<cpu, float>(s);
   if (op_param.init_output)
     out = 1.;
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MultiAllFiniteKernelParam<DType> param =
-      FillMultiAllFiniteParam<cpu, DType>(op_param, ctx, inputs);
-    Kernel<MultiAllFiniteCPUKernel<DType>, cpu>::Launch(s, param.max_size,
-                                                       param, out.dptr_);
+        FillMultiAllFiniteParam<cpu, DType>(op_param, ctx, inputs);
+    Kernel<MultiAllFiniteCPUKernel<DType>, cpu>::Launch(s, param.max_size, param, out.dptr_);
   });
 }
 
 DMLC_REGISTER_PARAMETER(AllFiniteParam);
 
 NNVM_REGISTER_OP(all_finite)
-.add_alias("_npi_all_finite")
-.describe(R"code(Check if all the float numbers in the array are finite (used for AMP)
+    .add_alias("_npi_all_finite")
+    .describe(R"code(Check if all the float numbers in the array are finite (used for AMP)
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AllFiniteParam>)
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<TShape> *in_attrs,
-     std::vector<TShape> *out_attrs){
-    (*out_attrs)[0] = TShape({1});
-    return true;
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int> *in_attrs,
-     std::vector<int> *out_attrs){
-    (*out_attrs)[0] = mshadow::kFloat32;
-    return true;
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    std::vector<std::string> ret;
-    ret.emplace_back("data");
-    return ret;
-  })
-.add_argument("data", "NDArray", "Array")
-.add_arguments(AllFiniteParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", AllFiniteCPU);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AllFiniteParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     std::vector<TShape>* in_attrs,
+                                     std::vector<TShape>* out_attrs) {
+                                    (*out_attrs)[0] = TShape({1});
+                                    return true;
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       std::vector<std::string> ret;
+                                       ret.emplace_back("data");
+                                       return ret;
+                                     })
+    .add_argument("data", "NDArray", "Array")
+    .add_arguments(AllFiniteParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", AllFiniteCPU);
 
 DMLC_REGISTER_PARAMETER(MultiAllFiniteParam);
 
 NNVM_REGISTER_OP(multi_all_finite)
-.add_alias("_npi_multi_all_finite")
-.describe(R"code(Check if all the float numbers in all the arrays are finite (used for AMP)
+    .add_alias("_npi_multi_all_finite")
+    .describe(R"code(Check if all the float numbers in all the arrays are finite (used for AMP)
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiAllFiniteParam& param = dmlc::get<MultiAllFiniteParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_arrays);
-  })
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<MultiAllFiniteParam>)
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<TShape> *in_attrs,
-     std::vector<TShape> *out_attrs) {
-    (*out_attrs)[0] = TShape({1});
-    return true;
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int> *in_attrs,
-     std::vector<int> *out_attrs) {
-    (*out_attrs)[0] = mshadow::kFloat32;
-    return true;
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<MultiAllFiniteParam>(attrs.parsed).num_arrays;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("array_") + std::to_string(i));
-    }
-    return ret;
-  })
-.add_argument("data", "NDArray-or-Symbol[]", "Arrays")
-.add_arguments(MultiAllFiniteParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", MultiAllFiniteCPU);
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiAllFiniteParam& param = dmlc::get<MultiAllFiniteParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_arrays);
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<MultiAllFiniteParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     std::vector<TShape>* in_attrs,
+                                     std::vector<TShape>* out_attrs) {
+                                    (*out_attrs)[0] = TShape({1});
+                                    return true;
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<MultiAllFiniteParam>(attrs.parsed).num_arrays;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("array_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .add_argument("data", "NDArray-or-Symbol[]", "Arrays")
+    .add_arguments(MultiAllFiniteParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", MultiAllFiniteCPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/all_finite.cu b/src/operator/all_finite.cu
index 69ba35f0844a..ad48c93b1b26 100644
--- a/src/operator/all_finite.cu
+++ b/src/operator/all_finite.cu
@@ -42,21 +42,22 @@ __global__ void AllFiniteGPUKernel(const int size, const DType* in, float* out)
 }
 
 inline void AllFiniteGPU(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<gpu>* s = ctx.get_stream<gpu>();
+  Stream<gpu>* s                 = ctx.get_stream<gpu>();
   const AllFiniteParam& op_param = nnvm::get<AllFiniteParam>(attrs.parsed);
-  Tensor<gpu, 2, float> out = outputs[0].FlatTo2D<gpu, float>(s);
+  Tensor<gpu, 2, float> out      = outputs[0].FlatTo2D<gpu, float>(s);
   if (op_param.init_output)
     out = 1.;
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<gpu, 2, DType> in = inputs[0].FlatTo2D<gpu, DType>(s);
-    const int n = in.shape_.Size();
+    const int n              = in.shape_.Size();
     AllFiniteGPUKernel<DType><<<cuda_get_num_blocks(n),
-                                mshadow::cuda::kBaseThreadNum, 0,
+                                mshadow::cuda::kBaseThreadNum,
+                                0,
                                 mshadow::Stream<gpu>::GetStream(s)>>>(n, in.dptr_, out.dptr_);
     MSHADOW_CUDA_POST_KERNEL_CHECK(AllFiniteGPUKernel<DType>);
   });
@@ -77,31 +78,30 @@ __global__ void MultiAllFiniteGPUKernel(const MultiAllFiniteKernelParam<DType> p
 }
 
 inline void MultiAllFiniteGPU(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<gpu>* s = ctx.get_stream<gpu>();
+  Stream<gpu>* s                      = ctx.get_stream<gpu>();
   const MultiAllFiniteParam& op_param = nnvm::get<MultiAllFiniteParam>(attrs.parsed);
-  Tensor<gpu, 2, float> out = outputs[0].FlatTo2D<gpu, float>(s);
+  Tensor<gpu, 2, float> out           = outputs[0].FlatTo2D<gpu, float>(s);
   if (op_param.init_output)
     out = 1.;
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MultiAllFiniteKernelParam<DType> param =
-      FillMultiAllFiniteParam<gpu, DType>(op_param, ctx, inputs);
+        FillMultiAllFiniteParam<gpu, DType>(op_param, ctx, inputs);
     MultiAllFiniteGPUKernel<DType><<<cuda_get_num_blocks(param.max_size),
-                                     mshadow::cuda::kBaseThreadNum, 1,
+                                     mshadow::cuda::kBaseThreadNum,
+                                     1,
                                      mshadow::Stream<gpu>::GetStream(s)>>>(param, out.dptr_);
     MSHADOW_CUDA_POST_KERNEL_CHECK(MultiAllFiniteGPUKernel<DType>);
   });
 }
 
-NNVM_REGISTER_OP(all_finite)
-.set_attr<FCompute>("FCompute<gpu>", AllFiniteGPU);
+NNVM_REGISTER_OP(all_finite).set_attr<FCompute>("FCompute<gpu>", AllFiniteGPU);
 
-NNVM_REGISTER_OP(multi_all_finite)
-.set_attr<FCompute>("FCompute<gpu>", MultiAllFiniteGPU);
+NNVM_REGISTER_OP(multi_all_finite).set_attr<FCompute>("FCompute<gpu>", MultiAllFiniteGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/amp_graph_pass.cc b/src/operator/amp_graph_pass.cc
index 5b397e746c03..66d1546915fd 100644
--- a/src/operator/amp_graph_pass.cc
+++ b/src/operator/amp_graph_pass.cc
@@ -30,10 +30,9 @@
 namespace mxnet {
 namespace op {
 
+using nnvm::Graph;
 using nnvm::Node;
 using nnvm::ObjectPtr;
-using nnvm::Graph;
-
 
 /*
  * \brief Remove amp_cast and amp_multicast and replug the fp32 weights
@@ -52,10 +51,7 @@ Graph RemoveAmpCast(Graph&& g) {
   return std::move(g);
 }
 
-NNVM_REGISTER_PASS(RemoveAmpCast)
-.describe("")
-.set_body(RemoveAmpCast)
-.set_change_graph(true);
+NNVM_REGISTER_PASS(RemoveAmpCast).describe("").set_body(RemoveAmpCast).set_change_graph(true);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/bilinear_sampler-inl.h b/src/operator/bilinear_sampler-inl.h
index cec27faa1968..585bc8ca66ec 100644
--- a/src/operator/bilinear_sampler-inl.h
+++ b/src/operator/bilinear_sampler-inl.h
@@ -22,7 +22,7 @@
  * \file bilinear_Sampler-inl.h
  * \brief
  * \author Xu Dong
-*/
+ */
 #ifndef MXNET_OPERATOR_BILINEAR_SAMPLER_INL_H_
 #define MXNET_OPERATOR_BILINEAR_SAMPLER_INL_H_
 
@@ -39,62 +39,63 @@ namespace mxnet {
 namespace op {
 
 namespace bs {
-enum BilinearSamplerOpInputs {kData, kGrid};
-enum BilinearSamplerOpOutputs {kOut, kTmp};
-}
+enum BilinearSamplerOpInputs { kData, kGrid };
+enum BilinearSamplerOpOutputs { kOut, kTmp };
+}  // namespace bs
 
 struct BilinearSamplerParam : public dmlc::Parameter<BilinearSamplerParam> {
   dmlc::optional<bool> cudnn_off;
   DMLC_DECLARE_PARAMETER(BilinearSamplerParam) {
-    DMLC_DECLARE_FIELD(cudnn_off).set_default(dmlc::optional<bool>())
+    DMLC_DECLARE_FIELD(cudnn_off)
+        .set_default(dmlc::optional<bool>())
         .describe("whether to turn cudnn off");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class BilinearSamplerOp : public Operator {
  public:
   explicit BilinearSamplerOp(BilinearSamplerParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(req[bs::kOut], kWriteTo);
     CHECK_EQ(in_data.size(), 2U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     Tensor<xpu, 4, DType> data = in_data[bs::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> grid = in_data[bs::kGrid].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> out = out_data[bs::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> out  = out_data[bs::kOut].get<xpu, 4, DType>(s);
 
     BilinearSamplerForward(out, data, grid);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_NE(req[bs::kData], kWriteInplace);
     CHECK_NE(req[bs::kGrid], kWriteInplace);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    Tensor<xpu, 4, DType> data = in_data[bs::kData].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> grid = in_data[bs::kGrid].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> data  = in_data[bs::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> grid  = in_data[bs::kGrid].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> gdata = in_grad[bs::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> ggrid = in_grad[bs::kGrid].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> grad = out_grad[bs::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> grad  = out_grad[bs::kOut].get<xpu, 4, DType>(s);
     if (req[bs::kData] == kNullOp && req[bs::kGrid] == kNullOp) {
       return;
     } else {
@@ -112,7 +113,7 @@ class BilinearSamplerOp : public Operator {
   BilinearSamplerParam param_;
 };  // class BilinearSamplerOp
 
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(BilinearSamplerParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -142,27 +143,25 @@ class BilinearSamplerProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, grid]";
-    const mxnet::TShape &dshape = (*in_shape)[bs::kData];
-    const mxnet::TShape &lshape = (*in_shape)[bs::kGrid];
-    if (!shape_is_known(dshape)) return false;
-    CHECK_EQ(dshape.ndim(), 4U) \
-        << "input data should be 4D in batch-num_filter-y-x";
-    if (!shape_is_known(lshape)) return false;
-    CHECK_EQ(lshape.ndim(), 4U) \
-      << "Sampler grid should be 4D in batch-2-y-x";
+    const mxnet::TShape& dshape = (*in_shape)[bs::kData];
+    const mxnet::TShape& lshape = (*in_shape)[bs::kGrid];
+    if (!shape_is_known(dshape))
+      return false;
+    CHECK_EQ(dshape.ndim(), 4U) << "input data should be 4D in batch-num_filter-y-x";
+    if (!shape_is_known(lshape))
+      return false;
+    CHECK_EQ(lshape.ndim(), 4U) << "Sampler grid should be 4D in batch-2-y-x";
     CHECK_EQ(dshape[0], lshape[0]);
     CHECK_EQ(lshape[1], 2U) << "incorrect grid shape[1], should be 2";
     // target height
-    CHECK_GT(lshape[2], 0U) \
-            << "incorrect grid_shape: " << lshape[2];
+    CHECK_GT(lshape[2], 0U) << "incorrect grid_shape: " << lshape[2];
     // target width
-    CHECK_GT(lshape[3], 0U) \
-        << "incorrect grid_shape: " << lshape[3];
+    CHECK_GT(lshape[3], 0U) << "incorrect grid_shape: " << lshape[3];
     out_shape->clear();
     // output_shape : (data.shape[0], data.shape[1], grid.shape[2], grid.shape[3])
     out_shape->push_back(dshape);
@@ -172,37 +171,38 @@ class BilinearSamplerProp : public OperatorProperty {
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                   std::vector<int> *out_type,
-                   std::vector<int> *aux_type) const override {
-      int dtype = -1;
-      for (int type : *in_type) {
-        if (dtype == -1) {
-          dtype = type;
-        } else {
-          CHECK(type == dtype ||
-              type == -1) <<
-                "Non-uniform data type in BilinearSampler";
-        }
-      }
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
+    int dtype = -1;
+    for (int type : *in_type) {
       if (dtype == -1) {
-        LOG(FATAL) << "Not enough information to infer type in BilinearSampler.";
-        return false;
+        dtype = type;
+      } else {
+        CHECK(type == dtype || type == -1) << "Non-uniform data type in BilinearSampler";
       }
-      size_t nin = this->ListArguments().size();
-      in_type->clear();
-      for (size_t i = 0; i < nin; ++i) in_type->push_back(dtype);
-      size_t naux = this->ListAuxiliaryStates().size();
-      aux_type->clear();
-      for (size_t i = 0; i < naux; ++i) aux_type->push_back(dtype);
-      size_t nout = this->ListOutputs().size();
-      out_type->clear();
-      for (size_t i = 0; i < nout; ++i) out_type->push_back(dtype);
-      return true;
     }
+    if (dtype == -1) {
+      LOG(FATAL) << "Not enough information to infer type in BilinearSampler.";
+      return false;
+    }
+    size_t nin = this->ListArguments().size();
+    in_type->clear();
+    for (size_t i = 0; i < nin; ++i)
+      in_type->push_back(dtype);
+    size_t naux = this->ListAuxiliaryStates().size();
+    aux_type->clear();
+    for (size_t i = 0; i < naux; ++i)
+      aux_type->push_back(dtype);
+    size_t nout = this->ListOutputs().size();
+    out_type->clear();
+    for (size_t i = 0; i < nout; ++i)
+      out_type->push_back(dtype);
+    return true;
+  }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new BilinearSamplerProp();
+    auto ptr    = new BilinearSamplerProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -211,14 +211,10 @@ class BilinearSamplerProp : public OperatorProperty {
     return "BilinearSampler";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
-    return {out_grad[bs::kOut],
-            in_data[bs::kData],
-            out_data[bs::kTmp],
-            in_data[bs::kGrid]};
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
+    return {out_grad[bs::kOut], in_data[bs::kData], out_data[bs::kTmp], in_data[bs::kGrid]};
   }
 
   Operator* CreateOperator(Context ctx) const override {
@@ -226,12 +222,13 @@ class BilinearSamplerProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   BilinearSamplerParam param_;
-};  // class BilinearSamplerProp
+};      // class BilinearSamplerProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/bilinear_sampler.cc b/src/operator/bilinear_sampler.cc
index d8ce15486d8c..7148db5bc35c 100644
--- a/src/operator/bilinear_sampler.cc
+++ b/src/operator/bilinear_sampler.cc
@@ -22,173 +22,175 @@
  * \file bilinear_sampler.cc
  * \brief
  * \author Xu Dong
-*/
+ */
 
 #include <cmath>
 
 #include "./bilinear_sampler-inl.h"
 
 namespace mshadow {
-template<typename DType>
+template <typename DType>
 bool between(DType value, int lowerBound, int upperBound) {
   return (value >= lowerBound && value <= upperBound);
 }
-template<typename DType>
-inline void BilinearSamplerForward(const Tensor<cpu, 4, DType> &output,
-                                    const Tensor<cpu, 4, DType> &input,
-                                    const Tensor<cpu, 4, DType> &grid_src) {
-  DType *out = output.dptr_;
-  const DType *data = input.dptr_;
-  const DType *grid = grid_src.dptr_;
+template <typename DType>
+inline void BilinearSamplerForward(const Tensor<cpu, 4, DType>& output,
+                                   const Tensor<cpu, 4, DType>& input,
+                                   const Tensor<cpu, 4, DType>& grid_src) {
+  DType* out        = output.dptr_;
+  const DType* data = input.dptr_;
+  const DType* grid = grid_src.dptr_;
   int o_n = output.size(0), o_c = output.size(1), o_h = output.size(2), o_w = output.size(3);
   int i_c = input.size(1), i_h = input.size(2), i_w = input.size(3);
   for (index_t n = 0; n < static_cast<index_t>(o_n); ++n) {
     for (index_t c = 0; c < static_cast<index_t>(o_c); ++c) {
       for (index_t h = 0; h < static_cast<index_t>(o_h); ++h) {
         for (index_t w = 0; w < static_cast<index_t>(o_w); ++w) {
-          index_t out_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
+          index_t out_index  = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
           index_t grid_index = n * o_h * o_w * 2 + h * o_w + w;
-          DType y_real = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-          DType x_real = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
+          DType y_real       = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+          DType x_real       = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
           // NOLINTNEXTLINE
           int top_left_y = static_cast<int>(std::floor(y_real));
           // NOLINTNEXTLINE
-          int top_left_x = static_cast<int>(std::floor(x_real));
-          DType top_left_y_w = 1.0 - (y_real - top_left_y);
-          DType top_left_x_w = 1.0 - (x_real - top_left_x);
-          int data_index = n * i_c * i_h * i_w + c * i_h * i_w +
-            top_left_y * i_w + top_left_x;
-          DType top_left_v = 0;
-          DType top_right_v = 0;
+          int top_left_x      = static_cast<int>(std::floor(x_real));
+          DType top_left_y_w  = 1.0 - (y_real - top_left_y);
+          DType top_left_x_w  = 1.0 - (x_real - top_left_x);
+          int data_index      = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+          DType top_left_v    = 0;
+          DType top_right_v   = 0;
           DType bottom_left_v = 0;
           DType bottom_right_v = 0;
-          if (between(top_left_x, 0, i_w-1) && between(top_left_y, 0, i_h-1))
+          if (between(top_left_x, 0, i_w - 1) && between(top_left_y, 0, i_h - 1))
             top_left_v = *(data + data_index);
-          if (between(top_left_x + 1, 0, i_w-1) && between(top_left_y, 0, i_h-1))
+          if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y, 0, i_h - 1))
             top_right_v = *(data + data_index + 1);
-          if (between(top_left_x, 0, i_w-1) && between(top_left_y + 1, 0, i_h-1))
+          if (between(top_left_x, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1))
             bottom_left_v = *(data + data_index + i_w);
-          if (between(top_left_x+1, 0, i_w-1) && between(top_left_y + 1, 0, i_h-1))
+          if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1))
             bottom_right_v = *(data + data_index + i_w + 1);
-          *(out+out_index) = top_left_v * top_left_y_w * top_left_x_w +
-                              top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
-                              bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
-                              bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
+          *(out + out_index) = top_left_v * top_left_y_w * top_left_x_w +
+                               top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
+                               bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
+                               bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
         }
       }
     }
   }
 }
 
-template<typename DType>
-inline void BilinearSamplerBackward(const Tensor<cpu, 4, DType> &gdata,
-                                    const Tensor<cpu, 4, DType> &ggrid,
-                                    const Tensor<cpu, 4, DType> &output_grad,
-                                    const Tensor<cpu, 4, DType> &input_data,
-                                    const Tensor<cpu, 4, DType> &grid,
+template <typename DType>
+inline void BilinearSamplerBackward(const Tensor<cpu, 4, DType>& gdata,
+                                    const Tensor<cpu, 4, DType>& ggrid,
+                                    const Tensor<cpu, 4, DType>& output_grad,
+                                    const Tensor<cpu, 4, DType>& input_data,
+                                    const Tensor<cpu, 4, DType>& grid,
                                     const mxnet::OpReqType data_req,
                                     const mxnet::OpReqType grid_req) {
-  DType *g_input = gdata.dptr_;
-  DType *grad_grid = ggrid.dptr_;
-  const DType *grid_src = grid.dptr_;
-  const DType *grad = output_grad.dptr_;
-  const DType *data = input_data.dptr_;
-  int o_n = output_grad.size(0), o_c = output_grad.size(1),
-      o_h = output_grad.size(2), o_w = output_grad.size(3);
+  DType* g_input        = gdata.dptr_;
+  DType* grad_grid      = ggrid.dptr_;
+  const DType* grid_src = grid.dptr_;
+  const DType* grad     = output_grad.dptr_;
+  const DType* data     = input_data.dptr_;
+  int o_n = output_grad.size(0), o_c = output_grad.size(1), o_h = output_grad.size(2),
+      o_w = output_grad.size(3);
   int i_c = input_data.size(1), i_h = input_data.size(2), i_w = input_data.size(3);
   for (index_t n = 0; n < static_cast<index_t>(o_n); ++n) {
-     for (index_t h = 0; h < static_cast<index_t>(o_h); ++h) {
-        for (index_t w = 0; w < static_cast<index_t>(o_w); ++w) {
-          DType top_left_y_gw = 0.0;
-          DType top_left_x_gw = 0.0;
-          index_t grid_src_index = n * o_h * o_w * 2 + h * o_w + w;
-          DType y_real = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-          DType x_real = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
-          // NOLINTNEXTLINE
-          int top_left_y = static_cast<int>(std::floor(y_real));
-          // NOLINTNEXTLINE
-          int top_left_x = static_cast<int>(std::floor(x_real));
-          DType top_left_y_w = 1.0 - (y_real - top_left_y);
-          DType top_left_x_w = 1.0 - (x_real - top_left_x);
-          for (index_t c = 0; c < static_cast<index_t>(o_c); ++c) {
-            index_t grad_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
-            int data_index = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
-            // calc 4 vertex value in input data
-            DType top_left_v = 0;
-            DType top_right_v = 0;
-            DType bottom_left_v = 0;
-            DType bottom_right_v = 0;
-            // calc input grad
-            if (between(top_left_x, 0, i_w-1) && between(top_left_y, 0, i_h-1)) {
-              if (data_req != mxnet::kNullOp) {
-                *(g_input + data_index) += *(grad + grad_index) * top_left_y_w * top_left_x_w;
-              }
-              top_left_v = *(data + data_index);
+    for (index_t h = 0; h < static_cast<index_t>(o_h); ++h) {
+      for (index_t w = 0; w < static_cast<index_t>(o_w); ++w) {
+        DType top_left_y_gw    = 0.0;
+        DType top_left_x_gw    = 0.0;
+        index_t grid_src_index = n * o_h * o_w * 2 + h * o_w + w;
+        DType y_real           = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+        DType x_real           = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
+        // NOLINTNEXTLINE
+        int top_left_y = static_cast<int>(std::floor(y_real));
+        // NOLINTNEXTLINE
+        int top_left_x     = static_cast<int>(std::floor(x_real));
+        DType top_left_y_w = 1.0 - (y_real - top_left_y);
+        DType top_left_x_w = 1.0 - (x_real - top_left_x);
+        for (index_t c = 0; c < static_cast<index_t>(o_c); ++c) {
+          index_t grad_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
+          int data_index     = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+          // calc 4 vertex value in input data
+          DType top_left_v     = 0;
+          DType top_right_v    = 0;
+          DType bottom_left_v  = 0;
+          DType bottom_right_v = 0;
+          // calc input grad
+          if (between(top_left_x, 0, i_w - 1) && between(top_left_y, 0, i_h - 1)) {
+            if (data_req != mxnet::kNullOp) {
+              *(g_input + data_index) += *(grad + grad_index) * top_left_y_w * top_left_x_w;
             }
-            if (between(top_left_x+1, 0, i_w-1) && between(top_left_y, 0, i_h-1)) {
-              if (data_req != mxnet::kNullOp) {
-                *(g_input + data_index + 1) +=
+            top_left_v = *(data + data_index);
+          }
+          if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y, 0, i_h - 1)) {
+            if (data_req != mxnet::kNullOp) {
+              *(g_input + data_index + 1) +=
                   *(grad + grad_index) * top_left_y_w * (1.0 - top_left_x_w);
-              }
-              top_right_v = *(data + data_index + 1);
             }
-            if (between(top_left_x, 0, i_w-1) && between(top_left_y+1, 0, i_h-1)) {
-              if (data_req != mxnet::kNullOp) {
-                *(g_input + data_index+ i_w) +=
+            top_right_v = *(data + data_index + 1);
+          }
+          if (between(top_left_x, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1)) {
+            if (data_req != mxnet::kNullOp) {
+              *(g_input + data_index + i_w) +=
                   *(grad + grad_index) * (1.0 - top_left_y_w) * top_left_x_w;
-              }
-              bottom_left_v = *(data + data_index + i_w);
             }
-            if (between(top_left_x+1, 0, i_w-1) && between(top_left_y+1, 0, i_h-1)) {
-              if (data_req != mxnet::kNullOp) {
-                *(g_input + data_index+ i_w + 1) +=
+            bottom_left_v = *(data + data_index + i_w);
+          }
+          if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1)) {
+            if (data_req != mxnet::kNullOp) {
+              *(g_input + data_index + i_w + 1) +=
                   *(grad + grad_index) * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
-              }
-              bottom_right_v = *(data + data_index + i_w + 1);
             }
-            // calc weight grad of top_left_w, then multiple -1 is the grad of grid_src
-            top_left_y_gw -= *(grad + grad_index) * (top_right_v - bottom_right_v +
-                              (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                              * top_left_x_w);
-            top_left_x_gw -= *(grad + grad_index) * (bottom_left_v - bottom_right_v +
-                              (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                              * top_left_y_w);
-          }
-          if (grid_req != mxnet::kNullOp) {
-            // calc grad of grid
-            *(grad_grid + grid_src_index + o_h * o_w) += top_left_y_gw * (i_h - 1) / 2;
-            *(grad_grid + grid_src_index) += top_left_x_gw * (i_w - 1) / 2;
+            bottom_right_v = *(data + data_index + i_w + 1);
           }
+          // calc weight grad of top_left_w, then multiple -1 is the grad of grid_src
+          top_left_y_gw -=
+              *(grad + grad_index) *
+              (top_right_v - bottom_right_v +
+               (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_x_w);
+          top_left_x_gw -=
+              *(grad + grad_index) *
+              (bottom_left_v - bottom_right_v +
+               (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_y_w);
+        }
+        if (grid_req != mxnet::kNullOp) {
+          // calc grad of grid
+          *(grad_grid + grid_src_index + o_h * o_w) += top_left_y_gw * (i_h - 1) / 2;
+          *(grad_grid + grid_src_index) += top_left_x_gw * (i_w - 1) / 2;
         }
       }
     }
   }
+}
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<cpu>(BilinearSamplerParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new BilinearSamplerOp<cpu, DType>(param);
-  })
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new BilinearSamplerOp<cpu, DType>(param); })
   return op;
 }
 
-Operator *BilinearSamplerProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                     std::vector<int> *in_type) const {
+Operator* BilinearSamplerProp::CreateOperatorEx(Context ctx,
+                                                mxnet::ShapeVector* in_shape,
+                                                std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(BilinearSamplerParam);
 
 MXNET_REGISTER_OP_PROPERTY(BilinearSampler, BilinearSamplerProp)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the BilinearsamplerOp.")
-.add_argument("grid", "NDArray-or-Symbol", "Input grid to the BilinearsamplerOp."
-                                "grid has two channels: x_src, y_src")
-.add_arguments(BilinearSamplerParam::__FIELDS__())
-.describe(R"code(Applies bilinear sampling to input feature map.
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the BilinearsamplerOp.")
+    .add_argument("grid",
+                  "NDArray-or-Symbol",
+                  "Input grid to the BilinearsamplerOp."
+                  "grid has two channels: x_src, y_src")
+    .add_arguments(BilinearSamplerParam::__FIELDS__())
+    .describe(R"code(Applies bilinear sampling to input feature map.
 
 Bilinear Sampling is the key of  [NIPS2015] \"Spatial Transformer Networks\". The usage of the operator is very similar to remap function in OpenCV,
 except that the operator has the backward pass.
diff --git a/src/operator/bilinear_sampler.cu b/src/operator/bilinear_sampler.cu
index dae14a645fd8..5b66a86f22ef 100644
--- a/src/operator/bilinear_sampler.cu
+++ b/src/operator/bilinear_sampler.cu
@@ -22,7 +22,7 @@
  * \file bilinear_sampler.cu
  * \brief
  * \author Xu Dong
-*/
+ */
 
 #include "./bilinear_sampler-inl.h"
 #include <algorithm>
@@ -33,120 +33,130 @@
 
 namespace mshadow {
 namespace cuda {
-template<typename DType>
+template <typename DType>
 __device__ bool between(DType value, int lowerBound, int upperBound) {
   return (value >= lowerBound && value <= upperBound);
 }
-template<typename DType>
-__global__ void BilinearSamplerForwardKernel(const int i_c, const int i_h,
-                                              const int i_w, const DType* data,
-                                              const DType* grid, const int o_n,
-                                              const int o_c, const int o_h,
-                                              const int o_w, DType* out) {
+template <typename DType>
+__global__ void BilinearSamplerForwardKernel(const int i_c,
+                                             const int i_h,
+                                             const int i_w,
+                                             const DType* data,
+                                             const DType* grid,
+                                             const int o_n,
+                                             const int o_c,
+                                             const int o_h,
+                                             const int o_w,
+                                             DType* out) {
   for (int index = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
        index < o_n * o_c * o_h * o_w;
        index += blockDim.x * gridDim.x * gridDim.y) {
     // (n, c, h, w) is the element in out
-    int w = index % o_w;
-    int h = (index / o_w) % o_h;
-    int c = (index / o_w / o_h) % o_c;
-    int n = index / o_w / o_h / o_c;
-    int out_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
-    int grid_index = n * o_h * o_w * 2 + h * o_w + w;
-    DType y_real = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-    DType x_real = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
-    int top_left_y = static_cast<int>(floor(y_real));
-    int top_left_x = static_cast<int>(floor(x_real));
-    DType top_left_y_w = 1.0 - (y_real - top_left_y);
-    DType top_left_x_w = 1.0 - (x_real - top_left_x);
-    int data_index = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
-    DType top_left_v = 0;
-    DType top_right_v = 0;
-    DType bottom_left_v = 0;
+    int w                = index % o_w;
+    int h                = (index / o_w) % o_h;
+    int c                = (index / o_w / o_h) % o_c;
+    int n                = index / o_w / o_h / o_c;
+    int out_index        = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
+    int grid_index       = n * o_h * o_w * 2 + h * o_w + w;
+    DType y_real         = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+    DType x_real         = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
+    int top_left_y       = static_cast<int>(floor(y_real));
+    int top_left_x       = static_cast<int>(floor(x_real));
+    DType top_left_y_w   = 1.0 - (y_real - top_left_y);
+    DType top_left_x_w   = 1.0 - (x_real - top_left_x);
+    int data_index       = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+    DType top_left_v     = 0;
+    DType top_right_v    = 0;
+    DType bottom_left_v  = 0;
     DType bottom_right_v = 0;
-    if (between(top_left_x, 0, i_w-1) && between(top_left_y, 0, i_h-1))
+    if (between(top_left_x, 0, i_w - 1) && between(top_left_y, 0, i_h - 1))
       top_left_v = *(data + data_index);
-    if (between(top_left_x + 1, 0, i_w-1) && between(top_left_y, 0, i_h-1))
+    if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y, 0, i_h - 1))
       top_right_v = *(data + data_index + 1);
-    if (between(top_left_x, 0, i_w-1) && between(top_left_y + 1, 0, i_h-1))
+    if (between(top_left_x, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1))
       bottom_left_v = *(data + data_index + i_w);
-    if (between(top_left_x+1, 0, i_w-1) && between(top_left_y + 1, 0, i_h-1))
+    if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1))
       bottom_right_v = *(data + data_index + i_w + 1);
-    *(out+out_index) = top_left_v * top_left_y_w * top_left_x_w +
-                        top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
-                        bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
-                        bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
+    *(out + out_index) = top_left_v * top_left_y_w * top_left_x_w +
+                         top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
+                         bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
+                         bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
   }
 }
 
-template<typename DType, int Req1, int Req2>
-__global__ void BilinearSamplerBackwardKernel(const int i_c, const int i_h,
-                                              const int i_w, const DType* grad,
-                                              const DType* data, const int o_n,
-                                              const int o_c, const int o_h,
-                                              const int o_w, DType* g_input,
+template <typename DType, int Req1, int Req2>
+__global__ void BilinearSamplerBackwardKernel(const int i_c,
+                                              const int i_h,
+                                              const int i_w,
+                                              const DType* grad,
+                                              const DType* data,
+                                              const int o_n,
+                                              const int o_c,
+                                              const int o_h,
+                                              const int o_w,
+                                              DType* g_input,
                                               const DType* grid_src,
                                               DType* grad_grid) {
   for (int index = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
        index < o_n * o_h * o_w;
        index += blockDim.x * gridDim.x * gridDim.y) {
     // (n, c, h, w) is the element in grad
-    int w = index % o_w;
-    int h = (index / o_w) % o_h;
-    int n = index / o_w / o_h;
+    int w               = index % o_w;
+    int h               = (index / o_w) % o_h;
+    int n               = index / o_w / o_h;
     DType top_left_y_gw = 0.0;
     DType top_left_x_gw = 0.0;
-    int grid_src_index = n * o_h * o_w * 2 + h * o_w + w;
-    DType y_real = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-    DType x_real = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
+    int grid_src_index  = n * o_h * o_w * 2 + h * o_w + w;
+    DType y_real        = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+    DType x_real        = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
 
-    int top_left_y = static_cast<int>(floor(y_real));
-    int top_left_x = static_cast<int>(floor(x_real));
+    int top_left_y     = static_cast<int>(floor(y_real));
+    int top_left_x     = static_cast<int>(floor(x_real));
     DType top_left_y_w = 1.0 - (y_real - top_left_y);
     DType top_left_x_w = 1.0 - (x_real - top_left_x);
     for (int c = 0; c < o_c; ++c) {
       int grad_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
       int data_index = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
       // calc 4 vertex value in input data
-      DType top_left_v = 0;
-      DType top_right_v = 0;
-      DType bottom_left_v = 0;
+      DType top_left_v     = 0;
+      DType top_right_v    = 0;
+      DType bottom_left_v  = 0;
       DType bottom_right_v = 0;
       // calc input grad
-      if (between(top_left_x, 0, i_w-1) && between(top_left_y, 0, i_h-1)) {
+      if (between(top_left_x, 0, i_w - 1) && between(top_left_y, 0, i_h - 1)) {
         if (Req1 != mxnet::kNullOp) {
           atomicAdd(&g_input[data_index], *(grad + grad_index) * top_left_y_w * top_left_x_w);
         }
         top_left_v = *(data + data_index);
       }
-      if (between(top_left_x+1, 0, i_w-1) && between(top_left_y, 0, i_h-1)) {
+      if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y, 0, i_h - 1)) {
         if (Req1 != mxnet::kNullOp) {
           atomicAdd(&g_input[data_index + 1],
                     *(grad + grad_index) * top_left_y_w * (1.0 - top_left_x_w));
         }
         top_right_v = *(data + data_index + 1);
       }
-      if (between(top_left_x, 0, i_w-1) && between(top_left_y+1, 0, i_h-1)) {
+      if (between(top_left_x, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1)) {
         if (Req1 != mxnet::kNullOp) {
-          atomicAdd(&g_input[data_index+ i_w],
+          atomicAdd(&g_input[data_index + i_w],
                     *(grad + grad_index) * (1.0 - top_left_y_w) * top_left_x_w);
         }
         bottom_left_v = *(data + data_index + i_w);
       }
-      if (between(top_left_x+1, 0, i_w-1) && between(top_left_y+1, 0, i_h-1)) {
+      if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1)) {
         if (Req1 != mxnet::kNullOp) {
-          atomicAdd(&g_input[data_index+ i_w + 1],
+          atomicAdd(&g_input[data_index + i_w + 1],
                     *(grad + grad_index) * (1.0 - top_left_y_w) * (1.0 - top_left_x_w));
         }
         bottom_right_v = *(data + data_index + i_w + 1);
       }
       // calc weight grad of top_left_w, then multiple -1 is the grad of grid_src
-      top_left_y_gw -= *(grad + grad_index) * (top_right_v - bottom_right_v +
-                        (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                        * top_left_x_w);
-      top_left_x_gw -= *(grad + grad_index) * (bottom_left_v - bottom_right_v +
-                        (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                        * top_left_y_w);
+      top_left_y_gw -= *(grad + grad_index) *
+                       (top_right_v - bottom_right_v +
+                        (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_x_w);
+      top_left_x_gw -= *(grad + grad_index) *
+                       (bottom_left_v - bottom_right_v +
+                        (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_y_w);
     }
     if (Req2 != mxnet::kNullOp) {
       // calc grad of grid
@@ -157,54 +167,54 @@ __global__ void BilinearSamplerBackwardKernel(const int i_c, const int i_h,
 }
 }  // namespace cuda
 
-template<typename DType>
-inline void BilinearSamplerForward(const Tensor<gpu, 4, DType> &output,
-                                    const Tensor<gpu, 4, DType> &input,
-                                    const Tensor<gpu, 4, DType> &grid_src) {
-    DType *out = output.dptr_;
-    const DType *data = input.dptr_;
-    const DType *grid = grid_src.dptr_;
-    int o_n = output.size(0), o_c = output.size(1), o_h = output.size(2), o_w = output.size(3);
-    int i_c = input.size(1), i_h = input.size(2), i_w = input.size(3);
-    using namespace cuda;
-    const int max_block = (output.shape_.Size() + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
-    const int grid_dim_x = (max_block > kMaxGridDim) ? kMaxGridDim : max_block;
-    const int grid_dim_y =
+template <typename DType>
+inline void BilinearSamplerForward(const Tensor<gpu, 4, DType>& output,
+                                   const Tensor<gpu, 4, DType>& input,
+                                   const Tensor<gpu, 4, DType>& grid_src) {
+  DType* out        = output.dptr_;
+  const DType* data = input.dptr_;
+  const DType* grid = grid_src.dptr_;
+  int o_n = output.size(0), o_c = output.size(1), o_h = output.size(2), o_w = output.size(3);
+  int i_c = input.size(1), i_h = input.size(2), i_w = input.size(3);
+  using namespace cuda;
+  const int max_block  = (output.shape_.Size() + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
+  const int grid_dim_x = (max_block > kMaxGridDim) ? kMaxGridDim : max_block;
+  const int grid_dim_y =
       (max_block > kMaxGridDim) ? (max_block + kMaxGridDim - 1) / kMaxGridDim : 1;
-    dim3 num_blocks(grid_dim_x, grid_dim_y);
-    dim3 threads_per_block(kMaxThreadsPerBlock);
-    CheckLaunchParam(num_blocks, threads_per_block, "bilinear sampler forward");
-    cudaStream_t stream = Stream<gpu>::GetStream(output.stream_);
-    cuda::BilinearSamplerForwardKernel<DType> << <num_blocks, threads_per_block, 0, stream >> >(
+  dim3 num_blocks(grid_dim_x, grid_dim_y);
+  dim3 threads_per_block(kMaxThreadsPerBlock);
+  CheckLaunchParam(num_blocks, threads_per_block, "bilinear sampler forward");
+  cudaStream_t stream = Stream<gpu>::GetStream(output.stream_);
+  cuda::BilinearSamplerForwardKernel<DType><<<num_blocks, threads_per_block, 0, stream>>>(
       i_c, i_h, i_w, data, grid, o_n, o_c, o_h, o_w, out);
-    // post kernel check
-    cudaError err = cudaGetLastError();
-    CHECK_EQ(err, cudaSuccess) << cudaGetErrorString(err);
+  // post kernel check
+  cudaError err = cudaGetLastError();
+  CHECK_EQ(err, cudaSuccess) << cudaGetErrorString(err);
 }
 
-template<typename DType>
-inline void BilinearSamplerBackward(const Tensor<gpu, 4, DType> &input_grad,
-                                    const Tensor<gpu, 4, DType> &ggrid,
-                                    const Tensor<gpu, 4, DType> &output_grad,
-                                    const Tensor<gpu, 4, DType> &input_data,
-                                    const Tensor<gpu, 4, DType> &grid,
+template <typename DType>
+inline void BilinearSamplerBackward(const Tensor<gpu, 4, DType>& input_grad,
+                                    const Tensor<gpu, 4, DType>& ggrid,
+                                    const Tensor<gpu, 4, DType>& output_grad,
+                                    const Tensor<gpu, 4, DType>& input_data,
+                                    const Tensor<gpu, 4, DType>& grid,
                                     const mxnet::OpReqType data_req,
                                     const mxnet::OpReqType grid_req) {
   using namespace mxnet;
-  DType *g_input = input_grad.dptr_;
-  DType *grad_grid = ggrid.dptr_;
-  const DType *grid_src = grid.dptr_;
-  const DType *grad = output_grad.dptr_;
-  const DType *data = input_data.dptr_;
-  int o_n = output_grad.size(0), o_c = output_grad.size(1),
-      o_h = output_grad.size(2), o_w = output_grad.size(3);
+  DType* g_input        = input_grad.dptr_;
+  DType* grad_grid      = ggrid.dptr_;
+  const DType* grid_src = grid.dptr_;
+  const DType* grad     = output_grad.dptr_;
+  const DType* data     = input_data.dptr_;
+  int o_n = output_grad.size(0), o_c = output_grad.size(1), o_h = output_grad.size(2),
+      o_w = output_grad.size(3);
   int i_c = input_data.size(1), i_h = input_data.size(2), i_w = input_data.size(3);
   using namespace cuda;
-  const int max_block = (output_grad.shape_.Size() / o_c + kMaxThreadsPerBlock - 1)
-                        / kMaxThreadsPerBlock;
+  const int max_block =
+      (output_grad.shape_.Size() / o_c + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
   const int grid_dim_x = (max_block > kMaxGridDim) ? kMaxGridDim : max_block;
   const int grid_dim_y =
-    (max_block > kMaxGridDim) ? (max_block + kMaxGridDim - 1) / kMaxGridDim : 1;
+      (max_block > kMaxGridDim) ? (max_block + kMaxGridDim - 1) / kMaxGridDim : 1;
   dim3 num_blocks(grid_dim_x, grid_dim_y);
   dim3 threads_per_block(kMaxThreadsPerBlock);
   CheckLaunchParam(num_blocks, threads_per_block, "bilinear sampler backward");
@@ -212,8 +222,8 @@ inline void BilinearSamplerBackward(const Tensor<gpu, 4, DType> &input_grad,
   MXNET_REQ_TYPE_SWITCH(data_req, Req1, {
     MXNET_REQ_TYPE_SWITCH(grid_req, Req2, {
       cuda::BilinearSamplerBackwardKernel<DType, Req1, Req2>
-      <<<num_blocks, threads_per_block, 0, stream >>>(
-        i_c, i_h, i_w, grad, data, o_n, o_c, o_h, o_w, g_input, grid_src, grad_grid);
+          <<<num_blocks, threads_per_block, 0, stream>>>(
+              i_c, i_h, i_w, grad, data, o_n, o_c, o_h, o_w, g_input, grid_src, grad_grid);
     });
   });
   // post kernel check
@@ -225,9 +235,9 @@ inline void BilinearSamplerBackward(const Tensor<gpu, 4, DType> &input_grad,
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(BilinearSamplerParam param, int dtype) {
-  Operator *op = nullptr;
+  Operator* op = nullptr;
 #if MXNET_USE_CUDNN == 1
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
     if (param.cudnn_off.has_value() && param.cudnn_off.value()) {
@@ -237,9 +247,7 @@ Operator* CreateOp<gpu>(BilinearSamplerParam param, int dtype) {
     }
   })
 #else
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new BilinearSamplerOp<gpu, DType>(param);
-  })
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new BilinearSamplerOp<gpu, DType>(param); })
 #endif  // MXNET_USE_CUDNN
   return op;
 }
diff --git a/src/operator/c_lapack_api.cc b/src/operator/c_lapack_api.cc
index 2d2109d05427..982e0353220e 100644
--- a/src/operator/c_lapack_api.cc
+++ b/src/operator/c_lapack_api.cc
@@ -22,151 +22,199 @@
 #if (MXNET_USE_LAPACK && (MSHADOW_USE_MKL || MXNET_USE_LAPACKE_INTERFACE))
 #elif MXNET_USE_LAPACK
 #else
-  // use pragma message instead of warning
-  #pragma message("Warning: lapack usage not enabled, linalg-operators will not be available." \
-     " Ensure that lapack library is installed and build with USE_LAPACK=1 to get lapack" \
-     " functionalities.")
-
-  // Define compilable stubs.
-  #define MXNET_LAPACK_CWRAPPER1(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype* a, int lda) { \
+// use pragma message instead of warning
+#pragma message(                                                                         \
+    "Warning: lapack usage not enabled, linalg-operators will not be available."         \
+    " Ensure that lapack library is installed and build with USE_LAPACK=1 to get lapack" \
+    " functionalities.")
+
+// Define compilable stubs.
+#define MXNET_LAPACK_CWRAPPER1(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype* a, int lda) {         \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER2(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* a, \
-                          int lda, dtype* tau, dtype* work, int lwork) { \
-    LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+#define MXNET_LAPACK_CWRAPPER2(func, dtype)                                                     \
+  int MXNET_LAPACK_##func(                                                                      \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork) { \
+    LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available.";     \
+    return 1;                                                                                   \
   }
 
-  #define MXNET_LAPACK_CWRAPPER3(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype *a, \
-                          int lda, dtype *w, dtype *work, int lwork, \
-                          int *iwork, int liwork) { \
+#define MXNET_LAPACK_CWRAPPER3(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(int matrix_layout,                                                \
+                          char uplo,                                                        \
+                          int n,                                                            \
+                          dtype* a,                                                         \
+                          int lda,                                                          \
+                          dtype* w,                                                         \
+                          dtype* work,                                                      \
+                          int lwork,                                                        \
+                          int* iwork,                                                       \
+                          int liwork) {                                                     \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER4(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, \
-                          dtype *a, int lda, int *ipiv) { \
+#define MXNET_LAPACK_CWRAPPER4(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* a, int lda, int* ipiv) {  \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER5(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int n, dtype *a, int lda, \
-                          int *ipiv, dtype *work, int lwork) { \
+#define MXNET_LAPACK_CWRAPPER5(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(                                                                  \
+      int matrix_layout, int n, dtype* a, int lda, int* ipiv, dtype* work, int lwork) {     \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER6(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* ut, \
-                          int ldut, dtype* s, dtype* v, int ldv, \
-                          dtype* work, int lwork) { \
+#define MXNET_LAPACK_CWRAPPER6(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(int matrix_layout,                                                \
+                          int m,                                                            \
+                          int n,                                                            \
+                          dtype* ut,                                                        \
+                          int ldut,                                                         \
+                          dtype* s,                                                         \
+                          dtype* v,                                                         \
+                          int ldv,                                                          \
+                          dtype* work,                                                      \
+                          int lwork) {                                                      \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER7(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_order, int n, int nrhs, dtype *a, \
-                          int lda, int *ipiv, dtype *b, int ldb) { \
+#define MXNET_LAPACK_CWRAPPER7(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(                                                                  \
+      int matrix_order, int n, int nrhs, dtype* a, int lda, int* ipiv, dtype* b, int ldb) { \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER8(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, char jobvl, char jobvr, \
-                          int n, dtype *a, int lda, \
-                          dtype *wr, dtype *wi, \
-                          dtype *vl, int ldvl, dtype *vr, int ldvr, \
-                          dtype *work, int lwork) { \
+#define MXNET_LAPACK_CWRAPPER8(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(int matrix_layout,                                                \
+                          char jobvl,                                                       \
+                          char jobvr,                                                       \
+                          int n,                                                            \
+                          dtype* a,                                                         \
+                          int lda,                                                          \
+                          dtype* wr,                                                        \
+                          dtype* wi,                                                        \
+                          dtype* vl,                                                        \
+                          int ldvl,                                                         \
+                          dtype* vr,                                                        \
+                          int ldvr,                                                         \
+                          dtype* work,                                                      \
+                          int lwork) {                                                      \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER9(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, \
-                          dtype *a, int lda, dtype *s, \
-                          dtype *u, int ldu, \
-                          dtype *vt, int ldvt, \
-                          dtype *work, int lwork, int *iwork) { \
+#define MXNET_LAPACK_CWRAPPER9(func, dtype)                                                 \
+  int MXNET_LAPACK_##func(int matrix_layout,                                                \
+                          int m,                                                            \
+                          int n,                                                            \
+                          dtype* a,                                                         \
+                          int lda,                                                          \
+                          dtype* s,                                                         \
+                          dtype* u,                                                         \
+                          int ldu,                                                          \
+                          dtype* vt,                                                        \
+                          int ldvt,                                                         \
+                          dtype* work,                                                      \
+                          int lwork,                                                        \
+                          int* iwork) {                                                     \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER10(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* a, \
-                          int lda, dtype* tau, dtype* work, int lwork) { \
-    LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+#define MXNET_LAPACK_CWRAPPER10(func, dtype)                                                    \
+  int MXNET_LAPACK_##func(                                                                      \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork) { \
+    LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available.";     \
+    return 1;                                                                                   \
   }
 
-  #define MXNET_LAPACK_CWRAPPER11(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, int nrhs, \
-                          dtype *a, int lda, dtype *b, int ldb, \
-                          dtype *s, dtype rcond, int *rank, \
-                          dtype *work, int lwork, int *iwork) { \
+#define MXNET_LAPACK_CWRAPPER11(func, dtype)                                                \
+  int MXNET_LAPACK_##func(int matrix_layout,                                                \
+                          int m,                                                            \
+                          int n,                                                            \
+                          int nrhs,                                                         \
+                          dtype* a,                                                         \
+                          int lda,                                                          \
+                          dtype* b,                                                         \
+                          int ldb,                                                          \
+                          dtype* s,                                                         \
+                          dtype rcond,                                                      \
+                          int* rank,                                                        \
+                          dtype* work,                                                      \
+                          int lwork,                                                        \
+                          int* iwork) {                                                     \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_CWRAPPER12(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, int k, dtype* a, \
-                          int lda, dtype* tau, dtype* work, int lwork) { \
+#define MXNET_LAPACK_CWRAPPER12(func, dtype)                                                \
+  int MXNET_LAPACK_##func(int matrix_layout,                                                \
+                          int m,                                                            \
+                          int n,                                                            \
+                          int k,                                                            \
+                          dtype* a,                                                         \
+                          int lda,                                                          \
+                          dtype* tau,                                                       \
+                          dtype* work,                                                      \
+                          int lwork) {                                                      \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
 
-  #define MXNET_LAPACK_UNAVAILABLE(func) \
-  int mxnet_lapack_##func(...) { \
+#define MXNET_LAPACK_UNAVAILABLE(func)                                                      \
+  int mxnet_lapack_##func(...) {                                                            \
     LOG(FATAL) << "MXNet build without lapack. Function " << #func << " is not available."; \
-    return 1; \
+    return 1;                                                                               \
   }
-  MXNET_LAPACK_CWRAPPER1(spotrf, float)
-  MXNET_LAPACK_CWRAPPER1(dpotrf, double)
-  MXNET_LAPACK_CWRAPPER1(spotri, float)
-  MXNET_LAPACK_CWRAPPER1(dpotri, double)
+MXNET_LAPACK_CWRAPPER1(spotrf, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER1(dpotrf, double)  // NOLINT
+MXNET_LAPACK_CWRAPPER1(spotri, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER1(dpotri, double)  // NOLINT
 
-  MXNET_LAPACK_UNAVAILABLE(sposv)
-  MXNET_LAPACK_UNAVAILABLE(dposv)
+MXNET_LAPACK_UNAVAILABLE(sposv)  // NOLINT
+MXNET_LAPACK_UNAVAILABLE(dposv)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER2(sgelqf, float)
-  MXNET_LAPACK_CWRAPPER2(dgelqf, double)
-  MXNET_LAPACK_CWRAPPER2(sorglq, float)
-  MXNET_LAPACK_CWRAPPER2(dorglq, double)
+MXNET_LAPACK_CWRAPPER2(sgelqf, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER2(dgelqf, double)  // NOLINT
+MXNET_LAPACK_CWRAPPER2(sorglq, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER2(dorglq, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER3(ssyevd, float)
-  MXNET_LAPACK_CWRAPPER3(dsyevd, double)
+MXNET_LAPACK_CWRAPPER3(ssyevd, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER3(dsyevd, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER4(sgetrf, float)
-  MXNET_LAPACK_CWRAPPER4(dgetrf, double)
+MXNET_LAPACK_CWRAPPER4(sgetrf, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER4(dgetrf, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER5(sgetri, float)
-  MXNET_LAPACK_CWRAPPER5(dgetri, double)
+MXNET_LAPACK_CWRAPPER5(sgetri, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER5(dgetri, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER6(sgesvd, float)
-  MXNET_LAPACK_CWRAPPER6(dgesvd, double)
+MXNET_LAPACK_CWRAPPER6(sgesvd, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER6(dgesvd, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER7(sgesv, float)
-  MXNET_LAPACK_CWRAPPER7(dgesv, double)
+MXNET_LAPACK_CWRAPPER7(sgesv, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER7(dgesv, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER8(sgeev, float)
-  MXNET_LAPACK_CWRAPPER8(dgeev, double)
+MXNET_LAPACK_CWRAPPER8(sgeev, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER8(dgeev, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER9(sgesdd, float)
-  MXNET_LAPACK_CWRAPPER9(dgesdd, double)
+MXNET_LAPACK_CWRAPPER9(sgesdd, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER9(dgesdd, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER10(sgeqrf, float)
-  MXNET_LAPACK_CWRAPPER10(dgeqrf, double)
+MXNET_LAPACK_CWRAPPER10(sgeqrf, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER10(dgeqrf, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER11(sgelsd, float)
-  MXNET_LAPACK_CWRAPPER11(dgelsd, double)
+MXNET_LAPACK_CWRAPPER11(sgelsd, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER11(dgelsd, double)  // NOLINT
 
-  MXNET_LAPACK_CWRAPPER12(sorgqr, float)
-  MXNET_LAPACK_CWRAPPER12(dorgqr, double)
+MXNET_LAPACK_CWRAPPER12(sorgqr, float)   // NOLINT
+MXNET_LAPACK_CWRAPPER12(dorgqr, double)  // NOLINT
 
 #endif  // MSHADOW_USE_MKL == 0
diff --git a/src/operator/c_lapack_api.h b/src/operator/c_lapack_api.h
index 71161f108ce6..ee750013d80f 100644
--- a/src/operator/c_lapack_api.h
+++ b/src/operator/c_lapack_api.h
@@ -75,152 +75,229 @@ using namespace mshadow;
 
 extern "C" {
 
-  // Fortran signatures
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIGNATURE1(func, dtype) \
-      int func##_(char* uplo, int* n, dtype* a, int* lda, int *info);
-  #else
-    #define MXNET_LAPACK_FSIGNATURE1(func, dtype) \
-      void func##_(char* uplo, int* n, dtype* a, int* lda, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIGNATURE1(spotrf, float)
-  MXNET_LAPACK_FSIGNATURE1(dpotrf, double)
-  MXNET_LAPACK_FSIGNATURE1(spotri, float)
-  MXNET_LAPACK_FSIGNATURE1(dpotri, double)
-
-  void dposv_(char *uplo, int *n, int *nrhs,
-    double *a, int *lda, double *b, int *ldb, int *info);
-
-  void sposv_(char *uplo, int *n, int *nrhs,
-    float *a, int *lda, float *b, int *ldb, int *info);
-
-  // Note: GELQF in row-major (MXNet) becomes GEQRF in column-major (LAPACK).
-  // Also, m and n are flipped, compared to the row-major version
-  #define MXNET_LAPACK_FSIG_GEQRF(func, dtype) \
-    void func##_(int *m, int *n, dtype *a, int *lda, dtype *tau, dtype *work, \
-                 int *lwork, int *info);
-
-  MXNET_LAPACK_FSIG_GEQRF(sgeqrf, float)
-  MXNET_LAPACK_FSIG_GEQRF(dgeqrf, double)
-
-  // Note: ORGLQ in row-major (MXNet) becomes ORGQR in column-major (LAPACK)
-  // Also, m and n are flipped, compared to the row-major version
-  #define MXNET_LAPACK_FSIG_ORGQR(func, dtype) \
-    void func##_(int *m, int *n, int *k, dtype *a, int *lda, dtype *tau, \
-                 dtype *work, int *lwork, int *info);
-
-  MXNET_LAPACK_FSIG_ORGQR(sorgqr, float)
-  MXNET_LAPACK_FSIG_ORGQR(dorgqr, double)
-
-  #define MXNET_LAPACK_FSIG_SYEVD(func, dtype) \
-    void func##_(char *jobz, char *uplo, int *n, dtype *a, int *lda, dtype *w, \
-                 dtype *work, int *lwork, int *iwork, int *liwork, int *info);
-
-  MXNET_LAPACK_FSIG_SYEVD(ssyevd, float)
-  MXNET_LAPACK_FSIG_SYEVD(dsyevd, double)
-
-  #define MXNET_LAPACK_FSIG_GESVD(func, dtype) \
-    void func##_(char *jobu, char *jobvt, int *m, int *n, dtype *a, int *lda, dtype *s, \
-                 dtype* u, int *ldu, dtype *vt, int *ldvt, dtype *work, int *lwork, int *info);
-
-  MXNET_LAPACK_FSIG_GESVD(sgesvd, float)
-  MXNET_LAPACK_FSIG_GESVD(dgesvd, double)
-
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIG_GETRF(func, dtype) \
-      int func##_(int *m, int *n, dtype *a, int *lda, int *ipiv, int *info);
-  #else
-    #define MXNET_LAPACK_FSIG_GETRF(func, dtype) \
-      void func##_(int *m, int *n, dtype *a, int *lda, int *ipiv, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIG_GETRF(sgetrf, float)
-  MXNET_LAPACK_FSIG_GETRF(dgetrf, double)
-
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIG_GETRI(func, dtype) \
-      int func##_(int *n, dtype *a, int *lda, int *ipiv, dtype *work, \
-                  int *lwork, int *info);
-  #else
-    #define MXNET_LAPACK_FSIG_GETRI(func, dtype) \
-      void func##_(int *n, dtype *a, int *lda, int *ipiv, dtype *work, \
-                   int *lwork, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIG_GETRI(sgetri, float)
-  MXNET_LAPACK_FSIG_GETRI(dgetri, double)
-
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIG_GESV(func, dtype) \
-      int func##_(int *n, int *nrhs, dtype *a, int *lda, \
-                   int *ipiv, dtype *b, int *ldb, int *info);
-  #else
-    #define MXNET_LAPACK_FSIG_GESV(func, dtype) \
-      void func##_(int *n, int *nrhs, dtype *a, int *lda, \
-                   int *ipiv, dtype *b, int *ldb, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIG_GESV(sgesv, float)
-  MXNET_LAPACK_FSIG_GESV(dgesv, double)
-
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIG_GESDD(func, dtype) \
-    int func##_(char *jobz, int *m, int *n, dtype *a, int *lda, dtype *s, \
-                dtype *u, int *ldu, \
-                dtype *vt, int *ldvt, \
-                dtype *work, int *lwork, int *iwork, int *info);
-  #else
-    #define MXNET_LAPACK_FSIG_GESDD(func, dtype) \
-    void func##_(char *jobz, int *m, int *n, dtype *a, int *lda, dtype *s, \
-                 dtype *u, int *ldu, \
-                 dtype *vt, int *ldvt, \
-                 dtype *work, int *lwork, int *iwork, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIG_GESDD(sgesdd, float)
-  MXNET_LAPACK_FSIG_GESDD(dgesdd, double)
-
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIG_GEEV(func, dtype) \
-    int func##_(char *jobvl, char *jobvr, int *n, dtype *a, int *lda, \
-                dtype *wr, dtype *wi, \
-                dtype *vl, int *ldvl, dtype *vr, int *ldvr, \
-                dtype *work, int *lwork, int *info);
-  #else
-    #define MXNET_LAPACK_FSIG_GEEV(func, dtype) \
-    void func##_(char *jobvl, char *jobvr, int *n, dtype *a, int *lda, \
-                 dtype *wr, dtype *wi, \
-                 dtype *vl, int *ldvl, dtype *vr, int *ldvr, \
-                 dtype *work, int *lwork, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIG_GEEV(sgeev, float)
-  MXNET_LAPACK_FSIG_GEEV(dgeev, double)
-
-  #ifdef __ANDROID__
-    #define MXNET_LAPACK_FSIG_GELSD(func, dtype) \
-    int func##_(int *m, int *n, int *nrhs, dtype *a, int *lda, \
-                dtype *b, int *ldb, dtype *s, dtype *rcond, int *rank, \
-                dtype *work, int *lwork, int *iwork, int *info);
-  #else
-    #define MXNET_LAPACK_FSIG_GELSD(func, dtype) \
-    void func##_(int *m, int *n, int *nrhs, dtype *a, int *lda, \
-                 dtype *b, int *ldb, dtype *s, dtype *rcond, int *rank, \
-                 dtype *work, int *lwork, int *iwork, int *info);
-  #endif
-
-  MXNET_LAPACK_FSIG_GELSD(sgelsd, float)
-  MXNET_LAPACK_FSIG_GELSD(dgelsd, double)
+// Fortran signatures
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIGNATURE1(func, dtype) \
+  int func##_(char* uplo, int* n, dtype* a, int* lda, int* info);
+#else
+#define MXNET_LAPACK_FSIGNATURE1(func, dtype) \
+  void func##_(char* uplo, int* n, dtype* a, int* lda, int* info);
+#endif
+
+MXNET_LAPACK_FSIGNATURE1(spotrf, float)
+MXNET_LAPACK_FSIGNATURE1(dpotrf, double)
+MXNET_LAPACK_FSIGNATURE1(spotri, float)
+MXNET_LAPACK_FSIGNATURE1(dpotri, double)
+
+void dposv_(char* uplo, int* n, int* nrhs, double* a, int* lda, double* b, int* ldb, int* info);
+
+void sposv_(char* uplo, int* n, int* nrhs, float* a, int* lda, float* b, int* ldb, int* info);
+
+// Note: GELQF in row-major (MXNet) becomes GEQRF in column-major (LAPACK).
+// Also, m and n are flipped, compared to the row-major version
+#define MXNET_LAPACK_FSIG_GEQRF(func, dtype) \
+  void func##_(int* m, int* n, dtype* a, int* lda, dtype* tau, dtype* work, int* lwork, int* info);
+
+MXNET_LAPACK_FSIG_GEQRF(sgeqrf, float)
+MXNET_LAPACK_FSIG_GEQRF(dgeqrf, double)
+
+// Note: ORGLQ in row-major (MXNet) becomes ORGQR in column-major (LAPACK)
+// Also, m and n are flipped, compared to the row-major version
+#define MXNET_LAPACK_FSIG_ORGQR(func, dtype) \
+  void func##_(                              \
+      int* m, int* n, int* k, dtype* a, int* lda, dtype* tau, dtype* work, int* lwork, int* info);
+
+MXNET_LAPACK_FSIG_ORGQR(sorgqr, float)
+MXNET_LAPACK_FSIG_ORGQR(dorgqr, double)
+
+#define MXNET_LAPACK_FSIG_SYEVD(func, dtype) \
+  void func##_(char* jobz,                   \
+               char* uplo,                   \
+               int* n,                       \
+               dtype* a,                     \
+               int* lda,                     \
+               dtype* w,                     \
+               dtype* work,                  \
+               int* lwork,                   \
+               int* iwork,                   \
+               int* liwork,                  \
+               int* info);
+
+MXNET_LAPACK_FSIG_SYEVD(ssyevd, float)
+MXNET_LAPACK_FSIG_SYEVD(dsyevd, double)
+
+#define MXNET_LAPACK_FSIG_GESVD(func, dtype) \
+  void func##_(char* jobu,                   \
+               char* jobvt,                  \
+               int* m,                       \
+               int* n,                       \
+               dtype* a,                     \
+               int* lda,                     \
+               dtype* s,                     \
+               dtype* u,                     \
+               int* ldu,                     \
+               dtype* vt,                    \
+               int* ldvt,                    \
+               dtype* work,                  \
+               int* lwork,                   \
+               int* info);
+
+MXNET_LAPACK_FSIG_GESVD(sgesvd, float)
+MXNET_LAPACK_FSIG_GESVD(dgesvd, double)
+
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIG_GETRF(func, dtype) \
+  int func##_(int* m, int* n, dtype* a, int* lda, int* ipiv, int* info);
+#else
+#define MXNET_LAPACK_FSIG_GETRF(func, dtype) \
+  void func##_(int* m, int* n, dtype* a, int* lda, int* ipiv, int* info);
+#endif
+
+MXNET_LAPACK_FSIG_GETRF(sgetrf, float)
+MXNET_LAPACK_FSIG_GETRF(dgetrf, double)
+
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIG_GETRI(func, dtype) \
+  int func##_(int* n, dtype* a, int* lda, int* ipiv, dtype* work, int* lwork, int* info);
+#else
+#define MXNET_LAPACK_FSIG_GETRI(func, dtype) \
+  void func##_(int* n, dtype* a, int* lda, int* ipiv, dtype* work, int* lwork, int* info);
+#endif
+
+MXNET_LAPACK_FSIG_GETRI(sgetri, float)
+MXNET_LAPACK_FSIG_GETRI(dgetri, double)
+
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIG_GESV(func, dtype) \
+  int func##_(int* n, int* nrhs, dtype* a, int* lda, int* ipiv, dtype* b, int* ldb, int* info);
+#else
+#define MXNET_LAPACK_FSIG_GESV(func, dtype) \
+  void func##_(int* n, int* nrhs, dtype* a, int* lda, int* ipiv, dtype* b, int* ldb, int* info);
+#endif
+
+MXNET_LAPACK_FSIG_GESV(sgesv, float)
+MXNET_LAPACK_FSIG_GESV(dgesv, double)
+
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIG_GESDD(func, dtype) \
+  int func##_(char* jobz,                    \
+              int* m,                        \
+              int* n,                        \
+              dtype* a,                      \
+              int* lda,                      \
+              dtype* s,                      \
+              dtype* u,                      \
+              int* ldu,                      \
+              dtype* vt,                     \
+              int* ldvt,                     \
+              dtype* work,                   \
+              int* lwork,                    \
+              int* iwork,                    \
+              int* info);
+#else
+#define MXNET_LAPACK_FSIG_GESDD(func, dtype) \
+  void func##_(char* jobz,                   \
+               int* m,                       \
+               int* n,                       \
+               dtype* a,                     \
+               int* lda,                     \
+               dtype* s,                     \
+               dtype* u,                     \
+               int* ldu,                     \
+               dtype* vt,                    \
+               int* ldvt,                    \
+               dtype* work,                  \
+               int* lwork,                   \
+               int* iwork,                   \
+               int* info);
+#endif
+
+MXNET_LAPACK_FSIG_GESDD(sgesdd, float)
+MXNET_LAPACK_FSIG_GESDD(dgesdd, double)
+
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIG_GEEV(func, dtype) \
+  int func##_(char* jobvl,                  \
+              char* jobvr,                  \
+              int* n,                       \
+              dtype* a,                     \
+              int* lda,                     \
+              dtype* wr,                    \
+              dtype* wi,                    \
+              dtype* vl,                    \
+              int* ldvl,                    \
+              dtype* vr,                    \
+              int* ldvr,                    \
+              dtype* work,                  \
+              int* lwork,                   \
+              int* info);
+#else
+#define MXNET_LAPACK_FSIG_GEEV(func, dtype) \
+  void func##_(char* jobvl,                 \
+               char* jobvr,                 \
+               int* n,                      \
+               dtype* a,                    \
+               int* lda,                    \
+               dtype* wr,                   \
+               dtype* wi,                   \
+               dtype* vl,                   \
+               int* ldvl,                   \
+               dtype* vr,                   \
+               int* ldvr,                   \
+               dtype* work,                 \
+               int* lwork,                  \
+               int* info);
+#endif
+
+MXNET_LAPACK_FSIG_GEEV(sgeev, float)
+MXNET_LAPACK_FSIG_GEEV(dgeev, double)
+
+#ifdef __ANDROID__
+#define MXNET_LAPACK_FSIG_GELSD(func, dtype) \
+  int func##_(int* m,                        \
+              int* n,                        \
+              int* nrhs,                     \
+              dtype* a,                      \
+              int* lda,                      \
+              dtype* b,                      \
+              int* ldb,                      \
+              dtype* s,                      \
+              dtype* rcond,                  \
+              int* rank,                     \
+              dtype* work,                   \
+              int* lwork,                    \
+              int* iwork,                    \
+              int* info);
+#else
+#define MXNET_LAPACK_FSIG_GELSD(func, dtype) \
+  void func##_(int* m,                       \
+               int* n,                       \
+               int* nrhs,                    \
+               dtype* a,                     \
+               int* lda,                     \
+               dtype* b,                     \
+               int* ldb,                     \
+               dtype* s,                     \
+               dtype* rcond,                 \
+               int* rank,                    \
+               dtype* work,                  \
+               int* lwork,                   \
+               int* iwork,                   \
+               int* info);
+#endif
+
+MXNET_LAPACK_FSIG_GELSD(sgelsd, float)
+MXNET_LAPACK_FSIG_GELSD(dgelsd, double)
 }
 
 #endif  // MSHADOW_USE_MKL == 0
 
-
 #define CHECK_LAPACK_UPLO(a) \
   CHECK(a == 'U' || a == 'L') << "neither L nor U specified as triangle in lapack call";
 
-inline char loup(char uplo, bool invert) { return invert ? (uplo == 'U' ? 'L' : 'U') : uplo; }
+inline char loup(char uplo, bool invert) {
+  return invert ? (uplo == 'U' ? 'L' : 'U') : uplo;
+}
 
 /*!
  * \brief Transpose matrix data in memory
@@ -236,594 +313,772 @@ inline char loup(char uplo, bool invert) { return invert ? (uplo == 'U' ? 'L' :
  * \param lda leading dimension of a
  */
 template <typename xpu, typename DType>
-inline void flip(int m, int n, DType *b, int ldb, DType *a, int lda) {
+inline void flip(int m, int n, DType* b, int ldb, DType* a, int lda) {
   for (int i = 0; i < m; ++i)
     for (int j = 0; j < n; ++j)
       b[j * ldb + i] = a[i * lda + j];
 }
 
-
 #if (MXNET_USE_LAPACK && (MSHADOW_USE_MKL || MXNET_USE_LAPACKE_INTERFACE))
-  #if MSHADOW_USE_MKL
-    #include <mkl_lapacke.h>
-  #else
-    #if MXNET_USE_ILP64_LAPACKE
-      #define lapack_int int64_t
-    #endif
-    // prevent multiple inclusion of complex.h in lapacke.h
-    #define lapack_complex_float float _Complex
-    #define lapack_complex_double double _Complex
-    #include <lapacke.h>
-  #endif
-
-  #define MXNET_LAPACK_ROW_MAJOR LAPACK_ROW_MAJOR
-  #define MXNET_LAPACK_COL_MAJOR LAPACK_COL_MAJOR
-
-  // These function have already matching signature.
-  #define MXNET_LAPACK_spotrf LAPACKE_spotrf
-  #define MXNET_LAPACK_dpotrf LAPACKE_dpotrf
-  #define MXNET_LAPACK_spotri LAPACKE_spotri
-  #define MXNET_LAPACK_dpotri LAPACKE_dpotri
-  #define mxnet_lapack_sposv  LAPACKE_sposv
-  #define mxnet_lapack_dposv  LAPACKE_dposv
-  #define MXNET_LAPACK_dgesv  LAPACKE_dgesv
-  #define MXNET_LAPACK_sgesv  LAPACKE_sgesv
-
-  // The following functions differ in signature from the
-  // MXNET_LAPACK-signature and have to be wrapped.
-  #define MXNET_LAPACK_CWRAP_GELQF(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gelqf(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          dtype *a, lapack_index_t lda, dtype *tau, \
-                                          dtype *work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
+#if MSHADOW_USE_MKL
+#include <mkl_lapacke.h>
+#else
+#if MXNET_USE_ILP64_LAPACKE
+#define lapack_int int64_t
+#endif
+// prevent multiple inclusion of complex.h in lapacke.h
+#define lapack_complex_float  float _Complex
+#define lapack_complex_double double _Complex
+#include <lapacke.h>
+#endif
+
+#define MXNET_LAPACK_ROW_MAJOR LAPACK_ROW_MAJOR
+#define MXNET_LAPACK_COL_MAJOR LAPACK_COL_MAJOR
+
+// These function have already matching signature.
+#define MXNET_LAPACK_spotrf LAPACKE_spotrf
+#define MXNET_LAPACK_dpotrf LAPACKE_dpotrf
+#define MXNET_LAPACK_spotri LAPACKE_spotri
+#define MXNET_LAPACK_dpotri LAPACKE_dpotri
+#define mxnet_lapack_sposv  LAPACKE_sposv
+#define mxnet_lapack_dposv  LAPACKE_dposv
+#define MXNET_LAPACK_dgesv  LAPACKE_dgesv
+#define MXNET_LAPACK_sgesv  LAPACKE_sgesv
+
+// The following functions differ in signature from the
+// MXNET_LAPACK-signature and have to be wrapped.
+#define MXNET_LAPACK_CWRAP_GELQF(prefix, dtype)                         \
+  inline int MXNET_LAPACK_##prefix##gelqf(int matrix_layout,            \
+                                          lapack_index_t m,             \
+                                          lapack_index_t n,             \
+                                          dtype* a,                     \
+                                          lapack_index_t lda,           \
+                                          dtype* tau,                   \
+                                          dtype* work,                  \
+                                          lapack_index_t lwork) {       \
+    if (lwork != -1) {                                                  \
       return LAPACKE_##prefix##gelqf(matrix_layout, m, n, a, lda, tau); \
-    } \
-    *work = 0; \
-    return 0; \
+    }                                                                   \
+    *work = 0;                                                          \
+    return 0;                                                           \
   }
-  MXNET_LAPACK_CWRAP_GELQF(s, float)
-  MXNET_LAPACK_CWRAP_GELQF(d, double)
-
-  #define MXNET_LAPACK_CWRAP_ORGLQ(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##orglq(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          dtype *a, lapack_index_t lda, dtype *tau, \
-                                          dtype *work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
+MXNET_LAPACK_CWRAP_GELQF(s, float)
+MXNET_LAPACK_CWRAP_GELQF(d, double)
+
+#define MXNET_LAPACK_CWRAP_ORGLQ(prefix, dtype)                            \
+  inline int MXNET_LAPACK_##prefix##orglq(int matrix_layout,               \
+                                          lapack_index_t m,                \
+                                          lapack_index_t n,                \
+                                          dtype* a,                        \
+                                          lapack_index_t lda,              \
+                                          dtype* tau,                      \
+                                          dtype* work,                     \
+                                          lapack_index_t lwork) {          \
+    if (lwork != -1) {                                                     \
       return LAPACKE_##prefix##orglq(matrix_layout, m, n, m, a, lda, tau); \
-    } \
-    *work = 0; \
-    return 0; \
+    }                                                                      \
+    *work = 0;                                                             \
+    return 0;                                                              \
   }
-  MXNET_LAPACK_CWRAP_ORGLQ(s, float)
-  MXNET_LAPACK_CWRAP_ORGLQ(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GEQRF(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##geqrf(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          dtype *a, lapack_index_t lda, dtype *tau, \
-                                          dtype *work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
+MXNET_LAPACK_CWRAP_ORGLQ(s, float)
+MXNET_LAPACK_CWRAP_ORGLQ(d, double)
+
+#define MXNET_LAPACK_CWRAP_GEQRF(prefix, dtype)                         \
+  inline int MXNET_LAPACK_##prefix##geqrf(int matrix_layout,            \
+                                          lapack_index_t m,             \
+                                          lapack_index_t n,             \
+                                          dtype* a,                     \
+                                          lapack_index_t lda,           \
+                                          dtype* tau,                   \
+                                          dtype* work,                  \
+                                          lapack_index_t lwork) {       \
+    if (lwork != -1) {                                                  \
       return LAPACKE_##prefix##geqrf(matrix_layout, m, n, a, lda, tau); \
-    } \
-    *work = 0; \
-    return 0; \
+    }                                                                   \
+    *work = 0;                                                          \
+    return 0;                                                           \
   }
-  MXNET_LAPACK_CWRAP_GEQRF(s, float)
-  MXNET_LAPACK_CWRAP_GEQRF(d, double)
-
-  #define MXNET_LAPACK_CWRAP_ORGQR(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##orgqr(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          lapack_index_t k, dtype *a, lapack_index_t lda, \
-                                          dtype *tau, dtype *work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
+MXNET_LAPACK_CWRAP_GEQRF(s, float)
+MXNET_LAPACK_CWRAP_GEQRF(d, double)
+
+#define MXNET_LAPACK_CWRAP_ORGQR(prefix, dtype)                            \
+  inline int MXNET_LAPACK_##prefix##orgqr(int matrix_layout,               \
+                                          lapack_index_t m,                \
+                                          lapack_index_t n,                \
+                                          lapack_index_t k,                \
+                                          dtype* a,                        \
+                                          lapack_index_t lda,              \
+                                          dtype* tau,                      \
+                                          dtype* work,                     \
+                                          lapack_index_t lwork) {          \
+    if (lwork != -1) {                                                     \
       return LAPACKE_##prefix##orgqr(matrix_layout, m, n, k, a, lda, tau); \
-    } \
-    *work = 0; \
-    return 0; \
+    }                                                                      \
+    *work = 0;                                                             \
+    return 0;                                                              \
   }
-  MXNET_LAPACK_CWRAP_ORGQR(s, float)
-  MXNET_LAPACK_CWRAP_ORGQR(d, double)
-
-  // This has to be called internally in COL_MAJOR format even when matrix_layout
-  // is row-major as otherwise the eigenvectors would be returned as cols in a
-  // row-major matrix layout (see MKL documentation).
-  // We also have to allocate at least one DType element as workspace as the
-  // calling code assumes that the workspace has at least that size.
-  #define MXNET_LAPACK_CWRAP_SYEVD(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##syevd(int matrix_layout, char uplo, lapack_index_t n, \
-                                          dtype *a, lapack_index_t lda, dtype *w, \
-                                          dtype *work, lapack_index_t lwork, \
-                                          lapack_index_t *iwork, lapack_index_t liwork) { \
-    if (lwork != -1) { \
-      char o(loup(uplo, (matrix_layout == MXNET_LAPACK_ROW_MAJOR))); \
+MXNET_LAPACK_CWRAP_ORGQR(s, float)
+MXNET_LAPACK_CWRAP_ORGQR(d, double)
+
+// This has to be called internally in COL_MAJOR format even when matrix_layout
+// is row-major as otherwise the eigenvectors would be returned as cols in a
+// row-major matrix layout (see MKL documentation).
+// We also have to allocate at least one DType element as workspace as the
+// calling code assumes that the workspace has at least that size.
+#define MXNET_LAPACK_CWRAP_SYEVD(prefix, dtype)                               \
+  inline int MXNET_LAPACK_##prefix##syevd(int matrix_layout,                  \
+                                          char uplo,                          \
+                                          lapack_index_t n,                   \
+                                          dtype* a,                           \
+                                          lapack_index_t lda,                 \
+                                          dtype* w,                           \
+                                          dtype* work,                        \
+                                          lapack_index_t lwork,               \
+                                          lapack_index_t* iwork,              \
+                                          lapack_index_t liwork) {            \
+    if (lwork != -1) {                                                        \
+      char o(loup(uplo, (matrix_layout == MXNET_LAPACK_ROW_MAJOR)));          \
       return LAPACKE_##prefix##syevd(LAPACK_COL_MAJOR, 'V', o, n, a, lda, w); \
-    } \
-    *work = 1; \
-    *iwork = 0; \
-    return 0; \
+    }                                                                         \
+    *work  = 1;                                                               \
+    *iwork = 0;                                                               \
+    return 0;                                                                 \
   }
-  MXNET_LAPACK_CWRAP_SYEVD(s, float)
-  MXNET_LAPACK_CWRAP_SYEVD(d, double)
-
-  #define MXNET_LAPACK_sgetrf LAPACKE_sgetrf
-  #define MXNET_LAPACK_dgetrf LAPACKE_dgetrf
-
-  // Internally A is factorized as U * L * VT, and (according to the tech report)
-  // we want to factorize it as UT * L * V, so we pass ut as u and v as vt.
-  // We also have to allocate at least m - 1 DType elements as workspace as the internal
-  // LAPACKE function needs it to store `superb`. (see MKL documentation)
-  #define MXNET_LAPACK_CWRAP_GESVD(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gesvd(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          dtype* ut, lapack_index_t ldut, dtype* s, dtype* v, \
-                                          lapack_index_t ldv, dtype* work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
-      return LAPACKE_##prefix##gesvd(matrix_layout, 'S', 'O', m, n, v, ldv, s, ut, ldut, \
-                                     v, ldv, work); \
-    } \
-    *work = m - 1; \
-    return 0; \
+MXNET_LAPACK_CWRAP_SYEVD(s, float)
+MXNET_LAPACK_CWRAP_SYEVD(d, double)
+
+#define MXNET_LAPACK_sgetrf LAPACKE_sgetrf
+#define MXNET_LAPACK_dgetrf LAPACKE_dgetrf
+
+// Internally A is factorized as U * L * VT, and (according to the tech report)
+// we want to factorize it as UT * L * V, so we pass ut as u and v as vt.
+// We also have to allocate at least m - 1 DType elements as workspace as the internal
+// LAPACKE function needs it to store `superb`. (see MKL documentation)
+#define MXNET_LAPACK_CWRAP_GESVD(prefix, dtype)                              \
+  inline int MXNET_LAPACK_##prefix##gesvd(int matrix_layout,                 \
+                                          lapack_index_t m,                  \
+                                          lapack_index_t n,                  \
+                                          dtype* ut,                         \
+                                          lapack_index_t ldut,               \
+                                          dtype* s,                          \
+                                          dtype* v,                          \
+                                          lapack_index_t ldv,                \
+                                          dtype* work,                       \
+                                          lapack_index_t lwork) {            \
+    if (lwork != -1) {                                                       \
+      return LAPACKE_##prefix##gesvd(                                        \
+          matrix_layout, 'S', 'O', m, n, v, ldv, s, ut, ldut, v, ldv, work); \
+    }                                                                        \
+    *work = m - 1;                                                           \
+    return 0;                                                                \
   }
-  MXNET_LAPACK_CWRAP_GESVD(s, float)
-  MXNET_LAPACK_CWRAP_GESVD(d, double)
-
-  // Computes the singular value decomposition of a general rectangular matrix
-  // using a divide and conquer method.
-  #define MXNET_LAPACK_CWRAP_GESDD(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gesdd(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          dtype *a, lapack_index_t lda, dtype *s, \
-                                          dtype *u, lapack_index_t ldu, \
-                                          dtype *vt, lapack_index_t ldvt, \
-                                          dtype *work, lapack_index_t lwork, \
-                                          lapack_index_t *iwork) { \
-    if (lwork != -1) { \
-      return LAPACKE_##prefix##gesdd(matrix_layout, 'O', m, n, a, lda, \
-                                     s, u, ldu, vt, ldvt); \
-    } \
-    *work = 0; \
-    return 0; \
+MXNET_LAPACK_CWRAP_GESVD(s, float)
+MXNET_LAPACK_CWRAP_GESVD(d, double)
+
+// Computes the singular value decomposition of a general rectangular matrix
+// using a divide and conquer method.
+#define MXNET_LAPACK_CWRAP_GESDD(prefix, dtype)                                              \
+  inline int MXNET_LAPACK_##prefix##gesdd(int matrix_layout,                                 \
+                                          lapack_index_t m,                                  \
+                                          lapack_index_t n,                                  \
+                                          dtype* a,                                          \
+                                          lapack_index_t lda,                                \
+                                          dtype* s,                                          \
+                                          dtype* u,                                          \
+                                          lapack_index_t ldu,                                \
+                                          dtype* vt,                                         \
+                                          lapack_index_t ldvt,                               \
+                                          dtype* work,                                       \
+                                          lapack_index_t lwork,                              \
+                                          lapack_index_t* iwork) {                           \
+    if (lwork != -1) {                                                                       \
+      return LAPACKE_##prefix##gesdd(matrix_layout, 'O', m, n, a, lda, s, u, ldu, vt, ldvt); \
+    }                                                                                        \
+    *work = 0;                                                                               \
+    return 0;                                                                                \
   }
-  MXNET_LAPACK_CWRAP_GESDD(s, float)
-  MXNET_LAPACK_CWRAP_GESDD(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GETRI(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##getri(int matrix_layout, lapack_index_t n, dtype *a, \
-                                          lapack_index_t lda, lapack_index_t *ipiv, \
-                                          dtype *work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
+MXNET_LAPACK_CWRAP_GESDD(s, float)
+MXNET_LAPACK_CWRAP_GESDD(d, double)
+
+#define MXNET_LAPACK_CWRAP_GETRI(prefix, dtype)                       \
+  inline int MXNET_LAPACK_##prefix##getri(int matrix_layout,          \
+                                          lapack_index_t n,           \
+                                          dtype* a,                   \
+                                          lapack_index_t lda,         \
+                                          lapack_index_t* ipiv,       \
+                                          dtype* work,                \
+                                          lapack_index_t lwork) {     \
+    if (lwork != -1) {                                                \
       return LAPACKE_##prefix##getri(matrix_layout, n, a, lda, ipiv); \
-    } \
-    *work = 0; \
-    return 0; \
+    }                                                                 \
+    *work = 0;                                                        \
+    return 0;                                                         \
   }
-  MXNET_LAPACK_CWRAP_GETRI(s, float)
-  MXNET_LAPACK_CWRAP_GETRI(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GEEV(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##geev(int matrix_layout, char jobvl, char jobvr, \
-                                         lapack_index_t n, dtype *a, lapack_index_t lda, \
-                                         dtype *wr, dtype *wi, \
-                                         dtype *vl, lapack_index_t ldvl, dtype *vr, \
-                                         lapack_index_t ldvr, \
-                                         dtype *work, lapack_index_t lwork) { \
-    if (lwork != -1) { \
-      return LAPACKE_##prefix##geev(matrix_layout, jobvl, jobvr, \
-                                    n, a, lda, wr, wi, vl, ldvl, vr, ldvr); \
-    } \
-    *work = 0; \
-    return 0; \
+MXNET_LAPACK_CWRAP_GETRI(s, float)
+MXNET_LAPACK_CWRAP_GETRI(d, double)
+
+#define MXNET_LAPACK_CWRAP_GEEV(prefix, dtype)                                 \
+  inline int MXNET_LAPACK_##prefix##geev(int matrix_layout,                    \
+                                         char jobvl,                           \
+                                         char jobvr,                           \
+                                         lapack_index_t n,                     \
+                                         dtype* a,                             \
+                                         lapack_index_t lda,                   \
+                                         dtype* wr,                            \
+                                         dtype* wi,                            \
+                                         dtype* vl,                            \
+                                         lapack_index_t ldvl,                  \
+                                         dtype* vr,                            \
+                                         lapack_index_t ldvr,                  \
+                                         dtype* work,                          \
+                                         lapack_index_t lwork) {               \
+    if (lwork != -1) {                                                         \
+      return LAPACKE_##prefix##geev(                                           \
+          matrix_layout, jobvl, jobvr, n, a, lda, wr, wi, vl, ldvl, vr, ldvr); \
+    }                                                                          \
+    *work = 0;                                                                 \
+    return 0;                                                                  \
   }
-  MXNET_LAPACK_CWRAP_GEEV(s, float)
-  MXNET_LAPACK_CWRAP_GEEV(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GELSD(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gelsd(int matrix_layout, lapack_index_t m, lapack_index_t n, \
-                                          lapack_index_t nrhs, dtype *a, lapack_index_t lda, \
-                                          dtype *b, lapack_index_t ldb, dtype *s, dtype rcond, \
-                                          lapack_index_t *rank, dtype *work, lapack_index_t lwork, \
-                                          lapack_index_t *iwork) { \
-    if (lwork != -1) { \
-      return LAPACKE_##prefix##gelsd(matrix_layout, m, n, nrhs, a, lda, b, ldb, \
-                                     s, rcond, rank); \
-    } \
-    *work = 0; \
-    *iwork = 0; \
-    return 0; \
+MXNET_LAPACK_CWRAP_GEEV(s, float)
+MXNET_LAPACK_CWRAP_GEEV(d, double)
+
+#define MXNET_LAPACK_CWRAP_GELSD(prefix, dtype)                                                  \
+  inline int MXNET_LAPACK_##prefix##gelsd(int matrix_layout,                                     \
+                                          lapack_index_t m,                                      \
+                                          lapack_index_t n,                                      \
+                                          lapack_index_t nrhs,                                   \
+                                          dtype* a,                                              \
+                                          lapack_index_t lda,                                    \
+                                          dtype* b,                                              \
+                                          lapack_index_t ldb,                                    \
+                                          dtype* s,                                              \
+                                          dtype rcond,                                           \
+                                          lapack_index_t* rank,                                  \
+                                          dtype* work,                                           \
+                                          lapack_index_t lwork,                                  \
+                                          lapack_index_t* iwork) {                               \
+    if (lwork != -1) {                                                                           \
+      return LAPACKE_##prefix##gelsd(matrix_layout, m, n, nrhs, a, lda, b, ldb, s, rcond, rank); \
+    }                                                                                            \
+    *work  = 0;                                                                                  \
+    *iwork = 0;                                                                                  \
+    return 0;                                                                                    \
   }
-  MXNET_LAPACK_CWRAP_GELSD(s, float)
-  MXNET_LAPACK_CWRAP_GELSD(d, double)
+MXNET_LAPACK_CWRAP_GELSD(s, float)
+MXNET_LAPACK_CWRAP_GELSD(d, double)
 
 #elif MXNET_USE_LAPACK
 
-  #define MXNET_LAPACK_ROW_MAJOR 101
-  #define MXNET_LAPACK_COL_MAJOR 102
-
-  // These functions can be called with either row- or col-major format.
-  #define MXNET_LAPACK_CWRAPPER1(func, dtype) \
-  inline int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype *a, int lda) { \
-    CHECK_LAPACK_UPLO(uplo); \
-    char o(loup(uplo, (matrix_layout == MXNET_LAPACK_ROW_MAJOR))); \
-    int ret(0); \
-    func##_(&o, &n, a, &lda, &ret); \
-    return ret; \
+#define MXNET_LAPACK_ROW_MAJOR 101
+#define MXNET_LAPACK_COL_MAJOR 102
+
+// These functions can be called with either row- or col-major format.
+#define MXNET_LAPACK_CWRAPPER1(func, dtype)                                                \
+  inline int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype* a, int lda) { \
+    CHECK_LAPACK_UPLO(uplo);                                                               \
+    char o(loup(uplo, (matrix_layout == MXNET_LAPACK_ROW_MAJOR)));                         \
+    int ret(0);                                                                            \
+    func##_(&o, &n, a, &lda, &ret);                                                        \
+    return ret;                                                                            \
   }
-  MXNET_LAPACK_CWRAPPER1(spotrf, float)
-  MXNET_LAPACK_CWRAPPER1(dpotrf, double)
-  MXNET_LAPACK_CWRAPPER1(spotri, float)
-  MXNET_LAPACK_CWRAPPER1(dpotri, double)
-
-  inline int mxnet_lapack_sposv(int matrix_layout, char uplo, int n, int nrhs,
-    float *a, int lda, float *b, int ldb) {
-    int info;
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {
-      // Transpose b to b_t of shape (nrhs, n)
-      float *b_t = new float[nrhs * n];
-      flip<cpu, float>(n, nrhs, b_t, n, b, ldb);
-      sposv_(&uplo, &n, &nrhs, a, &lda, b_t, &n, &info);
-      flip<cpu, float>(nrhs, n, b, ldb, b_t, n);
-      delete [] b_t;
-      return info;
-    }
-    sposv_(&uplo, &n, &nrhs, a, &lda, b, &ldb, &info);
+MXNET_LAPACK_CWRAPPER1(spotrf, float)
+MXNET_LAPACK_CWRAPPER1(dpotrf, double)
+MXNET_LAPACK_CWRAPPER1(spotri, float)
+MXNET_LAPACK_CWRAPPER1(dpotri, double)
+
+inline int mxnet_lapack_sposv(int matrix_layout,
+                              char uplo,
+                              int n,
+                              int nrhs,
+                              float* a,
+                              int lda,
+                              float* b,
+                              int ldb) {
+  int info;
+  if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {
+    // Transpose b to b_t of shape (nrhs, n)
+    float* b_t = new float[nrhs * n];
+    flip<cpu, float>(n, nrhs, b_t, n, b, ldb);
+    sposv_(&uplo, &n, &nrhs, a, &lda, b_t, &n, &info);
+    flip<cpu, float>(nrhs, n, b, ldb, b_t, n);
+    delete[] b_t;
     return info;
   }
+  sposv_(&uplo, &n, &nrhs, a, &lda, b, &ldb, &info);
+  return info;
+}
 
-  inline int mxnet_lapack_dposv(int matrix_layout, char uplo, int n, int nrhs,
-    double *a, int lda, double *b, int ldb) {
-    int info;
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {
-      // Transpose b to b_t of shape (nrhs, n)
-      double *b_t = new double[nrhs * n];
-      flip<cpu, double>(n, nrhs, b_t, n, b, ldb);
-      dposv_(&uplo, &n, &nrhs, a, &lda, b_t, &n, &info);
-      flip<cpu, double>(nrhs, n, b, ldb, b_t, n);
-      delete [] b_t;
-      return info;
-    }
-    dposv_(&uplo, &n, &nrhs, a, &lda, b, &ldb, &info);
+inline int mxnet_lapack_dposv(int matrix_layout,
+                              char uplo,
+                              int n,
+                              int nrhs,
+                              double* a,
+                              int lda,
+                              double* b,
+                              int ldb) {
+  int info;
+  if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {
+    // Transpose b to b_t of shape (nrhs, n)
+    double* b_t = new double[nrhs * n];
+    flip<cpu, double>(n, nrhs, b_t, n, b, ldb);
+    dposv_(&uplo, &n, &nrhs, a, &lda, b_t, &n, &info);
+    flip<cpu, double>(nrhs, n, b, ldb, b_t, n);
+    delete[] b_t;
     return info;
   }
+  dposv_(&uplo, &n, &nrhs, a, &lda, b, &ldb, &info);
+  return info;
+}
 
-  // Note: Both MXNET_LAPACK_*gelqf, MXNET_LAPACK_*orglq can only be called with
-  // row-major format (MXNet). Internally, the QR variants are done in column-major.
-  // In particular, the matrix dimensions m and n are flipped.
-  #define MXNET_LAPACK_CWRAP_GELQF(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gelqf(int matrix_layout, int m, int n, \
-                                          dtype *a, int lda, dtype* tau, \
-                                          dtype* work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
-      int info(0); \
-      prefix##geqrf_(&n, &m, a, &lda, tau, work, &lwork, &info); \
-      return info; \
-    } else { \
+// Note: Both MXNET_LAPACK_*gelqf, MXNET_LAPACK_*orglq can only be called with
+// row-major format (MXNet). Internally, the QR variants are done in column-major.
+// In particular, the matrix dimensions m and n are flipped.
+#define MXNET_LAPACK_CWRAP_GELQF(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##gelqf(                                                         \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork) {    \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                 \
+      int info(0);                                                                                 \
+      prefix##geqrf_(&n, &m, a, &lda, tau, work, &lwork, &info);                                   \
+      return info;                                                                                 \
+    } else {                                                                                       \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "gelqf implemented for row-major layout only"; \
-      return 1; \
-    } \
+      return 1;                                                                                    \
+    }                                                                                              \
   }
-  MXNET_LAPACK_CWRAP_GELQF(s, float)
-  MXNET_LAPACK_CWRAP_GELQF(d, double)
-
-  // Note: The k argument (rank) is equal to m as well
-  #define MXNET_LAPACK_CWRAP_ORGLQ(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##orglq(int matrix_layout, int m, int n, \
-                                          dtype *a, int lda, dtype* tau, \
-                                          dtype* work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
-      int info(0); \
-      prefix##orgqr_(&n, &m, &m, a, &lda, tau, work, &lwork, &info);    \
-      return info; \
-    } else { \
+MXNET_LAPACK_CWRAP_GELQF(s, float)
+MXNET_LAPACK_CWRAP_GELQF(d, double)
+
+// Note: The k argument (rank) is equal to m as well
+#define MXNET_LAPACK_CWRAP_ORGLQ(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##orglq(                                                         \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork) {    \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                 \
+      int info(0);                                                                                 \
+      prefix##orgqr_(&n, &m, &m, a, &lda, tau, work, &lwork, &info);                               \
+      return info;                                                                                 \
+    } else {                                                                                       \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "orglq implemented for row-major layout only"; \
-      return 1; \
-    } \
+      return 1;                                                                                    \
+    }                                                                                              \
   }
-  MXNET_LAPACK_CWRAP_ORGLQ(s, float)
-  MXNET_LAPACK_CWRAP_ORGLQ(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GEQRF(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##geqrf(int matrix_layout, int m, int n, \
-                                          dtype *a, int lda, dtype* tau, \
-                                          dtype* work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+MXNET_LAPACK_CWRAP_ORGLQ(s, float)
+MXNET_LAPACK_CWRAP_ORGLQ(d, double)
+
+#define MXNET_LAPACK_CWRAP_GEQRF(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##geqrf(                                                         \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork) {    \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                 \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "geqrf implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##geqrf_(&m, &n, a, &lda, tau, work, &lwork, &info); \
-      return info; \
-    } \
+      return 1;                                                                                    \
+    } else {                                                                                       \
+      int info(0);                                                                                 \
+      prefix##geqrf_(&m, &n, a, &lda, tau, work, &lwork, &info);                                   \
+      return info;                                                                                 \
+    }                                                                                              \
   }
-  MXNET_LAPACK_CWRAP_GEQRF(s, float)
-  MXNET_LAPACK_CWRAP_GEQRF(d, double)
-
-  #define MXNET_LAPACK_CWRAP_ORGQR(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##orgqr(int matrix_layout, int m, int n, int k, \
-                                          dtype *a, int lda, dtype* tau, \
-                                          dtype* work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+MXNET_LAPACK_CWRAP_GEQRF(s, float)
+MXNET_LAPACK_CWRAP_GEQRF(d, double)
+
+#define MXNET_LAPACK_CWRAP_ORGQR(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##orgqr(int matrix_layout,                                       \
+                                          int m,                                                   \
+                                          int n,                                                   \
+                                          int k,                                                   \
+                                          dtype* a,                                                \
+                                          int lda,                                                 \
+                                          dtype* tau,                                              \
+                                          dtype* work,                                             \
+                                          int lwork) {                                             \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                 \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "orgqr implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##orgqr_(&m, &n, &k, a, &lda, tau, work, &lwork, &info); \
-      return info; \
-    } \
+      return 1;                                                                                    \
+    } else {                                                                                       \
+      int info(0);                                                                                 \
+      prefix##orgqr_(&m, &n, &k, a, &lda, tau, work, &lwork, &info);                               \
+      return info;                                                                                 \
+    }                                                                                              \
   }
-  MXNET_LAPACK_CWRAP_ORGQR(s, float)
-  MXNET_LAPACK_CWRAP_ORGQR(d, double)
-
-  // Note: Supports row-major format only. Internally, column-major is used, so all
-  // inputs/outputs are flipped (in particular, uplo is flipped).
-  #define MXNET_LAPACK_CWRAP_SYEVD(func, dtype) \
-  inline int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype *a, \
-                                 int lda, dtype *w, dtype *work, int lwork, \
-                                 int *iwork, int liwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
-      int info(0); \
-      char jobz('V'); \
-      char uplo_(loup(uplo, true)); \
-      func##_(&jobz, &uplo_, &n, a, &lda, w, work, &lwork, iwork, &liwork, &info); \
-      return info; \
-    } else { \
+MXNET_LAPACK_CWRAP_ORGQR(s, float)
+MXNET_LAPACK_CWRAP_ORGQR(d, double)
+
+// Note: Supports row-major format only. Internally, column-major is used, so all
+// inputs/outputs are flipped (in particular, uplo is flipped).
+#define MXNET_LAPACK_CWRAP_SYEVD(func, dtype)                                               \
+  inline int MXNET_LAPACK_##func(int matrix_layout,                                         \
+                                 char uplo,                                                 \
+                                 int n,                                                     \
+                                 dtype* a,                                                  \
+                                 int lda,                                                   \
+                                 dtype* w,                                                  \
+                                 dtype* work,                                               \
+                                 int lwork,                                                 \
+                                 int* iwork,                                                \
+                                 int liwork) {                                              \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                          \
+      int info(0);                                                                          \
+      char jobz('V');                                                                       \
+      char uplo_(loup(uplo, true));                                                         \
+      func##_(&jobz, &uplo_, &n, a, &lda, w, work, &lwork, iwork, &liwork, &info);          \
+      return info;                                                                          \
+    } else {                                                                                \
       CHECK(false) << "MXNET_LAPACK_" << #func << " implemented for row-major layout only"; \
-      return 1; \
-    } \
+      return 1;                                                                             \
+    }                                                                                       \
   }
-  MXNET_LAPACK_CWRAP_SYEVD(ssyevd, float)
-  MXNET_LAPACK_CWRAP_SYEVD(dsyevd, double)
-
-  // Note: Supports row-major format only. Internally, column-major is used, so all
-  // inputs/outputs are flipped and transposed. m and n are flipped as well.
-  #define MXNET_LAPACK_CWRAP_GESVD(func, dtype) \
-  inline int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* ut, \
-                                 int ldut, dtype* s, dtype* v, int ldv, \
-                                 dtype* work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
-      int info(0); \
-      char jobu('O'); \
-      char jobvt('S'); \
-      func##_(&jobu, &jobvt, &n, &m, v, &ldv, s, v, &ldv, ut, &ldut, work, &lwork, &info); \
-      return info; \
-    } else { \
+MXNET_LAPACK_CWRAP_SYEVD(ssyevd, float)
+MXNET_LAPACK_CWRAP_SYEVD(dsyevd, double)
+
+// Note: Supports row-major format only. Internally, column-major is used, so all
+// inputs/outputs are flipped and transposed. m and n are flipped as well.
+#define MXNET_LAPACK_CWRAP_GESVD(func, dtype)                                               \
+  inline int MXNET_LAPACK_##func(int matrix_layout,                                         \
+                                 int m,                                                     \
+                                 int n,                                                     \
+                                 dtype* ut,                                                 \
+                                 int ldut,                                                  \
+                                 dtype* s,                                                  \
+                                 dtype* v,                                                  \
+                                 int ldv,                                                   \
+                                 dtype* work,                                               \
+                                 int lwork) {                                               \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                          \
+      int info(0);                                                                          \
+      char jobu('O');                                                                       \
+      char jobvt('S');                                                                      \
+      func##_(&jobu, &jobvt, &n, &m, v, &ldv, s, v, &ldv, ut, &ldut, work, &lwork, &info);  \
+      return info;                                                                          \
+    } else {                                                                                \
       CHECK(false) << "MXNET_LAPACK_" << #func << " implemented for row-major layout only"; \
-      return 1; \
-    } \
+      return 1;                                                                             \
+    }                                                                                       \
   }
-  MXNET_LAPACK_CWRAP_GESVD(sgesvd, float)
-  MXNET_LAPACK_CWRAP_GESVD(dgesvd, double)
-
-  #define MXNET_LAPACK_CWRAP_GESDD(func, dtype) \
-  inline int MXNET_LAPACK_##func(int matrix_layout, int m, int n, \
-                                 dtype *a, int lda, dtype *s, \
-                                 dtype *u, int ldu, \
-                                 dtype *vt, int ldvt, \
-                                 dtype *work, int lwork, int *iwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+MXNET_LAPACK_CWRAP_GESVD(sgesvd, float)
+MXNET_LAPACK_CWRAP_GESVD(dgesvd, double)
+
+#define MXNET_LAPACK_CWRAP_GESDD(func, dtype)                                               \
+  inline int MXNET_LAPACK_##func(int matrix_layout,                                         \
+                                 int m,                                                     \
+                                 int n,                                                     \
+                                 dtype* a,                                                  \
+                                 int lda,                                                   \
+                                 dtype* s,                                                  \
+                                 dtype* u,                                                  \
+                                 int ldu,                                                   \
+                                 dtype* vt,                                                 \
+                                 int ldvt,                                                  \
+                                 dtype* work,                                               \
+                                 int lwork,                                                 \
+                                 int* iwork) {                                              \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                          \
       CHECK(false) << "MXNET_LAPACK_" << #func << " implemented for row-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      char jobz('O'); \
-      func##_(&jobz, &m, &n, a, &lda, s, u, &ldu, vt, &ldvt, work, &lwork, iwork, &info); \
-      return info; \
-    } \
+      return 1;                                                                             \
+    } else {                                                                                \
+      int info(0);                                                                          \
+      char jobz('O');                                                                       \
+      func##_(&jobz, &m, &n, a, &lda, s, u, &ldu, vt, &ldvt, work, &lwork, iwork, &info);   \
+      return info;                                                                          \
+    }                                                                                       \
   }
-  MXNET_LAPACK_CWRAP_GESDD(sgesdd, float)
-  MXNET_LAPACK_CWRAP_GESDD(dgesdd, double)
-
-  #define MXNET_LAPACK_CWRAP_GEEV(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##geev(int matrix_layout, char jobvl, char jobvr, \
-                                         int n, dtype *a, int lda, \
-                                         dtype *wr, dtype *wi, \
-                                         dtype *vl, int ldvl, dtype *vr, int ldvr, \
-                                         dtype *work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+MXNET_LAPACK_CWRAP_GESDD(sgesdd, float)
+MXNET_LAPACK_CWRAP_GESDD(dgesdd, double)
+
+#define MXNET_LAPACK_CWRAP_GEEV(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##geev(int matrix_layout,                                       \
+                                         char jobvl,                                              \
+                                         char jobvr,                                              \
+                                         int n,                                                   \
+                                         dtype* a,                                                \
+                                         int lda,                                                 \
+                                         dtype* wr,                                               \
+                                         dtype* wi,                                               \
+                                         dtype* vl,                                               \
+                                         int ldvl,                                                \
+                                         dtype* vr,                                               \
+                                         int ldvr,                                                \
+                                         dtype* work,                                             \
+                                         int lwork) {                                             \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "geev implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##geev_(&jobvl, &jobvr, \
-                    &n, a, &lda, wr, wi, vl, &ldvl, vr, &ldvr, work, &lwork, &info); \
-      return info; \
-    } \
+      return 1;                                                                                   \
+    } else {                                                                                      \
+      int info(0);                                                                                \
+      prefix##geev_(                                                                              \
+          &jobvl, &jobvr, &n, a, &lda, wr, wi, vl, &ldvl, vr, &ldvr, work, &lwork, &info);        \
+      return info;                                                                                \
+    }                                                                                             \
   }
-  MXNET_LAPACK_CWRAP_GEEV(s, float)
-  MXNET_LAPACK_CWRAP_GEEV(d, double)
+MXNET_LAPACK_CWRAP_GEEV(s, float)
+MXNET_LAPACK_CWRAP_GEEV(d, double)
 
-  #define MXNET_LAPACK
+#define MXNET_LAPACK
 
-  // Note: Both MXNET_LAPACK_*getrf, MXNET_LAPACK_*getri can only be called with col-major format
-  // (MXNet) for performance.
-  #define MXNET_LAPACK_CWRAP_GETRF(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##getrf(int matrix_layout, int m, int n, \
-                                          dtype *a, int lda, int *ipiv) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+// Note: Both MXNET_LAPACK_*getrf, MXNET_LAPACK_*getri can only be called with col-major format
+// (MXNet) for performance.
+#define MXNET_LAPACK_CWRAP_GETRF(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##getrf(                                                         \
+      int matrix_layout, int m, int n, dtype* a, int lda, int* ipiv) {                             \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                 \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "getri implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##getrf_(&m, &n, a, &lda, ipiv, &info); \
-      return info; \
-    } \
+      return 1;                                                                                    \
+    } else {                                                                                       \
+      int info(0);                                                                                 \
+      prefix##getrf_(&m, &n, a, &lda, ipiv, &info);                                                \
+      return info;                                                                                 \
+    }                                                                                              \
   }
-  MXNET_LAPACK_CWRAP_GETRF(s, float)
-  MXNET_LAPACK_CWRAP_GETRF(d, double)
+MXNET_LAPACK_CWRAP_GETRF(s, float)
+MXNET_LAPACK_CWRAP_GETRF(d, double)
 
-  #define MXNET_LAPACK_CWRAP_GETRI(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##getri(int matrix_layout, int n, dtype *a, int lda, \
-                                          int *ipiv, dtype *work, int lwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+#define MXNET_LAPACK_CWRAP_GETRI(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##getri(                                                         \
+      int matrix_layout, int n, dtype* a, int lda, int* ipiv, dtype* work, int lwork) {            \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                 \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "getri implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##getri_(&n, a, &lda, ipiv, work, &lwork, &info); \
-      return info; \
-    } \
+      return 1;                                                                                    \
+    } else {                                                                                       \
+      int info(0);                                                                                 \
+      prefix##getri_(&n, a, &lda, ipiv, work, &lwork, &info);                                      \
+      return info;                                                                                 \
+    }                                                                                              \
   }
-  MXNET_LAPACK_CWRAP_GETRI(s, float)
-  MXNET_LAPACK_CWRAP_GETRI(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GESV(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gesv(int matrix_layout, \
-                                         int n, int nrhs, dtype *a, int lda, \
-                                         int *ipiv, dtype *b, int ldb) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+MXNET_LAPACK_CWRAP_GETRI(s, float)
+MXNET_LAPACK_CWRAP_GETRI(d, double)
+
+#define MXNET_LAPACK_CWRAP_GESV(prefix, dtype)                                                    \
+  inline int MXNET_LAPACK_##prefix##gesv(                                                         \
+      int matrix_layout, int n, int nrhs, dtype* a, int lda, int* ipiv, dtype* b, int ldb) {      \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "gesv implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##gesv_(&n, &nrhs, a, &lda, ipiv, b, &ldb, &info); \
-      return info; \
-    } \
+      return 1;                                                                                   \
+    } else {                                                                                      \
+      int info(0);                                                                                \
+      prefix##gesv_(&n, &nrhs, a, &lda, ipiv, b, &ldb, &info);                                    \
+      return info;                                                                                \
+    }                                                                                             \
   }
-  MXNET_LAPACK_CWRAP_GESV(s, float)
-  MXNET_LAPACK_CWRAP_GESV(d, double)
-
-  #define MXNET_LAPACK_CWRAP_GELSD(prefix, dtype) \
-  inline int MXNET_LAPACK_##prefix##gelsd(int matrix_layout, int m, int n, int nrhs, \
-                                          dtype *a, int lda, dtype *b, int ldb, \
-                                          dtype *s, dtype rcond, int *rank, \
-                                          dtype *work, int lwork, int *iwork) { \
-    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) { \
+MXNET_LAPACK_CWRAP_GESV(s, float)
+MXNET_LAPACK_CWRAP_GESV(d, double)
+
+#define MXNET_LAPACK_CWRAP_GELSD(prefix, dtype)                                                   \
+  inline int MXNET_LAPACK_##prefix##gelsd(int matrix_layout,                                      \
+                                          int m,                                                  \
+                                          int n,                                                  \
+                                          int nrhs,                                               \
+                                          dtype* a,                                               \
+                                          int lda,                                                \
+                                          dtype* b,                                               \
+                                          int ldb,                                                \
+                                          dtype* s,                                               \
+                                          dtype rcond,                                            \
+                                          int* rank,                                              \
+                                          dtype* work,                                            \
+                                          int lwork,                                              \
+                                          int* iwork) {                                           \
+    if (matrix_layout == MXNET_LAPACK_ROW_MAJOR) {                                                \
       CHECK(false) << "MXNET_LAPACK_" << #prefix << "gesv implemented for col-major layout only"; \
-      return 1; \
-    } else { \
-      int info(0); \
-      prefix##gelsd_(&m, &n, &nrhs, a, &lda, b, &ldb, s, &rcond, rank, \
-                     work, &lwork, iwork, &info); \
-      return info; \
-    } \
+      return 1;                                                                                   \
+    } else {                                                                                      \
+      int info(0);                                                                                \
+      prefix##gelsd_(                                                                             \
+          &m, &n, &nrhs, a, &lda, b, &ldb, s, &rcond, rank, work, &lwork, iwork, &info);          \
+      return info;                                                                                \
+    }                                                                                             \
   }
-  MXNET_LAPACK_CWRAP_GELSD(s, float)
-  MXNET_LAPACK_CWRAP_GELSD(d, double)
+MXNET_LAPACK_CWRAP_GELSD(s, float)
+MXNET_LAPACK_CWRAP_GELSD(d, double)
 
 #else
 
-  #define MXNET_LAPACK_ROW_MAJOR 101
-  #define MXNET_LAPACK_COL_MAJOR 102
+#define MXNET_LAPACK_ROW_MAJOR 101
+#define MXNET_LAPACK_COL_MAJOR 102
 
-  // Define compilable stubs.
-  #define MXNET_LAPACK_CWRAPPER1(func, dtype) \
+// Define compilable stubs.
+#define MXNET_LAPACK_CWRAPPER1(func, dtype) \
   int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype* a, int lda);
 
-  #define MXNET_LAPACK_CWRAPPER2(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* a, \
-                          int lda, dtype* tau, dtype* work, int lwork);
-
-  #define MXNET_LAPACK_CWRAPPER3(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, char uplo, int n, dtype *a, \
-                          int lda, dtype *w, dtype *work, int lwork, \
-                          int *iwork, int liwork);
-
-  #define MXNET_LAPACK_CWRAPPER4(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, \
-                          dtype *a, int lda, int *ipiv);
-
-  #define MXNET_LAPACK_CWRAPPER5(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int n, dtype *a, int lda, \
-                          int *ipiv, dtype *work, int lwork);
-
-  #define MXNET_LAPACK_CWRAPPER6(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* ut, \
-                          int ldut, dtype* s, dtype* v, int ldv, \
-                          dtype* work, int lwork);
-
-  #define MXNET_LAPACK_CWRAPPER7(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_order, int n, int nrhs, dtype *a, \
-                          int lda, int *ipiv, dtype *b, int ldb); \
-
-  #define MXNET_LAPACK_CWRAPPER8(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, char jobvl, char jobvr, \
-                          int n, dtype *a, int lda, \
-                          dtype *wr, dtype *wi, \
-                          dtype *vl, int ldvl, dtype *vr, int ldvr, \
-                          dtype *work, int lwork); \
-
-  #define MXNET_LAPACK_CWRAPPER9(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, \
-                          dtype *a, int lda, dtype *s, \
-                          dtype *u, int ldu, \
-                          dtype *vt, int ldvt, \
-                          dtype *work, int lwork, int *iwork);
-
-  #define MXNET_LAPACK_CWRAPPER10(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* a, \
-                          int lda, dtype* tau, dtype* work, int lwork);
-
-  #define MXNET_LAPACK_CWRAPPER11(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, int nrhs, \
-                          dtype *a, int lda, dtype *b, int ldb, \
-                          dtype *s, dtype rcond, int *rank, \
-                          dtype *work, int lwork, int *iwork);
-
-  #define MXNET_LAPACK_CWRAPPER12(func, dtype) \
-  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, int k, dtype* a, \
-                          int lda, dtype* tau, dtype* work, int lwork);
-
-  #define MXNET_LAPACK_UNAVAILABLE(func) \
-  int mxnet_lapack_##func(...);
-  MXNET_LAPACK_CWRAPPER1(spotrf, float)
-  MXNET_LAPACK_CWRAPPER1(dpotrf, double)
-  MXNET_LAPACK_CWRAPPER1(spotri, float)
-  MXNET_LAPACK_CWRAPPER1(dpotri, double)
-
-  MXNET_LAPACK_UNAVAILABLE(sposv)
-  MXNET_LAPACK_UNAVAILABLE(dposv)
-
-  MXNET_LAPACK_CWRAPPER2(sgelqf, float)
-  MXNET_LAPACK_CWRAPPER2(dgelqf, double)
-  MXNET_LAPACK_CWRAPPER2(sorglq, float)
-  MXNET_LAPACK_CWRAPPER2(dorglq, double)
-
-  MXNET_LAPACK_CWRAPPER3(ssyevd, float)
-  MXNET_LAPACK_CWRAPPER3(dsyevd, double)
-
-  MXNET_LAPACK_CWRAPPER4(sgetrf, float)
-  MXNET_LAPACK_CWRAPPER4(dgetrf, double)
-
-  MXNET_LAPACK_CWRAPPER5(sgetri, float)
-  MXNET_LAPACK_CWRAPPER5(dgetri, double)
-
-  MXNET_LAPACK_CWRAPPER6(sgesvd, float)
-  MXNET_LAPACK_CWRAPPER6(dgesvd, double)
-
-  MXNET_LAPACK_CWRAPPER7(sgesv, float)
-  MXNET_LAPACK_CWRAPPER7(dgesv, double)
-
-  MXNET_LAPACK_CWRAPPER8(sgeev, float)
-  MXNET_LAPACK_CWRAPPER8(dgeev, double)
-
-  MXNET_LAPACK_CWRAPPER9(sgesdd, float)
-  MXNET_LAPACK_CWRAPPER9(dgesdd, double)
-
-  MXNET_LAPACK_CWRAPPER10(sgeqrf, float)
-  MXNET_LAPACK_CWRAPPER10(dgeqrf, double)
-
-  MXNET_LAPACK_CWRAPPER11(sgelsd, float)
-  MXNET_LAPACK_CWRAPPER11(dgelsd, double)
-
-  MXNET_LAPACK_CWRAPPER12(sorgqr, float)
-  MXNET_LAPACK_CWRAPPER12(dorgqr, double)
-
-  #undef MXNET_LAPACK_CWRAPPER1
-  #undef MXNET_LAPACK_CWRAPPER2
-  #undef MXNET_LAPACK_CWRAPPER3
-  #undef MXNET_LAPACK_CWRAPPER4
-  #undef MXNET_LAPACK_UNAVAILABLE
+#define MXNET_LAPACK_CWRAPPER2(func, dtype) \
+  int MXNET_LAPACK_##func(                  \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork);
+
+#define MXNET_LAPACK_CWRAPPER3(func, dtype)  \
+  int MXNET_LAPACK_##func(int matrix_layout, \
+                          char uplo,         \
+                          int n,             \
+                          dtype* a,          \
+                          int lda,           \
+                          dtype* w,          \
+                          dtype* work,       \
+                          int lwork,         \
+                          int* iwork,        \
+                          int liwork);
+
+#define MXNET_LAPACK_CWRAPPER4(func, dtype) \
+  int MXNET_LAPACK_##func(int matrix_layout, int m, int n, dtype* a, int lda, int* ipiv);
+
+#define MXNET_LAPACK_CWRAPPER5(func, dtype) \
+  int MXNET_LAPACK_##func(                  \
+      int matrix_layout, int n, dtype* a, int lda, int* ipiv, dtype* work, int lwork);
+
+#define MXNET_LAPACK_CWRAPPER6(func, dtype)  \
+  int MXNET_LAPACK_##func(int matrix_layout, \
+                          int m,             \
+                          int n,             \
+                          dtype* ut,         \
+                          int ldut,          \
+                          dtype* s,          \
+                          dtype* v,          \
+                          int ldv,           \
+                          dtype* work,       \
+                          int lwork);
+
+#define MXNET_LAPACK_CWRAPPER7(func, dtype) \
+  int MXNET_LAPACK_##func(                  \
+      int matrix_order, int n, int nrhs, dtype* a, int lda, int* ipiv, dtype* b, int ldb);
+
+#define MXNET_LAPACK_CWRAPPER8(func, dtype)  \
+  int MXNET_LAPACK_##func(int matrix_layout, \
+                          char jobvl,        \
+                          char jobvr,        \
+                          int n,             \
+                          dtype* a,          \
+                          int lda,           \
+                          dtype* wr,         \
+                          dtype* wi,         \
+                          dtype* vl,         \
+                          int ldvl,          \
+                          dtype* vr,         \
+                          int ldvr,          \
+                          dtype* work,       \
+                          int lwork);
+
+#define MXNET_LAPACK_CWRAPPER9(func, dtype)  \
+  int MXNET_LAPACK_##func(int matrix_layout, \
+                          int m,             \
+                          int n,             \
+                          dtype* a,          \
+                          int lda,           \
+                          dtype* s,          \
+                          dtype* u,          \
+                          int ldu,           \
+                          dtype* vt,         \
+                          int ldvt,          \
+                          dtype* work,       \
+                          int lwork,         \
+                          int* iwork);
+
+#define MXNET_LAPACK_CWRAPPER10(func, dtype) \
+  int MXNET_LAPACK_##func(                   \
+      int matrix_layout, int m, int n, dtype* a, int lda, dtype* tau, dtype* work, int lwork);
+
+#define MXNET_LAPACK_CWRAPPER11(func, dtype) \
+  int MXNET_LAPACK_##func(int matrix_layout, \
+                          int m,             \
+                          int n,             \
+                          int nrhs,          \
+                          dtype* a,          \
+                          int lda,           \
+                          dtype* b,          \
+                          int ldb,           \
+                          dtype* s,          \
+                          dtype rcond,       \
+                          int* rank,         \
+                          dtype* work,       \
+                          int lwork,         \
+                          int* iwork);
+
+#define MXNET_LAPACK_CWRAPPER12(func, dtype) \
+  int MXNET_LAPACK_##func(int matrix_layout, \
+                          int m,             \
+                          int n,             \
+                          int k,             \
+                          dtype* a,          \
+                          int lda,           \
+                          dtype* tau,        \
+                          dtype* work,       \
+                          int lwork);
+
+#define MXNET_LAPACK_UNAVAILABLE(func) int mxnet_lapack_##func(...);
+MXNET_LAPACK_CWRAPPER1(spotrf, float)
+MXNET_LAPACK_CWRAPPER1(dpotrf, double)
+MXNET_LAPACK_CWRAPPER1(spotri, float)
+MXNET_LAPACK_CWRAPPER1(dpotri, double)
+
+MXNET_LAPACK_UNAVAILABLE(sposv)
+MXNET_LAPACK_UNAVAILABLE(dposv)
+
+MXNET_LAPACK_CWRAPPER2(sgelqf, float)
+MXNET_LAPACK_CWRAPPER2(dgelqf, double)
+MXNET_LAPACK_CWRAPPER2(sorglq, float)
+MXNET_LAPACK_CWRAPPER2(dorglq, double)
+
+MXNET_LAPACK_CWRAPPER3(ssyevd, float)
+MXNET_LAPACK_CWRAPPER3(dsyevd, double)
+
+MXNET_LAPACK_CWRAPPER4(sgetrf, float)
+MXNET_LAPACK_CWRAPPER4(dgetrf, double)
+
+MXNET_LAPACK_CWRAPPER5(sgetri, float)
+MXNET_LAPACK_CWRAPPER5(dgetri, double)
+
+MXNET_LAPACK_CWRAPPER6(sgesvd, float)
+MXNET_LAPACK_CWRAPPER6(dgesvd, double)
+
+MXNET_LAPACK_CWRAPPER7(sgesv, float)
+MXNET_LAPACK_CWRAPPER7(dgesv, double)
+
+MXNET_LAPACK_CWRAPPER8(sgeev, float)
+MXNET_LAPACK_CWRAPPER8(dgeev, double)
+
+MXNET_LAPACK_CWRAPPER9(sgesdd, float)
+MXNET_LAPACK_CWRAPPER9(dgesdd, double)
+
+MXNET_LAPACK_CWRAPPER10(sgeqrf, float)
+MXNET_LAPACK_CWRAPPER10(dgeqrf, double)
+
+MXNET_LAPACK_CWRAPPER11(sgelsd, float)
+MXNET_LAPACK_CWRAPPER11(dgelsd, double)
+
+MXNET_LAPACK_CWRAPPER12(sorgqr, float)
+MXNET_LAPACK_CWRAPPER12(dorgqr, double)
+
+#undef MXNET_LAPACK_CWRAPPER1
+#undef MXNET_LAPACK_CWRAPPER2
+#undef MXNET_LAPACK_CWRAPPER3
+#undef MXNET_LAPACK_CWRAPPER4
+#undef MXNET_LAPACK_UNAVAILABLE
 #endif
 
 template <typename DType>
-inline int MXNET_LAPACK_posv(int matrix_layout, char uplo, int n, int nrhs,
-  DType *a, int lda, DType *b, int ldb);
+inline int MXNET_LAPACK_posv(int matrix_layout,
+                             char uplo,
+                             int n,
+                             int nrhs,
+                             DType* a,
+                             int lda,
+                             DType* b,
+                             int ldb);
 
 template <>
-inline int MXNET_LAPACK_posv<float>(int matrix_layout, char uplo, int n,
-  int nrhs, float *a, int lda, float *b, int ldb) {
+inline int MXNET_LAPACK_posv<float>(int matrix_layout,
+                                    char uplo,
+                                    int n,
+                                    int nrhs,
+                                    float* a,
+                                    int lda,
+                                    float* b,
+                                    int ldb) {
   return mxnet_lapack_sposv(matrix_layout, uplo, n, nrhs, a, lda, b, ldb);
 }
 
 template <>
-inline int MXNET_LAPACK_posv<double>(int matrix_layout, char uplo, int n,
-  int nrhs, double *a, int lda, double *b, int ldb) {
+inline int MXNET_LAPACK_posv<double>(int matrix_layout,
+                                     char uplo,
+                                     int n,
+                                     int nrhs,
+                                     double* a,
+                                     int lda,
+                                     double* b,
+                                     int ldb) {
   return mxnet_lapack_dposv(matrix_layout, uplo, n, nrhs, a, lda, b, ldb);
 }
 
diff --git a/src/operator/channel_op_common.h b/src/operator/channel_op_common.h
index 43f689d2defa..64ff16e1e749 100644
--- a/src/operator/channel_op_common.h
+++ b/src/operator/channel_op_common.h
@@ -22,7 +22,7 @@
  * \file channel_op_common.h
  * \brief common function used for concat and split channel
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_CHANNEL_OP_COMMON_H_
 #define MXNET_OPERATOR_CHANNEL_OP_COMMON_H_
 #include <dmlc/logging.h>
@@ -33,20 +33,22 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu, int dim, int cdim, typename DType>
-inline void concatenate_helper(const std::vector<mshadow::Tensor<xpu, dim, DType> > &input,
-                               mshadow::Tensor<xpu, dim, DType> *output, const int dimension,
+template <typename xpu, int dim, int cdim, typename DType>
+inline void concatenate_helper(const std::vector<mshadow::Tensor<xpu, dim, DType> >& input,
+                               mshadow::Tensor<xpu, dim, DType>* output,
+                               const int dimension,
                                const OpReqType req) {
   using mshadow::expr::concat;
   using mshadow::expr::slice;
 
   if (dimension == cdim) {
     mshadow::Tensor<xpu, dim, DType> out = *output;
-    size_t size = input.size();
-    index_t begin = 0;
+    size_t size                          = input.size();
+    index_t begin                        = 0;
     for (size_t i = 0; i < size; ++i) {
       // If input[i] is a zero-size tensor, do nothing.
-      if (input[i].shape_.Size() == 0) continue;
+      if (input[i].shape_.Size() == 0)
+        continue;
       index_t end = begin + input[i].size(cdim);
       Assign(slice<cdim>(out, begin, end), req, input[i]);
       begin = end;
@@ -56,34 +58,36 @@ inline void concatenate_helper(const std::vector<mshadow::Tensor<xpu, dim, DType
   }
 }
 
-template<typename xpu, int dim, typename DType>
-inline void Concatenate(const std::vector<mshadow::Tensor<xpu, dim, DType> > &input,
-                        mshadow::Tensor<xpu, dim, DType> *output, const int dimension,
+template <typename xpu, int dim, typename DType>
+inline void Concatenate(const std::vector<mshadow::Tensor<xpu, dim, DType> >& input,
+                        mshadow::Tensor<xpu, dim, DType>* output,
+                        const int dimension,
                         const OpReqType req) {
   if (dimension < 0) {
     LOG(FATAL) << "dimension (" << dimension << ") must be greater than 0";
   } else if (dimension >= dim) {
     LOG(FATAL) << "dimension (" << dimension << ") must be smaller than dim (" << dim << ")";
   } else {
-    concatenate_helper<xpu, dim, dim-1>(input, output, dimension, req);
+    concatenate_helper<xpu, dim, dim - 1>(input, output, dimension, req);
   }
 }
 
-
-template<typename xpu, int dim, int cdim, typename DType>
-void split_helper(const mshadow::Tensor<xpu, dim, DType> &input,
-           std::vector<mshadow::Tensor<xpu, dim, DType> > *output,
-           const int dimension, const std::vector<OpReqType> &req) {
+template <typename xpu, int dim, int cdim, typename DType>
+void split_helper(const mshadow::Tensor<xpu, dim, DType>& input,
+                  std::vector<mshadow::Tensor<xpu, dim, DType> >* output,
+                  const int dimension,
+                  const std::vector<OpReqType>& req) {
   using mshadow::expr::concat;
   using mshadow::expr::slice;
 
   if (dimension == cdim) {
     std::vector<mshadow::Tensor<xpu, dim, DType> > out = *output;
-    size_t size = out.size();
-    index_t begin = 0;
+    size_t size                                        = out.size();
+    index_t begin                                      = 0;
     for (size_t i = 0; i < size; ++i) {
       // If out[i] is a zero-size tensor, do nothing.
-      if (out[i].shape_.Size() == 0) continue;
+      if (out[i].shape_.Size() == 0)
+        continue;
       index_t end = begin + out[i].size(cdim);
       Assign(out[i], req[i], slice<cdim>(input, begin, end));
       begin = end;
@@ -93,16 +97,17 @@ void split_helper(const mshadow::Tensor<xpu, dim, DType> &input,
   }
 }
 
-template<typename xpu, int dim, typename DType>
-void Split(const mshadow::Tensor<xpu, dim, DType> &input,
-           std::vector<mshadow::Tensor<xpu, dim, DType> > *output,
-           const int dimension, const std::vector<OpReqType> &req) {
+template <typename xpu, int dim, typename DType>
+void Split(const mshadow::Tensor<xpu, dim, DType>& input,
+           std::vector<mshadow::Tensor<xpu, dim, DType> >* output,
+           const int dimension,
+           const std::vector<OpReqType>& req) {
   if (dimension < 0) {
     LOG(FATAL) << "dimension (" << dimension << ") must be greater than 0";
   } else if (dimension >= dim) {
     LOG(FATAL) << "dimension (" << dimension << ") must be smaller than dim (" << dim << ")";
   } else {
-    split_helper<xpu, dim, dim-1>(input, output, dimension, req);
+    split_helper<xpu, dim, dim - 1>(input, output, dimension, req);
   }
 }
 }  // namespace op
diff --git a/src/operator/contrib/adabelief-inl.h b/src/operator/contrib/adabelief-inl.h
index 2f282158e4ce..3f403fd55ae8 100644
--- a/src/operator/contrib/adabelief-inl.h
+++ b/src/operator/contrib/adabelief-inl.h
@@ -43,29 +43,24 @@ struct AdaBeliefParam : public dmlc::Parameter<AdaBeliefParam> {
   float eta;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(AdaBeliefParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("The decay rate for the 1st moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("The decay rate for the 2nd moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(eta)
-    .describe("Learning rate schedule multiplier");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "The decay rate for the 1st moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "The decay rate for the 2nd moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(eta).describe("Learning rate schedule multiplier");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
@@ -73,10 +68,10 @@ struct AdaBeliefParam : public dmlc::Parameter<AdaBeliefParam> {
 // n_in = 2: weight, grad (fp16)
 // n_out = 1: weight (fp16)
 // total_in = 6: weight, grad, mean, var, weight32, rescale_grad (fp32)
-template<int n_in, int n_out, int total_in>
+template <int n_in, int n_out, int total_in>
 inline bool MPUpdateInferShape(const nnvm::NodeAttrs& attrs,
-                               mxnet::ShapeVector *in_attrs,
-                               mxnet::ShapeVector *out_attrs) {
+                               mxnet::ShapeVector* in_attrs,
+                               mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), static_cast<size_t>(total_in)) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   SHAPE_ASSIGN_CHECK(*in_attrs, total_in - 1, mxnet::TShape());
@@ -85,10 +80,10 @@ inline bool MPUpdateInferShape(const nnvm::NodeAttrs& attrs,
       attrs, in_attrs, out_attrs, mxnet::TShape());
 }
 
-template<int n_in, int n_out, int total_in>
+template <int n_in, int n_out, int total_in>
 inline bool MPUpdateInferType(const nnvm::NodeAttrs& attrs,
-                              std::vector<int> *in_attrs,
-                              std::vector<int> *out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), static_cast<size_t>(total_in)) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   for (int i = n_in; i < total_in; ++i) {
@@ -98,56 +93,77 @@ inline bool MPUpdateInferType(const nnvm::NodeAttrs& attrs,
       attrs, in_attrs, out_attrs, -1);
 }
 
-template<int req>
+template <int req>
 struct MPAdaBeliefKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, float* mean_data,
-    float* var_data, const DType* weight_data, const DType* grad_data, float* weight32,
-    const float param_clip_gradient, const float param_beta1, const float param_beta2,
-    const float param_eta, const float param_lr, const float param_wd,
-    const float param_rescale_grad, const float param_epsilon) {
-    float w = weight32[i];
-    float scaled_grad = param_rescale_grad*static_cast<float>(grad_data[i]);
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  float* mean_data,
+                                  float* var_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  float* weight32,
+                                  const float param_clip_gradient,
+                                  const float param_beta1,
+                                  const float param_beta2,
+                                  const float param_eta,
+                                  const float param_lr,
+                                  const float param_wd,
+                                  const float param_rescale_grad,
+                                  const float param_epsilon) {
+    float w           = weight32[i];
+    float scaled_grad = param_rescale_grad * static_cast<float>(grad_data[i]);
     scaled_grad += param_wd * w;
     if (param_clip_gradient >= 0.f)
       scaled_grad = mshadow_op::clip::Map(scaled_grad, param_clip_gradient);
 
     const float mean = param_beta1 * (mean_data[i] - scaled_grad) + scaled_grad;
-    const float adj = mshadow_op::square::Map(scaled_grad - mean);
-    const float var = param_beta2*(var_data[i] - adj) + adj + param_epsilon;
+    const float adj  = mshadow_op::square::Map(scaled_grad - mean);
+    const float var  = param_beta2 * (var_data[i] - adj) + adj + param_epsilon;
 
     w -= param_eta * (param_lr * mean / (mshadow_op::square_root::Map(var) + param_epsilon));
     mean_data[i] = mean;
-    var_data[i] = var;
-    weight32[i] = w;
+    var_data[i]  = var;
+    weight32[i]  = w;
     KERNEL_ASSIGN(out_data[i], req, w);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct MPAdaBeliefUpdate {
   static inline void Forward(const nnvm::NodeAttrs& attrs,
-               const OpContext &ctx,
-               const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &outputs,
-               const float rescale_grad) {
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs,
+                             const float rescale_grad) {
     using namespace mxnet_op;
     const auto& param = nnvm::get<AdaBeliefParam>(attrs.parsed);
-    Stream<xpu>* s = ctx.get_stream<xpu>();
+    Stream<xpu>* s    = ctx.get_stream<xpu>();
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, float> mean = inputs[2].FlatTo2D<xpu, float>(s);
-      Tensor<xpu, 2, float> var = inputs[3].FlatTo2D<xpu, float>(s);
+      Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> grad     = inputs[1].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, float> mean     = inputs[2].FlatTo2D<xpu, float>(s);
+      Tensor<xpu, 2, float> var      = inputs[3].FlatTo2D<xpu, float>(s);
       Tensor<xpu, 2, float> weight32 = inputs[4].FlatTo2D<xpu, float>(s);
-      Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> out      = outputs[0].FlatTo2D<xpu, DType>(s);
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<MPAdaBeliefKernel<req_type>, xpu>::Launch(
-            s, weight.shape_.Size(), out.dptr_, mean.dptr_, var.dptr_,
-            weight.dptr_, grad.dptr_, weight32.dptr_,
-            param.clip_gradient, param.beta1, param.beta2, param.eta,
-            param.lr, param.wd, rescale_grad, param.epsilon);
+        Kernel<MPAdaBeliefKernel<req_type>, xpu>::Launch(s,
+                                                         weight.shape_.Size(),
+                                                         out.dptr_,
+                                                         mean.dptr_,
+                                                         var.dptr_,
+                                                         weight.dptr_,
+                                                         grad.dptr_,
+                                                         weight32.dptr_,
+                                                         param.clip_gradient,
+                                                         param.beta1,
+                                                         param.beta2,
+                                                         param.eta,
+                                                         param.lr,
+                                                         param.wd,
+                                                         rescale_grad,
+                                                         param.epsilon);
       });
     });
   }
@@ -157,39 +173,40 @@ struct MPAdaBeliefUpdate {
  * \brief adabelief update.
  *
  */
-template<typename xpu>
+template <typename xpu>
 struct AdaBeliefUpdate {
   static inline void Forward(const nnvm::NodeAttrs& attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs,
                              const float rescale_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     using namespace mshadow_op;
-    const auto &param = nnvm::get<AdaBeliefParam>(attrs.parsed);
-    Stream<xpu>* s = ctx.get_stream<xpu>();
+    const auto& param = nnvm::get<AdaBeliefParam>(attrs.parsed);
+    Stream<xpu>* s    = ctx.get_stream<xpu>();
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      const Tensor<xpu, 2, DType> &weight = inputs[0].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> mean = inputs[2].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> var = inputs[3].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
+      const Tensor<xpu, 2, DType>& weight = inputs[0].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> grad          = inputs[1].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> mean          = inputs[2].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> var           = inputs[3].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> out           = outputs[0].FlatTo2D<xpu, DType>(s);
 
       grad = scalar<DType>(rescale_grad) * grad + scalar<DType>(param.wd) * weight;
       if (param.clip_gradient >= 0.0f)
         grad = F<clip>(grad, DType(param.clip_gradient));
 
-      mean = scalar<DType>(param.beta1) * mean + scalar<DType>(1.f-param.beta1) * grad;
-      var = scalar<DType>(param.beta2) * var +
-            scalar<DType>(1.f-param.beta2) * F<square>(grad - mean) +
+      mean = scalar<DType>(param.beta1) * mean + scalar<DType>(1.f - param.beta1) * grad;
+      var  = scalar<DType>(param.beta2) * var +
+            scalar<DType>(1.f - param.beta2) * F<square>(grad - mean) +
             scalar<DType>(param.epsilon);
 
-      Assign(out, req[0],
+      Assign(out,
+             req[0],
              weight -
-             scalar<DType>(param.eta) * (scalar<DType>(param.lr) *
-             mean / (F<square_root>(var) + scalar<DType>(param.epsilon))));
+                 scalar<DType>(param.eta) * (scalar<DType>(param.lr) * mean /
+                                             (F<square_root>(var) + scalar<DType>(param.epsilon))));
     });
   }
 };
@@ -207,62 +224,55 @@ struct MultiAdaBeliefParam : public dmlc::Parameter<MultiAdaBeliefParam> {
   float clip_gradient;
   int num_weights;
   DMLC_DECLARE_PARAMETER(MultiAdaBeliefParam) {
-    DMLC_DECLARE_FIELD(lrs)
-    .describe("Learning rates");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("The decay rate for the 1st moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("The decay rate for the 2nd moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wds)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(etas)
-    .describe("Learning rates schedule multiplier");
+    DMLC_DECLARE_FIELD(lrs).describe("Learning rates");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "The decay rate for the 1st moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "The decay rate for the 2nd moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wds).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(etas).describe("Learning rates schedule multiplier");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(num_weights)
-    .set_default(1)
-    .describe("Number of updated weights.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(num_weights).set_default(1).describe("Number of updated weights.");
   }
 };
 
-
-template<typename ParamType, int input_stride>
+template <typename ParamType, int input_stride>
 inline bool MP_MultiAdaBelief_InferShape(const nnvm::NodeAttrs& attrs,
-                                          mxnet::ShapeVector *in_attrs,
-                                          mxnet::ShapeVector *out_attrs) {
+                                         mxnet::ShapeVector* in_attrs,
+                                         mxnet::ShapeVector* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
-  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights +1);
+  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights + 1);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_shapes = *in_attrs;
+  bool all_inferred   = true;
+  auto& input_shapes  = *in_attrs;
   auto& output_shapes = *out_attrs;
 
   // Learning rates
   CHECK_EQ(param.lrs.ndim(), param.num_weights)
-    << "Number of learning rates is inconsistent with num_weights "
-    << "parameter passed. Expected number of learning rates: "
-    << param.num_weights << ", and got " << param.lrs.ndim();
+      << "Number of learning rates is inconsistent with num_weights "
+      << "parameter passed. Expected number of learning rates: " << param.num_weights
+      << ", and got " << param.lrs.ndim();
   // Weight decays
   CHECK_EQ(param.wds.ndim(), param.num_weights)
-    << "Number of weight decays is inconsistent with num_weights "
-    << "parameter passed. Expected number of weight decays: "
-    << param.num_weights << ", and got " << param.wds.ndim();
+      << "Number of weight decays is inconsistent with num_weights "
+      << "parameter passed. Expected number of weight decays: " << param.num_weights << ", and got "
+      << param.wds.ndim();
   // Learning rates schedule multiplier
   CHECK_EQ(param.etas.ndim(), param.num_weights)
-    << "Number of learning rates schedule multiplier is inconsistent with num_weights "
-    << "parameter passed. Expected number of learning rates schedule multiplier: "
-    << param.num_weights << ", and got " << param.lrs.ndim();
+      << "Number of learning rates schedule multiplier is inconsistent with num_weights "
+      << "parameter passed. Expected number of learning rates schedule multiplier: "
+      << param.num_weights << ", and got " << param.lrs.ndim();
 
   // Weights, gradients, mean and variance
   for (int i = 0; i < param.num_weights; ++i) {
@@ -274,20 +284,20 @@ inline bool MP_MultiAdaBelief_InferShape(const nnvm::NodeAttrs& attrs,
     all_inferred = all_inferred && ElemwiseShape<input_stride, 1>(attrs, &input_vec, &output_vec);
   }
 
-  SHAPE_ASSIGN_CHECK(*in_attrs, param.num_weights*input_stride, mxnet::TShape());
+  SHAPE_ASSIGN_CHECK(*in_attrs, param.num_weights * input_stride, mxnet::TShape());
   return all_inferred;
 }
 
 template <typename ParamType, int input_stride, int num_fp32_inputs>
 inline bool MP_MultiAdaBelief_InferType(const nnvm::NodeAttrs& attrs,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                        std::vector<int>* in_attrs,
+                                        std::vector<int>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
-  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights +1);
+  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights + 1);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_types = *in_attrs;
+  bool all_inferred  = true;
+  auto& input_types  = *in_attrs;
   auto& output_types = *out_attrs;
 
   // Weights, gradients,
@@ -297,13 +307,13 @@ inline bool MP_MultiAdaBelief_InferType(const nnvm::NodeAttrs& attrs,
     for (int j = 0; j < input_stride - 2 - num_fp32_inputs; ++j) {
       input_vec.push_back(input_types[i * input_stride + j]);
     }
-    all_inferred = all_inferred &&
-            ElemwiseType<input_stride - 2 - num_fp32_inputs, 1>(attrs, &input_vec, &output_vec);
+    all_inferred = all_inferred && ElemwiseType<input_stride - 2 - num_fp32_inputs, 1>(
+                                       attrs, &input_vec, &output_vec);
   }
   // mean, var
   for (int i = 0; i < param.num_weights; ++i) {
-    TYPE_ASSIGN_CHECK(input_types, input_stride * i +2, mshadow::kFloat32);
-    TYPE_ASSIGN_CHECK(input_types, input_stride * i +3, mshadow::kFloat32);
+    TYPE_ASSIGN_CHECK(input_types, input_stride * i + 2, mshadow::kFloat32);
+    TYPE_ASSIGN_CHECK(input_types, input_stride * i + 3, mshadow::kFloat32);
   }
 
   // master copies of weights
@@ -313,25 +323,23 @@ inline bool MP_MultiAdaBelief_InferType(const nnvm::NodeAttrs& attrs,
     }
   }
 
-  TYPE_ASSIGN_CHECK(input_types, param.num_weights*input_stride, mshadow::kFloat32);
+  TYPE_ASSIGN_CHECK(input_types, param.num_weights * input_stride, mshadow::kFloat32);
   return all_inferred;
 }
 
-
-template<typename T>
+template <typename T>
 class _type_identity {
  public:
   using type = T;
 };
 
-
-template<typename T>
+template <typename T>
 class _single_precision {
  public:
   using type = float;
 };
 
-template<typename DType, typename MPDType>
+template <typename DType, typename MPDType>
 struct MultiKernelParam {
   static const int N = 50;
   int count;
@@ -352,30 +360,32 @@ struct MultiKernelParam {
   MPDType epsilon;
 };
 
-template<typename MPDType, bool has_mixed_precision>
+template <typename MPDType, bool has_mixed_precision>
 struct MultiMPAdaBeliefKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const MultiKernelParam<DType, MPDType>& param,
-                                  const OpReqType req, const float rescale_grad) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const MultiKernelParam<DType, MPDType>& param,
+                                  const OpReqType req,
+                                  const float rescale_grad) {
     for (int index = 0; index < param.count; ++index) {
       if ((size_t)i < param.sizes[index]) {
-        MPDType w = has_mixed_precision ? param.weights32[index][i]:
-                                          MPDType(param.weights[index][i]);
-        MPDType scaled_grad = static_cast<MPDType>(rescale_grad)*
-                              static_cast<MPDType>(param.grad_data[index][i]);
+        MPDType w =
+            has_mixed_precision ? param.weights32[index][i] : MPDType(param.weights[index][i]);
+        MPDType scaled_grad =
+            static_cast<MPDType>(rescale_grad) * static_cast<MPDType>(param.grad_data[index][i]);
 
         scaled_grad += param.wds[index] * w;
         if (param.clip_gradient >= 0.f)
           scaled_grad = mshadow_op::clip::Map(scaled_grad, param.clip_gradient);
 
         const auto mean = param.beta1 * (param.mean_data[index][i] - scaled_grad) + scaled_grad;
-        const auto adj = mshadow_op::square::Map(mean - scaled_grad);
-        const auto var = param.beta2 * (param.var_data[index][i] - adj) + adj + param.epsilon;
+        const auto adj  = mshadow_op::square::Map(mean - scaled_grad);
+        const auto var  = param.beta2 * (param.var_data[index][i] - adj) + adj + param.epsilon;
 
         param.mean_data[index][i] = mean;
-        param.var_data[index][i] = var;
-        w = w - param.etas[index] * (param.lrs[index] *
-            mean / (mshadow_op::square_root::Map(var) + param.epsilon));
+        param.var_data[index][i]  = var;
+        w                         = w - param.etas[index] *
+                    (param.lrs[index] * mean / (mshadow_op::square_root::Map(var) + param.epsilon));
         if (has_mixed_precision)
           param.weights32[index][i] = w;
 
@@ -385,34 +395,34 @@ struct MultiMPAdaBeliefKernel {
   }
 };
 
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         typename ParamType = MultiAdaBeliefParam,
-         int input_stride = 4>
+template <typename xpu,
+          typename DType,
+          typename MPDType,
+          typename ParamType = MultiAdaBeliefParam,
+          int input_stride   = 4>
 void FillMultiKernelParam(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<TBlob> &outputs,
-                              MultiKernelParam<DType, MPDType> *pParam) {
-  const ParamType& p = nnvm::get<ParamType>(attrs.parsed);
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<TBlob>& outputs,
+                          MultiKernelParam<DType, MPDType>* pParam) {
+  const ParamType& p       = nnvm::get<ParamType>(attrs.parsed);
   mxnet_op::Stream<xpu>* s = ctx.get_stream<xpu>();
-  pParam->clip_gradient = p.clip_gradient;
-  pParam->beta1 = p.beta1;
-  pParam->beta2 = p.beta2;
+  pParam->clip_gradient    = p.clip_gradient;
+  pParam->beta1            = p.beta1;
+  pParam->beta2            = p.beta2;
 
   pParam->epsilon = p.epsilon;
 
-  pParam->count = p.num_weights;
-  pParam->max_size = 0;
+  pParam->count         = p.num_weights;
+  pParam->max_size      = 0;
   constexpr bool isSame = std::is_same<DType, MPDType>::value;
   for (int i = 0; i < pParam->count; ++i) {
-    const auto idx = i * input_stride;
+    const auto idx   = i * input_stride;
     pParam->sizes[i] = inputs[idx].shape_.Size();
     if (pParam->max_size < pParam->sizes[i])
       pParam->max_size = pParam->sizes[i];
 
-    pParam->weights[i] = inputs[idx].FlatTo2D<xpu, DType>(s).dptr_;
+    pParam->weights[i]   = inputs[idx].FlatTo2D<xpu, DType>(s).dptr_;
     pParam->grad_data[i] = inputs[idx + 1].FlatTo2D<xpu, DType>(s).dptr_;
     pParam->mean_data[i] = inputs[idx + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
     pParam->var_data[i]  = inputs[idx + 3].FlatTo2D<xpu, MPDType>(s).dptr_;
@@ -428,34 +438,34 @@ void FillMultiKernelParam(const nnvm::NodeAttrs& attrs,
   memcpy(pParam->wds, p.wds.begin(), pParam->count * sizeof(p.wds[0]));
 }
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 static inline void MultiAdaBeliefUpdate(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<TBlob> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<TBlob> &outputs,
-                                    const float rescale_grad) {
+                                        const OpContext& ctx,
+                                        const std::vector<TBlob>& inputs,
+                                        const std::vector<OpReqType>& req,
+                                        const std::vector<TBlob>& outputs,
+                                        const float rescale_grad) {
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     MultiKernelParam<DType, MPDType> param;
-    FillMultiKernelParam<xpu, DType, MPDType, MultiAdaBeliefParam, input_stride>
-            (attrs, ctx, inputs, outputs, &param);
+    FillMultiKernelParam<xpu, DType, MPDType, MultiAdaBeliefParam, input_stride>(
+        attrs, ctx, inputs, outputs, &param);
 
-    Kernel<MultiMPAdaBeliefKernel<MPDType, !std::is_same<DType, MPDType>::value>, xpu>::
-                              Launch(s, param.max_size, param, req[0], rescale_grad);
+    Kernel<MultiMPAdaBeliefKernel<MPDType, !std::is_same<DType, MPDType>::value>, xpu>::Launch(
+        s, param.max_size, param, req[0], rescale_grad);
   });
 }
 
-template<typename xpu>
-void GetScaleFloat(mshadow::Stream<xpu> *s, const TBlob &scale_blob, float *pScalef);
+template <typename xpu>
+void GetScaleFloat(mshadow::Stream<xpu>* s, const TBlob& scale_blob, float* pScalef);
 
-template<typename xpu>
-bool PrepareInputBlobs(const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       std::vector<TBlob> *inputs_wo_scale,
-                       float *pScalef) {
+template <typename xpu>
+bool PrepareInputBlobs(const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       std::vector<TBlob>* inputs_wo_scale,
+                       float* pScalef) {
   const size_t num_in = inputs.size() - 1;
   adabelief::GetScaleFloat<xpu>(ctx.get_stream<xpu>(), inputs[num_in], pScalef);
   if (!std::isfinite(*pScalef) || *pScalef == 0)
@@ -468,12 +478,12 @@ bool PrepareInputBlobs(const OpContext &ctx,
   return true;
 }
 
-template<typename xpu, class F>
+template <typename xpu, class F>
 inline void MPUpdate(const nnvm::NodeAttrs& attrs,
-                     const OpContext &ctx,
-                     const std::vector<TBlob> &inputs,
-                     const std::vector<OpReqType> &req,
-                     const std::vector<TBlob> &outputs) {
+                     const OpContext& ctx,
+                     const std::vector<TBlob>& inputs,
+                     const std::vector<OpReqType>& req,
+                     const std::vector<TBlob>& outputs) {
   std::vector<TBlob> inputs_wo_scale;
   float scalef;
   if (!PrepareInputBlobs<xpu>(ctx, inputs, &inputs_wo_scale, &scalef))
@@ -482,23 +492,22 @@ inline void MPUpdate(const nnvm::NodeAttrs& attrs,
   F::Forward(attrs, ctx, inputs_wo_scale, req, outputs, scalef);
 }
 
-template<typename xpu, bool MP>
+template <typename xpu, bool MP>
 inline void multiMPUpdate(const nnvm::NodeAttrs& attrs,
-                          const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   std::vector<TBlob> inputs_wo_scale;
   float scalef;
   if (!PrepareInputBlobs<xpu>(ctx, inputs, &inputs_wo_scale, &scalef))
     return;
 
   if (!MP)
-    MultiAdaBeliefUpdate<xpu, _type_identity, 4>
-      (attrs, ctx, inputs_wo_scale, req, outputs, scalef);
+    MultiAdaBeliefUpdate<xpu, _type_identity, 4>(attrs, ctx, inputs_wo_scale, req, outputs, scalef);
   else
-    MultiAdaBeliefUpdate<xpu, _single_precision, 5>
-      (attrs, ctx, inputs_wo_scale, req, outputs, scalef);
+    MultiAdaBeliefUpdate<xpu, _single_precision, 5>(
+        attrs, ctx, inputs_wo_scale, req, outputs, scalef);
 }
 
 }  // namespace adabelief
diff --git a/src/operator/contrib/adabelief.cc b/src/operator/contrib/adabelief.cc
index 06be7480f8a7..fe86a4a7ad30 100644
--- a/src/operator/contrib/adabelief.cc
+++ b/src/operator/contrib/adabelief.cc
@@ -33,7 +33,7 @@ DMLC_REGISTER_PARAMETER(AdaBeliefParam);
 DMLC_REGISTER_PARAMETER(MultiAdaBeliefParam);
 
 NNVM_REGISTER_OP(_mp_adabelief_update)
-.describe(R"code(Update function for multi-precision AdaBelief optimizer.
+    .describe(R"code(Update function for multi-precision AdaBelief optimizer.
 
 AdaBelief is seen as a modification of Adam with a different variance 
 estimator.
@@ -57,28 +57,29 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 )code" ADD_FILELINE)
-.set_num_inputs(6)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AdaBeliefParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<2, 1, 6>)
-.set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<2, 1, 6>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3, 4};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MPUpdate<cpu, MPAdaBeliefUpdate<cpu>>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_argument("rescale_grad", "NDArray-or-Symbol",
-              "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
-              "the update is skipped.")
-.add_arguments(AdaBeliefParam::__FIELDS__());
+    .set_num_inputs(6)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AdaBeliefParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<2, 1, 6>)
+    .set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<2, 1, 6>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3, 4};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MPUpdate<cpu, MPAdaBeliefUpdate<cpu>>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_argument("rescale_grad",
+                  "NDArray-or-Symbol",
+                  "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
+                  "the update is skipped.")
+    .add_arguments(AdaBeliefParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_adabelief_update)
-.describe(R"code(Update function for AdaBelief optimizer.
+    .describe(R"code(Update function for AdaBelief optimizer.
 
 AdaBelief is seen as a modification of Adam with a different variance 
 estimator.
@@ -102,34 +103,35 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 ))code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AdaBeliefParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<4, 1, 5>)
-.set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<4, 1, 5>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MPUpdate<cpu, AdaBeliefUpdate<cpu>>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_argument("rescale_grad", "NDArray-or-Symbol",
-              "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
-              "the update is skipped.")
-.add_arguments(AdaBeliefParam::__FIELDS__());
-
-template<>
-void GetScaleFloat<cpu>(mshadow::Stream<cpu> *s, const TBlob &scale_blob, float *pScalef) {
-  MSHADOW_REAL_TYPE_SWITCH(scale_blob.type_flag_, DType,
-    *pScalef = static_cast<float>(*scale_blob.dptr<DType>());
-  )
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AdaBeliefParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<4, 1, 5>)
+    .set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<4, 1, 5>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MPUpdate<cpu, AdaBeliefUpdate<cpu>>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_argument("rescale_grad",
+                  "NDArray-or-Symbol",
+                  "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
+                  "the update is skipped.")
+    .add_arguments(AdaBeliefParam::__FIELDS__());
+
+template <>
+void GetScaleFloat<cpu>(mshadow::Stream<cpu>* s, const TBlob& scale_blob, float* pScalef) {
+  MSHADOW_REAL_TYPE_SWITCH(
+      scale_blob.type_flag_, DType, *pScalef = static_cast<float>(*scale_blob.dptr<DType>());)
 }
 
-static std::vector<std::string>
-ParamToVector(uint32_t num_args, const char *pName[], size_t nParams) {
+static std::vector<std::string> ParamToVector(uint32_t num_args,
+                                              const char* pName[],
+                                              size_t nParams) {
   std::vector<std::string> ret;
   for (uint32_t i = 0; i < num_args; ++i) {
     const auto idx = std::to_string(i);
@@ -145,7 +147,7 @@ inline uint32_t num_weights(const nnvm::NodeAttrs& attrs) {
 }
 
 NNVM_REGISTER_OP(_multi_adabelief_update)
-.describe(R"code(Update function for AdaBelief optimizer.
+    .describe(R"code(Update function for AdaBelief optimizer.
 
 AdaBelief is seen as a modification of Adam with a different variance 
 estimator.
@@ -169,39 +171,37 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 ))code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs) * 4 + 1;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs);
-  })
-.set_attr_parser(ParamParser<MultiAdaBeliefParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MP_MultiAdaBelief_InferShape<MultiAdaBeliefParam, 4>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *paramName[] = {"weight_", "grad_", "mean_", "var_", "rescale_grad_"};
-    return ParamToVector(num_weights(attrs), paramName, sizeof(paramName)/sizeof(paramName[0]));
-  })
-// mutable: mean, var
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto iMax = num_weights(attrs);
-    for (size_t i = 0; i < iMax; ++i) {
-      ret.push_back(i * 4 + 2);
-      ret.push_back(i * 4 + 3);
-    }
-    return ret;
-  })
-
-.set_attr<FCompute>("FCompute<cpu>", multiMPUpdate<cpu, false>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiAdaBeliefParam::__FIELDS__());
-
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs) * 4 + 1; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs); })
+    .set_attr_parser(ParamParser<MultiAdaBeliefParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  MP_MultiAdaBelief_InferShape<MultiAdaBeliefParam, 4>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* paramName[] = {"weight_", "grad_", "mean_", "var_", "rescale_grad_"};
+          return ParamToVector(
+              num_weights(attrs), paramName, sizeof(paramName) / sizeof(paramName[0]));
+        })
+    // mutable: mean, var
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto iMax = num_weights(attrs);
+                                     for (size_t i = 0; i < iMax; ++i) {
+                                       ret.push_back(i * 4 + 2);
+                                       ret.push_back(i * 4 + 3);
+                                     }
+                                     return ret;
+                                   })
+
+    .set_attr<FCompute>("FCompute<cpu>", multiMPUpdate<cpu, false>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiAdaBeliefParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_multi_mp_adabelief_update)
-.describe(R"code(Update function for multi-precision AdaBelief optimizer.
+    .describe(R"code(Update function for multi-precision AdaBelief optimizer.
 
 AdaBelief is seen as a modification of Adam with a different variance 
 estimator.
@@ -225,36 +225,37 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 ))code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs) * 5 + 1;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs);
-  })
-.set_attr_parser(ParamParser<MultiAdaBeliefParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MP_MultiAdaBelief_InferShape<MultiAdaBeliefParam, 5>)
-.set_attr<nnvm::FInferType>("FInferType", MP_MultiAdaBelief_InferType<MultiAdaBeliefParam, 5, 1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *paramName[] = {"weight_", "grad_", "mean_", "var_", "weight32_", "rescale_grad_"};
-    return ParamToVector(num_weights(attrs), paramName, sizeof(paramName)/sizeof(paramName[0]));
-  })
-// mutable: mean, var, weights32
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto iMax = num_weights(attrs);
-    for (size_t i = 0; i < iMax; ++i) {
-      ret.push_back(i * 5 + 2);
-      ret.push_back(i * 5 + 3);
-      ret.push_back(i * 5 + 4);
-    }
-    return ret;
-  })
-
-.set_attr<FCompute>("FCompute<cpu>", multiMPUpdate<cpu, true>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiAdaBeliefParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs) * 5 + 1; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs); })
+    .set_attr_parser(ParamParser<MultiAdaBeliefParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  MP_MultiAdaBelief_InferShape<MultiAdaBeliefParam, 5>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                MP_MultiAdaBelief_InferType<MultiAdaBeliefParam, 5, 1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* paramName[] = {
+              "weight_", "grad_", "mean_", "var_", "weight32_", "rescale_grad_"};
+          return ParamToVector(
+              num_weights(attrs), paramName, sizeof(paramName) / sizeof(paramName[0]));
+        })
+    // mutable: mean, var, weights32
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto iMax = num_weights(attrs);
+                                     for (size_t i = 0; i < iMax; ++i) {
+                                       ret.push_back(i * 5 + 2);
+                                       ret.push_back(i * 5 + 3);
+                                       ret.push_back(i * 5 + 4);
+                                     }
+                                     return ret;
+                                   })
+
+    .set_attr<FCompute>("FCompute<cpu>", multiMPUpdate<cpu, true>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiAdaBeliefParam::__FIELDS__());
 
 }  // namespace adabelief
 }  // namespace op
diff --git a/src/operator/contrib/adabelief.cu b/src/operator/contrib/adabelief.cu
index e64dcb4ca006..aac63b9c6cf5 100644
--- a/src/operator/contrib/adabelief.cu
+++ b/src/operator/contrib/adabelief.cu
@@ -28,13 +28,13 @@
 namespace mxnet {
 namespace op {
 namespace adabelief {
-template<>
-void GetScaleFloat<gpu>(mshadow::Stream<gpu> *s, const TBlob &scale_blob, float *pScalef) {
+template <>
+void GetScaleFloat<gpu>(mshadow::Stream<gpu>* s, const TBlob& scale_blob, float* pScalef) {
   MSHADOW_REAL_TYPE_SWITCH(scale_blob.type_flag_, DType, {
-    DType scale = 0;
+    DType scale         = 0;
     cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-    CUDA_CALL(cudaMemcpyAsync(&scale, scale_blob.dptr<DType>(), sizeof(DType),
-                              cudaMemcpyDeviceToHost, stream));
+    CUDA_CALL(cudaMemcpyAsync(
+        &scale, scale_blob.dptr<DType>(), sizeof(DType), cudaMemcpyDeviceToHost, stream));
     CUDA_CALL(cudaStreamSynchronize(stream));
     *pScalef = static_cast<float>(scale);
   })
@@ -42,16 +42,17 @@ void GetScaleFloat<gpu>(mshadow::Stream<gpu> *s, const TBlob &scale_blob, float
 }  // namespace adabelief
 
 NNVM_REGISTER_OP(_adabelief_update)
-.set_attr<FCompute>("FCompute<gpu>", adabelief::MPUpdate<gpu, adabelief::AdaBeliefUpdate<gpu>>);
+    .set_attr<FCompute>("FCompute<gpu>", adabelief::MPUpdate<gpu, adabelief::AdaBeliefUpdate<gpu>>);
 
 NNVM_REGISTER_OP(_mp_adabelief_update)
-.set_attr<FCompute>("FCompute<gpu>", adabelief::MPUpdate<gpu, adabelief::MPAdaBeliefUpdate<gpu>>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        adabelief::MPUpdate<gpu, adabelief::MPAdaBeliefUpdate<gpu>>);
 
 NNVM_REGISTER_OP(_multi_adabelief_update)
-.set_attr<FCompute>("FCompute<gpu>", adabelief::multiMPUpdate<gpu, false>);
+    .set_attr<FCompute>("FCompute<gpu>", adabelief::multiMPUpdate<gpu, false>);
 
 NNVM_REGISTER_OP(_multi_mp_adabelief_update)
-.set_attr<FCompute>("FCompute<gpu>", adabelief::multiMPUpdate<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", adabelief::multiMPUpdate<gpu, true>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/adamw-inl.h b/src/operator/contrib/adamw-inl.h
index 56c5ea227862..cbeb0ef5eefd 100644
--- a/src/operator/contrib/adamw-inl.h
+++ b/src/operator/contrib/adamw-inl.h
@@ -43,29 +43,24 @@ struct AdamWParam : public dmlc::Parameter<AdamWParam> {
   float eta;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(AdamWParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("The decay rate for the 1st moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("The decay rate for the 2nd moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(eta)
-    .describe("Learning rate schedule multiplier");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "The decay rate for the 1st moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "The decay rate for the 2nd moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(eta).describe("Learning rate schedule multiplier");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
@@ -73,10 +68,10 @@ struct AdamWParam : public dmlc::Parameter<AdamWParam> {
 // n_in = 2: weight, grad (fp16)
 // n_out = 1: weight (fp16)
 // total_in = 6: weight, grad, mean, var, weight32, rescale_grad (fp32)
-template<int n_in, int n_out, int total_in>
+template <int n_in, int n_out, int total_in>
 inline bool MPUpdateInferShape(const nnvm::NodeAttrs& attrs,
-                               mxnet::ShapeVector *in_attrs,
-                               mxnet::ShapeVector *out_attrs) {
+                               mxnet::ShapeVector* in_attrs,
+                               mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), static_cast<size_t>(total_in)) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   SHAPE_ASSIGN_CHECK(*in_attrs, total_in - 1, mxnet::TShape());
@@ -85,10 +80,10 @@ inline bool MPUpdateInferShape(const nnvm::NodeAttrs& attrs,
       attrs, in_attrs, out_attrs, mxnet::TShape());
 }
 
-template<int n_in, int n_out, int total_in>
+template <int n_in, int n_out, int total_in>
 inline bool MPUpdateInferType(const nnvm::NodeAttrs& attrs,
-                              std::vector<int> *in_attrs,
-                              std::vector<int> *out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), static_cast<size_t>(total_in)) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   for (int i = n_in; i < total_in; ++i) {
@@ -98,52 +93,75 @@ inline bool MPUpdateInferType(const nnvm::NodeAttrs& attrs,
       attrs, in_attrs, out_attrs, -1);
 }
 
-template<int req>
+template <int req>
 struct MPAdamWKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, float* mean_data,
-    float* var_data, const DType* weight_data, const DType* grad_data, float* weight32,
-    const float param_clip_gradient, const float param_beta1, const float param_beta2,
-    const float param_eta, const float param_lr, const float param_wd,
-    const float param_rescale_grad, const float param_epsilon) {
-    float w = weight32[i];
-    float scaled_grad = param_rescale_grad*static_cast<float>(grad_data[i]);
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  float* mean_data,
+                                  float* var_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  float* weight32,
+                                  const float param_clip_gradient,
+                                  const float param_beta1,
+                                  const float param_beta2,
+                                  const float param_eta,
+                                  const float param_lr,
+                                  const float param_wd,
+                                  const float param_rescale_grad,
+                                  const float param_epsilon) {
+    float w           = weight32[i];
+    float scaled_grad = param_rescale_grad * static_cast<float>(grad_data[i]);
     if (param_clip_gradient >= 0.0f)
       scaled_grad = mshadow_op::clip::Map(scaled_grad, param_clip_gradient);
 
     float mean = mean_data[i] = param_beta1 * mean_data[i] + (1.0f - param_beta1) * scaled_grad;
-    float var = var_data[i] = param_beta2 * var_data[i] +
-                  (1.0f - param_beta2) * mshadow_op::square::Map(scaled_grad);
+    float var                 = var_data[i] =
+        param_beta2 * var_data[i] + (1.0f - param_beta2) * mshadow_op::square::Map(scaled_grad);
 
-    w -= param_eta * (param_lr * mean / (mshadow_op::square_root::Map(var) + param_epsilon)
-                         + param_wd * w);
+    w -= param_eta *
+         (param_lr * mean / (mshadow_op::square_root::Map(var) + param_epsilon) + param_wd * w);
     weight32[i] = w;
     KERNEL_ASSIGN(out_data[i], req, w);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct MPAdamWUpdate {
   static inline void Forward(const nnvm::NodeAttrs& attrs,
-               const OpContext &ctx,
-               const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &outputs,
-               const float rescale_grad) {
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs,
+                             const float rescale_grad) {
     using namespace mxnet_op;
     const auto& param = nnvm::get<AdamWParam>(attrs.parsed);
-    Stream<xpu>* s = ctx.get_stream<xpu>();
+    Stream<xpu>* s    = ctx.get_stream<xpu>();
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, float> mean = inputs[2].FlatTo2D<xpu, float>(s);
-      Tensor<xpu, 2, float> var = inputs[3].FlatTo2D<xpu, float>(s);
+      Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> grad     = inputs[1].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, float> mean     = inputs[2].FlatTo2D<xpu, float>(s);
+      Tensor<xpu, 2, float> var      = inputs[3].FlatTo2D<xpu, float>(s);
       Tensor<xpu, 2, float> weight32 = inputs[4].FlatTo2D<xpu, float>(s);
-      Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> out      = outputs[0].FlatTo2D<xpu, DType>(s);
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<MPAdamWKernel<req_type>, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, mean.dptr_,
-          var.dptr_, weight.dptr_, grad.dptr_, weight32.dptr_, param.clip_gradient, param.beta1,
-          param.beta2, param.eta, param.lr, param.wd, rescale_grad, param.epsilon);
+        Kernel<MPAdamWKernel<req_type>, xpu>::Launch(s,
+                                                     weight.shape_.Size(),
+                                                     out.dptr_,
+                                                     mean.dptr_,
+                                                     var.dptr_,
+                                                     weight.dptr_,
+                                                     grad.dptr_,
+                                                     weight32.dptr_,
+                                                     param.clip_gradient,
+                                                     param.beta1,
+                                                     param.beta2,
+                                                     param.eta,
+                                                     param.lr,
+                                                     param.wd,
+                                                     rescale_grad,
+                                                     param.epsilon);
       });
     });
   }
@@ -152,38 +170,39 @@ struct MPAdamWUpdate {
 /*
  * \brief adam_w update.
  */
-template<typename xpu>
+template <typename xpu>
 struct AdamWUpdate {
   static inline void Forward(const nnvm::NodeAttrs& attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs,
                              const float rescale_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     using namespace mshadow_op;
-    const auto &param = nnvm::get<AdamWParam>(attrs.parsed);
-    Stream<xpu>* s = ctx.get_stream<xpu>();
+    const auto& param = nnvm::get<AdamWParam>(attrs.parsed);
+    Stream<xpu>* s    = ctx.get_stream<xpu>();
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      const Tensor<xpu, 2, DType> &weight = inputs[0].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> mean = inputs[2].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> var = inputs[3].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
+      const Tensor<xpu, 2, DType>& weight = inputs[0].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> grad          = inputs[1].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> mean          = inputs[2].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> var           = inputs[3].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> out           = outputs[0].FlatTo2D<xpu, DType>(s);
 
       grad = scalar<DType>(rescale_grad) * grad;
       if (param.clip_gradient >= 0.0f)
         grad = F<clip>(grad, DType(param.clip_gradient));
 
-      mean = scalar<DType>(param.beta1) * mean + scalar<DType>(1.f-param.beta1) * grad;
-      var = scalar<DType>(param.beta2) * var + scalar<DType>(1.f-param.beta2) * F<square>(grad);
+      mean = scalar<DType>(param.beta1) * mean + scalar<DType>(1.f - param.beta1) * grad;
+      var  = scalar<DType>(param.beta2) * var + scalar<DType>(1.f - param.beta2) * F<square>(grad);
 
-      Assign(out, req[0],
-             weight -
-             scalar<DType>(param.eta) * (scalar<DType>(param.lr) *
-             mean / (F<square_root>(var) + scalar<DType>(param.epsilon)) +
-             (scalar<DType>(param.wd) * weight)));
+      Assign(out,
+             req[0],
+             weight - scalar<DType>(param.eta) *
+                          (scalar<DType>(param.lr) * mean /
+                               (F<square_root>(var) + scalar<DType>(param.epsilon)) +
+                           (scalar<DType>(param.wd) * weight)));
     });
   }
 };
@@ -201,62 +220,55 @@ struct MultiAdamWParam : public dmlc::Parameter<MultiAdamWParam> {
   float clip_gradient;
   int num_weights;
   DMLC_DECLARE_PARAMETER(MultiAdamWParam) {
-    DMLC_DECLARE_FIELD(lrs)
-    .describe("Learning rates");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("The decay rate for the 1st moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("The decay rate for the 2nd moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wds)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(etas)
-    .describe("Learning rates schedule multiplier");
+    DMLC_DECLARE_FIELD(lrs).describe("Learning rates");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "The decay rate for the 1st moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "The decay rate for the 2nd moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wds).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(etas).describe("Learning rates schedule multiplier");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(num_weights)
-    .set_default(1)
-    .describe("Number of updated weights.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(num_weights).set_default(1).describe("Number of updated weights.");
   }
 };
 
-
-template<typename ParamType, int input_stride>
+template <typename ParamType, int input_stride>
 inline bool MP_MultiAdamW_InferShape(const nnvm::NodeAttrs& attrs,
-                                          mxnet::ShapeVector *in_attrs,
-                                          mxnet::ShapeVector *out_attrs) {
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
-  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights +1);
+  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights + 1);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_shapes = *in_attrs;
+  bool all_inferred   = true;
+  auto& input_shapes  = *in_attrs;
   auto& output_shapes = *out_attrs;
 
   // Learning rates
   CHECK_EQ(param.lrs.ndim(), param.num_weights)
-    << "Number of learning rates is inconsistent with num_weights "
-    << "parameter passed. Expected number of learning rates: "
-    << param.num_weights << ", and got " << param.lrs.ndim();
+      << "Number of learning rates is inconsistent with num_weights "
+      << "parameter passed. Expected number of learning rates: " << param.num_weights
+      << ", and got " << param.lrs.ndim();
   // Weight decays
   CHECK_EQ(param.wds.ndim(), param.num_weights)
-    << "Number of weight decays is inconsistent with num_weights "
-    << "parameter passed. Expected number of weight decays: "
-    << param.num_weights << ", and got " << param.wds.ndim();
+      << "Number of weight decays is inconsistent with num_weights "
+      << "parameter passed. Expected number of weight decays: " << param.num_weights << ", and got "
+      << param.wds.ndim();
   // Learning rates schedule multiplier
   CHECK_EQ(param.etas.ndim(), param.num_weights)
-    << "Number of learning rates schedule multiplier is inconsistent with num_weights "
-    << "parameter passed. Expected number of learning rates schedule multiplier: "
-    << param.num_weights << ", and got " << param.lrs.ndim();
+      << "Number of learning rates schedule multiplier is inconsistent with num_weights "
+      << "parameter passed. Expected number of learning rates schedule multiplier: "
+      << param.num_weights << ", and got " << param.lrs.ndim();
 
   // Weights, gradients, mean and variance
   for (int i = 0; i < param.num_weights; ++i) {
@@ -268,20 +280,20 @@ inline bool MP_MultiAdamW_InferShape(const nnvm::NodeAttrs& attrs,
     all_inferred = all_inferred && ElemwiseShape<input_stride, 1>(attrs, &input_vec, &output_vec);
   }
 
-  SHAPE_ASSIGN_CHECK(*in_attrs, param.num_weights*input_stride, mxnet::TShape());
+  SHAPE_ASSIGN_CHECK(*in_attrs, param.num_weights * input_stride, mxnet::TShape());
   return all_inferred;
 }
 
 template <typename ParamType, int input_stride, int num_fp32_inputs>
 inline bool MP_MultiAdamW_InferType(const nnvm::NodeAttrs& attrs,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
-  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights +1);
+  CHECK_EQ(in_attrs->size(), input_stride * param.num_weights + 1);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_types = *in_attrs;
+  bool all_inferred  = true;
+  auto& input_types  = *in_attrs;
   auto& output_types = *out_attrs;
 
   // Weights, gradients,
@@ -291,13 +303,13 @@ inline bool MP_MultiAdamW_InferType(const nnvm::NodeAttrs& attrs,
     for (int j = 0; j < input_stride - 2 - num_fp32_inputs; ++j) {
       input_vec.push_back(input_types[i * input_stride + j]);
     }
-    all_inferred = all_inferred &&
-            ElemwiseType<input_stride - 2 - num_fp32_inputs, 1>(attrs, &input_vec, &output_vec);
+    all_inferred = all_inferred && ElemwiseType<input_stride - 2 - num_fp32_inputs, 1>(
+                                       attrs, &input_vec, &output_vec);
   }
   // mean, var
   for (int i = 0; i < param.num_weights; ++i) {
-    TYPE_ASSIGN_CHECK(input_types, input_stride * i +2, mshadow::kFloat32);
-    TYPE_ASSIGN_CHECK(input_types, input_stride * i +3, mshadow::kFloat32);
+    TYPE_ASSIGN_CHECK(input_types, input_stride * i + 2, mshadow::kFloat32);
+    TYPE_ASSIGN_CHECK(input_types, input_stride * i + 3, mshadow::kFloat32);
   }
 
   // master copies of weights
@@ -307,25 +319,23 @@ inline bool MP_MultiAdamW_InferType(const nnvm::NodeAttrs& attrs,
     }
   }
 
-  TYPE_ASSIGN_CHECK(input_types, param.num_weights*input_stride, mshadow::kFloat32);
+  TYPE_ASSIGN_CHECK(input_types, param.num_weights * input_stride, mshadow::kFloat32);
   return all_inferred;
 }
 
-
-template<typename T>
+template <typename T>
 class Adam_type_identity {
  public:
   using type = T;
 };
 
-
-template<typename T>
+template <typename T>
 class Adam_single_precision {
  public:
   using type = float;
 };
 
-template<typename DType, typename MPDType>
+template <typename DType, typename MPDType>
 struct MultiAdamKernelParam {
   static const int N = 50;
   int count;
@@ -346,30 +356,32 @@ struct MultiAdamKernelParam {
   MPDType epsilon;
 };
 
-template<typename MPDType, bool has_mixed_precision>
+template <typename MPDType, bool has_mixed_precision>
 struct MultiMPAdamWKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const MultiAdamKernelParam<DType, MPDType>& param,
-                                  const OpReqType req, const float rescale_grad) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const MultiAdamKernelParam<DType, MPDType>& param,
+                                  const OpReqType req,
+                                  const float rescale_grad) {
     for (int index = 0; index < param.count; ++index) {
       if ((size_t)i < param.sizes[index]) {
-        MPDType w = has_mixed_precision ? param.weights32[index][i]:
-                                          MPDType(param.weights[index][i]);
-        MPDType scaled_grad = static_cast<MPDType>(rescale_grad)*
-                              static_cast<MPDType>(param.grad_data[index][i]);
+        MPDType w =
+            has_mixed_precision ? param.weights32[index][i] : MPDType(param.weights[index][i]);
+        MPDType scaled_grad =
+            static_cast<MPDType>(rescale_grad) * static_cast<MPDType>(param.grad_data[index][i]);
 
         if (param.clip_gradient >= 0.0f)
           scaled_grad = mshadow_op::clip::Map(scaled_grad, param.clip_gradient);
 
-        const auto mean = param.beta1 * (param.mean_data[index][i]- scaled_grad) + scaled_grad;
-        const auto adj = mshadow_op::square::Map(scaled_grad);
-        const auto var = param.beta2 * (param.var_data[index][i] - adj) + adj;
+        const auto mean = param.beta1 * (param.mean_data[index][i] - scaled_grad) + scaled_grad;
+        const auto adj  = mshadow_op::square::Map(scaled_grad);
+        const auto var  = param.beta2 * (param.var_data[index][i] - adj) + adj;
 
         param.mean_data[index][i] = mean;
-        param.var_data[index][i] = var;
-        w = w - param.etas[index] * (param.lrs[index] *
-            mean / (mshadow_op::square_root::Map(var) + param.epsilon)
-            + param.wds[index] * w);
+        param.var_data[index][i]  = var;
+        w                         = w - param.etas[index] *
+                    (param.lrs[index] * mean / (mshadow_op::square_root::Map(var) + param.epsilon) +
+                     param.wds[index] * w);
         if (has_mixed_precision)
           param.weights32[index][i] = w;
 
@@ -379,34 +391,34 @@ struct MultiMPAdamWKernel {
   }
 };
 
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         typename ParamType = MultiAdamWParam,
-         int input_stride = 4>
+template <typename xpu,
+          typename DType,
+          typename MPDType,
+          typename ParamType = MultiAdamWParam,
+          int input_stride   = 4>
 void FillMultiAdamKernelParam(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<TBlob> &outputs,
-                              MultiAdamKernelParam<DType, MPDType> *pParam) {
-  const ParamType& p = nnvm::get<ParamType>(attrs.parsed);
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<TBlob>& outputs,
+                              MultiAdamKernelParam<DType, MPDType>* pParam) {
+  const ParamType& p       = nnvm::get<ParamType>(attrs.parsed);
   mxnet_op::Stream<xpu>* s = ctx.get_stream<xpu>();
-  pParam->clip_gradient = p.clip_gradient;
-  pParam->beta1 = p.beta1;
-  pParam->beta2 = p.beta2;
+  pParam->clip_gradient    = p.clip_gradient;
+  pParam->beta1            = p.beta1;
+  pParam->beta2            = p.beta2;
 
   pParam->epsilon = p.epsilon;
 
-  pParam->count = p.num_weights;
-  pParam->max_size = 0;
+  pParam->count         = p.num_weights;
+  pParam->max_size      = 0;
   constexpr bool isSame = std::is_same<DType, MPDType>::value;
   for (int i = 0; i < pParam->count; ++i) {
-    const auto idx = i * input_stride;
+    const auto idx   = i * input_stride;
     pParam->sizes[i] = inputs[idx].shape_.Size();
     if (pParam->max_size < pParam->sizes[i])
       pParam->max_size = pParam->sizes[i];
 
-    pParam->weights[i] = inputs[idx].FlatTo2D<xpu, DType>(s).dptr_;
+    pParam->weights[i]   = inputs[idx].FlatTo2D<xpu, DType>(s).dptr_;
     pParam->grad_data[i] = inputs[idx + 1].FlatTo2D<xpu, DType>(s).dptr_;
     pParam->mean_data[i] = inputs[idx + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
     pParam->var_data[i]  = inputs[idx + 3].FlatTo2D<xpu, MPDType>(s).dptr_;
@@ -422,34 +434,34 @@ void FillMultiAdamKernelParam(const nnvm::NodeAttrs& attrs,
   memcpy(pParam->wds, p.wds.begin(), pParam->count * sizeof(p.wds[0]));
 }
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 static inline void MultiAdamWUpdate(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<TBlob> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<TBlob> &outputs,
+                                    const OpContext& ctx,
+                                    const std::vector<TBlob>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<TBlob>& outputs,
                                     const float rescale_grad) {
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     MultiAdamKernelParam<DType, MPDType> param;
-    FillMultiAdamKernelParam<xpu, DType, MPDType, MultiAdamWParam, input_stride>
-            (attrs, ctx, inputs, outputs, &param);
+    FillMultiAdamKernelParam<xpu, DType, MPDType, MultiAdamWParam, input_stride>(
+        attrs, ctx, inputs, outputs, &param);
 
-    Kernel<MultiMPAdamWKernel<MPDType, !std::is_same<DType, MPDType>::value>, xpu>::
-                              Launch(s, param.max_size, param, req[0], rescale_grad);
+    Kernel<MultiMPAdamWKernel<MPDType, !std::is_same<DType, MPDType>::value>, xpu>::Launch(
+        s, param.max_size, param, req[0], rescale_grad);
   });
 }
 
-template<typename xpu>
-static void GetScaleFloat(mshadow::Stream<xpu> *s, const TBlob &scale_blob, float *pScalef);
+template <typename xpu>
+static void GetScaleFloat(mshadow::Stream<xpu>* s, const TBlob& scale_blob, float* pScalef);
 
-template<typename xpu>
-bool PrepareInputBlobs(const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       std::vector<TBlob> *inputs_wo_scale,
-                       float *pScalef) {
+template <typename xpu>
+bool PrepareInputBlobs(const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       std::vector<TBlob>* inputs_wo_scale,
+                       float* pScalef) {
   const size_t num_in = inputs.size() - 1;
   adamw::GetScaleFloat<xpu>(ctx.get_stream<xpu>(), inputs[num_in], pScalef);
   if (!std::isfinite(*pScalef) || *pScalef == 0)
@@ -462,12 +474,12 @@ bool PrepareInputBlobs(const OpContext &ctx,
   return true;
 }
 
-template<typename xpu, class F>
+template <typename xpu, class F>
 inline void MPUpdate(const nnvm::NodeAttrs& attrs,
-                     const OpContext &ctx,
-                     const std::vector<TBlob> &inputs,
-                     const std::vector<OpReqType> &req,
-                     const std::vector<TBlob> &outputs) {
+                     const OpContext& ctx,
+                     const std::vector<TBlob>& inputs,
+                     const std::vector<OpReqType>& req,
+                     const std::vector<TBlob>& outputs) {
   std::vector<TBlob> inputs_wo_scale;
   float scalef;
   if (!PrepareInputBlobs<xpu>(ctx, inputs, &inputs_wo_scale, &scalef))
@@ -476,23 +488,22 @@ inline void MPUpdate(const nnvm::NodeAttrs& attrs,
   F::Forward(attrs, ctx, inputs_wo_scale, req, outputs, scalef);
 }
 
-template<typename xpu, bool MP>
+template <typename xpu, bool MP>
 inline void multiMPUpdate(const nnvm::NodeAttrs& attrs,
-                          const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   std::vector<TBlob> inputs_wo_scale;
   float scalef;
   if (!PrepareInputBlobs<xpu>(ctx, inputs, &inputs_wo_scale, &scalef))
     return;
 
   if (!MP)
-    MultiAdamWUpdate<xpu, Adam_type_identity, 4>
-      (attrs, ctx, inputs_wo_scale, req, outputs, scalef);
+    MultiAdamWUpdate<xpu, Adam_type_identity, 4>(attrs, ctx, inputs_wo_scale, req, outputs, scalef);
   else
-    MultiAdamWUpdate<xpu, Adam_single_precision, 5>
-      (attrs, ctx, inputs_wo_scale, req, outputs, scalef);
+    MultiAdamWUpdate<xpu, Adam_single_precision, 5>(
+        attrs, ctx, inputs_wo_scale, req, outputs, scalef);
 }
 
 }  // namespace adamw
diff --git a/src/operator/contrib/adamw.cc b/src/operator/contrib/adamw.cc
index e66250200e54..f375e1b6047e 100644
--- a/src/operator/contrib/adamw.cc
+++ b/src/operator/contrib/adamw.cc
@@ -33,7 +33,7 @@ DMLC_REGISTER_PARAMETER(AdamWParam);
 DMLC_REGISTER_PARAMETER(MultiAdamWParam);
 
 NNVM_REGISTER_OP(_mp_adamw_update)
-.describe(R"code(Update function for multi-precision AdamW optimizer.
+    .describe(R"code(Update function for multi-precision AdamW optimizer.
 
 AdamW is seen as a modification of Adam by decoupling the weight decay from the
 optimization steps taken w.r.t. the loss function.
@@ -57,28 +57,29 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 )code" ADD_FILELINE)
-.set_num_inputs(6)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AdamWParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<2, 1, 6>)
-.set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<2, 1, 6>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3, 4};
-  })
-.set_attr<FCompute>("FCompute<cpu>", adamw::MPUpdate<cpu, MPAdamWUpdate<cpu>>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_argument("rescale_grad", "NDArray-or-Symbol",
-              "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
-              "the update is skipped.")
-.add_arguments(AdamWParam::__FIELDS__());
+    .set_num_inputs(6)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AdamWParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<2, 1, 6>)
+    .set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<2, 1, 6>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3, 4};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", adamw::MPUpdate<cpu, MPAdamWUpdate<cpu>>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_argument("rescale_grad",
+                  "NDArray-or-Symbol",
+                  "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
+                  "the update is skipped.")
+    .add_arguments(AdamWParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_adamw_update)
-.describe(R"code(Update function for AdamW optimizer. AdamW is seen as a modification of
+    .describe(R"code(Update function for AdamW optimizer. AdamW is seen as a modification of
 Adam by decoupling the weight decay from the optimization steps taken w.r.t. the loss function.
 
 Adam update consists of the following steps, where g represents gradient and m, v
@@ -100,34 +101,35 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 )code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AdamWParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<4, 1, 5>)
-.set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<4, 1, 5>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.set_attr<FCompute>("FCompute<cpu>", adamw::MPUpdate<cpu, AdamWUpdate<cpu>>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_argument("rescale_grad", "NDArray-or-Symbol",
-              "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
-              "the update is skipped.")
-.add_arguments(AdamWParam::__FIELDS__());
-
-template<>
-void GetScaleFloat<cpu>(mshadow::Stream<cpu> *s, const TBlob &scale_blob, float *pScalef) {
-  MSHADOW_REAL_TYPE_SWITCH(scale_blob.type_flag_, DType,
-    *pScalef = static_cast<float>(*scale_blob.dptr<DType>());
-  )
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AdamWParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MPUpdateInferShape<4, 1, 5>)
+    .set_attr<nnvm::FInferType>("FInferType", MPUpdateInferType<4, 1, 5>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", adamw::MPUpdate<cpu, AdamWUpdate<cpu>>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_argument("rescale_grad",
+                  "NDArray-or-Symbol",
+                  "Rescale gradient to rescale_grad * grad. If NaN, Inf, or 0, "
+                  "the update is skipped.")
+    .add_arguments(AdamWParam::__FIELDS__());
+
+template <>
+void GetScaleFloat<cpu>(mshadow::Stream<cpu>* s, const TBlob& scale_blob, float* pScalef) {
+  MSHADOW_REAL_TYPE_SWITCH(
+      scale_blob.type_flag_, DType, *pScalef = static_cast<float>(*scale_blob.dptr<DType>());)
 }
 
-static std::vector<std::string>
-ParamToVector(uint32_t num_args, const char *pName[], size_t nParams) {
+static std::vector<std::string> ParamToVector(uint32_t num_args,
+                                              const char* pName[],
+                                              size_t nParams) {
   std::vector<std::string> ret;
   for (uint32_t i = 0; i < num_args; ++i) {
     const auto idx = std::to_string(i);
@@ -143,7 +145,7 @@ inline uint32_t num_weights(const nnvm::NodeAttrs& attrs) {
 }
 
 NNVM_REGISTER_OP(_multi_adamw_update)
-.describe(R"code(Update function for AdamW optimizer.
+    .describe(R"code(Update function for AdamW optimizer.
 
 AdamW is seen as a modification of Adam by decoupling the weight decay from the
 optimization steps taken w.r.t. the loss function.
@@ -167,39 +169,36 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs) * 4 + 1;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs);
-  })
-.set_attr_parser(ParamParser<MultiAdamWParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MP_MultiAdamW_InferShape<MultiAdamWParam, 4>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *paramName[] = {"weight_", "grad_", "mean_", "var_", "rescale_grad_"};
-    return ParamToVector(num_weights(attrs), paramName, sizeof(paramName)/sizeof(paramName[0]));
-  })
-// mutable: mean, var
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto iMax = num_weights(attrs);
-    for (size_t i = 0; i < iMax; ++i) {
-      ret.push_back(i * 4 + 2);
-      ret.push_back(i * 4 + 3);
-    }
-    return ret;
-  })
-
-.set_attr<FCompute>("FCompute<cpu>", adamw::multiMPUpdate<cpu, false>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiAdamWParam::__FIELDS__());
-
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs) * 4 + 1; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs); })
+    .set_attr_parser(ParamParser<MultiAdamWParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MP_MultiAdamW_InferShape<MultiAdamWParam, 4>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* paramName[] = {"weight_", "grad_", "mean_", "var_", "rescale_grad_"};
+          return ParamToVector(
+              num_weights(attrs), paramName, sizeof(paramName) / sizeof(paramName[0]));
+        })
+    // mutable: mean, var
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto iMax = num_weights(attrs);
+                                     for (size_t i = 0; i < iMax; ++i) {
+                                       ret.push_back(i * 4 + 2);
+                                       ret.push_back(i * 4 + 3);
+                                     }
+                                     return ret;
+                                   })
+
+    .set_attr<FCompute>("FCompute<cpu>", adamw::multiMPUpdate<cpu, false>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiAdamWParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_multi_mp_adamw_update)
-.describe(R"code(Update function for multi-precision AdamW optimizer.
+    .describe(R"code(Update function for multi-precision AdamW optimizer.
 
 AdamW is seen as a modification of Adam by decoupling the weight decay from the
 optimization steps taken w.r.t. the loss function.
@@ -223,37 +222,35 @@ It updates the weights using::
 Note that gradient is rescaled to grad = rescale_grad * grad. If rescale_grad is NaN, Inf, or 0,
 the update is skipped.
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs) * 5 + 1;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return num_weights(attrs);
-  })
-.set_attr_parser(ParamParser<MultiAdamWParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MP_MultiAdamW_InferShape<MultiAdamWParam, 5>)
-.set_attr<nnvm::FInferType>("FInferType", MP_MultiAdamW_InferType<MultiAdamWParam, 5, 1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *paramName[] = {"weight_", "grad_", "mean_", "var_", "weight32_", "rescale_grad_"};
-    return ParamToVector(num_weights(attrs), paramName, sizeof(paramName)/sizeof(paramName[0]));
-  })
-// mutable: mean, var, weights32
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto iMax = num_weights(attrs);
-    for (size_t i = 0; i < iMax; ++i) {
-      ret.push_back(i * 5 + 2);
-      ret.push_back(i * 5 + 3);
-      ret.push_back(i * 5 + 4);
-    }
-    return ret;
-  })
-
-.set_attr<FCompute>("FCompute<cpu>", adamw::multiMPUpdate<cpu, true>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiAdamWParam::__FIELDS__());
-
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs) * 5 + 1; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return num_weights(attrs); })
+    .set_attr_parser(ParamParser<MultiAdamWParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MP_MultiAdamW_InferShape<MultiAdamWParam, 5>)
+    .set_attr<nnvm::FInferType>("FInferType", MP_MultiAdamW_InferType<MultiAdamWParam, 5, 1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* paramName[] = {
+              "weight_", "grad_", "mean_", "var_", "weight32_", "rescale_grad_"};
+          return ParamToVector(
+              num_weights(attrs), paramName, sizeof(paramName) / sizeof(paramName[0]));
+        })
+    // mutable: mean, var, weights32
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto iMax = num_weights(attrs);
+                                     for (size_t i = 0; i < iMax; ++i) {
+                                       ret.push_back(i * 5 + 2);
+                                       ret.push_back(i * 5 + 3);
+                                       ret.push_back(i * 5 + 4);
+                                     }
+                                     return ret;
+                                   })
+
+    .set_attr<FCompute>("FCompute<cpu>", adamw::multiMPUpdate<cpu, true>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiAdamWParam::__FIELDS__());
 
 }  // namespace adamw
 }  // namespace op
diff --git a/src/operator/contrib/adamw.cu b/src/operator/contrib/adamw.cu
index 95fcffbd78e4..2ed0e92dd6c9 100644
--- a/src/operator/contrib/adamw.cu
+++ b/src/operator/contrib/adamw.cu
@@ -29,29 +29,31 @@ namespace mxnet {
 namespace op {
 namespace adamw {
 
-template<>
-void GetScaleFloat<gpu>(mshadow::Stream<gpu> *s, const TBlob &scale_blob, float *pScalef) {
-  MSHADOW_REAL_TYPE_SWITCH(scale_blob.type_flag_, DType, {
-    DType scale = 0;
-    cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-    CUDA_CALL(cudaMemcpyAsync(&scale, scale_blob.dptr<DType>(), sizeof(DType),
-                              cudaMemcpyDeviceToHost, stream));
-    CUDA_CALL(cudaStreamSynchronize(stream));
-    *pScalef = static_cast<float>(scale);
-  })
-}
+template <>
+void GetScaleFloat<gpu>(mshadow::Stream<gpu>* s, const TBlob& scale_blob, float* pScalef) {
+    MSHADOW_REAL_TYPE_SWITCH(
+        scale_blob.type_flag_,
+        DType,
+        {
+          DType scale         = 0;
+          cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
+          CUDA_CALL(cudaMemcpyAsync(
+              &scale, scale_blob.dptr<DType>(), sizeof(DType), cudaMemcpyDeviceToHost, stream));
+          CUDA_CALL(cudaStreamSynchronize(stream));
+          *pScalef = static_cast<float>(scale);
+        })}
 
 NNVM_REGISTER_OP(_adamw_update)
-.set_attr<FCompute>("FCompute<gpu>", adamw::MPUpdate<gpu, AdamWUpdate<gpu>>);
+    .set_attr<FCompute>("FCompute<gpu>", adamw::MPUpdate<gpu, AdamWUpdate<gpu>>);
 
 NNVM_REGISTER_OP(_mp_adamw_update)
-.set_attr<FCompute>("FCompute<gpu>", adamw::MPUpdate<gpu, MPAdamWUpdate<gpu>>);
+    .set_attr<FCompute>("FCompute<gpu>", adamw::MPUpdate<gpu, MPAdamWUpdate<gpu>>);
 
 NNVM_REGISTER_OP(_multi_adamw_update)
-.set_attr<FCompute>("FCompute<gpu>", adamw::multiMPUpdate<gpu, false>);
+    .set_attr<FCompute>("FCompute<gpu>", adamw::multiMPUpdate<gpu, false>);
 
 NNVM_REGISTER_OP(_multi_mp_adamw_update)
-.set_attr<FCompute>("FCompute<gpu>", adamw::multiMPUpdate<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", adamw::multiMPUpdate<gpu, true>);
 
 }  // namespace adamw
 }  // namespace op
diff --git a/src/operator/contrib/adaptive_avg_pooling-inl.h b/src/operator/contrib/adaptive_avg_pooling-inl.h
index eedab78db0c5..e2abd1dcb324 100644
--- a/src/operator/contrib/adaptive_avg_pooling-inl.h
+++ b/src/operator/contrib/adaptive_avg_pooling-inl.h
@@ -21,7 +21,7 @@
  * \file adaptive_avg_pooling-inl.h
  * \brief adaptive average pooling operator
  * \author Hang Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_ADAPTIVE_AVG_POOLING_INL_H_
 #define MXNET_OPERATOR_CONTRIB_ADAPTIVE_AVG_POOLING_INL_H_
 
@@ -50,8 +50,9 @@ namespace op {
 struct AdaptiveAvgPoolParam : public dmlc::Parameter<AdaptiveAvgPoolParam> {
   mxnet::Tuple<int> output_size;
   DMLC_DECLARE_PARAMETER(AdaptiveAvgPoolParam) {
-    DMLC_DECLARE_FIELD(output_size).set_default(mxnet::Tuple<int>())
-    .describe("int (output size) or a tuple of int for output (height, width).");
+    DMLC_DECLARE_FIELD(output_size)
+        .set_default(mxnet::Tuple<int>())
+        .describe("int (output size) or a tuple of int for output (height, width).");
   }
 };
 
@@ -59,73 +60,70 @@ static inline bool IsWriting(const OpReqType ort) {
   return ort == kWriteTo || ort == kWriteInplace;
 }
 
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<cpu> *s,
-                                 const std::vector<TBlob> &input,
-                                 const std::vector<TBlob> &output);
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<cpu>* s,
+                                 const std::vector<TBlob>& input,
+                                 const std::vector<TBlob>& output);
 
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<cpu> *s,
-                                    const std::vector<TBlob> &input,
-                                    const std::vector<TBlob> &output);
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<cpu>* s,
+                                    const std::vector<TBlob>& input,
+                                    const std::vector<TBlob>& output);
 
 #if MXNET_USE_CUDA
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<gpu> *s,
-                                 const std::vector<TBlob> &input,
-                                 const std::vector<TBlob> &output);
-
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<gpu> *s,
-                                    const std::vector<TBlob> &input,
-                                    const std::vector<TBlob> &output);
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<gpu>* s,
+                                 const std::vector<TBlob>& input,
+                                 const std::vector<TBlob>& output);
+
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<gpu>* s,
+                                    const std::vector<TBlob>& input,
+                                    const std::vector<TBlob>& output);
 #endif  // MXNET_USE_CUDA
 
 template <typename xpu>
 inline void AdaptiveAvgPoolOpForward(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<TBlob> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<TBlob> &outputs) {
+                                     const OpContext& ctx,
+                                     const std::vector<TBlob>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH_EX(inputs[0].type_flag_, DType, AccReal, {
     AdaptiveAvgPoolUpdateOutput<xpu, DType, AccReal>(s, inputs, outputs);
   });
 }
 
-
 template <typename xpu>
 inline void AdaptiveAvgPoolOpBackward(const nnvm::NodeAttrs& attrs,
-                                      const OpContext &ctx,
-                                      const std::vector<TBlob> &inputs,
-                                      const std::vector<OpReqType> &req,
-                                      const std::vector<TBlob> &outputs) {
+                                      const OpContext& ctx,
+                                      const std::vector<TBlob>& inputs,
+                                      const std::vector<OpReqType>& req,
+                                      const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   if (IsWriting(req[0])) {
     // zero grad before backwarding
-    MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      Fill<false>(s, outputs[0], kWriteTo, 0);
-    })
+    MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, { Fill<false>(s, outputs[0], kWriteTo, 0); })
   }
   MSHADOW_REAL_TYPE_SWITCH_EX(inputs[0].type_flag_, DType, AccReal, {
     AdaptiveAvgPoolUpdateGradInput<xpu, DType, AccReal>(s, inputs, outputs);
   });
 }
 
-
 static bool AdaptiveAvgPoolOpInferShape(const nnvm::NodeAttrs& attrs,
-                                       mxnet::ShapeVector *in_shape,
-                                       mxnet::ShapeVector *out_shape) {
+                                        mxnet::ShapeVector* in_shape,
+                                        mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 1U) << "Input:[data]";
   CHECK_EQ(out_shape->size(), 1U) << "Output:[data]";
   const AdaptiveAvgPoolParam& param = nnvm::get<AdaptiveAvgPoolParam>(attrs.parsed);
   mxnet::TShape dshape(in_shape->at(0));
-  if (mxnet::op::shape_is_none(dshape)) return false;
+  if (mxnet::op::shape_is_none(dshape))
+    return false;
   if (param.output_size.ndim() == 0) {
     dshape[2] = 1;
     dshape[3] = 1;
@@ -145,11 +143,11 @@ static bool AdaptiveAvgPoolOpInferShape(const nnvm::NodeAttrs& attrs,
 }
 
 using namespace mshadow;
-template<typename xpu, int Dim, typename DType>
+template <typename xpu, int Dim, typename DType>
 MSHADOW_XINLINE int get_stride(Tensor<xpu, Dim, DType> tensor, int idx) {
   int stride = 1;
-  for (int i = Dim-2; i >= idx; --i) {
-    stride *= tensor.size(i+1);
+  for (int i = Dim - 2; i >= idx; --i) {
+    stride *= tensor.size(i + 1);
   }
   return stride;
 }
diff --git a/src/operator/contrib/adaptive_avg_pooling.cc b/src/operator/contrib/adaptive_avg_pooling.cc
index 42c39cc157c6..03ca4288f9fe 100644
--- a/src/operator/contrib/adaptive_avg_pooling.cc
+++ b/src/operator/contrib/adaptive_avg_pooling.cc
@@ -21,60 +21,59 @@
  * \file adaptive_avg_pooling.cc
  * \brief adaptive average pooling operator
  * \author Hang Zhang
-*/
+ */
 #include "adaptive_avg_pooling-inl.h"
 // #include "elemwise_op_common.h"
 #include "../elemwise_op_common.h"
 
 #define START_IND(a, b, c) static_cast<int>(std::floor(static_cast<float>(a * c) / b))
-#define END_IND(a, b, c) static_cast<int>(std::ceil(static_cast<float>((a + 1) * c) / b))
+#define END_IND(a, b, c)   static_cast<int>(std::ceil(static_cast<float>((a + 1) * c) / b))
 
 namespace mxnet {
 namespace op {
 
 using namespace mshadow;
 
-template<typename real>
-static void SpatialAdaptiveAveragePooling_updateOutput_frame(
-          real *input_p,
-          real *output_p,
-          int64_t sizeD,
-          int64_t isizeH,
-          int64_t isizeW,
-          int64_t osizeH,
-          int64_t osizeW,
-          int64_t istrideD,
-          int64_t istrideH,
-          int64_t istrideW) {
+template <typename real>
+static void SpatialAdaptiveAveragePooling_updateOutput_frame(real* input_p,
+                                                             real* output_p,
+                                                             int64_t sizeD,
+                                                             int64_t isizeH,
+                                                             int64_t isizeW,
+                                                             int64_t osizeH,
+                                                             int64_t osizeW,
+                                                             int64_t istrideD,
+                                                             int64_t istrideH,
+                                                             int64_t istrideW) {
   int64_t d;
 #pragma omp parallel for private(d) \
-num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+    num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (d = 0; d < sizeD; d++) {
     /* loop over output */
     int64_t oh, ow, ih, iw;
-    int outOffset = d*osizeH*osizeW;
+    int outOffset = d * osizeH * osizeW;
     for (oh = 0; oh < osizeH; oh++) {
-      int istartH = START_IND(oh, osizeH, isizeH);
+      int istartH      = START_IND(oh, osizeH, isizeH);
       int startOffsetH = istartH * istrideH;
-      int outOffsetH = oh * osizeW;
-      int iendH   = END_IND(oh, osizeH, isizeH);
-      int kH = iendH - istartH;
+      int outOffsetH   = oh * osizeW;
+      int iendH        = END_IND(oh, osizeH, isizeH);
+      int kH           = iendH - istartH;
 
       for (ow = 0; ow < osizeW; ow++) {
         int istartW = START_IND(ow, osizeW, isizeW);
         int iendW   = END_IND(ow, osizeW, isizeW);
-        int kW = iendW - istartW;
+        int kW      = iendW - istartW;
 
         /* local pointers */
-        real *ip = input_p   + d*istrideD + startOffsetH + istartW*istrideW;
-        real *op = output_p  + outOffset + outOffsetH + ow;
+        real* ip = input_p + d * istrideD + startOffsetH + istartW * istrideW;
+        real* op = output_p + outOffset + outOffsetH + ow;
 
         /* compute local average: */
         real sum = 0;
         for (ih = 0; ih < kH; ih++) {
-          int ihOffset = ih*istrideH;
+          int ihOffset = ih * istrideH;
           for (iw = 0; iw < kW; iw++) {
-            real val = *(ip + ihOffset + iw*istrideW);
+            real val = *(ip + ihOffset + iw * istrideW);
             sum += val;
           }
         }
@@ -86,41 +85,40 @@ num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   }
 }
 
-template<typename real>
-static void SpatialAdaptiveAveragePooling_updateGradInput_frame(
-          real *gradInput_p,
-          real *gradOutput_p,
-          int64_t sizeD,
-          int64_t isizeH,
-          int64_t isizeW,
-          int64_t osizeH,
-          int64_t osizeW) {
+template <typename real>
+static void SpatialAdaptiveAveragePooling_updateGradInput_frame(real* gradInput_p,
+                                                                real* gradOutput_p,
+                                                                int64_t sizeD,
+                                                                int64_t isizeH,
+                                                                int64_t isizeW,
+                                                                int64_t osizeH,
+                                                                int64_t osizeW) {
   int64_t d;
 #pragma omp parallel for private(d) \
-num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+    num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (d = 0; d < sizeD; d++) {
-    real *gradInput_p_d = gradInput_p + d*isizeW*isizeH;
-    real *gradOutput_p_d = gradOutput_p + d*osizeW*osizeH;
+    real* gradInput_p_d  = gradInput_p + d * isizeW * isizeH;
+    real* gradOutput_p_d = gradOutput_p + d * osizeW * osizeH;
 
     /* calculate average */
     int64_t oh, ow;
     for (oh = 0; oh < osizeH; oh++) {
       int istartH = START_IND(oh, osizeH, isizeH);
       int iendH   = END_IND(oh, osizeH, isizeH);
-      int kH = iendH - istartH;
+      int kH      = iendH - istartH;
 
       for (ow = 0; ow < osizeW; ow++) {
         int istartW = START_IND(ow, osizeW, isizeW);
         int iendW   = END_IND(ow, osizeW, isizeW);
-        int kW = iendW - istartW;
+        int kW      = iendW - istartW;
 
-        real grad_delta = gradOutput_p_d[oh*osizeW +ow] / kH / kW;
+        real grad_delta = gradOutput_p_d[oh * osizeW + ow] / kH / kW;
 
         int ih, iw;
         for (ih = istartH; ih < iendH; ih++) {
           for (iw = istartW; iw < iendW; iw++) {
             /* update gradient */
-            gradInput_p_d[ih*isizeW + iw] += grad_delta;
+            gradInput_p_d[ih * isizeW + iw] += grad_delta;
           }
         }
       }
@@ -128,16 +126,15 @@ num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   }
 }
 
-
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<cpu> *s,
-                                           const std::vector<TBlob> &input,
-                                           const std::vector<TBlob> &output) {
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<cpu>* s,
+                                 const std::vector<TBlob>& input,
+                                 const std::vector<TBlob>& output) {
   Tensor<xpu, 4, DType> itensor = input[0].get<xpu, 4, DType>(s);
   Tensor<xpu, 4, DType> otensor = output[0].get<xpu, 4, DType>(s);
 
-  DType *input_data = itensor.dptr_;
-  DType *output_data = otensor.dptr_;
+  DType* input_data  = itensor.dptr_;
+  DType* output_data = otensor.dptr_;
 
   int64_t sizeB  = itensor.size(0);
   int64_t sizeD  = itensor.size(1);
@@ -154,28 +151,31 @@ void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<cpu> *s,
 
   int64_t b;
 #pragma omp parallel for private(b) \
-num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+    num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (b = 0; b < sizeB; b++) {
     SpatialAdaptiveAveragePooling_updateOutput_frame<DType>(
-      input_data+b*istrideB, output_data+b*sizeD*osizeH*osizeW,
-      sizeD,
-      isizeH, isizeW,
-      osizeH, osizeW,
-      istrideD,
-      istrideH, istrideW);
+        input_data + b * istrideB,
+        output_data + b * sizeD * osizeH * osizeW,
+        sizeD,
+        isizeH,
+        isizeW,
+        osizeH,
+        osizeW,
+        istrideD,
+        istrideH,
+        istrideW);
   }
 }
 
-
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<cpu> *s,
-                                              const std::vector<TBlob> &input,
-                                              const std::vector<TBlob> &output) {
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<cpu>* s,
+                                    const std::vector<TBlob>& input,
+                                    const std::vector<TBlob>& output) {
   Tensor<xpu, 4, DType> gradOut = input[0].get<xpu, 4, DType>(s);
-  Tensor<xpu, 4, DType> gradIn = output[0].get<xpu, 4, DType>(s);
+  Tensor<xpu, 4, DType> gradIn  = output[0].get<xpu, 4, DType>(s);
 
-  DType *gradOutput_data = gradOut.dptr_;
-  DType *gradInput_data = gradIn.dptr_;
+  DType* gradOutput_data = gradOut.dptr_;
+  DType* gradInput_data  = gradIn.dptr_;
 
   int64_t sizeB  = gradIn.size(0);
   int64_t sizeD  = gradIn.size(1);
@@ -187,21 +187,23 @@ void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<cpu> *s,
 
   int64_t b;
 #pragma omp parallel for private(b) \
-num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+    num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (b = 0; b < sizeB; b++) {
     SpatialAdaptiveAveragePooling_updateGradInput_frame<DType>(
-      gradInput_data+b*sizeD*isizeH*isizeW, gradOutput_data+b*sizeD*osizeH*osizeW,
-      sizeD,
-      isizeH, isizeW,
-      osizeH, osizeW);
+        gradInput_data + b * sizeD * isizeH * isizeW,
+        gradOutput_data + b * sizeD * osizeH * osizeW,
+        sizeD,
+        isizeH,
+        isizeW,
+        osizeH,
+        osizeW);
   }
 }
 
-
 DMLC_REGISTER_PARAMETER(AdaptiveAvgPoolParam);
 
 NNVM_REGISTER_OP(_contrib_AdaptiveAvgPooling2D)
-.describe(R"code(
+    .describe(R"code(
 Applies a 2D adaptive average pooling over a 4D input with the shape of (NCHW).
 The pooling kernel and stride sizes are automatically chosen for desired output sizes.
 
@@ -212,23 +214,22 @@ The pooling kernel and stride sizes are automatically chosen for desired output
   (N x C x height x width) for any input (NCHW).
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<AdaptiveAvgPoolParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", AdaptiveAvgPoolOpInferShape)
-.set_attr<FCompute>("FCompute<cpu>", AdaptiveAvgPoolOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  ElemwiseGradUseNone{"_backward_contrib_AdaptiveAvgPooling2D"})
-.add_argument("data", "NDArray-or-Symbol", "Input data")
-.add_arguments(AdaptiveAvgPoolParam::__FIELDS__());
+    .set_attr_parser(ParamParser<AdaptiveAvgPoolParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", AdaptiveAvgPoolOpInferShape)
+    .set_attr<FCompute>("FCompute<cpu>", AdaptiveAvgPoolOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseNone{"_backward_contrib_AdaptiveAvgPooling2D"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data")
+    .add_arguments(AdaptiveAvgPoolParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_contrib_AdaptiveAvgPooling2D)
-.set_attr_parser(ParamParser<AdaptiveAvgPoolParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", AdaptiveAvgPoolOpBackward<cpu>);
-
+    .set_attr_parser(ParamParser<AdaptiveAvgPoolParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", AdaptiveAvgPoolOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/adaptive_avg_pooling.cu b/src/operator/contrib/adaptive_avg_pooling.cu
index 375c420a0440..3dd37fa91fbb 100644
--- a/src/operator/contrib/adaptive_avg_pooling.cu
+++ b/src/operator/contrib/adaptive_avg_pooling.cu
@@ -21,23 +21,25 @@
  * \file adaptive_avg_pooling.cu
  * \brief adaptive average pooling operator
  * \author Hang Zhang
-*/
+ */
 #include <cuda_runtime_api.h>
 #include <algorithm>
 #include "adaptive_avg_pooling-inl.h"
 
 #define START_IND(a, b, c) static_cast<int>(floor(static_cast<float>(a * c) / b))
-#define END_IND(a, b, c) static_cast<int>(ceil(static_cast<float>((a + 1) * c) / b))
-#define CUDA_MAX_THREADS 1024   // this is safe, in reality 256 is our limit
+#define END_IND(a, b, c)   static_cast<int>(ceil(static_cast<float>((a + 1) * c) / b))
+#define CUDA_MAX_THREADS   1024  // this is safe, in reality 256 is our limit
 
 namespace mxnet {
 namespace op {
 
 using namespace mshadow;
 
-template<typename In, typename Out>
+template <typename In, typename Out>
 struct ScalarConvert {
-  static __host__ __device__ __forceinline__ Out to(const In v) { return (Out) v; }
+  static __host__ __device__ __forceinline__ Out to(const In v) {
+    return (Out)v;
+  }
 };
 
 /*
@@ -46,10 +48,15 @@ struct ScalarConvert {
  *    4D input, 4D output
  */
 template <typename T>
-__global__ void adaptiveaveragepool(T *input, T *output,
-                        int isizeH, int isizeW,
-                        int osizeH, int osizeW,
-                        int64_t istrideD, int64_t istrideH, int64_t istrideW) {
+__global__ void adaptiveaveragepool(T* input,
+                                    T* output,
+                                    int isizeH,
+                                    int isizeW,
+                                    int osizeH,
+                                    int osizeW,
+                                    int64_t istrideD,
+                                    int64_t istrideH,
+                                    int64_t istrideW) {
   // iterators on output pixels
   int oh, ow;
 
@@ -57,36 +64,36 @@ __global__ void adaptiveaveragepool(T *input, T *output,
   int o_plane = blockIdx.x;
   int i_plane = o_plane;
 
-  output = output + o_plane*osizeH*osizeW;
-  input = input + i_plane*istrideD;
+  output = output + o_plane * osizeH * osizeW;
+  input  = input + i_plane * istrideD;
 
-  int ostartH = blockDim.y*blockIdx.y + threadIdx.y;
-  int oendH = osizeH;
-  const int ostepH = blockDim.y*gridDim.y;
+  int ostartH      = blockDim.y * blockIdx.y + threadIdx.y;
+  int oendH        = osizeH;
+  const int ostepH = blockDim.y * gridDim.y;
 
-  int ostartW = threadIdx.x;
-  int oendW = osizeW;
+  int ostartW      = threadIdx.x;
+  int oendW        = osizeW;
   const int ostepW = blockDim.x;
 
   // For all output pixels...
   for (oh = ostartH; oh < oendH; oh += ostepH) {
     int istartH = START_IND(oh, osizeH, isizeH);
     int iendH   = END_IND(oh, osizeH, isizeH);
-    int kH = iendH - istartH;
+    int kH      = iendH - istartH;
 
     for (ow = ostartW; ow < oendW; ow += ostepW) {
       int istartW = START_IND(ow, osizeW, isizeW);
       int iendW   = END_IND(ow, osizeW, isizeW);
-      int kW = iendW - istartW;
+      int kW      = iendW - istartW;
 
       // Compute the average pooling over corresponding input pixels
-      T *ptr_input = input + istartH*istrideH + istartW*istrideW;
-      T *ptr_output = output + oh*osizeW + ow;
-      T sum = ScalarConvert<int, T>::to(0);
+      T* ptr_input  = input + istartH * istrideH + istartW * istrideW;
+      T* ptr_output = output + oh * osizeW + ow;
+      T sum         = ScalarConvert<int, T>::to(0);
       int ih, iw;
       for (ih = 0; ih < kH; ++ih) {
         for (iw = 0; iw < kW; ++iw) {
-          T val = ptr_input[iw*istrideW];
+          T val = ptr_input[iw * istrideW];
           sum += val;
         }
         ptr_input += istrideH;  // next input line
@@ -103,10 +110,12 @@ __global__ void adaptiveaveragepool(T *input, T *output,
  *    (uses atomic add)
  */
 template <typename T>
-__global__ void atomicadaptiveaveragegradinput(
-  T *gradInput, T *gradOutput,
-  int isizeH, int isizeW, int osizeH, int osizeW
-) {
+__global__ void atomicadaptiveaveragegradinput(T* gradInput,
+                                               T* gradOutput,
+                                               int isizeH,
+                                               int isizeW,
+                                               int osizeH,
+                                               int osizeW) {
   // iterators on output indices
   int oh, ow;
 
@@ -114,32 +123,32 @@ __global__ void atomicadaptiveaveragegradinput(
   int o_plane = blockIdx.x;
   int i_plane = o_plane;
 
-  gradOutput = gradOutput + o_plane*osizeW*osizeH;
-  gradInput = gradInput + i_plane*isizeW*isizeH;
+  gradOutput = gradOutput + o_plane * osizeW * osizeH;
+  gradInput  = gradInput + i_plane * isizeW * isizeH;
 
-  int ostartH = blockDim.y*blockIdx.y + threadIdx.y;
-  int oendH = osizeH;
-  int ostepH = blockDim.y*gridDim.y;
+  int ostartH = blockDim.y * blockIdx.y + threadIdx.y;
+  int oendH   = osizeH;
+  int ostepH  = blockDim.y * gridDim.y;
 
   int ostartW = threadIdx.x;
-  int oendW = osizeW;
-  int ostepW = blockDim.x;
+  int oendW   = osizeW;
+  int ostepW  = blockDim.x;
 
   // For all output pixels...
   for (oh = ostartH; oh < oendH; oh += ostepH) {
     int istartH = START_IND(oh, osizeH, isizeH);
     int iendH   = END_IND(oh, osizeH, isizeH);
-    int kH = iendH - istartH;
+    int kH      = iendH - istartH;
 
     for (ow = ostartW; ow < oendW; ow += ostepW) {
       int istartW = START_IND(ow, osizeW, isizeW);
       int iendW   = END_IND(ow, osizeW, isizeW);
-      int kW = iendW - istartW;
+      int kW      = iendW - istartW;
 
       // Compute the gradients for over corresponding input pixels
-      T *ptr_gradInput = gradInput + istartH*isizeW + istartW;
-      T *ptr_gradOutput = gradOutput + oh*osizeW + ow;
-      T grad_delta = *ptr_gradOutput / kW / kH;
+      T* ptr_gradInput  = gradInput + istartH * isizeW + istartW;
+      T* ptr_gradOutput = gradOutput + oh * osizeW + ow;
+      T grad_delta      = *ptr_gradOutput / kW / kH;
 
       int ih, iw;
       for (ih = 0; ih < kH; ++ih) {
@@ -153,16 +162,15 @@ __global__ void atomicadaptiveaveragegradinput(
   }
 }
 
-
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<gpu> *s,
-                                 const std::vector<TBlob> &input,
-                                 const std::vector<TBlob> &output) {
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<gpu>* s,
+                                 const std::vector<TBlob>& input,
+                                 const std::vector<TBlob>& output) {
   Tensor<xpu, 4, DType> itensor = input[0].get<xpu, 4, DType>(s);
   Tensor<xpu, 4, DType> otensor = output[0].get<xpu, 4, DType>(s);
 
-  DType *input_data = itensor.dptr_;
-  DType *output_data = otensor.dptr_;
+  DType* input_data  = itensor.dptr_;
+  DType* output_data = otensor.dptr_;
 
   int64_t sizeB  = itensor.size(0);
   int64_t sizeD  = itensor.size(1);
@@ -183,21 +191,20 @@ void AdaptiveAvgPoolUpdateOutput(mshadow::Stream<gpu> *s,
 
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   // run averagepool kernel
-  adaptiveaveragepool <<<blocks, threads, 0, stream>>> (
-    input_data, output_data, isizeH, isizeW, osizeH, osizeW,
-    istrideD, istrideH, istrideW);
+  adaptiveaveragepool<<<blocks, threads, 0, stream>>>(
+      input_data, output_data, isizeH, isizeW, osizeH, osizeW, istrideD, istrideH, istrideW);
   MSHADOW_CUDA_POST_KERNEL_CHECK(AdaptiveAvgPoolUpdateOutput);
 }
 
-template<typename xpu, typename DType, typename AccReal>
-void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<gpu> *s,
-                                    const std::vector<TBlob> &input,
-                                    const std::vector<TBlob> &output) {
+template <typename xpu, typename DType, typename AccReal>
+void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<gpu>* s,
+                                    const std::vector<TBlob>& input,
+                                    const std::vector<TBlob>& output) {
   Tensor<xpu, 4, DType> gradOut = input[0].get<xpu, 4, DType>(s);
-  Tensor<xpu, 4, DType> gradIn = output[0].get<xpu, 4, DType>(s);
+  Tensor<xpu, 4, DType> gradIn  = output[0].get<xpu, 4, DType>(s);
 
-  DType *gradOutput_data = gradOut.dptr_;
-  DType *gradInput_data = gradIn.dptr_;
+  DType* gradOutput_data = gradOut.dptr_;
+  DType* gradInput_data  = gradIn.dptr_;
 
   int64_t sizeB  = gradIn.size(0);
   int64_t sizeD  = gradIn.size(1);
@@ -214,16 +221,16 @@ void AdaptiveAvgPoolUpdateGradInput(mshadow::Stream<gpu> *s,
 
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   // run updateGradInput kernel, accumulate gradients atomically
-  atomicadaptiveaveragegradinput <<<blocks, threads, 0, stream>>> (
-    gradInput_data, gradOutput_data, isizeH, isizeW, osizeH, osizeW);
+  atomicadaptiveaveragegradinput<<<blocks, threads, 0, stream>>>(
+      gradInput_data, gradOutput_data, isizeH, isizeW, osizeH, osizeW);
   MSHADOW_CUDA_POST_KERNEL_CHECK(AdaptiveAvgPoolUpdateGradInput);
 }
 
 NNVM_REGISTER_OP(_contrib_AdaptiveAvgPooling2D)
-.set_attr<FCompute>("FCompute<gpu>", AdaptiveAvgPoolOpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", AdaptiveAvgPoolOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_contrib_AdaptiveAvgPooling2D)
-.set_attr<FCompute>("FCompute<gpu>", AdaptiveAvgPoolOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", AdaptiveAvgPoolOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/allclose_op-inl.h b/src/operator/contrib/allclose_op-inl.h
index c54b2630924c..a3e3a8ff98ba 100644
--- a/src/operator/contrib/allclose_op-inl.h
+++ b/src/operator/contrib/allclose_op-inl.h
@@ -37,29 +37,24 @@ namespace mxnet {
 namespace op {
 
 // Intermediate and Output data types could be integers OR unsigned characters
-#define USE_INTEGER   0
+#define USE_INTEGER 0
 #if USE_INTEGER
-  #define INTERM_DATA_TYPE int32_t
-  #define OUT_DATA_TYPE    mshadow::kInt32
+#define INTERM_DATA_TYPE int32_t
+#define OUT_DATA_TYPE    mshadow::kInt32
 #else
-  #define INTERM_DATA_TYPE uint8_t
-  #define OUT_DATA_TYPE    mshadow::kUint8
+#define INTERM_DATA_TYPE uint8_t
+#define OUT_DATA_TYPE    mshadow::kUint8
 #endif
 
 struct AllCloseParam : public dmlc::Parameter<AllCloseParam> {
   float rtol, atol;
   bool equal_nan;
   DMLC_DECLARE_PARAMETER(AllCloseParam) {
-    DMLC_DECLARE_FIELD(rtol)
-      .set_default(1e-05)
-      .describe("Relative tolerance.");
-    DMLC_DECLARE_FIELD(atol)
-      .set_default(1e-08)
-      .describe("Absolute tolerance.");
-    DMLC_DECLARE_FIELD(equal_nan)
-      .set_default(true)
-      .describe("Whether to compare NaN's as equal. If True, NaN's in A will be considered equal "
-                "to NaN's in B in the output array.");
+    DMLC_DECLARE_FIELD(rtol).set_default(1e-05).describe("Relative tolerance.");
+    DMLC_DECLARE_FIELD(atol).set_default(1e-08).describe("Absolute tolerance.");
+    DMLC_DECLARE_FIELD(equal_nan).set_default(true).describe(
+        "Whether to compare NaN's as equal. If True, NaN's in A will be considered equal "
+        "to NaN's in B in the output array.");
   }
 };
 
@@ -74,8 +69,8 @@ inline bool AllCloseShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool AllCloseType(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -86,44 +81,51 @@ inline bool AllCloseType(const nnvm::NodeAttrs& attrs,
 
 using mshadow::isnan_typed::IsNan;
 
-template<int req>
+template <int req>
 struct allclose_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, INTERM_DATA_TYPE *out_data,
-                                  const DType *in_a, const DType *in_b,
-                                  const float rtol, const float atol, bool equal_nan) {
-      const DType a = in_a[i], b = in_b[i];
-      bool val;
-      if (IsNan(a) || IsNan(b))
-        val = equal_nan && IsNan(a) == IsNan(b);
-      else
-        val = a == b || (a > b?  a - b : b - a) <= atol + (b > 0? rtol * b :  (-rtol) * b);
-
-      KERNEL_ASSIGN(out_data[i], req, val? 1 : 0);
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  INTERM_DATA_TYPE* out_data,
+                                  const DType* in_a,
+                                  const DType* in_b,
+                                  const float rtol,
+                                  const float atol,
+                                  bool equal_nan) {
+    const DType a = in_a[i], b = in_b[i];
+    bool val;
+    if (IsNan(a) || IsNan(b))
+      val = equal_nan && IsNan(a) == IsNan(b);
+    else
+      val = a == b || (a > b ? a - b : b - a) <= atol + (b > 0 ? rtol * b : (-rtol) * b);
+
+    KERNEL_ASSIGN(out_data[i], req, val ? 1 : 0);
   }
 };
 
-template<typename xpu>
-size_t GetAdditionalMemoryLogical(mshadow::Stream<xpu> *s, const int num_items);
+template <typename xpu>
+size_t GetAdditionalMemoryLogical(mshadow::Stream<xpu>* s, const int num_items);
 
-template<typename xpu>
-INTERM_DATA_TYPE *GetAdditionalMemoryLogical(const OpContext& ctx,
-                                             int num_items, size_t *pExtraStorageBytes) {
-// Get length of the additional memory (which is used only by DeviceReduce::Min(...) on gpu)
+template <typename xpu>
+INTERM_DATA_TYPE* GetAdditionalMemoryLogical(const OpContext& ctx,
+                                             int num_items,
+                                             size_t* pExtraStorageBytes) {
+  // Get length of the additional memory (which is used only by DeviceReduce::Min(...) on gpu)
   *pExtraStorageBytes = GetAdditionalMemoryLogical<xpu>(ctx.get_stream<xpu>(), num_items);
   const size_t workspace_total_bytes_ = num_items * sizeof(INTERM_DATA_TYPE) + *pExtraStorageBytes;
-  mshadow::Tensor<xpu, 1, uint8_t> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, uint8_t>(
+  mshadow::Tensor<xpu, 1, uint8_t> workspace = ctx.requested[0].get_space_typed<xpu, 1, uint8_t>(
       mshadow::Shape1(workspace_total_bytes_), ctx.get_stream<xpu>());
 
-  return reinterpret_cast<INTERM_DATA_TYPE *>(workspace.dptr_);
+  return reinterpret_cast<INTERM_DATA_TYPE*>(workspace.dptr_);
 }
 
-template<typename xpu>
-void GetResultLogical(mshadow::Stream<xpu> *s, INTERM_DATA_TYPE *workMem, size_t extraStorageBytes,
-                      int num_items, INTERM_DATA_TYPE *outPntr);
+template <typename xpu>
+void GetResultLogical(mshadow::Stream<xpu>* s,
+                      INTERM_DATA_TYPE* workMem,
+                      size_t extraStorageBytes,
+                      int num_items,
+                      INTERM_DATA_TYPE* outPntr);
 
-template<typename xpu>
+template <typename xpu>
 void AllClose(const nnvm::NodeAttrs& attrs,
               const OpContext& ctx,
               const std::vector<TBlob>& inputs,
@@ -133,24 +135,29 @@ void AllClose(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  const TBlob& in0 = inputs[0];
-  const TBlob& in1 = inputs[1];
+  const TBlob& in0    = inputs[0];
+  const TBlob& in1    = inputs[1];
   const int num_items = in0.Size();
 
   size_t extraStorageBytes;
-  auto workspaceMem = GetAdditionalMemoryLogical<xpu>(ctx, num_items, &extraStorageBytes);
-  auto s = ctx.get_stream<xpu>();
+  auto workspaceMem          = GetAdditionalMemoryLogical<xpu>(ctx, num_items, &extraStorageBytes);
+  auto s                     = ctx.get_stream<xpu>();
   const AllCloseParam& param = nnvm::get<AllCloseParam>(attrs.parsed);
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(in0.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<allclose_forward<req_type>, xpu>::Launch(
-        s, num_items, workspaceMem, in0.dptr<DType>(), in1.dptr<DType>(),
-        param.rtol, param.atol, param.equal_nan);
+      Kernel<allclose_forward<req_type>, xpu>::Launch(s,
+                                                      num_items,
+                                                      workspaceMem,
+                                                      in0.dptr<DType>(),
+                                                      in1.dptr<DType>(),
+                                                      param.rtol,
+                                                      param.atol,
+                                                      param.equal_nan);
     });
   });
 
-  auto *pOut = outputs[0].dptr<INTERM_DATA_TYPE>();
+  auto* pOut = outputs[0].dptr<INTERM_DATA_TYPE>();
   GetResultLogical<xpu>(s, workspaceMem, extraStorageBytes, num_items, pOut);
 }
 
diff --git a/src/operator/contrib/allclose_op.cc b/src/operator/contrib/allclose_op.cc
index 0f69aba523ae..e3eeb4cd1745 100644
--- a/src/operator/contrib/allclose_op.cc
+++ b/src/operator/contrib/allclose_op.cc
@@ -30,7 +30,8 @@ namespace op {
 DMLC_REGISTER_PARAMETER(AllCloseParam);
 
 NNVM_REGISTER_OP(_contrib_allclose)
-.describe(R"code(This operators implements the numpy.allclose(a, b, rtol=1e-05, atol=1e-08, equal_nan=False)
+    .describe(
+        R"code(This operators implements the numpy.allclose(a, b, rtol=1e-05, atol=1e-08, equal_nan=False)
 
 .. math::
 
@@ -53,33 +54,38 @@ Examples::
   y = True
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<AllCloseParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", AllCloseShape)
-.set_attr<nnvm::FInferType>("FInferType", AllCloseType)
-.set_attr<FCompute>("FCompute<cpu>", AllClose<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.add_argument("a", "NDArray-or-Symbol", "Input array a")
-.add_argument("b", "NDArray-or-Symbol", "Input array b")
-.add_arguments(AllCloseParam::__FIELDS__());
+    .set_attr_parser(ParamParser<AllCloseParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", AllCloseShape)
+    .set_attr<nnvm::FInferType>("FInferType", AllCloseType)
+    .set_attr<FCompute>("FCompute<cpu>", AllClose<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("a", "NDArray-or-Symbol", "Input array a")
+    .add_argument("b", "NDArray-or-Symbol", "Input array b")
+    .add_arguments(AllCloseParam::__FIELDS__());
 
-template<>
-size_t GetAdditionalMemoryLogical<cpu>(mshadow::Stream<cpu> *s, const int num_items) {
+template <>
+size_t GetAdditionalMemoryLogical<cpu>(mshadow::Stream<cpu>* s, const int num_items) {
   return 0;
 }
 
-template<>
-void GetResultLogical<cpu>(mshadow::Stream<cpu> *s, INTERM_DATA_TYPE *workMem,
-                           size_t extraStorageBytes, int num_items, INTERM_DATA_TYPE *outPntr) {
-  while (num_items-- > 0 && workMem[num_items]) {}
-  outPntr[0] = num_items >= 0? 0 : 1;
+template <>
+void GetResultLogical<cpu>(mshadow::Stream<cpu>* s,
+                           INTERM_DATA_TYPE* workMem,
+                           size_t extraStorageBytes,
+                           int num_items,
+                           INTERM_DATA_TYPE* outPntr) {
+  while (num_items-- > 0 && workMem[num_items]) {
+  }
+  outPntr[0] = num_items >= 0 ? 0 : 1;
 }
 
 }  // namespace op
diff --git a/src/operator/contrib/allclose_op.cu b/src/operator/contrib/allclose_op.cu
index f923ab060813..0bb40770d10a 100644
--- a/src/operator/contrib/allclose_op.cu
+++ b/src/operator/contrib/allclose_op.cu
@@ -28,31 +28,33 @@
 namespace mxnet {
 namespace op {
 
-template<typename T>
-size_t GetAdditionalMemory(mshadow::Stream<gpu> *s, const int num_items) {
-  T *d_in = nullptr;
-  T *d_out = nullptr;
+template <typename T>
+size_t GetAdditionalMemory(mshadow::Stream<gpu>* s, const int num_items) {
+  T* d_in                   = nullptr;
+  T* d_out                  = nullptr;
   size_t temp_storage_bytes = 0;
-  cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
+  cudaStream_t stream       = mshadow::Stream<gpu>::GetStream(s);
   cub::DeviceReduce::Min(nullptr, temp_storage_bytes, d_in, d_out, num_items, stream);
   return temp_storage_bytes;
 }
 
-template<>
-size_t GetAdditionalMemoryLogical<gpu>(mshadow::Stream<gpu> *s, const int num_items) {
+template <>
+size_t GetAdditionalMemoryLogical<gpu>(mshadow::Stream<gpu>* s, const int num_items) {
   return GetAdditionalMemory<INTERM_DATA_TYPE>(s, num_items);
 }
 
-template<>
-void GetResultLogical<gpu>(mshadow::Stream<gpu> *s, INTERM_DATA_TYPE *workMem,
-                           size_t extraStorageBytes, int num_items, INTERM_DATA_TYPE *outPntr) {
+template <>
+void GetResultLogical<gpu>(mshadow::Stream<gpu>* s,
+                           INTERM_DATA_TYPE* workMem,
+                           size_t extraStorageBytes,
+                           int num_items,
+                           INTERM_DATA_TYPE* outPntr) {
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-  cub::DeviceReduce::Min(workMem + num_items, extraStorageBytes,
-                         workMem, outPntr, num_items, stream);
+  cub::DeviceReduce::Min(
+      workMem + num_items, extraStorageBytes, workMem, outPntr, num_items, stream);
 }
 
-NNVM_REGISTER_OP(_contrib_allclose)
-.set_attr<FCompute>("FCompute<gpu>", AllClose<gpu>);
+NNVM_REGISTER_OP(_contrib_allclose).set_attr<FCompute>("FCompute<gpu>", AllClose<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/batch_norm_relu.cc b/src/operator/contrib/batch_norm_relu.cc
index c35f6c9c9ad8..51193c6433e0 100644
--- a/src/operator/contrib/batch_norm_relu.cc
+++ b/src/operator/contrib/batch_norm_relu.cc
@@ -22,7 +22,7 @@
  * \file batch_norm_relu.cc
  * \brief
  * \author Xinyu Chen
-*/
+ */
 
 #include "../nn/batch_norm-inl.h"
 #include <nnvm/op_attr_types.h>
@@ -37,39 +37,43 @@ namespace op {
 
 namespace batchnormrelu {
 
-enum BatchNormWithReLUOpInputs {kData, kGamma, kBeta, kInMovingMean,
-  kInMovingVar};  // kGamma: weights, kBeta: biases
-enum BatchNormWithReLUOpOutputs {kOut, kMean, kVar, kWorkspace};  // req, out_data
-enum BatchNormWithReLUOpResource {kTempSpace};
-enum BatchNormWithReLUOpAuxiliary {kMovingMean, kMovingVar};  // aux_states
+enum BatchNormWithReLUOpInputs {
+  kData,
+  kGamma,
+  kBeta,
+  kInMovingMean,
+  kInMovingVar
+};  // kGamma: weights, kBeta: biases
+enum BatchNormWithReLUOpOutputs { kOut, kMean, kVar, kWorkspace };  // req, out_data
+enum BatchNormWithReLUOpResource { kTempSpace };
+enum BatchNormWithReLUOpAuxiliary { kMovingMean, kMovingVar };  // aux_states
 
 /*! \brief Default channel axis if none specified in the params */
 constexpr int DEFAULT_AXIS = 1;
 }  // namespace batchnormrelu
 
 static bool BatchNormWithReLUShape(const nnvm::NodeAttrs& attrs,
-                                   mxnet::ShapeVector *in_shape,
-                                   mxnet::ShapeVector *out_shape) {
+                                   mxnet::ShapeVector* in_shape,
+                                   mxnet::ShapeVector* out_shape) {
   const BatchNormParam& param = nnvm::get<BatchNormParam>(attrs.parsed);
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 5U) << "Input:[data, gamma, beta, MovingMean, MovingVar]";
   CHECK_EQ(out_shape->size(), 4U);
-  const mxnet::TShape &dshape = in_shape->at(batchnormrelu::kData);
+  const mxnet::TShape& dshape = in_shape->at(batchnormrelu::kData);
   if (!mxnet::ndim_is_known(dshape)) {
     return false;
   }
 
-  const size_t channelAxis = static_cast<size_t>(param.axis < 0
-      ? static_cast<int>(dshape.ndim()) + param.axis
-      : param.axis);
+  const size_t channelAxis = static_cast<size_t>(
+      param.axis < 0 ? static_cast<int>(dshape.ndim()) + param.axis : param.axis);
   CHECK_LT(channelAxis, dshape.ndim()) << "Channel axis out of range: " << param.axis;
 
   const int channelCount = dshape[channelAxis];
 
-  in_shape->at(batchnormrelu::kGamma) = mxnet::TShape(Shape1(channelCount));
-  in_shape->at(batchnormrelu::kBeta) = mxnet::TShape(Shape1(channelCount));
+  in_shape->at(batchnormrelu::kGamma)        = mxnet::TShape(Shape1(channelCount));
+  in_shape->at(batchnormrelu::kBeta)         = mxnet::TShape(Shape1(channelCount));
   in_shape->at(batchnormrelu::kInMovingMean) = mxnet::TShape(Shape1(channelCount));  // kMovingMean
-  in_shape->at(batchnormrelu::kInMovingVar) = mxnet::TShape(Shape1(channelCount));  // kMovingVar
+  in_shape->at(batchnormrelu::kInMovingVar)  = mxnet::TShape(Shape1(channelCount));  // kMovingVar
 
   out_shape->clear();
   out_shape->push_back(dshape);                // kOut
@@ -80,7 +84,8 @@ static bool BatchNormWithReLUShape(const nnvm::NodeAttrs& attrs,
 }
 
 static bool BatchNormWithReLUType(const nnvm::NodeAttrs& attrs,
-                                  std::vector<int> *in_type, std::vector<int> *out_type) {
+                                  std::vector<int>* in_type,
+                                  std::vector<int>* out_type) {
   using namespace mshadow;
   CHECK_GE(in_type->size(), 1U);
   const size_t n_out = 4;
@@ -93,20 +98,20 @@ static bool BatchNormWithReLUType(const nnvm::NodeAttrs& attrs,
   if (type_is_none(dtype)) {
     // Input type is undefined, we try backward inference
     if (out_type->size() == 0 || type_is_none((*out_type)[0])) {
-       // Neither the input nor the output are defined,
-       // types cannot be infered for this op
-       return false;
+      // Neither the input nor the output are defined,
+      // types cannot be infered for this op
+      return false;
     } else {
-       // Input type is undefined but output type is: backward inference
-       dtype = (*out_type)[0];
-       (*in_type)[0] = dtype;
-       MSHADOW_REAL_TYPE_SWITCH_EX(dtype, DTypeX, AccRealX, {
-         dtype_param = mshadow::DataType<AccRealX>::kFlag; });
+      // Input type is undefined but output type is: backward inference
+      dtype         = (*out_type)[0];
+      (*in_type)[0] = dtype;
+      MSHADOW_REAL_TYPE_SWITCH_EX(
+          dtype, DTypeX, AccRealX, { dtype_param = mshadow::DataType<AccRealX>::kFlag; });
     }
   } else {
     // Input type is defined but output type is not: forward inference
-    MSHADOW_REAL_TYPE_SWITCH_EX(dtype, DTypeX, AccRealX, {
-      dtype_param = mshadow::DataType<AccRealX>::kFlag; });
+    MSHADOW_REAL_TYPE_SWITCH_EX(
+        dtype, DTypeX, AccRealX, { dtype_param = mshadow::DataType<AccRealX>::kFlag; });
     out_type->clear();
     out_type->push_back(dtype);
     for (size_t i = 1; i < n_out; ++i) {
@@ -126,25 +131,26 @@ static bool BatchNormWithReLUType(const nnvm::NodeAttrs& attrs,
 }
 
 #if MXNET_USE_ONEDNN == 1
-static inline bool SupportMKLDNNBNReLU(const NDArray &input, const BatchNormParam &param) {
-  if (mxnet::op::batchnorm::disable_mkl) return false;
+static inline bool SupportMKLDNNBNReLU(const NDArray& input, const BatchNormParam& param) {
+  if (mxnet::op::batchnorm::disable_mkl)
+    return false;
   const mxnet::TShape shape = input.shape();
-  const int ndim = shape.ndim();
-  if (ndim == 0 || shape.Size() == 0) return false;
+  const int ndim            = shape.ndim();
+  if (ndim == 0 || shape.Size() == 0)
+    return false;
   const int dtype = input.dtype();
-  return (dtype == mshadow::kFloat32 ||
-          dtype == mshadow::kBfloat16) &&
-          SupportStorageMKLDNN(input.storage_type());
+  return (dtype == mshadow::kFloat32 || dtype == mshadow::kBfloat16) &&
+         SupportStorageMKLDNN(input.storage_type());
 }
 
-void BatchNormWithReLUComputeExCPU(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<NDArray> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<NDArray> &outputs) {
+void BatchNormWithReLUComputeExCPU(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const std::vector<NDArray>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 5U);
-  const BatchNormParam &param = nnvm::get<BatchNormParam>(attrs.parsed);
-  bool fuse_relu = true;
+  const BatchNormParam& param = nnvm::get<BatchNormParam>(attrs.parsed);
+  bool fuse_relu              = true;
   if (SupportMKLDNNBNReLU(inputs[0], param)) {
     CHECK_GT(outputs.size(), 3U);
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
@@ -156,45 +162,45 @@ void BatchNormWithReLUComputeExCPU(const nnvm::NodeAttrs &attrs,
   LOG(FATAL) << "BatchNormWithReLU operator only supports MKL-DNN Backend.";
 }
 
-void BatchNormWithReLUGradComputeExCPU(const nnvm::NodeAttrs &attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<NDArray> &inputs,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<NDArray> &outputs) {
-  const BatchNormParam &param = nnvm::get<BatchNormParam>(attrs.parsed);
-  bool fuse_relu = true;
+void BatchNormWithReLUGradComputeExCPU(const nnvm::NodeAttrs& attrs,
+                                       const OpContext& ctx,
+                                       const std::vector<NDArray>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<NDArray>& outputs) {
+  const BatchNormParam& param = nnvm::get<BatchNormParam>(attrs.parsed);
+  bool fuse_relu              = true;
   if (SupportMKLDNNBNReLU(inputs[0], param)) {
-      CHECK_EQ(inputs.size(), 9U);
-      MKLDNN_OPCHECK_INIT(true, outputs.size(), inputs, outputs);
-      MKLDNNBatchNormBackward<float>(attrs, ctx, inputs, req, outputs, fuse_relu);
-      return;
+    CHECK_EQ(inputs.size(), 9U);
+    MKLDNN_OPCHECK_INIT(true, outputs.size(), inputs, outputs);
+    MKLDNNBatchNormBackward<float>(attrs, ctx, inputs, req, outputs, fuse_relu);
+    return;
   }
   LOG(FATAL) << "BatchNormWithReLU operator only supports MKL-DNN Backend.";
 }
 #endif
 
-static inline bool BatchNormWithReLUStorageType(const nnvm::NodeAttrs &attrs,
+static inline bool BatchNormWithReLUStorageType(const nnvm::NodeAttrs& attrs,
                                                 const int dev_mask,
-                                                DispatchMode *dispatch_mode,
-                                                std::vector<int> *in_attrs,
-                                                std::vector<int> *out_attrs) {
-  const BatchNormParam &param = nnvm::get<BatchNormParam>(attrs.parsed);
+                                                DispatchMode* dispatch_mode,
+                                                std::vector<int>* in_attrs,
+                                                std::vector<int>* out_attrs) {
+  const BatchNormParam& param = nnvm::get<BatchNormParam>(attrs.parsed);
 
   bool dispatched = false;
 #if MXNET_USE_ONEDNN == 1
   if (!dispatched) {
-    dispatched = MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode,
-                                   in_attrs, out_attrs);
+    dispatched = MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
   }
   if (!MKLDNNEnvSet()) {
     *dispatch_mode = DispatchMode::kFComputeFallback;
   }
 #else
   for (int& v : *in_attrs)
-    if (v == - 1) v = kDefaultStorage;
+    if (v == -1)
+      v = kDefaultStorage;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -225,10 +231,10 @@ std::vector<nnvm::NodeEntry> BatchNormWithReLUGrad(const nnvm::ObjectPtr& n,
   heads.emplace_back(out_data.at(batchnormrelu::kWorkspace));
 
   nnvm::ObjectPtr gnode = nnvm::Node::Create();
-  gnode->inputs = std::move(heads);
+  gnode->inputs         = std::move(heads);
   gnode->control_deps.emplace_back(n);
-  gnode->attrs = n->attrs;
-  gnode->attrs.op = nnvm::Op::Get("_backward_contrib_BatchNormWithReLU");
+  gnode->attrs      = n->attrs;
+  gnode->attrs.op   = nnvm::Op::Get("_backward_contrib_BatchNormWithReLU");
   gnode->attrs.name = n->attrs.name + "_backward";
   // The input of batchnorm
   std::vector<nnvm::NodeEntry> in_grad;
@@ -237,8 +243,8 @@ std::vector<nnvm::NodeEntry> BatchNormWithReLUGrad(const nnvm::ObjectPtr& n,
     in_grad.emplace_back(gnode, i, 0);
   // attach no gradient node to forbid gradient on aux_state
   nnvm::ObjectPtr ng = nnvm::Node::Create();
-  ng->attrs.op = Op::Get("_NoGradient");
-  ng->attrs.name = "NoGradient";
+  ng->attrs.op       = Op::Get("_NoGradient");
+  ng->attrs.name     = "NoGradient";
   // the aux state of batchnorm
   for (size_t i = 3; i < 5; ++i)
     in_grad.emplace_back(ng);
@@ -246,74 +252,81 @@ std::vector<nnvm::NodeEntry> BatchNormWithReLUGrad(const nnvm::ObjectPtr& n,
 }
 
 NNVM_REGISTER_OP(_contrib_BatchNormWithReLU)
-.add_alias("_npx_batch_norm_with_relu")
-.describe(R"code(Batch normalization with ReLU fusion.
+    .add_alias("_npx_batch_norm_with_relu")
+    .describe(R"code(Batch normalization with ReLU fusion.
 
 An extented operator of Batch normalization which can fuse ReLU activation.
 
 )code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(4)
-.set_attr_parser(ParamParser<BatchNormParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "gamma", "beta", "moving_mean", "moving_var"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "mean", "var", "workspace"};
-})
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  const BatchNormParam& param = nnvm::get<BatchNormParam>(attrs.parsed);
-  return param.output_mean_var ? 3 : 1;
-})
-.set_attr<nnvm::FMutateInputs>("FMutateInputs", [](const nnvm::NodeAttrs& attrs) {
-  return std::vector<uint32_t>{3, 4};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BatchNormWithReLUShape)
-.set_attr<nnvm::FInferType>("FInferType", BatchNormWithReLUType)
-.set_attr<FInferStorageType>("FInferStorageType", BatchNormWithReLUStorageType)
+    .set_num_inputs(5)
+    .set_num_outputs(4)
+    .set_attr_parser(ParamParser<BatchNormParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "gamma", "beta", "moving_mean", "moving_var"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "mean", "var", "workspace"};
+        })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) {
+                                          const BatchNormParam& param =
+                                              nnvm::get<BatchNormParam>(attrs.parsed);
+                                          return param.output_mean_var ? 3 : 1;
+                                        })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{3, 4};
+                                   })
+    .set_attr<mxnet::FInferShape>("FInferShape", BatchNormWithReLUShape)
+    .set_attr<nnvm::FInferType>("FInferType", BatchNormWithReLUType)
+    .set_attr<FInferStorageType>("FInferStorageType", BatchNormWithReLUStorageType)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FComputeEx>("FComputeEx<cpu>", BatchNormWithReLUComputeExCPU)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BatchNormWithReLUComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", BatchNormWithReLUGrad)
+    .set_attr<nnvm::FGradient>("FGradient", BatchNormWithReLUGrad)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.add_argument("data", "NDArray-or-Symbol", "Input data to batch normalization")
-.add_argument("gamma", "NDArray-or-Symbol", "gamma array")
-.add_argument("beta", "NDArray-or-Symbol", "beta array")
-.add_argument("moving_mean", "NDArray-or-Symbol", "running mean of input")
-.add_argument("moving_var", "NDArray-or-Symbol", "running variance of input")
-.add_arguments(BatchNormParam::__FIELDS__())
-.set_attr<nnvm::FSetInputVarAttrOnCompose>(
-  "FSetInputVarAttrOnCompose",
-  [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
-    if (var->attrs.dict.find("__init__") != var->attrs.dict.end()) return;
-    if (index == 3) {
-      var->attrs.dict["__init__"] = "[\"zero\", {}]";
-    } else if (index == 4) {
-      var->attrs.dict["__init__"] = "[\"one\", {}]";
-    }
-  });
+    .add_argument("data", "NDArray-or-Symbol", "Input data to batch normalization")
+    .add_argument("gamma", "NDArray-or-Symbol", "gamma array")
+    .add_argument("beta", "NDArray-or-Symbol", "beta array")
+    .add_argument("moving_mean", "NDArray-or-Symbol", "running mean of input")
+    .add_argument("moving_var", "NDArray-or-Symbol", "running variance of input")
+    .add_arguments(BatchNormParam::__FIELDS__())
+    .set_attr<nnvm::FSetInputVarAttrOnCompose>(
+        "FSetInputVarAttrOnCompose",
+        [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
+          if (var->attrs.dict.find("__init__") != var->attrs.dict.end())
+            return;
+          if (index == 3) {
+            var->attrs.dict["__init__"] = "[\"zero\", {}]";
+          } else if (index == 4) {
+            var->attrs.dict["__init__"] = "[\"one\", {}]";
+          }
+        });
 
 NNVM_REGISTER_OP(_backward_contrib_BatchNormWithReLU)
-.set_num_inputs(9)
-.set_num_outputs(3)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", BatchNormWithReLUStorageType)
+    .set_num_inputs(9)
+    .set_num_outputs(3)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BatchNormWithReLUStorageType)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BatchNormWithReLUGradComputeExCPU)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BatchNormWithReLUGradComputeExCPU)
 #endif
-.set_attr_parser(ParamParser<BatchNormParam>);
+    .set_attr_parser(ParamParser<BatchNormParam>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/bilinear_resize-inl.h b/src/operator/contrib/bilinear_resize-inl.h
index 6032c881ed46..580d63868f7f 100644
--- a/src/operator/contrib/bilinear_resize-inl.h
+++ b/src/operator/contrib/bilinear_resize-inl.h
@@ -21,7 +21,7 @@
  * \file bilinear_resize-inl.h
  * \brief bilinear resize operator
  * \author Hang Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_BILINEAR_RESIZE_INL_H_
 #define MXNET_OPERATOR_CONTRIB_BILINEAR_RESIZE_INL_H_
 
@@ -45,11 +45,17 @@
 #include "../mshadow_op.h"
 
 namespace bilinear_resize {
-enum BilinearResizeOpMode{simple, odd_scale, like, to_even_down, to_even_up, to_odd_down,
-  to_odd_up};
+enum BilinearResizeOpMode {
+  simple,
+  odd_scale,
+  like,
+  to_even_down,
+  to_even_up,
+  to_odd_down,
+  to_odd_up
+};
 }  // namespace bilinear_resize
 
-
 namespace mxnet {
 namespace op {
 
@@ -61,54 +67,60 @@ struct BilinearSampleParam : public dmlc::Parameter<BilinearSampleParam> {
   int mode;
   bool align_corners;
   DMLC_DECLARE_PARAMETER(BilinearSampleParam) {
-    DMLC_DECLARE_FIELD(height).set_default(1).set_lower_bound(1)
-    .describe("output height (required, but ignored if scale_height is defined or mode is not "
-              "\"size\")");
-    DMLC_DECLARE_FIELD(width).set_default(1).set_lower_bound(1)
-    .describe("output width (required, but ignored if scale_width is defined or mode is not "
-              "\"size\")");
-    DMLC_DECLARE_FIELD(scale_height).set_default(dmlc::optional<float>())
-    .describe("sampling scale of the height (optional, used in modes \"scale\" and \"odd_scale\")");
-    DMLC_DECLARE_FIELD(scale_width).set_default(dmlc::optional<float>())
-    .describe("sampling scale of the width (optional, used in modes \"scale\" and \"odd_scale\")");
+    DMLC_DECLARE_FIELD(height).set_default(1).set_lower_bound(1).describe(
+        "output height (required, but ignored if scale_height is defined or mode is not "
+        "\"size\")");
+    DMLC_DECLARE_FIELD(width).set_default(1).set_lower_bound(1).describe(
+        "output width (required, but ignored if scale_width is defined or mode is not "
+        "\"size\")");
+    DMLC_DECLARE_FIELD(scale_height)
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "sampling scale of the height (optional, used in modes \"scale\" and \"odd_scale\")");
+    DMLC_DECLARE_FIELD(scale_width)
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "sampling scale of the width (optional, used in modes \"scale\" and \"odd_scale\")");
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("size", bilinear_resize::simple)
-    .add_enum("odd_scale", bilinear_resize::odd_scale)
-    .add_enum("like", bilinear_resize::like)
-    .add_enum("to_even_down", bilinear_resize::to_even_down)
-    .add_enum("to_even_up", bilinear_resize::to_even_up)
-    .add_enum("to_odd_down", bilinear_resize::to_odd_down)
-    .add_enum("to_odd_up", bilinear_resize::to_odd_up)
-    .set_default(bilinear_resize::simple)
-    .describe("resizing mode. \"simple\" - output height equals parameter \"height\" if "
-              "\"scale_height\" parameter is not defined or input height multiplied by "
-              "\"scale_height\" otherwise. Same for width;"
-              "\"odd_scale\" - if original height or width is odd, then result height is "
-              "calculated like result_h = (original_h - 1) * scale + 1; "
-              "for scale > 1 the result shape would be like if we did deconvolution with kernel "
-              "= (1, 1) and stride = (height_scale, width_scale); and for scale < 1 shape "
-              "would be like we did convolution with kernel = (1, 1) and "
-              "stride = (int(1 / height_scale), int( 1/ width_scale);"
-              "\"like\" - resize first input to the height and width of second input; "
-              "\"to_even_down\" - resize input to nearest lower even height and width "
-              "(if original height is odd then result height = original height - 1);"
-              "\"to_even_up\" - resize input to nearest bigger even height and width "
-              "(if original height is odd then result height = original height + 1);"
-              "\"to_odd_down\" - resize input to nearest odd height and width "
-              "(if original height is odd then result height = original height - 1);"
-              "\"to_odd_up\" - resize input to nearest odd height and width "
-              "(if original height is odd then result height = original height + 1);");
-  DMLC_DECLARE_FIELD(align_corners).set_default(true)
-    .describe("With align_corners = True, the interpolating doesn't proportionally align the"
-              "output and input pixels, and thus the output values can depend on the input size.");
+        .add_enum("size", bilinear_resize::simple)
+        .add_enum("odd_scale", bilinear_resize::odd_scale)
+        .add_enum("like", bilinear_resize::like)
+        .add_enum("to_even_down", bilinear_resize::to_even_down)
+        .add_enum("to_even_up", bilinear_resize::to_even_up)
+        .add_enum("to_odd_down", bilinear_resize::to_odd_down)
+        .add_enum("to_odd_up", bilinear_resize::to_odd_up)
+        .set_default(bilinear_resize::simple)
+        .describe(
+            "resizing mode. \"simple\" - output height equals parameter \"height\" if "
+            "\"scale_height\" parameter is not defined or input height multiplied by "
+            "\"scale_height\" otherwise. Same for width;"
+            "\"odd_scale\" - if original height or width is odd, then result height is "
+            "calculated like result_h = (original_h - 1) * scale + 1; "
+            "for scale > 1 the result shape would be like if we did deconvolution with kernel "
+            "= (1, 1) and stride = (height_scale, width_scale); and for scale < 1 shape "
+            "would be like we did convolution with kernel = (1, 1) and "
+            "stride = (int(1 / height_scale), int( 1/ width_scale);"
+            "\"like\" - resize first input to the height and width of second input; "
+            "\"to_even_down\" - resize input to nearest lower even height and width "
+            "(if original height is odd then result height = original height - 1);"
+            "\"to_even_up\" - resize input to nearest bigger even height and width "
+            "(if original height is odd then result height = original height + 1);"
+            "\"to_odd_down\" - resize input to nearest odd height and width "
+            "(if original height is odd then result height = original height - 1);"
+            "\"to_odd_up\" - resize input to nearest odd height and width "
+            "(if original height is odd then result height = original height + 1);");
+    DMLC_DECLARE_FIELD(align_corners)
+        .set_default(true)
+        .describe(
+            "With align_corners = True, the interpolating doesn't proportionally align the"
+            "output and input pixels, and thus the output values can depend on the input size.");
   }
 };
 
 template <typename DType>
-static inline DType area_pixel_compute_scale(
-  int64_t input_size,
-  int64_t output_size,
-  bool align_corners) {
+static inline DType area_pixel_compute_scale(int64_t input_size,
+                                             int64_t output_size,
+                                             bool align_corners) {
   /* We view each pixel as an area, idx + 0.5 as its center index.
    * Here is an example formula in 1D case.
    * if align_corners: center of two corner pixel areas are preserved,
@@ -121,20 +133,18 @@ static inline DType area_pixel_compute_scale(
    *     src_idx + 0.5 = scale * (dst_index + 0.5)
    */
   if (output_size > 1) {
-    return align_corners
-      ? static_cast<DType>(input_size - 1) / (output_size - 1)
-      : static_cast<DType>(input_size) / output_size;
+    return align_corners ? static_cast<DType>(input_size - 1) / (output_size - 1)
+                         : static_cast<DType>(input_size) / output_size;
   } else {
     return DType(0);
   }
 }
 
 template <typename DType>
-static inline DType area_pixel_compute_source_index(
-  DType scale,
-  int64_t dst_index,
-  bool align_corners,
-  bool cubic) {
+static inline DType area_pixel_compute_source_index(DType scale,
+                                                    int64_t dst_index,
+                                                    bool align_corners,
+                                                    bool cubic) {
   if (align_corners) {
     return scale * dst_index;
   } else {
@@ -159,99 +169,95 @@ static inline bool IsWriting(const OpReqType ort) {
   return ort == kWriteTo || ort == kWriteInplace;
 }
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<cpu> *s,
-                                           const std::vector<TBlob> &input,
-                                           const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<cpu>* s,
+                                           const std::vector<TBlob>& input,
+                                           const std::vector<TBlob>& output,
                                            bool align_corners);
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu> *s,
-                                              const std::vector<TBlob> &input,
-                                              const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu>* s,
+                                              const std::vector<TBlob>& input,
+                                              const std::vector<TBlob>& output,
                                               bool modeLike,
                                               bool align_corners);
 
 #if MXNET_USE_CUDA
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<gpu> *s,
-                                           const std::vector<TBlob> &input,
-                                           const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<gpu>* s,
+                                           const std::vector<TBlob>& input,
+                                           const std::vector<TBlob>& output,
                                            bool align_corners);
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<gpu> *s,
-                                              const std::vector<TBlob> &input,
-                                              const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<gpu>* s,
+                                              const std::vector<TBlob>& input,
+                                              const std::vector<TBlob>& output,
                                               bool modeLike,
                                               bool align_corners);
 #endif  // MXNET_USE_CUDA
 
 template <typename xpu>
 inline void BilinearSampleOpForward(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<TBlob> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<TBlob> &outputs) {
+                                    const OpContext& ctx,
+                                    const std::vector<TBlob>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<TBlob>& outputs) {
   const BilinearSampleParam& param = nnvm::get<BilinearSampleParam>(attrs.parsed);
-  size_t expected = param.mode == bilinear_resize::like ? 2 : 1;
+  size_t expected                  = param.mode == bilinear_resize::like ? 2 : 1;
   CHECK_EQ(inputs.size(), expected);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs[0].CheckContiguous(), true);
   if (expected == 2) {
-  CHECK_EQ(inputs[1].CheckContiguous(), true);
+    CHECK_EQ(inputs[1].CheckContiguous(), true);
   }
   CHECK_EQ(outputs[0].CheckContiguous(), true);
 
-  bool align_corners = param.align_corners;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  bool align_corners      = param.align_corners;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH_EX(inputs[0].type_flag_, DType, AccReal, {
     SpatialUpSamplingBilinearUpdateOutput<xpu, DType, AccReal>(s, inputs, outputs, align_corners);
   });
 }
 
-
 template <typename xpu>
 inline void BilinearSampleOpBackward(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<TBlob> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<TBlob> &outputs) {
+                                     const OpContext& ctx,
+                                     const std::vector<TBlob>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<TBlob>& outputs) {
   const BilinearSampleParam& param = nnvm::get<BilinearSampleParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), 1U);
-  bool modeLike = param.mode == bilinear_resize::like;
+  bool modeLike      = param.mode == bilinear_resize::like;
   bool align_corners = param.align_corners;
-  size_t expected = modeLike ? 2 : 1;
+  size_t expected    = modeLike ? 2 : 1;
   CHECK_EQ(outputs.size(), expected);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   if (IsWriting(req[0])) {
     // zero grad before backwarding
-    MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      Fill<false>(s, outputs[0], kWriteTo, 0);
-    })
+    MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, { Fill<false>(s, outputs[0], kWriteTo, 0); })
   }
   MSHADOW_REAL_TYPE_SWITCH_EX(inputs[0].type_flag_, DType, AccReal, {
-    SpatialUpSamplingBilinearUpdateGradInput<xpu, DType, AccReal>(s, inputs, outputs
-      , modeLike, align_corners);
+    SpatialUpSamplingBilinearUpdateGradInput<xpu, DType, AccReal>(
+        s, inputs, outputs, modeLike, align_corners);
   });
 }
 
-
 static bool BilinearSampleOpInferShape(const nnvm::NodeAttrs& attrs,
-                                       mxnet::ShapeVector *in_shape,
-                                       mxnet::ShapeVector *out_shape) {
+                                       mxnet::ShapeVector* in_shape,
+                                       mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   CHECK_EQ(out_shape->size(), 1U) << "Output:[data]";
   const BilinearSampleParam& param = nnvm::get<BilinearSampleParam>(attrs.parsed);
-  size_t expected = param.mode == bilinear_resize::like ? 2 : 1;
+  size_t expected                  = param.mode == bilinear_resize::like ? 2 : 1;
   CHECK_EQ(in_shape->size(), expected);
   mxnet::TShape dshape(in_shape->at(0));
-  if (mxnet::op::shape_is_none(dshape)) return false;
+  if (mxnet::op::shape_is_none(dshape))
+    return false;
   int16_t new_height = -1;
-  int16_t new_width = -1;
+  int16_t new_width  = -1;
   switch (param.mode) {
-    case bilinear_resize::simple:
-    {
+    case bilinear_resize::simple: {
       if (param.scale_height.has_value()) {
         new_height = static_cast<int>(param.scale_height.value() * in_shape->at(0)[2]);
       } else {
@@ -264,48 +270,44 @@ static bool BilinearSampleOpInferShape(const nnvm::NodeAttrs& attrs,
       }
       break;
     }
-    case bilinear_resize::odd_scale:
-    {
-      new_height = ((dshape[2] % 2) == 0) ? (int16_t) (dshape[2] * param.scale_height.value()) :
-                   (int16_t) ((dshape[2] - 1) * param.scale_height.value()) + 1;
-      new_width = ((dshape[3] % 2) == 0) ? (int16_t) (dshape[3] * param.scale_width.value()) :
-                  (int16_t) ((dshape[3] - 1) * param.scale_width.value()) + 1;
+    case bilinear_resize::odd_scale: {
+      new_height = ((dshape[2] % 2) == 0)
+                       ? (int16_t)(dshape[2] * param.scale_height.value())
+                       : (int16_t)((dshape[2] - 1) * param.scale_height.value()) + 1;
+      new_width  = ((dshape[3] % 2) == 0)
+                       ? (int16_t)(dshape[3] * param.scale_width.value())
+                       : (int16_t)((dshape[3] - 1) * param.scale_width.value()) + 1;
       break;
     }
-    case bilinear_resize::like:
-    {
+    case bilinear_resize::like: {
       TShape like_shape(in_shape->at(1));
-      if (dshape.ndim() == 0) return false;
+      if (dshape.ndim() == 0)
+        return false;
       new_height = like_shape[2];
-      new_width = like_shape[3];
+      new_width  = like_shape[3];
       break;
     }
-    case bilinear_resize::to_even_down:
-    {
+    case bilinear_resize::to_even_down: {
       new_height = ((dshape[2] % 2) == 0) ? dshape[2] : dshape[2] - 1;
-      new_width = ((dshape[3] % 2) == 0) ? dshape[3] : dshape[3] - 1;
+      new_width  = ((dshape[3] % 2) == 0) ? dshape[3] : dshape[3] - 1;
       break;
     }
-    case bilinear_resize::to_even_up:
-    {
+    case bilinear_resize::to_even_up: {
       new_height = ((dshape[2] % 2) == 0) ? dshape[2] : dshape[2] + 1;
-      new_width = ((dshape[3] % 2) == 0) ? dshape[3] : dshape[3] + 1;
+      new_width  = ((dshape[3] % 2) == 0) ? dshape[3] : dshape[3] + 1;
       break;
     }
-    case bilinear_resize::to_odd_down:
-    {
+    case bilinear_resize::to_odd_down: {
       new_height = ((dshape[2] % 2) == 1) ? dshape[2] : dshape[2] - 1;
-      new_width = ((dshape[3] % 2) == 1) ? dshape[3] : dshape[3] - 1;
+      new_width  = ((dshape[3] % 2) == 1) ? dshape[3] : dshape[3] - 1;
       break;
     }
-    case bilinear_resize::to_odd_up:
-    {
+    case bilinear_resize::to_odd_up: {
       new_height = ((dshape[2] % 2) == 1) ? dshape[2] : dshape[2] + 1;
-      new_width = ((dshape[3] % 2) == 1) ? dshape[3] : dshape[3] + 1;
+      new_width  = ((dshape[3] % 2) == 1) ? dshape[3] : dshape[3] + 1;
       break;
     }
-    default:
-    {
+    default: {
       LOG(FATAL) << "Invalid mode " << param.mode;
     }
   }
@@ -318,7 +320,6 @@ static bool BilinearSampleOpInferShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-
 inline uint16_t BilinearSampleOpNumInputs(const NodeAttrs& attrs) {
   auto& param = nnvm::get<BilinearSampleParam>(attrs.parsed);
   if (param.mode == bilinear_resize::like) {
diff --git a/src/operator/contrib/bilinear_resize.cc b/src/operator/contrib/bilinear_resize.cc
index 399a5a79bd56..61b3446bd2ab 100644
--- a/src/operator/contrib/bilinear_resize.cc
+++ b/src/operator/contrib/bilinear_resize.cc
@@ -21,7 +21,7 @@
  * \file bilinear_resize.cc
  * \brief bilinear resize operator
  * \author Hang Zhang
-*/
+ */
 #include "bilinear_resize-inl.h"
 #include "../elemwise_op_common.h"
 
@@ -30,38 +30,38 @@ namespace op {
 
 using namespace mshadow;
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<cpu> *s,
-                                           const std::vector<TBlob> &input,
-                                           const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<cpu>* s,
+                                           const std::vector<TBlob>& input,
+                                           const std::vector<TBlob>& output,
                                            bool align_corners) {
   Tensor<xpu, 4, DType> itensor = input[0].get<xpu, 4, DType>(s);
   Tensor<xpu, 4, DType> otensor = output[0].get<xpu, 4, DType>(s);
-  int nbatch = otensor.size(0);
-  int channels = otensor.size(1);
-  int outputHeight = otensor.size(2);
-  int outputWidth = otensor.size(3);
-  int inputHeight = itensor.size(2);
-  int inputWidth = itensor.size(3);
+  int nbatch                    = otensor.size(0);
+  int channels                  = otensor.size(1);
+  int outputHeight              = otensor.size(2);
+  int outputWidth               = otensor.size(3);
+  int inputHeight               = itensor.size(2);
+  int inputWidth                = itensor.size(3);
 
   const auto nthreads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 
-  DType *idata = itensor.dptr_;
-  DType *odata = otensor.dptr_;
-  channels = nbatch * channels;
-  const int input_elems_per_channel = inputWidth * inputHeight;
+  DType* idata                       = itensor.dptr_;
+  DType* odata                       = otensor.dptr_;
+  channels                           = nbatch * channels;
+  const int input_elems_per_channel  = inputWidth * inputHeight;
   const int output_elems_per_channel = outputWidth * outputHeight;
 
   // special case: just copy
   if (inputHeight == outputHeight && inputWidth == outputWidth) {
 #pragma omp parallel for num_threads(nthreads)
     for (int index = 0; index < output_elems_per_channel; index++) {
-      const int h2 = index / outputWidth;
-      const int h1 = h2;
-      const int w2 = index % outputWidth;
-      const int w1 = w2;
+      const int h2      = index / outputWidth;
+      const int h1      = h2;
+      const int w2      = index % outputWidth;
+      const int w1      = w2;
       const DType* pos1 = &idata[h1 * inputWidth + w1];
-      DType* pos2 = &odata[index];
+      DType* pos2       = &odata[index];
       for (int c = 0; c < channels; ++c) {
         *pos2 = *pos1;
         pos1 += input_elems_per_channel;
@@ -70,75 +70,71 @@ void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<cpu> *s,
     }
     return;
   }
-  const float rheight = area_pixel_compute_scale<float>(
-    inputHeight, outputHeight, align_corners);
-  const float rwidth = area_pixel_compute_scale<float>(
-    inputWidth, outputWidth, align_corners);
+  const float rheight = area_pixel_compute_scale<float>(inputHeight, outputHeight, align_corners);
+  const float rwidth  = area_pixel_compute_scale<float>(inputWidth, outputWidth, align_corners);
 
 #pragma omp parallel for num_threads(nthreads)
   for (int index = 0; index < output_elems_per_channel; index++) {
     const int h2 = index / outputWidth;
     const int w2 = index % outputWidth;
 
-  const float h1r = area_pixel_compute_source_index<float>(
-    rheight, h2, align_corners, false);
-    const int h1 = h1r;
-    const int h1p = (h1 < inputHeight - 1) ? 1 : 0;
+    const float h1r = area_pixel_compute_source_index<float>(rheight, h2, align_corners, false);
+    const int h1    = h1r;
+    const int h1p   = (h1 < inputHeight - 1) ? 1 : 0;
     const DType h1lambda = h1r - h1;
     const DType h0lambda = (DType)1. - h1lambda;
 
-  const float w1r = area_pixel_compute_source_index<float>(
-    rwidth, w2, align_corners, false);
-    const int w1 = w1r;
-    const int w1p = (w1 < inputWidth - 1) ? 1 : 0;
+    const float w1r      = area_pixel_compute_source_index<float>(rwidth, w2, align_corners, false);
+    const int w1         = w1r;
+    const int w1p        = (w1 < inputWidth - 1) ? 1 : 0;
     const DType w1lambda = w1r - w1;
     const DType w0lambda = (DType)1. - w1lambda;
-    const DType* pos1 = &idata[h1 * inputWidth + w1];
-    DType* pos2 = &odata[index];
+    const DType* pos1    = &idata[h1 * inputWidth + w1];
+    DType* pos2          = &odata[index];
 
     for (int c = 0; c < channels; ++c) {
-      *pos2 = h0lambda * (w0lambda * (*pos1) + w1lambda * *(pos1 + w1p))
-            + h1lambda * (w0lambda * *(pos1 + h1p * inputWidth)
-            + w1lambda * *(pos1 + h1p * inputWidth + w1p));
+      *pos2 = h0lambda * (w0lambda * (*pos1) + w1lambda * *(pos1 + w1p)) +
+              h1lambda * (w0lambda * *(pos1 + h1p * inputWidth) +
+                          w1lambda * *(pos1 + h1p * inputWidth + w1p));
       pos1 += input_elems_per_channel;
       pos2 += output_elems_per_channel;
     }
   }
 }
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu> *s,
-                                              const std::vector<TBlob> &input,
-                                              const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu>* s,
+                                              const std::vector<TBlob>& input,
+                                              const std::vector<TBlob>& output,
                                               bool modeLike,
                                               bool align_corners) {
   Tensor<xpu, 4, DType> gradOutput = input[0].get<xpu, 4, DType>(s);
-  Tensor<xpu, 4, DType> gradInput = output[0].get<xpu, 4, DType>(s);
+  Tensor<xpu, 4, DType> gradInput  = output[0].get<xpu, 4, DType>(s);
 
-  int nbatch = gradInput.size(0);
-  int channels = gradInput.size(1);
+  int nbatch       = gradInput.size(0);
+  int channels     = gradInput.size(1);
   int outputHeight = gradOutput.size(2);
-  int outputWidth = gradOutput.size(3);
-  int inputHeight = gradInput.size(2);
-  int inputWidth = gradInput.size(3);
+  int outputWidth  = gradOutput.size(3);
+  int inputHeight  = gradInput.size(2);
+  int inputWidth   = gradInput.size(3);
 
   const auto nthreads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 
-  DType *dataInput = gradInput.dptr_;
-  DType *dataOutput = gradOutput.dptr_;
-  channels = nbatch * channels;
-  const int input_elems_per_channel = inputWidth * inputHeight;
+  DType* dataInput                   = gradInput.dptr_;
+  DType* dataOutput                  = gradOutput.dptr_;
+  channels                           = nbatch * channels;
+  const int input_elems_per_channel  = inputWidth * inputHeight;
   const int output_elems_per_channel = outputWidth * outputHeight;
 
   // special case: same-size matching grids
   if (inputHeight == outputHeight && inputWidth == outputWidth) {
 #pragma omp parallel for num_threads(nthreads)
     for (int index = 0; index < output_elems_per_channel; index++) {
-      const int h2 = index / outputWidth;
-      const int h1 = h2;
-      const int w2 = index % outputWidth;
-      const int w1 = w2;
-      DType* pos1 = &dataInput[h1 * inputWidth + w1];
+      const int h2      = index / outputWidth;
+      const int h1      = h2;
+      const int w2      = index % outputWidth;
+      const int w1      = w2;
+      DType* pos1       = &dataInput[h1 * inputWidth + w1];
       const DType* pos2 = &dataOutput[index];
       for (int c = 0; c < channels; ++c) {
         *pos1 += *pos2;
@@ -148,33 +144,29 @@ void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu> *s,
     }
     return;
   }
-  const float rheight = area_pixel_compute_scale<float>(
-    inputHeight, outputHeight, align_corners);
-  const float rwidth = area_pixel_compute_scale<float>(
-    inputWidth, outputWidth, align_corners);
+  const float rheight = area_pixel_compute_scale<float>(inputHeight, outputHeight, align_corners);
+  const float rwidth  = area_pixel_compute_scale<float>(inputWidth, outputWidth, align_corners);
 #pragma omp parallel for num_threads(nthreads)
   for (int index = 0; index < output_elems_per_channel; index++) {
     const int h2 = index / outputWidth;
     const int w2 = index % outputWidth;
 
-    const float h1r = area_pixel_compute_source_index<float>(
-        rheight, h2, align_corners, false);
-    const int h1 = h1r;
-    const int h1p = (h1 < inputHeight - 1) ? 1 : 0;
+    const float h1r = area_pixel_compute_source_index<float>(rheight, h2, align_corners, false);
+    const int h1    = h1r;
+    const int h1p   = (h1 < inputHeight - 1) ? 1 : 0;
     const DType h1lambda = h1r - h1;
     const DType h0lambda = (DType)1. - h1lambda;
 
-    const float w1r = area_pixel_compute_source_index<float>(
-        rwidth, w2, align_corners, false);
-    const int w1 = w1r;
-    const int w1p = (w1 < inputWidth - 1) ? 1 : 0;
+    const float w1r      = area_pixel_compute_source_index<float>(rwidth, w2, align_corners, false);
+    const int w1         = w1r;
+    const int w1p        = (w1 < inputWidth - 1) ? 1 : 0;
     const DType w1lambda = w1r - w1;
     const DType w0lambda = (DType)1. - w1lambda;
 
-    DType* posInput = &dataInput[h1 * inputWidth + w1];
+    DType* posInput        = &dataInput[h1 * inputWidth + w1];
     const DType* posOutput = &dataOutput[index];
     for (int c = 0; c < channels; ++c) {
-      #pragma omp critical
+#pragma omp critical
       {
         *posInput += h0lambda * w0lambda * (*posOutput);
         *(posInput + w1p) += h0lambda * w1lambda * (*posOutput);
@@ -188,15 +180,15 @@ void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu> *s,
 
   if (modeLike) {
     Tensor<xpu, 4, DType> gradInputLike = output[1].get<xpu, 4, DType>(s);
-    int inputHeightLike = gradInputLike.size(2);
-    int inputWidthLike = gradInputLike.size(3);
-    DType *dataInputLike = gradInputLike.dptr_;
-    int channelsLike = nbatch * gradInputLike.size(1);
+    int inputHeightLike                 = gradInputLike.size(2);
+    int inputWidthLike                  = gradInputLike.size(3);
+    DType* dataInputLike                = gradInputLike.dptr_;
+    int channelsLike                    = nbatch * gradInputLike.size(1);
 
     const int inputLike_elems_per_channel = inputHeightLike * inputWidthLike;
 #pragma omp parallel for num_threads(nthreads)
     for (int index = 0; index < inputLike_elems_per_channel; index++) {
-      DType *posInput = &dataInputLike[index];
+      DType* posInput = &dataInputLike[index];
       for (int c = 0; c < channelsLike; ++c) {
         *posInput = 0;
         posInput += inputLike_elems_per_channel;
@@ -208,7 +200,7 @@ void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<cpu> *s,
 DMLC_REGISTER_PARAMETER(BilinearSampleParam);
 
 NNVM_REGISTER_OP(_contrib_BilinearResize2D)
-.describe(R"code(
+    .describe(R"code(
 Perform 2D resizing (upsampling or downsampling) for 4D input using bilinear interpolation.
 
 Expected input is a 4 dimensional NDArray (NCHW) and the output
@@ -218,25 +210,24 @@ first in one direction, and then again in the other direction. See the wikipedia
 `Bilinear interpolation  <https://en.wikipedia.org/wiki/Bilinear_interpolation>`_
 for more details.
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<BilinearSampleParam>)
-.set_num_inputs(BilinearSampleOpNumInputs)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", BilinearSampleOpInputNames)
-.set_attr<mxnet::FInferShape>("FInferShape", BilinearSampleOpInferShape)
-.set_attr<FCompute>("FCompute<cpu>", BilinearSampleOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  ElemwiseGradUseNone{"_backward_contrib_BilinearResize2D"})
-.add_argument("data", "NDArray-or-Symbol", "Input data")
-.add_argument("like", "NDArray-or-Symbol", "Resize data to it's shape")
-.add_arguments(BilinearSampleParam::__FIELDS__());
+    .set_attr_parser(ParamParser<BilinearSampleParam>)
+    .set_num_inputs(BilinearSampleOpNumInputs)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames", BilinearSampleOpInputNames)
+    .set_attr<mxnet::FInferShape>("FInferShape", BilinearSampleOpInferShape)
+    .set_attr<FCompute>("FCompute<cpu>", BilinearSampleOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseNone{"_backward_contrib_BilinearResize2D"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data")
+    .add_argument("like", "NDArray-or-Symbol", "Resize data to it's shape")
+    .add_arguments(BilinearSampleParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_contrib_BilinearResize2D)
-.set_attr_parser(ParamParser<BilinearSampleParam>)
-.set_num_inputs(1)
-.set_num_outputs(BilinearSampleOpNumBackwardOutputs)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", BilinearSampleOpBackward<cpu>);
-
+    .set_attr_parser(ParamParser<BilinearSampleParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(BilinearSampleOpNumBackwardOutputs)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", BilinearSampleOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/bilinear_resize.cu b/src/operator/contrib/bilinear_resize.cu
index 1a6e6964ddfb..cbae235e7c01 100644
--- a/src/operator/contrib/bilinear_resize.cu
+++ b/src/operator/contrib/bilinear_resize.cu
@@ -21,7 +21,7 @@
  * \file bilinear_resize.cu
  * \brief bilinear resize operator
  * \author Hang Zhang
-*/
+ */
 #include <cuda_runtime_api.h>
 #include <algorithm>
 #include "bilinear_resize-inl.h"
@@ -35,23 +35,18 @@ using namespace mshadow;
 // fastSpecializedAtomicAdd adapted from Torch
 // https://github.com/pytorch/pytorch/blob/master/aten/src/ATen/native/cuda/KernelUtils.cuh
 template <
-  typename Dtype,
-  typename std::enable_if<std::is_same<mshadow::half::half_t, Dtype>::value>::type* =
-  nullptr>
-  __device__ MSHADOW_FORCE_INLINE void fastSpecializedAtomicAdd(
-    Dtype* tensor,
-    size_t index,
-    const size_t numel,
-    Dtype value) {
-#if (                         \
-    (CUDA_VERSION < 10000) || \
-    (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ < 700)))
-  atomicAdd(
-    reinterpret_cast<mshadow::half::half_t*>(tensor) + index,
-    static_cast<mshadow::half::half_t>(value));
+    typename Dtype,
+    typename std::enable_if<std::is_same<mshadow::half::half_t, Dtype>::value>::type* = nullptr>
+__device__ MSHADOW_FORCE_INLINE void fastSpecializedAtomicAdd(Dtype* tensor,
+                                                              size_t index,
+                                                              const size_t numel,
+                                                              Dtype value) {
+#if ((CUDA_VERSION < 10000) || (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ < 700)))
+  atomicAdd(reinterpret_cast<mshadow::half::half_t*>(tensor) + index,
+            static_cast<mshadow::half::half_t>(value));
 #else
-  bool low_bit = (index % 2 == 0) &&
-    (reinterpret_cast<std::uintptr_t>(tensor) % sizeof(__half2) == 0);
+  bool low_bit =
+      (index % 2 == 0) && (reinterpret_cast<std::uintptr_t>(tensor) % sizeof(__half2) == 0);
 
   if (low_bit && index < (numel - 1)) {
     __half2 value2;
@@ -65,31 +60,27 @@ template <
     atomicAdd(reinterpret_cast<__half2*>(tensor) + index / 2, value2);
 
   } else {
-    atomicAdd(
-      reinterpret_cast<__half*>(tensor) + index, static_cast<__half>(value));
+    atomicAdd(reinterpret_cast<__half*>(tensor) + index, static_cast<__half>(value));
   }
 #endif
 }
 
 template <
-  typename Dtype,
-  typename std::enable_if<!std::is_same<mshadow::half::half_t, Dtype>::value>::type* =
-  nullptr>
-  __device__ MSHADOW_FORCE_INLINE void fastSpecializedAtomicAdd(
-    Dtype* tensor,
-    size_t index,
-    const size_t numel,
-    Dtype value) {
+    typename Dtype,
+    typename std::enable_if<!std::is_same<mshadow::half::half_t, Dtype>::value>::type* = nullptr>
+__device__ MSHADOW_FORCE_INLINE void fastSpecializedAtomicAdd(Dtype* tensor,
+                                                              size_t index,
+                                                              const size_t numel,
+                                                              Dtype value) {
   atomicAdd(tensor + index, value);
 }
 
 template <class Dtype>
-__device__ MSHADOW_FORCE_INLINE void fastAtomicAdd(
-  Dtype* tensor,
-  size_t index,
-  const size_t numel,
-  Dtype value,
-  bool fast_atomics) {
+__device__ MSHADOW_FORCE_INLINE void fastAtomicAdd(Dtype* tensor,
+                                                   size_t index,
+                                                   const size_t numel,
+                                                   Dtype value,
+                                                   bool fast_atomics) {
   if (fast_atomics) {
     fastSpecializedAtomicAdd(tensor, index, numel, value);
   } else {
@@ -97,19 +88,17 @@ __device__ MSHADOW_FORCE_INLINE void fastAtomicAdd(
   }
 }
 
-
-template<typename xpu, typename Dtype, typename Acctype>
-__global__ void like_mode_kernel_backward(const int n,
-    Tensor<xpu, 4, Dtype> dataLike) {
-  int index = threadIdx.x + blockIdx.x * blockDim.x;
+template <typename xpu, typename Dtype, typename Acctype>
+__global__ void like_mode_kernel_backward(const int n, Tensor<xpu, 4, Dtype> dataLike) {
+  int index           = threadIdx.x + blockIdx.x * blockDim.x;
   const int batchsize = dataLike.size(0);
-  const int channels = dataLike.size(1);
-  const int height = dataLike.size(2);
-  const int width = dataLike.size(3);
+  const int channels  = dataLike.size(1);
+  const int height    = dataLike.size(2);
+  const int width     = dataLike.size(3);
   if (index < n) {
     const int w = index % width;
     const int h = index / width;
-    for (int n = 0; n < batchsize ; n++) {
+    for (int n = 0; n < batchsize; n++) {
       for (int c = 0; c < channels; ++c) {
         dataLike[n][c][h][w] = 0;
       }
@@ -121,166 +110,157 @@ __global__ void like_mode_kernel_backward(const int n,
 // caffe_gpu_interp2_kernel_backward adapted from Torch
 // https://github.com/pytorch/pytorch/blob/master/aten/src/ATen/native/cuda/UpSampleBilinear2d.cu
 // Backward (adjoint) operation 1 <- 2 (accumulates)
-template<typename xpu, typename Dtype, typename Acctype>
-__global__ void caffe_gpu_interp2_kernel_backward(
-  const size_t nc,
-  const int height1,
-  const int width1,
-  const int height2,
-  const int width2,
-    const Acctype rheight,
-  const Acctype rwidth,
-  const bool align_corners,
-  Dtype* __restrict__ idata,
-  const Dtype* __restrict__ odata) {
+template <typename xpu, typename Dtype, typename Acctype>
+__global__ void caffe_gpu_interp2_kernel_backward(const size_t nc,
+                                                  const int height1,
+                                                  const int width1,
+                                                  const int height2,
+                                                  const int width2,
+                                                  const Acctype rheight,
+                                                  const Acctype rwidth,
+                                                  const bool align_corners,
+                                                  Dtype* __restrict__ idata,
+                                                  const Dtype* __restrict__ odata) {
   const size_t o_numel = nc * width2 * height2;
   const size_t i_numel = nc * width1 * height1;
   for (size_t index = blockDim.x * blockIdx.x + threadIdx.x; index < o_numel;
-    index += blockDim.x * gridDim.x) {
+       index += blockDim.x * gridDim.x) {
     size_t index_temp = index;
-    const int w2 = index_temp % width2;  // 0:width2-1
+    const int w2      = index_temp % width2;  // 0:width2-1
     index_temp /= width2;
-    const int h2 = index_temp % height2;  // 0:height2-1
+    const int h2    = index_temp % height2;  // 0:height2-1
     const size_t nc = index_temp / height2;
     //
-    const Acctype h1r = cu_area_pixel_compute_source_index<Acctype>(
-      rheight, h2, align_corners, false);
-    const int h1 = h1r;
-    const int h1p = (h1 < height1 - 1) ? 1 : 0;
+    const Acctype h1r =
+        cu_area_pixel_compute_source_index<Acctype>(rheight, h2, align_corners, false);
+    const int h1           = h1r;
+    const int h1p          = (h1 < height1 - 1) ? 1 : 0;
     const Acctype h1lambda = h1r - h1;
     const Acctype h0lambda = static_cast<Acctype>(1) - h1lambda;
     //
-    const Acctype w1r = cu_area_pixel_compute_source_index<Acctype>(
-      rwidth, w2, align_corners, false);
-    const int w1 = w1r;
-    const int w1p = (w1 < width1 - 1) ? 1 : 0;
+    const Acctype w1r =
+        cu_area_pixel_compute_source_index<Acctype>(rwidth, w2, align_corners, false);
+    const int w1           = w1r;
+    const int w1p          = (w1 < width1 - 1) ? 1 : 0;
     const Acctype w1lambda = w1r - w1;
     const Acctype w0lambda = static_cast<Acctype>(1) - w1lambda;
 
     const Dtype d2val = odata[index];
-    fastAtomicAdd(
-      idata,
-      idx(nc, height1, width1, h1, w1),
-      i_numel,
-      ScalarConvert<Acctype, Dtype>::to(h0lambda * w0lambda * d2val),
-      true);
-    fastAtomicAdd(
-      idata,
-      idx(nc, height1, width1, h1, w1 + w1p),
-      i_numel,
-      ScalarConvert<Acctype, Dtype>::to(h0lambda * w1lambda * d2val),
-      true);
-    fastAtomicAdd(
-      idata,
-      idx(nc, height1, width1, h1 + h1p, w1),
-      i_numel,
-      ScalarConvert<Acctype, Dtype>::to(h1lambda * w0lambda * d2val),
-      true);
-    fastAtomicAdd(
-      idata,
-      idx(nc, height1, width1, h1 + h1p, w1 + w1p),
-      i_numel,
-      ScalarConvert<Acctype, Dtype>::to(h1lambda * w1lambda * d2val),
-      true);
+    fastAtomicAdd(idata,
+                  idx(nc, height1, width1, h1, w1),
+                  i_numel,
+                  ScalarConvert<Acctype, Dtype>::to(h0lambda * w0lambda * d2val),
+                  true);
+    fastAtomicAdd(idata,
+                  idx(nc, height1, width1, h1, w1 + w1p),
+                  i_numel,
+                  ScalarConvert<Acctype, Dtype>::to(h0lambda * w1lambda * d2val),
+                  true);
+    fastAtomicAdd(idata,
+                  idx(nc, height1, width1, h1 + h1p, w1),
+                  i_numel,
+                  ScalarConvert<Acctype, Dtype>::to(h1lambda * w0lambda * d2val),
+                  true);
+    fastAtomicAdd(idata,
+                  idx(nc, height1, width1, h1 + h1p, w1 + w1p),
+                  i_numel,
+                  ScalarConvert<Acctype, Dtype>::to(h1lambda * w1lambda * d2val),
+                  true);
   }
 }
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<gpu> *s,
-                                           const std::vector<TBlob> &input,
-                                           const std::vector<TBlob> &output,
-                                         bool align_corners) {
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateOutput(mshadow::Stream<gpu>* s,
+                                           const std::vector<TBlob>& input,
+                                           const std::vector<TBlob>& output,
+                                           bool align_corners) {
   Tensor<xpu, 4, DType> idata = input[0].get<xpu, 4, DType>(s);
   Tensor<xpu, 4, DType> odata = output[0].get<xpu, 4, DType>(s);
-  int outputHeight = odata.size(2);
-  int outputWidth = odata.size(3);
-  int nbatch = idata.size(0);
-  int channels = idata.size(1);
-  int inputHeight = idata.size(2);
-  int inputWidth = idata.size(3);
+  int outputHeight            = odata.size(2);
+  int outputWidth             = odata.size(3);
+  int nbatch                  = idata.size(0);
+  int channels                = idata.size(1);
+  int inputHeight             = idata.size(2);
+  int inputWidth              = idata.size(3);
 
-  const AccReal rheight = cu_area_pixel_compute_scale<AccReal>(
-    inputHeight, outputHeight, align_corners);
-  const AccReal rwidth = cu_area_pixel_compute_scale<AccReal>(
-    inputWidth, outputWidth, align_corners);
+  const AccReal rheight =
+      cu_area_pixel_compute_scale<AccReal>(inputHeight, outputHeight, align_corners);
+  const AccReal rwidth =
+      cu_area_pixel_compute_scale<AccReal>(inputWidth, outputWidth, align_corners);
 
   const int num_kernels = nbatch * channels * outputHeight * outputWidth;
-  const int num_threads = getNumThreads(inputHeight*inputWidth, false);
+  const int num_threads = getNumThreads(inputHeight * inputWidth, false);
   dim3 blocks(static_cast<int>(num_kernels / num_threads) + 1);
   dim3 threads(num_threads);
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-  caffe_gpu_interp2_kernel<xpu, DType, AccReal>
-  <<<blocks, threads , 0, stream>>>(
-    nbatch * channels,
-    inputHeight,
-    inputWidth,
-    outputHeight,
-    outputWidth,
-    rheight,
-    rwidth,
-    align_corners,
-    idata.dptr_,
-    odata.dptr_);
+  caffe_gpu_interp2_kernel<xpu, DType, AccReal><<<blocks, threads, 0, stream>>>(nbatch * channels,
+                                                                                inputHeight,
+                                                                                inputWidth,
+                                                                                outputHeight,
+                                                                                outputWidth,
+                                                                                rheight,
+                                                                                rwidth,
+                                                                                align_corners,
+                                                                                idata.dptr_,
+                                                                                odata.dptr_);
   MSHADOW_CUDA_POST_KERNEL_CHECK(SpatialUpSamplingBilinearUpdateOutput);
 }
 
-template<typename xpu, typename DType, typename AccReal>
-void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<gpu> *s,
-                                              const std::vector<TBlob> &input,
-                                              const std::vector<TBlob> &output,
+template <typename xpu, typename DType, typename AccReal>
+void SpatialUpSamplingBilinearUpdateGradInput(mshadow::Stream<gpu>* s,
+                                              const std::vector<TBlob>& input,
+                                              const std::vector<TBlob>& output,
                                               bool modeLike,
-                                            bool align_corners) {
+                                              bool align_corners) {
   Tensor<xpu, 4, DType> gradOutput = input[0].get<xpu, 4, DType>(s);
-  Tensor<xpu, 4, DType> gradInput = output[0].get<xpu, 4, DType>(s);
-  int outputHeight = gradOutput.size(2);
-  int outputWidth = gradOutput.size(3);
-  int nbatch = gradInput.size(0);
-  int channels = gradInput.size(1);
-  int inputHeight = gradInput.size(2);
-  int inputWidth = gradInput.size(3);
+  Tensor<xpu, 4, DType> gradInput  = output[0].get<xpu, 4, DType>(s);
+  int outputHeight                 = gradOutput.size(2);
+  int outputWidth                  = gradOutput.size(3);
+  int nbatch                       = gradInput.size(0);
+  int channels                     = gradInput.size(1);
+  int inputHeight                  = gradInput.size(2);
+  int inputWidth                   = gradInput.size(3);
 
-  const AccReal rheight = cu_area_pixel_compute_scale<AccReal>(
-    inputHeight, outputHeight, align_corners);
-  const AccReal rwidth = cu_area_pixel_compute_scale<AccReal>(
-    inputWidth, outputWidth, align_corners);
+  const AccReal rheight =
+      cu_area_pixel_compute_scale<AccReal>(inputHeight, outputHeight, align_corners);
+  const AccReal rwidth =
+      cu_area_pixel_compute_scale<AccReal>(inputWidth, outputWidth, align_corners);
   const int num_kernels = nbatch * channels * outputHeight * outputWidth;
-  const int num_threads = getNumThreads(inputHeight*inputWidth, false);
+  const int num_threads = getNumThreads(inputHeight * inputWidth, false);
   dim3 blocks(static_cast<int>(num_kernels / num_threads) + 1);
   dim3 threads(num_threads);
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   caffe_gpu_interp2_kernel_backward<xpu, DType, AccReal>
-  <<<blocks, threads, 0, stream>>>(
-    nbatch * channels,
-    inputHeight,
-    inputWidth,
-    outputHeight,
-    outputWidth,
-    rheight,
-    rwidth,
-    align_corners,
-    gradInput.dptr_,
-    gradOutput.dptr_);
+      <<<blocks, threads, 0, stream>>>(nbatch * channels,
+                                       inputHeight,
+                                       inputWidth,
+                                       outputHeight,
+                                       outputWidth,
+                                       rheight,
+                                       rwidth,
+                                       align_corners,
+                                       gradInput.dptr_,
+                                       gradOutput.dptr_);
 
   if (modeLike) {
     Tensor<xpu, 4, DType> dataLike = output[1].get<xpu, 4, DType>(s);
-    int heightLike = dataLike.size(2);
-    int widthLike = dataLike.size(3);
-    const int num_kernels_like = heightLike * widthLike;
-    const int num_threads_like = getNumThreads(num_kernels_like, false);
+    int heightLike                 = dataLike.size(2);
+    int widthLike                  = dataLike.size(3);
+    const int num_kernels_like     = heightLike * widthLike;
+    const int num_threads_like     = getNumThreads(num_kernels_like, false);
     dim3 blocksLike(static_cast<int>(num_kernels_like / num_threads_like) + 1);
     dim3 threadsLike(num_threads_like);
     like_mode_kernel_backward<xpu, DType, AccReal>
-    <<<blocksLike, threadsLike, 0, stream>>>(
-      num_kernels_like, dataLike);
+        <<<blocksLike, threadsLike, 0, stream>>>(num_kernels_like, dataLike);
   }
 
   MSHADOW_CUDA_POST_KERNEL_CHECK(SpatialUpSamplingBilinearUpdateGradInput);
 }
 
 NNVM_REGISTER_OP(_contrib_BilinearResize2D)
-.set_attr<FCompute>("FCompute<gpu>", BilinearSampleOpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BilinearSampleOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_contrib_BilinearResize2D)
-.set_attr<FCompute>("FCompute<gpu>", BilinearSampleOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BilinearSampleOpBackward<gpu>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/boolean_mask-inl.h b/src/operator/contrib/boolean_mask-inl.h
index 12a69444c681..2a29204804f6 100644
--- a/src/operator/contrib/boolean_mask-inl.h
+++ b/src/operator/contrib/boolean_mask-inl.h
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file boolean_mask-inl.h
-*/
+ */
 
 #ifndef MXNET_OPERATOR_CONTRIB_BOOLEAN_MASK_INL_H_
 #define MXNET_OPERATOR_CONTRIB_BOOLEAN_MASK_INL_H_
@@ -45,18 +45,14 @@ namespace op {
 struct BooleanMaskParam : public dmlc::Parameter<BooleanMaskParam> {
   int axis;
   DMLC_DECLARE_PARAMETER(BooleanMaskParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(0)
-    .describe("An integer that represents the axis in NDArray to mask from.");
+    DMLC_DECLARE_FIELD(axis).set_default(0).describe(
+        "An integer that represents the axis in NDArray to mask from.");
   }
 };
 
 struct BooleanMaskForwardCPUKernel {
-  template<typename DType>
-  static void Map(int i,
-                  DType* out,
-                  const DType* data,
-                  const int32_t* idx,
-                  const size_t col_size) {
+  template <typename DType>
+  static void Map(int i, DType* out, const DType* data, const int32_t* idx, const size_t col_size) {
     // i is row id already
     int32_t prev = (i == 0) ? 0 : idx[i - 1];
     int32_t curr = idx[i];
@@ -72,14 +68,11 @@ struct BooleanMaskForwardCPUKernel {
 };
 
 struct BooleanMaskForwardKernel {
-  template<typename DType>
-  static void MSHADOW_XINLINE Map(int i,
-                                  DType* out,
-                                  const DType* data,
-                                  const int32_t* idx,
-                                  const size_t col_size) {
-    int row_id = i / col_size;
-    int col_id = i % col_size;
+  template <typename DType>
+  static void MSHADOW_XINLINE
+  Map(int i, DType* out, const DType* data, const int32_t* idx, const size_t col_size) {
+    int row_id   = i / col_size;
+    int col_id   = i % col_size;
     int32_t prev = (row_id == 0) ? 0 : idx[row_id - 1];
     int32_t curr = idx[row_id];
     if (prev != curr) {
@@ -89,15 +82,15 @@ struct BooleanMaskForwardKernel {
 };
 
 struct BooleanMaskBackwardKernel {
-  template<typename DType>
+  template <typename DType>
   static void MSHADOW_XINLINE Map(int i,
                                   DType* igrad,
                                   const OpReqType req,
                                   const DType* ograd,
                                   const int32_t* idx,
                                   const size_t col_size) {
-    int row_id = i / col_size;
-    int col_id = i % col_size;
+    int row_id   = i / col_size;
+    int col_id   = i % col_size;
     int32_t prev = (row_id == 0) ? 0 : idx[row_id - 1];
     int32_t curr = idx[row_id];
     if (prev != curr) {
@@ -112,19 +105,19 @@ struct BooleanMaskBackwardKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void BooleanMaskForward(const nnvm::NodeAttrs& attrs,
-                               const OpContext &ctx,
-                               const std::vector<NDArray> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<NDArray> &outputs);
+                               const OpContext& ctx,
+                               const std::vector<NDArray>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<NDArray>& outputs);
 
-template<typename xpu>
+template <typename xpu>
 inline void BooleanMaskBackward(const nnvm::NodeAttrs& attrs,
-                                const OpContext &ctx,
-                                const std::vector<NDArray> &inputs,
-                                const std::vector<OpReqType> &req,
-                                const std::vector<NDArray> &outputs);
+                                const OpContext& ctx,
+                                const std::vector<NDArray>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<NDArray>& outputs);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/boolean_mask.cc b/src/operator/contrib/boolean_mask.cc
index 882984430d52..774c228b8957 100644
--- a/src/operator/contrib/boolean_mask.cc
+++ b/src/operator/contrib/boolean_mask.cc
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file boolean_mask.cc
-*/
+ */
 
 #include "./boolean_mask-inl.h"
 
@@ -29,8 +29,8 @@ namespace op {
 DMLC_REGISTER_PARAMETER(BooleanMaskParam);
 
 bool BooleanMaskType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_attrs,
-                     std::vector<int> *out_attrs) {
+                     std::vector<int>* in_attrs,
+                     std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
@@ -41,14 +41,14 @@ bool BooleanMaskType(const nnvm::NodeAttrs& attrs,
 bool BooleanMaskStorageType(const nnvm::NodeAttrs& attrs,
                             const int dev_mask,
                             DispatchMode* dispatch_mode,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
   *dispatch_mode = DispatchMode::kFComputeEx;
@@ -58,24 +58,24 @@ bool BooleanMaskStorageType(const nnvm::NodeAttrs& attrs,
 bool BooleanMaskBackStorageType(const nnvm::NodeAttrs& attrs,
                                 const int dev_mask,
                                 DispatchMode* dispatch_mode,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3);
   CHECK_EQ(out_attrs->size(), 2);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
-  for (int & out_attr : *out_attrs)
+  for (int& out_attr : *out_attrs)
     out_attr = kDefaultStorage;
   *dispatch_mode = DispatchMode::kFComputeEx;
   return true;
 }
 
 struct BooleanMaskBackwardCPUWriteKernel {
-  template<typename DType>
+  template <typename DType>
   static void Map(int i,
                   DType* igrad,
                   const OpReqType /*req*/,
@@ -98,20 +98,20 @@ struct BooleanMaskBackwardCPUWriteKernel {
   }
 };
 
-template<>
+template <>
 inline void BooleanMaskForward<cpu>(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<NDArray> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<NDArray> &outputs) {
+                                    const OpContext& ctx,
+                                    const std::vector<NDArray>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
   const BooleanMaskParam& param = nnvm::get<BooleanMaskParam>(attrs.parsed);
-  const int axis = param.axis;
-  const NDArray &data = inputs[0];
-  const NDArray &idx = inputs[1];
-  const NDArray &out = outputs[0];
+  const int axis                = param.axis;
+  const NDArray& data           = inputs[0];
+  const NDArray& idx            = inputs[1];
+  const NDArray& out            = outputs[0];
   CHECK_EQ(axis, 0) << "Not supported yet";
   CHECK_EQ(data.shape()[axis], idx.shape()[0]);
   CHECK_EQ(idx.shape().ndim(), 1U);  // idx is required to be 1-d.
@@ -130,62 +130,75 @@ inline void BooleanMaskForward<cpu>(const nnvm::NodeAttrs& attrs,
   });
   // set the output shape forcefully
   mxnet::TShape s = data.shape();
-  s[axis] = valid_num;
+  s[axis]         = valid_num;
 
-  const_cast<NDArray &>(out).Init(s);
+  const_cast<NDArray&>(out).Init(s);
   // do the copy
   MSHADOW_TYPE_SWITCH_WITH_BOOL(data.dtype(), DType, {
-    size_t input_size = data.shape().Size();
-    size_t col_size = input_size / idx_size;
-    mshadow::Stream<cpu> *stream = ctx.get_stream<cpu>();
-    mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(
-      stream, idx_size, out.data().dptr<DType>(), data.data().dptr<DType>(),
-      prefix_sum.data(), col_size);
+    size_t input_size            = data.shape().Size();
+    size_t col_size              = input_size / idx_size;
+    mshadow::Stream<cpu>* stream = ctx.get_stream<cpu>();
+    mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(stream,
+                                                               idx_size,
+                                                               out.data().dptr<DType>(),
+                                                               data.data().dptr<DType>(),
+                                                               prefix_sum.data(),
+                                                               col_size);
   });
 }
 
-template<>
+template <>
 inline void BooleanMaskBackward<cpu>(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<NDArray> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<NDArray> &outputs) {
+                                     const OpContext& ctx,
+                                     const std::vector<NDArray>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   // inputs: {ograd, data, idx}
   // outputs: {igrad_data, igrad_idx}
-  const NDArray& ograd = inputs[0];
-  const NDArray& idx = inputs[2];
+  const NDArray& ograd      = inputs[0];
+  const NDArray& idx        = inputs[2];
   const NDArray& igrad_data = outputs[0];
   MSHADOW_TYPE_SWITCH(igrad_data.dtype(), DType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(idx.dtype(), IType, {
       size_t input_size = igrad_data.shape().Size();
-      size_t idx_size = idx.shape()[0];
-      size_t col_size = input_size / idx_size;
+      size_t idx_size   = idx.shape()[0];
+      size_t col_size   = input_size / idx_size;
       std::vector<int32_t> prefix_sum(idx_size, 0);
       IType* idx_dptr = idx.data().dptr<IType>();
       for (size_t i = 0; i < idx_size; i++) {
         prefix_sum[i] = (i == 0) ? 0 : prefix_sum[i - 1];
         prefix_sum[i] += (idx_dptr[i]) ? 1 : 0;
       }
-      mshadow::Stream<cpu> *stream = ctx.get_stream<cpu>();
+      mshadow::Stream<cpu>* stream = ctx.get_stream<cpu>();
       if (req[0] == kAddTo) {
-        mxnet_op::Kernel<BooleanMaskBackwardKernel, cpu>::Launch(
-          stream, idx_size, igrad_data.data().dptr<DType>(), req[0],
-          ograd.data().dptr<DType>(), prefix_sum.data(), col_size);
+        mxnet_op::Kernel<BooleanMaskBackwardKernel, cpu>::Launch(stream,
+                                                                 idx_size,
+                                                                 igrad_data.data().dptr<DType>(),
+                                                                 req[0],
+                                                                 ograd.data().dptr<DType>(),
+                                                                 prefix_sum.data(),
+                                                                 col_size);
       } else {
         mxnet_op::Kernel<BooleanMaskBackwardCPUWriteKernel, cpu>::Launch(
-          stream, idx_size, igrad_data.data().dptr<DType>(), req[0],
-          ograd.data().dptr<DType>(), prefix_sum.data(), col_size);
+            stream,
+            idx_size,
+            igrad_data.data().dptr<DType>(),
+            req[0],
+            ograd.data().dptr<DType>(),
+            prefix_sum.data(),
+            col_size);
       }
     });
   });
 }
 
 NNVM_REGISTER_OP(_contrib_boolean_mask)
-.add_alias("_npi_boolean_mask")
-.describe(R"code(
+    .add_alias("_npi_boolean_mask")
+    .describe(R"code(
 Given an n-d NDArray data, and a 1-d NDArray index,
 the operator produces an un-predeterminable shaped n-d NDArray out,
 which stands for the rows in x where the corresonding element in index is non-zero.
@@ -199,28 +212,28 @@ which stands for the rows in x where the corresonding element in index is non-ze
 <NDArray 1x3 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<BooleanMaskParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "index"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", BooleanMaskType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BooleanMaskForward<cpu>)
-.set_attr<FInferStorageType>("FInferStorageType", BooleanMaskStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_contrib_boolean_mask"})
-.add_argument("data", "NDArray-or-Symbol", "Data")
-.add_argument("index", "NDArray-or-Symbol", "Mask")
-.add_arguments(BooleanMaskParam::__FIELDS__());
+    .set_attr_parser(ParamParser<BooleanMaskParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "index"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", BooleanMaskType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BooleanMaskForward<cpu>)
+    .set_attr<FInferStorageType>("FInferStorageType", BooleanMaskStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_contrib_boolean_mask"})
+    .add_argument("data", "NDArray-or-Symbol", "Data")
+    .add_argument("index", "NDArray-or-Symbol", "Mask")
+    .add_arguments(BooleanMaskParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_contrib_boolean_mask)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", BooleanMaskBackStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BooleanMaskBackward<cpu>)
-.add_arguments(BooleanMaskParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BooleanMaskBackStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BooleanMaskBackward<cpu>)
+    .add_arguments(BooleanMaskParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/boolean_mask.cu b/src/operator/contrib/boolean_mask.cu
index 95f5614ba44d..ebfe4ea88a89 100644
--- a/src/operator/contrib/boolean_mask.cu
+++ b/src/operator/contrib/boolean_mask.cu
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file boolean_mask.cu
-*/
+ */
 
 #include "./boolean_mask-inl.h"
 #include <cub/cub.cuh>
@@ -27,149 +27,138 @@
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 inline void BooleanMaskForward<gpu>(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<NDArray> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<NDArray> &outputs) {
+                                    const OpContext& ctx,
+                                    const std::vector<NDArray>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
   const BooleanMaskParam& param = nnvm::get<BooleanMaskParam>(attrs.parsed);
-  const int axis = param.axis;
-  const NDArray &data = inputs[0];
-  const NDArray &idx = inputs[1];
-  const NDArray &out = outputs[0];
+  const int axis                = param.axis;
+  const NDArray& data           = inputs[0];
+  const NDArray& idx            = inputs[1];
+  const NDArray& out            = outputs[0];
   CHECK_EQ(axis, 0) << "Not supported yet";
   CHECK_EQ(data.shape()[axis], idx.shape()[0]);
   CHECK_EQ(idx.shape().ndim(), 1U);
-  Stream<gpu>* s = ctx.get_stream<gpu>();
+  Stream<gpu>* s      = ctx.get_stream<gpu>();
   cudaStream_t stream = Stream<gpu>::GetStream(s);
   // count the number of 1s in `idx`, so that we could know the output dimension
-  size_t idx_size = idx.shape()[0];
-  int32_t valid_num = 0;
-  int32_t* prefix_sum = nullptr;
-  void* d_temp_storage = nullptr;
+  size_t idx_size           = idx.shape()[0];
+  int32_t valid_num         = 0;
+  int32_t* prefix_sum       = nullptr;
+  void* d_temp_storage      = nullptr;
   size_t temp_storage_bytes = 0;
   // Calculate total temporary memory size
-  cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                idx_size,
-                                stream);
+  cub::DeviceScan::InclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
   size_t buffer_size = idx_size * sizeof(int32_t);
   temp_storage_bytes += buffer_size;
   // Allocate memory on GPU and allocate pointer
   Tensor<gpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
-  prefix_sum = reinterpret_cast<int32_t*>(workspace.dptr_);
+      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
+  prefix_sum     = reinterpret_cast<int32_t*>(workspace.dptr_);
   d_temp_storage = workspace.dptr_ + buffer_size;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(idx.dtype(), IType, {
     mxnet_op::Kernel<mshadow_op::identity_with_cast, gpu>::Launch(
-      s, idx.shape()[0], prefix_sum, idx.data().dptr<IType>());
+        s, idx.shape()[0], prefix_sum, idx.data().dptr<IType>());
   });
   // Calculate prefix sum
-  cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                idx_size,
-                                stream);
-  CUDA_CALL(cudaMemcpyAsync(&valid_num, &prefix_sum[idx_size - 1], sizeof(int32_t),
-                            cudaMemcpyDeviceToHost, stream));
+  cub::DeviceScan::InclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
+  CUDA_CALL(cudaMemcpyAsync(
+      &valid_num, &prefix_sum[idx_size - 1], sizeof(int32_t), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 
   // Set the output shape forcefully
   mxnet::TShape data_shape = data.shape();
-  data_shape[axis] = valid_num;
-  const_cast<NDArray &>(out).Init(data_shape);
+  data_shape[axis]         = valid_num;
+  const_cast<NDArray&>(out).Init(data_shape);
   size_t input_size = data.shape().Size();
-  size_t col_size = input_size / idx.shape()[0];
+  size_t col_size   = input_size / idx.shape()[0];
   // Do the copy
   MSHADOW_TYPE_SWITCH_WITH_BOOL(out.dtype(), DType, {
     if (valid_num > 0) {
       mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(
-        s, input_size, out.data().dptr<DType>(), data.data().dptr<DType>(), prefix_sum, col_size);
+          s, input_size, out.data().dptr<DType>(), data.data().dptr<DType>(), prefix_sum, col_size);
     }
   });
 }
 
-template<>
+template <>
 inline void BooleanMaskBackward<gpu>(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<NDArray> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<NDArray> &outputs) {
+                                     const OpContext& ctx,
+                                     const std::vector<NDArray>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   // inputs: {ograd, data, idx}
   // outputs: {igrad_data, igrad_idx}
-  const NDArray& ograd = inputs[0];
-  const NDArray& idx = inputs[2];
+  const NDArray& ograd      = inputs[0];
+  const NDArray& idx        = inputs[2];
   const NDArray& igrad_data = outputs[0];
-  Stream<gpu>* s = ctx.get_stream<gpu>();
-  cudaStream_t stream = Stream<gpu>::GetStream(s);
+  Stream<gpu>* s            = ctx.get_stream<gpu>();
+  cudaStream_t stream       = Stream<gpu>::GetStream(s);
   // Count the number of 1s in `idx`, so that we could know the output dimension
-  size_t idx_size = idx.shape()[0];
-  int32_t* prefix_sum = nullptr;
-  void* d_temp_storage = nullptr;
+  size_t idx_size           = idx.shape()[0];
+  int32_t* prefix_sum       = nullptr;
+  void* d_temp_storage      = nullptr;
   size_t temp_storage_bytes = 0;
   // Calculate total temporary memory size
-  cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                idx_size,
-                                stream);
+  cub::DeviceScan::InclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
   size_t buffer_size = idx_size * sizeof(int32_t);
   temp_storage_bytes += buffer_size;
   // Allocate memory on GPU and allocate pointer
   Tensor<gpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
-  prefix_sum = reinterpret_cast<int32_t*>(workspace.dptr_);
+      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
+  prefix_sum     = reinterpret_cast<int32_t*>(workspace.dptr_);
   d_temp_storage = workspace.dptr_ + buffer_size;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(idx.dtype(), IType, {
     mxnet_op::Kernel<mshadow_op::identity_with_cast, gpu>::Launch(
-      s, idx.shape()[0], prefix_sum, idx.data().dptr<IType>());
+        s, idx.shape()[0], prefix_sum, idx.data().dptr<IType>());
   });
   // Calculate prefix sum
-  cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                idx_size,
-                                stream);
+  cub::DeviceScan::InclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
   size_t input_size = igrad_data.shape().Size();
-  size_t col_size = input_size / idx_size;
+  size_t col_size   = input_size / idx_size;
   // Backward pass
   MSHADOW_TYPE_SWITCH(igrad_data.dtype(), DType, {
     if (input_size > 0) {
-      mxnet_op::Kernel<BooleanMaskBackwardKernel, gpu>::Launch(
-        s, input_size, igrad_data.data().dptr<DType>(), req[0], ograd.data().dptr<DType>(),
-        prefix_sum, col_size);
+      mxnet_op::Kernel<BooleanMaskBackwardKernel, gpu>::Launch(s,
+                                                               input_size,
+                                                               igrad_data.data().dptr<DType>(),
+                                                               req[0],
+                                                               ograd.data().dptr<DType>(),
+                                                               prefix_sum,
+                                                               col_size);
     }
   });
 }
 
 NNVM_REGISTER_OP(_contrib_boolean_mask)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FComputeEx>("FComputeEx<gpu>", BooleanMaskForward<gpu>);
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BooleanMaskForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_contrib_boolean_mask)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FComputeEx>("FComputeEx<gpu>", BooleanMaskBackward<gpu>);
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BooleanMaskBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/bounding_box-common.h b/src/operator/contrib/bounding_box-common.h
index 69a96c60569a..ecbeafa70ab1 100644
--- a/src/operator/contrib/bounding_box-common.h
+++ b/src/operator/contrib/bounding_box-common.h
@@ -21,7 +21,7 @@
  * \file bounding_box-common.h
  * \brief bounding box util functions and operators commonly used by CPU and GPU implementations
  * \author Joshua Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_BOUNDING_BOX_COMMON_H_
 #define MXNET_OPERATOR_CONTRIB_BOUNDING_BOX_COMMON_H_
 #include "../mshadow_op.h"
@@ -31,81 +31,95 @@
 namespace mxnet {
 namespace op {
 namespace box_common_enum {
-enum BoxType {kCorner, kCenter};
+enum BoxType { kCorner, kCenter };
 }
 
 // compute line intersect along either height or width
-template<typename DType>
-MSHADOW_XINLINE DType Intersect(const DType *a, const DType *b, int encode) {
+template <typename DType>
+MSHADOW_XINLINE DType Intersect(const DType* a, const DType* b, int encode) {
   DType a1 = a[0];
   DType a2 = a[2];
   DType b1 = b[0];
   DType b2 = b[2];
   DType w;
   if (box_common_enum::kCorner == encode) {
-    DType left = a1 > b1 ? a1 : b1;
+    DType left  = a1 > b1 ? a1 : b1;
     DType right = a2 < b2 ? a2 : b2;
-    w = right - left;
+    w           = right - left;
   } else {
-    DType aw = a2 / 2;
-    DType bw = b2 / 2;
-    DType al = a1 - aw;
-    DType ar = a1 + aw;
-    DType bl = b1 - bw;
-    DType br = b1 + bw;
-    DType left = bl > al ? bl : al;
+    DType aw    = a2 / 2;
+    DType bw    = b2 / 2;
+    DType al    = a1 - aw;
+    DType ar    = a1 + aw;
+    DType bl    = b1 - bw;
+    DType br    = b1 + bw;
+    DType left  = bl > al ? bl : al;
     DType right = br < ar ? br : ar;
-    w = right - left;
+    w           = right - left;
   }
   return w > 0 ? w : DType(0);
 }
 
 /*!
-   * \brief Implementation of the non-maximum suppression operation
-   *
-   * \param i the launched thread index
-   * \param index sorted index in descending order
-   * \param batch_start map (b, k) to compact index by indices[batch_start[b] + k]
-   * \param input the input of nms op
-   * \param areas pre-computed box areas
-   * \param k nms topk number
-   * \param ref compare reference position
-   * \param num number of input boxes in each batch
-   * \param stride input stride, usually 6 (id-score-x1-y1-x2-y2)
-   * \param offset_box box offset, usually 2
-   * \param thresh nms threshold
-   * \param force force suppress regardless of class id
-   * \param offset_id class id offset, used when force == false, usually 0
-   * \param encode box encoding type, corner(0) or center(1)
-   * \param DType the data type
-   */
+ * \brief Implementation of the non-maximum suppression operation
+ *
+ * \param i the launched thread index
+ * \param index sorted index in descending order
+ * \param batch_start map (b, k) to compact index by indices[batch_start[b] + k]
+ * \param input the input of nms op
+ * \param areas pre-computed box areas
+ * \param k nms topk number
+ * \param ref compare reference position
+ * \param num number of input boxes in each batch
+ * \param stride input stride, usually 6 (id-score-x1-y1-x2-y2)
+ * \param offset_box box offset, usually 2
+ * \param thresh nms threshold
+ * \param force force suppress regardless of class id
+ * \param offset_id class id offset, used when force == false, usually 0
+ * \param encode box encoding type, corner(0) or center(1)
+ * \param DType the data type
+ */
 struct nms_impl {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, int32_t *index, const int32_t *batch_start,
-                                  const DType *input, const DType *areas,
-                                  int k, int ref, int num,
-                                  int stride, int offset_box, int offset_id,
-                                  float thresh, bool force, int encode) {
-    int b = i / k;  // batch
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  int32_t* index,
+                                  const int32_t* batch_start,
+                                  const DType* input,
+                                  const DType* areas,
+                                  int k,
+                                  int ref,
+                                  int num,
+                                  int stride,
+                                  int offset_box,
+                                  int offset_id,
+                                  float thresh,
+                                  bool force,
+                                  int encode) {
+    int b   = i / k;            // batch
     int pos = i % k + ref + 1;  // position
-    ref = static_cast<int>(batch_start[b]) + ref;
-    pos = static_cast<int>(batch_start[b]) + pos;
-    if (ref >= static_cast<int>(batch_start[b + 1])) return;
-    if (pos >= static_cast<int>(batch_start[b + 1])) return;
-    if (index[ref] < 0) return;  // reference has been suppressed
-    if (index[pos] < 0) return;  // self been suppressed
+    ref     = static_cast<int>(batch_start[b]) + ref;
+    pos     = static_cast<int>(batch_start[b]) + pos;
+    if (ref >= static_cast<int>(batch_start[b + 1]))
+      return;
+    if (pos >= static_cast<int>(batch_start[b + 1]))
+      return;
+    if (index[ref] < 0)
+      return;  // reference has been suppressed
+    if (index[pos] < 0)
+      return;  // self been suppressed
     int ref_offset = static_cast<int>(index[ref]) * stride + offset_box;
     int pos_offset = static_cast<int>(index[pos]) * stride + offset_box;
-    if (!force && offset_id >=0) {
+    if (!force && offset_id >= 0) {
       int ref_id = static_cast<int>(input[ref_offset - offset_box + offset_id]);
       int pos_id = static_cast<int>(input[pos_offset - offset_box + offset_id]);
-      if (ref_id != pos_id) return;  // different class
+      if (ref_id != pos_id)
+        return;  // different class
     }
     DType intersect = Intersect(input + ref_offset, input + pos_offset, encode);
     intersect *= Intersect(input + ref_offset + 1, input + pos_offset + 1, encode);
     int ref_area_offset = static_cast<int>(index[ref]);
     int pos_area_offset = static_cast<int>(index[pos]);
-    DType iou = intersect / (areas[ref_area_offset] + areas[pos_area_offset] - intersect);
+    DType iou           = intersect / (areas[ref_area_offset] + areas[pos_area_offset] - intersect);
     if (iou > thresh) {
       index[pos] = -1;
     }
@@ -114,33 +128,33 @@ struct nms_impl {
 
 namespace mshadow_op {
 struct less_than : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return static_cast<DType>(a < b);
   }
 };
 
 struct greater_than : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return static_cast<DType>(a > b);
   }
 };
 
 struct not_equal : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return static_cast<DType>(a != b);
   }
 };
 
 struct bool_and : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return static_cast<DType>(a && b);
   }
 };
-}   // namespace mshadow_op
+}  // namespace mshadow_op
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/bounding_box-inl.h b/src/operator/contrib/bounding_box-inl.h
index c94591eddfdc..192605316fb7 100644
--- a/src/operator/contrib/bounding_box-inl.h
+++ b/src/operator/contrib/bounding_box-inl.h
@@ -21,7 +21,7 @@
  * \file bounding_box-inl.h
  * \brief bounding box util functions and operators
  * \author Joshua Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_BOUNDING_BOX_INL_H_
 #define MXNET_OPERATOR_CONTRIB_BOUNDING_BOX_INL_H_
 #include <mxnet/operator_util.h>
@@ -39,10 +39,10 @@
 namespace mxnet {
 namespace op {
 namespace box_nms_enum {
-enum BoxNMSOpInputs {kData};
-enum BoxNMSOpOutputs {kOut, kTemp};
-enum BoxNMSOpResource {kTempSpace};
-}  // box_nms_enum
+enum BoxNMSOpInputs { kData };
+enum BoxNMSOpOutputs { kOut, kTemp };
+enum BoxNMSOpResource { kTempSpace };
+}  // namespace box_nms_enum
 
 struct BoxNMSParam : public dmlc::Parameter<BoxNMSParam> {
   float overlap_thresh;
@@ -56,90 +56,96 @@ struct BoxNMSParam : public dmlc::Parameter<BoxNMSParam> {
   int in_format;
   int out_format;
   DMLC_DECLARE_PARAMETER(BoxNMSParam) {
-    DMLC_DECLARE_FIELD(overlap_thresh).set_default(0.5)
-    .describe("Overlapping(IoU) threshold to suppress object with smaller score.");
-    DMLC_DECLARE_FIELD(valid_thresh).set_default(0)
-    .describe("Filter input boxes to those whose scores greater than valid_thresh.");
-    DMLC_DECLARE_FIELD(topk).set_default(-1)
-    .describe("Apply nms to topk boxes with descending scores, -1 to no restriction.");
-    DMLC_DECLARE_FIELD(coord_start).set_default(2)
-    .describe("Start index of the consecutive 4 coordinates.");
-    DMLC_DECLARE_FIELD(score_index).set_default(1)
-    .describe("Index of the scores/confidence of boxes.");
-    DMLC_DECLARE_FIELD(id_index).set_default(-1)
-    .describe("Optional, index of the class categories, -1 to disable.");
-    DMLC_DECLARE_FIELD(background_id).set_default(-1)
-    .describe("Optional, id of the background class which will be ignored in nms.");
-    DMLC_DECLARE_FIELD(force_suppress).set_default(false)
-    .describe("Optional, if set false and id_index is provided, nms will only apply"
-    " to boxes belongs to the same category");
-    DMLC_DECLARE_FIELD(in_format).set_default(box_common_enum::kCorner)
-    .add_enum("corner", box_common_enum::kCorner)
-    .add_enum("center", box_common_enum::kCenter)
-    .describe("The input box encoding type. \n"
-        " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
-        " \"center\" means boxes are encodes as [x, y, width, height].");
-    DMLC_DECLARE_FIELD(out_format).set_default(box_common_enum::kCorner)
-    .add_enum("corner", box_common_enum::kCorner)
-    .add_enum("center", box_common_enum::kCenter)
-    .describe("The output box encoding type. \n"
-        " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
-        " \"center\" means boxes are encodes as [x, y, width, height].");
+    DMLC_DECLARE_FIELD(overlap_thresh)
+        .set_default(0.5)
+        .describe("Overlapping(IoU) threshold to suppress object with smaller score.");
+    DMLC_DECLARE_FIELD(valid_thresh)
+        .set_default(0)
+        .describe("Filter input boxes to those whose scores greater than valid_thresh.");
+    DMLC_DECLARE_FIELD(topk).set_default(-1).describe(
+        "Apply nms to topk boxes with descending scores, -1 to no restriction.");
+    DMLC_DECLARE_FIELD(coord_start)
+        .set_default(2)
+        .describe("Start index of the consecutive 4 coordinates.");
+    DMLC_DECLARE_FIELD(score_index)
+        .set_default(1)
+        .describe("Index of the scores/confidence of boxes.");
+    DMLC_DECLARE_FIELD(id_index).set_default(-1).describe(
+        "Optional, index of the class categories, -1 to disable.");
+    DMLC_DECLARE_FIELD(background_id)
+        .set_default(-1)
+        .describe("Optional, id of the background class which will be ignored in nms.");
+    DMLC_DECLARE_FIELD(force_suppress)
+        .set_default(false)
+        .describe(
+            "Optional, if set false and id_index is provided, nms will only apply"
+            " to boxes belongs to the same category");
+    DMLC_DECLARE_FIELD(in_format)
+        .set_default(box_common_enum::kCorner)
+        .add_enum("corner", box_common_enum::kCorner)
+        .add_enum("center", box_common_enum::kCenter)
+        .describe(
+            "The input box encoding type. \n"
+            " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
+            " \"center\" means boxes are encodes as [x, y, width, height].");
+    DMLC_DECLARE_FIELD(out_format)
+        .set_default(box_common_enum::kCorner)
+        .add_enum("corner", box_common_enum::kCorner)
+        .add_enum("center", box_common_enum::kCenter)
+        .describe(
+            "The output box encoding type. \n"
+            " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
+            " \"center\" means boxes are encodes as [x, y, width, height].");
   }
 };  // BoxNMSParam
 
 inline bool BoxNMSShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   const BoxNMSParam& param = nnvm::get<BoxNMSParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
-  if (mxnet::op::shape_is_none(in_attrs->at(0))
-    && mxnet::op::shape_is_none(out_attrs->at(0))) {
+  if (mxnet::op::shape_is_none(in_attrs->at(0)) && mxnet::op::shape_is_none(out_attrs->at(0))) {
     return false;
   }
 
   mxnet::TShape& ishape = (*in_attrs)[0];
-  int indim = ishape.ndim();
-  CHECK(indim >= 2)
-    << "input must have dim >= 2"
-    << " the last two dimensions are num_box and box_width "
-    << ishape << " provided";
+  int indim             = ishape.ndim();
+  CHECK(indim >= 2) << "input must have dim >= 2"
+                    << " the last two dimensions are num_box and box_width " << ishape
+                    << " provided";
   int width_elem = ishape[indim - 1];
-  int expected = 5;
+  int expected   = 5;
   if (param.id_index >= 0) {
     expected += 1;
   }
-  CHECK_GE(width_elem, expected)
-    << "the last dimension must have at least 5 elements"
-    << " namely (score, coordinates x 4) "
-    << width_elem << " provided, " << expected << " expected.";
+  CHECK_GE(width_elem, expected) << "the last dimension must have at least 5 elements"
+                                 << " namely (score, coordinates x 4) " << width_elem
+                                 << " provided, " << expected << " expected.";
   // check indices
   int coord_start = param.coord_start;
-  int coord_end = param.coord_start + 3;
+  int coord_end   = param.coord_start + 3;
   int score_index = param.score_index;
   CHECK(score_index >= 0 && score_index < width_elem)
-    << "score_index: " << score_index << " out of range: (0, "
-    << width_elem << ")";
+      << "score_index: " << score_index << " out of range: (0, " << width_elem << ")";
   CHECK(score_index < coord_start || score_index > coord_end)
-    << "score_index: " << score_index << " conflict with coordinates: ("
-    << coord_start << ", " << coord_end << ").";
+      << "score_index: " << score_index << " conflict with coordinates: (" << coord_start << ", "
+      << coord_end << ").";
   CHECK(coord_start >= 0 && coord_end < width_elem)
-    << "coordinates: (" << coord_start << ", " << coord_end
-    << ") out of range:: (0, " << width_elem << ")";
+      << "coordinates: (" << coord_start << ", " << coord_end << ") out of range:: (0, "
+      << width_elem << ")";
   if (param.id_index >= 0) {
     int id_index = param.id_index;
     CHECK(id_index >= 0 && id_index < width_elem)
-      << "id_index: " << id_index << " out of range: (0, "
-      << width_elem << ")";
+        << "id_index: " << id_index << " out of range: (0, " << width_elem << ")";
     CHECK(id_index < coord_start || id_index > coord_end)
-      << "id_index: " << id_index << " conflict with coordinates: ("
-      << coord_start << ", " << coord_end << ").";
+        << "id_index: " << id_index << " conflict with coordinates: (" << coord_start << ", "
+        << coord_end << ").";
     CHECK_NE(id_index, score_index)
-      << "id_index: " << id_index << " conflict with score_index: " << score_index;
+        << "id_index: " << id_index << " conflict with score_index: " << score_index;
   }
   mxnet::TShape oshape = ishape;
-  oshape[indim - 1] = 1;
+  oshape[indim - 1]    = 1;
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, ishape);  // out_shape[0] == in_shape
   SHAPE_ASSIGN_CHECK(*out_attrs, 1, oshape);  // out_shape[1]
   return true;
@@ -149,7 +155,7 @@ inline uint32_t BoxNMSNumVisibleOutputs(const NodeAttrs& attrs) {
   return static_cast<uint32_t>(1);
 }
 
-template<typename DType, typename FType>
+template <typename DType, typename FType>
 int CopyIf(mshadow::Tensor<cpu, 1, DType> out,
            mshadow::Tensor<cpu, 1, DType> value,
            mshadow::Tensor<cpu, 1, FType> flag) {
@@ -164,49 +170,51 @@ int CopyIf(mshadow::Tensor<cpu, 1, DType> out,
 }
 
 struct corner_to_center {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *data, int stride) {
-    int index = i * stride;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, DType* data, int stride) {
+    int index  = i * stride;
     DType left = data[index];
-    if (left < 0) return;
-    DType top = data[index+1];
-    DType right = data[index+2];
-    DType bot = data[index+3];
-    data[index] = (left + right) / 2;
-    data[index+1] = (top + bot) / 2;
-    data[index+2] = right - left;
-    data[index+3] = bot - top;
+    if (left < 0)
+      return;
+    DType top       = data[index + 1];
+    DType right     = data[index + 2];
+    DType bot       = data[index + 3];
+    data[index]     = (left + right) / 2;
+    data[index + 1] = (top + bot) / 2;
+    data[index + 2] = right - left;
+    data[index + 3] = bot - top;
   }
 };
 
 struct center_to_corner {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *data, int stride) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, DType* data, int stride) {
     int index = i * stride;
-    DType x = data[index];
-    if (x < 0) return;
-    DType y = data[index+1];
-    DType width = data[index+2] / 2;
-    DType height = data[index+3] / 2;
-    data[index] = x - width;
-    data[index+1] = y - height;
-    data[index+2] = x + width;
-    data[index+3] = y + height;
+    DType x   = data[index];
+    if (x < 0)
+      return;
+    DType y         = data[index + 1];
+    DType width     = data[index + 2] / 2;
+    DType height    = data[index + 3] / 2;
+    data[index]     = x - width;
+    data[index + 1] = y - height;
+    data[index + 2] = x + width;
+    data[index + 3] = y + height;
   }
 };
 
-template<typename DType>
-MSHADOW_XINLINE DType BoxArea(const DType *box, int encode) {
+template <typename DType>
+MSHADOW_XINLINE DType BoxArea(const DType* box, int encode) {
   DType a1 = box[0];
   DType a2 = box[1];
   DType a3 = box[2];
   DType a4 = box[3];
   DType width, height;
   if (box_common_enum::kCorner == encode) {
-    width = a3 - a1;
+    width  = a3 - a1;
     height = a4 - a2;
   } else {
-    width = a3;
+    width  = a3;
     height = a4;
   }
   if (width < 0 || height < 0) {
@@ -229,46 +237,68 @@ MSHADOW_XINLINE DType BoxArea(const DType *box, int encode) {
  * \param encode passed to BoxArea to compute area
  */
 struct compute_area {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *out, const DType *in,
-                                  const int32_t *indices, const int32_t *batch_start,
-                                  int topk, int num_elem, int stride, int encode) {
-    int b = i / topk;
-    int k = i % topk;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  const DType* in,
+                                  const int32_t* indices,
+                                  const int32_t* batch_start,
+                                  int topk,
+                                  int num_elem,
+                                  int stride,
+                                  int encode) {
+    int b   = i / topk;
+    int k   = i % topk;
     int pos = static_cast<int>(batch_start[b]) + k;
-    if (pos >= static_cast<int>(batch_start[b + 1])) return;
-    int index = static_cast<int>(indices[pos]);
+    if (pos >= static_cast<int>(batch_start[b + 1]))
+      return;
+    int index    = static_cast<int>(indices[pos]);
     int in_index = index * stride;
-    out[index] = BoxArea(in + in_index, encode);
+    out[index]   = BoxArea(in + in_index, encode);
   }
 };
 
-template<typename DType>
-void NMSApply(mshadow::Stream<cpu> *s,
-              int num_batch, int topk,
+template <typename DType>
+void NMSApply(mshadow::Stream<cpu>* s,
+              int num_batch,
+              int topk,
               mshadow::Tensor<cpu, 1, int32_t>* sorted_index,
               mshadow::Tensor<cpu, 1, int32_t>* batch_start,
               mshadow::Tensor<cpu, 3, DType>* buffer,
               mshadow::Tensor<cpu, 1, DType>* areas,
-              int num_elem, int width_elem,
-              int coord_start, int id_index,
-              float threshold, bool force_suppress,
+              int num_elem,
+              int width_elem,
+              int coord_start,
+              int id_index,
+              float threshold,
+              bool force_suppress,
               int in_format) {
   using namespace mxnet_op;
   // go through each box as reference, suppress if overlap > threshold
   // sorted_index with -1 is marked as suppressed
   for (int ref = 0; ref < topk; ++ref) {
     int num_worker = topk - ref - 1;
-    if (num_worker < 1) continue;
-    Kernel<nms_impl, cpu>::Launch(s, num_batch * num_worker,
-      sorted_index->dptr_, batch_start->dptr_, buffer->dptr_, areas->dptr_,
-      num_worker, ref, num_elem,
-      width_elem, coord_start, id_index,
-      threshold, force_suppress, in_format);
+    if (num_worker < 1)
+      continue;
+    Kernel<nms_impl, cpu>::Launch(s,
+                                  num_batch * num_worker,
+                                  sorted_index->dptr_,
+                                  batch_start->dptr_,
+                                  buffer->dptr_,
+                                  areas->dptr_,
+                                  num_worker,
+                                  ref,
+                                  num_elem,
+                                  width_elem,
+                                  coord_start,
+                                  id_index,
+                                  threshold,
+                                  force_suppress,
+                                  in_format);
   }
 }
 
-inline void NMSCalculateBatchStart(mshadow::Stream<cpu> *s,
+inline void NMSCalculateBatchStart(mshadow::Stream<cpu>* s,
                                    mshadow::Tensor<cpu, 1, int32_t>* batch_start,
                                    mshadow::Tensor<cpu, 1, int32_t>* valid_batch_id,
                                    int num_batch) {
@@ -282,31 +312,38 @@ inline void NMSCalculateBatchStart(mshadow::Stream<cpu> *s,
 }
 
 /*!
-   * \brief Assign output of nms by indexing input
-   *
-   * \param i the launched thread index (total num_batch)
-   * \param out output array [cls, conf, b0, b1, b2, b3]
-   * \param record book keeping the selected index for backward
-   * \param index compact sorted_index, use batch_start to access
-   * \param batch_start map(b, k) to compact index by index[batch_start[b] + k]
-   * \param k nms topk number
-   * \param num number of input boxes in each batch
-   * \param stride input stride, usually 6 (id-score-x1-y2-x2-y2)
-   */
+ * \brief Assign output of nms by indexing input
+ *
+ * \param i the launched thread index (total num_batch)
+ * \param out output array [cls, conf, b0, b1, b2, b3]
+ * \param record book keeping the selected index for backward
+ * \param index compact sorted_index, use batch_start to access
+ * \param batch_start map(b, k) to compact index by index[batch_start[b] + k]
+ * \param k nms topk number
+ * \param num number of input boxes in each batch
+ * \param stride input stride, usually 6 (id-score-x1-y2-x2-y2)
+ */
 struct nms_assign {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *out, DType *record, const DType *input,
-                                  const int32_t *index, const int32_t *batch_start,
-                                  int k, int num, int stride) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  DType* record,
+                                  const DType* input,
+                                  const int32_t* index,
+                                  const int32_t* batch_start,
+                                  int k,
+                                  int num,
+                                  int stride) {
     int count = 0;
     for (int j = 0; j < k; ++j) {
       int pos = static_cast<int>(batch_start[i]) + j;
-      if (pos >= static_cast<int>(batch_start[i + 1])) return;
+      if (pos >= static_cast<int>(batch_start[i + 1]))
+        return;
       int location = static_cast<int>(index[pos]);
       if (location >= 0) {
         // copy to output
         int out_location = (i * num + count) * stride;
-        int in_location = location * stride;
+        int in_location  = location * stride;
         for (int s = 0; s < stride; ++s) {
           out[out_location + s] = input[in_location + s];
         }
@@ -318,14 +355,18 @@ struct nms_assign {
   }
 };
 
-
 struct nms_backward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *in_grad, const DType *out_grad,
-                                  const DType *record, int num, int stride) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* in_grad,
+                                  const DType* out_grad,
+                                  const DType* record,
+                                  int num,
+                                  int stride) {
     int index = static_cast<int>(record[i]);
-    if (index < 0) return;
-    int loc = index * stride;
+    if (index < 0)
+      return;
+    int loc      = index * stride;
     int from_loc = i * stride;
     for (int j = 0; j < stride; ++j) {
       in_grad[loc + j] = out_grad[from_loc + j];
@@ -333,36 +374,36 @@ struct nms_backward {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void BoxNMSForward(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                   const OpContext& ctx,
+                   const std::vector<TBlob>& inputs,
+                   const std::vector<OpReqType>& req,
+                   const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U) << "BoxNMS output: [output, temp]";
   const BoxNMSParam& param = nnvm::get<BoxNMSParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  mxnet::TShape in_shape = inputs[box_nms_enum::kData].shape_;
-  int indim = in_shape.ndim();
-  int num_batch = indim <= 2? 1 : in_shape.ProdShape(0, indim - 2);
-  int num_elem = in_shape[indim - 2];
-  int width_elem = in_shape[indim - 1];
-  bool class_exist = param.id_index >= 0;
+  Stream<xpu>* s           = ctx.get_stream<xpu>();
+  mxnet::TShape in_shape   = inputs[box_nms_enum::kData].shape_;
+  int indim                = in_shape.ndim();
+  int num_batch            = indim <= 2 ? 1 : in_shape.ProdShape(0, indim - 2);
+  int num_elem             = in_shape[indim - 2];
+  int width_elem           = in_shape[indim - 1];
+  bool class_exist         = param.id_index >= 0;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<xpu, 3, DType> data = inputs[box_nms_enum::kData]
-     .get_with_shape<xpu, 3, DType>(Shape3(num_batch, num_elem, width_elem), s);
-    Tensor<xpu, 3, DType> out = outputs[box_nms_enum::kOut]
-     .get_with_shape<xpu, 3, DType>(Shape3(num_batch, num_elem, width_elem), s);
-    Tensor<xpu, 3, DType> record = outputs[box_nms_enum::kTemp]
-     .get_with_shape<xpu, 3, DType>(Shape3(num_batch, num_elem, 1), s);
+    Tensor<xpu, 3, DType> data = inputs[box_nms_enum::kData].get_with_shape<xpu, 3, DType>(
+        Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<xpu, 3, DType> out = outputs[box_nms_enum::kOut].get_with_shape<xpu, 3, DType>(
+        Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<xpu, 3, DType> record = outputs[box_nms_enum::kTemp].get_with_shape<xpu, 3, DType>(
+        Shape3(num_batch, num_elem, 1), s);
 
     // prepare workspace
-    Shape<1> sort_index_shape = Shape1(num_batch * num_elem);
-    Shape<3> buffer_shape = Shape3(num_batch, num_elem, width_elem);
+    Shape<1> sort_index_shape  = Shape1(num_batch * num_elem);
+    Shape<3> buffer_shape      = Shape3(num_batch, num_elem, width_elem);
     Shape<1> batch_start_shape = Shape1(num_batch + 1);
 
     // index
@@ -372,19 +413,19 @@ void BoxNMSForward(const nnvm::NodeAttrs& attrs,
       dtype_size += buffer_shape.Size();
     }
     // ceil up when sizeof(DType) is larger than sizeof(DType)
-    index_t int32_offset = (int32_size * sizeof(int32_t) - 1) / sizeof(DType) + 1;
+    index_t int32_offset   = (int32_size * sizeof(int32_t) - 1) / sizeof(DType) + 1;
     index_t workspace_size = int32_offset + dtype_size;
-    Tensor<xpu, 1, DType> workspace = ctx.requested[box_nms_enum::kTempSpace]
-      .get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[box_nms_enum::kTempSpace].get_space_typed<xpu, 1, DType>(
+            Shape1(workspace_size), s);
     Tensor<xpu, 1, int32_t> sorted_index(
-      reinterpret_cast<int32_t*>(workspace.dptr_), sort_index_shape, s);
-    Tensor<xpu, 1, int32_t> all_sorted_index(sorted_index.dptr_ + sorted_index.MSize(),
-      sort_index_shape, s);
+        reinterpret_cast<int32_t*>(workspace.dptr_), sort_index_shape, s);
+    Tensor<xpu, 1, int32_t> all_sorted_index(
+        sorted_index.dptr_ + sorted_index.MSize(), sort_index_shape, s);
     Tensor<xpu, 1, int32_t> batch_id(
-      all_sorted_index.dptr_ + all_sorted_index.MSize(), sort_index_shape, s);
+        all_sorted_index.dptr_ + all_sorted_index.MSize(), sort_index_shape, s);
     Tensor<xpu, 1, int32_t> batch_start(batch_id.dptr_ + batch_id.MSize(), batch_start_shape, s);
-    Tensor<xpu, 1, DType> scores(workspace.dptr_ + int32_offset,
-      sort_index_shape, s);
+    Tensor<xpu, 1, DType> scores(workspace.dptr_ + int32_offset, sort_index_shape, s);
     Tensor<xpu, 1, DType> areas(scores.dptr_ + scores.MSize(), sort_index_shape, s);
     Tensor<xpu, 1, DType> classes(areas.dptr_ + areas.MSize(), sort_index_shape, s);
     Tensor<xpu, 3, DType> buffer = data;
@@ -397,19 +438,19 @@ void BoxNMSForward(const nnvm::NodeAttrs& attrs,
     // indecies
     int score_index = param.score_index;
     int coord_start = param.coord_start;
-    int id_index = param.id_index;
+    int id_index    = param.id_index;
 
     // sort topk
-    int topk = param.topk < 0? num_elem : std::min(num_elem, param.topk);
+    int topk = param.topk < 0 ? num_elem : std::min(num_elem, param.topk);
     if (topk < 1) {
-      out = F<mshadow_op::identity>(buffer);
+      out    = F<mshadow_op::identity>(buffer);
       record = reshape(range<DType>(0, num_batch * num_elem), record.shape_);
       return;
     }
 
     // use classes, areas and scores as temporary storage
     Tensor<xpu, 1, DType> all_scores = areas;
-    all_scores = reshape(slice<2>(buffer, score_index, score_index + 1), all_scores.shape_);
+    all_scores       = reshape(slice<2>(buffer, score_index, score_index + 1), all_scores.shape_);
     all_sorted_index = range<int32_t>(0, num_batch * num_elem);
     Tensor<xpu, 1, DType> all_classes = classes;
     if (class_exist) {
@@ -421,20 +462,20 @@ void BoxNMSForward(const nnvm::NodeAttrs& attrs,
     Tensor<xpu, 1, DType> valid_box = scores;
     if (class_exist) {
       valid_box = F<mshadow_op::bool_and>(
-        F<mshadow_op::greater_than>(all_scores, ScalarExp<DType>(param.valid_thresh)),
-        F<mshadow_op::not_equal>(all_classes, ScalarExp<DType>(param.background_id)));
+          F<mshadow_op::greater_than>(all_scores, ScalarExp<DType>(param.valid_thresh)),
+          F<mshadow_op::not_equal>(all_classes, ScalarExp<DType>(param.background_id)));
     } else {
       valid_box = F<mshadow_op::greater_than>(all_scores, ScalarExp<DType>(param.valid_thresh));
     }
-    classes = F<mshadow_op::identity>(valid_box);
-    valid_box = classes;
+    classes       = F<mshadow_op::identity>(valid_box);
+    valid_box     = classes;
     int num_valid = mxnet::op::CopyIf(scores, all_scores, valid_box);
     mxnet::op::CopyIf(sorted_index, all_sorted_index, valid_box);
 
     // if everything is filtered, output -1
     if (num_valid == 0) {
       record = -1;
-      out = -1;
+      out    = -1;
       return;
     }
     // mark the invalid boxes before nms
@@ -459,102 +500,119 @@ void BoxNMSForward(const nnvm::NodeAttrs& attrs,
 
     // pre-compute areas of candidates
     areas = 0;
-    Kernel<compute_area, xpu>::Launch(s, num_batch * topk,
-     areas.dptr_, buffer.dptr_ + coord_start, sorted_index.dptr_, batch_start.dptr_,
-     topk, num_elem, width_elem, param.in_format);
+    Kernel<compute_area, xpu>::Launch(s,
+                                      num_batch * topk,
+                                      areas.dptr_,
+                                      buffer.dptr_ + coord_start,
+                                      sorted_index.dptr_,
+                                      batch_start.dptr_,
+                                      topk,
+                                      num_elem,
+                                      width_elem,
+                                      param.in_format);
 
     // apply nms
-    mxnet::op::NMSApply(s, num_batch, topk, &sorted_index,
-                        &batch_start, &buffer, &areas,
-                        num_elem, width_elem, coord_start,
-                        id_index, param.overlap_thresh,
-                        param.force_suppress, param.in_format);
+    mxnet::op::NMSApply(s,
+                        num_batch,
+                        topk,
+                        &sorted_index,
+                        &batch_start,
+                        &buffer,
+                        &areas,
+                        num_elem,
+                        width_elem,
+                        coord_start,
+                        id_index,
+                        param.overlap_thresh,
+                        param.force_suppress,
+                        param.in_format);
 
     // store the results to output, keep a record for backward
     record = -1;
-    out = -1;
-    Kernel<nms_assign, xpu>::Launch(s, num_batch,
-      out.dptr_, record.dptr_, buffer.dptr_, sorted_index.dptr_, batch_start.dptr_,
-      topk, num_elem, width_elem);
+    out    = -1;
+    Kernel<nms_assign, xpu>::Launch(s,
+                                    num_batch,
+                                    out.dptr_,
+                                    record.dptr_,
+                                    buffer.dptr_,
+                                    sorted_index.dptr_,
+                                    batch_start.dptr_,
+                                    topk,
+                                    num_elem,
+                                    width_elem);
 
     // convert encoding
     if (param.in_format != param.out_format) {
       if (box_common_enum::kCenter == param.out_format) {
-        Kernel<corner_to_center, xpu>::Launch(s, num_batch * num_elem,
-          out.dptr_ + coord_start, width_elem);
+        Kernel<corner_to_center, xpu>::Launch(
+            s, num_batch * num_elem, out.dptr_ + coord_start, width_elem);
       } else {
-        Kernel<center_to_corner, xpu>::Launch(s, num_batch * num_elem,
-          out.dptr_ + coord_start, width_elem);
+        Kernel<center_to_corner, xpu>::Launch(
+            s, num_batch * num_elem, out.dptr_ + coord_start, width_elem);
       }
     }
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void BoxNMSBackward(const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx,
-                 const std::vector<TBlob>& inputs,
-                 const std::vector<OpReqType>& req,
-                 const std::vector<TBlob>& outputs) {
+                    const OpContext& ctx,
+                    const std::vector<TBlob>& inputs,
+                    const std::vector<OpReqType>& req,
+                    const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 4U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   mxnet::TShape in_shape = outputs[box_nms_enum::kData].shape_;
-  int indim = in_shape.ndim();
-  int num_batch = indim <= 2? 1 : in_shape.ProdShape(0, indim - 2);
-  int num_elem = in_shape[indim - 2];
-  int width_elem = in_shape[indim - 1];
+  int indim              = in_shape.ndim();
+  int num_batch          = indim <= 2 ? 1 : in_shape.ProdShape(0, indim - 2);
+  int num_elem           = in_shape[indim - 2];
+  int width_elem         = in_shape[indim - 1];
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<xpu, 3, DType> out_grad = inputs[box_nms_enum::kOut]
-     .get_with_shape<xpu, 3, DType>(Shape3(num_batch, num_elem, width_elem), s);
-    Tensor<xpu, 3, DType> in_grad = outputs[box_nms_enum::kData]
-     .get_with_shape<xpu, 3, DType>(Shape3(num_batch, num_elem, width_elem), s);
-    Tensor<xpu, 3, DType> record = inputs[box_nms_enum::kTemp + 2]
-     .get_with_shape<xpu, 3, DType>(Shape3(num_batch, num_elem, 1), s);
+    Tensor<xpu, 3, DType> out_grad = inputs[box_nms_enum::kOut].get_with_shape<xpu, 3, DType>(
+        Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<xpu, 3, DType> in_grad = outputs[box_nms_enum::kData].get_with_shape<xpu, 3, DType>(
+        Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<xpu, 3, DType> record = inputs[box_nms_enum::kTemp + 2].get_with_shape<xpu, 3, DType>(
+        Shape3(num_batch, num_elem, 1), s);
 
     in_grad = 0;
-    Kernel<nms_backward, xpu>::Launch(s, num_batch * num_elem, in_grad.dptr_,
-      out_grad.dptr_, record.dptr_, num_elem, width_elem);
+    Kernel<nms_backward, xpu>::Launch(
+        s, num_batch * num_elem, in_grad.dptr_, out_grad.dptr_, record.dptr_, num_elem, width_elem);
   });
 }
 
 struct BoxOverlapParam : public dmlc::Parameter<BoxOverlapParam> {
   int format;
   DMLC_DECLARE_PARAMETER(BoxOverlapParam) {
-    DMLC_DECLARE_FIELD(format).set_default(box_common_enum::kCorner)
-    .add_enum("corner", box_common_enum::kCorner)
-    .add_enum("center", box_common_enum::kCenter)
-    .describe("The box encoding type. \n"
-        " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
-        " \"center\" means boxes are encodes as [x, y, width, height].");
+    DMLC_DECLARE_FIELD(format)
+        .set_default(box_common_enum::kCorner)
+        .add_enum("corner", box_common_enum::kCorner)
+        .add_enum("center", box_common_enum::kCenter)
+        .describe(
+            "The box encoding type. \n"
+            " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
+            " \"center\" means boxes are encodes as [x, y, width, height].");
   }
 };  // BoxOverlapParam
 
 inline bool BoxOverlapShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& lshape = (*in_attrs)[0];
   mxnet::TShape& rshape = (*in_attrs)[1];
 
-  CHECK_GE(lshape.ndim(), 2)
-    << "lhs must have dim >= 2 "
-    << lshape.ndim() << " provided";
+  CHECK_GE(lshape.ndim(), 2) << "lhs must have dim >= 2 " << lshape.ndim() << " provided";
   int ldim = lshape[lshape.ndim() - 1];
-  CHECK_EQ(ldim, 4)
-    << "last dimension of lhs must be 4 "
-    << ldim << " provided";
-  CHECK_GE(rshape.ndim(), 2)
-    << "rhs must have dim >= 2 "
-    << rshape.ndim() << " provided";
+  CHECK_EQ(ldim, 4) << "last dimension of lhs must be 4 " << ldim << " provided";
+  CHECK_GE(rshape.ndim(), 2) << "rhs must have dim >= 2 " << rshape.ndim() << " provided";
   int rdim = rshape[rshape.ndim() - 1];
-  CHECK_EQ(rdim, 4)
-    << "last dimension of rhs must be 4 "
-    << rdim << " provided";
+  CHECK_EQ(rdim, 4) << "last dimension of rhs must be 4 " << rdim << " provided";
 
   // assign output shape
   mxnet::TShape oshape(lshape.ndim() + rshape.ndim() - 2, -1);
@@ -570,14 +628,19 @@ inline bool BoxOverlapShape(const nnvm::NodeAttrs& attrs,
 }
 
 struct compute_overlap {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *out, const DType *lhs,
-                                  const DType *rhs, int num,
-                                  int begin, int stride, int encode) {
-    int l = i / num;
-    int r = i % num;
-    int l_index = l * stride + begin;
-    int r_index = r * stride + begin;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  const DType* lhs,
+                                  const DType* rhs,
+                                  int num,
+                                  int begin,
+                                  int stride,
+                                  int encode) {
+    int l           = i / num;
+    int r           = i % num;
+    int l_index     = l * stride + begin;
+    int r_index     = r * stride + begin;
     DType intersect = Intersect(lhs + l_index, rhs + r_index, encode);
     intersect *= Intersect(lhs + l_index + 1, rhs + r_index + 1, encode);
     if (intersect <= 0) {
@@ -586,41 +649,38 @@ struct compute_overlap {
     }
     DType l_area = BoxArea(lhs + l_index, encode);
     DType r_area = BoxArea(rhs + r_index, encode);
-    out[i] = intersect / (l_area + r_area - intersect);
+    out[i]       = intersect / (l_area + r_area - intersect);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void BoxOverlapForward(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   const BoxOverlapParam& param = nnvm::get<BoxOverlapParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  mxnet::TShape lshape = inputs[0].shape_;
-  mxnet::TShape rshape = inputs[1].shape_;
-  int lsize = lshape.ProdShape(0, lshape.ndim() - 1);
-  int rsize = rshape.ProdShape(0, rshape.ndim() - 1);
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
+  mxnet::TShape lshape         = inputs[0].shape_;
+  mxnet::TShape rshape         = inputs[1].shape_;
+  int lsize                    = lshape.ProdShape(0, lshape.ndim() - 1);
+  int rsize                    = rshape.ProdShape(0, rshape.ndim() - 1);
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<xpu, 1, DType> lhs = inputs[0]
-     .get_with_shape<xpu, 1, DType>(Shape1(lsize * 4), s);
-    Tensor<xpu, 1, DType> rhs = inputs[1]
-     .get_with_shape<xpu, 1, DType>(Shape1(rsize * 4), s);
-    Tensor<xpu, 1, DType> out = outputs[0]
-     .get_with_shape<xpu, 1, DType>(Shape1(lsize * rsize), s);
-
-    Kernel<compute_overlap, xpu>::Launch(s, lsize * rsize, out.dptr_,
-     lhs.dptr_, rhs.dptr_, rsize, 0, 4, param.format);
+    Tensor<xpu, 1, DType> lhs = inputs[0].get_with_shape<xpu, 1, DType>(Shape1(lsize * 4), s);
+    Tensor<xpu, 1, DType> rhs = inputs[1].get_with_shape<xpu, 1, DType>(Shape1(rsize * 4), s);
+    Tensor<xpu, 1, DType> out = outputs[0].get_with_shape<xpu, 1, DType>(Shape1(lsize * rsize), s);
+
+    Kernel<compute_overlap, xpu>::Launch(
+        s, lsize * rsize, out.dptr_, lhs.dptr_, rhs.dptr_, rsize, 0, 4, param.format);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void BoxOverlapBackward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -631,7 +691,7 @@ void BoxOverlapBackward(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> in_grad_lhs = outputs[0].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> in_grad_rhs = outputs[1].FlatTo2D<xpu, DType>(s);
@@ -646,28 +706,26 @@ struct BipartiteMatchingParam : public dmlc::Parameter<BipartiteMatchingParam> {
   float threshold;
   int topk;
   DMLC_DECLARE_PARAMETER(BipartiteMatchingParam) {
-    DMLC_DECLARE_FIELD(is_ascend).set_default(false)
-    .describe("Use ascend order for scores instead of descending. "
-    "Please set threshold accordingly.");
-    DMLC_DECLARE_FIELD(threshold)
-    .describe("Ignore matching when score < thresh, if is_ascend=false, "
-    "or ignore score > thresh, if is_ascend=true.");
-    DMLC_DECLARE_FIELD(topk).set_default(-1)
-    .describe("Limit the number of matches to topk, set -1 for no limit");
+    DMLC_DECLARE_FIELD(is_ascend).set_default(false).describe(
+        "Use ascend order for scores instead of descending. "
+        "Please set threshold accordingly.");
+    DMLC_DECLARE_FIELD(threshold).describe(
+        "Ignore matching when score < thresh, if is_ascend=false, "
+        "or ignore score > thresh, if is_ascend=true.");
+    DMLC_DECLARE_FIELD(topk).set_default(-1).describe(
+        "Limit the number of matches to topk, set -1 for no limit");
   }
 };  // BipartiteMatchingParam
 
 inline bool MatchingShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   // const BipartiteMatchingParam& param = nnvm::get<BipartiteMatchingParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
   mxnet::TShape& dshape = (*in_attrs)[0];
 
-  CHECK_GE(dshape.ndim(), 2)
-    << "score matrix must have dim >= 2 "
-    << dshape.ndim() << " provided";
+  CHECK_GE(dshape.ndim(), 2) << "score matrix must have dim >= 2 " << dshape.ndim() << " provided";
 
   // assign output shape
   mxnet::TShape oshape(dshape.ndim() - 1, -1);
@@ -681,24 +739,30 @@ inline bool MatchingShape(const nnvm::NodeAttrs& attrs,
 }
 
 struct bipartite_matching {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *row_marker, DType *col_marker,
-                                  const DType *scores, const int32_t *sorted_index,
-                                  int num_batch, int num_row, int num_col,
-                                  float threshold, bool is_ascend, int topk) {
-    int stride = num_row * num_col;
-    const int32_t *index = sorted_index + i * stride;
-    const DType *score = scores + i * stride;
-    DType *rmarker = row_marker + i * num_row;
-    DType *cmarker = col_marker + i * num_col;
-    int count = 0;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* row_marker,
+                                  DType* col_marker,
+                                  const DType* scores,
+                                  const int32_t* sorted_index,
+                                  int num_batch,
+                                  int num_row,
+                                  int num_col,
+                                  float threshold,
+                                  bool is_ascend,
+                                  int topk) {
+    int stride           = num_row * num_col;
+    const int32_t* index = sorted_index + i * stride;
+    const DType* score   = scores + i * stride;
+    DType* rmarker       = row_marker + i * num_row;
+    DType* cmarker       = col_marker + i * num_col;
+    int count            = 0;
     for (int j = 0; j < stride; ++j) {
       int idx = static_cast<int>(index[j]) % stride;
-      int r = idx / num_col;
-      int c = idx % num_col;
+      int r   = idx / num_col;
+      int c   = idx % num_col;
       if (rmarker[r] == -1 && cmarker[c] == -1) {
-        if ((!is_ascend && score[j] > threshold) ||
-            (is_ascend && score[j] < threshold)) {
+        if ((!is_ascend && score[j] > threshold) || (is_ascend && score[j] < threshold)) {
           rmarker[r] = c;
           cmarker[c] = r;
           ++count;
@@ -714,49 +778,48 @@ struct bipartite_matching {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void BipartiteMatchingForward(const nnvm::NodeAttrs& attrs,
-                             const OpContext& ctx,
-                             const std::vector<TBlob>& inputs,
-                             const std::vector<OpReqType>& req,
-                             const std::vector<TBlob>& outputs) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U);
   const BipartiteMatchingParam& param = nnvm::get<BipartiteMatchingParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  mxnet::TShape dshape = inputs[0].shape_;
+  Stream<xpu>* s                      = ctx.get_stream<xpu>();
+  mxnet::TShape dshape                = inputs[0].shape_;
   CHECK(mxnet::shape_is_known(dshape)) << "Found unknown shape in BipartiteMatchingForward, "
                                        << "received: " << dshape;
   if (dshape.Size() == 0) {
     return;  // noop for unknown shape or empty array
   }
-  int row = dshape[dshape.ndim() - 2];
-  int col = dshape[dshape.ndim() - 1];
+  int row        = dshape[dshape.ndim() - 2];
+  int col        = dshape[dshape.ndim() - 1];
   int batch_size = dshape.Size() / row / col;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<xpu, 1, DType> scores = inputs[0]
-     .get_with_shape<xpu, 1, DType>(Shape1(dshape.Size()), s);
-    Tensor<xpu, 2, DType> row_marker = outputs[0]
-     .get_with_shape<xpu, 2, DType>(Shape2(batch_size, row), s);
-    Tensor<xpu, 2, DType> col_marker = outputs[1]
-     .get_with_shape<xpu, 2, DType>(Shape2(batch_size, col), s);
+    Tensor<xpu, 1, DType> scores =
+        inputs[0].get_with_shape<xpu, 1, DType>(Shape1(dshape.Size()), s);
+    Tensor<xpu, 2, DType> row_marker =
+        outputs[0].get_with_shape<xpu, 2, DType>(Shape2(batch_size, row), s);
+    Tensor<xpu, 2, DType> col_marker =
+        outputs[1].get_with_shape<xpu, 2, DType>(Shape2(batch_size, col), s);
     Shape<1> sort_index_shape = Shape1(dshape.Size());
-    index_t workspace_size = sort_index_shape.Size();
+    index_t workspace_size    = sort_index_shape.Size();
     workspace_size += (sort_index_shape.Size() * 2 * sizeof(int32_t) - 1) / sizeof(DType) + 1;
-    Tensor<xpu, 1, DType> workspace = ctx.requested[0]
-      .get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s);
-    Tensor<xpu, 1, DType> scores_copy(workspace.dptr_,
-      sort_index_shape, s);
-    Tensor<xpu, 1, int32_t> sorted_index(reinterpret_cast<int32_t*>(
-      scores_copy.dptr_ + scores_copy.MSize()), sort_index_shape, s);
-    Tensor<xpu, 1, int32_t> batch_id(sorted_index.dptr_ + sorted_index.MSize(),
-      sort_index_shape, s);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s);
+    Tensor<xpu, 1, DType> scores_copy(workspace.dptr_, sort_index_shape, s);
+    Tensor<xpu, 1, int32_t> sorted_index(
+        reinterpret_cast<int32_t*>(scores_copy.dptr_ + scores_copy.MSize()), sort_index_shape, s);
+    Tensor<xpu, 1, int32_t> batch_id(
+        sorted_index.dptr_ + sorted_index.MSize(), sort_index_shape, s);
 
     // sort according to score
-    scores_copy = F<mshadow_op::identity>(scores);
+    scores_copy  = F<mshadow_op::identity>(scores);
     sorted_index = range<int32_t>(0, dshape.Size());
     mxnet::op::SortByKey(scores_copy, sorted_index, param.is_ascend);
     batch_id = (sorted_index / ScalarExp<int32_t>(row * col));
@@ -767,24 +830,33 @@ void BipartiteMatchingForward(const nnvm::NodeAttrs& attrs,
     // bipartite matching, parallelization is limited to batch_size
     row_marker = -1;
     col_marker = -1;
-    Kernel<bipartite_matching, xpu>::Launch(s, batch_size, row_marker.dptr_,
-     col_marker.dptr_, scores_copy.dptr_, sorted_index.dptr_, batch_size, row, col,
-     param.threshold, param.is_ascend, param.topk);
+    Kernel<bipartite_matching, xpu>::Launch(s,
+                                            batch_size,
+                                            row_marker.dptr_,
+                                            col_marker.dptr_,
+                                            scores_copy.dptr_,
+                                            sorted_index.dptr_,
+                                            batch_size,
+                                            row,
+                                            col,
+                                            param.threshold,
+                                            param.is_ascend,
+                                            param.topk);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void BipartiteMatchingBackward(const nnvm::NodeAttrs& attrs,
-                              const OpContext& ctx,
-                              const std::vector<TBlob>& inputs,
-                              const std::vector<OpReqType>& req,
-                              const std::vector<TBlob>& outputs) {
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s       = ctx.get_stream<xpu>();
   mxnet::TShape dshape = outputs[0].shape_;
   CHECK(mxnet::shape_is_known(dshape)) << "Found unknown shape in BipartiteMatchingBackward, "
                                        << "received: " << dshape;
@@ -798,10 +870,9 @@ void BipartiteMatchingBackward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-
 inline bool BoxEncodeShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 6U);
   CHECK_EQ(out_attrs->size(), 2U);
   mxnet::TShape& sshape = (*in_attrs)[0];
@@ -809,29 +880,20 @@ inline bool BoxEncodeShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape& ashape = (*in_attrs)[2];
   mxnet::TShape& rshape = (*in_attrs)[3];
 
-  CHECK_EQ(sshape.ndim(), 2)
-    << "samples shape must have dim == 2, "
-    << sshape.ndim() << " provided";
+  CHECK_EQ(sshape.ndim(), 2) << "samples shape must have dim == 2, " << sshape.ndim()
+                             << " provided";
 
-  CHECK_GE(mshape.ndim(), 2)
-    << "matches shape must have dim == 2, "
-    << mshape.ndim() << " provided";
+  CHECK_GE(mshape.ndim(), 2) << "matches shape must have dim == 2, " << mshape.ndim()
+                             << " provided";
 
-  CHECK_GE(ashape.ndim(), 3)
-    << "matches shape must have dim == 3, "
-    << ashape.ndim() << " provided";
+  CHECK_GE(ashape.ndim(), 3) << "matches shape must have dim == 3, " << ashape.ndim()
+                             << " provided";
   int ldim = ashape[ashape.ndim() - 1];
-  CHECK_EQ(ldim, 4)
-    << "last dimension of anchors must be 4, "
-    << ldim << " provided";
+  CHECK_EQ(ldim, 4) << "last dimension of anchors must be 4, " << ldim << " provided";
 
-  CHECK_GE(rshape.ndim(), 3)
-    << "refs shape must have dim == 3, "
-    << ashape.ndim() << " provided";
+  CHECK_GE(rshape.ndim(), 3) << "refs shape must have dim == 3, " << ashape.ndim() << " provided";
   ldim = rshape[rshape.ndim() - 1];
-  CHECK_EQ(ldim, 4)
-    << "last dimension of anchors must be 4, "
-    << ldim << " provided";
+  CHECK_EQ(ldim, 4) << "last dimension of anchors must be 4, " << ldim << " provided";
 
   // asign input shape
   SHAPE_ASSIGN_CHECK(*in_attrs, 4, mshadow::Shape1(4));
@@ -845,51 +907,61 @@ inline bool BoxEncodeShape(const nnvm::NodeAttrs& attrs,
 }
 
 struct box_encode {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out_targets, DType *out_masks,
-                                  const DType *samples, const DType *matches,
-                                  const DType *anchors, const DType *refs,
-                                  const DType *means, const DType *stds,
-                                  const int m, const int n) {
-    index_t j = i / n;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_targets,
+                                  DType* out_masks,
+                                  const DType* samples,
+                                  const DType* matches,
+                                  const DType* anchors,
+                                  const DType* refs,
+                                  const DType* means,
+                                  const DType* stds,
+                                  const int m,
+                                  const int n) {
+    index_t j     = i / n;
     index_t match = matches[i];
     // xmin: 0, ymin:1, xmax: 2, ymax: 3
     // x:0, y:1, w:2, h:3
-    index_t ref_index = (j * m + match) * 4;
-    DType ref_xmin = refs[ref_index + 0];
-    DType ref_ymin = refs[ref_index + 1];
-    DType ref_width = refs[ref_index + 2] - ref_xmin;
-    DType ref_height = refs[ref_index + 3] - ref_ymin;
-    DType ref_x = ref_xmin + ref_width * 0.5;
-    DType ref_y = ref_ymin + ref_height * 0.5;
-    index_t a_index = i * 4;
-    DType a_xmin = anchors[a_index + 0];
-    DType a_ymin = anchors[a_index + 1];
-    DType a_width = anchors[a_index + 2] - a_xmin;
-    DType a_height = anchors[a_index + 3] - a_ymin;
-    DType a_x = a_xmin + a_width * 0.5;
-    DType a_y = a_ymin + a_height * 0.5;
-    DType valid = samples[i] > 0.5 ? 1.0 : 0.0;
+    index_t ref_index      = (j * m + match) * 4;
+    DType ref_xmin         = refs[ref_index + 0];
+    DType ref_ymin         = refs[ref_index + 1];
+    DType ref_width        = refs[ref_index + 2] - ref_xmin;
+    DType ref_height       = refs[ref_index + 3] - ref_ymin;
+    DType ref_x            = ref_xmin + ref_width * 0.5;
+    DType ref_y            = ref_ymin + ref_height * 0.5;
+    index_t a_index        = i * 4;
+    DType a_xmin           = anchors[a_index + 0];
+    DType a_ymin           = anchors[a_index + 1];
+    DType a_width          = anchors[a_index + 2] - a_xmin;
+    DType a_height         = anchors[a_index + 3] - a_ymin;
+    DType a_x              = a_xmin + a_width * 0.5;
+    DType a_y              = a_ymin + a_height * 0.5;
+    DType valid            = samples[i] > 0.5 ? 1.0 : 0.0;
     out_masks[a_index + 0] = valid;
     out_masks[a_index + 1] = valid;
     out_masks[a_index + 2] = valid;
     out_masks[a_index + 3] = valid;
-    out_targets[a_index + 0] = valid > static_cast<DType>(0.5) ?
-        ((ref_x - a_x) / a_width - static_cast<DType>(means[0])) /
-        static_cast<DType>(stds[0]) : static_cast<DType>(0.0);
-    out_targets[a_index + 1] = valid > static_cast<DType>(0.5) ?
-        ((ref_y - a_y) / a_height - static_cast<DType>(means[1])) /
-        static_cast<DType>(stds[1]) : static_cast<DType>(0.0);
-    out_targets[a_index + 2] = valid > static_cast<DType>(0.5) ?
-        (log(ref_width / a_width) - static_cast<DType>(means[2])) /
-        static_cast<DType>(stds[2]) : static_cast<DType>(0.0);
-    out_targets[a_index + 3] = valid > static_cast<DType>(0.5) ?
-        (log(ref_height / a_height) - static_cast<DType>(means[3])) /
-        static_cast<DType>(stds[3]) : static_cast<DType>(0.0);
+    out_targets[a_index + 0] =
+        valid > static_cast<DType>(0.5)
+            ? ((ref_x - a_x) / a_width - static_cast<DType>(means[0])) / static_cast<DType>(stds[0])
+            : static_cast<DType>(0.0);
+    out_targets[a_index + 1] = valid > static_cast<DType>(0.5)
+                                   ? ((ref_y - a_y) / a_height - static_cast<DType>(means[1])) /
+                                         static_cast<DType>(stds[1])
+                                   : static_cast<DType>(0.0);
+    out_targets[a_index + 2] = valid > static_cast<DType>(0.5)
+                                   ? (log(ref_width / a_width) - static_cast<DType>(means[2])) /
+                                         static_cast<DType>(stds[2])
+                                   : static_cast<DType>(0.0);
+    out_targets[a_index + 3] = valid > static_cast<DType>(0.5)
+                                   ? (log(ref_height / a_height) - static_cast<DType>(means[3])) /
+                                         static_cast<DType>(stds[3])
+                                   : static_cast<DType>(0.0);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void BoxEncodeForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -900,34 +972,36 @@ void BoxEncodeForward(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 6U);
   CHECK_EQ(outputs.size(), 2U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // samples, matches, anchors, refs, means, stds
   mxnet::TShape anchor_shape = inputs[2].shape_;
-  int loop_size = anchor_shape.ProdShape(0, 2);
-  int b = anchor_shape[0];
-  int n = anchor_shape[1];
-  int m = inputs[3].shape_[1];
+  int loop_size              = anchor_shape.ProdShape(0, 2);
+  int b                      = anchor_shape[0];
+  int n                      = anchor_shape[1];
+  int m                      = inputs[3].shape_[1];
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<xpu, 2, DType> samples = inputs[0]
-     .get_with_shape<xpu, 2, DType>(Shape2(b, n), s);
-    Tensor<xpu, 2, DType> matches = inputs[1]
-     .get_with_shape<xpu, 2, DType>(Shape2(b, n), s);
-    Tensor<xpu, 3, DType> anchors = inputs[2]
-     .get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
-    Tensor<xpu, 3, DType> refs = inputs[3]
-     .get_with_shape<xpu, 3, DType>(Shape3(b, m, 4), s);
-    Tensor<xpu, 1, DType> means = inputs[4]
-     .get_with_shape<xpu, 1, DType>(Shape1(4), s);
-    Tensor<xpu, 1, DType> stds = inputs[5]
-     .get_with_shape<xpu, 1, DType>(Shape1(4), s);
-    Tensor<xpu, 3, DType> out_targets = outputs[0]
-     .get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
-    Tensor<xpu, 3, DType> out_masks = outputs[1]
-     .get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
-
-    Kernel<box_encode, xpu>::Launch(s, loop_size, out_targets.dptr_,
-     out_masks.dptr_, samples.dptr_, matches.dptr_, anchors.dptr_,
-     refs.dptr_, means.dptr_, stds.dptr_, m, n);
+    Tensor<xpu, 2, DType> samples = inputs[0].get_with_shape<xpu, 2, DType>(Shape2(b, n), s);
+    Tensor<xpu, 2, DType> matches = inputs[1].get_with_shape<xpu, 2, DType>(Shape2(b, n), s);
+    Tensor<xpu, 3, DType> anchors = inputs[2].get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
+    Tensor<xpu, 3, DType> refs    = inputs[3].get_with_shape<xpu, 3, DType>(Shape3(b, m, 4), s);
+    Tensor<xpu, 1, DType> means   = inputs[4].get_with_shape<xpu, 1, DType>(Shape1(4), s);
+    Tensor<xpu, 1, DType> stds    = inputs[5].get_with_shape<xpu, 1, DType>(Shape1(4), s);
+    Tensor<xpu, 3, DType> out_targets =
+        outputs[0].get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
+    Tensor<xpu, 3, DType> out_masks = outputs[1].get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
+
+    Kernel<box_encode, xpu>::Launch(s,
+                                    loop_size,
+                                    out_targets.dptr_,
+                                    out_masks.dptr_,
+                                    samples.dptr_,
+                                    matches.dptr_,
+                                    anchors.dptr_,
+                                    refs.dptr_,
+                                    means.dptr_,
+                                    stds.dptr_,
+                                    m,
+                                    n);
   });
 }
 
@@ -939,48 +1013,43 @@ struct BoxDecodeParam : public dmlc::Parameter<BoxDecodeParam> {
   float clip;
   int format;
   DMLC_DECLARE_PARAMETER(BoxDecodeParam) {
-    DMLC_DECLARE_FIELD(std0).set_default(1.0)
-    .describe("value to be divided from the 1st encoded values");
-    DMLC_DECLARE_FIELD(std1).set_default(1.0)
-    .describe("value to be divided from the 2nd encoded values");
-    DMLC_DECLARE_FIELD(std2).set_default(1.0)
-    .describe("value to be divided from the 3rd encoded values");
-    DMLC_DECLARE_FIELD(std3).set_default(1.0)
-    .describe("value to be divided from the 4th encoded values");
-    DMLC_DECLARE_FIELD(clip).set_default(-1.0)
-    .describe("If larger than 0, bounding box target will be clipped to this value.");
-    DMLC_DECLARE_FIELD(format).set_default(box_common_enum::kCenter)
-    .add_enum("corner", box_common_enum::kCorner)
-    .add_enum("center", box_common_enum::kCenter)
-    .describe("The box encoding type. \n"
-              " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
-              " \"center\" means boxes are encodes as [x, y, width, height].");
+    DMLC_DECLARE_FIELD(std0).set_default(1.0).describe(
+        "value to be divided from the 1st encoded values");
+    DMLC_DECLARE_FIELD(std1).set_default(1.0).describe(
+        "value to be divided from the 2nd encoded values");
+    DMLC_DECLARE_FIELD(std2).set_default(1.0).describe(
+        "value to be divided from the 3rd encoded values");
+    DMLC_DECLARE_FIELD(std3).set_default(1.0).describe(
+        "value to be divided from the 4th encoded values");
+    DMLC_DECLARE_FIELD(clip).set_default(-1.0).describe(
+        "If larger than 0, bounding box target will be clipped to this value.");
+    DMLC_DECLARE_FIELD(format)
+        .set_default(box_common_enum::kCenter)
+        .add_enum("corner", box_common_enum::kCorner)
+        .add_enum("center", box_common_enum::kCenter)
+        .describe(
+            "The box encoding type. \n"
+            " \"corner\" means boxes are encoded as [xmin, ymin, xmax, ymax],"
+            " \"center\" means boxes are encodes as [x, y, width, height].");
   }
 };  // BoxDecodeParam
 
 inline bool BoxDecodeShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& dshape = (*in_attrs)[0];
   mxnet::TShape& ashape = (*in_attrs)[1];
 
-  CHECK_EQ(dshape.ndim(), 3)
-    << "data shape must have dim == 3, "
-    << dshape.ndim() << " provided";
+  CHECK_EQ(dshape.ndim(), 3) << "data shape must have dim == 3, " << dshape.ndim() << " provided";
   int ldim = dshape[dshape.ndim() - 1];
-  CHECK_EQ(ldim, 4)
-    << "last dimension of data must be 4, "
-    << ldim << " provided";
+  CHECK_EQ(ldim, 4) << "last dimension of data must be 4, " << ldim << " provided";
 
-  CHECK_GE(ashape.ndim(), 3)
-    << "anchors shape must have dim == 3, "
-    << ashape.ndim() << " provided";
+  CHECK_GE(ashape.ndim(), 3) << "anchors shape must have dim == 3, " << ashape.ndim()
+                             << " provided";
   ldim = ashape[ashape.ndim() - 1];
-  CHECK_EQ(ldim, 4)
-    << "last dimension of anchors must be 4, "
-    << ldim << " provided";
+  CHECK_EQ(ldim, 4) << "last dimension of anchors must be 4, " << ldim << " provided";
 
   // assign output shape
   mxnet::TShape oshape = dshape;
@@ -988,39 +1057,44 @@ inline bool BoxDecodeShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(oshape);
 }
 
-template<int anchor_encode, bool has_clip>
+template <int anchor_encode, bool has_clip>
 struct box_decode {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *x,
-                                  const DType *anchors, const DType std0,
-                                  const DType std1, const DType std2,
-                                  const DType std3, const DType clip,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* x,
+                                  const DType* anchors,
+                                  const DType std0,
+                                  const DType std1,
+                                  const DType std2,
+                                  const DType std3,
+                                  const DType clip,
                                   const int n) {
-    index_t index = i * 4;
+    index_t index   = i * 4;
     index_t a_index = (i % n) * 4;
-    DType a_x = anchors[a_index + 0];
-    DType a_y = anchors[a_index + 1];
-    DType a_width = anchors[a_index + 2];
-    DType a_height = anchors[a_index + 3];
+    DType a_x       = anchors[a_index + 0];
+    DType a_y       = anchors[a_index + 1];
+    DType a_width   = anchors[a_index + 2];
+    DType a_height  = anchors[a_index + 3];
     if (box_common_enum::kCorner == anchor_encode) {
       // a_x = xmin, a_y = ymin, a_width = xmax, a_height = ymax
-      a_width = a_width - a_x;
+      a_width  = a_width - a_x;
       a_height = a_height - a_y;
-      a_x = a_x + a_width * 0.5;
-      a_y = a_y + a_height * 0.5;
+      a_x      = a_x + a_width * 0.5;
+      a_y      = a_y + a_height * 0.5;
     }
     DType ox = x[index + 0] * std0 * a_width + a_x;
     DType oy = x[index + 1] * std1 * a_height + a_y;
     DType dw = x[index + 2] * std2;
     DType dh = x[index + 3] * std3;
     if (has_clip) {
-        dw = dw < clip ? dw : clip;
-        dh = dh < clip ? dh : clip;
+      dw = dw < clip ? dw : clip;
+      dh = dh < clip ? dh : clip;
     }
-    dw = exp(dw);
-    dh = exp(dh);
-    DType ow = dw * a_width * 0.5;
-    DType oh = dh * a_height * 0.5;
+    dw             = exp(dw);
+    dh             = exp(dh);
+    DType ow       = dw * a_width * 0.5;
+    DType oh       = dh * a_height * 0.5;
     out[index + 0] = ox - ow;
     out[index + 1] = oy - oh;
     out[index + 2] = ox + ow;
@@ -1028,7 +1102,7 @@ struct box_decode {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void BoxDecodeForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -1039,39 +1113,68 @@ void BoxDecodeForward(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  mxnet::TShape x_shape = inputs[0].shape_;
-  int b = x_shape[0];
-  int n = x_shape[1];
-  int loop_size = b * n;
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
+  mxnet::TShape x_shape       = inputs[0].shape_;
+  int b                       = x_shape[0];
+  int n                       = x_shape[1];
+  int loop_size               = b * n;
   const BoxDecodeParam& param = nnvm::get<BoxDecodeParam>(attrs.parsed);
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<xpu, 3, DType> data = inputs[0]
-     .get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
-    Tensor<xpu, 3, DType> anchors = inputs[1]
-     .get_with_shape<xpu, 3, DType>(Shape3(1, n, 4), s);
-    Tensor<xpu, 3, DType> out = outputs[0]
-     .get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
+    Tensor<xpu, 3, DType> data    = inputs[0].get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
+    Tensor<xpu, 3, DType> anchors = inputs[1].get_with_shape<xpu, 3, DType>(Shape3(1, n, 4), s);
+    Tensor<xpu, 3, DType> out     = outputs[0].get_with_shape<xpu, 3, DType>(Shape3(b, n, 4), s);
     if (box_common_enum::kCorner == param.format && param.clip > 0.0) {
-      Kernel<box_decode<box_common_enum::kCorner, true>, xpu>::Launch(s, loop_size,
-        out.dptr_, data.dptr_, anchors.dptr_, static_cast<DType>(param.std0),
-        static_cast<DType>(param.std1), static_cast<DType>(param.std2),
-        static_cast<DType>(param.std3), static_cast<DType>(param.clip), n);
+      Kernel<box_decode<box_common_enum::kCorner, true>, xpu>::Launch(
+          s,
+          loop_size,
+          out.dptr_,
+          data.dptr_,
+          anchors.dptr_,
+          static_cast<DType>(param.std0),
+          static_cast<DType>(param.std1),
+          static_cast<DType>(param.std2),
+          static_cast<DType>(param.std3),
+          static_cast<DType>(param.clip),
+          n);
     } else if (box_common_enum::kCenter == param.format && param.clip > 0.0) {
-      Kernel<box_decode<box_common_enum::kCenter, true>, xpu>::Launch(s, loop_size,
-        out.dptr_, data.dptr_, anchors.dptr_, static_cast<DType>(param.std0),
-        static_cast<DType>(param.std1), static_cast<DType>(param.std2),
-        static_cast<DType>(param.std3), static_cast<DType>(param.clip), n);
+      Kernel<box_decode<box_common_enum::kCenter, true>, xpu>::Launch(
+          s,
+          loop_size,
+          out.dptr_,
+          data.dptr_,
+          anchors.dptr_,
+          static_cast<DType>(param.std0),
+          static_cast<DType>(param.std1),
+          static_cast<DType>(param.std2),
+          static_cast<DType>(param.std3),
+          static_cast<DType>(param.clip),
+          n);
     } else if (box_common_enum::kCorner == param.format && param.clip <= 0.0) {
-      Kernel<box_decode<box_common_enum::kCorner, false>, xpu>::Launch(s, loop_size,
-        out.dptr_, data.dptr_, anchors.dptr_, static_cast<DType>(param.std0),
-        static_cast<DType>(param.std1), static_cast<DType>(param.std2),
-        static_cast<DType>(param.std3), static_cast<DType>(param.clip), n);
+      Kernel<box_decode<box_common_enum::kCorner, false>, xpu>::Launch(
+          s,
+          loop_size,
+          out.dptr_,
+          data.dptr_,
+          anchors.dptr_,
+          static_cast<DType>(param.std0),
+          static_cast<DType>(param.std1),
+          static_cast<DType>(param.std2),
+          static_cast<DType>(param.std3),
+          static_cast<DType>(param.clip),
+          n);
     } else {
-      Kernel<box_decode<box_common_enum::kCenter, false>, xpu>::Launch(s, loop_size,
-        out.dptr_, data.dptr_, anchors.dptr_, static_cast<DType>(param.std0),
-        static_cast<DType>(param.std1), static_cast<DType>(param.std2),
-        static_cast<DType>(param.std3), static_cast<DType>(param.clip), n);
+      Kernel<box_decode<box_common_enum::kCenter, false>, xpu>::Launch(
+          s,
+          loop_size,
+          out.dptr_,
+          data.dptr_,
+          anchors.dptr_,
+          static_cast<DType>(param.std0),
+          static_cast<DType>(param.std1),
+          static_cast<DType>(param.std2),
+          static_cast<DType>(param.std3),
+          static_cast<DType>(param.clip),
+          n);
     }
   });
 }
diff --git a/src/operator/contrib/bounding_box.cc b/src/operator/contrib/bounding_box.cc
index d4a599275e88..0d6a29b98c43 100644
--- a/src/operator/contrib/bounding_box.cc
+++ b/src/operator/contrib/bounding_box.cc
@@ -17,12 +17,12 @@
  * under the License.
  */
 
- /*!
-  *  Copyright (c) 2017 by Contributors
-  * \file bounding_box.cc
-  * \brief Bounding box util functions and operators
-  * \author Joshua Zhang
-  */
+/*!
+ *  Copyright (c) 2017 by Contributors
+ * \file bounding_box.cc
+ * \brief Bounding box util functions and operators
+ * \author Joshua Zhang
+ */
 
 #include "./bounding_box-inl.h"
 #include "../elemwise_op_common.h"
@@ -34,11 +34,10 @@ DMLC_REGISTER_PARAMETER(BoxOverlapParam);
 DMLC_REGISTER_PARAMETER(BipartiteMatchingParam);
 DMLC_REGISTER_PARAMETER(BoxDecodeParam);
 
-
 NNVM_REGISTER_OP(_contrib_box_nms)
-.add_alias("_contrib_box_non_maximum_suppression")
-.add_alias("_npx_box_nms")
-.describe(R"code(Apply non-maximum suppression to input.
+    .add_alias("_contrib_box_non_maximum_suppression")
+    .add_alias("_npx_box_nms")
+    .describe(R"code(Apply non-maximum suppression to input.
 
 The output will be sorted in descending order according to ``score``. Boxes with
 overlaps larger than ``overlap_thresh``, smaller scores and background boxes
@@ -94,33 +93,33 @@ Examples::
              [0, 0, 0, 0, 0, 0], [0.1, 0.1, 0.1, 0.1, 0.1, 0.1]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<BoxNMSParam>)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", BoxNMSNumVisibleOutputs)
-.set_attr<mxnet::FInferShape>("FInferShape", BoxNMSShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", BoxNMSForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_contrib_box_nms"})
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(BoxNMSParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<BoxNMSParam>)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", BoxNMSNumVisibleOutputs)
+    .set_attr<mxnet::FInferShape>("FInferShape", BoxNMSShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", BoxNMSForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_contrib_box_nms"})
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(BoxNMSParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_contrib_box_nms)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<BoxNMSParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", BoxNMSBackward<cpu>)
-.add_arguments(BoxNMSParam::__FIELDS__());
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<BoxNMSParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", BoxNMSBackward<cpu>)
+    .add_arguments(BoxNMSParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_box_iou)
-.add_alias("_npx_box_iou")
-.describe(R"doc(Bounding box overlap of two arrays.
+    .add_alias("_npx_box_iou")
+    .describe(R"doc(Bounding box overlap of two arrays.
   The overlap is defined as Intersection-over-Union, aka, IOU.
   - lhs: (a_1, a_2, ..., a_n, 4) array
   - rhs: (b_1, b_2, ..., b_n, 4) array
@@ -137,32 +136,32 @@ NNVM_REGISTER_OP(_contrib_box_iou)
     box_iou(x, y, format='corner') = [[0.1428], [0.1428]]
 
 )doc" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<BoxOverlapParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BoxOverlapShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", BoxOverlapForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_contrib_box_iou"})
-.add_argument("lhs", "NDArray-or-Symbol", "The first input")
-.add_argument("rhs", "NDArray-or-Symbol", "The second input")
-.add_arguments(BoxOverlapParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<BoxOverlapParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BoxOverlapShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", BoxOverlapForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_contrib_box_iou"})
+    .add_argument("lhs", "NDArray-or-Symbol", "The first input")
+    .add_argument("rhs", "NDArray-or-Symbol", "The second input")
+    .add_arguments(BoxOverlapParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_contrib_box_iou)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<BoxOverlapParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", BoxOverlapBackward<cpu>)
-.add_arguments(BoxOverlapParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<BoxOverlapParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", BoxOverlapBackward<cpu>)
+    .add_arguments(BoxOverlapParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_bipartite_matching)
-.add_alias("_npx_bipartite_matching")
-.describe(R"doc(Compute bipartite matching.
+    .add_alias("_npx_bipartite_matching")
+    .describe(R"doc(Compute bipartite matching.
   The matching is performed on score matrix with shape [B, N, M]
   - B: batch_size
   - N: number of rows to match
@@ -184,73 +183,78 @@ NNVM_REGISTER_OP(_contrib_bipartite_matching)
     y = [2, 0]
 
 )doc" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<BipartiteMatchingParam>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", MatchingShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
-.set_attr<FCompute>("FCompute<cpu>", BipartiteMatchingForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  ElemwiseGradUseNone{"_backward_contrib_bipartite_matching"})
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(BipartiteMatchingParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<BipartiteMatchingParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", MatchingShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
+    .set_attr<FCompute>("FCompute<cpu>", BipartiteMatchingForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseNone{"_backward_contrib_bipartite_matching"})
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(BipartiteMatchingParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_contrib_bipartite_matching)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<BipartiteMatchingParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", BipartiteMatchingBackward<cpu>)
-.add_arguments(BipartiteMatchingParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<BipartiteMatchingParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", BipartiteMatchingBackward<cpu>)
+    .add_arguments(BipartiteMatchingParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_box_encode)
-.add_alias("_npx_box_encode")
-.describe(R"doc(Encode bounding boxes training target with normalized center offsets.
+    .add_alias("_npx_box_encode")
+    .describe(R"doc(Encode bounding boxes training target with normalized center offsets.
     Input bounding boxes are using corner type: `x_{min}, y_{min}, x_{max}, y_{max}`.) array
 )doc" ADD_FILELINE)
-.set_num_inputs(6)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"samples", "matches", "anchors", "refs", "means", "stds"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BoxEncodeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<6, 2>)
-.set_attr<FCompute>("FCompute<cpu>", BoxEncodeForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("samples", "NDArray-or-Symbol", "(B, N) value +1 (positive), -1 (negative), "
-              "0 (ignore)")
-.add_argument("matches", "NDArray-or-Symbol", "(B, N) value range [0, M)")
-.add_argument("anchors", "NDArray-or-Symbol", "(B, N, 4) encoded in corner")
-.add_argument("refs", "NDArray-or-Symbol", "(B, M, 4) encoded in corner")
-.add_argument("means", "NDArray-or-Symbol", "(4,) Mean value to be subtracted from encoded values")
-.add_argument("stds", "NDArray-or-Symbol", "(4,) Std value to be divided from encoded values");
+    .set_num_inputs(6)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"samples", "matches", "anchors", "refs", "means", "stds"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", BoxEncodeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<6, 2>)
+    .set_attr<FCompute>("FCompute<cpu>", BoxEncodeForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("samples",
+                  "NDArray-or-Symbol",
+                  "(B, N) value +1 (positive), -1 (negative), "
+                  "0 (ignore)")
+    .add_argument("matches", "NDArray-or-Symbol", "(B, N) value range [0, M)")
+    .add_argument("anchors", "NDArray-or-Symbol", "(B, N, 4) encoded in corner")
+    .add_argument("refs", "NDArray-or-Symbol", "(B, M, 4) encoded in corner")
+    .add_argument("means",
+                  "NDArray-or-Symbol",
+                  "(4,) Mean value to be subtracted from encoded values")
+    .add_argument("stds", "NDArray-or-Symbol", "(4,) Std value to be divided from encoded values");
 
 NNVM_REGISTER_OP(_contrib_box_decode)
-.add_alias("_npx_box_decode")
-.describe(R"doc(Decode bounding boxes training target with normalized center offsets.
+    .add_alias("_npx_box_decode")
+    .describe(R"doc(Decode bounding boxes training target with normalized center offsets.
     Input bounding boxes are using corner type: ``x_{min}, y_{min}, x_{max}, y_{max}``
     or center type: ``x, y, width, height``.) array
 )doc" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<BoxDecodeParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "anchors"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BoxDecodeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", BoxDecodeForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "(B, N, 4) predicted bbox offset")
-.add_argument("anchors", "NDArray-or-Symbol", "(1, N, 4) encoded in corner or center")
-.add_arguments(BoxDecodeParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<BoxDecodeParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "anchors"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BoxDecodeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", BoxDecodeForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "(B, N, 4) predicted bbox offset")
+    .add_argument("anchors", "NDArray-or-Symbol", "(1, N, 4) encoded in corner or center")
+    .add_arguments(BoxDecodeParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/bounding_box.cu b/src/operator/contrib/bounding_box.cu
index 7915273f64e8..f87c2dccc4da 100644
--- a/src/operator/contrib/bounding_box.cu
+++ b/src/operator/contrib/bounding_box.cu
@@ -17,12 +17,12 @@
  * under the License.
  */
 
- /*!
-  *  Copyright (c) 2017 by Contributors
-  * \file bounding_box.cu
-  * \brief Bounding box util functions and operators
-  * \author Joshua Zhang
-  */
+/*!
+ *  Copyright (c) 2017 by Contributors
+ * \file bounding_box.cu
+ * \brief Bounding box util functions and operators
+ * \author Joshua Zhang
+ */
 
 #include <cub/cub.cuh>
 
@@ -35,8 +35,8 @@ namespace op {
 
 namespace {
 
-using mshadow::Tensor;
 using mshadow::Stream;
+using mshadow::Tensor;
 
 template <typename DType>
 struct TempWorkspace {
@@ -57,26 +57,29 @@ inline size_t ceil_div(size_t x, size_t y) {
 }
 
 inline size_t align(size_t x, size_t alignment) {
-  return ceil_div(x, alignment)  * alignment;
+  return ceil_div(x, alignment) * alignment;
 }
 
 template <typename DType>
-__global__ void FilterAndPrepareAuxDataKernel(const DType* data, DType* out, DType* scores,
-                                               index_t num_elements_per_batch,
-                                               const index_t element_width,
-                                               const index_t N,
-                                               const float threshold,
-                                               const int id_index, const int score_index,
-                                               const int background_id) {
-  index_t tid = blockIdx.x * blockDim.x + threadIdx.x;
-  bool first_in_element = (tid % element_width == 0);
+__global__ void FilterAndPrepareAuxDataKernel(const DType* data,
+                                              DType* out,
+                                              DType* scores,
+                                              index_t num_elements_per_batch,
+                                              const index_t element_width,
+                                              const index_t N,
+                                              const float threshold,
+                                              const int id_index,
+                                              const int score_index,
+                                              const int background_id) {
+  index_t tid                 = blockIdx.x * blockDim.x + threadIdx.x;
+  bool first_in_element       = (tid % element_width == 0);
   index_t start_of_my_element = tid - (tid % element_width);
 
   if (tid < N) {
-    DType my_score = data[start_of_my_element + score_index];
+    DType my_score    = data[start_of_my_element + score_index];
     bool filtered_out = my_score <= threshold;
     if (id_index != -1 && background_id != -1) {
-      DType my_id = data[start_of_my_element + id_index];
+      DType my_id  = data[start_of_my_element + id_index];
       filtered_out = filtered_out || (my_id == background_id);
     }
     if (!filtered_out) {
@@ -100,35 +103,40 @@ void FilterAndPrepareAuxData(const Tensor<gpu, 3, DType>& data,
                              const BoxNMSParam& param,
                              Stream<gpu>* s) {
   const int n_threads = 512;
-  index_t N = data.shape_.Size();
-  const auto blocks = ceil_div(N, n_threads);
-  FilterAndPrepareAuxDataKernel<<<blocks,
-                                   n_threads,
-                                   0,
-                                   Stream<gpu>::GetStream(s)>>>(
-    data.dptr_, out->dptr_, workspace.scores,
-    data.shape_[1], data.shape_[2], N,
-    param.valid_thresh, param.id_index,
-    param.score_index, param.background_id);
+  index_t N           = data.shape_.Size();
+  const auto blocks   = ceil_div(N, n_threads);
+  FilterAndPrepareAuxDataKernel<<<blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
+      data.dptr_,
+      out->dptr_,
+      workspace.scores,
+      data.shape_[1],
+      data.shape_[2],
+      N,
+      param.valid_thresh,
+      param.id_index,
+      param.score_index,
+      param.background_id);
 }
 
 template <bool check_topk, bool check_score, typename DType>
-__global__ void CompactDataKernel(const index_t* indices, const DType* source,
-                                   DType* destination, const index_t topk,
-                                   const index_t element_width,
-                                   const index_t num_elements_per_batch,
-                                   const int score_index,
-                                   const index_t N) {
+__global__ void CompactDataKernel(const index_t* indices,
+                                  const DType* source,
+                                  DType* destination,
+                                  const index_t topk,
+                                  const index_t element_width,
+                                  const index_t num_elements_per_batch,
+                                  const int score_index,
+                                  const index_t N) {
   const index_t tid_start = blockIdx.x * blockDim.x + threadIdx.x;
   for (index_t tid = tid_start; tid < N; tid += blockDim.x * gridDim.x) {
-    const index_t my_element = tid / element_width;
+    const index_t my_element          = tid / element_width;
     const index_t my_element_in_batch = my_element % num_elements_per_batch;
     if (check_topk && my_element_in_batch >= topk) {
       destination[tid] = -1;
     } else {
       DType ret;
       const index_t source_element = indices[my_element];
-      DType score = 0;
+      DType score                  = 0;
       if (check_score) {
         score = source[source_element * element_width + score_index];
       }
@@ -149,24 +157,30 @@ void CompactData(const Tensor<gpu, 1, index_t>& indices,
                  const index_t topk,
                  const int score_index,
                  Stream<gpu>* s) {
-  const int n_threads = 512;
+  const int n_threads     = 512;
   const size_t max_blocks = 320;
-  index_t N = source.shape_.Size();
-  const auto blocks = std::min(ceil_div(N, n_threads), max_blocks);
+  index_t N               = source.shape_.Size();
+  const auto blocks       = std::min(ceil_div(N, n_threads), max_blocks);
   if (topk > 0) {
-    CompactDataKernel<true, check_score><<<blocks, n_threads, 0,
-                                            Stream<gpu>::GetStream(s)>>>(
-      indices.dptr_, source.dptr_,
-      destination->dptr_, topk,
-      source.shape_[2], source.shape_[1],
-      score_index, N);
+    CompactDataKernel<true, check_score>
+        <<<blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(indices.dptr_,
+                                                              source.dptr_,
+                                                              destination->dptr_,
+                                                              topk,
+                                                              source.shape_[2],
+                                                              source.shape_[1],
+                                                              score_index,
+                                                              N);
   } else {
-    CompactDataKernel<false, check_score><<<blocks, n_threads, 0,
-                                             Stream<gpu>::GetStream(s)>>>(
-      indices.dptr_, source.dptr_,
-      destination->dptr_, topk,
-      source.shape_[2], source.shape_[1],
-      score_index, N);
+    CompactDataKernel<false, check_score>
+        <<<blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(indices.dptr_,
+                                                              source.dptr_,
+                                                              destination->dptr_,
+                                                              topk,
+                                                              source.shape_[2],
+                                                              source.shape_[1],
+                                                              score_index,
+                                                              N);
   }
 }
 
@@ -176,48 +190,49 @@ void WorkspaceForSort(const index_t num_elem,
                       const int alignment,
                       TempWorkspace<DType>* workspace) {
   const size_t sort_scores_temp_space =
-    mxnet::op::SortByKeyWorkspaceSize<DType, index_t, gpu>(num_elem, false, false);
+      mxnet::op::SortByKeyWorkspaceSize<DType, index_t, gpu>(num_elem, false, false);
   const size_t sort_topk_scores_temp_space =
-    mxnet::op::SortByKeyWorkspaceSize<DType, index_t, gpu>(topk, false, false);
-  workspace->scratch_space = align(std::max(sort_scores_temp_space, sort_topk_scores_temp_space),
-                                   alignment);
+      mxnet::op::SortByKeyWorkspaceSize<DType, index_t, gpu>(topk, false, false);
+  workspace->scratch_space =
+      align(std::max(sort_scores_temp_space, sort_topk_scores_temp_space), alignment);
 }
 
 template <int encode, typename DType>
-__global__ void CalculateGreedyNMSResultsKernel(const DType* data, uint32_t* result,
-                                                 const index_t current_start,
-                                                 const index_t num_elems,
-                                                 const index_t num_batches,
-                                                 const index_t num_blocks_per_row_batch,
-                                                 const index_t num_blocks_per_row,
-                                                 const index_t topk,
-                                                 const index_t element_width,
-                                                 const index_t num_elements_per_batch,
-                                                 const int coord_index,
-                                                 const int class_index,
-                                                 const int score_index,
-                                                 const float threshold);
+__global__ void CalculateGreedyNMSResultsKernel(const DType* data,
+                                                uint32_t* result,
+                                                const index_t current_start,
+                                                const index_t num_elems,
+                                                const index_t num_batches,
+                                                const index_t num_blocks_per_row_batch,
+                                                const index_t num_blocks_per_row,
+                                                const index_t topk,
+                                                const index_t element_width,
+                                                const index_t num_elements_per_batch,
+                                                const int coord_index,
+                                                const int class_index,
+                                                const int score_index,
+                                                const float threshold);
 
 template <typename DType>
 __global__ void ReduceNMSResultTriangleKernel(uint32_t* nms_results,
-                                               DType * data,
-                                               const index_t score_index,
-                                               const index_t element_width,
-                                               const index_t num_batches,
-                                               const index_t num_elems,
-                                               const index_t start_index,
-                                               const index_t topk);
+                                              DType* data,
+                                              const index_t score_index,
+                                              const index_t element_width,
+                                              const index_t num_batches,
+                                              const index_t num_elems,
+                                              const index_t start_index,
+                                              const index_t topk);
 
 template <typename DType>
 __global__ void ReduceNMSResultRestKernel(DType* data,
-                                           const uint32_t* nms_results,
-                                           const index_t score_index,
-                                           const index_t element_width,
-                                           const index_t num_batches,
-                                           const index_t num_elements_per_batch,
-                                           const index_t start_index,
-                                           const index_t topk,
-                                           const index_t num_blocks_per_batch);
+                                          const uint32_t* nms_results,
+                                          const index_t score_index,
+                                          const index_t element_width,
+                                          const index_t num_batches,
+                                          const index_t num_elements_per_batch,
+                                          const index_t start_index,
+                                          const index_t topk,
+                                          const index_t num_blocks_per_batch);
 
 template <typename DType>
 struct NMS {
@@ -228,43 +243,72 @@ struct NMS {
                   const index_t topk,
                   const BoxNMSParam& param,
                   Stream<gpu>* s) {
-    const int n_threads = 512;
-    const index_t num_batches = data->shape_[0];
+    const int n_threads                  = 512;
+    const index_t num_batches            = data->shape_[0];
     const index_t num_elements_per_batch = data->shape_[1];
-    const index_t element_width = data->shape_[2];
+    const index_t element_width          = data->shape_[2];
     for (index_t current_start = 0; current_start < topk; current_start += THRESHOLD) {
-      const index_t n_elems = topk - current_start;
+      const index_t n_elems                  = topk - current_start;
       const index_t num_blocks_per_row_batch = ceil_div(n_elems, n_threads);
-      const index_t num_blocks_per_row =  num_blocks_per_row_batch * num_batches;
+      const index_t num_blocks_per_row       = num_blocks_per_row_batch * num_batches;
       const index_t n_blocks = THRESHOLD / (sizeof(uint32_t) * 8) * num_blocks_per_row;
       if (param.in_format == box_common_enum::kCorner) {
         CalculateGreedyNMSResultsKernel<box_common_enum::kCorner>
-          <<<n_blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
-            data->dptr_, scratch->dptr_, current_start, n_elems, num_batches,
-            num_blocks_per_row_batch, num_blocks_per_row, topk, element_width,
-            num_elements_per_batch, param.coord_start,
-            param.force_suppress ? -1 : param.id_index,
-            param.score_index, param.overlap_thresh);
+            <<<n_blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
+                data->dptr_,
+                scratch->dptr_,
+                current_start,
+                n_elems,
+                num_batches,
+                num_blocks_per_row_batch,
+                num_blocks_per_row,
+                topk,
+                element_width,
+                num_elements_per_batch,
+                param.coord_start,
+                param.force_suppress ? -1 : param.id_index,
+                param.score_index,
+                param.overlap_thresh);
       } else {
         CalculateGreedyNMSResultsKernel<box_common_enum::kCenter>
-          <<<n_blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
-            data->dptr_, scratch->dptr_, current_start, n_elems, num_batches,
-            num_blocks_per_row_batch, num_blocks_per_row, topk, element_width,
-            num_elements_per_batch, param.coord_start,
-            param.force_suppress ? -1 : param.id_index,
-            param.score_index, param.overlap_thresh);
+            <<<n_blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
+                data->dptr_,
+                scratch->dptr_,
+                current_start,
+                n_elems,
+                num_batches,
+                num_blocks_per_row_batch,
+                num_blocks_per_row,
+                topk,
+                element_width,
+                num_elements_per_batch,
+                param.coord_start,
+                param.force_suppress ? -1 : param.id_index,
+                param.score_index,
+                param.overlap_thresh);
       }
       ReduceNMSResultTriangleKernel<<<num_batches, THRESHOLD, 0, Stream<gpu>::GetStream(s)>>>(
-          scratch->dptr_, data->dptr_, param.score_index,
-          element_width, num_batches, num_elements_per_batch,
-          current_start, topk);
-      const index_t n_rest_elems = n_elems - THRESHOLD;
+          scratch->dptr_,
+          data->dptr_,
+          param.score_index,
+          element_width,
+          num_batches,
+          num_elements_per_batch,
+          current_start,
+          topk);
+      const index_t n_rest_elems              = n_elems - THRESHOLD;
       const index_t num_rest_blocks_per_batch = ceil_div(n_rest_elems, n_threads);
-      const index_t num_rest_blocks = num_rest_blocks_per_batch * num_batches;
+      const index_t num_rest_blocks           = num_rest_blocks_per_batch * num_batches;
       if (n_rest_elems > 0) {
         ReduceNMSResultRestKernel<<<num_rest_blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
-            data->dptr_, scratch->dptr_, param.score_index, element_width,
-            num_batches, num_elements_per_batch, current_start, topk,
+            data->dptr_,
+            scratch->dptr_,
+            param.score_index,
+            element_width,
+            num_batches,
+            num_elements_per_batch,
+            current_start,
+            topk,
             num_rest_blocks_per_batch);
       }
     }
@@ -272,47 +316,52 @@ struct NMS {
 };
 
 template <int encode, typename DType>
-__device__ __forceinline__ DType calculate_area(const DType b0, const DType b1,
-                                                const DType b2, const DType b3) {
-  DType width = b2;
+__device__ __forceinline__ DType
+calculate_area(const DType b0, const DType b1, const DType b2, const DType b3) {
+  DType width  = b2;
   DType height = b3;
   if (encode == box_common_enum::kCorner) {
     width -= b0;
     height -= b1;
   }
-  if (width < 0 || height < 0) return 0;
+  if (width < 0 || height < 0)
+    return 0;
   return width * height;
 }
 
 template <int encode, typename DType>
-__device__ __forceinline__ DType calculate_intersection(const DType a0, const DType a1,
-                                                        const DType a2, const DType a3,
-                                                        const DType b0, const DType b1,
-                                                        const DType b2, const DType b3) {
+__device__ __forceinline__ DType calculate_intersection(const DType a0,
+                                                        const DType a1,
+                                                        const DType a2,
+                                                        const DType a3,
+                                                        const DType b0,
+                                                        const DType b1,
+                                                        const DType b2,
+                                                        const DType b3) {
   DType wx, wy;
   if (encode == box_common_enum::kCorner) {
-    const DType left = a0 > b0 ? a0 : b0;
+    const DType left   = a0 > b0 ? a0 : b0;
     const DType bottom = a1 > b1 ? a1 : b1;
-    const DType right = a2 < b2 ? a2 : b2;
-    const DType top = a3 < b3 ? a3 : b3;
-    wx = right - left;
-    wy = top - bottom;
+    const DType right  = a2 < b2 ? a2 : b2;
+    const DType top    = a3 < b3 ? a3 : b3;
+    wx                 = right - left;
+    wy                 = top - bottom;
   } else {
-    const DType al = 2 * a0 - a2;
-    const DType ar = 2 * a0 + a2;
-    const DType bl = 2 * b0 - b2;
-    const DType br = 2 * b0 + b2;
-    const DType left = bl > al ? bl : al;
-    const DType right = br < ar ? br : ar;
-    wx = right - left;
-    const DType ab = 2 * a1 - a3;
-    const DType at = 2 * a1 + a3;
-    const DType bb = 2 * b1 - b3;
-    const DType bt = 2 * b1 + b3;
+    const DType al     = 2 * a0 - a2;
+    const DType ar     = 2 * a0 + a2;
+    const DType bl     = 2 * b0 - b2;
+    const DType br     = 2 * b0 + b2;
+    const DType left   = bl > al ? bl : al;
+    const DType right  = br < ar ? br : ar;
+    wx                 = right - left;
+    const DType ab     = 2 * a1 - a3;
+    const DType at     = 2 * a1 + a3;
+    const DType bb     = 2 * b1 - b3;
+    const DType bt     = 2 * b1 + b3;
     const DType bottom = bb > ab ? bb : ab;
-    const DType top = bt < at ? bt : at;
-    wy = top - bottom;
-    wy = wy / 4;  // To compensate for both wx and wy being 2x too large
+    const DType top    = bt < at ? bt : at;
+    wy                 = top - bottom;
+    wy                 = wy / 4;  // To compensate for both wx and wy being 2x too large
   }
   if (wx <= 0 || wy <= 0) {
     return 0;
@@ -322,35 +371,36 @@ __device__ __forceinline__ DType calculate_intersection(const DType a0, const DT
 }
 
 template <int encode, typename DType>
-__launch_bounds__(512)
-__global__ void CalculateGreedyNMSResultsKernel(const DType* data, uint32_t* result,
-                                                 const index_t current_start,
-                                                 const index_t num_elems,
-                                                 const index_t num_batches,
-                                                 const index_t num_blocks_per_row_batch,
-                                                 const index_t num_blocks_per_row,
-                                                 const index_t topk,
-                                                 const index_t element_width,
-                                                 const index_t num_elements_per_batch,
-                                                 const int coord_index,
-                                                 const int class_index,
-                                                 const int score_index,
-                                                 const float threshold) {
-  constexpr int max_elem_width = 20;
+__launch_bounds__(512) __global__
+    void CalculateGreedyNMSResultsKernel(const DType* data,
+                                         uint32_t* result,
+                                         const index_t current_start,
+                                         const index_t num_elems,
+                                         const index_t num_batches,
+                                         const index_t num_blocks_per_row_batch,
+                                         const index_t num_blocks_per_row,
+                                         const index_t topk,
+                                         const index_t element_width,
+                                         const index_t num_elements_per_batch,
+                                         const int coord_index,
+                                         const int class_index,
+                                         const int score_index,
+                                         const float threshold) {
+  constexpr int max_elem_width  = 20;
   constexpr int num_other_boxes = sizeof(uint32_t) * 8;
   __shared__ DType other_boxes[max_elem_width * num_other_boxes];
   __shared__ DType other_boxes_areas[num_other_boxes];
-  const index_t my_row = blockIdx.x / num_blocks_per_row;
-  const index_t my_block_offset_in_row = blockIdx.x % num_blocks_per_row;
+  const index_t my_row                   = blockIdx.x / num_blocks_per_row;
+  const index_t my_block_offset_in_row   = blockIdx.x % num_blocks_per_row;
   const index_t my_block_offset_in_batch = my_block_offset_in_row % num_blocks_per_row_batch;
-  const index_t my_batch = (my_block_offset_in_row) / num_blocks_per_row_batch;
-  const index_t my_element_in_batch = my_block_offset_in_batch * blockDim.x +
-                                      current_start + threadIdx.x;
+  const index_t my_batch                 = (my_block_offset_in_row) / num_blocks_per_row_batch;
+  const index_t my_element_in_batch =
+      my_block_offset_in_batch * blockDim.x + current_start + threadIdx.x;
 
   // Load other boxes
-  const index_t offset = (my_batch * num_elements_per_batch +
-                         current_start + my_row * num_other_boxes) *
-                         element_width;
+  const index_t offset =
+      (my_batch * num_elements_per_batch + current_start + my_row * num_other_boxes) *
+      element_width;
   for (int i = threadIdx.x; i < element_width * num_other_boxes; i += blockDim.x) {
     other_boxes[i] = data[offset + i];
   }
@@ -358,22 +408,23 @@ __global__ void CalculateGreedyNMSResultsKernel(const DType* data, uint32_t* res
 
   if (threadIdx.x < num_other_boxes) {
     const int other_boxes_offset = element_width * threadIdx.x;
-    const DType their_area = calculate_area<encode>(
-        other_boxes[other_boxes_offset + coord_index + 0],
-        other_boxes[other_boxes_offset + coord_index + 1],
-        other_boxes[other_boxes_offset + coord_index + 2],
-        other_boxes[other_boxes_offset + coord_index + 3]);
+    const DType their_area =
+        calculate_area<encode>(other_boxes[other_boxes_offset + coord_index + 0],
+                               other_boxes[other_boxes_offset + coord_index + 1],
+                               other_boxes[other_boxes_offset + coord_index + 2],
+                               other_boxes[other_boxes_offset + coord_index + 3]);
     other_boxes_areas[threadIdx.x] = their_area;
   }
   __syncthreads();
 
-  if (my_element_in_batch >= topk) return;
+  if (my_element_in_batch >= topk)
+    return;
 
   DType my_box[4];
   DType my_class = -1;
   DType my_score = -1;
-  const index_t my_offset = (my_batch * num_elements_per_batch + my_element_in_batch) *
-                            element_width;
+  const index_t my_offset =
+      (my_batch * num_elements_per_batch + my_element_in_batch) * element_width;
   my_score = data[my_offset + score_index];
 #pragma unroll
   for (int i = 0; i < 4; ++i) {
@@ -393,12 +444,15 @@ __global__ void CalculateGreedyNMSResultsKernel(const DType* data, uint32_t* res
           other_boxes[other_boxes_offset + score_index] != -1) {
         const DType their_area = other_boxes_areas[i];
 
-        const DType intersect = calculate_intersection<encode>(
-            my_box[0], my_box[1], my_box[2], my_box[3],
-            other_boxes[other_boxes_offset + coord_index + 0],
-            other_boxes[other_boxes_offset + coord_index + 1],
-            other_boxes[other_boxes_offset + coord_index + 2],
-            other_boxes[other_boxes_offset + coord_index + 3]);
+        const DType intersect =
+            calculate_intersection<encode>(my_box[0],
+                                           my_box[1],
+                                           my_box[2],
+                                           my_box[3],
+                                           other_boxes[other_boxes_offset + coord_index + 0],
+                                           other_boxes[other_boxes_offset + coord_index + 1],
+                                           other_boxes[other_boxes_offset + coord_index + 2],
+                                           other_boxes[other_boxes_offset + coord_index + 3]);
         if (intersect > threshold * (my_area + their_area - intersect)) {
           ret = ret | (1u << i);
         }
@@ -409,48 +463,45 @@ __global__ void CalculateGreedyNMSResultsKernel(const DType* data, uint32_t* res
 }
 
 template <typename DType>
-__launch_bounds__(NMS<DType>::THRESHOLD)
-__global__ void ReduceNMSResultTriangleKernel(uint32_t* nms_results,
-                                               DType * data,
-                                               const index_t score_index,
-                                               const index_t element_width,
-                                               const index_t num_batches,
-                                               const index_t num_elements_per_batch,
-                                               const index_t start_index,
-                                               const index_t topk) {
-  constexpr int n_threads = NMS<DType>::THRESHOLD;
-  constexpr int warp_size = 32;
-  const index_t my_batch = blockIdx.x;
+__launch_bounds__(NMS<DType>::THRESHOLD) __global__
+    void ReduceNMSResultTriangleKernel(uint32_t* nms_results,
+                                       DType* data,
+                                       const index_t score_index,
+                                       const index_t element_width,
+                                       const index_t num_batches,
+                                       const index_t num_elements_per_batch,
+                                       const index_t start_index,
+                                       const index_t topk) {
+  constexpr int n_threads           = NMS<DType>::THRESHOLD;
+  constexpr int warp_size           = 32;
+  const index_t my_batch            = blockIdx.x;
   const index_t my_element_in_batch = threadIdx.x + start_index;
-  const index_t my_element = my_batch * topk + my_element_in_batch;
-  const int my_warp = threadIdx.x / warp_size;
-  const int my_lane = threadIdx.x % warp_size;
+  const index_t my_element          = my_batch * topk + my_element_in_batch;
+  const int my_warp                 = threadIdx.x / warp_size;
+  const int my_lane                 = threadIdx.x % warp_size;
 
   __shared__ uint32_t current_valid_boxes[n_threads / warp_size];
-  const uint32_t full_mask = 0xFFFFFFFF;
-  const uint32_t my_lane_mask = 1 << my_lane;
+  const uint32_t full_mask            = 0xFFFFFFFF;
+  const uint32_t my_lane_mask         = 1 << my_lane;
   const uint32_t earlier_threads_mask = (1 << (my_lane + 1)) - 1;
-  uint32_t valid = my_lane_mask;
-  uint32_t valid_boxes = full_mask;
+  uint32_t valid                      = my_lane_mask;
+  uint32_t valid_boxes                = full_mask;
 
-  uint32_t my_next_mask = my_element_in_batch < topk ?
-    nms_results[my_element]:
-    full_mask;
+  uint32_t my_next_mask = my_element_in_batch < topk ? nms_results[my_element] : full_mask;
 #pragma unroll
   for (int i = 0; i < n_threads / warp_size; ++i) {
     uint32_t my_mask = my_next_mask;
-    my_next_mask = (((i + 1) < n_threads / warp_size) &&
-                    (my_element_in_batch < topk)) ?
-      nms_results[(i + 1) * topk * num_batches + my_element]:
-      full_mask;
+    my_next_mask     = (((i + 1) < n_threads / warp_size) && (my_element_in_batch < topk))
+                           ? nms_results[(i + 1) * topk * num_batches + my_element]
+                           : full_mask;
     if (my_warp == i && !__all_sync(full_mask, my_mask == full_mask)) {
       my_mask = my_mask | earlier_threads_mask;
       // Loop over warp_size - 1 because the last
       // thread does not contribute to the mask anyway
 #pragma unroll
       for (int j = 0; j < warp_size - 1; ++j) {
-          const uint32_t mask = __shfl_sync(full_mask, valid ? my_mask : full_mask, j);
-          valid = valid & mask;
+        const uint32_t mask = __shfl_sync(full_mask, valid ? my_mask : full_mask, j);
+        valid               = valid & mask;
       }
       valid_boxes = __ballot_sync(full_mask, valid);
     }
@@ -466,47 +517,48 @@ __global__ void ReduceNMSResultTriangleKernel(uint32_t* nms_results,
     nms_results[my_element] = valid_boxes;
   }
   if (valid == 0) {
-    data[(my_batch * num_elements_per_batch + my_element_in_batch) * element_width +
-         score_index] = -1;
+    data[(my_batch * num_elements_per_batch + my_element_in_batch) * element_width + score_index] =
+        -1;
   }
 }
 
 template <typename DType>
-__launch_bounds__(512)
-__global__ void ReduceNMSResultRestKernel(DType* data,
-                                           const uint32_t* nms_results,
-                                           const index_t score_index,
-                                           const index_t element_width,
-                                           const index_t num_batches,
-                                           const index_t num_elements_per_batch,
-                                           const index_t start_index,
-                                           const index_t topk,
-                                           const index_t num_blocks_per_batch) {
-  constexpr int num_other_boxes = sizeof(uint32_t) * 8;
-  constexpr int num_iterations = NMS<DType>::THRESHOLD / num_other_boxes;
-  constexpr int warp_size = 32;
+__launch_bounds__(512) __global__
+    void ReduceNMSResultRestKernel(DType* data,
+                                   const uint32_t* nms_results,
+                                   const index_t score_index,
+                                   const index_t element_width,
+                                   const index_t num_batches,
+                                   const index_t num_elements_per_batch,
+                                   const index_t start_index,
+                                   const index_t topk,
+                                   const index_t num_blocks_per_batch) {
+  constexpr int num_other_boxes          = sizeof(uint32_t) * 8;
+  constexpr int num_iterations           = NMS<DType>::THRESHOLD / num_other_boxes;
+  constexpr int warp_size                = 32;
   const index_t my_block_offset_in_batch = blockIdx.x % num_blocks_per_batch;
-  const index_t my_batch = blockIdx.x / num_blocks_per_batch;
-  const index_t my_element_in_batch = my_block_offset_in_batch * blockDim.x +
-                                      start_index + NMS<DType>::THRESHOLD + threadIdx.x;
+  const index_t my_batch                 = blockIdx.x / num_blocks_per_batch;
+  const index_t my_element_in_batch =
+      my_block_offset_in_batch * blockDim.x + start_index + NMS<DType>::THRESHOLD + threadIdx.x;
   const index_t my_element = my_batch * topk + my_element_in_batch;
 
-  if (my_element_in_batch >= topk) return;
+  if (my_element_in_batch >= topk)
+    return;
 
   bool valid = true;
 
 #pragma unroll
   for (int i = 0; i < num_iterations; ++i) {
-    const uint32_t my_mask = nms_results[i * topk * num_batches + my_element];
+    const uint32_t my_mask     = nms_results[i * topk * num_batches + my_element];
     const uint32_t valid_boxes = nms_results[my_batch * topk + i * warp_size + start_index];
 
     const bool no_hit = (valid_boxes & (~my_mask)) == 0;
-    valid = valid && no_hit;
+    valid             = valid && no_hit;
   }
 
   if (!valid) {
-    data[(my_batch * num_elements_per_batch + my_element_in_batch) * element_width +
-          score_index] = -1;
+    data[(my_batch * num_elements_per_batch + my_element_in_batch) * element_width + score_index] =
+        -1;
   }
 }
 
@@ -517,47 +569,45 @@ TempWorkspace<DType> GetWorkspace(const index_t num_batch,
                                   const index_t topk,
                                   const OpContext& ctx) {
   TempWorkspace<DType> workspace;
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s      = ctx.get_stream<gpu>();
   const int alignment = 128;
 
   // Get the workspace size
-  workspace.scores_temp_space = 2 * align(num_batch * num_elem * sizeof(DType), alignment);
+  workspace.scores_temp_space   = 2 * align(num_batch * num_elem * sizeof(DType), alignment);
   workspace.indices_temp_spaces = 2 * align(num_batch * num_elem * sizeof(index_t), alignment);
   WorkspaceForSort(num_elem, topk, alignment, &workspace);
   // Place for a buffer
   workspace.buffer_space = align(num_batch * num_elem * width_elem * sizeof(DType), alignment);
-  workspace.nms_scratch_space = align(NMS<DType>::THRESHOLD / (sizeof(uint32_t) * 8) *
-                                      num_batch * topk * sizeof(uint32_t), alignment);
+  workspace.nms_scratch_space =
+      align(NMS<DType>::THRESHOLD / (sizeof(uint32_t) * 8) * num_batch * topk * sizeof(uint32_t),
+            alignment);
 
-  const size_t workspace_size = workspace.scores_temp_space +
-                                workspace.scratch_space +
-                                workspace.buffer_space +
-                                workspace.nms_scratch_space +
+  const size_t workspace_size = workspace.scores_temp_space + workspace.scratch_space +
+                                workspace.buffer_space + workspace.nms_scratch_space +
                                 workspace.indices_temp_spaces;
 
   // Obtain the memory for workspace
-  Tensor<gpu, 1, double> scratch_memory = ctx.requested[box_nms_enum::kTempSpace]
-    .get_space_typed<gpu, 1, double>(mshadow::Shape1(ceil_div(workspace_size, sizeof(double))), s);
+  Tensor<gpu, 1, double> scratch_memory =
+      ctx.requested[box_nms_enum::kTempSpace].get_space_typed<gpu, 1, double>(
+          mshadow::Shape1(ceil_div(workspace_size, sizeof(double))), s);
 
   // Populate workspace pointers
-  workspace.scores = reinterpret_cast<DType*>(scratch_memory.dptr_);
-  workspace.scratch = reinterpret_cast<uint8_t*>(workspace.scores) +
-                                                 workspace.scores_temp_space;
-  workspace.buffer = reinterpret_cast<DType*>(workspace.scratch +
-                                              workspace.scratch_space);
-  workspace.nms_scratch = reinterpret_cast<uint32_t*>(
-                            reinterpret_cast<uint8_t*>(workspace.buffer) +
-                            workspace.buffer_space);
-  workspace.indices = reinterpret_cast<index_t*>(
-                            reinterpret_cast<uint8_t*>(workspace.nms_scratch) +
-                            workspace.nms_scratch_space);
+  workspace.scores  = reinterpret_cast<DType*>(scratch_memory.dptr_);
+  workspace.scratch = reinterpret_cast<uint8_t*>(workspace.scores) + workspace.scores_temp_space;
+  workspace.buffer  = reinterpret_cast<DType*>(workspace.scratch + workspace.scratch_space);
+  workspace.nms_scratch = reinterpret_cast<uint32_t*>(reinterpret_cast<uint8_t*>(workspace.buffer) +
+                                                      workspace.buffer_space);
+  workspace.indices = reinterpret_cast<index_t*>(reinterpret_cast<uint8_t*>(workspace.nms_scratch) +
+                                                 workspace.nms_scratch_space);
   return workspace;
 }
 
 template <typename DType>
-__global__ void ExtractScoresKernel(const DType* data, DType* scores,
-                                     const index_t N, const int element_width,
-                                     const int score_index) {
+__global__ void ExtractScoresKernel(const DType* data,
+                                    DType* scores,
+                                    const index_t N,
+                                    const int element_width,
+                                    const int score_index) {
   const index_t tid = blockIdx.x * blockDim.x + threadIdx.x;
   if (tid < N) {
     scores[tid] = data[tid * element_width + score_index];
@@ -576,31 +626,31 @@ void CompactNMSResults(const Tensor<gpu, 3, DType>& data,
                        const index_t topk,
                        Stream<gpu>* s) {
   using mshadow::Shape1;
-  constexpr int n_threads = 512;
-  const index_t num_elements = scores->shape_.Size();
+  constexpr int n_threads              = 512;
+  const index_t num_elements           = scores->shape_.Size();
   const index_t num_elements_per_batch = data.shape_[1];
-  const index_t num_batches = data.shape_[0];
-  const int element_width = data.shape_[2];
-  const index_t n_blocks = ceil_div(num_elements, n_threads);
+  const index_t num_batches            = data.shape_[0];
+  const int element_width              = data.shape_[2];
+  const index_t n_blocks               = ceil_div(num_elements, n_threads);
   ExtractScoresKernel<<<n_blocks, n_threads, 0, Stream<gpu>::GetStream(s)>>>(
       data.dptr_, scores->dptr_, num_elements, element_width, score_index);
   *indices = mshadow::expr::range<index_t>(0, num_elements);
   for (index_t i = 0; i < num_batches; ++i) {
     // Sort each batch separately
-    Tensor<gpu, 1, DType> scores_batch(scores->dptr_ + i * num_elements_per_batch,
-                                       Shape1(topk),
-                                       s);
-    Tensor<gpu, 1, index_t> indices_batch(indices->dptr_ + i * num_elements_per_batch,
-                                          Shape1(topk),
-                                          s);
-    Tensor<gpu, 1, DType> sorted_scores_batch(sorted_scores->dptr_ + i * num_elements_per_batch,
-                                              Shape1(topk),
-                                              s);
-    Tensor<gpu, 1, index_t> sorted_indices_batch(sorted_indices->dptr_ + i * num_elements_per_batch,
-                                                 Shape1(topk),
-                                                 s);
-    mxnet::op::SortByKey(scores_batch, indices_batch, false, scratch,
-                         0, 8 * sizeof(DType), &sorted_scores_batch,
+    Tensor<gpu, 1, DType> scores_batch(scores->dptr_ + i * num_elements_per_batch, Shape1(topk), s);
+    Tensor<gpu, 1, index_t> indices_batch(
+        indices->dptr_ + i * num_elements_per_batch, Shape1(topk), s);
+    Tensor<gpu, 1, DType> sorted_scores_batch(
+        sorted_scores->dptr_ + i * num_elements_per_batch, Shape1(topk), s);
+    Tensor<gpu, 1, index_t> sorted_indices_batch(
+        sorted_indices->dptr_ + i * num_elements_per_batch, Shape1(topk), s);
+    mxnet::op::SortByKey(scores_batch,
+                         indices_batch,
+                         false,
+                         scratch,
+                         0,
+                         8 * sizeof(DType),
+                         &sorted_scores_batch,
                          &sorted_indices_batch);
   }
   CompactData<true>(*sorted_indices, data, out, topk, score_index, s);
@@ -621,80 +671,84 @@ void BoxNMSForwardGPU_notemp(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U) << "BoxNMS output: [output, temp]";
   const BoxNMSParam& param = nnvm::get<BoxNMSParam>(attrs.parsed);
-  Stream<gpu> *s = ctx.get_stream<gpu>();
-  mxnet::TShape in_shape = inputs[box_nms_enum::kData].shape_;
-  int indim = in_shape.ndim();
-  int num_batch = indim <= 2? 1 : in_shape.ProdShape(0, indim - 2);
-  int num_elem = in_shape[indim - 2];
-  int width_elem = in_shape[indim - 1];
+  Stream<gpu>* s           = ctx.get_stream<gpu>();
+  mxnet::TShape in_shape   = inputs[box_nms_enum::kData].shape_;
+  int indim                = in_shape.ndim();
+  int num_batch            = indim <= 2 ? 1 : in_shape.ProdShape(0, indim - 2);
+  int num_elem             = in_shape[indim - 2];
+  int width_elem           = in_shape[indim - 1];
 
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Tensor<gpu, 3, DType> data = inputs[box_nms_enum::kData]
-     .get_with_shape<gpu, 3, DType>(Shape3(num_batch, num_elem, width_elem), s);
-    Tensor<gpu, 3, DType> out = outputs[box_nms_enum::kOut]
-     .get_with_shape<gpu, 3, DType>(Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<gpu, 3, DType> data = inputs[box_nms_enum::kData].get_with_shape<gpu, 3, DType>(
+        Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<gpu, 3, DType> out = outputs[box_nms_enum::kOut].get_with_shape<gpu, 3, DType>(
+        Shape3(num_batch, num_elem, width_elem), s);
 
     // Special case for topk == 0
     if (param.topk == 0) {
-      if (req[0] != kNullOp &&
-          req[0] != kWriteInplace) {
+      if (req[0] != kNullOp && req[0] != kWriteInplace) {
         out = mshadow::expr::F<mshadow_op::identity>(data);
       }
       return;
     }
 
-    index_t topk = param.topk > 0 ? std::min(param.topk, num_elem) : num_elem;
-    const auto& workspace = GetWorkspace<DType>(num_batch, num_elem,
-                                                width_elem, topk, ctx);
+    index_t topk          = param.topk > 0 ? std::min(param.topk, num_elem) : num_elem;
+    const auto& workspace = GetWorkspace<DType>(num_batch, num_elem, width_elem, topk, ctx);
 
     FilterAndPrepareAuxData(data, &out, workspace, param, s);
     Tensor<gpu, 1, DType> scores(workspace.scores, Shape1(num_batch * num_elem), s);
-    Tensor<gpu, 1, DType> sorted_scores(workspace.scores + scores.MSize(),
-                                        Shape1(num_batch * num_elem), s);
+    Tensor<gpu, 1, DType> sorted_scores(
+        workspace.scores + scores.MSize(), Shape1(num_batch * num_elem), s);
     Tensor<gpu, 1, index_t> indices(workspace.indices, Shape1(num_batch * num_elem), s);
-    Tensor<gpu, 1, index_t> sorted_indices(workspace.indices + indices.MSize(),
-                                           Shape1(num_batch * num_elem), s);
-    Tensor<gpu, 1, char> scratch(reinterpret_cast<char*>(workspace.scratch),
-                                        Shape1(workspace.scratch_space), s);
-    Tensor<gpu, 3, DType> buffer(workspace.buffer,
-                                 Shape3(num_batch, num_elem, width_elem), s);
-    Tensor<gpu, 2, uint32_t> nms_scratch(workspace.nms_scratch,
-                                         Shape2(NMS<DType>::THRESHOLD / (sizeof(uint32_t) * 8),
-                                                topk * num_batch),
-                                         s);
+    Tensor<gpu, 1, index_t> sorted_indices(
+        workspace.indices + indices.MSize(), Shape1(num_batch * num_elem), s);
+    Tensor<gpu, 1, char> scratch(
+        reinterpret_cast<char*>(workspace.scratch), Shape1(workspace.scratch_space), s);
+    Tensor<gpu, 3, DType> buffer(workspace.buffer, Shape3(num_batch, num_elem, width_elem), s);
+    Tensor<gpu, 2, uint32_t> nms_scratch(
+        workspace.nms_scratch,
+        Shape2(NMS<DType>::THRESHOLD / (sizeof(uint32_t) * 8), topk * num_batch),
+        s);
     indices = mshadow::expr::range<index_t>(0, num_batch * num_elem);
     for (index_t i = 0; i < num_batch; ++i) {
       // Sort each batch separately
-      Tensor<gpu, 1, DType> scores_batch(scores.dptr_ + i * num_elem,
-                                         Shape1(num_elem),
-                                         s);
-      Tensor<gpu, 1, index_t> indices_batch(indices.dptr_ + i * num_elem,
-                                            Shape1(num_elem),
-                                            s);
-      Tensor<gpu, 1, DType> sorted_scores_batch(sorted_scores.dptr_ + i * num_elem,
-                                                Shape1(num_elem),
-                                                s);
-      Tensor<gpu, 1, index_t> sorted_indices_batch(sorted_indices.dptr_ + i * num_elem,
-                                                   Shape1(num_elem),
-                                                   s);
-      mxnet::op::SortByKey(scores_batch, indices_batch, false, &scratch, 0,
-                           8 * sizeof(DType), &sorted_scores_batch,
+      Tensor<gpu, 1, DType> scores_batch(scores.dptr_ + i * num_elem, Shape1(num_elem), s);
+      Tensor<gpu, 1, index_t> indices_batch(indices.dptr_ + i * num_elem, Shape1(num_elem), s);
+      Tensor<gpu, 1, DType> sorted_scores_batch(
+          sorted_scores.dptr_ + i * num_elem, Shape1(num_elem), s);
+      Tensor<gpu, 1, index_t> sorted_indices_batch(
+          sorted_indices.dptr_ + i * num_elem, Shape1(num_elem), s);
+      mxnet::op::SortByKey(scores_batch,
+                           indices_batch,
+                           false,
+                           &scratch,
+                           0,
+                           8 * sizeof(DType),
+                           &sorted_scores_batch,
                            &sorted_indices_batch);
     }
     CompactData<false>(sorted_indices, out, &buffer, topk, -1, s);
     NMS<DType> nms;
     nms(&buffer, &nms_scratch, topk, param, s);
-    CompactNMSResults(buffer, &out, &indices, &scores, &sorted_indices,
-                      &sorted_scores, &scratch, param.score_index, topk, s);
+    CompactNMSResults(buffer,
+                      &out,
+                      &indices,
+                      &scores,
+                      &sorted_indices,
+                      &sorted_scores,
+                      &scratch,
+                      param.score_index,
+                      topk,
+                      s);
 
     // convert encoding
     if (param.in_format != param.out_format) {
       if (box_common_enum::kCenter == param.out_format) {
-        mxnet::op::mxnet_op::Kernel<corner_to_center, gpu>::Launch(s, num_batch * num_elem,
-          out.dptr_ + param.coord_start, width_elem);
+        mxnet::op::mxnet_op::Kernel<corner_to_center, gpu>::Launch(
+            s, num_batch * num_elem, out.dptr_ + param.coord_start, width_elem);
       } else {
-        mxnet::op::mxnet_op::Kernel<center_to_corner, gpu>::Launch(s, num_batch * num_elem,
-          out.dptr_ + param.coord_start, width_elem);
+        mxnet::op::mxnet_op::Kernel<center_to_corner, gpu>::Launch(
+            s, num_batch * num_elem, out.dptr_ + param.coord_start, width_elem);
       }
     }
   });
@@ -717,30 +771,25 @@ void BoxNMSForwardGPU(const nnvm::NodeAttrs& attrs,
   BoxNMSForward<gpu>(attrs, ctx, inputs, req, outputs);
 }
 
-
-NNVM_REGISTER_OP(_contrib_box_nms)
-.set_attr<FCompute>("FCompute<gpu>", BoxNMSForwardGPU);
+NNVM_REGISTER_OP(_contrib_box_nms).set_attr<FCompute>("FCompute<gpu>", BoxNMSForwardGPU);
 
 NNVM_REGISTER_OP(_backward_contrib_box_nms)
-.set_attr<FCompute>("FCompute<gpu>", BoxNMSBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BoxNMSBackward<gpu>);
 
-NNVM_REGISTER_OP(_contrib_box_iou)
-.set_attr<FCompute>("FCompute<gpu>", BoxOverlapForward<gpu>);
+NNVM_REGISTER_OP(_contrib_box_iou).set_attr<FCompute>("FCompute<gpu>", BoxOverlapForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_contrib_box_iou)
-.set_attr<FCompute>("FCompute<gpu>", BoxOverlapBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BoxOverlapBackward<gpu>);
 
 NNVM_REGISTER_OP(_contrib_bipartite_matching)
-.set_attr<FCompute>("FCompute<gpu>", BipartiteMatchingForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BipartiteMatchingForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_contrib_bipartite_matching)
-.set_attr<FCompute>("FCompute<gpu>", BipartiteMatchingBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BipartiteMatchingBackward<gpu>);
 
-NNVM_REGISTER_OP(_contrib_box_encode)
-.set_attr<FCompute>("FCompute<gpu>", BoxEncodeForward<gpu>);
+NNVM_REGISTER_OP(_contrib_box_encode).set_attr<FCompute>("FCompute<gpu>", BoxEncodeForward<gpu>);
 
-NNVM_REGISTER_OP(_contrib_box_decode)
-.set_attr<FCompute>("FCompute<gpu>", BoxDecodeForward<gpu>);
+NNVM_REGISTER_OP(_contrib_box_decode).set_attr<FCompute>("FCompute<gpu>", BoxDecodeForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/count_sketch-inl.h b/src/operator/contrib/count_sketch-inl.h
index f67856a398a4..4053d83a5471 100644
--- a/src/operator/contrib/count_sketch-inl.h
+++ b/src/operator/contrib/count_sketch-inl.h
@@ -22,7 +22,7 @@
  * \file count_sketch-inl.h
  * \brief count_sketch operator and symbol
  * \author Chen Zhu
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_COUNT_SKETCH_INL_H_
 #define MXNET_OPERATOR_CONTRIB_COUNT_SKETCH_INL_H_
 #include <dmlc/logging.h>
@@ -39,98 +39,110 @@ namespace op {
 //  Declare enumeration of input order to make code more intuitive.
 //  These enums are only visible within this header
 namespace CountSketch {
-enum  CountSketchOpInputs{kData, kH, kS};
-enum  CountSketchOpOutputs{kOut};
+enum CountSketchOpInputs { kData, kH, kS };
+enum CountSketchOpOutputs { kOut };
 }  //  namespace CountSketch
 
 // seems that we can infer all the parameters from data shapes at the moment
 struct CountSketchParam : public dmlc::Parameter<CountSketchParam> {
-    int out_dim;
-    int processing_batch_size;
-    DMLC_DECLARE_PARAMETER(CountSketchParam) {
-        DMLC_DECLARE_FIELD(out_dim)
-        .describe("The output dimension.");
-        DMLC_DECLARE_FIELD(processing_batch_size).set_default(32)
+  int out_dim;
+  int processing_batch_size;
+  DMLC_DECLARE_PARAMETER(CountSketchParam) {
+    DMLC_DECLARE_FIELD(out_dim).describe("The output dimension.");
+    DMLC_DECLARE_FIELD(processing_batch_size)
+        .set_default(32)
         .describe("How many sketch vectors to process at one time.");
-    }
+  }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class CountSketchOp : public Operator {
  public:
-    explicit CountSketchOp(CountSketchParam param) {
-        this->param_ = param;
-    }
+  explicit CountSketchOp(CountSketchParam param) {
+    this->param_ = param;
+  }
 
-    virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
-        using namespace mshadow;
-        CHECK_EQ(in_data.size(), 3);
-        CHECK_EQ(out_data.size(), 1);
-        Stream<xpu> *s = ctx.get_stream<xpu>();
-
-        // use FlatTo2D to preseve the possible 4D shape
-        // h and s should be 1d vectors
-        Tensor<xpu, 2, DType> data = in_data[CountSketch::kData].FlatTo2D<xpu, DType>(s);
-
-        const mxnet::TShape& hshape = in_data[CountSketch::kH].shape_;
-        const mxnet::TShape& sshape = in_data[CountSketch::kS].shape_;
-        Tensor<xpu, 1, DType> h = in_data[CountSketch::kH].get_with_shape<xpu, 1, DType>(
-            Shape1(hshape.ProdShape(0, hshape.ndim())), s);
-        Tensor<xpu, 1, DType> ss = in_data[CountSketch::kS].get_with_shape<xpu, 1, DType>(
-            Shape1(sshape.ProdShape(0, sshape.ndim())), s);
-        Tensor<xpu, 2, DType> out = out_data[CountSketch::kOut].FlatTo2D<xpu, DType>(s);
-        n_samples = data.shape_[0];
-        in_dim = data.shape_[1];
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
+    using namespace mshadow;
+    CHECK_EQ(in_data.size(), 3);
+    CHECK_EQ(out_data.size(), 1);
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+
+    // use FlatTo2D to preseve the possible 4D shape
+    // h and s should be 1d vectors
+    Tensor<xpu, 2, DType> data = in_data[CountSketch::kData].FlatTo2D<xpu, DType>(s);
+
+    const mxnet::TShape& hshape = in_data[CountSketch::kH].shape_;
+    const mxnet::TShape& sshape = in_data[CountSketch::kS].shape_;
+    Tensor<xpu, 1, DType> h     = in_data[CountSketch::kH].get_with_shape<xpu, 1, DType>(
+        Shape1(hshape.ProdShape(0, hshape.ndim())), s);
+    Tensor<xpu, 1, DType> ss = in_data[CountSketch::kS].get_with_shape<xpu, 1, DType>(
+        Shape1(sshape.ProdShape(0, sshape.ndim())), s);
+    Tensor<xpu, 2, DType> out = out_data[CountSketch::kOut].FlatTo2D<xpu, DType>(s);
+    n_samples                 = data.shape_[0];
+    in_dim                    = data.shape_[1];
     // firstly set out to zero as we will use sum
     out = 0;
-        CountSketchForward(out, data, h, ss, n_samples,
-                           this->param_.processing_batch_size, in_dim, this->param_.out_dim);
-    }
+    CountSketchForward(out,
+                       data,
+                       h,
+                       ss,
+                       n_samples,
+                       this->param_.processing_batch_size,
+                       in_dim,
+                       this->param_.out_dim);
+  }
 
-    virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
     Tensor<xpu, 2, DType> ograd = out_grad[CountSketch::kOut].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> dgrad = in_grad[CountSketch::kData].FlatTo2D<xpu, DType>(s);
 
     const mxnet::TShape& hshape = in_data[CountSketch::kH].shape_;
     const mxnet::TShape& sshape = in_data[CountSketch::kS].shape_;
-        Tensor<xpu, 1, DType> h = in_data[CountSketch::kH].get_with_shape<xpu, 1, DType>(
-                                            Shape1(hshape.ProdShape(0, hshape.ndim())), s);
+    Tensor<xpu, 1, DType> h     = in_data[CountSketch::kH].get_with_shape<xpu, 1, DType>(
+        Shape1(hshape.ProdShape(0, hshape.ndim())), s);
     Tensor<xpu, 1, DType> ss = in_data[CountSketch::kS].get_with_shape<xpu, 1, DType>(
-                                            Shape1(sshape.ProdShape(0, sshape.ndim())), s);
+        Shape1(sshape.ProdShape(0, sshape.ndim())), s);
 
-    CountSketchBackward(dgrad, ograd, h, ss, n_samples,
-            this->param_.processing_batch_size, in_dim, this->param_.out_dim);
-    }
+    CountSketchBackward(dgrad,
+                        ograd,
+                        h,
+                        ss,
+                        n_samples,
+                        this->param_.processing_batch_size,
+                        in_dim,
+                        this->param_.out_dim);
+  }
 
  private:
-    CountSketchParam param_;
-    int n_samples;
-    int in_dim;
+  CountSketchParam param_;
+  int n_samples;
+  int in_dim;
 };  // class CountSketchOp
 
 // Declare Factory Function
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(CountSketchParam param, int dtype);
 
 #if DMLC_USE_CXX11
 class CountSketchProp : public OperatorProperty {
  public:
-    std::vector<std::string> ListArguments() const override {
-        return {"data", "h", "s"};
-    }
-    std::vector<std::string> ListOutputs() const override {
+  std::vector<std::string> ListArguments() const override {
+    return {"data", "h", "s"};
+  }
+  std::vector<std::string> ListOutputs() const override {
     return {"output"};
   }
   int NumOutputs() const override {
@@ -144,44 +156,45 @@ class CountSketchProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
-    CHECK_EQ(in_shape->size(), 3) <<"Input:[data, h, s]";
-    const mxnet::TShape &dshape = (*in_shape)[CountSketch::kData];
+    CHECK_EQ(in_shape->size(), 3) << "Input:[data, h, s]";
+    const mxnet::TShape& dshape = (*in_shape)[CountSketch::kData];
     // require data to be known
-    if (mxnet::op::shape_is_none(dshape)) return false;
+    if (mxnet::op::shape_is_none(dshape))
+      return false;
 
     out_shape->clear();
     if (dshape.ndim() == 4) {
       // check the shapes of h and s
-        CHECK_EQ((*in_shape)[CountSketch::kH][1], dshape[3])
-            << "H should be 2D tensor with same length as input shape[3], "
-                        << (*in_shape)[CountSketch::kH][1] << " v.s. " << dshape[3];
-        CHECK_EQ((*in_shape)[CountSketch::kS][1], dshape[3])
-            << "S should be 2D tensor with same length as input shape[3], "
-                        << (*in_shape)[CountSketch::kS][1] << " v.s. " << dshape[3];
-
-        out_shape->push_back(Shape4(dshape[0], dshape[1], dshape[2], param_.out_dim));
+      CHECK_EQ((*in_shape)[CountSketch::kH][1], dshape[3])
+          << "H should be 2D tensor with same length as input shape[3], "
+          << (*in_shape)[CountSketch::kH][1] << " v.s. " << dshape[3];
+      CHECK_EQ((*in_shape)[CountSketch::kS][1], dshape[3])
+          << "S should be 2D tensor with same length as input shape[3], "
+          << (*in_shape)[CountSketch::kS][1] << " v.s. " << dshape[3];
+
+      out_shape->push_back(Shape4(dshape[0], dshape[1], dshape[2], param_.out_dim));
     } else if (dshape.ndim() == 2) {
-        CHECK_EQ((*in_shape)[CountSketch::kH][1], dshape[1])
-           << "H should be 2D tensor with same length as input shape[1], "
-                        << (*in_shape)[CountSketch::kH][1] << " v.s. " << dshape[1];
-        CHECK_EQ((*in_shape)[CountSketch::kS][1], dshape[1])
-            << "S should be 2D tensor with same length as input shape[1], "
-                        << (*in_shape)[CountSketch::kS][1] << " v.s. " << dshape[1];
-        out_shape->push_back(Shape2(dshape[0], param_.out_dim));
+      CHECK_EQ((*in_shape)[CountSketch::kH][1], dshape[1])
+          << "H should be 2D tensor with same length as input shape[1], "
+          << (*in_shape)[CountSketch::kH][1] << " v.s. " << dshape[1];
+      CHECK_EQ((*in_shape)[CountSketch::kS][1], dshape[1])
+          << "S should be 2D tensor with same length as input shape[1], "
+          << (*in_shape)[CountSketch::kS][1] << " v.s. " << dshape[1];
+      out_shape->push_back(Shape2(dshape[0], param_.out_dim));
     } else {
-        CHECK_EQ(dshape.ndim(), 2) <<"Data should be 2D or 4D!";
-    return false;
+      CHECK_EQ(dshape.ndim(), 2) << "Data should be 2D or 4D!";
+      return false;
     }
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 1);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -199,7 +212,7 @@ class CountSketchProp : public OperatorProperty {
 
   OperatorProperty* Copy() const override {
     CountSketchProp* cs_sym = new CountSketchProp();
-    cs_sym->param_ = this->param_;
+    cs_sym->param_          = this->param_;
     return cs_sym;
   }
 
@@ -208,19 +221,20 @@ class CountSketchProp : public OperatorProperty {
   }
 
   // declare dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
-    return {out_grad[CountSketch::kOut], in_data[CountSketch::kData],
-            in_data[CountSketch::kH], in_data[CountSketch::kS]};
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
+    return {out_grad[CountSketch::kOut],
+            in_data[CountSketch::kData],
+            in_data[CountSketch::kH],
+            in_data[CountSketch::kS]};
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {{in_data[CountSketch::kData], in_grad[CountSketch::kData]}};
   }
 
@@ -229,11 +243,12 @@ class CountSketchProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                              std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
-    CountSketchParam param_;
+  CountSketchParam param_;
 };
 #endif
 }  // namespace op
diff --git a/src/operator/contrib/count_sketch.cc b/src/operator/contrib/count_sketch.cc
index 4b6504e564ee..e75e97a2b07d 100644
--- a/src/operator/contrib/count_sketch.cc
+++ b/src/operator/contrib/count_sketch.cc
@@ -22,28 +22,29 @@
  * \file count_sketch.cc
  * \brief count_sketch op
  * \author Chen Zhu
-*/
+ */
 #include "./count_sketch-inl.h"
 namespace mxnet {
 namespace op {
 
-template<>
-Operator *CreateOp<cpu>(CountSketchParam param, int dtype) {
-    LOG(FATAL) << "CountSketch is only available for GPU.";
-    return nullptr;
+template <>
+Operator* CreateOp<cpu>(CountSketchParam param, int dtype) {
+  LOG(FATAL) << "CountSketch is only available for GPU.";
+  return nullptr;
 }
-Operator *CountSketchProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                            std::vector<int> *in_type) const {
-    mxnet::ShapeVector out_shape, aux_shape;
-    std::vector<int> out_type, aux_type;
-    CHECK(InferType(in_type, &out_type, &aux_type));
-    CHECK(InferShape(in_shape, &out_shape, &aux_shape));
-    DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
+Operator* CountSketchProp::CreateOperatorEx(Context ctx,
+                                            mxnet::ShapeVector* in_shape,
+                                            std::vector<int>* in_type) const {
+  mxnet::ShapeVector out_shape, aux_shape;
+  std::vector<int> out_type, aux_type;
+  CHECK(InferType(in_type, &out_type, &aux_type));
+  CHECK(InferShape(in_shape, &out_shape, &aux_shape));
+  DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(CountSketchParam);
 MXNET_REGISTER_OP_PROPERTY(_contrib_count_sketch, CountSketchProp)
-.describe(R"code(Apply CountSketch to input: map a d-dimension data to k-dimension data"
+    .describe(R"code(Apply CountSketch to input: map a d-dimension data to k-dimension data"
 
 .. note:: `count_sketch` is only available on GPU.
 
@@ -65,10 +66,10 @@ Example::
                                                                      [3.2, 0, 0, -5.7, 6.6]]
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the CountSketchOp.")
-.add_argument("h", "NDArray-or-Symbol", "The index vector")
-.add_argument("s", "NDArray-or-Symbol", "The sign vector")
-.add_arguments(CountSketchParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the CountSketchOp.")
+    .add_argument("h", "NDArray-or-Symbol", "The index vector")
+    .add_argument("s", "NDArray-or-Symbol", "The sign vector")
+    .add_arguments(CountSketchParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/count_sketch.cu b/src/operator/contrib/count_sketch.cu
index c6370c09d1c1..71cd8ddb5c8d 100644
--- a/src/operator/contrib/count_sketch.cu
+++ b/src/operator/contrib/count_sketch.cu
@@ -22,15 +22,13 @@
  * \file count_sketch.cu
  * \brief count_sketch op
  * \author Chen Zhu, Yang Shi
-*/
+ */
 #include "./count_sketch-inl.h"
 #include <mshadow/tensor.h>
 #include <stdio.h>
 #include <algorithm>
 
-
-
-#define WARPS_PER_BLOCK 1
+#define WARPS_PER_BLOCK   1
 #define THREADS_PER_BLOCK 512
 
 namespace mshadow {
@@ -48,21 +46,26 @@ __device__ void atomic_add(double* address, double val) {
   // #atomic-functions
 
   // NOLINT_NEXT_LINE(runtime/int)
-  unsigned long long int* address_as_ull = (unsigned long long int*) address;  // NOLINT(*)
-  unsigned long long int old = *address_as_ull, assumed;                     // NOLINT(*)
+  unsigned long long int* address_as_ull = (unsigned long long int*)address;  // NOLINT(*)
+  unsigned long long int old             = *address_as_ull, assumed;          // NOLINT(*)
   do {
     assumed = old;
-    old = atomicCAS(address_as_ull, assumed,
-            __double_as_longlong(val + __longlong_as_double(assumed)));
+    old     = atomicCAS(
+        address_as_ull, assumed, __double_as_longlong(val + __longlong_as_double(assumed)));
     // Note: uses integer comparison to avoid hang in case of NaN
     // (since NaN != NaN)
   } while (assumed != old);
 }
 
 template <typename DType>
-__global__ void sketch_forward_kernel(const int nthreads, DType *out, const DType *h,
-                    const DType *s, const DType *in, const int n_smaples,
-                    const int in_dim, const int out_dim) {
+__global__ void sketch_forward_kernel(const int nthreads,
+                                      DType* out,
+                                      const DType* h,
+                                      const DType* s,
+                                      const DType* in,
+                                      const int n_smaples,
+                                      const int in_dim,
+                                      const int out_dim) {
   // input: n_smaples * in_dim
   // output: n_smaples * out_dim
   const int index = blockIdx.x * blockDim.x + threadIdx.x;
@@ -71,120 +74,134 @@ __global__ void sketch_forward_kernel(const int nthreads, DType *out, const DTyp
   }
   // nthreads is the maximum of thread indices, should be equal to in_dim
   // index is point index
-  const int i_indim = index % in_dim;
+  const int i_indim  = index % in_dim;
   const int i_sample = index / in_dim;
 
   // get the target location in the output
-  const int target = i_sample*out_dim + h[i_indim];
+  const int target = i_sample * out_dim + h[i_indim];
   atomic_add(out + target, s[i_indim] * in[index]);
 }
 
 template <typename DType>
-__global__ void sketch_backward_kernel(const int nthreads, DType *in_grad, const DType *h,
-                    const DType *s, const DType *out_grad, const int n_smaples,
-                    const int in_dim, const int out_dim) {
+__global__ void sketch_backward_kernel(const int nthreads,
+                                       DType* in_grad,
+                                       const DType* h,
+                                       const DType* s,
+                                       const DType* out_grad,
+                                       const int n_smaples,
+                                       const int in_dim,
+                                       const int out_dim) {
   // only calculate gradient regarding x
   // can also calculate gradient regarding s if needed
-  const int index = blockIdx.x * blockDim.x + threadIdx.x;
-  const int i_indim = index % in_dim;
+  const int index    = blockIdx.x * blockDim.x + threadIdx.x;
+  const int i_indim  = index % in_dim;
   const int i_sample = index / in_dim;
-  const int i_outdim = i_sample*out_dim + h[i_indim];
-  in_grad[index] = out_grad[i_outdim] * s[i_indim];
+  const int i_outdim = i_sample * out_dim + h[i_indim];
+  in_grad[index]     = out_grad[i_outdim] * s[i_indim];
 }
 
 }  // namespace cuda
 
 // CountSketch Forward
 template <typename DType>
-inline void CountSketchForward(const Tensor<gpu, 2, DType> &out,
-                               const Tensor<gpu, 2, DType> &in,
-                               const Tensor<gpu, 1, DType> &h,
-                               const Tensor<gpu, 1, DType> &s,
+inline void CountSketchForward(const Tensor<gpu, 2, DType>& out,
+                               const Tensor<gpu, 2, DType>& in,
+                               const Tensor<gpu, 1, DType>& h,
+                               const Tensor<gpu, 1, DType>& s,
                                const int n_samples,
                                const int processing_batch_size,
                                const int in_dim,
                                const int out_dim) {
-  DType *out_ptr = out.dptr_;
-  const DType *in_ptr = in.dptr_;
-  const DType *h_ptr = h.dptr_;
-  const DType *s_ptr = s.dptr_;
-  int upper_bound = n_samples/processing_batch_size;
-  if (n_samples%processing_batch_size == 0) {
-    upper_bound = upper_bound-1;
+  DType* out_ptr      = out.dptr_;
+  const DType* in_ptr = in.dptr_;
+  const DType* h_ptr  = h.dptr_;
+  const DType* s_ptr  = s.dptr_;
+  int upper_bound     = n_samples / processing_batch_size;
+  if (n_samples % processing_batch_size == 0) {
+    upper_bound = upper_bound - 1;
   }
   // guarantee there are at least one iteration
-  upper_bound = upper_bound > 0? upper_bound:0;
-  int bstart = 0;
-  for ( int i = 0; i <= upper_bound; i++ ) {
+  upper_bound = upper_bound > 0 ? upper_bound : 0;
+  int bstart  = 0;
+  for (int i = 0; i <= upper_bound; i++) {
     const int batchlen = min(processing_batch_size, n_samples - bstart);
     const int nthreads = batchlen * in_dim;
     // to make number of threads the same as input
     const int threads_per_block = min(THREADS_PER_BLOCK, nthreads);
-    int nblocks = (nthreads + threads_per_block - 1) / threads_per_block;
-    cuda::sketch_forward_kernel<DType><<<nblocks, threads_per_block>>>(
-                                    nthreads, out_ptr+bstart*out_dim, h_ptr,
-                                    s_ptr, in_ptr+bstart*in_dim, batchlen,
-                                    in_dim, out_dim);
+    int nblocks                 = (nthreads + threads_per_block - 1) / threads_per_block;
+    cuda::sketch_forward_kernel<DType><<<nblocks, threads_per_block>>>(nthreads,
+                                                                       out_ptr + bstart * out_dim,
+                                                                       h_ptr,
+                                                                       s_ptr,
+                                                                       in_ptr + bstart * in_dim,
+                                                                       batchlen,
+                                                                       in_dim,
+                                                                       out_dim);
     cudaError_t err = cudaDeviceSynchronize();
     CHECK_EQ(err, cudaSuccess) << "Error occured! CUDA: " << cudaGetErrorString(err);
-    bstart = (i+1)*batchlen;
+    bstart = (i + 1) * batchlen;
   }
 }
 
-template<typename DType>
-inline void CountSketchBackward(const Tensor<gpu, 2, DType> &in_grad,
-                                const Tensor<gpu, 2, DType> &out_grad,
-                                const Tensor<gpu, 1, DType> &h,
-                                const Tensor<gpu, 1, DType> &s,
+template <typename DType>
+inline void CountSketchBackward(const Tensor<gpu, 2, DType>& in_grad,
+                                const Tensor<gpu, 2, DType>& out_grad,
+                                const Tensor<gpu, 1, DType>& h,
+                                const Tensor<gpu, 1, DType>& s,
                                 const int n_samples,
                                 const int processing_batch_size,
                                 const int in_dim,
                                 const int out_dim) {
-  DType *in_grad_ptr = in_grad.dptr_;
-  const DType *out_grad_ptr = out_grad.dptr_;
-  const DType *h_ptr = h.dptr_;
-  const DType *s_ptr = s.dptr_;
-  int upper_bound = n_samples/processing_batch_size;
-  if (n_samples%processing_batch_size == 0) {
-    upper_bound = upper_bound-1;
+  DType* in_grad_ptr        = in_grad.dptr_;
+  const DType* out_grad_ptr = out_grad.dptr_;
+  const DType* h_ptr        = h.dptr_;
+  const DType* s_ptr        = s.dptr_;
+  int upper_bound           = n_samples / processing_batch_size;
+  if (n_samples % processing_batch_size == 0) {
+    upper_bound = upper_bound - 1;
   }
   // guarantee there are at least one iteration
   upper_bound = upper_bound > 0 ? upper_bound : 0;
-  int bstart = 0;
-  for ( int i = 0; i <= upper_bound; i++ ) {
+  int bstart  = 0;
+  for (int i = 0; i <= upper_bound; i++) {
     const int batchlen = min(processing_batch_size, n_samples - bstart);
     const int nthreads = batchlen * in_dim;
     // to make number of threads the same as input
     const int threads_per_block = min(THREADS_PER_BLOCK, nthreads);
-    int nblocks = (nthreads + threads_per_block - 1) / threads_per_block;
-    cuda::sketch_backward_kernel<DType><<<nblocks, threads_per_block>>>(
-                            nthreads, in_grad_ptr+bstart*in_dim, h_ptr,
-                            s_ptr, out_grad_ptr+bstart*out_dim, batchlen,
-                            in_dim, out_dim);
+    int nblocks                 = (nthreads + threads_per_block - 1) / threads_per_block;
+    cuda::sketch_backward_kernel<DType>
+        <<<nblocks, threads_per_block>>>(nthreads,
+                                         in_grad_ptr + bstart * in_dim,
+                                         h_ptr,
+                                         s_ptr,
+                                         out_grad_ptr + bstart * out_dim,
+                                         batchlen,
+                                         in_dim,
+                                         out_dim);
     cudaError_t err = cudaDeviceSynchronize();
     CHECK_EQ(err, cudaSuccess) << "Error occured! CUDA: " << cudaGetErrorString(err);
-    bstart = (i+1)*batchlen;
+    bstart = (i + 1) * batchlen;
   }
 }
 }  // namespace mshadow
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(CountSketchParam param, int dtype) {
-  Operator *op = nullptr;
+  Operator* op = nullptr;
   switch (dtype) {
-      case mshadow::kFloat32:
-          op = new CountSketchOp<gpu, float>(param);
-          break;
-      case mshadow::kFloat64:
-          op = new CountSketchOp<gpu, double>(param);
-          break;
-      case mshadow::kFloat16:
-          LOG(FATAL) << "float16 count sketch layer is currently"
-                  "not supported.";
-          break;
-      default:
-          LOG(FATAL) << "Unsupported type " << dtype;
+    case mshadow::kFloat32:
+      op = new CountSketchOp<gpu, float>(param);
+      break;
+    case mshadow::kFloat64:
+      op = new CountSketchOp<gpu, double>(param);
+      break;
+    case mshadow::kFloat16:
+      LOG(FATAL) << "float16 count sketch layer is currently"
+                    "not supported.";
+      break;
+    default:
+      LOG(FATAL) << "Unsupported type " << dtype;
   }
   return op;
 }
diff --git a/src/operator/contrib/deformable_psroi_pooling-inl.h b/src/operator/contrib/deformable_psroi_pooling-inl.h
index f848f531b0cd..908c36ce65cc 100644
--- a/src/operator/contrib/deformable_psroi_pooling-inl.h
+++ b/src/operator/contrib/deformable_psroi_pooling-inl.h
@@ -18,12 +18,12 @@
  */
 
 /*!
-* Copyright (c) 2017 Microsoft
-* Licensed under The Apache-2.0 License [see LICENSE for details]
-* \file deformable_psroi_pooling-inl.h
-* \brief deformable psroi pooling operator and symbol
-* \author Yi Li, Guodong Zhang, Jifeng Dai
-*/
+ * Copyright (c) 2017 Microsoft
+ * Licensed under The Apache-2.0 License [see LICENSE for details]
+ * \file deformable_psroi_pooling-inl.h
+ * \brief deformable psroi pooling operator and symbol
+ * \author Yi Li, Guodong Zhang, Jifeng Dai
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_DEFORMABLE_PSROI_POOLING_INL_H_
 #define MXNET_OPERATOR_CONTRIB_DEFORMABLE_PSROI_POOLING_INL_H_
 
@@ -37,16 +37,15 @@
 #include "../mshadow_op.h"
 #include "../operator_common.h"
 
-
 namespace mxnet {
 namespace op {
 
-  // Declare enumeration of input order to make code more intuitive.
-  // These enums are only visible within this header
+// Declare enumeration of input order to make code more intuitive.
+// These enums are only visible within this header
 namespace deformablepsroipool {
-  enum DeformablePSROIPoolingOpInputs { kData, kBox, kTrans };
-  enum DeformablePSROIPoolingOpOutputs { kOut, kTopCount };
-}  // deformablepsroipool
+enum DeformablePSROIPoolingOpInputs { kData, kBox, kTrans };
+enum DeformablePSROIPoolingOpOutputs { kOut, kTopCount };
+}  // namespace deformablepsroipool
 
 struct DeformablePSROIPoolingParam : public dmlc::Parameter<DeformablePSROIPoolingParam> {
   // mxnet::TShape pooled_size;
@@ -59,35 +58,36 @@ struct DeformablePSROIPoolingParam : public dmlc::Parameter<DeformablePSROIPooli
   float trans_std;
   bool no_trans;
   DMLC_DECLARE_PARAMETER(DeformablePSROIPoolingParam) {
-    DMLC_DECLARE_FIELD(spatial_scale).set_range(0.0, 1.0)
-      .describe("Ratio of input feature map height (or w) to raw image height (or w). "
-        "Equals the reciprocal of total stride in convolutional layers");
+    DMLC_DECLARE_FIELD(spatial_scale)
+        .set_range(0.0, 1.0)
+        .describe(
+            "Ratio of input feature map height (or w) to raw image height (or w). "
+            "Equals the reciprocal of total stride in convolutional layers");
     DMLC_DECLARE_FIELD(output_dim).describe("fix output dim");
     DMLC_DECLARE_FIELD(group_size).describe("fix group size");
     DMLC_DECLARE_FIELD(pooled_size).describe("fix pooled size");
     DMLC_DECLARE_FIELD(part_size).set_default(0).describe("fix part size");
     DMLC_DECLARE_FIELD(sample_per_part).set_default(1).describe("fix samples per part");
-    DMLC_DECLARE_FIELD(trans_std).set_default(0.0).set_range(0.0, 1.0)
-      .describe("fix transition std");
-    DMLC_DECLARE_FIELD(no_trans).set_default(false)
-      .describe("Whether to disable trans parameter.");
+    DMLC_DECLARE_FIELD(trans_std).set_default(0.0).set_range(0.0, 1.0).describe(
+        "fix transition std");
+    DMLC_DECLARE_FIELD(no_trans).set_default(false).describe("Whether to disable trans parameter.");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class DeformablePSROIPoolingOp : public Operator {
  public:
   explicit DeformablePSROIPoolingOp(DeformablePSROIPoolingParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    size_t in_expected = param_.no_trans? 2 : 3;
+    size_t in_expected  = param_.no_trans ? 2 : 3;
     size_t out_expected = 2;
     CHECK_EQ(in_data.size(), in_expected);
     CHECK_EQ(out_data.size(), out_expected);
@@ -95,38 +95,48 @@ class DeformablePSROIPoolingOp : public Operator {
              in_data[deformablepsroipool::kBox].shape_[0]);
     CHECK_EQ(out_data[deformablepsroipool::kTopCount].shape_[0],
              in_data[deformablepsroipool::kBox].shape_[0]);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     Tensor<xpu, 4, DType> data = in_data[deformablepsroipool::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 2, DType> bbox = in_data[deformablepsroipool::kBox].get<xpu, 2, DType>(s);
-    Tensor<xpu, 4, DType> out = out_data[deformablepsroipool::kOut].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> top_count = out_data[deformablepsroipool::kTopCount]
-                                        .get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> out  = out_data[deformablepsroipool::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> top_count =
+        out_data[deformablepsroipool::kTopCount].get<xpu, 4, DType>(s);
     CHECK_EQ(data.CheckContiguous(), true);
     CHECK_EQ(bbox.CheckContiguous(), true);
     CHECK_EQ(out.CheckContiguous(), true);
     CHECK_EQ(top_count.CheckContiguous(), true);
-    out = -FLT_MAX;
+    out       = -FLT_MAX;
     top_count = 0.0f;
 
     Tensor<xpu, 4, DType> trans{nullptr, mshadow::Shape4(0, 0, 0, 0)};
     if (!param_.no_trans) {
       trans = in_data[deformablepsroipool::kTrans].get<xpu, 4, DType>(s);
     }
-    DeformablePSROIPoolForward(out, data, bbox, trans, top_count, param_.no_trans,
-      param_.spatial_scale, param_.output_dim, param_.group_size, param_.pooled_size,
-      param_.part_size, param_.sample_per_part, param_.trans_std);
+    DeformablePSROIPoolForward(out,
+                               data,
+                               bbox,
+                               trans,
+                               top_count,
+                               param_.no_trans,
+                               param_.spatial_scale,
+                               param_.output_dim,
+                               param_.group_size,
+                               param_.pooled_size,
+                               param_.part_size,
+                               param_.sample_per_part,
+                               param_.trans_std);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    size_t in_expected = param_.no_trans ? 2 : 3;
+    size_t in_expected  = param_.no_trans ? 2 : 3;
     size_t out_expected = 2;
     CHECK_EQ(in_data.size(), in_expected);
     CHECK_EQ(out_data.size(), out_expected);
@@ -134,26 +144,26 @@ class DeformablePSROIPoolingOp : public Operator {
              in_data[deformablepsroipool::kBox].shape_[0]);
     CHECK_EQ(out_data[deformablepsroipool::kTopCount].shape_[0],
              in_data[deformablepsroipool::kBox].shape_[0]);
-    CHECK_NE(req[deformablepsroipool::kData], kWriteInplace) <<
-      "DeformablePSROIPooling: Backward doesn't support kWriteInplace.";
-    CHECK_NE(req[deformablepsroipool::kBox], kWriteInplace) <<
-      "DeformablePSROIPooling: Backward doesn't support kWriteInplace.";
+    CHECK_NE(req[deformablepsroipool::kData], kWriteInplace)
+        << "DeformablePSROIPooling: Backward doesn't support kWriteInplace.";
+    CHECK_NE(req[deformablepsroipool::kBox], kWriteInplace)
+        << "DeformablePSROIPooling: Backward doesn't support kWriteInplace.";
     // CHECK_NE(req[deformablepsroipool::kTrans], kWriteInplace) <<
     //  "DeformablePSROIPooling: Backward doesn't support kWriteInplace.";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     Tensor<xpu, 4, DType> grad_out = out_grad[deformablepsroipool::kOut].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> data = in_data[deformablepsroipool::kData].get<xpu, 4, DType>(s);
-    Tensor<xpu, 2, DType> bbox = in_data[deformablepsroipool::kBox].get<xpu, 2, DType>(s);
-    Tensor<xpu, 4, DType> top_count = out_data[deformablepsroipool::kTopCount]
-                                        .get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> grad_in = in_grad[deformablepsroipool::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> data     = in_data[deformablepsroipool::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 2, DType> bbox     = in_data[deformablepsroipool::kBox].get<xpu, 2, DType>(s);
+    Tensor<xpu, 4, DType> top_count =
+        out_data[deformablepsroipool::kTopCount].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> grad_in  = in_grad[deformablepsroipool::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 2, DType> grad_roi = in_grad[deformablepsroipool::kBox].get<xpu, 2, DType>(s);
     Tensor<xpu, 4, DType> grad_trans{nullptr, mshadow::Shape4(0, 0, 0, 0)};
     Tensor<xpu, 4, DType> trans{nullptr, mshadow::Shape4(0, 0, 0, 0)};
     if (!param_.no_trans) {
       CHECK_EQ(in_grad.size(), 3);
-      trans = in_data[deformablepsroipool::kTrans].get<xpu, 4, DType>(s);
+      trans      = in_data[deformablepsroipool::kTrans].get<xpu, 4, DType>(s);
       grad_trans = in_grad[deformablepsroipool::kTrans].get<xpu, 4, DType>(s);
     }
 
@@ -167,9 +177,21 @@ class DeformablePSROIPoolingOp : public Operator {
     if (!param_.no_trans) {
       Assign(grad_trans, req[deformablepsroipool::kTrans], 0);
     }
-    DeformablePSROIPoolBackwardAcc(grad_in, grad_trans, grad_out, data, bbox, trans,
-      top_count, param_.no_trans, param_.spatial_scale, param_.output_dim, param_.group_size,
-      param_.pooled_size, param_.part_size, param_.sample_per_part, param_.trans_std);
+    DeformablePSROIPoolBackwardAcc(grad_in,
+                                   grad_trans,
+                                   grad_out,
+                                   data,
+                                   bbox,
+                                   trans,
+                                   top_count,
+                                   param_.no_trans,
+                                   param_.spatial_scale,
+                                   param_.output_dim,
+                                   param_.group_size,
+                                   param_.pooled_size,
+                                   param_.part_size,
+                                   param_.sample_per_part,
+                                   param_.trans_std);
     Assign(grad_roi, req[deformablepsroipool::kBox], 0);
   }
 
@@ -178,7 +200,7 @@ class DeformablePSROIPoolingOp : public Operator {
 };  // class DeformablePSROIPoolingOp
 
 // Decalre Factory function, used for dispatch specialization
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(DeformablePSROIPoolingParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -186,14 +208,14 @@ class DeformablePSROIPoolingProp : public OperatorProperty {
  public:
   std::vector<std::string> ListArguments() const override {
     if (param_.no_trans) {
-      return{ "data", "rois" };
+      return {"data", "rois"};
     } else {
-      return{ "data", "rois", "trans" };
+      return {"data", "rois", "trans"};
     }
   }
 
   std::vector<std::string> ListOutputs() const override {
-    return{ "output", "top_count" };
+    return {"output", "top_count"};
   }
 
   int NumOutputs() const override {
@@ -215,9 +237,9 @@ class DeformablePSROIPoolingProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     if (param_.no_trans) {
       CHECK_EQ(in_shape->size(), 2) << "Input:[data, rois]";
@@ -241,15 +263,15 @@ class DeformablePSROIPoolingProp : public OperatorProperty {
     // top_count: [num_rois, c, pooled_h, pooled_w]
     out_shape->clear();
     out_shape->push_back(
-      Shape4(bshape[0], param_.output_dim, param_.pooled_size, param_.pooled_size));
+        Shape4(bshape[0], param_.output_dim, param_.pooled_size, param_.pooled_size));
     out_shape->push_back(
-      Shape4(bshape[0], param_.output_dim, param_.pooled_size, param_.pooled_size));
+        Shape4(bshape[0], param_.output_dim, param_.pooled_size, param_.pooled_size));
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 2);
     int dtype = (*in_type)[0];
     CHECK_EQ(dtype, (*in_type)[1]);
@@ -263,7 +285,7 @@ class DeformablePSROIPoolingProp : public OperatorProperty {
 
   OperatorProperty* Copy() const override {
     DeformablePSROIPoolingProp* deformable_psroi_pooling_sym = new DeformablePSROIPoolingProp();
-    deformable_psroi_pooling_sym->param_ = this->param_;
+    deformable_psroi_pooling_sym->param_                     = this->param_;
     return deformable_psroi_pooling_sym;
   }
 
@@ -272,29 +294,31 @@ class DeformablePSROIPoolingProp : public OperatorProperty {
   }
 
   // decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(const std::vector<int> &out_grad,
-                                             const std::vector<int> &in_data,
-                                             const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (param_.no_trans) {
-      return{ out_grad[deformablepsroipool::kOut], in_data[deformablepsroipool::kData],
-              in_data[deformablepsroipool::kBox], out_data[deformablepsroipool::kTopCount] };
+      return {out_grad[deformablepsroipool::kOut],
+              in_data[deformablepsroipool::kData],
+              in_data[deformablepsroipool::kBox],
+              out_data[deformablepsroipool::kTopCount]};
     } else {
-      return{ out_grad[deformablepsroipool::kOut], in_data[deformablepsroipool::kData],
-              in_data[deformablepsroipool::kBox], in_data[deformablepsroipool::kTrans],
-              out_data[deformablepsroipool::kTopCount] };
+      return {out_grad[deformablepsroipool::kOut],
+              in_data[deformablepsroipool::kData],
+              in_data[deformablepsroipool::kBox],
+              in_data[deformablepsroipool::kTrans],
+              out_data[deformablepsroipool::kTopCount]};
     }
   }
 
-
   Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
   Operator* CreateOperatorEx(Context ctx,
-                             mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
-
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   DeformablePSROIPoolingParam param_;
diff --git a/src/operator/contrib/deformable_psroi_pooling.cc b/src/operator/contrib/deformable_psroi_pooling.cc
index 697376dd573f..77c57c752ec1 100644
--- a/src/operator/contrib/deformable_psroi_pooling.cc
+++ b/src/operator/contrib/deformable_psroi_pooling.cc
@@ -23,7 +23,7 @@
  * \file deformable_psroi_pooling.cc
  * \brief
  * \author Yi Li, Guodong Zhang, Jifeng Dai
-*/
+ */
 #include "./deformable_psroi_pooling-inl.h"
 #include <mshadow/base.h>
 #include <mshadow/tensor.h>
@@ -31,350 +31,413 @@
 #include <mshadow/dot_engine-inl.h>
 #include <cassert>
 
+using std::ceil;
+using std::floor;
 using std::max;
 using std::min;
-using std::floor;
-using std::ceil;
 using std::round;
 
 namespace mshadow {
 
-  template <typename DType>
-  inline DType bilinear_interp_cpu(const DType* data,
-                                   const DType x, const DType y,
-                                   const index_t width, const index_t height) {
-    index_t x1 = floor(x);
-    index_t x2 = ceil(x);
-    index_t y1 = floor(y);
-    index_t y2 = ceil(y);
-    DType dist_x = static_cast<DType>(x - x1);
-    DType dist_y = static_cast<DType>(y - y1);
-    DType value11 = data[y1 * width + x1];
-    DType value12 = data[y2 * width + x1];
-    DType value21 = data[y1 * width + x2];
-    DType value22 = data[y2 * width + x2];
-    DType value = (1 - dist_x) * (1 - dist_y) * value11 + (1 - dist_x) * dist_y * value12 +
-      dist_x * (1 - dist_y) * value21 + dist_x * dist_y * value22;
-    return value;
-  }
-
-  template <typename DType>
-  inline void DeformablePSROIPoolForwardCPU(const index_t count, const DType* bottom_data,
-                                            const DType spatial_scale, const index_t channels,
-                                            const index_t height, const index_t width,
-                                            const index_t pooled_height, const index_t pooled_width,
-                                            const DType* bottom_rois, const DType* bottom_trans,
-                                            const bool no_trans, const DType trans_std,
-                                            const index_t sample_per_part, const index_t output_dim,
-                                            const index_t group_size, const index_t part_size,
-                                            const index_t num_classes,
-                                            const index_t channels_each_class,
-                                            DType* top_data, DType* top_count) {
-    const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
+template <typename DType>
+inline DType bilinear_interp_cpu(const DType* data,
+                                 const DType x,
+                                 const DType y,
+                                 const index_t width,
+                                 const index_t height) {
+  index_t x1    = floor(x);
+  index_t x2    = ceil(x);
+  index_t y1    = floor(y);
+  index_t y2    = ceil(y);
+  DType dist_x  = static_cast<DType>(x - x1);
+  DType dist_y  = static_cast<DType>(y - y1);
+  DType value11 = data[y1 * width + x1];
+  DType value12 = data[y2 * width + x1];
+  DType value21 = data[y1 * width + x2];
+  DType value22 = data[y2 * width + x2];
+  DType value   = (1 - dist_x) * (1 - dist_y) * value11 + (1 - dist_x) * dist_y * value12 +
+                dist_x * (1 - dist_y) * value21 + dist_x * dist_y * value22;
+  return value;
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolForwardCPU(const index_t count,
+                                          const DType* bottom_data,
+                                          const DType spatial_scale,
+                                          const index_t channels,
+                                          const index_t height,
+                                          const index_t width,
+                                          const index_t pooled_height,
+                                          const index_t pooled_width,
+                                          const DType* bottom_rois,
+                                          const DType* bottom_trans,
+                                          const bool no_trans,
+                                          const DType trans_std,
+                                          const index_t sample_per_part,
+                                          const index_t output_dim,
+                                          const index_t group_size,
+                                          const index_t part_size,
+                                          const index_t num_classes,
+                                          const index_t channels_each_class,
+                                          DType* top_data,
+                                          DType* top_count) {
+  const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 #pragma omp parallel for num_threads(omp_threads)
-    for (index_t index = 0; index < count; index++) {
-      // The output is in order (n, ctop, ph, pw)
-      index_t pw = index % pooled_width;
-      index_t ph = (index / pooled_width) % pooled_height;
-      index_t ctop = (index / pooled_width / pooled_height) % output_dim;
-      index_t n = index / pooled_width / pooled_height / output_dim;
-
-      // [start, end) interval for spatial sampling
-      const DType* offset_bottom_rois = bottom_rois + n * 5;
-      index_t roi_batch_ind = offset_bottom_rois[0];
-      DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
-      DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
-      DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
-      DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
-
-      // Force too small ROIs to be 1x1
-      DType roi_width = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
-      DType roi_height = max(roi_end_h - roi_start_h, static_cast<DType>(0.1));
-
-      // Compute w and h at bottom
-      DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
-      DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
-
-      DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
-      DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
-
-      index_t part_h = floor(static_cast<DType>(ph) / pooled_height * part_size);
-      index_t part_w = floor(static_cast<DType>(pw) / pooled_width * part_size);
-      index_t class_id = ctop / channels_each_class;
-      DType trans_x = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-      DType trans_y = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2 + 1)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-
-      DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
-      wstart += trans_x * roi_width;
-      DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
-      hstart += trans_y * roi_height;
-
-      DType sum = 0;
-      index_t count = 0;
-      index_t gw = floor(static_cast<DType>(pw) * group_size / pooled_width);
-      index_t gh = floor(static_cast<DType>(ph) * group_size / pooled_height);
-      gw = min(max(gw, static_cast<index_t>(0)), group_size - 1);
-      gh = min(max(gh, static_cast<index_t>(0)), group_size - 1);
-
-      const DType* offset_bottom_data = bottom_data + (roi_batch_ind * channels) * height * width;
-      for (index_t ih = 0; ih < sample_per_part; ih++) {
-        for (index_t iw = 0; iw < sample_per_part; iw++) {
-          DType w = wstart + iw * sub_bin_size_w;
-          DType h = hstart + ih * sub_bin_size_h;
-          // bilinear interpolation
-          if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
-            continue;
-          }
-          w = min(max(w, static_cast<DType>(0)), static_cast<DType>(width - 1));
-          h = min(max(h, static_cast<DType>(0)), static_cast<DType>(height - 1));
-          index_t c = (ctop * group_size + gh) * group_size + gw;
-          DType val = bilinear_interp_cpu(offset_bottom_data + c * height * width,
-                                          w, h, width, height);
-          sum += val;
-          count++;
+  for (index_t index = 0; index < count; index++) {
+    // The output is in order (n, ctop, ph, pw)
+    index_t pw   = index % pooled_width;
+    index_t ph   = (index / pooled_width) % pooled_height;
+    index_t ctop = (index / pooled_width / pooled_height) % output_dim;
+    index_t n    = index / pooled_width / pooled_height / output_dim;
+
+    // [start, end) interval for spatial sampling
+    const DType* offset_bottom_rois = bottom_rois + n * 5;
+    index_t roi_batch_ind           = offset_bottom_rois[0];
+    DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
+    DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
+
+    // Force too small ROIs to be 1x1
+    DType roi_width  = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
+    DType roi_height = max(roi_end_h - roi_start_h, static_cast<DType>(0.1));
+
+    // Compute w and h at bottom
+    DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
+    DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
+
+    DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
+    DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
+
+    index_t part_h   = floor(static_cast<DType>(ph) / pooled_height * part_size);
+    index_t part_w   = floor(static_cast<DType>(pw) / pooled_width * part_size);
+    index_t class_id = ctop / channels_each_class;
+    DType trans_x =
+        no_trans
+            ? static_cast<DType>(0)
+            : bottom_trans[(((n * num_classes + class_id) * 2) * part_size + part_h) * part_size +
+                           part_w] *
+                  trans_std;
+    DType trans_y =
+        no_trans ? static_cast<DType>(0)
+                 : bottom_trans[(((n * num_classes + class_id) * 2 + 1) * part_size + part_h) *
+                                    part_size +
+                                part_w] *
+                       trans_std;
+
+    DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
+    wstart += trans_x * roi_width;
+    DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
+    hstart += trans_y * roi_height;
+
+    DType sum     = 0;
+    index_t count = 0;
+    index_t gw    = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    index_t gh    = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw            = min(max(gw, static_cast<index_t>(0)), group_size - 1);
+    gh            = min(max(gh, static_cast<index_t>(0)), group_size - 1);
+
+    const DType* offset_bottom_data = bottom_data + (roi_batch_ind * channels) * height * width;
+    for (index_t ih = 0; ih < sample_per_part; ih++) {
+      for (index_t iw = 0; iw < sample_per_part; iw++) {
+        DType w = wstart + iw * sub_bin_size_w;
+        DType h = hstart + ih * sub_bin_size_h;
+        // bilinear interpolation
+        if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
+          continue;
         }
+        w         = min(max(w, static_cast<DType>(0)), static_cast<DType>(width - 1));
+        h         = min(max(h, static_cast<DType>(0)), static_cast<DType>(height - 1));
+        index_t c = (ctop * group_size + gh) * group_size + gw;
+        DType val =
+            bilinear_interp_cpu(offset_bottom_data + c * height * width, w, h, width, height);
+        sum += val;
+        count++;
       }
-      top_data[index] = count == 0 ? static_cast<DType>(0) : sum / count;
-      top_count[index] = count;
     }
+    top_data[index]  = count == 0 ? static_cast<DType>(0) : sum / count;
+    top_count[index] = count;
   }
-
-  template<typename DType>
-  inline void DeformablePSROIPoolForward(const Tensor<cpu, 4, DType> &out,
-                                         const Tensor<cpu, 4, DType> &data,
-                                         const Tensor<cpu, 2, DType> &bbox,
-                                         const Tensor<cpu, 4, DType> &trans,
-                                         const Tensor<cpu, 4, DType> &top_count,
-                                         const bool no_trans, const float spatial_scale,
-                                         const index_t output_dim, const index_t group_size,
-                                         const index_t pooled_size, const index_t part_size,
-                                         const index_t sample_per_part, const float trans_std) {
-    const DType *bottom_data = data.dptr_;
-    const DType *bottom_rois = bbox.dptr_;
-    const DType *bottom_trans = no_trans ? nullptr : trans.dptr_;
-    DType *top_data = out.dptr_;
-    DType *top_count_data = top_count.dptr_;
-    const index_t count = out.shape_.Size();
-    const index_t channels = data.size(1);
-    const index_t height = data.size(2);
-    const index_t width = data.size(3);
-    const index_t pooled_height = pooled_size;
-    const index_t pooled_width = pooled_size;
-    const index_t num_classes = no_trans ? 1 : trans.size(1) / 2;
-    const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
-    DeformablePSROIPoolForwardCPU<DType>(count, bottom_data, spatial_scale,
-                                         channels, height, width,
-                                         pooled_height, pooled_width,
-                                         bottom_rois, bottom_trans,
-                                         no_trans, trans_std, sample_per_part,
-                                         output_dim, group_size, part_size, num_classes,
-                                         channels_each_class, top_data, top_count_data);
-
-    return;
-  }
-
-  template <typename DType>
-  inline void DeformablePSROIPoolBackwardAccCPU(const index_t count, const DType* top_diff,
-                                                const DType* top_count, const index_t num_rois,
-                                                const DType spatial_scale, const index_t channels,
-                                                const index_t height, const index_t width,
-                                                const index_t pooled_height,
-                                                const index_t pooled_width,
-                                                const index_t output_dim,
-                                                DType* bottom_data_diff,
-                                                DType* bottom_trans_diff,
-                                                const DType* bottom_data,
-                                                const DType* bottom_rois,
-                                                const DType* bottom_trans,
-                                                const bool no_trans,
-                                                const DType trans_std,
-                                                const index_t sample_per_part,
-                                                const index_t group_size,
-                                                const index_t part_size,
-                                                const index_t num_classes,
-                                                const index_t channels_each_class) {
-    for (index_t index = 0; index < count; index++) {
-      // The output is in order (n, ctop, ph, pw)
-      index_t pw = index % pooled_width;
-      index_t ph = (index / pooled_width) % pooled_height;
-      index_t ctop = (index / pooled_width / pooled_height) % output_dim;
-      index_t n = index / pooled_width / pooled_height / output_dim;
-
-      // [start, end) interval for spatial sampling
-      const DType* offset_bottom_rois = bottom_rois + n * 5;
-      index_t roi_batch_ind = offset_bottom_rois[0];
-      DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
-      DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
-      DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
-      DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
-
-      // Force too small ROIs to be 1x1
-      DType roi_width = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
-      DType roi_height = max(roi_end_h - roi_start_h, static_cast<DType>(0.1));
-
-      // Compute w and h at bottom
-      DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
-      DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
-
-      DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
-      DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
-
-      index_t part_h = floor(static_cast<DType>(ph) / pooled_height * part_size);
-      index_t part_w = floor(static_cast<DType>(pw) / pooled_width * part_size);
-      index_t class_id = ctop / channels_each_class;
-      DType trans_x = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-      DType trans_y = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2 + 1)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-
-      DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
-      wstart += trans_x * roi_width;
-      DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
-      hstart += trans_y * roi_height;
-
-      if (top_count[index] <= 0) {
-        continue;
-      }
-      DType diff_val = top_diff[index] / top_count[index];
-      const DType* offset_bottom_data = bottom_data + roi_batch_ind * channels * height * width;
-      DType* offset_bottom_data_diff = bottom_data_diff + roi_batch_ind * channels * height * width;
-      index_t gw = floor(static_cast<DType>(pw)* group_size / pooled_width);
-      index_t gh = floor(static_cast<DType>(ph)* group_size / pooled_height);
-      gw = min(max(gw, static_cast<index_t>(0)), group_size - 1);
-      gh = min(max(gh, static_cast<index_t>(0)), group_size - 1);
-
-      for (index_t ih = 0; ih < sample_per_part; ih++) {
-        for (index_t iw = 0; iw < sample_per_part; iw++) {
-          DType w = wstart + iw * sub_bin_size_w;
-          DType h = hstart + ih * sub_bin_size_h;
-          // bilinear interpolation
-          if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
-            continue;
-          }
-          w = min(max(w, static_cast<DType>(0)), static_cast<DType>(width - 1));
-          h = min(max(h, static_cast<DType>(0)), static_cast<DType>(height - 1));
-          index_t c = (ctop * group_size + gh) * group_size + gw;
-          // backward on feature
-          index_t x0 = floor(w);
-          index_t x1 = ceil(w);
-          index_t y0 = floor(h);
-          index_t y1 = ceil(h);
-          DType dist_x = w - x0, dist_y = h - y0;
-          DType q00 = (1 - dist_x) * (1 - dist_y);
-          DType q01 = (1 - dist_x) * dist_y;
-          DType q10 = dist_x * (1 - dist_y);
-          DType q11 = dist_x * dist_y;
-          index_t bottom_index_base = c * height * width;
-          offset_bottom_data_diff[bottom_index_base + y0 * width + x0] += q00 * diff_val;
-          offset_bottom_data_diff[bottom_index_base + y1 * width + x0] += q01 * diff_val;
-          offset_bottom_data_diff[bottom_index_base + y0 * width + x1] += q10 * diff_val;
-          offset_bottom_data_diff[bottom_index_base + y1 * width + x1] += q11 * diff_val;
-
-          if (no_trans) {
-            continue;
-          }
-          DType U00 = offset_bottom_data[bottom_index_base + y0 * width + x0];
-          DType U01 = offset_bottom_data[bottom_index_base + y1 * width + x0];
-          DType U10 = offset_bottom_data[bottom_index_base + y0 * width + x1];
-          DType U11 = offset_bottom_data[bottom_index_base + y1 * width + x1];
-          DType diff_x = U11 * dist_y + U10 * (1 - dist_y) - U01 * dist_y - U00 * (1 - dist_y);
-          diff_x *= trans_std * diff_val * roi_width;
-          DType diff_y = U11 * dist_x + U01 * (1 - dist_x) - U10 * dist_x - U00 * (1 - dist_x);
-          diff_y *= trans_std * diff_val * roi_height;
-
-          index_t offset_trans_diff = (((n * num_classes + class_id) * 2)
-            * part_size + part_h) * part_size + part_w;
-          bottom_trans_diff[offset_trans_diff] += diff_x;
-          bottom_trans_diff[offset_trans_diff + part_size * part_size] += diff_y;
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolForward(const Tensor<cpu, 4, DType>& out,
+                                       const Tensor<cpu, 4, DType>& data,
+                                       const Tensor<cpu, 2, DType>& bbox,
+                                       const Tensor<cpu, 4, DType>& trans,
+                                       const Tensor<cpu, 4, DType>& top_count,
+                                       const bool no_trans,
+                                       const float spatial_scale,
+                                       const index_t output_dim,
+                                       const index_t group_size,
+                                       const index_t pooled_size,
+                                       const index_t part_size,
+                                       const index_t sample_per_part,
+                                       const float trans_std) {
+  const DType* bottom_data          = data.dptr_;
+  const DType* bottom_rois          = bbox.dptr_;
+  const DType* bottom_trans         = no_trans ? nullptr : trans.dptr_;
+  DType* top_data                   = out.dptr_;
+  DType* top_count_data             = top_count.dptr_;
+  const index_t count               = out.shape_.Size();
+  const index_t channels            = data.size(1);
+  const index_t height              = data.size(2);
+  const index_t width               = data.size(3);
+  const index_t pooled_height       = pooled_size;
+  const index_t pooled_width        = pooled_size;
+  const index_t num_classes         = no_trans ? 1 : trans.size(1) / 2;
+  const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
+  DeformablePSROIPoolForwardCPU<DType>(count,
+                                       bottom_data,
+                                       spatial_scale,
+                                       channels,
+                                       height,
+                                       width,
+                                       pooled_height,
+                                       pooled_width,
+                                       bottom_rois,
+                                       bottom_trans,
+                                       no_trans,
+                                       trans_std,
+                                       sample_per_part,
+                                       output_dim,
+                                       group_size,
+                                       part_size,
+                                       num_classes,
+                                       channels_each_class,
+                                       top_data,
+                                       top_count_data);
+
+  return;
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolBackwardAccCPU(const index_t count,
+                                              const DType* top_diff,
+                                              const DType* top_count,
+                                              const index_t num_rois,
+                                              const DType spatial_scale,
+                                              const index_t channels,
+                                              const index_t height,
+                                              const index_t width,
+                                              const index_t pooled_height,
+                                              const index_t pooled_width,
+                                              const index_t output_dim,
+                                              DType* bottom_data_diff,
+                                              DType* bottom_trans_diff,
+                                              const DType* bottom_data,
+                                              const DType* bottom_rois,
+                                              const DType* bottom_trans,
+                                              const bool no_trans,
+                                              const DType trans_std,
+                                              const index_t sample_per_part,
+                                              const index_t group_size,
+                                              const index_t part_size,
+                                              const index_t num_classes,
+                                              const index_t channels_each_class) {
+  for (index_t index = 0; index < count; index++) {
+    // The output is in order (n, ctop, ph, pw)
+    index_t pw   = index % pooled_width;
+    index_t ph   = (index / pooled_width) % pooled_height;
+    index_t ctop = (index / pooled_width / pooled_height) % output_dim;
+    index_t n    = index / pooled_width / pooled_height / output_dim;
+
+    // [start, end) interval for spatial sampling
+    const DType* offset_bottom_rois = bottom_rois + n * 5;
+    index_t roi_batch_ind           = offset_bottom_rois[0];
+    DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
+    DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
+
+    // Force too small ROIs to be 1x1
+    DType roi_width  = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
+    DType roi_height = max(roi_end_h - roi_start_h, static_cast<DType>(0.1));
+
+    // Compute w and h at bottom
+    DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
+    DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
+
+    DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
+    DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
+
+    index_t part_h   = floor(static_cast<DType>(ph) / pooled_height * part_size);
+    index_t part_w   = floor(static_cast<DType>(pw) / pooled_width * part_size);
+    index_t class_id = ctop / channels_each_class;
+    DType trans_x =
+        no_trans
+            ? static_cast<DType>(0)
+            : bottom_trans[(((n * num_classes + class_id) * 2) * part_size + part_h) * part_size +
+                           part_w] *
+                  trans_std;
+    DType trans_y =
+        no_trans ? static_cast<DType>(0)
+                 : bottom_trans[(((n * num_classes + class_id) * 2 + 1) * part_size + part_h) *
+                                    part_size +
+                                part_w] *
+                       trans_std;
+
+    DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
+    wstart += trans_x * roi_width;
+    DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
+    hstart += trans_y * roi_height;
+
+    if (top_count[index] <= 0) {
+      continue;
+    }
+    DType diff_val                  = top_diff[index] / top_count[index];
+    const DType* offset_bottom_data = bottom_data + roi_batch_ind * channels * height * width;
+    DType* offset_bottom_data_diff  = bottom_data_diff + roi_batch_ind * channels * height * width;
+    index_t gw                      = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    index_t gh                      = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw                              = min(max(gw, static_cast<index_t>(0)), group_size - 1);
+    gh                              = min(max(gh, static_cast<index_t>(0)), group_size - 1);
+
+    for (index_t ih = 0; ih < sample_per_part; ih++) {
+      for (index_t iw = 0; iw < sample_per_part; iw++) {
+        DType w = wstart + iw * sub_bin_size_w;
+        DType h = hstart + ih * sub_bin_size_h;
+        // bilinear interpolation
+        if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
+          continue;
+        }
+        w         = min(max(w, static_cast<DType>(0)), static_cast<DType>(width - 1));
+        h         = min(max(h, static_cast<DType>(0)), static_cast<DType>(height - 1));
+        index_t c = (ctop * group_size + gh) * group_size + gw;
+        // backward on feature
+        index_t x0   = floor(w);
+        index_t x1   = ceil(w);
+        index_t y0   = floor(h);
+        index_t y1   = ceil(h);
+        DType dist_x = w - x0, dist_y = h - y0;
+        DType q00                 = (1 - dist_x) * (1 - dist_y);
+        DType q01                 = (1 - dist_x) * dist_y;
+        DType q10                 = dist_x * (1 - dist_y);
+        DType q11                 = dist_x * dist_y;
+        index_t bottom_index_base = c * height * width;
+        offset_bottom_data_diff[bottom_index_base + y0 * width + x0] += q00 * diff_val;
+        offset_bottom_data_diff[bottom_index_base + y1 * width + x0] += q01 * diff_val;
+        offset_bottom_data_diff[bottom_index_base + y0 * width + x1] += q10 * diff_val;
+        offset_bottom_data_diff[bottom_index_base + y1 * width + x1] += q11 * diff_val;
+
+        if (no_trans) {
+          continue;
         }
+        DType U00    = offset_bottom_data[bottom_index_base + y0 * width + x0];
+        DType U01    = offset_bottom_data[bottom_index_base + y1 * width + x0];
+        DType U10    = offset_bottom_data[bottom_index_base + y0 * width + x1];
+        DType U11    = offset_bottom_data[bottom_index_base + y1 * width + x1];
+        DType diff_x = U11 * dist_y + U10 * (1 - dist_y) - U01 * dist_y - U00 * (1 - dist_y);
+        diff_x *= trans_std * diff_val * roi_width;
+        DType diff_y = U11 * dist_x + U01 * (1 - dist_x) - U10 * dist_x - U00 * (1 - dist_x);
+        diff_y *= trans_std * diff_val * roi_height;
+
+        index_t offset_trans_diff =
+            (((n * num_classes + class_id) * 2) * part_size + part_h) * part_size + part_w;
+        bottom_trans_diff[offset_trans_diff] += diff_x;
+        bottom_trans_diff[offset_trans_diff + part_size * part_size] += diff_y;
       }
     }
   }
-
-  template<typename DType>
-  inline void DeformablePSROIPoolBackwardAcc(const Tensor<cpu, 4, DType> &in_grad,
-                                             const Tensor<cpu, 4, DType> &trans_grad,
-                                             const Tensor<cpu, 4, DType> &out_grad,
-                                             const Tensor<cpu, 4, DType> &data,
-                                             const Tensor<cpu, 2, DType> &bbox,
-                                             const Tensor<cpu, 4, DType> &trans,
-                                             const Tensor<cpu, 4, DType> &top_count,
-                                             const bool no_trans, const float spatial_scale,
-                                             const index_t output_dim, const index_t group_size,
-                                             const index_t pooled_size, const index_t part_size,
-                                             const index_t sample_per_part, const float trans_std) {
-    const DType *top_diff = out_grad.dptr_;
-    const DType *bottom_data = data.dptr_;
-    const DType *bottom_rois = bbox.dptr_;
-    const DType *bottom_trans = no_trans ? nullptr : trans.dptr_;
-    DType *bottom_data_diff = in_grad.dptr_;
-    DType *bottom_trans_diff = no_trans ? nullptr : trans_grad.dptr_;
-    const DType *top_count_data = top_count.dptr_;
-    const index_t count = out_grad.shape_.Size();
-    const index_t num_rois = bbox.size(0);
-    const index_t channels = in_grad.size(1);
-    const index_t height = in_grad.size(2);
-    const index_t width = in_grad.size(3);
-    const index_t pooled_height = pooled_size;
-    const index_t pooled_width = pooled_size;
-    const index_t num_classes = no_trans ? 1 : trans_grad.size(1) / 2;
-    const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
-    DeformablePSROIPoolBackwardAccCPU<DType>(count, top_diff, top_count_data, num_rois,
-                                             spatial_scale, channels, height, width,
-                                             pooled_height, pooled_width, output_dim,
-                                             bottom_data_diff, bottom_trans_diff,
-                                             bottom_data, bottom_rois, bottom_trans,
-                                             no_trans, trans_std, sample_per_part,
-                                             group_size, part_size, num_classes,
-                                             channels_each_class);
-
-    return;
-  }
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolBackwardAcc(const Tensor<cpu, 4, DType>& in_grad,
+                                           const Tensor<cpu, 4, DType>& trans_grad,
+                                           const Tensor<cpu, 4, DType>& out_grad,
+                                           const Tensor<cpu, 4, DType>& data,
+                                           const Tensor<cpu, 2, DType>& bbox,
+                                           const Tensor<cpu, 4, DType>& trans,
+                                           const Tensor<cpu, 4, DType>& top_count,
+                                           const bool no_trans,
+                                           const float spatial_scale,
+                                           const index_t output_dim,
+                                           const index_t group_size,
+                                           const index_t pooled_size,
+                                           const index_t part_size,
+                                           const index_t sample_per_part,
+                                           const float trans_std) {
+  const DType* top_diff             = out_grad.dptr_;
+  const DType* bottom_data          = data.dptr_;
+  const DType* bottom_rois          = bbox.dptr_;
+  const DType* bottom_trans         = no_trans ? nullptr : trans.dptr_;
+  DType* bottom_data_diff           = in_grad.dptr_;
+  DType* bottom_trans_diff          = no_trans ? nullptr : trans_grad.dptr_;
+  const DType* top_count_data       = top_count.dptr_;
+  const index_t count               = out_grad.shape_.Size();
+  const index_t num_rois            = bbox.size(0);
+  const index_t channels            = in_grad.size(1);
+  const index_t height              = in_grad.size(2);
+  const index_t width               = in_grad.size(3);
+  const index_t pooled_height       = pooled_size;
+  const index_t pooled_width        = pooled_size;
+  const index_t num_classes         = no_trans ? 1 : trans_grad.size(1) / 2;
+  const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
+  DeformablePSROIPoolBackwardAccCPU<DType>(count,
+                                           top_diff,
+                                           top_count_data,
+                                           num_rois,
+                                           spatial_scale,
+                                           channels,
+                                           height,
+                                           width,
+                                           pooled_height,
+                                           pooled_width,
+                                           output_dim,
+                                           bottom_data_diff,
+                                           bottom_trans_diff,
+                                           bottom_data,
+                                           bottom_rois,
+                                           bottom_trans,
+                                           no_trans,
+                                           trans_std,
+                                           sample_per_part,
+                                           group_size,
+                                           part_size,
+                                           num_classes,
+                                           channels_each_class);
+
+  return;
+}
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
 
-  template<>
-  Operator *CreateOp<cpu>(DeformablePSROIPoolingParam param, int dtype) {
-    Operator* op = nullptr;
-    MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      op = new DeformablePSROIPoolingOp<cpu, DType>(param);
-    });
-    return op;
-  }
-
-  Operator *DeformablePSROIPoolingProp::CreateOperatorEx(Context ctx,
-                                                         mxnet::ShapeVector *in_shape,
-                                                         std::vector<int> *in_type) const {
-    mxnet::ShapeVector out_shape, aux_shape;
-    std::vector<int> out_type, aux_type;
-    CHECK(InferType(in_type, &out_type, &aux_type));
-    CHECK(InferShape(in_shape, &out_shape, &aux_shape));
-    DO_BIND_DISPATCH(CreateOp, param_, in_type->at(0));
-  }
-
-  DMLC_REGISTER_PARAMETER(DeformablePSROIPoolingParam);
-
-  MXNET_REGISTER_OP_PROPERTY(_contrib_DeformablePSROIPooling, DeformablePSROIPoolingProp)
-    .describe("Performs deformable position-sensitive region-of-interest pooling on inputs.\n"
-      "The DeformablePSROIPooling operation is described in https://arxiv.org/abs/1703.06211 ."
-      "batch_size will change to the number of region bounding boxes after DeformablePSROIPooling")
+template <>
+Operator* CreateOp<cpu>(DeformablePSROIPoolingParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new DeformablePSROIPoolingOp<cpu, DType>(param); });
+  return op;
+}
+
+Operator* DeformablePSROIPoolingProp::CreateOperatorEx(Context ctx,
+                                                       mxnet::ShapeVector* in_shape,
+                                                       std::vector<int>* in_type) const {
+  mxnet::ShapeVector out_shape, aux_shape;
+  std::vector<int> out_type, aux_type;
+  CHECK(InferType(in_type, &out_type, &aux_type));
+  CHECK(InferShape(in_shape, &out_shape, &aux_shape));
+  DO_BIND_DISPATCH(CreateOp, param_, in_type->at(0));
+}
+
+DMLC_REGISTER_PARAMETER(DeformablePSROIPoolingParam);
+
+MXNET_REGISTER_OP_PROPERTY(_contrib_DeformablePSROIPooling, DeformablePSROIPoolingProp)
+    .describe(
+        "Performs deformable position-sensitive region-of-interest pooling on inputs.\n"
+        "The DeformablePSROIPooling operation is described in https://arxiv.org/abs/1703.06211 ."
+        "batch_size will change to the number of region bounding boxes after "
+        "DeformablePSROIPooling")
     .add_argument("data", "Symbol", "Input data to the pooling operator, a 4D Feature maps")
-    .add_argument("rois", "Symbol", "Bounding box coordinates, a 2D array of "
-      "[[batch_index, x1, y1, x2, y2]]. (x1, y1) and (x2, y2) are top left and down right corners "
-      "of designated region of interest. batch_index indicates the index of corresponding image "
-      "in the input data")
+    .add_argument(
+        "rois",
+        "Symbol",
+        "Bounding box coordinates, a 2D array of "
+        "[[batch_index, x1, y1, x2, y2]]. (x1, y1) and (x2, y2) are top left and down right "
+        "corners "
+        "of designated region of interest. batch_index indicates the index of corresponding image "
+        "in the input data")
     .add_argument("trans", "Symbol", "transition parameter")
     .add_arguments(DeformablePSROIPoolingParam::__FIELDS__());
 }  // namespace op
diff --git a/src/operator/contrib/deformable_psroi_pooling.cu b/src/operator/contrib/deformable_psroi_pooling.cu
index 2206b5aa67b3..b1888ad6098f 100644
--- a/src/operator/contrib/deformable_psroi_pooling.cu
+++ b/src/operator/contrib/deformable_psroi_pooling.cu
@@ -23,7 +23,7 @@
  * \file deformable_psroi_pooling.cu
  * \brief
  * \author Yi Li, Guodong Zhang, Jifeng Dai
-*/
+ */
 #include "./deformable_psroi_pooling-inl.h"
 #include <mshadow/tensor.h>
 #include <mshadow/cuda/reduce.cuh>
@@ -32,381 +32,458 @@
 #include "../../common/cuda/utils.h"
 #include "../mxnet_op.h"
 
-#define DeformablePSROIPOOLING_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define DeformablePSROIPOOLING_CUDA_CHECK(condition)                  \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
   } while (0)
 
 namespace mshadow {
 namespace cuda {
-  template <typename DType>
-  __device__ DType bilinear_interp(const DType* data,
-                                   const DType x, const DType y,
-                                   const index_t width, const index_t height) {
-    index_t x1 = floor(x);
-    index_t x2 = ceil(x);
-    index_t y1 = floor(y);
-    index_t y2 = ceil(y);
-    DType dist_x = static_cast<DType>(x - x1);
-    DType dist_y = static_cast<DType>(y - y1);
-    DType value11 = data[y1 * width + x1];
-    DType value12 = data[y2 * width + x1];
-    DType value21 = data[y1 * width + x2];
-    DType value22 = data[y2 * width + x2];
-    DType value = (1 - dist_x) * (1 - dist_y) * value11 + (1 - dist_x) * dist_y * value12 +
-      dist_x * (1 - dist_y) * value21 + dist_x * dist_y * value22;
-    return value;
-  }
-
-  template <typename DType>
-  __global__ void DeformablePSROIPoolForwardKernel(const index_t count,
-                                                   const DType* bottom_data,
-                                                   const DType spatial_scale,
-                                                   const index_t channels,
-                                                   const index_t height, const index_t width,
-                                                   const index_t pooled_height,
-                                                   const index_t pooled_width,
-                                                   const DType* bottom_rois,
-                                                   const DType* bottom_trans,
-                                                   const bool no_trans, const DType trans_std,
-                                                   const index_t sample_per_part,
-                                                   const index_t output_dim,
-                                                   const index_t group_size,
-                                                   const index_t part_size,
-                                                   const index_t num_classes,
-                                                   const index_t channels_each_class,
-                                                   DType* top_data, DType* top_count) {
-    CUDA_KERNEL_LOOP(index, count) {
-      // The output is in order (n, ctop, ph, pw)
-      index_t pw = index % pooled_width;
-      index_t ph = (index / pooled_width) % pooled_height;
-      index_t ctop = (index / pooled_width / pooled_height) % output_dim;
-      index_t n = index / pooled_width / pooled_height / output_dim;
-
-      // [start, end) interval for spatial sampling
-      const DType* offset_bottom_rois = bottom_rois + n * 5;
-      index_t roi_batch_ind = offset_bottom_rois[0];
-      DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
-      DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
-      DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
-      DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
-
-      // Force too small ROIs to be 1x1
-      DType roi_width = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
-      DType roi_height = max(roi_end_h - roi_start_h, 0.1);
-
-      // Compute w and h at bottom
-      DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
-      DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
-
-      DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
-      DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
-
-      index_t part_h = floor(static_cast<DType>(ph) / pooled_height * part_size);
-      index_t part_w = floor(static_cast<DType>(pw) / pooled_width * part_size);
-      index_t class_id = ctop / channels_each_class;
-      DType trans_x = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-      DType trans_y = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2 + 1)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-
-      DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
-      wstart += trans_x * roi_width;
-      DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
-      hstart += trans_y * roi_height;
-
-      DType sum = 0;
-      index_t count = 0;
-      index_t gw = floor(static_cast<DType>(pw) * group_size / pooled_width);
-      index_t gh = floor(static_cast<DType>(ph) * group_size / pooled_height);
-      gw = min(max(gw, static_cast<index_t>(0)), group_size - 1);
-      gh = min(max(gh, static_cast<index_t>(0)), group_size - 1);
-
-      const DType* offset_bottom_data = bottom_data + (roi_batch_ind * channels) * height * width;
-      for (index_t ih = 0; ih < sample_per_part; ih++) {
-        for (index_t iw = 0; iw < sample_per_part; iw++) {
-          DType w = wstart + iw * sub_bin_size_w;
-          DType h = hstart + ih * sub_bin_size_h;
-          // bilinear interpolation
-          if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
-            continue;
-          }
-          w = min(max(w, 0.), width - 1.);
-          h = min(max(h, 0.), height - 1.);
-          index_t c = (ctop * group_size + gh) * group_size + gw;
-          DType val = bilinear_interp(offset_bottom_data + c * height * width,
-                                      w, h, width, height);
-          sum += val;
-          count++;
+template <typename DType>
+__device__ DType bilinear_interp(const DType* data,
+                                 const DType x,
+                                 const DType y,
+                                 const index_t width,
+                                 const index_t height) {
+  index_t x1    = floor(x);
+  index_t x2    = ceil(x);
+  index_t y1    = floor(y);
+  index_t y2    = ceil(y);
+  DType dist_x  = static_cast<DType>(x - x1);
+  DType dist_y  = static_cast<DType>(y - y1);
+  DType value11 = data[y1 * width + x1];
+  DType value12 = data[y2 * width + x1];
+  DType value21 = data[y1 * width + x2];
+  DType value22 = data[y2 * width + x2];
+  DType value   = (1 - dist_x) * (1 - dist_y) * value11 + (1 - dist_x) * dist_y * value12 +
+                dist_x * (1 - dist_y) * value21 + dist_x * dist_y * value22;
+  return value;
+}
+
+template <typename DType>
+__global__ void DeformablePSROIPoolForwardKernel(const index_t count,
+                                                 const DType* bottom_data,
+                                                 const DType spatial_scale,
+                                                 const index_t channels,
+                                                 const index_t height,
+                                                 const index_t width,
+                                                 const index_t pooled_height,
+                                                 const index_t pooled_width,
+                                                 const DType* bottom_rois,
+                                                 const DType* bottom_trans,
+                                                 const bool no_trans,
+                                                 const DType trans_std,
+                                                 const index_t sample_per_part,
+                                                 const index_t output_dim,
+                                                 const index_t group_size,
+                                                 const index_t part_size,
+                                                 const index_t num_classes,
+                                                 const index_t channels_each_class,
+                                                 DType* top_data,
+                                                 DType* top_count) {
+  CUDA_KERNEL_LOOP(index, count) {
+    // The output is in order (n, ctop, ph, pw)
+    index_t pw   = index % pooled_width;
+    index_t ph   = (index / pooled_width) % pooled_height;
+    index_t ctop = (index / pooled_width / pooled_height) % output_dim;
+    index_t n    = index / pooled_width / pooled_height / output_dim;
+
+    // [start, end) interval for spatial sampling
+    const DType* offset_bottom_rois = bottom_rois + n * 5;
+    index_t roi_batch_ind           = offset_bottom_rois[0];
+    DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
+    DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
+
+    // Force too small ROIs to be 1x1
+    DType roi_width  = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
+    DType roi_height = max(roi_end_h - roi_start_h, 0.1);
+
+    // Compute w and h at bottom
+    DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
+    DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
+
+    DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
+    DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
+
+    index_t part_h   = floor(static_cast<DType>(ph) / pooled_height * part_size);
+    index_t part_w   = floor(static_cast<DType>(pw) / pooled_width * part_size);
+    index_t class_id = ctop / channels_each_class;
+    DType trans_x =
+        no_trans
+            ? static_cast<DType>(0)
+            : bottom_trans[(((n * num_classes + class_id) * 2) * part_size + part_h) * part_size +
+                           part_w] *
+                  trans_std;
+    DType trans_y =
+        no_trans ? static_cast<DType>(0)
+                 : bottom_trans[(((n * num_classes + class_id) * 2 + 1) * part_size + part_h) *
+                                    part_size +
+                                part_w] *
+                       trans_std;
+
+    DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
+    wstart += trans_x * roi_width;
+    DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
+    hstart += trans_y * roi_height;
+
+    DType sum     = 0;
+    index_t count = 0;
+    index_t gw    = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    index_t gh    = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw            = min(max(gw, static_cast<index_t>(0)), group_size - 1);
+    gh            = min(max(gh, static_cast<index_t>(0)), group_size - 1);
+
+    const DType* offset_bottom_data = bottom_data + (roi_batch_ind * channels) * height * width;
+    for (index_t ih = 0; ih < sample_per_part; ih++) {
+      for (index_t iw = 0; iw < sample_per_part; iw++) {
+        DType w = wstart + iw * sub_bin_size_w;
+        DType h = hstart + ih * sub_bin_size_h;
+        // bilinear interpolation
+        if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
+          continue;
         }
+        w         = min(max(w, 0.), width - 1.);
+        h         = min(max(h, 0.), height - 1.);
+        index_t c = (ctop * group_size + gh) * group_size + gw;
+        DType val = bilinear_interp(offset_bottom_data + c * height * width, w, h, width, height);
+        sum += val;
+        count++;
       }
-      top_data[index] = count == 0 ? static_cast<DType>(0) : sum / count;
-      top_count[index] = count;
     }
+    top_data[index]  = count == 0 ? static_cast<DType>(0) : sum / count;
+    top_count[index] = count;
   }
-
-  template<typename DType>
-  inline void DeformablePSROIPoolForward(const Tensor<gpu, 4, DType> &out,
-                                         const Tensor<gpu, 4, DType> &data,
-                                         const Tensor<gpu, 2, DType> &bbox,
-                                         const Tensor<gpu, 4, DType> &trans,
-                                         const Tensor<gpu, 4, DType> &top_count,
-                                         const bool no_trans, const float spatial_scale,
-                                         const index_t output_dim, const index_t group_size,
-                                         const index_t pooled_size, const index_t part_size,
-                                         const index_t sample_per_part, const float trans_std) {
-    const DType *bottom_data = data.dptr_;
-    const DType *bottom_rois = bbox.dptr_;
-    const DType *bottom_trans = no_trans ? nullptr : trans.dptr_;
-    DType *top_data = out.dptr_;
-    DType *top_count_data = top_count.dptr_;
-    const index_t count = out.shape_.Size();
-    const index_t channels = data.size(1);
-    const index_t height = data.size(2);
-    const index_t width = data.size(3);
-    const index_t pooled_height = pooled_size;
-    const index_t pooled_width = pooled_size;
-    const index_t num_classes = no_trans ? 1 : trans.size(1) / 2;
-    const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
-
-    cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
-    DeformablePSROIPoolForwardKernel<DType><<<
-      mxnet::op::mxnet_op::cuda_get_num_blocks(count), kBaseThreadNum,
-      0, stream>>>(count, bottom_data, spatial_scale, channels, height, width,
-                   pooled_height, pooled_width, bottom_rois, bottom_trans,
-                   no_trans, trans_std, sample_per_part, output_dim,
-                   group_size, part_size, num_classes,
-                   channels_each_class, top_data, top_count_data);
-    DeformablePSROIPOOLING_CUDA_CHECK(cudaGetLastError());
-  }
-
-
-  template <typename DType>
-  __global__ void DeformablePSROIPoolBackwardAccKernel(const index_t count,
-                                                       const DType* top_diff,
-                                                       const DType* top_count,
-                                                       const index_t num_rois,
-                                                       const DType spatial_scale,
-                                                       const index_t channels,
-                                                       const index_t height,
-                                                       const index_t width,
-                                                       const index_t pooled_height,
-                                                       const index_t pooled_width,
-                                                       const index_t output_dim,
-                                                       DType* bottom_data_diff,
-                                                       DType* bottom_trans_diff,
-                                                       const DType* bottom_data,
-                                                       const DType* bottom_rois,
-                                                       const DType* bottom_trans,
-                                                       const bool no_trans,
-                                                       const DType trans_std,
-                                                       const index_t sample_per_part,
-                                                       const index_t group_size,
-                                                       const index_t part_size,
-                                                       const index_t num_classes,
-                                                       const index_t channels_each_class) {
-    CUDA_KERNEL_LOOP(index, count) {
-      // The output is in order (n, ctop, ph, pw)
-      index_t pw = index % pooled_width;
-      index_t ph = (index / pooled_width) % pooled_height;
-      index_t ctop = (index / pooled_width / pooled_height) % output_dim;
-      index_t n = index / pooled_width / pooled_height / output_dim;
-
-      // [start, end) interval for spatial sampling
-      const DType* offset_bottom_rois = bottom_rois + n * 5;
-      index_t roi_batch_ind = offset_bottom_rois[0];
-      DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
-      DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
-      DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
-      DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
-
-      // Force too small ROIs to be 1x1
-      DType roi_width = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
-      DType roi_height = max(roi_end_h - roi_start_h, 0.1);
-
-      // Compute w and h at bottom
-      DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
-      DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
-
-      DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
-      DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
-
-      index_t part_h = floor(static_cast<DType>(ph) / pooled_height * part_size);
-      index_t part_w = floor(static_cast<DType>(pw) / pooled_width * part_size);
-      index_t class_id = ctop / channels_each_class;
-      DType trans_x = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-      DType trans_y = no_trans ? static_cast<DType>(0) :
-        bottom_trans[(((n * num_classes + class_id) * 2 + 1)
-                        * part_size + part_h)
-                        * part_size + part_w] * trans_std;
-
-      DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
-      wstart += trans_x * roi_width;
-      DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
-      hstart += trans_y * roi_height;
-
-      if (top_count[index] <= 0) {
-        continue;
-      }
-      DType diff_val = top_diff[index] / top_count[index];
-      const DType* offset_bottom_data = bottom_data + roi_batch_ind * channels * height * width;
-      DType* offset_bottom_data_diff = bottom_data_diff + roi_batch_ind * channels * height * width;
-      index_t gw = floor(static_cast<DType>(pw) * group_size / pooled_width);
-      index_t gh = floor(static_cast<DType>(ph) * group_size / pooled_height);
-      gw = min(max(gw, static_cast<index_t>(0)), group_size - 1);
-      gh = min(max(gh, static_cast<index_t>(0)), group_size - 1);
-
-      for (index_t ih = 0; ih < sample_per_part; ih++) {
-        for (index_t iw = 0; iw < sample_per_part; iw++) {
-          DType w = wstart + iw * sub_bin_size_w;
-          DType h = hstart + ih * sub_bin_size_h;
-          // bilinear interpolation
-          if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
-            continue;
-          }
-          w = min(max(w, 0.), width - 1.);
-          h = min(max(h, 0.), height - 1.);
-          index_t c = (ctop * group_size + gh) * group_size + gw;
-          // backward on feature
-          index_t x0 = floor(w);
-          index_t x1 = ceil(w);
-          index_t y0 = floor(h);
-          index_t y1 = ceil(h);
-          DType dist_x = w - x0, dist_y = h - y0;
-          DType q00 = (1 - dist_x) * (1 - dist_y);
-          DType q01 = (1 - dist_x) * dist_y;
-          DType q10 = dist_x * (1 - dist_y);
-          DType q11 = dist_x * dist_y;
-          index_t bottom_index_base = c * height * width;
-          atomicAdd(offset_bottom_data_diff + bottom_index_base + y0 * width + x0, q00 * diff_val);
-          atomicAdd(offset_bottom_data_diff + bottom_index_base + y1 * width + x0, q01 * diff_val);
-          atomicAdd(offset_bottom_data_diff + bottom_index_base + y0 * width + x1, q10 * diff_val);
-          atomicAdd(offset_bottom_data_diff + bottom_index_base + y1 * width + x1, q11 * diff_val);
-
-          if (no_trans) {
-            continue;
-          }
-          DType U00 = offset_bottom_data[bottom_index_base + y0 * width + x0];
-          DType U01 = offset_bottom_data[bottom_index_base + y1 * width + x0];
-          DType U10 = offset_bottom_data[bottom_index_base + y0 * width + x1];
-          DType U11 = offset_bottom_data[bottom_index_base + y1 * width + x1];
-          DType diff_x = U11 * dist_y + U10 * (1 - dist_y) - U01 * dist_y - U00 * (1 - dist_y);
-          diff_x *= trans_std * diff_val * roi_width;
-          DType diff_y = U11 * dist_x + U01 * (1 - dist_x) - U10 * dist_x - U00 * (1 - dist_x);
-          diff_y *= trans_std * diff_val * roi_height;
-
-          atomicAdd(bottom_trans_diff + (((n * num_classes + class_id) * 2)
-                                           * part_size + part_h)
-                                           * part_size + part_w, diff_x);
-          atomicAdd(bottom_trans_diff + (((n * num_classes + class_id) * 2 + 1)
-                                           * part_size + part_h)
-                                           * part_size + part_w, diff_y);
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolForward(const Tensor<gpu, 4, DType>& out,
+                                       const Tensor<gpu, 4, DType>& data,
+                                       const Tensor<gpu, 2, DType>& bbox,
+                                       const Tensor<gpu, 4, DType>& trans,
+                                       const Tensor<gpu, 4, DType>& top_count,
+                                       const bool no_trans,
+                                       const float spatial_scale,
+                                       const index_t output_dim,
+                                       const index_t group_size,
+                                       const index_t pooled_size,
+                                       const index_t part_size,
+                                       const index_t sample_per_part,
+                                       const float trans_std) {
+  const DType* bottom_data          = data.dptr_;
+  const DType* bottom_rois          = bbox.dptr_;
+  const DType* bottom_trans         = no_trans ? nullptr : trans.dptr_;
+  DType* top_data                   = out.dptr_;
+  DType* top_count_data             = top_count.dptr_;
+  const index_t count               = out.shape_.Size();
+  const index_t channels            = data.size(1);
+  const index_t height              = data.size(2);
+  const index_t width               = data.size(3);
+  const index_t pooled_height       = pooled_size;
+  const index_t pooled_width        = pooled_size;
+  const index_t num_classes         = no_trans ? 1 : trans.size(1) / 2;
+  const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
+
+  cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
+  DeformablePSROIPoolForwardKernel<DType>
+      <<<mxnet::op::mxnet_op::cuda_get_num_blocks(count), kBaseThreadNum, 0, stream>>>(
+          count,
+          bottom_data,
+          spatial_scale,
+          channels,
+          height,
+          width,
+          pooled_height,
+          pooled_width,
+          bottom_rois,
+          bottom_trans,
+          no_trans,
+          trans_std,
+          sample_per_part,
+          output_dim,
+          group_size,
+          part_size,
+          num_classes,
+          channels_each_class,
+          top_data,
+          top_count_data);
+  DeformablePSROIPOOLING_CUDA_CHECK(cudaGetLastError());
+}
+
+template <typename DType>
+__global__ void DeformablePSROIPoolBackwardAccKernel(const index_t count,
+                                                     const DType* top_diff,
+                                                     const DType* top_count,
+                                                     const index_t num_rois,
+                                                     const DType spatial_scale,
+                                                     const index_t channels,
+                                                     const index_t height,
+                                                     const index_t width,
+                                                     const index_t pooled_height,
+                                                     const index_t pooled_width,
+                                                     const index_t output_dim,
+                                                     DType* bottom_data_diff,
+                                                     DType* bottom_trans_diff,
+                                                     const DType* bottom_data,
+                                                     const DType* bottom_rois,
+                                                     const DType* bottom_trans,
+                                                     const bool no_trans,
+                                                     const DType trans_std,
+                                                     const index_t sample_per_part,
+                                                     const index_t group_size,
+                                                     const index_t part_size,
+                                                     const index_t num_classes,
+                                                     const index_t channels_each_class) {
+  CUDA_KERNEL_LOOP(index, count) {
+    // The output is in order (n, ctop, ph, pw)
+    index_t pw   = index % pooled_width;
+    index_t ph   = (index / pooled_width) % pooled_height;
+    index_t ctop = (index / pooled_width / pooled_height) % output_dim;
+    index_t n    = index / pooled_width / pooled_height / output_dim;
+
+    // [start, end) interval for spatial sampling
+    const DType* offset_bottom_rois = bottom_rois + n * 5;
+    index_t roi_batch_ind           = offset_bottom_rois[0];
+    DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale - 0.5;
+    DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale - 0.5;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale - 0.5;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale - 0.5;
+
+    // Force too small ROIs to be 1x1
+    DType roi_width  = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
+    DType roi_height = max(roi_end_h - roi_start_h, 0.1);
+
+    // Compute w and h at bottom
+    DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
+    DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
+
+    DType sub_bin_size_h = bin_size_h / static_cast<DType>(sample_per_part);
+    DType sub_bin_size_w = bin_size_w / static_cast<DType>(sample_per_part);
+
+    index_t part_h   = floor(static_cast<DType>(ph) / pooled_height * part_size);
+    index_t part_w   = floor(static_cast<DType>(pw) / pooled_width * part_size);
+    index_t class_id = ctop / channels_each_class;
+    DType trans_x =
+        no_trans
+            ? static_cast<DType>(0)
+            : bottom_trans[(((n * num_classes + class_id) * 2) * part_size + part_h) * part_size +
+                           part_w] *
+                  trans_std;
+    DType trans_y =
+        no_trans ? static_cast<DType>(0)
+                 : bottom_trans[(((n * num_classes + class_id) * 2 + 1) * part_size + part_h) *
+                                    part_size +
+                                part_w] *
+                       trans_std;
+
+    DType wstart = static_cast<DType>(pw) * bin_size_w + roi_start_w;
+    wstart += trans_x * roi_width;
+    DType hstart = static_cast<DType>(ph) * bin_size_h + roi_start_h;
+    hstart += trans_y * roi_height;
+
+    if (top_count[index] <= 0) {
+      continue;
+    }
+    DType diff_val                  = top_diff[index] / top_count[index];
+    const DType* offset_bottom_data = bottom_data + roi_batch_ind * channels * height * width;
+    DType* offset_bottom_data_diff  = bottom_data_diff + roi_batch_ind * channels * height * width;
+    index_t gw                      = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    index_t gh                      = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw                              = min(max(gw, static_cast<index_t>(0)), group_size - 1);
+    gh                              = min(max(gh, static_cast<index_t>(0)), group_size - 1);
+
+    for (index_t ih = 0; ih < sample_per_part; ih++) {
+      for (index_t iw = 0; iw < sample_per_part; iw++) {
+        DType w = wstart + iw * sub_bin_size_w;
+        DType h = hstart + ih * sub_bin_size_h;
+        // bilinear interpolation
+        if (w < -0.5 || w > width - 0.5 || h < -0.5 || h > height - 0.5) {
+          continue;
         }
+        w         = min(max(w, 0.), width - 1.);
+        h         = min(max(h, 0.), height - 1.);
+        index_t c = (ctop * group_size + gh) * group_size + gw;
+        // backward on feature
+        index_t x0   = floor(w);
+        index_t x1   = ceil(w);
+        index_t y0   = floor(h);
+        index_t y1   = ceil(h);
+        DType dist_x = w - x0, dist_y = h - y0;
+        DType q00                 = (1 - dist_x) * (1 - dist_y);
+        DType q01                 = (1 - dist_x) * dist_y;
+        DType q10                 = dist_x * (1 - dist_y);
+        DType q11                 = dist_x * dist_y;
+        index_t bottom_index_base = c * height * width;
+        atomicAdd(offset_bottom_data_diff + bottom_index_base + y0 * width + x0, q00 * diff_val);
+        atomicAdd(offset_bottom_data_diff + bottom_index_base + y1 * width + x0, q01 * diff_val);
+        atomicAdd(offset_bottom_data_diff + bottom_index_base + y0 * width + x1, q10 * diff_val);
+        atomicAdd(offset_bottom_data_diff + bottom_index_base + y1 * width + x1, q11 * diff_val);
+
+        if (no_trans) {
+          continue;
+        }
+        DType U00    = offset_bottom_data[bottom_index_base + y0 * width + x0];
+        DType U01    = offset_bottom_data[bottom_index_base + y1 * width + x0];
+        DType U10    = offset_bottom_data[bottom_index_base + y0 * width + x1];
+        DType U11    = offset_bottom_data[bottom_index_base + y1 * width + x1];
+        DType diff_x = U11 * dist_y + U10 * (1 - dist_y) - U01 * dist_y - U00 * (1 - dist_y);
+        diff_x *= trans_std * diff_val * roi_width;
+        DType diff_y = U11 * dist_x + U01 * (1 - dist_x) - U10 * dist_x - U00 * (1 - dist_x);
+        diff_y *= trans_std * diff_val * roi_height;
+
+        atomicAdd(bottom_trans_diff +
+                      (((n * num_classes + class_id) * 2) * part_size + part_h) * part_size +
+                      part_w,
+                  diff_x);
+        atomicAdd(bottom_trans_diff +
+                      (((n * num_classes + class_id) * 2 + 1) * part_size + part_h) * part_size +
+                      part_w,
+                  diff_y);
       }
     }
   }
-
-
-  template<typename DType>
-  inline void DeformablePSROIPoolBackwardAcc(const Tensor<gpu, 4, DType> &in_grad,
-                                             const Tensor<gpu, 4, DType> &trans_grad,
-                                             const Tensor<gpu, 4, DType> &out_grad,
-                                             const Tensor<gpu, 4, DType> &data,
-                                             const Tensor<gpu, 2, DType> &bbox,
-                                             const Tensor<gpu, 4, DType> &trans,
-                                             const Tensor<gpu, 4, DType> &top_count,
-                                             const bool no_trans, const float spatial_scale,
-                                             const index_t output_dim, const index_t group_size,
-                                             const index_t pooled_size, const index_t part_size,
-                                             const index_t sample_per_part, const float trans_std) {
-    const DType *top_diff = out_grad.dptr_;
-    const DType *bottom_data = data.dptr_;
-    const DType *bottom_rois = bbox.dptr_;
-    const DType *bottom_trans = no_trans ? nullptr : trans.dptr_;
-    DType *bottom_data_diff = in_grad.dptr_;
-    DType *bottom_trans_diff = no_trans ? nullptr : trans_grad.dptr_;
-    const DType *top_count_data = top_count.dptr_;
-    const index_t count = out_grad.shape_.Size();
-    const index_t num_rois = bbox.size(0);
-    const index_t channels = in_grad.size(1);
-    const index_t height = in_grad.size(2);
-    const index_t width = in_grad.size(3);
-    const index_t pooled_height = pooled_size;
-    const index_t pooled_width = pooled_size;
-    const index_t num_classes = no_trans ? 1 : trans_grad.size(1) / 2;
-    const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
-
-    cudaStream_t stream = Stream<gpu>::GetStream(in_grad.stream_);
-    DeformablePSROIPoolBackwardAccKernel<DType><<<
-      mxnet::op::mxnet_op::cuda_get_num_blocks(count), kBaseThreadNum,
-      0, stream >>>(count, top_diff, top_count_data, num_rois, spatial_scale,
-                    channels, height, width, pooled_height, pooled_width,
-                    output_dim, bottom_data_diff, bottom_trans_diff,
-                    bottom_data, bottom_rois, bottom_trans,
-                    no_trans, trans_std, sample_per_part, group_size,
-                    part_size, num_classes, channels_each_class);
-    DeformablePSROIPOOLING_CUDA_CHECK(cudaGetLastError());
-  }
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolBackwardAcc(const Tensor<gpu, 4, DType>& in_grad,
+                                           const Tensor<gpu, 4, DType>& trans_grad,
+                                           const Tensor<gpu, 4, DType>& out_grad,
+                                           const Tensor<gpu, 4, DType>& data,
+                                           const Tensor<gpu, 2, DType>& bbox,
+                                           const Tensor<gpu, 4, DType>& trans,
+                                           const Tensor<gpu, 4, DType>& top_count,
+                                           const bool no_trans,
+                                           const float spatial_scale,
+                                           const index_t output_dim,
+                                           const index_t group_size,
+                                           const index_t pooled_size,
+                                           const index_t part_size,
+                                           const index_t sample_per_part,
+                                           const float trans_std) {
+  const DType* top_diff             = out_grad.dptr_;
+  const DType* bottom_data          = data.dptr_;
+  const DType* bottom_rois          = bbox.dptr_;
+  const DType* bottom_trans         = no_trans ? nullptr : trans.dptr_;
+  DType* bottom_data_diff           = in_grad.dptr_;
+  DType* bottom_trans_diff          = no_trans ? nullptr : trans_grad.dptr_;
+  const DType* top_count_data       = top_count.dptr_;
+  const index_t count               = out_grad.shape_.Size();
+  const index_t num_rois            = bbox.size(0);
+  const index_t channels            = in_grad.size(1);
+  const index_t height              = in_grad.size(2);
+  const index_t width               = in_grad.size(3);
+  const index_t pooled_height       = pooled_size;
+  const index_t pooled_width        = pooled_size;
+  const index_t num_classes         = no_trans ? 1 : trans_grad.size(1) / 2;
+  const index_t channels_each_class = no_trans ? output_dim : output_dim / num_classes;
+
+  cudaStream_t stream = Stream<gpu>::GetStream(in_grad.stream_);
+  DeformablePSROIPoolBackwardAccKernel<DType>
+      <<<mxnet::op::mxnet_op::cuda_get_num_blocks(count), kBaseThreadNum, 0, stream>>>(
+          count,
+          top_diff,
+          top_count_data,
+          num_rois,
+          spatial_scale,
+          channels,
+          height,
+          width,
+          pooled_height,
+          pooled_width,
+          output_dim,
+          bottom_data_diff,
+          bottom_trans_diff,
+          bottom_data,
+          bottom_rois,
+          bottom_trans,
+          no_trans,
+          trans_std,
+          sample_per_part,
+          group_size,
+          part_size,
+          num_classes,
+          channels_each_class);
+  DeformablePSROIPOOLING_CUDA_CHECK(cudaGetLastError());
+}
 
 }  // namespace cuda
 
-  template<typename DType>
-  inline void DeformablePSROIPoolForward(const Tensor<gpu, 4, DType> &out,
-                                         const Tensor<gpu, 4, DType> &data,
-                                         const Tensor<gpu, 2, DType> &bbox,
-                                         const Tensor<gpu, 4, DType> &trans,
-                                         const Tensor<gpu, 4, DType> &top_count,
-                                         const bool no_trans, const float spatial_scale,
-                                         const index_t output_dim, const index_t group_size,
-                                         const index_t pooled_size, const index_t part_size,
-                                         const index_t sample_per_part, const float trans_std) {
-    cuda::DeformablePSROIPoolForward(out, data, bbox, trans, top_count,
-                                     no_trans, spatial_scale, output_dim,
-                                     group_size, pooled_size, part_size,
-                                     sample_per_part, trans_std);
-  }
-
-  template<typename DType>
-  inline void DeformablePSROIPoolBackwardAcc(const Tensor<gpu, 4, DType> &in_grad,
-                                             const Tensor<gpu, 4, DType> &trans_grad,
-                                             const Tensor<gpu, 4, DType> &out_grad,
-                                             const Tensor<gpu, 4, DType> &data,
-                                             const Tensor<gpu, 2, DType> &bbox,
-                                             const Tensor<gpu, 4, DType> &trans,
-                                             const Tensor<gpu, 4, DType> &top_count,
-                                             const bool no_trans, const float spatial_scale,
-                                             const index_t output_dim, const index_t group_size,
-                                             const index_t pooled_size, const index_t part_size,
-                                             const index_t sample_per_part, const float trans_std) {
-    cuda::DeformablePSROIPoolBackwardAcc(in_grad, trans_grad, out_grad, data, bbox,
-                                         trans, top_count, no_trans, spatial_scale,
-                                         output_dim, group_size, pooled_size,
-                                         part_size, sample_per_part, trans_std);
-  }
+template <typename DType>
+inline void DeformablePSROIPoolForward(const Tensor<gpu, 4, DType>& out,
+                                       const Tensor<gpu, 4, DType>& data,
+                                       const Tensor<gpu, 2, DType>& bbox,
+                                       const Tensor<gpu, 4, DType>& trans,
+                                       const Tensor<gpu, 4, DType>& top_count,
+                                       const bool no_trans,
+                                       const float spatial_scale,
+                                       const index_t output_dim,
+                                       const index_t group_size,
+                                       const index_t pooled_size,
+                                       const index_t part_size,
+                                       const index_t sample_per_part,
+                                       const float trans_std) {
+  cuda::DeformablePSROIPoolForward(out,
+                                   data,
+                                   bbox,
+                                   trans,
+                                   top_count,
+                                   no_trans,
+                                   spatial_scale,
+                                   output_dim,
+                                   group_size,
+                                   pooled_size,
+                                   part_size,
+                                   sample_per_part,
+                                   trans_std);
+}
+
+template <typename DType>
+inline void DeformablePSROIPoolBackwardAcc(const Tensor<gpu, 4, DType>& in_grad,
+                                           const Tensor<gpu, 4, DType>& trans_grad,
+                                           const Tensor<gpu, 4, DType>& out_grad,
+                                           const Tensor<gpu, 4, DType>& data,
+                                           const Tensor<gpu, 2, DType>& bbox,
+                                           const Tensor<gpu, 4, DType>& trans,
+                                           const Tensor<gpu, 4, DType>& top_count,
+                                           const bool no_trans,
+                                           const float spatial_scale,
+                                           const index_t output_dim,
+                                           const index_t group_size,
+                                           const index_t pooled_size,
+                                           const index_t part_size,
+                                           const index_t sample_per_part,
+                                           const float trans_std) {
+  cuda::DeformablePSROIPoolBackwardAcc(in_grad,
+                                       trans_grad,
+                                       out_grad,
+                                       data,
+                                       bbox,
+                                       trans,
+                                       top_count,
+                                       no_trans,
+                                       spatial_scale,
+                                       output_dim,
+                                       group_size,
+                                       pooled_size,
+                                       part_size,
+                                       sample_per_part,
+                                       trans_std);
+}
 
 }  // namespace mshadow
 
-
 namespace mxnet {
 namespace op {
 
-  template<>
-  Operator* CreateOp<gpu>(DeformablePSROIPoolingParam param, int dtype) {
-    Operator* op = nullptr;
-    MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      op = new DeformablePSROIPoolingOp<gpu, DType>(param);
-    });
-    return op;
-  }
+template <>
+Operator* CreateOp<gpu>(DeformablePSROIPoolingParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new DeformablePSROIPoolingOp<gpu, DType>(param); });
+  return op;
+}
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/dgl_graph-inl.h b/src/operator/contrib/dgl_graph-inl.h
index f31071b896e3..918c8c88f1e0 100644
--- a/src/operator/contrib/dgl_graph-inl.h
+++ b/src/operator/contrib/dgl_graph-inl.h
@@ -37,7 +37,7 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
+template <typename xpu>
 void DGLAdjacencyForwardEx(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<NDArray>& inputs,
@@ -49,14 +49,14 @@ void DGLAdjacencyForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs[0].storage_type(), kCSRStorage);
   CHECK_EQ(outputs[0].storage_type(), kCSRStorage);
   CHECK_EQ(req[0], kWriteTo);
-  const TBlob &in_idx = inputs[0].aux_data(csr::kIdx);
-  const TBlob &in_indptr = inputs[0].aux_data(csr::kIndPtr);
+  const TBlob& in_idx    = inputs[0].aux_data(csr::kIdx);
+  const TBlob& in_indptr = inputs[0].aux_data(csr::kIndPtr);
 
   outputs[0].CheckAndAllocData(in_idx.shape_);
   outputs[0].CheckAndAllocAuxData(csr::kIdx, in_idx.shape_);
   outputs[0].CheckAndAllocAuxData(csr::kIndPtr, in_indptr.shape_);
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   Fill<false>(s, outputs[0].data(), req[0], 1.0);
   mxnet_op::copy(s, outputs[0].aux_data(csr::kIdx), in_idx);
   mxnet_op::copy(s, outputs[0].aux_data(csr::kIndPtr), in_indptr);
diff --git a/src/operator/contrib/dgl_graph.cc b/src/operator/contrib/dgl_graph.cc
index c8e27f38d1a6..5b53843e61b3 100644
--- a/src/operator/contrib/dgl_graph.cc
+++ b/src/operator/contrib/dgl_graph.cc
@@ -46,19 +46,19 @@ typedef int64_t dgl_id_t;
 class ArrayHeap {
  public:
   explicit ArrayHeap(const std::vector<float>& prob, unsigned int seed) {
-    generator_ = std::mt19937(seed);
+    generator_    = std::mt19937(seed);
     distribution_ = std::uniform_real_distribution<float>(0.0, 1.0);
-    vec_size_ = prob.size();
-    bit_len_ = ceil(log2(vec_size_));
-    limit_ = 1 << bit_len_;
+    vec_size_     = prob.size();
+    bit_len_      = ceil(log2(vec_size_));
+    limit_        = 1 << bit_len_;
     // allocate twice the size
     heap_.resize(limit_ << 1, 0);
     // allocate the leaves
-    for (int i = limit_; i < vec_size_+limit_; ++i) {
-      heap_[i] = prob[i-limit_];
+    for (int i = limit_; i < vec_size_ + limit_; ++i) {
+      heap_[i] = prob[i - limit_];
     }
     // iterate up the tree (this is O(m))
-    for (int i = bit_len_-1; i >= 0; --i) {
+    for (int i = bit_len_ - 1; i >= 0; --i) {
       for (int j = (1 << i); j < (1 << (i + 1)); ++j) {
         heap_[j] = heap_[j << 1] + heap_[(j << 1) + 1];
       }
@@ -71,7 +71,7 @@ class ArrayHeap {
    */
   void Delete(size_t index) {
     size_t i = index + limit_;
-    float w = heap_[i];
+    float w  = heap_[i];
     for (int j = bit_len_; j >= 0; --j) {
       heap_[i] -= w;
       i = i >> 1;
@@ -94,7 +94,7 @@ class ArrayHeap {
    */
   size_t Sample() {
     float xi = heap_[1] * distribution_(generator_);
-    int i = 1;
+    int i    = 1;
     while (i < limit_) {
       i = i << 1;
       if (xi >= heap_[i]) {
@@ -131,17 +131,10 @@ struct NeighborSampleParam : public dmlc::Parameter<NeighborSampleParam> {
   dgl_id_t num_neighbor;
   dgl_id_t max_num_vertices;
   DMLC_DECLARE_PARAMETER(NeighborSampleParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2)
-    .describe("Number of input NDArray.");
-    DMLC_DECLARE_FIELD(num_hops)
-      .set_default(1)
-      .describe("Number of hops.");
-    DMLC_DECLARE_FIELD(num_neighbor)
-      .set_default(2)
-      .describe("Number of neighbor.");
-    DMLC_DECLARE_FIELD(max_num_vertices)
-      .set_default(100)
-      .describe("Max number of vertices.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2).describe("Number of input NDArray.");
+    DMLC_DECLARE_FIELD(num_hops).set_default(1).describe("Number of hops.");
+    DMLC_DECLARE_FIELD(num_neighbor).set_default(2).describe("Number of neighbor.");
+    DMLC_DECLARE_FIELD(max_num_vertices).set_default(100).describe("Max number of vertices.");
   }
 };
 
@@ -153,8 +146,8 @@ DMLC_REGISTER_PARAMETER(NeighborSampleParam);
 static bool CSRNeighborUniformSampleStorageType(const nnvm::NodeAttrs& attrs,
                                                 const int dev_mask,
                                                 DispatchMode* dispatch_mode,
-                                                std::vector<int> *in_attrs,
-                                                std::vector<int> *out_attrs) {
+                                                std::vector<int>* in_attrs,
+                                                std::vector<int>* out_attrs) {
   const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   size_t num_subgraphs = params.num_args - 1;
@@ -181,7 +174,7 @@ static bool CSRNeighborUniformSampleStorageType(const nnvm::NodeAttrs& attrs,
   }
   // sub_layer
   for (size_t i = 0; i < num_subgraphs; i++) {
-    if (!type_assign(&(*out_attrs)[i + 2*num_subgraphs], mxnet::kDefaultStorage)) {
+    if (!type_assign(&(*out_attrs)[i + 2 * num_subgraphs], mxnet::kDefaultStorage)) {
       success = false;
     }
   }
@@ -197,10 +190,9 @@ static bool CSRNeighborUniformSampleStorageType(const nnvm::NodeAttrs& attrs,
 static bool CSRNeighborNonUniformSampleStorageType(const nnvm::NodeAttrs& attrs,
                                                    const int dev_mask,
                                                    DispatchMode* dispatch_mode,
-                                                   std::vector<int> *in_attrs,
-                                                   std::vector<int> *out_attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
+                                                   std::vector<int>* in_attrs,
+                                                   std::vector<int>* out_attrs) {
+  const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   size_t num_subgraphs = params.num_args - 2;
   CHECK_EQ(out_attrs->size(), 4 * num_subgraphs);
@@ -229,13 +221,13 @@ static bool CSRNeighborNonUniformSampleStorageType(const nnvm::NodeAttrs& attrs,
   }
   // sub_probability
   for (size_t i = 0; i < num_subgraphs; i++) {
-    if (!type_assign(&(*out_attrs)[i + 2*num_subgraphs], mxnet::kDefaultStorage)) {
+    if (!type_assign(&(*out_attrs)[i + 2 * num_subgraphs], mxnet::kDefaultStorage)) {
       success = false;
     }
   }
   // sub_layer
   for (size_t i = 0; i < num_subgraphs; i++) {
-    if (!type_assign(&(*out_attrs)[i + 3*num_subgraphs], mxnet::kDefaultStorage)) {
+    if (!type_assign(&(*out_attrs)[i + 3 * num_subgraphs], mxnet::kDefaultStorage)) {
       success = false;
     }
   }
@@ -249,10 +241,9 @@ static bool CSRNeighborNonUniformSampleStorageType(const nnvm::NodeAttrs& attrs,
  * Check uniform Shape
  */
 static bool CSRNeighborUniformSampleShape(const nnvm::NodeAttrs& attrs,
-                                          mxnet::ShapeVector *in_attrs,
-                                          mxnet::ShapeVector *out_attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
+                                          mxnet::ShapeVector* in_attrs,
+                                          mxnet::ShapeVector* out_attrs) {
+  const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   size_t num_subgraphs = params.num_args - 1;
   CHECK_EQ(out_attrs->size(), 3 * num_subgraphs);
@@ -287,7 +278,7 @@ static bool CSRNeighborUniformSampleShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape out_layer_shape(1, -1);
   out_layer_shape[0] = params.max_num_vertices;
   for (size_t i = 0; i < num_subgraphs; i++) {
-    SHAPE_ASSIGN_CHECK(*out_attrs, i + 2*num_subgraphs, out_layer_shape);
+    SHAPE_ASSIGN_CHECK(*out_attrs, i + 2 * num_subgraphs, out_layer_shape);
     success = success && !mxnet::op::shape_is_none(out_attrs->at(i + 2 * num_subgraphs));
   }
 
@@ -298,10 +289,9 @@ static bool CSRNeighborUniformSampleShape(const nnvm::NodeAttrs& attrs,
  * Check non-uniform Shape
  */
 static bool CSRNeighborNonUniformSampleShape(const nnvm::NodeAttrs& attrs,
-                                             mxnet::ShapeVector *in_attrs,
-                                             mxnet::ShapeVector *out_attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
+                                             mxnet::ShapeVector* in_attrs,
+                                             mxnet::ShapeVector* out_attrs) {
+  const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   size_t num_subgraphs = params.num_args - 2;
   CHECK_EQ(out_attrs->size(), 4 * num_subgraphs);
@@ -339,14 +329,14 @@ static bool CSRNeighborNonUniformSampleShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape out_prob_shape(1, -1);
   out_prob_shape[0] = params.max_num_vertices;
   for (size_t i = 0; i < num_subgraphs; i++) {
-    SHAPE_ASSIGN_CHECK(*out_attrs, i + 2*num_subgraphs, out_prob_shape);
+    SHAPE_ASSIGN_CHECK(*out_attrs, i + 2 * num_subgraphs, out_prob_shape);
     success = success && !mxnet::op::shape_is_none(out_attrs->at(i + 2 * num_subgraphs));
   }
   // sub_layer
   mxnet::TShape out_layer_shape(1, -1);
   out_layer_shape[0] = params.max_num_vertices;
   for (size_t i = 0; i < num_subgraphs; i++) {
-    SHAPE_ASSIGN_CHECK(*out_attrs, i + 3*num_subgraphs, out_prob_shape);
+    SHAPE_ASSIGN_CHECK(*out_attrs, i + 3 * num_subgraphs, out_prob_shape);
     success = success && !mxnet::op::shape_is_none(out_attrs->at(i + 3 * num_subgraphs));
   }
 
@@ -357,10 +347,9 @@ static bool CSRNeighborNonUniformSampleShape(const nnvm::NodeAttrs& attrs,
  * Check uniform Type
  */
 static bool CSRNeighborUniformSampleType(const nnvm::NodeAttrs& attrs,
-                                         std::vector<int> *in_attrs,
-                                         std::vector<int> *out_attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
+                                         std::vector<int>* in_attrs,
+                                         std::vector<int>* out_attrs) {
+  const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   size_t num_subgraphs = params.num_args - 1;
   CHECK_EQ(out_attrs->size(), 3 * num_subgraphs);
@@ -369,11 +358,9 @@ static bool CSRNeighborUniformSampleType(const nnvm::NodeAttrs& attrs,
   for (size_t i = 0; i < num_subgraphs; i++) {
     TYPE_ASSIGN_CHECK(*out_attrs, i, in_attrs->at(1));
     TYPE_ASSIGN_CHECK(*out_attrs, i + num_subgraphs, in_attrs->at(0));
-    TYPE_ASSIGN_CHECK(*out_attrs, i + 2*num_subgraphs, in_attrs->at(1));
-    success = success &&
-               out_attrs->at(i) != -1 &&
-               out_attrs->at(i + num_subgraphs) != -1 &&
-               out_attrs->at(i + 2*num_subgraphs) != -1;
+    TYPE_ASSIGN_CHECK(*out_attrs, i + 2 * num_subgraphs, in_attrs->at(1));
+    success = success && out_attrs->at(i) != -1 && out_attrs->at(i + num_subgraphs) != -1 &&
+              out_attrs->at(i + 2 * num_subgraphs) != -1;
   }
 
   return success;
@@ -383,10 +370,9 @@ static bool CSRNeighborUniformSampleType(const nnvm::NodeAttrs& attrs,
  * Check non-uniform Type
  */
 static bool CSRNeighborNonUniformSampleType(const nnvm::NodeAttrs& attrs,
-                                            std::vector<int> *in_attrs,
-                                            std::vector<int> *out_attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
+                                            std::vector<int>* in_attrs,
+                                            std::vector<int>* out_attrs) {
+  const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   size_t num_subgraphs = params.num_args - 2;
   CHECK_EQ(out_attrs->size(), 4 * num_subgraphs);
@@ -395,22 +381,17 @@ static bool CSRNeighborNonUniformSampleType(const nnvm::NodeAttrs& attrs,
   for (size_t i = 0; i < num_subgraphs; i++) {
     TYPE_ASSIGN_CHECK(*out_attrs, i, in_attrs->at(2));
     TYPE_ASSIGN_CHECK(*out_attrs, i + num_subgraphs, in_attrs->at(0));
-    TYPE_ASSIGN_CHECK(*out_attrs, i + 2*num_subgraphs, in_attrs->at(1));
-    TYPE_ASSIGN_CHECK(*out_attrs, i + 3*num_subgraphs, in_attrs->at(2));
-    success = success &&
-               out_attrs->at(i) != -1 &&
-               out_attrs->at(i + num_subgraphs) != -1 &&
-               out_attrs->at(i + 2*num_subgraphs) != -1 &&
-               out_attrs->at(i + 3*num_subgraphs) != -1;
+    TYPE_ASSIGN_CHECK(*out_attrs, i + 2 * num_subgraphs, in_attrs->at(1));
+    TYPE_ASSIGN_CHECK(*out_attrs, i + 3 * num_subgraphs, in_attrs->at(2));
+    success = success && out_attrs->at(i) != -1 && out_attrs->at(i + num_subgraphs) != -1 &&
+              out_attrs->at(i + 2 * num_subgraphs) != -1 &&
+              out_attrs->at(i + 3 * num_subgraphs) != -1;
   }
 
   return success;
 }
 
-static void RandomSample(size_t set_size,
-                         size_t num,
-                         std::vector<size_t>* out,
-                         unsigned int seed) {
+static void RandomSample(size_t set_size, size_t num, std::vector<size_t>* out, unsigned int seed) {
   std::mt19937 generator(seed);
   std::unordered_set<size_t> sampled_idxs;
   std::uniform_int_distribution<size_t> distribution(0, set_size - 1);
@@ -423,11 +404,9 @@ static void RandomSample(size_t set_size,
   }
 }
 
-static void NegateSet(const std::vector<size_t> &idxs,
-                      size_t set_size,
-                      std::vector<size_t>* out) {
+static void NegateSet(const std::vector<size_t>& idxs, size_t set_size, std::vector<size_t>* out) {
   // idxs must have been sorted.
-  auto it = idxs.begin();
+  auto it  = idxs.begin();
   size_t i = 0;
   CHECK_GT(set_size, idxs.back());
   for (; i < set_size && it != idxs.end(); i++) {
@@ -469,8 +448,7 @@ static void GetUniformSample(const dgl_id_t* val_list,
   } else {
     std::vector<size_t> negate;
     negate.reserve(ver_len - max_num_neighbor);
-    RandomSample(ver_len, ver_len - max_num_neighbor,
-                 &negate, seed);
+    RandomSample(ver_len, ver_len - max_num_neighbor, &negate, seed);
     std::sort(negate.begin(), negate.end());
     NegateSet(negate, ver_len, &sorted_idxs);
   }
@@ -515,8 +493,8 @@ static void GetNonUniformSample(const float* probability,
   out_ver->resize(max_num_neighbor);
   out_edge->resize(max_num_neighbor);
   for (size_t i = 0; i < max_num_neighbor; ++i) {
-    size_t idx = sp_index[i];
-    out_ver->at(i) = col_list[idx];
+    size_t idx      = sp_index[i];
+    out_ver->at(i)  = col_list[idx];
     out_edge->at(i) = val_list[idx];
   }
   sort(out_ver->begin(), out_ver->end());
@@ -529,20 +507,19 @@ static void GetNonUniformSample(const float* probability,
 struct neigh_list {
   std::vector<dgl_id_t> neighs;
   std::vector<dgl_id_t> edges;
-  neigh_list(std::vector<dgl_id_t> _neighs,
-             std::vector<dgl_id_t> _edges)
-    : neighs(std::move(_neighs)), edges(std::move(_edges)) {}
+  neigh_list(std::vector<dgl_id_t> _neighs, std::vector<dgl_id_t> _edges)
+      : neighs(std::move(_neighs)), edges(std::move(_edges)) {}
 };
 
 /*
  * Sample sub-graph from csr graph
  */
-static void SampleSubgraph(const NDArray &csr,
-                           const NDArray &seed_arr,
-                           const NDArray &sampled_ids,
-                           const NDArray &sub_csr,
+static void SampleSubgraph(const NDArray& csr,
+                           const NDArray& seed_arr,
+                           const NDArray& sampled_ids,
+                           const NDArray& sub_csr,
                            float* sub_prob,
-                           const NDArray &sub_layer,
+                           const NDArray& sub_layer,
                            const float* probability,
                            int num_hops,
                            size_t num_neighbor,
@@ -553,10 +530,10 @@ static void SampleSubgraph(const NDArray &csr,
 
   const dgl_id_t* val_list = csr.data().dptr<dgl_id_t>();
   const dgl_id_t* col_list = csr.aux_data(csr::kIdx).dptr<dgl_id_t>();
-  const dgl_id_t* indptr = csr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
-  const dgl_id_t* seed = seed_arr.data().dptr<dgl_id_t>();
-  dgl_id_t* out = sampled_ids.data().dptr<dgl_id_t>();
-  dgl_id_t* out_layer = sub_layer.data().dptr<dgl_id_t>();
+  const dgl_id_t* indptr   = csr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
+  const dgl_id_t* seed     = seed_arr.data().dptr<dgl_id_t>();
+  dgl_id_t* out            = sampled_ids.data().dptr<dgl_id_t>();
+  dgl_id_t* out_layer      = sub_layer.data().dptr<dgl_id_t>();
 
   // BFS traverse the graph and sample vertices
   // <vertex_id, layer_id>
@@ -584,9 +561,8 @@ static void SampleSubgraph(const NDArray &csr,
   // A vertex in the vector only needs to be accessed once. If there is a vertex behind idx
   // isn't in the last level, we will sample its neighbors. If not, the while loop terminates.
   size_t idx = 0;
-  while (idx < sub_vers.size() &&
-    sub_ver_mp.size() < max_num_vertices) {
-    dgl_id_t dst_id = sub_vers[idx].first;
+  while (idx < sub_vers.size() && sub_ver_mp.size() < max_num_vertices) {
+    dgl_id_t dst_id    = sub_vers[idx].first;
     int cur_node_level = sub_vers[idx].second;
     idx++;
     // If the node is in the last level, we don't need to sample neighbors
@@ -596,7 +572,7 @@ static void SampleSubgraph(const NDArray &csr,
 
     tmp_sampled_src_list.clear();
     tmp_sampled_edge_list.clear();
-    dgl_id_t ver_len = *(indptr+dst_id+1) - *(indptr+dst_id);
+    dgl_id_t ver_len = *(indptr + dst_id + 1) - *(indptr + dst_id);
     if (probability == nullptr) {  // uniform-sample
       GetUniformSample(val_list + *(indptr + dst_id),
                        col_list + *(indptr + dst_id),
@@ -607,13 +583,13 @@ static void SampleSubgraph(const NDArray &csr,
                        random_seed);
     } else {  // non-uniform-sample
       GetNonUniformSample(probability,
-                       val_list + *(indptr + dst_id),
-                       col_list + *(indptr + dst_id),
-                       ver_len,
-                       num_neighbor,
-                       &tmp_sampled_src_list,
-                       &tmp_sampled_edge_list,
-                       random_seed);
+                          val_list + *(indptr + dst_id),
+                          col_list + *(indptr + dst_id),
+                          ver_len,
+                          num_neighbor,
+                          &tmp_sampled_src_list,
+                          &tmp_sampled_edge_list,
+                          random_seed);
     }
     CHECK_EQ(tmp_sampled_src_list.size(), tmp_sampled_edge_list.size());
     size_t pos = neighbor_list.size();
@@ -621,15 +597,15 @@ static void SampleSubgraph(const NDArray &csr,
     // First we push the size of neighbor vector
     neighbor_list.push_back(tmp_sampled_edge_list.size());
     // Then push the vertices
-    for (dgl_id_t & i : tmp_sampled_src_list) {
+    for (dgl_id_t& i : tmp_sampled_src_list) {
       neighbor_list.push_back(i);
     }
     // Finally we push the edge list
-    for (dgl_id_t & i : tmp_sampled_edge_list) {
+    for (dgl_id_t& i : tmp_sampled_edge_list) {
       neighbor_list.push_back(i);
     }
     num_edges += tmp_sampled_src_list.size();
-    for (dgl_id_t & i : tmp_sampled_src_list) {
+    for (dgl_id_t& i : tmp_sampled_src_list) {
       // If we have sampled the max number of vertices, we have to stop.
       if (sub_ver_mp.size() >= max_num_vertices)
         break;
@@ -646,8 +622,8 @@ static void SampleSubgraph(const NDArray &csr,
   for (; idx < sub_vers.size(); idx++) {
     if (sub_vers[idx].second < num_hops) {
       LOG(WARNING)
-        << "The sampling is truncated because we have reached the max number of vertices\n"
-        << "Please use a smaller number of seeds or a small neighborhood";
+          << "The sampling is truncated because we have reached the max number of vertices\n"
+          << "Please use a smaller number of seeds or a small neighborhood";
       break;
     }
   }
@@ -655,12 +631,13 @@ static void SampleSubgraph(const NDArray &csr,
   // Copy sub_ver_mp to output[0]
   // Copy layer
   size_t num_vertices = sub_ver_mp.size();
-  std::sort(sub_vers.begin(), sub_vers.end(),
-            [](const std::pair<dgl_id_t, dgl_id_t> &a1, const std::pair<dgl_id_t, dgl_id_t> &a2) {
-    return a1.first < a2.first;
-  });
+  std::sort(sub_vers.begin(),
+            sub_vers.end(),
+            [](const std::pair<dgl_id_t, dgl_id_t>& a1, const std::pair<dgl_id_t, dgl_id_t>& a2) {
+              return a1.first < a2.first;
+            });
   for (size_t i = 0; i < sub_vers.size(); i++) {
-    out[i] = sub_vers[i].first;
+    out[i]       = sub_vers[i].first;
     out_layer[i] = sub_vers[i].second;
   }
   // The last element stores the actual
@@ -671,29 +648,30 @@ static void SampleSubgraph(const NDArray &csr,
   if (sub_prob != nullptr) {
     for (size_t i = 0; i < sub_ver_mp.size(); ++i) {
       dgl_id_t idx = out[i];
-      sub_prob[i] = probability[idx];
+      sub_prob[i]  = probability[idx];
     }
   }
   // Construct sub_csr_graph
   mxnet::TShape shape_1(1, -1);
   mxnet::TShape shape_2(1, -1);
   shape_1[0] = num_edges;
-  shape_2[0] = max_num_vertices+1;
+  shape_2[0] = max_num_vertices + 1;
   sub_csr.CheckAndAllocData(shape_1);
   sub_csr.CheckAndAllocAuxData(csr::kIdx, shape_1);
   sub_csr.CheckAndAllocAuxData(csr::kIndPtr, shape_2);
-  dgl_id_t* val_list_out = sub_csr.data().dptr<dgl_id_t>();
-  dgl_id_t* col_list_out = sub_csr.aux_data(1).dptr<dgl_id_t>();
-  dgl_id_t* indptr_out = sub_csr.aux_data(0).dptr<dgl_id_t>();
-  indptr_out[0] = 0;
+  dgl_id_t* val_list_out  = sub_csr.data().dptr<dgl_id_t>();
+  dgl_id_t* col_list_out  = sub_csr.aux_data(1).dptr<dgl_id_t>();
+  dgl_id_t* indptr_out    = sub_csr.aux_data(0).dptr<dgl_id_t>();
+  indptr_out[0]           = 0;
   size_t collected_nedges = 0;
 
   // Both the out array and neigh_pos are sorted. By scanning the two arrays, we can see
   // which vertices have neighbors and which don't.
-  std::sort(neigh_pos.begin(), neigh_pos.end(),
-            [](const std::pair<dgl_id_t, size_t> &a1, const std::pair<dgl_id_t, size_t> &a2) {
-    return a1.first < a2.first;
-  });
+  std::sort(neigh_pos.begin(),
+            neigh_pos.end(),
+            [](const std::pair<dgl_id_t, size_t>& a1, const std::pair<dgl_id_t, size_t>& a2) {
+              return a1.first < a2.first;
+            });
   size_t idx_with_neigh = 0;
   for (size_t i = 0; i < num_vertices; i++) {
     dgl_id_t dst_id = *(out + i);
@@ -706,19 +684,16 @@ static void SampleSubgraph(const NDArray &csr,
       edge_size = neighbor_list[pos];
       CHECK_LE(pos + edge_size * 2 + 1, neighbor_list.size());
 
-      std::copy_n(neighbor_list.begin() + pos + 1,
-                  edge_size,
-                  col_list_out + collected_nedges);
-      std::copy_n(neighbor_list.begin() + pos + edge_size + 1,
-                  edge_size,
-                  val_list_out + collected_nedges);
+      std::copy_n(neighbor_list.begin() + pos + 1, edge_size, col_list_out + collected_nedges);
+      std::copy_n(
+          neighbor_list.begin() + pos + edge_size + 1, edge_size, val_list_out + collected_nedges);
       collected_nedges += edge_size;
       idx_with_neigh++;
     }
-    indptr_out[i+1] = indptr_out[i] + edge_size;
+    indptr_out[i + 1] = indptr_out[i] + edge_size;
   }
-  for (size_t i = num_vertices+1; i <= max_num_vertices; ++i) {
-    indptr_out[i] = indptr_out[i-1];
+  for (size_t i = num_vertices + 1; i <= max_num_vertices; ++i) {
+    indptr_out[i] = indptr_out[i - 1];
   }
 }
 
@@ -726,28 +701,28 @@ static void SampleSubgraph(const NDArray &csr,
  * Operator: contrib_csr_neighbor_uniform_sample
  */
 static void CSRNeighborUniformSampleComputeExCPU(const nnvm::NodeAttrs& attrs,
-                                          const OpContext& ctx,
-                                          const std::vector<NDArray>& inputs,
-                                          const std::vector<OpReqType>& req,
-                                          const std::vector<NDArray>& outputs) {
+                                                 const OpContext& ctx,
+                                                 const std::vector<NDArray>& inputs,
+                                                 const std::vector<OpReqType>& req,
+                                                 const std::vector<NDArray>& outputs) {
   const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   int num_subgraphs = inputs.size() - 1;
   CHECK_EQ(outputs.size(), 3 * num_subgraphs);
 
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
-  mshadow::Random<cpu, unsigned int> *prnd = ctx.requested[0].get_random<cpu, unsigned int>(s);
-  unsigned int seed = prnd->GetRandInt();
+  mshadow::Stream<cpu>* s                  = ctx.get_stream<cpu>();
+  mshadow::Random<cpu, unsigned int>* prnd = ctx.requested[0].get_random<cpu, unsigned int>(s);
+  unsigned int seed                        = prnd->GetRandInt();
 
 #pragma omp parallel for
   for (int i = 0; i < num_subgraphs; i++) {
-    SampleSubgraph(inputs[0],                     // graph_csr
-                   inputs[i + 1],                 // seed vector
-                   outputs[i],                    // sample_id
-                   outputs[i + 1*num_subgraphs],  // sub_csr
-                   nullptr,                       // sample_id_probability
-                   outputs[i + 2*num_subgraphs],  // sample_id_layer
-                   nullptr,                       // probability
+    SampleSubgraph(inputs[0],                       // graph_csr
+                   inputs[i + 1],                   // seed vector
+                   outputs[i],                      // sample_id
+                   outputs[i + 1 * num_subgraphs],  // sub_csr
+                   nullptr,                         // sample_id_probability
+                   outputs[i + 2 * num_subgraphs],  // sample_id_layer
+                   nullptr,                         // probability
                    params.num_hops,
                    params.num_neighbor,
                    params.max_num_vertices,
@@ -760,7 +735,7 @@ static void CSRNeighborUniformSampleComputeExCPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_dgl_csr_neighbor_uniform_sample)
-.describe(R"code(This operator samples sub-graphs from a csr graph via an
+    .describe(R"code(This operator samples sub-graphs from a csr graph via an
 uniform probability. The operator is designed for DGL.
 
 The operator outputs three sets of NDArrays to represent the sampled results
@@ -800,38 +775,37 @@ of max_num_vertices, and the valid number of vertices is the same as the ones in
   <NDArray 5 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NeighborSampleParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
-  size_t num_subgraphs = params.num_args - 1;
-  return num_subgraphs * 3;
-})
-.set_attr<FInferStorageType>("FInferStorageType", CSRNeighborUniformSampleStorageType)
-.set_attr<mxnet::FInferShape>("FInferShape", CSRNeighborUniformSampleShape)
-.set_attr<nnvm::FInferType>("FInferType", CSRNeighborUniformSampleType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", CSRNeighborUniformSampleComputeExCPU)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kRandom};
-})
-.add_argument("csr_matrix", "NDArray-or-Symbol", "csr matrix")
-.add_argument("seed_arrays", "NDArray-or-Symbol[]", "seed vertices")
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_arguments(NeighborSampleParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NeighborSampleParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
+      size_t num_subgraphs              = params.num_args - 1;
+      return num_subgraphs * 3;
+    })
+    .set_attr<FInferStorageType>("FInferStorageType", CSRNeighborUniformSampleStorageType)
+    .set_attr<mxnet::FInferShape>("FInferShape", CSRNeighborUniformSampleShape)
+    .set_attr<nnvm::FInferType>("FInferType", CSRNeighborUniformSampleType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", CSRNeighborUniformSampleComputeExCPU)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom};
+                                })
+    .add_argument("csr_matrix", "NDArray-or-Symbol", "csr matrix")
+    .add_argument("seed_arrays", "NDArray-or-Symbol[]", "seed vertices")
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_arguments(NeighborSampleParam::__FIELDS__());
 
 /*
  * Operator: contrib_csr_neighbor_non_uniform_sample
  */
 static void CSRNeighborNonUniformSampleComputeExCPU(const nnvm::NodeAttrs& attrs,
-                                              const OpContext& ctx,
-                                              const std::vector<NDArray>& inputs,
-                                              const std::vector<OpReqType>& req,
-                                              const std::vector<NDArray>& outputs) {
+                                                    const OpContext& ctx,
+                                                    const std::vector<NDArray>& inputs,
+                                                    const std::vector<OpReqType>& req,
+                                                    const std::vector<NDArray>& outputs) {
   const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
 
   int num_subgraphs = inputs.size() - 2;
@@ -839,19 +813,19 @@ static void CSRNeighborNonUniformSampleComputeExCPU(const nnvm::NodeAttrs& attrs
 
   const float* probability = inputs[1].data().dptr<float>();
 
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
-  mshadow::Random<cpu, unsigned int> *prnd = ctx.requested[0].get_random<cpu, unsigned int>(s);
-  unsigned int seed = prnd->GetRandInt();
+  mshadow::Stream<cpu>* s                  = ctx.get_stream<cpu>();
+  mshadow::Random<cpu, unsigned int>* prnd = ctx.requested[0].get_random<cpu, unsigned int>(s);
+  unsigned int seed                        = prnd->GetRandInt();
 
 #pragma omp parallel for
   for (int i = 0; i < num_subgraphs; i++) {
-    float* sub_prob = outputs[i+2*num_subgraphs].data().dptr<float>();
-    SampleSubgraph(inputs[0],                     // graph_csr
-                   inputs[i + 2],                 // seed vector
-                   outputs[i],                    // sample_id
-                   outputs[i + 1*num_subgraphs],  // sub_csr
-                   sub_prob,                      // sample_id_probability
-                   outputs[i + 3*num_subgraphs],  // sample_id_layer
+    float* sub_prob = outputs[i + 2 * num_subgraphs].data().dptr<float>();
+    SampleSubgraph(inputs[0],                       // graph_csr
+                   inputs[i + 2],                   // seed vector
+                   outputs[i],                      // sample_id
+                   outputs[i + 1 * num_subgraphs],  // sub_csr
+                   sub_prob,                        // sample_id_probability
+                   outputs[i + 3 * num_subgraphs],  // sample_id_layer
                    probability,
                    params.num_hops,
                    params.num_neighbor,
@@ -865,7 +839,7 @@ static void CSRNeighborNonUniformSampleComputeExCPU(const nnvm::NodeAttrs& attrs
 }
 
 NNVM_REGISTER_OP(_contrib_dgl_csr_neighbor_non_uniform_sample)
-.describe(R"code(This operator samples sub-graph from a csr graph via an
+    .describe(R"code(This operator samples sub-graph from a csr graph via an
 non-uniform probability. The operator is designed for DGL.
 
 The operator outputs four sets of NDArrays to represent the sampled results
@@ -910,30 +884,29 @@ of max_num_vertices, and the valid number of vertices is the same as the ones in
   <NDArray 5 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NeighborSampleParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const NeighborSampleParam& params =
-    nnvm::get<NeighborSampleParam>(attrs.parsed);
-  size_t num_subgraphs = params.num_args - 2;
-  return num_subgraphs * 4;
-})
-.set_attr<FInferStorageType>("FInferStorageType", CSRNeighborNonUniformSampleStorageType)
-.set_attr<mxnet::FInferShape>("FInferShape", CSRNeighborNonUniformSampleShape)
-.set_attr<nnvm::FInferType>("FInferType", CSRNeighborNonUniformSampleType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", CSRNeighborNonUniformSampleComputeExCPU)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kRandom};
-})
-.add_argument("csr_matrix", "NDArray-or-Symbol", "csr matrix")
-.add_argument("probability", "NDArray-or-Symbol", "probability vector")
-.add_argument("seed_arrays", "NDArray-or-Symbol[]", "seed vertices")
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_arguments(NeighborSampleParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NeighborSampleParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NeighborSampleParam& params = nnvm::get<NeighborSampleParam>(attrs.parsed);
+      size_t num_subgraphs              = params.num_args - 2;
+      return num_subgraphs * 4;
+    })
+    .set_attr<FInferStorageType>("FInferStorageType", CSRNeighborNonUniformSampleStorageType)
+    .set_attr<mxnet::FInferShape>("FInferShape", CSRNeighborNonUniformSampleShape)
+    .set_attr<nnvm::FInferType>("FInferType", CSRNeighborNonUniformSampleType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", CSRNeighborNonUniformSampleComputeExCPU)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom};
+                                })
+    .add_argument("csr_matrix", "NDArray-or-Symbol", "csr matrix")
+    .add_argument("probability", "NDArray-or-Symbol", "probability vector")
+    .add_argument("seed_arrays", "NDArray-or-Symbol[]", "seed vertices")
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_arguments(NeighborSampleParam::__FIELDS__());
 
 ///////////////////////// Create induced subgraph ///////////////////////////
 
@@ -941,10 +914,10 @@ struct DGLSubgraphParam : public dmlc::Parameter<DGLSubgraphParam> {
   int num_args;
   bool return_mapping;
   DMLC_DECLARE_PARAMETER(DGLSubgraphParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2)
-    .describe("Number of input arguments, including all symbol inputs.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2).describe(
+        "Number of input arguments, including all symbol inputs.");
     DMLC_DECLARE_FIELD(return_mapping)
-    .describe("Return mapping of vid and eid between the subgraph and the parent graph.");
+        .describe("Return mapping of vid and eid between the subgraph and the parent graph.");
   }
 };  // struct DGLSubgraphParam
 
@@ -953,24 +926,24 @@ DMLC_REGISTER_PARAMETER(DGLSubgraphParam);
 static bool DGLSubgraphStorageType(const nnvm::NodeAttrs& attrs,
                                    const int dev_mask,
                                    DispatchMode* dispatch_mode,
-                                   std::vector<int> *in_attrs,
-                                   std::vector<int> *out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->at(0), kCSRStorage);
   for (size_t i = 1; i < in_attrs->size(); i++)
     CHECK_EQ(in_attrs->at(i), kDefaultStorage);
 
-  bool success = true;
+  bool success   = true;
   *dispatch_mode = DispatchMode::kFComputeEx;
-  for (int & out_attr : *out_attrs) {
+  for (int& out_attr : *out_attrs) {
     if (!type_assign(&out_attr, mxnet::kCSRStorage))
-    success = false;
+      success = false;
   }
   return success;
 }
 
 static bool DGLSubgraphShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
   CHECK_EQ(in_attrs->at(0).ndim(), 2U);
   for (size_t i = 1; i < in_attrs->size(); i++)
@@ -979,28 +952,28 @@ static bool DGLSubgraphShape(const nnvm::NodeAttrs& attrs,
   size_t num_g = params.num_args - 1;
   for (size_t i = 0; i < num_g; i++) {
     mxnet::TShape gshape(2, -1);
-    gshape[0] = in_attrs->at(i + 1)[0];
-    gshape[1] = in_attrs->at(i + 1)[0];
+    gshape[0]        = in_attrs->at(i + 1)[0];
+    gshape[1]        = in_attrs->at(i + 1)[0];
     out_attrs->at(i) = gshape;
   }
   for (size_t i = num_g; i < out_attrs->size(); i++) {
     mxnet::TShape gshape(2, -1);
-    gshape[0] = in_attrs->at(i - num_g + 1)[0];
-    gshape[1] = in_attrs->at(i - num_g + 1)[0];
+    gshape[0]        = in_attrs->at(i - num_g + 1)[0];
+    gshape[1]        = in_attrs->at(i - num_g + 1)[0];
     out_attrs->at(i) = gshape;
   }
   return true;
 }
 
 static bool DGLSubgraphType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
-  size_t num_g = params.num_args - 1;
+  size_t num_g                   = params.num_args - 1;
   for (size_t i = 0; i < num_g; i++) {
     CHECK_EQ(in_attrs->at(i + 1), mshadow::kInt64);
   }
-  for (int & out_attr : *out_attrs) {
+  for (int& out_attr : *out_attrs) {
     out_attr = in_attrs->at(0);
   }
   return true;
@@ -1014,8 +987,9 @@ class Bitmap {
   size_t hash(dgl_id_t id) const {
     return id & mask;
   }
+
  public:
-  Bitmap(const dgl_id_t *vid_data, int64_t len): map(size) {
+  Bitmap(const dgl_id_t* vid_data, int64_t len) : map(size) {
     for (int64_t i = 0; i < len; ++i) {
       map[hash(vid_data[i])] = true;
     }
@@ -1034,27 +1008,30 @@ class HashTableChecker {
   Bitmap map;
 
  public:
-  HashTableChecker(const dgl_id_t *vid_data, int64_t len): map(vid_data, len) {
+  HashTableChecker(const dgl_id_t* vid_data, int64_t len) : map(vid_data, len) {
     oldv2newv.reserve(len);
     for (int64_t i = 0; i < len; ++i) {
       oldv2newv[vid_data[i]] = i;
     }
   }
 
-  void CollectOnRow(const dgl_id_t col_idx[], const dgl_id_t eids[], size_t row_len,
-                    std::vector<dgl_id_t> *new_col_idx,
-                    std::vector<dgl_id_t> *orig_eids) {
+  void CollectOnRow(const dgl_id_t col_idx[],
+                    const dgl_id_t eids[],
+                    size_t row_len,
+                    std::vector<dgl_id_t>* new_col_idx,
+                    std::vector<dgl_id_t>* orig_eids) {
     // TODO(zhengda) I need to make sure the column index in each row is sorted.
     for (size_t j = 0; j < row_len; ++j) {
       const dgl_id_t oldsucc = col_idx[j];
-      const dgl_id_t eid = eids[j];
+      const dgl_id_t eid     = eids[j];
       Collect(oldsucc, eid, new_col_idx, orig_eids);
     }
   }
 
-  void Collect(const dgl_id_t old_id, const dgl_id_t old_eid,
-               std::vector<dgl_id_t> *col_idx,
-               std::vector<dgl_id_t> *orig_eids) {
+  void Collect(const dgl_id_t old_id,
+               const dgl_id_t old_eid,
+               std::vector<dgl_id_t>* col_idx,
+               std::vector<dgl_id_t>* orig_eids) {
     if (!map.test(old_id))
       return;
 
@@ -1068,12 +1045,14 @@ class HashTableChecker {
   }
 };
 
-static void GetSubgraph(const NDArray &csr_arr, const NDArray &varr,
-                        const NDArray &sub_csr, const NDArray *old_eids) {
-  const TBlob &data = varr.data();
-  int64_t num_vertices = csr_arr.shape()[0];
-  const size_t len = varr.shape()[0];
-  const dgl_id_t *vid_data = data.dptr<dgl_id_t>();
+static void GetSubgraph(const NDArray& csr_arr,
+                        const NDArray& varr,
+                        const NDArray& sub_csr,
+                        const NDArray* old_eids) {
+  const TBlob& data        = varr.data();
+  int64_t num_vertices     = csr_arr.shape()[0];
+  const size_t len         = varr.shape()[0];
+  const dgl_id_t* vid_data = data.dptr<dgl_id_t>();
   HashTableChecker def_check(vid_data, len);
   // check if varr is sorted.
   CHECK(std::is_sorted(vid_data, vid_data + len)) << "The input vertex list has to be sorted";
@@ -1084,17 +1063,20 @@ static void GetSubgraph(const NDArray &csr_arr, const NDArray &varr,
   std::vector<dgl_id_t> orig_eids;
   col_idx.reserve(len * 50);
   orig_eids.reserve(len * 50);
-  const dgl_id_t *eids = csr_arr.data().dptr<dgl_id_t>();
-  const dgl_id_t *indptr = csr_arr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
-  const dgl_id_t *indices = csr_arr.aux_data(csr::kIdx).dptr<dgl_id_t>();
+  const dgl_id_t* eids    = csr_arr.data().dptr<dgl_id_t>();
+  const dgl_id_t* indptr  = csr_arr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
+  const dgl_id_t* indices = csr_arr.aux_data(csr::kIdx).dptr<dgl_id_t>();
   for (size_t i = 0; i < len; ++i) {
     const dgl_id_t oldvid = vid_data[i];
-    CHECK_LT(oldvid, num_vertices) << "Vertex Id " << oldvid << " isn't in a graph of "
-        << num_vertices << " vertices";
+    CHECK_LT(oldvid, num_vertices)
+        << "Vertex Id " << oldvid << " isn't in a graph of " << num_vertices << " vertices";
     size_t row_start = indptr[oldvid];
-    size_t row_len = indptr[oldvid + 1] - indptr[oldvid];
-    def_check.CollectOnRow(indices + row_start, eids + row_start, row_len,
-                           &col_idx, old_eids == nullptr ? nullptr : &orig_eids);
+    size_t row_len   = indptr[oldvid + 1] - indptr[oldvid];
+    def_check.CollectOnRow(indices + row_start,
+                           eids + row_start,
+                           row_len,
+                           &col_idx,
+                           old_eids == nullptr ? nullptr : &orig_eids);
 
     row_idx[i + 1] = col_idx.size();
   }
@@ -1108,11 +1090,11 @@ static void GetSubgraph(const NDArray &csr_arr, const NDArray &varr,
   sub_csr.CheckAndAllocData(nz_shape);
   sub_csr.CheckAndAllocAuxData(csr::kIdx, nz_shape);
   sub_csr.CheckAndAllocAuxData(csr::kIndPtr, indptr_shape);
-  dgl_id_t *indices_out = sub_csr.aux_data(csr::kIdx).dptr<dgl_id_t>();
-  dgl_id_t *indptr_out = sub_csr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
+  dgl_id_t* indices_out = sub_csr.aux_data(csr::kIdx).dptr<dgl_id_t>();
+  dgl_id_t* indptr_out  = sub_csr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
   std::copy(col_idx.begin(), col_idx.end(), indices_out);
   std::copy(row_idx.begin(), row_idx.end(), indptr_out);
-  dgl_id_t *sub_eids = sub_csr.data().dptr<dgl_id_t>();
+  dgl_id_t* sub_eids = sub_csr.data().dptr<dgl_id_t>();
   for (int64_t i = 0; i < nz_shape[0]; i++)
     sub_eids[i] = i;
 
@@ -1121,9 +1103,9 @@ static void GetSubgraph(const NDArray &csr_arr, const NDArray &varr,
     old_eids->CheckAndAllocData(nz_shape);
     old_eids->CheckAndAllocAuxData(csr::kIdx, nz_shape);
     old_eids->CheckAndAllocAuxData(csr::kIndPtr, indptr_shape);
-    dgl_id_t *indices_out = old_eids->aux_data(csr::kIdx).dptr<dgl_id_t>();
-    dgl_id_t *indptr_out = old_eids->aux_data(csr::kIndPtr).dptr<dgl_id_t>();
-    dgl_id_t *sub_eids = old_eids->data().dptr<dgl_id_t>();
+    dgl_id_t* indices_out = old_eids->aux_data(csr::kIdx).dptr<dgl_id_t>();
+    dgl_id_t* indptr_out  = old_eids->aux_data(csr::kIndPtr).dptr<dgl_id_t>();
+    dgl_id_t* sub_eids    = old_eids->data().dptr<dgl_id_t>();
     std::copy(col_idx.begin(), col_idx.end(), indices_out);
     std::copy(row_idx.begin(), row_idx.end(), indptr_out);
     std::copy(orig_eids.begin(), orig_eids.end(), sub_eids);
@@ -1136,16 +1118,16 @@ static void DGLSubgraphComputeExCPU(const nnvm::NodeAttrs& attrs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<NDArray>& outputs) {
   const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
-  int num_g = params.num_args - 1;
+  int num_g                      = params.num_args - 1;
 #pragma omp parallel for
   for (int i = 0; i < num_g; i++) {
-    const NDArray *old_eids = params.return_mapping ? &outputs[i + num_g] : nullptr;
+    const NDArray* old_eids = params.return_mapping ? &outputs[i + num_g] : nullptr;
     GetSubgraph(inputs[0], inputs[i + 1], outputs[i], old_eids);
   }
 }
 
 NNVM_REGISTER_OP(_contrib_dgl_subgraph)
-.describe(R"code(This operator constructs an induced subgraph for
+    .describe(R"code(This operator constructs an induced subgraph for
 a given set of vertices from a graph. The operator accepts multiple
 sets of vertices as input. For each set of vertices, it returns a pair
 of CSR matrices if return_mapping is True: the first matrix contains edges
@@ -1170,38 +1152,40 @@ edge Ids.
         [0, 5, 0]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<DGLSubgraphParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
-  int num_varray = params.num_args - 1;
-  if (params.return_mapping)
-    return num_varray * 2;
-  else
-    return num_varray;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.reserve(params.num_args);
-  names.emplace_back("graph");
-  for (int i = 1; i < params.num_args; ++i)
-    names.push_back("varray" + std::to_string(i - 1));
-  return names;
-})
-.set_attr<FInferStorageType>("FInferStorageType", DGLSubgraphStorageType)
-.set_attr<mxnet::FInferShape>("FInferShape", DGLSubgraphShape)
-.set_attr<nnvm::FInferType>("FInferType", DGLSubgraphType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DGLSubgraphComputeExCPU)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("graph", "NDArray-or-Symbol", "Input graph where we sample vertices.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(DGLSubgraphParam::__FIELDS__());
+    .set_attr_parser(ParamParser<DGLSubgraphParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const DGLSubgraphParam& params = nnvm::get<DGLSubgraphParam>(attrs.parsed);
+      int num_varray                 = params.num_args - 1;
+      if (params.return_mapping)
+        return num_varray * 2;
+      else
+        return num_varray;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const DGLSubgraphParam& params =
+                                           nnvm::get<DGLSubgraphParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.reserve(params.num_args);
+                                       names.emplace_back("graph");
+                                       for (int i = 1; i < params.num_args; ++i)
+                                         names.push_back("varray" + std::to_string(i - 1));
+                                       return names;
+                                     })
+    .set_attr<FInferStorageType>("FInferStorageType", DGLSubgraphStorageType)
+    .set_attr<mxnet::FInferShape>("FInferShape", DGLSubgraphShape)
+    .set_attr<nnvm::FInferType>("FInferType", DGLSubgraphType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DGLSubgraphComputeExCPU)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("graph", "NDArray-or-Symbol", "Input graph where we sample vertices.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(DGLSubgraphParam::__FIELDS__());
 
 ///////////////////////// Edge Id ///////////////////////////
 
@@ -1238,13 +1222,13 @@ inline bool EdgeIDStorageType(const nnvm::NodeAttrs& attrs,
                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U) << "Only works for 2d arrays";
   CHECK_EQ(out_attrs->size(), 1U);
-  int& in_stype = in_attrs->at(0);
-  int& out_stype = out_attrs->at(0);
+  int& in_stype   = in_attrs->at(0);
+  int& out_stype  = out_attrs->at(0);
   bool dispatched = false;
   if (!dispatched && in_stype == kCSRStorage) {
     // csr -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     LOG(ERROR) << "Cannot dispatch edge_id storage type, only works for csr matrices";
@@ -1253,14 +1237,19 @@ inline bool EdgeIDStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 struct edge_id_csr_forward {
-  template<typename DType, typename IType, typename CType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, const DType* in_data,
-                                  const IType* in_indices, const IType* in_indptr,
-                                  const CType* u, const CType* v) {
+  template <typename DType, typename IType, typename CType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* in_indices,
+                                  const IType* in_indptr,
+                                  const CType* u,
+                                  const CType* v) {
     const int64_t target_row_id = static_cast<int64_t>(u[i]);
-    const IType target_col_id = static_cast<IType>(v[i]);
-    auto ptr = std::find(in_indices + in_indptr[target_row_id],
-                         in_indices + in_indptr[target_row_id + 1], target_col_id);
+    const IType target_col_id   = static_cast<IType>(v[i]);
+    auto ptr                    = std::find(in_indices + in_indptr[target_row_id],
+                         in_indices + in_indptr[target_row_id + 1],
+                         target_col_id);
     if (ptr == in_indices + in_indptr[target_row_id + 1]) {
       // does not exist in the range
       out_data[i] = DType(-1);
@@ -1270,7 +1259,7 @@ struct edge_id_csr_forward {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void EdgeIDForwardCsrImpl(const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
                           const OpReqType req,
@@ -1278,40 +1267,45 @@ void EdgeIDForwardCsrImpl(const OpContext& ctx,
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace csr;
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(req, kWriteTo) << "EdgeID with CSR only supports kWriteTo";
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const NDArray& u = inputs[1];
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
+  const NDArray& u      = inputs[1];
   const dim_t out_elems = u.shape().Size();
   if (!inputs[0].storage_initialized()) {
     MSHADOW_TYPE_SWITCH(output.dtype(), DType, {
       Kernel<mxnet_op::op_with_req<mshadow_op::identity, kWriteTo>, xpu>::Launch(
-        s, out_elems, output.data().dptr<DType>(), DType(-1));
+          s, out_elems, output.data().dptr<DType>(), DType(-1));
     });
     return;
   }
-  const NDArray& data = inputs[0];
-  const TBlob& in_data = data.data();
+  const NDArray& data     = inputs[0];
+  const TBlob& in_data    = data.data();
   const TBlob& in_indices = data.aux_data(kIdx);
-  const TBlob& in_indptr = data.aux_data(kIndPtr);
-  const NDArray& v = inputs[2];
+  const TBlob& in_indptr  = data.aux_data(kIndPtr);
+  const NDArray& v        = inputs[2];
 
   CHECK_EQ(data.aux_type(kIdx), data.aux_type(kIndPtr))
-    << "The dtypes of indices and indptr don't match";
+      << "The dtypes of indices and indptr don't match";
   MSHADOW_TYPE_SWITCH(data.dtype(), DType, {
     MSHADOW_IDX_TYPE_SWITCH(data.aux_type(kIdx), IType, {
       MSHADOW_TYPE_SWITCH(u.dtype(), CType, {
-        Kernel<edge_id_csr_forward, xpu>::Launch(
-            s, out_elems, output.data().dptr<DType>(), in_data.dptr<DType>(),
-            in_indices.dptr<IType>(), in_indptr.dptr<IType>(),
-            u.data().dptr<CType>(), v.data().dptr<CType>());
+        Kernel<edge_id_csr_forward, xpu>::Launch(s,
+                                                 out_elems,
+                                                 output.data().dptr<DType>(),
+                                                 in_data.dptr<DType>(),
+                                                 in_indices.dptr<IType>(),
+                                                 in_indptr.dptr<IType>(),
+                                                 u.data().dptr<CType>(),
+                                                 v.data().dptr<CType>());
       });
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void EdgeIDForwardEx(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<NDArray>& inputs,
@@ -1320,7 +1314,7 @@ void EdgeIDForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const auto in_stype = inputs[0].storage_type();
+  const auto in_stype  = inputs[0].storage_type();
   const auto out_stype = outputs[0].storage_type();
   if (in_stype == kCSRStorage && out_stype == kDefaultStorage) {
     EdgeIDForwardCsrImpl<xpu>(ctx, inputs, req[0], outputs[0]);
@@ -1330,7 +1324,7 @@ void EdgeIDForwardEx(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_edge_id)
-.describe(R"code(This operator implements the edge_id function for a graph
+    .describe(R"code(This operator implements the edge_id function for a graph
 stored in a CSR matrix (the value of the CSR stores the edge Id of the graph).
 output[i] = input[u[i], v[i]] if there is an edge between u[i] and v[i]],
 otherwise output[i] will be -1. Both u and v should be 1D vectors.
@@ -1351,19 +1345,19 @@ The storage type of ``edge_id`` output depends on storage types of inputs
   - default and rsp inputs are not supported
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "u", "v"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", EdgeIDShape)
-.set_attr<nnvm::FInferType>("FInferType", EdgeIDType)
-.set_attr<FInferStorageType>("FInferStorageType", EdgeIDStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", EdgeIDForwardEx<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("u", "NDArray-or-Symbol", "u ndarray")
-.add_argument("v", "NDArray-or-Symbol", "v ndarray");
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "u", "v"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", EdgeIDShape)
+    .set_attr<nnvm::FInferType>("FInferType", EdgeIDType)
+    .set_attr<FInferStorageType>("FInferStorageType", EdgeIDStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", EdgeIDForwardEx<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("u", "NDArray-or-Symbol", "u ndarray")
+    .add_argument("v", "NDArray-or-Symbol", "v ndarray");
 
 ///////////////////////// DGL Adjacency ///////////////////////////
 
@@ -1396,17 +1390,17 @@ inline bool DGLAdjacencyStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U) << "Only works for 2d arrays";
   CHECK_EQ(out_attrs->size(), 1U);
   int& out_stype = out_attrs->at(0);
-  bool dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                        dispatch_mode, DispatchMode::kFComputeEx);
+  bool dispatched =
+      storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   if (!dispatched) {
     LOG(ERROR) << "Cannot dispatch output storage type: " << common::stype_string(out_stype)
-        << ". dgl_adjacency only works for csr matrices";
+               << ". dgl_adjacency only works for csr matrices";
   }
   return dispatched;
 }
 
 NNVM_REGISTER_OP(_contrib_dgl_adjacency)
-.describe(R"code(This operator converts a CSR matrix whose values are edge Ids
+    .describe(R"code(This operator converts a CSR matrix whose values are edge Ids
 to an adjacency matrix whose values are ones. The output CSR matrix always has
 the data value of float32.
 
@@ -1423,17 +1417,17 @@ the data value of float32.
        [ 0, 0, 1 ]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", DGLAdjacencyShape)
-.set_attr<nnvm::FInferType>("FInferType", DGLAdjacencyType)
-.set_attr<FInferStorageType>("FInferStorageType", DGLAdjacencyStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DGLAdjacencyForwardEx<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", DGLAdjacencyShape)
+    .set_attr<nnvm::FInferType>("FInferType", DGLAdjacencyType)
+    .set_attr<FInferStorageType>("FInferStorageType", DGLAdjacencyStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DGLAdjacencyForwardEx<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray");
 
 ///////////////////////// Compact subgraphs ///////////////////////////
 
@@ -1442,30 +1436,30 @@ struct SubgraphCompactParam : public dmlc::Parameter<SubgraphCompactParam> {
   bool return_mapping;
   mxnet::Tuple<dim_t> graph_sizes;
   DMLC_DECLARE_PARAMETER(SubgraphCompactParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2)
-    .describe("Number of input arguments.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2).describe("Number of input arguments.");
     DMLC_DECLARE_FIELD(return_mapping)
-    .describe("Return mapping of vid and eid between the subgraph and the parent graph.");
-    DMLC_DECLARE_FIELD(graph_sizes)
-    .describe("the number of vertices in each graph.");
+        .describe("Return mapping of vid and eid between the subgraph and the parent graph.");
+    DMLC_DECLARE_FIELD(graph_sizes).describe("the number of vertices in each graph.");
   }
 };  // struct SubgraphCompactParam
 
 DMLC_REGISTER_PARAMETER(SubgraphCompactParam);
 
-static inline size_t get_num_graphs(const SubgraphCompactParam &params) {
+static inline size_t get_num_graphs(const SubgraphCompactParam& params) {
   // Each CSR needs a 1D array to store the original vertex Id for each row.
   return params.num_args / 2;
 }
 
-static void CompactSubgraph(const NDArray &csr, const NDArray &vids,
-                            const NDArray &out_csr, size_t graph_size) {
-  TBlob in_idx_data = csr.aux_data(csr::kIdx);
-  TBlob in_ptr_data = csr.aux_data(csr::kIndPtr);
-  const dgl_id_t *indices_in = in_idx_data.dptr<dgl_id_t>();
-  const dgl_id_t *indptr_in = in_ptr_data.dptr<dgl_id_t>();
-  const dgl_id_t *row_ids = vids.data().dptr<dgl_id_t>();
-  size_t num_elems = csr.aux_data(csr::kIdx).shape_.Size();
+static void CompactSubgraph(const NDArray& csr,
+                            const NDArray& vids,
+                            const NDArray& out_csr,
+                            size_t graph_size) {
+  TBlob in_idx_data          = csr.aux_data(csr::kIdx);
+  TBlob in_ptr_data          = csr.aux_data(csr::kIndPtr);
+  const dgl_id_t* indices_in = in_idx_data.dptr<dgl_id_t>();
+  const dgl_id_t* indptr_in  = in_ptr_data.dptr<dgl_id_t>();
+  const dgl_id_t* row_ids    = vids.data().dptr<dgl_id_t>();
+  size_t num_elems           = csr.aux_data(csr::kIdx).shape_.Size();
   // The last element in vids is the actual number of vertices in the subgraph.
   CHECK_EQ(vids.shape()[0], in_ptr_data.shape_[0]);
   CHECK_EQ(static_cast<size_t>(row_ids[vids.shape()[0] - 1]), graph_size);
@@ -1489,16 +1483,16 @@ static void CompactSubgraph(const NDArray &csr, const NDArray &vids,
   out_csr.CheckAndAllocAuxData(csr::kIdx, nz_shape);
   out_csr.CheckAndAllocAuxData(csr::kIndPtr, indptr_shape);
 
-  dgl_id_t *indices_out = out_csr.aux_data(csr::kIdx).dptr<dgl_id_t>();
-  dgl_id_t *indptr_out = out_csr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
-  dgl_id_t *sub_eids = out_csr.data().dptr<dgl_id_t>();
+  dgl_id_t* indices_out = out_csr.aux_data(csr::kIdx).dptr<dgl_id_t>();
+  dgl_id_t* indptr_out  = out_csr.aux_data(csr::kIndPtr).dptr<dgl_id_t>();
+  dgl_id_t* sub_eids    = out_csr.data().dptr<dgl_id_t>();
   std::copy(indptr_in, indptr_in + indptr_shape[0], indptr_out);
   for (int64_t i = 0; i < nz_shape[0]; i++) {
     dgl_id_t old_id = indices_in[i];
-    auto it = id_map.find(old_id);
+    auto it         = id_map.find(old_id);
     CHECK(it != id_map.end());
     indices_out[i] = it->second;
-    sub_eids[i] = i;
+    sub_eids[i]    = i;
   }
 }
 
@@ -1508,7 +1502,7 @@ static void SubgraphCompactComputeExCPU(const nnvm::NodeAttrs& attrs,
                                         const std::vector<OpReqType>& req,
                                         const std::vector<NDArray>& outputs) {
   const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
-  int num_g = get_num_graphs(params);
+  int num_g                          = get_num_graphs(params);
 #pragma omp parallel for
   for (int i = 0; i < num_g; i++) {
     CompactSubgraph(inputs[i], inputs[i + num_g], outputs[i], params.graph_sizes[i]);
@@ -1518,10 +1512,10 @@ static void SubgraphCompactComputeExCPU(const nnvm::NodeAttrs& attrs,
 static bool SubgraphCompactStorageType(const nnvm::NodeAttrs& attrs,
                                        const int dev_mask,
                                        DispatchMode* dispatch_mode,
-                                       std::vector<int> *in_attrs,
-                                       std::vector<int> *out_attrs) {
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs) {
   const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
-  size_t num_g = get_num_graphs(params);
+  size_t num_g                       = get_num_graphs(params);
   CHECK_EQ(num_g * 2, in_attrs->size());
   // These are the input subgraphs.
   for (size_t i = 0; i < num_g; i++)
@@ -1530,9 +1524,9 @@ static bool SubgraphCompactStorageType(const nnvm::NodeAttrs& attrs,
   for (size_t i = 0; i < num_g; i++)
     CHECK_EQ(in_attrs->at(i + num_g), kDefaultStorage);
 
-  bool success = true;
+  bool success   = true;
   *dispatch_mode = DispatchMode::kFComputeEx;
-  for (int & out_attr : *out_attrs) {
+  for (int& out_attr : *out_attrs) {
     if (!type_assign(&out_attr, mxnet::kCSRStorage))
       success = false;
   }
@@ -1540,10 +1534,10 @@ static bool SubgraphCompactStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 static bool SubgraphCompactShape(const nnvm::NodeAttrs& attrs,
-                                 mxnet::ShapeVector *in_attrs,
-                                 mxnet::ShapeVector *out_attrs) {
+                                 mxnet::ShapeVector* in_attrs,
+                                 mxnet::ShapeVector* out_attrs) {
   const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
-  size_t num_g = get_num_graphs(params);
+  size_t num_g                       = get_num_graphs(params);
   CHECK_EQ(num_g * 2, in_attrs->size());
   // These are the input subgraphs.
   for (size_t i = 0; i < num_g; i++) {
@@ -1559,8 +1553,8 @@ static bool SubgraphCompactShape(const nnvm::NodeAttrs& attrs,
 
   for (size_t i = 0; i < num_g; i++) {
     mxnet::TShape gshape(2, -1);
-    gshape[0] = params.graph_sizes[i];
-    gshape[1] = params.graph_sizes[i];
+    gshape[0]        = params.graph_sizes[i];
+    gshape[1]        = params.graph_sizes[i];
     out_attrs->at(i) = gshape;
     if (params.return_mapping)
       out_attrs->at(i + num_g) = gshape;
@@ -1569,19 +1563,19 @@ static bool SubgraphCompactShape(const nnvm::NodeAttrs& attrs,
 }
 
 static bool SubgraphCompactType(const nnvm::NodeAttrs& attrs,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
-  for (int & in_attr : *in_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
+  for (int& in_attr : *in_attrs) {
     CHECK_EQ(in_attr, mshadow::kInt64);
   }
-  for (int & out_attr : *out_attrs) {
+  for (int& out_attr : *out_attrs) {
     out_attr = mshadow::kInt64;
   }
   return true;
 }
 
 NNVM_REGISTER_OP(_contrib_dgl_graph_compact)
-.describe(R"code(This operator compacts a CSR matrix generated by
+    .describe(R"code(This operator compacts a CSR matrix generated by
 dgl_csr_neighbor_uniform_sample and dgl_csr_neighbor_non_uniform_sample.
 The CSR matrices generated by these two operators may have many empty
 rows at the end and many empty columns. This operator removes these
@@ -1612,38 +1606,39 @@ empty rows and empty columns.
          [8, 9, 0, 0, 0]])
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<SubgraphCompactParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
-  int num_varray = get_num_graphs(params);
-  if (params.return_mapping)
-    return num_varray * 2;
-  else
-    return num_varray;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.reserve(params.num_args);
-  size_t num_graphs = get_num_graphs(params);
-  for (size_t i = 0; i < num_graphs; i++)
-    names.push_back("graph" + std::to_string(i));
-  for (size_t i = 0; i < num_graphs; ++i)
-    names.push_back("varray" + std::to_string(i));
-  return names;
-})
-.set_attr<FInferStorageType>("FInferStorageType", SubgraphCompactStorageType)
-.set_attr<mxnet::FInferShape>("FInferShape", SubgraphCompactShape)
-.set_attr<nnvm::FInferType>("FInferType", SubgraphCompactType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SubgraphCompactComputeExCPU)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("graph_data", "NDArray-or-Symbol[]", "Input graphs and input vertex Ids.")
-.add_arguments(SubgraphCompactParam::__FIELDS__());
+    .set_attr_parser(ParamParser<SubgraphCompactParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const SubgraphCompactParam& params = nnvm::get<SubgraphCompactParam>(attrs.parsed);
+      int num_varray                     = get_num_graphs(params);
+      if (params.return_mapping)
+        return num_varray * 2;
+      else
+        return num_varray;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const SubgraphCompactParam& params =
+                                           nnvm::get<SubgraphCompactParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.reserve(params.num_args);
+                                       size_t num_graphs = get_num_graphs(params);
+                                       for (size_t i = 0; i < num_graphs; i++)
+                                         names.push_back("graph" + std::to_string(i));
+                                       for (size_t i = 0; i < num_graphs; ++i)
+                                         names.push_back("varray" + std::to_string(i));
+                                       return names;
+                                     })
+    .set_attr<FInferStorageType>("FInferStorageType", SubgraphCompactStorageType)
+    .set_attr<mxnet::FInferShape>("FInferShape", SubgraphCompactShape)
+    .set_attr<nnvm::FInferType>("FInferType", SubgraphCompactType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SubgraphCompactComputeExCPU)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("graph_data", "NDArray-or-Symbol[]", "Input graphs and input vertex Ids.")
+    .add_arguments(SubgraphCompactParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/dgl_graph.cu b/src/operator/contrib/dgl_graph.cu
index 336e9d4f8026..68c1d8b76537 100644
--- a/src/operator/contrib/dgl_graph.cu
+++ b/src/operator/contrib/dgl_graph.cu
@@ -23,7 +23,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_dgl_adjacency)
-.set_attr<FComputeEx>("FComputeEx<gpu>", DGLAdjacencyForwardEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", DGLAdjacencyForwardEx<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/dynamic_shape_ops-inl.h b/src/operator/contrib/dynamic_shape_ops-inl.h
index 1d1aff8a80a6..91e8f1e47f6e 100644
--- a/src/operator/contrib/dynamic_shape_ops-inl.h
+++ b/src/operator/contrib/dynamic_shape_ops-inl.h
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file dynamic_shape_ops-inl.h
-*/
+ */
 
 #ifndef MXNET_OPERATOR_CONTRIB_DYNAMIC_SHAPE_OPS_INL_H_
 #define MXNET_OPERATOR_CONTRIB_DYNAMIC_SHAPE_OPS_INL_H_
@@ -32,17 +32,17 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
+template <typename xpu>
 inline void DynamicReshapeForward(const nnvm::NodeAttrs& attrs,
-                            const OpContext &ctx,
-                            const std::vector<NDArray> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<NDArray> &outputs) {
+                                  const OpContext& ctx,
+                                  const std::vector<NDArray>& inputs,
+                                  const std::vector<OpReqType>& req,
+                                  const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  const NDArray &out = outputs[0];
-  const NDArray &idx = inputs[1];
-  size_t idx_size = idx.shape()[0];
+  const NDArray& out        = outputs[0];
+  const NDArray& idx        = inputs[1];
+  size_t idx_size           = idx.shape()[0];
   mxnet::TShape shape_value = mxnet::TShape(idx_size, 0);
   std::vector<index_t> shapev(idx_size, 0);
 
@@ -55,32 +55,33 @@ inline void DynamicReshapeForward(const nnvm::NodeAttrs& attrs,
     }
   });
   shape_value = InferReshapeShape(mxnet::Tuple<index_t>(shapev), inputs[0].shape(), false);
-  const_cast<NDArray &>(out).Init(shape_value);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const_cast<NDArray&>(out).Init(shape_value);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_TYPE_SWITCH(out.dtype(), DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
-          s, inputs[0].data().Size(), out.data().dptr<DType>(),
-          inputs[0].data().dptr<DType>());
+          s, inputs[0].data().Size(), out.data().dptr<DType>(), inputs[0].data().dptr<DType>());
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void DynamicReshapeBackward(const nnvm::NodeAttrs& attrs,
-                            const OpContext &ctx,
-                            const std::vector<NDArray> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<NDArray> &outputs) {
+                                   const OpContext& ctx,
+                                   const std::vector<NDArray>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
-          s, inputs[0].data().Size(), outputs[0].data().dptr<DType>(),
+          s,
+          inputs[0].data().Size(),
+          outputs[0].data().dptr<DType>(),
           inputs[0].data().dptr<DType>());
     });
   });
diff --git a/src/operator/contrib/dynamic_shape_ops.cc b/src/operator/contrib/dynamic_shape_ops.cc
index 1b5274cea4fe..8610d345de6d 100644
--- a/src/operator/contrib/dynamic_shape_ops.cc
+++ b/src/operator/contrib/dynamic_shape_ops.cc
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file dynamic_shape_ops.cc
-*/
+ */
 
 #include "./dynamic_shape_ops-inl.h"
 #include "../tensor/elemwise_binary_op.h"
@@ -29,8 +29,8 @@ namespace mxnet {
 namespace op {
 
 inline bool DynamicReshapeType(const nnvm::NodeAttrs& attrs,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, (*in_attrs)[0]);
@@ -41,8 +41,8 @@ inline bool DynamicReshapeType(const nnvm::NodeAttrs& attrs,
 bool DynamicReshapeStorageType(const nnvm::NodeAttrs& attrs,
                                const int dev_mask,
                                DispatchMode* dispatch_mode,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
   for (size_t i = 0; i < in_attrs->size(); ++i) {
@@ -58,8 +58,8 @@ bool DynamicReshapeStorageType(const nnvm::NodeAttrs& attrs,
 bool DynamicReshapeBackwardStorageType(const nnvm::NodeAttrs& attrs,
                                        const int dev_mask,
                                        DispatchMode* dispatch_mode,
-                                       std::vector<int> *in_attrs,
-                                       std::vector<int> *out_attrs) {
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 2);
   for (size_t i = 0; i < in_attrs->size(); ++i) {
@@ -73,7 +73,7 @@ bool DynamicReshapeBackwardStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_dynamic_reshape)
-.describe(R"code(
+    .describe(R"code(
 Experimental support for reshape operator with dynamic shape.
 
 Accepts 2 inputs - data and shape.
@@ -119,26 +119,26 @@ Example::
    // out will be of shape (2,75)
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "shape"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", DynamicReshapeType)
-.set_attr<FInferStorageType>("FInferStorageType", DynamicReshapeStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DynamicReshapeForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_contrib_dynamic_reshape"})
-.add_argument("data", "NDArray-or-Symbol", "Data")
-.add_argument("shape", "NDArray-or-Symbol", "Shape");
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "shape"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", DynamicReshapeType)
+    .set_attr<FInferStorageType>("FInferStorageType", DynamicReshapeStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DynamicReshapeForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseNone{"_backward_contrib_dynamic_reshape"})
+    .add_argument("data", "NDArray-or-Symbol", "Data")
+    .add_argument("shape", "NDArray-or-Symbol", "Shape");
 
 NNVM_REGISTER_OP(_backward_contrib_dynamic_reshape)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", DynamicReshapeBackwardStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DynamicReshapeBackward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", DynamicReshapeBackwardStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DynamicReshapeBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/erfinv-inl.h b/src/operator/contrib/erfinv-inl.h
index 728a11918bdd..e0bd2ba08e58 100644
--- a/src/operator/contrib/erfinv-inl.h
+++ b/src/operator/contrib/erfinv-inl.h
@@ -52,7 +52,6 @@ namespace mxnet {
 namespace op {
 namespace mshadow_op {
 
-
 /*
  *     Evaluate polynomial
  *
@@ -96,13 +95,13 @@ namespace mshadow_op {
  */
 
 MSHADOW_XINLINE static double polevl(double x, const double coef[], int N) {
-  const double *p;
+  const double* p;
   double ans;
   int i;
 
-  p = coef;
+  p   = coef;
   ans = *p++;
-  i = N;
+  i   = N;
 
   do {
     ans = ans * x + *p++;
@@ -112,13 +111,13 @@ MSHADOW_XINLINE static double polevl(double x, const double coef[], int N) {
 }
 
 MSHADOW_XINLINE static double p1evl(double x, const double coef[], int N) {
-  const double *p;
+  const double* p;
   double ans;
   int i;
 
-  p = coef;
+  p   = coef;
   ans = x + *p++;
-  i = N - 1;
+  i   = N - 1;
 
   do {
     ans = ans * x + *p++;
@@ -127,7 +126,6 @@ MSHADOW_XINLINE static double p1evl(double x, const double coef[], int N) {
   return (ans);
 }
 
-
 /* Inverse of Normal distribution function
  *
  * SYNOPSIS:
@@ -172,97 +170,97 @@ MSHADOW_XINLINE static double ndtri(double y0) {
 
   /* approximation for 0 <= |y - 0.5| <= 3/8 */
   double P0[5] = {
-    -5.99633501014107895267E1,
-    9.80010754185999661536E1,
-    -5.66762857469070293439E1,
-    1.39312609387279679503E1,
-    -1.23916583867381258016E0,
+      -5.99633501014107895267E1,
+      9.80010754185999661536E1,
+      -5.66762857469070293439E1,
+      1.39312609387279679503E1,
+      -1.23916583867381258016E0,
   };
   double Q0[8] = {
-    /* 1.00000000000000000000E0, */
-    1.95448858338141759834E0,
-    4.67627912898881538453E0,
-    8.63602421390890590575E1,
-    -2.25462687854119370527E2,
-    2.00260212380060660359E2,
-    -8.20372256168333339912E1,
-    1.59056225126211695515E1,
-    -1.18331621121330003142E0,
+      /* 1.00000000000000000000E0, */
+      1.95448858338141759834E0,
+      4.67627912898881538453E0,
+      8.63602421390890590575E1,
+      -2.25462687854119370527E2,
+      2.00260212380060660359E2,
+      -8.20372256168333339912E1,
+      1.59056225126211695515E1,
+      -1.18331621121330003142E0,
   };
 
   /* Approximation for interval z = sqrt(-2 log y ) between 2 and 8
    * i.e., y between exp(-2) = .135 and exp(-32) = 1.27e-14.
    */
   double P1[9] = {
-    4.05544892305962419923E0,
-    3.15251094599893866154E1,
-    5.71628192246421288162E1,
-    4.40805073893200834700E1,
-    1.46849561928858024014E1,
-    2.18663306850790267539E0,
-    -1.40256079171354495875E-1,
-    -3.50424626827848203418E-2,
-    -8.57456785154685413611E-4,
+      4.05544892305962419923E0,
+      3.15251094599893866154E1,
+      5.71628192246421288162E1,
+      4.40805073893200834700E1,
+      1.46849561928858024014E1,
+      2.18663306850790267539E0,
+      -1.40256079171354495875E-1,
+      -3.50424626827848203418E-2,
+      -8.57456785154685413611E-4,
   };
   double Q1[8] = {
-    /*  1.00000000000000000000E0, */
-    1.57799883256466749731E1,
-    4.53907635128879210584E1,
-    4.13172038254672030440E1,
-    1.50425385692907503408E1,
-    2.50464946208309415979E0,
-    -1.42182922854787788574E-1,
-    -3.80806407691578277194E-2,
-    -9.33259480895457427372E-4,
+      /*  1.00000000000000000000E0, */
+      1.57799883256466749731E1,
+      4.53907635128879210584E1,
+      4.13172038254672030440E1,
+      1.50425385692907503408E1,
+      2.50464946208309415979E0,
+      -1.42182922854787788574E-1,
+      -3.80806407691578277194E-2,
+      -9.33259480895457427372E-4,
   };
 
   /* Approximation for interval z = sqrt(-2 log y ) between 8 and 64
    * i.e., y between exp(-32) = 1.27e-14 and exp(-2048) = 3.67e-890.
    */
   double P2[9] = {
-    3.23774891776946035970E0,
-    6.91522889068984211695E0,
-    3.93881025292474443415E0,
-    1.33303460815807542389E0,
-    2.01485389549179081538E-1,
-    1.23716634817820021358E-2,
-    3.01581553508235416007E-4,
-    2.65806974686737550832E-6,
-    6.23974539184983293730E-9,
+      3.23774891776946035970E0,
+      6.91522889068984211695E0,
+      3.93881025292474443415E0,
+      1.33303460815807542389E0,
+      2.01485389549179081538E-1,
+      1.23716634817820021358E-2,
+      3.01581553508235416007E-4,
+      2.65806974686737550832E-6,
+      6.23974539184983293730E-9,
   };
   double Q2[8] = {
-    /*  1.00000000000000000000E0, */
-    6.02427039364742014255E0,
-    3.67983563856160859403E0,
-    1.37702099489081330271E0,
-    2.16236993594496635890E-1,
-    1.34204006088543189037E-2,
-    3.28014464682127739104E-4,
-    2.89247864745380683936E-6,
-    6.79019408009981274425E-9,
+      /*  1.00000000000000000000E0, */
+      6.02427039364742014255E0,
+      3.67983563856160859403E0,
+      1.37702099489081330271E0,
+      2.16236993594496635890E-1,
+      1.34204006088543189037E-2,
+      3.28014464682127739104E-4,
+      2.89247864745380683936E-6,
+      6.79019408009981274425E-9,
   };
 
   double x, y, z, y2, x0, x1;
   bool code = true;
-  y = y0;
-  if (y > (1.0 - 0.13533528323661269189)) {  /* 0.135... = exp(-2) */
-    y = 1.0 - y;
+  y         = y0;
+  if (y > (1.0 - 0.13533528323661269189)) { /* 0.135... = exp(-2) */
+    y    = 1.0 - y;
     code = false;
   }
 
   if (y > 0.13533528323661269189) {
-    y = y - 0.5;
+    y  = y - 0.5;
     y2 = y * y;
-    x = y + y * (y2 * polevl(y2, P0, 4) / p1evl(y2, Q0, 8));
-    x = x * s2pi;
+    x  = y + y * (y2 * polevl(y2, P0, 4) / p1evl(y2, Q0, 8));
+    x  = x * s2pi;
     return (x);
   }
 
-  x = sqrt(-2.0 * log(y));
+  x  = sqrt(-2.0 * log(y));
   x0 = x - log(x) / x;
 
   z = 1.0 / x;
-  if (x < 8.0) {  /* y > exp(-32) = 1.2664165549e-14 */
+  if (x < 8.0) { /* y > exp(-32) = 1.2664165549e-14 */
     x1 = z * polevl(z, P1, 8) / p1evl(z, Q1, 8);
   } else {
     x1 = z * polevl(z, P2, 8) / p1evl(z, Q2, 8);
@@ -275,10 +273,9 @@ MSHADOW_XINLINE static double ndtri(double y0) {
   return (x);
 }
 
-
 /*! \brief inverse of the error function */
 struct erfinv : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType v) {
     /* Inverse of the error function.
      * Computes the inverse of the error function on the restricted domain
@@ -289,7 +286,7 @@ struct erfinv : public mxnet_op::tunable {
     const double domain_ub = 1;
 
     const double thresh = 1e-7;
-    double y = static_cast<double>(v);
+    double y            = static_cast<double>(v);
 
     /*
      * For small arguments, use the Taylor expansion
@@ -302,7 +299,7 @@ struct erfinv : public mxnet_op::tunable {
     }
 
     if ((domain_lb < y) && (y < domain_ub)) {
-      return DType(ndtri(0.5 * (y+1)) * M_SQRT1_2);
+      return DType(ndtri(0.5 * (y + 1)) * M_SQRT1_2);
     } else if (y == domain_lb || y == domain_ub) {
       return DType(std::copysign(1.0, y) * std::numeric_limits<double>::infinity());
     } else {
diff --git a/src/operator/contrib/fft-inl.h b/src/operator/contrib/fft-inl.h
index 7db8b26a79e2..530412c48016 100644
--- a/src/operator/contrib/fft-inl.h
+++ b/src/operator/contrib/fft-inl.h
@@ -22,7 +22,7 @@
  * \file fft-inl.h
  * \brief
  * \author Chen Zhu
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_FFT_INL_H_
 #define MXNET_OPERATOR_CONTRIB_FFT_INL_H_
 #include <dmlc/logging.h>
@@ -42,34 +42,35 @@
 namespace mxnet {
 namespace op {
 namespace fft {
-enum fftOpInputs {kData};
-enum fftOpOutputs {kOutComplex};  // seperate the image and real parts at the moment
-enum fftOpResource {kTempSpace};  // might be requiered as we need to pad the real matrices
-}
+enum fftOpInputs { kData };
+enum fftOpOutputs { kOutComplex };  // seperate the image and real parts at the moment
+enum fftOpResource { kTempSpace };  // might be requiered as we need to pad the real matrices
+}  // namespace fft
 
 struct FFTParam : public dmlc::Parameter<FFTParam> {
   int compute_size;  // the maximum size of sub-batch to be forwarded through FFT in one time
   DMLC_DECLARE_PARAMETER(FFTParam) {
-    DMLC_DECLARE_FIELD(compute_size).set_default(128)
-    .describe("Maximum size of sub-batch to be forwarded at one time");
+    DMLC_DECLARE_FIELD(compute_size)
+        .set_default(128)
+        .describe("Maximum size of sub-batch to be forwarded at one time");
   }
 };
 
 #if MXNET_USE_CUDA
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class FFTOp : public Operator {
  public:
   explicit FFTOp(FFTParam p) {
     this->param_ = p;
-    init_cufft_ = false;
-    dim_ = 0;
+    init_cufft_  = false;
+    dim_         = 0;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1);
@@ -77,10 +78,10 @@ class FFTOp : public Operator {
 
     // the last dimention should be the dimension of fft vector
     if (!init_cufft_) {
-      n_ffts = in_data[fft::kData].shape_.ProdShape(0, in_data[fft::kData].ndim()-1);
-      dim_ = in_data[fft::kData].shape_[in_data[fft::kData].ndim()-1];
+      n_ffts = in_data[fft::kData].shape_.ProdShape(0, in_data[fft::kData].ndim() - 1);
+      dim_   = in_data[fft::kData].shape_[in_data[fft::kData].ndim() - 1];
 
-      stride_ = param_.compute_size*dim_;
+      stride_ = param_.compute_size * dim_;
 
       init_cufft_ = true;
 
@@ -88,79 +89,75 @@ class FFTOp : public Operator {
       num_compute = n_ffts / param_.compute_size;
     }
 
-
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // const mxnet::TShape& oshape = out_data[fft::kOutComplex].shape_;
-    Tensor<xpu, 2, DType> data = in_data[fft::kData].get_with_shape<xpu, 2, DType>(
-          Shape2(n_ffts, dim_), s);
-    Tensor<xpu, 2, DType> out = out_data[fft::kOutComplex].get_with_shape<xpu, 2, DType>(
-          Shape2(n_ffts, dim_*2), s);
+    Tensor<xpu, 2, DType> data =
+        in_data[fft::kData].get_with_shape<xpu, 2, DType>(Shape2(n_ffts, dim_), s);
+    Tensor<xpu, 2, DType> out =
+        out_data[fft::kOutComplex].get_with_shape<xpu, 2, DType>(Shape2(n_ffts, dim_ * 2), s);
 
     // need temp space to pad the data into complex numbers due to cufft interface
-    Tensor<xpu, 1, DType> workspace =
-            ctx.requested[fft::kTempSpace].get_space_typed<xpu, 1, DType>(
-                Shape1(param_.compute_size*dim_*2), s);
-    Tensor<xpu, 2, DType> complex_data = Tensor<xpu, 2, DType>(workspace.dptr_,
-                                              Shape2(param_.compute_size, dim_*2), s);
+    Tensor<xpu, 1, DType> workspace = ctx.requested[fft::kTempSpace].get_space_typed<xpu, 1, DType>(
+        Shape1(param_.compute_size * dim_ * 2), s);
+    Tensor<xpu, 2, DType> complex_data =
+        Tensor<xpu, 2, DType>(workspace.dptr_, Shape2(param_.compute_size, dim_ * 2), s);
     // start fft
     cufftHandle plan;
     cufftPlanMany(&plan, 1, &dim_, nullptr, 0, 0, nullptr, 0, 0, CUFFT_C2C, param_.compute_size);
-    for (size_t idx=0; idx < num_compute; ++idx) {
-      complex_data = complex_pad_imag(data.Slice(idx*param_.compute_size,
-                                                 idx*param_.compute_size+param_.compute_size));
+    for (size_t idx = 0; idx < num_compute; ++idx) {
+      complex_data = complex_pad_imag(
+          data.Slice(idx * param_.compute_size, idx * param_.compute_size + param_.compute_size));
 
-      cufftComplex* in_tmp = const_cast<cufftComplex*>(
-        reinterpret_cast<const cufftComplex*>(complex_data.dptr_));
-      cufftComplex* out_tmp = reinterpret_cast<cufftComplex*>(out.dptr_ + 2*idx*stride_);
+      cufftComplex* in_tmp =
+          const_cast<cufftComplex*>(reinterpret_cast<const cufftComplex*>(complex_data.dptr_));
+      cufftComplex* out_tmp = reinterpret_cast<cufftComplex*>(out.dptr_ + 2 * idx * stride_);
       CHECK_EQ(cufftExecC2C(plan, in_tmp, out_tmp, CUFFT_FORWARD), CUFFT_SUCCESS);
     }
     cufftDestroy(plan);
 
     // handle the remaining samples
-    size_t remain_num = n_ffts - param_.compute_size*num_compute;
+    size_t remain_num = n_ffts - param_.compute_size * num_compute;
     if (remain_num > 0) {
       cufftHandle plan_remain;
-      cufftPlanMany(&plan_remain, 1, &dim_, nullptr, 0, 0, nullptr, 0, 0,
-                    CUFFT_C2C, remain_num);
+      cufftPlanMany(&plan_remain, 1, &dim_, nullptr, 0, 0, nullptr, 0, 0, CUFFT_C2C, remain_num);
 
-      complex_data = Tensor<xpu, 2, DType>(workspace.dptr_,
-                                          Shape2(remain_num, dim_*2), s);
-      complex_data = complex_pad_imag(data.Slice(
-          num_compute*param_.compute_size, num_compute*param_.compute_size+remain_num));
+      complex_data = Tensor<xpu, 2, DType>(workspace.dptr_, Shape2(remain_num, dim_ * 2), s);
+      complex_data = complex_pad_imag(data.Slice(num_compute * param_.compute_size,
+                                                 num_compute * param_.compute_size + remain_num));
 
-      cufftComplex* in_tmp = const_cast<cufftComplex*>(
-        reinterpret_cast<const cufftComplex*>(complex_data.dptr_));
-      cufftComplex* out_tmp = reinterpret_cast<cufftComplex*>(out.dptr_ + 2*num_compute*stride_);
+      cufftComplex* in_tmp =
+          const_cast<cufftComplex*>(reinterpret_cast<const cufftComplex*>(complex_data.dptr_));
+      cufftComplex* out_tmp =
+          reinterpret_cast<cufftComplex*>(out.dptr_ + 2 * num_compute * stride_);
       CHECK_EQ(cufftExecC2C(plan_remain, in_tmp, out_tmp, CUFFT_FORWARD), CUFFT_SUCCESS);
       cufftDestroy(plan_remain);
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1);
     CHECK(in_data.size() == 1 && in_grad.size() == 1);
     CHECK_EQ(req.size(), 1);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    Tensor<xpu, 2, DType> gdata = in_grad[fft::kData].get_with_shape<xpu, 2, DType>(
-          Shape2(n_ffts, dim_), s);
-    Tensor<xpu, 2, DType> grad = out_grad[fft::kOutComplex].get_with_shape<xpu, 2, DType>(
-          Shape2(n_ffts, dim_*2), s);
+    Tensor<xpu, 2, DType> gdata =
+        in_grad[fft::kData].get_with_shape<xpu, 2, DType>(Shape2(n_ffts, dim_), s);
+    Tensor<xpu, 2, DType> grad =
+        out_grad[fft::kOutComplex].get_with_shape<xpu, 2, DType>(Shape2(n_ffts, dim_ * 2), s);
     // need temp space to pad the data into complex numbers due to cufft interface
-    Tensor<xpu, 1, DType> workspace =
-            ctx.requested[fft::kTempSpace].get_space_typed<xpu, 1, DType>(
-                Shape1(param_.compute_size*dim_*2), s);
-    Tensor<xpu, 2, DType> complex_data = Tensor<xpu, 2, DType>(workspace.dptr_,
-                                              Shape2(param_.compute_size, dim_*2), s);
+    Tensor<xpu, 1, DType> workspace = ctx.requested[fft::kTempSpace].get_space_typed<xpu, 1, DType>(
+        Shape1(param_.compute_size * dim_ * 2), s);
+    Tensor<xpu, 2, DType> complex_data =
+        Tensor<xpu, 2, DType>(workspace.dptr_, Shape2(param_.compute_size, dim_ * 2), s);
 
     // by default, we think forward is firstly conducted
     // In this solution, out_grad must comes from a fft of real signal,
@@ -170,32 +167,32 @@ class FFTOp : public Operator {
     cufftPlanMany(&plan, 1, &dim_, nullptr, 0, 0, nullptr, 0, 0, CUFFT_C2C, param_.compute_size);
     for (size_t idx = 0; idx < num_compute; ++idx) {
       cufftComplex* in_tmp = const_cast<cufftComplex*>(
-        reinterpret_cast<const cufftComplex*>(grad.dptr_ + 2*idx*stride_));
+          reinterpret_cast<const cufftComplex*>(grad.dptr_ + 2 * idx * stride_));
       cufftComplex* out_tmp = reinterpret_cast<cufftComplex*>(complex_data.dptr_);
       CHECK_EQ(cufftExecC2C(plan, in_tmp, out_tmp, CUFFT_INVERSE), CUFFT_SUCCESS);
 
-      Assign(gdata.Slice(idx*param_.compute_size, (idx+1)*param_.compute_size),
-             req[fft::kData], complex_toreal(complex_data));
+      Assign(gdata.Slice(idx * param_.compute_size, (idx + 1) * param_.compute_size),
+             req[fft::kData],
+             complex_toreal(complex_data));
     }
     cufftDestroy(plan);
 
     // handle the remaining samples
-    size_t remain_num = n_ffts - param_.compute_size*num_compute;
+    size_t remain_num = n_ffts - param_.compute_size * num_compute;
     if (remain_num > 0) {
       cufftHandle plan_remain;
-      cufftPlanMany(&plan_remain, 1, &dim_, nullptr, 0, 0, nullptr, 0, 0,
-                    CUFFT_C2C, remain_num);
-      complex_data = Tensor<xpu, 2, DType>(workspace.dptr_,
-                                              Shape2(remain_num, dim_*2), s);
+      cufftPlanMany(&plan_remain, 1, &dim_, nullptr, 0, 0, nullptr, 0, 0, CUFFT_C2C, remain_num);
+      complex_data = Tensor<xpu, 2, DType>(workspace.dptr_, Shape2(remain_num, dim_ * 2), s);
 
       cufftComplex* in_tmp = const_cast<cufftComplex*>(
-        reinterpret_cast<const cufftComplex*>(grad.dptr_ + 2*num_compute*stride_));
+          reinterpret_cast<const cufftComplex*>(grad.dptr_ + 2 * num_compute * stride_));
       cufftComplex* out_tmp = reinterpret_cast<cufftComplex*>(complex_data.dptr_);
       CHECK_EQ(cufftExecC2C(plan_remain, in_tmp, out_tmp, CUFFT_INVERSE), CUFFT_SUCCESS);
 
-      Assign(gdata.Slice(param_.compute_size*num_compute,
-                         param_.compute_size*num_compute+remain_num),
-             req[fft::kData], complex_toreal(complex_data));
+      Assign(gdata.Slice(param_.compute_size * num_compute,
+                         param_.compute_size * num_compute + remain_num),
+             req[fft::kData],
+             complex_toreal(complex_data));
       cufftDestroy(plan_remain);
     }
     // for bp, we should not divide it
@@ -208,11 +205,11 @@ class FFTOp : public Operator {
   int dim_, stride_, n_ffts;
   size_t num_compute;
   bool init_cufft_;
-};  // class FFTOp
+};      // class FFTOp
 #endif  // MXNET_USE_CUDA
 
 // Declare Factory Function, used for dispatch specialization
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(FFTParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -230,27 +227,28 @@ class FFTProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
-    CHECK_EQ(in_shape->size(), 1) <<"Input:[data]";
-    const mxnet::TShape &dshape = (*in_shape)[fft::kData];
+    CHECK_EQ(in_shape->size(), 1) << "Input:[data]";
+    const mxnet::TShape& dshape = (*in_shape)[fft::kData];
     // require data to be known
-    if (mxnet::op::shape_is_none(dshape)) return false;
+    if (mxnet::op::shape_is_none(dshape))
+      return false;
 
     out_shape->clear();
     if (dshape.ndim() == 4) {
-      out_shape->push_back(Shape4(dshape[0], dshape[1], dshape[2], dshape[3]*2));
+      out_shape->push_back(Shape4(dshape[0], dshape[1], dshape[2], dshape[3] * 2));
     } else if (dshape.ndim() == 2) {
-      out_shape->push_back(Shape2(dshape[0], dshape[1]*2));
+      out_shape->push_back(Shape2(dshape[0], dshape[1] * 2));
     }
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 1);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -268,7 +266,7 @@ class FFTProp : public OperatorProperty {
 
   OperatorProperty* Copy() const override {
     FFTProp* fft_sym = new FFTProp();
-    fft_sym->param_ = this->param_;
+    fft_sym->param_  = this->param_;
     return fft_sym;
   }
 
@@ -277,28 +275,25 @@ class FFTProp : public OperatorProperty {
   }
 
   // declare dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[fft::kOutComplex], in_data[fft::kData]};
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {{in_data[fft::kData], in_grad[fft::kData]}};
   }
 
@@ -307,8 +302,9 @@ class FFTProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                              std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   FFTParam param_;
diff --git a/src/operator/contrib/fft.cc b/src/operator/contrib/fft.cc
index 1262835cbb58..ec51c54476c4 100644
--- a/src/operator/contrib/fft.cc
+++ b/src/operator/contrib/fft.cc
@@ -22,26 +22,27 @@
  * \file fft-inl.h
  * \brief
  * \author Chen Zhu
-*/
+ */
 #include "./fft-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(FFTParam param, int dtype) {
+template <>
+Operator* CreateOp<cpu>(FFTParam param, int dtype) {
   LOG(FATAL) << "fft is only available for GPU.";
   return nullptr;
 }
 
-Operator *FFTProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                                    std::vector<int> *in_type) const {
+Operator* FFTProp::CreateOperatorEx(Context ctx,
+                                    mxnet::ShapeVector* in_shape,
+                                    std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(FFTParam);
 
 MXNET_REGISTER_OP_PROPERTY(_contrib_fft, FFTProp)
-.describe(R"code(Apply 1D FFT to input"
+    .describe(R"code(Apply 1D FFT to input"
 
 .. note:: `fft` is only available on GPU.
 
@@ -54,7 +55,7 @@ Example::
    out = mx.contrib.ndarray.fft(data = mx.nd.array(data,ctx = mx.gpu(0)))
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the FFTOp.")
-.add_arguments(FFTParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the FFTOp.")
+    .add_arguments(FFTParam::__FIELDS__());
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/fft.cu b/src/operator/contrib/fft.cu
index 8cc56ade83dd..8b00b6c967dc 100644
--- a/src/operator/contrib/fft.cu
+++ b/src/operator/contrib/fft.cu
@@ -28,12 +28,10 @@
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 Operator* CreateOp<gpu>(FFTParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      op = new FFTOp<gpu, DType>(param);
-  })
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new FFTOp<gpu, DType>(param); })
   return op;
 }
 
diff --git a/src/operator/contrib/gradient_multiplier_op.cc b/src/operator/contrib/gradient_multiplier_op.cc
index f1664a3eaac4..da46a25b3db8 100644
--- a/src/operator/contrib/gradient_multiplier_op.cc
+++ b/src/operator/contrib/gradient_multiplier_op.cc
@@ -22,7 +22,7 @@
  * \file gradient_multiplier_op.cc
  * \brief
  * \author Istvan Fehervari
-*/
+ */
 #include "../tensor/elemwise_unary_op.h"
 #include "../tensor/elemwise_binary_scalar_op.h"
 
@@ -32,22 +32,22 @@ namespace op {
 static bool BinaryScalarStorageType(const nnvm::NodeAttrs& attrs,
                                     const int dev_mask,
                                     DispatchMode* dispatch_mode,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   const auto in_stype = in_attrs->at(0);
-  auto &out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  auto& out_stype     = out_attrs->at(0);
+  bool dispatched     = false;
   if (!dispatched && (in_stype == kDefaultStorage)) {
     // dense -> dense
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && in_stype == kRowSparseStorage) {
     // row sparse -> row sparse
-    dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        &out_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
     // FComputeEx can handle dns output on cpu, too
     if (dev_mask == cpu::kDevMask && out_stype == kDefaultStorage) {
       DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -56,8 +56,8 @@ static bool BinaryScalarStorageType(const nnvm::NodeAttrs& attrs,
   }
   if (!dispatched && in_stype == kCSRStorage) {
     // csr -> csr
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
     // FComputeEx can handle dns output on cpu, too
     if (dev_mask == cpu::kDevMask && out_stype == kDefaultStorage) {
       DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -71,27 +71,28 @@ static bool BinaryScalarStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 MXNET_OPERATOR_REGISTER_UNARY(_contrib_gradientmultiplier)
-.describe(R"code(This operator implements the gradient multiplier function.
+    .describe(R"code(This operator implements the gradient multiplier function.
 In forward pass it acts as an identity transform. During backpropagation it
 multiplies the gradient from the subsequent level by a scalar factor lambda and passes it to
 the preceding layer.
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_contrib_backward_gradientmultiplier"})
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeEx<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseNone{"_contrib_backward_gradientmultiplier"})
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__());
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_contrib_backward_gradientmultiplier)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::mul>);
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::mul>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/gradient_multiplier_op.cu b/src/operator/contrib/gradient_multiplier_op.cu
index f519f0db5f49..43d1566f36a4 100644
--- a/src/operator/contrib/gradient_multiplier_op.cu
+++ b/src/operator/contrib/gradient_multiplier_op.cu
@@ -22,7 +22,7 @@
  * \file gradient_multiplier_op.cu
  * \brief
  * \author Istvan Fehervari
-*/
+ */
 #include "../tensor/elemwise_unary_op.h"
 #include "../tensor/elemwise_binary_scalar_op.h"
 
@@ -30,12 +30,12 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_gradientmultiplier)
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>)
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 NNVM_REGISTER_OP(_contrib_backward_gradientmultiplier)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"})
-.set_attr<FComputeEx>("(FComputeEx<gpu>", BinaryScalarRTCCompute{"mul"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"})
+    .set_attr<FComputeEx>("(FComputeEx<gpu>", BinaryScalarRTCCompute{"mul"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/hawkes_ll-inl.h b/src/operator/contrib/hawkes_ll-inl.h
index d5e90ad6545d..7be08afe48bd 100644
--- a/src/operator/contrib/hawkes_ll-inl.h
+++ b/src/operator/contrib/hawkes_ll-inl.h
@@ -37,18 +37,26 @@ namespace mxnet {
 namespace op {
 
 namespace hawkesll {
-  enum HawkesLLOpInputs {kMu, kAlpha, kBeta, kState, kIATimes, kMarks,
-                         kValidLength, kMaxTime};
-  enum HawkesLLGradInputs {kOutGradLL, kOutGradStates, kGradMu, kGradAlpha,
-                           kGradBeta, kGradState, kGradIATimes, kGradMarks,
-                           kGradValidLength, kGradMaxTime};
-  enum HawkesLLOpOutputs {kOutLL, kOutStates};
-  enum HawkesLLOpResource {kTempSpace};
+enum HawkesLLOpInputs { kMu, kAlpha, kBeta, kState, kIATimes, kMarks, kValidLength, kMaxTime };
+enum HawkesLLGradInputs {
+  kOutGradLL,
+  kOutGradStates,
+  kGradMu,
+  kGradAlpha,
+  kGradBeta,
+  kGradState,
+  kGradIATimes,
+  kGradMarks,
+  kGradValidLength,
+  kGradMaxTime
+};
+enum HawkesLLOpOutputs { kOutLL, kOutStates };
+enum HawkesLLOpResource { kTempSpace };
 }  // namespace hawkesll
 
 inline bool HawkesLLOpType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int>* in_attrs,
-                            std::vector<int>* out_attrs) {
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   // check dimensions of the type vectors
   CHECK_EQ(in_attrs->size(), 8U);
   CHECK_EQ(out_attrs->size(), 2U);
@@ -67,8 +75,8 @@ inline bool HawkesLLOpType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool HawkesLLOpShape(const nnvm::NodeAttrs& attrs,
-                             std::vector<TShape>* in_attrs,
-                             std::vector<TShape>* out_attrs) {
+                            std::vector<TShape>* in_attrs,
+                            std::vector<TShape>* out_attrs) {
   using namespace mshadow;
   int N, T, K;
 
@@ -76,18 +84,18 @@ inline bool HawkesLLOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 2U);
 
   // check ndims
-  CHECK_EQ(in_attrs->at(hawkesll::kMu).ndim(), 2);  // mu (N, K)
-  CHECK_EQ(in_attrs->at(hawkesll::kAlpha).ndim(), 1);  // branching ratio (K,)
-  CHECK_EQ(in_attrs->at(hawkesll::kBeta).ndim(), 1);  // decay exponent (K,)
-  CHECK_EQ(in_attrs->at(hawkesll::kState).ndim(), 2);  // Hawkes states (N, K)
-  CHECK_EQ(in_attrs->at(hawkesll::kIATimes).ndim(), 2);  // i.a. times  (N, T)
-  CHECK_EQ(in_attrs->at(hawkesll::kMarks).ndim(), 2);  // marks (N, T)
+  CHECK_EQ(in_attrs->at(hawkesll::kMu).ndim(), 2);           // mu (N, K)
+  CHECK_EQ(in_attrs->at(hawkesll::kAlpha).ndim(), 1);        // branching ratio (K,)
+  CHECK_EQ(in_attrs->at(hawkesll::kBeta).ndim(), 1);         // decay exponent (K,)
+  CHECK_EQ(in_attrs->at(hawkesll::kState).ndim(), 2);        // Hawkes states (N, K)
+  CHECK_EQ(in_attrs->at(hawkesll::kIATimes).ndim(), 2);      // i.a. times  (N, T)
+  CHECK_EQ(in_attrs->at(hawkesll::kMarks).ndim(), 2);        // marks (N, T)
   CHECK_EQ(in_attrs->at(hawkesll::kValidLength).ndim(), 1);  // valid len (N,)
-  CHECK_EQ(in_attrs->at(hawkesll::kMaxTime).ndim(), 1);  // max_time (N,)
+  CHECK_EQ(in_attrs->at(hawkesll::kMaxTime).ndim(), 1);      // max_time (N,)
 
   N = in_attrs->at(hawkesll::kIATimes)[0];  // number of samples in batch
   T = in_attrs->at(hawkesll::kIATimes)[1];  // time length
-  K = in_attrs->at(hawkesll::kMu)[1];  // number of marks
+  K = in_attrs->at(hawkesll::kMu)[1];       // number of marks
 
   // check inputs consistent
   CHECK_EQ(in_attrs->at(hawkesll::kMu)[0], N);
@@ -106,12 +114,12 @@ inline bool HawkesLLOpShape(const nnvm::NodeAttrs& attrs,
   SHAPE_ASSIGN_CHECK(*out_attrs, hawkesll::kOutStates, Shape2(N, K))
 
   return out_attrs->at(hawkesll::kOutLL).ndim() != 0U &&
-    out_attrs->at(hawkesll::kOutStates).Size() != 0U;
+         out_attrs->at(hawkesll::kOutStates).Size() != 0U;
 }
 
-template<int req>
+template <int req>
 struct hawkesll_forward {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   DType* out_loglike,
                                   DType* out_state,
@@ -125,27 +133,26 @@ struct hawkesll_forward {
                                   DType* max_time,
                                   int K,
                                   int T,
-                                  DType* temp_register
-                                  ) {
-    int32_t ci;  // current mark
+                                  DType* temp_register) {
+    int32_t ci;    // current mark
     DType ll = 0;  // log likelihood
-    DType t = 0;  // current time
+    DType t  = 0;  // current time
     DType d, ed, lda, comp;
-    DType *last_ = &temp_register[i * K];
+    DType* last_ = &temp_register[i * K];
 
-    const DType *mu_ = &mu[i * K];
-    const DType *lag_ = &lags[i * T];
-    const int32_t *mark_ = &marks[i * T];
-    DType *state_ = &out_state[i * K];
+    const DType* mu_     = &mu[i * K];
+    const DType* lag_    = &lags[i * T];
+    const int32_t* mark_ = &marks[i * T];
+    DType* state_        = &out_state[i * K];
 
     // iterate over points in sequence
     for (index_t j = 0; j < valid_length[i]; ++j) {
       ci = mark_[j];
       t += lag_[j];
-      d = t - last_[ci];
+      d  = t - last_[ci];
       ed = expf(-beta[ci] * d);
 
-      lda = mu_[ci] + alpha[ci] * beta[ci] * state_[ci] * ed;
+      lda  = mu_[ci] + alpha[ci] * beta[ci] * state_[ci] * ed;
       comp = mu_[ci] * d + alpha[ci] * state_[ci] * (1 - ed);
 
       ll += logf(lda) - comp;
@@ -159,9 +166,9 @@ struct hawkesll_forward {
   }
 };
 
-template<int req>
+template <int req>
 struct hawkesll_forward_compensator {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   DType* rem_comp,
                                   DType* out_state,
@@ -170,65 +177,59 @@ struct hawkesll_forward_compensator {
                                   const DType* beta,
                                   const DType* max_time,
                                   const int K,
-                                  const DType* last_buffer
-                                  ) {
+                                  const DType* last_buffer) {
     DType d, ed;
     int m = i % K;  // mark
     int j = i / K;  // particle
 
     // take care of the remaining compensators and state update
-    d = max_time[j] - last_buffer[i];
+    d  = max_time[j] - last_buffer[i];
     ed = expf(-beta[m] * d);
 
     // return the remaining compensator
-    KERNEL_ASSIGN(rem_comp[i], req,
-                  mu[i] * d + alpha[m] * out_state[i] * (1 - ed))
+    KERNEL_ASSIGN(rem_comp[i], req, mu[i] * d + alpha[m] * out_state[i] * (1 - ed))
 
     // update the state
     KERNEL_ASSIGN(out_state[i], req, ed * out_state[i])
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void HawkesLLForward(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx,
-                      const std::vector<TBlob>& inputs,
-                      const std::vector<OpReqType>& req,
-                      const std::vector<TBlob>& outputs) {
+                     const OpContext& ctx,
+                     const std::vector<TBlob>& inputs,
+                     const std::vector<OpReqType>& req,
+                     const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   CHECK_EQ(inputs.size(), 8U);
   CHECK_EQ(outputs.size(), 2U);
 
   const TBlob& out_loglike = outputs[hawkesll::kOutLL];
-  const TBlob& out_state = outputs[hawkesll::kOutStates];
+  const TBlob& out_state   = outputs[hawkesll::kOutStates];
 
   int K = inputs[hawkesll::kMu].shape_[1];
   int N = inputs[hawkesll::kIATimes].shape_[0];
   int T = inputs[hawkesll::kIATimes].shape_[1];
 
   MSHADOW_TYPE_SWITCH(out_loglike.type_flag_, DType, {
-    Tensor<xpu, 2, DType> temp_space = ctx.requested[hawkesll::kTempSpace]
-                                          .get_space_typed<xpu, 2, DType>(
-                                            Shape2(2*N, K),
-                                            s);
+    Tensor<xpu, 2, DType> temp_space =
+        ctx.requested[hawkesll::kTempSpace].get_space_typed<xpu, 2, DType>(Shape2(2 * N, K), s);
 
     Tensor<xpu, 2, DType> last_buffer =
         Tensor<xpu, 2, DType>(&temp_space.dptr_[0], Shape2(N, K), s);
     Tensor<xpu, 2, DType> rem_comp =
-        Tensor<xpu, 2, DType>(&temp_space.dptr_[N*K], Shape2(N, K), s);
+        Tensor<xpu, 2, DType>(&temp_space.dptr_[N * K], Shape2(N, K), s);
 
-    Tensor<xpu, 1, DType> out_loglike_ts =
-        out_loglike.get_with_shape<xpu, 1, DType>(Shape1(N), s);
+    Tensor<xpu, 1, DType> out_loglike_ts = out_loglike.get_with_shape<xpu, 1, DType>(Shape1(N), s);
 
     last_buffer = DType(0.0);
-    rem_comp = DType(0.0);
+    rem_comp    = DType(0.0);
 
-    Tensor<xpu, 2, DType> out_state_ts =
-        out_state.get_with_shape<xpu, 2, DType>(Shape2(N, K), s);
+    Tensor<xpu, 2, DType> out_state_ts = out_state.get_with_shape<xpu, 2, DType>(Shape2(N, K), s);
     Tensor<xpu, 2, DType> in_state_ts =
         inputs[hawkesll::kState].get_with_shape<xpu, 2, DType>(Shape2(N, K), s);
 
@@ -236,99 +237,94 @@ void HawkesLLForward(const nnvm::NodeAttrs& attrs,
 
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       Kernel<hawkesll_forward<req_type>, xpu>::Launch(
-        s, N,
-        out_loglike.dptr<DType>(),
-        out_state.dptr<DType>(),
-        inputs[hawkesll::kMu].dptr<DType>(),  // mu
-        inputs[hawkesll::kAlpha].dptr<DType>(),  // alpha
-        inputs[hawkesll::kBeta].dptr<DType>(),  // beta
-        inputs[hawkesll::kState].dptr<DType>(),  // states
-        inputs[hawkesll::kIATimes].dptr<DType>(),  // interarrival times
-        inputs[hawkesll::kMarks].dptr<int32_t>(),  // marks
-        inputs[hawkesll::kValidLength].dptr<DType>(),  // valid_length
-        inputs[hawkesll::kMaxTime].dptr<DType>(),  // max_time
-        K,
-        T,
-        last_buffer.dptr_);
+          s,
+          N,
+          out_loglike.dptr<DType>(),
+          out_state.dptr<DType>(),
+          inputs[hawkesll::kMu].dptr<DType>(),           // mu
+          inputs[hawkesll::kAlpha].dptr<DType>(),        // alpha
+          inputs[hawkesll::kBeta].dptr<DType>(),         // beta
+          inputs[hawkesll::kState].dptr<DType>(),        // states
+          inputs[hawkesll::kIATimes].dptr<DType>(),      // interarrival times
+          inputs[hawkesll::kMarks].dptr<int32_t>(),      // marks
+          inputs[hawkesll::kValidLength].dptr<DType>(),  // valid_length
+          inputs[hawkesll::kMaxTime].dptr<DType>(),      // max_time
+          K,
+          T,
+          last_buffer.dptr_);
     });
 
     // in parallel, we take care of the remaining compensators
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       Kernel<hawkesll_forward_compensator<req_type>, xpu>::Launch(
-        s, N * K,
-        rem_comp.dptr_,
-        out_state.dptr<DType>(),
-        inputs[hawkesll::kMu].dptr<DType>(),  // mu
-        inputs[hawkesll::kAlpha].dptr<DType>(),  // alpha
-        inputs[hawkesll::kBeta].dptr<DType>(),  // beta
-        inputs[hawkesll::kMaxTime].dptr<DType>(),  // max_time
-        K,
-        last_buffer.dptr_);
+          s,
+          N * K,
+          rem_comp.dptr_,
+          out_state.dptr<DType>(),
+          inputs[hawkesll::kMu].dptr<DType>(),       // mu
+          inputs[hawkesll::kAlpha].dptr<DType>(),    // alpha
+          inputs[hawkesll::kBeta].dptr<DType>(),     // beta
+          inputs[hawkesll::kMaxTime].dptr<DType>(),  // max_time
+          K,
+          last_buffer.dptr_);
     });
     out_loglike_ts -= mshadow::expr::sumall_except_dim<0>(rem_comp);
   })
 }
 
-template<int req>
+template <int req>
 struct hawkesll_backward {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,  // indexes the sample (particle)
                                   DType* mu_gbfr,
                                   DType* alpha_gbfr,
-                                  DType* beta_gbfr,  // (N, K)
-                                  const DType* mu,   // (N, K)
-                                  const DType* alpha,   // (K,)
-                                  const DType* beta,    // (K,)
-                                  const DType* lags,    // (N, T)
-                                  const int32_t* marks,  // (N, T)
+                                  DType* beta_gbfr,           // (N, K)
+                                  const DType* mu,            // (N, K)
+                                  const DType* alpha,         // (K,)
+                                  const DType* beta,          // (K,)
+                                  const DType* lags,          // (N, T)
+                                  const int32_t* marks,       // (N, T)
                                   const DType* valid_length,  // (N,)
-                                  const DType* max_time,  // (N,)
+                                  const DType* max_time,      // (N,)
                                   const int K,
                                   const int T,
                                   DType* last_buffer,
                                   DType* phi_buffer,
-                                  DType* phig_buffer
-                                  ) {
+                                  DType* phig_buffer) {
     int32_t ci;
-    int32_t part_ix_K = i*K, part_ix_T = i*T;
+    int32_t part_ix_K = i * K, part_ix_T = i * T;
 
-    DType t = 0, d, lda, ed;
-    DType* last_ = &last_buffer[part_ix_K];
-    DType* state_ = &phi_buffer[part_ix_K];
+    DType t        = 0, d, lda, ed;
+    DType* last_   = &last_buffer[part_ix_K];
+    DType* state_  = &phi_buffer[part_ix_K];
     DType* dstate_ = &phig_buffer[part_ix_K];
 
-    DType* mug_ = &mu_gbfr[part_ix_K];
+    DType* mug_    = &mu_gbfr[part_ix_K];
     DType* alphag_ = &alpha_gbfr[part_ix_K];
-    DType* betag_ = &beta_gbfr[part_ix_K];
+    DType* betag_  = &beta_gbfr[part_ix_K];
 
-    const DType* lag_ = &lags[part_ix_T];
+    const DType* lag_    = &lags[part_ix_T];
     const int32_t* mark_ = &marks[part_ix_T];
 
     // iterate over points
-    for (index_t j = 0; j < valid_length[i]; ++j){
+    for (index_t j = 0; j < valid_length[i]; ++j) {
       ci = mark_[j];
       t += lag_[j];
-      d = t - last_[ci];
+      d  = t - last_[ci];
       ed = expf(-beta[ci] * d);
 
       lda = mu[part_ix_K + ci] + alpha[ci] * beta[ci] * state_[ci] * ed;
 
       KERNEL_ASSIGN(mug_[ci], req, mug_[ci] + (1 / lda) - d)
-      KERNEL_ASSIGN(alphag_[ci], req,
-                    (
-                      alphag_[ci]
-                      + (beta[ci] * state_[ci] * ed) / lda
-                      - state_[ci] * (1 - ed)
-                    )
-      )
-      KERNEL_ASSIGN(betag_[ci], req,
-                    betag_[ci]
-                    + alpha[ci] * ed
-                    * (state_[ci] * (1 - beta[ci] * d) + beta[ci] * dstate_[ci])
-                    / lda
-                    - alpha[ci]
-                    * (dstate_[ci] * (1 - ed) + state_[ci] * d * ed)
-      )
+      KERNEL_ASSIGN(alphag_[ci],
+                    req,
+                    (alphag_[ci] + (beta[ci] * state_[ci] * ed) / lda - state_[ci] * (1 - ed)))
+      KERNEL_ASSIGN(
+          betag_[ci],
+          req,
+          betag_[ci] +
+              alpha[ci] * ed * (state_[ci] * (1 - beta[ci] * d) + beta[ci] * dstate_[ci]) / lda -
+              alpha[ci] * (dstate_[ci] * (1 - ed) + state_[ci] * d * ed))
 
       KERNEL_ASSIGN(dstate_[ci], req, ed * (-d * state_[ci] + dstate_[ci]))
       KERNEL_ASSIGN(state_[ci], req, 1 + (state_[ci] * ed))
@@ -338,47 +334,39 @@ struct hawkesll_backward {
   }
 };
 
-
-template<int req>
+template <int req>
 struct hawkesll_backward_compensator {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   DType* mu_gbfr,
                                   DType* alpha_gbfr,
-                                  DType* beta_gbfr,  // (N, K)
-                                  DType* out_grad,  // read this  (N,)
-                                  const DType* mu,  // (N, K)
-                                  const DType* alpha,   // (K,)
-                                  const DType* beta,    // (K,)
+                                  DType* beta_gbfr,       // (N, K)
+                                  DType* out_grad,        // read this  (N,)
+                                  const DType* mu,        // (N, K)
+                                  const DType* alpha,     // (K,)
+                                  const DType* beta,      // (K,)
                                   const DType* max_time,  // (N,)
                                   const int K,
                                   DType* last_buffer,
                                   DType* phi_buffer,
-                                  DType* phig_buffer
-                                  ) {
+                                  DType* phig_buffer) {
     DType d, ed;
-    int m = i % K;  // mark
-    int j = i / K;  // particle
-    int32_t part_ix_K = j*K;
-    DType* mug_ = &mu_gbfr[part_ix_K];
-    DType* alphag_ = &alpha_gbfr[part_ix_K];
-    DType* betag_ = &beta_gbfr[part_ix_K];
+    int m             = i % K;  // mark
+    int j             = i / K;  // particle
+    int32_t part_ix_K = j * K;
+    DType* mug_       = &mu_gbfr[part_ix_K];
+    DType* alphag_    = &alpha_gbfr[part_ix_K];
+    DType* betag_     = &beta_gbfr[part_ix_K];
 
     // take care of the remaining compensators and state update
-    d = max_time[j] - last_buffer[i];
+    d  = max_time[j] - last_buffer[i];
     ed = expf(-beta[m] * d);
 
     // take care of the gradients of the remaining compensator
     KERNEL_ASSIGN(mug_[m], req, mug_[m] - d)
-    KERNEL_ASSIGN(alphag_[m], req,
-                  alphag_[m] - phi_buffer[i] * (1 - ed)
-    )
-    KERNEL_ASSIGN(betag_[m], req,
-                  betag_[m] - alpha[m] * (
-                    phig_buffer[i] * (1 - ed)
-                    + phi_buffer[i] * d * ed
-                  )
-    )
+    KERNEL_ASSIGN(alphag_[m], req, alphag_[m] - phi_buffer[i] * (1 - ed))
+    KERNEL_ASSIGN(
+        betag_[m], req, betag_[m] - alpha[m] * (phig_buffer[i] * (1 - ed) + phi_buffer[i] * d * ed))
 
     // // correct the gradients with respect to output gradients
     KERNEL_ASSIGN(mug_[m], req, out_grad[j] * mug_[m])
@@ -387,23 +375,23 @@ struct hawkesll_backward_compensator {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void HawkesLLBackward(const nnvm::NodeAttrs& attrs,
-                         const OpContext& ctx,
-                         const std::vector<TBlob>& inputs,
-                         const std::vector<OpReqType>& req,
-                         const std::vector<TBlob>& outputs) {
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 10U);
   CHECK_EQ(outputs.size(), 8U);
   CHECK_EQ(req.size(), 8U);
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   int K = inputs[hawkesll::kGradMu].shape_[1];  // mu data
   int N = inputs[hawkesll::kGradIATimes].shape_[0];
   int T = inputs[hawkesll::kGradIATimes].shape_[1];
 
-  CHECK_EQ(inputs[hawkesll::kOutGradLL].shape_[0], N);  // grad of out 0 (LL)
+  CHECK_EQ(inputs[hawkesll::kOutGradLL].shape_[0], N);      // grad of out 0 (LL)
   CHECK_EQ(inputs[hawkesll::kOutGradStates].shape_[0], N);  // grad out 1-states
   CHECK_EQ(inputs[hawkesll::kOutGradStates].shape_[1], K);
 
@@ -420,29 +408,24 @@ void HawkesLLBackward(const nnvm::NodeAttrs& attrs,
   MSHADOW_TYPE_SWITCH(out_grad.type_flag_, DType, {
     // allocate gradient buffers
     Tensor<xpu, 2, DType> bfr =
-        ctx.requested[hawkesll::kTempSpace]
-           .get_space_typed<xpu, 2, DType>(Shape2(6*N, K), s);
+        ctx.requested[hawkesll::kTempSpace].get_space_typed<xpu, 2, DType>(Shape2(6 * N, K), s);
 
-    Tensor<xpu, 2, DType> alpha_gbfr =
-        Tensor<xpu, 2, DType>(&bfr.dptr_[N*K], Shape2(N, K), s);
-    Tensor<xpu, 2, DType> beta_gbfr =
-        Tensor<xpu, 2, DType>(&bfr.dptr_[2*N*K], Shape2(N, K), s);
+    Tensor<xpu, 2, DType> alpha_gbfr = Tensor<xpu, 2, DType>(&bfr.dptr_[N * K], Shape2(N, K), s);
+    Tensor<xpu, 2, DType> beta_gbfr = Tensor<xpu, 2, DType>(&bfr.dptr_[2 * N * K], Shape2(N, K), s);
     Tensor<xpu, 2, DType> last_buffer =
-        Tensor<xpu, 2, DType>(&bfr.dptr_[3*N*K], Shape2(N, K), s);
+        Tensor<xpu, 2, DType>(&bfr.dptr_[3 * N * K], Shape2(N, K), s);
     Tensor<xpu, 2, DType> phig_buffer =
-        Tensor<xpu, 2, DType>(&bfr.dptr_[4*N*K], Shape2(N, K), s);
+        Tensor<xpu, 2, DType>(&bfr.dptr_[4 * N * K], Shape2(N, K), s);
     Tensor<xpu, 2, DType> phi_buffer =
-        Tensor<xpu, 2, DType>(&bfr.dptr_[5*N*K], Shape2(N, K), s);
+        Tensor<xpu, 2, DType>(&bfr.dptr_[5 * N * K], Shape2(N, K), s);
 
-    alpha_gbfr = DType(0.0);
-    beta_gbfr = DType(0.0);
+    alpha_gbfr  = DType(0.0);
+    beta_gbfr   = DType(0.0);
     last_buffer = DType(0.0);
     phig_buffer = DType(0.0);
 
-    mshadow::Copy(phi_buffer,
-                  inputs[hawkesll::kGradState]
-                    .get_with_shape<xpu, 2, DType>(Shape2(N, K), s),
-                  s);
+    mshadow::Copy(
+        phi_buffer, inputs[hawkesll::kGradState].get_with_shape<xpu, 2, DType>(Shape2(N, K), s), s);
 
     // get the gradient to be output
     Tensor<xpu, 2, DType> in_grad_mu =
@@ -456,47 +439,47 @@ void HawkesLLBackward(const nnvm::NodeAttrs& attrs,
 
     MXNET_ASSIGN_REQ_SWITCH(req[hawkesll::kMu], req_type, {
       Kernel<hawkesll_backward<req_type>, xpu>::Launch(
-        s,
-        N,
-        in_grad_mu.dptr_, alpha_gbfr.dptr_, beta_gbfr.dptr_,  // gradients
-        inputs[hawkesll::kGradMu].dptr<DType>(),  // mu data
-        inputs[hawkesll::kGradAlpha].dptr<DType>(),  // alpha data
-        inputs[hawkesll::kGradBeta].dptr<DType>(),  // beta data
-        inputs[hawkesll::kGradIATimes].dptr<DType>(),  // lags data
-        inputs[hawkesll::kGradMarks].dptr<int32_t>(),  // marks data
-        inputs[hawkesll::kGradValidLength].dptr<DType>(),  // valid_length data
-        inputs[hawkesll::kGradMaxTime].dptr<DType>(),  // max_time data
-        K,
-        T,
-        last_buffer.dptr_,  // buffer to keep timestamp of last item
-        phi_buffer.dptr_,  // "states"
-        phig_buffer.dptr_);  // derivatives of "states"
+          s,
+          N,
+          in_grad_mu.dptr_,
+          alpha_gbfr.dptr_,
+          beta_gbfr.dptr_,                                   // gradients
+          inputs[hawkesll::kGradMu].dptr<DType>(),           // mu data
+          inputs[hawkesll::kGradAlpha].dptr<DType>(),        // alpha data
+          inputs[hawkesll::kGradBeta].dptr<DType>(),         // beta data
+          inputs[hawkesll::kGradIATimes].dptr<DType>(),      // lags data
+          inputs[hawkesll::kGradMarks].dptr<int32_t>(),      // marks data
+          inputs[hawkesll::kGradValidLength].dptr<DType>(),  // valid_length data
+          inputs[hawkesll::kGradMaxTime].dptr<DType>(),      // max_time data
+          K,
+          T,
+          last_buffer.dptr_,   // buffer to keep timestamp of last item
+          phi_buffer.dptr_,    // "states"
+          phig_buffer.dptr_);  // derivatives of "states"
     });
 
     MXNET_ASSIGN_REQ_SWITCH(req[hawkesll::kMu], req_type, {
       Kernel<hawkesll_backward_compensator<req_type>, xpu>::Launch(
-        s,
-        N * K,
-        in_grad_mu.dptr_, alpha_gbfr.dptr_, beta_gbfr.dptr_,  // gradients
-        out_grad.dptr<DType>(),
-        inputs[hawkesll::kGradMu].dptr<DType>(),  // mu data
-        inputs[hawkesll::kGradAlpha].dptr<DType>(),  // alpha data
-        inputs[hawkesll::kGradBeta].dptr<DType>(),  // beta data
-        inputs[hawkesll::kGradMaxTime].dptr<DType>(),  // max_time data
-        K,
-        last_buffer.dptr_,  // buffer to keep timestamp of last item
-        phi_buffer.dptr_,  // "states"
-        phig_buffer.dptr_);  // derivatives of "states"
+          s,
+          N * K,
+          in_grad_mu.dptr_,
+          alpha_gbfr.dptr_,
+          beta_gbfr.dptr_,  // gradients
+          out_grad.dptr<DType>(),
+          inputs[hawkesll::kGradMu].dptr<DType>(),       // mu data
+          inputs[hawkesll::kGradAlpha].dptr<DType>(),    // alpha data
+          inputs[hawkesll::kGradBeta].dptr<DType>(),     // beta data
+          inputs[hawkesll::kGradMaxTime].dptr<DType>(),  // max_time data
+          K,
+          last_buffer.dptr_,   // buffer to keep timestamp of last item
+          phi_buffer.dptr_,    // "states"
+          phig_buffer.dptr_);  // derivatives of "states"
     });
 
     // reduce the gradients
-    Assign(in_grad_alpha, req[hawkesll::kAlpha],
-           mshadow::expr::sumall_except_dim<1>(alpha_gbfr)
-           )
+    Assign(in_grad_alpha, req[hawkesll::kAlpha], mshadow::expr::sumall_except_dim<1>(alpha_gbfr))
 
-    Assign(in_grad_beta, req[hawkesll::kBeta],
-           mshadow::expr::sumall_except_dim<1>(beta_gbfr)
-           )
+        Assign(in_grad_beta, req[hawkesll::kBeta], mshadow::expr::sumall_except_dim<1>(beta_gbfr))
   })
 }
 
diff --git a/src/operator/contrib/hawkes_ll.cc b/src/operator/contrib/hawkes_ll.cc
index 1e2fff5c9871..34d4c9e4f501 100644
--- a/src/operator/contrib/hawkes_ll.cc
+++ b/src/operator/contrib/hawkes_ll.cc
@@ -84,58 +84,40 @@ Example::
 )code" ADD_FILELINE)
     .set_num_inputs(8)
     .set_num_outputs(2)
-    .set_attr<nnvm::FListInputNames>("FListInputNames",
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
         [](const NodeAttrs& attrs) {
-        return std::vector<std::string>{
-          "lda", "alpha", "beta", "state", "lags",
-          "marks", "valid_length", "max_time"
-        };
-    })
+          return std::vector<std::string>{
+              "lda", "alpha", "beta", "state", "lags", "marks", "valid_length", "max_time"};
+        })
     .set_attr<nnvm::FListOutputNames>("FListOutputNames",
-        [](const NodeAttrs& attrs) {
-        return std::vector<std::string>{"output", "out_state"};
-    })
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output", "out_state"};
+                                      })
     .set_attr<mxnet::FInferShape>("FInferShape", HawkesLLOpShape)
     .set_attr<nnvm::FInferType>("FInferType", HawkesLLOpType)
     .set_attr<FCompute>("FCompute<cpu>", HawkesLLForward<cpu>)
-    .set_attr<nnvm::FGradient>(
-      "FGradient", ElemwiseGradUseIn{"_contrib_backward_hawkesll"}
-    )
-    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-        return std::vector<ResourceRequest>{ResourceRequest::Type::kTempSpace};
-    })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_contrib_backward_hawkesll"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{
+                                      ResourceRequest::Type::kTempSpace};
+                                })
     .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-    .add_argument(
-      "lda", "NDArray-or-Symbol",
-      "Shape (N, K) The intensity for each of the K processes, for each sample"
-    )
-    .add_argument(
-      "alpha", "NDArray-or-Symbol",
-      "Shape (K,) The infectivity factor (branching ratio) for each process"
-    )
-    .add_argument(
-      "beta", "NDArray-or-Symbol",
-      "Shape (K,) The decay parameter for each process"
-    )
-    .add_argument(
-      "state", "NDArray-or-Symbol",
-      "Shape (N, K) the Hawkes state for each process"
-    )
-    .add_argument(
-      "lags", "NDArray-or-Symbol",
-      "Shape (N, T) the interarrival times"
-    )
-    .add_argument(
-      "marks", "NDArray-or-Symbol",
-      "Shape (N, T) the marks (process ids)"
-    )
-    .add_argument(
-      "valid_length", "NDArray-or-Symbol",
-      "The number of valid points in the process"
-    )
-    .add_argument(
-      "max_time", "NDArray-or-Symbol",
-      "the length of the interval where the processes were sampled");
+    .add_argument("lda",
+                  "NDArray-or-Symbol",
+                  "Shape (N, K) The intensity for each of the K processes, for each sample")
+    .add_argument("alpha",
+                  "NDArray-or-Symbol",
+                  "Shape (K,) The infectivity factor (branching ratio) for each process")
+    .add_argument("beta", "NDArray-or-Symbol", "Shape (K,) The decay parameter for each process")
+    .add_argument("state", "NDArray-or-Symbol", "Shape (N, K) the Hawkes state for each process")
+    .add_argument("lags", "NDArray-or-Symbol", "Shape (N, T) the interarrival times")
+    .add_argument("marks", "NDArray-or-Symbol", "Shape (N, T) the marks (process ids)")
+    .add_argument("valid_length", "NDArray-or-Symbol", "The number of valid points in the process")
+    .add_argument("max_time",
+                  "NDArray-or-Symbol",
+                  "the length of the interval where the processes were sampled");
 
 NNVM_REGISTER_OP(_contrib_backward_hawkesll)
     .set_num_inputs(10)
@@ -143,7 +125,7 @@ NNVM_REGISTER_OP(_contrib_backward_hawkesll)
     .set_attr<nnvm::TIsBackward>("TIsBackward", true)
     .set_attr<FCompute>("FCompute<cpu>", HawkesLLBackward<cpu>)
     .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-        return std::vector<ResourceRequest>{ResourceRequest::Type::kTempSpace};
+      return std::vector<ResourceRequest>{ResourceRequest::Type::kTempSpace};
     });
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/hawkes_ll.cu b/src/operator/contrib/hawkes_ll.cu
old mode 100755
new mode 100644
index d35d7d0b0c08..9e1e6af655f9
--- a/src/operator/contrib/hawkes_ll.cu
+++ b/src/operator/contrib/hawkes_ll.cu
@@ -28,11 +28,10 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_contrib_hawkesll)
-.set_attr<FCompute>("FCompute<gpu>", HawkesLLForward<gpu>);
+NNVM_REGISTER_OP(_contrib_hawkesll).set_attr<FCompute>("FCompute<gpu>", HawkesLLForward<gpu>);
 
 NNVM_REGISTER_OP(_contrib_backward_hawkesll)
-.set_attr<FCompute>("FCompute<gpu>", HawkesLLBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", HawkesLLBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/index_array-inl.h b/src/operator/contrib/index_array-inl.h
index e280d7661b7c..c47f976cd923 100644
--- a/src/operator/contrib/index_array-inl.h
+++ b/src/operator/contrib/index_array-inl.h
@@ -29,17 +29,14 @@ namespace mxnet {
 namespace op {
 
 namespace index_array_enum {
-enum IndexArrayOpInputs {kIn};
-enum IndexArrayOpOutputs {kOut};
-enum IndexArrayOpResource {kTempSpace};
+enum IndexArrayOpInputs { kIn };
+enum IndexArrayOpOutputs { kOut };
+enum IndexArrayOpResource { kTempSpace };
 }  // namespace index_array_enum
 
-template<int req>
+template <int req>
 struct IndexArrayKernel {
-  MSHADOW_XINLINE static void Map(int i,
-                                  int64_t* out_data,
-                                  const int n,
-                                  const int64_t* workspace) {
+  MSHADOW_XINLINE static void Map(int i, int64_t* out_data, const int n, const int64_t* workspace) {
     for (ptrdiff_t j = 0; j < n; j++) {
       int64_t upper = workspace[ptrdiff_t(2) * j];
       int64_t lower = workspace[ptrdiff_t(2) * j + ptrdiff_t(1)];
@@ -48,12 +45,9 @@ struct IndexArrayKernel {
   }
 };
 
-template<int req>
+template <int req>
 struct IndexArrayDefaultKernel {
-  MSHADOW_XINLINE static void Map(int i,
-                                  int64_t* out_data,
-                                  const int ndim,
-                                  const dim_t* shape) {
+  MSHADOW_XINLINE static void Map(int i, int64_t* out_data, const int ndim, const dim_t* shape) {
     int64_t index = i;
     for (ptrdiff_t j = ndim - 1; j >= 0; j--) {
       KERNEL_ASSIGN(out_data[ptrdiff_t(i) * ptrdiff_t(ndim) + j], req, index % shape[j]);
@@ -62,7 +56,7 @@ struct IndexArrayDefaultKernel {
   }
 };
 
-inline std::vector<int64_t> IndexArrayComputeIndexProducts(const TShape &inshape) {
+inline std::vector<int64_t> IndexArrayComputeIndexProducts(const TShape& inshape) {
   const int ndim = inshape.ndim();
 
   std::vector<int64_t> index_products(static_cast<size_t>(ndim + 1));
@@ -76,15 +70,15 @@ inline std::vector<int64_t> IndexArrayComputeIndexProducts(const TShape &inshape
   return index_products;
 }
 
-inline void IndexArrayBuildSelectedAxesWorkspace(const mxnet::Tuple<int> &axes,
-                                                 const std::vector<int64_t> &index_products,
+inline void IndexArrayBuildSelectedAxesWorkspace(const mxnet::Tuple<int>& axes,
+                                                 const std::vector<int64_t>& index_products,
                                                  int64_t* workspace,
                                                  const int ndim) {
   for (int i = 0; i < axes.ndim(); i++) {
     // Make sure that the axis is between 0 and ndim.
     const int axis = ((axes[i] % ndim) + ndim) % ndim;
 
-    workspace[ptrdiff_t(2) * ptrdiff_t(i)] = index_products[axis];
+    workspace[ptrdiff_t(2) * ptrdiff_t(i)]                = index_products[axis];
     workspace[ptrdiff_t(2) * ptrdiff_t(i) + ptrdiff_t(1)] = index_products[axis + 1];
   }
 }
@@ -92,8 +86,9 @@ inline void IndexArrayBuildSelectedAxesWorkspace(const mxnet::Tuple<int> &axes,
 struct IndexArrayParam : public dmlc::Parameter<IndexArrayParam> {
   dmlc::optional<mxnet::Tuple<int>> axes;
   DMLC_DECLARE_PARAMETER(IndexArrayParam) {
-    DMLC_DECLARE_FIELD(axes).set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("The axes to include in the index array. Supports negative values.");
+    DMLC_DECLARE_FIELD(axes)
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe("The axes to include in the index array. Supports negative values.");
   }
 };  // struct IndexArrayParam
 
diff --git a/src/operator/contrib/index_array.cc b/src/operator/contrib/index_array.cc
index ef4f030863f2..82cd468f81e3 100644
--- a/src/operator/contrib/index_array.cc
+++ b/src/operator/contrib/index_array.cc
@@ -19,34 +19,33 @@
 #include <mshadow/tensor.h>
 #include "./index_array-inl.h"
 
-
 namespace mxnet {
 namespace op {
 
-void IndexArrayForwardCPU(const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+void IndexArrayForwardCPU(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const TBlob& in_data = inputs[0];
+  const TBlob& in_data  = inputs[0];
   const TBlob& out_data = outputs[0];
 
   const IndexArrayParam& param = nnvm::get<IndexArrayParam>(attrs.parsed);
 
   const TShape inshape = in_data.shape_;
-  const int ndim = inshape.ndim();
+  const int ndim       = inshape.ndim();
 
-  Stream<cpu> *stream = ctx.get_stream<cpu>();
+  Stream<cpu>* stream = ctx.get_stream<cpu>();
 
   using namespace mxnet_op;
 
   if (param.axes.has_value()) {
     const mxnet::Tuple<int>& axes = param.axes.value();
-    const int naxes = axes.ndim();
+    const int naxes               = axes.ndim();
 
     std::vector<int64_t> index_products = IndexArrayComputeIndexProducts(inshape);
 
@@ -56,13 +55,13 @@ void IndexArrayForwardCPU(const nnvm::NodeAttrs &attrs,
     IndexArrayBuildSelectedAxesWorkspace(axes, index_products, workspace.dptr_, ndim);
 
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<IndexArrayKernel<req_type>, cpu>::Launch(stream, in_data.Size(),
-          out_data.dptr<int64_t>(), naxes, workspace.dptr_);
+      Kernel<IndexArrayKernel<req_type>, cpu>::Launch(
+          stream, in_data.Size(), out_data.dptr<int64_t>(), naxes, workspace.dptr_);
     });
   } else {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<IndexArrayDefaultKernel<req_type>, cpu>::Launch(stream, in_data.Size(),
-          out_data.dptr<int64_t>(), ndim, inshape.data());
+      Kernel<IndexArrayDefaultKernel<req_type>, cpu>::Launch(
+          stream, in_data.Size(), out_data.dptr<int64_t>(), ndim, inshape.data());
     });
   }
 }
@@ -70,7 +69,7 @@ void IndexArrayForwardCPU(const nnvm::NodeAttrs &attrs,
 DMLC_REGISTER_PARAMETER(IndexArrayParam);
 
 NNVM_REGISTER_OP(_contrib_index_array)
-.describe(R"code(Returns an array of indexes of the input array.
+    .describe(R"code(Returns an array of indexes of the input array.
 
 For an input array with shape  :math:`(d_1, d_2, ..., d_n)`, `index_array` returns a
 :math:`(d_1, d_2, ..., d_n, n)` array `idx`, where
@@ -116,58 +115,62 @@ Examples::
                                                    [1 2]]]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-                                 [](const NodeAttrs &attrs) {
-                                   return std::vector<std::string>{ "data" };
-                                 })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-                                  [](const NodeAttrs &attrs) {
-                                    return std::vector<std::string>{ "output" };
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr_parser(ParamParser<IndexArrayParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_shape,
+                                     mxnet::ShapeVector* out_shape) {
+                                    const IndexArrayParam& param =
+                                        nnvm::get<IndexArrayParam>(attrs.parsed);
+                                    CHECK_EQ(in_shape->size(), 1U);
+                                    CHECK_EQ(out_shape->size(), 1U);
+                                    const mxnet::TShape& inshape =
+                                        (*in_shape)[index_array_enum::kIn];
+                                    if (!mxnet::ndim_is_known(inshape))
+                                      return false;
+
+                                    mxnet::TShape oshape = mxnet::TShape(inshape.ndim() + 1, 0);
+
+                                    for (int i = 0; i < inshape.ndim(); i++) {
+                                      oshape[i] = inshape[i];
+                                    }
+                                    if (param.axes.has_value()) {
+                                      oshape[inshape.ndim()] = param.axes.value().ndim();
+                                    } else {
+                                      oshape[inshape.ndim()] = inshape.ndim();
+                                    }
+
+                                    SHAPE_ASSIGN_CHECK(*out_shape, 0, oshape);
+                                    return shape_is_known(oshape);
                                   })
-.set_attr_parser(ParamParser<IndexArrayParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs &attrs,
-                                                mxnet::ShapeVector *in_shape,
-                                                mxnet::ShapeVector *out_shape) {
-  const IndexArrayParam &param = nnvm::get<IndexArrayParam>(attrs.parsed);
-  CHECK_EQ(in_shape->size(), 1U);
-  CHECK_EQ(out_shape->size(), 1U);
-  const mxnet::TShape &inshape = (*in_shape)[index_array_enum::kIn];
-  if (!mxnet::ndim_is_known(inshape)) return false;
-
-  mxnet::TShape oshape = mxnet::TShape(inshape.ndim() + 1, 0);
-
-  for (int i = 0; i < inshape.ndim(); i++) {
-    oshape[i] = inshape[i];
-  }
-  if (param.axes.has_value()) {
-    oshape[inshape.ndim()] = param.axes.value().ndim();
-  } else {
-    oshape[inshape.ndim()] = inshape.ndim();
-  }
-
-  SHAPE_ASSIGN_CHECK(*out_shape, 0, oshape);
-  return shape_is_known(oshape);
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs &attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 1U);
-  CHECK_EQ(out_attrs->size(), 1U);
-  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
-  return out_attrs->at(0) != -1;
-})
-.set_attr<FCompute>("FCompute<cpu>", IndexArrayForwardCPU)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "Input data")
-.add_arguments(IndexArrayParam::__FIELDS__());
-
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 1U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
+                                  return out_attrs->at(0) != -1;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", IndexArrayForwardCPU)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "Input data")
+    .add_arguments(IndexArrayParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/contrib/index_array.cu b/src/operator/contrib/index_array.cu
index dae61ca71b6d..482cbf6b8150 100644
--- a/src/operator/contrib/index_array.cu
+++ b/src/operator/contrib/index_array.cu
@@ -24,31 +24,31 @@ namespace op {
 
 using namespace mshadow::cuda;
 
-void IndexArrayForwardGPU(const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+void IndexArrayForwardGPU(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const TBlob& in_data = inputs[0];
+  const TBlob& in_data  = inputs[0];
   const TBlob& out_data = outputs[0];
 
   const IndexArrayParam& param = nnvm::get<IndexArrayParam>(attrs.parsed);
 
   const TShape inshape = in_data.shape_;
-  const int ndim = inshape.ndim();
+  const int ndim       = inshape.ndim();
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s      = ctx.get_stream<gpu>();
   cudaStream_t stream = Stream<gpu>::GetStream(s);
 
   using namespace mxnet_op;
 
   if (param.axes.has_value()) {
     const mxnet::Tuple<int>& axes = param.axes.value();
-    const int naxes = axes.ndim();
+    const int naxes               = axes.ndim();
 
     std::vector<int64_t> index_products = IndexArrayComputeIndexProducts(inshape);
 
@@ -58,29 +58,31 @@ void IndexArrayForwardGPU(const nnvm::NodeAttrs &attrs,
     Tensor<gpu, 1, int64_t> workspace =
         ctx.requested[0].get_space_typed<gpu, 1, int64_t>(Shape1(2 * naxes), s);
 
-    CUDA_CALL(cudaMemcpyAsync(workspace.dptr_, cpu_workspace.data(), sizeof(int64_t) * (2 * naxes),
-                              cudaMemcpyHostToDevice, stream));
+    CUDA_CALL(cudaMemcpyAsync(workspace.dptr_,
+                              cpu_workspace.data(),
+                              sizeof(int64_t) * (2 * naxes),
+                              cudaMemcpyHostToDevice,
+                              stream));
 
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<IndexArrayKernel<req_type>, gpu>::Launch(s, in_data.Size(),
-          out_data.dptr<int64_t>(), naxes, workspace.dptr_);
+      Kernel<IndexArrayKernel<req_type>, gpu>::Launch(
+          s, in_data.Size(), out_data.dptr<int64_t>(), naxes, workspace.dptr_);
     });
   } else {
     Tensor<gpu, 1, dim_t> workspace =
         ctx.requested[0].get_space_typed<gpu, 1, dim_t>(Shape1(ndim), s);
 
-    CUDA_CALL(cudaMemcpyAsync(workspace.dptr_, inshape.data(), sizeof(dim_t) * ndim,
-                              cudaMemcpyHostToDevice, stream));
+    CUDA_CALL(cudaMemcpyAsync(
+        workspace.dptr_, inshape.data(), sizeof(dim_t) * ndim, cudaMemcpyHostToDevice, stream));
 
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<IndexArrayDefaultKernel<req_type>, gpu>::Launch(s, in_data.Size(),
-          out_data.dptr<int64_t>(), ndim, workspace.dptr_);
+      Kernel<IndexArrayDefaultKernel<req_type>, gpu>::Launch(
+          s, in_data.Size(), out_data.dptr<int64_t>(), ndim, workspace.dptr_);
     });
   }
 }
 
-NNVM_REGISTER_OP(_contrib_index_array)
-.set_attr<FCompute>("FCompute<gpu>", IndexArrayForwardGPU);
+NNVM_REGISTER_OP(_contrib_index_array).set_attr<FCompute>("FCompute<gpu>", IndexArrayForwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/index_copy-inl.h b/src/operator/contrib/index_copy-inl.h
index 35bfcd0e77b6..21418b324be7 100644
--- a/src/operator/contrib/index_copy-inl.h
+++ b/src/operator/contrib/index_copy-inl.h
@@ -37,14 +37,14 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
+template <typename xpu>
 void IndexCopyForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs);
 
-template<typename xpu>
+template <typename xpu>
 void IndexCopyBackward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -52,8 +52,8 @@ void IndexCopyBackward(const nnvm::NodeAttrs& attrs,
                        const std::vector<TBlob>& outputs);
 
 inline bool IndexCopyShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   // inputs[0]: original tensor
   // inputs[1]: index vector
   // inputs[2]: copied tensor
diff --git a/src/operator/contrib/index_copy.cc b/src/operator/contrib/index_copy.cc
index 2543f2deca6d..79cb3005f538 100644
--- a/src/operator/contrib/index_copy.cc
+++ b/src/operator/contrib/index_copy.cc
@@ -27,13 +27,13 @@ namespace mxnet {
 namespace op {
 
 struct index_copy_fwd_cpu {
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   static void Map(index_t i,
                   const DType* new_tensor,
                   const IType* idx,
                   DType* out_tensor,
                   int dim_size) {
-    DType* out_ptr = out_tensor + static_cast<index_t>(idx[i]) * dim_size;
+    DType* out_ptr       = out_tensor + static_cast<index_t>(idx[i]) * dim_size;
     const DType* new_ptr = new_tensor + i * dim_size;
 #pragma GCC diagnostic push
 #if __GNUC__ >= 8
@@ -44,7 +44,7 @@ struct index_copy_fwd_cpu {
   }
 };
 
-template<>
+template <>
 void IndexCopyForward<cpu>(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -56,27 +56,31 @@ void IndexCopyForward<cpu>(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK(req[0] != kAddTo);
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
-  const TBlob& out = outputs[0];
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<cpu>* s      = ctx.get_stream<cpu>();
+  const TBlob& out             = outputs[0];
   const TBlob& original_tensor = inputs[0];
-  const TBlob& idx_vector = inputs[1];
-  const TBlob& copied_tensor = inputs[2];
-  int dim_size = inputs[2].Size() / inputs[1].Size();
+  const TBlob& idx_vector      = inputs[1];
+  const TBlob& copied_tensor   = inputs[2];
+  int dim_size                 = inputs[2].Size() / inputs[1].Size();
   // copy original tensor to output
   copy(s, out, original_tensor);
   // index copy
   MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(idx_vector.type_flag_, IType, {
-      Kernel<index_copy_fwd_cpu, cpu>::Launch(
-        s, idx_vector.Size(), copied_tensor.dptr<DType>(),
-        idx_vector.dptr<IType>(), out.dptr<DType>(), dim_size);
+      Kernel<index_copy_fwd_cpu, cpu>::Launch(s,
+                                              idx_vector.Size(),
+                                              copied_tensor.dptr<DType>(),
+                                              idx_vector.dptr<IType>(),
+                                              out.dptr<DType>(),
+                                              dim_size);
     });
   });
 }
 
 struct index_copy_bwd_cpu {
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   static void Map(int i,
                   const DType* out_tensor_grad,
                   DType* orig_tensor_grad,
@@ -86,9 +90,9 @@ struct index_copy_bwd_cpu {
                   int idx_size,
                   OpReqType orig_req,
                   OpReqType new_req) {
-    const int index = idx[i];
-    DType* new_ptr = new_tensor_grad + i * dim_size;
-    DType* orig_ptr = orig_tensor_grad + index * dim_size;
+    const int index      = idx[i];
+    DType* new_ptr       = new_tensor_grad + i * dim_size;
+    DType* orig_ptr      = orig_tensor_grad + index * dim_size;
     const DType* src_ptr = out_tensor_grad + index * dim_size;
     for (int iter = 0; iter < dim_size; ++iter) {
       KERNEL_ASSIGN(new_ptr[iter], new_req, src_ptr[iter]);
@@ -110,7 +114,7 @@ struct index_copy_bwd_cpu {
   }
 };
 
-template<>
+template <>
 void IndexCopyBackward<cpu>(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -120,15 +124,15 @@ void IndexCopyBackward<cpu>(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 4U);
   CHECK_EQ(outputs.size(), 3U);
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  const TBlob& out_grad = inputs[0];
-  const TBlob& index = inputs[2];
+  Stream<cpu>* s         = ctx.get_stream<cpu>();
+  const TBlob& out_grad  = inputs[0];
+  const TBlob& index     = inputs[2];
   const TBlob& in_grad_1 = outputs[0];
   const TBlob& in_grad_2 = outputs[2];
-  int dim_size = inputs[3].Size() / inputs[2].Size();
-  int index_size = inputs[2].Size();
-  OpReqType orig_req = req[0];
-  OpReqType new_req = req[2];
+  int dim_size           = inputs[3].Size() / inputs[2].Size();
+  int index_size         = inputs[2].Size();
+  OpReqType orig_req     = req[0];
+  OpReqType new_req      = req[2];
   // index_copy_backward
   MSHADOW_TYPE_SWITCH(out_grad.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(index.type_flag_, IType, {
@@ -141,20 +145,29 @@ void IndexCopyBackward<cpu>(const nnvm::NodeAttrs& attrs,
           break;
         case kAddTo:
           Kernel<op_with_req<op::mshadow_op::plus, kWriteInplace>, cpu>::Launch(
-            s, out_grad.Size(), in_grad_1.dptr<DType>(),
-            out_grad.dptr<DType>(), in_grad_1.dptr<DType>());
+              s,
+              out_grad.Size(),
+              in_grad_1.dptr<DType>(),
+              out_grad.dptr<DType>(),
+              in_grad_1.dptr<DType>());
       }
-      Kernel<index_copy_bwd_cpu, cpu>::Launch(
-        s, index_size, out_grad.dptr<DType>(),
-        in_grad_1.dptr<DType>(), in_grad_2.dptr<DType>(),
-        index.dptr<IType>(), dim_size, index_size, orig_req, new_req);
+      Kernel<index_copy_bwd_cpu, cpu>::Launch(s,
+                                              index_size,
+                                              out_grad.dptr<DType>(),
+                                              in_grad_1.dptr<DType>(),
+                                              in_grad_2.dptr<DType>(),
+                                              index.dptr<IType>(),
+                                              dim_size,
+                                              index_size,
+                                              orig_req,
+                                              new_req);
     });
   });
 }
 
 static bool IndexCopyType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_attrs,
-                          std::vector<int> *out_attrs) {
+                          std::vector<int>* in_attrs,
+                          std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
@@ -163,7 +176,7 @@ static bool IndexCopyType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_index_copy)
-.describe(R"code(Copies the elements of a `new_tensor` into the `old_tensor`.
+    .describe(R"code(Copies the elements of a `new_tensor` into the `old_tensor`.
 
 This operator copies the elements by selecting the indices in the order given in `index`.
 The output will be a new tensor containing the rest elements of old tensor and
@@ -191,25 +204,26 @@ Examples::
     <NDArray 5x3 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", IndexCopyShape)
-.set_attr<nnvm::FInferType>("FInferType", IndexCopyType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_contrib_backward_index_copy"})
-.set_attr<FCompute>("FCompute<cpu>", IndexCopyForward<cpu>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"old_tensor", "index_vector", "new_tensor"};
-  })
-.add_argument("old_tensor", "NDArray-or-Symbol", "Old tensor")
-.add_argument("index_vector", "NDArray-or-Symbol", "Index vector")
-.add_argument("new_tensor", "NDArray-or-Symbol", "New tensor to be copied");
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", IndexCopyShape)
+    .set_attr<nnvm::FInferType>("FInferType", IndexCopyType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_contrib_backward_index_copy"})
+    .set_attr<FCompute>("FCompute<cpu>", IndexCopyForward<cpu>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"old_tensor", "index_vector", "new_tensor"};
+        })
+    .add_argument("old_tensor", "NDArray-or-Symbol", "Old tensor")
+    .add_argument("index_vector", "NDArray-or-Symbol", "Index vector")
+    .add_argument("new_tensor", "NDArray-or-Symbol", "New tensor to be copied");
 
 NNVM_REGISTER_OP(_contrib_backward_index_copy)
-.set_num_inputs(4)
-.set_num_outputs(3)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", IndexCopyBackward<cpu>);
+    .set_num_inputs(4)
+    .set_num_outputs(3)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", IndexCopyBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/index_copy.cu b/src/operator/contrib/index_copy.cu
index 53f2600aba06..131c389a8cf5 100644
--- a/src/operator/contrib/index_copy.cu
+++ b/src/operator/contrib/index_copy.cu
@@ -27,18 +27,18 @@ namespace mxnet {
 namespace op {
 
 struct index_copy_fwd_gpu {
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   MSHADOW_XINLINE static void Map(int i,
                                   const DType* new_tensor,
                                   const IType* idx,
                                   DType* out_tensor,
                                   int dim_size) {
-    int index = static_cast<int>(idx[i / dim_size]);
+    int index                                   = static_cast<int>(idx[i / dim_size]);
     out_tensor[index * dim_size + i % dim_size] = new_tensor[i];
   }
 };
 
-template<>
+template <>
 void IndexCopyForward<gpu>(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -50,27 +50,31 @@ void IndexCopyForward<gpu>(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK(req[0] != kAddTo);
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  const TBlob& out = outputs[0];
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<gpu>* s      = ctx.get_stream<gpu>();
+  const TBlob& out             = outputs[0];
   const TBlob& original_tensor = inputs[0];
-  const TBlob& idx_vector = inputs[1];
-  const TBlob& copied_tensor = inputs[2];
-  int dim_size = inputs[2].Size() / inputs[1].Size();
+  const TBlob& idx_vector      = inputs[1];
+  const TBlob& copied_tensor   = inputs[2];
+  int dim_size                 = inputs[2].Size() / inputs[1].Size();
   // copy original tensor to output
   copy(s, out, original_tensor);
   // index copy
   MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(idx_vector.type_flag_, IType, {
-      Kernel<index_copy_fwd_gpu, gpu>::Launch(
-        s, copied_tensor.Size(), copied_tensor.dptr<DType>(),
-        idx_vector.dptr<IType>(), out.dptr<DType>(), dim_size);
+      Kernel<index_copy_fwd_gpu, gpu>::Launch(s,
+                                              copied_tensor.Size(),
+                                              copied_tensor.dptr<DType>(),
+                                              idx_vector.dptr<IType>(),
+                                              out.dptr<DType>(),
+                                              dim_size);
     });
   });
 }
 
 struct index_copy_bwd_gpu {
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   MSHADOW_XINLINE static void Map(int i,
                                   const DType* out_grad,
                                   DType* orig_grad,
@@ -92,7 +96,7 @@ struct index_copy_bwd_gpu {
   }
 };
 
-template<>
+template <>
 void IndexCopyBackward<gpu>(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -102,15 +106,15 @@ void IndexCopyBackward<gpu>(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 4U);
   CHECK_EQ(outputs.size(), 3U);
-  Stream<gpu> *s = ctx.get_stream<gpu>();
-  const TBlob& out_grad = inputs[0];
-  const TBlob& index = inputs[2];
+  Stream<gpu>* s         = ctx.get_stream<gpu>();
+  const TBlob& out_grad  = inputs[0];
+  const TBlob& index     = inputs[2];
   const TBlob& in_grad_1 = outputs[0];
   const TBlob& in_grad_2 = outputs[2];
-  int dim_size = inputs[3].Size() / inputs[2].Size();
-  int index_size = inputs[2].Size();
-  OpReqType orig_req = req[0];
-  OpReqType new_req = req[2];
+  int dim_size           = inputs[3].Size() / inputs[2].Size();
+  int index_size         = inputs[2].Size();
+  OpReqType orig_req     = req[0];
+  OpReqType new_req      = req[2];
   // index_copy_backward
   MSHADOW_TYPE_SWITCH(out_grad.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(index.type_flag_, IType, {
@@ -123,22 +127,30 @@ void IndexCopyBackward<gpu>(const nnvm::NodeAttrs& attrs,
           break;
         case kAddTo:
           Kernel<op_with_req<op::mshadow_op::plus, kWriteInplace>, gpu>::Launch(
-            s, out_grad.Size(), in_grad_1.dptr<DType>(),
-            out_grad.dptr<DType>(), in_grad_1.dptr<DType>());
+              s,
+              out_grad.Size(),
+              in_grad_1.dptr<DType>(),
+              out_grad.dptr<DType>(),
+              in_grad_1.dptr<DType>());
       }
-      Kernel<index_copy_bwd_gpu, gpu>::Launch(
-        s, in_grad_2.Size(), out_grad.dptr<DType>(),
-        in_grad_1.dptr<DType>(), in_grad_2.dptr<DType>(),
-        index.dptr<IType>(), dim_size, index_size, orig_req, new_req);
+      Kernel<index_copy_bwd_gpu, gpu>::Launch(s,
+                                              in_grad_2.Size(),
+                                              out_grad.dptr<DType>(),
+                                              in_grad_1.dptr<DType>(),
+                                              in_grad_2.dptr<DType>(),
+                                              index.dptr<IType>(),
+                                              dim_size,
+                                              index_size,
+                                              orig_req,
+                                              new_req);
     });
   });
 }
 
-NNVM_REGISTER_OP(_contrib_index_copy)
-.set_attr<FCompute>("FCompute<gpu>", IndexCopyForward<gpu>);
+NNVM_REGISTER_OP(_contrib_index_copy).set_attr<FCompute>("FCompute<gpu>", IndexCopyForward<gpu>);
 
 NNVM_REGISTER_OP(_contrib_backward_index_copy)
-.set_attr<FCompute>("FCompute<gpu>", IndexCopyBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", IndexCopyBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/intgemm/intgemm_fully_connected_op.cc b/src/operator/contrib/intgemm/intgemm_fully_connected_op.cc
index 216f5ce47ecc..610f0f257507 100644
--- a/src/operator/contrib/intgemm/intgemm_fully_connected_op.cc
+++ b/src/operator/contrib/intgemm/intgemm_fully_connected_op.cc
@@ -42,18 +42,18 @@ struct IntgemmFullyConnectedParam : public dmlc::Parameter<IntgemmFullyConnected
   bool flatten;
   DMLC_DECLARE_PARAMETER(IntgemmFullyConnectedParam) {
     // This part os a copy of the FullyConnected parameters.
-    DMLC_DECLARE_FIELD(num_hidden).set_lower_bound(1)
-    .describe("Number of hidden nodes of the output.");
-    DMLC_DECLARE_FIELD(no_bias).set_default(false)
-    .describe("Whether to disable bias parameter.");
-    DMLC_DECLARE_FIELD(flatten).set_default(true)
-    .describe("Whether to collapse all but the first axis of the input data tensor.");
+    DMLC_DECLARE_FIELD(num_hidden)
+        .set_lower_bound(1)
+        .describe("Number of hidden nodes of the output.");
+    DMLC_DECLARE_FIELD(no_bias).set_default(false).describe("Whether to disable bias parameter.");
+    DMLC_DECLARE_FIELD(flatten).set_default(true).describe(
+        "Whether to collapse all but the first axis of the input data tensor.");
 
     DMLC_DECLARE_FIELD(out_type)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("int32", mshadow::kInt32)
-    .set_default(mshadow::kFloat32)
-    .describe("Output data type.");
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("int32", mshadow::kInt32)
+        .set_default(mshadow::kFloat32)
+        .describe("Output data type.");
   }
 };
 DMLC_REGISTER_PARAMETER(IntgemmFullyConnectedParam);
@@ -62,14 +62,18 @@ namespace {
 // Parse the above fields into indices for parameters.
 // The order is: data weight [scaling] [bias].
 struct ParameterIndices {
-  explicit ParameterIndices(const IntgemmFullyConnectedParam& param) :
-    data(0),
-    weight(1),
-    scaling(param.out_type == mshadow::kFloat32 ? 2 : kInvalid),
-    bias(param.no_bias ? kInvalid : (HaveScaling() ? 3 : 2)),
-    count(2U + HaveScaling() + HaveBias()) {}
-  bool HaveScaling() const { return scaling != kInvalid; }
-  bool HaveBias() const { return bias != kInvalid; }
+  explicit ParameterIndices(const IntgemmFullyConnectedParam& param)
+      : data(0),
+        weight(1),
+        scaling(param.out_type == mshadow::kFloat32 ? 2 : kInvalid),
+        bias(param.no_bias ? kInvalid : (HaveScaling() ? 3 : 2)),
+        count(2U + HaveScaling() + HaveBias()) {}
+  bool HaveScaling() const {
+    return scaling != kInvalid;
+  }
+  bool HaveBias() const {
+    return bias != kInvalid;
+  }
   const unsigned int data;
   const unsigned int weight;
   const unsigned int scaling;
@@ -77,9 +81,8 @@ struct ParameterIndices {
   const unsigned int count;
   static const unsigned int kInvalid = std::numeric_limits<unsigned int>::max();
 };
-template<class T> ParameterIndices Sanity(const nnvm::NodeAttrs& attrs,
-                                          T* in,
-                                          T* out) {
+template <class T>
+ParameterIndices Sanity(const nnvm::NodeAttrs& attrs, T* in, T* out) {
   // 3-4 parameters: A, B, scaling, and optional bias
   ParameterIndices ret(nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed));
   CHECK_EQ(in->size(), ret.count);
@@ -89,8 +92,8 @@ template<class T> ParameterIndices Sanity(const nnvm::NodeAttrs& attrs,
 }  // namespace
 
 inline bool IntgemmFullyConnectedOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector* in_shape,
-                             mxnet::ShapeVector* out_shape) {
+                                         mxnet::ShapeVector* in_shape,
+                                         mxnet::ShapeVector* out_shape) {
   const ParameterIndices indices(Sanity(attrs, in_shape, out_shape));
   const IntgemmFullyConnectedParam& param = nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed);
   // This follows FullyConnectedShape except for scaling.
@@ -98,11 +101,12 @@ inline bool IntgemmFullyConnectedOpShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape dshape = (*in_shape)[indices.data];
   mxnet::TShape oshape = (*out_shape)[0];
   // require data to be known
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   index_t num_input;
   if (!param.flatten) {
-    num_input = dshape[dshape.ndim()-1];
+    num_input = dshape[dshape.ndim() - 1];
   } else {
     num_input = dshape.ProdShape(1, dshape.ndim());
   }
@@ -119,7 +123,7 @@ inline bool IntgemmFullyConnectedOpShape(const nnvm::NodeAttrs& attrs,
 
   if (!param.flatten) {
     mxnet::TShape result_shape(dshape);
-    result_shape[dshape.ndim()-1] = param.num_hidden;
+    result_shape[dshape.ndim() - 1] = param.num_hidden;
     SHAPE_ASSIGN_CHECK(*out_shape, 0, result_shape);
   } else {
     SHAPE_ASSIGN_CHECK(*out_shape, 0, Shape2(dshape[0], param.num_hidden));
@@ -132,8 +136,8 @@ inline bool IntgemmFullyConnectedOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool IntgemmFullyConnectedOpType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int>* in_attrs,
-                            std::vector<int>* out_attrs) {
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
   const ParameterIndices indices(Sanity(attrs, in_attrs, out_attrs));
   const IntgemmFullyConnectedParam& param = nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed);
 
@@ -155,14 +159,14 @@ bool IntgemmFullyConnectedOpType(const nnvm::NodeAttrs& attrs,
     return false;
   }
   return ((*in_attrs)[indices.data] == mshadow::kInt8 ||
-      (*in_attrs)[indices.data] == mshadow::kFloat32);
+          (*in_attrs)[indices.data] == mshadow::kFloat32);
 }
 
 void IntgemmFullyConnectedOpForwardCPU(const nnvm::NodeAttrs& attrs,
-                          const OpContext& ctx,
-                          const std::vector<TBlob>& inputs,
-                          const std::vector<OpReqType>& req,
-                          const std::vector<TBlob>& outputs) {
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
   const ParameterIndices indices(Sanity(attrs, &inputs, &outputs));
   const IntgemmFullyConnectedParam& param = nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed);
   CHECK_EQ(req.size(), 1U);
@@ -179,7 +183,7 @@ void IntgemmFullyConnectedOpForwardCPU(const nnvm::NodeAttrs& attrs,
   CHECK_GE(A.shape_.ndim(), 1);
   CHECK_GE(B.shape_.ndim(), 2);
   size_t A_rows = A.shape_.ProdShape(0, A.shape_.ndim() - 1);
-  size_t inner = A.shape_[A.shape_.ndim() - 1];
+  size_t inner  = A.shape_[A.shape_.ndim() - 1];
   CHECK_EQ(B.shape_[B.shape_.ndim() - 1], inner);
   size_t B_cols = B.shape_.ProdShape(0, B.shape_.ndim() - 1);
 
@@ -190,11 +194,12 @@ void IntgemmFullyConnectedOpForwardCPU(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(inputs[indices.bias].type_flag_, C.type_flag_);
     CHECK_EQ(inputs[indices.bias].shape_.Size(), param.num_hidden);
   }
-  CHECK_EQ(inner % ::intgemm::Int8::tile_info.b_rows, 0) <<
-    "intgemm requires the inner dimension be a multiple of " << ::intgemm::Int8::tile_info.b_rows;
-  CHECK_EQ(B_cols % ::intgemm::Int8::tile_info.b_cols, 0) <<
-    "intgemm requires B have a multiple of " << ::intgemm::Int8::tile_info.b_cols <<
-    " columns in the equation C = AB.";
+  CHECK_EQ(inner % ::intgemm::Int8::tile_info.b_rows, 0)
+      << "intgemm requires the inner dimension be a multiple of "
+      << ::intgemm::Int8::tile_info.b_rows;
+  CHECK_EQ(B_cols % ::intgemm::Int8::tile_info.b_cols, 0)
+      << "intgemm requires B have a multiple of " << ::intgemm::Int8::tile_info.b_cols
+      << " columns in the equation C = AB.";
 
   float out_float_multiplier;
   if (indices.HaveScaling()) {
@@ -203,52 +208,48 @@ void IntgemmFullyConnectedOpForwardCPU(const nnvm::NodeAttrs& attrs,
     out_float_multiplier = 0.0;  // Unused; stop compiler from complaining.
   }
 
-  int8_t *A_quant;
+  int8_t* A_quant;
   mshadow::Tensor<cpu, 1, int8_t> A_quant_store;
   if (A.type_flag_ == mshadow::kFloat32) {
-    const float *A_raw = A.dptr<float>();
+    const float* A_raw = A.dptr<float>();
     // Quantize A for the user.
     // Future: allow scale to be passed in? Should the induced scale be an output?
     float scale = 127.0 / ::intgemm::MaxAbsolute(A_raw, A_raw + A.shape_.Size());
     out_float_multiplier /= scale;
     A_quant_store = ctx.requested[0].get_space_typed<cpu, 1, int8_t>(
-        mshadow::Shape1(A.shape_.Size()),
-        ctx.get_stream<cpu>());
+        mshadow::Shape1(A.shape_.Size()), ctx.get_stream<cpu>());
     A_quant = A_quant_store.dptr_;
     ::intgemm::Int8::PrepareA(A_raw, A_quant, scale, A_rows, inner);
   } else {
     CHECK_EQ(A.type_flag_, mshadow::kInt8);
     A_quant = A.dptr<int8_t>();
   }
-  const int8_t *B_quant = B.dptr<int8_t>();
-  CHECK_EQ(reinterpret_cast<intptr_t>(A_quant) % 64, 0) <<
-    "Pointers should be aligned to a multiple of 64.";
-  CHECK_EQ(reinterpret_cast<intptr_t>(B_quant) % 64, 0) <<
-    "Pointers should be aligned to a multiple of 64.";
+  const int8_t* B_quant = B.dptr<int8_t>();
+  CHECK_EQ(reinterpret_cast<intptr_t>(A_quant) % 64, 0)
+      << "Pointers should be aligned to a multiple of 64.";
+  CHECK_EQ(reinterpret_cast<intptr_t>(B_quant) % 64, 0)
+      << "Pointers should be aligned to a multiple of 64.";
   if (C.type_flag_ == mshadow::kFloat32) {
-    CHECK_EQ(reinterpret_cast<intptr_t>(C.dptr<float>()) % 64, 0) <<
-      "Pointers should be aligned to a multiple of 64.";
+    CHECK_EQ(reinterpret_cast<intptr_t>(C.dptr<float>()) % 64, 0)
+        << "Pointers should be aligned to a multiple of 64.";
   } else {
-    CHECK_EQ(reinterpret_cast<intptr_t>(C.dptr<int32_t>()) % 64, 0) <<
-      "Pointers should be aligned to a multiple of 64.";
+    CHECK_EQ(reinterpret_cast<intptr_t>(C.dptr<int32_t>()) % 64, 0)
+        << "Pointers should be aligned to a multiple of 64.";
   }
 
   if (bias) {
     if (C.type_flag_ == mshadow::kFloat32) {
-      CHECK_EQ(reinterpret_cast<intptr_t>(inputs[indices.bias].dptr<float>()) % 64, 0) <<
-        "Pointers should be aligned to a multiple of 64.";
+      CHECK_EQ(reinterpret_cast<intptr_t>(inputs[indices.bias].dptr<float>()) % 64, 0)
+          << "Pointers should be aligned to a multiple of 64.";
       ::intgemm::callbacks::UnquantizeAndAddBiasAndWrite cb(
-          out_float_multiplier,
-          inputs[indices.bias].dptr<float>(),
-          C.dptr<float>());
+          out_float_multiplier, inputs[indices.bias].dptr<float>(), C.dptr<float>());
       ::intgemm::Int8::Multiply(A_quant, B_quant, A_rows, inner, B_cols, cb);
     } else {
       // int32
-      CHECK_EQ(reinterpret_cast<intptr_t>(inputs[indices.bias].dptr<int32_t>()) % 64, 0) <<
-        "Pointers should be aligned to a multiple of 64.";
-      ::intgemm::callbacks::AddBiasAndWrite cb(
-          inputs[indices.bias].dptr<int32_t>(),
-          C.dptr<int32_t>());
+      CHECK_EQ(reinterpret_cast<intptr_t>(inputs[indices.bias].dptr<int32_t>()) % 64, 0)
+          << "Pointers should be aligned to a multiple of 64.";
+      ::intgemm::callbacks::AddBiasAndWrite cb(inputs[indices.bias].dptr<int32_t>(),
+                                               C.dptr<int32_t>());
       ::intgemm::Int8::Multiply(A_quant, B_quant, A_rows, inner, B_cols, cb);
     }
   } else {
@@ -264,8 +265,8 @@ void IntgemmFullyConnectedOpForwardCPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_intgemm_fully_connected)
-.add_alias("_npx_intgemm_fully_connected")
-.describe(R"code(Multiply matrices using 8-bit integers.  data * weight.
+    .add_alias("_npx_intgemm_fully_connected")
+    .describe(R"code(Multiply matrices using 8-bit integers.  data * weight.
 
 Input tensor arguments are: data weight [scaling] [bias]
 
@@ -281,48 +282,52 @@ bias: present if and only if !no_bias. This is added to the output after scaling
 
 out_type: type of the output.
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<IntgemmFullyConnectedParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  return ParameterIndices(nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed)).count;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    std::vector<std::string> ret{"data", "weight"};
-    ParameterIndices indices(nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed));
-    if (indices.HaveScaling()) {
-      ret.emplace_back("scaling");
-    }
-    if (indices.HaveBias()) {
-      ret.emplace_back("bias");
-    }
-    return ret;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", IntgemmFullyConnectedOpShape)
-.set_attr<nnvm::FInferType>("FInferType", IntgemmFullyConnectedOpType)
-.set_attr<FCompute>("FCompute<cpu>", IntgemmFullyConnectedOpForwardCPU)
-.add_argument(
-    "data",
-    "NDArray-or-Symbol",
-    "First argument to multiplication. Tensor of float32 (quantized on the fly) or int8 from "
-      "intgemm_prepare_data. If you use a different quantizer, be sure to ban -128. The last "
-      "dimension must be a multiple of 64.")
-.add_argument(
-    "weight",
-    "NDArray-or-Symbol",
-    "Second argument to multiplication. Tensor of int8 from intgemm_prepare_weight. The last "
-      "dimension must be a multiple of 64.  The product of non-last dimensions must be a multiple "
-      "of 8.")
-.add_argument("scaling", "NDArray-or-Symbol", "Scaling factor to apply if output type is float32.")
-.add_argument("bias", "NDArray-or-Symbol", "Bias term.")
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_arguments(IntgemmFullyConnectedParam::__FIELDS__());
+    .set_attr_parser(ParamParser<IntgemmFullyConnectedParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      return ParameterIndices(nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed)).count;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       std::vector<std::string> ret{"data", "weight"};
+                                       ParameterIndices indices(
+                                           nnvm::get<IntgemmFullyConnectedParam>(attrs.parsed));
+                                       if (indices.HaveScaling()) {
+                                         ret.emplace_back("scaling");
+                                       }
+                                       if (indices.HaveBias()) {
+                                         ret.emplace_back("bias");
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<mxnet::FInferShape>("FInferShape", IntgemmFullyConnectedOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", IntgemmFullyConnectedOpType)
+    .set_attr<FCompute>("FCompute<cpu>", IntgemmFullyConnectedOpForwardCPU)
+    .add_argument(
+        "data",
+        "NDArray-or-Symbol",
+        "First argument to multiplication. Tensor of float32 (quantized on the fly) or int8 from "
+        "intgemm_prepare_data. If you use a different quantizer, be sure to ban -128. The last "
+        "dimension must be a multiple of 64.")
+    .add_argument(
+        "weight",
+        "NDArray-or-Symbol",
+        "Second argument to multiplication. Tensor of int8 from intgemm_prepare_weight. The last "
+        "dimension must be a multiple of 64.  The product of non-last dimensions must be a "
+        "multiple "
+        "of 8.")
+    .add_argument("scaling",
+                  "NDArray-or-Symbol",
+                  "Scaling factor to apply if output type is float32.")
+    .add_argument("bias", "NDArray-or-Symbol", "Bias term.")
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_arguments(IntgemmFullyConnectedParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/intgemm/max_absolute_op.cc b/src/operator/contrib/intgemm/max_absolute_op.cc
index 01e10b0f9908..e82d24006981 100644
--- a/src/operator/contrib/intgemm/max_absolute_op.cc
+++ b/src/operator/contrib/intgemm/max_absolute_op.cc
@@ -35,8 +35,8 @@ namespace mxnet {
 namespace op {
 
 inline bool MaxAbsoluteOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector* in_attrs,
-                             mxnet::ShapeVector* out_attrs) {
+                               mxnet::ShapeVector* in_attrs,
+                               mxnet::ShapeVector* out_attrs) {
   // One in, one out.
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -46,8 +46,8 @@ inline bool MaxAbsoluteOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool MaxAbsoluteOpType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int>* in_attrs,
-                            std::vector<int>* out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -57,10 +57,10 @@ inline bool MaxAbsoluteOpType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool MaxAbsoluteOpStorageType(const nnvm::NodeAttrs& attrs,
-                                   const int dev_mask,
-                                   DispatchMode* dispatch_mode,
-                                   std::vector<int>* in_attrs,
-                                   std::vector<int>* out_attrs) {
+                                     const int dev_mask,
+                                     DispatchMode* dispatch_mode,
+                                     std::vector<int>* in_attrs,
+                                     std::vector<int>* out_attrs) {
   *dispatch_mode = DispatchMode::kFCompute;
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -84,36 +84,37 @@ void MaxAbsoluteOpForwardCPU(const nnvm::NodeAttrs& attrs,
 
   const std::size_t size = in.shape_.Size();
 
-  const float *data = in.dptr<float>();
+  const float* data = in.dptr<float>();
   // To maintain alignment, be a multiple of AVX512 register size.
   const std::size_t kMultiple = 512 / 8;
   CHECK_EQ(reinterpret_cast<intptr_t>(data) % kMultiple, 0)
-    << "Data must be aligned to " << kMultiple << " bytes.";
+      << "Data must be aligned to " << kMultiple << " bytes.";
 
   float result = ::intgemm::MaxAbsolute(data, data + size);
   KERNEL_ASSIGN(*out.dptr<float>(), req[0], result);
 }
 
 NNVM_REGISTER_OP(_contrib_intgemm_maxabsolute)
-.add_alias("_npx_intgemm_maxabsolute")
-.describe(R"code(Compute the maximum absolute value in a tensor of float32 fast on a CPU.  The tensor's total size must be a multiple of 16 and aligned to a multiple of 64 bytes.
+    .add_alias("_npx_intgemm_maxabsolute")
+    .describe(
+        R"code(Compute the maximum absolute value in a tensor of float32 fast on a CPU.  The tensor's total size must be a multiple of 16 and aligned to a multiple of 64 bytes.
 mxnet.nd.contrib.intgemm_maxabsolute(arr) == arr.abs().max()
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", MaxAbsoluteOpShape)
-.set_attr<nnvm::FInferType>("FInferType", MaxAbsoluteOpType)
-.set_attr<FInferStorageType>("FInferStorageType", MaxAbsoluteOpStorageType)
-.set_attr<FCompute>("FCompute<cpu>", MaxAbsoluteOpForwardCPU)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "Tensor to compute maximum absolute value of");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", MaxAbsoluteOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", MaxAbsoluteOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", MaxAbsoluteOpStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", MaxAbsoluteOpForwardCPU)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "Tensor to compute maximum absolute value of");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/intgemm/prepare_data_op.cc b/src/operator/contrib/intgemm/prepare_data_op.cc
index 1d5719de36d2..fead790329dc 100644
--- a/src/operator/contrib/intgemm/prepare_data_op.cc
+++ b/src/operator/contrib/intgemm/prepare_data_op.cc
@@ -37,8 +37,8 @@ namespace mxnet {
 namespace op {
 
 bool PrepareDataOpShape(const nnvm::NodeAttrs& attrs,
-                    mxnet::ShapeVector* in_attrs,
-                    mxnet::ShapeVector* out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   // data and maximum
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -52,8 +52,8 @@ bool PrepareDataOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool PrepareDataOpType(const nnvm::NodeAttrs& attrs,
-                   std::vector<int>* in_attrs,
-                   std::vector<int>* out_attrs) {
+                       std::vector<int>* in_attrs,
+                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -65,10 +65,10 @@ bool PrepareDataOpType(const nnvm::NodeAttrs& attrs,
 }
 
 bool PrepareDataOpStorageType(const nnvm::NodeAttrs& attrs,
-                          const int dev_mask,
-                          DispatchMode* dispatch_mode,
-                          std::vector<int>* in_attrs,
-                          std::vector<int>* out_attrs) {
+                              const int dev_mask,
+                              DispatchMode* dispatch_mode,
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   STORAGE_TYPE_ASSIGN_CHECK(*out_attrs, 0, kDefaultStorage);
@@ -79,10 +79,10 @@ bool PrepareDataOpStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 void PrepareDataOpForwardCPU(const nnvm::NodeAttrs& attrs,
-                          const OpContext& ctx,
-                          const std::vector<TBlob>& inputs,
-                          const std::vector<OpReqType>& req,
-                          const std::vector<TBlob>& outputs) {
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
@@ -94,8 +94,8 @@ void PrepareDataOpForwardCPU(const nnvm::NodeAttrs& attrs,
   CHECK(in.CheckContiguous());
   CHECK(out.CheckContiguous());
 
-  const float *A = in.dptr<float>();
-  int8_t *quantA = out.dptr<int8_t>();
+  const float* A = in.dptr<float>();
+  int8_t* quantA = out.dptr<int8_t>();
   CHECK_EQ(reinterpret_cast<intptr_t>(A) % 64, 0);
   CHECK_EQ(reinterpret_cast<intptr_t>(quantA) % 64, 0);
   const float multiplier = 127.0 / *inputs[1].dptr<float>();
@@ -103,32 +103,34 @@ void PrepareDataOpForwardCPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_intgemm_prepare_data)
-.add_alias("_npx_intgemm_prepare_data")
-.describe(R"code(This operator converts quantizes float32 to int8 while also banning -128.
+    .add_alias("_npx_intgemm_prepare_data")
+    .describe(R"code(This operator converts quantizes float32 to int8 while also banning -128.
 
 It it suitable for preparing an data matrix for use by intgemm's C=data * weights operation.
 
 The float32 values are scaled such that maxabs maps to 127. Typically maxabs = maxabsolute(A).
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "maxabs"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", PrepareDataOpShape)
-.set_attr<nnvm::FInferType>("FInferType", PrepareDataOpType)
-.set_attr<FInferStorageType>("FInferStorageType", PrepareDataOpStorageType)
-.set_attr<FCompute>("FCompute<cpu>", PrepareDataOpForwardCPU)
-.add_argument("data", "NDArray-or-Symbol", "Activation matrix to be prepared for multiplication.")
-.add_argument(
-    "maxabs",
-    "NDArray-or-Symbol",
-    "Maximum absolute value to be used for scaling.  (The values will be multiplied by 127.0 / "
-      "maxabs.")
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "maxabs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", PrepareDataOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", PrepareDataOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", PrepareDataOpStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", PrepareDataOpForwardCPU)
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "Activation matrix to be prepared for multiplication.")
+    .add_argument(
+        "maxabs",
+        "NDArray-or-Symbol",
+        "Maximum absolute value to be used for scaling.  (The values will be multiplied by 127.0 / "
+        "maxabs.")
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/intgemm/prepare_weight_op.cc b/src/operator/contrib/intgemm/prepare_weight_op.cc
index ad106ebca00b..798fe7621711 100644
--- a/src/operator/contrib/intgemm/prepare_weight_op.cc
+++ b/src/operator/contrib/intgemm/prepare_weight_op.cc
@@ -37,15 +37,16 @@ namespace op {
 struct PrepareWeightParam : public dmlc::Parameter<PrepareWeightParam> {
   bool already_quantized;
   DMLC_DECLARE_PARAMETER(PrepareWeightParam) {
-    DMLC_DECLARE_FIELD(already_quantized).set_default(false)
-    .describe("Is the weight matrix already quantized?");
+    DMLC_DECLARE_FIELD(already_quantized)
+        .set_default(false)
+        .describe("Is the weight matrix already quantized?");
   }
 };
 DMLC_REGISTER_PARAMETER(PrepareWeightParam);
 
 bool PrepareWeightOpShape(const nnvm::NodeAttrs& attrs,
-                    mxnet::ShapeVector* in_attrs,
-                    mxnet::ShapeVector* out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   // Optimal maximum parameter.
   CHECK_GE(in_attrs->size(), 1U) << "Need at least weight to quantize.";
   CHECK_LE(in_attrs->size(), 2U) << "weight and maximum for scaling.";
@@ -61,8 +62,8 @@ bool PrepareWeightOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool PrepareWeightOpType(const nnvm::NodeAttrs& attrs,
-                   std::vector<int>* in_attrs,
-                   std::vector<int>* out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt8);
   CHECK_GE(in_attrs->size(), 1U) << "Need at least weight to quantize.";
   CHECK_LE(in_attrs->size(), 2U) << "weight and maximum for scaling.";
@@ -76,10 +77,10 @@ bool PrepareWeightOpType(const nnvm::NodeAttrs& attrs,
 }
 
 bool PrepareWeightOpStorageType(const nnvm::NodeAttrs& attrs,
-                          const int dev_mask,
-                          DispatchMode* dispatch_mode,
-                          std::vector<int>* in_attrs,
-                          std::vector<int>* out_attrs) {
+                                const int dev_mask,
+                                DispatchMode* dispatch_mode,
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK_GE(in_attrs->size(), 1U) << "Need at least weight to quantize.";
   CHECK_LE(in_attrs->size(), 2U) << "weight and maximum for scaling.";
   CHECK_EQ(out_attrs->size(), 1U);
@@ -93,55 +94,53 @@ bool PrepareWeightOpStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 void PrepareWeightOpForwardCPU(const nnvm::NodeAttrs& attrs,
-                          const OpContext& ctx,
-                          const std::vector<TBlob>& inputs,
-                          const std::vector<OpReqType>& req,
-                          const std::vector<TBlob>& outputs) {
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   const PrepareWeightParam& params = nnvm::get<PrepareWeightParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), params.already_quantized ? 1U : 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo) << "intgemm only overwrites";
 
-  const TBlob &in = inputs.front();
-  const TBlob &out = outputs.front();
+  const TBlob& in  = inputs.front();
+  const TBlob& out = outputs.front();
   CHECK_EQ(out.type_flag_, mshadow::kInt8);
   CHECK(in.CheckContiguous());
   CHECK(out.CheckContiguous());
   size_t B_cols = in.shape_.ProdShape(0, in.shape_.ndim() - 1);
-  size_t inner = in.shape_[in.shape_.ndim() - 1];
-  CHECK_EQ(inner % ::intgemm::Int8::tile_info.b_rows, 0) <<
-    "intgemm requires the inner dimension be a multiple of " << ::intgemm::Int8::tile_info.b_rows;
-  CHECK_EQ(B_cols % ::intgemm::Int8::tile_info.b_cols, 0) <<
-    "intgemm requires the output dimension (the product of all but the last dimension of the "
-    "weight matrix) to be a multiple of " << ::intgemm::Int8::tile_info.b_cols << ".";
-
-  int8_t *quantB = out.dptr<int8_t>();
-  CHECK_EQ(reinterpret_cast<intptr_t>(quantB) % 64, 0) <<
-    "Pointers should be aligned to a multiple of 64.";
-  CHECK(in.type_flag_ == mshadow::kFloat32 || in.type_flag_ == mshadow::kInt8) <<
-    "Expected either 32-bit values to be quantized or 8-bit values to rearrange.";
+  size_t inner  = in.shape_[in.shape_.ndim() - 1];
+  CHECK_EQ(inner % ::intgemm::Int8::tile_info.b_rows, 0)
+      << "intgemm requires the inner dimension be a multiple of "
+      << ::intgemm::Int8::tile_info.b_rows;
+  CHECK_EQ(B_cols % ::intgemm::Int8::tile_info.b_cols, 0)
+      << "intgemm requires the output dimension (the product of all but the last dimension of the "
+         "weight matrix) to be a multiple of "
+      << ::intgemm::Int8::tile_info.b_cols << ".";
+
+  int8_t* quantB = out.dptr<int8_t>();
+  CHECK_EQ(reinterpret_cast<intptr_t>(quantB) % 64, 0)
+      << "Pointers should be aligned to a multiple of 64.";
+  CHECK(in.type_flag_ == mshadow::kFloat32 || in.type_flag_ == mshadow::kInt8)
+      << "Expected either 32-bit values to be quantized or 8-bit values to rearrange.";
   if (in.type_flag_ == mshadow::kInt8) {
-    const int8_t *B = in.dptr<int8_t>();
-    CHECK_EQ(reinterpret_cast<intptr_t>(B) % 64, 0) <<
-      "Pointers should be aligned to a multiple of 64.";
+    const int8_t* B = in.dptr<int8_t>();
+    CHECK_EQ(reinterpret_cast<intptr_t>(B) % 64, 0)
+        << "Pointers should be aligned to a multiple of 64.";
     ::intgemm::Int8::PrepareBQuantizedTransposed(B, quantB, inner, B_cols);
   } else if (in.type_flag_ == mshadow::kFloat32) {
-    const float *B = in.dptr<float>();
-    CHECK_EQ(reinterpret_cast<intptr_t>(B) % 64, 0) <<
-      "Pointers should be aligned to a multiple of 64.";
-    ::intgemm::Int8::PrepareBTransposed(
-        B,
-        quantB,
-        127.0 / *inputs[1].dptr<float>(),
-        inner,
-        B_cols);
+    const float* B = in.dptr<float>();
+    CHECK_EQ(reinterpret_cast<intptr_t>(B) % 64, 0)
+        << "Pointers should be aligned to a multiple of 64.";
+    ::intgemm::Int8::PrepareBTransposed(B, quantB, 127.0 / *inputs[1].dptr<float>(), inner, B_cols);
   }
 }
 
 NNVM_REGISTER_OP(_contrib_intgemm_prepare_weight)
-.add_alias("_npx_intgemm_prepare_weight")
-.describe(R"code(This operator converts a weight matrix in column-major format to intgemm's internal fast representation of weight matrices.  MXNet customarily stores weight matrices in column-major (transposed) format. This operator is not meant to be fast; it is meant to be run offline to quantize a model.
+    .add_alias("_npx_intgemm_prepare_weight")
+    .describe(
+        R"code(This operator converts a weight matrix in column-major format to intgemm's internal fast representation of weight matrices.  MXNet customarily stores weight matrices in column-major (transposed) format. This operator is not meant to be fast; it is meant to be run offline to quantize a model.
 
 In other words, it prepares weight for the operation C = data * weight^T.
 
@@ -151,30 +150,35 @@ If the provided weight matrix is already int8, the matrix will only be rearrange
 
 The internal representation depends on register length.  So AVX512, AVX2, and SSSE3 have different formats.  AVX512BW and AVX512VNNI have the same representation.
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<PrepareWeightParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const PrepareWeightParam& params = nnvm::get<PrepareWeightParam>(attrs.parsed);
-  return params.already_quantized ? 1 : 2;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  const PrepareWeightParam& params = nnvm::get<PrepareWeightParam>(attrs.parsed);
-  return params.already_quantized ?
-    std::vector<std::string>{"weight"} : std::vector<std::string>{"weight", "maxabs"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", PrepareWeightOpShape)
-.set_attr<nnvm::FInferType>("FInferType", PrepareWeightOpType)
-.set_attr<FInferStorageType>("FInferStorageType", PrepareWeightOpStorageType)
-.set_attr<FCompute>("FCompute<cpu>", PrepareWeightOpForwardCPU)
-.add_argument("weight", "NDArray-or-Symbol", "Parameter matrix to be prepared for multiplication.")
-.add_argument(
-    "maxabs",
-    "NDArray-or-Symbol",
-    "Maximum absolute value for scaling. The weights will be multipled by 127.0 / maxabs.")
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_arguments(PrepareWeightParam::__FIELDS__());
+    .set_attr_parser(ParamParser<PrepareWeightParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const PrepareWeightParam& params = nnvm::get<PrepareWeightParam>(attrs.parsed);
+      return params.already_quantized ? 1 : 2;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const PrepareWeightParam& params =
+                                           nnvm::get<PrepareWeightParam>(attrs.parsed);
+                                       return params.already_quantized
+                                                  ? std::vector<std::string>{"weight"}
+                                                  : std::vector<std::string>{"weight", "maxabs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", PrepareWeightOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", PrepareWeightOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", PrepareWeightOpStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", PrepareWeightOpForwardCPU)
+    .add_argument("weight",
+                  "NDArray-or-Symbol",
+                  "Parameter matrix to be prepared for multiplication.")
+    .add_argument(
+        "maxabs",
+        "NDArray-or-Symbol",
+        "Maximum absolute value for scaling. The weights will be multipled by 127.0 / maxabs.")
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_arguments(PrepareWeightParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/intgemm/take_weight_op.cc b/src/operator/contrib/intgemm/take_weight_op.cc
index 09e320e47327..441d8f4581a7 100644
--- a/src/operator/contrib/intgemm/take_weight_op.cc
+++ b/src/operator/contrib/intgemm/take_weight_op.cc
@@ -37,15 +37,15 @@ namespace mxnet {
 namespace op {
 
 inline bool TakeWeightOpShape(const nnvm::NodeAttrs& shape,
-                             mxnet::ShapeVector* in_shape,
-                             mxnet::ShapeVector* out_shape) {
+                              mxnet::ShapeVector* in_shape,
+                              mxnet::ShapeVector* out_shape) {
   // 0 is weight, 1 is indices.
   CHECK_EQ(in_shape->size(), 2U);
   CHECK_EQ(out_shape->size(), 1U);
 
-  mxnet::TShape &weight = (*in_shape)[0];
-  mxnet::TShape &indices = (*in_shape)[1];
-  mxnet::TShape &out = (*out_shape)[0];
+  mxnet::TShape& weight  = (*in_shape)[0];
+  mxnet::TShape& indices = (*in_shape)[1];
+  mxnet::TShape& out     = (*out_shape)[0];
 
   // weight matrices should be 2-dimensional by now.
   SHAPE_ASSIGN_CHECK(*in_shape, 0, mxnet::TShape(2, -1));
@@ -101,46 +101,44 @@ void TakeWeightOpForwardCPU(const nnvm::NodeAttrs& attrs,
   CHECK(indices.CheckContiguous());
   CHECK(out.CheckContiguous());
   size_t B_cols = indices.shape_[0];
-  size_t inner = weight.shape_[weight.shape_.ndim() - 1];
-  CHECK_EQ(inner % ::intgemm::Int8::tile_info.b_rows, 0) <<
-    "intgemm requires the inner dimension be a multiple of " << ::intgemm::Int8::tile_info.b_rows;
-  CHECK_EQ(B_cols % ::intgemm::Int8::tile_info.b_cols, 0) <<
-    "For efficiency, intgemm requires there to be a multiple of " <<
-    ::intgemm::Int8::tile_info.b_cols << " indices.";
+  size_t inner  = weight.shape_[weight.shape_.ndim() - 1];
+  CHECK_EQ(inner % ::intgemm::Int8::tile_info.b_rows, 0)
+      << "intgemm requires the inner dimension be a multiple of "
+      << ::intgemm::Int8::tile_info.b_rows;
+  CHECK_EQ(B_cols % ::intgemm::Int8::tile_info.b_cols, 0)
+      << "For efficiency, intgemm requires there to be a multiple of "
+      << ::intgemm::Int8::tile_info.b_cols << " indices.";
   // mxnet doesn't have a uint32_t type so we'll just pointer cast. But check the sizes are the
   // same.  Ideally this should be static.
   assert(sizeof(int32_t) == sizeof(::intgemm::Index));
-  const ::intgemm::Index *index =
-    reinterpret_cast<const ::intgemm::Index*>(indices.dptr<int32_t>());
+  const ::intgemm::Index* index =
+      reinterpret_cast<const ::intgemm::Index*>(indices.dptr<int32_t>());
 
   ::intgemm::Int8::SelectColumnsB(
-      weight.dptr<int8_t>(),
-      out.dptr<int8_t>(),
-      inner,
-      index,
-      index + B_cols);
+      weight.dptr<int8_t>(), out.dptr<int8_t>(), inner, index, index + B_cols);
 }
 
 NNVM_REGISTER_OP(_contrib_intgemm_take_weight)
-.add_alias("_npx_intgemm_take_weight")
-.describe(R"code(Index a weight matrix stored in intgemm's weight format.
+    .add_alias("_npx_intgemm_take_weight")
+    .describe(R"code(Index a weight matrix stored in intgemm's weight format.
 The indices select the outputs of matrix multiplication, not the inner dot product dimension.
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"weight", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TakeWeightOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TakeWeightOpType)
-.set_attr<FInferStorageType>("FInferStorageType", TakeWeightOpStorageType)
-.set_attr<FCompute>("FCompute<cpu>", TakeWeightOpForwardCPU)
-.add_argument(
-    "weight",
-    "NDArray-or-Symbol",
-    "Tensor already in intgemm weight format to select from")
-.add_argument("indices", "NDArray-or-Symbol", "indices to select on the 0th dimension of weight");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"weight", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TakeWeightOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TakeWeightOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", TakeWeightOpStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", TakeWeightOpForwardCPU)
+    .add_argument("weight",
+                  "NDArray-or-Symbol",
+                  "Tensor already in intgemm weight format to select from")
+    .add_argument("indices",
+                  "NDArray-or-Symbol",
+                  "indices to select on the 0th dimension of weight");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/krprod.cc b/src/operator/contrib/krprod.cc
index f0325645f4dd..7a4e8bfda371 100644
--- a/src/operator/contrib/krprod.cc
+++ b/src/operator/contrib/krprod.cc
@@ -17,7 +17,6 @@ n * with the License.  You may obtain a copy of the License at
  * under the License.
  */
 
-
 /*!
  *  \file krprod.cc
  *  \brief Operator registration for Khatri-Rao product
@@ -40,17 +39,16 @@ n * with the License.  You may obtain a copy of the License at
 namespace mxnet {
 namespace op {
 
-inline bool KhatriRaoShape(
-      const nnvm::NodeAttrs& attrs,
-      mxnet::ShapeVector *in_attrs,
-      mxnet::ShapeVector *out_attrs) {
+inline bool KhatriRaoShape(const nnvm::NodeAttrs& attrs,
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(out_attrs->size(), 1);
   CHECK_GE(in_attrs->size(), 1);
 
   // all input and output matrices must have the same number of rows/columns
   // (when inputs_transposed is set to true/false)
   int num_columns = static_cast<int>((*in_attrs)[0][1]);
-  int num_rows = 1;
+  int num_rows    = 1;
   for (const mxnet::TShape& attr_shape : (*in_attrs)) {
     CHECK_EQ(num_columns, static_cast<int>(attr_shape[1]));
     num_rows *= attr_shape[0];
@@ -59,21 +57,17 @@ inline bool KhatriRaoShape(
   return true;
 }
 
-
 struct KhatriRaoParam : public dmlc::Parameter<KhatriRaoParam> {
   int num_args;
   bool row_wise = false;
   DMLC_DECLARE_PARAMETER(KhatriRaoParam) {
-    DMLC_DECLARE_FIELD(num_args)
-      .set_lower_bound(1)
-      .describe("Number of input matrices.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of input matrices.");
   }
 };
 DMLC_REGISTER_PARAMETER(KhatriRaoParam);
 
-
 NNVM_REGISTER_OP(khatri_rao)
-.describe(R"code(Computes the Khatri-Rao product of the input matrices.
+    .describe(R"code(Computes the Khatri-Rao product of the input matrices.
 
 Given a collection of :math:`n` input matrices,
 
@@ -106,31 +100,31 @@ Example::
    [  6. -18.]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<KhatriRaoParam>)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    uint32_t ret = dmlc::get<KhatriRaoParam>(attrs.parsed).num_args;
-    return ret;
-  })
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", KhatriRaoShape)
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int> *in_attrs,
-     std::vector<int> *out_attrs) {
-    return ElemwiseAttr<int, type_is_none, type_assign, true, type_string>(
-      attrs, in_attrs, out_attrs, -1);
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<KhatriRaoParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i)
-      ret.push_back(std::string("arg") + std::to_string(i));
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", KhatriRaoCompute<cpu>)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input matrices");
+    .set_attr_parser(ParamParser<KhatriRaoParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      uint32_t ret = dmlc::get<KhatriRaoParam>(attrs.parsed).num_args;
+      return ret;
+    })
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", KhatriRaoShape)
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_attrs, std::vector<int>* out_attrs) {
+          return ElemwiseAttr<int, type_is_none, type_assign, true, type_string>(
+              attrs, in_attrs, out_attrs, -1);
+        })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<KhatriRaoParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i)
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       return ret;
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", KhatriRaoCompute<cpu>)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input matrices");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/krprod.h b/src/operator/contrib/krprod.h
index b947410ae467..d0092ad87db3 100644
--- a/src/operator/contrib/krprod.h
+++ b/src/operator/contrib/krprod.h
@@ -32,7 +32,6 @@
 #include "../operator_common.h"
 #include "../c_lapack_api.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -51,18 +50,17 @@ using namespace mshadow::expr;
  * \param ts_arr vector of input matrices
  */
 template <typename DType>
-inline void row_wise_kronecker
-  (Tensor<cpu, 2, DType> out,
-  const std::vector<Tensor<cpu, 2, DType> > &ts_arr) {
+inline void row_wise_kronecker(Tensor<cpu, 2, DType> out,
+                               const std::vector<Tensor<cpu, 2, DType> >& ts_arr) {
   CHECK_GE(ts_arr.size(), 1) << "The input matrices must be non-empty.";
 
   // Check all input and output matrices have the same number of rows
   // and the output matrix has the right number of columns
   int nrows = static_cast<int>(out.size(0));
   int ncols = 1;
-  for (auto & ts : ts_arr) {
+  for (auto& ts : ts_arr) {
     CHECK_EQ(nrows, static_cast<int>(ts.size(0)))
-      << "All input and output matrices must have the same number of rows.";
+        << "All input and output matrices must have the same number of rows.";
     ncols *= ts.size(1);
   }
   CHECK_EQ(ncols, static_cast<int>(out.size(1)));
@@ -79,15 +77,13 @@ inline void row_wise_kronecker
 
   // Pointers to the given variable and result variable
   // We exchange what given and result point to at every step
-  Tensor<cpu, 2, DType> *given = &storage,
-    *result = &out, *tmp;
+  Tensor<cpu, 2, DType>*given = &storage, *result = &out, *tmp;
 
   // Compute each intermediate row-wise Kronecker product
   storage = 1;
-  ncols = 1;
-  for (auto & ts : ts_arr) {
-    expr::BLASEngine<cpu, DType>::SetStream
-      (result->stream_);
+  ncols   = 1;
+  for (auto& ts : ts_arr) {
+    expr::BLASEngine<cpu, DType>::SetStream(result->stream_);
 
     // Compute the current row-wise Kronecker product
     *result = 0;
@@ -108,17 +104,21 @@ inline void row_wise_kronecker
       //         assumes column-major matrix, lda has to be precisely
       //         the length of x, i.e. ts[i].size(1)
       // )
-      expr::BLASEngine<cpu, DType>::ger
-        (result->stream_,
-        ts.size(1), ncols, 1,
-        ts[i].dptr_, 1,
-        (*given)[i].dptr_, 1,
-        (*result)[i].dptr_, ts.size(1));
+      expr::BLASEngine<cpu, DType>::ger(result->stream_,
+                                        ts.size(1),
+                                        ncols,
+                                        1,
+                                        ts[i].dptr_,
+                                        1,
+                                        (*given)[i].dptr_,
+                                        1,
+                                        (*result)[i].dptr_,
+                                        ts.size(1));
     }
     ncols *= ts.size(1);
 
-    tmp = given;
-    given = result;
+    tmp    = given;
+    given  = result;
     result = tmp;
   }
 
@@ -137,18 +137,17 @@ inline void row_wise_kronecker
  * \param ts_arr vector of input matrices
  */
 template <typename DType>
-inline void khatri_rao
-  (Tensor<cpu, 2, DType> out,
-  const std::vector<Tensor<cpu, 2, DType> > &ts_arr) {
+inline void khatri_rao(Tensor<cpu, 2, DType> out,
+                       const std::vector<Tensor<cpu, 2, DType> >& ts_arr) {
   CHECK_GE(ts_arr.size(), 1) << "The input matrices must be non-empty.";
 
   // Check all input and output matrices have the same number
   // of columns and the output matrix has the right number of rows
   int ncols = static_cast<int>(out.size(1));
   int nrows = 1;
-  for (auto & ts : ts_arr) {
+  for (auto& ts : ts_arr) {
     CHECK_EQ(ncols, static_cast<int>(ts.size(1)))
-      << "All input and output matrices must have the same number of columns.";
+        << "All input and output matrices must have the same number of columns.";
     nrows *= ts.size(0);
   }
   CHECK_EQ(nrows, static_cast<int>(out.size(0)));
@@ -156,49 +155,53 @@ inline void khatri_rao
   // Change the layout of matrices to column-major
   Tensor<cpu, 2, DType> out_t(Shape2(out.size(1), out.size(0)));
   AllocSpace(&out_t);
-  flip<cpu, DType>(out.size(0), out.size(1), out_t.dptr_, out_t.stride_,
-    out.dptr_, out.stride_);
+  flip<cpu, DType>(out.size(0), out.size(1), out_t.dptr_, out_t.stride_, out.dptr_, out.stride_);
 
   std::vector<Tensor<cpu, 2, DType> > ts_t_arr;
   for (int i = 0; i < static_cast<int>(ts_arr.size()); ++i) {
     ts_t_arr.emplace_back(Shape2(ts_arr[i].size(1), ts_arr[i].size(0)));
     AllocSpace(&ts_t_arr[i]);
-    flip<cpu, DType>(ts_arr[i].size(0), ts_arr[i].size(1), ts_t_arr[i].dptr_,
-      ts_t_arr[i].stride_, ts_arr[i].dptr_, ts_arr[i].stride_);
+    flip<cpu, DType>(ts_arr[i].size(0),
+                     ts_arr[i].size(1),
+                     ts_t_arr[i].dptr_,
+                     ts_t_arr[i].stride_,
+                     ts_arr[i].dptr_,
+                     ts_arr[i].stride_);
   }
 
   // Perform row-wise Kronecker product
   row_wise_kronecker(out_t, ts_t_arr);
 
   // Change the layout of result matrix back to row-major
-  flip<cpu, DType>(out.size(1), out.size(0), out.dptr_, out.stride_,
-    out_t.dptr_, out_t.stride_);
+  flip<cpu, DType>(out.size(1), out.size(0), out.dptr_, out.stride_, out_t.dptr_, out_t.stride_);
 
   FreeSpace(&out_t);
-  for (auto &ts_t : ts_t_arr)
+  for (auto& ts_t : ts_t_arr)
     FreeSpace(&ts_t);
 }
 
 /*!
  * \brief Moore-Penrose pseudoinverse of the Khatri-Rao product
  *
- * Given input matrices A_1, ..., A_n, of shape (l_1, k), ..., (l_n, k) respectively, the pseudoinverse of the Khatri-Rao product is
+ * Given input matrices A_1, ..., A_n, of shape (l_1, k), ..., (l_n, k) respectively, the
+ * pseudoinverse of the Khatri-Rao product is
  *
  *   pinv(A_1 khatri-rao A_2 khatri-rao ... khatri-rao A_n) =
  *     ((A_1^T A_1) hadamard-dot ... hadamard-dot (A_n^T A_n))
  *     (A_1 khatri-rao ... khatri-rao A_n)^T
  *
- * As the first term of the r.h.s is a square matrix, the result is always of the same shape as the transpose of the Khatri-Rao product of the input matrices. The input argument ts_arr could contain the original input matrices, or transposed ones.
+ * As the first term of the r.h.s is a square matrix, the result is always of the same shape as the
+ * transpose of the Khatri-Rao product of the input matrices. The input argument ts_arr could
+ * contain the original input matrices, or transposed ones.
  *
  * \param out result matrix
  * \param ts_arr vector of input matrices
  * \param input_transposed if every input matrices is transposed
  */
 template <typename DType>
-inline void inv_khatri_rao
-  (Tensor<cpu, 2, DType> out,
-  const std::vector<Tensor<cpu, 2, DType> > &ts_arr,
-  bool input_transposed = false) {
+inline void inv_khatri_rao(Tensor<cpu, 2, DType> out,
+                           const std::vector<Tensor<cpu, 2, DType> >& ts_arr,
+                           bool input_transposed = false) {
   CHECK_GE(ts_arr.size(), 1) << "Input tensor array must be non-empty";
 
   // Initialise the Hadamard product to eye(k)
@@ -223,26 +226,35 @@ inline void inv_khatri_rao
   int info;
   if (input_transposed) {
     row_wise_kronecker(out, ts_arr);
-    for (auto &ts : ts_arr)
+    for (auto& ts : ts_arr)
       hadamard_prod *= implicit_dot(ts, ts.T());
 
-    info = MXNET_LAPACK_posv<DType>(MXNET_LAPACK_ROW_MAJOR, 'U',
-      k, out.size(1), hadamard_prod.dptr_, hadamard_prod.stride_,
-      out.dptr_, out.stride_);
+    info = MXNET_LAPACK_posv<DType>(MXNET_LAPACK_ROW_MAJOR,
+                                    'U',
+                                    k,
+                                    out.size(1),
+                                    hadamard_prod.dptr_,
+                                    hadamard_prod.stride_,
+                                    out.dptr_,
+                                    out.stride_);
   } else {
     Tensor<cpu, 2, DType> kr(Shape2(out.size(1), out.size(0)));
     AllocSpace(&kr);
     khatri_rao(kr, ts_arr);
 
-    for (auto &ts : ts_arr)
+    for (auto& ts : ts_arr)
       hadamard_prod *= implicit_dot(ts.T(), ts);
 
-    info = MXNET_LAPACK_posv<DType>(MXNET_LAPACK_COL_MAJOR, 'U',
-      k, out.size(1), hadamard_prod.dptr_, hadamard_prod.stride_,
-      kr.dptr_, kr.stride_);
+    info = MXNET_LAPACK_posv<DType>(MXNET_LAPACK_COL_MAJOR,
+                                    'U',
+                                    k,
+                                    out.size(1),
+                                    hadamard_prod.dptr_,
+                                    hadamard_prod.stride_,
+                                    kr.dptr_,
+                                    kr.stride_);
 
-    flip<cpu, DType>(out.size(1), out.size(0), out.dptr_, out.stride_,
-      kr.dptr_, kr.stride_);
+    flip<cpu, DType>(out.size(1), out.size(0), out.dptr_, out.stride_, kr.dptr_, kr.stride_);
     FreeSpace(&kr);
   }
 
@@ -251,37 +263,37 @@ inline void inv_khatri_rao
     LOG(FATAL) << "The linear solver in inv_prod() returns " << info;
 }
 
-
-template<typename xpu, typename DType>
-inline void KhatriRaoCompute_(const nnvm::NodeAttrs &attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &in_data,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &out_data) {
+template <typename xpu, typename DType>
+inline void KhatriRaoCompute_(const nnvm::NodeAttrs& attrs,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& in_data,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& out_data) {
   using namespace mxnet_op;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
-  Stream<xpu> *stream = ctx.get_stream<xpu>();
+  Stream<xpu>* stream       = ctx.get_stream<xpu>();
   Tensor<xpu, 2, DType> out = out_data[0].get<xpu, 2, DType>(stream);
   std::vector<Tensor<xpu, 2, DType> > ts_arr(in_data.size());
-  std::transform(in_data.begin(), in_data.end(), ts_arr.begin(),
-                 [&stream](TBlob blob) -> Tensor<xpu, 2, DType> {
-                   return blob.get<xpu, 2, DType>(stream);
-                 });
+  std::transform(
+      in_data.begin(),
+      in_data.end(),
+      ts_arr.begin(),
+      [&stream](TBlob blob) -> Tensor<xpu, 2, DType> { return blob.get<xpu, 2, DType>(stream); });
   khatri_rao(out, ts_arr);
 }
 
-
-template<typename xpu>
-inline void KhatriRaoCompute(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void KhatriRaoCompute(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   CHECK_EQ(outputs.size(), 1U);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      KhatriRaoCompute_<xpu, DType>(attrs, ctx, inputs, req, outputs);
+    KhatriRaoCompute_<xpu, DType>(attrs, ctx, inputs, req, outputs);
   });
 }
 
diff --git a/src/operator/contrib/mrcnn_mask_target-inl.h b/src/operator/contrib/mrcnn_mask_target-inl.h
index 2318691be9fe..8ee614c81307 100644
--- a/src/operator/contrib/mrcnn_mask_target-inl.h
+++ b/src/operator/contrib/mrcnn_mask_target-inl.h
@@ -24,7 +24,6 @@
  * \author Serge Panev
  */
 
-
 #ifndef MXNET_OPERATOR_CONTRIB_MRCNN_MASK_TARGET_INL_H_
 #define MXNET_OPERATOR_CONTRIB_MRCNN_MASK_TARGET_INL_H_
 
@@ -38,8 +37,8 @@ namespace mxnet {
 namespace op {
 
 namespace mrcnn_index {
-  enum ROIAlignOpInputs {kRoi, kGtMask, kMatches, kClasses};
-  enum ROIAlignOpOutputs {kMask, kMaskClasses};
+enum ROIAlignOpInputs { kRoi, kGtMask, kMatches, kClasses };
+enum ROIAlignOpOutputs { kMask, kMaskClasses };
 }  // namespace mrcnn_index
 
 struct MRCNNMaskTargetParam : public dmlc::Parameter<MRCNNMaskTargetParam> {
@@ -50,18 +49,16 @@ struct MRCNNMaskTargetParam : public dmlc::Parameter<MRCNNMaskTargetParam> {
   mxnet::TShape mask_size;
 
   DMLC_DECLARE_PARAMETER(MRCNNMaskTargetParam) {
-    DMLC_DECLARE_FIELD(num_rois)
-    .describe("Number of sampled RoIs.");
-    DMLC_DECLARE_FIELD(num_classes)
-    .describe("Number of classes.");
-    DMLC_DECLARE_FIELD(mask_size)
-    .set_expect_ndim(2).enforce_nonzero()
-    .describe("Size of the pooled masks height and width: (h, w).");
-    DMLC_DECLARE_FIELD(sample_ratio).set_default(2)
-    .describe("Sampling ratio of ROI align. Set to -1 to use adaptative size.");
-    DMLC_DECLARE_FIELD(aligned).set_default(false)
-    .describe("Center-aligned ROIAlign introduced in Detectron2. "
-    "To enable, set aligned to True.");
+    DMLC_DECLARE_FIELD(num_rois).describe("Number of sampled RoIs.");
+    DMLC_DECLARE_FIELD(num_classes).describe("Number of classes.");
+    DMLC_DECLARE_FIELD(mask_size).set_expect_ndim(2).enforce_nonzero().describe(
+        "Size of the pooled masks height and width: (h, w).");
+    DMLC_DECLARE_FIELD(sample_ratio)
+        .set_default(2)
+        .describe("Sampling ratio of ROI align. Set to -1 to use adaptative size.");
+    DMLC_DECLARE_FIELD(aligned).set_default(false).describe(
+        "Center-aligned ROIAlign introduced in Detectron2. "
+        "To enable, set aligned to True.");
   }
 };
 
@@ -78,7 +75,7 @@ inline bool MRCNNMaskTargetShape(const NodeAttrs& attrs,
   CHECK_EQ(tshape.ndim(), 3) << "rois should be a 2D tensor of shape [batch, rois, 4]";
   CHECK_EQ(tshape[2], 4) << "rois should be a 2D tensor of shape [batch, rois, 4]";
   auto batch_size = tshape[0];
-  auto num_rois = tshape[1];
+  auto num_rois   = tshape[1];
 
   // (B, M, H, W)
   tshape = in_shape->at(mrcnn_index::kGtMask);
@@ -96,8 +93,8 @@ inline bool MRCNNMaskTargetShape(const NodeAttrs& attrs,
   CHECK_EQ(tshape[0], batch_size) << " batch size should be the same for all the inputs.";
 
   // out: 2 * (B, N, C, MS, MS)
-  auto oshape = Shape5(batch_size, num_rois, param.num_classes,
-                       param.mask_size[0], param.mask_size[1]);
+  auto oshape =
+      Shape5(batch_size, num_rois, param.num_classes, param.mask_size[0], param.mask_size[1]);
   out_shape->clear();
   out_shape->push_back(oshape);
   out_shape->push_back(oshape);
@@ -117,17 +114,19 @@ inline bool MRCNNMaskTargetType(const NodeAttrs& attrs,
   return true;
 }
 
-template<typename xpu>
-void MRCNNMaskTargetRun(const MRCNNMaskTargetParam& param, const std::vector<TBlob> &inputs,
-                        const std::vector<TBlob> &outputs, mshadow::Stream<xpu> *s);
+template <typename xpu>
+void MRCNNMaskTargetRun(const MRCNNMaskTargetParam& param,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<TBlob>& outputs,
+                        mshadow::Stream<xpu>* s);
 
-template<typename xpu>
+template <typename xpu>
 void MRCNNMaskTargetCompute(const nnvm::NodeAttrs& attrs,
-                            const OpContext &ctx,
-                            const std::vector<TBlob> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<TBlob> &outputs) {
-  auto s = ctx.get_stream<xpu>();
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
+  auto s        = ctx.get_stream<xpu>();
   const auto& p = dmlc::get<MRCNNMaskTargetParam>(attrs.parsed);
   MRCNNMaskTargetRun<xpu>(p, inputs, outputs, s);
 }
diff --git a/src/operator/contrib/mrcnn_mask_target.cu b/src/operator/contrib/mrcnn_mask_target.cu
index 0db581ce8954..d3b3dccac182 100644
--- a/src/operator/contrib/mrcnn_mask_target.cu
+++ b/src/operator/contrib/mrcnn_mask_target.cu
@@ -35,24 +35,20 @@ using namespace mshadow::cuda;
 constexpr int MAXIMUM_NUM_BLOCKS = 4096;
 
 inline int CUDA_GET_BLOCKS(const int N) {
-  return std::max(
-      std::min(
-          (N + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock,
-          MAXIMUM_NUM_BLOCKS),
-      // Use at least 1 block, since CUDA does not allow empty block.
-      1);
+  return std::max(std::min((N + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock, MAXIMUM_NUM_BLOCKS),
+                  // Use at least 1 block, since CUDA does not allow empty block.
+                  1);
 }
 
 // Kernels
 
 template <typename T>
-__device__ T bilinear_interpolate(
-    const T* in_data,
-    const int height,
-    const int width,
-    T y,
-    T x,
-    const int index /* index for debug only*/) {
+__device__ T bilinear_interpolate(const T* in_data,
+                                  const int height,
+                                  const int width,
+                                  T y,
+                                  T x,
+                                  const int index /* index for debug only*/) {
   // deal with cases that inverse elements are out of feature map boundary
   if (y < -1.0 || y > height || x < -1.0 || x > width) {
     // empty
@@ -73,14 +69,14 @@ __device__ T bilinear_interpolate(
 
   if (y_low >= height - 1) {
     y_high = y_low = height - 1;
-    y = (T)y_low;
+    y              = (T)y_low;
   } else {
     y_high = y_low + 1;
   }
 
   if (x_low >= width - 1) {
     x_high = x_low = width - 1;
-    x = (T)x_low;
+    x              = (T)x_low;
   } else {
     x_high = x_low + 1;
   }
@@ -106,80 +102,73 @@ __device__ T bilinear_interpolate(
 // - We replace `channels` by `num_classes` and modify the logic consequently (e.g. offset_in_data
 //   does not use `c` anymore).
 template <typename T>
-__device__ void RoIAlignForward(
-    const T* in_data,  // (B, M, H, W)
-    const T* rois,  // (B, N, 4)
-    const T* matches,  // (B, N)
-    const int num_el,
-    const int num_classes,
-    const int height,
-    const int width,
-    const int pooled_height,
-    const int pooled_width,
-    const int sampling_ratio,
-    const int num_rois,
-    const int num_gtmasks,
-    const bool continuous_coordinate,
-    T* out_data) {  // (B, N, C, H, W)
+__device__ void RoIAlignForward(const T* in_data,  // (B, M, H, W)
+                                const T* rois,     // (B, N, 4)
+                                const T* matches,  // (B, N)
+                                const int num_el,
+                                const int num_classes,
+                                const int height,
+                                const int width,
+                                const int pooled_height,
+                                const int pooled_width,
+                                const int sampling_ratio,
+                                const int num_rois,
+                                const int num_gtmasks,
+                                const bool continuous_coordinate,
+                                T* out_data) {  // (B, N, C, H, W)
   // Update kernel
-  for (size_t index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < num_el;
+  for (size_t index = blockIdx.x * blockDim.x + threadIdx.x; index < num_el;
        index += blockDim.x * gridDim.x) {
     // (n, c, ph, pw) is an element in the pooled output
     int pw = index % pooled_width;
     int ph = (index / pooled_width) % pooled_height;
     // int c = (index / pooled_width / pooled_height) % num_classes;
-    int n = (index / pooled_width / pooled_height / num_classes) % num_rois;
+    int n         = (index / pooled_width / pooled_height / num_classes) % num_rois;
     int batch_idx = (index / pooled_width / pooled_height / num_classes / num_rois);
 
     int roi_batch_ind = matches[batch_idx * num_rois + n];
 
     const T* offset_rois = rois + batch_idx * (4 * num_rois) + n * 4;
     // Do not using rounding; this implementation detail is critical
-    T roi_offset = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
+    T roi_offset  = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
     T roi_start_w = offset_rois[0] - roi_offset;
     T roi_start_h = offset_rois[1] - roi_offset;
-    T roi_end_w = offset_rois[2] - roi_offset;
-    T roi_end_h = offset_rois[3] - roi_offset;
+    T roi_end_w   = offset_rois[2] - roi_offset;
+    T roi_end_h   = offset_rois[3] - roi_offset;
 
-    T roi_width = roi_end_w - roi_start_w;
+    T roi_width  = roi_end_w - roi_start_w;
     T roi_height = roi_end_h - roi_start_h;
 
     // Force malformed ROIs to be 1x1
     if (!continuous_coordinate) {  // backward compatiblity
       // Force malformed ROIs to be 1x1
-      roi_width = max(roi_width, (T)1.);
+      roi_width  = max(roi_width, (T)1.);
       roi_height = max(roi_height, (T)1.);
     }
     T bin_size_h = static_cast<T>(roi_height) / static_cast<T>(pooled_height);
     T bin_size_w = static_cast<T>(roi_width) / static_cast<T>(pooled_width);
 
     const T* offset_in_data =
-        in_data + batch_idx * num_gtmasks * height * width
-        + roi_batch_ind * height * width;
+        in_data + batch_idx * num_gtmasks * height * width + roi_batch_ind * height * width;
 
     // We use roi_bin_grid to sample the grid and mimic integral
-    int roi_bin_grid_h = (sampling_ratio > 0)
-        ? sampling_ratio
-        : ceil(roi_height / pooled_height);  // e.g., = 2
-    int roi_bin_grid_w =
-        (sampling_ratio > 0) ? sampling_ratio : ceil(roi_width / pooled_width);
+    int roi_bin_grid_h =
+        (sampling_ratio > 0) ? sampling_ratio : ceil(roi_height / pooled_height);  // e.g., = 2
+    int roi_bin_grid_w = (sampling_ratio > 0) ? sampling_ratio : ceil(roi_width / pooled_width);
 
     // We do average (integral) pooling inside a bin
     const T count = roi_bin_grid_h * roi_bin_grid_w;  // e.g. = 4
 
     T output_val = 0.;
     for (int iy = 0; iy < roi_bin_grid_h; iy++) {  // e.g., iy = 0, 1
-      const T y = roi_start_h + ph * bin_size_h +
-          static_cast<T>(iy + .5f) * bin_size_h /
-              static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
+      const T y =
+          roi_start_h + ph * bin_size_h +
+          static_cast<T>(iy + .5f) * bin_size_h / static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
       for (int ix = 0; ix < roi_bin_grid_w; ix++) {
         const T x = roi_start_w + pw * bin_size_w +
-            static_cast<T>(ix + .5f) * bin_size_w /
-                static_cast<T>(roi_bin_grid_w);
+                    static_cast<T>(ix + .5f) * bin_size_w / static_cast<T>(roi_bin_grid_w);
 
-        T val = bilinear_interpolate(
-            offset_in_data, height, width, y, x, index);
+        T val = bilinear_interpolate(offset_in_data, height, width, y, x, index);
         output_val += val;
       }
     }
@@ -189,12 +178,11 @@ __device__ void RoIAlignForward(
   }
 }
 
-
-template<typename DType>
-__global__ void MRCNNMaskTargetKernel(const DType *rois,
-                                      const DType *gt_masks,
-                                      const DType *matches,
-                                      const DType *cls_targets,
+template <typename DType>
+__global__ void MRCNNMaskTargetKernel(const DType* rois,
+                                      const DType* gt_masks,
+                                      const DType* matches,
+                                      const DType* cls_targets,
                                       DType* sampled_masks,
                                       DType* mask_cls,
                                       const int total_out_el,
@@ -209,30 +197,43 @@ __global__ void MRCNNMaskTargetKernel(const DType *rois,
                                       int mask_size_w,
                                       int sample_ratio) {
   // computing sampled_masks
-  RoIAlignForward(gt_masks, rois, matches, total_out_el,
-                  num_classes, gt_height, gt_width, mask_size_h, mask_size_w,
-                  sample_ratio, num_rois, num_gtmasks, aligned, sampled_masks);
+  RoIAlignForward(gt_masks,
+                  rois,
+                  matches,
+                  total_out_el,
+                  num_classes,
+                  gt_height,
+                  gt_width,
+                  mask_size_h,
+                  mask_size_w,
+                  sample_ratio,
+                  num_rois,
+                  num_gtmasks,
+                  aligned,
+                  sampled_masks);
   // computing mask_cls
   int num_masks = batch_size * num_rois * num_classes;
-  int mask_vol = mask_size_h * mask_size_w;
+  int mask_vol  = mask_size_h * mask_size_w;
   for (int mask_idx = blockIdx.x; mask_idx < num_masks; mask_idx += gridDim.x) {
-    int cls_idx = mask_idx % num_classes;
-    int roi_idx = (mask_idx / num_classes) % num_rois;
+    int cls_idx   = mask_idx % num_classes;
+    int roi_idx   = (mask_idx / num_classes) % num_rois;
     int batch_idx = (mask_idx / num_classes / num_rois);
 
     DType* mask_cls_out = mask_cls + mask_idx * mask_vol;
 
     DType cls_target = cls_targets[batch_idx * num_rois + roi_idx];
-    DType out_val = (cls_target == cls_idx);
+    DType out_val    = (cls_target == cls_idx);
     for (int mask_pixel = threadIdx.x; mask_pixel < mask_vol; mask_pixel += blockDim.x) {
       mask_cls_out[mask_pixel] = out_val;
     }
   }
 }
 
-template<>
-void MRCNNMaskTargetRun<gpu>(const MRCNNMaskTargetParam& param, const std::vector<TBlob> &inputs,
-                             const std::vector<TBlob> &outputs, mshadow::Stream<gpu> *s) {
+template <>
+void MRCNNMaskTargetRun<gpu>(const MRCNNMaskTargetParam& param,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<TBlob>& outputs,
+                             mshadow::Stream<gpu>* s) {
   const int block_dim_size = kMaxThreadsPerBlock;
   using namespace mxnet_op;
   using mshadow::Tensor;
@@ -240,30 +241,41 @@ void MRCNNMaskTargetRun<gpu>(const MRCNNMaskTargetParam& param, const std::vecto
   auto stream = mshadow::Stream<gpu>::GetStream(s);
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    auto rois = inputs[mrcnn_index::kRoi].FlatToKD<gpu, 3, DType>(s);
-    auto gt_masks = inputs[mrcnn_index::kGtMask].FlatToKD<gpu, 4, DType>(s);
-    auto matches = inputs[mrcnn_index::kMatches].FlatTo2D<gpu, DType>(s);
+    auto rois        = inputs[mrcnn_index::kRoi].FlatToKD<gpu, 3, DType>(s);
+    auto gt_masks    = inputs[mrcnn_index::kGtMask].FlatToKD<gpu, 4, DType>(s);
+    auto matches     = inputs[mrcnn_index::kMatches].FlatTo2D<gpu, DType>(s);
     auto cls_targets = inputs[mrcnn_index::kClasses].FlatTo2D<gpu, DType>(s);
 
-    auto out_masks = outputs[mrcnn_index::kMask].FlatToKD<gpu, 5, DType>(s);
+    auto out_masks    = outputs[mrcnn_index::kMask].FlatToKD<gpu, 5, DType>(s);
     auto out_mask_cls = outputs[mrcnn_index::kMaskClasses].FlatToKD<gpu, 5, DType>(s);
 
-    int batch_size = gt_masks.shape_[0];
+    int batch_size  = gt_masks.shape_[0];
     int num_gtmasks = gt_masks.shape_[1];
-    int gt_height = gt_masks.shape_[2];
-    int gt_width = gt_masks.shape_[3];
+    int gt_height   = gt_masks.shape_[2];
+    int gt_width    = gt_masks.shape_[3];
 
     int num_el = outputs[mrcnn_index::kMask].Size();
 
-    dim3 dimGrid = dim3(CUDA_GET_BLOCKS(num_el));
+    dim3 dimGrid  = dim3(CUDA_GET_BLOCKS(num_el));
     dim3 dimBlock = dim3(block_dim_size);
 
-    MRCNNMaskTargetKernel<<<dimGrid, dimBlock, 0, stream>>>
-    (rois.dptr_, gt_masks.dptr_, matches.dptr_, cls_targets.dptr_,
-    out_masks.dptr_, out_mask_cls.dptr_, num_el, param.aligned,
-    batch_size, param.num_classes, param.num_rois,
-    num_gtmasks, gt_height, gt_width,
-    param.mask_size[0], param.mask_size[1], param.sample_ratio);
+    MRCNNMaskTargetKernel<<<dimGrid, dimBlock, 0, stream>>>(rois.dptr_,
+                                                            gt_masks.dptr_,
+                                                            matches.dptr_,
+                                                            cls_targets.dptr_,
+                                                            out_masks.dptr_,
+                                                            out_mask_cls.dptr_,
+                                                            num_el,
+                                                            param.aligned,
+                                                            batch_size,
+                                                            param.num_classes,
+                                                            param.num_rois,
+                                                            num_gtmasks,
+                                                            gt_height,
+                                                            gt_width,
+                                                            param.mask_size[0],
+                                                            param.mask_size[1],
+                                                            param.sample_ratio);
     MSHADOW_CUDA_POST_KERNEL_CHECK(MRCNNMaskTargetKernel);
   });
 }
@@ -271,19 +283,20 @@ void MRCNNMaskTargetRun<gpu>(const MRCNNMaskTargetParam& param, const std::vecto
 DMLC_REGISTER_PARAMETER(MRCNNMaskTargetParam);
 
 NNVM_REGISTER_OP(_contrib_mrcnn_mask_target)
-.describe("Generate mask targets for Mask-RCNN.")
-.set_num_inputs(4)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<MRCNNMaskTargetParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MRCNNMaskTargetShape)
-.set_attr<nnvm::FInferType>("FInferType", MRCNNMaskTargetType)
-.set_attr<FCompute>("FCompute<gpu>", MRCNNMaskTargetCompute<gpu>)
-.add_argument("rois", "NDArray-or-Symbol", "Bounding box coordinates, a 3D array")
-.add_argument("gt_masks", "NDArray-or-Symbol", "Input masks of full image size, a 4D array")
-.add_argument("matches", "NDArray-or-Symbol", "Index to a gt_mask, a 2D array")
-.add_argument("cls_targets", "NDArray-or-Symbol",
-              "Value [0, num_class), excluding background class, a 2D array")
-.add_arguments(MRCNNMaskTargetParam::__FIELDS__());
+    .describe("Generate mask targets for Mask-RCNN.")
+    .set_num_inputs(4)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<MRCNNMaskTargetParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MRCNNMaskTargetShape)
+    .set_attr<nnvm::FInferType>("FInferType", MRCNNMaskTargetType)
+    .set_attr<FCompute>("FCompute<gpu>", MRCNNMaskTargetCompute<gpu>)
+    .add_argument("rois", "NDArray-or-Symbol", "Bounding box coordinates, a 3D array")
+    .add_argument("gt_masks", "NDArray-or-Symbol", "Input masks of full image size, a 4D array")
+    .add_argument("matches", "NDArray-or-Symbol", "Index to a gt_mask, a 2D array")
+    .add_argument("cls_targets",
+                  "NDArray-or-Symbol",
+                  "Value [0, num_class), excluding background class, a 2D array")
+    .add_arguments(MRCNNMaskTargetParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_lamb-inl.h b/src/operator/contrib/multi_lamb-inl.h
index 256445a476e9..8f6002a7fc4e 100644
--- a/src/operator/contrib/multi_lamb-inl.h
+++ b/src/operator/contrib/multi_lamb-inl.h
@@ -45,7 +45,7 @@ namespace mxnet {
 namespace op {
 
 namespace multilamb {
-enum MultiLambUpdateResource {kTempSpace};
+enum MultiLambUpdateResource { kTempSpace };
 }  // namespace multilamb
 
 struct MultiLAMBParam : public dmlc::Parameter<MultiLAMBParam> {
@@ -63,74 +63,64 @@ struct MultiLAMBParam : public dmlc::Parameter<MultiLAMBParam> {
   mxnet::Tuple<int> step_count;
 
   DMLC_DECLARE_PARAMETER(MultiLAMBParam) {
-    DMLC_DECLARE_FIELD(learning_rates)
-    .describe("List of learning rates");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("Exponential decay rate for the first moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("Exponential decay rate for the second moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-6f)
-    .describe("Small value to avoid division by 0.");
-    DMLC_DECLARE_FIELD(wds)
-    .describe("List of Weight decays."
-              "Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-               "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Gradient rescaling factor");
+    DMLC_DECLARE_FIELD(learning_rates).describe("List of learning rates");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "Exponential decay rate for the first moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "Exponential decay rate for the second moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-6f).describe("Small value to avoid division by 0.");
+    DMLC_DECLARE_FIELD(wds).describe(
+        "List of Weight decays."
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(rescale_grad).set_default(1.0f).describe("Gradient rescaling factor");
     DMLC_DECLARE_FIELD(lower_bound)
-    .set_default(-1.0f)
-    .describe("Lower limit of norm of weight. If lower_bound <= 0, Lower limit is not set");
+        .set_default(-1.0f)
+        .describe("Lower limit of norm of weight. If lower_bound <= 0, Lower limit is not set");
     DMLC_DECLARE_FIELD(upper_bound)
-    .set_default(-1.0f)
-    .describe("Upper limit of norm of weight. If upper_bound <= 0, Upper limit is not set");
+        .set_default(-1.0f)
+        .describe("Upper limit of norm of weight. If upper_bound <= 0, Upper limit is not set");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
     DMLC_DECLARE_FIELD(bias_correction)
-    .set_default(true)
-    .describe("Whether to use bias correction.");
-    DMLC_DECLARE_FIELD(step_count)
-    .describe("Step count for each tensor");
-    DMLC_DECLARE_FIELD(num_tensors)
-    .set_default(1)
-    .describe("Number of tensors");
+        .set_default(true)
+        .describe("Whether to use bias correction.");
+    DMLC_DECLARE_FIELD(step_count).describe("Step count for each tensor");
+    DMLC_DECLARE_FIELD(num_tensors).set_default(1).describe("Number of tensors");
   }
 };
 
-template<typename ParamType, int input_stride>
+template <typename ParamType, int input_stride>
 inline bool MultiLAMBInferShape(const nnvm::NodeAttrs& attrs,
-                                mxnet::ShapeVector *in_attrs,
-                                mxnet::ShapeVector *out_attrs) {
+                                mxnet::ShapeVector* in_attrs,
+                                mxnet::ShapeVector* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_tensors);
   CHECK_EQ(out_attrs->size(), param.num_tensors);
 
-  bool all_inferred = true;
-  auto& input_shapes = *in_attrs;
+  bool all_inferred   = true;
+  auto& input_shapes  = *in_attrs;
   auto& output_shapes = *out_attrs;
 
-  CHECK_LE(param.num_tensors, 45)
-    << "Invalid number of tensors, the maximum value is 45, and got "
-    << param.num_tensors;
+  CHECK_LE(param.num_tensors, 45) << "Invalid number of tensors, the maximum value is 45, and got "
+                                  << param.num_tensors;
   CHECK_EQ(param.learning_rates.ndim(), param.num_tensors)
-    << "Number of learning rates is inconsistent with num_tensors "
-    << "parameter passed. Expected number of learning rates: "
-    << param.num_tensors << ", and got " << param.learning_rates.ndim();
+      << "Number of learning rates is inconsistent with num_tensors "
+      << "parameter passed. Expected number of learning rates: " << param.num_tensors
+      << ", and got " << param.learning_rates.ndim();
   CHECK_EQ(param.wds.ndim(), param.num_tensors)
-    << "Number of weight decays is inconsistent with num_tensors "
-    << "parameter passed. Expected number of weight decays: "
-    << param.num_tensors << ", and got " << param.wds.ndim();
+      << "Number of weight decays is inconsistent with num_tensors "
+      << "parameter passed. Expected number of weight decays: " << param.num_tensors << ", and got "
+      << param.wds.ndim();
   CHECK_EQ(param.step_count.ndim(), param.num_tensors)
-    << "Number of step counts is inconsistent with num_tensors."
-    << "Expected number of step counts: "
-    << param.num_tensors << ", and got " << param.step_count.ndim();
+      << "Number of step counts is inconsistent with num_tensors."
+      << "Expected number of step counts: " << param.num_tensors << ", and got "
+      << param.step_count.ndim();
 
   // Weights, gradients, mean and variance
   for (int i = 0; i < param.num_tensors; ++i) {
@@ -146,14 +136,14 @@ inline bool MultiLAMBInferShape(const nnvm::NodeAttrs& attrs,
 
 template <typename ParamType, int input_stride>
 inline bool MPMultiLAMBInferType(const nnvm::NodeAttrs& attrs,
-                                 std::vector<int> *in_attrs,
-                                 std::vector<int> *out_attrs) {
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_tensors);
   CHECK_EQ(out_attrs->size(), param.num_tensors);
 
-  bool all_inferred = true;
-  auto& input_types = *in_attrs;
+  bool all_inferred  = true;
+  auto& input_types  = *in_attrs;
   auto& output_types = *out_attrs;
 
   // weights, gradients
@@ -163,8 +153,7 @@ inline bool MPMultiLAMBInferType(const nnvm::NodeAttrs& attrs,
     for (int j = 0; j < 2; ++j) {
       input_vec.push_back(input_types[i * input_stride + j]);
     }
-    all_inferred = all_inferred &&
-            ElemwiseType<2, 1>(attrs, &input_vec, &output_vec);
+    all_inferred = all_inferred && ElemwiseType<2, 1>(attrs, &input_vec, &output_vec);
   }
 
   // mean, var, weights32 (master copies of weights)
@@ -176,19 +165,19 @@ inline bool MPMultiLAMBInferType(const nnvm::NodeAttrs& attrs,
   return all_inferred;
 }
 
-template<typename T>
+template <typename T>
 class LAMBTypeIdentity {
  public:
   using type = T;
 };
 
-template<typename T>
+template <typename T>
 class LAMBSinglePrecision {
  public:
   using type = float;
 };
 
-template<typename DType, typename MPDType>
+template <typename DType, typename MPDType>
 struct MultiLAMBKernelParam {
   static const int N = 45;
   size_t ntensors;
@@ -211,76 +200,76 @@ struct MultiLAMBKernelParam {
   int nchunks;
 };
 
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         typename ParamType = MultiLAMBParam,
-         int input_stride = 5>
+template <typename xpu,
+          typename DType,
+          typename MPDType,
+          typename ParamType = MultiLAMBParam,
+          int input_stride   = 5>
 void FillMultiLAMBKernelParam(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<TBlob> &outputs,
-                              MultiLAMBKernelParam<DType, MPDType> *multi_param) {
-  const ParamType& p = nnvm::get<ParamType>(attrs.parsed);
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<TBlob>& outputs,
+                              MultiLAMBKernelParam<DType, MPDType>* multi_param) {
+  const ParamType& p       = nnvm::get<ParamType>(attrs.parsed);
   mxnet_op::Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  multi_param->ntensors = p.num_tensors;
+  multi_param->ntensors   = p.num_tensors;
   multi_param->total_size = 0;
-  multi_param->max_size = 0;
-  multi_param->nchunks = 0;
+  multi_param->max_size   = 0;
+  multi_param->nchunks    = 0;
 
   constexpr bool is_same = std::is_same<DType, MPDType>::value;
   for (size_t i = 0; i < multi_param->ntensors; ++i) {
-    const auto idx = i * input_stride;
-    multi_param->sizes[i] = inputs[idx].shape_.Size();
+    const auto idx                = i * input_stride;
+    multi_param->sizes[i]         = inputs[idx].shape_.Size();
     multi_param->tensor2temp_g[i] = multi_param->total_size;
     multi_param->total_size += multi_param->sizes[i];
     if (multi_param->max_size < multi_param->sizes[i])
       multi_param->max_size = multi_param->sizes[i];
 
     multi_param->weights[i] = inputs[idx].FlatTo2D<xpu, DType>(s).dptr_;
-    multi_param->grads[i] = inputs[idx + 1].FlatTo2D<xpu, DType>(s).dptr_;
-    multi_param->mean[i] = inputs[idx + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
-    multi_param->var[i]  = inputs[idx + 3].FlatTo2D<xpu, MPDType>(s).dptr_;
+    multi_param->grads[i]   = inputs[idx + 1].FlatTo2D<xpu, DType>(s).dptr_;
+    multi_param->mean[i]    = inputs[idx + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
+    multi_param->var[i]     = inputs[idx + 3].FlatTo2D<xpu, MPDType>(s).dptr_;
 
     // if mixed precision, then the last input in a set
     // is 32-bit master copy of the weights
     if (!is_same)
       multi_param->weights32[i] = inputs[idx + input_stride - 1].FlatTo2D<xpu, MPDType>(s).dptr_;
     multi_param->out_data[i] = outputs[i].FlatTo2D<xpu, DType>(s).dptr_;
-    multi_param->nchunks += (multi_param->sizes[i] + multi_param->chunk_size - 1)
-                            / multi_param->chunk_size;
+    multi_param->nchunks +=
+        (multi_param->sizes[i] + multi_param->chunk_size - 1) / multi_param->chunk_size;
     multi_param->learning_rates[i] = static_cast<MPDType>(p.learning_rates[i]);
-    multi_param->wds[i] = static_cast<MPDType>(p.wds[i]);
+    multi_param->wds[i]            = static_cast<MPDType>(p.wds[i]);
   }
   memcpy(multi_param->step_count, p.step_count.begin(), multi_param->ntensors * sizeof(int));
 }
 
 using namespace mxnet_op;
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<cpu>* s);
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<gpu>* s);
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<cpu>* s);
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<gpu>* s);
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 inline void MultiLAMB(const nnvm::NodeAttrs& attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
-  auto param = nnvm::get<MultiLAMBParam>(attrs.parsed);
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
+  auto param     = nnvm::get<MultiLAMBParam>(attrs.parsed);
   Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     MultiLAMBKernelParam<DType, MPDType> kernel_params;
-    FillMultiLAMBKernelParam<xpu, DType, MPDType, MultiLAMBParam, input_stride>
-            (attrs, ctx, inputs, outputs, &kernel_params);
+    FillMultiLAMBKernelParam<xpu, DType, MPDType, MultiLAMBParam, input_stride>(
+        attrs, ctx, inputs, outputs, &kernel_params);
 
     // create vector of TBlob with all the weights contiguous to compute the norm
     // if mixed precision, use fp32 copy
@@ -294,67 +283,69 @@ inline void MultiLAMB(const nnvm::NodeAttrs& attrs,
 
     // Calculate amount of temporary storage (temp_g, r1, r2, block_to_tensor, block_to_chunk)
     size_t workspace_size = kernel_params.total_size * sizeof(float) +
-        2 * kernel_params.ntensors * sizeof(float) +
-        2 * kernel_params.nchunks * sizeof(int);
+                            2 * kernel_params.ntensors * sizeof(float) +
+                            2 * kernel_params.nchunks * sizeof(int);
     // take into account the required storage required within MultiSumSqRun
     size_t required_storage_multi_sum_sq = 0;
-    required_storage_multi_sum_sq = GetRequiredStorageMultiSumSq<xpu>(inputs);
+    required_storage_multi_sum_sq        = GetRequiredStorageMultiSumSq<xpu>(inputs);
     workspace_size += required_storage_multi_sum_sq;
 
     // Request temporary storage
     Tensor<xpu, 1, char> workspace =
-    ctx.requested[multilamb::kTempSpace].get_space_typed<xpu, 1, char>(
-      Shape1(workspace_size), s);
+        ctx.requested[multilamb::kTempSpace].get_space_typed<xpu, 1, char>(Shape1(workspace_size),
+                                                                           s);
 
     // Create tensors
     size_t pos_wspace = required_storage_multi_sum_sq;
-    Tensor<xpu, 1, float> temp_g(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.total_size), s);
+    Tensor<xpu, 1, float> temp_g(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.total_size), s);
     // create vector of TBlob with all the temp_g contiguous
     std::vector<TBlob> temp_g_tblobs;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
-      Tensor<xpu, 1, float> aux(reinterpret_cast<float*>(&workspace[pos_wspace]),
-        Shape1(kernel_params.sizes[index]), s);
+      Tensor<xpu, 1, float> aux(
+          reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.sizes[index]), s);
       TBlob newtblob(aux);
       temp_g_tblobs.emplace_back(newtblob);
       pos_wspace += kernel_params.sizes[index] * sizeof(float);
     }
-    Tensor<xpu, 1, float> r1(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.ntensors), s);
+    Tensor<xpu, 1, float> r1(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.ntensors), s);
     pos_wspace += kernel_params.ntensors * sizeof(float);
-    Tensor<xpu, 1, float> r2(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.ntensors), s);
+    Tensor<xpu, 1, float> r2(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.ntensors), s);
     pos_wspace += kernel_params.ntensors * sizeof(float);
-    Tensor<xpu, 1, int> block_to_tensor(reinterpret_cast<int*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.nchunks), s);
+    Tensor<xpu, 1, int> block_to_tensor(
+        reinterpret_cast<int*>(&workspace[pos_wspace]), Shape1(kernel_params.nchunks), s);
     pos_wspace += kernel_params.nchunks * sizeof(int);
-    Tensor<xpu, 1, int> block_to_chunk(reinterpret_cast<int*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.nchunks), s);
+    Tensor<xpu, 1, int> block_to_chunk(
+        reinterpret_cast<int*>(&workspace[pos_wspace]), Shape1(kernel_params.nchunks), s);
 
     MultiSumSqRun<xpu>(weights_for_norm, kernel_params.ntensors, r1.dptr_, ctx);
-    CallKernel1<MPDType, DType>(s, kernel_params, param, temp_g.dptr_,
-                                block_to_tensor.dptr_,
-                                block_to_chunk.dptr_);
+    CallKernel1<MPDType, DType>(
+        s, kernel_params, param, temp_g.dptr_, block_to_tensor.dptr_, block_to_chunk.dptr_);
     MultiSumSqRun<xpu>(temp_g_tblobs, kernel_params.ntensors, r2.dptr_, ctx);
-    CallKernel2<MPDType, DType>(s, kernel_params, param, r1.dptr_, r2.dptr_,
+    CallKernel2<MPDType, DType>(s,
+                                kernel_params,
+                                param,
+                                r1.dptr_,
+                                r2.dptr_,
                                 temp_g.dptr_,
-                                block_to_tensor.dptr_, block_to_chunk.dptr_,
+                                block_to_tensor.dptr_,
+                                block_to_chunk.dptr_,
                                 req[0]);
   });
 }
 
-template<typename xpu, bool MP>
+template <typename xpu, bool MP>
 inline void MultiLAMBUpdate(const nnvm::NodeAttrs& attrs,
-                            const OpContext &ctx,
-                            const std::vector<TBlob> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<TBlob> &outputs) {
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
   if (!MP) {
-    MultiLAMB<xpu, LAMBTypeIdentity, 4>
-      (attrs, ctx, inputs, req, outputs);
+    MultiLAMB<xpu, LAMBTypeIdentity, 4>(attrs, ctx, inputs, req, outputs);
   } else {
-    MultiLAMB<xpu, LAMBSinglePrecision, 5>
-      (attrs, ctx, inputs, req, outputs);
+    MultiLAMB<xpu, LAMBSinglePrecision, 5>(attrs, ctx, inputs, req, outputs);
   }
 }
 
diff --git a/src/operator/contrib/multi_lamb.cc b/src/operator/contrib/multi_lamb.cc
index 710908d9c23e..79598c99b7b5 100644
--- a/src/operator/contrib/multi_lamb.cc
+++ b/src/operator/contrib/multi_lamb.cc
@@ -30,12 +30,13 @@
 namespace mxnet {
 namespace op {
 
-template<typename MPDType, bool has_mixed_precision>
+template <typename MPDType, bool has_mixed_precision>
 struct MultiLAMBKernelStep1 {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
-                                  const float beta1, const float beta2,
+                                  const float beta1,
+                                  const float beta2,
                                   const float epsilon,
                                   const float clip_gradient,
                                   const bool bias_correction,
@@ -44,41 +45,43 @@ struct MultiLAMBKernelStep1 {
     using namespace mshadow_op;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
       if ((size_t)i < kernel_params.sizes[index]) {
-        MPDType w = has_mixed_precision ? kernel_params.weights32[index][i]:
-                                          MPDType(kernel_params.weights[index][i]);
-        MPDType scaled_grad = static_cast<MPDType>(kernel_params.grads[index][i])*rescale_grad;
+        MPDType w           = has_mixed_precision ? kernel_params.weights32[index][i]
+                                                  : MPDType(kernel_params.weights[index][i]);
+        MPDType scaled_grad = static_cast<MPDType>(kernel_params.grads[index][i]) * rescale_grad;
         if (clip_gradient >= 0.0f)
-            scaled_grad = mshadow_op::clip::Map(scaled_grad, static_cast<MPDType>(clip_gradient));
+          scaled_grad = mshadow_op::clip::Map(scaled_grad, static_cast<MPDType>(clip_gradient));
         MPDType mean = static_cast<MPDType>(beta1) * kernel_params.mean[index][i] +
-          (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta1)) * scaled_grad;
-        MPDType var = static_cast<MPDType>(beta2) * kernel_params.var[index][i] +
-          (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta2)) * scaled_grad * scaled_grad;
+                       (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta1)) * scaled_grad;
+        MPDType var =
+            static_cast<MPDType>(beta2) * kernel_params.var[index][i] +
+            (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta2)) * scaled_grad * scaled_grad;
         kernel_params.mean[index][i] = mean;
-        kernel_params.var[index][i] = var;
+        kernel_params.var[index][i]  = var;
 
         MPDType g;
         if (bias_correction) {
-          MPDType mean_hat = mean / (static_cast<MPDType>(1.0f) -
-                                    power::Map(static_cast<MPDType>(beta1),
-                                    static_cast<MPDType>(kernel_params.step_count[index])));
-          MPDType var_hat = var / (static_cast<MPDType>(1.0f) -
-                                  power::Map(static_cast<MPDType>(beta2),
-                                  static_cast<MPDType>(kernel_params.step_count[index])));
+          MPDType mean_hat =
+              mean / (static_cast<MPDType>(1.0f) -
+                      power::Map(static_cast<MPDType>(beta1),
+                                 static_cast<MPDType>(kernel_params.step_count[index])));
+          MPDType var_hat =
+              var / (static_cast<MPDType>(1.0f) -
+                     power::Map(static_cast<MPDType>(beta2),
+                                static_cast<MPDType>(kernel_params.step_count[index])));
           g = mean_hat / (sqrt(var_hat) + static_cast<MPDType>(epsilon)) +
-                         kernel_params.wds[index] * w;
+              kernel_params.wds[index] * w;
         } else {
-          g = mean / (sqrt(var) + static_cast<MPDType>(epsilon)) +
-                      kernel_params.wds[index] * w;
+          g = mean / (sqrt(var) + static_cast<MPDType>(epsilon)) + kernel_params.wds[index] * w;
         }
-        temp_g[kernel_params.tensor2temp_g[index]+i] = g;
+        temp_g[kernel_params.tensor2temp_g[index] + i] = g;
       }
     }
   }
 };
 
-template<typename MPDType, bool has_mixed_precision>
+template <typename MPDType, bool has_mixed_precision>
 struct MultiLAMBKernelStep2 {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
                                   const float* sum_sq_weigths,
@@ -89,10 +92,10 @@ struct MultiLAMBKernelStep2 {
                                   const OpReqType req) {
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
       if ((size_t)i < kernel_params.sizes[index]) {
-        MPDType w = has_mixed_precision ? kernel_params.weights32[index][i]:
-                                          MPDType(kernel_params.weights[index][i]);
-        float r1 = sqrt(sum_sq_weigths[index]);
-        float r2 = sqrt(sum_sq_temp_g[index]);
+        MPDType w = has_mixed_precision ? kernel_params.weights32[index][i]
+                                        : MPDType(kernel_params.weights[index][i]);
+        float r1  = sqrt(sum_sq_weigths[index]);
+        float r2  = sqrt(sum_sq_temp_g[index]);
         if (lower_bound >= 0)
           r1 = std::max(r1, lower_bound);
         if (upper_bound >= 0)
@@ -103,10 +106,10 @@ struct MultiLAMBKernelStep2 {
         if (r1 == 0.0f || r2 == 0.0f)
           r = 1.0f;
         else
-          r = r1/r2;
+          r = r1 / r2;
 
         MPDType lr_adjusted = kernel_params.learning_rates[index] * r;
-        w -= lr_adjusted * temp_g[kernel_params.tensor2temp_g[index]+i];
+        w -= lr_adjusted * temp_g[kernel_params.tensor2temp_g[index] + i];
 
         // update weights
         if (has_mixed_precision)
@@ -117,46 +120,52 @@ struct MultiLAMBKernelStep2 {
   }
 };
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<cpu>* s,
-                  const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
-                  const MultiLAMBParam &param,
-                  float* temp_g,
-                  int* block_to_tensor,
-                  int* block_to_chunk) {
-  Kernel<MultiLAMBKernelStep1<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::
-                               Launch(s, kernel_params.max_size,
-                               kernel_params,
-                               param.beta1, param.beta2,
-                               param.epsilon,
-                               param.clip_gradient,
-                               param.bias_correction,
-                               param.rescale_grad,
-                               temp_g);
+                 const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
+                 const MultiLAMBParam& param,
+                 float* temp_g,
+                 int* block_to_tensor,
+                 int* block_to_chunk) {
+  Kernel<MultiLAMBKernelStep1<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::Launch(
+      s,
+      kernel_params.max_size,
+      kernel_params,
+      param.beta1,
+      param.beta2,
+      param.epsilon,
+      param.clip_gradient,
+      param.bias_correction,
+      param.rescale_grad,
+      temp_g);
 }
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<cpu>* s,
-                  const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
-                  const MultiLAMBParam &param,
-                  float* r1, float* r2,
-                  float* temp_g,
-                  int* block_to_tensor,
-                  int* block_to_chunk,
-                  const OpReqType req) {
-  Kernel<MultiLAMBKernelStep2<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::
-                               Launch(s, kernel_params.max_size,
-                               kernel_params,
-                               r1, r2,
-                               temp_g,
-                               param.lower_bound, param.upper_bound,
-                               req);
+                 const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
+                 const MultiLAMBParam& param,
+                 float* r1,
+                 float* r2,
+                 float* temp_g,
+                 int* block_to_tensor,
+                 int* block_to_chunk,
+                 const OpReqType req) {
+  Kernel<MultiLAMBKernelStep2<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::Launch(
+      s,
+      kernel_params.max_size,
+      kernel_params,
+      r1,
+      r2,
+      temp_g,
+      param.lower_bound,
+      param.upper_bound,
+      req);
 }
 
 DMLC_REGISTER_PARAMETER(MultiLAMBParam);
 
 std::vector<std::string> LAMBParamToVector(uint32_t num_tensors,
-                                           const char *p_names[],
+                                           const char* p_names[],
                                            size_t n_params) {
   std::vector<std::string> ret;
   for (uint32_t i = 0; i < num_tensors; ++i) {
@@ -172,80 +181,73 @@ static inline uint32_t NumTensors(const nnvm::NodeAttrs& attrs) {
 }
 
 NNVM_REGISTER_OP(_multi_lamb_update)
-.describe(R"code(Compute the LAMB coefficients of multiple weights and grads"
+    .describe(R"code(Compute the LAMB coefficients of multiple weights and grads"
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs) * 4;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs);
-  })
-.set_attr_parser(ParamParser<MultiLAMBParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiLAMBInferShape<MultiLAMBParam, 4>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *param_names[] = {"weight_", "grad_", "mean_", "var_"};
-    return LAMBParamToVector(NumTensors(attrs), param_names,
-                             sizeof(param_names)/sizeof(param_names[0]));
-  })
-// mutable: mean, var
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto i_max = NumTensors(attrs);
-    for (size_t i = 0; i < i_max; ++i) {
-      ret.push_back(i * 4 + 2);
-      ret.push_back(i * 4 + 3);
-    }
-    return ret;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiLAMBUpdate<cpu, false>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiLAMBParam::__FIELDS__());
-
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs) * 4; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs); })
+    .set_attr_parser(ParamParser<MultiLAMBParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiLAMBInferShape<MultiLAMBParam, 4>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* param_names[] = {"weight_", "grad_", "mean_", "var_"};
+          return LAMBParamToVector(
+              NumTensors(attrs), param_names, sizeof(param_names) / sizeof(param_names[0]));
+        })
+    // mutable: mean, var
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto i_max = NumTensors(attrs);
+                                     for (size_t i = 0; i < i_max; ++i) {
+                                       ret.push_back(i * 4 + 2);
+                                       ret.push_back(i * 4 + 3);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", MultiLAMBUpdate<cpu, false>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiLAMBParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_multi_mp_lamb_update)
-.describe(R"code(Compute the LAMB coefficients of multiple weights and grads with Mix Precision"
+    .describe(R"code(Compute the LAMB coefficients of multiple weights and grads with Mix Precision"
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs) * 5;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs);
-  })
-.set_attr_parser(ParamParser<MultiLAMBParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiLAMBInferShape<MultiLAMBParam, 5>)
-.set_attr<nnvm::FInferType>("FInferType", MPMultiLAMBInferType<MultiLAMBParam, 5>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *param_names[] = {"weight_", "grad_", "mean_", "var_", "weight32_"};
-    return LAMBParamToVector(NumTensors(attrs), param_names,
-                             sizeof(param_names)/sizeof(param_names[0]));
-  })
-// mutable: mean, var, weights32
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto i_max = NumTensors(attrs);
-    for (size_t i = 0; i < i_max; ++i) {
-      ret.push_back(i * 5 + 2);
-      ret.push_back(i * 5 + 3);
-      ret.push_back(i * 5 + 4);
-    }
-    return ret;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiLAMBUpdate<cpu, true>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiLAMBParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs) * 5; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs); })
+    .set_attr_parser(ParamParser<MultiLAMBParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiLAMBInferShape<MultiLAMBParam, 5>)
+    .set_attr<nnvm::FInferType>("FInferType", MPMultiLAMBInferType<MultiLAMBParam, 5>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* param_names[] = {"weight_", "grad_", "mean_", "var_", "weight32_"};
+          return LAMBParamToVector(
+              NumTensors(attrs), param_names, sizeof(param_names) / sizeof(param_names[0]));
+        })
+    // mutable: mean, var, weights32
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto i_max = NumTensors(attrs);
+                                     for (size_t i = 0; i < i_max; ++i) {
+                                       ret.push_back(i * 5 + 2);
+                                       ret.push_back(i * 5 + 3);
+                                       ret.push_back(i * 5 + 4);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", MultiLAMBUpdate<cpu, true>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiLAMBParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_lamb.cu b/src/operator/contrib/multi_lamb.cu
index 0a55b89bc501..b4795cbc60fa 100644
--- a/src/operator/contrib/multi_lamb.cu
+++ b/src/operator/contrib/multi_lamb.cu
@@ -30,12 +30,14 @@ namespace mxnet {
 namespace op {
 
 #define BLOCK_SIZE_LAMB 512
-#define ILP_LAMB 4
+#define ILP_LAMB        4
 
-template<bool has_mixed_precision, typename MPDType, typename DType>
+template <bool has_mixed_precision, typename MPDType, typename DType>
 __global__ void KernelStep1(const MultiLAMBKernelParam<DType, MPDType> kernel_params,
-                            const float beta1, const float beta2,
-                            const MPDType beta3, const MPDType beta4,
+                            const float beta1,
+                            const float beta2,
+                            const MPDType beta3,
+                            const MPDType beta4,
                             const float epsilon,
                             const float clip_gradient,
                             const bool bias_correction,
@@ -46,14 +48,14 @@ __global__ void KernelStep1(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
   const int tensor_id = block_to_tensor[blockIdx.x];
   const int chunck_id = block_to_chunk[blockIdx.x];
   const int start_pos = chunck_id * kernel_params.chunk_size + threadIdx.x;
-  const int stop_pos = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
+  const int stop_pos  = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
 
   MPDType biascorrection1, biascorrection2;
   if (bias_correction) {
-    biascorrection1 = 1.0 - static_cast<MPDType>(
-                      pow(beta1, static_cast<float>(kernel_params.step_count[tensor_id])));
-    biascorrection2 = 1.0 - static_cast<MPDType>(
-                      pow(beta2, static_cast<float>(kernel_params.step_count[tensor_id])));
+    biascorrection1 = 1.0 - static_cast<MPDType>(pow(
+                                beta1, static_cast<float>(kernel_params.step_count[tensor_id])));
+    biascorrection2 = 1.0 - static_cast<MPDType>(pow(
+                                beta2, static_cast<float>(kernel_params.step_count[tensor_id])));
   } else {
     biascorrection1 = static_cast<MPDType>(1.0);
     biascorrection2 = static_cast<MPDType>(1.0);
@@ -66,21 +68,22 @@ __global__ void KernelStep1(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
   MPDType r_g[ILP_LAMB];
 
   for (size_t i = start_pos; i < stop_pos && i < kernel_params.sizes[tensor_id];
-                                                    i+= blockDim.x*ILP_LAMB) {
+       i += blockDim.x * ILP_LAMB) {
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int load_pos = i + ii*blockDim.x;
+      int load_pos = i + ii * blockDim.x;
       if (load_pos < stop_pos && load_pos < kernel_params.sizes[tensor_id]) {
-        r_weight[ii] = has_mixed_precision ? kernel_params.weights32[tensor_id][load_pos]:
-                       static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
-        r_grad[ii] = static_cast<MPDType>(kernel_params.grads[tensor_id][load_pos]);
-        r_mean[ii] = kernel_params.mean[tensor_id][load_pos];
-        r_var[ii] = kernel_params.var[tensor_id][load_pos];
+        r_weight[ii] = has_mixed_precision
+                           ? kernel_params.weights32[tensor_id][load_pos]
+                           : static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
+        r_grad[ii]   = static_cast<MPDType>(kernel_params.grads[tensor_id][load_pos]);
+        r_mean[ii]   = kernel_params.mean[tensor_id][load_pos];
+        r_var[ii]    = kernel_params.var[tensor_id][load_pos];
       } else {
         r_weight[ii] = static_cast<MPDType>(0);
-        r_grad[ii] = static_cast<MPDType>(0);
-        r_mean[ii] = static_cast<MPDType>(0);
-        r_var[ii] = static_cast<MPDType>(0);
+        r_grad[ii]   = static_cast<MPDType>(0);
+        r_mean[ii]   = static_cast<MPDType>(0);
+        r_var[ii]    = static_cast<MPDType>(0);
       }
     }
 #pragma unroll
@@ -89,24 +92,24 @@ __global__ void KernelStep1(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
       if (clip_gradient >= 0.0f)
         r_grad[ii] = max(min(r_grad[ii], clip_gradient), -clip_gradient);
       r_mean[ii] = static_cast<MPDType>(beta1) * r_mean[ii] + beta3 * r_grad[ii];
-      r_var[ii] = static_cast<MPDType>(beta2) * r_var[ii] + beta4 * r_grad[ii] * r_grad[ii];
-      r_g[ii] = (r_mean[ii] / biascorrection1) /
+      r_var[ii]  = static_cast<MPDType>(beta2) * r_var[ii] + beta4 * r_grad[ii] * r_grad[ii];
+      r_g[ii]    = (r_mean[ii] / biascorrection1) /
                 (sqrt(r_var[ii] / biascorrection2) + static_cast<MPDType>(epsilon));
       r_g[ii] = __fmaf_rn(kernel_params.wds[tensor_id], r_weight[ii], r_g[ii]);
     }
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int store_pos = i + ii*blockDim.x;
+      int store_pos = i + ii * blockDim.x;
       if (store_pos < stop_pos && store_pos < kernel_params.sizes[tensor_id]) {
-        kernel_params.mean[tensor_id][store_pos] = r_mean[ii];
-        kernel_params.var[tensor_id][store_pos] = r_var[ii];
-        temp_g[kernel_params.tensor2temp_g[tensor_id]+store_pos] = r_g[ii];
+        kernel_params.mean[tensor_id][store_pos]                   = r_mean[ii];
+        kernel_params.var[tensor_id][store_pos]                    = r_var[ii];
+        temp_g[kernel_params.tensor2temp_g[tensor_id] + store_pos] = r_g[ii];
       }
     }
   }
 }
 
-template<bool has_mixed_precision, typename MPDType, typename DType>
+template <bool has_mixed_precision, typename MPDType, typename DType>
 __global__ void KernelStep2(const MultiLAMBKernelParam<DType, MPDType> kernel_params,
                             const float* sum_sq_weigths,
                             const float* sum_sq_temp_g,
@@ -119,7 +122,7 @@ __global__ void KernelStep2(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
   const int tensor_id = block_to_tensor[blockIdx.x];
   const int chunck_id = block_to_chunk[blockIdx.x];
   const int start_pos = chunck_id * kernel_params.chunk_size + threadIdx.x;
-  const int stop_pos = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
+  const int stop_pos  = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
 
   MPDType r1 = sqrtf(sum_sq_weigths[tensor_id]);
   MPDType r2 = sqrtf(sum_sq_temp_g[tensor_id]);
@@ -132,20 +135,21 @@ __global__ void KernelStep2(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
   if (r1 == 0.0f || r2 == 0.0f)
     lr_adjusted = kernel_params.learning_rates[tensor_id];
   else
-    lr_adjusted = kernel_params.learning_rates[tensor_id] * r1/r2;
+    lr_adjusted = kernel_params.learning_rates[tensor_id] * r1 / r2;
 
   MPDType r_weight[ILP_LAMB];
   MPDType r_g[ILP_LAMB];
 
-  for (size_t i=start_pos; i < stop_pos && i < kernel_params.sizes[tensor_id];
-                                                  i+= blockDim.x*ILP_LAMB) {
+  for (size_t i = start_pos; i < stop_pos && i < kernel_params.sizes[tensor_id];
+       i += blockDim.x * ILP_LAMB) {
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int load_pos = i + ii*blockDim.x;
+      int load_pos = i + ii * blockDim.x;
       if (load_pos < stop_pos && load_pos < kernel_params.sizes[tensor_id]) {
-        r_weight[ii] = has_mixed_precision ? kernel_params.weights32[tensor_id][load_pos]:
-                       static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
-        r_g[ii] = temp_g[kernel_params.tensor2temp_g[tensor_id]+load_pos];
+        r_weight[ii] = has_mixed_precision
+                           ? kernel_params.weights32[tensor_id][load_pos]
+                           : static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
+        r_g[ii]      = temp_g[kernel_params.tensor2temp_g[tensor_id] + load_pos];
       }
     }
 #pragma unroll
@@ -154,7 +158,7 @@ __global__ void KernelStep2(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
     }
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int store_pos = i + ii*blockDim.x;
+      int store_pos = i + ii * blockDim.x;
       if (store_pos < stop_pos && store_pos < kernel_params.sizes[tensor_id]) {
         if (has_mixed_precision)
           kernel_params.weights32[tensor_id][store_pos] = r_weight[ii];
@@ -164,98 +168,111 @@ __global__ void KernelStep2(const MultiLAMBKernelParam<DType, MPDType> kernel_pa
   }
 }
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<gpu>* s,
                  const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
-                 const MultiLAMBParam &param,
+                 const MultiLAMBParam& param,
                  float* temp_g,
                  int* block_to_tensor,
                  int* block_to_chunk) {
-  int nblocks = kernel_params.nchunks;
-  int* host_block2tensor = reinterpret_cast<int*>(malloc(kernel_params.nchunks*sizeof(int)));
-  int* host_block2chunk = reinterpret_cast<int*>(malloc(kernel_params.nchunks*sizeof(int)));
-  int chunk_id = 0;
+  int nblocks            = kernel_params.nchunks;
+  int* host_block2tensor = reinterpret_cast<int*>(malloc(kernel_params.nchunks * sizeof(int)));
+  int* host_block2chunk  = reinterpret_cast<int*>(malloc(kernel_params.nchunks * sizeof(int)));
+  int chunk_id           = 0;
   for (size_t index = 0; index < kernel_params.ntensors; ++index) {
     int current_chunk = 0;
-    for (size_t j = 0; j < kernel_params.sizes[index]; j+=kernel_params.chunk_size) {
+    for (size_t j = 0; j < kernel_params.sizes[index]; j += kernel_params.chunk_size) {
       host_block2tensor[chunk_id] = index;
-      host_block2chunk[chunk_id] = current_chunk;
+      host_block2chunk[chunk_id]  = current_chunk;
       current_chunk++;
       chunk_id++;
     }
   }
-  cudaMemcpyAsync(block_to_tensor, host_block2tensor, kernel_params.nchunks*sizeof(int),
-                  cudaMemcpyHostToDevice, Stream<gpu>::GetStream(s));
-  cudaMemcpyAsync(block_to_chunk, host_block2chunk, kernel_params.nchunks*sizeof(int),
-                  cudaMemcpyHostToDevice, Stream<gpu>::GetStream(s));
+  cudaMemcpyAsync(block_to_tensor,
+                  host_block2tensor,
+                  kernel_params.nchunks * sizeof(int),
+                  cudaMemcpyHostToDevice,
+                  Stream<gpu>::GetStream(s));
+  cudaMemcpyAsync(block_to_chunk,
+                  host_block2chunk,
+                  kernel_params.nchunks * sizeof(int),
+                  cudaMemcpyHostToDevice,
+                  Stream<gpu>::GetStream(s));
 
   bool has_mixed_precision = !std::is_same<DType, MPDType>::value;
-  MPDType beta3 = 1.0 - param.beta1;
-  MPDType beta4 = 1.0 - param.beta2;
+  MPDType beta3            = 1.0 - param.beta1;
+  MPDType beta4            = 1.0 - param.beta2;
 
   if (has_mixed_precision)
-    KernelStep1<true><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                     kernel_params,
-                     param.beta1, param.beta2,
-                     beta3, beta4,
-                     param.epsilon,
-                     param.clip_gradient,
-                     param.bias_correction,
-                     param.rescale_grad,
-                     temp_g,
-                     block_to_tensor,
-                     block_to_chunk);
+    KernelStep1<true>
+        <<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                     param.beta1,
+                                                                     param.beta2,
+                                                                     beta3,
+                                                                     beta4,
+                                                                     param.epsilon,
+                                                                     param.clip_gradient,
+                                                                     param.bias_correction,
+                                                                     param.rescale_grad,
+                                                                     temp_g,
+                                                                     block_to_tensor,
+                                                                     block_to_chunk);
   else
-    KernelStep1<false><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                      kernel_params,
-                      param.beta1, param.beta2,
-                      beta3, beta4,
-                      param.epsilon,
-                      param.clip_gradient,
-                      param.bias_correction,
-                      param.rescale_grad,
-                      temp_g,
-                      block_to_tensor,
-                      block_to_chunk);
-  }
+    KernelStep1<false>
+        <<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                     param.beta1,
+                                                                     param.beta2,
+                                                                     beta3,
+                                                                     beta4,
+                                                                     param.epsilon,
+                                                                     param.clip_gradient,
+                                                                     param.bias_correction,
+                                                                     param.rescale_grad,
+                                                                     temp_g,
+                                                                     block_to_tensor,
+                                                                     block_to_chunk);
+}
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<gpu>* s,
                  const MultiLAMBKernelParam<DType, MPDType>& kernel_params,
-                 const MultiLAMBParam &param,
-                 float* r1, float* r2,
+                 const MultiLAMBParam& param,
+                 float* r1,
+                 float* r2,
                  float* temp_g,
                  int* block_to_tensor,
                  int* block_to_chunk,
                  const OpReqType req) {
-  size_t nblocks = kernel_params.nchunks;
+  size_t nblocks           = kernel_params.nchunks;
   bool has_mixed_precision = !std::is_same<DType, MPDType>::value;
   if (has_mixed_precision)
-    KernelStep2<true><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                     kernel_params,
-                     r1, r2,
-                     temp_g,
-                     param.lower_bound, param.upper_bound,
-                     block_to_tensor,
-                     block_to_chunk,
-                     req);
+    KernelStep2<true><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                                  r1,
+                                                                                  r2,
+                                                                                  temp_g,
+                                                                                  param.lower_bound,
+                                                                                  param.upper_bound,
+                                                                                  block_to_tensor,
+                                                                                  block_to_chunk,
+                                                                                  req);
   else
-    KernelStep2<false><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                      kernel_params,
-                      r1, r2,
-                      temp_g,
-                      param.lower_bound, param.upper_bound,
-                      block_to_tensor,
-                      block_to_chunk,
-                      req);
+    KernelStep2<false>
+        <<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                     r1,
+                                                                     r2,
+                                                                     temp_g,
+                                                                     param.lower_bound,
+                                                                     param.upper_bound,
+                                                                     block_to_tensor,
+                                                                     block_to_chunk,
+                                                                     req);
 }
 
-
 NNVM_REGISTER_OP(_multi_lamb_update)
-.set_attr<FCompute>("FCompute<gpu>",  MultiLAMBUpdate<gpu, false>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiLAMBUpdate<gpu, false>);
 
 NNVM_REGISTER_OP(_multi_mp_lamb_update)
-.set_attr<FCompute>("FCompute<gpu>",  MultiLAMBUpdate<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiLAMBUpdate<gpu, true>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_lans-inl.h b/src/operator/contrib/multi_lans-inl.h
index 958b6bd9f25e..979c1f71b221 100644
--- a/src/operator/contrib/multi_lans-inl.h
+++ b/src/operator/contrib/multi_lans-inl.h
@@ -45,7 +45,7 @@ namespace mxnet {
 namespace op {
 
 namespace multilans {
-enum MultiLANSUpdateResource {kTempSpace};
+enum MultiLANSUpdateResource { kTempSpace };
 }  // namespace multilans
 
 struct MultiLANSParam : public dmlc::Parameter<MultiLANSParam> {
@@ -62,71 +62,61 @@ struct MultiLANSParam : public dmlc::Parameter<MultiLANSParam> {
   mxnet::Tuple<int> step_count;
 
   DMLC_DECLARE_PARAMETER(MultiLANSParam) {
-    DMLC_DECLARE_FIELD(learning_rates)
-    .describe("List of learning rates");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("Exponential decay rate for the first moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("Exponential decay rate for the second moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-6f)
-    .describe("Small value to avoid division by 0.");
-    DMLC_DECLARE_FIELD(wds)
-    .describe("List of Weight decays."
-              "Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-               "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Gradient rescaling factor");
+    DMLC_DECLARE_FIELD(learning_rates).describe("List of learning rates");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "Exponential decay rate for the first moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "Exponential decay rate for the second moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-6f).describe("Small value to avoid division by 0.");
+    DMLC_DECLARE_FIELD(wds).describe(
+        "List of Weight decays."
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(rescale_grad).set_default(1.0f).describe("Gradient rescaling factor");
     DMLC_DECLARE_FIELD(lower_bound)
-    .set_default(-1.0f)
-    .describe("Lower limit of norm of weight. If lower_bound <= 0, Lower limit is not set");
+        .set_default(-1.0f)
+        .describe("Lower limit of norm of weight. If lower_bound <= 0, Lower limit is not set");
     DMLC_DECLARE_FIELD(upper_bound)
-    .set_default(-1.0f)
-    .describe("Upper limit of norm of weight. If upper_bound <= 0, Upper limit is not set");
+        .set_default(-1.0f)
+        .describe("Upper limit of norm of weight. If upper_bound <= 0, Upper limit is not set");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(step_count)
-    .describe("Step count for each tensor");
-    DMLC_DECLARE_FIELD(num_tensors)
-    .set_default(1)
-    .describe("Number of tensors");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(step_count).describe("Step count for each tensor");
+    DMLC_DECLARE_FIELD(num_tensors).set_default(1).describe("Number of tensors");
   }
 };
 
-template<typename ParamType, int input_stride>
+template <typename ParamType, int input_stride>
 inline bool MultiLANSInferShape(const nnvm::NodeAttrs& attrs,
-                                   mxnet::ShapeVector *in_attrs,
-                                   mxnet::ShapeVector *out_attrs) {
+                                mxnet::ShapeVector* in_attrs,
+                                mxnet::ShapeVector* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_tensors);
   CHECK_EQ(out_attrs->size(), param.num_tensors);
 
-  bool all_inferred = true;
-  auto& input_shapes = *in_attrs;
+  bool all_inferred   = true;
+  auto& input_shapes  = *in_attrs;
   auto& output_shapes = *out_attrs;
 
-  CHECK_LE(param.num_tensors, 45)
-    << "Invalid number of tensors, the maximum value is 45, and got "
-    << param.num_tensors;
+  CHECK_LE(param.num_tensors, 45) << "Invalid number of tensors, the maximum value is 45, and got "
+                                  << param.num_tensors;
   CHECK_EQ(param.learning_rates.ndim(), param.num_tensors)
-    << "Number of learning rates is inconsistent with num_tensors "
-    << "parameter passed. Expected number of learning rates: "
-    << param.num_tensors << ", and got " << param.learning_rates.ndim();
+      << "Number of learning rates is inconsistent with num_tensors "
+      << "parameter passed. Expected number of learning rates: " << param.num_tensors
+      << ", and got " << param.learning_rates.ndim();
   CHECK_EQ(param.wds.ndim(), param.num_tensors)
-    << "Number of weight decays is inconsistent with num_tensors "
-    << "parameter passed. Expected number of weight decays: "
-    << param.num_tensors << ", and got " << param.wds.ndim();
+      << "Number of weight decays is inconsistent with num_tensors "
+      << "parameter passed. Expected number of weight decays: " << param.num_tensors << ", and got "
+      << param.wds.ndim();
   CHECK_EQ(param.step_count.ndim(), param.num_tensors)
-    << "Number of step counts is inconsistent with num_tensors."
-    << "Expected number of step counts: "
-    << param.num_tensors << ", and got " << param.step_count.ndim();
+      << "Number of step counts is inconsistent with num_tensors."
+      << "Expected number of step counts: " << param.num_tensors << ", and got "
+      << param.step_count.ndim();
 
   // Weights, gradients, mean and variance
   for (int i = 0; i < param.num_tensors; ++i) {
@@ -142,14 +132,14 @@ inline bool MultiLANSInferShape(const nnvm::NodeAttrs& attrs,
 
 template <typename ParamType, int input_stride>
 inline bool MPMultiLANSInferType(const nnvm::NodeAttrs& attrs,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_tensors);
   CHECK_EQ(out_attrs->size(), param.num_tensors);
 
-  bool all_inferred = true;
-  auto& input_types = *in_attrs;
+  bool all_inferred  = true;
+  auto& input_types  = *in_attrs;
   auto& output_types = *out_attrs;
 
   // weights, gradients
@@ -159,8 +149,7 @@ inline bool MPMultiLANSInferType(const nnvm::NodeAttrs& attrs,
     for (int j = 0; j < 2; ++j) {
       input_vec.push_back(input_types[i * input_stride + j]);
     }
-    all_inferred = all_inferred &&
-            ElemwiseType<2, 1>(attrs, &input_vec, &output_vec);
+    all_inferred = all_inferred && ElemwiseType<2, 1>(attrs, &input_vec, &output_vec);
   }
 
   // mean, var, weights32 (master copies of weights)
@@ -172,19 +161,19 @@ inline bool MPMultiLANSInferType(const nnvm::NodeAttrs& attrs,
   return all_inferred;
 }
 
-template<typename T>
+template <typename T>
 class LANSTypeIdentity {
  public:
   using type = T;
 };
 
-template<typename T>
+template <typename T>
 class LANSSinglePrecision {
  public:
   using type = float;
 };
 
-template<typename DType, typename MPDType>
+template <typename DType, typename MPDType>
 struct MultiLANSKernelParam {
   static const int N = 45;
   size_t ntensors;
@@ -207,149 +196,151 @@ struct MultiLANSKernelParam {
   int nchunks;
 };
 
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         typename ParamType = MultiLANSParam,
-         int input_stride = 5>
+template <typename xpu,
+          typename DType,
+          typename MPDType,
+          typename ParamType = MultiLANSParam,
+          int input_stride   = 5>
 void FillMultiLANSKernelParam(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<TBlob> &outputs,
-                              MultiLANSKernelParam<DType, MPDType> *multi_param) {
-  const ParamType& p = nnvm::get<ParamType>(attrs.parsed);
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<TBlob>& outputs,
+                              MultiLANSKernelParam<DType, MPDType>* multi_param) {
+  const ParamType& p       = nnvm::get<ParamType>(attrs.parsed);
   mxnet_op::Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  multi_param->ntensors = p.num_tensors;
+  multi_param->ntensors   = p.num_tensors;
   multi_param->total_size = 0;
-  multi_param->max_size = 0;
-  multi_param->nchunks = 0;
+  multi_param->max_size   = 0;
+  multi_param->nchunks    = 0;
 
   constexpr bool is_same = std::is_same<DType, MPDType>::value;
   for (size_t i = 0; i < multi_param->ntensors; ++i) {
-    const auto idx = i * input_stride;
-    multi_param->sizes[i] = inputs[idx].shape_.Size();
+    const auto idx                = i * input_stride;
+    multi_param->sizes[i]         = inputs[idx].shape_.Size();
     multi_param->tensor2temp_g[i] = multi_param->total_size;
     multi_param->total_size += multi_param->sizes[i];
     if (multi_param->max_size < multi_param->sizes[i])
       multi_param->max_size = multi_param->sizes[i];
 
     multi_param->weights[i] = inputs[idx].FlatTo2D<xpu, DType>(s).dptr_;
-    multi_param->grads[i] = inputs[idx + 1].FlatTo2D<xpu, DType>(s).dptr_;
-    multi_param->mean[i] = inputs[idx + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
-    multi_param->var[i]  = inputs[idx + 3].FlatTo2D<xpu, MPDType>(s).dptr_;
+    multi_param->grads[i]   = inputs[idx + 1].FlatTo2D<xpu, DType>(s).dptr_;
+    multi_param->mean[i]    = inputs[idx + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
+    multi_param->var[i]     = inputs[idx + 3].FlatTo2D<xpu, MPDType>(s).dptr_;
 
     // if mixed precision, then the last input in a set
     // is 32-bit master copy of the weights
     if (!is_same)
       multi_param->weights32[i] = inputs[idx + input_stride - 1].FlatTo2D<xpu, MPDType>(s).dptr_;
     multi_param->out_data[i] = outputs[i].FlatTo2D<xpu, DType>(s).dptr_;
-    multi_param->nchunks += (multi_param->sizes[i] + multi_param->chunk_size - 1)
-                            / multi_param->chunk_size;
+    multi_param->nchunks +=
+        (multi_param->sizes[i] + multi_param->chunk_size - 1) / multi_param->chunk_size;
     multi_param->learning_rates[i] = static_cast<MPDType>(p.learning_rates[i]);
-    multi_param->wds[i] = static_cast<MPDType>(p.wds[i]);
+    multi_param->wds[i]            = static_cast<MPDType>(p.wds[i]);
   }
   memcpy(multi_param->step_count, p.step_count.begin(), multi_param->ntensors * sizeof(int));
 }
 
 using namespace mxnet_op;
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<cpu>* s);
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<gpu>* s);
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<cpu>* s);
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<gpu>* s);
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 inline void MultiLANS(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
-  auto param = nnvm::get<MultiLANSParam>(attrs.parsed);
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
+  auto param     = nnvm::get<MultiLANSParam>(attrs.parsed);
   Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     MultiLANSKernelParam<DType, MPDType> kernel_params;
-    FillMultiLANSKernelParam<xpu, DType, MPDType, MultiLANSParam, input_stride>
-            (attrs, ctx, inputs, outputs, &kernel_params);
+    FillMultiLANSKernelParam<xpu, DType, MPDType, MultiLANSParam, input_stride>(
+        attrs, ctx, inputs, outputs, &kernel_params);
 
     // create vector of TBlob with all the weights contiguous
     std::vector<TBlob> weights;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
-        weights.emplace_back(inputs[index*input_stride]);
+      weights.emplace_back(inputs[index * input_stride]);
     }
 
     // create vector of TBlob with all the weights contiguous
     std::vector<TBlob> grads;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
-        grads.emplace_back(inputs[index*input_stride+1]);
+      grads.emplace_back(inputs[index * input_stride + 1]);
     }
 
     // Calculate amount of temporary storage (temp_m, temp_g, r1, r2_m, r2_g, g_sq_norm,
     // block_to_tensor, block_to_chunk)
     size_t workspace_size = 2 * kernel_params.total_size * sizeof(float) +
-    4 * kernel_params.ntensors * sizeof(float) +
-    2 * kernel_params.nchunks * sizeof(int);
+                            4 * kernel_params.ntensors * sizeof(float) +
+                            2 * kernel_params.nchunks * sizeof(int);
 
     // take into account the required storage required within MultiSumSqRun
     size_t required_storage_multi_sum_sq = 0;
-    required_storage_multi_sum_sq = GetRequiredStorageMultiSumSq<xpu>(inputs);
+    required_storage_multi_sum_sq        = GetRequiredStorageMultiSumSq<xpu>(inputs);
     workspace_size += required_storage_multi_sum_sq;
 
     // Request temporary storage
     Tensor<xpu, 1, char> workspace =
-    ctx.requested[multilans::kTempSpace].get_space_typed<xpu, 1, char>(
-      Shape1(workspace_size), s);
+        ctx.requested[multilans::kTempSpace].get_space_typed<xpu, 1, char>(Shape1(workspace_size),
+                                                                           s);
 
     // Create tensors
     size_t pos_wspace = required_storage_multi_sum_sq;
-    Tensor<xpu, 1, float> temp_m(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.total_size), s);
+    Tensor<xpu, 1, float> temp_m(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.total_size), s);
     // create vector of TBlob with all the temp_m and temp_g contiguous
     std::vector<TBlob> temp_m_tblobs;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
-      Tensor<xpu, 1, float> aux(reinterpret_cast<float*>(&workspace[pos_wspace]),
-        Shape1(kernel_params.sizes[index]), s);
+      Tensor<xpu, 1, float> aux(
+          reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.sizes[index]), s);
       TBlob newtblob(aux);
       temp_m_tblobs.emplace_back(newtblob);
       pos_wspace += kernel_params.sizes[index] * sizeof(float);
     }
-    Tensor<xpu, 1, float> temp_g(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.total_size), s);
+    Tensor<xpu, 1, float> temp_g(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.total_size), s);
     std::vector<TBlob> temp_g_tblobs;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
-      Tensor<xpu, 1, float> aux(reinterpret_cast<float*>(&workspace[pos_wspace]),
-        Shape1(kernel_params.sizes[index]), s);
+      Tensor<xpu, 1, float> aux(
+          reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.sizes[index]), s);
       TBlob newtblob(aux);
       temp_g_tblobs.emplace_back(newtblob);
       pos_wspace += kernel_params.sizes[index] * sizeof(float);
     }
-    Tensor<xpu, 1, float> r1(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.ntensors), s);
+    Tensor<xpu, 1, float> r1(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.ntensors), s);
     pos_wspace += kernel_params.ntensors * sizeof(float);
-    Tensor<xpu, 1, float> r2_m(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.ntensors), s);
+    Tensor<xpu, 1, float> r2_m(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.ntensors), s);
     pos_wspace += kernel_params.ntensors * sizeof(float);
-    Tensor<xpu, 1, float> r2_g(reinterpret_cast<float*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.ntensors), s);
+    Tensor<xpu, 1, float> r2_g(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.ntensors), s);
     pos_wspace += kernel_params.ntensors * sizeof(float);
-    Tensor<xpu, 1, float> g_sq_norm(reinterpret_cast<float*>(&workspace[pos_wspace]),
-         Shape1(kernel_params.ntensors), s);
+    Tensor<xpu, 1, float> g_sq_norm(
+        reinterpret_cast<float*>(&workspace[pos_wspace]), Shape1(kernel_params.ntensors), s);
     pos_wspace += kernel_params.ntensors * sizeof(float);
-    Tensor<xpu, 1, int> block_to_tensor(reinterpret_cast<int*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.nchunks), s);
+    Tensor<xpu, 1, int> block_to_tensor(
+        reinterpret_cast<int*>(&workspace[pos_wspace]), Shape1(kernel_params.nchunks), s);
     pos_wspace += kernel_params.nchunks * sizeof(int);
-    Tensor<xpu, 1, int> block_to_chunk(reinterpret_cast<int*>(&workspace[pos_wspace]),
-      Shape1(kernel_params.nchunks), s);
+    Tensor<xpu, 1, int> block_to_chunk(
+        reinterpret_cast<int*>(&workspace[pos_wspace]), Shape1(kernel_params.nchunks), s);
 
     MultiSumSqRun<xpu>(weights, kernel_params.ntensors, r1.dptr_, ctx);
     MultiSumSqRun<xpu>(grads, kernel_params.ntensors, g_sq_norm.dptr_, ctx, param.rescale_grad);
-    CallKernel1<MPDType, DType>(s, kernel_params, param,
+    CallKernel1<MPDType, DType>(s,
+                                kernel_params,
+                                param,
                                 g_sq_norm.dptr_,
                                 temp_m.dptr_,
                                 temp_g.dptr_,
@@ -357,26 +348,30 @@ inline void MultiLANS(const nnvm::NodeAttrs& attrs,
                                 block_to_chunk.dptr_);
     MultiSumSqRun<xpu>(temp_m_tblobs, kernel_params.ntensors, r2_m.dptr_, ctx);
     MultiSumSqRun<xpu>(temp_g_tblobs, kernel_params.ntensors, r2_g.dptr_, ctx);
-    CallKernel2<MPDType, DType>(s, kernel_params, param, r1.dptr_,
-                                r2_m.dptr_, r2_g.dptr_,
-                                temp_m.dptr_, temp_g.dptr_,
-                                block_to_tensor.dptr_, block_to_chunk.dptr_,
+    CallKernel2<MPDType, DType>(s,
+                                kernel_params,
+                                param,
+                                r1.dptr_,
+                                r2_m.dptr_,
+                                r2_g.dptr_,
+                                temp_m.dptr_,
+                                temp_g.dptr_,
+                                block_to_tensor.dptr_,
+                                block_to_chunk.dptr_,
                                 req[0]);
   });
 }
 
-template<typename xpu, bool MP>
+template <typename xpu, bool MP>
 inline void MultiLANSUpdate(const nnvm::NodeAttrs& attrs,
-                               const OpContext &ctx,
-                               const std::vector<TBlob> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<TBlob> &outputs) {
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
   if (!MP) {
-    MultiLANS<xpu, LANSTypeIdentity, 4>
-      (attrs, ctx, inputs, req, outputs);
+    MultiLANS<xpu, LANSTypeIdentity, 4>(attrs, ctx, inputs, req, outputs);
   } else {
-    MultiLANS<xpu, LANSSinglePrecision, 5>
-      (attrs, ctx, inputs, req, outputs);
+    MultiLANS<xpu, LANSSinglePrecision, 5>(attrs, ctx, inputs, req, outputs);
   }
 }
 
diff --git a/src/operator/contrib/multi_lans.cc b/src/operator/contrib/multi_lans.cc
index 8cb90806af03..00a695c496f7 100644
--- a/src/operator/contrib/multi_lans.cc
+++ b/src/operator/contrib/multi_lans.cc
@@ -30,55 +30,59 @@
 namespace mxnet {
 namespace op {
 
-template<typename MPDType, bool has_mixed_precision>
+template <typename MPDType, bool has_mixed_precision>
 struct MultiLANSKernelStep1 {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   const MultiLANSKernelParam<DType, MPDType>& kernel_params,
-                                  const float beta1, const float beta2,
+                                  const float beta1,
+                                  const float beta2,
                                   const float epsilon,
                                   const float clip_gradient,
                                   const float rescale_grad,
                                   float* g_sq_norm,
-                                  float* temp_m, float* temp_g) {
+                                  float* temp_m,
+                                  float* temp_g) {
     using namespace mshadow_op;
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
       if ((size_t)i < kernel_params.sizes[index]) {
-        MPDType w = has_mixed_precision ? kernel_params.weights32[index][i]:
-                                          MPDType(kernel_params.weights[index][i]);
-        float g_norm = sqrt(g_sq_norm[index]);
+        MPDType w           = has_mixed_precision ? kernel_params.weights32[index][i]
+                                                  : MPDType(kernel_params.weights[index][i]);
+        float g_norm        = sqrt(g_sq_norm[index]);
         MPDType scaled_grad = static_cast<MPDType>(kernel_params.grads[index][i]) * rescale_grad;
         scaled_grad /= g_norm;
         if (clip_gradient >= 0.0f)
-            scaled_grad = mshadow_op::clip::Map(scaled_grad, static_cast<MPDType>(clip_gradient));
+          scaled_grad = mshadow_op::clip::Map(scaled_grad, static_cast<MPDType>(clip_gradient));
         MPDType mean = static_cast<MPDType>(beta1) * kernel_params.mean[index][i] +
-          (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta1)) * scaled_grad;
-        MPDType var = static_cast<MPDType>(beta2) * kernel_params.var[index][i] +
-          (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta2)) * scaled_grad * scaled_grad;
+                       (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta1)) * scaled_grad;
+        MPDType var =
+            static_cast<MPDType>(beta2) * kernel_params.var[index][i] +
+            (static_cast<MPDType>(1.0f) - static_cast<MPDType>(beta2)) * scaled_grad * scaled_grad;
         kernel_params.mean[index][i] = mean;
-        kernel_params.var[index][i] = var;
+        kernel_params.var[index][i]  = var;
 
         MPDType m, g;
-        MPDType mean_hat = mean / (static_cast<MPDType>(1.0f) -
-                                  power::Map(static_cast<MPDType>(beta1),
-                                    static_cast<MPDType>(kernel_params.step_count[index])));
-        MPDType var_hat = var / (static_cast<MPDType>(1.0f) -
-                                power::Map(static_cast<MPDType>(beta2),
-                                static_cast<MPDType>(kernel_params.step_count[index])));
-        var_hat = sqrt(var_hat) + static_cast<MPDType>(epsilon);
+        MPDType mean_hat =
+            mean / (static_cast<MPDType>(1.0f) -
+                    power::Map(static_cast<MPDType>(beta1),
+                               static_cast<MPDType>(kernel_params.step_count[index])));
+        MPDType var_hat  = var / (static_cast<MPDType>(1.0f) -
+                                 power::Map(static_cast<MPDType>(beta2),
+                                            static_cast<MPDType>(kernel_params.step_count[index])));
+        var_hat          = sqrt(var_hat) + static_cast<MPDType>(epsilon);
         MPDType scaled_w = kernel_params.wds[index] * w;
-        m = mean_hat / var_hat + scaled_w;
-        g = scaled_grad / var_hat + scaled_w;
-        temp_m[kernel_params.tensor2temp_g[index]+i] = m;
-        temp_g[kernel_params.tensor2temp_g[index]+i] = g;
+        m                = mean_hat / var_hat + scaled_w;
+        g                = scaled_grad / var_hat + scaled_w;
+        temp_m[kernel_params.tensor2temp_g[index] + i] = m;
+        temp_g[kernel_params.tensor2temp_g[index] + i] = g;
       }
     }
   }
 };
 
-template<typename MPDType, bool has_mixed_precision>
+template <typename MPDType, bool has_mixed_precision>
 struct MultiLANSKernelStep2 {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   const MultiLANSKernelParam<DType, MPDType>& kernel_params,
                                   const float beta1,
@@ -92,9 +96,9 @@ struct MultiLANSKernelStep2 {
                                   const OpReqType req) {
     for (size_t index = 0; index < kernel_params.ntensors; ++index) {
       if ((size_t)i < kernel_params.sizes[index]) {
-        MPDType w = has_mixed_precision ? kernel_params.weights32[index][i]:
-                                          MPDType(kernel_params.weights[index][i]);
-        float r1 = sqrt(sum_sq_weigths[index]);
+        MPDType w  = has_mixed_precision ? kernel_params.weights32[index][i]
+                                         : MPDType(kernel_params.weights[index][i]);
+        float r1   = sqrt(sum_sq_weigths[index]);
         float r2_m = sqrt(sum_sq_temp_m[index]);
         float r2_g = sqrt(sum_sq_temp_g[index]);
         if (lower_bound >= 0)
@@ -107,18 +111,18 @@ struct MultiLANSKernelStep2 {
         if (r1 == 0.0f || r2_m == 0.0f)
           r_m = 1.0f;
         else
-          r_m = r1/r2_m;
+          r_m = r1 / r2_m;
         if (r1 == 0.0f || r2_g == 0.0f)
           r_g = 1.0f;
         else
-          r_g = r1/r2_g;
+          r_g = r1 / r2_g;
         r_m *= static_cast<MPDType>(beta1);
         r_g *= (1. - static_cast<MPDType>(beta1));
 
         MPDType lr_adjusted_m = kernel_params.learning_rates[index] * r_m;
         MPDType lr_adjusted_g = kernel_params.learning_rates[index] * r_g;
-        w -= lr_adjusted_m * temp_m[kernel_params.tensor2temp_g[index]+i]
-             + lr_adjusted_g * temp_g[kernel_params.tensor2temp_g[index]+i];
+        w -= lr_adjusted_m * temp_m[kernel_params.tensor2temp_g[index] + i] +
+             lr_adjusted_g * temp_g[kernel_params.tensor2temp_g[index] + i];
 
         // update weights
         if (has_mixed_precision)
@@ -129,50 +133,60 @@ struct MultiLANSKernelStep2 {
   }
 };
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<cpu>* s,
-                  const MultiLANSKernelParam<DType, MPDType>& kernel_params,
-                  const MultiLANSParam &param,
-                  float* g_sq_norm,
-                  float* temp_m,
-                  float* temp_g,
-                  int* block_to_tensor,
-                  int* block_to_chunk) {
-  Kernel<MultiLANSKernelStep1<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::
-                                  Launch(s, kernel_params.max_size,
-                                  kernel_params,
-                                  param.beta1, param.beta2,
-                                  param.epsilon,
-                                  param.clip_gradient,
-                                  param.rescale_grad,
-                                  g_sq_norm,
-                                  temp_m,
-                                  temp_g);
+                 const MultiLANSKernelParam<DType, MPDType>& kernel_params,
+                 const MultiLANSParam& param,
+                 float* g_sq_norm,
+                 float* temp_m,
+                 float* temp_g,
+                 int* block_to_tensor,
+                 int* block_to_chunk) {
+  Kernel<MultiLANSKernelStep1<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::Launch(
+      s,
+      kernel_params.max_size,
+      kernel_params,
+      param.beta1,
+      param.beta2,
+      param.epsilon,
+      param.clip_gradient,
+      param.rescale_grad,
+      g_sq_norm,
+      temp_m,
+      temp_g);
 }
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<cpu>* s,
-                  const MultiLANSKernelParam<DType, MPDType>& kernel_params,
-                  const MultiLANSParam &param,
-                  float* r1, float* r2_m, float* r2_g,
-                  float* temp_m, float* temp_g,
-                  int* block_to_tensor,
-                  int* block_to_chunk,
-                  const OpReqType req) {
-  Kernel<MultiLANSKernelStep2<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::
-                                  Launch(s, kernel_params.max_size,
-                                  kernel_params,
-                                  param.beta1,
-                                  r1, r2_m, r2_g,
-                                  temp_m, temp_g,
-                                  param.lower_bound, param.upper_bound,
-                                  req);
+                 const MultiLANSKernelParam<DType, MPDType>& kernel_params,
+                 const MultiLANSParam& param,
+                 float* r1,
+                 float* r2_m,
+                 float* r2_g,
+                 float* temp_m,
+                 float* temp_g,
+                 int* block_to_tensor,
+                 int* block_to_chunk,
+                 const OpReqType req) {
+  Kernel<MultiLANSKernelStep2<MPDType, !std::is_same<DType, MPDType>::value>, cpu>::Launch(
+      s,
+      kernel_params.max_size,
+      kernel_params,
+      param.beta1,
+      r1,
+      r2_m,
+      r2_g,
+      temp_m,
+      temp_g,
+      param.lower_bound,
+      param.upper_bound,
+      req);
 }
 
 DMLC_REGISTER_PARAMETER(MultiLANSParam);
 
 std::vector<std::string> LANSParamToVector(uint32_t num_tensors,
-                                           const char *p_names[],
+                                           const char* p_names[],
                                            size_t n_params) {
   std::vector<std::string> ret;
   for (uint32_t i = 0; i < num_tensors; ++i) {
@@ -188,80 +202,74 @@ static inline uint32_t NumTensors(const nnvm::NodeAttrs& attrs) {
 }
 
 NNVM_REGISTER_OP(_multi_lans_update)
-.describe(R"code(Compute the LANS coefficients of multiple weights and grads"
+    .describe(R"code(Compute the LANS coefficients of multiple weights and grads"
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs) * 4;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs);
-  })
-.set_attr_parser(ParamParser<MultiLANSParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiLANSInferShape<MultiLANSParam, 4>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *param_names[] = {"weight_", "grad_", "mean_", "var_"};
-    return LANSParamToVector(NumTensors(attrs), param_names,
-                             sizeof(param_names)/sizeof(param_names[0]));
-  })
-// mutable: mean, var
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto i_max = NumTensors(attrs);
-    for (size_t i = 0; i < i_max; ++i) {
-      ret.push_back(i * 4 + 2);
-      ret.push_back(i * 4 + 3);
-    }
-    return ret;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiLANSUpdate<cpu, false>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiLANSParam::__FIELDS__());
-
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs) * 4; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs); })
+    .set_attr_parser(ParamParser<MultiLANSParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiLANSInferShape<MultiLANSParam, 4>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* param_names[] = {"weight_", "grad_", "mean_", "var_"};
+          return LANSParamToVector(
+              NumTensors(attrs), param_names, sizeof(param_names) / sizeof(param_names[0]));
+        })
+    // mutable: mean, var
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto i_max = NumTensors(attrs);
+                                     for (size_t i = 0; i < i_max; ++i) {
+                                       ret.push_back(i * 4 + 2);
+                                       ret.push_back(i * 4 + 3);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", MultiLANSUpdate<cpu, false>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiLANSParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_multi_mp_lans_update)
-.describe(R"code(Compute the Nesterov LAMB coefficients of multiple weights and grads with Mix Precision"
+    .describe(
+        R"code(Compute the Nesterov LAMB coefficients of multiple weights and grads with Mix Precision"
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs) * 5;
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return NumTensors(attrs);
-  })
-.set_attr_parser(ParamParser<MultiLANSParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiLANSInferShape<MultiLANSParam, 5>)
-.set_attr<nnvm::FInferType>("FInferType", MPMultiLANSInferType<MultiLANSParam, 5>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const char *param_names[] = {"weight_", "grad_", "mean_", "var_", "weight32_"};
-    return LANSParamToVector(NumTensors(attrs), param_names,
-                             sizeof(param_names)/sizeof(param_names[0]));
-  })
-// mutable: mean, var, weights32
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const auto i_max = NumTensors(attrs);
-    for (size_t i = 0; i < i_max; ++i) {
-      ret.push_back(i * 5 + 2);
-      ret.push_back(i * 5 + 3);
-      ret.push_back(i * 5 + 4);
-    }
-    return ret;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiLANSUpdate<cpu, true>)
-.add_argument("data", "NDArray-or-Symbol[]", "data")
-.add_arguments(MultiLANSParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs) * 5; })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) { return NumTensors(attrs); })
+    .set_attr_parser(ParamParser<MultiLANSParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiLANSInferShape<MultiLANSParam, 5>)
+    .set_attr<nnvm::FInferType>("FInferType", MPMultiLANSInferType<MultiLANSParam, 5>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const char* param_names[] = {"weight_", "grad_", "mean_", "var_", "weight32_"};
+          return LANSParamToVector(
+              NumTensors(attrs), param_names, sizeof(param_names) / sizeof(param_names[0]));
+        })
+    // mutable: mean, var, weights32
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const auto i_max = NumTensors(attrs);
+                                     for (size_t i = 0; i < i_max; ++i) {
+                                       ret.push_back(i * 5 + 2);
+                                       ret.push_back(i * 5 + 3);
+                                       ret.push_back(i * 5 + 4);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", MultiLANSUpdate<cpu, true>)
+    .add_argument("data", "NDArray-or-Symbol[]", "data")
+    .add_arguments(MultiLANSParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_lans.cu b/src/operator/contrib/multi_lans.cu
index 2a7acb6bcaa9..dca30c47e7fd 100644
--- a/src/operator/contrib/multi_lans.cu
+++ b/src/operator/contrib/multi_lans.cu
@@ -30,12 +30,14 @@ namespace mxnet {
 namespace op {
 
 #define BLOCK_SIZE_LAMB 512
-#define ILP_LAMB 4
+#define ILP_LAMB        4
 
-template<bool has_mixed_precision, typename MPDType, typename DType>
+template <bool has_mixed_precision, typename MPDType, typename DType>
 __global__ void KernelStep1(const MultiLANSKernelParam<DType, MPDType> kernel_params,
-                            const float beta1, const float beta2,
-                            const MPDType beta3, const MPDType beta4,
+                            const float beta1,
+                            const float beta2,
+                            const MPDType beta3,
+                            const MPDType beta4,
                             const float epsilon,
                             const float clip_gradient,
                             const float rescale_grad,
@@ -47,16 +49,16 @@ __global__ void KernelStep1(const MultiLANSKernelParam<DType, MPDType> kernel_pa
   const int tensor_id = block_to_tensor[blockIdx.x];
   const int chunck_id = block_to_chunk[blockIdx.x];
   const int start_pos = chunck_id * kernel_params.chunk_size + threadIdx.x;
-  const int stop_pos = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
+  const int stop_pos  = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
 
   MPDType g_norm = sqrtf(g_sq_norm[tensor_id]);
 
   MPDType biascorrection1, biascorrection2;
 
   biascorrection1 = 1.0 - static_cast<MPDType>(
-                    pow(beta1, static_cast<float>(kernel_params.step_count[tensor_id])));
+                              pow(beta1, static_cast<float>(kernel_params.step_count[tensor_id])));
   biascorrection2 = 1.0 - static_cast<MPDType>(
-                    pow(beta2, static_cast<float>(kernel_params.step_count[tensor_id])));
+                              pow(beta2, static_cast<float>(kernel_params.step_count[tensor_id])));
 
   MPDType r_weight[ILP_LAMB];
   MPDType r_grad[ILP_LAMB];
@@ -66,21 +68,22 @@ __global__ void KernelStep1(const MultiLANSKernelParam<DType, MPDType> kernel_pa
   MPDType r_g[ILP_LAMB];
 
   for (size_t i = start_pos; i < stop_pos && i < kernel_params.sizes[tensor_id];
-                                                    i+= blockDim.x*ILP_LAMB) {
+       i += blockDim.x * ILP_LAMB) {
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int load_pos = i + ii*blockDim.x;
+      int load_pos = i + ii * blockDim.x;
       if (load_pos < stop_pos && load_pos < kernel_params.sizes[tensor_id]) {
-        r_weight[ii] = has_mixed_precision ? kernel_params.weights32[tensor_id][load_pos]:
-                       static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
-        r_grad[ii] = static_cast<MPDType>(kernel_params.grads[tensor_id][load_pos]);
-        r_mean[ii] = kernel_params.mean[tensor_id][load_pos];
-        r_var[ii] = kernel_params.var[tensor_id][load_pos];
+        r_weight[ii] = has_mixed_precision
+                           ? kernel_params.weights32[tensor_id][load_pos]
+                           : static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
+        r_grad[ii]   = static_cast<MPDType>(kernel_params.grads[tensor_id][load_pos]);
+        r_mean[ii]   = kernel_params.mean[tensor_id][load_pos];
+        r_var[ii]    = kernel_params.var[tensor_id][load_pos];
       } else {
         r_weight[ii] = static_cast<MPDType>(0);
-        r_grad[ii] = static_cast<MPDType>(0);
-        r_mean[ii] = static_cast<MPDType>(0);
-        r_var[ii] = static_cast<MPDType>(0);
+        r_grad[ii]   = static_cast<MPDType>(0);
+        r_mean[ii]   = static_cast<MPDType>(0);
+        r_var[ii]    = static_cast<MPDType>(0);
       }
     }
 #pragma unroll
@@ -88,28 +91,28 @@ __global__ void KernelStep1(const MultiLANSKernelParam<DType, MPDType> kernel_pa
       r_grad[ii] = (r_grad[ii] * rescale_grad) / g_norm;
       if (clip_gradient >= 0.0f)
         r_grad[ii] = max(min(r_grad[ii], clip_gradient), -clip_gradient);
-      r_mean[ii] = static_cast<MPDType>(beta1) * r_mean[ii] + beta3 * r_grad[ii];
-      r_var[ii] = static_cast<MPDType>(beta2) * r_var[ii] + beta4 * r_grad[ii] * r_grad[ii];
+      r_mean[ii]        = static_cast<MPDType>(beta1) * r_mean[ii] + beta3 * r_grad[ii];
+      r_var[ii]         = static_cast<MPDType>(beta2) * r_var[ii] + beta4 * r_grad[ii] * r_grad[ii];
       MPDType r_var_hat = sqrt(r_var[ii] / biascorrection2) + static_cast<MPDType>(epsilon);
-      r_m[ii] = (r_mean[ii] / biascorrection1) / r_var_hat;
-      r_g[ii] = r_grad[ii] / r_var_hat;
-      r_m[ii] = __fmaf_rn(kernel_params.wds[tensor_id], r_weight[ii], r_m[ii]);
-      r_g[ii] = __fmaf_rn(kernel_params.wds[tensor_id], r_weight[ii], r_g[ii]);
+      r_m[ii]           = (r_mean[ii] / biascorrection1) / r_var_hat;
+      r_g[ii]           = r_grad[ii] / r_var_hat;
+      r_m[ii]           = __fmaf_rn(kernel_params.wds[tensor_id], r_weight[ii], r_m[ii]);
+      r_g[ii]           = __fmaf_rn(kernel_params.wds[tensor_id], r_weight[ii], r_g[ii]);
     }
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int store_pos = i + ii*blockDim.x;
+      int store_pos = i + ii * blockDim.x;
       if (store_pos < stop_pos && store_pos < kernel_params.sizes[tensor_id]) {
-        kernel_params.mean[tensor_id][store_pos] = r_mean[ii];
-        kernel_params.var[tensor_id][store_pos] = r_var[ii];
-        temp_m[kernel_params.tensor2temp_g[tensor_id]+store_pos] = r_m[ii];
-        temp_g[kernel_params.tensor2temp_g[tensor_id]+store_pos] = r_g[ii];
+        kernel_params.mean[tensor_id][store_pos]                   = r_mean[ii];
+        kernel_params.var[tensor_id][store_pos]                    = r_var[ii];
+        temp_m[kernel_params.tensor2temp_g[tensor_id] + store_pos] = r_m[ii];
+        temp_g[kernel_params.tensor2temp_g[tensor_id] + store_pos] = r_g[ii];
       }
     }
   }
 }
 
-template<bool has_mixed_precision, typename MPDType, typename DType>
+template <bool has_mixed_precision, typename MPDType, typename DType>
 __global__ void KernelStep2(const MultiLANSKernelParam<DType, MPDType> kernel_params,
                             const float beta1,
                             const MPDType beta3,
@@ -126,9 +129,9 @@ __global__ void KernelStep2(const MultiLANSKernelParam<DType, MPDType> kernel_pa
   const int tensor_id = block_to_tensor[blockIdx.x];
   const int chunck_id = block_to_chunk[blockIdx.x];
   const int start_pos = chunck_id * kernel_params.chunk_size + threadIdx.x;
-  const int stop_pos = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
+  const int stop_pos  = chunck_id * kernel_params.chunk_size + kernel_params.chunk_size;
 
-  MPDType r1 = sqrtf(sum_sq_weigths[tensor_id]);
+  MPDType r1   = sqrtf(sum_sq_weigths[tensor_id]);
   MPDType r2_m = sqrtf(sum_sq_temp_m[tensor_id]);
   MPDType r2_g = sqrtf(sum_sq_temp_g[tensor_id]);
   if (lower_bound >= 0)
@@ -140,11 +143,11 @@ __global__ void KernelStep2(const MultiLANSKernelParam<DType, MPDType> kernel_pa
   if (r1 == 0.0f || r2_m == 0.0f)
     lr_adjusted_m = kernel_params.learning_rates[tensor_id];
   else
-    lr_adjusted_m = kernel_params.learning_rates[tensor_id] * r1/r2_m;
+    lr_adjusted_m = kernel_params.learning_rates[tensor_id] * r1 / r2_m;
   if (r1 == 0.0f || r2_g == 0.0f)
     lr_adjusted_g = kernel_params.learning_rates[tensor_id];
   else
-    lr_adjusted_g = kernel_params.learning_rates[tensor_id] * r1/r2_g;
+    lr_adjusted_g = kernel_params.learning_rates[tensor_id] * r1 / r2_g;
   lr_adjusted_m *= static_cast<MPDType>(beta1);
   lr_adjusted_g *= beta3;
 
@@ -152,16 +155,17 @@ __global__ void KernelStep2(const MultiLANSKernelParam<DType, MPDType> kernel_pa
   MPDType r_m[ILP_LAMB];
   MPDType r_g[ILP_LAMB];
 
-  for (size_t i=start_pos; i < stop_pos && i < kernel_params.sizes[tensor_id];
-                                                  i+= blockDim.x*ILP_LAMB) {
+  for (size_t i = start_pos; i < stop_pos && i < kernel_params.sizes[tensor_id];
+       i += blockDim.x * ILP_LAMB) {
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int load_pos = i + ii*blockDim.x;
+      int load_pos = i + ii * blockDim.x;
       if (load_pos < stop_pos && load_pos < kernel_params.sizes[tensor_id]) {
-        r_weight[ii] = has_mixed_precision ? kernel_params.weights32[tensor_id][load_pos]:
-                       static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
-        r_m[ii] = temp_m[kernel_params.tensor2temp_g[tensor_id]+load_pos];
-        r_g[ii] = temp_g[kernel_params.tensor2temp_g[tensor_id]+load_pos];
+        r_weight[ii] = has_mixed_precision
+                           ? kernel_params.weights32[tensor_id][load_pos]
+                           : static_cast<MPDType>(kernel_params.weights[tensor_id][load_pos]);
+        r_m[ii]      = temp_m[kernel_params.tensor2temp_g[tensor_id] + load_pos];
+        r_g[ii]      = temp_g[kernel_params.tensor2temp_g[tensor_id] + load_pos];
       }
     }
 #pragma unroll
@@ -170,7 +174,7 @@ __global__ void KernelStep2(const MultiLANSKernelParam<DType, MPDType> kernel_pa
     }
 #pragma unroll
     for (int ii = 0; ii < ILP_LAMB; ii++) {
-      int store_pos = i + ii*blockDim.x;
+      int store_pos = i + ii * blockDim.x;
       if (store_pos < stop_pos && store_pos < kernel_params.sizes[tensor_id]) {
         if (has_mixed_precision)
           kernel_params.weights32[tensor_id][store_pos] = r_weight[ii];
@@ -180,108 +184,127 @@ __global__ void KernelStep2(const MultiLANSKernelParam<DType, MPDType> kernel_pa
   }
 }
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel1(Stream<gpu>* s,
                  const MultiLANSKernelParam<DType, MPDType>& kernel_params,
-                 const MultiLANSParam &param,
+                 const MultiLANSParam& param,
                  float* g_sq_norm,
                  float* temp_m,
                  float* temp_g,
                  int* block_to_tensor,
                  int* block_to_chunk) {
-  int nblocks = kernel_params.nchunks;
-  int* host_block2tensor = reinterpret_cast<int*>(malloc(kernel_params.nchunks*sizeof(int)));
-  int* host_block2chunk = reinterpret_cast<int*>(malloc(kernel_params.nchunks*sizeof(int)));
-  int chunk_id = 0;
+  int nblocks            = kernel_params.nchunks;
+  int* host_block2tensor = reinterpret_cast<int*>(malloc(kernel_params.nchunks * sizeof(int)));
+  int* host_block2chunk  = reinterpret_cast<int*>(malloc(kernel_params.nchunks * sizeof(int)));
+  int chunk_id           = 0;
   for (size_t index = 0; index < kernel_params.ntensors; ++index) {
     int current_chunk = 0;
-    for (size_t j = 0; j < kernel_params.sizes[index]; j+=kernel_params.chunk_size) {
+    for (size_t j = 0; j < kernel_params.sizes[index]; j += kernel_params.chunk_size) {
       host_block2tensor[chunk_id] = index;
-      host_block2chunk[chunk_id] = current_chunk;
+      host_block2chunk[chunk_id]  = current_chunk;
       current_chunk++;
       chunk_id++;
     }
   }
-  cudaMemcpyAsync(block_to_tensor, host_block2tensor, kernel_params.nchunks*sizeof(int),
-                  cudaMemcpyHostToDevice, Stream<gpu>::GetStream(s));
-  cudaMemcpyAsync(block_to_chunk, host_block2chunk, kernel_params.nchunks*sizeof(int),
-                  cudaMemcpyHostToDevice, Stream<gpu>::GetStream(s));
+  cudaMemcpyAsync(block_to_tensor,
+                  host_block2tensor,
+                  kernel_params.nchunks * sizeof(int),
+                  cudaMemcpyHostToDevice,
+                  Stream<gpu>::GetStream(s));
+  cudaMemcpyAsync(block_to_chunk,
+                  host_block2chunk,
+                  kernel_params.nchunks * sizeof(int),
+                  cudaMemcpyHostToDevice,
+                  Stream<gpu>::GetStream(s));
 
   bool has_mixed_precision = !std::is_same<DType, MPDType>::value;
-  MPDType beta3 = 1.0 - param.beta1;
-  MPDType beta4 = 1.0 - param.beta2;
+  MPDType beta3            = 1.0 - param.beta1;
+  MPDType beta4            = 1.0 - param.beta2;
 
   if (has_mixed_precision)
-    KernelStep1<true><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                     kernel_params,
-                     param.beta1, param.beta2,
-                     beta3, beta4,
-                     param.epsilon,
-                     param.clip_gradient,
-                     param.rescale_grad,
-                     g_sq_norm,
-                     temp_m,
-                     temp_g,
-                     block_to_tensor,
-                     block_to_chunk);
+    KernelStep1<true>
+        <<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                     param.beta1,
+                                                                     param.beta2,
+                                                                     beta3,
+                                                                     beta4,
+                                                                     param.epsilon,
+                                                                     param.clip_gradient,
+                                                                     param.rescale_grad,
+                                                                     g_sq_norm,
+                                                                     temp_m,
+                                                                     temp_g,
+                                                                     block_to_tensor,
+                                                                     block_to_chunk);
   else
-    KernelStep1<false><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                      kernel_params,
-                      param.beta1, param.beta2,
-                      beta3, beta4,
-                      param.epsilon,
-                      param.clip_gradient,
-                      param.rescale_grad,
-                      g_sq_norm,
-                      temp_m,
-                      temp_g,
-                      block_to_tensor,
-                      block_to_chunk);
-  }
+    KernelStep1<false>
+        <<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                     param.beta1,
+                                                                     param.beta2,
+                                                                     beta3,
+                                                                     beta4,
+                                                                     param.epsilon,
+                                                                     param.clip_gradient,
+                                                                     param.rescale_grad,
+                                                                     g_sq_norm,
+                                                                     temp_m,
+                                                                     temp_g,
+                                                                     block_to_tensor,
+                                                                     block_to_chunk);
+}
 
-template<typename MPDType, typename DType>
+template <typename MPDType, typename DType>
 void CallKernel2(Stream<gpu>* s,
                  const MultiLANSKernelParam<DType, MPDType>& kernel_params,
-                 const MultiLANSParam &param,
-                 float* r1, float* r2_m, float* r2_g,
-                 float* temp_m, float* temp_g,
+                 const MultiLANSParam& param,
+                 float* r1,
+                 float* r2_m,
+                 float* r2_g,
+                 float* temp_m,
+                 float* temp_g,
                  int* block_to_tensor,
                  int* block_to_chunk,
                  const OpReqType req) {
-  size_t nblocks = kernel_params.nchunks;
+  size_t nblocks           = kernel_params.nchunks;
   bool has_mixed_precision = !std::is_same<DType, MPDType>::value;
-  MPDType beta3 = 1.0 - param.beta1;
+  MPDType beta3            = 1.0 - param.beta1;
 
   if (has_mixed_precision)
-    KernelStep2<true><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                     kernel_params,
-                     param.beta1,
-                     beta3,
-                     r1, r2_m, r2_g,
-                     temp_m, temp_g,
-                     param.lower_bound, param.upper_bound,
-                     block_to_tensor,
-                     block_to_chunk,
-                     req);
+    KernelStep2<true><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                                  param.beta1,
+                                                                                  beta3,
+                                                                                  r1,
+                                                                                  r2_m,
+                                                                                  r2_g,
+                                                                                  temp_m,
+                                                                                  temp_g,
+                                                                                  param.lower_bound,
+                                                                                  param.upper_bound,
+                                                                                  block_to_tensor,
+                                                                                  block_to_chunk,
+                                                                                  req);
   else
-    KernelStep2<false><<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(
-                      kernel_params,
-                      param.beta1,
-                      beta3,
-                      r1, r2_m, r2_g,
-                      temp_m, temp_g,
-                      param.lower_bound, param.upper_bound,
-                      block_to_tensor,
-                      block_to_chunk,
-                      req);
+    KernelStep2<false>
+        <<<nblocks, BLOCK_SIZE_LAMB, 0, Stream<gpu>::GetStream(s)>>>(kernel_params,
+                                                                     param.beta1,
+                                                                     beta3,
+                                                                     r1,
+                                                                     r2_m,
+                                                                     r2_g,
+                                                                     temp_m,
+                                                                     temp_g,
+                                                                     param.lower_bound,
+                                                                     param.upper_bound,
+                                                                     block_to_tensor,
+                                                                     block_to_chunk,
+                                                                     req);
 }
 
-
 NNVM_REGISTER_OP(_multi_lans_update)
-.set_attr<FCompute>("FCompute<gpu>",  MultiLANSUpdate<gpu, false>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiLANSUpdate<gpu, false>);
 
 NNVM_REGISTER_OP(_multi_mp_lans_update)
-.set_attr<FCompute>("FCompute<gpu>",  MultiLANSUpdate<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiLANSUpdate<gpu, true>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_lars-inl.h b/src/operator/contrib/multi_lars-inl.h
index 3e9bebe07ba7..09ec9acbc238 100644
--- a/src/operator/contrib/multi_lars-inl.h
+++ b/src/operator/contrib/multi_lars-inl.h
@@ -48,53 +48,64 @@ struct LARSParam : public dmlc::Parameter<LARSParam> {
   float eps;
   float rescale_grad;
   DMLC_DECLARE_PARAMETER(LARSParam) {
-    DMLC_DECLARE_FIELD(eta)
-    .describe("LARS eta");
-    DMLC_DECLARE_FIELD(eps)
-    .describe("LARS eps");
-    DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Gradient rescaling factor");
+    DMLC_DECLARE_FIELD(eta).describe("LARS eta");
+    DMLC_DECLARE_FIELD(eps).describe("LARS eps");
+    DMLC_DECLARE_FIELD(rescale_grad).set_default(1.0f).describe("Gradient rescaling factor");
   }
 };
 
 struct MultiLARSKernel {
-  MSHADOW_XINLINE static void Map(index_t i, float* out_data, const float* lrs,
-                                  const float* weights_sum_sq, const float* grads_sum_sq,
-                                  const float* wds, const float eta, const float eps,
-                                  const float rescale_grad, const OpReqType req) {
-    float w_norm = sqrtf(weights_sum_sq[i]);
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  float* out_data,
+                                  const float* lrs,
+                                  const float* weights_sum_sq,
+                                  const float* grads_sum_sq,
+                                  const float* wds,
+                                  const float eta,
+                                  const float eps,
+                                  const float rescale_grad,
+                                  const OpReqType req) {
+    float w_norm       = sqrtf(weights_sum_sq[i]);
     bool is_lars_valid = w_norm > 0. && grads_sum_sq[i] > 0.;
-    KERNEL_ASSIGN(out_data[i], req, is_lars_valid ?
-        lrs[i] * eta * w_norm / (sqrtf(grads_sum_sq[i]) * rescale_grad + wds[i] * w_norm + eps) :
-        lrs[i]);
+    KERNEL_ASSIGN(out_data[i],
+                  req,
+                  is_lars_valid
+                      ? lrs[i] * eta * w_norm /
+                            (sqrtf(grads_sum_sq[i]) * rescale_grad + wds[i] * w_norm + eps)
+                      : lrs[i]);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MultiLARS(const nnvm::NodeAttrs& attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  auto param = nnvm::get<LARSParam>(attrs.parsed);
+  auto param     = nnvm::get<LARSParam>(attrs.parsed);
   Stream<xpu>* s = ctx.get_stream<xpu>();
   if (inputs[0].type_flag_ != mshadow::kFloat32)
     LOG(FATAL) << "MultiLARS only support float";
-  Tensor<xpu, 2, float> lrs = inputs[0].FlatTo2D<xpu, float>(s);
+  Tensor<xpu, 2, float> lrs            = inputs[0].FlatTo2D<xpu, float>(s);
   Tensor<xpu, 2, float> weights_sum_sq = inputs[1].FlatTo2D<xpu, float>(s);
-  Tensor<xpu, 2, float> grads_sum_sq = inputs[2].FlatTo2D<xpu, float>(s);
-  Tensor<xpu, 2, float> wds = inputs[3].FlatTo2D<xpu, float>(s);
-  Tensor<xpu, 2, float> out_data = outputs[0].FlatTo2D<xpu, float>(s);
-  Kernel<MultiLARSKernel, xpu>::Launch(s, weights_sum_sq.shape_.Size(), out_data.dptr_,
-                                       lrs.dptr_, weights_sum_sq.dptr_, grads_sum_sq.dptr_,
-                                       wds.dptr_, param.eta, param.eps,
-                                       param.rescale_grad, req[0]);
+  Tensor<xpu, 2, float> grads_sum_sq   = inputs[2].FlatTo2D<xpu, float>(s);
+  Tensor<xpu, 2, float> wds            = inputs[3].FlatTo2D<xpu, float>(s);
+  Tensor<xpu, 2, float> out_data       = outputs[0].FlatTo2D<xpu, float>(s);
+  Kernel<MultiLARSKernel, xpu>::Launch(s,
+                                       weights_sum_sq.shape_.Size(),
+                                       out_data.dptr_,
+                                       lrs.dptr_,
+                                       weights_sum_sq.dptr_,
+                                       grads_sum_sq.dptr_,
+                                       wds.dptr_,
+                                       param.eta,
+                                       param.eps,
+                                       param.rescale_grad,
+                                       req[0]);
 }
 
 }  // namespace op
 }  // namespace mxnet
 
-
 #endif  // MXNET_OPERATOR_CONTRIB_MULTI_LARS_INL_H_
diff --git a/src/operator/contrib/multi_lars.cc b/src/operator/contrib/multi_lars.cc
index d4ee49358971..4ea42f105fcb 100644
--- a/src/operator/contrib/multi_lars.cc
+++ b/src/operator/contrib/multi_lars.cc
@@ -33,24 +33,28 @@ namespace op {
 DMLC_REGISTER_PARAMETER(LARSParam);
 
 NNVM_REGISTER_OP(multi_lars)
-.describe(R"code(Compute the LARS coefficients of multiple weights and grads from their sums of square"
+    .describe(
+        R"code(Compute the LARS coefficients of multiple weights and grads from their sums of square"
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LARSParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<4, 1, false, false, false>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const nnvm::NodeAttrs& attrs) {
-    std::vector<std::string> list_input_names = {"lrs", "weights_sum_sq", "grads_sum_sq", "wds"};
-    return list_input_names;
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiLARS<cpu>)
-.add_argument("lrs", "NDArray-or-Symbol", "Learning rates to scale by LARS coefficient")
-.add_argument("weights_sum_sq", "NDArray-or-Symbol", "sum of square of weights arrays")
-.add_argument("grads_sum_sq", "NDArray-or-Symbol", "sum of square of gradients arrays")
-.add_argument("wds", "NDArray-or-Symbol", "weight decays")
-.add_arguments(LARSParam::__FIELDS__());
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LARSParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType",
+                                 ElemwiseStorageType<4, 1, false, false, false>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const nnvm::NodeAttrs& attrs) {
+                                       std::vector<std::string> list_input_names = {
+                                           "lrs", "weights_sum_sq", "grads_sum_sq", "wds"};
+                                       return list_input_names;
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", MultiLARS<cpu>)
+    .add_argument("lrs", "NDArray-or-Symbol", "Learning rates to scale by LARS coefficient")
+    .add_argument("weights_sum_sq", "NDArray-or-Symbol", "sum of square of weights arrays")
+    .add_argument("grads_sum_sq", "NDArray-or-Symbol", "sum of square of gradients arrays")
+    .add_argument("wds", "NDArray-or-Symbol", "weight decays")
+    .add_arguments(LARSParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_lars.cu b/src/operator/contrib/multi_lars.cu
index 292f09092e76..e65e7b48240d 100644
--- a/src/operator/contrib/multi_lars.cu
+++ b/src/operator/contrib/multi_lars.cu
@@ -29,8 +29,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(multi_lars)
-.set_attr<FCompute>("FCompute<gpu>", MultiLARS<gpu>);
+NNVM_REGISTER_OP(multi_lars).set_attr<FCompute>("FCompute<gpu>", MultiLARS<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_proposal-inl.h b/src/operator/contrib/multi_proposal-inl.h
index 919e9023310c..c6bd7fcfab16 100644
--- a/src/operator/contrib/multi_proposal-inl.h
+++ b/src/operator/contrib/multi_proposal-inl.h
@@ -24,7 +24,7 @@
  * \file multi_proposal-inl.h
  * \brief MultiProposal Operator
  * \author Piotr Teterwak, Bing Xu, Jian Guo, Xizhou Zhu
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_MULTI_PROPOSAL_INL_H_
 #define MXNET_OPERATOR_CONTRIB_MULTI_PROPOSAL_INL_H_
 
@@ -41,15 +41,14 @@
 #include "../operator_common.h"
 #include "../mshadow_op.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace proposal {
-enum MultiProposalOpInputs {kClsProb, kBBoxPred, kImInfo};
-enum MultiProposalOpOutputs {kOut, kScore};
-enum MultiProposalForwardResource {kTempResource};
-}  // proposal
+enum MultiProposalOpInputs { kClsProb, kBBoxPred, kImInfo };
+enum MultiProposalOpOutputs { kOut, kScore };
+enum MultiProposalForwardResource { kTempResource };
+}  // namespace proposal
 
 struct MultiProposalParam : public dmlc::Parameter<MultiProposalParam> {
   int rpn_pre_nms_top_n;
@@ -63,32 +62,41 @@ struct MultiProposalParam : public dmlc::Parameter<MultiProposalParam> {
   bool iou_loss;
   DMLC_DECLARE_PARAMETER(MultiProposalParam) {
     float tmp[] = {0, 0, 0, 0};
-    DMLC_DECLARE_FIELD(rpn_pre_nms_top_n).set_default(6000)
-    .describe("Number of top scoring boxes to keep before applying NMS to RPN proposals");
-    DMLC_DECLARE_FIELD(rpn_post_nms_top_n).set_default(300)
-    .describe("Number of top scoring boxes to keep after applying NMS to RPN proposals");
-    DMLC_DECLARE_FIELD(threshold).set_default(0.7)
-    .describe("NMS value, below which to suppress.");
-    DMLC_DECLARE_FIELD(rpn_min_size).set_default(16)
-    .describe("Minimum height or width in proposal");
-    tmp[0] = 4.0f; tmp[1] = 8.0f; tmp[2] = 16.0f; tmp[3] = 32.0f;
-    DMLC_DECLARE_FIELD(scales).set_default(mxnet::Tuple<float>(tmp, tmp + 4))
-    .describe("Used to generate anchor windows by enumerating scales");
-    tmp[0] = 0.5f; tmp[1] = 1.0f; tmp[2] = 2.0f;
-    DMLC_DECLARE_FIELD(ratios).set_default(mxnet::Tuple<float>(tmp, tmp + 3))
-    .describe("Used to generate anchor windows by enumerating ratios");
-    DMLC_DECLARE_FIELD(feature_stride).set_default(16)
-    .describe("The size of the receptive field each unit in the convolution layer of the rpn,"
-              "for example the product of all stride's prior to this layer.");
-    DMLC_DECLARE_FIELD(output_score).set_default(false)
-    .describe("Add score to outputs");
-    DMLC_DECLARE_FIELD(iou_loss).set_default(false)
-    .describe("Usage of IoU Loss");
+    DMLC_DECLARE_FIELD(rpn_pre_nms_top_n)
+        .set_default(6000)
+        .describe("Number of top scoring boxes to keep before applying NMS to RPN proposals");
+    DMLC_DECLARE_FIELD(rpn_post_nms_top_n)
+        .set_default(300)
+        .describe("Number of top scoring boxes to keep after applying NMS to RPN proposals");
+    DMLC_DECLARE_FIELD(threshold).set_default(0.7).describe("NMS value, below which to suppress.");
+    DMLC_DECLARE_FIELD(rpn_min_size)
+        .set_default(16)
+        .describe("Minimum height or width in proposal");
+    tmp[0] = 4.0f;
+    tmp[1] = 8.0f;
+    tmp[2] = 16.0f;
+    tmp[3] = 32.0f;
+    DMLC_DECLARE_FIELD(scales)
+        .set_default(mxnet::Tuple<float>(tmp, tmp + 4))
+        .describe("Used to generate anchor windows by enumerating scales");
+    tmp[0] = 0.5f;
+    tmp[1] = 1.0f;
+    tmp[2] = 2.0f;
+    DMLC_DECLARE_FIELD(ratios)
+        .set_default(mxnet::Tuple<float>(tmp, tmp + 3))
+        .describe("Used to generate anchor windows by enumerating ratios");
+    DMLC_DECLARE_FIELD(feature_stride)
+        .set_default(16)
+        .describe(
+            "The size of the receptive field each unit in the convolution layer of the rpn,"
+            "for example the product of all stride's prior to this layer.");
+    DMLC_DECLARE_FIELD(output_score).set_default(false).describe("Add score to outputs");
+    DMLC_DECLARE_FIELD(iou_loss).set_default(false).describe("Usage of IoU Loss");
   }
 };
 
-template<typename xpu>
-Operator *CreateOp(MultiProposalParam param);
+template <typename xpu>
+Operator* CreateOp(MultiProposalParam param);
 
 #if DMLC_USE_CXX11
 class MultiProposalProp : public OperatorProperty {
@@ -101,17 +109,17 @@ class MultiProposalProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 3) << "Input:[cls_prob, bbox_pred, im_info]";
-    const mxnet::TShape &dshape = in_shape->at(proposal::kClsProb);
-    if (mxnet::op::shape_is_none(dshape)) return false;
+    const mxnet::TShape& dshape = in_shape->at(proposal::kClsProb);
+    if (mxnet::op::shape_is_none(dshape))
+      return false;
     Shape<4> bbox_pred_shape;
     bbox_pred_shape = Shape4(dshape[0], dshape[1] * 2, dshape[2], dshape[3]);
-    SHAPE_ASSIGN_CHECK(*in_shape, proposal::kBBoxPred,
-                       bbox_pred_shape);
+    SHAPE_ASSIGN_CHECK(*in_shape, proposal::kBBoxPred, bbox_pred_shape);
     Shape<2> im_info_shape;
     im_info_shape = Shape2(dshape[0], 3);
     SHAPE_ASSIGN_CHECK(*in_shape, proposal::kImInfo, im_info_shape);
@@ -124,7 +132,7 @@ class MultiProposalProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new MultiProposalProp();
+    auto ptr    = new MultiProposalProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -133,15 +141,13 @@ class MultiProposalProp : public OperatorProperty {
     return "_contrib_MultiProposal";
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {};
   }
 
@@ -186,7 +192,7 @@ inline void _MakeAnchor(float w,
                         float h,
                         float x_ctr,
                         float y_ctr,
-                        std::vector<float> *out_anchors) {
+                        std::vector<float>* out_anchors) {
   out_anchors->push_back(x_ctr - 0.5f * (w - 1.0f));
   out_anchors->push_back(y_ctr - 0.5f * (h - 1.0f));
   out_anchors->push_back(x_ctr + 0.5f * (w - 1.0f));
@@ -197,25 +203,24 @@ inline void _MakeAnchor(float w,
 inline void _Transform(float scale,
                        float ratio,
                        const std::vector<float>& base_anchor,
-                       std::vector<float>  *out_anchors) {
-  float w = base_anchor[2] - base_anchor[1] + 1.0f;
-  float h = base_anchor[3] - base_anchor[1] + 1.0f;
-  float x_ctr = base_anchor[0] + 0.5 * (w - 1.0f);
-  float y_ctr = base_anchor[1] + 0.5 * (h - 1.0f);
-  float size = w * h;
+                       std::vector<float>* out_anchors) {
+  float w           = base_anchor[2] - base_anchor[1] + 1.0f;
+  float h           = base_anchor[3] - base_anchor[1] + 1.0f;
+  float x_ctr       = base_anchor[0] + 0.5 * (w - 1.0f);
+  float y_ctr       = base_anchor[1] + 0.5 * (h - 1.0f);
+  float size        = w * h;
   float size_ratios = std::floor(size / ratio);
-  float new_w = std::floor(std::sqrt(size_ratios) + 0.5f) * scale;
-  float new_h = std::floor((new_w / scale * ratio) + 0.5f) * scale;
+  float new_w       = std::floor(std::sqrt(size_ratios) + 0.5f) * scale;
+  float new_h       = std::floor((new_w / scale * ratio) + 0.5f) * scale;
 
-  _MakeAnchor(new_w, new_h, x_ctr,
-             y_ctr, out_anchors);
+  _MakeAnchor(new_w, new_h, x_ctr, y_ctr, out_anchors);
 }
 
 // out_anchors must have shape (n, 5), where n is ratios.size() * scales.size()
 inline void GenerateAnchors(const std::vector<float>& base_anchor,
                             const mxnet::Tuple<float>& ratios,
                             const mxnet::Tuple<float>& scales,
-                            std::vector<float> *out_anchors) {
+                            std::vector<float>* out_anchors) {
   for (int j = 0; j < ratios.ndim(); ++j) {
     for (int k = 0; k < scales.ndim(); ++k) {
       _Transform(scales[k], ratios[j], base_anchor, out_anchors);
diff --git a/src/operator/contrib/multi_proposal.cc b/src/operator/contrib/multi_proposal.cc
index bf8555ca1c09..555886cc9953 100644
--- a/src/operator/contrib/multi_proposal.cc
+++ b/src/operator/contrib/multi_proposal.cc
@@ -23,7 +23,7 @@
  * \file multi_proposal.cc
  * \brief
  * \author Xizhou Zhu, Kan Wu
-*/
+ */
 
 #include "./multi_proposal-inl.h"
 
@@ -41,34 +41,34 @@ inline void BBoxTransformInv(const mshadow::Tensor<cpu, 2>& boxes,
                              const float im_width,
                              const int real_height,
                              const int real_width,
-                             mshadow::Tensor<cpu, 2> *out_pred_boxes) {
+                             mshadow::Tensor<cpu, 2>* out_pred_boxes) {
   CHECK_GE(boxes.size(1), 4);
   CHECK_GE(out_pred_boxes->size(1), 4);
   int anchors = deltas.size(0) / 4;
   int heights = deltas.size(1);
-  int widths = deltas.size(2);
+  int widths  = deltas.size(2);
 
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int index = 0; index < anchors * heights * widths; ++index) {
     // index_t index = h * (widths * anchors) + w * (anchors) + a;
     int a = index % anchors;
     int w = (index / anchors) % widths;
     int h = index / (widths * anchors);
 
-    float width = boxes[index][2] - boxes[index][0] + 1.0;
+    float width  = boxes[index][2] - boxes[index][0] + 1.0;
     float height = boxes[index][3] - boxes[index][1] + 1.0;
-    float ctr_x = boxes[index][0] + 0.5 * (width - 1.0);
-    float ctr_y = boxes[index][1] + 0.5 * (height - 1.0);
+    float ctr_x  = boxes[index][0] + 0.5 * (width - 1.0);
+    float ctr_y  = boxes[index][1] + 0.5 * (height - 1.0);
 
-    float dx = deltas[a*4 + 0][h][w];
-    float dy = deltas[a*4 + 1][h][w];
-    float dw = deltas[a*4 + 2][h][w];
-    float dh = deltas[a*4 + 3][h][w];
+    float dx = deltas[a * 4 + 0][h][w];
+    float dy = deltas[a * 4 + 1][h][w];
+    float dw = deltas[a * 4 + 2][h][w];
+    float dh = deltas[a * 4 + 3][h][w];
 
     float pred_ctr_x = dx * width + ctr_x;
     float pred_ctr_y = dy * height + ctr_y;
-    float pred_w = std::exp(dw) * width;
-    float pred_h = std::exp(dh) * height;
+    float pred_w     = std::exp(dw) * width;
+    float pred_h     = std::exp(dh) * height;
 
     float pred_x1 = pred_ctr_x - 0.5 * (pred_w - 1.0);
     float pred_y1 = pred_ctr_y - 0.5 * (pred_h - 1.0);
@@ -98,14 +98,14 @@ inline void IoUTransformInv(const mshadow::Tensor<cpu, 2>& boxes,
                             const float im_width,
                             const int real_height,
                             const int real_width,
-                            mshadow::Tensor<cpu, 2> *out_pred_boxes) {
+                            mshadow::Tensor<cpu, 2>* out_pred_boxes) {
   CHECK_GE(boxes.size(1), 4);
   CHECK_GE(out_pred_boxes->size(1), 4);
   int anchors = deltas.size(0) / 4;
   int heights = deltas.size(1);
-  int widths = deltas.size(2);
+  int widths  = deltas.size(2);
 
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int index = 0; index < anchors * heights * widths; ++index) {
     // index_t index = h * (widths * anchors) + w * (anchors) + a;
     int a = index % anchors;
@@ -145,9 +145,8 @@ inline void IoUTransformInv(const mshadow::Tensor<cpu, 2>& boxes,
 
 // filter box by set confidence to zero
 // * height or width < rpn_min_size
-inline void FilterBox(mshadow::Tensor<cpu, 2> *dets,
-                      const float min_size) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+inline void FilterBox(mshadow::Tensor<cpu, 2>* dets, const float min_size) {
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int i = 0; i < static_cast<int>(dets->size(0)); ++i) {
     float iw = (*dets)[i][2] - (*dets)[i][0] + 1.0f;
     float ih = (*dets)[i][3] - (*dets)[i][1] + 1.0f;
@@ -173,20 +172,18 @@ namespace op {
 namespace utils {
 
 struct ReverseArgsortCompl {
-  const float *val_;
-  explicit ReverseArgsortCompl(float *val)
-    : val_(val) {}
-  bool operator() (float i, float j) {
-    return (val_[static_cast<index_t>(i)] >
-            val_[static_cast<index_t>(j)]);
+  const float* val_;
+  explicit ReverseArgsortCompl(float* val) : val_(val) {}
+  bool operator()(float i, float j) {
+    return (val_[static_cast<index_t>(i)] > val_[static_cast<index_t>(j)]);
   }
 };
 
 // copy score and init order
 inline void CopyScore(const mshadow::Tensor<cpu, 2>& dets,
-                      mshadow::Tensor<cpu, 1> *score,
-                      mshadow::Tensor<cpu, 1> *order) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+                      mshadow::Tensor<cpu, 1>* score,
+                      mshadow::Tensor<cpu, 1>* order) {
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int i = 0; i < static_cast<int>(dets.size(0)); ++i) {
     (*score)[i] = dets[i][4];
     (*order)[i] = i;
@@ -194,8 +191,7 @@ inline void CopyScore(const mshadow::Tensor<cpu, 2>& dets,
 }
 
 // sort order array according to score
-inline void ReverseArgsort(const mshadow::Tensor<cpu, 1>& score,
-                           mshadow::Tensor<cpu, 1> *order) {
+inline void ReverseArgsort(const mshadow::Tensor<cpu, 1>& score, mshadow::Tensor<cpu, 1>* order) {
   ReverseArgsortCompl cmpl(score.dptr_);
   std::stable_sort(order->dptr_, order->dptr_ + score.size(0), cmpl);
 }
@@ -205,16 +201,16 @@ inline void ReverseArgsort(const mshadow::Tensor<cpu, 1>& score,
 inline void ReorderProposals(const mshadow::Tensor<cpu, 2>& prev_dets,
                              const mshadow::Tensor<cpu, 1>& order,
                              const index_t pre_nms_top_n,
-                             mshadow::Tensor<cpu, 2> *dets) {
+                             mshadow::Tensor<cpu, 2>* dets) {
   CHECK_EQ(dets->size(0), pre_nms_top_n);
   const int dets_size0 = static_cast<int>(dets->size(0));
   const int dets_size1 = static_cast<int>(dets->size(1));
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int k = 0; k < dets_size0 * dets_size1; ++k) {
-    int i = k / dets_size1;
-    int j = k % dets_size1;
+    int i               = k / dets_size1;
+    int j               = k % dets_size1;
     const index_t index = order[i];
-    (*dets)[i][j] = prev_dets[index][j];
+    (*dets)[i][j]       = prev_dets[index][j];
   }
 }
 
@@ -222,30 +218,29 @@ inline void ReorderProposals(const mshadow::Tensor<cpu, 2>& prev_dets,
 inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
                                   const float thresh,
                                   const index_t post_nms_top_n,
-                                  mshadow::Tensor<cpu, 1> *area,
-                                  mshadow::Tensor<cpu, 1> *suppressed,
-                                  mshadow::Tensor<cpu, 1> *keep,
-                                  int *out_size) {
+                                  mshadow::Tensor<cpu, 1>* area,
+                                  mshadow::Tensor<cpu, 1>* suppressed,
+                                  mshadow::Tensor<cpu, 1>* keep,
+                                  int* out_size) {
   CHECK_EQ(dets.shape_[1], 5) << "dets: [x1, y1, x2, y2, score]";
   CHECK_GT(dets.shape_[0], 0);
   CHECK_EQ(dets.CheckContiguous(), true);
   CHECK_EQ(area->CheckContiguous(), true);
   CHECK_EQ(suppressed->CheckContiguous(), true);
   CHECK_EQ(keep->CheckContiguous(), true);
-  // calculate area
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+// calculate area
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int i = 0; i < static_cast<int>(dets.size(0)); ++i) {
-    (*area)[i] = (dets[i][2] - dets[i][0] + 1) *
-                 (dets[i][3] - dets[i][1] + 1);
+    (*area)[i] = (dets[i][2] - dets[i][0] + 1) * (dets[i][3] - dets[i][1] + 1);
   }
 
   // calculate nms
   *out_size = 0;
   for (index_t i = 0; i < dets.size(0) && (*out_size) < static_cast<int>(post_nms_top_n); ++i) {
-    float ix1 = dets[i][0];
-    float iy1 = dets[i][1];
-    float ix2 = dets[i][2];
-    float iy2 = dets[i][3];
+    float ix1   = dets[i][0];
+    float iy1   = dets[i][1];
+    float ix2   = dets[i][2];
+    float iy2   = dets[i][3];
     float iarea = (*area)[i];
 
     if ((*suppressed)[i] > 0.0f) {
@@ -253,19 +248,19 @@ inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
     }
 
     (*keep)[(*out_size)++] = i;
-    #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (int j = i + 1; j < static_cast<int>(dets.size(0)); ++j) {
       if ((*suppressed)[j] > 0.0f) {
         continue;
       }
-      float xx1 = std::max(ix1, dets[j][0]);
-      float yy1 = std::max(iy1, dets[j][1]);
-      float xx2 = std::min(ix2, dets[j][2]);
-      float yy2 = std::min(iy2, dets[j][3]);
-      float w = std::max(0.0f, xx2 - xx1 + 1.0f);
-      float h = std::max(0.0f, yy2 - yy1 + 1.0f);
+      float xx1   = std::max(ix1, dets[j][0]);
+      float yy1   = std::max(iy1, dets[j][1]);
+      float xx2   = std::min(ix2, dets[j][2]);
+      float yy2   = std::min(iy2, dets[j][3]);
+      float w     = std::max(0.0f, xx2 - xx1 + 1.0f);
+      float h     = std::max(0.0f, yy2 - yy1 + 1.0f);
       float inter = w * h;
-      float ovr = inter / (iarea + (*area)[j] - inter);
+      float ovr   = inter / (iarea + (*area)[j] - inter);
       if (ovr > thresh) {
         (*suppressed)[j] = 1.0f;
       }
@@ -277,23 +272,21 @@ inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
 }  // namespace op
 }  // namespace mxnet
 
-
-
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
-class MultiProposalOp : public Operator{
+template <typename xpu>
+class MultiProposalOp : public Operator {
  public:
   explicit MultiProposalOp(MultiProposalParam param) {
     this->param_ = param;
   }
 
-  void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_states) override {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_states) override {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 3);
@@ -301,34 +294,33 @@ class MultiProposalOp : public Operator{
     CHECK_GT(req.size(), 1);
     CHECK_EQ(req[proposal::kOut], kWriteTo);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    Tensor<cpu, 4> scores = in_data[proposal::kClsProb].get<cpu, 4, real_t>(s);
+    Tensor<cpu, 4> scores      = in_data[proposal::kClsProb].get<cpu, 4, real_t>(s);
     Tensor<cpu, 4> bbox_deltas = in_data[proposal::kBBoxPred].get<cpu, 4, real_t>(s);
-    Tensor<cpu, 2> im_info = in_data[proposal::kImInfo].get<cpu, 2, real_t>(s);
+    Tensor<cpu, 2> im_info     = in_data[proposal::kImInfo].get<cpu, 2, real_t>(s);
 
-    Tensor<cpu, 2> out = out_data[proposal::kOut].get<cpu, 2, real_t>(s);
+    Tensor<cpu, 2> out       = out_data[proposal::kOut].get<cpu, 2, real_t>(s);
     Tensor<cpu, 2> out_score = out_data[proposal::kScore].get<cpu, 2, real_t>(s);
 
-    int num_images = scores.size(0);
-    int num_anchors = scores.size(1) / 2;
-    int height = scores.size(2);
-    int width = scores.size(3);
+    int num_images    = scores.size(0);
+    int num_anchors   = scores.size(1) / 2;
+    int height        = scores.size(2);
+    int width         = scores.size(3);
     int count_anchors = num_anchors * height * width;
     int rpn_pre_nms_top_n =
         (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n : count_anchors;
-    rpn_pre_nms_top_n = std::min(rpn_pre_nms_top_n, count_anchors);
+    rpn_pre_nms_top_n      = std::min(rpn_pre_nms_top_n, count_anchors);
     int rpn_post_nms_top_n = std::min(param_.rpn_post_nms_top_n, rpn_pre_nms_top_n);
 
-    int workspace_size =
-        num_images * (count_anchors * 5 + 2 * count_anchors +
-        rpn_pre_nms_top_n * 5 + 3 * rpn_pre_nms_top_n);
+    int workspace_size = num_images * (count_anchors * 5 + 2 * count_anchors +
+                                       rpn_pre_nms_top_n * 5 + 3 * rpn_pre_nms_top_n);
 
-    Tensor<cpu, 1> workspace = ctx.requested[proposal::kTempResource].get_space<cpu>(
-      Shape1(workspace_size), s);
+    Tensor<cpu, 1> workspace =
+        ctx.requested[proposal::kTempResource].get_space<cpu>(Shape1(workspace_size), s);
     int start = 0;
-    Tensor<cpu, 3> workspace_proposals(workspace.dptr_ +
-            start, Shape3(num_images, count_anchors, 5));
+    Tensor<cpu, 3> workspace_proposals(workspace.dptr_ + start,
+                                       Shape3(num_images, count_anchors, 5));
     start += num_images * count_anchors * 5;
     Tensor<cpu, 3> workspace_pre_nms(workspace.dptr_ + start, Shape3(num_images, 2, count_anchors));
     start += num_images * 2 * count_anchors;
@@ -347,86 +339,83 @@ class MultiProposalOp : public Operator{
     base_anchor[3] = param_.feature_stride - 1.0;
     CHECK_EQ(num_anchors, param_.ratios.ndim() * param_.scales.ndim());
     std::vector<float> anchors;
-    utils::GenerateAnchors(base_anchor,
-                           param_.ratios,
-                           param_.scales,
-                           &anchors);
+    utils::GenerateAnchors(base_anchor, param_.ratios, param_.scales, &anchors);
     std::memcpy(workspace_proposals.dptr_, &anchors[0], sizeof(float) * anchors.size());
 
     Tensor<cpu, 2> workspace_proposals0 = workspace_proposals[0];
-    // Enumerate all shifted anchors
-    #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+// Enumerate all shifted anchors
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (int index = 0; index < num_anchors * height * width; ++index) {
       // index_t index = j * (width * num_anchors) + k * (num_anchors) + i;
-      int i = index % num_anchors;
-      int k = (index / num_anchors) % width;
-      int j = index / (width * num_anchors);
-      workspace_proposals0[index][0] =
-          workspace_proposals0[i][0] + k * param_.feature_stride;
-      workspace_proposals0[index][1] =
-          workspace_proposals0[i][1] + j * param_.feature_stride;
-      workspace_proposals0[index][2] =
-          workspace_proposals0[i][2] + k * param_.feature_stride;
-      workspace_proposals0[index][3] =
-          workspace_proposals0[i][3] + j * param_.feature_stride;
+      int i                          = index % num_anchors;
+      int k                          = (index / num_anchors) % width;
+      int j                          = index / (width * num_anchors);
+      workspace_proposals0[index][0] = workspace_proposals0[i][0] + k * param_.feature_stride;
+      workspace_proposals0[index][1] = workspace_proposals0[i][1] + j * param_.feature_stride;
+      workspace_proposals0[index][2] = workspace_proposals0[i][2] + k * param_.feature_stride;
+      workspace_proposals0[index][3] = workspace_proposals0[i][3] + j * param_.feature_stride;
       workspace_proposals0[index][4] = scores[0][i + num_anchors][j][k];
     }
 
-    // Copy shifted anchors to other images
-    #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+// Copy shifted anchors to other images
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (int t = count_anchors; t < num_images * count_anchors; ++t) {
-        int b = t / count_anchors;
-        int index = t % count_anchors;
-        int i = index % num_anchors;
-        int k = (index / num_anchors) % width;
-        int j = index / (width * num_anchors);
-        for (int w = 0; w < 4; ++w) {
-            workspace_proposals[b][index][w] = workspace_proposals[0][index][w];
-        }
-        workspace_proposals[b][index][4] = scores[b][i + num_anchors][j][k];
+      int b     = t / count_anchors;
+      int index = t % count_anchors;
+      int i     = index % num_anchors;
+      int k     = (index / num_anchors) % width;
+      int j     = index / (width * num_anchors);
+      for (int w = 0; w < 4; ++w) {
+        workspace_proposals[b][index][w] = workspace_proposals[0][index][w];
+      }
+      workspace_proposals[b][index][4] = scores[b][i + num_anchors][j][k];
     }
 
-    // Assign Foreground Scores for each anchor
-    #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+// Assign Foreground Scores for each anchor
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (int b = 0; b < num_images; ++b) {
       // prevent padded predictions
       int real_height = static_cast<int>(im_info[b][0] / param_.feature_stride);
-      int real_width = static_cast<int>(im_info[b][1] / param_.feature_stride);
+      int real_width  = static_cast<int>(im_info[b][1] / param_.feature_stride);
       CHECK_GE(height, real_height) << height << " " << real_height << std::endl;
       CHECK_GE(width, real_width) << width << " " << real_width << std::endl;
 
-      Tensor<cpu, 2> workspace_proposals_i = workspace_proposals[b];
-      Tensor<cpu, 2> workspace_pre_nms_i = workspace_pre_nms[b];
-      Tensor<cpu, 2> workspace_ordered_proposals_i =
-                       workspace_ordered_proposals[b];
-      Tensor<cpu, 2> workspace_nms_i = workspace_nms[b];
+      Tensor<cpu, 2> workspace_proposals_i         = workspace_proposals[b];
+      Tensor<cpu, 2> workspace_pre_nms_i           = workspace_pre_nms[b];
+      Tensor<cpu, 2> workspace_ordered_proposals_i = workspace_ordered_proposals[b];
+      Tensor<cpu, 2> workspace_nms_i               = workspace_nms[b];
 
       if (param_.iou_loss) {
-        utils::IoUTransformInv(workspace_proposals_i, bbox_deltas[b], im_info[b][0], im_info[b][1],
-                               real_height, real_width, &(workspace_proposals_i));
+        utils::IoUTransformInv(workspace_proposals_i,
+                               bbox_deltas[b],
+                               im_info[b][0],
+                               im_info[b][1],
+                               real_height,
+                               real_width,
+                               &(workspace_proposals_i));
       } else {
-        utils::BBoxTransformInv(workspace_proposals_i, bbox_deltas[b], im_info[b][0], im_info[b][1],
-                                real_height, real_width, &(workspace_proposals_i));
+        utils::BBoxTransformInv(workspace_proposals_i,
+                                bbox_deltas[b],
+                                im_info[b][0],
+                                im_info[b][1],
+                                real_height,
+                                real_width,
+                                &(workspace_proposals_i));
       }
       utils::FilterBox(&workspace_proposals_i, param_.rpn_min_size * im_info[b][2]);
 
       Tensor<cpu, 1> score = workspace_pre_nms_i[0];
       Tensor<cpu, 1> order = workspace_pre_nms_i[1];
 
-      utils::CopyScore(workspace_proposals_i,
-                       &score,
-                       &order);
-      utils::ReverseArgsort(score,
-                            &order);
-      utils::ReorderProposals(workspace_proposals_i,
-                              order,
-                              rpn_pre_nms_top_n,
-                              &workspace_ordered_proposals_i);
-      int out_size = 0;
-      Tensor<cpu, 1> area = workspace_nms_i[0];
+      utils::CopyScore(workspace_proposals_i, &score, &order);
+      utils::ReverseArgsort(score, &order);
+      utils::ReorderProposals(
+          workspace_proposals_i, order, rpn_pre_nms_top_n, &workspace_ordered_proposals_i);
+      int out_size              = 0;
+      Tensor<cpu, 1> area       = workspace_nms_i[0];
       Tensor<cpu, 1> suppressed = workspace_nms_i[1];
-      Tensor<cpu, 1> keep = workspace_nms_i[2];
-      suppressed = 0;  // surprised!
+      Tensor<cpu, 1> keep       = workspace_nms_i[2];
+      suppressed                = 0;  // surprised!
 
       utils::NonMaximumSuppression(workspace_ordered_proposals_i,
                                    param_.threshold,
@@ -436,15 +425,15 @@ class MultiProposalOp : public Operator{
                                    &keep,
                                    &out_size);
 
-      // fill in output rois and output scores
-      #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+// fill in output rois and output scores
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
       for (int i = 0; i < param_.rpn_post_nms_top_n; ++i) {
-        int out_index = b * param_.rpn_post_nms_top_n + i;
+        int out_index     = b * param_.rpn_post_nms_top_n + i;
         out[out_index][0] = b;
         if (i < out_size) {
           index_t index = keep[i];
           for (index_t j = 0; j < 4; ++j) {
-            out[out_index][j + 1] =  workspace_ordered_proposals_i[index][j];
+            out[out_index][j + 1] = workspace_ordered_proposals_i[index][j];
           }
           out_score[out_index][0] = workspace_ordered_proposals_i[index][4];
         } else {
@@ -458,21 +447,21 @@ class MultiProposalOp : public Operator{
     }
   }
 
-  void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) override {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad,
+                const std::vector<TBlob>& aux_states) override {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_grad.size(), 3);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s         = ctx.get_stream<xpu>();
     Tensor<xpu, 4> gscores = in_grad[proposal::kClsProb].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 4> gbbox = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 2> ginfo = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 4> gbbox   = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
+    Tensor<xpu, 2> ginfo   = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
 
     // can not assume the grad would be zero
     Assign(gscores, req[proposal::kClsProb], 0);
@@ -484,8 +473,8 @@ class MultiProposalOp : public Operator{
   MultiProposalParam param_;
 };  // class MultiProposalOp
 
-template<>
-Operator *CreateOp<cpu>(MultiProposalParam param) {
+template <>
+Operator* CreateOp<cpu>(MultiProposalParam param) {
   return new MultiProposalOp<cpu>(param);
 }
 
@@ -496,11 +485,13 @@ Operator* MultiProposalProp::CreateOperator(Context ctx) const {
 DMLC_REGISTER_PARAMETER(MultiProposalParam);
 
 MXNET_REGISTER_OP_PROPERTY(_contrib_MultiProposal, MultiProposalProp)
-.describe("Generate region proposals via RPN")
-.add_argument("cls_prob", "NDArray-or-Symbol", "Score of how likely proposal is object.")
-.add_argument("bbox_pred", "NDArray-or-Symbol", "BBox Predicted deltas from anchors for proposals")
-.add_argument("im_info", "NDArray-or-Symbol", "Image size and scale.")
-.add_arguments(MultiProposalParam::__FIELDS__());
+    .describe("Generate region proposals via RPN")
+    .add_argument("cls_prob", "NDArray-or-Symbol", "Score of how likely proposal is object.")
+    .add_argument("bbox_pred",
+                  "NDArray-or-Symbol",
+                  "BBox Predicted deltas from anchors for proposals")
+    .add_argument("im_info", "NDArray-or-Symbol", "Image size and scale.")
+    .add_arguments(MultiProposalParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multi_proposal.cu b/src/operator/contrib/multi_proposal.cu
index a3f7d405e452..cfa96bc622a7 100644
--- a/src/operator/contrib/multi_proposal.cu
+++ b/src/operator/contrib/multi_proposal.cu
@@ -24,7 +24,7 @@
  * \file multi_proposal.cu
  * \brief MultiProposal Operator
  * \author Shaoqing Ren, Xizhou Zhu, Jian Guo
-*/
+ */
 #include <dmlc/logging.h>
 #include <dmlc/parameter.h>
 #include <mxnet/operator.h>
@@ -47,12 +47,12 @@
 
 #define DIVUP(m, n) ((m) / (n) + ((m) % (n) > 0))
 
-#define FRCNN_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define FRCNN_CUDA_CHECK(condition)                                   \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
-} while (0)
+  } while (0)
 
 namespace mshadow {
 namespace cuda {
@@ -62,7 +62,7 @@ namespace multi_proposal {
 // workspace_proposals are (b, h * w * anchor, 5)
 // w defines "x" and h defines "y"
 // count should be total anchors numbers, h * w * anchors
-template<typename Dtype>
+template <typename Dtype>
 __global__ void ProposalGridKernel(const int count,
                                    const int num_anchors,
                                    const int height,
@@ -70,8 +70,7 @@ __global__ void ProposalGridKernel(const int count,
                                    const int feature_stride,
                                    const Dtype* scores,
                                    Dtype* workspace_proposals) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     int a = index % num_anchors;
     int w = (index / num_anchors) % width;
@@ -92,7 +91,7 @@ __global__ void ProposalGridKernel(const int count,
 // out_pred_boxes are (b, h * w * anchor, 5)
 // count should be total anchors numbers, b * h * w * anchors
 // in-place write: boxes and out_pred_boxes are the same location
-template<typename Dtype>
+template <typename Dtype>
 __global__ void BBoxPredKernel(const int count,
                                const int num_anchors,
                                const int feat_height,
@@ -102,8 +101,7 @@ __global__ void BBoxPredKernel(const int count,
                                const Dtype* boxes,
                                const Dtype* deltas,
                                Dtype* out_pred_boxes) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     int a = index % num_anchors;
     int w = (index / num_anchors) % feat_width;
@@ -111,16 +109,16 @@ __global__ void BBoxPredKernel(const int count,
     int b = index / num_anchors / feat_width / feat_height;
 
     float im_height = im_infos[b * 3];
-    float im_width = im_infos[b * 3 + 1];
+    float im_width  = im_infos[b * 3 + 1];
     int real_height = static_cast<int>(im_height / feature_stride);
-    int real_width = static_cast<int>(im_width / feature_stride);
+    int real_width  = static_cast<int>(im_width / feature_stride);
 
-    float width = boxes[index * 5 + 2] - boxes[index * 5 + 0] + 1.0f;
+    float width  = boxes[index * 5 + 2] - boxes[index * 5 + 0] + 1.0f;
     float height = boxes[index * 5 + 3] - boxes[index * 5 + 1] + 1.0f;
-    float ctr_x = boxes[index * 5 + 0] + 0.5f * (width - 1.0f);
-    float ctr_y = boxes[index * 5 + 1] + 0.5f * (height - 1.0f);
+    float ctr_x  = boxes[index * 5 + 0] + 0.5f * (width - 1.0f);
+    float ctr_y  = boxes[index * 5 + 1] + 0.5f * (height - 1.0f);
 
-    int ba = (b * num_anchors + a);
+    int ba   = (b * num_anchors + a);
     float dx = deltas[((ba * 4) * feat_height + h) * feat_width + w];
     float dy = deltas[((ba * 4 + 1) * feat_height + h) * feat_width + w];
     float dw = deltas[((ba * 4 + 2) * feat_height + h) * feat_width + w];
@@ -128,8 +126,8 @@ __global__ void BBoxPredKernel(const int count,
 
     float pred_ctr_x = dx * width + ctr_x;
     float pred_ctr_y = dy * height + ctr_y;
-    float pred_w = exp(dw) * width;
-    float pred_h = exp(dh) * height;
+    float pred_w     = exp(dw) * width;
+    float pred_h     = exp(dh) * height;
 
     float pred_x1 = pred_ctr_x - 0.5f * (pred_w - 1.0f);
     float pred_y1 = pred_ctr_y - 0.5f * (pred_h - 1.0f);
@@ -157,7 +155,7 @@ __global__ void BBoxPredKernel(const int count,
 // out_pred_boxes are (b, h * w * anchor, 5)
 // count should be total anchors numbers, b * h * w * anchors
 // in-place write: boxes and out_pred_boxes are the same location
-template<typename Dtype>
+template <typename Dtype>
 __global__ void IoUPredKernel(const int count,
                               const int num_anchors,
                               const int feat_height,
@@ -167,8 +165,7 @@ __global__ void IoUPredKernel(const int count,
                               const Dtype* boxes,
                               const Dtype* deltas,
                               Dtype* out_pred_boxes) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     int a = index % num_anchors;
     int w = (index / num_anchors) % feat_width;
@@ -176,16 +173,16 @@ __global__ void IoUPredKernel(const int count,
     int b = index / num_anchors / feat_width / feat_height;
 
     float im_height = im_infos[b * 3];
-    float im_width = im_infos[b * 3 + 1];
+    float im_width  = im_infos[b * 3 + 1];
     int real_height = static_cast<int>(im_height / feature_stride);
-    int real_width = static_cast<int>(im_width / feature_stride);
+    int real_width  = static_cast<int>(im_width / feature_stride);
 
     float x1 = boxes[index * 5 + 0];
     float y1 = boxes[index * 5 + 1];
     float x2 = boxes[index * 5 + 2];
     float y2 = boxes[index * 5 + 3];
 
-    int ba = (b * num_anchors + a);
+    int ba    = (b * num_anchors + a);
     float dx1 = deltas[((ba * 4) * feat_height + h) * feat_width + w];
     float dy1 = deltas[((ba * 4 + 1) * feat_height + h) * feat_width + w];
     float dx2 = deltas[((ba * 4 + 2) * feat_height + h) * feat_width + w];
@@ -210,18 +207,17 @@ __global__ void IoUPredKernel(const int count,
 // filter box with stride less than rpn_min_size
 // filter: set score to zero
 // dets (b, n, 5)
-template<typename Dtype>
+template <typename Dtype>
 __global__ void FilterBoxKernel(const int count,
                                 const int count_anchors,
                                 const float original_min_size,
                                 const Dtype* im_infos,
                                 Dtype* dets) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
-    int b = index / count_anchors;
-    float iw = dets[index * 5 + 2] - dets[index * 5 + 0] + 1.0f;
-    float ih = dets[index * 5 + 3] - dets[index * 5 + 1] + 1.0f;
+    int b          = index / count_anchors;
+    float iw       = dets[index * 5 + 2] - dets[index * 5 + 0] + 1.0f;
+    float ih       = dets[index * 5 + 3] - dets[index * 5 + 1] + 1.0f;
     float min_size = original_min_size * im_infos[b * 3 + 2];
     if (iw < min_size || ih < min_size) {
       dets[index * 5 + 0] -= min_size / 2;
@@ -236,13 +232,9 @@ __global__ void FilterBoxKernel(const int count,
 // copy score and init order
 // dets (n, 5); score (n, ); order (n, )
 // count should be n (total anchors or proposals)
-template<typename Dtype>
-__global__ void CopyScoreKernel(const int count,
-                                const Dtype* dets,
-                                Dtype* score,
-                                int* order) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+template <typename Dtype>
+__global__ void CopyScoreKernel(const int count, const Dtype* dets, Dtype* score, int* order) {
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     score[index] = dets[index * 5 + 4];
     order[index] = index;
@@ -252,43 +244,42 @@ __global__ void CopyScoreKernel(const int count,
 // reorder proposals according to order and keep the top_n proposals
 // prev_dets (n, 5); order (n, ); dets (n, 5)
 // count should be output anchor numbers (top_n)
-template<typename Dtype>
+template <typename Dtype>
 __global__ void ReorderProposalsKernel(const int count,
                                        const Dtype* prev_dets,
                                        const int* order,
                                        Dtype* dets) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     const int order_i = order[index];
-    for (int j = 0; j < 5; j ++) {
+    for (int j = 0; j < 5; j++) {
       dets[index * 5 + j] = prev_dets[order_i * 5 + j];
     }
   }
 }
 
-__device__ inline float devIoU(float const * const a, float const * const b) {
+__device__ inline float devIoU(float const* const a, float const* const b) {
   float left = max(a[0], b[0]), right = min(a[2], b[2]);
   float top = max(a[1], b[1]), bottom = min(a[3], b[3]);
   float width = max(right - left + 1, 0.f), height = max(bottom - top + 1, 0.f);
   float interS = width * height;
-  float Sa = (a[2] - a[0] + 1) * (a[3] - a[1] + 1);
-  float Sb = (b[2] - b[0] + 1) * (b[3] - b[1] + 1);
+  float Sa     = (a[2] - a[0] + 1) * (a[3] - a[1] + 1);
+  float Sb     = (b[2] - b[0] + 1) * (b[3] - b[1] + 1);
   return interS / (Sa + Sb - interS);
 }
 
-__global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh,
-                           const float *dev_boxes, uint64_t *dev_mask) {
+__global__ void nms_kernel(const int n_boxes,
+                           const float nms_overlap_thresh,
+                           const float* dev_boxes,
+                           uint64_t* dev_mask) {
   const int threadsPerBlock = sizeof(uint64_t) * 8;
-  const int row_start = blockIdx.y;
-  const int col_start = blockIdx.x;
+  const int row_start       = blockIdx.y;
+  const int col_start       = blockIdx.x;
 
   // if (row_start > col_start) return;
 
-  const int row_size =
-        min(n_boxes - row_start * threadsPerBlock, threadsPerBlock);
-  const int col_size =
-        min(n_boxes - col_start * threadsPerBlock, threadsPerBlock);
+  const int row_size = min(n_boxes - row_start * threadsPerBlock, threadsPerBlock);
+  const int col_size = min(n_boxes - col_start * threadsPerBlock, threadsPerBlock);
 
   __shared__ float block_boxes[threadsPerBlock * 5];
   if (threadIdx.x < col_size) {
@@ -307,10 +298,10 @@ __global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh,
 
   if (threadIdx.x < row_size) {
     const int cur_box_idx = threadsPerBlock * row_start + threadIdx.x;
-    const float *cur_box = dev_boxes + cur_box_idx * 5;
-    int i = 0;
-    uint64_t t = 0;
-    int start = 0;
+    const float* cur_box  = dev_boxes + cur_box_idx * 5;
+    int i                 = 0;
+    uint64_t t            = 0;
+    int start             = 0;
     if (row_start == col_start) {
       start = threadIdx.x + 1;
     }
@@ -319,35 +310,30 @@ __global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh,
         t |= 1ULL << i;
       }
     }
-    const int col_blocks = DIVUP(n_boxes, threadsPerBlock);
+    const int col_blocks                           = DIVUP(n_boxes, threadsPerBlock);
     dev_mask[cur_box_idx * col_blocks + col_start] = t;
   }
 }
 
-void _nms(mshadow::Stream<gpu> *s,
+void _nms(mshadow::Stream<gpu>* s,
           const mshadow::Tensor<gpu, 2>& boxes,
           const float nms_overlap_thresh,
           const int rpn_post_nms_top_n,
-          int *keep,
-          int *num_out) {
+          int* keep,
+          int* num_out) {
   const int threadsPerBlock = sizeof(uint64_t) * 8;
-  const int boxes_num = boxes.size(0);
-  const int boxes_dim = boxes.size(1);
+  const int boxes_num       = boxes.size(0);
+  const int boxes_dim       = boxes.size(1);
 
-  float* boxes_dev = boxes.dptr_;
+  float* boxes_dev   = boxes.dptr_;
   uint64_t* mask_dev = nullptr;
 
   const int col_blocks = DIVUP(boxes_num, threadsPerBlock);
-  FRCNN_CUDA_CHECK(cudaMalloc(&mask_dev,
-                              boxes_num * col_blocks * sizeof(uint64_t)));
+  FRCNN_CUDA_CHECK(cudaMalloc(&mask_dev, boxes_num * col_blocks * sizeof(uint64_t)));
 
-  dim3 blocks(DIVUP(boxes_num, threadsPerBlock),
-              DIVUP(boxes_num, threadsPerBlock));
+  dim3 blocks(DIVUP(boxes_num, threadsPerBlock), DIVUP(boxes_num, threadsPerBlock));
   dim3 threads(threadsPerBlock);
-  nms_kernel<<<blocks, threads>>>(boxes_num,
-                                  nms_overlap_thresh,
-                                  boxes_dev,
-                                  mask_dev);
+  nms_kernel<<<blocks, threads>>>(boxes_num, nms_overlap_thresh, boxes_dev, mask_dev);
   FRCNN_CUDA_CHECK(cudaGetLastError());
   std::vector<uint64_t> mask_host(boxes_num * col_blocks);
 
@@ -355,7 +341,8 @@ void _nms(mshadow::Stream<gpu> *s,
   FRCNN_CUDA_CHECK(cudaMemcpyAsync(&mask_host[0],
                                    mask_dev,
                                    sizeof(uint64_t) * boxes_num * col_blocks,
-                                   cudaMemcpyDeviceToHost, stream));
+                                   cudaMemcpyDeviceToHost,
+                                   stream));
   FRCNN_CUDA_CHECK(cudaStreamSynchronize(stream));
 
   std::vector<uint64_t> remv(col_blocks);
@@ -363,13 +350,14 @@ void _nms(mshadow::Stream<gpu> *s,
 
   int num_to_keep = 0;
   for (int i = 0; i < boxes_num; i++) {
-    int nblock = i / threadsPerBlock;
+    int nblock  = i / threadsPerBlock;
     int inblock = i % threadsPerBlock;
 
     if (!(remv[nblock] & (1ULL << inblock))) {
       keep[num_to_keep++] = i;
-      if (num_to_keep >= rpn_post_nms_top_n) break;
-      uint64_t *p = &mask_host[0] + i * col_blocks;
+      if (num_to_keep >= rpn_post_nms_top_n)
+        break;
+      uint64_t* p = &mask_host[0] + i * col_blocks;
       for (int j = nblock; j < col_blocks; j++) {
         remv[j] |= p[j];
       }
@@ -383,7 +371,7 @@ void _nms(mshadow::Stream<gpu> *s,
 // copy proposals to output
 // dets (top_n, 5); keep (top_n, ); out (top_n, )
 // count should be top_n (total anchors or proposals)
-template<typename Dtype>
+template <typename Dtype>
 __global__ void PrepareOutput(const int count,
                               const Dtype* dets,
                               const int* keep,
@@ -391,8 +379,7 @@ __global__ void PrepareOutput(const int count,
                               const int image_index,
                               Dtype* out,
                               Dtype* score) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     out[index * 5] = image_index;
     if (index < out_size) {
@@ -417,18 +404,18 @@ __global__ void PrepareOutput(const int count,
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
-class MultiProposalGPUOp : public Operator{
+template <typename xpu>
+class MultiProposalGPUOp : public Operator {
  public:
   explicit MultiProposalGPUOp(MultiProposalParam param) {
     this->param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_states) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     using namespace mshadow::cuda;
@@ -440,25 +427,25 @@ class MultiProposalGPUOp : public Operator{
     /*CHECK_EQ(in_data[proposal::kClsProb].shape_[0], 1)
       << "Sorry, multiple images each device is not implemented.";*/
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    Tensor<xpu, 4> scores = in_data[proposal::kClsProb].get<xpu, 4, real_t>(s);
+    Tensor<xpu, 4> scores      = in_data[proposal::kClsProb].get<xpu, 4, real_t>(s);
     Tensor<xpu, 4> bbox_deltas = in_data[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 2> im_info = in_data[proposal::kImInfo].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 2> im_info     = in_data[proposal::kImInfo].get<xpu, 2, real_t>(s);
 
-    Tensor<xpu, 2> out = out_data[proposal::kOut].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 2> out       = out_data[proposal::kOut].get<xpu, 2, real_t>(s);
     Tensor<xpu, 2> out_score = out_data[proposal::kScore].get<xpu, 2, real_t>(s);
 
-    int num_images = scores.size(0);
-    int num_anchors = scores.size(1) / 2;
-    int height = scores.size(2);
-    int width = scores.size(3);
+    int num_images    = scores.size(0);
+    int num_anchors   = scores.size(1) / 2;
+    int height        = scores.size(2);
+    int width         = scores.size(3);
     int count_anchors = num_anchors * height * width;  // count of total anchors
-    int count = num_images * count_anchors;
+    int count         = num_images * count_anchors;
     // set to -1 for max
-    int rpn_pre_nms_top_n = (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n
-                                                           : count_anchors;
-    rpn_pre_nms_top_n = std::min(rpn_pre_nms_top_n, count_anchors);
+    int rpn_pre_nms_top_n =
+        (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n : count_anchors;
+    rpn_pre_nms_top_n      = std::min(rpn_pre_nms_top_n, count_anchors);
     int rpn_post_nms_top_n = std::min(param_.rpn_post_nms_top_n, rpn_pre_nms_top_n);
 
     // Generate first anchors based on base anchor
@@ -469,55 +456,68 @@ class MultiProposalGPUOp : public Operator{
     base_anchor[3] = param_.feature_stride - 1.0;
     CHECK_EQ(num_anchors, param_.ratios.ndim() * param_.scales.ndim());
     std::vector<float> anchors;
-    utils::GenerateAnchors(base_anchor,
-                           param_.ratios,
-                           param_.scales,
-                           &anchors);
+    utils::GenerateAnchors(base_anchor, param_.ratios, param_.scales, &anchors);
 
     // Copy generated anchors to GPU
     float* workspace_proposals_ptr = nullptr;
-    FRCNN_CUDA_CHECK(cudaMalloc(&workspace_proposals_ptr,
-                                sizeof(float) * num_images * count_anchors * 5));
+    FRCNN_CUDA_CHECK(
+        cudaMalloc(&workspace_proposals_ptr, sizeof(float) * num_images * count_anchors * 5));
     Tensor<xpu, 3> workspace_proposals(workspace_proposals_ptr,
                                        Shape3(num_images, count_anchors, 5));
 
     cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
 
-    FRCNN_CUDA_CHECK(cudaMemcpyAsync(workspace_proposals.dptr_, &anchors[0],
+    FRCNN_CUDA_CHECK(cudaMemcpyAsync(workspace_proposals.dptr_,
+                                     &anchors[0],
                                      sizeof(float) * anchors.size(),
-                                     cudaMemcpyHostToDevice, stream));
+                                     cudaMemcpyHostToDevice,
+                                     stream));
 
     // Copy proposals to a mesh grid
     dim3 dimGrid((count + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock);
     dim3 dimBlock(kMaxThreadsPerBlock);
     CheckLaunchParam(dimGrid, dimBlock, "ProposalGrid");
-    ProposalGridKernel<<<dimGrid, dimBlock>>>(
-      count, num_anchors, height, width, param_.feature_stride,
-      scores.dptr_, workspace_proposals.dptr_);
+    ProposalGridKernel<<<dimGrid, dimBlock>>>(count,
+                                              num_anchors,
+                                              height,
+                                              width,
+                                              param_.feature_stride,
+                                              scores.dptr_,
+                                              workspace_proposals.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // Transform anchors and bbox_deltas into bboxes
     CheckLaunchParam(dimGrid, dimBlock, "BBoxPred");
     if (param_.iou_loss) {
-      IoUPredKernel<<<dimGrid, dimBlock>>>(
-        count, num_anchors, height, width, param_.feature_stride, im_info.dptr_,
-        workspace_proposals.dptr_, bbox_deltas.dptr_, workspace_proposals.dptr_);
+      IoUPredKernel<<<dimGrid, dimBlock>>>(count,
+                                           num_anchors,
+                                           height,
+                                           width,
+                                           param_.feature_stride,
+                                           im_info.dptr_,
+                                           workspace_proposals.dptr_,
+                                           bbox_deltas.dptr_,
+                                           workspace_proposals.dptr_);
     } else {
-      BBoxPredKernel<<<dimGrid, dimBlock>>>(
-        count, num_anchors, height, width, param_.feature_stride, im_info.dptr_,
-        workspace_proposals.dptr_, bbox_deltas.dptr_, workspace_proposals.dptr_);
+      BBoxPredKernel<<<dimGrid, dimBlock>>>(count,
+                                            num_anchors,
+                                            height,
+                                            width,
+                                            param_.feature_stride,
+                                            im_info.dptr_,
+                                            workspace_proposals.dptr_,
+                                            bbox_deltas.dptr_,
+                                            workspace_proposals.dptr_);
     }
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // filter boxes with less than rpn_min_size
     CheckLaunchParam(dimGrid, dimBlock, "FilterBox");
     FilterBoxKernel<<<dimGrid, dimBlock>>>(
-      count, count_anchors, param_.rpn_min_size, im_info.dptr_, workspace_proposals.dptr_);
+        count, count_anchors, param_.rpn_min_size, im_info.dptr_, workspace_proposals.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
-
-
-    dimGrid = dim3((count_anchors + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock);
+    dimGrid  = dim3((count_anchors + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock);
     dimBlock = dim3(kMaxThreadsPerBlock);
     // Copy score to a continuous memory
     float* score_ptr = nullptr;
@@ -528,58 +528,65 @@ class MultiProposalGPUOp : public Operator{
     Tensor<xpu, 1, int> order(order_ptr, Shape1(count_anchors));
 
     float* workspace_ordered_proposals_ptr = nullptr;
-    FRCNN_CUDA_CHECK(cudaMalloc(&workspace_ordered_proposals_ptr,
-        sizeof(float) * rpn_pre_nms_top_n * 5));
+    FRCNN_CUDA_CHECK(
+        cudaMalloc(&workspace_ordered_proposals_ptr, sizeof(float) * rpn_pre_nms_top_n * 5));
     Tensor<xpu, 2> workspace_ordered_proposals(workspace_ordered_proposals_ptr,
-        Shape2(rpn_pre_nms_top_n, 5));
+                                               Shape2(rpn_pre_nms_top_n, 5));
 
     int* keep;
     FRCNN_CUDA_CHECK(cudaMalloc(&keep, sizeof(int) * rpn_pre_nms_top_n));
 
     for (int b = 0; b < num_images; b++) {
       CheckLaunchParam(dimGrid, dimBlock, "CopyScore");
-      CopyScoreKernel << <dimGrid, dimBlock >> >(
-          count_anchors, workspace_proposals.dptr_ + b * count_anchors * 5,
-          score.dptr_, order.dptr_);
+      CopyScoreKernel<<<dimGrid, dimBlock>>>(count_anchors,
+                                             workspace_proposals.dptr_ + b * count_anchors * 5,
+                                             score.dptr_,
+                                             order.dptr_);
       FRCNN_CUDA_CHECK(cudaGetLastError());
 
       // argsort score, save order
       thrust::stable_sort_by_key(thrust::device,
-          score.dptr_,
-          score.dptr_ + score.size(0),
-          order.dptr_,
-          thrust::greater<real_t>());
+                                 score.dptr_,
+                                 score.dptr_ + score.size(0),
+                                 order.dptr_,
+                                 thrust::greater<real_t>());
       FRCNN_CUDA_CHECK(cudaGetLastError());
 
       // Reorder proposals according to order
 
       dimGrid.x = (rpn_pre_nms_top_n + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
       CheckLaunchParam(dimGrid, dimBlock, "ReorderProposals");
-      ReorderProposalsKernel << <dimGrid, dimBlock >> >(
-          rpn_pre_nms_top_n, workspace_proposals.dptr_ + b * count_anchors * 5,
-          order.dptr_, workspace_ordered_proposals.dptr_);
+      ReorderProposalsKernel<<<dimGrid, dimBlock>>>(
+          rpn_pre_nms_top_n,
+          workspace_proposals.dptr_ + b * count_anchors * 5,
+          order.dptr_,
+          workspace_ordered_proposals.dptr_);
       FRCNN_CUDA_CHECK(cudaGetLastError());
 
       // perform nms
       std::vector<int> _keep(workspace_ordered_proposals.size(0));
       int out_size = 0;
-      _nms(s, workspace_ordered_proposals,
+      _nms(s,
+           workspace_ordered_proposals,
            param_.threshold,
            rpn_post_nms_top_n,
            &_keep[0],
            &out_size);
 
       // copy nms result to gpu
-      FRCNN_CUDA_CHECK(cudaMemcpyAsync(keep, &_keep[0], sizeof(int) * _keep.size(),
-                                       cudaMemcpyHostToDevice, stream));
+      FRCNN_CUDA_CHECK(cudaMemcpyAsync(
+          keep, &_keep[0], sizeof(int) * _keep.size(), cudaMemcpyHostToDevice, stream));
 
       // copy results after nms
       dimGrid.x = (param_.rpn_post_nms_top_n + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
       CheckLaunchParam(dimGrid, dimBlock, "PrepareOutput");
-      PrepareOutput << <dimGrid, dimBlock >> >(
-          param_.rpn_post_nms_top_n, workspace_ordered_proposals.dptr_, keep, out_size, b,
-          out.dptr_ + b * param_.rpn_post_nms_top_n * 5,
-          out_score.dptr_ + b * param_.rpn_post_nms_top_n);
+      PrepareOutput<<<dimGrid, dimBlock>>>(param_.rpn_post_nms_top_n,
+                                           workspace_ordered_proposals.dptr_,
+                                           keep,
+                                           out_size,
+                                           b,
+                                           out.dptr_ + b * param_.rpn_post_nms_top_n * 5,
+                                           out_score.dptr_ + b * param_.rpn_post_nms_top_n);
       FRCNN_CUDA_CHECK(cudaGetLastError());
     }
     // free temporary memory
@@ -590,21 +597,21 @@ class MultiProposalGPUOp : public Operator{
     FRCNN_CUDA_CHECK(cudaFree(order_ptr));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_grad.size(), 3);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s         = ctx.get_stream<xpu>();
     Tensor<xpu, 4> gscores = in_grad[proposal::kClsProb].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 4> gbbox = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 2> ginfo = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 4> gbbox   = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
+    Tensor<xpu, 2> ginfo   = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
 
     // can not assume the grad would be zero
     Assign(gscores, req[proposal::kClsProb], 0);
@@ -616,7 +623,7 @@ class MultiProposalGPUOp : public Operator{
   MultiProposalParam param_;
 };  // class MultiProposalGPUOp
 
-template<>
+template <>
 Operator* CreateOp<gpu>(MultiProposalParam param) {
   return new MultiProposalGPUOp<gpu>(param);
 }
diff --git a/src/operator/contrib/multi_sum_sq-inl.h b/src/operator/contrib/multi_sum_sq-inl.h
index 46031d282d29..bf65be3dbf01 100644
--- a/src/operator/contrib/multi_sum_sq-inl.h
+++ b/src/operator/contrib/multi_sum_sq-inl.h
@@ -24,7 +24,6 @@
  * \author Clement Fuji Tsang, Andrei Ivanov, Moises Hernandez, Shuai Zheng
  */
 
-
 #ifndef MXNET_OPERATOR_CONTRIB_MULTI_SUM_SQ_INL_H_
 #define MXNET_OPERATOR_CONTRIB_MULTI_SUM_SQ_INL_H_
 
@@ -33,7 +32,7 @@
 #include "../operator_common.h"
 
 namespace multi_sum_sq {
-enum MultiSumSqUpdateResource {kTempSpace};
+enum MultiSumSqUpdateResource { kTempSpace };
 }  // namespace multi_sum_sq
 
 namespace mxnet {
@@ -44,18 +43,15 @@ struct MultiSumSqParam : public dmlc::Parameter<MultiSumSqParam> {
   float scale;
 
   DMLC_DECLARE_PARAMETER(MultiSumSqParam) {
-    DMLC_DECLARE_FIELD(num_arrays)
-    .describe("number of input arrays.");
-    DMLC_DECLARE_FIELD(scale)
-    .set_default(1.0f)
-    .describe("Scaling factor for l2 norm");
+    DMLC_DECLARE_FIELD(num_arrays).describe("number of input arrays.");
+    DMLC_DECLARE_FIELD(scale).set_default(1.0f).describe("Scaling factor for l2 norm");
   }
 };
 
 inline bool MultiSumSqShape(const NodeAttrs& attrs,
                             std::vector<mxnet::TShape>* in_shape,
                             std::vector<mxnet::TShape>* out_shape) {
-  const auto &p = dmlc::get<MultiSumSqParam>(attrs.parsed);
+  const auto& p = dmlc::get<MultiSumSqParam>(attrs.parsed);
   out_shape->resize(1);
 
   SHAPE_ASSIGN_CHECK(*out_shape, 0, mxnet::TShape{p.num_arrays});
@@ -87,22 +83,25 @@ inline bool MultiSumSqType(const NodeAttrs& attrs,
   return true;
 }
 
-template<typename xpu>
-size_t GetRequiredStorageMultiSumSq(const std::vector<TBlob> &inputs,
+template <typename xpu>
+size_t GetRequiredStorageMultiSumSq(const std::vector<TBlob>& inputs,
                                     int* param_max_chunks_per_tensor = nullptr);
 
-template<typename xpu>
-void MultiSumSqRun(const std::vector<TBlob> &inputs, int nInputs,
-                   float *out_ptr, const OpContext &ctx, float scale = 1.0f);
+template <typename xpu>
+void MultiSumSqRun(const std::vector<TBlob>& inputs,
+                   int nInputs,
+                   float* out_ptr,
+                   const OpContext& ctx,
+                   float scale = 1.0f);
 
-template<typename xpu>
+template <typename xpu>
 void MultiSumSq(const nnvm::NodeAttrs& attrs,
-                const OpContext &ctx,
-                const std::vector<TBlob> &inputs,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &outputs) {
-  auto s = ctx.get_stream<xpu>();
-  const auto& p = dmlc::get<MultiSumSqParam>(attrs.parsed);
+                const OpContext& ctx,
+                const std::vector<TBlob>& inputs,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& outputs) {
+  auto s         = ctx.get_stream<xpu>();
+  const auto& p  = dmlc::get<MultiSumSqParam>(attrs.parsed);
   float* out_ptr = outputs[0].FlatTo2D<xpu, float>(s).dptr_;
   MultiSumSqRun<xpu>(inputs, p.num_arrays, out_ptr, ctx, p.scale);
 }
diff --git a/src/operator/contrib/multi_sum_sq.cc b/src/operator/contrib/multi_sum_sq.cc
index 71c228572e82..62240e967fb6 100644
--- a/src/operator/contrib/multi_sum_sq.cc
+++ b/src/operator/contrib/multi_sum_sq.cc
@@ -32,53 +32,56 @@ namespace op {
 DMLC_REGISTER_PARAMETER(MultiSumSqParam);
 
 NNVM_REGISTER_OP(multi_sum_sq)
-.describe(R"code(Compute the sums of squares of multiple arrays
+    .describe(R"code(Compute the sums of squares of multiple arrays
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return static_cast<uint32_t>(dmlc::get<MultiSumSqParam>(attrs.parsed).num_arrays);
-  })
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<MultiSumSqParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiSumSqShape)
-.set_attr<nnvm::FInferType>("FInferType", MultiSumSqType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const auto& param = dmlc::get<MultiSumSqParam>(attrs.parsed);
-    const uint32_t num_args = param.num_arrays;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("array_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiSumSq<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("data", "NDArray-or-Symbol[]", "Arrays")
-.add_arguments(MultiSumSqParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      return static_cast<uint32_t>(dmlc::get<MultiSumSqParam>(attrs.parsed).num_arrays);
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<MultiSumSqParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiSumSqShape)
+    .set_attr<nnvm::FInferType>("FInferType", MultiSumSqType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const auto& param = dmlc::get<MultiSumSqParam>(attrs.parsed);
+                                       const uint32_t num_args = param.num_arrays;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("array_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", MultiSumSq<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol[]", "Arrays")
+    .add_arguments(MultiSumSqParam::__FIELDS__());
 
-template<>
-size_t GetRequiredStorageMultiSumSq<cpu>(const std::vector<TBlob> &inputs,
+template <>
+size_t GetRequiredStorageMultiSumSq<cpu>(const std::vector<TBlob>& inputs,
                                          int* param_max_chunks_per_tensor) {
   return 0;
 }
 
-template<typename DType>
-inline void CalcSumSq(const std::vector<TBlob> &inputs, int n_inputs,
-                      float *out_ptr, mshadow::Stream<cpu> *s, float scale) {
+template <typename DType>
+inline void CalcSumSq(const std::vector<TBlob>& inputs,
+                      int n_inputs,
+                      float* out_ptr,
+                      mshadow::Stream<cpu>* s,
+                      float scale) {
   int i;
   size_t j;
 #pragma omp parallel for private(i, j)
   for (i = 0; i < n_inputs; ++i) {  // array index in inputs
-    float sum = 0;
+    float sum          = 0;
     const auto address = inputs[i].FlatTo2D<cpu, DType>(s).dptr_;
-    const auto j_max = inputs[i].shape_.Size();
+    const auto j_max   = inputs[i].shape_.Size();
     for (j = 0; j < j_max; ++j) {
       auto val = static_cast<float>(address[j]);
       if (scale != 1.0f) {
-         val *= scale;
+        val *= scale;
       }
       sum += val * val;
     }
@@ -86,12 +89,16 @@ inline void CalcSumSq(const std::vector<TBlob> &inputs, int n_inputs,
   }
 }
 
-template<>
-void MultiSumSqRun<cpu>(const std::vector<TBlob> &inputs, int n_inputs,
-                        float *out_ptr, const OpContext &ctx, float scale) {
-  MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType,
-    CalcSumSq<DType>(inputs, n_inputs, out_ptr, ctx.get_stream<cpu>(), scale);
-  )
+template <>
+void MultiSumSqRun<cpu>(const std::vector<TBlob>& inputs,
+                        int n_inputs,
+                        float* out_ptr,
+                        const OpContext& ctx,
+                        float scale) {
+  MSHADOW_REAL_TYPE_SWITCH(
+      inputs[0].type_flag_,
+      DType,
+      CalcSumSq<DType>(inputs, n_inputs, out_ptr, ctx.get_stream<cpu>(), scale);)
 }
 
 }  // namespace op
diff --git a/src/operator/contrib/multi_sum_sq.cu b/src/operator/contrib/multi_sum_sq.cu
index 6d14e1926696..695e1341524f 100644
--- a/src/operator/contrib/multi_sum_sq.cu
+++ b/src/operator/contrib/multi_sum_sq.cu
@@ -26,7 +26,7 @@
 #include "./multi_sum_sq-inl.h"
 #include <cub/cub.cuh>
 
-#define ILP 4
+#define ILP         4
 #define BLOCK_LIMIT 320
 #define ARRAY_LIMIT 110
 
@@ -49,10 +49,9 @@ struct MultiSumSqKernelParam {
   int max_chunks_per_tensor = -1;
 };
 
-template<typename DType>
-__device__ __forceinline__ DType ReduceBlockIntoLanes(DType* x,
-                                                      DType val) {
-  int tid = threadIdx.x;
+template <typename DType>
+__device__ __forceinline__ DType ReduceBlockIntoLanes(DType* x, DType val) {
+  int tid        = threadIdx.x;
   int block_size = blockDim.x;
 
   if (block_size >= 64) {
@@ -60,51 +59,49 @@ __device__ __forceinline__ DType ReduceBlockIntoLanes(DType* x,
     __syncthreads();
   }
 
-  #pragma unroll
+#pragma unroll
   for (int i = (block_size >> 1); i >= 64; i >>= 1) {
     if (tid < i)
-      x[tid] = x[tid] + x[tid+i];
+      x[tid] = x[tid] + x[tid + i];
     __syncthreads();
   }
 
   DType final;
   if (tid < 32) {
     if (block_size >= 64)
-      final = x[tid] + x[tid+32];
+      final = x[tid] + x[tid + 32];
     else
       final = val;
 
-    #pragma unroll
+#pragma unroll
     for (int i = 16; i >= 1; i >>= 1)
       final = final + __shfl_down_sync(0xffffffff, final, i);
   }
   return final;
 }
 
-template<typename DType>
+template <typename DType>
 __global__ void MultiSumSqKernel(int chunk_size,
                                  MultiSumSqKernelParam<DType> param,
                                  float* block_reductions,
                                  int start_tensor_id,
                                  float scale) {
   const int tensor_loc = param.block_to_tensor[blockIdx.x];
-  const int chunk_len = param.block_to_chunk[blockIdx.x] * chunk_size;
-  const int n = param.sizes[tensor_loc] - chunk_len;
-  const DType* x = param.addresses[tensor_loc] + chunk_len;
-  const auto i_max = n <= chunk_size ? n : chunk_size;
+  const int chunk_len  = param.block_to_chunk[blockIdx.x] * chunk_size;
+  const int n          = param.sizes[tensor_loc] - chunk_len;
+  const DType* x       = param.addresses[tensor_loc] + chunk_len;
+  const auto i_max     = n <= chunk_size ? n : chunk_size;
   __shared__ float vals[512];
 
   // Non-divergent exit condition for __syncthreads, not necessary here
   float val = 0;
-  for (int i_start = 0;
-       i_start < i_max;
-       i_start += blockDim.x * ILP) {
+  for (int i_start = 0; i_start < i_max; i_start += blockDim.x * ILP) {
     int i = i_start + threadIdx.x;
 #pragma unroll
     for (int ii = 0; ii < ILP && i < i_max; ++ii, i += blockDim.x) {
       auto incoming_val = static_cast<float>(x[i]);
       if (scale != 1.0f) {
-         incoming_val *= scale;
+        incoming_val *= scale;
       }
       val += incoming_val * incoming_val;
     }
@@ -113,17 +110,17 @@ __global__ void MultiSumSqKernel(int chunk_size,
 
   if (threadIdx.x == 0) {
     block_reductions[(start_tensor_id + tensor_loc) * param.max_chunks_per_tensor +
-                    param.block_to_chunk[blockIdx.x]] = final;
+                     param.block_to_chunk[blockIdx.x]] = final;
   }
 }
 
-template<typename DType>
+template <typename DType>
 __global__ void GlobalReductionKernel(MultiSumSqKernelParam<DType> param,
-                                     float* block_reductions,
-                                     float* output) {
+                                      float* block_reductions,
+                                      float* output) {
   __shared__ float vals[512];
   float* reductions_this_tensor = block_reductions + blockIdx.x * param.max_chunks_per_tensor;
-  float val = 0;
+  float val                     = 0;
   for (int i = threadIdx.x; i < param.max_chunks_per_tensor; i += blockDim.x)
     val += reductions_this_tensor[i];
 
@@ -133,8 +130,8 @@ __global__ void GlobalReductionKernel(MultiSumSqKernelParam<DType> param,
     output[blockIdx.x] = final;
 }
 
-template<>
-size_t GetRequiredStorageMultiSumSq<gpu>(const std::vector<TBlob> &inputs,
+template <>
+size_t GetRequiredStorageMultiSumSq<gpu>(const std::vector<TBlob>& inputs,
                                          int* param_max_chunks_per_tensor) {
   // find max num of chunks in tensors
   int max_chunks_per_tensor = -1;
@@ -148,47 +145,48 @@ size_t GetRequiredStorageMultiSumSq<gpu>(const std::vector<TBlob> &inputs,
   return inputs.size() * max_chunks_per_tensor * sizeof(float);
 }
 
-template<>
-void MultiSumSqRun<gpu>(const std::vector<TBlob> &inputs, int n_inputs,
-                        float *out_ptr, const OpContext &ctx, float scale) {
+template <>
+void MultiSumSqRun<gpu>(const std::vector<TBlob>& inputs,
+                        int n_inputs,
+                        float* out_ptr,
+                        const OpContext& ctx,
+                        float scale) {
   const int block_size = 512;
   using namespace mxnet_op;
-  auto s = ctx.get_stream<gpu>();
+  auto s      = ctx.get_stream<gpu>();
   auto stream = mshadow::Stream<gpu>::GetStream(s);
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MultiSumSqKernelParam<DType> param;
-    size_t workspace_size = GetRequiredStorageMultiSumSq<gpu>(inputs,
-                                                              &param.max_chunks_per_tensor);
+    size_t workspace_size = GetRequiredStorageMultiSumSq<gpu>(inputs, &param.max_chunks_per_tensor);
     Tensor<gpu, 1, char> workspace =
-      ctx.requested[multi_sum_sq::kTempSpace].get_space_typed<gpu, 1, char>(
-        Shape1(workspace_size), s);
-    Tensor<gpu, 1, float> block_reductions(reinterpret_cast<float*>(&workspace[0]),
-      Shape1(n_inputs * param.max_chunks_per_tensor), s);
-    CUDA_CALL(cudaMemsetAsync(block_reductions.dptr_, 0,
-                              n_inputs * param.max_chunks_per_tensor* sizeof(float),
-                              stream));
-
-    int loc_block_info = 0;   // position in param.block_to_tensor and param.block_to_chunck
+        ctx.requested[multi_sum_sq::kTempSpace].get_space_typed<gpu, 1, char>(
+            Shape1(workspace_size), s);
+    Tensor<gpu, 1, float> block_reductions(
+        reinterpret_cast<float*>(&workspace[0]), Shape1(n_inputs * param.max_chunks_per_tensor), s);
+    CUDA_CALL(cudaMemsetAsync(
+        block_reductions.dptr_, 0, n_inputs * param.max_chunks_per_tensor * sizeof(float), stream));
+
+    int loc_block_info  = 0;  // position in param.block_to_tensor and param.block_to_chunck
     int loc_tensor_info = 0;  // position in param.sizes and param.addresses
     int start_tensor_id = 0;
     for (int t = 0; t < n_inputs; t++, loc_tensor_info++) {  // array index in inputs
-      param.sizes[loc_tensor_info] = inputs[t].shape_.Size();
+      param.sizes[loc_tensor_info]     = inputs[t].shape_.Size();
       param.addresses[loc_tensor_info] = inputs[t].FlatTo2D<gpu, DType>(s).dptr_;
-      const int chunks_this_tensor = (inputs[t].shape_.Size() - 1) / chunk_size;
+      const int chunks_this_tensor     = (inputs[t].shape_.Size() - 1) / chunk_size;
       for (int chunk = 0; chunk <= chunks_this_tensor; ++chunk) {  // array chunk index
         param.block_to_tensor[loc_block_info] = loc_tensor_info;
-        param.block_to_chunk[loc_block_info] = chunk;
+        param.block_to_chunk[loc_block_info]  = chunk;
         loc_block_info++;
 
         const bool last_curr_chunk = chunk == chunks_this_tensor;
-        const bool tensors_full = last_curr_chunk && loc_tensor_info == (ARRAY_LIMIT-1);
-        const bool blocks_full = (loc_block_info == BLOCK_LIMIT);
-        const bool last_chunk = last_curr_chunk && t == n_inputs - 1;
+        const bool tensors_full    = last_curr_chunk && loc_tensor_info == (ARRAY_LIMIT - 1);
+        const bool blocks_full     = (loc_block_info == BLOCK_LIMIT);
+        const bool last_chunk      = last_curr_chunk && t == n_inputs - 1;
         if (!(tensors_full || blocks_full || last_chunk))
           continue;
-        MultiSumSqKernel<<<loc_block_info, block_size, 0, stream>>>
-          (chunk_size, param, block_reductions.dptr_, start_tensor_id, scale);
+        MultiSumSqKernel<<<loc_block_info, block_size, 0, stream>>>(
+            chunk_size, param, block_reductions.dptr_, start_tensor_id, scale);
         MSHADOW_CUDA_POST_KERNEL_CHECK(MultiSumSqKernel);
 
         loc_block_info = 0;
@@ -196,21 +194,20 @@ void MultiSumSqRun<gpu>(const std::vector<TBlob> &inputs, int n_inputs,
           loc_tensor_info = -1;
           start_tensor_id = t + 1;
         } else {  // if you start from the same tensor
-          param.sizes[0] = param.sizes[loc_tensor_info];
+          param.sizes[0]     = param.sizes[loc_tensor_info];
           param.addresses[0] = param.addresses[loc_tensor_info];
-          loc_tensor_info = 0;
-          start_tensor_id = t;
+          loc_tensor_info    = 0;
+          start_tensor_id    = t;
         }
       }
     }
     // Global reduction
-    GlobalReductionKernel<<<n_inputs, block_size, 0, stream>>>
-      (param, block_reductions.dptr_, out_ptr);
+    GlobalReductionKernel<<<n_inputs, block_size, 0, stream>>>(
+        param, block_reductions.dptr_, out_ptr);
   });
 }
 
-NNVM_REGISTER_OP(multi_sum_sq)
-.set_attr<FCompute>("FCompute<gpu>", MultiSumSq<gpu>);
+NNVM_REGISTER_OP(multi_sum_sq).set_attr<FCompute>("FCompute<gpu>", MultiSumSq<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multibox_detection-inl.h b/src/operator/contrib/multibox_detection-inl.h
index cf42cdc262c6..f05cb3cf9554 100644
--- a/src/operator/contrib/multibox_detection-inl.h
+++ b/src/operator/contrib/multibox_detection-inl.h
@@ -22,7 +22,7 @@
  * \file multibox_detection-inl.h
  * \brief post-process multibox detection predictions
  * \author Joshua Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_MULTIBOX_DETECTION_INL_H_
 #define MXNET_OPERATOR_CONTRIB_MULTIBOX_DETECTION_INL_H_
 #include <dmlc/logging.h>
@@ -39,9 +39,9 @@
 namespace mxnet {
 namespace op {
 namespace mboxdet_enum {
-enum MultiBoxDetectionOpInputs {kClsProb, kLocPred, kAnchor};
-enum MultiBoxDetectionOpOutputs {kOut};
-enum MultiBoxDetectionOpResource {kTempSpace};
+enum MultiBoxDetectionOpInputs { kClsProb, kLocPred, kAnchor };
+enum MultiBoxDetectionOpOutputs { kOut };
+enum MultiBoxDetectionOpResource { kTempSpace };
 }  // namespace mboxdet_enum
 
 struct MultiBoxDetectionParam : public dmlc::Parameter<MultiBoxDetectionParam> {
@@ -54,82 +54,88 @@ struct MultiBoxDetectionParam : public dmlc::Parameter<MultiBoxDetectionParam> {
   int nms_topk;
   mxnet::Tuple<float> variances;
   DMLC_DECLARE_PARAMETER(MultiBoxDetectionParam) {
-    DMLC_DECLARE_FIELD(clip).set_default(true)
-    .describe("Clip out-of-boundary boxes.");
-    DMLC_DECLARE_FIELD(threshold).set_default(0.01f)
-    .describe("Threshold to be a positive prediction.");
-    DMLC_DECLARE_FIELD(background_id).set_default(0)
-    .describe("Background id.");
-    DMLC_DECLARE_FIELD(nms_threshold).set_default(0.5f)
-    .describe("Non-maximum suppression threshold.");
-    DMLC_DECLARE_FIELD(force_suppress).set_default(false)
-    .describe("Suppress all detections regardless of class_id.");
-    DMLC_DECLARE_FIELD(variances).set_default({0.1f, 0.1f, 0.2f, 0.2f})
-    .describe("Variances to be decoded from box regression output.");
-    DMLC_DECLARE_FIELD(nms_topk).set_default(-1)
-    .describe("Keep maximum top k detections before nms, -1 for no limit.");
+    DMLC_DECLARE_FIELD(clip).set_default(true).describe("Clip out-of-boundary boxes.");
+    DMLC_DECLARE_FIELD(threshold).set_default(0.01f).describe(
+        "Threshold to be a positive prediction.");
+    DMLC_DECLARE_FIELD(background_id).set_default(0).describe("Background id.");
+    DMLC_DECLARE_FIELD(nms_threshold)
+        .set_default(0.5f)
+        .describe("Non-maximum suppression threshold.");
+    DMLC_DECLARE_FIELD(force_suppress)
+        .set_default(false)
+        .describe("Suppress all detections regardless of class_id.");
+    DMLC_DECLARE_FIELD(variances)
+        .set_default({0.1f, 0.1f, 0.2f, 0.2f})
+        .describe("Variances to be decoded from box regression output.");
+    DMLC_DECLARE_FIELD(nms_topk).set_default(-1).describe(
+        "Keep maximum top k detections before nms, -1 for no limit.");
   }
 };  // struct MultiBoxDetectionParam
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class MultiBoxDetectionOp : public Operator {
  public:
   explicit MultiBoxDetectionOp(MultiBoxDetectionParam param) {
     this->param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
-     using namespace mshadow;
-     using namespace mshadow::expr;
-     CHECK_EQ(in_data.size(), 3U) << "Input: [cls_prob, loc_pred, anchor]";
-     mxnet::TShape ashape = in_data[mboxdet_enum::kAnchor].shape_;
-     CHECK_EQ(out_data.size(), 1U);
-
-     Stream<xpu> *s = ctx.get_stream<xpu>();
-     Tensor<xpu, 3, DType> cls_prob = in_data[mboxdet_enum::kClsProb]
-       .get<xpu, 3, DType>(s);
-     Tensor<xpu, 2, DType> loc_pred = in_data[mboxdet_enum::kLocPred]
-       .get<xpu, 2, DType>(s);
-     Tensor<xpu, 2, DType> anchors = in_data[mboxdet_enum::kAnchor]
-       .get_with_shape<xpu, 2, DType>(Shape2(ashape[1], 4), s);
-     Tensor<xpu, 3, DType> out = out_data[mboxdet_enum::kOut]
-       .get<xpu, 3, DType>(s);
-     Tensor<xpu, 3, DType> temp_space = ctx.requested[mboxdet_enum::kTempSpace]
-       .get_space_typed<xpu, 3, DType>(out.shape_, s);
-     out = -1.f;
-     MultiBoxDetectionForward(out, cls_prob, loc_pred, anchors, temp_space,
-       param_.threshold, param_.clip, param_.variances, param_.nms_threshold,
-       param_.force_suppress, param_.nms_topk);
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
+    using namespace mshadow;
+    using namespace mshadow::expr;
+    CHECK_EQ(in_data.size(), 3U) << "Input: [cls_prob, loc_pred, anchor]";
+    mxnet::TShape ashape = in_data[mboxdet_enum::kAnchor].shape_;
+    CHECK_EQ(out_data.size(), 1U);
+
+    Stream<xpu>* s                 = ctx.get_stream<xpu>();
+    Tensor<xpu, 3, DType> cls_prob = in_data[mboxdet_enum::kClsProb].get<xpu, 3, DType>(s);
+    Tensor<xpu, 2, DType> loc_pred = in_data[mboxdet_enum::kLocPred].get<xpu, 2, DType>(s);
+    Tensor<xpu, 2, DType> anchors =
+        in_data[mboxdet_enum::kAnchor].get_with_shape<xpu, 2, DType>(Shape2(ashape[1], 4), s);
+    Tensor<xpu, 3, DType> out = out_data[mboxdet_enum::kOut].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> temp_space =
+        ctx.requested[mboxdet_enum::kTempSpace].get_space_typed<xpu, 3, DType>(out.shape_, s);
+    out = -1.f;
+    MultiBoxDetectionForward(out,
+                             cls_prob,
+                             loc_pred,
+                             anchors,
+                             temp_space,
+                             param_.threshold,
+                             param_.clip,
+                             param_.variances,
+                             param_.nms_threshold,
+                             param_.force_suppress,
+                             param_.nms_topk);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
     Tensor<xpu, 2, DType> gradc = in_grad[mboxdet_enum::kClsProb].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> gradl = in_grad[mboxdet_enum::kLocPred].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> grada = in_grad[mboxdet_enum::kAnchor].FlatTo2D<xpu, DType>(s);
-    gradc = 0.f;
-    gradl = 0.f;
-    grada = 0.f;
-}
+    gradc                       = 0.f;
+    gradl                       = 0.f;
+    grada                       = 0.f;
+  }
 
  private:
   MultiBoxDetectionParam param_;
 };  // class MultiBoxDetectionOp
 
-template<typename xpu>
-Operator *CreateOp(MultiBoxDetectionParam, int dtype);
+template <typename xpu>
+Operator* CreateOp(MultiBoxDetectionParam, int dtype);
 
 #if DMLC_USE_CXX11
 class MultiBoxDetectionProp : public OperatorProperty {
@@ -146,9 +152,9 @@ class MultiBoxDetectionProp : public OperatorProperty {
     return {"cls_prob", "loc_pred", "anchor"};
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 3U) << "Inputs: [cls_prob, loc_pred, anchor]";
     mxnet::TShape cshape = in_shape->at(mboxdet_enum::kClsProb);
@@ -162,16 +168,16 @@ class MultiBoxDetectionProp : public OperatorProperty {
     CHECK_GT(ashape[1], 0U) << "Number of anchors must > 0";
     CHECK_EQ(ashape[2], 4U);
     mxnet::TShape oshape = mxnet::TShape(3, -1);
-    oshape[0] = cshape[0];
-    oshape[1] = ashape[1];
-    oshape[2] = 6;  // [id, prob, xmin, ymin, xmax, ymax]
+    oshape[0]            = cshape[0];
+    oshape[1]            = ashape[1];
+    oshape[2]            = 6;  // [id, prob, xmin, ymin, xmax, ymax]
     out_shape->clear();
     out_shape->push_back(oshape);
     return true;
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new MultiBoxDetectionProp();
+    auto ptr    = new MultiBoxDetectionProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -180,8 +186,7 @@ class MultiBoxDetectionProp : public OperatorProperty {
     return "_contrib_MultiBoxDetection";
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
@@ -190,12 +195,13 @@ class MultiBoxDetectionProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   MultiBoxDetectionParam param_;
-};  // class MultiBoxDetectionProp
+};      // class MultiBoxDetectionProp
 #endif  // DMLC_USE_CXX11
 
 }  // namespace op
diff --git a/src/operator/contrib/multibox_detection.cc b/src/operator/contrib/multibox_detection.cc
index cb2dfe34bfc3..c8ded4ad6fa5 100644
--- a/src/operator/contrib/multibox_detection.cc
+++ b/src/operator/contrib/multibox_detection.cc
@@ -22,12 +22,12 @@
  * \file multibox_detection.cc
  * \brief MultiBoxDetection op
  * \author Joshua Zhang
-*/
+ */
 #include "./multibox_detection-inl.h"
 #include <algorithm>
 
 namespace mshadow {
-template<typename DType>
+template <typename DType>
 struct SortElemDescend {
   DType value;
   int index;
@@ -37,16 +37,20 @@ struct SortElemDescend {
     index = i;
   }
 
-  bool operator<(const SortElemDescend &other) const {
+  bool operator<(const SortElemDescend& other) const {
     return value > other.value;
   }
 };
 
-template<typename DType>
-inline void TransformLocations(DType *out, const DType *anchors,
-                               const DType *loc_pred, const bool clip,
-                               const float vx, const float vy,
-                               const float vw, const float vh) {
+template <typename DType>
+inline void TransformLocations(DType* out,
+                               const DType* anchors,
+                               const DType* loc_pred,
+                               const bool clip,
+                               const float vx,
+                               const float vy,
+                               const float vw,
+                               const float vh) {
   // transform predictions to detection results
   DType al = anchors[0];
   DType at = anchors[1];
@@ -64,14 +68,14 @@ inline void TransformLocations(DType *out, const DType *anchors,
   DType oy = py * vy * ah + ay;
   DType ow = std::exp(pw * vw) * aw / 2;
   DType oh = std::exp(ph * vh) * ah / 2;
-  out[0] = clip ? std::max(DType(0), std::min(DType(1), ox - ow)) : (ox - ow);
-  out[1] = clip ? std::max(DType(0), std::min(DType(1), oy - oh)) : (oy - oh);
-  out[2] = clip ? std::max(DType(0), std::min(DType(1), ox + ow)) : (ox + ow);
-  out[3] = clip ? std::max(DType(0), std::min(DType(1), oy + oh)) : (oy + oh);
+  out[0]   = clip ? std::max(DType(0), std::min(DType(1), ox - ow)) : (ox - ow);
+  out[1]   = clip ? std::max(DType(0), std::min(DType(1), oy - oh)) : (oy - oh);
+  out[2]   = clip ? std::max(DType(0), std::min(DType(1), ox + ow)) : (ox + ow);
+  out[3]   = clip ? std::max(DType(0), std::min(DType(1), oy + oh)) : (oy + oh);
 }
 
-template<typename DType>
-inline DType CalculateOverlap(const DType *a, const DType *b) {
+template <typename DType>
+inline DType CalculateOverlap(const DType* a, const DType* b) {
   DType w = std::max(DType(0), std::min(a[2], b[2]) - std::max(a[0], b[0]));
   DType h = std::max(DType(0), std::min(a[3], b[3]) - std::max(a[1], b[1]));
   DType i = w * h;
@@ -79,15 +83,15 @@ inline DType CalculateOverlap(const DType *a, const DType *b) {
   return u <= 0.f ? static_cast<DType>(0) : static_cast<DType>(i / u);
 }
 
-template<typename DType>
-inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
-                                     const Tensor<cpu, 3, DType> &cls_prob,
-                                     const Tensor<cpu, 2, DType> &loc_pred,
-                                     const Tensor<cpu, 2, DType> &anchors,
-                                     const Tensor<cpu, 3, DType> &temp_space,
+template <typename DType>
+inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType>& out,
+                                     const Tensor<cpu, 3, DType>& cls_prob,
+                                     const Tensor<cpu, 2, DType>& loc_pred,
+                                     const Tensor<cpu, 2, DType>& anchors,
+                                     const Tensor<cpu, 3, DType>& temp_space,
                                      const float threshold,
                                      const bool clip,
-                                     const mxnet::Tuple<float> &variances,
+                                     const mxnet::Tuple<float>& variances,
                                      const float nms_threshold,
                                      const bool force_suppress,
                                      const int nms_topk) {
@@ -95,25 +99,25 @@ inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
   const int num_classes = cls_prob.size(1);
   const int num_anchors = cls_prob.size(2);
   const int num_batches = cls_prob.size(0);
-  const DType *p_anchor = anchors.dptr_;
+  const DType* p_anchor = anchors.dptr_;
 
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   std::vector<DType> outputs(num_anchors * 6);
   for (int nbatch = 0; nbatch < num_batches; ++nbatch) {
-    const DType *p_cls_prob = cls_prob.dptr_ + nbatch * num_classes * num_anchors;
-    const DType *p_loc_pred = loc_pred.dptr_ + nbatch * num_anchors * 4;
-    DType *p_out = out.dptr_ + nbatch * num_anchors * 6;
+    const DType* p_cls_prob = cls_prob.dptr_ + nbatch * num_classes * num_anchors;
+    const DType* p_loc_pred = loc_pred.dptr_ + nbatch * num_anchors * 4;
+    DType* p_out            = out.dptr_ + nbatch * num_anchors * 6;
 
 #pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < num_anchors; ++i) {
       // find the predicted class id and probability
       DType score = -1;
-      int id = 0;
+      int id      = 0;
       for (int j = 1; j < num_classes; ++j) {
         DType temp = p_cls_prob[j * num_anchors + i];
         if (temp > score) {
           score = temp;
-          id = j;
+          id    = j;
         }
       }
 
@@ -122,11 +126,17 @@ inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
       }
 
       // [id, prob, xmin, ymin, xmax, ymax]
-      outputs[i * 6] = id - 1;
+      outputs[i * 6]     = id - 1;
       outputs[i * 6 + 1] = score;
-      int offset = i * 4;
-      TransformLocations(outputs.data() + i * 6 + 2, p_anchor + offset, p_loc_pred + offset, clip,
-                         variances[0], variances[1], variances[2], variances[3]);
+      int offset         = i * 4;
+      TransformLocations(outputs.data() + i * 6 + 2,
+                         p_anchor + offset,
+                         p_loc_pred + offset,
+                         clip,
+                         variances[0],
+                         variances[1],
+                         variances[2],
+                         variances[3]);
     }
 
     int valid_count = 0;
@@ -144,7 +154,8 @@ inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
       }
     }
 
-    if (valid_count < 1 || nms_threshold <= 0 || nms_threshold > 1) continue;
+    if (valid_count < 1 || nms_threshold <= 0 || nms_threshold > 1)
+      continue;
 
     // sort and apply NMS
     Copy(temp_space[nbatch], out[nbatch], out.stream_);
@@ -157,8 +168,8 @@ inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
     std::stable_sort(sorter.begin(), sorter.end());
 
     // re-order output
-    DType *ptemp = temp_space.dptr_ + nbatch * num_anchors * 6;
-    int nkeep = static_cast<int>(sorter.size());
+    DType* ptemp = temp_space.dptr_ + nbatch * num_anchors * 6;
+    int nkeep    = static_cast<int>(sorter.size());
     if (nms_topk > 0 && nms_topk < nkeep) {
       // keep topk detections
       nkeep = nms_topk;
@@ -175,10 +186,12 @@ inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
     // apply nms
     for (int i = 0; i < nkeep; ++i) {
       int offset_i = i * 6;
-      if (p_out[offset_i] < 0) continue;  // skip eliminated
+      if (p_out[offset_i] < 0)
+        continue;  // skip eliminated
       for (int j = i + 1; j < nkeep; ++j) {
         int offset_j = j * 6;
-        if (p_out[offset_j] < 0) continue;  // skip eliminated
+        if (p_out[offset_j] < 0)
+          continue;  // skip eliminated
         if (force_suppress || (p_out[offset_i] == p_out[offset_j])) {
           // when foce_suppress == true or class_id equals
           DType iou = CalculateOverlap(p_out + offset_i + 2, p_out + offset_j + 2);
@@ -194,18 +207,16 @@ inline void MultiBoxDetectionForward(const Tensor<cpu, 3, DType> &out,
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(MultiBoxDetectionParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MultiBoxDetectionOp<cpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<cpu>(MultiBoxDetectionParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MultiBoxDetectionOp<cpu, DType>(param); });
   return op;
 }
 
 Operator* MultiBoxDetectionProp::CreateOperatorEx(Context ctx,
-                                                  mxnet::ShapeVector *in_shape,
-                                                  std::vector<int> *in_type) const {
+                                                  mxnet::ShapeVector* in_shape,
+                                                  std::vector<int>* in_type) const {
   mxnet::ShapeVector out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferShape(in_shape, &out_shape, &aux_shape));
@@ -215,14 +226,13 @@ Operator* MultiBoxDetectionProp::CreateOperatorEx(Context ctx,
 
 DMLC_REGISTER_PARAMETER(MultiBoxDetectionParam);
 MXNET_REGISTER_OP_PROPERTY(_contrib_MultiBoxDetection, MultiBoxDetectionProp)
-.describe("Convert multibox detection predictions.")
-.add_argument("cls_prob", "NDArray-or-Symbol", "Class probabilities.")
-.add_argument("loc_pred", "NDArray-or-Symbol", "Location regression predictions.")
-.add_argument("anchor", "NDArray-or-Symbol", "Multibox prior anchor boxes")
-.add_arguments(MultiBoxDetectionParam::__FIELDS__());
-
-NNVM_REGISTER_OP(_contrib_MultiBoxDetection)
-.add_alias("_npx_multibox_detection");
+    .describe("Convert multibox detection predictions.")
+    .add_argument("cls_prob", "NDArray-or-Symbol", "Class probabilities.")
+    .add_argument("loc_pred", "NDArray-or-Symbol", "Location regression predictions.")
+    .add_argument("anchor", "NDArray-or-Symbol", "Multibox prior anchor boxes")
+    .add_arguments(MultiBoxDetectionParam::__FIELDS__());
+
+NNVM_REGISTER_OP(_contrib_MultiBoxDetection).add_alias("_npx_multibox_detection");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multibox_detection.cu b/src/operator/contrib/multibox_detection.cu
index cd2afd243aec..2d061f3bdadb 100644
--- a/src/operator/contrib/multibox_detection.cu
+++ b/src/operator/contrib/multibox_detection.cu
@@ -22,47 +22,56 @@
  * \file multibox_detection.cu
  * \brief MultiBoxDetection op
  * \author Joshua Zhang
-*/
+ */
 #include "./multibox_detection-inl.h"
 #include <mshadow/cuda/tensor_gpu-inl.cuh>
 
-#define MULTIBOX_DETECTION_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define MULTIBOX_DETECTION_CUDA_CHECK(condition)                      \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
   } while (0)
 
 namespace mshadow {
 namespace cuda {
-template<typename DType>
-__device__ void Clip(DType *value, const DType lower, const DType upper) {
-  if ((*value) < lower) *value = lower;
-  if ((*value) > upper) *value = upper;
+template <typename DType>
+__device__ void Clip(DType* value, const DType lower, const DType upper) {
+  if ((*value) < lower)
+    *value = lower;
+  if ((*value) > upper)
+    *value = upper;
 }
 
-template<typename DType>
-__device__ void CalculateOverlap(const DType *a, const DType *b, DType *iou) {
+template <typename DType>
+__device__ void CalculateOverlap(const DType* a, const DType* b, DType* iou) {
   DType w = max(DType(0), min(a[2], b[2]) - max(a[0], b[0]));
   DType h = max(DType(0), min(a[3], b[3]) - max(a[1], b[1]));
   DType i = w * h;
   DType u = (a[2] - a[0]) * (a[3] - a[1]) + (b[2] - b[0]) * (b[3] - b[1]) - i;
-  (*iou) =  u <= 0.f ? static_cast<DType>(0) : static_cast<DType>(i / u);
+  (*iou)  = u <= 0.f ? static_cast<DType>(0) : static_cast<DType>(i / u);
 }
 
-template<typename DType>
-__global__
-__launch_bounds__(cuda::kMaxThreadsPerBlock)
-void DetectionForwardKernel(DType *out, const DType *cls_prob,
-                                       const DType *loc_pred, const DType *anchors,
-                                       DType *temp_space, const int num_classes,
-                                       const int num_anchors, const float threshold,
-                                       const bool clip, const float vx,
-                                       const float vy, const float vw,
-                                       const float vh, const float nms_threshold,
-                                       const bool force_suppress, const int nms_topk) {
+template <typename DType>
+__global__ __launch_bounds__(cuda::kMaxThreadsPerBlock) void DetectionForwardKernel(
+    DType* out,
+    const DType* cls_prob,
+    const DType* loc_pred,
+    const DType* anchors,
+    DType* temp_space,
+    const int num_classes,
+    const int num_anchors,
+    const float threshold,
+    const bool clip,
+    const float vx,
+    const float vy,
+    const float vw,
+    const float vh,
+    const float nms_threshold,
+    const bool force_suppress,
+    const int nms_topk) {
   const int nbatch = blockIdx.x;  // each block for each batch
-  int index = threadIdx.x;
+  int index        = threadIdx.x;
   __shared__ int valid_count;
   out += nbatch * num_anchors * 6;
   cls_prob += nbatch * num_anchors * num_classes;
@@ -76,12 +85,12 @@ void DetectionForwardKernel(DType *out, const DType *cls_prob,
   // apply prediction to anchors
   for (int i = index; i < num_anchors; i += blockDim.x) {
     DType score = -1;
-    int id = 0;
+    int id      = 0;
     for (int j = 1; j < num_classes; ++j) {
       DType temp = cls_prob[j * num_anchors + i];
       if (temp > score) {
         score = temp;
-        id = j;
+        id    = j;
       }
     }
     if (id > 0 && score < threshold) {
@@ -90,26 +99,26 @@ void DetectionForwardKernel(DType *out, const DType *cls_prob,
 
     if (id > 0) {
       // valid class
-      int pos = atomicAdd(&valid_count, 1);
-      out[pos * 6] = id - 1;  // restore original class id
+      int pos          = atomicAdd(&valid_count, 1);
+      out[pos * 6]     = id - 1;  // restore original class id
       out[pos * 6 + 1] = (id == 0 ? DType(-1) : score);
-      int offset = i * 4;
-      DType al = anchors[offset];
-      DType at = anchors[offset + 1];
-      DType ar = anchors[offset + 2];
-      DType ab = anchors[offset + 3];
-      DType aw = ar - al;
-      DType ah = ab - at;
-      DType ax = (al + ar) / 2.f;
-      DType ay = (at + ab) / 2.f;
-      DType ox = loc_pred[offset] * vx * aw + ax;
-      DType oy = loc_pred[offset + 1] * vy * ah + ay;
-      DType ow = exp(loc_pred[offset + 2] * vw) * aw / 2;
-      DType oh = exp(loc_pred[offset + 3] * vh) * ah / 2;
-      DType xmin = ox - ow;
-      DType ymin = oy - oh;
-      DType xmax = ox + ow;
-      DType ymax = oy + oh;
+      int offset       = i * 4;
+      DType al         = anchors[offset];
+      DType at         = anchors[offset + 1];
+      DType ar         = anchors[offset + 2];
+      DType ab         = anchors[offset + 3];
+      DType aw         = ar - al;
+      DType ah         = ab - at;
+      DType ax         = (al + ar) / 2.f;
+      DType ay         = (at + ab) / 2.f;
+      DType ox         = loc_pred[offset] * vx * aw + ax;
+      DType oy         = loc_pred[offset + 1] * vy * ah + ay;
+      DType ow         = exp(loc_pred[offset + 2] * vw) * aw / 2;
+      DType oh         = exp(loc_pred[offset + 3] * vh) * ah / 2;
+      DType xmin       = ox - ow;
+      DType ymin       = oy - oh;
+      DType xmax       = ox + ow;
+      DType ymax       = oy + oh;
       if (clip) {
         Clip(&xmin, DType(0), DType(1));
         Clip(&ymin, DType(0), DType(1));
@@ -124,23 +133,27 @@ void DetectionForwardKernel(DType *out, const DType *cls_prob,
   }
   __syncthreads();
 
-  if (valid_count < 1 || nms_threshold <= 0 || nms_threshold > 1) return;
+  if (valid_count < 1 || nms_threshold <= 0 || nms_threshold > 1)
+    return;
   // if (index == 0) printf("%d\n", valid_count);
 
   // descent sort according to scores
   const int size = valid_count;
   temp_space += nbatch * num_anchors * 6;
-  DType *src = out;
-  DType *dst = temp_space;
+  DType* src = out;
+  DType* dst = temp_space;
   for (int width = 2; width < (size << 1); width <<= 1) {
     int slices = (size - 1) / (blockDim.x * width) + 1;
-    int start = width * index * slices;
+    int start  = width * index * slices;
     for (int slice = 0; slice < slices; ++slice) {
-      if (start >= size) break;
+      if (start >= size)
+        break;
       int middle = start + (width >> 1);
-      if (middle > size) middle = size;
+      if (middle > size)
+        middle = size;
       int end = start + width;
-      if (end > size) end = size;
+      if (end > size)
+        end = size;
       int i = start;
       int j = middle;
       for (int k = start; k < end; ++k) {
@@ -161,8 +174,8 @@ void DetectionForwardKernel(DType *out, const DType *cls_prob,
       start += width;
     }
     __syncthreads();
-    src = src == out? temp_space : out;
-    dst = dst == out? temp_space : out;
+    src = src == out ? temp_space : out;
+    dst = dst == out ? temp_space : out;
   }
   __syncthreads();
 
@@ -187,11 +200,13 @@ void DetectionForwardKernel(DType *out, const DType *cls_prob,
   // apply NMS
   for (int compare_pos = 0; compare_pos < ntop; ++compare_pos) {
     DType compare_id = out[compare_pos * 6];
-    if (compare_id < 0) continue;  // not a valid positive detection, skip
-    DType *compare_loc_ptr = out + compare_pos * 6 + 2;
+    if (compare_id < 0)
+      continue;  // not a valid positive detection, skip
+    DType* compare_loc_ptr = out + compare_pos * 6 + 2;
     for (int i = compare_pos + index + 1; i < ntop; i += blockDim.x) {
       DType class_id = out[i * 6];
-      if (class_id < 0) continue;
+      if (class_id < 0)
+        continue;
       if (force_suppress || (class_id == compare_id)) {
         DType iou;
         CalculateOverlap(compare_loc_ptr, out + i * 6 + 2, &iou);
@@ -205,15 +220,15 @@ void DetectionForwardKernel(DType *out, const DType *cls_prob,
 }
 }  // namespace cuda
 
-template<typename DType>
-inline void MultiBoxDetectionForward(const Tensor<gpu, 3, DType> &out,
-                                     const Tensor<gpu, 3, DType> &cls_prob,
-                                     const Tensor<gpu, 2, DType> &loc_pred,
-                                     const Tensor<gpu, 2, DType> &anchors,
-                                     const Tensor<gpu, 3, DType> &temp_space,
+template <typename DType>
+inline void MultiBoxDetectionForward(const Tensor<gpu, 3, DType>& out,
+                                     const Tensor<gpu, 3, DType>& cls_prob,
+                                     const Tensor<gpu, 2, DType>& loc_pred,
+                                     const Tensor<gpu, 2, DType>& anchors,
+                                     const Tensor<gpu, 3, DType>& temp_space,
                                      const float threshold,
                                      const bool clip,
-                                     const mxnet::Tuple<float> &variances,
+                                     const mxnet::Tuple<float>& variances,
                                      const float nms_threshold,
                                      const bool force_suppress,
                                      const int nms_topk) {
@@ -222,26 +237,35 @@ inline void MultiBoxDetectionForward(const Tensor<gpu, 3, DType> &out,
   const int num_anchors = cls_prob.size(2);
   const int num_batches = cls_prob.size(0);
   const int num_threads = cuda::kMaxThreadsPerBlock;
-  int num_blocks = num_batches;
+  int num_blocks        = num_batches;
   cuda::CheckLaunchParam(num_blocks, num_threads, "MultiBoxDetection Forward");
   cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
   cuda::DetectionForwardKernel<<<num_blocks, num_threads, 0, stream>>>(out.dptr_,
-    cls_prob.dptr_, loc_pred.dptr_, anchors.dptr_, temp_space.dptr_,
-    num_classes, num_anchors, threshold, clip,
-    variances[0], variances[1], variances[2], variances[3],
-    nms_threshold, force_suppress, nms_topk);
+                                                                       cls_prob.dptr_,
+                                                                       loc_pred.dptr_,
+                                                                       anchors.dptr_,
+                                                                       temp_space.dptr_,
+                                                                       num_classes,
+                                                                       num_anchors,
+                                                                       threshold,
+                                                                       clip,
+                                                                       variances[0],
+                                                                       variances[1],
+                                                                       variances[2],
+                                                                       variances[3],
+                                                                       nms_threshold,
+                                                                       force_suppress,
+                                                                       nms_topk);
   MULTIBOX_DETECTION_CUDA_CHECK(cudaGetLastError());
 }
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<gpu>(MultiBoxDetectionParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MultiBoxDetectionOp<gpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<gpu>(MultiBoxDetectionParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MultiBoxDetectionOp<gpu, DType>(param); });
   return op;
 }
 }  // namespace op
diff --git a/src/operator/contrib/multibox_prior-inl.h b/src/operator/contrib/multibox_prior-inl.h
index 571765a8bb47..5d501d3f35fc 100644
--- a/src/operator/contrib/multibox_prior-inl.h
+++ b/src/operator/contrib/multibox_prior-inl.h
@@ -22,7 +22,7 @@
  * \file multibox_prior-inl.h
  * \brief generate multibox prior boxes
  * \author Joshua Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_MULTIBOX_PRIOR_INL_H_
 #define MXNET_OPERATOR_CONTRIB_MULTIBOX_PRIOR_INL_H_
 #include <dmlc/logging.h>
@@ -36,24 +36,25 @@
 #include <valarray>
 #include "../operator_common.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace mshadow_op {
 struct clip_zero_one {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
-    if (a < 0.f) return DType(0.f);
-    if (a > 1.f) return DType(1.f);
+    if (a < 0.f)
+      return DType(0.f);
+    if (a > 1.f)
+      return DType(1.f);
     return DType(a);
   }
 };  // struct clip_zero_one
 }  // namespace mshadow_op
 
 namespace mboxprior_enum {
-enum MultiBoxPriorOpInputs {kData};
-enum MultiBoxPriorOpOutputs {kOut};
+enum MultiBoxPriorOpInputs { kData };
+enum MultiBoxPriorOpOutputs { kOut };
 }  // namespace mboxprior_enum
 
 struct MultiBoxPriorParam : public dmlc::Parameter<MultiBoxPriorParam> {
@@ -63,58 +64,60 @@ struct MultiBoxPriorParam : public dmlc::Parameter<MultiBoxPriorParam> {
   mxnet::Tuple<float> steps;
   mxnet::Tuple<float> offsets;
   DMLC_DECLARE_PARAMETER(MultiBoxPriorParam) {
-    DMLC_DECLARE_FIELD(sizes).set_default({1.0f})
-    .describe("List of sizes of generated MultiBoxPriores.");
-    DMLC_DECLARE_FIELD(ratios).set_default({1.0f})
-    .describe("List of aspect ratios of generated MultiBoxPriores.");
-    DMLC_DECLARE_FIELD(clip).set_default(false)
-    .describe("Whether to clip out-of-boundary boxes.");
-    DMLC_DECLARE_FIELD(steps).set_default({-1.f, -1.f})
-    .describe("Priorbox step across y and x, -1 for auto calculation.");
-    DMLC_DECLARE_FIELD(offsets).set_default({0.5f, 0.5f})
-    .describe("Priorbox center offsets, y and x respectively");
+    DMLC_DECLARE_FIELD(sizes).set_default({1.0f}).describe(
+        "List of sizes of generated MultiBoxPriores.");
+    DMLC_DECLARE_FIELD(ratios).set_default({1.0f}).describe(
+        "List of aspect ratios of generated MultiBoxPriores.");
+    DMLC_DECLARE_FIELD(clip).set_default(false).describe("Whether to clip out-of-boundary boxes.");
+    DMLC_DECLARE_FIELD(steps)
+        .set_default({-1.f, -1.f})
+        .describe("Priorbox step across y and x, -1 for auto calculation.");
+    DMLC_DECLARE_FIELD(offsets)
+        .set_default({0.5f, 0.5f})
+        .describe("Priorbox center offsets, y and x respectively");
   }
 };  // struct MultiBoxPriorParam
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class MultiBoxPriorOp : public Operator {
  public:
   explicit MultiBoxPriorOp(MultiBoxPriorParam param)
-    : clip_(param.clip), sizes_(param.sizes.begin(), param.sizes.end()),
-    ratios_(param.ratios.begin(), param.ratios.end()),
-    steps_(param.steps.begin(), param.steps.end()),
-    offsets_(param.offsets.begin(), param.offsets.end()) {
-      CHECK_GT(sizes_.size(), 0);
-      CHECK_GT(ratios_.size(), 0);
-      CHECK_EQ(steps_.size(), 2);
-      CHECK_EQ(offsets_.size(), 2);
-      CHECK_GE(offsets_[0], 0.f);
-      CHECK_LE(offsets_[0], 1.f);
-      CHECK_GE(offsets_[1], 0.f);
-      CHECK_LE(offsets_[1], 1.f);
-    }
+      : clip_(param.clip),
+        sizes_(param.sizes.begin(), param.sizes.end()),
+        ratios_(param.ratios.begin(), param.ratios.end()),
+        steps_(param.steps.begin(), param.steps.end()),
+        offsets_(param.offsets.begin(), param.offsets.end()) {
+    CHECK_GT(sizes_.size(), 0);
+    CHECK_GT(ratios_.size(), 0);
+    CHECK_EQ(steps_.size(), 2);
+    CHECK_EQ(offsets_.size(), 2);
+    CHECK_GE(offsets_[0], 0.f);
+    CHECK_LE(offsets_[0], 1.f);
+    CHECK_GE(offsets_[1], 0.f);
+    CHECK_LE(offsets_[1], 1.f);
+  }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(static_cast<int>(in_data.size()), 1);
     CHECK_EQ(out_data.size(), 1);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     Tensor<xpu, 2, DType> out;
     // TODO(zhreshold): this implementation is to be compliant to original ssd in caffe
     // The prior boxes could be implemented in more versatile ways
     // since input sizes are same in each batch, we could share MultiBoxPrior
-    const int num_sizes = static_cast<int>(sizes_.size());
-    const int num_ratios = static_cast<int>(ratios_.size());
+    const int num_sizes   = static_cast<int>(sizes_.size());
+    const int num_ratios  = static_cast<int>(ratios_.size());
     const int num_anchors = num_sizes - 1 + num_ratios;  // anchors per location
-    int in_height = in_data[mboxprior_enum::kData].size(2);
-    int in_width = in_data[mboxprior_enum::kData].size(3);
-    Shape<2> oshape = Shape2(num_anchors * in_width * in_height, 4);
-    out = out_data[mboxprior_enum::kOut].get_with_shape<xpu, 2, DType>(oshape, s);
+    int in_height         = in_data[mboxprior_enum::kData].size(2);
+    int in_width          = in_data[mboxprior_enum::kData].size(3);
+    Shape<2> oshape       = Shape2(num_anchors * in_width * in_height, 4);
+    out                   = out_data[mboxprior_enum::kOut].get_with_shape<xpu, 2, DType>(oshape, s);
     CHECK_GE(steps_[0] * steps_[1], 0) << "Must specify both step_y and step_x";
     if (steps_[0] <= 0 || steps_[1] <= 0) {
       // estimate using layer shape
@@ -128,18 +131,18 @@ class MultiBoxPriorOp : public Operator {
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
     Tensor<xpu, 2, DType> grad = in_grad[mboxprior_enum::kData].FlatTo2D<xpu, DType>(s);
-    grad = 0.f;
+    grad                       = 0.f;
   }
 
  private:
@@ -150,11 +153,11 @@ class MultiBoxPriorOp : public Operator {
   std::vector<float> offsets_;
 };  // class MultiBoxPriorOp
 
-template<typename xpu>
-Operator *CreateOp(MultiBoxPriorParam, int dtype);
+template <typename xpu>
+Operator* CreateOp(MultiBoxPriorParam, int dtype);
 
 #if DMLC_USE_CXX11
-class MultiBoxPriorProp: public OperatorProperty {
+class MultiBoxPriorProp : public OperatorProperty {
  public:
   void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.Init(kwargs);
@@ -168,9 +171,9 @@ class MultiBoxPriorProp: public OperatorProperty {
     return {"data"};
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1) << "Inputs: [data]" << in_shape->size();
     mxnet::TShape dshape = in_shape->at(mboxprior_enum::kData);
@@ -181,11 +184,11 @@ class MultiBoxPriorProp: public OperatorProperty {
     CHECK_GT(in_width, 0) << "Input width should > 0";
     // since input sizes are same in each batch, we could share MultiBoxPrior
     mxnet::TShape oshape = mxnet::TShape(3, -1);
-    int num_sizes = param_.sizes.ndim();
-    int num_ratios = param_.ratios.ndim();
-    oshape[0] = 1;
-    oshape[1] = in_height * in_width * (num_sizes + num_ratios - 1);
-    oshape[2] = 4;
+    int num_sizes        = param_.sizes.ndim();
+    int num_ratios       = param_.ratios.ndim();
+    oshape[0]            = 1;
+    oshape[1]            = in_height * in_width * (num_sizes + num_ratios - 1);
+    oshape[2]            = 4;
     out_shape->clear();
     out_shape->push_back(oshape);
     CHECK_EQ(param_.steps.ndim(), 2) << "Step ndim must be 2: (step_y, step_x)";
@@ -193,7 +196,7 @@ class MultiBoxPriorProp: public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new MultiBoxPriorProp();
+    auto ptr    = new MultiBoxPriorProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -207,12 +210,13 @@ class MultiBoxPriorProp: public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   MultiBoxPriorParam param_;
-};  // class MultiBoxPriorProp
+};      // class MultiBoxPriorProp
 #endif  // DMLC_USE_CXX11
 
 }  // namespace op
diff --git a/src/operator/contrib/multibox_prior.cc b/src/operator/contrib/multibox_prior.cc
index 66fd2c11517a..365049ea4464 100644
--- a/src/operator/contrib/multibox_prior.cc
+++ b/src/operator/contrib/multibox_prior.cc
@@ -22,34 +22,35 @@
  * \file multibox_prior.cc
  * \brief generate multibox prior boxes cpu implementation
  * \author Joshua Zhang
-*/
+ */
 
 #include "./multibox_prior-inl.h"
 
 namespace mshadow {
-template<typename DType>
-inline void MultiBoxPriorForward(const Tensor<cpu, 2, DType> &out,
-                            const std::vector<float> &sizes,
-                            const std::vector<float> &ratios,
-                            const int in_width, const int in_height,
-                            const std::vector<float> &steps,
-                            const std::vector<float> &offsets) {
-  const float step_x = steps[1];
-  const float step_y = steps[0];
-  const int num_sizes = static_cast<int>(sizes.size());
+template <typename DType>
+inline void MultiBoxPriorForward(const Tensor<cpu, 2, DType>& out,
+                                 const std::vector<float>& sizes,
+                                 const std::vector<float>& ratios,
+                                 const int in_width,
+                                 const int in_height,
+                                 const std::vector<float>& steps,
+                                 const std::vector<float>& offsets) {
+  const float step_x   = steps[1];
+  const float step_y   = steps[0];
+  const int num_sizes  = static_cast<int>(sizes.size());
   const int num_ratios = static_cast<int>(ratios.size());
-  int count = 0;
+  int count            = 0;
 
   for (int r = 0; r < in_height; ++r) {
     float center_y = (r + offsets[0]) * step_y;
     for (int c = 0; c < in_width; ++c) {
       float center_x = (c + offsets[1]) * step_x;
       // ratio = first ratio, various sizes
-      float ratio = num_ratios > 0? sqrtf(ratios[0]) : 1.f;
+      float ratio = num_ratios > 0 ? sqrtf(ratios[0]) : 1.f;
       for (int i = 0; i < num_sizes; ++i) {
-        float size = sizes[i];
-        float w = size * in_height / in_width * ratio / 2;
-        float h = size / ratio / 2;
+        float size    = sizes[i];
+        float w       = size * in_height / in_width * ratio / 2;
+        float h       = size / ratio / 2;
         out[count][0] = center_x - w;  // xmin
         out[count][1] = center_y - h;  // ymin
         out[count][2] = center_x + w;  // xmax
@@ -59,9 +60,9 @@ inline void MultiBoxPriorForward(const Tensor<cpu, 2, DType> &out,
       // various ratios, size = min_size = size[0]
       float size = sizes[0];
       for (int j = 1; j < num_ratios; ++j) {
-        float ratio = sqrtf(ratios[j]);
-        float w = size * in_height / in_width * ratio / 2;
-        float h = size / ratio / 2;
+        float ratio   = sqrtf(ratios[j]);
+        float w       = size * in_height / in_width * ratio / 2;
+        float h       = size / ratio / 2;
         out[count][0] = center_x - w;  // xmin
         out[count][1] = center_y - h;  // ymin
         out[count][2] = center_x + w;  // xmax
@@ -75,17 +76,16 @@ inline void MultiBoxPriorForward(const Tensor<cpu, 2, DType> &out,
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<cpu>(MultiBoxPriorParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MultiBoxPriorOp<cpu, DType>(param);
-  });
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MultiBoxPriorOp<cpu, DType>(param); });
   return op;
 }
 
-Operator* MultiBoxPriorProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                       std::vector<int> *in_type) const {
+Operator* MultiBoxPriorProp::CreateOperatorEx(Context ctx,
+                                              mxnet::ShapeVector* in_shape,
+                                              std::vector<int>* in_type) const {
   mxnet::ShapeVector out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferShape(in_shape, &out_shape, &aux_shape));
@@ -96,12 +96,11 @@ Operator* MultiBoxPriorProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *i
 DMLC_REGISTER_PARAMETER(MultiBoxPriorParam);
 
 MXNET_REGISTER_OP_PROPERTY(_contrib_MultiBoxPrior, MultiBoxPriorProp)
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_arguments(MultiBoxPriorParam::__FIELDS__())
-.describe("Generate prior(anchor) boxes from data, sizes and ratios.");
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_arguments(MultiBoxPriorParam::__FIELDS__())
+    .describe("Generate prior(anchor) boxes from data, sizes and ratios.");
 
-NNVM_REGISTER_OP(_contrib_MultiBoxPrior)
-.add_alias("_npx_multibox_prior");
+NNVM_REGISTER_OP(_contrib_MultiBoxPrior).add_alias("_npx_multibox_prior");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multibox_prior.cu b/src/operator/contrib/multibox_prior.cu
index 4c3ebb016219..3996065ed2dd 100644
--- a/src/operator/contrib/multibox_prior.cu
+++ b/src/operator/contrib/multibox_prior.cu
@@ -22,58 +22,65 @@
  * \file multibox_prior.cu
  * \brief generate multibox prior boxes cuda kernels
  * \author Joshua Zhang
-*/
+ */
 
 #include "./multibox_prior-inl.h"
 #include <mshadow/cuda/tensor_gpu-inl.cuh>
 
-#define MULTIBOXPRIOR_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define MULTIBOXPRIOR_CUDA_CHECK(condition)                           \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
   } while (0)
 
 namespace mshadow {
 namespace cuda {
-template<typename DType>
-__global__ void AssignPriors(DType *out, const float size,
-                             const float sqrt_ratio, const int in_width,
-                             const int in_height, const float step_x,
-                             const float step_y, const float center_offy,
-                             const float center_offx, const int stride,
+template <typename DType>
+__global__ void AssignPriors(DType* out,
+                             const float size,
+                             const float sqrt_ratio,
+                             const int in_width,
+                             const int in_height,
+                             const float step_x,
+                             const float step_y,
+                             const float center_offy,
+                             const float center_offx,
+                             const int stride,
                              const int offset) {
   int index = blockIdx.x * blockDim.x + threadIdx.x;
-  if (index >= in_width * in_height) return;
-  int r = index / in_width;
-  int c = index % in_width;
+  if (index >= in_width * in_height)
+    return;
+  int r          = index / in_width;
+  int c          = index % in_width;
   float center_x = (c + center_offx) * step_x;
   float center_y = (r + center_offy) * step_y;
-  float w = size * in_height / in_width * sqrt_ratio / 2;  // half width
-  float h = size / sqrt_ratio / 2;  // half height
-  DType *ptr = out + index * stride + 4 * offset;
-  *(ptr++) = center_x - w;  // xmin
-  *(ptr++) = center_y - h;  // ymin
-  *(ptr++) = center_x + w;  // xmax
-  *(ptr++) = center_y + h;  // ymax
+  float w        = size * in_height / in_width * sqrt_ratio / 2;  // half width
+  float h        = size / sqrt_ratio / 2;                         // half height
+  DType* ptr     = out + index * stride + 4 * offset;
+  *(ptr++)       = center_x - w;  // xmin
+  *(ptr++)       = center_y - h;  // ymin
+  *(ptr++)       = center_x + w;  // xmax
+  *(ptr++)       = center_y + h;  // ymax
 }
 }  // namespace cuda
 
-template<typename DType>
-inline void MultiBoxPriorForward(const Tensor<gpu, 2, DType> &out,
-                            const std::vector<float> &sizes,
-                            const std::vector<float> &ratios,
-                            const int in_width, const int in_height,
-                            const std::vector<float> &steps,
-                            const std::vector<float> &offsets) {
+template <typename DType>
+inline void MultiBoxPriorForward(const Tensor<gpu, 2, DType>& out,
+                                 const std::vector<float>& sizes,
+                                 const std::vector<float>& ratios,
+                                 const int in_width,
+                                 const int in_height,
+                                 const std::vector<float>& steps,
+                                 const std::vector<float>& offsets) {
   CHECK_EQ(out.CheckContiguous(), true);
-  cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
-  DType *out_ptr = out.dptr_;
-  const float step_x = steps[1];
-  const float step_y = steps[0];
+  cudaStream_t stream  = Stream<gpu>::GetStream(out.stream_);
+  DType* out_ptr       = out.dptr_;
+  const float step_x   = steps[1];
+  const float step_y   = steps[0];
   const float offset_x = offsets[1];
   const float offset_y = offsets[0];
-  const int num_sizes = static_cast<int>(sizes.size());
+  const int num_sizes  = static_cast<int>(sizes.size());
   const int num_ratios = static_cast<int>(ratios.size());
 
   const int num_thread = cuda::kMaxThreadsPerBlock;
@@ -82,12 +89,21 @@ inline void MultiBoxPriorForward(const Tensor<gpu, 2, DType> &out,
   cuda::CheckLaunchParam(dimGrid, dimBlock, "MultiBoxPrior Forward");
 
   const int stride = 4 * (num_sizes + num_ratios - 1);
-  int offset = 0;
+  int offset       = 0;
   // ratio = first ratio, various sizes
-  float ratio = num_ratios > 0? sqrtf(ratios[0]) : 1.f;
+  float ratio = num_ratios > 0 ? sqrtf(ratios[0]) : 1.f;
   for (int i = 0; i < num_sizes; ++i) {
     cuda::AssignPriors<DType><<<dimGrid, dimBlock, 0, stream>>>(out_ptr,
-      sizes[i], ratio, in_width, in_height, step_x, step_y, offset_y, offset_x, stride, offset);
+                                                                sizes[i],
+                                                                ratio,
+                                                                in_width,
+                                                                in_height,
+                                                                step_x,
+                                                                step_y,
+                                                                offset_y,
+                                                                offset_x,
+                                                                stride,
+                                                                offset);
     ++offset;
   }
   MULTIBOXPRIOR_CUDA_CHECK(cudaGetLastError());
@@ -95,8 +111,16 @@ inline void MultiBoxPriorForward(const Tensor<gpu, 2, DType> &out,
   // size = sizes[0], various ratios
   for (int j = 1; j < num_ratios; ++j) {
     cuda::AssignPriors<DType><<<dimGrid, dimBlock, 0, stream>>>(out_ptr,
-      sizes[0], sqrtf(ratios[j]), in_width, in_height, step_x, step_y,
-       offset_y, offset_x, stride, offset);
+                                                                sizes[0],
+                                                                sqrtf(ratios[j]),
+                                                                in_width,
+                                                                in_height,
+                                                                step_x,
+                                                                step_y,
+                                                                offset_y,
+                                                                offset_x,
+                                                                stride,
+                                                                offset);
     ++offset;
   }
   MULTIBOXPRIOR_CUDA_CHECK(cudaGetLastError());
@@ -105,12 +129,10 @@ inline void MultiBoxPriorForward(const Tensor<gpu, 2, DType> &out,
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(MultiBoxPriorParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MultiBoxPriorOp<gpu, DType>(param);
-  });
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MultiBoxPriorOp<gpu, DType>(param); });
   return op;
 }
 
diff --git a/src/operator/contrib/multibox_target-inl.h b/src/operator/contrib/multibox_target-inl.h
index f7564440bb39..98d0983d1de4 100644
--- a/src/operator/contrib/multibox_target-inl.h
+++ b/src/operator/contrib/multibox_target-inl.h
@@ -22,7 +22,7 @@
  * \file multibox_target-inl.h
  * \brief
  * \author Joshua Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_MULTIBOX_TARGET_INL_H_
 #define MXNET_OPERATOR_CONTRIB_MULTIBOX_TARGET_INL_H_
 #include <dmlc/logging.h>
@@ -42,18 +42,19 @@ namespace op {
 
 namespace mshadow_op {
 struct safe_divide {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
-    if (b == DType(0.0f)) return DType(0.0f);
+    if (b == DType(0.0f))
+      return DType(0.0f);
     return DType(a / b);
   }
 };  // struct safe_divide
 }  // namespace mshadow_op
 
 namespace mboxtarget_enum {
-enum MultiBoxTargetOpInputs {kAnchor, kLabel, kClsPred};
-enum MultiBoxTargetOpOutputs {kLoc, kLocMask, kCls};
-enum MultiBoxTargetOpResource {kTempSpace};
+enum MultiBoxTargetOpInputs { kAnchor, kLabel, kClsPred };
+enum MultiBoxTargetOpOutputs { kLoc, kLocMask, kCls };
+enum MultiBoxTargetOpResource { kTempSpace };
 }  // namespace mboxtarget_enum
 
 struct MultiBoxTargetParam : public dmlc::Parameter<MultiBoxTargetParam> {
@@ -64,62 +65,60 @@ struct MultiBoxTargetParam : public dmlc::Parameter<MultiBoxTargetParam> {
   int minimum_negative_samples;
   mxnet::Tuple<float> variances;
   DMLC_DECLARE_PARAMETER(MultiBoxTargetParam) {
-    DMLC_DECLARE_FIELD(overlap_threshold).set_default(0.5f)
-    .describe("Anchor-GT overlap threshold to be regarded as a positive match.");
-    DMLC_DECLARE_FIELD(ignore_label).set_default(-1.0f)
-    .describe("Label for ignored anchors.");
-    DMLC_DECLARE_FIELD(negative_mining_ratio).set_default(-1.0f)
-    .describe("Max negative to positive samples ratio, use -1 to disable mining");
-    DMLC_DECLARE_FIELD(negative_mining_thresh).set_default(0.5f)
-    .describe("Threshold used for negative mining.");
-    DMLC_DECLARE_FIELD(minimum_negative_samples).set_default(0)
-    .describe("Minimum number of negative samples.");
-    DMLC_DECLARE_FIELD(variances).set_default({0.1f, 0.1f, 0.2f, 0.2f})
-    .describe("Variances to be encoded in box regression target.");
+    DMLC_DECLARE_FIELD(overlap_threshold)
+        .set_default(0.5f)
+        .describe("Anchor-GT overlap threshold to be regarded as a positive match.");
+    DMLC_DECLARE_FIELD(ignore_label).set_default(-1.0f).describe("Label for ignored anchors.");
+    DMLC_DECLARE_FIELD(negative_mining_ratio)
+        .set_default(-1.0f)
+        .describe("Max negative to positive samples ratio, use -1 to disable mining");
+    DMLC_DECLARE_FIELD(negative_mining_thresh)
+        .set_default(0.5f)
+        .describe("Threshold used for negative mining.");
+    DMLC_DECLARE_FIELD(minimum_negative_samples)
+        .set_default(0)
+        .describe("Minimum number of negative samples.");
+    DMLC_DECLARE_FIELD(variances)
+        .set_default({0.1f, 0.1f, 0.2f, 0.2f})
+        .describe("Variances to be encoded in box regression target.");
   }
 };  // struct MultiBoxTargetParam
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class MultiBoxTargetOp : public Operator {
  public:
   explicit MultiBoxTargetOp(MultiBoxTargetParam param) {
     this->param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow_op;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 3);
     CHECK_EQ(out_data.size(), 3);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 2, DType> anchors = in_data[mboxtarget_enum::kAnchor]
-      .get_with_shape<xpu, 2, DType>(
-      Shape2(in_data[mboxtarget_enum::kAnchor].size(1), 4), s);
-    Tensor<xpu, 3, DType> labels = in_data[mboxtarget_enum::kLabel]
-      .get<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> cls_preds = in_data[mboxtarget_enum::kClsPred]
-      .get<xpu, 3, DType>(s);
-    Tensor<xpu, 2, DType> loc_target = out_data[mboxtarget_enum::kLoc]
-      .get<xpu, 2, DType>(s);
-    Tensor<xpu, 2, DType> loc_mask = out_data[mboxtarget_enum::kLocMask]
-      .get<xpu, 2, DType>(s);
-    Tensor<xpu, 2, DType> cls_target = out_data[mboxtarget_enum::kCls]
-      .get<xpu, 2, DType>(s);
+    Stream<xpu>* s                = ctx.get_stream<xpu>();
+    Tensor<xpu, 2, DType> anchors = in_data[mboxtarget_enum::kAnchor].get_with_shape<xpu, 2, DType>(
+        Shape2(in_data[mboxtarget_enum::kAnchor].size(1), 4), s);
+    Tensor<xpu, 3, DType> labels     = in_data[mboxtarget_enum::kLabel].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> cls_preds  = in_data[mboxtarget_enum::kClsPred].get<xpu, 3, DType>(s);
+    Tensor<xpu, 2, DType> loc_target = out_data[mboxtarget_enum::kLoc].get<xpu, 2, DType>(s);
+    Tensor<xpu, 2, DType> loc_mask   = out_data[mboxtarget_enum::kLocMask].get<xpu, 2, DType>(s);
+    Tensor<xpu, 2, DType> cls_target = out_data[mboxtarget_enum::kCls].get<xpu, 2, DType>(s);
 
     index_t num_batches = labels.size(0);
     index_t num_anchors = anchors.size(0);
-    index_t num_labels = labels.size(1);
+    index_t num_labels  = labels.size(1);
     // TODO(zhreshold): use maximum valid ground-truth in batch rather than # in dataset
     Shape<4> temp_shape = Shape4(11, num_batches, num_anchors, num_labels);
-    Tensor<xpu, 4, DType> temp_space = ctx.requested[mboxtarget_enum::kTempSpace]
-      .get_space_typed<xpu, 4, DType>(temp_shape, s);
+    Tensor<xpu, 4, DType> temp_space =
+        ctx.requested[mboxtarget_enum::kTempSpace].get_space_typed<xpu, 4, DType>(temp_shape, s);
     loc_target = 0.f;
-    loc_mask = 0.0f;
+    loc_mask   = 0.0f;
     cls_target = param_.ignore_label;
     temp_space = -1.0f;
     CHECK_EQ(anchors.CheckContiguous(), true);
@@ -134,34 +133,41 @@ class MultiBoxTargetOp : public Operator {
     // TODO(zhreshold): squeeze temporary memory space
     // temp_space, 0:out, 1:l1, 2:t1, 3:r1, 4:b1, 5:l2, 6:t2, 7:r2, 8:b2
     // 9: intersection, 10:union
-    temp_space[1] = broadcast_keepdim(broadcast_with_axis(slice<1>(anchors, 0, 1), -1,
-      num_batches), 2, num_labels);
-    temp_space[2] = broadcast_keepdim(broadcast_with_axis(slice<1>(anchors, 1, 2), -1,
-      num_batches), 2, num_labels);
-    temp_space[3] = broadcast_keepdim(broadcast_with_axis(slice<1>(anchors, 2, 3), -1,
-      num_batches), 2, num_labels);
-    temp_space[4] = broadcast_keepdim(broadcast_with_axis(slice<1>(anchors, 3, 4), -1,
-      num_batches), 2, num_labels);
+    temp_space[1] = broadcast_keepdim(
+        broadcast_with_axis(slice<1>(anchors, 0, 1), -1, num_batches), 2, num_labels);
+    temp_space[2] = broadcast_keepdim(
+        broadcast_with_axis(slice<1>(anchors, 1, 2), -1, num_batches), 2, num_labels);
+    temp_space[3] = broadcast_keepdim(
+        broadcast_with_axis(slice<1>(anchors, 2, 3), -1, num_batches), 2, num_labels);
+    temp_space[4] = broadcast_keepdim(
+        broadcast_with_axis(slice<1>(anchors, 3, 4), -1, num_batches), 2, num_labels);
     Shape<3> temp_reshape = Shape3(num_batches, 1, num_labels);
-    temp_space[5] = broadcast_keepdim(reshape(slice<2>(labels, 1, 2), temp_reshape), 1,
-      num_anchors);
-    temp_space[6] = broadcast_keepdim(reshape(slice<2>(labels, 2, 3), temp_reshape), 1,
-      num_anchors);
-    temp_space[7] = broadcast_keepdim(reshape(slice<2>(labels, 3, 4), temp_reshape), 1,
-      num_anchors);
-    temp_space[8] = broadcast_keepdim(reshape(slice<2>(labels, 4, 5), temp_reshape), 1,
-      num_anchors);
+    temp_space[5] =
+        broadcast_keepdim(reshape(slice<2>(labels, 1, 2), temp_reshape), 1, num_anchors);
+    temp_space[6] =
+        broadcast_keepdim(reshape(slice<2>(labels, 2, 3), temp_reshape), 1, num_anchors);
+    temp_space[7] =
+        broadcast_keepdim(reshape(slice<2>(labels, 3, 4), temp_reshape), 1, num_anchors);
+    temp_space[8] =
+        broadcast_keepdim(reshape(slice<2>(labels, 4, 5), temp_reshape), 1, num_anchors);
     temp_space[9] = F<maximum>(ScalarExp<DType>(0.0f),
-      F<minimum>(temp_space[3], temp_space[7]) - F<maximum>(temp_space[1], temp_space[5]))
-        * F<maximum>(ScalarExp<DType>(0.0f),
-        F<minimum>(temp_space[4], temp_space[8]) - F<maximum>(temp_space[2], temp_space[6]));
-    temp_space[10] = (temp_space[3] - temp_space[1]) * (temp_space[4] - temp_space[2])
-     + (temp_space[7] - temp_space[5]) * (temp_space[8] - temp_space[6])
-      - temp_space[9];
+                               F<minimum>(temp_space[3], temp_space[7]) -
+                                   F<maximum>(temp_space[1], temp_space[5])) *
+                    F<maximum>(ScalarExp<DType>(0.0f),
+                               F<minimum>(temp_space[4], temp_space[8]) -
+                                   F<maximum>(temp_space[2], temp_space[6]));
+    temp_space[10] = (temp_space[3] - temp_space[1]) * (temp_space[4] - temp_space[2]) +
+                     (temp_space[7] - temp_space[5]) * (temp_space[8] - temp_space[6]) -
+                     temp_space[9];
     temp_space[0] = F<safe_divide>(temp_space[9], temp_space[10]);
 
-    MultiBoxTargetForward(loc_target, loc_mask, cls_target,
-                          anchors, labels, cls_preds, temp_space,
+    MultiBoxTargetForward(loc_target,
+                          loc_mask,
+                          cls_target,
+                          anchors,
+                          labels,
+                          cls_preds,
+                          temp_space,
                           param_.overlap_threshold,
                           param_.ignore_label,
                           param_.negative_mining_ratio,
@@ -170,25 +176,25 @@ class MultiBoxTargetOp : public Operator {
                           param_.variances);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
-  using namespace mshadow;
-  using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Tensor<xpu, 2, DType> grad = in_grad[mboxtarget_enum::kClsPred].FlatTo2D<xpu, DType>(s);
-  grad = 0.f;
-}
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
+    using namespace mshadow;
+    using namespace mshadow::expr;
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
+    Tensor<xpu, 2, DType> grad = in_grad[mboxtarget_enum::kClsPred].FlatTo2D<xpu, DType>(s);
+    grad                       = 0.f;
+  }
 
  private:
   MultiBoxTargetParam param_;
 };  // class MultiBoxTargetOp
 
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(MultiBoxTargetParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -210,9 +216,9 @@ class MultiBoxTargetProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 3) << "Input: [anchor, label, clsPred]";
     mxnet::TShape ashape = in_shape->at(mboxtarget_enum::kAnchor);
@@ -227,8 +233,8 @@ class MultiBoxTargetProp : public OperatorProperty {
     mxnet::TShape pshape = in_shape->at(mboxtarget_enum::kClsPred);
     CHECK_EQ(pshape.ndim(), 3) << "Prediction: [batch, num_classes, num_anchors]";
     CHECK_EQ(pshape[2], ashape[1]) << "Number of anchors mismatch";
-    mxnet::TShape loc_shape = Shape2(lshape[0], ashape.Size());  // batch - (num_box * 4)
-    mxnet::TShape lm_shape = loc_shape;
+    mxnet::TShape loc_shape   = Shape2(lshape[0], ashape.Size());  // batch - (num_box * 4)
+    mxnet::TShape lm_shape    = loc_shape;
     mxnet::TShape label_shape = Shape2(lshape[0], ashape[1]);  // batch - num_box
     out_shape->clear();
     out_shape->push_back(loc_shape);
@@ -239,7 +245,7 @@ class MultiBoxTargetProp : public OperatorProperty {
 
   OperatorProperty* Copy() const override {
     MultiBoxTargetProp* MultiBoxTarget_sym = new MultiBoxTargetProp();
-    MultiBoxTarget_sym->param_ = this->param_;
+    MultiBoxTarget_sym->param_             = this->param_;
     return MultiBoxTarget_sym;
   }
 
@@ -248,15 +254,13 @@ class MultiBoxTargetProp : public OperatorProperty {
   }
 
   //  decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {};
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-       const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
@@ -265,12 +269,13 @@ class MultiBoxTargetProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                              std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   MultiBoxTargetParam param_;
-};  // class MultiBoxTargetProp
+};      // class MultiBoxTargetProp
 #endif  // DMLC_USE_CXX11
 
 }  // namespace op
diff --git a/src/operator/contrib/multibox_target.cc b/src/operator/contrib/multibox_target.cc
index feab3977f82c..962ddb6df4e8 100644
--- a/src/operator/contrib/multibox_target.cc
+++ b/src/operator/contrib/multibox_target.cc
@@ -22,36 +22,40 @@
  * \file multibox_target.cc
  * \brief MultiBoxTarget op
  * \author Joshua Zhang
-*/
+ */
 #include <algorithm>
 #include "./multibox_target-inl.h"
 #include "../mshadow_op.h"
 
 namespace mshadow {
-template<typename DType>
-inline void AssignLocTargets(const DType *anchor, const DType *l, DType *dst,
-                             const float vx, const float vy,
-                             const float vw, const float vh) {
-  float al = *(anchor);
-  float at = *(anchor+1);
-  float ar = *(anchor+2);
-  float ab = *(anchor+3);
-  float aw = ar - al;
-  float ah = ab - at;
-  float ax = (al + ar) * 0.5;
-  float ay = (at + ab) * 0.5;
-  float gl = *(l);
-  float gt = *(l+1);
-  float gr = *(l+2);
-  float gb = *(l+3);
-  float gw = gr - gl;
-  float gh = gb - gt;
-  float gx = (gl + gr) * 0.5;
-  float gy = (gt + gb) * 0.5;
-  *(dst) = DType((gx - ax) / aw / vx);
-  *(dst+1) = DType((gy - ay) / ah / vy);
-  *(dst+2) = DType(std::log(gw / aw) / vw);
-  *(dst+3) = DType(std::log(gh / ah) / vh);
+template <typename DType>
+inline void AssignLocTargets(const DType* anchor,
+                             const DType* l,
+                             DType* dst,
+                             const float vx,
+                             const float vy,
+                             const float vw,
+                             const float vh) {
+  float al   = *(anchor);
+  float at   = *(anchor + 1);
+  float ar   = *(anchor + 2);
+  float ab   = *(anchor + 3);
+  float aw   = ar - al;
+  float ah   = ab - at;
+  float ax   = (al + ar) * 0.5;
+  float ay   = (at + ab) * 0.5;
+  float gl   = *(l);
+  float gt   = *(l + 1);
+  float gr   = *(l + 2);
+  float gb   = *(l + 3);
+  float gw   = gr - gl;
+  float gh   = gb - gt;
+  float gx   = (gl + gr) * 0.5;
+  float gy   = (gt + gb) * 0.5;
+  *(dst)     = DType((gx - ax) / aw / vx);
+  *(dst + 1) = DType((gy - ay) / ah / vy);
+  *(dst + 2) = DType(std::log(gw / aw) / vw);
+  *(dst + 3) = DType(std::log(gh / ah) / vh);
 }
 
 struct SortElemDescend {
@@ -63,35 +67,35 @@ struct SortElemDescend {
     index = i;
   }
 
-  bool operator<(const SortElemDescend &other) const {
+  bool operator<(const SortElemDescend& other) const {
     return value > other.value;
   }
 };
 
-template<typename DType>
-inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
-                           const Tensor<cpu, 2, DType> &loc_mask,
-                           const Tensor<cpu, 2, DType> &cls_target,
-                           const Tensor<cpu, 2, DType> &anchors,
-                           const Tensor<cpu, 3, DType> &labels,
-                           const Tensor<cpu, 3, DType> &cls_preds,
-                           const Tensor<cpu, 4, DType> &temp_space,
-                           const float overlap_threshold,
-                           const float background_label,
-                           const float negative_mining_ratio,
-                           const float negative_mining_thresh,
-                           const int minimum_negative_samples,
-                           const mxnet::Tuple<float> &variances) {
-  const DType *p_anchor = anchors.dptr_;
+template <typename DType>
+inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType>& loc_target,
+                                  const Tensor<cpu, 2, DType>& loc_mask,
+                                  const Tensor<cpu, 2, DType>& cls_target,
+                                  const Tensor<cpu, 2, DType>& anchors,
+                                  const Tensor<cpu, 3, DType>& labels,
+                                  const Tensor<cpu, 3, DType>& cls_preds,
+                                  const Tensor<cpu, 4, DType>& temp_space,
+                                  const float overlap_threshold,
+                                  const float background_label,
+                                  const float negative_mining_ratio,
+                                  const float negative_mining_thresh,
+                                  const int minimum_negative_samples,
+                                  const mxnet::Tuple<float>& variances) {
+  const DType* p_anchor = anchors.dptr_;
   const int num_batches = labels.size(0);
-  const int num_labels = labels.size(1);
+  const int num_labels  = labels.size(1);
   const int label_width = labels.size(2);
   const int num_anchors = anchors.size(0);
   CHECK_EQ(variances.ndim(), 4);
   for (int nbatch = 0; nbatch < num_batches; ++nbatch) {
-    const DType *p_label = labels.dptr_ + nbatch * num_labels * label_width;
-    const DType *p_overlaps = temp_space.dptr_ + nbatch * num_anchors * num_labels;
-    int num_valid_gt = 0;
+    const DType* p_label    = labels.dptr_ + nbatch * num_labels * label_width;
+    const DType* p_overlaps = temp_space.dptr_ + nbatch * num_anchors * num_labels;
+    int num_valid_gt        = 0;
     for (int i = 0; i < num_labels; ++i) {
       if (static_cast<float>(*(p_label + i * label_width)) == -1.0f) {
         CHECK_EQ(static_cast<float>(*(p_label + i * label_width + 1)), -1.0f);
@@ -105,20 +109,19 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
 
     if (num_valid_gt > 0) {
       std::vector<bool> gt_flags(num_valid_gt, false);
-      std::vector<std::pair<float, int>> max_matches(num_anchors,
-        std::pair<float, int>(-1.0f, -1));
+      std::vector<std::pair<float, int>> max_matches(num_anchors, std::pair<float, int>(-1.0f, -1));
       std::vector<char> anchor_flags(num_anchors, -1);  // -1 means don't care
       int num_positive = 0;
       while (std::find(gt_flags.begin(), gt_flags.end(), false) != gt_flags.end()) {
         // ground-truths not fully matched
-        int best_anchor = -1;
-        int best_gt = -1;
+        int best_anchor   = -1;
+        int best_gt       = -1;
         float max_overlap = 1e-6;  // start with a very small positive overlap
         for (int j = 0; j < num_anchors; ++j) {
           if (anchor_flags[j] == 1) {
             continue;  // already matched this anchor
           }
-          const DType *pp_overlaps = p_overlaps + j * num_labels;
+          const DType* pp_overlaps = p_overlaps + j * num_labels;
           for (int k = 0; k < num_valid_gt; ++k) {
             if (gt_flags[k]) {
               continue;  // already matched this gt
@@ -126,7 +129,7 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
             float iou = static_cast<float>(*(pp_overlaps + k));
             if (iou > max_overlap) {
               best_anchor = j;
-              best_gt = k;
+              best_gt     = k;
               max_overlap = iou;
             }
           }
@@ -138,11 +141,11 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
         } else {
           CHECK_EQ(max_matches[best_anchor].first, -1.0f);
           CHECK_EQ(max_matches[best_anchor].second, -1);
-          max_matches[best_anchor].first = max_overlap;
+          max_matches[best_anchor].first  = max_overlap;
           max_matches[best_anchor].second = best_gt;
           num_positive += 1;
           // mark as visited
-          gt_flags[best_gt] = true;
+          gt_flags[best_gt]         = true;
           anchor_flags[best_anchor] = 1;
         }
       }  // end while
@@ -153,9 +156,9 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
           if (anchor_flags[j] == 1) {
             continue;  // already matched this anchor
           }
-          const DType *pp_overlaps = p_overlaps + j * num_labels;
-          int best_gt = -1;
-          float max_iou = -1.0f;
+          const DType* pp_overlaps = p_overlaps + j * num_labels;
+          int best_gt              = -1;
+          float max_iou            = -1.0f;
           for (int k = 0; k < num_valid_gt; ++k) {
             float iou = static_cast<float>(*(pp_overlaps + k));
             if (iou > max_iou) {
@@ -166,13 +169,13 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
           if (best_gt != -1) {
             CHECK_EQ(max_matches[j].first, -1.0f);
             CHECK_EQ(max_matches[j].second, -1);
-            max_matches[j].first = max_iou;
+            max_matches[j].first  = max_iou;
             max_matches[j].second = best_gt;
             if (max_iou > overlap_threshold) {
               num_positive += 1;
               // mark as visited
               gt_flags[best_gt] = true;
-              anchor_flags[j] = 1;
+              anchor_flags[j]   = 1;
             }
           }
         }  // end iterate anchors
@@ -180,7 +183,7 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
 
       if (negative_mining_ratio > 0) {
         const int num_classes = cls_preds.size(1);
-        DType *p_cls_preds = cls_preds.dptr_ + nbatch * num_classes * num_anchors;
+        DType* p_cls_preds    = cls_preds.dptr_ + nbatch * num_classes * num_anchors;
         CHECK_GT(negative_mining_thresh, 0);
         int num_negative = num_positive * negative_mining_ratio;
         if (num_negative > (num_anchors - num_positive)) {
@@ -196,9 +199,9 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
             }
             if (max_matches[j].first < 0) {
               // not yet calculated
-              const DType *pp_overlaps = p_overlaps + j * num_labels;
-              int best_gt = -1;
-              float max_iou = -1.0f;
+              const DType* pp_overlaps = p_overlaps + j * num_labels;
+              int best_gt              = -1;
+              float max_iou            = -1.0f;
               for (int k = 0; k < num_valid_gt; ++k) {
                 float iou = static_cast<float>(*(pp_overlaps + k));
                 if (iou > max_iou) {
@@ -209,17 +212,17 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
               if (best_gt != -1) {
                 CHECK_EQ(max_matches[j].first, -1.0f);
                 CHECK_EQ(max_matches[j].second, -1);
-                max_matches[j].first = max_iou;
+                max_matches[j].first  = max_iou;
                 max_matches[j].second = best_gt;
               }
             }
-            if (max_matches[j].first < negative_mining_thresh &&
-                anchor_flags[j] == -1) {
-                // calcuate class predictions
+            if (max_matches[j].first < negative_mining_thresh && anchor_flags[j] == -1) {
+              // calcuate class predictions
               DType max_val = p_cls_preds[j];
               for (int k = 1; k < num_classes; ++k) {
                 DType tmp = p_cls_preds[j + num_anchors * k];
-                if (tmp > max_val) max_val = tmp;
+                if (tmp > max_val)
+                  max_val = tmp;
               }
               DType sum = 0.f;
               for (int k = 0; k < num_classes; ++k) {
@@ -248,28 +251,32 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
       }
 
       // assign training targets
-      DType *p_loc_target = loc_target.dptr_ + nbatch * num_anchors * 4;
-      DType *p_loc_mask = loc_mask.dptr_ + nbatch * num_anchors * 4;
-      DType *p_cls_target = cls_target.dptr_ + nbatch * num_anchors;
+      DType* p_loc_target = loc_target.dptr_ + nbatch * num_anchors * 4;
+      DType* p_loc_mask   = loc_mask.dptr_ + nbatch * num_anchors * 4;
+      DType* p_cls_target = cls_target.dptr_ + nbatch * num_anchors;
       for (int i = 0; i < num_anchors; ++i) {
         if (anchor_flags[i] == 1) {
           // positive sample
           CHECK_GE(max_matches[i].second, 0);
           // 0 reserved for background
-          *(p_cls_target + i) = *(p_label + label_width * max_matches[i].second) + 1;
-          int offset = i * 4;
-          *(p_loc_mask + offset) = 1;
+          *(p_cls_target + i)        = *(p_label + label_width * max_matches[i].second) + 1;
+          int offset                 = i * 4;
+          *(p_loc_mask + offset)     = 1;
           *(p_loc_mask + offset + 1) = 1;
           *(p_loc_mask + offset + 2) = 1;
           *(p_loc_mask + offset + 3) = 1;
           AssignLocTargets(p_anchor + i * 4,
-            p_label + label_width * max_matches[i].second + 1, p_loc_target + offset,
-            variances[0], variances[1], variances[2], variances[3]);
+                           p_label + label_width * max_matches[i].second + 1,
+                           p_loc_target + offset,
+                           variances[0],
+                           variances[1],
+                           variances[2],
+                           variances[3]);
         } else if (anchor_flags[i] == 0) {
           // negative sample
-          *(p_cls_target + i) = 0;
-          int offset = i * 4;
-          *(p_loc_mask + offset) = 0;
+          *(p_cls_target + i)        = 0;
+          int offset                 = i * 4;
+          *(p_loc_mask + offset)     = 0;
           *(p_loc_mask + offset + 1) = 0;
           *(p_loc_mask + offset + 2) = 0;
           *(p_loc_mask + offset + 3) = 0;
@@ -282,17 +289,16 @@ inline void MultiBoxTargetForward(const Tensor<cpu, 2, DType> &loc_target,
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(MultiBoxTargetParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MultiBoxTargetOp<cpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<cpu>(MultiBoxTargetParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MultiBoxTargetOp<cpu, DType>(param); });
   return op;
 }
 
-Operator* MultiBoxTargetProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                       std::vector<int> *in_type) const {
+Operator* MultiBoxTargetProp::CreateOperatorEx(Context ctx,
+                                               mxnet::ShapeVector* in_shape,
+                                               std::vector<int>* in_type) const {
   mxnet::ShapeVector out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferShape(in_shape, &out_shape, &aux_shape));
@@ -302,14 +308,13 @@ Operator* MultiBoxTargetProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *
 
 DMLC_REGISTER_PARAMETER(MultiBoxTargetParam);
 MXNET_REGISTER_OP_PROPERTY(_contrib_MultiBoxTarget, MultiBoxTargetProp)
-.describe("Compute Multibox training targets")
-.add_argument("anchor", "NDArray-or-Symbol", "Generated anchor boxes.")
-.add_argument("label", "NDArray-or-Symbol", "Object detection labels.")
-.add_argument("cls_pred", "NDArray-or-Symbol", "Class predictions.")
-.add_arguments(MultiBoxTargetParam::__FIELDS__());
+    .describe("Compute Multibox training targets")
+    .add_argument("anchor", "NDArray-or-Symbol", "Generated anchor boxes.")
+    .add_argument("label", "NDArray-or-Symbol", "Object detection labels.")
+    .add_argument("cls_pred", "NDArray-or-Symbol", "Class predictions.")
+    .add_arguments(MultiBoxTargetParam::__FIELDS__());
 
-NNVM_REGISTER_OP(_contrib_MultiBoxTarget)
-.add_alias("_npx_multibox_target");
+NNVM_REGISTER_OP(_contrib_MultiBoxTarget).add_alias("_npx_multibox_target");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/multibox_target.cu b/src/operator/contrib/multibox_target.cu
index ffa1a132c419..4030c1e4100f 100644
--- a/src/operator/contrib/multibox_target.cu
+++ b/src/operator/contrib/multibox_target.cu
@@ -22,26 +22,28 @@
  * \file multibox_target.cu
  * \brief MultiBoxTarget op
  * \author Joshua Zhang
-*/
+ */
 #include "./multibox_target-inl.h"
 #include <mshadow/cuda/tensor_gpu-inl.cuh>
 
-#define MULTIBOX_TARGET_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define MULTIBOX_TARGET_CUDA_CHECK(condition)                         \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
   } while (0)
 
 namespace mshadow {
 namespace cuda {
-template<typename DType>
-__global__ void InitGroundTruthFlags(DType *gt_flags, const DType *labels,
+template <typename DType>
+__global__ void InitGroundTruthFlags(DType* gt_flags,
+                                     const DType* labels,
                                      const int num_batches,
                                      const int num_labels,
                                      const int label_width) {
   int index = blockIdx.x * blockDim.x + threadIdx.x;
-  if (index >= num_batches * num_labels) return;
+  if (index >= num_batches * num_labels)
+    return;
   int b = index / num_labels;
   int l = index % num_labels;
   if (*(labels + b * num_labels * label_width + l * label_width) == -1.f) {
@@ -51,10 +53,13 @@ __global__ void InitGroundTruthFlags(DType *gt_flags, const DType *labels,
   }
 }
 
-template<typename DType>
-__global__ void FindBestMatches(DType *best_matches, DType *gt_flags,
-                                DType *anchor_flags, const DType *overlaps,
-                                const int num_anchors, const int num_labels) {
+template <typename DType>
+__global__ void FindBestMatches(DType* best_matches,
+                                DType* gt_flags,
+                                DType* anchor_flags,
+                                const DType* overlaps,
+                                const int num_anchors,
+                                const int num_labels) {
   int nbatch = blockIdx.x;
   gt_flags += nbatch * num_labels;
   overlaps += nbatch * num_anchors * num_labels;
@@ -74,20 +79,22 @@ __global__ void FindBestMatches(DType *best_matches, DType *gt_flags,
         break;
       }
     }
-    if (finished) break;  // all done.
+    if (finished)
+      break;  // all done.
 
     // finding max indices in different threads
-    int max_x = -1;
-    int max_y = -1;
+    int max_x       = -1;
+    int max_y       = -1;
     DType max_value = 1e-6;  // start with very small overlap
     for (int i = threadIdx.x; i < num_anchors; i += num_threads) {
-      if (anchor_flags[i] > .5) continue;
+      if (anchor_flags[i] > .5)
+        continue;
       for (int j = 0; j < num_labels; ++j) {
         if (gt_flags[j] > .5) {
           DType temp = overlaps[i * num_labels + j];
           if (temp > max_value) {
-            max_x = j;
-            max_y = i;
+            max_x     = j;
+            max_y     = i;
             max_value = temp;
           }
         }
@@ -95,27 +102,28 @@ __global__ void FindBestMatches(DType *best_matches, DType *gt_flags,
     }
     max_indices_x[threadIdx.x] = max_x;
     max_indices_y[threadIdx.x] = max_y;
-    max_values[threadIdx.x] = max_value;
+    max_values[threadIdx.x]    = max_value;
     __syncthreads();
 
     if (threadIdx.x == 0) {
       // merge results and assign best match
-      int max_x = -1;
-      int max_y = -1;
+      int max_x       = -1;
+      int max_y       = -1;
       DType max_value = -1;
       for (int k = 0; k < num_threads; ++k) {
-        if (max_indices_y[k] < 0 || max_indices_x[k] < 0) continue;
+        if (max_indices_y[k] < 0 || max_indices_x[k] < 0)
+          continue;
         float temp = max_values[k];
         if (temp > max_value) {
-          max_x = max_indices_x[k];
-          max_y = max_indices_y[k];
+          max_x     = max_indices_x[k];
+          max_y     = max_indices_y[k];
           max_value = temp;
         }
       }
       if (max_x >= 0 && max_y >= 0) {
         best_matches[max_y] = max_x;
         // mark flags as visited
-        gt_flags[max_x] = 0.f;
+        gt_flags[max_x]     = 0.f;
         anchor_flags[max_y] = 1.f;
       } else {
         // no more good matches
@@ -128,9 +136,11 @@ __global__ void FindBestMatches(DType *best_matches, DType *gt_flags,
   }
 }
 
-template<typename DType>
-__global__ void FindGoodMatches(DType *best_matches, DType *anchor_flags,
-                                const DType *overlaps, const int num_anchors,
+template <typename DType>
+__global__ void FindGoodMatches(DType* best_matches,
+                                DType* anchor_flags,
+                                const DType* overlaps,
+                                const int num_anchors,
                                 const int num_labels,
                                 const float overlap_threshold) {
   int nbatch = blockIdx.x;
@@ -141,13 +151,13 @@ __global__ void FindGoodMatches(DType *best_matches, DType *anchor_flags,
 
   for (int i = threadIdx.x; i < num_anchors; i += num_threads) {
     if (anchor_flags[i] < 0) {
-      int idx = -1;
+      int idx         = -1;
       float max_value = -1.f;
       for (int j = 0; j < num_labels; ++j) {
         DType temp = overlaps[i * num_labels + j];
         if (temp > max_value) {
           max_value = temp;
-          idx = j;
+          idx       = j;
         }
       }
       if (max_value > overlap_threshold && (idx >= 0)) {
@@ -158,23 +168,27 @@ __global__ void FindGoodMatches(DType *best_matches, DType *anchor_flags,
   }
 }
 
-template<typename DType>
-__global__ void UseAllNegatives(DType *anchor_flags, const int num) {
+template <typename DType>
+__global__ void UseAllNegatives(DType* anchor_flags, const int num) {
   int idx = blockIdx.x * blockDim.x + threadIdx.x;
-  if (idx >= num) return;
+  if (idx >= num)
+    return;
   if (anchor_flags[idx] < 0.5) {
     anchor_flags[idx] = 0;  // regard all non-positive as negatives
   }
 }
 
-template<typename DType>
-__global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
-                               DType *anchor_flags, DType *buffer,
+template <typename DType>
+__global__ void NegativeMining(const DType* overlaps,
+                               const DType* cls_preds,
+                               DType* anchor_flags,
+                               DType* buffer,
                                const float negative_mining_ratio,
                                const float negative_mining_thresh,
                                const int minimum_negative_samples,
                                const int num_anchors,
-                               const int num_labels, const int num_classes) {
+                               const int num_labels,
+                               const int num_classes) {
   int nbatch = blockIdx.x;
   overlaps += nbatch * num_anchors * num_labels;
   cls_preds += nbatch * num_classes * num_anchors;
@@ -201,7 +215,8 @@ __global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
   }
   __syncthreads();
 
-  if (num_negative < 1) return;
+  if (num_negative < 1)
+    return;
 
   for (int i = threadIdx.x; i < num_anchors; i += num_threads) {
     buffer[i] = -1.f;
@@ -210,18 +225,20 @@ __global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
       DType max_val = cls_preds[i];
       for (int j = 1; j < num_classes; ++j) {
         DType temp = cls_preds[i + num_anchors * j];
-        if (temp > max_val) max_val = temp;
+        if (temp > max_val)
+          max_val = temp;
       }
       DType sum = 0.f;
       for (int j = 0; j < num_classes; ++j) {
         DType temp = cls_preds[i + num_anchors * j];
         sum += exp(temp - max_val);
       }
-      DType prob = exp(cls_preds[i] - max_val) / sum;
+      DType prob    = exp(cls_preds[i] - max_val) / sum;
       DType max_iou = -1.f;
       for (int j = 0; j < num_labels; ++j) {
         DType temp = overlaps[i * num_labels + j];
-        if (temp > max_iou) max_iou = temp;
+        if (temp > max_iou)
+          max_iou = temp;
       }
       if (max_iou < negative_mining_thresh) {
         // only do it for anchors with iou < thresh
@@ -232,10 +249,10 @@ __global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
   __syncthreads();
 
   // descend merge sorting for negative mining
-  DType *index_src = buffer + num_anchors;
-  DType *index_dst = buffer + num_anchors * 2;
-  DType *src = index_src;
-  DType *dst = index_dst;
+  DType* index_src = buffer + num_anchors;
+  DType* index_dst = buffer + num_anchors * 2;
+  DType* src       = index_src;
+  DType* dst       = index_dst;
   for (int i = threadIdx.x; i < num_anchors; i += num_threads) {
     index_src[i] = i;
   }
@@ -243,13 +260,16 @@ __global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
 
   for (int width = 2; width < (num_anchors << 1); width <<= 1) {
     int slices = (num_anchors - 1) / (num_threads * width) + 1;
-    int start = width * threadIdx.x * slices;
+    int start  = width * threadIdx.x * slices;
     for (int slice = 0; slice < slices; ++slice) {
-      if (start >= num_anchors) break;
+      if (start >= num_anchors)
+        break;
       int middle = start + (width >> 1);
-      if (num_anchors < middle) middle = num_anchors;
+      if (num_anchors < middle)
+        middle = num_anchors;
       int end = start + width;
-      if (num_anchors < end) end = num_anchors;
+      if (num_anchors < end)
+        end = num_anchors;
       int i = start;
       int j = middle;
       for (int k = start; k < end; ++k) {
@@ -267,8 +287,8 @@ __global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
     }
     __syncthreads();
     // swap src/dst
-    src = src == index_src? index_dst : index_src;
-    dst = dst == index_src? index_dst : index_src;
+    src = src == index_src ? index_dst : index_src;
+    dst = dst == index_src ? index_dst : index_src;
   }
   __syncthreads();
 
@@ -280,14 +300,21 @@ __global__ void NegativeMining(const DType *overlaps, const DType *cls_preds,
   }
 }
 
-template<typename DType>
-__global__ void AssignTrainigTargets(DType *loc_target, DType *loc_mask,
-                                     DType *cls_target, DType *anchor_flags,
-                                     DType *best_matches, DType *labels,
-                                     DType *anchors, const int num_anchors,
-                                     const int num_labels, const int label_width,
-                                     const float vx, const float vy,
-                                     const float vw, const float vh) {
+template <typename DType>
+__global__ void AssignTrainigTargets(DType* loc_target,
+                                     DType* loc_mask,
+                                     DType* cls_target,
+                                     DType* anchor_flags,
+                                     DType* best_matches,
+                                     DType* labels,
+                                     DType* anchors,
+                                     const int num_anchors,
+                                     const int num_labels,
+                                     const int label_width,
+                                     const float vx,
+                                     const float vy,
+                                     const float vw,
+                                     const float vh) {
   const int nbatch = blockIdx.x;
   loc_target += nbatch * num_anchors * 4;
   loc_mask += nbatch * num_anchors * 4;
@@ -300,34 +327,34 @@ __global__ void AssignTrainigTargets(DType *loc_target, DType *loc_mask,
   for (int i = threadIdx.x; i < num_anchors; i += num_threads) {
     if (anchor_flags[i] > 0.5) {
       // positive sample
-      int offset_l = static_cast<int>(best_matches[i]) * label_width;
-      cls_target[i] = labels[offset_l] + 1;  // 0 reserved for background
-      int offset = i * 4;
-      loc_mask[offset] = 1;
+      int offset_l         = static_cast<int>(best_matches[i]) * label_width;
+      cls_target[i]        = labels[offset_l] + 1;  // 0 reserved for background
+      int offset           = i * 4;
+      loc_mask[offset]     = 1;
       loc_mask[offset + 1] = 1;
       loc_mask[offset + 2] = 1;
       loc_mask[offset + 3] = 1;
       // regression targets
-      float al = anchors[offset];
-      float at = anchors[offset + 1];
-      float ar = anchors[offset + 2];
-      float ab = anchors[offset + 3];
-      float aw = ar - al;
-      float ah = ab - at;
-      float ax = (al + ar) * 0.5;
-      float ay = (at + ab) * 0.5;
-      float gl = labels[offset_l + 1];
-      float gt = labels[offset_l + 2];
-      float gr = labels[offset_l + 3];
-      float gb = labels[offset_l + 4];
-      float gw = gr - gl;
-      float gh = gb - gt;
-      float gx = (gl + gr) * 0.5;
-      float gy = (gt + gb) * 0.5;
-      loc_target[offset] = DType((gx - ax) / aw / vx);  // xmin
+      float al               = anchors[offset];
+      float at               = anchors[offset + 1];
+      float ar               = anchors[offset + 2];
+      float ab               = anchors[offset + 3];
+      float aw               = ar - al;
+      float ah               = ab - at;
+      float ax               = (al + ar) * 0.5;
+      float ay               = (at + ab) * 0.5;
+      float gl               = labels[offset_l + 1];
+      float gt               = labels[offset_l + 2];
+      float gr               = labels[offset_l + 3];
+      float gb               = labels[offset_l + 4];
+      float gw               = gr - gl;
+      float gh               = gb - gt;
+      float gx               = (gl + gr) * 0.5;
+      float gy               = (gt + gb) * 0.5;
+      loc_target[offset]     = DType((gx - ax) / aw / vx);  // xmin
       loc_target[offset + 1] = DType((gy - ay) / ah / vy);  // ymin
-      loc_target[offset + 2] = DType(log(gw / aw) / vw);  // xmax
-      loc_target[offset + 3] = DType(log(gh / ah) / vh);  // ymax
+      loc_target[offset + 2] = DType(log(gw / aw) / vw);    // xmax
+      loc_target[offset + 3] = DType(log(gh / ah) / vh);    // ymax
     } else if (anchor_flags[i] < 0.5 && anchor_flags[i] > -0.5) {
       // background
       cls_target[i] = 0;
@@ -336,22 +363,22 @@ __global__ void AssignTrainigTargets(DType *loc_target, DType *loc_mask,
 }
 }  // namespace cuda
 
-template<typename DType>
-inline void MultiBoxTargetForward(const Tensor<gpu, 2, DType> &loc_target,
-                           const Tensor<gpu, 2, DType> &loc_mask,
-                           const Tensor<gpu, 2, DType> &cls_target,
-                           const Tensor<gpu, 2, DType> &anchors,
-                           const Tensor<gpu, 3, DType> &labels,
-                           const Tensor<gpu, 3, DType> &cls_preds,
-                           const Tensor<gpu, 4, DType> &temp_space,
-                           const float overlap_threshold,
-                           const float background_label,
-                           const float negative_mining_ratio,
-                           const float negative_mining_thresh,
-                           const int minimum_negative_samples,
-                           const mxnet::Tuple<float> &variances) {
+template <typename DType>
+inline void MultiBoxTargetForward(const Tensor<gpu, 2, DType>& loc_target,
+                                  const Tensor<gpu, 2, DType>& loc_mask,
+                                  const Tensor<gpu, 2, DType>& cls_target,
+                                  const Tensor<gpu, 2, DType>& anchors,
+                                  const Tensor<gpu, 3, DType>& labels,
+                                  const Tensor<gpu, 3, DType>& cls_preds,
+                                  const Tensor<gpu, 4, DType>& temp_space,
+                                  const float overlap_threshold,
+                                  const float background_label,
+                                  const float negative_mining_ratio,
+                                  const float negative_mining_thresh,
+                                  const int minimum_negative_samples,
+                                  const mxnet::Tuple<float>& variances) {
   const int num_batches = labels.size(0);
-  const int num_labels = labels.size(1);
+  const int num_labels  = labels.size(1);
   const int label_width = labels.size(2);
   const int num_anchors = anchors.size(0);
   const int num_classes = cls_preds.size(1);
@@ -360,32 +387,31 @@ inline void MultiBoxTargetForward(const Tensor<gpu, 2, DType> &loc_target,
   CHECK_EQ(variances.ndim(), 4);
 
   // init ground-truth flags, by checking valid labels
-  temp_space[1] = 0.f;
-  DType *gt_flags = temp_space[1].dptr_;
+  temp_space[1]         = 0.f;
+  DType* gt_flags       = temp_space[1].dptr_;
   const int num_threads = cuda::kMaxThreadsPerBlock;
   dim3 init_thread_dim(num_threads);
   dim3 init_block_dim((num_batches * num_labels - 1) / num_threads + 1);
   cuda::CheckLaunchParam(init_block_dim, init_thread_dim, "MultiBoxTarget Init");
   cuda::InitGroundTruthFlags<DType><<<init_block_dim, init_thread_dim>>>(
-    gt_flags, labels.dptr_, num_batches, num_labels, label_width);
+      gt_flags, labels.dptr_, num_batches, num_labels, label_width);
   MULTIBOX_TARGET_CUDA_CHECK(cudaGetLastError());
 
   // compute best matches
-  temp_space[2] = -1.f;
-  temp_space[3] = -1.f;
-  DType *anchor_flags = temp_space[2].dptr_;
-  DType *best_matches = temp_space[3].dptr_;
-  const DType *overlaps = temp_space[0].dptr_;
+  temp_space[2]         = -1.f;
+  temp_space[3]         = -1.f;
+  DType* anchor_flags   = temp_space[2].dptr_;
+  DType* best_matches   = temp_space[3].dptr_;
+  const DType* overlaps = temp_space[0].dptr_;
   cuda::CheckLaunchParam(num_batches, num_threads, "MultiBoxTarget Matching");
-  cuda::FindBestMatches<DType><<<num_batches, num_threads>>>(best_matches,
-    gt_flags, anchor_flags, overlaps, num_anchors, num_labels);
+  cuda::FindBestMatches<DType><<<num_batches, num_threads>>>(
+      best_matches, gt_flags, anchor_flags, overlaps, num_anchors, num_labels);
   MULTIBOX_TARGET_CUDA_CHECK(cudaGetLastError());
 
   // find good matches with overlap > threshold
   if (overlap_threshold > 0) {
-    cuda::FindGoodMatches<DType><<<num_batches, num_threads>>>(best_matches,
-      anchor_flags, overlaps, num_anchors, num_labels,
-      overlap_threshold);
+    cuda::FindGoodMatches<DType><<<num_batches, num_threads>>>(
+        best_matches, anchor_flags, overlaps, num_anchors, num_labels, overlap_threshold);
     MULTIBOX_TARGET_CUDA_CHECK(cudaGetLastError());
   }
 
@@ -393,36 +419,50 @@ inline void MultiBoxTargetForward(const Tensor<gpu, 2, DType> &loc_target,
   if (negative_mining_ratio > 0) {
     CHECK_GT(negative_mining_thresh, 0);
     temp_space[4] = 0;
-    DType *buffer = temp_space[4].dptr_;
+    DType* buffer = temp_space[4].dptr_;
     cuda::NegativeMining<DType><<<num_batches, num_threads>>>(overlaps,
-      cls_preds.dptr_, anchor_flags, buffer, negative_mining_ratio,
-      negative_mining_thresh, minimum_negative_samples,
-      num_anchors, num_labels, num_classes);
+                                                              cls_preds.dptr_,
+                                                              anchor_flags,
+                                                              buffer,
+                                                              negative_mining_ratio,
+                                                              negative_mining_thresh,
+                                                              minimum_negative_samples,
+                                                              num_anchors,
+                                                              num_labels,
+                                                              num_classes);
     MULTIBOX_TARGET_CUDA_CHECK(cudaGetLastError());
   } else {
     int num_blocks = (num_batches * num_anchors - 1) / num_threads + 1;
     cuda::CheckLaunchParam(num_blocks, num_threads, "MultiBoxTarget Negative");
-    cuda::UseAllNegatives<DType><<<num_blocks, num_threads>>>(anchor_flags,
-      num_batches * num_anchors);
+    cuda::UseAllNegatives<DType>
+        <<<num_blocks, num_threads>>>(anchor_flags, num_batches * num_anchors);
     MULTIBOX_TARGET_CUDA_CHECK(cudaGetLastError());
   }
 
-  cuda::AssignTrainigTargets<DType><<<num_batches, num_threads>>>(
-    loc_target.dptr_, loc_mask.dptr_, cls_target.dptr_, anchor_flags,
-    best_matches, labels.dptr_, anchors.dptr_, num_anchors, num_labels,
-    label_width, variances[0], variances[1], variances[2], variances[3]);
+  cuda::AssignTrainigTargets<DType><<<num_batches, num_threads>>>(loc_target.dptr_,
+                                                                  loc_mask.dptr_,
+                                                                  cls_target.dptr_,
+                                                                  anchor_flags,
+                                                                  best_matches,
+                                                                  labels.dptr_,
+                                                                  anchors.dptr_,
+                                                                  num_anchors,
+                                                                  num_labels,
+                                                                  label_width,
+                                                                  variances[0],
+                                                                  variances[1],
+                                                                  variances[2],
+                                                                  variances[3]);
   MULTIBOX_TARGET_CUDA_CHECK(cudaGetLastError());
 }
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<gpu>(MultiBoxTargetParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MultiBoxTargetOp<gpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<gpu>(MultiBoxTargetParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MultiBoxTargetOp<gpu, DType>(param); });
   return op;
 }
 }  // namespace op
diff --git a/src/operator/contrib/nn/deformable_im2col.h b/src/operator/contrib/nn/deformable_im2col.h
index 3f42668b86be..94eb2f22696b 100644
--- a/src/operator/contrib/nn/deformable_im2col.h
+++ b/src/operator/contrib/nn/deformable_im2col.h
@@ -75,7 +75,8 @@ template <typename DType>
 inline DType im2col_bilinear_cpu(const DType* data,
                                  const index_t height,
                                  const index_t width,
-                                 DType h, DType w) {
+                                 DType h,
+                                 DType w) {
   index_t h_low = floor(h);
   index_t w_low = floor(w);
   index_t h_high;
@@ -83,14 +84,14 @@ inline DType im2col_bilinear_cpu(const DType* data,
 
   if (h_low >= height - 1) {
     h_high = height - 1;
-    h = static_cast<DType>(h_low);
+    h      = static_cast<DType>(h_low);
   } else {
     h_high = h_low + 1;
   }
 
   if (w_low >= width - 1) {
     w_high = width - 1;
-    w = static_cast<DType>(w_low);
+    w      = static_cast<DType>(w_low);
   } else {
     w_high = w_low + 1;
   }
@@ -108,11 +109,13 @@ inline DType im2col_bilinear_cpu(const DType* data,
   return w1 * v1 + w2 * v2 + w3 * v3 + w4 * v4;
 }
 
-
 template <typename DType>
-inline DType get_gradient_weight_cpu(DType argmax_h, DType argmax_w,
-                                    const index_t h, const index_t w,
-                                    const index_t height, const index_t width) {
+inline DType get_gradient_weight_cpu(DType argmax_h,
+                                     DType argmax_w,
+                                     const index_t h,
+                                     const index_t w,
+                                     const index_t height,
+                                     const index_t width) {
   if (argmax_h < 0 || argmax_h > height || argmax_w < 0 || argmax_w > width) {
     // empty
     return 0;
@@ -127,13 +130,13 @@ inline DType get_gradient_weight_cpu(DType argmax_h, DType argmax_w,
   index_t argmax_w_high;
   if (argmax_h_low >= height - 1) {
     argmax_h_high = argmax_h_low = height - 1;
-    argmax_h = static_cast<DType>(argmax_h_low);
+    argmax_h                     = static_cast<DType>(argmax_h_low);
   } else {
     argmax_h_high = argmax_h_low + 1;
   }
   if (argmax_w_low >= width - 1) {
     argmax_w_high = argmax_w_low = width - 1;
-    argmax_w = static_cast<DType>(argmax_w_low);
+    argmax_w                     = static_cast<DType>(argmax_w_low);
   } else {
     argmax_w_high = argmax_w_low + 1;
   }
@@ -154,19 +157,23 @@ inline DType get_gradient_weight_cpu(DType argmax_h, DType argmax_w,
   return weight;
 }
 
-
 template <typename DType>
-inline DType get_coordinate_weight_cpu(DType argmax_h, DType argmax_w,
-                                       const index_t height, const index_t width,
+inline DType get_coordinate_weight_cpu(DType argmax_h,
+                                       DType argmax_w,
+                                       const index_t height,
+                                       const index_t width,
                                        const DType* im_data,
-                                       const index_t data_width, const index_t bp_dir) {
+                                       const index_t data_width,
+                                       const index_t bp_dir) {
   if (argmax_h < 0 || argmax_h > height || argmax_w < 0 || argmax_w > width) {
     // empty
     return 0;
   }
 
-  if (argmax_h < 0) argmax_h = 0;
-  if (argmax_w < 0) argmax_w = 0;
+  if (argmax_h < 0)
+    argmax_h = 0;
+  if (argmax_w < 0)
+    argmax_w = 0;
 
   index_t argmax_h_low = static_cast<index_t>(argmax_h);
   index_t argmax_w_low = static_cast<index_t>(argmax_w);
@@ -174,22 +181,22 @@ inline DType get_coordinate_weight_cpu(DType argmax_h, DType argmax_w,
   index_t argmax_w_high;
   if (argmax_h_low >= height - 1) {
     argmax_h_high = argmax_h_low = height - 1;
-    argmax_h = static_cast<DType>(argmax_h_low);
+    argmax_h                     = static_cast<DType>(argmax_h_low);
   } else {
     argmax_h_high = argmax_h_low + 1;
   }
   if (argmax_w_low >= width - 1) {
     argmax_w_high = argmax_w_low = width - 1;
-    argmax_w = static_cast<DType>(argmax_w_low);
+    argmax_w                     = static_cast<DType>(argmax_w_low);
   } else {
     argmax_w_high = argmax_w_low + 1;
   }
 
   DType weight = 0;
-  DType im_ll = im_data[argmax_h_low * data_width + argmax_w_low];
-  DType im_lh = im_data[argmax_h_low * data_width + argmax_w_high];
-  DType im_hl = im_data[argmax_h_high * data_width + argmax_w_low];
-  DType im_hh = im_data[argmax_h_high * data_width + argmax_w_high];
+  DType im_ll  = im_data[argmax_h_low * data_width + argmax_w_low];
+  DType im_lh  = im_data[argmax_h_low * data_width + argmax_w_high];
+  DType im_hl  = im_data[argmax_h_high * data_width + argmax_w_low];
+  DType im_hh  = im_data[argmax_h_high * data_width + argmax_w_high];
   if (bp_dir == 0) {
     weight += -1 * (argmax_w_low + 1 - argmax_w) * im_ll;
     weight += -1 * (argmax_w - argmax_w_low) * im_lh;
@@ -205,7 +212,6 @@ inline DType get_coordinate_weight_cpu(DType argmax_h, DType argmax_w,
   return weight;
 }
 
-
 /*!
  * \brief deformable_im2col 2D cpu version.
  * DO NOT call this function directly.
@@ -215,16 +221,22 @@ template <typename DType>
 inline void deformable_im2col_cpu(const DType* data_im,
                                   const DType* data_offset,
                                   const index_t channels,
-                                  const index_t height, const index_t width,
-                                  const index_t kernel_h, const index_t kernel_w,
-                                  const index_t pad_h, const index_t pad_w,
-                                  const index_t stride_h, const index_t stride_w,
-                                  const index_t dilation_h, const index_t dilation_w,
+                                  const index_t height,
+                                  const index_t width,
+                                  const index_t kernel_h,
+                                  const index_t kernel_w,
+                                  const index_t pad_h,
+                                  const index_t pad_w,
+                                  const index_t stride_h,
+                                  const index_t stride_w,
+                                  const index_t dilation_h,
+                                  const index_t dilation_w,
                                   const index_t deformable_group,
-                                  const index_t height_col, const index_t width_col,
+                                  const index_t height_col,
+                                  const index_t width_col,
                                   DType* data_col) {
-  const index_t channel_size = height * width;
-  const index_t offset_size = 2 * kernel_h * kernel_w * height_col * width_col;
+  const index_t channel_size      = height * width;
+  const index_t offset_size       = 2 * kernel_h * kernel_w * height_col * width_col;
   const index_t channel_per_group = channels / deformable_group;
   for (index_t channel = 0; channel < channels; channel++, data_im += channel_size) {
     if (channel % channel_per_group == 0 && channel != 0) {
@@ -236,11 +248,11 @@ inline void deformable_im2col_cpu(const DType* data_im,
         for (index_t h_col = 0; h_col < height_col; h_col++) {
           index_t input_col = -pad_w + j * dilation_w;
           for (index_t w_col = 0; w_col < width_col; w_col++) {
-            index_t offset_h_ptr = ((2 * (i * kernel_w + j)) *
-              height_col + h_col) * width_col + w_col;
+            index_t offset_h_ptr =
+                ((2 * (i * kernel_w + j)) * height_col + h_col) * width_col + w_col;
             index_t offset_w_ptr = offset_h_ptr + height_col * width_col;
-            DType im_row = input_row + data_offset[offset_h_ptr];
-            DType im_col = input_col + data_offset[offset_w_ptr];
+            DType im_row         = input_row + data_offset[offset_h_ptr];
+            DType im_col         = input_col + data_offset[offset_w_ptr];
             if (im_row >= 0 && im_col >= 0 && im_row < height && im_col < width) {
               *(data_col++) = im2col_bilinear_cpu(data_im, height, width, im_row, im_col);
             } else {
@@ -255,7 +267,6 @@ inline void deformable_im2col_cpu(const DType* data_im,
   }
 }
 
-
 /*!\brief
  * cpu function of deformable_im2col algorithm
  * \param s device stream
@@ -272,7 +283,8 @@ inline void deformable_im2col_cpu(const DType* data_im,
  */
 template <typename DType>
 inline void deformable_im2col(mshadow::Stream<cpu>* s,
-                              const DType* data_im, const DType* data_offset,
+                              const DType* data_im,
+                              const DType* data_offset,
                               const mxnet::TShape& im_shape,
                               const mxnet::TShape& col_shape,
                               const mxnet::TShape& kernel_shape,
@@ -282,20 +294,28 @@ inline void deformable_im2col(mshadow::Stream<cpu>* s,
                               const index_t deformable_group,
                               DType* data_col) {
   if (2 == kernel_shape.ndim()) {
-    deformable_im2col_cpu(data_im, data_offset,
-                          im_shape[1], im_shape[2], im_shape[3],
-                          kernel_shape[0], kernel_shape[1],
-                          pad[0], pad[1],
-                          stride[0], stride[1],
-                          dilation[0], dilation[1],
+    deformable_im2col_cpu(data_im,
+                          data_offset,
+                          im_shape[1],
+                          im_shape[2],
+                          im_shape[3],
+                          kernel_shape[0],
+                          kernel_shape[1],
+                          pad[0],
+                          pad[1],
+                          stride[0],
+                          stride[1],
+                          dilation[0],
+                          dilation[1],
                           deformable_group,
-                          col_shape[1], col_shape[2], data_col);
+                          col_shape[1],
+                          col_shape[2],
+                          data_col);
   } else {
     LOG(FATAL) << "not implemented";
   }
 }
 
-
 /*!
  * \brief deformable_col2im cpu version.
  * DO NOT call this directly.
@@ -303,53 +323,58 @@ inline void deformable_im2col(mshadow::Stream<cpu>* s,
  */
 template <typename DType>
 inline void deformable_col2im_cpu(const DType* data_col,
-                                  const DType* data_offset, const index_t channels,
-                                  const index_t height, const index_t width,
-                                  const index_t kernel_h, const index_t kernel_w,
-                                  const index_t pad_h, const index_t pad_w,
-                                  const index_t stride_h, const index_t stride_w,
-                                  const index_t dilation_h, const index_t dilation_w,
+                                  const DType* data_offset,
+                                  const index_t channels,
+                                  const index_t height,
+                                  const index_t width,
+                                  const index_t kernel_h,
+                                  const index_t kernel_w,
+                                  const index_t pad_h,
+                                  const index_t pad_w,
+                                  const index_t stride_h,
+                                  const index_t stride_w,
+                                  const index_t dilation_h,
+                                  const index_t dilation_w,
                                   const index_t deformable_group,
-                                  const index_t height_col, const index_t width_col,
+                                  const index_t height_col,
+                                  const index_t width_col,
                                   DType* grad_im) {
   index_t channel_per_group = channels / deformable_group;
-  index_t count = channels * kernel_h * kernel_w * height_col * width_col;
+  index_t count             = channels * kernel_h * kernel_w * height_col * width_col;
   for (index_t index = 0; index < count; ++index) {
     const index_t j = (index / width_col / height_col) % kernel_w;
     const index_t i = (index / width_col / height_col / kernel_w) % kernel_h;
     const index_t c = index / width_col / height_col / kernel_w / kernel_h;
     // compute the start and end of the output
 
-    const index_t group_index = c / channel_per_group;
+    const index_t group_index       = c / channel_per_group;
     const index_t group_offset_step = 2 * kernel_h * kernel_w * height_col * width_col;
 
     index_t w_col = index % width_col;
     index_t h_col = (index / width_col) % height_col;
-    index_t w_in = w_col * stride_w - pad_w;
-    index_t h_in = h_col * stride_h - pad_h;
+    index_t w_in  = w_col * stride_w - pad_w;
+    index_t h_in  = h_col * stride_h - pad_h;
 
     const DType* data_offset_ptr = data_offset + group_index * group_offset_step;
-    const index_t data_offset_h_ptr = ((2 * (i * kernel_w + j)) *
-      height_col + h_col) * width_col + w_col;
+    const index_t data_offset_h_ptr =
+        ((2 * (i * kernel_w + j)) * height_col + h_col) * width_col + w_col;
     const index_t data_offset_w_ptr = data_offset_h_ptr + height_col * width_col;
-    const DType offset_h = data_offset_ptr[data_offset_h_ptr];
-    const DType offset_w = data_offset_ptr[data_offset_w_ptr];
-    const DType cur_inv_h_data = h_in + i * dilation_h + offset_h;
-    const DType cur_inv_w_data = w_in + j * dilation_w + offset_w;
+    const DType offset_h            = data_offset_ptr[data_offset_h_ptr];
+    const DType offset_w            = data_offset_ptr[data_offset_w_ptr];
+    const DType cur_inv_h_data      = h_in + i * dilation_h + offset_h;
+    const DType cur_inv_w_data      = w_in + j * dilation_w + offset_w;
 
     const DType cur_top_grad = data_col[index];
-    const index_t cur_h = static_cast<index_t>(cur_inv_h_data);
-    const index_t cur_w = static_cast<index_t>(cur_inv_w_data);
+    const index_t cur_h      = static_cast<index_t>(cur_inv_h_data);
+    const index_t cur_w      = static_cast<index_t>(cur_inv_w_data);
     for (int dy = -2; dy <= 2; dy++) {
       for (int dx = -2; dx <= 2; dx++) {
-        if (cur_h + dy >= 0 && cur_h + dy < height &&
-          cur_w + dx >= 0 && cur_w + dx < width &&
-          std::abs(cur_inv_h_data - (cur_h + dy)) < 1 &&
-          std::abs(cur_inv_w_data - (cur_w + dx)) < 1
-          ) {
+        if (cur_h + dy >= 0 && cur_h + dy < height && cur_w + dx >= 0 && cur_w + dx < width &&
+            std::abs(cur_inv_h_data - (cur_h + dy)) < 1 &&
+            std::abs(cur_inv_w_data - (cur_w + dx)) < 1) {
           index_t cur_bottom_grad_pos = (c * height + cur_h + dy) * width + cur_w + dx;
-          DType weight = get_gradient_weight_cpu(cur_inv_h_data, cur_inv_w_data,
-                                                 cur_h + dy, cur_w + dx, height, width);
+          DType weight                = get_gradient_weight_cpu(
+              cur_inv_h_data, cur_inv_w_data, cur_h + dy, cur_w + dx, height, width);
           grad_im[cur_bottom_grad_pos] += weight * cur_top_grad;
         }
       }
@@ -357,7 +382,6 @@ inline void deformable_col2im_cpu(const DType* data_col,
   }
 }
 
-
 /*!\brief
  * cpu function of deformable_col2im algorithm
  * \param s device stream
@@ -385,19 +409,28 @@ inline void deformable_col2im(mshadow::Stream<cpu>* s,
                               const index_t deformable_group,
                               DType* grad_im) {
   if (2 == kernel_shape.ndim()) {
-    deformable_col2im_cpu(data_col, data_offset,
-                          im_shape[1], im_shape[2], im_shape[3],
-                          kernel_shape[0], kernel_shape[1],
-                          pad[0], pad[1], stride[0], stride[1],
-                          dilation[0], dilation[1],
+    deformable_col2im_cpu(data_col,
+                          data_offset,
+                          im_shape[1],
+                          im_shape[2],
+                          im_shape[3],
+                          kernel_shape[0],
+                          kernel_shape[1],
+                          pad[0],
+                          pad[1],
+                          stride[0],
+                          stride[1],
+                          dilation[0],
+                          dilation[1],
                           deformable_group,
-                          col_shape[1], col_shape[2], grad_im);
+                          col_shape[1],
+                          col_shape[2],
+                          grad_im);
   } else {
     LOG(FATAL) << "not implemented";
   }
 }
 
-
 /*!
  * \brief deformable_col2im_coord cpu version.
  * DO NOT call this directly.
@@ -408,16 +441,22 @@ inline void deformable_col2im_coord_cpu(const DType* data_col,
                                         const DType* data_im,
                                         const DType* data_offset,
                                         const index_t channels,
-                                        const index_t height, const index_t width,
-                                        const index_t kernel_h, const index_t kernel_w,
-                                        const index_t pad_h, const index_t pad_w,
-                                        const index_t stride_h, const index_t stride_w,
-                                        const index_t dilation_h, const index_t dilation_w,
+                                        const index_t height,
+                                        const index_t width,
+                                        const index_t kernel_h,
+                                        const index_t kernel_w,
+                                        const index_t pad_h,
+                                        const index_t pad_w,
+                                        const index_t stride_h,
+                                        const index_t stride_w,
+                                        const index_t dilation_h,
+                                        const index_t dilation_w,
                                         const index_t deformable_group,
-                                        const index_t height_col, const index_t width_col,
+                                        const index_t height_col,
+                                        const index_t width_col,
                                         DType* grad_offset) {
   index_t channel_per_group = channels * kernel_h * kernel_w / deformable_group;
-  index_t count = height_col * width_col * 2 * kernel_h * kernel_w * deformable_group;
+  index_t count             = height_col * width_col * 2 * kernel_h * kernel_w * deformable_group;
   for (index_t index = 0; index < count; ++index) {
     DType val = 0;
     index_t w = index % width_col;
@@ -425,41 +464,40 @@ inline void deformable_col2im_coord_cpu(const DType* data_col,
     index_t c = index / width_col / height_col;
     // compute the start and end of the output
 
-    const index_t group_index = c / (2 * kernel_h * kernel_w);
-    const index_t group_col_step = channel_per_group * width_col * height_col;
-    const index_t group_im_step = channel_per_group / kernel_h / kernel_w * height * width;
+    const index_t group_index       = c / (2 * kernel_h * kernel_w);
+    const index_t group_col_step    = channel_per_group * width_col * height_col;
+    const index_t group_im_step     = channel_per_group / kernel_h / kernel_w * height * width;
     const index_t group_offset_step = 2 * kernel_h * kernel_w * height_col * width_col;
-    const index_t col_step = kernel_h * kernel_w;
-    const DType* data_col_ptr = data_col + group_index * group_col_step;
-    const DType* data_im_ptr = data_im + group_index * group_im_step;
-    const DType* data_offset_ptr = data_offset + group_index * group_offset_step;
+    const index_t col_step          = kernel_h * kernel_w;
+    const DType* data_col_ptr       = data_col + group_index * group_col_step;
+    const DType* data_im_ptr        = data_im + group_index * group_im_step;
+    const DType* data_offset_ptr    = data_offset + group_index * group_offset_step;
 
-    index_t cnt = 0;
+    index_t cnt            = 0;
     const index_t offset_c = c - group_index * 2 * kernel_h * kernel_w;
 
     for (index_t col_c = (offset_c / 2); col_c < channel_per_group; col_c += col_step) {
       const index_t col_pos = ((col_c * height_col) + h) * width_col + w;
-      const index_t bp_dir = offset_c % 2;
+      const index_t bp_dir  = offset_c % 2;
 
-      index_t j = (col_pos / width_col / height_col) % kernel_w;
-      index_t i = (col_pos / width_col / height_col / kernel_w) % kernel_h;
+      index_t j     = (col_pos / width_col / height_col) % kernel_w;
+      index_t i     = (col_pos / width_col / height_col / kernel_w) % kernel_h;
       index_t w_col = col_pos % width_col;
       index_t h_col = (col_pos / width_col) % height_col;
-      index_t w_in = w_col * stride_w - pad_w;
-      index_t h_in = h_col * stride_h - pad_h;
-      const index_t data_offset_h_ptr = ((2 * (i * kernel_w + j)) *
-        height_col + h_col) * width_col + w_col;
+      index_t w_in  = w_col * stride_w - pad_w;
+      index_t h_in  = h_col * stride_h - pad_h;
+      const index_t data_offset_h_ptr =
+          ((2 * (i * kernel_w + j)) * height_col + h_col) * width_col + w_col;
       const index_t data_offset_w_ptr = data_offset_h_ptr + height_col * width_col;
-      const DType offset_h = data_offset_ptr[data_offset_h_ptr];
-      const DType offset_w = data_offset_ptr[data_offset_w_ptr];
-      DType inv_h = h_in + i * dilation_h + offset_h;
-      DType inv_w = w_in + j * dilation_w + offset_w;
+      const DType offset_h            = data_offset_ptr[data_offset_h_ptr];
+      const DType offset_w            = data_offset_ptr[data_offset_w_ptr];
+      DType inv_h                     = h_in + i * dilation_h + offset_h;
+      DType inv_w                     = w_in + j * dilation_w + offset_w;
       if (inv_h < 0 || inv_w < 0 || inv_h >= height || inv_w >= width) {
         inv_h = inv_w = -1;
       }
-      const DType weight = get_coordinate_weight_cpu(inv_h, inv_w, height, width,
-                                                     data_im_ptr + cnt * height * width,
-                                                     width, bp_dir);
+      const DType weight = get_coordinate_weight_cpu(
+          inv_h, inv_w, height, width, data_im_ptr + cnt * height * width, width, bp_dir);
       val += weight * data_col_ptr[col_pos];
       cnt += 1;
     }
@@ -468,7 +506,6 @@ inline void deformable_col2im_coord_cpu(const DType* data_col,
   }
 }
 
-
 /*!\brief
  * cpu function of deformable_col2im_coord algorithm
  * \param s device stream
@@ -498,13 +535,24 @@ inline void deformable_col2im_coord(mshadow::Stream<cpu>* s,
                                     const index_t deformable_group,
                                     DType* grad_offset) {
   if (2 == kernel_shape.ndim()) {
-    deformable_col2im_coord_cpu(data_col, data_im, data_offset,
-                                im_shape[1], im_shape[2], im_shape[3],
-                                kernel_shape[0], kernel_shape[1],
-                                pad[0], pad[1], stride[0], stride[1],
-                                dilation[0], dilation[1],
+    deformable_col2im_coord_cpu(data_col,
+                                data_im,
+                                data_offset,
+                                im_shape[1],
+                                im_shape[2],
+                                im_shape[3],
+                                kernel_shape[0],
+                                kernel_shape[1],
+                                pad[0],
+                                pad[1],
+                                stride[0],
+                                stride[1],
+                                dilation[0],
+                                dilation[1],
                                 deformable_group,
-                                col_shape[1], col_shape[2], grad_offset);
+                                col_shape[1],
+                                col_shape[2],
+                                grad_offset);
   } else {
     LOG(FATAL) << "not implemented";
   }
diff --git a/src/operator/contrib/nn/modulated_deformable_im2col.h b/src/operator/contrib/nn/modulated_deformable_im2col.h
index b50eb13a8122..6a374f05fb2a 100644
--- a/src/operator/contrib/nn/modulated_deformable_im2col.h
+++ b/src/operator/contrib/nn/modulated_deformable_im2col.h
@@ -91,10 +91,14 @@ namespace mxnet {
 namespace op {
 
 template <typename DType>
-inline DType dmcn_im2col_bilinear_cpu(const DType* bottom_data, const int data_width,
-  const int height, const int width, DType h, DType w) {
-  int h_low = floor(h);
-  int w_low = floor(w);
+inline DType dmcn_im2col_bilinear_cpu(const DType* bottom_data,
+                                      const int data_width,
+                                      const int height,
+                                      const int width,
+                                      DType h,
+                                      DType w) {
+  int h_low  = floor(h);
+  int w_low  = floor(w);
   int h_high = h_low + 1;
   int w_high = w_low + 1;
 
@@ -106,7 +110,7 @@ inline DType dmcn_im2col_bilinear_cpu(const DType* bottom_data, const int data_w
   if (h_low >= 0 && w_low >= 0)
     v1 = bottom_data[h_low * data_width + w_low];
   DType v2 = 0;
-  if (h_low >=0 && w_high <= width - 1)
+  if (h_low >= 0 && w_high <= width - 1)
     v2 = bottom_data[h_low * data_width + w_high];
   DType v3 = 0;
   if (h_high <= height - 1 && w_low >= 0)
@@ -122,26 +126,37 @@ inline DType dmcn_im2col_bilinear_cpu(const DType* bottom_data, const int data_w
 }
 
 /*!
-* \brief deformable_col2im gpu kernel.
-* \brief DO NOT call this directly. Use wrapper function deformable_col2im() instead;
-*/
+ * \brief deformable_col2im gpu kernel.
+ * \brief DO NOT call this directly. Use wrapper function deformable_col2im() instead;
+ */
 struct modulated_deformable_col2im_cpu_kernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(const int index,
-  const DType* data_im, const DType* data_offset, const DType* data_mask,
-  const int height, const int width, const int kernel_h, const int kernel_w,
-  const int pad_h, const int pad_w,
-  const int stride_h, const int stride_w,
-  const int dilation_h, const int dilation_w,
-  const int channel_per_deformable_group,
-  const int batch_size, const int num_channels, const int deformable_group,
-  const int height_col, const int width_col,
-  DType* data_col) {
+                                  const DType* data_im,
+                                  const DType* data_offset,
+                                  const DType* data_mask,
+                                  const int height,
+                                  const int width,
+                                  const int kernel_h,
+                                  const int kernel_w,
+                                  const int pad_h,
+                                  const int pad_w,
+                                  const int stride_h,
+                                  const int stride_w,
+                                  const int dilation_h,
+                                  const int dilation_w,
+                                  const int channel_per_deformable_group,
+                                  const int batch_size,
+                                  const int num_channels,
+                                  const int deformable_group,
+                                  const int height_col,
+                                  const int width_col,
+                                  DType* data_col) {
     // index index of output matrix
     const int w_col = index % width_col;
     const int h_col = (index / width_col) % height_col;
     const int b_col = (index / width_col / height_col) % batch_size;
-    const int c_im = (index / width_col / height_col) / batch_size;
+    const int c_im  = (index / width_col / height_col) / batch_size;
     const int c_col = c_im * kernel_h * kernel_w;
 
     // compute deformable group index
@@ -150,32 +165,31 @@ struct modulated_deformable_col2im_cpu_kernel {
     const int h_in = h_col * stride_h - pad_h;
     const int w_in = w_col * stride_w - pad_w;
 
-    DType* data_col_ptr = data_col
-      + ((c_col * batch_size + b_col) * height_col + h_col) * width_col + w_col;
+    DType* data_col_ptr =
+        data_col + ((c_col * batch_size + b_col) * height_col + h_col) * width_col + w_col;
     // const DType* data_im_ptr = data_im +
     //  ((b_col * num_channels + c_im) * height + h_in) * width + w_in;
     const DType* data_im_ptr = data_im + (b_col * num_channels + c_im) * height * width;
-    const DType* data_offset_ptr = data_offset
-      + (b_col * deformable_group + deformable_group_index) * 2
-      * kernel_h * kernel_w * height_col * width_col;
+    const DType* data_offset_ptr =
+        data_offset + (b_col * deformable_group + deformable_group_index) * 2 * kernel_h *
+                          kernel_w * height_col * width_col;
 
-    const DType* data_mask_ptr = data_mask
-      + (b_col *  deformable_group + deformable_group_index) * kernel_h
-      * kernel_w * height_col * width_col;
+    const DType* data_mask_ptr = data_mask + (b_col * deformable_group + deformable_group_index) *
+                                                 kernel_h * kernel_w * height_col * width_col;
 
     for (int i = 0; i < kernel_h; ++i) {
       for (int j = 0; j < kernel_w; ++j) {
-        const int data_offset_h_ptr = ((2 * (i * kernel_w + j)) * height_col + h_col)
-          * width_col + w_col;
-        const int data_offset_w_ptr = ((2 * (i * kernel_w + j) + 1) * height_col + h_col)
-          * width_col + w_col;
+        const int data_offset_h_ptr =
+            ((2 * (i * kernel_w + j)) * height_col + h_col) * width_col + w_col;
+        const int data_offset_w_ptr =
+            ((2 * (i * kernel_w + j) + 1) * height_col + h_col) * width_col + w_col;
         const int data_mask_hw_ptr = ((i * kernel_w + j) * height_col + h_col) * width_col + w_col;
-        const DType offset_h = data_offset_ptr[data_offset_h_ptr];
-        const DType offset_w = data_offset_ptr[data_offset_w_ptr];
-        const DType mask = data_mask_ptr[data_mask_hw_ptr];
-        DType val = static_cast<DType>(0);
-        const DType h_im = h_in + i * dilation_h + offset_h;
-        const DType w_im = w_in + j * dilation_w + offset_w;
+        const DType offset_h       = data_offset_ptr[data_offset_h_ptr];
+        const DType offset_w       = data_offset_ptr[data_offset_w_ptr];
+        const DType mask           = data_mask_ptr[data_mask_hw_ptr];
+        DType val                  = static_cast<DType>(0);
+        const DType h_im           = h_in + i * dilation_h + offset_h;
+        const DType w_im           = w_in + j * dilation_w + offset_w;
         // if (h_im >= 0 && w_im >= 0 && h_im < height && w_im < width) {
         if (h_im > -1 && w_im > -1 && h_im < height && w_im < width) {
           // const DType map_h = i * dilation_h + offset_h;
@@ -210,28 +224,50 @@ struct modulated_deformable_col2im_cpu_kernel {
  */
 template <typename DType>
 inline void modulated_deformable_im2col(mshadow::Stream<cpu>* s,
-  const DType* data_im, const DType* data_offset, const DType* data_mask,
-  const TShape& im_shape, const TShape& col_shape, const TShape& kernel_shape,
-  const TShape& pad, const TShape& stride, const TShape& dilation,
-  const uint32_t deformable_group, DType* data_col) {
+                                        const DType* data_im,
+                                        const DType* data_offset,
+                                        const DType* data_mask,
+                                        const TShape& im_shape,
+                                        const TShape& col_shape,
+                                        const TShape& kernel_shape,
+                                        const TShape& pad,
+                                        const TShape& stride,
+                                        const TShape& dilation,
+                                        const uint32_t deformable_group,
+                                        DType* data_col) {
   // num_axes should be smaller than block size
-  index_t num_spatial_axes = kernel_shape.ndim();
+  index_t num_spatial_axes             = kernel_shape.ndim();
   index_t channel_per_deformable_group = im_shape[1] / deformable_group;
-  index_t num_kernels = im_shape[1] * col_shape.ProdShape(1, col_shape.ndim());
+  index_t num_kernels                  = im_shape[1] * col_shape.ProdShape(1, col_shape.ndim());
   using namespace mxnet_op;
   if (2 == num_spatial_axes) {
-    Kernel<modulated_deformable_col2im_cpu_kernel, cpu>::Launch(
-        s, num_kernels, data_im, data_offset, data_mask,
-        im_shape[2], im_shape[3], kernel_shape[0], kernel_shape[1],
-        pad[0], pad[1], stride[0], stride[1], dilation[0], dilation[1],
-        channel_per_deformable_group, col_shape[1], im_shape[1], deformable_group,
-        col_shape[2], col_shape[3], data_col);
+    Kernel<modulated_deformable_col2im_cpu_kernel, cpu>::Launch(s,
+                                                                num_kernels,
+                                                                data_im,
+                                                                data_offset,
+                                                                data_mask,
+                                                                im_shape[2],
+                                                                im_shape[3],
+                                                                kernel_shape[0],
+                                                                kernel_shape[1],
+                                                                pad[0],
+                                                                pad[1],
+                                                                stride[0],
+                                                                stride[1],
+                                                                dilation[0],
+                                                                dilation[1],
+                                                                channel_per_deformable_group,
+                                                                col_shape[1],
+                                                                im_shape[1],
+                                                                deformable_group,
+                                                                col_shape[2],
+                                                                col_shape[3],
+                                                                data_col);
   } else {
     LOG(FATAL) << "not implemented";
   }
 }
 
-
 /*!\brief
  * cpu function of deformable_col2im algorithm
  * \param s device stream
@@ -248,15 +284,21 @@ inline void modulated_deformable_im2col(mshadow::Stream<cpu>* s,
  */
 template <typename DType>
 inline void modulated_deformable_col2im(mshadow::Stream<cpu>* s,
-  const DType* data_col, const DType* data_offset, const DType* data_mask,
-  const TShape& im_shape, const TShape& col_shape, const TShape& kernel_shape,
-  const TShape& pad, const TShape& stride,
-  const TShape& dilation, const uint32_t deformable_group,
-  DType* grad_im, OpReqType req) {
+                                        const DType* data_col,
+                                        const DType* data_offset,
+                                        const DType* data_mask,
+                                        const TShape& im_shape,
+                                        const TShape& col_shape,
+                                        const TShape& kernel_shape,
+                                        const TShape& pad,
+                                        const TShape& stride,
+                                        const TShape& dilation,
+                                        const uint32_t deformable_group,
+                                        DType* grad_im,
+                                        OpReqType req) {
   LOG(FATAL) << "only implemented in GPU";
 }
 
-
 /*!\brief
  * cpu function of deformable_col2im_coord algorithm
  * \param s device stream
@@ -275,11 +317,21 @@ inline void modulated_deformable_col2im(mshadow::Stream<cpu>* s,
 
 template <typename DType>
 inline void modulated_deformable_col2im_coord(mshadow::Stream<cpu>* s,
-  const DType* data_col, const DType* data_im, const DType* data_offset, const DType* data_mask,
-  const TShape& im_shape, const TShape& col_shape, const TShape& kernel_shape,
-  const TShape& pad, const TShape& stride,
-  const TShape& dilation, const uint32_t deformable_group,
-  DType* grad_offset, DType* grad_mask, OpReqType offset_req, OpReqType mask_req) {
+                                              const DType* data_col,
+                                              const DType* data_im,
+                                              const DType* data_offset,
+                                              const DType* data_mask,
+                                              const TShape& im_shape,
+                                              const TShape& col_shape,
+                                              const TShape& kernel_shape,
+                                              const TShape& pad,
+                                              const TShape& stride,
+                                              const TShape& dilation,
+                                              const uint32_t deformable_group,
+                                              DType* grad_offset,
+                                              DType* grad_mask,
+                                              OpReqType offset_req,
+                                              OpReqType mask_req) {
   LOG(FATAL) << "only implemented in GPU";
 }
 
diff --git a/src/operator/contrib/nnz.cc b/src/operator/contrib/nnz.cc
index 940c9e02219e..ff0459973afa 100644
--- a/src/operator/contrib/nnz.cc
+++ b/src/operator/contrib/nnz.cc
@@ -38,15 +38,16 @@ struct NNZParam : public dmlc::Parameter<NNZParam> {
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(NNZParam) {
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<int>())
-    .describe("Select between the number of values across the whole matrix, "
-              "in each column, or in each row.");
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Select between the number of values across the whole matrix, "
+            "in each column, or in each row.");
   }
 };
 
 static bool NNZType(const nnvm::NodeAttrs& attrs,
-                    std::vector<int> *in_attrs,
-                    std::vector<int> *out_attrs) {
+                    std::vector<int>* in_attrs,
+                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   // infer int64 for count
@@ -55,8 +56,8 @@ static bool NNZType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NNZShape(const nnvm::NodeAttrs& attrs,
-                     mxnet::ShapeVector *in_attrs,
-                     mxnet::ShapeVector *out_attrs) {
+                     mxnet::ShapeVector* in_attrs,
+                     mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   // csr_matrix is 2-D
@@ -73,12 +74,12 @@ inline bool NNZShape(const nnvm::NodeAttrs& attrs,
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::Shape1(in_attrs->at(0)[0]));
   } else {
     LOG(FATAL) << "Unexpected value for axis(" << param.axis.value()
-      << "). Candidates are None, 0, and 1";
+               << "). Candidates are None, 0, and 1";
   }
   return true;
 }
 
-template<typename xpu>
+template <typename xpu>
 void NNZComputeCsrImpl(const NNZParam& param,
                        const OpContext& ctx,
                        const NDArray& input,
@@ -92,13 +93,13 @@ struct CsrNNZRowKernel {
    * \param out           ptr to output
    * \param indptr        ptr to source csr indptr
    */
-  template<typename IType, typename DType>
+  template <typename IType, typename DType>
   MSHADOW_XINLINE static void Map(int tid, DType* out, const IType* indptr) {
     out[tid] = static_cast<DType>(indptr[tid + 1] - indptr[tid]);
   }
 };
 
-template<>
+template <>
 void NNZComputeCsrImpl<cpu>(const NNZParam& param,
                             const OpContext& ctx,
                             const NDArray& input,
@@ -106,15 +107,15 @@ void NNZComputeCsrImpl<cpu>(const NNZParam& param,
                             const TBlob& output) {
   using namespace csr;
   CHECK_EQ(req, kWriteTo);
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   if (!input.storage_initialized()) {
     Fill<false>(s, output, kWriteTo, 0);
     return;
   }
   MSHADOW_TYPE_SWITCH(output.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(input.aux_type(kIndPtr), IType, {
-      DType* out_ptr = output.dptr<DType>();
-      const IType* indptr = input.aux_data(kIndPtr).dptr<IType>();
+      DType* out_ptr             = output.dptr<DType>();
+      const IType* indptr        = input.aux_data(kIndPtr).dptr<IType>();
       const nnvm::dim_t num_rows = input.shape()[0];
       if (!param.axis.has_value()) {
         // whole matrix
@@ -130,7 +131,7 @@ void NNZComputeCsrImpl<cpu>(const NNZParam& param,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NNZComputeEx(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<NDArray>& inputs,
@@ -139,8 +140,8 @@ void NNZComputeEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const auto in_stype = inputs[0].storage_type();
-  const auto out_stype = outputs[0].storage_type();
+  const auto in_stype   = inputs[0].storage_type();
+  const auto out_stype  = outputs[0].storage_type();
   const NNZParam& param = nnvm::get<NNZParam>(attrs.parsed);
   if (in_stype == kCSRStorage && out_stype == kDefaultStorage) {
     NNZComputeCsrImpl<xpu>(param, ctx, inputs[0], req[0], outputs[0].data());
@@ -152,17 +153,17 @@ void NNZComputeEx(const nnvm::NodeAttrs& attrs,
 bool NNZStorageType(const nnvm::NodeAttrs& attrs,
                     const int dev_mask,
                     DispatchMode* dispatch_mode,
-                    std::vector<int> *in_attrs,
-                    std::vector<int> *out_attrs) {
+                    std::vector<int>* in_attrs,
+                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
-  bool dispatched = false;
+  bool dispatched     = false;
   const auto in_stype = in_attrs->at(0);
-  auto& out_stype = out_attrs->at(0);
+  auto& out_stype     = out_attrs->at(0);
   // only support csr for now
   if (!dispatched && in_stype == kCSRStorage) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
@@ -170,20 +171,20 @@ bool NNZStorageType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NNZParam);
 
 NNVM_REGISTER_OP(_contrib_getnnz)
-.describe(R"code(Number of stored values for a sparse tensor, including explicit zeros.
+    .describe(R"code(Number of stored values for a sparse tensor, including explicit zeros.
 
 This operator only supports CSR matrix on CPU.
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NNZParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NNZShape)
-.set_attr<nnvm::FInferType>("FInferType", NNZType)
-.set_attr<FInferStorageType>("FInferStorageType", NNZStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", NNZComputeEx<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Input")
-.add_arguments(NNZParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NNZParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NNZShape)
+    .set_attr<nnvm::FInferType>("FInferType", NNZType)
+    .set_attr<FInferStorageType>("FInferStorageType", NNZStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", NNZComputeEx<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "Input")
+    .add_arguments(NNZParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/optimizer_op-inl.h b/src/operator/contrib/optimizer_op-inl.h
index 2276b9375012..3e3803cc1a68 100644
--- a/src/operator/contrib/optimizer_op-inl.h
+++ b/src/operator/contrib/optimizer_op-inl.h
@@ -59,47 +59,54 @@ struct GroupAdagradParam : public dmlc::Parameter<GroupAdagradParam> {
             "Clip gradient to the range of [-clip_gradient, clip_gradient] "
             "If clip_gradient <= 0, gradient clipping is turned off. "
             "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(epsilon).set_default(1.0e-5).describe(
-        "Epsilon for numerical stability");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1.0e-5).describe("Epsilon for numerical stability");
   }
 };
 
-inline bool GroupAdagradStorageType(const nnvm::NodeAttrs &attrs,
+inline bool GroupAdagradStorageType(const nnvm::NodeAttrs& attrs,
                                     const int dev_mask,
-                                    DispatchMode *dispatch_mode,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    DispatchMode* dispatch_mode,
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
   const int weight_stype = in_attrs->at(0);
-  const int grad_stype = in_attrs->at(1);
-  const int state_stype = in_attrs->at(2);
-  bool dispatched = false;
+  const int grad_stype   = in_attrs->at(1);
+  const int state_stype  = in_attrs->at(2);
+  bool dispatched        = false;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
     // dns, ... -> dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode,
-                                     DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && grad_stype == kRowSparseStorage &&
       (weight_stype == kRowSparseStorage || weight_stype == kDefaultStorage) &&
       state_stype == weight_stype) {
     // weight and state share stype, grad's stype = rsp
-    dispatched = storage_type_assign(
-        out_attrs, static_cast<NDArrayStorageType>(weight_stype), dispatch_mode,
-        DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(out_attrs,
+                                     static_cast<NDArrayStorageType>(weight_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
 
 /*! \brief kernel for sparse adagrad update with group sparsity regularization
  */
-template <typename xpu> struct GroupAdagradDnsRspKernel {
+template <typename xpu>
+struct GroupAdagradDnsRspKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void
-  Map(int i, const index_t row_length, DType *out_data, DType *state_data,
-      DType *weight_data, const IType *grad_idx, const DType *grad_data,
-      const DType clip_gradient, const DType rescale_grad, const DType lr,
-      const DType eps) {
+  MSHADOW_XINLINE static void Map(int i,
+                                  const index_t row_length,
+                                  DType* out_data,
+                                  DType* state_data,
+                                  DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType rescale_grad,
+                                  const DType lr,
+                                  const DType eps) {
     using namespace mshadow_op;
 
     // Helper to obtain index into weight / state arrays
@@ -107,9 +114,9 @@ template <typename xpu> struct GroupAdagradDnsRspKernel {
       return grad_idx[i] * row_length + j;
     };
     // Helper to obtain explicit rescaled and clipped grad
-    auto get_grad_rescaled = [&i, &row_length, &grad_data, &rescale_grad,
-                              &clip_gradient](index_t j) -> DType {
-      index_t grad_j = i * row_length + j;
+    auto get_grad_rescaled =
+        [&i, &row_length, &grad_data, &rescale_grad, &clip_gradient](index_t j) -> DType {
+      index_t grad_j      = i * row_length + j;
       DType grad_rescaled = grad_data[grad_j] * rescale_grad;
       if (clip_gradient >= 0.0f) {
         grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
@@ -142,44 +149,54 @@ template <typename xpu> struct GroupAdagradDnsRspKernel {
  * grad.
  */
 template <typename xpu>
-inline void GroupAdagradUpdateDnsRspDnsImpl(
-    const GroupAdagradParam &param, const OpContext &ctx, const TBlob &weight,
-    const NDArray &grad, const TBlob &state, const OpReqType &req, TBlob *out) {
+inline void GroupAdagradUpdateDnsRspDnsImpl(const GroupAdagradParam& param,
+                                            const OpContext& ctx,
+                                            const TBlob& weight,
+                                            const NDArray& grad,
+                                            const TBlob& state,
+                                            const OpReqType& req,
+                                            TBlob* out) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mshadow_op;
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(grad.storage_type(), kRowSparseStorage);
   // if gradients are zeros, no weights are updated
   if (req == kNullOp) {
     return;
   }
-  CHECK_EQ(req, kWriteInplace)
-      << "kWriteInplace is expected for sparse group_adagrad_update";
+  CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse group_adagrad_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(state.shape_.Size(), 0);
 
   MSHADOW_REAL_TYPE_SWITCH(weight.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(rowsparse::kIdx), IType, {
-      DType *weight_data = weight.dptr<DType>();
-      DType *out_data = out->dptr<DType>();
-      const IType *grad_idx = grad.aux_data(rowsparse::kIdx).dptr<IType>();
-      const DType *grad_val = grad.data().dptr<DType>();
-      DType *state_data = state.dptr<DType>();
+      DType* weight_data         = weight.dptr<DType>();
+      DType* out_data            = out->dptr<DType>();
+      const IType* grad_idx      = grad.aux_data(rowsparse::kIdx).dptr<IType>();
+      const DType* grad_val      = grad.data().dptr<DType>();
+      DType* state_data          = state.dptr<DType>();
       const nnvm::dim_t num_grad = grad.aux_shape(rowsparse::kIdx)[0];
-      const auto row_length = weight.shape_.ProdShape(1, weight.ndim());
+      const auto row_length      = weight.shape_.ProdShape(1, weight.ndim());
 
       if (!grad.storage_initialized()) {
         // Lazy update with 0 gradient
         return;
       }
 
-      Kernel<GroupAdagradDnsRspKernel<xpu>, xpu>::Launch(
-          s, num_grad, row_length, out_data, state_data, weight_data, grad_idx,
-          grad_val, static_cast<DType>(param.clip_gradient),
-          static_cast<DType>(param.rescale_grad), static_cast<DType>(param.lr),
-          static_cast<DType>(param.epsilon));
+      Kernel<GroupAdagradDnsRspKernel<xpu>, xpu>::Launch(s,
+                                                         num_grad,
+                                                         row_length,
+                                                         out_data,
+                                                         state_data,
+                                                         weight_data,
+                                                         grad_idx,
+                                                         grad_val,
+                                                         static_cast<DType>(param.clip_gradient),
+                                                         static_cast<DType>(param.rescale_grad),
+                                                         static_cast<DType>(param.lr),
+                                                         static_cast<DType>(param.epsilon));
     });
   });
 }
@@ -189,16 +206,18 @@ inline void GroupAdagradUpdateDnsRspDnsImpl(
  *        update and lazy update are supported.
  */
 template <typename xpu>
-inline void
-GroupAdagradUpdateRspRspRspImpl(const GroupAdagradParam &param,
-                                const OpContext &ctx, const NDArray &weight,
-                                const NDArray &grad, const NDArray &state,
-                                const OpReqType &req, NDArray *out) {
+inline void GroupAdagradUpdateRspRspRspImpl(const GroupAdagradParam& param,
+                                            const OpContext& ctx,
+                                            const NDArray& weight,
+                                            const NDArray& grad,
+                                            const NDArray& state,
+                                            const OpReqType& req,
+                                            NDArray* out) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace rowsparse;
   CheckAllRowsPresent(weight, "GroupAdagradUpdate", "weights");
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // fill history with zero values
   if (!state.storage_initialized()) {
     NDArray state_zeros = state;
@@ -208,34 +227,31 @@ GroupAdagradUpdateRspRspRspImpl(const GroupAdagradParam &param,
   }
   // reuse dns rsp implementation when storage_shape == shape
   TBlob out_blob = out->data();
-  GroupAdagradUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad,
-                                       state.data(), req, &out_blob);
+  GroupAdagradUpdateDnsRspDnsImpl<xpu>(
+      param, ctx, weight.data(), grad, state.data(), req, &out_blob);
 }
 
 template <typename xpu>
-inline void GroupAdagradUpdateEx(const nnvm::NodeAttrs &attrs,
-                                 const OpContext &ctx,
-                                 const std::vector<NDArray> &inputs,
-                                 const std::vector<OpReqType> &req,
-                                 const std::vector<NDArray> &outputs) {
-  const GroupAdagradParam &param = nnvm::get<GroupAdagradParam>(attrs.parsed);
-  const auto weight_stype = inputs[0].storage_type();
-  const auto grad_stype = inputs[1].storage_type();
-  const auto state_stype = inputs[2].storage_type();
-  const auto output_stype = outputs[0].storage_type();
+inline void GroupAdagradUpdateEx(const nnvm::NodeAttrs& attrs,
+                                 const OpContext& ctx,
+                                 const std::vector<NDArray>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<NDArray>& outputs) {
+  const GroupAdagradParam& param = nnvm::get<GroupAdagradParam>(attrs.parsed);
+  const auto weight_stype        = inputs[0].storage_type();
+  const auto grad_stype          = inputs[1].storage_type();
+  const auto state_stype         = inputs[2].storage_type();
+  const auto output_stype        = outputs[0].storage_type();
 
   if (state_stype == weight_stype && output_stype == weight_stype &&
       weight_stype == kRowSparseStorage && grad_stype == kRowSparseStorage) {
     NDArray out = outputs[0];
-    GroupAdagradUpdateRspRspRspImpl<xpu>(param, ctx, inputs[0], inputs[1],
-                                         inputs[2], req[0], &out);
+    GroupAdagradUpdateRspRspRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2], req[0], &out);
   } else if (state_stype == weight_stype && output_stype == weight_stype &&
-             weight_stype == kDefaultStorage &&
-             grad_stype == kRowSparseStorage) {
+             weight_stype == kDefaultStorage && grad_stype == kRowSparseStorage) {
     TBlob out_blob = outputs[0].data();
-    GroupAdagradUpdateDnsRspDnsImpl<xpu>(param, ctx, inputs[0].data(),
-                                         inputs[1], inputs[2].data(), req[0],
-                                         &out_blob);
+    GroupAdagradUpdateDnsRspDnsImpl<xpu>(
+        param, ctx, inputs[0].data(), inputs[1], inputs[2].data(), req[0], &out_blob);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
diff --git a/src/operator/contrib/optimizer_op.cc b/src/operator/contrib/optimizer_op.cc
index be6d30587368..c508c50c3c0f 100644
--- a/src/operator/contrib/optimizer_op.cc
+++ b/src/operator/contrib/optimizer_op.cc
@@ -34,9 +34,9 @@ DMLC_REGISTER_PARAMETER(GroupAdagradParam);
 /*!
  * \brief Shape inference function for Group AdaGrad.
  */
-inline bool GroupAdagradShape(const nnvm::NodeAttrs &attrs,
-                              mxnet::ShapeVector *in_attrs,
-                              mxnet::ShapeVector *out_attrs) {
+inline bool GroupAdagradShape(const nnvm::NodeAttrs& attrs,
+                              mxnet::ShapeVector* in_attrs,
+                              mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -46,12 +46,11 @@ inline bool GroupAdagradShape(const nnvm::NodeAttrs &attrs,
   SHAPE_ASSIGN_CHECK(*in_attrs, 1, out_attrs->at(0));
 
   return !mxnet::op::shape_is_none(out_attrs->at(0)) &&
-         (in_attrs->at(0)[0] == in_attrs->at(1)[0]) &&
-         (in_attrs->at(0)[0] == in_attrs->at(2)[0]);
+         (in_attrs->at(0)[0] == in_attrs->at(1)[0]) && (in_attrs->at(0)[0] == in_attrs->at(2)[0]);
 }
 
 NNVM_REGISTER_OP(_contrib_group_adagrad_update)
-.describe(R"code(Update function for Group AdaGrad optimizer.
+    .describe(R"code(Update function for Group AdaGrad optimizer.
 
 Referenced from *Adaptive Subgradient Methods for Online Learning and Stochastic Optimization*,
 and available at http://www.jmlr.org/papers/volume12/duchi11a/duchi11a.pdf but
@@ -69,21 +68,21 @@ Weights are updated lazily if the gradient is sparse.
 Note that non-zero values for the weight decay option are not supported.
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<GroupAdagradParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", GroupAdagradShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", GroupAdagradStorageType)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.set_attr<FComputeEx>("FComputeEx<cpu>", GroupAdagradUpdateEx<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("history", "NDArray-or-Symbol", "History")
-.add_arguments(GroupAdagradParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<GroupAdagradParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", GroupAdagradShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", GroupAdagradStorageType)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .set_attr<FComputeEx>("FComputeEx<cpu>", GroupAdagradUpdateEx<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("history", "NDArray-or-Symbol", "History")
+    .add_arguments(GroupAdagradParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/optimizer_op.cu b/src/operator/contrib/optimizer_op.cu
index 40d99c5f0071..63a599a29962 100644
--- a/src/operator/contrib/optimizer_op.cu
+++ b/src/operator/contrib/optimizer_op.cu
@@ -30,7 +30,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_group_adagrad_update)
-.set_attr<FComputeEx>("FComputeEx<gpu>", GroupAdagradUpdateEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", GroupAdagradUpdateEx<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/preloaded_multi_sgd-inl.h b/src/operator/contrib/preloaded_multi_sgd-inl.h
index 840ca215c520..bcc2e611fb96 100644
--- a/src/operator/contrib/preloaded_multi_sgd-inl.h
+++ b/src/operator/contrib/preloaded_multi_sgd-inl.h
@@ -49,16 +49,15 @@ struct PreloadedMultiSGDParam : public dmlc::Parameter<PreloadedMultiSGDParam> {
   int num_weights;
   DMLC_DECLARE_PARAMETER(PreloadedMultiSGDParam) {
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(num_weights)
-    .set_default(1)
-    .describe("Number of updated weights.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(num_weights).set_default(1).describe("Number of updated weights.");
   }
 };
 
@@ -68,45 +67,42 @@ struct PreloadedMultiSGDMomParam : public dmlc::Parameter<PreloadedMultiSGDMomPa
   float clip_gradient;
   int num_weights;
   DMLC_DECLARE_PARAMETER(PreloadedMultiSGDMomParam) {
-    DMLC_DECLARE_FIELD(momentum)
-    .set_default(0.0f)
-    .describe("The decay rate of momentum estimates at each epoch.");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.0f).describe(
+        "The decay rate of momentum estimates at each epoch.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(num_weights)
-    .set_default(1)
-    .describe("Number of updated weights.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(num_weights).set_default(1).describe("Number of updated weights.");
   }
 };
 
-template<typename ParamType, int input_stride>
+template <typename ParamType, int input_stride>
 inline bool PreloadedMultiSGDShape(const nnvm::NodeAttrs& attrs,
-                                   std::vector<mxnet::TShape> *in_attrs,
-                                   std::vector<mxnet::TShape> *out_attrs) {
+                                   std::vector<mxnet::TShape>* in_attrs,
+                                   std::vector<mxnet::TShape>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_weights + 2);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_shapes = *in_attrs;
+  bool all_inferred   = true;
+  auto& input_shapes  = *in_attrs;
   auto& output_shapes = *out_attrs;
   // Learning rates
   CHECK_EQ(in_attrs->at(param.num_weights * input_stride).Size(), param.num_weights)
-    << "Number of learning rates is inconsistent with num_weights "
-    << "parameter passed. Expected number of learning rates: "
-    << param.num_weights << ", and got " << in_attrs->at(param.num_weights * input_stride).Size();
+      << "Number of learning rates is inconsistent with num_weights "
+      << "parameter passed. Expected number of learning rates: " << param.num_weights
+      << ", and got " << in_attrs->at(param.num_weights * input_stride).Size();
   // Weight decays
   CHECK_EQ(in_attrs->at(param.num_weights * input_stride + 1).Size(), param.num_weights)
-    << "Number of weight decays is inconsistent with num_weights "
-    << "parameter passed. Expected number of weight decays: "
-    << param.num_weights << ", and got "
-    << in_attrs->at(param.num_weights * input_stride + 1).Size();
+      << "Number of weight decays is inconsistent with num_weights "
+      << "parameter passed. Expected number of weight decays: " << param.num_weights << ", and got "
+      << in_attrs->at(param.num_weights * input_stride + 1).Size();
   // Weights and gradients
   for (int i = 0; i < param.num_weights; ++i) {
     std::vector<mxnet::TShape> input_vec;
@@ -121,14 +117,14 @@ inline bool PreloadedMultiSGDShape(const nnvm::NodeAttrs& attrs,
 
 template <typename ParamType, int input_stride, int num_fp32_inputs>
 inline bool MP_PreloadedMultiSGD_InferType(const nnvm::NodeAttrs& attrs,
-                                           std::vector<int> *in_attrs,
-                                           std::vector<int> *out_attrs) {
+                                           std::vector<int>* in_attrs,
+                                           std::vector<int>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_weights + 2);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_types = *in_attrs;
+  bool all_inferred  = true;
+  auto& input_types  = *in_attrs;
   auto& output_types = *out_attrs;
   // Weights and gradients
   for (int i = 0; i < param.num_weights; ++i) {
@@ -151,19 +147,19 @@ inline bool MP_PreloadedMultiSGD_InferType(const nnvm::NodeAttrs& attrs,
   return all_inferred;
 }
 
-template<typename DType, typename MPDType>
+template <typename DType, typename MPDType>
 struct PreloadedMultiSGDKernelParam {
   static const int N = 60;
   int count;
   size_t max_size;
   size_t sizes[N];
-  DType * weights[N];
-  DType * grads[N];
-  MPDType * mom[N];
-  MPDType * weights32[N];
-  DType * out_data[N];
-  float * lrs;
-  float * wds;
+  DType* weights[N];
+  DType* grads[N];
+  MPDType* mom[N];
+  MPDType* weights32[N];
+  DType* out_data[N];
+  float* lrs;
+  float* wds;
   MPDType clip_gradient;
   MPDType rescale_grad;
   MPDType momentum;
@@ -171,25 +167,24 @@ struct PreloadedMultiSGDKernelParam {
 
 template <typename MPDType, bool has_momentum, bool has_mixed_precision>
 struct PreloadedMultiSGDKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const PreloadedMultiSGDKernelParam<DType, MPDType>& param,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const PreloadedMultiSGDKernelParam<DType, MPDType>& param,
                                   const OpReqType req) {
     for (int index = 0; index < param.count; ++index) {
       if ((size_t)i < param.sizes[index]) {
-        MPDType w = has_mixed_precision ? param.weights32[index][i] :
-                                          MPDType(param.weights[index][i]);
+        MPDType w =
+            has_mixed_precision ? param.weights32[index][i] : MPDType(param.weights[index][i]);
         MPDType mom = has_momentum ? param.mom[index][i] : MPDType(0);
         if (param.clip_gradient >= 0.0f) {
-          mom = param.momentum*mom
-                - param.lrs[index]*param.wds[index]*w
-                - param.lrs[index]
-                *mshadow_op::clip::Map(param.rescale_grad *
-                                       static_cast<MPDType>(param.grads[index][i]),
-                                     param.clip_gradient);
+          mom = param.momentum * mom - param.lrs[index] * param.wds[index] * w -
+                param.lrs[index] *
+                    mshadow_op::clip::Map(
+                        param.rescale_grad * static_cast<MPDType>(param.grads[index][i]),
+                        param.clip_gradient);
         } else {
-          mom = param.momentum*mom
-                - param.lrs[index]*param.wds[index]*w
-                - param.lrs[index]*param.rescale_grad*static_cast<MPDType>(param.grads[index][i]);
+          mom = param.momentum * mom - param.lrs[index] * param.wds[index] * w -
+                param.lrs[index] * param.rescale_grad * static_cast<MPDType>(param.grads[index][i]);
         }
         if (has_momentum) {
           param.mom[index][i] = mom;
@@ -204,62 +199,62 @@ struct PreloadedMultiSGDKernel {
   }
 };
 
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         typename ParamType = PreloadedMultiSGDParam,
-         int input_stride = 2>
+template <typename xpu,
+          typename DType,
+          typename MPDType,
+          typename ParamType = PreloadedMultiSGDParam,
+          int input_stride   = 2>
 PreloadedMultiSGDKernelParam<DType, MPDType> FillPreloadedMultiSGDKernelParam(
-    const nnvm::NodeAttrs& attrs, const OpContext &ctx, const std::vector<TBlob> &inputs,
-    const std::vector<TBlob> &outputs) {
+    const nnvm::NodeAttrs& attrs,
+    const OpContext& ctx,
+    const std::vector<TBlob>& inputs,
+    const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const ParamType& p = nnvm::get<ParamType>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s     = ctx.get_stream<xpu>();
   PreloadedMultiSGDKernelParam<DType, MPDType> param;
   param.clip_gradient = p.clip_gradient;
-  param.rescale_grad = p.rescale_grad;
-  param.momentum = 0;
-  param.count = p.num_weights;
-  param.max_size = 0;
+  param.rescale_grad  = p.rescale_grad;
+  param.momentum      = 0;
+  param.count         = p.num_weights;
+  param.max_size      = 0;
   for (int i = 0; i < param.count; ++i) {
     param.sizes[i] = inputs[i * input_stride].shape_.Size();
     if (param.max_size < param.sizes[i]) {
       param.max_size = param.sizes[i];
     }
     param.weights[i] = inputs[i * input_stride].FlatTo2D<xpu, DType>(s).dptr_;
-    param.grads[i] = inputs[i * input_stride + 1].FlatTo2D<xpu, DType>(s).dptr_;
+    param.grads[i]   = inputs[i * input_stride + 1].FlatTo2D<xpu, DType>(s).dptr_;
     // if mixed precision, then the last input in a set
     // is 32-bit master copy of the weights
     if (!std::is_same<DType, MPDType>::value) {
-      param.weights32[i] = inputs[i * input_stride + input_stride - 1]
-                           .FlatTo2D<xpu, MPDType>(s).dptr_;
+      param.weights32[i] =
+          inputs[i * input_stride + input_stride - 1].FlatTo2D<xpu, MPDType>(s).dptr_;
     }
     param.out_data[i] = outputs[i].FlatTo2D<xpu, DType>(s).dptr_;
   }
   const int lrs_idx = param.count * input_stride;
   const int wds_idx = param.count * input_stride + 1;
-  param.lrs = inputs[lrs_idx].FlatTo2D<xpu, float>(s).dptr_;
-  param.wds = inputs[wds_idx].FlatTo2D<xpu, float>(s).dptr_;
+  param.lrs         = inputs[lrs_idx].FlatTo2D<xpu, float>(s).dptr_;
+  param.wds         = inputs[wds_idx].FlatTo2D<xpu, float>(s).dptr_;
   return param;
 }
 
-
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         int input_stride = 3>
+template <typename xpu, typename DType, typename MPDType, int input_stride = 3>
 PreloadedMultiSGDKernelParam<DType, MPDType> FillPreloadedMultiSGDMomKernelParam(
-    const nnvm::NodeAttrs& attrs, const OpContext &ctx, const std::vector<TBlob> &inputs,
-    const std::vector<TBlob> &outputs) {
+    const nnvm::NodeAttrs& attrs,
+    const OpContext& ctx,
+    const std::vector<TBlob>& inputs,
+    const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const PreloadedMultiSGDMomParam& p = nnvm::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                     = ctx.get_stream<xpu>();
   PreloadedMultiSGDKernelParam<DType, MPDType> param =
-    FillPreloadedMultiSGDKernelParam<xpu,
-                                     DType,
-                                     MPDType,
-                                     PreloadedMultiSGDMomParam,
-                                     input_stride>(attrs, ctx, inputs, outputs);
+      FillPreloadedMultiSGDKernelParam<xpu,
+                                       DType,
+                                       MPDType,
+                                       PreloadedMultiSGDMomParam,
+                                       input_stride>(attrs, ctx, inputs, outputs);
   param.momentum = p.momentum;
   for (int i = 0; i < param.count; ++i) {
     param.mom[i] = inputs[i * input_stride + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
@@ -268,65 +263,55 @@ PreloadedMultiSGDKernelParam<DType, MPDType> FillPreloadedMultiSGDMomKernelParam
   return param;
 }
 
-template<typename T>
+template <typename T>
 class preloaded_type_identity {
  public:
   using type = T;
 };
 
-template<typename T>
+template <typename T>
 class preloaded_single_precision {
  public:
   using type = float;
 };
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 inline void PreloadedMultiSGDUpdate(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<TBlob> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<TBlob> &outputs) {
+                                    const OpContext& ctx,
+                                    const std::vector<TBlob>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     PreloadedMultiSGDKernelParam<DType, MPDType> param =
-      FillPreloadedMultiSGDKernelParam<xpu,
-                                       DType,
-                                       MPDType,
-                                       PreloadedMultiSGDParam,
-                                       input_stride>(attrs, ctx, inputs, outputs);
-    Kernel<PreloadedMultiSGDKernel<MPDType,
-                                   false,
-                                   !std::is_same<DType, MPDType>::value>,
-                                   xpu>::Launch(s, param.max_size, param, req[0]);
+        FillPreloadedMultiSGDKernelParam<xpu, DType, MPDType, PreloadedMultiSGDParam, input_stride>(
+            attrs, ctx, inputs, outputs);
+    Kernel<PreloadedMultiSGDKernel<MPDType, false, !std::is_same<DType, MPDType>::value>,
+           xpu>::Launch(s, param.max_size, param, req[0]);
   });
 }
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 inline void PreloadedMultiSGDMomUpdate(const nnvm::NodeAttrs& attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<TBlob> &inputs,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<TBlob> &outputs) {
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     PreloadedMultiSGDKernelParam<DType, MPDType> param =
-      FillPreloadedMultiSGDMomKernelParam<xpu,
-                                          DType,
-                                          MPDType,
-                                          input_stride>(attrs, ctx, inputs, outputs);
-    Kernel<PreloadedMultiSGDKernel<MPDType,
-                                   true,
-                                   !std::is_same<DType, MPDType>::value>,
-                                   xpu>::Launch(s, param.max_size, param, req[0]);
+        FillPreloadedMultiSGDMomKernelParam<xpu, DType, MPDType, input_stride>(
+            attrs, ctx, inputs, outputs);
+    Kernel<PreloadedMultiSGDKernel<MPDType, true, !std::is_same<DType, MPDType>::value>,
+           xpu>::Launch(s, param.max_size, param, req[0]);
   });
 }
 
 }  // namespace op
 }  // namespace mxnet
 
-
 #endif  // MXNET_OPERATOR_CONTRIB_PRELOADED_MULTI_SGD_INL_H_
diff --git a/src/operator/contrib/preloaded_multi_sgd.cc b/src/operator/contrib/preloaded_multi_sgd.cc
old mode 100755
new mode 100644
index 768d288c7c27..3aa059078077
--- a/src/operator/contrib/preloaded_multi_sgd.cc
+++ b/src/operator/contrib/preloaded_multi_sgd.cc
@@ -33,44 +33,47 @@ DMLC_REGISTER_PARAMETER(PreloadedMultiSGDParam);
 DMLC_REGISTER_PARAMETER(PreloadedMultiSGDMomParam);
 
 NNVM_REGISTER_OP(preloaded_multi_sgd_update)
-.describe(R"code(Update function for Stochastic Gradient Descent (SDG) optimizer.
+    .describe(R"code(Update function for Stochastic Gradient Descent (SDG) optimizer.
 
 It updates the weights using::
 
  weight = weight - learning_rate * (gradient + wd * weight)
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 2 + 2);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<PreloadedMultiSGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", PreloadedMultiSGDShape<PreloadedMultiSGDParam, 2>)
-.set_attr<nnvm::FInferType>("FInferType",
-                            MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDParam, 2, 0>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    ret.reserve(num_args * 2 + 2);
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-    }
-    ret.emplace_back("lrs");
-    ret.emplace_back("wds");
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", PreloadedMultiSGDUpdate<cpu, preloaded_type_identity, 2>)
-.add_argument("data", "NDArray-or-Symbol[]", "Weights, gradients, learning rates and weight decays")
-.add_arguments(PreloadedMultiSGDParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 2 + 2);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<PreloadedMultiSGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", PreloadedMultiSGDShape<PreloadedMultiSGDParam, 2>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDParam, 2, 0>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          uint32_t num_args = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed).num_weights;
+          std::vector<std::string> ret;
+          ret.reserve(num_args * 2 + 2);
+          for (uint32_t i = 0; i < num_args; ++i) {
+            ret.push_back(std::string("weight_") + std::to_string(i));
+            ret.push_back(std::string("grad_") + std::to_string(i));
+          }
+          ret.emplace_back("lrs");
+          ret.emplace_back("wds");
+          return ret;
+        })
+    .set_attr<FCompute>("FCompute<cpu>", PreloadedMultiSGDUpdate<cpu, preloaded_type_identity, 2>)
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "Weights, gradients, learning rates and weight decays")
+    .add_arguments(PreloadedMultiSGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(preloaded_multi_sgd_mom_update)
-.describe(R"code(Momentum update function for Stochastic Gradient Descent (SGD) optimizer.
+    .describe(R"code(Momentum update function for Stochastic Gradient Descent (SGD) optimizer.
 
 Momentum update has better convergence rates on neural networks. Mathematically it looks
 like below:
@@ -89,97 +92,109 @@ It updates the weights using::
 Where the parameter ``momentum`` is the decay rate of momentum estimates at each epoch.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 3 + 2);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<PreloadedMultiSGDMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", PreloadedMultiSGDShape<PreloadedMultiSGDMomParam, 3>)
-.set_attr<nnvm::FInferType>("FInferType",
-                            MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDMomParam, 3, 0>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    ret.reserve(num_args * 3 + 2);
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-      ret.push_back(std::string("mom_") + std::to_string(i));
-    }
-    ret.emplace_back("lrs");
-    ret.emplace_back("wds");
-    return ret;
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-    ret.reserve(param.num_weights);
-    for (int i = 0; i < param.num_weights; ++i) {
-      ret.push_back(i * 3 + 2);
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", PreloadedMultiSGDMomUpdate<cpu, preloaded_type_identity, 3>)
-.add_argument("data", "NDArray-or-Symbol[]",
-              "Weights, gradients, momentum, learning rates and weight decays")
-.add_arguments(PreloadedMultiSGDMomParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 3 + 2);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<PreloadedMultiSGDMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  PreloadedMultiSGDShape<PreloadedMultiSGDMomParam, 3>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDMomParam, 3, 0>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          uint32_t num_args = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed).num_weights;
+          std::vector<std::string> ret;
+          ret.reserve(num_args * 3 + 2);
+          for (uint32_t i = 0; i < num_args; ++i) {
+            ret.push_back(std::string("weight_") + std::to_string(i));
+            ret.push_back(std::string("grad_") + std::to_string(i));
+            ret.push_back(std::string("mom_") + std::to_string(i));
+          }
+          ret.emplace_back("lrs");
+          ret.emplace_back("wds");
+          return ret;
+        })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const PreloadedMultiSGDMomParam& param =
+                                         dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
+                                     ret.reserve(param.num_weights);
+                                     for (int i = 0; i < param.num_weights; ++i) {
+                                       ret.push_back(i * 3 + 2);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        PreloadedMultiSGDMomUpdate<cpu, preloaded_type_identity, 3>)
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "Weights, gradients, momentum, learning rates and weight decays")
+    .add_arguments(PreloadedMultiSGDMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(preloaded_multi_mp_sgd_update)
-.describe(R"code(Update function for multi-precision Stochastic Gradient Descent (SDG) optimizer.
+    .describe(
+        R"code(Update function for multi-precision Stochastic Gradient Descent (SDG) optimizer.
 
 It updates the weights using::
 
  weight = weight - learning_rate * (gradient + wd * weight)
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 3 + 2);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<PreloadedMultiSGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", PreloadedMultiSGDShape<PreloadedMultiSGDParam, 3>)
-.set_attr<nnvm::FInferType>("FInferType",
-                            MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDParam, 3, 1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    ret.reserve(num_args * 3 + 2);
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-      ret.push_back(std::string("weight32_") + std::to_string(i));
-    }
-    ret.emplace_back("lrs");
-    ret.emplace_back("wds");
-    return ret;
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
-    ret.reserve(param.num_weights);
-    for (int i = 0; i < param.num_weights; ++i) {
-      ret.push_back(i * 3 + 2);
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", PreloadedMultiSGDUpdate<cpu, preloaded_single_precision, 3>)
-.add_argument("data", "NDArray-or-Symbol[]", "Weights, gradients, learning rates and weight decays")
-.add_arguments(PreloadedMultiSGDParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 3 + 2);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDParam& param = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<PreloadedMultiSGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", PreloadedMultiSGDShape<PreloadedMultiSGDParam, 3>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDParam, 3, 1>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          uint32_t num_args = dmlc::get<PreloadedMultiSGDParam>(attrs.parsed).num_weights;
+          std::vector<std::string> ret;
+          ret.reserve(num_args * 3 + 2);
+          for (uint32_t i = 0; i < num_args; ++i) {
+            ret.push_back(std::string("weight_") + std::to_string(i));
+            ret.push_back(std::string("grad_") + std::to_string(i));
+            ret.push_back(std::string("weight32_") + std::to_string(i));
+          }
+          ret.emplace_back("lrs");
+          ret.emplace_back("wds");
+          return ret;
+        })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const PreloadedMultiSGDParam& param =
+                                         dmlc::get<PreloadedMultiSGDParam>(attrs.parsed);
+                                     ret.reserve(param.num_weights);
+                                     for (int i = 0; i < param.num_weights; ++i) {
+                                       ret.push_back(i * 3 + 2);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        PreloadedMultiSGDUpdate<cpu, preloaded_single_precision, 3>)
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "Weights, gradients, learning rates and weight decays")
+    .add_arguments(PreloadedMultiSGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(preloaded_multi_mp_sgd_mom_update)
-.describe(R"code(Momentum update function for multi-precision Stochastic Gradient Descent (SGD) optimizer.
+    .describe(
+        R"code(Momentum update function for multi-precision Stochastic Gradient Descent (SGD) optimizer.
 
 Momentum update has better convergence rates on neural networks. Mathematically it looks
 like below:
@@ -198,48 +213,53 @@ It updates the weights using::
 Where the parameter ``momentum`` is the decay rate of momentum estimates at each epoch.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 4 + 2);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<PreloadedMultiSGDMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", PreloadedMultiSGDShape<PreloadedMultiSGDMomParam, 4>)
-.set_attr<nnvm::FInferType>("FInferType",
-                            MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDMomParam, 4, 2>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    ret.reserve(num_args * 4 + 2);
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-      ret.push_back(std::string("mom_") + std::to_string(i));
-      ret.push_back(std::string("weight32_") + std::to_string(i));
-    }
-    ret.emplace_back("lrs");
-    ret.emplace_back("wds");
-    return ret;
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
-    ret.reserve(param.num_weights * 2);
-    for (int i = 0; i < param.num_weights; ++i) {
-      ret.push_back(i * 4 + 2);
-      ret.push_back(i * 4 + 3);
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", PreloadedMultiSGDMomUpdate<cpu, preloaded_single_precision, 4>)
-.add_argument("data", "NDArray-or-Symbol[]",
-              "Weights, gradients, momentums, learning rates and weight decays")
-.add_arguments(PreloadedMultiSGDMomParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 4 + 2);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const PreloadedMultiSGDMomParam& param = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<PreloadedMultiSGDMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  PreloadedMultiSGDShape<PreloadedMultiSGDMomParam, 4>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                MP_PreloadedMultiSGD_InferType<PreloadedMultiSGDMomParam, 4, 2>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          uint32_t num_args = dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed).num_weights;
+          std::vector<std::string> ret;
+          ret.reserve(num_args * 4 + 2);
+          for (uint32_t i = 0; i < num_args; ++i) {
+            ret.push_back(std::string("weight_") + std::to_string(i));
+            ret.push_back(std::string("grad_") + std::to_string(i));
+            ret.push_back(std::string("mom_") + std::to_string(i));
+            ret.push_back(std::string("weight32_") + std::to_string(i));
+          }
+          ret.emplace_back("lrs");
+          ret.emplace_back("wds");
+          return ret;
+        })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const PreloadedMultiSGDMomParam& param =
+                                         dmlc::get<PreloadedMultiSGDMomParam>(attrs.parsed);
+                                     ret.reserve(param.num_weights * 2);
+                                     for (int i = 0; i < param.num_weights; ++i) {
+                                       ret.push_back(i * 4 + 2);
+                                       ret.push_back(i * 4 + 3);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        PreloadedMultiSGDMomUpdate<cpu, preloaded_single_precision, 4>)
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "Weights, gradients, momentums, learning rates and weight decays")
+    .add_arguments(PreloadedMultiSGDMomParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/preloaded_multi_sgd.cu b/src/operator/contrib/preloaded_multi_sgd.cu
index 3335d632cd98..bccdf90ca7c1 100644
--- a/src/operator/contrib/preloaded_multi_sgd.cu
+++ b/src/operator/contrib/preloaded_multi_sgd.cu
@@ -30,14 +30,16 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(preloaded_multi_sgd_update)
-.set_attr<FCompute>("FCompute<gpu>", PreloadedMultiSGDUpdate<gpu, preloaded_type_identity, 2>);
+    .set_attr<FCompute>("FCompute<gpu>", PreloadedMultiSGDUpdate<gpu, preloaded_type_identity, 2>);
 NNVM_REGISTER_OP(preloaded_multi_sgd_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", PreloadedMultiSGDMomUpdate<gpu, preloaded_type_identity, 3>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        PreloadedMultiSGDMomUpdate<gpu, preloaded_type_identity, 3>);
 NNVM_REGISTER_OP(preloaded_multi_mp_sgd_update)
-.set_attr<FCompute>("FCompute<gpu>", PreloadedMultiSGDUpdate<gpu, preloaded_single_precision, 3>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        PreloadedMultiSGDUpdate<gpu, preloaded_single_precision, 3>);
 NNVM_REGISTER_OP(preloaded_multi_mp_sgd_mom_update)
-.set_attr<FCompute>("FCompute<gpu>",
-                    PreloadedMultiSGDMomUpdate<gpu, preloaded_single_precision, 4>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        PreloadedMultiSGDMomUpdate<gpu, preloaded_single_precision, 4>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/proposal-inl.h b/src/operator/contrib/proposal-inl.h
index b68822d53614..4373877532cf 100644
--- a/src/operator/contrib/proposal-inl.h
+++ b/src/operator/contrib/proposal-inl.h
@@ -22,7 +22,7 @@
  * \file proposal-inl.h
  * \brief Proposal Operator
  * \author Piotr Teterwak, Bing Xu, Jian Guo
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_PROPOSAL_INL_H_
 #define MXNET_OPERATOR_CONTRIB_PROPOSAL_INL_H_
 
@@ -39,15 +39,14 @@
 #include "../operator_common.h"
 #include "../mshadow_op.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace proposal {
-enum ProposalOpInputs {kClsProb, kBBoxPred, kImInfo};
-enum ProposalOpOutputs {kOut, kScore};
-enum ProposalForwardResource {kTempResource};
-}  // proposal
+enum ProposalOpInputs { kClsProb, kBBoxPred, kImInfo };
+enum ProposalOpOutputs { kOut, kScore };
+enum ProposalForwardResource { kTempResource };
+}  // namespace proposal
 
 struct ProposalParam : public dmlc::Parameter<ProposalParam> {
   int rpn_pre_nms_top_n;
@@ -61,32 +60,41 @@ struct ProposalParam : public dmlc::Parameter<ProposalParam> {
   bool iou_loss;
   DMLC_DECLARE_PARAMETER(ProposalParam) {
     float tmp[] = {0, 0, 0, 0};
-    DMLC_DECLARE_FIELD(rpn_pre_nms_top_n).set_default(6000)
-    .describe("Number of top scoring boxes to keep before applying NMS to RPN proposals");
-    DMLC_DECLARE_FIELD(rpn_post_nms_top_n).set_default(300)
-    .describe("Number of top scoring boxes to keep after applying NMS to RPN proposals");
-    DMLC_DECLARE_FIELD(threshold).set_default(0.7)
-    .describe("NMS value, below which to suppress.");
-    DMLC_DECLARE_FIELD(rpn_min_size).set_default(16)
-    .describe("Minimum height or width in proposal");
-    tmp[0] = 4.0f; tmp[1] = 8.0f; tmp[2] = 16.0f; tmp[3] = 32.0f;
-    DMLC_DECLARE_FIELD(scales).set_default(mxnet::Tuple<float>(tmp, tmp + 4))
-    .describe("Used to generate anchor windows by enumerating scales");
-    tmp[0] = 0.5f; tmp[1] = 1.0f; tmp[2] = 2.0f;
-    DMLC_DECLARE_FIELD(ratios).set_default(mxnet::Tuple<float>(tmp, tmp + 3))
-    .describe("Used to generate anchor windows by enumerating ratios");
-    DMLC_DECLARE_FIELD(feature_stride).set_default(16)
-    .describe("The size of the receptive field each unit in the convolution layer of the rpn,"
-              "for example the product of all stride's prior to this layer.");
-    DMLC_DECLARE_FIELD(output_score).set_default(false)
-    .describe("Add score to outputs");
-    DMLC_DECLARE_FIELD(iou_loss).set_default(false)
-    .describe("Usage of IoU Loss");
+    DMLC_DECLARE_FIELD(rpn_pre_nms_top_n)
+        .set_default(6000)
+        .describe("Number of top scoring boxes to keep before applying NMS to RPN proposals");
+    DMLC_DECLARE_FIELD(rpn_post_nms_top_n)
+        .set_default(300)
+        .describe("Number of top scoring boxes to keep after applying NMS to RPN proposals");
+    DMLC_DECLARE_FIELD(threshold).set_default(0.7).describe("NMS value, below which to suppress.");
+    DMLC_DECLARE_FIELD(rpn_min_size)
+        .set_default(16)
+        .describe("Minimum height or width in proposal");
+    tmp[0] = 4.0f;
+    tmp[1] = 8.0f;
+    tmp[2] = 16.0f;
+    tmp[3] = 32.0f;
+    DMLC_DECLARE_FIELD(scales)
+        .set_default(mxnet::Tuple<float>(tmp, tmp + 4))
+        .describe("Used to generate anchor windows by enumerating scales");
+    tmp[0] = 0.5f;
+    tmp[1] = 1.0f;
+    tmp[2] = 2.0f;
+    DMLC_DECLARE_FIELD(ratios)
+        .set_default(mxnet::Tuple<float>(tmp, tmp + 3))
+        .describe("Used to generate anchor windows by enumerating ratios");
+    DMLC_DECLARE_FIELD(feature_stride)
+        .set_default(16)
+        .describe(
+            "The size of the receptive field each unit in the convolution layer of the rpn,"
+            "for example the product of all stride's prior to this layer.");
+    DMLC_DECLARE_FIELD(output_score).set_default(false).describe("Add score to outputs");
+    DMLC_DECLARE_FIELD(iou_loss).set_default(false).describe("Usage of IoU Loss");
   }
 };
 
-template<typename xpu>
-Operator *CreateOp(ProposalParam param);
+template <typename xpu>
+Operator* CreateOp(ProposalParam param);
 
 #if DMLC_USE_CXX11
 class ProposalProp : public OperatorProperty {
@@ -99,17 +107,17 @@ class ProposalProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 3) << "Input:[cls_prob, bbox_pred, im_info]";
-    const mxnet::TShape &dshape = in_shape->at(proposal::kClsProb);
-    if (mxnet::op::shape_is_none(dshape)) return false;
+    const mxnet::TShape& dshape = in_shape->at(proposal::kClsProb);
+    if (mxnet::op::shape_is_none(dshape))
+      return false;
     Shape<4> bbox_pred_shape;
     bbox_pred_shape = Shape4(dshape[0], dshape[1] * 2, dshape[2], dshape[3]);
-    SHAPE_ASSIGN_CHECK(*in_shape, proposal::kBBoxPred,
-                       bbox_pred_shape);
+    SHAPE_ASSIGN_CHECK(*in_shape, proposal::kBBoxPred, bbox_pred_shape);
     Shape<2> im_info_shape;
     im_info_shape = Shape2(dshape[0], 3);
     SHAPE_ASSIGN_CHECK(*in_shape, proposal::kImInfo, im_info_shape);
@@ -122,7 +130,7 @@ class ProposalProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new ProposalProp();
+    auto ptr    = new ProposalProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -131,15 +139,13 @@ class ProposalProp : public OperatorProperty {
     return "_contrib_Proposal";
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {};
   }
 
@@ -184,7 +190,7 @@ inline void _MakeAnchor(float w,
                         float h,
                         float x_ctr,
                         float y_ctr,
-                        std::vector<float> *out_anchors) {
+                        std::vector<float>* out_anchors) {
   out_anchors->push_back(x_ctr - 0.5f * (w - 1.0f));
   out_anchors->push_back(y_ctr - 0.5f * (h - 1.0f));
   out_anchors->push_back(x_ctr + 0.5f * (w - 1.0f));
@@ -195,25 +201,24 @@ inline void _MakeAnchor(float w,
 inline void _Transform(float scale,
                        float ratio,
                        const std::vector<float>& base_anchor,
-                       std::vector<float>  *out_anchors) {
-  float w = base_anchor[2] - base_anchor[0] + 1.0f;
-  float h = base_anchor[3] - base_anchor[1] + 1.0f;
-  float x_ctr = base_anchor[0] + 0.5 * (w - 1.0f);
-  float y_ctr = base_anchor[1] + 0.5 * (h - 1.0f);
-  float size = w * h;
+                       std::vector<float>* out_anchors) {
+  float w           = base_anchor[2] - base_anchor[0] + 1.0f;
+  float h           = base_anchor[3] - base_anchor[1] + 1.0f;
+  float x_ctr       = base_anchor[0] + 0.5 * (w - 1.0f);
+  float y_ctr       = base_anchor[1] + 0.5 * (h - 1.0f);
+  float size        = w * h;
   float size_ratios = std::floor(size / ratio);
-  float new_w = std::floor(std::sqrt(size_ratios) + 0.5f) * scale;
-  float new_h = std::floor((new_w / scale * ratio) + 0.5f) * scale;
+  float new_w       = std::floor(std::sqrt(size_ratios) + 0.5f) * scale;
+  float new_h       = std::floor((new_w / scale * ratio) + 0.5f) * scale;
 
-  _MakeAnchor(new_w, new_h, x_ctr,
-             y_ctr, out_anchors);
+  _MakeAnchor(new_w, new_h, x_ctr, y_ctr, out_anchors);
 }
 
 // out_anchors must have shape (n, 5), where n is ratios.size() * scales.size()
 inline void GenerateAnchors(const std::vector<float>& base_anchor,
                             const mxnet::Tuple<float>& ratios,
                             const mxnet::Tuple<float>& scales,
-                            std::vector<float> *out_anchors) {
+                            std::vector<float>* out_anchors) {
   for (int j = 0; j < ratios.ndim(); ++j) {
     for (int k = 0; k < scales.ndim(); ++k) {
       _Transform(scales[k], ratios[j], base_anchor, out_anchors);
diff --git a/src/operator/contrib/proposal.cc b/src/operator/contrib/proposal.cc
index 1ca14537c2f6..984eb458d95b 100644
--- a/src/operator/contrib/proposal.cc
+++ b/src/operator/contrib/proposal.cc
@@ -22,7 +22,7 @@
  * \file proposal.cc
  * \brief
  * \author Piotr Teterwak, Bing Xu, Jian Guo
-*/
+ */
 
 #include "./proposal-inl.h"
 
@@ -40,31 +40,31 @@ inline void BBoxTransformInv(const mshadow::Tensor<cpu, 2>& boxes,
                              const float im_width,
                              const int real_height,
                              const int real_width,
-                             mshadow::Tensor<cpu, 2> *out_pred_boxes) {
+                             mshadow::Tensor<cpu, 2>* out_pred_boxes) {
   CHECK_GE(boxes.size(1), 4);
   CHECK_GE(out_pred_boxes->size(1), 4);
-  int anchors = deltas.size(1)/4;
+  int anchors = deltas.size(1) / 4;
   int heights = deltas.size(2);
-  int widths = deltas.size(3);
+  int widths  = deltas.size(3);
 
   for (int a = 0; a < anchors; ++a) {
     for (int h = 0; h < heights; ++h) {
       for (int w = 0; w < widths; ++w) {
         index_t index = h * (widths * anchors) + w * (anchors) + a;
-        float width = boxes[index][2] - boxes[index][0] + 1.0;
-        float height = boxes[index][3] - boxes[index][1] + 1.0;
-        float ctr_x = boxes[index][0] + 0.5 * (width - 1.0);
-        float ctr_y = boxes[index][1] + 0.5 * (height - 1.0);
+        float width   = boxes[index][2] - boxes[index][0] + 1.0;
+        float height  = boxes[index][3] - boxes[index][1] + 1.0;
+        float ctr_x   = boxes[index][0] + 0.5 * (width - 1.0);
+        float ctr_y   = boxes[index][1] + 0.5 * (height - 1.0);
 
-        float dx = deltas[0][a*4 + 0][h][w];
-        float dy = deltas[0][a*4 + 1][h][w];
-        float dw = deltas[0][a*4 + 2][h][w];
-        float dh = deltas[0][a*4 + 3][h][w];
+        float dx = deltas[0][a * 4 + 0][h][w];
+        float dy = deltas[0][a * 4 + 1][h][w];
+        float dw = deltas[0][a * 4 + 2][h][w];
+        float dh = deltas[0][a * 4 + 3][h][w];
 
         float pred_ctr_x = dx * width + ctr_x;
         float pred_ctr_y = dy * height + ctr_y;
-        float pred_w = std::exp(dw) * width;
-        float pred_h = std::exp(dh) * height;
+        float pred_w     = std::exp(dw) * width;
+        float pred_h     = std::exp(dh) * height;
 
         float pred_x1 = pred_ctr_x - 0.5 * (pred_w - 1.0);
         float pred_y1 = pred_ctr_y - 0.5 * (pred_h - 1.0);
@@ -96,21 +96,21 @@ inline void IoUTransformInv(const mshadow::Tensor<cpu, 2>& boxes,
                             const float im_width,
                             const int real_height,
                             const int real_width,
-                            mshadow::Tensor<cpu, 2> *out_pred_boxes) {
+                            mshadow::Tensor<cpu, 2>* out_pred_boxes) {
   CHECK_GE(boxes.size(1), 4);
   CHECK_GE(out_pred_boxes->size(1), 4);
-  int anchors = deltas.size(1)/4;
+  int anchors = deltas.size(1) / 4;
   int heights = deltas.size(2);
-  int widths = deltas.size(3);
+  int widths  = deltas.size(3);
 
   for (int a = 0; a < anchors; ++a) {
     for (int h = 0; h < heights; ++h) {
       for (int w = 0; w < widths; ++w) {
         index_t index = h * (widths * anchors) + w * (anchors) + a;
-        float x1 = boxes[index][0];
-        float y1 = boxes[index][1];
-        float x2 = boxes[index][2];
-        float y2 = boxes[index][3];
+        float x1      = boxes[index][0];
+        float y1      = boxes[index][1];
+        float x2      = boxes[index][2];
+        float y2      = boxes[index][3];
 
         float dx1 = deltas[0][a * 4 + 0][h][w];
         float dy1 = deltas[0][a * 4 + 1][h][w];
@@ -142,8 +142,7 @@ inline void IoUTransformInv(const mshadow::Tensor<cpu, 2>& boxes,
 
 // filter box by set confidence to zero
 // * height or width < rpn_min_size
-inline void FilterBox(mshadow::Tensor<cpu, 2> *dets,
-                      const float min_size) {
+inline void FilterBox(mshadow::Tensor<cpu, 2>* dets, const float min_size) {
   for (index_t i = 0; i < dets->size(0); i++) {
     float iw = (*dets)[i][2] - (*dets)[i][0] + 1.0f;
     float ih = (*dets)[i][3] - (*dets)[i][1] + 1.0f;
@@ -169,19 +168,17 @@ namespace op {
 namespace utils {
 
 struct ReverseArgsortCompl {
-  const float *val_;
-  explicit ReverseArgsortCompl(float *val)
-    : val_(val) {}
-  bool operator() (float i, float j) {
-    return (val_[static_cast<index_t>(i)] >
-            val_[static_cast<index_t>(j)]);
+  const float* val_;
+  explicit ReverseArgsortCompl(float* val) : val_(val) {}
+  bool operator()(float i, float j) {
+    return (val_[static_cast<index_t>(i)] > val_[static_cast<index_t>(j)]);
   }
 };
 
 // copy score and init order
 inline void CopyScore(const mshadow::Tensor<cpu, 2>& dets,
-                      mshadow::Tensor<cpu, 1> *score,
-                      mshadow::Tensor<cpu, 1> *order) {
+                      mshadow::Tensor<cpu, 1>* score,
+                      mshadow::Tensor<cpu, 1>* order) {
   for (index_t i = 0; i < dets.size(0); i++) {
     (*score)[i] = dets[i][4];
     (*order)[i] = i;
@@ -189,8 +186,7 @@ inline void CopyScore(const mshadow::Tensor<cpu, 2>& dets,
 }
 
 // sort order array according to score
-inline void ReverseArgsort(const mshadow::Tensor<cpu, 1>& score,
-                           mshadow::Tensor<cpu, 1> *order) {
+inline void ReverseArgsort(const mshadow::Tensor<cpu, 1>& score, mshadow::Tensor<cpu, 1>* order) {
   ReverseArgsortCompl cmpl(score.dptr_);
   std::stable_sort(order->dptr_, order->dptr_ + score.size(0), cmpl);
 }
@@ -200,7 +196,7 @@ inline void ReverseArgsort(const mshadow::Tensor<cpu, 1>& score,
 inline void ReorderProposals(const mshadow::Tensor<cpu, 2>& prev_dets,
                              const mshadow::Tensor<cpu, 1>& order,
                              const index_t pre_nms_top_n,
-                             mshadow::Tensor<cpu, 2> *dets) {
+                             mshadow::Tensor<cpu, 2>* dets) {
   CHECK_EQ(dets->size(0), pre_nms_top_n);
   for (index_t i = 0; i < dets->size(0); i++) {
     const index_t index = order[i];
@@ -214,10 +210,10 @@ inline void ReorderProposals(const mshadow::Tensor<cpu, 2>& prev_dets,
 inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
                                   const float thresh,
                                   const index_t post_nms_top_n,
-                                  mshadow::Tensor<cpu, 1> *area,
-                                  mshadow::Tensor<cpu, 1> *suppressed,
-                                  mshadow::Tensor<cpu, 1> *keep,
-                                  index_t *out_size) {
+                                  mshadow::Tensor<cpu, 1>* area,
+                                  mshadow::Tensor<cpu, 1>* suppressed,
+                                  mshadow::Tensor<cpu, 1>* keep,
+                                  index_t* out_size) {
   CHECK_EQ(dets.shape_[1], 5) << "dets: [x1, y1, x2, y2, score]";
   CHECK_GT(dets.shape_[0], 0);
   CHECK_EQ(dets.CheckContiguous(), true);
@@ -226,17 +222,16 @@ inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
   CHECK_EQ(keep->CheckContiguous(), true);
   // calculate area
   for (index_t i = 0; i < dets.size(0); ++i) {
-    (*area)[i] = (dets[i][2] - dets[i][0] + 1) *
-                 (dets[i][3] - dets[i][1] + 1);
+    (*area)[i] = (dets[i][2] - dets[i][0] + 1) * (dets[i][3] - dets[i][1] + 1);
   }
 
   // calculate nms
   *out_size = 0;
   for (index_t i = 0; i < dets.size(0) && (*out_size) < post_nms_top_n; ++i) {
-    float ix1 = dets[i][0];
-    float iy1 = dets[i][1];
-    float ix2 = dets[i][2];
-    float iy2 = dets[i][3];
+    float ix1   = dets[i][0];
+    float iy1   = dets[i][1];
+    float ix2   = dets[i][2];
+    float iy2   = dets[i][3];
     float iarea = (*area)[i];
 
     if ((*suppressed)[i] > 0.0f) {
@@ -244,18 +239,18 @@ inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
     }
 
     (*keep)[(*out_size)++] = i;
-    for (index_t j = i + 1; j < dets.size(0); j ++) {
+    for (index_t j = i + 1; j < dets.size(0); j++) {
       if ((*suppressed)[j] > 0.0f) {
         continue;
       }
-      float xx1 = std::max(ix1, dets[j][0]);
-      float yy1 = std::max(iy1, dets[j][1]);
-      float xx2 = std::min(ix2, dets[j][2]);
-      float yy2 = std::min(iy2, dets[j][3]);
-      float w = std::max(0.0f, xx2 - xx1 + 1.0f);
-      float h = std::max(0.0f, yy2 - yy1 + 1.0f);
+      float xx1   = std::max(ix1, dets[j][0]);
+      float yy1   = std::max(iy1, dets[j][1]);
+      float xx2   = std::min(ix2, dets[j][2]);
+      float yy2   = std::min(iy2, dets[j][3]);
+      float w     = std::max(0.0f, xx2 - xx1 + 1.0f);
+      float h     = std::max(0.0f, yy2 - yy1 + 1.0f);
       float inter = w * h;
-      float ovr = inter / (iarea + (*area)[j] - inter);
+      float ovr   = inter / (iarea + (*area)[j] - inter);
       if (ovr > thresh) {
         (*suppressed)[j] = 1.0f;
       }
@@ -267,22 +262,21 @@ inline void NonMaximumSuppression(const mshadow::Tensor<cpu, 2>& dets,
 }  // namespace op
 }  // namespace mxnet
 
-
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
-class ProposalOp : public Operator{
+template <typename xpu>
+class ProposalOp : public Operator {
  public:
   explicit ProposalOp(ProposalParam param) {
     this->param_ = param;
   }
 
-  void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_states) override {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_states) override {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 3);
@@ -290,34 +284,33 @@ class ProposalOp : public Operator{
     CHECK_GT(req.size(), 1);
     CHECK_EQ(req[proposal::kOut], kWriteTo);
     CHECK_EQ(in_data[proposal::kClsProb].shape_[0], 1)
-      << "Sorry, multiple images each device is not implemented.";
+        << "Sorry, multiple images each device is not implemented.";
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    Shape<4> scores_shape = Shape4(in_data[proposal::kClsProb].shape_[0],
+    Shape<4> scores_shape        = Shape4(in_data[proposal::kClsProb].shape_[0],
                                    in_data[proposal::kClsProb].shape_[1] / 2,
                                    in_data[proposal::kClsProb].shape_[2],
                                    in_data[proposal::kClsProb].shape_[3]);
-    real_t* foreground_score_ptr = in_data[proposal::kClsProb].dptr<real_t>()
-                                    + scores_shape.Size();
-    Tensor<cpu, 4> scores = Tensor<cpu, 4>(foreground_score_ptr, scores_shape);
-    Tensor<cpu, 4> bbox_deltas = in_data[proposal::kBBoxPred].get<cpu, 4, real_t>(s);
-    Tensor<cpu, 2> im_info = in_data[proposal::kImInfo].get<cpu, 2, real_t>(s);
+    real_t* foreground_score_ptr = in_data[proposal::kClsProb].dptr<real_t>() + scores_shape.Size();
+    Tensor<cpu, 4> scores        = Tensor<cpu, 4>(foreground_score_ptr, scores_shape);
+    Tensor<cpu, 4> bbox_deltas   = in_data[proposal::kBBoxPred].get<cpu, 4, real_t>(s);
+    Tensor<cpu, 2> im_info       = in_data[proposal::kImInfo].get<cpu, 2, real_t>(s);
 
-    Tensor<cpu, 2> out = out_data[proposal::kOut].get<cpu, 2, real_t>(s);
+    Tensor<cpu, 2> out       = out_data[proposal::kOut].get<cpu, 2, real_t>(s);
     Tensor<cpu, 2> out_score = out_data[proposal::kScore].get<cpu, 2, real_t>(s);
 
-    int num_anchors = in_data[proposal::kClsProb].shape_[1] / 2;
-    int height = scores.size(2);
-    int width = scores.size(3);
-    int count = num_anchors * height * width;
-    int rpn_pre_nms_top_n = (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n : count;
-    rpn_pre_nms_top_n = std::min(rpn_pre_nms_top_n, count);
+    int num_anchors        = in_data[proposal::kClsProb].shape_[1] / 2;
+    int height             = scores.size(2);
+    int width              = scores.size(3);
+    int count              = num_anchors * height * width;
+    int rpn_pre_nms_top_n  = (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n : count;
+    rpn_pre_nms_top_n      = std::min(rpn_pre_nms_top_n, count);
     int rpn_post_nms_top_n = std::min(param_.rpn_post_nms_top_n, rpn_pre_nms_top_n);
 
     int workspace_size = count * 5 + 2 * count + rpn_pre_nms_top_n * 5 + 3 * rpn_pre_nms_top_n;
-    Tensor<cpu, 1> workspace = ctx.requested[proposal::kTempResource].get_space<cpu>(
-      Shape1(workspace_size), s);
+    Tensor<cpu, 1> workspace =
+        ctx.requested[proposal::kTempResource].get_space<cpu>(Shape1(workspace_size), s);
     int start = 0;
     Tensor<cpu, 2> workspace_proposals(workspace.dptr_ + start, Shape2(count, 5));
     start += count * 5;
@@ -338,17 +331,14 @@ class ProposalOp : public Operator{
     base_anchor[3] = param_.feature_stride - 1.0;
     CHECK_EQ(num_anchors, param_.ratios.ndim() * param_.scales.ndim());
     std::vector<float> anchors;
-    utils::GenerateAnchors(base_anchor,
-                           param_.ratios,
-                           param_.scales,
-                           &anchors);
+    utils::GenerateAnchors(base_anchor, param_.ratios, param_.scales, &anchors);
     std::memcpy(workspace_proposals.dptr_, &anchors[0], sizeof(float) * anchors.size());
 
     // Enumerate all shifted anchors
     for (index_t i = 0; i < static_cast<index_t>(num_anchors); ++i) {
       for (index_t j = 0; j < static_cast<index_t>(height); ++j) {
         for (index_t k = 0; k < static_cast<index_t>(width); ++k) {
-          index_t index = j * (width * num_anchors) + k * (num_anchors) + i;
+          index_t index                 = j * (width * num_anchors) + k * (num_anchors) + i;
           workspace_proposals[index][0] = workspace_proposals[i][0] + k * param_.feature_stride;
           workspace_proposals[index][1] = workspace_proposals[i][1] + j * param_.feature_stride;
           workspace_proposals[index][2] = workspace_proposals[i][2] + k * param_.feature_stride;
@@ -360,37 +350,42 @@ class ProposalOp : public Operator{
 
     // prevent padded predictions
     int real_height = static_cast<int>(im_info[0][0] / param_.feature_stride);
-    int real_width = static_cast<int>(im_info[0][1] / param_.feature_stride);
+    int real_width  = static_cast<int>(im_info[0][1] / param_.feature_stride);
     CHECK_GE(height, real_height) << height << " " << real_height << std::endl;
     CHECK_GE(width, real_width) << width << " " << real_width << std::endl;
 
     if (param_.iou_loss) {
-      utils::IoUTransformInv(workspace_proposals, bbox_deltas, im_info[0][0], im_info[0][1],
-                             real_height, real_width, &(workspace_proposals));
+      utils::IoUTransformInv(workspace_proposals,
+                             bbox_deltas,
+                             im_info[0][0],
+                             im_info[0][1],
+                             real_height,
+                             real_width,
+                             &(workspace_proposals));
     } else {
-      utils::BBoxTransformInv(workspace_proposals, bbox_deltas, im_info[0][0], im_info[0][1],
-                              real_height, real_width, &(workspace_proposals));
+      utils::BBoxTransformInv(workspace_proposals,
+                              bbox_deltas,
+                              im_info[0][0],
+                              im_info[0][1],
+                              real_height,
+                              real_width,
+                              &(workspace_proposals));
     }
     utils::FilterBox(&workspace_proposals, param_.rpn_min_size * im_info[0][2]);
 
     Tensor<cpu, 1> score = workspace_pre_nms[0];
     Tensor<cpu, 1> order = workspace_pre_nms[1];
 
-    utils::CopyScore(workspace_proposals,
-                     &score,
-                     &order);
-    utils::ReverseArgsort(score,
-                          &order);
-    utils::ReorderProposals(workspace_proposals,
-                            order,
-                            rpn_pre_nms_top_n,
-                            &workspace_ordered_proposals);
-
-    index_t out_size = 0;
-    Tensor<cpu, 1> area = workspace_nms[0];
+    utils::CopyScore(workspace_proposals, &score, &order);
+    utils::ReverseArgsort(score, &order);
+    utils::ReorderProposals(
+        workspace_proposals, order, rpn_pre_nms_top_n, &workspace_ordered_proposals);
+
+    index_t out_size          = 0;
+    Tensor<cpu, 1> area       = workspace_nms[0];
     Tensor<cpu, 1> suppressed = workspace_nms[1];
-    Tensor<cpu, 1> keep = workspace_nms[2];
-    suppressed = 0;  // surprised!
+    Tensor<cpu, 1> keep       = workspace_nms[2];
+    suppressed                = 0;  // surprised!
 
     utils::NonMaximumSuppression(workspace_ordered_proposals,
                                  param_.threshold,
@@ -407,7 +402,7 @@ class ProposalOp : public Operator{
       if (i < out_size) {
         index_t index = keep[i];
         for (index_t j = 0; j < 4; ++j) {
-          out[i][j + 1] =  workspace_ordered_proposals[index][j];
+          out[i][j + 1] = workspace_ordered_proposals[index][j];
         }
         out_score[i][0] = workspace_ordered_proposals[index][4];
       } else {
@@ -420,21 +415,21 @@ class ProposalOp : public Operator{
     }
   }
 
-  void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) override {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad,
+                const std::vector<TBlob>& aux_states) override {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_grad.size(), 3);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s         = ctx.get_stream<xpu>();
     Tensor<xpu, 4> gscores = in_grad[proposal::kClsProb].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 4> gbbox = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 2> ginfo = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 4> gbbox   = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
+    Tensor<xpu, 2> ginfo   = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
 
     // can not assume the grad would be zero
     Assign(gscores, req[proposal::kClsProb], 0);
@@ -446,8 +441,8 @@ class ProposalOp : public Operator{
   ProposalParam param_;
 };  // class ProposalOp
 
-template<>
-Operator *CreateOp<cpu>(ProposalParam param) {
+template <>
+Operator* CreateOp<cpu>(ProposalParam param) {
   return new ProposalOp<cpu>(param);
 }
 
@@ -458,11 +453,13 @@ Operator* ProposalProp::CreateOperator(Context ctx) const {
 DMLC_REGISTER_PARAMETER(ProposalParam);
 
 MXNET_REGISTER_OP_PROPERTY(_contrib_Proposal, ProposalProp)
-.describe("Generate region proposals via RPN")
-.add_argument("cls_prob", "NDArray-or-Symbol", "Score of how likely proposal is object.")
-.add_argument("bbox_pred", "NDArray-or-Symbol", "BBox Predicted deltas from anchors for proposals")
-.add_argument("im_info", "NDArray-or-Symbol", "Image size and scale.")
-.add_arguments(ProposalParam::__FIELDS__());
+    .describe("Generate region proposals via RPN")
+    .add_argument("cls_prob", "NDArray-or-Symbol", "Score of how likely proposal is object.")
+    .add_argument("bbox_pred",
+                  "NDArray-or-Symbol",
+                  "BBox Predicted deltas from anchors for proposals")
+    .add_argument("im_info", "NDArray-or-Symbol", "Image size and scale.")
+    .add_arguments(ProposalParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/proposal.cu b/src/operator/contrib/proposal.cu
index dc45b3cdef7b..ec1fa5f197ba 100644
--- a/src/operator/contrib/proposal.cu
+++ b/src/operator/contrib/proposal.cu
@@ -22,7 +22,7 @@
  * \file proposal.cu
  * \brief Proposal Operator
  * \author Shaoqing Ren, Jian Guo
-*/
+ */
 #include <dmlc/logging.h>
 #include <dmlc/parameter.h>
 #include <mxnet/operator.h>
@@ -45,12 +45,12 @@
 
 #define DIVUP(m, n) ((m) / (n) + ((m) % (n) > 0))
 
-#define FRCNN_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define FRCNN_CUDA_CHECK(condition)                                   \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
-} while (0)
+  } while (0)
 
 namespace mshadow {
 namespace cuda {
@@ -59,7 +59,7 @@ namespace cuda {
 // workspace_proposals are (h * w * anchor, 5)
 // w defines "x" and h defines "y"
 // count should be total anchors numbers, h * w * anchors
-template<typename Dtype>
+template <typename Dtype>
 __global__ void ProposalGridKernel(const int count,
                                    const int num_anchors,
                                    const int height,
@@ -67,8 +67,7 @@ __global__ void ProposalGridKernel(const int count,
                                    const int feature_stride,
                                    const Dtype* scores,
                                    Dtype* workspace_proposals) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     int a = index % num_anchors;
     int w = (index / num_anchors) % width;
@@ -87,7 +86,7 @@ __global__ void ProposalGridKernel(const int count,
 // out_pred_boxes are (h * w * anchor, 5)
 // count should be total anchors numbers, h * w * anchors
 // in-place write: boxes and out_pred_boxes are the same location
-template<typename Dtype>
+template <typename Dtype>
 __global__ void BBoxPredKernel(const int count,
                                const int num_anchors,
                                const int feat_height,
@@ -99,17 +98,16 @@ __global__ void BBoxPredKernel(const int count,
                                const Dtype* boxes,
                                const Dtype* deltas,
                                Dtype* out_pred_boxes) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     int a = index % num_anchors;
     int w = (index / num_anchors) % feat_width;
     int h = index / num_anchors / feat_width;
 
-    float width = boxes[index * 5 + 2] - boxes[index * 5 + 0] + 1.0f;
+    float width  = boxes[index * 5 + 2] - boxes[index * 5 + 0] + 1.0f;
     float height = boxes[index * 5 + 3] - boxes[index * 5 + 1] + 1.0f;
-    float ctr_x = boxes[index * 5 + 0] + 0.5f * (width - 1.0f);
-    float ctr_y = boxes[index * 5 + 1] + 0.5f * (height - 1.0f);
+    float ctr_x  = boxes[index * 5 + 0] + 0.5f * (width - 1.0f);
+    float ctr_y  = boxes[index * 5 + 1] + 0.5f * (height - 1.0f);
 
     float dx = deltas[((a * 4) * feat_height + h) * feat_width + w];
     float dy = deltas[((a * 4 + 1) * feat_height + h) * feat_width + w];
@@ -118,8 +116,8 @@ __global__ void BBoxPredKernel(const int count,
 
     float pred_ctr_x = dx * width + ctr_x;
     float pred_ctr_y = dy * height + ctr_y;
-    float pred_w = exp(dw) * width;
-    float pred_h = exp(dh) * height;
+    float pred_w     = exp(dw) * width;
+    float pred_h     = exp(dh) * height;
 
     float pred_x1 = pred_ctr_x - 0.5f * (pred_w - 1.0f);
     float pred_y1 = pred_ctr_y - 0.5f * (pred_h - 1.0f);
@@ -147,7 +145,7 @@ __global__ void BBoxPredKernel(const int count,
 // out_pred_boxes are (h * w * anchor, 5)
 // count should be total anchors numbers, h * w * anchors
 // in-place write: boxes and out_pred_boxes are the same location
-template<typename Dtype>
+template <typename Dtype>
 __global__ void IoUPredKernel(const int count,
                               const int num_anchors,
                               const int feat_height,
@@ -159,8 +157,7 @@ __global__ void IoUPredKernel(const int count,
                               const Dtype* boxes,
                               const Dtype* deltas,
                               Dtype* out_pred_boxes) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     int a = index % num_anchors;
     int w = (index / num_anchors) % feat_width;
@@ -195,12 +192,9 @@ __global__ void IoUPredKernel(const int count,
 // filter box with stride less than rpn_min_size
 // filter: set score to zero
 // dets (n, 5)
-template<typename Dtype>
-__global__ void FilterBoxKernel(const int count,
-                                const float min_size,
-                                Dtype* dets) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+template <typename Dtype>
+__global__ void FilterBoxKernel(const int count, const float min_size, Dtype* dets) {
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     float iw = dets[index * 5 + 2] - dets[index * 5 + 0] + 1.0f;
     float ih = dets[index * 5 + 3] - dets[index * 5 + 1] + 1.0f;
@@ -217,13 +211,9 @@ __global__ void FilterBoxKernel(const int count,
 // copy score and init order
 // dets (n, 5); score (n, ); order (n, )
 // count should be n (total anchors or proposals)
-template<typename Dtype>
-__global__ void CopyScoreKernel(const int count,
-                                const Dtype* dets,
-                                Dtype* score,
-                                int* order) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+template <typename Dtype>
+__global__ void CopyScoreKernel(const int count, const Dtype* dets, Dtype* score, int* order) {
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     score[index] = dets[index * 5 + 4];
     order[index] = index;
@@ -233,43 +223,42 @@ __global__ void CopyScoreKernel(const int count,
 // reorder proposals according to order and keep the top_n proposals
 // prev_dets (n, 5); order (n, ); dets (n, 5)
 // count should be output anchor numbers (top_n)
-template<typename Dtype>
+template <typename Dtype>
 __global__ void ReorderProposalsKernel(const int count,
                                        const Dtype* prev_dets,
                                        const int* order,
                                        Dtype* dets) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     const int order_i = order[index];
-    for (int j = 0; j < 5; j ++) {
+    for (int j = 0; j < 5; j++) {
       dets[index * 5 + j] = prev_dets[order_i * 5 + j];
     }
   }
 }
 
-__device__ inline float devIoU(float const * const a, float const * const b) {
+__device__ inline float devIoU(float const* const a, float const* const b) {
   float left = max(a[0], b[0]), right = min(a[2], b[2]);
   float top = max(a[1], b[1]), bottom = min(a[3], b[3]);
   float width = max(right - left + 1, 0.f), height = max(bottom - top + 1, 0.f);
   float interS = width * height;
-  float Sa = (a[2] - a[0] + 1) * (a[3] - a[1] + 1);
-  float Sb = (b[2] - b[0] + 1) * (b[3] - b[1] + 1);
+  float Sa     = (a[2] - a[0] + 1) * (a[3] - a[1] + 1);
+  float Sb     = (b[2] - b[0] + 1) * (b[3] - b[1] + 1);
   return interS / (Sa + Sb - interS);
 }
 
-__global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh,
-                           const float *dev_boxes, uint64_t *dev_mask) {
+__global__ void nms_kernel(const int n_boxes,
+                           const float nms_overlap_thresh,
+                           const float* dev_boxes,
+                           uint64_t* dev_mask) {
   const int threadsPerBlock = sizeof(uint64_t) * 8;
-  const int row_start = blockIdx.y;
-  const int col_start = blockIdx.x;
+  const int row_start       = blockIdx.y;
+  const int col_start       = blockIdx.x;
 
   // if (row_start > col_start) return;
 
-  const int row_size =
-        min(n_boxes - row_start * threadsPerBlock, threadsPerBlock);
-  const int col_size =
-        min(n_boxes - col_start * threadsPerBlock, threadsPerBlock);
+  const int row_size = min(n_boxes - row_start * threadsPerBlock, threadsPerBlock);
+  const int col_size = min(n_boxes - col_start * threadsPerBlock, threadsPerBlock);
 
   __shared__ float block_boxes[threadsPerBlock * 5];
   if (threadIdx.x < col_size) {
@@ -288,10 +277,10 @@ __global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh,
 
   if (threadIdx.x < row_size) {
     const int cur_box_idx = threadsPerBlock * row_start + threadIdx.x;
-    const float *cur_box = dev_boxes + cur_box_idx * 5;
-    int i = 0;
-    uint64_t t = 0;
-    int start = 0;
+    const float* cur_box  = dev_boxes + cur_box_idx * 5;
+    int i                 = 0;
+    uint64_t t            = 0;
+    int start             = 0;
     if (row_start == col_start) {
       start = threadIdx.x + 1;
     }
@@ -300,42 +289,38 @@ __global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh,
         t |= 1ULL << i;
       }
     }
-    const int col_blocks = DIVUP(n_boxes, threadsPerBlock);
+    const int col_blocks                           = DIVUP(n_boxes, threadsPerBlock);
     dev_mask[cur_box_idx * col_blocks + col_start] = t;
   }
 }
 
-void _nms(mshadow::Stream<gpu> *s,
+void _nms(mshadow::Stream<gpu>* s,
           const mshadow::Tensor<gpu, 2>& boxes,
           const float nms_overlap_thresh,
           const int rpn_post_nms_top_n,
-          int *keep,
-          int *num_out) {
+          int* keep,
+          int* num_out) {
   const int threadsPerBlock = sizeof(uint64_t) * 8;
-  const int boxes_num = boxes.size(0);
-  const int boxes_dim = boxes.size(1);
+  const int boxes_num       = boxes.size(0);
+  const int boxes_dim       = boxes.size(1);
 
-  float* boxes_dev = boxes.dptr_;
+  float* boxes_dev   = boxes.dptr_;
   uint64_t* mask_dev = nullptr;
 
   const int col_blocks = DIVUP(boxes_num, threadsPerBlock);
-  FRCNN_CUDA_CHECK(cudaMalloc(&mask_dev,
-                              boxes_num * col_blocks * sizeof(uint64_t)));
+  FRCNN_CUDA_CHECK(cudaMalloc(&mask_dev, boxes_num * col_blocks * sizeof(uint64_t)));
 
-  dim3 blocks(DIVUP(boxes_num, threadsPerBlock),
-              DIVUP(boxes_num, threadsPerBlock));
+  dim3 blocks(DIVUP(boxes_num, threadsPerBlock), DIVUP(boxes_num, threadsPerBlock));
   dim3 threads(threadsPerBlock);
-  nms_kernel<<<blocks, threads>>>(boxes_num,
-                                  nms_overlap_thresh,
-                                  boxes_dev,
-                                  mask_dev);
+  nms_kernel<<<blocks, threads>>>(boxes_num, nms_overlap_thresh, boxes_dev, mask_dev);
   FRCNN_CUDA_CHECK(cudaGetLastError());
   std::vector<uint64_t> mask_host(boxes_num * col_blocks);
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   FRCNN_CUDA_CHECK(cudaMemcpyAsync(&mask_host[0],
                                    mask_dev,
                                    sizeof(uint64_t) * boxes_num * col_blocks,
-                                   cudaMemcpyDeviceToHost, stream));
+                                   cudaMemcpyDeviceToHost,
+                                   stream));
   FRCNN_CUDA_CHECK(cudaStreamSynchronize(stream));
 
   std::vector<uint64_t> remv(col_blocks);
@@ -343,13 +328,14 @@ void _nms(mshadow::Stream<gpu> *s,
 
   int num_to_keep = 0;
   for (int i = 0; i < boxes_num; i++) {
-    int nblock = i / threadsPerBlock;
+    int nblock  = i / threadsPerBlock;
     int inblock = i % threadsPerBlock;
 
     if (!(remv[nblock] & (1ULL << inblock))) {
       keep[num_to_keep++] = i;
-      if (num_to_keep >= rpn_post_nms_top_n) break;
-      uint64_t *p = &mask_host[0] + i * col_blocks;
+      if (num_to_keep >= rpn_post_nms_top_n)
+        break;
+      uint64_t* p = &mask_host[0] + i * col_blocks;
       for (int j = nblock; j < col_blocks; j++) {
         remv[j] |= p[j];
       }
@@ -363,15 +349,14 @@ void _nms(mshadow::Stream<gpu> *s,
 // copy proposals to output
 // dets (top_n, 5); keep (top_n, ); out (top_n, )
 // count should be top_n (total anchors or proposals)
-template<typename Dtype>
+template <typename Dtype>
 __global__ void PrepareOutput(const int count,
                               const Dtype* dets,
                               const int* keep,
                               const int out_size,
                               Dtype* out,
                               Dtype* score) {
-  for (int index = blockIdx.x * blockDim.x + threadIdx.x;
-       index < count;
+  for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < count;
        index += blockDim.x * gridDim.x) {
     out[index * 5] = 0;
     if (index < out_size) {
@@ -396,18 +381,18 @@ __global__ void PrepareOutput(const int count,
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
-class ProposalGPUOp : public Operator{
+template <typename xpu>
+class ProposalGPUOp : public Operator {
  public:
   explicit ProposalGPUOp(ProposalParam param) {
     this->param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_states) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     using namespace mshadow::cuda;
@@ -416,30 +401,30 @@ class ProposalGPUOp : public Operator{
     CHECK_GT(req.size(), 1);
     CHECK_EQ(req[proposal::kOut], kWriteTo);
     CHECK_EQ(in_data[proposal::kClsProb].shape_[0], 1)
-      << "Sorry, multiple images each device is not implemented.";
+        << "Sorry, multiple images each device is not implemented.";
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     Shape<4> fg_scores_shape = Shape4(in_data[proposal::kClsProb].shape_[0],
                                       in_data[proposal::kClsProb].shape_[1] / 2,
                                       in_data[proposal::kClsProb].shape_[2],
                                       in_data[proposal::kClsProb].shape_[3]);
-    real_t* foreground_score_ptr = in_data[proposal::kClsProb].dptr<real_t>()
-                                    + fg_scores_shape.Size();
-    Tensor<xpu, 4> scores = Tensor<xpu, 4>(foreground_score_ptr, fg_scores_shape);
+    real_t* foreground_score_ptr =
+        in_data[proposal::kClsProb].dptr<real_t>() + fg_scores_shape.Size();
+    Tensor<xpu, 4> scores      = Tensor<xpu, 4>(foreground_score_ptr, fg_scores_shape);
     Tensor<xpu, 4> bbox_deltas = in_data[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 2> im_info = in_data[proposal::kImInfo].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 2> im_info     = in_data[proposal::kImInfo].get<xpu, 2, real_t>(s);
 
-    Tensor<xpu, 2> out = out_data[proposal::kOut].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 2> out       = out_data[proposal::kOut].get<xpu, 2, real_t>(s);
     Tensor<xpu, 2> out_score = out_data[proposal::kScore].get<xpu, 2, real_t>(s);
 
     int num_anchors = in_data[proposal::kClsProb].shape_[1] / 2;
-    int height = scores.size(2);
-    int width = scores.size(3);
-    int count = num_anchors * height * width;  // count of total anchors
+    int height      = scores.size(2);
+    int width       = scores.size(3);
+    int count       = num_anchors * height * width;  // count of total anchors
     // set to -1 for max
-    int rpn_pre_nms_top_n = (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n : count;
-    rpn_pre_nms_top_n = std::min(rpn_pre_nms_top_n, count);
+    int rpn_pre_nms_top_n  = (param_.rpn_pre_nms_top_n > 0) ? param_.rpn_pre_nms_top_n : count;
+    rpn_pre_nms_top_n      = std::min(rpn_pre_nms_top_n, count);
     int rpn_post_nms_top_n = std::min(param_.rpn_post_nms_top_n, rpn_pre_nms_top_n);
 
     // Generate first anchors based on base anchor
@@ -450,10 +435,7 @@ class ProposalGPUOp : public Operator{
     base_anchor[3] = param_.feature_stride - 1.0;
     CHECK_EQ(num_anchors, param_.ratios.ndim() * param_.scales.ndim());
     std::vector<float> anchors;
-    utils::GenerateAnchors(base_anchor,
-                           param_.ratios,
-                           param_.scales,
-                           &anchors);
+    utils::GenerateAnchors(base_anchor, param_.ratios, param_.scales, &anchors);
 
     // Copy generated anchors to GPU
     float* workspace_proposals_ptr = nullptr;
@@ -461,50 +443,72 @@ class ProposalGPUOp : public Operator{
     Tensor<xpu, 2> workspace_proposals(workspace_proposals_ptr, Shape2(count, 5));
     cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
     FRCNN_CUDA_CHECK(cudaMemcpyAsync(workspace_proposals.dptr_,
-                                     &anchors[0], sizeof(float) * anchors.size(),
-                                     cudaMemcpyHostToDevice, stream));
+                                     &anchors[0],
+                                     sizeof(float) * anchors.size(),
+                                     cudaMemcpyHostToDevice,
+                                     stream));
 
     // Copy proposals to a mesh grid
     dim3 dimGrid((count + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock);
     dim3 dimBlock(kMaxThreadsPerBlock);
     CheckLaunchParam(dimGrid, dimBlock, "ProposalGrid");
-    ProposalGridKernel<<<dimGrid, dimBlock>>>(
-      count, num_anchors, height, width, param_.feature_stride,
-      scores.dptr_, workspace_proposals.dptr_);
+    ProposalGridKernel<<<dimGrid, dimBlock>>>(count,
+                                              num_anchors,
+                                              height,
+                                              width,
+                                              param_.feature_stride,
+                                              scores.dptr_,
+                                              workspace_proposals.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // im_info is small, we want to copy them to cpu
     std::vector<float> cpu_im_info(3);
-    FRCNN_CUDA_CHECK(cudaMemcpyAsync(&cpu_im_info[0], im_info.dptr_,
+    FRCNN_CUDA_CHECK(cudaMemcpyAsync(&cpu_im_info[0],
+                                     im_info.dptr_,
                                      sizeof(float) * cpu_im_info.size(),
-                                     cudaMemcpyDeviceToHost, stream));
+                                     cudaMemcpyDeviceToHost,
+                                     stream));
     FRCNN_CUDA_CHECK(cudaStreamSynchronize(stream));
 
     // prevent padded predictions
     int real_height = static_cast<int>(cpu_im_info[0] / param_.feature_stride);
-    int real_width = static_cast<int>(cpu_im_info[1] / param_.feature_stride);
+    int real_width  = static_cast<int>(cpu_im_info[1] / param_.feature_stride);
     CHECK_GE(height, real_height) << height << " " << real_height << std::endl;
     CHECK_GE(width, real_width) << width << " " << real_width << std::endl;
 
     // Transform anchors and bbox_deltas into bboxes
     CheckLaunchParam(dimGrid, dimBlock, "BBoxPred");
     if (param_.iou_loss) {
-      IoUPredKernel<<<dimGrid, dimBlock>>>(
-        count, num_anchors, height, width, real_height, real_width,
-        cpu_im_info[0], cpu_im_info[1],
-        workspace_proposals.dptr_, bbox_deltas.dptr_, workspace_proposals.dptr_);
+      IoUPredKernel<<<dimGrid, dimBlock>>>(count,
+                                           num_anchors,
+                                           height,
+                                           width,
+                                           real_height,
+                                           real_width,
+                                           cpu_im_info[0],
+                                           cpu_im_info[1],
+                                           workspace_proposals.dptr_,
+                                           bbox_deltas.dptr_,
+                                           workspace_proposals.dptr_);
     } else {
-      BBoxPredKernel<<<dimGrid, dimBlock>>>(
-        count, num_anchors, height, width, real_height, real_width,
-        cpu_im_info[0], cpu_im_info[1],
-        workspace_proposals.dptr_, bbox_deltas.dptr_, workspace_proposals.dptr_);
+      BBoxPredKernel<<<dimGrid, dimBlock>>>(count,
+                                            num_anchors,
+                                            height,
+                                            width,
+                                            real_height,
+                                            real_width,
+                                            cpu_im_info[0],
+                                            cpu_im_info[1],
+                                            workspace_proposals.dptr_,
+                                            bbox_deltas.dptr_,
+                                            workspace_proposals.dptr_);
     }
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // filter boxes with less than rpn_min_size
     CheckLaunchParam(dimGrid, dimBlock, "FilterBox");
     FilterBoxKernel<<<dimGrid, dimBlock>>>(
-      count, param_.rpn_min_size * cpu_im_info[2], workspace_proposals.dptr_);
+        count, param_.rpn_min_size * cpu_im_info[2], workspace_proposals.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // Copy score to a continuous memory
@@ -517,7 +521,7 @@ class ProposalGPUOp : public Operator{
 
     CheckLaunchParam(dimGrid, dimBlock, "CopyScore");
     CopyScoreKernel<<<dimGrid, dimBlock>>>(
-      count, workspace_proposals.dptr_, score.dptr_, order.dptr_);
+        count, workspace_proposals.dptr_, score.dptr_, order.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // argsort score, save order
@@ -530,15 +534,17 @@ class ProposalGPUOp : public Operator{
 
     // Reorder proposals according to order
     float* workspace_ordered_proposals_ptr = nullptr;
-    FRCNN_CUDA_CHECK(cudaMalloc(&workspace_ordered_proposals_ptr,
-                                sizeof(float) * rpn_pre_nms_top_n * 5));
+    FRCNN_CUDA_CHECK(
+        cudaMalloc(&workspace_ordered_proposals_ptr, sizeof(float) * rpn_pre_nms_top_n * 5));
     Tensor<xpu, 2> workspace_ordered_proposals(workspace_ordered_proposals_ptr,
                                                Shape2(rpn_pre_nms_top_n, 5));
 
     dimGrid.x = (rpn_pre_nms_top_n + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
     CheckLaunchParam(dimGrid, dimBlock, "ReorderProposals");
-    ReorderProposalsKernel<<<dimGrid, dimBlock>>>(
-      rpn_pre_nms_top_n, workspace_proposals.dptr_, order.dptr_, workspace_ordered_proposals.dptr_);
+    ReorderProposalsKernel<<<dimGrid, dimBlock>>>(rpn_pre_nms_top_n,
+                                                  workspace_proposals.dptr_,
+                                                  order.dptr_,
+                                                  workspace_ordered_proposals.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     FRCNN_CUDA_CHECK(cudaFree(workspace_proposals_ptr));
@@ -548,24 +554,24 @@ class ProposalGPUOp : public Operator{
     // perform nms
     std::vector<int> _keep(workspace_ordered_proposals.size(0));
     int out_size = 0;
-    _nms(s, workspace_ordered_proposals,
-         param_.threshold,
-         rpn_post_nms_top_n,
-         &_keep[0],
-         &out_size);
+    _nms(
+        s, workspace_ordered_proposals, param_.threshold, rpn_post_nms_top_n, &_keep[0], &out_size);
 
     // copy nms result to gpu
     int* keep;
     FRCNN_CUDA_CHECK(cudaMalloc(&keep, sizeof(int) * _keep.size()));
-    FRCNN_CUDA_CHECK(cudaMemcpyAsync(keep, &_keep[0], sizeof(int) * _keep.size(),
-                                     cudaMemcpyHostToDevice, stream));
+    FRCNN_CUDA_CHECK(cudaMemcpyAsync(
+        keep, &_keep[0], sizeof(int) * _keep.size(), cudaMemcpyHostToDevice, stream));
 
     // copy results after nms
     dimGrid.x = (param_.rpn_post_nms_top_n + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
     CheckLaunchParam(dimGrid, dimBlock, "PrepareOutput");
-    PrepareOutput<<<dimGrid, dimBlock>>>(
-      param_.rpn_post_nms_top_n, workspace_ordered_proposals.dptr_, keep, out_size,
-      out.dptr_, out_score.dptr_);
+    PrepareOutput<<<dimGrid, dimBlock>>>(param_.rpn_post_nms_top_n,
+                                         workspace_ordered_proposals.dptr_,
+                                         keep,
+                                         out_size,
+                                         out.dptr_,
+                                         out_score.dptr_);
     FRCNN_CUDA_CHECK(cudaGetLastError());
 
     // free temporary memory
@@ -573,21 +579,21 @@ class ProposalGPUOp : public Operator{
     FRCNN_CUDA_CHECK(cudaFree(workspace_ordered_proposals_ptr));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_grad.size(), 3);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s         = ctx.get_stream<xpu>();
     Tensor<xpu, 4> gscores = in_grad[proposal::kClsProb].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 4> gbbox = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 2> ginfo = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
+    Tensor<xpu, 4> gbbox   = in_grad[proposal::kBBoxPred].get<xpu, 4, real_t>(s);
+    Tensor<xpu, 2> ginfo   = in_grad[proposal::kImInfo].get<xpu, 2, real_t>(s);
 
     // can not assume the grad would be zero
     Assign(gscores, req[proposal::kClsProb], 0);
@@ -599,7 +605,7 @@ class ProposalGPUOp : public Operator{
   ProposalParam param_;
 };  // class ProposalGPUOp
 
-template<>
+template <>
 Operator* CreateOp<gpu>(ProposalParam param) {
   return new ProposalGPUOp<gpu>(param);
 }
diff --git a/src/operator/contrib/psroi_pooling-inl.h b/src/operator/contrib/psroi_pooling-inl.h
index 2a32b76dc4e8..b11fed7181fa 100644
--- a/src/operator/contrib/psroi_pooling-inl.h
+++ b/src/operator/contrib/psroi_pooling-inl.h
@@ -23,7 +23,7 @@
  * \file psroi_pooling-inl.h
  * \brief psroi pooling operator and symbol
  * \author Yi Li, Tairui Chen, Guodong Zhang, Haozhi Qi, Jifeng Dai
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_PSROI_POOLING_INL_H_
 #define MXNET_OPERATOR_CONTRIB_PSROI_POOLING_INL_H_
 
@@ -37,16 +37,15 @@
 #include "../mshadow_op.h"
 #include "../operator_common.h"
 
-
 namespace mxnet {
 namespace op {
 
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace psroipool {
-enum PSROIPoolingOpInputs {kData, kBox};
-enum PSROIPoolingOpOutputs {kOut};
-}  // psroipool
+enum PSROIPoolingOpInputs { kData, kBox };
+enum PSROIPoolingOpOutputs { kOut };
+}  // namespace psroipool
 
 struct PSROIPoolingParam : public dmlc::Parameter<PSROIPoolingParam> {
   // mxnet::TShape pooled_size;
@@ -55,36 +54,38 @@ struct PSROIPoolingParam : public dmlc::Parameter<PSROIPoolingParam> {
   int pooled_size;
   int group_size;
   DMLC_DECLARE_PARAMETER(PSROIPoolingParam) {
-    DMLC_DECLARE_FIELD(spatial_scale).set_range(0.0, 1.0)
-    .describe("Ratio of input feature map height (or w) to raw image height (or w). "
-    "Equals the reciprocal of total stride in convolutional layers");
+    DMLC_DECLARE_FIELD(spatial_scale)
+        .set_range(0.0, 1.0)
+        .describe(
+            "Ratio of input feature map height (or w) to raw image height (or w). "
+            "Equals the reciprocal of total stride in convolutional layers");
     DMLC_DECLARE_FIELD(output_dim).describe("fix output dim");
-  DMLC_DECLARE_FIELD(pooled_size).describe("fix pooled size");
+    DMLC_DECLARE_FIELD(pooled_size).describe("fix pooled size");
     DMLC_DECLARE_FIELD(group_size).set_default(0).describe("fix group size");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class PSROIPoolingOp : public Operator {
  public:
   explicit PSROIPoolingOp(PSROIPoolingParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_EQ(in_data.size(), 2);
     CHECK_EQ(out_data.size(), 1);
     CHECK_EQ(out_data[psroipool::kOut].shape_[0], in_data[psroipool::kBox].shape_[0]);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     Tensor<xpu, 4, DType> data = in_data[psroipool::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 2, DType> bbox = in_data[psroipool::kBox].get<xpu, 2, DType>(s);
-    Tensor<xpu, 4, DType> out = out_data[psroipool::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> out  = out_data[psroipool::kOut].get<xpu, 4, DType>(s);
     CHECK_EQ(data.CheckContiguous(), true);
     CHECK_EQ(bbox.CheckContiguous(), true);
     CHECK_EQ(out.CheckContiguous(), true);
@@ -92,26 +93,26 @@ class PSROIPoolingOp : public Operator {
     PSROIPoolForward(out, data, bbox, param_.spatial_scale, param_.output_dim, param_.group_size);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_EQ(in_data.size(), 2);
     CHECK_EQ(out_data.size(), 1);
     CHECK_EQ(out_grad[psroipool::kOut].shape_[0], in_data[psroipool::kBox].shape_[0]);
-    CHECK_NE(req[psroipool::kData], kWriteInplace) <<
-      "ROIPooling: Backward doesn't support kWriteInplace.";
-    CHECK_NE(req[psroipool::kBox], kWriteInplace) <<
-      "ROIPooling: Backward doesn't support kWriteInplace.";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    CHECK_NE(req[psroipool::kData], kWriteInplace)
+        << "ROIPooling: Backward doesn't support kWriteInplace.";
+    CHECK_NE(req[psroipool::kBox], kWriteInplace)
+        << "ROIPooling: Backward doesn't support kWriteInplace.";
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     Tensor<xpu, 4, DType> grad_out = out_grad[psroipool::kOut].get<xpu, 4, DType>(s);
-    Tensor<xpu, 2, DType> bbox = in_data[psroipool::kBox].get<xpu, 2, DType>(s);
-    Tensor<xpu, 4, DType> grad_in = in_grad[psroipool::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 2, DType> bbox     = in_data[psroipool::kBox].get<xpu, 2, DType>(s);
+    Tensor<xpu, 4, DType> grad_in  = in_grad[psroipool::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 2, DType> grad_roi = in_grad[psroipool::kBox].get<xpu, 2, DType>(s);
 
     CHECK_EQ(grad_out.CheckContiguous(), true);
@@ -122,8 +123,8 @@ class PSROIPoolingOp : public Operator {
       if (kWriteTo == req[psroipool::kData]) {
         grad_in = 0.0f;
       }
-      PSROIPoolBackwardAcc(grad_in, grad_out, bbox, param_.spatial_scale,
-                           param_.output_dim, param_.group_size);
+      PSROIPoolBackwardAcc(
+          grad_in, grad_out, bbox, param_.spatial_scale, param_.output_dim, param_.group_size);
     }
     if (kWriteTo == req[psroipool::kBox]) {
       grad_roi = 0.0f;
@@ -135,7 +136,7 @@ class PSROIPoolingOp : public Operator {
 };  // class PSROIPoolingOp
 
 // Decalre Factory function, used for dispatch specialization
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(PSROIPoolingParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -159,18 +160,18 @@ class PSROIPoolingProp : public OperatorProperty {
 
   void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.Init(kwargs);
-  if (param_.group_size == 0) {
-    param_.group_size = param_.pooled_size;
-  }
+    if (param_.group_size == 0) {
+      param_.group_size = param_.pooled_size;
+    }
   }
 
   std::map<std::string, std::string> GetParams() const override {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2) << "Input:[data, rois]";
 
@@ -186,13 +187,13 @@ class PSROIPoolingProp : public OperatorProperty {
     // out: [num_rois, c, pooled_h, pooled_w]
     out_shape->clear();
     out_shape->push_back(
-         Shape4(bshape[0], param_.output_dim, param_.pooled_size, param_.pooled_size));
+        Shape4(bshape[0], param_.output_dim, param_.pooled_size, param_.pooled_size));
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_EQ(in_type->size(), 2);
     int dtype = (*in_type)[0];
     CHECK_EQ(dtype, (*in_type)[1]);
@@ -205,7 +206,7 @@ class PSROIPoolingProp : public OperatorProperty {
 
   OperatorProperty* Copy() const override {
     PSROIPoolingProp* psroi_pooling_sym = new PSROIPoolingProp();
-    psroi_pooling_sym->param_ = this->param_;
+    psroi_pooling_sym->param_           = this->param_;
     return psroi_pooling_sym;
   }
 
@@ -214,22 +215,20 @@ class PSROIPoolingProp : public OperatorProperty {
   }
 
   // decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[psroipool::kOut], in_data[psroipool::kBox]};
   }
 
-
   Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
-
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   PSROIPoolingParam param_;
diff --git a/src/operator/contrib/psroi_pooling.cc b/src/operator/contrib/psroi_pooling.cc
index ad9ef6dee9b9..25d4eceb326e 100644
--- a/src/operator/contrib/psroi_pooling.cc
+++ b/src/operator/contrib/psroi_pooling.cc
@@ -24,7 +24,7 @@
  * \file psroi_pooling.cc
  * \brief psroi pooling operator
  * \author Yi Li, Tairui Chen, Guodong Zhang, Haozhi Qi, Jifeng Dai
-*/
+ */
 #include "./psroi_pooling-inl.h"
 #include <mshadow/base.h>
 #include <mshadow/tensor.h>
@@ -32,198 +32,210 @@
 #include <mshadow/dot_engine-inl.h>
 #include <cassert>
 
+using std::ceil;
+using std::floor;
 using std::max;
 using std::min;
-using std::floor;
-using std::ceil;
 
 namespace mshadow {
 
 template <typename DType>
- inline void PSROIPoolForwardCPU(
-  const int count,
-  const DType* bottom_data,
-  const DType spatial_scale,
-  const int channels,
-  const int height, const int width,
-  const int pooled_height, const int pooled_width,
-  const DType* bottom_rois,
-  const int output_dim,
-  const int group_size,
-  DType* top_data) {
+inline void PSROIPoolForwardCPU(const int count,
+                                const DType* bottom_data,
+                                const DType spatial_scale,
+                                const int channels,
+                                const int height,
+                                const int width,
+                                const int pooled_height,
+                                const int pooled_width,
+                                const DType* bottom_rois,
+                                const int output_dim,
+                                const int group_size,
+                                DType* top_data) {
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 #pragma omp parallel for num_threads(omp_threads)
   for (int index = 0; index < count; index++) {
     // The output is in order (n, ctop, ph, pw)
-    int pw = index % pooled_width;
-    int ph = (index / pooled_width) % pooled_height;
+    int pw   = index % pooled_width;
+    int ph   = (index / pooled_width) % pooled_height;
     int ctop = (index / pooled_width / pooled_height) % output_dim;
-    int n = index / pooled_width / pooled_height / output_dim;
+    int n    = index / pooled_width / pooled_height / output_dim;
 
     // [start, end) interval for spatial sampling
     const DType* offset_bottom_rois = bottom_rois + n * 5;
-    int roi_batch_ind = offset_bottom_rois[0];
+    int roi_batch_ind               = offset_bottom_rois[0];
     DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale;
     DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale;
-    DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
-    DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
 
     // Force too small ROIs to be 1x1
-    DType roi_width = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
+    DType roi_width  = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
     DType roi_height = max(roi_end_h - roi_start_h, static_cast<DType>(0.1));
 
     // Compute w and h at bottom
     DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
     DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
 
-    int hstart = floor(static_cast<DType>(ph) * bin_size_h
-                        + roi_start_h);
-    int wstart = floor(static_cast<DType>(pw)* bin_size_w
-                        + roi_start_w);
-    int hend = ceil(static_cast<DType>(ph + 1) * bin_size_h
-                      + roi_start_h);
-    int wend = ceil(static_cast<DType>(pw + 1) * bin_size_w
-                      + roi_start_w);
+    int hstart = floor(static_cast<DType>(ph) * bin_size_h + roi_start_h);
+    int wstart = floor(static_cast<DType>(pw) * bin_size_w + roi_start_w);
+    int hend   = ceil(static_cast<DType>(ph + 1) * bin_size_h + roi_start_h);
+    int wend   = ceil(static_cast<DType>(pw + 1) * bin_size_w + roi_start_w);
     // Add roi offsets and clip to input boundaries
-    hstart = min(max(hstart, 0), height);
-    hend = min(max(hend, 0), height);
-    wstart = min(max(wstart, 0), width);
-    wend = min(max(wend, 0), width);
+    hstart        = min(max(hstart, 0), height);
+    hend          = min(max(hend, 0), height);
+    wstart        = min(max(wstart, 0), width);
+    wend          = min(max(wend, 0), width);
     bool is_empty = (hend <= hstart) || (wend <= wstart);
 
-    int gw = floor(static_cast<DType>(pw)* group_size / pooled_width);
-    int gh = floor(static_cast<DType>(ph)* group_size / pooled_height);
-    gw = min(max(gw, 0), group_size - 1);
-    gh = min(max(gh, 0), group_size - 1);
-    int c = (ctop*group_size + gh)*group_size + gw;
+    int gw = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    int gh = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw     = min(max(gw, 0), group_size - 1);
+    gh     = min(max(gh, 0), group_size - 1);
+    int c  = (ctop * group_size + gh) * group_size + gw;
 
     const DType* offset_bottom_data = bottom_data + (roi_batch_ind * channels + c) * height * width;
-    DType out_sum = 0;
+    DType out_sum                   = 0;
     for (int h = hstart; h < hend; ++h) {
       for (int w = wstart; w < wend; ++w) {
-        int bottom_index = h*width + w;
+        int bottom_index = h * width + w;
         out_sum += offset_bottom_data[bottom_index];
       }
     }
 
-    DType bin_area = (hend - hstart)*(wend - wstart);
-    top_data[index] = is_empty? (DType)0. : out_sum/bin_area;
+    DType bin_area  = (hend - hstart) * (wend - wstart);
+    top_data[index] = is_empty ? (DType)0. : out_sum / bin_area;
   }
 }
 
-template<typename DType>
-inline void PSROIPoolForward(const Tensor<cpu, 4, DType> &out,
-                           const Tensor<cpu, 4, DType> &data,
-                           const Tensor<cpu, 2, DType> &bbox,
-                           const float spatial_scale,
-                           const int output_dim_,
-                           const int group_size_) {
-  const DType *bottom_data = data.dptr_;
-  const DType *bottom_rois = bbox.dptr_;
-  DType *top_data = out.dptr_;
-  const int count = out.shape_.Size();
-  const int channels = data.size(1);
-  const int height = data.size(2);
-  const int width = data.size(3);
-  const int pooled_height = out.size(2);
-  const int pooled_width = out.size(3);
-  PSROIPoolForwardCPU <DType> (
-      count, bottom_data, spatial_scale, channels, height, width,
-      pooled_height, pooled_width, bottom_rois, output_dim_, group_size_, top_data);
+template <typename DType>
+inline void PSROIPoolForward(const Tensor<cpu, 4, DType>& out,
+                             const Tensor<cpu, 4, DType>& data,
+                             const Tensor<cpu, 2, DType>& bbox,
+                             const float spatial_scale,
+                             const int output_dim_,
+                             const int group_size_) {
+  const DType* bottom_data = data.dptr_;
+  const DType* bottom_rois = bbox.dptr_;
+  DType* top_data          = out.dptr_;
+  const int count          = out.shape_.Size();
+  const int channels       = data.size(1);
+  const int height         = data.size(2);
+  const int width          = data.size(3);
+  const int pooled_height  = out.size(2);
+  const int pooled_width   = out.size(3);
+  PSROIPoolForwardCPU<DType>(count,
+                             bottom_data,
+                             spatial_scale,
+                             channels,
+                             height,
+                             width,
+                             pooled_height,
+                             pooled_width,
+                             bottom_rois,
+                             output_dim_,
+                             group_size_,
+                             top_data);
 
   return;
 }
 
 template <typename DType>
- inline void PSROIPoolBackwardAccCPU(
-  const int count,
-  const DType* top_diff,
-  const int num_rois,
-  const DType spatial_scale,
-  const int channels,
-  const int height, const int width,
-  const int pooled_height, const int pooled_width,
-  const int group_size,
-  const int output_dim,
-  DType* bottom_diff,
-  const DType* bottom_rois) {
+inline void PSROIPoolBackwardAccCPU(const int count,
+                                    const DType* top_diff,
+                                    const int num_rois,
+                                    const DType spatial_scale,
+                                    const int channels,
+                                    const int height,
+                                    const int width,
+                                    const int pooled_height,
+                                    const int pooled_width,
+                                    const int group_size,
+                                    const int output_dim,
+                                    DType* bottom_diff,
+                                    const DType* bottom_rois) {
   for (int index = 0; index < count; index++) {
     // The output is in order (n, ctop, ph, pw)
-    int pw = index % pooled_width;
-    int ph = (index / pooled_width) % pooled_height;
+    int pw   = index % pooled_width;
+    int ph   = (index / pooled_width) % pooled_height;
     int ctop = (index / pooled_width / pooled_height) % output_dim;
-    int n = index / pooled_width / pooled_height / output_dim;
+    int n    = index / pooled_width / pooled_height / output_dim;
 
     // [start, end) interval for spatial sampling
     const DType* offset_bottom_rois = bottom_rois + n * 5;
-    int roi_batch_ind = offset_bottom_rois[0];
+    int roi_batch_ind               = offset_bottom_rois[0];
     DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale;
     DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale;
-    DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
-    DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
 
     // Force too small ROIs to be 1x1
-    DType roi_width = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
+    DType roi_width  = max(roi_end_w - roi_start_w, static_cast<DType>(0.1));  // avoid 0
     DType roi_height = max(roi_end_h - roi_start_h, static_cast<DType>(0.1));
 
     // Compute w and h at bottom
     DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
     DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
 
-    int hstart = floor(static_cast<DType>(ph)* bin_size_h
-      + roi_start_h);
-    int wstart = floor(static_cast<DType>(pw)* bin_size_w
-      + roi_start_w);
-    int hend = ceil(static_cast<DType>(ph + 1) * bin_size_h
-      + roi_start_h);
-    int wend = ceil(static_cast<DType>(pw + 1) * bin_size_w
-      + roi_start_w);
+    int hstart = floor(static_cast<DType>(ph) * bin_size_h + roi_start_h);
+    int wstart = floor(static_cast<DType>(pw) * bin_size_w + roi_start_w);
+    int hend   = ceil(static_cast<DType>(ph + 1) * bin_size_h + roi_start_h);
+    int wend   = ceil(static_cast<DType>(pw + 1) * bin_size_w + roi_start_w);
     // Add roi offsets and clip to input boundaries
-    hstart = min(max(hstart, 0), height);
-    hend = min(max(hend, 0), height);
-    wstart = min(max(wstart, 0), width);
-    wend = min(max(wend, 0), width);
+    hstart        = min(max(hstart, 0), height);
+    hend          = min(max(hend, 0), height);
+    wstart        = min(max(wstart, 0), width);
+    wend          = min(max(wend, 0), width);
     bool is_empty = (hend <= hstart) || (wend <= wstart);
     // Compute c at bottom
-    int gw = floor(static_cast<DType>(pw)* group_size / pooled_width);
-    int gh = floor(static_cast<DType>(ph)* group_size / pooled_height);
-    gw = min(max(gw, 0), group_size - 1);
-    gh = min(max(gh, 0), group_size - 1);
-    int c = (ctop*group_size + gh)*group_size + gw;
+    int gw                    = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    int gh                    = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw                        = min(max(gw, 0), group_size - 1);
+    gh                        = min(max(gh, 0), group_size - 1);
+    int c                     = (ctop * group_size + gh) * group_size + gw;
     DType* offset_bottom_diff = bottom_diff + (roi_batch_ind * channels + c) * height * width;
-    DType bin_area = (hend - hstart)*(wend - wstart);
-    DType diff_val = is_empty ? (DType)0. : top_diff[index] / bin_area;
+    DType bin_area            = (hend - hstart) * (wend - wstart);
+    DType diff_val            = is_empty ? (DType)0. : top_diff[index] / bin_area;
     for (int h = hstart; h < hend; ++h) {
       for (int w = wstart; w < wend; ++w) {
-        int bottom_index = h*width + w;
+        int bottom_index                     = h * width + w;
         *(offset_bottom_diff + bottom_index) = *(offset_bottom_diff + bottom_index) + diff_val;
       }
     }
   }
 }
 
-
-template<typename DType>
-inline void PSROIPoolBackwardAcc(const Tensor<cpu, 4, DType> &in_grad,
-                            const Tensor<cpu, 4, DType> &out_grad,
-                            const Tensor<cpu, 2, DType> &bbox,
-                            const float spatial_scale,
-                            const int output_dim_,
-                            const int group_size_) {
+template <typename DType>
+inline void PSROIPoolBackwardAcc(const Tensor<cpu, 4, DType>& in_grad,
+                                 const Tensor<cpu, 4, DType>& out_grad,
+                                 const Tensor<cpu, 2, DType>& bbox,
+                                 const float spatial_scale,
+                                 const int output_dim_,
+                                 const int group_size_) {
   // LOG(INFO) << "PSROIPoolBackward";
-  const DType *top_diff = out_grad.dptr_;
-  const DType *bottom_rois = bbox.dptr_;
-  DType *bottom_diff = in_grad.dptr_;
-  const int count = out_grad.shape_.Size();
-  const int num_rois = bbox.size(0);
-  const int channels = in_grad.size(1);
-  const int height = in_grad.size(2);
-  const int width = in_grad.size(3);
-  const int pooled_height = out_grad.size(2);
-  const int pooled_width = out_grad.size(3);
-  PSROIPoolBackwardAccCPU<DType> (
-      count, top_diff, num_rois, spatial_scale, channels, height, width,
-      pooled_height, pooled_width, group_size_, output_dim_, bottom_diff, bottom_rois);
+  const DType* top_diff    = out_grad.dptr_;
+  const DType* bottom_rois = bbox.dptr_;
+  DType* bottom_diff       = in_grad.dptr_;
+  const int count          = out_grad.shape_.Size();
+  const int num_rois       = bbox.size(0);
+  const int channels       = in_grad.size(1);
+  const int height         = in_grad.size(2);
+  const int width          = in_grad.size(3);
+  const int pooled_height  = out_grad.size(2);
+  const int pooled_width   = out_grad.size(3);
+  PSROIPoolBackwardAccCPU<DType>(count,
+                                 top_diff,
+                                 num_rois,
+                                 spatial_scale,
+                                 channels,
+                                 height,
+                                 width,
+                                 pooled_height,
+                                 pooled_width,
+                                 group_size_,
+                                 output_dim_,
+                                 bottom_diff,
+                                 bottom_rois);
 
   return;
 }
@@ -232,17 +244,16 @@ inline void PSROIPoolBackwardAcc(const Tensor<cpu, 4, DType> &in_grad,
 namespace mxnet {
 namespace op {
 
-template<>
-Operator *CreateOp<cpu>(PSROIPoolingParam param, int dtype) {
+template <>
+Operator* CreateOp<cpu>(PSROIPoolingParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new PSROIPoolingOp<cpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new PSROIPoolingOp<cpu, DType>(param); });
   return op;
 }
 
-Operator *PSROIPoolingProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                           std::vector<int> *in_type) const {
+Operator* PSROIPoolingProp::CreateOperatorEx(Context ctx,
+                                             mxnet::ShapeVector* in_shape,
+                                             std::vector<int>* in_type) const {
   mxnet::ShapeVector out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferType(in_type, &out_type, &aux_type));
@@ -253,15 +264,21 @@ Operator *PSROIPoolingProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in
 DMLC_REGISTER_PARAMETER(PSROIPoolingParam);
 
 MXNET_REGISTER_OP_PROPERTY(_contrib_PSROIPooling, PSROIPoolingProp)
-.describe("Performs region-of-interest pooling on inputs. Resize bounding box coordinates by "
-"spatial_scale and crop input feature maps accordingly. The cropped feature maps are pooled "
-"by max pooling to a fixed size output indicated by pooled_size. batch_size will change to "
-"the number of region bounding boxes after PSROIPooling")
-.add_argument("data", "Symbol", "Input data to the pooling operator, a 4D Feature maps")
-.add_argument("rois", "Symbol", "Bounding box coordinates, a 2D array of "
-"[[batch_index, x1, y1, x2, y2]]. (x1, y1) and (x2, y2) are top left and down right corners "
-"of designated region of interest. batch_index indicates the index of corresponding image "
-"in the input data")
-.add_arguments(PSROIPoolingParam::__FIELDS__());
+    .describe(
+        "Performs region-of-interest pooling on inputs. Resize bounding box coordinates by "
+        "spatial_scale and crop input feature maps accordingly. The cropped feature maps are "
+        "pooled "
+        "by max pooling to a fixed size output indicated by pooled_size. batch_size will change to "
+        "the number of region bounding boxes after PSROIPooling")
+    .add_argument("data", "Symbol", "Input data to the pooling operator, a 4D Feature maps")
+    .add_argument(
+        "rois",
+        "Symbol",
+        "Bounding box coordinates, a 2D array of "
+        "[[batch_index, x1, y1, x2, y2]]. (x1, y1) and (x2, y2) are top left and down right "
+        "corners "
+        "of designated region of interest. batch_index indicates the index of corresponding image "
+        "in the input data")
+    .add_arguments(PSROIPoolingParam::__FIELDS__());
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/psroi_pooling.cu b/src/operator/contrib/psroi_pooling.cu
index 62ecd4ce8baa..b36fe758d31c 100644
--- a/src/operator/contrib/psroi_pooling.cu
+++ b/src/operator/contrib/psroi_pooling.cu
@@ -24,7 +24,7 @@
  * \file psroi_pooling.cu
  * \brief psroi pooling operator
  * \author Yi Li, Tairui Chen, Guodong Zhang, Haozhi Qi, Jifeng Dai
-*/
+ */
 #include "./psroi_pooling-inl.h"
 #include <mshadow/tensor.h>
 #include <mshadow/cuda/reduce.cuh>
@@ -33,10 +33,10 @@
 #include "../../common/cuda/utils.h"
 #include "../mxnet_op.h"
 
-#define PSROIPOOLING_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define PSROIPOOLING_CUDA_CHECK(condition)                            \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
   } while (0)
 
@@ -44,230 +44,240 @@ namespace mshadow {
 namespace cuda {
 
 template <typename DType>
-__global__ void PSROIPoolForwardKernel(
-  const int count,
-  const DType* bottom_data,
-  const DType spatial_scale,
-  const int channels,
-  const int height, const int width,
-  const int pooled_height, const int pooled_width,
-  const DType* bottom_rois,
-  const int output_dim,
-  const int group_size,
-  DType* top_data) {
+__global__ void PSROIPoolForwardKernel(const int count,
+                                       const DType* bottom_data,
+                                       const DType spatial_scale,
+                                       const int channels,
+                                       const int height,
+                                       const int width,
+                                       const int pooled_height,
+                                       const int pooled_width,
+                                       const DType* bottom_rois,
+                                       const int output_dim,
+                                       const int group_size,
+                                       DType* top_data) {
   CUDA_KERNEL_LOOP(index, count) {
     // The output is in order (n, ctop, ph, pw)
-    int pw = index % pooled_width;
-    int ph = (index / pooled_width) % pooled_height;
+    int pw   = index % pooled_width;
+    int ph   = (index / pooled_width) % pooled_height;
     int ctop = (index / pooled_width / pooled_height) % output_dim;
-    int n = index / pooled_width / pooled_height / output_dim;
+    int n    = index / pooled_width / pooled_height / output_dim;
 
     // [start, end) interval for spatial sampling
     const DType* offset_bottom_rois = bottom_rois + n * 5;
-    int roi_batch_ind = offset_bottom_rois[0];
+    int roi_batch_ind               = offset_bottom_rois[0];
     DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale;
     DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale;
-    DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
-    DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
 
     // Force too small ROIs to be 1x1
-    DType roi_width = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
+    DType roi_width  = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
     DType roi_height = max(roi_end_h - roi_start_h, 0.1);
 
     // Compute w and h at bottom
     DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
     DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
 
-    int hstart = floor(static_cast<DType>(ph) * bin_size_h
-                        + roi_start_h);
-    int wstart = floor(static_cast<DType>(pw)* bin_size_w
-                        + roi_start_w);
-    int hend = ceil(static_cast<DType>(ph + 1) * bin_size_h
-                      + roi_start_h);
-    int wend = ceil(static_cast<DType>(pw + 1) * bin_size_w
-                      + roi_start_w);
+    int hstart = floor(static_cast<DType>(ph) * bin_size_h + roi_start_h);
+    int wstart = floor(static_cast<DType>(pw) * bin_size_w + roi_start_w);
+    int hend   = ceil(static_cast<DType>(ph + 1) * bin_size_h + roi_start_h);
+    int wend   = ceil(static_cast<DType>(pw + 1) * bin_size_w + roi_start_w);
     // Add roi offsets and clip to input boundaries
-    hstart = min(max(hstart, 0), height);
-    hend = min(max(hend, 0), height);
-    wstart = min(max(wstart, 0), width);
-    wend = min(max(wend, 0), width);
+    hstart        = min(max(hstart, 0), height);
+    hend          = min(max(hend, 0), height);
+    wstart        = min(max(wstart, 0), width);
+    wend          = min(max(wend, 0), width);
     bool is_empty = (hend <= hstart) || (wend <= wstart);
 
-    int gw = floor(static_cast<DType>(pw)* group_size / pooled_width);
-    int gh = floor(static_cast<DType>(ph)* group_size / pooled_height);
-    gw = min(max(gw, 0), group_size - 1);
-    gh = min(max(gh, 0), group_size - 1);
-    int c = (ctop*group_size + gh)*group_size + gw;
+    int gw = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    int gh = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw     = min(max(gw, 0), group_size - 1);
+    gh     = min(max(gh, 0), group_size - 1);
+    int c  = (ctop * group_size + gh) * group_size + gw;
 
     const DType* offset_bottom_data = bottom_data + (roi_batch_ind * channels + c) * height * width;
-    DType out_sum = 0;
+    DType out_sum                   = 0;
     for (int h = hstart; h < hend; ++h) {
       for (int w = wstart; w < wend; ++w) {
-        int bottom_index = h*width + w;
+        int bottom_index = h * width + w;
         out_sum += offset_bottom_data[bottom_index];
       }
     }
 
-    DType bin_area = (hend - hstart)*(wend - wstart);
-    top_data[index] = is_empty? (DType)0. : out_sum/bin_area;
+    DType bin_area  = (hend - hstart) * (wend - wstart);
+    top_data[index] = is_empty ? (DType)0. : out_sum / bin_area;
   }
 }
 
-template<typename DType>
-inline void PSROIPoolForward(const Tensor<gpu, 4, DType> &out,
-                           const Tensor<gpu, 4, DType> &data,
-                           const Tensor<gpu, 2, DType> &bbox,
-                           const float spatial_scale,
-                           const int output_dim_,
-                           const int group_size_) {
-  const DType *bottom_data = data.dptr_;
-  const DType *bottom_rois = bbox.dptr_;
-  DType *top_data = out.dptr_;
-  const int count = out.shape_.Size();
-  const int channels = data.size(1);
-  const int height = data.size(2);
-  const int width = data.size(3);
-  const int pooled_height = out.size(2);
-  const int pooled_width = out.size(3);
-  cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
-  PSROIPoolForwardKernel<DType> << <mxnet::op::mxnet_op::cuda_get_num_blocks(count),
-    kBaseThreadNum, 0, stream >> >(
-      count, bottom_data, spatial_scale, channels, height, width,
-      pooled_height, pooled_width, bottom_rois, output_dim_, group_size_, top_data);
+template <typename DType>
+inline void PSROIPoolForward(const Tensor<gpu, 4, DType>& out,
+                             const Tensor<gpu, 4, DType>& data,
+                             const Tensor<gpu, 2, DType>& bbox,
+                             const float spatial_scale,
+                             const int output_dim_,
+                             const int group_size_) {
+  const DType* bottom_data = data.dptr_;
+  const DType* bottom_rois = bbox.dptr_;
+  DType* top_data          = out.dptr_;
+  const int count          = out.shape_.Size();
+  const int channels       = data.size(1);
+  const int height         = data.size(2);
+  const int width          = data.size(3);
+  const int pooled_height  = out.size(2);
+  const int pooled_width   = out.size(3);
+  cudaStream_t stream      = Stream<gpu>::GetStream(out.stream_);
+  PSROIPoolForwardKernel<DType>
+      <<<mxnet::op::mxnet_op::cuda_get_num_blocks(count), kBaseThreadNum, 0, stream>>>(
+          count,
+          bottom_data,
+          spatial_scale,
+          channels,
+          height,
+          width,
+          pooled_height,
+          pooled_width,
+          bottom_rois,
+          output_dim_,
+          group_size_,
+          top_data);
   PSROIPOOLING_CUDA_CHECK(cudaGetLastError());
 }
 
-
 template <typename DType>
-__global__ void PSROIPoolBackwardAccKernel(
-  const int count,
-  const DType* top_diff,
-  const int num_rois,
-  const DType spatial_scale,
-  const int channels,
-  const int height, const int width,
-  const int pooled_height, const int pooled_width,
-  const int group_size,
-  const int output_dim,
-  DType* bottom_diff,
-  const DType* bottom_rois) {
+__global__ void PSROIPoolBackwardAccKernel(const int count,
+                                           const DType* top_diff,
+                                           const int num_rois,
+                                           const DType spatial_scale,
+                                           const int channels,
+                                           const int height,
+                                           const int width,
+                                           const int pooled_height,
+                                           const int pooled_width,
+                                           const int group_size,
+                                           const int output_dim,
+                                           DType* bottom_diff,
+                                           const DType* bottom_rois) {
   CUDA_KERNEL_LOOP(index, count) {
     // The output is in order (n, ctop, ph, pw)
-    int pw = index % pooled_width;
-    int ph = (index / pooled_width) % pooled_height;
+    int pw   = index % pooled_width;
+    int ph   = (index / pooled_width) % pooled_height;
     int ctop = (index / pooled_width / pooled_height) % output_dim;
-    int n = index / pooled_width / pooled_height / output_dim;
+    int n    = index / pooled_width / pooled_height / output_dim;
 
     // [start, end) interval for spatial sampling
     const DType* offset_bottom_rois = bottom_rois + n * 5;
-    int roi_batch_ind = offset_bottom_rois[0];
+    int roi_batch_ind               = offset_bottom_rois[0];
     DType roi_start_w = static_cast<DType>(round(offset_bottom_rois[1])) * spatial_scale;
     DType roi_start_h = static_cast<DType>(round(offset_bottom_rois[2])) * spatial_scale;
-    DType roi_end_w = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
-    DType roi_end_h = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
+    DType roi_end_w   = static_cast<DType>(round(offset_bottom_rois[3]) + 1.) * spatial_scale;
+    DType roi_end_h   = static_cast<DType>(round(offset_bottom_rois[4]) + 1.) * spatial_scale;
 
     // Force too small ROIs to be 1x1
-    DType roi_width = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
+    DType roi_width  = max(roi_end_w - roi_start_w, 0.1);  // avoid 0
     DType roi_height = max(roi_end_h - roi_start_h, 0.1);
 
     // Compute w and h at bottom
     DType bin_size_h = roi_height / static_cast<DType>(pooled_height);
     DType bin_size_w = roi_width / static_cast<DType>(pooled_width);
 
-    int hstart = floor(static_cast<DType>(ph)* bin_size_h
-      + roi_start_h);
-    int wstart = floor(static_cast<DType>(pw)* bin_size_w
-      + roi_start_w);
-    int hend = ceil(static_cast<DType>(ph + 1) * bin_size_h
-      + roi_start_h);
-    int wend = ceil(static_cast<DType>(pw + 1) * bin_size_w
-      + roi_start_w);
+    int hstart = floor(static_cast<DType>(ph) * bin_size_h + roi_start_h);
+    int wstart = floor(static_cast<DType>(pw) * bin_size_w + roi_start_w);
+    int hend   = ceil(static_cast<DType>(ph + 1) * bin_size_h + roi_start_h);
+    int wend   = ceil(static_cast<DType>(pw + 1) * bin_size_w + roi_start_w);
     // Add roi offsets and clip to input boundaries
-    hstart = min(max(hstart, 0), height);
-    hend = min(max(hend, 0), height);
-    wstart = min(max(wstart, 0), width);
-    wend = min(max(wend, 0), width);
+    hstart        = min(max(hstart, 0), height);
+    hend          = min(max(hend, 0), height);
+    wstart        = min(max(wstart, 0), width);
+    wend          = min(max(wend, 0), width);
     bool is_empty = (hend <= hstart) || (wend <= wstart);
 
     // Compute c at bottom
-    int gw = floor(static_cast<DType>(pw)* group_size / pooled_width);
-    int gh = floor(static_cast<DType>(ph)* group_size / pooled_height);
-    gw = min(max(gw, 0), group_size - 1);
-    gh = min(max(gh, 0), group_size - 1);
-    int c = (ctop*group_size + gh)*group_size + gw;
+    int gw                    = floor(static_cast<DType>(pw) * group_size / pooled_width);
+    int gh                    = floor(static_cast<DType>(ph) * group_size / pooled_height);
+    gw                        = min(max(gw, 0), group_size - 1);
+    gh                        = min(max(gh, 0), group_size - 1);
+    int c                     = (ctop * group_size + gh) * group_size + gw;
     DType* offset_bottom_diff = bottom_diff + (roi_batch_ind * channels + c) * height * width;
-    DType bin_area = (hend - hstart)*(wend - wstart);
-    DType diff_val = is_empty ? (DType)0. : top_diff[index] / bin_area;
+    DType bin_area            = (hend - hstart) * (wend - wstart);
+    DType diff_val            = is_empty ? (DType)0. : top_diff[index] / bin_area;
     for (int h = hstart; h < hend; ++h) {
       for (int w = wstart; w < wend; ++w) {
-        int bottom_index = h*width + w;
+        int bottom_index = h * width + w;
         atomicAdd(offset_bottom_diff + bottom_index, diff_val);
       }
     }
   }
 }
 
-
-template<typename DType>
-inline void PSROIPoolBackwardAcc(const Tensor<gpu, 4, DType> &in_grad,
-                            const Tensor<gpu, 4, DType> &out_grad,
-                            const Tensor<gpu, 2, DType> &bbox,
-                            const float spatial_scale,
-                            const int output_dim_,
-                            const int group_size_) {
+template <typename DType>
+inline void PSROIPoolBackwardAcc(const Tensor<gpu, 4, DType>& in_grad,
+                                 const Tensor<gpu, 4, DType>& out_grad,
+                                 const Tensor<gpu, 2, DType>& bbox,
+                                 const float spatial_scale,
+                                 const int output_dim_,
+                                 const int group_size_) {
   // LOG(INFO) << "PSROIPoolBackward";
-  const DType *top_diff = out_grad.dptr_;
-  const DType *bottom_rois = bbox.dptr_;
-  DType *bottom_diff = in_grad.dptr_;
-  const int count = out_grad.shape_.Size();
-  const int num_rois = bbox.size(0);
-  const int channels = in_grad.size(1);
-  const int height = in_grad.size(2);
-  const int width = in_grad.size(3);
-  const int pooled_height = out_grad.size(2);
-  const int pooled_width = out_grad.size(3);
-  cudaStream_t stream = Stream<gpu>::GetStream(in_grad.stream_);
-  PSROIPoolBackwardAccKernel<DType> << <mxnet::op::mxnet_op::cuda_get_num_blocks(count),
-    kBaseThreadNum, 0, stream >> >(
-      count, top_diff, num_rois, spatial_scale, channels, height, width,
-      pooled_height, pooled_width, group_size_, output_dim_, bottom_diff, bottom_rois);
+  const DType* top_diff    = out_grad.dptr_;
+  const DType* bottom_rois = bbox.dptr_;
+  DType* bottom_diff       = in_grad.dptr_;
+  const int count          = out_grad.shape_.Size();
+  const int num_rois       = bbox.size(0);
+  const int channels       = in_grad.size(1);
+  const int height         = in_grad.size(2);
+  const int width          = in_grad.size(3);
+  const int pooled_height  = out_grad.size(2);
+  const int pooled_width   = out_grad.size(3);
+  cudaStream_t stream      = Stream<gpu>::GetStream(in_grad.stream_);
+  PSROIPoolBackwardAccKernel<DType>
+      <<<mxnet::op::mxnet_op::cuda_get_num_blocks(count), kBaseThreadNum, 0, stream>>>(
+          count,
+          top_diff,
+          num_rois,
+          spatial_scale,
+          channels,
+          height,
+          width,
+          pooled_height,
+          pooled_width,
+          group_size_,
+          output_dim_,
+          bottom_diff,
+          bottom_rois);
   PSROIPOOLING_CUDA_CHECK(cudaGetLastError());
 }
 
 }  // namespace cuda
 
-template<typename DType>
-inline void PSROIPoolForward(const Tensor<gpu, 4, DType> &out,
-                           const Tensor<gpu, 4, DType> &data,
-                           const Tensor<gpu, 2, DType> &bbox,
-                           const float spatial_scale,
-                           const int output_dim_,
-                           const int group_size_) {
+template <typename DType>
+inline void PSROIPoolForward(const Tensor<gpu, 4, DType>& out,
+                             const Tensor<gpu, 4, DType>& data,
+                             const Tensor<gpu, 2, DType>& bbox,
+                             const float spatial_scale,
+                             const int output_dim_,
+                             const int group_size_) {
   cuda::PSROIPoolForward(out, data, bbox, spatial_scale, output_dim_, group_size_);
 }
 
-template<typename DType>
-inline void PSROIPoolBackwardAcc(const Tensor<gpu, 4, DType> &in_grad,
-                            const Tensor<gpu, 4, DType> &out_grad,
-                            const Tensor<gpu, 2, DType> &bbox,
-                            const float spatial_scale,
-                            const int output_dim_,
-                            const int group_size_) {
+template <typename DType>
+inline void PSROIPoolBackwardAcc(const Tensor<gpu, 4, DType>& in_grad,
+                                 const Tensor<gpu, 4, DType>& out_grad,
+                                 const Tensor<gpu, 2, DType>& bbox,
+                                 const float spatial_scale,
+                                 const int output_dim_,
+                                 const int group_size_) {
   cuda::PSROIPoolBackwardAcc(in_grad, out_grad, bbox, spatial_scale, output_dim_, group_size_);
 }
 
 }  // namespace mshadow
 
-
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 Operator* CreateOp<gpu>(PSROIPoolingParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new PSROIPoolingOp<gpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new PSROIPoolingOp<gpu, DType>(param); });
   return op;
 }
 
diff --git a/src/operator/contrib/quadratic_op-inl.h b/src/operator/contrib/quadratic_op-inl.h
index a7aca63de17a..f5c8a8dbe7d5 100644
--- a/src/operator/contrib/quadratic_op-inl.h
+++ b/src/operator/contrib/quadratic_op-inl.h
@@ -40,15 +40,11 @@ namespace op {
 struct QuadraticParam : public dmlc::Parameter<QuadraticParam> {
   float a, b, c;
   DMLC_DECLARE_PARAMETER(QuadraticParam) {
-    DMLC_DECLARE_FIELD(a)
-      .set_default(0.0)
-      .describe("Coefficient of the quadratic term in the quadratic function.");
-    DMLC_DECLARE_FIELD(b)
-      .set_default(0.0)
-      .describe("Coefficient of the linear term in the quadratic function.");
-    DMLC_DECLARE_FIELD(c)
-      .set_default(0.0)
-      .describe("Constant term in the quadratic function.");
+    DMLC_DECLARE_FIELD(a).set_default(0.0).describe(
+        "Coefficient of the quadratic term in the quadratic function.");
+    DMLC_DECLARE_FIELD(b).set_default(0.0).describe(
+        "Coefficient of the linear term in the quadratic function.");
+    DMLC_DECLARE_FIELD(c).set_default(0.0).describe("Constant term in the quadratic function.");
   }
 };
 
@@ -82,18 +78,18 @@ inline bool QuadraticOpStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const QuadraticParam& param = nnvm::get<QuadraticParam>(attrs.parsed);
-  const int in_stype = in_attrs->at(0);
-  int& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const int in_stype          = in_attrs->at(0);
+  int& out_stype              = out_attrs->at(0);
+  bool dispatched             = false;
   if (!dispatched && in_stype == kDefaultStorage) {
     // dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && in_stype == kCSRStorage && param.c == 0.0) {
     // csr -> csr
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -101,25 +97,33 @@ inline bool QuadraticOpStorageType(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-template<int req>
+template <int req>
 struct quadratic_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, const DType* in_data,
-                                  const float a, const float b, const float c) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const float a,
+                                  const float b,
+                                  const float c) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i] * (a * in_data[i] + b) + c);
   }
 };
 
-template<int req>
+template <int req>
 struct quadratic_backward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* in_grad, const DType* out_grad,
-                                  const DType* in_data, const float a, const float b) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* in_grad,
+                                  const DType* out_grad,
+                                  const DType* in_data,
+                                  const float a,
+                                  const float b) {
     KERNEL_ASSIGN(in_grad[i], req, out_grad[i] * (2 * a * in_data[i] + b));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void QuadraticOpForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -128,21 +132,25 @@ void QuadraticOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
+  const TBlob& in_data        = inputs[0];
+  const TBlob& out_data       = outputs[0];
   const QuadraticParam& param = nnvm::get<QuadraticParam>(attrs.parsed);
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<quadratic_forward<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-          param.a, param.b, param.c);
+      Kernel<quadratic_forward<req_type>, xpu>::Launch(s,
+                                                       out_data.Size(),
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       param.a,
+                                                       param.b,
+                                                       param.c);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void QuadraticOpForwardCsrImpl(const QuadraticParam& param,
                                const OpContext& ctx,
                                const NDArray& input,
@@ -151,34 +159,41 @@ void QuadraticOpForwardCsrImpl(const QuadraticParam& param,
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace csr;
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteTo) << "QuadraticOp with CSR only supports kWriteTo";
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   if (!input.storage_initialized()) {
     FillZerosCsrImpl(s, output);
     return;
   }
-  const nnvm::dim_t nnz = input.storage_shape()[0];
+  const nnvm::dim_t nnz      = input.storage_shape()[0];
   const nnvm::dim_t num_rows = output.shape()[0];
   output.CheckAndAlloc({Shape1(num_rows + 1), Shape1(nnz)});
   CHECK_EQ(output.aux_type(kIdx), output.aux_type(kIndPtr))
-    << "The dtypes of indices and indptr don't match";
+      << "The dtypes of indices and indptr don't match";
   MSHADOW_TYPE_SWITCH(output.dtype(), DType, {
     MSHADOW_IDX_TYPE_SWITCH(output.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        Kernel<quadratic_forward<req_type>, xpu>::Launch(
-            s, nnz, output.data().dptr<DType>(), input.data().dptr<DType>(),
-            param.a, param.b, param.c);
+        Kernel<quadratic_forward<req_type>, xpu>::Launch(s,
+                                                         nnz,
+                                                         output.data().dptr<DType>(),
+                                                         input.data().dptr<DType>(),
+                                                         param.a,
+                                                         param.b,
+                                                         param.c);
         Copy(output.aux_data(kIdx).FlatTo1D<xpu, IType>(s),
-             input.aux_data(kIdx).FlatTo1D<xpu, IType>(s), s);
+             input.aux_data(kIdx).FlatTo1D<xpu, IType>(s),
+             s);
         Copy(output.aux_data(kIndPtr).FlatTo1D<xpu, IType>(s),
-             input.aux_data(kIndPtr).FlatTo1D<xpu, IType>(s), s);
+             input.aux_data(kIndPtr).FlatTo1D<xpu, IType>(s),
+             s);
       });
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void QuadraticOpForwardEx(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
@@ -188,8 +203,8 @@ void QuadraticOpForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   const QuadraticParam& param = nnvm::get<QuadraticParam>(attrs.parsed);
-  const auto in_stype = inputs[0].storage_type();
-  const auto out_stype = outputs[0].storage_type();
+  const auto in_stype         = inputs[0].storage_type();
+  const auto out_stype        = outputs[0].storage_type();
   if (in_stype == kCSRStorage && out_stype == kCSRStorage && param.c == 0.0) {
     QuadraticOpForwardCsrImpl<xpu>(param, ctx, inputs[0], req[0], outputs[0]);
   } else {
@@ -197,7 +212,7 @@ void QuadraticOpForwardEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void QuadraticOpBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -206,17 +221,21 @@ void QuadraticOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& out_grad = inputs[0];
-  const TBlob& in_data = inputs[1];
-  const TBlob& in_grad = outputs[0];
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
+  const TBlob& out_grad       = inputs[0];
+  const TBlob& in_data        = inputs[1];
+  const TBlob& in_grad        = outputs[0];
   const QuadraticParam& param = nnvm::get<QuadraticParam>(attrs.parsed);
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(out_grad.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<quadratic_backward<req_type>, xpu>::Launch(
-          s, in_grad.Size(), in_grad.dptr<DType>(), out_grad.dptr<DType>(),
-          in_data.dptr<DType>(), param.a, param.b);
+      Kernel<quadratic_backward<req_type>, xpu>::Launch(s,
+                                                        in_grad.Size(),
+                                                        in_grad.dptr<DType>(),
+                                                        out_grad.dptr<DType>(),
+                                                        in_data.dptr<DType>(),
+                                                        param.a,
+                                                        param.b);
     });
   });
 }
diff --git a/src/operator/contrib/quadratic_op.cc b/src/operator/contrib/quadratic_op.cc
index a023c27a4a8e..8dcd658e0d10 100644
--- a/src/operator/contrib/quadratic_op.cc
+++ b/src/operator/contrib/quadratic_op.cc
@@ -29,7 +29,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(QuadraticParam);
 
 NNVM_REGISTER_OP(_contrib_quadratic)
-.describe(R"code(This operators implements the quadratic function.
+    .describe(R"code(This operators implements the quadratic function.
 
 .. math::
     f(x) = ax^2+bx+c
@@ -48,32 +48,32 @@ The storage type of ``quadratic`` output depends on storage types of inputs
   - quadratic(default, a, b, c) = default
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<QuadraticParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuadraticOpShape)
-.set_attr<nnvm::FInferType>("FInferType", QuadraticOpType)
-.set_attr<FInferStorageType>("FInferStorageType", QuadraticOpStorageType)
-.set_attr<FCompute>("FCompute<cpu>", QuadraticOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_contrib_backward_quadratic"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(QuadraticParam::__FIELDS__());
+    .set_attr_parser(ParamParser<QuadraticParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuadraticOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuadraticOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuadraticOpStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", QuadraticOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_contrib_backward_quadratic"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(QuadraticParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_backward_quadratic)
-.set_attr_parser(ParamParser<QuadraticParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", QuadraticOpBackward<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", QuadraticOpForwardEx<cpu>);
+    .set_attr_parser(ParamParser<QuadraticParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", QuadraticOpBackward<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", QuadraticOpForwardEx<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/quadratic_op.cu b/src/operator/contrib/quadratic_op.cu
index 72d15ab37495..77877d995ec6 100644
--- a/src/operator/contrib/quadratic_op.cu
+++ b/src/operator/contrib/quadratic_op.cu
@@ -27,11 +27,11 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_quadratic)
-.set_attr<FComputeEx>("FComputeEx<gpu>", QuadraticOpForwardEx<gpu>)
-.set_attr<FCompute>("FCompute<gpu>", QuadraticOpForward<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", QuadraticOpForwardEx<gpu>)
+    .set_attr<FCompute>("FCompute<gpu>", QuadraticOpForward<gpu>);
 
 NNVM_REGISTER_OP(_contrib_backward_quadratic)
-.set_attr<FCompute>("FCompute<gpu>", QuadraticOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", QuadraticOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/reset_arrays-inl.h b/src/operator/contrib/reset_arrays-inl.h
index 3559a21879e4..f55fe07e0209 100644
--- a/src/operator/contrib/reset_arrays-inl.h
+++ b/src/operator/contrib/reset_arrays-inl.h
@@ -36,14 +36,13 @@ namespace op {
 struct ResetArraysParam : public dmlc::Parameter<ResetArraysParam> {
   int num_arrays;
   DMLC_DECLARE_PARAMETER(ResetArraysParam) {
-    DMLC_DECLARE_FIELD(num_arrays)
-    .describe("number of input arrays.");
+    DMLC_DECLARE_FIELD(num_arrays).describe("number of input arrays.");
   }
 };
 
 inline bool ResetArraysShape(const NodeAttrs& attrs,
-                            std::vector<mxnet::TShape>* in_shape,
-                            std::vector<mxnet::TShape>* out_shape) {
+                             std::vector<mxnet::TShape>* in_shape,
+                             std::vector<mxnet::TShape>* out_shape) {
   const auto& param = dmlc::get<ResetArraysParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), param.num_arrays);
   for (auto s : *in_shape) {
@@ -55,8 +54,8 @@ inline bool ResetArraysShape(const NodeAttrs& attrs,
 }
 
 inline bool ResetArraysType(const NodeAttrs& attrs,
-                           std::vector<int>* in_type,
-                           std::vector<int>* out_type) {
+                            std::vector<int>* in_type,
+                            std::vector<int>* out_type) {
   const auto& param = dmlc::get<ResetArraysParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), param.num_arrays);
   for (size_t i = 0; i < in_type->size(); ++i) {
@@ -67,22 +66,23 @@ inline bool ResetArraysType(const NodeAttrs& attrs,
   return true;
 }
 
-template<typename xpu>
-void ResetMemory(void *pntr, size_t len, mshadow::Stream<xpu> *s);
+template <typename xpu>
+void ResetMemory(void* pntr, size_t len, mshadow::Stream<xpu>* s);
 
-template<typename xpu>
+template <typename xpu>
 void ResetArrays(const nnvm::NodeAttrs& attrs,
-                 const OpContext &ctx,
-                 const std::vector<TBlob> &inputs,
-                 const std::vector<OpReqType> &req,
-                 const std::vector<TBlob> &outputs) {
-  auto s = ctx.get_stream<xpu>();
+                 const OpContext& ctx,
+                 const std::vector<TBlob>& inputs,
+                 const std::vector<OpReqType>& req,
+                 const std::vector<TBlob>& outputs) {
+  auto s            = ctx.get_stream<xpu>();
   const auto& param = nnvm::get<ResetArraysParam>(attrs.parsed);
   for (int i = 0; i < param.num_arrays; i++) {  // array index in inputs
     const size_t size = inputs[i].shape_.Size();
-    MSHADOW_REAL_TYPE_SWITCH(inputs[i].type_flag_, DType,
-      ResetMemory(inputs[i].FlatTo2D<xpu, DType>(s).dptr_, size * sizeof(DType), s);
-    )
+    MSHADOW_REAL_TYPE_SWITCH(
+        inputs[i].type_flag_,
+        DType,
+        ResetMemory(inputs[i].FlatTo2D<xpu, DType>(s).dptr_, size * sizeof(DType), s);)
   }
 }
 
diff --git a/src/operator/contrib/reset_arrays.cc b/src/operator/contrib/reset_arrays.cc
index f67e0098cd11..8a49f31bbc15 100644
--- a/src/operator/contrib/reset_arrays.cc
+++ b/src/operator/contrib/reset_arrays.cc
@@ -32,41 +32,42 @@ namespace op {
 DMLC_REGISTER_PARAMETER(ResetArraysParam);
 
 NNVM_REGISTER_OP(reset_arrays)
-.describe(R"code(Set to zero multiple arrays
+    .describe(R"code(Set to zero multiple arrays
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    return static_cast<uint32_t>(dmlc::get<ResetArraysParam>(attrs.parsed).num_arrays);
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    const uint32_t num_args = dmlc::get<ResetArraysParam>(attrs.parsed).num_arrays;
-    std::vector<uint32_t> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(i);
-    }
-    return ret;
-  })
-.set_num_outputs(0)
-.set_attr_parser(ParamParser<ResetArraysParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ResetArraysShape)
-.set_attr<nnvm::FInferType>("FInferType", ResetArraysType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const uint32_t num_args = dmlc::get<ResetArraysParam>(attrs.parsed).num_arrays;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("array_") + std::to_string(i));
-    }
-    return ret;
-  })
-.add_argument("data", "NDArray-or-Symbol[]", "Arrays")
-.add_arguments(ResetArraysParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      return static_cast<uint32_t>(dmlc::get<ResetArraysParam>(attrs.parsed).num_arrays);
+    })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     const uint32_t num_args =
+                                         dmlc::get<ResetArraysParam>(attrs.parsed).num_arrays;
+                                     std::vector<uint32_t> ret;
+                                     for (uint32_t i = 0; i < num_args; ++i) {
+                                       ret.push_back(i);
+                                     }
+                                     return ret;
+                                   })
+    .set_num_outputs(0)
+    .set_attr_parser(ParamParser<ResetArraysParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ResetArraysShape)
+    .set_attr<nnvm::FInferType>("FInferType", ResetArraysType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const uint32_t num_args =
+                                           dmlc::get<ResetArraysParam>(attrs.parsed).num_arrays;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("array_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .add_argument("data", "NDArray-or-Symbol[]", "Arrays")
+    .add_arguments(ResetArraysParam::__FIELDS__());
 
-NNVM_REGISTER_OP(reset_arrays)
-.set_attr<FCompute>("FCompute<cpu>", ResetArrays<cpu>);
+NNVM_REGISTER_OP(reset_arrays).set_attr<FCompute>("FCompute<cpu>", ResetArrays<cpu>);
 
-template<>
-void ResetMemory<cpu>(void *pntr, size_t len, mshadow::Stream<cpu> *s) {
+template <>
+void ResetMemory<cpu>(void* pntr, size_t len, mshadow::Stream<cpu>* s) {
   memset(pntr, 0, len);
 }
 
diff --git a/src/operator/contrib/reset_arrays.cu b/src/operator/contrib/reset_arrays.cu
index f7a9d0034665..986c987ddbf5 100644
--- a/src/operator/contrib/reset_arrays.cu
+++ b/src/operator/contrib/reset_arrays.cu
@@ -28,13 +28,12 @@
 namespace mxnet {
 namespace op {
 
-template<>
-void ResetMemory<gpu>(void *pntr, size_t len, mshadow::Stream<gpu> *s) {
+template <>
+void ResetMemory<gpu>(void* pntr, size_t len, mshadow::Stream<gpu>* s) {
   CUDA_CALL(cudaMemsetAsync(pntr, 0, len, mshadow::Stream<gpu>::GetStream(s)));
 }
 
-NNVM_REGISTER_OP(reset_arrays)
-.set_attr<FCompute>("FCompute<gpu>", ResetArrays<gpu>);
+NNVM_REGISTER_OP(reset_arrays).set_attr<FCompute>("FCompute<gpu>", ResetArrays<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/roi_align-inl.h b/src/operator/contrib/roi_align-inl.h
index 8b3b914435cc..282d911734b3 100644
--- a/src/operator/contrib/roi_align-inl.h
+++ b/src/operator/contrib/roi_align-inl.h
@@ -22,7 +22,7 @@
  * \brief roi align operator and symbol
  * \author Hang Zhang, Shesung
  * modified from Caffe2
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_ROI_ALIGN_INL_H_
 #define MXNET_OPERATOR_CONTRIB_ROI_ALIGN_INL_H_
 
@@ -31,17 +31,15 @@
 #include "../mshadow_op.h"
 #include "../tensor/init_op.h"
 
-
 namespace mxnet {
 namespace op {
 
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace roialign {
-enum ROIAlignOpInputs {kData, kBox};
-enum ROIAlignOpOutputs {kOut};
-}  // roialign
-
+enum ROIAlignOpInputs { kData, kBox };
+enum ROIAlignOpOutputs { kOut };
+}  // namespace roialign
 
 struct ROIAlignParam : public dmlc::Parameter<ROIAlignParam> {
   mxnet::TShape pooled_size;
@@ -51,20 +49,26 @@ struct ROIAlignParam : public dmlc::Parameter<ROIAlignParam> {
   bool aligned;
   DMLC_DECLARE_PARAMETER(ROIAlignParam) {
     DMLC_DECLARE_FIELD(pooled_size)
-    .set_expect_ndim(2).enforce_nonzero()
-    .describe("ROI Align output roi feature map height and width: (h, w)");
-    DMLC_DECLARE_FIELD(spatial_scale).set_range(0.0, 1.0)
-    .describe("Ratio of input feature map height (or w) to raw image height (or w). "
-    "Equals the reciprocal of total stride in convolutional layers");
-    DMLC_DECLARE_FIELD(sample_ratio).set_default(-1)
-    .describe("Optional sampling ratio of ROI align, using adaptive size by default.");
-    DMLC_DECLARE_FIELD(position_sensitive).set_default(false)
-    .describe("Whether to perform position-sensitive RoI pooling. PSRoIPooling is "
-    "first proposaled by R-FCN and it can reduce the input channels by ph*pw times, "
-    "where (ph, pw) is the pooled_size");
-    DMLC_DECLARE_FIELD(aligned).set_default(false)
-    .describe("Center-aligned ROIAlign introduced in Detectron2. "
-    "To enable, set aligned to True.");
+        .set_expect_ndim(2)
+        .enforce_nonzero()
+        .describe("ROI Align output roi feature map height and width: (h, w)");
+    DMLC_DECLARE_FIELD(spatial_scale)
+        .set_range(0.0, 1.0)
+        .describe(
+            "Ratio of input feature map height (or w) to raw image height (or w). "
+            "Equals the reciprocal of total stride in convolutional layers");
+    DMLC_DECLARE_FIELD(sample_ratio)
+        .set_default(-1)
+        .describe("Optional sampling ratio of ROI align, using adaptive size by default.");
+    DMLC_DECLARE_FIELD(position_sensitive)
+        .set_default(false)
+        .describe(
+            "Whether to perform position-sensitive RoI pooling. PSRoIPooling is "
+            "first proposaled by R-FCN and it can reduce the input channels by ph*pw times, "
+            "where (ph, pw) is the pooled_size");
+    DMLC_DECLARE_FIELD(aligned).set_default(false).describe(
+        "Center-aligned ROIAlign introduced in Detectron2. "
+        "To enable, set aligned to True.");
   }
 };
 
diff --git a/src/operator/contrib/roi_align.cc b/src/operator/contrib/roi_align.cc
index e3785c26fdf1..ccd6bbe0978e 100644
--- a/src/operator/contrib/roi_align.cc
+++ b/src/operator/contrib/roi_align.cc
@@ -22,10 +22,9 @@
  * \brief roi align operator
  * \author Hang Zhang, Shesung
  * Adapted from Caffe2
-*/
+ */
 #include "./roi_align-inl.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -42,31 +41,29 @@ struct PreCalc {
 };
 
 template <typename T>
-void pre_calc_for_bilinear_interpolate(
-    const int height,
-    const int width,
-    const int pooled_height,
-    const int pooled_width,
-    const int iy_upper,
-    const int ix_upper,
-    T roi_start_h,
-    T roi_start_w,
-    T bin_size_h,
-    T bin_size_w,
-    int roi_bin_grid_h,
-    int roi_bin_grid_w,
-    std::vector<PreCalc<T>>* pre_calc) {
+void pre_calc_for_bilinear_interpolate(const int height,
+                                       const int width,
+                                       const int pooled_height,
+                                       const int pooled_width,
+                                       const int iy_upper,
+                                       const int ix_upper,
+                                       T roi_start_h,
+                                       T roi_start_w,
+                                       T bin_size_h,
+                                       T bin_size_w,
+                                       int roi_bin_grid_h,
+                                       int roi_bin_grid_w,
+                                       std::vector<PreCalc<T>>* pre_calc) {
   int pre_calc_index = 0;
   for (int ph = 0; ph < pooled_height; ph++) {
     for (int pw = 0; pw < pooled_width; pw++) {
       for (int iy = 0; iy < iy_upper; iy++) {
         const T yy = roi_start_h + ph * bin_size_h +
-            static_cast<T>(iy + .5f) * bin_size_h /
-                static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
+                     static_cast<T>(iy + .5f) * bin_size_h /
+                         static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
         for (int ix = 0; ix < ix_upper; ix++) {
           const T xx = roi_start_w + pw * bin_size_w +
-              static_cast<T>(ix + .5f) * bin_size_w /
-                  static_cast<T>(roi_bin_grid_w);
+                       static_cast<T>(ix + .5f) * bin_size_w / static_cast<T>(roi_bin_grid_w);
 
           T x = xx;
           T y = yy;
@@ -74,14 +71,14 @@ void pre_calc_for_bilinear_interpolate(
           if (y < -1.0 || y > height || x < -1.0 || x > width) {
             // empty
             PreCalc<T> pc;
-            pc.pos1 = 0;
-            pc.pos2 = 0;
-            pc.pos3 = 0;
-            pc.pos4 = 0;
-            pc.w1 = 0;
-            pc.w2 = 0;
-            pc.w3 = 0;
-            pc.w4 = 0;
+            pc.pos1                      = 0;
+            pc.pos2                      = 0;
+            pc.pos3                      = 0;
+            pc.pos4                      = 0;
+            pc.w1                        = 0;
+            pc.w2                        = 0;
+            pc.w3                        = 0;
+            pc.w4                        = 0;
             pre_calc->at(pre_calc_index) = pc;
             pre_calc_index += 1;
             continue;
@@ -101,14 +98,14 @@ void pre_calc_for_bilinear_interpolate(
 
           if (y_low >= height - 1) {
             y_high = y_low = height - 1;
-            y = (T)y_low;
+            y              = (T)y_low;
           } else {
             y_high = y_low + 1;
           }
 
           if (x_low >= width - 1) {
             x_high = x_low = width - 1;
-            x = (T)x_low;
+            x              = (T)x_low;
           } else {
             x_high = x_low + 1;
           }
@@ -120,14 +117,14 @@ void pre_calc_for_bilinear_interpolate(
 
           // save weights and indeces
           PreCalc<T> pc;
-          pc.pos1 = y_low * width + x_low;
-          pc.pos2 = y_low * width + x_high;
-          pc.pos3 = y_high * width + x_low;
-          pc.pos4 = y_high * width + x_high;
-          pc.w1 = w1;
-          pc.w2 = w2;
-          pc.w3 = w3;
-          pc.w4 = w4;
+          pc.pos1                      = y_low * width + x_low;
+          pc.pos2                      = y_low * width + x_high;
+          pc.pos3                      = y_high * width + x_low;
+          pc.pos4                      = y_high * width + x_high;
+          pc.w1                        = w1;
+          pc.w2                        = w2;
+          pc.w3                        = w3;
+          pc.w4                        = w4;
           pre_calc->at(pre_calc_index) = pc;
 
           pre_calc_index += 1;
@@ -138,34 +135,32 @@ void pre_calc_for_bilinear_interpolate(
 }
 
 template <typename T>
-void ROIAlignForward(
-    const int nthreads,
-    const T* bottom_data,
-    const T& spatial_scale,
-    const bool position_sensitive,
-    const bool continuous_coordinate,
-    const int channels,
-    const int height,
-    const int width,
-    const int pooled_height,
-    const int pooled_width,
-    const int sampling_ratio,
-    const T* bottom_rois,
-    int roi_cols,
-    T* top_data) {
+void ROIAlignForward(const int nthreads,
+                     const T* bottom_data,
+                     const T& spatial_scale,
+                     const bool position_sensitive,
+                     const bool continuous_coordinate,
+                     const int channels,
+                     const int height,
+                     const int width,
+                     const int pooled_height,
+                     const int pooled_width,
+                     const int sampling_ratio,
+                     const T* bottom_rois,
+                     int roi_cols,
+                     T* top_data) {
   DCHECK(roi_cols == 4 || roi_cols == 5);
 
   int n_rois = nthreads / channels / pooled_width / pooled_height;
   // (n, c, ph, pw) is an element in the pooled output
   // can be parallelized using omp
-#pragma omp parallel for \
-num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int n = 0; n < n_rois; n++) {
     int index_n = n * channels * pooled_width * pooled_height;
 
     // roi could have 4 or 5 columns
     const T* offset_bottom_rois = bottom_rois + n * roi_cols;
-    int roi_batch_ind = 0;
+    int roi_batch_ind           = 0;
     if (roi_cols == 5) {
       roi_batch_ind = offset_bottom_rois[0];
       if (roi_batch_ind < 0) {
@@ -176,29 +171,28 @@ num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     }
 
     // Do not using rounding; this implementation detail is critical
-    T roi_offset = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
+    T roi_offset  = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
     T roi_start_w = offset_bottom_rois[0] * spatial_scale - roi_offset;
     T roi_start_h = offset_bottom_rois[1] * spatial_scale - roi_offset;
-    T roi_end_w = offset_bottom_rois[2] * spatial_scale - roi_offset;
-    T roi_end_h = offset_bottom_rois[3] * spatial_scale - roi_offset;
+    T roi_end_w   = offset_bottom_rois[2] * spatial_scale - roi_offset;
+    T roi_end_h   = offset_bottom_rois[3] * spatial_scale - roi_offset;
 
-    T roi_width = roi_end_w - roi_start_w;
+    T roi_width  = roi_end_w - roi_start_w;
     T roi_height = roi_end_h - roi_start_h;
     if (continuous_coordinate) {
       CHECK_GT(roi_width, 0.);
       CHECK_GT(roi_height, 0.);
     } else {  // backward compatiblity
       // Force malformed ROIs to be 1x1
-      roi_width = std::max(roi_width, (T)1.);
+      roi_width  = std::max(roi_width, (T)1.);
       roi_height = std::max(roi_height, (T)1.);
     }
     T bin_size_h = static_cast<T>(roi_height) / static_cast<T>(pooled_height);
     T bin_size_w = static_cast<T>(roi_width) / static_cast<T>(pooled_width);
 
     // We use roi_bin_grid to sample the grid and mimic integral
-    int roi_bin_grid_h = (sampling_ratio > 0)
-        ? sampling_ratio
-        : std::ceil(roi_height / pooled_height);  // e.g., = 2
+    int roi_bin_grid_h =
+        (sampling_ratio > 0) ? sampling_ratio : std::ceil(roi_height / pooled_height);  // e.g., = 2
     int roi_bin_grid_w =
         (sampling_ratio > 0) ? sampling_ratio : std::ceil(roi_width / pooled_width);
 
@@ -207,48 +201,45 @@ num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
 
     // we want to precalculate indeces and weights shared by all chanels,
     // this is the key point of optimiation
-    std::vector<PreCalc<T>> pre_calc(
-        roi_bin_grid_h * roi_bin_grid_w * pooled_width * pooled_height);
-    pre_calc_for_bilinear_interpolate(
-        height,
-        width,
-        pooled_height,
-        pooled_width,
-        roi_bin_grid_h,
-        roi_bin_grid_w,
-        roi_start_h,
-        roi_start_w,
-        bin_size_h,
-        bin_size_w,
-        roi_bin_grid_h,
-        roi_bin_grid_w,
-        &pre_calc);
+    std::vector<PreCalc<T>> pre_calc(roi_bin_grid_h * roi_bin_grid_w * pooled_width *
+                                     pooled_height);
+    pre_calc_for_bilinear_interpolate(height,
+                                      width,
+                                      pooled_height,
+                                      pooled_width,
+                                      roi_bin_grid_h,
+                                      roi_bin_grid_w,
+                                      roi_start_h,
+                                      roi_start_w,
+                                      bin_size_h,
+                                      bin_size_w,
+                                      roi_bin_grid_h,
+                                      roi_bin_grid_w,
+                                      &pre_calc);
 
     for (int c = 0; c < channels; c++) {
-      int index_n_c = index_n + c * pooled_width * pooled_height;
+      int index_n_c      = index_n + c * pooled_width * pooled_height;
       int pre_calc_index = 0;
 
       for (int ph = 0; ph < pooled_height; ph++) {
         for (int pw = 0; pw < pooled_width; pw++) {
           int index = index_n_c + ph * pooled_width + pw;
 
-          int c_unpooled = c;
+          int c_unpooled        = c;
           int channels_unpooled = channels;
           if (position_sensitive) {
-            c_unpooled = c * pooled_height * pooled_width + ph * pooled_width + pw;
+            c_unpooled        = c * pooled_height * pooled_width + ph * pooled_width + pw;
             channels_unpooled = channels * pooled_height * pooled_width;
           }
           const T* offset_bottom_data =
-              bottom_data + (roi_batch_ind * channels_unpooled + c_unpooled)
-              * height * width;
+              bottom_data + (roi_batch_ind * channels_unpooled + c_unpooled) * height * width;
           T output_val = 0.;
           for (int iy = 0; iy < roi_bin_grid_h; iy++) {
             for (int ix = 0; ix < roi_bin_grid_w; ix++) {
               PreCalc<T> pc = pre_calc[pre_calc_index];
-              output_val += pc.w1 * offset_bottom_data[pc.pos1] +
-                  pc.w2 * offset_bottom_data[pc.pos2] +
-                  pc.w3 * offset_bottom_data[pc.pos3] +
-                  pc.w4 * offset_bottom_data[pc.pos4];
+              output_val +=
+                  pc.w1 * offset_bottom_data[pc.pos1] + pc.w2 * offset_bottom_data[pc.pos2] +
+                  pc.w3 * offset_bottom_data[pc.pos3] + pc.w4 * offset_bottom_data[pc.pos4];
 
               pre_calc_index += 1;
             }
@@ -257,27 +248,25 @@ num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
 
           top_data[index] = output_val;
         }  // for pw
-      }  // for ph
-    }  // for c
-  }  // for n
+      }    // for ph
+    }      // for c
+  }        // for n
 }
 
-
 template <typename T>
-void bilinear_interpolate_gradient(
-    const int height,
-    const int width,
-    T y,
-    T x,
-    T* w1,
-    T* w2,
-    T* w3,
-    T* w4,
-    int* x_low,
-    int* x_high,
-    int* y_low,
-    int* y_high,
-    const int /*index*/ /* index for debug only*/) {
+void bilinear_interpolate_gradient(const int height,
+                                   const int width,
+                                   T y,
+                                   T x,
+                                   T* w1,
+                                   T* w2,
+                                   T* w3,
+                                   T* w4,
+                                   int* x_low,
+                                   int* x_high,
+                                   int* y_low,
+                                   int* y_high,
+                                   const int /*index*/ /* index for debug only*/) {
   // deal with cases that inverse elements are out of feature map boundary
   if (y < -1.0 || y > height || x < -1.0 || x > width) {
     // empty
@@ -298,14 +287,14 @@ void bilinear_interpolate_gradient(
 
   if (*y_low >= height - 1) {
     *y_high = *y_low = height - 1;
-    y = (T)*y_low;
+    y                = (T)*y_low;
   } else {
     *y_high = *y_low + 1;
   }
 
   if (*x_low >= width - 1) {
     *x_high = *x_low = width - 1;
-    x = (T)*x_low;
+    x                = (T)*x_low;
   } else {
     *x_high = *x_low + 1;
   }
@@ -325,74 +314,72 @@ inline void add(const T& val, T* address) {
 }
 
 template <typename T>
-void ROIAlignBackward(
-    const int nthreads,
-    const T* top_diff,
-    const int /*num_rois*/,
-    const T& spatial_scale,
-    const bool position_sensitive,
-    const bool continuous_coordinate,
-    const int channels,
-    const int height,
-    const int width,
-    const int pooled_height,
-    const int pooled_width,
-    const int sampling_ratio,
-    T* bottom_diff,
-    const T* bottom_rois,
-    int rois_cols) {
+void ROIAlignBackward(const int nthreads,
+                      const T* top_diff,
+                      const int /*num_rois*/,
+                      const T& spatial_scale,
+                      const bool position_sensitive,
+                      const bool continuous_coordinate,
+                      const int channels,
+                      const int height,
+                      const int width,
+                      const int pooled_height,
+                      const int pooled_width,
+                      const int sampling_ratio,
+                      T* bottom_diff,
+                      const T* bottom_rois,
+                      int rois_cols) {
   DCHECK(rois_cols == 4 || rois_cols == 5);
 
   for (int index = 0; index < nthreads; index++) {
     // (n, c, ph, pw) is an element in the pooled output
     int pw = index % pooled_width;
     int ph = (index / pooled_width) % pooled_height;
-    int c = (index / pooled_width / pooled_height) % channels;
-    int n = index / pooled_width / pooled_height / channels;
+    int c  = (index / pooled_width / pooled_height) % channels;
+    int n  = index / pooled_width / pooled_height / channels;
 
     const T* offset_bottom_rois = bottom_rois + n * rois_cols;
-    int roi_batch_ind = 0;
+    int roi_batch_ind           = 0;
     if (rois_cols == 5) {
       roi_batch_ind = offset_bottom_rois[0];
-      if (roi_batch_ind < 0) continue;
+      if (roi_batch_ind < 0)
+        continue;
       offset_bottom_rois++;
     }
 
     // Do not using rounding; this implementation detail is critical
-    T roi_offset = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
+    T roi_offset  = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
     T roi_start_w = offset_bottom_rois[0] * spatial_scale - roi_offset;
     T roi_start_h = offset_bottom_rois[1] * spatial_scale - roi_offset;
-    T roi_end_w = offset_bottom_rois[2] * spatial_scale - roi_offset;
-    T roi_end_h = offset_bottom_rois[3] * spatial_scale - roi_offset;
+    T roi_end_w   = offset_bottom_rois[2] * spatial_scale - roi_offset;
+    T roi_end_h   = offset_bottom_rois[3] * spatial_scale - roi_offset;
 
-    T roi_width = roi_end_w - roi_start_w;
+    T roi_width  = roi_end_w - roi_start_w;
     T roi_height = roi_end_h - roi_start_h;
     if (!continuous_coordinate) {  // backward compatiblity
       // Force malformed ROIs to be 1x1
-      roi_width = std::max(roi_width, (T)1.);
+      roi_width  = std::max(roi_width, (T)1.);
       roi_height = std::max(roi_height, (T)1.);
     }
     T bin_size_h = static_cast<T>(roi_height) / static_cast<T>(pooled_height);
     T bin_size_w = static_cast<T>(roi_width) / static_cast<T>(pooled_width);
 
-    int c_unpooled = c;
+    int c_unpooled        = c;
     int channels_unpooled = channels;
     if (position_sensitive) {
-      c_unpooled = c * pooled_height * pooled_width + ph * pooled_width + pw;
+      c_unpooled        = c * pooled_height * pooled_width + ph * pooled_width + pw;
       channels_unpooled = channels * pooled_height * pooled_width;
     }
     T* offset_bottom_diff =
-        bottom_diff + (roi_batch_ind * channels_unpooled + c_unpooled)
-        * height * width;
+        bottom_diff + (roi_batch_ind * channels_unpooled + c_unpooled) * height * width;
 
-    int top_offset = (n * channels + c) * pooled_height * pooled_width;
-    const T* offset_top_diff = top_diff + top_offset;
+    int top_offset            = (n * channels + c) * pooled_height * pooled_width;
+    const T* offset_top_diff  = top_diff + top_offset;
     const T top_diff_this_bin = offset_top_diff[ph * pooled_width + pw];
 
     // We use roi_bin_grid to sample the grid and mimic integral
-    int roi_bin_grid_h = (sampling_ratio > 0)
-        ? sampling_ratio
-        : std::ceil(roi_height / pooled_height);  // e.g., = 2
+    int roi_bin_grid_h =
+        (sampling_ratio > 0) ? sampling_ratio : std::ceil(roi_height / pooled_height);  // e.g., = 2
     int roi_bin_grid_w =
         (sampling_ratio > 0) ? sampling_ratio : std::ceil(roi_width / pooled_width);
 
@@ -400,31 +387,18 @@ void ROIAlignBackward(
     const T count = roi_bin_grid_h * roi_bin_grid_w;  // e.g. = 4
 
     for (int iy = 0; iy < roi_bin_grid_h; iy++) {
-      const T y = roi_start_h + ph * bin_size_h +
-          static_cast<T>(iy + .5f) * bin_size_h /
-              static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
+      const T y =
+          roi_start_h + ph * bin_size_h +
+          static_cast<T>(iy + .5f) * bin_size_h / static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
       for (int ix = 0; ix < roi_bin_grid_w; ix++) {
         const T x = roi_start_w + pw * bin_size_w +
-            static_cast<T>(ix + .5f) * bin_size_w /
-                static_cast<T>(roi_bin_grid_w);
+                    static_cast<T>(ix + .5f) * bin_size_w / static_cast<T>(roi_bin_grid_w);
 
         T w1, w2, w3, w4;
         int x_low, x_high, y_low, y_high;
 
         bilinear_interpolate_gradient(
-            height,
-            width,
-            y,
-            x,
-            &w1,
-            &w2,
-            &w3,
-            &w4,
-            &x_low,
-            &x_high,
-            &y_low,
-            &y_high,
-            index);
+            height, width, y, x, &w1, &w2, &w3, &w4, &x_low, &x_high, &y_low, &y_high, index);
 
         T g1 = top_diff_this_bin * w1 / count;
         T g2 = top_diff_this_bin * w2 / count;
@@ -438,20 +412,19 @@ void ROIAlignBackward(
           add(static_cast<T>(g3), offset_bottom_diff + y_high * width + x_low);
           add(static_cast<T>(g4), offset_bottom_diff + y_high * width + x_high);
         }  // if
-      }  // ix
-    }  // iy
-  }  // for
+      }    // ix
+    }      // iy
+  }        // for
 }  // ROIAlignBackward
 
-
-template<typename xpu>
+template <typename xpu>
 void ROIAlignForwardCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& in_data,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& out_data) {
   using namespace mshadow;
-  size_t expected_in = 2;
+  size_t expected_in  = 2;
   size_t expected_out = 1;
   CHECK_EQ(in_data.size(), expected_in);
   CHECK_EQ(out_data.size(), expected_out);
@@ -461,26 +434,37 @@ void ROIAlignForwardCompute(const nnvm::NodeAttrs& attrs,
 
   const int count = out_data[roialign::kOut].Size();
   // const int num_rois = in_data[roialign::kBox].size(0);
-  const int channels = out_data[roialign::kOut].size(1);  // channels of pooled output
-  const int height = in_data[roialign::kData].size(2);
-  const int width = in_data[roialign::kData].size(3);
+  const int channels      = out_data[roialign::kOut].size(1);  // channels of pooled output
+  const int height        = in_data[roialign::kData].size(2);
+  const int width         = in_data[roialign::kData].size(3);
   const int pooled_height = out_data[roialign::kOut].size(2);
-  const int pooled_width = out_data[roialign::kOut].size(3);
-  const int rois_cols = in_data[roialign::kBox].size(1);
+  const int pooled_width  = out_data[roialign::kOut].size(3);
+  const int rois_cols     = in_data[roialign::kBox].size(1);
 
   // assume all the data and gradient have the same type
   MSHADOW_REAL_TYPE_SWITCH(in_data[0].type_flag_, DType, {
-    const DType *bottom_data = in_data[roialign::kData].dptr<DType>();
-    const DType *bottom_rois = in_data[roialign::kBox].dptr<DType>();
-    DType *top_data = out_data[roialign::kOut].dptr<DType>();
-
-    ROIAlignForward<DType>(count, bottom_data, param.spatial_scale, param.position_sensitive,
-                           param.aligned, channels, height, width, pooled_height, pooled_width,
-                           param.sample_ratio, bottom_rois, rois_cols, top_data);
+    const DType* bottom_data = in_data[roialign::kData].dptr<DType>();
+    const DType* bottom_rois = in_data[roialign::kBox].dptr<DType>();
+    DType* top_data          = out_data[roialign::kOut].dptr<DType>();
+
+    ROIAlignForward<DType>(count,
+                           bottom_data,
+                           param.spatial_scale,
+                           param.position_sensitive,
+                           param.aligned,
+                           channels,
+                           height,
+                           width,
+                           pooled_height,
+                           pooled_width,
+                           param.sample_ratio,
+                           bottom_rois,
+                           rois_cols,
+                           top_data);
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void ROIAlignBackwardCompute(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -496,37 +480,46 @@ void ROIAlignBackwardCompute(const nnvm::NodeAttrs& attrs,
   // std::vector<TBlob> out_data(1, inputs[2]);
 
   CHECK_EQ(out_grad[0].shape_[0], in_data[0].shape_[0]);
-  CHECK_NE(req[0], kWriteInplace) <<
-    "ROIAlign: Backward doesn't support kWriteInplace.";
-  CHECK_NE(req[1], kWriteInplace) <<
-    "ROIAlign: Backward doesn't support kWriteInplace.";
+  CHECK_NE(req[0], kWriteInplace) << "ROIAlign: Backward doesn't support kWriteInplace.";
+  CHECK_NE(req[1], kWriteInplace) << "ROIAlign: Backward doesn't support kWriteInplace.";
 
   const ROIAlignParam& param = nnvm::get<ROIAlignParam>(attrs.parsed);
 
-  const int count = out_grad[0].Size();
-  const int num_rois = in_data[0].size(0);
-  const int channels = out_grad[0].size(1);  // channels of pooled output
-  const int height = outputs[0].size(2);
-  const int width = outputs[0].size(3);
+  const int count         = out_grad[0].Size();
+  const int num_rois      = in_data[0].size(0);
+  const int channels      = out_grad[0].size(1);  // channels of pooled output
+  const int height        = outputs[0].size(2);
+  const int width         = outputs[0].size(3);
   const int pooled_height = out_grad[0].size(2);
-  const int pooled_width = out_grad[0].size(3);
-  const int rois_cols = in_data[0].size(1);
+  const int pooled_width  = out_grad[0].size(3);
+  const int rois_cols     = in_data[0].size(1);
 
-  Stream<cpu> *s = ctx.get_stream<cpu>();
+  Stream<cpu>* s = ctx.get_stream<cpu>();
   // assume all the data and gradient have the same type
   MSHADOW_REAL_TYPE_SWITCH(out_grad[0].type_flag_, DType, {
-    const DType *top_diff = out_grad[0].dptr<DType>();
-    const DType *bottom_rois = in_data[0].dptr<DType>();
-    DType *grad_in = outputs[0].dptr<DType>();
+    const DType* top_diff    = out_grad[0].dptr<DType>();
+    const DType* bottom_rois = in_data[0].dptr<DType>();
+    DType* grad_in           = outputs[0].dptr<DType>();
 
     if (kAddTo == req[roialign::kData] || kWriteTo == req[roialign::kData]) {
       if (kWriteTo == req[roialign::kData]) {
         Fill<false>(s, outputs[0], kWriteTo, static_cast<DType>(0));
       }
-      ROIAlignBackward<DType>(count, top_diff, num_rois, param.spatial_scale,
-                     param.position_sensitive, param.aligned, channels, height, width,
-                     pooled_height, pooled_width, param.sample_ratio, grad_in,
-                     bottom_rois, rois_cols);
+      ROIAlignBackward<DType>(count,
+                              top_diff,
+                              num_rois,
+                              param.spatial_scale,
+                              param.position_sensitive,
+                              param.aligned,
+                              channels,
+                              height,
+                              width,
+                              pooled_height,
+                              pooled_width,
+                              param.sample_ratio,
+                              grad_in,
+                              bottom_rois,
+                              rois_cols);
     }
     if (kWriteTo == req[roialign::kBox]) {
       Fill<false>(s, outputs[1], kWriteTo, static_cast<DType>(0));
@@ -537,7 +530,7 @@ void ROIAlignBackwardCompute(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(ROIAlignParam);
 
 NNVM_REGISTER_OP(_contrib_ROIAlign)
-.describe(R"code(
+    .describe(R"code(
 This operator takes a 4D feature map as an input array and region proposals as `rois`,
 then align the feature map over sub-regions of input and produces a fixed-sized output array.
 This operator is typically used in Faster R-CNN & Mask R-CNN networks. If roi batchid is less 
@@ -557,76 +550,85 @@ References
 
 He, Kaiming, et al. "Mask R-CNN." ICCV, 2017
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "rois"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr_parser(ParamParser<ROIAlignParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-      mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape){
-  using namespace mshadow;
-  const ROIAlignParam& param = nnvm::get<ROIAlignParam>(attrs.parsed);
-  CHECK_EQ(in_shape->size(), 2) << "Input:[data, rois]";
-  // data: [batch_size, c, h, w]
-  mxnet::TShape dshape = in_shape->at(roialign::kData);
-  CHECK_EQ(dshape.ndim(), 4) << "data should be a 4D tensor";
-  // bbox: [num_rois, 5]
-  mxnet::TShape bshape = in_shape->at(roialign::kBox);
-  CHECK_EQ(bshape.ndim(), 2) << "bbox should be a 2D tensor of shape [batch, 5]";
-  CHECK_EQ(bshape[1], 5) << "bbox should be a 2D tensor of shape [batch, 5]";
-  // out: [num_rois, c, pooled_h, pooled_w]
-  out_shape->clear();
-  if (param.position_sensitive) {
-    CHECK_EQ(dshape[1] % (param.pooled_size[0]*param.pooled_size[1]), 0) <<
-      "Input channels should be divided by pooled_size[0]*pooled_size[1]"
-      "when position_sensitive is true.";
-    out_shape->push_back(
-         Shape4(bshape[0], dshape[1]/param.pooled_size[0]/param.pooled_size[1],
-                param.pooled_size[0], param.pooled_size[1]));
-  } else {
-    out_shape->push_back(
-         Shape4(bshape[0], dshape[1], param.pooled_size[0], param.pooled_size[1]));
-  }
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-      std::vector<int> *in_type, std::vector<int> *out_type) {
-  CHECK_EQ(in_type->size(), 2);
-  int dtype = (*in_type)[0];
-  CHECK_EQ(dtype, (*in_type)[1]);
-  CHECK_NE(dtype, -1) << "Input must have specified type";
-
-  out_type->clear();
-  out_type->push_back(dtype);
-  return true;
-})
-.set_attr<FCompute>("FCompute<cpu>", ROIAlignForwardCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    std::vector<nnvm::NodeEntry> heads;
-    heads.push_back(ograds[roialign::kOut]);
-    heads.push_back(n->inputs[roialign::kBox]);
-    return MakeGradNode("_backward_ROIAlign", n, heads, n->attrs.dict);
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input data to the pooling operator, a 4D Feature maps")
-.add_argument("rois", "NDArray-or-Symbol", "Bounding box coordinates, a 2D array, "
-              "if batchid is less than 0, it will be ignored.")
-.add_arguments(ROIAlignParam::__FIELDS__());
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "rois"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr_parser(ParamParser<ROIAlignParam>)
+    .set_attr<mxnet::FInferShape>(
+        "FInferShape",
+        [](const nnvm::NodeAttrs& attrs,
+           mxnet::ShapeVector* in_shape,
+           mxnet::ShapeVector* out_shape) {
+          using namespace mshadow;
+          const ROIAlignParam& param = nnvm::get<ROIAlignParam>(attrs.parsed);
+          CHECK_EQ(in_shape->size(), 2) << "Input:[data, rois]";
+          // data: [batch_size, c, h, w]
+          mxnet::TShape dshape = in_shape->at(roialign::kData);
+          CHECK_EQ(dshape.ndim(), 4) << "data should be a 4D tensor";
+          // bbox: [num_rois, 5]
+          mxnet::TShape bshape = in_shape->at(roialign::kBox);
+          CHECK_EQ(bshape.ndim(), 2) << "bbox should be a 2D tensor of shape [batch, 5]";
+          CHECK_EQ(bshape[1], 5) << "bbox should be a 2D tensor of shape [batch, 5]";
+          // out: [num_rois, c, pooled_h, pooled_w]
+          out_shape->clear();
+          if (param.position_sensitive) {
+            CHECK_EQ(dshape[1] % (param.pooled_size[0] * param.pooled_size[1]), 0)
+                << "Input channels should be divided by pooled_size[0]*pooled_size[1]"
+                   "when position_sensitive is true.";
+            out_shape->push_back(Shape4(bshape[0],
+                                        dshape[1] / param.pooled_size[0] / param.pooled_size[1],
+                                        param.pooled_size[0],
+                                        param.pooled_size[1]));
+          } else {
+            out_shape->push_back(
+                Shape4(bshape[0], dshape[1], param.pooled_size[0], param.pooled_size[1]));
+          }
+          return true;
+        })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_type,
+                                   std::vector<int>* out_type) {
+                                  CHECK_EQ(in_type->size(), 2);
+                                  int dtype = (*in_type)[0];
+                                  CHECK_EQ(dtype, (*in_type)[1]);
+                                  CHECK_NE(dtype, -1) << "Input must have specified type";
+
+                                  out_type->clear();
+                                  out_type->push_back(dtype);
+                                  return true;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", ROIAlignForwardCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 std::vector<nnvm::NodeEntry> heads;
+                                 heads.push_back(ograds[roialign::kOut]);
+                                 heads.push_back(n->inputs[roialign::kBox]);
+                                 return MakeGradNode("_backward_ROIAlign", n, heads, n->attrs.dict);
+                               })
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "Input data to the pooling operator, a 4D Feature maps")
+    .add_argument("rois",
+                  "NDArray-or-Symbol",
+                  "Bounding box coordinates, a 2D array, "
+                  "if batchid is less than 0, it will be ignored.")
+    .add_arguments(ROIAlignParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_ROIAlign)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<ROIAlignParam>)
-.set_attr<FCompute>("FCompute<cpu>", ROIAlignBackwardCompute<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<ROIAlignParam>)
+    .set_attr<FCompute>("FCompute<cpu>", ROIAlignBackwardCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/contrib/roi_align.cu b/src/operator/contrib/roi_align.cu
index 3d085d3031b5..0711496edb67 100644
--- a/src/operator/contrib/roi_align.cu
+++ b/src/operator/contrib/roi_align.cu
@@ -22,11 +22,10 @@
  * \brief roi align operator
  * \author Hang Zhang, Shesung
  * Adapted from Caffe2
-*/
+ */
 #include "./roi_align-inl.h"
 #include "../mxnet_op.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -40,22 +39,18 @@ constexpr int ROI_MAXIMUM_NUM_BLOCKS = 4096;
  */
 inline int ROI_GET_BLOCKS(const int N) {
   return std::max(
-      std::min(
-          (N + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock,
-          ROI_MAXIMUM_NUM_BLOCKS),
+      std::min((N + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock, ROI_MAXIMUM_NUM_BLOCKS),
       // Use at least 1 block, since CUDA does not allow empty block
       1);
 }
 
-
 template <typename T>
-__device__ T bilinear_interpolate(
-    const T* bottom_data,
-    const int height,
-    const int width,
-    T y,
-    T x,
-    const int index /* index for debug only*/) {
+__device__ T bilinear_interpolate(const T* bottom_data,
+                                  const int height,
+                                  const int width,
+                                  T y,
+                                  T x,
+                                  const int index /* index for debug only*/) {
   // deal with cases that inverse elements are out of feature map boundary
   if (y < -1.0 || y > height || x < -1.0 || x > width) {
     // empty
@@ -76,14 +71,14 @@ __device__ T bilinear_interpolate(
 
   if (y_low >= height - 1) {
     y_high = y_low = height - 1;
-    y = (T)y_low;
+    y              = (T)y_low;
   } else {
     y_high = y_low + 1;
   }
 
   if (x_low >= width - 1) {
     x_high = x_low = width - 1;
-    x = (T)x_low;
+    x              = (T)x_low;
   } else {
     x_high = x_low + 1;
   }
@@ -104,29 +99,28 @@ __device__ T bilinear_interpolate(
 }
 
 template <typename T>
-__global__ void RoIAlignForwardKernel(
-    const int nthreads,
-    const T* bottom_data,
-    const T spatial_scale,
-    const bool position_sensitive,
-    const bool continuous_coordinate,
-    const int channels,
-    const int height,
-    const int width,
-    const int pooled_height,
-    const int pooled_width,
-    const int sampling_ratio,
-    const T* bottom_rois,
-    T* top_data) {
+__global__ void RoIAlignForwardKernel(const int nthreads,
+                                      const T* bottom_data,
+                                      const T spatial_scale,
+                                      const bool position_sensitive,
+                                      const bool continuous_coordinate,
+                                      const int channels,
+                                      const int height,
+                                      const int width,
+                                      const int pooled_height,
+                                      const int pooled_width,
+                                      const int sampling_ratio,
+                                      const T* bottom_rois,
+                                      T* top_data) {
   CUDA_KERNEL_LOOP(index, nthreads) {
     // (n, c, ph, pw) is an element in the pooled output
     int pw = index % pooled_width;
     int ph = (index / pooled_width) % pooled_height;
-    int c = (index / pooled_width / pooled_height) % channels;
-    int n = index / pooled_width / pooled_height / channels;
+    int c  = (index / pooled_width / pooled_height) % channels;
+    int n  = index / pooled_width / pooled_height / channels;
 
     const T* offset_bottom_rois = bottom_rois + n * 5;
-    int roi_batch_ind = offset_bottom_rois[0];
+    int roi_batch_ind           = offset_bottom_rois[0];
 
     if (roi_batch_ind < 0) {
       top_data[index] = 0.;
@@ -134,54 +128,49 @@ __global__ void RoIAlignForwardKernel(
     }
 
     // Do not using rounding; this implementation detail is critical
-    T roi_offset = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
+    T roi_offset  = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
     T roi_start_w = offset_bottom_rois[1] * spatial_scale - roi_offset;
     T roi_start_h = offset_bottom_rois[2] * spatial_scale - roi_offset;
-    T roi_end_w = offset_bottom_rois[3] * spatial_scale - roi_offset;
-    T roi_end_h = offset_bottom_rois[4] * spatial_scale - roi_offset;
+    T roi_end_w   = offset_bottom_rois[3] * spatial_scale - roi_offset;
+    T roi_end_h   = offset_bottom_rois[4] * spatial_scale - roi_offset;
 
-    T roi_width = roi_end_w - roi_start_w;
+    T roi_width  = roi_end_w - roi_start_w;
     T roi_height = roi_end_h - roi_start_h;
     if (!continuous_coordinate) {  // backward compatiblity
       // Force malformed ROIs to be 1x1
-      roi_width = max(roi_width, (T)1.);
+      roi_width  = max(roi_width, (T)1.);
       roi_height = max(roi_height, (T)1.);
     }
     T bin_size_h = static_cast<T>(roi_height) / static_cast<T>(pooled_height);
     T bin_size_w = static_cast<T>(roi_width) / static_cast<T>(pooled_width);
 
-    int c_unpooled = c;
+    int c_unpooled        = c;
     int channels_unpooled = channels;
     if (position_sensitive) {
-      c_unpooled = c * pooled_height * pooled_width + ph * pooled_width + pw;
+      c_unpooled        = c * pooled_height * pooled_width + ph * pooled_width + pw;
       channels_unpooled = channels * pooled_height * pooled_width;
     }
     const T* offset_bottom_data =
-        bottom_data + (roi_batch_ind * channels_unpooled + c_unpooled)
-        * height * width;
+        bottom_data + (roi_batch_ind * channels_unpooled + c_unpooled) * height * width;
 
     // We use roi_bin_grid to sample the grid and mimic integral
-    int roi_bin_grid_h = (sampling_ratio > 0)
-        ? sampling_ratio
-        : ceil(roi_height / pooled_height);  // e.g., = 2
-    int roi_bin_grid_w =
-        (sampling_ratio > 0) ? sampling_ratio : ceil(roi_width / pooled_width);
+    int roi_bin_grid_h =
+        (sampling_ratio > 0) ? sampling_ratio : ceil(roi_height / pooled_height);  // e.g., = 2
+    int roi_bin_grid_w = (sampling_ratio > 0) ? sampling_ratio : ceil(roi_width / pooled_width);
 
     // We do average (integral) pooling inside a bin
     const T count = roi_bin_grid_h * roi_bin_grid_w;  // e.g. = 4
 
     T output_val = 0.;
     for (int iy = 0; iy < roi_bin_grid_h; iy++) {  // e.g., iy = 0, 1
-      const T y = roi_start_h + ph * bin_size_h +
-          static_cast<T>(iy + .5f) * bin_size_h /
-              static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
+      const T y =
+          roi_start_h + ph * bin_size_h +
+          static_cast<T>(iy + .5f) * bin_size_h / static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
       for (int ix = 0; ix < roi_bin_grid_w; ix++) {
         const T x = roi_start_w + pw * bin_size_w +
-            static_cast<T>(ix + .5f) * bin_size_w /
-                static_cast<T>(roi_bin_grid_w);
+                    static_cast<T>(ix + .5f) * bin_size_w / static_cast<T>(roi_bin_grid_w);
 
-        T val = bilinear_interpolate(
-            offset_bottom_data, height, width, y, x, index);
+        T val = bilinear_interpolate(offset_bottom_data, height, width, y, x, index);
         output_val += val;
       }
     }
@@ -191,22 +180,20 @@ __global__ void RoIAlignForwardKernel(
   }
 }
 
-
 template <typename T>
-__device__ void bilinear_interpolate_gradient(
-    const int height,
-    const int width,
-    T y,
-    T x,
-    T* w1,
-    T* w2,
-    T* w3,
-    T* w4,
-    int* x_low,
-    int* x_high,
-    int* y_low,
-    int* y_high,
-    const int /*index*/ /* index for debug only*/) {
+__device__ void bilinear_interpolate_gradient(const int height,
+                                              const int width,
+                                              T y,
+                                              T x,
+                                              T* w1,
+                                              T* w2,
+                                              T* w3,
+                                              T* w4,
+                                              int* x_low,
+                                              int* x_high,
+                                              int* y_low,
+                                              int* y_high,
+                                              const int /*index*/ /* index for debug only*/) {
   // deal with cases that inverse elements are out of feature map boundary
   if (y < -1.0 || y > height || x < -1.0 || x > width) {
     // empty
@@ -227,14 +214,14 @@ __device__ void bilinear_interpolate_gradient(
 
   if (*y_low >= height - 1) {
     *y_high = *y_low = height - 1;
-    y = (T)*y_low;
+    y                = (T)*y_low;
   } else {
     *y_high = *y_low + 1;
   }
 
   if (*x_low >= width - 1) {
     *x_high = *x_low = width - 1;
-    x = (T)*x_low;
+    x                = (T)*x_low;
   } else {
     *x_high = *x_low + 1;
   }
@@ -249,99 +236,83 @@ __device__ void bilinear_interpolate_gradient(
 }
 
 template <typename T>
-__global__ void RoIAlignBackwardKernel(
-    const int nthreads,
-    const T* top_diff,
-    const int num_rois,
-    const T spatial_scale,
-    const bool position_sensitive,
-    const bool continuous_coordinate,
-    const int channels,
-    const int height,
-    const int width,
-    const int pooled_height,
-    const int pooled_width,
-    const int sampling_ratio,
-    T* bottom_diff,
-    const T* bottom_rois) {
+__global__ void RoIAlignBackwardKernel(const int nthreads,
+                                       const T* top_diff,
+                                       const int num_rois,
+                                       const T spatial_scale,
+                                       const bool position_sensitive,
+                                       const bool continuous_coordinate,
+                                       const int channels,
+                                       const int height,
+                                       const int width,
+                                       const int pooled_height,
+                                       const int pooled_width,
+                                       const int sampling_ratio,
+                                       T* bottom_diff,
+                                       const T* bottom_rois) {
   CUDA_KERNEL_LOOP(index, nthreads) {
     // (n, c, ph, pw) is an element in the pooled output
     int pw = index % pooled_width;
     int ph = (index / pooled_width) % pooled_height;
-    int c = (index / pooled_width / pooled_height) % channels;
-    int n = index / pooled_width / pooled_height / channels;
+    int c  = (index / pooled_width / pooled_height) % channels;
+    int n  = index / pooled_width / pooled_height / channels;
 
     const T* offset_bottom_rois = bottom_rois + n * 5;
-    int roi_batch_ind = offset_bottom_rois[0];
-    if (roi_batch_ind < 0) continue;
+    int roi_batch_ind           = offset_bottom_rois[0];
+    if (roi_batch_ind < 0)
+      continue;
 
     // Do not using rounding; this implementation detail is critical
-    T roi_offset = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
+    T roi_offset  = continuous_coordinate ? static_cast<T>(0.5) : static_cast<T>(0);
     T roi_start_w = offset_bottom_rois[1] * spatial_scale - roi_offset;
     T roi_start_h = offset_bottom_rois[2] * spatial_scale - roi_offset;
-    T roi_end_w = offset_bottom_rois[3] * spatial_scale - roi_offset;
-    T roi_end_h = offset_bottom_rois[4] * spatial_scale - roi_offset;
+    T roi_end_w   = offset_bottom_rois[3] * spatial_scale - roi_offset;
+    T roi_end_h   = offset_bottom_rois[4] * spatial_scale - roi_offset;
 
-    T roi_width = roi_end_w - roi_start_w;
+    T roi_width  = roi_end_w - roi_start_w;
     T roi_height = roi_end_h - roi_start_h;
     if (!continuous_coordinate) {  // backward compatiblity
       // Force malformed ROIs to be 1x1
-      roi_width = max(roi_width, (T)1.);
+      roi_width  = max(roi_width, (T)1.);
       roi_height = max(roi_height, (T)1.);
     }
     T bin_size_h = static_cast<T>(roi_height) / static_cast<T>(pooled_height);
     T bin_size_w = static_cast<T>(roi_width) / static_cast<T>(pooled_width);
 
-    int c_unpooled = c;
+    int c_unpooled        = c;
     int channels_unpooled = channels;
     if (position_sensitive) {
-      c_unpooled = c * pooled_height * pooled_width + ph * pooled_width + pw;
+      c_unpooled        = c * pooled_height * pooled_width + ph * pooled_width + pw;
       channels_unpooled = channels * pooled_height * pooled_width;
     }
     T* offset_bottom_diff =
-        bottom_diff + (roi_batch_ind * channels_unpooled + c_unpooled)
-        * height * width;
+        bottom_diff + (roi_batch_ind * channels_unpooled + c_unpooled) * height * width;
 
-    int top_offset = (n * channels + c) * pooled_height * pooled_width;
-    const T* offset_top_diff = top_diff + top_offset;
+    int top_offset            = (n * channels + c) * pooled_height * pooled_width;
+    const T* offset_top_diff  = top_diff + top_offset;
     const T top_diff_this_bin = offset_top_diff[ph * pooled_width + pw];
 
     // We use roi_bin_grid to sample the grid and mimic integral
-    int roi_bin_grid_h = (sampling_ratio > 0)
-        ? sampling_ratio
-        : ceil(roi_height / pooled_height);  // e.g., = 2
-    int roi_bin_grid_w =
-        (sampling_ratio > 0) ? sampling_ratio : ceil(roi_width / pooled_width);
+    int roi_bin_grid_h =
+        (sampling_ratio > 0) ? sampling_ratio : ceil(roi_height / pooled_height);  // e.g., = 2
+    int roi_bin_grid_w = (sampling_ratio > 0) ? sampling_ratio : ceil(roi_width / pooled_width);
 
     // We do average (integral) pooling inside a bin
     const T count = roi_bin_grid_h * roi_bin_grid_w;  // e.g. = 4
 
     for (int iy = 0; iy < roi_bin_grid_h; iy++) {  // e.g., iy = 0, 1
-      const T y = roi_start_h + ph * bin_size_h +
-          static_cast<T>(iy + .5f) * bin_size_h /
-              static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
+      const T y =
+          roi_start_h + ph * bin_size_h +
+          static_cast<T>(iy + .5f) * bin_size_h / static_cast<T>(roi_bin_grid_h);  // e.g., 0.5, 1.5
       for (int ix = 0; ix < roi_bin_grid_w; ix++) {
         const T x = roi_start_w + pw * bin_size_w +
-            static_cast<T>(ix + .5f) * bin_size_w /
-                static_cast<T>(roi_bin_grid_w);
+                    static_cast<T>(ix + .5f) * bin_size_w / static_cast<T>(roi_bin_grid_w);
 
         T w1, w2, w3, w4;
         int x_low, x_high, y_low, y_high;
 
         bilinear_interpolate_gradient(
-            height,
-            width,
-            y,
-            x,
-            &w1,
-            &w2,
-            &w3,
-            &w4,
-            &x_low,
-            &x_high,
-            &y_low,
-            &y_high,
-            index);
+            height, width, y, x, &w1, &w2, &w3, &w4, &x_low, &x_high, &y_low, &y_high, index);
 
         T g1 = top_diff_this_bin * w1 / count;
         T g2 = top_diff_this_bin * w2 / count;
@@ -349,28 +320,24 @@ __global__ void RoIAlignBackwardKernel(
         T g4 = top_diff_this_bin * w4 / count;
 
         if (x_low >= 0 && x_high >= 0 && y_low >= 0 && y_high >= 0) {
-          atomicAdd(
-              offset_bottom_diff + y_low * width + x_low, static_cast<T>(g1));
-          atomicAdd(
-              offset_bottom_diff + y_low * width + x_high, static_cast<T>(g2));
-          atomicAdd(
-              offset_bottom_diff + y_high * width + x_low, static_cast<T>(g3));
-          atomicAdd(
-              offset_bottom_diff + y_high * width + x_high, static_cast<T>(g4));
+          atomicAdd(offset_bottom_diff + y_low * width + x_low, static_cast<T>(g1));
+          atomicAdd(offset_bottom_diff + y_low * width + x_high, static_cast<T>(g2));
+          atomicAdd(offset_bottom_diff + y_high * width + x_low, static_cast<T>(g3));
+          atomicAdd(offset_bottom_diff + y_high * width + x_high, static_cast<T>(g4));
         }  // if
-      }  // ix
-    }  // iy
-  }  // CUDA_KERNEL_LOOP
+      }    // ix
+    }      // iy
+  }        // CUDA_KERNEL_LOOP
 }  // RoIAlignBackward
 
-template<typename xpu>
+template <typename xpu>
 void ROIAlignForwardCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& in_data,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& out_data) {
   using namespace mshadow;
-  size_t expected_in = 2;
+  size_t expected_in  = 2;
   size_t expected_out = 1;
   CHECK_EQ(in_data.size(), expected_in);
   CHECK_EQ(out_data.size(), expected_out);
@@ -378,43 +345,38 @@ void ROIAlignForwardCompute(const nnvm::NodeAttrs& attrs,
 
   const ROIAlignParam param = nnvm::get<ROIAlignParam>(attrs.parsed);
 
-  const int count = out_data[roialign::kOut].Size();
-  const int num_rois = in_data[roialign::kBox].size(0);
-  const int channels = out_data[roialign::kOut].size(1);  // channels of pooled output
-  const int height = in_data[roialign::kData].size(2);
-  const int width = in_data[roialign::kData].size(3);
+  const int count         = out_data[roialign::kOut].Size();
+  const int num_rois      = in_data[roialign::kBox].size(0);
+  const int channels      = out_data[roialign::kOut].size(1);  // channels of pooled output
+  const int height        = in_data[roialign::kData].size(2);
+  const int width         = in_data[roialign::kData].size(3);
   const int pooled_height = out_data[roialign::kOut].size(2);
-  const int pooled_width = out_data[roialign::kOut].size(3);
+  const int pooled_width  = out_data[roialign::kOut].size(3);
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s      = ctx.get_stream<gpu>();
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   MSHADOW_REAL_TYPE_SWITCH(in_data[0].type_flag_, DType, {
-    const DType *bottom_data = in_data[roialign::kData].dptr<DType>();
-    const DType *bottom_rois = in_data[roialign::kBox].dptr<DType>();
-    DType *top_data = out_data[roialign::kOut].dptr<DType>();
+    const DType* bottom_data = in_data[roialign::kData].dptr<DType>();
+    const DType* bottom_rois = in_data[roialign::kBox].dptr<DType>();
+    DType* top_data          = out_data[roialign::kOut].dptr<DType>();
     RoIAlignForwardKernel<DType>
-      <<<ROI_GET_BLOCKS(count),
-         kMaxThreadsPerBlock,
-         0,
-         stream>>>(
-          count,
-          bottom_data,
-          param.spatial_scale,
-          param.position_sensitive,
-          param.aligned,
-          channels,
-          height,
-          width,
-          pooled_height,
-          pooled_width,
-          param.sample_ratio,
-          bottom_rois,
-          top_data);
+        <<<ROI_GET_BLOCKS(count), kMaxThreadsPerBlock, 0, stream>>>(count,
+                                                                    bottom_data,
+                                                                    param.spatial_scale,
+                                                                    param.position_sensitive,
+                                                                    param.aligned,
+                                                                    channels,
+                                                                    height,
+                                                                    width,
+                                                                    pooled_height,
+                                                                    pooled_width,
+                                                                    param.sample_ratio,
+                                                                    bottom_rois,
+                                                                    top_data);
   })
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void ROIAlignBackwardCompute(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -430,65 +392,59 @@ void ROIAlignBackwardCompute(const nnvm::NodeAttrs& attrs,
   // std::vector<TBlob> out_data(1, inputs[2]);
 
   CHECK_EQ(out_grad[0].shape_[0], in_data[0].shape_[0]);
-  CHECK_NE(req[0], kWriteInplace) <<
-    "ROIAlign: Backward doesn't support kWriteInplace.";
-  CHECK_NE(req[1], kWriteInplace) <<
-    "ROIAlign: Backward doesn't support kWriteInplace.";
+  CHECK_NE(req[0], kWriteInplace) << "ROIAlign: Backward doesn't support kWriteInplace.";
+  CHECK_NE(req[1], kWriteInplace) << "ROIAlign: Backward doesn't support kWriteInplace.";
 
   const ROIAlignParam param = nnvm::get<ROIAlignParam>(attrs.parsed);
 
-  const int count = out_grad[0].Size();
-  const int num_rois = in_data[0].size(0);
-  const int channels = out_grad[0].size(1);  // channels of pooled output
-  const int height = outputs[0].size(2);
-  const int width = outputs[0].size(3);
+  const int count         = out_grad[0].Size();
+  const int num_rois      = in_data[0].size(0);
+  const int channels      = out_grad[0].size(1);  // channels of pooled output
+  const int height        = outputs[0].size(2);
+  const int width         = outputs[0].size(3);
   const int pooled_height = out_grad[0].size(2);
-  const int pooled_width = out_grad[0].size(3);
+  const int pooled_width  = out_grad[0].size(3);
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s      = ctx.get_stream<gpu>();
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
 
   // assume all the data and gradient have the same type
   MSHADOW_REAL_TYPE_SWITCH(out_grad[0].type_flag_, DType, {
-    const DType *top_diff = out_grad[0].dptr<DType>();
-    const DType *bottom_rois = in_data[0].dptr<DType>();
-    DType *grad_in = outputs[0].dptr<DType>();
+    const DType* top_diff    = out_grad[0].dptr<DType>();
+    const DType* bottom_rois = in_data[0].dptr<DType>();
+    DType* grad_in           = outputs[0].dptr<DType>();
 
     if (kWriteTo == req[roialign::kBox]) {
       Fill<false>(s, outputs[1], kWriteTo, static_cast<DType>(0));
     }
-    if (kNullOp == req[roialign::kData]) return;
+    if (kNullOp == req[roialign::kData])
+      return;
     if (kWriteTo == req[roialign::kData]) {
       Fill<false>(s, outputs[0], kWriteTo, static_cast<DType>(0));
     }
     RoIAlignBackwardKernel<DType>
-    <<<ROI_GET_BLOCKS(count),
-       kMaxThreadsPerBlock,
-       0,
-       stream>>>(
-        count,
-        top_diff,
-        num_rois,
-        param.spatial_scale,
-        param.position_sensitive,
-        param.aligned,
-        channels,
-        height,
-        width,
-        pooled_height,
-        pooled_width,
-        param.sample_ratio,
-        grad_in,
-        bottom_rois);
+        <<<ROI_GET_BLOCKS(count), kMaxThreadsPerBlock, 0, stream>>>(count,
+                                                                    top_diff,
+                                                                    num_rois,
+                                                                    param.spatial_scale,
+                                                                    param.position_sensitive,
+                                                                    param.aligned,
+                                                                    channels,
+                                                                    height,
+                                                                    width,
+                                                                    pooled_height,
+                                                                    pooled_width,
+                                                                    param.sample_ratio,
+                                                                    grad_in,
+                                                                    bottom_rois);
   })
 }
 
-
 NNVM_REGISTER_OP(_contrib_ROIAlign)
-.set_attr<FCompute>("FCompute<gpu>", ROIAlignForwardCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ROIAlignForwardCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_ROIAlign)
-.set_attr<FCompute>("FCompute<gpu>", ROIAlignBackwardCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ROIAlignBackwardCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/rroi_align-inl.h b/src/operator/contrib/rroi_align-inl.h
index 084ead78dbc7..a238f60daca7 100644
--- a/src/operator/contrib/rroi_align-inl.h
+++ b/src/operator/contrib/rroi_align-inl.h
@@ -22,7 +22,7 @@
  * \file rroi_align-inl.h
  * \brief rroi align operator and symbol
  * \author Yixin Bao
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_RROI_ALIGN_INL_H_
 #define MXNET_OPERATOR_CONTRIB_RROI_ALIGN_INL_H_
 
@@ -42,9 +42,9 @@ namespace op {
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace rroialign {
-enum RROIAlignOpInputs{kData, kBox};
-enum RROIAlignOpOutputs {kOut};
-}  // rroialign
+enum RROIAlignOpInputs { kData, kBox };
+enum RROIAlignOpOutputs { kOut };
+}  // namespace rroialign
 
 struct RROIAlignParam : public dmlc::Parameter<RROIAlignParam> {
   mxnet::TShape pooled_size;
@@ -52,13 +52,17 @@ struct RROIAlignParam : public dmlc::Parameter<RROIAlignParam> {
   int sampling_ratio;
   DMLC_DECLARE_PARAMETER(RROIAlignParam) {
     DMLC_DECLARE_FIELD(pooled_size)
-    .set_expect_ndim(2).enforce_nonzero()
-    .describe("RROI align output shape (h,w) ");
-    DMLC_DECLARE_FIELD(spatial_scale).set_range(0.0, 1.0)
-    .describe("Ratio of input feature map height (or width) to raw image height (or width). "
-    "Equals the reciprocal of total stride in convolutional layers");
-    DMLC_DECLARE_FIELD(sampling_ratio).set_default(-1)
-    .describe("Optional sampling ratio of RROI align, using adaptive size by default.");
+        .set_expect_ndim(2)
+        .enforce_nonzero()
+        .describe("RROI align output shape (h,w) ");
+    DMLC_DECLARE_FIELD(spatial_scale)
+        .set_range(0.0, 1.0)
+        .describe(
+            "Ratio of input feature map height (or width) to raw image height (or width). "
+            "Equals the reciprocal of total stride in convolutional layers");
+    DMLC_DECLARE_FIELD(sampling_ratio)
+        .set_default(-1)
+        .describe("Optional sampling ratio of RROI align, using adaptive size by default.");
   }
 };
 
diff --git a/src/operator/contrib/rroi_align.cc b/src/operator/contrib/rroi_align.cc
index 415eecf8eedf..e3e399e236fa 100644
--- a/src/operator/contrib/rroi_align.cc
+++ b/src/operator/contrib/rroi_align.cc
@@ -29,10 +29,10 @@
 #include <mshadow/tensor.h>
 #include <cmath>
 
+using std::ceil;
+using std::floor;
 using std::max;
 using std::min;
-using std::floor;
-using std::ceil;
 
 namespace mxnet {
 namespace op {
@@ -47,25 +47,36 @@ struct position_for_bilinear_interpolate {
 
 template <typename DType>
 void pre_calc_for_bilinear_interpolate(
-    const int height, const int width, const int pooled_height, const int pooled_width,
-    const int iy_upper, const int ix_upper, DType roi_start_h, DType roi_start_w,
-    DType bin_size_h, DType bin_size_w, int roi_bin_grid_h, int roi_bin_grid_w,
-    DType roi_center_h, DType roi_center_w, DType theta,
-    std::vector<position_for_bilinear_interpolate<DType>> *pre_calc) {
+    const int height,
+    const int width,
+    const int pooled_height,
+    const int pooled_width,
+    const int iy_upper,
+    const int ix_upper,
+    DType roi_start_h,
+    DType roi_start_w,
+    DType bin_size_h,
+    DType bin_size_w,
+    int roi_bin_grid_h,
+    int roi_bin_grid_w,
+    DType roi_center_h,
+    DType roi_center_w,
+    DType theta,
+    std::vector<position_for_bilinear_interpolate<DType>>* pre_calc) {
   int pre_calc_index = 0;
-  DType cosTheta = cos(theta);
-  DType sinTheta = sin(theta);
+  DType cosTheta     = cos(theta);
+  DType sinTheta     = sin(theta);
   for (int ph = 0; ph < pooled_height; ph++) {
     for (int pw = 0; pw < pooled_width; pw++) {
       // calc bin grid position (xx,yy)
       for (int iy = 0; iy < iy_upper; iy++) {
         const DType yy = roi_start_h + ph * bin_size_h +
-            static_cast<DType>(iy + .5f) * bin_size_h /
-                static_cast<DType>(roi_bin_grid_h);  // e.g., 0.5, 1.5
+                         static_cast<DType>(iy + .5f) * bin_size_h /
+                             static_cast<DType>(roi_bin_grid_h);  // e.g., 0.5, 1.5
         for (int ix = 0; ix < ix_upper; ix++) {
-          const DType xx = roi_start_w + pw * bin_size_w +
-              static_cast<DType>(ix + .5f) * bin_size_w /
-                  static_cast<DType>(roi_bin_grid_w);
+          const DType xx =
+              roi_start_w + pw * bin_size_w +
+              static_cast<DType>(ix + .5f) * bin_size_w / static_cast<DType>(roi_bin_grid_w);
 
           // Rotate by theta around the center and translate
           DType x = xx * cosTheta + yy * sinTheta + roi_center_w;
@@ -74,15 +85,15 @@ void pre_calc_for_bilinear_interpolate(
           // deal with: inverse elements are out of feature map boundary
           if (y < -1.0 || y > height || x < -1.0 || x > width) {
             // empty
-            position_for_bilinear_interpolate<DType> &pc = (*pre_calc)[pre_calc_index];
-            pc.pos1 = 0;
-            pc.pos2 = 0;
-            pc.pos3 = 0;
-            pc.pos4 = 0;
-            pc.w1 = 0;
-            pc.w2 = 0;
-            pc.w3 = 0;
-            pc.w4 = 0;
+            position_for_bilinear_interpolate<DType>& pc = (*pre_calc)[pre_calc_index];
+            pc.pos1                                      = 0;
+            pc.pos2                                      = 0;
+            pc.pos3                                      = 0;
+            pc.pos4                                      = 0;
+            pc.w1                                        = 0;
+            pc.w2                                        = 0;
+            pc.w3                                        = 0;
+            pc.w4                                        = 0;
             pre_calc_index += 1;
             continue;
           }
@@ -100,13 +111,13 @@ void pre_calc_for_bilinear_interpolate(
           int x_high;
           if (y_low >= height - 1) {
             y_high = y_low = height - 1;
-            y = (DType)y_low;
+            y              = (DType)y_low;
           } else {
             y_high = y_low + 1;
           }
           if (x_low >= width - 1) {
             x_high = x_low = width - 1;
-            x = (DType)x_low;
+            x              = (DType)x_low;
           } else {
             x_high = x_low + 1;
           }
@@ -116,15 +127,15 @@ void pre_calc_for_bilinear_interpolate(
           DType w1 = hy * hx, w2 = hy * lx, w3 = ly * hx, w4 = ly * lx;
 
           // Save weights and indices
-          position_for_bilinear_interpolate<DType> &pc = (*pre_calc)[pre_calc_index];
-          pc.pos1 = y_low * width + x_low;
-          pc.pos2 = y_low * width + x_high;
-          pc.pos3 = y_high * width + x_low;
-          pc.pos4 = y_high * width + x_high;
-          pc.w1 = w1;
-          pc.w2 = w2;
-          pc.w3 = w3;
-          pc.w4 = w4;
+          position_for_bilinear_interpolate<DType>& pc = (*pre_calc)[pre_calc_index];
+          pc.pos1                                      = y_low * width + x_low;
+          pc.pos2                                      = y_low * width + x_high;
+          pc.pos3                                      = y_high * width + x_low;
+          pc.pos4                                      = y_high * width + x_high;
+          pc.w1                                        = w1;
+          pc.w2                                        = w2;
+          pc.w3                                        = w3;
+          pc.w4                                        = w4;
           pre_calc_index += 1;
         }
       }
@@ -133,50 +144,52 @@ void pre_calc_for_bilinear_interpolate(
 }
 
 template <typename DType>
-inline void RROIAlignForward(const OpContext &ctx, const RROIAlignParam &param,
-                             const std::vector<TBlob> &in_data, const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &out_data) {
+inline void RROIAlignForward(const OpContext& ctx,
+                             const RROIAlignParam& param,
+                             const std::vector<TBlob>& in_data,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& out_data) {
   // data: [batch_size, c, h, w]
-  const TBlob &data = in_data[rroialign::kData];
-  const TBlob &bbox = in_data[rroialign::kBox];
-  const DType *bottom_data = data.dptr<DType>();
-  const int channels_ = data.size(1);
-  const int height_ = data.size(2);
-  const int width_ = data.size(3);
+  const TBlob& data         = in_data[rroialign::kData];
+  const TBlob& bbox         = in_data[rroialign::kBox];
+  const DType* bottom_data  = data.dptr<DType>();
+  const int channels_       = data.size(1);
+  const int height_         = data.size(2);
+  const int width_          = data.size(3);
   const index_t data_size_c = height_ * width_;
-  const index_t data_size = channels_ * data_size_c;
+  const index_t data_size   = channels_ * data_size_c;
 
   // bbox: [num_rois, 6] (6: [batch_index, x, y, w, h, theta])
-  const DType *bottom_rois = bbox.dptr<DType>();
-  const int num_rois = bbox.size(0);
+  const DType* bottom_rois   = bbox.dptr<DType>();
+  const int num_rois         = bbox.size(0);
   const float spatial_scale_ = param.spatial_scale;
-  const int sampling_ratio_ = param.sampling_ratio;
+  const int sampling_ratio_  = param.sampling_ratio;
 
   // out: [num_rois, c, pooled_h, pooled_w]
-  const TBlob &out = out_data[rroialign::kOut];
-  DType *top_data = out.dptr<DType>();
+  const TBlob& out         = out_data[rroialign::kOut];
+  DType* top_data          = out.dptr<DType>();
   const int pooled_height_ = out.size(2);
-  const int pooled_width_ = out.size(3);
+  const int pooled_width_  = out.size(3);
   const index_t out_size_c = pooled_height_ * pooled_width_;
-  const index_t out_size = channels_ * out_size_c;
+  const index_t out_size   = channels_ * out_size_c;
 
   // (n, c, ph, pw) is an element in the pooled output
   // can be parallelized using omp
 #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (int n = 0; n < num_rois; ++n) {
     // Increment ROI data pointer
-    const DType *bottom_rois_n = bottom_rois + n * bbox.size(1);
-    DType *top_data_n = top_data + n * out_size;
-    int roi_batch_ind = static_cast<int>(bottom_rois_n[0]);
-    DType roi_center_w = bottom_rois_n[1] * spatial_scale_;
-    DType roi_center_h = bottom_rois_n[2] * spatial_scale_;
-    DType roi_width = bottom_rois_n[3] * spatial_scale_;
-    DType roi_height = bottom_rois_n[4] * spatial_scale_;
-    DType roi_theta = bottom_rois_n[5] * M_PI / 180.0;
+    const DType* bottom_rois_n = bottom_rois + n * bbox.size(1);
+    DType* top_data_n          = top_data + n * out_size;
+    int roi_batch_ind          = static_cast<int>(bottom_rois_n[0]);
+    DType roi_center_w         = bottom_rois_n[1] * spatial_scale_;
+    DType roi_center_h         = bottom_rois_n[2] * spatial_scale_;
+    DType roi_width            = bottom_rois_n[3] * spatial_scale_;
+    DType roi_height           = bottom_rois_n[4] * spatial_scale_;
+    DType roi_theta            = bottom_rois_n[5] * M_PI / 180.0;
 
     // force malformed ROIs to be 1 * 1
-    roi_width = max(roi_width, (DType) 1.);
-    roi_height = max(roi_height, (DType) 1.);
+    roi_width  = max(roi_width, (DType)1.);
+    roi_height = max(roi_height, (DType)1.);
     // roi_start_h and roi_start_w are computed wrt the center of RoI (x, y).
     // Appropriate translation needs to be applied after.
     DType roi_start_h = -roi_height / 2.0;
@@ -196,14 +209,26 @@ inline void RROIAlignForward(const OpContext &ctx, const RROIAlignParam &param,
     std::vector<position_for_bilinear_interpolate<DType>> pre_calc(roi_bin_grid_h * roi_bin_grid_w *
                                                                    pooled_width_ * pooled_height_);
 
-    pre_calc_for_bilinear_interpolate(height_, width_, pooled_height_, pooled_width_,
-                                      roi_bin_grid_h, roi_bin_grid_w, roi_start_h, roi_start_w,
-                                      bin_size_h, bin_size_w, roi_bin_grid_h, roi_bin_grid_w,
-                                      roi_center_h, roi_center_w, roi_theta, &pre_calc);
+    pre_calc_for_bilinear_interpolate(height_,
+                                      width_,
+                                      pooled_height_,
+                                      pooled_width_,
+                                      roi_bin_grid_h,
+                                      roi_bin_grid_w,
+                                      roi_start_h,
+                                      roi_start_w,
+                                      bin_size_h,
+                                      bin_size_w,
+                                      roi_bin_grid_h,
+                                      roi_bin_grid_w,
+                                      roi_center_h,
+                                      roi_center_w,
+                                      roi_theta,
+                                      &pre_calc);
 
     for (int c = 0; c < channels_; ++c) {
-      const DType *offset_bottom_data = bottom_data + roi_batch_ind * data_size + c * data_size_c;
-      int pre_calc_index = 0;
+      const DType* offset_bottom_data = bottom_data + roi_batch_ind * data_size + c * data_size_c;
+      int pre_calc_index              = 0;
 
       for (int ph = 0; ph < pooled_height_; ph++) {
         for (int pw = 0; pw < pooled_width_; pw++) {
@@ -219,19 +244,20 @@ inline void RROIAlignForward(const OpContext &ctx, const RROIAlignParam &param,
             }
           }
           output_val /= bin_points_count;  // avg pooling for bin grid
-          int index = c * pooled_height_ * pooled_width_ + ph * pooled_width_ + pw;
+          int index         = c * pooled_height_ * pooled_width_ + ph * pooled_width_ + pw;
           top_data_n[index] = output_val;
-        }   // for pw
-      }   // for ph
-    }   // for c
-  }   // for n
+        }  // for pw
+      }    // for ph
+    }      // for c
+  }        // for n
 }
 
-template<typename xpu>
+template <typename xpu>
 void RROIAlignForwardCompute(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx, const std::vector<TBlob>& in_data,
-                      const std::vector<OpReqType>& req,
-                      const std::vector<TBlob>& out_data) {
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& in_data,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& out_data) {
   const RROIAlignParam& param = nnvm::get<RROIAlignParam>(attrs.parsed);
   CHECK_EQ(in_data.size(), 2);
   CHECK_EQ(out_data.size(), 1);
@@ -242,18 +268,19 @@ void RROIAlignForwardCompute(const nnvm::NodeAttrs& attrs,
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void RROIAlignBackwardCompute(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx, const std::vector<TBlob>& in_data,
-                      const std::vector<OpReqType>& req,
-                      const std::vector<TBlob>& out_data) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& in_data,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& out_data) {
   LOG(FATAL) << "RROIAlign: Backward is not supported.";
 }
 
 DMLC_REGISTER_PARAMETER(RROIAlignParam);
 
 NNVM_REGISTER_OP(_contrib_RROIAlign)
-.describe(R"code(Performs Rotated ROI Align on the input array.
+    .describe(R"code(Performs Rotated ROI Align on the input array.
 
 This operator takes a 4D feature map as an input array and region proposals as `rois`,
 then align the feature map over sub-regions of input and produces a fixed-sized output array.
@@ -272,55 +299,63 @@ Ma, Jianqi, et al. "Arbitrary-Oriented Scene Text Detection via Rotation Proposa
 IEEE Transactions on Multimedia, 2018.
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "rois"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr_parser(ParamParser<RROIAlignParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-      mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape){
-  using namespace mshadow;
-  const RROIAlignParam& param = nnvm::get<RROIAlignParam>(attrs.parsed);
-  CHECK_EQ(in_shape->size(), 2U) << "Input:[data, rois]";
-  // data: [batch_size, c, h, w]
-  mxnet::TShape dshape = in_shape->at(rroialign::kData);
-  CHECK_EQ(dshape.ndim(), 4U) << "data should be a 4D tensor";
-  // bbox: [num_rois, 6]
-  mxnet::TShape bshape = in_shape->at(rroialign::kBox);
-  CHECK_EQ(bshape.ndim(), 2U) << "bbox should be a 2D tensor of shape [batch, 6]";
-  CHECK_EQ(bshape[1], 6U) << "bbox should be a 2D tensor of shape [batch, 6]";
-  // out: [num_rois, c, pooled_h, pooled_w]
-  out_shape->clear();
-  out_shape->push_back(Shape4(bshape[0], dshape[1], param.pooled_size[0], param.pooled_size[1]));
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-      std::vector<int> *in_type, std::vector<int> *out_type) {
-  CHECK_EQ(in_type->size(), 2U);
-  int dtype = (*in_type)[0];
-  CHECK_EQ(dtype, (*in_type)[1]);
-  CHECK_NE(dtype, -1) << "Input must have specified type";
-
-  out_type->clear();
-  out_type->push_back(dtype);
-  return true;
-})
-.set_attr<FCompute>("FCompute<cpu>", RROIAlignForwardCompute<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the pooling operator, a 4D Feature maps")
-.add_argument("rois", "NDArray-or-Symbol", "Bounding box coordinates, a 2D array")
-.add_arguments(RROIAlignParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "rois"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr_parser(ParamParser<RROIAlignParam>)
+    .set_attr<mxnet::FInferShape>(
+        "FInferShape",
+        [](const nnvm::NodeAttrs& attrs,
+           mxnet::ShapeVector* in_shape,
+           mxnet::ShapeVector* out_shape) {
+          using namespace mshadow;
+          const RROIAlignParam& param = nnvm::get<RROIAlignParam>(attrs.parsed);
+          CHECK_EQ(in_shape->size(), 2U) << "Input:[data, rois]";
+          // data: [batch_size, c, h, w]
+          mxnet::TShape dshape = in_shape->at(rroialign::kData);
+          CHECK_EQ(dshape.ndim(), 4U) << "data should be a 4D tensor";
+          // bbox: [num_rois, 6]
+          mxnet::TShape bshape = in_shape->at(rroialign::kBox);
+          CHECK_EQ(bshape.ndim(), 2U) << "bbox should be a 2D tensor of shape [batch, 6]";
+          CHECK_EQ(bshape[1], 6U) << "bbox should be a 2D tensor of shape [batch, 6]";
+          // out: [num_rois, c, pooled_h, pooled_w]
+          out_shape->clear();
+          out_shape->push_back(
+              Shape4(bshape[0], dshape[1], param.pooled_size[0], param.pooled_size[1]));
+          return true;
+        })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_type,
+                                   std::vector<int>* out_type) {
+                                  CHECK_EQ(in_type->size(), 2U);
+                                  int dtype = (*in_type)[0];
+                                  CHECK_EQ(dtype, (*in_type)[1]);
+                                  CHECK_NE(dtype, -1) << "Input must have specified type";
+
+                                  out_type->clear();
+                                  out_type->push_back(dtype);
+                                  return true;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", RROIAlignForwardCompute<cpu>)
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "Input data to the pooling operator, a 4D Feature maps")
+    .add_argument("rois", "NDArray-or-Symbol", "Bounding box coordinates, a 2D array")
+    .add_arguments(RROIAlignParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_RROIAlign)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<RROIAlignParam>)
-.set_attr<FCompute>("FCompute<cpu>", RROIAlignBackwardCompute<cpu>);
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<RROIAlignParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RROIAlignBackwardCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/stes_op.cc b/src/operator/contrib/stes_op.cc
index ab65302ef3b0..656b5810cd98 100644
--- a/src/operator/contrib/stes_op.cc
+++ b/src/operator/contrib/stes_op.cc
@@ -1,39 +1,38 @@
 /*
-  * Licensed to the Apache Software Foundation (ASF) under one
-  * or more contributor license agreements.  See the NOTICE file
-  * distributed with this work for additional information
-  * regarding copyright ownership.  The ASF licenses this file
-  * to you under the Apache License, Version 2.0 (the
-  * "License"); you may not use this file except in compliance
-  * with the License.  You may obtain a copy of the License at
-  *
-  *   http://www.apache.org/licenses/LICENSE-2.0
-  *
-  * Unless required by applicable law or agreed to in writing,
-  * software distributed under the License is distributed on an
-  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-  * KIND, either express or implied.  See the License for the
-  * specific language governing permissions and limitations
-  * under the License.
-  */
-
-  /*!
-  *  Copyright (c) 2019 by Contributors
-  * \file stes_op.cc
-  * \Straight-through-estimators round and sign operators.
-  * \author Itay Golan
-  */
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+/*!
+ *  Copyright (c) 2019 by Contributors
+ * \file stes_op.cc
+ * \Straight-through-estimators round and sign operators.
+ * \author Itay Golan
+ */
 
 #include "stes_op.h"
 
-
 namespace mxnet {
 namespace op {
 
 // Round STE
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(_contrib_round_ste, cpu, mshadow_op::round)
-.add_alias("_npx_round_ste")
-.describe(R"code(Straight-through-estimator of `round()`.
+    .add_alias("_npx_round_ste")
+    .describe(R"code(Straight-through-estimator of `round()`.
 
 In forward pass, returns element-wise rounded value to the nearest integer of the input (same as `round()`).
 
@@ -54,12 +53,12 @@ The storage type of ``round_ste`` output depends upon the input storage type:
   - round_ste(row_sparse) = row_sparse
   - round_ste(csr) = csr
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", CloneGradient{"_backward_round_ste"});
+    .set_attr<nnvm::FGradient>("FGradient", CloneGradient{"_backward_round_ste"});
 
 // sign
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(_contrib_sign_ste, cpu, mshadow_op::sign)
-.add_alias("_npx_sign_ste")
-.describe(R"code(Straight-through-estimator of `sign()`.
+    .add_alias("_npx_sign_ste")
+    .describe(R"code(Straight-through-estimator of `sign()`.
 
 In forward pass, returns element-wise sign of the input (same as `sign()`).
 
@@ -80,7 +79,7 @@ The storage type of ``sign_ste`` output depends upon the input storage type:
   - round_ste(row_sparse) = row_sparse
   - round_ste(csr) = csr
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", CloneGradient{"_backward_sign_ste"});
+    .set_attr<nnvm::FGradient>("FGradient", CloneGradient{"_backward_sign_ste"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/stes_op.cu b/src/operator/contrib/stes_op.cu
index 5ce947900899..1bcb86269de8 100644
--- a/src/operator/contrib/stes_op.cu
+++ b/src/operator/contrib/stes_op.cu
@@ -1,28 +1,28 @@
 /*
-  * Licensed to the Apache Software Foundation (ASF) under one
-  * or more contributor license agreements.  See the NOTICE file
-  * distributed with this work for additional information
-  * regarding copyright ownership.  The ASF licenses this file
-  * to you under the Apache License, Version 2.0 (the
-  * "License"); you may not use this file except in compliance
-  * with the License.  You may obtain a copy of the License at
-  *
-  *   http://www.apache.org/licenses/LICENSE-2.0
-  *
-  * Unless required by applicable law or agreed to in writing,
-  * software distributed under the License is distributed on an
-  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-  * KIND, either express or implied.  See the License for the
-  * specific language governing permissions and limitations
-  * under the License.
-  */
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
-  /*!
-  *  Copyright (c) 2019 by Contributors
-  * \file stes_op.cu
-  * \Straight-through-estimators round and sign operators.
-  * \author Itay Golan
-  */
+/*!
+ *  Copyright (c) 2019 by Contributors
+ * \file stes_op.cu
+ * \Straight-through-estimators round and sign operators.
+ * \author Itay Golan
+ */
 
 #include "stes_op.h"
 
@@ -31,13 +31,13 @@ namespace op {
 
 // Round STE
 NNVM_REGISTER_OP(_contrib_round_ste)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"round"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"round"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"round"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"round"});
 
 // Sign STE
 NNVM_REGISTER_OP(_contrib_sign_ste)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sign"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sign"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sign"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sign"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/stes_op.h b/src/operator/contrib/stes_op.h
index 7185fbf1d6e1..335be762f168 100644
--- a/src/operator/contrib/stes_op.h
+++ b/src/operator/contrib/stes_op.h
@@ -1,28 +1,28 @@
 /*
-  * Licensed to the Apache Software Foundation (ASF) under one
-  * or more contributor license agreements.  See the NOTICE file
-  * distributed with this work for additional information
-  * regarding copyright ownership.  The ASF licenses this file
-  * to you under the Apache License, Version 2.0 (the
-  * "License"); you may not use this file except in compliance
-  * with the License.  You may obtain a copy of the License at
-  *
-  *   http://www.apache.org/licenses/LICENSE-2.0
-  *
-  * Unless required by applicable law or agreed to in writing,
-  * software distributed under the License is distributed on an
-  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-  * KIND, either express or implied.  See the License for the
-  * specific language governing permissions and limitations
-  * under the License.
-  */
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
-  /*!
-  *  Copyright (c) 2019 by Contributors
-  * \file stes_op.h
-  * \Straight-through-estimators round and sign operators.
-  * \author Itay Golan
-  */
+/*!
+ *  Copyright (c) 2019 by Contributors
+ * \file stes_op.h
+ * \Straight-through-estimators round and sign operators.
+ * \author Itay Golan
+ */
 
 #ifndef MXNET_OPERATOR_CONTRIB_STES_OP_H_
 #define MXNET_OPERATOR_CONTRIB_STES_OP_H_
diff --git a/src/operator/contrib/sync_batch_norm-inl.h b/src/operator/contrib/sync_batch_norm-inl.h
index f9b00ffef48f..fe96c4f0fb6e 100644
--- a/src/operator/contrib/sync_batch_norm-inl.h
+++ b/src/operator/contrib/sync_batch_norm-inl.h
@@ -21,7 +21,7 @@
  * \file sync_batch_norm-inl.h
  * \brief Synchronized BatchNorm modified from BatchNormV1
  * \author Hang Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_CONTRIB_SYNC_BATCH_NORM_INL_H_
 #define MXNET_OPERATOR_CONTRIB_SYNC_BATCH_NORM_INL_H_
 
@@ -40,10 +40,10 @@ namespace mxnet {
 namespace op {
 
 namespace syncbatchnorm {
-enum BatchNormOpInputs {kData, kGamma, kBeta};
-enum BatchNormOpOutputs {kOut, kMean, kVar};
-enum BatchNormOpAuxiliary {kMovingMean, kMovingVar};
-enum BatchNormBackResource {kTempSpace};
+enum BatchNormOpInputs { kData, kGamma, kBeta };
+enum BatchNormOpOutputs { kOut, kMean, kVar };
+enum BatchNormOpAuxiliary { kMovingMean, kMovingVar };
+enum BatchNormBackResource { kTempSpace };
 }  // namespace syncbatchnorm
 
 struct SyncBatchNormParam : public dmlc::Parameter<SyncBatchNormParam> {
@@ -55,48 +55,48 @@ struct SyncBatchNormParam : public dmlc::Parameter<SyncBatchNormParam> {
   int ndev;
   std::string key;
   DMLC_DECLARE_PARAMETER(SyncBatchNormParam) {
-    DMLC_DECLARE_FIELD(eps).set_default(1e-3f)
-    .describe("Epsilon to prevent div 0");
-    DMLC_DECLARE_FIELD(momentum).set_default(0.9f)
-    .describe("Momentum for moving average");
-    DMLC_DECLARE_FIELD(fix_gamma).set_default(true)
-    .describe("Fix gamma while training");
-    DMLC_DECLARE_FIELD(use_global_stats).set_default(false)
-    .describe("Whether use global moving statistics instead of local batch-norm. "
-              "This will force change batch-norm into a scale shift operator.");
-    DMLC_DECLARE_FIELD(output_mean_var).set_default(false)
-    .describe("Output All,normal mean and var");
-    DMLC_DECLARE_FIELD(ndev).set_default(1)
-      .describe("The count of GPU devices");
-    DMLC_DECLARE_FIELD(key)
-      .describe("Hash key for synchronization, please set the same hash key for same layer, "
-                "Block.prefix is typically used as in :class:`gluon.nn.contrib.SyncBatchNorm`.");
+    DMLC_DECLARE_FIELD(eps).set_default(1e-3f).describe("Epsilon to prevent div 0");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.9f).describe("Momentum for moving average");
+    DMLC_DECLARE_FIELD(fix_gamma).set_default(true).describe("Fix gamma while training");
+    DMLC_DECLARE_FIELD(use_global_stats)
+        .set_default(false)
+        .describe(
+            "Whether use global moving statistics instead of local batch-norm. "
+            "This will force change batch-norm into a scale shift operator.");
+    DMLC_DECLARE_FIELD(output_mean_var)
+        .set_default(false)
+        .describe("Output All,normal mean and var");
+    DMLC_DECLARE_FIELD(ndev).set_default(1).describe("The count of GPU devices");
+    DMLC_DECLARE_FIELD(key).describe(
+        "Hash key for synchronization, please set the same hash key for same layer, "
+        "Block.prefix is typically used as in :class:`gluon.nn.contrib.SyncBatchNorm`.");
   }
 };
 
 // Modified from https://github.com/brucechin/SharedTensor
-template<class T>
+template <class T>
 class SharedND {
  private:
   int num_devices_;
   T mean_;
-  T *data_;
-  bool *flag_;
-  bool mean_ready_ = false;
+  T* data_;
+  bool* flag_;
+  bool mean_ready_  = false;
   bool data_inited_ = false;
   std::mutex mutex_;
 
  public:
-  explicit SharedND(int ndev) :num_devices_(ndev) {
+  explicit SharedND(int ndev) : num_devices_(ndev) {
     flag_ = new bool[ndev];
     data_ = new T[ndev];
     memset(flag_, false, ndev * sizeof(bool));
   }
 
   ~SharedND() {
-    if (data_inited_) mshadow::FreeSpace(&mean_);
-    delete [] flag_;
-    delete [] data_;
+    if (data_inited_)
+      mshadow::FreeSpace(&mean_);
+    delete[] flag_;
+    delete[] data_;
   }
 
   void Init(mshadow::Shape<1> shape) {
@@ -105,7 +105,7 @@ class SharedND {
       for (int i = 0; i < num_devices_; i++) {
         data_[i] = mshadow::NewTensor<cpu, real_t>(shape, 0.0f);
       }
-      mean_ = mshadow::NewTensor<cpu, real_t>(shape, 0.0f);
+      mean_        = mshadow::NewTensor<cpu, real_t>(shape, 0.0f);
       data_inited_ = true;
     }
   }
@@ -135,9 +135,10 @@ class SharedND {
   T Pop(int index) {
     // Pop the mean value after suming up
     std::lock_guard<std::mutex> lock(mutex_);
-    while (!MeanReady()) {}
+    while (!MeanReady()) {
+    }
     flag_[index] = false;
-    T tmp = mean_;
+    T tmp        = mean_;
     ResetMean();
     return tmp;
   }
@@ -154,62 +155,66 @@ class SharedND {
     for (int i = 1; i < num_devices_; i++) {
       data_[0] += data_[i];
     }
-    mean_ = data_[0] * 1.0f /  num_devices_;
+    mean_       = data_[0] * 1.0f / num_devices_;
     mean_ready_ = true;
     return true;
   }
 
   void ResetMean() {
     for (int i = 0; i < num_devices_; i++) {
-      if (flag_[i]) return;
+      if (flag_[i])
+        return;
     }
     mean_ready_ = false;
   }
 };
 
-template<class T>
+template <class T>
 class GlobalShared {
  public:
-  T* Register(const std::string &key, int ndev) {
+  T* Register(const std::string& key, int ndev) {
     std::lock_guard<std::mutex> lock(mutex_);
     auto it = registry_.find(key);
-    if (it != registry_.end()) return it->second;
-    T *newT = new T(ndev);
+    if (it != registry_.end())
+      return it->second;
+    T* newT        = new T(ndev);
     registry_[key] = newT;
     return newT;
   }
   ~GlobalShared() {
     for (auto it = registry_.begin(); it != registry_.end(); it++) {
-      T *ptr = it->second;
+      T* ptr = it->second;
       delete ptr;
     }
   }
+
  private:
   std::mutex mutex_;
   std::map<std::string, T*> registry_;
 };
 
-template<class T>
+template <class T>
 class GlobalSharedRank {
  public:
-  T Register(const std::string &key, int ndev) {
+  T Register(const std::string& key, int ndev) {
     std::lock_guard<std::mutex> lock(mutex_);
     auto it = registry_.find(key);
     if (it != registry_.end()) {
       T* tmpT = it->second;
-      *tmpT = (*tmpT == ndev - 1) ? 0 : *tmpT + 1;
+      *tmpT   = (*tmpT == ndev - 1) ? 0 : *tmpT + 1;
       return *tmpT;
     }
-    T *newT = new T(0);
+    T* newT        = new T(0);
     registry_[key] = newT;
     return *newT;
   }
   ~GlobalSharedRank() {
     for (auto it = registry_.begin(); it != registry_.end(); it++) {
-      T *ptr = it->second;
+      T* ptr = it->second;
       delete ptr;
     }
   }
+
  private:
   std::mutex mutex_;
   std::map<std::string, T*> registry_;
@@ -221,8 +226,9 @@ class Barrier {
   std::condition_variable cv_;
   std::size_t count_;
   std::size_t total_count_;
+
  public:
-  explicit Barrier(std::size_t count) : count_{count}, total_count_{count} { }
+  explicit Barrier(std::size_t count) : count_{count}, total_count_{count} {}
   void Wait() {
     std::unique_lock<std::mutex> lock{mutex_};
     if (--count_ == 0) {
@@ -244,18 +250,18 @@ static GlobalShared<SharedND<mshadow::Tensor<cpu, 1, real_t>>> global_shared_var
 static GlobalShared<SharedND<mshadow::Tensor<cpu, 1, real_t>>> global_shared_grad;
 static GlobalShared<SharedND<mshadow::Tensor<cpu, 1, real_t>>> global_shared_prod;
 
-template<typename xpu>
+template <typename xpu>
 class SyncBatchNorm : public Operator {
  public:
   explicit SyncBatchNorm(SyncBatchNormParam param) {
     this->param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_states) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 3U);
@@ -269,83 +275,88 @@ class SyncBatchNorm : public Operator {
       CHECK_EQ(req[syncbatchnorm::kOut], kWriteTo);
     }
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s     = ctx.get_stream<xpu>();
     const real_t scale = static_cast<real_t>(in_data[syncbatchnorm::kData].shape_[1]) /
-      static_cast<real_t>(in_data[syncbatchnorm::kData].shape_.Size());
+                         static_cast<real_t>(in_data[syncbatchnorm::kData].shape_.Size());
     Tensor<xpu, 4> data;
     Tensor<xpu, 4> out;
     if (in_data[syncbatchnorm::kData].ndim() == 4) {
       data = in_data[syncbatchnorm::kData].get<xpu, 4, real_t>(s);
-      out = out_data[syncbatchnorm::kOut].get<xpu, 4, real_t>(s);
+      out  = out_data[syncbatchnorm::kOut].get<xpu, 4, real_t>(s);
     } else {
-      index_t num_channels = in_data[syncbatchnorm::kData].ndim() > 1 ?
-        in_data[syncbatchnorm::kData].shape_[1] : 1;
-      index_t spatial_size = in_data[syncbatchnorm::kData].shape_.ProdShape(2,
-          in_data[syncbatchnorm::kData].ndim());
-      Shape<4> dshape = Shape4(in_data[syncbatchnorm::kData].shape_[0],
-                               num_channels, 1, spatial_size);
+      index_t num_channels =
+          in_data[syncbatchnorm::kData].ndim() > 1 ? in_data[syncbatchnorm::kData].shape_[1] : 1;
+      index_t spatial_size =
+          in_data[syncbatchnorm::kData].shape_.ProdShape(2, in_data[syncbatchnorm::kData].ndim());
+      Shape<4> dshape =
+          Shape4(in_data[syncbatchnorm::kData].shape_[0], num_channels, 1, spatial_size);
       data = in_data[syncbatchnorm::kData].get_with_shape<xpu, 4, real_t>(dshape, s);
-      out = out_data[syncbatchnorm::kOut].get_with_shape<xpu, 4, real_t>(dshape, s);
+      out  = out_data[syncbatchnorm::kOut].get_with_shape<xpu, 4, real_t>(dshape, s);
     }
-    Tensor<xpu, 1> slope = in_data[syncbatchnorm::kGamma].get<xpu, 1, real_t>(s);
-    Tensor<xpu, 1> bias = in_data[syncbatchnorm::kBeta].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> slope       = in_data[syncbatchnorm::kGamma].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> bias        = in_data[syncbatchnorm::kBeta].get<xpu, 1, real_t>(s);
     Tensor<xpu, 1> moving_mean = aux_states[syncbatchnorm::kMovingMean].get<xpu, 1, real_t>(s);
-    Tensor<xpu, 1> moving_var = aux_states[syncbatchnorm::kMovingVar].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> moving_var  = aux_states[syncbatchnorm::kMovingVar].get<xpu, 1, real_t>(s);
 
-    if (param_.fix_gamma) slope = 1.f;
+    if (param_.fix_gamma)
+      slope = 1.f;
 
     // whether use global statistics
     if (ctx.is_train && !param_.use_global_stats) {
       // get my rank
-      Barrier *global_barrier = global_shared_barrier_forward.Register(param_.key, param_.ndev);
-      int myRank = global_shared_rank_forward.Register(param_.key, param_.ndev);
+      Barrier* global_barrier = global_shared_barrier_forward.Register(param_.key, param_.ndev);
+      int myRank              = global_shared_rank_forward.Register(param_.key, param_.ndev);
       // get the mean and var
       Tensor<xpu, 1> mean = out_data[syncbatchnorm::kMean].get<xpu, 1, real_t>(s);
-      Tensor<xpu, 1> var = out_data[syncbatchnorm::kVar].get<xpu, 1, real_t>(s);
+      Tensor<xpu, 1> var  = out_data[syncbatchnorm::kVar].get<xpu, 1, real_t>(s);
       CHECK(req[syncbatchnorm::kMean] == kNullOp || req[syncbatchnorm::kMean] == kWriteTo);
       CHECK(req[syncbatchnorm::kVar] == kNullOp || req[syncbatchnorm::kVar] == kWriteTo);
       // E(x) and E(x^2)
       mean = scale * sumall_except_dim<1>(data);
-      var = scale * sumall_except_dim<1>(F<mshadow_op::square>(data));
-      SharedND<mshadow::Tensor<cpu, 1, real_t>> *sharedMean =
-        global_shared_mean.Register(param_.key, param_.ndev);
-      SharedND<mshadow::Tensor<cpu, 1, real_t>> *sharedVar =
-        global_shared_var.Register(param_.key, param_.ndev);
+      var  = scale * sumall_except_dim<1>(F<mshadow_op::square>(data));
+      SharedND<mshadow::Tensor<cpu, 1, real_t>>* sharedMean =
+          global_shared_mean.Register(param_.key, param_.ndev);
+      SharedND<mshadow::Tensor<cpu, 1, real_t>>* sharedVar =
+          global_shared_var.Register(param_.key, param_.ndev);
       // copy to cpu, push and pull
       Tensor<cpu, 1, real_t>* mean_cpu_ptr = sharedMean->Retrieve(mean.shape_, myRank);
-      Tensor<cpu, 1, real_t>* var_cpu_ptr = sharedVar->Retrieve(mean.shape_, myRank);
+      Tensor<cpu, 1, real_t>* var_cpu_ptr  = sharedVar->Retrieve(mean.shape_, myRank);
       mshadow::Copy(*mean_cpu_ptr, mean, s);
       mshadow::Copy(*var_cpu_ptr, var, s);
       sharedMean->SetReady(myRank);
       sharedVar->SetReady(myRank);
       global_barrier->Wait();
       Tensor<cpu, 1, real_t> mean_cpu = sharedMean->Pop(myRank);
-      Tensor<cpu, 1, real_t> var_cpu = sharedVar->Pop(myRank);
+      Tensor<cpu, 1, real_t> var_cpu  = sharedVar->Pop(myRank);
       // copy back to gpu
       mshadow::Copy(mean, mean_cpu, s);
       mshadow::Copy(var, var_cpu, s);
 
-      var = var-F<mshadow_op::square>(mean);
-      Assign(out, req[syncbatchnorm::kOut], broadcast<1>(slope, out.shape_) *
-             (data - broadcast<1>(mean, data.shape_)) /
-             F<mshadow_op::square_root>(broadcast<1>(var + param_.eps, data.shape_)) +
-             broadcast<1>(bias, out.shape_));
+      var = var - F<mshadow_op::square>(mean);
+      Assign(out,
+             req[syncbatchnorm::kOut],
+             broadcast<1>(slope, out.shape_) * (data - broadcast<1>(mean, data.shape_)) /
+                     F<mshadow_op::square_root>(broadcast<1>(var + param_.eps, data.shape_)) +
+                 broadcast<1>(bias, out.shape_));
     } else {
-      Assign(out, req[syncbatchnorm::kOut], broadcast<1>(slope /
-                                          F<mshadow_op::square_root>(moving_var + param_.eps),
-                                          data.shape_) * data +
-             broadcast<1>(bias - (slope * moving_mean) /
-                          F<mshadow_op::square_root>(moving_var + param_.eps), data.shape_));
+      Assign(
+          out,
+          req[syncbatchnorm::kOut],
+          broadcast<1>(slope / F<mshadow_op::square_root>(moving_var + param_.eps), data.shape_) *
+                  data +
+              broadcast<1>(bias - (slope * moving_mean) /
+                                      F<mshadow_op::square_root>(moving_var + param_.eps),
+                           data.shape_));
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), param_.output_mean_var ? 3U : 1U);
@@ -353,59 +364,60 @@ class SyncBatchNorm : public Operator {
     CHECK_EQ(out_data.size(), 3U);
     CHECK_EQ(in_grad.size(), 3U);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     Tensor<xpu, 4> data, grad, grad_in;
     const real_t scale = static_cast<real_t>(out_grad[syncbatchnorm::kOut].shape_[1]) /
-      static_cast<real_t>(out_grad[syncbatchnorm::kOut].shape_.Size());
+                         static_cast<real_t>(out_grad[syncbatchnorm::kOut].shape_.Size());
     if (in_data[syncbatchnorm::kData].ndim() == 4) {
-      data = in_data[syncbatchnorm::kData].get<xpu, 4, real_t>(s);
-      grad = out_grad[syncbatchnorm::kOut].get<xpu, 4, real_t>(s);
+      data    = in_data[syncbatchnorm::kData].get<xpu, 4, real_t>(s);
+      grad    = out_grad[syncbatchnorm::kOut].get<xpu, 4, real_t>(s);
       grad_in = in_grad[syncbatchnorm::kData].get<xpu, 4, real_t>(s);
     } else {
-      index_t num_channels = out_grad[syncbatchnorm::kOut].ndim() > 1 ?
-        out_grad[syncbatchnorm::kOut].shape_[1] : 1;
-      index_t spatial_size = out_grad[syncbatchnorm::kOut].shape_.ProdShape(2,
-          out_grad[syncbatchnorm::kOut].ndim());
-      Shape<4> dshape = Shape4(out_grad[syncbatchnorm::kOut].shape_[0],
-                               num_channels, 1, spatial_size);
-      data = in_data[syncbatchnorm::kData].get_with_shape<xpu, 4, real_t>(dshape, s);
-      grad = out_grad[syncbatchnorm::kOut].get_with_shape<xpu, 4, real_t>(dshape, s);
+      index_t num_channels =
+          out_grad[syncbatchnorm::kOut].ndim() > 1 ? out_grad[syncbatchnorm::kOut].shape_[1] : 1;
+      index_t spatial_size =
+          out_grad[syncbatchnorm::kOut].shape_.ProdShape(2, out_grad[syncbatchnorm::kOut].ndim());
+      Shape<4> dshape =
+          Shape4(out_grad[syncbatchnorm::kOut].shape_[0], num_channels, 1, spatial_size);
+      data    = in_data[syncbatchnorm::kData].get_with_shape<xpu, 4, real_t>(dshape, s);
+      grad    = out_grad[syncbatchnorm::kOut].get_with_shape<xpu, 4, real_t>(dshape, s);
       grad_in = in_grad[syncbatchnorm::kData].get_with_shape<xpu, 4, real_t>(dshape, s);
     }
 
-    Tensor<xpu, 1> mean = out_data[syncbatchnorm::kMean].get<xpu, 1, real_t>(s);
-    Tensor<xpu, 1> var = out_data[syncbatchnorm::kVar].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> mean  = out_data[syncbatchnorm::kMean].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> var   = out_data[syncbatchnorm::kVar].get<xpu, 1, real_t>(s);
     Tensor<xpu, 1> slope = in_data[syncbatchnorm::kGamma].get<xpu, 1, real_t>(s);
     // Tensor<xpu, 1> bias = in_data[kBeta].get<xpu, 1, real_t>(s);
     Tensor<xpu, 1> gslope = in_grad[syncbatchnorm::kGamma].get<xpu, 1, real_t>(s);
-    Tensor<xpu, 1> gbias = in_grad[syncbatchnorm::kBeta].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> gbias  = in_grad[syncbatchnorm::kBeta].get<xpu, 1, real_t>(s);
     // update moving avg
     Tensor<xpu, 1> moving_mean = aux_states[syncbatchnorm::kMovingMean].get<xpu, 1, real_t>(s);
-    Tensor<xpu, 1> moving_var = aux_states[syncbatchnorm::kMovingVar].get<xpu, 1, real_t>(s);
+    Tensor<xpu, 1> moving_var  = aux_states[syncbatchnorm::kMovingVar].get<xpu, 1, real_t>(s);
 
-    if (param_.fix_gamma) slope = 1.f;
+    if (param_.fix_gamma)
+      slope = 1.f;
 
     if (ctx.is_train && !param_.use_global_stats) {
       // get my rank
-      Barrier *global_barrier = global_shared_barrier_backward.Register(param_.key, param_.ndev);
-      int myRank = global_shared_rank_backward.Register(param_.key, param_.ndev);
+      Barrier* global_barrier = global_shared_barrier_backward.Register(param_.key, param_.ndev);
+      int myRank              = global_shared_rank_backward.Register(param_.key, param_.ndev);
       // get requested temp space
       Tensor<xpu, 2> workspace = ctx.requested[syncbatchnorm::kTempSpace].get_space<xpu>(
           mshadow::Shape2(5, mean.shape_[0]), s);
       Tensor<xpu, 1> gmean = workspace[0];
-      Tensor<xpu, 1> gvar = workspace[1];
+      Tensor<xpu, 1> gvar  = workspace[1];
 
       moving_mean = moving_mean * param_.momentum + mean * (1 - param_.momentum);
-      moving_var = moving_var * param_.momentum + var * (1 - param_.momentum);
+      moving_var  = moving_var * param_.momentum + var * (1 - param_.momentum);
       // cal
       Tensor<xpu, 1> sumGrad = workspace[3];
       Tensor<xpu, 1> sumProd = workspace[4];
-      sumGrad = sumall_except_dim<1>(grad);
+      sumGrad                = sumall_except_dim<1>(grad);
       sumProd = sumall_except_dim<1>(grad * (data - broadcast<1>(mean, data.shape_)));
-      SharedND<mshadow::Tensor<cpu, 1, real_t>> *sharedGrad =
-        global_shared_grad.Register(param_.key, param_.ndev);
-      SharedND<mshadow::Tensor<cpu, 1, real_t>> *sharedProd =
-        global_shared_prod.Register(param_.key, param_.ndev);
+      SharedND<mshadow::Tensor<cpu, 1, real_t>>* sharedGrad =
+          global_shared_grad.Register(param_.key, param_.ndev);
+      SharedND<mshadow::Tensor<cpu, 1, real_t>>* sharedProd =
+          global_shared_prod.Register(param_.key, param_.ndev);
       // copy to cpu, push and pull
       Tensor<cpu, 1, real_t>* grad_cpu_ptr = sharedGrad->Retrieve(sumGrad.shape_, myRank);
       Tensor<cpu, 1, real_t>* prod_cpu_ptr = sharedProd->Retrieve(sumGrad.shape_, myRank);
@@ -420,40 +432,44 @@ class SyncBatchNorm : public Operator {
       mshadow::Copy(sumGrad, grad_cpu, s);
       mshadow::Copy(sumProd, prod_cpu, s);
 
-      gvar = -1.0f * sumProd * slope *
-        F<mshadow_op::power>(var + param_.eps, -1.5f);
-      gmean =  sumGrad * slope;
+      gvar  = -1.0f * sumProd * slope * F<mshadow_op::power>(var + param_.eps, -1.5f);
+      gmean = sumGrad * slope;
       gmean *= -1.0f / F<mshadow_op::square_root>(var + param_.eps);
       // assign
       if (!param_.fix_gamma) {
-        Assign(gslope, req[syncbatchnorm::kGamma],
+        Assign(gslope,
+               req[syncbatchnorm::kGamma],
                sumall_except_dim<1>(
                    grad * (data - broadcast<1>(mean, data.shape_)) /
                    F<mshadow_op::square_root>(broadcast<1>(var + param_.eps, data.shape_))));
       } else {
         Assign(gslope, req[syncbatchnorm::kGamma], 0.0f);
       }
-      Assign(grad_in, req[syncbatchnorm::kData],
-             (grad * broadcast<1>(slope, data.shape_)) *
-               broadcast<1>(1.0f / F<mshadow_op::square_root>(var + param_.eps), data.shape_) +
-             broadcast<1>(gvar, data.shape_) *
-               scale * (data - broadcast<1>(mean, data.shape_)) +
-             broadcast<1>(gmean, data.shape_) * scale);
+      Assign(
+          grad_in,
+          req[syncbatchnorm::kData],
+          (grad * broadcast<1>(slope, data.shape_)) *
+                  broadcast<1>(1.0f / F<mshadow_op::square_root>(var + param_.eps), data.shape_) +
+              broadcast<1>(gvar, data.shape_) * scale * (data - broadcast<1>(mean, data.shape_)) +
+              broadcast<1>(gmean, data.shape_) * scale);
       Assign(gbias, req[syncbatchnorm::kBeta], sumall_except_dim<1>(grad));
     } else {
       // use global statistics with freeze moving mean and var.
       if (!param_.fix_gamma) {
-        Assign(gslope, req[syncbatchnorm::kGamma],
+        Assign(gslope,
+               req[syncbatchnorm::kGamma],
                sumall_except_dim<1>(
-                 grad * (data - broadcast<1>(moving_mean, data.shape_)) /
-                 F<mshadow_op::square_root>(broadcast<1>(moving_var + param_.eps, data.shape_))));
+                   grad * (data - broadcast<1>(moving_mean, data.shape_)) /
+                   F<mshadow_op::square_root>(broadcast<1>(moving_var + param_.eps, data.shape_))));
       } else {
         Assign(gslope, req[syncbatchnorm::kGamma], 0.0f);
       }
       Assign(gbias, req[syncbatchnorm::kBeta], sumall_except_dim<1>(grad));
-      Assign(grad_in, req[syncbatchnorm::kData], (grad * broadcast<1>(slope, data.shape_)) *
-             broadcast<1>(
-               1.0f / F<mshadow_op::square_root>(moving_var + param_.eps), data.shape_));
+      Assign(grad_in,
+             req[syncbatchnorm::kData],
+             (grad * broadcast<1>(slope, data.shape_)) *
+                 broadcast<1>(1.0f / F<mshadow_op::square_root>(moving_var + param_.eps),
+                              data.shape_));
     }
   }
 
@@ -461,14 +477,13 @@ class SyncBatchNorm : public Operator {
   SyncBatchNormParam param_;
 };  // class SyncBatchNorm
 
-template<typename xpu>
-Operator *CreateOp(SyncBatchNormParam param, int dtype);
-
+template <typename xpu>
+Operator* CreateOp(SyncBatchNormParam param, int dtype);
 
 #if DMLC_USE_CXX11
 class SyncBatchNormProp : public OperatorProperty {
  public:
-  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
+  void Init(const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     param_.Init(kwargs);
   }
 
@@ -476,13 +491,14 @@ class SyncBatchNormProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 3U) << "Input:[data, gamma, beta]";
-    const mxnet::TShape &dshape = in_shape->at(0);
-    if (mxnet::op::shape_is_none(dshape)) return false;
+    const mxnet::TShape& dshape = in_shape->at(0);
+    if (mxnet::op::shape_is_none(dshape))
+      return false;
     in_shape->at(1) = mxnet::TShape(Shape1(dshape[1]));
     in_shape->at(2) = mxnet::TShape(Shape1(dshape[1]));
     out_shape->clear();
@@ -496,9 +512,9 @@ class SyncBatchNormProp : public OperatorProperty {
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     using namespace mshadow;
     CHECK_GE(in_type->size(), 1U);
     int dtype = (*in_type)[0];
@@ -521,16 +537,18 @@ class SyncBatchNormProp : public OperatorProperty {
     }
     int n_aux = this->ListAuxiliaryStates().size();
     aux_type->clear();
-    for (int i = 0; i < n_aux; ++i ) aux_type->push_back(dtype_param);
+    for (int i = 0; i < n_aux; ++i)
+      aux_type->push_back(dtype_param);
     int n_out = this->ListOutputs().size();
     out_type->clear();
     out_type->push_back(dtype);
-    for (int i = 1; i < n_out; ++i ) out_type->push_back(dtype_param);
+    for (int i = 1; i < n_out; ++i)
+      out_type->push_back(dtype_param);
     return true;
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SyncBatchNormProp();
+    auto ptr    = new SyncBatchNormProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -539,20 +557,17 @@ class SyncBatchNormProp : public OperatorProperty {
     return "_contrib_SyncBatchNorm";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[syncbatchnorm::kOut],
             out_data[syncbatchnorm::kMean],
             out_data[syncbatchnorm::kVar],
             in_data[syncbatchnorm::kData],
-            in_data[syncbatchnorm::kGamma]
-           };
+            in_data[syncbatchnorm::kGamma]};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
@@ -580,12 +595,13 @@ class SyncBatchNormProp : public OperatorProperty {
   }
 
   Operator* CreateOperator(Context ctx) const override {
-      LOG(FATAL) << "Not Implemented.";
-      return nullptr;
+    LOG(FATAL) << "Not Implemented.";
+    return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-      std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
   inline const SyncBatchNormParam& getParam() const {
     return param_;
diff --git a/src/operator/contrib/sync_batch_norm.cc b/src/operator/contrib/sync_batch_norm.cc
index e532e939f150..2797171d6dbf 100644
--- a/src/operator/contrib/sync_batch_norm.cc
+++ b/src/operator/contrib/sync_batch_norm.cc
@@ -21,32 +21,33 @@
  * \file sync_batch_norm.cc
  * \brief Synchronized BatchNorm modified from BatchNormV1
  * \author Hang Zhang
-*/
+ */
 
 #include "sync_batch_norm-inl.h"
 #include <nnvm/op_attr_types.h>
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(SyncBatchNormParam param, int dtype) {
+template <>
+Operator* CreateOp<cpu>(SyncBatchNormParam param, int dtype) {
   return new SyncBatchNorm<cpu>(param);
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *SyncBatchNormProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-    std::vector<int> *in_type) const {
-    mxnet::ShapeVector out_shape, aux_shape;
-    std::vector<int> out_type, aux_type;
-    CHECK(InferType(in_type, &out_type, &aux_type));
-    CHECK(InferShape(in_shape, &out_shape, &aux_shape));
-    DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
+Operator* SyncBatchNormProp::CreateOperatorEx(Context ctx,
+                                              mxnet::ShapeVector* in_shape,
+                                              std::vector<int>* in_type) const {
+  mxnet::ShapeVector out_shape, aux_shape;
+  std::vector<int> out_type, aux_type;
+  CHECK(InferType(in_type, &out_type, &aux_type));
+  CHECK(InferShape(in_shape, &out_shape, &aux_shape));
+  DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(SyncBatchNormParam);
 
 MXNET_REGISTER_OP_PROPERTY(_contrib_SyncBatchNorm, SyncBatchNormProp)
-.describe(R"code(Batch normalization.
+    .describe(R"code(Batch normalization.
 
 Normalizes a data batch by mean and variance, and applies a scale ``gamma`` as
 well as offset ``beta``.
@@ -95,24 +96,26 @@ then set ``gamma`` to 1 and its gradient to 0.
   .. [2] Hang Zhang, Kristin Dana, Jianping Shi, Zhongyue Zhang, Xiaogang Wang, \
     Ambrish Tyagi, and Amit Agrawal. "Context Encoding for Semantic Segmentation." *CVPR 2018*
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input data to batch normalization")
-.add_argument("gamma", "NDArray-or-Symbol", "gamma array")
-.add_argument("beta", "NDArray-or-Symbol", "beta array")
-.add_argument("moving_mean", "NDArray-or-Symbol", "running mean of input")
-.add_argument("moving_var", "NDArray-or-Symbol", "running variance of input")
-.add_arguments(SyncBatchNormParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input data to batch normalization")
+    .add_argument("gamma", "NDArray-or-Symbol", "gamma array")
+    .add_argument("beta", "NDArray-or-Symbol", "beta array")
+    .add_argument("moving_mean", "NDArray-or-Symbol", "running mean of input")
+    .add_argument("moving_var", "NDArray-or-Symbol", "running variance of input")
+    .add_arguments(SyncBatchNormParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_SyncBatchNorm)
-.add_alias("_npx_sync_batch_norm")
-.set_attr<nnvm::FSetInputVarAttrOnCompose>("FSetInputVarAttrOnCompose",
-    [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
-      if (var->attrs.dict.find("__init__") != var->attrs.dict.end()) return;
-      if (index == 3) {
-        var->attrs.dict["__init__"] = "[\"zero\", {}]";
-      } else if (index == 4) {
-        var->attrs.dict["__init__"] = "[\"one\", {}]";
-      }
-    });
+    .add_alias("_npx_sync_batch_norm")
+    .set_attr<nnvm::FSetInputVarAttrOnCompose>(
+        "FSetInputVarAttrOnCompose",
+        [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
+          if (var->attrs.dict.find("__init__") != var->attrs.dict.end())
+            return;
+          if (index == 3) {
+            var->attrs.dict["__init__"] = "[\"zero\", {}]";
+          } else if (index == 4) {
+            var->attrs.dict["__init__"] = "[\"one\", {}]";
+          }
+        });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/sync_batch_norm.cu b/src/operator/contrib/sync_batch_norm.cu
index 005ac3f61a9c..a0503d43b325 100644
--- a/src/operator/contrib/sync_batch_norm.cu
+++ b/src/operator/contrib/sync_batch_norm.cu
@@ -21,17 +21,16 @@
  * \file sync_batch_norm.cc
  * \brief Synchronized BatchNorm modified from BatchNormV1
  * \author Hang Zhang
-*/
+ */
 
 #include "sync_batch_norm-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<gpu>(SyncBatchNormParam param, int dtype) {
+template <>
+Operator* CreateOp<gpu>(SyncBatchNormParam param, int dtype) {
   return new SyncBatchNorm<gpu>(param);
 }
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/contrib/transformer-inl.h b/src/operator/contrib/transformer-inl.h
index 0e7f6c46df6f..30b3dc577657 100644
--- a/src/operator/contrib/transformer-inl.h
+++ b/src/operator/contrib/transformer-inl.h
@@ -30,7 +30,6 @@
 #include "../mxnet_op.h"
 #include "../mshadow_op.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -38,63 +37,65 @@ struct InterleavedMatMulParam : public dmlc::Parameter<InterleavedMatMulParam> {
   int heads;
   bool bwd_ignore_zero_init;
   DMLC_DECLARE_PARAMETER(InterleavedMatMulParam) {
-    DMLC_DECLARE_FIELD(heads)
-    .describe("Set number of heads");
+    DMLC_DECLARE_FIELD(heads).describe("Set number of heads");
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 static void DivSqrtDimForward_(const nnvm::NodeAttrs& attrs,
-                  const OpContext& ctx,
-                  const std::vector<TBlob>& inputs,
-                  const std::vector<OpReqType>& req,
-                  const std::vector<TBlob>& outputs) {
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_GE(inputs[0].ndim(), 1);
-  int last_idx = inputs[0].ndim() - 1;
+  int last_idx    = inputs[0].ndim() - 1;
   double sqrt_dim = std::sqrt(static_cast<double>(inputs[0].shape_[last_idx]));
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::div, Req>, xpu>::Launch(
-        s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), DType(sqrt_dim));
+          s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), DType(sqrt_dim));
     });
   });
 }
 
-
-
 struct SldWinAttenParam : public dmlc::Parameter<SldWinAttenParam> {
   int w;
   bool symmetric;
   DMLC_DECLARE_PARAMETER(SldWinAttenParam) {
-    DMLC_DECLARE_FIELD(w)
-    .describe("The one-sided window length");
-    DMLC_DECLARE_FIELD(symmetric)
-    .describe("If false, each token will only attend to itself and the previous tokens.");
+    DMLC_DECLARE_FIELD(w).describe("The one-sided window length");
+    DMLC_DECLARE_FIELD(symmetric).describe(
+        "If false, each token will only attend to itself and the previous tokens.");
   }
 };
 
-
 struct SldWinAttenMaskLike {
-  MSHADOW_XINLINE static void Map(int i, float *out, int32_t *dilation, int32_t *val_length,
-                                  bool symmetric, int w, int seq_length, int num_heads) {
-    out[i] = 1;
+  MSHADOW_XINLINE static void Map(int i,
+                                  float* out,
+                                  int32_t* dilation,
+                                  int32_t* val_length,
+                                  bool symmetric,
+                                  int w,
+                                  int seq_length,
+                                  int num_heads) {
+    out[i]    = 1;
     int w_len = symmetric ? (w + w + 1) : (w + 1);
     int idx_0 = i / (seq_length * num_heads * w_len);  // batch idx
-    int tmp = i % (seq_length * num_heads * w_len);
+    int tmp   = i % (seq_length * num_heads * w_len);
     int idx_1 = tmp / (num_heads * w_len);  // sequence idx
-    tmp = tmp % (num_heads * w_len);
+    tmp       = tmp % (num_heads * w_len);
     int idx_2 = tmp / w_len;  // head idx
     int idx_3 = tmp % w_len;  // win idx
 
-    bool is_zero = idx_3 < (w - idx_1/dilation[idx_2]) || idx_1 >= val_length[idx_0] \
-      || (symmetric && (w_len-idx_3-1) < (w - (val_length[idx_0]-idx_1-1)/dilation[idx_2]));
-    if (is_zero) out[i] = 0;
+    bool is_zero = idx_3 < (w - idx_1 / dilation[idx_2]) || idx_1 >= val_length[idx_0] ||
+                   (symmetric &&
+                    (w_len - idx_3 - 1) < (w - (val_length[idx_0] - idx_1 - 1) / dilation[idx_2]));
+    if (is_zero)
+      out[i] = 0;
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void SldWinAttenMaskLikeForward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -105,7 +106,7 @@ void SldWinAttenMaskLikeForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo) << "Currently only support kWriteTo";
   using namespace mshadow;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
   const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
   CHECK_EQ(outputs[0].type_flag_, kFloat32);
   float* out = outputs[0].dptr<float>();
@@ -114,61 +115,72 @@ void SldWinAttenMaskLikeForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs[2].type_flag_, kInt32);
   int32_t* val_length = inputs[2].dptr<int32_t>();
 
-  int seq_length = inputs[0].shape_[1];
-  int num_heads = inputs[0].shape_[2];
+  int seq_length  = inputs[0].shape_[1];
+  int num_heads   = inputs[0].shape_[2];
   int num_threads = outputs[0].Size();
 
-  mxnet_op::Kernel<SldWinAttenMaskLike, xpu>::Launch(s, num_threads, out, dilation,
-      val_length, param.symmetric, param.w, seq_length, num_heads);
+  mxnet_op::Kernel<SldWinAttenMaskLike, xpu>::Launch(
+      s, num_threads, out, dilation, val_length, param.symmetric, param.w, seq_length, num_heads);
 }
 
-
-
-
 struct DiagMM {
-  MSHADOW_XINLINE static void Map(int tid, float *out, float *lhs, float *rhs,
-                                  int32_t *dilation, int batch_size, int seq_length,
-                                  int num_heads, int out_last_dim, int lhs_last_dim, int w,
-                                  int w_right, bool diagonal_lhs, bool transpose_lhs) {
-    out[tid] = 0;
+  MSHADOW_XINLINE static void Map(int tid,
+                                  float* out,
+                                  float* lhs,
+                                  float* rhs,
+                                  int32_t* dilation,
+                                  int batch_size,
+                                  int seq_length,
+                                  int num_heads,
+                                  int out_last_dim,
+                                  int lhs_last_dim,
+                                  int w,
+                                  int w_right,
+                                  bool diagonal_lhs,
+                                  bool transpose_lhs) {
+    out[tid]   = 0;
     int stride = seq_length * num_heads * out_last_dim;
-    int idx_0 = tid / stride;  // batch idx
-    int tmp = tid % stride;
-    stride = num_heads * out_last_dim;
-    int idx_1 = tmp / stride;  // sequence idx
-    tmp = tmp % stride;
-    int idx_2 = tmp / out_last_dim;  // head idx
-    int idx_3 = tmp % out_last_dim;  // window idx or hidden feature idx
+    int idx_0  = tid / stride;  // batch idx
+    int tmp    = tid % stride;
+    stride     = num_heads * out_last_dim;
+    int idx_1  = tmp / stride;  // sequence idx
+    tmp        = tmp % stride;
+    int idx_2  = tmp / out_last_dim;  // head idx
+    int idx_3  = tmp % out_last_dim;  // window idx or hidden feature idx
 
     if (!diagonal_lhs) {
       int tmp_idx = idx_1 + dilation[idx_2] * (idx_3 - w);
-      if (tmp_idx >= seq_length || tmp_idx < 0) return;
+      if (tmp_idx >= seq_length || tmp_idx < 0)
+        return;
       for (int i = 0; i < lhs_last_dim; i++) {
-        int lhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) + \
-          idx_1 * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + i;
-        int rhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) + \
-          tmp_idx * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + i;
+        int lhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) +
+                      idx_1 * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + i;
+        int rhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) +
+                      tmp_idx * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + i;
         out[tid] += lhs[lhs_idx] * rhs[rhs_idx];
       }
     } else {
       if (!transpose_lhs) {
         for (int i = 0; i < lhs_last_dim; i++) {
           int tmp_idx = idx_1 + dilation[idx_2] * (i - w);
-          if (tmp_idx >= seq_length || tmp_idx < 0) continue;
-          int lhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) + \
-            idx_1 * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + i;
-          int rhs_idx = idx_0 * (seq_length * num_heads * out_last_dim) + \
-            tmp_idx * (num_heads * out_last_dim) + idx_2 * out_last_dim + idx_3;
+          if (tmp_idx >= seq_length || tmp_idx < 0)
+            continue;
+          int lhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) +
+                        idx_1 * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + i;
+          int rhs_idx = idx_0 * (seq_length * num_heads * out_last_dim) +
+                        tmp_idx * (num_heads * out_last_dim) + idx_2 * out_last_dim + idx_3;
           out[tid] += lhs[lhs_idx] * rhs[rhs_idx];
         }
       } else {
         for (int i = 0; i < lhs_last_dim; i++) {
           int tmp_idx = idx_1 + dilation[idx_2] * (i - w_right);
-          if (tmp_idx >= seq_length || tmp_idx < 0) continue;
-          int lhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) + \
-            tmp_idx * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim + ((w_right + w) - i);
-          int rhs_idx = idx_0 * (seq_length * num_heads * out_last_dim) + \
-            tmp_idx * (num_heads * out_last_dim) + idx_2 * out_last_dim + idx_3;
+          if (tmp_idx >= seq_length || tmp_idx < 0)
+            continue;
+          int lhs_idx = idx_0 * (seq_length * num_heads * lhs_last_dim) +
+                        tmp_idx * (num_heads * lhs_last_dim) + idx_2 * lhs_last_dim +
+                        ((w_right + w) - i);
+          int rhs_idx = idx_0 * (seq_length * num_heads * out_last_dim) +
+                        tmp_idx * (num_heads * out_last_dim) + idx_2 * out_last_dim + idx_3;
           out[tid] += lhs[lhs_idx] * rhs[rhs_idx];
         }
       }
@@ -176,12 +188,16 @@ struct DiagMM {
   }
 };
 
-
-
-template<typename xpu>
-void DiagMMImpl(const OpContext& ctx, const TBlob& out, const TBlob& lhs,
-                const TBlob& rhs, const TBlob& dilation, bool diagonal_lhs,
-                bool transpose_lhs, int w, int w_right) {
+template <typename xpu>
+void DiagMMImpl(const OpContext& ctx,
+                const TBlob& out,
+                const TBlob& lhs,
+                const TBlob& rhs,
+                const TBlob& dilation,
+                bool diagonal_lhs,
+                bool transpose_lhs,
+                int w,
+                int w_right) {
   using namespace mshadow;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(out.type_flag_, kFloat32);
@@ -189,25 +205,36 @@ void DiagMMImpl(const OpContext& ctx, const TBlob& out, const TBlob& lhs,
   CHECK_EQ(rhs.type_flag_, kFloat32);
   CHECK_EQ(dilation.type_flag_, kInt32);
 
-  float* lhs_data = lhs.dptr<float>();
-  float* rhs_data = rhs.dptr<float>();
+  float* lhs_data        = lhs.dptr<float>();
+  float* rhs_data        = rhs.dptr<float>();
   int32_t* dilation_data = dilation.dptr<int32_t>();
-  float* out_data = out.dptr<float>();
+  float* out_data        = out.dptr<float>();
 
-  int batch_size = lhs.shape_[0];
-  int seq_length = lhs.shape_[1];
-  int num_heads = lhs.shape_[2];
+  int batch_size   = lhs.shape_[0];
+  int seq_length   = lhs.shape_[1];
+  int num_heads    = lhs.shape_[2];
   int lhs_last_dim = lhs.shape_[3];
   int out_last_dim = out.shape_[3];
-  int num_threads = out.Size();
-
-  mxnet_op::Kernel<DiagMM, xpu>::Launch(s, num_threads, out_data, lhs_data, rhs_data,
-      dilation_data, batch_size, seq_length, num_heads, out_last_dim, lhs_last_dim, w,
-      w_right, diagonal_lhs, transpose_lhs);
+  int num_threads  = out.Size();
+
+  mxnet_op::Kernel<DiagMM, xpu>::Launch(s,
+                                        num_threads,
+                                        out_data,
+                                        lhs_data,
+                                        rhs_data,
+                                        dilation_data,
+                                        batch_size,
+                                        seq_length,
+                                        num_heads,
+                                        out_last_dim,
+                                        lhs_last_dim,
+                                        w,
+                                        w_right,
+                                        diagonal_lhs,
+                                        transpose_lhs);
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void SldWinAttenScoreForward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -217,13 +244,12 @@ void SldWinAttenScoreForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   using namespace mshadow;
   const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
-  int w_right = param.symmetric ? param.w : 0;
-  DiagMMImpl<xpu>(ctx, outputs.at(0), inputs.at(0), inputs.at(1), inputs.at(2),
-    false, false, param.w, w_right);
+  int w_right                   = param.symmetric ? param.w : 0;
+  DiagMMImpl<xpu>(
+      ctx, outputs.at(0), inputs.at(0), inputs.at(1), inputs.at(2), false, false, param.w, w_right);
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void SldWinAttenScoreBackward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -233,18 +259,16 @@ void SldWinAttenScoreBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 3U);
   using namespace mshadow;
   const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
-  int w_right = param.symmetric ? param.w : 0;
+  int w_right                   = param.symmetric ? param.w : 0;
   // grad_query = matmul(grad_score, key)
-  DiagMMImpl<xpu>(ctx, outputs.at(0), inputs.at(0), inputs.at(2), inputs.at(3),
-      true, false, param.w, w_right);
+  DiagMMImpl<xpu>(
+      ctx, outputs.at(0), inputs.at(0), inputs.at(2), inputs.at(3), true, false, param.w, w_right);
   // grad_key = matmul(grad_score.T, query)
-  DiagMMImpl<xpu>(ctx, outputs.at(1), inputs.at(0), inputs.at(1), inputs.at(3),
-      true, true, param.w, w_right);
+  DiagMMImpl<xpu>(
+      ctx, outputs.at(1), inputs.at(0), inputs.at(1), inputs.at(3), true, true, param.w, w_right);
 }
 
-
-
-template<typename xpu>
+template <typename xpu>
 void SldWinAttenContextForward(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
@@ -254,14 +278,13 @@ void SldWinAttenContextForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   using namespace mshadow;
   const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
-  int w_right = param.symmetric ? param.w : 0;
+  int w_right                   = param.symmetric ? param.w : 0;
   // context_vec = matmul(score, value)
-  DiagMMImpl<xpu>(ctx, outputs.at(0), inputs.at(0), inputs.at(1), inputs.at(2),
-      true, false, param.w, w_right);
+  DiagMMImpl<xpu>(
+      ctx, outputs.at(0), inputs.at(0), inputs.at(1), inputs.at(2), true, false, param.w, w_right);
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void SldWinAttenContextBackward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -271,18 +294,15 @@ void SldWinAttenContextBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 3U);
   using namespace mshadow;
   const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
-  int w_right = param.symmetric ? param.w : 0;
+  int w_right                   = param.symmetric ? param.w : 0;
   // grad_score = matmul(grad_context, value.T)
-  DiagMMImpl<xpu>(ctx, outputs.at(0), inputs.at(0), inputs.at(2), inputs.at(3),
-      false, false, param.w, w_right);
+  DiagMMImpl<xpu>(
+      ctx, outputs.at(0), inputs.at(0), inputs.at(2), inputs.at(3), false, false, param.w, w_right);
   // grad_value = matmul(score.T, grad_context)
-  DiagMMImpl<xpu>(ctx, outputs.at(1), inputs.at(1), inputs.at(0), inputs.at(3),
-      true, true, param.w, w_right);
+  DiagMMImpl<xpu>(
+      ctx, outputs.at(1), inputs.at(1), inputs.at(0), inputs.at(3), true, true, param.w, w_right);
 }
 
-
-
-
 }  // namespace op
 }  // namespace mxnet
 #endif  // MXNET_OPERATOR_CONTRIB_TRANSFORMER_INL_H_
diff --git a/src/operator/contrib/transformer.cc b/src/operator/contrib/transformer.cc
index 9d6ca2b73b7c..51b847c48807 100644
--- a/src/operator/contrib/transformer.cc
+++ b/src/operator/contrib/transformer.cc
@@ -39,11 +39,11 @@ static bool InterleavedMatMulSelfAttQKShape(const NodeAttrs& attrs,
                                  << in_shape->size() << " inputs";
   auto qkv_shape = in_shape->at(0);
   CHECK_EQ(qkv_shape.ndim(), 3U)
-    << "Input queries_keys_values should be 3D in seq_length-batch-proj_dim, "
-    << "currently is: " << qkv_shape.ndim() << "D";
+      << "Input queries_keys_values should be 3D in seq_length-batch-proj_dim, "
+      << "currently is: " << qkv_shape.ndim() << "D";
   out_shape->resize(1);
-  SHAPE_ASSIGN_CHECK(*out_shape, 0,
-    mxnet::TShape({params.heads * qkv_shape[1], qkv_shape[0], qkv_shape[0]}));
+  SHAPE_ASSIGN_CHECK(
+      *out_shape, 0, mxnet::TShape({params.heads * qkv_shape[1], qkv_shape[0], qkv_shape[0]}));
   return true;
 }
 
@@ -55,22 +55,19 @@ static bool InterleavedMatMulSelfAttValAttShape(const NodeAttrs& attrs,
   auto qkv_shape = in_shape->at(0);
   auto att_shape = in_shape->at(1);
   CHECK_EQ(qkv_shape.ndim(), 3U)
-    << "Input queries_keys_values should be 3D in seq_length-batch-3*proj_dim, "
-    << "currently is: " << qkv_shape.ndim() << "D";
-  CHECK_EQ(att_shape.ndim(), 3U)
-    << "Input attention should be 3D in batch-seq_length-seq_length, "
-    << "currently is: " << att_shape.ndim() << "D";
+      << "Input queries_keys_values should be 3D in seq_length-batch-3*proj_dim, "
+      << "currently is: " << qkv_shape.ndim() << "D";
+  CHECK_EQ(att_shape.ndim(), 3U) << "Input attention should be 3D in batch-seq_length-seq_length, "
+                                 << "currently is: " << att_shape.ndim() << "D";
   CHECK_EQ(qkv_shape[0], att_shape[1])
-    << "queries_keys_values.shape[0] and attention.shape[1] should be the same, "
-    << "currently are " << qkv_shape[0] << " and " << att_shape[1];
+      << "queries_keys_values.shape[0] and attention.shape[1] should be the same, "
+      << "currently are " << qkv_shape[0] << " and " << att_shape[1];
   CHECK_EQ(qkv_shape[0], att_shape[2])
-    << "queries_keys_values.shape[0] and attention.shape[2] should be the same, "
-    << "currently are " << qkv_shape[0] << " and " << att_shape[2];
-  CHECK_EQ(qkv_shape[2] % 3, 0)
-    << "queries_keys_values.shape[2] should be a multiple of 3, "
-    << "currently is " << qkv_shape[2];
-  SHAPE_ASSIGN_CHECK(*out_shape, 0,
-    mxnet::TShape({qkv_shape[0], qkv_shape[1], qkv_shape[2] / 3}));
+      << "queries_keys_values.shape[0] and attention.shape[2] should be the same, "
+      << "currently are " << qkv_shape[0] << " and " << att_shape[2];
+  CHECK_EQ(qkv_shape[2] % 3, 0) << "queries_keys_values.shape[2] should be a multiple of 3, "
+                                << "currently is " << qkv_shape[2];
+  SHAPE_ASSIGN_CHECK(*out_shape, 0, mxnet::TShape({qkv_shape[0], qkv_shape[1], qkv_shape[2] / 3}));
   return true;
 }
 
@@ -80,20 +77,19 @@ static bool InterleavedMatMulEncDecQKShape(const NodeAttrs& attrs,
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), 2U) << "Input:[queries, keys_values], currently have "
                                  << in_shape->size() << " inputs";
-  auto q_shape = in_shape->at(0);
+  auto q_shape  = in_shape->at(0);
   auto kv_shape = in_shape->at(1);
   CHECK_EQ(q_shape.ndim(), 3U) << "Input queries should be 3D in seq_length-batch-proj_dim, "
                                << "currently is " << q_shape.ndim() << "D";
   CHECK_EQ(kv_shape.ndim(), 3U) << "Input queries should be 3D in seq_length-batch-2*proj_dim, "
                                 << "currently is " << kv_shape.ndim() << "D";
   CHECK_EQ(q_shape[2] * 2, kv_shape[2])
-    << "keys_values.shape[2] should be equal to queries.shape[2] * 2, "
-    << "currently are: " << kv_shape[2] << " and " << q_shape[2];
-  CHECK_EQ(q_shape[1], kv_shape[1])
-    << "queries.shape[1] should be equal to keys_values.shape[1], "
-    << "currently are: " << q_shape[1] << " and " << kv_shape[1];
-  SHAPE_ASSIGN_CHECK(*out_shape, 0,
-      mxnet::TShape({q_shape[1] * params.heads, q_shape[0], kv_shape[0]}));
+      << "keys_values.shape[2] should be equal to queries.shape[2] * 2, "
+      << "currently are: " << kv_shape[2] << " and " << q_shape[2];
+  CHECK_EQ(q_shape[1], kv_shape[1]) << "queries.shape[1] should be equal to keys_values.shape[1], "
+                                    << "currently are: " << q_shape[1] << " and " << kv_shape[1];
+  SHAPE_ASSIGN_CHECK(
+      *out_shape, 0, mxnet::TShape({q_shape[1] * params.heads, q_shape[0], kv_shape[0]}));
   return true;
 }
 
@@ -103,31 +99,40 @@ static bool InterleavedMatMulEncDecValAttShape(const NodeAttrs& attrs,
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), 2U) << "Input: [keys_values, attention], currently have "
                                  << in_shape->size() << " inputs";
-  auto kv_shape = in_shape->at(0);
+  auto kv_shape  = in_shape->at(0);
   auto att_shape = in_shape->at(1);
-  CHECK_EQ(kv_shape.ndim(), 3U)
-    << "Input keys_values should be 3D in seq_length-batch-2*proj_dim, "
-    << "currently is " << kv_shape.ndim() << "D";
-  CHECK_EQ(att_shape.ndim(), 3U)
-    << "Input attention should be 3D in batch-seq_length-seq_length, "
-    << "currently is " << att_shape.ndim() << "D";
+  CHECK_EQ(kv_shape.ndim(), 3U) << "Input keys_values should be 3D in seq_length-batch-2*proj_dim, "
+                                << "currently is " << kv_shape.ndim() << "D";
+  CHECK_EQ(att_shape.ndim(), 3U) << "Input attention should be 3D in batch-seq_length-seq_length, "
+                                 << "currently is " << att_shape.ndim() << "D";
   CHECK_EQ(kv_shape[0], att_shape[2])
-    << "keys_values.shape[0] should be equal to attention.shape[2], currently are "
-    << kv_shape[0] << " and " << att_shape[2];
-  CHECK_EQ(kv_shape[1] * params.heads, att_shape[0]) << "attention.shape[0] "
-    << "should be equal to keys_values.shape[1] * heads, currently are: "
-    << att_shape[2] << " and " << kv_shape[1];
-  SHAPE_ASSIGN_CHECK(*out_shape, 0,
-      mxnet::TShape({att_shape[1], kv_shape[1], kv_shape[2] / 2}));
+      << "keys_values.shape[0] should be equal to attention.shape[2], currently are " << kv_shape[0]
+      << " and " << att_shape[2];
+  CHECK_EQ(kv_shape[1] * params.heads, att_shape[0])
+      << "attention.shape[0] "
+      << "should be equal to keys_values.shape[1] * heads, currently are: " << att_shape[2]
+      << " and " << kv_shape[1];
+  SHAPE_ASSIGN_CHECK(*out_shape, 0, mxnet::TShape({att_shape[1], kv_shape[1], kv_shape[2] / 2}));
   return true;
 }
 
-void strided_batch_sgemm(bool transA, bool transB,
-                         index_t m, index_t n, index_t k,
-                         float alpha, const float *a, index_t lda,
-                         index_t strideA, const float *b, index_t ldb,
-                         index_t strideB, float beta, float *c, index_t ldc,
-                         index_t strideC, int32_t batchCount) {
+void strided_batch_sgemm(bool transA,
+                         bool transB,
+                         index_t m,
+                         index_t n,
+                         index_t k,
+                         float alpha,
+                         const float* a,
+                         index_t lda,
+                         index_t strideA,
+                         const float* b,
+                         index_t ldb,
+                         index_t strideB,
+                         float beta,
+                         float* c,
+                         index_t ldc,
+                         index_t strideC,
+                         int32_t batchCount) {
   std::vector<const float*> pp_A(batchCount, nullptr);
   std::vector<const float*> pp_B(batchCount, nullptr);
   std::vector<float*> pp_C(batchCount, nullptr);
@@ -139,55 +144,76 @@ void strided_batch_sgemm(bool transA, bool transB,
   }
 
 #if (MSHADOW_USE_MKL && INTEL_MKL_VERSION >= 20160000)
-  const int GROUP_SIZE = 1;
-  MKL_INT p_m[GROUP_SIZE] = {static_cast<MKL_INT>(m)};
-  MKL_INT p_n[GROUP_SIZE] = {static_cast<MKL_INT>(n)};
-  MKL_INT p_k[GROUP_SIZE] = {static_cast<MKL_INT>(k)};
+  const int GROUP_SIZE      = 1;
+  MKL_INT p_m[GROUP_SIZE]   = {static_cast<MKL_INT>(m)};
+  MKL_INT p_n[GROUP_SIZE]   = {static_cast<MKL_INT>(n)};
+  MKL_INT p_k[GROUP_SIZE]   = {static_cast<MKL_INT>(k)};
   MKL_INT p_lda[GROUP_SIZE] = {static_cast<MKL_INT>(lda)};
   MKL_INT p_ldb[GROUP_SIZE] = {static_cast<MKL_INT>(ldb)};
   MKL_INT p_ldc[GROUP_SIZE] = {static_cast<MKL_INT>(ldc)};
 
   float p_alpha[GROUP_SIZE] = {alpha};
-  float p_beta[GROUP_SIZE] = {beta};
+  float p_beta[GROUP_SIZE]  = {beta};
 
   CBLAS_TRANSPOSE cblas_a_trans = transA ? CblasTrans : CblasNoTrans;
   CBLAS_TRANSPOSE cblas_b_trans = transB ? CblasTrans : CblasNoTrans;
 
-  MKL_INT p_group_sizeb[GROUP_SIZE] = {static_cast<MKL_INT>(batchCount)};
+  MKL_INT p_group_sizeb[GROUP_SIZE]    = {static_cast<MKL_INT>(batchCount)};
   CBLAS_TRANSPOSE p_transa[GROUP_SIZE] = {cblas_a_trans};
   CBLAS_TRANSPOSE p_transb[GROUP_SIZE] = {cblas_b_trans};
 
-  cblas_sgemm_batch(CblasColMajor, p_transa, p_transb,
-                    p_m, p_n, p_k, p_alpha, pp_A.data(), p_lda, pp_B.data(),
-                    p_ldb, p_beta, pp_C.data(), p_ldc, GROUP_SIZE, p_group_sizeb);
+  cblas_sgemm_batch(CblasColMajor,
+                    p_transa,
+                    p_transb,
+                    p_m,
+                    p_n,
+                    p_k,
+                    p_alpha,
+                    pp_A.data(),
+                    p_lda,
+                    pp_B.data(),
+                    p_ldb,
+                    p_beta,
+                    pp_C.data(),
+                    p_ldc,
+                    GROUP_SIZE,
+                    p_group_sizeb);
 #else
   for (int i = 0; i < batchCount; ++i) {
     cblas_sgemm(CblasColMajor,
                 transA ? CblasTrans : CblasNoTrans,
                 transB ? CblasTrans : CblasNoTrans,
-                m, n, k,
-                alpha, pp_A[i], lda,
-                pp_B[i], ldb, beta, pp_C[i], ldc);
+                m,
+                n,
+                k,
+                alpha,
+                pp_A[i],
+                lda,
+                pp_B[i],
+                ldb,
+                beta,
+                pp_C[i],
+                ldc);
   }
 #endif
 }
 
 void InterleavedMatMulSelfAttQKCPU(const nnvm::NodeAttrs& attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<TBlob> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<TBlob> &outputs) {
+                                   const OpContext& ctx,
+                                   const std::vector<TBlob>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
 
   if (req[0] == kNullOp)
     return;
 
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
+      << "Only FP32 is supported on CPU at the moment";
 
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s          = ctx.get_stream<cpu>();
   const float* queries_keys_values = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  float* output = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  float* output                    = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
 
   const index_t qkv_seq_len    = inputs[0].shape_[0];
   const index_t sequences      = inputs[0].shape_[1];
@@ -220,34 +246,34 @@ void InterleavedMatMulSelfAttQKCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulSelfAttQKCPU(const nnvm::NodeAttrs& attrs,
-                                           const OpContext &ctx,
-                                           const std::vector<TBlob> &inputs,
-                                           const std::vector<OpReqType> &req,
-                                           const std::vector<TBlob> &outputs) {
+                                           const OpContext& ctx,
+                                           const std::vector<TBlob>& inputs,
+                                           const std::vector<OpReqType>& req,
+                                           const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   if (req[0] == kNullOp)
     return;
 
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
+      << "Only FP32 is supported on CPU at the moment";
 
   const float* output_grads        = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
   const float* queries_keys_values = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
   float* queries_keys_values_grads = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const index_t qkv_seq_len    = inputs[1].shape_[0];
-  const index_t sequences      = inputs[1].shape_[1];
-  const index_t output_lin_dim = inputs[1].shape_[2];
-  const index_t embed_dim      = output_lin_dim / 3;
-  const index_t head_dim       = embed_dim / params.heads;
-  const index_t attn_batches   = params.heads * sequences;
-  const index_t lead_dim       = attn_batches * 3 * head_dim;
-  const index_t batch_stride   = 3 * head_dim;
-  const float scale            = 1.0 / sqrt(static_cast<float>(head_dim));
-  const float beta = req[0] == kAddTo ? 1.f : 0.f;
+  const index_t qkv_seq_len        = inputs[1].shape_[0];
+  const index_t sequences          = inputs[1].shape_[1];
+  const index_t output_lin_dim     = inputs[1].shape_[2];
+  const index_t embed_dim          = output_lin_dim / 3;
+  const index_t head_dim           = embed_dim / params.heads;
+  const index_t attn_batches       = params.heads * sequences;
+  const index_t lead_dim           = attn_batches * 3 * head_dim;
+  const index_t batch_stride       = 3 * head_dim;
+  const float scale                = 1.0 / sqrt(static_cast<float>(head_dim));
+  const float beta                 = req[0] == kAddTo ? 1.f : 0.f;
 
   if (req[0] == kWriteTo) {
-    memset(queries_keys_values_grads, 0, outputs[0].shape_.Size() * sizeof (float));
+    memset(queries_keys_values_grads, 0, outputs[0].shape_.Size() * sizeof(float));
   }
 
   strided_batch_sgemm(false,
@@ -288,31 +314,31 @@ void BackwardInterleavedMatMulSelfAttQKCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void InterleavedMatMulSelfAttValAttCPU(const nnvm::NodeAttrs& attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<TBlob> &inputs,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<TBlob> &outputs) {
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   if (req[0] == kNullOp)
     return;
 
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
+      << "Only FP32 is supported on CPU at the moment";
 
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s          = ctx.get_stream<cpu>();
   const float* queries_keys_values = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
   const float* attention_maps      = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
   float* output                    = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const index_t qkv_seq_len    = inputs[0].shape_[0];
-  const index_t sequences      = inputs[0].shape_[1];
-  const index_t output_lin_dim = inputs[0].shape_[2];
-  const index_t embed_dim      = output_lin_dim / 3;
-  const index_t head_dim       = embed_dim / params.heads;
-  const index_t attn_batches   = params.heads * sequences;
-  const index_t lead_dim       = attn_batches * 3 * head_dim;
-  const index_t batch_stride   = 3 * head_dim;
-  const float alpha             = 1.f;
-  const float beta              = req[0] == kAddTo ? 1.f : 0.f;
+  const index_t qkv_seq_len        = inputs[0].shape_[0];
+  const index_t sequences          = inputs[0].shape_[1];
+  const index_t output_lin_dim     = inputs[0].shape_[2];
+  const index_t embed_dim          = output_lin_dim / 3;
+  const index_t head_dim           = embed_dim / params.heads;
+  const index_t attn_batches       = params.heads * sequences;
+  const index_t lead_dim           = attn_batches * 3 * head_dim;
+  const index_t batch_stride       = 3 * head_dim;
+  const float alpha                = 1.f;
+  const float beta                 = req[0] == kAddTo ? 1.f : 0.f;
 
   strided_batch_sgemm(false,
                       false,
@@ -334,35 +360,35 @@ void InterleavedMatMulSelfAttValAttCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulSelfAttValAttCPU(const nnvm::NodeAttrs& attrs,
-                                               const OpContext &ctx,
-                                               const std::vector<TBlob> &inputs,
-                                               const std::vector<OpReqType> &req,
-                                               const std::vector<TBlob> &outputs) {
+                                               const OpContext& ctx,
+                                               const std::vector<TBlob>& inputs,
+                                               const std::vector<OpReqType>& req,
+                                               const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   if (req[0] == kNullOp)
     return;
 
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
+      << "Only FP32 is supported on CPU at the moment";
 
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  const float* output_grads              = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const float* queries_keys_values       = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  const float* attention_maps            = inputs[2].FlatTo2D<cpu, float>(s).dptr_;
-  float* queries_keys_values_grads       = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  float* attention_maps_grads            = outputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  const index_t qkv_seq_len    = inputs[1].shape_[0];
-  const index_t sequences      = inputs[1].shape_[1];
-  const index_t output_lin_dim = inputs[1].shape_[2];
-  const index_t embed_dim      = output_lin_dim / 3;
-  const index_t head_dim       = embed_dim / params.heads;
-  const index_t attn_batches   = params.heads * sequences;
-  const index_t lead_dim       = attn_batches * 3 * head_dim;
-  const index_t batch_stride   = 3 * head_dim;
-  const float alpha            = 1.f;
+  mshadow::Stream<cpu>* s          = ctx.get_stream<cpu>();
+  const float* output_grads        = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  const float* queries_keys_values = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  const float* attention_maps      = inputs[2].FlatTo2D<cpu, float>(s).dptr_;
+  float* queries_keys_values_grads = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  float* attention_maps_grads      = outputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  const index_t qkv_seq_len        = inputs[1].shape_[0];
+  const index_t sequences          = inputs[1].shape_[1];
+  const index_t output_lin_dim     = inputs[1].shape_[2];
+  const index_t embed_dim          = output_lin_dim / 3;
+  const index_t head_dim           = embed_dim / params.heads;
+  const index_t attn_batches       = params.heads * sequences;
+  const index_t lead_dim           = attn_batches * 3 * head_dim;
+  const index_t batch_stride       = 3 * head_dim;
+  const float alpha                = 1.f;
   if (req[0] != kNullOp) {
     if (req[0] == kWriteTo) {
-      memset(queries_keys_values_grads, 0, outputs[0].shape_.Size() * sizeof (float));
+      memset(queries_keys_values_grads, 0, outputs[0].shape_.Size() * sizeof(float));
     }
 
     const float beta = req[0] == kAddTo ? 1.f : 0.f;
@@ -407,34 +433,34 @@ void BackwardInterleavedMatMulSelfAttValAttCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void InterleavedMatMulEncDecQKCPU(const nnvm::NodeAttrs& attrs,
-                                  const OpContext &ctx,
-                                  const std::vector<TBlob> &inputs,
-                                  const std::vector<OpReqType> &req,
-                                  const std::vector<TBlob> &outputs) {
+                                  const OpContext& ctx,
+                                  const std::vector<TBlob>& inputs,
+                                  const std::vector<OpReqType>& req,
+                                  const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   if (req[0] == kNullOp)
     return;
 
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
-
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  const float* queries     = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const float* keys_values = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  float* output            = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const index_t q_seq_len         = inputs[0].shape_[0];
-  const index_t sequences         = inputs[0].shape_[1];
-  const index_t output_lin_q_dim  = inputs[0].shape_[2];
-  const index_t kv_seq_len        = inputs[1].shape_[0];
-  const index_t embed_dim         = output_lin_q_dim;
-  const index_t head_dim          = embed_dim / params.heads;
-  const index_t attn_batches      = params.heads * sequences;
-  const index_t lead_dim_q        = attn_batches * head_dim;
-  const index_t lead_dim_kv       = attn_batches * 2 * head_dim;
-  const index_t batch_stride_q    = head_dim;
-  const index_t batch_stride_kv   = head_dim * 2;
-  const float beta                = req[0] == kAddTo ? 1.f : 0.f;
-  const float scale               = 1.f / sqrt(static_cast<float>(head_dim));
+      << "Only FP32 is supported on CPU at the moment";
+
+  mshadow::Stream<cpu>* s        = ctx.get_stream<cpu>();
+  const float* queries           = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  const float* keys_values       = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  float* output                  = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  const index_t q_seq_len        = inputs[0].shape_[0];
+  const index_t sequences        = inputs[0].shape_[1];
+  const index_t output_lin_q_dim = inputs[0].shape_[2];
+  const index_t kv_seq_len       = inputs[1].shape_[0];
+  const index_t embed_dim        = output_lin_q_dim;
+  const index_t head_dim         = embed_dim / params.heads;
+  const index_t attn_batches     = params.heads * sequences;
+  const index_t lead_dim_q       = attn_batches * head_dim;
+  const index_t lead_dim_kv      = attn_batches * 2 * head_dim;
+  const index_t batch_stride_q   = head_dim;
+  const index_t batch_stride_kv  = head_dim * 2;
+  const float beta               = req[0] == kAddTo ? 1.f : 0.f;
+  const float scale              = 1.f / sqrt(static_cast<float>(head_dim));
 
   strided_batch_sgemm(true,
                       false,
@@ -456,35 +482,35 @@ void InterleavedMatMulEncDecQKCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulEncDecQKCPU(const nnvm::NodeAttrs& attrs,
-                                          const OpContext &ctx,
-                                          const std::vector<TBlob> &inputs,
-                                          const std::vector<OpReqType> &req,
-                                          const std::vector<TBlob> &outputs) {
+                                          const OpContext& ctx,
+                                          const std::vector<TBlob>& inputs,
+                                          const std::vector<OpReqType>& req,
+                                          const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   if (req[0] == kNullOp)
     return;
 
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
-
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  const float* output_grads = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const float* queries       = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  const float* keys_values   = inputs[2].FlatTo2D<cpu, float>(s).dptr_;
-  float* queries_grads       = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  float* keys_values_grads   = outputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  const index_t q_seq_len         = inputs[1].shape_[0];
-  const index_t sequences         = inputs[1].shape_[1];
-  const index_t output_lin_q_dim  = inputs[1].shape_[2];
-  const index_t kv_seq_len        = inputs[2].shape_[0];
-  const index_t embed_dim         = output_lin_q_dim;
-  const index_t head_dim          = embed_dim / params.heads;
-  const index_t attn_batches      = params.heads * sequences;
-  const index_t lead_dim_q        = attn_batches * head_dim;
-  const index_t lead_dim_kv       = attn_batches * 2 * head_dim;
-  const index_t batch_stride_q    = head_dim;
-  const index_t batch_stride_kv   = head_dim * 2;
-  const float scale               = 1.f / sqrt(static_cast<float>(head_dim));
+      << "Only FP32 is supported on CPU at the moment";
+
+  mshadow::Stream<cpu>* s        = ctx.get_stream<cpu>();
+  const float* output_grads      = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  const float* queries           = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  const float* keys_values       = inputs[2].FlatTo2D<cpu, float>(s).dptr_;
+  float* queries_grads           = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  float* keys_values_grads       = outputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  const index_t q_seq_len        = inputs[1].shape_[0];
+  const index_t sequences        = inputs[1].shape_[1];
+  const index_t output_lin_q_dim = inputs[1].shape_[2];
+  const index_t kv_seq_len       = inputs[2].shape_[0];
+  const index_t embed_dim        = output_lin_q_dim;
+  const index_t head_dim         = embed_dim / params.heads;
+  const index_t attn_batches     = params.heads * sequences;
+  const index_t lead_dim_q       = attn_batches * head_dim;
+  const index_t lead_dim_kv      = attn_batches * 2 * head_dim;
+  const index_t batch_stride_q   = head_dim;
+  const index_t batch_stride_kv  = head_dim * 2;
+  const float scale              = 1.f / sqrt(static_cast<float>(head_dim));
 
   if (req[0] != kNullOp) {
     const float beta = req[0] == kAddTo ? 1.f : 0.f;
@@ -508,7 +534,7 @@ void BackwardInterleavedMatMulEncDecQKCPU(const nnvm::NodeAttrs& attrs,
   }
   if (req[1] != kNullOp) {
     if (req[1] == kWriteTo) {
-      memset(keys_values_grads, 0, outputs[1].shape_.Size() * sizeof (float));
+      memset(keys_values_grads, 0, outputs[1].shape_.Size() * sizeof(float));
     }
     const float beta = req[1] == kAddTo ? 1.f : 0.f;
     strided_batch_sgemm(false,
@@ -532,21 +558,21 @@ void BackwardInterleavedMatMulEncDecQKCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void InterleavedMatMulEncDecValAttCPU(const nnvm::NodeAttrs& attrs,
-                                      const OpContext &ctx,
-                                      const std::vector<TBlob> &inputs,
-                                      const std::vector<OpReqType> &req,
-                                      const std::vector<TBlob> &outputs) {
+                                      const OpContext& ctx,
+                                      const std::vector<TBlob>& inputs,
+                                      const std::vector<OpReqType>& req,
+                                      const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   if (req[0] == kNullOp)
     return;
 
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
+      << "Only FP32 is supported on CPU at the moment";
 
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  const float* keys_values    = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const float* attention_maps = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  float* output               = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  mshadow::Stream<cpu>* s         = ctx.get_stream<cpu>();
+  const float* keys_values        = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  const float* attention_maps     = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  float* output                   = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
   const index_t kv_seq_len        = inputs[0].shape_[0];
   const index_t output_lin_kv_dim = inputs[0].shape_[2];
   const index_t attn_batches      = inputs[1].shape_[0];
@@ -578,20 +604,20 @@ void InterleavedMatMulEncDecValAttCPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulEncDecValAttCPU(const nnvm::NodeAttrs& attrs,
-                                              const OpContext &ctx,
-                                              const std::vector<TBlob> &inputs,
-                                              const std::vector<OpReqType> &req,
-                                              const std::vector<TBlob> &outputs) {
+                                              const OpContext& ctx,
+                                              const std::vector<TBlob>& inputs,
+                                              const std::vector<OpReqType>& req,
+                                              const std::vector<TBlob>& outputs) {
   const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   CHECK_EQ(inputs[0].type_flag_, mshadow::kFloat32)
-    << "Only FP32 is supported on CPU at the moment";
-
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  const float* output_grads   = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  const float* keys_values    = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
-  const float* attention_maps = inputs[2].FlatTo2D<cpu, float>(s).dptr_;
-  float* keys_values_grads    = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
-  float* attention_maps_grads = outputs[1].FlatTo2D<cpu, float>(s).dptr_;
+      << "Only FP32 is supported on CPU at the moment";
+
+  mshadow::Stream<cpu>* s         = ctx.get_stream<cpu>();
+  const float* output_grads       = inputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  const float* keys_values        = inputs[1].FlatTo2D<cpu, float>(s).dptr_;
+  const float* attention_maps     = inputs[2].FlatTo2D<cpu, float>(s).dptr_;
+  float* keys_values_grads        = outputs[0].FlatTo2D<cpu, float>(s).dptr_;
+  float* attention_maps_grads     = outputs[1].FlatTo2D<cpu, float>(s).dptr_;
   const index_t kv_seq_len        = inputs[1].shape_[0];
   const index_t output_lin_kv_dim = inputs[1].shape_[2];
   const index_t attn_batches      = inputs[2].shape_[0];
@@ -604,7 +630,7 @@ void BackwardInterleavedMatMulEncDecValAttCPU(const nnvm::NodeAttrs& attrs,
 
   if (req[0] != kNullOp) {
     if (req[0] == kWriteTo) {
-      memset(keys_values_grads, 0, outputs[0].shape_.Size() * sizeof (float));
+      memset(keys_values_grads, 0, outputs[0].shape_.Size() * sizeof(float));
     }
     const float beta = req[0] == kAddTo ? 1.f : 0.f;
     strided_batch_sgemm(false,
@@ -648,8 +674,8 @@ void BackwardInterleavedMatMulEncDecValAttCPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_selfatt_qk)
-.add_alias("_npx_interleaved_matmul_selfatt_qk")
-.describe(R"code(Compute the matrix multiplication between the projections of
+    .add_alias("_npx_interleaved_matmul_selfatt_qk")
+    .describe(R"code(Compute the matrix multiplication between the projections of
 queries and keys in multihead attention use as self attention.
 
 the input must be a single tensor of interleaved projections
@@ -667,33 +693,37 @@ the equivalent code would be::
     output = mx.nd.batch_dot(q_proj, k_proj, transpose_b=True)
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"queries_keys_values"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulSelfAttQKShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulSelfAttQKCPU)
-.set_attr<nnvm::FGradient>("FGradient",
-  ElemwiseGradUseIn{"_backward_interleaved_matmul_selfatt_qk"})
-.add_argument("queries_keys_values", "NDArray-or-Symbol", "Interleaved queries, keys and values")
-.add_arguments(InterleavedMatMulParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"queries_keys_values"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulSelfAttQKShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulSelfAttQKCPU)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseIn{"_backward_interleaved_matmul_selfatt_qk"})
+    .add_argument("queries_keys_values",
+                  "NDArray-or-Symbol",
+                  "Interleaved queries, keys and values")
+    .add_arguments(InterleavedMatMulParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_selfatt_qk)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulSelfAttQKCPU);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulSelfAttQKCPU);
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_selfatt_valatt)
-.add_alias("_npx_interleaved_matmul_selfatt_valatt")
-.describe(R"code(Compute the matrix multiplication between the projections of
+    .add_alias("_npx_interleaved_matmul_selfatt_valatt")
+    .describe(R"code(Compute the matrix multiplication between the projections of
 values and the attention weights in multihead attention use as self attention.
 
 the inputs must be a tensor of interleaved projections
@@ -714,34 +744,39 @@ the equivalent code would be::
     output = mx.nd.reshape(output, shape=(0, 0, -1))
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"queries_keys_values", "attention"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulSelfAttValAttShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulSelfAttValAttCPU)
-.set_attr<nnvm::FGradient>("FGradient",
-  ElemwiseGradUseIn{"_backward_interleaved_matmul_selfatt_valatt"})
-.add_argument("queries_keys_values", "NDArray-or-Symbol", "Queries, keys and values interleaved")
-.add_argument("attention", "NDArray-or-Symbol", "Attention maps")
-.add_arguments(InterleavedMatMulParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"queries_keys_values", "attention"};
+        })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulSelfAttValAttShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulSelfAttValAttCPU)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseIn{"_backward_interleaved_matmul_selfatt_valatt"})
+    .add_argument("queries_keys_values",
+                  "NDArray-or-Symbol",
+                  "Queries, keys and values interleaved")
+    .add_argument("attention", "NDArray-or-Symbol", "Attention maps")
+    .add_arguments(InterleavedMatMulParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_selfatt_valatt)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulSelfAttValAttCPU);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulSelfAttValAttCPU);
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_encdec_qk)
-.add_alias("_npx_interleaved_matmul_encdec_qk")
-.describe(R"code(Compute the matrix multiplication between the projections of
+    .add_alias("_npx_interleaved_matmul_encdec_qk")
+    .describe(R"code(Compute the matrix multiplication between the projections of
 queries and keys in multihead attention use as encoder-decoder.
 
 the inputs must be a tensor of projections of queries following the layout:
@@ -761,34 +796,36 @@ the equivalent code would be::
     output = mx.nd.batch_dot(q_proj, k_proj, transpose_b=True)
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"queries", "keys_values"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulEncDecQKShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulEncDecQKCPU)
-.set_attr<nnvm::FGradient>("FGradient",
-    ElemwiseGradUseIn{"_backward_interleaved_matmul_encdec_qk"})
-.add_argument("queries", "NDArray-or-Symbol", "Queries")
-.add_argument("keys_values", "NDArray-or-Symbol", "Keys and values interleaved")
-.add_arguments(InterleavedMatMulParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"queries", "keys_values"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulEncDecQKShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulEncDecQKCPU)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseIn{"_backward_interleaved_matmul_encdec_qk"})
+    .add_argument("queries", "NDArray-or-Symbol", "Queries")
+    .add_argument("keys_values", "NDArray-or-Symbol", "Keys and values interleaved")
+    .add_arguments(InterleavedMatMulParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_encdec_qk)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulEncDecQKCPU);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulEncDecQKCPU);
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_encdec_valatt)
-.add_alias("_npx_interleaved_matmul_encdec_valatt")
-.describe(R"code(Compute the matrix multiplication between the projections of
+    .add_alias("_npx_interleaved_matmul_encdec_valatt")
+    .describe(R"code(Compute the matrix multiplication between the projections of
 values and the attention weights in multihead attention use as encoder-decoder.
 
 the inputs must be a tensor of interleaved projections of
@@ -809,48 +846,48 @@ the equivalent code would be::
     output = mx.nd.reshape(output, shape=(0, 0, -1))
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"keys_values", "attention"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulEncDecValAttShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulEncDecValAttCPU)
-.set_attr<nnvm::FGradient>("FGradient",
-    ElemwiseGradUseIn{"_backward_interleaved_matmul_encdec_valatt"})
-.add_argument("keys_values", "NDArray-or-Symbol", "Keys and values interleaved")
-.add_argument("attention", "NDArray-or-Symbol", "Attention maps")
-.add_arguments(InterleavedMatMulParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"keys_values", "attention"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", InterleavedMatMulEncDecValAttShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", InterleavedMatMulEncDecValAttCPU)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseIn{"_backward_interleaved_matmul_encdec_valatt"})
+    .add_argument("keys_values", "NDArray-or-Symbol", "Keys and values interleaved")
+    .add_argument("attention", "NDArray-or-Symbol", "Attention maps")
+    .add_arguments(InterleavedMatMulParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_encdec_valatt)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<InterleavedMatMulParam>)
-.set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulEncDecValAttCPU);
-
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<InterleavedMatMulParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BackwardInterleavedMatMulEncDecValAttCPU);
 
 // relu
 MXNET_OPERATOR_REGISTER_UNARY(_contrib_div_sqrt_dim)
-.describe(R"code(Rescale the input by the square root of the channel dimension.
+    .describe(R"code(Rescale the input by the square root of the channel dimension.
 
    out = data / sqrt(data.shape[-1])
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", DivSqrtDimForward_<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_contrib_div_sqrt_dim"});
-
+    .set_attr<FCompute>("FCompute<cpu>", DivSqrtDimForward_<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_contrib_div_sqrt_dim"});
 
 DMLC_REGISTER_PARAMETER(SldWinAttenParam);
 
 NNVM_REGISTER_OP(_contrib_sldwin_atten_mask_like)
-.add_alias("_npx_sldwin_atten_mask_like")
-.describe(R"code(Compute the mask for the sliding window attention score, used in
+    .add_alias("_npx_sldwin_atten_mask_like")
+    .describe(R"code(Compute the mask for the sliding window attention score, used in
 Longformer (https://arxiv.org/pdf/2004.05150.pdf).
 
 In this attention pattern,
@@ -871,44 +908,49 @@ The shape of the output is:
 - *mask* : same as the shape of *score*
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SldWinAttenParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"score", "dilation", "valid_length"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"mask"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-                                              mxnet::ShapeVector *in_attrs,
-                                              mxnet::ShapeVector *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U);
-  CHECK_EQ(out_attrs->size(), 1U);
-  const mxnet::TShape& dshape = (*in_attrs)[0];
-  if (!shape_is_known(dshape)) return false;
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape);
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs &attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U);
-  CHECK_EQ(out_attrs->size(), 1U);
-  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
-  return out_attrs->at(0) != -1;
-})
-.set_attr<FCompute>("FCompute<cpu>", SldWinAttenMaskLikeForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("score", "NDArray-or-Symbol", "sliding window attention score")
-.add_argument("dilation", "NDArray-or-Symbol", "dilation")
-.add_argument("valid_length", "NDArray-or-Symbol", "valid length")
-.add_arguments(SldWinAttenParam::__FIELDS__());
-
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SldWinAttenParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"score", "dilation", "valid_length"};
+        })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"mask"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
+                                    CHECK_EQ(in_attrs->size(), 3U);
+                                    CHECK_EQ(out_attrs->size(), 1U);
+                                    const mxnet::TShape& dshape = (*in_attrs)[0];
+                                    if (!shape_is_known(dshape))
+                                      return false;
+                                    SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape);
+                                    return true;
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 3U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
+                                  return out_attrs->at(0) != -1;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", SldWinAttenMaskLikeForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("score", "NDArray-or-Symbol", "sliding window attention score")
+    .add_argument("dilation", "NDArray-or-Symbol", "dilation")
+    .add_argument("valid_length", "NDArray-or-Symbol", "valid length")
+    .add_arguments(SldWinAttenParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_sldwin_atten_score)
-.add_alias("_npx_sldwin_atten_score")
-.describe(R"code(Compute the sliding window attention score, which is used in
+    .add_alias("_npx_sldwin_atten_score")
+    .describe(R"code(Compute the sliding window attention score, which is used in
 Longformer (https://arxiv.org/pdf/2004.05150.pdf). In this attention pattern,
 given a fixed window size *2w*, each token attends to *w* tokens on the left side
 if we use causal attention (setting *symmetric* to *False*),
@@ -926,57 +968,62 @@ The shape of the output is:
   - (batch_size, seq_length, num_heads, w + 1) otherwise.
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SldWinAttenParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"query", "key", "dilation"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"score"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-                                              mxnet::ShapeVector *inshapes,
-                                              mxnet::ShapeVector *outshapes) {
-  unsigned int batch_size = inshapes->at(0)[0];
-  unsigned int seq_length = inshapes->at(0)[1];
-  unsigned int num_heads = inshapes->at(0)[2];
-  unsigned int lhs_last_dim = inshapes->at(0)[3];
-  unsigned int num_hidden = inshapes->at(1)[3];
-  CHECK_EQ(lhs_last_dim, num_hidden);
-  CHECK_EQ(inshapes->at(2)[0], num_heads);
-  const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
-  unsigned int w_len = param.symmetric ? (param.w + param.w + 1) : (param.w + 1);
-  outshapes->at(0) = mshadow::Shape4(batch_size, seq_length, num_heads, w_len);
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs &attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U);
-  CHECK_EQ(out_attrs->size(), 1U);
-  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
-  return out_attrs->at(0) != -1;
-})
-.set_attr<FCompute>("FCompute<cpu>", SldWinAttenScoreForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_sldwin_atten_score"})
-.add_argument("query", "NDArray-or-Symbol", "query")
-.add_argument("key", "NDArray-or-Symbol", "key")
-.add_argument("dilation", "NDArray-or-Symbol", "dilation")
-.add_arguments(SldWinAttenParam::__FIELDS__());
-
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SldWinAttenParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"query", "key", "dilation"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"score"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* inshapes,
+                                     mxnet::ShapeVector* outshapes) {
+                                    unsigned int batch_size   = inshapes->at(0)[0];
+                                    unsigned int seq_length   = inshapes->at(0)[1];
+                                    unsigned int num_heads    = inshapes->at(0)[2];
+                                    unsigned int lhs_last_dim = inshapes->at(0)[3];
+                                    unsigned int num_hidden   = inshapes->at(1)[3];
+                                    CHECK_EQ(lhs_last_dim, num_hidden);
+                                    CHECK_EQ(inshapes->at(2)[0], num_heads);
+                                    const SldWinAttenParam& param =
+                                        nnvm::get<SldWinAttenParam>(attrs.parsed);
+                                    unsigned int w_len =
+                                        param.symmetric ? (param.w + param.w + 1) : (param.w + 1);
+                                    outshapes->at(0) =
+                                        mshadow::Shape4(batch_size, seq_length, num_heads, w_len);
+                                    return true;
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 3U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
+                                  return out_attrs->at(0) != -1;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", SldWinAttenScoreForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_sldwin_atten_score"})
+    .add_argument("query", "NDArray-or-Symbol", "query")
+    .add_argument("key", "NDArray-or-Symbol", "key")
+    .add_argument("dilation", "NDArray-or-Symbol", "dilation")
+    .add_arguments(SldWinAttenParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_sldwin_atten_score)
-.set_num_inputs(4)
-.set_num_outputs(3)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<SldWinAttenParam>)
-.set_attr<FCompute>("FCompute<cpu>", SldWinAttenScoreBackward<cpu>);
-
+    .set_num_inputs(4)
+    .set_num_outputs(3)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<SldWinAttenParam>)
+    .set_attr<FCompute>("FCompute<cpu>", SldWinAttenScoreBackward<cpu>);
 
 NNVM_REGISTER_OP(_contrib_sldwin_atten_context)
-.add_alias("_npx_sldwin_atten_context")
-.describe(R"code(Compute the context vector for sliding window attention, used in
+    .add_alias("_npx_sldwin_atten_context")
+    .describe(R"code(Compute the context vector for sliding window attention, used in
 Longformer (https://arxiv.org/pdf/2004.05150.pdf).
 
 In this attention pattern,
@@ -997,54 +1044,61 @@ The shape of the output is:
 - *context_vec* : (batch_size, seq_length, num_heads, num_head_units)
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SldWinAttenParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"score", "value", "dilation"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"context_vec"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-                                              mxnet::ShapeVector *inshapes,
-                                              mxnet::ShapeVector *outshapes) {
-  unsigned int batch_size = inshapes->at(0)[0];
-  unsigned int seq_length = inshapes->at(0)[1];
-  unsigned int num_heads = inshapes->at(0)[2];
-  unsigned int lhs_last_dim = inshapes->at(0)[3];
-  unsigned int num_hidden = inshapes->at(1)[3];
-  CHECK_EQ(inshapes->at(2)[0], num_heads);
-  const SldWinAttenParam& param = nnvm::get<SldWinAttenParam>(attrs.parsed);
-  unsigned int w_len = param.symmetric ? (param.w + param.w + 1) : (param.w + 1);
-  CHECK_EQ(lhs_last_dim, w_len);
-
-  outshapes->at(0) = mshadow::Shape4(batch_size, seq_length, num_heads, num_hidden);
-
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs &attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U);
-  CHECK_EQ(out_attrs->size(), 1U);
-  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
-  return out_attrs->at(0) != -1;
-})
-.set_attr<FCompute>("FCompute<cpu>", SldWinAttenContextForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_sldwin_atten_context"})
-.add_argument("score", "NDArray-or-Symbol", "score")
-.add_argument("value", "NDArray-or-Symbol", "value")
-.add_argument("dilation", "NDArray-or-Symbol", "dilation")
-.add_arguments(SldWinAttenParam::__FIELDS__());
-
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SldWinAttenParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"score", "value", "dilation"};
+        })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"context_vec"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* inshapes,
+                                     mxnet::ShapeVector* outshapes) {
+                                    unsigned int batch_size   = inshapes->at(0)[0];
+                                    unsigned int seq_length   = inshapes->at(0)[1];
+                                    unsigned int num_heads    = inshapes->at(0)[2];
+                                    unsigned int lhs_last_dim = inshapes->at(0)[3];
+                                    unsigned int num_hidden   = inshapes->at(1)[3];
+                                    CHECK_EQ(inshapes->at(2)[0], num_heads);
+                                    const SldWinAttenParam& param =
+                                        nnvm::get<SldWinAttenParam>(attrs.parsed);
+                                    unsigned int w_len =
+                                        param.symmetric ? (param.w + param.w + 1) : (param.w + 1);
+                                    CHECK_EQ(lhs_last_dim, w_len);
+
+                                    outshapes->at(0) = mshadow::Shape4(
+                                        batch_size, seq_length, num_heads, num_hidden);
+
+                                    return true;
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 3U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
+                                  return out_attrs->at(0) != -1;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", SldWinAttenContextForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_sldwin_atten_context"})
+    .add_argument("score", "NDArray-or-Symbol", "score")
+    .add_argument("value", "NDArray-or-Symbol", "value")
+    .add_argument("dilation", "NDArray-or-Symbol", "dilation")
+    .add_arguments(SldWinAttenParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_sldwin_atten_context)
-.set_num_inputs(4)
-.set_num_outputs(3)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<SldWinAttenParam>)
-.set_attr<FCompute>("FCompute<cpu>", SldWinAttenContextBackward<cpu>);
+    .set_num_inputs(4)
+    .set_num_outputs(3)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<SldWinAttenParam>)
+    .set_attr<FCompute>("FCompute<cpu>", SldWinAttenContextBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/transformer.cu b/src/operator/contrib/transformer.cu
index ab20f1c65198..5f34317d7f8e 100644
--- a/src/operator/contrib/transformer.cu
+++ b/src/operator/contrib/transformer.cu
@@ -37,12 +37,25 @@ namespace op {
 
 // Approach in gemm_switch_fp32accum is coming from MLPerf v0.6 submission repository from NVIDIA
 // by https://github.com/kevinstephano
-template<typename DType>
-void CublasStridedBatchedGemm(mshadow::Stream<gpu>* s, bool transA, bool transB,
-                              int32_t m, int32_t n, int32_t k,
-                              float alpha, const DType* a, int32_t lda, int32_t strideA,
-                              const DType *b, int32_t ldb, int32_t strideB, float beta,
-                              DType *c, int32_t ldc, int32_t strideC, int32_t batchCount,
+template <typename DType>
+void CublasStridedBatchedGemm(mshadow::Stream<gpu>* s,
+                              bool transA,
+                              bool transB,
+                              int32_t m,
+                              int32_t n,
+                              int32_t k,
+                              float alpha,
+                              const DType* a,
+                              int32_t lda,
+                              int32_t strideA,
+                              const DType* b,
+                              int32_t ldb,
+                              int32_t strideB,
+                              float beta,
+                              DType* c,
+                              int32_t ldc,
+                              int32_t strideC,
+                              int32_t batchCount,
                               cublasGemmAlgo_t algo = CUBLAS_GEMM_DEFAULT) {
 #if CUDA_VERSION >= 9010
   using namespace mxnet::common::cuda;
@@ -50,25 +63,25 @@ void CublasStridedBatchedGemm(mshadow::Stream<gpu>* s, bool transA, bool transB,
       << "Must init CuBLAS handle in stream";
 
   cublasHandle_t blas_handle = mshadow::Stream<gpu>::GetBlasHandle(s);
-  auto err = CUBLAS_STATUS_SUCCESS;
-  using TrueFP16Type = DType;
-  using PseudoFP16Type = typename CublasType<DType>::ScaleType;
+  auto err                   = CUBLAS_STATUS_SUCCESS;
+  using TrueFP16Type         = DType;
+  using PseudoFP16Type       = typename CublasType<DType>::ScaleType;
   // Set up alpha and beta values in the possible formats needed (only different when dtype == half)
-  TrueFP16Type trueFP16_alpha = static_cast<TrueFP16Type>(alpha);
-  TrueFP16Type trueFP16_beta = static_cast<TrueFP16Type>(beta);
+  TrueFP16Type trueFP16_alpha     = static_cast<TrueFP16Type>(alpha);
+  TrueFP16Type trueFP16_beta      = static_cast<TrueFP16Type>(beta);
   PseudoFP16Type pseudoFP16_alpha = static_cast<PseudoFP16Type>(alpha);
-  PseudoFP16Type pseudoFP16_beta = static_cast<PseudoFP16Type>(beta);
-  const void *alpha_ptr;
-  const void *beta_ptr;
+  PseudoFP16Type pseudoFP16_beta  = static_cast<PseudoFP16Type>(beta);
+  const void* alpha_ptr;
+  const void* beta_ptr;
   cudaDataType_t computeType;
   bool use_true_fp16 = dmlc::GetEnv("MXNET_FC_TRUE_FP16", false);
   if (use_true_fp16) {
-    alpha_ptr = &trueFP16_alpha;
-    beta_ptr = &trueFP16_beta;
+    alpha_ptr   = &trueFP16_alpha;
+    beta_ptr    = &trueFP16_beta;
     computeType = CublasType<TrueFP16Type>::kCudaFlag;
   } else {
-    alpha_ptr = &pseudoFP16_alpha;
-    beta_ptr = &pseudoFP16_beta;
+    alpha_ptr   = &pseudoFP16_alpha;
+    beta_ptr    = &pseudoFP16_beta;
     computeType = CublasType<PseudoFP16Type>::kCudaFlag;
   }
 
@@ -78,55 +91,87 @@ void CublasStridedBatchedGemm(mshadow::Stream<gpu>* s, bool transA, bool transB,
   // to half-precision to use TensorCores
   auto cc_major = (s->prop).major;
   if (cc_major >= 5) {
-    CUBLAS_CALL(cublasGemmStridedBatchedEx(
-        blas_handle, CublasTransposeOp(transA), CublasTransposeOp(transB),
-        static_cast<int>(m), static_cast<int>(n), static_cast<int>(k),
-        alpha_ptr,
-        a, CublasType<DType>::kCudaFlag, static_cast<int>(lda), strideA,
-        b, CublasType<DType>::kCudaFlag, static_cast<int>(ldb), strideB,
-        beta_ptr,
-        c, CublasType<DType>::kCudaFlag, static_cast<int>(ldc), strideC,
-        static_cast<int>(batchCount), computeType, algo));
+    CUBLAS_CALL(cublasGemmStridedBatchedEx(blas_handle,
+                                           CublasTransposeOp(transA),
+                                           CublasTransposeOp(transB),
+                                           static_cast<int>(m),
+                                           static_cast<int>(n),
+                                           static_cast<int>(k),
+                                           alpha_ptr,
+                                           a,
+                                           CublasType<DType>::kCudaFlag,
+                                           static_cast<int>(lda),
+                                           strideA,
+                                           b,
+                                           CublasType<DType>::kCudaFlag,
+                                           static_cast<int>(ldb),
+                                           strideB,
+                                           beta_ptr,
+                                           c,
+                                           CublasType<DType>::kCudaFlag,
+                                           static_cast<int>(ldc),
+                                           strideC,
+                                           static_cast<int>(batchCount),
+                                           computeType,
+                                           algo));
   } else {
     if (std::is_same<DType, float>::value) {
-      CUBLAS_CALL(cublasSgemmStridedBatched(
-          blas_handle, CublasTransposeOp(transA), CublasTransposeOp(transB),
-          static_cast<int>(m), static_cast<int>(n), static_cast<int>(k),
-          reinterpret_cast<float*>(&alpha),
-          reinterpret_cast<const float*>(a),
-          static_cast<int>(lda), strideA,
-          reinterpret_cast<const float*>(b),
-          static_cast<int>(ldb), strideB,
-          reinterpret_cast<float*>(&beta),
-          reinterpret_cast<float*>(c),
-          static_cast<int>(ldc), strideC,
-          static_cast<int>(batchCount)));
+      CUBLAS_CALL(cublasSgemmStridedBatched(blas_handle,
+                                            CublasTransposeOp(transA),
+                                            CublasTransposeOp(transB),
+                                            static_cast<int>(m),
+                                            static_cast<int>(n),
+                                            static_cast<int>(k),
+                                            reinterpret_cast<float*>(&alpha),
+                                            reinterpret_cast<const float*>(a),
+                                            static_cast<int>(lda),
+                                            strideA,
+                                            reinterpret_cast<const float*>(b),
+                                            static_cast<int>(ldb),
+                                            strideB,
+                                            reinterpret_cast<float*>(&beta),
+                                            reinterpret_cast<float*>(c),
+                                            static_cast<int>(ldc),
+                                            strideC,
+                                            static_cast<int>(batchCount)));
     } else if (std::is_same<DType, double>::value) {
-      CUBLAS_CALL(cublasDgemmStridedBatched(
-          blas_handle, CublasTransposeOp(transA), CublasTransposeOp(transB),
-          static_cast<int>(m), static_cast<int>(n), static_cast<int>(k),
-          reinterpret_cast<double*>(&alpha),
-          reinterpret_cast<const double*>(a),
-          static_cast<int>(lda), strideA,
-          reinterpret_cast<const double*>(b),
-          static_cast<int>(ldb), strideB,
-          reinterpret_cast<double*>(&beta),
-          reinterpret_cast<double*>(c),
-          static_cast<int>(ldc), strideC,
-          static_cast<int>(batchCount)));
+      CUBLAS_CALL(cublasDgemmStridedBatched(blas_handle,
+                                            CublasTransposeOp(transA),
+                                            CublasTransposeOp(transB),
+                                            static_cast<int>(m),
+                                            static_cast<int>(n),
+                                            static_cast<int>(k),
+                                            reinterpret_cast<double*>(&alpha),
+                                            reinterpret_cast<const double*>(a),
+                                            static_cast<int>(lda),
+                                            strideA,
+                                            reinterpret_cast<const double*>(b),
+                                            static_cast<int>(ldb),
+                                            strideB,
+                                            reinterpret_cast<double*>(&beta),
+                                            reinterpret_cast<double*>(c),
+                                            static_cast<int>(ldc),
+                                            strideC,
+                                            static_cast<int>(batchCount)));
     } else if (std::is_same<DType, mshadow::half::half_t>::value) {
-      CUBLAS_CALL(cublasHgemmStridedBatched(
-          blas_handle, CublasTransposeOp(transA), CublasTransposeOp(transB),
-          static_cast<int>(m), static_cast<int>(n), static_cast<int>(k),
-          reinterpret_cast<__half*>(&alpha),
-          reinterpret_cast<const __half*>(a),
-          static_cast<int>(lda), strideA,
-          reinterpret_cast<const __half*>(b),
-          static_cast<int>(ldb), strideB,
-          reinterpret_cast<__half*>(&beta),
-          reinterpret_cast<__half*>(c),
-          static_cast<int>(ldc), strideC,
-          static_cast<int>(batchCount)));
+      CUBLAS_CALL(cublasHgemmStridedBatched(blas_handle,
+                                            CublasTransposeOp(transA),
+                                            CublasTransposeOp(transB),
+                                            static_cast<int>(m),
+                                            static_cast<int>(n),
+                                            static_cast<int>(k),
+                                            reinterpret_cast<__half*>(&alpha),
+                                            reinterpret_cast<const __half*>(a),
+                                            static_cast<int>(lda),
+                                            strideA,
+                                            reinterpret_cast<const __half*>(b),
+                                            static_cast<int>(ldb),
+                                            strideB,
+                                            reinterpret_cast<__half*>(&beta),
+                                            reinterpret_cast<__half*>(c),
+                                            static_cast<int>(ldc),
+                                            strideC,
+                                            static_cast<int>(batchCount)));
     } else {
       LOG(FATAL) << "Unsupported DType in CublasStridedBatchedGemm.";
     }
@@ -136,46 +181,92 @@ void CublasStridedBatchedGemm(mshadow::Stream<gpu>* s, bool transA, bool transB,
 #endif
 }
 
-template<typename DType>
-void gemm_switch_fp32accum(mshadow::Stream<gpu>* s, bool transA, bool transB,
-                           int32_t m, int32_t n, int32_t k,
-                           float alpha, const DType *a, int32_t lda,
-                           int32_t strideA, const DType *b, int32_t ldb,
-                           int32_t strideB, float beta, DType *c, int32_t ldc,
-                           int32_t strideC, int32_t batchCount, bool using_fp16) {
+template <typename DType>
+void gemm_switch_fp32accum(mshadow::Stream<gpu>* s,
+                           bool transA,
+                           bool transB,
+                           int32_t m,
+                           int32_t n,
+                           int32_t k,
+                           float alpha,
+                           const DType* a,
+                           int32_t lda,
+                           int32_t strideA,
+                           const DType* b,
+                           int32_t ldb,
+                           int32_t strideB,
+                           float beta,
+                           DType* c,
+                           int32_t ldc,
+                           int32_t strideC,
+                           int32_t batchCount,
+                           bool using_fp16) {
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   if (using_fp16) {
-    CublasStridedBatchedGemm(s, transA, transB, m, n, k, alpha, a, lda, strideA, b, ldb,
-      strideB, beta, c, ldc, strideC, batchCount, CUBLAS_GEMM_DEFAULT_TENSOR_OP);
+    CublasStridedBatchedGemm(s,
+                             transA,
+                             transB,
+                             m,
+                             n,
+                             k,
+                             alpha,
+                             a,
+                             lda,
+                             strideA,
+                             b,
+                             ldb,
+                             strideB,
+                             beta,
+                             c,
+                             ldc,
+                             strideC,
+                             batchCount,
+                             CUBLAS_GEMM_DEFAULT_TENSOR_OP);
   } else {
-    CublasStridedBatchedGemm(s, transA, transB, m, n, k, alpha, a, lda, strideA, b, ldb,
-      strideB, beta, c, ldc, strideC, batchCount);
+    CublasStridedBatchedGemm(s,
+                             transA,
+                             transB,
+                             m,
+                             n,
+                             k,
+                             alpha,
+                             a,
+                             lda,
+                             strideA,
+                             b,
+                             ldb,
+                             strideB,
+                             beta,
+                             c,
+                             ldc,
+                             strideC,
+                             batchCount);
   }
   CHECK_CUDA_ERROR("Error at InterleavedMatMul");
 }
 
 // TODO(cfujitsang): use scale as optional ?
 void InterleavedMatMulSelfAttQKGPU(const nnvm::NodeAttrs& attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<TBlob> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                   const OpContext& ctx,
+                                   const std::vector<TBlob>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     const DType* queries_keys_values = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* output = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const int32_t qkv_seq_len    = inputs[0].shape_[0];
-    const int32_t sequences      = inputs[0].shape_[1];
-    const int32_t output_lin_dim = inputs[0].shape_[2];
-    const int32_t embed_dim      = output_lin_dim / 3;
-    const int32_t head_dim       = embed_dim / params.heads;
-    const int32_t attn_batches   = params.heads * sequences;
-    const int32_t lead_dim       = attn_batches * 3 * head_dim;
-    const int32_t batch_stride   = 3 * head_dim;
-    const float beta             = req[0] == kAddTo ? 1.f : 0.f;
-    const float scale            = 1.0 / sqrt(static_cast<float>(head_dim));
-    const bool using_fp16        = inputs[0].type_flag_ == mshadow::kFloat16;
+    DType* output                    = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const int32_t qkv_seq_len        = inputs[0].shape_[0];
+    const int32_t sequences          = inputs[0].shape_[1];
+    const int32_t output_lin_dim     = inputs[0].shape_[2];
+    const int32_t embed_dim          = output_lin_dim / 3;
+    const int32_t head_dim           = embed_dim / params.heads;
+    const int32_t attn_batches       = params.heads * sequences;
+    const int32_t lead_dim           = attn_batches * 3 * head_dim;
+    const int32_t batch_stride       = 3 * head_dim;
+    const float beta                 = req[0] == kAddTo ? 1.f : 0.f;
+    const float scale                = 1.0 / sqrt(static_cast<float>(head_dim));
+    const bool using_fp16            = inputs[0].type_flag_ == mshadow::kFloat16;
 
     if (req[0] == kNullOp)
       return;
@@ -203,33 +294,35 @@ void InterleavedMatMulSelfAttQKGPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulSelfAttQKGPU(const nnvm::NodeAttrs& attrs,
-                                           const OpContext &ctx,
-                                           const std::vector<TBlob> &inputs,
-                                           const std::vector<OpReqType> &req,
-                                           const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                           const OpContext& ctx,
+                                           const std::vector<TBlob>& inputs,
+                                           const std::vector<OpReqType>& req,
+                                           const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     const DType* output_grads        = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
     const DType* queries_keys_values = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
     DType* queries_keys_values_grads = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const int32_t qkv_seq_len    = inputs[1].shape_[0];
-    const int32_t sequences      = inputs[1].shape_[1];
-    const int32_t output_lin_dim = inputs[1].shape_[2];
-    const int32_t embed_dim      = output_lin_dim / 3;
-    const int32_t head_dim       = embed_dim / params.heads;
-    const int32_t attn_batches   = params.heads * sequences;
-    const int32_t lead_dim       = attn_batches * 3 * head_dim;
-    const int32_t batch_stride   = 3 * head_dim;
-    const float scale            = 1.0 / sqrt(static_cast<float>(head_dim));
-    const float beta             = req[0] == kAddTo ? 1.f : 0.f;
-    const bool using_fp16        = inputs[0].type_flag_ == mshadow::kFloat16;
+    const int32_t qkv_seq_len        = inputs[1].shape_[0];
+    const int32_t sequences          = inputs[1].shape_[1];
+    const int32_t output_lin_dim     = inputs[1].shape_[2];
+    const int32_t embed_dim          = output_lin_dim / 3;
+    const int32_t head_dim           = embed_dim / params.heads;
+    const int32_t attn_batches       = params.heads * sequences;
+    const int32_t lead_dim           = attn_batches * 3 * head_dim;
+    const int32_t batch_stride       = 3 * head_dim;
+    const float scale                = 1.0 / sqrt(static_cast<float>(head_dim));
+    const float beta                 = req[0] == kAddTo ? 1.f : 0.f;
+    const bool using_fp16            = inputs[0].type_flag_ == mshadow::kFloat16;
 
     if (req[0] == kNullOp)
       return;
 
     if (req[0] == kWriteTo) {
-      cudaMemsetAsync(queries_keys_values_grads, 0, outputs[0].shape_.Size() * sizeof(DType),
+      cudaMemsetAsync(queries_keys_values_grads,
+                      0,
+                      outputs[0].shape_.Size() * sizeof(DType),
                       mshadow::Stream<gpu>::GetStream(s));
     }
 
@@ -275,27 +368,27 @@ void BackwardInterleavedMatMulSelfAttQKGPU(const nnvm::NodeAttrs& attrs,
 }
 
 void InterleavedMatMulSelfAttValAttGPU(const nnvm::NodeAttrs& attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<TBlob> &inputs,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     const DType* queries_keys_values = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
     const DType* attention_maps      = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
     DType* output                    = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const int32_t qkv_seq_len    = inputs[0].shape_[0];
-    const int32_t sequences      = inputs[0].shape_[1];
-    const int32_t output_lin_dim = inputs[0].shape_[2];
-    const int32_t embed_dim      = output_lin_dim / 3;
-    const int32_t head_dim       = embed_dim / params.heads;
-    const int32_t attn_batches   = params.heads * sequences;
-    const int32_t lead_dim       = attn_batches * 3 * head_dim;
-    const int32_t batch_stride   = 3 * head_dim;
-    const float alpha            = 1.f;
-    const float beta             = req[0] == kAddTo ? 1.f : 0.f;
-    const bool using_fp16        = inputs[0].type_flag_ == mshadow::kFloat16;
+    const int32_t qkv_seq_len        = inputs[0].shape_[0];
+    const int32_t sequences          = inputs[0].shape_[1];
+    const int32_t output_lin_dim     = inputs[0].shape_[2];
+    const int32_t embed_dim          = output_lin_dim / 3;
+    const int32_t head_dim           = embed_dim / params.heads;
+    const int32_t attn_batches       = params.heads * sequences;
+    const int32_t lead_dim           = attn_batches * 3 * head_dim;
+    const int32_t batch_stride       = 3 * head_dim;
+    const float alpha                = 1.f;
+    const float beta                 = req[0] == kAddTo ? 1.f : 0.f;
+    const bool using_fp16            = inputs[0].type_flag_ == mshadow::kFloat16;
 
     if (req[0] == kNullOp)
       return;
@@ -323,32 +416,34 @@ void InterleavedMatMulSelfAttValAttGPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulSelfAttValAttGPU(const nnvm::NodeAttrs& attrs,
-                                               const OpContext &ctx,
-                                               const std::vector<TBlob> &inputs,
-                                               const std::vector<OpReqType> &req,
-                                               const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                               const OpContext& ctx,
+                                               const std::vector<TBlob>& inputs,
+                                               const std::vector<OpReqType>& req,
+                                               const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    const DType* output_grads              = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* queries_keys_values       = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* attention_maps            = inputs[2].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* queries_keys_values_grads       = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* attention_maps_grads            = outputs[1].FlatTo2D<gpu, DType>(s).dptr_;
-    const int32_t qkv_seq_len    = inputs[1].shape_[0];
-    const int32_t sequences      = inputs[1].shape_[1];
-    const int32_t output_lin_dim = inputs[1].shape_[2];
-    const int32_t embed_dim      = output_lin_dim / 3;
-    const int32_t head_dim       = embed_dim / params.heads;
-    const int32_t attn_batches   = params.heads * sequences;
-    const int32_t lead_dim       = attn_batches * 3 * head_dim;
-    const int32_t batch_stride   = 3 * head_dim;
-    const float alpha            = 1.f;
-    const bool using_fp16        = inputs[0].type_flag_ == mshadow::kFloat16;
+    const DType* output_grads        = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* queries_keys_values = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* attention_maps      = inputs[2].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* queries_keys_values_grads = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* attention_maps_grads      = outputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    const int32_t qkv_seq_len        = inputs[1].shape_[0];
+    const int32_t sequences          = inputs[1].shape_[1];
+    const int32_t output_lin_dim     = inputs[1].shape_[2];
+    const int32_t embed_dim          = output_lin_dim / 3;
+    const int32_t head_dim           = embed_dim / params.heads;
+    const int32_t attn_batches       = params.heads * sequences;
+    const int32_t lead_dim           = attn_batches * 3 * head_dim;
+    const int32_t batch_stride       = 3 * head_dim;
+    const float alpha                = 1.f;
+    const bool using_fp16            = inputs[0].type_flag_ == mshadow::kFloat16;
 
     if (req[0] != kNullOp) {
       if (req[0] == kWriteTo) {
-        cudaMemsetAsync(queries_keys_values_grads, 0, outputs[0].shape_.Size() * sizeof(DType),
+        cudaMemsetAsync(queries_keys_values_grads,
+                        0,
+                        outputs[0].shape_.Size() * sizeof(DType),
                         mshadow::Stream<gpu>::GetStream(s));
       }
       const float beta = req[0] == kAddTo ? 1.f : 0.f;
@@ -397,18 +492,17 @@ void BackwardInterleavedMatMulSelfAttValAttGPU(const nnvm::NodeAttrs& attrs,
   })
 }
 
-
 void InterleavedMatMulEncDecQKGPU(const nnvm::NodeAttrs& attrs,
-                                  const OpContext &ctx,
-                                  const std::vector<TBlob> &inputs,
-                                  const std::vector<OpReqType> &req,
-                                  const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                  const OpContext& ctx,
+                                  const std::vector<TBlob>& inputs,
+                                  const std::vector<OpReqType>& req,
+                                  const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    const DType* queries     = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* keys_values = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* output            = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* queries            = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* keys_values        = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* output                   = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
     const int32_t q_seq_len         = inputs[0].shape_[0];
     const int32_t sequences         = inputs[0].shape_[1];
     const int32_t output_lin_q_dim  = inputs[0].shape_[2];
@@ -451,18 +545,18 @@ void InterleavedMatMulEncDecQKGPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulEncDecQKGPU(const nnvm::NodeAttrs& attrs,
-                                          const OpContext &ctx,
-                                          const std::vector<TBlob> &inputs,
-                                          const std::vector<OpReqType> &req,
-                                          const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                          const OpContext& ctx,
+                                          const std::vector<TBlob>& inputs,
+                                          const std::vector<OpReqType>& req,
+                                          const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    const DType* output_grads = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* queries       = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* keys_values   = inputs[2].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* queries_grads       = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* keys_values_grads   = outputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* output_grads       = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* queries            = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* keys_values        = inputs[2].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* queries_grads            = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* keys_values_grads        = outputs[1].FlatTo2D<gpu, DType>(s).dptr_;
     const int32_t q_seq_len         = inputs[1].shape_[0];
     const int32_t sequences         = inputs[1].shape_[1];
     const int32_t output_lin_q_dim  = inputs[1].shape_[2];
@@ -476,7 +570,7 @@ void BackwardInterleavedMatMulEncDecQKGPU(const nnvm::NodeAttrs& attrs,
     const int32_t batch_stride_q    = head_dim;
     const int32_t batch_stride_kv   = head_dim * 2;
     const float scale               = 1.f / sqrt(static_cast<float>(head_dim));
-    const bool using_fp16        = inputs[0].type_flag_ == mshadow::kFloat16;
+    const bool using_fp16           = inputs[0].type_flag_ == mshadow::kFloat16;
 
     if (req[0] != kNullOp) {
       const float beta = req[0] == kAddTo ? 1.f : 0.f;
@@ -502,7 +596,9 @@ void BackwardInterleavedMatMulEncDecQKGPU(const nnvm::NodeAttrs& attrs,
     }
     if (req[1] != kNullOp) {
       if (req[1] == kWriteTo) {
-        cudaMemsetAsync(keys_values_grads, 0, outputs[1].shape_.Size() * sizeof(DType),
+        cudaMemsetAsync(keys_values_grads,
+                        0,
+                        outputs[1].shape_.Size() * sizeof(DType),
                         mshadow::Stream<gpu>::GetStream(s));
       }
       const float beta = req[1] == kAddTo ? 1.f : 0.f;
@@ -530,16 +626,16 @@ void BackwardInterleavedMatMulEncDecQKGPU(const nnvm::NodeAttrs& attrs,
 }
 
 void InterleavedMatMulEncDecValAttGPU(const nnvm::NodeAttrs& attrs,
-                                      const OpContext &ctx,
-                                      const std::vector<TBlob> &inputs,
-                                      const std::vector<OpReqType> &req,
-                                      const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                      const OpContext& ctx,
+                                      const std::vector<TBlob>& inputs,
+                                      const std::vector<OpReqType>& req,
+                                      const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    const DType* keys_values    = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* attention_maps = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* output               = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* keys_values        = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* attention_maps     = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* output                   = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
     const int32_t kv_seq_len        = inputs[0].shape_[0];
     const int32_t sequences         = inputs[0].shape_[1];
     const int32_t output_lin_kv_dim = inputs[0].shape_[2];
@@ -579,18 +675,18 @@ void InterleavedMatMulEncDecValAttGPU(const nnvm::NodeAttrs& attrs,
 }
 
 void BackwardInterleavedMatMulEncDecValAttGPU(const nnvm::NodeAttrs& attrs,
-                                              const OpContext &ctx,
-                                              const std::vector<TBlob> &inputs,
-                                              const std::vector<OpReqType> &req,
-                                              const std::vector<TBlob> &outputs) {
-  const auto& params = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
+                                              const OpContext& ctx,
+                                              const std::vector<TBlob>& inputs,
+                                              const std::vector<OpReqType>& req,
+                                              const std::vector<TBlob>& outputs) {
+  const auto& params      = nnvm::get<InterleavedMatMulParam>(attrs.parsed);
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    const DType* output_grads   = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* keys_values    = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* attention_maps = inputs[2].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* keys_values_grads    = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
-    DType* attention_maps_grads = outputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* output_grads       = inputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* keys_values        = inputs[1].FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* attention_maps     = inputs[2].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* keys_values_grads        = outputs[0].FlatTo2D<gpu, DType>(s).dptr_;
+    DType* attention_maps_grads     = outputs[1].FlatTo2D<gpu, DType>(s).dptr_;
     const int32_t kv_seq_len        = inputs[1].shape_[0];
     const int32_t sequences         = inputs[1].shape_[1];
     const int32_t output_lin_kv_dim = inputs[1].shape_[2];
@@ -605,7 +701,9 @@ void BackwardInterleavedMatMulEncDecValAttGPU(const nnvm::NodeAttrs& attrs,
 
     if (req[0] != kNullOp) {
       if (req[0] == kWriteTo) {
-        cudaMemsetAsync(keys_values_grads, 0, outputs[0].shape_.Size() * sizeof(DType),
+        cudaMemsetAsync(keys_values_grads,
+                        0,
+                        outputs[0].shape_.Size() * sizeof(DType),
                         mshadow::Stream<gpu>::GetStream(s));
       }
       const float beta = req[0] == kAddTo ? 1.f : 0.f;
@@ -655,48 +753,47 @@ void BackwardInterleavedMatMulEncDecValAttGPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_selfatt_qk)
-.set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulSelfAttQKGPU);
+    .set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulSelfAttQKGPU);
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_selfatt_valatt)
-.set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulSelfAttValAttGPU);
+    .set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulSelfAttValAttGPU);
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_encdec_qk)
-.set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulEncDecQKGPU);
+    .set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulEncDecQKGPU);
 
 NNVM_REGISTER_OP(_contrib_interleaved_matmul_encdec_valatt)
-.set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulEncDecValAttGPU);
+    .set_attr<FCompute>("FCompute<gpu>", InterleavedMatMulEncDecValAttGPU);
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_selfatt_qk)
-.set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulSelfAttQKGPU);
+    .set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulSelfAttQKGPU);
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_selfatt_valatt)
-.set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulSelfAttValAttGPU);
+    .set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulSelfAttValAttGPU);
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_encdec_qk)
-.set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulEncDecQKGPU);
+    .set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulEncDecQKGPU);
 
 NNVM_REGISTER_OP(_backward_interleaved_matmul_encdec_valatt)
-.set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulEncDecValAttGPU);
+    .set_attr<FCompute>("FCompute<gpu>", BackwardInterleavedMatMulEncDecValAttGPU);
 
 // relu
 NNVM_REGISTER_OP(_contrib_div_sqrt_dim)
-.set_attr<FCompute>("FCompute<gpu>", DivSqrtDimForward_<gpu>);
-
+    .set_attr<FCompute>("FCompute<gpu>", DivSqrtDimForward_<gpu>);
 
 NNVM_REGISTER_OP(_contrib_sldwin_atten_mask_like)
-.set_attr<FCompute>("FCompute<gpu>", SldWinAttenMaskLikeForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SldWinAttenMaskLikeForward<gpu>);
 
 NNVM_REGISTER_OP(_contrib_sldwin_atten_score)
-.set_attr<FCompute>("FCompute<gpu>", SldWinAttenScoreForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SldWinAttenScoreForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_sldwin_atten_score)
-.set_attr<FCompute>("FCompute<gpu>", SldWinAttenScoreBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SldWinAttenScoreBackward<gpu>);
 
 NNVM_REGISTER_OP(_contrib_sldwin_atten_context)
-.set_attr<FCompute>("FCompute<gpu>", SldWinAttenContextForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SldWinAttenContextForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_sldwin_atten_context)
-.set_attr<FCompute>("FCompute<gpu>", SldWinAttenContextBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SldWinAttenContextBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/contrib/tvmop/dot.cc b/src/operator/contrib/tvmop/dot.cc
index c6bec570a7e8..3ea54de21ac2 100644
--- a/src/operator/contrib/tvmop/dot.cc
+++ b/src/operator/contrib/tvmop/dot.cc
@@ -40,7 +40,7 @@ int SplitSch(const ::tvm::runtime::TVMOpConfig& config,
              const ::std::string& name,
              const std::vector<int>& size) {
   const ::tvm::runtime::OtherOptionSpace& space = config.get_space(name);
-  int weight = config.get_weight(name);
+  int weight                                    = config.get_weight(name);
   int num_space = space.size(), num_size = size.size();
   for (int i = 0; i < num_space; ++i) {
     bool flag = true;
@@ -62,12 +62,12 @@ std::string DotSch(const std::string name,
                    const mxnet::ShapeVector& in_attrs,
                    const mxnet::ShapeVector& out_attrs) {
   const ::tvm::runtime::TVMOpConfig& config = tvm::runtime::GetOpConfig(name);
-  int m = in_attrs[0][0];
-  int k = in_attrs[0][1];
-  int n = in_attrs[1][1];
-  int idx_bn = SplitSch(config, "bn", {m, n});
-  int idx_factor = SplitSch(config, "factor", {k});
-  int idx = idx_bn + idx_factor;
+  int m                                     = in_attrs[0][0];
+  int k                                     = in_attrs[0][1];
+  int n                                     = in_attrs[1][1];
+  int idx_bn                                = SplitSch(config, "bn", {m, n});
+  int idx_factor                            = SplitSch(config, "factor", {k});
+  int idx                                   = idx_bn + idx_factor;
   if (idx_bn == -1 || idx_factor == -1) {
     return "fallback";
   }
@@ -75,33 +75,33 @@ std::string DotSch(const std::string name,
 }
 
 void TVMDotForward(const nnvm::NodeAttrs& attrs,
-                const mxnet::OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                   const mxnet::OpContext& ctx,
+                   const std::vector<TBlob>& inputs,
+                   const std::vector<OpReqType>& req,
+                   const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   std::string funcname = "dot";
-  std::string sch = DotSch(funcname, attrs, {inputs[0].shape_, inputs[1].shape_},
-                           {outputs[0].shape_});
+  std::string sch =
+      DotSch(funcname, attrs, {inputs[0].shape_, inputs[1].shape_}, {outputs[0].shape_});
   tvm::runtime::TVMOpModule::Get()->Call(funcname + sch, ctx, {inputs[0], inputs[1], outputs[0]});
 }
 
 void TVMDotFallbackForward(const nnvm::NodeAttrs& attrs,
-                        const mxnet::OpContext& ctx,
-                        const std::vector<TBlob>& inputs,
-                        const std::vector<OpReqType>& req,
-                        const std::vector<TBlob>& outputs) {
+                           const mxnet::OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   std::string funcname = "dot";
-  std::string sch = "fallback";
+  std::string sch      = "fallback";
   tvm::runtime::TVMOpModule::Get()->Call(funcname + sch, ctx, {inputs[0], inputs[1], outputs[0]});
 }
 
 bool TVMDotShape(const nnvm::NodeAttrs& attrs,
-              mxnet::ShapeVector *in_attrs,
-              mxnet::ShapeVector *out_attrs) {
+                 mxnet::ShapeVector* in_attrs,
+                 mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& a_shape = in_attrs->at(0);
@@ -128,9 +128,9 @@ NNVM_REGISTER_OP(_contrib_tvm_dot)
     .add_argument("a", "NDArray-or-Symbol", "first input")
     .add_argument("b", "NDArray-or-Symbol", "second input")
     .set_attr<nnvm::FListInputNames>("FListInputNames",
-      [](const NodeAttrs& attrs) {
-        return std::vector<std::string>{"a", "b"};
-      })
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
     .set_attr<mxnet::FInferShape>("FInferShape", TVMDotShape)
     .set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
     .set_attr<mxnet::FCompute>("FCompute<cpu>", TVMDotForward);
@@ -141,9 +141,9 @@ NNVM_REGISTER_OP(_contrib_tvm_dot_fallback)
     .add_argument("a", "NDArray-or-Symbol", "first input")
     .add_argument("b", "NDArray-or-Symbol", "second input")
     .set_attr<nnvm::FListInputNames>("FListInputNames",
-      [](const NodeAttrs& attrs) {
-        return std::vector<std::string>{"a", "b"};
-      })
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
     .set_attr<mxnet::FInferShape>("FInferShape", TVMDotShape)
     .set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
     .set_attr<mxnet::FCompute>("FCompute<cpu>", TVMDotFallbackForward);
diff --git a/src/operator/contrib/tvmop/ufunc.cc b/src/operator/contrib/tvmop/ufunc.cc
index e6f5653022e0..f2b214fe2813 100644
--- a/src/operator/contrib/tvmop/ufunc.cc
+++ b/src/operator/contrib/tvmop/ufunc.cc
@@ -36,11 +36,11 @@
 namespace mxnet {
 namespace op {
 
-static constexpr char func_vadd_cpu[] = "vadd";
-static constexpr char func_vadd_gpu[] = "cuda_vadd";
+static constexpr char func_vadd_cpu[]          = "vadd";
+static constexpr char func_vadd_gpu[]          = "cuda_vadd";
 static constexpr char func_bakcward_vadd_cpu[] = "backward_vadd";
 static constexpr char func_bakcward_vadd_gpu[] = "cuda_backward_vadd";
-static constexpr int max_dim = 5;
+static constexpr int max_dim                   = 5;
 
 TBlob padding(const TBlob& tblob, const int max_dim) {
   TShape tshape(max_dim, 1);
@@ -51,7 +51,7 @@ TBlob padding(const TBlob& tblob, const int max_dim) {
   return tblob.reshape(tshape);
 }
 
-template<const char* func>
+template <const char* func>
 void TVMBinaryCompute(const nnvm::NodeAttrs& attrs,
                       const mxnet::OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -67,7 +67,7 @@ void TVMBinaryCompute(const nnvm::NodeAttrs& attrs,
   tvm::runtime::TVMOpModule::Get()->Call(func, ctx, {idata[0], idata[1], odata});
 }
 
-template<const char* func>
+template <const char* func>
 void TVMBinaryBackwardComputeUseNone(const nnvm::NodeAttrs& attrs,
                                      const mxnet::OpContext& ctx,
                                      const std::vector<TBlob>& inputs,
@@ -122,9 +122,9 @@ NNVM_REGISTER_OP(_contrib_tvm_vadd)
     .add_argument("a", "NDArray-or-Symbol", "first input")
     .add_argument("b", "NDArray-or-Symbol", "second input")
     .set_attr<nnvm::FListInputNames>("FListInputNames",
-      [](const NodeAttrs& attrs) {
-        return std::vector<std::string>{"a", "b"};
-      })
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
     .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
     .set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
 #if MXNET_USE_CUDA
@@ -152,13 +152,12 @@ inline bool DegandradOpType(const nnvm::NodeAttrs& attrs,
 
   TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
-  CHECK(in_attrs->at(0) == mshadow::kFloat64 ||
-        in_attrs->at(0) == mshadow::kFloat32)
-    << "Only support float32 and float64.";
+  CHECK(in_attrs->at(0) == mshadow::kFloat64 || in_attrs->at(0) == mshadow::kFloat32)
+      << "Only support float32 and float64.";
   return out_attrs->at(0) != -1;
 }
 
-template<const char* func>
+template <const char* func>
 void TVMUnaryCompute(const nnvm::NodeAttrs& attrs,
                      const mxnet::OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -173,7 +172,7 @@ void TVMUnaryCompute(const nnvm::NodeAttrs& attrs,
   tvm::runtime::TVMOpModule::Get()->Call(func, ctx, {inputs[0], outputs[0]});
 }
 
-template<const char* func>
+template <const char* func>
 void TVMUnaryBackwardComputeUseNone(const nnvm::NodeAttrs& attrs,
                                     const mxnet::OpContext& ctx,
                                     const std::vector<TBlob>& inputs,
@@ -193,70 +192,69 @@ void TVMUnaryBackwardComputeUseNone(const nnvm::NodeAttrs& attrs,
     } else {
       funcname += "kAddTo";
     }
-    tvm::runtime::TVMOpModule::Get()->Call(funcname, ctx,
-      {inputs[0], outputs[0], outputs[0]});
+    tvm::runtime::TVMOpModule::Get()->Call(funcname, ctx, {inputs[0], outputs[0], outputs[0]});
   })
 }
 
-static constexpr char func_deg2rad_cpu[] = "deg2rad";
-static constexpr char func_deg2rad_gpu[] = "cuda_deg2rad";
+static constexpr char func_deg2rad_cpu[]          = "deg2rad";
+static constexpr char func_deg2rad_gpu[]          = "cuda_deg2rad";
 static constexpr char func_backward_deg2rad_cpu[] = "backward_deg2rad";
 static constexpr char func_backward_deg2rad_gpu[] = "cuda_backward_deg2rad";
 
 NNVM_REGISTER_OP(_npi_deg2rad)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", mxnet::op::ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", mxnet::op::DegandradOpType)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", mxnet::op::ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", mxnet::op::DegandradOpType)
 #if MXNET_USE_CUDA
-.set_attr<mxnet::FCompute>("FCompute<gpu>", mxnet::op::TVMUnaryCompute<func_deg2rad_gpu>)
+    .set_attr<mxnet::FCompute>("FCompute<gpu>", mxnet::op::TVMUnaryCompute<func_deg2rad_gpu>)
 #endif  // MXNET_USE_CUDA
-.set_attr<mxnet::FCompute>("FCompute<cpu>", mxnet::op::TVMUnaryCompute<func_deg2rad_cpu>)
-.add_argument("data", "NDArray-or-Symbol", "the input")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_deg2rad"});
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", mxnet::op::TVMUnaryCompute<func_deg2rad_cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "the input")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_deg2rad"});
 
 NNVM_REGISTER_OP(_backward_npi_deg2rad)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
 #if MXNET_USE_CUDA
-.set_attr<FCompute>("FCompute<gpu>",
-                    mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_deg2rad_gpu>)
+    .set_attr<FCompute>("FCompute<gpu>",
+                        mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_deg2rad_gpu>)
 #endif  // MXNET_USE_CUDA
-.set_attr<FCompute>("FCompute<cpu>",
-                    mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_deg2rad_cpu>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_deg2rad_cpu>);
 
-static constexpr char func_rad2deg_cpu[] = "rad2deg";
-static constexpr char func_rad2deg_gpu[] = "cuda_rad2deg";
+static constexpr char func_rad2deg_cpu[]          = "rad2deg";
+static constexpr char func_rad2deg_gpu[]          = "cuda_rad2deg";
 static constexpr char func_backward_rad2deg_cpu[] = "backward_rad2deg";
 static constexpr char func_backward_rad2deg_gpu[] = "cuda_backward_rad2deg";
 
 NNVM_REGISTER_OP(_npi_rad2deg)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", mxnet::op::ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", mxnet::op::DegandradOpType)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", mxnet::op::ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", mxnet::op::DegandradOpType)
 #if MXNET_USE_CUDA
-.set_attr<mxnet::FCompute>("FCompute<gpu>", mxnet::op::TVMUnaryCompute<func_rad2deg_gpu>)
+    .set_attr<mxnet::FCompute>("FCompute<gpu>", mxnet::op::TVMUnaryCompute<func_rad2deg_gpu>)
 #endif  // MXNET_USE_CUDA
-.set_attr<mxnet::FCompute>("FCompute<cpu>", mxnet::op::TVMUnaryCompute<func_rad2deg_cpu>)
-.add_argument("data", "NDArray-or-Symbol", "the input")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_rad2deg"});
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", mxnet::op::TVMUnaryCompute<func_rad2deg_cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "the input")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_rad2deg"});
 
 NNVM_REGISTER_OP(_backward_npi_rad2deg)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
 #if MXNET_USE_CUDA
-.set_attr<FCompute>("FCompute<gpu>",
-                    mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_rad2deg_gpu>)
+    .set_attr<FCompute>("FCompute<gpu>",
+                        mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_rad2deg_gpu>)
 #endif  // MXNET_USE_CUDA
-.set_attr<FCompute>("FCompute<cpu>",
-                    mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_rad2deg_cpu>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        mxnet::op::TVMUnaryBackwardComputeUseNone<func_backward_rad2deg_cpu>);
 }  // namespace op
 }  // namespace mxnet
 #endif  // MXNET_USE_TVM_OP
diff --git a/src/operator/control_flow.cc b/src/operator/control_flow.cc
index 02620831b524..8d52b1aae1ff 100644
--- a/src/operator/control_flow.cc
+++ b/src/operator/control_flow.cc
@@ -45,29 +45,23 @@ struct ForeachParam : public dmlc::Parameter<ForeachParam> {
   // The location of remaining arrays in the subgraph inputs.
   mxnet::Tuple<dim_t> remain_locs;
   DMLC_DECLARE_PARAMETER(ForeachParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs.");
-    DMLC_DECLARE_FIELD(num_outputs)
-    .describe("The number of outputs of the subgraph.");
-    DMLC_DECLARE_FIELD(num_out_data)
-    .describe("The number of output data of the subgraph.");
-    DMLC_DECLARE_FIELD(in_state_locs)
-    .describe("The locations of loop states among the inputs.");
-    DMLC_DECLARE_FIELD(in_data_locs)
-    .describe("The locations of input data among the inputs.");
-    DMLC_DECLARE_FIELD(remain_locs)
-    .describe("The locations of remaining data among the inputs.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs.");
+    DMLC_DECLARE_FIELD(num_outputs).describe("The number of outputs of the subgraph.");
+    DMLC_DECLARE_FIELD(num_out_data).describe("The number of output data of the subgraph.");
+    DMLC_DECLARE_FIELD(in_state_locs).describe("The locations of loop states among the inputs.");
+    DMLC_DECLARE_FIELD(in_data_locs).describe("The locations of input data among the inputs.");
+    DMLC_DECLARE_FIELD(remain_locs).describe("The locations of remaining data among the inputs.");
   }
 };  // struct ForeachParam
 
 DMLC_REGISTER_PARAMETER(ForeachParam);
 
-class ForeachState: public LoopState {
+class ForeachState : public LoopState {
  public:
   ForeachParam params;
   int num_iterations;
 
-  ForeachState(const nnvm::Symbol &g, const ForeachParam &params) : LoopState(g, false) {
+  ForeachState(const nnvm::Symbol& g, const ForeachParam& params) : LoopState(g, false) {
     this->params = params;
   }
 };
@@ -77,18 +71,18 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
                                 const std::vector<NDArray>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<NDArray>& outputs) {
-  ForeachState &state = state_ptr.get_state<ForeachState>();
+  ForeachState& state        = state_ptr.get_state<ForeachState>();
   const ForeachParam& params = state.params;
-  const size_t iter_dim = 0;
-  CHECK_EQ(outputs.size(), (size_t) params.num_outputs);
+  const size_t iter_dim      = 0;
+  CHECK_EQ(outputs.size(), (size_t)params.num_outputs);
   CHECK_GT(params.in_data_locs.ndim(), 0);
-  size_t len = inputs[0].shape()[iter_dim];
+  size_t len           = inputs[0].shape()[iter_dim];
   state.num_iterations = len;
   for (int i = 1; i < params.in_data_locs.ndim(); i++)
     CHECK_EQ(inputs[i].shape()[iter_dim], len);
-  for (size_t i = 0; i < (size_t) params.num_out_data; i++)
+  for (size_t i = 0; i < (size_t)params.num_out_data; i++)
     CHECK_EQ(len, outputs[i].shape()[iter_dim]);
-  for (const auto &arr : outputs)
+  for (const auto& arr : outputs)
     CHECK_EQ(arr.storage_type(), kDefaultStorage)
         << "The for operator doesn't support the sparse format";
 
@@ -98,21 +92,19 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
   // of the subgraph share the same memory.
   std::vector<NDArray> subg_outputs1(outputs.size());
   std::vector<NDArray> subg_outputs2(outputs.size());
-  std::vector<NDArray> *subg_outputs[2]{&subg_outputs1, &subg_outputs2};
+  std::vector<NDArray>* subg_outputs[2]{&subg_outputs1, &subg_outputs2};
   // If the length is an odd number, the last iteration will use the first set
   // of outputs. In this way, we don't need to copy the results from the
   // subgraph to the final outputs of the loop.
   if (len % 2 == 1) {
     for (size_t i = params.num_out_data; i < subg_outputs1.size(); i++) {
       subg_outputs1[i] = outputs[i];
-      subg_outputs2[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true,
-                                 outputs[i].dtype());
+      subg_outputs2[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
     }
   } else {
     // Otherwise, we'll use the second set of outputs.
     for (size_t i = params.num_out_data; i < subg_outputs1.size(); i++) {
-      subg_outputs1[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true,
-                                 outputs[i].dtype());
+      subg_outputs1[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
       subg_outputs2[i] = outputs[i];
     }
   }
@@ -124,23 +116,23 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
   // The remaining arrays (other than input data and states) only need to be set once.
   for (int j = 0; j < params.remain_locs.ndim(); j++) {
     CHECK_LT(params.remain_locs[j], subg_inputs.size());
-    subg_inputs[params.remain_locs[j]] = inputs[j + params.in_data_locs.ndim()
-        + params.in_state_locs.ndim()];
+    subg_inputs[params.remain_locs[j]] =
+        inputs[j + params.in_data_locs.ndim() + params.in_state_locs.ndim()];
   }
 
   // Here we iterate over the first dimension of the first input array.
   for (size_t i = 0; i < len; i++) {
     // Initialize outputs for the subgraph.
-    std::vector<NDArray> *subg_out_curr = subg_outputs[i % 2];
-    std::vector<NDArray> *subg_out_prev = subg_outputs[(i + 1) % 2];
+    std::vector<NDArray>* subg_out_curr = subg_outputs[i % 2];
+    std::vector<NDArray>* subg_out_prev = subg_outputs[(i + 1) % 2];
     for (int j = 0; j < params.num_out_data; j++)
       (*subg_out_curr)[j] = outputs[j].At(i);
     // When recording for backward computation, we should make sure
     // that output arrays are actually different in each iteration.
     if (ctx.need_grad && i < len - 1) {
       for (size_t j = params.num_out_data; j < subg_out_curr->size(); j++)
-        (*subg_out_curr)[j] = NDArray(outputs[j].shape(), outputs[j].ctx(),
-                                      true, outputs[j].dtype());
+        (*subg_out_curr)[j] =
+            NDArray(outputs[j].shape(), outputs[j].ctx(), true, outputs[j].dtype());
     } else if (ctx.need_grad && i == len - 1) {
       // For the last iteration, we need to write data to the output array
       // directly.
@@ -151,7 +143,7 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
     // Initialize inputs for the subgraph.
     // Get a slice from the input data arrays.
     for (int j = 0; j < params.in_data_locs.ndim(); j++) {
-      size_t loc = params.in_data_locs[j];
+      size_t loc       = params.in_data_locs[j];
       subg_inputs[loc] = inputs[j].At(i);
     }
     // For the rest of the iterations, the states are the outputs
@@ -178,14 +170,14 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
                                     const std::vector<NDArray>& inputs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<NDArray>& outputs) {
-  ForeachState &state = state_ptr.get_state<ForeachState>();
+  ForeachState& state        = state_ptr.get_state<ForeachState>();
   const ForeachParam& params = state.params;
-  CHECK_EQ(outputs.size(), (size_t) params.num_args - 1);
+  CHECK_EQ(outputs.size(), (size_t)params.num_args - 1);
   CHECK_GT(params.in_data_locs.ndim(), 0);
-  for (const auto &arr : outputs)
+  for (const auto& arr : outputs)
     CHECK_EQ(arr.storage_type(), kDefaultStorage)
         << "The for operator doesn't support the sparse format";
-  int len = state.num_iterations;
+  int len                = state.num_iterations;
   size_t num_output_data = params.num_out_data;
 
   // In backward computation, we need to run iterations from backwards.
@@ -206,10 +198,10 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
 
   // [remaining vars]
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
-    size_t loc = params.remain_locs[i];
-    size_t orig_loc = i + params.in_data_locs.ndim() + params.in_state_locs.ndim();
+    size_t loc       = params.remain_locs[i];
+    size_t orig_loc  = i + params.in_data_locs.ndim() + params.in_state_locs.ndim();
     subg_igrads[loc] = outputs[orig_loc];
-    subg_req[loc] = req[orig_loc];
+    subg_req[loc]    = req[orig_loc];
   }
 
   for (int iter_num = len - 1; iter_num >= 0; iter_num--) {
@@ -219,21 +211,21 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
       // For the rest of the iterations, we should add graidents to the
       // remaining vars.
       for (int i = 0; i < params.remain_locs.ndim(); i++) {
-        size_t loc = params.remain_locs[i];
+        size_t loc    = params.remain_locs[i];
         subg_req[loc] = kAddTo;
       }
     }
 
     // [data vars]
     for (int i = 0; i < params.in_data_locs.ndim(); i++) {
-      size_t loc = params.in_data_locs[i];
+      size_t loc       = params.in_data_locs[i];
       subg_igrads[loc] = outputs[i].At(iter_num);
-      subg_req[loc] = req[i];
+      subg_req[loc]    = req[i];
     }
     // [loop vars]
     for (int i = 0; i < params.in_state_locs.ndim(); i++) {
-      size_t loc = params.in_state_locs[i];
-      const NDArray &output = outputs[i + params.in_data_locs.ndim()];
+      size_t loc            = params.in_state_locs[i];
+      const NDArray& output = outputs[i + params.in_data_locs.ndim()];
       if (iter_num != 0) {
         // For state gradients, we need to allocate new NDArrays
         // because intermediate state gradients won't be returned to the users.
@@ -257,17 +249,19 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
   state.Cleanup();
 }
 
-template<typename T>
-static void remap(const std::vector<T> &op_in, size_t start,
-                  const mxnet::Tuple<dim_t> &locs, std::vector<T> *subg_in) {
+template <typename T>
+static void remap(const std::vector<T>& op_in,
+                  size_t start,
+                  const mxnet::Tuple<dim_t>& locs,
+                  std::vector<T>* subg_in) {
   auto op_in_it = op_in.begin() + start;
   for (int i = 0; i < locs.ndim(); i++) {
-    dim_t loc = locs[i];
+    dim_t loc        = locs[i];
     subg_in->at(loc) = *(op_in_it + i);
   }
 }
 
-static inline mxnet::TShape SliceFirstDim(const mxnet::TShape &s) {
+static inline mxnet::TShape SliceFirstDim(const mxnet::TShape& s) {
   if (s.ndim() > 1) {
     return mxnet::TShape(s.begin() + 1, s.end());
   } else {
@@ -276,10 +270,10 @@ static inline mxnet::TShape SliceFirstDim(const mxnet::TShape &s) {
 }
 
 static bool ForeachShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_shape,
-                         mxnet::ShapeVector *out_shape) {
+                         mxnet::ShapeVector* in_shape,
+                         mxnet::ShapeVector* out_shape) {
   const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  CHECK_EQ(out_shape->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_shape->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
 
   mxnet::ShapeVector subg_in_shape(in_shape->size());
@@ -292,11 +286,12 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
     subg_in_shape[loc] = SliceFirstDim(in_shape->at(i));
   }
   // state shape
-  remap(*in_shape, params.in_data_locs.ndim(), params.in_state_locs,
-        &subg_in_shape);
+  remap(*in_shape, params.in_data_locs.ndim(), params.in_state_locs, &subg_in_shape);
   // remaining shape
-  remap(*in_shape, params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_in_shape);
+  remap(*in_shape,
+        params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_in_shape);
 
   mxnet::ShapeVector subg_out_shape = *out_shape;
   for (int i = 0; i < params.num_out_data; i++) {
@@ -307,8 +302,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
     subg_out_shape[i] = SliceFirstDim(shape);
   }
 
-  bool infer_success = InferSubgraphShape(*attrs.subgraphs[0],
-                                          &subg_in_shape, &subg_out_shape);
+  bool infer_success = InferSubgraphShape(*attrs.subgraphs[0], &subg_in_shape, &subg_out_shape);
 
   // After inference, we need to move inferred information back to in_shape and
   // out_shape.
@@ -322,7 +316,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
       continue;
 
     auto out = mxnet::TShape(g_out_shape.ndim() + 1, -1);
-    out[0] = len;
+    out[0]   = len;
     for (int i = 1; i < out.ndim(); i++)
       out[i] = g_out_shape[i - 1];
     SHAPE_ASSIGN_CHECK(*out_shape, i, out);
@@ -333,8 +327,8 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
 
   // For the shape of input data.
   for (int i = 0; i < params.in_data_locs.ndim(); i++) {
-    size_t loc = params.in_data_locs[i];
-    const auto &shape = subg_in_shape[loc];
+    size_t loc        = params.in_data_locs[i];
+    const auto& shape = subg_in_shape[loc];
     // If the input data shape isn't inferred, we don't need to propogate the
     // info.
     if (!mxnet::ndim_is_known(shape))
@@ -346,7 +340,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
       SHAPE_ASSIGN_CHECK(*in_shape, i, s);
     } else {
       auto in = mxnet::TShape(shape.ndim() + 1, -1);
-      in[0] = len;
+      in[0]   = len;
       for (int i = 1; i < in.ndim(); i++)
         in[i] = shape[i - 1];
       SHAPE_ASSIGN_CHECK(*in_shape, i, in);
@@ -355,8 +349,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
   // For the shape of state.
   for (int i = 0; i < params.in_state_locs.ndim(); i++) {
     size_t loc = params.in_state_locs[i];
-    SHAPE_ASSIGN_CHECK(*in_shape, i + params.in_data_locs.ndim(),
-                       subg_in_shape[loc]);
+    SHAPE_ASSIGN_CHECK(*in_shape, i + params.in_data_locs.ndim(), subg_in_shape[loc]);
   }
   // For the shape of remaining data.
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
@@ -369,8 +362,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
   if (infer_success) {
     size_t num_states = out_shape->size() - params.num_out_data;
     for (size_t i = 0; i < num_states; i++) {
-      CHECK_EQ((*out_shape)[i + params.num_out_data],
-               (*in_shape)[i + params.in_data_locs.ndim()]);
+      CHECK_EQ((*out_shape)[i + params.num_out_data], (*in_shape)[i + params.in_data_locs.ndim()]);
     }
   }
   // Check if we have inferred the shapes correctly.
@@ -378,15 +370,18 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
 }
 
 static bool ForeachType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_type, std::vector<int> *out_type) {
+                        std::vector<int>* in_type,
+                        std::vector<int>* out_type) {
   const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  CHECK_EQ(out_type->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_type->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
   std::vector<int> subg_in_type(in_type->size(), 0);
   remap(*in_type, 0, params.in_data_locs, &subg_in_type);
   remap(*in_type, params.in_data_locs.ndim(), params.in_state_locs, &subg_in_type);
-  remap(*in_type, params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_in_type);
+  remap(*in_type,
+        params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_in_type);
   bool success = InferSubgraphDataType(*attrs.subgraphs[0], &subg_in_type, out_type);
   for (int i = 0; i < params.in_data_locs.ndim(); i++) {
     size_t loc = params.in_data_locs[i];
@@ -398,8 +393,8 @@ static bool ForeachType(const nnvm::NodeAttrs& attrs,
   }
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
     size_t loc = params.remain_locs[i];
-    TYPE_ASSIGN_CHECK(*in_type, i + params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-                      subg_in_type[loc]);
+    TYPE_ASSIGN_CHECK(
+        *in_type, i + params.in_data_locs.ndim() + params.in_state_locs.ndim(), subg_in_type[loc]);
   }
   return success;
 }
@@ -407,26 +402,27 @@ static bool ForeachType(const nnvm::NodeAttrs& attrs,
 static bool ForeachStorageType(const nnvm::NodeAttrs& attrs,
                                const int dev_mask,
                                DispatchMode* dispatch_mode,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
   std::vector<int> subg_in_attrs(in_attrs->size(), kUndefinedStorage);
   remap(*in_attrs, 0, params.in_data_locs, &subg_in_attrs);
   remap(*in_attrs, params.in_data_locs.ndim(), params.in_state_locs, &subg_in_attrs);
-  remap(*in_attrs, params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_in_attrs);
-  bool success = InferSubgraphStorage(*attrs.subgraphs[0], dev_mask,
-                                      dispatch_mode, &subg_in_attrs, out_attrs);
+  remap(*in_attrs,
+        params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_in_attrs);
+  bool success =
+      InferSubgraphStorage(*attrs.subgraphs[0], dev_mask, dispatch_mode, &subg_in_attrs, out_attrs);
   for (int i = 0; i < params.in_data_locs.ndim(); i++) {
     size_t loc = params.in_data_locs[i];
     STORAGE_TYPE_ASSIGN_CHECK(*in_attrs, i, subg_in_attrs[loc]);
   }
   for (int i = 0; i < params.in_state_locs.ndim(); i++) {
     size_t loc = params.in_state_locs[i];
-    STORAGE_TYPE_ASSIGN_CHECK(*in_attrs, i + params.in_data_locs.ndim(),
-                              subg_in_attrs[loc]);
+    STORAGE_TYPE_ASSIGN_CHECK(*in_attrs, i + params.in_data_locs.ndim(), subg_in_attrs[loc]);
   }
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
     size_t loc = params.remain_locs[i];
@@ -440,28 +436,30 @@ static bool ForeachStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardForeachStorageType(const nnvm::NodeAttrs& attrs,
                                        const int dev_mask,
                                        DispatchMode* dispatch_mode,
-                                       std::vector<int> *in_attrs,
-                                       std::vector<int> *out_attrs) {
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs) {
   const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_args - 1);
-  CHECK_EQ(in_attrs->size(), (size_t) params.num_args - 1 + params.num_outputs * 2);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_args - 1);
+  CHECK_EQ(in_attrs->size(), (size_t)params.num_args - 1 + params.num_outputs * 2);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
-  CachedOp op(*attrs.subgraphs[0],
-              std::vector<std::pair<std::string, std::string> >());
+  CachedOp op(*attrs.subgraphs[0], std::vector<std::pair<std::string, std::string> >());
   // map the operator inputs to the subgraph inputs.
   std::vector<int> subg_forward_ins(params.num_args - 1, kUndefinedStorage);
   remap(*in_attrs, params.num_outputs, params.in_data_locs, &subg_forward_ins);
-  remap(*in_attrs, params.num_outputs + params.in_data_locs.ndim(),
-        params.in_state_locs, &subg_forward_ins);
-  remap(*in_attrs, params.num_outputs + params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_forward_ins);
+  remap(*in_attrs,
+        params.num_outputs + params.in_data_locs.ndim(),
+        params.in_state_locs,
+        &subg_forward_ins);
+  remap(*in_attrs,
+        params.num_outputs + params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_forward_ins);
 
   // Copy backward input storage to backward subgraph input storage.
   std::vector<int> subg_in_attrs = *in_attrs;
   for (size_t i = 0; i < subg_forward_ins.size(); i++)
     subg_in_attrs[i + params.num_outputs] = subg_forward_ins[i];
-  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode,
-                                &subg_in_attrs, out_attrs);
+  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode, &subg_in_attrs, out_attrs);
 }
 
 static OpStatePtr CreateForeachState(const NodeAttrs& attrs,
@@ -472,11 +470,11 @@ static OpStatePtr CreateForeachState(const NodeAttrs& attrs,
   return OpStatePtr::Create<ForeachState>(*attrs.subgraphs[0], params);
 }
 
-static std::vector<nnvm::NodeEntry>
-ForeachGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+static std::vector<nnvm::NodeEntry> ForeachGradient(const nnvm::ObjectPtr& n,
+                                                    const std::vector<nnvm::NodeEntry>& ograds) {
   ElemwiseGradUseInOut fgrad{"_backward_foreach"};
   std::vector<nnvm::NodeEntry> entries = fgrad(n, ograds);
-  entries[0].node->attrs.subgraphs = n->attrs.subgraphs;
+  entries[0].node->attrs.subgraphs     = n->attrs.subgraphs;
   return entries;
 }
 
@@ -493,29 +491,29 @@ struct WhileLoopParam : public dmlc::Parameter<WhileLoopParam> {
   mxnet::Tuple<dim_t> func_input_locs;
   mxnet::Tuple<dim_t> func_var_locs;
   DMLC_DECLARE_PARAMETER(WhileLoopParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2)
-    .describe("Number of input arguments, including cond and func as two symbol inputs.");
-    DMLC_DECLARE_FIELD(num_outputs).set_lower_bound(1)
-    .describe("The number of outputs of the subgraph.");
-    DMLC_DECLARE_FIELD(num_out_data).set_lower_bound(0)
-    .describe("The number of outputs from the function body.");
-    DMLC_DECLARE_FIELD(max_iterations).set_lower_bound(1)
-    .describe("Maximum number of iterations.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2).describe(
+        "Number of input arguments, including cond and func as two symbol inputs.");
+    DMLC_DECLARE_FIELD(num_outputs)
+        .set_lower_bound(1)
+        .describe("The number of outputs of the subgraph.");
+    DMLC_DECLARE_FIELD(num_out_data)
+        .set_lower_bound(0)
+        .describe("The number of outputs from the function body.");
+    DMLC_DECLARE_FIELD(max_iterations).set_lower_bound(1).describe("Maximum number of iterations.");
     DMLC_DECLARE_FIELD(cond_input_locs)
-    .describe("The locations of cond's inputs in the given inputs.");
+        .describe("The locations of cond's inputs in the given inputs.");
     DMLC_DECLARE_FIELD(func_input_locs)
-    .describe("The locations of func's inputs in the given inputs.");
-    DMLC_DECLARE_FIELD(func_var_locs)
-    .describe("The locations of loop_vars among func's inputs.");
+        .describe("The locations of func's inputs in the given inputs.");
+    DMLC_DECLARE_FIELD(func_var_locs).describe("The locations of loop_vars among func's inputs.");
   }
   template <typename T>
-  bool sync_in_out(std::vector<T> *in,
-                   std::vector<T> *out,
-                   std::function<bool(const T &)> is_empty) const {
+  bool sync_in_out(std::vector<T>* in,
+                   std::vector<T>* out,
+                   std::function<bool(const T&)> is_empty) const {
     for (int i = this->num_out_data; i < this->num_outputs; ++i) {
       // each out->at(i) is a params, loop_var
-      T &x = in->at(this->func_input_locs[this->func_var_locs[i - this->num_out_data]]);
-      T &y = out->at(i);
+      T& x = in->at(this->func_input_locs[this->func_var_locs[i - this->num_out_data]]);
+      T& y = out->at(i);
       fill_value(&x, &y, is_empty(x), is_empty(y));
     }
     return true;
@@ -524,7 +522,7 @@ struct WhileLoopParam : public dmlc::Parameter<WhileLoopParam> {
 
 DMLC_REGISTER_PARAMETER(WhileLoopParam);
 
-class WhileLoopState: public LoopState {
+class WhileLoopState : public LoopState {
  public:
   WhileLoopParam params;
   size_t n_iterations;  // the actual number of steps taken in this while loop, <= max_iterations
@@ -533,15 +531,15 @@ class WhileLoopState: public LoopState {
   // indicates to which index the output of `func' will be copied to the input of `cond'
   std::vector<int> oi_map;
 
-  WhileLoopState(const WhileLoopParam &params, const nnvm::Symbol &cond, const nnvm::Symbol &func) :
-                 LoopState(func),
-                 params(params),
-                 n_iterations(0U),
-                 cond_op(LoopState::MakeSharedOp(cond)),
-                 oi_map(params.func_var_locs.ndim(), -1) {
-    const mxnet::Tuple<dim_t> &func_input_locs = params.func_input_locs;
-    const mxnet::Tuple<dim_t> &func_var_locs = params.func_var_locs;
-    const mxnet::Tuple<dim_t> &cond_input_locs = params.cond_input_locs;
+  WhileLoopState(const WhileLoopParam& params, const nnvm::Symbol& cond, const nnvm::Symbol& func)
+      : LoopState(func),
+        params(params),
+        n_iterations(0U),
+        cond_op(LoopState::MakeSharedOp(cond)),
+        oi_map(params.func_var_locs.ndim(), -1) {
+    const mxnet::Tuple<dim_t>& func_input_locs = params.func_input_locs;
+    const mxnet::Tuple<dim_t>& func_var_locs   = params.func_var_locs;
+    const mxnet::Tuple<dim_t>& cond_input_locs = params.cond_input_locs;
     for (int i = 0; i < func_var_locs.ndim(); ++i) {
       dim_t pos_i = func_input_locs[func_var_locs[i]];
       for (int j = 0; j < cond_input_locs.ndim(); ++j) {
@@ -565,20 +563,18 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
   // [0: num_out_data) are outputs at each step.
   // [num_out_data: ) are new_loop_vars
   // TODO(Junru): avoid dynamic NDArray allocation
-  WhileLoopState &state = state_ptr.get_state<WhileLoopState>();
+  WhileLoopState& state        = state_ptr.get_state<WhileLoopState>();
   const WhileLoopParam& params = state.params;
   // a helper function, converting std::vector<NDArray> to std::vector<NDArray*>
-  const auto to_ptr_vec = [](std::vector<NDArray> &in, std::vector<NDArray*> *out) {
+  const auto to_ptr_vec = [](std::vector<NDArray>& in, std::vector<NDArray*>* out) {
     out->clear();
     out->reserve(in.size());
-    std::transform(std::begin(in),
-                   std::end(in),
-                   std::back_inserter(*out),
-                   [](NDArray &a) {return &a;});
+    std::transform(
+        std::begin(in), std::end(in), std::back_inserter(*out), [](NDArray& a) { return &a; });
   };
   // sanity checks
-  CHECK_EQ(inputs.size() + 2U, (size_t) params.num_args);
-  CHECK_EQ(outputs.size(), (size_t) params.num_outputs);
+  CHECK_EQ(inputs.size() + 2U, (size_t)params.num_args);
+  CHECK_EQ(outputs.size(), (size_t)params.num_outputs);
   CHECK_EQ(outputs.size(), req.size());
   // construct inputs and outputs for cond
   std::vector<NDArray> cond_inputs, cond_outputs = {NDArray()};
@@ -589,7 +585,7 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
   // construct inputs and outputs for func
   std::vector<NDArray> func_inputs, func_outputs(outputs.size());
   extract_by_loc(inputs, params.func_input_locs, &func_inputs);
-  for (size_t &step = state.n_iterations = 0; step < (size_t) params.max_iterations; ++step) {
+  for (size_t& step = state.n_iterations = 0; step < (size_t)params.max_iterations; ++step) {
     CHECK(inputs.size() > 0) << "while loop forward requires at least 1 input";
     Context default_ctx = inputs[0].ctx();
     state.cond_op->Forward(nullptr, cond_input_ptr, cond_output_ptr, default_ctx);
@@ -613,7 +609,7 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
         for (int j = 0; j < step_shape.ndim(); ++j) {
           shape[j + 1] = step_shape[j];
         }
-        const_cast<NDArray &>(outputs[i]).Init(shape);
+        const_cast<NDArray&>(outputs[i]).Init(shape);
       }
     }
     for (int i = 0; i < params.num_out_data; ++i) {
@@ -623,12 +619,12 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
     // func_inputs on the next step:
     // the output (new_loop_vars) will become the new inputs (loop_vars)
     for (size_t i = params.num_out_data; i < outputs.size(); ++i) {
-      int j = params.func_var_locs[i - params.num_out_data];
+      int j          = params.func_var_locs[i - params.num_out_data];
       func_inputs[j] = func_outputs[i];
-      int k = state.oi_map[i - params.num_out_data];
+      int k          = state.oi_map[i - params.num_out_data];
       if (k != -1) {
         // I actually don't need to update cond_inputs
-        cond_inputs[k] = func_outputs[i];
+        cond_inputs[k]    = func_outputs[i];
         cond_input_ptr[k] = &func_outputs[i];
       }
     }
@@ -642,17 +638,17 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
   for (size_t i = params.num_out_data; i < outputs.size(); ++i) {
     size_t j = params.func_var_locs[i - params.num_out_data];
     if (!shape_is_known(outputs[i].shape())) {
-      const_cast<NDArray &>(outputs[i]).Init(func_inputs[j].shape());
+      const_cast<NDArray&>(outputs[i]).Init(func_inputs[j].shape());
     }
     mxnet::CopyFromTo(func_inputs[j], &outputs[i]);
   }
   for (int i = 0; i < params.num_out_data; ++i) {
-    const_cast<NDArray &>(outputs[i]).SetShapeFromChunk();
+    const_cast<NDArray&>(outputs[i]).SetShapeFromChunk();
   }
   if (state.n_iterations == 0) {
-    for (const auto & output : outputs) {
+    for (const auto& output : outputs) {
       if (!shape_is_known(output.shape())) {
-        const_cast<NDArray &>(output).ReshapeAndAlloc({1});
+        const_cast<NDArray&>(output).ReshapeAndAlloc({1});
       }
     }
   }
@@ -668,10 +664,10 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
   // where f is the current function,
   // x is the input to the current function,
   // TODO(Junru): avoid dynamic NDArray allocation
-  WhileLoopState &state = state_ptr.get_state<WhileLoopState>();
+  WhileLoopState& state        = state_ptr.get_state<WhileLoopState>();
   const WhileLoopParam& params = state.params;
   // sanity checks
-  CHECK_EQ(_outputs.size() + 2U, (size_t) params.num_args);
+  CHECK_EQ(_outputs.size() + 2U, (size_t)params.num_args);
   CHECK_EQ(_outputs.size(), _req.size());
   for (auto x : _req) {
     CHECK_NE(x, kWriteInplace);
@@ -695,7 +691,7 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
   // ...
   // (var_locs[-2], var_locs[-1] = params.num_args - 2)
   std::vector<dim_t> var_locs(params.func_var_locs.begin(), params.func_var_locs.end());
-  var_locs.push_back((dim_t) params.num_args - 2U);
+  var_locs.push_back((dim_t)params.num_args - 2U);
   sort(var_locs.begin(), var_locs.end());
   // vectors for the backward loop
   std::vector<NDArray> ograds(params.num_outputs);
@@ -710,7 +706,7 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
     std::transform(std::begin(inputs),
                    std::begin(inputs) + params.num_out_data,
                    std::begin(ograds),
-                   [step] (const NDArray &a) { return a.At(step); } );
+                   [step](const NDArray& a) { return a.At(step); });
     // igrads[i] =
     //    outputs[i]            (step == 0)
     //    outputs[i]            (step != 0 && i not in loop_var_locs)
@@ -723,21 +719,18 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
     {
       size_t i = 0;
       for (size_t loc : var_locs) {
-        for ( ; i < loc; ++i) {
+        for (; i < loc; ++i) {
           // locs other that var_locs
-          igrads[i] = outputs[i];
-          iter_req[i] = (step + 1 == n_iter || req[i] == kNullOp)
-                      ? req[i]
-                      : kAddTo;
+          igrads[i]   = outputs[i];
+          iter_req[i] = (step + 1 == n_iter || req[i] == kNullOp) ? req[i] : kAddTo;
         }
-        if (i < (size_t) params.num_args - 2U) {
+        if (i < (size_t)params.num_args - 2U) {
           // a var
           igrads[i] = (step == 0)
-                    ? outputs[i]
-                    : NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
-          iter_req[i] = (step == 0 || req[i] == kNullOp)
-                      ? req[i]
-                      : kWriteTo;
+                          ? outputs[i]
+                          : NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
+
+          iter_req[i] = (step == 0 || req[i] == kNullOp) ? req[i] : kWriteTo;
           ++i;
         } else {
           break;
@@ -746,7 +739,7 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
     }
     state.Backward(step, ograds, iter_req, igrads);
     for (int i = params.num_out_data; i < params.num_outputs; ++i) {
-      size_t j = params.func_var_locs[i - params.num_out_data];
+      size_t j  = params.func_var_locs[i - params.num_out_data];
       ograds[i] = igrads[j];
     }
   }
@@ -754,11 +747,12 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
 }
 
 static bool WhileLoopType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type, std::vector<int> *out_type) {
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_type_udf;
-  CHECK_EQ(in_type->size() + 2U, (size_t) params.num_args);
-  CHECK_EQ(out_type->size(), (size_t) params.num_outputs);
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
+  const WhileLoopParam& params                        = nnvm::get<WhileLoopParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_type_udf;
+  CHECK_EQ(in_type->size() + 2U, (size_t)params.num_args);
+  CHECK_EQ(out_type->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   std::vector<int> cond_in_type;
@@ -779,12 +773,12 @@ static bool WhileLoopType(const nnvm::NodeAttrs& attrs,
 static bool WhileLoopStorageType(const nnvm::NodeAttrs& attrs,
                                  const int dev_mask,
                                  DispatchMode* dispatch_mode,
-                                 std::vector<int> *in_attrs,
-                                 std::vector<int> *out_attrs) {
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_stype_udf;
-  CHECK_EQ(in_attrs->size() + 2U, (size_t) params.num_args);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_outputs);
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
+  const WhileLoopParam& params                        = nnvm::get<WhileLoopParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_stype_udf;
+  CHECK_EQ(in_attrs->size() + 2U, (size_t)params.num_args);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   std::vector<int> cond_in_attrs;
@@ -792,16 +786,16 @@ static bool WhileLoopStorageType(const nnvm::NodeAttrs& attrs,
   extract_by_loc(*in_attrs, params.cond_input_locs, &cond_in_attrs);
   extract_by_loc(*in_attrs, params.func_input_locs, &func_in_attrs);
   std::vector<int> cond_out_attrs = {kDefaultStorage};
-  DispatchMode cond_mode = DispatchMode::kUndefined;
-  DispatchMode func_mode = DispatchMode::kUndefined;
-  *dispatch_mode = DispatchMode::kFComputeEx;
+  DispatchMode cond_mode          = DispatchMode::kUndefined;
+  DispatchMode func_mode          = DispatchMode::kUndefined;
+  *dispatch_mode                  = DispatchMode::kFComputeEx;
   CHECK(params.sync_in_out(in_attrs, out_attrs, is_udf));
-  bool succ_0 = InferSubgraphStorage(*attrs.subgraphs[0], dev_mask, \
-                                     &cond_mode, &cond_in_attrs, &cond_out_attrs);
+  bool succ_0 = InferSubgraphStorage(
+      *attrs.subgraphs[0], dev_mask, &cond_mode, &cond_in_attrs, &cond_out_attrs);
   CHECK(params.sync_in_out(in_attrs, out_attrs, is_udf));
   CHECK(sync_in_in(params.cond_input_locs, in_attrs, &cond_in_attrs, is_udf));
-  bool succ_1 = InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, \
-                                     &func_mode, &func_in_attrs, out_attrs);
+  bool succ_1 =
+      InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, &func_mode, &func_in_attrs, out_attrs);
   CHECK(params.sync_in_out(in_attrs, out_attrs, is_udf));
   CHECK(sync_in_in(params.func_input_locs, in_attrs, &func_in_attrs, is_udf));
   return succ_0 && succ_1;
@@ -810,15 +804,14 @@ static bool WhileLoopStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardWhileLoopStorageType(const nnvm::NodeAttrs& attrs,
                                          const int dev_mask,
                                          DispatchMode* dispatch_mode,
-                                         std::vector<int> *in_attrs,
-                                         std::vector<int> *out_attrs) {
+                                         std::vector<int>* in_attrs,
+                                         std::vector<int>* out_attrs) {
   // `cond' is not backwarded, don't check
   const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size() + 2U, (size_t) params.num_args);
+  CHECK_EQ(out_attrs->size() + 2U, (size_t)params.num_args);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
   CachedOp op(*attrs.subgraphs[1], {});
-  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode,
-                                in_attrs, out_attrs);
+  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 }
 
 static OpStatePtr CreateWhileLoopState(const NodeAttrs& attrs,
@@ -829,11 +822,11 @@ static OpStatePtr CreateWhileLoopState(const NodeAttrs& attrs,
   return OpStatePtr::Create<WhileLoopState>(params, *attrs.subgraphs[0], *attrs.subgraphs[1]);
 }
 
-static std::vector<nnvm::NodeEntry>
-WhileLoopGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+static std::vector<nnvm::NodeEntry> WhileLoopGradient(const nnvm::ObjectPtr& n,
+                                                      const std::vector<nnvm::NodeEntry>& ograds) {
   ElemwiseGradUseInOut fgrad{"_backward_while_loop"};
   std::vector<nnvm::NodeEntry> entries = fgrad(n, ograds);
-  entries[0].node->attrs.subgraphs = n->attrs.subgraphs;
+  entries[0].node->attrs.subgraphs     = n->attrs.subgraphs;
   return entries;
 }
 
@@ -844,16 +837,17 @@ struct CondParam : public dmlc::Parameter<CondParam> {
   mxnet::Tuple<dim_t> then_input_locs;
   mxnet::Tuple<dim_t> else_input_locs;
   DMLC_DECLARE_PARAMETER(CondParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(3)
-    .describe("Number of input arguments, including cond, then and else as three symbol inputs.");
-    DMLC_DECLARE_FIELD(num_outputs).set_lower_bound(1)
-    .describe("The number of outputs of the subgraph.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(3).describe(
+        "Number of input arguments, including cond, then and else as three symbol inputs.");
+    DMLC_DECLARE_FIELD(num_outputs)
+        .set_lower_bound(1)
+        .describe("The number of outputs of the subgraph.");
     DMLC_DECLARE_FIELD(cond_input_locs)
-    .describe("The locations of cond's inputs in the given inputs.");
+        .describe("The locations of cond's inputs in the given inputs.");
     DMLC_DECLARE_FIELD(then_input_locs)
-    .describe("The locations of then's inputs in the given inputs.");
+        .describe("The locations of then's inputs in the given inputs.");
     DMLC_DECLARE_FIELD(else_input_locs)
-    .describe("The locations of else's inputs in the given inputs.");
+        .describe("The locations of else's inputs in the given inputs.");
   }
 };  // struct CondParam
 
@@ -868,15 +862,14 @@ class CondState {
   int branch_selection;  // 1 if then branch; 0 if else branch; -1 if undefined
 
   CondState(CondParam params,
-            const nnvm::Symbol &cond,
-            const nnvm::Symbol &then_sym,
-            const nnvm::Symbol &else_sym):
-            params(std::move(params)),
-            cond_op(LoopState::MakeSharedOp(cond)),
-            then_branch(then_sym),
-            else_branch(else_sym),
-            branch_selection(-1) {
-  }
+            const nnvm::Symbol& cond,
+            const nnvm::Symbol& then_sym,
+            const nnvm::Symbol& else_sym)
+      : params(std::move(params)),
+        cond_op(LoopState::MakeSharedOp(cond)),
+        then_branch(then_sym),
+        else_branch(else_sym),
+        branch_selection(-1) {}
 };
 
 static void CondComputeExCPU(const OpStatePtr& state_ptr,
@@ -889,20 +882,18 @@ static void CondComputeExCPU(const OpStatePtr& state_ptr,
   // The argument `outputs' are output and new_loop_vars
   // [0: num_out_data) are outputs at each step.
   // [num_out_data: ) are new_loop_vars
-  CondState &state = state_ptr.get_state<CondState>();
+  CondState& state        = state_ptr.get_state<CondState>();
   const CondParam& params = state.params;
   // a helper function, converting std::vector<NDArray> to std::vector<NDArray*>
-  const auto to_ptr_vec = [](std::vector<NDArray> &in, std::vector<NDArray*> *out) {
+  const auto to_ptr_vec = [](std::vector<NDArray>& in, std::vector<NDArray*>* out) {
     out->clear();
     out->reserve(in.size());
-    std::transform(std::begin(in),
-                   std::end(in),
-                   std::back_inserter(*out),
-                   [](NDArray &a) {return &a;});
+    std::transform(
+        std::begin(in), std::end(in), std::back_inserter(*out), [](NDArray& a) { return &a; });
   };
   // sanity checks
-  CHECK_EQ(inputs.size() + 3U, (size_t) params.num_args);
-  CHECK_EQ(outputs.size(), (size_t) params.num_outputs);
+  CHECK_EQ(inputs.size() + 3U, (size_t)params.num_args);
+  CHECK_EQ(outputs.size(), (size_t)params.num_outputs);
   CHECK_EQ(outputs.size(), req.size());
   // construct inputs and outputs for cond
   std::vector<NDArray> cond_inputs;
@@ -912,19 +903,16 @@ static void CondComputeExCPU(const OpStatePtr& state_ptr,
   extract_by_loc(inputs, params.cond_input_locs, &cond_inputs);
   to_ptr_vec(cond_inputs, &cond_input_ptr);
   to_ptr_vec(cond_outputs, &cond_output_ptr);
-  int &branch_selection = state.branch_selection;
+  int& branch_selection = state.branch_selection;
   // run cond
   CHECK(cond_input_ptr.size() > 0) << "condition requires at least 1 input";
   Context default_ctx = cond_inputs[0].ctx();
   state.cond_op->Forward(nullptr, cond_input_ptr, cond_output_ptr, default_ctx);
   branch_selection = as_bool_scalar(*cond_output_ptr[0]);
   // select the right branch
-  const mxnet::Tuple<dim_t> &func_input_locs = branch_selection
-                                            ? params.then_input_locs
-                                            : params.else_input_locs;
-  LoopState &loop_state = branch_selection
-                        ? state.then_branch
-                        : state.else_branch;
+  const mxnet::Tuple<dim_t>& func_input_locs =
+      branch_selection ? params.then_input_locs : params.else_input_locs;
+  LoopState& loop_state = branch_selection ? state.then_branch : state.else_branch;
   // extract inputs for the branch
   std::vector<NDArray> func_inputs;
   extract_by_loc(inputs, func_input_locs, &func_inputs);
@@ -936,20 +924,17 @@ static void CondGradComputeExCPU(const OpStatePtr& state_ptr,
                                  const std::vector<NDArray>& inputs,
                                  const std::vector<OpReqType>& _req,
                                  const std::vector<NDArray>& outputs) {
-  CondState &state = state_ptr.get_state<CondState>();
+  CondState& state        = state_ptr.get_state<CondState>();
   const CondParam& params = state.params;
   // sanity checks
-  CHECK_EQ(outputs.size() + 3U, (size_t) params.num_args);
+  CHECK_EQ(outputs.size() + 3U, (size_t)params.num_args);
   CHECK_EQ(outputs.size(), _req.size());
   // select the right branch
   int branch_selection = state.branch_selection;
   CHECK_NE(branch_selection, -1);
-  const mxnet::Tuple<dim_t> &func_input_locs = branch_selection
-                                            ? params.then_input_locs
-                                            : params.else_input_locs;
-  LoopState &loop_state = branch_selection
-                        ? state.then_branch
-                        : state.else_branch;
+  const mxnet::Tuple<dim_t>& func_input_locs =
+      branch_selection ? params.then_input_locs : params.else_input_locs;
+  LoopState& loop_state = branch_selection ? state.then_branch : state.else_branch;
   // construct parameters
   std::vector<NDArray> ograds(inputs.begin(), inputs.begin() + params.num_outputs);
   std::vector<OpReqType> req;
@@ -961,12 +946,12 @@ static void CondGradComputeExCPU(const OpStatePtr& state_ptr,
 }
 
 static bool CondType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_type,
-                     std::vector<int> *out_type) {
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_type_udf;
-  CHECK_EQ(in_type->size() + 3U, (size_t) params.num_args);
-  CHECK_EQ(out_type->size(), (size_t) params.num_outputs);
+                     std::vector<int>* in_type,
+                     std::vector<int>* out_type) {
+  const CondParam& params                             = nnvm::get<CondParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_type_udf;
+  CHECK_EQ(in_type->size() + 3U, (size_t)params.num_args);
+  CHECK_EQ(out_type->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 3U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   CHECK_EQ(attrs.subgraphs[1]->outputs.size(), attrs.subgraphs[2]->outputs.size());
@@ -989,12 +974,12 @@ static bool CondType(const nnvm::NodeAttrs& attrs,
 static bool CondStorageType(const nnvm::NodeAttrs& attrs,
                             const int dev_mask,
                             DispatchMode* dispatch_mode,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_stype_udf;
-  CHECK_EQ(in_attrs->size() + 3U, (size_t) params.num_args);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_outputs);
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
+  const CondParam& params                             = nnvm::get<CondParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_stype_udf;
+  CHECK_EQ(in_attrs->size() + 3U, (size_t)params.num_args);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 3U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   CHECK_EQ(attrs.subgraphs[1]->outputs.size(), attrs.subgraphs[2]->outputs.size());
@@ -1005,18 +990,18 @@ static bool CondStorageType(const nnvm::NodeAttrs& attrs,
   extract_by_loc(*in_attrs, params.then_input_locs, &then_in_attrs);
   extract_by_loc(*in_attrs, params.else_input_locs, &else_in_attrs);
   std::vector<int> cond_out_attrs = {kDefaultStorage};
-  DispatchMode cond_mode = DispatchMode::kUndefined;
-  DispatchMode then_mode = DispatchMode::kUndefined;
-  DispatchMode else_mode = DispatchMode::kUndefined;
-  *dispatch_mode = DispatchMode::kFComputeEx;
-  bool succ_0 = InferSubgraphStorage(*attrs.subgraphs[0], dev_mask, \
-                                     &cond_mode, &cond_in_attrs, &cond_out_attrs);
+  DispatchMode cond_mode          = DispatchMode::kUndefined;
+  DispatchMode then_mode          = DispatchMode::kUndefined;
+  DispatchMode else_mode          = DispatchMode::kUndefined;
+  *dispatch_mode                  = DispatchMode::kFComputeEx;
+  bool succ_0                     = InferSubgraphStorage(
+      *attrs.subgraphs[0], dev_mask, &cond_mode, &cond_in_attrs, &cond_out_attrs);
   CHECK(sync_in_in(params.cond_input_locs, in_attrs, &cond_in_attrs, is_udf));
-  bool succ_1 = InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, \
-                                     &then_mode, &then_in_attrs, out_attrs);
+  bool succ_1 =
+      InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, &then_mode, &then_in_attrs, out_attrs);
   CHECK(sync_in_in(params.then_input_locs, in_attrs, &then_in_attrs, is_udf));
-  bool succ_2 = InferSubgraphStorage(*attrs.subgraphs[2], dev_mask, \
-                                     &else_mode, &else_in_attrs, out_attrs);
+  bool succ_2 =
+      InferSubgraphStorage(*attrs.subgraphs[2], dev_mask, &else_mode, &else_in_attrs, out_attrs);
   CHECK(sync_in_in(params.else_input_locs, in_attrs, &else_in_attrs, is_udf));
   return succ_0 && succ_1 && succ_2;
 }
@@ -1024,31 +1009,28 @@ static bool CondStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardCondStorageType(const nnvm::NodeAttrs& attrs,
                                     const int dev_mask,
                                     DispatchMode* dispatch_mode,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size() + 3U, (size_t) params.num_args);
+  CHECK_EQ(out_attrs->size() + 3U, (size_t)params.num_args);
   CHECK_EQ(attrs.subgraphs.size(), 3U);
-  static const std::function<bool(const int &)> is_udf = is_stype_udf;
-  auto sub_pass = [&](const std::shared_ptr<nnvm::Symbol> &subg,
-                      const mxnet::Tuple<dim_t> &input_locs) {
+  static const std::function<bool(const int&)> is_udf = is_stype_udf;
+  auto sub_pass = [&](const std::shared_ptr<nnvm::Symbol>& subg,
+                      const mxnet::Tuple<dim_t>& input_locs) {
     // A. first construct subg_in_attrs
     // need subg_in_attrs as subg_bwd_out (copy), subg_fwd_in (extract), subg_fwd_out (copy)
     std::vector<int> subg_in_attrs;
     size_t num_elts = params.num_outputs * 2 + input_locs.ndim();
     subg_in_attrs.reserve(num_elts);
     // part 1. subg_bwd_out (copy)
-    subg_in_attrs.insert(subg_in_attrs.end(),
-                         in_attrs->begin(),
-                         in_attrs->begin() + params.num_outputs);
+    subg_in_attrs.insert(
+        subg_in_attrs.end(), in_attrs->begin(), in_attrs->begin() + params.num_outputs);
     // part 2. subg_fwd_in (extract)
     std::vector<int> fwd_in(in_attrs->begin() + params.num_outputs,
                             in_attrs->begin() + params.num_outputs + params.num_args - 3);
     std::vector<int> subg_fwd_in;
     extract_by_loc(fwd_in, input_locs, &subg_fwd_in);
-    subg_in_attrs.insert(subg_in_attrs.end(),
-                         subg_fwd_in.begin(),
-                         subg_fwd_in.end());
+    subg_in_attrs.insert(subg_in_attrs.end(), subg_fwd_in.begin(), subg_fwd_in.end());
     // part 3. subg_fwd_out (copy)
     subg_in_attrs.insert(subg_in_attrs.end(),
                          in_attrs->begin() + params.num_outputs + params.num_args - 3,
@@ -1060,12 +1042,12 @@ static bool BackwardCondStorageType(const nnvm::NodeAttrs& attrs,
     extract_by_loc(*out_attrs, input_locs, &subg_out_attrs);
     // then we construct the subgraph and do inference
     CachedOp op(*subg, {});
-    bool ret = op.BackwardStorageType(attrs, dev_mask, dispatch_mode, \
-                                      &subg_in_attrs, &subg_out_attrs);
+    bool ret =
+        op.BackwardStorageType(attrs, dev_mask, dispatch_mode, &subg_in_attrs, &subg_out_attrs);
     CHECK(sync_in_in(input_locs, out_attrs, &subg_out_attrs, is_udf));
     return ret;
   };
-  for (const dim_t &cond_in : params.cond_input_locs) {
+  for (const dim_t& cond_in : params.cond_input_locs) {
     (*out_attrs)[cond_in] = kDefaultStorage;
   }
   bool succ_0 = sub_pass(attrs.subgraphs[1], params.then_input_locs);
@@ -1079,203 +1061,197 @@ static OpStatePtr CreateCondState(const NodeAttrs& attrs,
                                   const std::vector<int>& itype) {
   const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
   return OpStatePtr::Create<CondState>(
-    params,
-    *attrs.subgraphs[0],
-    *attrs.subgraphs[1],
-    *attrs.subgraphs[2]);
+      params, *attrs.subgraphs[0], *attrs.subgraphs[1], *attrs.subgraphs[2]);
 }
 
-static std::vector<nnvm::NodeEntry>
-CondGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+static std::vector<nnvm::NodeEntry> CondGradient(const nnvm::ObjectPtr& n,
+                                                 const std::vector<nnvm::NodeEntry>& ograds) {
   ElemwiseGradUseInOut fgrad{"_backward_cond"};
   std::vector<nnvm::NodeEntry> entries = fgrad(n, ograds);
-  entries[0].node->attrs.subgraphs = n->attrs.subgraphs;
+  entries[0].node->attrs.subgraphs     = n->attrs.subgraphs;
   return entries;
 }
 
 NNVM_REGISTER_OP(_foreach)
-.MXNET_DESCRIBE("Run a for loop over an NDArray with user-defined computation")
-.set_attr_parser(ParamParser<ForeachParam>)
-.set_attr<FInferStorageType>("FInferStorageType", ForeachStorageType)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  return params.num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.emplace_back("fn");
-  for (int i = 0; i < params.num_args - 1; i++)
-    names.push_back("data" + std::to_string(i));
-  return names;
-})
-.set_attr<nnvm::FInputGraph>("FInputGraph",
-    [](const NodeAttrs& attrs) {
-  return std::vector<uint32_t>{0};
-})
-.set_attr<nnvm::FGradient>("FGradient", ForeachGradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateForeachState)
-.set_attr<mxnet::FInferShape>("FInferShape", ForeachShape)
-.set_attr<nnvm::FInferType>("FInferType", ForeachType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachComputeExCPU)
-// Foreach operator works like an executor. Its code will always run on CPU.
-// So the same code can be registered for both CPU and GPU.
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachComputeExCPU)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("fn", "Symbol", "Input graph.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(ForeachParam::__FIELDS__());
+    .MXNET_DESCRIBE("Run a for loop over an NDArray with user-defined computation")
+    .set_attr_parser(ParamParser<ForeachParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", ForeachStorageType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
+      return params.num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const ForeachParam& params =
+                                           nnvm::get<ForeachParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.emplace_back("fn");
+                                       for (int i = 0; i < params.num_args - 1; i++)
+                                         names.push_back("data" + std::to_string(i));
+                                       return names;
+                                     })
+    .set_attr<nnvm::FInputGraph>("FInputGraph",
+                                 [](const NodeAttrs& attrs) { return std::vector<uint32_t>{0}; })
+    .set_attr<nnvm::FGradient>("FGradient", ForeachGradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateForeachState)
+    .set_attr<mxnet::FInferShape>("FInferShape", ForeachShape)
+    .set_attr<nnvm::FInferType>("FInferType", ForeachType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachComputeExCPU)
+    // Foreach operator works like an executor. Its code will always run on CPU.
+    // So the same code can be registered for both CPU and GPU.
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachComputeExCPU)
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("fn", "Symbol", "Input graph.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(ForeachParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_foreach)
-.set_num_inputs([](const NodeAttrs& attrs){
-  const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  return params.num_outputs * 2 + params.num_args - 1;
-})
-.set_num_outputs([](const NodeAttrs& attrs){
-  const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
-  return params.num_args - 1;
-})
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardForeachStorageType)
-.set_attr_parser(ParamParser<ForeachParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachGradComputeExCPU)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachGradComputeExCPU);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
+      return params.num_outputs * 2 + params.num_args - 1;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const ForeachParam& params = nnvm::get<ForeachParam>(attrs.parsed);
+      return params.num_args - 1;
+    })
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardForeachStorageType)
+    .set_attr_parser(ParamParser<ForeachParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachGradComputeExCPU)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachGradComputeExCPU);
 
 NNVM_REGISTER_OP(_while_loop)
-.MXNET_DESCRIBE("Run a while loop over with user-defined condition and computation")
-.set_attr_parser(ParamParser<WhileLoopParam>)
-.set_attr<FInferStorageType>("FInferStorageType", WhileLoopStorageType)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  return params.num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.reserve(params.num_args);
-  names.emplace_back("cond");
-  names.emplace_back("func");
-  for (int i = 2; i < params.num_args; i++)
-    names.push_back("data" + std::to_string(i - 2));
-  return names;
-})
-.set_attr<nnvm::FInputGraph>("FInputGraph",
-    [](const NodeAttrs& attrs) {
-  return std::vector<uint32_t>{0, 1};
-})
-.set_attr<nnvm::FGradient>("FGradient", WhileLoopGradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateWhileLoopState)
-.set_attr<nnvm::FInferType>("FInferType", WhileLoopType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopComputeExCPU)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopComputeExCPU)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("cond", "Symbol", "Input graph for the loop condition.")
-.add_argument("func", "Symbol", "Input graph for the loop body.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(WhileLoopParam::__FIELDS__());
+    .MXNET_DESCRIBE("Run a while loop over with user-defined condition and computation")
+    .set_attr_parser(ParamParser<WhileLoopParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", WhileLoopStorageType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
+      return params.num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const WhileLoopParam& params =
+                                           nnvm::get<WhileLoopParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.reserve(params.num_args);
+                                       names.emplace_back("cond");
+                                       names.emplace_back("func");
+                                       for (int i = 2; i < params.num_args; i++)
+                                         names.push_back("data" + std::to_string(i - 2));
+                                       return names;
+                                     })
+    .set_attr<nnvm::FInputGraph>("FInputGraph",
+                                 [](const NodeAttrs& attrs) {
+                                   return std::vector<uint32_t>{0, 1};
+                                 })
+    .set_attr<nnvm::FGradient>("FGradient", WhileLoopGradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateWhileLoopState)
+    .set_attr<nnvm::FInferType>("FInferType", WhileLoopType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopComputeExCPU)
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopComputeExCPU)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("cond", "Symbol", "Input graph for the loop condition.")
+    .add_argument("func", "Symbol", "Input graph for the loop body.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(WhileLoopParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_while_loop)
-.set_num_inputs([](const NodeAttrs& attrs){
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  return params.num_outputs * 2 + params.num_args - 2;
-})
-.set_num_outputs([](const NodeAttrs& attrs){
-  const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
-  return params.num_args - 2;
-})
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardWhileLoopStorageType)
-.set_attr_parser(ParamParser<WhileLoopParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopGradComputeExCPU)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopGradComputeExCPU);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
+      return params.num_outputs * 2 + params.num_args - 2;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const WhileLoopParam& params = nnvm::get<WhileLoopParam>(attrs.parsed);
+      return params.num_args - 2;
+    })
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardWhileLoopStorageType)
+    .set_attr_parser(ParamParser<WhileLoopParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopGradComputeExCPU)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopGradComputeExCPU);
 
 NNVM_REGISTER_OP(_cond)
-.MXNET_DESCRIBE("Run a if-then-else using user-defined condition and computation")
-.set_attr_parser(ParamParser<CondParam>)
-.set_attr<FInferStorageType>("FInferStorageType", CondStorageType)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  return params.num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.reserve(params.num_args);
-  names.emplace_back("cond");
-  names.emplace_back("then_branch");
-  names.emplace_back("else_branch");
-  for (int i = 3; i < params.num_args; ++i)
-    names.push_back("data" + std::to_string(i - 3));
-  return names;
-})
-.set_attr<nnvm::FInputGraph>("FInputGraph",
-    [](const NodeAttrs& attrs) {
-  return std::vector<uint32_t>{0, 1, 2};
-})
-.set_attr<nnvm::FGradient>("FGradient", CondGradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateCondState)
-.set_attr<nnvm::FInferType>("FInferType", CondType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondComputeExCPU)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondComputeExCPU)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("cond", "Symbol", "Input graph for the condition.")
-.add_argument("then_branch", "Symbol", "Input graph for the then branch.")
-.add_argument("else_branch", "Symbol", "Input graph for the else branch.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(CondParam::__FIELDS__());
+    .MXNET_DESCRIBE("Run a if-then-else using user-defined condition and computation")
+    .set_attr_parser(ParamParser<CondParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", CondStorageType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
+      return params.num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.reserve(params.num_args);
+                                       names.emplace_back("cond");
+                                       names.emplace_back("then_branch");
+                                       names.emplace_back("else_branch");
+                                       for (int i = 3; i < params.num_args; ++i)
+                                         names.push_back("data" + std::to_string(i - 3));
+                                       return names;
+                                     })
+    .set_attr<nnvm::FInputGraph>("FInputGraph",
+                                 [](const NodeAttrs& attrs) {
+                                   return std::vector<uint32_t>{0, 1, 2};
+                                 })
+    .set_attr<nnvm::FGradient>("FGradient", CondGradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateCondState)
+    .set_attr<nnvm::FInferType>("FInferType", CondType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondComputeExCPU)
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondComputeExCPU)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("cond", "Symbol", "Input graph for the condition.")
+    .add_argument("then_branch", "Symbol", "Input graph for the then branch.")
+    .add_argument("else_branch", "Symbol", "Input graph for the else branch.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(CondParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_cond)
-.set_num_inputs([](const NodeAttrs& attrs){
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  return params.num_outputs * 2 + params.num_args - 3;
-})
-.set_num_outputs([](const NodeAttrs& attrs){
-  const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
-  return params.num_args - 3;
-})
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardCondStorageType)
-.set_attr_parser(ParamParser<CondParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondGradComputeExCPU)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondGradComputeExCPU);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
+      return params.num_outputs * 2 + params.num_args - 3;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const CondParam& params = nnvm::get<CondParam>(attrs.parsed);
+      return params.num_args - 3;
+    })
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardCondStorageType)
+    .set_attr_parser(ParamParser<CondParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondGradComputeExCPU)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondGradComputeExCPU);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/correlation-inl.h b/src/operator/correlation-inl.h
index 8712e4f57c82..0003f39782df 100644
--- a/src/operator/correlation-inl.h
+++ b/src/operator/correlation-inl.h
@@ -22,7 +22,7 @@
  * \file correlation-inl.h
  * \brief correlation operator and symbol
  * \author Xu Dong
-*/
+ */
 #ifndef MXNET_OPERATOR_CORRELATION_INL_H_
 #define MXNET_OPERATOR_CORRELATION_INL_H_
 #include <dmlc/logging.h>
@@ -39,8 +39,8 @@ namespace op {
 //  Declare enumeration of input order to make code more intuitive.
 //  These enums are only visible within this header
 namespace Correlation {
-enum  CorrelationOpInputs{kData1, kData2};
-enum  CorrelationOpOutputs{kOut, kTemp1, kTemp2};
+enum CorrelationOpInputs { kData1, kData2 };
+enum CorrelationOpOutputs { kOut, kTemp1, kTemp2 };
 }  //  namespace Correlation
 struct CorrelationParam : public dmlc::Parameter<CorrelationParam> {
   uint32_t max_displacement;
@@ -50,44 +50,46 @@ struct CorrelationParam : public dmlc::Parameter<CorrelationParam> {
   uint32_t stride2;
   bool is_multiply;
   DMLC_DECLARE_PARAMETER(CorrelationParam) {
-    DMLC_DECLARE_FIELD(kernel_size).set_default(1)
-    .describe("kernel size for Correlation must be an odd number");
-    DMLC_DECLARE_FIELD(max_displacement).set_default(1)
-    .describe("Max displacement of Correlation ");
-    DMLC_DECLARE_FIELD(stride1).set_default(1).set_lower_bound(1)
-    .describe("stride1 quantize data1 globally");
-    DMLC_DECLARE_FIELD(stride2).set_default(1).set_lower_bound(1)
-    .describe("stride2 quantize data2 within the neighborhood centered around data1");
-    DMLC_DECLARE_FIELD(pad_size).set_default(0)
-    .describe("pad for Correlation");
-    DMLC_DECLARE_FIELD(is_multiply).set_default(true)
-    .describe("operation type is either multiplication or subduction");
+    DMLC_DECLARE_FIELD(kernel_size)
+        .set_default(1)
+        .describe("kernel size for Correlation must be an odd number");
+    DMLC_DECLARE_FIELD(max_displacement)
+        .set_default(1)
+        .describe("Max displacement of Correlation ");
+    DMLC_DECLARE_FIELD(stride1).set_default(1).set_lower_bound(1).describe(
+        "stride1 quantize data1 globally");
+    DMLC_DECLARE_FIELD(stride2).set_default(1).set_lower_bound(1).describe(
+        "stride2 quantize data2 within the neighborhood centered around data1");
+    DMLC_DECLARE_FIELD(pad_size).set_default(0).describe("pad for Correlation");
+    DMLC_DECLARE_FIELD(is_multiply)
+        .set_default(true)
+        .describe("operation type is either multiplication or subduction");
   }
 };
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class CorrelationOp : public Operator {
  public:
   explicit CorrelationOp(CorrelationParam param) {
     this->param_ = param;
   }
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 3U);
     CHECK_NE(param_.kernel_size % 2, 0) << "kernel size should be odd number";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
     Tensor<xpu, 4, DType> data1 = in_data[Correlation::kData1].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> data2 = in_data[Correlation::kData2].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> out   = out_data[Correlation::kOut].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> tmp1  = out_data[Correlation::kTemp1].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> tmp2  = out_data[Correlation::kTemp2].get<xpu, 4, DType>(s);
-    tmp1 = DType(0.0f);
-    tmp2 = DType(0.0f);
-    out = DType(0.0f);
+    tmp1                        = DType(0.0f);
+    tmp2                        = DType(0.0f);
+    out                         = DType(0.0f);
     CHECK_EQ(data1.CheckContiguous(), true);
     CHECK_EQ(data2.CheckContiguous(), true);
     CHECK_EQ(out.CheckContiguous(), true);
@@ -95,75 +97,105 @@ class CorrelationOp : public Operator {
     CHECK_EQ(tmp2.CheckContiguous(), true);
     paddedbottomheight = data1.shape_[2] + 2 * param_.pad_size;
     paddedbottomwidth  = data1.shape_[3] + 2 * param_.pad_size;
-    kernel_radius_ = (param_.kernel_size - 1) / 2;
-    border_size_ = param_.max_displacement + kernel_radius_;
-    stride1 = param_.stride1;
-    stride2 = param_.stride2;
-    top_width_ = std::ceil(static_cast<float>(paddedbottomwidth - border_size_ * 2)\
-     / static_cast<float>(stride1));
-    top_height_ = std::ceil(static_cast<float>(paddedbottomheight - border_size_ * 2)\
-     / static_cast<float>(stride1));
+    kernel_radius_     = (param_.kernel_size - 1) / 2;
+    border_size_       = param_.max_displacement + kernel_radius_;
+    stride1            = param_.stride1;
+    stride2            = param_.stride2;
+    top_width_         = std::ceil(static_cast<float>(paddedbottomwidth - border_size_ * 2) /
+                           static_cast<float>(stride1));
+    top_height_        = std::ceil(static_cast<float>(paddedbottomheight - border_size_ * 2) /
+                            static_cast<float>(stride1));
     neighborhood_grid_radius_ = param_.max_displacement / stride2;
-    neighborhood_grid_width_ = neighborhood_grid_radius_ * 2 + 1;
-    top_channels_ = neighborhood_grid_width_ * neighborhood_grid_width_;
-    num =  data1.shape_[0];
-    channels = data1.shape_[1];
-    height = data1.shape_[2];
-    width = data1.shape_[3];
-    CorrelationForward(out, data1, data2, tmp1, tmp2, top_channels_, top_height_, top_width_,
-                       param_.pad_size, param_.is_multiply,
-                       param_.max_displacement, param_.kernel_size,
-                       neighborhood_grid_radius_, neighborhood_grid_width_,
-                       kernel_radius_, param_.stride1, param_.stride2);
+    neighborhood_grid_width_  = neighborhood_grid_radius_ * 2 + 1;
+    top_channels_             = neighborhood_grid_width_ * neighborhood_grid_width_;
+    num                       = data1.shape_[0];
+    channels                  = data1.shape_[1];
+    height                    = data1.shape_[2];
+    width                     = data1.shape_[3];
+    CorrelationForward(out,
+                       data1,
+                       data2,
+                       tmp1,
+                       tmp2,
+                       top_channels_,
+                       top_height_,
+                       top_width_,
+                       param_.pad_size,
+                       param_.is_multiply,
+                       param_.max_displacement,
+                       param_.kernel_size,
+                       neighborhood_grid_radius_,
+                       neighborhood_grid_width_,
+                       kernel_radius_,
+                       param_.stride1,
+                       param_.stride2);
   }
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s                   = ctx.get_stream<xpu>();
     Tensor<xpu, 4, DType> grad_data1 = in_grad[Correlation::kData1].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, DType> grad_data2 = in_grad[Correlation::kData2].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> out_g = out_grad[Correlation::kOut].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> tmp1 = out_data[Correlation::kTemp1].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> tmp2 = out_data[Correlation::kTemp2].get<xpu, 4, DType>(s);
-    if (req[0] != kAddTo) grad_data1 = DType(0.0f);
-    if (req[1] != kAddTo) grad_data2 = DType(0.0f);
+    Tensor<xpu, 4, DType> out_g      = out_grad[Correlation::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> tmp1       = out_data[Correlation::kTemp1].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> tmp2       = out_data[Correlation::kTemp2].get<xpu, 4, DType>(s);
+    if (req[0] != kAddTo)
+      grad_data1 = DType(0.0f);
+    if (req[1] != kAddTo)
+      grad_data2 = DType(0.0f);
     CHECK_EQ(grad_data1.CheckContiguous(), true);
     CHECK_EQ(grad_data2.CheckContiguous(), true);
     CHECK_EQ(out_g.CheckContiguous(), true);
     CHECK_EQ(tmp1.CheckContiguous(), true);
     CHECK_EQ(tmp2.CheckContiguous(), true);
-    CorrelationBackward(out_g, grad_data1, grad_data2, tmp1, tmp2, top_channels_,
-                        top_height_, top_width_, param_.pad_size, param_.is_multiply,
-                        param_.max_displacement, param_.kernel_size, neighborhood_grid_radius_,
-                        neighborhood_grid_width_, kernel_radius_, param_.stride1, param_.stride2,
-                        num, channels, height, width);
+    CorrelationBackward(out_g,
+                        grad_data1,
+                        grad_data2,
+                        tmp1,
+                        tmp2,
+                        top_channels_,
+                        top_height_,
+                        top_width_,
+                        param_.pad_size,
+                        param_.is_multiply,
+                        param_.max_displacement,
+                        param_.kernel_size,
+                        neighborhood_grid_radius_,
+                        neighborhood_grid_width_,
+                        kernel_radius_,
+                        param_.stride1,
+                        param_.stride2,
+                        num,
+                        channels,
+                        height,
+                        width);
   }
 
  private:
-    CorrelationParam param_;
-    int paddedbottomheight;
-    int paddedbottomwidth;
-    uint32_t kernel_radius_;
-    uint32_t border_size_;
-    uint32_t stride1;
-    uint32_t stride2;
-    uint32_t top_width_;
-    uint32_t top_height_;
-    uint32_t neighborhood_grid_radius_;
-    uint32_t neighborhood_grid_width_;
-    uint32_t top_channels_;
-    int  num;
-    int  channels;
-    int  height;
-    int  width;
-};   //  class CorrelationOp
+  CorrelationParam param_;
+  int paddedbottomheight;
+  int paddedbottomwidth;
+  uint32_t kernel_radius_;
+  uint32_t border_size_;
+  uint32_t stride1;
+  uint32_t stride2;
+  uint32_t top_width_;
+  uint32_t top_height_;
+  uint32_t neighborhood_grid_radius_;
+  uint32_t neighborhood_grid_width_;
+  uint32_t top_channels_;
+  int num;
+  int channels;
+  int height;
+  int width;
+};  //  class CorrelationOp
 //  Decalre Factory function
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(CorrelationParam param, int dtype);
 #if DMLC_USE_CXX11
 class CorrelationProp : public OperatorProperty {
@@ -180,15 +212,15 @@ class CorrelationProp : public OperatorProperty {
   int NumVisibleOutputs() const override {
     return 1;
   }
-void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
+  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.Init(kwargs);
   }
   std::map<std::string, std::string> GetParams() const override {
     return param_.__DICT__();
   }
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data1, data2]";
     mxnet::TShape dshape1 = in_shape->at(Correlation::kData1);
@@ -206,32 +238,32 @@ void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) overr
     uint32_t neighborhood_grid_width_;
     uint32_t top_channels_;
     uint32_t border_size_;
-    paddedbottomheight = dshape1[2] + 2*param_.pad_size;
-    paddedbottomwidth  = dshape1[3] + 2*param_.pad_size;
-    kernel_radius_ = (param_.kernel_size -1)/2;
-    border_size_ = param_.max_displacement + kernel_radius_;
-    stride1 = param_.stride1;
-    stride2 = param_.stride2;
-    top_width_ = std::ceil(static_cast<float>(paddedbottomwidth - border_size_ * 2)\
-     / static_cast<float>(stride1));
-    top_height_ = std::ceil(static_cast<float>(paddedbottomheight - border_size_ * 2)\
-     / static_cast<float>(stride1));
+    paddedbottomheight = dshape1[2] + 2 * param_.pad_size;
+    paddedbottomwidth  = dshape1[3] + 2 * param_.pad_size;
+    kernel_radius_     = (param_.kernel_size - 1) / 2;
+    border_size_       = param_.max_displacement + kernel_radius_;
+    stride1            = param_.stride1;
+    stride2            = param_.stride2;
+    top_width_         = std::ceil(static_cast<float>(paddedbottomwidth - border_size_ * 2) /
+                           static_cast<float>(stride1));
+    top_height_        = std::ceil(static_cast<float>(paddedbottomheight - border_size_ * 2) /
+                            static_cast<float>(stride1));
     neighborhood_grid_radius_ = param_.max_displacement / stride2;
-    neighborhood_grid_width_ = neighborhood_grid_radius_ * 2 + 1;
-    top_channels_ = neighborhood_grid_width_ * neighborhood_grid_width_;
-    CHECK_GE(top_width_, 1U) <<
-    "Correlation cannot be done with current settings.Neighborhood and kernel don't fit in blob";
-    CHECK_GE(top_height_, 1U) <<
-    "Correlation cannot be done with current settings.Neighborhood and kernel don't fit in blob";
+    neighborhood_grid_width_  = neighborhood_grid_radius_ * 2 + 1;
+    top_channels_             = neighborhood_grid_width_ * neighborhood_grid_width_;
+    CHECK_GE(top_width_, 1U) << "Correlation cannot be done with current settings.Neighborhood and "
+                                "kernel don't fit in blob";
+    CHECK_GE(top_height_, 1U) << "Correlation cannot be done with current settings.Neighborhood "
+                                 "and kernel don't fit in blob";
     out_shape->clear();
     out_shape->push_back(Shape4(dshape1[0], top_channels_, top_height_, top_width_));
     out_shape->push_back(Shape4(dshape1[0], paddedbottomheight, paddedbottomwidth, dshape1[1]));
     out_shape->push_back(Shape4(dshape1[0], paddedbottomheight, paddedbottomwidth, dshape1[1]));
     return true;
   }
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     int dtype = (*in_type)[0];
     type_assign(&dtype, (*in_type)[1]);
     type_assign(&dtype, (*out_type)[0]);
@@ -247,27 +279,27 @@ void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) overr
   }
   OperatorProperty* Copy() const override {
     CorrelationProp* Correlation_sym = new CorrelationProp();
-    Correlation_sym->param_ = this->param_;
+    Correlation_sym->param_          = this->param_;
     return Correlation_sym;
   }
   std::string TypeString() const override {
     return "Correlation";
   }
   //  decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
-     return {out_grad[Correlation::kOut],
-     out_data[Correlation::kTemp1], out_data[Correlation::kTemp2]};
-}
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
+    return {
+        out_grad[Correlation::kOut], out_data[Correlation::kTemp1], out_data[Correlation::kTemp2]};
+  }
   Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   CorrelationParam param_;
diff --git a/src/operator/correlation.cc b/src/operator/correlation.cc
index 30a147177687..64528ce8cfb3 100644
--- a/src/operator/correlation.cc
+++ b/src/operator/correlation.cc
@@ -22,149 +22,160 @@
  * \file correlation.cc
  * \brief correlation op
  * \author Xu Dong
-*/
+ */
 #include "./correlation-inl.h"
 #include "./mshadow_op.h"
 
 namespace mshadow {
-template<typename Dtype>
-void AddPad(const Tensor<cpu, 4, Dtype> &original,
-            const Tensor<cpu, 4, Dtype> &out,
-            int pad_size)
-{ for (index_t nbatch = 0 ; nbatch < original.size(0) ; nbatch++)
-  for (index_t channel = 0 ; channel < original.size(1) ; channel++)
-    for (index_t h = 0 ; h < original.size(2) ; h++)
-      for (index_t w = 0 ; w < original.size(3) ; w++)
-         out[nbatch][h+pad_size][w+pad_size][channel] = original[nbatch][channel][h][w];
+template <typename Dtype>
+void AddPad(const Tensor<cpu, 4, Dtype>& original, const Tensor<cpu, 4, Dtype>& out, int pad_size) {
+  for (index_t nbatch = 0; nbatch < original.size(0); nbatch++)
+    for (index_t channel = 0; channel < original.size(1); channel++)
+      for (index_t h = 0; h < original.size(2); h++)
+        for (index_t w = 0; w < original.size(3); w++)
+          out[nbatch][h + pad_size][w + pad_size][channel] = original[nbatch][channel][h][w];
 }
-template<typename Dtype>
-inline void CorrelationForward(const Tensor<cpu, 4, Dtype> &out,
-                               const Tensor<cpu, 4, Dtype> &data1,
-                               const Tensor<cpu, 4, Dtype> &data2,
-                               const Tensor<cpu, 4, Dtype> &tmp1,
-                               const Tensor<cpu, 4, Dtype> &tmp2,
-                               int top_channels_, int top_height_, int top_width_,
-                               int pad_size_, bool is_multiply,
-                               int max_displacement_, int kernel_size_,
-                               int neighborhood_grid_radius_, int neighborhood_grid_width_,
-                               int  kernel_radius_, int stride1_, int stride2_) {
-  const index_t bnum = data1.size(0);
+template <typename Dtype>
+inline void CorrelationForward(const Tensor<cpu, 4, Dtype>& out,
+                               const Tensor<cpu, 4, Dtype>& data1,
+                               const Tensor<cpu, 4, Dtype>& data2,
+                               const Tensor<cpu, 4, Dtype>& tmp1,
+                               const Tensor<cpu, 4, Dtype>& tmp2,
+                               int top_channels_,
+                               int top_height_,
+                               int top_width_,
+                               int pad_size_,
+                               bool is_multiply,
+                               int max_displacement_,
+                               int kernel_size_,
+                               int neighborhood_grid_radius_,
+                               int neighborhood_grid_width_,
+                               int kernel_radius_,
+                               int stride1_,
+                               int stride2_) {
+  const index_t bnum  = data1.size(0);
   const int bchannels = data1.size(1);
-  const int sumelems = kernel_size_ * kernel_size_ * bchannels;
+  const int sumelems  = kernel_size_ * kernel_size_ * bchannels;
   AddPad<Dtype>(data1, tmp1, pad_size_);
   index_t top_channels_unsigned_ = static_cast<index_t>(top_channels_);
   AddPad<Dtype>(data2, tmp2, pad_size_);
-  for (index_t i = 0 ; i < static_cast<index_t>(top_height_) ; i++)
-      for (index_t j = 0 ; j < static_cast<index_t>(top_width_); j++)
-        for (index_t nbatch = 0 ; nbatch < bnum ; nbatch++) {
-            int x1 = j*stride1_+max_displacement_;
-            int y1 = i*stride1_+max_displacement_;
-            for (index_t top_channel = 0 ; top_channel < top_channels_unsigned_ ; top_channel++) {
-              int s2o = (top_channel % neighborhood_grid_width_ -\
-                         neighborhood_grid_radius_) * stride2_;
-              int s2p = (top_channel / neighborhood_grid_width_ -\
-                         neighborhood_grid_radius_) * stride2_;
-              int x2 = x1 + s2o;
-              int y2 = y1 + s2p;
-              for (index_t h = 0; h < static_cast<index_t>(kernel_size_); h++)
-                for (index_t w = 0; w < static_cast<index_t>(kernel_size_); w++)
-                  for (index_t channel = 0; channel < static_cast<index_t>(bchannels); channel++) {
-                    if (is_multiply == true)
-                        out[nbatch][top_channel][i][j] += \
-                        tmp1[nbatch][y1+h][x1+w][channel]*tmp2[nbatch][y2+h][x2+w][channel];
-                    else
-                        out[nbatch][top_channel][i][j] += std::abs(\
-                        tmp1[nbatch][y1+h][x1+w][channel]-tmp2[nbatch][y2+h][x2+w][channel]);
-                  }
-              out[nbatch][top_channel][i][j] /= sumelems;
-            }
+  for (index_t i = 0; i < static_cast<index_t>(top_height_); i++)
+    for (index_t j = 0; j < static_cast<index_t>(top_width_); j++)
+      for (index_t nbatch = 0; nbatch < bnum; nbatch++) {
+        int x1 = j * stride1_ + max_displacement_;
+        int y1 = i * stride1_ + max_displacement_;
+        for (index_t top_channel = 0; top_channel < top_channels_unsigned_; top_channel++) {
+          int s2o = (top_channel % neighborhood_grid_width_ - neighborhood_grid_radius_) * stride2_;
+          int s2p = (top_channel / neighborhood_grid_width_ - neighborhood_grid_radius_) * stride2_;
+          int x2  = x1 + s2o;
+          int y2  = y1 + s2p;
+          for (index_t h = 0; h < static_cast<index_t>(kernel_size_); h++)
+            for (index_t w = 0; w < static_cast<index_t>(kernel_size_); w++)
+              for (index_t channel = 0; channel < static_cast<index_t>(bchannels); channel++) {
+                if (is_multiply == true)
+                  out[nbatch][top_channel][i][j] +=
+                      tmp1[nbatch][y1 + h][x1 + w][channel] * tmp2[nbatch][y2 + h][x2 + w][channel];
+                else
+                  out[nbatch][top_channel][i][j] += std::abs(tmp1[nbatch][y1 + h][x1 + w][channel] -
+                                                             tmp2[nbatch][y2 + h][x2 + w][channel]);
+              }
+          out[nbatch][top_channel][i][j] /= sumelems;
         }
+      }
 }
-template<typename Dtype>
-inline void CorrelationBackward(const Tensor<cpu, 4, Dtype> &out_grad,
-                                const Tensor<cpu, 4, Dtype> &in_grad1,
-                                const Tensor<cpu, 4, Dtype> &in_grad2,
-                                const Tensor<cpu, 4, Dtype> &tmp1,
-                                const Tensor<cpu, 4, Dtype> &tmp2,
-                                int top_channels_, int top_height_,
-                                int top_width_, int pad_size_,
-                                bool is_multiply, int max_displacement_,
-                                int kernel_size_, int neighborhood_grid_radius_,
+template <typename Dtype>
+inline void CorrelationBackward(const Tensor<cpu, 4, Dtype>& out_grad,
+                                const Tensor<cpu, 4, Dtype>& in_grad1,
+                                const Tensor<cpu, 4, Dtype>& in_grad2,
+                                const Tensor<cpu, 4, Dtype>& tmp1,
+                                const Tensor<cpu, 4, Dtype>& tmp2,
+                                int top_channels_,
+                                int top_height_,
+                                int top_width_,
+                                int pad_size_,
+                                bool is_multiply,
+                                int max_displacement_,
+                                int kernel_size_,
+                                int neighborhood_grid_radius_,
                                 int neighborhood_grid_width_,
-                                int  kernel_radius_, int stride1_,
-                                int stride2_, int num,
-                                int channels, int height, int width
-                            ) {
+                                int kernel_radius_,
+                                int stride1_,
+                                int stride2_,
+                                int num,
+                                int channels,
+                                int height,
+                                int width) {
   const float sumelems = kernel_size_ * kernel_size_ * channels;
-  for (index_t i = 0 ; i < static_cast<index_t>(top_height_) ; i++)
-     for (index_t j = 0 ; j < static_cast<index_t>(top_width_); j++)
-        for (index_t nbatch = 0 ; nbatch < static_cast<index_t>(num) ; nbatch++) {
-            int x1 = j*stride1_+max_displacement_;
-            int y1 = i*stride1_+max_displacement_;
-            for (int top_channel = 0 ; top_channel < top_channels_ ; top_channel++) {
-              int s2o = (top_channel % neighborhood_grid_width_ - \
-              neighborhood_grid_radius_) * stride2_;
-              int s2p = (top_channel / neighborhood_grid_width_ - \
-              neighborhood_grid_radius_) * stride2_;
-              int x2 = x1 + s2o;
-              int y2 = y1 + s2p;
-              for (int h = 0; h < kernel_size_; h++)
-                for (int w = 0; w < kernel_size_; w++)
-                  for (int channel = 0 ; channel < channels; channel++) {
-                    if (is_multiply == true) {
-                      if ((y1 +  h - pad_size_ >= 0) && (x1 + w - pad_size_ >= 0) && \
-                      (y1 + h < height +pad_size_) && (x1 + w < width + pad_size_)) {
-                        in_grad1[nbatch][channel][y1+h-pad_size_][x1+w-pad_size_] += \
-                        out_grad[nbatch][top_channel][i][j] * \
-                        tmp2[nbatch][y2+h][x2+w][channel]/sumelems;
-                       }
-                       if ((y2 +  h - pad_size_ >= 0) && (x2 + w -pad_size_ >=0) && \
-                       (y2 + h < height +pad_size_) && (x2 + w < width + pad_size_)) {
-                       in_grad2[nbatch][channel][y2+h-pad_size_][x2+w-pad_size_] += \
-                       out_grad[nbatch][top_channel][i][j] * \
-                       tmp1[nbatch][y1+h][x1+w][channel]/sumelems;
-                       }
-                    } else {
-                      if ((y1 +  h - pad_size_ >= 0) && (x1 + w -pad_size_ >=0) && \
+  for (index_t i = 0; i < static_cast<index_t>(top_height_); i++)
+    for (index_t j = 0; j < static_cast<index_t>(top_width_); j++)
+      for (index_t nbatch = 0; nbatch < static_cast<index_t>(num); nbatch++) {
+        int x1 = j * stride1_ + max_displacement_;
+        int y1 = i * stride1_ + max_displacement_;
+        for (int top_channel = 0; top_channel < top_channels_; top_channel++) {
+          int s2o = (top_channel % neighborhood_grid_width_ - neighborhood_grid_radius_) * stride2_;
+          int s2p = (top_channel / neighborhood_grid_width_ - neighborhood_grid_radius_) * stride2_;
+          int x2  = x1 + s2o;
+          int y2  = y1 + s2p;
+          for (int h = 0; h < kernel_size_; h++)
+            for (int w = 0; w < kernel_size_; w++)
+              for (int channel = 0; channel < channels; channel++) {
+                if (is_multiply == true) {
+                  if ((y1 + h - pad_size_ >= 0) && (x1 + w - pad_size_ >= 0) &&
+                      (y1 + h < height + pad_size_) && (x1 + w < width + pad_size_)) {
+                    in_grad1[nbatch][channel][y1 + h - pad_size_][x1 + w - pad_size_] +=
+                        out_grad[nbatch][top_channel][i][j] *
+                        tmp2[nbatch][y2 + h][x2 + w][channel] / sumelems;
+                  }
+                  if ((y2 + h - pad_size_ >= 0) && (x2 + w - pad_size_ >= 0) &&
+                      (y2 + h < height + pad_size_) && (x2 + w < width + pad_size_)) {
+                    in_grad2[nbatch][channel][y2 + h - pad_size_][x2 + w - pad_size_] +=
+                        out_grad[nbatch][top_channel][i][j] *
+                        tmp1[nbatch][y1 + h][x1 + w][channel] / sumelems;
+                  }
+                } else {
+                  if ((y1 + h - pad_size_ >= 0) && (x1 + w - pad_size_ >= 0) &&
                       (y1 + h < height + pad_size_) && (x1 + w < width + pad_size_)) {
-                        Dtype sign  = (tmp1[nbatch][y1+h][x1+w][channel] >= \
-                        tmp2[nbatch][y2+h][x2+w][channel])? Dtype(1.0) : Dtype(-1.0);
-                        in_grad1[nbatch][channel][y1+h-pad_size_][x1+w-pad_size_] +=\
-                        out_grad[nbatch][top_channel][i][j]*sign/sumelems;
-                      }
-                      if ((y2 +  h - pad_size_ >= 0) && (x2 + w - pad_size_ >=0) && \
+                    Dtype sign = (tmp1[nbatch][y1 + h][x1 + w][channel] >=
+                                  tmp2[nbatch][y2 + h][x2 + w][channel])
+                                     ? Dtype(1.0)
+                                     : Dtype(-1.0);
+                    in_grad1[nbatch][channel][y1 + h - pad_size_][x1 + w - pad_size_] +=
+                        out_grad[nbatch][top_channel][i][j] * sign / sumelems;
+                  }
+                  if ((y2 + h - pad_size_ >= 0) && (x2 + w - pad_size_ >= 0) &&
                       (y2 + h < height + pad_size_) && (x2 + w < width + pad_size_)) {
-                        Dtype sign  = (tmp1[nbatch][y1+h][x1+w][channel] >= \
-                        tmp2[nbatch][y2+h][x2+w][channel])? Dtype(-1.0) : Dtype(1.0);
-                        in_grad2[nbatch][channel][y2+h-pad_size_][x2+w-pad_size_] +=\
-                        out_grad[nbatch][top_channel][i][j]*sign/sumelems;
-                       }
-                    }
+                    Dtype sign = (tmp1[nbatch][y1 + h][x1 + w][channel] >=
+                                  tmp2[nbatch][y2 + h][x2 + w][channel])
+                                     ? Dtype(-1.0)
+                                     : Dtype(1.0);
+                    in_grad2[nbatch][channel][y2 + h - pad_size_][x2 + w - pad_size_] +=
+                        out_grad[nbatch][top_channel][i][j] * sign / sumelems;
                   }
-               }
-         }
+                }
+              }
+        }
+      }
 }
 }  // namespace mshadow
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(CorrelationParam param, int dtype) {
+template <>
+Operator* CreateOp<cpu>(CorrelationParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new CorrelationOp<cpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new CorrelationOp<cpu, DType>(param); });
   return op;
 }
-Operator* CorrelationProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                            std::vector<int> *in_type) const {
+Operator* CorrelationProp::CreateOperatorEx(Context ctx,
+                                            mxnet::ShapeVector* in_shape,
+                                            std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, in_type->at(0));
 }
 DMLC_REGISTER_PARAMETER(CorrelationParam);
 MXNET_REGISTER_OP_PROPERTY(Correlation, CorrelationProp)
-.add_argument("data1", "NDArray-or-Symbol", "Input data1 to the correlation.")
-.add_argument("data2", "NDArray-or-Symbol", "Input data2 to the correlation.")
-.add_arguments(CorrelationParam::__FIELDS__())
-.describe(R"code(Applies correlation to inputs.
+    .add_argument("data1", "NDArray-or-Symbol", "Input data1 to the correlation.")
+    .add_argument("data2", "NDArray-or-Symbol", "Input data2 to the correlation.")
+    .add_arguments(CorrelationParam::__FIELDS__())
+    .describe(R"code(Applies correlation to inputs.
 
 The correlation layer performs multiplicative patch comparisons between two feature maps.
 
diff --git a/src/operator/correlation.cu b/src/operator/correlation.cu
index e0b1bd8625ec..39c9759a073c 100644
--- a/src/operator/correlation.cu
+++ b/src/operator/correlation.cu
@@ -22,7 +22,7 @@
  * \file Correation.cu
  * \brief  Correlation operator
  * \author Xu Dong
-*/
+ */
 #include "./correlation-inl.h"
 #include <mshadow/tensor.h>
 #include <mshadow/cuda/reduce.cuh>
@@ -30,13 +30,13 @@
 #include <vector>
 #include "./mxnet_op.h"
 
-#define ROUND_OFF 50000
-#define WARPS_PER_BLOCK 1
+#define ROUND_OFF        50000
+#define WARPS_PER_BLOCK  1
 #define THREADS_PER_WARP 32
-#define CORRELATION_CUDA_CHECK(condition) \
-  /* Code block avoids redefinition of cudaError_t error */ \
-  do { \
-    cudaError_t error = condition; \
+#define CORRELATION_CUDA_CHECK(condition)                             \
+  /* Code block avoids redefinition of cudaError_t error */           \
+  do {                                                                \
+    cudaError_t error = condition;                                    \
     CHECK_EQ(error, cudaSuccess) << " " << cudaGetErrorString(error); \
   } while (0)
 
@@ -44,29 +44,42 @@ namespace mshadow {
 namespace cuda {
 // == Correlation Kernel
 template <typename Dtype>
-__global__ void CorrelateData(const int nthreads, int num, int topwidth,
-  int topheight, int topchannels, int topcount,
-  int max_displacement, int neighborhood_grid_radius,
-  int neighborhood_grid_width, int kernel_radius, int kernel_size, int stride1, int stride2,
-  int bottomwidth, int bottomheight, int bottomchannels,
-  const Dtype *bottom0, const Dtype *bottom1, Dtype *top) {
+__global__ void CorrelateData(const int nthreads,
+                              int num,
+                              int topwidth,
+                              int topheight,
+                              int topchannels,
+                              int topcount,
+                              int max_displacement,
+                              int neighborhood_grid_radius,
+                              int neighborhood_grid_width,
+                              int kernel_radius,
+                              int kernel_size,
+                              int stride1,
+                              int stride2,
+                              int bottomwidth,
+                              int bottomheight,
+                              int bottomchannels,
+                              const Dtype* bottom0,
+                              const Dtype* bottom1,
+                              Dtype* top) {
   extern __shared__ char patch_data_char[];
-  Dtype *patch_data = reinterpret_cast<Dtype *>(patch_data_char);
+  Dtype* patch_data = reinterpret_cast<Dtype*>(patch_data_char);
   //  First (upper left) position of kernel upper-left corner
   //  in current center position of neighborhood in image 1
-  int x1 = blockIdx.x * stride1 + max_displacement;
-  int y1 = blockIdx.y * stride1 + max_displacement;
-  int item = blockIdx.z;
+  int x1     = blockIdx.x * stride1 + max_displacement;
+  int y1     = blockIdx.y * stride1 + max_displacement;
+  int item   = blockIdx.z;
   int ch_off = threadIdx.x;
   //  Load 3D patch into shared shared memory
-  for (int j = 0; j < kernel_size; j++) {  //  HEIGHT
+  for (int j = 0; j < kernel_size; j++) {    //  HEIGHT
     for (int i = 0; i < kernel_size; i++) {  //  WIDTH
       int ji_off = ((j * kernel_size) + i) * bottomchannels;
-      for (int ch = ch_off; ch < bottomchannels; ch += (THREADS_PER_WARP * WARPS_PER_BLOCK))  {
-          //  CHANNELS
-          int idx1 = ((item * bottomheight + y1+j) * bottomwidth + x1+i) * bottomchannels + ch;
-          int idxPatchData = ji_off + ch;
-          patch_data[idxPatchData] = bottom0[idx1];
+      for (int ch = ch_off; ch < bottomchannels; ch += (THREADS_PER_WARP * WARPS_PER_BLOCK)) {
+        //  CHANNELS
+        int idx1 = ((item * bottomheight + y1 + j) * bottomwidth + x1 + i) * bottomchannels + ch;
+        int idxPatchData         = ji_off + ch;
+        patch_data[idxPatchData] = bottom0[idx1];
       }
     }
   }
@@ -75,15 +88,15 @@ __global__ void CorrelateData(const int nthreads, int num, int topwidth,
   //  Compute correlation
   for (int top_channel = 0; top_channel < topchannels; top_channel++) {
     sum[ch_off] = 0;
-    int s2o = (top_channel % neighborhood_grid_width - neighborhood_grid_radius) * stride2;
-    int s2p = (top_channel / neighborhood_grid_width - neighborhood_grid_radius) * stride2;
-    for (int j = 0; j < kernel_size; j++) {  //  HEIGHT
+    int s2o     = (top_channel % neighborhood_grid_width - neighborhood_grid_radius) * stride2;
+    int s2p     = (top_channel / neighborhood_grid_width - neighborhood_grid_radius) * stride2;
+    for (int j = 0; j < kernel_size; j++) {    //  HEIGHT
       for (int i = 0; i < kernel_size; i++) {  //  WIDTH
         int ji_off = ((j * kernel_size) + i) * bottomchannels;
         for (int ch = ch_off; ch < bottomchannels; ch += (THREADS_PER_WARP * WARPS_PER_BLOCK)) {
           //  CHANNELS
-          int x2 = x1 + s2o;
-          int y2 = y1 + s2p;
+          int x2           = x1 + s2o;
+          int y2           = y1 + s2p;
           int idxPatchData = ji_off + ch;
           int idx2 = ((item * bottomheight + y2 + j) * bottomwidth + x2 + i) * bottomchannels + ch;
           sum[ch_off] += patch_data[idxPatchData] * bottom1[idx2];
@@ -92,98 +105,128 @@ __global__ void CorrelateData(const int nthreads, int num, int topwidth,
     }
     __syncthreads();
     if (ch_off == 0) {
-        Dtype total_sum = 0;
-        for (int idx = 0; idx < THREADS_PER_WARP * WARPS_PER_BLOCK; idx++) {
-            total_sum += sum[idx];
-        }
-        const int sumelems = kernel_size * kernel_size * bottomchannels;
-        const int index = ((top_channel * topheight + blockIdx.y) * topwidth) + blockIdx.x;
-        top[index + item*topcount] = total_sum / static_cast<float>(sumelems);
+      Dtype total_sum = 0;
+      for (int idx = 0; idx < THREADS_PER_WARP * WARPS_PER_BLOCK; idx++) {
+        total_sum += sum[idx];
+      }
+      const int sumelems = kernel_size * kernel_size * bottomchannels;
+      const int index    = ((top_channel * topheight + blockIdx.y) * topwidth) + blockIdx.x;
+      top[index + item * topcount] = total_sum / static_cast<float>(sumelems);
     }  //  Aggregate result of  different threads
   }
 }
 //  == Correlation Backward Pass Kernel (For data1)
 template <typename Dtype>
-__global__ void CorrelateDataBackward0(const int nthreads, int num, int item,
-  int topwidth, int topheight, int topchannels,
-  int max_displacement, int neighborhood_grid_radius,
-  int neighborhood_grid_width, int kernel_radius, int stride1, int stride2,
-  int bottomwidth, int bottomheight, int pbottomwidth, int pbottomheight,
-  int bottomchannels, int bottomcount, int pad_size,
-  Dtype *bottom0diff, const Dtype *bottom1, const Dtype *topdiff) {
+__global__ void CorrelateDataBackward0(const int nthreads,
+                                       int num,
+                                       int item,
+                                       int topwidth,
+                                       int topheight,
+                                       int topchannels,
+                                       int max_displacement,
+                                       int neighborhood_grid_radius,
+                                       int neighborhood_grid_width,
+                                       int kernel_radius,
+                                       int stride1,
+                                       int stride2,
+                                       int bottomwidth,
+                                       int bottomheight,
+                                       int pbottomwidth,
+                                       int pbottomheight,
+                                       int bottomchannels,
+                                       int bottomcount,
+                                       int pad_size,
+                                       Dtype* bottom0diff,
+                                       const Dtype* bottom1,
+                                       const Dtype* topdiff) {
   CUDA_KERNEL_LOOP(index, nthreads) {
-    int n = index % bottomchannels;  //  channels
-    int l = (index / bottomchannels) % bottomwidth + pad_size;  //  w-pos
+    int n = index % bottomchannels;                                            //  channels
+    int l = (index / bottomchannels) % bottomwidth + pad_size;                 //  w-pos
     int m = (index / bottomchannels / bottomwidth) % bottomheight + pad_size;  //  h-pos
     //  Get X,Y ranges and clamp
     //  round_off is a trick to enable integer division with ceil, even for negative numbers
     //  We use a large offset, for the inner part not to become negative.
-    const int round_off = ROUND_OFF;
+    const int round_off    = ROUND_OFF;
     const int round_off_s1 = stride1 * round_off;
     //  We add round_off before_s1 the int division and subtract round_off after it,
     //  to ensure the formula matches ceil behavior:
-    int xmin = (l - 2*kernel_radius - max_displacement + round_off_s1 - 1)\
-     / stride1 + 1 - round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
-    int ymin = (m - 2*kernel_radius - max_displacement + round_off_s1 - 1)\
-     / stride1 + 1 - round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
+    int xmin = (l - 2 * kernel_radius - max_displacement + round_off_s1 - 1) / stride1 + 1 -
+               round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
+    int ymin = (m - 2 * kernel_radius - max_displacement + round_off_s1 - 1) / stride1 + 1 -
+               round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
     //  Same here:
     int xmax = (l - max_displacement + round_off_s1) / stride1 - round_off;
     //  floor (l - max_displacement) / stride1
     int ymax = (m - max_displacement + round_off_s1) / stride1 - round_off;
     //  floor (m - max_displacement) / stride1
     Dtype sum = 0;
-    if (xmax >= 0 && ymax >= 0 && (xmin <= topwidth-1) && (ymin <= topheight-1)) {
-        xmin = max(0, xmin);
-        xmax = min(topwidth-1, xmax);
-        ymin = max(0, ymin);
-        ymax = min(topheight-1, ymax);
-        for (int p = -neighborhood_grid_radius; p <= neighborhood_grid_radius; p++) {
-          for (int o = -neighborhood_grid_radius; o <= neighborhood_grid_radius; o++) {
-            //  Get bottom1 data:
-            int s2o = stride2 * o;
-            int s2p = stride2 * p;
-            int idxbot1 = ((item * pbottomheight + (m + s2p)) * pbottomwidth + (l + s2o))\
-             * bottomchannels + n;
-            Dtype bot1tmp = bottom1[idxbot1];  // bottom1[l+s2o,m+s2p,n]
-            //  Index offset for topdiff in following loops:
-            int op = (p+neighborhood_grid_radius) * neighborhood_grid_width\
-             + (o + neighborhood_grid_radius);  //  index [o,p]
-            int idxopoffset = (item * topchannels + op);
-            for (int y = ymin; y <= ymax; y++) {
-              for (int x = xmin; x <= xmax; x++) {
-                int idxtopdiff = (idxopoffset * topheight + y) * topwidth + x;  //  topdiff[x,y,o,p]
-                sum += topdiff[idxtopdiff] * bot1tmp;
-              }
+    if (xmax >= 0 && ymax >= 0 && (xmin <= topwidth - 1) && (ymin <= topheight - 1)) {
+      xmin = max(0, xmin);
+      xmax = min(topwidth - 1, xmax);
+      ymin = max(0, ymin);
+      ymax = min(topheight - 1, ymax);
+      for (int p = -neighborhood_grid_radius; p <= neighborhood_grid_radius; p++) {
+        for (int o = -neighborhood_grid_radius; o <= neighborhood_grid_radius; o++) {
+          //  Get bottom1 data:
+          int s2o = stride2 * o;
+          int s2p = stride2 * p;
+          int idxbot1 =
+              ((item * pbottomheight + (m + s2p)) * pbottomwidth + (l + s2o)) * bottomchannels + n;
+          Dtype bot1tmp = bottom1[idxbot1];  // bottom1[l+s2o,m+s2p,n]
+          //  Index offset for topdiff in following loops:
+          int op = (p + neighborhood_grid_radius) * neighborhood_grid_width +
+                   (o + neighborhood_grid_radius);  //  index [o,p]
+          int idxopoffset = (item * topchannels + op);
+          for (int y = ymin; y <= ymax; y++) {
+            for (int x = xmin; x <= xmax; x++) {
+              int idxtopdiff = (idxopoffset * topheight + y) * topwidth + x;  //  topdiff[x,y,o,p]
+              sum += topdiff[idxtopdiff] * bot1tmp;
             }
           }
         }
+      }
     }
-    const int sumelems = (kernel_radius * 2 + 1) * (kernel_radius * 2+1) * bottomchannels;
-    const int bot0index = ((n * bottomheight) + (m-pad_size)) * bottomwidth + (l-pad_size);
+    const int sumelems  = (kernel_radius * 2 + 1) * (kernel_radius * 2 + 1) * bottomchannels;
+    const int bot0index = ((n * bottomheight) + (m - pad_size)) * bottomwidth + (l - pad_size);
     bottom0diff[bot0index + item * bottomcount] = sum / static_cast<float>(sumelems);
   }
 }
 // == Correlation Backward Pass Kernel (For Blob 1)
 template <typename Dtype>
 __global__ void CorrelateDataBackward1(const int nthreads,
-  int num, int item, int topwidth, int topheight, int topchannels,
-  int max_displacement, int neighborhood_grid_radius,
-  int neighborhood_grid_width, int kernel_radius, int stride1, int stride2,
-  int bottomwidth, int bottomheight, int pbottomwidth, int pbottomheight,
-  int bottomchannels, int bottomcount, int pad_size,
-  const Dtype *bottom0, Dtype *bottom1diff, const Dtype *topdiff) {
+                                       int num,
+                                       int item,
+                                       int topwidth,
+                                       int topheight,
+                                       int topchannels,
+                                       int max_displacement,
+                                       int neighborhood_grid_radius,
+                                       int neighborhood_grid_width,
+                                       int kernel_radius,
+                                       int stride1,
+                                       int stride2,
+                                       int bottomwidth,
+                                       int bottomheight,
+                                       int pbottomwidth,
+                                       int pbottomheight,
+                                       int bottomchannels,
+                                       int bottomcount,
+                                       int pad_size,
+                                       const Dtype* bottom0,
+                                       Dtype* bottom1diff,
+                                       const Dtype* topdiff) {
   CUDA_KERNEL_LOOP(index, nthreads) {
     //  int l = index % bottomwidth + pad_size; //w-pos
     //  int m = (index / bottomwidth) % bottomheight + pad_size; //  h-pos
     //  int n = (index / bottomwidth / bottomheight) % bottomchannels; //  channels
-    int n = index % bottomchannels;  //  channels
-    int l = (index / bottomchannels) % bottomwidth + pad_size;  //  w-pos
+    int n = index % bottomchannels;                                            //  channels
+    int l = (index / bottomchannels) % bottomwidth + pad_size;                 //  w-pos
     int m = (index / bottomchannels / bottomwidth) % bottomheight + pad_size;  //  h-pos
     //  round_off is a trick to enable integer division with ceil, even for negative numbers
     //  We use a large offset, for the inner part not to become negative.
-    const int round_off = ROUND_OFF;
+    const int round_off    = ROUND_OFF;
     const int round_off_s1 = stride1 * round_off;
-    Dtype sum = 0;
+    Dtype sum              = 0;
     for (int p = -neighborhood_grid_radius; p <= neighborhood_grid_radius; p++) {
       for (int o = -neighborhood_grid_radius; o <= neighborhood_grid_radius; o++) {
         int s2o = stride2 * o;
@@ -191,11 +234,11 @@ __global__ void CorrelateDataBackward1(const int nthreads,
         //  Get X,Y ranges and clamp
         //  We add round_off before_s1 the int division and subtract round_off after it,
         //  to ensure the formula matches ceil behavior:
-        int xmin = (l - 2*kernel_radius - max_displacement - s2o + round_off_s1 - 1)\
-         / stride1 + 1 - round_off;
-         // ceil (l - 2*kernel_radius - max_displacement - s2o) / stride1
-        int ymin = (m - 2*kernel_radius - max_displacement - s2p + round_off_s1 - 1)\
-         / stride1 + 1 - round_off;
+        int xmin = (l - 2 * kernel_radius - max_displacement - s2o + round_off_s1 - 1) / stride1 +
+                   1 - round_off;
+        // ceil (l - 2*kernel_radius - max_displacement - s2o) / stride1
+        int ymin = (m - 2 * kernel_radius - max_displacement - s2p + round_off_s1 - 1) / stride1 +
+                   1 - round_off;
         // ceil (l - 2*kernel_radius - max_displacement - s2o) / stride1
         //  Same here:
         int xmax = (l - max_displacement - s2o + round_off_s1) / stride1 - round_off;
@@ -203,64 +246,74 @@ __global__ void CorrelateDataBackward1(const int nthreads,
         int ymax = (m - max_displacement - s2p + round_off_s1) / stride1 - round_off;
         //  floor (m - max_displacement - s2p) / stride1
         if (xmax >= 0 && ymax >= 0 && (xmin <= topwidth - 1) && (ymin <= topheight - 1)) {
-            xmin = max(0, xmin);
-            xmax = min(topwidth-1, xmax);
-            ymin = max(0, ymin);
-            ymax = min(topheight-1, ymax);
-            //  Get bottom0 data:
-            int idxbot0 = ((item * pbottomheight + (m - s2p)) \
-            * pbottomwidth + (l - s2o)) * bottomchannels + n;
-            Dtype bot0tmp = bottom0[idxbot0];  //  bottom1[l+s2o,m+s2p,n]
-            //  Index offset for topdiff in following loops:
-            int op = (p+neighborhood_grid_radius) * \
-            neighborhood_grid_width + (o+neighborhood_grid_radius);  //  index [o,p]
-            int idxOpOffset = (item * topchannels + op);
-            for (int y = ymin; y <= ymax; y++) {
-              for (int x = xmin; x <= xmax; x++) {
-                int idxtopdiff = (idxOpOffset * topheight + y)\
-                 * topwidth + x;  //  topdiff[x,y,o,p]
-                sum += topdiff[idxtopdiff] * bot0tmp;
-              }
+          xmin = max(0, xmin);
+          xmax = min(topwidth - 1, xmax);
+          ymin = max(0, ymin);
+          ymax = min(topheight - 1, ymax);
+          //  Get bottom0 data:
+          int idxbot0 =
+              ((item * pbottomheight + (m - s2p)) * pbottomwidth + (l - s2o)) * bottomchannels + n;
+          Dtype bot0tmp = bottom0[idxbot0];  //  bottom1[l+s2o,m+s2p,n]
+          //  Index offset for topdiff in following loops:
+          int op = (p + neighborhood_grid_radius) * neighborhood_grid_width +
+                   (o + neighborhood_grid_radius);  //  index [o,p]
+          int idxOpOffset = (item * topchannels + op);
+          for (int y = ymin; y <= ymax; y++) {
+            for (int x = xmin; x <= xmax; x++) {
+              int idxtopdiff = (idxOpOffset * topheight + y) * topwidth + x;  //  topdiff[x,y,o,p]
+              sum += topdiff[idxtopdiff] * bot0tmp;
             }
+          }
         }
       }
     }
-    const int sumelems = (kernel_radius*2+1)*(kernel_radius*2+1)*bottomchannels;
+    const int sumelems  = (kernel_radius * 2 + 1) * (kernel_radius * 2 + 1) * bottomchannels;
     const int bot1index = ((n * bottomheight) + (m - pad_size)) * bottomwidth + (l - pad_size);
     bottom1diff[bot1index + item * bottomcount] = sum / static_cast<float>(sumelems);
   }
 }
 // == Correlation Kernel Subtraction
 template <typename Dtype>
-__global__ void CorrelateDataSubtract(const int nthreads, int num, int item,
-  int topwidth, int topheight, int topchannels, int topcount,
-  int max_displacement, int neighborhood_grid_radius,
-  int neighborhood_grid_width, int kernel_radius, int stride1, int stride2,
-  int bottomwidth, int bottomheight, int bottomchannels,
-  const Dtype *bottom0, const Dtype *bottom1, Dtype *top) {
+__global__ void CorrelateDataSubtract(const int nthreads,
+                                      int num,
+                                      int item,
+                                      int topwidth,
+                                      int topheight,
+                                      int topchannels,
+                                      int topcount,
+                                      int max_displacement,
+                                      int neighborhood_grid_radius,
+                                      int neighborhood_grid_width,
+                                      int kernel_radius,
+                                      int stride1,
+                                      int stride2,
+                                      int bottomwidth,
+                                      int bottomheight,
+                                      int bottomchannels,
+                                      const Dtype* bottom0,
+                                      const Dtype* bottom1,
+                                      Dtype* top) {
   CUDA_KERNEL_LOOP(index, nthreads) {
-    int x = index % topwidth;  //  w-pos
-    int y = (index / topwidth) % topheight;  //  h-pos
+    int x = index % topwidth;                              //  w-pos
+    int y = (index / topwidth) % topheight;                //  h-pos
     int c = (index / topwidth / topheight) % topchannels;  //  channels
     //  Offset of patch in image 2
     int s2o = (c % neighborhood_grid_width - neighborhood_grid_radius) * stride2;
     int s2p = (c / neighborhood_grid_width - neighborhood_grid_radius) * stride2;
     //  First (upper left) position of kernel center in current neighborhood in image 1
-    int x1 = x*stride1 + kernel_radius + max_displacement;
-    int y1 = y*stride1 + kernel_radius + max_displacement;
+    int x1 = x * stride1 + kernel_radius + max_displacement;
+    int y1 = y * stride1 + kernel_radius + max_displacement;
     //  Iterate through 3D patch
     Dtype sum = 0;
-    for (int j = -kernel_radius; j <= kernel_radius; j++) {  //  HEIGHT
+    for (int j = -kernel_radius; j <= kernel_radius; j++) {    //  HEIGHT
       for (int i = -kernel_radius; i <= kernel_radius; i++) {  //  WIDTH
-        for (int l = 0; l < bottomchannels; l++) {  //  CHANNELS
+        for (int l = 0; l < bottomchannels; l++) {             //  CHANNELS
           //  Calculate position in image 2
           int x2 = x1 + s2o;
           int y2 = y1 + s2p;
           //  Indices in bottom data: (CH=l,W=x2,H=y2,N)
-          int idx1 = ((item * bottomheight + y1 + j) * bottomwidth + x1 + i) \
-          * bottomchannels + l;
-          int idx2 = ((item * bottomheight + y2 + j) * bottomwidth + x2 + i) \
-          * bottomchannels + l;
+          int idx1 = ((item * bottomheight + y1 + j) * bottomwidth + x1 + i) * bottomchannels + l;
+          int idx2 = ((item * bottomheight + y2 + j) * bottomwidth + x2 + i) * bottomchannels + l;
           //  Do the correlation:
           sum += fabsf(bottom0[idx1] - bottom1[idx2]);
         }
@@ -272,94 +325,122 @@ __global__ void CorrelateDataSubtract(const int nthreads, int num, int item,
 }
 //  == Correlation Backward Pass Kernel (For Blob 0)
 template <typename Dtype>
-__global__ void CorrelateDataBackward0Subtract(const int nthreads, int num,
-  int item, int topwidth, int topheight, int topchannels,
-  int max_displacement, int neighborhood_grid_radius,
-  int neighborhood_grid_width, int kernel_radius,
-  int stride1, int stride2, int bottomwidth, int bottomheight,
-  int pbottomwidth, int pbottomheight,
-  int bottomchannels, int bottomcount, int pad_size,
-  Dtype *bottom0diff, const Dtype *bottom0, const Dtype *bottom1, const Dtype *topdiff) {
+__global__ void CorrelateDataBackward0Subtract(const int nthreads,
+                                               int num,
+                                               int item,
+                                               int topwidth,
+                                               int topheight,
+                                               int topchannels,
+                                               int max_displacement,
+                                               int neighborhood_grid_radius,
+                                               int neighborhood_grid_width,
+                                               int kernel_radius,
+                                               int stride1,
+                                               int stride2,
+                                               int bottomwidth,
+                                               int bottomheight,
+                                               int pbottomwidth,
+                                               int pbottomheight,
+                                               int bottomchannels,
+                                               int bottomcount,
+                                               int pad_size,
+                                               Dtype* bottom0diff,
+                                               const Dtype* bottom0,
+                                               const Dtype* bottom1,
+                                               const Dtype* topdiff) {
   CUDA_KERNEL_LOOP(index, nthreads) {
-    int n = index % bottomchannels;  //  channels
-    int l = (index / bottomchannels) % bottomwidth + pad_size;  //  w-pos
+    int n = index % bottomchannels;                                            //  channels
+    int l = (index / bottomchannels) % bottomwidth + pad_size;                 //  w-pos
     int m = (index / bottomchannels / bottomwidth) % bottomheight + pad_size;  //  h-pos
     //  Get X,Y ranges and clamp
     //  round_off is a trick to enable integer division with ceil, even for negative numbers
     //  We use a large offset, for the inner part not to become negative.
-    const int round_off = ROUND_OFF;
+    const int round_off    = ROUND_OFF;
     const int round_off_s1 = stride1 * round_off;
-    int idxbot0 = ((item * pbottomheight + m) * pbottomwidth + l)\
-             * bottomchannels + n;
+    int idxbot0            = ((item * pbottomheight + m) * pbottomwidth + l) * bottomchannels + n;
     //  We add round_off before_s1 the int division and subtract round_off after it,
     //  to ensure the formula matches ceil behavior:
-    int xmin = (l - 2*kernel_radius - max_displacement + round_off_s1 - 1)\
-     / stride1 + 1 - round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
-    int ymin = (m - 2*kernel_radius - max_displacement + round_off_s1 - 1)\
-     / stride1 + 1 - round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
+    int xmin = (l - 2 * kernel_radius - max_displacement + round_off_s1 - 1) / stride1 + 1 -
+               round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
+    int ymin = (m - 2 * kernel_radius - max_displacement + round_off_s1 - 1) / stride1 + 1 -
+               round_off;  //  ceil (l - 2*kernel_radius - max_displacement) / stride1
     //  Same here:
     int xmax = (l - max_displacement + round_off_s1) / stride1 - round_off;
     //  floor (l - max_displacement) / stride1
     int ymax = (m - max_displacement + round_off_s1) / stride1 - round_off;
     //  floor (m - max_displacement) / stride1
     Dtype sum = 0;
-    if (xmax >= 0 && ymax >= 0 && (xmin <= topwidth-1) && (ymin <= topheight-1)) {
-        xmin = max(0, xmin);
-        xmax = min(topwidth-1, xmax);
-        ymin = max(0, ymin);
-        ymax = min(topheight-1, ymax);
-        for (int p = -neighborhood_grid_radius; p <= neighborhood_grid_radius; p++) {
-          for (int o = -neighborhood_grid_radius; o <= neighborhood_grid_radius; o++) {
-            //  Get bottom1 data:
-            int s2o = stride2 * o;
-            int s2p = stride2 * p;
-            int idxbot1 = ((item * pbottomheight + (m+s2p)) * pbottomwidth\
-             + (l+s2o)) * bottomchannels + n;
-            Dtype bot0tmp = bottom0[idxbot0];
-            Dtype bot1tmp = bottom1[idxbot1];
-            Dtype sign = (bot0tmp >= bot1tmp) ? Dtype(1.0) : Dtype(-1.0);
-            //  Index offset for topdiff in following loops:
-            int op = (p+neighborhood_grid_radius) * neighborhood_grid_width\
-             + (o + neighborhood_grid_radius);  //  index [o,p]
-            int idxopoffset = (item * topchannels + op);
-            for (int y = ymin; y <= ymax; y++) {
-              for (int x = xmin; x <= xmax; x++) {
-                int idxtopdiff = (idxopoffset * topheight + y) * topwidth + x;  //  topdiff[x,y,o,p]
-                sum += topdiff[idxtopdiff] * sign;
-              }
+    if (xmax >= 0 && ymax >= 0 && (xmin <= topwidth - 1) && (ymin <= topheight - 1)) {
+      xmin = max(0, xmin);
+      xmax = min(topwidth - 1, xmax);
+      ymin = max(0, ymin);
+      ymax = min(topheight - 1, ymax);
+      for (int p = -neighborhood_grid_radius; p <= neighborhood_grid_radius; p++) {
+        for (int o = -neighborhood_grid_radius; o <= neighborhood_grid_radius; o++) {
+          //  Get bottom1 data:
+          int s2o = stride2 * o;
+          int s2p = stride2 * p;
+          int idxbot1 =
+              ((item * pbottomheight + (m + s2p)) * pbottomwidth + (l + s2o)) * bottomchannels + n;
+          Dtype bot0tmp = bottom0[idxbot0];
+          Dtype bot1tmp = bottom1[idxbot1];
+          Dtype sign    = (bot0tmp >= bot1tmp) ? Dtype(1.0) : Dtype(-1.0);
+          //  Index offset for topdiff in following loops:
+          int op = (p + neighborhood_grid_radius) * neighborhood_grid_width +
+                   (o + neighborhood_grid_radius);  //  index [o,p]
+          int idxopoffset = (item * topchannels + op);
+          for (int y = ymin; y <= ymax; y++) {
+            for (int x = xmin; x <= xmax; x++) {
+              int idxtopdiff = (idxopoffset * topheight + y) * topwidth + x;  //  topdiff[x,y,o,p]
+              sum += topdiff[idxtopdiff] * sign;
             }
           }
         }
+      }
     }
-    const int sumelems = (kernel_radius * 2 + 1) * (kernel_radius * 2+1) * bottomchannels;
-    const int bot0index = ((n * bottomheight) + (m-pad_size)) * bottomwidth + (l-pad_size);
+    const int sumelems  = (kernel_radius * 2 + 1) * (kernel_radius * 2 + 1) * bottomchannels;
+    const int bot0index = ((n * bottomheight) + (m - pad_size)) * bottomwidth + (l - pad_size);
     bottom0diff[bot0index + item * bottomcount] = sum / static_cast<float>(sumelems);
   }
 }
 //  == Correlation Backward Pass Kernel (For Blob 1)
 template <typename Dtype>
-__global__ void CorrelateDataBackward1Subtract(const int nthreads, int num,
-  int item, int topwidth, int topheight, int topchannels,
-  int max_displacement, int neighborhood_grid_radius,
-  int neighborhood_grid_width, int kernel_radius,
-  int stride1, int stride2, int bottomwidth, int bottomheight,
-  int pbottomwidth, int pbottomheight, int bottomchannels,
-  int bottomcount, int pad_size, const Dtype *bottom0,
-  const Dtype *bottom1, Dtype *bottom1diff, const Dtype *topdiff) {
-    CUDA_KERNEL_LOOP(index, nthreads) {
+__global__ void CorrelateDataBackward1Subtract(const int nthreads,
+                                               int num,
+                                               int item,
+                                               int topwidth,
+                                               int topheight,
+                                               int topchannels,
+                                               int max_displacement,
+                                               int neighborhood_grid_radius,
+                                               int neighborhood_grid_width,
+                                               int kernel_radius,
+                                               int stride1,
+                                               int stride2,
+                                               int bottomwidth,
+                                               int bottomheight,
+                                               int pbottomwidth,
+                                               int pbottomheight,
+                                               int bottomchannels,
+                                               int bottomcount,
+                                               int pad_size,
+                                               const Dtype* bottom0,
+                                               const Dtype* bottom1,
+                                               Dtype* bottom1diff,
+                                               const Dtype* topdiff) {
+  CUDA_KERNEL_LOOP(index, nthreads) {
     //  int l = index % bottomwidth + pad_size; //w-pos
     //  int m = (index / bottomwidth) % bottomheight + pad_size; //  h-pos
     //  int n = (index / bottomwidth / bottomheight) % bottomchannels; //  channels
-    int n = index % bottomchannels;  //  channels
-    int l = (index / bottomchannels) % bottomwidth + pad_size;  //  w-pos
+    int n = index % bottomchannels;                                            //  channels
+    int l = (index / bottomchannels) % bottomwidth + pad_size;                 //  w-pos
     int m = (index / bottomchannels / bottomwidth) % bottomheight + pad_size;  //  h-pos
     //  round_off is a trick to enable integer division with ceil, even for negative numbers
     //  We use a large offset, for the inner part not to become negative.
-    const int round_off = ROUND_OFF;
+    const int round_off    = ROUND_OFF;
     const int round_off_s1 = stride1 * round_off;
-    Dtype sum = 0;
-    int idxbot1 = ((item * pbottomheight + m) * pbottomwidth + l)\
-             * bottomchannels + n;
+    Dtype sum              = 0;
+    int idxbot1            = ((item * pbottomheight + m) * pbottomwidth + l) * bottomchannels + n;
     for (int p = -neighborhood_grid_radius; p <= neighborhood_grid_radius; p++) {
       for (int o = -neighborhood_grid_radius; o <= neighborhood_grid_radius; o++) {
         int s2o = stride2 * o;
@@ -367,11 +448,11 @@ __global__ void CorrelateDataBackward1Subtract(const int nthreads, int num,
         //  Get X,Y ranges and clamp
         //  We add round_off before_s1 the int division and subtract round_off after it,
         //  to ensure the formula matches ceil behavior:
-        int xmin = (l - 2*kernel_radius - max_displacement - s2o + round_off_s1 - 1)\
-         / stride1 + 1 - round_off;
-         // ceil (l - 2*kernel_radius - max_displacement - s2o) / stride1
-        int ymin = (m - 2*kernel_radius - max_displacement - s2p + round_off_s1 - 1)\
-         / stride1 + 1 - round_off;
+        int xmin = (l - 2 * kernel_radius - max_displacement - s2o + round_off_s1 - 1) / stride1 +
+                   1 - round_off;
+        // ceil (l - 2*kernel_radius - max_displacement - s2o) / stride1
+        int ymin = (m - 2 * kernel_radius - max_displacement - s2p + round_off_s1 - 1) / stride1 +
+                   1 - round_off;
         // ceil (l - 2*kernel_radius - max_displacement - s2o) / stride1
         //  Same here:
         int xmax = (l - max_displacement - s2o + round_off_s1) / stride1 - round_off;
@@ -379,32 +460,31 @@ __global__ void CorrelateDataBackward1Subtract(const int nthreads, int num,
         int ymax = (m - max_displacement - s2p + round_off_s1) / stride1 - round_off;
         //  floor (m - max_displacement - s2p) / stride1
         if (xmax >= 0 && ymax >= 0 && (xmin <= topwidth - 1) && (ymin <= topheight - 1)) {
-            xmin = max(0, xmin);
-            xmax = min(topwidth-1, xmax);
-            ymin = max(0, ymin);
-            ymax = min(topheight-1, ymax);
-            //  Get bottom0 data:
-            int idxbot0 = ((item * pbottomheight + (m - s2p)) * pbottomwidth + (l - s2o))\
-             * bottomchannels + n;
-            //  bottom0[l+s2o,m+s2p,n]
-            Dtype bot0tmp = bottom0[idxbot0];
-            Dtype bot1tmp = bottom1[idxbot1];
-            Dtype sign = (bot0tmp >= bot1tmp) ? Dtype(-1.0) : Dtype(1.0);
-            //  Index offset for topdiff in following loops:
-            int op = (p+neighborhood_grid_radius) * \
-            neighborhood_grid_width + (o+neighborhood_grid_radius);  //  index [o,p]
-            int idxOpOffset = (item * topchannels + op);
-            for (int y = ymin; y <= ymax; y++) {
-              for (int x = xmin; x <= xmax; x++) {
-                int idxtopdiff = (idxOpOffset * topheight + y)\
-                 * topwidth + x;  //  topdiff[x,y,o,p]
-                sum += topdiff[idxtopdiff] * sign;
-              }
+          xmin = max(0, xmin);
+          xmax = min(topwidth - 1, xmax);
+          ymin = max(0, ymin);
+          ymax = min(topheight - 1, ymax);
+          //  Get bottom0 data:
+          int idxbot0 =
+              ((item * pbottomheight + (m - s2p)) * pbottomwidth + (l - s2o)) * bottomchannels + n;
+          //  bottom0[l+s2o,m+s2p,n]
+          Dtype bot0tmp = bottom0[idxbot0];
+          Dtype bot1tmp = bottom1[idxbot1];
+          Dtype sign    = (bot0tmp >= bot1tmp) ? Dtype(-1.0) : Dtype(1.0);
+          //  Index offset for topdiff in following loops:
+          int op = (p + neighborhood_grid_radius) * neighborhood_grid_width +
+                   (o + neighborhood_grid_radius);  //  index [o,p]
+          int idxOpOffset = (item * topchannels + op);
+          for (int y = ymin; y <= ymax; y++) {
+            for (int x = xmin; x <= xmax; x++) {
+              int idxtopdiff = (idxOpOffset * topheight + y) * topwidth + x;  //  topdiff[x,y,o,p]
+              sum += topdiff[idxtopdiff] * sign;
             }
+          }
         }
       }
     }
-    const int sumelems = (kernel_radius*2+1)*(kernel_radius*2+1)*bottomchannels;
+    const int sumelems  = (kernel_radius * 2 + 1) * (kernel_radius * 2 + 1) * bottomchannels;
     const int bot1index = ((n * bottomheight) + (m - pad_size)) * bottomwidth + (l - pad_size);
     bottom1diff[bot1index + item * bottomcount] = sum / static_cast<float>(sumelems);
   }
@@ -412,218 +492,383 @@ __global__ void CorrelateDataBackward1Subtract(const int nthreads, int num,
 //  == Forward
 //  == Dimension rearrangement Kernel
 template <typename Dtype>
-__global__ void blob_rearrange_kernel2(const Dtype* in, Dtype* out, int num,
-int channels, int width, int height, int widthheight, int padding, int pwidthheight) {
-    //  change shape from [batchsize,channel,y,x] to [batchsize,y,x,channel]
-    int xy = blockIdx.x * blockDim.x + threadIdx.x;
-    if (xy >= widthheight )
-        return;
-    int ch = blockIdx.y;
-    int n  = blockIdx.z;
-    Dtype value = in[(n * channels + ch) * widthheight + xy];
-    __syncthreads();
-    int xpad  = (xy % width + padding);
-    int ypad  = (xy / width + padding);
-    int xypad = ypad * (width + 2 * padding) + xpad;
-    out[(n * pwidthheight + xypad) * channels + ch] = value;
+__global__ void blob_rearrange_kernel2(const Dtype* in,
+                                       Dtype* out,
+                                       int num,
+                                       int channels,
+                                       int width,
+                                       int height,
+                                       int widthheight,
+                                       int padding,
+                                       int pwidthheight) {
+  //  change shape from [batchsize,channel,y,x] to [batchsize,y,x,channel]
+  int xy = blockIdx.x * blockDim.x + threadIdx.x;
+  if (xy >= widthheight)
+    return;
+  int ch      = blockIdx.y;
+  int n       = blockIdx.z;
+  Dtype value = in[(n * channels + ch) * widthheight + xy];
+  __syncthreads();
+  int xpad                                        = (xy % width + padding);
+  int ypad                                        = (xy / width + padding);
+  int xypad                                       = ypad * (width + 2 * padding) + xpad;
+  out[(n * pwidthheight + xypad) * channels + ch] = value;
 }
 template <typename Dtype>
-void Forward_gpu(
-      const Tensor<gpu, 4, Dtype> &out,
-      const Tensor<gpu, 4, Dtype> &data1,
-      const Tensor<gpu, 4, Dtype> &data2,
-      const Tensor<gpu, 4, Dtype> &tmp1,
-      const Tensor<gpu, 4, Dtype> &tmp2,
-      int top_channels_, int top_height_, int top_width_, int pad_size_,
-      bool is_multiply, int max_displacement_, int kernel_size_,
-      int neighborhood_grid_radius_, int neighborhood_grid_width_,
-      int  kernel_radius_, int stride1_, int stride2_, cudaStream_t stream,
-      cudaStream_t stream_tmp1, cudaStream_t stream_tmp2) {
-    const Dtype *bottom_data1 = data1.dptr_;
-    const Dtype *bottom_data2 = data2.dptr_;
-    Dtype *rbot1 = tmp1.dptr_;
-    Dtype *rbot2 = tmp2.dptr_;
-    Dtype *top = out.dptr_;
-    const int bnum = data1.size(0);
-    const int bchannels = data1.size(1);
-    const int bheight = data1.size(2);
-    const int bwidth = data1.size(3);
-    const int bwidthheight = bwidth * bheight;
-    const int topcount = top_width_ * top_height_ * top_channels_;
-    dim3 threadsPerBlock(THREADS_PER_WARP * WARPS_PER_BLOCK);
-    int threads_per_block = 16;
-    dim3 totalBlocksRearr((bwidthheight - 1) / threads_per_block + 1, bchannels, bnum);
-    const int pwidthheight = (bwidth + 2 * pad_size_) * (bheight + 2 * pad_size_);
-    blob_rearrange_kernel2<Dtype><<<totalBlocksRearr, threads_per_block, 0, stream_tmp1>>>
-    (bottom_data1, rbot1, bnum, bchannels, bwidth, bheight, bwidthheight, pad_size_, pwidthheight);
-    blob_rearrange_kernel2<Dtype><<<totalBlocksRearr, threads_per_block, 0, stream_tmp2>>>
-    (bottom_data2, rbot2, bnum, bchannels, bwidth, bheight, bwidthheight, pad_size_, pwidthheight);
-    const int num = bnum;
-    const int channels = bchannels;
-    const int height = bheight + 2 * pad_size_;
-    const int width = bwidth + 2 * pad_size_;
-    const int shared_memory_per_block = (kernel_size_ * kernel_size_) * bchannels;
-    if (is_multiply == true) {
-        //  CorrelationLayer
-        int topThreadCount = topcount;
-        dim3 totalBlocksCorr(top_width_, top_height_, num);
-        CorrelateData<Dtype><<<totalBlocksCorr, threadsPerBlock,
-        shared_memory_per_block * sizeof(Dtype), stream>>>(
+void Forward_gpu(const Tensor<gpu, 4, Dtype>& out,
+                 const Tensor<gpu, 4, Dtype>& data1,
+                 const Tensor<gpu, 4, Dtype>& data2,
+                 const Tensor<gpu, 4, Dtype>& tmp1,
+                 const Tensor<gpu, 4, Dtype>& tmp2,
+                 int top_channels_,
+                 int top_height_,
+                 int top_width_,
+                 int pad_size_,
+                 bool is_multiply,
+                 int max_displacement_,
+                 int kernel_size_,
+                 int neighborhood_grid_radius_,
+                 int neighborhood_grid_width_,
+                 int kernel_radius_,
+                 int stride1_,
+                 int stride2_,
+                 cudaStream_t stream,
+                 cudaStream_t stream_tmp1,
+                 cudaStream_t stream_tmp2) {
+  const Dtype* bottom_data1 = data1.dptr_;
+  const Dtype* bottom_data2 = data2.dptr_;
+  Dtype* rbot1              = tmp1.dptr_;
+  Dtype* rbot2              = tmp2.dptr_;
+  Dtype* top                = out.dptr_;
+  const int bnum            = data1.size(0);
+  const int bchannels       = data1.size(1);
+  const int bheight         = data1.size(2);
+  const int bwidth          = data1.size(3);
+  const int bwidthheight    = bwidth * bheight;
+  const int topcount        = top_width_ * top_height_ * top_channels_;
+  dim3 threadsPerBlock(THREADS_PER_WARP * WARPS_PER_BLOCK);
+  int threads_per_block = 16;
+  dim3 totalBlocksRearr((bwidthheight - 1) / threads_per_block + 1, bchannels, bnum);
+  const int pwidthheight = (bwidth + 2 * pad_size_) * (bheight + 2 * pad_size_);
+  blob_rearrange_kernel2<Dtype><<<totalBlocksRearr, threads_per_block, 0, stream_tmp1>>>(
+      bottom_data1, rbot1, bnum, bchannels, bwidth, bheight, bwidthheight, pad_size_, pwidthheight);
+  blob_rearrange_kernel2<Dtype><<<totalBlocksRearr, threads_per_block, 0, stream_tmp2>>>(
+      bottom_data2, rbot2, bnum, bchannels, bwidth, bheight, bwidthheight, pad_size_, pwidthheight);
+  const int num                     = bnum;
+  const int channels                = bchannels;
+  const int height                  = bheight + 2 * pad_size_;
+  const int width                   = bwidth + 2 * pad_size_;
+  const int shared_memory_per_block = (kernel_size_ * kernel_size_) * bchannels;
+  if (is_multiply == true) {
+    //  CorrelationLayer
+    int topThreadCount = topcount;
+    dim3 totalBlocksCorr(top_width_, top_height_, num);
+    CorrelateData<Dtype>
+        <<<totalBlocksCorr, threadsPerBlock, shared_memory_per_block * sizeof(Dtype), stream>>>(
             topThreadCount,
-            num, top_width_, top_height_, top_channels_, topcount,
-            max_displacement_, neighborhood_grid_radius_,
-            neighborhood_grid_width_, kernel_radius_, kernel_size_,
-            stride1_, stride2_,
-            width, height, channels,
-            rbot1, rbot2, top);
-        CORRELATION_CUDA_CHECK(cudaGetLastError());
-    } else {
-        //  CorrelationLayer
-        for (int n = 0; n < num; n++) {
-            int topThreadCount = topcount;
-            const int gridSize = (topThreadCount + kMaxThreadsPerBlock - 1)\
-             / kMaxThreadsPerBlock;
-            CorrelateDataSubtract<Dtype><<<gridSize, kMaxThreadsPerBlock, 0, stream>>>(
-                topThreadCount,
-                num, n, top_width_, top_height_, top_channels_, topcount,
-                max_displacement_, neighborhood_grid_radius_,
-                neighborhood_grid_width_, kernel_radius_,
-                stride1_, stride2_, width, height, channels, rbot1, rbot2, top);
-         CORRELATION_CUDA_CHECK(cudaGetLastError());
-        }
+            num,
+            top_width_,
+            top_height_,
+            top_channels_,
+            topcount,
+            max_displacement_,
+            neighborhood_grid_radius_,
+            neighborhood_grid_width_,
+            kernel_radius_,
+            kernel_size_,
+            stride1_,
+            stride2_,
+            width,
+            height,
+            channels,
+            rbot1,
+            rbot2,
+            top);
+    CORRELATION_CUDA_CHECK(cudaGetLastError());
+  } else {
+    //  CorrelationLayer
+    for (int n = 0; n < num; n++) {
+      int topThreadCount = topcount;
+      const int gridSize = (topThreadCount + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
+      CorrelateDataSubtract<Dtype>
+          <<<gridSize, kMaxThreadsPerBlock, 0, stream>>>(topThreadCount,
+                                                         num,
+                                                         n,
+                                                         top_width_,
+                                                         top_height_,
+                                                         top_channels_,
+                                                         topcount,
+                                                         max_displacement_,
+                                                         neighborhood_grid_radius_,
+                                                         neighborhood_grid_width_,
+                                                         kernel_radius_,
+                                                         stride1_,
+                                                         stride2_,
+                                                         width,
+                                                         height,
+                                                         channels,
+                                                         rbot1,
+                                                         rbot2,
+                                                         top);
+      CORRELATION_CUDA_CHECK(cudaGetLastError());
     }
+  }
 }
 template <typename Dtype>
-void Backward_gpu(
-       const Tensor<gpu, 4, Dtype> &out_grad,
-      const Tensor<gpu, 4, Dtype> &in_grad1,
-      const Tensor<gpu, 4, Dtype> &in_grad2,
-      const Tensor<gpu, 4, Dtype> &tmp1,
-      const Tensor<gpu, 4, Dtype> &tmp2,
-      int top_channels_, int top_height_,
-      int top_width_, int pad_size_, bool is_multiply,
-      int max_displacement_, int kernel_size_,
-      int neighborhood_grid_radius_, int neighborhood_grid_width_,
-      int  kernel_radius_, int stride1_, int stride2_,
-      cudaStream_t stream0, cudaStream_t stream1,
-      int num, int channels, int height, int width) {
-    //  Get top diff, compute bottom diff
-    const Dtype* top_diff = out_grad.dptr_;
-    Dtype* bottom0_diff = in_grad1.dptr_;
-    Dtype* bottom1_diff = in_grad2.dptr_;
-    const Dtype* rbot1 = tmp1.dptr_;
-    const Dtype* rbot2 = tmp2.dptr_;
-    const int paddedheight = height + 2 * pad_size_;
-    const int paddedwidth = width + 2 * pad_size_;
-    const int bottomcount = channels * height * width;
-    int botThreadCount = bottomcount;
-    const int gridSize = (botThreadCount + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
-    //  CorrelationLayerBackward
-    if (is_multiply == true) {
-        //  == Run kernel Backward 0
-        dim3 totalBlocksBackward0(width, height, channels * num);  //  First dim is fastest
-        const int buffer_size_backw0 = \
-        (static_cast<int>(ceil(static_cast<float>(2 * kernel_radius_)\
-         / static_cast<float>(stride1_))) + 1) * top_channels_;
-        //  == Run kernel Backward 0
-        for (int n = 0; n < num; n++) {
-        CorrelateDataBackward0<Dtype><<<gridSize, kMaxThreadsPerBlock, 0, stream0>>>(
-            botThreadCount,
-            num, n, top_width_, top_height_, top_channels_,
-            max_displacement_, neighborhood_grid_radius_, neighborhood_grid_width_, kernel_radius_,
-            stride1_, stride2_,
-            width, height, paddedwidth, paddedheight, channels, bottomcount, pad_size_,
-            bottom0_diff, rbot2, top_diff);
-        CORRELATION_CUDA_CHECK(cudaGetLastError());
-        }
-        //  == Run kernel Backward 1
-        for (int n = 0; n < num; n++) {
-        CorrelateDataBackward1<Dtype><<<gridSize, kMaxThreadsPerBlock, 0, stream1>>>(
-            botThreadCount,
-            num, n, top_width_, top_height_, top_channels_,
-            max_displacement_, neighborhood_grid_radius_, neighborhood_grid_width_, kernel_radius_,
-            stride1_, stride2_,
-            width, height, paddedwidth, paddedheight, channels, bottomcount, pad_size_,
-            rbot1, bottom1_diff, top_diff);
-       CORRELATION_CUDA_CHECK(cudaGetLastError());
-        }
-    } else  {
-        for (int n = 0; n < num; n++) {
-        //  Bottom0:
-        CorrelateDataBackward0Subtract<Dtype><<<gridSize, kMaxThreadsPerBlock, 0, stream0>>>(
-            botThreadCount,
-            num, n, top_width_, top_height_, top_channels_,
-            max_displacement_, neighborhood_grid_radius_, neighborhood_grid_width_, kernel_radius_,
-            stride1_, stride2_,
-            width, height, paddedwidth, paddedheight, channels, bottomcount, pad_size_,
-            bottom0_diff, rbot1, rbot2, top_diff);
-        CORRELATION_CUDA_CHECK(cudaGetLastError());
-        }
-        for (int n = 0; n < num; n++) {
-        //  Bottom1:
-        CorrelateDataBackward1Subtract<Dtype><<<gridSize, kMaxThreadsPerBlock, 0, stream1>>>(
-            botThreadCount,
-            num, n, top_width_, top_height_, top_channels_,
-            max_displacement_, neighborhood_grid_radius_, neighborhood_grid_width_, kernel_radius_,
-            stride1_, stride2_,
-            width, height, paddedwidth, paddedheight, channels, bottomcount, pad_size_,
-            rbot1, rbot2, bottom1_diff, top_diff);
-        CORRELATION_CUDA_CHECK(cudaGetLastError());
-        }
+void Backward_gpu(const Tensor<gpu, 4, Dtype>& out_grad,
+                  const Tensor<gpu, 4, Dtype>& in_grad1,
+                  const Tensor<gpu, 4, Dtype>& in_grad2,
+                  const Tensor<gpu, 4, Dtype>& tmp1,
+                  const Tensor<gpu, 4, Dtype>& tmp2,
+                  int top_channels_,
+                  int top_height_,
+                  int top_width_,
+                  int pad_size_,
+                  bool is_multiply,
+                  int max_displacement_,
+                  int kernel_size_,
+                  int neighborhood_grid_radius_,
+                  int neighborhood_grid_width_,
+                  int kernel_radius_,
+                  int stride1_,
+                  int stride2_,
+                  cudaStream_t stream0,
+                  cudaStream_t stream1,
+                  int num,
+                  int channels,
+                  int height,
+                  int width) {
+  //  Get top diff, compute bottom diff
+  const Dtype* top_diff  = out_grad.dptr_;
+  Dtype* bottom0_diff    = in_grad1.dptr_;
+  Dtype* bottom1_diff    = in_grad2.dptr_;
+  const Dtype* rbot1     = tmp1.dptr_;
+  const Dtype* rbot2     = tmp2.dptr_;
+  const int paddedheight = height + 2 * pad_size_;
+  const int paddedwidth  = width + 2 * pad_size_;
+  const int bottomcount  = channels * height * width;
+  int botThreadCount     = bottomcount;
+  const int gridSize     = (botThreadCount + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
+  //  CorrelationLayerBackward
+  if (is_multiply == true) {
+    //  == Run kernel Backward 0
+    dim3 totalBlocksBackward0(width, height, channels * num);  //  First dim is fastest
+    const int buffer_size_backw0 = (static_cast<int>(ceil(static_cast<float>(2 * kernel_radius_) /
+                                                          static_cast<float>(stride1_))) +
+                                    1) *
+                                   top_channels_;
+    //  == Run kernel Backward 0
+    for (int n = 0; n < num; n++) {
+      CorrelateDataBackward0<Dtype>
+          <<<gridSize, kMaxThreadsPerBlock, 0, stream0>>>(botThreadCount,
+                                                          num,
+                                                          n,
+                                                          top_width_,
+                                                          top_height_,
+                                                          top_channels_,
+                                                          max_displacement_,
+                                                          neighborhood_grid_radius_,
+                                                          neighborhood_grid_width_,
+                                                          kernel_radius_,
+                                                          stride1_,
+                                                          stride2_,
+                                                          width,
+                                                          height,
+                                                          paddedwidth,
+                                                          paddedheight,
+                                                          channels,
+                                                          bottomcount,
+                                                          pad_size_,
+                                                          bottom0_diff,
+                                                          rbot2,
+                                                          top_diff);
+      CORRELATION_CUDA_CHECK(cudaGetLastError());
+    }
+    //  == Run kernel Backward 1
+    for (int n = 0; n < num; n++) {
+      CorrelateDataBackward1<Dtype>
+          <<<gridSize, kMaxThreadsPerBlock, 0, stream1>>>(botThreadCount,
+                                                          num,
+                                                          n,
+                                                          top_width_,
+                                                          top_height_,
+                                                          top_channels_,
+                                                          max_displacement_,
+                                                          neighborhood_grid_radius_,
+                                                          neighborhood_grid_width_,
+                                                          kernel_radius_,
+                                                          stride1_,
+                                                          stride2_,
+                                                          width,
+                                                          height,
+                                                          paddedwidth,
+                                                          paddedheight,
+                                                          channels,
+                                                          bottomcount,
+                                                          pad_size_,
+                                                          rbot1,
+                                                          bottom1_diff,
+                                                          top_diff);
+      CORRELATION_CUDA_CHECK(cudaGetLastError());
+    }
+  } else {
+    for (int n = 0; n < num; n++) {
+      //  Bottom0:
+      CorrelateDataBackward0Subtract<Dtype>
+          <<<gridSize, kMaxThreadsPerBlock, 0, stream0>>>(botThreadCount,
+                                                          num,
+                                                          n,
+                                                          top_width_,
+                                                          top_height_,
+                                                          top_channels_,
+                                                          max_displacement_,
+                                                          neighborhood_grid_radius_,
+                                                          neighborhood_grid_width_,
+                                                          kernel_radius_,
+                                                          stride1_,
+                                                          stride2_,
+                                                          width,
+                                                          height,
+                                                          paddedwidth,
+                                                          paddedheight,
+                                                          channels,
+                                                          bottomcount,
+                                                          pad_size_,
+                                                          bottom0_diff,
+                                                          rbot1,
+                                                          rbot2,
+                                                          top_diff);
+      CORRELATION_CUDA_CHECK(cudaGetLastError());
+    }
+    for (int n = 0; n < num; n++) {
+      //  Bottom1:
+      CorrelateDataBackward1Subtract<Dtype>
+          <<<gridSize, kMaxThreadsPerBlock, 0, stream1>>>(botThreadCount,
+                                                          num,
+                                                          n,
+                                                          top_width_,
+                                                          top_height_,
+                                                          top_channels_,
+                                                          max_displacement_,
+                                                          neighborhood_grid_radius_,
+                                                          neighborhood_grid_width_,
+                                                          kernel_radius_,
+                                                          stride1_,
+                                                          stride2_,
+                                                          width,
+                                                          height,
+                                                          paddedwidth,
+                                                          paddedheight,
+                                                          channels,
+                                                          bottomcount,
+                                                          pad_size_,
+                                                          rbot1,
+                                                          rbot2,
+                                                          bottom1_diff,
+                                                          top_diff);
+      CORRELATION_CUDA_CHECK(cudaGetLastError());
     }
+  }
 }
 }  // namespace cuda
-template<typename Dtype>
-inline void CorrelationForward(const Tensor<gpu, 4, Dtype> &out,
-                               const Tensor<gpu, 4, Dtype> &data1,
-                               const Tensor<gpu, 4, Dtype> &data2,
-                               const Tensor<gpu, 4, Dtype> &tmp1,
-                               const Tensor<gpu, 4, Dtype> &tmp2,
-                               int top_channels_, int top_height_,
-                               int top_width_, int pad_size_, bool is_multiply,
-                               int max_displacement_, int kernel_size_,
-                               int neighborhood_grid_radius_, int neighborhood_grid_width_,
-                               int kernel_radius_, int stride1_, int stride2_
-                           ) {
-  cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
+template <typename Dtype>
+inline void CorrelationForward(const Tensor<gpu, 4, Dtype>& out,
+                               const Tensor<gpu, 4, Dtype>& data1,
+                               const Tensor<gpu, 4, Dtype>& data2,
+                               const Tensor<gpu, 4, Dtype>& tmp1,
+                               const Tensor<gpu, 4, Dtype>& tmp2,
+                               int top_channels_,
+                               int top_height_,
+                               int top_width_,
+                               int pad_size_,
+                               bool is_multiply,
+                               int max_displacement_,
+                               int kernel_size_,
+                               int neighborhood_grid_radius_,
+                               int neighborhood_grid_width_,
+                               int kernel_radius_,
+                               int stride1_,
+                               int stride2_) {
+  cudaStream_t stream      = Stream<gpu>::GetStream(out.stream_);
   cudaStream_t stream_tmp1 = Stream<gpu>::GetStream(tmp1.stream_);
   cudaStream_t stream_tmp2 = Stream<gpu>::GetStream(tmp2.stream_);
-  cuda::Forward_gpu(out, data1, data2, tmp1, tmp2, top_channels_, top_height_,
-                    top_width_, pad_size_, is_multiply, max_displacement_, kernel_size_,
-                    neighborhood_grid_radius_, neighborhood_grid_width_, kernel_radius_,
-                    stride1_, stride2_, stream, stream_tmp1, stream_tmp2);
+  cuda::Forward_gpu(out,
+                    data1,
+                    data2,
+                    tmp1,
+                    tmp2,
+                    top_channels_,
+                    top_height_,
+                    top_width_,
+                    pad_size_,
+                    is_multiply,
+                    max_displacement_,
+                    kernel_size_,
+                    neighborhood_grid_radius_,
+                    neighborhood_grid_width_,
+                    kernel_radius_,
+                    stride1_,
+                    stride2_,
+                    stream,
+                    stream_tmp1,
+                    stream_tmp2);
 }
 
-template<typename Dtype>
-inline void CorrelationBackward(const Tensor<gpu, 4, Dtype> &out_grad,
-                            const Tensor<gpu, 4, Dtype> &in_grad1,
-                            const Tensor<gpu, 4, Dtype> &in_grad2,
-                            const Tensor<gpu, 4, Dtype> &tmp1,
-                            const Tensor<gpu, 4, Dtype> &tmp2,
-                            int top_channels_, int top_height_,
-                            int top_width_, int pad_size_, bool is_multiply,
-                            int max_displacement_, int kernel_size_,
-                            int neighborhood_grid_radius_, int neighborhood_grid_width_,
-                            int  kernel_radius_, int stride1_,
-                            int stride2_, int num, int channels, int height, int width
-                            ) {
+template <typename Dtype>
+inline void CorrelationBackward(const Tensor<gpu, 4, Dtype>& out_grad,
+                                const Tensor<gpu, 4, Dtype>& in_grad1,
+                                const Tensor<gpu, 4, Dtype>& in_grad2,
+                                const Tensor<gpu, 4, Dtype>& tmp1,
+                                const Tensor<gpu, 4, Dtype>& tmp2,
+                                int top_channels_,
+                                int top_height_,
+                                int top_width_,
+                                int pad_size_,
+                                bool is_multiply,
+                                int max_displacement_,
+                                int kernel_size_,
+                                int neighborhood_grid_radius_,
+                                int neighborhood_grid_width_,
+                                int kernel_radius_,
+                                int stride1_,
+                                int stride2_,
+                                int num,
+                                int channels,
+                                int height,
+                                int width) {
   cudaStream_t stream0 = Stream<gpu>::GetStream(in_grad1.stream_);
   cudaStream_t stream1 = Stream<gpu>::GetStream(in_grad2.stream_);
-  cuda::Backward_gpu(out_grad, in_grad1, in_grad2, tmp1, tmp2, top_channels_,
-                      top_height_, top_width_, pad_size_, is_multiply,
-                      max_displacement_, kernel_size_, neighborhood_grid_radius_,
-                      neighborhood_grid_width_, kernel_radius_, stride1_, stride2_,
-                      stream0, stream1, num, channels, height, width);
+  cuda::Backward_gpu(out_grad,
+                     in_grad1,
+                     in_grad2,
+                     tmp1,
+                     tmp2,
+                     top_channels_,
+                     top_height_,
+                     top_width_,
+                     pad_size_,
+                     is_multiply,
+                     max_displacement_,
+                     kernel_size_,
+                     neighborhood_grid_radius_,
+                     neighborhood_grid_width_,
+                     kernel_radius_,
+                     stride1_,
+                     stride2_,
+                     stream0,
+                     stream1,
+                     num,
+                     channels,
+                     height,
+                     width);
 }
 }  // namespace mshadow
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(CorrelationParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new CorrelationOp<gpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new CorrelationOp<gpu, DType>(param); });
   return op;
 }
 }  // namespace op
diff --git a/src/operator/crop-inl.h b/src/operator/crop-inl.h
index 325807abb44e..45c153f8338d 100644
--- a/src/operator/crop-inl.h
+++ b/src/operator/crop-inl.h
@@ -22,7 +22,7 @@
  * \file crop-inl.h
  * \brief
  * \author Wei Wu
-*/
+ */
 #ifndef MXNET_OPERATOR_CROP_INL_H_
 #define MXNET_OPERATOR_CROP_INL_H_
 #include <dmlc/logging.h>
@@ -39,8 +39,8 @@ namespace mxnet {
 namespace op {
 
 namespace crop_enum {
-enum CropOpInputs {kData, kCropLike};
-enum CropOpOutputs {kOut};
+enum CropOpInputs { kData, kCropLike };
+enum CropOpOutputs { kOut };
 }  // namespace crop_enum
 
 struct CropParam : public dmlc::Parameter<CropParam> {
@@ -49,105 +49,108 @@ struct CropParam : public dmlc::Parameter<CropParam> {
   mxnet::TShape h_w;
   bool center_crop;
   DMLC_DECLARE_PARAMETER(CropParam) {
-    DMLC_DECLARE_FIELD(num_args).set_range(1, 3)
-    .describe("Number of inputs for crop, if equals one, then we will use the h_w"
-      "for crop height and width, else if equals two, then we will use the height"
-      "and width of the second input symbol, we name crop_like here");
+    DMLC_DECLARE_FIELD(num_args).set_range(1, 3).describe(
+        "Number of inputs for crop, if equals one, then we will use the h_w"
+        "for crop height and width, else if equals two, then we will use the height"
+        "and width of the second input symbol, we name crop_like here");
     int shape[] = {0, 0};
-    DMLC_DECLARE_FIELD(offset).set_default(mxnet::TShape(shape, shape + 2))
-    .describe("crop offset coordinate: (y, x)");
-    DMLC_DECLARE_FIELD(h_w).set_default(mxnet::TShape(shape, shape + 2))
-    .describe("crop height and width: (h, w)");
-    DMLC_DECLARE_FIELD(center_crop).set_default(false)
-    .describe("If set to true, then it will use be the center_crop,"
-      "or it will crop using the shape of crop_like");
+    DMLC_DECLARE_FIELD(offset)
+        .set_default(mxnet::TShape(shape, shape + 2))
+        .describe("crop offset coordinate: (y, x)");
+    DMLC_DECLARE_FIELD(h_w)
+        .set_default(mxnet::TShape(shape, shape + 2))
+        .describe("crop height and width: (h, w)");
+    DMLC_DECLARE_FIELD(center_crop)
+        .set_default(false)
+        .describe(
+            "If set to true, then it will use be the center_crop,"
+            "or it will crop using the shape of crop_like");
   }
 };  // struct CropParam
 
-template<typename xpu>
+template <typename xpu>
 class CropOp : public Operator {
  public:
   explicit CropOp(CropParam param) {
     this->param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(static_cast<int>(in_data.size()), param_.num_args);
     CHECK_EQ(out_data.size(), 1U);
     CHECK_EQ(req[crop_enum::kOut], kWriteTo);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s      = ctx.get_stream<xpu>();
     Tensor<xpu, 4> data = in_data[crop_enum::kData].get<xpu, 4, real_t>(s);
-    Tensor<xpu, 4> out = out_data[crop_enum::kOut].get<xpu, 4, real_t>(s);
-    offset_hw_ = InferCropOfferset(data.shape_, out.shape_);
+    Tensor<xpu, 4> out  = out_data[crop_enum::kOut].get<xpu, 4, real_t>(s);
+    offset_hw_          = InferCropOfferset(data.shape_, out.shape_);
     out = crop(data, Shape2(out.size(2), out.size(3)), offset_hw_[0], offset_hw_[1]);
   }
 
   // because the crop_like input is only used with it's shape, so we should be
   // careful setting its backwrd grad value to zeros, so that it will not hurt
   // the connection of crop_like.
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_grad.size(), static_cast<size_t>(param_.num_args)) << in_grad.size();
     CHECK_EQ(out_grad.size(), 1U) << out_grad.size();
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 4> grad = out_grad[crop_enum::kOut].get<xpu, 4, real_t>(s);
+    Stream<xpu>* s       = ctx.get_stream<xpu>();
+    Tensor<xpu, 4> grad  = out_grad[crop_enum::kOut].get<xpu, 4, real_t>(s);
     Tensor<xpu, 4> gdata = in_grad[crop_enum::kData].get<xpu, 4, real_t>(s);
     if (param_.num_args > 1) {
       // here backward grad is set to zero for crop_like
       // however, this should only be done when num_args > 1, i.e., crop_like exists
       Tensor<xpu, 4> gcrop_like = in_grad[crop_enum::kCropLike].get<xpu, 4, real_t>(s);
-      gcrop_like = (real_t)0.0f;
+      gcrop_like                = (real_t)0.0f;
     }
-    offset_hw_ = InferCropOfferset(gdata.shape_, grad.shape_);
-    gdata = (real_t)0.0f;
-    slice<3>(slice<2>(gdata, offset_hw_[0], offset_hw_[0]+grad.size(2)),
-             offset_hw_[1], offset_hw_[1]+grad.size(3)) = grad;
+    offset_hw_                             = InferCropOfferset(gdata.shape_, grad.shape_);
+    gdata                                  = (real_t)0.0f;
+    slice<3>(slice<2>(gdata, offset_hw_[0], offset_hw_[0] + grad.size(2)),
+             offset_hw_[1],
+             offset_hw_[1] + grad.size(3)) = grad;
   }
 
  private:
   CropParam param_;
   std::vector<int> offset_hw_;
-  std::vector<int> InferCropOfferset(const mshadow::Shape<4> &data_shape,
-                                 const mshadow::Shape<4> &out_shape) {
-      std::vector<int> offset_hw;
-      CHECK_GE(data_shape[2], out_shape[2]) <<
-          "data_shape'height should be larger than that of out_shape";
-      CHECK_GE(data_shape[3], out_shape[3]) <<
-          "data_shape'weight should be larger than that of out_shape";
-      if (param_.center_crop) {
-        offset_hw.push_back(static_cast<int>((data_shape[2]-out_shape[2])/2));
-        offset_hw.push_back(static_cast<int>((data_shape[3]-out_shape[3])/2));
-      } else {
-        CHECK_GE(static_cast<int>(param_.offset[0]), 0) <<
-            "offset[0] should be larger than 0";
-        CHECK_LE(param_.offset[0], data_shape[2]-out_shape[2]) <<
-            "offset[0] should be less than the residual space of height";
-        CHECK_GE(static_cast<int>(param_.offset[1]), 0) <<
-            "offset[1] should be larger than 0";
-        CHECK_LE(param_.offset[1], data_shape[3]-out_shape[3]) <<
-            "offset[1] should be less than the residual space of width";
-        offset_hw.push_back(static_cast<int>(param_.offset[0]));
-        offset_hw.push_back(static_cast<int>(param_.offset[1]));
-      }
-      return offset_hw;
+  std::vector<int> InferCropOfferset(const mshadow::Shape<4>& data_shape,
+                                     const mshadow::Shape<4>& out_shape) {
+    std::vector<int> offset_hw;
+    CHECK_GE(data_shape[2], out_shape[2])
+        << "data_shape'height should be larger than that of out_shape";
+    CHECK_GE(data_shape[3], out_shape[3])
+        << "data_shape'weight should be larger than that of out_shape";
+    if (param_.center_crop) {
+      offset_hw.push_back(static_cast<int>((data_shape[2] - out_shape[2]) / 2));
+      offset_hw.push_back(static_cast<int>((data_shape[3] - out_shape[3]) / 2));
+    } else {
+      CHECK_GE(static_cast<int>(param_.offset[0]), 0) << "offset[0] should be larger than 0";
+      CHECK_LE(param_.offset[0], data_shape[2] - out_shape[2])
+          << "offset[0] should be less than the residual space of height";
+      CHECK_GE(static_cast<int>(param_.offset[1]), 0) << "offset[1] should be larger than 0";
+      CHECK_LE(param_.offset[1], data_shape[3] - out_shape[3])
+          << "offset[1] should be less than the residual space of width";
+      offset_hw.push_back(static_cast<int>(param_.offset[0]));
+      offset_hw.push_back(static_cast<int>(param_.offset[1]));
+    }
+    return offset_hw;
   }
 };  // class CropOp
 
-template<typename xpu>
-Operator *CreateOp(CropParam param);
+template <typename xpu>
+Operator* CreateOp(CropParam param);
 
 #if DMLC_USE_CXX11
 class CropProp : public OperatorProperty {
@@ -169,25 +172,25 @@ class CropProp : public OperatorProperty {
     return ret;
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args));
     mxnet::TShape data_shape = in_shape->at(crop_enum::kData);
-    if (data_shape.ndim() == 0) return false;
-    CHECK_EQ(data_shape.ndim(), 4U) << \
-        "Input data should be 4D in batch-num_filter-y-x";
+    if (data_shape.ndim() == 0)
+      return false;
+    CHECK_EQ(data_shape.ndim(), 4U) << "Input data should be 4D in batch-num_filter-y-x";
     std::vector<int> crop_shape;
     if (param_.num_args == 1) {
-      CHECK_GE(static_cast<int>(param_.h_w[0]), 1) <<
-          "the crop height(h_w[0]) should be larger than 1";
-      CHECK_LE(static_cast<int>(param_.h_w[0]), static_cast<int>(data_shape[2])) <<
-          "the crop height(h_w[0]) should be less than the input data's height";
-      CHECK_GE(static_cast<int>(param_.h_w[1]), 1) <<
-          "the crop width(h_w[1]) should be larger than 1";
-      CHECK_LE(static_cast<int>(param_.h_w[1]), static_cast<int>(data_shape[3])) <<
-          "the crop width(h_w[1]) should be less than the input data's width";
+      CHECK_GE(static_cast<int>(param_.h_w[0]), 1)
+          << "the crop height(h_w[0]) should be larger than 1";
+      CHECK_LE(static_cast<int>(param_.h_w[0]), static_cast<int>(data_shape[2]))
+          << "the crop height(h_w[0]) should be less than the input data's height";
+      CHECK_GE(static_cast<int>(param_.h_w[1]), 1)
+          << "the crop width(h_w[1]) should be larger than 1";
+      CHECK_LE(static_cast<int>(param_.h_w[1]), static_cast<int>(data_shape[3]))
+          << "the crop width(h_w[1]) should be less than the input data's width";
       crop_shape.push_back(param_.h_w[0]);
       crop_shape.push_back(param_.h_w[1]);
     } else if (param_.num_args == 2) {
@@ -195,9 +198,9 @@ class CropProp : public OperatorProperty {
       crop_shape.push_back(crop_like_shape[2]);
       crop_shape.push_back(crop_like_shape[3]);
     }
-    if (crop_shape.size() == 0) return false;
-    CHECK_EQ(crop_shape.size(), 2U) << \
-        "Input crop_like should be 2D in height-width";
+    if (crop_shape.size() == 0)
+      return false;
+    CHECK_EQ(crop_shape.size(), 2U) << "Input crop_like should be 2D in height-width";
     out_shape->clear();
     data_shape[2] = crop_shape[0];
     data_shape[3] = crop_shape[1];
@@ -206,7 +209,7 @@ class CropProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new CropProp();
+    auto ptr    = new CropProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -215,10 +218,9 @@ class CropProp : public OperatorProperty {
     return "Crop";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return out_grad;
   }
 
@@ -226,7 +228,7 @@ class CropProp : public OperatorProperty {
 
  private:
   CropParam param_;
-};  // class CropProp
+};      // class CropProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/crop.cc b/src/operator/crop.cc
index 03af624ac2a9..edcdd9041560 100644
--- a/src/operator/crop.cc
+++ b/src/operator/crop.cc
@@ -22,13 +22,13 @@
  * \file crop.cc
  * \brief
  * \author Wei Wu
-*/
+ */
 
 #include "./crop-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<cpu>(CropParam param) {
   return new CropOp<cpu>(param);
 }
@@ -40,7 +40,7 @@ Operator* CropProp::CreateOperator(Context ctx) const {
 DMLC_REGISTER_PARAMETER(CropParam);
 
 MXNET_REGISTER_OP_PROPERTY(Crop, CropProp)
-.describe(R"code(
+    .describe(R"code(
 
 .. note:: `Crop` is deprecated. Use `slice` instead.
 
@@ -49,9 +49,11 @@ with width and height of the second input symbol, i.e., with one input, we need
 specify the crop height and width, otherwise the second input symbol's size will be used
 )code" ADD_FILELINE)
 
-.add_argument("data", "Symbol or Symbol[]", "Tensor or List of Tensors, the second input "
-"will be used as crop_like shape reference")
-.add_arguments(CropParam::__FIELDS__())
-.set_key_var_num_args("num_args");
+    .add_argument("data",
+                  "Symbol or Symbol[]",
+                  "Tensor or List of Tensors, the second input "
+                  "will be used as crop_like shape reference")
+    .add_arguments(CropParam::__FIELDS__())
+    .set_key_var_num_args("num_args");
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/crop.cu b/src/operator/crop.cu
index ba0334c35396..37b1460b0ee1 100644
--- a/src/operator/crop.cu
+++ b/src/operator/crop.cu
@@ -22,13 +22,13 @@
  * \file concat.cu
  * \brief
  * \author Wei Wu
-*/
+ */
 
 #include "./crop-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(CropParam param) {
   return new CropOp<gpu>(param);
 }
diff --git a/src/operator/cross_device_copy.cc b/src/operator/cross_device_copy.cc
index e5d3e0354e31..14cb81c4fb43 100644
--- a/src/operator/cross_device_copy.cc
+++ b/src/operator/cross_device_copy.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file cross_device_copy.cc
  * \brief Special operator that copys NDArray
-*/
+ */
 #include <dmlc/logging.h>
 #include <mxnet/operator.h>
 
@@ -30,11 +30,11 @@ namespace op {
 
 class CrossDeviceCopyOp : public Operator {
  public:
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data,
-               const std::vector<TBlob> &aux_args) override {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_args) override {
     // CrossDeviceCopy is specially handled by graph executor,
     // We still re-use things such as InferShape in OperatorProperty
     LOG(FATAL) << "Not Reached";
@@ -42,29 +42,30 @@ class CrossDeviceCopyOp : public Operator {
 };
 
 class CrossDeviceCopyProp : public OperatorProperty {
-  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
-  }
+  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {}
 
   std::map<std::string, std::string> GetParams() const override {
     return std::map<std::string, std::string>();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     CHECK_EQ(in_shape->size(), 1) << "Input:[data]";
-    const mxnet::TShape &dshape = in_shape->at(0);
-    if (dshape.ndim() == 0) return false;
+    const mxnet::TShape& dshape = in_shape->at(0);
+    if (dshape.ndim() == 0)
+      return false;
     out_shape->clear();
     out_shape->push_back(dshape);
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_EQ(in_type->size(), 1) << "Input:[data]";
-    if (in_type->at(0) == -1) return false;
+    if (in_type->at(0) == -1)
+      return false;
     out_type->clear();
     out_type->push_back(in_type->at(0));
     return true;
@@ -89,8 +90,7 @@ class CrossDeviceCopyProp : public OperatorProperty {
   }
 };
 
-
 MXNET_REGISTER_OP_PROPERTY(_CrossDeviceCopy, CrossDeviceCopyProp)
-.describe("Special op to copy data cross device");
+    .describe("Special op to copy data cross device");
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/cudnn_bilinear_sampler-inl.h b/src/operator/cudnn_bilinear_sampler-inl.h
index d72257682edd..7b6690d35d4f 100644
--- a/src/operator/cudnn_bilinear_sampler-inl.h
+++ b/src/operator/cudnn_bilinear_sampler-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_bilinear_sampler-inl.h
  * \brief
  * \author Xu Dong
-*/
+ */
 #ifndef MXNET_OPERATOR_CUDNN_BILINEAR_SAMPLER_INL_H_
 #define MXNET_OPERATOR_CUDNN_BILINEAR_SAMPLER_INL_H_
 
@@ -33,14 +33,14 @@ namespace mxnet {
 namespace op {
 #if defined(__CUDACC__) && MXNET_USE_CUDNN == 1
 STATIC_ASSERT_CUDNN_VERSION_GE(5000);
-template<typename DType>
+template <typename DType>
 class CuDNNBilinearSamplerOp : public Operator {
  public:
   explicit CuDNNBilinearSamplerOp(BilinearSamplerParam param) {
     this->param_ = param;
-    init_cudnn_ = false;
-    dtype_ = mshadow::DataType<DType>::kCudnnFlag;
-    sampler_ = CUDNN_SAMPLER_BILINEAR;
+    init_cudnn_  = false;
+    dtype_       = mshadow::DataType<DType>::kCudnnFlag;
+    sampler_     = CUDNN_SAMPLER_BILINEAR;
   }
 
   ~CuDNNBilinearSamplerOp() {
@@ -51,31 +51,31 @@ class CuDNNBilinearSamplerOp : public Operator {
     }
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_EQ(req[bs::kOut], kWriteTo);
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 2U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
 
-    Tensor<gpu, 4, DType> data = in_data[bs::kData].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> grid = in_data[bs::kGrid].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> data     = in_data[bs::kData].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> grid     = in_data[bs::kGrid].get<gpu, 4, DType>(s);
     Tensor<gpu, 4, DType> grid_tmp = out_data[bs::kTmp].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> out = out_data[bs::kOut].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> out      = out_data[bs::kOut].get<gpu, 4, DType>(s);
     // grid_tmp : (batch, h, w, 2)
     grid_tmp = transpose(grid, Shape4(0, 2, 3, 1));
     if (!init_cudnn_) {
-     Init(s, in_data, out_data);
+      Init(s, in_data, out_data);
     }
     CHECK_EQ(data.CheckContiguous(), true);
     CHECK_EQ(out.CheckContiguous(), true);
     CHECK_EQ(grid_tmp.CheckContiguous(), true);
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType beta  = 0.0f;
     CUDNN_CALL(cudnnSpatialTfSamplerForward(s->dnn_handle_,
                                             st_desc_,
                                             &alpha,
@@ -87,40 +87,40 @@ class CuDNNBilinearSamplerOp : public Operator {
                                             out.dptr_));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_NE(req[bs::kData], kWriteInplace);
     CHECK_NE(req[bs::kGrid], kWriteInplace);
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 2U);
     CHECK_EQ(out_grad.size(), 1U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
-    Tensor<gpu, 4, DType> data = in_data[bs::kData].get<gpu, 4, DType>(s);
+    Stream<gpu>* s                 = ctx.get_stream<gpu>();
+    Tensor<gpu, 4, DType> data     = in_data[bs::kData].get<gpu, 4, DType>(s);
     Tensor<gpu, 4, DType> grid_tmp = out_data[bs::kTmp].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> gdata = in_grad[bs::kData].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> ggrid = in_grad[bs::kGrid].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> grad = out_grad[bs::kOut].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> gdata    = in_grad[bs::kData].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> ggrid    = in_grad[bs::kGrid].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> grad     = out_grad[bs::kOut].get<gpu, 4, DType>(s);
 
-    typename DataType<DType>::ScaleType alpha = (req[bs::kData] == kNullOp) ? 0.0f : 1.0f;
-    typename DataType<DType>::ScaleType beta = (req[bs::kData] == kAddTo) ? 1.0f : 0.0f;
+    typename DataType<DType>::ScaleType alpha       = (req[bs::kData] == kNullOp) ? 0.0f : 1.0f;
+    typename DataType<DType>::ScaleType beta        = (req[bs::kData] == kAddTo) ? 1.0f : 0.0f;
     typename DataType<DType>::ScaleType alpha_dgrid = 1.0f;
-    typename DataType<DType>::ScaleType beta_dgrid = 0.0f;
+    typename DataType<DType>::ScaleType beta_dgrid  = 0.0f;
     CUDNN_CALL(cudnnSpatialTfSamplerBackward(s->dnn_handle_,
                                              st_desc_,
                                              &alpha,
                                              in_desc_,
                                              data.dptr_,
                                              &beta,
-                                             in_desc_/*reuse in_desc_*/,
-                                             gdata.dptr_/*output*/,
+                                             in_desc_ /*reuse in_desc_*/,
+                                             gdata.dptr_ /*output*/,
                                              &alpha_dgrid,
-                                             out_desc_/*reuse out_desc_*/,
+                                             out_desc_ /*reuse out_desc_*/,
                                              grad.dptr_,
                                              grid_tmp.dptr_,
                                              &beta_dgrid,
@@ -129,41 +129,29 @@ class CuDNNBilinearSamplerOp : public Operator {
   }
 
  private:
-  inline void Init(mshadow::Stream<gpu> *s,
-                   const std::vector<TBlob> &in_data,
-                   const std::vector<TBlob> &out_data) {
+  inline void Init(mshadow::Stream<gpu>* s,
+                   const std::vector<TBlob>& in_data,
+                   const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     format_ = CUDNN_TENSOR_NCHW;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 2U);
     if (!init_cudnn_) {
-      init_cudnn_ = true;
+      init_cudnn_                = true;
       Tensor<gpu, 4, DType> data = in_data[bs::kData].get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> out = out_data[bs::kOut].get<gpu, 4, DType>(s);
+      Tensor<gpu, 4, DType> out  = out_data[bs::kOut].get<gpu, 4, DType>(s);
       CUDNN_CALL(cudnnCreateSpatialTransformerDescriptor(&st_desc_));
       CUDNN_CALL(cudnnCreateTensorDescriptor(&in_desc_));
       CUDNN_CALL(cudnnCreateTensorDescriptor(&out_desc_));
-      CUDNN_CALL(cudnnSetTensor4dDescriptor(in_desc_,
-                                            format_,
-                                            dtype_,
-                                            data.size(0),
-                                            data.size(1),
-                                            data.size(2),
-                                            data.size(3)));
-      CUDNN_CALL(cudnnSetTensor4dDescriptor(out_desc_,
-                                            format_,
-                                            dtype_,
-                                            out.size(0),
-                                            out.size(1),
-                                            out.size(2),
-                                            out.size(3)));
-      int dim[] = {static_cast<int>(out.size(0)), static_cast<int>(out.size(1)),
-                   static_cast<int>(out.size(2)), static_cast<int>(out.size(3))};
-      CUDNN_CALL(cudnnSetSpatialTransformerNdDescriptor(st_desc_,
-                                                        sampler_,
-                                                        dtype_,
-                                                        4,
-                                                        dim));
+      CUDNN_CALL(cudnnSetTensor4dDescriptor(
+          in_desc_, format_, dtype_, data.size(0), data.size(1), data.size(2), data.size(3)));
+      CUDNN_CALL(cudnnSetTensor4dDescriptor(
+          out_desc_, format_, dtype_, out.size(0), out.size(1), out.size(2), out.size(3)));
+      int dim[] = {static_cast<int>(out.size(0)),
+                   static_cast<int>(out.size(1)),
+                   static_cast<int>(out.size(2)),
+                   static_cast<int>(out.size(3))};
+      CUDNN_CALL(cudnnSetSpatialTransformerNdDescriptor(st_desc_, sampler_, dtype_, 4, dim));
     }
   }
 
diff --git a/src/operator/cudnn_lrn-inl.h b/src/operator/cudnn_lrn-inl.h
index 3a45fd51ef15..3068ef1b3925 100644
--- a/src/operator/cudnn_lrn-inl.h
+++ b/src/operator/cudnn_lrn-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_lrn-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #ifndef MXNET_OPERATOR_CUDNN_LRN_INL_H_
 #define MXNET_OPERATOR_CUDNN_LRN_INL_H_
@@ -31,13 +31,13 @@
 
 namespace mxnet {
 namespace op {
-template<typename DType>
+template <typename DType>
 class CuDNNLocalResponseNormOp : public Operator {
  public:
   explicit CuDNNLocalResponseNormOp(LRNParam param) {
-    param_ = param;
+    param_      = param;
     init_cudnn_ = false;
-    dtype_ = mshadow::DataType<DType>::kCudnnFlag;
+    dtype_      = mshadow::DataType<DType>::kCudnnFlag;
   }
 
   ~CuDNNLocalResponseNormOp() {
@@ -47,20 +47,20 @@ class CuDNNLocalResponseNormOp : public Operator {
     }
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 2U);
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
-    Tensor<gpu, 4, DType> data = in_data[lrn_enum::kData].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> out = out_data[lrn_enum::kOut].get<gpu, 4, DType>(s);
+    typename DataType<DType>::ScaleType beta  = 0.0f;
+    Stream<gpu>* s                            = ctx.get_stream<gpu>();
+    Tensor<gpu, 4, DType> data                = in_data[lrn_enum::kData].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> out                 = out_data[lrn_enum::kOut].get<gpu, 4, DType>(s);
     if (!init_cudnn_) {
       this->Init(s, in_data, out_data);
     }
@@ -76,13 +76,13 @@ class CuDNNLocalResponseNormOp : public Operator {
                                            out.dptr_));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
@@ -91,12 +91,12 @@ class CuDNNLocalResponseNormOp : public Operator {
     CHECK_EQ(req.size(), 1U);
     CHECK_EQ(in_grad.size(), 1U);
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
-    Tensor<gpu, 4, DType> grad = out_grad[lrn_enum::kOut].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> data = in_data[lrn_enum::kData].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> output_data = out_data[lrn_enum::kOut].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> input_grad = in_grad[lrn_enum::kData].get<gpu, 4, DType>(s);
+    typename DataType<DType>::ScaleType beta  = 0.0f;
+    Stream<gpu>* s                            = ctx.get_stream<gpu>();
+    Tensor<gpu, 4, DType> grad                = out_grad[lrn_enum::kOut].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> data                = in_data[lrn_enum::kData].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> output_data         = out_data[lrn_enum::kOut].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> input_grad          = in_grad[lrn_enum::kData].get<gpu, 4, DType>(s);
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     CUDNN_CALL(cudnnLRNCrossChannelBackward(s->dnn_handle_,
                                             lrn_desc_,
@@ -114,27 +114,23 @@ class CuDNNLocalResponseNormOp : public Operator {
   }
 
  private:
-  inline void Init(mshadow::Stream<gpu> *s,
-                   const std::vector<TBlob> &in_data,
-                   const std::vector<TBlob> &out_data) {
+  inline void Init(mshadow::Stream<gpu>* s,
+                   const std::vector<TBlob>& in_data,
+                   const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 2U);
     if (!init_cudnn_) {
-      init_cudnn_ = true;
+      init_cudnn_                = true;
       Tensor<gpu, 4, DType> data = in_data[lrn_enum::kData].get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> out = out_data[lrn_enum::kOut].get<gpu, 4, DType>(s);
-      unsigned lrn_n = param_.nsize;
-      double alpha = param_.alpha;
-      double beta = param_.beta;
-      double lrn_k = param_.knorm;
+      Tensor<gpu, 4, DType> out  = out_data[lrn_enum::kOut].get<gpu, 4, DType>(s);
+      unsigned lrn_n             = param_.nsize;
+      double alpha               = param_.alpha;
+      double beta                = param_.beta;
+      double lrn_k               = param_.knorm;
       CHECK_EQ(data.shape_, out.shape_);
       CUDNN_CALL(cudnnCreateLRNDescriptor(&lrn_desc_));
-      CUDNN_CALL(cudnnSetLRNDescriptor(lrn_desc_,
-                                       lrn_n,
-                                       alpha,
-                                       beta,
-                                       lrn_k));
+      CUDNN_CALL(cudnnSetLRNDescriptor(lrn_desc_, lrn_n, alpha, beta, lrn_k));
       CUDNN_CALL(cudnnCreateTensorDescriptor(&shape_desc_));
       CUDNN_CALL(cudnnSetTensor4dDescriptor(shape_desc_,
                                             CUDNN_TENSOR_NCHW,
diff --git a/src/operator/cudnn_spatial_transformer-inl.h b/src/operator/cudnn_spatial_transformer-inl.h
index 2e069e515563..d174426ed8eb 100644
--- a/src/operator/cudnn_spatial_transformer-inl.h
+++ b/src/operator/cudnn_spatial_transformer-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_spatial_transformer-inl.h
  * \brief
  * \author Wei Wu
-*/
+ */
 #ifndef MXNET_OPERATOR_CUDNN_SPATIAL_TRANSFORMER_INL_H_
 #define MXNET_OPERATOR_CUDNN_SPATIAL_TRANSFORMER_INL_H_
 
@@ -33,13 +33,13 @@ namespace mxnet {
 namespace op {
 #if defined(__CUDACC__) && MXNET_USE_CUDNN == 1
 STATIC_ASSERT_CUDNN_VERSION_GE(5000);
-template<typename DType>
+template <typename DType>
 class CuDNNSpatialTransformerOp : public Operator {
  public:
   explicit CuDNNSpatialTransformerOp(SpatialTransformerParam param) {
     this->param_ = param;
-    init_cudnn_ = false;
-    dtype_ = mshadow::DataType<DType>::kCudnnFlag;
+    init_cudnn_  = false;
+    dtype_       = mshadow::DataType<DType>::kCudnnFlag;
     if (param_.sampler_type == st::kBilinear) {
       sampler_ = CUDNN_SAMPLER_BILINEAR;
     }
@@ -53,34 +53,32 @@ class CuDNNSpatialTransformerOp : public Operator {
     }
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 3U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s             = ctx.get_stream<gpu>();
     Tensor<gpu, 4, DType> data = in_data[st::kData].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> out = out_data[st::kOut].get<gpu, 4, DType>(s);
-    Shape<3> loc_shape = Shape3(data.size(0), 2, 3);
-    Shape<4> grid_shape = Shape4(out.size(0), out.size(2), out.size(3), 2);
-    Tensor<gpu, 3, DType> loc = in_data[st::kLoc].get_with_shape<gpu, 3, DType>(loc_shape, s);
-    Tensor<gpu, 4, DType> grid = out_data[st::kGridSrc]
-                                .get_with_shape<gpu, 4, DType>(grid_shape, s);
+    Tensor<gpu, 4, DType> out  = out_data[st::kOut].get<gpu, 4, DType>(s);
+    Shape<3> loc_shape         = Shape3(data.size(0), 2, 3);
+    Shape<4> grid_shape        = Shape4(out.size(0), out.size(2), out.size(3), 2);
+    Tensor<gpu, 3, DType> loc  = in_data[st::kLoc].get_with_shape<gpu, 3, DType>(loc_shape, s);
+    Tensor<gpu, 4, DType> grid =
+        out_data[st::kGridSrc].get_with_shape<gpu, 4, DType>(grid_shape, s);
     if (!init_cudnn_) {
-     Init(s, in_data, out_data);
+      Init(s, in_data, out_data);
     }
     CHECK_EQ(data.CheckContiguous(), true);
     CHECK_EQ(out.CheckContiguous(), true);
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType beta  = 0.0f;
     if (param_.transform_type == st::kAffine) {
-      CUDNN_CALL(cudnnSpatialTfGridGeneratorForward(s->dnn_handle_,
-                                                    st_desc_,
-                                                    loc.dptr_,
-                                                    grid.dptr_));
+      CUDNN_CALL(
+          cudnnSpatialTfGridGeneratorForward(s->dnn_handle_, st_desc_, loc.dptr_, grid.dptr_));
     }
     CUDNN_CALL(cudnnSpatialTfSamplerForward(s->dnn_handle_,
                                             st_desc_,
@@ -93,91 +91,77 @@ class CuDNNSpatialTransformerOp : public Operator {
                                             out.dptr_));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 3U);
     CHECK_EQ(out_grad.size(), 1U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
-    Tensor<gpu, 4, DType> data = in_data[st::kData].get<gpu, 4, DType>(s);
-    Tensor<gpu, 4, DType> grad = out_grad[st::kOut].get<gpu, 4, DType>(s);
+    Stream<gpu>* s              = ctx.get_stream<gpu>();
+    Tensor<gpu, 4, DType> data  = in_data[st::kData].get<gpu, 4, DType>(s);
+    Tensor<gpu, 4, DType> grad  = out_grad[st::kOut].get<gpu, 4, DType>(s);
     Tensor<gpu, 4, DType> ddata = in_grad[st::kData].get<gpu, 4, DType>(s);
-    Shape<3> loc_shape = Shape3(data.size(0), 2, 3);
-    Shape<4> grid_shape = Shape4(grad.size(0), grad.size(2), grad.size(3), 2);
-    Tensor<gpu, 3, DType> dloc = in_grad[st::kLoc].get_with_shape<gpu, 3, DType>(loc_shape, s);
-    Tensor<gpu, 4, DType> grid = out_data[st::kGridSrc]
-                    .get_with_shape<gpu, 4, DType>(grid_shape, s);
+    Shape<3> loc_shape          = Shape3(data.size(0), 2, 3);
+    Shape<4> grid_shape         = Shape4(grad.size(0), grad.size(2), grad.size(3), 2);
+    Tensor<gpu, 3, DType> dloc  = in_grad[st::kLoc].get_with_shape<gpu, 3, DType>(loc_shape, s);
+    Tensor<gpu, 4, DType> grid =
+        out_data[st::kGridSrc].get_with_shape<gpu, 4, DType>(grid_shape, s);
     // do not use out_grad[st::kGridSrc], because dgrid is a intermediate tensor, and not include in
     // DeclareBackwardDependency, another, we can we reuse grid for inplace operator
-    typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType alpha       = 1.0f;
+    typename DataType<DType>::ScaleType beta        = 0.0f;
     typename DataType<DType>::ScaleType alpha_dgrid = 1.0f;
-    typename DataType<DType>::ScaleType beta_dgrid = 0.0f;
+    typename DataType<DType>::ScaleType beta_dgrid  = 0.0f;
     CUDNN_CALL(cudnnSpatialTfSamplerBackward(s->dnn_handle_,
                                              st_desc_,
                                              &alpha,
                                              in_desc_,
                                              data.dptr_,
                                              &beta,
-                                             in_desc_/*reuse in_desc_*/,
-                                             ddata.dptr_/*output*/,
+                                             in_desc_ /*reuse in_desc_*/,
+                                             ddata.dptr_ /*output*/,
                                              &alpha_dgrid,
-                                             out_desc_/*reuse out_desc_*/,
+                                             out_desc_ /*reuse out_desc_*/,
                                              grad.dptr_,
                                              grid.dptr_,
                                              &beta_dgrid,
                                              grid.dptr_));
     if (param_.transform_type == st::kAffine) {
-      CUDNN_CALL(cudnnSpatialTfGridGeneratorBackward(s->dnn_handle_,
-                                                     st_desc_,
-                                                     grid.dptr_,
-                                                     dloc.dptr_/*out*/));
+      CUDNN_CALL(cudnnSpatialTfGridGeneratorBackward(
+          s->dnn_handle_, st_desc_, grid.dptr_, dloc.dptr_ /*out*/));
     }
   }
 
  private:
-  inline void Init(mshadow::Stream<gpu> *s,
-                   const std::vector<TBlob> &in_data,
-                   const std::vector<TBlob> &out_data) {
+  inline void Init(mshadow::Stream<gpu>* s,
+                   const std::vector<TBlob>& in_data,
+                   const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     format_ = CUDNN_TENSOR_NCHW;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 3U);
     if (!init_cudnn_) {
-      init_cudnn_ = true;
+      init_cudnn_                = true;
       Tensor<gpu, 4, DType> data = in_data[st::kData].get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> out = out_data[st::kOut].get<gpu, 4, DType>(s);
+      Tensor<gpu, 4, DType> out  = out_data[st::kOut].get<gpu, 4, DType>(s);
       CUDNN_CALL(cudnnCreateSpatialTransformerDescriptor(&st_desc_));
       CUDNN_CALL(cudnnCreateTensorDescriptor(&in_desc_));
       CUDNN_CALL(cudnnCreateTensorDescriptor(&out_desc_));
-      CUDNN_CALL(cudnnSetTensor4dDescriptor(in_desc_,
-                                            format_,
-                                            dtype_,
-                                            data.size(0),
-                                            data.size(1),
-                                            data.size(2),
-                                            data.size(3)));
-      CUDNN_CALL(cudnnSetTensor4dDescriptor(out_desc_,
-                                            format_,
-                                            dtype_,
-                                            out.size(0),
-                                            out.size(1),
-                                            out.size(2),
-                                            out.size(3)));
+      CUDNN_CALL(cudnnSetTensor4dDescriptor(
+          in_desc_, format_, dtype_, data.size(0), data.size(1), data.size(2), data.size(3)));
+      CUDNN_CALL(cudnnSetTensor4dDescriptor(
+          out_desc_, format_, dtype_, out.size(0), out.size(1), out.size(2), out.size(3)));
       if (param_.sampler_type == st::kBilinear) {
-        int dim[] = {static_cast<int>(out.size(0)), static_cast<int>(out.size(1)),
-                     static_cast<int>(out.size(2)), static_cast<int>(out.size(3))};
-        CUDNN_CALL(cudnnSetSpatialTransformerNdDescriptor(st_desc_,
-                                                          sampler_,
-                                                          dtype_,
-                                                          4,
-                                                          dim));
+        int dim[] = {static_cast<int>(out.size(0)),
+                     static_cast<int>(out.size(1)),
+                     static_cast<int>(out.size(2)),
+                     static_cast<int>(out.size(3))};
+        CUDNN_CALL(cudnnSetSpatialTransformerNdDescriptor(st_desc_, sampler_, dtype_, 4, dim));
       }
     }
   }
diff --git a/src/operator/custom/custom-inl.h b/src/operator/custom/custom-inl.h
index 1173b14eb2fe..073dc33ac7e3 100644
--- a/src/operator/custom/custom-inl.h
+++ b/src/operator/custom/custom-inl.h
@@ -22,7 +22,7 @@
  * \file native_op-inl.h
  * \brief
  * \author Junyuan Xie
-*/
+ */
 
 #ifndef MXNET_OPERATOR_CUSTOM_CUSTOM_INL_H_
 #define MXNET_OPERATOR_CUSTOM_CUSTOM_INL_H_
@@ -51,7 +51,7 @@ namespace custom {
 
 class CustomOperator {
  public:
-  void Register(const std::string &op_type, CustomOpPropCreator creator) {
+  void Register(const std::string& op_type, CustomOpPropCreator creator) {
     std::lock_guard<std::mutex> lock(mutex_);
     if (registry_.find(op_type) != registry_.end()) {
       LOG(WARNING) << "New registration is overriding existing custom operator " << op_type;
@@ -59,10 +59,11 @@ class CustomOperator {
     registry_[op_type] = creator;
   }
 
-  CustomOpPropCreator Find(const std::string &op_type) {
+  CustomOpPropCreator Find(const std::string& op_type) {
     std::lock_guard<std::mutex> lock(mutex_);
     auto it = registry_.find(op_type);
-    if (it != registry_.end()) return it->second;
+    if (it != registry_.end())
+      return it->second;
     return nullptr;
   }
 
@@ -73,8 +74,11 @@ class CustomOperator {
   // outputs ndarrays as args and updating the inputs and outputs ndarray
   // chunk pointers to be same as the copied ndarrays.
   template <typename Func>
-  void Push(const Func& func, const OpContext& ctx, bool recording,
-            bool training, const std::vector<NDArray>& arrs,
+  void Push(const Func& func,
+            const OpContext& ctx,
+            bool recording,
+            bool training,
+            const std::vector<NDArray>& arrs,
             const std::vector<int>& tags,
             const std::unordered_set<int>& output_tags,
             const std::vector<NDArray>& outputs,
@@ -102,7 +106,7 @@ class CustomOperator {
     std::unique_lock<std::mutex> lock(mutex_);
     q_.push([=]() mutable {
       bool prev_recording = Imperative::Get()->set_is_recording(recording);
-      bool prev_training = Imperative::Get()->set_is_training(training);
+      bool prev_training  = Imperative::Get()->set_is_training(training);
 
       try {
         if (profiler::Profiler::Get()->IsProfiling(profiler::Profiler::kImperative)) {
@@ -113,8 +117,7 @@ class CustomOperator {
           func();
         }
       } catch (dmlc::Error& e) {
-        exception_ =
-            std::make_shared<std::exception_ptr>(std::current_exception());
+        exception_ = std::make_shared<std::exception_ptr>(std::current_exception());
       }
 
       Imperative::Get()->set_is_training(prev_training);
@@ -125,8 +128,7 @@ class CustomOperator {
       for (const auto& i : arrs) {
         vars.push_back(i.var());
         if (output_tags.count(tags[idx]) > 0) {
-          if (i.storage_type() == kDefaultStorage ||
-              i.storage_type() == kUndefinedStorage)
+          if (i.storage_type() == kDefaultStorage || i.storage_type() == kUndefinedStorage)
             continue;
           vars2.push_back(i.var());
           idx++;
@@ -140,7 +142,7 @@ class CustomOperator {
               for (const auto& i : arrs) {
                 Engine::Get()->Throw(i.var());
               }
-            } catch(dmlc::Error& err) {
+            } catch (dmlc::Error& err) {
               ctx.async_on_complete(&err);
               return;
             }
@@ -157,7 +159,12 @@ class CustomOperator {
 
             ctx.async_on_complete();
           },
-          ctx.run_ctx.ctx, vars, vars2, FnProperty::kNoSkip, 0, "CustomOperatorWait");
+          ctx.run_ctx.ctx,
+          vars,
+          vars2,
+          FnProperty::kNoSkip,
+          0,
+          "CustomOperatorWait");
     });
     // increase num_threads if there is not enough threads to execute custom operator
     if (q_.size() > num_free_threads_)
@@ -172,22 +179,23 @@ class CustomOperator {
 
   void Start() {
     num_free_threads_ = 0;
-    destructing_ = false;
-    naive_engine_ = true;
-    exception_ = nullptr;
+    destructing_      = false;
+    naive_engine_     = true;
+    exception_        = nullptr;
     if (std::string("NaiveEngine") != dmlc::GetEnv("MXNET_ENGINE_TYPE", std::string())) {
       naive_engine_ = false;
     }
   }
 
   void Stop() {
-    if (naive_engine_) return;
+    if (naive_engine_)
+      return;
     {
       std::unique_lock<std::mutex> lock(mutex_);
       destructing_ = true;
       cv_.notify_all();
     }
-    for (auto &worker : workers_)
+    for (auto& worker : workers_)
       worker.join();
     workers_.clear();
   }
@@ -195,7 +203,7 @@ class CustomOperator {
   inline void Throw() {
     if (exception_ && *exception_) {
       std::exception_ptr tmp = *exception_;
-      exception_ = nullptr;
+      exception_             = nullptr;
       std::rethrow_exception(tmp);
     }
   }
@@ -207,7 +215,7 @@ class CustomOperator {
   void ThreadTarget() {
     std::unique_lock<std::mutex> lock(mutex_);
     while (!q_.empty() || !destructing_) {
-      cv_.wait(lock, [&] {return !q_.empty() || destructing_;});
+      cv_.wait(lock, [&] { return !q_.empty() || destructing_; });
       while (!q_.empty()) {
         --num_free_threads_;
         auto fn = q_.front();
@@ -221,7 +229,7 @@ class CustomOperator {
   }
   void SetNumThreads(int num_threads) {
     for (int i = workers_.size(); i < num_threads; ++i) {
-      workers_.emplace_back(std::thread([this]{this->ThreadTarget();}));
+      workers_.emplace_back(std::thread([this] { this->ThreadTarget(); }));
       ++num_free_threads_;
     }
   }
diff --git a/src/operator/custom/custom.cc b/src/operator/custom/custom.cc
index f7a61a91c0ab..86842499b047 100644
--- a/src/operator/custom/custom.cc
+++ b/src/operator/custom/custom.cc
@@ -22,7 +22,7 @@
  * \file custom.cc
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #include "./custom-inl.h"
 #include <mxnet/base.h>
 #include <mxnet/ndarray.h>
@@ -43,7 +43,7 @@ struct CustomParam {
 
 /*! \brief allocate ndarrays from existing ndarrays
  */
-inline NDArray *AllocateNDArrayCopy(const NDArray &input, int dev_id) {
+inline NDArray* AllocateNDArrayCopy(const NDArray& input, int dev_id) {
   std::vector<TBlob> aux;
   NDArrayStorageType stype = input.storage_type();
   switch (stype) {
@@ -61,12 +61,11 @@ inline NDArray *AllocateNDArrayCopy(const NDArray &input, int dev_id) {
   return new NDArray(stype, input.shape(), input.data(), aux, dev_id);
 }
 
-template<CustomOpPropCallbacks Type>
+template <CustomOpPropCallbacks Type>
 std::vector<std::string> List(const NodeAttrs& attrs) {
   const auto& params = nnvm::get<CustomParam>(attrs.parsed);
-  char ** args = nullptr;
-  CHECK(reinterpret_cast<CustomOpListFunc>(
-    params.info->callbacks[Type])(
+  char** args        = nullptr;
+  CHECK(reinterpret_cast<CustomOpListFunc>(params.info->callbacks[Type])(
       &args, params.info->contexts[Type]));
   std::vector<std::string> ret;
   for (int i = 0; args[i] != nullptr; ++i) {
@@ -76,7 +75,7 @@ std::vector<std::string> List(const NodeAttrs& attrs) {
 }
 
 void AttrParser(NodeAttrs* attrs) {
-  attrs->parsed = CustomParam();
+  attrs->parsed       = CustomParam();
   CustomParam& params = nnvm::get<CustomParam>(attrs->parsed);
 
   std::vector<const char*> keys, vals;
@@ -92,13 +91,12 @@ void AttrParser(NodeAttrs* attrs) {
   CustomOpPropCreator creator = CustomOperator::Get()->Find(params.op_type);
   CHECK(CustomOperator::Get()->Find(params.op_type) != nullptr)
       << "Cannot find custom operator " << params.op_type;
-  params.info.reset(new MXCallbackList, [](MXCallbackList* ptr){
-      reinterpret_cast<CustomOpDelFunc>(ptr->callbacks[kCustomOpPropDelete])(
+  params.info.reset(new MXCallbackList, [](MXCallbackList* ptr) {
+    reinterpret_cast<CustomOpDelFunc>(ptr->callbacks[kCustomOpPropDelete])(
         ptr->contexts[kCustomOpPropDelete]);
-      delete ptr;
-    });
-  CHECK(creator(params.op_type.c_str(), keys.size(), keys.data(),
-                vals.data(), params.info.get()));
+    delete ptr;
+  });
+  CHECK(creator(params.op_type.c_str(), keys.size(), keys.data(), vals.data(), params.info.get()));
 
   params.num_args = List<kCustomOpPropListArguments>(*attrs).size();
   params.num_outs = List<kCustomOpPropListOutputs>(*attrs).size();
@@ -106,19 +104,26 @@ void AttrParser(NodeAttrs* attrs) {
 
   int num_dep, *rdeps, counter = 0;
   std::vector<int> out_grad, in_data, out_data;
-  for (size_t i = 0; i < params.num_outs; ++i) out_grad.push_back(counter++);
-  for (size_t i = 0; i < params.num_args; ++i) in_data.push_back(counter++);
-  for (size_t i = 0; i < params.num_outs; ++i) out_data.push_back(counter++);
+  for (size_t i = 0; i < params.num_outs; ++i)
+    out_grad.push_back(counter++);
+  for (size_t i = 0; i < params.num_args; ++i)
+    in_data.push_back(counter++);
+  for (size_t i = 0; i < params.num_outs; ++i)
+    out_data.push_back(counter++);
   CHECK(reinterpret_cast<CustomOpBwdDepFunc>(
-    params.info->callbacks[kCustomOpPropDeclareBackwardDependency])(
-      out_grad.data(), in_data.data(), out_data.data(), &num_dep,
-      &rdeps, params.info->contexts[kCustomOpPropDeclareBackwardDependency]));
-  params.bwd_idx.insert(params.bwd_idx.end(), rdeps, rdeps+num_dep);
+      params.info->callbacks[kCustomOpPropDeclareBackwardDependency])(
+      out_grad.data(),
+      in_data.data(),
+      out_data.data(),
+      &num_dep,
+      &rdeps,
+      params.info->contexts[kCustomOpPropDeclareBackwardDependency]));
+  params.bwd_idx.insert(params.bwd_idx.end(), rdeps, rdeps + num_dep);
 }
 
 bool InferShape(const NodeAttrs& attrs,
-                mxnet::ShapeVector *in_shape,
-                mxnet::ShapeVector *out_shape) {
+                mxnet::ShapeVector* in_shape,
+                mxnet::ShapeVector* out_shape) {
   const auto& params = nnvm::get<CustomParam>(attrs.parsed);
 
   size_t total = params.num_args + params.num_outs + params.num_auxs;
@@ -131,41 +136,38 @@ bool InferShape(const NodeAttrs& attrs,
     }
   }
   std::vector<int> buff(buff_size);
-  int *ptr = buff.data();
+  int* ptr = buff.data();
   for (size_t i = 0; i < in_shape->size(); ++i) {
     shapes[i] = ptr;
-    ndims[i] = (*in_shape)[i].ndim();
+    ndims[i]  = (*in_shape)[i].ndim();
     for (int j = 0; j < (*in_shape)[i].ndim(); ++j, ++ptr) {
       *ptr = (*in_shape)[i][j];
     }
   }
 
-  CHECK(reinterpret_cast<CustomOpInferShapeFunc>(
-      params.info->callbacks[kCustomOpPropInferShape])(
-          shapes.size(), ndims.data(), shapes.data(),
-          params.info->contexts[kCustomOpPropInferShape]));
+  CHECK(reinterpret_cast<CustomOpInferShapeFunc>(params.info->callbacks[kCustomOpPropInferShape])(
+      shapes.size(), ndims.data(), shapes.data(), params.info->contexts[kCustomOpPropInferShape]));
 
   for (size_t i = 0; i < params.num_args; ++i) {
-    SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(shapes[i], shapes[i]+ndims[i]));
+    SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(shapes[i], shapes[i] + ndims[i]));
   }
 
   size_t base = params.num_args;
   for (size_t i = 0; i < params.num_outs; ++i) {
-    SHAPE_ASSIGN_CHECK(*out_shape, i,
-        mxnet::TShape(shapes[base+i], shapes[base+i]+ndims[base+i]));
+    SHAPE_ASSIGN_CHECK(
+        *out_shape, i, mxnet::TShape(shapes[base + i], shapes[base + i] + ndims[base + i]));
   }
 
   base = params.num_args + params.num_outs;
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    SHAPE_ASSIGN_CHECK(*in_shape, params.num_args+i,
-        mxnet::TShape(shapes[base+i], shapes[base+i]+ndims[base+i]));
+    SHAPE_ASSIGN_CHECK(*in_shape,
+                       params.num_args + i,
+                       mxnet::TShape(shapes[base + i], shapes[base + i] + ndims[base + i]));
   }
   return true;
 }
 
-bool InferType(const NodeAttrs& attrs,
-               std::vector<int> *in_type,
-               std::vector<int> *out_type) {
+bool InferType(const NodeAttrs& attrs, std::vector<int>* in_type, std::vector<int>* out_type) {
   const auto& params = nnvm::get<CustomParam>(attrs.parsed);
 
   if (params.info->num_callbacks <= kCustomOpPropInferType) {
@@ -182,52 +184,49 @@ bool InferType(const NodeAttrs& attrs,
     types.push_back(i);
   }
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    types.push_back((*in_type)[params.num_args+i]);
+    types.push_back((*in_type)[params.num_args + i]);
   }
 
-  CHECK(reinterpret_cast<CustomOpInferTypeFunc>(
-      params.info->callbacks[kCustomOpPropInferType])(
-          types.size(), types.data(), params.info->contexts[kCustomOpPropInferType]));
+  CHECK(reinterpret_cast<CustomOpInferTypeFunc>(params.info->callbacks[kCustomOpPropInferType])(
+      types.size(), types.data(), params.info->contexts[kCustomOpPropInferType]));
 
   for (size_t i = 0; i < params.num_args; ++i) {
     TYPE_ASSIGN_CHECK(*in_type, i, types[i]);
   }
   for (size_t i = 0; i < params.num_outs; ++i) {
-    TYPE_ASSIGN_CHECK(*out_type, i, types[params.num_args+i]);
+    TYPE_ASSIGN_CHECK(*out_type, i, types[params.num_args + i]);
   }
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    TYPE_ASSIGN_CHECK(*in_type, params.num_args+i,
-                      types[params.num_args+params.num_outs+i]);
+    TYPE_ASSIGN_CHECK(*in_type, params.num_args + i, types[params.num_args + params.num_outs + i]);
   }
   return true;
 }
 
-std::vector<nnvm::NodeEntry> Gradient(
-    const nnvm::ObjectPtr& n,
-    const std::vector<nnvm::NodeEntry>& out_grads) {
+std::vector<nnvm::NodeEntry> Gradient(const nnvm::ObjectPtr& n,
+                                      const std::vector<nnvm::NodeEntry>& out_grads) {
   const auto& params = nnvm::get<CustomParam>(n->attrs.parsed);
 
   nnvm::ObjectPtr g = nnvm::Node::Create();
-  g->attrs.op = nnvm::Op::Get("_backward_Custom");
-  g->attrs.name = n->attrs.name;
-  g->attrs.parsed = params;
+  g->attrs.op       = nnvm::Op::Get("_backward_Custom");
+  g->attrs.name     = n->attrs.name;
+  g->attrs.parsed   = params;
   g->control_deps.emplace_back(n);
 
   g->inputs.reserve(params.bwd_idx.size());
   for (const int& t : params.bwd_idx) {
     auto i = static_cast<size_t>(t);
     if (i >= params.num_outs + params.num_args) {
-      auto idx = static_cast<uint32_t>(i-params.num_outs-params.num_args);
+      auto idx = static_cast<uint32_t>(i - params.num_outs - params.num_args);
       g->inputs.emplace_back(n, idx, 0);
     } else if (i >= params.num_outs) {
-      g->inputs.push_back(n->inputs[i-params.num_outs]);
+      g->inputs.push_back(n->inputs[i - params.num_outs]);
     } else {
       g->inputs.push_back(out_grads[i]);
     }
   }
 
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    g->inputs.push_back(n->inputs[i+params.num_args]);
+    g->inputs.push_back(n->inputs[i + params.num_args]);
   }
 
   std::vector<nnvm::NodeEntry> ret;
@@ -236,8 +235,8 @@ std::vector<nnvm::NodeEntry> Gradient(
   }
   if (params.num_auxs) {
     nnvm::ObjectPtr ng = nnvm::Node::Create();
-    ng->attrs.op = nnvm::Op::Get("_NoGradient");
-    ng->attrs.name = "NoGradient";
+    ng->attrs.op       = nnvm::Op::Get("_NoGradient");
+    ng->attrs.name     = "NoGradient";
     for (size_t i = 0; i < params.num_auxs; ++i) {
       ret.emplace_back(ng, 0, 0);
     }
@@ -246,8 +245,8 @@ std::vector<nnvm::NodeEntry> Gradient(
   return ret;
 }
 
-
-OpStatePtr CreateState(const NodeAttrs& attrs, Context ctx,
+OpStatePtr CreateState(const NodeAttrs& attrs,
+                       Context ctx,
                        const mxnet::ShapeVector& in_shape,
                        const std::vector<int>& in_type) {
   const auto& params = nnvm::get<CustomParam>(attrs.parsed);
@@ -255,12 +254,13 @@ OpStatePtr CreateState(const NodeAttrs& attrs, Context ctx,
   std::vector<uint32_t*> shapes(in_shape.size());
   std::vector<int> ndims(in_shape.size());
   size_t buff_size = 0;
-  for (const auto& i : in_shape) buff_size += i.ndim();
+  for (const auto& i : in_shape)
+    buff_size += i.ndim();
   std::vector<uint32_t> buff(buff_size);
-  uint32_t *ptr = buff.data();
+  uint32_t* ptr = buff.data();
   for (size_t i = 0; i < in_shape.size(); ++i) {
     shapes[i] = ptr;
-    ndims[i] = in_shape[i].ndim();
+    ndims[i]  = in_shape[i].ndim();
     for (int j = 0; j < in_shape[i].ndim(); ++j, ++ptr) {
       *ptr = static_cast<uint32_t>(in_shape[i][j]);
     }
@@ -269,23 +269,28 @@ OpStatePtr CreateState(const NodeAttrs& attrs, Context ctx,
   std::ostringstream os;
   os << ctx;
 
-  MXCallbackList *op_info = new MXCallbackList;
-  CHECK(reinterpret_cast<CustomOpCreateFunc>(
-      params.info->callbacks[kCustomOpPropCreateOperator])(
-          os.str().c_str(), shapes.size(), shapes.data(), ndims.data(), in_type.data(),
-          op_info, params.info->contexts[kCustomOpPropCreateOperator]));
+  MXCallbackList* op_info = new MXCallbackList;
+  CHECK(reinterpret_cast<CustomOpCreateFunc>(params.info->callbacks[kCustomOpPropCreateOperator])(
+      os.str().c_str(),
+      shapes.size(),
+      shapes.data(),
+      ndims.data(),
+      in_type.data(),
+      op_info,
+      params.info->contexts[kCustomOpPropCreateOperator]));
 
   CustomParam state = params;
-  state.info.reset(op_info, [](MXCallbackList *ptr){
+  state.info.reset(op_info, [](MXCallbackList* ptr) {
     reinterpret_cast<CustomOpDelFunc>(ptr->callbacks[kCustomOpDelete])(
-      ptr->contexts[kCustomOpDelete]);
+        ptr->contexts[kCustomOpDelete]);
     delete ptr;
   });
 
   return OpStatePtr::Create<CustomParam>(state);
 }
 
-void ForwardEx(const OpStatePtr& state, const OpContext& ctx,
+void ForwardEx(const OpStatePtr& state,
+               const OpContext& ctx,
                const std::vector<NDArray>& inputs,
                const std::vector<OpReqType>& req,
                const std::vector<NDArray>& outputs) {
@@ -305,21 +310,21 @@ void ForwardEx(const OpStatePtr& state, const OpContext& ctx,
   auto dev_id = ctx.run_ctx.ctx.dev_id;
 
   for (size_t i = 0; i < params.num_args; ++i) {
-    auto *nd = AllocateNDArrayCopy(inputs[i], dev_id);
+    auto* nd = AllocateNDArrayCopy(inputs[i], dev_id);
     cpys.push_back(*nd);
     ptrs.push_back(reinterpret_cast<void*>(nd));
     tags.push_back(0);
   }
 
   for (size_t i = 0; i < params.num_outs; ++i) {
-    auto *nd = AllocateNDArrayCopy(outputs[i], dev_id);
+    auto* nd = AllocateNDArrayCopy(outputs[i], dev_id);
     cpys.push_back(*nd);
     ptrs.push_back(reinterpret_cast<void*>(nd));
     tags.push_back(1);
   }
 
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    auto *nd = AllocateNDArrayCopy(inputs[i + params.num_args], dev_id);
+    auto* nd = AllocateNDArrayCopy(inputs[i + params.num_args], dev_id);
     cpys.push_back(*nd);
     ptrs.push_back(reinterpret_cast<void*>(nd));
     tags.push_back(4);
@@ -327,18 +332,26 @@ void ForwardEx(const OpStatePtr& state, const OpContext& ctx,
 
   CustomOperator::Get()->Push(
       [=]() {
-        CHECK(reinterpret_cast<CustomOpFBFunc>(
-            params.info->callbacks[kCustomOpForward])(
-            ptrs.size(), const_cast<void**>(ptrs.data()),
+        CHECK(reinterpret_cast<CustomOpFBFunc>(params.info->callbacks[kCustomOpForward])(
+            ptrs.size(),
+            const_cast<void**>(ptrs.data()),
             const_cast<int*>(tags.data()),
             reinterpret_cast<const int*>(req.data()),
             static_cast<int>(ctx.is_train),
             params.info->contexts[kCustomOpForward]));
       },
-      ctx, false, ctx.is_train, cpys, tags, output_tags, outputs, params.op_type);
+      ctx,
+      false,
+      ctx.is_train,
+      cpys,
+      tags,
+      output_tags,
+      outputs,
+      params.op_type);
 }
 
-void BackwardEx(const OpStatePtr& state, const OpContext& ctx,
+void BackwardEx(const OpStatePtr& state,
+                const OpContext& ctx,
                 const std::vector<NDArray>& inputs,
                 const std::vector<OpReqType>& req,
                 const std::vector<NDArray>& outputs) {
@@ -363,27 +376,29 @@ void BackwardEx(const OpStatePtr& state, const OpContext& ctx,
   std::unordered_set<int> input_tags({3, 0, 1, 4});
   std::unordered_set<int> output_tags({2});
 
-  for (size_t i = 0; i < params.num_outs; ++i) tags.push_back(3);
-  for (size_t i = 0; i < params.num_args; ++i) tags.push_back(0);
-  for (size_t i = 0; i < params.num_outs; ++i) tags.push_back(1);
+  for (size_t i = 0; i < params.num_outs; ++i)
+    tags.push_back(3);
+  for (size_t i = 0; i < params.num_args; ++i)
+    tags.push_back(0);
+  for (size_t i = 0; i < params.num_outs; ++i)
+    tags.push_back(1);
 
   auto dev_id = ctx.run_ctx.ctx.dev_id;
 
-
   for (size_t i = 0; i < params.bwd_idx.size(); ++i) {
-    auto *nd = AllocateNDArrayCopy(inputs[i], dev_id);
+    auto* nd = AllocateNDArrayCopy(inputs[i], dev_id);
     cpys.push_back(*nd);
     ptrs[params.bwd_idx[i]] = reinterpret_cast<void*>(nd);
   }
   for (auto& ptr : ptrs) {
     NDArray* nd;
     if (ptr == nullptr) {
-        nd = new NDArray();
+      nd  = new NDArray();
       ptr = reinterpret_cast<void*>(nd);
     }
   }
   for (auto& output : outputs) {
-    auto *nd = AllocateNDArrayCopy(output, dev_id);
+    auto* nd = AllocateNDArrayCopy(output, dev_id);
     cpys.push_back(*nd);
     ptrs.push_back(reinterpret_cast<void*>(nd));
     tags.push_back(2);
@@ -391,18 +406,29 @@ void BackwardEx(const OpStatePtr& state, const OpContext& ctx,
 
   for (size_t i = 0; i < params.num_auxs; ++i) {
     size_t idx = inputs.size() - params.num_auxs + i;
-    auto *nd = AllocateNDArrayCopy(inputs[idx], dev_id);
+    auto* nd   = AllocateNDArrayCopy(inputs[idx], dev_id);
     cpys.push_back(*nd);
     ptrs.push_back(reinterpret_cast<void*>(nd));
     tags.push_back(4);
   }
   CustomOperator::Get()->Push(
-    [=]() {
-      CHECK(reinterpret_cast<CustomOpFBFunc>(params.info->callbacks[kCustomOpBackward])(
-        ptrs.size(), const_cast<void**>(ptrs.data()), const_cast<int*>(tags.data()),
-        reinterpret_cast<const int*>(req.data()), static_cast<int>(ctx.is_train),
-        params.info->contexts[kCustomOpBackward]));
-    }, ctx, false, ctx.is_train, cpys, tags, output_tags, outputs, "_backward_" + params.op_type);
+      [=]() {
+        CHECK(reinterpret_cast<CustomOpFBFunc>(params.info->callbacks[kCustomOpBackward])(
+            ptrs.size(),
+            const_cast<void**>(ptrs.data()),
+            const_cast<int*>(tags.data()),
+            reinterpret_cast<const int*>(req.data()),
+            static_cast<int>(ctx.is_train),
+            params.info->contexts[kCustomOpBackward]));
+      },
+      ctx,
+      false,
+      ctx.is_train,
+      cpys,
+      tags,
+      output_tags,
+      outputs,
+      "_backward_" + params.op_type);
 }
 
 // infer storage backward function for custom op which assigns kDefaultStorage for
@@ -425,7 +451,7 @@ inline bool BackwardInferStorageType(const nnvm::NodeAttrs& attrs,
     return true;
   }
 
-  size_t total = 2 * params.num_args + 2 * params.num_outs + params.num_auxs;
+  size_t total         = 2 * params.num_args + 2 * params.num_outs + params.num_auxs;
   size_t bwd_deps_size = params.bwd_idx.size();
   std::vector<int> stypes(bwd_deps_size, -1);
   std::vector<int> tags;
@@ -435,8 +461,7 @@ inline bool BackwardInferStorageType(const nnvm::NodeAttrs& attrs,
   for (size_t i = 0; i < bwd_deps_size; i++) {
     if (params.bwd_idx[i] < static_cast<int>(params.num_outs))
       tags.push_back(3);
-    else if (params.bwd_idx[i] <
-             static_cast<int>(params.num_outs + params.num_args))
+    else if (params.bwd_idx[i] < static_cast<int>(params.num_outs + params.num_args))
       tags.push_back(0);
     else
       tags.push_back(1);
@@ -455,7 +480,9 @@ inline bool BackwardInferStorageType(const nnvm::NodeAttrs& attrs,
 
   CHECK(reinterpret_cast<CustomOpBackwardInferStorageTypeFunc>(
       params.info->callbacks[kCustomOpPropBackwardInferStorageType])(
-      stypes.size(), stypes.data(), tags.data(),
+      stypes.size(),
+      stypes.data(),
+      tags.data(),
       params.info->contexts[kCustomOpPropBackwardInferStorageType]));
 
   for (size_t i = 0; i < bwd_deps_size; ++i) {
@@ -465,8 +492,8 @@ inline bool BackwardInferStorageType(const nnvm::NodeAttrs& attrs,
     STORAGE_TYPE_ASSIGN_CHECK(*oattr, i, stypes[i + bwd_deps_size]);
   }
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    STORAGE_TYPE_ASSIGN_CHECK(*iattr, (i + iattr->size() - params.num_auxs),
-                              stypes[i + params.num_outs + bwd_deps_size]);
+    STORAGE_TYPE_ASSIGN_CHECK(
+        *iattr, (i + iattr->size() - params.num_auxs), stypes[i + params.num_outs + bwd_deps_size]);
   }
 
   DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -475,9 +502,11 @@ inline bool BackwardInferStorageType(const nnvm::NodeAttrs& attrs,
 
 // infer storage function for custom op which assigns kDefaultStorage for
 // all undefined stypes and dispatches on DispatchMode::kFComputeEx.
-inline bool InferStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
+inline bool InferStorageType(const nnvm::NodeAttrs& attrs,
+                             const int dev_mask,
                              DispatchMode* dispatch_mode,
-                             std::vector<int>* iattr, std::vector<int>* oattr) {
+                             std::vector<int>* iattr,
+                             std::vector<int>* oattr) {
   const auto& params = nnvm::get<CustomParam>(attrs.parsed);
 
   if (params.info->num_callbacks <= kCustomOpPropInferStorageType) {
@@ -505,8 +534,7 @@ inline bool InferStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
 
   CHECK(reinterpret_cast<CustomOpInferStorageTypeFunc>(
       params.info->callbacks[kCustomOpPropInferStorageType])(
-      stypes.size(), stypes.data(),
-      params.info->contexts[kCustomOpPropInferStorageType]));
+      stypes.size(), stypes.data(), params.info->contexts[kCustomOpPropInferStorageType]));
 
   for (size_t i = 0; i < params.num_args; ++i) {
     STORAGE_TYPE_ASSIGN_CHECK(*iattr, i, stypes[i]);
@@ -515,8 +543,8 @@ inline bool InferStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
     STORAGE_TYPE_ASSIGN_CHECK(*oattr, i, stypes[params.num_args + i]);
   }
   for (size_t i = 0; i < params.num_auxs; ++i) {
-    STORAGE_TYPE_ASSIGN_CHECK(*iattr, params.num_args + i,
-                              stypes[params.num_args + params.num_outs + i]);
+    STORAGE_TYPE_ASSIGN_CHECK(
+        *iattr, params.num_args + i, stypes[params.num_args + params.num_outs + i]);
   }
 
   DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -524,69 +552,71 @@ inline bool InferStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
 }
 
 NNVM_REGISTER_OP(Custom)
-.add_alias("_npi_Custom")
-.describe(R"code(Apply a custom operator implemented in a frontend language (like Python).
+    .add_alias("_npi_Custom")
+    .describe(R"code(Apply a custom operator implemented in a frontend language (like Python).
 
 Custom operators should override required methods like `forward` and `backward`.
 The custom operator must be registered before it can be used.
 Please check the tutorial here: https://mxnet.incubator.apache.org/api/faq/new_op
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs){
-    const auto& params = nnvm::get<CustomParam>(attrs.parsed);
-    return params.num_args + params.num_auxs;
-  })
-.set_num_outputs([](const NodeAttrs& attrs){
-    const auto& params = nnvm::get<CustomParam>(attrs.parsed);
-    return params.num_outs;
-  })
-.set_attr_parser(AttrParser)
-.set_attr<mxnet::FInferShape>("FInferShape", InferShape)
-.set_attr<nnvm::FInferType>("FInferType", InferType)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-    std::vector<std::string> args = List<kCustomOpPropListArguments>(attrs);
-    std::vector<std::string> auxs = List<kCustomOpPropListAuxiliaryStates>(attrs);
-    args.insert(args.end(), auxs.begin(), auxs.end());
-    return args;
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", List<kCustomOpPropListOutputs>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs", [](const NodeAttrs& attrs) {
-    const auto& params = nnvm::get<CustomParam>(attrs.parsed);
-    std::vector<uint32_t> ret;
-    for (size_t i = 0; i < params.num_auxs; ++i) ret.push_back(i+params.num_args);
-    return ret;
-  })
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-    return ExecType::kAsync;
-  })
-.set_attr<nnvm::FGradient>("FGradient", Gradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateState)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForwardEx)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForwardEx)
-.set_attr<FInferStorageType>("FInferStorageType", InferStorageType)
-.add_argument("data", "NDArray-or-Symbol[]", "Input data for the custom operator.")
-.add_argument("op_type", "string", "Name of the custom operator. "
-              "This is the name that is passed to `mx.operator.register` "
-              "to register the operator.");
-
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const auto& params = nnvm::get<CustomParam>(attrs.parsed);
+      return params.num_args + params.num_auxs;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const auto& params = nnvm::get<CustomParam>(attrs.parsed);
+      return params.num_outs;
+    })
+    .set_attr_parser(AttrParser)
+    .set_attr<mxnet::FInferShape>("FInferShape", InferShape)
+    .set_attr<nnvm::FInferType>("FInferType", InferType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       std::vector<std::string> args =
+                                           List<kCustomOpPropListArguments>(attrs);
+                                       std::vector<std::string> auxs =
+                                           List<kCustomOpPropListAuxiliaryStates>(attrs);
+                                       args.insert(args.end(), auxs.begin(), auxs.end());
+                                       return args;
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames", List<kCustomOpPropListOutputs>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     const auto& params = nnvm::get<CustomParam>(attrs.parsed);
+                                     std::vector<uint32_t> ret;
+                                     for (size_t i = 0; i < params.num_auxs; ++i)
+                                       ret.push_back(i + params.num_args);
+                                     return ret;
+                                   })
+    .set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) { return ExecType::kAsync; })
+    .set_attr<nnvm::FGradient>("FGradient", Gradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateState)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForwardEx)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForwardEx)
+    .set_attr<FInferStorageType>("FInferStorageType", InferStorageType)
+    .add_argument("data", "NDArray-or-Symbol[]", "Input data for the custom operator.")
+    .add_argument("op_type",
+                  "string",
+                  "Name of the custom operator. "
+                  "This is the name that is passed to `mx.operator.register` "
+                  "to register the operator.");
 
 NNVM_REGISTER_OP(_backward_Custom)
-.set_num_inputs([](const NodeAttrs& attrs){
-    const auto& params = nnvm::get<CustomParam>(attrs.parsed);
-    return params.bwd_idx.size() + params.num_auxs;
-  })
-.set_num_outputs([](const NodeAttrs& attrs){
-    const auto& params = nnvm::get<CustomParam>(attrs.parsed);
-    return params.num_args;
-  })
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<bool>("TIsBackward", true)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-    return ExecType::kAsync;
-  })
-.set_attr<FInferStorageType>("FInferStorageType", BackwardInferStorageType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", BackwardEx)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", BackwardEx);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const auto& params = nnvm::get<CustomParam>(attrs.parsed);
+      return params.bwd_idx.size() + params.num_auxs;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const auto& params = nnvm::get<CustomParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<bool>("TIsBackward", true)
+    .set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) { return ExecType::kAsync; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardInferStorageType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", BackwardEx)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", BackwardEx);
 
 }  // namespace custom
 }  // namespace op
diff --git a/src/operator/custom/native_op-inl.h b/src/operator/custom/native_op-inl.h
index 56afef69878a..2c2e3c2798e6 100644
--- a/src/operator/custom/native_op-inl.h
+++ b/src/operator/custom/native_op-inl.h
@@ -22,7 +22,7 @@
  * \file native_op-inl.h
  * \brief
  * \author Junyuan Xie
-*/
+ */
 
 #ifndef MXNET_OPERATOR_CUSTOM_NATIVE_OP_INL_H_
 #define MXNET_OPERATOR_CUSTOM_NATIVE_OP_INL_H_
@@ -41,33 +41,35 @@ namespace mxnet {
 namespace op {
 
 struct NativeOpParam : public dmlc::Parameter<NativeOpParam> {
-  void *info;
+  void* info;
   bool need_top_grad;
 
-  NativeOpInfo *pinfo;
+  NativeOpInfo* pinfo;
   int num_inputs_, num_outputs_;
   DMLC_DECLARE_PARAMETER(NativeOpParam) {
     DMLC_DECLARE_FIELD(info);
-    DMLC_DECLARE_FIELD(need_top_grad).set_default(true)
-    .describe("Whether this layer needs out grad for backward. "
-      "Should be false for loss layers.");
+    DMLC_DECLARE_FIELD(need_top_grad)
+        .set_default(true)
+        .describe(
+            "Whether this layer needs out grad for backward. "
+            "Should be false for loss layers.");
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 class NativeOp : public Operator {
  public:
   explicit NativeOp(NativeOpParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     ptrs.clear();
     ndims.clear();
     shapes.clear();
@@ -75,29 +77,32 @@ class NativeOp : public Operator {
     SyncVec(in_data, "in_data", s, 0);
     SyncVec(out_data, "out_data", s, 1);
     s->Wait();
-    param_.pinfo->forward(ptrs.size(), ptrs.data(), ndims.data(), shapes.data(),
-        tags.data(), param_.pinfo->p_forward);
+    param_.pinfo->forward(ptrs.size(),
+                          ptrs.data(),
+                          ndims.data(),
+                          shapes.data(),
+                          tags.data(),
+                          param_.pinfo->p_forward);
     for (size_t i = 0; i < out_data.size(); ++i) {
       CHECK_NE(req[i], kAddTo) << "NativeOp doesn't support AddTo for output";
       if (req[i] != kNullOp) {
         std::stringstream ss;
         ss << std::string("out_data") << i;
-        Copy(out_data[i].FlatTo2D<xpu, real_t>(s),
-             buffer_map[ss.str()].second, s);
+        Copy(out_data[i].FlatTo2D<xpu, real_t>(s), buffer_map[ss.str()].second, s);
       }
     }
     s->Wait();
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     ptrs.clear();
     ndims.clear();
     shapes.clear();
@@ -109,15 +114,18 @@ class NativeOp : public Operator {
       SyncVec(out_grad, "out_grad", s, 3);
     }
     s->Wait();
-    param_.pinfo->backward(ptrs.size(), ptrs.data(), ndims.data(), shapes.data(),
-        tags.data(), param_.pinfo->p_backward);
+    param_.pinfo->backward(ptrs.size(),
+                           ptrs.data(),
+                           ndims.data(),
+                           shapes.data(),
+                           tags.data(),
+                           param_.pinfo->p_backward);
     for (size_t i = 0; i < in_grad.size(); ++i) {
       CHECK_NE(req[i], kAddTo) << "NativeOp doesn't support AddTo for output";
       if (req[i] != kNullOp) {
         std::stringstream ss;
         ss << std::string("in_grad") << i;
-        Copy(in_grad[i].FlatTo2D<xpu, real_t>(s),
-             buffer_map[ss.str()].second, s);
+        Copy(in_grad[i].FlatTo2D<xpu, real_t>(s), buffer_map[ss.str()].second, s);
       }
     }
     s->Wait();
@@ -132,35 +140,33 @@ class NativeOp : public Operator {
   std::vector<int> tags;
   std::map<std::string, std::pair<mxnet::TShape, mshadow::Tensor<cpu, 2> > > buffer_map;
 
-  virtual void SyncBuffer(const TBlob &tblob,
-                          const std::string &name,
-                          mshadow::Stream<xpu> *stream) {
+  virtual void SyncBuffer(const TBlob& tblob,
+                          const std::string& name,
+                          mshadow::Stream<xpu>* stream) {
     using namespace mshadow;
     std::map<std::string, std::pair<mxnet::TShape, mshadow::Tensor<cpu, 2> > >::iterator buffer =
-      buffer_map.find(name);
+        buffer_map.find(name);
     if (buffer == buffer_map.end() || buffer->second.first != tblob.shape_) {
       if (buffer != buffer_map.end()) {
         FreeSpace<2, real_t>(&(buffer->second.second));
         buffer_map.erase(buffer);
       }
-      buffer_map[name] =
-        std::pair<mxnet::TShape, Tensor<cpu, 2> >(tblob.shape_,
-                                         NewTensor<cpu>(tblob.shape_.FlatTo2D(),
-                                                        0.0f,
-                                                        false));
+      buffer_map[name] = std::pair<mxnet::TShape, Tensor<cpu, 2> >(
+          tblob.shape_, NewTensor<cpu>(tblob.shape_.FlatTo2D(), 0.0f, false));
       buffer = buffer_map.find(name);
     }
     Copy(buffer->second.second, tblob.FlatTo2D<xpu, real_t>(stream), stream);
   }
 
-  virtual void SyncVec(const std::vector<TBlob> &vec,
-                       const std::string &prefix,
-                       mshadow::Stream<xpu> *stream,
+  virtual void SyncVec(const std::vector<TBlob>& vec,
+                       const std::string& prefix,
+                       mshadow::Stream<xpu>* stream,
                        int tag) {
     size_t size = 0;
-    for (const auto& tblob : vec) size += tblob.shape_.ndim();
+    for (const auto& tblob : vec)
+      size += tblob.shape_.ndim();
     shapes_buffer_.resize(size);
-    uint32_t *ptr = shapes_buffer_.data();
+    uint32_t* ptr = shapes_buffer_.data();
     for (size_t i = 0; i < vec.size(); ++i) {
       std::stringstream name;
       name << prefix << i;
@@ -174,14 +180,14 @@ class NativeOp : public Operator {
   }
 };  // NativeOp
 
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(NativeOpParam param);
 
 #if DMLC_USE_CXX11
 class NativeOpProp : public OperatorProperty {
  public:
   std::vector<std::string> ListArguments() const override {
-    char ** args = nullptr;
+    char** args = nullptr;
     param_.pinfo->list_arguments(&args, param_.pinfo->p_list_arguments);
     std::vector<std::string> ret;
     for (int i = 0; args[i] != nullptr; ++i) {
@@ -191,7 +197,7 @@ class NativeOpProp : public OperatorProperty {
   }
 
   std::vector<std::string> ListOutputs() const override {
-    char ** args = nullptr;
+    char** args = nullptr;
     param_.pinfo->list_outputs(&args, param_.pinfo->p_list_outputs);
     std::vector<std::string> ret;
     for (int i = 0; args[i] != nullptr; ++i) {
@@ -211,7 +217,7 @@ class NativeOpProp : public OperatorProperty {
         sscanf(kwarg.second.c_str(), "%p", &param_.pinfo);
       }
     }
-    param_.num_inputs_ = ListArguments().size();
+    param_.num_inputs_  = ListArguments().size();
     param_.num_outputs_ = ListOutputs().size();
   }
 
@@ -219,38 +225,38 @@ class NativeOpProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     std::vector<uint32_t*> shapes;
     std::vector<int> ndims;
     size_t size = 0;
-    for (const auto& s : *in_shape) size += s.ndim();
+    for (const auto& s : *in_shape)
+      size += s.ndim();
     std::vector<uint32_t> shapes_buffer(size);
-    uint32_t *ptr = shapes_buffer.data();
+    uint32_t* ptr = shapes_buffer.data();
     for (const auto& shape : *in_shape) {
       shapes.push_back(ptr);
       ndims.push_back(shape.ndim());
       ptr = nnvm::ShapeTypeCast(shape.begin(), shape.end(), ptr);
     }
-    shapes.resize(param_.num_inputs_+param_.num_outputs_);
-    ndims.resize(param_.num_inputs_+param_.num_outputs_);
-    param_.pinfo->infer_shape(shapes.size(), ndims.data(), shapes.data(),
-          param_.pinfo->p_infer_shape);
+    shapes.resize(param_.num_inputs_ + param_.num_outputs_);
+    ndims.resize(param_.num_inputs_ + param_.num_outputs_);
+    param_.pinfo->infer_shape(
+        shapes.size(), ndims.data(), shapes.data(), param_.pinfo->p_infer_shape);
     for (unsigned i = 0; i < in_shape->size(); ++i) {
-      SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(shapes[i], shapes[i]+ndims[i]));
+      SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(shapes[i], shapes[i] + ndims[i]));
     }
     out_shape->clear();
     for (unsigned i = param_.num_inputs_; i < shapes.size(); ++i) {
-      out_shape->push_back(mxnet::TShape(shapes[i], shapes[i]+ndims[i]));
+      out_shape->push_back(mxnet::TShape(shapes[i], shapes[i] + ndims[i]));
     }
     return true;
   }
 
   OperatorProperty* Copy() const override {
-    NativeOpProp *prop_sym = new NativeOpProp();
-    prop_sym->param_ = this->param_;
+    NativeOpProp* prop_sym = new NativeOpProp();
+    prop_sym->param_       = this->param_;
     return prop_sym;
   }
 
@@ -258,10 +264,9 @@ class NativeOpProp : public OperatorProperty {
     return "_Native";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     std::vector<int> deps;
     if (param_.need_top_grad) {
       deps.insert(deps.end(), out_grad.begin(), out_grad.end());
@@ -272,10 +277,10 @@ class NativeOpProp : public OperatorProperty {
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {};
   }
 
@@ -283,7 +288,7 @@ class NativeOpProp : public OperatorProperty {
 
  private:
   NativeOpParam param_;
-};  // class PythonProp
+};      // class PythonProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/custom/native_op.cc b/src/operator/custom/native_op.cc
index 2b15f8484ad8..5146d8931487 100644
--- a/src/operator/custom/native_op.cc
+++ b/src/operator/custom/native_op.cc
@@ -22,13 +22,13 @@
  * \file native_op.cc
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #include "./native_op-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(NativeOpParam param) {
+template <>
+Operator* CreateOp<cpu>(NativeOpParam param) {
   return new NativeOp<cpu>(param);
 }
 
@@ -39,9 +39,9 @@ Operator* NativeOpProp::CreateOperator(Context ctx) const {
 DMLC_REGISTER_PARAMETER(NativeOpParam);
 
 MXNET_REGISTER_OP_PROPERTY(_Native, NativeOpProp)
-.describe("Stub for implementing an operator implemented in native frontend language.")
-.add_argument("data", "NDArray-or-Symbol[]", "Input data for the custom operator.")
-.add_arguments(NativeOpParam::__FIELDS__());
+    .describe("Stub for implementing an operator implemented in native frontend language.")
+    .add_argument("data", "NDArray-or-Symbol[]", "Input data for the custom operator.")
+    .add_arguments(NativeOpParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/custom/native_op.cu b/src/operator/custom/native_op.cu
index 9363214449bc..c1115370fa94 100644
--- a/src/operator/custom/native_op.cu
+++ b/src/operator/custom/native_op.cu
@@ -22,11 +22,11 @@
  * \file native_op.cu
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #include "./native_op-inl.h"
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(NativeOpParam param) {
   return new NativeOp<gpu>(param);
 }
diff --git a/src/operator/custom/ndarray_op-inl.h b/src/operator/custom/ndarray_op-inl.h
index a1a138ff1c3f..f90c91a288ad 100644
--- a/src/operator/custom/ndarray_op-inl.h
+++ b/src/operator/custom/ndarray_op-inl.h
@@ -22,7 +22,7 @@
  * \file native_op-inl.h
  * \brief
  * \author Junyuan Xie
-*/
+ */
 
 #ifndef MXNET_OPERATOR_CUSTOM_NDARRAY_OP_INL_H_
 #define MXNET_OPERATOR_CUSTOM_NDARRAY_OP_INL_H_
@@ -41,49 +41,49 @@ namespace mxnet {
 namespace op {
 
 struct NDArrayOpParam : public dmlc::Parameter<NDArrayOpParam> {
-  void *info;
+  void* info;
 
-  NDArrayOpInfo *pinfo;
+  NDArrayOpInfo* pinfo;
   int num_inputs_, num_outputs_;
   DMLC_DECLARE_PARAMETER(NDArrayOpParam) {
     DMLC_DECLARE_FIELD(info);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 class NDArrayOp : public Operator {
  public:
   explicit NDArrayOp(NDArrayOpParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args);
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args);
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args);
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args);
 
  private:
   NDArrayOpParam param_;
   Context get_ctx();
 };  // NDArrayOp
 
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(NDArrayOpParam param);
 
 #if DMLC_USE_CXX11
 class NDArrayOpProp : public OperatorProperty {
  public:
   std::vector<std::string> ListArguments() const override {
-    char ** args = nullptr;
+    char** args = nullptr;
     CHECK(param_.pinfo->list_arguments(&args, param_.pinfo->p_list_arguments));
     std::vector<std::string> ret;
     for (int i = 0; args[i] != nullptr; ++i) {
@@ -93,7 +93,7 @@ class NDArrayOpProp : public OperatorProperty {
   }
 
   std::vector<std::string> ListOutputs() const override {
-    char ** args = nullptr;
+    char** args = nullptr;
     CHECK(param_.pinfo->list_outputs(&args, param_.pinfo->p_list_outputs));
     std::vector<std::string> ret;
     for (int i = 0; args[i] != nullptr; ++i) {
@@ -113,7 +113,7 @@ class NDArrayOpProp : public OperatorProperty {
         sscanf(iter->second.c_str(), "%p", &param_.pinfo);
       }
     }
-    param_.num_inputs_ = ListArguments().size();
+    param_.num_inputs_  = ListArguments().size();
     param_.num_outputs_ = ListOutputs().size();
   }
 
@@ -121,38 +121,38 @@ class NDArrayOpProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     std::vector<uint32_t*> shapes;
     std::vector<int> ndims;
     size_t size = 0;
-    for (const auto& s : *in_shape) size += s.ndim();
+    for (const auto& s : *in_shape)
+      size += s.ndim();
     std::vector<uint32_t> shapes_buffer(size);
-    uint32_t *ptr = shapes_buffer.data();
+    uint32_t* ptr = shapes_buffer.data();
     for (const auto& shape : *in_shape) {
       shapes.push_back(ptr);
       ndims.push_back(shape.ndim());
       ptr = nnvm::ShapeTypeCast(shape.begin(), shape.end(), ptr);
     }
-    shapes.resize(param_.num_inputs_+param_.num_outputs_);
-    ndims.resize(param_.num_inputs_+param_.num_outputs_);
-    CHECK(param_.pinfo->infer_shape(shapes.size(), ndims.data(), shapes.data(),
-                                    param_.pinfo->p_infer_shape));
+    shapes.resize(param_.num_inputs_ + param_.num_outputs_);
+    ndims.resize(param_.num_inputs_ + param_.num_outputs_);
+    CHECK(param_.pinfo->infer_shape(
+        shapes.size(), ndims.data(), shapes.data(), param_.pinfo->p_infer_shape));
     for (unsigned i = 0; i < in_shape->size(); ++i) {
-      SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(shapes[i], shapes[i]+ndims[i]));
+      SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape(shapes[i], shapes[i] + ndims[i]));
     }
     out_shape->clear();
     for (unsigned i = param_.num_inputs_; i < shapes.size(); ++i) {
-      out_shape->push_back(mxnet::TShape(shapes[i], shapes[i]+ndims[i]));
+      out_shape->push_back(mxnet::TShape(shapes[i], shapes[i] + ndims[i]));
     }
     return true;
   }
 
   OperatorProperty* Copy() const override {
-    NDArrayOpProp *prop_sym = new NDArrayOpProp();
-    prop_sym->param_ = this->param_;
+    NDArrayOpProp* prop_sym = new NDArrayOpProp();
+    prop_sym->param_        = this->param_;
     return prop_sym;
   }
 
@@ -160,25 +160,27 @@ class NDArrayOpProp : public OperatorProperty {
     return "_NDArray";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     int num_dep;
-    int *rdeps;
-    CHECK(param_.pinfo->declare_backward_dependency(out_grad.data(), in_data.data(),
-                                                    out_data.data(), &num_dep, &rdeps,
+    int* rdeps;
+    CHECK(param_.pinfo->declare_backward_dependency(out_grad.data(),
+                                                    in_data.data(),
+                                                    out_data.data(),
+                                                    &num_dep,
+                                                    &rdeps,
                                                     param_.pinfo->p_declare_backward_dependency));
     std::vector<int> deps;
-    deps.insert(deps.end(), rdeps, rdeps+num_dep);
+    deps.insert(deps.end(), rdeps, rdeps + num_dep);
     return deps;
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {};
   }
 
@@ -190,7 +192,7 @@ class NDArrayOpProp : public OperatorProperty {
 
  private:
   NDArrayOpParam param_;
-};  // class PythonProp
+};      // class PythonProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/custom/ndarray_op.cc b/src/operator/custom/ndarray_op.cc
index a4bb1cf5b4e4..e99ae9352fa3 100644
--- a/src/operator/custom/ndarray_op.cc
+++ b/src/operator/custom/ndarray_op.cc
@@ -22,49 +22,50 @@
  * \file ndarray_op.cc
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #include "./ndarray_op-inl.h"
 #include <mxnet/base.h>
 #include <mxnet/ndarray.h>
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Context NDArrayOp<cpu>::get_ctx() {
   return Context::CPU();
 }
 
-template<>
-Operator *CreateOp<cpu>(NDArrayOpParam param) {
+template <>
+Operator* CreateOp<cpu>(NDArrayOpParam param) {
   return new NDArrayOp<cpu>(param);
 }
 
 #if MXNET_USE_CUDA
-template<>
+template <>
 Context NDArrayOp<gpu>::get_ctx() {
   int dev_id;
   CHECK_EQ(cudaGetDevice(&dev_id), cudaSuccess);
   return Context::GPU(dev_id);
 }
 
-template<>
+template <>
 Operator* CreateOp<gpu>(NDArrayOpParam param) {
   return new NDArrayOp<gpu>(param);
 }
 #endif  // MXNET_USE_CUDA
 
-template<typename xpu>
-void NDArrayOp<xpu>::Forward(const OpContext &ctx,
-                   const std::vector<TBlob> &in_data,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &out_data,
-                   const std::vector<TBlob> &aux_args) {
+template <typename xpu>
+void NDArrayOp<xpu>::Forward(const OpContext& ctx,
+                             const std::vector<TBlob>& in_data,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& out_data,
+                             const std::vector<TBlob>& aux_args) {
   using namespace mshadow;
   Context ndctx = get_ctx();
   std::vector<void*> ptrs;
   std::vector<Engine::VarHandle> ndvar;
   std::vector<int> tags;
-  for (auto& i : req) CHECK_NE(i, kAddTo);
+  for (auto& i : req)
+    CHECK_NE(i, kAddTo);
 
   for (auto& blob : in_data) {
     ptrs.push_back(reinterpret_cast<void*>(new NDArray(blob, ndctx.dev_id)));
@@ -90,23 +91,30 @@ void NDArrayOp<xpu>::Forward(const OpContext &ctx,
       [ndcpy, ctx](RunContext rctx, Engine::CallbackOnComplete on_complete) {
         ctx.async_on_complete();
         on_complete();
-      }, ndctx, ndvar, {}, FnProperty::kNormal, 0, "NDArrayOpForward");
+      },
+      ndctx,
+      ndvar,
+      {},
+      FnProperty::kNormal,
+      0,
+      "NDArrayOpForward");
 }
 
-template<typename xpu>
-void NDArrayOp<xpu>::Backward(const OpContext &ctx,
-                    const std::vector<TBlob> &out_grad,
-                    const std::vector<TBlob> &in_data,
-                    const std::vector<TBlob> &out_data,
-                    const std::vector<OpReqType> &req,
-                    const std::vector<TBlob> &in_grad,
-                    const std::vector<TBlob> &aux_args) {
+template <typename xpu>
+void NDArrayOp<xpu>::Backward(const OpContext& ctx,
+                              const std::vector<TBlob>& out_grad,
+                              const std::vector<TBlob>& in_data,
+                              const std::vector<TBlob>& out_data,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& in_grad,
+                              const std::vector<TBlob>& aux_args) {
   using namespace mshadow;
   Context ndctx = get_ctx();
   std::vector<void*> ptrs;
   std::vector<Engine::VarHandle> ndvar;
   std::vector<int> tags;
-  for (auto& i : req) CHECK_NE(i, kAddTo);
+  for (auto& i : req)
+    CHECK_NE(i, kAddTo);
 
   for (auto& blob : in_data) {
     ptrs.push_back(reinterpret_cast<void*>(new NDArray(blob, ndctx.dev_id)));
@@ -137,10 +145,16 @@ void NDArrayOp<xpu>::Backward(const OpContext &ctx,
 
   CHECK(param_.pinfo->backward(ptrs.size(), ptrs.data(), tags.data(), param_.pinfo->p_backward));
   Engine::Get()->PushAsync(
-      [ndcpy, ctx](RunContext rctx, Engine::CallbackOnComplete on_complete){
+      [ndcpy, ctx](RunContext rctx, Engine::CallbackOnComplete on_complete) {
         ctx.async_on_complete();
         on_complete();
-      }, ndctx, ndvar, {}, FnProperty::kNormal, 0, "NDArrayOpBackward");
+      },
+      ndctx,
+      ndvar,
+      {},
+      FnProperty::kNormal,
+      0,
+      "NDArrayOpBackward");
 }
 
 Operator* NDArrayOpProp::CreateOperator(Context ctx) const {
@@ -150,9 +164,10 @@ Operator* NDArrayOpProp::CreateOperator(Context ctx) const {
 DMLC_REGISTER_PARAMETER(NDArrayOpParam);
 
 MXNET_REGISTER_OP_PROPERTY(_NDArray, NDArrayOpProp)
-.describe("Stub for implementing an operator implemented in native frontend language with ndarray.")
-.add_argument("data", "NDArray-or-Symbol[]", "Input data for the custom operator.")
-.add_arguments(NDArrayOpParam::__FIELDS__());
+    .describe(
+        "Stub for implementing an operator implemented in native frontend language with ndarray.")
+    .add_argument("data", "NDArray-or-Symbol[]", "Input data for the custom operator.")
+    .add_arguments(NDArrayOpParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/deformable_convolution-inl.h b/src/operator/deformable_convolution-inl.h
index 6d2f8b0eb001..7782a8bdd2bd 100644
--- a/src/operator/deformable_convolution-inl.h
+++ b/src/operator/deformable_convolution-inl.h
@@ -25,7 +25,7 @@
  * \ref: https://github.com/Yangqing/caffe/wiki/Convolution-in-Caffe:-a-memo
  * \ref: https://arxiv.org/abs/1703.06211
  * \author Yuwen Xiong, Haozhi Qi, Jifeng Dai
-*/
+ */
 #ifndef MXNET_OPERATOR_DEFORMABLE_CONVOLUTION_INL_H_
 #define MXNET_OPERATOR_DEFORMABLE_CONVOLUTION_INL_H_
 
@@ -46,15 +46,14 @@
 #include "./contrib/nn/deformable_im2col.h"
 #include "./linalg.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace conv {
-  enum DeformableConvolutionOpInputs { kData, kOffset, kWeight, kBias };
-  enum DeformableConvolutionOpOutputs { kOut };
-  enum DeformableConvolutionOpResource { kTempSpace };
-}
+enum DeformableConvolutionOpInputs { kData, kOffset, kWeight, kBias };
+enum DeformableConvolutionOpOutputs { kOut };
+enum DeformableConvolutionOpResource { kTempSpace };
+}  // namespace conv
 
 struct DeformableConvolutionParam : public dmlc::Parameter<DeformableConvolutionParam> {
   mxnet::TShape kernel;
@@ -69,63 +68,65 @@ struct DeformableConvolutionParam : public dmlc::Parameter<DeformableConvolution
   dmlc::optional<int> layout;
   DMLC_DECLARE_PARAMETER(DeformableConvolutionParam) {
     DMLC_DECLARE_FIELD(kernel).describe("Convolution kernel size: (h, w) or (d, h, w)");
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, -1))
-      .describe("Convolution stride: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(dilate).set_default(mxnet::TShape(0, -1))
-      .describe("Convolution dilate: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, -1))
-      .describe("Zero pad for convolution: (h, w) or (d, h, w). Defaults to no padding.");
-    DMLC_DECLARE_FIELD(num_filter).set_lower_bound(1)
-      .describe("Convolution filter(channel) number");
-    DMLC_DECLARE_FIELD(num_group).set_default(1)
-      .describe("Number of group partitions.");
-    DMLC_DECLARE_FIELD(num_deformable_group).set_default(1)
-      .describe("Number of deformable group partitions.");
-    DMLC_DECLARE_FIELD(workspace).set_default(1024).set_lower_bound(0)
-      .describe("Maximum temperal workspace allowed for convolution (MB).");
-    DMLC_DECLARE_FIELD(no_bias).set_default(false)
-      .describe("Whether to disable bias parameter.");
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Convolution stride: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(dilate)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Convolution dilate: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Zero pad for convolution: (h, w) or (d, h, w). Defaults to no padding.");
+    DMLC_DECLARE_FIELD(num_filter)
+        .set_lower_bound(1)
+        .describe("Convolution filter(channel) number");
+    DMLC_DECLARE_FIELD(num_group).set_default(1).describe("Number of group partitions.");
+    DMLC_DECLARE_FIELD(num_deformable_group)
+        .set_default(1)
+        .describe("Number of deformable group partitions.");
+    DMLC_DECLARE_FIELD(workspace).set_default(1024).set_lower_bound(0).describe(
+        "Maximum temperal workspace allowed for convolution (MB).");
+    DMLC_DECLARE_FIELD(no_bias).set_default(false).describe("Whether to disable bias parameter.");
     DMLC_DECLARE_FIELD(layout)
-      .add_enum("NCW", mshadow::kNCW)
-      .add_enum("NCHW", mshadow::kNCHW)
-      .add_enum("NCDHW", mshadow::kNCDHW)
-      .set_default(dmlc::optional<int>())
-      .describe("Set layout for input, output and weight. Empty for\n    "
-        "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d.");
+        .add_enum("NCW", mshadow::kNCW)
+        .add_enum("NCHW", mshadow::kNCHW)
+        .add_enum("NCDHW", mshadow::kNCDHW)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Set layout for input, output and weight. Empty for\n    "
+            "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d.");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class DeformableConvolutionOp : public Operator {
  public:
   explicit DeformableConvolutionOp(DeformableConvolutionParam p) {
     this->param_ = p;
     // convert MBytes first to Bytes and then to elements.
     param_.workspace = (param_.workspace << 20) / sizeof(DType);
-    CHECK(param_.layout.value() == mshadow::kNCW ||
-      param_.layout.value() == mshadow::kNCHW ||
-      param_.layout.value() == mshadow::kNCDHW)
-      << "Only support NCW, NCHW and NCDHW layout";
+    CHECK(param_.layout.value() == mshadow::kNCW || param_.layout.value() == mshadow::kNCHW ||
+          param_.layout.value() == mshadow::kNCDHW)
+        << "Only support NCW, NCHW and NCDHW layout";
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(req[conv::kOut], kWriteTo);
     size_t expected = param_.no_bias ? 3 : 4;
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(out_data.size(), 1U);
-    LayerSetUp(in_data[conv::kData].shape_,
-               in_data[conv::kOffset].shape_,
-               out_data[conv::kOut].shape_);
+    LayerSetUp(
+        in_data[conv::kData].shape_, in_data[conv::kOffset].shape_, out_data[conv::kOut].shape_);
     Stream<xpu>* s = ctx.get_stream<xpu>();
     // allocate workspace for col_buffer
-    Tensor<xpu, 1, DType> workspace = ctx.requested[conv::kTempSpace]
-      .get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_), s);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[conv::kTempSpace].get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_), s);
     // calculate the shape of col_buffer
     mxnet::TShape col_buffer_shape(num_spatial_axes_ + 1, -1);
     col_buffer_shape[0] = conv_in_channels_ * param_.kernel.Size();
@@ -139,19 +140,25 @@ class DeformableConvolutionOp : public Operator {
     index_t M = conv_out_channels_ / group_;
     index_t N = conv_out_spatial_dim_;
     index_t K = kernel_dim_;
-    Tensor<xpu, 3, DType> weight_3d = in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, M, K), s);
-    Tensor<xpu, 3, DType> col_buffer_3d = col_buffer.get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, N), s);
-    Tensor<xpu, 4, DType> output_4d = out_data[conv::kOut].get_with_shape<xpu, 4, DType>(
-      Shape4(num_, group_, M, N), s);
+    Tensor<xpu, 3, DType> weight_3d =
+        in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, M, K), s);
+    Tensor<xpu, 3, DType> col_buffer_3d =
+        col_buffer.get_with_shape<xpu, 3, DType>(Shape3(group_, K, N), s);
+    Tensor<xpu, 4, DType> output_4d =
+        out_data[conv::kOut].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, M, N), s);
     for (index_t n = 0; n < num_; ++n) {
       // transform image to col_buffer in order to use gemm
-      deformable_im2col(s, in_data[conv::kData].dptr<DType>() + n * input_dim_,
+      deformable_im2col(s,
+                        in_data[conv::kData].dptr<DType>() + n * input_dim_,
                         in_data[conv::kOffset].dptr<DType>() + n * input_offset_dim_,
-                        in_data[conv::kData].shape_, col_buffer.shape_,
-                        param_.kernel, param_.pad, param_.stride, param_.dilate,
-                        param_.num_deformable_group, col_buffer.dptr<DType>());
+                        in_data[conv::kData].shape_,
+                        col_buffer.shape_,
+                        param_.kernel,
+                        param_.pad,
+                        param_.stride,
+                        param_.dilate,
+                        param_.num_deformable_group,
+                        col_buffer.dptr<DType>());
       Tensor<xpu, 3, DType> output_3d = output_4d[n];
       for (index_t g = 0; g < group_; ++g) {
         // Legacy approach shown here for comparison:
@@ -160,15 +167,15 @@ class DeformableConvolutionOp : public Operator {
       }
     }
     if (bias_term_) {
-      Tensor<xpu, 1, DType> bias = in_data[conv::kBias].get<xpu, 1, DType>(s);
+      Tensor<xpu, 1, DType> bias      = in_data[conv::kBias].get<xpu, 1, DType>(s);
       Tensor<xpu, 3, DType> output_3d = out_data[conv::kOut].get_with_shape<xpu, 3, DType>(
-        Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
+          Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
       // has bias term, broadcast it to the same shape of output_3d in channel dim
       output_3d += mshadow::expr::broadcast<1>(bias, output_3d.shape_);
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
+  virtual void Backward(const OpContext& ctx,
                         const std::vector<TBlob>& out_grad,
                         const std::vector<TBlob>& in_data,
                         const std::vector<TBlob>& out_data,
@@ -182,13 +189,12 @@ class DeformableConvolutionOp : public Operator {
     CHECK(in_data.size() == expected && in_grad.size() == expected);
     CHECK_EQ(req.size(), expected);
     CHECK_EQ(in_data[conv::kWeight].CheckContiguous(), true);
-    LayerSetUp(in_grad[conv::kData].shape_,
-               in_grad[conv::kOffset].shape_,
-               out_grad[conv::kOut].shape_);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    LayerSetUp(
+        in_grad[conv::kData].shape_, in_grad[conv::kOffset].shape_, out_grad[conv::kOut].shape_);
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // allocate workspace for col_buffer
-    Tensor<xpu, 1, DType> workspace = ctx.requested[conv::kTempSpace]
-      .get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_), s);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[conv::kTempSpace].get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_), s);
     // calculate the shape of col_buffer
     mxnet::TShape col_buffer_shape(num_spatial_axes_ + 1, -1);
     col_buffer_shape[0] = conv_in_channels_ * param_.kernel.Size();
@@ -203,19 +209,18 @@ class DeformableConvolutionOp : public Operator {
     index_t M = kernel_dim_;
     index_t N = conv_out_spatial_dim_;
     index_t K = conv_out_channels_ / group_;
-    Tensor<xpu, 3, DType> weight_3d = in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, M), s);
-    Tensor<xpu, 4, DType> out_grad_4d = out_grad[conv::kOut].get_with_shape<xpu, 4, DType>(
-      Shape4(num_, group_, K, N), s);
-    Tensor<xpu, 3, DType> col_buffer_3d = col_buffer.get_with_shape<xpu, 3, DType>(
-      Shape3(group_, M, N), s);
+    Tensor<xpu, 3, DType> weight_3d =
+        in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, K, M), s);
+    Tensor<xpu, 4, DType> out_grad_4d =
+        out_grad[conv::kOut].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, K, N), s);
+    Tensor<xpu, 3, DType> col_buffer_3d =
+        col_buffer.get_with_shape<xpu, 3, DType>(Shape3(group_, M, N), s);
     // For computing dLoss/dWeight
-    Tensor<xpu, 3, DType> dweight_3d = in_grad[conv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, M), s);
+    Tensor<xpu, 3, DType> dweight_3d =
+        in_grad[conv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, K, M), s);
 
     Tensor<xpu, 1, DType> data_grad = in_grad[conv::kData].FlatTo1D<xpu, DType>(s);
-    data_grad = 0;
-
+    data_grad                       = 0;
 
     for (index_t n = 0; n < num_; ++n) {
       Tensor<xpu, 3, DType> out_grad_3d = out_grad_4d[n];
@@ -226,28 +231,44 @@ class DeformableConvolutionOp : public Operator {
       }
 
       // gradient w.r.t. input coordinate data
-      deformable_col2im_coord(s, col_buffer.dptr<DType>(),
+      deformable_col2im_coord(s,
+                              col_buffer.dptr<DType>(),
                               in_data[conv::kData].dptr<DType>() + n * input_dim_,
                               in_data[conv::kOffset].dptr<DType>() + n * input_offset_dim_,
-                              in_grad[conv::kData].shape_, col_buffer.shape_,
-                              param_.kernel, param_.pad, param_.stride,
-                              param_.dilate, param_.num_deformable_group,
+                              in_grad[conv::kData].shape_,
+                              col_buffer.shape_,
+                              param_.kernel,
+                              param_.pad,
+                              param_.stride,
+                              param_.dilate,
+                              param_.num_deformable_group,
                               in_grad[conv::kOffset].dptr<DType>() + n * input_offset_dim_);
 
       // gradient w.r.t. input data
-      deformable_col2im(s, col_buffer.dptr<DType>(),
+      deformable_col2im(s,
+                        col_buffer.dptr<DType>(),
                         in_data[conv::kOffset].dptr<DType>() + n * input_offset_dim_,
-                        in_grad[conv::kData].shape_, col_buffer.shape_,
-                        param_.kernel, param_.pad, param_.stride,
-                        param_.dilate, param_.num_deformable_group,
+                        in_grad[conv::kData].shape_,
+                        col_buffer.shape_,
+                        param_.kernel,
+                        param_.pad,
+                        param_.stride,
+                        param_.dilate,
+                        param_.num_deformable_group,
                         in_grad[conv::kData].dptr<DType>() + n * input_dim_);
 
       // gradient w.r.t. weight, dWeight should accumulate across the batch and group
-      deformable_im2col(s, in_data[conv::kData].dptr<DType>() + n * input_dim_,
+      deformable_im2col(s,
+                        in_data[conv::kData].dptr<DType>() + n * input_dim_,
                         in_data[conv::kOffset].dptr<DType>() + n * input_offset_dim_,
-                        in_data[conv::kData].shape_, col_buffer.shape_, param_.kernel,
-                        param_.pad, param_.stride, param_.dilate,
-                        param_.num_deformable_group, col_buffer.dptr<DType>());
+                        in_data[conv::kData].shape_,
+                        col_buffer.shape_,
+                        param_.kernel,
+                        param_.pad,
+                        param_.stride,
+                        param_.dilate,
+                        param_.num_deformable_group,
+                        col_buffer.dptr<DType>());
 
       for (index_t g = 0; g < group_; ++g) {
         auto request = (n == 0) ? req[conv::kWeight] : kAddTo;
@@ -260,8 +281,8 @@ class DeformableConvolutionOp : public Operator {
     // gradient w.r.t bias
     if (bias_term_) {
       Tensor<xpu, 1, DType> dbias = in_grad[conv::kBias].get<xpu, 1, DType>(s);
-      Tensor<xpu, 3, DType> dout = out_grad[conv::kOut].get_with_shape<xpu, 3, DType>(
-        Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
+      Tensor<xpu, 3, DType> dout  = out_grad[conv::kOut].get_with_shape<xpu, 3, DType>(
+          Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
       ASSIGN_DISPATCH(dbias, req[conv::kBias], sumall_except_dim<1>(dout));
     }
   }
@@ -270,51 +291,52 @@ class DeformableConvolutionOp : public Operator {
   void LayerSetUp(const mxnet::TShape& ishape,
                   const mxnet::TShape& offset_shape,
                   const mxnet::TShape& oshape) {
-    channel_axis_ = 1;  // hard code channel axis
+    channel_axis_                    = 1;  // hard code channel axis
     const index_t first_spatial_axis = channel_axis_ + 1;
-    const index_t num_axes = param_.kernel.ndim() + 2;
-    num_spatial_axes_ = num_axes - first_spatial_axis;
-    is_1x1_ = true;
+    const index_t num_axes           = param_.kernel.ndim() + 2;
+    num_spatial_axes_                = num_axes - first_spatial_axis;
+    is_1x1_                          = true;
     for (index_t i = 0; i < param_.kernel.ndim(); ++i) {
       is_1x1_ &= param_.kernel[i] == 1 && param_.stride[i] == 1 && param_.pad[i] == 0;
-      if (!is_1x1_) break;
+      if (!is_1x1_)
+        break;
     }
 
     // batch size
     num_ = ishape[0];
     // number of input channels
-    channels_ = ishape[1];
-    group_ = param_.num_group;
-    conv_out_channels_ = param_.num_filter;
-    conv_in_channels_ = channels_;
-    bias_term_ = !param_.no_bias;
-    kernel_dim_ = conv_in_channels_ / group_ * param_.kernel.Size();
-    weight_offset_ = conv_out_channels_ * kernel_dim_ / group_;
+    channels_             = ishape[1];
+    group_                = param_.num_group;
+    conv_out_channels_    = param_.num_filter;
+    conv_in_channels_     = channels_;
+    bias_term_            = !param_.no_bias;
+    kernel_dim_           = conv_in_channels_ / group_ * param_.kernel.Size();
+    weight_offset_        = conv_out_channels_ * kernel_dim_ / group_;
     conv_out_spatial_dim_ = oshape.ProdShape(2, oshape.ndim());
-    col_offset_ = kernel_dim_ * conv_out_spatial_dim_;
-    output_offset_ = conv_out_channels_ * conv_out_spatial_dim_ / group_;
+    col_offset_           = kernel_dim_ * conv_out_spatial_dim_;
+    output_offset_        = conv_out_channels_ * conv_out_spatial_dim_ / group_;
     // size of the column buffer used for storing im2col-ed pixels
     col_buffer_size_ = kernel_dim_ * group_ * conv_out_spatial_dim_;
     // input/output image size (#channels * height * width)
-    input_dim_ = ishape.ProdShape(1, ishape.ndim());
-    input_offset_dim_ = offset_shape.ProdShape(1, offset_shape.ndim());
-    output_dim_ = oshape.ProdShape(1, oshape.ndim());
+    input_dim_          = ishape.ProdShape(1, ishape.ndim());
+    input_offset_dim_   = offset_shape.ProdShape(1, offset_shape.ndim());
+    output_dim_         = oshape.ProdShape(1, oshape.ndim());
     num_kernels_im2col_ = conv_in_channels_ * conv_out_spatial_dim_;
     num_kernels_col2im_ = input_dim_;
   }
 
  private:
   DeformableConvolutionParam param_;
-  index_t channel_axis_;  // channel axis of the input
-  index_t channels_;  // number of channels of input image
-  index_t num_spatial_axes_;  // number of spatial axes
-  index_t num_;  // batch size
-  index_t group_;  // number of groups
-  index_t conv_out_channels_;  // number of output channels (num_filter)
+  index_t channel_axis_;          // channel axis of the input
+  index_t channels_;              // number of channels of input image
+  index_t num_spatial_axes_;      // number of spatial axes
+  index_t num_;                   // batch size
+  index_t group_;                 // number of groups
+  index_t conv_out_channels_;     // number of output channels (num_filter)
   index_t conv_out_spatial_dim_;  // number of pixels of output images per channel
-  index_t conv_in_channels_;  // number of input channels
-  index_t kernel_dim_;  // number of input channels per group * kernel size
-  index_t weight_offset_;  // number of output channels per group * kernel_dim_
+  index_t conv_in_channels_;      // number of input channels
+  index_t kernel_dim_;            // number of input channels per group * kernel size
+  index_t weight_offset_;         // number of output channels per group * kernel_dim_
   index_t col_offset_;
   index_t output_offset_;
   index_t col_buffer_size_;
@@ -327,10 +349,11 @@ class DeformableConvolutionOp : public Operator {
   bool is_1x1_;
 };  // class ConvolutionOp
 
-template<typename xpu>
-Operator* CreateOp(DeformableConvolutionParam param, int dtype,
-                   mxnet::ShapeVector *in_shape,
-                   mxnet::ShapeVector *out_shape,
+template <typename xpu>
+Operator* CreateOp(DeformableConvolutionParam param,
+                   int dtype,
+                   mxnet::ShapeVector* in_shape,
+                   mxnet::ShapeVector* out_shape,
                    Context ctx);
 
 #if DMLC_USE_CXX11
@@ -338,9 +361,9 @@ class DeformableConvolutionProp : public OperatorProperty {
  public:
   std::vector<std::string> ListArguments() const override {
     if (!param_.no_bias) {
-      return{ "data", "offset", "weight", "bias" };
+      return {"data", "offset", "weight", "bias"};
     } else {
-      return{ "data", "offset", "weight" };
+      return {"data", "offset", "weight"};
     }
   }
 
@@ -349,9 +372,12 @@ class DeformableConvolutionProp : public OperatorProperty {
     param_.Init(kwargs);
     if (param_.kernel.ndim() == 2) {
       param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCHW;
-      if (param_.stride.ndim() == 0) param_.stride = Shape2(1, 1);
-      if (param_.dilate.ndim() == 0) param_.dilate = Shape2(1, 1);
-      if (param_.pad.ndim() == 0) param_.pad = Shape2(0, 0);
+      if (param_.stride.ndim() == 0)
+        param_.stride = Shape2(1, 1);
+      if (param_.dilate.ndim() == 0)
+        param_.dilate = Shape2(1, 1);
+      if (param_.pad.ndim() == 0)
+        param_.pad = Shape2(0, 0);
     } else {
       LOG(FATAL) << "not implemented";
     }
@@ -361,9 +387,9 @@ class DeformableConvolutionProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     if (!param_.no_bias) {
       CHECK_EQ(in_shape->size(), 4U) << "Input:[data, offset, weight, bias]";
@@ -371,20 +397,21 @@ class DeformableConvolutionProp : public OperatorProperty {
       CHECK_EQ(in_shape->size(), 3U) << "Input:[data, offset, weight]";
     }
     out_shape->resize(1, mxnet::TShape());
-    const mxnet::TShape &dshp = (*in_shape)[conv::kData];
-    const mxnet::TShape &oshp = (*in_shape)[conv::kOffset];
-    if (mxnet::op::shape_is_none(dshp)) return false;
+    const mxnet::TShape& dshp = (*in_shape)[conv::kData];
+    const mxnet::TShape& oshp = (*in_shape)[conv::kOffset];
+    if (mxnet::op::shape_is_none(dshp))
+      return false;
     if (param_.kernel.ndim() == 2) {
       // 2d conv
-      CHECK_EQ(dshp.ndim(), 4U) \
-        << "Input data should be 4D in batch-num_filter-y-x";
-      CHECK_EQ(oshp.ndim(), 4U) \
-        << "Input offset should be 4D in batch-num_filter-y-x";
-      Shape<4> dshape = ConvertLayout(dshp.get<4>(), param_.layout.value(), kNCHW);
+      CHECK_EQ(dshp.ndim(), 4U) << "Input data should be 4D in batch-num_filter-y-x";
+      CHECK_EQ(oshp.ndim(), 4U) << "Input offset should be 4D in batch-num_filter-y-x";
+      Shape<4> dshape      = ConvertLayout(dshp.get<4>(), param_.layout.value(), kNCHW);
       Shape<4> offsetshape = ConvertLayout(oshp.get<4>(), param_.layout.value(), kNCHW);
-      Shape<4> wshape = Shape4(param_.num_filter / param_.num_group, dshape[1] / param_.num_group,
-        param_.kernel[0], param_.kernel[1]);
-      wshape = ConvertLayout(wshape, kNCHW, param_.layout.value());
+      Shape<4> wshape      = Shape4(param_.num_filter / param_.num_group,
+                               dshape[1] / param_.num_group,
+                               param_.kernel[0],
+                               param_.kernel[1]);
+      wshape               = ConvertLayout(wshape, kNCHW, param_.layout.value());
       wshape[0] *= param_.num_group;
       SHAPE_ASSIGN_CHECK(*in_shape, conv::kWeight, wshape);
       if (!param_.no_bias) {
@@ -393,39 +420,35 @@ class DeformableConvolutionProp : public OperatorProperty {
 
       const index_t ksize_y = static_cast<index_t>(param_.kernel[0]);
       const index_t ksize_x = static_cast<index_t>(param_.kernel[1]);
-      CHECK_EQ(dshape[1] % param_.num_group, 0U) \
-        << "input num_filter must divide group size";
-      CHECK_EQ(dshape[1] % param_.num_deformable_group, 0U) \
-        << "input num_filter must divide deformable group size";
-      CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-        << "output num_filter must divide group size";
-      CHECK_GT(param_.kernel.Size(), 0U) \
-        << "incorrect kernel size: " << param_.kernel;
-      CHECK_GT(param_.stride.Size(), 0U) \
-        << "incorrect stride size: " << param_.stride;
-      CHECK_GT(param_.dilate.Size(), 0U) \
-        << "incorrect dilate size: " << param_.dilate;
+      CHECK_EQ(dshape[1] % param_.num_group, 0U) << "input num_filter must divide group size";
+      CHECK_EQ(dshape[1] % param_.num_deformable_group, 0U)
+          << "input num_filter must divide deformable group size";
+      CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+          << "output num_filter must divide group size";
+      CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+      CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+      CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
       Shape<4> oshape;
       oshape[0] = dshape[0];
       oshape[1] = param_.num_filter;
-      oshape[2] = (dshape[2] + 2 * param_.pad[0] -
-        (param_.dilate[0] * (ksize_y - 1) + 1)) / param_.stride[0] + 1;
-      oshape[3] = (dshape[3] + 2 * param_.pad[1] -
-        (param_.dilate[1] * (ksize_x - 1) + 1)) / param_.stride[1] + 1;
+      oshape[2] = (dshape[2] + 2 * param_.pad[0] - (param_.dilate[0] * (ksize_y - 1) + 1)) /
+                      param_.stride[0] +
+                  1;
+      oshape[3] = (dshape[3] + 2 * param_.pad[1] - (param_.dilate[1] * (ksize_x - 1) + 1)) /
+                      param_.stride[1] +
+                  1;
       SHAPE_ASSIGN_CHECK(*out_shape, 0, ConvertLayout(oshape, kNCHW, param_.layout.value()));
-      CHECK_EQ(oshape[2], offsetshape[2]) \
-        << "output height must equal to offset map height";
-      CHECK_EQ(oshape[3], offsetshape[3]) \
-        << "output width must equal to offset map width";
-      CHECK_EQ(offsetshape[1] % (param_.kernel[0] * param_.kernel[1]), 0U) \
-        << "offset filter must divide deformable group size";
-      CHECK_EQ(offsetshape[1] / (2 * param_.kernel[0] * param_.kernel[1]), \
-               param_.num_deformable_group) \
-        << "offset filter must divide deformable group size";
+      CHECK_EQ(oshape[2], offsetshape[2]) << "output height must equal to offset map height";
+      CHECK_EQ(oshape[3], offsetshape[3]) << "output width must equal to offset map width";
+      CHECK_EQ(offsetshape[1] % (param_.kernel[0] * param_.kernel[1]), 0U)
+          << "offset filter must divide deformable group size";
+      CHECK_EQ(offsetshape[1] / (2 * param_.kernel[0] * param_.kernel[1]),
+               param_.num_deformable_group)
+          << "offset filter must divide deformable group size";
       // Perform incomplete shape inference. Fill in the missing values in data shape.
       // 1) We can always fill in the batch_size.
       // 2) We can back-calculate the input height/width if the corresponding stride is 1.
-      oshape = ConvertLayout((*out_shape)[0].get<4>(), param_.layout.value(), kNCHW);
+      oshape    = ConvertLayout((*out_shape)[0].get<4>(), param_.layout.value(), kNCHW);
       dshape[0] = oshape[0];
       if (param_.stride[0] == 1) {
         dshape[2] = oshape[2] + param_.dilate[0] * (ksize_y - 1) - 2 * param_.pad[0];
@@ -433,8 +456,8 @@ class DeformableConvolutionProp : public OperatorProperty {
       if (param_.stride[1] == 1) {
         dshape[3] = oshape[3] + param_.dilate[1] * (ksize_x - 1) - 2 * param_.pad[1];
       }
-      SHAPE_ASSIGN_CHECK(*in_shape, conv::kData,
-        ConvertLayout(dshape, kNCHW, param_.layout.value()));
+      SHAPE_ASSIGN_CHECK(
+          *in_shape, conv::kData, ConvertLayout(dshape, kNCHW, param_.layout.value()));
       // Check whether the kernel sizes are valid
       if (dshape[2] != 0) {
         CHECK_LE(ksize_y, dshape[2] + 2 * param_.pad[0]) << "kernel size exceed input";
@@ -449,9 +472,9 @@ class DeformableConvolutionProp : public OperatorProperty {
     }
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -468,7 +491,7 @@ class DeformableConvolutionProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new DeformableConvolutionProp();
+    auto ptr    = new DeformableConvolutionProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -477,21 +500,19 @@ class DeformableConvolutionProp : public OperatorProperty {
     return "_npx_deformable_convolution";
   }
 
-  std::vector<int> DeclareBackwardDependency(const std::vector<int> &out_grad,
-                                             const std::vector<int> &in_data,
-                                             const std::vector<int> &out_data) const override {
-    return{ out_grad[conv::kOut], in_data[conv::kData],
-            in_data[conv::kOffset], in_data[conv::kWeight] };
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
+    return {
+        out_grad[conv::kOut], in_data[conv::kData], in_data[conv::kOffset], in_data[conv::kWeight]};
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-    const mxnet::ShapeVector &in_shape) const override {
-    return{ ResourceRequest::kTempSpace };
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
+    return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-    const mxnet::ShapeVector &in_shape) const override {
-    return{ ResourceRequest::kTempSpace };
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
+    return {ResourceRequest::kTempSpace};
   }
 
   Operator* CreateOperator(Context ctx) const override {
@@ -499,12 +520,13 @@ class DeformableConvolutionProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   DeformableConvolutionParam param_;
-};  // class ConvolutionProp
+};      // class ConvolutionProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/deformable_convolution.cc b/src/operator/deformable_convolution.cc
index ad0d0b50a0ad..777cdbc4de2d 100644
--- a/src/operator/deformable_convolution.cc
+++ b/src/operator/deformable_convolution.cc
@@ -23,7 +23,7 @@
  * \file deformable_convolution.cc
  * \brief
  * \author Yuwen Xiong, Haozhi Qi, Jifeng Dai
-*/
+ */
 
 #include "./deformable_convolution-inl.h"
 
@@ -31,22 +31,21 @@ namespace mxnet {
 namespace op {
 DMLC_REGISTER_PARAMETER(DeformableConvolutionParam);
 
-template<>
-Operator* CreateOp<cpu>(DeformableConvolutionParam param, int dtype,
-                        mxnet::ShapeVector *in_shape,
-                        mxnet::ShapeVector *out_shape,
+template <>
+Operator* CreateOp<cpu>(DeformableConvolutionParam param,
+                        int dtype,
+                        mxnet::ShapeVector* in_shape,
+                        mxnet::ShapeVector* out_shape,
                         Context ctx) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new DeformableConvolutionOp<cpu, DType>(param);
-  })
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new DeformableConvolutionOp<cpu, DType>(param); })
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *DeformableConvolutionProp::CreateOperatorEx(Context ctx,
-                                            mxnet::ShapeVector *in_shape,
-                                            std::vector<int> *in_type) const {
+Operator* DeformableConvolutionProp::CreateOperatorEx(Context ctx,
+                                                      mxnet::ShapeVector* in_shape,
+                                                      std::vector<int>* in_type) const {
   mxnet::ShapeVector out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferType(in_type, &out_type, &aux_type));
@@ -55,7 +54,7 @@ Operator *DeformableConvolutionProp::CreateOperatorEx(Context ctx,
 }
 
 MXNET_REGISTER_OP_PROPERTY(_npx_deformable_convolution, DeformableConvolutionProp)
-.describe(R"code(Compute 2-D deformable convolution on 4-D input.
+    .describe(R"code(Compute 2-D deformable convolution on 4-D input.
 
 The deformable convolution operation is described in https://arxiv.org/abs/1703.06211
 
@@ -98,11 +97,11 @@ Both ``weight`` and ``bias`` are learnable parameters.
 
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the DeformableConvolutionOp.")
-.add_argument("offset", "NDArray-or-Symbol", "Input offset to the DeformableConvolutionOp.")
-.add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
-.add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
-.add_arguments(DeformableConvolutionParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the DeformableConvolutionOp.")
+    .add_argument("offset", "NDArray-or-Symbol", "Input offset to the DeformableConvolutionOp.")
+    .add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
+    .add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
+    .add_arguments(DeformableConvolutionParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/deformable_convolution.cu b/src/operator/deformable_convolution.cu
index cf13bfabd6a1..3846f89ba80e 100644
--- a/src/operator/deformable_convolution.cu
+++ b/src/operator/deformable_convolution.cu
@@ -23,7 +23,7 @@
  * \file deformable_convolution.cu
  * \brief
  * \author Yuwen Xiong, Haozhi Qi, Jifeng Dai
-*/
+ */
 
 #include "./deformable_convolution-inl.h"
 #include <vector>
@@ -31,18 +31,16 @@
 namespace mxnet {
 namespace op {
 
-  template<>
-  Operator* CreateOp<gpu>(DeformableConvolutionParam param, int dtype,
-    mxnet::ShapeVector *in_shape,
-    mxnet::ShapeVector *out_shape,
-    Context ctx) {
-    Operator *op = nullptr;
-    MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      op = new DeformableConvolutionOp<gpu, DType>(param);
-    })
-      return op;
-  }
+template <>
+Operator* CreateOp<gpu>(DeformableConvolutionParam param,
+                        int dtype,
+                        mxnet::ShapeVector* in_shape,
+                        mxnet::ShapeVector* out_shape,
+                        Context ctx) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new DeformableConvolutionOp<gpu, DType>(param); })
+  return op;
+}
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/elemwise_op_common.h b/src/operator/elemwise_op_common.h
index bc2e1d77cf9c..512accd55f88 100644
--- a/src/operator/elemwise_op_common.h
+++ b/src/operator/elemwise_op_common.h
@@ -18,11 +18,11 @@
  */
 
 /*!
-* Copyright (c) 2016 by Contributors
-* \file elemwise_op_common.h
-* \brief common function used for broadcasting and reducing
-* \author Xingjian Shi
-*/
+ * Copyright (c) 2016 by Contributors
+ * \file elemwise_op_common.h
+ * \brief common function used for broadcasting and reducing
+ * \author Xingjian Shi
+ */
 #ifndef MXNET_OPERATOR_ELEMWISE_OP_COMMON_H_
 #define MXNET_OPERATOR_ELEMWISE_OP_COMMON_H_
 #include <dmlc/logging.h>
@@ -47,41 +47,37 @@ namespace op {
  *  \tparam rsp whether row sparse stype is supported
  *  \tparam rsp whether csr stype is supported
  */
-template<bool cpu_only, bool rsp, bool csr>
+template <bool cpu_only, bool rsp, bool csr>
 inline bool ElemwiseStorageAttr(const nnvm::NodeAttrs& attrs,
                                 const int dev_mask,
                                 DispatchMode* dispatch_mode,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   using namespace common;
-  bool dispatched = false;
+  bool dispatched        = false;
   const bool invalid_ctx = cpu_only && dev_mask != mshadow::cpu::kDevMask;
-  const auto dispatch_ex = invalid_ctx ? DispatchMode::kFComputeFallback :
-                                         DispatchMode::kFComputeEx;
+  const auto dispatch_ex =
+      invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
     // dns, dns ... -> dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && rsp && ContainsOnlyStorage(*in_attrs, kRowSparseStorage)) {
     // rsp, rsp, ... -> rsp
-    dispatched = storage_type_assign(out_attrs, kRowSparseStorage,
-                                     dispatch_mode, dispatch_ex);
+    dispatched = storage_type_assign(out_attrs, kRowSparseStorage, dispatch_mode, dispatch_ex);
   }
   if (!dispatched && csr && common::ContainsOnlyStorage(*in_attrs, kCSRStorage)) {
     // csr, csr, ... -> csr
-    dispatched = storage_type_assign(out_attrs, kCSRStorage,
-                                     dispatch_mode, dispatch_ex);
+    dispatched = storage_type_assign(out_attrs, kCSRStorage, dispatch_mode, dispatch_ex);
   }
   if (!dispatched && in_attrs->size() == 3U && in_attrs->at(0) == kDefaultStorage &&
       in_attrs->at(1) == kCSRStorage && in_attrs->at(2) == kDefaultStorage) {
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, dispatch_ex);
+    dispatched = storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, dispatch_ex);
   }
   if (!dispatched && in_attrs->size() > 4U && ContainsStorageType(*in_attrs, kDefaultStorage)) {
     // *, dense, * -> dense
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, dispatch_ex);
+    dispatched = storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, dispatch_ex);
   }
   if (!dispatched) {
     dispatch_fallback(out_attrs, dispatch_mode);
@@ -100,28 +96,31 @@ inline bool ElemwiseStorageAttr(const nnvm::NodeAttrs& attrs,
  *  \tparam rsp whether row sparse stype is supported
  *  \tparam rsp whether csr stype is supported
  */
-template<index_t n_in, index_t n_out, bool cpu_only, bool rsp, bool csr>
+template <index_t n_in, index_t n_out, bool cpu_only, bool rsp, bool csr>
 inline bool ElemwiseStorageType(const nnvm::NodeAttrs& attrs,
                                 const int dev_mask,
                                 DispatchMode* dispatch_mode,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), n_in);
   CHECK_EQ(out_attrs->size(), n_out);
-  return ElemwiseStorageAttr<cpu_only, rsp, csr>(attrs, dev_mask, dispatch_mode,
-                                                 in_attrs, out_attrs);
+  return ElemwiseStorageAttr<cpu_only, rsp, csr>(
+      attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 }
 
-template<typename AttrType, bool (*is_none)(const AttrType&),
-         bool (*assign)(AttrType*, const AttrType&), bool reverse_infer,
-         std::string (*attr_string)(const AttrType&),
-         index_t n_in = -1, index_t n_out = -1>
+template <typename AttrType,
+          bool (*is_none)(const AttrType&),
+          bool (*assign)(AttrType*, const AttrType&),
+          bool reverse_infer,
+          std::string (*attr_string)(const AttrType&),
+          index_t n_in  = -1,
+          index_t n_out = -1>
 inline bool ElemwiseAttrHelper(const std::string& node_name,
-                               std::vector<AttrType> *in_attrs,
-                               std::vector<AttrType> *out_attrs,
+                               std::vector<AttrType>* in_attrs,
+                               std::vector<AttrType>* out_attrs,
                                const AttrType& none) {
-  AttrType dattr = none;
-  size_t in_size = in_attrs->size();
+  AttrType dattr  = none;
+  size_t in_size  = in_attrs->size();
   size_t out_size = out_attrs->size();
   if (n_in != -1)
     in_size = static_cast<size_t>(n_in);
@@ -130,53 +129,51 @@ inline bool ElemwiseAttrHelper(const std::string& node_name,
 
   CHECK_LE(in_size, in_attrs->size());
   CHECK_LE(out_size, out_attrs->size());
-  auto deduce = [&](const std::vector<AttrType>& vec, size_t size, const char *name) {
-      for (size_t i = 0; i < size; ++i) {
-        CHECK(assign(&dattr, vec.at(i)))
-          << "Incompatible attr in node " << node_name << " at " << i << "-th "
-          << name << ": " << "expected " << attr_string(dattr)
-          << ", got " << attr_string(vec.at(i));
-      }
-    };
+  auto deduce = [&](const std::vector<AttrType>& vec, size_t size, const char* name) {
+    for (size_t i = 0; i < size; ++i) {
+      CHECK(assign(&dattr, vec.at(i)))
+          << "Incompatible attr in node " << node_name << " at " << i << "-th " << name << ": "
+          << "expected " << attr_string(dattr) << ", got " << attr_string(vec.at(i));
+    }
+  };
   deduce(*in_attrs, in_size, "input");
   if (reverse_infer)
-      deduce(*out_attrs, out_size, "output");
+    deduce(*out_attrs, out_size, "output");
 
-  auto write = [&](std::vector<AttrType> *vec, size_t size, const char *name) {
-      for (size_t i = 0; i < size; ++i) {
-        CHECK(assign(&(vec->at(i)), dattr))
-          << "Incompatible attr in node " << node_name << " at " << i << "-th "
-          << name << ": " << "expected " << attr_string(dattr)
-          << ", got " << attr_string(vec->at(i));
-      }
-    };
+  auto write = [&](std::vector<AttrType>* vec, size_t size, const char* name) {
+    for (size_t i = 0; i < size; ++i) {
+      CHECK(assign(&(vec->at(i)), dattr))
+          << "Incompatible attr in node " << node_name << " at " << i << "-th " << name << ": "
+          << "expected " << attr_string(dattr) << ", got " << attr_string(vec->at(i));
+    }
+  };
   write(in_attrs, in_size, "input");
   write(out_attrs, out_size, "output");
 
   if (is_none(dattr))
-      return false;
+    return false;
   return true;
 }
 
-
-template<typename AttrType, bool (*is_none)(const AttrType&),
-         bool (*assign)(AttrType*, const AttrType&), bool reverse_infer,
-         std::string (*attr_string)(const AttrType&),
-         index_t n_in = -1, index_t n_out = -1>
+template <typename AttrType,
+          bool (*is_none)(const AttrType&),
+          bool (*assign)(AttrType*, const AttrType&),
+          bool reverse_infer,
+          std::string (*attr_string)(const AttrType&),
+          index_t n_in  = -1,
+          index_t n_out = -1>
 inline bool ElemwiseAttr(const nnvm::NodeAttrs& attrs,
-                         std::vector<AttrType> *in_attrs,
-                         std::vector<AttrType> *out_attrs,
+                         std::vector<AttrType>* in_attrs,
+                         std::vector<AttrType>* out_attrs,
                          const AttrType& none) {
-  return ElemwiseAttrHelper<AttrType, is_none,
-                            assign, reverse_infer,
-                            attr_string, n_in,
-                            n_out>(attrs.name, in_attrs, out_attrs, none);
+  return ElemwiseAttrHelper<AttrType, is_none, assign, reverse_infer, attr_string, n_in, n_out>(
+      attrs.name, in_attrs, out_attrs, none);
 }
 
-template<index_t n_in, index_t n_out>
+template <index_t n_in, index_t n_out>
 inline bool ElemwiseShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   if (n_in != -1) {
     CHECK_EQ(in_attrs->size(), static_cast<size_t>(n_in)) << " in operator " << attrs.name;
   }
@@ -184,13 +181,13 @@ inline bool ElemwiseShape(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   }
   return ElemwiseAttr<mxnet::TShape, shape_is_none, shape_assign, true, shape_string>(
-    attrs, in_attrs, out_attrs, mxnet::TShape());
+      attrs, in_attrs, out_attrs, mxnet::TShape());
 }
 
-template<index_t n_in, index_t n_out>
+template <index_t n_in, index_t n_out>
 inline bool ElemwiseType(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   if (n_in != -1) {
     CHECK_EQ(in_attrs->size(), static_cast<size_t>(n_in)) << " in operator " << attrs.name;
   }
@@ -198,19 +195,18 @@ inline bool ElemwiseType(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   }
   return ElemwiseAttr<int, type_is_none, type_assign, true, type_string>(
-    attrs, in_attrs, out_attrs, -1);
+      attrs, in_attrs, out_attrs, -1);
 }
 
 // Special case of ElemwiseType. Constrains dtype to integer types
-template<index_t n_in, index_t n_out>
+template <index_t n_in, index_t n_out>
 inline bool ElemwiseIntType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
-  CHECK(in_attrs->at(0) == mshadow::kInt64 ||
-        in_attrs->at(0) == mshadow::kInt32 ||
-        in_attrs->at(0) == mshadow::kInt8 ||
-        in_attrs->at(0) == mshadow::kUint8 ||
-        in_attrs->at(0) == mshadow::kBool) << "Only supports integer types.";
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
+  CHECK(in_attrs->at(0) == mshadow::kInt64 || in_attrs->at(0) == mshadow::kInt32 ||
+        in_attrs->at(0) == mshadow::kInt8 || in_attrs->at(0) == mshadow::kUint8 ||
+        in_attrs->at(0) == mshadow::kBool)
+      << "Only supports integer types.";
   if (n_in != -1) {
     CHECK_EQ(in_attrs->size(), static_cast<size_t>(n_in)) << " in operator " << attrs.name;
   }
@@ -218,12 +214,12 @@ inline bool ElemwiseIntType(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   }
   return ElemwiseAttr<int, type_is_none, type_assign, true, type_string>(
-    attrs, in_attrs, out_attrs, -1);
+      attrs, in_attrs, out_attrs, -1);
 }
 
 // Transfer gradient and input to FGradient function
 struct ElemwiseGradUseIn {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     return MakeNonlossGradNode(op_name, n, ograds, n->inputs, n->attrs.dict);
@@ -232,7 +228,7 @@ struct ElemwiseGradUseIn {
 
 // Transfer gradient and output to FGradient function
 struct ElemwiseGradUseOut {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads;
@@ -246,7 +242,7 @@ struct ElemwiseGradUseOut {
 
 // Transfer gradient and input and output to FGradient function
 struct ElemwiseGradUseInOut {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
@@ -263,7 +259,7 @@ struct ElemwiseGradUseInOut {
 
 // Transfer only gradient to FGradient function
 struct ElemwiseGradUseNone {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     return MakeNonlossGradNode(op_name, n, ograds, {}, n->attrs.dict);
@@ -271,7 +267,7 @@ struct ElemwiseGradUseNone {
 };
 
 struct CloneGradient {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> ret;
diff --git a/src/operator/fusion/fused_op-inl.h b/src/operator/fusion/fused_op-inl.h
index acf5815d2a18..8f743db6176c 100644
--- a/src/operator/fusion/fused_op-inl.h
+++ b/src/operator/fusion/fused_op-inl.h
@@ -31,198 +31,189 @@ namespace mxnet {
 namespace fusion {
 
 const std::map<std::string, std::vector<std::vector<std::string>>> ops_desc = {
-  {"elemwise_add"                      , {{"op::add(%, %)", "_0", "_1"}}},
-  {"_plus"                             , {{"op::add(%, %)", "_0", "_1"}}},
-  {"_Plus"                             , {{"op::add(%, %)", "_0", "_1"}}},
-  {"_add"                              , {{"op::add(%, %)", "_0", "_1"}}},
-  {"elemwise_sub"                      , {{"op::sub(%, %)", "_0", "_1"}}},
-  {"_minus"                            , {{"op::sub(%, %)", "_0", "_1"}}},
-  {"_Minus"                            , {{"op::sub(%, %)", "_0", "_1"}}},
-  {"_sub"                              , {{"op::sub(%, %)", "_0", "_1"}}},
-  {"elemwise_mul"                      , {{"op::mul(%, %)", "_0", "_1"}}},
-  {"_mul"                              , {{"op::mul(%, %)", "_0", "_1"}}},
-  {"_Mul"                              , {{"op::mul(%, %)", "_0", "_1"}}},
-  {"elemwise_div"                      , {{"op::div(%, %)", "_0", "_1"}}},
-  {"_div"                              , {{"op::div(%, %)", "_0", "_1"}}},
-  {"_Div"                              , {{"op::div(%, %)", "_0", "_1"}}},
-  {"_Power"                            , {{"op::power(%, %)", "_0", "_1"}}},
-  {"_power"                            , {{"op::power(%, %)", "_0", "_1"}}},
-  {"_Maximum"                          , {{"op::max(%, %)", "_0", "_1"}}},
-  {"_maximum"                          , {{"op::max(%, %)", "_0", "_1"}}},
-  {"_Minimum"                          , {{"op::min(%, %)", "_0", "_1"}}},
-  {"_minimum"                          , {{"op::min(%, %)", "_0", "_1"}}},
-  {"_mod"                              , {{"op::mod(%, %)", "_0", "_1"}}},
-  {"amp_cast"                          , {{"op::identity(%)", "_0"}}},
-  {"_backward_amp_cast"                , {{"op::identity(%)", "_0"}}},
-  {"relu"                              , {{"op::relu(%)", "_0"}}},
-  {"sigmoid"                           , {{"op::sigmoid(%)", "_0"}}},
-  {"log_sigmoid"                       , {{"op::log_sigmoid(%)", "_0"}}},
-  {"mish"                              , {{"op::mish(%)", "_0"}}},
-  {"softsign"                          , {{"op::softsign(%)", "_0"}}},
-  {"exp"                               , {{"op::exp(%)", "_0"}}},
-  {"expm1"                             , {{"op::expm1(%)", "_0"}}},
-  {"log"                               , {{"op::log(%)", "_0"}}},
-  {"log10"                             , {{"op::log10(%)", "_0"}}},
-  {"log2"                              , {{"op::log2(%)", "_0"}}},
-  {"log1p"                             , {{"op::log1p(%)", "_0"}}},
-  {"degrees"                           , {{"op::degrees(%)", "_0"}}},
-  {"radians"                           , {{"op::radians(%)", "_0"}}},
-  {"sin"                               , {{"op::sin(%)", "_0"}}},
-  {"cos"                               , {{"op::cos(%)", "_0"}}},
-  {"tan"                               , {{"op::tan(%)", "_0"}}},
-  {"arcsin"                            , {{"op::arcsin(%)", "_0"}}},
-  {"arccos"                            , {{"op::arccos(%)", "_0"}}},
-  {"arctan"                            , {{"op::arctan(%)", "_0"}}},
-  {"sinh"                              , {{"op::sinh(%)", "_0"}}},
-  {"cosh"                              , {{"op::cosh(%)", "_0"}}},
-  {"tanh"                              , {{"op::tanh(%)", "_0"}}},
-  {"arcsinh"                           , {{"op::arcsinh(%)", "_0"}}},
-  {"arccosh"                           , {{"op::arccosh(%)", "_0"}}},
-  {"arctanh"                           , {{"op::arctanh(%)", "_0"}}},
-  {"sqrt"                              , {{"op::sqrt(%)", "_0"}}},
-  {"rsqrt"                             , {{"op::rsqrt(%)", "_0"}}},
-  {"cbrt"                              , {{"op::cbrt(%)", "_0"}}},
-  {"rcbrt"                             , {{"op::rcbrt(%)", "_0"}}},
-  {"square"                            , {{"op::square(%)", "_0"}}},
-  {"squeeze"                           , {{"op::identity(%)", "_0"}}},
-  {"zeros_like"                        , {{"op::zero(%)", "_0"}}},
-  {"ones_like"                         , {{"op::one(%)", "_0"}}},
-  {"flatten"                           , {{"op::identity(%)", "_0"}}},
-  {"Reshape"                           , {{"op::identity(%)", "_0"}}},
-  {"reshape"                           , {{"op::identity(%)", "_0"}}},
-  {"_backward_reshape"                 , {{"op::identity(%)", "_0"}}},
-  {"expand_dims"                       , {{"op::identity(%)", "_0"}}},
-  {"round"                             , {{"op::round(%)", "_0"}}},
-  {"rint"                              , {{"op::rint(%)", "_0"}}},
-  {"fix"                               , {{"op::fix(%)", "_0"}}},
-  {"floor"                             , {{"op::floor(%)", "_0"}}},
-  {"ceil"                              , {{"op::ceil(%)", "_0"}}},
-  {"trunc"                             , {{"op::trunc(%)", "_0"}}},
-  {"sign"                              , {{"op::sign(%)", "_0"}}},
-  {"reciprocal"                        , {{"op::reciprocal(%)", "_0"}}},
-  {"abs"                               , {{"op::abs(%)", "_0"}}},
-  {"gamma"                             , {{"op::gamma(%)", "_0"}}},
-  {"gammaln"                           , {{"op::gammaln(%)", "_0"}}},
-  {"erf"                               , {{"op::erf(%)", "_0"}}},
-  {"erfinv"                            , {{"op::erfinv(%)", "_0"}}},
-  {"_copy"                             , {{"op::identity(%)", "_0"}}},
-  {"_identity_with_attr_like_rhs"      , {{"op::identity(%)", "_0"}}},
-  {"_plus_scalar"                      , {{"op::add(%, float(%))", "_0", "scalar"}}},
-  {"_PlusScalar"                       , {{"op::add(%, float(%))", "_0", "scalar"}}},
-  {"_minus_scalar"                     , {{"op::sub(%, float(%))", "_0", "scalar"}}},
-  {"_MinusScalar"                      , {{"op::sub(%, float(%))", "_0", "scalar"}}},
-  {"_rminus_scalar"                    , {{"(-op::sub(%, float(%)))", "_0", "scalar"}}},
-  {"_RMinusScalar"                     , {{"(-op::sub(%, float(%)))", "_0", "scalar"}}},
-  {"_mul_scalar"                       , {{"op::mul(%, float(%))", "_0", "scalar"}}},
-  {"_MulScalar"                        , {{"op::mul(%, float(%))", "_0", "scalar"}}},
-  {"_div_scalar"                       , {{"op::mul(%, 1.0f/float(%))", "_0", "scalar"}}},
-  {"_DivScalar"                        , {{"op::mul(%, 1.0f/float(%))", "_0", "scalar"}}},
-  {"_rdiv_scalar"                      , {{"op::rdiv(%, float(%))", "_0", "scalar"}}},
-  {"_power_scalar"                     , {{"op::power(%, float(%))", "_0", "scalar"}}},
-  {"_PowerScalar"                      , {{"op::power(%, float(%))", "_0", "scalar"}}},
-  {"_rpower_scalar"                    , {{"op::rpow(%, float(%))", "_0", "scalar"}}},
-  {"_RPowerScalar"                     , {{"op::rpow(%, float(%))", "_0", "scalar"}}},
-  {"_RDivScalar"                       , {{"op::rdiv(%, float(%))", "_0", "scalar"}}},
-  {"_mod_scalar"                       , {{"op::mod(%, float(%))", "_0", "scalar"}}},
-  {"_rmod_scalar"                      , {{"op::rmod(%, float(%))", "_0", "scalar"}}},
-  {"Cast"                              , {{"op::cast<%>(%)", "dtype", "_0"}}},
-  {"cast"                              , {{"op::cast<%>(%)", "dtype", "_0"}}},
-  {"Activation"                        , {{"op::%(%)", "act_type", "_0"}}},
-  {"clip"                              , {{"op::clip(%, %, %)", "_0", "a_min", "a_max"}}},
-  {"_zeros"                            , {{"op::zero<%>()", "dtype"}}},
-  {"_ones"                             , {{"op::one<%>()", "dtype"}}},
-  {"negative"                          , {{"(-%)", "_0"}}},
-  {"_hypot"                            , {{"op::hypot(%, %)", "_0", "_1"}}},
-  {"_hypot_scalar"                     , {{"op::hypot(%, float(%))", "_0", "scalar"}}},
-  {"logical_not"                       , {{"op::logical_not(%)", "_0"}}},
-  {"_backward_relu"                    , {{"op::backward_relu(%, %)", "_0", "_1"}}},
-  {"_backward_sigmoid"                 , {{"op::backward_sigmoid(%, %)", "_0", "_1"}}},
-  {"_backward_log_sigmoid"             , {{"op::backward_log_sigmoid(%, %)", "_0", "_1"}}},
-  {"_backward_mish"                    , {{"op::backward_mish(%, %)", "_0", "_1"}}},
-  {"_backward_expm1"                   , {{"op::backward_expm1(%, %)", "_0", "_1"}}},
-  {"_backward_log"                     , {{"op::backward_log(%, %)", "_0", "_1"}}},
-  {"_backward_log10"                   , {{"op::backward_log10(%, %)", "_0", "_1"}}},
-  {"_backward_log2"                    , {{"op::backward_log2(%, %)", "_0", "_1"}}},
-  {"_backward_log1p"                   , {{"op::backward_log1p(%, %)", "_0", "_1"}}},
-  {"_backward_sin"                     , {{"op::backward_sin(%, %)", "_0", "_1"}}},
-  {"_backward_cos"                     , {{"op::backward_cos(%, %)", "_0", "_1"}}},
-  {"_backward_tan"                     , {{"op::backward_tan(%, %)", "_0", "_1"}}},
-  {"_backward_arcsin"                  , {{"op::backward_arcsin(%, %)", "_0", "_1"}}},
-  {"_backward_arccos"                  , {{"op::backward_arccos(%, %)", "_0", "_1"}}},
-  {"_backward_arctan"                  , {{"op::backward_arctan(%, %)", "_0", "_1"}}},
-  {"_backward_sinh"                    , {{"op::backward_sinh(%, %)", "_0", "_1"}}},
-  {"_backward_cosh"                    , {{"op::backward_cosh(%, %)", "_0", "_1"}}},
-  {"_backward_tanh"                    , {{"op::backward_tanh(%, %)", "_0", "_1"}}},
-  {"_backward_arcsinh"                 , {{"op::backward_arcsinh(%, %)", "_0", "_1"}}},
-  {"_backward_arccosh"                 , {{"op::backward_arccosh(%, %)", "_0", "_1"}}},
-  {"_backward_arctanh"                 , {{"op::backward_arctanh(%, %)", "_0", "_1"}}},
-  {"_backward_sqrt"                    , {{"op::backward_sqrt(%, %)", "_0", "_1"}}},
-  {"_backward_rsqrt"                   , {{"op::backward_rsqrt(%, %)", "_0", "_1"}}},
-  {"_backward_cbrt"                    , {{"op::backward_cbrt(%, %)", "_0", "_1"}}},
-  {"_backward_rcbrt"                   , {{"op::backward_rcbrt(%, %)", "_0", "_1"}}},
-  {"_backward_square"                  , {{"op::backward_square(%, %)", "_0", "_1"}}},
-  {"_backward_div_scalar"              , {{"(% * 1.0f/float(%))", "_0", "scalar"}}},
-  {"_backward_div_scalar"              , {{"(% * 1.0f/float(%))", "_0", "scalar"}}},
-  {"_backward_rdiv_scalar"             , {{"op::rdiv_grad(%, %) * %", "_1",
-                                           "scalar", "_0"}}},
-  {"_backward_hypot_scalar"            , {{"(% * % / op::hypot(%, float(%)))",
-                                           "_0", "_1", "_1", "scalar"}}},
-  {"_backward_radians"                 , {{"op::radians(%)", "_0"}}},
-  {"_backward_erf"                     , {{"op::backward_erf(%, %)", "_0", "_1"}}},
-  {"_backward_erfinv"                  , {{"op::backward_erfinv(%, %)", "_0", "_1"}}},
-  {"_backward_reciprocal"              , {{"op::backward_reciprocal(%, %)", "_0", "_1"}}},
-  {"_backward_abs"                     , {{"(op::backward_abs(%, %))", "_0", "_1"}}},
-  {"_backward_degrees"                 , {{"op::degrees(%)", "_0"}}},
-  {"_backward_clip"                    , {{"op::backward_clip(%, %, %, %)", "_0", "_1",
-                                                                            "a_min", "a_max"}}},
-  {"smooth_l1"                         , {{"op::smooth_l1(%, float(%))", "_0", "scalar"}}},
-  {"_backward_smooth_l1"               , {{"op::smooth_l1_grad(%, float(%)) * %",
-                                           "_1", "scalar", "_0"}}},
-  // TODO(ptredak): arange
-  // TODO(ptredak): LeakyRelu
-  {"_backward_sub"                     , {{"(%)", "_0"},
-                                          {"(-(%))", "_0"}}},
-  {"_backward_mul"                     , {{"(% * %)", "_0", "_2"},
-                                          {"(% * %)", "_0", "_1"}}},
-  {"_backward_mul_scalar"              , {{"(% * float(%))", "_0", "scalar"}}},
-  {"_backward_div"                     , {{"(% / %)", "_0", "_2"},
-                                          {"(-% * % / (% * %))", "_0", "_1", "_2", "_2"}}},
-  {"_backward_power"                   , {{"(% * % * powf(%, % - 1))", "_0", "_2", "_1", "_2"},
-                                          {"(% * powf(%, %) * logf(%))", "_0", "_1", "_2", "_1"}}},
-  {"_backward_power_scalar"            , {{"(% * float(%) * powf(%, float(%) - 1))",
-                                           "_0", "scalar", "_1", "scalar"}}},
-  {"_backward_rpower_scalar"           , {{"(% * % * logf(float(%)))", "_0", "_1", "scalar"}}},
-  {"_backward_maximum"                 , {{"((% >= %) ? % : 0)", "_1", "_2", "_0"},
-                                          {"((% >= %) ? 0 : %)", "_1", "_2", "_0"}}},
-  {"_backward_minimum"                 , {{"((% <= %) ? % : 0)", "_1", "_2", "_0"},
-                                          {"((% <= %) ? 0 : %)", "_1", "_2", "_0"}}},
-  {"_backward_hypot"                   , {{"(% * % / op::hypot(%, %))", "_0", "_1", "_1", "_2"},
-                                          {"(% * % / op::hypot(%, %))", "_0", "_2", "_1", "_2"}}}
-};
+    {"elemwise_add", {{"op::add(%, %)", "_0", "_1"}}},
+    {"_plus", {{"op::add(%, %)", "_0", "_1"}}},
+    {"_Plus", {{"op::add(%, %)", "_0", "_1"}}},
+    {"_add", {{"op::add(%, %)", "_0", "_1"}}},
+    {"elemwise_sub", {{"op::sub(%, %)", "_0", "_1"}}},
+    {"_minus", {{"op::sub(%, %)", "_0", "_1"}}},
+    {"_Minus", {{"op::sub(%, %)", "_0", "_1"}}},
+    {"_sub", {{"op::sub(%, %)", "_0", "_1"}}},
+    {"elemwise_mul", {{"op::mul(%, %)", "_0", "_1"}}},
+    {"_mul", {{"op::mul(%, %)", "_0", "_1"}}},
+    {"_Mul", {{"op::mul(%, %)", "_0", "_1"}}},
+    {"elemwise_div", {{"op::div(%, %)", "_0", "_1"}}},
+    {"_div", {{"op::div(%, %)", "_0", "_1"}}},
+    {"_Div", {{"op::div(%, %)", "_0", "_1"}}},
+    {"_Power", {{"op::power(%, %)", "_0", "_1"}}},
+    {"_power", {{"op::power(%, %)", "_0", "_1"}}},
+    {"_Maximum", {{"op::max(%, %)", "_0", "_1"}}},
+    {"_maximum", {{"op::max(%, %)", "_0", "_1"}}},
+    {"_Minimum", {{"op::min(%, %)", "_0", "_1"}}},
+    {"_minimum", {{"op::min(%, %)", "_0", "_1"}}},
+    {"_mod", {{"op::mod(%, %)", "_0", "_1"}}},
+    {"amp_cast", {{"op::identity(%)", "_0"}}},
+    {"_backward_amp_cast", {{"op::identity(%)", "_0"}}},
+    {"relu", {{"op::relu(%)", "_0"}}},
+    {"sigmoid", {{"op::sigmoid(%)", "_0"}}},
+    {"log_sigmoid", {{"op::log_sigmoid(%)", "_0"}}},
+    {"mish", {{"op::mish(%)", "_0"}}},
+    {"softsign", {{"op::softsign(%)", "_0"}}},
+    {"exp", {{"op::exp(%)", "_0"}}},
+    {"expm1", {{"op::expm1(%)", "_0"}}},
+    {"log", {{"op::log(%)", "_0"}}},
+    {"log10", {{"op::log10(%)", "_0"}}},
+    {"log2", {{"op::log2(%)", "_0"}}},
+    {"log1p", {{"op::log1p(%)", "_0"}}},
+    {"degrees", {{"op::degrees(%)", "_0"}}},
+    {"radians", {{"op::radians(%)", "_0"}}},
+    {"sin", {{"op::sin(%)", "_0"}}},
+    {"cos", {{"op::cos(%)", "_0"}}},
+    {"tan", {{"op::tan(%)", "_0"}}},
+    {"arcsin", {{"op::arcsin(%)", "_0"}}},
+    {"arccos", {{"op::arccos(%)", "_0"}}},
+    {"arctan", {{"op::arctan(%)", "_0"}}},
+    {"sinh", {{"op::sinh(%)", "_0"}}},
+    {"cosh", {{"op::cosh(%)", "_0"}}},
+    {"tanh", {{"op::tanh(%)", "_0"}}},
+    {"arcsinh", {{"op::arcsinh(%)", "_0"}}},
+    {"arccosh", {{"op::arccosh(%)", "_0"}}},
+    {"arctanh", {{"op::arctanh(%)", "_0"}}},
+    {"sqrt", {{"op::sqrt(%)", "_0"}}},
+    {"rsqrt", {{"op::rsqrt(%)", "_0"}}},
+    {"cbrt", {{"op::cbrt(%)", "_0"}}},
+    {"rcbrt", {{"op::rcbrt(%)", "_0"}}},
+    {"square", {{"op::square(%)", "_0"}}},
+    {"squeeze", {{"op::identity(%)", "_0"}}},
+    {"zeros_like", {{"op::zero(%)", "_0"}}},
+    {"ones_like", {{"op::one(%)", "_0"}}},
+    {"flatten", {{"op::identity(%)", "_0"}}},
+    {"Reshape", {{"op::identity(%)", "_0"}}},
+    {"reshape", {{"op::identity(%)", "_0"}}},
+    {"_backward_reshape", {{"op::identity(%)", "_0"}}},
+    {"expand_dims", {{"op::identity(%)", "_0"}}},
+    {"round", {{"op::round(%)", "_0"}}},
+    {"rint", {{"op::rint(%)", "_0"}}},
+    {"fix", {{"op::fix(%)", "_0"}}},
+    {"floor", {{"op::floor(%)", "_0"}}},
+    {"ceil", {{"op::ceil(%)", "_0"}}},
+    {"trunc", {{"op::trunc(%)", "_0"}}},
+    {"sign", {{"op::sign(%)", "_0"}}},
+    {"reciprocal", {{"op::reciprocal(%)", "_0"}}},
+    {"abs", {{"op::abs(%)", "_0"}}},
+    {"gamma", {{"op::gamma(%)", "_0"}}},
+    {"gammaln", {{"op::gammaln(%)", "_0"}}},
+    {"erf", {{"op::erf(%)", "_0"}}},
+    {"erfinv", {{"op::erfinv(%)", "_0"}}},
+    {"_copy", {{"op::identity(%)", "_0"}}},
+    {"_identity_with_attr_like_rhs", {{"op::identity(%)", "_0"}}},
+    {"_plus_scalar", {{"op::add(%, float(%))", "_0", "scalar"}}},
+    {"_PlusScalar", {{"op::add(%, float(%))", "_0", "scalar"}}},
+    {"_minus_scalar", {{"op::sub(%, float(%))", "_0", "scalar"}}},
+    {"_MinusScalar", {{"op::sub(%, float(%))", "_0", "scalar"}}},
+    {"_rminus_scalar", {{"(-op::sub(%, float(%)))", "_0", "scalar"}}},
+    {"_RMinusScalar", {{"(-op::sub(%, float(%)))", "_0", "scalar"}}},
+    {"_mul_scalar", {{"op::mul(%, float(%))", "_0", "scalar"}}},
+    {"_MulScalar", {{"op::mul(%, float(%))", "_0", "scalar"}}},
+    {"_div_scalar", {{"op::mul(%, 1.0f/float(%))", "_0", "scalar"}}},
+    {"_DivScalar", {{"op::mul(%, 1.0f/float(%))", "_0", "scalar"}}},
+    {"_rdiv_scalar", {{"op::rdiv(%, float(%))", "_0", "scalar"}}},
+    {"_power_scalar", {{"op::power(%, float(%))", "_0", "scalar"}}},
+    {"_PowerScalar", {{"op::power(%, float(%))", "_0", "scalar"}}},
+    {"_rpower_scalar", {{"op::rpow(%, float(%))", "_0", "scalar"}}},
+    {"_RPowerScalar", {{"op::rpow(%, float(%))", "_0", "scalar"}}},
+    {"_RDivScalar", {{"op::rdiv(%, float(%))", "_0", "scalar"}}},
+    {"_mod_scalar", {{"op::mod(%, float(%))", "_0", "scalar"}}},
+    {"_rmod_scalar", {{"op::rmod(%, float(%))", "_0", "scalar"}}},
+    {"Cast", {{"op::cast<%>(%)", "dtype", "_0"}}},
+    {"cast", {{"op::cast<%>(%)", "dtype", "_0"}}},
+    {"Activation", {{"op::%(%)", "act_type", "_0"}}},
+    {"clip", {{"op::clip(%, %, %)", "_0", "a_min", "a_max"}}},
+    {"_zeros", {{"op::zero<%>()", "dtype"}}},
+    {"_ones", {{"op::one<%>()", "dtype"}}},
+    {"negative", {{"(-%)", "_0"}}},
+    {"_hypot", {{"op::hypot(%, %)", "_0", "_1"}}},
+    {"_hypot_scalar", {{"op::hypot(%, float(%))", "_0", "scalar"}}},
+    {"logical_not", {{"op::logical_not(%)", "_0"}}},
+    {"_backward_relu", {{"op::backward_relu(%, %)", "_0", "_1"}}},
+    {"_backward_sigmoid", {{"op::backward_sigmoid(%, %)", "_0", "_1"}}},
+    {"_backward_log_sigmoid", {{"op::backward_log_sigmoid(%, %)", "_0", "_1"}}},
+    {"_backward_mish", {{"op::backward_mish(%, %)", "_0", "_1"}}},
+    {"_backward_expm1", {{"op::backward_expm1(%, %)", "_0", "_1"}}},
+    {"_backward_log", {{"op::backward_log(%, %)", "_0", "_1"}}},
+    {"_backward_log10", {{"op::backward_log10(%, %)", "_0", "_1"}}},
+    {"_backward_log2", {{"op::backward_log2(%, %)", "_0", "_1"}}},
+    {"_backward_log1p", {{"op::backward_log1p(%, %)", "_0", "_1"}}},
+    {"_backward_sin", {{"op::backward_sin(%, %)", "_0", "_1"}}},
+    {"_backward_cos", {{"op::backward_cos(%, %)", "_0", "_1"}}},
+    {"_backward_tan", {{"op::backward_tan(%, %)", "_0", "_1"}}},
+    {"_backward_arcsin", {{"op::backward_arcsin(%, %)", "_0", "_1"}}},
+    {"_backward_arccos", {{"op::backward_arccos(%, %)", "_0", "_1"}}},
+    {"_backward_arctan", {{"op::backward_arctan(%, %)", "_0", "_1"}}},
+    {"_backward_sinh", {{"op::backward_sinh(%, %)", "_0", "_1"}}},
+    {"_backward_cosh", {{"op::backward_cosh(%, %)", "_0", "_1"}}},
+    {"_backward_tanh", {{"op::backward_tanh(%, %)", "_0", "_1"}}},
+    {"_backward_arcsinh", {{"op::backward_arcsinh(%, %)", "_0", "_1"}}},
+    {"_backward_arccosh", {{"op::backward_arccosh(%, %)", "_0", "_1"}}},
+    {"_backward_arctanh", {{"op::backward_arctanh(%, %)", "_0", "_1"}}},
+    {"_backward_sqrt", {{"op::backward_sqrt(%, %)", "_0", "_1"}}},
+    {"_backward_rsqrt", {{"op::backward_rsqrt(%, %)", "_0", "_1"}}},
+    {"_backward_cbrt", {{"op::backward_cbrt(%, %)", "_0", "_1"}}},
+    {"_backward_rcbrt", {{"op::backward_rcbrt(%, %)", "_0", "_1"}}},
+    {"_backward_square", {{"op::backward_square(%, %)", "_0", "_1"}}},
+    {"_backward_div_scalar", {{"(% * 1.0f/float(%))", "_0", "scalar"}}},
+    {"_backward_div_scalar", {{"(% * 1.0f/float(%))", "_0", "scalar"}}},
+    {"_backward_rdiv_scalar", {{"op::rdiv_grad(%, %) * %", "_1", "scalar", "_0"}}},
+    {"_backward_hypot_scalar", {{"(% * % / op::hypot(%, float(%)))", "_0", "_1", "_1", "scalar"}}},
+    {"_backward_radians", {{"op::radians(%)", "_0"}}},
+    {"_backward_erf", {{"op::backward_erf(%, %)", "_0", "_1"}}},
+    {"_backward_erfinv", {{"op::backward_erfinv(%, %)", "_0", "_1"}}},
+    {"_backward_reciprocal", {{"op::backward_reciprocal(%, %)", "_0", "_1"}}},
+    {"_backward_abs", {{"(op::backward_abs(%, %))", "_0", "_1"}}},
+    {"_backward_degrees", {{"op::degrees(%)", "_0"}}},
+    {"_backward_clip", {{"op::backward_clip(%, %, %, %)", "_0", "_1", "a_min", "a_max"}}},
+    {"smooth_l1", {{"op::smooth_l1(%, float(%))", "_0", "scalar"}}},
+    {"_backward_smooth_l1", {{"op::smooth_l1_grad(%, float(%)) * %", "_1", "scalar", "_0"}}},
+    // TODO(ptredak): arange
+    // TODO(ptredak): LeakyRelu
+    {"_backward_sub", {{"(%)", "_0"}, {"(-(%))", "_0"}}},
+    {"_backward_mul", {{"(% * %)", "_0", "_2"}, {"(% * %)", "_0", "_1"}}},
+    {"_backward_mul_scalar", {{"(% * float(%))", "_0", "scalar"}}},
+    {"_backward_div", {{"(% / %)", "_0", "_2"}, {"(-% * % / (% * %))", "_0", "_1", "_2", "_2"}}},
+    {"_backward_power",
+     {{"(% * % * powf(%, % - 1))", "_0", "_2", "_1", "_2"},
+      {"(% * powf(%, %) * logf(%))", "_0", "_1", "_2", "_1"}}},
+    {"_backward_power_scalar",
+     {{"(% * float(%) * powf(%, float(%) - 1))", "_0", "scalar", "_1", "scalar"}}},
+    {"_backward_rpower_scalar", {{"(% * % * logf(float(%)))", "_0", "_1", "scalar"}}},
+    {"_backward_maximum",
+     {{"((% >= %) ? % : 0)", "_1", "_2", "_0"}, {"((% >= %) ? 0 : %)", "_1", "_2", "_0"}}},
+    {"_backward_minimum",
+     {{"((% <= %) ? % : 0)", "_1", "_2", "_0"}, {"((% <= %) ? 0 : %)", "_1", "_2", "_0"}}},
+    {"_backward_hypot",
+     {{"(% * % / op::hypot(%, %))", "_0", "_1", "_1", "_2"},
+      {"(% * % / op::hypot(%, %))", "_0", "_2", "_1", "_2"}}}};
 
 // LeakyReLU ops: based on "act_type" attribute
 const std::map<std::string, std::vector<std::vector<std::string>>> LeakyReLU_ops = {
-  {"gelu"                              , {{"op::gelu(%)", "_0"}}},
+    {"gelu", {{"op::gelu(%)", "_0"}}},
 };
 const std::map<std::string, std::vector<std::vector<std::string>>> LeakyReLU_bwd_ops = {
-  {"gelu"                              , {{"op::backward_gelu(%, %)", "_0", "_1"}}},
+    {"gelu", {{"op::backward_gelu(%, %)", "_0", "_1"}}},
 };
 
 const std::map<std::string, std::string> slice_ops = {
-  {"slice_axis"   , ""},
-  {"slice"   , ""},
-  {"slice_like"   , ""},
-  {"broadcast_like"   , ""},
-};
-
-const std::vector<std::string> variable_io_ops = {
-  "add_n",
-  "_backward_Activation",
-  "amp_multicast",
-  "_backward_amp_multicast",
-  "_backward_cast"
+    {"slice_axis", ""},
+    {"slice", ""},
+    {"slice_like", ""},
+    {"broadcast_like", ""},
 };
 
+const std::vector<std::string> variable_io_ops = {"add_n",
+                                                  "_backward_Activation",
+                                                  "amp_multicast",
+                                                  "_backward_amp_multicast",
+                                                  "_backward_cast"};
 
 const char kernel_begin[] = R"code(
 const int tid = threadIdx.x + blockIdx.x * blockDim.x;
diff --git a/src/operator/fusion/fused_op.cc b/src/operator/fusion/fused_op.cc
index fafc75d9aa93..d5991a0b05f1 100644
--- a/src/operator/fusion/fused_op.cc
+++ b/src/operator/fusion/fused_op.cc
@@ -49,27 +49,24 @@ void FusedOpParamParser(nnvm::NodeAttrs* attrs) {
   attrs->parsed = FusedOpPtr(new FusedOp(attrs, param));
 }
 
-FusedOp::FusedOp(const nnvm::NodeAttrs* attrs, const FusedOpConfig& config) :
-    initialized_(false),
-    kernel_function_dev_id_(-1) {
-  inputs_ = std::vector<FusedOpEntry>(config.num_inputs);
-  outputs_ = std::vector<FusedOpEntry>(config.num_outputs);
-  subgraph_ = nnvm::Graph();
+FusedOp::FusedOp(const nnvm::NodeAttrs* attrs, const FusedOpConfig& config)
+    : initialized_(false), kernel_function_dev_id_(-1) {
+  inputs_           = std::vector<FusedOpEntry>(config.num_inputs);
+  outputs_          = std::vector<FusedOpEntry>(config.num_outputs);
+  subgraph_         = nnvm::Graph();
   subgraph_.outputs = attrs->subgraphs[0]->outputs;
 }
 
-bool FusedOp::InferShape(const nnvm::NodeAttrs &attrs,
-                         std::vector<mxnet::TShape> *in_attrs,
-                         std::vector<mxnet::TShape> *out_attrs) {
+bool FusedOp::InferShape(const nnvm::NodeAttrs& attrs,
+                         std::vector<mxnet::TShape>* in_attrs,
+                         std::vector<mxnet::TShape>* out_attrs) {
   std::lock_guard<std::mutex> lock(my_mutex_);
   subgraph_.attrs.erase("shape");
   subgraph_.attrs.erase("shape_inputs");
   std::vector<mxnet::TShape> input_shapes(*in_attrs);
-  subgraph_ = mxnet::exec::InferShape(std::move(subgraph_),
-                                      std::move(input_shapes),
-                                      "__shape__");
+  subgraph_ = mxnet::exec::InferShape(std::move(subgraph_), std::move(input_shapes), "__shape__");
 
-  const auto& g = subgraph_.indexed_graph();
+  const auto& g          = subgraph_.indexed_graph();
   const auto& input_nids = g.input_nodes();
 
   std::vector<mxnet::TShape> out_shapes;
@@ -101,18 +98,16 @@ bool FusedOp::InferShape(const nnvm::NodeAttrs &attrs,
   return inferred;
 }
 
-bool FusedOp::InferType(const nnvm::NodeAttrs &attrs,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
+bool FusedOp::InferType(const nnvm::NodeAttrs& attrs,
+                        std::vector<int>* in_attrs,
+                        std::vector<int>* out_attrs) {
   std::lock_guard<std::mutex> lock(my_mutex_);
   subgraph_.attrs.erase("dtype");
   subgraph_.attrs.erase("dtype_inputs");
   std::vector<int> input_types(*in_attrs);
-  subgraph_ = mxnet::exec::InferType(std::move(subgraph_),
-                                     std::move(input_types),
-                                     "__dtype__");
+  subgraph_ = mxnet::exec::InferType(std::move(subgraph_), std::move(input_types), "__dtype__");
 
-  const auto& g = subgraph_.indexed_graph();
+  const auto& g          = subgraph_.indexed_graph();
   const auto& input_nids = g.input_nodes();
 
   std::vector<int> out_types;
@@ -145,20 +140,20 @@ bool FusedOp::InferType(const nnvm::NodeAttrs &attrs,
 }
 
 template <typename Attr>
-std::tuple<const nnvm::ObjectPtr,
-           std::vector<Attr>,
-           std::vector<Attr>>
-FusedOp::GetAttrs(const std::string& attr_name, const uint32_t node_id) {
-  const auto& g = subgraph_.indexed_graph();
+std::tuple<const nnvm::ObjectPtr, std::vector<Attr>, std::vector<Attr>> FusedOp::GetAttrs(
+    const std::string& attr_name,
+    const uint32_t node_id) {
+  const auto& g                 = subgraph_.indexed_graph();
   const std::vector<Attr> attrs = subgraph_.GetAttr<std::vector<Attr>>(attr_name);
-  const auto& node = g[node_id];
+  const auto& node              = g[node_id];
   std::vector<Attr> inputs, outputs;
   for (const auto& e : node.inputs) {
     inputs.emplace_back(attrs[g.entry_id(e)]);
   }
   outputs.resize(node.source->num_outputs());
   for (size_t i = 0; i < g.num_nodes(); ++i) {
-    if (i == node_id) continue;
+    if (i == node_id)
+      continue;
     const auto& other_node = g[i];
     for (const auto& e : other_node.inputs) {
       if (e.node_id == node_id) {
@@ -172,133 +167,123 @@ FusedOp::GetAttrs(const std::string& attr_name, const uint32_t node_id) {
     }
   }
 
-  return std::make_tuple(node.weak_ref.lock(),
-                         inputs,
-                         outputs);
+  return std::make_tuple(node.weak_ref.lock(), inputs, outputs);
 }
 
 bool FusedOpInferShape(const nnvm::NodeAttrs& attrs,
-                       std::vector<mxnet::TShape> *in_attrs,
-                       std::vector<mxnet::TShape> *out_attrs) {
+                       std::vector<mxnet::TShape>* in_attrs,
+                       std::vector<mxnet::TShape>* out_attrs) {
   const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
   return op->InferShape(attrs, in_attrs, out_attrs);
 }
 
 bool FusedOpInferType(const nnvm::NodeAttrs& attrs,
-                      std::vector<int> *in_attrs,
-                      std::vector<int> *out_attrs) {
+                      std::vector<int>* in_attrs,
+                      std::vector<int>* out_attrs) {
   const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
   return op->InferType(attrs, in_attrs, out_attrs);
 }
 
 void FusedOpProvideShape(const nnvm::NodeAttrs& attrs,
                          const std::vector<nnvm::ObjectPtr>& nodes,
-                         const std::vector<std::vector<mxnet::TShape>> &in_attrs,
-                         const std::vector<std::vector<mxnet::TShape>> &out_attrs) {
+                         const std::vector<std::vector<mxnet::TShape>>& in_attrs,
+                         const std::vector<std::vector<mxnet::TShape>>& out_attrs) {
   const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
   op->ProvideShape(nodes, in_attrs, out_attrs);
 }
 
 void FusedOpProvideType(const nnvm::NodeAttrs& attrs,
                         const std::vector<nnvm::ObjectPtr>& nodes,
-                        const std::vector<std::vector<int>> &in_attrs,
-                        const std::vector<std::vector<int>> &out_attrs) {
+                        const std::vector<std::vector<int>>& in_attrs,
+                        const std::vector<std::vector<int>>& out_attrs) {
   const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
   op->ProvideType(nodes, in_attrs, out_attrs);
 }
 
 void FusedOpProvideStorageType(const nnvm::NodeAttrs& attrs,
                                const std::vector<nnvm::ObjectPtr>& nodes,
-                               const std::vector<std::vector<int>> &in_attrs,
-                               const std::vector<std::vector<int>> &out_attrs) {}
+                               const std::vector<std::vector<int>>& in_attrs,
+                               const std::vector<std::vector<int>>& out_attrs) {}
 
 NNVM_REGISTER_OP(_FusedOp)
-.set_attr<exec::TIsFusion>("TIsFusion", true)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
-    return op->num_inputs();
-  })
-.set_num_outputs([](const NodeAttrs& attrs) {
-    const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
-    return op->num_outputs();
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs) {
-    const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
-    const auto num_inputs = op->num_inputs();
-    const auto num_outputs = op->num_outputs();
-    std::vector<std::pair<int, int> > ret;
-    for (unsigned int i = 0; i < num_inputs; ++i) {
-      for (unsigned int j = 0; j < num_outputs; ++j) {
-        ret.emplace_back(i, j);
-      }
-    }
-    return ret;
+    .set_attr<exec::TIsFusion>("TIsFusion", true)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
+      return op->num_inputs();
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
+      return op->num_outputs();
     })
-.set_attr<exec::FProvideSubgraphShape>("FProvideSubgraphShape", FusedOpProvideShape)
-.set_attr<exec::FProvideSubgraphType>("FProvideSubgraphType", FusedOpProvideType)
-.set_attr<exec::FProvideSubgraphStorageType>("FProvideSubgraphStorageType",
-                                             FusedOpProvideStorageType)
-.set_attr<mxnet::FInferShape>("FInferShape", FusedOpInferShape)
-.set_attr<nnvm::FInferType>("FInferType", FusedOpInferType)
-.set_attr_parser(FusedOpParamParser)
-.add_argument("data", "NDArray-or-Symbol[]", "Data");
-
-std::tuple<const nnvm::ObjectPtr,
-           std::vector<mxnet::TShape>,
-           std::vector<mxnet::TShape>>
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      const FusedOpPtr& op   = nnvm::get<FusedOpPtr>(attrs.parsed);
+                                      const auto num_inputs  = op->num_inputs();
+                                      const auto num_outputs = op->num_outputs();
+                                      std::vector<std::pair<int, int>> ret;
+                                      for (unsigned int i = 0; i < num_inputs; ++i) {
+                                        for (unsigned int j = 0; j < num_outputs; ++j) {
+                                          ret.emplace_back(i, j);
+                                        }
+                                      }
+                                      return ret;
+                                    })
+    .set_attr<exec::FProvideSubgraphShape>("FProvideSubgraphShape", FusedOpProvideShape)
+    .set_attr<exec::FProvideSubgraphType>("FProvideSubgraphType", FusedOpProvideType)
+    .set_attr<exec::FProvideSubgraphStorageType>("FProvideSubgraphStorageType",
+                                                 FusedOpProvideStorageType)
+    .set_attr<mxnet::FInferShape>("FInferShape", FusedOpInferShape)
+    .set_attr<nnvm::FInferType>("FInferType", FusedOpInferType)
+    .set_attr_parser(FusedOpParamParser)
+    .add_argument("data", "NDArray-or-Symbol[]", "Data");
+
+std::tuple<const nnvm::ObjectPtr, std::vector<mxnet::TShape>, std::vector<mxnet::TShape>>
 FusedOpHelperShape(const NodeAttrs& attrs) {
-  const auto& p = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
-  const auto& op = p->op;
+  const auto& p       = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
+  const auto& op      = p->op;
   const auto& node_id = p->node_id;
   return op->GetAttrs<mxnet::TShape>("shape", node_id);
 }
 
-std::tuple<const nnvm::ObjectPtr,
-           std::vector<int>,
-           std::vector<int>>
-FusedOpHelperType(const NodeAttrs& attrs) {
-  const auto& p = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
-  const auto& op = p->op;
+std::tuple<const nnvm::ObjectPtr, std::vector<int>, std::vector<int>> FusedOpHelperType(
+    const NodeAttrs& attrs) {
+  const auto& p       = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
+  const auto& op      = p->op;
   const auto& node_id = p->node_id;
   return op->GetAttrs<int>("dtype", node_id);
 }
 
 NNVM_REGISTER_OP(_FusedOpHelper)
-.set_num_inputs(0)
-.set_num_outputs(0)
-.set_attr<nnvm::TIsGhost>("TIsGhost", true)
-.set_attr<exec::TIsFusionHelper>("TIsFusionHelper", true)
-.set_attr<exec::FAccessSubgraphShape>("FAccessSubgraphShape", FusedOpHelperShape)
-.set_attr<exec::FAccessSubgraphType>("FAccessSubgraphType", FusedOpHelperType);
-
-
-std::tuple<const nnvm::ObjectPtr,
-           std::vector<mxnet::TShape>,
-           std::vector<mxnet::TShape>>
+    .set_num_inputs(0)
+    .set_num_outputs(0)
+    .set_attr<nnvm::TIsGhost>("TIsGhost", true)
+    .set_attr<exec::TIsFusionHelper>("TIsFusionHelper", true)
+    .set_attr<exec::FAccessSubgraphShape>("FAccessSubgraphShape", FusedOpHelperShape)
+    .set_attr<exec::FAccessSubgraphType>("FAccessSubgraphType", FusedOpHelperType);
+
+std::tuple<const nnvm::ObjectPtr, std::vector<mxnet::TShape>, std::vector<mxnet::TShape>>
 FusedOpOutHelperShape(const NodeAttrs& attrs) {
-  const auto& p = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
-  const auto& op = p->op;
+  const auto& p       = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
+  const auto& op      = p->op;
   const auto& node_id = p->node_id;
   return op->GetAuxShape(node_id);
 }
 
-std::tuple<const nnvm::ObjectPtr,
-           std::vector<int>,
-           std::vector<int>>
-FusedOpOutHelperType(const NodeAttrs& attrs) {
-  const auto& p = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
-  const auto& op = p->op;
+std::tuple<const nnvm::ObjectPtr, std::vector<int>, std::vector<int>> FusedOpOutHelperType(
+    const NodeAttrs& attrs) {
+  const auto& p       = nnvm::get<FusedOpHelperParamPtr>(attrs.parsed);
+  const auto& op      = p->op;
   const auto& node_id = p->node_id;
   return op->GetAuxType(node_id);
 }
 
 NNVM_REGISTER_OP(_FusedOpOutHelper)
-.set_num_inputs(0)
-.set_num_outputs(0)
-.set_attr<nnvm::TIsGhost>("TIsGhost", true)
-.set_attr<exec::TIsFusionHelper>("TIsFusionHelper", true)
-.set_attr<exec::FAccessSubgraphShape>("FAccessSubgraphShape", FusedOpOutHelperShape)
-.set_attr<exec::FAccessSubgraphType>("FAccessSubgraphType", FusedOpOutHelperType);
+    .set_num_inputs(0)
+    .set_num_outputs(0)
+    .set_attr<nnvm::TIsGhost>("TIsGhost", true)
+    .set_attr<exec::TIsFusionHelper>("TIsFusionHelper", true)
+    .set_attr<exec::FAccessSubgraphShape>("FAccessSubgraphShape", FusedOpOutHelperShape)
+    .set_attr<exec::FAccessSubgraphType>("FAccessSubgraphType", FusedOpOutHelperType);
 
 }  // namespace mxnet
 
diff --git a/src/operator/fusion/fused_op.cu b/src/operator/fusion/fused_op.cu
index aa89382db62c..f3d57eec30f3 100644
--- a/src/operator/fusion/fused_op.cu
+++ b/src/operator/fusion/fused_op.cu
@@ -81,52 +81,52 @@ inline int mshadowTypeToVectorLength(int type) {
   return 0;
 }
 
-inline void replaceString(std::string *input, const std::string old, const std::string repl) {
-    size_t pos = 0;
-    while ((pos = input->find(old, pos)) != std::string::npos) {
-        input->replace(pos, old.size(), repl);
-        pos += repl.size();
-    }
+inline void replaceString(std::string* input, const std::string old, const std::string repl) {
+  size_t pos = 0;
+  while ((pos = input->find(old, pos)) != std::string::npos) {
+    input->replace(pos, old.size(), repl);
+    pos += repl.size();
+  }
 }
 
 inline std::vector<int> splitStringToVector(const std::string& input, const std::string def) {
-    size_t pos_start = 0, pos_end;
-    const std::string& s = input.substr(1, input.length()-2);
-    std::vector<int> res;
+  size_t pos_start     = 0, pos_end;
+  const std::string& s = input.substr(1, input.length() - 2);
+  std::vector<int> res;
 
-    auto convert_token = [def](std::string token){
-        if (token == def) {
-            return 0;
-        }
-        return std::stoi(token);
-    };
-
-    while ((pos_end = s.find(",", pos_start)) != std::string::npos) {
-        std::string token = s.substr(pos_start, pos_end - pos_start);
-        pos_start = pos_end + 1;
-        if (token.length() > 0) {
-            res.push_back(convert_token(token));
-        }
+  auto convert_token = [def](std::string token) {
+    if (token == def) {
+      return 0;
     }
-
-    if (pos_start < s.length()) {
-        res.push_back(convert_token(s.substr(pos_start)));
+    return std::stoi(token);
+  };
+
+  while ((pos_end = s.find(",", pos_start)) != std::string::npos) {
+    std::string token = s.substr(pos_start, pos_end - pos_start);
+    pos_start         = pos_end + 1;
+    if (token.length() > 0) {
+      res.push_back(convert_token(token));
     }
-    return res;
+  }
+
+  if (pos_start < s.length()) {
+    res.push_back(convert_token(s.substr(pos_start)));
+  }
+  return res;
 }
 
 std::string ParseOpDescription(const std::vector<std::string>& op_desc,
                                const std::map<std::pair<int, int>, std::string>& variables,
                                const nnvm::IndexedGraph::Node& node) {
   const auto* source = node.source;
-  std::string fmt = op_desc[0];
+  std::string fmt    = op_desc[0];
   for (size_t j = 1; j < op_desc.size(); ++j) {
     const std::string& desc = op_desc[j];
     std::string sub;
     if (desc[0] == '_') {
       // Argument
       const int arg_id = std::stoi(desc.substr(1));
-      sub = variables.at({node.inputs[arg_id].node_id, node.inputs[arg_id].index});
+      sub              = variables.at({node.inputs[arg_id].node_id, node.inputs[arg_id].index});
     } else {
       sub = source->attrs.dict.at(desc);
     }
@@ -137,27 +137,26 @@ std::string ParseOpDescription(const std::vector<std::string>& op_desc,
   return fmt;
 }
 
-void AddShape(const mxnet::TShape& shape,
-              std::vector<std::vector<int>>* shapes) {
+void AddShape(const mxnet::TShape& shape, std::vector<std::vector<int>>* shapes) {
   // We need alignment to 8 bytes for size_t in the Shape struct
   // so if ndim is odd, there will be 4B of padding
-  int ndim = shape.ndim();
+  int ndim         = shape.ndim();
   const int offset = ndim % 2 == 0 ? 2 : 3;
   shapes->push_back(std::vector<int>(ndim + offset));
   std::vector<int>& tensor_shapes = shapes->back();
-  size_t total_size = 1;
-  for (int i = ndim-1; i >= 0; i--) {
+  size_t total_size               = 1;
+  for (int i = ndim - 1; i >= 0; i--) {
     tensor_shapes[i] = shape[i];
     total_size *= shape[i];
   }
-  size_t * shape_size_ptr = reinterpret_cast<size_t*>(&tensor_shapes[ndim + offset - 2]);
-  *shape_size_ptr = total_size;
+  size_t* shape_size_ptr = reinterpret_cast<size_t*>(&tensor_shapes[ndim + offset - 2]);
+  *shape_size_ptr        = total_size;
 }
 
 void AddPointerAndShape(const TBlob& data,
-                        std::vector<void*> *ptrs,
+                        std::vector<void*>* ptrs,
                         std::vector<std::vector<int>>* shapes,
-                        mshadow::Stream<gpu> * s) {
+                        mshadow::Stream<gpu>* s) {
   using namespace mshadow;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(data.type_flag_, DType, {
     Tensor<gpu, 1, DType> tensor = data.FlatTo1D<gpu, DType>(s);
@@ -168,20 +167,20 @@ void AddPointerAndShape(const TBlob& data,
 
 }  // namespace
 
-std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
-                           const std::vector<int> &in_dtypes,
-                           const std::vector<int> &out_dtypes,
-                           const std::vector<int> &in_ndims,
-                           const std::vector<int> &out_ndims,
-                           const mxnet::ShapeVector &node_shapes,
-                           const std::vector<int> &node_dtypes,
-                           const int nvec,
-                           const std::string &kernel_name,
-                           std::vector<uint32_t>* check_shapes) {
-  const auto& g = subgraph_.indexed_graph();
-  std::string code = "";
+std::string FusedOp::GenerateCode(const std::vector<OpReqType>& req,
+                                  const std::vector<int>& in_dtypes,
+                                  const std::vector<int>& out_dtypes,
+                                  const std::vector<int>& in_ndims,
+                                  const std::vector<int>& out_ndims,
+                                  const mxnet::ShapeVector& node_shapes,
+                                  const std::vector<int>& node_dtypes,
+                                  const int nvec,
+                                  const std::string& kernel_name,
+                                  std::vector<uint32_t>* check_shapes) {
+  const auto& g         = subgraph_.indexed_graph();
+  std::string code      = "";
   int temp_name_counter = 0;
-  using NodeEntry = nnvm::IndexedGraph::NodeEntry;
+  using NodeEntry       = nnvm::IndexedGraph::NodeEntry;
   std::map<std::pair<int, int>, std::string> variables;
   std::map<int, int> load_index;
   bool check_shapes_compile = true;
@@ -198,42 +197,42 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
   }
 
   for (size_t i = 0; i < g.num_nodes(); ++i) {
-    const auto& node = g[i];
+    const auto& node   = g[i];
     const auto* source = node.source;
     if (source != nullptr) {
-        if (source->is_variable()) {
-            load_index[i] = 1;
-        } else {
-            std::string op_name = source->op()->name;
-            if (fusion::slice_ops.find(op_name) != fusion::slice_ops.end()) {
-                load_index[node.inputs[0].node_id] = 0;
-            }
+      if (source->is_variable()) {
+        load_index[i] = 1;
+      } else {
+        std::string op_name = source->op()->name;
+        if (fusion::slice_ops.find(op_name) != fusion::slice_ops.end()) {
+          load_index[node.inputs[0].node_id] = 0;
         }
+      }
     }
   }
   for (size_t i = 0; i < g.num_nodes(); ++i) {
-    const auto& node = g[i];
+    const auto& node   = g[i];
     const auto* source = node.source;
     if (source != nullptr) {
       if (source->is_variable()) {
         if (load_index[i]) {
           const auto& var_name = source->attrs.name;
-          code += "const auto vec_" + var_name + " = op::load_index<nvec>(" +
-                   var_name + ", offset, " + var_name + "_shape);\n";
+          code += "const auto vec_" + var_name + " = op::load_index<nvec>(" + var_name +
+                  ", offset, " + var_name + "_shape);\n";
           variables[{i, 0}] = var_name;
         }
         CHECK_EQ(outputs[i], 1);
       } else {
         std::string op_name = source->op()->name;
         if (fusion::slice_ops.find(op_name) != fusion::slice_ops.end()) {
-          int node_id = node.inputs[0].node_id;
+          int node_id                   = node.inputs[0].node_id;
           const uint32_t input_entry_id = g.entry_id(node.inputs[0]);
-          const auto& shape = node_shapes[input_entry_id];
-          const int ndim = shape.ndim();
-          const auto& var_name = g[node_id].source->attrs.name;
-          const auto vec_name = "vec_" + var_name + "_" + std::to_string(i);
-          load_index[node_id] = 0;
-          auto parse_tuple = [ndim](const std::string& input, const std::string& def) {
+          const auto& shape             = node_shapes[input_entry_id];
+          const int ndim                = shape.ndim();
+          const auto& var_name          = g[node_id].source->attrs.name;
+          const auto vec_name           = "vec_" + var_name + "_" + std::to_string(i);
+          load_index[node_id]           = 0;
+          auto parse_tuple              = [ndim](const std::string& input, const std::string& def) {
             std::string out = input;
             replaceString(&out, " ", "");
             if (out[0] == '(') {
@@ -270,8 +269,7 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
             return out;
           };
           auto build_tuple = [ndim](int axis, const std::string str, const std::string def) {
-            if (axis < 0 &&
-                axis >= -ndim) {
+            if (axis < 0 && axis >= -ndim) {
               axis += ndim;
             }
             if (axis < 0 || axis >= ndim) {
@@ -279,37 +277,37 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
             }
             std::string tuple = "{";
             for (int i = 0; i < axis; i++) {
-                tuple += def + ",";
+              tuple += def + ",";
             }
             tuple += str;
             for (int i = axis + 1; i < ndim; i++) {
-                tuple += "," + def;
+              tuple += "," + def;
             }
             tuple += "}";
             return tuple;
           };
           auto check_tuple = [ndim, nvec](const std::string str) {
             std::vector<int> tuple = splitStringToVector(str, "INT_MAX");
-            if (tuple[ndim-1] % nvec == 0) {
+            if (tuple[ndim - 1] % nvec == 0) {
               return true;
             }
             return false;
           };
           auto build_string_end = [i, ndim, var_name](std::string* code) {
             std::string end_var_name = var_name + "_" + std::to_string(i) + "_end";
-            *code += "op::Shape<" + std::to_string(ndim) + "> "+ end_var_name + ";\n";
+            *code += "op::Shape<" + std::to_string(ndim) + "> " + end_var_name + ";\n";
             *code += end_var_name + ".set(INT_MAX);\n";
             return end_var_name;
           };
           std::string begin;
           std::string end;
           if (op_name == "broadcast_like" || op_name == "slice_like") {
-            uint32_t like_id = g.entry_id(i, 0);
-            begin = build_tuple(0, "0", "0");
+            uint32_t like_id           = g.entry_id(i, 0);
+            begin                      = build_tuple(0, "0", "0");
             std::string extra_var_name = "extra_" + std::to_string(like_id) + "_shape";
             if (std::find(extra_shape_args_.begin(), extra_shape_args_.end(), like_id) ==
                 extra_shape_args_.end()) {
-                extra_shape_args_.push_back(like_id);
+              extra_shape_args_.push_back(like_id);
             }
             if (check_shapes) {
               check_shapes->push_back(like_id);
@@ -318,14 +316,14 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
             end = extra_var_name;
           } else {
             if (op_name == "slice_axis") {
-              begin = parse_int(source->attrs.dict.at("begin"), "0");
-              end = parse_int(source->attrs.dict.at("end"), "INT_MAX");
+              begin    = parse_int(source->attrs.dict.at("begin"), "0");
+              end      = parse_int(source->attrs.dict.at("end"), "INT_MAX");
               int axis = std::stoi(source->attrs.dict.at("axis"));
-              begin = build_tuple(axis, begin, "0");
-              end = build_tuple(axis, end, "INT_MAX");
+              begin    = build_tuple(axis, begin, "0");
+              end      = build_tuple(axis, end, "INT_MAX");
             } else {
               begin = parse_tuple(source->attrs.dict.at("begin"), "0");
-              end = parse_tuple(source->attrs.dict.at("end"), "INT_MAX");
+              end   = parse_tuple(source->attrs.dict.at("end"), "INT_MAX");
             }
             if (check_shapes) {
               if (check_tuple(begin) && check_tuple(end)) {
@@ -339,9 +337,8 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
           if (!check_shapes) {
             slice_func = "fast_" + slice_func;
           }
-          code += "const auto " + vec_name + " = op::" + slice_func + "<nvec>(" +
-                  var_name + ", " + var_name + "_shape," + begin +
-                  "," + end + ", offset);\n";
+          code += "const auto " + vec_name + " = op::" + slice_func + "<nvec>(" + var_name + ", " +
+                  var_name + "_shape," + begin + "," + end + ", offset);\n";
           CHECK_EQ(outputs[i], 1);
           variables[{i, 0}] = vec_name;
           continue;
@@ -351,41 +348,38 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
   }
 
   if (!check_shapes_compile) {
-      check_shapes->clear();
+    check_shapes->clear();
   }
 
   size_t counter = 0;
   for (const auto& entry : g.outputs()) {
     std::string var_name = "output" + std::to_string(counter);
-    code += "vector::VectorizedStorage<DType_" + var_name + \
-            ", nvec> vec_" + var_name + ";\n";
+    code += "vector::VectorizedStorage<DType_" + var_name + ", nvec> vec_" + var_name + ";\n";
     ++counter;
   }
 
   code += "for (int j = 0; j < nvec; j++ ) {\n";
 
-
   for (size_t i = 0; i < g.num_nodes(); ++i) {
-    const auto& node = g[i];
+    const auto& node   = g[i];
     const auto* source = node.source;
     if (source != nullptr) {
       std::string var_name = "temp" + std::to_string(temp_name_counter++);
       if (source->is_variable()) {
         if (load_index[i]) {
-            code += "const auto " + var_name + " = op::load(vec_" +
-                    variables[{i, 0}] + ".scratch_.separate[j]);\n";
-            CHECK_EQ(outputs[i], 1);
-            variables[{i, 0}] = var_name;
+          code += "const auto " + var_name + " = op::load(vec_" + variables[{i, 0}] +
+                  ".scratch_.separate[j]);\n";
+          CHECK_EQ(outputs[i], 1);
+          variables[{i, 0}] = var_name;
         }
       } else {
         std::string op_name = source->op()->name;
         if (fusion::ops_desc.find(op_name) != fusion::ops_desc.end()) {
-          const std::vector<std::vector<std::string>>& op_descs =
-            fusion::ops_desc.at(op_name);
+          const std::vector<std::vector<std::string>>& op_descs = fusion::ops_desc.at(op_name);
           CHECK_EQ(outputs[i], op_descs.size());
           size_t count = 0;
           for (const auto& op_desc : op_descs) {
-            var_name = "temp" + std::to_string(temp_name_counter++);
+            var_name               = "temp" + std::to_string(temp_name_counter++);
             const std::string& fmt = ParseOpDescription(op_desc, variables, node);
             code += "const auto " + var_name + " = " + fmt + ";\n";
             variables[{i, count}] = var_name;
@@ -395,14 +389,12 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
         }
 
         if (fusion::slice_ops.find(op_name) != fusion::slice_ops.end()) {
-          code += "const auto " + var_name +
-                  " = op::load(" + variables[{i, 0}] +
+          code += "const auto " + var_name + " = op::load(" + variables[{i, 0}] +
                   ".scratch_.separate[j]);\n";
           variables[{i, 0}] = var_name;
           continue;
         }
 
-
         // Special cases with variable number
         // of inputs/outputs, listed in
         // fusion::variable_io_ops
@@ -423,15 +415,13 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
           std::string act_type = node.source->attrs.dict.at("act_type");
           std::string ograd, input;
           ograd = variables[{node.inputs[0].node_id, node.inputs[0].index}];
-          if (act_type == "relu" ||
-              act_type == "sigmoid" ||
-              act_type == "tanh") {
+          if (act_type == "relu" || act_type == "sigmoid" || act_type == "tanh") {
             input = variables[{node.inputs[1].node_id, node.inputs[1].index}];
           } else {
             input = variables[{node.inputs[2].node_id, node.inputs[2].index}];
           }
-          code += "const auto " + var_name + " = op::backward_" + act_type +
-                  "(" + ograd + ", " + input + ");\n";
+          code += "const auto " + var_name + " = op::backward_" + act_type + "(" + ograd + ", " +
+                  input + ");\n";
 
           variables[{i, 0}] = var_name;
           continue;
@@ -441,8 +431,8 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
           CHECK_EQ(outputs[i], node.inputs.size());
           for (size_t counter = 0; counter < outputs[i]; ++counter) {
             const auto& input = node.inputs[counter];
-            var_name = "temp" + std::to_string(temp_name_counter++);
-            const auto& arg = variables[{input.node_id, input.index}];
+            var_name          = "temp" + std::to_string(temp_name_counter++);
+            const auto& arg   = variables[{input.node_id, input.index}];
             code += "const auto " + var_name + " = " + arg + ";\n";
             variables[{i, counter}] = var_name;
           }
@@ -452,7 +442,7 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
         if (op_name == "_backward_cast") {
           CHECK_EQ(outputs[i], 1);
           const int output_type = node_dtypes[g.entry_id(i, 0)];
-          const auto& arg = variables[{node.inputs[0].node_id, node.inputs[0].index}];
+          const auto& arg       = variables[{node.inputs[0].node_id, node.inputs[0].index}];
           code += "const auto " + var_name + " = op::cast<" + mshadowTypeToString(output_type) +
                   ">(" + arg + ");\n";
           variables[{i, 0}] = var_name;
@@ -461,38 +451,38 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
 
         // LeakyReLU, look for act_type
         if (op_name == "LeakyReLU") {
-            std::string act_type = node.source->attrs.dict.at("act_type");
-            const std::vector<std::vector<std::string>>& op_descs =
-                fusion::LeakyReLU_ops.at(act_type);
-            if (fusion::LeakyReLU_ops.find(act_type) != fusion::LeakyReLU_ops.end()) {
-              CHECK_EQ(outputs[i], op_descs.size());
-              size_t count = 0;
-              for (const auto& op_desc : op_descs) {
-                var_name = "temp" + std::to_string(temp_name_counter++);
-                const std::string& fmt = ParseOpDescription(op_desc, variables, node);
-                code += "const auto " + var_name + " = " + fmt + ";\n";
-                variables[{i, count}] = var_name;
-                ++count;
-              }
-              continue;
+          std::string act_type = node.source->attrs.dict.at("act_type");
+          const std::vector<std::vector<std::string>>& op_descs =
+              fusion::LeakyReLU_ops.at(act_type);
+          if (fusion::LeakyReLU_ops.find(act_type) != fusion::LeakyReLU_ops.end()) {
+            CHECK_EQ(outputs[i], op_descs.size());
+            size_t count = 0;
+            for (const auto& op_desc : op_descs) {
+              var_name               = "temp" + std::to_string(temp_name_counter++);
+              const std::string& fmt = ParseOpDescription(op_desc, variables, node);
+              code += "const auto " + var_name + " = " + fmt + ";\n";
+              variables[{i, count}] = var_name;
+              ++count;
             }
+            continue;
+          }
         }
         if (op_name == "_backward_LeakyReLU") {
-            std::string act_type = node.source->attrs.dict.at("act_type");
-            const std::vector<std::vector<std::string>>& op_descs =
-                fusion::LeakyReLU_bwd_ops.at(act_type);
-            if (fusion::LeakyReLU_ops.find(act_type) != fusion::LeakyReLU_bwd_ops.end()) {
-              CHECK_EQ(outputs[i], op_descs.size());
-              size_t count = 0;
-              for (const auto& op_desc : op_descs) {
-                var_name = "temp" + std::to_string(temp_name_counter++);
-                const std::string& fmt = ParseOpDescription(op_desc, variables, node);
-                code += "const auto " + var_name + " = " + fmt + ";\n";
-                variables[{i, count}] = var_name;
-                ++count;
-              }
-              continue;
+          std::string act_type = node.source->attrs.dict.at("act_type");
+          const std::vector<std::vector<std::string>>& op_descs =
+              fusion::LeakyReLU_bwd_ops.at(act_type);
+          if (fusion::LeakyReLU_ops.find(act_type) != fusion::LeakyReLU_bwd_ops.end()) {
+            CHECK_EQ(outputs[i], op_descs.size());
+            size_t count = 0;
+            for (const auto& op_desc : op_descs) {
+              var_name               = "temp" + std::to_string(temp_name_counter++);
+              const std::string& fmt = ParseOpDescription(op_desc, variables, node);
+              code += "const auto " + var_name + " = " + fmt + ";\n";
+              variables[{i, count}] = var_name;
+              ++count;
             }
+            continue;
+          }
         }
 
         LOG(FATAL) << "Unrecognized op " + op_name;
@@ -505,8 +495,9 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
   counter = 0;
   for (const auto& entry : g.outputs()) {
     const std::string& var = variables[{entry.node_id, entry.index}];
-    const auto var_name = "output" + std::to_string(counter);
-    code += "vec_" + var_name + ".scratch_.separate[j] = op::store("+ var +", " + var_name + ");\n";
+    const auto var_name    = "output" + std::to_string(counter);
+    code +=
+        "vec_" + var_name + ".scratch_.separate[j] = op::store(" + var + ", " + var_name + ");\n";
     ++counter;
   }
 
@@ -518,12 +509,12 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
     const std::string& var = variables[{entry.node_id, entry.index}];
     if (req[counter] == kWriteTo || req[counter] == kWriteInplace) {
       const auto var_name = "output" + std::to_string(counter);
-      code += "op::store_index(vec_" + var_name + ", i, " + var_name + ", " +
-              var_name + "_shape);\n";
+      code +=
+          "op::store_index(vec_" + var_name + ", i, " + var_name + ", " + var_name + "_shape);\n";
     } else if (req[counter] == kAddTo) {
       const auto var_name = "output" + std::to_string(counter);
-      code += "op::store_add_index(vec_" + var_name + ", i, " + var_name + ", " +
-              var_name + "_shape);\n";
+      code += "op::store_add_index(vec_" + var_name + ", i, " + var_name + ", " + var_name +
+              "_shape);\n";
     } else if (req[counter] == kNullOp) {
       // nullptr req, do not do anything
     } else {
@@ -536,43 +527,43 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
   std::string kernel_params = "";
   std::string tensor_params = "";
   nnvm::Symbol sym;
-  sym.outputs = subgraph_.outputs;
+  sym.outputs                                = subgraph_.outputs;
   const std::vector<std::string> input_names = sym.ListInputNames(nnvm::Symbol::kAll);
-  size_t num_params = in_dtypes.size() + out_dtypes.size();
-  size_t i = 0;
+  size_t num_params                          = in_dtypes.size() + out_dtypes.size();
+  size_t i                                   = 0;
   std::string aux_code = "static const int nvec = " + std::to_string(nvec) + ";\n";
 
-  for (const auto &shape_id : extra_shape_args_) {
-      std::string shape_name = "extra_" + std::to_string(shape_id) + "_shape";
-      int ndim = node_shapes[shape_id].ndim();
-      kernel_params += " const op::Shape<" + std::to_string(ndim) + "> " + shape_name;
-      kernel_params += ", ";
+  for (const auto& shape_id : extra_shape_args_) {
+    std::string shape_name = "extra_" + std::to_string(shape_id) + "_shape";
+    int ndim               = node_shapes[shape_id].ndim();
+    kernel_params += " const op::Shape<" + std::to_string(ndim) + "> " + shape_name;
+    kernel_params += ", ";
   }
-  for (const auto &type : in_dtypes) {
+  for (const auto& type : in_dtypes) {
     std::string type_name = mshadowTypeToString(type);
     std::string dtype_var = "DType_" + input_names[i];
-    std::string dim_var = "ndim_" + input_names[i];
-    std::string dim_val = std::to_string(in_ndims[i]);
-    aux_code = "using " + dtype_var + " = " + type_name + ";\n" + aux_code;
-    aux_code = "static const int " + dim_var + " = " + dim_val + ";\n" + aux_code;
-    tensor_params += dtype_var + "* " +input_names[i];
-    kernel_params += " const op::Shape<" + dim_val + "> " + input_names[i]+"_shape";
+    std::string dim_var   = "ndim_" + input_names[i];
+    std::string dim_val   = std::to_string(in_ndims[i]);
+    aux_code              = "using " + dtype_var + " = " + type_name + ";\n" + aux_code;
+    aux_code              = "static const int " + dim_var + " = " + dim_val + ";\n" + aux_code;
+    tensor_params += dtype_var + "* " + input_names[i];
+    kernel_params += " const op::Shape<" + dim_val + "> " + input_names[i] + "_shape";
     ++i;
     if (i < num_params) {
       tensor_params += ", ";
     }
     kernel_params += ", ";
   }
-  for (const auto &type : out_dtypes) {
+  for (const auto& type : out_dtypes) {
     std::string type_name = mshadowTypeToString(type);
-    std::string out_name = "output" + std::to_string(i - in_dtypes.size());
+    std::string out_name  = "output" + std::to_string(i - in_dtypes.size());
     std::string dtype_var = "DType_" + out_name;
-    std::string dim_var = "ndim_" + out_name;
-    std::string dim_val = std::to_string(out_ndims[i - in_dtypes.size()]);
-    aux_code = "static const int " + dim_var + " = " + dim_val + ";\n" + aux_code;
-    aux_code = "using " + dtype_var + " = " + type_name + ";\n" + aux_code;
+    std::string dim_var   = "ndim_" + out_name;
+    std::string dim_val   = std::to_string(out_ndims[i - in_dtypes.size()]);
+    aux_code              = "static const int " + dim_var + " = " + dim_val + ";\n" + aux_code;
+    aux_code              = "using " + dtype_var + " = " + type_name + ";\n" + aux_code;
     tensor_params += dtype_var + "* " + out_name;
-    kernel_params += " const op::Shape<" + dim_val + "> " + out_name+"_shape";
+    kernel_params += " const op::Shape<" + dim_val + "> " + out_name + "_shape";
     ++i;
     if (i < num_params) {
       tensor_params += ", ";
@@ -582,29 +573,24 @@ std::string FusedOp::GenerateCode(const std::vector<OpReqType> &req,
   kernel_params += tensor_params;
 
   // Create kernel source (minus the common header)
-  return aux_code + "\n" +
-         "__launch_bounds__(" + std::to_string(FusedOp::NTHREADS) + ")\n" +
-         "__global__ void FusedKernel_" + kernel_name +
-         "(size_t N, " + kernel_params + ") {\n" +
-         fusion::kernel_begin + "\n" +
-         code + "\n" +
-         fusion::kernel_end;
+  return aux_code + "\n" + "__launch_bounds__(" + std::to_string(FusedOp::NTHREADS) + ")\n" +
+         "__global__ void FusedKernel_" + kernel_name + "(size_t N, " + kernel_params + ") {\n" +
+         fusion::kernel_begin + "\n" + code + "\n" + fusion::kernel_end;
 }
 
-CUfunction FusedOp::CompileCode(const std::string &code,
-                                const std::string &kernel_name,
+CUfunction FusedOp::CompileCode(const std::string& code,
+                                const std::string& kernel_name,
                                 int dev_id) {
   return common::cuda::rtc::get_function(code, "FusedKernel_" + kernel_name, "", dev_id);
 }
 
-
-void FusedOp::CheckShapesAndTypes(const std::vector<TBlob> &inputs,
-                                  const std::vector<TBlob> &outputs,
-                                  std::vector<int> *in_dtypes,
-                                  std::vector<int> *in_ndims,
-                                  std::vector<int> *out_dtypes,
-                                  std::vector<int> *out_ndims,
-                                  int *nvec) {
+void FusedOp::CheckShapesAndTypes(const std::vector<TBlob>& inputs,
+                                  const std::vector<TBlob>& outputs,
+                                  std::vector<int>* in_dtypes,
+                                  std::vector<int>* in_ndims,
+                                  std::vector<int>* out_dtypes,
+                                  std::vector<int>* out_ndims,
+                                  int* nvec) {
   std::vector<mxnet::TShape> in_shapes;
   std::vector<mxnet::TShape> out_shapes;
   CHECK_EQ(inputs.size(), inputs_.size());
@@ -615,11 +601,11 @@ void FusedOp::CheckShapesAndTypes(const std::vector<TBlob> &inputs,
     in_dtypes->push_back(blob.type_flag_);
     in_ndims->push_back(blob.ndim());
     in_shapes.push_back(blob.shape_);
-    initialized_ = initialized_ && blob.type_flag_ == inputs_[counter].dtype;
-    initialized_ = initialized_ && blob.ndim() == inputs_[counter].ndim;
+    initialized_           = initialized_ && blob.type_flag_ == inputs_[counter].dtype;
+    initialized_           = initialized_ && blob.ndim() == inputs_[counter].ndim;
     inputs_[counter].dtype = blob.type_flag_;
-    inputs_[counter].ndim = blob.ndim();
-    *nvec = max(*nvec, mshadowTypeToVectorLength(blob.type_flag_));
+    inputs_[counter].ndim  = blob.ndim();
+    *nvec                  = max(*nvec, mshadowTypeToVectorLength(blob.type_flag_));
   }
 
   for (size_t counter = 0; counter < outputs.size(); ++counter) {
@@ -627,24 +613,20 @@ void FusedOp::CheckShapesAndTypes(const std::vector<TBlob> &inputs,
     out_dtypes->push_back(blob.type_flag_);
     out_ndims->push_back(blob.ndim());
     out_shapes.push_back(blob.shape_);
-    initialized_ = initialized_ && blob.type_flag_ == outputs_[counter].dtype;
-    initialized_ = initialized_ && blob.ndim() == outputs_[counter].ndim;
+    initialized_            = initialized_ && blob.type_flag_ == outputs_[counter].dtype;
+    initialized_            = initialized_ && blob.ndim() == outputs_[counter].ndim;
     outputs_[counter].dtype = blob.type_flag_;
-    outputs_[counter].ndim = blob.ndim();
-    *nvec = max(*nvec, mshadowTypeToVectorLength(blob.type_flag_));
+    outputs_[counter].ndim  = blob.ndim();
+    *nvec                   = max(*nvec, mshadowTypeToVectorLength(blob.type_flag_));
   }
 
-  for (auto it = intermediate_shapes_.begin();
-       it != intermediate_shapes_.end();
-       ++it) {
+  for (auto it = intermediate_shapes_.begin(); it != intermediate_shapes_.end(); ++it) {
     if (it->input_attr == in_shapes && it->output_attr == out_shapes) {
       intermediate_shapes_.erase(intermediate_shapes_.begin(), it);
       break;
     }
   }
-  for (auto it = intermediate_dtypes_.begin();
-       it != intermediate_dtypes_.end();
-       ++it) {
+  for (auto it = intermediate_dtypes_.begin(); it != intermediate_dtypes_.end(); ++it) {
     if (it->input_attr == *in_dtypes && it->output_attr == *out_dtypes) {
       intermediate_dtypes_.erase(intermediate_dtypes_.begin(), it);
       break;
@@ -654,10 +636,10 @@ void FusedOp::CheckShapesAndTypes(const std::vector<TBlob> &inputs,
 
 template <>
 void FusedOp::Forward<gpu>(const nnvm::NodeAttrs& attrs,
-                           const OpContext &ctx,
-                           const std::vector<TBlob> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &outputs) {
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   std::lock_guard<std::mutex> lock(my_mutex_);
   CHECK_GE(outputs.size(), 1) << "There needs to be at least 1 output.";
@@ -668,8 +650,7 @@ void FusedOp::Forward<gpu>(const nnvm::NodeAttrs& attrs,
   std::vector<int> out_ndims;
   int nvec = 1;
 
-  CheckShapesAndTypes(inputs, outputs, &in_dtypes, &in_ndims,
-                      &out_dtypes, &out_ndims, &nvec);
+  CheckShapesAndTypes(inputs, outputs, &in_dtypes, &in_ndims, &out_dtypes, &out_ndims, &nvec);
 
   const auto& node_shapes = intermediate_shapes_[0].internal_attr;
   const auto& node_dtypes = intermediate_dtypes_[0].internal_attr;
@@ -678,25 +659,41 @@ void FusedOp::Forward<gpu>(const nnvm::NodeAttrs& attrs,
 
   // A change between training and inference modes may require different kernel functions
   initialized_ = initialized_ && (req == saved_reqs_);
-  saved_reqs_ = req;
+  saved_reqs_  = req;
 
   if (!initialized_) {
-    const auto& code = GenerateCode(req, in_dtypes, out_dtypes, in_ndims, out_ndims,
-                       node_shapes, node_dtypes, nvec, attrs.name, &check_shape_args_);
+    const auto& code                    = GenerateCode(req,
+                                    in_dtypes,
+                                    out_dtypes,
+                                    in_ndims,
+                                    out_ndims,
+                                    node_shapes,
+                                    node_dtypes,
+                                    nvec,
+                                    attrs.name,
+                                    &check_shape_args_);
     kernel_functions_[fusion::kGeneral] = CompileCode(code, attrs.name, dev_id);
     if (check_shape_args_.size() > 0) {
-      const auto& code = GenerateCode(req, in_dtypes, out_dtypes, in_ndims, out_ndims,
-                           node_shapes, node_dtypes, nvec, attrs.name, nullptr);
+      const auto& code                           = GenerateCode(req,
+                                      in_dtypes,
+                                      out_dtypes,
+                                      in_ndims,
+                                      out_ndims,
+                                      node_shapes,
+                                      node_dtypes,
+                                      nvec,
+                                      attrs.name,
+                                      nullptr);
       kernel_functions_[fusion::kShapeOptimized] = CompileCode(code, attrs.name, dev_id);
     }
-    initialized_ = true;
+    initialized_            = true;
     kernel_function_dev_id_ = dev_id;
   }
 
   // A change in device would force recompiling, but this is unexpected so signal as an error
   if (dev_id != kernel_function_dev_id_)
     LOG(FATAL) << "Fused op compiled for device " << kernel_function_dev_id_
-               <<  ", not expecting switch to device " << dev_id;
+               << ", not expecting switch to device " << dev_id;
 
   Stream<gpu>* s = ctx.get_stream<gpu>();
   std::vector<const void*> args;
@@ -704,7 +701,7 @@ void FusedOp::Forward<gpu>(const nnvm::NodeAttrs& attrs,
   for (const auto& output : outputs) {
     N = std::max(N, output.shape_.Size());
   }
-  N = (N + nvec - 1)/nvec;
+  N = (N + nvec - 1) / nvec;
   args.push_back(&N);
 
   unsigned int num_blocks = (N + FusedOp::NTHREADS - 1) / FusedOp::NTHREADS;
@@ -712,48 +709,49 @@ void FusedOp::Forward<gpu>(const nnvm::NodeAttrs& attrs,
   std::vector<void*> ptrs;
   std::vector<std::vector<int>> shapes;
 
-  for (const auto &shape_id : extra_shape_args_) {
+  for (const auto& shape_id : extra_shape_args_) {
     AddShape(node_shapes[shape_id], &shapes);
   }
-  for (const auto &data : inputs) {
+  for (const auto& data : inputs) {
     AddPointerAndShape(data, &ptrs, &shapes, s);
   }
-  for (const auto &data : outputs) {
+  for (const auto& data : outputs) {
     AddPointerAndShape(data, &ptrs, &shapes, s);
   }
 
-  for (auto &tensor_shapes : shapes) {
+  for (auto& tensor_shapes : shapes) {
     args.push_back(tensor_shapes.data());
   }
-  for (auto &ptr : ptrs) {
-    args.push_back(reinterpret_cast<void *>(&ptr));
+  for (auto& ptr : ptrs) {
+    args.push_back(reinterpret_cast<void*>(&ptr));
   }
   int kernel_variant = fusion::kGeneral;
   if (check_shape_args_.size() > 0) {
     kernel_variant = fusion::kShapeOptimized;
-      for (const auto &shape_id : check_shape_args_) {
-          const auto& shape = node_shapes[shape_id];
-          if (shape[shape.ndim()-1] % nvec != 0) {
-            kernel_variant = fusion::kGeneral;
-          }
+    for (const auto& shape_id : check_shape_args_) {
+      const auto& shape = node_shapes[shape_id];
+      if (shape[shape.ndim() - 1] % nvec != 0) {
+        kernel_variant = fusion::kGeneral;
       }
+    }
   }
   common::cuda::rtc::launch(kernel_functions_[kernel_variant],
                             {num_blocks, 1, 1},
                             {static_cast<unsigned int>(FusedOp::NTHREADS), 1, 1},
-                            0, s, &args);
+                            0,
+                            s,
+                            &args);
 }
 
 void FusedOpForwardGPU(const nnvm::NodeAttrs& attrs,
-                    const OpContext &ctx,
-                    const std::vector<TBlob> &inputs,
-                    const std::vector<OpReqType> &req,
-                    const std::vector<TBlob> &outputs) {
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   const FusedOpPtr& op = nnvm::get<FusedOpPtr>(attrs.parsed);
   op->Forward<gpu>(attrs, ctx, inputs, req, outputs);
 }
 
-NNVM_REGISTER_OP(_FusedOp)
-.set_attr<FCompute>("FCompute<gpu>", FusedOpForwardGPU);
+NNVM_REGISTER_OP(_FusedOp).set_attr<FCompute>("FCompute<gpu>", FusedOpForwardGPU);
 
 }  // namespace mxnet
diff --git a/src/operator/fusion/fused_op.h b/src/operator/fusion/fused_op.h
index bb13309bc9cb..ea569162cebd 100644
--- a/src/operator/fusion/fused_op.h
+++ b/src/operator/fusion/fused_op.h
@@ -33,19 +33,19 @@
 namespace mxnet {
 
 namespace fusion {
-  enum KernelVariants {kGeneral, kShapeOptimized,
-    kNumKernelVariants  // Not a variant- leave this at the end
-  };
+enum KernelVariants {
+  kGeneral,
+  kShapeOptimized,
+  kNumKernelVariants  // Not a variant- leave this at the end
+};
 }
 
 struct FusedOpConfig : public dmlc::Parameter<FusedOpConfig> {
   int num_inputs;
   int num_outputs;
   DMLC_DECLARE_PARAMETER(FusedOpConfig) {
-    DMLC_DECLARE_FIELD(num_inputs)
-    .describe("Number of inputs.");
-    DMLC_DECLARE_FIELD(num_outputs)
-    .describe("Number of outputs.");
+    DMLC_DECLARE_FIELD(num_inputs).describe("Number of inputs.");
+    DMLC_DECLARE_FIELD(num_outputs).describe("Number of outputs.");
   }
 };
 
@@ -70,82 +70,71 @@ class FusedOp {
 
   template <typename xpu>
   void Forward(const nnvm::NodeAttrs& attrs,
-               const OpContext &ctx,
-               const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &outputs);
+               const OpContext& ctx,
+               const std::vector<TBlob>& inputs,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& outputs);
 
-  bool InferShape(const nnvm::NodeAttrs &attrs,
-                  std::vector<mxnet::TShape> *in_attrs,
-                  std::vector<mxnet::TShape> *out_attrs);
+  bool InferShape(const nnvm::NodeAttrs& attrs,
+                  std::vector<mxnet::TShape>* in_attrs,
+                  std::vector<mxnet::TShape>* out_attrs);
 
-  bool InferType(const nnvm::NodeAttrs &attrs,
-                 std::vector<int> *in_attrs,
-                 std::vector<int> *out_attrs);
+  bool InferType(const nnvm::NodeAttrs& attrs,
+                 std::vector<int>* in_attrs,
+                 std::vector<int>* out_attrs);
 
   template <typename Attr>
-  std::tuple<const nnvm::ObjectPtr,
-             std::vector<Attr>,
-             std::vector<Attr>>
-    GetAttrs(const std::string& attr_name,
-             const uint32_t node_id);
+  std::tuple<const nnvm::ObjectPtr, std::vector<Attr>, std::vector<Attr>> GetAttrs(
+      const std::string& attr_name,
+      const uint32_t node_id);
 
   void ProvideShape(const std::vector<nnvm::ObjectPtr>& nodes,
-                    const std::vector<std::vector<mxnet::TShape>> &in_attrs,
-                    const std::vector<std::vector<mxnet::TShape>> &out_attrs) {
-    aux_nodes_ = nodes;
-    aux_in_shapes_ = in_attrs;
+                    const std::vector<std::vector<mxnet::TShape>>& in_attrs,
+                    const std::vector<std::vector<mxnet::TShape>>& out_attrs) {
+    aux_nodes_      = nodes;
+    aux_in_shapes_  = in_attrs;
     aux_out_shapes_ = out_attrs;
   }
 
   void ProvideType(const std::vector<nnvm::ObjectPtr>& nodes,
-                   const std::vector<std::vector<int>> &in_attrs,
-                   const std::vector<std::vector<int>> &out_attrs) {
-    aux_nodes_ = nodes;
-    aux_in_types_ = in_attrs;
+                   const std::vector<std::vector<int>>& in_attrs,
+                   const std::vector<std::vector<int>>& out_attrs) {
+    aux_nodes_     = nodes;
+    aux_in_types_  = in_attrs;
     aux_out_types_ = out_attrs;
   }
 
-  std::tuple<const nnvm::ObjectPtr,
-             std::vector<mxnet::TShape>,
-             std::vector<mxnet::TShape>>
-    GetAuxShape(const int node_id) const {
-    return std::make_tuple(aux_nodes_[node_id],
-                           aux_in_shapes_[node_id],
-                           aux_out_shapes_[node_id]);
+  std::tuple<const nnvm::ObjectPtr, std::vector<mxnet::TShape>, std::vector<mxnet::TShape>>
+  GetAuxShape(const int node_id) const {
+    return std::make_tuple(aux_nodes_[node_id], aux_in_shapes_[node_id], aux_out_shapes_[node_id]);
   }
 
-  std::tuple<const nnvm::ObjectPtr,
-             std::vector<int>,
-             std::vector<int>>
-    GetAuxType(const int node_id) const {
-    return std::make_tuple(aux_nodes_[node_id],
-                           aux_in_types_[node_id],
-                           aux_out_types_[node_id]);
+  std::tuple<const nnvm::ObjectPtr, std::vector<int>, std::vector<int>> GetAuxType(
+      const int node_id) const {
+    return std::make_tuple(aux_nodes_[node_id], aux_in_types_[node_id], aux_out_types_[node_id]);
   }
 
  private:
-  std::string GenerateCode(const std::vector<OpReqType> &req,
-                           const std::vector<int> &in_dtypes,
-                           const std::vector<int> &out_dtypes,
-                           const std::vector<int> &in_ndims,
-                           const std::vector<int> &out_ndims,
-                           const mxnet::ShapeVector &node_shapes,
-                           const std::vector<int> &node_dtypes,
+  std::string GenerateCode(const std::vector<OpReqType>& req,
+                           const std::vector<int>& in_dtypes,
+                           const std::vector<int>& out_dtypes,
+                           const std::vector<int>& in_ndims,
+                           const std::vector<int>& out_ndims,
+                           const mxnet::ShapeVector& node_shapes,
+                           const std::vector<int>& node_dtypes,
                            const int nvec,
                            const std::string& kernel_name,
-                           std::vector<uint32_t> *check_shapes);
+                           std::vector<uint32_t>* check_shapes);
 
-  CUfunction CompileCode(const std::string &code,
-                         const std::string &kernel_name, int dev_id);
+  CUfunction CompileCode(const std::string& code, const std::string& kernel_name, int dev_id);
 
-  void CheckShapesAndTypes(const std::vector<TBlob> &inputs,
-                           const std::vector<TBlob> &outputs,
-                           std::vector<int> *in_dtypes,
-                           std::vector<int> *in_ndims,
-                           std::vector<int> *out_dtypes,
-                           std::vector<int> *out_ndims,
-                           int *nvec);
+  void CheckShapesAndTypes(const std::vector<TBlob>& inputs,
+                           const std::vector<TBlob>& outputs,
+                           std::vector<int>* in_dtypes,
+                           std::vector<int>* in_ndims,
+                           std::vector<int>* out_dtypes,
+                           std::vector<int>* out_ndims,
+                           int* nvec);
 
   std::vector<FusedOpEntry> inputs_;
   std::vector<FusedOpEntry> outputs_;
@@ -165,8 +154,8 @@ class FusedOp {
   // original information stored in subgraph_
   // attributes while the previous iterations
   // still need them.
-  std::vector<IntermediateAttr<mxnet::TShape> > intermediate_shapes_;
-  std::vector<IntermediateAttr<int> > intermediate_dtypes_;
+  std::vector<IntermediateAttr<mxnet::TShape>> intermediate_shapes_;
+  std::vector<IntermediateAttr<int>> intermediate_dtypes_;
 
   std::vector<nnvm::ObjectPtr> aux_nodes_;
   std::vector<std::vector<mxnet::TShape>> aux_in_shapes_;
@@ -191,9 +180,7 @@ struct FusedOpHelperParam {
   FusedOpPtr op;
   uint32_t node_id;
 
-  FusedOpHelperParam(FusedOpPtr op, uint32_t node_id) :
-    op(op),
-    node_id(node_id) {}
+  FusedOpHelperParam(FusedOpPtr op, uint32_t node_id) : op(op), node_id(node_id) {}
 };
 
 using FusedOpHelperParamPtr = std::shared_ptr<FusedOpHelperParam>;
diff --git a/src/operator/grid_generator-inl.h b/src/operator/grid_generator-inl.h
index 31b5ba555551..979fbe1641c6 100644
--- a/src/operator/grid_generator-inl.h
+++ b/src/operator/grid_generator-inl.h
@@ -23,7 +23,7 @@
  * \brief
  * The operator generate sampling grid
  * \author Xu Dong
-*/
+ */
 #ifndef MXNET_OPERATOR_GRID_GENERATOR_INL_H_
 #define MXNET_OPERATOR_GRID_GENERATOR_INL_H_
 
@@ -42,11 +42,11 @@ namespace mxnet {
 namespace op {
 
 namespace grid {
-enum GridGeneratorOpInputs {kData};
-enum GridGeneratorOpOutputs {kOut, kGridDst};
-enum GridGeneratorOpResource {kTempSpace};
-enum GridGeneratorTransformType {kAffine, kWarp};
-}
+enum GridGeneratorOpInputs { kData };
+enum GridGeneratorOpOutputs { kOut, kGridDst };
+enum GridGeneratorOpResource { kTempSpace };
+enum GridGeneratorTransformType { kAffine, kWarp };
+}  // namespace grid
 
 struct GridGeneratorParam : public dmlc::Parameter<GridGeneratorParam> {
   int transform_type;
@@ -54,54 +54,62 @@ struct GridGeneratorParam : public dmlc::Parameter<GridGeneratorParam> {
   DMLC_DECLARE_PARAMETER(GridGeneratorParam) {
     int shape[] = {0, 0};
     DMLC_DECLARE_FIELD(transform_type)
-    .add_enum("affine", grid::kAffine)
-    .add_enum("warp", grid::kWarp)
-    .describe("The type of transformation. For `affine`, input data should be an affine matrix "
-              "of size (batch, 6). For `warp`, input data should be an optical flow of size "
-              "(batch, 2, h, w).");
-    DMLC_DECLARE_FIELD(target_shape).set_default(mxnet::TShape(shape, shape + 2))
-    .describe("Specifies the output shape (H, W). This is required if transformation type is "
-              "`affine`. If transformation type is `warp`, this parameter is ignored.");
+        .add_enum("affine", grid::kAffine)
+        .add_enum("warp", grid::kWarp)
+        .describe(
+            "The type of transformation. For `affine`, input data should be an affine matrix "
+            "of size (batch, 6). For `warp`, input data should be an optical flow of size "
+            "(batch, 2, h, w).");
+    DMLC_DECLARE_FIELD(target_shape)
+        .set_default(mxnet::TShape(shape, shape + 2))
+        .describe(
+            "Specifies the output shape (H, W). This is required if transformation type is "
+            "`affine`. If transformation type is `warp`, this parameter is ignored.");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class GridGeneratorOp : public Operator {
  public:
   explicit GridGeneratorOp(GridGeneratorParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(req[grid::kOut], kWriteTo);
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 2U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     switch (param_.transform_type) {
       case grid::kAffine: {
         // if transform_type is affine, data is affine matrix, input shape : (batch, 2, 3)
-        Tensor<xpu, 2, DType> out = out_data[grid::kOut].
-          get_with_shape<xpu, 2, DType>(Shape2(out_data[grid::kOut].shape_[0] * 2,
-                            out_data[grid::kOut].shape_[2] * out_data[grid::kOut].shape_[3]), s);
+        Tensor<xpu, 2, DType> out = out_data[grid::kOut].get_with_shape<xpu, 2, DType>(
+            Shape2(out_data[grid::kOut].shape_[0] * 2,
+                   out_data[grid::kOut].shape_[2] * out_data[grid::kOut].shape_[3]),
+            s);
         Tensor<xpu, 2, DType> grid_dst = out_data[grid::kGridDst].get<xpu, 2, DType>(s);
-        Shape<2> data_shape = Shape2(out_data[grid::kOut].shape_[0] * 2, 3);
-        Tensor<xpu, 2, DType> data = in_data[grid::kData]
-          .get_with_shape<xpu, 2, DType>(data_shape, s);
+        Shape<2> data_shape            = Shape2(out_data[grid::kOut].shape_[0] * 2, 3);
+        Tensor<xpu, 2, DType> data =
+            in_data[grid::kData].get_with_shape<xpu, 2, DType>(data_shape, s);
         // x, y, 1
         grid_dst[0] = range<DType>(0, grid_dst.shape_[1]);
-        grid_dst[0] = grid_dst[0] - tcast<DType>(tcast<int>(grid_dst[0] /
-          scalar<DType>(param_.target_shape[1]))) * scalar<DType>(param_.target_shape[1]);
-        grid_dst[0] = scalar<DType>(-1.0) + grid_dst[0] *
-          scalar<DType>(2.0 / (param_.target_shape[1] - 1));
+        grid_dst[0] =
+            grid_dst[0] -
+            tcast<DType>(tcast<int>(grid_dst[0] / scalar<DType>(param_.target_shape[1]))) *
+                scalar<DType>(param_.target_shape[1]);
+        grid_dst[0] =
+            scalar<DType>(-1.0) + grid_dst[0] * scalar<DType>(2.0 / (param_.target_shape[1] - 1));
         grid_dst[1] = range<DType>(0, grid_dst.shape_[1]);
-        grid_dst[1] = scalar<DType>(-1.0) + tcast<DType>(tcast<int>(grid_dst[1] /
-          scalar<DType>(param_.target_shape[1]))) * scalar<DType>(2.0/(param_.target_shape[0] - 1));
+        grid_dst[1] =
+            scalar<DType>(-1.0) +
+            tcast<DType>(tcast<int>(grid_dst[1] / scalar<DType>(param_.target_shape[1]))) *
+                scalar<DType>(2.0 / (param_.target_shape[0] - 1));
         grid_dst[2] = scalar<DType>(1.0);
         // Legacy approach shown here for comparison:
         //   Assign(out, req[grid::kOut], dot(data, grid_dst));
@@ -113,47 +121,49 @@ class GridGeneratorOp : public Operator {
         // if transform_type is warp, data is optical flow, input shape : (batch, 2, height, width)
         // grid_src = grid_dst + optical flow
         Tensor<xpu, 4, DType> data = in_data[grid::kData].get<xpu, 4, DType>(s);
-        Tensor<xpu, 4, DType> out = out_data[grid::kOut].get<xpu, 4, DType>(s);
+        Tensor<xpu, 4, DType> out  = out_data[grid::kOut].get<xpu, 4, DType>(s);
         // grid_dst : (2, H, W)
         Tensor<xpu, 3, DType> grid_dst = out_data[grid::kGridDst].get<xpu, 3, DType>(s);
-        Tensor<xpu, 2, DType> workspace = ctx.requested[grid::kTempSpace]
-          .get_space_typed<xpu, 2, DType>(Shape2(2, 1), s);
-        grid_dst[0] = repmat(range<DType>(0, data.size(3)), data.size(2));
-        grid_dst[1] = reshape(range<DType>(0, data.size(2), 1, data.size(3)),
+        Tensor<xpu, 2, DType> workspace =
+            ctx.requested[grid::kTempSpace].get_space_typed<xpu, 2, DType>(Shape2(2, 1), s);
+        grid_dst[0]  = repmat(range<DType>(0, data.size(3)), data.size(2));
+        grid_dst[1]  = reshape(range<DType>(0, data.size(2), 1, data.size(3)),
                               Shape2(data.size(2), data.size(3)));
         workspace[0] = scalar<DType>((DType(data.size(3)) - 1.0) / 2.0);
         workspace[1] = scalar<DType>((DType(data.size(2)) - 1.0) / 2.0);
-        Assign(out, req[grid::kOut],
+        Assign(out,
+               req[grid::kOut],
                (data + broadcast_with_axis(grid_dst, -1, data.shape_[0])) /
-                 broadcast_to(reshape(workspace, Shape4(1, 2, 1, 1)),
-                              mxnet::TShape(data.shape_)) - scalar<DType>(1));
+                       broadcast_to(reshape(workspace, Shape4(1, 2, 1, 1)),
+                                    mxnet::TShape(data.shape_)) -
+                   scalar<DType>(1));
         break;
       }
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 2U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     switch (param_.transform_type) {
       case grid::kAffine: {
         Tensor<xpu, 2, DType> grid_dst = out_data[grid::kGridDst].get<xpu, 2, DType>(s);
-        Shape<2> data_shape = Shape2(in_grad[grid::kData].shape_[0] * 2, 3);
-        Tensor<xpu, 2, DType> gdata = in_grad[grid::kData]
-          .get_with_shape<xpu, 2, DType>(data_shape, s);
+        Shape<2> data_shape            = Shape2(in_grad[grid::kData].shape_[0] * 2, 3);
+        Tensor<xpu, 2, DType> gdata =
+            in_grad[grid::kData].get_with_shape<xpu, 2, DType>(data_shape, s);
         Shape<2> grad_shape = Shape2(out_grad[grid::kOut].shape_[0] * 2,
-          param_.target_shape[0] * param_.target_shape[1]);
-        Tensor<xpu, 2, DType> grad = out_grad[grid::kOut]
-          .get_with_shape<xpu, 2, DType>(grad_shape, s);
+                                     param_.target_shape[0] * param_.target_shape[1]);
+        Tensor<xpu, 2, DType> grad =
+            out_grad[grid::kOut].get_with_shape<xpu, 2, DType>(grad_shape, s);
         // Legacy approach shown here for comparison:
         //   Assign(gdata, req[grid::kData], dot(grad, grid_dst.T()));
         // grad : (batch * 2, H * W)   grid_dst.T : (H * W, 3)
@@ -161,13 +171,14 @@ class GridGeneratorOp : public Operator {
         break;
       }
       case grid::kWarp: {
-        Tensor<xpu, 4, DType> grad = out_grad[grid::kOut].get<xpu, 4, DType>(s);
+        Tensor<xpu, 4, DType> grad  = out_grad[grid::kOut].get<xpu, 4, DType>(s);
         Tensor<xpu, 4, DType> gdata = in_grad[grid::kData].get<xpu, 4, DType>(s);
-        Tensor<xpu, 2, DType> workspace = ctx.requested[grid::kTempSpace]
-          .get_space_typed<xpu, 2, DType>(Shape2(2, 1), s);
+        Tensor<xpu, 2, DType> workspace =
+            ctx.requested[grid::kTempSpace].get_space_typed<xpu, 2, DType>(Shape2(2, 1), s);
         workspace[0] = scalar<DType>((DType(gdata.size(3)) - 1.0) / 2.0);
         workspace[1] = scalar<DType>((DType(gdata.size(2)) - 1.0) / 2.0);
-        Assign(gdata, req[grid::kData],
+        Assign(gdata,
+               req[grid::kData],
                grad / broadcast_to(reshape(workspace, Shape4(1, 2, 1, 1)),
                                    mxnet::TShape(gdata.shape_)));
         break;
@@ -179,7 +190,7 @@ class GridGeneratorOp : public Operator {
   GridGeneratorParam param_;
 };  // class GridGeneratorOp
 
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(GridGeneratorParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -209,32 +220,31 @@ class GridGeneratorProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1U) << "Input:[data]";
-    const mxnet::TShape &lshape = (*in_shape)[grid::kData];
-    if (lshape.ndim() ==  0) return false;
+    const mxnet::TShape& lshape = (*in_shape)[grid::kData];
+    if (lshape.ndim() == 0)
+      return false;
     out_shape->clear();
     switch (param_.transform_type) {
       case grid::kAffine: {
-        CHECK_EQ(lshape.ndim(), 2U) \
-          << "if transform_type is affine, data is affine matrix"
-          "affine matrix should be 2D in batch-num_hidden";
+        CHECK_EQ(lshape.ndim(), 2U) << "if transform_type is affine, data is affine matrix"
+                                       "affine matrix should be 2D in batch-num_hidden";
         CHECK_EQ(lshape[1], 6U) << "incorrect data shape[1], should be 6";
-        CHECK_GT(param_.target_shape[0], 0U) \
+        CHECK_GT(param_.target_shape[0], 0U)
             << "incorrect target_shape: " << param_.target_shape[0];
-        CHECK_GT(param_.target_shape[1], 0U) \
+        CHECK_GT(param_.target_shape[1], 0U)
             << "incorrect target_shape: " << param_.target_shape[1];
         out_shape->push_back(Shape4(lshape[0], 2, param_.target_shape[0], param_.target_shape[1]));
         out_shape->push_back(Shape2(3, param_.target_shape[0] * param_.target_shape[1]));
         break;
       }
       case grid::kWarp: {
-        CHECK_EQ(lshape.ndim(), 4U) \
-          << "if transform_type is warp, data is optical flow"
-             "optical flow should be 4D in batch-num_hidden-y-x";
+        CHECK_EQ(lshape.ndim(), 4U) << "if transform_type is warp, data is optical flow"
+                                       "optical flow should be 4D in batch-num_hidden-y-x";
         CHECK_EQ(lshape[1], 2U) << "incorrect data shape[1], should be 2";
         out_shape->push_back(lshape);
         out_shape->push_back(Shape3(2, lshape[2], lshape[3]));
@@ -244,37 +254,38 @@ class GridGeneratorProp : public OperatorProperty {
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                   std::vector<int> *out_type,
-                   std::vector<int> *aux_type) const override {
-      int dtype = -1;
-      for (int type : *in_type) {
-        if (dtype == -1) {
-          dtype = type;
-        } else {
-          CHECK(type == dtype ||
-              type == -1) <<
-                "Non-uniform data type in GridGenerator";
-        }
-      }
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
+    int dtype = -1;
+    for (int type : *in_type) {
       if (dtype == -1) {
-        LOG(FATAL) << "Not enough information to infer type in GridGenerator.";
-        return false;
+        dtype = type;
+      } else {
+        CHECK(type == dtype || type == -1) << "Non-uniform data type in GridGenerator";
       }
-      size_t nin = this->ListArguments().size();
-      in_type->clear();
-      for (size_t i = 0; i < nin; ++i) in_type->push_back(dtype);
-      size_t naux = this->ListAuxiliaryStates().size();
-      aux_type->clear();
-      for (size_t i = 0; i < naux; ++i) aux_type->push_back(dtype);
-      size_t nout = this->ListOutputs().size();
-      out_type->clear();
-      for (size_t i = 0; i < nout; ++i) out_type->push_back(dtype);
-      return true;
     }
+    if (dtype == -1) {
+      LOG(FATAL) << "Not enough information to infer type in GridGenerator.";
+      return false;
+    }
+    size_t nin = this->ListArguments().size();
+    in_type->clear();
+    for (size_t i = 0; i < nin; ++i)
+      in_type->push_back(dtype);
+    size_t naux = this->ListAuxiliaryStates().size();
+    aux_type->clear();
+    for (size_t i = 0; i < naux; ++i)
+      aux_type->push_back(dtype);
+    size_t nout = this->ListOutputs().size();
+    out_type->clear();
+    for (size_t i = 0; i < nout; ++i)
+      out_type->push_back(dtype);
+    return true;
+  }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new GridGeneratorProp();
+    auto ptr    = new GridGeneratorProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -283,14 +294,12 @@ class GridGeneratorProp : public OperatorProperty {
     return "GridGenerator";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     switch (param_.transform_type) {
       case grid::kAffine: {
-        return {out_grad[grid::kOut],
-                out_data[grid::kGridDst]};
+        return {out_grad[grid::kOut], out_data[grid::kGridDst]};
       }
       case grid::kWarp: {
         return {out_grad[grid::kOut]};
@@ -299,21 +308,19 @@ class GridGeneratorProp : public OperatorProperty {
     return {};
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-    const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     switch (param_.transform_type) {
-    case grid::kAffine: {
-      return{};
-    }
-    case grid::kWarp: {
-      return{ ResourceRequest::kTempSpace };
-    }
+      case grid::kAffine: {
+        return {};
+      }
+      case grid::kWarp: {
+        return {ResourceRequest::kTempSpace};
+      }
     }
-    return{};
+    return {};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     switch (param_.transform_type) {
       case grid::kAffine: {
         return {};
@@ -330,12 +337,13 @@ class GridGeneratorProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   GridGeneratorParam param_;
-};  // class GridGeneratorProp
+};      // class GridGeneratorProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/grid_generator.cc b/src/operator/grid_generator.cc
index b1b6025b01be..22518cf8c5ba 100644
--- a/src/operator/grid_generator.cc
+++ b/src/operator/grid_generator.cc
@@ -22,15 +22,15 @@
  * \file grid_generator.cc
  * \brief
  * \author Xu Dong
-*/
+ */
 
 #include "./grid_generator-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<cpu>(GridGeneratorParam param, int dtype) {
-  Operator *op = nullptr;
+  Operator* op = nullptr;
   if (dtype == mshadow::kFloat32) {
     op = new GridGeneratorOp<cpu, float>(param);
   } else {
@@ -39,17 +39,18 @@ Operator* CreateOp<cpu>(GridGeneratorParam param, int dtype) {
   return op;
 }
 
-Operator *GridGeneratorProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                     std::vector<int> *in_type) const {
+Operator* GridGeneratorProp::CreateOperatorEx(Context ctx,
+                                              mxnet::ShapeVector* in_shape,
+                                              std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(GridGeneratorParam);
 
 MXNET_REGISTER_OP_PROPERTY(GridGenerator, GridGeneratorProp)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the function.")
-.add_arguments(GridGeneratorParam::__FIELDS__())
-.describe("Generates 2D sampling grid for bilinear sampling.");
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the function.")
+    .add_arguments(GridGeneratorParam::__FIELDS__())
+    .describe("Generates 2D sampling grid for bilinear sampling.");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/grid_generator.cu b/src/operator/grid_generator.cu
index e21745b36f60..e4ef47fe3ef2 100644
--- a/src/operator/grid_generator.cu
+++ b/src/operator/grid_generator.cu
@@ -22,18 +22,16 @@
  * \file grid_generator.cu
  * \brief
  * \author Xu Dong
-*/
+ */
 
 #include "./grid_generator-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(GridGeneratorParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new GridGeneratorOp<gpu, DType>(param);
-  })
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new GridGeneratorOp<gpu, DType>(param); })
   return op;
 }
 }  // namespace op
diff --git a/src/operator/identity_attach_KL_sparse_reg-inl.h b/src/operator/identity_attach_KL_sparse_reg-inl.h
index 764853115a2c..bac45dbf6a30 100644
--- a/src/operator/identity_attach_KL_sparse_reg-inl.h
+++ b/src/operator/identity_attach_KL_sparse_reg-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file sparse_reg-inl.h
  * \brief
-*/
+ */
 #ifndef MXNET_OPERATOR_IDENTITY_ATTACH_KL_SPARSE_REG_INL_H_
 #define MXNET_OPERATOR_IDENTITY_ATTACH_KL_SPARSE_REG_INL_H_
 #include <dmlc/logging.h>
@@ -38,10 +38,10 @@ namespace mxnet {
 namespace op {
 
 namespace sparsereg {
-enum IdentityAttachKLSparseRegOpInputs {kData};
-enum IdentityAttachKLSparseRegOpOutputs {kOut};
-enum IdentityAttachKLSparseRegOpAuxiliary {kMovingAvg};
-enum IdentityAttachKLSparseRegBackResource {kTempSpace};
+enum IdentityAttachKLSparseRegOpInputs { kData };
+enum IdentityAttachKLSparseRegOpOutputs { kOut };
+enum IdentityAttachKLSparseRegOpAuxiliary { kMovingAvg };
+enum IdentityAttachKLSparseRegBackResource { kTempSpace };
 }  // namespace sparsereg
 
 struct IdentityAttachKLSparseRegParam : public dmlc::Parameter<IdentityAttachKLSparseRegParam> {
@@ -49,14 +49,14 @@ struct IdentityAttachKLSparseRegParam : public dmlc::Parameter<IdentityAttachKLS
   float sparseness_target;
   float momentum;
   DMLC_DECLARE_PARAMETER(IdentityAttachKLSparseRegParam) {
-    DMLC_DECLARE_FIELD(sparseness_target).set_default(0.1)
-    .set_range(0, 1)
-    .describe("The sparseness target");
-    DMLC_DECLARE_FIELD(penalty).set_default(0.001)
-    .describe("The tradeoff parameter for the sparseness penalty");
-    DMLC_DECLARE_FIELD(momentum).set_default(0.9)
-    .set_range(0, 1)
-    .describe("The momentum for running average");
+    DMLC_DECLARE_FIELD(sparseness_target)
+        .set_default(0.1)
+        .set_range(0, 1)
+        .describe("The sparseness target");
+    DMLC_DECLARE_FIELD(penalty).set_default(0.001).describe(
+        "The tradeoff parameter for the sparseness penalty");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.9).set_range(0, 1).describe(
+        "The momentum for running average");
   }
 };  // struct IdentityAttachKLSparseRegParam
 
@@ -66,57 +66,60 @@ struct IdentityAttachKLSparseRegParam : public dmlc::Parameter<IdentityAttachKLS
 // The regularization is based on the KL divergence of mean activation and target.
 // More details: P11 of https://www.cs.toronto.edu/~hinton/absps/guideTR.pdf
 // Please make sure that it is only paired with sigmoid activation, otherwise NaN may occur.
-template<typename xpu>
+template <typename xpu>
 class IdentityAttachKLSparseRegOp : public Operator {
  public:
   explicit IdentityAttachKLSparseRegOp(IdentityAttachKLSparseRegParam param) {
     this->param_ = param;
   }
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s      = ctx.get_stream<xpu>();
     Tensor<xpu, 2> data = in_data[sparsereg::kData].FlatTo2D<xpu, real_t>(s);
-    Tensor<xpu, 2> out = out_data[sparsereg::kOut].FlatTo2D<xpu, real_t>(s);
+    Tensor<xpu, 2> out  = out_data[sparsereg::kOut].FlatTo2D<xpu, real_t>(s);
     Assign(out, req[sparsereg::kData], F<mshadow_op::identity>(data));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 2> grad_in = in_grad[sparsereg::kData].FlatTo2D<xpu, real_t>(s);
-    Tensor<xpu, 2> data_in = in_data[sparsereg::kData].FlatTo2D<xpu, real_t>(s);
-    Tensor<xpu, 2> grad_out = out_grad[sparsereg::kOut].FlatTo2D<xpu, real_t>(s);
+    Stream<xpu>* s            = ctx.get_stream<xpu>();
+    Tensor<xpu, 2> grad_in    = in_grad[sparsereg::kData].FlatTo2D<xpu, real_t>(s);
+    Tensor<xpu, 2> data_in    = in_data[sparsereg::kData].FlatTo2D<xpu, real_t>(s);
+    Tensor<xpu, 2> grad_out   = out_grad[sparsereg::kOut].FlatTo2D<xpu, real_t>(s);
     Tensor<xpu, 1> moving_avg = aux_args[sparsereg::kMovingAvg].get<xpu, 1, real_t>(s);
-    Tensor<xpu, 1> avg = ctx.requested[sparsereg::kTempSpace].get_space<xpu>(
+    Tensor<xpu, 1> avg        = ctx.requested[sparsereg::kTempSpace].get_space<xpu>(
         mshadow::Shape1(moving_avg.shape_[0]), s);
     avg = sumall_except_dim<1>(data_in);
     avg /= data_in.shape_[0];
     moving_avg = param_.momentum * moving_avg + (1 - param_.momentum) * avg;
-    Assign(grad_in, req[sparsereg::kData], grad_out + param_.penalty *
-      (-param_.sparseness_target / broadcast<1>(moving_avg, data_in.shape_) +
-      ((1 - param_.sparseness_target) / (1 - broadcast<1>(moving_avg, data_in.shape_)))));
+    Assign(grad_in,
+           req[sparsereg::kData],
+           grad_out + param_.penalty *
+                          (-param_.sparseness_target / broadcast<1>(moving_avg, data_in.shape_) +
+                           ((1 - param_.sparseness_target) /
+                            (1 - broadcast<1>(moving_avg, data_in.shape_)))));
   }
 
  private:
   IdentityAttachKLSparseRegParam param_;
 };  // class IdentityAttachKLSparseRegOp
 
-template<typename xpu>
-Operator *CreateOp(IdentityAttachKLSparseRegParam param);
+template <typename xpu>
+Operator* CreateOp(IdentityAttachKLSparseRegParam param);
 
 #if DMLC_USE_CXX11
 class IdentityAttachKLSparseRegProp : public OperatorProperty {
@@ -129,13 +132,14 @@ class IdentityAttachKLSparseRegProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1U);
-    const mxnet::TShape &dshape = in_shape->at(sparsereg::kData);
-    if (dshape.ndim() == 0) return false;
+    const mxnet::TShape& dshape = in_shape->at(sparsereg::kData);
+    if (dshape.ndim() == 0)
+      return false;
     out_shape->clear();
     out_shape->push_back(dshape);
     aux_shape->clear();
@@ -144,7 +148,7 @@ class IdentityAttachKLSparseRegProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new IdentityAttachKLSparseRegProp();
+    auto ptr    = new IdentityAttachKLSparseRegProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -153,33 +157,31 @@ class IdentityAttachKLSparseRegProp : public OperatorProperty {
     return "IdentityAttachKLSparseReg";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-      const std::vector<int> &out_grad,
-      const std::vector<int> &in_data,
-      const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[sparsereg::kOut], in_data[sparsereg::kData]};
   }
 
   std::vector<std::pair<int, void*> > ForwardInplaceOption(
-      const std::vector<int> &in_data,
-      const std::vector<void*> &out_data) const override {
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     return {{in_data[sparsereg::kData], out_data[sparsereg::kOut]}};
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-      const std::vector<int> &out_grad,
-      const std::vector<int> &in_data,
-      const std::vector<int> &out_data,
-      const std::vector<void*> &in_grad) const override {
-    return { {out_grad[sparsereg::kOut], in_grad[sparsereg::kData]} };
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
+    return {{out_grad[sparsereg::kOut], in_grad[sparsereg::kData]}};
   }
 
   std::vector<std::string> ListAuxiliaryStates() const override {
     return {"moving_avg"};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
diff --git a/src/operator/identity_attach_KL_sparse_reg.cc b/src/operator/identity_attach_KL_sparse_reg.cc
index 09e19739cfc1..aa4659fba643 100644
--- a/src/operator/identity_attach_KL_sparse_reg.cc
+++ b/src/operator/identity_attach_KL_sparse_reg.cc
@@ -21,36 +21,37 @@
  * Copyright (c) 2015 by Contributors
  * \file identity_attach_KL_sparse_reg.cc
  * \brief\
-*/
+ */
 #include "./identity_attach_KL_sparse_reg-inl.h"
 #include <nnvm/op_attr_types.h>
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(IdentityAttachKLSparseRegParam param) {
+template <>
+Operator* CreateOp<cpu>(IdentityAttachKLSparseRegParam param) {
   return new IdentityAttachKLSparseRegOp<cpu>(param);
 }
 
-Operator *IdentityAttachKLSparseRegProp::CreateOperator(Context ctx) const {
+Operator* IdentityAttachKLSparseRegProp::CreateOperator(Context ctx) const {
   DO_BIND_DISPATCH(CreateOp, param_);
 }
 
 DMLC_REGISTER_PARAMETER(IdentityAttachKLSparseRegParam);
 
 MXNET_REGISTER_OP_PROPERTY(IdentityAttachKLSparseReg, IdentityAttachKLSparseRegProp)
-.describe("Apply a sparse regularization to the output a sigmoid activation function.")
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_arguments(IdentityAttachKLSparseRegParam::__FIELDS__());
+    .describe("Apply a sparse regularization to the output a sigmoid activation function.")
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_arguments(IdentityAttachKLSparseRegParam::__FIELDS__());
 
 NNVM_REGISTER_OP(IdentityAttachKLSparseReg)
-.set_attr<nnvm::FSetInputVarAttrOnCompose>("FSetInputVarAttrOnCompose",
-    [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
-      if (var->attrs.dict.find("__init__") != var->attrs.dict.end()) return;
-      if (index == 1) {
-        var->attrs.dict["__init__"] = "[\"zero\", {}]";
-      }
-    });
+    .set_attr<nnvm::FSetInputVarAttrOnCompose>(
+        "FSetInputVarAttrOnCompose",
+        [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
+          if (var->attrs.dict.find("__init__") != var->attrs.dict.end())
+            return;
+          if (index == 1) {
+            var->attrs.dict["__init__"] = "[\"zero\", {}]";
+          }
+        });
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/identity_attach_KL_sparse_reg.cu b/src/operator/identity_attach_KL_sparse_reg.cu
index 2ba7916b2b18..517ce1b92532 100644
--- a/src/operator/identity_attach_KL_sparse_reg.cu
+++ b/src/operator/identity_attach_KL_sparse_reg.cu
@@ -21,13 +21,13 @@
  * Copyright (c) 2015 by Contributors
  * \file identity_attach_KL_sparse_reg.cu
  * \brief
-*/
+ */
 #include "./identity_attach_KL_sparse_reg-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<gpu>(IdentityAttachKLSparseRegParam param) {
+template <>
+Operator* CreateOp<gpu>(IdentityAttachKLSparseRegParam param) {
   return new IdentityAttachKLSparseRegOp<gpu>(param);
 }
 
diff --git a/src/operator/image/crop-inl.h b/src/operator/image/crop-inl.h
index 39f72c0be5ea..136725722197 100644
--- a/src/operator/image/crop-inl.h
+++ b/src/operator/image/crop-inl.h
@@ -1,21 +1,21 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
  *  Copyright (c) 2019 by Contributors
@@ -26,7 +26,6 @@
 #ifndef MXNET_OPERATOR_IMAGE_CROP_INL_H_
 #define MXNET_OPERATOR_IMAGE_CROP_INL_H_
 
-
 #include <algorithm>
 #include <vector>
 
@@ -49,43 +48,36 @@ struct CropParam : public dmlc::Parameter<CropParam> {
   int width;
   int height;
   DMLC_DECLARE_PARAMETER(CropParam) {
-    DMLC_DECLARE_FIELD(x)
-    .describe("Left boundary of the cropping area.");
-    DMLC_DECLARE_FIELD(y)
-    .describe("Top boundary of the cropping area.");
-    DMLC_DECLARE_FIELD(width)
-    .describe("Width of the cropping area.");
-    DMLC_DECLARE_FIELD(height)
-    .describe("Height of the cropping area.");
+    DMLC_DECLARE_FIELD(x).describe("Left boundary of the cropping area.");
+    DMLC_DECLARE_FIELD(y).describe("Top boundary of the cropping area.");
+    DMLC_DECLARE_FIELD(width).describe("Width of the cropping area.");
+    DMLC_DECLARE_FIELD(height).describe("Height of the cropping area.");
   }
 };
 
 inline bool CropShape(const nnvm::NodeAttrs& attrs,
-                             std::vector<TShape> *in_attrs,
-                             std::vector<TShape> *out_attrs) {
+                      std::vector<TShape>* in_attrs,
+                      std::vector<TShape>* out_attrs) {
   // input attrs should only be (h, w, c) or (n, h, w, c)
   if (in_attrs->at(0).ndim() == 3U) {
     CHECK((in_attrs->at(0)[2] == 1) || (in_attrs->at(0)[2] == 3))
-      << "Expect channel of the input image is 1 or 3, but got"
-      << in_attrs->at(0)[2];
+        << "Expect channel of the input image is 1 or 3, but got" << in_attrs->at(0)[2];
   } else if (in_attrs->at(0).ndim() == 4U) {
     CHECK((in_attrs->at(0)[3] == 1) || (in_attrs->at(0)[3] == 3))
-      << "Expect channel of the input image is 1 or 3, but got"
-      << in_attrs->at(0)[3];
+        << "Expect channel of the input image is 1 or 3, but got" << in_attrs->at(0)[3];
   } else {
     LOG(FATAL) << "Image Crop expects inputs of 3D (h, w, c) or 4D (n, h, w, c). But got "
-      << in_attrs->at(0).ndim();
+               << in_attrs->at(0).ndim();
   }
 
-  const auto& ishape = (*in_attrs)[0];
+  const auto& ishape     = (*in_attrs)[0];
   const CropParam& param = nnvm::get<CropParam>(attrs.parsed);
 
-  CHECK((param.height > 0) && (param.width > 0))
-    << "Input height and width must be greater than 0";
+  CHECK((param.height > 0) && (param.width > 0)) << "Input height and width must be greater than 0";
   CHECK(param.x + param.width <= ishape[ishape.ndim() - 2])
-    << " x + width should not be greater than input width";
+      << " x + width should not be greater than input width";
   CHECK(param.y + param.height <= ishape[ishape.ndim() - 3])
-    << " y + height should not be greater than input height";
+      << " y + height should not be greater than input height";
   if (ishape.ndim() == 3) {
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, TShape({param.height, param.width, ishape[C]}));
   } else {
@@ -94,22 +86,22 @@ inline bool CropShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void CropImpl(int x,
-                      int y,
-                      int width,
-                      int height,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<TBlob> &outputs,
-                      const OpContext &ctx,
-                      const std::vector<OpReqType> &req) {
+                     int y,
+                     int width,
+                     int height,
+                     const std::vector<TBlob>& inputs,
+                     const std::vector<TBlob>& outputs,
+                     const OpContext& ctx,
+                     const std::vector<OpReqType>& req) {
   using namespace mshadow;
   CHECK_GT(width, 0) << "width <= 0";
   CHECK_GT(height, 0) << "height <= 0";
   const TBlob& data = inputs[0];
-  const TBlob& out = outputs[0];
+  const TBlob& out  = outputs[0];
   MXNET_NDIM_SWITCH(data.ndim(), ndim, {
-    Stream<xpu>* s = ctx.get_stream<xpu>();
+    Stream<xpu>* s                           = ctx.get_stream<xpu>();
     common::StaticArray<index_t, ndim> begin = {0}, step = {1};
     if (ndim == 3) {
       begin[0] = y;
@@ -118,34 +110,39 @@ inline void CropImpl(int x,
       begin[1] = y;
       begin[2] = x;
     }
-    MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        size_t num_threads = out.shape_.FlatTo2D()[0];
-        if (std::is_same<xpu, gpu>::value) {
-          num_threads *= out.shape_.get<ndim>()[ndim - 1];
-        }
-        mxnet_op::Kernel<slice_forward<ndim, Req, xpu>, xpu>::Launch(s, num_threads,
-          out.dptr<DType>(), data.dptr<DType>(),
-          data.shape_.get<ndim>(), out.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                          size_t num_threads = out.shape_.FlatTo2D()[0];
+                          if (std::is_same<xpu, gpu>::value) {
+                            num_threads *= out.shape_.get<ndim>()[ndim - 1];
+                          }
+                          mxnet_op::Kernel<slice_forward<ndim, Req, xpu>, xpu>::Launch(
+                              s,
+                              num_threads,
+                              out.dptr<DType>(),
+                              data.dptr<DType>(),
+                              data.shape_.get<ndim>(),
+                              out.shape_.get<ndim>(),
+                              begin,
+                              step);
+                        })})
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void CropBackwardImpl(int x,
-                      int y,
-                      int width,
-                      int height,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<TBlob> &outputs,
-                      const OpContext &ctx,
-                      const std::vector<OpReqType> &req) {
+                             int y,
+                             int width,
+                             int height,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<TBlob>& outputs,
+                             const OpContext& ctx,
+                             const std::vector<OpReqType>& req) {
   using namespace mshadow;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   const TBlob& output_grad = inputs[0];
-  const TBlob& input_grad = outputs[0];
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob& input_grad  = outputs[0];
+  Stream<xpu>* s           = ctx.get_stream<xpu>();
   if (req[0] == kWriteTo) {
     Fill(s, input_grad, req[0], 0);
   } else if (req[0] == kWriteInplace) {
@@ -160,37 +157,41 @@ inline void CropBackwardImpl(int x,
       begin[1] = y;
       begin[2] = x;
     }
-    MSHADOW_TYPE_SWITCH(output_grad.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        size_t num_threads = output_grad.shape_.FlatTo2D()[0];
-        if (std::is_same<xpu, gpu>::value) {
-          num_threads *= output_grad.shape_.get<ndim>()[ndim - 1];
-        }
-        mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(s, num_threads,
-          input_grad.dptr<DType>(), output_grad.dptr<DType>(),
-          input_grad.shape_.get<ndim>(), output_grad.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(output_grad.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                          size_t num_threads = output_grad.shape_.FlatTo2D()[0];
+                          if (std::is_same<xpu, gpu>::value) {
+                            num_threads *= output_grad.shape_.get<ndim>()[ndim - 1];
+                          }
+                          mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(
+                              s,
+                              num_threads,
+                              input_grad.dptr<DType>(),
+                              output_grad.dptr<DType>(),
+                              input_grad.shape_.get<ndim>(),
+                              output_grad.shape_.get<ndim>(),
+                              begin,
+                              step);
+                        })})
   })
 }
 
-template<typename xpu>
-inline void CropOpForward(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void CropOpForward(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   const CropParam& param = nnvm::get<CropParam>(attrs.parsed);
   CropImpl<xpu>(param.x, param.y, param.width, param.height, inputs, outputs, ctx, req);
 }
 
-template<typename xpu>
-inline void CropOpBackward(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void CropOpBackward(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   const CropParam& param = nnvm::get<CropParam>(attrs.parsed);
   CropBackwardImpl<xpu>(param.x, param.y, param.width, param.height, inputs, outputs, ctx, req);
@@ -203,17 +204,16 @@ struct RandomCropParam : public dmlc::Parameter<RandomCropParam> {
   int height;
   int interp;
   DMLC_DECLARE_PARAMETER(RandomCropParam) {
-    DMLC_DECLARE_FIELD(xrange).set_default(Tuple<float>({0.f, 1.f}))
-    .describe("Left boundaries of the cropping area.");
-    DMLC_DECLARE_FIELD(yrange).set_default(Tuple<float>({0.f, 1.f}))
-    .describe("Top boundaries of the cropping area.");
-    DMLC_DECLARE_FIELD(width)
-    .describe("The target image width");
-    DMLC_DECLARE_FIELD(height)
-    .describe("The target image height.");
-    DMLC_DECLARE_FIELD(interp)
-    .set_default(1)
-    .describe("Interpolation method for resizing. By default uses bilinear interpolation"
+    DMLC_DECLARE_FIELD(xrange)
+        .set_default(Tuple<float>({0.f, 1.f}))
+        .describe("Left boundaries of the cropping area.");
+    DMLC_DECLARE_FIELD(yrange)
+        .set_default(Tuple<float>({0.f, 1.f}))
+        .describe("Top boundaries of the cropping area.");
+    DMLC_DECLARE_FIELD(width).describe("The target image width");
+    DMLC_DECLARE_FIELD(height).describe("The target image height.");
+    DMLC_DECLARE_FIELD(interp).set_default(1).describe(
+        "Interpolation method for resizing. By default uses bilinear interpolation"
         "Options are INTER_NEAREST - a nearest-neighbor interpolation"
         "INTER_LINEAR - a bilinear interpolation"
         "INTER_AREA - resampling using pixel area relation"
@@ -231,7 +231,7 @@ inline Tuple<int> GetSourceSize(const TShape& in_shape) {
     ret = Tuple<int>({static_cast<int>(in_shape[kW]), static_cast<int>(in_shape[kH])});
   } else {
     LOG(FATAL) << "Image RandomCrop expects inputs of 3D (h, w, c) or 4D (n, h, w, c). But got "
-      << in_shape.ndim();
+               << in_shape.ndim();
   }
   return ret;
 }
@@ -239,8 +239,8 @@ inline Tuple<int> GetSourceSize(const TShape& in_shape) {
 inline Tuple<int> ScaleDown(const Tuple<int>& src_shape, const Tuple<int>& shape) {
   float sw = src_shape[0];
   float sh = src_shape[1];
-  float w = shape[0];
-  float h = shape[1];
+  float w  = shape[0];
+  float h  = shape[1];
   if (sh < h) {
     w = w * sh / h;
     h = sh;
@@ -253,33 +253,30 @@ inline Tuple<int> ScaleDown(const Tuple<int>& src_shape, const Tuple<int>& shape
 }
 
 inline bool RandomCropShape(const nnvm::NodeAttrs& attrs,
-                             std::vector<TShape> *in_attrs,
-                             std::vector<TShape> *out_attrs) {
+                            std::vector<TShape>* in_attrs,
+                            std::vector<TShape>* out_attrs) {
   // input attrs should only be (h, w, c) or (n, h, w, c)
   if (in_attrs->at(0).ndim() == 3U) {
     CHECK((in_attrs->at(0)[2] == 1) || (in_attrs->at(0)[2] == 3))
-      << "Expect channel of the input image is 1 or 3, but got"
-      << in_attrs->at(0)[2];
+        << "Expect channel of the input image is 1 or 3, but got" << in_attrs->at(0)[2];
   } else if (in_attrs->at(0).ndim() == 4U) {
     CHECK((in_attrs->at(0)[3] == 1) || (in_attrs->at(0)[3] == 3))
-      << "Expect channel of the input image is 1 or 3, but got"
-      << in_attrs->at(0)[3];
+        << "Expect channel of the input image is 1 or 3, but got" << in_attrs->at(0)[3];
   } else {
     LOG(FATAL) << "Image RandomCrop expects inputs of 3D (h, w, c) or 4D (n, h, w, c). But got "
-      << in_attrs->at(0).ndim();
+               << in_attrs->at(0).ndim();
   }
 
-  const auto& ishape = (*in_attrs)[0];
+  const auto& ishape           = (*in_attrs)[0];
   const RandomCropParam& param = nnvm::get<RandomCropParam>(attrs.parsed);
 
-  CHECK((param.height > 0) && (param.width > 0))
-    << "Input height and width must be greater than 0";
+  CHECK((param.height > 0) && (param.width > 0)) << "Input height and width must be greater than 0";
   CHECK((param.xrange.ndim() == 2) && (param.yrange.ndim() == 2))
-    << "Param xrange and yrange must have two values each";
+      << "Param xrange and yrange must have two values each";
   CHECK((param.xrange[0] <= param.xrange[1]) && (param.xrange[0] >= 0) && (param.xrange[1] <= 1))
-    << "Invalid xrange, range should be within 0 and 1.0. Given: " << param.xrange;
+      << "Invalid xrange, range should be within 0 and 1.0. Given: " << param.xrange;
   CHECK((param.yrange[0] <= param.yrange[1]) && (param.yrange[0] >= 0) && (param.yrange[1] <= 1))
-    << "Invalid yrange, range should be within 0 and 1.0. Given: " << param.yrange;
+      << "Invalid yrange, range should be within 0 and 1.0. Given: " << param.yrange;
 
   // real output
   if (ishape.ndim() == 3) {
@@ -289,45 +286,45 @@ inline bool RandomCropShape(const nnvm::NodeAttrs& attrs,
   }
 
   // temp output
-  auto src_shape = GetSourceSize(ishape);
+  auto src_shape    = GetSourceSize(ishape);
   auto scaled_shape = ScaleDown(src_shape, Tuple<int>({param.width, param.height}));
   if (ishape.ndim() == 3) {
-    SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape(
-      {scaled_shape[1], scaled_shape[0], ishape[C]}));
+    SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape({scaled_shape[1], scaled_shape[0], ishape[C]}));
   } else {
-    SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape(
-      {ishape[N], scaled_shape[1], scaled_shape[0], ishape[kC]}));
+    SHAPE_ASSIGN_CHECK(
+        *out_attrs, 1, TShape({ishape[N], scaled_shape[1], scaled_shape[0], ishape[kC]}));
   }
   return true;
 }
 
-template<typename xpu>
-inline void RandomCropOpForward(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void RandomCropOpForward(const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const std::vector<TBlob>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 2U) << "out, temp";
   CHECK_EQ(inputs.size(), 1U);
   const RandomCropParam& param = nnvm::get<RandomCropParam>(attrs.parsed);
 
   const TShape& dshape = inputs[0].shape_;
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, real_t>(s);
-  auto src_size = GetSourceSize(dshape);
-  auto resize_size = GetSourceSize(outputs[1].shape_);
+  Stream<cpu>* s       = ctx.get_stream<cpu>();
+  Random<cpu>* prnd    = ctx.requested[0].get_random<cpu, real_t>(s);
+  auto src_size        = GetSourceSize(dshape);
+  auto resize_size     = GetSourceSize(outputs[1].shape_);
   // random left/top position
-  float x = std::uniform_real_distribution<float>(
-    param.xrange[0], param.xrange[1])(prnd->GetRndEngine()) * (src_size[0] - resize_size[0]);
-  float y = std::uniform_real_distribution<float>(
-    param.yrange[0], param.yrange[1])(prnd->GetRndEngine()) * (src_size[1] - resize_size[1]);
+  float x = std::uniform_real_distribution<float>(param.xrange[0],
+                                                  param.xrange[1])(prnd->GetRndEngine()) *
+            (src_size[0] - resize_size[0]);
+  float y = std::uniform_real_distribution<float>(param.yrange[0],
+                                                  param.yrange[1])(prnd->GetRndEngine()) *
+            (src_size[1] - resize_size[1]);
   // write x, y, w, h to temp workspace
-  Tensor<cpu, 1> workspace = ctx.requested[1].get_space<cpu>(
-    mshadow::Shape1(4), s);
-  workspace.dptr_[0] = x;
-  workspace.dptr_[1] = y;
-  workspace.dptr_[2] = resize_size[0];
-  workspace.dptr_[3] = resize_size[1];
+  Tensor<cpu, 1> workspace = ctx.requested[1].get_space<cpu>(mshadow::Shape1(4), s);
+  workspace.dptr_[0]       = x;
+  workspace.dptr_[1]       = y;
+  workspace.dptr_[2]       = resize_size[0];
+  workspace.dptr_[3]       = resize_size[1];
   if (resize_size[0] == src_size[0] && resize_size[1] == src_size[1]) {
     // no need to resize
     CropImpl<xpu>(x, y, resize_size[0], resize_size[1], inputs, outputs, ctx, req);
@@ -335,23 +332,23 @@ inline void RandomCropOpForward(const nnvm::NodeAttrs &attrs,
     std::vector<TBlob> hidden_outputs = {outputs[1]};
     CropImpl<xpu>(x, y, resize_size[0], resize_size[1], inputs, hidden_outputs, ctx, req);
     ResizeParam rparam;
-    rparam.interp = param.interp;
+    rparam.interp     = param.interp;
     rparam.keep_ratio = false;
-    rparam.size = Tuple<int>({param.width, param.height});
+    rparam.size       = Tuple<int>({param.width, param.height});
     ResizeImplWrapper<xpu>(rparam, ctx, hidden_outputs, outputs);
   }
 }
 
-template<typename xpu>
-inline void RandomCropOpBackward(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void RandomCropOpBackward(const nnvm::NodeAttrs& attrs,
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs.size(), 2U);
-  Tensor<cpu, 1> workspace = ctx.requested[1].get_space<cpu>(
-    mshadow::Shape1(4), ctx.get_stream<cpu>());
+  Tensor<cpu, 1> workspace =
+      ctx.requested[1].get_space<cpu>(mshadow::Shape1(4), ctx.get_stream<cpu>());
   auto ptr = workspace.dptr_;
   CropBackwardImpl<xpu>(ptr[0], ptr[1], ptr[2], ptr[3], inputs, outputs, ctx, req);
 }
@@ -364,73 +361,76 @@ struct RandomResizedCropParam : public dmlc::Parameter<RandomResizedCropParam> {
   int interp;
   int max_trial;
   DMLC_DECLARE_PARAMETER(RandomResizedCropParam) {
-    DMLC_DECLARE_FIELD(width)
-    .describe("The target image width");
-    DMLC_DECLARE_FIELD(height)
-    .describe("The target image height.");
-    DMLC_DECLARE_FIELD(area).set_default(Tuple<float>({0.08f, 1.f}))
-    .describe("Range of cropping area percentage.");
-    DMLC_DECLARE_FIELD(ratio).set_default(Tuple<float>({3 / 4.f, 4 / 3.f}))
-    .describe("Range of aspect ratio of the randomly cropped area.");
-    DMLC_DECLARE_FIELD(interp)
-    .set_default(1)
-    .describe("Interpolation method for resizing. By default uses bilinear interpolation"
+    DMLC_DECLARE_FIELD(width).describe("The target image width");
+    DMLC_DECLARE_FIELD(height).describe("The target image height.");
+    DMLC_DECLARE_FIELD(area)
+        .set_default(Tuple<float>({0.08f, 1.f}))
+        .describe("Range of cropping area percentage.");
+    DMLC_DECLARE_FIELD(ratio)
+        .set_default(Tuple<float>({3 / 4.f, 4 / 3.f}))
+        .describe("Range of aspect ratio of the randomly cropped area.");
+    DMLC_DECLARE_FIELD(interp).set_default(1).describe(
+        "Interpolation method for resizing. By default uses bilinear interpolation"
         "Options are INTER_NEAREST - a nearest-neighbor interpolation"
         "INTER_LINEAR - a bilinear interpolation"
         "INTER_AREA - resampling using pixel area relation"
         "INTER_CUBIC - a bicubic interpolation over 4x4 pixel neighborhood"
         "INTER_LANCZOS4 - a Lanczos interpolation over 8x8 pixel neighborhood"
         "Note that the GPU version only support bilinear interpolation(1)");
-    DMLC_DECLARE_FIELD(max_trial).set_default(10)
-    .describe("Max trial before fallback to center crop.");
+    DMLC_DECLARE_FIELD(max_trial).set_default(10).describe(
+        "Max trial before fallback to center crop.");
   }
 };
 
 inline bool RandomResizedCropShape(const nnvm::NodeAttrs& attrs,
-                                 mxnet::ShapeVector *in_attrs,
-                                 mxnet::ShapeVector *out_attrs) {
+                                   mxnet::ShapeVector* in_attrs,
+                                   mxnet::ShapeVector* out_attrs) {
   const RandomResizedCropParam& param = nnvm::get<RandomResizedCropParam>(attrs.parsed);
   ResizeParam resize_param;
-  resize_param.size = mxnet::Tuple<int>({param.width, param.height});
+  resize_param.size       = mxnet::Tuple<int>({param.width, param.height});
   resize_param.keep_ratio = false;
-  resize_param.interp = param.interp;
+  resize_param.interp     = param.interp;
   return ResizeShapeImpl(resize_param, in_attrs, out_attrs);
 }
 
-template<typename xpu>
-inline void CropResizeImpl(const OpContext &ctx,
-                           const std::vector<TBlob> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &outputs,
-                           int x0, int y0, int crop_width, int crop_height,
-                           int resize_width, int resize_height, int interp) {
-  auto& dshape = inputs[0].shape_;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  CHECK(x0 >= 0 && y0 >= 0 && crop_width > 0 &&
-        crop_height > 0 && resize_width > 0 && resize_height > 0)
-    << "Invalid crop resize arguments: " << x0 << ", " << y0 << ", "
-    << crop_width << ", " << crop_height
-    << ", " << resize_width << ", " << resize_height;
+template <typename xpu>
+inline void CropResizeImpl(const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs,
+                           int x0,
+                           int y0,
+                           int crop_width,
+                           int crop_height,
+                           int resize_width,
+                           int resize_height,
+                           int interp) {
+  auto& dshape   = inputs[0].shape_;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
+  CHECK(x0 >= 0 && y0 >= 0 && crop_width > 0 && crop_height > 0 && resize_width > 0 &&
+        resize_height > 0)
+      << "Invalid crop resize arguments: " << x0 << ", " << y0 << ", " << crop_width << ", "
+      << crop_height << ", " << resize_width << ", " << resize_height;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
     if (dshape.ndim() == 3) {
       Tensor<xpu, 3, DType> workspace = ctx.requested[1].get_space_typed<xpu, 3, DType>(
-         mshadow::Shape3(crop_height, crop_width, dshape[C]), s);
+          mshadow::Shape3(crop_height, crop_width, dshape[C]), s);
       std::vector<TBlob> temp_out = {TBlob(workspace)};
       CropImpl<xpu>(x0, y0, crop_width, crop_height, inputs, temp_out, ctx, req);
       ResizeParam rparam;
-      rparam.interp = interp;
+      rparam.interp     = interp;
       rparam.keep_ratio = false;
-      rparam.size = Tuple<int>({resize_width, resize_height});
+      rparam.size       = Tuple<int>({resize_width, resize_height});
       ResizeImplWrapper<xpu>(rparam, ctx, temp_out, outputs);
     } else if (dshape.ndim() == 4) {
       Tensor<xpu, 4, DType> workspace = ctx.requested[1].get_space_typed<xpu, 4, DType>(
-         mshadow::Shape4(dshape[N], crop_height, crop_width, dshape[kC]), s);
+          mshadow::Shape4(dshape[N], crop_height, crop_width, dshape[kC]), s);
       std::vector<TBlob> temp_out = {TBlob(workspace)};
       CropImpl<xpu>(x0, y0, crop_width, crop_height, inputs, temp_out, ctx, req);
       ResizeParam rparam;
-      rparam.interp = interp;
+      rparam.interp     = interp;
       rparam.keep_ratio = false;
-      rparam.size = Tuple<int>({resize_width, resize_height});
+      rparam.size       = Tuple<int>({resize_width, resize_height});
       ResizeImplWrapper<xpu>(rparam, ctx, temp_out, outputs);
     } else {
       LOG(FATAL) << "Crop only supports image with 3 or 4 dims, given " << dshape.ndim();
@@ -438,64 +438,82 @@ inline void CropResizeImpl(const OpContext &ctx,
   });
 }
 
-template<typename xpu>
-inline void RandomResizedCropOpForward(const nnvm::NodeAttrs &attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<TBlob> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void RandomResizedCropOpForward(const nnvm::NodeAttrs& attrs,
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs.size(), 1U);
   const RandomResizedCropParam& param = nnvm::get<RandomResizedCropParam>(attrs.parsed);
-  auto src_size = GetSourceSize(inputs[0].shape_);
-  int64_t src_area = src_size[0] * src_size[1];
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, real_t>(s);
+  auto src_size                       = GetSourceSize(inputs[0].shape_);
+  int64_t src_area                    = src_size[0] * src_size[1];
+  Stream<cpu>* s                      = ctx.get_stream<cpu>();
+  Random<cpu>* prnd                   = ctx.requested[0].get_random<cpu, real_t>(s);
   for (int i = 0; i < param.max_trial; ++i) {
-    float target_area = std::uniform_real_distribution<float>(
-      param.area[0], param.area[1])(prnd->GetRndEngine()) * src_area;
-    float log_ratio_low = std::log(param.ratio[0]);
+    float target_area =
+        std::uniform_real_distribution<float>(param.area[0], param.area[1])(prnd->GetRndEngine()) *
+        src_area;
+    float log_ratio_low  = std::log(param.ratio[0]);
     float log_ratio_high = std::log(param.ratio[1]);
-    float new_ratio = std::exp(std::uniform_real_distribution<float>(
-      log_ratio_low, log_ratio_high)(prnd->GetRndEngine()));
+    float new_ratio      = std::exp(
+        std::uniform_real_distribution<float>(log_ratio_low, log_ratio_high)(prnd->GetRndEngine()));
     int new_w = static_cast<int>(std::round(std::sqrt(target_area * new_ratio)));
     int new_h = static_cast<int>(std::round(std::sqrt(target_area / new_ratio)));
     if (new_w <= src_size[0] && new_h <= src_size[1]) {
-      int x0 = std::uniform_real_distribution<float>(0, 1)(
-        prnd->GetRndEngine()) * (src_size[0] - new_w);
-      int y0 = std::uniform_real_distribution<float>(0, 1)(
-        prnd->GetRndEngine()) * (src_size[1] - new_h);
+      int x0 =
+          std::uniform_real_distribution<float>(0, 1)(prnd->GetRndEngine()) * (src_size[0] - new_w);
+      int y0 =
+          std::uniform_real_distribution<float>(0, 1)(prnd->GetRndEngine()) * (src_size[1] - new_h);
       if (new_w == param.width && new_h == param.height) {
         // no need to resize
         CropImpl<xpu>(x0, y0, new_w, new_h, inputs, outputs, ctx, req);
       } else {
-        CropResizeImpl<xpu>(ctx, inputs, req, outputs, x0, y0,
-                            new_w, new_h, param.width, param.height, param.interp);
+        CropResizeImpl<xpu>(ctx,
+                            inputs,
+                            req,
+                            outputs,
+                            x0,
+                            y0,
+                            new_w,
+                            new_h,
+                            param.width,
+                            param.height,
+                            param.interp);
       }
       return;
     }
   }
   // fallback to center crop
   auto scaled_shape = ScaleDown(src_size, Tuple<int>({param.width, param.height}));
-  int x0 = (param.width - scaled_shape[0]) / 2;
-  int y0 = (param.height - scaled_shape[1]) / 2;
+  int x0            = (param.width - scaled_shape[0]) / 2;
+  int y0            = (param.height - scaled_shape[1]) / 2;
   CHECK(x0 >= 0 && y0 >= 0) << "Invalid center crop: " << x0 << ", " << y0;
   if (scaled_shape[0] == param.width && scaled_shape[1] == param.height) {
     // no need to resize
     CropImpl<xpu>(x0, y0, scaled_shape[0], scaled_shape[1], inputs, outputs, ctx, req);
   } else {
-    CropResizeImpl<xpu>(ctx, inputs, req, outputs, x0, y0,
-                        scaled_shape[0], scaled_shape[1],
-                        param.width, param.height, param.interp);
+    CropResizeImpl<xpu>(ctx,
+                        inputs,
+                        req,
+                        outputs,
+                        x0,
+                        y0,
+                        scaled_shape[0],
+                        scaled_shape[1],
+                        param.width,
+                        param.height,
+                        param.interp);
   }
 }
 
-template<typename xpu>
-inline void RandomResizedCropOpBackward(const nnvm::NodeAttrs &attrs,
-                                      const OpContext &ctx,
-                                      const std::vector<TBlob> &inputs,
-                                      const std::vector<OpReqType> &req,
-                                      const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void RandomResizedCropOpBackward(const nnvm::NodeAttrs& attrs,
+                                        const OpContext& ctx,
+                                        const std::vector<TBlob>& inputs,
+                                        const std::vector<OpReqType>& req,
+                                        const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   LOG(FATAL) << "Backward for RandomSizedCropOp not implemented";
 }
diff --git a/src/operator/image/crop.cc b/src/operator/image/crop.cc
index 24fd32765d1a..2f109404df29 100644
--- a/src/operator/image/crop.cc
+++ b/src/operator/image/crop.cc
@@ -1,21 +1,21 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
  *  Copyright (c) 2019 by Contributors
@@ -37,8 +37,8 @@ DMLC_REGISTER_PARAMETER(RandomCropParam);
 DMLC_REGISTER_PARAMETER(RandomResizedCropParam);
 
 NNVM_REGISTER_OP(_image_crop)
-.add_alias("_npx__image_crop")
-.describe(R"code(Crop an image NDArray of shape (H x W x C) or (N x H x W x C)
+    .add_alias("_npx__image_crop")
+    .describe(R"code(Crop an image NDArray of shape (H x W x C) or (N x H x W x C)
 to the given size. Example:
 .. code-block:: python
 
@@ -48,26 +48,26 @@ to the given size. Example:
     mx.nd.image.crop(image, 1, 1, 2, 2) # (2, 2, 2, 3)
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<CropParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", CropShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", CropOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_backward_image_crop" })
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(CropParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<CropParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", CropShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", CropOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_image_crop"})
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(CropParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_image_crop)
-.set_attr_parser(ParamParser<CropParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", CropOpBackward<cpu>);
+    .set_attr_parser(ParamParser<CropParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", CropOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_image_random_crop)
-.add_alias("_npx__image_random_crop")
-.describe(R"code(Randomly crop an image NDArray of shape (H x W x C) or (N x H x W x C)
+    .add_alias("_npx__image_random_crop")
+    .describe(R"code(Randomly crop an image NDArray of shape (H x W x C) or (N x H x W x C)
 to the given size. Upsample result if `src` is smaller than `size`. Example:
 
 .. code-block:: python
@@ -76,33 +76,35 @@ to the given size. Upsample result if `src` is smaller than `size`. Example:
     cropped_im, rect  = mx.nd.image.random_crop(im, (100, 100))
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<RandomCropParam>)
-.set_attr<nnvm::FNumVisibleOutputs>(
-  "FNumVisibleOutputs", [](const NodeAttrs& attrs) { return static_cast<uint32_t>(1); })
-.set_attr<mxnet::FInferShape>("FInferShape", RandomCropShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
-.set_attr<FCompute>("FCompute<cpu>", RandomCropOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_backward_random_image_crop" })
-.set_attr<FResourceRequest>("FResourceRequest",
-    [](const NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-    })
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(RandomCropParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<RandomCropParam>)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) {
+                                          return static_cast<uint32_t>(1);
+                                        })
+    .set_attr<mxnet::FInferShape>("FInferShape", RandomCropShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomCropOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_random_image_crop"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(RandomCropParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_random_image_crop)
-.set_attr_parser(ParamParser<RandomCropParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", RandomCropOpBackward<cpu>);
+    .set_attr_parser(ParamParser<RandomCropParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", RandomCropOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_image_random_resized_crop)
-.add_alias("_npx__image_random_resized_crop")
-.describe(R"code(Randomly crop an image NDArray of shape (H x W x C) or (N x H x W x C)
+    .add_alias("_npx__image_random_resized_crop")
+    .describe(R"code(Randomly crop an image NDArray of shape (H x W x C) or (N x H x W x C)
 to the given size. Randomize area and aspect ratio. Upsample result if `src` is smaller than `size`.
 Example:
 .. code-block:: python
@@ -111,28 +113,28 @@ to the given size. Randomize area and aspect ratio. Upsample result if `src` is
     cropped_im, rect  = mx.nd.image.random_resized_crop(im, (100, 100))
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RandomResizedCropParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", RandomResizedCropShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", RandomResizedCropOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-                           ElemwiseGradUseNone{ "_backward_random_resized_image_crop" })
-.set_attr<FResourceRequest>("FResourceRequest",
-    [](const NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-    })
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(RandomCropParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RandomResizedCropParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", RandomResizedCropShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomResizedCropOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               ElemwiseGradUseNone{"_backward_random_resized_image_crop"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(RandomCropParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_random_resized_image_crop)
-.set_attr_parser(ParamParser<RandomResizedCropParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", RandomResizedCropOpBackward<cpu>);
+    .set_attr_parser(ParamParser<RandomResizedCropParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", RandomResizedCropOpBackward<cpu>);
 }  // namespace image
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/image/crop.cu b/src/operator/image/crop.cu
index a4a05f55d5d6..daec3e95e531 100644
--- a/src/operator/image/crop.cu
+++ b/src/operator/image/crop.cu
@@ -1,21 +1,21 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 #include "crop-inl.h"
 
@@ -23,23 +23,20 @@ namespace mxnet {
 namespace op {
 namespace image {
 
-NNVM_REGISTER_OP(_image_crop)
-.set_attr<FCompute>("FCompute<gpu>", CropOpForward<gpu>);
+NNVM_REGISTER_OP(_image_crop).set_attr<FCompute>("FCompute<gpu>", CropOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_image_crop)
-.set_attr<FCompute>("FCompute<gpu>", CropOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_image_crop).set_attr<FCompute>("FCompute<gpu>", CropOpBackward<gpu>);
 
-NNVM_REGISTER_OP(_image_random_crop)
-.set_attr<FCompute>("FCompute<gpu>", RandomCropOpForward<gpu>);
+NNVM_REGISTER_OP(_image_random_crop).set_attr<FCompute>("FCompute<gpu>", RandomCropOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_image_random_crop)
-.set_attr<FCompute>("FCompute<gpu>", RandomCropOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", RandomCropOpBackward<gpu>);
 
 NNVM_REGISTER_OP(_image_random_resized_crop)
-.set_attr<FCompute>("FCompute<gpu>", RandomResizedCropOpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", RandomResizedCropOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_image_random_resized_crop)
-.set_attr<FCompute>("FCompute<gpu>", RandomResizedCropOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", RandomResizedCropOpBackward<gpu>);
 }  // namespace image
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/image/image_random-inl.h b/src/operator/image/image_random-inl.h
index fe79a833b349..f08d970a6f34 100644
--- a/src/operator/image/image_random-inl.h
+++ b/src/operator/image/image_random-inl.h
@@ -1,31 +1,30 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
-* \file image_random-inl.h
-* \brief
-* \author
-*/
+ * \file image_random-inl.h
+ * \brief
+ * \author
+ */
 #ifndef MXNET_OPERATOR_IMAGE_IMAGE_RANDOM_INL_H_
 #define MXNET_OPERATOR_IMAGE_IMAGE_RANDOM_INL_H_
 
-
 #include <algorithm>
 #include <cmath>
 #include <limits>
@@ -36,7 +35,7 @@
 #include "../mxnet_op.h"
 #include "../operator_common.h"
 #if MXNET_USE_OPENCV
-  #include <opencv2/opencv.hpp>
+#include <opencv2/opencv.hpp>
 #endif  // MXNET_USE_OPENCV
 
 namespace mxnet {
@@ -48,17 +47,17 @@ using namespace mshadow;
 #if MXNET_USE_CUDA
 // NOTE: Kernel launch/map was extremely costly.
 // Hence, we use separate CUDA kernels for these operators.
-template<typename DType, typename T1, typename T2>
-void ToTensorImplCUDA(mshadow::Stream<gpu> *s,
+template <typename DType, typename T1, typename T2>
+void ToTensorImplCUDA(mshadow::Stream<gpu>* s,
                       const T1 input,
                       const T2 output,
                       const int req,
                       const float normalize_factor);
 
-template<typename DType>
-void NormalizeImplCUDA(mshadow::Stream<gpu> *s,
-                       const DType *input,
-                       DType *output,
+template <typename DType>
+void NormalizeImplCUDA(mshadow::Stream<gpu>* s,
+                       const DType* input,
+                       DType* output,
                        const int req,
                        const int N,
                        const int C,
@@ -71,10 +70,10 @@ void NormalizeImplCUDA(mshadow::Stream<gpu> *s,
                        const float std_d1,
                        const float std_d2);
 
-template<typename DType>
-void NormalizeBackwardImplCUDA(mshadow::Stream<gpu> *s,
-                               const DType *out_grad,
-                               DType *in_grad,
+template <typename DType>
+void NormalizeBackwardImplCUDA(mshadow::Stream<gpu>* s,
+                               const DType* out_grad,
+                               DType* in_grad,
                                const int req,
                                const int N,
                                const int C,
@@ -87,13 +86,14 @@ void NormalizeBackwardImplCUDA(mshadow::Stream<gpu> *s,
 
 // Shape and Type inference for image to tensor operator
 inline bool ToTensorShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
-  mxnet::TShape &shp = (*in_attrs)[0];
-  if (!shape_is_known(shp)) return false;
+  mxnet::TShape& shp = (*in_attrs)[0];
+  if (!shape_is_known(shp))
+    return false;
 
   CHECK((shp.ndim() == 3) || (shp.ndim() == 4))
       << "Input image must have shape (height, width, channels), or "
@@ -108,8 +108,8 @@ inline bool ToTensorShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool ToTensorType(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
@@ -117,29 +117,31 @@ inline bool ToTensorType(const nnvm::NodeAttrs& attrs,
 }
 
 // Operator Implementation
-template<typename DType, int req>
-inline void ToTensor(float* out_data, const DType* in_data,
+template <typename DType, int req>
+inline void ToTensor(float* out_data,
+                     const DType* in_data,
                      const int length,
                      const int channels,
                      const float normalize_factor,
                      const int step) {
-  // Microsoft Visual C++ compiler does not support omp collapse
-  #ifdef _MSC_VER
-    #pragma omp parallel for
-  #else
-    #pragma omp parallel for collapse(2)
-  #endif  // _MSC_VER
+// Microsoft Visual C++ compiler does not support omp collapse
+#ifdef _MSC_VER
+#pragma omp parallel for
+#else
+#pragma omp parallel for collapse(2)
+#endif  // _MSC_VER
   for (int c = 0; c < channels; ++c) {
-      for (int i = 0; i < length; ++i) {
-        KERNEL_ASSIGN(out_data[step + c*length + i], req,
-                      (in_data[step + i*channels + c]) / normalize_factor);
-      }
+    for (int i = 0; i < length; ++i) {
+      KERNEL_ASSIGN(out_data[step + c * length + i],
+                    req,
+                    (in_data[step + i * channels + c]) / normalize_factor);
+    }
   }
 }
 
-inline void ToTensorImpl(const std::vector<TBlob> &inputs,
-                         const std::vector<TBlob> &outputs,
-                         const std::vector<OpReqType> &req,
+inline void ToTensorImpl(const std::vector<TBlob>& inputs,
+                         const std::vector<TBlob>& outputs,
+                         const std::vector<OpReqType>& req,
                          const int length,
                          const int channel,
                          const float normalize_factor,
@@ -147,69 +149,65 @@ inline void ToTensorImpl(const std::vector<TBlob> &inputs,
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       float* output = outputs[0].dptr<float>();
-      DType* input = inputs[0].dptr<DType>();
-      ToTensor<DType, req_type>(output, input, length, channel,
-                                normalize_factor, step);
+      DType* input  = inputs[0].dptr<DType>();
+      ToTensor<DType, req_type>(output, input, length, channel, normalize_factor, step);
     });
   });
 }
 
-template<typename xpu>
-void ToTensorOpForward(const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+template <typename xpu>
+void ToTensorOpForward(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
   // We do not use temp buffer when performance the operation.
   // Hence, this check is necessary.
-  CHECK_EQ(req[0], kWriteTo)
-    << "`to_tensor` does not support inplace updates";
+  CHECK_EQ(req[0], kWriteTo) << "`to_tensor` does not support inplace updates";
 
   const float normalize_factor = 255.0f;
 
   if (std::is_same<xpu, gpu>::value) {
-  #if MXNET_USE_CUDA
-      mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-      MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-        MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-          if (inputs[0].ndim() == 3) {
-            Tensor<gpu, 3, DType> input = inputs[0].get<gpu, 3, DType>(s);
-            Tensor<gpu, 3, float> output = outputs[0].get<gpu, 3, float>(s);
-            ToTensorImplCUDA<DType, Tensor<gpu, 3, DType>, Tensor<gpu, 3, float>>
-            (s, input, output, req_type, normalize_factor);
-          } else {
-            Tensor<gpu, 4, DType> input = inputs[0].get<gpu, 4, DType>(s);
-            Tensor<gpu, 4, float> output = outputs[0].get<gpu, 4, float>(s);
-            ToTensorImplCUDA<DType, Tensor<gpu, 4, DType>, Tensor<gpu, 4, float>>
-            (s, input, output, req_type, normalize_factor);
-          }
-        });
+#if MXNET_USE_CUDA
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
+      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+        if (inputs[0].ndim() == 3) {
+          Tensor<gpu, 3, DType> input  = inputs[0].get<gpu, 3, DType>(s);
+          Tensor<gpu, 3, float> output = outputs[0].get<gpu, 3, float>(s);
+          ToTensorImplCUDA<DType, Tensor<gpu, 3, DType>, Tensor<gpu, 3, float>>(
+              s, input, output, req_type, normalize_factor);
+        } else {
+          Tensor<gpu, 4, DType> input  = inputs[0].get<gpu, 4, DType>(s);
+          Tensor<gpu, 4, float> output = outputs[0].get<gpu, 4, float>(s);
+          ToTensorImplCUDA<DType, Tensor<gpu, 4, DType>, Tensor<gpu, 4, float>>(
+              s, input, output, req_type, normalize_factor);
+        }
       });
-  #else
+    });
+#else
     LOG(FATAL) << "Compile with USE_CUDA=1 to use ToTensor operator on GPU.";
-  #endif  // MXNET_USE_CUDA
+#endif  // MXNET_USE_CUDA
   } else if (inputs[0].ndim() == 3) {
     // 3D Input - (h, w, c)
-    const int length = inputs[0].shape_[0] * inputs[0].shape_[1];
+    const int length  = inputs[0].shape_[0] * inputs[0].shape_[1];
     const int channel = static_cast<int>(inputs[0].shape_[2]);
-    const int step = 0;
-    ToTensorImpl(inputs, outputs, req, length,
-                 channel, normalize_factor, step);
+    const int step    = 0;
+    ToTensorImpl(inputs, outputs, req, length, channel, normalize_factor, step);
   } else if (inputs[0].ndim() == 4) {
     // 4D input (n, h, w, c)
     const int batch_size = inputs[0].shape_[0];
-    const int length = inputs[0].shape_[1] * inputs[0].shape_[2];
-    const int channel = static_cast<int>(inputs[0].shape_[3]);
-    const int step = channel * length;
+    const int length     = inputs[0].shape_[1] * inputs[0].shape_[2];
+    const int channel    = static_cast<int>(inputs[0].shape_[3]);
+    const int step       = channel * length;
 
-    #pragma omp parallel for
+#pragma omp parallel for
     for (auto n = 0; n < batch_size; ++n) {
-      ToTensorImpl(inputs, outputs, req, length, channel,
-                   normalize_factor, n*step);
+      ToTensorImpl(inputs, outputs, req, length, channel, normalize_factor, n * step);
     }
   }
 }
@@ -220,13 +218,15 @@ struct NormalizeParam : public dmlc::Parameter<NormalizeParam> {
 
   DMLC_DECLARE_PARAMETER(NormalizeParam) {
     DMLC_DECLARE_FIELD(mean)
-    .set_default(mxnet::Tuple<float> {0.0f, 0.0f, 0.0f, 0.0f})
-    .describe("Sequence of means for each channel. "
-              "Default value is 0.");
+        .set_default(mxnet::Tuple<float>{0.0f, 0.0f, 0.0f, 0.0f})
+        .describe(
+            "Sequence of means for each channel. "
+            "Default value is 0.");
     DMLC_DECLARE_FIELD(std)
-    .set_default(mxnet::Tuple<float> {1.0f, 1.0f, 1.0f, 1.0f})
-    .describe("Sequence of standard deviations for each channel. "
-              "Default value is 1.");
+        .set_default(mxnet::Tuple<float>{1.0f, 1.0f, 1.0f, 1.0f})
+        .describe(
+            "Sequence of standard deviations for each channel. "
+            "Default value is 1.");
   }
 };
 
@@ -234,12 +234,13 @@ struct NormalizeParam : public dmlc::Parameter<NormalizeParam> {
 
 // Shape inference
 inline bool NormalizeOpShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
-  const NormalizeParam &param = nnvm::get<NormalizeParam>(attrs.parsed);
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
+  const NormalizeParam& param = nnvm::get<NormalizeParam>(attrs.parsed);
 
   const auto& dshape = (*in_attrs)[0];
-  if (!dshape.ndim()) return false;
+  if (!dshape.ndim())
+    return false;
 
   CHECK((dshape.ndim() == 3) || (dshape.ndim() == 4))
       << "Input tensor must have shape (channels, height, width), or "
@@ -249,23 +250,21 @@ inline bool NormalizeOpShape(const nnvm::NodeAttrs& attrs,
   if (dshape.ndim() == 3) {
     nchannels = dshape[0];
     CHECK(nchannels == 3 || nchannels == 1)
-      << "The first dimension of input tensor must be the channel dimension with "
-      << "either 1 or 3 elements, but got input with shape " << dshape;
+        << "The first dimension of input tensor must be the channel dimension with "
+        << "either 1 or 3 elements, but got input with shape " << dshape;
   } else if (dshape.ndim() == 4) {
     nchannels = dshape[1];
     CHECK(nchannels == 3 || nchannels == 1)
-      << "The second dimension of input tensor must be the channel dimension with "
-      << "either 1 or 3 elements, but got input with shape " << dshape;
+        << "The second dimension of input tensor must be the channel dimension with "
+        << "either 1 or 3 elements, but got input with shape " << dshape;
   }
 
   CHECK((param.mean.ndim() == 1) || (param.mean.ndim() == nchannels))
-      << "Invalid mean for input with shape " << dshape
-      << ". mean must have either 1 or " << nchannels
-      << " elements, but got " << param.mean;
+      << "Invalid mean for input with shape " << dshape << ". mean must have either 1 or "
+      << nchannels << " elements, but got " << param.mean;
   CHECK(param.std.ndim() == 1 || param.std.ndim() == nchannels)
-      << "Invalid std for input with shape " << dshape
-      << ". std must have either 1 or " << nchannels
-      << " elements, but got " << param.std;
+      << "Invalid std for input with shape " << dshape << ". std must have either 1 or "
+      << nchannels << " elements, but got " << param.std;
 
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape);
   return true;
@@ -273,8 +272,8 @@ inline bool NormalizeOpShape(const nnvm::NodeAttrs& attrs,
 
 // Type Inference
 inline bool NormalizeOpType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int>* in_attrs,
-                          std::vector<int>* out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -283,7 +282,7 @@ inline bool NormalizeOpType(const nnvm::NodeAttrs& attrs,
   return out_attrs->at(0) != -1;
 }
 
-template<typename DType, int req>
+template <typename DType, int req>
 inline void Normalize(DType* out_data,
                       const DType* in_data,
                       const int length,
@@ -291,23 +290,24 @@ inline void Normalize(DType* out_data,
                       const int step,
                       const std::vector<float> mean,
                       const std::vector<float> std) {
-  // Microsoft Visual C++ compiler does not support omp collapse
-  #ifdef _MSC_VER
-    #pragma omp parallel for
-  #else
-    #pragma omp parallel for collapse(2)
-  #endif  // _MSC_VER
+// Microsoft Visual C++ compiler does not support omp collapse
+#ifdef _MSC_VER
+#pragma omp parallel for
+#else
+#pragma omp parallel for collapse(2)
+#endif  // _MSC_VER
   for (int c = 0; c < channels; ++c) {
     for (int i = 0; i < length; ++i) {
-      KERNEL_ASSIGN(out_data[step + c*length + i], req,
-                    (in_data[step + c*length + i] - mean[c]) / std[c]);
+      KERNEL_ASSIGN(out_data[step + c * length + i],
+                    req,
+                    (in_data[step + c * length + i] - mean[c]) / std[c]);
     }
   }
 }
 
-inline void NormalizeImpl(const std::vector<TBlob> &inputs,
-                          const std::vector<TBlob> &outputs,
-                          const std::vector<OpReqType> &req,
+inline void NormalizeImpl(const std::vector<TBlob>& inputs,
+                          const std::vector<TBlob>& outputs,
+                          const std::vector<OpReqType>& req,
                           const int length,
                           const int channels,
                           const int step,
@@ -315,25 +315,24 @@ inline void NormalizeImpl(const std::vector<TBlob> &inputs,
                           const std::vector<float> std) {
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      DType* input = inputs[0].dptr<DType>();
+      DType* input  = inputs[0].dptr<DType>();
       DType* output = outputs[0].dptr<DType>();
-      Normalize<DType, req_type>(output, input, length, channels, step,
-                                 mean, std);
+      Normalize<DType, req_type>(output, input, length, channels, step, mean, std);
     });
   });
 }
 
-template<typename xpu>
-void NormalizeOpForward(const nnvm::NodeAttrs &attrs,
-                        const OpContext &ctx,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
+template <typename xpu>
+void NormalizeOpForward(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  const NormalizeParam &param = nnvm::get<NormalizeParam>(attrs.parsed);
+  const NormalizeParam& param = nnvm::get<NormalizeParam>(attrs.parsed);
 
   // Mean and Std can be 1 or 3D only.
   std::vector<float> mean(3);
@@ -355,108 +354,116 @@ void NormalizeOpForward(const nnvm::NodeAttrs &attrs,
   }
 
   if (std::is_same<xpu, gpu>::value) {
-    #if MXNET_USE_CUDA
-      mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-      MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-        MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-          int N, C, H, W;
-          DType *input = nullptr;
-          DType *output = nullptr;
-          if (inputs[0].ndim() == 3) {
-            N = 1;
-            C = static_cast<int>(inputs[0].shape_[0]);
-            H = static_cast<int>(inputs[0].shape_[1]);
-            W = static_cast<int>(inputs[0].shape_[2]);
-            input = (inputs[0].get<gpu, 3, DType>(s)).dptr_;
-            output = (outputs[0].get<gpu, 3, DType>(s)).dptr_;
-          } else {
-            N = static_cast<int>(inputs[0].shape_[0]);
-            C = static_cast<int>(inputs[0].shape_[1]);
-            H = static_cast<int>(inputs[0].shape_[2]);
-            W = static_cast<int>(inputs[0].shape_[3]);
-            input = (inputs[0].get<gpu, 4, DType>(s)).dptr_;
-            output = (outputs[0].get<gpu, 4, DType>(s)).dptr_;
-          }
-          NormalizeImplCUDA<DType>(s, input, output, req_type,
-                                   N, C, H, W,
-                                   mean[0], mean[1], mean[2],
-                                   std[0], std[1], std[2]);
-        });
+#if MXNET_USE_CUDA
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
+      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+        int N, C, H, W;
+        DType* input  = nullptr;
+        DType* output = nullptr;
+        if (inputs[0].ndim() == 3) {
+          N      = 1;
+          C      = static_cast<int>(inputs[0].shape_[0]);
+          H      = static_cast<int>(inputs[0].shape_[1]);
+          W      = static_cast<int>(inputs[0].shape_[2]);
+          input  = (inputs[0].get<gpu, 3, DType>(s)).dptr_;
+          output = (outputs[0].get<gpu, 3, DType>(s)).dptr_;
+        } else {
+          N      = static_cast<int>(inputs[0].shape_[0]);
+          C      = static_cast<int>(inputs[0].shape_[1]);
+          H      = static_cast<int>(inputs[0].shape_[2]);
+          W      = static_cast<int>(inputs[0].shape_[3]);
+          input  = (inputs[0].get<gpu, 4, DType>(s)).dptr_;
+          output = (outputs[0].get<gpu, 4, DType>(s)).dptr_;
+        }
+        NormalizeImplCUDA<DType>(s,
+                                 input,
+                                 output,
+                                 req_type,
+                                 N,
+                                 C,
+                                 H,
+                                 W,
+                                 mean[0],
+                                 mean[1],
+                                 mean[2],
+                                 std[0],
+                                 std[1],
+                                 std[2]);
       });
-    #else
-      LOG(FATAL) << "Compile with USE_CUDA=1 to use Normalize operator on GPU.";
-    #endif  // MXNET_USE_CUDA
+    });
+#else
+    LOG(FATAL) << "Compile with USE_CUDA=1 to use Normalize operator on GPU.";
+#endif  // MXNET_USE_CUDA
   } else if (inputs[0].ndim() == 3) {
     // 3D input (c, h, w)
-    const int length = inputs[0].shape_[1] * inputs[0].shape_[2];
+    const int length  = inputs[0].shape_[1] * inputs[0].shape_[2];
     const int channel = static_cast<int>(inputs[0].shape_[0]);
-    const int step = 0;
+    const int step    = 0;
     NormalizeImpl(inputs, outputs, req, length, channel, step, mean, std);
   } else if (inputs[0].ndim() == 4) {
     // 4D input (n, c, h, w)
     const int batch_size = inputs[0].shape_[0];
-    const int length = inputs[0].shape_[2] * inputs[0].shape_[3];
-    const int channel = static_cast<int>(inputs[0].shape_[1]);
-    const int step = channel * length;
+    const int length     = inputs[0].shape_[2] * inputs[0].shape_[3];
+    const int channel    = static_cast<int>(inputs[0].shape_[1]);
+    const int step       = channel * length;
 
-    #pragma omp parallel for
+#pragma omp parallel for
     for (auto n = 0; n < batch_size; ++n) {
-      NormalizeImpl(inputs, outputs, req, length, channel, n*step, mean, std);
+      NormalizeImpl(inputs, outputs, req, length, channel, n * step, mean, std);
     }
   }
 }
 
 // Backward function
-template<typename DType, int req>
+template <typename DType, int req>
 inline void NormalizeBackward(const DType* out_grad,
                               DType* in_grad,
                               const int length,
                               const int channels,
                               const int step,
                               const std::vector<float> std) {
-  // Microsoft Visual C++ compiler does not support omp collapse
-  #ifdef _MSC_VER
-    #pragma omp parallel for
-  #else
-    #pragma omp parallel for collapse(2)
-  #endif  // _MSC_VER
+// Microsoft Visual C++ compiler does not support omp collapse
+#ifdef _MSC_VER
+#pragma omp parallel for
+#else
+#pragma omp parallel for collapse(2)
+#endif  // _MSC_VER
   for (int c = 0; c < channels; ++c) {
     for (int i = 0; i < length; ++i) {
-      KERNEL_ASSIGN(in_grad[step + c*length + i], req,
-                    out_grad[step + c*length + i] * (1.0 / std[c]));
+      KERNEL_ASSIGN(
+          in_grad[step + c * length + i], req, out_grad[step + c * length + i] * (1.0 / std[c]));
     }
   }
 }
 
-inline void NormalizeBackwardImpl(const std::vector<TBlob> &inputs,
-                                  const std::vector<TBlob> &outputs,
-                                  const std::vector<OpReqType> &req,
+inline void NormalizeBackwardImpl(const std::vector<TBlob>& inputs,
+                                  const std::vector<TBlob>& outputs,
+                                  const std::vector<OpReqType>& req,
                                   const int length,
                                   const int channels,
                                   const int step,
-                                  const std::vector<float> std
-                                  ) {
-    MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        DType* out_grad = inputs[0].dptr<DType>();
-        DType* in_grad = outputs[0].dptr<DType>();
-        NormalizeBackward<DType, req_type>(out_grad, in_grad, length,
-                                           channels, step, std);
-      });
+                                  const std::vector<float> std) {
+  MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
+    MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+      DType* out_grad = inputs[0].dptr<DType>();
+      DType* in_grad  = outputs[0].dptr<DType>();
+      NormalizeBackward<DType, req_type>(out_grad, in_grad, length, channels, step, std);
     });
+  });
 }
 
-template<typename xpu>
-void NormalizeOpBackward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+template <typename xpu>
+void NormalizeOpBackward(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  const NormalizeParam &param = nnvm::get<NormalizeParam>(attrs.parsed);
+  const NormalizeParam& param = nnvm::get<NormalizeParam>(attrs.parsed);
   // Std can be 1 or 3D only.
   std::vector<float> std(3);
   if (param.std.ndim() == 1) {
@@ -471,73 +478,72 @@ void NormalizeOpBackward(const nnvm::NodeAttrs &attrs,
   const TBlob& in_data = inputs[1];
 
   if (std::is_same<xpu, gpu>::value) {
-    #if MXNET_USE_CUDA
-      mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-      MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-          int N, C, H, W;
-          DType *in_grad = nullptr;
-          DType *out_grad = nullptr;
-          if (in_data.ndim() == 3) {
-            N = 1;
-            C = static_cast<int>(in_data.shape_[0]);
-            H = static_cast<int>(in_data.shape_[1]);
-            W = static_cast<int>(in_data.shape_[2]);
-            out_grad = (inputs[0].get<gpu, 3, DType>(s)).dptr_;
-            in_grad = (outputs[0].get<gpu, 3, DType>(s)).dptr_;
-          } else {
-            N = static_cast<int>(in_data.shape_[0]);
-            C = static_cast<int>(in_data.shape_[1]);
-            H = static_cast<int>(in_data.shape_[2]);
-            W = static_cast<int>(in_data.shape_[3]);
-            out_grad = (inputs[0].get<gpu, 4, DType>(s)).dptr_;
-            in_grad = (outputs[0].get<gpu, 4, DType>(s)).dptr_;
-          }
-          NormalizeBackwardImplCUDA<DType>(s, out_grad, in_grad, req_type,
-                                           N, C, H, W,
-                                           std[0], std[1], std[2]);
-        });
+#if MXNET_USE_CUDA
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
+      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+        int N, C, H, W;
+        DType* in_grad  = nullptr;
+        DType* out_grad = nullptr;
+        if (in_data.ndim() == 3) {
+          N        = 1;
+          C        = static_cast<int>(in_data.shape_[0]);
+          H        = static_cast<int>(in_data.shape_[1]);
+          W        = static_cast<int>(in_data.shape_[2]);
+          out_grad = (inputs[0].get<gpu, 3, DType>(s)).dptr_;
+          in_grad  = (outputs[0].get<gpu, 3, DType>(s)).dptr_;
+        } else {
+          N        = static_cast<int>(in_data.shape_[0]);
+          C        = static_cast<int>(in_data.shape_[1]);
+          H        = static_cast<int>(in_data.shape_[2]);
+          W        = static_cast<int>(in_data.shape_[3]);
+          out_grad = (inputs[0].get<gpu, 4, DType>(s)).dptr_;
+          in_grad  = (outputs[0].get<gpu, 4, DType>(s)).dptr_;
+        }
+        NormalizeBackwardImplCUDA<DType>(
+            s, out_grad, in_grad, req_type, N, C, H, W, std[0], std[1], std[2]);
       });
-    #else
-      LOG(FATAL) << "Compile with USE_CUDA=1 to use Normalize backward operator on GPU.";
-    #endif  // MXNET_USE_CUDA
+    });
+#else
+    LOG(FATAL) << "Compile with USE_CUDA=1 to use Normalize backward operator on GPU.";
+#endif  // MXNET_USE_CUDA
   } else if (in_data.ndim() == 3) {
     // 3D input (c, h, w)
-    const int length = in_data.shape_[1] * in_data.shape_[2];
+    const int length  = in_data.shape_[1] * in_data.shape_[2];
     const int channel = static_cast<int>(in_data.shape_[0]);
-    const int step = 0;
+    const int step    = 0;
     NormalizeBackwardImpl(inputs, outputs, req, length, channel, step, std);
   } else if (in_data.ndim() == 4) {
     // 4D input (n, c, h, w)
     const int batch_size = in_data.shape_[0];
-    const int length = in_data.shape_[2] * in_data.shape_[3];
-    const int channel = static_cast<int>(in_data.shape_[1]);
-    const int step = channel * length;
+    const int length     = in_data.shape_[2] * in_data.shape_[3];
+    const int channel    = static_cast<int>(in_data.shape_[1]);
+    const int step       = channel * length;
 
-    #pragma omp parallel for
+#pragma omp parallel for
     for (auto n = 0; n < batch_size; ++n) {
-      NormalizeBackwardImpl(inputs, outputs, req, length, channel, n*step, std);
+      NormalizeBackwardImpl(inputs, outputs, req, length, channel, n * step, std);
     }
   }
 }
 
-template<typename DType>
+template <typename DType>
 inline DType saturate_cast(const float& src) {
   return static_cast<DType>(src);
 }
 
-template<>
+template <>
 inline uint8_t saturate_cast(const float& src) {
   return std::min(std::max(src, 0.f), 255.f);
 }
 
 inline bool ImageShape(const nnvm::NodeAttrs& attrs,
-                       mxnet::ShapeVector *in_attrs,
-                       mxnet::ShapeVector *out_attrs) {
+                       mxnet::ShapeVector* in_attrs,
+                       mxnet::ShapeVector* out_attrs) {
   mxnet::TShape& dshape = (*in_attrs)[0];
-  CHECK_EQ(dshape.ndim(), 3)
-      << "Input image must have shape (height, width, channels), but got " << dshape;
-  auto nchannels = dshape[dshape.ndim()-1];
+  CHECK_EQ(dshape.ndim(), 3) << "Input image must have shape (height, width, channels), but got "
+                             << dshape;
+  auto nchannels = dshape[dshape.ndim() - 1];
   CHECK(nchannels == 3 || nchannels == 1)
       << "The last dimension of input image must be the channel dimension with "
       << "either 1 or 3 elements, but got input with shape " << dshape;
@@ -545,18 +551,20 @@ inline bool ImageShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<typename DType, int axis>
-void FlipImpl(const mxnet::TShape &shape, DType *src, DType *dst) {
+template <typename DType, int axis>
+void FlipImpl(const mxnet::TShape& shape, DType* src, DType* dst) {
   int head = 1, mid = shape[axis], tail = 1;
-  for (int i = 0; i < axis; ++i) head *= shape[i];
-  for (int i = axis+1; i < shape.ndim(); ++i) tail *= shape[i];
+  for (int i = 0; i < axis; ++i)
+    head *= shape[i];
+  for (int i = axis + 1; i < shape.ndim(); ++i)
+    tail *= shape[i];
 
   for (int i = 0; i < head; ++i) {
     // if inplace flip, skip the mid point in axis, otherwise copy is required
     int mid2 = (src == dst) ? mid >> 1 : (mid + 1) >> 1;
     for (int j = 0; j < mid2; ++j) {
-      int idx1 = (i*mid + j) * tail;
-      int idx2 = idx1 + (mid-(j << 1)-1) * tail;
+      int idx1 = (i * mid + j) * tail;
+      int idx2 = idx1 + (mid - (j << 1) - 1) * tail;
       for (int k = 0; k < tail; ++k, ++idx1, ++idx2) {
         DType tmp = src[idx1];
         dst[idx1] = src[idx2];
@@ -566,27 +574,25 @@ void FlipImpl(const mxnet::TShape &shape, DType *src, DType *dst) {
   }
 }
 
-inline void FlipLeftRight(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+inline void FlipLeftRight(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    FlipImpl<DType, 1>(inputs[0].shape_, inputs[0].dptr<DType>(),
-                       outputs[0].dptr<DType>());
+    FlipImpl<DType, 1>(inputs[0].shape_, inputs[0].dptr<DType>(), outputs[0].dptr<DType>());
   });
 }
 
-inline void FlipTopBottom(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+inline void FlipTopBottom(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    FlipImpl<DType, 0>(inputs[0].shape_, inputs[0].dptr<DType>(),
-                       outputs[0].dptr<DType>());
+    FlipImpl<DType, 0>(inputs[0].shape_, inputs[0].dptr<DType>(), outputs[0].dptr<DType>());
   });
 }
 
@@ -594,22 +600,19 @@ struct RandomFlipParam : public dmlc::Parameter<RandomFlipParam> {
   float p;
 
   DMLC_DECLARE_PARAMETER(RandomFlipParam) {
-    DMLC_DECLARE_FIELD(p)
-    .set_default(0.5f)
-    .describe("The probablity of flipping the image.");
+    DMLC_DECLARE_FIELD(p).set_default(0.5f).describe("The probablity of flipping the image.");
   }
 };
 
-inline void RandomFlipLeftRight(
-    const nnvm::NodeAttrs &attrs,
-    const OpContext &ctx,
-    const std::vector<TBlob> &inputs,
-    const std::vector<OpReqType> &req,
-    const std::vector<TBlob> &outputs) {
+inline void RandomFlipLeftRight(const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const std::vector<TBlob>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomFlipParam &param = nnvm::get<RandomFlipParam>(attrs.parsed);
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, float>(s);
+  const RandomFlipParam& param = nnvm::get<RandomFlipParam>(attrs.parsed);
+  Stream<cpu>* s               = ctx.get_stream<cpu>();
+  Random<cpu>* prnd            = ctx.requested[0].get_random<cpu, float>(s);
   std::normal_distribution<float> dist(0, 1);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     if (dist(prnd->GetRndEngine()) > param.p) {
@@ -617,22 +620,20 @@ inline void RandomFlipLeftRight(
         std::memcpy(outputs[0].dptr_, inputs[0].dptr_, inputs[0].Size() * sizeof(DType));
       }
     } else {
-      FlipImpl<DType, 1>(inputs[0].shape_, inputs[0].dptr<DType>(),
-                         outputs[0].dptr<DType>());
+      FlipImpl<DType, 1>(inputs[0].shape_, inputs[0].dptr<DType>(), outputs[0].dptr<DType>());
     }
   });
 }
 
-inline void RandomFlipTopBottom(
-    const nnvm::NodeAttrs &attrs,
-    const OpContext &ctx,
-    const std::vector<TBlob> &inputs,
-    const std::vector<OpReqType> &req,
-    const std::vector<TBlob> &outputs) {
+inline void RandomFlipTopBottom(const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const std::vector<TBlob>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomFlipParam &param = nnvm::get<RandomFlipParam>(attrs.parsed);
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, float>(s);
+  const RandomFlipParam& param = nnvm::get<RandomFlipParam>(attrs.parsed);
+  Stream<cpu>* s               = ctx.get_stream<cpu>();
+  Random<cpu>* prnd            = ctx.requested[0].get_random<cpu, float>(s);
   std::normal_distribution<float> dist(0, 1);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     if (dist(prnd->GetRndEngine()) > param.p) {
@@ -640,8 +641,7 @@ inline void RandomFlipTopBottom(
         std::memcpy(outputs[0].dptr_, inputs[0].dptr_, inputs[0].Size() * sizeof(DType));
       }
     } else {
-      FlipImpl<DType, 0>(inputs[0].shape_, inputs[0].dptr<DType>(),
-                         outputs[0].dptr<DType>());
+      FlipImpl<DType, 0>(inputs[0].shape_, inputs[0].dptr<DType>(), outputs[0].dptr<DType>());
     }
   });
 }
@@ -650,26 +650,22 @@ struct RandomEnhanceParam : public dmlc::Parameter<RandomEnhanceParam> {
   float min_factor;
   float max_factor;
   DMLC_DECLARE_PARAMETER(RandomEnhanceParam) {
-    DMLC_DECLARE_FIELD(min_factor)
-    .set_lower_bound(0.0)
-    .describe("Minimum factor.");
-    DMLC_DECLARE_FIELD(max_factor)
-    .set_lower_bound(0.0)
-    .describe("Maximum factor.");
+    DMLC_DECLARE_FIELD(min_factor).set_lower_bound(0.0).describe("Minimum factor.");
+    DMLC_DECLARE_FIELD(max_factor).set_lower_bound(0.0).describe("Maximum factor.");
   }
 };
 
 inline void AdjustBrightnessImpl(const float& alpha_b,
-                                 const OpContext &ctx,
-                                 const std::vector<TBlob> &inputs,
-                                 const std::vector<OpReqType> &req,
-                                 const std::vector<TBlob> &outputs) {
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   int length = inputs[0].Size();
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     DType* output = outputs[0].dptr<DType>();
-    DType* input = inputs[0].dptr<DType>();
+    DType* input  = inputs[0].dptr<DType>();
     for (int l = 0; l < length; ++l) {
       float val = static_cast<float>(input[l]) * alpha_b;
       output[l] = saturate_cast<DType>(val);
@@ -677,48 +673,49 @@ inline void AdjustBrightnessImpl(const float& alpha_b,
   });
 }
 
-inline void RandomBrightness(const nnvm::NodeAttrs &attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+inline void RandomBrightness(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomEnhanceParam &param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
-
+  const RandomEnhanceParam& param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
 
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, float>(s);
-  float alpha_b = std::uniform_real_distribution<float>(
-      param.min_factor, param.max_factor)(prnd->GetRndEngine());
+  Stream<cpu>* s    = ctx.get_stream<cpu>();
+  Random<cpu>* prnd = ctx.requested[0].get_random<cpu, float>(s);
+  float alpha_b     = std::uniform_real_distribution<float>(param.min_factor,
+                                                        param.max_factor)(prnd->GetRndEngine());
 
   AdjustBrightnessImpl(alpha_b, ctx, inputs, req, outputs);
 }
 
 inline void AdjustContrastImpl(const float& alpha_c,
-                               const OpContext &ctx,
-                               const std::vector<TBlob> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<TBlob> &outputs) {
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  static const float coef[] = { 0.299f, 0.587f, 0.114f };
+  static const float coef[] = {0.299f, 0.587f, 0.114f};
 
-  int length = inputs[0].shape_[0] * inputs[0].shape_[1];
+  int length    = inputs[0].shape_[0] * inputs[0].shape_[1];
   int nchannels = inputs[0].shape_[2];
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     DType* output = outputs[0].dptr<DType>();
-    DType* input = inputs[0].dptr<DType>();
+    DType* input  = inputs[0].dptr<DType>();
 
     float sum = 0.f;
     if (nchannels > 1) {
       for (int l = 0; l < length; ++l) {
-        for (int c = 0; c < 3; ++c) sum += input[l*3 + c] * coef[c];
+        for (int c = 0; c < 3; ++c)
+          sum += input[l * 3 + c] * coef[c];
       }
     } else {
-      for (int l = 0; l < length; ++l) sum += input[l];
+      for (int l = 0; l < length; ++l)
+        sum += input[l];
     }
     float gray_mean = sum / static_cast<float>(length);
-    float beta = (1 - alpha_c) * gray_mean;
+    float beta      = (1 - alpha_c) * gray_mean;
 
     for (int l = 0; l < length * nchannels; ++l) {
       float val = input[l] * alpha_c + beta;
@@ -727,80 +724,80 @@ inline void AdjustContrastImpl(const float& alpha_c,
   });
 }
 
-inline void RandomContrast(const nnvm::NodeAttrs &attrs,
-                           const OpContext &ctx,
-                           const std::vector<TBlob> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &outputs) {
+inline void RandomContrast(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomEnhanceParam &param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
-
+  const RandomEnhanceParam& param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
 
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, real_t>(s);
-  float alpha_c = std::uniform_real_distribution<float>(
-      param.min_factor, param.max_factor)(prnd->GetRndEngine());
+  Stream<cpu>* s    = ctx.get_stream<cpu>();
+  Random<cpu>* prnd = ctx.requested[0].get_random<cpu, real_t>(s);
+  float alpha_c     = std::uniform_real_distribution<float>(param.min_factor,
+                                                        param.max_factor)(prnd->GetRndEngine());
 
   AdjustContrastImpl(alpha_c, ctx, inputs, req, outputs);
 }
 
 inline void AdjustSaturationImpl(const float& alpha_s,
-                                 const OpContext &ctx,
-                                 const std::vector<TBlob> &inputs,
-                                 const std::vector<OpReqType> &req,
-                                 const std::vector<TBlob> &outputs) {
-  static const float coef[] = { 0.299f, 0.587f, 0.114f };
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& outputs) {
+  static const float coef[] = {0.299f, 0.587f, 0.114f};
 
-  int length = inputs[0].shape_[0] * inputs[0].shape_[1];
+  int length    = inputs[0].shape_[0] * inputs[0].shape_[1];
   int nchannels = inputs[0].shape_[2];
 
   float alpha_o = 1.f - alpha_s;
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     DType* output = outputs[0].dptr<DType>();
-    DType* input = inputs[0].dptr<DType>();
+    DType* input  = inputs[0].dptr<DType>();
 
     if (nchannels == 1) {
-      for (int l = 0; l < length; ++l) output[l] = input[l];
+      for (int l = 0; l < length; ++l)
+        output[l] = input[l];
       return;
     }
 
     for (int l = 0; l < length; ++l) {
       float gray = 0.f;
       for (int c = 0; c < 3; ++c) {
-        gray = input[l*3 + c] * coef[c];
+        gray = input[l * 3 + c] * coef[c];
       }
       gray *= alpha_o;
       for (int c = 0; c < 3; ++c) {
-        float val = gray + input[l*3 + c] * alpha_s;
-        output[l*3 + c] = saturate_cast<DType>(val);
+        float val         = gray + input[l * 3 + c] * alpha_s;
+        output[l * 3 + c] = saturate_cast<DType>(val);
       }
     }
   });
 }
 
-inline void RandomSaturation(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+inline void RandomSaturation(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomEnhanceParam &param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
+  const RandomEnhanceParam& param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
 
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, real_t>(s);
-  float alpha_s = std::uniform_real_distribution<float>(
-      param.min_factor, param.max_factor)(prnd->GetRndEngine());
+  Stream<cpu>* s    = ctx.get_stream<cpu>();
+  Random<cpu>* prnd = ctx.requested[0].get_random<cpu, real_t>(s);
+  float alpha_s     = std::uniform_real_distribution<float>(param.min_factor,
+                                                        param.max_factor)(prnd->GetRndEngine());
 
   AdjustSaturationImpl(alpha_s, ctx, inputs, req, outputs);
 }
 
 inline void RGB2HLSConvert(const float& src_r,
-                    const float& src_g,
-                    const float& src_b,
-                    float *dst_h,
-                    float *dst_l,
-                    float *dst_s) {
+                           const float& src_g,
+                           const float& src_b,
+                           float* dst_h,
+                           float* dst_l,
+                           float* dst_s) {
   float b = src_b / 255.f, g = src_g / 255.f, r = src_r / 255.f;
   float h = 0.f, s = 0.f, l;
   float vmin;
@@ -808,13 +805,13 @@ inline void RGB2HLSConvert(const float& src_r,
   float diff;
 
   vmax = vmin = r;
-  vmax = std::fmax(vmax, g);
-  vmax = std::fmax(vmax, b);
-  vmin = std::fmin(vmin, g);
-  vmin = std::fmin(vmin, b);
+  vmax        = std::fmax(vmax, g);
+  vmax        = std::fmax(vmax, b);
+  vmin        = std::fmin(vmin, g);
+  vmin        = std::fmin(vmin, b);
 
   diff = vmax - vmin;
-  l = (vmax + vmin) * 0.5f;
+  l    = (vmax + vmin) * 0.5f;
 
   if (diff > std::numeric_limits<float>::epsilon()) {
     s = (l < 0.5f) * diff / (vmax + vmin);
@@ -834,19 +831,13 @@ inline void RGB2HLSConvert(const float& src_r,
 }
 
 inline void HLS2RGBConvert(const float& src_h,
-                    const float& src_l,
-                    const float& src_s,
-                    float *dst_r,
-                    float *dst_g,
-                    float *dst_b) {
+                           const float& src_l,
+                           const float& src_s,
+                           float* dst_r,
+                           float* dst_g,
+                           float* dst_b) {
   static const int c_HlsSectorData[6][3] = {
-    { 1, 3, 0 },
-    { 1, 0, 2 },
-    { 3, 0, 1 },
-    { 0, 2, 1 },
-    { 0, 1, 3 },
-    { 2, 1, 0 }
-  };
+      {1, 3, 0}, {1, 0, 2}, {3, 0, 1}, {0, 2, 1}, {0, 1, 3}, {2, 1, 0}};
 
   float h = src_h, l = src_l, s = src_s;
   float b = l, g = l, r = l;
@@ -859,10 +850,14 @@ inline void HLS2RGBConvert(const float& src_h,
     h *= 1.f / 60.f;
 
     if (h < 0) {
-      do { h += 6; } while (h < 0);
+      do {
+        h += 6;
+      } while (h < 0);
     }
     if (h >= 6) {  // h + 6 >= 6 holds true for some h < 0
-      do { h -= 6; } while (h >= 6);
+      do {
+        h -= 6;
+      } while (h >= 6);
     }
 
     int sector = static_cast<int>(h);
@@ -886,15 +881,16 @@ inline void HLS2RGBConvert(const float& src_h,
 }
 
 inline void AdjustHueImpl(float alpha,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   int length = inputs[0].shape_[0] * inputs[0].shape_[1];
-  if (inputs[0].shape_[2] == 1) return;
+  if (inputs[0].shape_[2] == 1)
+    return;
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    DType* input = inputs[0].dptr<DType>();
+    DType* input  = inputs[0].dptr<DType>();
     DType* output = outputs[0].dptr<DType>();
 
     for (int i = 0; i < length; ++i) {
@@ -912,18 +908,18 @@ inline void AdjustHueImpl(float alpha,
   });
 }
 
-inline void RandomHue(const nnvm::NodeAttrs &attrs,
-               const OpContext &ctx,
-               const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &outputs) {
+inline void RandomHue(const nnvm::NodeAttrs& attrs,
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomEnhanceParam &param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
+  const RandomEnhanceParam& param = nnvm::get<RandomEnhanceParam>(attrs.parsed);
 
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, real_t>(s);
-  float alpha = std::uniform_real_distribution<float>(
-      param.min_factor, param.max_factor)(prnd->GetRndEngine());
+  Stream<cpu>* s    = ctx.get_stream<cpu>();
+  Random<cpu>* prnd = ctx.requested[0].get_random<cpu, real_t>(s);
+  float alpha       = std::uniform_real_distribution<float>(param.min_factor,
+                                                      param.max_factor)(prnd->GetRndEngine());
 
   AdjustHueImpl(alpha, ctx, inputs, req, outputs);
 }
@@ -934,26 +930,22 @@ struct RandomColorJitterParam : public dmlc::Parameter<RandomColorJitterParam> {
   float saturation;
   float hue;
   DMLC_DECLARE_PARAMETER(RandomColorJitterParam) {
-    DMLC_DECLARE_FIELD(brightness)
-    .describe("How much to jitter brightness.");
-    DMLC_DECLARE_FIELD(contrast)
-    .describe("How much to jitter contrast.");
-    DMLC_DECLARE_FIELD(saturation)
-    .describe("How much to jitter saturation.");
-    DMLC_DECLARE_FIELD(hue)
-    .describe("How much to jitter hue.");
+    DMLC_DECLARE_FIELD(brightness).describe("How much to jitter brightness.");
+    DMLC_DECLARE_FIELD(contrast).describe("How much to jitter contrast.");
+    DMLC_DECLARE_FIELD(saturation).describe("How much to jitter saturation.");
+    DMLC_DECLARE_FIELD(hue).describe("How much to jitter hue.");
   }
 };
 
-inline void RandomColorJitter(const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+inline void RandomColorJitter(const nnvm::NodeAttrs& attrs,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomColorJitterParam &param = nnvm::get<RandomColorJitterParam>(attrs.parsed);
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, real_t>(s);
+  const RandomColorJitterParam& param = nnvm::get<RandomColorJitterParam>(attrs.parsed);
+  Stream<cpu>* s                      = ctx.get_stream<cpu>();
+  Random<cpu>* prnd                   = ctx.requested[0].get_random<cpu, real_t>(s);
 
   int order[4] = {0, 1, 2, 3};
   std::shuffle(order, order + 4, prnd->GetRndEngine());
@@ -964,7 +956,7 @@ inline void RandomColorJitter(const nnvm::NodeAttrs &attrs,
       case 0:
         if (param.brightness > 0) {
           float alpha_b = 1.0 + std::uniform_real_distribution<float>(
-              -param.brightness, param.brightness)(prnd->GetRndEngine());
+                                    -param.brightness, param.brightness)(prnd->GetRndEngine());
           AdjustBrightnessImpl(alpha_b, ctx, flag ? outputs : inputs, req, outputs);
           flag = true;
         }
@@ -972,7 +964,7 @@ inline void RandomColorJitter(const nnvm::NodeAttrs &attrs,
       case 1:
         if (param.contrast > 0) {
           float alpha_c = 1.0 + std::uniform_real_distribution<float>(
-              -param.contrast, param.contrast)(prnd->GetRndEngine());
+                                    -param.contrast, param.contrast)(prnd->GetRndEngine());
           AdjustContrastImpl(alpha_c, ctx, flag ? outputs : inputs, req, outputs);
           flag = true;
         }
@@ -980,15 +972,15 @@ inline void RandomColorJitter(const nnvm::NodeAttrs &attrs,
       case 2:
         if (param.saturation > 0) {
           float alpha_s = 1.f + std::uniform_real_distribution<float>(
-              -param.saturation, param.saturation)(prnd->GetRndEngine());
+                                    -param.saturation, param.saturation)(prnd->GetRndEngine());
           AdjustSaturationImpl(alpha_s, ctx, flag ? outputs : inputs, req, outputs);
           flag = true;
         }
         break;
       case 3:
         if (param.hue > 0) {
-          float alpha_h = std::uniform_real_distribution<float>(
-              -param.hue, param.hue)(prnd->GetRndEngine());
+          float alpha_h =
+              std::uniform_real_distribution<float>(-param.hue, param.hue)(prnd->GetRndEngine());
           AdjustHueImpl(alpha_h, ctx, flag ? outputs : inputs, req, outputs);
           flag = true;
         }
@@ -1000,34 +992,30 @@ inline void RandomColorJitter(const nnvm::NodeAttrs &attrs,
 struct AdjustLightingParam : public dmlc::Parameter<AdjustLightingParam> {
   mxnet::Tuple<float> alpha;
   DMLC_DECLARE_PARAMETER(AdjustLightingParam) {
-    DMLC_DECLARE_FIELD(alpha)
-    .describe("The lighting alphas for the R, G, B channels.");
+    DMLC_DECLARE_FIELD(alpha).describe("The lighting alphas for the R, G, B channels.");
   }
 };
 
 struct RandomLightingParam : public dmlc::Parameter<RandomLightingParam> {
   float alpha_std;
   DMLC_DECLARE_PARAMETER(RandomLightingParam) {
-    DMLC_DECLARE_FIELD(alpha_std)
-    .set_default(0.05)
-    .describe("Level of the lighting noise.");
+    DMLC_DECLARE_FIELD(alpha_std).set_default(0.05).describe("Level of the lighting noise.");
   }
 };
 
 inline void AdjustLightingImpl(const mxnet::Tuple<float>& alpha,
-                        const OpContext &ctx,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
-  static const float eig[3][3] = {
-      { 55.46 * -0.5675, 4.794 * 0.7192,  1.148 * 0.4009 },
-      { 55.46 * -0.5808, 4.794 * -0.0045, 1.148 * -0.8140 },
-      { 55.46 * -0.5836, 4.794 * -0.6948, 1.148 * 0.4203 }
-    };
-
-  int length = inputs[0].shape_[0] * inputs[0].shape_[1];
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
+  static const float eig[3][3] = {{55.46 * -0.5675, 4.794 * 0.7192, 1.148 * 0.4009},
+                                  {55.46 * -0.5808, 4.794 * -0.0045, 1.148 * -0.8140},
+                                  {55.46 * -0.5836, 4.794 * -0.6948, 1.148 * 0.4203}};
+
+  int length   = inputs[0].shape_[0] * inputs[0].shape_[1];
   int channels = inputs[0].shape_[2];
-  if (channels == 1) return;
+  if (channels == 1)
+    return;
 
   float pca_r = eig[0][0] * alpha[0] + eig[0][1] * alpha[1] + eig[0][2] * alpha[2];
   float pca_g = eig[1][0] * alpha[0] + eig[1][1] * alpha[1] + eig[1][2] * alpha[2];
@@ -1035,39 +1023,39 @@ inline void AdjustLightingImpl(const mxnet::Tuple<float>& alpha,
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     DType* output = outputs[0].dptr<DType>();
-    DType* input = inputs[0].dptr<DType>();
+    DType* input  = inputs[0].dptr<DType>();
 
     for (int i = 0; i < length; i++) {
-      int base_ind = 3 * i;
-      float in_r = static_cast<float>(input[base_ind]);
-      float in_g = static_cast<float>(input[base_ind + 1]);
-      float in_b = static_cast<float>(input[base_ind + 2]);
-      output[base_ind] = saturate_cast<DType>(in_r + pca_r);
+      int base_ind         = 3 * i;
+      float in_r           = static_cast<float>(input[base_ind]);
+      float in_g           = static_cast<float>(input[base_ind + 1]);
+      float in_b           = static_cast<float>(input[base_ind + 2]);
+      output[base_ind]     = saturate_cast<DType>(in_r + pca_r);
       output[base_ind + 1] = saturate_cast<DType>(in_g + pca_g);
       output[base_ind + 2] = saturate_cast<DType>(in_b + pca_b);
     }
   });
 }
 
-inline void AdjustLighting(const nnvm::NodeAttrs &attrs,
-                    const OpContext &ctx,
-                    const std::vector<TBlob> &inputs,
-                    const std::vector<OpReqType> &req,
-                    const std::vector<TBlob> &outputs) {
+inline void AdjustLighting(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const AdjustLightingParam &param = nnvm::get<AdjustLightingParam>(attrs.parsed);
+  const AdjustLightingParam& param = nnvm::get<AdjustLightingParam>(attrs.parsed);
   AdjustLightingImpl(param.alpha, ctx, inputs, req, outputs);
 }
 
-inline void RandomLighting(const nnvm::NodeAttrs &attrs,
-                    const OpContext &ctx,
-                    const std::vector<TBlob> &inputs,
-                    const std::vector<OpReqType> &req,
-                    const std::vector<TBlob> &outputs) {
+inline void RandomLighting(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const RandomLightingParam &param = nnvm::get<RandomLightingParam>(attrs.parsed);
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  Random<cpu> *prnd = ctx.requested[0].get_random<cpu, float>(s);
+  const RandomLightingParam& param = nnvm::get<RandomLightingParam>(attrs.parsed);
+  Stream<cpu>* s                   = ctx.get_stream<cpu>();
+  Random<cpu>* prnd                = ctx.requested[0].get_random<cpu, float>(s);
   std::normal_distribution<float> dist(0, param.alpha_std);
   float alpha_r = dist(prnd->GetRndEngine());
   float alpha_g = dist(prnd->GetRndEngine());
@@ -1075,27 +1063,24 @@ inline void RandomLighting(const nnvm::NodeAttrs &attrs,
   AdjustLightingImpl({alpha_r, alpha_g, alpha_b}, ctx, inputs, req, outputs);
 }
 
-
-#define MXNET_REGISTER_IMAGE_AUG_OP(name)                                   \
-  NNVM_REGISTER_OP(name)                                                    \
-  .set_num_inputs(1)                                                        \
-  .set_num_outputs(1)                                                       \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                         \
-    [](const NodeAttrs& attrs){                                             \
-      return std::vector<std::pair<int, int> >{{0, 0}};                     \
-    })                                                                      \
-  .set_attr<mxnet::FInferShape>("FInferShape", ImageShape)                   \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)             \
-  .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_copy" })   \
-  .add_argument("data", "NDArray-or-Symbol", "The input.")
-
-
-#define MXNET_REGISTER_IMAGE_RND_AUG_OP(name)                               \
-  MXNET_REGISTER_IMAGE_AUG_OP(name)                                         \
-  .set_attr<FResourceRequest>("FResourceRequest",                           \
-    [](const NodeAttrs& attrs) {                                            \
-      return std::vector<ResourceRequest>{ResourceRequest::kRandom};        \
-    })
+#define MXNET_REGISTER_IMAGE_AUG_OP(name)                                                \
+  NNVM_REGISTER_OP(name)                                                                 \
+      .set_num_inputs(1)                                                                 \
+      .set_num_outputs(1)                                                                \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                  \
+                                      [](const NodeAttrs& attrs) {                       \
+                                        return std::vector<std::pair<int, int>>{{0, 0}}; \
+                                      })                                                 \
+      .set_attr<mxnet::FInferShape>("FInferShape", ImageShape)                           \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                      \
+      .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})              \
+      .add_argument("data", "NDArray-or-Symbol", "The input.")
+
+#define MXNET_REGISTER_IMAGE_RND_AUG_OP(name)                          \
+  MXNET_REGISTER_IMAGE_AUG_OP(name).set_attr<FResourceRequest>(        \
+      "FResourceRequest", [](const NodeAttrs& attrs) {                 \
+        return std::vector<ResourceRequest>{ResourceRequest::kRandom}; \
+      })
 
 }  // namespace image
 }  // namespace op
diff --git a/src/operator/image/image_random.cc b/src/operator/image/image_random.cc
index e552457078f9..71fc22c4ff8f 100644
--- a/src/operator/image/image_random.cc
+++ b/src/operator/image/image_random.cc
@@ -1,27 +1,27 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
-* \file image_random.cc
-* \brief
-* \author
-*/
+ * \file image_random.cc
+ * \brief
+ * \author
+ */
 
 #include <mxnet/base.h>
 #include "./image_random-inl.h"
@@ -40,8 +40,8 @@ DMLC_REGISTER_PARAMETER(RandomLightingParam);
 DMLC_REGISTER_PARAMETER(RandomColorJitterParam);
 
 NNVM_REGISTER_OP(_image_to_tensor)
-.add_alias("_npx__image_to_tensor")
-.describe(R"code(Converts an image NDArray of shape (H x W x C) or (N x H x W x C) 
+    .add_alias("_npx__image_to_tensor")
+    .describe(R"code(Converts an image NDArray of shape (H x W x C) or (N x H x W x C) 
 with values in the range [0, 255] to a tensor NDArray of shape (C x H x W) or (N x C x H x W)
 with values in the range [0, 1].
 
@@ -92,21 +92,21 @@ Examples
 <NDArray 2x3x4x2 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ToTensorShape)
-.set_attr<nnvm::FInferType>("FInferType", ToTensorType)
-.set_attr<FCompute>("FCompute<cpu>", ToTensorOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_copy" })
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ToTensorShape)
+    .set_attr<nnvm::FInferType>("FInferType", ToTensorType)
+    .set_attr<FCompute>("FCompute<cpu>", ToTensorOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray");
 
 NNVM_REGISTER_OP(_image_normalize)
-.add_alias("_npx__image_normalize")
-.describe(R"code(Normalize an tensor of shape (C x H x W) or (N x C x H x W) with mean and
+    .add_alias("_npx__image_normalize")
+    .describe(R"code(Normalize an tensor of shape (C x H x W) or (N x C x H x W) with mean and
 standard deviation.
 
 Given mean `(m1, ..., mn)` and std `(s\ :sub:`1`\ , ..., s\ :sub:`n`)` for `n` channels,
@@ -169,108 +169,104 @@ this transform normalizes each channel of the input tensor with:
         <NDArray 2x3x4x2 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NormalizeParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NormalizeOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NormalizeOpType)
-.set_attr<FCompute>("FCompute<cpu>", NormalizeOpForward<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_image_normalize"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NormalizeParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NormalizeParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NormalizeOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NormalizeOpType)
+    .set_attr<FCompute>("FCompute<cpu>", NormalizeOpForward<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_image_normalize"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NormalizeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_image_normalize)
-.set_attr_parser(ParamParser<NormalizeParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NormalizeOpBackward<cpu>);
+    .set_attr_parser(ParamParser<NormalizeParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NormalizeOpBackward<cpu>);
 
 MXNET_REGISTER_IMAGE_AUG_OP(_image_flip_left_right)
-.add_alias("_npx__image_flip_left_right")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", FlipLeftRight);
+    .add_alias("_npx__image_flip_left_right")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr<FCompute>("FCompute<cpu>", FlipLeftRight);
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_flip_left_right)
-.add_alias("_npx__image_random_flip_left_right")
-.set_attr_parser(ParamParser<RandomFlipParam>)
-.describe(R"code()code" ADD_FILELINE)
-.add_arguments(RandomFlipParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", RandomFlipLeftRight);
+    .add_alias("_npx__image_random_flip_left_right")
+    .set_attr_parser(ParamParser<RandomFlipParam>)
+    .describe(R"code()code" ADD_FILELINE)
+    .add_arguments(RandomFlipParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", RandomFlipLeftRight);
 
 MXNET_REGISTER_IMAGE_AUG_OP(_image_flip_top_bottom)
-.add_alias("_npx__image_flip_top_bottom")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", FlipTopBottom);
+    .add_alias("_npx__image_flip_top_bottom")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr<FCompute>("FCompute<cpu>", FlipTopBottom);
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_flip_top_bottom)
-.add_alias("_npx__image_random_flip_top_bottom")
-.set_attr_parser(ParamParser<RandomFlipParam>)
-.describe(R"code()code" ADD_FILELINE)
-.add_arguments(RandomFlipParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", RandomFlipTopBottom);
+    .add_alias("_npx__image_random_flip_top_bottom")
+    .set_attr_parser(ParamParser<RandomFlipParam>)
+    .describe(R"code()code" ADD_FILELINE)
+    .add_arguments(RandomFlipParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", RandomFlipTopBottom);
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_brightness)
-.add_alias("_npx__image_random_brightness")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RandomEnhanceParam>)
-.set_attr<FCompute>("FCompute<cpu>", RandomBrightness)
-.add_arguments(RandomEnhanceParam::__FIELDS__());
+    .add_alias("_npx__image_random_brightness")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<RandomEnhanceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomBrightness)
+    .add_arguments(RandomEnhanceParam::__FIELDS__());
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_contrast)
-.add_alias("_npx__image_random_contrast")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RandomEnhanceParam>)
-.set_attr<FCompute>("FCompute<cpu>", RandomContrast)
-.add_arguments(RandomEnhanceParam::__FIELDS__());
-
+    .add_alias("_npx__image_random_contrast")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<RandomEnhanceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomContrast)
+    .add_arguments(RandomEnhanceParam::__FIELDS__());
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_saturation)
-.add_alias("_npx__image_random_saturation")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RandomEnhanceParam>)
-.set_attr<FCompute>("FCompute<cpu>", RandomSaturation)
-.add_arguments(RandomEnhanceParam::__FIELDS__());
-
+    .add_alias("_npx__image_random_saturation")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<RandomEnhanceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomSaturation)
+    .add_arguments(RandomEnhanceParam::__FIELDS__());
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_hue)
-.add_alias("_npx__image_random_hue")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RandomEnhanceParam>)
-.set_attr<FCompute>("FCompute<cpu>", RandomHue)
-.add_arguments(RandomEnhanceParam::__FIELDS__());
-
+    .add_alias("_npx__image_random_hue")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<RandomEnhanceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomHue)
+    .add_arguments(RandomEnhanceParam::__FIELDS__());
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_color_jitter)
-.add_alias("_npx__image_random_color_jitter")
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RandomColorJitterParam>)
-.set_attr<FCompute>("FCompute<cpu>", RandomColorJitter)
-.add_arguments(RandomColorJitterParam::__FIELDS__());
-
+    .add_alias("_npx__image_random_color_jitter")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<RandomColorJitterParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomColorJitter)
+    .add_arguments(RandomColorJitterParam::__FIELDS__());
 
 MXNET_REGISTER_IMAGE_AUG_OP(_image_adjust_lighting)
-.add_alias("_npx__image_adjust_lighting")
-.describe(R"code(Adjust the lighting level of the input. Follow the AlexNet style.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<AdjustLightingParam>)
-.set_attr<FCompute>("FCompute<cpu>", AdjustLighting)
-.add_arguments(AdjustLightingParam::__FIELDS__());
-
+    .add_alias("_npx__image_adjust_lighting")
+    .describe(
+        R"code(Adjust the lighting level of the input. Follow the AlexNet style.)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<AdjustLightingParam>)
+    .set_attr<FCompute>("FCompute<cpu>", AdjustLighting)
+    .add_arguments(AdjustLightingParam::__FIELDS__());
 
 MXNET_REGISTER_IMAGE_RND_AUG_OP(_image_random_lighting)
-.add_alias("_npx__image_random_lighting")
-.describe(R"code(Randomly add PCA noise. Follow the AlexNet style.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RandomLightingParam>)
-.set_attr<FCompute>("FCompute<cpu>", RandomLighting)
-.add_arguments(RandomLightingParam::__FIELDS__());
+    .add_alias("_npx__image_random_lighting")
+    .describe(R"code(Randomly add PCA noise. Follow the AlexNet style.)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<RandomLightingParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RandomLighting)
+    .add_arguments(RandomLightingParam::__FIELDS__());
 
 }  // namespace image
 }  // namespace op
diff --git a/src/operator/image/image_random.cu b/src/operator/image/image_random.cu
index 5dfbbd3b6b00..cd463ae2e78b 100644
--- a/src/operator/image/image_random.cu
+++ b/src/operator/image/image_random.cu
@@ -1,26 +1,26 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
-* \file image_random.cu
-* \brief GPU Implementation of image transformation operators
-*/
+ * \file image_random.cu
+ * \brief GPU Implementation of image transformation operators
+ */
 #include <cuda_runtime_api.h>
 #include "./image_random-inl.h"
 #include "../elemwise_op_common.h"
@@ -40,128 +40,126 @@ using namespace mshadow;
  * threads per block. Setting __launch_bounds__ ensures
  * that such configuration can always be launched.
  */
-template<typename xpu, typename Dtype>
-__global__ void
-__launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
-ToTensorCudaKernel(const Tensor<xpu, 3, Dtype> input,
-                   const Tensor<xpu, 3, float> output,
-                   const int req,
-                   const int N,
-                   const int H,
-                   const int W,
-                   const int C,
-                   const float normalize_factor) {
-    // We process one image per thread block.
-    // In 3D case, we have only 1 block i.e., blockIdx.x
-    // We do not use it.
-    for (int c = 0; c < C; ++c) {
-        for (int h = threadIdx.y; h < H; h += blockDim.y) {
-            for (int w = threadIdx.x; w < W; w += blockDim.x) {
-                KERNEL_ASSIGN(output[c][h][w], req,
-                              input[h][w][c] / normalize_factor);
-            }
-        }
+template <typename xpu, typename Dtype>
+__global__ void __launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
+    ToTensorCudaKernel(const Tensor<xpu, 3, Dtype> input,
+                       const Tensor<xpu, 3, float> output,
+                       const int req,
+                       const int N,
+                       const int H,
+                       const int W,
+                       const int C,
+                       const float normalize_factor) {
+  // We process one image per thread block.
+  // In 3D case, we have only 1 block i.e., blockIdx.x
+  // We do not use it.
+  for (int c = 0; c < C; ++c) {
+    for (int h = threadIdx.y; h < H; h += blockDim.y) {
+      for (int w = threadIdx.x; w < W; w += blockDim.x) {
+        KERNEL_ASSIGN(output[c][h][w], req, input[h][w][c] / normalize_factor);
+      }
     }
+  }
 }
 
 // ToTensor Kernel for 4D input
-template<typename xpu, typename Dtype>
-__global__ void
-__launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
-ToTensorCudaKernel(const Tensor<xpu, 4, Dtype> input,
-                   const Tensor<xpu, 4, float> output,
-                   const int req,
-                   const int N,
-                   const int H,
-                   const int W,
-                   const int C,
-                   const float normalize_factor) {
-    // We process one image per thread block.
-    const int n = blockIdx.x;
-
-    for (int c = 0; c < C; ++c) {
-        for (int h = threadIdx.y; h < H; h += blockDim.y) {
-            for (int w = threadIdx.x; w < W; w += blockDim.x) {
-                KERNEL_ASSIGN(output[n][c][h][w], req,
-                              input[n][h][w][c] / normalize_factor);
-            }
-        }
+template <typename xpu, typename Dtype>
+__global__ void __launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
+    ToTensorCudaKernel(const Tensor<xpu, 4, Dtype> input,
+                       const Tensor<xpu, 4, float> output,
+                       const int req,
+                       const int N,
+                       const int H,
+                       const int W,
+                       const int C,
+                       const float normalize_factor) {
+  // We process one image per thread block.
+  const int n = blockIdx.x;
+
+  for (int c = 0; c < C; ++c) {
+    for (int h = threadIdx.y; h < H; h += blockDim.y) {
+      for (int w = threadIdx.x; w < W; w += blockDim.x) {
+        KERNEL_ASSIGN(output[n][c][h][w], req, input[n][h][w][c] / normalize_factor);
+      }
     }
+  }
 }
 
-template<typename DType, typename T1, typename T2>
-void ToTensorImplCUDA(mshadow::Stream<gpu> *s,
+template <typename DType, typename T1, typename T2>
+void ToTensorImplCUDA(mshadow::Stream<gpu>* s,
                       const T1 input,
                       const T2 output,
                       const int req,
                       const float normalize_factor) {
-    int blocks, H, W, C, N;
-    cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-    if (std::is_same<T1, Tensor<gpu, 3, DType>>::value) {
-        // 3D Input - (H, W, C)
-        N = 0;
-        H = input.size(0);
-        W = input.size(1);
-        C = input.size(2);
-        blocks = 1;
-    } else {
-        // 4D Input - (N, H, W, C)
-        N = input.size(0);
-        H = input.size(1);
-        W = input.size(2);
-        C = input.size(3);
-        blocks = N > 0 ? N : 1;
-    }
-
-    ToTensorCudaKernel<gpu, DType>
-            <<<blocks, dim3(32, 32), 0, stream>>>(input, output,
-                req, N, H, W, C, normalize_factor);
-        MSHADOW_CUDA_POST_KERNEL_CHECK(ToTensorCudaKernel);
+  int blocks, H, W, C, N;
+  cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
+  if (std::is_same<T1, Tensor<gpu, 3, DType>>::value) {
+    // 3D Input - (H, W, C)
+    N      = 0;
+    H      = input.size(0);
+    W      = input.size(1);
+    C      = input.size(2);
+    blocks = 1;
+  } else {
+    // 4D Input - (N, H, W, C)
+    N      = input.size(0);
+    H      = input.size(1);
+    W      = input.size(2);
+    C      = input.size(3);
+    blocks = N > 0 ? N : 1;
+  }
+
+  ToTensorCudaKernel<gpu, DType>
+      <<<blocks, dim3(32, 32), 0, stream>>>(input, output, req, N, H, W, C, normalize_factor);
+  MSHADOW_CUDA_POST_KERNEL_CHECK(ToTensorCudaKernel);
 }
 
 // Normalize Forward CUDA Kernel
-template<typename xpu, typename DType>
-__global__ void
-__launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
-NormalizeCudaKernel(const DType* input,
-                    DType* output,
-                    const int req,
-                    const int N,
-                    const int C,
-                    const int H,
-                    const int W,
-                    const float mean_d0,
-                    const float mean_d1,
-                    const float mean_d2,
-                    const float std_d0,
-                    const float std_d1,
-                    const float std_d2) {
-    // We process one image per thread block.
-    const int n = blockIdx.x;
-    const int length = H * W;
-    const int step = C * length * n;
-
-    float mean = mean_d0;
-    float std = std_d0;
-    for (int c = 0; c < C; ++c) {
-        switch (c) {
-            case 0 : break;
-            case 1 : mean = mean_d1;
-                     std = std_d1;
-                     break;
-            case 2 : mean = mean_d2;
-                     std = std_d2;
-                     break;
-        }
-        for (int i = threadIdx.x; i < length; i += blockDim.x) {
-            KERNEL_ASSIGN(*(output + step + i + (c * length)), req,
-                      (*(input + step + i + (c * length)) - mean) / std);
-        }
+template <typename xpu, typename DType>
+__global__ void __launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
+    NormalizeCudaKernel(const DType* input,
+                        DType* output,
+                        const int req,
+                        const int N,
+                        const int C,
+                        const int H,
+                        const int W,
+                        const float mean_d0,
+                        const float mean_d1,
+                        const float mean_d2,
+                        const float std_d0,
+                        const float std_d1,
+                        const float std_d2) {
+  // We process one image per thread block.
+  const int n      = blockIdx.x;
+  const int length = H * W;
+  const int step   = C * length * n;
+
+  float mean = mean_d0;
+  float std  = std_d0;
+  for (int c = 0; c < C; ++c) {
+    switch (c) {
+      case 0:
+        break;
+      case 1:
+        mean = mean_d1;
+        std  = std_d1;
+        break;
+      case 2:
+        mean = mean_d2;
+        std  = std_d2;
+        break;
     }
+    for (int i = threadIdx.x; i < length; i += blockDim.x) {
+      KERNEL_ASSIGN(*(output + step + i + (c * length)),
+                    req,
+                    (*(input + step + i + (c * length)) - mean) / std);
+    }
+  }
 }
 
-template<typename DType>
-void NormalizeImplCUDA(mshadow::Stream<gpu> *s,
+template <typename DType>
+void NormalizeImplCUDA(mshadow::Stream<gpu>* s,
                        const DType* input,
                        DType* output,
                        const int req,
@@ -175,54 +173,56 @@ void NormalizeImplCUDA(mshadow::Stream<gpu> *s,
                        const float std_d0,
                        const float std_d1,
                        const float std_d2) {
-    cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-    NormalizeCudaKernel<gpu, DType>
-    // 1 image per block. N is batch size.
-    <<<N, dim3(cuda::kMaxThreadsPerBlock, 1), 0, stream>>>(input, output,
-        req, N, C, H, W, mean_d0, mean_d1, mean_d2,
-        std_d0, std_d1, std_d2);
-    MSHADOW_CUDA_POST_KERNEL_CHECK(NormalizeCudaKernel);
+  cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
+  NormalizeCudaKernel<gpu, DType>
+      // 1 image per block. N is batch size.
+      <<<N, dim3(cuda::kMaxThreadsPerBlock, 1), 0, stream>>>(
+          input, output, req, N, C, H, W, mean_d0, mean_d1, mean_d2, std_d0, std_d1, std_d2);
+  MSHADOW_CUDA_POST_KERNEL_CHECK(NormalizeCudaKernel);
 }
 
 // Normalize Backward Kernel
-template<typename xpu, typename DType>
-__global__ void
-__launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
-NormalizeBackwardCudaKernel(const DType *out_grad,
-                            DType *in_grad,
-                            const int req,
-                            const int N,
-                            const int C,
-                            const int H,
-                            const int W,
-                            const float std_d0,
-                            const float std_d1,
-                            const float std_d2) {
-    // We process one image per thread block.
-    const int n = blockIdx.x;
-    const int length = H * W;
-    const int step = C * length * n;
-
-    float std = std_d0;
-    for (int c = 0; c < C; ++c) {
-        switch (c) {
-            case 0 : break;
-            case 1 : std = std_d1;
-                     break;
-            case 2 : std = std_d2;
-                     break;
-        }
-        for (int i = threadIdx.x; i < length; i += blockDim.x) {
-            KERNEL_ASSIGN(*(in_grad + step + i + (c * length)), req,
-                          *(out_grad + step + i + (c * length)) * (1.0 / std));
-        }
+template <typename xpu, typename DType>
+__global__ void __launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
+    NormalizeBackwardCudaKernel(const DType* out_grad,
+                                DType* in_grad,
+                                const int req,
+                                const int N,
+                                const int C,
+                                const int H,
+                                const int W,
+                                const float std_d0,
+                                const float std_d1,
+                                const float std_d2) {
+  // We process one image per thread block.
+  const int n      = blockIdx.x;
+  const int length = H * W;
+  const int step   = C * length * n;
+
+  float std = std_d0;
+  for (int c = 0; c < C; ++c) {
+    switch (c) {
+      case 0:
+        break;
+      case 1:
+        std = std_d1;
+        break;
+      case 2:
+        std = std_d2;
+        break;
+    }
+    for (int i = threadIdx.x; i < length; i += blockDim.x) {
+      KERNEL_ASSIGN(*(in_grad + step + i + (c * length)),
+                    req,
+                    *(out_grad + step + i + (c * length)) * (1.0 / std));
     }
+  }
 }
 
-template<typename DType>
-void NormalizeBackwardImplCUDA(mshadow::Stream<gpu> *s,
-                               const DType *out_grad,
-                               DType *in_grad,
+template <typename DType>
+void NormalizeBackwardImplCUDA(mshadow::Stream<gpu>* s,
+                               const DType* out_grad,
+                               DType* in_grad,
                                const int req,
                                const int N,
                                const int C,
@@ -231,22 +231,20 @@ void NormalizeBackwardImplCUDA(mshadow::Stream<gpu> *s,
                                const float std_d0,
                                const float std_d1,
                                const float std_d2) {
-    cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-    NormalizeBackwardCudaKernel<gpu, DType>
-    // 1 image per block. N is batch size.
-    <<<N, dim3(cuda::kMaxThreadsPerBlock, 1), 0, stream>>>(out_grad, in_grad,
-        req, N, C, H, W, std_d0, std_d1, std_d2);
-    MSHADOW_CUDA_POST_KERNEL_CHECK(NormalizeBackwardCudaKernel);
+  cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
+  NormalizeBackwardCudaKernel<gpu, DType>
+      // 1 image per block. N is batch size.
+      <<<N, dim3(cuda::kMaxThreadsPerBlock, 1), 0, stream>>>(
+          out_grad, in_grad, req, N, C, H, W, std_d0, std_d1, std_d2);
+  MSHADOW_CUDA_POST_KERNEL_CHECK(NormalizeBackwardCudaKernel);
 }
 
-NNVM_REGISTER_OP(_image_to_tensor)
-.set_attr<FCompute>("FCompute<gpu>", ToTensorOpForward<gpu>);
+NNVM_REGISTER_OP(_image_to_tensor).set_attr<FCompute>("FCompute<gpu>", ToTensorOpForward<gpu>);
 
-NNVM_REGISTER_OP(_image_normalize)
-.set_attr<FCompute>("FCompute<gpu>", NormalizeOpForward<gpu>);
+NNVM_REGISTER_OP(_image_normalize).set_attr<FCompute>("FCompute<gpu>", NormalizeOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_image_normalize)
-.set_attr<FCompute>("FCompute<gpu>", NormalizeOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NormalizeOpBackward<gpu>);
 
 }  // namespace image
 }  // namespace op
diff --git a/src/operator/image/image_utils.h b/src/operator/image/image_utils.h
index a7155345c967..23a5ffc4b75c 100644
--- a/src/operator/image/image_utils.h
+++ b/src/operator/image/image_utils.h
@@ -1,21 +1,21 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
  *  Copyright (c) 2019 by Contributors
@@ -29,26 +29,26 @@
 
 #include <vector>
 #if MXNET_USE_OPENCV
-  #include <opencv2/opencv.hpp>
+#include <opencv2/opencv.hpp>
 #endif  // MXNET_USE_OPENCV
 
 namespace mxnet {
 namespace op {
 namespace image {
 
-enum ImageLayout {H, W, C};
-enum BatchImageLayout {N, kH, kW, kC};
+enum ImageLayout { H, W, C };
+enum BatchImageLayout { N, kH, kW, kC };
 
 struct SizeParam {
   int height;
   int width;
   SizeParam() {
     height = 0;
-    width = 0;
+    width  = 0;
   }
   SizeParam(int height_, int width_) {
     height = height_;
-    width = width_;
+    width  = width_;
   }
 };  // struct SizeParam
 
diff --git a/src/operator/image/resize-inl.h b/src/operator/image/resize-inl.h
index b6f64d40ca82..f11c2ea540ef 100644
--- a/src/operator/image/resize-inl.h
+++ b/src/operator/image/resize-inl.h
@@ -1,26 +1,26 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 /*!
-* \file resize-inl.h
-* \brief image resize operator using opencv and only support bilinear resize
-* \author Jake Lee
-*/
+ * \file resize-inl.h
+ * \brief image resize operator using opencv and only support bilinear resize
+ * \author Jake Lee
+ */
 #ifndef MXNET_OPERATOR_IMAGE_RESIZE_INL_H_
 #define MXNET_OPERATOR_IMAGE_RESIZE_INL_H_
 
@@ -32,7 +32,7 @@
 #include "image_utils.h"
 
 #if MXNET_USE_OPENCV
-  #include <opencv2/opencv.hpp>
+#include <opencv2/opencv.hpp>
 #endif  // MXNET_USE_OPENCV
 
 namespace mxnet {
@@ -42,10 +42,8 @@ namespace image {
 using namespace mshadow;
 
 #if MXNET_USE_CUDA
-template<typename DType, typename T, typename Acctype>
-void ResizeImplCUDA(Stream<gpu> *s,
-                      const T input,
-                      const T output);
+template <typename DType, typename T, typename Acctype>
+void ResizeImplCUDA(Stream<gpu>* s, const T input, const T output);
 #endif  // MXNET_USE_CUDA
 
 struct ResizeParam : public dmlc::Parameter<ResizeParam> {
@@ -54,15 +52,15 @@ struct ResizeParam : public dmlc::Parameter<ResizeParam> {
   int interp;
   DMLC_DECLARE_PARAMETER(ResizeParam) {
     DMLC_DECLARE_FIELD(size)
-    .set_default(mxnet::Tuple<int>())
-    .describe("Size of new image. Could be (width, height) or (size)");
+        .set_default(mxnet::Tuple<int>())
+        .describe("Size of new image. Could be (width, height) or (size)");
     DMLC_DECLARE_FIELD(keep_ratio)
-    .describe("Whether to resize the short edge or both edges to `size`, "
-      "if size is give as an integer.")
-    .set_default(false);
-    DMLC_DECLARE_FIELD(interp)
-    .set_default(1)
-    .describe("Interpolation method for resizing. By default uses bilinear interpolation"
+        .describe(
+            "Whether to resize the short edge or both edges to `size`, "
+            "if size is give as an integer.")
+        .set_default(false);
+    DMLC_DECLARE_FIELD(interp).set_default(1).describe(
+        "Interpolation method for resizing. By default uses bilinear interpolation"
         "Options are INTER_NEAREST - a nearest-neighbor interpolation"
         "INTER_LINEAR - a bilinear interpolation"
         "INTER_AREA - resampling using pixel area relation"
@@ -72,18 +70,13 @@ struct ResizeParam : public dmlc::Parameter<ResizeParam> {
   }
 };
 // handle the keep ratio param
-inline SizeParam GetHeightAndWidth(int data_h,
-                                    int data_w,
-                                    const ResizeParam& param) {
+inline SizeParam GetHeightAndWidth(int data_h, int data_w, const ResizeParam& param) {
   CHECK((param.size.ndim() == 1) || (param.size.ndim() == 2))
-      << "Input size dimension must be 1 or 2, but got "
-      << param.size.ndim();
+      << "Input size dimension must be 1 or 2, but got " << param.size.ndim();
   int resized_h;
   int resized_w;
   if (param.size.ndim() == 1) {
-    CHECK_GT(param.size[0], 0)
-      << "Input size should be greater than 0, but got "
-      << param.size[0];
+    CHECK_GT(param.size[0], 0) << "Input size should be greater than 0, but got " << param.size[0];
     if (!param.keep_ratio) {
       resized_h = param.size[0];
       resized_w = param.size[0];
@@ -97,12 +90,9 @@ inline SizeParam GetHeightAndWidth(int data_h,
       }
     }
   } else {
-    CHECK_GT(param.size[0], 0)
-        << "Input width should be greater than 0, but got "
-        << param.size[0];
-    CHECK_GT(param.size[1], 0)
-        << "Input height should be greater than 0, but got "
-        << param.size[1];
+    CHECK_GT(param.size[0], 0) << "Input width should be greater than 0, but got " << param.size[0];
+    CHECK_GT(param.size[1], 0) << "Input height should be greater than 0, but got "
+                               << param.size[1];
     resized_h = param.size[1];
     resized_w = param.size[0];
   }
@@ -110,12 +100,11 @@ inline SizeParam GetHeightAndWidth(int data_h,
 }
 
 inline bool ResizeShapeImpl(const ResizeParam& param,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   // input attrs should only be (h, w, c) or (n, h, w, c)
   CHECK((in_attrs->at(0).ndim() == 3U) || (in_attrs->at(0).ndim() == 4U))
-    << "Input image dimension should be 3 or 4 but got "
-    << in_attrs->at(0).ndim();
+      << "Input image dimension should be 3 or 4 but got " << in_attrs->at(0).ndim();
   const auto& ishape = (*in_attrs)[0];
   SizeParam size;
   if (ishape.ndim() == 3) {
@@ -123,26 +112,26 @@ inline bool ResizeShapeImpl(const ResizeParam& param,
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape({size.height, size.width, ishape[C]}));
   } else {
     size = GetHeightAndWidth(ishape[kH], ishape[kW], param);
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-      mxnet::TShape({ishape[N], size.height, size.width, ishape[kC]}));
+    SHAPE_ASSIGN_CHECK(
+        *out_attrs, 0, mxnet::TShape({ishape[N], size.height, size.width, ishape[kC]}));
   }
   return true;
 }
 
 inline bool ResizeShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   const ResizeParam& param = nnvm::get<ResizeParam>(attrs.parsed);
   return ResizeShapeImpl(param, in_attrs, out_attrs);
 }
 
-inline void ResizeImpl(const std::vector<TBlob> &inputs,
-                      const std::vector<TBlob> &outputs,
-                      const int height,
-                      const int width,
-                      const int interp,
-                      const int input_index = 0,
-                      const int output_index = 0) {
+inline void ResizeImpl(const std::vector<TBlob>& inputs,
+                       const std::vector<TBlob>& outputs,
+                       const int height,
+                       const int width,
+                       const int interp,
+                       const int input_index  = 0,
+                       const int output_index = 0) {
 #if MXNET_USE_OPENCV
   CHECK_NE(inputs[0].type_flag_, mshadow::kFloat16) << "opencv image mat doesn't support fp16";
   CHECK((inputs[0].type_flag_ != mshadow::kInt32) || (inputs[0].type_flag_ != mshadow::kInt64))
@@ -159,10 +148,14 @@ inline void ResizeImpl(const std::vector<TBlob> &inputs,
   } else {
     const int cv_type = CV_MAKETYPE(DTYPE[inputs[0].type_flag_], inputs[0].shape_[kC]);
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      cv::Mat buf(inputs[0].shape_[kH], inputs[0].shape_[kW], cv_type,
-        inputs[0].dptr<DType>() + input_index);
-      cv::Mat dst(outputs[0].shape_[kH], outputs[0].shape_[kW], cv_type,
-        outputs[0].dptr<DType>() + output_index);
+      cv::Mat buf(inputs[0].shape_[kH],
+                  inputs[0].shape_[kW],
+                  cv_type,
+                  inputs[0].dptr<DType>() + input_index);
+      cv::Mat dst(outputs[0].shape_[kH],
+                  outputs[0].shape_[kW],
+                  cv_type,
+                  outputs[0].dptr<DType>() + output_index);
       cv::resize(buf, dst, cv::Size(width, height), 0, 0, interp);
       CHECK(!dst.empty());
       CHECK_EQ(static_cast<void*>(dst.ptr()), outputs[0].dptr<DType>() + output_index);
@@ -175,21 +168,21 @@ inline void ResizeImpl(const std::vector<TBlob> &inputs,
 
 template <typename xpu>
 inline void ResizeImplWrapper(const ResizeParam& param,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<TBlob> &outputs) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<TBlob>& outputs) {
   SizeParam size;
   if (std::is_same<xpu, gpu>::value) {
 #if MXNET_USE_CUDA
     CHECK(param.interp == 1) << "interp should be 1 for using Resize on GPU.";
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
       if (inputs[0].ndim() == 3) {
-        Tensor<gpu, 3, DType> input = inputs[0].get<gpu, 3, DType>(s);
+        Tensor<gpu, 3, DType> input  = inputs[0].get<gpu, 3, DType>(s);
         Tensor<gpu, 3, DType> output = outputs[0].get<gpu, 3, DType>(s);
         ResizeImplCUDA<DType, Tensor<gpu, 3, DType>, float>(s, input, output);
       } else {
-        Tensor<gpu, 4, DType> input = inputs[0].get<gpu, 4, DType>(s);
+        Tensor<gpu, 4, DType> input  = inputs[0].get<gpu, 4, DType>(s);
         Tensor<gpu, 4, DType> output = outputs[0].get<gpu, 4, DType>(s);
         ResizeImplCUDA<DType, Tensor<gpu, 4, DType>, float>(s, input, output);
       }
@@ -199,24 +192,24 @@ inline void ResizeImplWrapper(const ResizeParam& param,
     size = GetHeightAndWidth(inputs[0].shape_[H], inputs[0].shape_[W], param);
     ResizeImpl(inputs, outputs, size.height, size.width, param.interp);
   } else {
-    size = GetHeightAndWidth(inputs[0].shape_[kH], inputs[0].shape_[kW], param);
-    const auto batch_size = inputs[0].shape_[N];
-    const auto input_step = inputs[0].shape_[kH] * inputs[0].shape_[kW] * inputs[0].shape_[kC];
+    size                   = GetHeightAndWidth(inputs[0].shape_[kH], inputs[0].shape_[kW], param);
+    const auto batch_size  = inputs[0].shape_[N];
+    const auto input_step  = inputs[0].shape_[kH] * inputs[0].shape_[kW] * inputs[0].shape_[kC];
     const auto output_step = size.height * size.width * inputs[0].shape_[kC];
-    #pragma omp parallel for
+#pragma omp parallel for
     for (auto i = 0; i < batch_size; ++i) {
-      ResizeImpl(inputs, outputs, size.height, size.width,
-        param.interp, i * input_step, i * output_step);
+      ResizeImpl(
+          inputs, outputs, size.height, size.width, param.interp, i * input_step, i * output_step);
     }
   }
 }
 
 template <typename xpu>
-inline void Resize(const nnvm::NodeAttrs &attrs,
-                   const OpContext &ctx,
-                   const std::vector<TBlob> &inputs,
-                   const std::vector<OpReqType> &req,
-                   const std::vector<TBlob> &outputs) {
+inline void Resize(const nnvm::NodeAttrs& attrs,
+                   const OpContext& ctx,
+                   const std::vector<TBlob>& inputs,
+                   const std::vector<OpReqType>& req,
+                   const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   const ResizeParam& param = nnvm::get<ResizeParam>(attrs.parsed);
   ResizeImplWrapper<xpu>(param, ctx, inputs, outputs);
diff --git a/src/operator/image/resize.cc b/src/operator/image/resize.cc
index 2e8139f51eda..ed698b501b8b 100644
--- a/src/operator/image/resize.cc
+++ b/src/operator/image/resize.cc
@@ -1,27 +1,27 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 /*!
  * Copyright (c) 2019 by Contributors
  * \file resize.cc
  * \brief resize operator cpu
  * \author Jake Lee
-*/
+ */
 #include <mxnet/base.h>
 #include "./resize-inl.h"
 #include "../operator_common.h"
@@ -34,8 +34,8 @@ namespace image {
 DMLC_REGISTER_PARAMETER(ResizeParam);
 
 NNVM_REGISTER_OP(_image_resize)
-.add_alias("_npx__image_resize")
-.describe(R"code(Resize an image NDArray of shape (H x W x C) or (N x H x W x C)
+    .add_alias("_npx__image_resize")
+    .describe(R"code(Resize an image NDArray of shape (H x W x C) or (N x H x W x C)
 to the given size. Example:
 
 .. code-block:: python
@@ -72,15 +72,15 @@ to the given size. Example:
         <NDArray 2x2x2x3 @cpu(0)>
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ResizeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ResizeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", Resize<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_copy" })
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(ResizeParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ResizeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ResizeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", Resize<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(ResizeParam::__FIELDS__());
 
 }  // namespace image
 }  // namespace op
diff --git a/src/operator/image/resize.cu b/src/operator/image/resize.cu
index a40966d1b5e4..1f463d147d7b 100644
--- a/src/operator/image/resize.cu
+++ b/src/operator/image/resize.cu
@@ -21,7 +21,7 @@
  * \file bilinear_resize.cu
  * \brief bilinear resize operator
  * \author Hang Zhang, Jake Lee
-*/
+ */
 #include <algorithm>
 #include "./resize-inl.h"
 #include "../contrib/bilinear_resize-inl.cuh"
@@ -32,42 +32,36 @@ namespace image {
 
 using namespace mshadow;
 
-template<typename DType, typename T, typename AccReal>
-void ResizeImplCUDA(mshadow::Stream<gpu> *s,
-                      const T input,
-                      const T output) {
+template <typename DType, typename T, typename AccReal>
+void ResizeImplCUDA(mshadow::Stream<gpu>* s, const T input, const T output) {
   int outputHeight;
   int outputWidth;
   int inputHeight;
   int inputWidth;
   if (std::is_same<T, Tensor<gpu, 3, DType>>::value) {
     outputHeight = output.size(0);
-    outputWidth = output.size(1);
-    inputHeight = input.size(0);
-    inputWidth = input.size(1);
+    outputWidth  = output.size(1);
+    inputHeight  = input.size(0);
+    inputWidth   = input.size(1);
   } else {
     outputHeight = output.size(1);
-    outputWidth = output.size(2);
-    inputHeight = input.size(1);
-    inputWidth = input.size(2);
+    outputWidth  = output.size(2);
+    inputHeight  = input.size(1);
+    inputWidth   = input.size(2);
   }
-  const AccReal rheight = cu_area_pixel_compute_scale<AccReal>(
-    inputHeight, outputHeight, false);
-  const AccReal rwidth = cu_area_pixel_compute_scale<AccReal>(
-    inputWidth, outputWidth, false);
+  const AccReal rheight = cu_area_pixel_compute_scale<AccReal>(inputHeight, outputHeight, false);
+  const AccReal rwidth  = cu_area_pixel_compute_scale<AccReal>(inputWidth, outputWidth, false);
   const int num_kernels = outputHeight * outputWidth;
   const int num_threads = getNumThreads(inputHeight * inputWidth, false);
   dim3 blocks(static_cast<int>(num_kernels / num_threads) + 1);
   dim3 threads(num_threads);
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
   caffe_gpu_interp2_kernel<gpu, DType, AccReal>
-  <<<blocks, threads , 0, stream>>>(
-    num_kernels, rheight, rwidth, false, input, output);
+      <<<blocks, threads, 0, stream>>>(num_kernels, rheight, rwidth, false, input, output);
   MSHADOW_CUDA_POST_KERNEL_CHECK(caffe_gpu_interp2_kernel);
 }
 
-NNVM_REGISTER_OP(_image_resize)
-.set_attr<FCompute>("FCompute<gpu>", Resize<gpu>);
+NNVM_REGISTER_OP(_image_resize).set_attr<FCompute>("FCompute<gpu>", Resize<gpu>);
 
 }  // namespace image
 }  // namespace op
diff --git a/src/operator/instance_norm-inl.h b/src/operator/instance_norm-inl.h
index 3ab41cb48376..7fbb612d2b0c 100644
--- a/src/operator/instance_norm-inl.h
+++ b/src/operator/instance_norm-inl.h
@@ -23,7 +23,7 @@
  * \brief Reproducing paper Instance Normalization: The Missing Ingredient for
  * Fast Stylization, D. Ulyanov, A. Vedaldi, V. Lempitsky, 2016
  * \author Sebastian Bodenstein
-*/
+ */
 #ifndef MXNET_OPERATOR_INSTANCE_NORM_INL_H_
 #define MXNET_OPERATOR_INSTANCE_NORM_INL_H_
 #include <dmlc/logging.h>
@@ -53,12 +53,12 @@ struct InstanceNormParam : public dmlc::Parameter<InstanceNormParam> {
   }
 };  // struct InstanceNormParam
 
-template<typename xpu>
+template <typename xpu>
 void InstanceNormForward(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &in_data,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &out_data) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& in_data,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
   CHECK_EQ(in_data.size(), 3U);
@@ -69,7 +69,7 @@ void InstanceNormForward(const nnvm::NodeAttrs& attrs,
 
   const InstanceNormParam& param = nnvm::get<InstanceNormParam>(attrs.parsed);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s       = ctx.get_stream<xpu>();
   mxnet::TShape dshape = in_data[instance_norm::kData].shape_;
   CHECK(mxnet::shape_is_known(dshape)) << "Found unknown shape in InstanceNormForward, "
                                        << "received: " << dshape;
@@ -77,132 +77,112 @@ void InstanceNormForward(const nnvm::NodeAttrs& attrs,
     return;  // noop for empty array
   }
 
-  int n = dshape[0];
-  int c = dshape[1];
-  int rest_dim =
-      static_cast<int>(in_data[instance_norm::kData].Size() / n / c);
-  Shape<2> s2 = Shape2(n * c, rest_dim);
+  int n              = dshape[0];
+  int c              = dshape[1];
+  int rest_dim       = static_cast<int>(in_data[instance_norm::kData].Size() / n / c);
+  Shape<2> s2        = Shape2(n * c, rest_dim);
   const real_t scale = static_cast<real_t>(1) / static_cast<real_t>(rest_dim);
   // Get Inputs
-  Tensor<xpu, 2> data =
-      in_data[instance_norm::kData].get_with_shape<xpu, 2, real_t>(s2, s);
-  Tensor<xpu, 1> gamma =
-      in_data[instance_norm::kGamma].get<xpu, 1, real_t>(s);
-  Tensor<xpu, 1> beta = in_data[instance_norm::kBeta].get<xpu, 1, real_t>(s);
+  Tensor<xpu, 2> data  = in_data[instance_norm::kData].get_with_shape<xpu, 2, real_t>(s2, s);
+  Tensor<xpu, 1> gamma = in_data[instance_norm::kGamma].get<xpu, 1, real_t>(s);
+  Tensor<xpu, 1> beta  = in_data[instance_norm::kBeta].get<xpu, 1, real_t>(s);
   // Get Outputs
-  Tensor<xpu, 2> out =
-      out_data[instance_norm::kOut].get_with_shape<xpu, 2, real_t>(s2, s);
-  Tensor<xpu, 1> var = out_data[instance_norm::kVar].FlatTo1D<xpu, real_t>(s);
-  Tensor<xpu, 1> mean =
-      out_data[instance_norm::kMean].FlatTo1D<xpu, real_t>(s);
+  Tensor<xpu, 2> out  = out_data[instance_norm::kOut].get_with_shape<xpu, 2, real_t>(s2, s);
+  Tensor<xpu, 1> var  = out_data[instance_norm::kVar].FlatTo1D<xpu, real_t>(s);
+  Tensor<xpu, 1> mean = out_data[instance_norm::kMean].FlatTo1D<xpu, real_t>(s);
   // Calculate mean + var
   mean = scale * sumall_except_dim<0>(data);
-  var = scale * sumall_except_dim<0>(F<mshadow_op::square>(
-                    data - broadcast<0>(mean, data.shape_)));
-  Assign(
-      out, req[instance_norm::kOut],
-      broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), out.shape_) *
-              (data - broadcast<0>(mean, data.shape_)) /
-              F<mshadow_op::square_root>(
-                  broadcast<0>(var + param.eps, data.shape_)) +
-          broadcast<0>(reshape(repmat(beta, n), Shape1(n * c)), out.shape_));
+  var = scale * sumall_except_dim<0>(F<mshadow_op::square>(data - broadcast<0>(mean, data.shape_)));
+  Assign(out,
+         req[instance_norm::kOut],
+         broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), out.shape_) *
+                 (data - broadcast<0>(mean, data.shape_)) /
+                 F<mshadow_op::square_root>(broadcast<0>(var + param.eps, data.shape_)) +
+             broadcast<0>(reshape(repmat(beta, n), Shape1(n * c)), out.shape_));
 }
 
-template<typename xpu>
+template <typename xpu>
 void InstanceNormBackward(const nnvm::NodeAttrs& attrs,
-                          const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   CHECK_EQ(inputs.size(), 5U);
   CHECK_EQ(outputs.size(), 3U);
 
-  CHECK_GE(inputs[3].ndim(), 3)
-      << "InstanceNorm only supports input tensors of rank > 2.";
+  CHECK_GE(inputs[3].ndim(), 3) << "InstanceNorm only supports input tensors of rank > 2.";
 
   const InstanceNormParam& param = nnvm::get<InstanceNormParam>(attrs.parsed);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s       = ctx.get_stream<xpu>();
   mxnet::TShape dshape = inputs[3].shape_;
   CHECK(mxnet::shape_is_known(dshape)) << "Found unknown shape in InstanceNormBackward, "
                                        << "received: " << dshape;
   if (dshape.Size() == 0) {
     return;  // noop for unknown shape or empty array
   }
-  int n = inputs[3].size(0);
-  int c = inputs[3].size(1);
-  int rest_dim =
-      static_cast<int>(inputs[3].Size() / n / c);
-  Shape<2> s2 = Shape2(n * c, rest_dim);
-  Shape<3> s3 = Shape3(n, c, rest_dim);
+  int n              = inputs[3].size(0);
+  int c              = inputs[3].size(1);
+  int rest_dim       = static_cast<int>(inputs[3].Size() / n / c);
+  Shape<2> s2        = Shape2(n * c, rest_dim);
+  Shape<3> s3        = Shape3(n, c, rest_dim);
   const real_t scale = static_cast<real_t>(1) / static_cast<real_t>(rest_dim);
   // Get Inputs
-  Tensor<xpu, 2> data =
-      inputs[3].get_with_shape<xpu, 2, real_t>(s2, s);
-  Tensor<xpu, 2> gdata =
-      outputs[instance_norm::kData].get_with_shape<xpu, 2, real_t>(s2, s);
-  Tensor<xpu, 1> gamma =
-      inputs[4].get<xpu, 1, real_t>(s);
-  Tensor<xpu, 1> ggamma =
-      outputs[instance_norm::kGamma].get<xpu, 1, real_t>(s);
-  Tensor<xpu, 1> gbeta = outputs[instance_norm::kBeta].get<xpu, 1, real_t>(s);
+  Tensor<xpu, 2> data   = inputs[3].get_with_shape<xpu, 2, real_t>(s2, s);
+  Tensor<xpu, 2> gdata  = outputs[instance_norm::kData].get_with_shape<xpu, 2, real_t>(s2, s);
+  Tensor<xpu, 1> gamma  = inputs[4].get<xpu, 1, real_t>(s);
+  Tensor<xpu, 1> ggamma = outputs[instance_norm::kGamma].get<xpu, 1, real_t>(s);
+  Tensor<xpu, 1> gbeta  = outputs[instance_norm::kBeta].get<xpu, 1, real_t>(s);
   // Get Outputs
   Tensor<xpu, 2> gout = inputs[0].get_with_shape<xpu, 2, real_t>(s2, s);
-  Tensor<xpu, 1> var = inputs[2].FlatTo1D<xpu, real_t>(s);
+  Tensor<xpu, 1> var  = inputs[2].FlatTo1D<xpu, real_t>(s);
   Tensor<xpu, 1> mean = inputs[1].FlatTo1D<xpu, real_t>(s);
   // Get temp space
-  Tensor<xpu, 2> workspace =
-      ctx.requested[instance_norm::kTempSpace].get_space<xpu>(
-          mshadow::Shape2(3, mean.shape_[0]), s);
+  Tensor<xpu, 2> workspace = ctx.requested[instance_norm::kTempSpace].get_space<xpu>(
+      mshadow::Shape2(3, mean.shape_[0]), s);
   Tensor<xpu, 1> gmean = workspace[0];
-  Tensor<xpu, 1> gvar = workspace[1];
-  Tensor<xpu, 1> tmp = workspace[2];
+  Tensor<xpu, 1> gvar  = workspace[1];
+  Tensor<xpu, 1> tmp   = workspace[2];
 
   // calculate temps
   gvar = sumall_except_dim<0>(
-      (gout *
-       broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), data.shape_)) *
+      (gout * broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), data.shape_)) *
       (data - broadcast<0>(mean, data.shape_)) * -0.5f *
-      F<mshadow_op::power>(broadcast<0>(var + param.eps, data.shape_),
-                           -1.5f));
-  gmean = sumall_except_dim<0>(
-      gout *
-      broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), data.shape_));
+      F<mshadow_op::power>(broadcast<0>(var + param.eps, data.shape_), -1.5f));
+  gmean = sumall_except_dim<0>(gout *
+                               broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), data.shape_));
   gmean *= -1.0f / F<mshadow_op::square_root>(var + param.eps);
-  tmp = scale * sumall_except_dim<0>(
-                    -2.0f * (data - broadcast<0>(mean, data.shape_)));
+  tmp = scale * sumall_except_dim<0>(-2.0f * (data - broadcast<0>(mean, data.shape_)));
   tmp *= gvar;
   gmean += tmp;
 
   // Calculate grads
-  Assign(gbeta, req[instance_norm::kBeta],
-         sumall_except_dim<0>(swapaxis<1, 0>(reshape(gout, s3))));
-  Assign(ggamma, req[instance_norm::kGamma],
+  Assign(gbeta, req[instance_norm::kBeta], sumall_except_dim<0>(swapaxis<1, 0>(reshape(gout, s3))));
+  Assign(ggamma,
+         req[instance_norm::kGamma],
          sumall_except_dim<0>(swapaxis<1, 0>(
              reshape(gout * (data - broadcast<0>(mean, data.shape_)) /
-                         F<mshadow_op::square_root>(
-                             broadcast<0>(var + param.eps, data.shape_)),
+                         F<mshadow_op::square_root>(broadcast<0>(var + param.eps, data.shape_)),
                      s3))));
-  Assign(gdata, req[instance_norm::kData],
-         (gout * broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)),
-                              data.shape_)) *
-                 broadcast<0>(
-                     1.0f / F<mshadow_op::square_root>(var + param.eps),
-                     data.shape_) +
+  Assign(gdata,
+         req[instance_norm::kData],
+         (gout * broadcast<0>(reshape(repmat(gamma, n), Shape1(n * c)), data.shape_)) *
+                 broadcast<0>(1.0f / F<mshadow_op::square_root>(var + param.eps), data.shape_) +
              broadcast<0>(gvar, data.shape_) * scale * 2.0f *
                  (data - broadcast<0>(mean, data.shape_)) +
              broadcast<0>(gmean, data.shape_) * scale);
 }
 
 inline bool InstanceNormShape(const nnvm::NodeAttrs& attrs,
-                              mxnet::ShapeVector *in_shape,
-                              mxnet::ShapeVector *out_shape) {
+                              mxnet::ShapeVector* in_shape,
+                              mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 3U) << "Input:[data]";
-  const mxnet::TShape &dshape = in_shape->at(0);
-  if (dshape.ndim() == 0) return false;
+  const mxnet::TShape& dshape = in_shape->at(0);
+  if (dshape.ndim() == 0)
+    return false;
 
   in_shape->at(1) = mxnet::TShape(Shape1(dshape[1]));
   in_shape->at(2) = mxnet::TShape(Shape1(dshape[1]));
diff --git a/src/operator/instance_norm.cc b/src/operator/instance_norm.cc
index 1547fdee6e2e..0735f79d56d5 100644
--- a/src/operator/instance_norm.cc
+++ b/src/operator/instance_norm.cc
@@ -22,7 +22,7 @@
  * \file instance_norm.cc
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include "./instance_norm-inl.h"
 
@@ -32,7 +32,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(InstanceNormParam);
 
 struct InstanceNormGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> out_data;
@@ -51,10 +51,9 @@ struct InstanceNormGrad {
   }
 };
 
-
 NNVM_REGISTER_OP(InstanceNorm)
-.add_alias("_npx_instance_norm")
-.describe(R"code(Applies instance normalization to the n-dimensional input array.
+    .add_alias("_npx_instance_norm")
+    .describe(R"code(Applies instance normalization to the n-dimensional input array.
 
 This operator takes an n-dimensional input array where (n>2) and normalizes
 the input using the following formula:
@@ -94,43 +93,47 @@ Examples::
                                 [[-0.99752653,  1.99752724]]]
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol",
-              "An n-dimensional input array (n > 2) of the form [batch, "
-              "channel, spatial_dim1, spatial_dim2, ...].")
-.add_argument("gamma", "NDArray-or-Symbol",
-              "A vector of length \'channel\', which multiplies the "
-              "normalized input.")
-.add_argument("beta", "NDArray-or-Symbol",
-              "A vector of length \'channel\', which is added to the "
-              "product of the normalized input and the weight.")
-.add_arguments(InstanceNormParam::__FIELDS__())
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "gamma", "beta"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs) { return 1; })
-.set_attr_parser(ParamParser<InstanceNormParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InstanceNormShape)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", InstanceNormGrad{"_backward_instance_norm"})
-.set_attr<FCompute>("FCompute<cpu>", InstanceNormForward<cpu>);
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "An n-dimensional input array (n > 2) of the form [batch, "
+                  "channel, spatial_dim1, spatial_dim2, ...].")
+    .add_argument("gamma",
+                  "NDArray-or-Symbol",
+                  "A vector of length \'channel\', which multiplies the "
+                  "normalized input.")
+    .add_argument("beta",
+                  "NDArray-or-Symbol",
+                  "A vector of length \'channel\', which is added to the "
+                  "product of the normalized input and the weight.")
+    .add_arguments(InstanceNormParam::__FIELDS__())
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "gamma", "beta"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr_parser(ParamParser<InstanceNormParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InstanceNormShape)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", InstanceNormGrad{"_backward_instance_norm"})
+    .set_attr<FCompute>("FCompute<cpu>", InstanceNormForward<cpu>);
 
 NNVM_REGISTER_OP(_backward_instance_norm)
-.set_num_inputs(5)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<InstanceNormParam>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", InstanceNormBackward<cpu>);
+    .set_num_inputs(5)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<InstanceNormParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", InstanceNormBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/instance_norm.cu b/src/operator/instance_norm.cu
index 9221be5287bf..48231e7ed26a 100644
--- a/src/operator/instance_norm.cu
+++ b/src/operator/instance_norm.cu
@@ -22,18 +22,17 @@
  * \file instance_norm.cu
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include "./instance_norm-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(InstanceNorm)
-.set_attr<FCompute>("FCompute<gpu>", InstanceNormForward<gpu>);
+NNVM_REGISTER_OP(InstanceNorm).set_attr<FCompute>("FCompute<gpu>", InstanceNormForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_instance_norm)
-.set_attr<FCompute>("FCompute<gpu>", InstanceNormBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", InstanceNormBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/l2_normalization-inl.h b/src/operator/l2_normalization-inl.h
index ab60bdcc2155..e89077dc7de9 100644
--- a/src/operator/l2_normalization-inl.h
+++ b/src/operator/l2_normalization-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2016 by Contributors
  * \file l2_normalization_op-inl.h
  * \brief instance l2 Normalization op
-*/
+ */
 #ifndef MXNET_OPERATOR_L2_NORMALIZATION_INL_H_
 #define MXNET_OPERATOR_L2_NORMALIZATION_INL_H_
 
@@ -41,24 +41,24 @@ namespace op {
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace l2_normalization {
-enum L2NormalizationOpInputs {kData};
-enum L2NormalizationOpOutputs {kOut, kNorm};
-enum L2NormalizationOpType {kInstance, kChannel, kSpatial};
-enum L2NormalizationBackResource {kTempSpace};
-}  // l2_normalization
+enum L2NormalizationOpInputs { kData };
+enum L2NormalizationOpOutputs { kOut, kNorm };
+enum L2NormalizationOpType { kInstance, kChannel, kSpatial };
+enum L2NormalizationBackResource { kTempSpace };
+}  // namespace l2_normalization
 
 struct L2NormalizationParam : public dmlc::Parameter<L2NormalizationParam> {
   float eps;
   int mode;
   DMLC_DECLARE_PARAMETER(L2NormalizationParam) {
-    DMLC_DECLARE_FIELD(eps).set_default(1e-10f)
-    .describe("A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(eps).set_default(1e-10f).describe(
+        "A small constant for numerical stability.");
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("instance", l2_normalization::kInstance)
-    .add_enum("spatial", l2_normalization::kSpatial)
-    .add_enum("channel", l2_normalization::kChannel)
-    .set_default(l2_normalization::kInstance)
-    .describe("Specify the dimension along which to compute L2 norm.");
+        .add_enum("instance", l2_normalization::kInstance)
+        .add_enum("spatial", l2_normalization::kSpatial)
+        .add_enum("channel", l2_normalization::kChannel)
+        .set_default(l2_normalization::kInstance)
+        .describe("Specify the dimension along which to compute L2 norm.");
   }
 };
 
@@ -66,151 +66,155 @@ struct L2NormalizationParam : public dmlc::Parameter<L2NormalizationParam> {
  * \brief This is the implementation of l2 normalization operator.
  * \tparam xpu The device that the op will be executed on.
  */
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class L2NormalizationOp : public Operator {
  public:
   explicit L2NormalizationOp(L2NormalizationParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    if (req[l2_normalization::kOut] == kNullOp) return;
+    if (req[l2_normalization::kOut] == kNullOp)
+      return;
     CHECK_EQ(req[l2_normalization::kOut], kWriteTo);
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 2U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s           = ctx.get_stream<xpu>();
     mxnet::TShape orig_shape = in_data[l2_normalization::kData].shape_;
     if (param_.mode == l2_normalization::kInstance) {
-      Shape<2> dshape = Shape2(orig_shape[0],
-        orig_shape.ProdShape(1, orig_shape.ndim()));
-      Tensor<xpu, 2, DType> data = in_data[l2_normalization::kData]
-        .get_with_shape<xpu, 2, DType>(dshape, s);
-      Tensor<xpu, 2, DType> out = out_data[l2_normalization::kOut]
-        .get_with_shape<xpu, 2, DType>(dshape, s);
+      Shape<2> dshape = Shape2(orig_shape[0], orig_shape.ProdShape(1, orig_shape.ndim()));
+      Tensor<xpu, 2, DType> data =
+          in_data[l2_normalization::kData].get_with_shape<xpu, 2, DType>(dshape, s);
+      Tensor<xpu, 2, DType> out =
+          out_data[l2_normalization::kOut].get_with_shape<xpu, 2, DType>(dshape, s);
       Tensor<xpu, 1, DType> norm = out_data[l2_normalization::kNorm].get<xpu, 1, DType>(s);
-      norm = sumall_except_dim<0>(F<mxnet::op::mshadow_op::square>(data));
+      norm                       = sumall_except_dim<0>(F<mxnet::op::mshadow_op::square>(data));
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<mxnet::op::mshadow_op::plus, Req>, xpu>::Launch(
-          s, norm.size(0), norm.dptr_, norm.dptr_, DType(param_.eps));
+            s, norm.size(0), norm.dptr_, norm.dptr_, DType(param_.eps));
       });
       norm = F<mxnet::op::mshadow_op::square_root>(norm);
-      out = data / broadcast<0>(norm, out.shape_);
+      out  = data / broadcast<0>(norm, out.shape_);
     } else if (param_.mode == l2_normalization::kChannel) {
       CHECK_GE(orig_shape.ndim(), 3);
-      Shape<3> dshape = Shape3(orig_shape[0], orig_shape[1],
-        orig_shape.ProdShape(2, orig_shape.ndim()));
-      Tensor<xpu, 3, DType> data = in_data[l2_normalization::kData]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
-      Tensor<xpu, 3, DType> out = out_data[l2_normalization::kOut]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
+      Shape<3> dshape =
+          Shape3(orig_shape[0], orig_shape[1], orig_shape.ProdShape(2, orig_shape.ndim()));
+      Tensor<xpu, 3, DType> data =
+          in_data[l2_normalization::kData].get_with_shape<xpu, 3, DType>(dshape, s);
+      Tensor<xpu, 3, DType> out =
+          out_data[l2_normalization::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
       Shape<2> norm_shape = Shape2(dshape[0], dshape[2]);
-      Tensor<xpu, 2, DType> norm = out_data[l2_normalization::kNorm]
-        .get_with_shape<xpu, 2, DType>(norm_shape, s);
+      Tensor<xpu, 2, DType> norm =
+          out_data[l2_normalization::kNorm].get_with_shape<xpu, 2, DType>(norm_shape, s);
       norm = reduce_with_axis<red::sum, false>(F<mxnet::op::mshadow_op::square>(data), 1);
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<mxnet::op::mshadow_op::plus, Req>, xpu>::Launch(
-          s, norm.size(0) * norm.size(1), norm.dptr_, norm.dptr_, DType(param_.eps));
+            s, norm.size(0) * norm.size(1), norm.dptr_, norm.dptr_, DType(param_.eps));
       });
       norm = F<mxnet::op::mshadow_op::square_root>(norm);
-      out = data / broadcast_with_axis(norm, 0, orig_shape[1]);
+      out  = data / broadcast_with_axis(norm, 0, orig_shape[1]);
     } else if (param_.mode == l2_normalization::kSpatial) {
       CHECK_GE(orig_shape.ndim(), 3);
-      Shape<3> dshape = Shape3(orig_shape[0], orig_shape[1],
-        orig_shape.ProdShape(2, orig_shape.ndim()));
-      Tensor<xpu, 3, DType> data = in_data[l2_normalization::kData]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
-      Tensor<xpu, 3, DType> out = out_data[l2_normalization::kOut]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
+      Shape<3> dshape =
+          Shape3(orig_shape[0], orig_shape[1], orig_shape.ProdShape(2, orig_shape.ndim()));
+      Tensor<xpu, 3, DType> data =
+          in_data[l2_normalization::kData].get_with_shape<xpu, 3, DType>(dshape, s);
+      Tensor<xpu, 3, DType> out =
+          out_data[l2_normalization::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
       Shape<2> norm_shape = Shape2(dshape[0], dshape[1]);
-      Tensor<xpu, 2, DType> norm = out_data[l2_normalization::kNorm]
-        .get_with_shape<xpu, 2, DType>(norm_shape, s);
+      Tensor<xpu, 2, DType> norm =
+          out_data[l2_normalization::kNorm].get_with_shape<xpu, 2, DType>(norm_shape, s);
       norm = reduce_with_axis<red::sum, false>(F<mxnet::op::mshadow_op::square>(data), 2);
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<mxnet::op::mshadow_op::plus, Req>, xpu>::Launch(
-          s, norm.size(0) * norm.size(1), norm.dptr_, norm.dptr_, DType(param_.eps));
+            s, norm.size(0) * norm.size(1), norm.dptr_, norm.dptr_, DType(param_.eps));
       });
       norm = F<mxnet::op::mshadow_op::square_root>(norm);
-      out = data / broadcast_with_axis(norm, 1, dshape[2]);
+      out  = data / broadcast_with_axis(norm, 1, dshape[2]);
     } else {
       LOG(FATAL) << "Unexpected mode in l2 normalization";
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK(in_data.size() == 1U && in_grad.size() == 1U);
     CHECK_EQ(req.size(), 1U);
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s           = ctx.get_stream<xpu>();
     mxnet::TShape orig_shape = out_data[l2_normalization::kOut].shape_;
     if (param_.mode == l2_normalization::kInstance) {
-      Shape<2> dshape = Shape2(orig_shape[0],
-        orig_shape.ProdShape(1, orig_shape.ndim()));
-      Tensor<xpu, 2, DType> data = out_data[l2_normalization::kOut]
-        .get_with_shape<xpu, 2, DType>(dshape, s);
-      Tensor<xpu, 2, DType> grad_in = in_grad[l2_normalization::kData]
-        .get_with_shape<xpu, 2, DType>(dshape, s);
-      Tensor<xpu, 2, DType> grad_out = out_grad[l2_normalization::kOut]
-        .get_with_shape<xpu, 2, DType>(dshape, s);
+      Shape<2> dshape = Shape2(orig_shape[0], orig_shape.ProdShape(1, orig_shape.ndim()));
+      Tensor<xpu, 2, DType> data =
+          out_data[l2_normalization::kOut].get_with_shape<xpu, 2, DType>(dshape, s);
+      Tensor<xpu, 2, DType> grad_in =
+          in_grad[l2_normalization::kData].get_with_shape<xpu, 2, DType>(dshape, s);
+      Tensor<xpu, 2, DType> grad_out =
+          out_grad[l2_normalization::kOut].get_with_shape<xpu, 2, DType>(dshape, s);
       Tensor<xpu, 1, DType> norm = out_data[l2_normalization::kNorm].get<xpu, 1, DType>(s);
-      Tensor<xpu, 1, DType> temp = ctx.requested[l2_normalization::kTempSpace]
-        .get_space_typed<xpu, 1, DType>(mshadow::Shape1(data.shape_[0]), s);
+      Tensor<xpu, 1, DType> temp =
+          ctx.requested[l2_normalization::kTempSpace].get_space_typed<xpu, 1, DType>(
+              mshadow::Shape1(data.shape_[0]), s);
       temp = sumall_except_dim<0>(grad_out * data);
-      Assign(grad_in, req[l2_normalization::kData],
-        (grad_out - data * broadcast<0>(temp, data.shape_)) /
-        broadcast<0>(norm, data.shape_));
+      Assign(grad_in,
+             req[l2_normalization::kData],
+             (grad_out - data * broadcast<0>(temp, data.shape_)) / broadcast<0>(norm, data.shape_));
     } else if (param_.mode == l2_normalization::kChannel) {
       CHECK_GE(orig_shape.ndim(), 3);
-      Shape<3> dshape = Shape3(orig_shape[0], orig_shape[1],
-        orig_shape.ProdShape(2, orig_shape.ndim()));
-      Tensor<xpu, 3, DType> data = out_data[l2_normalization::kOut]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
-      Tensor<xpu, 3, DType> grad_in = in_grad[l2_normalization::kData]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
-      Tensor<xpu, 3, DType> grad_out = out_grad[l2_normalization::kOut]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
+      Shape<3> dshape =
+          Shape3(orig_shape[0], orig_shape[1], orig_shape.ProdShape(2, orig_shape.ndim()));
+      Tensor<xpu, 3, DType> data =
+          out_data[l2_normalization::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
+      Tensor<xpu, 3, DType> grad_in =
+          in_grad[l2_normalization::kData].get_with_shape<xpu, 3, DType>(dshape, s);
+      Tensor<xpu, 3, DType> grad_out =
+          out_grad[l2_normalization::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
       Shape<2> norm_shape = Shape2(dshape[0], dshape[2]);
-      Tensor<xpu, 2, DType> norm = out_data[l2_normalization::kNorm]
-        .get_with_shape<xpu, 2, DType>(norm_shape, s);
-      Tensor<xpu, 2, DType> temp = ctx.requested[l2_normalization::kTempSpace]
-        .get_space_typed<xpu, 2, DType>(mshadow::Shape2(data.shape_[0], data.shape_[2]), s);
+      Tensor<xpu, 2, DType> norm =
+          out_data[l2_normalization::kNorm].get_with_shape<xpu, 2, DType>(norm_shape, s);
+      Tensor<xpu, 2, DType> temp =
+          ctx.requested[l2_normalization::kTempSpace].get_space_typed<xpu, 2, DType>(
+              mshadow::Shape2(data.shape_[0], data.shape_[2]), s);
       temp = reduce_with_axis<red::sum, false>(grad_out * data, 1);
-      Assign(grad_in, req[l2_normalization::kData],
-        (grad_out - data * broadcast_with_axis(temp, 0, orig_shape[1])) /
-        broadcast_with_axis(norm, 0, orig_shape[1]));
+      Assign(grad_in,
+             req[l2_normalization::kData],
+             (grad_out - data * broadcast_with_axis(temp, 0, orig_shape[1])) /
+                 broadcast_with_axis(norm, 0, orig_shape[1]));
     } else if (param_.mode == l2_normalization::kSpatial) {
       CHECK_GE(orig_shape.ndim(), 3);
-      Shape<3> dshape = Shape3(orig_shape[0], orig_shape[1],
-        orig_shape.ProdShape(2, orig_shape.ndim()));
-      Tensor<xpu, 3, DType> data = out_data[l2_normalization::kOut]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
-      Tensor<xpu, 3, DType> grad_in = in_grad[l2_normalization::kData]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
-      Tensor<xpu, 3, DType> grad_out = out_grad[l2_normalization::kOut]
-        .get_with_shape<xpu, 3, DType>(dshape, s);
+      Shape<3> dshape =
+          Shape3(orig_shape[0], orig_shape[1], orig_shape.ProdShape(2, orig_shape.ndim()));
+      Tensor<xpu, 3, DType> data =
+          out_data[l2_normalization::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
+      Tensor<xpu, 3, DType> grad_in =
+          in_grad[l2_normalization::kData].get_with_shape<xpu, 3, DType>(dshape, s);
+      Tensor<xpu, 3, DType> grad_out =
+          out_grad[l2_normalization::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
       Shape<2> norm_shape = Shape2(dshape[0], dshape[1]);
-      Tensor<xpu, 2, DType> norm = out_data[l2_normalization::kNorm]
-        .get_with_shape<xpu, 2, DType>(norm_shape, s);
-      Tensor<xpu, 2, DType> temp = ctx.requested[l2_normalization::kTempSpace]
-        .get_space_typed<xpu, 2, DType>(mshadow::Shape2(data.shape_[0], data.shape_[1]), s);
+      Tensor<xpu, 2, DType> norm =
+          out_data[l2_normalization::kNorm].get_with_shape<xpu, 2, DType>(norm_shape, s);
+      Tensor<xpu, 2, DType> temp =
+          ctx.requested[l2_normalization::kTempSpace].get_space_typed<xpu, 2, DType>(
+              mshadow::Shape2(data.shape_[0], data.shape_[1]), s);
       temp = reduce_with_axis<red::sum, false>(grad_out * data, 2);
-      Assign(grad_in, req[l2_normalization::kData],
-        (grad_out - data * broadcast_with_axis(temp, 1, dshape[2])) /
-        broadcast_with_axis(norm, 1, dshape[2]));
+      Assign(grad_in,
+             req[l2_normalization::kData],
+             (grad_out - data * broadcast_with_axis(temp, 1, dshape[2])) /
+                 broadcast_with_axis(norm, 1, dshape[2]));
     } else {
       LOG(FATAL) << "Unexpected mode in l2 normalization";
     }
@@ -221,7 +225,7 @@ class L2NormalizationOp : public Operator {
 };  // class L2NormalizationOp
 
 // Decalre Factory function, used for dispatch specialization
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(L2NormalizationParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -247,9 +251,9 @@ class L2NormalizationProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     int dtype = (*in_type)[0];
     type_assign(&dtype, (*out_type)[0]);
     type_assign(&dtype, (*out_type)[1]);
@@ -260,14 +264,15 @@ class L2NormalizationProp : public OperatorProperty {
     return dtype != -1;
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1U) << "L2Normalization layer only accepts data as input";
-    const mxnet::TShape &dshape = (*in_shape)[l2_normalization::kData];
+    const mxnet::TShape& dshape = (*in_shape)[l2_normalization::kData];
     // require data to be known
-    if ((*in_shape)[l2_normalization::kData].ndim() == 0) return false;
+    if ((*in_shape)[l2_normalization::kData].ndim() == 0)
+      return false;
     out_shape->clear();
     out_shape->push_back(dshape);
     if (param_.mode == l2_normalization::kInstance) {
@@ -275,7 +280,7 @@ class L2NormalizationProp : public OperatorProperty {
     } else if (param_.mode == l2_normalization::kChannel) {
       CHECK_GE(dshape.ndim(), 3) << "At lease 3 dimensions required in channel mode";
       mxnet::TShape norm_shape = dshape;
-      norm_shape[1] = 1;
+      norm_shape[1]            = 1;
       out_shape->push_back(norm_shape);
     } else if (param_.mode == l2_normalization::kSpatial) {
       CHECK_GE(dshape.ndim(), 3) << "At lease 3 dimensions required in spatial mode";
@@ -288,7 +293,7 @@ class L2NormalizationProp : public OperatorProperty {
 
   OperatorProperty* Copy() const override {
     L2NormalizationProp* norm_sym = new L2NormalizationProp();
-    norm_sym->param_ = this->param_;
+    norm_sym->param_              = this->param_;
     return norm_sym;
   }
 
@@ -297,25 +302,23 @@ class L2NormalizationProp : public OperatorProperty {
   }
 
   // declare dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[l2_normalization::kOut],
-      out_data[l2_normalization::kOut],
-      out_data[l2_normalization::kNorm]};
+            out_data[l2_normalization::kOut],
+            out_data[l2_normalization::kNorm]};
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {{out_grad[l2_normalization::kOut], in_grad[l2_normalization::kData]}};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
@@ -324,8 +327,9 @@ class L2NormalizationProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   L2NormalizationParam param_;
diff --git a/src/operator/l2_normalization.cc b/src/operator/l2_normalization.cc
index cbe2caeb394e..8231c8e077f7 100644
--- a/src/operator/l2_normalization.cc
+++ b/src/operator/l2_normalization.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file l2_normalization.cc
  * \brief l2 normalization operator
-*/
+ */
 #include "./l2_normalization-inl.h"
 
 /* VisualStudio only supports openmp 2.0 */
@@ -32,31 +32,31 @@
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 class L2NormalizationOpCPU : public L2NormalizationOp<cpu, DType> {
  public:
-  explicit L2NormalizationOpCPU(L2NormalizationParam p)
-      : L2NormalizationOp<cpu, DType>(p) {}
-  void Forward(const OpContext &ctx, const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data,
-               const std::vector<TBlob> &aux_args) override {
+  explicit L2NormalizationOpCPU(L2NormalizationParam p) : L2NormalizationOp<cpu, DType>(p) {}
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_args) override {
     using namespace mshadow;
     using namespace mshadow::expr;
-    if (req[l2_normalization::kOut] == kNullOp) return;
+    if (req[l2_normalization::kOut] == kNullOp)
+      return;
     CHECK_EQ(req[l2_normalization::kOut], kWriteTo);
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 2U);
-    Stream<cpu> *s = ctx.get_stream<cpu>();
+    Stream<cpu>* s           = ctx.get_stream<cpu>();
     mxnet::TShape orig_shape = in_data[l2_normalization::kData].shape_;
-    auto omp_threads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
+    auto omp_threads         = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
     if (this->param_.mode == l2_normalization::kInstance) {
-      Shape<2> dshape = Shape2(orig_shape[0],
-        orig_shape.ProdShape(1, orig_shape.ndim()));
-      Tensor<cpu, 2, DType> data = in_data[l2_normalization::kData]
-        .get_with_shape<cpu, 2, DType>(dshape, s);
-      Tensor<cpu, 2, DType> out = out_data[l2_normalization::kOut]
-        .get_with_shape<cpu, 2, DType>(dshape, s);
+      Shape<2> dshape = Shape2(orig_shape[0], orig_shape.ProdShape(1, orig_shape.ndim()));
+      Tensor<cpu, 2, DType> data =
+          in_data[l2_normalization::kData].get_with_shape<cpu, 2, DType>(dshape, s);
+      Tensor<cpu, 2, DType> out =
+          out_data[l2_normalization::kOut].get_with_shape<cpu, 2, DType>(dshape, s);
       Tensor<cpu, 1, DType> norm = out_data[l2_normalization::kNorm].get<cpu, 1, DType>(s);
 #pragma omp parallel for num_threads(omp_threads)
       for (int shape0 = 0; shape0 < static_cast<int>(dshape[0]); shape0++) {
@@ -71,15 +71,15 @@ class L2NormalizationOpCPU : public L2NormalizationOp<cpu, DType> {
       }
     } else if (this->param_.mode == l2_normalization::kChannel) {
       CHECK_GE(orig_shape.ndim(), 3);
-      Shape<3> dshape = Shape3(orig_shape[0], orig_shape[1],
-        orig_shape.ProdShape(2, orig_shape.ndim()));
-      Tensor<cpu, 3, DType> data = in_data[l2_normalization::kData]
-        .get_with_shape<cpu, 3, DType>(dshape, s);
-      Tensor<cpu, 3, DType> out = out_data[l2_normalization::kOut]
-        .get_with_shape<cpu, 3, DType>(dshape, s);
+      Shape<3> dshape =
+          Shape3(orig_shape[0], orig_shape[1], orig_shape.ProdShape(2, orig_shape.ndim()));
+      Tensor<cpu, 3, DType> data =
+          in_data[l2_normalization::kData].get_with_shape<cpu, 3, DType>(dshape, s);
+      Tensor<cpu, 3, DType> out =
+          out_data[l2_normalization::kOut].get_with_shape<cpu, 3, DType>(dshape, s);
       Shape<2> norm_shape = Shape2(dshape[0], dshape[2]);
-      Tensor<cpu, 2, DType> norm = out_data[l2_normalization::kNorm]
-        .get_with_shape<cpu, 2, DType>(norm_shape, s);
+      Tensor<cpu, 2, DType> norm =
+          out_data[l2_normalization::kNorm].get_with_shape<cpu, 2, DType>(norm_shape, s);
 #pragma omp parallel for num_threads(omp_threads) collapse(2)
       for (int shape0 = 0; shape0 < static_cast<int>(dshape[0]); shape0++) {
         for (int shape2 = 0; shape2 < static_cast<int>(dshape[2]); shape2++) {
@@ -95,15 +95,15 @@ class L2NormalizationOpCPU : public L2NormalizationOp<cpu, DType> {
       }
     } else if (this->param_.mode == l2_normalization::kSpatial) {
       CHECK_GE(orig_shape.ndim(), 3);
-      Shape<3> dshape = Shape3(orig_shape[0], orig_shape[1],
-        orig_shape.ProdShape(2, orig_shape.ndim()));
-      Tensor<cpu, 3, DType> data = in_data[l2_normalization::kData]
-        .get_with_shape<cpu, 3, DType>(dshape, s);
-      Tensor<cpu, 3, DType> out = out_data[l2_normalization::kOut]
-        .get_with_shape<cpu, 3, DType>(dshape, s);
+      Shape<3> dshape =
+          Shape3(orig_shape[0], orig_shape[1], orig_shape.ProdShape(2, orig_shape.ndim()));
+      Tensor<cpu, 3, DType> data =
+          in_data[l2_normalization::kData].get_with_shape<cpu, 3, DType>(dshape, s);
+      Tensor<cpu, 3, DType> out =
+          out_data[l2_normalization::kOut].get_with_shape<cpu, 3, DType>(dshape, s);
       Shape<2> norm_shape = Shape2(dshape[0], dshape[1]);
-      Tensor<cpu, 2, DType> norm = out_data[l2_normalization::kNorm]
-        .get_with_shape<cpu, 2, DType>(norm_shape, s);
+      Tensor<cpu, 2, DType> norm =
+          out_data[l2_normalization::kNorm].get_with_shape<cpu, 2, DType>(norm_shape, s);
 #pragma omp parallel for num_threads(omp_threads) collapse(2)
       for (int shape0 = 0; shape0 < static_cast<int>(dshape[0]); shape0++) {
         for (int shape1 = 0; shape1 < static_cast<int>(dshape[1]); shape1++) {
@@ -123,25 +123,24 @@ class L2NormalizationOpCPU : public L2NormalizationOp<cpu, DType> {
   }
 };
 
-template<>
+template <>
 Operator* CreateOp<cpu>(L2NormalizationParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new L2NormalizationOpCPU<DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new L2NormalizationOpCPU<DType>(param); });
   return op;
 }
 
 // DO_BIND_DISPATCH comes from static_operator_common.h
-Operator* L2NormalizationProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                                std::vector<int> *in_type) const {
+Operator* L2NormalizationProp::CreateOperatorEx(Context ctx,
+                                                mxnet::ShapeVector* in_shape,
+                                                std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, this->param_, in_type->at(0));
 }
 
 DMLC_REGISTER_PARAMETER(L2NormalizationParam);
 
 MXNET_REGISTER_OP_PROPERTY(L2Normalization, L2NormalizationProp)
-.describe(R"code(Normalize the input array using the L2 norm.
+    .describe(R"code(Normalize the input array using the L2 norm.
 
 For 1-D NDArray, it computes::
 
@@ -194,7 +193,7 @@ Example::
      [ 0.6401844   0.76822126]]]
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input array to normalize.")
-.add_arguments(L2NormalizationParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input array to normalize.")
+    .add_arguments(L2NormalizationParam::__FIELDS__());
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/l2_normalization.cu b/src/operator/l2_normalization.cu
index e5157811d894..39e7abe7a7ff 100644
--- a/src/operator/l2_normalization.cu
+++ b/src/operator/l2_normalization.cu
@@ -21,16 +21,14 @@
  * Copyright (c) 2015 by Contributors
  * \file l2_normalization.cu
  * \brief l2 normalization operator
-*/
+ */
 #include "./l2_normalization-inl.h"
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(L2NormalizationParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new L2NormalizationOp<gpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new L2NormalizationOp<gpu, DType>(param); });
   return op;
 }
 }  // namespace op
diff --git a/src/operator/leaky_relu-inl.h b/src/operator/leaky_relu-inl.h
index 0546142af338..c6f9f14c2b06 100644
--- a/src/operator/leaky_relu-inl.h
+++ b/src/operator/leaky_relu-inl.h
@@ -22,7 +22,7 @@
  * \file leaky_relu-inl.h
  * \brief leaky relu family operator
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_LEAKY_RELU_INL_H_
 #define MXNET_OPERATOR_LEAKY_RELU_INL_H_
 
@@ -45,10 +45,10 @@ namespace mxnet {
 namespace op {
 
 namespace leakyrelu {
-enum LeakyReLUOpInputs {kData, kGamma};
-enum LeakyReLUOpOutputs {kOut, kMask};
-enum LeakyReLUOpType {kLeakyReLU, kPReLU, kRReLU, kELU, kSELU, kGELU};
-enum LeakyReLUOpResource {kRandom};
+enum LeakyReLUOpInputs { kData, kGamma };
+enum LeakyReLUOpOutputs { kOut, kMask };
+enum LeakyReLUOpType { kLeakyReLU, kPReLU, kRReLU, kELU, kSELU, kGELU };
+enum LeakyReLUOpResource { kRandom };
 }  // namespace leakyrelu
 
 struct LeakyReLUParam : public dmlc::Parameter<LeakyReLUParam> {
@@ -58,20 +58,23 @@ struct LeakyReLUParam : public dmlc::Parameter<LeakyReLUParam> {
   float lower_bound;
   float upper_bound;
   DMLC_DECLARE_PARAMETER(LeakyReLUParam) {
-    DMLC_DECLARE_FIELD(act_type).set_default(leakyrelu::kLeakyReLU)
-    .add_enum("rrelu", leakyrelu::kRReLU)
-    .add_enum("leaky", leakyrelu::kLeakyReLU)
-    .add_enum("prelu", leakyrelu::kPReLU)
-    .add_enum("elu", leakyrelu::kELU)
-    .add_enum("selu", leakyrelu::kSELU)
-    .add_enum("gelu", leakyrelu::kGELU)
-    .describe("Activation function to be applied.");
-    DMLC_DECLARE_FIELD(slope).set_default(0.25f)
-    .describe("Init slope for the activation. (For leaky and elu only)");
-    DMLC_DECLARE_FIELD(lower_bound).set_default(0.125f)
-    .describe("Lower bound of random slope. (For rrelu only)");
-    DMLC_DECLARE_FIELD(upper_bound).set_default(0.334f)
-    .describe("Upper bound of random slope. (For rrelu only)");
+    DMLC_DECLARE_FIELD(act_type)
+        .set_default(leakyrelu::kLeakyReLU)
+        .add_enum("rrelu", leakyrelu::kRReLU)
+        .add_enum("leaky", leakyrelu::kLeakyReLU)
+        .add_enum("prelu", leakyrelu::kPReLU)
+        .add_enum("elu", leakyrelu::kELU)
+        .add_enum("selu", leakyrelu::kSELU)
+        .add_enum("gelu", leakyrelu::kGELU)
+        .describe("Activation function to be applied.");
+    DMLC_DECLARE_FIELD(slope).set_default(0.25f).describe(
+        "Init slope for the activation. (For leaky and elu only)");
+    DMLC_DECLARE_FIELD(lower_bound)
+        .set_default(0.125f)
+        .describe("Lower bound of random slope. (For rrelu only)");
+    DMLC_DECLARE_FIELD(upper_bound)
+        .set_default(0.334f)
+        .describe("Upper bound of random slope. (For rrelu only)");
   }
   std::string ActType2String(int act_type) {
     switch (act_type) {
@@ -99,38 +102,38 @@ struct LeakyReLUParam : public dmlc::Parameter<LeakyReLUParam> {
     slope_s << slope;
     lower_bound_s << lower_bound;
     upper_bound_s << upper_bound;
-    (*dict)["act_type"] = ActType2String(act_type);
-    (*dict)["slope"] = slope_s.str();
+    (*dict)["act_type"]    = ActType2String(act_type);
+    (*dict)["slope"]       = slope_s.str();
     (*dict)["lower_bound"] = lower_bound_s.str();
     (*dict)["upper_bound"] = upper_bound_s.str();
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class LeakyReLUOp : public Operator {
  public:
   explicit LeakyReLUOp(LeakyReLUParam param) {
     param_ = param;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     size_t expected = param_.act_type == leakyrelu::kPReLU ? 2 : 1;
     CHECK_EQ(in_data.size(), expected);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     Tensor<xpu, 3, DType> data;
     Tensor<xpu, 3, DType> out;
     Tensor<xpu, 3, DType> mask;
     int n = in_data[leakyrelu::kData].shape_[0];
     int k = (in_data[leakyrelu::kData].ndim() > 1) ? in_data[leakyrelu::kData].shape_[1] : 1;
-    Shape<3> dshape = Shape3(n, k, in_data[leakyrelu::kData].Size()/n/k);
-    data = in_data[leakyrelu::kData].get_with_shape<xpu, 3, DType>(dshape, s);
-    out = out_data[leakyrelu::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
+    Shape<3> dshape = Shape3(n, k, in_data[leakyrelu::kData].Size() / n / k);
+    data            = in_data[leakyrelu::kData].get_with_shape<xpu, 3, DType>(dshape, s);
+    out             = out_data[leakyrelu::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
     if (req[leakyrelu::kOut] == kNullOp) {
       return;
     }
@@ -138,37 +141,53 @@ class LeakyReLUOp : public Operator {
       case leakyrelu::kLeakyReLU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::xelu, Req>, xpu>::Launch(
-            s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_, DType(param_.slope));
+              s,
+              out.size(0) * out.size(1) * out.size(2),
+              out.dptr_,
+              data.dptr_,
+              DType(param_.slope));
         });
         break;
       }
       case leakyrelu::kPReLU: {
-        mxnet::TShape gshape = expand_shape(in_data[leakyrelu::kGamma].shape_,
-                                     in_data[leakyrelu::kData].shape_);
+        mxnet::TShape gshape =
+            expand_shape(in_data[leakyrelu::kGamma].shape_, in_data[leakyrelu::kData].shape_);
         mxnet::TShape new_lshape, new_rshape, new_oshape;
         const int ndim = op::BinaryBroadcastShapeCompact(in_data[leakyrelu::kData].shape_,
                                                          gshape,
                                                          out_data[leakyrelu::kOut].shape_,
-                                                         &new_lshape, &new_rshape, &new_oshape);
+                                                         &new_lshape,
+                                                         &new_rshape,
+                                                         &new_oshape);
         if (!ndim) {
           MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
             const size_t size = (minthree(out_data[leakyrelu::kOut].Size(),
                                           in_data[leakyrelu::kData].Size(),
-                                          in_data[leakyrelu::kGamma].Size())
-            + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+                                          in_data[leakyrelu::kGamma].Size()) +
+                                 DataType<DType>::kLanes - 1) /
+                                DataType<DType>::kLanes;
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::xelu, Req>, xpu>::Launch(
-                s, size, out_data[leakyrelu::kOut].dptr<DType>(),
-            in_data[leakyrelu::kData].dptr<DType>(), in_data[leakyrelu::kGamma].dptr<DType>());
+                s,
+                size,
+                out_data[leakyrelu::kOut].dptr<DType>(),
+                in_data[leakyrelu::kData].dptr<DType>(),
+                in_data[leakyrelu::kGamma].dptr<DType>());
           });
         } else {
           BROADCAST_NDIM_SWITCH(ndim, NDim, {
-            mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+            mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
             mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
             mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-            mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, mshadow_op::xelu>, xpu>::
-            template LaunchEx(s, new_oshape.Size(), req[leakyrelu::kOut], lstride, rstride, oshape,
-            in_data[leakyrelu::kData].dptr<DType>(), in_data[leakyrelu::kGamma].dptr<DType>(),
-            out_data[leakyrelu::kOut].dptr<DType>());
+            mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, mshadow_op::xelu>,
+                             xpu>::template LaunchEx(s,
+                                                     new_oshape.Size(),
+                                                     req[leakyrelu::kOut],
+                                                     lstride,
+                                                     rstride,
+                                                     oshape,
+                                                     in_data[leakyrelu::kData].dptr<DType>(),
+                                                     in_data[leakyrelu::kGamma].dptr<DType>(),
+                                                     out_data[leakyrelu::kOut].dptr<DType>());
           });
         }
         break;
@@ -179,29 +198,35 @@ class LeakyReLUOp : public Operator {
           mxnet::op::UniformSampler<xpu> sampler;
           Tensor<xpu, 1, DType> low, high;
           mxnet::op::GetSamplingTempData<xpu, DType>(DType(0.0f), DType(1.0f), ctx, &low, &high);
-          mxnet::common::random::RandGenerator<xpu, DType> *pgen =
-            ctx.requested[0].get_parallel_random<xpu, DType>();
+          mxnet::common::random::RandGenerator<xpu, DType>* pgen =
+              ctx.requested[0].get_parallel_random<xpu, DType>();
           Tensor<xpu, 1, DType> out = mask.FlatTo1D();
           sampler.Sample(low, high, out, pgen, s);
           MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kMask], Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::mul, Req>, xpu>::Launch(
-              s, mask.size(0) * mask.size(1) * mask.size(2), mask.dptr_, mask.dptr_,
-              DType(param_.upper_bound - param_.lower_bound));
+                s,
+                mask.size(0) * mask.size(1) * mask.size(2),
+                mask.dptr_,
+                mask.dptr_,
+                DType(param_.upper_bound - param_.lower_bound));
           });
           MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kMask], Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::plus, Req>, xpu>::Launch(
-              s, mask.size(0) * mask.size(1) * mask.size(2), mask.dptr_, mask.dptr_,
-              DType(param_.lower_bound));
+                s,
+                mask.size(0) * mask.size(1) * mask.size(2),
+                mask.dptr_,
+                mask.dptr_,
+                DType(param_.lower_bound));
           });
           MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::xelu, Req>, xpu>::Launch(
-              s, mask.size(0) * mask.size(1) * mask.size(2), out.dptr_, data.dptr_, mask.dptr_);
+                s, mask.size(0) * mask.size(1) * mask.size(2), out.dptr_, data.dptr_, mask.dptr_);
           });
         } else {
           const float slope = (param_.lower_bound + param_.upper_bound) / 2.0f;
           MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::xelu, Req>, xpu>::Launch(
-              s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_, DType(slope));
+                s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_, DType(slope));
           });
         }
         break;
@@ -209,22 +234,25 @@ class LeakyReLUOp : public Operator {
       case leakyrelu::kELU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::elu, Req>, xpu>::Launch(
-            s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_,
-            DType(param_.slope));
+              s,
+              out.size(0) * out.size(1) * out.size(2),
+              out.dptr_,
+              data.dptr_,
+              DType(param_.slope));
         });
         break;
       }
       case leakyrelu::kSELU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::selu, Req>, xpu>::Launch(
-            s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_);
+              s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_);
         });
         break;
       }
       case leakyrelu::kGELU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kOut], Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::gelu, Req>, xpu>::Launch(
-            s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_);
+              s, out.size(0) * out.size(1) * out.size(2), out.dptr_, data.dptr_);
         });
         break;
       }
@@ -233,20 +261,20 @@ class LeakyReLUOp : public Operator {
     }
   }
 
-  virtual void Backward(const OpContext & ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     size_t expected = param_.act_type == leakyrelu::kPReLU ? 2 : 1;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(req.size(), expected);
     CHECK_EQ(in_data.size(), expected);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     Tensor<xpu, 3, DType> output;
     Tensor<xpu, 3, DType> data;
     Tensor<xpu, 3, DType> gdata;
@@ -254,10 +282,10 @@ class LeakyReLUOp : public Operator {
     Tensor<xpu, 3, DType> mask;
     int n = out_grad[leakyrelu::kOut].shape_[0];
     int k = (out_grad[leakyrelu::kOut].ndim() > 1) ? out_grad[leakyrelu::kOut].shape_[1] : 1;
-    Shape<3> dshape = Shape3(n, k, out_grad[leakyrelu::kOut].Size()/n/k);
-    grad = out_grad[leakyrelu::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
-    gdata = in_grad[leakyrelu::kData].get_with_shape<xpu, 3, DType>(dshape, s);
-    output = out_data[leakyrelu::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
+    Shape<3> dshape = Shape3(n, k, out_grad[leakyrelu::kOut].Size() / n / k);
+    grad            = out_grad[leakyrelu::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
+    gdata           = in_grad[leakyrelu::kData].get_with_shape<xpu, 3, DType>(dshape, s);
+    output          = out_data[leakyrelu::kOut].get_with_shape<xpu, 3, DType>(dshape, s);
     if (param_.act_type == leakyrelu::kRReLU) {
       mask = out_data[leakyrelu::kMask].get_with_shape<xpu, 3, DType>(dshape, s);
     }
@@ -267,16 +295,20 @@ class LeakyReLUOp : public Operator {
     switch (param_.act_type) {
       case leakyrelu::kLeakyReLU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kData], Req, {
-          mxnet_op::Kernel<mxnet_op::op_with_req<
-            mxnet_op::backward_grad_tuned<mshadow_op::xelu_grad>, Req>, xpu>::Launch(
-              s, gdata.size(0) * gdata.size(1) * gdata.size(2), gdata.dptr_, grad.dptr_,
-              output.dptr_, DType(param_.slope));
+          mxnet_op::Kernel<
+              mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<mshadow_op::xelu_grad>, Req>,
+              xpu>::Launch(s,
+                           gdata.size(0) * gdata.size(1) * gdata.size(2),
+                           gdata.dptr_,
+                           grad.dptr_,
+                           output.dptr_,
+                           DType(param_.slope));
         });
         break;
       }
       case leakyrelu::kPReLU: {
-        mxnet::TShape gshape = expand_shape(in_grad[leakyrelu::kGamma].shape_,
-                                     in_grad[leakyrelu::kData].shape_);
+        mxnet::TShape gshape =
+            expand_shape(in_grad[leakyrelu::kGamma].shape_, in_grad[leakyrelu::kData].shape_);
         mxnet::TShape new_lshape, new_rshape, new_oshape;
         const bool need_bc = BinaryBroadcastShapeCompact(in_grad[leakyrelu::kData].shape_,
                                                          gshape,
@@ -286,37 +318,46 @@ class LeakyReLUOp : public Operator {
                                                          &new_oshape) != 0;
         if (!need_bc) {
 #if !defined(__CUDACC__)
-          ElemwiseBinaryOp::BackwardUseIn<xpu,
-                                          mshadow_op::xelu_grad,
-                                          mshadow_op::prelu_grad>(
-            nnvm::NodeAttrs(), ctx, {out_grad[leakyrelu::kOut],
-                                     in_data[leakyrelu::kData],
-                                     in_data[leakyrelu::kGamma]}, req, in_grad);
+          ElemwiseBinaryOp::BackwardUseIn<xpu, mshadow_op::xelu_grad, mshadow_op::prelu_grad>(
+              nnvm::NodeAttrs(),
+              ctx,
+              {out_grad[leakyrelu::kOut], in_data[leakyrelu::kData], in_data[leakyrelu::kGamma]},
+              req,
+              in_grad);
 #else
-          ElemwiseBinaryRTCBwdUseIn {"xelu_grad", "prelu_grad"}(
-            nnvm::NodeAttrs(), ctx, {out_grad[leakyrelu::kOut],
-                                     in_data[leakyrelu::kData],
-                                     in_data[leakyrelu::kGamma]}, req, in_grad);
+          ElemwiseBinaryRTCBwdUseIn{"xelu_grad", "prelu_grad"}(  // NOLINT
+              nnvm::NodeAttrs(),
+              ctx,
+              {out_grad[leakyrelu::kOut], in_data[leakyrelu::kData], in_data[leakyrelu::kGamma]},
+              req,
+              in_grad);
 #endif  // !defined(__CUDACC__)
         } else {
 #if !defined(__CUDACC__)
           BROADCAST_NDIM_SWITCH(new_oshape.ndim(), NDim, {
-            BinaryBroadcastBackwardUseInImpl<xpu, NDim, DType,
-              mshadow_op::xelu_grad, mshadow_op::prelu_grad>(
-                ctx, {out_grad[leakyrelu::kOut],
-                      in_data[leakyrelu::kData],
-                      in_data[leakyrelu::kGamma]}, req, in_grad,
-                new_lshape, new_rshape, new_oshape);
+            BinaryBroadcastBackwardUseInImpl<xpu,
+                                             NDim,
+                                             DType,
+                                             mshadow_op::xelu_grad,
+                                             mshadow_op::prelu_grad>(
+                ctx,
+                {out_grad[leakyrelu::kOut], in_data[leakyrelu::kData], in_data[leakyrelu::kGamma]},
+                req,
+                in_grad,
+                new_lshape,
+                new_rshape,
+                new_oshape);
           });
 #else
           std::vector<TBlob> new_in_grad(2);
-          new_in_grad[leakyrelu::kData] = in_grad[leakyrelu::kData];
+          new_in_grad[leakyrelu::kData]  = in_grad[leakyrelu::kData];
           new_in_grad[leakyrelu::kGamma] = in_grad[leakyrelu::kGamma].reshape(gshape);
-          BinaryBroadcastRTCBackwardUseIn {"xelu_grad", "prelu_grad"}(
-              nnvm::NodeAttrs(), ctx, {out_grad[leakyrelu::kOut],
-                                       in_data[leakyrelu::kData],
-                                       in_data[leakyrelu::kGamma]},
-                req, new_in_grad);
+          BinaryBroadcastRTCBackwardUseIn{"xelu_grad", "prelu_grad"}(  // NOLINT
+              nnvm::NodeAttrs(),
+              ctx,
+              {out_grad[leakyrelu::kOut], in_data[leakyrelu::kData], in_data[leakyrelu::kGamma]},
+              req,
+              new_in_grad);
 #endif  // !defined(__CUDACC__)
         }
         break;
@@ -327,28 +368,39 @@ class LeakyReLUOp : public Operator {
       }
       case leakyrelu::kELU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kData], Req, {
-          mxnet_op::Kernel<mxnet_op::op_with_req<
-            mxnet_op::backward_grad_tuned<mshadow_op::elu_grad>, Req>, xpu>::Launch(
-              s, gdata.size(0) * gdata.size(1) * gdata.size(2), gdata.dptr_, grad.dptr_,
-              output.dptr_, DType(param_.slope));
+          mxnet_op::Kernel<
+              mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<mshadow_op::elu_grad>, Req>,
+              xpu>::Launch(s,
+                           gdata.size(0) * gdata.size(1) * gdata.size(2),
+                           gdata.dptr_,
+                           grad.dptr_,
+                           output.dptr_,
+                           DType(param_.slope));
         });
         break;
       }
       case leakyrelu::kSELU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kData], Req, {
-          mxnet_op::Kernel<mxnet_op::op_with_req<
-            mxnet_op::backward_grad_tuned<mshadow_op::selu_grad>, Req>, xpu>::Launch(
-              s, gdata.size(0) * gdata.size(1) * gdata.size(2), gdata.dptr_, grad.dptr_,
-              output.dptr_);
+          mxnet_op::Kernel<
+              mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<mshadow_op::selu_grad>, Req>,
+              xpu>::Launch(s,
+                           gdata.size(0) * gdata.size(1) * gdata.size(2),
+                           gdata.dptr_,
+                           grad.dptr_,
+                           output.dptr_);
         });
         break;
       }
       case leakyrelu::kGELU: {
         MXNET_ASSIGN_REQ_SWITCH(req[leakyrelu::kData], Req, {
-          mxnet_op::Kernel<mxnet_op::op_with_req<
-            mxnet_op::backward_grad_tuned<mshadow_op::gelu_grad>, Req>, xpu>::Launch(
-              s, gdata.size(0) * gdata.size(1) * gdata.size(2), gdata.dptr_, grad.dptr_,
-              data.dptr_, output.dptr_);
+          mxnet_op::Kernel<
+              mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<mshadow_op::gelu_grad>, Req>,
+              xpu>::Launch(s,
+                           gdata.size(0) * gdata.size(1) * gdata.size(2),
+                           gdata.dptr_,
+                           grad.dptr_,
+                           data.dptr_,
+                           output.dptr_);
         });
         break;
       }
@@ -379,13 +431,15 @@ class LeakyReLUOp : public Operator {
   LeakyReLUParam param_;
 };  // class LeakyReLUOp
 
-template<typename xpu>
+template <typename xpu>
 void LeakyReLUCompute(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx, const std::vector<TBlob>& inputs,
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs) {
-  if (inputs[0].Size() == 0U) return;
-  const LeakyReLUParam &param = nnvm::get<LeakyReLUParam>(attrs.parsed);
+  if (inputs[0].Size() == 0U)
+    return;
+  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
   const std::vector<TBlob> no_use_but_adapt_origin_api;
   size_t expected = param.act_type == leakyrelu::kPReLU ? 2 : 1;
   CHECK_EQ(inputs.size(), expected);
@@ -396,29 +450,29 @@ void LeakyReLUCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void LeakyReLUGradCompute(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs) {
-  if (inputs[0].Size() == 0U) return;
+  if (inputs[0].Size() == 0U)
+    return;
   const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
   const std::vector<TBlob> no_use_but_adapt_origin_api;
   // inputs: out_grad, input_data, input_gamma, output, output_mask
-  size_t expected_in = param.act_type == leakyrelu::kPReLU ? 2 : 1;
+  size_t expected_in  = param.act_type == leakyrelu::kPReLU ? 2 : 1;
   size_t expected_out = param.act_type == leakyrelu::kRReLU ? 2 : 1;
 
   CHECK_GE(inputs.size(), 1 + expected_in + expected_out);
   std::vector<TBlob> out_grad{inputs[0]};
-  std::vector<TBlob> in_data(inputs.begin() + 1,
-                             inputs.begin() + 1 + expected_in);
+  std::vector<TBlob> in_data(inputs.begin() + 1, inputs.begin() + 1 + expected_in);
   std::vector<TBlob> out_data(inputs.begin() + 1 + expected_in,
                               inputs.begin() + 1 + expected_in + expected_out);
 
   CHECK_EQ(req.size(), outputs.size());
-  int dtype = inputs[0].type_flag_;
-  const std::vector<TBlob> &in_grad = outputs;
+  int dtype                         = inputs[0].type_flag_;
+  const std::vector<TBlob>& in_grad = outputs;
 
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
     LeakyReLUOp<xpu, DType> op(param);
@@ -430,4 +484,3 @@ void LeakyReLUGradCompute(const nnvm::NodeAttrs& attrs,
 }  // namespace mxnet
 
 #endif  // MXNET_OPERATOR_LEAKY_RELU_INL_H_
-
diff --git a/src/operator/leaky_relu.cc b/src/operator/leaky_relu.cc
index 95a825524f86..2dd1819b4a68 100644
--- a/src/operator/leaky_relu.cc
+++ b/src/operator/leaky_relu.cc
@@ -22,7 +22,7 @@
  * \file leaky_relu.cc
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./leaky_relu-inl.h"
 #if MXNET_USE_ONEDNN == 1
@@ -37,8 +37,8 @@ namespace op {
 DMLC_REGISTER_PARAMETER(LeakyReLUParam);
 
 static bool LeakyReLUType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type,
-                          std::vector<int> *out_type) {
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
   int dtype = -1;
   for (const int& type : *in_type) {
     type_assign(&dtype, type);
@@ -56,19 +56,20 @@ static bool LeakyReLUType(const nnvm::NodeAttrs& attrs,
 }
 
 static bool LeakyReLUShape(const nnvm::NodeAttrs& attrs,
-                           std::vector<TShape> *in_shape,
-                           std::vector<TShape> *out_shape) {
+                           std::vector<TShape>* in_shape,
+                           std::vector<TShape>* out_shape) {
   using namespace mshadow;
-  const LeakyReLUParam &param_ = nnvm::get<LeakyReLUParam>(attrs.parsed);
+  const LeakyReLUParam& param_ = nnvm::get<LeakyReLUParam>(attrs.parsed);
   if (param_.act_type == leakyrelu::kPReLU) {
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, gamma]";
   } else {
     CHECK_EQ(in_shape->size(), 1U) << "Input:[data]";
   }
-  const mxnet::TShape &dshape = in_shape->at(leakyrelu::kData);
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = in_shape->at(leakyrelu::kData);
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   if (param_.act_type == leakyrelu::kPReLU) {
-    const mxnet::TShape &gshape = in_shape->at(leakyrelu::kGamma);
+    const mxnet::TShape& gshape = in_shape->at(leakyrelu::kGamma);
     if (!mxnet::ndim_is_known(gshape)) {
       in_shape->at(leakyrelu::kGamma) = mxnet::TShape(Shape1(dshape[1]));
     }
@@ -90,9 +91,10 @@ static void LeakyReLUComputeExCPU(const nnvm::NodeAttrs& attrs,
                                   const std::vector<NDArray>& inputs,
                                   const std::vector<OpReqType>& req,
                                   const std::vector<NDArray>& outputs) {
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  size_t expected = param.act_type == leakyrelu::kPReLU ? 2 : 1;
+  size_t expected             = param.act_type == leakyrelu::kPReLU ? 2 : 1;
   CHECK_EQ(inputs.size(), expected);
   if (SupportMKLDNNLeakyRelu(param, inputs[0])) {
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
@@ -108,7 +110,8 @@ void LeakyReLUGradComputeExCPU(const nnvm::NodeAttrs& attrs,
                                const std::vector<NDArray>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<NDArray>& outputs) {
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
   if (SupportMKLDNNLeakyRelu(param, inputs[0])) {
     std::vector<NDArray> in_data{inputs[0], inputs[1]};
@@ -123,28 +126,28 @@ void LeakyReLUGradComputeExCPU(const nnvm::NodeAttrs& attrs,
 inline static bool LeakyReLUStorageType(const nnvm::NodeAttrs& attrs,
                                         const int dev_mask,
                                         DispatchMode* dispatch_mode,
-                                        std::vector<int> *in_attrs,
-                                        std::vector<int> *out_attrs) {
+                                        std::vector<int>* in_attrs,
+                                        std::vector<int>* out_attrs) {
   const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  size_t expected = param.act_type == leakyrelu::kPReLU ? 2 : 1;
+  size_t expected             = param.act_type == leakyrelu::kPReLU ? 2 : 1;
   CHECK_EQ(in_attrs->size(), expected);
-  return MKLDNNStorageType(attrs, dev_mask, SupportMKLDNNLeakyRelu(param),
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(
+      attrs, dev_mask, SupportMKLDNNLeakyRelu(param), dispatch_mode, in_attrs, out_attrs);
 }
 
 inline static bool BackwardLeakyReLUStorageType(const nnvm::NodeAttrs& attrs,
                                                 const int dev_mask,
                                                 DispatchMode* dispatch_mode,
-                                                std::vector<int> *in_attrs,
-                                                std::vector<int> *out_attrs) {
+                                                std::vector<int>* in_attrs,
+                                                std::vector<int>* out_attrs) {
   const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  return MKLDNNStorageType(attrs, dev_mask, SupportMKLDNNLeakyRelu(param),
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(
+      attrs, dev_mask, SupportMKLDNNLeakyRelu(param), dispatch_mode, in_attrs, out_attrs);
 }
 #endif  // MXNET_USE_ONEDNN == 1
 
 NNVM_REGISTER_OP(LeakyReLU)
-.describe(R"code(Applies Leaky rectified linear unit activation element-wise to the input.
+    .describe(R"code(Applies Leaky rectified linear unit activation element-wise to the input.
 
 Leaky ReLUs attempt to fix the "dying ReLU" problem by allowing a small `slope`
 when the input is negative and has a slope of one when input is positive.
@@ -162,86 +165,94 @@ The following modified ReLU Activation functions are supported:
   *(lower_bound+upper_bound)/2* for inference.
 
 )code" ADD_FILELINE)
-.add_alias("_npx_leaky_relu")
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  return param.act_type == leakyrelu::kPReLU ? 2 : 1;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  return param.act_type == leakyrelu::kRReLU ? 2 : 1;
-})
-.set_attr_parser(ParamParser<LeakyReLUParam>)
+    .add_alias("_npx_leaky_relu")
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
+      return param.act_type == leakyrelu::kPReLU ? 2 : 1;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
+      return param.act_type == leakyrelu::kRReLU ? 2 : 1;
+    })
+    .set_attr_parser(ParamParser<LeakyReLUParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", LeakyReLUStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", LeakyReLUStorageType)
 #endif
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  return param.act_type == leakyrelu::kPReLU ? std::vector<std::string>{"data", "gamma"}
-                                             : std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  return param.act_type == leakyrelu::kRReLU ? std::vector<std::string>{"output", "mask"}
-                                             : std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", LeakyReLUShape)
-.set_attr<nnvm::FInferType>("FInferType", LeakyReLUType)
-.set_attr<FCompute>("FCompute<cpu>", LeakyReLUCompute<cpu>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const LeakyReLUParam& param =
+                                           nnvm::get<LeakyReLUParam>(attrs.parsed);
+                                       return param.act_type == leakyrelu::kPReLU
+                                                  ? std::vector<std::string>{"data", "gamma"}
+                                                  : std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        const LeakyReLUParam& param =
+                                            nnvm::get<LeakyReLUParam>(attrs.parsed);
+                                        return param.act_type == leakyrelu::kRReLU
+                                                   ? std::vector<std::string>{"output", "mask"}
+                                                   : std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", LeakyReLUShape)
+    .set_attr<nnvm::FInferType>("FInferType", LeakyReLUType)
+    .set_attr<FCompute>("FCompute<cpu>", LeakyReLUCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LeakyReLUComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LeakyReLUComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_LeakyReLU"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.add_argument("data", "NDArray-or-Symbol", "Input data to activation function.")
-.add_argument("gamma", "NDArray-or-Symbol", "Input data to activation function.")
-.add_arguments(LeakyReLUParam::__FIELDS__())
-.set_attr<nnvm::FSetInputVarAttrOnCompose>("FSetInputVarAttrOnCompose",
-    [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
-      if (index == 1 && var->attrs.dict.find("__init__") == var->attrs.dict.end()) {
-        var->attrs.dict["__init__"] = R"(["Constant", {"value": 0.25}])";
-      }
-    });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_LeakyReLU"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "Input data to activation function.")
+    .add_argument("gamma", "NDArray-or-Symbol", "Input data to activation function.")
+    .add_arguments(LeakyReLUParam::__FIELDS__())
+    .set_attr<nnvm::FSetInputVarAttrOnCompose>(
+        "FSetInputVarAttrOnCompose",
+        [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
+          if (index == 1 && var->attrs.dict.find("__init__") == var->attrs.dict.end()) {
+            var->attrs.dict["__init__"] = R"(["Constant", {"value": 0.25}])";
+          }
+        });
 
 NNVM_REGISTER_OP(_backward_LeakyReLU)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  if (param.act_type == leakyrelu::kPReLU) {
-    // forward has 2 inputs and 1 output
-    return 2 + 2 * 1;
-  } else if (param.act_type == leakyrelu::kRReLU) {
-    // forward has 1 input and 2 outputs
-    return 1 + 2 * 2;
-  } else {
-    // forward has 1 input and 1 output
-    return 1 + 2 * 1;
-  }
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
-  return param.act_type == leakyrelu::kPReLU ? 2 : 1;
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
+      if (param.act_type == leakyrelu::kPReLU) {
+        // forward has 2 inputs and 1 output
+        return 2 + 2 * 1;
+      } else if (param.act_type == leakyrelu::kRReLU) {
+        // forward has 1 input and 2 outputs
+        return 1 + 2 * 2;
+      } else {
+        // forward has 1 input and 1 output
+        return 1 + 2 * 1;
+      }
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const LeakyReLUParam& param = nnvm::get<LeakyReLUParam>(attrs.parsed);
+      return param.act_type == leakyrelu::kPReLU ? 2 : 1;
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", BackwardLeakyReLUStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardLeakyReLUStorageType)
 #endif
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr_parser(ParamParser<LeakyReLUParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr_parser(ParamParser<LeakyReLUParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LeakyReLUGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LeakyReLUGradComputeExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", LeakyReLUGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", LeakyReLUGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/leaky_relu.cu b/src/operator/leaky_relu.cu
index fa8e95b4b952..8d63050cb61a 100644
--- a/src/operator/leaky_relu.cu
+++ b/src/operator/leaky_relu.cu
@@ -22,19 +22,17 @@
  * \file leaky_relu.cc
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./leaky_relu-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(LeakyReLU)
-.set_attr<FCompute>("FCompute<gpu>", LeakyReLUCompute<gpu>);
+NNVM_REGISTER_OP(LeakyReLU).set_attr<FCompute>("FCompute<gpu>", LeakyReLUCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_LeakyReLU)
-.set_attr<FCompute>("FCompute<gpu>", LeakyReLUGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", LeakyReLUGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/linalg.h b/src/operator/linalg.h
index 7b712e9fc37e..92b8e2c10099 100644
--- a/src/operator/linalg.h
+++ b/src/operator/linalg.h
@@ -55,29 +55,44 @@ using namespace mshadow;
 // for further information about the function and its parameters.
 // Note that this is C = gemm(A,B,C), so C is input and output parameter.
 // C = alpha * A * B + beta * C
-template<typename xpu, typename DType>
-void linalg_gemm(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                 const Tensor<xpu, 2, DType>& C, DType alpha, DType beta,
-                 bool tA, bool tB, Stream<xpu> *s = 0);
-
-template<typename xpu, typename DType>
-void linalg_batch_gemm(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                       const Tensor<xpu, 3, DType>& C, DType alpha, DType beta,
-                       bool tA, bool tB, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_gemm(const Tensor<xpu, 2, DType>& A,
+                 const Tensor<xpu, 2, DType>& B,
+                 const Tensor<xpu, 2, DType>& C,
+                 DType alpha,
+                 DType beta,
+                 bool tA,
+                 bool tB,
+                 Stream<xpu>* s = 0);
+
+template <typename xpu, typename DType>
+void linalg_batch_gemm(const Tensor<xpu, 3, DType>& A,
+                       const Tensor<xpu, 3, DType>& B,
+                       const Tensor<xpu, 3, DType>& C,
+                       DType alpha,
+                       DType beta,
+                       bool tA,
+                       bool tB,
+                       Stream<xpu>* s = 0);
 
 // Version of batch gemmm where rows are indexed at axis 1 and columns at axis 3.
-template<typename xpu, typename DType>
-void linalg_batch_gemm(const Tensor<xpu, 4, DType>& A, const Tensor<xpu, 4, DType>& B,
-                       const Tensor<xpu, 4, DType>& C, DType alpha, DType beta,
-                       bool tA, bool tB, Stream<xpu> *s = 0);
-
-
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
+void linalg_batch_gemm(const Tensor<xpu, 4, DType>& A,
+                       const Tensor<xpu, 4, DType>& B,
+                       const Tensor<xpu, 4, DType>& C,
+                       DType alpha,
+                       DType beta,
+                       bool tA,
+                       bool tB,
+                       Stream<xpu>* s = 0);
+
+template <typename xpu, typename DType>
 inline void linalg_gemm(const Tensor<xpu, 2, DType>& A,
                         const Tensor<xpu, 2, DType>& B,
                         const Tensor<xpu, 2, DType>& C,
-                        bool tA, bool tB,
-                        Stream<xpu> *s = 0,
+                        bool tA,
+                        bool tB,
+                        Stream<xpu>* s       = 0,
                         mxnet::OpReqType req = mxnet::kWriteTo);
 
 //////////////////////////////// TRSM ////////////////////////////////////////////
@@ -85,13 +100,23 @@ inline void linalg_gemm(const Tensor<xpu, 2, DType>& A,
 // CPU/GPU-versions of BLAS3 function "trsm". Please refer to the BLAS3-documentation
 // for further information about the function and its parameters.
 // Note that this is B = trsm(A,B), so B is input and output parameter.
-template<typename xpu, typename DType>
-void linalg_trsm(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s = 0);
-
-template<typename xpu, typename DType>
-inline void linalg_batch_trsm(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                   DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_trsm(const Tensor<xpu, 2, DType>& A,
+                 const Tensor<xpu, 2, DType>& B,
+                 DType alpha,
+                 bool rightside,
+                 bool lower,
+                 bool transpose,
+                 Stream<xpu>* s = 0);
+
+template <typename xpu, typename DType>
+inline void linalg_batch_trsm(const Tensor<xpu, 3, DType>& A,
+                              const Tensor<xpu, 3, DType>& B,
+                              DType alpha,
+                              bool rightside,
+                              bool lower,
+                              bool transpose,
+                              Stream<xpu>* s = 0);
 
 //////////////////////////////// TRMM ////////////////////////////////////////////
 
@@ -99,13 +124,23 @@ inline void linalg_batch_trsm(const Tensor<xpu, 3, DType>& A, const Tensor<xpu,
 // for further information about the function and its parameters.
 // Note that this is B = trmm(A,B), so B is input and output parameter.
 
-template<typename xpu, typename DType>
-void linalg_trmm(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s = 0);
-
-template<typename xpu, typename DType>
-void linalg_batch_trmm(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                    DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_trmm(const Tensor<xpu, 2, DType>& A,
+                 const Tensor<xpu, 2, DType>& B,
+                 DType alpha,
+                 bool rightside,
+                 bool lower,
+                 bool transpose,
+                 Stream<xpu>* s = 0);
+
+template <typename xpu, typename DType>
+void linalg_batch_trmm(const Tensor<xpu, 3, DType>& A,
+                       const Tensor<xpu, 3, DType>& B,
+                       DType alpha,
+                       bool rightside,
+                       bool lower,
+                       bool transpose,
+                       Stream<xpu>* s = 0);
 
 //////////////////////////////// POTRF ////////////////////////////////////////////
 
@@ -113,11 +148,11 @@ void linalg_batch_trmm(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DTyp
 // for further information about the function and its parameters.
 // Note that this is A = potrf(A), so A is input and output parameter.
 
-template<typename xpu, typename DType>
-void linalg_potrf(const Tensor<xpu, 2, DType>& A, bool lower, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_potrf(const Tensor<xpu, 2, DType>& A, bool lower, Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType>
-void linalg_batch_potrf(const Tensor<xpu, 3, DType>& A, bool lower, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_batch_potrf(const Tensor<xpu, 3, DType>& A, bool lower, Stream<xpu>* s = 0);
 
 //////////////////////////////// POTRI ////////////////////////////////////////////
 
@@ -125,11 +160,11 @@ void linalg_batch_potrf(const Tensor<xpu, 3, DType>& A, bool lower, Stream<xpu>
 // for further information about the function and its parameters.
 // Note that this is A = potri(A), so A is input and output parameter.
 
-template<typename xpu, typename DType>
-void linalg_potri(const Tensor<xpu, 2, DType>& A, bool lower, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_potri(const Tensor<xpu, 2, DType>& A, bool lower, Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType>
-void linalg_batch_potri(const Tensor<xpu, 3, DType>& A, bool lower, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_batch_potri(const Tensor<xpu, 3, DType>& A, bool lower, Stream<xpu>* s = 0);
 
 //////////////////////////////// SYRK ////////////////////////////////////////////
 
@@ -137,14 +172,21 @@ void linalg_batch_potri(const Tensor<xpu, 3, DType>& A, bool lower, Stream<xpu>
 // for further information about the function and its parameters.
 // Note that this is B = syrk(A, B), so that B is input and output parameter.
 
-template<typename xpu, typename DType>
-void linalg_syrk(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                 DType alpha, DType beta, bool tA, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_syrk(const Tensor<xpu, 2, DType>& A,
+                 const Tensor<xpu, 2, DType>& B,
+                 DType alpha,
+                 DType beta,
+                 bool tA,
+                 Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_batch_syrk(const Tensor<xpu, 3, DType>& A,
-                       const Tensor<xpu, 3, DType>& B, DType alpha, DType beta,
-                       bool tA, Stream<xpu> *s = 0);
+                       const Tensor<xpu, 3, DType>& B,
+                       DType alpha,
+                       DType beta,
+                       bool tA,
+                       Stream<xpu>* s = 0);
 
 //////////////////////////////// GELQF ////////////////////////////////////////////
 
@@ -156,20 +198,21 @@ void linalg_batch_syrk(const Tensor<xpu, 3, DType>& A,
 // - We call orglq after gelqf. Apart from A, they also communicate via the
 //   first part of the workspace.
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_gelqf(const Tensor<xpu, 2, DType>& A,
-                  const Tensor<xpu, 1, DType>& work, Stream<xpu> *s = 0);
+                  const Tensor<xpu, 1, DType>& work,
+                  Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_orglq(const Tensor<xpu, 2, DType>& A,
-                  const Tensor<xpu, 1, DType>& work, Stream<xpu> *s = 0);
+                  const Tensor<xpu, 1, DType>& work,
+                  Stream<xpu>* s = 0);
 
 // This function determines the amount of workspace needed for linalg_gelqf,
 // linalg_orglq. The workspace can be used for both. The first m entries are
 // used to communicate information from gelqf to orglq.
-template<typename xpu, typename DType>
-int linalg_gelqf_workspace_query(const Tensor<xpu, 2, DType>& A,
-                                 Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+int linalg_gelqf_workspace_query(const Tensor<xpu, 2, DType>& A, Stream<xpu>* s = 0);
 
 //////////////////////////////// SYEVD ////////////////////////////////////////////
 
@@ -179,18 +222,18 @@ int linalg_gelqf_workspace_query(const Tensor<xpu, 2, DType>& A,
 // - A is input and output parameter (overwritten by U)
 // - Input A is symmetric, we access the lower triangle only
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_syevd(const Tensor<xpu, 2, DType>& A,
                   const Tensor<xpu, 1, DType>& L,
                   const Tensor<xpu, 1, DType>& work,
-                  Stream<xpu> *s = 0);
+                  Stream<xpu>* s = 0);
 
 // This function determines the amount of workspace needed for linalg_syevd
 // which is returned as number of elements of type DType.
-template<typename xpu, typename DType, typename IndexT = typename LapackIndex<xpu>::IndexT>
+template <typename xpu, typename DType, typename IndexT = typename LapackIndex<xpu>::IndexT>
 IndexT linalg_syevd_workspace_query(const Tensor<xpu, 2, DType>& A,
-                                 const Tensor<xpu, 1, DType>& L,
-                                 Stream<xpu> *s = 0);
+                                    const Tensor<xpu, 1, DType>& L,
+                                    Stream<xpu>* s = 0);
 
 //////////////////////////////// GESVD ////////////////////////////////////////////
 
@@ -198,7 +241,7 @@ IndexT linalg_syevd_workspace_query(const Tensor<xpu, 2, DType>& A,
 // LAPACK documentation for further details.
 // Note: V is input and output parameter (it overwrites A)
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_gesvd(const Tensor<xpu, 2, DType>& UT,
                   const Tensor<xpu, 1, DType>& L,
                   const Tensor<xpu, 2, DType>& V,
@@ -207,11 +250,11 @@ void linalg_gesvd(const Tensor<xpu, 2, DType>& UT,
 
 // This function determines the amount of workspace needed for linalg_gesvd
 // which is returned as number of elements of type DType.
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 size_t linalg_gesvd_workspace_query(const Tensor<xpu, 2, DType>& UT,
-                                 const Tensor<xpu, 1, DType>& L,
-                                 const Tensor<xpu, 2, DType>& V,
-                                 Stream<xpu>* s = 0);
+                                    const Tensor<xpu, 1, DType>& L,
+                                    const Tensor<xpu, 2, DType>& V,
+                                    Stream<xpu>* s = 0);
 
 //////////////////////////////// GETRF ////////////////////////////////////////////
 
@@ -222,17 +265,17 @@ size_t linalg_gesvd_workspace_query(const Tensor<xpu, 2, DType>& UT,
 // - A is input and output parameter (overwritten by LU)
 // - Param check_singular is only useful in cpu version. If check_singular is false,
 //   don't throw error when A is non-invertible matrix.
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_getrf(const Tensor<xpu, 2, DType>& A,
                   const Tensor<xpu, 1, lapack_index_t>& pivot,
                   bool check_singular,
-                  Stream<xpu> *s = 0);
+                  Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 void linalg_batch_getrf(const Tensor<xpu, 3, DType>& A,
                         const Tensor<xpu, 2, IndexT>& pivot,
                         bool check_singular,
-                        Stream<xpu> *s = 0);
+                        Stream<xpu>* s = 0);
 
 //////////////////////////////// GETRI ////////////////////////////////////////////
 
@@ -242,26 +285,26 @@ void linalg_batch_getrf(const Tensor<xpu, 3, DType>& A,
 // Note:
 // - pivot and LU is the output of getrf(A)
 // - LU is also the output parameter (overwritten by inverse(A))
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_getri(const Tensor<xpu, 2, DType>& LU,
-                  const Tensor<xpu, 1, lapack_index_t>& pivot, \
+                  const Tensor<xpu, 1, lapack_index_t>& pivot,
                   const Tensor<xpu, 1, DType>& work,
-                  Stream<xpu> *s = 0);
+                  Stream<xpu>* s = 0);
 
 // Note that this function only implements GPU version with "getriBatched" in cuBLAS.
 // Unlike lapack routines in cpu, it is computed out-of-place, so the final matrix
 // inverse is stored in A.
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 void linalg_batch_getri(const Tensor<xpu, 3, DType>& A,
                         const Tensor<xpu, 3, DType>& LU,
                         const Tensor<xpu, 2, IndexT>& pivot,
-                        Stream<xpu> *s = 0);
+                        Stream<xpu>* s = 0);
 
 //////////////////////////////// INVERSE ////////////////////////////////////////////
 
 // CPU/GPU-versions of matrix inverse combining LAPACK function "getrf" and "getri"
 // Note that A = inverse(B)
-template<typename xpu, typename DType, typename IndexT = typename LapackIndex<xpu>::IndexT>
+template <typename xpu, typename DType, typename IndexT = typename LapackIndex<xpu>::IndexT>
 void linalg_batch_inverse(const Tensor<xpu, 3, DType>& A,
                           const Tensor<xpu, 3, DType>& B,
                           const mxnet::OpContext& ctx);
@@ -272,7 +315,7 @@ void linalg_batch_inverse(const Tensor<xpu, 3, DType>& A,
 
 // Helper function in determinant backward computation: compute matrix inverse
 // from LU and pivot using temp workspace, the result is stored back to LU
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 void linalg_batch_det_backward_helper(const Tensor<xpu, 3, DType>& LU,
                                       const Tensor<xpu, 2, IndexT>& pivot,
                                       const Tensor<xpu, 1, DType>& det,
diff --git a/src/operator/linalg_impl.h b/src/operator/linalg_impl.h
index 1b911f7c5db2..150378188fcc 100644
--- a/src/operator/linalg_impl.h
+++ b/src/operator/linalg_impl.h
@@ -40,10 +40,10 @@ inline void linalg_check_batch_size(int A, int B, int C) {
 }
 
 #ifdef __CUDACC__
-#define EPHEMERAL_GPU_STORAGE_ALLOC(func, var, dtype, size) \
+#define EPHEMERAL_GPU_STORAGE_ALLOC(func, var, dtype, size)                          \
   Storage::Handle var = Storage::Get()->Alloc(sizeof(dtype) * size, Context::GPU()); \
-  var.profiler_scope = "<ephemeral>:"; \
-  var.name = #func"_"#var;
+  var.profiler_scope  = "<ephemeral>:";                                              \
+  var.name            = #func "_" #var;
 #endif
 
 //////////////////////////////// GEMM ////////////////////////////////////////////
@@ -52,104 +52,168 @@ inline void linalg_check_batch_size(int A, int B, int C) {
 // for further information about the function and its parameters.
 // Note that this is C = gemm(A,B,C), so C is input and output parameter.
 
-template<typename xpu, typename DType>
-inline void check_gemm(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                const Tensor<xpu, 2, DType>& C, DType alpha, DType beta, bool tA, bool tB) {
+template <typename xpu, typename DType>
+inline void check_gemm(const Tensor<xpu, 2, DType>& A,
+                       const Tensor<xpu, 2, DType>& B,
+                       const Tensor<xpu, 2, DType>& C,
+                       DType alpha,
+                       DType beta,
+                       bool tA,
+                       bool tB) {
   // Any checking that helps user debug potential problems.
   CHECK_EQ((tA ? A.size(1) : A.size(0)), C.size(0))
-    << "Non compatible matrix dimensions between inputs A and C for gemm";
+      << "Non compatible matrix dimensions between inputs A and C for gemm";
   CHECK_EQ((tB ? B.size(0) : B.size(1)), C.size(1))
-    << "Non compatible matrix dimensions between inputs B and C for gemm";
+      << "Non compatible matrix dimensions between inputs B and C for gemm";
   CHECK_EQ((tA ? A.size(0) : A.size(1)), (tB ? B.size(1) : B.size(0)))
-    << "Non compatible matrix dimensions between inputs A and B for gemm";
+      << "Non compatible matrix dimensions between inputs A and B for gemm";
 }
 
-template<typename xpu, typename DType>
-void linalg_gemm_axis(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                      const Tensor<xpu, 3, DType>& C, DType alpha, DType beta,
-                      bool tA, bool tB, Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+void linalg_gemm_axis(const Tensor<xpu, 3, DType>& A,
+                      const Tensor<xpu, 3, DType>& B,
+                      const Tensor<xpu, 3, DType>& C,
+                      DType alpha,
+                      DType beta,
+                      bool tA,
+                      bool tB,
+                      Stream<xpu>* s = 0);
 
 #if (MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1)
 
-#define LINALG_CPU_GEMM(fname, DType) \
-template<> inline \
-void linalg_gemm<cpu, DType>(const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 2, DType>& B, \
-                             const Tensor<cpu, 2, DType>& C, DType alpha, DType beta, \
-                             bool tA, bool tB, Stream<cpu> *s) { \
-  check_gemm(A, B, C, alpha, beta, tA, tB); \
-  cblas_##fname(CblasRowMajor, (tA ? CblasTrans : CblasNoTrans), (tB ? CblasTrans : CblasNoTrans), \
-                C.size(0), C.size(1), (tA ? A.size(0) : A.size(1)), alpha, \
-                A.dptr_, A.stride_, B.dptr_, B.stride_, beta, C.dptr_, C.stride_); \
-}
+#define LINALG_CPU_GEMM(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_gemm<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                      const Tensor<cpu, 2, DType>& B, \
+                                      const Tensor<cpu, 2, DType>& C, \
+                                      DType alpha,                    \
+                                      DType beta,                     \
+                                      bool tA,                        \
+                                      bool tB,                        \
+                                      Stream<cpu>* s) {               \
+    check_gemm(A, B, C, alpha, beta, tA, tB);                         \
+    cblas_##fname(CblasRowMajor,                                      \
+                  (tA ? CblasTrans : CblasNoTrans),                   \
+                  (tB ? CblasTrans : CblasNoTrans),                   \
+                  C.size(0),                                          \
+                  C.size(1),                                          \
+                  (tA ? A.size(0) : A.size(1)),                       \
+                  alpha,                                              \
+                  A.dptr_,                                            \
+                  A.stride_,                                          \
+                  B.dptr_,                                            \
+                  B.stride_,                                          \
+                  beta,                                               \
+                  C.dptr_,                                            \
+                  C.stride_);                                         \
+  }
 
-#define LINALG_XPU_BATCH_GEMM(xpu, DType) \
-template<> inline \
-void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B, \
-                                   const Tensor<xpu, 3, DType>& C, DType alpha, DType beta, \
-                                   bool tA, bool tB, Stream<xpu> *s) { \
-  linalg_check_batch_size(A.size(0), B.size(0), C.size(0)); \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_gemm(A[i], B[i], C[i], alpha, beta, tA, tB, s); \
-  } \
-}
+#define LINALG_XPU_BATCH_GEMM(xpu, DType)                                   \
+  template <>                                                               \
+  inline void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
+                                            const Tensor<xpu, 3, DType>& B, \
+                                            const Tensor<xpu, 3, DType>& C, \
+                                            DType alpha,                    \
+                                            DType beta,                     \
+                                            bool tA,                        \
+                                            bool tB,                        \
+                                            Stream<xpu>* s) {               \
+    linalg_check_batch_size(A.size(0), B.size(0), C.size(0));               \
+    for (index_t i = 0; i < A.size(0); ++i) {                               \
+      linalg_gemm(A[i], B[i], C[i], alpha, beta, tA, tB, s);                \
+    }                                                                       \
+  }
 
 // Batched gemm where the batch coordinate is given by the second axis.
-#define LINALG_CPU_GEMM_AXIS(fname, DType) \
-template<> inline \
-void linalg_gemm_axis<cpu, DType>(const Tensor<cpu, 3, DType>& A, const Tensor<cpu, 3, DType>& B, \
-                                  const Tensor<cpu, 3, DType>& C, DType alpha, DType beta, \
-                                  bool tA, bool tB, Stream<cpu> *s) { \
-  linalg_check_batch_size(A.size(1), B.size(1), C.size(1)); \
-  for (index_t i = 0; i < A.size(1); ++i) { \
-     cblas_##fname(CblasRowMajor, (tA ? CblasTrans : CblasNoTrans), \
-                   (tB ? CblasTrans : CblasNoTrans), \
-                   C.size(0), C.size(2), (tA ? A.size(0) : A.size(2)), alpha, \
-                   A.dptr_+i*A.stride_, A.size(1)*A.stride_, \
-                   B.dptr_+i*B.stride_, B.size(1)*B.stride_, beta, \
-                   C.dptr_+i*C.stride_, C.size(1)*C.stride_); \
-  } \
-}
+#define LINALG_CPU_GEMM_AXIS(fname, DType)                                 \
+  template <>                                                              \
+  inline void linalg_gemm_axis<cpu, DType>(const Tensor<cpu, 3, DType>& A, \
+                                           const Tensor<cpu, 3, DType>& B, \
+                                           const Tensor<cpu, 3, DType>& C, \
+                                           DType alpha,                    \
+                                           DType beta,                     \
+                                           bool tA,                        \
+                                           bool tB,                        \
+                                           Stream<cpu>* s) {               \
+    linalg_check_batch_size(A.size(1), B.size(1), C.size(1));              \
+    for (index_t i = 0; i < A.size(1); ++i) {                              \
+      cblas_##fname(CblasRowMajor,                                         \
+                    (tA ? CblasTrans : CblasNoTrans),                      \
+                    (tB ? CblasTrans : CblasNoTrans),                      \
+                    C.size(0),                                             \
+                    C.size(2),                                             \
+                    (tA ? A.size(0) : A.size(2)),                          \
+                    alpha,                                                 \
+                    A.dptr_ + i * A.stride_,                               \
+                    A.size(1) * A.stride_,                                 \
+                    B.dptr_ + i * B.stride_,                               \
+                    B.size(1) * B.stride_,                                 \
+                    beta,                                                  \
+                    C.dptr_ + i * C.stride_,                               \
+                    C.size(1) * C.stride_);                                \
+    }                                                                      \
+  }
 
 LINALG_CPU_GEMM_AXIS(sgemm, float)
 LINALG_CPU_GEMM_AXIS(dgemm, double)
 
 // Version where matrix rows are given by the second axis.
-#define LINALG_XPU_BATCH_GEMM_AXIS(xpu, DType) \
-template<> inline \
-void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 4, DType>& A, const Tensor<xpu, 4, DType>& B, \
-                                   const Tensor<xpu, 4, DType>& C, DType alpha, DType beta, \
-                                   bool tA, bool tB, Stream<xpu> *s) { \
-  linalg_check_batch_size(A.size(0), B.size(0), C.size(0)); \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_gemm_axis(A[i], B[i], C[i], alpha, beta, tA, tB, s); \
-  } \
-}
+#define LINALG_XPU_BATCH_GEMM_AXIS(xpu, DType)                              \
+  template <>                                                               \
+  inline void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 4, DType>& A, \
+                                            const Tensor<xpu, 4, DType>& B, \
+                                            const Tensor<xpu, 4, DType>& C, \
+                                            DType alpha,                    \
+                                            DType beta,                     \
+                                            bool tA,                        \
+                                            bool tB,                        \
+                                            Stream<xpu>* s) {               \
+    linalg_check_batch_size(A.size(0), B.size(0), C.size(0));               \
+    for (index_t i = 0; i < A.size(0); ++i) {                               \
+      linalg_gemm_axis(A[i], B[i], C[i], alpha, beta, tA, tB, s);           \
+    }                                                                       \
+  }
 
 #else
 
-#define LINALG_CPU_GEMM(fname, DType) \
-template<> inline \
-void linalg_gemm<cpu, DType>(const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 2, DType>& B, \
-                             const Tensor<cpu, 2, DType>& C, DType alpha, DType beta, \
-                             bool tA, bool tB, Stream<cpu> *s) { \
-  LOG(FATAL) << "linalg_gemm (without req arg) not implemented by mxnet for cpu, needs cblas!"; \
-}
+#define LINALG_CPU_GEMM(fname, DType)                                                             \
+  template <>                                                                                     \
+  inline void linalg_gemm<cpu, DType>(const Tensor<cpu, 2, DType>& A,                             \
+                                      const Tensor<cpu, 2, DType>& B,                             \
+                                      const Tensor<cpu, 2, DType>& C,                             \
+                                      DType alpha,                                                \
+                                      DType beta,                                                 \
+                                      bool tA,                                                    \
+                                      bool tB,                                                    \
+                                      Stream<cpu>* s) {                                           \
+    LOG(FATAL) << "linalg_gemm (without req arg) not implemented by mxnet for cpu, needs cblas!"; \
+  }
 
-#define LINALG_XPU_BATCH_GEMM(xpu, DType) \
-template<> inline \
-void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B, \
-                                   const Tensor<xpu, 3, DType>& C, DType alpha, DType beta, \
-                                   bool tA, bool tB, Stream<xpu> *s) { \
-  LOG(FATAL) << "linalg_batch_gemm not implemented by mxnet for cpu, needs cblas!"; \
-}
+#define LINALG_XPU_BATCH_GEMM(xpu, DType)                                             \
+  template <>                                                                         \
+  inline void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 3, DType>& A,           \
+                                            const Tensor<xpu, 3, DType>& B,           \
+                                            const Tensor<xpu, 3, DType>& C,           \
+                                            DType alpha,                              \
+                                            DType beta,                               \
+                                            bool tA,                                  \
+                                            bool tB,                                  \
+                                            Stream<xpu>* s) {                         \
+    LOG(FATAL) << "linalg_batch_gemm not implemented by mxnet for cpu, needs cblas!"; \
+  }
 
-#define LINALG_XPU_BATCH_GEMM_AXIS(xpu, DType) \
-template<> inline \
-void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 4, DType>& A, const Tensor<xpu, 4, DType>& B, \
-                                   const Tensor<xpu, 4, DType>& C, DType alpha, DType beta, \
-                                   bool tA, bool tB, Stream<xpu> *s) { \
-  LOG(FATAL) << "linalg_batch_gemm not implemented by mxnet for cpu, needs cblas!"; \
-}
+#define LINALG_XPU_BATCH_GEMM_AXIS(xpu, DType)                                        \
+  template <>                                                                         \
+  inline void linalg_batch_gemm<xpu, DType>(const Tensor<xpu, 4, DType>& A,           \
+                                            const Tensor<xpu, 4, DType>& B,           \
+                                            const Tensor<xpu, 4, DType>& C,           \
+                                            DType alpha,                              \
+                                            DType beta,                               \
+                                            bool tA,                                  \
+                                            bool tB,                                  \
+                                            Stream<xpu>* s) {                         \
+    LOG(FATAL) << "linalg_batch_gemm not implemented by mxnet for cpu, needs cblas!"; \
+  }
 
 #endif  // MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1
 
@@ -163,13 +227,15 @@ LINALG_XPU_BATCH_GEMM_AXIS(cpu, float)
 LINALG_XPU_BATCH_GEMM_AXIS(cpu, double)
 
 // Specialization of linalg_gemm<cpu, DType> for DType=mshadow::half::half_t.
-template<> inline
-void linalg_gemm<cpu, mshadow::half::half_t>(const Tensor<cpu, 2, mshadow::half::half_t>& A,
-                                             const Tensor<cpu, 2, mshadow::half::half_t>& B,
-                                             const Tensor<cpu, 2, mshadow::half::half_t>& C,
-                                             mshadow::half::half_t alpha,
-                                             mshadow::half::half_t beta,
-                                             bool tA, bool tB, Stream<cpu> *s) {
+template <>
+inline void linalg_gemm<cpu, mshadow::half::half_t>(const Tensor<cpu, 2, mshadow::half::half_t>& A,
+                                                    const Tensor<cpu, 2, mshadow::half::half_t>& B,
+                                                    const Tensor<cpu, 2, mshadow::half::half_t>& C,
+                                                    mshadow::half::half_t alpha,
+                                                    mshadow::half::half_t beta,
+                                                    bool tA,
+                                                    bool tB,
+                                                    Stream<cpu>* s) {
   LOG(FATAL) << "FP16 gemm on cpu not implemented!";
 }
 
@@ -177,21 +243,34 @@ void linalg_gemm<cpu, mshadow::half::half_t>(const Tensor<cpu, 2, mshadow::half:
 
 // cublas col-major processing accounted for by switching first two operands
 
-#define LINALG_GPU_GEMM(fname, DType)                                      \
-  template <>                                                              \
-  inline void linalg_gemm<gpu, DType>(                                     \
-      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 2, DType>& B,      \
-      const Tensor<gpu, 2, DType>& C, DType alpha, DType beta, bool tA,    \
-      bool tB, Stream<gpu>* s) {                                           \
-    using namespace mxnet;                                                 \
-    using mshadow::gpu;                                                    \
-    CHECK_NOTNULL(s);                                                      \
-    check_gemm(A, B, C, alpha, beta, tA, tB);                              \
-    CUBLAS_CALL(cublas##fname(                                             \
-        Stream<gpu>::GetBlasHandle(s), (tB ? CUBLAS_OP_T : CUBLAS_OP_N),   \
-        (tA ? CUBLAS_OP_T : CUBLAS_OP_N), C.size(1), C.size(0),            \
-        (tB ? B.size(1) : B.size(0)), &alpha, B.dptr_, B.stride_, A.dptr_, \
-        A.stride_, &beta, C.dptr_, C.stride_))                             \
+#define LINALG_GPU_GEMM(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_gemm<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
+                                      const Tensor<gpu, 2, DType>& B, \
+                                      const Tensor<gpu, 2, DType>& C, \
+                                      DType alpha,                    \
+                                      DType beta,                     \
+                                      bool tA,                        \
+                                      bool tB,                        \
+                                      Stream<gpu>* s) {               \
+    using namespace mxnet;                                            \
+    using mshadow::gpu;                                               \
+    CHECK_NOTNULL(s);                                                 \
+    check_gemm(A, B, C, alpha, beta, tA, tB);                         \
+    CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),          \
+                              (tB ? CUBLAS_OP_T : CUBLAS_OP_N),       \
+                              (tA ? CUBLAS_OP_T : CUBLAS_OP_N),       \
+                              C.size(1),                              \
+                              C.size(0),                              \
+                              (tB ? B.size(1) : B.size(0)),           \
+                              &alpha,                                 \
+                              B.dptr_,                                \
+                              B.stride_,                              \
+                              A.dptr_,                                \
+                              A.stride_,                              \
+                              &beta,                                  \
+                              C.dptr_,                                \
+                              C.stride_))                             \
   }
 
 // Use cublasSgemmEx when it is available (CUDA >= 7.5). Resolves precision issues with
@@ -200,8 +279,11 @@ void linalg_gemm<cpu, mshadow::half::half_t>(const Tensor<cpu, 2, mshadow::half:
 template <>
 inline void linalg_gemm<gpu, float>(const Tensor<gpu, 2, float>& A,
                                     const Tensor<gpu, 2, float>& B,
-                                    const Tensor<gpu, 2, float>& C, float alpha,
-                                    float beta, bool tA, bool tB,
+                                    const Tensor<gpu, 2, float>& C,
+                                    float alpha,
+                                    float beta,
+                                    bool tA,
+                                    bool tB,
                                     Stream<gpu>* s) {
   using namespace mxnet;
   using mshadow::gpu;
@@ -212,14 +294,25 @@ inline void linalg_gemm<gpu, float>(const Tensor<gpu, 2, float>& A,
 #else
   cublasDataType_t full_datatype = CUBLAS_DATA_FULL;
 #endif
-  auto handle = Stream<gpu>::GetBlasHandle(s);
+  auto handle                  = Stream<gpu>::GetBlasHandle(s);
   cublasMath_t saved_math_mode = SetCublasMathMode(handle, VERSION_ADJUSTED_TF32_MATH);
-  CUBLAS_CALL(cublasSgemmEx(
-      handle, (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
-      (tA ? CUBLAS_OP_T : CUBLAS_OP_N), C.size(1), C.size(0),
-      (tB ? B.size(1) : B.size(0)), &alpha, B.dptr_, full_datatype, B.stride_,
-      A.dptr_, full_datatype, A.stride_, &beta, C.dptr_, full_datatype,
-      C.stride_));
+  CUBLAS_CALL(cublasSgemmEx(handle,
+                            (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
+                            (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
+                            C.size(1),
+                            C.size(0),
+                            (tB ? B.size(1) : B.size(0)),
+                            &alpha,
+                            B.dptr_,
+                            full_datatype,
+                            B.stride_,
+                            A.dptr_,
+                            full_datatype,
+                            A.stride_,
+                            &beta,
+                            C.dptr_,
+                            full_datatype,
+                            C.stride_));
   CUBLAS_CALL(cublasSetMathMode(handle, saved_math_mode));
 }
 
@@ -229,38 +322,56 @@ LINALG_GPU_GEMM(Sgemm, float)
 LINALG_GPU_GEMM(Dgemm, double)
 
 // Version where matrix rows are given by first axis.
-#define LINALG_GPU_GEMM_AXIS(fname, DType) \
-template<> inline \
-void linalg_gemm_axis<gpu, DType>(const Tensor<gpu, 3, DType>& A, const Tensor<gpu, 3, DType>& B, \
-                                  const Tensor<gpu, 3, DType>& C, DType alpha, DType beta, \
-                                  bool tA, bool tB, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  linalg_check_batch_size(A.size(1), B.size(1), C.size(1)); \
-  auto handle = Stream<gpu>::GetBlasHandle(s); \
-  cublasMath_t saved_math_mode = SetCublasMathMode(handle, VERSION_ADJUSTED_TF32_MATH); \
-  CUBLAS_CALL(cublas##fname(handle, \
-                            (tB ? CUBLAS_OP_T : CUBLAS_OP_N), \
-                            (tA ? CUBLAS_OP_T : CUBLAS_OP_N), \
-                            C.size(2), C.size(0), (tB ? B.size(2) : B.size(0)), &alpha, \
-                            B.dptr_, B.size(1)*B.stride_, B.stride_, \
-                            A.dptr_, A.size(1)*A.stride_, A.stride_, &beta, \
-                            C.dptr_, C.size(1)*C.stride_, C.stride_, A.size(1))) \
-  CUBLAS_CALL(cublasSetMathMode(handle, saved_math_mode)); \
-}
+#define LINALG_GPU_GEMM_AXIS(fname, DType)                                                \
+  template <>                                                                             \
+  inline void linalg_gemm_axis<gpu, DType>(const Tensor<gpu, 3, DType>& A,                \
+                                           const Tensor<gpu, 3, DType>& B,                \
+                                           const Tensor<gpu, 3, DType>& C,                \
+                                           DType alpha,                                   \
+                                           DType beta,                                    \
+                                           bool tA,                                       \
+                                           bool tB,                                       \
+                                           Stream<gpu>* s) {                              \
+    using namespace mxnet;                                                                \
+    using mshadow::gpu;                                                                   \
+    CHECK_NOTNULL(s);                                                                     \
+    linalg_check_batch_size(A.size(1), B.size(1), C.size(1));                             \
+    auto handle                  = Stream<gpu>::GetBlasHandle(s);                         \
+    cublasMath_t saved_math_mode = SetCublasMathMode(handle, VERSION_ADJUSTED_TF32_MATH); \
+    CUBLAS_CALL(cublas##fname(handle,                                                     \
+                              (tB ? CUBLAS_OP_T : CUBLAS_OP_N),                           \
+                              (tA ? CUBLAS_OP_T : CUBLAS_OP_N),                           \
+                              C.size(2),                                                  \
+                              C.size(0),                                                  \
+                              (tB ? B.size(2) : B.size(0)),                               \
+                              &alpha,                                                     \
+                              B.dptr_,                                                    \
+                              B.size(1) * B.stride_,                                      \
+                              B.stride_,                                                  \
+                              A.dptr_,                                                    \
+                              A.size(1) * A.stride_,                                      \
+                              A.stride_,                                                  \
+                              &beta,                                                      \
+                              C.dptr_,                                                    \
+                              C.size(1) * C.stride_,                                      \
+                              C.stride_,                                                  \
+                              A.size(1)))                                                 \
+    CUBLAS_CALL(cublasSetMathMode(handle, saved_math_mode));                              \
+  }
 LINALG_GPU_GEMM_AXIS(SgemmStridedBatched, float)
 LINALG_GPU_GEMM_AXIS(DgemmStridedBatched, double)
 
 // Specialization of linalg_gemm<gpu, DType> for DType=mshadow::half::half_t.
 // Specialization of linalg_gemm<gpu, DType> for DType=mshadow::half::half_t.
-template<> inline
-void linalg_gemm<gpu, mshadow::half::half_t>(const Tensor<gpu, 2, mshadow::half::half_t>& A,
-                                             const Tensor<gpu, 2, mshadow::half::half_t>& B,
-                                             const Tensor<gpu, 2, mshadow::half::half_t>& C,
-                                             mshadow::half::half_t alpha,
-                                             mshadow::half::half_t beta,
-                                             bool tA, bool tB, Stream<gpu> *s) {
+template <>
+inline void linalg_gemm<gpu, mshadow::half::half_t>(const Tensor<gpu, 2, mshadow::half::half_t>& A,
+                                                    const Tensor<gpu, 2, mshadow::half::half_t>& B,
+                                                    const Tensor<gpu, 2, mshadow::half::half_t>& C,
+                                                    mshadow::half::half_t alpha,
+                                                    mshadow::half::half_t beta,
+                                                    bool tA,
+                                                    bool tB,
+                                                    Stream<gpu>* s) {
   using namespace mxnet;
   using namespace mxnet::common::cuda;
   using mshadow::gpu;
@@ -270,8 +381,7 @@ void linalg_gemm<gpu, mshadow::half::half_t>(const Tensor<gpu, 2, mshadow::half:
 #if CUDA_VERSION >= 7050
   auto blas_handle = Stream<gpu>::GetBlasHandle(s);
 #if CUDA_VERSION >= 9000
-  auto cublas_math_mode = GetEnvAllowTensorCore() ? CUBLAS_TENSOR_OP_MATH
-                                                  : CUBLAS_DEFAULT_MATH;
+  auto cublas_math_mode   = GetEnvAllowTensorCore() ? CUBLAS_TENSOR_OP_MATH : CUBLAS_DEFAULT_MATH;
   auto previous_math_mode = SetCublasMathMode(blas_handle, cublas_math_mode);
 #endif
 
@@ -281,52 +391,69 @@ void linalg_gemm<gpu, mshadow::half::half_t>(const Tensor<gpu, 2, mshadow::half:
 #else
   cublasDataType_t half_datatype = CUBLAS_DATA_HALF;
 #endif
-  auto algo = CUBLAS_GEMM_DEFAULT_TENSOR_OP;
-  using TrueFP16Type = mshadow::half::half_t;
-  using PseudoFP16Type = typename CublasType<mshadow::half::half_t>::ScaleType;
-  TrueFP16Type trueFP16_alpha = static_cast<TrueFP16Type>(alpha);
-  TrueFP16Type trueFP16_beta = static_cast<TrueFP16Type>(beta);
+  auto algo                       = CUBLAS_GEMM_DEFAULT_TENSOR_OP;
+  using TrueFP16Type              = mshadow::half::half_t;
+  using PseudoFP16Type            = typename CublasType<mshadow::half::half_t>::ScaleType;
+  TrueFP16Type trueFP16_alpha     = static_cast<TrueFP16Type>(alpha);
+  TrueFP16Type trueFP16_beta      = static_cast<TrueFP16Type>(beta);
   PseudoFP16Type pseudoFP16_alpha = static_cast<PseudoFP16Type>(alpha);
-  PseudoFP16Type pseudoFP16_beta = static_cast<PseudoFP16Type>(beta);
-  const void *alpha_ptr;
-  const void *beta_ptr;
+  PseudoFP16Type pseudoFP16_beta  = static_cast<PseudoFP16Type>(beta);
+  const void* alpha_ptr;
+  const void* beta_ptr;
   cudaDataType_t computeType;
   bool use_true_fp16 = dmlc::GetEnv("MXNET_FC_TRUE_FP16", false);
   if (use_true_fp16) {
-    alpha_ptr = &trueFP16_alpha;
-    beta_ptr = &trueFP16_beta;
+    alpha_ptr   = &trueFP16_alpha;
+    beta_ptr    = &trueFP16_beta;
     computeType = CublasType<TrueFP16Type>::kCudaFlag;
   } else {
-    alpha_ptr = &pseudoFP16_alpha;
-    beta_ptr = &pseudoFP16_beta;
+    alpha_ptr   = &pseudoFP16_alpha;
+    beta_ptr    = &pseudoFP16_beta;
     computeType = CublasType<PseudoFP16Type>::kCudaFlag;
   }
   if (SupportsFloat16Compute(s->dev_id)) {
     CUBLAS_CALL(cublasGemmEx(blas_handle,
-                            (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
-                            (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
-                            C.size(1), C.size(0), (tB ? B.size(1) : B.size(0)),
-                            alpha_ptr,
-                            B.dptr_, half_datatype, B.stride_,
-                            A.dptr_, half_datatype, A.stride_,
-                            beta_ptr,
-                            C.dptr_, half_datatype, C.stride_,
-                            computeType, algo));
+                             (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
+                             (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
+                             C.size(1),
+                             C.size(0),
+                             (tB ? B.size(1) : B.size(0)),
+                             alpha_ptr,
+                             B.dptr_,
+                             half_datatype,
+                             B.stride_,
+                             A.dptr_,
+                             half_datatype,
+                             A.stride_,
+                             beta_ptr,
+                             C.dptr_,
+                             half_datatype,
+                             C.stride_,
+                             computeType,
+                             algo));
   } else {
     // pseudo-fp16 (fp32 math with fp16 I/O)
     if (use_true_fp16)
       common::LogOnce("MXNET_FC_TRUE_FP16 was set but this architecture does not support it.");
     float alpha_f = static_cast<float>(alpha);
-    float beta_f = static_cast<float>(beta);
+    float beta_f  = static_cast<float>(beta);
     CUBLAS_CALL(cublasSgemmEx(blas_handle,
-                             (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
-                             (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
-                             C.size(1), C.size(0), (tB ? B.size(1) : B.size(0)),
-                             &alpha_f,
-                             B.dptr_, half_datatype, B.stride_,
-                             A.dptr_, half_datatype, A.stride_,
-                             &beta_f,
-                             C.dptr_, half_datatype, C.stride_));
+                              (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
+                              (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
+                              C.size(1),
+                              C.size(0),
+                              (tB ? B.size(1) : B.size(0)),
+                              &alpha_f,
+                              B.dptr_,
+                              half_datatype,
+                              B.stride_,
+                              A.dptr_,
+                              half_datatype,
+                              A.stride_,
+                              &beta_f,
+                              C.dptr_,
+                              half_datatype,
+                              C.stride_));
   }
 #if CUDA_VERSION >= 9000
   SetCublasMathMode(blas_handle, previous_math_mode);
@@ -338,120 +465,172 @@ void linalg_gemm<gpu, mshadow::half::half_t>(const Tensor<gpu, 2, mshadow::half:
 
 // As of cuda8, cublas has implemented a strided version of batch gemm.
 #if CUDA_VERSION < 8000
-  LINALG_XPU_BATCH_GEMM(gpu, float)
-  LINALG_XPU_BATCH_GEMM(gpu, double)
-  LINALG_XPU_BATCH_GEMM_AXIS(gpu, float)
-  LINALG_XPU_BATCH_GEMM_AXIS(gpu, double)
+LINALG_XPU_BATCH_GEMM(gpu, float)
+LINALG_XPU_BATCH_GEMM(gpu, double)
+LINALG_XPU_BATCH_GEMM_AXIS(gpu, float)
+LINALG_XPU_BATCH_GEMM_AXIS(gpu, double)
 #else
-#define LINALG_GPU_BATCH_GEMM(fname, DType) \
-  template<> inline \
-  void linalg_batch_gemm<gpu, DType>(const Tensor<gpu, 3, DType>& A, \
-                                     const Tensor<gpu, 3, DType>& B, \
-                                     const Tensor<gpu, 3, DType>& C, DType alpha, DType beta, \
-                                     bool tA, bool tB, Stream<gpu> *s) { \
-    using namespace mxnet; \
-    using mshadow::gpu; \
-    CHECK_NOTNULL(s); \
-    linalg_check_batch_size(A.size(0), B.size(0), C.size(0)); \
-    check_gemm(A[0], B[0], C[0], alpha, beta, tA, tB); \
-    using namespace mshadow::cuda; \
-    auto handle = Stream<gpu>::GetBlasHandle(s); \
+#define LINALG_GPU_BATCH_GEMM(fname, DType)                                               \
+  template <>                                                                             \
+  inline void linalg_batch_gemm<gpu, DType>(const Tensor<gpu, 3, DType>& A,               \
+                                            const Tensor<gpu, 3, DType>& B,               \
+                                            const Tensor<gpu, 3, DType>& C,               \
+                                            DType alpha,                                  \
+                                            DType beta,                                   \
+                                            bool tA,                                      \
+                                            bool tB,                                      \
+                                            Stream<gpu>* s) {                             \
+    using namespace mxnet;                                                                \
+    using mshadow::gpu;                                                                   \
+    CHECK_NOTNULL(s);                                                                     \
+    linalg_check_batch_size(A.size(0), B.size(0), C.size(0));                             \
+    check_gemm(A[0], B[0], C[0], alpha, beta, tA, tB);                                    \
+    using namespace mshadow::cuda;                                                        \
+    auto handle                  = Stream<gpu>::GetBlasHandle(s);                         \
     cublasMath_t saved_math_mode = SetCublasMathMode(handle, VERSION_ADJUSTED_TF32_MATH); \
-    CUBLAS_CALL(cublas##fname(handle, \
-                              (tB ? CUBLAS_OP_T : CUBLAS_OP_N), \
-                              (tA ? CUBLAS_OP_T : CUBLAS_OP_N), \
-                              C.size(2), C.size(1), (tB ? B.size(2) : B.size(1)), \
-                              &alpha, \
-                              B.dptr_, B.stride_, \
-                              static_cast<int64_t>(B.size(1) * B.stride_), \
-                              A.dptr_,  A.stride_, \
-                              static_cast<int64_t>(A.size(1) * A.stride_), \
-                              &beta, \
-                              C.dptr_, C.stride_, \
-                              static_cast<int64_t>(C.size(1) * C.stride_), \
-                              A.size(0))) \
-    CUBLAS_CALL(cublasSetMathMode(handle, saved_math_mode)); \
-  }
-
-  LINALG_GPU_BATCH_GEMM(DgemmStridedBatched, double)
-
-  #if CUDA_VERSION < 9010
-  LINALG_GPU_BATCH_GEMM(SgemmStridedBatched, float)
-  #else
-    template <>
-    inline void linalg_batch_gemm<gpu, float>(const Tensor<gpu, 3, float>& A,
-                                              const Tensor<gpu, 3, float>& B,
-                                              const Tensor<gpu, 3, float>& C,
-                                              float alpha, float beta, bool tA,
-                                              bool tB, Stream<gpu>* s) {
-      using namespace mxnet;
-      using mshadow::gpu;
-      CHECK_NOTNULL(s);
-      linalg_check_batch_size(A.size(0), B.size(0), C.size(0));
-      check_gemm(A[0], B[0], C[0], alpha, beta, tA, tB);
-      auto blas_handle = Stream<gpu>::GetBlasHandle(s);
-      bool use_tensor_ops =
-          GetEnvAllowTensorCore() && GetEnvAllowTensorCoreConversion();
-
-      using namespace mshadow::cuda;
-      auto cublas_math_mode =
-          use_tensor_ops ? CUBLAS_TENSOR_OP_MATH : VERSION_ADJUSTED_TF32_MATH;
-      auto previous_math_mode = SetCublasMathMode(blas_handle, cublas_math_mode);
-
-      // cublasGemmStridedBatchedEx is only supported for GPU with architecture
-      // capabilities equal or greater than 5.0. Fall back to
-      // cublasSgemmStridedBatched, which doesn't support implicit conversion
-      // to half-precision to use TensorCores
-      auto cc_major = (s->prop).major;
-      if ((cc_major >= 5) && use_tensor_ops) {
-        CUBLAS_CALL(cublasGemmStridedBatchedEx(
-            blas_handle, (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
-            (tA ? CUBLAS_OP_T : CUBLAS_OP_N), C.size(2), C.size(1),
-            (tB ? B.size(2) : B.size(1)), &alpha, B.dptr_, CUDA_R_32F,
-            B.stride_, B.size(1) * B.stride_, A.dptr_, CUDA_R_32F, A.stride_,
-            A.size(1) * A.stride_, &beta, C.dptr_, CUDA_R_32F, C.stride_,
-            C.size(1) * C.stride_, A.size(0), CUDA_R_32F,
-            CUBLAS_GEMM_DEFAULT_TENSOR_OP));
-      } else {
-        CUBLAS_CALL(cublasSgemmStridedBatched(
-            blas_handle, (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
-            (tA ? CUBLAS_OP_T : CUBLAS_OP_N), C.size(2), C.size(1),
-            (tB ? B.size(2) : B.size(1)), &alpha, B.dptr_, B.stride_,
-            B.size(1) * B.stride_, A.dptr_, A.stride_, A.size(1) * A.stride_,
-            &beta, C.dptr_, C.stride_, C.size(1) * C.stride_, A.size(0)));
-      }
-      SetCublasMathMode(blas_handle, previous_math_mode);
-    }
-  #endif  // CUDA_VERSION < 9010
+    CUBLAS_CALL(cublas##fname(handle,                                                     \
+                              (tB ? CUBLAS_OP_T : CUBLAS_OP_N),                           \
+                              (tA ? CUBLAS_OP_T : CUBLAS_OP_N),                           \
+                              C.size(2),                                                  \
+                              C.size(1),                                                  \
+                              (tB ? B.size(2) : B.size(1)),                               \
+                              &alpha,                                                     \
+                              B.dptr_,                                                    \
+                              B.stride_,                                                  \
+                              static_cast<int64_t>(B.size(1) * B.stride_),                \
+                              A.dptr_,                                                    \
+                              A.stride_,                                                  \
+                              static_cast<int64_t>(A.size(1) * A.stride_),                \
+                              &beta,                                                      \
+                              C.dptr_,                                                    \
+                              C.stride_,                                                  \
+                              static_cast<int64_t>(C.size(1) * C.stride_),                \
+                              A.size(0)))                                                 \
+    CUBLAS_CALL(cublasSetMathMode(handle, saved_math_mode));                              \
+  }
+
+LINALG_GPU_BATCH_GEMM(DgemmStridedBatched, double)
+
+#if CUDA_VERSION < 9010
+LINALG_GPU_BATCH_GEMM(SgemmStridedBatched, float)
+#else
+template <>
+inline void linalg_batch_gemm<gpu, float>(const Tensor<gpu, 3, float>& A,
+                                          const Tensor<gpu, 3, float>& B,
+                                          const Tensor<gpu, 3, float>& C,
+                                          float alpha,
+                                          float beta,
+                                          bool tA,
+                                          bool tB,
+                                          Stream<gpu>* s) {
+  using namespace mxnet;
+  using mshadow::gpu;
+  CHECK_NOTNULL(s);
+  linalg_check_batch_size(A.size(0), B.size(0), C.size(0));
+  check_gemm(A[0], B[0], C[0], alpha, beta, tA, tB);
+  auto blas_handle    = Stream<gpu>::GetBlasHandle(s);
+  bool use_tensor_ops = GetEnvAllowTensorCore() && GetEnvAllowTensorCoreConversion();
+
+  using namespace mshadow::cuda;
+  auto cublas_math_mode   = use_tensor_ops ? CUBLAS_TENSOR_OP_MATH : VERSION_ADJUSTED_TF32_MATH;
+  auto previous_math_mode = SetCublasMathMode(blas_handle, cublas_math_mode);
+
+  // cublasGemmStridedBatchedEx is only supported for GPU with architecture
+  // capabilities equal or greater than 5.0. Fall back to
+  // cublasSgemmStridedBatched, which doesn't support implicit conversion
+  // to half-precision to use TensorCores
+  auto cc_major = (s->prop).major;
+  if ((cc_major >= 5) && use_tensor_ops) {
+    CUBLAS_CALL(cublasGemmStridedBatchedEx(blas_handle,
+                                           (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
+                                           (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
+                                           C.size(2),
+                                           C.size(1),
+                                           (tB ? B.size(2) : B.size(1)),
+                                           &alpha,
+                                           B.dptr_,
+                                           CUDA_R_32F,
+                                           B.stride_,
+                                           B.size(1) * B.stride_,
+                                           A.dptr_,
+                                           CUDA_R_32F,
+                                           A.stride_,
+                                           A.size(1) * A.stride_,
+                                           &beta,
+                                           C.dptr_,
+                                           CUDA_R_32F,
+                                           C.stride_,
+                                           C.size(1) * C.stride_,
+                                           A.size(0),
+                                           CUDA_R_32F,
+                                           CUBLAS_GEMM_DEFAULT_TENSOR_OP));
+  } else {
+    CUBLAS_CALL(cublasSgemmStridedBatched(blas_handle,
+                                          (tB ? CUBLAS_OP_T : CUBLAS_OP_N),
+                                          (tA ? CUBLAS_OP_T : CUBLAS_OP_N),
+                                          C.size(2),
+                                          C.size(1),
+                                          (tB ? B.size(2) : B.size(1)),
+                                          &alpha,
+                                          B.dptr_,
+                                          B.stride_,
+                                          B.size(1) * B.stride_,
+                                          A.dptr_,
+                                          A.stride_,
+                                          A.size(1) * A.stride_,
+                                          &beta,
+                                          C.dptr_,
+                                          C.stride_,
+                                          C.size(1) * C.stride_,
+                                          A.size(0)));
+  }
+  SetCublasMathMode(blas_handle, previous_math_mode);
+}
+#endif  // CUDA_VERSION < 9010
 
 // Version where matrix rows are given by second axis.
-#define LINALG_GPU_BATCH_GEMM_AXIS(fname, DType) \
-  template<> inline \
-  void linalg_batch_gemm<gpu, DType>(const Tensor<gpu, 4, DType>& A, \
-                                     const Tensor<gpu, 4, DType>& B, \
-                                     const Tensor<gpu, 4, DType>& C, DType alpha, DType beta, \
-                                     bool tA, bool tB, Stream<gpu> *s) { \
-    using namespace mxnet; \
-    using mshadow::gpu; \
-    CHECK_NOTNULL(s); \
-    linalg_check_batch_size(A.size(0), B.size(0), C.size(0)); \
-    linalg_check_batch_size(A.size(2), B.size(2), C.size(2)); \
-    auto handle = Stream<gpu>::GetBlasHandle(s);                                           \
+#define LINALG_GPU_BATCH_GEMM_AXIS(fname, DType)                                          \
+  template <>                                                                             \
+  inline void linalg_batch_gemm<gpu, DType>(const Tensor<gpu, 4, DType>& A,               \
+                                            const Tensor<gpu, 4, DType>& B,               \
+                                            const Tensor<gpu, 4, DType>& C,               \
+                                            DType alpha,                                  \
+                                            DType beta,                                   \
+                                            bool tA,                                      \
+                                            bool tB,                                      \
+                                            Stream<gpu>* s) {                             \
+    using namespace mxnet;                                                                \
+    using mshadow::gpu;                                                                   \
+    CHECK_NOTNULL(s);                                                                     \
+    linalg_check_batch_size(A.size(0), B.size(0), C.size(0));                             \
+    linalg_check_batch_size(A.size(2), B.size(2), C.size(2));                             \
+    auto handle                  = Stream<gpu>::GetBlasHandle(s);                         \
     cublasMath_t saved_math_mode = SetCublasMathMode(handle, VERSION_ADJUSTED_TF32_MATH); \
-    for (index_t i = 0; i < A.size(2); ++i) { \
-      CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s), \
-          (tB ? CUBLAS_OP_T : CUBLAS_OP_N), \
-          (tA ? CUBLAS_OP_T : CUBLAS_OP_N), \
-          C.size(3), C.size(1), (tB ? B.size(3) : B.size(1)), &alpha, \
-          B.dptr_+i*B.stride_, B.size(2) * B.stride_, B.size(1)*B.size(2)*B.stride_, \
-          A.dptr_+i*A.stride_, A.size(2) * A.stride_, A.size(1)*A.size(2)*A.stride_, &beta, \
-          C.dptr_+i*C.stride_, C.size(2) * C.stride_, C.size(1)*C.size(2)*C.stride_, A.size(0))) \
-    }\
-    SetCublasMathMode(handle, saved_math_mode); \
+    for (index_t i = 0; i < A.size(2); ++i) {                                             \
+      CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),                            \
+                                (tB ? CUBLAS_OP_T : CUBLAS_OP_N),                         \
+                                (tA ? CUBLAS_OP_T : CUBLAS_OP_N),                         \
+                                C.size(3),                                                \
+                                C.size(1),                                                \
+                                (tB ? B.size(3) : B.size(1)),                             \
+                                &alpha,                                                   \
+                                B.dptr_ + i * B.stride_,                                  \
+                                B.size(2) * B.stride_,                                    \
+                                B.size(1) * B.size(2) * B.stride_,                        \
+                                A.dptr_ + i * A.stride_,                                  \
+                                A.size(2) * A.stride_,                                    \
+                                A.size(1) * A.size(2) * A.stride_,                        \
+                                &beta,                                                    \
+                                C.dptr_ + i * C.stride_,                                  \
+                                C.size(2) * C.stride_,                                    \
+                                C.size(1) * C.size(2) * C.stride_,                        \
+                                A.size(0)))                                               \
+    }                                                                                     \
+    SetCublasMathMode(handle, saved_math_mode);                                           \
   }
 
-  LINALG_GPU_BATCH_GEMM_AXIS(SgemmStridedBatched, float)
-  LINALG_GPU_BATCH_GEMM_AXIS(DgemmStridedBatched, double)
+LINALG_GPU_BATCH_GEMM_AXIS(SgemmStridedBatched, float)
+LINALG_GPU_BATCH_GEMM_AXIS(DgemmStridedBatched, double)
 
 #endif  // CUDA < 8000
 
@@ -468,11 +647,13 @@ void linalg_gemm<gpu, mshadow::half::half_t>(const Tensor<gpu, 2, mshadow::half:
  * \param s the stream to perform the operation
  * \param req the assignment request
  */
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 inline void linalg_gemm(const Tensor<xpu, 2, DType>& A,
                         const Tensor<xpu, 2, DType>& B,
                         const Tensor<xpu, 2, DType>& C,
-                        bool tA, bool tB, Stream<xpu> *s,
+                        bool tA,
+                        bool tB,
+                        Stream<xpu>* s,
                         mxnet::OpReqType req) {
   using namespace mxnet;
   switch (req) {
@@ -493,53 +674,55 @@ inline void linalg_gemm(const Tensor<xpu, 2, DType>& A,
 #if (MSHADOW_USE_CBLAS == 0 && MSHADOW_USE_MKL == 0)
 
 // A template for a cpu linalg_gemm implementation using mshadow::dot()
-#define LINALG_CPU_GEMM_NO_CBLAS(DType) \
-template<> inline \
-void linalg_gemm<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                             const Tensor<cpu, 2, DType>& B, \
-                             const Tensor<cpu, 2, DType>& C, \
-                             bool tA, bool tB, Stream<cpu> *s, \
-                             mxnet::OpReqType req) { \
-  using namespace mxnet; \
-  using mshadow::cpu; \
-  switch (req) { \
-    case kNullOp: \
-      break; \
-    case kWriteTo: \
-    case kWriteInplace: \
-      if (tA) { \
-        if (tB) { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A.T(), B.T()); \
-        } else { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A.T(), B); \
-        } \
-      } else { \
-        if (tB) { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A, B.T()); \
-        } else { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A, B); \
-        } \
-      } \
-      break; \
-    case kAddTo: \
-      if (tA) { \
-        if (tB) { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A.T(), B.T()); \
-        } else { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A.T(), B); \
-        } \
-      } else { \
-        if (tB) { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A, B.T()); \
-        } else { \
-          const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A, B); \
-        } \
-      } \
-      break; \
-    default: \
-      LOG(FATAL) << "not reached"; \
-  } \
-}
+#define LINALG_CPU_GEMM_NO_CBLAS(DType)                                 \
+  template <>                                                           \
+  inline void linalg_gemm<cpu, DType>(const Tensor<cpu, 2, DType>& A,   \
+                                      const Tensor<cpu, 2, DType>& B,   \
+                                      const Tensor<cpu, 2, DType>& C,   \
+                                      bool tA,                          \
+                                      bool tB,                          \
+                                      Stream<cpu>* s,                   \
+                                      mxnet::OpReqType req) {           \
+    using namespace mxnet;                                              \
+    using mshadow::cpu;                                                 \
+    switch (req) {                                                      \
+      case kNullOp:                                                     \
+        break;                                                          \
+      case kWriteTo:                                                    \
+      case kWriteInplace:                                               \
+        if (tA) {                                                       \
+          if (tB) {                                                     \
+            const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A.T(), B.T());  \
+          } else {                                                      \
+            const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A.T(), B);      \
+          }                                                             \
+        } else {                                                        \
+          if (tB) {                                                     \
+            const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A, B.T());      \
+          } else {                                                      \
+            const_cast<Tensor<cpu, 2, DType>&>(C) = dot(A, B);          \
+          }                                                             \
+        }                                                               \
+        break;                                                          \
+      case kAddTo:                                                      \
+        if (tA) {                                                       \
+          if (tB) {                                                     \
+            const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A.T(), B.T()); \
+          } else {                                                      \
+            const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A.T(), B);     \
+          }                                                             \
+        } else {                                                        \
+          if (tB) {                                                     \
+            const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A, B.T());     \
+          } else {                                                      \
+            const_cast<Tensor<cpu, 2, DType>&>(C) += dot(A, B);         \
+          }                                                             \
+        }                                                               \
+        break;                                                          \
+      default:                                                          \
+        LOG(FATAL) << "not reached";                                    \
+    }                                                                   \
+  }
 
 LINALG_CPU_GEMM_NO_CBLAS(float)
 LINALG_CPU_GEMM_NO_CBLAS(double)
@@ -552,56 +735,87 @@ LINALG_CPU_GEMM_NO_CBLAS(double)
 // for further information about the function and its parameters.
 // Note that this is B = trsm(A,B), so B is input and output parameter.
 
-template<typename xpu, typename DType>
-inline void check_trsm(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                DType alpha, bool rightside, bool lower, bool transpose) {
+template <typename xpu, typename DType>
+inline void check_trsm(const Tensor<xpu, 2, DType>& A,
+                       const Tensor<xpu, 2, DType>& B,
+                       DType alpha,
+                       bool rightside,
+                       bool lower,
+                       bool transpose) {
   // Any checking that helps user debug potential problems.
-  CHECK_EQ(A.size(0), A.size(1))
-    << "First input of trsm is not a square matrix.";
+  CHECK_EQ(A.size(0), A.size(1)) << "First input of trsm is not a square matrix.";
   CHECK(!rightside || (B.size(1) == A.size(0)))
-    << "Non compatible matrix dimensions between inputs A and B for trsm";
+      << "Non compatible matrix dimensions between inputs A and B for trsm";
   CHECK(rightside || (B.size(0) == A.size(1)))
-    << "Non compatible matrix dimensions between inputs A and B for trsm";
+      << "Non compatible matrix dimensions between inputs A and B for trsm";
 }
 
 #if (MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1)
 
-#define LINALG_CPU_TRSM(fname, DType) \
-template<> inline \
-void linalg_trsm<cpu, DType>(const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 2, DType>& B, \
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<cpu> *s) { \
-  check_trsm(A, B, alpha, rightside, lower, transpose); \
-  cblas_##fname(CblasRowMajor, (rightside ? CblasRight : CblasLeft), \
-                (lower ? CblasLower : CblasUpper), (transpose ? CblasTrans : CblasNoTrans), \
-                CblasNonUnit, B.size(0), B.size(1), alpha, A.dptr_, \
-                A.stride_, B.dptr_, B.stride_); \
-}
+#define LINALG_CPU_TRSM(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_trsm<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                      const Tensor<cpu, 2, DType>& B, \
+                                      DType alpha,                    \
+                                      bool rightside,                 \
+                                      bool lower,                     \
+                                      bool transpose,                 \
+                                      Stream<cpu>* s) {               \
+    check_trsm(A, B, alpha, rightside, lower, transpose);             \
+    cblas_##fname(CblasRowMajor,                                      \
+                  (rightside ? CblasRight : CblasLeft),               \
+                  (lower ? CblasLower : CblasUpper),                  \
+                  (transpose ? CblasTrans : CblasNoTrans),            \
+                  CblasNonUnit,                                       \
+                  B.size(0),                                          \
+                  B.size(1),                                          \
+                  alpha,                                              \
+                  A.dptr_,                                            \
+                  A.stride_,                                          \
+                  B.dptr_,                                            \
+                  B.stride_);                                         \
+  }
 
-#define LINALG_XPU_BATCH_TRSM(xpu, DType) \
-template<> inline \
-void linalg_batch_trsm<xpu, DType>(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B, \
-                   DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s) { \
-  linalg_check_batch_size(A.size(0), B.size(0), B.size(0)); \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_trsm(A[i], B[i], alpha, rightside, lower, transpose, s); \
-  } \
-}
+#define LINALG_XPU_BATCH_TRSM(xpu, DType)                                   \
+  template <>                                                               \
+  inline void linalg_batch_trsm<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
+                                            const Tensor<xpu, 3, DType>& B, \
+                                            DType alpha,                    \
+                                            bool rightside,                 \
+                                            bool lower,                     \
+                                            bool transpose,                 \
+                                            Stream<xpu>* s) {               \
+    linalg_check_batch_size(A.size(0), B.size(0), B.size(0));               \
+    for (index_t i = 0; i < A.size(0); ++i) {                               \
+      linalg_trsm(A[i], B[i], alpha, rightside, lower, transpose, s);       \
+    }                                                                       \
+  }
 
 #else
 
-#define LINALG_CPU_TRSM(fname, DType) \
-template<> inline \
-void linalg_trsm<cpu, DType>(const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 2, DType>& B, \
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<cpu> *s) { \
-  LOG(FATAL) << "linalg_trsm not implemented, needs cblas!"; \
-}
+#define LINALG_CPU_TRSM(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_trsm<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                      const Tensor<cpu, 2, DType>& B, \
+                                      DType alpha,                    \
+                                      bool rightside,                 \
+                                      bool lower,                     \
+                                      bool transpose,                 \
+                                      Stream<cpu>* s) {               \
+    LOG(FATAL) << "linalg_trsm not implemented, needs cblas!";        \
+  }
 
-#define LINALG_XPU_BATCH_TRSM(xpu, DType) \
-template<> inline \
-void linalg_batch_trsm<xpu, DType>(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B, \
-                   DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s) { \
-  LOG(FATAL) << "linalg_batch_trsm not implemented, needs cblas!"; \
-}
+#define LINALG_XPU_BATCH_TRSM(xpu, DType)                                   \
+  template <>                                                               \
+  inline void linalg_batch_trsm<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
+                                            const Tensor<xpu, 3, DType>& B, \
+                                            DType alpha,                    \
+                                            bool rightside,                 \
+                                            bool lower,                     \
+                                            bool transpose,                 \
+                                            Stream<xpu>* s) {               \
+    LOG(FATAL) << "linalg_batch_trsm not implemented, needs cblas!";        \
+  }
 
 #endif  // MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1
 
@@ -615,21 +829,32 @@ LINALG_XPU_BATCH_TRSM(cpu, double)
 
 // cublas col-major processing accounted for by switching sides and fill mode
 
-#define LINALG_GPU_TRSM(fname, DType) \
-template<> inline \
-void linalg_trsm<gpu, DType>(const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 2, DType>& B, \
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_trsm(A, B, alpha, rightside, lower, transpose); \
-  CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s), \
-                            (rightside ? CUBLAS_SIDE_LEFT : CUBLAS_SIDE_RIGHT), \
-                            (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
-                            (transpose ? CUBLAS_OP_T : CUBLAS_OP_N), \
-                            CUBLAS_DIAG_NON_UNIT, B.size(1), B.size(0), &alpha, \
-                            A.dptr_, A.stride_, B.dptr_, B.stride_)); \
-}
+#define LINALG_GPU_TRSM(fname, DType)                                                    \
+  template <>                                                                            \
+  inline void linalg_trsm<gpu, DType>(const Tensor<gpu, 2, DType>& A,                    \
+                                      const Tensor<gpu, 2, DType>& B,                    \
+                                      DType alpha,                                       \
+                                      bool rightside,                                    \
+                                      bool lower,                                        \
+                                      bool transpose,                                    \
+                                      Stream<gpu>* s) {                                  \
+    using namespace mxnet;                                                               \
+    using mshadow::gpu;                                                                  \
+    CHECK_NOTNULL(s);                                                                    \
+    check_trsm(A, B, alpha, rightside, lower, transpose);                                \
+    CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),                             \
+                              (rightside ? CUBLAS_SIDE_LEFT : CUBLAS_SIDE_RIGHT),        \
+                              (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
+                              (transpose ? CUBLAS_OP_T : CUBLAS_OP_N),                   \
+                              CUBLAS_DIAG_NON_UNIT,                                      \
+                              B.size(1),                                                 \
+                              B.size(0),                                                 \
+                              &alpha,                                                    \
+                              A.dptr_,                                                   \
+                              A.stride_,                                                 \
+                              B.dptr_,                                                   \
+                              B.stride_));                                               \
+  }
 LINALG_GPU_TRSM(Strsm, float)
 LINALG_GPU_TRSM(Dtrsm, double)
 
@@ -644,51 +869,77 @@ LINALG_XPU_BATCH_TRSM(gpu, double)
 // for further information about the function and its parameters.
 // Note that this is B = trmm(A,B), so B is input and output parameter.
 
-template<typename xpu, typename DType>
-inline void check_trmm(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                DType alpha, bool rightside, bool lower, bool transpose) {
+template <typename xpu, typename DType>
+inline void check_trmm(const Tensor<xpu, 2, DType>& A,
+                       const Tensor<xpu, 2, DType>& B,
+                       DType alpha,
+                       bool rightside,
+                       bool lower,
+                       bool transpose) {
   // Any checking that helps user debug potential problems.
-  CHECK_EQ(A.size(0), A.size(1))
-    << "First input of trmm is not a square matrix.";
+  CHECK_EQ(A.size(0), A.size(1)) << "First input of trmm is not a square matrix.";
   CHECK(!rightside || (B.size(1) == A.size(0)))
-    << "Non compatible matrix dimensions between inputs A and B for trmm";
+      << "Non compatible matrix dimensions between inputs A and B for trmm";
   CHECK(rightside || (B.size(0) == A.size(1)))
-    << "Non compatible matrix dimensions between inputs A and B for trmm";
+      << "Non compatible matrix dimensions between inputs A and B for trmm";
 }
 
 #if (MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1)
 
-#define LINALG_CPU_TRMM(fname, DType) \
-template<> inline \
-void linalg_trmm<cpu, DType>(const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 2, DType>& B, \
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<cpu> *s) { \
-  check_trmm(A, B, alpha, rightside, lower, transpose); \
-  cblas_##fname(CblasRowMajor, (rightside ? CblasRight : CblasLeft), \
-                (lower ? CblasLower : CblasUpper), (transpose ? CblasTrans : CblasNoTrans), \
-                CblasNonUnit, B.size(0), B.size(1), alpha, A.dptr_, \
-                A.stride_, B.dptr_, B.stride_); \
-}
+#define LINALG_CPU_TRMM(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_trmm<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                      const Tensor<cpu, 2, DType>& B, \
+                                      DType alpha,                    \
+                                      bool rightside,                 \
+                                      bool lower,                     \
+                                      bool transpose,                 \
+                                      Stream<cpu>* s) {               \
+    check_trmm(A, B, alpha, rightside, lower, transpose);             \
+    cblas_##fname(CblasRowMajor,                                      \
+                  (rightside ? CblasRight : CblasLeft),               \
+                  (lower ? CblasLower : CblasUpper),                  \
+                  (transpose ? CblasTrans : CblasNoTrans),            \
+                  CblasNonUnit,                                       \
+                  B.size(0),                                          \
+                  B.size(1),                                          \
+                  alpha,                                              \
+                  A.dptr_,                                            \
+                  A.stride_,                                          \
+                  B.dptr_,                                            \
+                  B.stride_);                                         \
+  }
 
 #else
 
-#define LINALG_CPU_TRMM(fname, DType) \
-template<> inline \
-void linalg_trmm<cpu, DType>(const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 2, DType>& B, \
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<cpu> *s) { \
-  LOG(FATAL) << "linalg_trmm not implemented, needs cblas!"; \
-}
+#define LINALG_CPU_TRMM(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_trmm<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                      const Tensor<cpu, 2, DType>& B, \
+                                      DType alpha,                    \
+                                      bool rightside,                 \
+                                      bool lower,                     \
+                                      bool transpose,                 \
+                                      Stream<cpu>* s) {               \
+    LOG(FATAL) << "linalg_trmm not implemented, needs cblas!";        \
+  }
 
 #endif  // MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1
 
-#define LINALG_XPU_BATCH_TRMM(xpu, DType) \
-template<> inline \
-void linalg_batch_trmm<xpu, DType>(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B, \
-                    DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s) { \
-  linalg_check_batch_size(A.size(0), B.size(0), B.size(0)); \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_trmm(A[i], B[i], alpha, rightside, lower, transpose, s); \
-  } \
-}
+#define LINALG_XPU_BATCH_TRMM(xpu, DType)                                   \
+  template <>                                                               \
+  inline void linalg_batch_trmm<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
+                                            const Tensor<xpu, 3, DType>& B, \
+                                            DType alpha,                    \
+                                            bool rightside,                 \
+                                            bool lower,                     \
+                                            bool transpose,                 \
+                                            Stream<xpu>* s) {               \
+    linalg_check_batch_size(A.size(0), B.size(0), B.size(0));               \
+    for (index_t i = 0; i < A.size(0); ++i) {                               \
+      linalg_trmm(A[i], B[i], alpha, rightside, lower, transpose, s);       \
+    }                                                                       \
+  }
 
 LINALG_CPU_TRMM(strmm, float)
 LINALG_CPU_TRMM(dtrmm, double)
@@ -700,22 +951,34 @@ LINALG_XPU_BATCH_TRMM(cpu, double)
 
 // cublas col-major processing accounted for by switching sides and fill mode
 // doing in-place computation by supplying B as second and third matrix
-#define LINALG_GPU_TRMM(fname, DType) \
-template<> inline \
-void linalg_trmm<gpu, DType>(const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 2, DType>& B, \
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_trmm(A, B, alpha, rightside, lower, transpose); \
-  CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s), \
-                            (rightside ? CUBLAS_SIDE_LEFT : CUBLAS_SIDE_RIGHT), \
-                            (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
-                            (transpose ? CUBLAS_OP_T : CUBLAS_OP_N), \
-                            CUBLAS_DIAG_NON_UNIT, B.size(1), B.size(0), &alpha, \
-                            A.dptr_, A.stride_, B.dptr_, B.stride_, \
-                            B.dptr_, B.stride_)); \
-}
+#define LINALG_GPU_TRMM(fname, DType)                                                    \
+  template <>                                                                            \
+  inline void linalg_trmm<gpu, DType>(const Tensor<gpu, 2, DType>& A,                    \
+                                      const Tensor<gpu, 2, DType>& B,                    \
+                                      DType alpha,                                       \
+                                      bool rightside,                                    \
+                                      bool lower,                                        \
+                                      bool transpose,                                    \
+                                      Stream<gpu>* s) {                                  \
+    using namespace mxnet;                                                               \
+    using mshadow::gpu;                                                                  \
+    CHECK_NOTNULL(s);                                                                    \
+    check_trmm(A, B, alpha, rightside, lower, transpose);                                \
+    CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),                             \
+                              (rightside ? CUBLAS_SIDE_LEFT : CUBLAS_SIDE_RIGHT),        \
+                              (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
+                              (transpose ? CUBLAS_OP_T : CUBLAS_OP_N),                   \
+                              CUBLAS_DIAG_NON_UNIT,                                      \
+                              B.size(1),                                                 \
+                              B.size(0),                                                 \
+                              &alpha,                                                    \
+                              A.dptr_,                                                   \
+                              A.stride_,                                                 \
+                              B.dptr_,                                                   \
+                              B.stride_,                                                 \
+                              B.dptr_,                                                   \
+                              B.stride_));                                               \
+  }
 LINALG_GPU_TRMM(Strmm, float)
 LINALG_GPU_TRMM(Dtrmm, double)
 
@@ -730,95 +993,107 @@ LINALG_XPU_BATCH_TRMM(gpu, double)
 // for further information about the function and its parameters.
 // Note that this is A = potrf(A), so A is input and output parameter.
 
-static const char *potrf_errstr
-  = "This may happen when the input matrix is either not symmetric or not positive definite.";
+static const char* potrf_errstr =
+    "This may happen when the input matrix is either not symmetric or not positive definite.";
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 inline void check_potrf(const Tensor<xpu, 2, DType>& A, bool lower) {
   // Any checking that helps user debug potential problems.
-  CHECK_EQ(A.size(0), A.size(1))
-    << "No square matrix as input to potrf.";
+  CHECK_EQ(A.size(0), A.size(1)) << "No square matrix as input to potrf.";
 }
 
-#define LINALG_CPU_POTRF(fname, DType) \
-template<> inline \
-void linalg_potrf<cpu, DType>(const Tensor<cpu, 2, DType>& A, bool lower, Stream<cpu> *s) { \
-  check_potrf(A, lower); \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, (lower ? 'L' : 'U'), A.size(0),  \
-          A.dptr_ , A.stride_)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu. " << potrf_errstr; \
-}
+#define LINALG_CPU_POTRF(fname, DType)                                                \
+  template <>                                                                         \
+  inline void linalg_potrf<cpu, DType>(                                               \
+      const Tensor<cpu, 2, DType>& A, bool lower, Stream<cpu>* s) {                   \
+    check_potrf(A, lower);                                                            \
+    int ret(MXNET_LAPACK_##fname(                                                     \
+        MXNET_LAPACK_ROW_MAJOR, (lower ? 'L' : 'U'), A.size(0), A.dptr_, A.stride_)); \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu. " << potrf_errstr;       \
+  }
 LINALG_CPU_POTRF(spotrf, float)
 LINALG_CPU_POTRF(dpotrf, double)
 
-#define LINALG_CPU_BATCH_POTRF(DType) \
-template<> inline \
-void linalg_batch_potrf<cpu, DType>(const Tensor<cpu, 3, DType>& A, bool lower, Stream<cpu> *s) { \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_potrf(A[i], lower); \
-  } \
-}
+#define LINALG_CPU_BATCH_POTRF(DType)                               \
+  template <>                                                       \
+  inline void linalg_batch_potrf<cpu, DType>(                       \
+      const Tensor<cpu, 3, DType>& A, bool lower, Stream<cpu>* s) { \
+    for (index_t i = 0; i < A.size(0); ++i) {                       \
+      linalg_potrf(A[i], lower);                                    \
+    }                                                               \
+  }
 LINALG_CPU_BATCH_POTRF(float)
 LINALG_CPU_BATCH_POTRF(double)
 
 #if defined(__CUDACC__) && MXNET_USE_CUSOLVER == 1
 
-#define LINALG_GPU_BUFFSIZE_POTRF(fname, DType) \
-inline int linalg_potrf_buffsize(const Tensor<gpu, 2, DType>& A, bool lower, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  int buffsize(0); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                                (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
-                                 A.size(0), A.dptr_, A.stride_, &buffsize)); \
-  return buffsize;  \
-}
+#define LINALG_GPU_BUFFSIZE_POTRF(fname, DType)                                                  \
+  inline int linalg_potrf_buffsize(const Tensor<gpu, 2, DType>& A, bool lower, Stream<gpu>* s) { \
+    using namespace mxnet;                                                                       \
+    using mshadow::gpu;                                                                          \
+    CHECK_NOTNULL(s);                                                                            \
+    int buffsize(0);                                                                             \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                               \
+                                  (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER),     \
+                                  A.size(0),                                                     \
+                                  A.dptr_,                                                       \
+                                  A.stride_,                                                     \
+                                  &buffsize));                                                   \
+    return buffsize;                                                                             \
+  }
 LINALG_GPU_BUFFSIZE_POTRF(DnSpotrf_bufferSize, float)
 LINALG_GPU_BUFFSIZE_POTRF(DnDpotrf_bufferSize, double)
 
-#define LINALG_GPU_POTRF(fname, DType) \
-template<> inline \
-void linalg_potrf<gpu, DType>(const Tensor<gpu, 2, DType>& A, bool lower, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_potrf(A, lower); \
-  int buffsize(linalg_potrf_buffsize(A, lower, s)); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_potrf, buffer, \
-      DType, buffsize); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_potrf, info, int, 1); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
-                A.size(0), A.dptr_, A.stride_, static_cast<DType *>(buffer.dptr), buffsize, \
-                static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(buffer); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_POTRF(fname, DType)                                                       \
+  template <>                                                                                \
+  inline void linalg_potrf<gpu, DType>(                                                      \
+      const Tensor<gpu, 2, DType>& A, bool lower, Stream<gpu>* s) {                          \
+    using namespace mxnet;                                                                   \
+    using mshadow::gpu;                                                                      \
+    CHECK_NOTNULL(s);                                                                        \
+    check_potrf(A, lower);                                                                   \
+    int buffsize(linalg_potrf_buffsize(A, lower, s));                                        \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_potrf, buffer, DType, buffsize);                      \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_potrf, info, int, 1);                                 \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                           \
+                                  (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
+                                  A.size(0),                                                 \
+                                  A.dptr_,                                                   \
+                                  A.stride_,                                                 \
+                                  static_cast<DType*>(buffer.dptr),                          \
+                                  buffsize,                                                  \
+                                  static_cast<int*>(info.dptr)));                            \
+    Storage::Get()->Free(buffer);                                                            \
+    Storage::Get()->Free(info);                                                              \
+  }
 LINALG_GPU_POTRF(DnSpotrf, float)
 LINALG_GPU_POTRF(DnDpotrf, double)
 
-#define LINALG_GPU_BATCH_POTRF(fname, DType) \
-template<> inline \
-void linalg_batch_potrf<gpu, DType>(const Tensor<gpu, 3, DType>& A, bool lower, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  CHECK_GT(A.size(0), 0); \
-  check_potrf(A[0], lower); \
-  int buffsize(linalg_potrf_buffsize(A[0], lower, s)); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_potrf, buffer, \
-      DType, buffsize); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_potrf, info, int, 1); \
-  for (mshadow::index_t i = 0; i < A.size(0); ++i) { \
-    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                 (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
-                 A[i].size(0), A[i].dptr_, A[i].stride_, \
-                 static_cast<DType *>(buffer.dptr), buffsize, static_cast<int *>(info.dptr))); \
-  } \
-  Storage::Get()->Free(buffer); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_BATCH_POTRF(fname, DType)                                                   \
+  template <>                                                                                  \
+  inline void linalg_batch_potrf<gpu, DType>(                                                  \
+      const Tensor<gpu, 3, DType>& A, bool lower, Stream<gpu>* s) {                            \
+    using namespace mxnet;                                                                     \
+    using mshadow::gpu;                                                                        \
+    CHECK_NOTNULL(s);                                                                          \
+    CHECK_GT(A.size(0), 0);                                                                    \
+    check_potrf(A[0], lower);                                                                  \
+    int buffsize(linalg_potrf_buffsize(A[0], lower, s));                                       \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_potrf, buffer, DType, buffsize);                  \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_potrf, info, int, 1);                             \
+    for (mshadow::index_t i = 0; i < A.size(0); ++i) {                                         \
+      CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                           \
+                                    (lower ? CUBLAS_FILL_MODE_UPPER : CUBLAS_FILL_MODE_LOWER), \
+                                    A[i].size(0),                                              \
+                                    A[i].dptr_,                                                \
+                                    A[i].stride_,                                              \
+                                    static_cast<DType*>(buffer.dptr),                          \
+                                    buffsize,                                                  \
+                                    static_cast<int*>(info.dptr)));                            \
+    }                                                                                          \
+    Storage::Get()->Free(buffer);                                                              \
+    Storage::Get()->Free(info);                                                                \
+  }
 LINALG_GPU_BATCH_POTRF(DnSpotrf, float)
 LINALG_GPU_BATCH_POTRF(DnDpotrf, double)
 
@@ -830,96 +1105,98 @@ LINALG_GPU_BATCH_POTRF(DnDpotrf, double)
 // for further information about the function and its parameters.
 // Note that this is A = potri(A), so A is input and output parameter.
 
-static const char *potri_errstr
-  = "This may happen when the input matrix is not a Cholesky factorization obtained"
+static const char* potri_errstr =
+    "This may happen when the input matrix is not a Cholesky factorization obtained"
     " by a prior call of the potrf-operator.";
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 inline void check_potri(const Tensor<xpu, 2, DType>& A, bool lower) {
   // Any checking that helps user debug potential problems.
   CHECK_EQ(A.size(0), A.size(1)) << "No square matrix as input to potri.";
 }
 
-#define LINALG_CPU_POTRI(fname, DType) \
-template<> inline \
-void linalg_potri<cpu, DType>(const Tensor<cpu, 2, DType>& A, bool lower, Stream<cpu> *s) { \
-  check_potri(A, lower); \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, (lower ? 'L' : 'U'), A.size(0),  \
-          A.dptr_ , A.stride_)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu. " << potri_errstr; \
-}
+#define LINALG_CPU_POTRI(fname, DType)                                                \
+  template <>                                                                         \
+  inline void linalg_potri<cpu, DType>(                                               \
+      const Tensor<cpu, 2, DType>& A, bool lower, Stream<cpu>* s) {                   \
+    check_potri(A, lower);                                                            \
+    int ret(MXNET_LAPACK_##fname(                                                     \
+        MXNET_LAPACK_ROW_MAJOR, (lower ? 'L' : 'U'), A.size(0), A.dptr_, A.stride_)); \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu. " << potri_errstr;       \
+  }
 LINALG_CPU_POTRI(spotri, float)
 LINALG_CPU_POTRI(dpotri, double)
 
-#define LINALG_CPU_BATCH_POTRI(DType) \
-template<> inline \
-void linalg_batch_potri<cpu, DType>(const Tensor<cpu, 3, DType>& A, bool lower, Stream<cpu> *s) { \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_potri(A[i], lower); \
-  } \
-}
+#define LINALG_CPU_BATCH_POTRI(DType)                               \
+  template <>                                                       \
+  inline void linalg_batch_potri<cpu, DType>(                       \
+      const Tensor<cpu, 3, DType>& A, bool lower, Stream<cpu>* s) { \
+    for (index_t i = 0; i < A.size(0); ++i) {                       \
+      linalg_potri(A[i], lower);                                    \
+    }                                                               \
+  }
 LINALG_CPU_BATCH_POTRI(float)
 LINALG_CPU_BATCH_POTRI(double)
 
 #ifdef __CUDACC__
 
 // Initializes multiple identity matrices on the same vector.
-template<typename DType>
-__global__ void linalgInitIdentityGPU(DType *a, int stride, int lda, int N) {
-    for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < N; i += blockDim.x * gridDim.x) {
-      // index relative to the matrix.
-      int index(i % stride);
-      a[i] = (index / lda == index % lda ? DType(1.0) : DType(0));
-    }
+template <typename DType>
+__global__ void linalgInitIdentityGPU(DType* a, int stride, int lda, int N) {
+  for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < N; i += blockDim.x * gridDim.x) {
+    // index relative to the matrix.
+    int index(i % stride);
+    a[i] = (index / lda == index % lda ? DType(1.0) : DType(0));
+  }
 }
 
 // There is no direct support for potri in cuda. We emulate the function by two calls to trsm.
-#define LINALG_GPU_POTRI(DType) \
-template<> inline \
-void linalg_potri<gpu, DType>(const Tensor<gpu, 2, DType>& A, bool lower, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  CHECK_NOTNULL(s); \
-  check_potri(A, lower); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_potri, buffer, \
-      DType, A.MSize()); \
-  using namespace mshadow::cuda; \
-  int ngrid = std::min(kMaxGridNum, \
-                       static_cast<int>((A.MSize() + kBaseThreadNum - 1) / kBaseThreadNum)); \
-  linalgInitIdentityGPU<<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>> \
-    (static_cast<DType *>(buffer.dptr), A.MSize(), A.stride_, A.MSize());  \
-  MSHADOW_CUDA_POST_KERNEL_CHECK(linalgInitIdentityGPU); \
-  Tensor<gpu, 2, DType> B((DType *)buffer.dptr, A.shape_, A.stride_, s); \
-  linalg_trsm(A, B, DType(1.0), false, lower, !lower, s); \
-  linalg_trsm(A, B, DType(1.0), false, lower, lower, s); \
-  Copy(A, B, s); \
-  B.dptr_ = 0; \
-  Storage::Get()->Free(buffer); \
-}
+#define LINALG_GPU_POTRI(DType)                                                                \
+  template <>                                                                                  \
+  inline void linalg_potri<gpu, DType>(                                                        \
+      const Tensor<gpu, 2, DType>& A, bool lower, Stream<gpu>* s) {                            \
+    using namespace mxnet;                                                                     \
+    CHECK_NOTNULL(s);                                                                          \
+    check_potri(A, lower);                                                                     \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_potri, buffer, DType, A.MSize());                       \
+    using namespace mshadow::cuda;                                                             \
+    int ngrid = std::min(kMaxGridNum,                                                          \
+                         static_cast<int>((A.MSize() + kBaseThreadNum - 1) / kBaseThreadNum)); \
+    linalgInitIdentityGPU<<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(   \
+        static_cast<DType*>(buffer.dptr), A.MSize(), A.stride_, A.MSize());                    \
+    MSHADOW_CUDA_POST_KERNEL_CHECK(linalgInitIdentityGPU);                                     \
+    Tensor<gpu, 2, DType> B((DType*)buffer.dptr, A.shape_, A.stride_, s);                      \
+    linalg_trsm(A, B, DType(1.0), false, lower, !lower, s);                                    \
+    linalg_trsm(A, B, DType(1.0), false, lower, lower, s);                                     \
+    Copy(A, B, s);                                                                             \
+    B.dptr_ = 0;                                                                               \
+    Storage::Get()->Free(buffer);                                                              \
+  }
 LINALG_GPU_POTRI(float)
 LINALG_GPU_POTRI(double)
 
-#define LINALG_GPU_BATCH_POTRI(DType) \
-template<> inline \
-void linalg_batch_potri<gpu, DType>(const Tensor<gpu, 3, DType>& A, bool lower, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  CHECK_NOTNULL(s); \
-  CHECK_GT(A.size(0), 0); \
-  check_potri(A[0], lower); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_potri, buffer, \
-      DType, A.MSize()); \
-  using namespace mshadow::cuda; \
-  int ngrid = std::min(kMaxGridNum, \
-                       static_cast<int>((A.MSize() + kBaseThreadNum - 1) / kBaseThreadNum)); \
-  linalgInitIdentityGPU<<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>> \
-    (static_cast<DType *>(buffer.dptr), A.size(1)*A.stride_, A.stride_, A.MSize()); \
-  MSHADOW_CUDA_POST_KERNEL_CHECK(linalgInitIdentityGPU); \
-  Tensor<gpu, 3, DType> B((DType *)buffer.dptr, A.shape_, A.stride_, s); \
-  linalg_batch_trsm(A, B, DType(1.0), false, lower, !lower, s); \
-  linalg_batch_trsm(A, B, DType(1.0), false, lower, lower, s); \
-  Copy(A, B, s); \
-  B.dptr_ = 0; \
-  Storage::Get()->Free(buffer); \
-}
+#define LINALG_GPU_BATCH_POTRI(DType)                                                          \
+  template <>                                                                                  \
+  inline void linalg_batch_potri<gpu, DType>(                                                  \
+      const Tensor<gpu, 3, DType>& A, bool lower, Stream<gpu>* s) {                            \
+    using namespace mxnet;                                                                     \
+    CHECK_NOTNULL(s);                                                                          \
+    CHECK_GT(A.size(0), 0);                                                                    \
+    check_potri(A[0], lower);                                                                  \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_potri, buffer, DType, A.MSize());                 \
+    using namespace mshadow::cuda;                                                             \
+    int ngrid = std::min(kMaxGridNum,                                                          \
+                         static_cast<int>((A.MSize() + kBaseThreadNum - 1) / kBaseThreadNum)); \
+    linalgInitIdentityGPU<<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(   \
+        static_cast<DType*>(buffer.dptr), A.size(1) * A.stride_, A.stride_, A.MSize());        \
+    MSHADOW_CUDA_POST_KERNEL_CHECK(linalgInitIdentityGPU);                                     \
+    Tensor<gpu, 3, DType> B((DType*)buffer.dptr, A.shape_, A.stride_, s);                      \
+    linalg_batch_trsm(A, B, DType(1.0), false, lower, !lower, s);                              \
+    linalg_batch_trsm(A, B, DType(1.0), false, lower, lower, s);                               \
+    Copy(A, B, s);                                                                             \
+    B.dptr_ = 0;                                                                               \
+    Storage::Get()->Free(buffer);                                                              \
+  }
 LINALG_GPU_BATCH_POTRI(float)
 LINALG_GPU_BATCH_POTRI(double)
 
@@ -931,51 +1208,70 @@ LINALG_GPU_BATCH_POTRI(double)
 // for further information about the function and its parameters.
 // Note that this is B = syrk(A, B), so B is input and output parameter.
 
-template<typename xpu, typename DType> inline
-void check_syrk(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B,
-                DType alpha, DType beta, bool tA) {
+template <typename xpu, typename DType>
+inline void check_syrk(const Tensor<xpu, 2, DType>& A,
+                       const Tensor<xpu, 2, DType>& B,
+                       DType alpha,
+                       DType beta,
+                       bool tA) {
   // Any checking that helps user debug potential problems.
-  CHECK_EQ(B.size(0), B.size(1))
-    << "B must be square symmetric matrix for syrk";
+  CHECK_EQ(B.size(0), B.size(1)) << "B must be square symmetric matrix for syrk";
   CHECK_EQ((tA ? A.size(1) : A.size(0)), B.size(0))
-    << "Non compatible matrix dimensions between inputs A and B for syrk";
+      << "Non compatible matrix dimensions between inputs A and B for syrk";
 }
 
 #if (MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1)
 
-#define LINALG_CPU_SYRK(fname, DType) \
-template<> inline \
-void linalg_syrk<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                             const Tensor<cpu, 2, DType>& B, DType alpha, \
-                             DType beta, bool tA, Stream<cpu> *s) { \
-  check_syrk(A, B, alpha, beta, tA); \
-  cblas_##fname(CblasRowMajor, CblasLower, (tA ? CblasTrans : CblasNoTrans), \
-                B.size(0), (tA ? A.size(0) : A.size(1)), alpha, \
-                A.dptr_, A.stride_, beta, B.dptr_, B.stride_); \
-}
+#define LINALG_CPU_SYRK(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_syrk<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                      const Tensor<cpu, 2, DType>& B, \
+                                      DType alpha,                    \
+                                      DType beta,                     \
+                                      bool tA,                        \
+                                      Stream<cpu>* s) {               \
+    check_syrk(A, B, alpha, beta, tA);                                \
+    cblas_##fname(CblasRowMajor,                                      \
+                  CblasLower,                                         \
+                  (tA ? CblasTrans : CblasNoTrans),                   \
+                  B.size(0),                                          \
+                  (tA ? A.size(0) : A.size(1)),                       \
+                  alpha,                                              \
+                  A.dptr_,                                            \
+                  A.stride_,                                          \
+                  beta,                                               \
+                  B.dptr_,                                            \
+                  B.stride_);                                         \
+  }
 
 #else
 
-#define LINALG_CPU_SYRK(fname, DType) \
-template<> inline \
-void linalg_syrk<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                             const Tensor<cpu, 2, DType>& B, DType alpha, \
-                             DType beta, bool tA, Stream<cpu> *s) { \
-  LOG(FATAL) << "linalg_syrk not implemented by mxnet for cpu, needs cblas!"; \
-}
+#define LINALG_CPU_SYRK(fname, DType)                                           \
+  template <>                                                                   \
+  inline void linalg_syrk<cpu, DType>(const Tensor<cpu, 2, DType>& A,           \
+                                      const Tensor<cpu, 2, DType>& B,           \
+                                      DType alpha,                              \
+                                      DType beta,                               \
+                                      bool tA,                                  \
+                                      Stream<cpu>* s) {                         \
+    LOG(FATAL) << "linalg_syrk not implemented by mxnet for cpu, needs cblas!"; \
+  }
 
 #endif  // MSHADOW_USE_CBLAS == 1 || MSHADOW_USE_MKL == 1
 
-#define LINALG_XPU_BATCH_SYRK(xpu, DType) \
-template<> inline \
-void linalg_batch_syrk(const Tensor<xpu, 3, DType>& A, \
-                       const Tensor<xpu, 3, DType>& B, DType alpha, DType beta, \
-                       bool tA, Stream<xpu> *s) { \
-  linalg_check_batch_size(A.size(0), B.size(0), B.size(0)); \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_syrk(A[i], B[i], alpha, beta, tA, s); \
-  } \
-}
+#define LINALG_XPU_BATCH_SYRK(xpu, DType)                       \
+  template <>                                                   \
+  inline void linalg_batch_syrk(const Tensor<xpu, 3, DType>& A, \
+                                const Tensor<xpu, 3, DType>& B, \
+                                DType alpha,                    \
+                                DType beta,                     \
+                                bool tA,                        \
+                                Stream<xpu>* s) {               \
+    linalg_check_batch_size(A.size(0), B.size(0), B.size(0));   \
+    for (index_t i = 0; i < A.size(0); ++i) {                   \
+      linalg_syrk(A[i], B[i], alpha, beta, tA, s);              \
+    }                                                           \
+  }
 
 LINALG_CPU_SYRK(ssyrk, float)
 LINALG_CPU_SYRK(dsyrk, double)
@@ -985,20 +1281,30 @@ LINALG_XPU_BATCH_SYRK(cpu, double)
 #ifdef __CUDACC__
 
 // cublas col-major processing accounted for by switching transpose and fill mode
-#define LINALG_GPU_SYRK(fname, DType) \
-template<> inline \
-void linalg_syrk<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                             const Tensor<gpu, 2, DType>& B, DType alpha, \
-                             DType beta, bool tA, Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_syrk(A, B, alpha, beta, tA); \
-  CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s), \
-              CUBLAS_FILL_MODE_UPPER, (tA ? CUBLAS_OP_N : CUBLAS_OP_T), \
-              B.size(1), (tA ? A.size(0) : A.size(1)), &alpha, \
-              A.dptr_, A.stride_, &beta, B.dptr_, B.stride_)); \
-}
+#define LINALG_GPU_SYRK(fname, DType)                                 \
+  template <>                                                         \
+  inline void linalg_syrk<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
+                                      const Tensor<gpu, 2, DType>& B, \
+                                      DType alpha,                    \
+                                      DType beta,                     \
+                                      bool tA,                        \
+                                      Stream<gpu>* s) {               \
+    using namespace mxnet;                                            \
+    using mshadow::gpu;                                               \
+    CHECK_NOTNULL(s);                                                 \
+    check_syrk(A, B, alpha, beta, tA);                                \
+    CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),          \
+                              CUBLAS_FILL_MODE_UPPER,                 \
+                              (tA ? CUBLAS_OP_N : CUBLAS_OP_T),       \
+                              B.size(1),                              \
+                              (tA ? A.size(0) : A.size(1)),           \
+                              &alpha,                                 \
+                              A.dptr_,                                \
+                              A.stride_,                              \
+                              &beta,                                  \
+                              B.dptr_,                                \
+                              B.stride_));                            \
+  }
 
 LINALG_GPU_SYRK(Ssyrk, float)
 LINALG_GPU_SYRK(Dsyrk, double)
@@ -1011,89 +1317,98 @@ LINALG_XPU_BATCH_SYRK(gpu, double)
 
 // CPU/GPU-versions of LAPACK functions "gelqf", "orglq".
 
-template<typename xpu, typename DType> inline
-void check_gelqf(const Tensor<xpu, 2, DType>& A,
-                 const Tensor<xpu, 1, DType>& work) {
+template <typename xpu, typename DType>
+inline void check_gelqf(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 1, DType>& work) {
   // Any checking that helps user debug potential problems.
-  CHECK_LE(A.size(0), A.size(1))
-    << "A must have num(rows) <= num(columns)";
-  CHECK_LE(A.size(0), work.size(0))
-    << "Size of work is too small";
-}
-
-#define LINALG_CPU_GELQF(fname, DType) \
-template<> inline \
-void linalg_gelqf<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  check_gelqf(A, work); \
-  int m(A.size(0)); \
-  int lwork(work.size(0) - m); \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, m, A.size(1), \
-                               A.dptr_ , A.stride_, work.dptr_, \
-                               work.dptr_ + m, lwork)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+  CHECK_LE(A.size(0), A.size(1)) << "A must have num(rows) <= num(columns)";
+  CHECK_LE(A.size(0), work.size(0)) << "Size of work is too small";
+}
+
+#define LINALG_CPU_GELQF(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_gelqf<cpu, DType>(                                                    \
+      const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 1, DType>& work, Stream<cpu>* s) { \
+    check_gelqf(A, work);                                                                  \
+    int m(A.size(0));                                                                      \
+    int lwork(work.size(0) - m);                                                           \
+    int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR,                                   \
+                                 m,                                                        \
+                                 A.size(1),                                                \
+                                 A.dptr_,                                                  \
+                                 A.stride_,                                                \
+                                 work.dptr_,                                               \
+                                 work.dptr_ + m,                                           \
+                                 lwork));                                                  \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";                             \
+  }
 LINALG_CPU_GELQF(sgelqf, float)
 LINALG_CPU_GELQF(dgelqf, double)
 
-#define LINALG_CPU_ORGLQ(fname, DType) \
-template<> inline \
-void linalg_orglq<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  check_gelqf(A, work); \
-  int m(A.size(0)); \
-  int lwork(work.size(0) - m); \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, m, A.size(1), \
-                               A.dptr_ , A.stride_, work.dptr_, \
-                               work.dptr_ + m, lwork)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+#define LINALG_CPU_ORGLQ(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_orglq<cpu, DType>(                                                    \
+      const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 1, DType>& work, Stream<cpu>* s) { \
+    check_gelqf(A, work);                                                                  \
+    int m(A.size(0));                                                                      \
+    int lwork(work.size(0) - m);                                                           \
+    int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR,                                   \
+                                 m,                                                        \
+                                 A.size(1),                                                \
+                                 A.dptr_,                                                  \
+                                 A.stride_,                                                \
+                                 work.dptr_,                                               \
+                                 work.dptr_ + m,                                           \
+                                 lwork));                                                  \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";                             \
+  }
 LINALG_CPU_ORGLQ(sorglq, float)
 LINALG_CPU_ORGLQ(dorglq, double)
 
-#define LINALG_CPU_GELQF_WORKSPACE_QUERY(prefix, DType) \
-template<> inline \
-int linalg_gelqf_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                                             Stream<cpu> *s) { \
-  int m(A.size(0)); \
-  DType work = 0; \
-  int ret(MXNET_LAPACK_##prefix##gelqf(MXNET_LAPACK_ROW_MAJOR, m, \
-                                       A.size(1), A.dptr_ , A.stride_, &work, \
-                                       &work, -1)); \
-  CHECK_EQ(ret, 0) << #prefix << "gelqf: Workspace query failed on CPU."; \
-  int ws_size(static_cast<int>(work)); \
-  ret = MXNET_LAPACK_##prefix##orglq(MXNET_LAPACK_ROW_MAJOR, m, \
-                                     A.size(1), A.dptr_ , \
-                                     A.stride_, &work, &work, -1); \
-  CHECK_EQ(ret, 0) << #prefix << "orglq: Workspace query failed on CPU."; \
-  int wsz2(static_cast<int>(work)); \
-  if (wsz2 > ws_size) ws_size = wsz2; \
-  return ws_size + m; \
-}
+#define LINALG_CPU_GELQF_WORKSPACE_QUERY(prefix, DType)                               \
+  template <>                                                                         \
+  inline int linalg_gelqf_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                                      Stream<cpu>* s) {               \
+    int m(A.size(0));                                                                 \
+    DType work = 0;                                                                   \
+    int ret(MXNET_LAPACK_##prefix##gelqf(                                             \
+        MXNET_LAPACK_ROW_MAJOR, m, A.size(1), A.dptr_, A.stride_, &work, &work, -1)); \
+    CHECK_EQ(ret, 0) << #prefix << "gelqf: Workspace query failed on CPU.";           \
+    int ws_size(static_cast<int>(work));                                              \
+    ret = MXNET_LAPACK_##prefix##orglq(                                               \
+        MXNET_LAPACK_ROW_MAJOR, m, A.size(1), A.dptr_, A.stride_, &work, &work, -1);  \
+    CHECK_EQ(ret, 0) << #prefix << "orglq: Workspace query failed on CPU.";           \
+    int wsz2(static_cast<int>(work));                                                 \
+    if (wsz2 > ws_size)                                                               \
+      ws_size = wsz2;                                                                 \
+    return ws_size + m;                                                               \
+  }
 LINALG_CPU_GELQF_WORKSPACE_QUERY(s, float)
 LINALG_CPU_GELQF_WORKSPACE_QUERY(d, double)
 
 #ifdef __CUDACC__
 
-#define LINALG_GPU_GELQF(fname, DType) \
-template<> inline \
-void linalg_gelqf<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_gelqf(A, work); \
-  int m(A.size(0)); \
-  int lwork(work.size(0) - m); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_gelqf, info, int, 1); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                A.size(1), m, A.dptr_ , A.stride_, work.dptr_, \
-                work.dptr_ + m, lwork, static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_GELQF(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_gelqf<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& work, Stream<gpu>* s) { \
+    using namespace mxnet;                                                                 \
+    using mshadow::gpu;                                                                    \
+    CHECK_NOTNULL(s);                                                                      \
+    check_gelqf(A, work);                                                                  \
+    int m(A.size(0));                                                                      \
+    int lwork(work.size(0) - m);                                                           \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_gelqf, info, int, 1);                               \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                         \
+                                  A.size(1),                                               \
+                                  m,                                                       \
+                                  A.dptr_,                                                 \
+                                  A.stride_,                                               \
+                                  work.dptr_,                                              \
+                                  work.dptr_ + m,                                          \
+                                  lwork,                                                   \
+                                  static_cast<int*>(info.dptr)));                          \
+    Storage::Get()->Free(info);                                                            \
+  }
 // Col-major QR-decomposition results in row-major LQ decomposition.
 LINALG_GPU_GELQF(DnSgeqrf, float)
 LINALG_GPU_GELQF(DnDgeqrf, double)
@@ -1101,33 +1416,38 @@ LINALG_GPU_GELQF(DnDgeqrf, double)
 // ORGLQ only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_ORGLQ(fname, DType) \
-template<> inline \
-void linalg_orglq<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_gelqf(A, work); \
-  int m(A.size(0)); \
-  int lwork(work.size(0) - m); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_orglq, info, int, 1); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                A.size(1), m, m, A.dptr_ , A.stride_, work.dptr_, \
-                work.dptr_ + m, lwork, static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_ORGLQ(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_orglq<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& work, Stream<gpu>* s) { \
+    using namespace mxnet;                                                                 \
+    using mshadow::gpu;                                                                    \
+    CHECK_NOTNULL(s);                                                                      \
+    check_gelqf(A, work);                                                                  \
+    int m(A.size(0));                                                                      \
+    int lwork(work.size(0) - m);                                                           \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_orglq, info, int, 1);                               \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                         \
+                                  A.size(1),                                               \
+                                  m,                                                       \
+                                  m,                                                       \
+                                  A.dptr_,                                                 \
+                                  A.stride_,                                               \
+                                  work.dptr_,                                              \
+                                  work.dptr_ + m,                                          \
+                                  lwork,                                                   \
+                                  static_cast<int*>(info.dptr)));                          \
+    Storage::Get()->Free(info);                                                            \
+  }
 
 #else
 
-#define LINALG_GPU_ORGLQ(fname, DType) \
-template<> inline \
-void linalg_orglq<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  LOG(FATAL) << "orglq requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_ORGLQ(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_orglq<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& work, Stream<gpu>* s) { \
+    LOG(FATAL) << "orglq requires CUDA version >= 8.0!";                                   \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1137,34 +1457,39 @@ LINALG_GPU_ORGLQ(DnDorgqr, double)
 // ORGLQ only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_GELQF_WORKSPACE_QUERY(prefix, DType) \
-template<> inline \
-int linalg_gelqf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                             Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  int m(A.size(0)); \
-  int work1(0); \
-  CUSOLVER_CALL(cusolverDn##prefix##geqrf_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                A.size(1), m, A.dptr_ , A.stride_, &work1)); \
-  int work2(0);  \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_gelqf_workspace_query, \
-      tau, DType, 1); \
-  CUSOLVER_CALL(cusolverDn##prefix##orgqr_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                A.size(1), m, m, A.dptr_ , A.stride_, static_cast<DType *>(tau.dptr), &work2)); \
-  Storage::Get()->Free(tau); \
-  return std::max(work1, work2) + m; \
-}
+#define LINALG_GPU_GELQF_WORKSPACE_QUERY(prefix, DType)                                 \
+  template <>                                                                           \
+  inline int linalg_gelqf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A,   \
+                                                      Stream<gpu>* s) {                 \
+    using namespace mxnet;                                                              \
+    using mshadow::gpu;                                                                 \
+    int m(A.size(0));                                                                   \
+    int work1(0);                                                                       \
+    CUSOLVER_CALL(cusolverDn##prefix##geqrf_bufferSize(                                 \
+        Stream<gpu>::GetSolverHandle(s), A.size(1), m, A.dptr_, A.stride_, &work1));    \
+    int work2(0);                                                                       \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_gelqf_workspace_query, tau, DType, 1);           \
+    CUSOLVER_CALL(cusolverDn##prefix##orgqr_bufferSize(Stream<gpu>::GetSolverHandle(s), \
+                                                       A.size(1),                       \
+                                                       m,                               \
+                                                       m,                               \
+                                                       A.dptr_,                         \
+                                                       A.stride_,                       \
+                                                       static_cast<DType*>(tau.dptr),   \
+                                                       &work2));                        \
+    Storage::Get()->Free(tau);                                                          \
+    return std::max(work1, work2) + m;                                                  \
+  }
 
 #else
 
-#define LINALG_GPU_GELQF_WORKSPACE_QUERY(prefix, DType) \
-template<> inline \
-int linalg_gelqf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                             Stream<gpu> *s) { \
-  LOG(FATAL) << "orglq requires CUDA version >= 8.0!"; \
-  return 0; \
-}
+#define LINALG_GPU_GELQF_WORKSPACE_QUERY(prefix, DType)                               \
+  template <>                                                                         \
+  inline int linalg_gelqf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
+                                                      Stream<gpu>* s) {               \
+    LOG(FATAL) << "orglq requires CUDA version >= 8.0!";                              \
+    return 0;                                                                         \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1177,41 +1502,52 @@ LINALG_GPU_GELQF_WORKSPACE_QUERY(D, double)
 
 // CPU/GPU-versions of LAPACK function "syevd"
 
-template<typename xpu, typename DType> inline
-void check_syevd(const Tensor<xpu, 2, DType>& A,
-                 const Tensor<xpu, 1, DType>& L) {
+template <typename xpu, typename DType>
+inline void check_syevd(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 1, DType>& L) {
   // Any checking that helps user debug potential problems.
-  CHECK_EQ(A.size(0), A.size(1))
-    << "A must be square symmetric matrix";
-  CHECK_EQ(A.size(0), L.size(0))
-    << "A, L have incompatible sizes";
-}
-
-#define LINALG_CPU_SYEVD(fname, DType) \
-template<> inline \
-void linalg_syevd<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 1, DType>& L, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  check_syevd(A, L); \
-  DType workTmp(0); \
-  lapack_index_t liwork(0); \
-  MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, 'L', A.size(0), \
-                       A.dptr_, A.stride_, L.dptr_, &workTmp, -1, \
-                       &liwork, -1); \
-  lapack_index_t lwork = static_cast<lapack_index_t>(workTmp); \
-  if /*constexpr*/ (sizeof(lapack_index_t) > sizeof(DType)) { \
-    /* For alligning iwork pointer address */ \
-    constexpr lapack_index_t round_mask = \
-      static_cast<lapack_index_t>(sizeof(lapack_index_t) / sizeof(DType)) - 1; \
-    lwork = (lwork + round_mask) & ~round_mask; \
-  }\
-  lapack_index_t *iwork = static_cast<lapack_index_t *>(static_cast<void *>(work.dptr_ + lwork)); \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, 'L', A.size(0), \
-                               A.dptr_, A.stride_, L.dptr_, work.dptr_, \
-                               lwork, iwork, liwork)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+  CHECK_EQ(A.size(0), A.size(1)) << "A must be square symmetric matrix";
+  CHECK_EQ(A.size(0), L.size(0)) << "A, L have incompatible sizes";
+}
+
+#define LINALG_CPU_SYEVD(fname, DType)                                                            \
+  template <>                                                                                     \
+  inline void linalg_syevd<cpu, DType>(const Tensor<cpu, 2, DType>& A,                            \
+                                       const Tensor<cpu, 1, DType>& L,                            \
+                                       const Tensor<cpu, 1, DType>& work,                         \
+                                       Stream<cpu>* s) {                                          \
+    check_syevd(A, L);                                                                            \
+    DType workTmp(0);                                                                             \
+    lapack_index_t liwork(0);                                                                     \
+    MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR,                                                  \
+                         'L',                                                                     \
+                         A.size(0),                                                               \
+                         A.dptr_,                                                                 \
+                         A.stride_,                                                               \
+                         L.dptr_,                                                                 \
+                         &workTmp,                                                                \
+                         -1,                                                                      \
+                         &liwork,                                                                 \
+                         -1);                                                                     \
+    lapack_index_t lwork = static_cast<lapack_index_t>(workTmp);                                  \
+    if /*constexpr*/ (sizeof(lapack_index_t) > sizeof(DType)) {                                   \
+      /* For alligning iwork pointer address */                                                   \
+      constexpr lapack_index_t round_mask =                                                       \
+          static_cast<lapack_index_t>(sizeof(lapack_index_t) / sizeof(DType)) - 1;                \
+      lwork = (lwork + round_mask) & ~round_mask;                                                 \
+    }                                                                                             \
+    lapack_index_t* iwork = static_cast<lapack_index_t*>(static_cast<void*>(work.dptr_ + lwork)); \
+    int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR,                                          \
+                                 'L',                                                             \
+                                 A.size(0),                                                       \
+                                 A.dptr_,                                                         \
+                                 A.stride_,                                                       \
+                                 L.dptr_,                                                         \
+                                 work.dptr_,                                                      \
+                                 lwork,                                                           \
+                                 iwork,                                                           \
+                                 liwork));                                                        \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";                                    \
+  }
 LINALG_CPU_SYEVD(ssyevd, float)
 LINALG_CPU_SYEVD(dsyevd, double)
 
@@ -1221,32 +1557,38 @@ LINALG_CPU_SYEVD(dsyevd, double)
 // Returned is the number of elements of type DType that the temp space
 // needs to accomodate. This also makes this function signature equivalent
 // to the work space query on GPU.
-#define LINALG_CPU_SYEVD_WORKSPACE_QUERY(func, DType) \
-template<> inline \
-lapack_index_t linalg_syevd_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                                             const Tensor<cpu, 1, DType>& L, \
-                                             Stream<cpu> *s) { \
-  DType work(0); \
-  lapack_index_t liwork(0); \
-  MXNET_LAPACK_##func(MXNET_LAPACK_ROW_MAJOR, 'L', A.size(0), \
-                      A.dptr_, A.stride_, L.dptr_, &work, -1, &liwork, \
-                      -1); \
-  lapack_index_t lwork = static_cast<lapack_index_t>(work); \
-  if /*constexpr*/ (sizeof(DType) != sizeof(lapack_index_t)) { \
-    if /*constexpr*/ (sizeof(DType) > sizeof(lapack_index_t)) { \
-      /* Convert memory size needed for liwork to lwork units [Dtype] */ \
-      liwork = (sizeof(lapack_index_t) * liwork + sizeof(DType) - 1) / sizeof(DType); \
-    } else { \
-      /* Convert memory size needed for liwork to lwork units [Dtype] */ \
-      liwork *= sizeof(lapack_index_t) / sizeof(DType); \
-      /* For alligning iwork pointer address */ \
-      constexpr lapack_index_t round_mask = \
-        static_cast<lapack_index_t>(sizeof(lapack_index_t) / sizeof(DType)) - 1; \
-      lwork = (lwork + round_mask) & ~round_mask; \
-    } \
-  } \
-  return lwork + liwork; \
-}
+#define LINALG_CPU_SYEVD_WORKSPACE_QUERY(func, DType)                                   \
+  template <>                                                                           \
+  inline lapack_index_t linalg_syevd_workspace_query<cpu, DType>(                       \
+      const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 1, DType>& L, Stream<cpu>* s) { \
+    DType work(0);                                                                      \
+    lapack_index_t liwork(0);                                                           \
+    MXNET_LAPACK_##func(MXNET_LAPACK_ROW_MAJOR,                                         \
+                        'L',                                                            \
+                        A.size(0),                                                      \
+                        A.dptr_,                                                        \
+                        A.stride_,                                                      \
+                        L.dptr_,                                                        \
+                        &work,                                                          \
+                        -1,                                                             \
+                        &liwork,                                                        \
+                        -1);                                                            \
+    lapack_index_t lwork = static_cast<lapack_index_t>(work);                           \
+    if /*constexpr*/ (sizeof(DType) != sizeof(lapack_index_t)) {                        \
+      if /*constexpr*/ (sizeof(DType) > sizeof(lapack_index_t)) {                       \
+        /* Convert memory size needed for liwork to lwork units [Dtype] */              \
+        liwork = (sizeof(lapack_index_t) * liwork + sizeof(DType) - 1) / sizeof(DType); \
+      } else {                                                                          \
+        /* Convert memory size needed for liwork to lwork units [Dtype] */              \
+        liwork *= sizeof(lapack_index_t) / sizeof(DType);                               \
+        /* For alligning iwork pointer address */                                       \
+        constexpr lapack_index_t round_mask =                                           \
+            static_cast<lapack_index_t>(sizeof(lapack_index_t) / sizeof(DType)) - 1;    \
+        lwork = (lwork + round_mask) & ~round_mask;                                     \
+      }                                                                                 \
+    }                                                                                   \
+    return lwork + liwork;                                                              \
+  }
 LINALG_CPU_SYEVD_WORKSPACE_QUERY(ssyevd, float)
 LINALG_CPU_SYEVD_WORKSPACE_QUERY(dsyevd, double)
 
@@ -1257,57 +1599,66 @@ LINALG_CPU_SYEVD_WORKSPACE_QUERY(dsyevd, double)
 
 // Row-major vs. col-major handled by using upper triangular
 // in cusolver-call.
-#define LINALG_GPU_SYEVD(fname, DType) \
-template<> inline \
-void linalg_syevd<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& L, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_syevd(A, L); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_syevd, info, int, 1); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                CUSOLVER_EIG_MODE_VECTOR, CUBLAS_FILL_MODE_UPPER, \
-                A.size(0), A.dptr_ , A.stride_, L.dptr_, work.dptr_, \
-                work.size(0), static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_SYEVD(fname, DType)                                    \
+  template <>                                                             \
+  inline void linalg_syevd<gpu, DType>(const Tensor<gpu, 2, DType>& A,    \
+                                       const Tensor<gpu, 1, DType>& L,    \
+                                       const Tensor<gpu, 1, DType>& work, \
+                                       Stream<gpu>* s) {                  \
+    using namespace mxnet;                                                \
+    using mshadow::gpu;                                                   \
+    CHECK_NOTNULL(s);                                                     \
+    check_syevd(A, L);                                                    \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_syevd, info, int, 1);              \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),        \
+                                  CUSOLVER_EIG_MODE_VECTOR,               \
+                                  CUBLAS_FILL_MODE_UPPER,                 \
+                                  A.size(0),                              \
+                                  A.dptr_,                                \
+                                  A.stride_,                              \
+                                  L.dptr_,                                \
+                                  work.dptr_,                             \
+                                  work.size(0),                           \
+                                  static_cast<int*>(info.dptr)));         \
+    Storage::Get()->Free(info);                                           \
+  }
 
-#define LINALG_GPU_SYEVD_WORKSPACE_QUERY(fname, DType) \
-template<> inline \
-int linalg_syevd_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                             const Tensor<gpu, 1, DType>& L, \
-                                             Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  int lwork(0); \
-  CUSOLVER_CALL(cusolver##fname##_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                CUSOLVER_EIG_MODE_VECTOR, CUBLAS_FILL_MODE_UPPER, \
-                A.size(0), A.dptr_ , A.stride_, L.dptr_, &lwork)); \
-  return lwork; \
-}
+#define LINALG_GPU_SYEVD_WORKSPACE_QUERY(fname, DType)                                  \
+  template <>                                                                           \
+  inline int linalg_syevd_workspace_query<gpu, DType>(                                  \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& L, Stream<gpu>* s) { \
+    using namespace mxnet;                                                              \
+    using mshadow::gpu;                                                                 \
+    int lwork(0);                                                                       \
+    CUSOLVER_CALL(cusolver##fname##_bufferSize(Stream<gpu>::GetSolverHandle(s),         \
+                                               CUSOLVER_EIG_MODE_VECTOR,                \
+                                               CUBLAS_FILL_MODE_UPPER,                  \
+                                               A.size(0),                               \
+                                               A.dptr_,                                 \
+                                               A.stride_,                               \
+                                               L.dptr_,                                 \
+                                               &lwork));                                \
+    return lwork;                                                                       \
+  }
 
 #else
 
-#define LINALG_GPU_SYEVD(fname, DType) \
-template<> inline \
-void linalg_syevd<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& L, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  LOG(FATAL) << "syevd requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_SYEVD(fname, DType)                                    \
+  template <>                                                             \
+  inline void linalg_syevd<gpu, DType>(const Tensor<gpu, 2, DType>& A,    \
+                                       const Tensor<gpu, 1, DType>& L,    \
+                                       const Tensor<gpu, 1, DType>& work, \
+                                       Stream<gpu>* s) {                  \
+    LOG(FATAL) << "syevd requires CUDA version >= 8.0!";                  \
+  }
 
-#define LINALG_GPU_SYEVD_WORKSPACE_QUERY(fname, DType) \
-template<> inline \
-int linalg_syevd_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                             const Tensor<gpu, 1, DType>& L, \
-                                             Stream<gpu> *s) { \
-  LOG(FATAL) << "syevd requires CUDA version >= 8.0!"; \
-  return 0; \
-}
+#define LINALG_GPU_SYEVD_WORKSPACE_QUERY(fname, DType)                                  \
+  template <>                                                                           \
+  inline int linalg_syevd_workspace_query<gpu, DType>(                                  \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& L, Stream<gpu>* s) { \
+    LOG(FATAL) << "syevd requires CUDA version >= 8.0!";                                \
+    return 0;                                                                           \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1323,52 +1674,63 @@ LINALG_GPU_SYEVD_WORKSPACE_QUERY(DnDsyevd, double)
 
 // CPU/GPU-versions of LAPACK function "gesvd"
 
-template<typename xpu, typename DType> inline
-void check_gesvd(const Tensor<xpu, 2, DType>& UT,
-                 const Tensor<xpu, 1, DType>& L,
-                 const Tensor<xpu, 2, DType>& V) {
+template <typename xpu, typename DType>
+inline void check_gesvd(const Tensor<xpu, 2, DType>& UT,
+                        const Tensor<xpu, 1, DType>& L,
+                        const Tensor<xpu, 2, DType>& V) {
   // Any checking that helps user debug potential problems.
   CHECK_LE(V.size(0), V.size(1))
-    << "The second to last dimension of A must be less or equal to the "
-    << "last dimension";
-  CHECK_EQ(UT.size(0), UT.size(1))
-    << "UT must be square matrix";
-  CHECK_EQ(V.size(0), L.size(0))
-    << "V, L have incompatible sizes";
-  CHECK_EQ(V.size(0), UT.size(0))
-    << "V, UT must have compatible sizes";
-}
-
-#define LINALG_CPU_GESVD(fname, DType) \
-template<> inline \
-void linalg_gesvd<cpu, DType>(const Tensor<cpu, 2, DType>& UT, \
-                              const Tensor<cpu, 1, DType>& L, \
-                              const Tensor<cpu, 2, DType>& V, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  check_gesvd(UT, L, V); \
-  int lwork(work.size(0)); \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR, V.size(0), V.size(1), \
-                               UT.dptr_, UT.stride_, L.dptr_, V.dptr_, V.stride_, \
-                               work.dptr_, lwork)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+      << "The second to last dimension of A must be less or equal to the "
+      << "last dimension";
+  CHECK_EQ(UT.size(0), UT.size(1)) << "UT must be square matrix";
+  CHECK_EQ(V.size(0), L.size(0)) << "V, L have incompatible sizes";
+  CHECK_EQ(V.size(0), UT.size(0)) << "V, UT must have compatible sizes";
+}
+
+#define LINALG_CPU_GESVD(fname, DType)                                    \
+  template <>                                                             \
+  inline void linalg_gesvd<cpu, DType>(const Tensor<cpu, 2, DType>& UT,   \
+                                       const Tensor<cpu, 1, DType>& L,    \
+                                       const Tensor<cpu, 2, DType>& V,    \
+                                       const Tensor<cpu, 1, DType>& work, \
+                                       Stream<cpu>* s) {                  \
+    check_gesvd(UT, L, V);                                                \
+    int lwork(work.size(0));                                              \
+    int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_ROW_MAJOR,                  \
+                                 V.size(0),                               \
+                                 V.size(1),                               \
+                                 UT.dptr_,                                \
+                                 UT.stride_,                              \
+                                 L.dptr_,                                 \
+                                 V.dptr_,                                 \
+                                 V.stride_,                               \
+                                 work.dptr_,                              \
+                                 lwork));                                 \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";            \
+  }
 
 LINALG_CPU_GESVD(sgesvd, float)
 LINALG_CPU_GESVD(dgesvd, double)
 
-#define LINALG_CPU_GESVD_WORKSPACE_QUERY(func, DType) \
-template<> inline \
-size_t linalg_gesvd_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& UT, \
-                                             const Tensor<cpu, 1, DType>& L, \
-                                             const Tensor<cpu, 2, DType>& V, \
-                                             Stream<cpu> *s) { \
-  DType work(0.0); \
-  MXNET_LAPACK_##func(MXNET_LAPACK_ROW_MAJOR, V.size(0), V.size(1), \
-                      UT.dptr_, UT.stride_, L.dptr_, V.dptr_, V.stride_, \
-                      &work, -1); \
-  return static_cast<size_t>(work); \
-}
+#define LINALG_CPU_GESVD_WORKSPACE_QUERY(func, DType)                                     \
+  template <>                                                                             \
+  inline size_t linalg_gesvd_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& UT, \
+                                                         const Tensor<cpu, 1, DType>& L,  \
+                                                         const Tensor<cpu, 2, DType>& V,  \
+                                                         Stream<cpu>* s) {                \
+    DType work(0.0);                                                                      \
+    MXNET_LAPACK_##func(MXNET_LAPACK_ROW_MAJOR,                                           \
+                        V.size(0),                                                        \
+                        V.size(1),                                                        \
+                        UT.dptr_,                                                         \
+                        UT.stride_,                                                       \
+                        L.dptr_,                                                          \
+                        V.dptr_,                                                          \
+                        V.stride_,                                                        \
+                        &work,                                                            \
+                        -1);                                                              \
+    return static_cast<size_t>(work);                                                     \
+  }
 LINALG_CPU_GESVD_WORKSPACE_QUERY(sgesvd, float)
 LINALG_CPU_GESVD_WORKSPACE_QUERY(dgesvd, double)
 
@@ -1377,59 +1739,71 @@ LINALG_CPU_GESVD_WORKSPACE_QUERY(dgesvd, double)
 // GESVD only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_GESVD(fname, DType) \
-template<> inline \
-void linalg_gesvd<gpu, DType>(const Tensor<gpu, 2, DType>& UT, \
-                              const Tensor<gpu, 1, DType>& L, \
-                              const Tensor<gpu, 2, DType>& V, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  check_gesvd(UT, L, V); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_gesvd, info, int, 1); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                'O', 'S', V.size(1), V.size(0), V.dptr_, V.stride_, L.dptr_, V.dptr_, V.stride_, \
-                UT.dptr_, UT.stride_, work.dptr_, work.size(0), \
-                V.dptr_, static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_GESVD(fname, DType)                                    \
+  template <>                                                             \
+  inline void linalg_gesvd<gpu, DType>(const Tensor<gpu, 2, DType>& UT,   \
+                                       const Tensor<gpu, 1, DType>& L,    \
+                                       const Tensor<gpu, 2, DType>& V,    \
+                                       const Tensor<gpu, 1, DType>& work, \
+                                       Stream<gpu>* s) {                  \
+    using namespace mxnet;                                                \
+    using mshadow::gpu;                                                   \
+    check_gesvd(UT, L, V);                                                \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_gesvd, info, int, 1);              \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),        \
+                                  'O',                                    \
+                                  'S',                                    \
+                                  V.size(1),                              \
+                                  V.size(0),                              \
+                                  V.dptr_,                                \
+                                  V.stride_,                              \
+                                  L.dptr_,                                \
+                                  V.dptr_,                                \
+                                  V.stride_,                              \
+                                  UT.dptr_,                               \
+                                  UT.stride_,                             \
+                                  work.dptr_,                             \
+                                  work.size(0),                           \
+                                  V.dptr_,                                \
+                                  static_cast<int*>(info.dptr)));         \
+    Storage::Get()->Free(info);                                           \
+  }
 
-#define LINALG_GPU_GESVD_WORKSPACE_QUERY(fname, DType) \
-template<> inline \
-size_t linalg_gesvd_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& UT, \
-                                             const Tensor<gpu, 1, DType>& L, \
-                                             const Tensor<gpu, 2, DType>& V, \
-                                             Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  int lwork(0); \
-  CUSOLVER_CALL(cusolver##fname##_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                                             V.size(1), V.size(0), &lwork)); \
-  return lwork; \
-}
+#define LINALG_GPU_GESVD_WORKSPACE_QUERY(fname, DType)                                    \
+  template <>                                                                             \
+  inline size_t linalg_gesvd_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& UT, \
+                                                         const Tensor<gpu, 1, DType>& L,  \
+                                                         const Tensor<gpu, 2, DType>& V,  \
+                                                         Stream<gpu>* s) {                \
+    using namespace mxnet;                                                                \
+    using mshadow::gpu;                                                                   \
+    int lwork(0);                                                                         \
+    CUSOLVER_CALL(cusolver##fname##_bufferSize(                                           \
+        Stream<gpu>::GetSolverHandle(s), V.size(1), V.size(0), &lwork));                  \
+    return lwork;                                                                         \
+  }
 
 #else
 
-#define LINALG_GPU_GESVD(fname, DType) \
-template<> inline \
-void linalg_gesvd<gpu, DType>(const Tensor<gpu, 2, DType>& UT, \
-                              const Tensor<gpu, 1, DType>& L, \
-                              const Tensor<gpu, 2, DType>& V, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  LOG(FATAL) << "gesvd requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_GESVD(fname, DType)                                    \
+  template <>                                                             \
+  inline void linalg_gesvd<gpu, DType>(const Tensor<gpu, 2, DType>& UT,   \
+                                       const Tensor<gpu, 1, DType>& L,    \
+                                       const Tensor<gpu, 2, DType>& V,    \
+                                       const Tensor<gpu, 1, DType>& work, \
+                                       Stream<gpu>* s) {                  \
+    LOG(FATAL) << "gesvd requires CUDA version >= 8.0!";                  \
+  }
 
-#define LINALG_GPU_GESVD_WORKSPACE_QUERY(fname, DType) \
-template<> inline \
-size_t linalg_gesvd_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& UT, \
-                                             const Tensor<gpu, 1, DType>& L, \
-                                             const Tensor<gpu, 2, DType>& V, \
-                                             Stream<gpu> *s) { \
-  LOG(FATAL) << "gesvd requires CUDA version >= 8.0!"; \
-  return 0; \
-}
+#define LINALG_GPU_GESVD_WORKSPACE_QUERY(fname, DType)                                    \
+  template <>                                                                             \
+  inline size_t linalg_gesvd_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& UT, \
+                                                         const Tensor<gpu, 1, DType>& L,  \
+                                                         const Tensor<gpu, 2, DType>& V,  \
+                                                         Stream<gpu>* s) {                \
+    LOG(FATAL) << "gesvd requires CUDA version >= 8.0!";                                  \
+    return 0;                                                                             \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1447,33 +1821,33 @@ LINALG_GPU_GESVD_WORKSPACE_QUERY(DnDgesvd, double)
 
 // The input of this function should be col-major for performance.
 // Tensor work holds space for ipiv in getrf
-#define LINALG_CPU_GETRF(fname, DType) \
-template<> inline \
-void linalg_getrf<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 1, lapack_index_t>& pivot, \
-                              bool check_singular, Stream<cpu> *s) { \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR, A.size(1), A.size(0), \
-                               A.dptr_, A.stride_, pivot.dptr_)); \
-  CHECK_GE(ret, 0) << #fname << " failed in lapack on cpu."; \
-  if (check_singular) { \
-    CHECK_EQ(ret, 0) << "the input matrix is non-convertible"; \
-  } \
-}
+#define LINALG_CPU_GETRF(fname, DType)                                                   \
+  template <>                                                                            \
+  inline void linalg_getrf<cpu, DType>(const Tensor<cpu, 2, DType>& A,                   \
+                                       const Tensor<cpu, 1, lapack_index_t>& pivot,      \
+                                       bool check_singular,                              \
+                                       Stream<cpu>* s) {                                 \
+    int ret(MXNET_LAPACK_##fname(                                                        \
+        MXNET_LAPACK_COL_MAJOR, A.size(1), A.size(0), A.dptr_, A.stride_, pivot.dptr_)); \
+    CHECK_GE(ret, 0) << #fname << " failed in lapack on cpu.";                           \
+    if (check_singular) {                                                                \
+      CHECK_EQ(ret, 0) << "the input matrix is non-convertible";                         \
+    }                                                                                    \
+  }
 
 LINALG_CPU_GETRF(sgetrf, float)
 LINALG_CPU_GETRF(dgetrf, double)
 
-
-#define LINALG_CPU_BATCH_GETRF(fname, DType, IndexT) \
-template<> inline \
-void linalg_batch_getrf<cpu, DType>(const Tensor<cpu, 3, DType>& A, \
-                                    const Tensor<cpu, 2, IndexT>& pivot, \
-                                    bool check_singular, \
-                                    Stream<cpu> *s) { \
-  for (IndexT i = 0; i < A.size(0); ++i) { \
-    linalg_getrf(A[i], pivot[i], check_singular); \
-  } \
-}
+#define LINALG_CPU_BATCH_GETRF(fname, DType, IndexT)                              \
+  template <>                                                                     \
+  inline void linalg_batch_getrf<cpu, DType>(const Tensor<cpu, 3, DType>& A,      \
+                                             const Tensor<cpu, 2, IndexT>& pivot, \
+                                             bool check_singular,                 \
+                                             Stream<cpu>* s) {                    \
+    for (IndexT i = 0; i < A.size(0); ++i) {                                      \
+      linalg_getrf(A[i], pivot[i], check_singular);                               \
+    }                                                                             \
+  }
 
 LINALG_CPU_BATCH_GETRF(sgetrf, float, LapackIndex<cpu>::IndexT)
 LINALG_CPU_BATCH_GETRF(dgetrf, double, LapackIndex<cpu>::IndexT)
@@ -1484,8 +1858,8 @@ LINALG_CPU_BATCH_GETRF(dgetrf, double, LapackIndex<cpu>::IndexT)
 // to store the pointers of each batch matrix. This kernel is used to build the
 // pointer array.
 struct set_matrix {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType **p, DType *m, int step) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, DType** p, DType* m, int step) {
     p[i] = m + i * step;
   }
 };
@@ -1498,39 +1872,40 @@ struct set_matrix {
 // batches of small matrices, so performance issue may happen when computing
 // large matices. We leave it here until MAGMA which has "getri" is introduced
 // into MXNet.
-#define LINALG_GPU_BATCH_GETRF(fname, DType) \
-template<> inline \
-void linalg_batch_getrf<gpu, DType>(const Tensor<gpu, 3, DType>& A, \
-                                    const Tensor<gpu, 2, int>& pivot, \
-                                    bool check_singular, \
-                                    Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using namespace mxnet::op::mxnet_op; \
-  CHECK_NOTNULL(s); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getrf, info, int, A.size(0)); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getrf, A_ptr_buf, \
-      DType *, A.size(0)); \
-  DType **A_ptr = static_cast<DType **>(A_ptr_buf.dptr); \
-  Kernel<set_matrix, gpu>::Launch(s, A.size(0), \
-                                  A_ptr, A.dptr_, \
-                                  A.size(1) * A.size(2)); \
-  CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s), \
-                            A.size(1), A_ptr, A.size(2), pivot.dptr_, \
-                            static_cast<int *>(info.dptr), A.size(0))) \
-  Storage::Get()->Free(info); \
-  Storage::Get()->Free(A_ptr_buf); \
-}
+#define LINALG_GPU_BATCH_GETRF(fname, DType)                                              \
+  template <>                                                                             \
+  inline void linalg_batch_getrf<gpu, DType>(const Tensor<gpu, 3, DType>& A,              \
+                                             const Tensor<gpu, 2, int>& pivot,            \
+                                             bool check_singular,                         \
+                                             Stream<gpu>* s) {                            \
+    using namespace mxnet;                                                                \
+    using namespace mxnet::op::mxnet_op;                                                  \
+    CHECK_NOTNULL(s);                                                                     \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getrf, info, int, A.size(0));                \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getrf, A_ptr_buf, DType*, A.size(0));        \
+    DType** A_ptr = static_cast<DType**>(A_ptr_buf.dptr);                                 \
+    Kernel<set_matrix, gpu>::Launch(s, A.size(0), A_ptr, A.dptr_, A.size(1) * A.size(2)); \
+    CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),                              \
+                              A.size(1),                                                  \
+                              A_ptr,                                                      \
+                              A.size(2),                                                  \
+                              pivot.dptr_,                                                \
+                              static_cast<int*>(info.dptr),                               \
+                              A.size(0)))                                                 \
+    Storage::Get()->Free(info);                                                           \
+    Storage::Get()->Free(A_ptr_buf);                                                      \
+  }
 
 #else
 
-#define LINALG_GPU_BATCH_GETRF(fname, DType) \
-template<> inline \
-void linalg_batch_getrf<gpu, DType>(const Tensor<gpu, 3, DType>& A, \
-                                    const Tensor<gpu, 2, int>& pivot, \
-                                    bool check_singular, \
-                                    Stream<gpu> *s) { \
-  LOG(FATAL) << "batched getrf requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_BATCH_GETRF(fname, DType)                                   \
+  template <>                                                                  \
+  inline void linalg_batch_getrf<gpu, DType>(const Tensor<gpu, 3, DType>& A,   \
+                                             const Tensor<gpu, 2, int>& pivot, \
+                                             bool check_singular,              \
+                                             Stream<gpu>* s) {                 \
+    LOG(FATAL) << "batched getrf requires CUDA version >= 8.0!";               \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1544,36 +1919,40 @@ LINALG_GPU_BATCH_GETRF(DgetrfBatched, double)
 // CPU/GPU-versions of LAPACK function "getri"
 
 // The input of this function should be col-major for performance.
-#define LINALG_CPU_GETRI(fname, DType) \
-template<> inline \
-void linalg_getri<cpu, DType>(const Tensor<cpu, 2, DType>& LU, \
-                              const Tensor<cpu, 1, lapack_index_t>& pivot, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR, LU.size(0), LU.dptr_, \
-                               LU.stride_, pivot.dptr_, work.dptr_, work.size(0))); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+#define LINALG_CPU_GETRI(fname, DType)                                              \
+  template <>                                                                       \
+  inline void linalg_getri<cpu, DType>(const Tensor<cpu, 2, DType>& LU,             \
+                                       const Tensor<cpu, 1, lapack_index_t>& pivot, \
+                                       const Tensor<cpu, 1, DType>& work,           \
+                                       Stream<cpu>* s) {                            \
+    int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR,                            \
+                                 LU.size(0),                                        \
+                                 LU.dptr_,                                          \
+                                 LU.stride_,                                        \
+                                 pivot.dptr_,                                       \
+                                 work.dptr_,                                        \
+                                 work.size(0)));                                    \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";                      \
+  }
 LINALG_CPU_GETRI(sgetri, float)
 LINALG_CPU_GETRI(dgetri, double)
 
-template<typename xpu, typename DType>
-lapack_index_t linalg_getri_workspace_query(const Tensor<xpu, 2, DType>& A, \
-                                 Stream<cpu> *s) {
+template <typename xpu, typename DType>
+lapack_index_t linalg_getri_workspace_query(const Tensor<xpu, 2, DType>& A, Stream<cpu>* s) {
   LOG(FATAL) << "it only takes float or double Tensor";
   return 0;
 }
 
 // Query workspace for "getri"
-#define LINALG_CPU_GETRI_WORKSPACE_QUERY(func, DType) \
-template<> inline \
-lapack_index_t linalg_getri_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                                             Stream<cpu> *s) { \
-  DType lwork(0); \
-  MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, A.size(0), A.dptr_, \
-                      A.stride_, nullptr, &lwork, -1); \
-  return static_cast<lapack_index_t>(lwork); \
-}
+#define LINALG_CPU_GETRI_WORKSPACE_QUERY(func, DType)                                            \
+  template <>                                                                                    \
+  inline lapack_index_t linalg_getri_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                                                 Stream<cpu>* s) {               \
+    DType lwork(0);                                                                              \
+    MXNET_LAPACK_##func(                                                                         \
+        MXNET_LAPACK_COL_MAJOR, A.size(0), A.dptr_, A.stride_, nullptr, &lwork, -1);             \
+    return static_cast<lapack_index_t>(lwork);                                                   \
+  }
 
 LINALG_CPU_GETRI_WORKSPACE_QUERY(sgetri, float)
 LINALG_CPU_GETRI_WORKSPACE_QUERY(dgetri, double)
@@ -1588,47 +1967,46 @@ LINALG_CPU_GETRI_WORKSPACE_QUERY(dgetri, double)
 // batches of small matrices, so performance issue may happen when computing
 // large matices. We leave it here until MAGMA which has "getri" is introduced
 // into MXNet.
-#define LINALG_GPU_BATCH_GETRI(fname, DType) \
-template<> inline \
-void linalg_batch_getri<gpu, DType>(const Tensor<gpu, 3, DType>& A, \
-                                    const Tensor<gpu, 3, DType>& LU, \
-                                    const Tensor<gpu, 2, int>& pivot, \
-                                    Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using namespace mxnet::op::mxnet_op; \
-  CHECK_NOTNULL(s); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getri, info, int, A.size(0)); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getri, \
-      A_ptr_buf, DType *, A.size(0)); \
-  DType **A_ptr = static_cast<DType **>(A_ptr_buf.dptr); \
-  EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getri, \
-      LU_ptr_buf, DType *, A.size(0)); \
-  DType **LU_ptr = static_cast<DType **>(LU_ptr_buf.dptr); \
-  Kernel<set_matrix, gpu>::Launch(s, A.size(0), \
-                                  A_ptr, A.dptr_, \
-                                  A.size(1) * A.size(2)); \
-  Kernel<set_matrix, gpu>::Launch(s, LU.size(0), \
-                                  LU_ptr, LU.dptr_, \
-                                  LU.size(1) * LU.size(2)); \
-  CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s), A.size(1), \
-                            const_cast<const DType **>(LU_ptr), LU.size(2), \
-                            const_cast<const int *>(pivot.dptr_), A_ptr, A.size(2), \
-                            static_cast<int *>(info.dptr), A.size(0))) \
-  Storage::Get()->Free(info); \
-  Storage::Get()->Free(A_ptr_buf); \
-  Storage::Get()->Free(LU_ptr_buf); \
-}
+#define LINALG_GPU_BATCH_GETRI(fname, DType)                                                   \
+  template <>                                                                                  \
+  inline void linalg_batch_getri<gpu, DType>(const Tensor<gpu, 3, DType>& A,                   \
+                                             const Tensor<gpu, 3, DType>& LU,                  \
+                                             const Tensor<gpu, 2, int>& pivot,                 \
+                                             Stream<gpu>* s) {                                 \
+    using namespace mxnet;                                                                     \
+    using namespace mxnet::op::mxnet_op;                                                       \
+    CHECK_NOTNULL(s);                                                                          \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getri, info, int, A.size(0));                     \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getri, A_ptr_buf, DType*, A.size(0));             \
+    DType** A_ptr = static_cast<DType**>(A_ptr_buf.dptr);                                      \
+    EPHEMERAL_GPU_STORAGE_ALLOC(linalg_batch_getri, LU_ptr_buf, DType*, A.size(0));            \
+    DType** LU_ptr = static_cast<DType**>(LU_ptr_buf.dptr);                                    \
+    Kernel<set_matrix, gpu>::Launch(s, A.size(0), A_ptr, A.dptr_, A.size(1) * A.size(2));      \
+    Kernel<set_matrix, gpu>::Launch(s, LU.size(0), LU_ptr, LU.dptr_, LU.size(1) * LU.size(2)); \
+    CUBLAS_CALL(cublas##fname(Stream<gpu>::GetBlasHandle(s),                                   \
+                              A.size(1),                                                       \
+                              const_cast<const DType**>(LU_ptr),                               \
+                              LU.size(2),                                                      \
+                              const_cast<const int*>(pivot.dptr_),                             \
+                              A_ptr,                                                           \
+                              A.size(2),                                                       \
+                              static_cast<int*>(info.dptr),                                    \
+                              A.size(0)))                                                      \
+    Storage::Get()->Free(info);                                                                \
+    Storage::Get()->Free(A_ptr_buf);                                                           \
+    Storage::Get()->Free(LU_ptr_buf);                                                          \
+  }
 
 #else
 
-#define LINALG_GPU_BATCH_GETRI(fname, DType) \
-template<> inline \
-void linalg_batch_getri<gpu, DType>(const Tensor<gpu, 3, DType>& A, \
-                                    const Tensor<gpu, 3, DType>& LU, \
-                                    const Tensor<gpu, 2, int>& pivot, \
-                                    Stream<gpu> *s) { \
-  LOG(FATAL) << "batched getri requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_BATCH_GETRI(fname, DType)                                   \
+  template <>                                                                  \
+  inline void linalg_batch_getri<gpu, DType>(const Tensor<gpu, 3, DType>& A,   \
+                                             const Tensor<gpu, 3, DType>& LU,  \
+                                             const Tensor<gpu, 2, int>& pivot, \
+                                             Stream<gpu>* s) {                 \
+    LOG(FATAL) << "batched getri requires CUDA version >= 8.0!";               \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1642,67 +2020,66 @@ LINALG_GPU_BATCH_GETRI(DgetriBatched, double)
 // CPU/GPU-versions of matrix inverse combining LAPACK function "getrf" and "getri"
 
 // Note A = inverse(B)
-#define LINALG_CPU_BATCH_INVERSE(xpu, DType) \
-template<> inline \
-void linalg_batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
-                                      const Tensor<xpu, 3, DType>& B, \
-                                      const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  lapack_index_t lwork(linalg_getri_workspace_query(A[0], s)); \
-  lapack_index_t workspace_size = (sizeof(lapack_index_t) * A.size(1) + sizeof(DType) * lwork + \
-    sizeof(DType) - 1) / sizeof(DType); \
-  Tensor<xpu, 1, DType> workspace = ctx.requested[0].\
-    get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s); \
-  const Tensor<xpu, 1, lapack_index_t> pivot(reinterpret_cast<lapack_index_t *>(workspace.dptr_), \
-                                  Shape1(A.size(1))); \
-  const Tensor<xpu, 1, DType> work(reinterpret_cast<DType *>(pivot.dptr_ + pivot.MSize()), \
-                                   Shape1(lwork)); \
-  if (A.dptr_ != B.dptr_) Copy(A, B, s); \
-  for (lapack_index_t i = 0; i < A.size(0); ++i) { \
-    linalg_getrf(A[i], pivot, true, s); \
-    linalg_getri(A[i], pivot, work, s); \
-  } \
-}
+#define LINALG_CPU_BATCH_INVERSE(xpu, DType)                                                       \
+  template <>                                                                                      \
+  inline void linalg_batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& A,                     \
+                                               const Tensor<xpu, 3, DType>& B,                     \
+                                               const mxnet::OpContext& ctx) {                      \
+    Stream<xpu>* s = ctx.get_stream<xpu>();                                                        \
+    lapack_index_t lwork(linalg_getri_workspace_query(A[0], s));                                   \
+    lapack_index_t workspace_size =                                                                \
+        (sizeof(lapack_index_t) * A.size(1) + sizeof(DType) * lwork + sizeof(DType) - 1) /         \
+        sizeof(DType);                                                                             \
+    Tensor<xpu, 1, DType> workspace =                                                              \
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s);                \
+    const Tensor<xpu, 1, lapack_index_t> pivot(reinterpret_cast<lapack_index_t*>(workspace.dptr_), \
+                                               Shape1(A.size(1)));                                 \
+    const Tensor<xpu, 1, DType> work(reinterpret_cast<DType*>(pivot.dptr_ + pivot.MSize()),        \
+                                     Shape1(lwork));                                               \
+    if (A.dptr_ != B.dptr_)                                                                        \
+      Copy(A, B, s);                                                                               \
+    for (lapack_index_t i = 0; i < A.size(0); ++i) {                                               \
+      linalg_getrf(A[i], pivot, true, s);                                                          \
+      linalg_getri(A[i], pivot, work, s);                                                          \
+    }                                                                                              \
+  }
 LINALG_CPU_BATCH_INVERSE(cpu, float)
 LINALG_CPU_BATCH_INVERSE(cpu, double)
 
-
 #ifdef __CUDACC__
 
 // GETRF and GETRI only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_BATCH_INVERSE(xpu, DType) \
-template<> inline \
-void linalg_batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
-                                      const Tensor<xpu, 3, DType>& B, \
-                                      const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  int pivot_size = sizeof(int) * A.size(0) * A.size(1); \
-  int matrix_size = sizeof(DType) * A.shape_.Size(); \
-  int workspace_size = (pivot_size + matrix_size + \
-    sizeof(DType) - 1) / sizeof(DType); \
-  Tensor<xpu, 1, DType> workspace = ctx.requested[0].\
-    get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s); \
-  const Tensor<xpu, 2, int> pivot(reinterpret_cast<int *>(workspace.dptr_), \
-                                  Shape2(A.size(0), A.size(1))); \
-  int offset = pivot.MSize() & 1 ? pivot.MSize() + 1 : pivot.MSize(); \
-  const Tensor<xpu, 3, DType> LU(reinterpret_cast<DType *>(pivot.dptr_ + offset), \
-                                 A.shape_); \
-  Copy(LU, B, s); \
-  linalg_batch_getrf(LU, pivot, true, s); \
-  linalg_batch_getri(A, LU, pivot, s); \
-}
+#define LINALG_GPU_BATCH_INVERSE(xpu, DType)                                                  \
+  template <>                                                                                 \
+  inline void linalg_batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& A,                \
+                                               const Tensor<xpu, 3, DType>& B,                \
+                                               const mxnet::OpContext& ctx) {                 \
+    Stream<xpu>* s     = ctx.get_stream<xpu>();                                               \
+    int pivot_size     = sizeof(int) * A.size(0) * A.size(1);                                 \
+    int matrix_size    = sizeof(DType) * A.shape_.Size();                                     \
+    int workspace_size = (pivot_size + matrix_size + sizeof(DType) - 1) / sizeof(DType);      \
+    Tensor<xpu, 1, DType> workspace =                                                         \
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s);           \
+    const Tensor<xpu, 2, int> pivot(reinterpret_cast<int*>(workspace.dptr_),                  \
+                                    Shape2(A.size(0), A.size(1)));                            \
+    int offset = pivot.MSize() & 1 ? pivot.MSize() + 1 : pivot.MSize();                       \
+    const Tensor<xpu, 3, DType> LU(reinterpret_cast<DType*>(pivot.dptr_ + offset), A.shape_); \
+    Copy(LU, B, s);                                                                           \
+    linalg_batch_getrf(LU, pivot, true, s);                                                   \
+    linalg_batch_getri(A, LU, pivot, s);                                                      \
+  }
 
 #else
 
-#define LINALG_GPU_BATCH_INVERSE(xpu, DType) \
-template<> inline \
-void linalg_batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
-                                      const Tensor<xpu, 3, DType>& B, \
-                                      const mxnet::OpContext& ctx) { \
-  LOG(FATAL) << "gpu matrix inverse requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_BATCH_INVERSE(xpu, DType)                                   \
+  template <>                                                                  \
+  inline void linalg_batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& A, \
+                                               const Tensor<xpu, 3, DType>& B, \
+                                               const mxnet::OpContext& ctx) {  \
+    LOG(FATAL) << "gpu matrix inverse requires CUDA version >= 8.0!";          \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -1715,24 +2092,24 @@ LINALG_GPU_BATCH_INVERSE(gpu, double)
 
 // CPU/GPU-versions of helper functions used in matrix determinant operators
 
-#define LINALG_CPU_BATCH_DET_HELPER(xpu, DType, IndexT) \
-template<> inline \
-void linalg_batch_det_backward_helper<xpu, DType>(const Tensor<xpu, 3, DType>& LU, \
-                                         const Tensor<xpu, 2, IndexT>& pivot, \
-                                         const Tensor<xpu, 1, DType>& det, \
-                                         const Tensor<xpu, 3, DType>& temp, \
-                                         const DType zero_det, \
-                                         const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  lapack_index_t lwork(linalg_getri_workspace_query(LU[0], s)); \
-  Tensor<xpu, 1, DType> work = ctx.requested[0].\
-    get_space_typed<xpu, 1, DType>(Shape1(lwork), s); \
-  for (index_t i = 0; i < LU.size(0); ++i) { \
-    if (det[i] != zero_det) { \
-      linalg_getri(LU[i], pivot[i], work, s); \
-    } \
-  } \
-}
+#define LINALG_CPU_BATCH_DET_HELPER(xpu, DType, IndexT)                                         \
+  template <>                                                                                   \
+  inline void linalg_batch_det_backward_helper<xpu, DType>(const Tensor<xpu, 3, DType>& LU,     \
+                                                           const Tensor<xpu, 2, IndexT>& pivot, \
+                                                           const Tensor<xpu, 1, DType>& det,    \
+                                                           const Tensor<xpu, 3, DType>& temp,   \
+                                                           const DType zero_det,                \
+                                                           const mxnet::OpContext& ctx) {       \
+    Stream<xpu>* s = ctx.get_stream<xpu>();                                                     \
+    lapack_index_t lwork(linalg_getri_workspace_query(LU[0], s));                               \
+    Tensor<xpu, 1, DType> work =                                                                \
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(lwork), s);                      \
+    for (index_t i = 0; i < LU.size(0); ++i) {                                                  \
+      if (det[i] != zero_det) {                                                                 \
+        linalg_getri(LU[i], pivot[i], work, s);                                                 \
+      }                                                                                         \
+    }                                                                                           \
+  }
 
 LINALG_CPU_BATCH_DET_HELPER(cpu, float, LapackIndex<cpu>::IndexT)
 LINALG_CPU_BATCH_DET_HELPER(cpu, double, LapackIndex<cpu>::IndexT)
@@ -1740,31 +2117,31 @@ LINALG_CPU_BATCH_DET_HELPER(cpu, double, LapackIndex<cpu>::IndexT)
 // GETRF and GETRI only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_BATCH_DET_HELPER(xpu, DType) \
-template<> inline \
-void linalg_batch_det_backward_helper<xpu, DType>(const Tensor<xpu, 3, DType>& LU, \
-                                         const Tensor<xpu, 2, int>& pivot, \
-                                         const Tensor<xpu, 1, DType>& det, \
-                                         const Tensor<xpu, 3, DType>& temp, \
-                                         const DType zero_det, \
-                                         const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  linalg_batch_getri(temp, LU, pivot, s); \
-  Copy(LU, temp, s); \
-}
+#define LINALG_GPU_BATCH_DET_HELPER(xpu, DType)                                               \
+  template <>                                                                                 \
+  inline void linalg_batch_det_backward_helper<xpu, DType>(const Tensor<xpu, 3, DType>& LU,   \
+                                                           const Tensor<xpu, 2, int>& pivot,  \
+                                                           const Tensor<xpu, 1, DType>& det,  \
+                                                           const Tensor<xpu, 3, DType>& temp, \
+                                                           const DType zero_det,              \
+                                                           const mxnet::OpContext& ctx) {     \
+    Stream<xpu>* s = ctx.get_stream<xpu>();                                                   \
+    linalg_batch_getri(temp, LU, pivot, s);                                                   \
+    Copy(LU, temp, s);                                                                        \
+  }
 
 #else
 
-#define LINALG_GPU_BATCH_DET_HELPER(xpu, DType) \
-template<> inline \
-void linalg_batch_det_backward_helper<xpu, DType>(const Tensor<xpu, 3, DType>& LU, \
-                                         const Tensor<xpu, 2, int>& pivot, \
-                                         const Tensor<xpu, 1, DType>& det, \
-                                         const Tensor<xpu, 3, DType>& temp, \
-                                         const DType zero_det, \
-                                         const mxnet::OpContext& ctx) { \
-  LOG(FATAL) << "gpu matrix inverse requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_BATCH_DET_HELPER(xpu, DType)                                               \
+  template <>                                                                                 \
+  inline void linalg_batch_det_backward_helper<xpu, DType>(const Tensor<xpu, 3, DType>& LU,   \
+                                                           const Tensor<xpu, 2, int>& pivot,  \
+                                                           const Tensor<xpu, 1, DType>& det,  \
+                                                           const Tensor<xpu, 3, DType>& temp, \
+                                                           const DType zero_det,              \
+                                                           const mxnet::OpContext& ctx) {     \
+    LOG(FATAL) << "gpu matrix inverse requires CUDA version >= 8.0!";                         \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
diff --git a/src/operator/loss_binary_op-inl.h b/src/operator/loss_binary_op-inl.h
index 1d71993da515..037f35870d0f 100644
--- a/src/operator/loss_binary_op-inl.h
+++ b/src/operator/loss_binary_op-inl.h
@@ -35,69 +35,64 @@ namespace op {
 
 // return a shape of scalar
 inline bool SoftmaxCrossEntropyShape(const nnvm::NodeAttrs& attrs,
-                                     mxnet::ShapeVector *in_attrs,
-                                     mxnet::ShapeVector *out_attrs) {
-  CHECK_EQ((*in_attrs)[0].ndim(), 2U)
-      << "SoftmaxCrossEntropy only accept 2D data";
-  CHECK_EQ((*in_attrs)[1].ndim(), 1U)
-      << "SoftmaxCrossEntropy only accept 1D label";
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
+  CHECK_EQ((*in_attrs)[0].ndim(), 2U) << "SoftmaxCrossEntropy only accept 2D data";
+  CHECK_EQ((*in_attrs)[1].ndim(), 1U) << "SoftmaxCrossEntropy only accept 1D label";
   CHECK_EQ((*in_attrs)[0][0], (*in_attrs)[1][0])
       << "SoftmaxCrossEntropy: data label shape mismatch";
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(1, 1));
   return true;
 }
 
-template<typename xpu>
+template <typename xpu>
 void SoftmaxCrossEntropyForward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<TBlob>& outputs) {
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(outputs[0].type_flag_, inputs[0].type_flag_)
-    << "Binary function only support input/output with the same type";
+      << "Binary function only support input/output with the same type";
   CHECK_EQ(outputs[0].type_flag_, inputs[1].type_flag_)
-    << "Binary function only support input/output with the same type";
+      << "Binary function only support input/output with the same type";
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    mshadow::Tensor<xpu, 1, DType> out = outputs[0].get<xpu, 1, DType>(s);
-    mshadow::Tensor<xpu, 1, DType> mlabel = inputs[1].get<xpu, 1, DType>(s);
-    mshadow::Tensor<xpu, 2, DType> mdata = inputs[0].get<xpu, 2, DType>(s);
+    mshadow::Tensor<xpu, 1, DType> out       = outputs[0].get<xpu, 1, DType>(s);
+    mshadow::Tensor<xpu, 1, DType> mlabel    = inputs[1].get<xpu, 1, DType>(s);
+    mshadow::Tensor<xpu, 2, DType> mdata     = inputs[0].get<xpu, 2, DType>(s);
     mshadow::Tensor<xpu, 1, DType> workspace = ctx.requested[0].get_space_typed<xpu, 1, DType>(
         mshadow::Shape1(mdata.shape_.Size() + mlabel.size(0)), s);
     mshadow::Tensor<xpu, 2, DType> temp1(workspace.dptr_, mdata.shape_, s);
-    mshadow::Tensor<xpu, 2, DType> temp2(workspace.dptr_ + mdata.shape_.Size(),
-        mshadow::Shape2(1, mlabel.size(0)), s);
+    mshadow::Tensor<xpu, 2, DType> temp2(
+        workspace.dptr_ + mdata.shape_.Size(), mshadow::Shape2(1, mlabel.size(0)), s);
     // calculate softmax on temp
     // TODO(tqchen): change to SoftmaxLog later
     mshadow::Softmax(temp1, mdata);
     // choose the softmax rows
     mshadow::Tensor<xpu, 1, DType> tdst = temp2[0];
-    tdst = F<mshadow_op::negation>(
-        F<mshadow_op::log>(
-            F<mshadow_op::maximum>(mat_choose_row_element(temp1, mlabel),
-                                   scalar<DType>(1e-8f))));
+    tdst                                = F<mshadow_op::negation>(F<mshadow_op::log>(
+        F<mshadow_op::maximum>(mat_choose_row_element(temp1, mlabel), scalar<DType>(1e-8f))));
     ASSIGN_DISPATCH(out, req[0], sumall_except_dim<0>(temp2));
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void SoftmaxCrossEntropyBackward(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
                                  const std::vector<OpReqType>& req,
                                  const std::vector<TBlob>& outputs) {
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  CHECK_EQ(req[1], kNullOp)
-      << "SoftmaxCrossEntropy: Cannot take gradient wrt label";
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  CHECK_EQ(req[1], kNullOp) << "SoftmaxCrossEntropy: Cannot take gradient wrt label";
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    mshadow::Tensor<xpu, 1, DType> mlabel = inputs[2].get<xpu, 1, DType>(s);
-    mshadow::Tensor<xpu, 2, DType> mdata = inputs[1].get<xpu, 2, DType>(s);
+    mshadow::Tensor<xpu, 1, DType> mlabel     = inputs[2].get<xpu, 1, DType>(s);
+    mshadow::Tensor<xpu, 2, DType> mdata      = inputs[1].get<xpu, 2, DType>(s);
     mshadow::Tensor<xpu, 2, DType> mdata_grad = outputs[0].get<xpu, 2, DType>(s);
-    mshadow::Tensor<xpu, 1, DType> mscale = inputs[0].get<xpu, 1, DType>(s);
-    mshadow::Tensor<xpu, 2, DType> temp = ctx.requested[0].get_space_typed<xpu, 2, DType>(
-        mdata.shape_, s);
+    mshadow::Tensor<xpu, 1, DType> mscale     = inputs[0].get<xpu, 1, DType>(s);
+    mshadow::Tensor<xpu, 2, DType> temp =
+        ctx.requested[0].get_space_typed<xpu, 2, DType>(mdata.shape_, s);
     mshadow::Softmax(temp, mdata);
     mshadow::SoftmaxGrad(temp, temp, mlabel);
     ASSIGN_DISPATCH(mdata_grad, req[0], broadcast_scalar(mscale, temp.shape_) * temp);
diff --git a/src/operator/loss_binary_op.cc b/src/operator/loss_binary_op.cc
index 5bf49669db89..3e3b908ea2ea 100644
--- a/src/operator/loss_binary_op.cc
+++ b/src/operator/loss_binary_op.cc
@@ -21,14 +21,14 @@
  * Copyright (c) 2015 by Contributors
  * \file loss_binary_op.cc
  * \brief loss function that takes a data and label
-*/
+ */
 #include "./loss_binary_op-inl.h"
 
 namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(softmax_cross_entropy)
-.describe(R"code(Calculate cross entropy of softmax output and one-hot label.
+    .describe(R"code(Calculate cross entropy of softmax output and one-hot label.
 
 - This operator computes the cross entropy in two steps:
   - Applies softmax function on the input array.
@@ -57,33 +57,33 @@ Example::
   softmax_cross_entropy(data, label) = - log(0.66524084) - log(0.97962922) = 0.4281871
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", SoftmaxCrossEntropyShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxCrossEntropyForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_softmax_cross_entropy"})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "label"};
-})
-.add_argument("data", "NDArray-or-Symbol", "Input data")
-.add_argument("label", "NDArray-or-Symbol", "Input label");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", SoftmaxCrossEntropyShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxCrossEntropyForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_softmax_cross_entropy"})
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "label"};
+                                     })
+    .add_argument("data", "NDArray-or-Symbol", "Input data")
+    .add_argument("label", "NDArray-or-Symbol", "Input label");
 
 NNVM_REGISTER_OP(_backward_softmax_cross_entropy)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxCrossEntropyBackward<cpu>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxCrossEntropyBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/loss_binary_op.cu b/src/operator/loss_binary_op.cu
index 74ff563cf3e3..1d74392e7d1f 100644
--- a/src/operator/loss_binary_op.cu
+++ b/src/operator/loss_binary_op.cu
@@ -21,17 +21,17 @@
  * Copyright (c) 2015 by Contributors
  * \file loss_binary_op.cu
  * \brief loss function that takes a data and label
-*/
+ */
 #include "./loss_binary_op-inl.h"
 
 namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(softmax_cross_entropy)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxCrossEntropyForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxCrossEntropyForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_softmax_cross_entropy)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxCrossEntropyBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxCrossEntropyBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/make_loss-inl.h b/src/operator/make_loss-inl.h
index 12969d324fd0..465797feab48 100644
--- a/src/operator/make_loss-inl.h
+++ b/src/operator/make_loss-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file make_loss-inl.h
  * \brief special layer for propagating loss
-*/
+ */
 #ifndef MXNET_OPERATOR_MAKE_LOSS_INL_H_
 #define MXNET_OPERATOR_MAKE_LOSS_INL_H_
 #include <dmlc/logging.h>
@@ -39,10 +39,10 @@ namespace mxnet {
 namespace op {
 
 namespace make_loss_enum {
-enum MakeLossOpInputs {kData};
-enum MakeLossOpOutputs {kOut};
-enum MakeLossOpType {kNull, kBatch, kValid};
-enum MakeLossOpResource {kTempSpace};
+enum MakeLossOpInputs { kData };
+enum MakeLossOpOutputs { kOut };
+enum MakeLossOpType { kNull, kBatch, kValid };
+enum MakeLossOpResource { kTempSpace };
 }  // namespace make_loss_enum
 
 struct MakeLossParam : public dmlc::Parameter<MakeLossParam> {
@@ -50,69 +50,75 @@ struct MakeLossParam : public dmlc::Parameter<MakeLossParam> {
   int normalization;
   float valid_thresh;
   DMLC_DECLARE_PARAMETER(MakeLossParam) {
-    DMLC_DECLARE_FIELD(grad_scale).set_default(1.0f)
-    .describe("Gradient scale as a supplement to unary and binary operators");
-    DMLC_DECLARE_FIELD(valid_thresh).set_default(0.0f)
-    .describe("clip each element in the array to 0 when it is less than ``valid_thresh``."
-              " This is used when ``normalization`` is set to ``'valid'``.");
+    DMLC_DECLARE_FIELD(grad_scale)
+        .set_default(1.0f)
+        .describe("Gradient scale as a supplement to unary and binary operators");
+    DMLC_DECLARE_FIELD(valid_thresh)
+        .set_default(0.0f)
+        .describe(
+            "clip each element in the array to 0 when it is less than ``valid_thresh``."
+            " This is used when ``normalization`` is set to ``'valid'``.");
     DMLC_DECLARE_FIELD(normalization)
-    .add_enum("null", make_loss_enum::kNull)
-    .add_enum("batch", make_loss_enum::kBatch)
-    .add_enum("valid", make_loss_enum::kValid)
-    .set_default(make_loss_enum::kNull)
-    .describe("If this is set to null, the output gradient will not be normalized. "
-              "If this is set to batch, the output gradient will be divided by the batch size. "
-              "If this is set to valid, the output gradient will be divided by the number of "
-              "valid input elements.");
+        .add_enum("null", make_loss_enum::kNull)
+        .add_enum("batch", make_loss_enum::kBatch)
+        .add_enum("valid", make_loss_enum::kValid)
+        .set_default(make_loss_enum::kNull)
+        .describe(
+            "If this is set to null, the output gradient will not be normalized. "
+            "If this is set to batch, the output gradient will be divided by the batch size. "
+            "If this is set to valid, the output gradient will be divided by the number of "
+            "valid input elements.");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class MakeLossOp : public Operator {
  public:
   explicit MakeLossOp(MakeLossParam param) : param_(param) {}
 
-  virtual void Forward(const OpContext &ctx,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1U) << "MakeLoss can only be used to one input";
     CHECK_EQ(out_data.size(), 1U);
     if (req[make_loss_enum::kOut] != kWriteInplace) {
-      Stream<xpu> *s = ctx.get_stream<xpu>();
+      Stream<xpu>* s             = ctx.get_stream<xpu>();
       Tensor<xpu, 2, DType> data = in_data[make_loss_enum::kData].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> out = out_data[make_loss_enum::kOut].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> out  = out_data[make_loss_enum::kOut].FlatTo2D<xpu, DType>(s);
       Assign(out, req[make_loss_enum::kOut], F<mshadow_op::identity>(data));
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
     Tensor<xpu, 2, DType> grad = in_grad[make_loss_enum::kData].FlatTo2D<xpu, DType>(s);
     if (param_.normalization == make_loss_enum::kValid) {
       Tensor<xpu, 2, DType> data = in_data[make_loss_enum::kData].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 1, DType> temp = ctx.requested[make_loss_enum::kTempSpace]
-        .get_space_typed<xpu, 1, DType>(mshadow::Shape1(1), s);
+      Tensor<xpu, 1, DType> temp =
+          ctx.requested[make_loss_enum::kTempSpace].get_space_typed<xpu, 1, DType>(
+              mshadow::Shape1(1), s);
       temp = sumall_except_dim<0>(reduce_keepdim<red::sum, false>(
-        F<mshadow_op::threshold>(ScalarExp<DType>(param_.valid_thresh), data), 0));
+          F<mshadow_op::threshold>(ScalarExp<DType>(param_.valid_thresh), data), 0));
       temp = F<mshadow_op::maximum>(ScalarExp<DType>(1.f), temp);  // avoid zero
-      Assign(grad, req[make_loss_enum::kData],
-        ScalarExp<DType>(param_.grad_scale) / broadcast<0>(
-        broadcast_keepdim(temp, 0, grad.shape_[0]), grad.shape_));
+      Assign(grad,
+             req[make_loss_enum::kData],
+             ScalarExp<DType>(param_.grad_scale) /
+                 broadcast<0>(broadcast_keepdim(temp, 0, grad.shape_[0]), grad.shape_));
     } else if (param_.normalization == make_loss_enum::kBatch) {
-      Assign(grad, req[make_loss_enum::kData],
-        ScalarExp<DType>(param_.grad_scale / grad.shape_[0]));
+      Assign(
+          grad, req[make_loss_enum::kData], ScalarExp<DType>(param_.grad_scale / grad.shape_[0]));
     } else {
       Assign(grad, req[make_loss_enum::kData], ScalarExp<DType>(param_.grad_scale));
     }
@@ -123,7 +129,7 @@ class MakeLossOp : public Operator {
 };  // class MakeLossOp
 
 template <typename xpu>
-Operator *CreateOp(MakeLossParam param, int dtype);
+Operator* CreateOp(MakeLossParam param, int dtype);
 
 #if DMLC_USE_CXX11
 class MakeLossProp : public OperatorProperty {
@@ -136,21 +142,22 @@ class MakeLossProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1U);
-    const mxnet::TShape &dshape = in_shape->at(make_loss_enum::kData);
-    if (dshape.ndim() == 0) return false;
+    const mxnet::TShape& dshape = in_shape->at(make_loss_enum::kData);
+    if (dshape.ndim() == 0)
+      return false;
     out_shape->clear();
     out_shape->push_back(dshape);
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_EQ(in_type->size(), 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "Input must have specified type";
@@ -160,7 +167,7 @@ class MakeLossProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new MakeLossProp();
+    auto ptr    = new MakeLossProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -169,18 +176,16 @@ class MakeLossProp : public OperatorProperty {
     return "MakeLoss";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-      const std::vector<int> &out_grad,
-      const std::vector<int> &in_data,
-      const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (param_.normalization == make_loss_enum::kValid) {
       return {in_data[make_loss_enum::kData]};
     }
     return {};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     if (param_.normalization == make_loss_enum::kValid) {
       return {ResourceRequest::kTempSpace};
     }
@@ -188,8 +193,8 @@ class MakeLossProp : public OperatorProperty {
   }
 
   std::vector<std::pair<int, void*> > ForwardInplaceOption(
-      const std::vector<int> &in_data,
-      const std::vector<void*> &out_data) const override {
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     return {{in_data[make_loss_enum::kData], out_data[make_loss_enum::kOut]}};
   }
 
@@ -198,8 +203,9 @@ class MakeLossProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   MakeLossParam param_;
diff --git a/src/operator/make_loss.cc b/src/operator/make_loss.cc
index 950f17ed955e..1ea2e6138b82 100644
--- a/src/operator/make_loss.cc
+++ b/src/operator/make_loss.cc
@@ -21,22 +21,21 @@
  * Copyright (c) 2015 by Contributors
  * \file make_loss.cc
  * \brief special layer for propagating loss
-*/
+ */
 #include "./make_loss-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(MakeLossParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MakeLossOp<cpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<cpu>(MakeLossParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MakeLossOp<cpu, DType>(param); });
   return op;
 }
 
-Operator *MakeLossProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                         std::vector<int> *in_type) const {
+Operator* MakeLossProp::CreateOperatorEx(Context ctx,
+                                         mxnet::ShapeVector* in_shape,
+                                         std::vector<int>* in_type) const {
   mxnet::ShapeVector out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferType(in_type, &out_type, &aux_type));
@@ -47,7 +46,7 @@ Operator *MakeLossProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_sha
 DMLC_REGISTER_PARAMETER(MakeLossParam);
 
 MXNET_REGISTER_OP_PROPERTY(MakeLoss, MakeLossProp)
-.describe(R"code(Make your own loss function in network construction.
+    .describe(R"code(Make your own loss function in network construction.
 
 This operator accepts a customized loss function symbol as a terminal loss and
 the symbol should be an operator with no backward dependency.
@@ -69,8 +68,8 @@ so that the gradient of the loss will be rescaled in the backpropagation.
 .. note:: This operator should be used as a Symbol instead of NDArray.
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input array.")
-.add_arguments(MakeLossParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input array.")
+    .add_arguments(MakeLossParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/make_loss.cu b/src/operator/make_loss.cu
index de7ba6d9fd81..7a6e8311d786 100644
--- a/src/operator/make_loss.cu
+++ b/src/operator/make_loss.cu
@@ -21,20 +21,17 @@
  * Copyright (c) 2015 by Contributors
  * \file make_loss.cu
  * \brief special layer for propagating loss
-*/
+ */
 #include "./make_loss-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<gpu>(MakeLossParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new MakeLossOp<gpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<gpu>(MakeLossParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new MakeLossOp<gpu, DType>(param); });
   return op;
 }
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/math_functions-inl.h b/src/operator/math_functions-inl.h
index 5f95654cad37..40172c96cdbc 100644
--- a/src/operator/math_functions-inl.h
+++ b/src/operator/math_functions-inl.h
@@ -21,8 +21,7 @@
  * \file special_functions-inl.h
  * \brief
  * \author Matthias Seeger
-*/
-
+ */
 
 #ifndef MXNET_OPERATOR_MATH_FUNCTIONS_INL_H_
 #define MXNET_OPERATOR_MATH_FUNCTIONS_INL_H_
@@ -40,30 +39,30 @@ namespace math {
 // - For DType == double or DType == integer: math::name(a) does computation in double
 //   and returns double
 
-#define MXNET_UNARY_MATH_FUNC(name) \
-MSHADOW_XINLINE \
-float name(float a) { \
-  return ::name##f(a); \
-} \
-MSHADOW_XINLINE \
-double name(double a) { \
-  return ::name(a); \
-} \
-template<typename DType> MSHADOW_XINLINE \
-typename std::enable_if<std::is_integral<DType>::value, double>::type \
-name(DType a) { \
-  return ::name(static_cast<double>(a)); \
-}
-
-#define MXNET_BINARY_MATH_FUNC(name) \
-template<typename DType> MSHADOW_XINLINE \
-float name(DType a, DType b) { \
-  return ::name##f(static_cast<float>(a), static_cast<float>(b)); \
-} \
-MSHADOW_XINLINE \
-double name(double a, double b) { \
-  return ::name(a, b); \
-}
+#define MXNET_UNARY_MATH_FUNC(name)                                                           \
+  MSHADOW_XINLINE                                                                             \
+  float name(float a) {                                                                       \
+    return ::name##f(a);                                                                      \
+  }                                                                                           \
+  MSHADOW_XINLINE                                                                             \
+  double name(double a) {                                                                     \
+    return ::name(a);                                                                         \
+  }                                                                                           \
+  template <typename DType>                                                                   \
+  MSHADOW_XINLINE typename std::enable_if<std::is_integral<DType>::value, double>::type name( \
+      DType a) {                                                                              \
+    return ::name(static_cast<double>(a));                                                    \
+  }
+
+#define MXNET_BINARY_MATH_FUNC(name)                                \
+  template <typename DType>                                         \
+  MSHADOW_XINLINE float name(DType a, DType b) {                    \
+    return ::name##f(static_cast<float>(a), static_cast<float>(b)); \
+  }                                                                 \
+  MSHADOW_XINLINE                                                   \
+  double name(double a, double b) {                                 \
+    return ::name(a, b);                                            \
+  }
 
 MXNET_UNARY_MATH_FUNC(erf)
 
@@ -127,8 +126,8 @@ MXNET_BINARY_MATH_FUNC(pow)
 
 MXNET_BINARY_MATH_FUNC(atan2)
 
-template<typename DType> MSHADOW_XINLINE
-float id(DType a) {
+template <typename DType>
+MSHADOW_XINLINE float id(DType a) {
   return static_cast<float>(a);
 }
 MSHADOW_XINLINE
@@ -136,8 +135,8 @@ double id(double a) {
   return a;
 }
 
-template<typename DType> MSHADOW_XINLINE
-float sqr(DType a) {
+template <typename DType>
+MSHADOW_XINLINE float sqr(DType a) {
   float af(static_cast<float>(a));
   return af * af;
 }
diff --git a/src/operator/mkl_functions-inl.h b/src/operator/mkl_functions-inl.h
index ae23b1e1d874..7b1a455332e7 100644
--- a/src/operator/mkl_functions-inl.h
+++ b/src/operator/mkl_functions-inl.h
@@ -22,7 +22,7 @@
  * \file mkl_functions-inl.h
  * \brief Wrapper for MKL VML functions
  * \author Tao Lv, Shufan Wu
-*/
+ */
 #ifndef MXNET_OPERATOR_MKL_FUNCTIONS_INL_H_
 #define MXNET_OPERATOR_MKL_FUNCTIONS_INL_H_
 
@@ -44,31 +44,31 @@ static bool check_type(const int t) {
   return (t == mshadow::kFloat32 || t == mshadow::kFloat64);
 }
 
-#define MXNET_MKL_UNARY_MATH_FUNC(name, func)                                               \
-struct name {                                                                               \
-  MSHADOW_XINLINE static void Vectorize(const index_t n, const float *src, float *dst) {    \
-    vs##func(static_cast<MKL_INT>(n), src, dst);                                            \
-  }                                                                                         \
-  MSHADOW_XINLINE static void Vectorize(const index_t n, const double *src, double *dst) {  \
-    vd##func(static_cast<MKL_INT>(n), src, dst);                                            \
-  }                                                                                         \
-};
-
-#define MXNET_MKL_BINARY_MATH_FUNC(name, func)                                        \
-struct name {                                                                         \
-  MSHADOW_XINLINE static void Vectorize(const index_t n,                              \
-                                        const float *a,                               \
-                                        const float *b,                               \
-                                        float *c) {                                   \
-    vs##func(static_cast<MKL_INT>(n), a, b, c);                                       \
-  }                                                                                   \
-  MSHADOW_XINLINE static void Vectorize(const index_t n,                              \
-                                        const double *a,                              \
-                                        const double *b,                              \
-                                        double *c) {                                  \
-    vd##func(static_cast<MKL_INT>(n), a, b, c);                                       \
-  }                                                                                   \
-};
+#define MXNET_MKL_UNARY_MATH_FUNC(name, func)                                                \
+  struct name {                                                                              \
+    MSHADOW_XINLINE static void Vectorize(const index_t n, const float* src, float* dst) {   \
+      vs##func(static_cast<MKL_INT>(n), src, dst);                                           \
+    }                                                                                        \
+    MSHADOW_XINLINE static void Vectorize(const index_t n, const double* src, double* dst) { \
+      vd##func(static_cast<MKL_INT>(n), src, dst);                                           \
+    }                                                                                        \
+  };
+
+#define MXNET_MKL_BINARY_MATH_FUNC(name, func)             \
+  struct name {                                            \
+    MSHADOW_XINLINE static void Vectorize(const index_t n, \
+                                          const float* a,  \
+                                          const float* b,  \
+                                          float* c) {      \
+      vs##func(static_cast<MKL_INT>(n), a, b, c);          \
+    }                                                      \
+    MSHADOW_XINLINE static void Vectorize(const index_t n, \
+                                          const double* a, \
+                                          const double* b, \
+                                          double* c) {     \
+      vd##func(static_cast<MKL_INT>(n), a, b, c);          \
+    }                                                      \
+  };
 
 MXNET_MKL_UNARY_MATH_FUNC(erf, Erf);
 MXNET_MKL_UNARY_MATH_FUNC(exp, Exp);
@@ -113,7 +113,7 @@ MXNET_MKL_BINARY_MATH_FUNC(pow, Pow);
 MXNET_MKL_BINARY_MATH_FUNC(hypot, Hypot);
 
 template <typename DType>
-MSHADOW_XINLINE static void sum_(index_t n, DType *in, DType *dst) {
+MSHADOW_XINLINE static void sum_(index_t n, DType* in, DType* dst) {
   DType sum = 0.0f;
   for (index_t i = 0; i < n; i++)
     sum += in[i];
@@ -125,19 +125,19 @@ MSHADOW_XINLINE static void sum_(index_t n, DType *in, DType *dst) {
 template <typename DType>
 MSHADOW_XINLINE static void LayerNormLastDim(index_t m,
                                              index_t n,
-                                             DType *a,
-                                             DType *b,
-                                             DType *gamma,
-                                             DType *beta,
-                                             DType *mean,
-                                             DType *var,
+                                             DType* a,
+                                             DType* b,
+                                             DType* gamma,
+                                             DType* beta,
+                                             DType* mean,
+                                             DType* var,
                                              DType eps) {
   auto nthreads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 #pragma omp parallel for num_threads(nthreads)
   for (index_t i = 0; i < m; i++) {
-    DType* in_offset = a + i * n;
-    DType* out_offset = b + i * n;
-    DType x_sum = 0.0f;
+    DType* in_offset   = a + i * n;
+    DType* out_offset  = b + i * n;
+    DType x_sum        = 0.0f;
     DType x_square_sum = 0.0f;
 
 #if !defined(_MSC_VER)
@@ -148,7 +148,7 @@ MSHADOW_XINLINE static void LayerNormLastDim(index_t m,
       x_square_sum += in_offset[j] * in_offset[j];
     }
     mean[i] = x_sum / n;
-    var[i] = math::sqrt(x_square_sum / n - mean[i] * mean[i] + eps);
+    var[i]  = math::sqrt(x_square_sum / n - mean[i] * mean[i] + eps);
 
 #if !defined(_MSC_VER)
 #pragma omp simd
diff --git a/src/operator/modulated_deformable_convolution-inl.h b/src/operator/modulated_deformable_convolution-inl.h
index c6426754f03a..7ffa204fbacb 100644
--- a/src/operator/modulated_deformable_convolution-inl.h
+++ b/src/operator/modulated_deformable_convolution-inl.h
@@ -25,7 +25,7 @@
  * \ref: https://github.com/Yangqing/caffe/wiki/Convolution-in-Caffe:-a-memo
  * \ref: https://arxiv.org/abs/1811.11168
  * \author Yuwen Xiong, Haozhi Qi, Jifeng Dai, Xizhou Zhu, Han Hu
-*/
+ */
 #ifndef MXNET_OPERATOR_MODULATED_DEFORMABLE_CONVOLUTION_INL_H_
 #define MXNET_OPERATOR_MODULATED_DEFORMABLE_CONVOLUTION_INL_H_
 
@@ -46,18 +46,17 @@
 #include "./contrib/nn/modulated_deformable_im2col.h"
 #include "./linalg.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace dmconv {
-  enum ModulatedDeformableConvolutionOpInputs { kData, kOffset, kMask, kWeight, kBias };
-  enum ModulatedDeformableConvolutionOpOutputs { kOut };
-  enum ModulatedDeformableConvolutionOpResource { kTempSpace };
-}
+enum ModulatedDeformableConvolutionOpInputs { kData, kOffset, kMask, kWeight, kBias };
+enum ModulatedDeformableConvolutionOpOutputs { kOut };
+enum ModulatedDeformableConvolutionOpResource { kTempSpace };
+}  // namespace dmconv
 
 struct ModulatedDeformableConvolutionParam
-  : public dmlc::Parameter<ModulatedDeformableConvolutionParam> {
+    : public dmlc::Parameter<ModulatedDeformableConvolutionParam> {
   mxnet::TShape kernel;
   mxnet::TShape stride;
   mxnet::TShape dilate;
@@ -71,55 +70,60 @@ struct ModulatedDeformableConvolutionParam
   dmlc::optional<int> layout;
   DMLC_DECLARE_PARAMETER(ModulatedDeformableConvolutionParam) {
     DMLC_DECLARE_FIELD(kernel).describe("Convolution kernel size: (h, w) or (d, h, w)");
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, -1))
-      .describe("Convolution stride: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(dilate).set_default(mxnet::TShape(0, -1))
-      .describe("Convolution dilate: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, -1))
-      .describe("Zero pad for convolution: (h, w) or (d, h, w). Defaults to no padding.");
-    DMLC_DECLARE_FIELD(num_filter).set_lower_bound(1)
-      .describe("Convolution filter(channel) number");
-    DMLC_DECLARE_FIELD(num_group).set_default(1)
-      .describe("Number of group partitions.");
-    DMLC_DECLARE_FIELD(num_deformable_group).set_default(1)
-      .describe("Number of deformable group partitions.");
-    DMLC_DECLARE_FIELD(workspace).set_default(1024).set_lower_bound(0)
-      .describe("Maximum temperal workspace allowed for convolution (MB).");
-    DMLC_DECLARE_FIELD(no_bias).set_default(false)
-      .describe("Whether to disable bias parameter.");
-    DMLC_DECLARE_FIELD(im2col_step).set_default(64)
-      .describe("Maximum number of images per im2col computation; "
-                "The total batch size should be divisable by this value or "
-                "smaller than this value; if you face out of memory problem, "
-                "you can try to use a smaller value here.");
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Convolution stride: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(dilate)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Convolution dilate: (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Zero pad for convolution: (h, w) or (d, h, w). Defaults to no padding.");
+    DMLC_DECLARE_FIELD(num_filter)
+        .set_lower_bound(1)
+        .describe("Convolution filter(channel) number");
+    DMLC_DECLARE_FIELD(num_group).set_default(1).describe("Number of group partitions.");
+    DMLC_DECLARE_FIELD(num_deformable_group)
+        .set_default(1)
+        .describe("Number of deformable group partitions.");
+    DMLC_DECLARE_FIELD(workspace).set_default(1024).set_lower_bound(0).describe(
+        "Maximum temperal workspace allowed for convolution (MB).");
+    DMLC_DECLARE_FIELD(no_bias).set_default(false).describe("Whether to disable bias parameter.");
+    DMLC_DECLARE_FIELD(im2col_step)
+        .set_default(64)
+        .describe(
+            "Maximum number of images per im2col computation; "
+            "The total batch size should be divisable by this value or "
+            "smaller than this value; if you face out of memory problem, "
+            "you can try to use a smaller value here.");
     DMLC_DECLARE_FIELD(layout)
-      .add_enum("NCW", mshadow::kNCW)
-      .add_enum("NCHW", mshadow::kNCHW)
-      .add_enum("NCDHW", mshadow::kNCDHW)
-      .set_default(dmlc::optional<int>())
-      .describe("Set layout for input, output and weight. Empty for\n    "
-        "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d.");
+        .add_enum("NCW", mshadow::kNCW)
+        .add_enum("NCHW", mshadow::kNCHW)
+        .add_enum("NCDHW", mshadow::kNCDHW)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Set layout for input, output and weight. Empty for\n    "
+            "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d.");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class ModulatedDeformableConvolutionOp : public Operator {
  public:
   explicit ModulatedDeformableConvolutionOp(ModulatedDeformableConvolutionParam p) {
     this->param_ = p;
     // convert MBytes first to Bytes and then to elements.
     param_.workspace = (param_.workspace << 20) / sizeof(DType);
-    CHECK(param_.layout.value() == mshadow::kNCW ||
-      param_.layout.value() == mshadow::kNCHW ||
-      param_.layout.value() == mshadow::kNCDHW)
-      << "Only support NCW, NCHW and NCDHW layout";
+    CHECK(param_.layout.value() == mshadow::kNCW || param_.layout.value() == mshadow::kNCHW ||
+          param_.layout.value() == mshadow::kNCDHW)
+        << "Only support NCW, NCHW and NCDHW layout";
   }
 
-  virtual void Forward(const OpContext &ctx,
-    const std::vector<TBlob> &in_data,
-    const std::vector<OpReqType> &req,
-    const std::vector<TBlob> &out_data,
-    const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(req[dmconv::kOut], kWriteTo);
@@ -132,8 +136,9 @@ class ModulatedDeformableConvolutionOp : public Operator {
                out_data[dmconv::kOut].shape_);
     Stream<xpu>* s = ctx.get_stream<xpu>();
     // allocate workspace for col_buffer
-    Tensor<xpu, 1, DType> workspace = ctx.requested[dmconv::kTempSpace]
-      .get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_ + num_*output_dim_), s);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[dmconv::kTempSpace].get_space_typed<xpu, 1, DType>(
+            Shape1(col_buffer_size_ + num_ * output_dim_), s);
     // calculate the shape of col_buffer
     mxnet::TShape col_buffer_shape(num_spatial_axes_ + 2, -1);
     col_buffer_shape[0] = conv_in_channels_ * param_.kernel.Size();
@@ -146,29 +151,37 @@ class ModulatedDeformableConvolutionOp : public Operator {
     // create a column buffer using workspace and col_buffer_shape
     TBlob col_buffer(workspace.dptr_, col_buffer_shape, xpu::kDevMask, DataType<DType>::kFlag);
     mxnet::TShape output_buffer_shape(1, -1);
-    output_buffer_shape[0] = num_*output_dim_;
-    TBlob output_buffer(workspace.dptr_ + col_buffer_size_, output_buffer_shape,
-                        xpu::kDevMask, DataType<DType>::kFlag);
+    output_buffer_shape[0] = num_ * output_dim_;
+    TBlob output_buffer(workspace.dptr_ + col_buffer_size_,
+                        output_buffer_shape,
+                        xpu::kDevMask,
+                        DataType<DType>::kFlag);
 
     // initialize weight and col_buffer 3D tensors for using gemm
     index_t M = conv_out_channels_ / group_;
     index_t N = im2col_step_ * conv_out_spatial_dim_;
     index_t K = kernel_dim_;
-    Tensor<xpu, 3, DType> weight_3d = in_data[dmconv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, M, K), s);
-    Tensor<xpu, 3, DType> col_buffer_3d = col_buffer.get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, N), s);
-    Tensor<xpu, 4, DType> output_4d = output_buffer.get_with_shape<xpu, 4, DType>(
-                Shape4(num_ / im2col_step_, group_, M, N), s);
+    Tensor<xpu, 3, DType> weight_3d =
+        in_data[dmconv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, M, K), s);
+    Tensor<xpu, 3, DType> col_buffer_3d =
+        col_buffer.get_with_shape<xpu, 3, DType>(Shape3(group_, K, N), s);
+    Tensor<xpu, 4, DType> output_4d =
+        output_buffer.get_with_shape<xpu, 4, DType>(Shape4(num_ / im2col_step_, group_, M, N), s);
     for (index_t n = 0; n < num_ / im2col_step_; ++n) {
       // transform image to col_buffer in order to use gemm
-      modulated_deformable_im2col(s,
-              in_data[dmconv::kData].dptr<DType>() + n*im2col_step_*input_dim_,
-              in_data[dmconv::kOffset].dptr<DType>() + n*im2col_step_*input_offset_dim_,
-              in_data[dmconv::kMask].dptr<DType>() + n*im2col_step_ * input_mask_dim_,
-              in_data[dmconv::kData].shape_,
-              col_buffer.shape_, param_.kernel, param_.pad, param_.stride, param_.dilate,
-              param_.num_deformable_group, col_buffer.dptr<DType>());
+      modulated_deformable_im2col(
+          s,
+          in_data[dmconv::kData].dptr<DType>() + n * im2col_step_ * input_dim_,
+          in_data[dmconv::kOffset].dptr<DType>() + n * im2col_step_ * input_offset_dim_,
+          in_data[dmconv::kMask].dptr<DType>() + n * im2col_step_ * input_mask_dim_,
+          in_data[dmconv::kData].shape_,
+          col_buffer.shape_,
+          param_.kernel,
+          param_.pad,
+          param_.stride,
+          param_.dilate,
+          param_.num_deformable_group,
+          col_buffer.dptr<DType>());
       Tensor<xpu, 3, DType> output_3d = output_4d[n];
       for (index_t g = 0; g < group_; ++g) {
         // Legacy approach shown here for comparison:
@@ -183,21 +196,21 @@ class ModulatedDeformableConvolutionOp : public Operator {
     original_output_4d = swapaxis<2, 1>(trans_output_4d);
 
     if (bias_term_) {
-      Tensor<xpu, 1, DType> bias = in_data[dmconv::kBias].get<xpu, 1, DType>(s);
+      Tensor<xpu, 1, DType> bias      = in_data[dmconv::kBias].get<xpu, 1, DType>(s);
       Tensor<xpu, 3, DType> output_3d = out_data[dmconv::kOut].get_with_shape<xpu, 3, DType>(
-        Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
+          Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
       // has bias term, broadcast it to the same shape of output_3d in channel dim
       output_3d += mshadow::expr::broadcast<1>(bias, output_3d.shape_);
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-    const std::vector<TBlob>& out_grad,
-    const std::vector<TBlob>& in_data,
-    const std::vector<TBlob>& out_data,
-    const std::vector<OpReqType>& req,
-    const std::vector<TBlob>& in_grad,
-    const std::vector<TBlob>& aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
@@ -209,10 +222,11 @@ class ModulatedDeformableConvolutionOp : public Operator {
                in_grad[dmconv::kOffset].shape_,
                in_grad[dmconv::kMask].shape_,
                out_grad[dmconv::kOut].shape_);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // allocate workspace for col_buffer
-    Tensor<xpu, 1, DType> workspace = ctx.requested[dmconv::kTempSpace]
-      .get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_ + num_*output_dim_), s);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[dmconv::kTempSpace].get_space_typed<xpu, 1, DType>(
+            Shape1(col_buffer_size_ + num_ * output_dim_), s);
     // calculate the shape of col_buffer
     mxnet::TShape col_buffer_shape(num_spatial_axes_ + 2, -1);
     col_buffer_shape[0] = conv_in_channels_ * param_.kernel.Size();
@@ -223,9 +237,11 @@ class ModulatedDeformableConvolutionOp : public Operator {
     // create a column buffer using workspace and col_buffer_shape
     TBlob col_buffer(workspace.dptr_, col_buffer_shape, xpu::kDevMask, DataType<DType>::kFlag);
     mxnet::TShape output_buffer_shape(1, -1);
-    output_buffer_shape[0] = num_*output_dim_;
+    output_buffer_shape[0] = num_ * output_dim_;
     TBlob output_buffer(workspace.dptr_ + col_buffer_size_,
-      output_buffer_shape, xpu::kDevMask, DataType<DType>::kFlag);
+                        output_buffer_shape,
+                        xpu::kDevMask,
+                        DataType<DType>::kFlag);
 
     Tensor<xpu, 4, DType> trans_output_4d = output_buffer.get_with_shape<xpu, 4, DType>(
         Shape4(num_ / im2col_step_, conv_out_channels_, im2col_step_, conv_out_spatial_dim_), s);
@@ -238,20 +254,19 @@ class ModulatedDeformableConvolutionOp : public Operator {
     index_t M = kernel_dim_;
     index_t N = im2col_step_ * conv_out_spatial_dim_;
     index_t K = conv_out_channels_ / group_;
-    Tensor<xpu, 3, DType> weight_3d = in_data[dmconv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, M), s);
-    Tensor<xpu, 4, DType> out_grad_4d = output_buffer.get_with_shape<xpu, 4, DType>(
-          Shape4(num_ / im2col_step_, group_, K, N), s);
-    Tensor<xpu, 3, DType> col_buffer_3d = col_buffer.get_with_shape<xpu, 3, DType>(
-      Shape3(group_, M, N), s);
+    Tensor<xpu, 3, DType> weight_3d =
+        in_data[dmconv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, K, M), s);
+    Tensor<xpu, 4, DType> out_grad_4d =
+        output_buffer.get_with_shape<xpu, 4, DType>(Shape4(num_ / im2col_step_, group_, K, N), s);
+    Tensor<xpu, 3, DType> col_buffer_3d =
+        col_buffer.get_with_shape<xpu, 3, DType>(Shape3(group_, M, N), s);
     // For computing dLoss/dWeight
-    Tensor<xpu, 3, DType> dweight_3d = in_grad[dmconv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, M), s);
+    Tensor<xpu, 3, DType> dweight_3d =
+        in_grad[dmconv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, K, M), s);
 
     Tensor<xpu, 1, DType> data_grad = in_grad[dmconv::kData].FlatTo1D<xpu, DType>(s);
     if (req[dmconv::kData] == kWriteTo)
-        data_grad = 0;
-
+      data_grad = 0;
 
     for (index_t n = 0; n < num_ / im2col_step_; ++n) {
       Tensor<xpu, 3, DType> out_grad_3d = out_grad_4d[n];
@@ -262,33 +277,54 @@ class ModulatedDeformableConvolutionOp : public Operator {
       }
 
       // gradient w.r.t. input coordinate data
-      modulated_deformable_col2im_coord(s, col_buffer.dptr<DType>(),
-        in_data[dmconv::kData].dptr<DType>() + n*im2col_step_*input_dim_,
-        in_data[dmconv::kOffset].dptr<DType>() + n*im2col_step_*input_offset_dim_,
-        in_data[dmconv::kMask].dptr<DType>() + n*im2col_step_*input_mask_dim_,
-        in_grad[dmconv::kData].shape_, col_buffer.shape_,
-        param_.kernel, param_.pad, param_.stride, param_.dilate, param_.num_deformable_group,
-        in_grad[dmconv::kOffset].dptr<DType>() + n*im2col_step_*input_offset_dim_,
-        in_grad[dmconv::kMask].dptr<DType>() + n*im2col_step_*input_mask_dim_,
-        req[dmconv::kOffset], req[dmconv::kMask]);
+      modulated_deformable_col2im_coord(
+          s,
+          col_buffer.dptr<DType>(),
+          in_data[dmconv::kData].dptr<DType>() + n * im2col_step_ * input_dim_,
+          in_data[dmconv::kOffset].dptr<DType>() + n * im2col_step_ * input_offset_dim_,
+          in_data[dmconv::kMask].dptr<DType>() + n * im2col_step_ * input_mask_dim_,
+          in_grad[dmconv::kData].shape_,
+          col_buffer.shape_,
+          param_.kernel,
+          param_.pad,
+          param_.stride,
+          param_.dilate,
+          param_.num_deformable_group,
+          in_grad[dmconv::kOffset].dptr<DType>() + n * im2col_step_ * input_offset_dim_,
+          in_grad[dmconv::kMask].dptr<DType>() + n * im2col_step_ * input_mask_dim_,
+          req[dmconv::kOffset],
+          req[dmconv::kMask]);
 
       // gradient w.r.t. input data
-      modulated_deformable_col2im(s, col_buffer.dptr<DType>(),
-        in_data[dmconv::kOffset].dptr<DType>() + n*im2col_step_*input_offset_dim_,
-        in_data[dmconv::kMask].dptr<DType>() + n*im2col_step_*input_mask_dim_,
-        in_grad[dmconv::kData].shape_, col_buffer.shape_,
-        param_.kernel, param_.pad, param_.stride, param_.dilate, param_.num_deformable_group,
-        in_grad[dmconv::kData].dptr<DType>() + n*im2col_step_*input_dim_,
-        req[dmconv::kData]);
+      modulated_deformable_col2im(
+          s,
+          col_buffer.dptr<DType>(),
+          in_data[dmconv::kOffset].dptr<DType>() + n * im2col_step_ * input_offset_dim_,
+          in_data[dmconv::kMask].dptr<DType>() + n * im2col_step_ * input_mask_dim_,
+          in_grad[dmconv::kData].shape_,
+          col_buffer.shape_,
+          param_.kernel,
+          param_.pad,
+          param_.stride,
+          param_.dilate,
+          param_.num_deformable_group,
+          in_grad[dmconv::kData].dptr<DType>() + n * im2col_step_ * input_dim_,
+          req[dmconv::kData]);
 
       // gradient w.r.t. weight, dWeight should accumulate across the batch and group
-      modulated_deformable_im2col(s,
-        in_data[dmconv::kData].dptr<DType>() + n*im2col_step_*input_dim_,
-        in_data[dmconv::kOffset].dptr<DType>() + n*im2col_step_*input_offset_dim_,
-        in_data[dmconv::kMask].dptr<DType>() + n*im2col_step_*input_mask_dim_,
-        in_data[dmconv::kData].shape_,
-        col_buffer.shape_, param_.kernel, param_.pad, param_.stride, param_.dilate,
-        param_.num_deformable_group, col_buffer.dptr<DType>());
+      modulated_deformable_im2col(
+          s,
+          in_data[dmconv::kData].dptr<DType>() + n * im2col_step_ * input_dim_,
+          in_data[dmconv::kOffset].dptr<DType>() + n * im2col_step_ * input_offset_dim_,
+          in_data[dmconv::kMask].dptr<DType>() + n * im2col_step_ * input_mask_dim_,
+          in_data[dmconv::kData].shape_,
+          col_buffer.shape_,
+          param_.kernel,
+          param_.pad,
+          param_.stride,
+          param_.dilate,
+          param_.num_deformable_group,
+          col_buffer.dptr<DType>());
 
       for (index_t g = 0; g < group_; ++g) {
         auto request = (n == 0) ? req[dmconv::kWeight] : kAddTo;
@@ -301,62 +337,65 @@ class ModulatedDeformableConvolutionOp : public Operator {
     // gradient w.r.t bias
     if (bias_term_) {
       Tensor<xpu, 1, DType> dbias = in_grad[dmconv::kBias].get<xpu, 1, DType>(s);
-      Tensor<xpu, 3, DType> dout = out_grad[dmconv::kOut].get_with_shape<xpu, 3, DType>(
-        Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
+      Tensor<xpu, 3, DType> dout  = out_grad[dmconv::kOut].get_with_shape<xpu, 3, DType>(
+          Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
       ASSIGN_DISPATCH(dbias, req[dmconv::kBias], sumall_except_dim<1>(dout));
     }
   }
 
  private:
-  void LayerSetUp(const mxnet::TShape& ishape, const mxnet::TShape& offset_shape,
-                  const mxnet::TShape& mask_shape, const mxnet::TShape& oshape) {
-    channel_axis_ = 1;  // hard code channel axis
+  void LayerSetUp(const mxnet::TShape& ishape,
+                  const mxnet::TShape& offset_shape,
+                  const mxnet::TShape& mask_shape,
+                  const mxnet::TShape& oshape) {
+    channel_axis_                    = 1;  // hard code channel axis
     const index_t first_spatial_axis = channel_axis_ + 1;
-    const index_t num_axes = param_.kernel.ndim() + 2;
-    num_spatial_axes_ = num_axes - first_spatial_axis;
-    is_1x1_ = true;
+    const index_t num_axes           = param_.kernel.ndim() + 2;
+    num_spatial_axes_                = num_axes - first_spatial_axis;
+    is_1x1_                          = true;
     for (index_t i = 0; i < param_.kernel.ndim(); ++i) {
       is_1x1_ &= param_.kernel[i] == 1 && param_.stride[i] == 1 && param_.pad[i] == 0;
-      if (!is_1x1_) break;
+      if (!is_1x1_)
+        break;
     }
 
     // batch size
     num_ = ishape[0];
     // number of input channels
-    channels_ = ishape[1];
-    group_ = param_.num_group;
-    conv_out_channels_ = param_.num_filter;
-    conv_in_channels_ = channels_;
-    bias_term_ = !param_.no_bias;
-    kernel_dim_ = conv_in_channels_ / group_ * param_.kernel.Size();
-    weight_offset_ = conv_out_channels_ * kernel_dim_ / group_;
+    channels_             = ishape[1];
+    group_                = param_.num_group;
+    conv_out_channels_    = param_.num_filter;
+    conv_in_channels_     = channels_;
+    bias_term_            = !param_.no_bias;
+    kernel_dim_           = conv_in_channels_ / group_ * param_.kernel.Size();
+    weight_offset_        = conv_out_channels_ * kernel_dim_ / group_;
     conv_out_spatial_dim_ = oshape.ProdShape(2, oshape.ndim());
-    col_offset_ = kernel_dim_ * conv_out_spatial_dim_;
-    output_offset_ = conv_out_channels_ * conv_out_spatial_dim_ / group_;
+    col_offset_           = kernel_dim_ * conv_out_spatial_dim_;
+    output_offset_        = conv_out_channels_ * conv_out_spatial_dim_ / group_;
     // size of the column buffer used for storing im2col-ed pixels
-    im2col_step_ = std::min(param_.im2col_step, static_cast<uint32_t>(num_));
+    im2col_step_     = std::min(param_.im2col_step, static_cast<uint32_t>(num_));
     col_buffer_size_ = kernel_dim_ * group_ * im2col_step_ * conv_out_spatial_dim_;
     // input/output image size (#channels * height * width)
-    input_dim_ = ishape.ProdShape(1, ishape.ndim());
-    input_offset_dim_ = offset_shape.ProdShape(1, offset_shape.ndim());
-    input_mask_dim_ = mask_shape.ProdShape(1, mask_shape.ndim());
-    output_dim_ = oshape.ProdShape(1, oshape.ndim());
+    input_dim_          = ishape.ProdShape(1, ishape.ndim());
+    input_offset_dim_   = offset_shape.ProdShape(1, offset_shape.ndim());
+    input_mask_dim_     = mask_shape.ProdShape(1, mask_shape.ndim());
+    output_dim_         = oshape.ProdShape(1, oshape.ndim());
     num_kernels_im2col_ = conv_in_channels_ * conv_out_spatial_dim_;
     num_kernels_col2im_ = input_dim_;
   }
 
  private:
   ModulatedDeformableConvolutionParam param_;
-  index_t channel_axis_;  // channel axis of the input
-  index_t channels_;  // number of channels of input image
-  index_t num_spatial_axes_;  // number of spatial axes
-  index_t num_;  // batch size
-  index_t group_;  // number of groups
-  index_t conv_out_channels_;  // number of output channels (num_filter)
+  index_t channel_axis_;          // channel axis of the input
+  index_t channels_;              // number of channels of input image
+  index_t num_spatial_axes_;      // number of spatial axes
+  index_t num_;                   // batch size
+  index_t group_;                 // number of groups
+  index_t conv_out_channels_;     // number of output channels (num_filter)
   index_t conv_out_spatial_dim_;  // number of pixels of output images per channel
-  index_t conv_in_channels_;  // number of input channels
-  index_t kernel_dim_;  // number of input channels per group * kernel size
-  index_t weight_offset_;  // number of output channels per group * kernel_dim_
+  index_t conv_in_channels_;      // number of input channels
+  index_t kernel_dim_;            // number of input channels per group * kernel size
+  index_t weight_offset_;         // number of output channels per group * kernel_dim_
   index_t col_offset_;
   index_t output_offset_;
   index_t col_buffer_size_;
@@ -371,20 +410,21 @@ class ModulatedDeformableConvolutionOp : public Operator {
   bool is_1x1_;
 };  // class ConvolutionOp
 
-template<typename xpu>
-Operator* CreateOp(ModulatedDeformableConvolutionParam param, int dtype,
-  std::vector<mxnet::TShape> *in_shape,
-  std::vector<mxnet::TShape> *out_shape,
-  Context ctx);
+template <typename xpu>
+Operator* CreateOp(ModulatedDeformableConvolutionParam param,
+                   int dtype,
+                   std::vector<mxnet::TShape>* in_shape,
+                   std::vector<mxnet::TShape>* out_shape,
+                   Context ctx);
 
 #if DMLC_USE_CXX11
 class ModulatedDeformableConvolutionProp : public OperatorProperty {
  public:
   std::vector<std::string> ListArguments() const override {
     if (!param_.no_bias) {
-      return{ "data", "offset", "mask", "weight", "bias" };
+      return {"data", "offset", "mask", "weight", "bias"};
     } else {
-      return{ "data", "offset", "mask", "weight" };
+      return {"data", "offset", "mask", "weight"};
     }
   }
 
@@ -393,9 +433,12 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
     param_.Init(kwargs);
     if (param_.kernel.ndim() == 2) {
       param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCHW;
-      if (param_.stride.ndim() == 0) param_.stride = Shape2(1, 1);
-      if (param_.dilate.ndim() == 0) param_.dilate = Shape2(1, 1);
-      if (param_.pad.ndim() == 0) param_.pad = Shape2(0, 0);
+      if (param_.stride.ndim() == 0)
+        param_.stride = Shape2(1, 1);
+      if (param_.dilate.ndim() == 0)
+        param_.dilate = Shape2(1, 1);
+      if (param_.pad.ndim() == 0)
+        param_.pad = Shape2(0, 0);
     } else {
       LOG(FATAL) << "not implemented";
     }
@@ -405,9 +448,9 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(std::vector<mxnet::TShape> *in_shape,
-    std::vector<mxnet::TShape> *out_shape,
-    std::vector<mxnet::TShape> *aux_shape) const override {
+  bool InferShape(std::vector<mxnet::TShape>* in_shape,
+                  std::vector<mxnet::TShape>* out_shape,
+                  std::vector<mxnet::TShape>* aux_shape) const override {
     using namespace mshadow;
     if (!param_.no_bias) {
       CHECK_EQ(in_shape->size(), 5U) << "Input:[data, offset, mask, weight, bias]";
@@ -415,24 +458,24 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
       CHECK_EQ(in_shape->size(), 4U) << "Input:[data, offset, mask, weight]";
     }
     out_shape->resize(1, mxnet::TShape());
-    const mxnet::TShape &dshp = (*in_shape)[dmconv::kData];
-    const mxnet::TShape &oshp = (*in_shape)[dmconv::kOffset];
-    const mxnet::TShape &mshp = (*in_shape)[dmconv::kMask];
-    if (dshp.ndim() == 0) return false;
+    const mxnet::TShape& dshp = (*in_shape)[dmconv::kData];
+    const mxnet::TShape& oshp = (*in_shape)[dmconv::kOffset];
+    const mxnet::TShape& mshp = (*in_shape)[dmconv::kMask];
+    if (dshp.ndim() == 0)
+      return false;
     if (param_.kernel.ndim() == 2) {
       // 2d dmconv
-      CHECK_EQ(dshp.ndim(), 4U) \
-        << "Input data should be 4D in batch-num_filter-y-x";
-      CHECK_EQ(oshp.ndim(), 4U) \
-        << "Input offset should be 4D in batch-num_filter-y-x";
-      CHECK_EQ(mshp.ndim(), 4U) \
-        << "Input offset should be 4D in batch-num_filter-y-x";
-      Shape<4> dshape = ConvertLayout(dshp.get<4>(), param_.layout.value(), kNCHW);
+      CHECK_EQ(dshp.ndim(), 4U) << "Input data should be 4D in batch-num_filter-y-x";
+      CHECK_EQ(oshp.ndim(), 4U) << "Input offset should be 4D in batch-num_filter-y-x";
+      CHECK_EQ(mshp.ndim(), 4U) << "Input offset should be 4D in batch-num_filter-y-x";
+      Shape<4> dshape      = ConvertLayout(dshp.get<4>(), param_.layout.value(), kNCHW);
       Shape<4> offsetshape = ConvertLayout(oshp.get<4>(), param_.layout.value(), kNCHW);
-      Shape<4> maskshape = ConvertLayout(mshp.get<4>(), param_.layout.value(), kNCHW);
-      Shape<4> wshape = Shape4(param_.num_filter / param_.num_group, dshape[1] / param_.num_group,
-        param_.kernel[0], param_.kernel[1]);
-      wshape = ConvertLayout(wshape, kNCHW, param_.layout.value());
+      Shape<4> maskshape   = ConvertLayout(mshp.get<4>(), param_.layout.value(), kNCHW);
+      Shape<4> wshape      = Shape4(param_.num_filter / param_.num_group,
+                               dshape[1] / param_.num_group,
+                               param_.kernel[0],
+                               param_.kernel[1]);
+      wshape               = ConvertLayout(wshape, kNCHW, param_.layout.value());
       wshape[0] *= param_.num_group;
       SHAPE_ASSIGN_CHECK(*in_shape, dmconv::kWeight, wshape);
       if (!param_.no_bias) {
@@ -442,53 +485,46 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
       const index_t ksize_y = static_cast<index_t>(param_.kernel[0]);
       const index_t ksize_x = static_cast<index_t>(param_.kernel[1]);
       if (dshape[0] > static_cast<index_t>(param_.im2col_step)) {
-           CHECK_EQ(dshape[0] % param_.im2col_step, 0U) \
-           << "input batchsize must be smaller than or divide im2col_step";
+        CHECK_EQ(dshape[0] % param_.im2col_step, 0U)
+            << "input batchsize must be smaller than or divide im2col_step";
       }
-      CHECK_EQ(dshape[1] % param_.num_group, 0U) \
-        << "input num_filter must divide group size";
-      CHECK_EQ(dshape[1] % param_.num_deformable_group, 0U) \
-        << "input num_filter must divide deformable group size";
-      CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-        << "output num_filter must divide group size";
-      CHECK_GT(param_.kernel.Size(), 0U) \
-        << "incorrect kernel size: " << param_.kernel;
-      CHECK_GT(param_.stride.Size(), 0U) \
-        << "incorrect stride size: " << param_.stride;
-      CHECK_GT(param_.dilate.Size(), 0U) \
-        << "incorrect dilate size: " << param_.dilate;
+      CHECK_EQ(dshape[1] % param_.num_group, 0U) << "input num_filter must divide group size";
+      CHECK_EQ(dshape[1] % param_.num_deformable_group, 0U)
+          << "input num_filter must divide deformable group size";
+      CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+          << "output num_filter must divide group size";
+      CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+      CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+      CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
       Shape<4> oshape;
       oshape[0] = dshape[0];
       oshape[1] = param_.num_filter;
-      oshape[2] = (dshape[2] + 2 * param_.pad[0] -
-        (param_.dilate[0] * (ksize_y - 1) + 1)) / param_.stride[0] + 1;
-      oshape[3] = (dshape[3] + 2 * param_.pad[1] -
-        (param_.dilate[1] * (ksize_x - 1) + 1)) / param_.stride[1] + 1;
+      oshape[2] = (dshape[2] + 2 * param_.pad[0] - (param_.dilate[0] * (ksize_y - 1) + 1)) /
+                      param_.stride[0] +
+                  1;
+      oshape[3] = (dshape[3] + 2 * param_.pad[1] - (param_.dilate[1] * (ksize_x - 1) + 1)) /
+                      param_.stride[1] +
+                  1;
       SHAPE_ASSIGN_CHECK(*out_shape, 0, ConvertLayout(oshape, kNCHW, param_.layout.value()));
-      CHECK_EQ(oshape[1] % param_.num_deformable_group, 0U) \
-        << "output num_filter must divide deformable group size";
-      CHECK_EQ(oshape[2], offsetshape[2]) \
-        << "output height must equal to offset map height";
-      CHECK_EQ(oshape[3], offsetshape[3]) \
-        << "output width must equal to offset map width";
-      CHECK_EQ(offsetshape[1] % (param_.kernel[0] * param_.kernel[1]), 0U) \
-        << "offset filter must divide deformable group size";
-      CHECK_EQ(offsetshape[1] / (2 * param_.kernel[0] * param_.kernel[1]), \
-               param_.num_deformable_group) \
-        << "offset filter must divide deformable group size";
-      CHECK_EQ(oshape[2], maskshape[2]) \
-        << "output height must equal to mask map height";
-      CHECK_EQ(oshape[3], maskshape[3]) \
-        << "output width must equal to mask map width";
-      CHECK_EQ(maskshape[1] % (param_.kernel[0] * param_.kernel[1]), 0U) \
-        << "offset filter must divide deformable group size";
-      CHECK_EQ(maskshape[1] / (param_.kernel[0] * param_.kernel[1]), \
-               param_.num_deformable_group) \
-        << "offset filter must divide deformable group size";
+      CHECK_EQ(oshape[1] % param_.num_deformable_group, 0U)
+          << "output num_filter must divide deformable group size";
+      CHECK_EQ(oshape[2], offsetshape[2]) << "output height must equal to offset map height";
+      CHECK_EQ(oshape[3], offsetshape[3]) << "output width must equal to offset map width";
+      CHECK_EQ(offsetshape[1] % (param_.kernel[0] * param_.kernel[1]), 0U)
+          << "offset filter must divide deformable group size";
+      CHECK_EQ(offsetshape[1] / (2 * param_.kernel[0] * param_.kernel[1]),
+               param_.num_deformable_group)
+          << "offset filter must divide deformable group size";
+      CHECK_EQ(oshape[2], maskshape[2]) << "output height must equal to mask map height";
+      CHECK_EQ(oshape[3], maskshape[3]) << "output width must equal to mask map width";
+      CHECK_EQ(maskshape[1] % (param_.kernel[0] * param_.kernel[1]), 0U)
+          << "offset filter must divide deformable group size";
+      CHECK_EQ(maskshape[1] / (param_.kernel[0] * param_.kernel[1]), param_.num_deformable_group)
+          << "offset filter must divide deformable group size";
       // Perform incomplete shape inference. Fill in the missing values in data shape.
       // 1) We can always fill in the batch_size.
       // 2) We can back-calculate the input height/width if the corresponding stride is 1.
-      oshape = ConvertLayout((*out_shape)[0].get<4>(), param_.layout.value(), kNCHW);
+      oshape    = ConvertLayout((*out_shape)[0].get<4>(), param_.layout.value(), kNCHW);
       dshape[0] = oshape[0];
       if (param_.stride[0] == 1) {
         dshape[2] = oshape[2] + param_.dilate[0] * (ksize_y - 1) - 2 * param_.pad[0];
@@ -496,8 +532,8 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
       if (param_.stride[1] == 1) {
         dshape[3] = oshape[3] + param_.dilate[1] * (ksize_x - 1) - 2 * param_.pad[1];
       }
-      SHAPE_ASSIGN_CHECK(*in_shape, dmconv::kData,
-        ConvertLayout(dshape, kNCHW, param_.layout.value()));
+      SHAPE_ASSIGN_CHECK(
+          *in_shape, dmconv::kData, ConvertLayout(dshape, kNCHW, param_.layout.value()));
       // Check whether the kernel sizes are valid
       if (dshape[2] != 0) {
         CHECK_LE(ksize_y, dshape[2] + 2 * param_.pad[0]) << "kernel size exceed input";
@@ -512,9 +548,9 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
     }
   }
 
-  bool InferType(std::vector<int> *in_type,
-    std::vector<int> *out_type,
-    std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -531,7 +567,7 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new ModulatedDeformableConvolutionProp();
+    auto ptr    = new ModulatedDeformableConvolutionProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -540,23 +576,24 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
     return "_npx_modulated_deformable_convolution";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
-    return{ out_grad[dmconv::kOut], in_data[dmconv::kData],
-            in_data[dmconv::kOffset], in_data[dmconv::kMask],
-            in_data[dmconv::kWeight] };
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
+    return {out_grad[dmconv::kOut],
+            in_data[dmconv::kData],
+            in_data[dmconv::kOffset],
+            in_data[dmconv::kMask],
+            in_data[dmconv::kWeight]};
   }
 
   std::vector<ResourceRequest> ForwardResource(
-    const std::vector<mxnet::TShape> &in_shape) const override {
-    return{ ResourceRequest::kTempSpace };
+      const std::vector<mxnet::TShape>& in_shape) const override {
+    return {ResourceRequest::kTempSpace};
   }
 
   std::vector<ResourceRequest> BackwardResource(
-    const std::vector<mxnet::TShape> &in_shape) const override {
-    return{ ResourceRequest::kTempSpace };
+      const std::vector<mxnet::TShape>& in_shape) const override {
+    return {ResourceRequest::kTempSpace};
   }
 
   Operator* CreateOperator(Context ctx) const override {
@@ -564,12 +601,13 @@ class ModulatedDeformableConvolutionProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, std::vector<mxnet::TShape> *in_shape,
-    std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             std::vector<mxnet::TShape>* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   ModulatedDeformableConvolutionParam param_;
-};  // class ConvolutionProp
+};      // class ConvolutionProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/modulated_deformable_convolution.cc b/src/operator/modulated_deformable_convolution.cc
index dd405fbf5951..c0c71015c65c 100644
--- a/src/operator/modulated_deformable_convolution.cc
+++ b/src/operator/modulated_deformable_convolution.cc
@@ -23,7 +23,7 @@
  * \file modulated_deformable_convolution.cc
  * \brief
  * \author Yuwen Xiong, Haozhi Qi, Jifeng Dai, Xizhou Zhu, Han Hu
-*/
+ */
 
 #include "./modulated_deformable_convolution-inl.h"
 
@@ -31,22 +31,22 @@ namespace mxnet {
 namespace op {
 DMLC_REGISTER_PARAMETER(ModulatedDeformableConvolutionParam);
 
-template<>
-Operator* CreateOp<cpu>(ModulatedDeformableConvolutionParam param, int dtype,
-                        std::vector<TShape> *in_shape,
-                        std::vector<TShape> *out_shape,
+template <>
+Operator* CreateOp<cpu>(ModulatedDeformableConvolutionParam param,
+                        int dtype,
+                        std::vector<TShape>* in_shape,
+                        std::vector<TShape>* out_shape,
                         Context ctx) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new ModulatedDeformableConvolutionOp<cpu, DType>(param);
-  })
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(
+      dtype, DType, { op = new ModulatedDeformableConvolutionOp<cpu, DType>(param); })
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *ModulatedDeformableConvolutionProp::CreateOperatorEx(Context ctx,
-                                            std::vector<TShape> *in_shape,
-                                            std::vector<int> *in_type) const {
+Operator* ModulatedDeformableConvolutionProp::CreateOperatorEx(Context ctx,
+                                                               std::vector<TShape>* in_shape,
+                                                               std::vector<int>* in_type) const {
   std::vector<TShape> out_shape, aux_shape;
   std::vector<int> out_type, aux_type;
   CHECK(InferType(in_type, &out_type, &aux_type));
@@ -54,9 +54,9 @@ Operator *ModulatedDeformableConvolutionProp::CreateOperatorEx(Context ctx,
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], in_shape, &out_shape, ctx);
 }
 
-MXNET_REGISTER_OP_PROPERTY(
-  _npx_modulated_deformable_convolution, ModulatedDeformableConvolutionProp)
-.describe(R"code(Compute 2-D modulated deformable convolution on 4-D input.
+MXNET_REGISTER_OP_PROPERTY(_npx_modulated_deformable_convolution,
+                           ModulatedDeformableConvolutionProp)
+    .describe(R"code(Compute 2-D modulated deformable convolution on 4-D input.
 
 The modulated deformable convolution operation is described in https://arxiv.org/abs/1811.11168
 
@@ -100,12 +100,18 @@ Both ``weight`` and ``bias`` are learnable parameters.
 
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the ModulatedDeformableConvolutionOp.")
-.add_argument("offset", "NDArray-or-Symbol", "Input offset to ModulatedDeformableConvolutionOp.")
-.add_argument("mask", "NDArray-or-Symbol", "Input mask to the ModulatedDeformableConvolutionOp.")
-.add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
-.add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
-.add_arguments(ModulatedDeformableConvolutionParam::__FIELDS__());
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "Input data to the ModulatedDeformableConvolutionOp.")
+    .add_argument("offset",
+                  "NDArray-or-Symbol",
+                  "Input offset to ModulatedDeformableConvolutionOp.")
+    .add_argument("mask",
+                  "NDArray-or-Symbol",
+                  "Input mask to the ModulatedDeformableConvolutionOp.")
+    .add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
+    .add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
+    .add_arguments(ModulatedDeformableConvolutionParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/modulated_deformable_convolution.cu b/src/operator/modulated_deformable_convolution.cu
index 470d2c01b8da..2a100c259558 100644
--- a/src/operator/modulated_deformable_convolution.cu
+++ b/src/operator/modulated_deformable_convolution.cu
@@ -23,7 +23,7 @@
  * \file modulated_deformable_convolution.cu
  * \brief
  * \author Yuwen Xiong, Haozhi Qi, Jifeng Dai, Xizhou Zhu, Han Hu
-*/
+ */
 
 #include "./modulated_deformable_convolution-inl.h"
 #include <vector>
@@ -31,17 +31,17 @@
 namespace mxnet {
 namespace op {
 
-  template<>
-  Operator* CreateOp<gpu>(ModulatedDeformableConvolutionParam param, int dtype,
-    std::vector<TShape> *in_shape,
-    std::vector<TShape> *out_shape,
-    Context ctx) {
-    Operator *op = nullptr;
-    MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      op = new ModulatedDeformableConvolutionOp<gpu, DType>(param);
-    })
-      return op;
-  }
+template <>
+Operator* CreateOp<gpu>(ModulatedDeformableConvolutionParam param,
+                        int dtype,
+                        std::vector<TShape>* in_shape,
+                        std::vector<TShape>* out_shape,
+                        Context ctx) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(
+      dtype, DType, { op = new ModulatedDeformableConvolutionOp<gpu, DType>(param); })
+  return op;
+}
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/mshadow_op.h b/src/operator/mshadow_op.h
index c3ce7332cc2c..eee928452f50 100644
--- a/src/operator/mshadow_op.h
+++ b/src/operator/mshadow_op.h
@@ -22,7 +22,7 @@
  * \file mshadow_op.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_MSHADOW_OP_H_
 #define MXNET_OPERATOR_MSHADOW_OP_H_
 
@@ -42,84 +42,84 @@ namespace mxnet {
 namespace op {
 namespace mshadow_op {
 
-using mshadow::isnan_typed::IsNan;
 using mshadow::isinf_typed::IsInf;
+using mshadow::isnan_typed::IsNan;
 
 #ifdef __CUDA_ARCH__
-__constant__ const float PI = 3.14159265358979323846;
-__constant__ const float SELU_ALPHA = 1.6732632423543772848170429916717;
+__constant__ const float PI          = 3.14159265358979323846;
+__constant__ const float SELU_ALPHA  = 1.6732632423543772848170429916717;
 __constant__ const float SELU_LAMBDA = 1.0507009873554804934193349852946;
-__constant__ const float SQRT_2 = 1.4142135623730950488016887242096;
+__constant__ const float SQRT_2      = 1.4142135623730950488016887242096;
 #else
-const float PI = 3.14159265358979323846;
-const float SELU_ALPHA = 1.6732632423543772848170429916717;
+const float PI          = 3.14159265358979323846;
+const float SELU_ALPHA  = 1.6732632423543772848170429916717;
 const float SELU_LAMBDA = 1.0507009873554804934193349852946;
-const float SQRT_2 = 1.4142135623730950488016887242096;
+const float SQRT_2      = 1.4142135623730950488016887242096;
 #endif
 using std::enable_if;
-using std::is_unsigned;
 using std::is_integral;
+using std::is_unsigned;
 
-#define MXNET_UNARY_MATH_OP(name, expr) \
-  struct name : public mxnet_op::tunable { \
-    template<typename DType> \
+#define MXNET_UNARY_MATH_OP(name, expr)         \
+  struct name : public mxnet_op::tunable {      \
+    template <typename DType>                   \
     MSHADOW_XINLINE static DType Map(DType a) { \
-      return DType(expr); \
-    } \
+      return DType(expr);                       \
+    }                                           \
   }
 
-#define MXNET_UNARY_MATH_OP_NC(name, expr) \
-  struct name : public mxnet_op::tunable { \
-    template<typename DType> \
+#define MXNET_UNARY_MATH_OP_NC(name, expr)      \
+  struct name : public mxnet_op::tunable {      \
+    template <typename DType>                   \
     MSHADOW_XINLINE static DType Map(DType a) { \
-      return (expr); \
-    } \
+      return (expr);                            \
+    }                                           \
   }
 
-#define MXNET_UNARY_LOGIC_OP_NC(name, expr) \
-  struct name : public mxnet_op::tunable { \
-    template<typename DType> \
+#define MXNET_UNARY_LOGIC_OP_NC(name, expr)    \
+  struct name : public mxnet_op::tunable {     \
+    template <typename DType>                  \
     MSHADOW_XINLINE static bool Map(DType a) { \
-      return (expr); \
-    } \
+      return (expr);                           \
+    }                                          \
   }
 
-#define MXNET_BINARY_MATH_OP(name, expr) \
-  struct name : public mxnet_op::tunable { \
-    template<typename DType> \
+#define MXNET_BINARY_MATH_OP(name, expr)                 \
+  struct name : public mxnet_op::tunable {               \
+    template <typename DType>                            \
     MSHADOW_XINLINE static DType Map(DType a, DType b) { \
-      return DType(expr); \
-    } \
+      return DType(expr);                                \
+    }                                                    \
   }
 
-#define MXNET_BINARY_MATH_OP_NC(name, expr) \
-  struct name : public mxnet_op::tunable  { \
-    template<typename DType> \
+#define MXNET_BINARY_MATH_OP_NC(name, expr)              \
+  struct name : public mxnet_op::tunable {               \
+    template <typename DType>                            \
     MSHADOW_XINLINE static DType Map(DType a, DType b) { \
-      return (expr); \
-    } \
+      return (expr);                                     \
+    }                                                    \
   }
 
-#define MXNET_BINARY_MATH_OP_NC_WITH_BOOL(name, expr) \
-  struct name : public mxnet_op::tunable  { \
-    template<typename DType, \
-             typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0> \
-    MSHADOW_XINLINE static DType Map(DType a, DType b) { \
-      return (expr); \
-    } \
-    MSHADOW_XINLINE static bool Map(bool a, bool b) { \
-      return (expr); \
-    } \
+#define MXNET_BINARY_MATH_OP_NC_WITH_BOOL(name, expr)                                    \
+  struct name : public mxnet_op::tunable {                                               \
+    template <typename DType,                                                            \
+              typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0> \
+    MSHADOW_XINLINE static DType Map(DType a, DType b) {                                 \
+      return (expr);                                                                     \
+    }                                                                                    \
+    MSHADOW_XINLINE static bool Map(bool a, bool b) {                                    \
+      return (expr);                                                                     \
+    }                                                                                    \
   }
 
-#define MXNET_BINARY_LOGIC_OP_NC(name, expr) \
-  struct name : public mxnet_op::tunable  { \
-    template<typename DType, typename EType> \
+#define MXNET_BINARY_LOGIC_OP_NC(name, expr)                \
+  struct name : public mxnet_op::tunable {                  \
+    template <typename DType, typename EType>               \
     MSHADOW_XINLINE static bool Map(DType lhs, EType rhs) { \
-      double a = static_cast<double>(lhs); \
-      double b = static_cast<double>(rhs); \
-      return (expr); \
-    } \
+      double a = static_cast<double>(lhs);                  \
+      double b = static_cast<double>(rhs);                  \
+      return (expr);                                        \
+    }                                                       \
   }
 
 #define MXNET_SIMPLE_UNARY_MATH_OP(name) MXNET_UNARY_MATH_OP(name, math::name(a))
@@ -137,20 +137,19 @@ struct IndexedNum {
 
   MSHADOW_XINLINE IndexedNum(DType n) : idx(0), num(n) {}
 
-  MSHADOW_XINLINE IndexedNum& operator+=(const IndexedNum& rhs){
+  MSHADOW_XINLINE IndexedNum& operator+=(const IndexedNum& rhs) {
     return *this;
   }
 };
 
-template<typename AType, typename IType>
+template <typename AType, typename IType>
 struct set_index_no_op : public mxnet_op::tunable {
   static const bool do_op = false;
 
-  MSHADOW_XINLINE static void Op(AType* const a, IType i) {
-  }
+  MSHADOW_XINLINE static void Op(AType* const a, IType i) {}
 };
 
-template<typename AType, typename IType>
+template <typename AType, typename IType>
 struct arg_min_max_set_index : public mxnet_op::tunable {
   static const bool do_op = true;
 
@@ -159,75 +158,64 @@ struct arg_min_max_set_index : public mxnet_op::tunable {
   }
 };
 
-
 MXNET_UNARY_MATH_OP(identity_grad, 1);
 
 struct identity_with_cast {
-  template<typename DTypeIn, typename DTypeOut>
-  MSHADOW_XINLINE static void Map(index_t i, DTypeOut *out, DTypeIn *in) {
+  template <typename DTypeIn, typename DTypeOut>
+  MSHADOW_XINLINE static void Map(index_t i, DTypeOut* out, DTypeIn* in) {
     out[i] = DTypeOut(in[i]);
   }
 };
 
-struct true_divide : public mxnet_op::tunable  {
-  template<typename DType,
-           typename std::enable_if<!std::is_integral<DType>::value, int>::type = 0>
+struct true_divide : public mxnet_op::tunable {
+  template <typename DType, typename std::enable_if<!std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return a / b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, DType b) {
     return static_cast<float>(a) / static_cast<float>(b);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return static_cast<mshadow::half::half_t>(a) / b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return static_cast<float>(a) / b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return static_cast<double>(a) / b;
   }
 };
 
-struct rtrue_divide : public mxnet_op::tunable  {
-  template<typename DType,
-           typename std::enable_if<!std::is_integral<DType>::value, int>::type = 0>
+struct rtrue_divide : public mxnet_op::tunable {
+  template <typename DType, typename std::enable_if<!std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return b / a;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, DType b) {
     return static_cast<float>(b) / static_cast<float>(a);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return b / static_cast<mshadow::half::half_t>(a);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return b / static_cast<float>(a);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return b / static_cast<double>(a);
   }
@@ -238,138 +226,144 @@ MXNET_BINARY_MATH_OP_NC(left, a);
 MXNET_BINARY_MATH_OP_NC(right, b);
 
 struct mixed_plus {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return static_cast<mshadow::half::half_t>(a) + b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return static_cast<float>(a) + b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return static_cast<double>(a) + b;
   }
 };
 
 struct mixed_minus {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return static_cast<mshadow::half::half_t>(a) - b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return static_cast<float>(a) - b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return static_cast<double>(a) - b;
   }
 };
 
 struct mixed_rminus {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return b - static_cast<mshadow::half::half_t>(a);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return b - static_cast<float>(a);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return b - static_cast<double>(a);
   }
 };
 
 struct mixed_mul {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return static_cast<mshadow::half::half_t>(a) * b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return static_cast<float>(a) * b;
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return static_cast<double>(a) * b;
   }
 };
 
 struct mixed_power {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return static_cast<mshadow::half::half_t>(math::pow(a, b));
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return static_cast<float>(math::pow(a, b));
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return static_cast<double>(math::pow(a, b));
   }
 };
 
 struct mixed_rpower {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return static_cast<mshadow::half::half_t>(math::pow(b, a));
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return static_cast<float>(math::pow(b, a));
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return static_cast<double>(math::pow(b, a));
   }
@@ -380,7 +374,7 @@ struct mixed_rpower {
 #pragma GCC diagnostic ignored "-Wint-in-bool-context"
 #pragma GCC diagnostic ignored "-Wbool-compare"
 #endif
-MXNET_BINARY_MATH_OP_NC_WITH_BOOL(mul, a * b);
+MXNET_BINARY_MATH_OP_NC_WITH_BOOL(mul, a* b);
 
 MXNET_BINARY_MATH_OP_NC_WITH_BOOL(div, a / b);
 
@@ -394,8 +388,8 @@ MXNET_UNARY_MATH_OP(negation, -a);
 MXNET_UNARY_MATH_OP(reciprocal, 1.0f / math::id(a));
 
 struct bitwise_not : public mxnet_op::tunable {
-  template<typename DType,
-           typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
   MSHADOW_XINLINE static DType Map(DType a) {
     return ~static_cast<int64_t>(a);
   }
@@ -416,7 +410,7 @@ MXNET_UNARY_MATH_OP(log_sigmoid, math::log(1.0f / (1.0f + math::exp(-a))));
 MXNET_UNARY_MATH_OP(log_sigmoid_grad, 1.0f - math::exp(a));
 
 struct mish : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // reference softrelu
     auto softrelu = math::log1p(math::exp(a));
@@ -428,7 +422,7 @@ struct mish : public mxnet_op::tunable {
 };
 
 struct mish_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // Note: the input(a) is x(not y)
     auto softrelu = math::log1p(math::exp(a));
@@ -443,23 +437,23 @@ struct mish_grad : public mxnet_op::tunable {
 
 MXNET_UNARY_MATH_OP(softsign, a / (1.0f + math::fabs(a)));
 
-MXNET_UNARY_MATH_OP(softsign_grad, 1.0f /  math::sqr(1.0f + math::fabs(a)));
+MXNET_UNARY_MATH_OP(softsign_grad, 1.0f / math::sqr(1.0f + math::fabs(a)));
 
-MXNET_UNARY_MATH_OP_NC(selu, DType(SELU_LAMBDA) *
-                         (a > DType(0) ? a : DType(math::id(SELU_ALPHA) * math::expm1(a))));
+MXNET_UNARY_MATH_OP_NC(selu,
+                       DType(SELU_LAMBDA) *
+                           (a > DType(0) ? a : DType(math::id(SELU_ALPHA) * math::expm1(a))));
 
 MXNET_UNARY_MATH_OP_NC(selu_grad,
                        DType(SELU_LAMBDA) * (a > DType(0) ? DType(1) : DType(SELU_ALPHA + a)));
 
 MXNET_BINARY_MATH_OP_NC(prelu_grad, a > DType(0) ? DType(0) : a);
 
-MXNET_BINARY_MATH_OP_NC(xelu, a > DType(0) ? a :
-                        DType(static_cast<float>(a) * static_cast<float>(b)));
+MXNET_BINARY_MATH_OP_NC(xelu,
+                        a > DType(0) ? a : DType(static_cast<float>(a) * static_cast<float>(b)));
 
 MXNET_BINARY_MATH_OP_NC(xelu_grad, a > DType(0) ? DType(1) : b);
 
-MXNET_BINARY_MATH_OP_NC(elu, a > DType(0) ? a :
-                        DType(math::id(b) * math::expm1(a)));
+MXNET_BINARY_MATH_OP_NC(elu, a > DType(0) ? a : DType(math::id(b) * math::expm1(a)));
 
 MXNET_BINARY_MATH_OP_NC(elu_grad, a > DType(0) ? DType(1) : DType(b + a));
 
@@ -469,7 +463,7 @@ MXNET_UNARY_MATH_OP(tanh_grad, 1.0f - math::sqr(a));
 
 /*! \brief SoftReLU, also known as softplus activation */
 struct softrelu : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // Avoid overflow of exp for large inputs.
     // Thresholds 20.0 is chosen such that softrelu(a) = a
@@ -491,11 +485,13 @@ MXNET_UNARY_MATH_OP(erf_grad, 2.0 / math::sqrt(PI) * math::exp(-(a * a)));
 MXNET_SIMPLE_UNARY_MATH_OP(erf);
 
 MXNET_UNARY_MATH_OP(gelu,
-  DType(0.5f * static_cast<float>(a) * (1.0f + math::erf(static_cast<float>(a) / SQRT_2))));
+                    DType(0.5f * static_cast<float>(a) *
+                          (1.0f + math::erf(static_cast<float>(a) / SQRT_2))));
 
 MXNET_BINARY_MATH_OP_NC(gelu_grad,
-  DType(0.5f * (1.0f + math::erf(static_cast<float>(a) / SQRT_2) +
-                static_cast<float>(a) * erf_grad::Map(static_cast<float>(a) / SQRT_2) / SQRT_2)));
+                        DType(0.5f * (1.0f + math::erf(static_cast<float>(a) / SQRT_2) +
+                                      static_cast<float>(a) *
+                                          erf_grad::Map(static_cast<float>(a) / SQRT_2) / SQRT_2)));
 
 MXNET_SIMPLE_UNARY_MATH_OP(exp);
 
@@ -509,13 +505,13 @@ MXNET_SIMPLE_UNARY_MATH_OP(log10);
 
 // Constant is 1 / log(10)
 struct log10_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     return DType(0.4342944819f / static_cast<float>(a));
   }
 };
 
-template<>
+template <>
 MSHADOW_XINLINE double log10_grad::Map<double>(double a) {
   return 0.43429448190325182765 / a;
 }
@@ -524,13 +520,13 @@ MXNET_SIMPLE_UNARY_MATH_OP(log2);
 
 // Constant is 1 / log(2)
 struct log2_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     return DType(1.442695041f / static_cast<float>(a));
   }
 };
 
-template<>
+template <>
 MSHADOW_XINLINE double log2_grad::Map<double>(double a) {
   return 1.44269504088896340737 / a;
 }
@@ -606,21 +602,22 @@ MXNET_BINARY_MATH_OP_NC(threshold, a < b ? DType(1) : DType(0));
 MXNET_BINARY_MATH_OP_NC(threshold_eq, a <= b ? DType(1) : DType(0));
 
 /*! \brief used for generate element of abs */
-MXNET_UNARY_MATH_OP(abs, math::fabs(a)); // NOLINT(*)
+MXNET_UNARY_MATH_OP(abs, math::fabs(a));  // NOLINT(*)
 
 /*! \brief used for generate element of sign */
 struct sign : public mxnet_op::tunable {
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<!is_unsigned<DType>::value, DType>::type
-  Map(DType a) {
-    if (a < DType(0)) return DType(-DType(1));
-    if (a > DType(0)) return DType(1);
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<!is_unsigned<DType>::value, DType>::type Map(DType a) {
+    if (a < DType(0))
+      return DType(-DType(1));
+    if (a > DType(0))
+      return DType(1);
     return DType(0);
   }
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<is_unsigned<DType>::value, DType>::type
-  Map(DType a) {
-    if (a > DType(0)) return DType(1);
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<is_unsigned<DType>::value, DType>::type Map(DType a) {
+    if (a > DType(0))
+      return DType(1);
     return DType(0);
   }
 };
@@ -675,13 +672,13 @@ MXNET_BINARY_LOGIC_OP_NC(np_equal, a == b ? true : false);
 
 MXNET_BINARY_LOGIC_OP_NC(np_not_equal, a != b ? true : false);
 
-MXNET_BINARY_LOGIC_OP_NC(np_logical_and, a && b ? true : false);
+MXNET_BINARY_LOGIC_OP_NC(np_logical_and, a&& b ? true : false);
 
 MXNET_BINARY_LOGIC_OP_NC(np_logical_or, a || b ? true : false);
 
 MXNET_BINARY_LOGIC_OP_NC(np_logical_xor, (a || b) && !(a && b) ? true : false);
 
-MXNET_BINARY_MATH_OP(logical_and, a && b ? DType(1) : DType(0));
+MXNET_BINARY_MATH_OP(logical_and, a&& b ? DType(1) : DType(0));
 
 MXNET_BINARY_MATH_OP(logical_or, a || b ? DType(1) : DType(0));
 
@@ -733,21 +730,21 @@ MXNET_SIMPLE_UNARY_MATH_OP(trunc);
 
 /*! \brief used to round number to nearest integer */
 struct rint : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     auto floor = math::floor(a);
-    auto ceil = math::ceil(a);
-    auto af = math::id(a);
+    auto ceil  = math::ceil(a);
+    auto af    = math::id(a);
     return DType((af - floor) <= (ceil - af) ? floor : ceil);
   }
 };
 
 /*! \brief used to round number to integer nearest to 0 */
 struct fix : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     auto floor = math::floor(a);
-    auto ceil = math::ceil(a);
+    auto ceil  = math::ceil(a);
     return DType((floor > 0 ? floor : -floor) < (ceil > 0 ? ceil : -ceil) ? floor : ceil);
   }
 };
@@ -758,7 +755,7 @@ struct fix : public mxnet_op::tunable {
 #endif
 /*! \brief used to determine whether a number is Not A Number*/
 struct isnan : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static bool Map(DType a) {
     return IsNan(a);
   }
@@ -766,7 +763,7 @@ struct isnan : public mxnet_op::tunable {
 
 /*! \brief used to determine whether a number is infinite*/
 struct isinf : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static bool Map(DType a) {
     return IsInf(a);
   }
@@ -774,7 +771,7 @@ struct isinf : public mxnet_op::tunable {
 
 /*! \brief used to determine whether a number is finite*/
 struct isfinite : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static bool Map(DType a) {
     return !IsNan(a) && !IsInf(a);
   }
@@ -782,7 +779,7 @@ struct isfinite : public mxnet_op::tunable {
 
 /*! \brief used to determine whether a number is positive infinity*/
 struct isposinf : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static bool Map(DType a) {
     return IsInf(a) && a > 0;
   }
@@ -790,7 +787,7 @@ struct isposinf : public mxnet_op::tunable {
 
 /*! \brief used to determine whether a number is negative infinity*/
 struct isneginf : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static bool Map(DType a) {
     return IsInf(a) && a < 0;
   }
@@ -816,39 +813,39 @@ MXNET_BINARY_MATH_OP(rdiv_grad, -math::id(b) / math::sqr(a));
 
 MXNET_BINARY_MATH_OP(copysign, (a >= 0 && b >= 0) || (a < 0 && b < 0) ? a : -a);
 
-MXNET_BINARY_MATH_OP(copysign_grad, (a >= 0 && b >= 0) || (a < 0 && b < 0) ? 1: -1);
+MXNET_BINARY_MATH_OP(copysign_grad, (a >= 0 && b >= 0) || (a < 0 && b < 0) ? 1 : -1);
 
 MXNET_BINARY_MATH_OP(copysign_rgrad, 0);
 
 MXNET_BINARY_MATH_OP(rcopysign, (b >= 0 && a >= 0) || (b < 0 && a < 0) ? b : -b);
 
 struct mod : public mxnet_op::tunable {
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<!is_unsigned<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<!is_unsigned<DType>::value, DType>::type Map(DType a,
+                                                                                         DType b) {
     if (b == DType(0)) {
       return DType(0);
     } else if (b < DType(0)) {
       if (a < DType(0)) {
         return DType(-::fmod(-static_cast<double>(a), -static_cast<double>(b)));
       } else {
-        return DType(::fmod(static_cast<double>(a), -static_cast<double>(b)) +
-                     (::fmod(static_cast<double>(a), -static_cast<double>(b)) != DType(0)
-                      ? b : DType(0)));
+        return DType(
+            ::fmod(static_cast<double>(a), -static_cast<double>(b)) +
+            (::fmod(static_cast<double>(a), -static_cast<double>(b)) != DType(0) ? b : DType(0)));
       }
     } else {
       if (a < DType(0)) {
-        return DType(-::fmod(-static_cast<double>(a), static_cast<double>(b)) +
-                     (::fmod(-static_cast<double>(a), static_cast<double>(b)) != DType(0)
-                      ? b : DType(0)));
+        return DType(
+            -::fmod(-static_cast<double>(a), static_cast<double>(b)) +
+            (::fmod(-static_cast<double>(a), static_cast<double>(b)) != DType(0) ? b : DType(0)));
       } else {
         return DType(::fmod(static_cast<double>(a), static_cast<double>(b)));
       }
     }
   }
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<is_unsigned<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<is_unsigned<DType>::value, DType>::type Map(DType a,
+                                                                                        DType b) {
     if (b == DType(0)) {
       return DType(0);
     } else {
@@ -858,144 +855,146 @@ struct mod : public mxnet_op::tunable {
 };
 
 struct mixed_mod {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return mod::Map(static_cast<mshadow::half::half_t>(a), b);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return mod::Map(static_cast<float>(a), b);
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return mod::Map(static_cast<double>(a), b);
   }
 };
 
 struct mixed_rmod {
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static mshadow::half::half_t Map(DType a, mshadow::half::half_t b) {
     return mod::Map(b, static_cast<mshadow::half::half_t>(a));
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return mod::Map(b, static_cast<float>(a));
   }
 
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return mod::Map(b, static_cast<double>(a));
   }
 };
 
 struct fmod : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     if (b == DType(0)) {
       return DType(0);
     } else {
-        return DType(::fmod(static_cast<double>(a), static_cast<double>(b)));
+      return DType(::fmod(static_cast<double>(a), static_cast<double>(b)));
     }
   }
 };
 
 struct rfmod : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     if (a == DType(0)) {
       return DType(0);
-    } else  {
+    } else {
       return DType(::fmod(static_cast<double>(b), static_cast<double>(a)));
     }
   }
 };
 
-struct mod_grad : public mxnet_op::tunable  {
-  template<typename DType>
+struct mod_grad : public mxnet_op::tunable {
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return DType(0);
   }
 };
-template<>
+template <>
 MSHADOW_XINLINE double mod_grad::Map<double>(double a, double b) {
   return 1.0;
 }
-template<>
+template <>
 MSHADOW_XINLINE float mod_grad::Map<float>(float a, float b) {
   return 1.0f;
 }
 
-template<>
-MSHADOW_XINLINE mshadow::half::half_t mod_grad::Map<mshadow::half::half_t>
-                                                   (mshadow::half::half_t a,
-                                                    mshadow::half::half_t b) {
+template <>
+MSHADOW_XINLINE mshadow::half::half_t mod_grad::Map<mshadow::half::half_t>(
+    mshadow::half::half_t a,
+    mshadow::half::half_t b) {
   return mshadow::half::half_t(1.0f);
 }
 
 struct mod_rgrad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return DType(0);
   }
 };
-template<>
+template <>
 MSHADOW_XINLINE double mod_rgrad::Map<double>(double a, double b) {
-  return -::floor(a/b);
+  return -::floor(a / b);
 }
-template<>
+template <>
 MSHADOW_XINLINE float mod_rgrad::Map<float>(float a, float b) {
-  return -::floorf(a/b);
+  return -::floorf(a / b);
 }
 
-template<>
-MSHADOW_XINLINE mshadow::half::half_t mod_rgrad::Map<mshadow::half::half_t>
-                                                    (mshadow::half::half_t a,
-                                                     mshadow::half::half_t b) {
-  return mshadow::half::half_t(-::floorf(static_cast<float>(a)/static_cast<float>(b)));
+template <>
+MSHADOW_XINLINE mshadow::half::half_t mod_rgrad::Map<mshadow::half::half_t>(
+    mshadow::half::half_t a,
+    mshadow::half::half_t b) {
+  return mshadow::half::half_t(-::floorf(static_cast<float>(a) / static_cast<float>(b)));
 }
 
 struct rmod : public mxnet_op::tunable {
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<!is_unsigned<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<!is_unsigned<DType>::value, DType>::type Map(DType a,
+                                                                                         DType b) {
     if (a == DType(0)) {
       return DType(0);
     } else if (a < DType(0)) {
       if (b < DType(0)) {
         return DType(-::fmod(-static_cast<double>(b), -static_cast<double>(a)));
       } else {
-        return DType(::fmod(static_cast<double>(b), -static_cast<double>(a)) +
-                     (::fmod(static_cast<double>(b), -static_cast<double>(a)) != DType(0)
-                      ? a : DType(0)));
+        return DType(
+            ::fmod(static_cast<double>(b), -static_cast<double>(a)) +
+            (::fmod(static_cast<double>(b), -static_cast<double>(a)) != DType(0) ? a : DType(0)));
       }
     } else {
       if (b < DType(0)) {
-        return DType(-::fmod(-static_cast<double>(b), static_cast<double>(a)) +
-                     (::fmod(-static_cast<double>(b), static_cast<double>(a)) != DType(0)
-                      ? a : DType(0)));
+        return DType(
+            -::fmod(-static_cast<double>(b), static_cast<double>(a)) +
+            (::fmod(-static_cast<double>(b), static_cast<double>(a)) != DType(0) ? a : DType(0)));
       } else {
         return DType(::fmod(static_cast<double>(b), static_cast<double>(a)));
       }
     }
   }
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<is_unsigned<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<is_unsigned<DType>::value, DType>::type Map(DType a,
+                                                                                        DType b) {
     if (a == DType(0)) {
       return DType(0);
     } else {
@@ -1005,29 +1004,29 @@ struct rmod : public mxnet_op::tunable {
 };
 
 struct rmod_grad {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return DType(0);
   }
 };
-template<>
+template <>
 MSHADOW_XINLINE double rmod_grad::Map<double>(double a, double b) {
-  return -::floor(b/a);
+  return -::floor(b / a);
 }
-template<>
+template <>
 MSHADOW_XINLINE float rmod_grad::Map<float>(float a, float b) {
-  return -::floorf(b/a);
+  return -::floorf(b / a);
 }
 
-template<>
-MSHADOW_XINLINE mshadow::half::half_t rmod_grad::Map<mshadow::half::half_t>
-                                                   (mshadow::half::half_t a,
-                                                    mshadow::half::half_t b) {
-  return mshadow::half::half_t(-::floorf(static_cast<float>(b/a)));
+template <>
+MSHADOW_XINLINE mshadow::half::half_t rmod_grad::Map<mshadow::half::half_t>(
+    mshadow::half::half_t a,
+    mshadow::half::half_t b) {
+  return mshadow::half::half_t(-::floorf(static_cast<float>(b / a)));
 }
 
 struct clip : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType x, DType bound) {
     if (x > bound) {
       return bound;
@@ -1037,7 +1036,7 @@ struct clip : public mxnet_op::tunable {
       return x;
     }
   }
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType x, DType lower_bound, DType upper_bound) {
     if (x > upper_bound) {
       return upper_bound;
@@ -1053,7 +1052,7 @@ struct clip : public mxnet_op::tunable {
 MXNET_UNARY_MATH_OP(gamma, math::tgamma(a));
 
 struct gamma_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // default implementation using floating precision
     float af(static_cast<float>(a));
@@ -1061,7 +1060,7 @@ struct gamma_grad : public mxnet_op::tunable {
   }
 };
 
-template<>
+template <>
 MSHADOW_XINLINE double gamma_grad::Map<double>(double a) {
   return math::tgamma(a) * special_functions::cephes::psi<double>(a);
 }
@@ -1071,14 +1070,14 @@ MSHADOW_XINLINE double gamma_grad::Map<double>(double a) {
 MXNET_UNARY_MATH_OP(gammaln, math::lgamma(a));
 
 struct gammaln_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // default implementation using floating precision
     return DType(special_functions::cephes::psi<float>(a));
   }
 };
 
-template<>
+template <>
 MSHADOW_XINLINE double gammaln_grad::Map<double>(double a) {
   return special_functions::cephes::psi<double>(a);
 }
@@ -1086,14 +1085,14 @@ MSHADOW_XINLINE double gammaln_grad::Map<double>(double a) {
 /***** digamma ******/
 
 struct digamma : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // default implementation using floating precision
     return DType(special_functions::cephes::psi<float>(a));
   }
 };
 
-template<>
+template <>
 MSHADOW_XINLINE double digamma::Map<double>(double a) {
   return special_functions::cephes::psi<double>(a);
 }
@@ -1101,14 +1100,14 @@ MSHADOW_XINLINE double digamma::Map<double>(double a) {
 /***** trigamma ******/
 
 struct trigamma : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     // default implementation using floating precision
     return DType(special_functions::trigamma<float>(a));
   }
 };
 
-template<>
+template <>
 MSHADOW_XINLINE double trigamma::Map<double>(double a) {
   return special_functions::trigamma<double>(a);
 }
@@ -1124,11 +1123,11 @@ MSHADOW_XINLINE double trigamma::Map<double>(double a) {
  */
 struct smooth_l1_loss : public mxnet_op::tunable {
   // a is x, b is sigma
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
-    auto bsq = math::sqr(b);
+    auto bsq  = math::sqr(b);
     auto ibsq = 1.0f / bsq;
-    auto af = math::id(a);
+    auto af   = math::id(a);
     if (af > ibsq) {
       return DType(af - 0.5f * ibsq);
     } else if (af < -ibsq) {
@@ -1145,11 +1144,11 @@ struct smooth_l1_loss : public mxnet_op::tunable {
  */
 struct smooth_l1_gradient : public mxnet_op::tunable {
   // a is x, b is sigma2
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
-    auto bsq = math::sqr(b);
+    auto bsq  = math::sqr(b);
     auto ibsq = 1.0f / bsq;
-    auto af = math::id(a);
+    auto af   = math::id(a);
     if (af > ibsq) {
       return DType(1);
     } else if (af < -ibsq) {
@@ -1167,8 +1166,8 @@ struct gamma_implicit_grad {
   template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType x) {
     if (x < 0.8f) {
-      DType numer = 1;
-      DType denom = a;
+      DType numer   = 1;
+      DType denom   = a;
       DType series1 = numer / denom;
       DType series2 = numer / (denom * denom);
       for (int i = 1; i <= 5; i++) {
@@ -1178,43 +1177,58 @@ struct gamma_implicit_grad {
         series2 += numer / (denom * denom);
       }
       DType pow_x_alpha = math::pow(x, a);
-      DType gamma_pdf = math::pow(x, a - 1) * math::exp(-x);
-      DType gamma_cdf = pow_x_alpha * series1;
+      DType gamma_pdf   = math::pow(x, a - 1) * math::exp(-x);
+      DType gamma_cdf   = pow_x_alpha * series1;
       DType gamma_cdf_alpha =
-          (math::log(x) - DType(special_functions::cephes::psi<float>(a))) *
-              gamma_cdf -
+          (math::log(x) - DType(special_functions::cephes::psi<float>(a))) * gamma_cdf -
           pow_x_alpha * series2;
       DType result = -gamma_cdf_alpha / gamma_pdf;
-      return IsNan(result) ? static_cast<DType>( 0.f ) : static_cast<DType>(result);
+      return IsNan(result) ? static_cast<DType>(0.f) : static_cast<DType>(result);
     }
     if (a > 8.0f) {
       if (0.9f * a <= x && x <= 1.1f * a) {
         DType numer_1 = 1 + 24 * a * (1 + 12 * a);
-        DType numer_2 = 1440 * (a * a) + 6 * x * (53 - 120 * x) -
-                        65 * x * x / a + a * (107 + 3600 * x);
+        DType numer_2 =
+            1440 * (a * a) + 6 * x * (53 - 120 * x) - 65 * x * x / a + a * (107 + 3600 * x);
         DType denom = 1244160 * (a * a) * (a * a);
         return static_cast<DType>(numer_1 * numer_2 / denom);
       }
-      DType denom = math::sqrt(8 * a);
-      DType term2 = denom / (a - x);
-      DType term3 =
-          math::pow(x - a - a * math::log(x / a), static_cast<DType>(-1.5));
+      DType denom  = math::sqrt(8 * a);
+      DType term2  = denom / (a - x);
+      DType term3  = math::pow(x - a - a * math::log(x / a), static_cast<DType>(-1.5));
       DType term23 = (x < a) ? term2 - term3 : term2 + term3;
-      DType term1 = math::log(x / a) * term23 -
-                    math::sqrt(2 / a) * (a + x) / ((a - x) * (a - x));
+      DType term1  = math::log(x / a) * term23 - math::sqrt(2 / a) * (a + x) / ((a - x) * (a - x));
       DType stirling = 1 + 1 / (12 * a) * (1 + 1 / (24 * a));
-      DType numer = x * term1;
+      DType numer    = x * term1;
       return static_cast<DType>(-stirling * numer / denom);
     }
-    DType u = math::log(x / a);
-    DType v = math::log(a);
+    DType u             = math::log(x / a);
+    DType v             = math::log(a);
     DType coef_uv[3][8] = {
-        {0.16009398, -0.094634809, 0.025146376, -0.0030648343, 1, 0.32668115,
-         0.10406089, 0.0014179084},
-        {0.53487893, 0.1298071, 0.065735949, -0.0015649758, 0.16639465,
-         0.020070113, -0.0035938915, -0.00058392623},
-        {0.040121004, -0.0065914022, -0.0026286047, -0.0013441777, 0.017050642,
-         -0.0021309326, 0.00085092367, -1.5247877e-07},
+        {0.16009398,
+         -0.094634809,
+         0.025146376,
+         -0.0030648343,
+         1,
+         0.32668115,
+         0.10406089,
+         0.0014179084},
+        {0.53487893,
+         0.1298071,
+         0.065735949,
+         -0.0015649758,
+         0.16639465,
+         0.020070113,
+         -0.0035938915,
+         -0.00058392623},
+        {0.040121004,
+         -0.0065914022,
+         -0.0026286047,
+         -0.0013441777,
+         0.017050642,
+         -0.0021309326,
+         0.00085092367,
+         -1.5247877e-07},
     };
     DType coef_v[8];
     for (int i = 0; i < 8; i++) {
@@ -1229,51 +1243,57 @@ struct gamma_implicit_grad {
 /*! \brief product reducer */
 struct product {
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) {  // NOLINT(*)
     dst *= src;
   }
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src, volatile DType& none) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst,  // NOLINT(*)
+                                     volatile DType src,
+                                     volatile DType& none) {  // NOLINT(*)
     Reduce(dst, src);
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     Reduce(dst_val, src_val);
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& dst_residual, volatile DType& src_val, volatile DType& src_residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,         // NOLINT(*)
+                                    volatile DType& dst_residual,    // NOLINT(*)
+                                    volatile DType& src_val,         // NOLINT(*)
+                                    volatile DType& src_residual) {  // NOLINT(*)
     Reduce(dst_val, src_val);
   }
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {}  // NOLINT(*)
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& none) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& none) {}  // NOLINT(*)
   /*!
-  *\brief calculate gradient of redres with respect to redsrc,
-  * redres: reduced result, redsrc: one of reduction element
-  */
-  template<typename DType>
+   *\brief calculate gradient of redres with respect to redsrc,
+   * redres: reduced result, redsrc: one of reduction element
+   */
+  template <typename DType>
   MSHADOW_XINLINE static DType PartialGrad(DType redres, DType redsrc) {
     return redres / redsrc;
   }
   /*!
-  *\brief set the initial value during reduction
-  */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv) { // NOLINT(*)
+   *\brief set the initial value during reduction
+   */
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
     initv = 1;
   }
   /*!
-  *\brief set the initial value during reduction
-  */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &none) { // NOLINT(*)
+   *\brief set the initial value during reduction
+   */
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& none) {  // NOLINT(*)
     SetInitValue(initv);
   }
 };
@@ -1282,7 +1302,7 @@ MXNET_UNARY_MATH_OP_NC(relu, IsNan(a) || (a > DType(0)) ? a : DType(0));
 
 /*! \brief used for computing gradient of relu operator */
 struct relu_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a) {
     if (IsNan(a)) {
       return a;
@@ -1294,7 +1314,7 @@ struct relu_grad : public mxnet_op::tunable {
 
 /*! \brief used for computing binary operator maximum */
 struct maximum : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     if (IsNan(a)) {
       return a;
@@ -1306,7 +1326,7 @@ struct maximum : public mxnet_op::tunable {
 
 /*! \brief used for computing binary operator fmax */
 struct fmax : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     if (IsNan(b)) {
       return a;
@@ -1320,7 +1340,7 @@ struct fmax : public mxnet_op::tunable {
 
 /*! \brief used for computing binary operator minimum */
 struct minimum : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     if (IsNan(a)) {
       return a;
@@ -1332,7 +1352,7 @@ struct minimum : public mxnet_op::tunable {
 
 /*! \brief used for computing binary operator fmin */
 struct fmin : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     if (IsNan(b)) {
       return a;
@@ -1346,7 +1366,7 @@ struct fmin : public mxnet_op::tunable {
 
 /*! \brief boolean any/all kernel that determines whether elem is NonZero */
 struct NonZero {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static bool Map(DType a) {
     return (a != DType(0));
   }
@@ -1355,59 +1375,69 @@ struct NonZero {
 /*! \brief sum reducer that ignores NaN values in the input */
 struct nansum {
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) { // NOLINT(*)
-    if (IsNan(src)) return;
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) {  // NOLINT(*)
+    if (IsNan(src))
+      return;
     dst += src;
   }
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src, volatile DType& residual) { // NOLINT(*)
-    if (IsNan(src)) return;
-    DType y = src - residual;
-    DType t = dst + y;
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst,         // NOLINT(*)
+                                     volatile DType src,          // NOLINT(*)
+                                     volatile DType& residual) {  // NOLINT(*)
+    if (IsNan(src))
+      return;
+    DType y  = src - residual;
+    DType t  = dst + y;
     residual = (t - dst) - y;
-    dst = t;
+    dst      = t;
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     Reduce(dst_val, src_val);
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& dst_residual, volatile DType& src_val, volatile DType& src_residual) { // NOLINT(*)
-    DType t1 = dst_val + src_val;
-    DType e = t1 - src_val;
-    DType t2 = ((src_val - e) + (dst_val - (t1 - e))) + dst_residual + src_residual;
-    dst_val = t1 + t2;
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,         // NOLINT(*)
+                                    volatile DType& dst_residual,    // NOLINT(*)
+                                    volatile DType& src_val,         // NOLINT(*)
+                                    volatile DType& src_residual) {  // NOLINT(*)
+    DType t1     = dst_val + src_val;
+    DType e      = t1 - src_val;
+    DType t2     = ((src_val - e) + (dst_val - (t1 - e))) + dst_residual + src_residual;
+    dst_val      = t1 + t2;
     dst_residual = t2 - (dst_val - t1);
   }
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {}  // NOLINT(*)
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& residual) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst,         // NOLINT(*)
+                                       volatile DType& residual) {  // NOLINT(*)
+  }
   /*!
-  *\brief set the initial value during reduction
-  */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType & initv) { // NOLINT(*)
-      initv = 0;
+   *\brief set the initial value during reduction
+   */
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
+    initv = 0;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& residual) {  // NOLINT(*)
     SetInitValue(initv);
     residual = 0;
   }
 };
 
 struct nansum_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return IsNan(a) ? DType(0) : DType(1);
   }
@@ -1416,45 +1446,52 @@ struct nansum_grad : public mxnet_op::tunable {
 /*! \brief product reducer that ignores NaN values in the input */
 struct nanprod {
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) { // NOLINT(*)
-    if (IsNan(src)) return;
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) {  // NOLINT(*)
+    if (IsNan(src))
+      return;
     dst *= src;
   }
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src, volatile DType& none) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst,     // NOLINT(*)
+                                     volatile DType src,      // NOLINT(*)
+                                     volatile DType& none) {  // NOLINT(*)
     Reduce(dst, src);
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     Reduce(dst_val, src_val);
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& dst_residual, volatile DType& src_val, volatile DType& src_residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,         // NOLINT(*)
+                                    volatile DType& dst_residual,    // NOLINT(*)
+                                    volatile DType& src_val,         // NOLINT(*)
+                                    volatile DType& src_residual) {  // NOLINT(*)
     Reduce(dst_val, src_val);
   }
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {}  // NOLINT(*)
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& none) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& none) {}  // NOLINT(*)
   /*!
-  *\brief set the initial value during reduction
-  */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType & initv) { // NOLINT(*)
+   *\brief set the initial value during reduction
+   */
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
     initv = 1;
   }
 
   /*!
-  *\brief set the initial value during reduction
-  */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &none) { // NOLINT(*)
+   *\brief set the initial value during reduction
+   */
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& none) {  // NOLINT(*)
     SetInitValue(initv);
   }
 };
@@ -1462,46 +1499,54 @@ struct nanprod {
 /*! \brief compute l2 norm */
 struct nrm2 {
   /*! \brief do reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& sum_of_squares, volatile DType src) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& sum_of_squares,  // NOLINT(*)
+                                     volatile DType src) {            // NOLINT(*)
     sum_of_squares += src * src;
   }
   /*! \brief do stable reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& sum_of_squares,  volatile DType src, volatile DType& scale) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& sum_of_squares,  // NOLINT(*)
+                                     volatile DType src,              // NOLINT(*)
+                                     volatile DType& scale) {         // NOLINT(*)
     if (src != 0) {
       DType abs = mshadow_op::abs::Map(src);
       if (scale < abs) {
         sum_of_squares = 1 + sum_of_squares * (scale / abs) * (scale / abs);
-        scale = abs;
+        scale          = abs;
       } else {
         sum_of_squares = sum_of_squares + (abs / scale) * (abs / scale);
       }
     }
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     dst_val += src_val;
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_ssq, volatile DType& dst_scale, volatile DType& src_ssq, volatile DType& src_scale) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_ssq,      // NOLINT(*)
+                                    volatile DType& dst_scale,    // NOLINT(*)
+                                    volatile DType& src_ssq,      // NOLINT(*)
+                                    volatile DType& src_scale) {  // NOLINT(*)
     if (dst_scale != 0 && dst_scale >= src_scale) {
       dst_ssq = dst_ssq + src_ssq * (src_scale / dst_scale) * (src_scale / dst_scale);
     } else if (src_scale != 0 && dst_scale < src_scale) {
-      dst_ssq = src_ssq + dst_ssq * (dst_scale / src_scale) * (dst_scale / src_scale);
+      dst_ssq   = src_ssq + dst_ssq * (dst_scale / src_scale) * (dst_scale / src_scale);
       dst_scale = src_scale;
     }
   }
   /*! \brief finalize reduction result */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& sum_of_squares) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& sum_of_squares) {  // NOLINT(*)
     sum_of_squares = math::sqrt(sum_of_squares);
   }
   /*! \brief finalize reduction result */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& sum_of_squares, volatile DType& scale) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& sum_of_squares,  // NOLINT(*)
+                                       volatile DType& scale) {         // NOLINT(*)
 #pragma GCC diagnostic push
 #if __GNUC__ >= 7
 #pragma GCC diagnostic ignored "-Wint-in-bool-context"
@@ -1513,22 +1558,22 @@ struct nrm2 {
    *\brief calculate gradient of redres with respect to redsrc,
    * redres: reduced result, redsrc: one of reduction element
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType PartialGrad(DType redres, DType redsrc) {
     return redsrc / redres;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &sum_of_squares) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& sum_of_squares) {  // NOLINT(*)
     sum_of_squares = 0;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &sum_of_squares, DType &scale) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& sum_of_squares, DType& scale) {  // NOLINT(*)
     SetInitValue(sum_of_squares);
     scale = 0;
   }
@@ -1537,58 +1582,66 @@ struct nrm2 {
 /*! \brief sum reducer */
 struct sum {
   /*! \brief do reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& dst,  volatile DType src) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& dst, volatile DType src) {  // NOLINT(*)
     dst += src;
   }
   /*! \brief do stable reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& dst,  volatile DType src, volatile DType& residual) { // NOLINT(*)
-    DType y = src - residual;
-    DType t = dst + y;
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& dst,         // NOLINT(*)
+                                     volatile DType src,          // NOLINT(*)
+                                     volatile DType& residual) {  // NOLINT(*)
+    DType y  = src - residual;
+    DType t  = dst + y;
     residual = (t - dst) - y;
-    dst = t;
+    dst      = t;
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     Reduce(dst_val, src_val);
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& dst_residual, volatile DType& src_val, volatile DType& src_residual) { // NOLINT(*)
-    DType t1 = dst_val + src_val;
-    DType e = t1 - dst_val;
-    DType t2 = ((src_val - e) + (dst_val - (t1 - e))) + dst_residual + src_residual;
-    dst_val = t1 + t2;
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,         // NOLINT(*)
+                                    volatile DType& dst_residual,    // NOLINT(*)
+                                    volatile DType& src_val,         // NOLINT(*)
+                                    volatile DType& src_residual) {  // NOLINT(*)
+    DType t1     = dst_val + src_val;
+    DType e      = t1 - dst_val;
+    DType t2     = ((src_val - e) + (dst_val - (t1 - e))) + dst_residual + src_residual;
+    dst_val      = t1 + t2;
     dst_residual = t2 - (dst_val - t1);
   }
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {}  // NOLINT(*)
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& residual) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst,         // NOLINT(*)
+                                       volatile DType& residual) {  // NOLINT(*)
+  }
   /*!
    *\brief calculate gradient of redres with respect to redsrc,
    * redres: reduced result, redsrc: one of reduction element
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType PartialGrad(DType redres, DType redsrc) {
     return 1;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
     initv = 0;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& residual) {  // NOLINT(*)
     SetInitValue(initv);
     residual = 0;
   }
@@ -1597,63 +1650,71 @@ struct sum {
 /*! \brief arg max reducer */
 struct argmax {
   /*! \brief do reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& dst,  volatile DType src) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& dst, volatile DType src) {  // NOLINT(*)
     if (dst.num < src.num || (dst.num == src.num && dst.idx > src.idx)) {
       dst.num = src.num;
       dst.idx = src.idx;
     }
   }
   /*! \brief do stable reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& dst,  volatile DType src, volatile DType& residual) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& dst,         // NOLINT(*)
+                                     volatile DType src,          // NOLINT(*)
+                                     volatile DType& residual) {  // NOLINT(*)
     if (dst.num < src.num || (dst.num == src.num && dst.idx > src.idx)) {
       dst.num = src.num;
       dst.idx = src.idx;
     }
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     if (dst_val.num < src_val.num || (dst_val.num == src_val.num && dst_val.idx > src_val.idx)) {
       dst_val.num = src_val.num;
       dst_val.idx = src_val.idx;
     }
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& dst_residual, volatile DType& src_val, volatile DType& src_residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,         // NOLINT(*)
+                                    volatile DType& dst_residual,    // NOLINT(*)
+                                    volatile DType& src_val,         // NOLINT(*)
+                                    volatile DType& src_residual) {  // NOLINT(*)
     if (dst_val.num < src_val.num || (dst_val.num == src_val.num && dst_val.idx > src_val.idx)) {
       dst_val.num = src_val.num;
       dst_val.idx = src_val.idx;
     }
   }
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {}  // NOLINT(*)
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& residual) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst,         // NOLINT(*)
+                                       volatile DType& residual) {  // NOLINT(*)
+  }
   /*!
    *\brief calculate gradient of redres with respect to redsrc,
    * redres: reduced result, redsrc: one of reduction element
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType PartialGrad(DType redres, DType redsrc) {
     return 1;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
     initv.num = mshadow::red::limits::NegInfValue<decltype(initv.num)>();
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& residual) {  // NOLINT(*)
     initv.num = mshadow::red::limits::NegInfValue<decltype(initv.num)>();
   }
 };
@@ -1661,69 +1722,77 @@ struct argmax {
 /*! \brief arg max reducer */
 struct argmin {
   /*! \brief do reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& dst,  volatile DType src) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& dst, volatile DType src) {  // NOLINT(*)
     if (dst.num > src.num) {
       dst.num = src.num;
       dst.idx = src.idx;
     }
   }
   /*! \brief do stable reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile AType& dst,  volatile DType src, volatile DType& residual) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile AType& dst,         // NOLINT(*)
+                                     volatile DType src,          // NOLINT(*)
+                                     volatile DType& residual) {  // NOLINT(*)
     if (dst.num > src.num) {
       dst.num = src.num;
       dst.idx = src.idx;
     }
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     if (dst_val.num > src_val.num) {
       dst_val.num = src_val.num;
       dst_val.idx = src_val.idx;
     }
   }
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& dst_residual, volatile DType& src_val, volatile DType& src_residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,         // NOLINT(*)
+                                    volatile DType& dst_residual,    // NOLINT(*)
+                                    volatile DType& src_val,         // NOLINT(*)
+                                    volatile DType& src_residual) {  // NOLINT(*)
     if (dst_val.num > src_val.num) {
       dst_val.num = src_val.num;
       dst_val.idx = src_val.idx;
     }
   }
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst) {}  // NOLINT(*)
   /*! \brief finalize reduction */
-  template<typename DType>
-  MSHADOW_XINLINE static void Finalize(volatile DType& dst, volatile DType& residual) {} // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Finalize(volatile DType& dst,         // NOLINT(*)
+                                       volatile DType& residual) {  // NOLINT(*)
+  }
   /*!
    *\brief calculate gradient of redres with respect to redsrc,
    * redres: reduced result, redsrc: one of reduction element
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType PartialGrad(DType redres, DType redsrc) {
     return 1;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
     initv.num = mshadow::red::limits::PosInfValue<decltype(initv.num)>();
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& residual) {  // NOLINT(*)
     initv.num = mshadow::red::limits::PosInfValue<decltype(initv.num)>();
   }
 };
 
 struct nanprod_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return IsNan(a) ? DType(0) : b / a;
   }
@@ -1737,9 +1806,9 @@ struct nanprod_grad : public mxnet_op::tunable {
 
 /*! \brief used for computing binary greatest common divisor */
 struct gcd : public mxnet_op::tunable {
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<is_integral<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<is_integral<DType>::value, DType>::type Map(DType a,
+                                                                                        DType b) {
     // minus cases.
     if (a < 0) {
       a = -a;
@@ -1759,32 +1828,32 @@ struct gcd : public mxnet_op::tunable {
       DType tmp;
       if (a < b) {
         tmp = a;
-        a = b;
-        b = tmp;
+        a   = b;
+        b   = tmp;
       }
       while (a % b != 0) {
-        a = a % b;
+        a   = a % b;
         tmp = a;
-        a = b;
-        b = tmp;
+        a   = b;
+        b   = tmp;
       }
       c = b;
     }
     return c;
   }
 
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<!is_integral<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<!is_integral<DType>::value, DType>::type Map(DType a,
+                                                                                         DType b) {
     return DType(0.0f);
   }
 };
 
 /*! \brief used for computing binary lowest common multiple */
 struct lcm : public mxnet_op::tunable {
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<is_integral<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<is_integral<DType>::value, DType>::type Map(DType a,
+                                                                                        DType b) {
     // minus cases.
     if (a < 0) {
       a = -a;
@@ -1802,22 +1871,22 @@ struct lcm : public mxnet_op::tunable {
       DType tmp_b = b;
       if (a < b) {
         tmp = a;
-        a = b;
-        b = tmp;
+        a   = b;
+        b   = tmp;
       }
       while (a % b != 0) {
-        a = a % b;
+        a   = a % b;
         tmp = a;
-        a = b;
-        b = tmp;
+        a   = b;
+        b   = tmp;
       }
       c = tmp_a / b * tmp_b;
     }
     return c;
   }
-  template<typename DType>
-  MSHADOW_XINLINE static typename enable_if<!is_integral<DType>::value, DType>::type
-  Map(DType a, DType b) {
+  template <typename DType>
+  MSHADOW_XINLINE static typename enable_if<!is_integral<DType>::value, DType>::type Map(DType a,
+                                                                                         DType b) {
     return DType(0.0f);
   }
 };
diff --git a/src/operator/mxnet_op.h b/src/operator/mxnet_op.h
index 78b834db853c..a0083cda3da8 100644
--- a/src/operator/mxnet_op.h
+++ b/src/operator/mxnet_op.h
@@ -22,7 +22,7 @@
  * \file mxnet_op.h
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #ifndef MXNET_OPERATOR_MXNET_OP_H_
 #define MXNET_OPERATOR_MXNET_OP_H_
 
@@ -51,14 +51,12 @@ const float PI = 3.14159265358979323846;
 using std::isnan;
 #endif
 
-template<typename xpu>
+template <typename xpu>
 int get_num_threads(const int N);
 
 #ifdef __CUDACC__
 #define CUDA_KERNEL_LOOP(i, n) \
-  for (int i = blockIdx.x * blockDim.x + threadIdx.x; \
-      i < (n); \
-      i += blockDim.x * gridDim.x)
+  for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < (n); i += blockDim.x * gridDim.x)
 
 inline cudaDeviceProp cuda_get_device_prop() {
   int device;
@@ -76,7 +74,7 @@ inline int cuda_get_num_blocks(const int N) {
   return std::min(kMaxGridNum, (N + kBaseThreadNum - 1) / kBaseThreadNum);
 }
 
-template<>
+template <>
 inline int get_num_threads<gpu>(const int N) {
   using namespace mshadow::cuda;
   return kBaseThreadNum * cuda_get_num_blocks(N);
@@ -84,78 +82,66 @@ inline int get_num_threads<gpu>(const int N) {
 
 #endif  // __CUDACC__
 
-template<>
+template <>
 inline int get_num_threads<cpu>(const int N) {
   return engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 }
 
 /*! \brief operator request type switch */
-#define MXNET_ASSIGN_REQ_SWITCH(req, ReqType, ...)  \
-  switch (req) {                                    \
-  case kNullOp:                                     \
-    break;                                          \
-  case kWriteInplace:                               \
-  case kWriteTo:                                    \
-    {                                               \
-      const OpReqType ReqType = kWriteTo;           \
-      {__VA_ARGS__}                                 \
-    }                                               \
-    break;                                          \
-  case kAddTo:                                      \
-    {                                               \
-      const OpReqType ReqType = kAddTo;             \
-      {__VA_ARGS__}                                 \
-    }                                               \
-    break;                                          \
-  default:                                          \
-    break;                                          \
+#define MXNET_ASSIGN_REQ_SWITCH(req, ReqType, ...) \
+  switch (req) {                                   \
+    case kNullOp:                                  \
+      break;                                       \
+    case kWriteInplace:                            \
+    case kWriteTo: {                               \
+      const OpReqType ReqType = kWriteTo;          \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    case kAddTo: {                                 \
+      const OpReqType ReqType = kAddTo;            \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    default:                                       \
+      break;                                       \
   }
 
-
 /*! \brief operator request type switch */
-#define MXNET_REQ_TYPE_SWITCH(req, ReqType, ...)  \
-  switch (req) {                                    \
-  case kNullOp:                                     \
-    {                                               \
-      const OpReqType ReqType = kNullOp;            \
-      {__VA_ARGS__}                                 \
-    }                                               \
-    break;                                          \
-  case kWriteInplace:                               \
-  case kWriteTo:                                    \
-    {                                               \
-      const OpReqType ReqType = kWriteTo;           \
-      {__VA_ARGS__}                                 \
-    }                                               \
-    break;                                          \
-  case kAddTo:                                      \
-    {                                               \
-      const OpReqType ReqType = kAddTo;             \
-      {__VA_ARGS__}                                 \
-    }                                               \
-    break;                                          \
-  default:                                          \
-    break;                                          \
+#define MXNET_REQ_TYPE_SWITCH(req, ReqType, ...) \
+  switch (req) {                                 \
+    case kNullOp: {                              \
+      const OpReqType ReqType = kNullOp;         \
+      { __VA_ARGS__ }                            \
+    } break;                                     \
+    case kWriteInplace:                          \
+    case kWriteTo: {                             \
+      const OpReqType ReqType = kWriteTo;        \
+      { __VA_ARGS__ }                            \
+    } break;                                     \
+    case kAddTo: {                               \
+      const OpReqType ReqType = kAddTo;          \
+      { __VA_ARGS__ }                            \
+    } break;                                     \
+    default:                                     \
+      break;                                     \
   }
 
-
 #define MXNET_NDIM_SWITCH(NDim, ndim, ...)         \
   if (NDim == 0) {                                 \
   } else if (NDim == 1) {                          \
     const int ndim = 1;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 2) {                          \
     const int ndim = 2;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 3) {                          \
     const int ndim = 3;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 4) {                          \
     const int ndim = 4;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 5) {                          \
     const int ndim = 5;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else {                                         \
     LOG(FATAL) << "ndim=" << NDim << "too large "; \
   }
@@ -164,173 +150,139 @@ inline int get_num_threads<cpu>(const int N) {
   if (NDim == 0) {                                 \
   } else if (NDim == 1) {                          \
     const int ndim = 1;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 2) {                          \
     const int ndim = 2;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 3) {                          \
     const int ndim = 3;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 4) {                          \
     const int ndim = 4;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 5) {                          \
     const int ndim = 5;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 6) {                          \
     const int ndim = 6;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 7) {                          \
     const int ndim = 7;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 8) {                          \
     const int ndim = 8;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 9) {                          \
     const int ndim = 9;                            \
-    {__VA_ARGS__}                                  \
+    { __VA_ARGS__ }                                \
   } else if (NDim == 10) {                         \
     const int ndim = 10;                           \
-    {__VA_ARGS__}                                  \
-  }  else {                                        \
+    { __VA_ARGS__ }                                \
+  } else {                                         \
     LOG(FATAL) << "ndim=" << NDim << "too large "; \
   }
 
-#define MXNET_NO_INT8_TYPE_SWITCH(type, DType, ...)        \
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      typedef float DType;                                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      typedef double DType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-  case mshadow::kBfloat16:                                 \
-    {                                                      \
-      typedef mshadow::half::half_t DType;                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    LOG(FATAL) << "This operation does not "               \
-                  "support int8 or uint8";                 \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    LOG(FATAL) << "This operation does not "               \
-                  "support int8 or uint8";                 \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      typedef int32_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      typedef int64_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_NO_INT8_TYPE_SWITCH(type, DType, ...) \
+  switch (type) {                                   \
+    case mshadow::kFloat32: {                       \
+      typedef float DType;                          \
+      { __VA_ARGS__ }                               \
+    } break;                                        \
+    case mshadow::kFloat64: {                       \
+      typedef double DType;                         \
+      { __VA_ARGS__ }                               \
+    } break;                                        \
+    case mshadow::kFloat16:                         \
+    case mshadow::kBfloat16: {                      \
+      typedef mshadow::half::half_t DType;          \
+      { __VA_ARGS__ }                               \
+    } break;                                        \
+    case mshadow::kUint8:                           \
+      LOG(FATAL) << "This operation does not "      \
+                    "support int8 or uint8";        \
+      break;                                        \
+    case mshadow::kInt8:                            \
+      LOG(FATAL) << "This operation does not "      \
+                    "support int8 or uint8";        \
+      break;                                        \
+    case mshadow::kInt32: {                         \
+      typedef int32_t DType;                        \
+      { __VA_ARGS__ }                               \
+    } break;                                        \
+    case mshadow::kInt64: {                         \
+      typedef int64_t DType;                        \
+      { __VA_ARGS__ }                               \
+    } break;                                        \
+    default:                                        \
+      LOG(FATAL) << "Unknown type enum " << type;   \
   }
 
-#define MXNET_NO_BFLOAT16_TYPE_SWITCH(type, DType, ...)     \
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      typedef float DType;                                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      typedef double DType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    {                                                      \
-      typedef mshadow::half::half_t DType;                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kBfloat16:                                 \
-    LOG(FATAL) << "This operation does not "               \
-                  "support bfloat16";                      \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    {                                                      \
-      typedef int32_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      typedef int32_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      typedef int64_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_NO_BFLOAT16_TYPE_SWITCH(type, DType, ...) \
+  switch (type) {                                       \
+    case mshadow::kFloat32: {                           \
+      typedef float DType;                              \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kFloat64: {                           \
+      typedef double DType;                             \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kFloat16: {                           \
+      typedef mshadow::half::half_t DType;              \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kBfloat16:                            \
+      LOG(FATAL) << "This operation does not "          \
+                    "support bfloat16";                 \
+      break;                                            \
+    case mshadow::kInt8: {                              \
+      typedef int32_t DType;                            \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kInt32: {                             \
+      typedef int32_t DType;                            \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kInt64: {                             \
+      typedef int64_t DType;                            \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    default:                                            \
+      LOG(FATAL) << "Unknown type enum " << type;       \
   }
 
-#define MXNET_NO_FLOAT16_TYPE_SWITCH(type, DType, ...)     \
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      typedef float DType;                                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      typedef double DType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    LOG(FATAL) << "This operation does not "               \
-                  "support float16";                       \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    {                                                      \
-      typedef uint8_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    {                                                      \
-      typedef int8_t DType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      typedef int32_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      typedef int64_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_NO_FLOAT16_TYPE_SWITCH(type, DType, ...) \
+  switch (type) {                                      \
+    case mshadow::kFloat32: {                          \
+      typedef float DType;                             \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kFloat64: {                          \
+      typedef double DType;                            \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kFloat16:                            \
+      LOG(FATAL) << "This operation does not "         \
+                    "support float16";                 \
+      break;                                           \
+    case mshadow::kUint8: {                            \
+      typedef uint8_t DType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kInt8: {                             \
+      typedef int8_t DType;                            \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kInt32: {                            \
+      typedef int32_t DType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kInt64: {                            \
+      typedef int64_t DType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    default:                                           \
+      LOG(FATAL) << "Unknown type enum " << type;      \
   }
 
 template <typename T>
@@ -343,261 +295,189 @@ struct AccType<mshadow::half::half_t> {
   using type = float;
 };
 
-#define MXNET_REAL_ACC_TYPE_SWITCH(type, DType, AType, ...)\
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      typedef float DType;                                 \
-      typedef double AType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      typedef double DType;                                \
-      typedef double AType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    {                                                      \
-      typedef mshadow::half::half_t DType;                 \
-      typedef float AType;                                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "floating point types not uint8";      \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "floating point types not int8";       \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "floating point types, not int32";     \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "floating point types, not int64";     \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kBool:                                     \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "floating point types, not bool";      \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_REAL_ACC_TYPE_SWITCH(type, DType, AType, ...) \
+  switch (type) {                                           \
+    case mshadow::kFloat32: {                               \
+      typedef float DType;                                  \
+      typedef double AType;                                 \
+      { __VA_ARGS__ }                                       \
+    } break;                                                \
+    case mshadow::kFloat64: {                               \
+      typedef double DType;                                 \
+      typedef double AType;                                 \
+      { __VA_ARGS__ }                                       \
+    } break;                                                \
+    case mshadow::kFloat16: {                               \
+      typedef mshadow::half::half_t DType;                  \
+      typedef float AType;                                  \
+      { __VA_ARGS__ }                                       \
+    } break;                                                \
+    case mshadow::kUint8: {                                 \
+      LOG(FATAL) << "This operation only support "          \
+                    "floating point types not uint8";       \
+    } break;                                                \
+    case mshadow::kInt8: {                                  \
+      LOG(FATAL) << "This operation only support "          \
+                    "floating point types not int8";        \
+    } break;                                                \
+    case mshadow::kInt32: {                                 \
+      LOG(FATAL) << "This operation only support "          \
+                    "floating point types, not int32";      \
+    } break;                                                \
+    case mshadow::kInt64: {                                 \
+      LOG(FATAL) << "This operation only support "          \
+                    "floating point types, not int64";      \
+    } break;                                                \
+    case mshadow::kBool: {                                  \
+      LOG(FATAL) << "This operation only support "          \
+                    "floating point types, not bool";       \
+    } break;                                                \
+    default:                                                \
+      LOG(FATAL) << "Unknown type enum " << type;           \
   }
 
-#define MXNET_ACC_TYPE_SWITCH(type, DType, AType, ...)\
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      typedef float DType;                                 \
-      typedef double AType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      typedef double DType;                                \
-      typedef double AType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    {                                                      \
-      typedef mshadow::half::half_t DType;                 \
-      typedef float AType;                                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    {                                                      \
-      typedef uint8_t DType;                               \
-      typedef uint32_t AType;                              \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    {                                                      \
-      typedef int8_t DType;                                \
-      typedef int32_t AType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      typedef int32_t DType;                               \
-      typedef int64_t AType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      typedef int64_t DType;                               \
-      typedef int64_t AType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kBool:                                     \
-    {                                                      \
-      typedef bool DType;                                  \
-      typedef int64_t AType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_ACC_TYPE_SWITCH(type, DType, AType, ...) \
+  switch (type) {                                      \
+    case mshadow::kFloat32: {                          \
+      typedef float DType;                             \
+      typedef double AType;                            \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kFloat64: {                          \
+      typedef double DType;                            \
+      typedef double AType;                            \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kFloat16: {                          \
+      typedef mshadow::half::half_t DType;             \
+      typedef float AType;                             \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kUint8: {                            \
+      typedef uint8_t DType;                           \
+      typedef uint32_t AType;                          \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kInt8: {                             \
+      typedef int8_t DType;                            \
+      typedef int32_t AType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kInt32: {                            \
+      typedef int32_t DType;                           \
+      typedef int64_t AType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kInt64: {                            \
+      typedef int64_t DType;                           \
+      typedef int64_t AType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    case mshadow::kBool: {                             \
+      typedef bool DType;                              \
+      typedef int64_t AType;                           \
+      { __VA_ARGS__ }                                  \
+    } break;                                           \
+    default:                                           \
+      LOG(FATAL) << "Unknown type enum " << type;      \
   }
 
-#define MXNET_INT_TYPE_SWITCH(type, DType, ...)\
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not float32";          \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not float64";          \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not float16";          \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    {                                                      \
-      typedef uint8_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    {                                                      \
-      typedef int8_t DType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      typedef int32_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      typedef int64_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kBool:                                     \
-    {                                                      \
-      typedef bool DType;                                  \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_INT_TYPE_SWITCH(type, DType, ...)    \
+  switch (type) {                                  \
+    case mshadow::kFloat32: {                      \
+      LOG(FATAL) << "This operation only support " \
+                    "integer types, not float32";  \
+    } break;                                       \
+    case mshadow::kFloat64: {                      \
+      LOG(FATAL) << "This operation only support " \
+                    "integer types, not float64";  \
+    } break;                                       \
+    case mshadow::kFloat16: {                      \
+      LOG(FATAL) << "This operation only support " \
+                    "integer types, not float16";  \
+    } break;                                       \
+    case mshadow::kUint8: {                        \
+      typedef uint8_t DType;                       \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    case mshadow::kInt8: {                         \
+      typedef int8_t DType;                        \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    case mshadow::kInt32: {                        \
+      typedef int32_t DType;                       \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    case mshadow::kInt64: {                        \
+      typedef int64_t DType;                       \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    case mshadow::kBool: {                         \
+      typedef bool DType;                          \
+      { __VA_ARGS__ }                              \
+    } break;                                       \
+    default:                                       \
+      LOG(FATAL) << "Unknown type enum " << type;  \
   }
 
-#define MXNET_INT32_INT64_TYPE_SWITCH(type, DType, ...)\
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not float32";          \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not float64";          \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not float16";          \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not uint8";            \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt8:                                     \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not int8";             \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt32:                                    \
-    {                                                      \
-      typedef int32_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kInt64:                                    \
-    {                                                      \
-      typedef int64_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kBool:                                     \
-    {                                                      \
-      LOG(FATAL) << "This operation only support "         \
-                    "integer types, not bool";             \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Unknown type enum " << type;            \
+#define MXNET_INT32_INT64_TYPE_SWITCH(type, DType, ...) \
+  switch (type) {                                       \
+    case mshadow::kFloat32: {                           \
+      LOG(FATAL) << "This operation only support "      \
+                    "integer types, not float32";       \
+    } break;                                            \
+    case mshadow::kFloat64: {                           \
+      LOG(FATAL) << "This operation only support "      \
+                    "integer types, not float64";       \
+    } break;                                            \
+    case mshadow::kFloat16: {                           \
+      LOG(FATAL) << "This operation only support "      \
+                    "integer types, not float16";       \
+    } break;                                            \
+    case mshadow::kUint8: {                             \
+      LOG(FATAL) << "This operation only support "      \
+                    "integer types, not uint8";         \
+    } break;                                            \
+    case mshadow::kInt8: {                              \
+      LOG(FATAL) << "This operation only support "      \
+                    "integer types, not int8";          \
+    } break;                                            \
+    case mshadow::kInt32: {                             \
+      typedef int32_t DType;                            \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kInt64: {                             \
+      typedef int64_t DType;                            \
+      { __VA_ARGS__ }                                   \
+    } break;                                            \
+    case mshadow::kBool: {                              \
+      LOG(FATAL) << "This operation only support "      \
+                    "integer types, not bool";          \
+    } break;                                            \
+    default:                                            \
+      LOG(FATAL) << "Unknown type enum " << type;       \
   }
 
-#define MXNET_LOAD_TYPE_SWITCH(type, DType, ...)           \
-  switch (type) {                                          \
-  case mshadow::kFloat32:                                  \
-    {                                                      \
-      typedef float DType;                                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat64:                                  \
-    {                                                      \
-      typedef double DType;                                \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kFloat16:                                  \
-    {                                                      \
-      typedef mshadow::half::half_t DType;                 \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  case mshadow::kUint8:                                    \
-    {                                                      \
-      typedef uint8_t DType;                               \
-      {__VA_ARGS__}                                        \
-    }                                                      \
-    break;                                                 \
-  default:                                                 \
-    LOG(FATAL) << "Invalid loading enum type " << type;    \
+#define MXNET_LOAD_TYPE_SWITCH(type, DType, ...)          \
+  switch (type) {                                         \
+    case mshadow::kFloat32: {                             \
+      typedef float DType;                                \
+      { __VA_ARGS__ }                                     \
+    } break;                                              \
+    case mshadow::kFloat64: {                             \
+      typedef double DType;                               \
+      { __VA_ARGS__ }                                     \
+    } break;                                              \
+    case mshadow::kFloat16: {                             \
+      typedef mshadow::half::half_t DType;                \
+      { __VA_ARGS__ }                                     \
+    } break;                                              \
+    case mshadow::kUint8: {                               \
+      typedef uint8_t DType;                              \
+      { __VA_ARGS__ }                                     \
+    } break;                                              \
+    default:                                              \
+      LOG(FATAL) << "Invalid loading enum type " << type; \
   }
 
 /*!
@@ -609,46 +489,43 @@ struct AccType<mshadow::half::half_t> {
  * \tparam OType output type
  * \tparam VType value type
  */
-#define KERNEL_ASSIGN(out, req, val)  \
-  {                                   \
-    switch (req) {                    \
-      case kNullOp:                   \
-        break;                        \
-      case kWriteTo:                  \
-      case kWriteInplace:             \
-        (out) = (val);                \
-        break;                        \
-      case kAddTo:                    \
-        (out) += (val);               \
-        break;                        \
-      default:                        \
-        break;                        \
-    }                                 \
+#define KERNEL_ASSIGN(out, req, val) \
+  {                                  \
+    switch (req) {                   \
+      case kNullOp:                  \
+        break;                       \
+      case kWriteTo:                 \
+      case kWriteInplace:            \
+        (out) = (val);               \
+        break;                       \
+      case kAddTo:                   \
+        (out) += (val);              \
+        break;                       \
+      default:                       \
+        break;                       \
+    }                                \
   }
 
-
-#define MXNET_ADD_ALL_TYPES \
-  .add_enum("float32", mshadow::kFloat32) \
-  .add_enum("float64", mshadow::kFloat64) \
-  .add_enum("float16", mshadow::kFloat16) \
-  .add_enum("bfloat16", mshadow::kBfloat16) \
-  .add_enum("uint8", mshadow::kUint8) \
-  .add_enum("int8", mshadow::kInt8) \
-  .add_enum("int32", mshadow::kInt32) \
-  .add_enum("int64", mshadow::kInt64)
-
-
-#define MXNET_ADD_ALL_TYPES_WITH_BOOL \
-  .add_enum("float32", mshadow::kFloat32) \
-  .add_enum("float64", mshadow::kFloat64) \
-  .add_enum("float16", mshadow::kFloat16) \
-  .add_enum("bfloat16", mshadow::kBfloat16) \
-  .add_enum("uint8", mshadow::kUint8) \
-  .add_enum("int8", mshadow::kInt8) \
-  .add_enum("int32", mshadow::kInt32) \
-  .add_enum("int64", mshadow::kInt64) \
-  .add_enum("bool", mshadow::kBool)
-
+#define MXNET_ADD_ALL_TYPES                     \
+  .add_enum("float32", mshadow::kFloat32)       \
+      .add_enum("float64", mshadow::kFloat64)   \
+      .add_enum("float16", mshadow::kFloat16)   \
+      .add_enum("bfloat16", mshadow::kBfloat16) \
+      .add_enum("uint8", mshadow::kUint8)       \
+      .add_enum("int8", mshadow::kInt8)         \
+      .add_enum("int32", mshadow::kInt32)       \
+      .add_enum("int64", mshadow::kInt64)
+
+#define MXNET_ADD_ALL_TYPES_WITH_BOOL           \
+  .add_enum("float32", mshadow::kFloat32)       \
+      .add_enum("float64", mshadow::kFloat64)   \
+      .add_enum("float16", mshadow::kFloat16)   \
+      .add_enum("bfloat16", mshadow::kBfloat16) \
+      .add_enum("uint8", mshadow::kUint8)       \
+      .add_enum("int8", mshadow::kInt8)         \
+      .add_enum("int32", mshadow::kInt32)       \
+      .add_enum("int64", mshadow::kInt64)       \
+      .add_enum("bool", mshadow::kBool)
 
 #define MXNET_ADD_ALL_TYPES_EXT \
   .add_enum("float32", mshadow::kFloat32) \
@@ -682,64 +559,61 @@ struct AccType<mshadow::half::half_t> {
 
 
 /* \brief Compute flattened index given coordinates and shape. */
-template<int ndim>
+template <int ndim>
 MSHADOW_XINLINE index_t ravel(const Shape<ndim>& coord, const Shape<ndim>& shape) {
   index_t ret = 0;
-  #pragma unroll
+#pragma unroll
   for (int i = 0; i < ndim; ++i) {
     ret = ret * shape[i] + (shape[i] > coord[i]) * coord[i];
   }
   return ret;
 }
 
-
 /* Compute coordinates from flattened index given shape */
-template<int ndim>
+template <int ndim>
 MSHADOW_XINLINE Shape<ndim> unravel(const index_t idx, const Shape<ndim>& shape) {
   Shape<ndim> ret;
-  #pragma unroll
-  for (index_t i = ndim-1, j = idx; i >=0; --i) {
+#pragma unroll
+  for (index_t i = ndim - 1, j = idx; i >= 0; --i) {
     auto tmp = j / shape[i];
-    ret[i] = j - tmp*shape[i];
-    j = tmp;
+    ret[i]   = j - tmp * shape[i];
+    j        = tmp;
   }
   return ret;
 }
 
-
 /* Compute dot product of two vector */
-template<int ndim>
+template <int ndim>
 MSHADOW_XINLINE index_t dot(const Shape<ndim>& coord, const Shape<ndim>& stride) {
   index_t ret = 0;
-  #pragma unroll
+#pragma unroll
   for (int i = 0; i < ndim; ++i) {
     ret += coord[i] * stride[i];
   }
   return ret;
 }
 
-
 /* Combining unravel and dot */
-template<int ndim>
-MSHADOW_XINLINE index_t unravel_dot(const index_t idx, const Shape<ndim>& shape,
-  const Shape<ndim>& stride) {
+template <int ndim>
+MSHADOW_XINLINE index_t unravel_dot(const index_t idx,
+                                    const Shape<ndim>& shape,
+                                    const Shape<ndim>& stride) {
   index_t ret = 0;
-  #pragma unroll
-  for (index_t i = ndim-1, j = idx; i >=0; --i) {
+#pragma unroll
+  for (index_t i = ndim - 1, j = idx; i >= 0; --i) {
     auto tmp = j / shape[i];
-    ret += (j - tmp*shape[i])*stride[i];
+    ret += (j - tmp * shape[i]) * stride[i];
     j = tmp;
   }
   return ret;
 }
 
-
 /* Calculate stride of each dim from shape */
-template<int ndim>
+template <int ndim>
 MSHADOW_XINLINE Shape<ndim> calc_stride(const Shape<ndim>& shape) {
   Shape<ndim> stride;
   index_t cumprod = 1;
-  #pragma unroll
+#pragma unroll
   for (int i = ndim - 1; i >= 0; --i) {
     stride[i] = (shape[i] > 1) ? cumprod : 0;
     cumprod *= shape[i];
@@ -748,45 +622,50 @@ MSHADOW_XINLINE Shape<ndim> calc_stride(const Shape<ndim>& shape) {
 }
 
 /* Increment coordinates */
-template<int ndim>
+template <int ndim>
 MSHADOW_XINLINE bool inc(Shape<ndim>* coord, const Shape<ndim>& shape) {
-  ++(*coord)[ndim-1];
-  #pragma unroll
+  ++(*coord)[ndim - 1];
+#pragma unroll
   for (int i = ndim - 1; i > 0 && (*coord)[i] >= shape[i]; --i) {
     (*coord)[i] -= shape[i];
-    ++(*coord)[i-1];
+    ++(*coord)[i - 1];
   }
   return (*coord)[0] < shape[0];
 }
 
 /* Increment coordinates and modify index */
-template<int ndim>
-MSHADOW_XINLINE void inc(Shape<ndim>* coord, const Shape<ndim>& shape,
-                         index_t* idx, const Shape<ndim>& stride) {
-  ++(*coord)[ndim-1];
-  *idx += stride[ndim-1];
-  #pragma unroll
+template <int ndim>
+MSHADOW_XINLINE void inc(Shape<ndim>* coord,
+                         const Shape<ndim>& shape,
+                         index_t* idx,
+                         const Shape<ndim>& stride) {
+  ++(*coord)[ndim - 1];
+  *idx += stride[ndim - 1];
+#pragma unroll
   for (int i = ndim - 1; i > 0 && (*coord)[i] >= shape[i]; --i) {
     (*coord)[i] -= shape[i];
-    ++(*coord)[i-1];
-    *idx = *idx + stride[i-1] - shape[i] * stride[i];
+    ++(*coord)[i - 1];
+    *idx = *idx + stride[i - 1] - shape[i] * stride[i];
   }
 }
 
 /* Increment coordinates and modify index */
-template<int ndim>
-MSHADOW_XINLINE void inc(Shape<ndim>* coord, const Shape<ndim>& shape,
-                         index_t* idx1, const Shape<ndim>& stride1,
-                         index_t* idx2, const Shape<ndim>& stride2) {
-  ++(*coord)[ndim-1];
-  *idx1 += stride1[ndim-1];
-  *idx2 += stride2[ndim-1];
-  #pragma unroll
+template <int ndim>
+MSHADOW_XINLINE void inc(Shape<ndim>* coord,
+                         const Shape<ndim>& shape,
+                         index_t* idx1,
+                         const Shape<ndim>& stride1,
+                         index_t* idx2,
+                         const Shape<ndim>& stride2) {
+  ++(*coord)[ndim - 1];
+  *idx1 += stride1[ndim - 1];
+  *idx2 += stride2[ndim - 1];
+#pragma unroll
   for (int i = ndim - 1; i > 0 && (*coord)[i] >= shape[i]; --i) {
     (*coord)[i] -= shape[i];
-    ++(*coord)[i-1];
-    *idx1 = *idx1 + stride1[i-1] - shape[i] * stride1[i];
-    *idx2 = *idx2 + stride2[i-1] - shape[i] * stride2[i];
+    ++(*coord)[i - 1];
+    *idx1 = *idx1 + stride1[i - 1] - shape[i] * stride1[i];
+    *idx2 = *idx2 + stride2[i - 1] - shape[i] * stride2[i];
   }
 }
 
@@ -796,7 +675,7 @@ MSHADOW_XINLINE void inc(Shape<ndim>* coord, const Shape<ndim>& shape,
  * \param from Source blob
  */
 template <typename xpu>
-MSHADOW_CINLINE void copy(mshadow::Stream<xpu> *s, const TBlob& to, const TBlob& from) {
+MSHADOW_CINLINE void copy(mshadow::Stream<xpu>* s, const TBlob& to, const TBlob& from) {
   CHECK_EQ(from.Size(), to.Size());
   CHECK_EQ(from.dev_mask(), to.dev_mask());
   MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(to.type_flag_, DType, {
@@ -811,32 +690,32 @@ MSHADOW_CINLINE void copy(mshadow::Stream<xpu> *s, const TBlob& to, const TBlob&
 }
 
 /*! \brief Binary op backward gradient OP wrapper */
-template<typename GRAD_OP>
+template <typename GRAD_OP>
 struct backward_grad {
   /* \brief Backward calc with grad
    * \param a - output grad
    * \param args... - data to grad calculation op (what this is -- input, output, etc. -- varies)
    * \return input grad
    */
-  template<typename DType, typename ...Args>
+  template <typename DType, typename... Args>
   MSHADOW_XINLINE static DType Map(DType a, Args... args) {
     return DType(a * GRAD_OP::Map(args...));
   }
 };
 
-template<typename OP, int req>
+template <typename OP, int req>
 struct mixed_type_unary_op {
   typedef OP Operation;
 
   /*! \brief input is one tensor */
-  template<typename OType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, OType *out, const IType *in) {
+  template <typename OType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i, OType* out, const IType* in) {
     KERNEL_ASSIGN(out[i], req, OP::Map(OType(in[i])));
   }
 };
 
 /*! \brief Binary op backward gradient OP wrapper (tuned) */
-template<typename GRAD_OP>
+template <typename GRAD_OP>
 struct backward_grad_tuned : public backward_grad<GRAD_OP>, public tunable {
   using backward_grad<GRAD_OP>::Map;
 };
@@ -844,168 +723,176 @@ struct backward_grad_tuned : public backward_grad<GRAD_OP>, public tunable {
 /*! \brief Select assignment operation based upon the req value
  * Also useful for mapping mshadow Compute (F<OP>) to Kernel<OP>::Launch
  */
-template<typename OP, int req>
+template <typename OP, int req>
 struct op_with_req {
   typedef OP Operation;
 
   /*! \brief input is one tensor */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *in) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* in) {
     KERNEL_ASSIGN(out[i], req, OP::Map(in[i]));
   }
 
   /*! \brief inputs are two tensors */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *lhs, const DType *rhs) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* lhs, const DType* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief input is tensor and a scalar value */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *in, const DType value) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* in, const DType value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(in[i], value));
   }
 
   /*! \brief input is tensor and two scalar value */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *in,
-                                  const DType value_1, const DType value_2) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* in,
+                                  const DType value_1,
+                                  const DType value_2) {
     KERNEL_ASSIGN(out[i], req, OP::Map(in[i], value_1, value_2));
   }
 
   /*! \brief No inputs (ie fill to constant value) */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out) {
     KERNEL_ASSIGN(out[i], req, OP::Map());
   }
 
   /*! \brief input is single scalar value */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType value) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(value));
   }
 
   /*! \brief inputs are two tensors and a scalar value */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out,
-                                  const DType *input_1, const DType *input_2, const DType value) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* input_1,
+                                  const DType* input_2,
+                                  const DType value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(input_1[i], input_2[i], value));
   }
 
   /*! \brief inputs are three tensors (ie backward grad with binary grad function) */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out,
-                                  const DType *input_1,
-                                  const DType *input_2,
-                                  const DType *input_3) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* input_1,
+                                  const DType* input_2,
+                                  const DType* input_3) {
     KERNEL_ASSIGN(out[i], req, OP::Map(input_1[i], input_2[i], input_3[i]));
   }
 
   /*! \brief input is a tensor and the output is a boolean tensor */
-  template<typename DType,
-           typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, bool *out, const DType *in) {
+  template <typename DType,
+            typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, bool* out, const DType* in) {
     KERNEL_ASSIGN(out[i], req, OP::Map(in[i]));
   }
 
   /*! \brief inputs are two tensors with a boolean output tensor */
-  template<typename DType,
-           typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, bool *out, const DType *lhs, const DType *rhs) {
+  template <typename DType,
+            typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, bool* out, const DType* lhs, const DType* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief input is tensor and two scalar value with a boolean output tensor */
-  template<typename DType,
-           typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, bool *out, const DType *in, const DType value) {
+  template <typename DType,
+            typename std::enable_if<!std::is_same<DType, bool>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, bool* out, const DType* in, const DType value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(in[i], value));
   }
 
   /*! \brief input is two tensors with different type and with a boolean output tensor */
-  template<typename LType, typename RType,
-           typename std::enable_if<!std::is_same<LType, RType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, bool *out, const LType *lhs, const RType *rhs) {
+  template <typename LType,
+            typename RType,
+            typename std::enable_if<!std::is_same<LType, RType>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, bool* out, const LType* lhs, const RType* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief inputs are two tensors with a half_t output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  mshadow::half::half_t *out,
-                                  const DType *lhs,
-                                  const mshadow::half::half_t *rhs) {
+                                  mshadow::half::half_t* out,
+                                  const DType* lhs,
+                                  const mshadow::half::half_t* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief inputs are two tensors with a float output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, float *out, const DType *lhs, const float *rhs) {
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, float* out, const DType* lhs, const float* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief inputs are two tensors with a double output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, double *out, const DType *lhs, const double *rhs) {
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, double* out, const DType* lhs, const double* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief inputs are two tensors with a half_t output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  mshadow::half::half_t *out,
-                                  const DType *lhs,
+                                  mshadow::half::half_t* out,
+                                  const DType* lhs,
                                   const mshadow::half::half_t value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], value));
   }
 
   /*! \brief inputs are two tensors with a float output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, float *out, const DType *lhs, const float value) {
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, float* out, const DType* lhs, const float value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], value));
   }
 
   /*! \brief inputs are two tensors with a double output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
-                                   std::is_same<DType, float>::value ||
-                                   std::is_integral<DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, double *out, const DType *lhs, const double value) {
+  template <typename DType,
+            typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value ||
+                                        std::is_same<DType, float>::value ||
+                                        std::is_integral<DType>::value,
+                                    int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, double* out, const DType* lhs, const double value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], value));
   }
 
   /*! \brief inputs are two tensors with a float output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, float *out, const DType *lhs, const DType *rhs) {
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, float* out, const DType* lhs, const DType* rhs) {
     KERNEL_ASSIGN(out[i], req, OP::Map(lhs[i], rhs[i]));
   }
 
   /*! \brief input is a tensor and a scalar value with a float output tensor */
-  template<typename DType,
-           typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t i, float *out, const DType *in, const DType value) {
+  template <typename DType, typename std::enable_if<std::is_integral<DType>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t i, float* out, const DType* in, const DType value) {
     KERNEL_ASSIGN(out[i], req, OP::Map(in[i], value));
   }
 };
 
-template<typename OP, typename xpu>
+template <typename OP, typename xpu>
 struct Kernel;
 
 /*!
  * \brief CPU Kernel launcher
  * \tparam OP Operator to launch
  */
-template<typename OP>
+template <typename OP>
 struct Kernel<OP, cpu> {
   /*!
    * \brief Launch a generic CPU kernel.
@@ -1015,8 +902,8 @@ struct Kernel<OP, cpu> {
    * \param N Number of iterations
    * \param args Varargs to eventually pass to the OP::Map() function
    */
-  template<typename ...Args>
-  inline static bool Launch(mshadow::Stream<cpu> *, const size_t N, Args... args) {
+  template <typename... Args>
+  inline static bool Launch(mshadow::Stream<cpu>*, const size_t N, Args... args) {
 #ifdef _OPENMP
     const int omp_threads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
     if (omp_threads < 2) {
@@ -1024,7 +911,7 @@ struct Kernel<OP, cpu> {
         OP::Map(i, args...);
       }
     } else {
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < static_cast<index_t>(N); ++i) {
         OP::Map(i, args...);
       }
@@ -1046,8 +933,8 @@ struct Kernel<OP, cpu> {
    * \param N Number of iterations
    * \param args Varargs to eventually pass to the OP::Map() function
    */
-  template<typename ...Args>
-  inline static bool LaunchDynamic(mshadow::Stream<cpu> *, const int64_t N, Args... args) {
+  template <typename... Args>
+  inline static bool LaunchDynamic(mshadow::Stream<cpu>*, const int64_t N, Args... args) {
 #ifdef _OPENMP
     const int omp_threads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount(false);
     if (omp_threads < 2) {
@@ -1055,7 +942,7 @@ struct Kernel<OP, cpu> {
         OP::Map(i, args...);
       }
     } else {
-      #pragma omp parallel for num_threads(omp_threads) schedule(dynamic)
+#pragma omp parallel for num_threads(omp_threads) schedule(dynamic)
       for (int64_t i = 0; i < N; ++i) {
         OP::Map(i, args...);
       }
@@ -1079,17 +966,17 @@ struct Kernel<OP, cpu> {
    * \param dest Destination pointer (used to infer DType)
    * \param args Varargs to eventually pass to the OP::Map() function
    */
-  template<typename PRIMITIVE_OP, typename DType, typename ...Args>
-  static void LaunchTuned(mshadow::Stream<cpu> *, const size_t N, Args... args) {
+  template <typename PRIMITIVE_OP, typename DType, typename... Args>
+  static void LaunchTuned(mshadow::Stream<cpu>*, const size_t N, Args... args) {
 #ifdef _OPENMP
     const int omp_threads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
-    if (omp_threads < 2 || !tuned_op<PRIMITIVE_OP, DType>::UseOMP(
-      N, static_cast<size_t>(omp_threads))) {
+    if (omp_threads < 2 ||
+        !tuned_op<PRIMITIVE_OP, DType>::UseOMP(N, static_cast<size_t>(omp_threads))) {
       for (size_t i = 0; i < N; ++i) {
         OP::Map(i, args...);
       }
     } else {
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < static_cast<index_t>(N); ++i) {
         OP::Map(i, args...);
       }
@@ -1108,15 +995,15 @@ struct Kernel<OP, cpu> {
    * \param N Number of iterations
    * \param args Varargs to eventually pass to the UseOMP() and OP::Map() functions
    */
-  template<typename ...Args>
-  inline static void LaunchEx(mshadow::Stream<cpu> *s, const size_t N, Args... args) {
+  template <typename... Args>
+  inline static void LaunchEx(mshadow::Stream<cpu>* s, const size_t N, Args... args) {
 #ifdef _OPENMP
     const int omp_threads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
     if (omp_threads < 2) {
       OP::Map(0, N, args...);
     } else {
       const auto length = (N + omp_threads - 1) / omp_threads;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < static_cast<index_t>(N); i += length) {
         OP::Map(i, i + length > N ? N - i : length, args...);
       }
@@ -1136,10 +1023,9 @@ struct Kernel<OP, cpu> {
    * \param args Varargs to eventually pass to the OP::Map() function
    * \return Always true
    */
-  template<typename DType, typename T = OP, typename ...Args>
-  static MSHADOW_CINLINE
-  typename std::enable_if<std::is_base_of<tunable, T>::value, bool>::type
-  Launch(mshadow::Stream<cpu> *s, const size_t N, DType *dest, Args... args) {
+  template <typename DType, typename T = OP, typename... Args>
+  static MSHADOW_CINLINE typename std::enable_if<std::is_base_of<tunable, T>::value, bool>::type
+  Launch(mshadow::Stream<cpu>* s, const size_t N, DType* dest, Args... args) {
     LaunchTuned<T, DType>(s, N, dest, args...);
     return true;
   }
@@ -1154,54 +1040,52 @@ struct Kernel<OP, cpu> {
    * \param args Varargs to eventually pass to the OP::Map() function
    * \return Always true
    */
-  template<typename DType, typename T = OP, typename ...Args>
+  template <typename DType, typename T = OP, typename... Args>
   static MSHADOW_CINLINE
-  typename std::enable_if<std::is_base_of<tunable, typename T::Operation>::value, bool>::type
-  Launch(mshadow::Stream<cpu> *s, const size_t N, DType *dest, Args... args) {
+      typename std::enable_if<std::is_base_of<tunable, typename T::Operation>::value, bool>::type
+      Launch(mshadow::Stream<cpu>* s, const size_t N, DType* dest, Args... args) {
     LaunchTuned<typename T::Operation, DType>(s, N, dest, args...);
     return true;
   }
 };
 
-
-
 #ifdef __CUDACC__
-template<typename OP, typename ...Args>
+template <typename OP, typename... Args>
 __global__ void mxnet_generic_kernel(int N, Args... args) {
   for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < N; i += blockDim.x * gridDim.x) {
     OP::Map(i, args...);
   }
 }
 
-template<typename OP, typename ...Args>
+template <typename OP, typename... Args>
 __global__ void mxnet_generic_kernel_ex(int N, Args... args) {
   for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < N; i += blockDim.x * gridDim.x) {
     OP::Map(i, 1, args...);
   }
 }
 
-template<typename OP>
+template <typename OP>
 struct Kernel<OP, gpu> {
   /*! \brief Launch GPU kernel */
-  template<typename ...Args>
-  inline static void Launch(mshadow::Stream<gpu> *s, int N, Args... args) {
-    if (0 == N) return;
+  template <typename... Args>
+  inline static void Launch(mshadow::Stream<gpu>* s, int N, Args... args) {
+    if (0 == N)
+      return;
     using namespace mshadow::cuda;
     int ngrid = std::min(kMaxGridNum, (N + kBaseThreadNum - 1) / kBaseThreadNum);
     mxnet_generic_kernel<OP, Args...>
-      <<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
-        N, args...);
+        <<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(N, args...);
     MSHADOW_CUDA_POST_KERNEL_CHECK(mxnet_generic_kernel);
   }
 
-  template<typename ...Args>
-  inline static void LaunchEx(mshadow::Stream<gpu> *s, const int N, Args... args) {
-    if (0 == N) return;
+  template <typename... Args>
+  inline static void LaunchEx(mshadow::Stream<gpu>* s, const int N, Args... args) {
+    if (0 == N)
+      return;
     using namespace mshadow::cuda;
     int ngrid = std::min(kMaxGridNum, (N + kBaseThreadNum - 1) / kBaseThreadNum);
     mxnet_generic_kernel_ex<OP, Args...>
-      <<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
-        N, args...);
+        <<<ngrid, kBaseThreadNum, 0, mshadow::Stream<gpu>::GetStream(s)>>>(N, args...);
     MSHADOW_CUDA_POST_KERNEL_CHECK(mxnet_generic_kernel_ex);
   }
 };
@@ -1211,11 +1095,11 @@ struct Kernel<OP, gpu> {
  * \brief Set to immediate scalar value kernel
  * \tparam val Scalar immediate
  */
-template<int val>
+template <int val>
 struct set_to_int : public tunable {
   // mxnet_op version (when used directly with Kernel<>::Launch()) */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out) {
     out[i] = DType(val);
   }
   // mshadow_op version (when used with op_with_req<>)
@@ -1234,11 +1118,11 @@ using set_one  = set_to_int<1>;
  * \brief Set to immediate scalar value kernel
  * \tparam val Scalar immediate
  */
-template<bool val>
+template <bool val>
 struct set_to_bool : public tunable {
   // mxnet_op version (when used directly with Kernel<>::Launch()) */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out) {
     out[i] = DType(val);
   }
   // mshadow_op version (when used with op_with_req<>)
@@ -1250,7 +1134,7 @@ struct set_to_bool : public tunable {
 /*!
  * \brief Special-case kernel shortcut for setting to true and false
  */
-using set_true = set_to_bool<true>;
+using set_true  = set_to_bool<true>;
 using set_false = set_to_bool<false>;
 }  // namespace mxnet_op
 
diff --git a/src/operator/nn/activation-inl.h b/src/operator/nn/activation-inl.h
index 7be6cba2600e..e722d8adb1e0 100644
--- a/src/operator/nn/activation-inl.h
+++ b/src/operator/nn/activation-inl.h
@@ -22,7 +22,7 @@
  * \file activation-inl.h
  * \brief Activation operator
  * \author Bing Xu, Da Zheng
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_ACTIVATION_INL_H_
 #define MXNET_OPERATOR_NN_ACTIVATION_INL_H_
@@ -44,28 +44,28 @@ namespace op {
 // Declare enumeration of input order to make code more intuitive.
 // // These enums are only visible within this header
 namespace activation {
-enum ActivationOpInputs {kData};
-enum ActivationOpOutputs {kOut};
-enum ActivationOpResource {kTempSpace};
-enum ActivationOpType {kReLU, kSigmoid, kLogSigmoid, kMish, kTanh, kSoftReLU, kSoftSign};
+enum ActivationOpInputs { kData };
+enum ActivationOpOutputs { kOut };
+enum ActivationOpResource { kTempSpace };
+enum ActivationOpType { kReLU, kSigmoid, kLogSigmoid, kMish, kTanh, kSoftReLU, kSoftSign };
 
 // Get the number of inputs to the gradient depending on the activation type
 int GradNumInputs(int act_type);
-}  // activation
+}  // namespace activation
 
 struct ActivationParam : public dmlc::Parameter<ActivationParam> {
   // use int for enumeration
   int act_type;
   DMLC_DECLARE_PARAMETER(ActivationParam) {
     DMLC_DECLARE_FIELD(act_type)
-    .add_enum("relu", activation::kReLU)
-    .add_enum("sigmoid", activation::kSigmoid)
-    .add_enum("log_sigmoid", activation::kLogSigmoid)
-    .add_enum("mish", activation::kMish)
-    .add_enum("tanh", activation::kTanh)
-    .add_enum("softrelu", activation::kSoftReLU)
-    .add_enum("softsign", activation::kSoftSign)
-    .describe("Activation function to be applied.");
+        .add_enum("relu", activation::kReLU)
+        .add_enum("sigmoid", activation::kSigmoid)
+        .add_enum("log_sigmoid", activation::kLogSigmoid)
+        .add_enum("mish", activation::kMish)
+        .add_enum("tanh", activation::kTanh)
+        .add_enum("softrelu", activation::kSoftReLU)
+        .add_enum("softsign", activation::kSoftSign)
+        .describe("Activation function to be applied.");
   }
 
   bool operator==(const ActivationParam& other) const {
@@ -104,7 +104,7 @@ struct ActivationParam : public dmlc::Parameter<ActivationParam> {
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::ActivationParam> {
   size_t operator()(const mxnet::op::ActivationParam& val) {
     return val.act_type;
@@ -115,45 +115,54 @@ struct hash<mxnet::op::ActivationParam> {
 namespace mxnet {
 namespace op {
 
-template<typename xpu, typename ForwardOp, typename BackwardOp>
-void ActivationForward(const OpContext &ctx, const TBlob &in_data,
-                       const OpReqType &req, const TBlob &out_data) {
+template <typename xpu, typename ForwardOp, typename BackwardOp>
+void ActivationForward(const OpContext& ctx,
+                       const TBlob& in_data,
+                       const OpReqType& req,
+                       const TBlob& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s  = ctx.get_stream<xpu>();
   const size_t sz = in_data.shape_.Size();
   if (sz) {
     MSHADOW_REAL_TYPE_SWITCH(in_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<ForwardOp, Req>, xpu>::Launch(
-          s, sz, out_data.dptr<DType>(), in_data.dptr<DType>());
+            s, sz, out_data.dptr<DType>(), in_data.dptr<DType>());
       });
     });
   }
 }
 
-template<typename xpu, typename ForwardOp, typename BackwardOp>
-void ActivationBackward(const OpContext &ctx, const TBlob &out_grad,
-                        const TBlob &out_data, const OpReqType &req,
-                        const TBlob &in_grad) {
+template <typename xpu, typename ForwardOp, typename BackwardOp>
+void ActivationBackward(const OpContext& ctx,
+                        const TBlob& out_grad,
+                        const TBlob& out_data,
+                        const OpReqType& req,
+                        const TBlob& in_grad) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s  = ctx.get_stream<xpu>();
   const size_t sz = out_data.shape_.Size();
   if (sz) {
     MSHADOW_REAL_TYPE_SWITCH(out_grad.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
-        mxnet_op::Kernel<mxnet_op::op_with_req<
-          mxnet_op::backward_grad_tuned<BackwardOp>, Req>, xpu>::Launch(
-            s, sz, in_grad.dptr<DType>(), out_grad.dptr<DType>(), out_data.dptr<DType>());
+        mxnet_op::Kernel<mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<BackwardOp>, Req>,
+                         xpu>::Launch(s,
+                                      sz,
+                                      in_grad.dptr<DType>(),
+                                      out_grad.dptr<DType>(),
+                                      out_data.dptr<DType>());
       });
     });
   }
 }
 
-template<typename xpu>
-void ActivationComputeImpl(const nnvm::NodeAttrs& attrs, const OpContext &ctx,
-                           const std::vector<TBlob>& inputs, const std::vector<OpReqType>& req,
+template <typename xpu>
+void ActivationComputeImpl(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
   switch (param.act_type) {
@@ -190,10 +199,12 @@ void ActivationComputeImpl(const nnvm::NodeAttrs& attrs, const OpContext &ctx,
   }
 }
 
-template<typename xpu>
-void ActivationGradComputeImpl(const nnvm::NodeAttrs& attrs, const OpContext &ctx,
-                           const std::vector<TBlob>& inputs, const std::vector<OpReqType>& req,
-                           const std::vector<TBlob>& outputs) {
+template <typename xpu>
+void ActivationGradComputeImpl(const nnvm::NodeAttrs& attrs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
   switch (param.act_type) {
     case activation::kReLU:
@@ -234,7 +245,7 @@ void ActivationGradComputeImpl(const nnvm::NodeAttrs& attrs, const OpContext &ct
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void ActivationCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -245,14 +256,14 @@ void ActivationCompute(const nnvm::NodeAttrs& attrs,
   ActivationComputeImpl<xpu>(attrs, ctx, inputs, req, outputs);
 }
 
-template<typename xpu>
+template <typename xpu>
 void ActivationGradCompute(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
-  const int act_type = param.act_type;
+  const int act_type           = param.act_type;
   CHECK_EQ(inputs.size(), activation::GradNumInputs(act_type));
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
diff --git a/src/operator/nn/activation.cc b/src/operator/nn/activation.cc
index a81d74e67ccc..ad559b09e240 100644
--- a/src/operator/nn/activation.cc
+++ b/src/operator/nn/activation.cc
@@ -17,13 +17,12 @@
  * under the License.
  */
 
-
 /*!
  * Copyright (c) 2015 by Contributors
  * \file activation.cc
  * \brief activation op
  * \author Bing Xu, Da Zheng
-*/
+ */
 #include "./activation-inl.h"
 #include "../mshadow_op.h"
 #include "../tensor/elemwise_unary_op.h"
@@ -40,25 +39,25 @@ namespace op {
 namespace activation {
 
 int GradNumInputs(int act_type) {
-    // check activation.cu \sa ActivationGradCompute
-    if (dmlc::GetEnv("MXNET_MEMORY_OPT", 0)) {
+  // check activation.cu \sa ActivationGradCompute
+  if (dmlc::GetEnv("MXNET_MEMORY_OPT", 0)) {
+    return 2;
+  }
+  switch (act_type) {
+    case kReLU:
       return 2;
-    }
-    switch (act_type) {
-      case kReLU:
-        return 2;
-      case kSoftReLU:
-      case kSoftSign:
-      case kTanh:
-      case kSigmoid:
-      case kLogSigmoid:
-      case kMish:
-        return 3;
-      default:
-        CHECK(false) << "missing activation type";
-    }
-    // unreachable
-    return -1;
+    case kSoftReLU:
+    case kSoftSign:
+    case kTanh:
+    case kSigmoid:
+    case kLogSigmoid:
+    case kMish:
+      return 3;
+    default:
+      CHECK(false) << "missing activation type";
+  }
+  // unreachable
+  return -1;
 }
 
 }  // namespace activation
@@ -67,7 +66,7 @@ DMLC_REGISTER_PARAMETER(ActivationParam);
 
 // This will determine the order of the inputs for backward computation.
 struct ActivationGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     // ograds
@@ -142,31 +141,30 @@ void ActivationGradComputeExCPU(const nnvm::NodeAttrs& attrs,
 inline static bool ActivationStorageType(const nnvm::NodeAttrs& attrs,
                                          const int dev_mask,
                                          DispatchMode* dispatch_mode,
-                                         std::vector<int> *in_attrs,
-                                         std::vector<int> *out_attrs) {
+                                         std::vector<int>* in_attrs,
+                                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
-  return MKLDNNStorageType(attrs, dev_mask, SupportMKLDNNAct(param),
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(
+      attrs, dev_mask, SupportMKLDNNAct(param), dispatch_mode, in_attrs, out_attrs);
 }
 
 inline static bool BackwardActStorageType(const nnvm::NodeAttrs& attrs,
                                           const int dev_mask,
                                           DispatchMode* dispatch_mode,
-                                          std::vector<int> *in_attrs,
-                                          std::vector<int> *out_attrs) {
+                                          std::vector<int>* in_attrs,
+                                          std::vector<int>* out_attrs) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), activation::GradNumInputs(param.act_type));
-  return MKLDNNStorageType(attrs, dev_mask, SupportMKLDNNAct(param),
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(
+      attrs, dev_mask, SupportMKLDNNAct(param), dispatch_mode, in_attrs, out_attrs);
 }
 #endif  // MXNET_USE_ONEDNN == 1
 
-
 MXNET_OPERATOR_REGISTER_UNARY(Activation)
-.add_alias("_npx_activation")
-.describe(R"code(Applies an activation function element-wise to the input.
+    .add_alias("_npx_activation")
+    .describe(R"code(Applies an activation function element-wise to the input.
 
 The following activation functions are supported:
 
@@ -179,48 +177,50 @@ The following activation functions are supported:
 - `softsign`: :math:`y = \frac{x}{1 + abs(x)}`
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<ActivationParam>)
+    .set_attr_parser(ParamParser<ActivationParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", ActivationStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", ActivationStorageType)
 #endif
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<FCompute>("FCompute<cpu>", ActivationCompute<cpu>)
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", ActivationCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ActivationComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ActivationComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", ActivationGrad{"_backward_Activation"})
-.add_arguments(ActivationParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", ActivationGrad{"_backward_Activation"})
+    .add_arguments(ActivationParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Activation)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const int act_type = dmlc::get<ActivationParam>(attrs.parsed).act_type;
-    return activation::GradNumInputs(act_type);
-})
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const int act_type = dmlc::get<ActivationParam>(attrs.parsed).act_type;
+      return activation::GradNumInputs(act_type);
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", BackwardActStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardActStorageType)
 #endif
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<-1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<-1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.set_attr_parser(ParamParser<ActivationParam>)
+    .set_attr_parser(ParamParser<ActivationParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ActivationGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ActivationGradComputeExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", ActivationGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", ActivationGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/activation.cu b/src/operator/nn/activation.cu
index 1737f1ba412b..228a71b8843a 100644
--- a/src/operator/nn/activation.cu
+++ b/src/operator/nn/activation.cu
@@ -22,7 +22,7 @@
  * \file activation.cu
  * \brief
  * \author Bing Xu
-*/
+ */
 #include "./activation-inl.h"
 #include "../mshadow_op.h"
 #if MXNET_USE_CUDNN == 1
@@ -34,8 +34,8 @@ namespace op {
 
 #if MXNET_USE_CUDNN == 1
 
-template<typename DType>
-static CuDNNActivationOp<DType> &get_cudnn_op(const ActivationParam& param) {
+template <typename DType>
+static CuDNNActivationOp<DType>& get_cudnn_op(const ActivationParam& param) {
 #if DMLC_CXX11_THREAD_LOCAL
   static thread_local CuDNNActivationOp<DType> cudnn_op;
 #else
@@ -45,30 +45,30 @@ static CuDNNActivationOp<DType> &get_cudnn_op(const ActivationParam& param) {
   return cudnn_op;
 }
 
-template<>
+template <>
 void ActivationCompute<gpu>(const nnvm::NodeAttrs& attrs,
-    const OpContext& ctx,
-    const std::vector<TBlob>& inputs,
-    const std::vector<OpReqType>& req,
-    const std::vector<TBlob>& outputs) {
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
-  const int act_type = param.act_type;
+  const int act_type           = param.act_type;
 
   // SoftReLU, SoftSign, Log_Sigmoid and Mish are not supported by CUDNN yet
   if (act_type == activation::kSoftReLU) {
-    ActivationForward<gpu, mshadow_op::softrelu, mshadow_op::softrelu_grad>(ctx,
-      inputs[0], req[0], outputs[0]);
+    ActivationForward<gpu, mshadow_op::softrelu, mshadow_op::softrelu_grad>(
+        ctx, inputs[0], req[0], outputs[0]);
   } else if (act_type == activation::kSoftSign) {
-    ActivationForward<gpu, mshadow_op::softsign, mshadow_op::softsign_grad>(ctx,
-      inputs[0], req[0], outputs[0]);
+    ActivationForward<gpu, mshadow_op::softsign, mshadow_op::softsign_grad>(
+        ctx, inputs[0], req[0], outputs[0]);
   } else if (act_type == activation::kLogSigmoid) {
-    ActivationForward<gpu, mshadow_op::log_sigmoid, mshadow_op::log_sigmoid_grad>(ctx,
-      inputs[0], req[0], outputs[0]);
+    ActivationForward<gpu, mshadow_op::log_sigmoid, mshadow_op::log_sigmoid_grad>(
+        ctx, inputs[0], req[0], outputs[0]);
   } else if (act_type == activation::kMish) {
-    ActivationForward<gpu, mshadow_op::mish, mshadow_op::mish_grad>(ctx,
-      inputs[0], req[0], outputs[0]);
+    ActivationForward<gpu, mshadow_op::mish, mshadow_op::mish_grad>(
+        ctx, inputs[0], req[0], outputs[0]);
   } else {
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
       get_cudnn_op<DType>(param).Forward(ctx, inputs[0], req[0], outputs[0]);
@@ -76,14 +76,14 @@ void ActivationCompute<gpu>(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<>
+template <>
 void ActivationGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<TBlob>& outputs) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
-  const int act_type = param.act_type;
+  const int act_type           = param.act_type;
   CHECK_EQ(inputs.size(), activation::GradNumInputs(act_type));
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
@@ -93,58 +93,57 @@ void ActivationGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
   // SoftReLU, SoftSign, Log_Sigmoid and Mish not supported by CUDNN yet
   if (act_type == activation::kSoftReLU) {
     ActivationBackward<gpu, mshadow_op::softrelu, mshadow_op::softrelu_grad>(
-      ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
+        ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
   } else if (act_type == activation::kLogSigmoid) {
     ActivationBackward<gpu, mshadow_op::log_sigmoid, mshadow_op::log_sigmoid_grad>(
-      ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
+        ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
   } else if (act_type == activation::kMish) {
     ActivationBackward<gpu, mshadow_op::mish, mshadow_op::mish_grad>(
-      ctx, inputs.at(0), inputs.at(2), req[0], outputs[0]);
+        ctx, inputs.at(0), inputs.at(2), req[0], outputs[0]);
   } else if (act_type == activation::kSoftSign) {
     if (do_memory_opt) {
       ActivationBackward<gpu, mshadow_op::softsign, mshadow_op::softsign_grad>(
-        ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
+          ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
     } else {
       ActivationBackward<gpu, mshadow_op::softsign, mshadow_op::softsign_grad>(
-        ctx, inputs.at(0), inputs.at(2), req[0], outputs[0]);
+          ctx, inputs.at(0), inputs.at(2), req[0], outputs[0]);
     }
   } else if (act_type == activation::kReLU) {
     if (do_memory_opt) {
       ActivationBackward<gpu, mshadow_op::relu, mshadow_op::relu_grad>(
-        ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
+          ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
     } else {
       MSHADOW_REAL_TYPE_SWITCH(inputs.at(0).type_flag_, DType, {
         // XXX: for y = relu(x), y is passed as "in_data" to Backward()
-        get_cudnn_op<DType>(param).Backward(ctx, inputs.at(0), inputs.at(1),
-                                            inputs.at(1), req[0], outputs[0]);
+        get_cudnn_op<DType>(param).Backward(
+            ctx, inputs.at(0), inputs.at(1), inputs.at(1), req[0], outputs[0]);
       });
     }
   } else {
     if (do_memory_opt) {
       if (act_type == activation::kTanh) {
         ActivationBackward<gpu, mshadow_op::tanh, mshadow_op::tanh_grad>(
-          ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
+            ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
       } else if (act_type == activation::kSigmoid) {
         ActivationBackward<gpu, mshadow_op::sigmoid, mshadow_op::sigmoid_grad>(
-          ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
+            ctx, inputs.at(0), inputs.at(1), req[0], outputs[0]);
       } else {
         LOG(FATAL) << "unknown activation type";
       }
     } else {
       MSHADOW_REAL_TYPE_SWITCH(inputs.at(0).type_flag_, DType, {
-        get_cudnn_op<DType>(param).Backward(ctx, inputs.at(0), inputs.at(2),
-                                            inputs.at(1), req[0], outputs[0]);
+        get_cudnn_op<DType>(param).Backward(
+            ctx, inputs.at(0), inputs.at(2), inputs.at(1), req[0], outputs[0]);
       });
     }  // if (do_memory_opt)
   }
 }
 #endif
 
-NNVM_REGISTER_OP(Activation)
-.set_attr<FCompute>("FCompute<gpu>", ActivationCompute<gpu>);
+NNVM_REGISTER_OP(Activation).set_attr<FCompute>("FCompute<gpu>", ActivationCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_Activation)
-.set_attr<FCompute>("FCompute<gpu>", ActivationGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ActivationGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/batch_norm.cu b/src/operator/nn/batch_norm.cu
index 894bfcd489f3..1d71bf9b52f0 100644
--- a/src/operator/nn/batch_norm.cu
+++ b/src/operator/nn/batch_norm.cu
@@ -23,13 +23,12 @@
  * \brief CUDA Batch Normalization code
  * \author Chris Olivier, Bing Xu, Da Zheng
  * Adapted from Torch
-*/
+ */
 #include <cuda_runtime_api.h>
 #include <algorithm>
 #include "batch_norm-inl.h"
 #include "../../common/cuda/utils.h"
 
-
 #define WRITE_DATA_FLAG       1
 #define WRITE_GAMMA_FLAG      2
 #define WRITE_BETA_FLAG       4
@@ -83,9 +82,11 @@ static const unsigned WARP_SIZE = 32;
 // The maximum number of threads in a block
 static const unsigned MAX_BLOCK_SIZE = 512U;
 
-template<typename In, typename Out>
+template <typename In, typename Out>
 struct ScalarConvert {
-  static __host__ __device__ __forceinline__ Out to(const In v) { return (Out) v; }
+  static __host__ __device__ __forceinline__ Out to(const In v) {
+    return (Out)v;
+  }
 };
 
 // Number of threads in a block given an input size up to MAX_BLOCK_SIZE
@@ -104,27 +105,24 @@ __device__ __forceinline__ int getMSB(int val) {
   return 31 - __clz(val);
 }
 
-template<typename DType, typename AccReal>
+template <typename DType, typename AccReal>
 struct Float2 {
   AccReal v1, v2;
   __device__ Float2() {}
   __device__ Float2(DType v1, DType v2)
-    : v1(ScalarConvert<DType, AccReal>::to(v1))
-      , v2(ScalarConvert<DType, AccReal>::to(v2)) {}
+      : v1(ScalarConvert<DType, AccReal>::to(v1)), v2(ScalarConvert<DType, AccReal>::to(v2)) {}
   __device__ Float2(DType v)
-    : v1(ScalarConvert<DType, AccReal>::to(v))
-      , v2(ScalarConvert<DType, AccReal>::to(v)) {}
+      : v1(ScalarConvert<DType, AccReal>::to(v)), v2(ScalarConvert<DType, AccReal>::to(v)) {}
   __device__ Float2(int v)
-    : v1(ScalarConvert<int, AccReal>::to(v))
-      , v2(ScalarConvert<int, AccReal>::to(v)) {}
-  __device__ Float2 &operator+=(const Float2 &a) {
+      : v1(ScalarConvert<int, AccReal>::to(v)), v2(ScalarConvert<int, AccReal>::to(v)) {}
+  __device__ Float2& operator+=(const Float2& a) {
     v1 += a.v1;
     v2 += a.v2;
     return *this;
   }
 };
 
-template<typename DType, typename AccReal, typename DeviceTensor>
+template <typename DType, typename AccReal, typename DeviceTensor>
 struct SumOp {
   __device__ SumOp(const DeviceTensor t) : tensor(t) {}
   __device__ __forceinline__ AccReal operator()(int batch, int plane, int n) {
@@ -133,12 +131,9 @@ struct SumOp {
   const DeviceTensor tensor;
 };
 
-template<typename DType, typename AccReal, typename DeviceTensor>
+template <typename DType, typename AccReal, typename DeviceTensor>
 struct VarOp {
-  __device__ VarOp(AccReal m, const DeviceTensor t)
-    : mean(m)
-      , tensor(t) {
-  }
+  __device__ VarOp(AccReal m, const DeviceTensor t) : mean(m), tensor(t) {}
   __device__ __forceinline__ AccReal operator()(int batch, int plane, int n) {
     DType val = tensor.get_ref(batch, plane, n);
     return (val - mean) * (val - mean);
@@ -147,10 +142,10 @@ struct VarOp {
   const DeviceTensor tensor;
 };
 
-template<typename DType, typename AccReal, typename DeviceTensor>
+template <typename DType, typename AccReal, typename DeviceTensor>
 struct GradOp {
   __device__ GradOp(AccReal m, const DeviceTensor i, const DeviceTensor g)
-    : mean(m), input(i), gradOutput(g) {}
+      : mean(m), input(i), gradOutput(g) {}
   __device__ __forceinline__ Float2<DType, AccReal> operator()(int batch, int plane, int n) {
     const DType g = gradOutput.get_ref(batch, plane, n);
     const DType c = ScalarConvert<AccReal, DType>::to(input.get_ref(batch, plane, n) - mean);
@@ -162,30 +157,30 @@ struct GradOp {
 };
 
 #if CUDA_VERSION >= 9000
-#define FULLMASK 0xFFFFFFFF
+#define FULLMASK        0xFFFFFFFF
 #define __shfl_xor(...) __shfl_xor_sync(FULLMASK, __VA_ARGS__)
 #endif
 
 // Sum across all threads within a warp
-template<typename T>
+template <typename T>
 static __device__ __forceinline__ T warpSum(T val) {
 #if __CUDA_ARCH__ >= 300
-for (int i = 0; i < getMSB(WARP_SIZE); ++i) {
+  for (int i = 0; i < getMSB(WARP_SIZE); ++i) {
     val += __shfl_xor(val, 1 << i, WARP_SIZE);
   }
 #else
-__shared__ T values[MAX_BLOCK_SIZE];
-values[threadIdx.x] = val;
-__threadfence_block();
-const int base = (threadIdx.x / WARP_SIZE) * WARP_SIZE;
-for (int i = 1; i < WARP_SIZE; i++) {
-val += values[base + ((i + threadIdx.x) % WARP_SIZE)];
-}
+  __shared__ T values[MAX_BLOCK_SIZE];
+  values[threadIdx.x] = val;
+  __threadfence_block();
+  const int base = (threadIdx.x / WARP_SIZE) * WARP_SIZE;
+  for (int i = 1; i < WARP_SIZE; i++) {
+    val += values[base + ((i + threadIdx.x) % WARP_SIZE)];
+  }
 #endif
-return val;
+  return val;
 }
 
-template<typename DType, typename AccReal>
+template <typename DType, typename AccReal>
 static __device__ __forceinline__ Float2<DType, AccReal> warpSum(Float2<DType, AccReal> value) {
   value.v1 = warpSum(value.v1);
   value.v2 = warpSum(value.v2);
@@ -193,9 +188,9 @@ static __device__ __forceinline__ Float2<DType, AccReal> warpSum(Float2<DType, A
 }
 
 // Sum across (batch, x/y/z) applying Op() pointwise
-template<typename T, typename Op, typename DeviceTensor>
+template <typename T, typename Op, typename DeviceTensor>
 static __device__ T reduce(Op op, DeviceTensor tensor, int plane) {
-  T sum = (T) 0;
+  T sum = (T)0;
   for (int batch = 0; batch < tensor.OuterSize(); ++batch) {
     for (int x = threadIdx.x; x < tensor.InnerSize(); x += blockDim.x) {
       sum += op(batch, plane, x);
@@ -213,7 +208,7 @@ static __device__ T reduce(Op op, DeviceTensor tensor, int plane) {
   }
   if (threadIdx.x >= blockDim.x / WARP_SIZE && threadIdx.x < WARP_SIZE) {
     // zero out the other entries in shared
-    shared[threadIdx.x] = (T) 0;
+    shared[threadIdx.x] = (T)0;
   }
   __syncthreads();
   if (threadIdx.x / WARP_SIZE == 0) {
@@ -229,27 +224,26 @@ static __device__ T reduce(Op op, DeviceTensor tensor, int plane) {
 }
 
 namespace {
-  constexpr int inference_forward_threads = 512;
-  constexpr int shmem_elements = 1536;
+constexpr int inference_forward_threads = 512;
+constexpr int shmem_elements            = 1536;
 }  // namespace
 
 template <typename DType, typename AType, typename LType, bool small_num_channels>
-__launch_bounds__(inference_forward_threads)
-__global__ void BatchNormalizationUpdateOutputInferenceKernel(
-  const DType* input,
-  DType* output,
-  const index_t size,
-  const index_t outer_size,
-  const index_t num_channels,
-  const index_t inner_size,
-  const AType* runningMean,
-  const AType* runningVar,
-  AType* saveMean,
-  AType* saveInvStd,
-  AType* weight,
-  AType* bias,
-  const AType epsilon,
-  const uint32_t flags) {
+__launch_bounds__(inference_forward_threads) __global__
+    void BatchNormalizationUpdateOutputInferenceKernel(const DType* input,
+                                                       DType* output,
+                                                       const index_t size,
+                                                       const index_t outer_size,
+                                                       const index_t num_channels,
+                                                       const index_t inner_size,
+                                                       const AType* runningMean,
+                                                       const AType* runningVar,
+                                                       AType* saveMean,
+                                                       AType* saveInvStd,
+                                                       AType* weight,
+                                                       AType* bias,
+                                                       const AType epsilon,
+                                                       const uint32_t flags) {
   constexpr int nvec = sizeof(LType) / sizeof(DType);
   __shared__ AType saved_invstd[shmem_elements];
   __shared__ AType saved_mean[shmem_elements];
@@ -266,80 +260,75 @@ __global__ void BatchNormalizationUpdateOutputInferenceKernel(
   if (small_num_channels) {
     for (int i = threadIdx.x; i < num_channels; i += blockDim.x) {
       saved_invstd[i] = variance_to_invstd(runningVar[i], epsilon);
-      saved_mean[i] = runningMean[i];
-      saved_weight[i] = (weight != nullptr && (flags & FIX_GAMMA_FLAG) == 0)
-                        ? weight[i]
-                        : 1;
-      saved_bias[i] = (bias != nullptr) ? bias[i] : 0;
+      saved_mean[i]   = runningMean[i];
+      saved_weight[i] = (weight != nullptr && (flags & FIX_GAMMA_FLAG) == 0) ? weight[i] : 1;
+      saved_bias[i]   = (bias != nullptr) ? bias[i] : 0;
     }
     __syncthreads();
   }
 
-  const index_t tid = threadIdx.x + blockIdx.x * blockDim.x;
-  const index_t stride = blockDim.x * gridDim.x;
+  const index_t tid          = threadIdx.x + blockIdx.x * blockDim.x;
+  const index_t stride       = blockDim.x * gridDim.x;
   const LType* input_aligned = reinterpret_cast<const LType*>(input);
-  LType* output_aligned = reinterpret_cast<LType*>(output);
+  LType* output_aligned      = reinterpret_cast<LType*>(output);
   for (index_t i = tid; i < size / nvec; i += stride) {
-    scratch.aligned = input_aligned[i];
-      const index_t my_channel_base = (nvec * i) % (inner_size * num_channels);
+    scratch.aligned               = input_aligned[i];
+    const index_t my_channel_base = (nvec * i) % (inner_size * num_channels);
 #pragma unroll
     for (int j = 0; j < nvec; ++j) {
       index_t my_channel = (my_channel_base + j) / inner_size;
-      if (my_channel >= num_channels) my_channel = my_channel % num_channels;
+      if (my_channel >= num_channels)
+        my_channel = my_channel % num_channels;
       AType current_input = static_cast<AType>(scratch.separate[j]);
 
       AType invstd = small_num_channels ? saved_invstd[my_channel]
                                         : variance_to_invstd(runningVar[my_channel], epsilon);
-      AType mean = small_num_channels ? saved_mean[my_channel]
-                                      : runningMean[my_channel];
-      AType gamma = small_num_channels ? saved_weight[my_channel]
-                                       : ((weight != nullptr && (flags & FIX_GAMMA_FLAG) == 0)
-                                          ? weight[my_channel]
-                                          : 1);
-      AType beta = small_num_channels ? saved_bias[my_channel]
-                                      : ((bias != nullptr) ? bias[my_channel]
-                                                           : 0);
-      current_input = gamma * (current_input - mean) * invstd + beta;
+      AType mean   = small_num_channels ? saved_mean[my_channel] : runningMean[my_channel];
+      AType gamma =
+          small_num_channels
+              ? saved_weight[my_channel]
+              : ((weight != nullptr && (flags & FIX_GAMMA_FLAG) == 0) ? weight[my_channel] : 1);
+      AType beta =
+          small_num_channels ? saved_bias[my_channel] : ((bias != nullptr) ? bias[my_channel] : 0);
+      current_input       = gamma * (current_input - mean) * invstd + beta;
       scratch.separate[j] = current_input;
     }
 
     output_aligned[i] = scratch.aligned;
 
     if (i < num_channels) {
-      saveMean[i] = runningMean[i];
+      saveMean[i]   = runningMean[i];
       saveInvStd[i] = variance_to_invstd(runningVar[i], epsilon);
-      if ((flags & WRITE_GAMMA_FLAG) != 0 && (flags & FIX_GAMMA_FLAG) != 0
-          && weight != nullptr) {
+      if ((flags & WRITE_GAMMA_FLAG) != 0 && (flags & FIX_GAMMA_FLAG) != 0 && weight != nullptr) {
         weight[i] = 1;
       }
     }
   }
 }
 
-template<typename DType, typename AccReal, typename DeviceTensor1, typename DeviceTensor>
-__global__ void BatchNormalizationUpdateOutputKernel(
-  DeviceTensor input,
-  DeviceTensor output,
-  DeviceTensor1 weight,
-  DeviceTensor1 bias,
-  const AccReal epsilon,
-  const AccReal momentum,
-  DeviceTensor1 runningMean,
-  DeviceTensor1 runningVar,
-  DeviceTensor1 saveMean,
-  DeviceTensor1 saveInvStd,
-  const uint32_t flags) {
+template <typename DType, typename AccReal, typename DeviceTensor1, typename DeviceTensor>
+__global__ void BatchNormalizationUpdateOutputKernel(DeviceTensor input,
+                                                     DeviceTensor output,
+                                                     DeviceTensor1 weight,
+                                                     DeviceTensor1 bias,
+                                                     const AccReal epsilon,
+                                                     const AccReal momentum,
+                                                     DeviceTensor1 runningMean,
+                                                     DeviceTensor1 runningVar,
+                                                     DeviceTensor1 saveMean,
+                                                     DeviceTensor1 saveInvStd,
+                                                     const uint32_t flags) {
   const int plane = blockIdx.x;
-  const int N = input.OuterSize() * input.InnerSize();
+  const int N     = input.OuterSize() * input.InnerSize();
 
   const AccReal norm = AccReal(1) / N;
 
   // Compute the mean and variance across (batch, x/y/z)
-  const AccReal mean = reduce<AccReal>(
-    SumOp<DType, AccReal, DeviceTensor>(input), input, plane) * norm;
+  const AccReal mean =
+      reduce<AccReal>(SumOp<DType, AccReal, DeviceTensor>(input), input, plane) * norm;
   __syncthreads();
-  const AccReal varN = reduce<AccReal>(VarOp<DType, AccReal, DeviceTensor>(mean, input),
-                                       input, plane);
+  const AccReal varN =
+      reduce<AccReal>(VarOp<DType, AccReal, DeviceTensor>(mean, input), input, plane);
   AccReal invStd = 0;
   if (varN != AccReal(0) || epsilon != AccReal(0)) {
     invStd = AccReal(1.0) / sqrt(varN * norm + epsilon);
@@ -349,30 +338,30 @@ __global__ void BatchNormalizationUpdateOutputKernel(
   if (threadIdx.x == 0) {
     // For one item (0th) per plane (channel), write the per-channel data (ie mean, variance, etc)
     // Momentum based writeback
-    saveMean[plane] = ScalarConvert<AccReal, DType>::to(mean);
+    saveMean[plane]   = ScalarConvert<AccReal, DType>::to(mean);
     saveInvStd[plane] = invStd;
-    if ((flags & WRITE_GAMMA_FLAG) != 0 && (flags & FIX_GAMMA_FLAG) != 0
-        && weight.numElements() > 0) {
+    if ((flags & WRITE_GAMMA_FLAG) != 0 && (flags & FIX_GAMMA_FLAG) != 0 &&
+        weight.numElements() > 0) {
       weight[plane] = AccReal(1);
     }
   }
 
   // Write normalized and update the output
   const AccReal gamma = ((flags & FIX_GAMMA_FLAG) == 0 && weight.numElements() > 0)
-                        ? ScalarConvert<DType, AccReal>::to(weight[plane])
-                        : ScalarConvert<int, AccReal>::to(1);
-  const AccReal beta = bias.numElements() > 0 ? ScalarConvert<DType, AccReal>::to(bias[plane])
-                                              : ScalarConvert<int, AccReal>::to(0);
+                            ? ScalarConvert<DType, AccReal>::to(weight[plane])
+                            : ScalarConvert<int, AccReal>::to(1);
+  const AccReal beta  = bias.numElements() > 0 ? ScalarConvert<DType, AccReal>::to(bias[plane])
+                                               : ScalarConvert<int, AccReal>::to(0);
   for (int batch = 0, nbatch = input.OuterSize(); batch < nbatch; ++batch) {
     for (int x = threadIdx.x, nx = input.InnerSize(); x < nx; x += blockDim.x) {
       const DType inp = input.get_ref(batch, plane, x);
       output.get_ref(batch, plane, x) =
-        ScalarConvert<AccReal, DType>::to(gamma * (inp - mean) * invStd + beta);
+          ScalarConvert<AccReal, DType>::to(gamma * (inp - mean) * invStd + beta);
     }
   }
 }
 
-template<typename DeviceTensor1>
+template <typename DeviceTensor1>
 struct CUDATensors {
   DeviceTensor1 gradWeight;
   DeviceTensor1 gradBias;
@@ -384,21 +373,27 @@ struct CUDATensors {
 };
 
 namespace {
-  inline int ceil_div(int x, int y) {
-    return (x + y - 1) / y;
-  }
+inline int ceil_div(int x, int y) {
+  return (x + y - 1) / y;
+}
 }  // namespace
 
-template<int NTHREADS, typename DType, typename AType, typename LType>
-__global__ void FrozenBatchNormalizationBackwardKernelCLastPhase1(
-    const DType* input, const DType* gradOutput, AType* temp_space,
-    DType* gradInput, const AType* weight, const AType* runningMean,
-    const AType* runningVar, const index_t outer, const index_t num_channels,
-    const AType eps, const uint32_t flags) {
+template <int NTHREADS, typename DType, typename AType, typename LType>
+__global__ void FrozenBatchNormalizationBackwardKernelCLastPhase1(const DType* input,
+                                                                  const DType* gradOutput,
+                                                                  AType* temp_space,
+                                                                  DType* gradInput,
+                                                                  const AType* weight,
+                                                                  const AType* runningMean,
+                                                                  const AType* runningVar,
+                                                                  const index_t outer,
+                                                                  const index_t num_channels,
+                                                                  const AType eps,
+                                                                  const uint32_t flags) {
   using mxnet::common::cuda::warp_size;
   constexpr int num_warps = NTHREADS / warp_size;
-  constexpr int nvec = sizeof(LType) >= sizeof(DType) ? sizeof(LType) / sizeof(DType) : 1;
-  const size_t stride = num_channels / nvec;
+  constexpr int nvec      = sizeof(LType) >= sizeof(DType) ? sizeof(LType) / sizeof(DType) : 1;
+  const size_t stride     = num_channels / nvec;
 
   union vectorized_loader {
     LType aligned;
@@ -411,50 +406,50 @@ __global__ void FrozenBatchNormalizationBackwardKernelCLastPhase1(
   vectorized_loader vec_input, vec_gradOutput;
 
   __shared__ AType scratch[NTHREADS * 2 * nvec];
-  AType * my_values_gamma = &(scratch[threadIdx.x * nvec]);
-  AType * my_values_beta = &(scratch[(NTHREADS + threadIdx.x) * nvec]);
+  AType* my_values_gamma = &(scratch[threadIdx.x * nvec]);
+  AType* my_values_beta  = &(scratch[(NTHREADS + threadIdx.x) * nvec]);
 
   AType sum_gamma[nvec];  // NOLINT(*)
-  AType sum_beta[nvec];  // NOLINT(*)
+  AType sum_beta[nvec];   // NOLINT(*)
 #pragma unroll
   for (int i = 0; i < nvec; ++i) {
     sum_gamma[i] = 0;
-    sum_beta[i] = 0;
+    sum_beta[i]  = 0;
   }
 
-  const size_t offset = blockIdx.x * warp_size;
-  const int my_warp = threadIdx.x / warp_size;
+  const size_t offset          = blockIdx.x * warp_size;
+  const int my_warp            = threadIdx.x / warp_size;
   const int thread_idx_in_warp = threadIdx.x % warp_size;
 
   AType invstd[nvec];  // NOLINT(*)
-  AType mean[nvec];  // NOLINT(*)
-  AType gamma[nvec];  // NOLINT(*)
+  AType mean[nvec];    // NOLINT(*)
+  AType gamma[nvec];   // NOLINT(*)
   size_t channel_offset = (offset + thread_idx_in_warp) * nvec;
 
   if (channel_offset < num_channels) {
 #pragma unroll
     for (int i = 0; i < nvec; ++i) {
       invstd[i] = variance_to_invstd(runningVar[channel_offset + i], eps);
-      mean[i] = runningMean[channel_offset + i];
-      gamma[i] = weight != nullptr ? weight[channel_offset + i] : 1;
+      mean[i]   = runningMean[channel_offset + i];
+      gamma[i]  = weight != nullptr ? weight[channel_offset + i] : 1;
     }
   }
 
   const LType* aligned_gradOutput = reinterpret_cast<const LType*>(gradOutput);
-  const LType* aligned_input = reinterpret_cast<const LType*>(input);
-  LType* gradInput_aligned = reinterpret_cast<LType*>(gradInput);
+  const LType* aligned_input      = reinterpret_cast<const LType*>(input);
+  LType* gradInput_aligned        = reinterpret_cast<LType*>(gradInput);
 
   const int rows_per_block = (outer + gridDim.y - 1) / gridDim.y;
-  const size_t start_row = my_warp + rows_per_block * blockIdx.y;
-  const size_t end_row = min(outer, static_cast<index_t>(rows_per_block * (blockIdx.y + 1)));
+  const size_t start_row   = my_warp + rows_per_block * blockIdx.y;
+  const size_t end_row     = min(outer, static_cast<index_t>(rows_per_block * (blockIdx.y + 1)));
   if (offset + thread_idx_in_warp < stride) {
     for (size_t i = start_row; i < end_row; i += num_warps) {
-      const index_t idx = i * stride + offset + thread_idx_in_warp;
+      const index_t idx      = i * stride + offset + thread_idx_in_warp;
       vec_gradOutput.aligned = aligned_gradOutput[idx];
-      vec_input.aligned = aligned_input[idx];
+      vec_input.aligned      = aligned_input[idx];
 #pragma unroll
       for (int j = 0; j < nvec; ++j) {
-        sum_beta[j]  += static_cast<AType>(vec_gradOutput.separate[j]);
+        sum_beta[j] += static_cast<AType>(vec_gradOutput.separate[j]);
         sum_gamma[j] += static_cast<AType>(vec_gradOutput.separate[j]) *
                         (static_cast<AType>(vec_input.separate[j]) - mean[j]);
       }
@@ -465,11 +460,11 @@ __global__ void FrozenBatchNormalizationBackwardKernelCLastPhase1(
           vec_gradOutput.separate[j] *= invstd[j] * gamma[j];
         }
         if (flags & ADDTO_DATA_FLAG) {
-           vec_input.aligned = gradInput_aligned[idx];
+          vec_input.aligned = gradInput_aligned[idx];
 #pragma unroll
-           for (int j = 0; j < nvec; ++j) {
-             vec_gradOutput.separate[j] += vec_input.separate[j];
-           }
+          for (int j = 0; j < nvec; ++j) {
+            vec_gradOutput.separate[j] += vec_input.separate[j];
+          }
         }
         gradInput_aligned[idx] = vec_gradOutput.aligned;
       }
@@ -479,7 +474,7 @@ __global__ void FrozenBatchNormalizationBackwardKernelCLastPhase1(
 #pragma unroll
   for (int i = 0; i < nvec; ++i) {
     my_values_gamma[i] = sum_gamma[i];
-    my_values_beta[i] = sum_beta[i];
+    my_values_beta[i]  = sum_beta[i];
   }
 
   __syncthreads();
@@ -496,27 +491,27 @@ __global__ void FrozenBatchNormalizationBackwardKernelCLastPhase1(
     __syncthreads();
   }
 
-  if (threadIdx.x < min(warp_size * nvec,
-                        static_cast<int>(num_channels - nvec * offset))) {
-    const size_t offset_out = nvec * offset +
-                              blockIdx.y * num_channels;
-    const size_t offset_beta = gridDim.y * num_channels;
-    temp_space[offset_out + threadIdx.x] = scratch[threadIdx.x];
+  if (threadIdx.x < min(warp_size * nvec, static_cast<int>(num_channels - nvec * offset))) {
+    const size_t offset_out                            = nvec * offset + blockIdx.y * num_channels;
+    const size_t offset_beta                           = gridDim.y * num_channels;
+    temp_space[offset_out + threadIdx.x]               = scratch[threadIdx.x];
     temp_space[offset_beta + offset_out + threadIdx.x] = scratch[NTHREADS * nvec + threadIdx.x];
   }
 }
 
 template <typename AType>
-__global__ void FrozenBatchNormalizationBackwardKernelCLastPhase2(const AType * temp_space,
-                                                                  const AType * runningVar,
-                                                                  AType * out_gamma,
-                                                                  AType * out_beta,
-                                                                  int lead_dim, int n_blocks,
-                                                                  AType epsilon, uint32_t flags) {
+__global__ void FrozenBatchNormalizationBackwardKernelCLastPhase2(const AType* temp_space,
+                                                                  const AType* runningVar,
+                                                                  AType* out_gamma,
+                                                                  AType* out_beta,
+                                                                  int lead_dim,
+                                                                  int n_blocks,
+                                                                  AType epsilon,
+                                                                  uint32_t flags) {
   int tid = threadIdx.x + blockIdx.x * blockDim.x;
   if (tid < lead_dim) {
     AType sum_gamma = 0;
-    AType sum_beta = 0;
+    AType sum_beta  = 0;
     for (int i = tid; i < lead_dim * n_blocks; i += lead_dim) {
       sum_gamma += temp_space[i];
       sum_beta += temp_space[i + lead_dim * n_blocks];
@@ -543,28 +538,26 @@ __global__ void FrozenBatchNormalizationBackwardKernelCLastPhase2(const AType *
   }
 }
 
-template<int NTHREADS, typename DType, typename AType, typename LType>
-__global__ void FrozenBatchNormalizationBackwardKernel(
-  const DType* input,
-  const DType* gradOutput,
-  DType* gradInput,
-  AType* gradWeight,
-  AType* gradBias,
-  const AType* weight,
-  const AType* runningMean,
-  const AType* runningVar,
-  const index_t outer,
-  const index_t inner,
-  const index_t num_channels,
-  const index_t NHW_div_nvec,
-  const AType eps,
-  const uint32_t flags) {
+template <int NTHREADS, typename DType, typename AType, typename LType>
+__global__ void FrozenBatchNormalizationBackwardKernel(const DType* input,
+                                                       const DType* gradOutput,
+                                                       DType* gradInput,
+                                                       AType* gradWeight,
+                                                       AType* gradBias,
+                                                       const AType* weight,
+                                                       const AType* runningMean,
+                                                       const AType* runningVar,
+                                                       const index_t outer,
+                                                       const index_t inner,
+                                                       const index_t num_channels,
+                                                       const index_t NHW_div_nvec,
+                                                       const AType eps,
+                                                       const uint32_t flags) {
   const index_t my_channel = blockIdx.x;
-  const AType invstd = variance_to_invstd(runningVar[my_channel], eps);
-  const AType mean = runningMean[my_channel];
-  const AType gamma = weight != nullptr ? weight[my_channel] : 1;
-  constexpr int nvec = sizeof(LType) > sizeof(DType) ? sizeof(LType) / sizeof(DType)
-                                                     : 1;
+  const AType invstd       = variance_to_invstd(runningVar[my_channel], eps);
+  const AType mean         = runningMean[my_channel];
+  const AType gamma        = weight != nullptr ? weight[my_channel] : 1;
+  constexpr int nvec       = sizeof(LType) > sizeof(DType) ? sizeof(LType) / sizeof(DType) : 1;
   union vectorized_loader {
     LType aligned;
     DType separate[nvec];  // NOLINT(*)
@@ -575,23 +568,21 @@ __global__ void FrozenBatchNormalizationBackwardKernel(
 
   vectorized_loader vec_input, vec_gradOutput;
 
-  const LType* input_aligned = reinterpret_cast<const LType*>(input);
+  const LType* input_aligned      = reinterpret_cast<const LType*>(input);
   const LType* gradOutput_aligned = reinterpret_cast<const LType*>(gradOutput);
-  LType* gradInput_aligned = reinterpret_cast<LType*>(gradInput);
+  LType* gradInput_aligned        = reinterpret_cast<LType*>(gradInput);
 
   const index_t inner_div_nvec = inner / nvec;
 
   AType sum_gamma = 0;
-  AType sum_beta = 0;
-
+  AType sum_beta  = 0;
 
   for (index_t i = threadIdx.x; i < NHW_div_nvec; i += blockDim.x) {
     const index_t inner_idx = i % inner_div_nvec;
     const index_t outer_idx = i / inner_div_nvec;
-    const index_t idx = inner_idx +
-                        (my_channel + outer_idx * num_channels) * inner_div_nvec;
-    vec_gradOutput.aligned = gradOutput_aligned[idx];
-    vec_input.aligned = input_aligned[idx];
+    const index_t idx       = inner_idx + (my_channel + outer_idx * num_channels) * inner_div_nvec;
+    vec_gradOutput.aligned  = gradOutput_aligned[idx];
+    vec_input.aligned       = input_aligned[idx];
 #pragma unroll
     for (int j = 0; j < nvec; ++j) {
       sum_beta += static_cast<AType>(vec_gradOutput.separate[j]);
@@ -606,20 +597,20 @@ __global__ void FrozenBatchNormalizationBackwardKernel(
         vec_gradOutput.separate[j] *= invstd * gamma;
       }
       if (flags & ADDTO_DATA_FLAG) {
-         vec_input.aligned = gradInput_aligned[idx];
+        vec_input.aligned = gradInput_aligned[idx];
 #pragma unroll
-         for (int j = 0; j < nvec; ++j) {
-           vec_gradOutput.separate[j] += vec_input.separate[j];
-         }
+        for (int j = 0; j < nvec; ++j) {
+          vec_gradOutput.separate[j] += vec_input.separate[j];
+        }
       }
       gradInput_aligned[idx] = vec_gradOutput.aligned;
     }
   }
 
-  sum_gamma = common::cuda::reduce<NTHREADS, false>(sum_gamma,
-                                                    [](AType a, AType b) { return a + b; });
-  sum_beta = common::cuda::reduce<NTHREADS, false>(sum_beta,
-                                                   [](AType a, AType b) { return a + b; });
+  sum_gamma =
+      common::cuda::reduce<NTHREADS, false>(sum_gamma, [](AType a, AType b) { return a + b; });
+  sum_beta =
+      common::cuda::reduce<NTHREADS, false>(sum_beta, [](AType a, AType b) { return a + b; });
 
   if (threadIdx.x == 0) {
     if (flags & (WRITE_GAMMA_FLAG | ADDTO_GAMMA_FLAG)) {
@@ -643,48 +634,49 @@ __global__ void FrozenBatchNormalizationBackwardKernel(
   }
 }
 
-template<typename DType, typename AccReal, typename DeviceTensor1, typename DeviceTensor>
-static __global__ void BatchNormalizationBackwardKernel(
-  const DeviceTensor input,
-  const DeviceTensor gradOutput,
-  DeviceTensor gradInput,
-  CUDATensors<DeviceTensor1> tensors,
-  const uint32_t flags,
-  const AccReal momentum,
-  const AccReal eps) {
+template <typename DType, typename AccReal, typename DeviceTensor1, typename DeviceTensor>
+static __global__ void BatchNormalizationBackwardKernel(const DeviceTensor input,
+                                                        const DeviceTensor gradOutput,
+                                                        DeviceTensor gradInput,
+                                                        CUDATensors<DeviceTensor1> tensors,
+                                                        const uint32_t flags,
+                                                        const AccReal momentum,
+                                                        const AccReal eps) {
   int plane = blockIdx.x;
-  int N = gradOutput.OuterSize() * gradOutput.InnerSize();
+  int N     = gradOutput.OuterSize() * gradOutput.InnerSize();
 
   AccReal mean, invstd;
-  mean = ScalarConvert<DType, AccReal>::to(tensors.saveMean[plane]);
+  mean   = ScalarConvert<DType, AccReal>::to(tensors.saveMean[plane]);
   invstd = tensors.saveInvStd[plane];
 
-  const AccReal weightVal = ((flags & FIX_GAMMA_FLAG) == 0 && tensors.weight.numElements() > 0) ?
-                      ScalarConvert<DType, AccReal>::to(tensors.weight[plane]) : AccReal(1);
-  const AccReal norm = AccReal(1) / N;
+  const AccReal weightVal = ((flags & FIX_GAMMA_FLAG) == 0 && tensors.weight.numElements() > 0)
+                                ? ScalarConvert<DType, AccReal>::to(tensors.weight[plane])
+                                : AccReal(1);
+  const AccReal norm      = AccReal(1) / N;
 
   // Compute two values across (batch, x/y/z) in one pass:
   // 1. Sum(gradOutput)
   // 2. DotProduct(input - mean, gradOutput)
   GradOp<DType, AccReal, DeviceTensor> g(mean, input, gradOutput);
-  Float2< DType, AccReal > res = reduce < Float2 < DType, AccReal >,
-    GradOp< DType, AccReal, DeviceTensor >, DeviceTensor > (g, gradOutput, plane);
+  Float2<DType, AccReal> res =
+      reduce<Float2<DType, AccReal>, GradOp<DType, AccReal, DeviceTensor>, DeviceTensor>(
+          g, gradOutput, plane);
   const AccReal gradOutputSum = res.v1;
-  const AccReal dotP = res.v2;
+  const AccReal dotP          = res.v2;
 
-  const AccReal gradMean = gradOutputSum * norm;
+  const AccReal gradMean  = gradOutputSum * norm;
   const AccReal projScale = dotP * norm * invstd * invstd;
   const AccReal gradScale = invstd * weightVal;
 
   if (threadIdx.x == 0) {
     const AccReal localVariance = invstd_to_variance(tensors.saveInvStd[plane], eps);
-    const AccReal localMean = tensors.saveMean[plane];
+    const AccReal localMean     = tensors.saveMean[plane];
 
     // update running averages
-    tensors.runningMean[plane] = tensors.runningMean[plane]
-                                 * momentum + localMean * (AccReal(1) - momentum);
-    tensors.runningVar[plane] = tensors.runningVar[plane]
-                                * momentum + localVariance * (AccReal(1) - momentum);
+    tensors.runningMean[plane] =
+        tensors.runningMean[plane] * momentum + localMean * (AccReal(1) - momentum);
+    tensors.runningVar[plane] =
+        tensors.runningVar[plane] * momentum + localVariance * (AccReal(1) - momentum);
   }
 
   if (gradInput.Size() > 0 && (flags & (WRITE_DATA_FLAG | ADDTO_DATA_FLAG)) != 0) {
@@ -693,10 +685,10 @@ static __global__ void BatchNormalizationBackwardKernel(
       for (int batch = 0, nbatch = gradOutput.OuterSize(); batch < nbatch; ++batch) {
         for (int x = threadIdx.x, nx = gradOutput.InnerSize(); x < nx; x += blockDim.x) {
           const DType gradOut = gradOutput.get_ref(batch, plane, x);
-          const DType inp = input.get_ref(batch, plane, x);
-          const AccReal proj = (inp - mean) * projScale;
+          const DType inp     = input.get_ref(batch, plane, x);
+          const AccReal proj  = (inp - mean) * projScale;
           gradInput.get_ref(batch, plane, x) =
-            ScalarConvert<AccReal, DType>::to((gradOut - proj - gradMean) * gradScale);
+              ScalarConvert<AccReal, DType>::to((gradOut - proj - gradMean) * gradScale);
         }
       }
     } else {
@@ -704,10 +696,10 @@ static __global__ void BatchNormalizationBackwardKernel(
       for (int batch = 0, nbatch = gradOutput.OuterSize(); batch < nbatch; ++batch) {
         for (int x = threadIdx.x, nx = gradOutput.InnerSize(); x < nx; x += blockDim.x) {
           const DType gradOut = gradOutput.get_ref(batch, plane, x);
-          const DType inp = input.get_ref(batch, plane, x);
-          const AccReal proj = (inp - mean) * projScale;
+          const DType inp     = input.get_ref(batch, plane, x);
+          const AccReal proj  = (inp - mean) * projScale;
           gradInput.get_ref(batch, plane, x) +=
-            ScalarConvert<AccReal, DType>::to((gradOut - proj - gradMean) * gradScale);
+              ScalarConvert<AccReal, DType>::to((gradOut - proj - gradMean) * gradScale);
         }
       }
     }
@@ -734,12 +726,11 @@ static __global__ void BatchNormalizationBackwardKernel(
   }
 }
 
-template<typename DType, int Dim>
+template <typename DType, int Dim>
 struct DeviceTensor {
  public:
   inline DeviceTensor() {}
-  inline DeviceTensor(DType *p, const int *size)
-    : dptr_(p) {
+  inline DeviceTensor(DType* p, const int* size) : dptr_(p) {
     for (int i = 0; i < Dim; ++i) {
       size_[i] = size ? size[i] : 0;
     }
@@ -757,9 +748,7 @@ struct DeviceTensor {
     return n;
   }
 
-  MSHADOW_XINLINE DType &operator()(const size_t batch,
-                                    const size_t plane,
-                                    const size_t x) const {
+  MSHADOW_XINLINE DType& operator()(const size_t batch, const size_t plane, const size_t x) const {
     int offset = 0;
 
     offset *= size_[0];
@@ -771,10 +760,10 @@ struct DeviceTensor {
     offset *= size_[2];
     offset += x;
 
-    return *(const_cast<DType *>(dptr_ + offset));
+    return *(const_cast<DType*>(dptr_ + offset));
   }
 
-  MSHADOW_XINLINE DType &operator[](const size_t x) const {
+  MSHADOW_XINLINE DType& operator[](const size_t x) const {
     return *(dptr_ + x);
   }
 
@@ -790,14 +779,14 @@ struct DeviceTensor {
     return size_[1];
   }
 
-  DType *dptr_;
+  DType* dptr_;
   int size_[Dim];
 };
 
-template<typename DType, int Dim>
-static DeviceTensor<DType, Dim> devicetensor(const TBlob &blob) {
+template <typename DType, int Dim>
+static DeviceTensor<DType, Dim> devicetensor(const TBlob& blob) {
   CHECK_EQ(blob.type_flag_, mshadow::DataType<DType>::kFlag);
-  DType *data = blob.dptr<DType>();
+  DType* data     = blob.dptr<DType>();
   const int inDim = blob.shape_.ndim();
   if (inDim == Dim) {
     DeviceTensor<DType, Dim> tensor(data, nullptr);
@@ -821,110 +810,130 @@ static DeviceTensor<DType, Dim> devicetensor(const TBlob &blob) {
   return DeviceTensor<DType, Dim>(data, &size[0]);
 }
 
-
 #define DeviceTensor1 DeviceTensor<AccReal, 1>
 
 using namespace mxnet::op;
 
-template<typename DType, typename AccReal>
-static void BatchNormalizationUpdateOutput(mshadow::Stream<gpu> *s,
-                                           const OpContext &ctx,
+template <typename DType, typename AccReal>
+static void BatchNormalizationUpdateOutput(mshadow::Stream<gpu>* s,
+                                           const OpContext& ctx,
                                            const BatchNormParam& param,
-                                           const std::vector<TBlob> &in_data,
-                                           const std::vector<TBlob> &out_data,
-                                           const std::vector<TBlob> &aux_states,
+                                           const std::vector<TBlob>& in_data,
+                                           const std::vector<TBlob>& out_data,
+                                           const std::vector<TBlob>& aux_states,
                                            const uint32_t flags,
                                            double momentum,
                                            double eps) {
-  batchnorm::BNTensor3<DType> input  = batchnorm::BNTensor3<DType>(
-    in_data[batchnorm::kData], param.axis);
-  batchnorm::BNTensor3<DType> output = batchnorm::BNTensor3<DType>(
-    out_data[batchnorm::kOut], param.axis);
-  DeviceTensor1 weight = devicetensor<AccReal, 1>(in_data[batchnorm::kGamma]);
-  DeviceTensor1 bias = devicetensor<AccReal, 1>(in_data[batchnorm::kBeta]);
+  batchnorm::BNTensor3<DType> input =
+      batchnorm::BNTensor3<DType>(in_data[batchnorm::kData], param.axis);
+  batchnorm::BNTensor3<DType> output =
+      batchnorm::BNTensor3<DType>(out_data[batchnorm::kOut], param.axis);
+  DeviceTensor1 weight      = devicetensor<AccReal, 1>(in_data[batchnorm::kGamma]);
+  DeviceTensor1 bias        = devicetensor<AccReal, 1>(in_data[batchnorm::kBeta]);
   DeviceTensor1 runningMean = devicetensor<AccReal, 1>(aux_states[batchnorm::kMovingMean]);
-  DeviceTensor1 runningVar = devicetensor<AccReal, 1>(aux_states[batchnorm::kMovingVar]);
-  DeviceTensor1 saveMean = devicetensor<AccReal, 1>(out_data[batchnorm::kMean]);
-  DeviceTensor1 saveInvStd = devicetensor<AccReal, 1>(out_data[batchnorm::kVar]);
+  DeviceTensor1 runningVar  = devicetensor<AccReal, 1>(aux_states[batchnorm::kMovingVar]);
+  DeviceTensor1 saveMean    = devicetensor<AccReal, 1>(out_data[batchnorm::kMean]);
+  DeviceTensor1 saveInvStd  = devicetensor<AccReal, 1>(out_data[batchnorm::kVar]);
 
   DCHECK_GT(weight.numElements(), 0);
 
   if ((flags & IS_TRAINING_FLAG) == 0 || (flags & USE_GLOBAL_STATS_FLAG) != 0) {
-    AccReal* bias_ptr = bias.numElements() > 0 ? bias.dptr_ : nullptr;
-    AccReal* gamma_ptr = weight.numElements() > 0 ? weight.dptr_ : nullptr;
-    int nvec = sizeof(double) / sizeof(DType);
-    index_t size = input.InnerSize() * input.OuterSize() * input.ChannelCount();
+    AccReal* bias_ptr    = bias.numElements() > 0 ? bias.dptr_ : nullptr;
+    AccReal* gamma_ptr   = weight.numElements() > 0 ? weight.dptr_ : nullptr;
+    int nvec             = sizeof(double) / sizeof(DType);
+    index_t size         = input.InnerSize() * input.OuterSize() * input.ChannelCount();
     index_t aligned_size = ((size + nvec - 1) / nvec) * nvec;
-    index_t blocks = std::min((size + nvec * inference_forward_threads - 1) /
-                              (nvec * inference_forward_threads),
-                              static_cast<index_t>(512));
+    index_t blocks =
+        std::min((size + nvec * inference_forward_threads - 1) / (nvec * inference_forward_threads),
+                 static_cast<index_t>(512));
     if (input.ChannelCount() < shmem_elements) {
       BatchNormalizationUpdateOutputInferenceKernel<DType, AccReal, double, true>
-        <<<blocks, inference_forward_threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
-        input.dptr_, output.dptr_,
-        aligned_size, input.OuterSize(),
-        input.ChannelCount(), input.InnerSize(),
-        runningMean.dptr_, runningVar.dptr_,
-        saveMean.dptr_, saveInvStd.dptr_,
-        gamma_ptr, bias_ptr,
-        eps, flags);
+          <<<blocks, inference_forward_threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
+              input.dptr_,
+              output.dptr_,
+              aligned_size,
+              input.OuterSize(),
+              input.ChannelCount(),
+              input.InnerSize(),
+              runningMean.dptr_,
+              runningVar.dptr_,
+              saveMean.dptr_,
+              saveInvStd.dptr_,
+              gamma_ptr,
+              bias_ptr,
+              eps,
+              flags);
     } else {
       BatchNormalizationUpdateOutputInferenceKernel<DType, AccReal, double, false>
-        <<<blocks, inference_forward_threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
-        input.dptr_, output.dptr_,
-        aligned_size, input.OuterSize(),
-        input.ChannelCount(), input.InnerSize(),
-        runningMean.dptr_, runningVar.dptr_,
-        saveMean.dptr_, saveInvStd.dptr_,
-        gamma_ptr, bias_ptr,
-        eps, flags);
+          <<<blocks, inference_forward_threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
+              input.dptr_,
+              output.dptr_,
+              aligned_size,
+              input.OuterSize(),
+              input.ChannelCount(),
+              input.InnerSize(),
+              runningMean.dptr_,
+              runningVar.dptr_,
+              saveMean.dptr_,
+              saveInvStd.dptr_,
+              gamma_ptr,
+              bias_ptr,
+              eps,
+              flags);
     }
   } else {
     dim3 blocks(input.ChannelCount());
     dim3 threads(batchnorm::cuda::getNumThreads(input.InnerSize()));
-    BatchNormalizationUpdateOutputKernel<DType, AccReal, DeviceTensor1,
-      batchnorm::BNTensor3<DType>>
-      << < blocks, threads, 0, mshadow::Stream<gpu>::GetStream(s) >> > (
-      input, output, weight, bias, eps, momentum, runningMean, runningVar,
-        saveMean, saveInvStd, flags);
+    BatchNormalizationUpdateOutputKernel<DType, AccReal, DeviceTensor1, batchnorm::BNTensor3<DType>>
+        <<<blocks, threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(input,
+                                                                     output,
+                                                                     weight,
+                                                                     bias,
+                                                                     eps,
+                                                                     momentum,
+                                                                     runningMean,
+                                                                     runningVar,
+                                                                     saveMean,
+                                                                     saveInvStd,
+                                                                     flags);
   }
   MSHADOW_CUDA_POST_KERNEL_CHECK(BatchNormalizationUpdateOutput);
 }
 
-template<typename DType, typename AccReal>
-static void BatchNormalizationBackward(mshadow::Stream<gpu> *s,
-                                       const OpContext &ctx,
+template <typename DType, typename AccReal>
+static void BatchNormalizationBackward(mshadow::Stream<gpu>* s,
+                                       const OpContext& ctx,
                                        const BatchNormParam& param,
-                                       const std::vector<TBlob> &out_grad,
-                                       const std::vector<TBlob> &in_data,
-                                       const std::vector<TBlob> &out_data,
-                                       const std::vector<TBlob> &in_grad,
-                                       const std::vector<TBlob> &aux_states,
+                                       const std::vector<TBlob>& out_grad,
+                                       const std::vector<TBlob>& in_data,
+                                       const std::vector<TBlob>& out_data,
+                                       const std::vector<TBlob>& in_grad,
+                                       const std::vector<TBlob>& aux_states,
                                        const uint32_t flags,
                                        double momentum,
                                        double eps) {
-  batchnorm::BNTensor3<DType> input = batchnorm::BNTensor3<DType>(
-    in_data[batchnorm::kData], param.axis);
-  batchnorm::BNTensor3<DType>gradOutput = batchnorm::BNTensor3<DType>(
-    out_grad[batchnorm::kOut], param.axis);
-  batchnorm::BNTensor3<DType>gradInput = batchnorm::BNTensor3<DType>(
-    in_grad[batchnorm::kData], param.axis);
+  batchnorm::BNTensor3<DType> input =
+      batchnorm::BNTensor3<DType>(in_data[batchnorm::kData], param.axis);
+  batchnorm::BNTensor3<DType> gradOutput =
+      batchnorm::BNTensor3<DType>(out_grad[batchnorm::kOut], param.axis);
+  batchnorm::BNTensor3<DType> gradInput =
+      batchnorm::BNTensor3<DType>(in_grad[batchnorm::kData], param.axis);
 
   CHECK_EQ(gradOutput.Size(), gradInput.Size());
 
   CUDATensors<DeviceTensor1> tensors;
 
-  tensors.gradWeight = devicetensor<AccReal, 1>(in_grad[batchnorm::kGamma]);
-  tensors.gradBias = devicetensor<AccReal, 1>(in_grad[batchnorm::kBeta]);
-  tensors.weight = devicetensor<AccReal, 1>(in_data[batchnorm::kGamma]);
+  tensors.gradWeight  = devicetensor<AccReal, 1>(in_grad[batchnorm::kGamma]);
+  tensors.gradBias    = devicetensor<AccReal, 1>(in_grad[batchnorm::kBeta]);
+  tensors.weight      = devicetensor<AccReal, 1>(in_data[batchnorm::kGamma]);
   tensors.runningMean = devicetensor<AccReal, 1>(aux_states[batchnorm::kMovingMean]);
-  tensors.runningVar = devicetensor<AccReal, 1>(aux_states[batchnorm::kMovingVar]);
-  tensors.saveMean = devicetensor<AccReal, 1>(out_data[batchnorm::kMean]);
-  tensors.saveInvStd = devicetensor<AccReal, 1>(out_data[batchnorm::kVar]);
+  tensors.runningVar  = devicetensor<AccReal, 1>(aux_states[batchnorm::kMovingVar]);
+  tensors.saveMean    = devicetensor<AccReal, 1>(out_data[batchnorm::kMean]);
+  tensors.saveInvStd  = devicetensor<AccReal, 1>(out_data[batchnorm::kVar]);
 
   DCHECK_GT(tensors.weight.numElements(), 0);
   const bool is_train_and_not_global_stats =
-    (flags & IS_TRAINING_FLAG) != 0 && (flags & USE_GLOBAL_STATS_FLAG) == 0;
+      (flags & IS_TRAINING_FLAG) != 0 && (flags & USE_GLOBAL_STATS_FLAG) == 0;
 
   if (is_train_and_not_global_stats) {
 #ifdef NDEBUG
@@ -935,8 +944,8 @@ static void BatchNormalizationBackward(mshadow::Stream<gpu> *s,
     dim3 blocks(gradOutput.ChannelCount());
     dim3 threads(batchnorm::cuda::getNumThreads(gradOutput.InnerSize()));
     BatchNormalizationBackwardKernel<DType, AccReal, DeviceTensor1, batchnorm::BNTensor3<DType>>
-      <<< blocks, threads, 0, mshadow::Stream<gpu>::GetStream(s) >>> (
-      input, gradOutput, gradInput, tensors, flags, momentum, eps);
+        <<<blocks, threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
+            input, gradOutput, gradInput, tensors, flags, momentum, eps);
   } else {
     uint32_t flags_copy = flags;
     if (gradInput.Size() <= 0) {
@@ -949,57 +958,70 @@ static void BatchNormalizationBackward(mshadow::Stream<gpu> *s,
       flags_copy = (flags_copy & ~WRITE_BETA_FLAG);
     }
     AccReal* gamma = ((flags & FIX_GAMMA_FLAG) == 0 && tensors.weight.numElements() > 0)
-                     ? tensors.weight.dptr_
-                     : nullptr;
+                         ? tensors.weight.dptr_
+                         : nullptr;
 
     if (param.axis == -1 || param.axis == in_data[batchnorm::kData].shape_.ndim() - 1) {
       const int C = gradOutput.ChannelCount();
-      int ltype = mxnet::common::cuda::get_load_type(C * sizeof(DType));
+      int ltype   = mxnet::common::cuda::get_load_type(C * sizeof(DType));
       const int M = gradOutput.OuterSize();
       MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
-        const unsigned int blocks_x = ceil_div(C * sizeof(DType),
-                                               mxnet::common::cuda::warp_size * sizeof(LType));
-        const unsigned int preferred_number_of_blocks = 2 *
-                                                        MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
+        const unsigned int blocks_x =
+            ceil_div(C * sizeof(DType), mxnet::common::cuda::warp_size * sizeof(LType));
+        const unsigned int preferred_number_of_blocks =
+            2 * MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
         const unsigned int blocks_y = std::max(preferred_number_of_blocks / blocks_x, 1u);
-        const dim3 n_blocks = {blocks_x, blocks_y, 1};
-        auto scratch_space = ctx.requested[batchnorm::kTempSpace]
-                                .get_space_typed<gpu, 1, AccReal>(mshadow::Shape1(C * blocks_y * 2),
-                                                                                  s);
-        auto stream = mshadow::Stream<gpu>::GetStream(s);
+        const dim3 n_blocks         = {blocks_x, blocks_y, 1};
+        auto scratch_space = ctx.requested[batchnorm::kTempSpace].get_space_typed<gpu, 1, AccReal>(
+            mshadow::Shape1(C * blocks_y * 2), s);
+        auto stream                   = mshadow::Stream<gpu>::GetStream(s);
         constexpr int nthreads_phase1 = 512;
         constexpr int nthreads_phase2 = 128;
         FrozenBatchNormalizationBackwardKernelCLastPhase1<nthreads_phase1, DType, AccReal, LType>
-          <<<n_blocks, nthreads_phase1, 0, stream>>>(input.dptr_, gradOutput.dptr_,
-                                                     scratch_space.dptr_,
-                                                     gradInput.dptr_,
-                                                     gamma,
-                                                     tensors.runningMean.dptr_,
-                                                     tensors.runningVar.dptr_,
-                                                     M, C, eps, flags_copy);
+            <<<n_blocks, nthreads_phase1, 0, stream>>>(input.dptr_,
+                                                       gradOutput.dptr_,
+                                                       scratch_space.dptr_,
+                                                       gradInput.dptr_,
+                                                       gamma,
+                                                       tensors.runningMean.dptr_,
+                                                       tensors.runningVar.dptr_,
+                                                       M,
+                                                       C,
+                                                       eps,
+                                                       flags_copy);
         const int nblocks_phase2 = ceil_div(C, nthreads_phase2);
         FrozenBatchNormalizationBackwardKernelCLastPhase2<AccReal>
-          <<<nblocks_phase2, nthreads_phase2, 0, stream>>>(scratch_space.dptr_,
-                                                           tensors.runningVar.dptr_,
-                                                           tensors.gradWeight.dptr_,
-                                                           tensors.gradBias.dptr_, C,
-                                                           blocks_y, eps, flags_copy);
+            <<<nblocks_phase2, nthreads_phase2, 0, stream>>>(scratch_space.dptr_,
+                                                             tensors.runningVar.dptr_,
+                                                             tensors.gradWeight.dptr_,
+                                                             tensors.gradBias.dptr_,
+                                                             C,
+                                                             blocks_y,
+                                                             eps,
+                                                             flags_copy);
       });
     } else {
-    dim3 blocks(gradOutput.ChannelCount());
-    int ltype = mxnet::common::cuda::get_load_type(gradOutput.InnerSize() * sizeof(DType));
-    MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
-      constexpr int nvec = sizeof(LType) > sizeof(DType) ? sizeof(LType) / sizeof(DType) : 1;
-      const index_t NHW_div_nvec = gradOutput.OuterSize() * gradOutput.InnerSize() / nvec;
-      constexpr int threads = 512;
-      FrozenBatchNormalizationBackwardKernel<threads, DType, AccReal, LType>
-        <<< blocks, threads, 0, mshadow::Stream<gpu>::GetStream(s) >>> (
-        input.dptr_, gradOutput.dptr_, gradInput.dptr_,
-        tensors.gradWeight.dptr_, tensors.gradBias.dptr_,
-        gamma, tensors.runningMean.dptr_,
-        tensors.runningVar.dptr_,
-        gradOutput.OuterSize(), gradOutput.InnerSize(),
-        gradOutput.ChannelCount(), NHW_div_nvec, eps, flags_copy);
+      dim3 blocks(gradOutput.ChannelCount());
+      int ltype = mxnet::common::cuda::get_load_type(gradOutput.InnerSize() * sizeof(DType));
+      MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
+        constexpr int nvec = sizeof(LType) > sizeof(DType) ? sizeof(LType) / sizeof(DType) : 1;
+        const index_t NHW_div_nvec = gradOutput.OuterSize() * gradOutput.InnerSize() / nvec;
+        constexpr int threads      = 512;
+        FrozenBatchNormalizationBackwardKernel<threads, DType, AccReal, LType>
+            <<<blocks, threads, 0, mshadow::Stream<gpu>::GetStream(s)>>>(input.dptr_,
+                                                                         gradOutput.dptr_,
+                                                                         gradInput.dptr_,
+                                                                         tensors.gradWeight.dptr_,
+                                                                         tensors.gradBias.dptr_,
+                                                                         gamma,
+                                                                         tensors.runningMean.dptr_,
+                                                                         tensors.runningVar.dptr_,
+                                                                         gradOutput.OuterSize(),
+                                                                         gradOutput.InnerSize(),
+                                                                         gradOutput.ChannelCount(),
+                                                                         NHW_div_nvec,
+                                                                         eps,
+                                                                         flags_copy);
       });
     }
   }
@@ -1009,10 +1031,10 @@ static void BatchNormalizationBackward(mshadow::Stream<gpu> *s,
 }  // namespace cuda
 }  // namespace batchnorm
 
-template<typename xpu, typename DType, typename AccReal>
-static inline uint32_t SetupFlags(const OpContext &ctx,
+template <typename xpu, typename DType, typename AccReal>
+static inline uint32_t SetupFlags(const OpContext& ctx,
                                   const BatchNormParam& params,
-                                  const std::vector<OpReqType> &req) {
+                                  const std::vector<OpReqType>& req) {
   uint32_t flags = 0;
   flags |= ctx.is_train ? IS_TRAINING_FLAG : 0;
   flags |= params.fix_gamma ? FIX_GAMMA_FLAG : 0;
@@ -1036,54 +1058,56 @@ static inline uint32_t SetupFlags(const OpContext &ctx,
 }
 
 /*! \brief Forward batch-norm pass on GPU */
-template<typename xpu, typename DType, typename AccReal>
-void BatchNormForwardImpl(mshadow::Stream<gpu> *stream,
-                          const OpContext &ctx, const BatchNormParam& param_,
-                          const std::vector<TBlob> &in_data,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &out_data,
-                          const std::vector<TBlob> &aux_states) {
+template <typename xpu, typename DType, typename AccReal>
+void BatchNormForwardImpl(mshadow::Stream<gpu>* stream,
+                          const OpContext& ctx,
+                          const BatchNormParam& param_,
+                          const std::vector<TBlob>& in_data,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& out_data,
+                          const std::vector<TBlob>& aux_states) {
   batchnorm::cuda::BatchNormalizationUpdateOutput<DType, AccReal>(
-    stream,
-    ctx,
-    param_,
-    in_data,
-    out_data,
-    aux_states,
-    SetupFlags<xpu, DType, AccReal>(ctx, param_, req),
-    param_.momentum,
-    param_.eps);
+      stream,
+      ctx,
+      param_,
+      in_data,
+      out_data,
+      aux_states,
+      SetupFlags<xpu, DType, AccReal>(ctx, param_, req),
+      param_.momentum,
+      param_.eps);
   MSHADOW_CUDA_POST_KERNEL_CHECK(BatchNormOp_DoForward_gpu);
 }
 
 /*! \brief Backward batch-norm pass on GPU */
-template<typename xpu, typename DType, typename AccReal>
-void BatchNormBackwardImpl(mshadow::Stream<gpu> *stream,
-                           const OpContext &ctx, const BatchNormParam& param_,
-                           const std::vector<TBlob> &out_grad,
-                           const std::vector<TBlob> &in_data,
-                           const std::vector<TBlob> &out_data,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &in_grad,
-                           const std::vector<TBlob> &aux_states) {
+template <typename xpu, typename DType, typename AccReal>
+void BatchNormBackwardImpl(mshadow::Stream<gpu>* stream,
+                           const OpContext& ctx,
+                           const BatchNormParam& param_,
+                           const std::vector<TBlob>& out_grad,
+                           const std::vector<TBlob>& in_data,
+                           const std::vector<TBlob>& out_data,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& in_grad,
+                           const std::vector<TBlob>& aux_states) {
   batchnorm::cuda::BatchNormalizationBackward<DType, AccReal>(
-    stream,
-    ctx,
-    param_,
-    out_grad,
-    in_data,
-    out_data,
-    in_grad,
-    aux_states,
-    SetupFlags<xpu, DType, AccReal>(ctx, param_, req),
-    param_.momentum,
-    param_.eps);
+      stream,
+      ctx,
+      param_,
+      out_grad,
+      in_data,
+      out_data,
+      in_grad,
+      aux_states,
+      SetupFlags<xpu, DType, AccReal>(ctx, param_, req),
+      param_.momentum,
+      param_.eps);
   MSHADOW_CUDA_POST_KERNEL_CHECK(BatchNormOp_DoBackward_gpu);
 }
 
 #if MXNET_USE_CUDNN == 1
-template<typename DType>
-static CuDNNBatchNormOp<DType> &GetCuDNNOp(const BatchNormParam& param) {
+template <typename DType>
+static CuDNNBatchNormOp<DType>& GetCuDNNOp(const BatchNormParam& param) {
 #if DMLC_CXX11_THREAD_LOCAL
   static thread_local CuDNNBatchNormOp<DType> op;
 #else
@@ -1094,24 +1118,24 @@ static CuDNNBatchNormOp<DType> &GetCuDNNOp(const BatchNormParam& param) {
 }
 #endif
 
-template<>
+template <>
 void BatchNormCompute<gpu>(const nnvm::NodeAttrs& attrs,
-                           const OpContext& ctx, const std::vector<TBlob>& inputs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   BatchNormParam param = nnvm::get<BatchNormParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), 5U);
   std::vector<TBlob> in_data(inputs.begin(), inputs.begin() + 3);
   std::vector<TBlob> aux_states(inputs.begin() + 3, inputs.end());
-  int dtype = inputs[0].type_flag_;
+  int dtype           = inputs[0].type_flag_;
   mxnet::TShape shape = inputs[0].shape_;
 
   param.axis = mxnet::op::batchnorm::GetRealAxis(shape, param.axis);
 #if MXNET_USE_CUDNN == 1
   if (!param.use_global_stats && !param.cudnn_off) {
-    MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      GetCuDNNOp<DType>(param).Forward(ctx, in_data, req, outputs, aux_states);
-    })
+    MSHADOW_REAL_TYPE_SWITCH(
+        dtype, DType, { GetCuDNNOp<DType>(param).Forward(ctx, in_data, req, outputs, aux_states); })
   } else {
     MSHADOW_REAL_TYPE_SWITCH_EX(dtype, DType, AccReal, {
       BatchNormForward<gpu, DType, AccReal>(ctx, param, in_data, req, outputs, aux_states);
@@ -1124,22 +1148,22 @@ void BatchNormCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif
 }
 
-template<>
+template <>
 void BatchNormGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
-                               const OpContext& ctx, const std::vector<TBlob>& inputs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 8U);
   BatchNormParam param = nnvm::get<BatchNormParam>(attrs.parsed);
-  int dtype = inputs[0].type_flag_;
-  mxnet::TShape shape = inputs[0].shape_;
+  int dtype            = inputs[0].type_flag_;
+  mxnet::TShape shape  = inputs[0].shape_;
 
   param.axis = mxnet::op::batchnorm::GetRealAxis(shape, param.axis);
 #if MXNET_USE_CUDNN == 1
   if (!param.use_global_stats && !param.cudnn_off) {
-    MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-      GetCuDNNOp<DType>(param).Backward(ctx, inputs, req, outputs);
-    })
+    MSHADOW_REAL_TYPE_SWITCH(
+        dtype, DType, { GetCuDNNOp<DType>(param).Backward(ctx, inputs, req, outputs); })
   } else {
     MSHADOW_REAL_TYPE_SWITCH_EX(dtype, DType, AccReal, {
       BatchNormBackward<gpu, DType, AccReal>(ctx, param, inputs, req, outputs);
@@ -1152,11 +1176,10 @@ void BatchNormGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif
 }
 
-NNVM_REGISTER_OP(BatchNorm)
-.set_attr<FCompute>("FCompute<gpu>", BatchNormCompute<gpu>);
+NNVM_REGISTER_OP(BatchNorm).set_attr<FCompute>("FCompute<gpu>", BatchNormCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_BatchNorm)
-.set_attr<FCompute>("FCompute<gpu>", BatchNormGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", BatchNormGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/concat-inl.h b/src/operator/nn/concat-inl.h
index b5505d12ca45..1163085e7f72 100644
--- a/src/operator/nn/concat-inl.h
+++ b/src/operator/nn/concat-inl.h
@@ -22,7 +22,7 @@
  * \file concat-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_CONCAT_INL_H_
 #define MXNET_OPERATOR_NN_CONCAT_INL_H_
 #include <dmlc/logging.h>
@@ -41,47 +41,45 @@ namespace mxnet {
 namespace op {
 
 namespace concat_enum {
-enum ConcatOpInputs {kData0, kData1, kData2, kData3, kData4};
-enum ConcatOpResource {kTempSpace};
-enum ConcatOpOutputs {kOut};
+enum ConcatOpInputs { kData0, kData1, kData2, kData3, kData4 };
+enum ConcatOpResource { kTempSpace };
+enum ConcatOpOutputs { kOut };
 }  // namespace concat_enum
 
 struct ConcatParam : public dmlc::Parameter<ConcatParam> {
   int num_args;
   int dim;
   DMLC_DECLARE_PARAMETER(ConcatParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs to be concated.");
-    DMLC_DECLARE_FIELD(dim).set_default(1)
-    .describe("the dimension to be concated.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs to be concated.");
+    DMLC_DECLARE_FIELD(dim).set_default(1).describe("the dimension to be concated.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_args_s, dim_s;
     num_args_s << num_args;
     dim_s << dim;
     (*dict)["num_args"] = num_args_s.str();
-    (*dict)["dim"] = dim_s.str();
+    (*dict)["dim"]      = dim_s.str();
   }
 };  // struct ConcatParam
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class ConcatOp {
  public:
-  void Init(const ConcatParam &param) {
-    this->size_ = param.num_args;
+  void Init(const ConcatParam& param) {
+    this->size_      = param.num_args;
     this->dimension_ = param.dim;
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(static_cast<int>(in_data.size()), size_);
     CHECK_EQ(out_data.size(), 1U);
-    int axis = CheckAxis(dimension_, in_data[concat_enum::kData0].ndim());
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    int axis       = CheckAxis(dimension_, in_data[concat_enum::kData0].ndim());
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     std::vector<Tensor<xpu, 3, DType> > data(size_);
     Tensor<xpu, 3, DType> out;
     size_t leading = 1, trailing = 1;
@@ -91,25 +89,26 @@ class ConcatOp {
     for (int i = axis + 1; i < out_data[concat_enum::kOut].ndim(); ++i) {
       trailing *= out_data[concat_enum::kOut].shape_[i];
     }
-    size_t mid = out_data[concat_enum::kOut].shape_[axis];
+    size_t mid      = out_data[concat_enum::kOut].shape_[axis];
     Shape<3> oshape = Shape3(leading, mid, trailing);
-    out = out_data[concat_enum::kOut].get_with_shape<xpu, 3, DType>(oshape, s);
+    out             = out_data[concat_enum::kOut].get_with_shape<xpu, 3, DType>(oshape, s);
 
     for (int i = 0; i < size_; ++i) {
       Shape<3> dshape = Shape3(leading, in_data[i].shape_[axis], trailing);
-      data[i] = in_data[i].get_with_shape<xpu, 3, DType>(dshape, s);
+      data[i]         = in_data[i].get_with_shape<xpu, 3, DType>(dshape, s);
     }
     Concatenate(data, &out, 1, req[concat_enum::kOut]);
   }
 
-  void Backward(const OpContext &ctx, const TBlob &out_grad,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad) {
+  void Backward(const OpContext& ctx,
+                const TBlob& out_grad,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_grad.size(), static_cast<size_t>(size_));
-    int axis = CheckAxis(dimension_, out_grad.ndim());
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    int axis       = CheckAxis(dimension_, out_grad.ndim());
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     std::vector<Tensor<xpu, 3, DType> > grad_in(size_);
     Tensor<xpu, 3, DType> grad;
     size_t leading = 1, trailing = 1;
@@ -119,13 +118,13 @@ class ConcatOp {
     for (int i = axis + 1; i < out_grad.ndim(); ++i) {
       trailing *= out_grad.shape_[i];
     }
-    size_t mid = out_grad.shape_[axis];
+    size_t mid      = out_grad.shape_[axis];
     Shape<3> oshape = Shape3(leading, mid, trailing);
-    grad = out_grad.get_with_shape<xpu, 3, DType>(oshape, s);
+    grad            = out_grad.get_with_shape<xpu, 3, DType>(oshape, s);
 
     for (int i = 0; i < size_; ++i) {
       Shape<3> dshape = Shape3(leading, in_grad[i].shape_[axis], trailing);
-      grad_in[i] = in_grad[i].get_with_shape<xpu, 3, DType>(dshape, s);
+      grad_in[i]      = in_grad[i].get_with_shape<xpu, 3, DType>(dshape, s);
     }
     Split(grad, &grad_in, 1, req);
   }
@@ -135,8 +134,9 @@ class ConcatOp {
   int dimension_;
 };  // class ConcatOp
 
-template<typename xpu>
-void ConcatCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void ConcatCompute(const nnvm::NodeAttrs& attrs,
+                   const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
                    const std::vector<OpReqType>& req,
                    const std::vector<TBlob>& outputs) {
@@ -148,13 +148,14 @@ void ConcatCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   });
 }
 
-template<typename xpu>
-void HStackCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void HStackCompute(const nnvm::NodeAttrs& attrs,
+                   const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
                    const std::vector<OpReqType>& req,
                    const std::vector<TBlob>& outputs) {
   ConcatParam param = nnvm::get<ConcatParam>(attrs.parsed);
-  param.dim = inputs[0].shape_.ndim() > 1 ? 1 : 0;
+  param.dim         = inputs[0].shape_.ndim() > 1 ? 1 : 0;
   std::vector<TBlob> modified_inputs(inputs.size());
   for (int i = 0; i < param.num_args; ++i) {
     if (inputs[i].shape_.ndim() == 0) {
@@ -170,25 +171,26 @@ void HStackCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   });
 }
 
-template<typename xpu>
-void DStackCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void DStackCompute(const nnvm::NodeAttrs& attrs,
+                   const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
                    const std::vector<OpReqType>& req,
                    const std::vector<TBlob>& outputs) {
   ConcatParam param = nnvm::get<ConcatParam>(attrs.parsed);
-  param.dim = 2;
+  param.dim         = 2;
   std::vector<TBlob> modified_inputs(inputs.size());
   for (int i = 0; i < param.num_args; ++i) {
     if (inputs[i].shape_.ndim() == 0) {
       modified_inputs[i] = inputs[i].reshape(TShape(3, 1));
     } else if (inputs[i].shape_.ndim() == 1) {
-      TShape t = TShape(3, 1);
-      t[1] = inputs[i].shape_[0];
+      TShape t           = TShape(3, 1);
+      t[1]               = inputs[i].shape_[0];
       modified_inputs[i] = inputs[i].reshape(t);
     } else if (inputs[i].shape_.ndim() == 2) {
-      TShape t = TShape(3, 1);
-      t[0] = inputs[i].shape_[0];
-      t[1] = inputs[i].shape_[1];
+      TShape t           = TShape(3, 1);
+      t[0]               = inputs[i].shape_[0];
+      t[1]               = inputs[i].shape_[1];
       modified_inputs[i] = inputs[i].reshape(t);
     } else {
       modified_inputs[i] = inputs[i];
@@ -201,8 +203,9 @@ void DStackCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   });
 }
 
-template<typename xpu>
-void ConcatGradCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void ConcatGradCompute(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
                        const std::vector<OpReqType>& req,
                        const std::vector<TBlob>& outputs) {
@@ -214,13 +217,14 @@ void ConcatGradCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   });
 }
 
-template<typename xpu>
-void HStackGradCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void HStackGradCompute(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
                        const std::vector<OpReqType>& req,
                        const std::vector<TBlob>& outputs) {
   ConcatParam param = nnvm::get<ConcatParam>(attrs.parsed);
-  param.dim = inputs[0].shape_.ndim() > 1 ? 1 : 0;
+  param.dim         = inputs[0].shape_.ndim() > 1 ? 1 : 0;
   std::vector<TBlob> modified_outputs(outputs.size());
   for (int i = 0; i < param.num_args; ++i) {
     if (outputs[i].shape_.ndim() == 0) {
@@ -236,25 +240,26 @@ void HStackGradCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   });
 }
 
-template<typename xpu>
-void DStackGradCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void DStackGradCompute(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
                        const std::vector<OpReqType>& req,
                        const std::vector<TBlob>& outputs) {
   ConcatParam param = nnvm::get<ConcatParam>(attrs.parsed);
-  param.dim = 2;
+  param.dim         = 2;
   std::vector<TBlob> modified_outputs(outputs.size());
   for (int i = 0; i < param.num_args; ++i) {
     if (outputs[i].shape_.ndim() == 0) {
       modified_outputs[i] = outputs[i].reshape(TShape(3, 1));
     } else if (outputs[i].shape_.ndim() == 1) {
-      TShape t  = TShape(3, 1);
-      t[1] = outputs[i].shape_[0];
+      TShape t            = TShape(3, 1);
+      t[1]                = outputs[i].shape_[0];
       modified_outputs[i] = outputs[i].reshape(t);
     } else if (outputs[i].shape_.ndim() == 2) {
-      TShape t  = TShape(3, 1);
-      t[0] = outputs[i].shape_[0];
-      t[1] = outputs[i].shape_[1];
+      TShape t            = TShape(3, 1);
+      t[0]                = outputs[i].shape_[0];
+      t[1]                = outputs[i].shape_[1];
       modified_outputs[i] = outputs[i].reshape(t);
     } else {
       modified_outputs[i] = outputs[i];
@@ -282,23 +287,28 @@ struct concat_csr_first_dim {
    * \param indptr_offset  offset for ouput ndarray row index pointer
    * \param idx_offset     offset for ouput ndarray column indices
    */
-  template<typename DType, typename RType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, const OpReqType req,
-                                  DType* out_data, const DType* in_data,
-                                  RType* out_indptr, const RType* in_indptr,
-                                  IType* out_idx, const IType* in_idx,
+  template <typename DType, typename RType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const OpReqType req,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  RType* out_indptr,
+                                  const RType* in_indptr,
+                                  IType* out_idx,
+                                  const IType* in_idx,
                                   const nnvm::dim_t indptr_offset,
                                   const nnvm::dim_t idx_offset) {
-    if (i == 0) out_indptr[0] = 0;
-    out_indptr[i+1+indptr_offset] = in_indptr[i+1] + idx_offset;
-    for (nnvm::dim_t j = in_indptr[i]; j < in_indptr[i+1]; ++j) {
-      KERNEL_ASSIGN(out_idx[j+idx_offset], req, in_idx[j]);
-      KERNEL_ASSIGN(out_data[j+idx_offset], req, in_data[j]);
+    if (i == 0)
+      out_indptr[0] = 0;
+    out_indptr[i + 1 + indptr_offset] = in_indptr[i + 1] + idx_offset;
+    for (nnvm::dim_t j = in_indptr[i]; j < in_indptr[i + 1]; ++j) {
+      KERNEL_ASSIGN(out_idx[j + idx_offset], req, in_idx[j]);
+      KERNEL_ASSIGN(out_data[j + idx_offset], req, in_data[j]);
     }
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void ConcatCSRImpl(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<NDArray>& inputs,
@@ -308,16 +318,17 @@ void ConcatCSRImpl(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   using namespace csr;
   const ConcatParam& param = nnvm::get<ConcatParam>(attrs.parsed);
-  int num_args = param.num_args;
-  int concat_dim = param.dim;
+  int num_args             = param.num_args;
+  int concat_dim           = param.dim;
   CHECK_EQ(inputs.size(), num_args);
   CHECK_EQ(outputs.size(), 1);
   int axis = CheckAxis(concat_dim, inputs[0].shape().ndim());
   CHECK_EQ(axis, 0) << "concat of csr ndarrays on axis 1 is not supported.";
-  if (req[0] == kNullOp) return;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp)
+    return;
+  Stream<xpu>* s  = ctx.get_stream<xpu>();
   nnvm::dim_t nnz = 0;
-  for (int i=0; i < num_args; i++) {
+  for (int i = 0; i < num_args; i++) {
     nnz += inputs[i].aux_shape(kIdx)[0];
   }
   const NDArray& out = outputs[0];
@@ -326,7 +337,7 @@ void ConcatCSRImpl(const nnvm::NodeAttrs& attrs,
     return;
   }
   const nnvm::dim_t num_rows = out.shape()[0];
-  out.CheckAndAllocAuxData(kIndPtr, Shape1(num_rows+1));
+  out.CheckAndAllocAuxData(kIndPtr, Shape1(num_rows + 1));
 
   MSHADOW_IDX_TYPE_SWITCH(inputs[0].aux_type(kIndPtr), RType, {
     MSHADOW_IDX_TYPE_SWITCH(inputs[0].aux_type(kIdx), IType, {
@@ -334,16 +345,25 @@ void ConcatCSRImpl(const nnvm::NodeAttrs& attrs,
         RType* out_indptr = out.aux_data(kIndPtr).dptr<RType>();
         out.CheckAndAllocAuxData(kIdx, Shape1(nnz));
         out.CheckAndAllocData(Shape1(nnz));
-        IType* out_idx = out.aux_data(kIdx).dptr<IType>();
-        DType* out_data = out.data().dptr<DType>();
+        IType* out_idx            = out.aux_data(kIdx).dptr<IType>();
+        DType* out_data           = out.data().dptr<DType>();
         nnvm::dim_t indptr_offset = 0;
-        nnvm::dim_t idx_offset = 0;
+        nnvm::dim_t idx_offset    = 0;
         for (const auto& in : inputs) {
           const RType* in_indptr = in.aux_data(kIndPtr).dptr<RType>();
-          const IType* in_idx = in.aux_data(kIdx).dptr<IType>();
-          const DType* in_data = in.data().dptr<DType>();
-          Kernel<concat_csr_first_dim, xpu>::Launch(s, in.shape()[0], req[0], out_data,
-            in_data, out_indptr, in_indptr, out_idx, in_idx, indptr_offset, idx_offset);
+          const IType* in_idx    = in.aux_data(kIdx).dptr<IType>();
+          const DType* in_data   = in.data().dptr<DType>();
+          Kernel<concat_csr_first_dim, xpu>::Launch(s,
+                                                    in.shape()[0],
+                                                    req[0],
+                                                    out_data,
+                                                    in_data,
+                                                    out_indptr,
+                                                    in_indptr,
+                                                    out_idx,
+                                                    in_idx,
+                                                    indptr_offset,
+                                                    idx_offset);
           indptr_offset += in.shape()[0];
           idx_offset += in.aux_shape(kIdx)[0];
         }
diff --git a/src/operator/nn/concat.cc b/src/operator/nn/concat.cc
index c50af8fea77d..18ad078d69e9 100644
--- a/src/operator/nn/concat.cc
+++ b/src/operator/nn/concat.cc
@@ -22,7 +22,7 @@
  * \file concat.cc
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./concat-inl.h"
 #include "./mkldnn/mkldnn_ops-inl.h"
@@ -33,19 +33,19 @@ namespace mxnet {
 namespace op {
 
 bool ConcatShape(const nnvm::NodeAttrs& attrs,
-                 mxnet::ShapeVector *in_shape,
-                 mxnet::ShapeVector *out_shape) {
+                 mxnet::ShapeVector* in_shape,
+                 mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const ConcatParam& param_ = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args));
   mxnet::TShape dshape;
-  dim_t size = 0;
+  dim_t size                = 0;
   bool has_unknown_dim_size = false;
-  int axis = -1;
+  int axis                  = -1;
   for (int i = 0; i < param_.num_args; ++i) {
     mxnet::TShape tmp = (*in_shape)[i];
     if (tmp.ndim() > 0) {
-      axis = CheckAxis(param_.dim, tmp.ndim());
+      axis                 = CheckAxis(param_.dim, tmp.ndim());
       has_unknown_dim_size = !mxnet::dim_size_is_known(tmp, axis) || has_unknown_dim_size;
       size += tmp[axis];
       tmp[axis] = -1;
@@ -55,12 +55,13 @@ bool ConcatShape(const nnvm::NodeAttrs& attrs,
 
   mxnet::TShape tmp = (*out_shape)[0];
   if (tmp.ndim() > 0) {
-    axis = CheckAxis(param_.dim, tmp.ndim());
+    axis      = CheckAxis(param_.dim, tmp.ndim());
     tmp[axis] = -1;
     shape_assign(&dshape, tmp);
   }
 
-  if (dshape.ndim() == -1) return false;
+  if (dshape.ndim() == -1)
+    return false;
   CHECK_NE(dshape.ndim(), 0) << "zero-dimensional arrays cannot be concatenated";
 
   for (int i = 0; i < param_.num_args; ++i) {
@@ -68,7 +69,8 @@ bool ConcatShape(const nnvm::NodeAttrs& attrs,
         << "Incompatible input shape: expected " << dshape << ", got " << (*in_shape)[i];
   }
 
-  if (!has_unknown_dim_size) dshape[axis] = size;
+  if (!has_unknown_dim_size)
+    dshape[axis] = size;
   CHECK(shape_assign(&(*out_shape)[0], dshape))
       << "Incompatible output shape: expected " << dshape << ", got " << (*out_shape)[0];
 
@@ -80,8 +82,8 @@ bool ConcatShape(const nnvm::NodeAttrs& attrs,
 // The first (and sometimes the second) input may be unknown on the target axis.
 // If the two inputs are unknown, they always have the same shape.
 static bool RNNParamConcatShape(const nnvm::NodeAttrs& attrs,
-                                mxnet::ShapeVector *in_shape,
-                                mxnet::ShapeVector *out_shape) {
+                                mxnet::ShapeVector* in_shape,
+                                mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const ConcatParam& param_ = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args));
@@ -106,31 +108,32 @@ static bool RNNParamConcatShape(const nnvm::NodeAttrs& attrs,
 
   mxnet::TShape tmp = (*out_shape)[0];
   if (tmp.ndim() > 0) {
-    axis = CheckAxis(param_.dim, tmp.ndim());
+    axis      = CheckAxis(param_.dim, tmp.ndim());
     tmp[axis] = -1;
     shape_assign(&dshape, tmp);
   }
 
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   for (int i = 0; i < param_.num_args; ++i) {
     CHECK(shape_assign(&(*in_shape)[i], dshape))
         << "Incompatible input shape: expected " << dshape << ", got " << (*in_shape)[i];
   }
 
-  if (zero_indices.empty()) dshape[axis] = size;
+  if (zero_indices.empty())
+    dshape[axis] = size;
   CHECK(shape_assign(&(*out_shape)[0], dshape))
       << "Incompatible output shape: expected " << dshape << ", got " << (*out_shape)[0];
   if ((*out_shape)[0][axis] != -1 && !zero_indices.empty()) {
     int residual = (*out_shape)[0][axis] - size;
-    CHECK_GE(residual, 0)
-        << "Input size already exceeds output size. Residual: " << residual;
+    CHECK_GE(residual, 0) << "Input size already exceeds output size. Residual: " << residual;
     CHECK(zero_indices.size() <= 2 && zero_indices.size() > 0)
         << "Expecting 1 or 2 inputs that need shape inference. Got: " << zero_indices.size();
     bool need_infer = !shape_is_known((*out_shape)[0]);
     for (int i : zero_indices) {
       (*in_shape)[i][axis] = residual / zero_indices.size();
-      need_infer = need_infer || !shape_is_known((*in_shape)[i]);
+      need_infer           = need_infer || !shape_is_known((*in_shape)[i]);
     }
     return !need_infer;
   }
@@ -139,21 +142,20 @@ static bool RNNParamConcatShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool ConcatType(const nnvm::NodeAttrs& attrs,
-                std::vector<int> *in_type,
-                std::vector<int> *out_type) {
+                std::vector<int>* in_type,
+                std::vector<int>* out_type) {
   const ConcatParam& param_ = nnvm::get<ConcatParam>(attrs.parsed);
-  int dtype = -1;
+  int dtype                 = -1;
 
   // checks uniformity of input
-  for (size_t i =0; i < in_type->size(); ++i) {
+  for (size_t i = 0; i < in_type->size(); ++i) {
     if (dtype == -1) {
       dtype = in_type->at(i);
     } else {
       CHECK(in_type->at(i) == dtype || in_type->at(i) == -1)
-          << "Non-uniform data type in "  << attrs.op->name
-          << ", expected data type " << mxnet::op::type_string(dtype)
-          << ", got data type " << mxnet::op::type_string(in_type->at(i))
-          << " for input " << i;
+          << "Non-uniform data type in " << attrs.op->name << ", expected data type "
+          << mxnet::op::type_string(dtype) << ", got data type "
+          << mxnet::op::type_string(in_type->at(i)) << " for input " << i;
     }
   }
 
@@ -166,18 +168,17 @@ bool ConcatType(const nnvm::NodeAttrs& attrs,
     for (size_t i = 0; i < nin; ++i) {
       in_type->push_back(dtype);
     }
-  // if out types are known in types are unknown
+    // if out types are known in types are unknown
   } else if ((*out_type)[0] != -1 && dtype == -1) {
     in_type->clear();
     for (size_t i = 0; i < nin; ++i) {
       in_type->push_back((*out_type)[0]);
     }
-  // if both out_types and in_types are known, and different
+    // if both out_types and in_types are known, and different
   } else if ((*out_type)[0] != -1 && dtype != -1 && ((*out_type)[0] != dtype)) {
     std::ostringstream os;
-    os << "Type inconsistent, Provided output type = "
-       << mxnet::op::type_string((*out_type)[0]) << ','
-       << " inferred type = " << mxnet::op::type_string(dtype);
+    os << "Type inconsistent, Provided output type = " << mxnet::op::type_string((*out_type)[0])
+       << ',' << " inferred type = " << mxnet::op::type_string(dtype);
     throw mxnet::op::InferTypeError(os.str(), 0);
   }
   return true;
@@ -186,29 +187,27 @@ bool ConcatType(const nnvm::NodeAttrs& attrs,
 inline static bool ConcatForwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                                  const int dev_mask,
                                                  DispatchMode* dispatch_mode,
-                                                 std::vector<int> *in_attrs,
-                                                 std::vector<int> *out_attrs) {
+                                                 std::vector<int>* in_attrs,
+                                                 std::vector<int>* out_attrs) {
   CHECK(!in_attrs->empty());
   CHECK_EQ(out_attrs->size(), 1U);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  auto& out_stype          = out_attrs->at(0);
+  bool dispatched          = false;
   const ConcatParam& param = nnvm::get<ConcatParam>(attrs.parsed);
-  if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kCSRStorage)
-      && param.dim == 0) {
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+  if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kCSRStorage) && param.dim == 0) {
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
 #if MXNET_USE_ONEDNN == 1
-  if (!dispatched && dev_mask == mshadow::cpu::kDevMask
-      && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)
-      && param.dim > 0) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+  if (!dispatched && dev_mask == mshadow::cpu::kDevMask &&
+      common::ContainsOnlyStorage(*in_attrs, kDefaultStorage) && param.dim > 0) {
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
 #endif  // MXNET_USE_ONEDNN == 1
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -223,15 +222,14 @@ inline static bool ConcatForwardInferStorageType(const nnvm::NodeAttrs& attrs,
 inline static bool BackwardConcatStorageType(const nnvm::NodeAttrs& attrs,
                                              const int dev_mask,
                                              DispatchMode* dispatch_mode,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
+                                             std::vector<int>* in_attrs,
+                                             std::vector<int>* out_attrs) {
   DispatchMode wanted_mode;
 #if MXNET_USE_ONEDNN == 1
   const ConcatParam& param = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(out_attrs->size(), in_attrs->size() - 1);
-  if (dev_mask == mshadow::cpu::kDevMask
-      && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)
-      && param.dim > 0)
+  if (dev_mask == mshadow::cpu::kDevMask &&
+      common::ContainsOnlyStorage(*in_attrs, kDefaultStorage) && param.dim > 0)
     wanted_mode = DispatchMode::kFComputeEx;
   else
 #endif  // MXNET_USE_ONEDNN == 1
@@ -240,19 +238,22 @@ inline static bool BackwardConcatStorageType(const nnvm::NodeAttrs& attrs,
   if (!MKLDNNEnvSet())
     wanted_mode = DispatchMode::kFComputeFallback;
 #endif  // MXNET_USE_ONEDNN == 1
-  return storage_type_assign(out_attrs, mxnet::kDefaultStorage,
-                             dispatch_mode, wanted_mode);
+  return storage_type_assign(out_attrs, mxnet::kDefaultStorage, dispatch_mode, wanted_mode);
 }
 #if MXNET_USE_ONEDNN == 1
-bool SupportMKLDNNConcat(const std::vector<NDArray> &arrs) {
-  for (auto &arr : arrs) {
-    if (arr.IsView()) return false;
-    if (!(arr.dtype() == mshadow::kFloat32 || arr.dtype() == mshadow::kBfloat16)) return false;
+bool SupportMKLDNNConcat(const std::vector<NDArray>& arrs) {
+  for (auto& arr : arrs) {
+    if (arr.IsView())
+      return false;
+    if (!(arr.dtype() == mshadow::kFloat32 || arr.dtype() == mshadow::kBfloat16))
+      return false;
     // DO not support zero-size tensors.
-    if (arr.shape().Size() == 0) return false;
-    int ndim = arr.shape().ndim();
+    if (arr.shape().Size() == 0)
+      return false;
+    int ndim               = arr.shape().ndim();
     const int mkldnn_ndims = arr.GetMKLDNNData()->get_desc().data.ndims;
-    if (!(ndim == 2 || ndim == 4) || ndim != mkldnn_ndims) return false;
+    if (!(ndim == 2 || ndim == 4) || ndim != mkldnn_ndims)
+      return false;
   }
   return true;
 }
@@ -265,7 +266,8 @@ static void ConcatComputeExCPU(const nnvm::NodeAttrs& attrs,
   CHECK(!inputs.empty());
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   if (common::ContainsOnlyStorage(inputs, kCSRStorage) &&
       outputs[0].storage_type() == kCSRStorage) {
     ConcatCSRImpl<cpu>(attrs, op_ctx, inputs, req, outputs);
@@ -299,7 +301,7 @@ static void ConcatGradComputeExCPU(const nnvm::NodeAttrs& attrs,
 #endif  // MXNET_USE_ONEDNN == 1
 
 struct ConcatGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     CHECK_EQ(ograds.size(), 1);
@@ -315,39 +317,38 @@ struct ConcatGrad {
 
 DMLC_REGISTER_PARAMETER(ConcatParam);
 
-#define CONCAT_FORWARD_ATTRS \
-.set_num_inputs([](const NodeAttrs& attrs) { \
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed); \
-  return params.num_args; \
-}) \
-.set_num_outputs(1) \
-.set_attr_parser(ParamParser<ConcatParam>) \
-.set_attr<nnvm::FListInputNames>("FListInputNames", \
-    [](const NodeAttrs& attrs) { \
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed); \
-  std::vector<std::string> ret; \
-  ret.reserve(params.num_args); \
-  for (int i = 0; i < params.num_args; ++i) { \
-    ret.push_back(std::string("arg") + std::to_string(i)); \
-  } \
-  return ret; \
-}) \
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", \
-    [](const NodeAttrs& attrs) { \
-    return std::vector<std::string>{"output"}; \
-}) \
-.set_attr<nnvm::FInferType>("FInferType", ConcatType) \
-.set_attr<FInferStorageType>("FInferStorageType", ConcatForwardInferStorageType) \
-.set_attr<FCompute>("FCompute<cpu>", ConcatCompute<cpu>) \
-.set_attr<FComputeEx>("FComputeEx<cpu>", ConcatComputeExCPU) \
-.set_attr<nnvm::FGradient>("FGradient", ConcatGrad{"_backward_Concat"}) \
-.set_attr<std::string>("key_var_num_args", "num_args")
-
+#define CONCAT_FORWARD_ATTRS                                                                      \
+  .set_num_inputs([](const NodeAttrs& attrs) {                                                    \
+    const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);                             \
+    return params.num_args;                                                                       \
+  })                                                                                              \
+      .set_num_outputs(1)                                                                         \
+      .set_attr_parser(ParamParser<ConcatParam>)                                                  \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         const ConcatParam& params =                              \
+                                             nnvm::get<ConcatParam>(attrs.parsed);                \
+                                         std::vector<std::string> ret;                            \
+                                         ret.reserve(params.num_args);                            \
+                                         for (int i = 0; i < params.num_args; ++i) {              \
+                                           ret.push_back(std::string("arg") + std::to_string(i)); \
+                                         }                                                        \
+                                         return ret;                                              \
+                                       })                                                         \
+      .set_attr<nnvm::FListOutputNames>(                                                          \
+          "FListOutputNames",                                                                     \
+          [](const NodeAttrs& attrs) { return std::vector<std::string>{"output"}; })              \
+      .set_attr<nnvm::FInferType>("FInferType", ConcatType)                                       \
+      .set_attr<FInferStorageType>("FInferStorageType", ConcatForwardInferStorageType)            \
+      .set_attr<FCompute>("FCompute<cpu>", ConcatCompute<cpu>)                                    \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", ConcatComputeExCPU)                                \
+      .set_attr<nnvm::FGradient>("FGradient", ConcatGrad{"_backward_Concat"})                     \
+      .set_attr<std::string>("key_var_num_args", "num_args")
 
 NNVM_REGISTER_OP(Concat)
 MXNET_ADD_SPARSE_OP_ALIAS(concat)
-.add_alias("concat")
-.describe(R"code(Joins input arrays along a given axis.
+    .add_alias("concat")
+    .describe(R"code(Joins input arrays along a given axis.
 
 .. note:: `Concat` is deprecated. Use `concat` instead.
 
@@ -385,59 +386,60 @@ Example::
 
 )code" ADD_FILELINE)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<bool>("TIsMKLDNN", true)
 #endif  // MXNET_USE_ONEDNN == 1
-CONCAT_FORWARD_ATTRS
-.set_attr<mxnet::FInferShape>("FInferShape", ConcatShape)
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
-.add_arguments(ConcatParam::__FIELDS__());
+        CONCAT_FORWARD_ATTRS.set_attr<mxnet::FInferShape>("FInferShape", ConcatShape)
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
+    .add_arguments(ConcatParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Concat)
-.set_num_inputs([](const NodeAttrs& attrs) {
+    .set_num_inputs([](const NodeAttrs& attrs) {
 #if MXNET_USE_ONEDNN == 1
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return 1 + params.num_args;
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return 1 + params.num_args;
 #else
-  return 1;
+      return 1;
 #endif
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr_parser(ParamParser<ConcatParam>)
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr_parser(ParamParser<ConcatParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif  // MXNET_USE_ONEDNN == 1
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", BackwardConcatStorageType)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardConcatStorageType)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ConcatGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ConcatGradComputeExCPU)
 #endif  // MXNET_USE_ONEDNN == 1
-.set_attr<FCompute>("FCompute<cpu>", ConcatGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", ConcatGradCompute<cpu>);
 
 // _rnn_param_concat is a custom concat op with specialized infer_shape,
 // which handles the case where the first one or two inputs may have
 // unknown shape that can be inferred from output shape.
 NNVM_REGISTER_OP(_rnn_param_concat)
-.add_alias("_npi_rnn_param_concat")
+    .add_alias("_npi_rnn_param_concat")
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif  // MXNET_USE_ONEDNN == 1
-CONCAT_FORWARD_ATTRS
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", RNNParamConcatShape)
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
-.add_arguments(ConcatParam::__FIELDS__());
+        CONCAT_FORWARD_ATTRS.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", RNNParamConcatShape)
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
+    .add_arguments(ConcatParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/concat.cu b/src/operator/nn/concat.cu
index 2872d527898e..574183fed19d 100644
--- a/src/operator/nn/concat.cu
+++ b/src/operator/nn/concat.cu
@@ -22,7 +22,7 @@
  * \file concat.cu
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./concat-inl.h"
 
@@ -37,7 +37,8 @@ static void ConcatComputeExGPU(const nnvm::NodeAttrs& attrs,
   CHECK(!inputs.empty());
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   if (common::ContainsOnlyStorage(inputs, kCSRStorage) &&
       outputs[0].storage_type() == kCSRStorage) {
     ConcatCSRImpl<gpu>(attrs, op_ctx, inputs, req, outputs);
@@ -47,16 +48,14 @@ static void ConcatComputeExGPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(Concat)
-.set_attr<FCompute>("FCompute<gpu>", ConcatCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", ConcatComputeExGPU);
+    .set_attr<FCompute>("FCompute<gpu>", ConcatCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", ConcatComputeExGPU);
 
 NNVM_REGISTER_OP(_rnn_param_concat)
-.set_attr<FCompute>("FCompute<gpu>", ConcatCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", ConcatComputeExGPU);
+    .set_attr<FCompute>("FCompute<gpu>", ConcatCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", ConcatComputeExGPU);
 
-NNVM_REGISTER_OP(_backward_Concat)
-.set_attr<FCompute>("FCompute<gpu>", ConcatGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_Concat).set_attr<FCompute>("FCompute<gpu>", ConcatGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/nn/convolution-inl.h b/src/operator/nn/convolution-inl.h
index 053bd5afbd3e..46ff8ca50aea 100644
--- a/src/operator/nn/convolution-inl.h
+++ b/src/operator/nn/convolution-inl.h
@@ -23,7 +23,7 @@
  * \brief
  * \ref: https://github.com/Yangqing/caffe/wiki/Convolution-in-Caffe:-a-memo
  * \author Bing Xu, Jun Wu, Da Zheng
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_CONVOLUTION_INL_H_
 #define MXNET_OPERATOR_NN_CONVOLUTION_INL_H_
 
@@ -44,16 +44,15 @@
 #include "../linalg.h"
 #include "./im2col.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace conv {
-enum ConvolutionOpInputs {kData, kWeight, kBias};
-enum ConvolutionOpOutputs {kOut};
-enum ConvolutionOpResource {kTempSpace};
-enum ConvolutionOpCudnnTune {kOff, kLimited, kFastest};
-}
+enum ConvolutionOpInputs { kData, kWeight, kBias };
+enum ConvolutionOpOutputs { kOut };
+enum ConvolutionOpResource { kTempSpace };
+enum ConvolutionOpCudnnTune { kOff, kLimited, kFastest };
+}  // namespace conv
 
 struct ConvolutionParam : public dmlc::Parameter<ConvolutionParam> {
   mxnet::TShape kernel;
@@ -69,42 +68,46 @@ struct ConvolutionParam : public dmlc::Parameter<ConvolutionParam> {
   dmlc::optional<int> layout;
   DMLC_DECLARE_PARAMETER(ConvolutionParam) {
     DMLC_DECLARE_FIELD(kernel).describe("Convolution kernel size: (w,), (h, w) or (d, h, w)");
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, 0))
-    .describe("Convolution stride: (w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(dilate).set_default(mxnet::TShape(0, 0))
-    .describe("Convolution dilate: (w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, 0))
-    .describe("Zero pad for convolution: (w,), (h, w) or (d, h, w). Defaults to no padding.");
-    DMLC_DECLARE_FIELD(num_filter).set_lower_bound(1)
-    .describe("Convolution filter(channel) number");
-    DMLC_DECLARE_FIELD(num_group).set_default(1)
-    .describe("Number of group partitions.");
-    DMLC_DECLARE_FIELD(workspace).set_default(1024).set_lower_bound(0)
-    .describe("Maximum temporary workspace allowed (MB) in convolution."
-              "This parameter has two usages. When CUDNN is not used, it determines the "
-              "effective batch size of the convolution kernel. When CUDNN is used, it controls "
-              "the maximum temporary storage used for tuning the best CUDNN kernel when "
-              "`limited_workspace` strategy is used.");
-    DMLC_DECLARE_FIELD(no_bias).set_default(false)
-    .describe("Whether to disable bias parameter.");
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "Convolution stride: (w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(dilate)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "Convolution dilate: (w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, 0))
+        .describe("Zero pad for convolution: (w,), (h, w) or (d, h, w). Defaults to no padding.");
+    DMLC_DECLARE_FIELD(num_filter)
+        .set_lower_bound(1)
+        .describe("Convolution filter(channel) number");
+    DMLC_DECLARE_FIELD(num_group).set_default(1).describe("Number of group partitions.");
+    DMLC_DECLARE_FIELD(workspace).set_default(1024).set_lower_bound(0).describe(
+        "Maximum temporary workspace allowed (MB) in convolution."
+        "This parameter has two usages. When CUDNN is not used, it determines the "
+        "effective batch size of the convolution kernel. When CUDNN is used, it controls "
+        "the maximum temporary storage used for tuning the best CUDNN kernel when "
+        "`limited_workspace` strategy is used.");
+    DMLC_DECLARE_FIELD(no_bias).set_default(false).describe("Whether to disable bias parameter.");
     DMLC_DECLARE_FIELD(cudnn_tune)
-    .add_enum("off", conv::kOff)
-    .add_enum("limited_workspace", conv::kLimited)
-    .add_enum("fastest", conv::kFastest)
-    .set_default(dmlc::optional<int>())
+        .add_enum("off", conv::kOff)
+        .add_enum("limited_workspace", conv::kLimited)
+        .add_enum("fastest", conv::kFastest)
+        .set_default(dmlc::optional<int>())
         .describe("Whether to pick convolution algo by running performance test.");
-    DMLC_DECLARE_FIELD(cudnn_off).set_default(false)
-    .describe("Turn off cudnn for this layer.");
+    DMLC_DECLARE_FIELD(cudnn_off).set_default(false).describe("Turn off cudnn for this layer.");
     DMLC_DECLARE_FIELD(layout)
-    .add_enum("NCW", mshadow::kNCW)
-    .add_enum("NCHW", mshadow::kNCHW)
-    .add_enum("NCDHW", mshadow::kNCDHW)
-    .add_enum("NHWC", mshadow::kNHWC)
-    .add_enum("NDHWC", mshadow::kNDHWC)
-    .set_default(dmlc::optional<int>())
-    .describe("Set layout for input, output and weight. Empty for\n    "
-              "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d."
-              "NHWC and NDHWC are only supported on GPU.");
+        .add_enum("NCW", mshadow::kNCW)
+        .add_enum("NCHW", mshadow::kNCHW)
+        .add_enum("NCDHW", mshadow::kNCDHW)
+        .add_enum("NHWC", mshadow::kNHWC)
+        .add_enum("NDHWC", mshadow::kNDHWC)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Set layout for input, output and weight. Empty for\n    "
+            "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d."
+            "NHWC and NDHWC are only supported on GPU.");
   }
   // Adjusts kernel size for effects of dilation in the dimension `dim`.
   index_t DilatedKernelSize(int dim) const {
@@ -112,16 +115,11 @@ struct ConvolutionParam : public dmlc::Parameter<ConvolutionParam> {
   }
 
   bool operator==(const ConvolutionParam& other) const {
-    return this->kernel == other.kernel &&
-           this->stride == other.stride &&
-           this->dilate == other.dilate &&
-           this->pad == other.pad &&
-           this->num_filter == other.num_filter &&
-           this->num_group == other.num_group &&
-           this->workspace == other.workspace &&
-           this->no_bias == other.no_bias &&
-           this->cudnn_tune == other.cudnn_tune &&
-           this->cudnn_off == other.cudnn_off &&
+    return this->kernel == other.kernel && this->stride == other.stride &&
+           this->dilate == other.dilate && this->pad == other.pad &&
+           this->num_filter == other.num_filter && this->num_group == other.num_group &&
+           this->workspace == other.workspace && this->no_bias == other.no_bias &&
+           this->cudnn_tune == other.cudnn_tune && this->cudnn_off == other.cudnn_off &&
            this->layout == other.layout;
   }
   std::string CudnnTune2String(int cudnn_tune) {
@@ -157,9 +155,8 @@ struct ConvolutionParam : public dmlc::Parameter<ConvolutionParam> {
     return "";
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream kernel_s, stride_s, dilate_s, pad_s,
-                       num_filter_s, num_group_s, workspace_s, no_bias_s,
-                       cudnn_tune_s, cudnn_off_s, layout_s;
+    std::ostringstream kernel_s, stride_s, dilate_s, pad_s, num_filter_s, num_group_s, workspace_s,
+        no_bias_s, cudnn_tune_s, cudnn_off_s, layout_s;
     kernel_s << kernel;
     stride_s << stride;
     dilate_s << dilate;
@@ -171,14 +168,14 @@ struct ConvolutionParam : public dmlc::Parameter<ConvolutionParam> {
     cudnn_tune_s << cudnn_tune;
     cudnn_off_s << cudnn_off;
     layout_s << layout;
-    (*dict)["kernel"] = kernel_s.str();
-    (*dict)["stride"] = stride_s.str();
-    (*dict)["dilate"] = dilate_s.str();
-    (*dict)["pad"] = pad_s.str();
+    (*dict)["kernel"]     = kernel_s.str();
+    (*dict)["stride"]     = stride_s.str();
+    (*dict)["dilate"]     = dilate_s.str();
+    (*dict)["pad"]        = pad_s.str();
     (*dict)["num_filter"] = num_filter_s.str();
-    (*dict)["num_group"] = num_group_s.str();
-    (*dict)["workspace"] = workspace_s.str();
-    (*dict)["no_bias"] = no_bias_s.str();
+    (*dict)["num_group"]  = num_group_s.str();
+    (*dict)["workspace"]  = workspace_s.str();
+    (*dict)["no_bias"]    = no_bias_s.str();
     if (cudnn_tune.has_value()) {
       (*dict)["cudnn_tune"] = CudnnTune2String(cudnn_tune.value());
     } else {
@@ -201,21 +198,21 @@ typedef ParamOpSign<ConvolutionParam> ConvSignature;
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::ConvolutionParam> {
   size_t operator()(const mxnet::op::ConvolutionParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.kernel);
-    ret = dmlc::HashCombine(ret, val.stride);
-    ret = dmlc::HashCombine(ret, val.dilate);
-    ret = dmlc::HashCombine(ret, val.pad);
-    ret = dmlc::HashCombine(ret, val.num_filter);
-    ret = dmlc::HashCombine(ret, val.num_group);
-    ret = dmlc::HashCombine(ret, val.workspace);
-    ret = dmlc::HashCombine(ret, val.no_bias);
-    ret = dmlc::HashCombine(ret, val.cudnn_tune);
-    ret = dmlc::HashCombine(ret, val.cudnn_off);
-    ret = dmlc::HashCombine(ret, val.layout);
+    ret        = dmlc::HashCombine(ret, val.kernel);
+    ret        = dmlc::HashCombine(ret, val.stride);
+    ret        = dmlc::HashCombine(ret, val.dilate);
+    ret        = dmlc::HashCombine(ret, val.pad);
+    ret        = dmlc::HashCombine(ret, val.num_filter);
+    ret        = dmlc::HashCombine(ret, val.num_group);
+    ret        = dmlc::HashCombine(ret, val.workspace);
+    ret        = dmlc::HashCombine(ret, val.no_bias);
+    ret        = dmlc::HashCombine(ret, val.cudnn_tune);
+    ret        = dmlc::HashCombine(ret, val.cudnn_off);
+    ret        = dmlc::HashCombine(ret, val.layout);
     return ret;
   }
 };
@@ -224,23 +221,22 @@ struct hash<mxnet::op::ConvolutionParam> {
 namespace mxnet {
 namespace op {
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class ConvolutionOp {
  public:
   void Init(ConvolutionParam p) {
     this->param_ = p;
     // convert MBytes first to Bytes and then to elements.
     param_.workspace = (param_.workspace << 20) / sizeof(DType);
-    CHECK(param_.layout.value() == mshadow::kNCW ||
-          param_.layout.value() == mshadow::kNCHW ||
+    CHECK(param_.layout.value() == mshadow::kNCW || param_.layout.value() == mshadow::kNCHW ||
           param_.layout.value() == mshadow::kNCDHW)
-      << "Only support NCW, NCHW and NCDHW layout";
+        << "Only support NCW, NCHW and NCDHW layout";
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(req[conv::kOut], kWriteTo);
@@ -255,17 +251,17 @@ class ConvolutionOp {
     index_t M = conv_out_channels_ / group_;
     index_t N = conv_out_spatial_dim_;
     index_t K = kernel_dim_;
-    Tensor<xpu, 3, DType> weight_3d = in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, M, K), s);
-    Tensor<xpu, 4, DType> output_4d = out_data[conv::kOut].get_with_shape<xpu, 4, DType>(
-      Shape4(num_, group_, M, N), s);
+    Tensor<xpu, 3, DType> weight_3d =
+        in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, M, K), s);
+    Tensor<xpu, 4, DType> output_4d =
+        out_data[conv::kOut].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, M, N), s);
 
     // no need to allocating memory and reordering in memory
     if (is_1x1_) {
-      Tensor<xpu, 4, DType> input_4d = in_data[conv::kData].get_with_shape<xpu, 4, DType>(
-        Shape4(num_, group_, K, N), s);
+      Tensor<xpu, 4, DType> input_4d =
+          in_data[conv::kData].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, K, N), s);
       for (index_t n = 0; n < num_; ++n) {
-        Tensor<xpu, 3, DType> input_3d = input_4d[n];
+        Tensor<xpu, 3, DType> input_3d  = input_4d[n];
         Tensor<xpu, 3, DType> output_3d = output_4d[n];
         for (index_t g = 0; g < group_; ++g) {
           linalg_gemm(weight_3d[g], input_3d[g], output_3d[g], false, false, s, req[conv::kOut]);
@@ -273,43 +269,50 @@ class ConvolutionOp {
       }
     } else {
       // allocate workspace for col_buffer
-      Tensor<xpu, 1, DType> workspace = ctx.requested[conv::kTempSpace]
-        .get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_), s);
+      Tensor<xpu, 1, DType> workspace =
+          ctx.requested[conv::kTempSpace].get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_),
+                                                                         s);
       // calculate the shape of col_buffer
       mxnet::TShape col_buffer_shape(num_spatial_axes_ + 1, 1);
       col_buffer_shape[0] = conv_in_channels_ * param_.kernel.Size();
       for (int i = 1; i < col_buffer_shape.ndim(); ++i) {
-        col_buffer_shape[i] = out_data[0].shape_[i+1];
+        col_buffer_shape[i] = out_data[0].shape_[i + 1];
       }
       // create a column buffer using workspace and col_buffer_shape
       TBlob col_buffer(workspace.dptr_, col_buffer_shape, xpu::kDevMask, DataType<DType>::kFlag);
-      Tensor<xpu, 3, DType> col_buffer_3d = col_buffer.get_with_shape<xpu, 3, DType>(
-        Shape3(group_, K, N), s);
+      Tensor<xpu, 3, DType> col_buffer_3d =
+          col_buffer.get_with_shape<xpu, 3, DType>(Shape3(group_, K, N), s);
       for (index_t n = 0; n < num_; ++n) {
         // transform image to col_buffer in order to use gemm
-        im2col(s, in_data[conv::kData].dptr<DType>()+n*input_dim_, in_data[conv::kData].shape_,
-               col_buffer.shape_, param_.kernel, param_.pad, param_.stride, param_.dilate,
+        im2col(s,
+               in_data[conv::kData].dptr<DType>() + n * input_dim_,
+               in_data[conv::kData].shape_,
+               col_buffer.shape_,
+               param_.kernel,
+               param_.pad,
+               param_.stride,
+               param_.dilate,
                col_buffer.dptr<DType>());
         Tensor<xpu, 3, DType> output_3d = output_4d[n];
         for (index_t g = 0; g < group_; ++g) {
           // Legacy approach shown here for comparison:
           //   Assign(output_3d[g], req[conv::kOut], dot(weight_3d[g], col_buffer_3d[g]));
-          linalg_gemm(weight_3d[g], col_buffer_3d[g], output_3d[g], false, false, s,
-            req[conv::kOut]);
+          linalg_gemm(
+              weight_3d[g], col_buffer_3d[g], output_3d[g], false, false, s, req[conv::kOut]);
         }
       }
     }
 
     if (bias_term_) {
-      Tensor<xpu, 1, DType> bias = in_data[conv::kBias].get<xpu, 1, DType>(s);
+      Tensor<xpu, 1, DType> bias      = in_data[conv::kBias].get<xpu, 1, DType>(s);
       Tensor<xpu, 3, DType> output_3d = out_data[conv::kOut].get_with_shape<xpu, 3, DType>(
-        Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
+          Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
       // has bias term, broadcast it to the same shape of output_3d in channel dim
       output_3d += mshadow::expr::broadcast<1>(bias, output_3d.shape_);
     }
   }
 
-  void Backward(const OpContext &ctx,
+  void Backward(const OpContext& ctx,
                 const std::vector<TBlob>& out_grad,
                 const std::vector<TBlob>& in_data,
                 const std::vector<OpReqType>& req,
@@ -325,30 +328,30 @@ class ConvolutionOp {
     CHECK_EQ(req.size(), expected);
     CHECK_EQ(in_data[conv::kWeight].CheckContiguous(), true);
     LayerSetUp(in_grad[conv::kData].shape_, out_grad[conv::kOut].shape_);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     // initialize weight and col_buffer 3D tensors for using gemm
     // For computing dLoss/d(in_data[kData])
     index_t M = kernel_dim_;
     index_t N = conv_out_spatial_dim_;
     index_t K = conv_out_channels_ / group_;
-    Tensor<xpu, 3, DType> weight_3d = in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, M), s);
-    Tensor<xpu, 4, DType> out_grad_4d = out_grad[conv::kOut].get_with_shape<xpu, 4, DType>(
-      Shape4(num_, group_, K, N), s);
+    Tensor<xpu, 3, DType> weight_3d =
+        in_data[conv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, K, M), s);
+    Tensor<xpu, 4, DType> out_grad_4d =
+        out_grad[conv::kOut].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, K, N), s);
     // For computing dLoss/dWeight
-    Tensor<xpu, 3, DType> dweight_3d = in_grad[conv::kWeight].get_with_shape<xpu, 3, DType>(
-      Shape3(group_, K, M), s);
+    Tensor<xpu, 3, DType> dweight_3d =
+        in_grad[conv::kWeight].get_with_shape<xpu, 3, DType>(Shape3(group_, K, M), s);
 
     // no need to allocating memory and reordering in memory
     if (is_1x1_) {
-      Tensor<xpu, 4, DType> input_4d = in_data[conv::kData].get_with_shape<xpu, 4, DType>(
-        Shape4(num_, group_, M, N), s);
-      Tensor<xpu, 4, DType> in_grad_4d = in_grad[conv::kData].get_with_shape<xpu, 4, DType>(
-        Shape4(num_, group_, M, N), s);
+      Tensor<xpu, 4, DType> input_4d =
+          in_data[conv::kData].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, M, N), s);
+      Tensor<xpu, 4, DType> in_grad_4d =
+          in_grad[conv::kData].get_with_shape<xpu, 4, DType>(Shape4(num_, group_, M, N), s);
       for (index_t n = 0; n < num_; ++n) {
-        Tensor<xpu, 3, DType> input_3d = input_4d[n];
-        Tensor<xpu, 3, DType> in_grad_3d = in_grad_4d[n];
+        Tensor<xpu, 3, DType> input_3d    = input_4d[n];
+        Tensor<xpu, 3, DType> in_grad_3d  = in_grad_4d[n];
         Tensor<xpu, 3, DType> out_grad_3d = out_grad_4d[n];
         // gradient w.r.t. input data
         for (index_t g = 0; g < group_; ++g) {
@@ -359,18 +362,19 @@ class ConvolutionOp {
       }
     } else {
       // allocate workspace for col_buffer
-      Tensor<xpu, 1, DType> workspace = ctx.requested[conv::kTempSpace]
-        .get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_), s);
+      Tensor<xpu, 1, DType> workspace =
+          ctx.requested[conv::kTempSpace].get_space_typed<xpu, 1, DType>(Shape1(col_buffer_size_),
+                                                                         s);
       // calculate the shape of col_buffer
       mxnet::TShape col_buffer_shape(num_spatial_axes_ + 1, 1);
       col_buffer_shape[0] = conv_in_channels_ * param_.kernel.Size();
       for (int i = 1; i < col_buffer_shape.ndim(); ++i) {
-        col_buffer_shape[i] = out_grad[conv::kData].shape_[i+1];
+        col_buffer_shape[i] = out_grad[conv::kData].shape_[i + 1];
       }
       // create a column buffer using workspace and col_buffer_shape
       TBlob col_buffer(workspace.dptr_, col_buffer_shape, xpu::kDevMask, DataType<DType>::kFlag);
-      Tensor<xpu, 3, DType> col_buffer_3d = col_buffer.get_with_shape<xpu, 3, DType>(
-        Shape3(group_, M, N), s);
+      Tensor<xpu, 3, DType> col_buffer_3d =
+          col_buffer.get_with_shape<xpu, 3, DType>(Shape3(group_, M, N), s);
       for (index_t n = 0; n < num_; ++n) {
         Tensor<xpu, 3, DType> out_grad_3d = out_grad_4d[n];
         // gradient w.r.t. input data
@@ -379,13 +383,26 @@ class ConvolutionOp {
           //   col_buffer_3d[g] = dot(weight_3d[g].T(), out_grad_3d[g]);
           linalg_gemm(weight_3d[g], out_grad_3d[g], col_buffer_3d[g], true, false, s);
         }
-        col2im(s, col_buffer.dptr<DType>(), in_grad[conv::kData].shape_, col_buffer.shape_,
-               param_.kernel, param_.pad, param_.stride, param_.dilate,
-               in_grad[conv::kData].dptr<DType>()+n*input_dim_, req[conv::kData]);
+        col2im(s,
+               col_buffer.dptr<DType>(),
+               in_grad[conv::kData].shape_,
+               col_buffer.shape_,
+               param_.kernel,
+               param_.pad,
+               param_.stride,
+               param_.dilate,
+               in_grad[conv::kData].dptr<DType>() + n * input_dim_,
+               req[conv::kData]);
 
         // gradient w.r.t. weight, dWeight should accumulate across the batch and group
-        im2col(s, in_data[conv::kData].dptr<DType>()+n*input_dim_, in_data[conv::kData].shape_,
-               col_buffer.shape_, param_.kernel, param_.pad, param_.stride, param_.dilate,
+        im2col(s,
+               in_data[conv::kData].dptr<DType>() + n * input_dim_,
+               in_data[conv::kData].shape_,
+               col_buffer.shape_,
+               param_.kernel,
+               param_.pad,
+               param_.stride,
+               param_.dilate,
                col_buffer.dptr<DType>());
         for (index_t g = 0; g < group_; ++g) {
           auto request = (n == 0) ? req[conv::kWeight] : kAddTo;
@@ -399,7 +416,7 @@ class ConvolutionOp {
     // gradient w.r.t bias
     if (bias_term_) {
       Tensor<xpu, 1, DType> dbias = in_grad[conv::kBias].get<xpu, 1, DType>(s);
-      Tensor<xpu, 3, DType> dout = out_grad[conv::kOut].get_with_shape<xpu, 3, DType>(
+      Tensor<xpu, 3, DType> dout  = out_grad[conv::kOut].get_with_shape<xpu, 3, DType>(
           Shape3(num_, conv_out_channels_, conv_out_spatial_dim_), s);
       ASSIGN_DISPATCH(dbias, req[conv::kBias], sumall_except_dim<1>(dout));
     }
@@ -407,50 +424,51 @@ class ConvolutionOp {
 
  private:
   void LayerSetUp(const mxnet::TShape& ishape, const mxnet::TShape& oshape) {
-    channel_axis_ = 1;  // hard code channel axis
+    channel_axis_                    = 1;  // hard code channel axis
     const index_t first_spatial_axis = channel_axis_ + 1;
-    const int num_axes = param_.kernel.ndim() + 2;
-    num_spatial_axes_ = num_axes - first_spatial_axis;
-    is_1x1_ = true;
+    const int num_axes               = param_.kernel.ndim() + 2;
+    num_spatial_axes_                = num_axes - first_spatial_axis;
+    is_1x1_                          = true;
     for (int i = 0; i < param_.kernel.ndim(); ++i) {
       is_1x1_ &= param_.kernel[i] == 1 && param_.stride[i] == 1 && param_.pad[i] == 0;
-      if (!is_1x1_) break;
+      if (!is_1x1_)
+        break;
     }
 
     // batch size
     num_ = ishape[0];
     // number of input channels
-    channels_ = ishape[1];
-    group_ = param_.num_group;
-    conv_out_channels_ = param_.num_filter;
-    conv_in_channels_ = channels_;
-    bias_term_ = !param_.no_bias;
-    kernel_dim_ = conv_in_channels_ / group_ * param_.kernel.Size();
-    weight_offset_ = conv_out_channels_ * kernel_dim_ / group_;
+    channels_             = ishape[1];
+    group_                = param_.num_group;
+    conv_out_channels_    = param_.num_filter;
+    conv_in_channels_     = channels_;
+    bias_term_            = !param_.no_bias;
+    kernel_dim_           = conv_in_channels_ / group_ * param_.kernel.Size();
+    weight_offset_        = conv_out_channels_ * kernel_dim_ / group_;
     conv_out_spatial_dim_ = oshape.ProdShape(2, oshape.ndim());
-    col_offset_ = kernel_dim_ * conv_out_spatial_dim_;
-    output_offset_ = conv_out_channels_ * conv_out_spatial_dim_ / group_;
+    col_offset_           = kernel_dim_ * conv_out_spatial_dim_;
+    output_offset_        = conv_out_channels_ * conv_out_spatial_dim_ / group_;
     // size of the column buffer used for storing im2col-ed pixels
     col_buffer_size_ = kernel_dim_ * group_ * conv_out_spatial_dim_;
     // input/output image size (#channels * height * width)
-    input_dim_ = ishape.ProdShape(1, ishape.ndim());
-    output_dim_ = oshape.ProdShape(1, oshape.ndim());
+    input_dim_          = ishape.ProdShape(1, ishape.ndim());
+    output_dim_         = oshape.ProdShape(1, oshape.ndim());
     num_kernels_im2col_ = conv_in_channels_ * conv_out_spatial_dim_;
     num_kernels_col2im_ = input_dim_;
   }
 
  private:
   ConvolutionParam param_;
-  index_t channel_axis_;  // channel axis of the input
-  index_t channels_;  // number of channels of input image
-  index_t num_spatial_axes_;  // number of spatial axes
-  index_t num_;  // batch size
-  index_t group_;  // number of groups
-  index_t conv_out_channels_;  // number of output channels (num_filter)
+  index_t channel_axis_;          // channel axis of the input
+  index_t channels_;              // number of channels of input image
+  index_t num_spatial_axes_;      // number of spatial axes
+  index_t num_;                   // batch size
+  index_t group_;                 // number of groups
+  index_t conv_out_channels_;     // number of output channels (num_filter)
   index_t conv_out_spatial_dim_;  // number of pixels of output images per channel
-  index_t conv_in_channels_;  // number of input channels
-  index_t kernel_dim_;  // number of input channels per group * kernel size
-  index_t weight_offset_;  // number of output channels per group * kernel_dim_
+  index_t conv_in_channels_;      // number of input channels
+  index_t kernel_dim_;            // number of input channels per group * kernel size
+  index_t weight_offset_;         // number of output channels per group * kernel_dim_
   index_t col_offset_;
   index_t output_offset_;
   index_t col_buffer_size_;
@@ -462,9 +480,10 @@ class ConvolutionOp {
   bool is_1x1_;
 };  // class ConvolutionOp
 
-template<typename xpu>
+template <typename xpu>
 void ConvolutionCompute(const nnvm::NodeAttrs& attrs,
-                        const OpContext& ctx, const std::vector<TBlob>& inputs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
                         const std::vector<OpReqType>& req,
                         const std::vector<TBlob>& outputs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
@@ -475,15 +494,16 @@ void ConvolutionCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void ConvolutionGradCompute(const nnvm::NodeAttrs& attrs,
-                            const OpContext& ctx, const std::vector<TBlob>& inputs,
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& outputs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
   std::vector<TBlob> in_data(inputs.begin() + 1, inputs.end());
-  const TBlob &out_grad = inputs[0];
-  const std::vector<TBlob> &in_grad = outputs;
+  const TBlob& out_grad             = inputs[0];
+  const std::vector<TBlob>& in_grad = outputs;
 
   MSHADOW_REAL_TYPE_SWITCH(out_grad.type_flag_, DType, {
     ConvolutionOp<xpu, DType> op;
diff --git a/src/operator/nn/convolution.cc b/src/operator/nn/convolution.cc
index cbfadf9b6450..1d17aaabfc92 100644
--- a/src/operator/nn/convolution.cc
+++ b/src/operator/nn/convolution.cc
@@ -22,7 +22,7 @@
  * \file convolution.cc
  * \brief
  * \author Bing Xu, Jun Wu, Da Zheng
-*/
+ */
 
 #include "./convolution-inl.h"
 #include "../elemwise_op_common.h"
@@ -81,8 +81,8 @@ static void ConvolutionGradComputeExCPU(const nnvm::NodeAttrs& attrs,
 #endif
 
 static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_shape,
-                             mxnet::ShapeVector *out_shape) {
+                             mxnet::ShapeVector* in_shape,
+                             mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const ConvolutionParam& param_ = nnvm::get<ConvolutionParam>(attrs.parsed);
   if (!param_.no_bias) {
@@ -92,18 +92,20 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
   }
   // CHECK_EQ(out_shape->size(), 1) << "Output: [output]";
   out_shape->resize(1, mxnet::TShape());
-  const mxnet::TShape &dshp = (*in_shape)[conv::kData];
-  if (!mxnet::ndim_is_known(dshp)) return false;
+  const mxnet::TShape& dshp = (*in_shape)[conv::kData];
+  if (!mxnet::ndim_is_known(dshp))
+    return false;
 
   if (param_.kernel.ndim() == 1) {
     // 1d conv
     CHECK_EQ(dshp.ndim(), 3U) << "Input data should be 3D in batch-num_filter-x";
     Shape<3> dshape = ConvertLayout(dshp.get<3>(), param_.layout.value(), kNCW);
-    CHECK_GT(param_.num_group, 0U) \
-      << "Range only supports num_group > 0, received " << param_.num_group;
-    Shape<3> wshape = Shape3(param_.num_filter / param_.num_group,
-        mxnet::dim_size_is_known(dshape, 1) ? dshape[1] / param_.num_group : -1,
-        param_.kernel[0]);
+    CHECK_GT(param_.num_group, 0U)
+        << "Range only supports num_group > 0, received " << param_.num_group;
+    Shape<3> wshape =
+        Shape3(param_.num_filter / param_.num_group,
+               mxnet::dim_size_is_known(dshape, 1) ? dshape[1] / param_.num_group : -1,
+               param_.kernel[0]);
     wshape = ConvertLayout(wshape, kNCW, param_.layout.value());
     if (wshape[0] >= 0) {
       wshape[0] *= param_.num_group;
@@ -117,30 +119,27 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
     if (dshape[1] != -1) {
       CHECK_EQ(dshape[1] % param_.num_group, 0U) << "input num_filter must divide group size";
     }
-    CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-      << "output num_filter must divide group size";
-    CHECK_GT(param_.kernel.Size(), 0U) \
-      << "incorrect kernel size: " << param_.kernel;
-    CHECK_GT(param_.stride.Size(), 0U) \
-      << "incorrect stride size: " << param_.stride;
-    CHECK_GT(param_.dilate.Size(), 0U) \
-      << "incorrect dilate size: " << param_.dilate;
+    CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+        << "output num_filter must divide group size";
+    CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+    CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+    CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
     Shape<3> oshape;
     oshape[0] = dshape[0];
     oshape[1] = param_.num_filter;
-    oshape[2] = dshape[2] != -1 ?
-      (AddPad(dshape[2], param_.pad[0]) - dilated_ksize_x) / param_.stride[0] + 1 : -1;
+    oshape[2] = dshape[2] != -1
+                    ? (AddPad(dshape[2], param_.pad[0]) - dilated_ksize_x) / param_.stride[0] + 1
+                    : -1;
     SHAPE_ASSIGN_CHECK(*out_shape, 0, ConvertLayout(oshape, kNCW, param_.layout.value()));
     // Perform incomplete shape inference. Fill in the missing values in data shape.
     // 1) We can always fill in the batch_size.
     // 2) We can back-calculate the input height/width if the corresponding stride is 1.
-    oshape = ConvertLayout((*out_shape)[0].get<3>(), param_.layout.value(), kNCW);
+    oshape    = ConvertLayout((*out_shape)[0].get<3>(), param_.layout.value(), kNCW);
     dshape[0] = oshape[0];
     if (oshape[2] != -1 && param_.stride[0] == 1) {
       dshape[2] = oshape[2] + dilated_ksize_x - 1 - 2 * param_.pad[0];
     }
-    SHAPE_ASSIGN_CHECK(*in_shape, conv::kData,
-        ConvertLayout(dshape, kNCW, param_.layout.value()));
+    SHAPE_ASSIGN_CHECK(*in_shape, conv::kData, ConvertLayout(dshape, kNCW, param_.layout.value()));
     // Check whether the kernel sizes are valid
     if (dshape[2] != -1) {
       CHECK_LE(dilated_ksize_x, AddPad(dshape[2], param_.pad[0])) << "kernel size exceed input";
@@ -148,14 +147,15 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
     return true;
   } else if (param_.kernel.ndim() == 2) {
     // 2d conv
-    CHECK_EQ(dshp.ndim(), 4U) \
-      << "Input data should be 4D in batch-num_filter-y-x";
+    CHECK_EQ(dshp.ndim(), 4U) << "Input data should be 4D in batch-num_filter-y-x";
     Shape<4> dshape = ConvertLayout(dshp.get<4>(), param_.layout.value(), kNCHW);
-    CHECK_GT(param_.num_group, 0U) \
-      << "Range only supports num_group > 0, received " << param_.num_group;
-    Shape<4> wshape = Shape4(param_.num_filter / param_.num_group,
-        mxnet::dim_size_is_known(dshape, 1) ? dshape[1] / param_.num_group : -1,
-        param_.kernel[0], param_.kernel[1]);
+    CHECK_GT(param_.num_group, 0U)
+        << "Range only supports num_group > 0, received " << param_.num_group;
+    Shape<4> wshape =
+        Shape4(param_.num_filter / param_.num_group,
+               mxnet::dim_size_is_known(dshape, 1) ? dshape[1] / param_.num_group : -1,
+               param_.kernel[0],
+               param_.kernel[1]);
     wshape = ConvertLayout(wshape, kNCHW, param_.layout.value());
     if (wshape[0] >= 0) {
       wshape[0] *= param_.num_group;
@@ -170,26 +170,25 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
     if (dshape[1] != -1) {
       CHECK_EQ(dshape[1] % param_.num_group, 0U) << "input num_filter must divide group size";
     }
-    CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-      << "output num_filter must divide group size";
-    CHECK_GT(param_.kernel.Size(), 0U) \
-      << "incorrect kernel size: " << param_.kernel;
-    CHECK_GT(param_.stride.Size(), 0U) \
-      << "incorrect stride size: " << param_.stride;
-    CHECK_GT(param_.dilate.Size(), 0U) \
-      << "incorrect dilate size: " << param_.dilate;
+    CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+        << "output num_filter must divide group size";
+    CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+    CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+    CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
     Shape<4> oshape;
     oshape[0] = dshape[0];
     oshape[1] = param_.num_filter;
-    oshape[2] = dshape[2] != -1 ?
-      (AddPad(dshape[2], param_.pad[0]) - dilated_ksize_y) / param_.stride[0] + 1 : -1;
-    oshape[3] = dshape[3] != -1 ?
-      (AddPad(dshape[3], param_.pad[1]) - dilated_ksize_x) / param_.stride[1] + 1 : -1;
+    oshape[2] = dshape[2] != -1
+                    ? (AddPad(dshape[2], param_.pad[0]) - dilated_ksize_y) / param_.stride[0] + 1
+                    : -1;
+    oshape[3] = dshape[3] != -1
+                    ? (AddPad(dshape[3], param_.pad[1]) - dilated_ksize_x) / param_.stride[1] + 1
+                    : -1;
     SHAPE_ASSIGN_CHECK(*out_shape, 0, ConvertLayout(oshape, kNCHW, param_.layout.value()));
     // Perform incomplete shape inference. Fill in the missing values in data shape.
     // 1) We can always fill in the batch_size.
     // 2) We can back-calculate the input height/width if the corresponding stride is 1.
-    oshape = ConvertLayout((*out_shape)[0].get<4>(), param_.layout.value(), kNCHW);
+    oshape    = ConvertLayout((*out_shape)[0].get<4>(), param_.layout.value(), kNCHW);
     dshape[0] = oshape[0];
     if (oshape[2] != -1 && param_.stride[0] == 1) {
       dshape[2] = oshape[2] + dilated_ksize_y - 1 - 2 * param_.pad[0];
@@ -197,8 +196,7 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
     if (oshape[3] != -1 && param_.stride[1] == 1) {
       dshape[3] = oshape[3] + dilated_ksize_x - 1 - 2 * param_.pad[1];
     }
-    SHAPE_ASSIGN_CHECK(*in_shape, conv::kData,
-        ConvertLayout(dshape, kNCHW, param_.layout.value()));
+    SHAPE_ASSIGN_CHECK(*in_shape, conv::kData, ConvertLayout(dshape, kNCHW, param_.layout.value()));
     // Check whether the kernel sizes are valid
     if (dshape[2] != -1) {
       CHECK_LE(dilated_ksize_y, AddPad(dshape[2], param_.pad[0])) << "kernel size exceed input";
@@ -209,14 +207,16 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
     return true;
   } else if (param_.kernel.ndim() == 3) {
     // 3d conv
-    CHECK_EQ(dshp.ndim(), 5U) \
-      << "Input data should be 5D in batch-num_filter-depth-y-x";
+    CHECK_EQ(dshp.ndim(), 5U) << "Input data should be 5D in batch-num_filter-depth-y-x";
     Shape<5> dshape = ConvertLayout(dshp.get<5>(), param_.layout.value(), kNCDHW);
-    CHECK_GT(param_.num_group, 0U) \
-      << "Range only supports num_group > 0, received " << param_.num_group;
-    Shape<5> wshape = Shape5(param_.num_filter / param_.num_group,
-        mxnet::dim_size_is_known(dshape, 1) ? dshape[1] / param_.num_group : -1,
-        param_.kernel[0], param_.kernel[1], param_.kernel[2]);
+    CHECK_GT(param_.num_group, 0U)
+        << "Range only supports num_group > 0, received " << param_.num_group;
+    Shape<5> wshape =
+        Shape5(param_.num_filter / param_.num_group,
+               mxnet::dim_size_is_known(dshape, 1) ? dshape[1] / param_.num_group : -1,
+               param_.kernel[0],
+               param_.kernel[1],
+               param_.kernel[2]);
     wshape = ConvertLayout(wshape, kNCDHW, param_.layout.value());
     if (wshape[0] >= 0) {
       wshape[0] *= param_.num_group;
@@ -233,27 +233,27 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
       CHECK_EQ(dshape[1] % param_.num_group, 0U) << "input num_filter must divide group size";
     }
     CHECK_EQ(param_.num_filter % param_.num_group, 0U)
-      << "output num_filter must divide group size";
-    CHECK_GT(param_.kernel.Size(), 0U) \
-      << "incorrect kernel size: " << param_.kernel;
-    CHECK_GT(param_.stride.Size(), 0U) \
-      << "incorrect stride size: " << param_.stride;
-    CHECK_GT(param_.dilate.Size(), 0U) \
-      << "incorrect dilate size: " << param_.dilate;
+        << "output num_filter must divide group size";
+    CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+    CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+    CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
     Shape<5> oshape;
     oshape[0] = dshape[0];
     oshape[1] = param_.num_filter;
-    oshape[2] = dshape[2] != -1 ?
-      (AddPad(dshape[2], param_.pad[0]) - dilated_ksize_d) / param_.stride[0] + 1 : -1;
-    oshape[3] = dshape[3] != -1 ?
-      (AddPad(dshape[3], param_.pad[1]) - dilated_ksize_y) / param_.stride[1] + 1 : -1;
-    oshape[4] = dshape[4] != -1 ?
-      (AddPad(dshape[4], param_.pad[2]) - dilated_ksize_x) / param_.stride[2] + 1 : -1;
+    oshape[2] = dshape[2] != -1
+                    ? (AddPad(dshape[2], param_.pad[0]) - dilated_ksize_d) / param_.stride[0] + 1
+                    : -1;
+    oshape[3] = dshape[3] != -1
+                    ? (AddPad(dshape[3], param_.pad[1]) - dilated_ksize_y) / param_.stride[1] + 1
+                    : -1;
+    oshape[4] = dshape[4] != -1
+                    ? (AddPad(dshape[4], param_.pad[2]) - dilated_ksize_x) / param_.stride[2] + 1
+                    : -1;
     SHAPE_ASSIGN_CHECK(*out_shape, 0, ConvertLayout(oshape, kNCDHW, param_.layout.value()));
     // Perform incomplete shape inference. Fill in the missing values in data shape.
     // 1) We can always fill in the batch_size.
     // 2) We can back-calculate the input depth/height/width if the corresponding stride is 1.
-    oshape = ConvertLayout((*out_shape)[0].get<5>(), param_.layout.value(), kNCDHW);
+    oshape    = ConvertLayout((*out_shape)[0].get<5>(), param_.layout.value(), kNCDHW);
     dshape[0] = oshape[0];
     if (oshape[2] != -1 && param_.stride[0] == 1) {
       dshape[2] = oshape[2] + dilated_ksize_d - 1 - 2 * param_.pad[0];
@@ -264,8 +264,8 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
     if (oshape[4] != -1 && param_.stride[2] == 1) {
       dshape[4] = oshape[4] + dilated_ksize_x - 1 - 2 * param_.pad[2];
     }
-    SHAPE_ASSIGN_CHECK(*in_shape, conv::kData,
-        ConvertLayout(dshape, kNCDHW, param_.layout.value()));
+    SHAPE_ASSIGN_CHECK(
+        *in_shape, conv::kData, ConvertLayout(dshape, kNCDHW, param_.layout.value()));
     // Check whether the kernel sizes are valid
     if (dshape[2] != -1) {
       CHECK_LE(dilated_ksize_d, AddPad(dshape[2], param_.pad[0])) << "kernel size exceed input";
@@ -284,7 +284,8 @@ static bool ConvolutionShape(const nnvm::NodeAttrs& attrs,
 }
 
 static bool ConvolutionType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_type, std::vector<int> *out_type) {
+                            std::vector<int>* in_type,
+                            std::vector<int>* out_type) {
   const ConvolutionParam& param_ = nnvm::get<ConvolutionParam>(attrs.parsed);
   CHECK_GE(in_type->size(), 1U);
   int dtype = (*in_type)[0];
@@ -315,27 +316,25 @@ inline static bool ConvStorageType(const nnvm::NodeAttrs& attrs,
                                    std::vector<int>* in_attrs,
                                    std::vector<int>* out_attrs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
-  uint32_t in_expected = param.no_bias ? 2 : 3;
+  uint32_t in_expected          = param.no_bias ? 2 : 3;
   CHECK_EQ(in_attrs->size(), in_expected);
   CHECK_EQ(out_attrs->size(), 1);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
 inline static bool BackwardConvStorageType(const nnvm::NodeAttrs& attrs,
                                            const int dev_mask,
                                            DispatchMode* dispatch_mode,
-                                           std::vector<int> *in_attrs,
-                                           std::vector<int> *out_attrs) {
+                                           std::vector<int>* in_attrs,
+                                           std::vector<int>* out_attrs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
-  uint32_t in_expected = param.no_bias ? 3 : 4;
-  uint32_t out_expected = param.no_bias ? 2 : 3;
+  uint32_t in_expected          = param.no_bias ? 3 : 4;
+  uint32_t out_expected         = param.no_bias ? 2 : 3;
   CHECK_EQ(in_attrs->size(), in_expected);
   CHECK_EQ(out_attrs->size(), out_expected);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 #endif
 
@@ -357,39 +356,45 @@ void ConvolutionParamParser(nnvm::NodeAttrs* attrs) {
   }
 
   if (param_.kernel.ndim() == 1) {
-    param_.layout = param_.layout? param_.layout.value() : mshadow::kNCW;
-    if (param_.stride.ndim() == 0) param_.stride = Shape1(1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape1(1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape1(0);
+    param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCW;
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape1(1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape1(1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape1(0);
   } else if (param_.kernel.ndim() == 2) {
     param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCHW;
-    if (param_.stride.ndim() == 0) param_.stride = Shape2(1, 1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape2(1, 1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape2(0, 0);
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape2(1, 1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape2(1, 1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape2(0, 0);
   } else {
     CHECK_EQ(param_.kernel.ndim(), 3U) << param_.kernel.ndim() << "D convolution not supported";
-    param_.layout = param_.layout ? param_.layout.value(): mshadow::kNCDHW;
-    if (param_.stride.ndim() == 0) param_.stride = Shape3(1, 1, 1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape3(1, 1, 1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape3(0, 0, 0);
+    param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCDHW;
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape3(1, 1, 1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape3(1, 1, 1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape3(0, 0, 0);
   }
   CHECK_EQ(param_.kernel.ndim(), param_.stride.ndim())
-    << "Stride must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while stride is "
-    << param_.stride;
+      << "Stride must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while stride is " << param_.stride;
   CHECK_EQ(param_.kernel.ndim(), param_.dilate.ndim())
-    << "Dilate must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while dilate is "
-    << param_.dilate;
+      << "Dilate must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while dilate is " << param_.dilate;
   CHECK_EQ(param_.kernel.ndim(), param_.pad.ndim())
-    << "Padding must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while padding is "
-    << param_.pad;
+      << "Padding must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while padding is " << param_.pad;
   attrs->parsed = std::move(param_);
 }
 
 struct ConvolutionGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     const ConvolutionParam& param = nnvm::get<ConvolutionParam>(n->attrs.parsed);
@@ -403,8 +408,8 @@ struct ConvolutionGrad {
 };
 
 NNVM_REGISTER_OP(Convolution)
-.add_alias("_npx_convolution")
-.describe(R"code(Compute *N*-D convolution on *(N+2)*-D input.
+    .add_alias("_npx_convolution")
+    .describe(R"code(Compute *N*-D convolution on *(N+2)*-D input.
 
 In the 2-D convolution, given input data with shape *(batch_size,
 channel, height, width)*, the output is computed by
@@ -477,66 +482,69 @@ There are other options to tune the performance.
   the performance.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
-  return params.no_bias ? 2 : 3;
-})
-.set_num_outputs(1)
-.set_attr_parser(ConvolutionParamParser)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
-  if (params.no_bias)
-    return std::vector<std::string>{"data", "weight"};
-  else
-    return std::vector<std::string>{"data", "weight", "bias"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", ConvolutionShape)
-.set_attr<nnvm::FInferType>("FInferType", ConvolutionType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
+      return params.no_bias ? 2 : 3;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ConvolutionParamParser)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const ConvolutionParam& params =
+                                           nnvm::get<ConvolutionParam>(attrs.parsed);
+                                       if (params.no_bias)
+                                         return std::vector<std::string>{"data", "weight"};
+                                       else
+                                         return std::vector<std::string>{"data", "weight", "bias"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", ConvolutionShape)
+    .set_attr<nnvm::FInferType>("FInferType", ConvolutionType)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", ConvStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", ConvStorageType)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", ConvolutionCompute<cpu>)
+    .set_attr<FCompute>("FCompute<cpu>", ConvolutionCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ConvolutionComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ConvolutionComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", ConvolutionGrad{"_backward_Convolution"})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "Input data to the ConvolutionOp.")
-.add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
-.add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
-.add_arguments(ConvolutionParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", ConvolutionGrad{"_backward_Convolution"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the ConvolutionOp.")
+    .add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
+    .add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
+    .add_arguments(ConvolutionParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Convolution)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
-  return params.no_bias ? 3 : 4;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
-  return params.no_bias ? 2 : 3;
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
+      return params.no_bias ? 3 : 4;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const ConvolutionParam& params = nnvm::get<ConvolutionParam>(attrs.parsed);
+      return params.no_bias ? 2 : 3;
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", BackwardConvStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardConvStorageType)
 #endif
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr_parser(ConvolutionParamParser)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr_parser(ConvolutionParamParser)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ConvolutionGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ConvolutionGradComputeExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", ConvolutionGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", ConvolutionGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/convolution.cu b/src/operator/nn/convolution.cu
index 053c3fb6c748..a3477d724a42 100644
--- a/src/operator/nn/convolution.cu
+++ b/src/operator/nn/convolution.cu
@@ -22,7 +22,7 @@
  * \file convolution.cu
  * \brief
  * \author Bing Xu, Jun Wu, Da Zheng
-*/
+ */
 
 #include "./convolution-inl.h"
 #include <vector>
@@ -35,7 +35,7 @@ namespace mxnet {
 namespace op {
 
 #if MXNET_USE_CUDNN == 1
-template<typename DType>
+template <typename DType>
 static CuDNNConvolutionOp<DType>& GetCuDNNConvOp(const ConvolutionParam& param,
                                                  int forward_compute_type,
                                                  int backward_compute_type,
@@ -44,25 +44,22 @@ static CuDNNConvolutionOp<DType>& GetCuDNNConvOp(const ConvolutionParam& param,
                                                  const RunContext& rctx,
                                                  bool add_to_weight) {
 #if DMLC_CXX11_THREAD_LOCAL
-  static thread_local std::unordered_map<ConvSignature,
-                                         std::shared_ptr<CuDNNConvolutionOp<DType> >,
-                                         OpHash> ops;
+  static thread_local std::
+      unordered_map<ConvSignature, std::shared_ptr<CuDNNConvolutionOp<DType>>, OpHash>
+          ops;
 #else
-  static MX_THREAD_LOCAL std::unordered_map<ConvSignature,
-                                            std::shared_ptr<CuDNNConvolutionOp<DType> >,
-                                            OpHash> ops;
+  static MX_THREAD_LOCAL
+      std::unordered_map<ConvSignature, std::shared_ptr<CuDNNConvolutionOp<DType>>, OpHash>
+          ops;
 #endif
   ConvSignature key(param);
   size_t ndim = 0;
-  for (auto &s : in_shape)
+  for (auto& s : in_shape)
     ndim += s.ndim();
-  for (auto &s : out_shape)
+  for (auto& s : out_shape)
     ndim += s.ndim();
-  key.Reserve(1 /* for forward_compute_type */ +
-              1 /* for backward_compute_type */ +
-              ndim /* for in and out shapes */ +
-              1 /* for dev_id */ +
-              1 /* for add_to_weight */);
+  key.Reserve(1 /* for forward_compute_type */ + 1 /* for backward_compute_type */ +
+              ndim /* for in and out shapes */ + 1 /* for dev_id */ + 1 /* for add_to_weight */);
 
   key.AddSign(forward_compute_type);
   key.AddSign(backward_compute_type);
@@ -74,25 +71,30 @@ static CuDNNConvolutionOp<DType>& GetCuDNNConvOp(const ConvolutionParam& param,
   auto it = ops.find(key);
   if (it == ops.end()) {
     std::shared_ptr<CuDNNConvolutionOp<DType>> op(new CuDNNConvolutionOp<DType>());
-    auto ins_ret = ops.insert(std::pair<ConvSignature, std::shared_ptr<CuDNNConvolutionOp<DType>>>(
-                              key, op));
+    auto ins_ret =
+        ops.insert(std::pair<ConvSignature, std::shared_ptr<CuDNNConvolutionOp<DType>>>(key, op));
     CHECK(ins_ret.second);
     it = ins_ret.first;
-    it->second->Init(param, forward_compute_type, backward_compute_type, in_shape,
-                     out_shape, rctx, add_to_weight);
+    it->second->Init(param,
+                     forward_compute_type,
+                     backward_compute_type,
+                     in_shape,
+                     out_shape,
+                     rctx,
+                     add_to_weight);
   }
   return *it->second;
 }
 #endif
 
-template<>
+template <>
 void ConvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
                              const std::vector<OpReqType>& req,
                              const std::vector<TBlob>& outputs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
-  int dtype = inputs[conv::kData].type_flag_;
+  int dtype                     = inputs[conv::kData].type_flag_;
 
 #if MXNET_USE_CUDNN == 1
   STATIC_ASSERT_CUDNN_VERSION_GE(7000);
@@ -104,8 +106,8 @@ void ConvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
       ConvolutionOp<gpu, DType> op;
       op.Init(param);
       op.Forward(ctx, inputs, req, outputs);
-    } else if (!CuDNNConvolutionOp<DType>::Supports(param,
-          compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
+    } else if (!CuDNNConvolutionOp<DType>::Supports(
+                   param, compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
       LOG(WARNING) << "This convolution is not supported by cudnn, MXNET convolution is applied.";
       ConvolutionOp<gpu, DType> op;
       op.Init(param);
@@ -116,19 +118,16 @@ void ConvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
       for (size_t i = 0; i < in_shape.size(); i++)
         in_shape[i] = inputs[i].shape_;
       // req[conv::kWeight] is only set for backward, so assume the typical 'write' for now.
-      auto add_to_weight = false;
-      CuDNNConvolutionOp<DType> &op = GetCuDNNConvOp<DType>(param,
-          compute_type, compute_type, in_shape, out_shape, ctx.run_ctx, add_to_weight);
+      auto add_to_weight            = false;
+      CuDNNConvolutionOp<DType>& op = GetCuDNNConvOp<DType>(
+          param, compute_type, compute_type, in_shape, out_shape, ctx.run_ctx, add_to_weight);
       op.Forward(ctx, inputs, req, outputs);
     }
   })
 #else
-  if (param.num_filter == param.num_group &&
-      param.layout.value() == mshadow::kNCHW &&
-      param.num_filter == inputs[conv::kData].shape_[1] &&
-      param.kernel.ndim() == 2 &&
-      param.dilate == mshadow::Shape2(1, 1) &&
-      dtype == mshadow::kFloat32) {
+  if (param.num_filter == param.num_group && param.layout.value() == mshadow::kNCHW &&
+      param.num_filter == inputs[conv::kData].shape_[1] && param.kernel.ndim() == 2 &&
+      param.dilate == mshadow::Shape2(1, 1) && dtype == mshadow::kFloat32) {
     mxnet::ShapeVector in_shape(inputs.size());
     mxnet::ShapeVector out_shape(1, outputs[0].shape_);
     for (size_t i = 0; i < in_shape.size(); i++)
@@ -147,7 +146,7 @@ void ConvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif  // MXNET_USE_CUDNN
 }
 
-template<>
+template <>
 void ConvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -155,9 +154,9 @@ void ConvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                  const std::vector<TBlob>& outputs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
   std::vector<TBlob> in_data(inputs.begin() + 1, inputs.end());
-  const TBlob &out_grad = inputs[0];
-  const std::vector<TBlob> &in_grad = outputs;
-  int dtype = out_grad.type_flag_;
+  const TBlob& out_grad             = inputs[0];
+  const std::vector<TBlob>& in_grad = outputs;
+  int dtype                         = out_grad.type_flag_;
 
 #if MXNET_USE_CUDNN == 1
   STATIC_ASSERT_CUDNN_VERSION_GE(7000);
@@ -169,8 +168,8 @@ void ConvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
       ConvolutionOp<gpu, DType> op;
       op.Init(param);
       op.Backward(ctx, std::vector<TBlob>{out_grad}, in_data, req, in_grad);
-    } else if (!CuDNNConvolutionOp<DType>::Supports(param,
-          compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
+    } else if (!CuDNNConvolutionOp<DType>::Supports(
+                   param, compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
       LOG(WARNING) << "This convolution is not supported by cudnn, MXNET convolution is applied.";
       ConvolutionOp<gpu, DType> op;
       op.Init(param);
@@ -181,19 +180,16 @@ void ConvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
       mxnet::ShapeVector out_shape(1, out_grad.shape_);
       for (size_t i = 0; i < in_shape.size(); i++)
         in_shape[i] = in_data[i].shape_;
-      auto add_to_weight = req[conv::kWeight] == kAddTo;
-      CuDNNConvolutionOp<DType> &op = GetCuDNNConvOp<DType>(param,
-          compute_type, compute_type, in_shape, out_shape, ctx.run_ctx, add_to_weight);
+      auto add_to_weight            = req[conv::kWeight] == kAddTo;
+      CuDNNConvolutionOp<DType>& op = GetCuDNNConvOp<DType>(
+          param, compute_type, compute_type, in_shape, out_shape, ctx.run_ctx, add_to_weight);
       op.Backward(ctx, std::vector<TBlob>{out_grad}, in_data, req, in_grad);
     }
   })
 #else
-  if (param.num_filter == param.num_group &&
-      param.layout.value() == mshadow::kNCHW &&
-      param.num_filter == in_data[conv::kData].shape_[1] &&
-      param.kernel.ndim() == 2 &&
-      param.dilate == mshadow::Shape2(1, 1) &&
-      dtype == mshadow::kFloat32) {
+  if (param.num_filter == param.num_group && param.layout.value() == mshadow::kNCHW &&
+      param.num_filter == in_data[conv::kData].shape_[1] && param.kernel.ndim() == 2 &&
+      param.dilate == mshadow::Shape2(1, 1) && dtype == mshadow::kFloat32) {
     // The first element stores out grad.
     mxnet::ShapeVector in_shape(in_data.size());
     mxnet::ShapeVector out_shape(1, out_grad.shape_);
@@ -213,12 +209,10 @@ void ConvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif  // MXNET_USE_CUDNN
 }
 
-NNVM_REGISTER_OP(Convolution)
-.set_attr<FCompute>("FCompute<gpu>", ConvolutionCompute<gpu>);
+NNVM_REGISTER_OP(Convolution).set_attr<FCompute>("FCompute<gpu>", ConvolutionCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_Convolution)
-.set_attr<FCompute>("FCompute<gpu>", ConvolutionGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ConvolutionGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/nn/ctc_loss-inl.h b/src/operator/nn/ctc_loss-inl.h
index c8d5a53eabda..78270f3d4c15 100644
--- a/src/operator/nn/ctc_loss-inl.h
+++ b/src/operator/nn/ctc_loss-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2017 by Contributors
  * \file ctc_loss-inl.h
  * \brief CTC Loss operator
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_CTC_LOSS_INL_H_
 #define MXNET_OPERATOR_NN_CTC_LOSS_INL_H_
@@ -42,18 +42,18 @@ namespace op {
 namespace ctc_loss {
 enum CTCLossOpInputs { kData, kLabel };
 enum CTCLossOpOutputs { kOut, kGrad };
-}
+}  // namespace ctc_loss
 
 template <typename T>
-inline void get_workspace_size(const std::vector<int> *label_lengths,
-                               const std::vector<int> *data_lengths,
-                               int alphabet_size, int minibatch, bool isGPU,
-                               size_t *size_bytes) {
+inline void get_workspace_size(const std::vector<int>* label_lengths,
+                               const std::vector<int>* data_lengths,
+                               int alphabet_size,
+                               int minibatch,
+                               bool isGPU,
+                               size_t* size_bytes) {
   // This is the max of all S and T for all examples in the minibatch.
-  int maxL = *std::max_element(label_lengths->data(),
-                               label_lengths->data() + minibatch);
-  int maxT = *std::max_element(data_lengths->data(),
-                               data_lengths->data() + minibatch);
+  int maxL = *std::max_element(label_lengths->data(), label_lengths->data() + minibatch);
+  int maxT = *std::max_element(data_lengths->data(), data_lengths->data() + minibatch);
 
   const int S = 2 * maxL + 1;
 
@@ -124,9 +124,9 @@ inline void get_workspace_size(const std::vector<int> *label_lengths,
 template <typename DType, typename xpu>
 inline void LabelTensorToPackedVector(mshadow::Tensor<xpu, 2, DType> labels,
                                       int padding_mask,
-                                      std::vector<int> *packed_labels,
-                                      std::vector<int> *label_lengths) {
-  int batch = labels.size(0);
+                                      std::vector<int>* packed_labels,
+                                      std::vector<int>* label_lengths) {
+  int batch          = labels.size(0);
   int max_num_labels = labels.size(1);
 
   std::vector<int> cpu_labels(max_num_labels * batch);
@@ -135,10 +135,9 @@ inline void LabelTensorToPackedVector(mshadow::Tensor<xpu, 2, DType> labels,
 
   for (int b = 0; b < batch; ++b) {
     auto start = cpu_labels.data() + b * max_num_labels;
-    auto res = std::find(start, start + max_num_labels, padding_mask);
-    int len = std::distance(start, res);
-    std::copy(start, start + len,
-              std::back_inserter(*packed_labels));
+    auto res   = std::find(start, start + max_num_labels, padding_mask);
+    int len    = std::distance(start, res);
+    std::copy(start, start + len, std::back_inserter(*packed_labels));
     label_lengths->at(b) = len;
   }
 }
@@ -149,9 +148,9 @@ inline void LabelTensorToPackedVector(mshadow::Tensor<xpu, 2, DType> labels,
 template <typename DType, typename xpu>
 inline void PackLabelByLength(mshadow::Tensor<xpu, 2, DType> labels,
                               mshadow::Tensor<xpu, 1, DType> in_label_lengths,
-                              std::vector<int> *packed_labels,
-                              std::vector<int> *label_lengths) {
-  int batch = labels.size(0);
+                              std::vector<int>* packed_labels,
+                              std::vector<int>* label_lengths) {
+  int batch          = labels.size(0);
   int max_num_labels = labels.size(1);
 
   IndexTensorToVector(in_label_lengths, label_lengths);
@@ -162,9 +161,8 @@ inline void PackLabelByLength(mshadow::Tensor<xpu, 2, DType> labels,
 
   for (int b = 0; b < batch; ++b) {
     auto start = cpu_labels.data() + b * max_num_labels;
-    int len = label_lengths->at(b);
-    std::copy(start, start + len,
-              std::back_inserter(*packed_labels));
+    int len    = label_lengths->at(b);
+    std::copy(start, start + len, std::back_inserter(*packed_labels));
   }
 }
 
@@ -173,28 +171,33 @@ struct CTCLossOpParam : public dmlc::Parameter<CTCLossOpParam> {
   bool use_label_lengths;
   int blank_label;
   DMLC_DECLARE_PARAMETER(CTCLossOpParam) {
-    DMLC_DECLARE_FIELD(use_data_lengths).set_default(false)
-      .describe("Whether the data lenghts are decided by `data_lengths`. "
-                "If false, the lengths are equal to the max sequence length.");
-    DMLC_DECLARE_FIELD(use_label_lengths).set_default(false)
-      .describe("Whether the label lenghts are decided by "
-                "`label_lengths`, or derived from `padding_mask`. "
-                "If false, the lengths are derived from the "
-                "first occurrence of the value of `padding_mask`. "
-                "The value of `padding_mask` is ``0`` when first CTC label is reserved for blank, "
-                "and ``-1`` when last label is reserved for blank. See `blank_label`.");
+    DMLC_DECLARE_FIELD(use_data_lengths)
+        .set_default(false)
+        .describe(
+            "Whether the data lenghts are decided by `data_lengths`. "
+            "If false, the lengths are equal to the max sequence length.");
+    DMLC_DECLARE_FIELD(use_label_lengths)
+        .set_default(false)
+        .describe(
+            "Whether the label lenghts are decided by "
+            "`label_lengths`, or derived from `padding_mask`. "
+            "If false, the lengths are derived from the "
+            "first occurrence of the value of `padding_mask`. "
+            "The value of `padding_mask` is ``0`` when first CTC label is reserved for blank, "
+            "and ``-1`` when last label is reserved for blank. See `blank_label`.");
     DMLC_DECLARE_FIELD(blank_label)
-      .add_enum("first", 0)
-      .add_enum("last", 1)
-      .set_default(0)
-      .describe("Set the label that is reserved for blank label."
-                "If \"first\", 0-th label is reserved, and "
-                "label values for tokens in the vocabulary are "
-                "between ``1`` and ``alphabet_size-1``, and the padding mask is ``-1``. "
-                "If \"last\", last label value ``alphabet_size-1`` "
-                "is reserved for blank label instead, "
-                "and label values for tokens in the vocabulary are "
-                "between ``0`` and ``alphabet_size-2``, and the padding mask is ``0``.");
+        .add_enum("first", 0)
+        .add_enum("last", 1)
+        .set_default(0)
+        .describe(
+            "Set the label that is reserved for blank label."
+            "If \"first\", 0-th label is reserved, and "
+            "label values for tokens in the vocabulary are "
+            "between ``1`` and ``alphabet_size-1``, and the padding mask is ``-1``. "
+            "If \"last\", last label value ``alphabet_size-1`` "
+            "is reserved for blank label instead, "
+            "and label values for tokens in the vocabulary are "
+            "between ``0`` and ``alphabet_size-2``, and the padding mask is ``0``.");
   }
 };
 
@@ -207,58 +210,58 @@ inline uint32_t CTCLossOpNumInputs(const NodeAttrs& attrs) {
   return 2U + param.use_data_lengths + param.use_label_lengths;
 }
 
-inline bool CTCLossOpShape(const nnvm::NodeAttrs &attrs,
+inline bool CTCLossOpShape(const nnvm::NodeAttrs& attrs,
                            mxnet::ShapeVector* in_attrs,
                            mxnet::ShapeVector* out_attrs) {
-    const CTCLossOpParam& param = nnvm::get<CTCLossOpParam>(attrs.parsed);
-    CHECK_EQ(in_attrs->size(), CTCLossOpNumInputs(attrs));
-    CHECK_EQ(out_attrs->size(), 2U);
-
-    const mxnet::TShape &dshape = (*in_attrs)[ctc_loss::kData];
-    const mxnet::TShape &lshape = (*in_attrs)[ctc_loss::kLabel];
-    CHECK_EQ(dshape.ndim(), 3U) << "The number of dimensions of data array must be 3.";
-    CHECK_EQ(lshape.ndim(), 2U) << "The number of dimensions of labels array must be 2.";
-    CHECK_EQ(dshape[1], lshape[0])
-        << "The batch size for the labels and data arrays must be the same.";
+  const CTCLossOpParam& param = nnvm::get<CTCLossOpParam>(attrs.parsed);
+  CHECK_EQ(in_attrs->size(), CTCLossOpNumInputs(attrs));
+  CHECK_EQ(out_attrs->size(), 2U);
 
-    if (param.use_data_lengths) {
-      int kInputLength = 2;
-      const mxnet::TShape &dlshape = (*in_attrs)[kInputLength];
-      CHECK_EQ(dlshape.ndim(), 1U) << "Data length array must be a vector.";
-      CHECK_EQ(dlshape[0], dshape[1])
-          << "The batch size for the data and data lengths must be the same.";
-    }
-    if (param.use_label_lengths) {
-      int kLabelLength = 2 + param.use_data_lengths;
-      const mxnet::TShape &llshape = (*in_attrs)[kLabelLength];
-      CHECK_EQ(llshape.ndim(), 1U) << "Label length array must be a vector.";
-      CHECK_EQ(llshape[0], lshape[0])
-          << "The batch size for the labels and label lengths must be the same.";
-    }
-    CHECK_GE(dshape[0], lshape[1]) << "The max number of labels cannot exceed "
-                                      "the maximum sequence length of the "
-                                      "data.";
-    CHECK_LT(dshape.Size(), INT32_MAX) << "ValueError: CTC Loss does not support large"
-        << " tensors where total size >= 2^31.";
-
-    mxnet::TShape oshape(1, -1);
-    oshape[0] = dshape[1];  // batch size
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);  // forward output
-    SHAPE_ASSIGN_CHECK(*out_attrs, 1, dshape);  // grad output
-    return true;
+  const mxnet::TShape& dshape = (*in_attrs)[ctc_loss::kData];
+  const mxnet::TShape& lshape = (*in_attrs)[ctc_loss::kLabel];
+  CHECK_EQ(dshape.ndim(), 3U) << "The number of dimensions of data array must be 3.";
+  CHECK_EQ(lshape.ndim(), 2U) << "The number of dimensions of labels array must be 2.";
+  CHECK_EQ(dshape[1], lshape[0])
+      << "The batch size for the labels and data arrays must be the same.";
+
+  if (param.use_data_lengths) {
+    int kInputLength             = 2;
+    const mxnet::TShape& dlshape = (*in_attrs)[kInputLength];
+    CHECK_EQ(dlshape.ndim(), 1U) << "Data length array must be a vector.";
+    CHECK_EQ(dlshape[0], dshape[1])
+        << "The batch size for the data and data lengths must be the same.";
+  }
+  if (param.use_label_lengths) {
+    int kLabelLength             = 2 + param.use_data_lengths;
+    const mxnet::TShape& llshape = (*in_attrs)[kLabelLength];
+    CHECK_EQ(llshape.ndim(), 1U) << "Label length array must be a vector.";
+    CHECK_EQ(llshape[0], lshape[0])
+        << "The batch size for the labels and label lengths must be the same.";
+  }
+  CHECK_GE(dshape[0], lshape[1]) << "The max number of labels cannot exceed "
+                                    "the maximum sequence length of the "
+                                    "data.";
+  CHECK_LT(dshape.Size(), INT32_MAX) << "ValueError: CTC Loss does not support large"
+                                     << " tensors where total size >= 2^31.";
+
+  mxnet::TShape oshape(1, -1);
+  oshape[0] = dshape[1];                      // batch size
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);  // forward output
+  SHAPE_ASSIGN_CHECK(*out_attrs, 1, dshape);  // grad output
+  return true;
 }
 
 inline bool CTCLossOpType(const nnvm::NodeAttrs& attrs,
                           std::vector<int>* in_attrs,
                           std::vector<int>* out_attrs) {
-    CHECK_GE(in_attrs->size(), 2U);
-    CHECK_EQ(out_attrs->size(), 2U);
-    int dtype = (*in_attrs)[ctc_loss::kData];
-    CHECK_NE(dtype, -1) << "Input data must have specified type";
-
-    TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));  // forward output
-    TYPE_ASSIGN_CHECK(*out_attrs, 1, in_attrs->at(0));  // grad output
-    return true;
+  CHECK_GE(in_attrs->size(), 2U);
+  CHECK_EQ(out_attrs->size(), 2U);
+  int dtype = (*in_attrs)[ctc_loss::kData];
+  CHECK_NE(dtype, -1) << "Input data must have specified type";
+
+  TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));  // forward output
+  TYPE_ASSIGN_CHECK(*out_attrs, 1, in_attrs->at(0));  // grad output
+  return true;
 }
 
 inline bool CTCLossOpStorageType(const nnvm::NodeAttrs& attrs,
@@ -269,11 +272,11 @@ inline bool CTCLossOpStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_GE(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 2U);
   const int in_stype = in_attrs->at(0);
-  bool dispatched = false;
+  bool dispatched    = false;
   if (!dispatched && in_stype == kDefaultStorage) {
     // dns -> dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -281,7 +284,6 @@ inline bool CTCLossOpStorageType(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-
 inline std::vector<std::string> CTCLossOpListInputNames(const NodeAttrs& attrs) {
   const CTCLossOpParam& param = nnvm::get<CTCLossOpParam>(attrs.parsed);
   if (param.use_data_lengths && param.use_label_lengths) {
@@ -295,7 +297,7 @@ inline std::vector<std::string> CTCLossOpListInputNames(const NodeAttrs& attrs)
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void CTCLossOpForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -309,20 +311,20 @@ void CTCLossOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
 
-  const TBlob& in_data = inputs[ctc_loss::kData];
+  const TBlob& in_data  = inputs[ctc_loss::kData];
   const TBlob& in_label = inputs[ctc_loss::kLabel];
   const TBlob& out_data = outputs[ctc_loss::kOut];
   const TBlob& out_grad = outputs[ctc_loss::kGrad];
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(inputs[ctc_loss::kLabel].type_flag_, DType, {
-    Tensor<xpu, 3, real_t> data = in_data.get<xpu, 3, real_t>(s);
+    Tensor<xpu, 3, real_t> data  = in_data.get<xpu, 3, real_t>(s);
     Tensor<xpu, 2, DType> labels = in_label.get<xpu, 2, DType>(s);
     Tensor<xpu, 1, real_t> costs = out_data.get<xpu, 1, real_t>(s);
-    Tensor<xpu, 3, real_t> grad = out_grad.get<xpu, 3, real_t>(s);
+    Tensor<xpu, 3, real_t> grad  = out_grad.get<xpu, 3, real_t>(s);
 
-    int max_seq_len = data.size(0);
-    int batch_size = data.size(1);
+    int max_seq_len   = data.size(0);
+    int batch_size    = data.size(1);
     int alphabet_size = data.size(2);
 
     // data_lengths
@@ -338,25 +340,34 @@ void CTCLossOpForward(const nnvm::NodeAttrs& attrs,
 
     if (param.use_label_lengths) {
       int kLabelLength = 2 + param.use_data_lengths;
-      PackLabelByLength(labels, inputs[kLabelLength].get<xpu, 1, DType>(s),
-                        &packed_labels, &label_lengths);
+      PackLabelByLength(
+          labels, inputs[kLabelLength].get<xpu, 1, DType>(s), &packed_labels, &label_lengths);
     } else {
-      LabelTensorToPackedVector(labels, param.blank_label == 0 ? 0 : -1,
-                                &packed_labels, &label_lengths);
+      LabelTensorToPackedVector(
+          labels, param.blank_label == 0 ? 0 : -1, &packed_labels, &label_lengths);
     }
 
     size_t size_bytes;
-    get_workspace_size<real_t>(&label_lengths, &data_lengths, alphabet_size,
-                               batch_size, data.kDevCPU ? false : true, &size_bytes);
+    get_workspace_size<real_t>(&label_lengths,
+                               &data_lengths,
+                               alphabet_size,
+                               batch_size,
+                               data.kDevCPU ? false : true,
+                               &size_bytes);
 
     // round-up so there are enough elems in memory
     size_t num_tmp_elems = (size_bytes + sizeof(real_t) - 1) / sizeof(real_t);
     Tensor<xpu, 1, real_t> workspace =
-      ctx.requested[0].get_space_typed<xpu, 1, real_t>(Shape1(num_tmp_elems), s);
-
-    compute_ctc_cost(data, costs.dptr_, grad.dptr_, packed_labels.data(),
-                     label_lengths.data(), data_lengths.data(),
-                     workspace.dptr_, req[ctc_loss::kGrad] != mxnet::kNullOp,
+        ctx.requested[0].get_space_typed<xpu, 1, real_t>(Shape1(num_tmp_elems), s);
+
+    compute_ctc_cost(data,
+                     costs.dptr_,
+                     grad.dptr_,
+                     packed_labels.data(),
+                     label_lengths.data(),
+                     data_lengths.data(),
+                     workspace.dptr_,
+                     req[ctc_loss::kGrad] != mxnet::kNullOp,
                      param.blank_label == 0 ? 0 : (alphabet_size - 1));
 
     if (param.use_data_lengths) {
@@ -364,13 +375,13 @@ void CTCLossOpForward(const nnvm::NodeAttrs& attrs,
       // for data outside of length mask. Setting to 0 to make it consistent
       // with CPU implementation.
       int kInputLength = 2;
-      mxnet_op::SequenceMask(grad, inputs[kInputLength].get<xpu, 1, real_t>(s),
-                             static_cast<real_t>(0));
+      mxnet_op::SequenceMask(
+          grad, inputs[kInputLength].get<xpu, 1, real_t>(s), static_cast<real_t>(0));
     }
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void CTCLossOpBackward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -379,16 +390,17 @@ void CTCLossOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mxnet_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_grad = outputs[0];
-  const TBlob& out_grad = inputs[0];
+  Stream<xpu>* s             = ctx.get_stream<xpu>();
+  const TBlob& in_grad       = outputs[0];
+  const TBlob& out_grad      = inputs[0];
   const TBlob& grad_computed = inputs[3];  // grad computed in the forward step
 
-  Tensor<xpu, 3, real_t> igrad_data = in_grad.get<xpu, 3, real_t>(s);
-  Tensor<xpu, 1, real_t> ograd_data = out_grad.get<xpu, 1, real_t>(s);
+  Tensor<xpu, 3, real_t> igrad_data         = in_grad.get<xpu, 3, real_t>(s);
+  Tensor<xpu, 1, real_t> ograd_data         = out_grad.get<xpu, 1, real_t>(s);
   Tensor<xpu, 3, real_t> computed_grad_data = grad_computed.get<xpu, 3, real_t>(s);
 
-  Assign(igrad_data, req[0],
+  Assign(igrad_data,
+         req[0],
          mshadow::expr::broadcast<1>(ograd_data, computed_grad_data.shape_) * computed_grad_data);
 }
 
diff --git a/src/operator/nn/ctc_loss.cc b/src/operator/nn/ctc_loss.cc
index 59f89f0576f3..d1215d0c569e 100644
--- a/src/operator/nn/ctc_loss.cc
+++ b/src/operator/nn/ctc_loss.cc
@@ -27,18 +27,21 @@
 namespace mshadow {
 template <typename DType>
 ctcStatus_t compute_ctc_cost(const Tensor<cpu, 3, DType> activations,
-                             DType *costs, DType *grads, int *labels,
-                             int *label_lengths, int *data_lengths,
-                             void *workspace, bool isTraining, int blank_label) {
-  int minibatch = static_cast<int>(activations.size(1));
+                             DType* costs,
+                             DType* grads,
+                             int* labels,
+                             int* label_lengths,
+                             int* data_lengths,
+                             void* workspace,
+                             bool isTraining,
+                             int blank_label) {
+  int minibatch     = static_cast<int>(activations.size(1));
   int alphabet_size = static_cast<int>(activations.size(2));
   mxnet_warpctc::CpuCTC<DType> ctc(alphabet_size, minibatch, workspace, blank_label);
   if (isTraining) {
-    return ctc.cost_and_grad(activations.dptr_, grads, costs, labels,
-                             label_lengths, data_lengths);
+    return ctc.cost_and_grad(activations.dptr_, grads, costs, labels, label_lengths, data_lengths);
   } else {
-    return ctc.score_forward(activations.dptr_, costs, labels, label_lengths,
-                             data_lengths);
+    return ctc.score_forward(activations.dptr_, costs, labels, label_lengths, data_lengths);
   }
 }
 }  // namespace mshadow
@@ -49,11 +52,11 @@ namespace op {
 DMLC_REGISTER_PARAMETER(CTCLossOpParam);
 
 NNVM_REGISTER_OP(CTCLoss)
-.add_alias("ctc_loss")
-.add_alias("_npx_ctc_loss")
-.add_alias("_contrib_CTCLoss")
-.add_alias("_contrib_ctc_loss")
-.describe(R"code(Connectionist Temporal Classification Loss.
+    .add_alias("ctc_loss")
+    .add_alias("_npx_ctc_loss")
+    .add_alias("_contrib_CTCLoss")
+    .add_alias("_contrib_ctc_loss")
+    .describe(R"code(Connectionist Temporal Classification Loss.
 
 .. note:: The existing alias ``contrib_CTCLoss`` is deprecated.
 
@@ -99,42 +102,44 @@ Sequence Data with Recurrent Neural Networks*, A. Graves *et al*. for more
 information on the definition and the algorithm.
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<CTCLossOpParam>)
-.set_num_inputs(CTCLossOpNumInputs)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", CTCLossOpListInputNames)
-.set_attr<nnvm::FListOutputNames>("FListOutputNAmes",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"out", "grad"};
-  })
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs) {
-    return 1;
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", CTCLossOpShape)
-.set_attr<nnvm::FInferType>("FInferType", CTCLossOpType)
-.set_attr<FInferStorageType>("FInferStorageType", CTCLossOpStorageType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", CTCLossOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_ctc_loss"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("label", "NDArray-or-Symbol", "Ground-truth labels for the loss.")
-.add_argument("data_lengths", "NDArray-or-Symbol",
-              "Lengths of data for each of the samples. Only required "
-              "when use_data_lengths is true.")
-.add_argument("label_lengths", "NDArray-or-Symbol",
-              "Lengths of labels for each of the samples. Only required "
-              "when use_label_lengths is true.")
-.add_arguments(CTCLossOpParam::__FIELDS__());
+    .set_attr_parser(ParamParser<CTCLossOpParam>)
+    .set_num_inputs(CTCLossOpNumInputs)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames", CTCLossOpListInputNames)
+    .set_attr<nnvm::FListOutputNames>("FListOutputNAmes",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"out", "grad"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<mxnet::FInferShape>("FInferShape", CTCLossOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", CTCLossOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", CTCLossOpStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", CTCLossOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_ctc_loss"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("label", "NDArray-or-Symbol", "Ground-truth labels for the loss.")
+    .add_argument("data_lengths",
+                  "NDArray-or-Symbol",
+                  "Lengths of data for each of the samples. Only required "
+                  "when use_data_lengths is true.")
+    .add_argument("label_lengths",
+                  "NDArray-or-Symbol",
+                  "Lengths of labels for each of the samples. Only required "
+                  "when use_label_lengths is true.")
+    .add_arguments(CTCLossOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_ctc_loss)
-.set_attr_parser(ParamParser<CTCLossOpParam>)
-.set_num_inputs(4)
-.set_num_outputs(CTCLossOpNumInputs)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", CTCLossOpBackward<cpu>);
+    .set_attr_parser(ParamParser<CTCLossOpParam>)
+    .set_num_inputs(4)
+    .set_num_outputs(CTCLossOpNumInputs)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", CTCLossOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/ctc_loss.cu b/src/operator/nn/ctc_loss.cu
index c6952d33c86a..d045f244ad97 100644
--- a/src/operator/nn/ctc_loss.cu
+++ b/src/operator/nn/ctc_loss.cu
@@ -30,19 +30,22 @@ namespace mshadow {
 
 template <typename DType>
 ctcStatus_t compute_ctc_cost(const Tensor<gpu, 3, DType> activations,
-                             DType *costs, DType *grads, int *labels,
-                             int *label_lengths, int *input_lengths,
-                             void *workspace, int train, int blank_label) {
-  int minibatch = static_cast<int>(activations.size(1));
+                             DType* costs,
+                             DType* grads,
+                             int* labels,
+                             int* label_lengths,
+                             int* input_lengths,
+                             void* workspace,
+                             int train,
+                             int blank_label) {
+  int minibatch     = static_cast<int>(activations.size(1));
   int alphabet_size = static_cast<int>(activations.size(2));
-  mxnet_warpctc::GpuCTC<DType> ctc(alphabet_size, minibatch, workspace,
-                    activations.stream_->stream_, blank_label);
+  mxnet_warpctc::GpuCTC<DType> ctc(
+      alphabet_size, minibatch, workspace, activations.stream_->stream_, blank_label);
   if (train)
-    return ctc.cost_and_grad(activations.dptr_, grads, costs, labels,
-                             label_lengths, input_lengths);
+    return ctc.cost_and_grad(activations.dptr_, grads, costs, labels, label_lengths, input_lengths);
   else
-    return ctc.score_forward(activations.dptr_, costs, labels,
-                             label_lengths, input_lengths);
+    return ctc.score_forward(activations.dptr_, costs, labels, label_lengths, input_lengths);
 }
 }  // namespace mshadow
 
@@ -50,14 +53,13 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(CTCLoss)
-.add_alias("ctc_loss")
-.add_alias("_npx_ctc_loss")
-.add_alias("_contrib_ctc_loss")
-.add_alias("_contrib_CTCLoss")
-.set_attr<FCompute>("FCompute<gpu>", CTCLossOpForward<gpu>);
-
-NNVM_REGISTER_OP(_backward_ctc_loss)
-.set_attr<FCompute>("FCompute<gpu>", CTCLossOpBackward<gpu>);
+    .add_alias("ctc_loss")
+    .add_alias("_npx_ctc_loss")
+    .add_alias("_contrib_ctc_loss")
+    .add_alias("_contrib_CTCLoss")
+    .set_attr<FCompute>("FCompute<gpu>", CTCLossOpForward<gpu>);
+
+NNVM_REGISTER_OP(_backward_ctc_loss).set_attr<FCompute>("FCompute<gpu>", CTCLossOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/cudnn/cudnn_activation-inl.h b/src/operator/nn/cudnn/cudnn_activation-inl.h
index 5ad0da3d5dea..747a850942a3 100644
--- a/src/operator/nn/cudnn/cudnn_activation-inl.h
+++ b/src/operator/nn/cudnn/cudnn_activation-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_activation-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_CUDNN_CUDNN_ACTIVATION_INL_H_
 #define MXNET_OPERATOR_NN_CUDNN_CUDNN_ACTIVATION_INL_H_
@@ -33,19 +33,19 @@
 
 namespace mxnet {
 namespace op {
-template<typename DType>
+template <typename DType>
 class CuDNNActivationOp {
   STATIC_ASSERT_CUDNN_VERSION_GE(5000);
 
  public:
   CuDNNActivationOp() {
-    dtype_ = mshadow::DataType<DType>::kCudnnFlag;
+    dtype_    = mshadow::DataType<DType>::kCudnnFlag;
     nan_prop_ = CUDNN_NOT_PROPAGATE_NAN;
     CUDNN_CALL(cudnnCreateActivationDescriptor(&desc_));
     CUDNN_CALL(cudnnCreateTensorDescriptor(&shape_desc_));
   }
 
-  void Init(const ActivationParam &param) {
+  void Init(const ActivationParam& param) {
     param_ = param;
     switch (param_.act_type) {
       case activation::kReLU:
@@ -69,18 +69,19 @@ class CuDNNActivationOp {
     CUDNN_CALL(cudnnDestroyActivationDescriptor(desc_));
   }
 
-  void Forward(const OpContext &ctx, const TBlob &in_data,
-      const OpReqType &req, const TBlob &out_data) {
+  void Forward(const OpContext& ctx,
+               const TBlob& in_data,
+               const OpReqType& req,
+               const TBlob& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     Tensor<gpu, 4, DType> data;
     Tensor<gpu, 4, DType> out;
     if (in_data.ndim() == 2) {
-      Shape<4> dshape = Shape4(in_data.shape_[0],
-                               in_data.shape_[1], 1, 1);
-      data = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
-      out = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      Shape<4> dshape = Shape4(in_data.shape_[0], in_data.shape_[1], 1, 1);
+      data            = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      out             = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
     } else {
       Shape<4> dshape;
       index_t size_left = in_data.Size();
@@ -93,11 +94,11 @@ class CuDNNActivationOp {
         size_left /= dshape[i];
       }
       dshape[3] = size_left;
-      data = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
-      out = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      data      = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      out       = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
     }
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType beta  = 0.0f;
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     CUDNN_CALL(cudnnSetTensor4dDescriptor(shape_desc_,
                                           CUDNN_TENSOR_NCHW,
@@ -106,38 +107,34 @@ class CuDNNActivationOp {
                                           data.shape_[1],
                                           data.shape_[2],
                                           data.shape_[3]));
-    CUDNN_CALL(cudnnActivationForward(s->dnn_handle_,
-                                     desc_,
-                                     &alpha,
-                                     shape_desc_,
-                                     data.dptr_,
-                                     &beta,
-                                     shape_desc_,
-                                     out.dptr_));
+    CUDNN_CALL(cudnnActivationForward(
+        s->dnn_handle_, desc_, &alpha, shape_desc_, data.dptr_, &beta, shape_desc_, out.dptr_));
   }
 
   // backward computation for cudnn activation operator. Note that for relu
   // it's okay to pass "out_data" as "in_data", since it doesn't make any
   // difference in terms of computing the gradient of relu.
-  void Backward(const OpContext &ctx, const TBlob &out_grad,
-      const TBlob &in_data, const TBlob &out_data,
-      const OpReqType &req, const TBlob &in_grad) {
+  void Backward(const OpContext& ctx,
+                const TBlob& out_grad,
+                const TBlob& in_data,
+                const TBlob& out_data,
+                const OpReqType& req,
+                const TBlob& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    typename DataType<DType>::ScaleType beta  = 0.0f;
+    Stream<gpu>* s                            = ctx.get_stream<gpu>();
     Tensor<gpu, 4, DType> grad;
     Tensor<gpu, 4, DType> data;
     Tensor<gpu, 4, DType> output_data;
     Tensor<gpu, 4, DType> input_grad;
     if (in_grad.ndim() == 2) {
-      Shape<4> dshape = Shape4(in_grad.shape_[0],
-                               in_grad.shape_[1], 1, 1);
-      data = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
-      grad = out_grad.get_with_shape<gpu, 4, DType>(dshape, s);
-      output_data = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
-      input_grad = in_grad.get_with_shape<gpu, 4, DType>(dshape, s);
+      Shape<4> dshape = Shape4(in_grad.shape_[0], in_grad.shape_[1], 1, 1);
+      data            = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      grad            = out_grad.get_with_shape<gpu, 4, DType>(dshape, s);
+      output_data     = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      input_grad      = in_grad.get_with_shape<gpu, 4, DType>(dshape, s);
     } else {
       Shape<4> dshape;
       index_t size_left = in_grad.Size();
@@ -149,11 +146,11 @@ class CuDNNActivationOp {
         }
         size_left /= dshape[i];
       }
-      dshape[3] = size_left;
-      data = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
+      dshape[3]   = size_left;
+      data        = in_data.get_with_shape<gpu, 4, DType>(dshape, s);
       output_data = out_data.get_with_shape<gpu, 4, DType>(dshape, s);
-      grad = out_grad.get_with_shape<gpu, 4, DType>(dshape, s);
-      input_grad = in_grad.get_with_shape<gpu, 4, DType>(dshape, s);
+      grad        = out_grad.get_with_shape<gpu, 4, DType>(dshape, s);
+      input_grad  = in_grad.get_with_shape<gpu, 4, DType>(dshape, s);
     }
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     CUDNN_CALL(cudnnSetTensor4dDescriptor(shape_desc_,
diff --git a/src/operator/nn/cudnn/cudnn_algoreg-inl.h b/src/operator/nn/cudnn/cudnn_algoreg-inl.h
index 00939cfd8679..d730fbb52fcd 100644
--- a/src/operator/nn/cudnn/cudnn_algoreg-inl.h
+++ b/src/operator/nn/cudnn/cudnn_algoreg-inl.h
@@ -47,45 +47,55 @@ class CuDNNAlgo {
   STATIC_ASSERT_CUDNN_VERSION_GE(7000);
 
  public:
-  CuDNNAlgo() :
-      algo_number_(static_cast<CuDNNAlgoType>(0)),
-      is_tensor_core_algo_(false) { }
+  CuDNNAlgo() : algo_number_(static_cast<CuDNNAlgoType>(0)), is_tensor_core_algo_(false) {}
   void Set(CuDNNAlgoType algo, bool is_tensor_core) {
-    algo_number_ = algo;
+    algo_number_         = algo;
     is_tensor_core_algo_ = is_tensor_core;
   }
-  CuDNNAlgoType AlgoNumber() const { return algo_number_; }
-  bool IsTensorCoreAlgo() const { return is_tensor_core_algo_; }
+  CuDNNAlgoType AlgoNumber() const {
+    return algo_number_;
+  }
+  bool IsTensorCoreAlgo() const {
+    return is_tensor_core_algo_;
+  }
   cudnnMathType_t MathType() {
     return IsTensorCoreAlgo() ? CUDNN_TENSOR_OP_MATH : CUDNN_DEFAULT_MATH;
   }
+
  private:
   CuDNNAlgoType algo_number_;
   bool is_tensor_core_algo_;
 };
 
-template<typename ParamType>
+template <typename ParamType>
 class CuDNNAlgoReg {
  public:
-  using AlgoSetter_t = std::function<void(CuDNNAlgo<cudnnConvolutionFwdAlgo_t> *,
-                            CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t> *,
-                            CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t> *)>;
-
-  void FindOrElseRegister(const ParamType &param,
-            const mxnet::ShapeVector &in_shape,
-            const mxnet::ShapeVector &out_shape,
-            cudnnDataType_t cudnn_data_type,
-            cudnnDataType_t cudnn_forward_compute_type,
-            cudnnDataType_t cudnn_backward_compute_type,
-            int sm_arch,
-            bool add_to_weight,
-            CuDNNAlgo<cudnnConvolutionFwdAlgo_t> *fwd,
-            CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t> *bwd,
-            CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t> *flt,
-            const AlgoSetter_t &algo_setter) {
+  using AlgoSetter_t = std::function<void(CuDNNAlgo<cudnnConvolutionFwdAlgo_t>*,
+                                          CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t>*,
+                                          CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t>*)>;
+
+  void FindOrElseRegister(const ParamType& param,
+                          const mxnet::ShapeVector& in_shape,
+                          const mxnet::ShapeVector& out_shape,
+                          cudnnDataType_t cudnn_data_type,
+                          cudnnDataType_t cudnn_forward_compute_type,
+                          cudnnDataType_t cudnn_backward_compute_type,
+                          int sm_arch,
+                          bool add_to_weight,
+                          CuDNNAlgo<cudnnConvolutionFwdAlgo_t>* fwd,
+                          CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t>* bwd,
+                          CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t>* flt,
+                          const AlgoSetter_t& algo_setter) {
     CHECK(in_shape.size() == 2 || in_shape.size() == 3);
-    ParamKey key{param, in_shape[0], in_shape[1], out_shape[0], cudnn_data_type,
-                 cudnn_forward_compute_type, cudnn_backward_compute_type, sm_arch, add_to_weight};
+    ParamKey key{param,
+                 in_shape[0],
+                 in_shape[1],
+                 out_shape[0],
+                 cudnn_data_type,
+                 cudnn_forward_compute_type,
+                 cudnn_backward_compute_type,
+                 sm_arch,
+                 add_to_weight};
     std::lock_guard<std::mutex> guard(lock_);
     auto i = reg_.find(key);
     if (i != reg_.end()) {
@@ -95,16 +105,15 @@ class CuDNNAlgoReg {
     } else {
       if (param.cudnn_tune.value() && reg_.size() % 50 == 0) {
         LOG(INFO) << "Running performance tests to find the best convolution "
-            "algorithm, "
-            "this can take a while... (set the environment variable "
-            "MXNET_CUDNN_AUTOTUNE_DEFAULT to 0 to disable)";
+                     "algorithm, "
+                     "this can take a while... (set the environment variable "
+                     "MXNET_CUDNN_AUTOTUNE_DEFAULT to 0 to disable)";
         if (reg_.size() >= 1000) {
           // Many people are very concerned about this warning, so change the warning once.
           if (!is_warning_autotune_) {
-            LOG(INFO)
-                << "If you see this message in the middle of training, you are "
-                    "probably using bucketing. Consider setting env variable "
-                    "MXNET_CUDNN_AUTOTUNE_DEFAULT to 0 to disable cudnn tuning.";
+            LOG(INFO) << "If you see this message in the middle of training, you are "
+                         "probably using bucketing. Consider setting env variable "
+                         "MXNET_CUDNN_AUTOTUNE_DEFAULT to 0 to disable cudnn tuning.";
             is_warning_autotune_ = true;
           }
         }
@@ -116,7 +125,7 @@ class CuDNNAlgoReg {
     }
   }
 
-  static CuDNNAlgoReg *Get();
+  static CuDNNAlgoReg* Get();
 
  private:
   struct CudnnAlgorithms {
@@ -135,15 +144,12 @@ class CuDNNAlgoReg {
     bool add_to_weight;
 
     bool operator==(const ParamKey& other) const {
-      return this->param == other.param &&
-             this->data_shape == other.data_shape &&
-             this->weight_shape == other.weight_shape &&
-             this->out_shape == other.out_shape &&
+      return this->param == other.param && this->data_shape == other.data_shape &&
+             this->weight_shape == other.weight_shape && this->out_shape == other.out_shape &&
              this->cudnn_data_type == other.cudnn_data_type &&
              this->cudnn_forward_compute_type == other.cudnn_forward_compute_type &&
              this->cudnn_backward_compute_type == other.cudnn_backward_compute_type &&
-             this->sm_arch == other.sm_arch &&
-             this->add_to_weight == other.add_to_weight;
+             this->sm_arch == other.sm_arch && this->add_to_weight == other.add_to_weight;
     }
   };
 
@@ -151,14 +157,14 @@ class CuDNNAlgoReg {
     size_t operator()(const ParamKey& key) const {
       std::hash<ParamType> hash_param;
       size_t ret = hash_param(key.param);
-      ret = dmlc::HashCombine(ret, key.data_shape);
-      ret = dmlc::HashCombine(ret, key.weight_shape);
-      ret = dmlc::HashCombine(ret, key.out_shape);
-      ret = dmlc::HashCombine(ret, static_cast<int>(key.cudnn_data_type));
-      ret = dmlc::HashCombine(ret, static_cast<int>(key.cudnn_forward_compute_type));
-      ret = dmlc::HashCombine(ret, static_cast<int>(key.cudnn_backward_compute_type));
-      ret = dmlc::HashCombine(ret, key.sm_arch);
-      ret = dmlc::HashCombine(ret, key.add_to_weight);
+      ret        = dmlc::HashCombine(ret, key.data_shape);
+      ret        = dmlc::HashCombine(ret, key.weight_shape);
+      ret        = dmlc::HashCombine(ret, key.out_shape);
+      ret        = dmlc::HashCombine(ret, static_cast<int>(key.cudnn_data_type));
+      ret        = dmlc::HashCombine(ret, static_cast<int>(key.cudnn_forward_compute_type));
+      ret        = dmlc::HashCombine(ret, static_cast<int>(key.cudnn_backward_compute_type));
+      ret        = dmlc::HashCombine(ret, key.sm_arch);
+      ret        = dmlc::HashCombine(ret, key.add_to_weight);
       return ret;
     }
   };
diff --git a/src/operator/nn/cudnn/cudnn_algoreg.cc b/src/operator/nn/cudnn/cudnn_algoreg.cc
index 26b3484eb3c5..2fc0c287a43b 100644
--- a/src/operator/nn/cudnn/cudnn_algoreg.cc
+++ b/src/operator/nn/cudnn/cudnn_algoreg.cc
@@ -22,7 +22,7 @@
  * \file cudnn_algoreg.cc
  * \brief
  * \author Junyuan Xie
-*/
+ */
 #include "./cudnn_algoreg-inl.h"
 #include <mxnet/base.h>
 #include <mxnet/ndarray.h>
@@ -33,14 +33,14 @@
 namespace mxnet {
 namespace op {
 #if MXNET_USE_CUDNN == 1
-template<>
-CuDNNAlgoReg<ConvolutionParam> *CuDNNAlgoReg<ConvolutionParam>::Get() {
+template <>
+CuDNNAlgoReg<ConvolutionParam>* CuDNNAlgoReg<ConvolutionParam>::Get() {
   static CuDNNAlgoReg<ConvolutionParam> inst;
   return &inst;
 }
 
-template<>
-CuDNNAlgoReg<DeconvolutionParam> *CuDNNAlgoReg<DeconvolutionParam>::Get() {
+template <>
+CuDNNAlgoReg<DeconvolutionParam>* CuDNNAlgoReg<DeconvolutionParam>::Get() {
   static CuDNNAlgoReg<DeconvolutionParam> inst;
   return &inst;
 }
diff --git a/src/operator/nn/cudnn/cudnn_batch_norm-inl.h b/src/operator/nn/cudnn/cudnn_batch_norm-inl.h
index 340c2f3494f2..499980530d51 100644
--- a/src/operator/nn/cudnn/cudnn_batch_norm-inl.h
+++ b/src/operator/nn/cudnn/cudnn_batch_norm-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_batch_norm-inl.h
  * \brief
  * \author Junyuan Xie
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_CUDNN_CUDNN_BATCH_NORM_INL_H_
 #define MXNET_OPERATOR_NN_CUDNN_CUDNN_BATCH_NORM_INL_H_
@@ -36,13 +36,13 @@ namespace mxnet {
 namespace op {
 #if MXNET_USE_CUDNN == 1
 namespace cudnnbatchnorm {
-enum CuDNNBatchNormOpInputs {kData, kGamma, kBeta};
-enum CuDNNBatchNormOpOutputs {kOut, kMean, kInvVar};
-enum CuDNNBatchNormOpAuxiliary {kMovingMean, kMovingInvVar};
+enum CuDNNBatchNormOpInputs { kData, kGamma, kBeta };
+enum CuDNNBatchNormOpOutputs { kOut, kMean, kInvVar };
+enum CuDNNBatchNormOpAuxiliary { kMovingMean, kMovingInvVar };
 }  // namespace cudnnbatchnorm
 
 #if defined(__CUDACC__)
-template<typename DType>
+template <typename DType>
 class CuDNNBatchNormOp {
   STATIC_ASSERT_CUDNN_VERSION_GE(5000);
 
@@ -58,9 +58,9 @@ class CuDNNBatchNormOp {
     internal_aux_states_lock_ = false;
   }
 
-  void Init(const BatchNormParam &param) {
+  void Init(const BatchNormParam& param) {
     CHECK_GE(param.eps, CUDNN_BN_MIN_EPSILON)
-     << "CuDNN requires eps to be no less than " << CUDNN_BN_MIN_EPSILON;
+        << "CuDNN requires eps to be no less than " << CUDNN_BN_MIN_EPSILON;
     this->param_ = param;
   }
 
@@ -69,11 +69,11 @@ class CuDNNBatchNormOp {
     CUDNN_CALL(cudnnDestroyTensorDescriptor(mean_desc_));
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data,
-               const std::vector<TBlob> &aux_states) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 3U);
@@ -89,12 +89,12 @@ class CuDNNBatchNormOp {
     CHECK_GE(in_data[cudnnbatchnorm::kData].ndim(), 2);
 
     Init(in_data[cudnnbatchnorm::kData]);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     Tensor<gpu, 4, DType> x =
-      in_data[cudnnbatchnorm::kData].get_with_shape<gpu, 4, DType>(shape_, s);
+        in_data[cudnnbatchnorm::kData].get_with_shape<gpu, 4, DType>(shape_, s);
 
     Tensor<gpu, 4, DType> y =
-      out_data[cudnnbatchnorm::kOut].get_with_shape<gpu, 4, DType>(shape_, s);
+        out_data[cudnnbatchnorm::kOut].get_with_shape<gpu, 4, DType>(shape_, s);
 #if CUDNN_VERSION >= 7002
     auto mode = CUDNN_BATCHNORM_SPATIAL_PERSISTENT;
 #else
@@ -103,35 +103,38 @@ class CuDNNBatchNormOp {
 
     MSHADOW_REAL_TYPE_SWITCH(dtype_param_, DTypeParam, {
       Tensor<gpu, 1, DTypeParam> gamma =
-        in_data[cudnnbatchnorm::kGamma].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          in_data[cudnnbatchnorm::kGamma].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> beta =
-        in_data[cudnnbatchnorm::kBeta].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          in_data[cudnnbatchnorm::kBeta].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> moving_mean =
-        aux_states[cudnnbatchnorm::kMovingMean]
-        .get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          aux_states[cudnnbatchnorm::kMovingMean].get_with_shape<gpu, 1, DTypeParam>(
+              Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> moving_inv_var =
-        aux_states[cudnnbatchnorm::kMovingInvVar]
-        .get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          aux_states[cudnnbatchnorm::kMovingInvVar].get_with_shape<gpu, 1, DTypeParam>(
+              Shape1(shape_[1]), s);
       typename DataType<DType>::ScaleType a = 1.0f;
       typename DataType<DType>::ScaleType b = 0.0f;
 
-      if (param_.fix_gamma) gamma = 1.f;
+      if (param_.fix_gamma)
+        gamma = 1.f;
 
       if (ctx.is_train) {
         Tensor<gpu, 1, DTypeParam> save_mean =
-          out_data[cudnnbatchnorm::kMean].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+            out_data[cudnnbatchnorm::kMean].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]),
+                                                                               s);
         Tensor<gpu, 1, DTypeParam> save_inv_var =
-          out_data[cudnnbatchnorm::kInvVar]
-          .get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+            out_data[cudnnbatchnorm::kInvVar].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]),
+                                                                                 s);
         // If the lock on the auxiliary states is set, then this implies that
         // the preceding call is also a `Forward()` call, which further
         // indicates that we are in the backward mirroring mode, and therefore
         // update to the auxiliary states is disabled. This is done by setting
         // the `momentum` to `1` (or `factor` to `0`).
-        float factor = ((dmlc::GetEnv("MXNET_BACKWARD_DO_MIRROR", 0) ||
-                         dmlc::GetEnv("MXNET_MEMORY_OPT", 0))
-                        && internal_aux_states_lock_) ?
-                       0 : (1 - param_.momentum);
+        float factor =
+            ((dmlc::GetEnv("MXNET_BACKWARD_DO_MIRROR", 0) || dmlc::GetEnv("MXNET_MEMORY_OPT", 0)) &&
+             internal_aux_states_lock_)
+                ? 0
+                : (1 - param_.momentum);
         CUDNN_CALL(cudnnBatchNormalizationForwardTraining(s->dnn_handle_,
                                                           mode,
                                                           &a,
@@ -172,28 +175,28 @@ class CuDNNBatchNormOp {
     internal_aux_states_lock_ = true;
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &inputs,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &outputs) {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& inputs,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& outputs) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(inputs.size(), 8U);
     CHECK_EQ(outputs.size(), 3U);
 
     // Rename the inputs and outputs.
-    const TBlob &out_grad = inputs[0];
-    const TBlob &out_mean = inputs[1];
-    const TBlob &out_var = inputs[2];
-    const TBlob &in_data = inputs[3];
-    const TBlob &in_gamma = inputs[4];
-    const std::vector<TBlob> &in_grad = outputs;
+    const TBlob& out_grad             = inputs[0];
+    const TBlob& out_mean             = inputs[1];
+    const TBlob& out_var              = inputs[2];
+    const TBlob& in_data              = inputs[3];
+    const TBlob& in_gamma             = inputs[4];
+    const std::vector<TBlob>& in_grad = outputs;
 
     Init(in_data);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s          = ctx.get_stream<gpu>();
     Tensor<gpu, 4, DType> x = in_data.get_with_shape<gpu, 4, DType>(shape_, s);
     Tensor<gpu, 4, DType> dx =
-      in_grad[cudnnbatchnorm::kData].get_with_shape<gpu, 4, DType>(shape_, s);
+        in_grad[cudnnbatchnorm::kData].get_with_shape<gpu, 4, DType>(shape_, s);
     Tensor<gpu, 4, DType> dy = out_grad.get_with_shape<gpu, 4, DType>(shape_, s);
 
     const bool global_stats = !ctx.is_train || param_.use_global_stats;
@@ -205,25 +208,26 @@ class CuDNNBatchNormOp {
 #endif
     MSHADOW_REAL_TYPE_SWITCH(dtype_param_, DTypeParam, {
       Tensor<gpu, 1, DTypeParam> gamma =
-        in_gamma.get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          in_gamma.get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> dbeta =
-        in_grad[cudnnbatchnorm::kBeta].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          in_grad[cudnnbatchnorm::kBeta].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> dgamma =
-        in_grad[cudnnbatchnorm::kGamma].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          in_grad[cudnnbatchnorm::kGamma].get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> save_mean =
-        out_mean.get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          out_mean.get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
       Tensor<gpu, 1, DTypeParam> save_inv_var =
-        out_var.get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
+          out_var.get_with_shape<gpu, 1, DTypeParam>(Shape1(shape_[1]), s);
 
-      typename DataType<DType>::ScaleType a = 1.0f;
-      typename DataType<DType>::ScaleType b = 0.0f;
+      typename DataType<DType>::ScaleType a     = 1.0f;
+      typename DataType<DType>::ScaleType b     = 0.0f;
       typename DataType<DType>::ScaleType b_add = 1.0f;
       CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
 
-      if (param_.fix_gamma) gamma = 1.f;
+      if (param_.fix_gamma)
+        gamma = 1.f;
 
-      bool grad_add_gamma_beta = (req[cudnnbatchnorm::kGamma] == kAddTo) ||
-                                 (req[cudnnbatchnorm::kBeta] == kAddTo);
+      bool grad_add_gamma_beta =
+          (req[cudnnbatchnorm::kGamma] == kAddTo) || (req[cudnnbatchnorm::kBeta] == kAddTo);
       if (grad_add_gamma_beta) {
         if (IsBNWriting(req[cudnnbatchnorm::kGamma])) {
           dgamma = 0.f;
@@ -233,27 +237,28 @@ class CuDNNBatchNormOp {
         }
       }
 
-      CUDNN_CALL(cudnnBatchNormalizationBackward(
-        s->dnn_handle_,
-        mode,
-        &a,
-        req[cudnnbatchnorm::kData] == kAddTo ? &b_add : &b,
-        &a,
-        grad_add_gamma_beta ? &b_add : &b,  // gamma and beta
-        io_desc_,
-        x.dptr_,
-        io_desc_,
-        dy.dptr_,
-        io_desc_,
-        dx.dptr_,
-        mean_desc_,
-        gamma.dptr_,
-        dgamma.dptr_,
-        dbeta.dptr_,
-        param_.eps,
-        global_stats ? nullptr : save_mean.dptr_,
-        global_stats ? nullptr : save_inv_var.dptr_));
-      if (param_.fix_gamma) dgamma = 0.f;
+      CUDNN_CALL(
+          cudnnBatchNormalizationBackward(s->dnn_handle_,
+                                          mode,
+                                          &a,
+                                          req[cudnnbatchnorm::kData] == kAddTo ? &b_add : &b,
+                                          &a,
+                                          grad_add_gamma_beta ? &b_add : &b,  // gamma and beta
+                                          io_desc_,
+                                          x.dptr_,
+                                          io_desc_,
+                                          dy.dptr_,
+                                          io_desc_,
+                                          dx.dptr_,
+                                          mean_desc_,
+                                          gamma.dptr_,
+                                          dgamma.dptr_,
+                                          dbeta.dptr_,
+                                          param_.eps,
+                                          global_stats ? nullptr : save_mean.dptr_,
+                                          global_stats ? nullptr : save_inv_var.dptr_));
+      if (param_.fix_gamma)
+        dgamma = 0.f;
     })
     // Release the lock on the auxiliary states, so that the next forward pass
     // will be able to update the auxiliary states normally.
@@ -261,7 +266,7 @@ class CuDNNBatchNormOp {
   }
 
  private:
-  void Init(const TBlob &in_data) {
+  void Init(const TBlob& in_data) {
     CHECK_GE(param_.axis, 0);
     CHECK_LT(param_.axis, in_data.ndim());
     if (param_.axis == 1) {
@@ -273,28 +278,19 @@ class CuDNNBatchNormOp {
         shape_[0] = in_data.shape_[0];
         shape_[1] = in_data.ndim() > 1 ? in_data.shape_[1] : 1;
         shape_[2] = 1;
-        shape_[3] = static_cast<dim_t>(in_data.shape_.ProdShape(2,
-              in_data.ndim()));
+        shape_[3] = static_cast<dim_t>(in_data.shape_.ProdShape(2, in_data.ndim()));
       }
     } else {
       // reshape to (N, C, 1, D), C is the `param_.axis` dimension
       shape_[0] = static_cast<dim_t>(in_data.shape_.ProdShape(0, param_.axis));
       shape_[1] = in_data.shape_[param_.axis];
       shape_[2] = 1;
-      shape_[3] = static_cast<dim_t>(in_data.shape_.ProdShape(param_.axis + 1,
-            in_data.ndim()));
+      shape_[3] = static_cast<dim_t>(in_data.shape_.ProdShape(param_.axis + 1, in_data.ndim()));
     }
 
-    CUDNN_CALL(cudnnSetTensor4dDescriptor(io_desc_,
-                                          CUDNN_TENSOR_NCHW,
-                                          dtype_,
-                                          shape_[0],
-                                          shape_[1],
-                                          shape_[2],
-                                          shape_[3]));
-    CUDNN_CALL(cudnnDeriveBNTensorDescriptor(mean_desc_,
-                                             io_desc_,
-                                             CUDNN_BATCHNORM_SPATIAL));
+    CUDNN_CALL(cudnnSetTensor4dDescriptor(
+        io_desc_, CUDNN_TENSOR_NCHW, dtype_, shape_[0], shape_[1], shape_[2], shape_[3]));
+    CUDNN_CALL(cudnnDeriveBNTensorDescriptor(mean_desc_, io_desc_, CUDNN_BATCHNORM_SPATIAL));
   }
 
   cudnnDataType_t dtype_;
diff --git a/src/operator/nn/cudnn/cudnn_batch_norm.cc b/src/operator/nn/cudnn/cudnn_batch_norm.cc
index 1290ba81053c..8b47b78090b5 100644
--- a/src/operator/nn/cudnn/cudnn_batch_norm.cc
+++ b/src/operator/nn/cudnn/cudnn_batch_norm.cc
@@ -22,7 +22,7 @@
  * \file cudnn_batch_norm.cc
  * \brief
  * \author Junyuan Xie, Da Zheng
-*/
+ */
 
 #include "./cudnn_batch_norm-inl.h"
 #include <nnvm/op_attr_types.h>
@@ -32,12 +32,14 @@ namespace mxnet {
 namespace op {
 #if MXNET_USE_CUDNN == 1
 
-static bool BatchNormShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVector *in_shape,
-    mxnet::ShapeVector *out_shape) {
+static bool BatchNormShape(const nnvm::NodeAttrs& attrs,
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 5U) << "Input:[data, gamma, beta, moving_mean, moving_var]";
-  const mxnet::TShape &dshape = in_shape->at(0);
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = in_shape->at(0);
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   in_shape->at(1) = mxnet::TShape(Shape1(dshape[1]));
   in_shape->at(2) = mxnet::TShape(Shape1(dshape[1]));
   in_shape->at(3) = mxnet::TShape(Shape1(dshape[1]));
@@ -52,67 +54,71 @@ static bool BatchNormShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVector *in_
 }
 
 static void BatchNormCompute_CPU(const nnvm::NodeAttrs& attrs,
-    const OpContext& ctx, const std::vector<TBlob>& inputs,
-    const std::vector<OpReqType>& req,
-    const std::vector<TBlob>& outputs) {
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& outputs) {
   LOG(FATAL) << "CuDNNBatchNormOp is only available for gpu.";
 }
 
 static void BatchNormGradCompute_CPU(const nnvm::NodeAttrs& attrs,
-    const OpContext& ctx, const std::vector<TBlob>& inputs,
-    const std::vector<OpReqType>& req,
-    const std::vector<TBlob>& outputs) {
+                                     const OpContext& ctx,
+                                     const std::vector<TBlob>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<TBlob>& outputs) {
   LOG(FATAL) << "CuDNNBatchNormOp is only available for gpu.";
 }
 
 NNVM_REGISTER_OP(CuDNNBatchNorm)
-.describe("Apply batch normalization to input.")
-.set_num_inputs(5)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<BatchNormParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "gamma", "beta", "moving_mean", "moving_var"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "mean", "var"};
-})
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  return 1;
-})
-.set_attr<nnvm::FMutateInputs>("FMutateInputs", [](const nnvm::NodeAttrs& attrs) {
-  return std::vector<uint32_t>{3, 4};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BatchNormShape)
-.set_attr<FCompute>("FCompute<cpu>", BatchNormCompute_CPU)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_CuDNNBatchNorm"})
-.add_argument("data", "NDArray-or-Symbol", "Input data to batch normalization")
-.add_argument("gamma", "NDArray-or-Symbol", "gamma array")
-.add_argument("beta", "NDArray-or-Symbol", "beta array")
-.add_argument("moving_mean", "NDArray-or-Symbol", "running mean of input")
-.add_argument("moving_var", "NDArray-or-Symbol", "running variance of input")
-.add_arguments(BatchNormParam::__FIELDS__())
-.set_attr<nnvm::FSetInputVarAttrOnCompose>(
-  "FSetInputVarAttrOnCompose",
-  [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
-    if (var->attrs.dict.find("__init__") != var->attrs.dict.end()) return;
-    if (index == 3) {
-      var->attrs.dict["__init__"] = "[\"zero\", {}]";
-    } else if (index == 4) {
-      var->attrs.dict["__init__"] = "[\"one\", {}]";
-    }
-  });
+    .describe("Apply batch normalization to input.")
+    .set_num_inputs(5)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<BatchNormParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "gamma", "beta", "moving_mean", "moving_var"};
+        })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output", "mean", "var"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{3, 4};
+                                   })
+    .set_attr<mxnet::FInferShape>("FInferShape", BatchNormShape)
+    .set_attr<FCompute>("FCompute<cpu>", BatchNormCompute_CPU)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_CuDNNBatchNorm"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data to batch normalization")
+    .add_argument("gamma", "NDArray-or-Symbol", "gamma array")
+    .add_argument("beta", "NDArray-or-Symbol", "beta array")
+    .add_argument("moving_mean", "NDArray-or-Symbol", "running mean of input")
+    .add_argument("moving_var", "NDArray-or-Symbol", "running variance of input")
+    .add_arguments(BatchNormParam::__FIELDS__())
+    .set_attr<nnvm::FSetInputVarAttrOnCompose>(
+        "FSetInputVarAttrOnCompose",
+        [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
+          if (var->attrs.dict.find("__init__") != var->attrs.dict.end())
+            return;
+          if (index == 3) {
+            var->attrs.dict["__init__"] = "[\"zero\", {}]";
+          } else if (index == 4) {
+            var->attrs.dict["__init__"] = "[\"one\", {}]";
+          }
+        });
 
 NNVM_REGISTER_OP(_backward_CuDNNBatchNorm)
-.set_num_outputs(5)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs", [](const nnvm::NodeAttrs& attrs) {
-  return std::vector<uint32_t>{6, 7};
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<BatchNormParam>)
-.set_attr<FCompute>("FCompute<cpu>", BatchNormGradCompute_CPU);
+    .set_num_outputs(5)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{6, 7};
+                                   })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<BatchNormParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BatchNormGradCompute_CPU);
 
 #endif  // MXNET_USE_CUDNN
 
diff --git a/src/operator/nn/cudnn/cudnn_convolution-inl.h b/src/operator/nn/cudnn/cudnn_convolution-inl.h
index 4ab3dfa6ed9f..ce9672373106 100644
--- a/src/operator/nn/cudnn/cudnn_convolution-inl.h
+++ b/src/operator/nn/cudnn/cudnn_convolution-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_convolution-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_CUDNN_CUDNN_CONVOLUTION_INL_H_
 #define MXNET_OPERATOR_NN_CUDNN_CUDNN_CONVOLUTION_INL_H_
 
@@ -42,7 +42,7 @@ namespace op {
 /*!
  * \brief The Operator used to perform convolution using cuDNN kernels.
  */
-template<typename DType>
+template <typename DType>
 class CuDNNConvolutionOp {
   STATIC_ASSERT_CUDNN_VERSION_GE(7000);
 
@@ -66,35 +66,39 @@ class CuDNNConvolutionOp {
             const RunContext& rctx,
             bool add_to_weight) {
     using namespace mshadow;
-    this->param_ = param;
+    this->param_         = param;
     this->add_to_weight_ = add_to_weight;
     InitBufferForParam();
-    auto cudnn_forward_compute_type = convertToCuDNNDataType(forward_compute_type);
+    auto cudnn_forward_compute_type  = convertToCuDNNDataType(forward_compute_type);
     auto cudnn_backward_compute_type = convertToCuDNNDataType(backward_compute_type);
     // convert MB to words
     param_.workspace = (param_.workspace << 20) / sizeof(DType);
-    dtype_ = DataType<DType>::kCudnnFlag;
+    dtype_           = DataType<DType>::kCudnnFlag;
     // TensorCore algos only allowed on fp16-I/O convolutions if permitted by the global policy.
     cudnn_tensor_core_ = DataType<DType>::kFlag == kFloat16 && GetEnvAllowTensorCore();
 
     auto effective_layout = param_.layout.value();
     switch (effective_layout) {
       // 1D convolutions will be executed as 2D convolutions with a height of 1.
-      case mshadow::kNCW: effective_layout = mshadow::kNCHW; break;
-      case mshadow::kNWC: effective_layout = mshadow::kNHWC; break;
-      case mshadow::kCWN: effective_layout = mshadow::kCHWN; break;
-      default: break;
+      case mshadow::kNCW:
+        effective_layout = mshadow::kNCHW;
+        break;
+      case mshadow::kNWC:
+        effective_layout = mshadow::kNHWC;
+        break;
+      case mshadow::kCWN:
+        effective_layout = mshadow::kCHWN;
+        break;
+      default:
+        break;
     }
 
-    MSHADOW_LAYOUT_SWITCH(effective_layout, Layout, {
-      format_ = LayoutType<Layout>::kCudnnFlag;
-    });
+    MSHADOW_LAYOUT_SWITCH(effective_layout, Layout, { format_ = LayoutType<Layout>::kCudnnFlag; });
     // Double check to make sure this class supports the operation
     if (!Supports(param, forward_compute_type, backward_compute_type, rctx.ctx.dev_id))
       LOG(FATAL) << "Convolution parameters not supported by cuDNN implementation.";
 
-    InitDescriptors(in_shape, out_shape,
-                    cudnn_forward_compute_type, cudnn_backward_compute_type);
+    InitDescriptors(in_shape, out_shape, cudnn_forward_compute_type, cudnn_backward_compute_type);
 
     if (!param_.cudnn_tune) {
       param_.cudnn_tune = dmlc::GetEnv("MXNET_CUDNN_AUTOTUNE_DEFAULT", 1);
@@ -105,8 +109,7 @@ class CuDNNConvolutionOp {
     // approach keeps the treatment of convolution cases uniform and will
     // naturally respond to more algorithms supporting dilated convolutions in
     // future cuDNN releases.
-    SelectAlgo(rctx, in_shape, out_shape,
-               cudnn_forward_compute_type, cudnn_backward_compute_type);
+    SelectAlgo(rctx, in_shape, out_shape, cudnn_forward_compute_type, cudnn_backward_compute_type);
     GetTempSize(rctx);
   }
 
@@ -120,82 +123,77 @@ class CuDNNConvolutionOp {
     CUDNN_CALL(cudnnDestroyConvolutionDescriptor(back_conv_desc_w_));
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     size_t expected = param_.no_bias ? 2 : 3;
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s                  = ctx.get_stream<gpu>();
     Tensor<gpu, 1, DType> workspace = AllocateTempWorkspace(ctx, forward_workspace_byte_);
-    size_t workspace_size = TensorSizeBytes(workspace);
+    size_t workspace_size           = TensorSizeBytes(workspace);
 
     // I/O's should have 2 more dims than the kernel dim
-    DType *data_ptr = GetNdPtr(in_data[conv::kData], param_.kernel.ndim() + 2, s);
-    DType *wmat_ptr = GetNdPtr(in_data[conv::kWeight], param_.kernel.ndim() + 2, s);
-    DType *out_ptr = GetNdPtr(out_data[conv::kOut], param_.kernel.ndim() + 2, s);
+    DType* data_ptr = GetNdPtr(in_data[conv::kData], param_.kernel.ndim() + 2, s);
+    DType* wmat_ptr = GetNdPtr(in_data[conv::kWeight], param_.kernel.ndim() + 2, s);
+    DType* out_ptr  = GetNdPtr(out_data[conv::kOut], param_.kernel.ndim() + 2, s);
 
-    typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType alpha    = 1.0f;
+    typename DataType<DType>::ScaleType beta     = 0.0f;
     typename DataType<DType>::ScaleType beta_add = 1.0f;
     CUDNN_CALL(cudnnConvolutionForward(s->dnn_handle_,
-                    &alpha,
-                    in_desc_,
-                    data_ptr,
-                    filter_desc_,
-                    wmat_ptr,
-                    forward_conv_desc_,
-                    forward_algo_.AlgoNumber(),
-                    workspace.dptr_,
-                    workspace_size,
-                    req[conv::kOut] == kAddTo? &beta_add : &beta,
-                    out_desc_,
-                      out_ptr));
+                                       &alpha,
+                                       in_desc_,
+                                       data_ptr,
+                                       filter_desc_,
+                                       wmat_ptr,
+                                       forward_conv_desc_,
+                                       forward_algo_.AlgoNumber(),
+                                       workspace.dptr_,
+                                       workspace_size,
+                                       req[conv::kOut] == kAddTo ? &beta_add : &beta,
+                                       out_desc_,
+                                       out_ptr));
 
     if (!param_.no_bias) {
       Tensor<gpu, 1, DType> bias = in_data[conv::kBias].get<gpu, 1, DType>(s);
-      CUDNN_CALL(cudnnAddTensor(s->dnn_handle_,
-                              &alpha,
-                              bias_desc_,
-                              bias.dptr_,
-                              &beta_add,
-                              out_desc_,
-                              out_ptr));
+      CUDNN_CALL(cudnnAddTensor(
+          s->dnn_handle_, &alpha, bias_desc_, bias.dptr_, &beta_add, out_desc_, out_ptr));
     }
   }
 
-  void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad) {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     size_t expected = param_.no_bias == 0 ? 3 : 2;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(in_grad.size(), expected);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     // RAII object to handle syncing of the underlying auxiliary stream with the primary stream
     SyncedGPUAuxStream s_dgrad = ctx.get_gpu_aux_stream();
 
     // I/O's should have 2 more dims than the kernel dim
-    DType *grad_ptr = GetNdPtr(out_grad[conv::kOut], param_.kernel.ndim() + 2, s);
-    DType *wmat_ptr = GetNdPtr(in_data[conv::kWeight], param_.kernel.ndim() + 2, s);
-    DType *gwmat_ptr = GetNdPtr(in_grad[conv::kWeight], param_.kernel.ndim() + 2, s);
-    DType *data_ptr = GetNdPtr(in_data[conv::kData], param_.kernel.ndim() + 2, s);
-    DType *gdata_ptr = GetNdPtr(in_grad[conv::kData], param_.kernel.ndim() + 2, s);
+    DType* grad_ptr  = GetNdPtr(out_grad[conv::kOut], param_.kernel.ndim() + 2, s);
+    DType* wmat_ptr  = GetNdPtr(in_data[conv::kWeight], param_.kernel.ndim() + 2, s);
+    DType* gwmat_ptr = GetNdPtr(in_grad[conv::kWeight], param_.kernel.ndim() + 2, s);
+    DType* data_ptr  = GetNdPtr(in_data[conv::kData], param_.kernel.ndim() + 2, s);
+    DType* gdata_ptr = GetNdPtr(in_grad[conv::kData], param_.kernel.ndim() + 2, s);
 
     size_t backward_workspace_byte =
-        parallelize_backward_kernels_ ? back_workspace_byte_dgrad_ + back_workspace_byte_wgrad_
-                                      : std::max(back_workspace_byte_dgrad_,
-                                                 back_workspace_byte_wgrad_);
+        parallelize_backward_kernels_
+            ? back_workspace_byte_dgrad_ + back_workspace_byte_wgrad_
+            : std::max(back_workspace_byte_dgrad_, back_workspace_byte_wgrad_);
     Tensor<gpu, 1, DType> workspace = AllocateTempWorkspace(ctx, backward_workspace_byte);
-    size_t workspace_size = TensorSizeBytes(workspace);
-    DType *workspace_dptr_wgrad = workspace.dptr_;
-    DType *workspace_dptr_dgrad = workspace.dptr_;
+    size_t workspace_size           = TensorSizeBytes(workspace);
+    DType* workspace_dptr_wgrad     = workspace.dptr_;
+    DType* workspace_dptr_dgrad     = workspace.dptr_;
     if (parallelize_backward_kernels_) {
       CHECK_LE(back_workspace_byte_dgrad_ + back_workspace_byte_wgrad_, workspace_size);
       // Large allocations at some point will be given their own page.  Pass this alignment on to
@@ -209,57 +207,57 @@ class CuDNNConvolutionOp {
       CHECK_LE(back_workspace_byte_dgrad_, workspace_size);
       CHECK_LE(back_workspace_byte_wgrad_, workspace_size);
     }
-    typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType alpha    = 1.0f;
+    typename DataType<DType>::ScaleType beta     = 0.0f;
     typename DataType<DType>::ScaleType beta_add = 1.0f;
     if (req[conv::kWeight] != kNullOp) {
-        CHECK_EQ(add_to_weight_, req[conv::kWeight] == kAddTo);
-        CUDNN_CALL(cudnnConvolutionBackwardFilter(s->dnn_handle_,
-            &alpha,
-            in_desc_,
-            data_ptr,
-            out_desc_,
-            grad_ptr,
-            back_conv_desc_w_,
-            back_algo_w_.AlgoNumber(),
-            workspace_dptr_wgrad,
-            back_workspace_byte_wgrad_,
-            req[conv::kWeight] == kAddTo? &beta_add : &beta,
-            filter_desc_,
-            gwmat_ptr));
+      CHECK_EQ(add_to_weight_, req[conv::kWeight] == kAddTo);
+      CUDNN_CALL(cudnnConvolutionBackwardFilter(s->dnn_handle_,
+                                                &alpha,
+                                                in_desc_,
+                                                data_ptr,
+                                                out_desc_,
+                                                grad_ptr,
+                                                back_conv_desc_w_,
+                                                back_algo_w_.AlgoNumber(),
+                                                workspace_dptr_wgrad,
+                                                back_workspace_byte_wgrad_,
+                                                req[conv::kWeight] == kAddTo ? &beta_add : &beta,
+                                                filter_desc_,
+                                                gwmat_ptr));
     }
     if (!param_.no_bias && (req[conv::kBias] != kNullOp)) {
-        Tensor<gpu, 1, DType> gbias = in_grad[conv::kBias].get<gpu, 1, DType>(s);
-        CUDNN_CALL(cudnnConvolutionBackwardBias(s->dnn_handle_,
-                                            &alpha,
-                                            out_desc_,
-                                            grad_ptr,
-                                            req[conv::kBias] == kAddTo ? &beta_add : &beta,
-                                            bias_desc_,
-                                            gbias.dptr_));
+      Tensor<gpu, 1, DType> gbias = in_grad[conv::kBias].get<gpu, 1, DType>(s);
+      CUDNN_CALL(cudnnConvolutionBackwardBias(s->dnn_handle_,
+                                              &alpha,
+                                              out_desc_,
+                                              grad_ptr,
+                                              req[conv::kBias] == kAddTo ? &beta_add : &beta,
+                                              bias_desc_,
+                                              gbias.dptr_));
     }
     if (req[conv::kData] != kNullOp) {
-        CUDNN_CALL(cudnnConvolutionBackwardData(s_dgrad.GetStream()->dnn_handle_,
-            &alpha,
-            filter_desc_,
-            wmat_ptr,
-            out_desc_,
-            grad_ptr,
-            back_conv_desc_,
-            back_algo_.AlgoNumber(),
-            workspace_dptr_dgrad,
-            back_workspace_byte_dgrad_,
-            req[conv::kData] == kAddTo? &beta_add : &beta,
-            in_desc_,
-            gdata_ptr));
+      CUDNN_CALL(cudnnConvolutionBackwardData(s_dgrad.GetStream()->dnn_handle_,
+                                              &alpha,
+                                              filter_desc_,
+                                              wmat_ptr,
+                                              out_desc_,
+                                              grad_ptr,
+                                              back_conv_desc_,
+                                              back_algo_.AlgoNumber(),
+                                              workspace_dptr_dgrad,
+                                              back_workspace_byte_dgrad_,
+                                              req[conv::kData] == kAddTo ? &beta_add : &beta,
+                                              in_desc_,
+                                              gdata_ptr));
     }
   }
 
-/*!
- * \brief Returns whether the cuDNN library version supports the convolution
- * operation described by `param`: cuDNN v5 and earlier does not support
- * dilated convolutions.  Dilation only enabled after v6.0.20.
- */
+  /*!
+   * \brief Returns whether the cuDNN library version supports the convolution
+   * operation described by `param`: cuDNN v5 and earlier does not support
+   * dilated convolutions.  Dilation only enabled after v6.0.20.
+   */
   static bool Supports(ConvolutionParam param,
                        int forward_compute_type,
                        int backward_compute_type,
@@ -268,10 +266,9 @@ class CuDNNConvolutionOp {
 
     // NDHWC not supported, NHWC not supported in true fp16
     auto layout_val = param.layout.value();
-    auto true_fp16 = DataType<DType>::kFlag == kFloat16 &&
-      (forward_compute_type == kFloat16 || backward_compute_type == kFloat16);
-    if (layout_val == kNDHWC || layout_val == kNWC ||
-        layout_val == kNHWC && true_fp16)
+    auto true_fp16  = DataType<DType>::kFlag == kFloat16 &&
+                     (forward_compute_type == kFloat16 || backward_compute_type == kFloat16);
+    if (layout_val == kNDHWC || layout_val == kNWC || layout_val == kNHWC && true_fp16)
       return false;
 
     // Permits graceful fallback to pseudo-fp16 on heterogenous systems
@@ -284,15 +281,14 @@ class CuDNNConvolutionOp {
   }
 
  private:
-/*!
- * \brief Translate an mxnet datatype to the corresponding cudnnDataType_t.
- */
+  /*!
+   * \brief Translate an mxnet datatype to the corresponding cudnnDataType_t.
+   */
   cudnnDataType_t convertToCuDNNDataType(int dtype) {
     cudnnDataType_t converted = CUDNN_DATA_FLOAT;
     // The following will always assign to `converted` or throw an exception.
-    MSHADOW_REAL_TYPE_SWITCH(dtype, mxDType, {
-      converted = mshadow::DataType<mxDType>::kCudnnFlag;
-    })
+    MSHADOW_REAL_TYPE_SWITCH(
+        dtype, mxDType, { converted = mshadow::DataType<mxDType>::kCudnnFlag; })
     return converted;
   }
 
@@ -312,71 +308,65 @@ class CuDNNConvolutionOp {
 
     if (param_.kernel.ndim() == 1 || param_.kernel.ndim() == 2) {
       // 1d or 2d conv
-      auto pad = param_.kernel.ndim() == 2 ?
-        param_.pad : mxnet::TShape({0, param_.pad[0]});
-      auto stride = param_.kernel.ndim() == 2 ?
-        param_.stride : mxnet::TShape({1, param_.stride[0]});
-      auto dilate = param_.kernel.ndim() == 2 ?
-        param_.dilate : mxnet::TShape({1, param_.dilate[0]});
+      auto pad = param_.kernel.ndim() == 2 ? param_.pad : mxnet::TShape({0, param_.pad[0]});
+      auto stride =
+          param_.kernel.ndim() == 2 ? param_.stride : mxnet::TShape({1, param_.stride[0]});
+      auto dilate =
+          param_.kernel.ndim() == 2 ? param_.dilate : mxnet::TShape({1, param_.dilate[0]});
       CUDNN_CALL(cudnnSetConvolution2dDescriptor(forward_conv_desc_,
-                                               pad[0],
-                                               pad[1],
-                                               stride[0],
-                                               stride[1],
-                                               dilate[0],
-                                               dilate[1],
-                                               CUDNN_CROSS_CORRELATION,
-                                               cudnn_forward_compute_type));
+                                                 pad[0],
+                                                 pad[1],
+                                                 stride[0],
+                                                 stride[1],
+                                                 dilate[0],
+                                                 dilate[1],
+                                                 CUDNN_CROSS_CORRELATION,
+                                                 cudnn_forward_compute_type));
       CUDNN_CALL(cudnnSetConvolution2dDescriptor(back_conv_desc_,
-                                               pad[0],
-                                               pad[1],
-                                               stride[0],
-                                               stride[1],
-                                               dilate[0],
-                                               dilate[1],
-                                               CUDNN_CROSS_CORRELATION,
-                                               cudnn_backward_compute_type));
+                                                 pad[0],
+                                                 pad[1],
+                                                 stride[0],
+                                                 stride[1],
+                                                 dilate[0],
+                                                 dilate[1],
+                                                 CUDNN_CROSS_CORRELATION,
+                                                 cudnn_backward_compute_type));
       CUDNN_CALL(cudnnSetConvolution2dDescriptor(back_conv_desc_w_,
-                                               pad[0],
-                                               pad[1],
-                                               stride[0],
-                                               stride[1],
-                                               dilate[0],
-                                               dilate[1],
-                                               CUDNN_CROSS_CORRELATION,
-                                               cudnn_backward_compute_type));
+                                                 pad[0],
+                                                 pad[1],
+                                                 stride[0],
+                                                 stride[1],
+                                                 dilate[0],
+                                                 dilate[1],
+                                                 CUDNN_CROSS_CORRELATION,
+                                                 cudnn_backward_compute_type));
       if (param_.kernel.ndim() == 2) {
-        wshape = ConvertLayout(wshape.get<4>(), param_.layout.value(), kNCHW);
+        wshape  = ConvertLayout(wshape.get<4>(), param_.layout.value(), kNCHW);
         dstride = ConvertLayout(Strides<4>(dshape), param_.layout.value(), kNCHW);
-        dshape = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW);
+        dshape  = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW);
         ostride = ConvertLayout(Strides<4>(oshape), param_.layout.value(), kNCHW);
-        oshape = ConvertLayout(oshape.get<4>(), param_.layout.value(), kNCHW);
+        oshape  = ConvertLayout(oshape.get<4>(), param_.layout.value(), kNCHW);
       } else {
-        wshape = ConvertLayout(wshape.get<3>(), param_.layout.value(), kNCW);
-        wshape = mxnet::TShape({wshape[0], wshape[1], 1, wshape[2]});
+        wshape  = ConvertLayout(wshape.get<3>(), param_.layout.value(), kNCW);
+        wshape  = mxnet::TShape({wshape[0], wshape[1], 1, wshape[2]});
         dstride = ConvertLayout(Strides<3>(dshape), param_.layout.value(), kNCW);
         dstride = mxnet::TShape({dstride[0], dstride[1], dstride[1], dstride[2]});
-        dshape = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW);
-        dshape = mxnet::TShape({dshape[0], dshape[1], 1, dshape[2]});
+        dshape  = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW);
+        dshape  = mxnet::TShape({dshape[0], dshape[1], 1, dshape[2]});
         ostride = ConvertLayout(Strides<3>(oshape), param_.layout.value(), kNCW);
         ostride = mxnet::TShape({ostride[0], ostride[1], ostride[1], ostride[2]});
-        oshape = ConvertLayout(oshape.get<3>(), param_.layout.value(), kNCW);
-        oshape = mxnet::TShape({oshape[0], oshape[1], 1, oshape[2]});
+        oshape  = ConvertLayout(oshape.get<3>(), param_.layout.value(), kNCW);
+        oshape  = mxnet::TShape({oshape[0], oshape[1], 1, oshape[2]});
       }
-      CUDNN_CALL(cudnnSetFilter4dDescriptor(filter_desc_,
-                                            dtype_,
-                                            format_,
-                                            wshape[0],
-                                            wshape[1],
-                                            wshape[2],
-                                            wshape[3]));
+      CUDNN_CALL(cudnnSetFilter4dDescriptor(
+          filter_desc_, dtype_, format_, wshape[0], wshape[1], wshape[2], wshape[3]));
 #if CUDNN_VERSION >= 7301 && CUDNN_VERSION < 7500
       auto kernel_h = wshape[2];
       auto kernel_w = wshape[3];
       auto stride_h = stride[0];
       auto stride_w = stride[1];
-      auto pad_h = pad[0];
-      auto pad_w = pad[1];
+      auto pad_h    = pad[0];
+      auto pad_w    = pad[1];
       if (param_.layout.value() == kNCHW &&
           (((stride_h == 2) && (kernel_h % 2 == 0) && (pad_h % 2 == 0)) ||
            ((stride_w == 2) && (kernel_w % 2 == 0) && (pad_w % 2 == 0)))) {
@@ -388,42 +378,41 @@ class CuDNNConvolutionOp {
       CHECK_EQ(param_.layout.value(), kNCDHW) << "CuDNN only support 3D conv with NCDHW layout";
       std::vector<int> wshape_buffer(wshape.ndim());
       CUDNN_CALL(cudnnSetFilterNdDescriptor(filter_desc_,
-                                          dtype_,
-                                          CUDNN_TENSOR_NCHW,
-                                          static_cast<int>(wshape.ndim()),
-                                          CastTShapeToIntPtr(wshape, &wshape_buffer)));
+                                            dtype_,
+                                            CUDNN_TENSOR_NCHW,
+                                            static_cast<int>(wshape.ndim()),
+                                            CastTShapeToIntPtr(wshape, &wshape_buffer)));
       CUDNN_CALL(cudnnSetConvolutionNdDescriptor(forward_conv_desc_,
-                                               3,
-                                               param_pad_.data(),
-                                               param_stride_.data(),
-                                               param_dilate_.data(),
-                                               CUDNN_CROSS_CORRELATION,
-                                               cudnn_forward_compute_type));
+                                                 3,
+                                                 param_pad_.data(),
+                                                 param_stride_.data(),
+                                                 param_dilate_.data(),
+                                                 CUDNN_CROSS_CORRELATION,
+                                                 cudnn_forward_compute_type));
 
       CUDNN_CALL(cudnnSetConvolutionNdDescriptor(back_conv_desc_,
-                                               3,
-                                               param_pad_.data(),
-                                               param_stride_.data(),
-                                               param_dilate_.data(),
-                                               CUDNN_CROSS_CORRELATION,
-                                               cudnn_backward_compute_type));
+                                                 3,
+                                                 param_pad_.data(),
+                                                 param_stride_.data(),
+                                                 param_dilate_.data(),
+                                                 CUDNN_CROSS_CORRELATION,
+                                                 cudnn_backward_compute_type));
 
       CUDNN_CALL(cudnnSetConvolutionNdDescriptor(back_conv_desc_w_,
-                                               3,
-                                               param_pad_.data(),
-                                               param_stride_.data(),
-                                               param_dilate_.data(),
-                                               CUDNN_CROSS_CORRELATION,
-                                               cudnn_backward_compute_type));
+                                                 3,
+                                                 param_pad_.data(),
+                                                 param_stride_.data(),
+                                                 param_dilate_.data(),
+                                                 CUDNN_CROSS_CORRELATION,
+                                                 cudnn_backward_compute_type));
 
       dstride = ConvertLayout(Strides<5>(dshape), param_.layout.value(), kNCDHW);
-      dshape = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW);
+      dshape  = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW);
       ostride = ConvertLayout(Strides<5>(oshape), param_.layout.value(), kNCDHW);
-      oshape = ConvertLayout(oshape.get<5>(), param_.layout.value(), kNCDHW);
+      oshape  = ConvertLayout(oshape.get<5>(), param_.layout.value(), kNCDHW);
     }
     // Set "allow tensor core" flag in convolution descriptors, if available.
-    cudnnMathType_t math_type = cudnn_tensor_core_ ? CUDNN_TENSOR_OP_MATH
-                                                   : CUDNN_DEFAULT_MATH;
+    cudnnMathType_t math_type = cudnn_tensor_core_ ? CUDNN_TENSOR_OP_MATH : CUDNN_DEFAULT_MATH;
 #if CUDNN_VERSION >= 7200
     if (GetEnvAllowTensorCore() && GetEnvAllowTensorCoreConversion() &&
         (DataType<DType>::kFlag != kFloat16))
@@ -458,34 +447,32 @@ class CuDNNConvolutionOp {
                                           ostride_buffer.data()));
 
     if (!param_.no_bias) {
-      mxnet::TShape bias = in_shape[conv::kBias];
-      int bias_dim = static_cast<int>(bias[0]);
-      std::vector<int> bias_shape = {1,
-                                     bias_dim,
-                                     1, 1};
+      mxnet::TShape bias           = in_shape[conv::kBias];
+      int bias_dim                 = static_cast<int>(bias[0]);
+      std::vector<int> bias_shape  = {1, bias_dim, 1, 1};
       std::vector<int> bias_stride = {bias_dim, 1, bias_dim, bias_dim};
       if (param_.kernel.ndim() == 3) {
         bias_shape.push_back(1);
         bias_stride.push_back(bias_dim);
       }
       CUDNN_CALL(cudnnSetTensorNdDescriptor(bias_desc_,
-                                          dtype_,
-                                          static_cast<int>(bias_shape.size()),
-                                          &bias_shape[0],
-                                          &bias_stride[0]));
+                                            dtype_,
+                                            static_cast<int>(bias_shape.size()),
+                                            &bias_shape[0],
+                                            &bias_stride[0]));
     }
   }
 
   void CuDNNAlgoSetter(const RunContext& rctx,
-                  const mxnet::ShapeVector& in_shape,
-                  const mxnet::ShapeVector& out_shape,
-                  cudnnDataType_t cudnn_forward_compute_type,
-                  cudnnDataType_t cudnn_backward_compute_type,
-                  CuDNNAlgo<cudnnConvolutionFwdAlgo_t> *fwd,
-                  CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t> *bwd,
-                  CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t> *flt) {
+                       const mxnet::ShapeVector& in_shape,
+                       const mxnet::ShapeVector& out_shape,
+                       cudnnDataType_t cudnn_forward_compute_type,
+                       cudnnDataType_t cudnn_backward_compute_type,
+                       CuDNNAlgo<cudnnConvolutionFwdAlgo_t>* fwd,
+                       CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t>* bwd,
+                       CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t>* flt) {
     // Not in algo registry, must determine via *Get*() or *Find*()
-    mshadow::Stream<gpu> *s = rctx.get_stream<gpu>();
+    mshadow::Stream<gpu>* s = rctx.get_stream<gpu>();
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     size_t workspace_byte = static_cast<size_t>(param_.workspace * sizeof(DType));
 
@@ -494,10 +481,10 @@ class CuDNNConvolutionOp {
 
     // Forward Algorithm Find/Get() v7
     std::vector<cudnnConvolutionFwdAlgoPerf_t> fwd_results(MaxForwardAlgos(s->dnn_handle_));
-    int actual_fwd_algos = 0;
-    auto fwd_algo_discoverer =
-      param_.cudnn_tune.value() == conv::kOff ? cudnnGetConvolutionForwardAlgorithm_v7
-                                              : cudnnFindConvolutionForwardAlgorithm;
+    int actual_fwd_algos     = 0;
+    auto fwd_algo_discoverer = param_.cudnn_tune.value() == conv::kOff
+                                   ? cudnnGetConvolutionForwardAlgorithm_v7
+                                   : cudnnFindConvolutionForwardAlgorithm;
     CUDNN_CALL((*fwd_algo_discoverer)(s->dnn_handle_,
                                       in_desc_,
                                       filter_desc_,
@@ -507,9 +494,8 @@ class CuDNNConvolutionOp {
                                       &actual_fwd_algos,
                                       fwd_results.data()));
     fwd_results.resize(actual_fwd_algos);
-    AlgoFinalSelect<cudnnConvolutionFwdAlgoPerf_t,
-                    cudnnConvolutionFwdAlgo_t>(fwd_results, "forward",
-                                               workspace_byte, fwd);
+    AlgoFinalSelect<cudnnConvolutionFwdAlgoPerf_t, cudnnConvolutionFwdAlgo_t>(
+        fwd_results, "forward", workspace_byte, fwd);
 
     // Backprop-to-Filter Algorithm Find/Get() v7
     auto max_bwd_filt_algos = MaxBackwardFilterAlgos(s->dnn_handle_);
@@ -517,9 +503,9 @@ class CuDNNConvolutionOp {
     int actual_bwd_filter_algos = 0;
     // In cudnn v7.1.4, find() returned wgrad algos that could fail for large c if we
     // were summing into the output (i.e. beta != 0).  Get() returned OK algos though.
-    auto bwd_filter_algo_discoverer =
-      param_.cudnn_tune.value() == conv::kOff ? cudnnGetConvolutionBackwardFilterAlgorithm_v7
-                                              : cudnnFindConvolutionBackwardFilterAlgorithm;
+    auto bwd_filter_algo_discoverer = param_.cudnn_tune.value() == conv::kOff
+                                          ? cudnnGetConvolutionBackwardFilterAlgorithm_v7
+                                          : cudnnFindConvolutionBackwardFilterAlgorithm;
     CUDNN_CALL((*bwd_filter_algo_discoverer)(s->dnn_handle_,
                                              in_desc_,
                                              out_desc_,
@@ -529,17 +515,16 @@ class CuDNNConvolutionOp {
                                              &actual_bwd_filter_algos,
                                              bwd_filt_results.data()));
     bwd_filt_results.resize(actual_bwd_filter_algos);
-    AlgoFinalSelect<cudnnConvolutionBwdFilterAlgoPerf_t,
-                    cudnnConvolutionBwdFilterAlgo_t>(bwd_filt_results, "backprop-to-filter",
-                                                     workspace_byte, flt);
+    AlgoFinalSelect<cudnnConvolutionBwdFilterAlgoPerf_t, cudnnConvolutionBwdFilterAlgo_t>(
+        bwd_filt_results, "backprop-to-filter", workspace_byte, flt);
 
     // Backprop-to-Data Algorithm Find/Get() v7
     auto max_bwd_data_algos = MaxBackwardDataAlgos(s->dnn_handle_);
     std::vector<cudnnConvolutionBwdDataAlgoPerf_t> bwd_data_results(max_bwd_data_algos);
-    int actual_bwd_data_algos = 0;
-    auto bwd_data_algo_discoverer =
-      param_.cudnn_tune.value() == conv::kOff ? cudnnGetConvolutionBackwardDataAlgorithm_v7
-                                              : cudnnFindConvolutionBackwardDataAlgorithm;
+    int actual_bwd_data_algos     = 0;
+    auto bwd_data_algo_discoverer = param_.cudnn_tune.value() == conv::kOff
+                                        ? cudnnGetConvolutionBackwardDataAlgorithm_v7
+                                        : cudnnFindConvolutionBackwardDataAlgorithm;
     CUDNN_CALL((*bwd_data_algo_discoverer)(s->dnn_handle_,
                                            filter_desc_,
                                            out_desc_,
@@ -549,9 +534,8 @@ class CuDNNConvolutionOp {
                                            &actual_bwd_data_algos,
                                            bwd_data_results.data()));
     bwd_data_results.resize(actual_bwd_data_algos);
-    AlgoFinalSelect<cudnnConvolutionBwdDataAlgoPerf_t,
-                    cudnnConvolutionBwdDataAlgo_t>(bwd_data_results, "backprop-to-data",
-                                                   workspace_byte, bwd, exclude_dgrad_algo_);
+    AlgoFinalSelect<cudnnConvolutionBwdDataAlgoPerf_t, cudnnConvolutionBwdDataAlgo_t>(
+        bwd_data_results, "backprop-to-data", workspace_byte, bwd, exclude_dgrad_algo_);
 
     // Fix for issue #11241
     int cudnn_find_issue_max_features = 64 * 1024;
@@ -565,15 +549,19 @@ class CuDNNConvolutionOp {
                   const mxnet::ShapeVector& out_shape,
                   cudnnDataType_t cudnn_forward_compute_type,
                   cudnnDataType_t cudnn_backward_compute_type) {
-    auto algo_setter = [&](CuDNNAlgo<cudnnConvolutionFwdAlgo_t> *fwd,
-                           CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t> *bwd,
-                           CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t> *flt) {
+    auto algo_setter = [&](CuDNNAlgo<cudnnConvolutionFwdAlgo_t>* fwd,
+                           CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t>* bwd,
+                           CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t>* flt) {
       if (param_.cudnn_tune.value() == conv::kOff) {
         // The routine will only be calling cudnnGet, so no need to grab the Storage lock.
-        this->CuDNNAlgoSetter(rctx, in_shape, out_shape,
+        this->CuDNNAlgoSetter(rctx,
+                              in_shape,
+                              out_shape,
                               cudnn_forward_compute_type,
                               cudnn_backward_compute_type,
-                              fwd, bwd, flt);
+                              fwd,
+                              bwd,
+                              flt);
       } else {
         // One potential problem is that cudnnFind() uses cudaMalloc() to directly allocate
         // I/O and workspace areas, and these allocations may result in an out-of-memory
@@ -595,18 +583,29 @@ class CuDNNConvolutionOp {
         // of cudnnFind's internal temporary allocations.  Grabbing the lock might also
         // impede other threads from launching work on the GPU.
         std::lock_guard<std::mutex> lock(Storage::Get()->GetMutex(Context::kGPU));
-        this->CuDNNAlgoSetter(rctx, in_shape, out_shape,
+        this->CuDNNAlgoSetter(rctx,
+                              in_shape,
+                              out_shape,
                               cudnn_forward_compute_type,
                               cudnn_backward_compute_type,
-                              fwd, bwd, flt);
+                              fwd,
+                              bwd,
+                              flt);
       }
     };
 
-    CuDNNConvAlgoReg::Get()->FindOrElseRegister(param_, in_shape, out_shape, dtype_,
-                                       cudnn_forward_compute_type,
-                                       cudnn_backward_compute_type,
-                                       SMArch(rctx.ctx.dev_id), add_to_weight_,
-                                       &forward_algo_, &back_algo_, &back_algo_w_, algo_setter);
+    CuDNNConvAlgoReg::Get()->FindOrElseRegister(param_,
+                                                in_shape,
+                                                out_shape,
+                                                dtype_,
+                                                cudnn_forward_compute_type,
+                                                cudnn_backward_compute_type,
+                                                SMArch(rctx.ctx.dev_id),
+                                                add_to_weight_,
+                                                &forward_algo_,
+                                                &back_algo_,
+                                                &back_algo_w_,
+                                                algo_setter);
 
     // If we're allowing Tensor Core variants of the algos to be considered in
     // *Find*() or *Get*(), but a non-Tensor-Core algo variant is the fastest,
@@ -620,17 +619,19 @@ class CuDNNConvolutionOp {
   // Look over the results from *Find*() or *Get*() and pick the fastest algo given possible
   // workspace constraints.
   template <typename PerfType, typename AlgoType>
-  void AlgoFinalSelect(const std::vector<PerfType> &perf_results, std::string kernel_name,
-                       size_t workspace_byte, CuDNNAlgo<AlgoType> *algo,
+  void AlgoFinalSelect(const std::vector<PerfType>& perf_results,
+                       std::string kernel_name,
+                       size_t workspace_byte,
+                       CuDNNAlgo<AlgoType>* algo,
                        int32_t algo_exclude = -1) {
     // Determine the fastest acceptable algo that matches the algo_preference (-1 = any),
     // regardless of mathType.
     bool enforce_determinism = dmlc::GetEnv("MXNET_ENFORCE_DETERMINISM", false);
     for (decltype(perf_results.size()) i = 0; i != perf_results.size(); ++i) {
-      const auto &result = perf_results[i];
-      bool algo_exclusion = static_cast<int32_t>(result.algo) == algo_exclude;
+      const auto& result       = perf_results[i];
+      bool algo_exclusion      = static_cast<int32_t>(result.algo) == algo_exclude;
       bool algo_is_tensor_core = false;
-      algo_is_tensor_core = result.mathType == CUDNN_TENSOR_OP_MATH;
+      algo_is_tensor_core      = result.mathType == CUDNN_TENSOR_OP_MATH;
       if (result.status == CUDNN_STATUS_SUCCESS &&
           (!enforce_determinism || result.determinism == cudnnDeterminism_t::CUDNN_DETERMINISTIC) &&
           (param_.cudnn_tune.value() == conv::kLimited || result.memory <= workspace_byte) &&
@@ -645,49 +646,48 @@ class CuDNNConvolutionOp {
                << " please consider reducing batch/model size or increasing the workspace size";
   }
 
-
   void GetTempSize(const RunContext& rctx) {
-    mshadow::Stream<gpu> *s = rctx.get_stream<gpu>();
+    mshadow::Stream<gpu>* s = rctx.get_stream<gpu>();
     CUDNN_CALL(cudnnGetConvolutionBackwardDataWorkspaceSize(s->dnn_handle_,
-               filter_desc_,
-               out_desc_,
-               back_conv_desc_,
-               in_desc_,
-               back_algo_.AlgoNumber(),
-               &back_workspace_byte_dgrad_));
+                                                            filter_desc_,
+                                                            out_desc_,
+                                                            back_conv_desc_,
+                                                            in_desc_,
+                                                            back_algo_.AlgoNumber(),
+                                                            &back_workspace_byte_dgrad_));
     CUDNN_CALL(cudnnGetConvolutionBackwardFilterWorkspaceSize(s->dnn_handle_,
-               in_desc_,
-               out_desc_,
-               back_conv_desc_w_,
-               filter_desc_,
-               back_algo_w_.AlgoNumber(),
-               &back_workspace_byte_wgrad_));
+                                                              in_desc_,
+                                                              out_desc_,
+                                                              back_conv_desc_w_,
+                                                              filter_desc_,
+                                                              back_algo_w_.AlgoNumber(),
+                                                              &back_workspace_byte_wgrad_));
     // cudaMalloc returns addresses that are aligned for large accesses (e.g. to 512 bytes).
     // Since we only make one allocation and divide it into two parts when we parallelize
     // the dgrad and wgrad kernels, we round the sizes up to this alignment size so the
     // dptrs respect this alignment, even if the separate areas are stacked.
     const size_t dptr_alignment = 512;
-    back_workspace_byte_dgrad_ = RoundToMultiple(back_workspace_byte_dgrad_, dptr_alignment);
-    back_workspace_byte_wgrad_ = RoundToMultiple(back_workspace_byte_wgrad_, dptr_alignment);
+    back_workspace_byte_dgrad_  = RoundToMultiple(back_workspace_byte_dgrad_, dptr_alignment);
+    back_workspace_byte_wgrad_  = RoundToMultiple(back_workspace_byte_wgrad_, dptr_alignment);
 
     CUDNN_CALL(cudnnGetConvolutionForwardWorkspaceSize(s->dnn_handle_,
-               in_desc_,
-               filter_desc_,
-               forward_conv_desc_,
-               out_desc_,
-               forward_algo_.AlgoNumber(),
-               &forward_workspace_byte_));
+                                                       in_desc_,
+                                                       filter_desc_,
+                                                       forward_conv_desc_,
+                                                       out_desc_,
+                                                       forward_algo_.AlgoNumber(),
+                                                       &forward_workspace_byte_));
   }
 
-  int *CastTShapeToIntPtr(const mxnet::TShape& s, std::vector<int> *buffer) {
+  int* CastTShapeToIntPtr(const mxnet::TShape& s, std::vector<int>* buffer) {
     buffer->resize(s.ndim());
     nnvm::ShapeTypeCast(s.begin(), s.end(), buffer->data());
     return buffer->data();
   }
 
   // Converts a TBlob to a dptr, checking for the expected dim and that it's contiguous.
-  DType *GetNdPtr(const TBlob& tb, int dim, Stream<gpu> *s) {
-    DType *data_ptr = nullptr;
+  DType* GetNdPtr(const TBlob& tb, int dim, Stream<gpu>* s) {
+    DType* data_ptr = nullptr;
     if (dim == 3) {
       Tensor<gpu, 3, DType> data = tb.get<gpu, 3, DType>(s);
       CHECK_EQ(data.CheckContiguous(), true);
@@ -709,11 +709,11 @@ class CuDNNConvolutionOp {
   // Converts a mxnet::TShape to a Shape<> of strides.
   // e.g. {shape[0], shape[1], shape[2]} -> {shape[1]*shape[2], shape[2], 1}
   template <int dim>
-  inline Shape<dim> Strides(const mxnet::TShape &s) {
+  inline Shape<dim> Strides(const mxnet::TShape& s) {
     int ndim = s.ndim();
     mxnet::TShape strides(ndim, -1);
     for (int i = 0; i != ndim; ++i)
-      strides[i] = s.ProdShape(i+1, ndim);
+      strides[i] = s.ProdShape(i + 1, ndim);
     return strides.get<dim>();
   }
 
@@ -731,26 +731,32 @@ class CuDNNConvolutionOp {
 
   // Allocates a 1D Tensor of words with size in bytes >= `size_bytes`.
   // Always allocates at least one word.
-  mshadow::Tensor<gpu, 1, DType> AllocateTempWorkspace(const OpContext &ctx, size_t size_bytes) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  mshadow::Tensor<gpu, 1, DType> AllocateTempWorkspace(const OpContext& ctx, size_t size_bytes) {
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
     size_t size_words =
-      std::max<size_t>(1, RoundToMultiple(size_bytes, sizeof(DType)) / sizeof(DType));
+        std::max<size_t>(1, RoundToMultiple(size_bytes, sizeof(DType)) / sizeof(DType));
     return ctx.requested[conv::kTempSpace].get_space_typed<gpu, 1, DType>(
         mshadow::Shape1(size_words), s);
   }
 
   // Returns the size in bytes of the 1D Tensor of words.
-  size_t TensorSizeBytes(const mshadow::Tensor<gpu, 1, DType> &tensor) {
+  size_t TensorSizeBytes(const mshadow::Tensor<gpu, 1, DType>& tensor) {
     return tensor.MSize() * sizeof(DType);
   }
 
   // Given a tensor shape of this operation, return the number of features 'c'
-  int64_t Features(const mxnet::TShape &dshape) {
+  int64_t Features(const mxnet::TShape& dshape) {
     int c = 0;
     switch (dshape.ndim()) {
-      case 3: c = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW)[1]; break;
-      case 4: c = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW)[1]; break;
-      case 5: c = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW)[1]; break;
+      case 3:
+        c = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW)[1];
+        break;
+      case 4:
+        c = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW)[1];
+        break;
+      case 5:
+        c = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW)[1];
+        break;
       default:
         LOG(FATAL) << "Unexpected convolution data dimension " << dshape.ndim();
     }
@@ -759,20 +765,22 @@ class CuDNNConvolutionOp {
 
   // Make a number of allocations and directly free them, ensuring room for an equivalent set of
   // cudaMalloc() calls by (say) cudnnFind().  `elements` spec the alloc size in DTypes, not bytes.
-  void ReserveElements(const std::vector<size_t> &elements) {
+  void ReserveElements(const std::vector<size_t>& elements) {
     std::vector<Storage::Handle> handles;
     for (size_t alloc_element : elements) {
-        handles.push_back(Storage::Get()->Alloc(alloc_element * sizeof(DType), Context::GPU()));
-        handles.back().profiler_scope = "<ephemeral>:";
-        handles.back().name = "reserve_elements";
+      handles.push_back(Storage::Get()->Alloc(alloc_element * sizeof(DType), Context::GPU()));
+      handles.back().profiler_scope = "<ephemeral>:";
+      handles.back().name           = "reserve_elements";
     }
-    for (auto &handle : handles)
-        Storage::Get()->DirectFree(handle);
+    for (auto& handle : handles)
+      Storage::Get()->DirectFree(handle);
   }
 
   // Log that no suitable algo was found that met the workspace constraints, then exit.
-  void LogNoSuitableAlgoAndExit(int num_algos_tried, size_t min_memory_needs,
-                                size_t workspace_byte, std::string algo_kind) {
+  void LogNoSuitableAlgoAndExit(int num_algos_tried,
+                                size_t min_memory_needs,
+                                size_t workspace_byte,
+                                std::string algo_kind) {
     LOG(FATAL) << num_algos_tried << " " << algo_kind << " with minimum memory requirement "
                << min_memory_needs << " bytes have been tried. Workspace size is set to "
                << workspace_byte << " bytes, please consider reducing the batch/model size, "
diff --git a/src/operator/nn/cudnn/cudnn_deconvolution-inl.h b/src/operator/nn/cudnn/cudnn_deconvolution-inl.h
index 5c4b11f0148a..382810810766 100644
--- a/src/operator/nn/cudnn/cudnn_deconvolution-inl.h
+++ b/src/operator/nn/cudnn/cudnn_deconvolution-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_deconvolution-inl.h
  * \brief
  * \author Wei Wu, Leonard Lausen
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_CUDNN_CUDNN_DECONVOLUTION_INL_H_
 #define MXNET_OPERATOR_NN_CUDNN_CUDNN_DECONVOLUTION_INL_H_
 
@@ -39,7 +39,7 @@ namespace mxnet {
 namespace op {
 #if MXNET_USE_CUDNN == 1
 
-template<typename DType>
+template <typename DType>
 class CuDNNDeconvolutionOp {
   STATIC_ASSERT_CUDNN_VERSION_GE(7000);
 
@@ -62,35 +62,39 @@ class CuDNNDeconvolutionOp {
             const RunContext& rctx,
             bool add_to_weight) {
     using namespace mshadow;
-    this->param_ = param;
+    this->param_         = param;
     this->add_to_weight_ = add_to_weight;
     InitBufferForParam();
-    auto cudnn_forward_compute_type = convertToCuDNNDataType(forward_compute_type);
+    auto cudnn_forward_compute_type  = convertToCuDNNDataType(forward_compute_type);
     auto cudnn_backward_compute_type = convertToCuDNNDataType(backward_compute_type);
     // convert MB to words
     param_.workspace = (param_.workspace << 20) / sizeof(DType);
-    dtype_ = mshadow::DataType<DType>::kCudnnFlag;
+    dtype_           = mshadow::DataType<DType>::kCudnnFlag;
     // TensorCore algos only allowed on fp16-I/O deconvolutions if permitted by the global policy.
     cudnn_tensor_core_ = DataType<DType>::kFlag == kFloat16 && GetEnvAllowTensorCore();
 
     auto effective_layout = param_.layout.value();
     switch (effective_layout) {
       // 1D convolutions will be executed as 2D convolutions with a height of 1.
-      case mshadow::kNCW: effective_layout = mshadow::kNCHW; break;
-      case mshadow::kNWC: effective_layout = mshadow::kNHWC; break;
-      case mshadow::kCWN: effective_layout = mshadow::kCHWN; break;
-      default: break;
+      case mshadow::kNCW:
+        effective_layout = mshadow::kNCHW;
+        break;
+      case mshadow::kNWC:
+        effective_layout = mshadow::kNHWC;
+        break;
+      case mshadow::kCWN:
+        effective_layout = mshadow::kCHWN;
+        break;
+      default:
+        break;
     }
 
-    MSHADOW_LAYOUT_SWITCH(effective_layout, Layout, {
-        format_ = LayoutType<Layout>::kCudnnFlag;
-      });
+    MSHADOW_LAYOUT_SWITCH(effective_layout, Layout, { format_ = LayoutType<Layout>::kCudnnFlag; });
     // Double check to make sure this class supports the operation
     if (!Supports(param, forward_compute_type, backward_compute_type, rctx.ctx.dev_id))
       LOG(FATAL) << "Deconvolution parameters not supported by cuDNN implementation.";
 
-    InitDescriptors(in_shape, out_shape,
-                    cudnn_forward_compute_type, cudnn_backward_compute_type);
+    InitDescriptors(in_shape, out_shape, cudnn_forward_compute_type, cudnn_backward_compute_type);
 
     if (!param_.cudnn_tune) {
       param_.cudnn_tune = dmlc::GetEnv("MXNET_CUDNN_AUTOTUNE_DEFAULT", 1);
@@ -101,8 +105,7 @@ class CuDNNDeconvolutionOp {
     // approach keeps the treatment of convolution cases uniform and will
     // naturally respond to more algorithms supporting dilated convolutions in
     // future cuDNN releases.
-    SelectAlgo(rctx, in_shape, out_shape,
-               cudnn_forward_compute_type, cudnn_backward_compute_type);
+    SelectAlgo(rctx, in_shape, out_shape, cudnn_forward_compute_type, cudnn_backward_compute_type);
   }
 
   ~CuDNNDeconvolutionOp() {
@@ -115,42 +118,43 @@ class CuDNNDeconvolutionOp {
     CUDNN_CALL(cudnnDestroyConvolutionDescriptor(back_conv_desc_w_));
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     size_t expected = param_.no_bias ? 2 : 3;
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     GetTempSize(ctx);
     Tensor<gpu, 1, DType> workspace = AllocateTempWorkspace(ctx, forward_workspace_byte_);
-    size_t workspace_size = TensorSizeBytes(workspace);
+    size_t workspace_size           = TensorSizeBytes(workspace);
 
     // I/O's should have 2 more dims than the kernel dim
-    DType *data_ptr = GetNdPtr(in_data[deconv::kData], param_.kernel.ndim() + 2, s);
-    DType *wmat_ptr = GetNdPtr(in_data[deconv::kWeight], param_.kernel.ndim() + 2, s);
-    DType *out_ptr = GetNdPtr(out_data[deconv::kOut], param_.kernel.ndim() + 2, s);
+    DType* data_ptr = GetNdPtr(in_data[deconv::kData], param_.kernel.ndim() + 2, s);
+    DType* wmat_ptr = GetNdPtr(in_data[deconv::kWeight], param_.kernel.ndim() + 2, s);
+    DType* out_ptr  = GetNdPtr(out_data[deconv::kOut], param_.kernel.ndim() + 2, s);
 
     for (uint32_t g = 0; g < param_.num_group; ++g) {
       typename DataType<DType>::ScaleType alpha = 1.0f;
       typename DataType<DType>::ScaleType beta  = 0.0f;
-      CUDNN_CALL(cudnnConvolutionBackwardData(s->dnn_handle_,
-                 &alpha,
-                 filter_desc_,
-                 wmat_ptr + weight_offset_ * g,
-                 in_desc_,
-                 data_ptr + data_offset_ * g,
-                 forward_conv_desc_,  // this backward algorithm used for inference
-                 back_algo_.AlgoNumber(),
-                 workspace.dptr_,
-                 workspace_size,
-                 &beta,
-                 out_desc_,
-                 out_ptr + out_offset_ * g));
+      CUDNN_CALL(cudnnConvolutionBackwardData(
+          s->dnn_handle_,
+          &alpha,
+          filter_desc_,
+          wmat_ptr + weight_offset_ * g,
+          in_desc_,
+          data_ptr + data_offset_ * g,
+          forward_conv_desc_,  // this backward algorithm used for inference
+          back_algo_.AlgoNumber(),
+          workspace.dptr_,
+          workspace_size,
+          &beta,
+          out_desc_,
+          out_ptr + out_offset_ * g));
       if (!param_.no_bias) {
-        beta = 1.0f;
+        beta                       = 1.0f;
         Tensor<gpu, 1, DType> bias = in_data[deconv::kBias].get<gpu, 1, DType>(s);
         CUDNN_CALL(cudnnAddTensor(s->dnn_handle_,
                                   &alpha,
@@ -163,25 +167,25 @@ class CuDNNDeconvolutionOp {
     }
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad) {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     size_t expected = param_.no_bias == 0 ? 3 : 2;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(in_data.size(), param_.no_bias ? 2U : 3U);
     CHECK_EQ(in_grad.size(), expected);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
 
     // I/O's should have 2 more dims than the kernel dim
-    DType *grad_ptr = GetNdPtr(out_grad[deconv::kOut], param_.kernel.ndim() + 2, s);
-    DType *wmat_ptr = GetNdPtr(in_data[deconv::kWeight], param_.kernel.ndim() + 2, s);
-    DType *gwmat_ptr = GetNdPtr(in_grad[deconv::kWeight], param_.kernel.ndim() + 2, s);
-    DType *data_ptr = GetNdPtr(in_data[deconv::kData], param_.kernel.ndim() + 2, s);
-    DType *gdata_ptr = GetNdPtr(in_grad[deconv::kData], param_.kernel.ndim() + 2, s);
+    DType* grad_ptr  = GetNdPtr(out_grad[deconv::kOut], param_.kernel.ndim() + 2, s);
+    DType* wmat_ptr  = GetNdPtr(in_data[deconv::kWeight], param_.kernel.ndim() + 2, s);
+    DType* gwmat_ptr = GetNdPtr(in_grad[deconv::kWeight], param_.kernel.ndim() + 2, s);
+    DType* data_ptr  = GetNdPtr(in_data[deconv::kData], param_.kernel.ndim() + 2, s);
+    DType* gdata_ptr = GetNdPtr(in_grad[deconv::kData], param_.kernel.ndim() + 2, s);
 
     CHECK_NE(req[deconv::kWeight], kWriteInplace);
     if (!param_.no_bias) {
@@ -190,33 +194,31 @@ class CuDNNDeconvolutionOp {
     CHECK_NE(req[deconv::kData], kWriteInplace);
     GetTempSize(ctx);
     Tensor<gpu, 1, DType> workspace = AllocateTempWorkspace(ctx, backward_workspace_byte_);
-    size_t workspace_size = TensorSizeBytes(workspace);
+    size_t workspace_size           = TensorSizeBytes(workspace);
     for (uint32_t g = 0; g < param_.num_group; ++g) {
-      typename DataType<DType>::ScaleType alpha = 1.0f;
+      typename DataType<DType>::ScaleType alpha     = 1.0f;
       typename DataType<DType>::ScaleType bias_beta = 0.0f;
       if (!param_.no_bias && req[deconv::kBias] == kAddTo) {
         bias_beta = 1.0f;
       }
-      typename DataType<DType>::ScaleType data_beta =
-        req[deconv::kData] == kAddTo ? 1.0f : 0.0f;
+      typename DataType<DType>::ScaleType data_beta = req[deconv::kData] == kAddTo ? 1.0f : 0.0f;
       typename DataType<DType>::ScaleType weight_beta =
-        req[deconv::kWeight] == kAddTo ? 1.0f : 0.0f;
+          req[deconv::kWeight] == kAddTo ? 1.0f : 0.0f;
       if (req[deconv::kWeight] != kNullOp) {
-       CHECK_EQ(add_to_weight_, req[deconv::kWeight] == kAddTo);
-        CUDNN_CALL(cudnnConvolutionBackwardFilter(
-          s->dnn_handle_,
-          &alpha,
-          out_desc_,
-          grad_ptr + out_offset_ * g,
-          in_desc_,
-          data_ptr + data_offset_ * g,
-          back_conv_desc_,
-          back_algo_w_.AlgoNumber(),
-          workspace.dptr_,
-          workspace_size,
-          &weight_beta,
-          filter_desc_,
-          gwmat_ptr + weight_offset_ * g));
+        CHECK_EQ(add_to_weight_, req[deconv::kWeight] == kAddTo);
+        CUDNN_CALL(cudnnConvolutionBackwardFilter(s->dnn_handle_,
+                                                  &alpha,
+                                                  out_desc_,
+                                                  grad_ptr + out_offset_ * g,
+                                                  in_desc_,
+                                                  data_ptr + data_offset_ * g,
+                                                  back_conv_desc_,
+                                                  back_algo_w_.AlgoNumber(),
+                                                  workspace.dptr_,
+                                                  workspace_size,
+                                                  &weight_beta,
+                                                  filter_desc_,
+                                                  gwmat_ptr + weight_offset_ * g));
       }
       if (!param_.no_bias && (req[deconv::kBias] != kNullOp)) {
         Tensor<gpu, 1, DType> gbias = in_grad[deconv::kBias].get<gpu, 1, DType>(s);
@@ -246,11 +248,11 @@ class CuDNNDeconvolutionOp {
     }
   }
 
-/*!
- * \brief Returns whether the cuDNN library version supports the deconvolution
- * operation described by `param`: cuDNN v5 and earlier does not support
- * dilated convolutions.
- */
+  /*!
+   * \brief Returns whether the cuDNN library version supports the deconvolution
+   * operation described by `param`: cuDNN v5 and earlier does not support
+   * dilated convolutions.
+   */
   static bool Supports(DeconvolutionParam param,
                        int forward_compute_type,
                        int backward_compute_type,
@@ -259,10 +261,9 @@ class CuDNNDeconvolutionOp {
 
     // NDHWC not supported, NHWC not supported in true fp16
     auto layout_val = param.layout.value();
-    auto true_fp16 = DataType<DType>::kFlag == kFloat16 &&
-      (forward_compute_type == kFloat16 || backward_compute_type == kFloat16);
-    if (layout_val == kNDHWC || layout_val == kNWC ||
-        layout_val == kNHWC && true_fp16)
+    auto true_fp16  = DataType<DType>::kFlag == kFloat16 &&
+                     (forward_compute_type == kFloat16 || backward_compute_type == kFloat16);
+    if (layout_val == kNDHWC || layout_val == kNWC || layout_val == kNHWC && true_fp16)
       return false;
 
     // Permits graceful fallback to pseudo-fp16 on heterogenous systems
@@ -278,20 +279,19 @@ class CuDNNDeconvolutionOp {
   }
 
  private:
-/*!
- * \brief Translate an mxnet datatype to the corresponding cudnnDataType_t.
- */
+  /*!
+   * \brief Translate an mxnet datatype to the corresponding cudnnDataType_t.
+   */
   cudnnDataType_t convertToCuDNNDataType(int dtype) {
     cudnnDataType_t converted = CUDNN_DATA_FLOAT;
     // The following will always assign to `converted` or throw an exception.
-    MSHADOW_REAL_TYPE_SWITCH(dtype, mxDType, {
-      converted = mshadow::DataType<mxDType>::kCudnnFlag;
-    })
+    MSHADOW_REAL_TYPE_SWITCH(
+        dtype, mxDType, { converted = mshadow::DataType<mxDType>::kCudnnFlag; })
     return converted;
   }
 
-  inline void InitDescriptors(const mxnet::ShapeVector &in_shape,
-                              const mxnet::ShapeVector &out_shape,
+  inline void InitDescriptors(const mxnet::ShapeVector& in_shape,
+                              const mxnet::ShapeVector& out_shape,
                               cudnnDataType_t cudnn_forward_compute_type,
                               cudnnDataType_t cudnn_backward_compute_type) {
     using namespace mshadow;
@@ -317,10 +317,10 @@ class CuDNNDeconvolutionOp {
         o_pad[0] = 0;
         o_pad[1] = o_pad_1D[0];
       }
-      auto stride = param_.kernel.ndim() == 2 ?
-        param_.stride : mxnet::TShape({1, param_.stride[0]});
-      auto dilate = param_.kernel.ndim() == 2 ?
-        param_.dilate : mxnet::TShape({1, param_.dilate[0]});
+      auto stride =
+          param_.kernel.ndim() == 2 ? param_.stride : mxnet::TShape({1, param_.stride[0]});
+      auto dilate =
+          param_.kernel.ndim() == 2 ? param_.dilate : mxnet::TShape({1, param_.dilate[0]});
 
       CUDNN_CALL(cudnnSetConvolution2dDescriptor(forward_conv_desc_,
                                                  o_pad[0],
@@ -350,37 +350,32 @@ class CuDNNDeconvolutionOp {
                                                  CUDNN_CROSS_CORRELATION,
                                                  cudnn_backward_compute_type));
       if (param_.kernel.ndim() == 2) {
-        wshape = ConvertLayout(wshape.get<4>(), param_.layout.value(), kNCHW);
+        wshape  = ConvertLayout(wshape.get<4>(), param_.layout.value(), kNCHW);
         dstride = ConvertLayout(Strides<4>(dshape), param_.layout.value(), kNCHW);
-        dshape = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW);
+        dshape  = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW);
         ostride = ConvertLayout(Strides<4>(oshape), param_.layout.value(), kNCHW);
-        oshape = ConvertLayout(oshape.get<4>(), param_.layout.value(), kNCHW);
+        oshape  = ConvertLayout(oshape.get<4>(), param_.layout.value(), kNCHW);
       } else {
-        wshape = ConvertLayout(wshape.get<3>(), param_.layout.value(), kNCW);
-        wshape = mxnet::TShape({wshape[0], wshape[1], 1, wshape[2]});
+        wshape  = ConvertLayout(wshape.get<3>(), param_.layout.value(), kNCW);
+        wshape  = mxnet::TShape({wshape[0], wshape[1], 1, wshape[2]});
         dstride = ConvertLayout(Strides<3>(dshape), param_.layout.value(), kNCW);
         dstride = mxnet::TShape({dstride[0], dstride[1], dstride[1], dstride[2]});
-        dshape = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW);
-        dshape = mxnet::TShape({dshape[0], dshape[1], 1, dshape[2]});
+        dshape  = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW);
+        dshape  = mxnet::TShape({dshape[0], dshape[1], 1, dshape[2]});
         ostride = ConvertLayout(Strides<3>(oshape), param_.layout.value(), kNCW);
         ostride = mxnet::TShape({ostride[0], ostride[1], ostride[1], ostride[2]});
-        oshape = ConvertLayout(oshape.get<3>(), param_.layout.value(), kNCW);
-        oshape = mxnet::TShape({oshape[0], oshape[1], 1, oshape[2]});
+        oshape  = ConvertLayout(oshape.get<3>(), param_.layout.value(), kNCW);
+        oshape  = mxnet::TShape({oshape[0], oshape[1], 1, oshape[2]});
       }
-      CUDNN_CALL(cudnnSetFilter4dDescriptor(filter_desc_,
-                                            dtype_,
-                                            format_,
-                                            wshape[0],
-                                            wshape[1],
-                                            wshape[2],
-                                            wshape[3]));
+      CUDNN_CALL(cudnnSetFilter4dDescriptor(
+          filter_desc_, dtype_, format_, wshape[0], wshape[1], wshape[2], wshape[3]));
 #if CUDNN_VERSION >= 7301 && CUDNN_VERSION < 7500
       auto kernel_h = wshape[2];
       auto kernel_w = wshape[3];
       auto stride_h = stride[0];
       auto stride_w = stride[1];
-      auto pad_h = o_pad[0];
-      auto pad_w = o_pad[1];
+      auto pad_h    = o_pad[0];
+      auto pad_w    = o_pad[1];
       if (param_.layout.value() == kNCHW &&
           (((stride_h == 2) && (kernel_h % 2 == 0) && (pad_h % 2 == 0)) ||
            ((stride_w == 2) && (kernel_w % 2 == 0) && (pad_w % 2 == 0)))) {
@@ -425,21 +420,20 @@ class CuDNNDeconvolutionOp {
                                                  cudnn_backward_compute_type));
 
       dstride = ConvertLayout(Strides<5>(dshape), param_.layout.value(), kNCDHW);
-      dshape = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW);
+      dshape  = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW);
       ostride = ConvertLayout(Strides<5>(oshape), param_.layout.value(), kNCDHW);
-      oshape = ConvertLayout(oshape.get<5>(), param_.layout.value(), kNCDHW);
+      oshape  = ConvertLayout(oshape.get<5>(), param_.layout.value(), kNCDHW);
     }
     // Set "allow tensor core" flag in convolution descriptors, if available.
-    cudnnMathType_t math_type = cudnn_tensor_core_ ? CUDNN_TENSOR_OP_MATH
-                                                   : CUDNN_DEFAULT_MATH;
+    cudnnMathType_t math_type = cudnn_tensor_core_ ? CUDNN_TENSOR_OP_MATH : CUDNN_DEFAULT_MATH;
     CUDNN_CALL(cudnnSetConvolutionMathType(forward_conv_desc_, math_type));
     CUDNN_CALL(cudnnSetConvolutionMathType(back_conv_desc_, math_type));
     CUDNN_CALL(cudnnSetConvolutionMathType(back_conv_desc_w_, math_type));
     dshape[1] /= param_.num_group;
     oshape[1] /= param_.num_group;
     weight_offset_ = wshape.Size();
-    data_offset_ = dstride[1] * dshape[1];
-    out_offset_ = ostride[1] * oshape[1];
+    data_offset_   = dstride[1] * dshape[1];
+    out_offset_    = ostride[1] * oshape[1];
 
     std::vector<int> dshape_buffer(dshape.ndim());
     std::vector<int> dstride_buffer(dstride.ndim());
@@ -458,12 +452,10 @@ class CuDNNDeconvolutionOp {
                                           CastTShapeToIntPtr(ostride, &ostride_buffer)));
 
     if (!param_.no_bias) {
-      mxnet::TShape bias = in_shape[deconv::kBias];
-      bias_offset_ = bias[0] / param_.num_group;
-      int bias_dim = static_cast<int>(bias_offset_);
-      std::vector<int> bias_shape = {1,
-                                     bias_dim,
-                                     1, 1};
+      mxnet::TShape bias           = in_shape[deconv::kBias];
+      bias_offset_                 = bias[0] / param_.num_group;
+      int bias_dim                 = static_cast<int>(bias_offset_);
+      std::vector<int> bias_shape  = {1, bias_dim, 1, 1};
       std::vector<int> bias_stride = {bias_dim, 1, bias_dim, bias_dim};
       if (param_.kernel.ndim() == 3) {
         bias_shape.push_back(1);
@@ -482,11 +474,11 @@ class CuDNNDeconvolutionOp {
                        const mxnet::ShapeVector& out_shape,
                        cudnnDataType_t cudnn_forward_compute_type,
                        cudnnDataType_t cudnn_backward_compute_type,
-                       CuDNNAlgo<cudnnConvolutionFwdAlgo_t> *fwd,
-                       CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t> *bwd,
-                       CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t> *flt) {
+                       CuDNNAlgo<cudnnConvolutionFwdAlgo_t>* fwd,
+                       CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t>* bwd,
+                       CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t>* flt) {
     // Not in algo registry, must determine via *Get*() or *Find*()
-    mshadow::Stream <gpu> *s = rctx.get_stream<gpu>();
+    mshadow::Stream<gpu>* s = rctx.get_stream<gpu>();
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     size_t workspace_byte = static_cast<size_t>(param_.workspace * sizeof(DType));
 
@@ -495,10 +487,10 @@ class CuDNNDeconvolutionOp {
 
     // Forward Algorithm Find/Get() v7
     std::vector<cudnnConvolutionFwdAlgoPerf_t> fwd_results(MaxForwardAlgos(s->dnn_handle_));
-    int actual_fwd_algos = 0;
-    auto fwd_algo_discoverer =
-        param_.cudnn_tune.value() == deconv::kOff ? cudnnGetConvolutionForwardAlgorithm_v7
-                                                : cudnnFindConvolutionForwardAlgorithm;
+    int actual_fwd_algos     = 0;
+    auto fwd_algo_discoverer = param_.cudnn_tune.value() == deconv::kOff
+                                   ? cudnnGetConvolutionForwardAlgorithm_v7
+                                   : cudnnFindConvolutionForwardAlgorithm;
     CUDNN_CALL((*fwd_algo_discoverer)(s->dnn_handle_,
                                       out_desc_,
                                       filter_desc_,
@@ -508,9 +500,8 @@ class CuDNNDeconvolutionOp {
                                       &actual_fwd_algos,
                                       fwd_results.data()));
     fwd_results.resize(actual_fwd_algos);
-    AlgoFinalSelect<cudnnConvolutionFwdAlgoPerf_t,
-        cudnnConvolutionFwdAlgo_t>(fwd_results, "forward",
-                                   workspace_byte, fwd);
+    AlgoFinalSelect<cudnnConvolutionFwdAlgoPerf_t, cudnnConvolutionFwdAlgo_t>(
+        fwd_results, "forward", workspace_byte, fwd);
 
     // Backprop-to-Filter Algorithm Find/Get() v7
     auto max_bwd_filt_algos = MaxBackwardFilterAlgos(s->dnn_handle_);
@@ -518,9 +509,9 @@ class CuDNNDeconvolutionOp {
     int actual_bwd_filter_algos = 0;
     // In cudnn v7.1.4, find() returned wgrad algos that could fail for large c if we
     // were summing into the output (i.e. beta != 0).  Get() returned OK algos though.
-    auto bwd_filter_algo_discoverer =
-        param_.cudnn_tune.value() == deconv::kOff ? cudnnGetConvolutionBackwardFilterAlgorithm_v7
-                                                  : cudnnFindConvolutionBackwardFilterAlgorithm;
+    auto bwd_filter_algo_discoverer = param_.cudnn_tune.value() == deconv::kOff
+                                          ? cudnnGetConvolutionBackwardFilterAlgorithm_v7
+                                          : cudnnFindConvolutionBackwardFilterAlgorithm;
     CUDNN_CALL((*bwd_filter_algo_discoverer)(s->dnn_handle_,
                                              out_desc_,
                                              in_desc_,
@@ -530,16 +521,15 @@ class CuDNNDeconvolutionOp {
                                              &actual_bwd_filter_algos,
                                              bwd_filt_results.data()));
     bwd_filt_results.resize(actual_bwd_filter_algos);
-    AlgoFinalSelect<cudnnConvolutionBwdFilterAlgoPerf_t,
-        cudnnConvolutionBwdFilterAlgo_t>(bwd_filt_results, "backprop-to-filter",
-                                         workspace_byte, flt);
+    AlgoFinalSelect<cudnnConvolutionBwdFilterAlgoPerf_t, cudnnConvolutionBwdFilterAlgo_t>(
+        bwd_filt_results, "backprop-to-filter", workspace_byte, flt);
     // Backprop-to-Data Algorithm Find/Get() v7
     auto max_bwd_data_algos = MaxBackwardDataAlgos(s->dnn_handle_);
     std::vector<cudnnConvolutionBwdDataAlgoPerf_t> bwd_data_results(max_bwd_data_algos);
-    int actual_bwd_data_algos = 0;
-    auto bwd_data_algo_discoverer =
-        param_.cudnn_tune.value() == deconv::kOff ? cudnnGetConvolutionBackwardDataAlgorithm_v7
-                                                : cudnnFindConvolutionBackwardDataAlgorithm;
+    int actual_bwd_data_algos     = 0;
+    auto bwd_data_algo_discoverer = param_.cudnn_tune.value() == deconv::kOff
+                                        ? cudnnGetConvolutionBackwardDataAlgorithm_v7
+                                        : cudnnFindConvolutionBackwardDataAlgorithm;
     CUDNN_CALL((*bwd_data_algo_discoverer)(s->dnn_handle_,
                                            filter_desc_,
                                            in_desc_,
@@ -549,9 +539,8 @@ class CuDNNDeconvolutionOp {
                                            &actual_bwd_data_algos,
                                            bwd_data_results.data()));
     bwd_data_results.resize(actual_bwd_data_algos);
-    AlgoFinalSelect<cudnnConvolutionBwdDataAlgoPerf_t,
-        cudnnConvolutionBwdDataAlgo_t>(bwd_data_results, "backprop-to-data",
-                                       workspace_byte, bwd, exclude_dgrad_algo_);
+    AlgoFinalSelect<cudnnConvolutionBwdDataAlgoPerf_t, cudnnConvolutionBwdDataAlgo_t>(
+        bwd_data_results, "backprop-to-data", workspace_byte, bwd, exclude_dgrad_algo_);
 
     // Fix for issue #11241
     int cudnn_find_issue_max_features = 64 * 1024;
@@ -566,15 +555,19 @@ class CuDNNDeconvolutionOp {
                   const mxnet::ShapeVector& out_shape,
                   cudnnDataType_t cudnn_forward_compute_type,
                   cudnnDataType_t cudnn_backward_compute_type) {
-    auto algo_setter = [&](CuDNNAlgo<cudnnConvolutionFwdAlgo_t> *fwd,
-                           CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t> *bwd,
-                           CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t> *flt) {
+    auto algo_setter = [&](CuDNNAlgo<cudnnConvolutionFwdAlgo_t>* fwd,
+                           CuDNNAlgo<cudnnConvolutionBwdDataAlgo_t>* bwd,
+                           CuDNNAlgo<cudnnConvolutionBwdFilterAlgo_t>* flt) {
       if (param_.cudnn_tune.value() == deconv::kOff) {
         // The routine will only be calling cudnnGet, so no need to grab the Storage lock.
-        this->CuDNNAlgoSetter(rctx, in_shape, out_shape,
+        this->CuDNNAlgoSetter(rctx,
+                              in_shape,
+                              out_shape,
                               cudnn_forward_compute_type,
                               cudnn_backward_compute_type,
-                              fwd, bwd, flt);
+                              fwd,
+                              bwd,
+                              flt);
       } else {
         // One potential problem is that cudnnFind() uses cudaMalloc() to directly allocate
         // I/O and workspace areas, and these allocations may result in an out-of-memory
@@ -596,10 +589,14 @@ class CuDNNDeconvolutionOp {
         // of cudnnFind's internal temporary allocations.  Grabbing the lock might also
         // impede other threads from launching work on the GPU.
         std::lock_guard<std::mutex> lock(Storage::Get()->GetMutex(Context::kGPU));
-        this->CuDNNAlgoSetter(rctx, in_shape, out_shape,
+        this->CuDNNAlgoSetter(rctx,
+                              in_shape,
+                              out_shape,
                               cudnn_forward_compute_type,
                               cudnn_backward_compute_type,
-                              fwd, bwd, flt);
+                              fwd,
+                              bwd,
+                              flt);
       }
     };
 
@@ -607,11 +604,18 @@ class CuDNNDeconvolutionOp {
     // convolution will match only if identically specified.
     // We're caching results of *Get* as well as *Find*, but these records
     // will be held distinctly because param_.cudnn_tune is part of the key.
-    CuDNNDeconvAlgoReg::Get()->FindOrElseRegister(param_, in_shape, out_shape, dtype_,
-                                         cudnn_forward_compute_type,
-                                         cudnn_backward_compute_type,
-                                         SMArch(rctx.ctx.dev_id), add_to_weight_,
-                                         &forward_algo_, &back_algo_, &back_algo_w_, algo_setter);
+    CuDNNDeconvAlgoReg::Get()->FindOrElseRegister(param_,
+                                                  in_shape,
+                                                  out_shape,
+                                                  dtype_,
+                                                  cudnn_forward_compute_type,
+                                                  cudnn_backward_compute_type,
+                                                  SMArch(rctx.ctx.dev_id),
+                                                  add_to_weight_,
+                                                  &forward_algo_,
+                                                  &back_algo_,
+                                                  &back_algo_w_,
+                                                  algo_setter);
 
     // If we're allowing Tensor Core variants of the algos to be considered in
     // *Find*() or *Get*(), but a non-Tensor-Core algo variant is the fastest,
@@ -632,16 +636,18 @@ class CuDNNDeconvolutionOp {
   // Look over the results from *Find*() or *Get*() and pick the fastest algo given possible
   // workspace constraints and a possible user algo preference.
   template <typename PerfType, typename AlgoType>
-  void AlgoFinalSelect(const std::vector<PerfType> &perf_results, std::string kernel_name,
-                       size_t workspace_byte, CuDNNAlgo<AlgoType> *algo,
+  void AlgoFinalSelect(const std::vector<PerfType>& perf_results,
+                       std::string kernel_name,
+                       size_t workspace_byte,
+                       CuDNNAlgo<AlgoType>* algo,
                        int32_t algo_exclude = -1) {
     // Determine the fastest acceptable algo regardless of mathType.
     bool enforce_determinism = dmlc::GetEnv("MXNET_ENFORCE_DETERMINISM", false);
     for (decltype(perf_results.size()) i = 0; i != perf_results.size(); ++i) {
-      const auto &result = perf_results[i];
-      bool algo_exclusion = static_cast<int32_t>(result.algo) == algo_exclude;
+      const auto& result       = perf_results[i];
+      bool algo_exclusion      = static_cast<int32_t>(result.algo) == algo_exclude;
       bool algo_is_tensor_core = false;
-      algo_is_tensor_core = result.mathType == CUDNN_TENSOR_OP_MATH;
+      algo_is_tensor_core      = result.mathType == CUDNN_TENSOR_OP_MATH;
       if (result.status == CUDNN_STATUS_SUCCESS &&
           (!enforce_determinism || result.determinism == cudnnDeterminism_t::CUDNN_DETERMINISTIC) &&
           (param_.cudnn_tune.value() != deconv::kLimited || result.memory <= workspace_byte) &&
@@ -656,48 +662,47 @@ class CuDNNDeconvolutionOp {
                << " please consider reducing batch/model size or increasing the workspace size";
   }
 
-
   void GetTempSize(const OpContext& ctx) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-    size_t back_data_algo_workspace_size = 0;
+    mshadow::Stream<gpu>* s                = ctx.get_stream<gpu>();
+    size_t back_data_algo_workspace_size   = 0;
     size_t back_filter_algo_workspace_size = 0;
-    size_t forward_algo_workspace_size = 0;
+    size_t forward_algo_workspace_size     = 0;
     CUDNN_CALL(cudnnGetConvolutionBackwardDataWorkspaceSize(s->dnn_handle_,
-               filter_desc_,
-               in_desc_,
-               forward_conv_desc_,
-               out_desc_,
-               back_algo_.AlgoNumber(),
-               &back_data_algo_workspace_size));
+                                                            filter_desc_,
+                                                            in_desc_,
+                                                            forward_conv_desc_,
+                                                            out_desc_,
+                                                            back_algo_.AlgoNumber(),
+                                                            &back_data_algo_workspace_size));
     CUDNN_CALL(cudnnGetConvolutionBackwardFilterWorkspaceSize(s->dnn_handle_,
-               out_desc_,
-               in_desc_,
-               back_conv_desc_,
-               filter_desc_,
-               back_algo_w_.AlgoNumber(),
-               &back_filter_algo_workspace_size));
+                                                              out_desc_,
+                                                              in_desc_,
+                                                              back_conv_desc_,
+                                                              filter_desc_,
+                                                              back_algo_w_.AlgoNumber(),
+                                                              &back_filter_algo_workspace_size));
     CUDNN_CALL(cudnnGetConvolutionForwardWorkspaceSize(s->dnn_handle_,
-               out_desc_,
-               filter_desc_,
-               back_conv_desc_,
-               in_desc_,
-               forward_algo_.AlgoNumber(),
-               &forward_algo_workspace_size));
+                                                       out_desc_,
+                                                       filter_desc_,
+                                                       back_conv_desc_,
+                                                       in_desc_,
+                                                       forward_algo_.AlgoNumber(),
+                                                       &forward_algo_workspace_size));
 
     forward_workspace_byte_ = back_data_algo_workspace_size;
-    backward_workspace_byte_ = std::max(forward_algo_workspace_size,
-                                        back_filter_algo_workspace_size);
+    backward_workspace_byte_ =
+        std::max(forward_algo_workspace_size, back_filter_algo_workspace_size);
   }
 
-  int *CastTShapeToIntPtr(const mxnet::TShape& s, std::vector<int> *buffer) {
+  int* CastTShapeToIntPtr(const mxnet::TShape& s, std::vector<int>* buffer) {
     buffer->resize(s.ndim());
     nnvm::ShapeTypeCast(s.begin(), s.end(), buffer->data());
     return buffer->data();
   }
 
   // Converts a TBlob to a dptr, checking for the expected dim and that it's contiguous.
-  DType *GetNdPtr(const TBlob& tb, int dim, Stream<gpu> *s) {
-    DType *data_ptr = nullptr;
+  DType* GetNdPtr(const TBlob& tb, int dim, Stream<gpu>* s) {
+    DType* data_ptr = nullptr;
     if (dim == 3) {
       Tensor<gpu, 3, DType> data = tb.get<gpu, 3, DType>(s);
       CHECK_EQ(data.CheckContiguous(), true);
@@ -719,11 +724,11 @@ class CuDNNDeconvolutionOp {
   // Converts a mxnet::TShape to a Shape<> of strides.
   // e.g. {shape[0], shape[1], shape[2]} -> {shape[1]*shape[2], shape[2], 1}
   template <int dim>
-  inline Shape<dim> Strides(const mxnet::TShape &s) {
+  inline Shape<dim> Strides(const mxnet::TShape& s) {
     int ndim = s.ndim();
     mxnet::TShape strides(ndim, -1);
     for (int i = 0; i != ndim; ++i)
-      strides[i] = s.ProdShape(i+1, ndim);
+      strides[i] = s.ProdShape(i + 1, ndim);
     return strides.get<dim>();
   }
 
@@ -734,26 +739,31 @@ class CuDNNDeconvolutionOp {
 
   // Allocates a 1D Tensor of words with size in bytes >= `size_bytes`.
   // Always allocates at least one word.
-  mshadow::Tensor<gpu, 1, DType> AllocateTempWorkspace(const OpContext &ctx, size_t size_bytes) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-    size_t size_words = size_bytes / sizeof(DType) + 1;
+  mshadow::Tensor<gpu, 1, DType> AllocateTempWorkspace(const OpContext& ctx, size_t size_bytes) {
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    size_t size_words       = size_bytes / sizeof(DType) + 1;
     return ctx.requested[deconv::kTempSpace].get_space_typed<gpu, 1, DType>(
         mshadow::Shape1(size_words), s);
   }
 
   // Returns the size in bytes of the 1D Tensor of words.
-  size_t TensorSizeBytes(const mshadow::Tensor<gpu, 1, DType> &tensor) {
+  size_t TensorSizeBytes(const mshadow::Tensor<gpu, 1, DType>& tensor) {
     return tensor.MSize() * sizeof(DType);
   }
 
-
   // Given a tensor shape of this operation, return the number of features 'c'
-  int64_t Features(const mxnet::TShape &dshape) {
+  int64_t Features(const mxnet::TShape& dshape) {
     int c = 0;
     switch (dshape.ndim()) {
-      case 3: c = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW)[1]; break;
-      case 4: c = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW)[1]; break;
-      case 5: c = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW)[1]; break;
+      case 3:
+        c = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW)[1];
+        break;
+      case 4:
+        c = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW)[1];
+        break;
+      case 5:
+        c = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW)[1];
+        break;
       default:
         LOG(FATAL) << "Unexpected deconvolution data dimension " << dshape.ndim();
     }
@@ -762,21 +772,22 @@ class CuDNNDeconvolutionOp {
 
   // Make a number of allocations and directly free them, ensuring room for an equivalent set of
   // cudaMalloc() calls by (say) cudnnFind().  `elements` spec the alloc size in DTypes, not bytes.
-  void ReserveElements(const std::vector<size_t> &elements) {
+  void ReserveElements(const std::vector<size_t>& elements) {
     std::vector<Storage::Handle> handles;
     for (size_t alloc_element : elements) {
-        handles.push_back(Storage::Get()->Alloc(alloc_element * sizeof(DType), Context::GPU()));
-        handles.back().profiler_scope = "<ephemeral>:";
-        handles.back().name = "reserve_elements";
+      handles.push_back(Storage::Get()->Alloc(alloc_element * sizeof(DType), Context::GPU()));
+      handles.back().profiler_scope = "<ephemeral>:";
+      handles.back().name           = "reserve_elements";
     }
-    for (auto &handle : handles)
-        Storage::Get()->DirectFree(handle);
+    for (auto& handle : handles)
+      Storage::Get()->DirectFree(handle);
   }
 
-
   // Log that no suitable algo was found that met the workspace constraints, then exit.
-  void LogNoSuitableAlgoAndExit(int num_algos_tried, size_t min_memory_needs,
-                                size_t workspace_byte, std::string algo_kind) {
+  void LogNoSuitableAlgoAndExit(int num_algos_tried,
+                                size_t min_memory_needs,
+                                size_t workspace_byte,
+                                std::string algo_kind) {
     LOG(FATAL) << num_algos_tried << " " << algo_kind << " with minimum memory requirement "
                << min_memory_needs << " bytes have been tried. Workspace size is set to "
                << workspace_byte << " bytes, please consider reducing the batch/model size, "
diff --git a/src/operator/nn/cudnn/cudnn_pooling-inl.h b/src/operator/nn/cudnn/cudnn_pooling-inl.h
index f52848b4a452..d6de60a04496 100644
--- a/src/operator/nn/cudnn/cudnn_pooling-inl.h
+++ b/src/operator/nn/cudnn/cudnn_pooling-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_pooling-inl.h
  * \brief
  * \author Bing Xu, Dick Carter
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_CUDNN_CUDNN_POOLING_INL_H_
 #define MXNET_OPERATOR_NN_CUDNN_CUDNN_POOLING_INL_H_
@@ -33,7 +33,7 @@
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 class CuDNNPoolingOp {
   STATIC_ASSERT_CUDNN_VERSION_GE(7000);
 
@@ -46,12 +46,12 @@ class CuDNNPoolingOp {
     CUDNN_CALL(cudnnCreateTensorDescriptor(&out_desc_));
   }
 
-  void Init(const PoolingParam &p) {
+  void Init(const PoolingParam& p) {
     param_ = p;
     switch (param_.pool_type) {
       case pool_enum::kMaxPooling:
-        mode_ = dmlc::GetEnv("MXNET_ENFORCE_DETERMINISM", false) ?
-          CUDNN_POOLING_MAX_DETERMINISTIC : CUDNN_POOLING_MAX;
+        mode_ = dmlc::GetEnv("MXNET_ENFORCE_DETERMINISM", false) ? CUDNN_POOLING_MAX_DETERMINISTIC
+                                                                 : CUDNN_POOLING_MAX;
         break;
       case pool_enum::kAvgPooling:
         if (param_.count_include_pad.has_value() && !param_.count_include_pad.value()) {
@@ -71,19 +71,21 @@ class CuDNNPoolingOp {
     CUDNN_CALL(cudnnDestroyPoolingDescriptor(pooling_desc_));
   }
 
-  void Forward(const OpContext &ctx, const TBlob &in_data,
-      const OpReqType &req, const TBlob &out_data) {
+  void Forward(const OpContext& ctx,
+               const TBlob& in_data,
+               const OpReqType& req,
+               const TBlob& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType beta  = 0.0f;
     CHECK(this->Init(s, in_data, out_data)) << "cuDNN Pooling invoked with unsupported parameters.";
     if (param_.kernel.ndim() == 2) {
       // 2d pool
       Tensor<gpu, 4, DType> data = in_data.get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> out = out_data.get<gpu, 4, DType>(s);
+      Tensor<gpu, 4, DType> out  = out_data.get<gpu, 4, DType>(s);
       CHECK_EQ(data.CheckContiguous(), true);
       CHECK_EQ(out.CheckContiguous(), true);
       CUDNN_CALL(cudnnPoolingForward(s->dnn_handle_,
@@ -97,7 +99,7 @@ class CuDNNPoolingOp {
     } else if (param_.kernel.ndim() == 3) {
       // 3d pool
       Tensor<gpu, 5, DType> data = in_data.get<gpu, 5, DType>(s);
-      Tensor<gpu, 5, DType> out = out_data.get<gpu, 5, DType>(s);
+      Tensor<gpu, 5, DType> out  = out_data.get<gpu, 5, DType>(s);
       CHECK_EQ(data.CheckContiguous(), true);
       CHECK_EQ(out.CheckContiguous(), true);
       CUDNN_CALL(cudnnPoolingForward(s->dnn_handle_,
@@ -113,23 +115,26 @@ class CuDNNPoolingOp {
     }
   }
 
-  void Backward(const OpContext &ctx, const TBlob &out_grad,
-      const TBlob &in_data, const TBlob &out_data,
-      const OpReqType &req, const TBlob &in_grad) {
+  void Backward(const OpContext& ctx,
+                const TBlob& out_grad,
+                const TBlob& in_data,
+                const TBlob& out_data,
+                const OpReqType& req,
+                const TBlob& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     typename DataType<DType>::ScaleType alpha = 1.0f;
-    typename DataType<DType>::ScaleType beta = 0.0f;
+    typename DataType<DType>::ScaleType beta  = 0.0f;
     CHECK(this->Init(s, in_data, out_data)) << "cuDNN Pooling invoked with unsupported parameters.";
     if (param_.kernel.ndim() == 2) {
       // 2d pool
       Tensor<gpu, 4, DType> m_out_grad = out_grad.get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> m_in_data = in_data.get<gpu, 4, DType>(s);
+      Tensor<gpu, 4, DType> m_in_data  = in_data.get<gpu, 4, DType>(s);
       Tensor<gpu, 4, DType> m_out_data = out_data.get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> m_in_grad = in_grad.get<gpu, 4, DType>(s);
+      Tensor<gpu, 4, DType> m_in_grad  = in_grad.get<gpu, 4, DType>(s);
       CUDNN_CALL(cudnnPoolingBackward(s->dnn_handle_,
                                       pooling_desc_,
                                       &alpha,
@@ -145,9 +150,9 @@ class CuDNNPoolingOp {
     } else if (param_.kernel.ndim() == 3) {
       // 3d pool
       Tensor<gpu, 5, DType> m_out_grad = out_grad.get<gpu, 5, DType>(s);
-      Tensor<gpu, 5, DType> m_in_data = in_data.get<gpu, 5, DType>(s);
+      Tensor<gpu, 5, DType> m_in_data  = in_data.get<gpu, 5, DType>(s);
       Tensor<gpu, 5, DType> m_out_data = out_data.get<gpu, 5, DType>(s);
-      Tensor<gpu, 5, DType> m_in_grad = in_grad.get<gpu, 5, DType>(s);
+      Tensor<gpu, 5, DType> m_in_grad  = in_grad.get<gpu, 5, DType>(s);
       CUDNN_CALL(cudnnPoolingBackward(s->dnn_handle_,
                                       pooling_desc_,
                                       &alpha,
@@ -165,17 +170,17 @@ class CuDNNPoolingOp {
     }
   }
 
-/*!
- * \brief Returns whether the cuDNN library version supports the pooling operation
- * described by `param`: cuDNN v5 and earlier does not support 3D pooling for example.
- * CuDNN v7.1.4 backprop kernel doesn't support kernel sizes 9 and above.
- */
-  static bool Supports(const PoolingParam &param, const TBlob& input) {
+  /*!
+   * \brief Returns whether the cuDNN library version supports the pooling operation
+   * described by `param`: cuDNN v5 and earlier does not support 3D pooling for example.
+   * CuDNN v7.1.4 backprop kernel doesn't support kernel sizes 9 and above.
+   */
+  static bool Supports(const PoolingParam& param, const TBlob& input) {
     using namespace mshadow;
-    static bool sum_pooling_warning_issued = false;
-    static bool lp_pooling_warning_issued = false;
+    static bool sum_pooling_warning_issued     = false;
+    static bool lp_pooling_warning_issued      = false;
     static bool unsupported_dim_warning_issued = false;
-    int layout = param.GetLayout(input.ndim());
+    int layout                                 = param.GetLayout(input.ndim());
 
     switch (param.pool_type) {
       case pool_enum::kMaxPooling:
@@ -205,18 +210,18 @@ class CuDNNPoolingOp {
       // CuDNN v7.1.4 backprop kernel doesn't support kernel sizes 9 and above.
       // Perform shape calculations in a standard (NCHW) layout space
       mshadow::Shape<4> input_shape = input.shape_.get<4>();
-      mshadow::Shape<4> dshape_nchw = (layout == mshadow::kNHWC) ?
-                                      ConvertLayout(input_shape, mshadow::kNHWC, mshadow::kNCHW) :
-                                      input_shape;
+      mshadow::Shape<4> dshape_nchw =
+          (layout == mshadow::kNHWC) ? ConvertLayout(input_shape, mshadow::kNHWC, mshadow::kNCHW)
+                                     : input_shape;
       int kernel_height = param.global_pool ? dshape_nchw[2] : param.kernel[0];
-      int kernel_width = param.global_pool ? dshape_nchw[3] : param.kernel[1];
+      int kernel_width  = param.global_pool ? dshape_nchw[3] : param.kernel[1];
       if (kernel_height > 8 || kernel_width > 8)
         return false;
 #endif
 #if CUDNN_VERSION >= 7105 && CUDNN_VERSION < 7500
       // Avoid strided NHWC max pooling for some configs
-      if (layout == mshadow::kNHWC &&
-          param.pool_type == pool_enum::kMaxPooling && !param.global_pool) {
+      if (layout == mshadow::kNHWC && param.pool_type == pool_enum::kMaxPooling &&
+          !param.global_pool) {
         if (param.stride[0] >= 3 ||
             param.stride[0] == 2 && param.kernel[0] % 2 == 0 && param.kernel[0] != 2)
           return false;
@@ -240,26 +245,25 @@ class CuDNNPoolingOp {
 
  private:
   // Return boolean saying whether pooling configuration is supported
-  inline bool Init(mshadow::Stream<gpu> *s, const TBlob &in_data,
-      const TBlob &out_data) {
+  inline bool Init(mshadow::Stream<gpu>* s, const TBlob& in_data, const TBlob& out_data) {
     using namespace mshadow;
     bool is_supported = true;
-    nan_prop_ = CUDNN_NOT_PROPAGATE_NAN;
-    int layout = param_.GetLayout(in_data.ndim());
+    nan_prop_         = CUDNN_NOT_PROPAGATE_NAN;
+    int layout        = param_.GetLayout(in_data.ndim());
     if (param_.kernel.ndim() == 2) {
       // 2d pooling
       CHECK(layout == mshadow::kNCHW || layout == mshadow::kNHWC) << "Need 2D layout NCHW or NHWC.";
-      cudnnTensorFormat_t cudnn_layout = (layout == mshadow::kNCHW) ? CUDNN_TENSOR_NCHW
-                                                                    : CUDNN_TENSOR_NHWC;
+      cudnnTensorFormat_t cudnn_layout =
+          (layout == mshadow::kNCHW) ? CUDNN_TENSOR_NCHW : CUDNN_TENSOR_NHWC;
       Tensor<gpu, 4, DType> data = in_data.get<gpu, 4, DType>(s);
-      Tensor<gpu, 4, DType> out = out_data.get<gpu, 4, DType>(s);
+      Tensor<gpu, 4, DType> out  = out_data.get<gpu, 4, DType>(s);
       // Perform shape calculations in a standard (NCHW) layout space
-      mshadow::Shape<4> dshape_nchw = (layout == mshadow::kNHWC) ?
-                                      ConvertLayout(data.shape_, mshadow::kNHWC, mshadow::kNCHW) :
-                                      data.shape_;
-      mshadow::Shape<4> oshape_nchw = (layout == mshadow::kNHWC) ?
-                                      ConvertLayout(out.shape_, mshadow::kNHWC, mshadow::kNCHW) :
-                                      out.shape_;
+      mshadow::Shape<4> dshape_nchw =
+          (layout == mshadow::kNHWC) ? ConvertLayout(data.shape_, mshadow::kNHWC, mshadow::kNCHW)
+                                     : data.shape_;
+      mshadow::Shape<4> oshape_nchw =
+          (layout == mshadow::kNHWC) ? ConvertLayout(out.shape_, mshadow::kNHWC, mshadow::kNCHW)
+                                     : out.shape_;
       CUDNN_CALL(cudnnSetTensor4dDescriptor(in_desc_,
                                             cudnn_layout,
                                             dtype_,
@@ -275,13 +279,13 @@ class CuDNNPoolingOp {
                                             oshape_nchw[2],
                                             oshape_nchw[3]));
       int kernel_height = param_.global_pool ? dshape_nchw[2] : param_.kernel[0];
-      int kernel_width = param_.global_pool ? dshape_nchw[3] : param_.kernel[1];
-      // CuDNN v7.1.4 backprop kernel doesn't support kernel sizes 9 and above.
-      // For reference see Fixed Issues section in
-      // https://docs.nvidia.com/deeplearning/sdk/cudnn-release-notes/rel_721.html#rel_721
-      #if CUDNN_VERSION == 7104
+      int kernel_width  = param_.global_pool ? dshape_nchw[3] : param_.kernel[1];
+// CuDNN v7.1.4 backprop kernel doesn't support kernel sizes 9 and above.
+// For reference see Fixed Issues section in
+// https://docs.nvidia.com/deeplearning/sdk/cudnn-release-notes/rel_721.html#rel_721
+#if CUDNN_VERSION == 7104
       is_supported = kernel_height <= 8 && kernel_width <= 8;
-      #endif
+#endif
       CUDNN_CALL(cudnnSetPooling2dDescriptor(pooling_desc_,
                                              mode_,
                                              nan_prop_,
@@ -292,60 +296,60 @@ class CuDNNPoolingOp {
                                              param_.global_pool ? 1 : param_.stride[0],
                                              param_.global_pool ? 1 : param_.stride[1]));
     } else {
-      CHECK(layout == mshadow::kNCDHW ||
-            layout == mshadow::kNDHWC) << "Need 3D layout NCDHW or NDHWC.";
+      CHECK(layout == mshadow::kNCDHW || layout == mshadow::kNDHWC)
+          << "Need 3D layout NCDHW or NDHWC.";
       Tensor<gpu, 5, DType> data = in_data.get<gpu, 5, DType>(s);
-      mshadow::Shape<5> dshape = data.shape_;
-      mshadow::Shape<5> dstride = mshadow::Shape5(dshape.ProdShape(1, 5),
-                                           dshape.ProdShape(2, 5),
-                                           dshape.ProdShape(3, 5),
-                                           dshape.ProdShape(4, 5),
-                                           dshape.ProdShape(5, 5));
+      mshadow::Shape<5> dshape   = data.shape_;
+      mshadow::Shape<5> dstride  = mshadow::Shape5(dshape.ProdShape(1, 5),
+                                                  dshape.ProdShape(2, 5),
+                                                  dshape.ProdShape(3, 5),
+                                                  dshape.ProdShape(4, 5),
+                                                  dshape.ProdShape(5, 5));
 
       Tensor<gpu, 5, DType> out = out_data.get<gpu, 5, DType>(s);
-      mshadow::Shape<5> oshape = out.shape_;
+      mshadow::Shape<5> oshape  = out.shape_;
       mshadow::Shape<5> ostride = mshadow::Shape5(oshape.ProdShape(1, 5),
-                                           oshape.ProdShape(2, 5),
-                                           oshape.ProdShape(3, 5),
-                                           oshape.ProdShape(4, 5),
-                                           oshape.ProdShape(5, 5));
+                                                  oshape.ProdShape(2, 5),
+                                                  oshape.ProdShape(3, 5),
+                                                  oshape.ProdShape(4, 5),
+                                                  oshape.ProdShape(5, 5));
       // Convert to a standard (NCDHW) layout space to create args for cuDNN
 
-      mshadow::Shape<5> dshape_ncdhw = (layout == mshadow::kNDHWC) ?
-                                       ConvertLayout(dshape, mshadow::kNDHWC, mshadow::kNCDHW) :
-                                       dshape;
-      mshadow::Shape<5> dstride_ncdhw = (layout == mshadow::kNDHWC) ?
-                                        ConvertLayout(dstride, mshadow::kNDHWC, mshadow::kNCDHW) :
-                                        dstride;
-      mshadow::Shape<5> oshape_ncdhw = (layout == mshadow::kNDHWC) ?
-                                        ConvertLayout(oshape, mshadow::kNDHWC, mshadow::kNCDHW) :
-                                        oshape;
-      mshadow::Shape<5> ostride_ncdhw = (layout == mshadow::kNDHWC) ?
-                                        ConvertLayout(ostride, mshadow::kNDHWC, mshadow::kNCDHW) :
-                                        ostride;
+      mshadow::Shape<5> dshape_ncdhw = (layout == mshadow::kNDHWC)
+                                           ? ConvertLayout(dshape, mshadow::kNDHWC, mshadow::kNCDHW)
+                                           : dshape;
+      mshadow::Shape<5> dstride_ncdhw =
+          (layout == mshadow::kNDHWC) ? ConvertLayout(dstride, mshadow::kNDHWC, mshadow::kNCDHW)
+                                      : dstride;
+      mshadow::Shape<5> oshape_ncdhw = (layout == mshadow::kNDHWC)
+                                           ? ConvertLayout(oshape, mshadow::kNDHWC, mshadow::kNCDHW)
+                                           : oshape;
+      mshadow::Shape<5> ostride_ncdhw =
+          (layout == mshadow::kNDHWC) ? ConvertLayout(ostride, mshadow::kNDHWC, mshadow::kNCDHW)
+                                      : ostride;
       // Create int arrays for passing into cuDNN
       std::array<int, 5> dshape_ncdhw_int, dstride_ncdhw_int, oshape_ncdhw_int, ostride_ncdhw_int;
       for (int i = 0; i < 5; ++i) {
-        dshape_ncdhw_int[i] = static_cast<int>(dshape_ncdhw[i]);
+        dshape_ncdhw_int[i]  = static_cast<int>(dshape_ncdhw[i]);
         dstride_ncdhw_int[i] = static_cast<int>(dstride_ncdhw[i]);
-        oshape_ncdhw_int[i] = static_cast<int>(oshape_ncdhw[i]);
+        oshape_ncdhw_int[i]  = static_cast<int>(oshape_ncdhw[i]);
         ostride_ncdhw_int[i] = static_cast<int>(ostride_ncdhw[i]);
       }
 
-      std::array<int, 3> kernel_vec = {param_.global_pool ? static_cast<int>(dshape_ncdhw[2]) :
-                                                          static_cast<int>(param_.kernel[0]),
-                                     param_.global_pool ? static_cast<int>(dshape_ncdhw[3]) :
-                                                          static_cast<int>(param_.kernel[1]),
-                                     param_.global_pool ? static_cast<int>(dshape_ncdhw[4]) :
-                                                          static_cast<int>(param_.kernel[2])};
+      std::array<int, 3> kernel_vec = {param_.global_pool ? static_cast<int>(dshape_ncdhw[2])
+                                                          : static_cast<int>(param_.kernel[0]),
+                                       param_.global_pool ? static_cast<int>(dshape_ncdhw[3])
+                                                          : static_cast<int>(param_.kernel[1]),
+                                       param_.global_pool ? static_cast<int>(dshape_ncdhw[4])
+                                                          : static_cast<int>(param_.kernel[2])};
 
       std::array<int, 3> pad_vec = {param_.global_pool ? 0 : static_cast<int>(param_.pad[0]),
-                                  param_.global_pool ? 0 : static_cast<int>(param_.pad[1]),
-                                  param_.global_pool ? 0 : static_cast<int>(param_.pad[2])};
+                                    param_.global_pool ? 0 : static_cast<int>(param_.pad[1]),
+                                    param_.global_pool ? 0 : static_cast<int>(param_.pad[2])};
 
       std::array<int, 3> stride_vec = {param_.global_pool ? 1 : static_cast<int>(param_.stride[0]),
-                                     param_.global_pool ? 1 : static_cast<int>(param_.stride[1]),
-                                     param_.global_pool ? 1 : static_cast<int>(param_.stride[2])};
+                                       param_.global_pool ? 1 : static_cast<int>(param_.stride[1]),
+                                       param_.global_pool ? 1 : static_cast<int>(param_.stride[2])};
 
       CUDNN_CALL(cudnnSetTensorNdDescriptor(in_desc_,
                                             dtype_,
@@ -369,7 +373,7 @@ class CuDNNPoolingOp {
   }
 
   // Log once that the dimension of the pooling operation isn't supported
-  static void LogUnsupportedDim(bool *msg_logged, int ndim) {
+  static void LogUnsupportedDim(bool* msg_logged, int ndim) {
     if (!*msg_logged) {
       *msg_logged = true;
       LOG(WARNING) << ndim << "D pooling is not supported by cudnn, "
@@ -390,4 +394,3 @@ class CuDNNPoolingOp {
 }  // namespace mxnet
 
 #endif  // MXNET_OPERATOR_NN_CUDNN_CUDNN_POOLING_INL_H_
-
diff --git a/src/operator/nn/cudnn/cudnn_softmax_activation-inl.h b/src/operator/nn/cudnn/cudnn_softmax_activation-inl.h
index 0845eb79fd60..f8bad7b4aa60 100644
--- a/src/operator/nn/cudnn/cudnn_softmax_activation-inl.h
+++ b/src/operator/nn/cudnn/cudnn_softmax_activation-inl.h
@@ -22,7 +22,7 @@
  * \file cudnn_activation-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_CUDNN_CUDNN_SOFTMAX_ACTIVATION_INL_H_
 #define MXNET_OPERATOR_NN_CUDNN_CUDNN_SOFTMAX_ACTIVATION_INL_H_
@@ -47,24 +47,24 @@ class CuDNNSoftmaxActivationOp {
     CUDNN_CALL(cudnnDestroyTensorDescriptor(shape_desc_));
   }
 
-  void Forward(const OpContext &ctx, const TBlob &in_data,
-               const OpReqType &req, const TBlob &out_data) {
+  void Forward(const OpContext& ctx,
+               const TBlob& in_data,
+               const OpReqType& req,
+               const TBlob& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     Tensor<gpu, 4> data;
     Tensor<gpu, 4> out;
     cudnnSoftmaxMode_t softmax_mode;
     if (param_.mode == softmax_activation::kInstance) {
-      CHECK_EQ(in_data.ndim(), 2)
-        << "Input need to have 2 dimensions when mode=instance.";
+      CHECK_EQ(in_data.ndim(), 2) << "Input need to have 2 dimensions when mode=instance.";
       Shape<4> dshape = Shape4(in_data.shape_[0], in_data.shape_[1], 1, 1);
-      data = in_data.get_with_shape<gpu, 4, real_t>(dshape, s);
-      out = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
-      softmax_mode = CUDNN_SOFTMAX_MODE_INSTANCE;
+      data            = in_data.get_with_shape<gpu, 4, real_t>(dshape, s);
+      out             = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
+      softmax_mode    = CUDNN_SOFTMAX_MODE_INSTANCE;
     } else {
-      CHECK_GE(in_data.ndim(), 3)
-        << "Input need to have a least 3 dimensions when mode=channel";
+      CHECK_GE(in_data.ndim(), 3) << "Input need to have a least 3 dimensions when mode=channel";
       Shape<4> dshape;
       index_t size_left = in_data.Size();
       for (int i = 0; i < 3; ++i) {
@@ -75,13 +75,13 @@ class CuDNNSoftmaxActivationOp {
         }
         size_left /= dshape[i];
       }
-      dshape[3] = size_left;
-      data = in_data.get_with_shape<gpu, 4, real_t>(dshape, s);
-      out = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
+      dshape[3]    = size_left;
+      data         = in_data.get_with_shape<gpu, 4, real_t>(dshape, s);
+      out          = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
       softmax_mode = CUDNN_SOFTMAX_MODE_CHANNEL;
     }
     float alpha = 1.0f;
-    float beta = 0.0f;
+    float beta  = 0.0f;
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
     CUDNN_CALL(cudnnSetTensor4dDescriptor(shape_desc_,
                                           CUDNN_TENSOR_NCHW,
@@ -101,29 +101,29 @@ class CuDNNSoftmaxActivationOp {
                                    out.dptr_));
   }
 
-  void Backward(const OpContext &ctx, const TBlob &out_grad,
-                const TBlob &out_data, const OpReqType &req,
-                const TBlob &in_grad) {
+  void Backward(const OpContext& ctx,
+                const TBlob& out_grad,
+                const TBlob& out_data,
+                const OpReqType& req,
+                const TBlob& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    float alpha = 1.0f;
-    float beta = 0.0f;
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    float alpha    = 1.0f;
+    float beta     = 0.0f;
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     Tensor<gpu, 4> grad;
     Tensor<gpu, 4> output_data;
     Tensor<gpu, 4> input_grad;
     cudnnSoftmaxMode_t softmax_mode;
     if (param_.mode == softmax_activation::kInstance) {
-      CHECK_EQ(in_grad.ndim(), 2)
-        << "Input need to have 2 dimensions when mode=instance.";
+      CHECK_EQ(in_grad.ndim(), 2) << "Input need to have 2 dimensions when mode=instance.";
       Shape<4> dshape = Shape4(in_grad.shape_[0], in_grad.shape_[1], 1, 1);
-      grad = out_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
-      output_data = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
-      input_grad = in_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
-      softmax_mode = CUDNN_SOFTMAX_MODE_INSTANCE;
+      grad            = out_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
+      output_data     = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
+      input_grad      = in_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
+      softmax_mode    = CUDNN_SOFTMAX_MODE_INSTANCE;
     } else {
-      CHECK_GE(in_grad.ndim(), 3)
-        << "Input need to have a least 3 dimensions when mode=channel";
+      CHECK_GE(in_grad.ndim(), 3) << "Input need to have a least 3 dimensions when mode=channel";
       Shape<4> dshape;
       index_t size_left = in_grad.Size();
       for (int i = 0; i < 3; ++i) {
@@ -134,10 +134,10 @@ class CuDNNSoftmaxActivationOp {
         }
         size_left /= dshape[i];
       }
-      dshape[3] = size_left;
-      output_data = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
-      grad = out_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
-      input_grad = in_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
+      dshape[3]    = size_left;
+      output_data  = out_data.get_with_shape<gpu, 4, real_t>(dshape, s);
+      grad         = out_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
+      input_grad   = in_grad.get_with_shape<gpu, 4, real_t>(dshape, s);
       softmax_mode = CUDNN_SOFTMAX_MODE_CHANNEL;
     }
     CHECK_EQ(s->dnn_handle_ownership_, mshadow::Stream<gpu>::OwnHandle);
diff --git a/src/operator/nn/deconvolution-inl.h b/src/operator/nn/deconvolution-inl.h
index c5578f569b60..8b2ae8e0c8a8 100644
--- a/src/operator/nn/deconvolution-inl.h
+++ b/src/operator/nn/deconvolution-inl.h
@@ -22,7 +22,7 @@
  * \file deconvolution-inl.h
  * \brief
  * \author Wei Wu, Da Zheng
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_DECONVOLUTION_INL_H_
 #define MXNET_OPERATOR_NN_DECONVOLUTION_INL_H_
 
@@ -37,16 +37,15 @@
 #include "../operator_common.h"
 #include "../linalg.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace deconv {
-  enum DeconvolutionOpInputs {kData, kWeight, kBias};
-  enum DeconvolutionOpOutputs {kOut};
-  enum DeconvolutionOpResource {kTempSpace};
-  enum DeconvolutionOpCudnnTune {kOff, kLimited, kFastest};
-}
+enum DeconvolutionOpInputs { kData, kWeight, kBias };
+enum DeconvolutionOpOutputs { kOut };
+enum DeconvolutionOpResource { kTempSpace };
+enum DeconvolutionOpCudnnTune { kOff, kLimited, kFastest };
+}  // namespace deconv
 
 struct DeconvolutionParam : public dmlc::Parameter<DeconvolutionParam> {
   mxnet::TShape kernel;
@@ -63,68 +62,76 @@ struct DeconvolutionParam : public dmlc::Parameter<DeconvolutionParam> {
   bool cudnn_off;
   dmlc::optional<int> layout;
   DMLC_DECLARE_PARAMETER(DeconvolutionParam) {
-    DMLC_DECLARE_FIELD(kernel).describe("Deconvolution kernel size: (w,), (h, w) or (d, h, w). "
-                  "This is same as the kernel size used for the corresponding convolution");
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, 0))
-        .describe("The stride used for the corresponding convolution: (w,), (h, w) or (d, h, w). "
-                  "Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(dilate).set_default(mxnet::TShape(0, 0))
-        .describe("Dilation factor for each dimension of the input: (w,), (h, w) or (d, h, w). "
-                  "Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, 0))
-        .describe("The amount of implicit zero padding added during convolution for each "
-                  "dimension of the input: "
-                  "(w,), (h, w) or (d, h, w). "
-                  "``(kernel-1)/2`` is usually a good choice. "
-                  "If `target_shape` is set, "
-                  "`pad` will be ignored and a padding that will generate the target shape "
-                  "will be used. Defaults to no padding.");
-    DMLC_DECLARE_FIELD(adj).set_default(mxnet::TShape(0, 0))
-        .describe("Adjustment for output shape: (w,), (h, w) or (d, h, w). "
-                  "If `target_shape` is set, "
-                  "`adj` will be ignored and computed accordingly.");
-    DMLC_DECLARE_FIELD(target_shape).set_default(mxnet::TShape(0, 0))
+    DMLC_DECLARE_FIELD(kernel).describe(
+        "Deconvolution kernel size: (w,), (h, w) or (d, h, w). "
+        "This is same as the kernel size used for the corresponding convolution");
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The stride used for the corresponding convolution: (w,), (h, w) or (d, h, w). "
+            "Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(dilate)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "Dilation factor for each dimension of the input: (w,), (h, w) or (d, h, w). "
+            "Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The amount of implicit zero padding added during convolution for each "
+            "dimension of the input: "
+            "(w,), (h, w) or (d, h, w). "
+            "``(kernel-1)/2`` is usually a good choice. "
+            "If `target_shape` is set, "
+            "`pad` will be ignored and a padding that will generate the target shape "
+            "will be used. Defaults to no padding.");
+    DMLC_DECLARE_FIELD(adj)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "Adjustment for output shape: (w,), (h, w) or (d, h, w). "
+            "If `target_shape` is set, "
+            "`adj` will be ignored and computed accordingly.");
+    DMLC_DECLARE_FIELD(target_shape)
+        .set_default(mxnet::TShape(0, 0))
         .describe("Shape of the output tensor: (w,), (h, w) or (d, h, w).");
-    DMLC_DECLARE_FIELD(num_filter).set_lower_bound(1)
-        .describe("Number of output filters.");
-    DMLC_DECLARE_FIELD(num_group).set_default(1)
-        .describe("Number of groups partition.");
-    DMLC_DECLARE_FIELD(workspace).set_default(512).set_lower_bound(0)
-        .describe("Maximum temporary workspace allowed (MB) in deconvolution."
-                  "This parameter has two usages. When CUDNN is not used, it determines the "
-                  "effective batch size of the deconvolution kernel. When CUDNN is used, "
-                  "it controls the maximum temporary storage used for tuning "
-                  "the best CUDNN kernel when `limited_workspace` strategy is used.");
-    DMLC_DECLARE_FIELD(no_bias).set_default(true)
-        .describe("Whether to disable bias parameter.");
+    DMLC_DECLARE_FIELD(num_filter).set_lower_bound(1).describe("Number of output filters.");
+    DMLC_DECLARE_FIELD(num_group).set_default(1).describe("Number of groups partition.");
+    DMLC_DECLARE_FIELD(workspace).set_default(512).set_lower_bound(0).describe(
+        "Maximum temporary workspace allowed (MB) in deconvolution."
+        "This parameter has two usages. When CUDNN is not used, it determines the "
+        "effective batch size of the deconvolution kernel. When CUDNN is used, "
+        "it controls the maximum temporary storage used for tuning "
+        "the best CUDNN kernel when `limited_workspace` strategy is used.");
+    DMLC_DECLARE_FIELD(no_bias).set_default(true).describe("Whether to disable bias parameter.");
     DMLC_DECLARE_FIELD(cudnn_tune)
-      .add_enum("off", deconv::kOff)
-      .add_enum("limited_workspace", deconv::kLimited)
-      .add_enum("fastest", deconv::kFastest)
-      .set_default(dmlc::optional<int>())
-      .describe("Whether to pick convolution algorithm by running performance test.");
-    DMLC_DECLARE_FIELD(cudnn_off).set_default(false)
-    .describe("Turn off cudnn for this layer.");
+        .add_enum("off", deconv::kOff)
+        .add_enum("limited_workspace", deconv::kLimited)
+        .add_enum("fastest", deconv::kFastest)
+        .set_default(dmlc::optional<int>())
+        .describe("Whether to pick convolution algorithm by running performance test.");
+    DMLC_DECLARE_FIELD(cudnn_off).set_default(false).describe("Turn off cudnn for this layer.");
     DMLC_DECLARE_FIELD(layout)
-      .add_enum("NCW", mshadow::kNCW)
-      .add_enum("NCHW", mshadow::kNCHW)
-      .add_enum("NCDHW", mshadow::kNCDHW)
-      .add_enum("NHWC", mshadow::kNHWC)
-      .add_enum("NDHWC", mshadow::kNDHWC)
-      .set_default(dmlc::optional<int>())
-      .describe("Set layout for input, output and weight. Empty for "
-                "default layout, NCW for 1d, NCHW for 2d and NCDHW for 3d."
-                "NHWC and NDHWC are only supported on GPU.");
+        .add_enum("NCW", mshadow::kNCW)
+        .add_enum("NCHW", mshadow::kNCHW)
+        .add_enum("NCDHW", mshadow::kNCDHW)
+        .add_enum("NHWC", mshadow::kNHWC)
+        .add_enum("NDHWC", mshadow::kNDHWC)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Set layout for input, output and weight. Empty for "
+            "default layout, NCW for 1d, NCHW for 2d and NCDHW for 3d."
+            "NHWC and NDHWC are only supported on GPU.");
   }
 
-  template<size_t ndim>
-  void InferPad(mxnet::TShape input, index_t (&o_pad)[ndim], index_t (&o_adj)[ndim] ) const {
+  template <size_t ndim>
+  void InferPad(mxnet::TShape input, index_t (&o_pad)[ndim], index_t (&o_adj)[ndim]) const {
     // Modified by Li.bs
     // Use tag to control the calculation of pad
     bool bCal = false;
     if (target_shape.ndim() != 0) {
       for (index_t i = 0; i < target_shape.ndim(); i++) {
-        if (target_shape[i] != 0) bCal = true;
+        if (target_shape[i] != 0)
+          bCal = true;
       }
     }
 
@@ -156,19 +163,12 @@ struct DeconvolutionParam : public dmlc::Parameter<DeconvolutionParam> {
   }
 
   bool operator==(const DeconvolutionParam& other) const {
-    return this->kernel == other.kernel &&
-           this->stride == other.stride &&
-           this->dilate == other.dilate &&
-           this->pad == other.pad &&
-           this->adj == other.adj &&
-           this->target_shape == other.target_shape &&
-           this->num_filter == other.num_filter &&
-           this->num_group == other.num_group &&
-           this->workspace == other.workspace &&
-           this->no_bias == other.no_bias &&
-           this->cudnn_tune == other.cudnn_tune &&
-           this->cudnn_off == other.cudnn_off &&
-           this->layout == other.layout;
+    return this->kernel == other.kernel && this->stride == other.stride &&
+           this->dilate == other.dilate && this->pad == other.pad && this->adj == other.adj &&
+           this->target_shape == other.target_shape && this->num_filter == other.num_filter &&
+           this->num_group == other.num_group && this->workspace == other.workspace &&
+           this->no_bias == other.no_bias && this->cudnn_tune == other.cudnn_tune &&
+           this->cudnn_off == other.cudnn_off && this->layout == other.layout;
   }
 
   std::string CudnnTune2String(int cudnn_tune) {
@@ -205,9 +205,8 @@ struct DeconvolutionParam : public dmlc::Parameter<DeconvolutionParam> {
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream kernel_s, stride_s, dilate_s, pad_s, adj_s,
-                       target_shape_s, num_filter_s, num_group_s, workspace_s,
-                       no_bias_s, cudnn_tune_s, cudnn_off_s, layout_s;
+    std::ostringstream kernel_s, stride_s, dilate_s, pad_s, adj_s, target_shape_s, num_filter_s,
+        num_group_s, workspace_s, no_bias_s, cudnn_tune_s, cudnn_off_s, layout_s;
     kernel_s << kernel;
     stride_s << stride;
     dilate_s << dilate;
@@ -221,16 +220,16 @@ struct DeconvolutionParam : public dmlc::Parameter<DeconvolutionParam> {
     cudnn_tune_s << cudnn_tune;
     cudnn_off_s << cudnn_off;
     layout_s << layout;
-    (*dict)["kernel"] = kernel_s.str();
-    (*dict)["stride"] = stride_s.str();
-    (*dict)["dilate"] = dilate_s.str();
-    (*dict)["pad"] = pad_s.str();
-    (*dict)["adj"] = adj_s.str();
+    (*dict)["kernel"]       = kernel_s.str();
+    (*dict)["stride"]       = stride_s.str();
+    (*dict)["dilate"]       = dilate_s.str();
+    (*dict)["pad"]          = pad_s.str();
+    (*dict)["adj"]          = adj_s.str();
     (*dict)["target_shape"] = target_shape_s.str();
-    (*dict)["num_filter"] = num_filter_s.str();
-    (*dict)["num_group"] = num_group_s.str();
-    (*dict)["workspace"] = workspace_s.str();
-    (*dict)["no_bias"] = no_bias_s.str();
+    (*dict)["num_filter"]   = num_filter_s.str();
+    (*dict)["num_group"]    = num_group_s.str();
+    (*dict)["workspace"]    = workspace_s.str();
+    (*dict)["no_bias"]      = no_bias_s.str();
     if (cudnn_tune.has_value()) {
       (*dict)["cudnn_tune"] = CudnnTune2String(cudnn_tune.value());
     } else {
@@ -251,23 +250,23 @@ typedef ParamOpSign<DeconvolutionParam> DeconvSignature;
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::DeconvolutionParam> {
   size_t operator()(const mxnet::op::DeconvolutionParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.kernel);
-    ret = dmlc::HashCombine(ret, val.stride);
-    ret = dmlc::HashCombine(ret, val.dilate);
-    ret = dmlc::HashCombine(ret, val.pad);
-    ret = dmlc::HashCombine(ret, val.adj);
-    ret = dmlc::HashCombine(ret, val.target_shape);
-    ret = dmlc::HashCombine(ret, val.num_filter);
-    ret = dmlc::HashCombine(ret, val.num_group);
-    ret = dmlc::HashCombine(ret, val.workspace);
-    ret = dmlc::HashCombine(ret, val.no_bias);
-    ret = dmlc::HashCombine(ret, val.cudnn_tune);
-    ret = dmlc::HashCombine(ret, val.cudnn_off);
-    ret = dmlc::HashCombine(ret, val.layout);
+    ret        = dmlc::HashCombine(ret, val.kernel);
+    ret        = dmlc::HashCombine(ret, val.stride);
+    ret        = dmlc::HashCombine(ret, val.dilate);
+    ret        = dmlc::HashCombine(ret, val.pad);
+    ret        = dmlc::HashCombine(ret, val.adj);
+    ret        = dmlc::HashCombine(ret, val.target_shape);
+    ret        = dmlc::HashCombine(ret, val.num_filter);
+    ret        = dmlc::HashCombine(ret, val.num_group);
+    ret        = dmlc::HashCombine(ret, val.workspace);
+    ret        = dmlc::HashCombine(ret, val.no_bias);
+    ret        = dmlc::HashCombine(ret, val.cudnn_tune);
+    ret        = dmlc::HashCombine(ret, val.cudnn_off);
+    ret        = dmlc::HashCombine(ret, val.layout);
     return ret;
   }
 };
@@ -276,7 +275,7 @@ struct hash<mxnet::op::DeconvolutionParam> {
 namespace mxnet {
 namespace op {
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class DeconvolutionOp {
  public:
   void Init(DeconvolutionParam p) {
@@ -285,10 +284,10 @@ class DeconvolutionOp {
     param_.workspace = (param_.workspace << 20) / sizeof(DType);
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
@@ -300,10 +299,10 @@ class DeconvolutionOp {
     size_t expected = param_.no_bias ? 2 : 3;
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    auto in_data_shape = in_data[deconv::kData].shape_;
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
+    auto in_data_shape         = in_data[deconv::kData].shape_;
     Tensor<xpu, 4, DType> data = TBlobTo4DTensor(in_data[deconv::kData], s);
-    Tensor<xpu, 4, DType> out = TBlobTo4DTensor(out_data[deconv::kOut], s);
+    Tensor<xpu, 4, DType> out  = TBlobTo4DTensor(out_data[deconv::kOut], s);
     index_t o_pad[2], o_adj[2];
     if (param_.kernel.ndim() == 2) {
       param_.InferPad(mxnet::TShape({in_data_shape[2], in_data_shape[3]}), o_pad, o_adj);
@@ -320,10 +319,9 @@ class DeconvolutionOp {
     auto kernel = param_.kernel.ndim() == 2 ? param_.kernel : mxnet::TShape({1, param_.kernel[0]});
     auto kernel_size = kernel.Size();
 
-    Shape<3> wmat_shape =
-        Shape3(param_.num_group,
-               data.shape_[1] / param_.num_group,
-               param_.num_filter / param_.num_group * kernel_size);
+    Shape<3> wmat_shape = Shape3(param_.num_group,
+                                 data.shape_[1] / param_.num_group,
+                                 param_.num_filter / param_.num_group * kernel_size);
     Tensor<xpu, 3, DType> wmat =
         in_data[deconv::kWeight].get_with_shape<xpu, 3, DType>(wmat_shape, s);
 #if defined(__CUDACC__)
@@ -335,16 +333,13 @@ class DeconvolutionOp {
         ctx.requested[deconv::kTempSpace].get_space_typed<xpu, 1, DType>(
             Shape1(this->InitTemp(out.shape_, data.shape_)), s);
     for (index_t i = 0; i < nbatch; i += nstep_) {
-      const index_t step = std::min(nstep_, nbatch - i);
+      const index_t step             = std::min(nstep_, nbatch - i);
       Tensor<xpu, 2, DType> temp_col = Tensor<xpu, 2, DType>(
-                                            workspace.dptr_,
-                                            Shape2(shape_colunit_[0],
-                                            shape_colunit_[1] * step), s);
+          workspace.dptr_, Shape2(shape_colunit_[0], shape_colunit_[1] * step), s);
       Tensor<xpu, 3, DType> temp_dst = Tensor<xpu, 3, DType>(
-                                           workspace.dptr_ + temp_col.shape_.Size(),
-                                           Shape3(shape_dstunit_[0],
-                                           shape_dstunit_[1],
-                                           shape_dstunit_[2] * step), s);
+          workspace.dptr_ + temp_col.shape_.Size(),
+          Shape3(shape_dstunit_[0], shape_dstunit_[1], shape_dstunit_[2] * step),
+          s);
       temp_dst = reshape(swapaxis<1, 0>(data.Slice(i, i + step)), temp_dst.shape_);
       if (o_pad[0] == 0 && o_pad[1] == 0) {
         temp_col = unpack_patch2col(out.Slice(i, i + step),
@@ -355,8 +350,7 @@ class DeconvolutionOp {
                                     dilate[0],
                                     dilate[1]);
       } else {
-        temp_col = unpack_patch2col(pad(out.Slice(i, i + step),
-                                        o_pad[0], o_pad[1]),
+        temp_col = unpack_patch2col(pad(out.Slice(i, i + step), o_pad[0], o_pad[1]),
                                     kernel[0],
                                     kernel[1],
                                     stride[0],
@@ -366,34 +360,28 @@ class DeconvolutionOp {
       }
       const index_t gstride = temp_col.size(0) / param_.num_group;
       for (uint32_t gid = 0; gid < param_.num_group; ++gid) {
-        mshadow::Tensor<xpu, 2, DType> tmpc = temp_col.Slice(gstride * gid,
-                                              gstride * (gid + 1));
+        mshadow::Tensor<xpu, 2, DType> tmpc = temp_col.Slice(gstride * gid, gstride * (gid + 1));
         // Legacy approach shown here for comparison:
         //   tmpc = dot(wmat[gid].T(), temp_dst[gid]);
         linalg_gemm(wmat[gid], temp_dst[gid], tmpc, true, false, s);
       }
       if (o_pad[0] == 0 && o_pad[1] == 0) {
         out.Slice(i, i + step) = pack_col2patch(temp_col,
-                                   out.Slice(i, i + step).shape_,
-                                   kernel[0],
-                                   kernel[1],
-                                   stride[0],
-                                   stride[1],
-                                   dilate[0],
-                                   dilate[1]);
+                                                out.Slice(i, i + step).shape_,
+                                                kernel[0],
+                                                kernel[1],
+                                                stride[0],
+                                                stride[1],
+                                                dilate[0],
+                                                dilate[1]);
       } else {
         Shape<4> pshape = out.Slice(i, i + step).shape_;
         pshape[2] += 2 * o_pad[0];
         pshape[3] += 2 * o_pad[1];
-        out.Slice(i, i + step) = crop(pack_col2patch(temp_col,
-                                        pshape,
-                                        kernel[0],
-                                        kernel[1],
-                                        stride[0],
-                                        stride[1],
-                                        dilate[0],
-                                        dilate[1]),
-                                        out[i][0].shape_);
+        out.Slice(i, i + step) = crop(
+            pack_col2patch(
+                temp_col, pshape, kernel[0], kernel[1], stride[0], stride[1], dilate[0], dilate[1]),
+            out[i][0].shape_);
       }
     }
     if (!param_.no_bias) {
@@ -403,11 +391,11 @@ class DeconvolutionOp {
     }
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad) {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     // TODO(bing): check the BLAS Handle, be careful
@@ -418,10 +406,10 @@ class DeconvolutionOp {
     CHECK_EQ(req.size(), expected);
     CHECK_EQ(in_data[deconv::kWeight].CheckContiguous(), true);
     // get data
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    auto in_data_shape = in_data[deconv::kData].shape_;
-    Tensor<xpu, 4, DType> data = TBlobTo4DTensor(in_data[deconv::kData], s);
-    Tensor<xpu, 4, DType> grad = TBlobTo4DTensor(out_grad[deconv::kOut], s);
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
+    auto in_data_shape          = in_data[deconv::kData].shape_;
+    Tensor<xpu, 4, DType> data  = TBlobTo4DTensor(in_data[deconv::kData], s);
+    Tensor<xpu, 4, DType> grad  = TBlobTo4DTensor(out_grad[deconv::kOut], s);
     Tensor<xpu, 4, DType> gdata = TBlobTo4DTensor(in_grad[deconv::kData], s);
 
     index_t o_pad[2], o_adj[2];
@@ -440,10 +428,9 @@ class DeconvolutionOp {
     auto kernel = param_.kernel.ndim() == 2 ? param_.kernel : mxnet::TShape({1, param_.kernel[0]});
     auto kernel_size = kernel.Size();
 
-    Shape<3> wmat_shape =
-        Shape3(param_.num_group,
-               data.shape_[1] / param_.num_group,
-               param_.num_filter / param_.num_group * kernel_size);
+    Shape<3> wmat_shape = Shape3(param_.num_group,
+                                 data.shape_[1] / param_.num_group,
+                                 param_.num_filter / param_.num_group * kernel_size);
     Tensor<xpu, 3, DType> wmat =
         in_data[deconv::kWeight].get_with_shape<xpu, 3, DType>(wmat_shape, s);
     Tensor<xpu, 3, DType> gwmat =
@@ -458,33 +445,30 @@ class DeconvolutionOp {
         ctx.requested[deconv::kTempSpace].get_space_typed<xpu, 1, DType>(
             Shape1(this->InitTemp(grad.shape_, data.shape_)), s);
     for (index_t i = 0; i < nbatch; i += nstep_) {
-      const index_t step = std::min(nstep_, nbatch - i);
+      const index_t step             = std::min(nstep_, nbatch - i);
       Tensor<xpu, 2, DType> temp_col = Tensor<xpu, 2, DType>(
-                                           workspace.dptr_,
-                                           Shape2(shape_colunit_[0],
-                                           shape_colunit_[1] * step), s);
+          workspace.dptr_, Shape2(shape_colunit_[0], shape_colunit_[1] * step), s);
       Tensor<xpu, 3, DType> temp_dst = Tensor<xpu, 3, DType>(
-                                           workspace.dptr_ + temp_col.shape_.Size(),
-                                           Shape3(shape_dstunit_[0],
-                                           shape_dstunit_[1],
-                                           shape_dstunit_[2] * step), s);
+          workspace.dptr_ + temp_col.shape_.Size(),
+          Shape3(shape_dstunit_[0], shape_dstunit_[1], shape_dstunit_[2] * step),
+          s);
       temp_dst = reshape(swapaxis<1, 0>(data.Slice(i, i + step)), temp_dst.shape_);
       if (o_pad[0] == 0 && o_pad[1] == 0) {
         temp_col = unpack_patch2col(grad.Slice(i, i + step),
-                                     kernel[0],
-                                     kernel[1],
-                                     stride[0],
-                                     stride[1],
-                                     dilate[0],
-                                     dilate[1]);
+                                    kernel[0],
+                                    kernel[1],
+                                    stride[0],
+                                    stride[1],
+                                    dilate[0],
+                                    dilate[1]);
       } else {
         temp_col = unpack_patch2col(pad(grad.Slice(i, i + step), o_pad[0], o_pad[1]),
-                                     kernel[0],
-                                     kernel[1],
-                                     stride[0],
-                                     stride[1],
-                                     dilate[0],
-                                     dilate[1]);
+                                    kernel[0],
+                                    kernel[1],
+                                    stride[0],
+                                    stride[1],
+                                    dilate[0],
+                                    dilate[1]);
       }
       const index_t gstride = temp_col.size(0) / param_.num_group;
       for (uint32_t gid = 0; gid < param_.num_group; ++gid) {
@@ -500,8 +484,7 @@ class DeconvolutionOp {
           linalg_gemm(temp_dst[gid], tmpc, gwmat[gid], false, true, s, kAddTo);
         }
       }
-      if (req[deconv::kData] == kWriteTo ||
-          req[deconv::kData] == kWriteInplace ||
+      if (req[deconv::kData] == kWriteTo || req[deconv::kData] == kWriteInplace ||
           req[deconv::kData] == kAddTo) {
         for (uint32_t gid = 0; gid < param_.num_group; ++gid) {
           Tensor<xpu, 2, DType> tmpc = temp_col.Slice(gstride * gid, gstride * (gid + 1));
@@ -509,13 +492,11 @@ class DeconvolutionOp {
           //   temp_dst[gid] = dot(wmat[gid], tmpc);
           linalg_gemm(wmat[gid], tmpc, temp_dst[gid], false, false, s);
         }
-        Assign(gdata.Slice(i, i + step),
-               req[deconv::kData],
-               (swapaxis<1, 0>(reshape(temp_dst,
-                                      mshadow::Shape4(gdata.shape_[1],
-                                                      step,
-                                                      gdata.size(2),
-                                                      gdata.size(3))))));
+        Assign(
+            gdata.Slice(i, i + step),
+            req[deconv::kData],
+            (swapaxis<1, 0>(reshape(
+                temp_dst, mshadow::Shape4(gdata.shape_[1], step, gdata.size(2), gdata.size(3))))));
       }
     }
     if (!param_.no_bias) {
@@ -525,36 +506,31 @@ class DeconvolutionOp {
   }
 
  private:
-  inline index_t InitTemp(const mshadow::Shape<4> &ishape,
-                          const mshadow::Shape<4> &oshape) {
+  inline index_t InitTemp(const mshadow::Shape<4>& ishape, const mshadow::Shape<4>& oshape) {
     const index_t ksize = param_.kernel.Size();
-    shape_colunit_ = mshadow::Shape2(ishape[1] * ksize,
-                                     oshape[2] * oshape[3]);
-    shape_dstunit_ = mshadow::Shape3(param_.num_group,
-                                     oshape[1] / param_.num_group,
-                                     oshape[2] * oshape[3]);
+    shape_colunit_      = mshadow::Shape2(ishape[1] * ksize, oshape[2] * oshape[3]);
+    shape_dstunit_ =
+        mshadow::Shape3(param_.num_group, oshape[1] / param_.num_group, oshape[2] * oshape[3]);
     // See convolution for workspace calculations. nstep_ will be the effective batch size
     nstep_ = std::max<index_t>(
-        std::min<index_t>(param_.workspace /
-          (shape_colunit_.Size() + shape_dstunit_.Size()), ishape[0]),
-      1);
-
-    mshadow::Shape<2> scol = mshadow::Shape2(shape_colunit_[0],
-                                             shape_colunit_[1] * nstep_);
-    mshadow::Shape<3> sdst = mshadow::Shape3(shape_dstunit_[0],
-                                             shape_dstunit_[1],
-                                             shape_dstunit_[2] * nstep_);
+        std::min<index_t>(param_.workspace / (shape_colunit_.Size() + shape_dstunit_.Size()),
+                          ishape[0]),
+        1);
+
+    mshadow::Shape<2> scol = mshadow::Shape2(shape_colunit_[0], shape_colunit_[1] * nstep_);
+    mshadow::Shape<3> sdst =
+        mshadow::Shape3(shape_dstunit_[0], shape_dstunit_[1], shape_dstunit_[2] * nstep_);
     index_t required_size = scol.Size() + sdst.Size();
     return required_size;
   }
 
-  inline Tensor<xpu, 4, DType> TBlobTo4DTensor(const TBlob &tb, Stream<xpu> *s) {
+  inline Tensor<xpu, 4, DType> TBlobTo4DTensor(const TBlob& tb, Stream<xpu>* s) {
     using namespace mshadow;
     if (param_.kernel.ndim() == 2)
       return tb.get<xpu, 4, DType>(s);
     else
-      return tb.get_with_shape<xpu, 4, DType>(
-          Shape4(tb.shape_[0], tb.shape_[1], 1, tb.shape_[2]), s);
+      return tb.get_with_shape<xpu, 4, DType>(Shape4(tb.shape_[0], tb.shape_[1], 1, tb.shape_[2]),
+                                              s);
   }
 
   DeconvolutionParam param_;
@@ -563,9 +539,10 @@ class DeconvolutionOp {
   index_t nstep_;
 };  // class DeconvolutionOp
 
-template<typename xpu>
+template <typename xpu>
 void _DeconvolutionCompute(const DeconvolutionParam& param,
-                           const OpContext& ctx, const std::vector<TBlob>& inputs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   MSHADOW_REAL_TYPE_SWITCH(inputs[deconv::kData].type_flag_, DType, {
@@ -575,23 +552,25 @@ void _DeconvolutionCompute(const DeconvolutionParam& param,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void DeconvolutionCompute(const nnvm::NodeAttrs& attrs,
-                          const OpContext& ctx, const std::vector<TBlob>& inputs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs) {
   const DeconvolutionParam& param = nnvm::get<DeconvolutionParam>(attrs.parsed);
   _DeconvolutionCompute<xpu>(param, ctx, inputs, req, outputs);
 }
 
-template<typename xpu>
+template <typename xpu>
 void _DeconvolutionGradCompute(const DeconvolutionParam& param,
-                               const OpContext& ctx, const std::vector<TBlob>& inputs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
   std::vector<TBlob> in_data(inputs.begin() + 1, inputs.end());
-  const TBlob &out_grad = inputs[0];
-  const std::vector<TBlob> &in_grad = outputs;
+  const TBlob& out_grad             = inputs[0];
+  const std::vector<TBlob>& in_grad = outputs;
 
   MSHADOW_REAL_TYPE_SWITCH(out_grad.type_flag_, DType, {
     DeconvolutionOp<xpu, DType> op;
@@ -600,10 +579,10 @@ void _DeconvolutionGradCompute(const DeconvolutionParam& param,
   });
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void DeconvolutionGradCompute(const nnvm::NodeAttrs& attrs,
-                              const OpContext& ctx, const std::vector<TBlob>& inputs,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
                               const std::vector<OpReqType>& req,
                               const std::vector<TBlob>& outputs) {
   const DeconvolutionParam& param = nnvm::get<DeconvolutionParam>(attrs.parsed);
diff --git a/src/operator/nn/deconvolution.cc b/src/operator/nn/deconvolution.cc
index 6dc8b319ce97..aa1f1daa36aa 100644
--- a/src/operator/nn/deconvolution.cc
+++ b/src/operator/nn/deconvolution.cc
@@ -22,7 +22,7 @@
  * \file deconvolution.cc
  * \brief
  * \author Wei Wu, Da Zheng
-*/
+ */
 
 #include "./deconvolution-inl.h"
 #include "../operator_common.h"
@@ -72,33 +72,31 @@ inline static bool DeconvStorageType(const nnvm::NodeAttrs& attrs,
                                      std::vector<int>* in_attrs,
                                      std::vector<int>* out_attrs) {
   const DeconvolutionParam& param = nnvm::get<DeconvolutionParam>(attrs.parsed);
-  uint32_t in_expected = param.no_bias ? 2 : 3;
+  uint32_t in_expected            = param.no_bias ? 2 : 3;
   CHECK_EQ(in_attrs->size(), in_expected);
   CHECK_EQ(out_attrs->size(), 1);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
 inline static bool BackwardDeconvStorageType(const nnvm::NodeAttrs& attrs,
                                              const int dev_mask,
                                              DispatchMode* dispatch_mode,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
+                                             std::vector<int>* in_attrs,
+                                             std::vector<int>* out_attrs) {
   const DeconvolutionParam& param = nnvm::get<DeconvolutionParam>(attrs.parsed);
-  uint32_t in_expected = param.no_bias ? 3 : 4;
-  uint32_t out_expected = param.no_bias ? 2 : 3;
+  uint32_t in_expected            = param.no_bias ? 3 : 4;
+  uint32_t out_expected           = param.no_bias ? 2 : 3;
   CHECK_EQ(in_attrs->size(), in_expected);
   CHECK_EQ(out_attrs->size(), out_expected);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 #endif
 
 static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
-                               mxnet::ShapeVector *in_shape,
-                               mxnet::ShapeVector *out_shape) {
+                               mxnet::ShapeVector* in_shape,
+                               mxnet::ShapeVector* out_shape) {
   const DeconvolutionParam& param_ = nnvm::get<DeconvolutionParam>(attrs.parsed);
 #if MXNET_USE_CUDNN == 0
   if (param_.kernel.ndim() > 2) {
@@ -114,16 +112,16 @@ static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, weight]";
   }
   out_shape->resize(1, mxnet::TShape());
-  const mxnet::TShape &dshape = (*in_shape)[deconv::kData];
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = (*in_shape)[deconv::kData];
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   if (param_.kernel.ndim() == 1) {
     // 1d conv
     CHECK_EQ(dshape.ndim(), 3U) << "Input data should be 3D in batch-num_filter-x";
     Shape<3> dshape_ncw = ConvertLayout(dshape.get<3>(), param_.layout.value(), kNCW);
-    Shape<3> wshape = Shape3(dshape_ncw[1], param_.num_filter / param_.num_group,
-        param_.kernel[0]);
-    wshape = ConvertLayout(wshape, kNCW, param_.layout.value());
+    Shape<3> wshape = Shape3(dshape_ncw[1], param_.num_filter / param_.num_group, param_.kernel[0]);
+    wshape          = ConvertLayout(wshape, kNCW, param_.layout.value());
     SHAPE_ASSIGN_CHECK(*in_shape, deconv::kWeight, wshape);
     if (!param_.no_bias) {
       SHAPE_ASSIGN_CHECK(*in_shape, deconv::kBias, Shape1(param_.num_filter));
@@ -135,33 +133,29 @@ static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
     index_t o_adj[1];
     param_.InferPad(dshape_ncw, o_pad, o_adj);
 
-    CHECK_EQ(dshape_ncw[1] % param_.num_group, 0U) \
-      << "input num_filter must divide group size";
-    CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-      << "output num_filter must divide group size";
-    CHECK_GT(param_.kernel.Size(), 0U) \
-      << "incorrect kernel size: " << param_.kernel;
-    CHECK_GT(param_.stride.Size(), 0U) \
-      << "incorrect stride size: " << param_.stride;
-    CHECK_GT(param_.dilate.Size(), 0U) \
-      << "incorrect dilate size: " << param_.dilate;
+    CHECK_EQ(dshape_ncw[1] % param_.num_group, 0U) << "input num_filter must divide group size";
+    CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+        << "output num_filter must divide group size";
+    CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+    CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+    CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
 
-    CHECK_GE(param_.stride[0]-1, o_adj[0]) << "adj(x) must be samller than stride[0]";
+    CHECK_GE(param_.stride[0] - 1, o_adj[0]) << "adj(x) must be samller than stride[0]";
 
     Shape<3> oshape;
     oshape[0] = dshape_ncw[0];
     oshape[1] = param_.num_filter;
     if (mxnet::dim_size_is_known(dshape_ncw[2])) {
-      oshape[2] = param_.stride[0] * (dshape_ncw[2] - 1) +
-          dilated_ksize_x - 2 * o_pad[0] + o_adj[0];
+      oshape[2] =
+          param_.stride[0] * (dshape_ncw[2] - 1) + dilated_ksize_x - 2 * o_pad[0] + o_adj[0];
     } else {
       oshape[2] = -1;
     }
 
     if (param_.target_shape.ndim() > 0) {
       if (param_.target_shape[0] > 0) {
-        CHECK_EQ(param_.target_shape[0], oshape[2]) \
-          << "param_.target_shape[0] was not reasonable, please set it carefully";
+        CHECK_EQ(param_.target_shape[0], oshape[2])
+            << "param_.target_shape[0] was not reasonable, please set it carefully";
       }
     }
 
@@ -170,12 +164,10 @@ static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
     return true;
   } else if (param_.kernel.ndim() == 2) {
     // 2d conv
-    CHECK_EQ(dshape.ndim(), 4U) \
-      << "Input data should be 4D in batch-num_filter-y-x";
+    CHECK_EQ(dshape.ndim(), 4U) << "Input data should be 4D in batch-num_filter-y-x";
     Shape<4> dshape_nchw = ConvertLayout(dshape.get<4>(), param_.layout.value(), kNCHW);
-    Shape<4> wshape = Shape4(dshape_nchw[1],
-        param_.num_filter / param_.num_group,
-        param_.kernel[0], param_.kernel[1]);
+    Shape<4> wshape      = Shape4(
+        dshape_nchw[1], param_.num_filter / param_.num_group, param_.kernel[0], param_.kernel[1]);
     wshape = ConvertLayout(wshape, kNCHW, param_.layout.value());
     SHAPE_ASSIGN_CHECK(*in_shape, deconv::kWeight, wshape);
     if (!param_.no_bias) {
@@ -189,44 +181,40 @@ static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
     index_t o_adj[2];
     param_.InferPad(dshape_nchw, o_pad, o_adj);
 
-    CHECK_EQ(dshape_nchw[1] % param_.num_group, 0U) \
-      << "input num_filter must divide group size";
-    CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-      << "output num_filter must divide group size";
-    CHECK_GT(param_.kernel.Size(), 0U) \
-      << "incorrect kernel size: " << param_.kernel;
-    CHECK_GT(param_.stride.Size(), 0U) \
-      << "incorrect stride size: " << param_.stride;
-    CHECK_GT(param_.dilate.Size(), 0U) \
-      << "incorrect dilate size: " << param_.dilate;
+    CHECK_EQ(dshape_nchw[1] % param_.num_group, 0U) << "input num_filter must divide group size";
+    CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+        << "output num_filter must divide group size";
+    CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+    CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+    CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
 
-    CHECK_GE(param_.stride[0]-1, o_adj[0]) << "adj(y) must be samller than stride[0]";
-    CHECK_GE(param_.stride[1]-1, o_adj[1]) << "adj(x) must be samller than stride[1]";
+    CHECK_GE(param_.stride[0] - 1, o_adj[0]) << "adj(y) must be samller than stride[0]";
+    CHECK_GE(param_.stride[1] - 1, o_adj[1]) << "adj(x) must be samller than stride[1]";
 
     Shape<4> oshape;
     oshape[0] = dshape_nchw[0];
     oshape[1] = param_.num_filter;
     if (mxnet::dim_size_is_known(dshape_nchw[2])) {
-      oshape[2] = param_.stride[0] * (dshape_nchw[2] - 1) +
-          dilated_ksize_y - 2 * o_pad[0] + o_adj[0];
+      oshape[2] =
+          param_.stride[0] * (dshape_nchw[2] - 1) + dilated_ksize_y - 2 * o_pad[0] + o_adj[0];
     } else {
       oshape[2] = -1;
     }
     if (mxnet::dim_size_is_known(dshape_nchw[3])) {
-      oshape[3] = param_.stride[1] * (dshape_nchw[3] - 1) +
-          dilated_ksize_x - 2 * o_pad[1] + o_adj[1];
+      oshape[3] =
+          param_.stride[1] * (dshape_nchw[3] - 1) + dilated_ksize_x - 2 * o_pad[1] + o_adj[1];
     } else {
       oshape[3] = -1;
     }
 
     if (param_.target_shape.ndim() > 1) {
       if (param_.target_shape[0] > 0) {
-        CHECK_EQ(param_.target_shape[0], oshape[2]) \
-          << "param_.target_shape[0] was not reasonable, please set it carefully";
+        CHECK_EQ(param_.target_shape[0], oshape[2])
+            << "param_.target_shape[0] was not reasonable, please set it carefully";
       }
       if (param_.target_shape[1] > 0) {
-        CHECK_EQ(param_.target_shape[1], oshape[3]) \
-          << "param_.target_shape[1] was not reasonable, please set it carefully";
+        CHECK_EQ(param_.target_shape[1], oshape[3])
+            << "param_.target_shape[1] was not reasonable, please set it carefully";
       }
     }
 
@@ -235,12 +223,14 @@ static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
     return true;
   } else if (param_.kernel.ndim() == 3) {
     // 3d conv
-    CHECK_EQ(dshape.ndim(), 5U) \
-      << "Input data should be 5D in batch-num_filter-depth-y-x";
+    CHECK_EQ(dshape.ndim(), 5U) << "Input data should be 5D in batch-num_filter-depth-y-x";
     Shape<5> dshape_ncdhw = ConvertLayout(dshape.get<5>(), param_.layout.value(), kNCDHW);
-    Shape<5> wshape = Shape5(dshape_ncdhw[1], param_.num_filter / param_.num_group,
-        param_.kernel[0], param_.kernel[1], param_.kernel[2]);
-    wshape = ConvertLayout(wshape, kNCDHW, param_.layout.value());
+    Shape<5> wshape       = Shape5(dshape_ncdhw[1],
+                             param_.num_filter / param_.num_group,
+                             param_.kernel[0],
+                             param_.kernel[1],
+                             param_.kernel[2]);
+    wshape                = ConvertLayout(wshape, kNCDHW, param_.layout.value());
     SHAPE_ASSIGN_CHECK(*in_shape, deconv::kWeight, wshape);
     if (!param_.no_bias) {
       SHAPE_ASSIGN_CHECK(*in_shape, deconv::kBias, Shape1(param_.num_filter));
@@ -256,57 +246,52 @@ static bool DeconvolutionShape(const nnvm::NodeAttrs& attrs,
     index_t o_adj[3];
     param_.InferPad(dshape_ncdhw, o_pad, o_adj);
 
-    CHECK_EQ(dshape_ncdhw[1] % param_.num_group, 0U) \
-      << "input num_filter must divide group size";
-    CHECK_EQ(param_.num_filter % param_.num_group, 0U) \
-      << "output num_filter must divide group size";
-    CHECK_GT(param_.kernel.Size(), 0U) \
-      << "incorrect kernel size: " << param_.kernel;
-    CHECK_GT(param_.stride.Size(), 0U) \
-      << "incorrect stride size: " << param_.stride;
-    CHECK_GT(param_.dilate.Size(), 0U) \
-      << "incorrect dilate size: " << param_.dilate;
-    CHECK_EQ(param_.dilate.Size(), 1U)
-      << "Dilate is not supported in 3d deconvolution";
-
-    CHECK_GE(param_.stride[0]-1, o_adj[0]) << "adj(d) must be samller than stride[0]";
-    CHECK_GE(param_.stride[1]-1, o_adj[1]) << "adj(y) must be samller than stride[1]";
-    CHECK_GE(param_.stride[2]-1, o_adj[2]) << "adj(x) must be samller than stride[2]";
+    CHECK_EQ(dshape_ncdhw[1] % param_.num_group, 0U) << "input num_filter must divide group size";
+    CHECK_EQ(param_.num_filter % param_.num_group, 0U)
+        << "output num_filter must divide group size";
+    CHECK_GT(param_.kernel.Size(), 0U) << "incorrect kernel size: " << param_.kernel;
+    CHECK_GT(param_.stride.Size(), 0U) << "incorrect stride size: " << param_.stride;
+    CHECK_GT(param_.dilate.Size(), 0U) << "incorrect dilate size: " << param_.dilate;
+    CHECK_EQ(param_.dilate.Size(), 1U) << "Dilate is not supported in 3d deconvolution";
+
+    CHECK_GE(param_.stride[0] - 1, o_adj[0]) << "adj(d) must be samller than stride[0]";
+    CHECK_GE(param_.stride[1] - 1, o_adj[1]) << "adj(y) must be samller than stride[1]";
+    CHECK_GE(param_.stride[2] - 1, o_adj[2]) << "adj(x) must be samller than stride[2]";
 
     Shape<5> oshape;
     oshape[0] = dshape_ncdhw[0];
     oshape[1] = param_.num_filter;
     if (mxnet::dim_size_is_known(dshape_ncdhw[2])) {
-      oshape[2] = param_.stride[0] * (dshape_ncdhw[2] - 1) +
-          dilated_ksize_d - 2 * o_pad[0] + o_adj[0];
+      oshape[2] =
+          param_.stride[0] * (dshape_ncdhw[2] - 1) + dilated_ksize_d - 2 * o_pad[0] + o_adj[0];
     } else {
       oshape[2] = -1;
     }
     if (mxnet::dim_size_is_known(dshape_ncdhw[3])) {
-      oshape[3] = param_.stride[1] * (dshape_ncdhw[3] - 1) +
-          dilated_ksize_y - 2 * o_pad[1] + o_adj[1];
+      oshape[3] =
+          param_.stride[1] * (dshape_ncdhw[3] - 1) + dilated_ksize_y - 2 * o_pad[1] + o_adj[1];
     } else {
       oshape[3] = -1;
     }
     if (mxnet::dim_size_is_known(dshape_ncdhw[4])) {
-      oshape[4] = param_.stride[2] * (dshape_ncdhw[4] - 1) +
-          dilated_ksize_x - 2 * o_pad[2] + o_adj[2];
+      oshape[4] =
+          param_.stride[2] * (dshape_ncdhw[4] - 1) + dilated_ksize_x - 2 * o_pad[2] + o_adj[2];
     } else {
       oshape[4] = -1;
     }
 
     if (param_.target_shape.ndim() > 2) {
       if (param_.target_shape[0] > 0) {
-        CHECK_EQ(param_.target_shape[0], oshape[2]) \
-          << "param_.target_shape[0] was not reasonable, please set it carefully";
+        CHECK_EQ(param_.target_shape[0], oshape[2])
+            << "param_.target_shape[0] was not reasonable, please set it carefully";
       }
       if (param_.target_shape[1] > 0) {
-        CHECK_EQ(param_.target_shape[1], oshape[3]) \
-          << "param_.target_shape[1] was not reasonable, please set it carefully";
+        CHECK_EQ(param_.target_shape[1], oshape[3])
+            << "param_.target_shape[1] was not reasonable, please set it carefully";
       }
       if (param_.target_shape[2] > 0) {
-        CHECK_EQ(param_.target_shape[2], oshape[4]) \
-          << "param_.target_shape[2] was not reasonable, please set it carefully";
+        CHECK_EQ(param_.target_shape[2], oshape[4])
+            << "param_.target_shape[2] was not reasonable, please set it carefully";
       }
     }
 
@@ -328,18 +313,19 @@ static inline std::vector<std::string> ListArguments(const DeconvolutionParam& p
 }
 
 static bool DeconvolutionType(const nnvm::NodeAttrs& attrs,
-                              std::vector<int> *in_type, std::vector<int> *out_type) {
+                              std::vector<int>* in_type,
+                              std::vector<int>* out_type) {
   const DeconvolutionParam& param_ = nnvm::get<DeconvolutionParam>(attrs.parsed);
   CHECK_GE(in_type->size(), 1U);
   int dtype = (*in_type)[0];
   if (type_is_none(dtype)) {
     // Input type is undefined, we try backward inference
     if (out_type->size() == 0 || type_is_none((*out_type)[0])) {
-       // Neither the input nor the output are defined,
-       // types cannot be infered for this op
+      // Neither the input nor the output are defined,
+      // types cannot be infered for this op
       return false;
     } else {
-       // Input type is undefined but output type is: backward inference
+      // Input type is undefined but output type is: backward inference
       dtype = (*out_type)[0];
     }
   } else {
@@ -362,46 +348,54 @@ static void DeconvolutionParamParser(nnvm::NodeAttrs* attrs) {
   DeconvolutionParam param_;
   param_.Init(attrs->dict);
   if (param_.kernel.ndim() == 1) {
-    param_.layout = param_.layout? param_.layout.value() : mshadow::kNCW;
-    if (param_.stride.ndim() == 0) param_.stride = Shape1(1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape1(1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape1(0);
-    if (param_.adj.ndim() == 0) param_.adj = Shape1(0);
+    param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCW;
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape1(1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape1(1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape1(0);
+    if (param_.adj.ndim() == 0)
+      param_.adj = Shape1(0);
   } else if (param_.kernel.ndim() == 2) {
     param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCHW;
-    if (param_.stride.ndim() == 0) param_.stride = Shape2(1, 1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape2(1, 1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape2(0, 0);
-    if (param_.adj.ndim() == 0) param_.adj = Shape2(0, 0);
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape2(1, 1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape2(1, 1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape2(0, 0);
+    if (param_.adj.ndim() == 0)
+      param_.adj = Shape2(0, 0);
   } else {
     CHECK_EQ(param_.kernel.ndim(), 3U) << param_.kernel.ndim() << "D deconvolution not supported";
-    param_.layout = param_.layout ? param_.layout.value(): mshadow::kNCDHW;
-    if (param_.stride.ndim() == 0) param_.stride = Shape3(1, 1, 1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape3(1, 1, 1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape3(0, 0, 0);
-    if (param_.adj.ndim() == 0) param_.adj = Shape3(0, 0, 0);
+    param_.layout = param_.layout ? param_.layout.value() : mshadow::kNCDHW;
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape3(1, 1, 1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape3(1, 1, 1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape3(0, 0, 0);
+    if (param_.adj.ndim() == 0)
+      param_.adj = Shape3(0, 0, 0);
   }
   CHECK_EQ(param_.kernel.ndim(), param_.stride.ndim())
-    << "Stride must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while stride is "
-    << param_.stride;
+      << "Stride must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while stride is " << param_.stride;
   CHECK_EQ(param_.kernel.ndim(), param_.dilate.ndim())
-    << "Dilate must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while dilate is "
-    << param_.dilate;
+      << "Dilate must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while dilate is " << param_.dilate;
   CHECK_EQ(param_.kernel.ndim(), param_.pad.ndim())
-    << "Padding must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while padding is "
-    << param_.pad;
+      << "Padding must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while padding is " << param_.pad;
   CHECK_EQ(param_.kernel.ndim(), param_.adj.ndim())
-    << "Adjustment must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while adjustment is "
-    << param_.adj;
+      << "Adjustment must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while adjustment is " << param_.adj;
   attrs->parsed = std::move(param_);
 }
 
 struct DeconvolutionGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
@@ -417,65 +411,71 @@ struct DeconvolutionGrad {
 DMLC_REGISTER_PARAMETER(DeconvolutionParam);
 
 NNVM_REGISTER_OP(Deconvolution)
-.add_alias("_npx_deconvolution")
-.describe("Computes 1D or 2D transposed convolution (aka fractionally strided convolution) of the "
-    "input tensor. This operation can be seen as the gradient of Convolution operation with "
-    "respect to its input. Convolution usually reduces the size of the input. Transposed "
-    "convolution works the other way, going from a smaller input to a larger output while "
-    "preserving the connectivity pattern.")
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const DeconvolutionParam& params = nnvm::get<DeconvolutionParam>(attrs.parsed);
-  return params.no_bias ? 2 : 3;
-})
-.set_num_outputs(1)
-.set_attr_parser(DeconvolutionParamParser)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return ListArguments(nnvm::get<DeconvolutionParam>(attrs.parsed));
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", DeconvolutionShape)
-.set_attr<nnvm::FInferType>("FInferType", DeconvolutionType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", DeconvolutionCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", DeconvolutionGrad{"_backward_Deconvolution"})
+    .add_alias("_npx_deconvolution")
+    .describe(
+        "Computes 1D or 2D transposed convolution (aka fractionally strided convolution) of the "
+        "input tensor. This operation can be seen as the gradient of Convolution operation with "
+        "respect to its input. Convolution usually reduces the size of the input. Transposed "
+        "convolution works the other way, going from a smaller input to a larger output while "
+        "preserving the connectivity pattern.")
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const DeconvolutionParam& params = nnvm::get<DeconvolutionParam>(attrs.parsed);
+      return params.no_bias ? 2 : 3;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(DeconvolutionParamParser)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return ListArguments(
+                                           nnvm::get<DeconvolutionParam>(attrs.parsed));
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", DeconvolutionShape)
+    .set_attr<nnvm::FInferType>("FInferType", DeconvolutionType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", DeconvolutionCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", DeconvolutionGrad{"_backward_Deconvolution"})
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", DeconvStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DeconvolutionComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", DeconvStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DeconvolutionComputeExCPU)
 #endif
-.add_argument("data", "NDArray-or-Symbol", "Input tensor to the deconvolution operation.")
-.add_argument("weight", "NDArray-or-Symbol", "Weights representing the kernel.")
-.add_argument("bias", "NDArray-or-Symbol", "Bias added to the result after the deconvolution "
-    "operation.")
-.add_arguments(DeconvolutionParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input tensor to the deconvolution operation.")
+    .add_argument("weight", "NDArray-or-Symbol", "Weights representing the kernel.")
+    .add_argument("bias",
+                  "NDArray-or-Symbol",
+                  "Bias added to the result after the deconvolution "
+                  "operation.")
+    .add_arguments(DeconvolutionParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Deconvolution)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const DeconvolutionParam& params = nnvm::get<DeconvolutionParam>(attrs.parsed);
-  return params.no_bias ? 3 : 4;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const DeconvolutionParam& params = nnvm::get<DeconvolutionParam>(attrs.parsed);
-  return params.no_bias ? 2 : 3;
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr_parser(DeconvolutionParamParser)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const DeconvolutionParam& params = nnvm::get<DeconvolutionParam>(attrs.parsed);
+      return params.no_bias ? 3 : 4;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const DeconvolutionParam& params = nnvm::get<DeconvolutionParam>(attrs.parsed);
+      return params.no_bias ? 2 : 3;
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr_parser(DeconvolutionParamParser)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", BackwardDeconvStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DeconvolutionGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardDeconvStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DeconvolutionGradComputeExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", DeconvolutionGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", DeconvolutionGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/deconvolution.cu b/src/operator/nn/deconvolution.cu
index 6332c1f9078f..b757c5b4aeb6 100644
--- a/src/operator/nn/deconvolution.cu
+++ b/src/operator/nn/deconvolution.cu
@@ -22,7 +22,7 @@
  * \file deconvolution.cu
  * \brief
  * \author Wei Wu, Da Zheng
-*/
+ */
 
 #include "./deconvolution-inl.h"
 #if MXNET_USE_CUDNN == 1
@@ -33,8 +33,8 @@ namespace mxnet {
 namespace op {
 
 #if MXNET_USE_CUDNN == 1
-template<typename DType>
-static CuDNNDeconvolutionOp<DType> &GetCuDNNDeconvOp(const DeconvolutionParam& param,
+template <typename DType>
+static CuDNNDeconvolutionOp<DType>& GetCuDNNDeconvOp(const DeconvolutionParam& param,
                                                      int forward_compute_type,
                                                      int backward_compute_type,
                                                      const mxnet::ShapeVector& in_shape,
@@ -42,25 +42,22 @@ static CuDNNDeconvolutionOp<DType> &GetCuDNNDeconvOp(const DeconvolutionParam& p
                                                      const RunContext& rctx,
                                                      bool add_to_weight) {
 #if DMLC_CXX11_THREAD_LOCAL
-  static thread_local std::unordered_map<DeconvSignature,
-                                         std::shared_ptr<CuDNNDeconvolutionOp<DType> >,
-                                         OpHash> ops;
+  static thread_local std::
+      unordered_map<DeconvSignature, std::shared_ptr<CuDNNDeconvolutionOp<DType>>, OpHash>
+          ops;
 #else
-  static MX_THREAD_LOCAL std::unordered_map<DeconvSignature,
-                                            std::shared_ptr<CuDNNDeconvolutionOp<DType> >,
-                                            OpHash> ops;
+  static MX_THREAD_LOCAL
+      std::unordered_map<DeconvSignature, std::shared_ptr<CuDNNDeconvolutionOp<DType>>, OpHash>
+          ops;
 #endif
   DeconvSignature key(param);
   size_t ndim = 0;
-  for (auto &s : in_shape)
+  for (auto& s : in_shape)
     ndim += s.ndim();
-  for (auto &s : out_shape)
+  for (auto& s : out_shape)
     ndim += s.ndim();
-  key.Reserve(1 /* for forward_compute_type */ +
-              1 /* for backward_compute_type */ +
-              ndim /* for in and out shapes */ +
-              1 /* for dev_id */ +
-              1 /* for add_to_weight */);
+  key.Reserve(1 /* for forward_compute_type */ + 1 /* for backward_compute_type */ +
+              ndim /* for in and out shapes */ + 1 /* for dev_id */ + 1 /* for add_to_weight */);
 
   key.AddSign(forward_compute_type);
   key.AddSign(backward_compute_type);
@@ -73,24 +70,29 @@ static CuDNNDeconvolutionOp<DType> &GetCuDNNDeconvOp(const DeconvolutionParam& p
   if (it == ops.end()) {
     std::shared_ptr<CuDNNDeconvolutionOp<DType>> op(new CuDNNDeconvolutionOp<DType>());
     auto ins_ret = ops.insert(
-            std::pair<DeconvSignature, std::shared_ptr<CuDNNDeconvolutionOp<DType>>>(key, op));
+        std::pair<DeconvSignature, std::shared_ptr<CuDNNDeconvolutionOp<DType>>>(key, op));
     CHECK(ins_ret.second);
     it = ins_ret.first;
-    it->second->Init(param, forward_compute_type, backward_compute_type, in_shape,
-                     out_shape, rctx, add_to_weight);
+    it->second->Init(param,
+                     forward_compute_type,
+                     backward_compute_type,
+                     in_shape,
+                     out_shape,
+                     rctx,
+                     add_to_weight);
   }
   return *it->second;
 }
 #endif
 
-template<>
+template <>
 void DeconvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
   const DeconvolutionParam& param = nnvm::get<DeconvolutionParam>(attrs.parsed);
-  int dtype = inputs[0].type_flag_;
+  int dtype                       = inputs[0].type_flag_;
 
 #if MXNET_USE_CUDNN == 1
   // On fp16-I/O instances, use fp32 compute (i.e. pseudo-fp16).
@@ -101,10 +103,10 @@ void DeconvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
       DeconvolutionOp<gpu, DType> op;
       op.Init(param);
       op.Forward(ctx, inputs, req, outputs);
-    } else if (!CuDNNDeconvolutionOp<DType>::Supports(param,
-          compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
-      LOG(WARNING) <<
-        "This deconvolution is not supported by cudnn, MXNET deconvolution is applied.";
+    } else if (!CuDNNDeconvolutionOp<DType>::Supports(
+                   param, compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
+      LOG(WARNING)
+          << "This deconvolution is not supported by cudnn, MXNET deconvolution is applied.";
       DeconvolutionOp<gpu, DType> op;
       op.Init(param);
       op.Forward(ctx, inputs, req, outputs);
@@ -116,8 +118,9 @@ void DeconvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
       }
       // req[deconv::kWeight] is only set for backward, so assume the typical 'write' for now.
       auto add_to_weight = false;
-      GetCuDNNDeconvOp<DType>(param, compute_type, compute_type,
-          in_shape, out_shape, ctx.run_ctx, add_to_weight).Forward(ctx, inputs, req, outputs);
+      GetCuDNNDeconvOp<DType>(
+          param, compute_type, compute_type, in_shape, out_shape, ctx.run_ctx, add_to_weight)
+          .Forward(ctx, inputs, req, outputs);
     }
   })
 #else
@@ -129,7 +132,7 @@ void DeconvolutionCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif  // MXNET_USE_CUDNN
 }
 
-template<>
+template <>
 void DeconvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const std::vector<TBlob>& inputs,
@@ -137,9 +140,9 @@ void DeconvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                    const std::vector<TBlob>& outputs) {
   const DeconvolutionParam& param = nnvm::get<DeconvolutionParam>(attrs.parsed);
   std::vector<TBlob> in_data(inputs.begin() + 1, inputs.end());
-  const TBlob &out_grad = inputs[0];
-  const std::vector<TBlob> &in_grad = outputs;
-  int dtype = out_grad.type_flag_;
+  const TBlob& out_grad             = inputs[0];
+  const std::vector<TBlob>& in_grad = outputs;
+  int dtype                         = out_grad.type_flag_;
 
 #if MXNET_USE_CUDNN == 1
   // On fp16-I/O instances, use fp32 compute (i.e. pseudo-fp16).
@@ -150,10 +153,10 @@ void DeconvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
       DeconvolutionOp<gpu, DType> op;
       op.Init(param);
       op.Backward(ctx, std::vector<TBlob>{out_grad}, in_data, req, in_grad);
-    } else if (!CuDNNDeconvolutionOp<DType>::Supports(param,
-          compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
-      LOG(WARNING) <<
-        "This deconvolution is not supported by cudnn, MXNET deconvolution is applied.";
+    } else if (!CuDNNDeconvolutionOp<DType>::Supports(
+                   param, compute_type, compute_type, ctx.run_ctx.ctx.dev_id)) {
+      LOG(WARNING)
+          << "This deconvolution is not supported by cudnn, MXNET deconvolution is applied.";
       DeconvolutionOp<gpu, DType> op;
       op.Init(param);
       op.Backward(ctx, std::vector<TBlob>{out_grad}, in_data, req, in_grad);
@@ -164,9 +167,9 @@ void DeconvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
         in_shape[i] = in_data[i].shape_;
       }
       auto add_to_weight = req[deconv::kWeight] == kAddTo;
-      GetCuDNNDeconvOp<DType>(param, compute_type, compute_type,
-          in_shape, out_shape, ctx.run_ctx, add_to_weight).Backward(ctx,
-            std::vector<TBlob>{out_grad}, in_data, req, in_grad);
+      GetCuDNNDeconvOp<DType>(
+          param, compute_type, compute_type, in_shape, out_shape, ctx.run_ctx, add_to_weight)
+          .Backward(ctx, std::vector<TBlob>{out_grad}, in_data, req, in_grad);
     }
   })
 #else
@@ -178,11 +181,10 @@ void DeconvolutionGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif  // MXNET_USE_CUDNN
 }
 
-NNVM_REGISTER_OP(Deconvolution)
-.set_attr<FCompute>("FCompute<gpu>", DeconvolutionCompute<gpu>);
+NNVM_REGISTER_OP(Deconvolution).set_attr<FCompute>("FCompute<gpu>", DeconvolutionCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_Deconvolution)
-.set_attr<FCompute>("FCompute<gpu>", DeconvolutionGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", DeconvolutionGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/depthwise_convolution-inl.h b/src/operator/nn/depthwise_convolution-inl.h
index cd2cbd1c0788..99d8da4705db 100644
--- a/src/operator/nn/depthwise_convolution-inl.h
+++ b/src/operator/nn/depthwise_convolution-inl.h
@@ -21,7 +21,7 @@
  * \file depthwise_convolution-inl.h
  * \brief CUDA depthwise convolution code
  * \author shuqian.qu@hobot.cc
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_DEPTHWISE_CONVOLUTION_INL_H_
 #define MXNET_OPERATOR_NN_DEPTHWISE_CONVOLUTION_INL_H_
 #include <algorithm>
@@ -33,45 +33,45 @@
 #include <cub/cub.cuh>
 #include "./depthwise_convolution_tf.cuh"
 
-#define ROUND_TO_MULTIPLE(x, m) ((((x) + (m) - 1) / (m)) * (m))
+#define ROUND_TO_MULTIPLE(x, m) ((((x) + (m)-1) / (m)) * (m))
 
 namespace mxnet {
 namespace op {
 using namespace tf::depthwise_conv;
-template<typename DType>
+template <typename DType>
 class DepthwiseConvolutionOp {
  public:
   void Init(const ConvolutionParam& param,
             const mxnet::ShapeVector& in_shape,
             const mxnet::ShapeVector& out_shape) {
-    args_.batch = in_shape[conv::kData][0];
-    args_.in_channel = in_shape[conv::kData][1];
-    args_.in_height = in_shape[conv::kData][2];
-    args_.in_width = in_shape[conv::kData][3];
+    args_.batch         = in_shape[conv::kData][0];
+    args_.in_channel    = in_shape[conv::kData][1];
+    args_.in_height     = in_shape[conv::kData][2];
+    args_.in_width      = in_shape[conv::kData][3];
     args_.filter_height = in_shape[conv::kWeight][2];
-    args_.filter_width = in_shape[conv::kWeight][3];
+    args_.filter_width  = in_shape[conv::kWeight][3];
     args_.stride_height = param.stride[0];
-    args_.stride_width = param.stride[1];
-    args_.pad_height = param.pad[0];
-    args_.pad_width = param.pad[1];
-    args_.out_channel = out_shape[conv::kOut][1];
-    args_.out_height = out_shape[conv::kOut][2];
-    args_.out_width = out_shape[conv::kOut][3];
-    bias_term_ = !param.no_bias;
+    args_.stride_width  = param.stride[1];
+    args_.pad_height    = param.pad[0];
+    args_.pad_width     = param.pad[1];
+    args_.out_channel   = out_shape[conv::kOut][1];
+    args_.out_height    = out_shape[conv::kOut][2];
+    args_.out_width     = out_shape[conv::kOut][3];
+    bias_term_          = !param.no_bias;
   }
 
   ~DepthwiseConvolutionOp() {}
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data);
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data);
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad);
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad);
 
  private:
   DepthwiseArgs args_;
@@ -80,135 +80,108 @@ class DepthwiseConvolutionOp {
 
 namespace depthwise_conv {
 
-template<typename DType>
-void DepthwiseConv2dForwardGpu(mshadow::Stream<gpu> *stream,
+template <typename DType>
+void DepthwiseConv2dForwardGpu(mshadow::Stream<gpu>* stream,
                                const DepthwiseArgs& args,
-                               const std::vector<TBlob> &in_data,
-                               const std::vector<TBlob> &out_data) {
+                               const std::vector<TBlob>& in_data,
+                               const std::vector<TBlob>& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace tf::depthwise_conv;
   using namespace tf::depthwise_conv::cuda;
-  Tensor<gpu, 4, DType> data = in_data[conv::kData].get<gpu, 4, DType>(stream);
+  Tensor<gpu, 4, DType> data   = in_data[conv::kData].get<gpu, 4, DType>(stream);
   Tensor<gpu, 4, DType> weight = in_data[conv::kWeight].get<gpu, 4, DType>(stream);
-  Tensor<gpu, 4, DType> out = out_data[conv::kOut].get<gpu, 4, DType>(stream);
+  Tensor<gpu, 4, DType> out    = out_data[conv::kOut].get<gpu, 4, DType>(stream);
 
   // select kernel
   if (CanLaunchDepthwiseConv2dGPUSmall(args)) {
     LaunchDepthwiseConv2dGPUSmall<DType, DIRECTION_FORWARD>(
-        stream,
-        args,
-        data.dptr_,
-        weight.dptr_,
-        out.dptr_);
+        stream, args, data.dptr_, weight.dptr_, out.dptr_);
   } else {
     int num_output = out_data[conv::kOut].shape_.Size();
-    int block_num = std::min(num_output/mshadow::cuda::kBaseThreadNum + 1,
-                             mshadow::cuda::kMaxGridNum);
+    int block_num =
+        std::min(num_output / mshadow::cuda::kBaseThreadNum + 1, mshadow::cuda::kMaxGridNum);
     auto s = mshadow::Stream<gpu>::GetStream(stream);
     if (args.filter_height == 3 && args.filter_width == 3) {
-      DepthwiseConv2dForwardKernel<DType, 3, 3>
-          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(data.dptr_,
-                                                               weight.dptr_,
-                                                               args,
-                                                               num_output,
-                                                               out.dptr_);
+      DepthwiseConv2dForwardKernel<DType, 3, 3><<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(
+          data.dptr_, weight.dptr_, args, num_output, out.dptr_);
     } else {
       DepthwiseConv2dForwardKernel<DType, -1, -1>
-          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(data.dptr_,
-                                                               weight.dptr_,
-                                                               args,
-                                                               num_output,
-                                                               out.dptr_);
+          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(
+              data.dptr_, weight.dptr_, args, num_output, out.dptr_);
     }
     MSHADOW_CUDA_POST_KERNEL_CHECK(DepthwiseConv2dForwardKernel);
   }
 }
 
-template<typename DType>
-void DepthwiseConv2dBackwardDataGpu(mshadow::Stream<gpu> *stream,
+template <typename DType>
+void DepthwiseConv2dBackwardDataGpu(mshadow::Stream<gpu>* stream,
                                     const DepthwiseArgs& args,
-                                    const std::vector<TBlob> &out_grad,
-                                    const std::vector<TBlob> &in_data,
-                                    const std::vector<TBlob> &in_grad) {
+                                    const std::vector<TBlob>& out_grad,
+                                    const std::vector<TBlob>& in_data,
+                                    const std::vector<TBlob>& in_grad) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace tf::depthwise_conv;
   using namespace tf::depthwise_conv::cuda;
-  Tensor<gpu, 4, DType> out_g = out_grad[conv::kOut].get<gpu, 4, DType>(stream);
-  Tensor<gpu, 4, DType> weight = in_data[conv::kWeight].get<gpu, 4, DType>(stream);
+  Tensor<gpu, 4, DType> out_g     = out_grad[conv::kOut].get<gpu, 4, DType>(stream);
+  Tensor<gpu, 4, DType> weight    = in_data[conv::kWeight].get<gpu, 4, DType>(stream);
   Tensor<gpu, 4, DType> in_data_g = in_grad[conv::kData].get<gpu, 4, DType>(stream);
   // select kernel
   if (CanLaunchDepthwiseConv2dGPUSmall(args)) {
     LaunchDepthwiseConv2dGPUSmall<DType, DIRECTION_BACKWARD>(
-        stream,
-        args,
-        out_g.dptr_,
-        weight.dptr_,
-        in_data_g.dptr_);
+        stream, args, out_g.dptr_, weight.dptr_, in_data_g.dptr_);
   } else {
     int num_in_grad = in_grad[conv::kData].shape_.Size();
-    auto s = mshadow::Stream<gpu>::GetStream(stream);
-    int block_num = std::min(num_in_grad/mshadow::cuda::kBaseThreadNum + 1,
-                             mshadow::cuda::kMaxGridNum);
-    DepthwiseConv2dBackwardDataKernel<DType>
-        <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(args,
-                                                             out_g.dptr_,
-                                                             weight.dptr_,
-                                                             in_data_g.dptr_,
-                                                             num_in_grad);
+    auto s          = mshadow::Stream<gpu>::GetStream(stream);
+    int block_num =
+        std::min(num_in_grad / mshadow::cuda::kBaseThreadNum + 1, mshadow::cuda::kMaxGridNum);
+    DepthwiseConv2dBackwardDataKernel<DType><<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(
+        args, out_g.dptr_, weight.dptr_, in_data_g.dptr_, num_in_grad);
     MSHADOW_CUDA_POST_KERNEL_CHECK(DepthwiseConv2dBackwardDataKernel);
   }
 }
 
-template<typename DType>
-void DepthwiseConv2dBackwardFilterGpu(mshadow::Stream<gpu> *stream,
+template <typename DType>
+void DepthwiseConv2dBackwardFilterGpu(mshadow::Stream<gpu>* stream,
                                       const DepthwiseArgs& args,
-                                      const std::vector<TBlob> &out_grad,
-                                      const std::vector<TBlob> &in_data,
-                                      const std::vector<TBlob> &in_grad) {
+                                      const std::vector<TBlob>& out_grad,
+                                      const std::vector<TBlob>& in_data,
+                                      const std::vector<TBlob>& in_grad) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace tf::depthwise_conv;
   using namespace tf::depthwise_conv::cuda;
-  Tensor<gpu, 4, DType> out_g = out_grad[conv::kOut].get<gpu, 4, DType>(stream);
-  Tensor<gpu, 4, DType> in_d = in_data[conv::kData].get<gpu, 4, DType>(stream);
+  Tensor<gpu, 4, DType> out_g       = out_grad[conv::kOut].get<gpu, 4, DType>(stream);
+  Tensor<gpu, 4, DType> in_d        = in_data[conv::kData].get<gpu, 4, DType>(stream);
   Tensor<gpu, 4, DType> weight_grad = in_grad[conv::kWeight].get<gpu, 4, DType>(stream);
   // select kernel
-  if (TryLaunchDepthwiseConv2dBackwardFilterGPUSmall<DType>(stream, args,
-                                                            out_g.dptr_,
-                                                            in_d.dptr_,
-                                                            weight_grad.dptr_)) {
+  if (TryLaunchDepthwiseConv2dBackwardFilterGPUSmall<DType>(
+          stream, args, out_g.dptr_, in_d.dptr_, weight_grad.dptr_)) {
     return;
   } else {
     int num_out_grad = out_grad[conv::kOut].shape_.Size();
-    auto s = mshadow::Stream<gpu>::GetStream(stream);
-    int block_num = std::min(args.out_channel * args.batch, mshadow::cuda::kMaxGridNum);
+    auto s           = mshadow::Stream<gpu>::GetStream(stream);
+    int block_num    = std::min(args.out_channel * args.batch, mshadow::cuda::kMaxGridNum);
     if (args.filter_width == 3 && args.filter_height == 3) {
       DepthwiseConv2dBackwardFilterKernel<DType, 3, 3>
-          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(args,
-                                                               out_g.dptr_,
-                                                               in_d.dptr_,
-                                                               weight_grad.dptr_,
-                                                               num_out_grad);
+          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(
+              args, out_g.dptr_, in_d.dptr_, weight_grad.dptr_, num_out_grad);
     } else {
       DepthwiseConv2dBackwardFilterKernel<DType, -1, -1>
-          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(args,
-                                                               out_g.dptr_,
-                                                               in_d.dptr_,
-                                                               weight_grad.dptr_,
-                                                               num_out_grad);
+          <<<block_num, mshadow::cuda::kBaseThreadNum, 0, s>>>(
+              args, out_g.dptr_, in_d.dptr_, weight_grad.dptr_, num_out_grad);
     }
     MSHADOW_CUDA_POST_KERNEL_CHECK(DepthwiseConv2dBackwardFilterKernel);
   }
 }
 }  // namespace depthwise_conv
 
-template<typename DType>
-void DepthwiseConvolutionOp<DType>::Forward(const OpContext &ctx,
-                                            const std::vector<TBlob> &in_data,
-                                            const std::vector<OpReqType> &req,
-                                            const std::vector<TBlob> &out_data) {
+template <typename DType>
+void DepthwiseConvolutionOp<DType>::Forward(const OpContext& ctx,
+                                            const std::vector<TBlob>& in_data,
+                                            const std::vector<OpReqType>& req,
+                                            const std::vector<TBlob>& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
   auto stream = ctx.get_stream<gpu>();
@@ -218,7 +191,7 @@ void DepthwiseConvolutionOp<DType>::Forward(const OpContext &ctx,
 
   // bias forward
   if (bias_term_) {
-    Tensor<gpu, 1, DType> bias = in_data[conv::kBias].get<gpu, 1, DType>(stream);
+    Tensor<gpu, 1, DType> bias      = in_data[conv::kBias].get<gpu, 1, DType>(stream);
     Tensor<gpu, 3, DType> output_3d = out_data[conv::kOut].get_with_shape<gpu, 3, DType>(
         Shape3(args_.batch, args_.out_channel, args_.out_height * args_.out_width), stream);
     // has bias term, broadcast it to the same shape of output_3d in channel dim
@@ -226,12 +199,12 @@ void DepthwiseConvolutionOp<DType>::Forward(const OpContext &ctx,
   }
 }
 
-template<typename DType>
-void DepthwiseConvolutionOp<DType>::Backward(const OpContext &ctx,
-                                             const std::vector<TBlob> &out_grad,
-                                             const std::vector<TBlob> &in_data,
-                                             const std::vector<OpReqType> &req,
-                                             const std::vector<TBlob> &in_grad) {
+template <typename DType>
+void DepthwiseConvolutionOp<DType>::Backward(const OpContext& ctx,
+                                             const std::vector<TBlob>& out_grad,
+                                             const std::vector<TBlob>& in_data,
+                                             const std::vector<OpReqType>& req,
+                                             const std::vector<TBlob>& in_grad) {
   using namespace mshadow;
   using namespace mshadow::expr;
   auto stream = ctx.get_stream<gpu>();
@@ -239,32 +212,26 @@ void DepthwiseConvolutionOp<DType>::Backward(const OpContext &ctx,
   if (req[conv::kData] != kNullOp) {
     if (req[conv::kData] != kAddTo) {
       mshadow::Tensor<gpu, 4, DType> igrad = in_grad[conv::kData].get<gpu, 4, DType>(stream);
-      igrad = 0.0f;
+      igrad                                = 0.0f;
     }
-    depthwise_conv::DepthwiseConv2dBackwardDataGpu<DType>(stream,
-                                                          args_,
-                                                          out_grad,
-                                                          in_data,
-                                                          in_grad);
+    depthwise_conv::DepthwiseConv2dBackwardDataGpu<DType>(
+        stream, args_, out_grad, in_data, in_grad);
   }
 
   // backward filter
   if (req[conv::kWeight] != kNullOp) {
     if (req[conv::kWeight] != kAddTo) {
       mshadow::Tensor<gpu, 4, DType> wgrad = in_grad[conv::kWeight].get<gpu, 4, DType>(stream);
-      wgrad = 0.0f;
+      wgrad                                = 0.0f;
     }
-    depthwise_conv::DepthwiseConv2dBackwardFilterGpu<DType>(stream,
-                                                            args_,
-                                                            out_grad,
-                                                            in_data,
-                                                            in_grad);
+    depthwise_conv::DepthwiseConv2dBackwardFilterGpu<DType>(
+        stream, args_, out_grad, in_data, in_grad);
   }
 
   // backward bias
   if (bias_term_) {
     Tensor<gpu, 1, DType> dbias = in_grad[conv::kBias].get<gpu, 1, DType>(stream);
-    Tensor<gpu, 3, DType> dout = out_grad[conv::kOut].get_with_shape<gpu, 3, DType>(
+    Tensor<gpu, 3, DType> dout  = out_grad[conv::kOut].get_with_shape<gpu, 3, DType>(
         Shape3(args_.batch, args_.out_channel, args_.out_height * args_.out_width), stream);
     ASSIGN_DISPATCH(dbias, req[conv::kBias], sumall_except_dim<1>(dout));
   }
diff --git a/src/operator/nn/dropout-inl.h b/src/operator/nn/dropout-inl.h
index b32e47460e0a..47e573a41f61 100644
--- a/src/operator/nn/dropout-inl.h
+++ b/src/operator/nn/dropout-inl.h
@@ -22,7 +22,7 @@
  * \file dropout-inl.h
  * \brief
  * \author Bing Xu, Da Zheng, Hang Zhang
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_DROPOUT_INL_H_
 #define MXNET_OPERATOR_NN_DROPOUT_INL_H_
@@ -53,10 +53,10 @@
 #define MXNET_USE_CUDNN_DROPOUT MXNET_USE_CUDNN == 1 && CUDNN_MAJOR >= 7
 
 namespace dropout {
-enum DropoutOpInputs {kData};
-enum DropoutOpOutputs {kOut, kMask};
-enum DropoutOpForwardResource {kRandom};
-enum DropoutOpMode {kTraining, kAlways};
+enum DropoutOpInputs { kData };
+enum DropoutOpOutputs { kOut, kMask };
+enum DropoutOpForwardResource { kRandom };
+enum DropoutOpMode { kTraining, kAlways };
 }  // namespace dropout
 
 namespace mxnet {
@@ -70,19 +70,22 @@ struct DropoutParam : public dmlc::Parameter<DropoutParam> {
   mxnet::TShape axes;
   dmlc::optional<bool> cudnn_off;
   DMLC_DECLARE_PARAMETER(DropoutParam) {
-    DMLC_DECLARE_FIELD(p).set_default(0.5)
-    .set_range(0, 1)
-    .describe("Fraction of the input that gets dropped out during training time.");
+    DMLC_DECLARE_FIELD(p).set_default(0.5).set_range(0, 1).describe(
+        "Fraction of the input that gets dropped out during training time.");
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("training", dropout::kTraining)
-    .add_enum("always", dropout::kAlways)
-    .set_default(dropout::kTraining)
-    .describe("Whether to only turn on dropout during training or to also turn on for inference.");
-    DMLC_DECLARE_FIELD(axes).set_default(mxnet::TShape(0, 0))
-    .describe("Axes for variational dropout kernel.");
-    DMLC_DECLARE_FIELD(cudnn_off).set_default(dmlc::optional<bool>(false))
-    .describe("Whether to turn off cudnn in dropout operator. "
-              "This option is ignored if axes is specified.");
+        .add_enum("training", dropout::kTraining)
+        .add_enum("always", dropout::kAlways)
+        .set_default(dropout::kTraining)
+        .describe(
+            "Whether to only turn on dropout during training or to also turn on for inference.");
+    DMLC_DECLARE_FIELD(axes)
+        .set_default(mxnet::TShape(0, 0))
+        .describe("Axes for variational dropout kernel.");
+    DMLC_DECLARE_FIELD(cudnn_off)
+        .set_default(dmlc::optional<bool>(false))
+        .describe(
+            "Whether to turn off cudnn in dropout operator. "
+            "This option is ignored if axes is specified.");
   }
   std::string Mode2String(int mode) {
     switch (mode) {
@@ -102,28 +105,30 @@ struct DropoutParam : public dmlc::Parameter<DropoutParam> {
     mode_s << mode;
     axes_s << axes;
     cudnn_off_s << cudnn_off;
-    (*dict)["p"] = p_s.str();
-    (*dict)["mode"] = Mode2String(mode);
-    (*dict)["axes"] = axes_s.str();
+    (*dict)["p"]         = p_s.str();
+    (*dict)["mode"]      = Mode2String(mode);
+    (*dict)["axes"]      = axes_s.str();
     (*dict)["cudnn_off"] = cudnn_off_s.str();
   }
 };  // struct DropoutParam
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class DropoutOp {
 #if MXNET_USE_MKL_DROPOUT
   static void BernoulliGenerate(common::random::RandGenerator<cpu, DType> gen,
-                                int n, double p, int* r) {
+                                int n,
+                                double p,
+                                int* r) {
     typename RandGenerator<xpu, DType>::Impl genImpl(&gen, 1);
     const int seed = 17 + abs(genImpl.rand() % 4096);
     CHECK_GE(seed, 0);
     const int nthr = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
 #pragma omp parallel num_threads(nthr)
     {
-      const int ithr = omp_get_thread_num();
+      const int ithr       = omp_get_thread_num();
       const int avg_amount = (n + nthr - 1) / nthr;
-      const int my_offset = ithr * avg_amount;
-      const int my_amount = std::min(my_offset + avg_amount, n) - my_offset;
+      const int my_offset  = ithr * avg_amount;
+      const int my_amount  = std::min(my_offset + avg_amount, n) - my_offset;
       if (my_amount > 0) {
         VSLStreamStatePtr stream;
         vslNewStream(&stream, VSL_BRNG_MCG31, seed);
@@ -140,47 +145,47 @@ class DropoutOp {
   }
 
   // MKL forward pass
-  inline void MKLForward(const OpContext &ctx,
-                         const std::vector<TBlob> &in_data,
-                         const std::vector<TBlob> &out_data) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    RandGenerator<xpu, DType> *pgen = ctx.requested[0].get_parallel_random<xpu, DType>();
+  inline void MKLForward(const OpContext& ctx,
+                         const std::vector<TBlob>& in_data,
+                         const std::vector<TBlob>& out_data) {
+    Stream<xpu>* s                  = ctx.get_stream<xpu>();
+    RandGenerator<xpu, DType>* pgen = ctx.requested[0].get_parallel_random<xpu, DType>();
     CHECK_NOTNULL(pgen);
     Tensor<xpu, 2, DType> mask = out_data[dropout::kMask].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> data = in_data[dropout::kData].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = out_data[dropout::kOut].FlatTo2D<xpu, DType>(s);
-    DType *outptr = out.dptr_;
-    DType *dataptr = data.dptr_;
-    auto maskptr = reinterpret_cast<int *>(mask.dptr_);
-    int count = mask.shape_[0] * mask.shape_[1];
+    Tensor<xpu, 2, DType> out  = out_data[dropout::kOut].FlatTo2D<xpu, DType>(s);
+    DType* outptr              = out.dptr_;
+    DType* dataptr             = data.dptr_;
+    auto maskptr               = reinterpret_cast<int*>(mask.dptr_);
+    int count                  = mask.shape_[0] * mask.shape_[1];
     if (sizeof(DType) > sizeof(int)) {
       // allocating new buffer to avoiding memory overlapping between `mask.dptr_` and `maskptr`
       Tensor<xpu, 1, int> temp = ctx.requested[1].get_space_typed<xpu, 1, int>(Shape1(count), s);
-      maskptr = temp.dptr_;
+      maskptr                  = temp.dptr_;
     }
     BernoulliGenerate(*pgen, count, this->pkeep_, maskptr);
     const float pk_1 = 1.0f / this->pkeep_;
 #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (int i = 0; i < count; ++i) {
       const DType maskVal = static_cast<DType>(maskptr[i]) * pk_1;
-      outptr[i] = dataptr[i] * maskVal;
-      mask.dptr_[i] = maskVal;
+      outptr[i]           = dataptr[i] * maskVal;
+      mask.dptr_[i]       = maskVal;
     }
   }
 
   // MKL backward pass
-  inline void MKLBackward(const OpContext &ctx,
-                          const std::vector<TBlob> &in_grad,
-                          const std::vector<TBlob> &out_data,
-                          const std::vector<TBlob> &out_grad) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 2, DType> grad = out_grad[dropout::kOut].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> mask = out_data[dropout::kMask].FlatTo2D<xpu, DType>(s);
+  inline void MKLBackward(const OpContext& ctx,
+                          const std::vector<TBlob>& in_grad,
+                          const std::vector<TBlob>& out_data,
+                          const std::vector<TBlob>& out_grad) {
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
+    Tensor<xpu, 2, DType> grad  = out_grad[dropout::kOut].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> mask  = out_data[dropout::kMask].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> gdata = in_grad[dropout::kData].FlatTo2D<xpu, DType>(s);
-    DType *ingradptr = gdata.dptr_;
-    const DType *outgradptr = grad.dptr_;
-    const DType *maskptr = mask.dptr_;
-    const int count = mask.shape_[0] * mask.shape_[1];
+    DType* ingradptr            = gdata.dptr_;
+    const DType* outgradptr     = grad.dptr_;
+    const DType* maskptr        = mask.dptr_;
+    const int count             = mask.shape_[0] * mask.shape_[1];
 #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
     for (int i = 0; i < count; ++i) {
       ingradptr[i] = outgradptr[i] * maskptr[i];
@@ -209,13 +214,13 @@ class DropoutOp {
                                     RandGenerator<xpu, DType> gen,
                                     const index_t N,
                                     const index_t step,
-                                    DType *dropout_out,
-                                    DType *mask_out,
-                                    const DType *input_data,
+                                    DType* dropout_out,
+                                    DType* mask_out,
+                                    const DType* input_data,
                                     const real_t pkeep) {
       RNG_KERNEL_LOOP(xpu, DType, id, gen, N, step, {
         const real_t rand_num = static_cast<real_t>(genImpl.uniform());
-        mask_out[i] = mshadow_op::threshold_eq::Map<real_t>(rand_num, pkeep) * (1.0f / pkeep);
+        mask_out[i]    = mshadow_op::threshold_eq::Map<real_t>(rand_num, pkeep) * (1.0f / pkeep);
         dropout_out[i] = input_data[i] * mask_out[i];
       });
     }
@@ -226,7 +231,7 @@ class DropoutOp {
                                     RandGenerator<xpu, DType> gen,
                                     const index_t N,
                                     const index_t step,
-                                    DType *mask_out,
+                                    DType* mask_out,
                                     const real_t pkeep) {
       RNG_KERNEL_LOOP(xpu, DType, id, gen, N, step, {
         const real_t rand_num = static_cast<real_t>(genImpl.uniform());
@@ -235,14 +240,14 @@ class DropoutOp {
     }
   };
 
-  explicit DropoutOp(const DropoutParam &param, Context ctx) {
-    this->pkeep_ = 1.0f - param.p;
-    this->mode_ = static_cast<dropout::DropoutOpMode>(param.mode);
-    this->axes_ = param.axes;
+  explicit DropoutOp(const DropoutParam& param, Context ctx) {
+    this->pkeep_               = 1.0f - param.p;
+    this->mode_                = static_cast<dropout::DropoutOpMode>(param.mode);
+    this->axes_                = param.axes;
     this->dropout_passthrough_ = true;
 #if MXNET_USE_CUDNN_DROPOUT
     this->cudnn_off_ = param.cudnn_off && param.cudnn_off.value();
-    this->ctx_ = ctx;
+    this->ctx_       = ctx;
     if (ctx.dev_type == kGPU && this->pkeep_ > 0 && !this->cudnn_off_) {
       dtype_ = mshadow::DataType<DType>::kCudnnFlag;
       CUDNN_CALL(cudnnCreateTensorDescriptor(&x_desc_));
@@ -271,105 +276,89 @@ class DropoutOp {
     return this->pkeep_ > 0 && !this->cudnn_off_;
   }
 
-  inline void CuDNNForward(const OpContext &ctx,
-                           const TBlob &in,
-                           const TBlob &mask,
-                           const TBlob &out) {
-      Stream<xpu> *s = ctx.get_stream<xpu>();
-
-      // set dropout state.
-      ctx.requested[0].get_cudnn_dropout_desc(&dropout_desc_, s, 1.0f - this->pkeep_);
-
-      // describe input/output tensor
-      int dim[4], stride[4];
-      dim[0] = 1;
-      dim[1] = 1;
-      dim[2] = 1;
-      dim[3] = out.Size();
-      stride[0] = out.Size();
-      stride[1] = out.Size();
-      stride[2] = out.Size();
-      stride[3] = 1;
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(x_desc_,
-                                            dtype_,
-                                            4,
-                                            dim,
-                                            stride));
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(y_desc_,
-                                            dtype_,
-                                            4,
-                                            dim,
-                                            stride));
-
-      // perform dropout with cudnn
-      CUDNN_CALL(cudnnDropoutGetReserveSpaceSize(x_desc_, &dropout_reserve_byte_));
-      // cudnn uses bits to record the positions that are dropped, so reserve bytes is always
-      // 1/8 of input size.
-      CHECK_GE(mask.Size() * sizeof(DType), dropout_reserve_byte_) <<
-        "The size of the mask space is smaller than the required cudnn reserved space.";
-      CUDNN_CALL(cudnnDropoutForward(s->dnn_handle_,
-                                     dropout_desc_,
-                                     x_desc_,
-                                     in.dptr<DType>(),
-                                     y_desc_,
-                                     out.dptr<DType>(),
-                                     mask.dptr<DType>(),
-                                     dropout_reserve_byte_));
+  inline void CuDNNForward(const OpContext& ctx,
+                           const TBlob& in,
+                           const TBlob& mask,
+                           const TBlob& out) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+
+    // set dropout state.
+    ctx.requested[0].get_cudnn_dropout_desc(&dropout_desc_, s, 1.0f - this->pkeep_);
+
+    // describe input/output tensor
+    int dim[4], stride[4];
+    dim[0]    = 1;
+    dim[1]    = 1;
+    dim[2]    = 1;
+    dim[3]    = out.Size();
+    stride[0] = out.Size();
+    stride[1] = out.Size();
+    stride[2] = out.Size();
+    stride[3] = 1;
+    CUDNN_CALL(cudnnSetTensorNdDescriptor(x_desc_, dtype_, 4, dim, stride));
+    CUDNN_CALL(cudnnSetTensorNdDescriptor(y_desc_, dtype_, 4, dim, stride));
+
+    // perform dropout with cudnn
+    CUDNN_CALL(cudnnDropoutGetReserveSpaceSize(x_desc_, &dropout_reserve_byte_));
+    // cudnn uses bits to record the positions that are dropped, so reserve bytes is always
+    // 1/8 of input size.
+    CHECK_GE(mask.Size() * sizeof(DType), dropout_reserve_byte_)
+        << "The size of the mask space is smaller than the required cudnn reserved space.";
+    CUDNN_CALL(cudnnDropoutForward(s->dnn_handle_,
+                                   dropout_desc_,
+                                   x_desc_,
+                                   in.dptr<DType>(),
+                                   y_desc_,
+                                   out.dptr<DType>(),
+                                   mask.dptr<DType>(),
+                                   dropout_reserve_byte_));
   }
 
-  inline void CuDNNBackward(const OpContext &ctx,
-                            const TBlob &out_grad,
-                            const TBlob &mask,
-                            const TBlob &in_grad) {
-      Stream<xpu> *s = ctx.get_stream<xpu>();
-
-      // describe input/output tensor
-      int dim[4], stride[4];
-      dim[0] = 1;
-      dim[1] = 1;
-      dim[2] = 1;
-      dim[3] = in_grad.Size();
-      stride[0] = in_grad.Size();
-      stride[1] = in_grad.Size();
-      stride[2] = in_grad.Size();
-      stride[3] = 1;
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dy_desc_,
-                                            dtype_,
-                                            4,
-                                            dim,
-                                            stride));
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dx_desc_,
-                                            dtype_,
-                                            4,
-                                            dim,
-                                            stride));
-
-      // perform dropout with cudnn
-      CUDNN_CALL(cudnnDropoutBackward(s->dnn_handle_,
-                                      dropout_desc_,
-                                      dy_desc_,
-                                      out_grad.dptr<DType>(),
-                                      dx_desc_,
-                                      in_grad.dptr<DType>(),
-                                      mask.dptr<DType>(),
-                                      dropout_reserve_byte_));
+  inline void CuDNNBackward(const OpContext& ctx,
+                            const TBlob& out_grad,
+                            const TBlob& mask,
+                            const TBlob& in_grad) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+
+    // describe input/output tensor
+    int dim[4], stride[4];
+    dim[0]    = 1;
+    dim[1]    = 1;
+    dim[2]    = 1;
+    dim[3]    = in_grad.Size();
+    stride[0] = in_grad.Size();
+    stride[1] = in_grad.Size();
+    stride[2] = in_grad.Size();
+    stride[3] = 1;
+    CUDNN_CALL(cudnnSetTensorNdDescriptor(dy_desc_, dtype_, 4, dim, stride));
+    CUDNN_CALL(cudnnSetTensorNdDescriptor(dx_desc_, dtype_, 4, dim, stride));
+
+    // perform dropout with cudnn
+    CUDNN_CALL(cudnnDropoutBackward(s->dnn_handle_,
+                                    dropout_desc_,
+                                    dy_desc_,
+                                    out_grad.dptr<DType>(),
+                                    dx_desc_,
+                                    in_grad.dptr<DType>(),
+                                    mask.dptr<DType>(),
+                                    dropout_reserve_byte_));
   }
 #endif  // MXNET_USE_CUDNN_DROPOUT && defined(__CUDACC__)
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     this->dropout_passthrough_ = true;
     if (req[dropout::kOut] != kNullOp) {
       CHECK_EQ(in_data.size(), 1U);
       if (ctx.is_train) {
         CHECK_EQ(out_data.size(), 2U);
       }
-      Stream<xpu> *s = ctx.get_stream<xpu>();
-      const TBlob &in = in_data[dropout::kData];
-      const TBlob &out = out_data[dropout::kOut];
-      const TBlob &mask = out_data[dropout::kMask];
+      Stream<xpu>* s    = ctx.get_stream<xpu>();
+      const TBlob& in   = in_data[dropout::kData];
+      const TBlob& out  = out_data[dropout::kOut];
+      const TBlob& mask = out_data[dropout::kMask];
       if (this->pkeep_ < 1 && (ctx.is_train || this->mode_ == dropout::kAlways)) {
         this->dropout_passthrough_ = false;
         if (this->axes_.ndim() == 0) {
@@ -385,70 +374,74 @@ class DropoutOp {
             return;
           }
 #endif  // MXNET_USE_CUDNN_DROPOUT && defined(__CUDACC__)
-          RandGenerator<xpu, DType> *pgen = ctx.requested[0].get_parallel_random<xpu, DType>();
+          RandGenerator<xpu, DType>* pgen = ctx.requested[0].get_parallel_random<xpu, DType>();
           CHECK_NOTNULL(pgen);
           CHECK(req[dropout::kOut] != kAddTo);
-          LaunchRNG<DropoutKernel, xpu>(s, pgen, out.Size(),
+          LaunchRNG<DropoutKernel, xpu>(s,
+                                        pgen,
+                                        out.Size(),
                                         out.dptr<DType>(),
                                         mask.dptr<DType>(),
                                         in.dptr<DType>(),
                                         this->pkeep_);
           return;
         } else {
-          RandGenerator<xpu, DType> *pgen = ctx.requested[0].get_parallel_random<xpu, DType>();
+          RandGenerator<xpu, DType>* pgen = ctx.requested[0].get_parallel_random<xpu, DType>();
           CHECK_NOTNULL(pgen);
           // initialize the mask
-          LaunchRNG<BernoulliKernel, xpu>(s, pgen, mask.Size(),
-                                          mask.dptr<DType>(),
-                                          this->pkeep_);
+          LaunchRNG<BernoulliKernel, xpu>(s, pgen, mask.Size(), mask.dptr<DType>(), this->pkeep_);
           // broadcast mul
           mxnet::TShape new_lshape, new_rshape, new_oshape;
-          int ndim = BinaryBroadcastShapeCompact(in.shape_,
-                                                 mask.shape_, out.shape_,
-                                                 &new_lshape, &new_rshape, &new_oshape);
+          int ndim = BinaryBroadcastShapeCompact(
+              in.shape_, mask.shape_, out.shape_, &new_lshape, &new_rshape, &new_oshape);
           if (!ndim) {
             MXNET_ASSIGN_REQ_SWITCH(req[dropout::kOut], Req, {
               mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::mul, Req>, xpu>::Launch(
-                s, out.Size(), out.dptr<DType>(), in.dptr<DType>(),
-                mask.dptr<DType>());
+                  s, out.Size(), out.dptr<DType>(), in.dptr<DType>(), mask.dptr<DType>());
             });
           } else {
             BROADCAST_NDIM_SWITCH(ndim, NDim, {
-              mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+              mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
               mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
               mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, mshadow_op::mul>, xpu>::
-              template LaunchEx(s, new_oshape.Size(), req[dropout::kOut],
-              lstride, rstride, oshape,
-              in.dptr<DType>(),
-              mask.dptr<DType>(), out.dptr<DType>());
+              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, mshadow_op::mul>,
+                               xpu>::template LaunchEx(s,
+                                                       new_oshape.Size(),
+                                                       req[dropout::kOut],
+                                                       lstride,
+                                                       rstride,
+                                                       oshape,
+                                                       in.dptr<DType>(),
+                                                       mask.dptr<DType>(),
+                                                       out.dptr<DType>());
             });
           }
         }
       } else {
-        if (req[dropout::kOut] == kWriteInplace) return;
+        if (req[dropout::kOut] == kWriteInplace)
+          return;
 
         MXNET_ASSIGN_REQ_SWITCH(req[dropout::kOut], Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
-            s, out.Size(), out.dptr<DType>(), in.dptr<DType>());
+              s, out.Size(), out.dptr<DType>(), in.dptr<DType>());
         });
       }
     }
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &out_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad) {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     if (!this->dropout_passthrough_) {
       this->dropout_passthrough_ = true;
-      const TBlob &gdata = in_grad[dropout::kData];
-      const TBlob &grad = out_grad[dropout::kOut];
-      const TBlob &mask = out_data[dropout::kMask];
+      const TBlob& gdata         = in_grad[dropout::kData];
+      const TBlob& grad          = out_grad[dropout::kOut];
+      const TBlob& mask          = out_data[dropout::kMask];
       if (this->axes_.ndim() == 0) {
 #if MXNET_USE_MKL_DROPOUT
         if (MKLAvailable()) {
@@ -466,37 +459,43 @@ class DropoutOp {
         CHECK_EQ(grad.Size(), mask.Size());
         MXNET_ASSIGN_REQ_SWITCH(req[dropout::kData], Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::mul, Req>, xpu>::Launch(
-            s, gdata.Size(), gdata.dptr<DType>(), grad.dptr<DType>(), mask.dptr<DType>());
+              s, gdata.Size(), gdata.dptr<DType>(), grad.dptr<DType>(), mask.dptr<DType>());
         });
         return;
       } else {
         // broardcast mul
         mxnet::TShape new_lshape, new_rshape, new_oshape;
-        int ndim = BinaryBroadcastShapeCompact(grad.shape_,
-                                               mask.shape_, gdata.shape_,
-                                               &new_lshape, &new_rshape, &new_oshape);
+        int ndim = BinaryBroadcastShapeCompact(
+            grad.shape_, mask.shape_, gdata.shape_, &new_lshape, &new_rshape, &new_oshape);
         if (!ndim) {
           MXNET_ASSIGN_REQ_SWITCH(req[dropout::kData], Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::mul, Req>, xpu>::Launch(
-              s, gdata.Size(), gdata.dptr<DType>(), grad.dptr<DType>(), mask.dptr<DType>());
+                s, gdata.Size(), gdata.dptr<DType>(), grad.dptr<DType>(), mask.dptr<DType>());
           });
         } else {
           BROADCAST_NDIM_SWITCH(ndim, NDim, {
-            mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+            mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
             mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
             mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-            mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, mshadow_op::mul>, xpu>::
-            template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-            grad.dptr<DType>(), mask.dptr<DType>(), gdata.dptr<DType>());
+            mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, mshadow_op::mul>,
+                             xpu>::template LaunchEx(s,
+                                                     new_oshape.Size(),
+                                                     req[0],
+                                                     lstride,
+                                                     rstride,
+                                                     oshape,
+                                                     grad.dptr<DType>(),
+                                                     mask.dptr<DType>(),
+                                                     gdata.dptr<DType>());
           });
         }
       }
     } else {
       const TBlob& gdata = in_grad[dropout::kData];
-      const TBlob& grad = out_grad[dropout::kOut];
+      const TBlob& grad  = out_grad[dropout::kOut];
       MXNET_ASSIGN_REQ_SWITCH(req[dropout::kData], Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
-          s, gdata.Size(), gdata.dptr<DType>(), grad.dptr<DType>());
+            s, gdata.Size(), gdata.dptr<DType>(), grad.dptr<DType>());
       });
     }
   }
@@ -518,9 +517,9 @@ class DropoutOp {
   size_t dropout_reserve_byte_;
   cudnnTensorDescriptor_t x_desc_, y_desc_, dx_desc_, dy_desc_;
 #endif  // MXNET_USE_CUDNN_DROPOUT
-};  // class DropoutOp
+};      // class DropoutOp
 
-template<typename xpu>
+template <typename xpu>
 void DropoutCompute(const OpStatePtr& state,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -532,7 +531,7 @@ void DropoutCompute(const OpStatePtr& state,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void DropoutGradCompute(const OpStatePtr& state,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
diff --git a/src/operator/nn/dropout.cc b/src/operator/nn/dropout.cc
index 163e8c0b53c6..500c9b2098fe 100644
--- a/src/operator/nn/dropout.cc
+++ b/src/operator/nn/dropout.cc
@@ -22,7 +22,7 @@
  * \file dropout.cc
  * \brief
  * \author Bing Xu, Da Zheng, Hang Zhang
-*/
+ */
 
 #include "./dropout-inl.h"
 #include "../operator_common.h"
@@ -31,10 +31,10 @@
 namespace mxnet {
 namespace op {
 
-OpStatePtr CreateDropoutState(const nnvm::NodeAttrs &attrs,
-                                     const Context ctx,
-                                     const mxnet::ShapeVector &in_shapes,
-                                     const std::vector<int> &in_types) {
+OpStatePtr CreateDropoutState(const nnvm::NodeAttrs& attrs,
+                              const Context ctx,
+                              const mxnet::ShapeVector& in_shapes,
+                              const std::vector<int>& in_types) {
   const auto& param = nnvm::get<DropoutParam>(attrs.parsed);
   OpStatePtr state;
   MSHADOW_REAL_TYPE_SWITCH(in_types[dropout::kData], DType, {
@@ -50,7 +50,7 @@ OpStatePtr CreateDropoutState(const nnvm::NodeAttrs &attrs,
 }
 
 struct DropoutGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads;
@@ -63,8 +63,8 @@ struct DropoutGrad {
 DMLC_REGISTER_PARAMETER(DropoutParam);
 
 NNVM_REGISTER_OP(Dropout)
-.add_alias("_npx_dropout")
-.describe(R"(Applies dropout operation to input array.
+    .add_alias("_npx_dropout")
+    .describe(R"(Applies dropout operation to input array.
 
 - During training, each element of the input is set to zero with probability p.
   The whole array is rescaled by :math:`1/(1-p)` to keep the expected
@@ -94,93 +94,101 @@ Example::
   [[ 3.     0.5   -0.5    2.     7.   ]
    [ 2.    -0.4    7.     3.     0.2  ]]
 )" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<DropoutParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "mask"};
-})
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  return 1;
-})
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-      mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape){
-  using namespace mshadow;
-  CHECK_EQ(in_shape->size(), 1U);
-  const DropoutParam& param = nnvm::get<DropoutParam>(attrs.parsed);
-  mxnet::TShape dshape(in_shape->at(0));
-  if (!mxnet::ndim_is_known(dshape)) return false;
-  out_shape->clear();
-  out_shape->push_back(dshape);
-  for (int i = 0; i < param.axes.ndim(); ++i) {
-    dshape[param.axes[i]] = 1;
-  }
-  out_shape->push_back(dshape);
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-      std::vector<int> *in_type, std::vector<int> *out_type) {
-  CHECK_EQ(in_type->size(), 1U);
-  int dtype = in_type->at(0);
-
-  if (dtype == -1) {
-    LOG(FATAL) << "input type to dropout is not specified.";
-    return false;
-  }
-
-  size_t nout = 2;
-  out_type->clear();
-  for (size_t i = 0; i < nout; ++i) out_type->push_back(dtype);
-  return true;
-})
-.set_attr<FCreateOpState>("FCreateOpState", CreateDropoutState)
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", DropoutCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", DropoutGrad{"_backward_Dropout"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FResourceRequestEx>("FResourceRequestEx",
-  [](const NodeAttrs& attrs, const int dev_mask, const DispatchMode dispatch_mode) {
-    std::vector<ResourceRequest> request;
-    const DropoutParam& param = nnvm::get<DropoutParam>(attrs.parsed);
-    if (param.p == 0) return request;
-    if (dev_mask == kGPU) {
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<DropoutParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output", "mask"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_shape,
+                                     mxnet::ShapeVector* out_shape) {
+                                    using namespace mshadow;
+                                    CHECK_EQ(in_shape->size(), 1U);
+                                    const DropoutParam& param =
+                                        nnvm::get<DropoutParam>(attrs.parsed);
+                                    mxnet::TShape dshape(in_shape->at(0));
+                                    if (!mxnet::ndim_is_known(dshape))
+                                      return false;
+                                    out_shape->clear();
+                                    out_shape->push_back(dshape);
+                                    for (int i = 0; i < param.axes.ndim(); ++i) {
+                                      dshape[param.axes[i]] = 1;
+                                    }
+                                    out_shape->push_back(dshape);
+                                    return true;
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_type,
+                                   std::vector<int>* out_type) {
+                                  CHECK_EQ(in_type->size(), 1U);
+                                  int dtype = in_type->at(0);
+
+                                  if (dtype == -1) {
+                                    LOG(FATAL) << "input type to dropout is not specified.";
+                                    return false;
+                                  }
+
+                                  size_t nout = 2;
+                                  out_type->clear();
+                                  for (size_t i = 0; i < nout; ++i)
+                                    out_type->push_back(dtype);
+                                  return true;
+                                })
+    .set_attr<FCreateOpState>("FCreateOpState", CreateDropoutState)
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", DropoutCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", DropoutGrad{"_backward_Dropout"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequestEx>(
+        "FResourceRequestEx",
+        [](const NodeAttrs& attrs, const int dev_mask, const DispatchMode dispatch_mode) {
+          std::vector<ResourceRequest> request;
+          const DropoutParam& param = nnvm::get<DropoutParam>(attrs.parsed);
+          if (param.p == 0)
+            return request;
+          if (dev_mask == kGPU) {
 #if MXNET_USE_CUDNN_DROPOUT
-      // if cudnn is used, parallel random is not needed.
-      if (1.0f - param.p > 0
-          && !(param.cudnn_off && param.cudnn_off.value())
-          && param.axes.ndim() == 0) {
-        request.emplace_back(ResourceRequest::kCuDNNDropoutDesc);
-        return request;
-      }
+            // if cudnn is used, parallel random is not needed.
+            if (1.0f - param.p > 0 && !(param.cudnn_off && param.cudnn_off.value()) &&
+                param.axes.ndim() == 0) {
+              request.emplace_back(ResourceRequest::kCuDNNDropoutDesc);
+              return request;
+            }
 #endif
-    }
-    request.emplace_back(ResourceRequest::kParallelRandom);
+          }
+          request.emplace_back(ResourceRequest::kParallelRandom);
 #if MXNET_USE_MKL_DROPOUT
-    request.emplace_back(ResourceRequest::kTempSpace);
+          request.emplace_back(ResourceRequest::kTempSpace);
 #endif
-    return request;
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input array to which dropout will be applied.")
-.add_arguments(DropoutParam::__FIELDS__());
+          return request;
+        })
+    .add_argument("data", "NDArray-or-Symbol", "Input array to which dropout will be applied.")
+    .add_arguments(DropoutParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Dropout)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<DropoutParam>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", DropoutGradCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<DropoutParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", DropoutGradCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/dropout.cu b/src/operator/nn/dropout.cu
index 20c5714dd904..e01bde0bd1ac 100644
--- a/src/operator/nn/dropout.cu
+++ b/src/operator/nn/dropout.cu
@@ -22,20 +22,17 @@
  * \file dropout.cc
  * \brief
  * \author Bing Xu, Da Zheng, Hang Zhang
-*/
+ */
 
 #include "./dropout-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(Dropout)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", DropoutCompute<gpu>);
+NNVM_REGISTER_OP(Dropout).set_attr<FStatefulCompute>("FStatefulCompute<gpu>", DropoutCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_Dropout)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", DropoutGradCompute<gpu>);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", DropoutGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
-
diff --git a/src/operator/nn/fully_connected-inl.h b/src/operator/nn/fully_connected-inl.h
index 51d6f5c8d46d..68075af421ae 100644
--- a/src/operator/nn/fully_connected-inl.h
+++ b/src/operator/nn/fully_connected-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file fully_connect_op-inl.h
  * \brief fully connect operator and symbol
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_FULLY_CONNECTED_INL_H_
 #define MXNET_OPERATOR_NN_FULLY_CONNECTED_INL_H_
 
@@ -46,20 +46,27 @@ namespace op {
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace fullc {
-enum FullyConnectedOpInputs {kData, kWeight, kBias};
-enum FullyConnectedOpResource {kTempSpace};
-enum FullyConnectedOpOutputs {kOut};
+enum FullyConnectedOpInputs { kData, kWeight, kBias };
+enum FullyConnectedOpResource { kTempSpace };
+enum FullyConnectedOpOutputs { kOut };
 enum FullyConnectedGradGradOutputs { kOyGrad, kXGradGrad, kWGradGrad, kBGradGrad };
-enum GradGradInputs { kOxGrad, kOwGrad, };
-enum GradGradInputsBias { kObGrad = 2, kOyBias, };
-enum GradGradInputsNoBias { kOy = 2, };
+enum GradGradInputs {
+  kOxGrad,
+  kOwGrad,
+};
+enum GradGradInputsBias {
+  kObGrad = 2,
+  kOyBias,
+};
+enum GradGradInputsNoBias {
+  kOy = 2,
+};
 }  // namespace fullc
 
 namespace quantized_fullc {
-enum QuantizedFCInputMinMax {kDataMin, kDataMax, kWeightMin, kWeightMax, kBiasMin, kBiasMax};
-enum QuantizedFCOutputs {kOut, kOutMin, kOutMax};
-}  // quantized_fullc
-
+enum QuantizedFCInputMinMax { kDataMin, kDataMax, kWeightMin, kWeightMax, kBiasMin, kBiasMax };
+enum QuantizedFCOutputs { kOut, kOutMin, kOutMax };
+}  // namespace quantized_fullc
 
 struct FullyConnectedParam : public dmlc::Parameter<FullyConnectedParam> {
   int num_hidden;
@@ -68,16 +75,15 @@ struct FullyConnectedParam : public dmlc::Parameter<FullyConnectedParam> {
 
   DMLC_DECLARE_PARAMETER(FullyConnectedParam) {
     // TODO(bing) add support for boolean
-    DMLC_DECLARE_FIELD(num_hidden).set_lower_bound(1)
-    .describe("Number of hidden nodes of the output.");
-    DMLC_DECLARE_FIELD(no_bias).set_default(false)
-    .describe("Whether to disable bias parameter.");
-    DMLC_DECLARE_FIELD(flatten).set_default(true)
-    .describe("Whether to collapse all but the first axis of the input data tensor.");
+    DMLC_DECLARE_FIELD(num_hidden)
+        .set_lower_bound(1)
+        .describe("Number of hidden nodes of the output.");
+    DMLC_DECLARE_FIELD(no_bias).set_default(false).describe("Whether to disable bias parameter.");
+    DMLC_DECLARE_FIELD(flatten).set_default(true).describe(
+        "Whether to collapse all but the first axis of the input data tensor.");
   }
   bool operator==(const FullyConnectedParam& other) const {
-    return this->num_hidden == other.num_hidden &&
-           this->no_bias == other.no_bias &&
+    return this->num_hidden == other.num_hidden && this->no_bias == other.no_bias &&
            this->flatten == other.flatten;
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -86,8 +92,8 @@ struct FullyConnectedParam : public dmlc::Parameter<FullyConnectedParam> {
     no_bias_s << no_bias;
     flatten_s << flatten;
     (*dict)["num_hidden"] = num_hidden_s.str();
-    (*dict)["no_bias"] = no_bias_s.str();
-    (*dict)["flatten"] = flatten_s.str();
+    (*dict)["no_bias"]    = no_bias_s.str();
+    (*dict)["flatten"]    = flatten_s.str();
   }
 };
 
@@ -99,12 +105,12 @@ struct FullyConnectedParam : public dmlc::Parameter<FullyConnectedParam> {
  * @param ctx
  * @return 2 Dimensional Tensor with upper shapes collapsed
  */
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 Tensor<xpu, 2, DType> FlattenAs2DTail(const TBlob& tblob, const OpContext& ctx) {
   const TShape& shape = tblob.shape_;
-  Stream<xpu> *stream = ctx.get_stream<xpu>();
-  return tblob.get_with_shape<xpu, 2, DType>(
-      Shape2(shape[0], shape.ProdShape(1, shape.ndim())), stream);
+  Stream<xpu>* stream = ctx.get_stream<xpu>();
+  return tblob.get_with_shape<xpu, 2, DType>(Shape2(shape[0], shape.ProdShape(1, shape.ndim())),
+                                             stream);
 }
 
 /**
@@ -115,17 +121,19 @@ Tensor<xpu, 2, DType> FlattenAs2DTail(const TBlob& tblob, const OpContext& ctx)
  * @param ctx
  * @return 2 Dimensional tensor with front shapes collapsed
  */
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 Tensor<xpu, 2, DType> FlattenAs2DHead(const TBlob& tblob, const OpContext& ctx) {
   const TShape& shape = tblob.shape_;
-  Stream<xpu> *stream = ctx.get_stream<xpu>();
+  Stream<xpu>* stream = ctx.get_stream<xpu>();
   return tblob.get_with_shape<xpu, 2, DType>(
-      Shape2(shape.ProdShape(0, shape.ndim()-1), shape[shape.ndim()-1]), stream);
+      Shape2(shape.ProdShape(0, shape.ndim() - 1), shape[shape.ndim() - 1]), stream);
 }
 
-template<typename DType>
-void AddBias(Tensor<cpu, 1, DType> bias, Tensor<cpu, 2, DType> data,
-             Tensor<cpu, 2, DType> out, Stream<cpu>*) {
+template <typename DType>
+void AddBias(Tensor<cpu, 1, DType> bias,
+             Tensor<cpu, 2, DType> data,
+             Tensor<cpu, 2, DType> out,
+             Stream<cpu>*) {
   using namespace mshadow;
   using namespace mshadow::expr;
   out += repmat(bias, data.size(0));
@@ -134,85 +142,86 @@ void AddBias(Tensor<cpu, 1, DType> bias, Tensor<cpu, 2, DType> data,
 #if defined(__CUDACC__)
 
 namespace {
-  constexpr int nthreads_addbias = 256;
-  constexpr int nthreads_addbiasgrad_phase1 = 512;
-  constexpr int nthreads_addbiasgrad_phase2 = 128;
-  constexpr int threads_per_warp = 32;
+constexpr int nthreads_addbias            = 256;
+constexpr int nthreads_addbiasgrad_phase1 = 512;
+constexpr int nthreads_addbiasgrad_phase2 = 128;
+constexpr int threads_per_warp            = 32;
 
-  inline int ceil_div(int x, int y) {
-    return (x + y - 1) / y;
-  }
+inline int ceil_div(int x, int y) {
+  return (x + y - 1) / y;
+}
 
-  inline int FindNumRowsPerBlock(size_t bias_length, size_t lead_dim) {
-    int ret = 1;
-    while (bias_length < nthreads_addbias &&
-           lead_dim % 2 == 0) {
-      bias_length *= 2;
-      ret *= 2;
-      lead_dim /= 2;
-    }
-    return ret;
+inline int FindNumRowsPerBlock(size_t bias_length, size_t lead_dim) {
+  int ret = 1;
+  while (bias_length < nthreads_addbias && lead_dim % 2 == 0) {
+    bias_length *= 2;
+    ret *= 2;
+    lead_dim /= 2;
   }
+  return ret;
+}
 }  // namespace
 
 template <typename DType, typename LType>
-__global__ void add_bias_kernel(DType* const mat, const DType* const bias,
-                                const size_t lead_dim, const size_t bias_length,
+__global__ void add_bias_kernel(DType* const mat,
+                                const DType* const bias,
+                                const size_t lead_dim,
+                                const size_t bias_length,
                                 const int rows) {
   __shared__ LType scratch[nthreads_addbias * 2];
-  const int threads_per_row = nthreads_addbias / rows;
-  const int threadId_in_row = threadIdx.x & (threads_per_row - 1);
-  const int row_id = threadIdx.x * rows / nthreads_addbias;
-  const index_t N = bias_length * sizeof(DType)/sizeof(LType);
-  const index_t base = (blockIdx.x * rows + row_id) * N;
-  LType* const mat_aligned = reinterpret_cast<LType*>(mat) + base;
+  const int threads_per_row       = nthreads_addbias / rows;
+  const int threadId_in_row       = threadIdx.x & (threads_per_row - 1);
+  const int row_id                = threadIdx.x * rows / nthreads_addbias;
+  const index_t N                 = bias_length * sizeof(DType) / sizeof(LType);
+  const index_t base              = (blockIdx.x * rows + row_id) * N;
+  LType* const mat_aligned        = reinterpret_cast<LType*>(mat) + base;
   const LType* const bias_aligned = reinterpret_cast<const LType*>(bias);
-  LType* const scratch_bias_load = scratch + threadIdx.x;
-  DType* const scratch_bias = reinterpret_cast<DType*>(scratch_bias_load);
-  LType* const scratch_mat_load = scratch_bias_load + nthreads_addbias;
-  DType* const scratch_mat = reinterpret_cast<DType*>(scratch_mat_load);
+  LType* const scratch_bias_load  = scratch + threadIdx.x;
+  DType* const scratch_bias       = reinterpret_cast<DType*>(scratch_bias_load);
+  LType* const scratch_mat_load   = scratch_bias_load + nthreads_addbias;
+  DType* const scratch_mat        = reinterpret_cast<DType*>(scratch_mat_load);
   for (index_t i = threadId_in_row; i < N; i += threads_per_row) {
     *scratch_bias_load = bias_aligned[i];
-    *scratch_mat_load = mat_aligned[i];
+    *scratch_mat_load  = mat_aligned[i];
 #pragma unroll
-    for (int j = 0; j < sizeof(LType)/sizeof(DType); ++j) {
+    for (int j = 0; j < sizeof(LType) / sizeof(DType); ++j) {
       scratch_mat[j] += scratch_bias[j];
     }
     mat_aligned[i] = *scratch_mat_load;
   }
 }
 
-template<typename DType>
-void AddBias(Tensor<gpu, 1, DType> bias, Tensor<gpu, 2, DType> data,
-             Tensor<gpu, 2, DType> out, Stream<gpu>* s) {
-    int ltype = mxnet::common::cuda::get_load_type(bias.shape_[0] * sizeof(DType));
-    MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
-      int rows = FindNumRowsPerBlock(bias.shape_[0] * sizeof(DType) / sizeof(LType), data.size(0));
-      add_bias_kernel<DType, LType><<<data.size(0) / rows,
-                                      nthreads_addbias,
-                                      0,
-                                      Stream<gpu>::GetStream(s)>>>(out.dptr_,
-                                                                   bias.dptr_,
-                                                                   data.size(0),
-                                                                   bias.shape_[0],
-                                                                   rows);
-    });
+template <typename DType>
+void AddBias(Tensor<gpu, 1, DType> bias,
+             Tensor<gpu, 2, DType> data,
+             Tensor<gpu, 2, DType> out,
+             Stream<gpu>* s) {
+  int ltype = mxnet::common::cuda::get_load_type(bias.shape_[0] * sizeof(DType));
+  MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
+    int rows = FindNumRowsPerBlock(bias.shape_[0] * sizeof(DType) / sizeof(LType), data.size(0));
+    add_bias_kernel<DType, LType>
+        <<<data.size(0) / rows, nthreads_addbias, 0, Stream<gpu>::GetStream(s)>>>(
+            out.dptr_, bias.dptr_, data.size(0), bias.shape_[0], rows);
+  });
 }
 
 #endif  // __CUDACC__
 
-template<typename xpu, typename DType>
-void FCForward(const OpContext &ctx, const FullyConnectedParam &param,
-               const std::vector<TBlob> &in_data, const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+template <typename xpu, typename DType>
+void FCForward(const OpContext& ctx,
+               const FullyConnectedParam& param,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  if (req[fullc::kOut] == kNullOp) return;
+  if (req[fullc::kOut] == kNullOp)
+    return;
   CHECK_EQ(req[fullc::kOut], kWriteTo);
   // TODO(bing): check the BLAS Handle, be careful
   // maybe need blas handle from context
   // TODO(bing): judge shape to remove flatten op
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 #if defined(__CUDACC__)
   CHECK_EQ(s->blas_handle_ownership_, Stream<xpu>::OwnHandle)
       << "Must init CuBLAS handle in stream";
@@ -221,53 +230,55 @@ void FCForward(const OpContext &ctx, const FullyConnectedParam &param,
   Tensor<xpu, 2, DType> data, out;
   if (!param.flatten) {
     data = FlattenAs2DHead<xpu, DType>(in_data[fullc::kData], ctx);
-    out = FlattenAs2DHead<xpu, DType>(out_data[fullc::kOut], ctx);
+    out  = FlattenAs2DHead<xpu, DType>(out_data[fullc::kOut], ctx);
   } else {
     data = FlattenAs2DTail<xpu, DType>(in_data[fullc::kData], ctx);
-    out = FlattenAs2DTail<xpu, DType>(out_data[fullc::kOut], ctx);
+    out  = FlattenAs2DTail<xpu, DType>(out_data[fullc::kOut], ctx);
   }
 
   CHECK_EQ(data.shape_[1], wmat.shape_[1])
-    << "Incomplete weight tensor detected: weight.data().shape[1] != prod(data.data().shape[1:])."
-       " This is not supported by FCForward. If weight is in row_sparse format,"
-       " please make sure all row ids are present.";
+      << "Incomplete weight tensor detected: weight.data().shape[1] != prod(data.data().shape[1:])."
+         " This is not supported by FCForward. If weight is in row_sparse format,"
+         " please make sure all row ids are present.";
   // Legacy approach shown here for comparison:
   //   out = dot(data, wmat.T());
   linalg_gemm(data, wmat, out, false, true, s);
   if (!param.no_bias) {
-    Tensor<xpu, 1, DType> bias = in_data[fullc::kBias].get_with_shape<xpu, 1, DType>(
-      Shape1(wmat.shape_[0]), s);
+    Tensor<xpu, 1, DType> bias =
+        in_data[fullc::kBias].get_with_shape<xpu, 1, DType>(Shape1(wmat.shape_[0]), s);
     CHECK_EQ(bias.shape_[0], wmat.shape_[0])
-      << "Incomplete bias tensor detected: bias.data().shape[1] != weight.data().shape[0]."
-         " This is not supported by FCForward. If bias is in row_sparse format, please"
-         " make sure all row ids are present.";
+        << "Incomplete bias tensor detected: bias.data().shape[1] != weight.data().shape[0]."
+           " This is not supported by FCForward. If bias is in row_sparse format, please"
+           " make sure all row ids are present.";
     AddBias(bias, data, out, s);
   }
 }
 
-#if defined (__CUDACC__)
+#if defined(__CUDACC__)
 
-template<typename LType, typename DType, typename AType>
-__global__ void AddBiasGradKernelPhase1(AType * temp_space, const DType* grad,
-                                        const size_t lead_dim, const size_t other_dim) {
-  constexpr int num_warps = nthreads_addbiasgrad_phase1 / threads_per_warp;
+template <typename LType, typename DType, typename AType>
+__global__ void AddBiasGradKernelPhase1(AType* temp_space,
+                                        const DType* grad,
+                                        const size_t lead_dim,
+                                        const size_t other_dim) {
+  constexpr int num_warps   = nthreads_addbiasgrad_phase1 / threads_per_warp;
   const int values_per_read = sizeof(LType) >= sizeof(DType) ? sizeof(LType) / sizeof(DType) : 1;
-  const size_t stride = lead_dim / values_per_read;
-  __shared__ AType scratch[threads_per_warp * num_warps  * values_per_read];
-  LType * my_scratch_load = &(reinterpret_cast<LType *>(scratch)[threadIdx.x]);
-  DType * my_values_load = reinterpret_cast<DType *>(my_scratch_load);
-  AType * my_values_acc = &(scratch[threadIdx.x * values_per_read]);
+  const size_t stride       = lead_dim / values_per_read;
+  __shared__ AType scratch[threads_per_warp * num_warps * values_per_read];
+  LType* my_scratch_load = &(reinterpret_cast<LType*>(scratch)[threadIdx.x]);
+  DType* my_values_load  = reinterpret_cast<DType*>(my_scratch_load);
+  AType* my_values_acc   = &(scratch[threadIdx.x * values_per_read]);
   AType acc[values_per_read];  // NOLINT(*)
 #pragma unroll
   for (int i = 0; i < values_per_read; ++i) {
     acc[i] = 0;
   }
-  const size_t offset = blockIdx.x * threads_per_warp;
-  const int my_warp = threadIdx.x / threads_per_warp;
-  const int my_id = threadIdx.x % threads_per_warp;
+  const size_t offset       = blockIdx.x * threads_per_warp;
+  const int my_warp         = threadIdx.x / threads_per_warp;
+  const int my_id           = threadIdx.x % threads_per_warp;
   const LType* aligned_grad = reinterpret_cast<const LType*>(grad);
-  const int rows_per_block = (other_dim + gridDim.y - 1) / gridDim.y;
-  const size_t start_row = my_warp + rows_per_block * blockIdx.y;
+  const int rows_per_block  = (other_dim + gridDim.y - 1) / gridDim.y;
+  const size_t start_row    = my_warp + rows_per_block * blockIdx.y;
   const size_t end_row = min(other_dim, static_cast<size_t>(rows_per_block * (blockIdx.y + 1)));
   if (offset + my_id < stride) {
     for (size_t i = start_row; i < end_row; i += num_warps) {
@@ -299,15 +310,17 @@ __global__ void AddBiasGradKernelPhase1(AType * temp_space, const DType* grad,
 
   if (threadIdx.x < min(threads_per_warp * values_per_read,
                         static_cast<int>(lead_dim - values_per_read * offset))) {
-    const size_t offset_out = values_per_read * offset +
-                              blockIdx.y * lead_dim;
+    const size_t offset_out              = values_per_read * offset + blockIdx.y * lead_dim;
     temp_space[offset_out + threadIdx.x] = scratch[threadIdx.x];
   }
 }
 
 template <typename DType, typename AType>
-__global__ void AddBiasGradKernelPhase2(const AType * temp_space, DType * out,
-                                        int lead_dim, int n_blocks, OpReqType req) {
+__global__ void AddBiasGradKernelPhase2(const AType* temp_space,
+                                        DType* out,
+                                        int lead_dim,
+                                        int n_blocks,
+                                        OpReqType req) {
   int tid = threadIdx.x + blockIdx.x * blockDim.x;
   if (tid < lead_dim) {
     AType acc = 0;
@@ -318,18 +331,19 @@ __global__ void AddBiasGradKernelPhase2(const AType * temp_space, DType * out,
   }
 }
 
-template<typename DType>
+template <typename DType>
 void AddBiasGrad(const TBlob& in_grad,
                  Tensor<gpu, 2, DType> grad,
                  OpReqType req,
                  int num_hidden,
                  const OpContext& ctx) {
-  if (req == kNullOp) return;
-  using AType = typename mxnet_op::AccType<DType>::type;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  if (req == kNullOp)
+    return;
+  using AType                 = typename mxnet_op::AccType<DType>::type;
+  mshadow::Stream<gpu>* s     = ctx.get_stream<gpu>();
   Tensor<gpu, 1, DType> gbias = in_grad.get<gpu, 1, DType>(s);
-  TBlob grad_blob = TBlob(grad);
-  TBlob gbias_blob = TBlob(gbias);
+  TBlob grad_blob             = TBlob(grad);
+  TBlob gbias_blob            = TBlob(gbias);
   mxnet::TShape x(1, 0);
   mxnet::TShape small;
   if (shape_assign(&gbias_blob.shape_, Shape2(num_hidden, 1))) {
@@ -338,44 +352,35 @@ void AddBiasGrad(const TBlob& in_grad,
     small = ReduceAxesShapeImpl(grad_blob.shape_, dmlc::optional<mxnet::TShape>(x), true, false);
   }
   const int N = small.Size();
-  int ltype = mxnet::common::cuda::get_load_type(N * sizeof(DType));
+  int ltype   = mxnet::common::cuda::get_load_type(N * sizeof(DType));
   const int M = grad_blob.shape_.Size() / N;
   MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
-    const unsigned int blocks_x = ceil_div(N * sizeof(DType),
-                                           threads_per_warp * sizeof(LType));
-    const unsigned int preferred_number_of_blocks = 2 *
-                                                    MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
+    const unsigned int blocks_x = ceil_div(N * sizeof(DType), threads_per_warp * sizeof(LType));
+    const unsigned int preferred_number_of_blocks = 2 * MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
     const unsigned int blocks_y = std::max(preferred_number_of_blocks / blocks_x, 1u);
-    const dim3 n_blocks = {blocks_x, blocks_y, 1};
-    auto scratch_space = ctx.requested[fullc::kTempSpace]
-                            .get_space_typed<gpu, 1, AType>(mshadow::Shape1(N * blocks_y), s);
+    const dim3 n_blocks         = {blocks_x, blocks_y, 1};
+    auto scratch_space          = ctx.requested[fullc::kTempSpace].get_space_typed<gpu, 1, AType>(
+        mshadow::Shape1(N * blocks_y), s);
     auto stream = mshadow::Stream<gpu>::GetStream(s);
-    AddBiasGradKernelPhase1<LType><<<n_blocks,
-                                     nthreads_addbiasgrad_phase1,
-                                     0,
-                                     stream>>>(scratch_space.dptr_,
-                                               grad.dptr_, N, M);
+    AddBiasGradKernelPhase1<LType><<<n_blocks, nthreads_addbiasgrad_phase1, 0, stream>>>(
+        scratch_space.dptr_, grad.dptr_, N, M);
     const int nblocks_phase2 = ceil_div(N, nthreads_addbiasgrad_phase2);
-    AddBiasGradKernelPhase2<<<nblocks_phase2,
-                              nthreads_addbiasgrad_phase2,
-                              0,
-                              stream>>>(scratch_space.dptr_,
-                                        gbias.dptr_, N,
-                                        blocks_y, req);
+    AddBiasGradKernelPhase2<<<nblocks_phase2, nthreads_addbiasgrad_phase2, 0, stream>>>(
+        scratch_space.dptr_, gbias.dptr_, N, blocks_y, req);
   });
 }
 #endif
 
-template<typename DType>
+template <typename DType>
 void AddBiasGrad(const TBlob& in_grad,
                  Tensor<cpu, 2, DType> grad,
                  OpReqType req,
                  int num_hidden,
                  const OpContext& ctx) {
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s     = ctx.get_stream<cpu>();
   Tensor<cpu, 1, DType> gbias = in_grad.get<cpu, 1, DType>(s);
-  TBlob grad_blob = TBlob(grad);
-  TBlob gbias_blob = TBlob(gbias);
+  TBlob grad_blob             = TBlob(grad);
+  TBlob gbias_blob            = TBlob(gbias);
   mxnet::TShape x(1, 0);
   mxnet::TShape small;
   if (shape_assign(&gbias_blob.shape_, Shape2(num_hidden, 1))) {
@@ -383,28 +388,30 @@ void AddBiasGrad(const TBlob& in_grad,
   } else {
     small = ReduceAxesShapeImpl(grad_blob.shape_, dmlc::optional<mxnet::TShape>(x), true, false);
   }
-  ReduceAxesComputeImpl<cpu, mshadow::red::sum, false, false,
-                        mshadow_op::identity>(ctx, {grad_blob}, {req},
-                                              {in_grad}, small);
+  ReduceAxesComputeImpl<cpu, mshadow::red::sum, false, false, mshadow_op::identity>(
+      ctx, {grad_blob}, {req}, {in_grad}, small);
 }
 
-template<typename xpu, typename DType>
-void FCBackward(const OpContext &ctx, const FullyConnectedParam &param,
-                const std::vector<TBlob> &out_grad, const std::vector<TBlob> &in_data,
-                const std::vector<OpReqType> &req, const std::vector<TBlob> &in_grad) {
+template <typename xpu, typename DType>
+void FCBackward(const OpContext& ctx,
+                const FullyConnectedParam& param,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
   using namespace mshadow;
   using namespace mshadow::expr;
   // TODO(bing): check the BLAS Handle, be careful
   //  maybe need blas handle from context
-  Stream<xpu> *stream = ctx.get_stream<xpu>();
+  Stream<xpu>* stream        = ctx.get_stream<xpu>();
   Tensor<xpu, 2, DType> wmat = in_data[fullc::kWeight].get<xpu, 2, DType>(stream);
   Tensor<xpu, 2, DType> x, y_grad, x_grad;
   if (!param.flatten) {
-    x = FlattenAs2DHead<xpu, DType>(in_data[fullc::kData], ctx);
+    x      = FlattenAs2DHead<xpu, DType>(in_data[fullc::kData], ctx);
     y_grad = FlattenAs2DHead<xpu, DType>(out_grad[fullc::kOut], ctx);
     x_grad = FlattenAs2DHead<xpu, DType>(in_grad[fullc::kData], ctx);
   } else {
-    x = FlattenAs2DTail<xpu, DType>(in_data[fullc::kData], ctx);
+    x      = FlattenAs2DTail<xpu, DType>(in_data[fullc::kData], ctx);
     y_grad = FlattenAs2DTail<xpu, DType>(out_grad[fullc::kOut], ctx);
     x_grad = FlattenAs2DTail<xpu, DType>(in_grad[fullc::kData], ctx);
   }
@@ -422,7 +429,7 @@ void FCBackward(const OpContext &ctx, const FullyConnectedParam &param,
   linalg_gemm(y_grad, x, w_grad, true, false, stream, req[fullc::kWeight]);
   // gradient of bias
   if (!param.no_bias) {
-      AddBiasGrad(in_grad[fullc::kBias], y_grad, req[fullc::kBias], param.num_hidden, ctx);
+    AddBiasGrad(in_grad[fullc::kBias], y_grad, req[fullc::kBias], param.num_hidden, ctx);
   }
   // gradient of data
   // Legacy approach shown here for comparison:
@@ -430,42 +437,42 @@ void FCBackward(const OpContext &ctx, const FullyConnectedParam &param,
   linalg_gemm(y_grad, wmat, x_grad, false, false, stream, req[fullc::kData]);
 }
 
-template<typename xpu>
+template <typename xpu>
 void FullyConnectedCompute(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t in_expected = param.no_bias ? 2 : 3;
+  uint32_t in_expected             = param.no_bias ? 2 : 3;
   CHECK_EQ(inputs.size(), in_expected);
   CHECK_EQ(outputs.size(), 1U);
   int dtype = inputs[0].type_flag_;
 
   switch (dtype) {
-  case mshadow::kFloat32:
-    FCForward<xpu, float>(ctx, param, inputs, req, outputs);
-    break;
-  case mshadow::kFloat64:
-    FCForward<xpu, double>(ctx, param, inputs, req, outputs);
-    break;
-  case mshadow::kFloat16:
-    LOG(FATAL) << "float16 fully connected layer is currently"
-                  "only supported by CuDNN version.";
-    break;
-  default:
-    LOG(FATAL) << "Unsupported type " << dtype;
+    case mshadow::kFloat32:
+      FCForward<xpu, float>(ctx, param, inputs, req, outputs);
+      break;
+    case mshadow::kFloat64:
+      FCForward<xpu, double>(ctx, param, inputs, req, outputs);
+      break;
+    case mshadow::kFloat16:
+      LOG(FATAL) << "float16 fully connected layer is currently"
+                    "only supported by CuDNN version.";
+      break;
+    default:
+      LOG(FATAL) << "Unsupported type " << dtype;
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void FullyConnectedGradCompute(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t out_expected = param.no_bias ? 2 : 3;
+  uint32_t out_expected            = param.no_bias ? 2 : 3;
   CHECK_EQ(inputs.size(), 3U);  // ograd_y, x, w
   CHECK_EQ(outputs.size(), out_expected);
   CHECK_EQ(req.size(), out_expected);
@@ -475,23 +482,21 @@ void FullyConnectedGradCompute(const nnvm::NodeAttrs& attrs,
   int dtype = inputs[0].type_flag_;
 
   switch (dtype) {
-  case mshadow::kFloat32:
-    FCBackward<xpu, float>(ctx, param, out_grad, in_data, req, outputs);
-    break;
-  case mshadow::kFloat64:
-    FCBackward<xpu, double>(ctx, param, out_grad, in_data, req, outputs);
-    break;
-  case mshadow::kFloat16:
-    LOG(FATAL) << "float16 fully connected layer is currently"
-                  "only supported by CuDNN version.";
-    break;
-  default:
-    LOG(FATAL) << "Unsupported type " << dtype;
+    case mshadow::kFloat32:
+      FCBackward<xpu, float>(ctx, param, out_grad, in_data, req, outputs);
+      break;
+    case mshadow::kFloat64:
+      FCBackward<xpu, double>(ctx, param, out_grad, in_data, req, outputs);
+      break;
+    case mshadow::kFloat16:
+      LOG(FATAL) << "float16 fully connected layer is currently"
+                    "only supported by CuDNN version.";
+      break;
+    default:
+      LOG(FATAL) << "Unsupported type " << dtype;
   }
 }
 
-
-
 ///
 // Inputs are:
 // o_x_grad : head gradient for x_grad
@@ -520,7 +525,7 @@ void FullyConnectedGradCompute(const nnvm::NodeAttrs& attrs,
  * @param req
  * @param outputs
  */
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void FullyConnectedGradGradCompute(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const std::vector<TBlob>& inputs,
@@ -528,9 +533,9 @@ void FullyConnectedGradGradCompute(const nnvm::NodeAttrs& attrs,
                                    const std::vector<TBlob>& outputs) {
   using namespace std;
   using namespace fullc;
-  Stream<xpu> *stream = ctx.get_stream<xpu>();
+  Stream<xpu>* stream              = ctx.get_stream<xpu>();
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  const size_t num_inputs = param.no_bias ? 3U : 4U;
+  const size_t num_inputs          = param.no_bias ? 3U : 4U;
   // outputs are: o_x_grad, o_w_grad, o_y   || o_x_grad, o_w_grad, o_b_grad, o_y
   const size_t num_outputs = 3U;
   CHECK_EQ(inputs.size(), num_inputs);
@@ -556,15 +561,15 @@ void FullyConnectedGradGradCompute(const nnvm::NodeAttrs& attrs,
   else
     o_y_idx = kOyBias;
   if (!param.flatten) {
-    o_x_grad = FlattenAs2DHead<xpu, DType>(inputs[kOxGrad], ctx);
-    o_w_grad = inputs[kOwGrad].get<xpu, 2, DType>(stream);
-    o_y = FlattenAs2DHead<xpu, DType>(inputs[o_y_idx], ctx);
+    o_x_grad    = FlattenAs2DHead<xpu, DType>(inputs[kOxGrad], ctx);
+    o_w_grad    = inputs[kOwGrad].get<xpu, 2, DType>(stream);
+    o_y         = FlattenAs2DHead<xpu, DType>(inputs[o_y_idx], ctx);
     x_grad_grad = FlattenAs2DHead<xpu, DType>(outputs[kXGradGrad], ctx);
     w_grad_grad = FlattenAs2DHead<xpu, DType>(outputs[kWGradGrad], ctx);
   } else {
-    o_x_grad = FlattenAs2DTail<xpu, DType>(inputs[kOxGrad], ctx);
-    o_w_grad = FlattenAs2DTail<xpu, DType>(inputs[kOwGrad], ctx);
-    o_y = inputs[o_y_idx].get<xpu, 2, DType>(stream);
+    o_x_grad    = FlattenAs2DTail<xpu, DType>(inputs[kOxGrad], ctx);
+    o_w_grad    = FlattenAs2DTail<xpu, DType>(inputs[kOwGrad], ctx);
+    o_y         = inputs[o_y_idx].get<xpu, 2, DType>(stream);
     x_grad_grad = FlattenAs2DTail<xpu, DType>(outputs[kXGradGrad], ctx);
     w_grad_grad = FlattenAs2DTail<xpu, DType>(outputs[kWGradGrad], ctx);
   }
@@ -583,31 +588,28 @@ void FullyConnectedGradGradCompute(const nnvm::NodeAttrs& attrs,
   */
 }
 
-
-template<typename xpu>
-void FullyConnectedGradGradDTypeDispatch(
-    const nnvm::NodeAttrs& attrs,
-    const OpContext& ctx,
-    const std::vector<TBlob>& inputs,
-    const std::vector<OpReqType>& req,
-    const std::vector<TBlob>& outputs) {
+template <typename xpu>
+void FullyConnectedGradGradDTypeDispatch(const nnvm::NodeAttrs& attrs,
+                                         const OpContext& ctx,
+                                         const std::vector<TBlob>& inputs,
+                                         const std::vector<OpReqType>& req,
+                                         const std::vector<TBlob>& outputs) {
   const int dtype = inputs[0].type_flag_;
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
     FullyConnectedGradGradCompute<xpu, DType>(attrs, ctx, inputs, req, outputs);
   });
 }
 
-
 }  // namespace op
 }  // namespace mxnet
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::FullyConnectedParam> {
   size_t operator()(const mxnet::op::FullyConnectedParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.num_hidden);
-    ret = dmlc::HashCombine(ret, val.no_bias);
-    ret = dmlc::HashCombine(ret, val.flatten);
+    ret        = dmlc::HashCombine(ret, val.num_hidden);
+    ret        = dmlc::HashCombine(ret, val.no_bias);
+    ret        = dmlc::HashCombine(ret, val.flatten);
     return ret;
   }
 };
diff --git a/src/operator/nn/fully_connected.cc b/src/operator/nn/fully_connected.cc
index 32bddf2e1880..69f3f070be8a 100644
--- a/src/operator/nn/fully_connected.cc
+++ b/src/operator/nn/fully_connected.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file fully_connected.cc
  * \brief fully connect operator
-*/
+ */
 #include "./fully_connected-inl.h"
 #include "./mkldnn/mkldnn_ops-inl.h"
 #include "./mkldnn/mkldnn_base-inl.h"
@@ -32,13 +32,12 @@ namespace op {
 bool SupportMKLDNNFC(const NDArray& input) {
   int ndim = input.shape().ndim();
   return (input.dtype() == mshadow::kFloat32 || input.dtype() == mshadow::kBfloat16) &&
-         (ndim >= 1 && ndim <= 4) &&
-         input.storage_type() == kDefaultStorage;
+         (ndim >= 1 && ndim <= 4) && input.storage_type() == kDefaultStorage;
 }
 
 static bool FullyConnectedShape(const nnvm::NodeAttrs& attrs,
-                                mxnet::ShapeVector *in_shape,
-                                mxnet::ShapeVector *out_shape) {
+                                mxnet::ShapeVector* in_shape,
+                                mxnet::ShapeVector* out_shape) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
   using namespace mshadow;
   if (!param.no_bias) {
@@ -50,11 +49,12 @@ static bool FullyConnectedShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape dshape = (*in_shape)[fullc::kData];
   mxnet::TShape oshape = (*out_shape)[0];
   // require data to be known
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   index_t num_input;
   if (!param.flatten) {
-    num_input = dshape[dshape.ndim()-1];
+    num_input = dshape[dshape.ndim() - 1];
   } else {
     num_input = dshape.ProdShape(1, dshape.ndim());
   }
@@ -68,7 +68,7 @@ static bool FullyConnectedShape(const nnvm::NodeAttrs& attrs,
 
   if (!param.flatten) {
     mxnet::TShape result_shape(dshape);
-    result_shape[dshape.ndim()-1] = param.num_hidden;
+    result_shape[dshape.ndim() - 1] = param.num_hidden;
     SHAPE_ASSIGN_CHECK(*out_shape, 0, result_shape);
   } else {
     SHAPE_ASSIGN_CHECK(*out_shape, 0, Shape2(dshape[0], param.num_hidden));
@@ -81,16 +81,16 @@ static bool FullyConnectedShape(const nnvm::NodeAttrs& attrs,
 }
 
 void FullyConnectedComputeExCPU(const nnvm::NodeAttrs& attrs,
-                                const OpContext &ctx,
-                                const std::vector<NDArray> &inputs,
-                                const std::vector<OpReqType> &req,
-                                const std::vector<NDArray> &outputs) {
+                                const OpContext& ctx,
+                                const std::vector<NDArray>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<NDArray>& outputs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  const bool valid_data = inputs[0].storage_type() == kDefaultStorage;
-  const bool valid_weight = inputs[1].storage_type() == kDefaultStorage ||
-                            inputs[1].storage_type() == kRowSparseStorage;
+  const bool valid_data            = inputs[0].storage_type() == kDefaultStorage;
+  const bool valid_weight =
+      inputs[1].storage_type() == kDefaultStorage || inputs[1].storage_type() == kRowSparseStorage;
   const bool valid_out = outputs[0].storage_type() == kDefaultStorage;
-  bool valid_bias = true;
+  bool valid_bias      = true;
   if (!param.no_bias) {
     valid_bias = inputs[2].storage_type() == kDefaultStorage ||
                  inputs[2].storage_type() == kRowSparseStorage;
@@ -101,8 +101,7 @@ void FullyConnectedComputeExCPU(const nnvm::NodeAttrs& attrs,
     if (SupportMKLDNNFC(inputs[0])) {
       MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
       MKLDNNRun(MKLDNNFCForward, attrs, ctx, inputs, req, outputs);
-      MKLDNN_OPCHECK_RUN(FullyConnectedCompute<cpu>, attrs, ctx, inputs, req,
-                         outputs);
+      MKLDNN_OPCHECK_RUN(FullyConnectedCompute<cpu>, attrs, ctx, inputs, req, outputs);
     } else {
       FallBackCompute(FullyConnectedCompute<cpu>, attrs, ctx, inputs, req, outputs);
     }
@@ -129,9 +128,11 @@ void FullyConnectedComputeExCPU(const nnvm::NodeAttrs& attrs,
 #else
   if (valid_data && valid_weight && valid_bias && valid_out) {
     std::vector<TBlob> in_blobs(inputs.size());
-    for (size_t i = 0; i < in_blobs.size(); i++) in_blobs[i] = inputs[i].data();
+    for (size_t i = 0; i < in_blobs.size(); i++)
+      in_blobs[i] = inputs[i].data();
     std::vector<TBlob> out_blobs(outputs.size());
-    for (size_t i = 0; i < out_blobs.size(); i++) out_blobs[i] = outputs[i].data();
+    for (size_t i = 0; i < out_blobs.size(); i++)
+      out_blobs[i] = outputs[i].data();
     FullyConnectedCompute<cpu>(attrs, ctx, in_blobs, req, out_blobs);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
@@ -141,15 +142,14 @@ void FullyConnectedComputeExCPU(const nnvm::NodeAttrs& attrs,
 
 #if MXNET_USE_ONEDNN == 1
 void FullyConnectedGradComputeExCPU(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<NDArray> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<NDArray> &outputs) {
+                                    const OpContext& ctx,
+                                    const std::vector<NDArray>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<NDArray>& outputs) {
   if (SupportMKLDNNFC(inputs[0])) {
     MKLDNN_OPCHECK_INIT(true, outputs.size(), inputs, outputs);
     MKLDNNRun(MKLDNNFCBackward, attrs, ctx, inputs, req, outputs);
-    MKLDNN_OPCHECK_RUN(FullyConnectedGradCompute<cpu>, attrs, ctx, inputs, req,
-                       outputs);
+    MKLDNN_OPCHECK_RUN(FullyConnectedGradCompute<cpu>, attrs, ctx, inputs, req, outputs);
     return;
   }
   FallBackCompute(FullyConnectedGradCompute<cpu>, attrs, ctx, inputs, req, outputs);
@@ -157,14 +157,15 @@ void FullyConnectedGradComputeExCPU(const nnvm::NodeAttrs& attrs,
 #endif
 
 static bool FullyConnectedType(const nnvm::NodeAttrs& attrs,
-                               std::vector<int> *in_type, std::vector<int> *out_type) {
+                               std::vector<int>* in_type,
+                               std::vector<int>* out_type) {
   CHECK_GE(in_type->size(), 1U);
   return ElemwiseAttr<int, type_is_none, type_assign, true, type_string>(
       attrs, in_type, out_type, -1);
 }
 
 struct FullyConnectedGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
@@ -175,7 +176,7 @@ struct FullyConnectedGrad {
 };
 
 struct FullyConnectedGradGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
@@ -187,25 +188,25 @@ struct FullyConnectedGradGrad {
 static bool FCStorageType(const nnvm::NodeAttrs& attrs,
                           const int dev_mask,
                           DispatchMode* dispatch_mode,
-                          std::vector<int> *in_attrs,
-                          std::vector<int> *out_attrs) {
+                          std::vector<int>* in_attrs,
+                          std::vector<int>* out_attrs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  const bool valid_data = in_attrs->at(0) == kDefaultStorage;
-  const bool valid_weight = in_attrs->at(1) == kDefaultStorage ||
-                            in_attrs->at(1) == kRowSparseStorage;
-  bool valid_bias = true;
+  const bool valid_data            = in_attrs->at(0) == kDefaultStorage;
+  const bool valid_weight =
+      in_attrs->at(1) == kDefaultStorage || in_attrs->at(1) == kRowSparseStorage;
+  bool valid_bias      = true;
   uint32_t in_expected = 2;
   if (!param.no_bias) {
     in_expected = 3;
-    valid_bias = in_attrs->at(2) == kDefaultStorage || in_attrs->at(2) == kRowSparseStorage;
+    valid_bias  = in_attrs->at(2) == kDefaultStorage || in_attrs->at(2) == kRowSparseStorage;
   }
   CHECK_EQ(in_attrs->size(), in_expected);
   CHECK_EQ(out_attrs->size(), 1);
   // dispatch to kFComputeEx is fine even if all inputs are dense and no MKL is present
   bool dispatched = false;
   if (!dispatched && valid_data && valid_weight && valid_bias) {
-    dispatched = storage_type_assign(out_attrs, mxnet::kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        out_attrs, mxnet::kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
 #if MXNET_USE_ONEDNN == 1
   if (!MKLDNNEnvSet())
@@ -221,23 +222,23 @@ static bool FCStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardFCStorageType(const nnvm::NodeAttrs& attrs,
                                   const int dev_mask,
                                   DispatchMode* dispatch_mode,
-                                  std::vector<int> *in_attrs,
-                                  std::vector<int> *out_attrs) {
+                                  std::vector<int>* in_attrs,
+                                  std::vector<int>* out_attrs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t out_expected = param.no_bias ? 2 : 3;
+  uint32_t out_expected            = param.no_bias ? 2 : 3;
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), out_expected);
   bool dispatched = false;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, mxnet::kDefaultStorage)) {
-    dispatched = storage_type_assign(out_attrs, mxnet::kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        out_attrs, mxnet::kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched && common::ContainsStorageType(*in_attrs, mxnet::kRowSparseStorage)) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
   }
   if (!dispatched) {
-    dispatched = storage_type_assign(out_attrs, mxnet::kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched = storage_type_assign(
+        out_attrs, mxnet::kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
 #if MXNET_USE_ONEDNN == 1
   if (!MKLDNNEnvSet())
@@ -250,8 +251,8 @@ DMLC_REGISTER_PARAMETER(FullyConnectedParam);
 
 NNVM_REGISTER_OP(FullyConnected)
 MXNET_ADD_SPARSE_OP_ALIAS(FullyConnected)
-.add_alias("_npx_fully_connected")
-.describe(R"code(Applies a linear transformation: :math:`Y = XW^T + b`.
+    .add_alias("_npx_fully_connected")
+    .describe(R"code(Applies a linear transformation: :math:`Y = XW^T + b`.
 
 If ``flatten`` is set to be true, then the shapes are:
 
@@ -282,63 +283,69 @@ If ``no_bias`` is set to be true, then the ``bias`` term is ignored.
     of sparse.FullyConnected.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  return params.no_bias ? 2 : 3;
-})
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<FullyConnectedParam>)
-.set_attr<FInferStorageType>("FInferStorageType", FCStorageType)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  if (!params.no_bias) {
-    return std::vector<std::string>{"data", "weight", "bias"};
-  } else {
-    return std::vector<std::string>{"data", "weight"};
-  }
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
+      return params.no_bias ? 2 : 3;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<FullyConnectedParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", FCStorageType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const FullyConnectedParam& params =
+                                           nnvm::get<FullyConnectedParam>(attrs.parsed);
+                                       if (!params.no_bias) {
+                                         return std::vector<std::string>{"data", "weight", "bias"};
+                                       } else {
+                                         return std::vector<std::string>{"data", "weight"};
+                                       }
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", FullyConnectedShape)
-.set_attr<nnvm::FInferType>("FInferType", FullyConnectedType)
-.set_attr<FCompute>("FCompute<cpu>", FullyConnectedCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FullyConnectedComputeExCPU)
-.set_attr<nnvm::FGradient>("FGradient", FullyConnectedGrad{"_backward_FullyConnected"})
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
-.add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
-.add_arguments(FullyConnectedParam::__FIELDS__());
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", FullyConnectedShape)
+    .set_attr<nnvm::FInferType>("FInferType", FullyConnectedType)
+    .set_attr<FCompute>("FCompute<cpu>", FullyConnectedCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FullyConnectedComputeExCPU)
+    .set_attr<nnvm::FGradient>("FGradient", FullyConnectedGrad{"_backward_FullyConnected"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_argument("weight", "NDArray-or-Symbol", "Weight matrix.")
+    .add_argument("bias", "NDArray-or-Symbol", "Bias parameter.")
+    .add_arguments(FullyConnectedParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_FullyConnected)
-.set_num_inputs(3)
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  return params.no_bias ? 2 : 3;
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{1, 0}};
-})
-.set_attr<nnvm::FGradient>("FGradient", FullyConnectedGradGrad{"_backward_backward_FullyConnected"})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardFCStorageType)
-.set_attr_parser(ParamParser<FullyConnectedParam>)
+    .set_num_inputs(3)
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
+      return params.no_bias ? 2 : 3;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{1, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient",
+                               FullyConnectedGradGrad{"_backward_backward_FullyConnected"})
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardFCStorageType)
+    .set_attr_parser(ParamParser<FullyConnectedParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FullyConnectedGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FullyConnectedGradComputeExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", FullyConnectedGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", FullyConnectedGradCompute<cpu>);
 
 // 2nd gradient for fully connected
 // Inputs are:
@@ -354,16 +361,14 @@ NNVM_REGISTER_OP(_backward_FullyConnected)
 //
 // For a detailed development of the second gradient see here: TODO(larroy)
 NNVM_REGISTER_OP(_backward_backward_FullyConnected)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  return params.no_bias ? 3 : 4;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  return 3;
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<FullyConnectedParam>)
-.set_attr<FCompute>("FCompute<cpu>", FullyConnectedGradGradDTypeDispatch<cpu>);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const FullyConnectedParam& params = nnvm::get<FullyConnectedParam>(attrs.parsed);
+      return params.no_bias ? 3 : 4;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) { return 3; })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<FullyConnectedParam>)
+    .set_attr<FCompute>("FCompute<cpu>", FullyConnectedGradGradDTypeDispatch<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/fully_connected.cu b/src/operator/nn/fully_connected.cu
index c89d37767c4a..cb639817c036 100644
--- a/src/operator/nn/fully_connected.cu
+++ b/src/operator/nn/fully_connected.cu
@@ -21,36 +21,35 @@
  * Copyright (c) 2015 by Contributors
  * \file fully_connected.cu
  * \brief fully connect operator
-*/
+ */
 #include "./fully_connected-inl.h"
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 void FullyConnectedCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<TBlob>& outputs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t in_expected = param.no_bias ? 2 : 3;
+  uint32_t in_expected             = param.no_bias ? 2 : 3;
   CHECK_EQ(inputs.size(), in_expected);
   CHECK_EQ(outputs.size(), 1U);
   int dtype = inputs[0].type_flag_;
 
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    FCForward<gpu, DType>(ctx, param, inputs, req, outputs);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(
+      dtype, DType, { FCForward<gpu, DType>(ctx, param, inputs, req, outputs); });
 }
 
-template<>
+template <>
 void FullyConnectedGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                     const OpContext& ctx,
                                     const std::vector<TBlob>& inputs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<TBlob>& outputs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t out_expected = param.no_bias ? 2 : 3;
+  uint32_t out_expected            = param.no_bias ? 2 : 3;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), out_expected);
   CHECK_EQ(req.size(), out_expected);
@@ -59,16 +58,14 @@ void FullyConnectedGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
   std::vector<TBlob> in_data(inputs.begin() + 1, inputs.end());
   int dtype = inputs[0].type_flag_;
 
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    FCBackward<gpu, DType>(ctx, param, out_grad, in_data, req, outputs);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(
+      dtype, DType, { FCBackward<gpu, DType>(ctx, param, out_grad, in_data, req, outputs); });
 }
 
-NNVM_REGISTER_OP(FullyConnected)
-.set_attr<FCompute>("FCompute<gpu>", FullyConnectedCompute<gpu>);
+NNVM_REGISTER_OP(FullyConnected).set_attr<FCompute>("FCompute<gpu>", FullyConnectedCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_FullyConnected)
-.set_attr<FCompute>("FCompute<gpu>", FullyConnectedGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", FullyConnectedGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/group_norm-inl.h b/src/operator/nn/group_norm-inl.h
index 37810acb06ac..16e5fa33a5a7 100644
--- a/src/operator/nn/group_norm-inl.h
+++ b/src/operator/nn/group_norm-inl.h
@@ -22,7 +22,7 @@
  * \file group_norm-inl.h
  * \brief Implements Group Normalization (https://arxiv.org/abs/1803.08494).
  * \author Hao Jin
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_GROUP_NORM_INL_H_
 #define MXNET_OPERATOR_NN_GROUP_NORM_INL_H_
@@ -46,8 +46,8 @@ namespace mxnet {
 namespace op {
 
 namespace groupnorm {
-enum GroupNormOpInputs {kData, kGamma, kBeta};  // kGamma: scaling parameters, kBeta: shift biases
-enum GroupNormOpOutputs {kOut, kMean, kStd};  // req, out_data
+enum GroupNormOpInputs { kData, kGamma, kBeta };  // kGamma: scaling parameters, kBeta: shift biases
+enum GroupNormOpOutputs { kOut, kMean, kStd };    // req, out_data
 }  // namespace groupnorm
 
 struct GroupNormParam : public dmlc::Parameter<GroupNormParam> {
@@ -55,26 +55,25 @@ struct GroupNormParam : public dmlc::Parameter<GroupNormParam> {
   float eps;
   bool output_mean_var;
   DMLC_DECLARE_PARAMETER(GroupNormParam) {
-    DMLC_DECLARE_FIELD(num_groups).set_default(1)
-      .describe("Total number of groups.");
-    DMLC_DECLARE_FIELD(eps).set_default(1e-5f)
-      .describe("An `epsilon` parameter to prevent division by 0.");
-    DMLC_DECLARE_FIELD(output_mean_var).set_default(false)
-      .describe("Output the mean and std calculated along the given axis.");
+    DMLC_DECLARE_FIELD(num_groups).set_default(1).describe("Total number of groups.");
+    DMLC_DECLARE_FIELD(eps).set_default(1e-5f).describe(
+        "An `epsilon` parameter to prevent division by 0.");
+    DMLC_DECLARE_FIELD(output_mean_var)
+        .set_default(false)
+        .describe("Output the mean and std calculated along the given axis.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_groups_s, eps_s, output_mean_var_s;
     num_groups_s << num_groups;
     eps_s << eps;
     output_mean_var_s << output_mean_var;
-    (*dict)["num_groups"] = num_groups_s.str();
-    (*dict)["eps"] = eps_s.str();
+    (*dict)["num_groups"]      = num_groups_s.str();
+    (*dict)["eps"]             = eps_s.str();
     (*dict)["output_mean_var"] = output_mean_var_s.str();
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void GroupNormCompute(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -84,27 +83,26 @@ void GroupNormCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   using namespace mxnet_op;
   const GroupNormParam& param = nnvm::get<GroupNormParam>(attrs.parsed);
-  const int num_groups = param.num_groups;
-  if (req[0] == kNullOp) return;
+  const int num_groups        = param.num_groups;
+  if (req[0] == kNullOp)
+    return;
   CHECK_NE(req[0], kAddTo);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& data = inputs[groupnorm::kData];
-  const TBlob& mean = outputs[groupnorm::kMean];
-  const TBlob& std = outputs[groupnorm::kStd];
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  const TBlob& data               = inputs[groupnorm::kData];
+  const TBlob& mean               = outputs[groupnorm::kMean];
+  const TBlob& std                = outputs[groupnorm::kStd];
   const mxnet::TShape& data_shape = data.shape_;
-  CHECK_GE(data_shape.ndim(), 3U)
-    << "input should have at least 3 dims and "
-    << "the first 2 dims should be batch and channel respectively";
-  CHECK_EQ(data_shape[1] % num_groups, 0)
-    << "number of channel should be divisible by num_groups.";
+  CHECK_GE(data_shape.ndim(), 3U) << "input should have at least 3 dims and "
+                                  << "the first 2 dims should be batch and channel respectively";
+  CHECK_EQ(data_shape[1] % num_groups, 0) << "number of channel should be divisible by num_groups.";
 
   mxnet::TShape temp_data_shape(data_shape.ndim() + 1, 1);
   temp_data_shape[0] = data_shape[0];
   temp_data_shape[1] = num_groups;
   temp_data_shape[2] = data_shape[1] / num_groups;
   for (int i = 2; i < data_shape.ndim(); ++i) {
-    temp_data_shape[i+1] = data_shape[i];
+    temp_data_shape[i + 1] = data_shape[i];
   }
 
   mxnet::TShape moments_shape(temp_data_shape.ndim(), 1);
@@ -116,14 +114,13 @@ void GroupNormCompute(const nnvm::NodeAttrs& attrs,
   BroadcastReduceShapeCompact(temp_data_shape, moments_shape, &red_src_shape, &red_dst_shape);
   int channel_size = red_src_shape.Size() / red_dst_shape.Size();
 
-  TBlob data_ = data.reshape(red_src_shape);
+  TBlob data_        = data.reshape(red_src_shape);
   const TBlob& mean_ = mean.reshape(red_dst_shape);
-  const TBlob& std_ = std.reshape(red_dst_shape);
+  const TBlob& std_  = std.reshape(red_dst_shape);
 
   Tensor<xpu, 1, char> workspace;
 
-  size_t workspace_size = broadcast::ReduceWorkspaceSize(s, red_dst_shape, req[0],
-                                                         red_src_shape);
+  size_t workspace_size = broadcast::ReduceWorkspaceSize(s, red_dst_shape, req[0], red_src_shape);
 
   workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 
@@ -132,13 +129,12 @@ void GroupNormCompute(const nnvm::NodeAttrs& attrs,
   MSHADOW_REAL_TYPE_SWITCH(data.type_flag_, DType, {
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
       broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, true>(
-        s, mean_, req[0], workspace, data_);
+          s, mean_, req[0], workspace, data_);
     });
   });
 #else
   BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-    broadcast::RTCReduce(ctx, mean_, req[0], workspace,
-                         data_, "red::sum{}", NDim, "identity");
+    broadcast::RTCReduce(ctx, mean_, req[0], workspace, data_, "red::sum{}", NDim, "identity");
   });
 #endif  // !defined(__CUDACC__)
   MSHADOW_REAL_TYPE_SWITCH(data.type_flag_, DType, {
@@ -146,20 +142,22 @@ void GroupNormCompute(const nnvm::NodeAttrs& attrs,
     mean_data_tensor /= scalar<DType>(channel_size);
   });
 
-  TBlob data_grp = data.reshape(temp_data_shape);
-  const TBlob& mean_grp = mean.reshape(moments_shape);
-  const TBlob& std_grp = std.reshape(moments_shape);
+  TBlob data_grp          = data.reshape(temp_data_shape);
+  const TBlob& mean_grp   = mean.reshape(moments_shape);
+  const TBlob& std_grp    = std.reshape(moments_shape);
   const TBlob& output_grp = outputs[groupnorm::kOut].reshape(temp_data_shape);
 
   // Calculate data = data - mean
 #if !defined(__CUDACC__)
-  BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(attrs, ctx,
-                                                     {data_grp, mean_grp},
-                                                     {kWriteTo}, {output_grp});
+  BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(
+      attrs, ctx, {data_grp, mean_grp}, {kWriteTo}, {output_grp});
 #else
-  BinaryBroadcastRTCCompute {"sub"}(attrs, ctx,
-                                    {data_grp, mean_grp},
-                                    {kWriteTo}, {output_grp});
+  BinaryBroadcastRTCCompute{"sub"}(  // NOLINT
+      attrs,
+      ctx,
+      {data_grp, mean_grp},
+      {kWriteTo},
+      {output_grp});
 #endif  // !defined(__CUDACC__)
 
   // Calculate std
@@ -168,31 +166,31 @@ void GroupNormCompute(const nnvm::NodeAttrs& attrs,
   MSHADOW_REAL_TYPE_SWITCH(output_grp.type_flag_, DType, {
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
       broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::square, true>(
-        s, std_, req[0], workspace, centered_out);
+          s, std_, req[0], workspace, centered_out);
     });
   });
 #else
   BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-    broadcast::RTCReduce(ctx, std_, req[0],
-                         workspace, centered_out,
-                         "red::sum{}", NDim, "square");
+    broadcast::RTCReduce(ctx, std_, req[0], workspace, centered_out, "red::sum{}", NDim, "square");
   });
 #endif
   MSHADOW_REAL_TYPE_SWITCH(output_grp.type_flag_, DType, {
     Tensor<xpu, 1, DType> std_data_tensor = std_.FlatTo1D<xpu, DType>(s);
-    std_data_tensor = F<mshadow_op::square_root>(std_data_tensor / scalar<DType>(channel_size)
-                      + scalar<DType>(param.eps));
+    std_data_tensor = F<mshadow_op::square_root>(std_data_tensor / scalar<DType>(channel_size) +
+                                                 scalar<DType>(param.eps));
   });
 
   // Calculate data = data / std
 #if !defined(__CUDACC__)
-  BinaryBroadcastCompute<xpu, mshadow_op::div>(attrs, ctx,
-                                               {output_grp, std_grp},
-                                               {kWriteTo}, {output_grp});
+  BinaryBroadcastCompute<xpu, mshadow_op::div>(
+      attrs, ctx, {output_grp, std_grp}, {kWriteTo}, {output_grp});
 #else
-  BinaryBroadcastRTCCompute {"div"}(attrs, ctx,
-                                    {output_grp, std_grp},
-                                    {kWriteTo}, {output_grp});
+  BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+      attrs,
+      ctx,
+      {output_grp, std_grp},
+      {kWriteTo},
+      {output_grp});
 #endif  // !defined(__CUDACC__)
 
   const TBlob& output = outputs[groupnorm::kOut];
@@ -200,26 +198,30 @@ void GroupNormCompute(const nnvm::NodeAttrs& attrs,
   new_param_shape[1] = data_shape[1];
 
   const TBlob& gamma = inputs[groupnorm::kGamma].reshape(new_param_shape);
-  const TBlob& beta = inputs[groupnorm::kBeta].reshape(new_param_shape);
+  const TBlob& beta  = inputs[groupnorm::kBeta].reshape(new_param_shape);
 
 #if !defined(__CUDACC__)
   // Calculate data = data * gamma
-  BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx,
-                                                   {output, gamma},
-                                                   {kWriteTo}, {output});
+  BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+      attrs, ctx, {output, gamma}, {kWriteTo}, {output});
   // Calculate data = data + beta
-  BinaryBroadcastCompute<xpu, op::mshadow_op::plus>(attrs, ctx,
-                                                   {output, beta},
-                                                   {kWriteTo}, {output});
+  BinaryBroadcastCompute<xpu, op::mshadow_op::plus>(
+      attrs, ctx, {output, beta}, {kWriteTo}, {output});
 #else
   // Calculate data = data * gamma
-  BinaryBroadcastRTCCompute {"mul"}(attrs, ctx,
-                                    {output, gamma},
-                                    {kWriteTo}, {output});
+  BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+      attrs,
+      ctx,
+      {output, gamma},
+      {kWriteTo},
+      {output});
   // Calculate data = data + beta
-  BinaryBroadcastRTCCompute {"add"}(attrs, ctx,
-                                    {output, beta},
-                                    {kWriteTo}, {output});
+  BinaryBroadcastRTCCompute{"add"}(  // NOLINT
+      attrs,
+      ctx,
+      {output, beta},
+      {kWriteTo},
+      {output});
 #endif  // !defined(__CUDACC__)
 }
 
@@ -233,7 +235,7 @@ grad_gamma = sum(\bar{x} og, exclude_axis)
 grad_beta = sum(og, exclude_axis)
 grad_x = w - mean(w, axis) - \bar{x} * mean(w * \bar{x}, axis)
 */
-template<typename xpu>
+template <typename xpu>
 void GroupNormGradCompute(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -245,9 +247,9 @@ void GroupNormGradCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 5U);
   CHECK_EQ(outputs.size(), 3U);
   const GroupNormParam& param = nnvm::get<GroupNormParam>(attrs.parsed);
-  const int num_groups = param.num_groups;
+  const int num_groups        = param.num_groups;
 
-  const TBlob& data = inputs[1];
+  const TBlob& data           = inputs[1];
   const mxnet::TShape& dshape = data.shape_;
 
   mxnet::TShape temp_dshape(dshape.ndim() + 1, 1);
@@ -255,12 +257,12 @@ void GroupNormGradCompute(const nnvm::NodeAttrs& attrs,
   temp_dshape[1] = num_groups;
   temp_dshape[2] = dshape[1] / num_groups;
   for (int i = 2; i < dshape.ndim(); ++i) {
-    temp_dshape[i+1] = dshape[i];
+    temp_dshape[i + 1] = dshape[i];
   }
   const TBlob& data_ = data.reshape(temp_dshape);
   const TBlob& ograd = inputs[0].reshape(temp_dshape);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // Reshape gamma to be broadcastable
   mxnet::TShape new_param_shape(dshape.ndim(), 1);
   new_param_shape[1] = dshape[1];
@@ -268,98 +270,127 @@ void GroupNormGradCompute(const nnvm::NodeAttrs& attrs,
   const TBlob& gamma = inputs[2].reshape(new_param_shape);
 
   const TBlob& mean = inputs[3];
-  const TBlob& std = inputs[4];
+  const TBlob& std  = inputs[4];
 
   mxnet::TShape moments_shape(temp_dshape.ndim(), 1);
   for (int i = 0; i < dshape.ndim(); ++i) {
     moments_shape[i] = (i < mean.shape_.ndim()) ? mean.shape_[i] : 1;
   }
   const TBlob& mean_ = mean.reshape(moments_shape);
-  const TBlob& std_ = std.reshape(moments_shape);
+  const TBlob& std_  = std.reshape(moments_shape);
 
   // Prepare the necessary shapes for reduction
   mxnet::TShape red_src_shape, red_dst_shape, red_exclude_src_shape, red_exclude_dst_shape;
   BroadcastReduceShapeCompact(temp_dshape, mean_.shape_, &red_src_shape, &red_dst_shape);
-  BroadcastReduceShapeCompact(dshape, gamma.shape_,
-                              &red_exclude_src_shape, &red_exclude_dst_shape);
+  BroadcastReduceShapeCompact(dshape, gamma.shape_, &red_exclude_src_shape, &red_exclude_dst_shape);
 
   int N = red_src_shape.Size() / red_dst_shape.Size();
 
   // Initialize the workspace + Construct the temporary TBlobs
   Tensor<xpu, 1, char> workspace;
-  size_t dtype_size = common::mshadow_type_info(outputs[0].type_flag_).size;
-  size_t data_size = data.Size() * dtype_size;
+  size_t dtype_size   = common::mshadow_type_info(outputs[0].type_flag_).size;
+  size_t data_size    = data.Size() * dtype_size;
   size_t red_out_size = mean.Size() * dtype_size;
   // There are two types of reduction workloads: reduce over axis and reduce exclude axis
   // We take the maximum of the workspace sizes required by these workloads.
   // Also, we explicitly set the req_type=kAddto in case we want to use it.
-  size_t reduce_workspace_size =
-    std::max(broadcast::ReduceWorkspaceSize(s, red_dst_shape,
-                                            kAddTo, red_src_shape),
-             broadcast::ReduceWorkspaceSize(s, red_exclude_dst_shape, kAddTo,
-                                            red_exclude_src_shape));
+  size_t reduce_workspace_size = std::max(
+      broadcast::ReduceWorkspaceSize(s, red_dst_shape, kAddTo, red_src_shape),
+      broadcast::ReduceWorkspaceSize(s, red_exclude_dst_shape, kAddTo, red_exclude_src_shape));
   workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
-    Shape1(reduce_workspace_size + data_size * 2 + red_out_size), s);
-  const TBlob normalized_data =
-    TBlob(workspace.dptr_ + reduce_workspace_size,
-          data_.shape_, data.dev_mask(), data.type_flag_, data.dev_id());
-  const TBlob ograd_mult = TBlob(workspace.dptr_ + reduce_workspace_size + data_size,
-                                 data_.shape_, ograd.dev_mask(), ograd.type_flag_, ograd.dev_id());
-  const TBlob red_out = TBlob(workspace.dptr_ + reduce_workspace_size + data_size * 2,
-                              mean_.shape_, mean.dev_mask(), mean.type_flag_, mean.dev_id());
+      Shape1(reduce_workspace_size + data_size * 2 + red_out_size), s);
+  const TBlob normalized_data = TBlob(workspace.dptr_ + reduce_workspace_size,
+                                      data_.shape_,
+                                      data.dev_mask(),
+                                      data.type_flag_,
+                                      data.dev_id());
+  const TBlob ograd_mult      = TBlob(workspace.dptr_ + reduce_workspace_size + data_size,
+                                 data_.shape_,
+                                 ograd.dev_mask(),
+                                 ograd.type_flag_,
+                                 ograd.dev_id());
+  const TBlob red_out         = TBlob(workspace.dptr_ + reduce_workspace_size + data_size * 2,
+                              mean_.shape_,
+                              mean.dev_mask(),
+                              mean.type_flag_,
+                              mean.dev_id());
   // Compute normalized_data = (data - mean) / std
 #if !defined(__CUDACC__)
-  BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(attrs, ctx,
-                                                    {data_, mean_},
-                                                    {kWriteTo}, {normalized_data});
-  BinaryBroadcastCompute<xpu, op::mshadow_op::div>(attrs, ctx,
-                                                   {normalized_data, std_},
-                                                   {kWriteTo}, {normalized_data});
+  BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(
+      attrs, ctx, {data_, mean_}, {kWriteTo}, {normalized_data});
+  BinaryBroadcastCompute<xpu, op::mshadow_op::div>(
+      attrs, ctx, {normalized_data, std_}, {kWriteTo}, {normalized_data});
   // Calculate grad_beta
   if (req[2] != kNullOp) {
     MSHADOW_REAL_TYPE_SWITCH(outputs[2].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
         broadcast::Reduce<red::sum, NDim, DType, op::mshadow_op::identity, true>(
-          s, outputs[2].reshape(red_exclude_dst_shape), req[2], workspace,
-          ograd.reshape(red_exclude_src_shape));
+            s,
+            outputs[2].reshape(red_exclude_dst_shape),
+            req[2],
+            workspace,
+            ograd.reshape(red_exclude_src_shape));
       });
     });
   }
   // Calculate grad_gamma, it will be sum(ograd * normalized_data, exclude_axis)
-  ElemwiseBinaryOp::Compute<xpu, op::mshadow_op::mul>(attrs, ctx, {normalized_data, ograd},
-                                                      {kWriteTo}, {ograd_mult});
+  ElemwiseBinaryOp::Compute<xpu, op::mshadow_op::mul>(
+      attrs, ctx, {normalized_data, ograd}, {kWriteTo}, {ograd_mult});
   if (req[1] != kNullOp) {
     MSHADOW_REAL_TYPE_SWITCH(outputs[1].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, op::mshadow_op::identity, true>(
-          s, outputs[1].reshape(red_exclude_dst_shape), req[1], workspace,
-          ograd_mult.reshape(red_exclude_src_shape));
+            s,
+            outputs[1].reshape(red_exclude_dst_shape),
+            req[1],
+            workspace,
+            ograd_mult.reshape(red_exclude_src_shape));
       });
     });
   }
 #else
-  BinaryBroadcastRTCCompute {"sub"}(attrs, ctx,
-                                    {data_, mean_},
-                                    {kWriteTo}, {normalized_data});
-  BinaryBroadcastRTCCompute {"div"}(attrs, ctx,
-                                    {normalized_data, std_},
-                                    {kWriteTo}, {normalized_data});
+  BinaryBroadcastRTCCompute{"sub"}(  // NOLINT
+      attrs,
+      ctx,
+      {data_, mean_},
+      {kWriteTo},
+      {normalized_data});
+  BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+      attrs,
+      ctx,
+      {normalized_data, std_},
+      {kWriteTo},
+      {normalized_data});
   // Calculate grad_beta
   if (req[2] != kNullOp) {
     BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, outputs[2].reshape(red_exclude_dst_shape),
-                           req[2], workspace, ograd.reshape(red_exclude_src_shape),
-                           "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           outputs[2].reshape(red_exclude_dst_shape),
+                           req[2],
+                           workspace,
+                           ograd.reshape(red_exclude_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
   }
   // Calculate grad_gamma, it will be sum(ograd * normalized_data, exclude_axis)
-  ElemwiseBinaryRTCCompute {"mul"}(attrs, ctx, {normalized_data, ograd},
-                                   {kWriteTo}, {ograd_mult});
+  ElemwiseBinaryRTCCompute{"mul"}(  // NOLINT
+      attrs,
+      ctx,
+      {normalized_data, ograd},
+      {kWriteTo},
+      {ograd_mult});
   if (req[1] != kNullOp) {
     BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, outputs[1].reshape(red_exclude_dst_shape),
-                           req[1], workspace, ograd_mult.reshape(red_exclude_src_shape),
-                           "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           outputs[1].reshape(red_exclude_dst_shape),
+                           req[1],
+                           workspace,
+                           ograd_mult.reshape(red_exclude_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
   }
 #endif  // !defined(__CUDACC__)
@@ -371,71 +402,99 @@ void GroupNormGradCompute(const nnvm::NodeAttrs& attrs,
   if (req[0] != kNullOp) {
     const TBlob output_ = outputs[0].reshape(data_.shape_);
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx,
-                                                    {inputs[0], gamma},
-                                                    {kWriteTo},
-                                                    {ograd_mult.reshape(data.shape_)});
-    BinaryBroadcastCompute<xpu, op::mshadow_op::div>(attrs, ctx,
-                                                    {ograd_mult, std_},
-                                                    {kWriteTo}, {ograd_mult});
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {inputs[0], gamma}, {kWriteTo}, {ograd_mult.reshape(data.shape_)});
+    BinaryBroadcastCompute<xpu, op::mshadow_op::div>(
+        attrs, ctx, {ograd_mult, std_}, {kWriteTo}, {ograd_mult});
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, op::mshadow_op::identity, true>(
-          s, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-          ograd_mult.reshape(red_src_shape));
+            s,
+            red_out.reshape(red_dst_shape),
+            kWriteTo,
+            workspace,
+            ograd_mult.reshape(red_src_shape));
       });
       Tensor<xpu, 1, DType> red_out_tensor = red_out.FlatTo1D<xpu, DType>(s);
       red_out_tensor /= scalar<DType>(N);
     });
-    BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(attrs, ctx,
-                                                      {ograd_mult, red_out},
-                                                      {req[0]}, {output_});
-    ElemwiseBinaryOp::Compute<xpu, op::mshadow_op::mul>(attrs, ctx, {ograd_mult, normalized_data},
-                                                        {kWriteTo}, {ograd_mult});
+    BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(
+        attrs, ctx, {ograd_mult, red_out}, {req[0]}, {output_});
+    ElemwiseBinaryOp::Compute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {ograd_mult, normalized_data}, {kWriteTo}, {ograd_mult});
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, op::mshadow_op::identity, true>(
-          s, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-          ograd_mult.reshape(red_src_shape));
+            s,
+            red_out.reshape(red_dst_shape),
+            kWriteTo,
+            workspace,
+            ograd_mult.reshape(red_src_shape));
       });
       Tensor<xpu, 1, DType> red_out_tensor = red_out.FlatTo1D<xpu, DType>(s);
       red_out_tensor /= scalar<DType>(-N);
     });
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx,
-                                                     {normalized_data, red_out},
-                                                     {kAddTo}, {output_});
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {normalized_data, red_out}, {kAddTo}, {output_});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx,
-                                      {inputs[0], gamma},
-                                      {kWriteTo},
-                                      {ograd_mult.reshape(data.shape_)});
-    BinaryBroadcastRTCCompute {"div"}(attrs, ctx,
-                                      {ograd_mult, std_},
-                                      {kWriteTo}, {ograd_mult});
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {inputs[0], gamma},
+        {kWriteTo},
+        {ograd_mult.reshape(data.shape_)});
+    BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd_mult, std_},
+        {kWriteTo},
+        {ograd_mult});
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-                           ograd_mult.reshape(red_src_shape), "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           red_out.reshape(red_dst_shape),
+                           kWriteTo,
+                           workspace,
+                           ograd_mult.reshape(red_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Tensor<xpu, 1, DType> red_out_tensor = red_out.FlatTo1D<xpu, DType>(s);
       red_out_tensor /= scalar<DType>(N);
     });
-    BinaryBroadcastRTCCompute {"sub"}(attrs, ctx,
-                                      {ograd_mult, red_out},
-                                      {req[0]}, {output_});
-    ElemwiseBinaryRTCCompute {"mul"}(attrs, ctx, {ograd_mult, normalized_data},
-                                     {kWriteTo}, {ograd_mult});
+    BinaryBroadcastRTCCompute{"sub"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd_mult, red_out},
+        {req[0]},
+        {output_});
+    ElemwiseBinaryRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd_mult, normalized_data},
+        {kWriteTo},
+        {ograd_mult});
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-                           ograd_mult.reshape(red_src_shape), "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           red_out.reshape(red_dst_shape),
+                           kWriteTo,
+                           workspace,
+                           ograd_mult.reshape(red_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Tensor<xpu, 1, DType> red_out_tensor = red_out.FlatTo1D<xpu, DType>(s);
       red_out_tensor /= scalar<DType>(-N);
     });
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx,
-                                      {normalized_data, red_out},
-                                      {kAddTo}, {output_});
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {normalized_data, red_out},
+        {kAddTo},
+        {output_});
 #endif  // !defined(__CUDACC__)
   }
 }
diff --git a/src/operator/nn/group_norm.cc b/src/operator/nn/group_norm.cc
index 0b794c4d4f4a..fc181051a8e6 100644
--- a/src/operator/nn/group_norm.cc
+++ b/src/operator/nn/group_norm.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2019 by Contributors
  * \file group_norm.cc
  * \brief Implements Group Normalization (https://arxiv.org/abs/1803.08494).
-*/
+ */
 
 #include "group_norm-inl.h"
 #include <nnvm/op_attr_types.h>
@@ -33,12 +33,12 @@ namespace op {
 DMLC_REGISTER_PARAMETER(GroupNormParam);
 
 static bool GroupNormShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_shape,
-                           mxnet::ShapeVector *out_shape) {
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   const GroupNormParam& param = nnvm::get<GroupNormParam>(attrs.parsed);
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 3U) << "Input:[data, gamma, beta]";
-  const mxnet::TShape &dshape = in_shape->at(groupnorm::kData);
+  const mxnet::TShape& dshape = in_shape->at(groupnorm::kData);
   if (!mxnet::ndim_is_known(dshape)) {
     return false;
   }
@@ -48,7 +48,7 @@ static bool GroupNormShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(dshape[1] % num_groups, 0) << "# of channels must be divisible by # of groups";
 
   in_shape->at(groupnorm::kGamma) = mxnet::TShape(Shape1(dshape[1]));
-  in_shape->at(groupnorm::kBeta) = mxnet::TShape(Shape1(dshape[1]));
+  in_shape->at(groupnorm::kBeta)  = mxnet::TShape(Shape1(dshape[1]));
 
   out_shape->clear();
   out_shape->push_back(dshape);
@@ -62,8 +62,8 @@ static bool GroupNormShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(GroupNorm)
-.add_alias("_npx_group_norm")
-.describe(R"code(Group normalization.
+    .add_alias("_npx_group_norm")
+    .describe(R"code(Group normalization.
 
 The input channels are separated into ``num_groups`` groups, each containing ``num_channels / num_groups`` channels.
 The mean and standard-deviation are calculated separately over the each group.
@@ -76,58 +76,61 @@ The mean and standard-deviation are calculated separately over the each group.
 Both ``gamma`` and ``beta`` are learnable parameters.
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<GroupNormParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "gamma", "beta"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "mean", "std"};
-})
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  const GroupNormParam& param = nnvm::get<GroupNormParam>(attrs.parsed);
-  return param.output_mean_var ? 3 : 1;
-})
-.set_attr<mxnet::FInferShape>("FInferShape", GroupNormShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 3>)
-.set_attr<FCompute>("FCompute<cpu>", GroupNormCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", [](const nnvm::ObjectPtr& n,
-                                           const std::vector<nnvm::NodeEntry>& ograds) {
-  std::vector<nnvm::NodeEntry> heads;
-  heads.push_back(ograds[0]);  // ograd
-  heads.push_back(n->inputs[0]);  // data
-  heads.push_back(n->inputs[1]);  // gamma
-  heads.emplace_back(nnvm::NodeEntry{n, 1, 0});  // mean
-  heads.emplace_back(nnvm::NodeEntry{ n, 2, 0 });  // std
-  return MakeGradNode("_backward_GroupNorm", n, heads, n->attrs.dict);
-})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "Input data")
-.add_argument("gamma", "NDArray-or-Symbol", "gamma array")
-.add_argument("beta", "NDArray-or-Symbol", "beta array")
-.add_arguments(GroupNormParam::__FIELDS__());
-
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<GroupNormParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "gamma", "beta"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output", "mean", "std"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) {
+                                          const GroupNormParam& param =
+                                              nnvm::get<GroupNormParam>(attrs.parsed);
+                                          return param.output_mean_var ? 3 : 1;
+                                        })
+    .set_attr<mxnet::FInferShape>("FInferShape", GroupNormShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 3>)
+    .set_attr<FCompute>("FCompute<cpu>", GroupNormCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 std::vector<nnvm::NodeEntry> heads;
+                                 heads.push_back(ograds[0]);                    // ograd
+                                 heads.push_back(n->inputs[0]);                 // data
+                                 heads.push_back(n->inputs[1]);                 // gamma
+                                 heads.emplace_back(nnvm::NodeEntry{n, 1, 0});  // mean
+                                 heads.emplace_back(nnvm::NodeEntry{n, 2, 0});  // std
+                                 return MakeGradNode(
+                                     "_backward_GroupNorm", n, heads, n->attrs.dict);
+                               })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "Input data")
+    .add_argument("gamma", "NDArray-or-Symbol", "gamma array")
+    .add_argument("beta", "NDArray-or-Symbol", "beta array")
+    .add_arguments(GroupNormParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_GroupNorm)
-.set_num_inputs(5)
-.set_num_outputs(3)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<GroupNormParam>)
-.set_attr<FCompute>("FCompute<cpu>", GroupNormGradCompute<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-});
+    .set_num_inputs(5)
+    .set_num_outputs(3)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<GroupNormParam>)
+    .set_attr<FCompute>("FCompute<cpu>", GroupNormGradCompute<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/group_norm.cu b/src/operator/nn/group_norm.cu
index 136c3337468c..218c5692feb9 100644
--- a/src/operator/nn/group_norm.cu
+++ b/src/operator/nn/group_norm.cu
@@ -21,17 +21,16 @@
  * Copyright (c) 2019 by Contributors
  * \file group_norm.cu
  * \brief Implements Group Normalization (https://arxiv.org/abs/1803.08494).
-*/
+ */
 #include "./group_norm-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(GroupNorm)
-.set_attr<FCompute>("FCompute<gpu>", GroupNormCompute<gpu>);
+NNVM_REGISTER_OP(GroupNorm).set_attr<FCompute>("FCompute<gpu>", GroupNormCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_GroupNorm)
-.set_attr<FCompute>("FCompute<gpu>", GroupNormGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", GroupNormGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/im2col-inl.h b/src/operator/nn/im2col-inl.h
index b5caa035f911..101ecc3fbeab 100644
--- a/src/operator/nn/im2col-inl.h
+++ b/src/operator/nn/im2col-inl.h
@@ -22,7 +22,7 @@
  * \file im2col-inl.h
  * \brief
  * \author Jiajun Wang
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_IM2COL_INL_H_
 #define MXNET_OPERATOR_NN_IM2COL_INL_H_
@@ -42,15 +42,21 @@ struct Im2colParam : public dmlc::Parameter<Im2colParam> {
   mxnet::TShape pad;
   DMLC_DECLARE_PARAMETER(Im2colParam) {
     DMLC_DECLARE_FIELD(kernel).describe("Sliding kernel size: (w,), (h, w) or (d, h, w).");
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, 0))
-    .describe("The stride between adjacent sliding blocks in spatial dimension: "
-              "(w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(dilate).set_default(mxnet::TShape(0, 0))
-    .describe("The spacing between adjacent kernel points: (w,), (h, w) or (d, h, w). "
-              "Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, 0))
-    .describe("The zero-value padding size on both sides of spatial dimension: "
-              "(w,), (h, w) or (d, h, w). Defaults to no padding.");
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The stride between adjacent sliding blocks in spatial dimension: "
+            "(w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(dilate)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The spacing between adjacent kernel points: (w,), (h, w) or (d, h, w). "
+            "Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The zero-value padding size on both sides of spatial dimension: "
+            "(w,), (h, w) or (d, h, w). Defaults to no padding.");
   }
 
   index_t DilatedKernelSize(int dim) const {
@@ -58,27 +64,26 @@ struct Im2colParam : public dmlc::Parameter<Im2colParam> {
   }
 };  // struct Im2colParam
 
-
-template<typename xpu>
+template <typename xpu>
 void Im2colCompute(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
                    const std::vector<OpReqType>& req,
                    const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const Im2colParam& param = nnvm::get<Im2colParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const mxnet::TShape im_shape = inputs[0].shape_;
+  const Im2colParam& param      = nnvm::get<Im2colParam>(attrs.parsed);
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
+  const mxnet::TShape im_shape  = inputs[0].shape_;
   const mxnet::TShape col_shape = outputs[0].shape_;
-  const index_t num = im_shape[0];
+  const index_t num             = im_shape[0];
 
   const int spatial_size = param.kernel.ndim();
   mxnet::TShape col_buffer_shape(1 + spatial_size, 1);
   col_buffer_shape[0] = col_shape[1];
   for (int i = 0; i < spatial_size; ++i) {
-    const index_t pad_size = im_shape[i + 2] + 2 * param.pad[i];
+    const index_t pad_size    = im_shape[i + 2] + 2 * param.pad[i];
     const index_t output_size = (pad_size - param.DilatedKernelSize(i)) / param.stride[i] + 1;
-    col_buffer_shape[i + 1] = output_size;
+    col_buffer_shape[i + 1]   = output_size;
   }
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
@@ -87,18 +92,33 @@ void Im2colCompute(const nnvm::NodeAttrs& attrs,
     Tensor<xpu, 3, DType> col = outputs[0].get_with_shape<xpu, 3, DType>(
         Shape3(col_shape[0], col_shape[1], col_shape[2]), s);
 
-    if (req[0] == kNullOp) return;
+    if (req[0] == kNullOp)
+      return;
     if (req[0] != kAddTo) {
       for (index_t n = 0; n < num; ++n) {
-        im2col(s, im[n].dptr_, im_shape, col_buffer_shape,
-               param.kernel, param.pad, param.stride, param.dilate, col[n].dptr_);
+        im2col(s,
+               im[n].dptr_,
+               im_shape,
+               col_buffer_shape,
+               param.kernel,
+               param.pad,
+               param.stride,
+               param.dilate,
+               col[n].dptr_);
       }
     } else {
-      Tensor<xpu, 2, DType> tcol = ctx.requested[0]
-        .get_space_typed<xpu, 2, DType>(Shape2(col_shape[1], col_shape[2]), s);
+      Tensor<xpu, 2, DType> tcol =
+          ctx.requested[0].get_space_typed<xpu, 2, DType>(Shape2(col_shape[1], col_shape[2]), s);
       for (index_t n = 0; n < num; ++n) {
-        im2col(s, im[n].dptr_, im_shape, col_buffer_shape,
-               param.kernel, param.pad, param.stride, param.dilate, tcol.dptr_);
+        im2col(s,
+               im[n].dptr_,
+               im_shape,
+               col_buffer_shape,
+               param.kernel,
+               param.pad,
+               param.stride,
+               param.dilate,
+               tcol.dptr_);
         Tensor<xpu, 2, DType> ocol = col[n];
         ocol += tcol;
       }
@@ -106,7 +126,7 @@ void Im2colCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void Im2colGradCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -114,19 +134,19 @@ void Im2colGradCompute(const nnvm::NodeAttrs& attrs,
                        const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   const Im2colParam& param = nnvm::get<Im2colParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s           = ctx.get_stream<xpu>();
 
-  const mxnet::TShape im_shape = outputs[0].shape_;
+  const mxnet::TShape im_shape  = outputs[0].shape_;
   const mxnet::TShape col_shape = inputs[0].shape_;
-  const index_t num = im_shape[0];
+  const index_t num             = im_shape[0];
 
   const int spatial_size = param.kernel.ndim();
   mxnet::TShape col_buffer_shape(1 + spatial_size, 1);
   col_buffer_shape[0] = col_shape[1];
   for (int i = 0; i < spatial_size; ++i) {
-    const index_t pad_size = im_shape[i + 2] + 2 * param.pad[i];
+    const index_t pad_size    = im_shape[i + 2] + 2 * param.pad[i];
     const index_t output_size = (pad_size - param.DilatedKernelSize(i)) / param.stride[i] + 1;
-    col_buffer_shape[i + 1] = output_size;
+    col_buffer_shape[i + 1]   = output_size;
   }
 
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
@@ -136,9 +156,16 @@ void Im2colGradCompute(const nnvm::NodeAttrs& attrs,
         Shape3(col_shape[0], col_shape[1], col_shape[2]), s);
 
     for (index_t n = 0; n < num; ++n) {
-      col2im(s, col_grad[n].dptr_, im_shape, col_buffer_shape,
-             param.kernel, param.pad, param.stride, param.dilate,
-             im_grad[n].dptr_, req[0]);
+      col2im(s,
+             col_grad[n].dptr_,
+             im_shape,
+             col_buffer_shape,
+             param.kernel,
+             param.pad,
+             param.stride,
+             param.dilate,
+             im_grad[n].dptr_,
+             req[0]);
     }
   });
 }
@@ -151,17 +178,23 @@ struct Col2imParam : public dmlc::Parameter<Col2imParam> {
   mxnet::TShape pad;
   DMLC_DECLARE_PARAMETER(Col2imParam) {
     DMLC_DECLARE_FIELD(output_size)
-    .describe("The spatial dimension of image array: (w,), (h, w) or (d, h, w).");
+        .describe("The spatial dimension of image array: (w,), (h, w) or (d, h, w).");
     DMLC_DECLARE_FIELD(kernel).describe("Sliding kernel size: (w,), (h, w) or (d, h, w).");
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, 0))
-    .describe("The stride between adjacent sliding blocks in spatial dimension: "
-              "(w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(dilate).set_default(mxnet::TShape(0, 0))
-    .describe("The spacing between adjacent kernel points: (w,), (h, w) or (d, h, w). "
-              "Defaults to 1 for each dimension.");
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, 0))
-    .describe("The zero-value padding size on both sides of spatial dimension: "
-              "(w,), (h, w) or (d, h, w). Defaults to no padding.");
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The stride between adjacent sliding blocks in spatial dimension: "
+            "(w,), (h, w) or (d, h, w). Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(dilate)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The spacing between adjacent kernel points: (w,), (h, w) or (d, h, w). "
+            "Defaults to 1 for each dimension.");
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, 0))
+        .describe(
+            "The zero-value padding size on both sides of spatial dimension: "
+            "(w,), (h, w) or (d, h, w). Defaults to no padding.");
   }
 
   index_t DilatedKernelSize(int dim) const {
@@ -169,26 +202,26 @@ struct Col2imParam : public dmlc::Parameter<Col2imParam> {
   }
 };  // struct Col2imParam
 
-template<typename xpu>
+template <typename xpu>
 void Col2imCompute(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
                    const std::vector<OpReqType>& req,
                    const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const Col2imParam& param = nnvm::get<Col2imParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const mxnet::TShape im_shape = outputs[0].shape_;
+  const Col2imParam& param      = nnvm::get<Col2imParam>(attrs.parsed);
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
+  const mxnet::TShape im_shape  = outputs[0].shape_;
   const mxnet::TShape col_shape = inputs[0].shape_;
-  const index_t num = im_shape[0];
+  const index_t num             = im_shape[0];
 
   const int spatial_size = param.kernel.ndim();
   mxnet::TShape col_buffer_shape(1 + spatial_size, 1);
   col_buffer_shape[0] = col_shape[1];
   for (int i = 0; i < spatial_size; ++i) {
-    const index_t pad_size = im_shape[i + 2] + 2 * param.pad[i];
+    const index_t pad_size    = im_shape[i + 2] + 2 * param.pad[i];
     const index_t output_size = (pad_size - param.DilatedKernelSize(i)) / param.stride[i] + 1;
-    col_buffer_shape[i + 1] = output_size;
+    col_buffer_shape[i + 1]   = output_size;
   }
 
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
@@ -198,14 +231,21 @@ void Col2imCompute(const nnvm::NodeAttrs& attrs,
         Shape3(col_shape[0], col_shape[1], col_shape[2]), s);
 
     for (index_t n = 0; n < num; ++n) {
-      col2im(s, col[n].dptr_, im_shape, col_buffer_shape,
-             param.kernel, param.pad, param.stride, param.dilate,
-             im[n].dptr_, req[0]);
+      col2im(s,
+             col[n].dptr_,
+             im_shape,
+             col_buffer_shape,
+             param.kernel,
+             param.pad,
+             param.stride,
+             param.dilate,
+             im[n].dptr_,
+             req[0]);
     }
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void Col2imGradCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -213,19 +253,19 @@ void Col2imGradCompute(const nnvm::NodeAttrs& attrs,
                        const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   const Col2imParam& param = nnvm::get<Col2imParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s           = ctx.get_stream<xpu>();
 
-  const mxnet::TShape im_shape = inputs[0].shape_;
+  const mxnet::TShape im_shape  = inputs[0].shape_;
   const mxnet::TShape col_shape = outputs[0].shape_;
-  const index_t batch_size = im_shape[0];
+  const index_t batch_size      = im_shape[0];
 
   const int spatial_size = param.kernel.ndim();
   mxnet::TShape col_buffer_shape(1 + spatial_size, 1);
   col_buffer_shape[0] = im_shape[1];
   for (int i = 0; i < spatial_size; ++i) {
-    const index_t pad_size = im_shape[i + 2] + 2 * param.pad[i];
+    const index_t pad_size    = im_shape[i + 2] + 2 * param.pad[i];
     const index_t output_size = (pad_size - param.DilatedKernelSize(i)) / param.stride[i] + 1;
-    col_buffer_shape[i + 1] = output_size;
+    col_buffer_shape[i + 1]   = output_size;
   }
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
@@ -234,18 +274,33 @@ void Col2imGradCompute(const nnvm::NodeAttrs& attrs,
     Tensor<xpu, 3, DType> col_grad = outputs[0].get_with_shape<xpu, 3, DType>(
         Shape3(col_shape[0], col_shape[1], col_shape[2]), s);
 
-    if (req[0] == kNullOp) return;
+    if (req[0] == kNullOp)
+      return;
     if (req[0] != kAddTo) {
       for (index_t n = 0; n < batch_size; ++n) {
-        im2col(s, im_grad[n].dptr_, im_shape, col_buffer_shape,
-               param.kernel, param.pad, param.stride, param.dilate, col_grad[n].dptr_);
+        im2col(s,
+               im_grad[n].dptr_,
+               im_shape,
+               col_buffer_shape,
+               param.kernel,
+               param.pad,
+               param.stride,
+               param.dilate,
+               col_grad[n].dptr_);
       }
     } else {
-      Tensor<xpu, 2, DType> tgrad = ctx.requested[0]
-        .get_space_typed<xpu, 2, DType>(Shape2(col_shape[1], col_shape[2]), s);
+      Tensor<xpu, 2, DType> tgrad =
+          ctx.requested[0].get_space_typed<xpu, 2, DType>(Shape2(col_shape[1], col_shape[2]), s);
       for (index_t n = 0; n < batch_size; ++n) {
-        im2col(s, im_grad[n].dptr_, im_shape, col_buffer_shape,
-               param.kernel, param.pad, param.stride, param.dilate, tgrad.dptr_);
+        im2col(s,
+               im_grad[n].dptr_,
+               im_shape,
+               col_buffer_shape,
+               param.kernel,
+               param.pad,
+               param.stride,
+               param.dilate,
+               tgrad.dptr_);
         Tensor<xpu, 2, DType> cgrad = col_grad[n];
         cgrad += tgrad;
       }
diff --git a/src/operator/nn/im2col.cc b/src/operator/nn/im2col.cc
index ae493f1bc594..fd9935d6ab2b 100644
--- a/src/operator/nn/im2col.cc
+++ b/src/operator/nn/im2col.cc
@@ -22,7 +22,7 @@
  * \file im2col.cc
  * \brief
  * \author Jiajun Wang
-*/
+ */
 
 #include "./im2col-inl.h"
 #include "../operator_common.h"
@@ -34,7 +34,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(Im2colParam);
 DMLC_REGISTER_PARAMETER(Col2imParam);
 
-template<typename PType>
+template <typename PType>
 void SlidingParser(nnvm::NodeAttrs* attrs) {
   using namespace mshadow;
   PType param_;
@@ -53,36 +53,42 @@ void SlidingParser(nnvm::NodeAttrs* attrs) {
   }
 
   if (param_.kernel.ndim() == 1) {
-    if (param_.stride.ndim() == 0) param_.stride = Shape1(1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape1(1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape1(0);
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape1(1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape1(1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape1(0);
   } else if (param_.kernel.ndim() == 2) {
-    if (param_.stride.ndim() == 0) param_.stride = Shape2(1, 1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape2(1, 1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape2(0, 0);
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape2(1, 1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape2(1, 1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape2(0, 0);
   } else {
     CHECK_EQ(param_.kernel.ndim(), 3U) << param_.kernel.ndim() << "D convolution not supported";
-    if (param_.stride.ndim() == 0) param_.stride = Shape3(1, 1, 1);
-    if (param_.dilate.ndim() == 0) param_.dilate = Shape3(1, 1, 1);
-    if (param_.pad.ndim() == 0) param_.pad = Shape3(0, 0, 0);
+    if (param_.stride.ndim() == 0)
+      param_.stride = Shape3(1, 1, 1);
+    if (param_.dilate.ndim() == 0)
+      param_.dilate = Shape3(1, 1, 1);
+    if (param_.pad.ndim() == 0)
+      param_.pad = Shape3(0, 0, 0);
   }
   CHECK_EQ(param_.kernel.ndim(), param_.stride.ndim())
-    << "Stride must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while stride is "
-    << param_.stride;
+      << "Stride must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while stride is " << param_.stride;
   CHECK_EQ(param_.kernel.ndim(), param_.dilate.ndim())
-    << "Dilate must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while dilate is "
-    << param_.dilate;
+      << "Dilate must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while dilate is " << param_.dilate;
   CHECK_EQ(param_.kernel.ndim(), param_.pad.ndim())
-    << "Padding must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param_.kernel << " while padding is "
-    << param_.pad;
+      << "Padding must have the same number of dimensions with kernel_size,"
+      << "but kernel_size is set to " << param_.kernel << " while padding is " << param_.pad;
   attrs->parsed = std::move(param_);
 }
 
 NNVM_REGISTER_OP(im2col)
-.describe(R"(Extract sliding blocks from input array.
+    .describe(R"(Extract sliding blocks from input array.
 
 This operator is used in vanilla convolution implementation to transform the sliding
 blocks on image to column matrix, then the convolution operation can be computed
@@ -98,75 +104,77 @@ block number which is the spatial size of the convolution output with same input
 Only 1-D, 2-D and 3-D of spatial dimension is supported in this operator.
 
 )" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(SlidingParser<Im2colParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-      mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape){
-  using namespace mshadow;
-  CHECK_EQ(in_shape->size(), 1U);
-  const Im2colParam& param = nnvm::get<Im2colParam>(attrs.parsed);
-  if (mxnet::op::shape_is_none(in_shape->at(0))) {
-    return false;
-  }
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(SlidingParser<Im2colParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>(
+        "FInferShape",
+        [](const nnvm::NodeAttrs& attrs,
+           mxnet::ShapeVector* in_shape,
+           mxnet::ShapeVector* out_shape) {
+          using namespace mshadow;
+          CHECK_EQ(in_shape->size(), 1U);
+          const Im2colParam& param = nnvm::get<Im2colParam>(attrs.parsed);
+          if (mxnet::op::shape_is_none(in_shape->at(0))) {
+            return false;
+          }
 
-  CHECK_GT(param.kernel.Size(), 0U) \
-    << "incorrect kernel size: " << param.kernel;
-  CHECK_GT(param.stride.Size(), 0U) \
-    << "incorrect stride size: " << param.stride;
-  CHECK_GT(param.dilate.Size(), 0U) \
-    << "incorrect dilate size: " << param.dilate;
+          CHECK_GT(param.kernel.Size(), 0U) << "incorrect kernel size: " << param.kernel;
+          CHECK_GT(param.stride.Size(), 0U) << "incorrect stride size: " << param.stride;
+          CHECK_GT(param.dilate.Size(), 0U) << "incorrect dilate size: " << param.dilate;
 
-  index_t out_dim = 1;
-  mxnet::TShape dshape(in_shape->at(0));
-  for (int i = 0; i < param.kernel.ndim(); ++i) {
-    const index_t pad_size = dshape[i + 2] + 2 * param.pad[i];
-    const index_t dilated_kernel_size = param.DilatedKernelSize(i);
-    CHECK_LE(dilated_kernel_size, pad_size)
-      << "kernel size exceed input";
-    const index_t output_size = (pad_size - dilated_kernel_size) / param.stride[i] + 1;
-    out_dim *= output_size;
-  }
-  SHAPE_ASSIGN_CHECK(*out_shape, 0, Shape3(dshape[0], dshape[1] * param.kernel.Size(), out_dim));
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-      std::vector<int> *in_type, std::vector<int> *out_type) {
-  CHECK_EQ(in_type->size(), 1U);
-  if (mxnet::op::type_is_none(in_type->at(0))) {
-    return false;
-  }
+          index_t out_dim = 1;
+          mxnet::TShape dshape(in_shape->at(0));
+          for (int i = 0; i < param.kernel.ndim(); ++i) {
+            const index_t pad_size            = dshape[i + 2] + 2 * param.pad[i];
+            const index_t dilated_kernel_size = param.DilatedKernelSize(i);
+            CHECK_LE(dilated_kernel_size, pad_size) << "kernel size exceed input";
+            const index_t output_size = (pad_size - dilated_kernel_size) / param.stride[i] + 1;
+            out_dim *= output_size;
+          }
+          SHAPE_ASSIGN_CHECK(
+              *out_shape, 0, Shape3(dshape[0], dshape[1] * param.kernel.Size(), out_dim));
+          return true;
+        })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_type,
+                                   std::vector<int>* out_type) {
+                                  CHECK_EQ(in_type->size(), 1U);
+                                  if (mxnet::op::type_is_none(in_type->at(0))) {
+                                    return false;
+                                  }
 
-  int dtype = in_type->at(0);
-  TYPE_ASSIGN_CHECK(*out_type, 0, dtype);
-  return true;
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", Im2colCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_im2col"})
-.add_argument("data", "NDArray-or-Symbol", "Input array to extract sliding blocks.")
-.add_arguments(Im2colParam::__FIELDS__());
+                                  int dtype = in_type->at(0);
+                                  TYPE_ASSIGN_CHECK(*out_type, 0, dtype);
+                                  return true;
+                                })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", Im2colCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_im2col"})
+    .add_argument("data", "NDArray-or-Symbol", "Input array to extract sliding blocks.")
+    .add_arguments(Im2colParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_im2col)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(SlidingParser<Im2colParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", Im2colGradCompute<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(SlidingParser<Im2colParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", Im2colGradCompute<cpu>);
 
 NNVM_REGISTER_OP(col2im)
-.describe(R"(Combining the output column matrix of im2col back to image array.
+    .describe(R"(Combining the output column matrix of im2col back to image array.
 
 Like :class:`~mxnet.ndarray.im2col`, this operator is also used in the vanilla convolution
 implementation. Despite the name, col2im is not the reverse operation of im2col. Since there
@@ -180,93 +188,92 @@ into output array of shape :math:`(N, C, \text{output_size}[0], \text{output_siz
 Only 1-D, 2-D and 3-D of spatial dimension is supported in this operator.
 
 )" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(SlidingParser<Col2imParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", [](const nnvm::NodeAttrs& attrs,
-      mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape){
-  using namespace mshadow;
-  CHECK_EQ(in_shape->size(), 1U);
-  const Col2imParam& param = nnvm::get<Col2imParam>(attrs.parsed);
-  if (mxnet::op::shape_is_none(in_shape->at(0))) {
-    return false;
-  }
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(SlidingParser<Col2imParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>(
+        "FInferShape",
+        [](const nnvm::NodeAttrs& attrs,
+           mxnet::ShapeVector* in_shape,
+           mxnet::ShapeVector* out_shape) {
+          using namespace mshadow;
+          CHECK_EQ(in_shape->size(), 1U);
+          const Col2imParam& param = nnvm::get<Col2imParam>(attrs.parsed);
+          if (mxnet::op::shape_is_none(in_shape->at(0))) {
+            return false;
+          }
 
-  CHECK_EQ(param.kernel.ndim(), param.output_size.ndim())
-    << "Output size must have the same number of dimensions with kernel_size,"
-    << "but kernel_size is set to " << param.kernel << " while output size is "
-    << param.output_size;
+          CHECK_EQ(param.kernel.ndim(), param.output_size.ndim())
+              << "Output size must have the same number of dimensions with kernel_size,"
+              << "but kernel_size is set to " << param.kernel << " while output size is "
+              << param.output_size;
 
-  CHECK_GT(param.output_size.Size(), 0U) \
-    << "incorrect output size: " << param.output_size;
-  CHECK_GT(param.kernel.Size(), 0U) \
-    << "incorrect kernel size: " << param.kernel;
-  CHECK_GT(param.stride.Size(), 0U) \
-    << "incorrect stride size: " << param.stride;
-  CHECK_GT(param.dilate.Size(), 0U) \
-    << "incorrect dilate size: " << param.dilate;
+          CHECK_GT(param.output_size.Size(), 0U) << "incorrect output size: " << param.output_size;
+          CHECK_GT(param.kernel.Size(), 0U) << "incorrect kernel size: " << param.kernel;
+          CHECK_GT(param.stride.Size(), 0U) << "incorrect stride size: " << param.stride;
+          CHECK_GT(param.dilate.Size(), 0U) << "incorrect dilate size: " << param.dilate;
 
-  const int spatial_size = param.kernel.ndim();
-  mxnet::TShape dshape(in_shape->at(0));
+          const int spatial_size = param.kernel.ndim();
+          mxnet::TShape dshape(in_shape->at(0));
 
-  index_t out_dim = 1;
-  for (int i = 0; i < spatial_size; ++i) {
-    const index_t pad_size = param.output_size[i] + 2 * param.pad[i];
-    const index_t dilated_kernel_size = param.DilatedKernelSize(i);
-    CHECK_LE(dilated_kernel_size, pad_size)
-      << "kernel size exceed output size";
-    const index_t output_size = (pad_size - dilated_kernel_size) / param.stride[i] + 1;
-    out_dim *= output_size;
-  }
+          index_t out_dim = 1;
+          for (int i = 0; i < spatial_size; ++i) {
+            const index_t pad_size            = param.output_size[i] + 2 * param.pad[i];
+            const index_t dilated_kernel_size = param.DilatedKernelSize(i);
+            CHECK_LE(dilated_kernel_size, pad_size) << "kernel size exceed output size";
+            const index_t output_size = (pad_size - dilated_kernel_size) / param.stride[i] + 1;
+            out_dim *= output_size;
+          }
 
-  CHECK_EQ(dshape[2], out_dim)
-    << "output size does not match convolution parameters";
-  CHECK_EQ(dshape[1] % param.kernel.Size(), 0)
-    << "the second dim of input shape should be multiples of kernel size";
+          CHECK_EQ(dshape[2], out_dim) << "output size does not match convolution parameters";
+          CHECK_EQ(dshape[1] % param.kernel.Size(), 0)
+              << "the second dim of input shape should be multiples of kernel size";
 
-  mxnet::TShape oshape(param.kernel.ndim() + 2, 1);
-  oshape[0] = dshape[0];
-  oshape[1] = dshape[1] / param.kernel.Size();
-  for (int i = 0; i < spatial_size; ++i) {
-    oshape[i + 2] = param.output_size[i];
-  }
-  SHAPE_ASSIGN_CHECK(*out_shape, 0, oshape);
-  return true;
-})
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-      std::vector<int> *in_type, std::vector<int> *out_type) {
-  CHECK_EQ(in_type->size(), 1U);
-  if (mxnet::op::type_is_none(in_type->at(0))) {
-    return false;
-  }
+          mxnet::TShape oshape(param.kernel.ndim() + 2, 1);
+          oshape[0] = dshape[0];
+          oshape[1] = dshape[1] / param.kernel.Size();
+          for (int i = 0; i < spatial_size; ++i) {
+            oshape[i + 2] = param.output_size[i];
+          }
+          SHAPE_ASSIGN_CHECK(*out_shape, 0, oshape);
+          return true;
+        })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_type,
+                                   std::vector<int>* out_type) {
+                                  CHECK_EQ(in_type->size(), 1U);
+                                  if (mxnet::op::type_is_none(in_type->at(0))) {
+                                    return false;
+                                  }
 
-  int dtype = in_type->at(0);
-  TYPE_ASSIGN_CHECK(*out_type, 0, dtype);
-  return true;
-})
-.set_attr<FCompute>("FCompute<cpu>", Col2imCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_col2im"})
-.add_argument("data", "NDArray-or-Symbol", "Input array to combine sliding blocks.")
-.add_arguments(Col2imParam::__FIELDS__());
+                                  int dtype = in_type->at(0);
+                                  TYPE_ASSIGN_CHECK(*out_type, 0, dtype);
+                                  return true;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", Col2imCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_col2im"})
+    .add_argument("data", "NDArray-or-Symbol", "Input array to combine sliding blocks.")
+    .add_arguments(Col2imParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_col2im)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(SlidingParser<Col2imParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", Col2imGradCompute<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(SlidingParser<Col2imParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", Col2imGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/im2col.cu b/src/operator/nn/im2col.cu
index 94d5b504611f..4ff3d41a8ebc 100644
--- a/src/operator/nn/im2col.cu
+++ b/src/operator/nn/im2col.cu
@@ -22,24 +22,20 @@
  * \file im2col.cu
  * \brief
  * \author Jiajun Wang
-*/
+ */
 
 #include "./im2col-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(im2col)
-.set_attr<FCompute>("FCompute<gpu>", Im2colCompute<gpu>);
+NNVM_REGISTER_OP(im2col).set_attr<FCompute>("FCompute<gpu>", Im2colCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_im2col)
-.set_attr<FCompute>("FCompute<gpu>", Im2colGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_im2col).set_attr<FCompute>("FCompute<gpu>", Im2colGradCompute<gpu>);
 
-NNVM_REGISTER_OP(col2im)
-.set_attr<FCompute>("FCompute<gpu>", Col2imCompute<gpu>);
+NNVM_REGISTER_OP(col2im).set_attr<FCompute>("FCompute<gpu>", Col2imCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_col2im)
-.set_attr<FCompute>("FCompute<gpu>", Col2imGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_col2im).set_attr<FCompute>("FCompute<gpu>", Col2imGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/im2col.h b/src/operator/nn/im2col.h
index 910a1a716acc..dc664655cc1d 100644
--- a/src/operator/nn/im2col.h
+++ b/src/operator/nn/im2col.h
@@ -86,16 +86,21 @@ inline bool is_a_ge_zero_and_a_lt_b(int a, int b) {
  * Use the wrapper function im2col() instead.
  */
 template <typename DType>
-inline void im2col_cpu(const DType* data_im, const int channels,
-    const int height, const int width, const int kernel_h, const int kernel_w,
-    const int pad_h, const int pad_w,
-    const int stride_h, const int stride_w,
-    const int dilation_h, const int dilation_w,
-    DType* data_col) {
-  const int output_h = (height + 2 * pad_h -
-    (dilation_h * (kernel_h - 1) + 1)) / stride_h + 1;
-  const int output_w = (width + 2 * pad_w -
-    (dilation_w * (kernel_w - 1) + 1)) / stride_w + 1;
+inline void im2col_cpu(const DType* data_im,
+                       const int channels,
+                       const int height,
+                       const int width,
+                       const int kernel_h,
+                       const int kernel_w,
+                       const int pad_h,
+                       const int pad_w,
+                       const int stride_h,
+                       const int stride_w,
+                       const int dilation_h,
+                       const int dilation_w,
+                       DType* data_col) {
+  const int output_h     = (height + 2 * pad_h - (dilation_h * (kernel_h - 1) + 1)) / stride_h + 1;
+  const int output_w     = (width + 2 * pad_w - (dilation_w * (kernel_w - 1) + 1)) / stride_w + 1;
   const int channel_size = height * width;
   // TODO(junwu): we tested adding openmp (w/ & w/o collapse clause) here
   // for testing the performance of convolution operator,
@@ -147,11 +152,18 @@ inline void im2col_cpu(const DType* data_im, const int channels,
  * \param data_output start pointer of the column buffer to be filled
  */
 template <typename DType>
-inline void im2col_nd_core_cpu(const DType* data_input, const bool im2col,
-    const mxnet::TShape& im_shape, const mxnet::TShape& col_shape,
-    const mxnet::TShape& kernel_shape, const mxnet::TShape& pad, const mxnet::TShape& stride,
-    const mxnet::TShape& dilation, DType* data_output, OpReqType req = mxnet::kWriteTo) {
-  if (mxnet::kNullOp == req) return;
+inline void im2col_nd_core_cpu(const DType* data_input,
+                               const bool im2col,
+                               const mxnet::TShape& im_shape,
+                               const mxnet::TShape& col_shape,
+                               const mxnet::TShape& kernel_shape,
+                               const mxnet::TShape& pad,
+                               const mxnet::TShape& stride,
+                               const mxnet::TShape& dilation,
+                               DType* data_output,
+                               OpReqType req = mxnet::kWriteTo) {
+  if (mxnet::kNullOp == req)
+    return;
   int num_spatial_axes = kernel_shape.ndim();
   if (!im2col) {
     index_t im_size = im_shape[1];  // skip batch dim
@@ -159,7 +171,7 @@ inline void im2col_nd_core_cpu(const DType* data_input, const bool im2col,
       im_size *= im_shape[2 + i];
     }
     if (mxnet::kAddTo != req) {
-      std::fill(data_output, data_output+im_size, static_cast<DType>(0));
+      std::fill(data_output, data_output + im_size, static_cast<DType>(0));
     }
   }
   index_t kernel_size = 1;
@@ -178,16 +190,16 @@ inline void im2col_nd_core_cpu(const DType* data_input, const bool im2col,
       }
       d_offset[d_i] = offset % kernel_shape[d_i];
     }
-    for (bool incremented = true; incremented; ) {
+    for (bool incremented = true; incremented;) {
       // Loop over spatial axes in forward order to compute the indices in the
       // image and column, and whether the index lies in the padding.
       index_t index_col = c_col;
-      index_t index_im = c_col / kernel_size;
-      bool is_padding = false;
+      index_t index_im  = c_col / kernel_size;
+      bool is_padding   = false;
       for (index_t d_i = 0; d_i < num_spatial_axes; ++d_i) {
         const index_t d = d_iter[d_i];
-        const int d_im = static_cast<int>(d * stride[d_i] + d_offset[d_i] * dilation[d_i])
-          - static_cast<int>(pad[d_i]);
+        const int d_im  = static_cast<int>(d * stride[d_i] + d_offset[d_i] * dilation[d_i]) -
+                         static_cast<int>(pad[d_i]);
         is_padding |= d_im < 0 || d_im >= static_cast<int>(im_shape[d_i + 2]);
         index_col *= col_shape[d_i + 1];
         index_col += d;
@@ -218,7 +230,7 @@ inline void im2col_nd_core_cpu(const DType* data_input, const bool im2col,
         }
       }
     }  // while(incremented)
-  }  // for (int c = 0; c < channels_col; ++c)
+  }    // for (int c = 0; c < channels_col; ++c)
 }
 
 /*!
@@ -234,17 +246,31 @@ inline void im2col_nd_core_cpu(const DType* data_input, const bool im2col,
  */
 template <typename DType>
 inline void im2col(mshadow::Stream<cpu>* s,
-                   const DType* data_im, const mxnet::TShape& im_shape,
-                   const mxnet::TShape& col_shape, const mxnet::TShape& kernel_shape,
-                   const mxnet::TShape& pad, const mxnet::TShape& stride,
-                   const mxnet::TShape& dilation, DType* data_col) {
+                   const DType* data_im,
+                   const mxnet::TShape& im_shape,
+                   const mxnet::TShape& col_shape,
+                   const mxnet::TShape& kernel_shape,
+                   const mxnet::TShape& pad,
+                   const mxnet::TShape& stride,
+                   const mxnet::TShape& dilation,
+                   DType* data_col) {
   if (2 == kernel_shape.ndim()) {
-    im2col_cpu(data_im, im_shape[1], im_shape[2], im_shape[3],
-               kernel_shape[0], kernel_shape[1], pad[0], pad[1],
-               stride[0], stride[1], dilation[0], dilation[1], data_col);
+    im2col_cpu(data_im,
+               im_shape[1],
+               im_shape[2],
+               im_shape[3],
+               kernel_shape[0],
+               kernel_shape[1],
+               pad[0],
+               pad[1],
+               stride[0],
+               stride[1],
+               dilation[0],
+               dilation[1],
+               data_col);
   } else {
-    im2col_nd_core_cpu(data_im, true, im_shape, col_shape,
-                       kernel_shape, pad, stride, dilation, data_col);
+    im2col_nd_core_cpu(
+        data_im, true, im_shape, col_shape, kernel_shape, pad, stride, dilation, data_col);
   }
 }
 
@@ -253,20 +279,27 @@ inline void im2col(mshadow::Stream<cpu>* s,
  * DO NOT call this function directly. Use wrapper function col2im() instead.
  */
 template <typename DType>
-inline void col2im_cpu(const DType* data_col, const int channels,
-    const int height, const int width, const int kernel_h, const int kernel_w,
-    const int pad_h, const int pad_w,
-    const int stride_h, const int stride_w,
-    const int dilation_h, const int dilation_w,
-    DType* data_im, OpReqType req) {
-  if (mxnet::kNullOp == req) return;
+inline void col2im_cpu(const DType* data_col,
+                       const int channels,
+                       const int height,
+                       const int width,
+                       const int kernel_h,
+                       const int kernel_w,
+                       const int pad_h,
+                       const int pad_w,
+                       const int stride_h,
+                       const int stride_w,
+                       const int dilation_h,
+                       const int dilation_w,
+                       DType* data_im,
+                       OpReqType req) {
+  if (mxnet::kNullOp == req)
+    return;
   if (mxnet::kAddTo != req) {
-    std::fill(data_im, data_im+height*width*channels, static_cast<DType>(0));
+    std::fill(data_im, data_im + height * width * channels, static_cast<DType>(0));
   }
-  const int output_h = (height + 2 * pad_h -
-    (dilation_h * (kernel_h - 1) + 1)) / stride_h + 1;
-  const int output_w = (width + 2 * pad_w -
-    (dilation_w * (kernel_w - 1) + 1)) / stride_w + 1;
+  const int output_h     = (height + 2 * pad_h - (dilation_h * (kernel_h - 1) + 1)) / stride_h + 1;
+  const int output_w     = (width + 2 * pad_w - (dilation_w * (kernel_w - 1) + 1)) / stride_w + 1;
   const int channel_size = height * width;
   // TODO(junwu): we tested adding openmp (w/ & w/o collapse clause) here
   // for testing the performance of convolution operator,
@@ -315,18 +348,34 @@ inline void col2im_cpu(const DType* data_col, const int channels,
  */
 template <typename DType>
 inline void col2im(mshadow::Stream<cpu>* s,
-                   const DType* data_col, const mxnet::TShape& im_shape,
-                   const mxnet::TShape& col_shape, const mxnet::TShape& kernel_shape,
-                   const mxnet::TShape& pad, const mxnet::TShape& stride,
-                   const mxnet::TShape& dilation, DType* data_im, OpReqType req) {
+                   const DType* data_col,
+                   const mxnet::TShape& im_shape,
+                   const mxnet::TShape& col_shape,
+                   const mxnet::TShape& kernel_shape,
+                   const mxnet::TShape& pad,
+                   const mxnet::TShape& stride,
+                   const mxnet::TShape& dilation,
+                   DType* data_im,
+                   OpReqType req) {
   int num_spatial_axes = kernel_shape.ndim();
   if (2 == num_spatial_axes) {
-    col2im_cpu(data_col, im_shape[1], im_shape[2], im_shape[3],
-               kernel_shape[0], kernel_shape[1], pad[0], pad[1],
-               stride[0], stride[1], dilation[0], dilation[1], data_im, req);
+    col2im_cpu(data_col,
+               im_shape[1],
+               im_shape[2],
+               im_shape[3],
+               kernel_shape[0],
+               kernel_shape[1],
+               pad[0],
+               pad[1],
+               stride[0],
+               stride[1],
+               dilation[0],
+               dilation[1],
+               data_im,
+               req);
   } else {
-    im2col_nd_core_cpu(data_col, false, im_shape, col_shape,
-                       kernel_shape, pad, stride, dilation, data_im, req);
+    im2col_nd_core_cpu(
+        data_col, false, im_shape, col_shape, kernel_shape, pad, stride, dilation, data_im, req);
   }
 }
 
diff --git a/src/operator/nn/layer_norm-inl.h b/src/operator/nn/layer_norm-inl.h
index b55ef292cb9d..2ae1b4367669 100644
--- a/src/operator/nn/layer_norm-inl.h
+++ b/src/operator/nn/layer_norm-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file layer_norm-inl.h
  * \brief Implements Ba et. al, Layer Normalization (https://arxiv.org/abs/1607.06450).
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_LAYER_NORM_INL_H_
 #define MXNET_OPERATOR_NN_LAYER_NORM_INL_H_
 
@@ -44,10 +44,10 @@ namespace mxnet {
 namespace op {
 
 namespace layernorm {
-enum LayerNormOpInputs {kData, kGamma, kBeta};  // kGamma: scaling parameters, kBeta: shift biases
-enum LayerNormOpOutputs {kOut, kMean, kStd};  // indices for req, out_data
-enum LayerNormOpInputsBwd {kBwdOutGrad, kBwdData, kBwdGamma, kBwdMean, kBwdStd, kBwdBeta};
-enum LayerNormOpOutputsBwd {kBwdDataGrad, kBwdGammaGrad, kBwdBetaGrad};
+enum LayerNormOpInputs { kData, kGamma, kBeta };  // kGamma: scaling parameters, kBeta: shift biases
+enum LayerNormOpOutputs { kOut, kMean, kStd };    // indices for req, out_data
+enum LayerNormOpInputsBwd { kBwdOutGrad, kBwdData, kBwdGamma, kBwdMean, kBwdStd, kBwdBeta };
+enum LayerNormOpOutputsBwd { kBwdDataGrad, kBwdGammaGrad, kBwdBetaGrad };
 }  // namespace layernorm
 
 struct LayerNormParam : public dmlc::Parameter<LayerNormParam> {
@@ -55,22 +55,23 @@ struct LayerNormParam : public dmlc::Parameter<LayerNormParam> {
   float eps;
   bool output_mean_var;
   DMLC_DECLARE_PARAMETER(LayerNormParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(-1)
-      .describe("The axis to perform layer normalization. "
-                "Usually, this should be be axis of the channel dimension. "
-                "Negative values means indexing from right to left.");
-    DMLC_DECLARE_FIELD(eps).set_default(1e-5f)
-      .describe("An `epsilon` parameter to prevent division by 0.");
-    DMLC_DECLARE_FIELD(output_mean_var).set_default(false)
-      .describe("Output the mean and std calculated along the given axis.");
+    DMLC_DECLARE_FIELD(axis).set_default(-1).describe(
+        "The axis to perform layer normalization. "
+        "Usually, this should be be axis of the channel dimension. "
+        "Negative values means indexing from right to left.");
+    DMLC_DECLARE_FIELD(eps).set_default(1e-5f).describe(
+        "An `epsilon` parameter to prevent division by 0.");
+    DMLC_DECLARE_FIELD(output_mean_var)
+        .set_default(false)
+        .describe("Output the mean and std calculated along the given axis.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, eps_s, output_mean_var_s;
     axis_s << axis;
     eps_s << eps;
     output_mean_var_s << output_mean_var;
-    (*dict)["axis"] = axis_s.str();
-    (*dict)["eps"] = eps_s.str();
+    (*dict)["axis"]            = axis_s.str();
+    (*dict)["eps"]             = eps_s.str();
     (*dict)["output_mean_var"] = output_mean_var_s.str();
   }
 
@@ -84,26 +85,29 @@ inline int GetRealAxis(int axis, int ndim) {
   return axis < 0 ? (axis + ndim) : axis;
 }
 
-template<typename xpu>
+template <typename xpu>
 void LayerNormCompute(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx, const std::vector<TBlob>& inputs,
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs);
 
-template<typename xpu>
+template <typename xpu>
 void LayerNormComputeGeneral(const nnvm::NodeAttrs& attrs,
-                             const OpContext& ctx, const std::vector<TBlob>& inputs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
                              const std::vector<OpReqType>& req,
                              const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   CHECK_NE(req[0], kAddTo);
   int axis = GetRealAxis(param.axis, inputs[0].ndim());
   CHECK(axis >= 0 && axis < inputs[0].ndim()) << "Channel axis out of range: " << param.axis;
   CHECK_EQ(inputs.size(), 3U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // Reshape gamma and beta to be broadcastable
   mxnet::TShape new_param_shape(inputs[0].shape_.begin(), inputs[0].shape_.end());
   for (int i = 0; i < inputs[0].ndim(); i++) {
@@ -112,27 +116,28 @@ void LayerNormComputeGeneral(const nnvm::NodeAttrs& attrs,
     }
   }
   const TBlob gamma = inputs[1].reshape(new_param_shape);
-  const TBlob beta = inputs[2].reshape(new_param_shape);
+  const TBlob beta  = inputs[2].reshape(new_param_shape);
   // Compute necessary data for the reduce operation.
   mxnet::TShape red_src_shape, red_dst_shape;
-  BroadcastReduceShapeCompact(inputs[0].shape_, outputs[layernorm::kMean].shape_,
-                              &red_src_shape, &red_dst_shape);
-  const TBlob in_data = inputs[0].reshape(red_src_shape);
+  BroadcastReduceShapeCompact(
+      inputs[0].shape_, outputs[layernorm::kMean].shape_, &red_src_shape, &red_dst_shape);
+  const TBlob in_data   = inputs[0].reshape(red_src_shape);
   const TBlob mean_data = outputs[layernorm::kMean].reshape(red_dst_shape);
-  const TBlob std_data = outputs[layernorm::kStd].reshape(red_dst_shape);
-  int channel_size = red_src_shape.Size() / red_dst_shape.Size();
+  const TBlob std_data  = outputs[layernorm::kStd].reshape(red_dst_shape);
+  int channel_size      = red_src_shape.Size() / red_dst_shape.Size();
   // Initialize the workspace
   Tensor<xpu, 1, char> workspace;
-  size_t workspace_size = broadcast::ReduceWorkspaceSize(s, mean_data.shape_, req[0],
-                                                         in_data.shape_);
+  size_t workspace_size =
+      broadcast::ReduceWorkspaceSize(s, mean_data.shape_, req[0], in_data.shape_);
   workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 
 #if !defined(__CUDACC__)
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && inputs[0].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for float16 inputs for LayerNorm. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for float16 inputs for LayerNorm. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
 
   // Calculate mean
@@ -140,94 +145,103 @@ void LayerNormComputeGeneral(const nnvm::NodeAttrs& attrs,
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
       if (!safe_acc) {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, false>(
-          s, mean_data, req[0], workspace, in_data);
+            s, mean_data, req[0], workspace, in_data);
       } else {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, true>(
-          s, mean_data, req[0], workspace, in_data);
+            s, mean_data, req[0], workspace, in_data);
       }
       Tensor<xpu, 1, DType> mean_data_tensor = mean_data.FlatTo1D<xpu, DType>(s);
       mean_data_tensor /= scalar<DType>(channel_size);
     });
   });
   // Calculate data = data - mean
-  BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(attrs, ctx,
-                                                     {inputs[0], outputs[layernorm::kMean]},
-                                                     {kWriteTo}, {outputs[0]});
+  BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(
+      attrs, ctx, {inputs[0], outputs[layernorm::kMean]}, {kWriteTo}, {outputs[0]});
   // Calculate std
   const TBlob centered_out = outputs[0].reshape(red_src_shape);
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
       if (!safe_acc) {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::square, false>(
-          s, std_data, req[0], workspace, centered_out);
+            s, std_data, req[0], workspace, centered_out);
       } else {
         broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::square, true>(
-          s, std_data, req[0], workspace, centered_out);
+            s, std_data, req[0], workspace, centered_out);
       }
       Tensor<xpu, 1, DType> std_data_tensor = std_data.FlatTo1D<xpu, DType>(s);
-      std_data_tensor = F<mshadow_op::square_root>(std_data_tensor / scalar<DType>(channel_size)
-                        + scalar<DType>(param.eps));
+      std_data_tensor = F<mshadow_op::square_root>(std_data_tensor / scalar<DType>(channel_size) +
+                                                   scalar<DType>(param.eps));
     });
   });
   // Calculate data = data / std
-  BinaryBroadcastCompute<xpu, mshadow_op::div>(attrs, ctx,
-                                               {outputs[0], outputs[layernorm::kStd]},
-                                               {kWriteTo}, {outputs[0]});
+  BinaryBroadcastCompute<xpu, mshadow_op::div>(
+      attrs, ctx, {outputs[0], outputs[layernorm::kStd]}, {kWriteTo}, {outputs[0]});
   // Calculate data = data * gamma
-  BinaryBroadcastCompute<xpu, mshadow_op::mul>(attrs, ctx,
-                                               {outputs[0], gamma},
-                                               {kWriteTo}, {outputs[0]});
+  BinaryBroadcastCompute<xpu, mshadow_op::mul>(
+      attrs, ctx, {outputs[0], gamma}, {kWriteTo}, {outputs[0]});
   // Calculate data = data + beta
-  BinaryBroadcastCompute<xpu, mshadow_op::plus>(attrs, ctx,
-                                                {outputs[0], beta},
-                                                {kWriteTo}, {outputs[0]});
+  BinaryBroadcastCompute<xpu, mshadow_op::plus>(
+      attrs, ctx, {outputs[0], beta}, {kWriteTo}, {outputs[0]});
 #else
   // Calculate mean
   BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-    broadcast::RTCReduce(ctx, mean_data, req[0], workspace, in_data,
-                         "red::sum{}", NDim, "identity");
+    broadcast::RTCReduce(
+        ctx, mean_data, req[0], workspace, in_data, "red::sum{}", NDim, "identity");
   });
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Tensor<xpu, 1, DType> mean_data_tensor = mean_data.FlatTo1D<xpu, DType>(s);
-      mean_data_tensor /= scalar<DType>(channel_size);
+    Tensor<xpu, 1, DType> mean_data_tensor = mean_data.FlatTo1D<xpu, DType>(s);
+    mean_data_tensor /= scalar<DType>(channel_size);
   });
   // Calculate data = data - mean
-  BinaryBroadcastRTCCompute {"sub"}(attrs, ctx,
-                                    {inputs[0], outputs[layernorm::kMean]},
-                                    {kWriteTo}, {outputs[0]});
+  BinaryBroadcastRTCCompute{"sub"}(  // NOLINT
+      attrs,
+      ctx,
+      {inputs[0], outputs[layernorm::kMean]},
+      {kWriteTo},
+      {outputs[0]});
   // Calculate std
   const TBlob centered_out = outputs[0].reshape(red_src_shape);
   BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-    broadcast::RTCReduce(ctx, std_data, req[0], workspace, centered_out,
-                         "red::sum{}", NDim, "square");
+    broadcast::RTCReduce(
+        ctx, std_data, req[0], workspace, centered_out, "red::sum{}", NDim, "square");
   });
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     Tensor<xpu, 1, DType> std_data_tensor = std_data.FlatTo1D<xpu, DType>(s);
-    std_data_tensor = F<mshadow_op::square_root>(std_data_tensor / scalar<DType>(channel_size)
-                      + scalar<DType>(param.eps));
+    std_data_tensor = F<mshadow_op::square_root>(std_data_tensor / scalar<DType>(channel_size) +
+                                                 scalar<DType>(param.eps));
   });
   // Calculate data = data / std
-  BinaryBroadcastRTCCompute {"div"}(attrs, ctx,
-                                    {outputs[0], outputs[layernorm::kStd]},
-                                    {kWriteTo}, {outputs[0]});
+  BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+      attrs,
+      ctx,
+      {outputs[0], outputs[layernorm::kStd]},
+      {kWriteTo},
+      {outputs[0]});
   // Calculate data = data * gamma
-  BinaryBroadcastRTCCompute {"mul"}(attrs, ctx,
-                                    {outputs[0], gamma},
-                                    {kWriteTo}, {outputs[0]});
+  BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+      attrs,
+      ctx,
+      {outputs[0], gamma},
+      {kWriteTo},
+      {outputs[0]});
   // Calculate data = data + beta
-  BinaryBroadcastRTCCompute {"add"}(attrs, ctx,
-                                    {outputs[0], beta},
-                                    {kWriteTo}, {outputs[0]});
+  BinaryBroadcastRTCCompute{"add"}(  // NOLINT
+      attrs,
+      ctx,
+      {outputs[0], beta},
+      {kWriteTo},
+      {outputs[0]});
 #endif
 }
 
-template<typename xpu>
+template <typename xpu>
 void LayerNormGradCompute(const nnvm::NodeAttrs& attrs,
-                          const OpContext& ctx, const std::vector<TBlob>& inputs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs);
 
-template<typename xpu>
+template <typename xpu>
 void LayerNormGradComputeGeneralImpl(const nnvm::NodeAttrs& attrs,
                                      const OpContext& ctx,
                                      const TBlob& ograd,
@@ -257,9 +271,10 @@ grad_gamma = sum(\bar{x} og, exclude_axis)
 grad_beta = sum(og, exclude_axis)
 grad_x = w - mean(w, axis) - \bar{x} * mean(w * \bar{x}, axis)
 */
-template<typename xpu>
+template <typename xpu>
 void LayerNormGradComputeGeneral(const nnvm::NodeAttrs& attrs,
-                                 const OpContext& ctx, const std::vector<TBlob>& inputs,
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
                                  const std::vector<OpReqType>& req,
                                  const std::vector<TBlob>& outputs) {
   using namespace mshadow;
@@ -270,12 +285,12 @@ void LayerNormGradComputeGeneral(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 5U);
 #endif
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
-  int axis = param.axis;
+  int axis                    = param.axis;
   if (axis < 0) {
     axis += inputs[0].ndim();
   }
   CHECK(axis >= 0 && axis < inputs[0].ndim()) << "Channel axis out of range: " << param.axis;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // Reshape gamma to be broadcastable
   mxnet::TShape new_param_shape(inputs[0].shape_.begin(), inputs[0].shape_.end());
   for (int i = 0; i < inputs[0].ndim(); i++) {
@@ -284,41 +299,62 @@ void LayerNormGradComputeGeneral(const nnvm::NodeAttrs& attrs,
     }
   }
   const TBlob ograd = inputs[0];
-  const TBlob data = inputs[1];
+  const TBlob data  = inputs[1];
   const TBlob gamma = inputs[2].reshape(new_param_shape);
-  const TBlob mean = inputs[3];
-  const TBlob std = inputs[4];
+  const TBlob mean  = inputs[3];
+  const TBlob std   = inputs[4];
   // Prepare the necessary shapes for reduction
   mxnet::TShape red_src_shape, red_dst_shape, red_exclude_src_shape, red_exclude_dst_shape;
   BroadcastReduceShapeCompact(ograd.shape_, mean.shape_, &red_src_shape, &red_dst_shape);
-  BroadcastReduceShapeCompact(ograd.shape_, gamma.shape_,
-                              &red_exclude_src_shape, &red_exclude_dst_shape);
+  BroadcastReduceShapeCompact(
+      ograd.shape_, gamma.shape_, &red_exclude_src_shape, &red_exclude_dst_shape);
   int channel_size = red_src_shape.Size() / red_dst_shape.Size();
   // Initialize the workspace + Construct the temporary TBlobs
   Tensor<xpu, 1, char> workspace;
-  size_t dtype_size = common::mshadow_type_info(outputs[0].type_flag_).size;
-  size_t data_size = data.Size() * dtype_size;
+  size_t dtype_size   = common::mshadow_type_info(outputs[0].type_flag_).size;
+  size_t data_size    = data.Size() * dtype_size;
   size_t red_out_size = mean.Size() * dtype_size;
   // There are two types of reduction workloads: reduce over axis and reduce exclude axis
   // We take the maximum of the workspace sizes required by these workloads.
   // Also, we explicitly set the req_type=kAddto in case we want to use it.
-  size_t reduce_workspace_size =
-      std::max(broadcast::ReduceWorkspaceSize(s, red_dst_shape,
-                                              kAddTo, red_src_shape),
-               broadcast::ReduceWorkspaceSize(s, red_exclude_dst_shape, kAddTo,
-                                              red_exclude_src_shape));
+  size_t reduce_workspace_size = std::max(
+      broadcast::ReduceWorkspaceSize(s, red_dst_shape, kAddTo, red_src_shape),
+      broadcast::ReduceWorkspaceSize(s, red_exclude_dst_shape, kAddTo, red_exclude_src_shape));
   workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
-    Shape1(reduce_workspace_size + data_size * 2 + red_out_size), s);
+      Shape1(reduce_workspace_size + data_size * 2 + red_out_size), s);
   const TBlob normalized_data = TBlob(workspace.dptr_ + reduce_workspace_size,
-                                      data.shape_, data.dev_mask(), data.type_flag_, data.dev_id());
-  const TBlob ograd_mult = TBlob(workspace.dptr_ + reduce_workspace_size + data_size,
-                                 ograd.shape_, ograd.dev_mask(), ograd.type_flag_, ograd.dev_id());
-  const TBlob red_out = TBlob(workspace.dptr_ + reduce_workspace_size + data_size * 2,
-                              mean.shape_, mean.dev_mask(), mean.type_flag_, mean.dev_id());
+                                      data.shape_,
+                                      data.dev_mask(),
+                                      data.type_flag_,
+                                      data.dev_id());
+  const TBlob ograd_mult      = TBlob(workspace.dptr_ + reduce_workspace_size + data_size,
+                                 ograd.shape_,
+                                 ograd.dev_mask(),
+                                 ograd.type_flag_,
+                                 ograd.dev_id());
+  const TBlob red_out         = TBlob(workspace.dptr_ + reduce_workspace_size + data_size * 2,
+                              mean.shape_,
+                              mean.dev_mask(),
+                              mean.type_flag_,
+                              mean.dev_id());
 
-  LayerNormGradComputeGeneralImpl(attrs, ctx, ograd, data, gamma, mean, std, normalized_data,
-                                  ograd_mult, red_out, req, outputs, workspace, red_dst_shape,
-                                  red_src_shape, red_exclude_dst_shape, red_exclude_src_shape,
+  LayerNormGradComputeGeneralImpl(attrs,
+                                  ctx,
+                                  ograd,
+                                  data,
+                                  gamma,
+                                  mean,
+                                  std,
+                                  normalized_data,
+                                  ograd_mult,
+                                  red_out,
+                                  req,
+                                  outputs,
+                                  workspace,
+                                  red_dst_shape,
+                                  red_src_shape,
+                                  red_exclude_dst_shape,
+                                  red_exclude_src_shape,
                                   channel_size);
 }
 
diff --git a/src/operator/nn/layer_norm.cc b/src/operator/nn/layer_norm.cc
index 4e8a80e74ad8..bfa0ad91c4f4 100644
--- a/src/operator/nn/layer_norm.cc
+++ b/src/operator/nn/layer_norm.cc
@@ -23,17 +23,17 @@
  *
  * Copyright (c) 2016 Marcin Junczys-Dowmunt, the University of Edinburgh, Adam
  * Mickiewicz University
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice shall be included in
  * all copies or substantial portions of the Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
@@ -41,7 +41,7 @@
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  * IN THE SOFTWARE.
- * 
+ *
  * All or part of this file was contributed by Intel under license:
  *   Copyright (C) 2017-2018 Intel Corporation
  *   SPDX-License-Identifier: MIT
@@ -52,7 +52,7 @@
  * Copyright (c) 2015 by Contributors
  * \file layer_norm.cc
  * \brief Implements Ba et. al, Layer Normalization (https://arxiv.org/abs/1607.06450).
-*/
+ */
 
 #include "layer_norm-inl.h"
 #include <nnvm/op_attr_types.h>
@@ -72,30 +72,25 @@ namespace op {
 DMLC_REGISTER_PARAMETER(LayerNormParam);
 
 static bool LayerNormShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_shape,
-                           mxnet::ShapeVector *out_shape) {
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 3U) << "Input:[data, gamma, beta]";
-  const mxnet::TShape &dshape = in_shape->at(layernorm::kData);
+  const mxnet::TShape& dshape = in_shape->at(layernorm::kData);
   if (!mxnet::ndim_is_known(dshape)) {
     return false;
   }
 
   int axis = GetRealAxis(param.axis, dshape.ndim());
-  CHECK(axis >= 0 && axis < dshape.ndim())
-    << "Channel axis out of range: axis=" << param.axis;
+  CHECK(axis >= 0 && axis < dshape.ndim()) << "Channel axis out of range: axis=" << param.axis;
 
   const index_t channelCount = dshape[axis];
 
-  SHAPE_ASSIGN_CHECK(*in_shape,
-                     layernorm::kGamma,
-                     mxnet::TShape(Shape1(channelCount)));
-  SHAPE_ASSIGN_CHECK(*in_shape,
-                     layernorm::kBeta,
-                     mxnet::TShape(Shape1(channelCount)));
+  SHAPE_ASSIGN_CHECK(*in_shape, layernorm::kGamma, mxnet::TShape(Shape1(channelCount)));
+  SHAPE_ASSIGN_CHECK(*in_shape, layernorm::kBeta, mxnet::TShape(Shape1(channelCount)));
   out_shape->clear();
-  out_shape->push_back(dshape);                // kOut
+  out_shape->push_back(dshape);  // kOut
   mxnet::TShape moments_shape(dshape.begin(), dshape.end());
   moments_shape[axis] = 1;
   out_shape->push_back(moments_shape);  // kMean
@@ -110,7 +105,7 @@ static bool LayerNormShape(const nnvm::NodeAttrs& attrs,
  *   efficient to use on the CPU, so use float for reduction of half_t.
  *
  * width is the number of values being summed to compute a mean.
- * instances is how many independent layer normalization problems are packed into the tensors. 
+ * instances is how many independent layer normalization problems are packed into the tensors.
  *
  * Inputs:
  * data is instances x width
@@ -123,26 +118,25 @@ static bool LayerNormShape(const nnvm::NodeAttrs& attrs,
  * std is instances: standard deviation of each problem
  *
  */
-template <typename Data, typename Accum = typename
-            /* By default accumulate in float32 for float16.  Otherwise use same type. */
-            std::conditional<std::is_same<mshadow::half::half_t, Data>::value,
-                             float,
-                             Data>::type>
+template <typename Data,
+          typename Accum = typename
+          /* By default accumulate in float32 for float16.  Otherwise use same type. */
+          std::conditional<std::is_same<mshadow::half::half_t, Data>::value, float, Data>::type>
 void LayerNormCPUKernel(size_t width,
                         size_t instances,
                         Data eps,
-                        const Data *data,
-                        const Data *gamma,
-                        const Data *beta,
-                        Data *out,
-                        Data *mean,
-                        Data *std) {
+                        const Data* data,
+                        const Data* gamma,
+                        const Data* beta,
+                        Data* out,
+                        Data* mean,
+                        Data* std) {
   // Parallelize over independent instances to normalize.
   // MSVC says index variable in OpenMP 'for' statement must have signed integral type.
   const mshadow::index_t signed_instances = static_cast<mshadow::index_t>(instances);
 #pragma omp parallel for
   for (nnvm::dim_t j = 0; j < signed_instances; ++j) {
-    const Data *from = data + j * width;
+    const Data* from = data + j * width;
 
     // Sum the values to compute mean.
     Accum sum = 0.f;
@@ -151,7 +145,7 @@ void LayerNormCPUKernel(size_t width,
       sum += from[i];
     }
     Accum mean_value = sum / width;
-    mean[j] = static_cast<Data>(mean_value);
+    mean[j]          = static_cast<Data>(mean_value);
 
     // Sum squares from mean to compute stddev.
     Accum squares = 0.f;
@@ -161,10 +155,10 @@ void LayerNormCPUKernel(size_t width,
       squares += off * off;
     }
     Accum sigma = std::sqrt(squares / width + eps);
-    std[j] = static_cast<Data>(sigma);
+    std[j]      = static_cast<Data>(sigma);
 
     // Write normalized values.
-    Data *to = out + j * width;
+    Data* to        = out + j * width;
     Accum inv_sigma = 1.f / sigma;
 #pragma omp simd
     for (size_t i = 0; i < width; ++i) {
@@ -177,7 +171,8 @@ void LayerNormCPUKernel(size_t width,
  * is able to run.
  */
 bool LayerNormCPU(const nnvm::NodeAttrs& attrs,
-                  const OpContext& ctx, const std::vector<TBlob>& inputs,
+                  const OpContext& ctx,
+                  const std::vector<TBlob>& inputs,
                   const std::vector<OpReqType>& req,
                   const std::vector<TBlob>& outputs) {
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
@@ -201,16 +196,15 @@ bool LayerNormCPU(const nnvm::NodeAttrs& attrs,
     return false;
   }
   MSHADOW_REAL_TYPE_SWITCH(inputs[layernorm::kData].type_flag_, DType, {
-    LayerNormCPUKernel<DType>(
-        inputs[layernorm::kData].shape_[axis],
-        outputs[layernorm::kMean].Size(),
-        param.eps,
-        inputs[layernorm::kData].dptr<DType>(),
-        inputs[layernorm::kGamma].dptr<DType>(),
-        inputs[layernorm::kBeta].dptr<DType>(),
-        outputs[layernorm::kOut].dptr<DType>(),
-        outputs[layernorm::kMean].dptr<DType>(),
-        outputs[layernorm::kStd].dptr<DType>());
+    LayerNormCPUKernel<DType>(inputs[layernorm::kData].shape_[axis],
+                              outputs[layernorm::kMean].Size(),
+                              param.eps,
+                              inputs[layernorm::kData].dptr<DType>(),
+                              inputs[layernorm::kGamma].dptr<DType>(),
+                              inputs[layernorm::kBeta].dptr<DType>(),
+                              outputs[layernorm::kOut].dptr<DType>(),
+                              outputs[layernorm::kMean].dptr<DType>(),
+                              outputs[layernorm::kStd].dptr<DType>());
   });
   return true;
 }
@@ -223,7 +217,8 @@ bool LayerNormComputeMKL(const nnvm::NodeAttrs& attrs,
                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
-  if (req[0] == kNullOp) return true;
+  if (req[0] == kNullOp)
+    return true;
   CHECK_NE(req[0], kAddTo);
   CHECK_EQ(inputs.size(), 3U);
   int axis = GetRealAxis(param.axis, inputs[0].ndim());
@@ -233,17 +228,20 @@ bool LayerNormComputeMKL(const nnvm::NodeAttrs& attrs,
       (inputs[0].type_flag_ == kFloat32 || inputs[0].type_flag_ == kFloat64)) {
     // Compute necessary data for the reduce operation.
     mxnet::TShape red_src_shape, red_dst_shape;
-    BroadcastReduceShapeCompact(inputs[layernorm::kData].shape_, outputs[layernorm::kMean].shape_,
-                                &red_src_shape, &red_dst_shape);
-    const TBlob in_data = inputs[layernorm::kData].reshape(red_src_shape);
-    const TBlob mean_data = outputs[layernorm::kMean].reshape(red_dst_shape);
-    const TBlob std_data = outputs[layernorm::kStd].reshape(red_dst_shape);
-    const int outter_size = red_dst_shape.Size();
+    BroadcastReduceShapeCompact(inputs[layernorm::kData].shape_,
+                                outputs[layernorm::kMean].shape_,
+                                &red_src_shape,
+                                &red_dst_shape);
+    const TBlob in_data    = inputs[layernorm::kData].reshape(red_src_shape);
+    const TBlob mean_data  = outputs[layernorm::kMean].reshape(red_dst_shape);
+    const TBlob std_data   = outputs[layernorm::kStd].reshape(red_dst_shape);
+    const int outter_size  = red_dst_shape.Size();
     const int channel_size = red_src_shape.Size() / red_dst_shape.Size();
 
     // call
     MSHADOW_SGL_DBL_TYPE_SWITCH(in_data.type_flag_, DType, {
-      mkl_func::LayerNormLastDim(outter_size, channel_size,
+      mkl_func::LayerNormLastDim(outter_size,
+                                 channel_size,
                                  in_data.dptr<DType>(),
                                  outputs[layernorm::kOut].dptr<DType>(),
                                  inputs[layernorm::kGamma].dptr<DType>(),
@@ -260,15 +258,18 @@ bool LayerNormComputeMKL(const nnvm::NodeAttrs& attrs,
 }
 #endif
 
-template<>
+template <>
 void LayerNormCompute<cpu>(const nnvm::NodeAttrs& attrs,
-                           const OpContext& ctx, const std::vector<TBlob>& inputs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
 #if MSHADOW_USE_MKL == 1 && MXNET_USE_MKL_LAYERNORM == 1
-  if (LayerNormComputeMKL(attrs, ctx, inputs, req, outputs)) return;
+  if (LayerNormComputeMKL(attrs, ctx, inputs, req, outputs))
+    return;
 #endif
-  if (LayerNormCPU(attrs, ctx, inputs, req, outputs)) return;
+  if (LayerNormCPU(attrs, ctx, inputs, req, outputs))
+    return;
   LayerNormComputeGeneral<cpu>(attrs, ctx, inputs, req, outputs);
 }
 
@@ -293,14 +294,12 @@ void LayerNormGradComputeGeneralImpl<cpu>(const nnvm::NodeAttrs& attrs,
                                           const int channel_size) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<cpu> *s = ctx.get_stream<cpu>();
+  Stream<cpu>* s = ctx.get_stream<cpu>();
   // Compute normalized_data = (data - mean) / std
-  BinaryBroadcastCompute<cpu, mshadow_op::minus>(attrs, ctx,
-                                                 {data, mean},
-                                                 {kWriteTo}, {normalized_data});
-  BinaryBroadcastCompute<cpu, mshadow_op::div>(attrs, ctx,
-                                               {normalized_data, std},
-                                               {kWriteTo}, {normalized_data});
+  BinaryBroadcastCompute<cpu, mshadow_op::minus>(
+      attrs, ctx, {data, mean}, {kWriteTo}, {normalized_data});
+  BinaryBroadcastCompute<cpu, mshadow_op::div>(
+      attrs, ctx, {normalized_data, std}, {kWriteTo}, {normalized_data});
   // Calculate grad_beta
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (req[2] != kNullOp) {
@@ -308,30 +307,42 @@ void LayerNormGradComputeGeneralImpl<cpu>(const nnvm::NodeAttrs& attrs,
       BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
         if (!safe_acc) {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, false>(
-            s, outputs[2].reshape(red_exclude_dst_shape), req[2], workspace,
-            ograd.reshape(red_exclude_src_shape));
+              s,
+              outputs[2].reshape(red_exclude_dst_shape),
+              req[2],
+              workspace,
+              ograd.reshape(red_exclude_src_shape));
         } else {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, true>(
-            s, outputs[2].reshape(red_exclude_dst_shape), req[2], workspace,
-            ograd.reshape(red_exclude_src_shape));
+              s,
+              outputs[2].reshape(red_exclude_dst_shape),
+              req[2],
+              workspace,
+              ograd.reshape(red_exclude_src_shape));
         }
       });
     });
   }
   // Calculate grad_gamma, it will be sum(ograd * normalized_data, exclude_axis)
-  ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::mul>(attrs, ctx, {normalized_data, ograd},
-                                                      {kWriteTo}, {ograd_mult});
+  ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::mul>(
+      attrs, ctx, {normalized_data, ograd}, {kWriteTo}, {ograd_mult});
   if (req[1] != kNullOp) {
     MSHADOW_REAL_TYPE_SWITCH(outputs[1].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
         if (!safe_acc) {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, false>(
-            s, outputs[1].reshape(red_exclude_dst_shape), req[1], workspace,
-            ograd_mult.reshape(red_exclude_src_shape));
+              s,
+              outputs[1].reshape(red_exclude_dst_shape),
+              req[1],
+              workspace,
+              ograd_mult.reshape(red_exclude_src_shape));
         } else {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, true>(
-            s, outputs[1].reshape(red_exclude_dst_shape), req[1], workspace,
-            ograd_mult.reshape(red_exclude_src_shape));
+              s,
+              outputs[1].reshape(red_exclude_dst_shape),
+              req[1],
+              workspace,
+              ograd_mult.reshape(red_exclude_src_shape));
         }
       });
     });
@@ -341,56 +352,65 @@ void LayerNormGradComputeGeneralImpl<cpu>(const nnvm::NodeAttrs& attrs,
   //   grad_data = ograd_mult - mean(ograd_mult, axis)
   //               + normalized_data * (-mean(normalized_data * ograd_mult, axis))
   if (req[0] != kNullOp) {
-    BinaryBroadcastCompute<cpu, op::mshadow_op::mul>(attrs, ctx,
-                                                    {ograd, gamma},
-                                                    {kWriteTo}, {ograd_mult});
-    BinaryBroadcastCompute<cpu, op::mshadow_op::div>(attrs, ctx,
-                                                    {ograd_mult, std},
-                                                    {kWriteTo}, {ograd_mult});
+    BinaryBroadcastCompute<cpu, op::mshadow_op::mul>(
+        attrs, ctx, {ograd, gamma}, {kWriteTo}, {ograd_mult});
+    BinaryBroadcastCompute<cpu, op::mshadow_op::div>(
+        attrs, ctx, {ograd_mult, std}, {kWriteTo}, {ograd_mult});
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
         if (!safe_acc) {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, false>(
-            s, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-            ograd_mult.reshape(red_src_shape));
+              s,
+              red_out.reshape(red_dst_shape),
+              kWriteTo,
+              workspace,
+              ograd_mult.reshape(red_src_shape));
         } else {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, true>(
-            s, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-            ograd_mult.reshape(red_src_shape));
+              s,
+              red_out.reshape(red_dst_shape),
+              kWriteTo,
+              workspace,
+              ograd_mult.reshape(red_src_shape));
         }
       });
       Tensor<cpu, 1, DType> red_out_tensor = red_out.FlatTo1D<cpu, DType>(s);
       red_out_tensor /= scalar<DType>(channel_size);
     });
-    BinaryBroadcastCompute<cpu, op::mshadow_op::minus>(attrs, ctx,
-                                                      {ograd_mult, red_out},
-                                                      {req[0]}, {outputs[0]});
-    ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::mul>(attrs, ctx, {ograd_mult, normalized_data},
-                                                        {kWriteTo}, {ograd_mult});
+    BinaryBroadcastCompute<cpu, op::mshadow_op::minus>(
+        attrs, ctx, {ograd_mult, red_out}, {req[0]}, {outputs[0]});
+    ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::mul>(
+        attrs, ctx, {ograd_mult, normalized_data}, {kWriteTo}, {ograd_mult});
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
         if (!safe_acc) {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, false>(
-            s, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-            ograd_mult.reshape(red_src_shape));
+              s,
+              red_out.reshape(red_dst_shape),
+              kWriteTo,
+              workspace,
+              ograd_mult.reshape(red_src_shape));
         } else {
           broadcast::Reduce<mshadow_op::sum, NDim, DType, mshadow_op::identity, true>(
-            s, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-            ograd_mult.reshape(red_src_shape));
+              s,
+              red_out.reshape(red_dst_shape),
+              kWriteTo,
+              workspace,
+              ograd_mult.reshape(red_src_shape));
         }
       });
       Tensor<cpu, 1, DType> red_out_tensor = red_out.FlatTo1D<cpu, DType>(s);
-      red_out_tensor /=  scalar<DType>(- channel_size);
+      red_out_tensor /= scalar<DType>(-channel_size);
     });
-    BinaryBroadcastCompute<cpu, mshadow_op::mul>(attrs, ctx,
-                                                 {normalized_data, red_out},
-                                                 {kAddTo}, {outputs[0]});
+    BinaryBroadcastCompute<cpu, mshadow_op::mul>(
+        attrs, ctx, {normalized_data, red_out}, {kAddTo}, {outputs[0]});
   }
 }
 
-template<>
+template <>
 void LayerNormGradCompute<cpu>(const nnvm::NodeAttrs& attrs,
-                               const OpContext& ctx, const std::vector<TBlob>& inputs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
   return LayerNormGradComputeGeneral<cpu>(attrs, ctx, inputs, req, outputs);
@@ -441,8 +461,8 @@ static void LayerNormGradComputeExCPU(const nnvm::NodeAttrs& attrs,
 #endif
 
 NNVM_REGISTER_OP(LayerNorm)
-.add_alias("_npx_layer_norm")
-.describe(R"code(Layer normalization.
+    .add_alias("_npx_layer_norm")
+    .describe(R"code(Layer normalization.
 
 Normalizes the channels of the input tensor by mean and variance, and applies a scale ``gamma`` as
 well as offset ``beta``.
@@ -468,76 +488,79 @@ the 'channel' (separately normalized groups).  The default is -1, which sets the
 axis to be the last item in the input shape.
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<LayerNormParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "gamma", "beta"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "mean", "std"};
-})
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
-  return param.output_mean_var ? 3 : 1;
-})
-.set_attr<mxnet::FInferShape>("FInferShape", LayerNormShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 3>)
-.set_attr<FCompute>("FCompute<cpu>", LayerNormCompute<cpu>)
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<LayerNormParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "gamma", "beta"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output", "mean", "std"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) {
+                                          const LayerNormParam& param =
+                                              nnvm::get<LayerNormParam>(attrs.parsed);
+                                          return param.output_mean_var ? 3 : 1;
+                                        })
+    .set_attr<mxnet::FInferShape>("FInferShape", LayerNormShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 3>)
+    .set_attr<FCompute>("FCompute<cpu>", LayerNormCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", LayerNormInferStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LayerNormComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", LayerNormInferStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LayerNormComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", [](const nnvm::ObjectPtr& n,
-                                           const std::vector<nnvm::NodeEntry>& ograds) {
-  std::vector<nnvm::NodeEntry> heads;
-  heads.push_back(ograds[0]);  // ograd
-  heads.push_back(n->inputs[0]);  // data
-  heads.push_back(n->inputs[1]);  // gamma
-  heads.emplace_back(n, 1, 0);  // mean
-  heads.emplace_back(n, 2, 0);  // std
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> heads;
+          heads.push_back(ograds[0]);     // ograd
+          heads.push_back(n->inputs[0]);  // data
+          heads.push_back(n->inputs[1]);  // gamma
+          heads.emplace_back(n, 1, 0);    // mean
+          heads.emplace_back(n, 2, 0);    // std
 #if MXNET_USE_ONEDNN == 1
-  heads.push_back(n->inputs[2]);  // beta - needed for MKLDNN backward propagation;
-                                  // added at the end in case of fallback to non MKLDNN version
+          heads.push_back(
+              n->inputs[2]);  // beta - needed for MKLDNN backward propagation;
+                              // added at the end in case of fallback to non MKLDNN version
 #endif
-  return MakeGradNode("_backward_LayerNorm", n, heads, n->attrs.dict);
-})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "Input data to layer normalization")
-.add_argument("gamma", "NDArray-or-Symbol", "gamma array")
-.add_argument("beta", "NDArray-or-Symbol", "beta array")
-.add_arguments(LayerNormParam::__FIELDS__());
-
+          return MakeGradNode("_backward_LayerNorm", n, heads, n->attrs.dict);
+        })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "Input data to layer normalization")
+    .add_argument("gamma", "NDArray-or-Symbol", "gamma array")
+    .add_argument("beta", "NDArray-or-Symbol", "beta array")
+    .add_arguments(LayerNormParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_LayerNorm)
 #if MXNET_USE_ONEDNN == 1
-.set_num_inputs(6)
+    .set_num_inputs(6)
 #else
 .set_num_inputs(5)
 #endif
-.set_num_outputs(3)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<LayerNormParam>)
-.set_attr<FCompute>("FCompute<cpu>", LayerNormGradCompute<cpu>)
+    .set_num_outputs(3)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<LayerNormParam>)
+    .set_attr<FCompute>("FCompute<cpu>", LayerNormGradCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", LayerNormInferStorageType)
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LayerNormGradComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", LayerNormInferStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LayerNormGradComputeExCPU)
 #endif
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-});
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/layer_norm.cu b/src/operator/nn/layer_norm.cu
index 1e719eda40ab..726f6e6de47b 100644
--- a/src/operator/nn/layer_norm.cu
+++ b/src/operator/nn/layer_norm.cu
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file layer_norm.cu
  * \brief Implements Ba et. al, Layer Normalization (https://arxiv.org/abs/1607.06450).
-*/
+ */
 #include "./layer_norm-inl.h"
 
 using namespace mshadow::cuda;
@@ -50,28 +50,49 @@ void LayerNormGradComputeGeneralImpl<gpu>(const nnvm::NodeAttrs& attrs,
                                           const int channel_size) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s = ctx.get_stream<gpu>();
   // Compute normalized_data = (data - mean) / std
-  BinaryBroadcastRTCCompute {"sub"}(attrs, ctx,
-                                    {data, mean},
-                                    {kWriteTo}, {normalized_data});
-  BinaryBroadcastRTCCompute {"div"}(attrs, ctx,
-                                    {normalized_data, std},
-                                    {kWriteTo}, {normalized_data});
+  BinaryBroadcastRTCCompute{"sub"}(  // NOLINT
+      attrs,
+      ctx,
+      {data, mean},
+      {kWriteTo},
+      {normalized_data});
+  BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+      attrs,
+      ctx,
+      {normalized_data, std},
+      {kWriteTo},
+      {normalized_data});
   // Calculate grad_beta
   if (req[2] != kNullOp) {
     BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, outputs[2].reshape(red_exclude_dst_shape), req[2], workspace,
-                           ograd.reshape(red_exclude_src_shape), "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           outputs[2].reshape(red_exclude_dst_shape),
+                           req[2],
+                           workspace,
+                           ograd.reshape(red_exclude_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
   }
   // Calculate grad_gamma, it will be sum(ograd * normalized_data, exclude_axis)
-  ElemwiseBinaryRTCCompute {"mul"}(attrs, ctx, {normalized_data, ograd},
-                                   {kWriteTo}, {ograd_mult});
+  ElemwiseBinaryRTCCompute{"mul"}(  // NOLINT
+      attrs,
+      ctx,
+      {normalized_data, ograd},
+      {kWriteTo},
+      {ograd_mult});
   if (req[1] != kNullOp) {
     BROADCAST_NDIM_SWITCH(red_exclude_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, outputs[1].reshape(red_exclude_dst_shape), req[1], workspace,
-                           ograd_mult.reshape(red_exclude_src_shape), "red::sum{}", NDim,
+      broadcast::RTCReduce(ctx,
+                           outputs[1].reshape(red_exclude_dst_shape),
+                           req[1],
+                           workspace,
+                           ograd_mult.reshape(red_exclude_src_shape),
+                           "red::sum{}",
+                           NDim,
                            "identity");
     });
   }
@@ -80,41 +101,69 @@ void LayerNormGradComputeGeneralImpl<gpu>(const nnvm::NodeAttrs& attrs,
   //   grad_data = ograd_mult - mean(ograd_mult, axis)
   //               + normalized_data * (-mean(normalized_data * ograd_mult, axis))
   if (req[0] != kNullOp) {
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx,
-                                      {ograd, gamma},
-                                      {kWriteTo}, {ograd_mult});
-    BinaryBroadcastRTCCompute {"div"}(attrs, ctx,
-                                      {ograd_mult, std},
-                                      {kWriteTo}, {ograd_mult});
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd, gamma},
+        {kWriteTo},
+        {ograd_mult});
+    BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd_mult, std},
+        {kWriteTo},
+        {ograd_mult});
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-        broadcast::RTCReduce(ctx, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-                             ograd_mult.reshape(red_src_shape), "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           red_out.reshape(red_dst_shape),
+                           kWriteTo,
+                           workspace,
+                           ograd_mult.reshape(red_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Tensor<gpu, 1, DType> red_out_tensor = red_out.FlatTo1D<gpu, DType>(s);
       red_out_tensor /= scalar<DType>(channel_size);
     });
-    BinaryBroadcastRTCCompute {"sub"}(attrs, ctx,
-                                      {ograd_mult, red_out},
-                                      {req[0]}, {outputs[0]});
-    ElemwiseBinaryRTCCompute {"mul"}(attrs, ctx, {ograd_mult, normalized_data},
-                                     {kWriteTo}, {ograd_mult});
+    BinaryBroadcastRTCCompute{"sub"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd_mult, red_out},
+        {req[0]},
+        {outputs[0]});
+    ElemwiseBinaryRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {ograd_mult, normalized_data},
+        {kWriteTo},
+        {ograd_mult});
     BROADCAST_NDIM_SWITCH(red_dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, red_out.reshape(red_dst_shape), kWriteTo, workspace,
-                           ograd_mult.reshape(red_src_shape), "red::sum{}", NDim, "identity");
+      broadcast::RTCReduce(ctx,
+                           red_out.reshape(red_dst_shape),
+                           kWriteTo,
+                           workspace,
+                           ograd_mult.reshape(red_src_shape),
+                           "red::sum{}",
+                           NDim,
+                           "identity");
     });
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Tensor<gpu, 1, DType> red_out_tensor = red_out.FlatTo1D<gpu, DType>(s);
-      red_out_tensor /=  scalar<DType>(- channel_size);
+      red_out_tensor /= scalar<DType>(-channel_size);
     });
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx,
-                                      {normalized_data, red_out},
-                                      {kAddTo}, {outputs[0]});
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {normalized_data, red_out},
+        {kAddTo},
+        {outputs[0]});
   }
 }
 template <typename DType>
-__device__ __forceinline__ DType warp_shfl(DType value, int src_lane,
-                                           int width = 32, unsigned int mask = 0xffffffff) {
+__device__ __forceinline__ DType
+warp_shfl(DType value, int src_lane, int width = 32, unsigned int mask = 0xffffffff) {
 #if CUDA_VERSION >= 9000
   return __shfl_sync(mask, value, src_lane, width);
 #else
@@ -123,8 +172,8 @@ __device__ __forceinline__ DType warp_shfl(DType value, int src_lane,
 }
 
 template <typename DType>
-__device__ __forceinline__ DType warp_shfl_xor(DType value, int laneMask,
-                                               int width = 32, unsigned int mask = 0xffffffff) {
+__device__ __forceinline__ DType
+warp_shfl_xor(DType value, int laneMask, int width = 32, unsigned int mask = 0xffffffff) {
 #if CUDA_VERSION >= 9000
   return __shfl_xor_sync(mask, value, laneMask, width);
 #else
@@ -132,16 +181,15 @@ __device__ __forceinline__ DType warp_shfl_xor(DType value, int laneMask,
 #endif
 }
 
-
 /* A single updating step of the Welford's online algorithm to calculate the mean and variance.
  * The value 'curr' will be accumulated to the (mean, sigma2, count) triplet.
  *
  */
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 __device__ __forceinline__ void StepWelfordOnlineSum(const DType curr,
-                                                     DType& mean,         //NOLINT
-                                                     DType& sigma2,       //NOLINT
-                                                     IType& count) {      //NOLINT
+                                                     DType& mean,     // NOLINT
+                                                     DType& sigma2,   // NOLINT
+                                                     IType& count) {  // NOLINT
   count += IType(1);
   DType delta = curr - mean;
   mean += delta / count;
@@ -155,24 +203,24 @@ __device__ __forceinline__ void StepWelfordOnlineSum(const DType curr,
  *
  *  TODO(sxjscience) Explore the possibility of int lhs_count and rhs_count
  */
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 __device__ __inline__ void ChanMergePartition(const DType lhs_mean,
                                               const DType lhs_sigma2,
                                               const IType lhs_count,
-                                              DType& rhs_mean,         //NOLINT
-                                              DType& rhs_sigma2,       //NOLINT
-                                              IType& rhs_count) {      //NOLINT
+                                              DType& rhs_mean,     // NOLINT
+                                              DType& rhs_sigma2,   // NOLINT
+                                              IType& rhs_count) {  // NOLINT
   DType delta = rhs_mean - lhs_mean;
-  DType nA = static_cast<DType>(lhs_count);
-  DType nB = static_cast<DType>(rhs_count);
-  rhs_count = nA + nB;
+  DType nA    = static_cast<DType>(lhs_count);
+  DType nB    = static_cast<DType>(rhs_count);
+  rhs_count   = nA + nB;
   if (rhs_count > DType(0)) {
-    nA = nA / rhs_count;
-    nB = nB / rhs_count;
-    rhs_mean = nA * lhs_mean + nB * rhs_mean;
+    nA         = nA / rhs_count;
+    nB         = nB / rhs_count;
+    rhs_mean   = nA * lhs_mean + nB * rhs_mean;
     rhs_sigma2 = rhs_sigma2 + lhs_sigma2 + delta * delta * nA * nB * rhs_count;
   } else {
-    rhs_mean = DType(0);
+    rhs_mean   = DType(0);
     rhs_sigma2 = DType(0);
   }
 }
@@ -181,13 +229,13 @@ __device__ __inline__ void ChanMergePartition(const DType lhs_mean,
  * Each thread will keep a mean/sigma2. The mean/sigma2 can be further merged to get the mean and
  * sigma2 of the column.
  */
-template<typename AType, typename DType, typename IType>
+template <typename AType, typename DType, typename IType>
 __device__ __forceinline__ void BlockWelfordOnlineSum(const DType* __restrict__ col_vals,
                                                       const int nchannel,
-                                                      AType& mean,         //NOLINT
-                                                      AType& sigma2,       //NOLINT
-                                                      IType& count) {      //NOLINT
-  int tid = threadIdx.x + threadIdx.y * blockDim.x;
+                                                      AType& mean,     // NOLINT
+                                                      AType& sigma2,   // NOLINT
+                                                      IType& count) {  // NOLINT
+  int tid           = threadIdx.x + threadIdx.y * blockDim.x;
   const int nthread = blockDim.x * blockDim.y;
   // Each thread takes charge of 4 consecutive numbers. This should optimize the loading speed using
   // vectorized types like float4.
@@ -204,23 +252,22 @@ __device__ __forceinline__ void BlockWelfordOnlineSum(const DType* __restrict__
   }
 }
 
-template<>
-__device__ __forceinline__
-void BlockWelfordOnlineSum<float, mshadow::half::half_t, int>
-                                          (const mshadow::half::half_t* __restrict__ col_vals,
-                                           const int nchannel,
-                                           float& mean,                    //NOLINT
-                                           float& sigma2,                  //NOLINT
-                                           int& count) {                 //NOLINT
-  int tid = threadIdx.x + threadIdx.y * blockDim.x;
+template <>
+__device__ __forceinline__ void BlockWelfordOnlineSum<float, mshadow::half::half_t, int>(
+    const mshadow::half::half_t* __restrict__ col_vals,
+    const int nchannel,
+    float& mean,    // NOLINT
+    float& sigma2,  // NOLINT
+    int& count) {   // NOLINT
+  int tid           = threadIdx.x + threadIdx.y * blockDim.x;
   const int nthread = blockDim.x * blockDim.y;
   // We cast the input half pointer to half2 to optimize the loading speed.
   // Here, we need to notice that CUDA forces memory alignment, i.e.,
   // ASSERT static_cast<size_t>(ptr) % sizeof(dtype) == 0.
   // Thus, we need to shift the address of the half pointer to be aligned by half2.
-  int align_shift = (reinterpret_cast<size_t>(col_vals) % 4) != 0;
-  int padding = (nchannel - align_shift) % 2;
-  int half2_size = (nchannel - align_shift) / 2;
+  int align_shift               = (reinterpret_cast<size_t>(col_vals) % 4) != 0;
+  int padding                   = (nchannel - align_shift) % 2;
+  int half2_size                = (nchannel - align_shift) / 2;
   const __half2* half2_col_vals = reinterpret_cast<const __half2*>(col_vals + align_shift);
   if (threadIdx.x == 0 && threadIdx.y == 0) {
     if (align_shift) {
@@ -232,7 +279,7 @@ void BlockWelfordOnlineSum<float, mshadow::half::half_t, int>
   }
 
   for (int l = tid; l < half2_size; l += nthread) {
-    float2 ele_val =  __half22float2(half2_col_vals[l]);
+    float2 ele_val = __half22float2(half2_col_vals[l]);
     StepWelfordOnlineSum(ele_val.x, mean, sigma2, count);
     StepWelfordOnlineSum(ele_val.y, mean, sigma2, count);
   }
@@ -251,7 +298,7 @@ void BlockWelfordOnlineSum<float, mshadow::half::half_t, int>
  *  Also, when blockDim.y > 1, it requires shared memory that has size:
  *      sizeof(AType) * blockDim.y + sizeof(int) * blockDim.y / 2
  */
-template<typename AType, typename DType, typename IType>
+template <typename AType, typename DType, typename IType>
 __global__ void LayerNormFusedForwardKernelContig(const int nbatch,
                                                   const int nchannel,
                                                   const AType eps,
@@ -261,12 +308,12 @@ __global__ void LayerNormFusedForwardKernelContig(const int nbatch,
                                                   DType* __restrict__ out_data,
                                                   DType* __restrict__ mean_data,
                                                   DType* __restrict__ std_data) {
-  int bid = blockIdx.x + blockIdx.y * gridDim.x;
-  const int tid = threadIdx.y * blockDim.x + threadIdx.x;
+  int bid           = blockIdx.x + blockIdx.y * gridDim.x;
+  const int tid     = threadIdx.y * blockDim.x + threadIdx.x;
   const int nthread = blockDim.x * blockDim.y;
-  IType count = 0;
-  AType mean = 0;
-  AType sigma2 = 0;
+  IType count       = 0;
+  AType mean        = 0;
+  AType sigma2      = 0;
 
   if (bid < nbatch) {
     extern __shared__ char buf[];  // Shared memory
@@ -279,9 +326,9 @@ __global__ void LayerNormFusedForwardKernelContig(const int nbatch,
     // After calling the function, threadIdx.x == 0 will store the result of
     // the aggregated (mean, sigma2, counts).
     for (int mask = blockDim.x / 2; mask > 0; mask >>= 1) {
-      AType meanB = warp_shfl_xor(mean, mask);
+      AType meanB   = warp_shfl_xor(mean, mask);
       AType sigma2B = warp_shfl_xor(sigma2, mask);
-      IType countB = warp_shfl_xor(count, mask);
+      IType countB  = warp_shfl_xor(count, mask);
       ChanMergePartition(meanB, sigma2B, countB, mean, sigma2, count);
     }
     if (blockDim.y > 1) {
@@ -289,14 +336,14 @@ __global__ void LayerNormFusedForwardKernelContig(const int nbatch,
       // and merge with the lower-half warp
       AType* mean_buf = reinterpret_cast<AType*>(buf);
       AType* sigma2_buf =
-        reinterpret_cast<AType*>(buf + sizeof(AType) * blockDim.y / 2 * blockDim.x);
+          reinterpret_cast<AType*>(buf + sizeof(AType) * blockDim.y / 2 * blockDim.x);
       IType* count_buf = reinterpret_cast<IType*>(buf + sizeof(AType) * blockDim.y * blockDim.x);
       for (int offset = blockDim.y / 2; offset > 0; offset >>= 1) {
         if (threadIdx.y >= offset && threadIdx.y < 2 * offset) {
-          const int idx = (threadIdx.y - offset) * blockDim.x + threadIdx.x;
-          mean_buf[idx] = mean;
+          const int idx   = (threadIdx.y - offset) * blockDim.x + threadIdx.x;
+          mean_buf[idx]   = mean;
           sigma2_buf[idx] = sigma2;
-          count_buf[idx] = count;
+          count_buf[idx]  = count;
         }
         __syncthreads();
         if (threadIdx.y < offset) {
@@ -307,35 +354,35 @@ __global__ void LayerNormFusedForwardKernelContig(const int nbatch,
       }
       // Broadcast the result to all threads
       if (threadIdx.y == 0) {
-        mean_buf[threadIdx.x] = mean;
+        mean_buf[threadIdx.x]   = mean;
         sigma2_buf[threadIdx.x] = sigma2;
       }
       __syncthreads();
-      mean = mean_buf[threadIdx.x];
+      mean   = mean_buf[threadIdx.x];
       sigma2 = sigma2_buf[threadIdx.x] / nchannel;
     } else {
       sigma2 /= nchannel;
     }
     // Calculate the out_data: gamma * (x - mean) / sqrt(var + eps) + beta
-    AType std_eps = sqrt(sigma2 + eps);
-    AType invstd_eps = DType(1.0) / std_eps;
+    AType std_eps      = sqrt(sigma2 + eps);
+    AType invstd_eps   = DType(1.0) / std_eps;
     DType* out_col_val = out_data + bid * nchannel;
 
     if (gamma != nullptr && beta != nullptr) {
       for (int i = tid; i < nchannel; i += nthread) {
-        out_col_val[i] = gamma[i] * static_cast<DType>(invstd_eps *
-                                                       (static_cast<AType>(col_vals[i]) - mean))
-                                                         + beta[i];
+        out_col_val[i] =
+            gamma[i] * static_cast<DType>(invstd_eps * (static_cast<AType>(col_vals[i]) - mean)) +
+            beta[i];
       }
     } else if (gamma == nullptr && beta != nullptr) {
       for (int i = tid; i < nchannel; i += nthread) {
-        out_col_val[i] = static_cast<DType>(invstd_eps * (static_cast<AType>(col_vals[i]) - mean))
-                                                       + beta[i];
+        out_col_val[i] =
+            static_cast<DType>(invstd_eps * (static_cast<AType>(col_vals[i]) - mean)) + beta[i];
       }
     } else if (gamma != nullptr && beta == nullptr) {
       for (int i = tid; i < nchannel; i += nthread) {
-        out_col_val[i] = gamma[i] * static_cast<DType>(invstd_eps *
-                                                       (static_cast<AType>(col_vals[i]) - mean));
+        out_col_val[i] =
+            gamma[i] * static_cast<DType>(invstd_eps * (static_cast<AType>(col_vals[i]) - mean));
       }
     } else {
       for (int i = tid; i < nchannel; i += nthread) {
@@ -345,14 +392,15 @@ __global__ void LayerNormFusedForwardKernelContig(const int nbatch,
     // Write the out_data and var_data
     if (threadIdx.x == 0 && threadIdx.y == 0) {
       mean_data[bid] = static_cast<DType>(mean);
-      std_data[bid] = static_cast<DType>(std_eps);
+      std_data[bid]  = static_cast<DType>(std_eps);
     }
   }
 }
 
-template<bool safe_acc = false>
+template <bool safe_acc = false>
 void LayerNormGPUContig(const LayerNormParam param,
-                        const OpContext& ctx, const std::vector<TBlob>& inputs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
                         const std::vector<OpReqType>& req,
                         const std::vector<TBlob>& outputs) {
   using namespace mshadow;
@@ -361,13 +409,13 @@ void LayerNormGPUContig(const LayerNormParam param,
   mxnet::TShape mean_shape(1, 0);
   size_t in_ndim = inputs[layernorm::kData].ndim();
   data_shape[0] = mean_shape[0] = inputs[layernorm::kData].shape_.ProdShape(0, in_ndim - 1);
-  data_shape[1] = inputs[layernorm::kData].shape_[in_ndim - 1];
-  const TBlob in_data = inputs[layernorm::kData].reshape(data_shape);
-  const TBlob gamma = inputs[layernorm::kGamma];
-  const TBlob beta = inputs[layernorm::kBeta];
-  const TBlob out_data = outputs[layernorm::kOut].reshape(data_shape);
-  const TBlob mean_data = outputs[layernorm::kMean].reshape(mean_shape);
-  const TBlob std_data = outputs[layernorm::kStd].reshape(mean_shape);
+  data_shape[1]                 = inputs[layernorm::kData].shape_[in_ndim - 1];
+  const TBlob in_data           = inputs[layernorm::kData].reshape(data_shape);
+  const TBlob gamma             = inputs[layernorm::kGamma];
+  const TBlob beta              = inputs[layernorm::kBeta];
+  const TBlob out_data          = outputs[layernorm::kOut].reshape(data_shape);
+  const TBlob mean_data         = outputs[layernorm::kMean].reshape(mean_shape);
+  const TBlob std_data          = outputs[layernorm::kStd].reshape(mean_shape);
   // Make sure the inputs are contiguous
   CHECK_EQ(in_data.CheckContiguous(), true);
   CHECK_EQ(gamma.CheckContiguous(), true);
@@ -378,11 +426,11 @@ void LayerNormGPUContig(const LayerNormParam param,
 
   // Lauch the kernel. The dynamic shared memory size is
   // sizeof(DType) * blockDim.y * blockDim.x + sizeof(DType) * blockDim.y / 2 * blockDim.x
-  int nbatch = data_shape[0];
+  int nbatch   = data_shape[0];
   int nchannel = data_shape[1];
-  float eps = param.eps;
-  int ngrid_x = (nbatch > kMaxGridDim) ? (nbatch + kBaseGridNum - 1) / kBaseGridNum : nbatch;
-  int ngrid_y = (nbatch > kMaxGridDim) ? kBaseGridNum : 1;
+  float eps    = param.eps;
+  int ngrid_x  = (nbatch > kMaxGridDim) ? (nbatch + kBaseGridNum - 1) / kBaseGridNum : nbatch;
+  int ngrid_y  = (nbatch > kMaxGridDim) ? kBaseGridNum : 1;
   int nthread_y;
   const dim3 dimGrid(ngrid_x, ngrid_y);
   if (nchannel <= 128) {
@@ -396,24 +444,32 @@ void LayerNormGPUContig(const LayerNormParam param,
   const dim3 dimBlock(32, nthread_y);
   MXNET_REAL_ACC_TYPE_SWITCH(in_data.type_flag_, DType, AccType, {
     typedef typename std::conditional<safe_acc, AccType, DType>::type AType;
-    int nshared = nthread_y > 1 ? nthread_y * 32 * sizeof(AType)
-                                  + (nthread_y / 2) * 32 * sizeof(int) : 0;
+    int nshared =
+        nthread_y > 1 ? nthread_y * 32 * sizeof(AType) + (nthread_y / 2) * 32 * sizeof(int) : 0;
     CheckLaunchParam(dimGrid, dimBlock);
-    LayerNormFusedForwardKernelContig<AType, DType, int> <<<dimGrid, dimBlock, nshared, stream>>>
-     (nbatch, nchannel, static_cast<AType>(eps),
-      in_data.dptr<DType>(), gamma.dptr<DType>(), beta.dptr<DType>(),
-      out_data.dptr<DType>(), mean_data.dptr<DType>(), std_data.dptr<DType>());
+    LayerNormFusedForwardKernelContig<AType, DType, int>
+        <<<dimGrid, dimBlock, nshared, stream>>>(nbatch,
+                                                 nchannel,
+                                                 static_cast<AType>(eps),
+                                                 in_data.dptr<DType>(),
+                                                 gamma.dptr<DType>(),
+                                                 beta.dptr<DType>(),
+                                                 out_data.dptr<DType>(),
+                                                 mean_data.dptr<DType>(),
+                                                 std_data.dptr<DType>());
   });
   MSHADOW_CUDA_POST_KERNEL_CHECK(LayerNormFusedForwardKernelContig);
 }
 
-template<>
+template <>
 void LayerNormCompute<gpu>(const nnvm::NodeAttrs& attrs,
-                           const OpContext& ctx, const std::vector<TBlob>& inputs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   CHECK_NE(req[0], kAddTo);
   int axis = param.axis;
   if (axis < 0) {
@@ -424,9 +480,10 @@ void LayerNormCompute<gpu>(const nnvm::NodeAttrs& attrs,
     // Try to use the accelerated CUDA kernels
     bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
     if (!safe_acc && inputs[0].type_flag_ == mshadow::kFloat16) {
-      common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for LayerNorm with float16 inputs. "
-                      "See https://mxnet.apache.org/api/faq/env_var "
-                      "for more details.");
+      common::LogOnce(
+          "MXNET_SAFE_ACCUMULATION=1 is recommended for LayerNorm with float16 inputs. "
+          "See https://mxnet.apache.org/api/faq/env_var "
+          "for more details.");
     }
     if (safe_acc) {
       return LayerNormGPUContig<true>(param, ctx, inputs, req, outputs);
@@ -437,7 +494,6 @@ void LayerNormCompute<gpu>(const nnvm::NodeAttrs& attrs,
   return LayerNormComputeGeneral<gpu>(attrs, ctx, inputs, req, outputs);
 }
 
-
 /* Fused CUDA kernel for calculating the gradient w.r.t gamma/beta in LayerNorm when axis=-1
  * (Contiguous case).
  * The gradient of gamma and beta are:
@@ -464,7 +520,7 @@ void LayerNormCompute<gpu>(const nnvm::NodeAttrs& attrs,
  * This `LayerNormFusedBackwardKernel_PartGammaBeta` function implements the first step and
  * `LayerNormFusedBackwardKernel_GammaBeta` implements the second step.
  */
-template<typename AType, typename DType>
+template <typename AType, typename DType>
 __global__ void LayerNormFusedBackwardKernel_PartGammaBeta(const int nbatch,
                                                            const int nchannel,
                                                            const DType* __restrict__ in_data,
@@ -474,28 +530,28 @@ __global__ void LayerNormFusedBackwardKernel_PartGammaBeta(const int nbatch,
                                                            AType* __restrict__ part_gamma_grad,
                                                            AType* __restrict__ part_beta_grad) {
   extern __shared__ char buf[];
-  AType* d_buf = reinterpret_cast<AType*>(buf);
-  const int npart = gridDim.y;
+  AType* d_buf            = reinterpret_cast<AType*>(buf);
+  const int npart         = gridDim.y;
   const int block_row_num = (nbatch + npart - 1) / npart;
   // The rows are divided into `npart` parts. Each threadblock calculates the reduction result
   // within the corresponding row ranges.
-  int row_stride = blockDim.x + 1;
-  const int c = blockIdx.x * blockDim.x + threadIdx.x;
-  int r_begin = blockIdx.y * block_row_num;
-  int r_end = min((blockIdx.y + 1) * block_row_num, nbatch);
-  AType* buf_gamma_grad = d_buf;
-  AType* buf_beta_grad = d_buf + blockDim.y * row_stride;
+  int row_stride         = blockDim.x + 1;
+  const int c            = blockIdx.x * blockDim.x + threadIdx.x;
+  int r_begin            = blockIdx.y * block_row_num;
+  int r_end              = min((blockIdx.y + 1) * block_row_num, nbatch);
+  AType* buf_gamma_grad  = d_buf;
+  AType* buf_beta_grad   = d_buf + blockDim.y * row_stride;
   AType local_gamma_grad = 0;
-  AType local_beta_grad = 0;
+  AType local_beta_grad  = 0;
 
   if (c < nchannel) {
     for (int r_b = r_begin; r_b < r_end; r_b += blockDim.y) {
       int r = r_b + threadIdx.y;
       if (r < r_end) {
-        AType local_mean = static_cast<AType>(mean_data[r]);
-        AType local_std = static_cast<AType>(std_data[r]);
-        int read_idx = r * nchannel + c;
-        AType local_in_data = static_cast<AType>(in_data[read_idx]);
+        AType local_mean     = static_cast<AType>(mean_data[r]);
+        AType local_std      = static_cast<AType>(std_data[r]);
+        int read_idx         = r * nchannel + c;
+        AType local_in_data  = static_cast<AType>(in_data[read_idx]);
         AType local_out_grad = static_cast<AType>(out_grad[read_idx]);
         local_gamma_grad += (local_in_data - local_mean) / local_std * local_out_grad;
         local_beta_grad += local_out_grad;
@@ -503,9 +559,9 @@ __global__ void LayerNormFusedBackwardKernel_PartGammaBeta(const int nbatch,
     }
   }
   buf_gamma_grad[threadIdx.y * row_stride + threadIdx.x] = local_gamma_grad;
-  buf_beta_grad[threadIdx.y * row_stride + threadIdx.x] = local_beta_grad;
+  buf_beta_grad[threadIdx.y * row_stride + threadIdx.x]  = local_beta_grad;
   __syncthreads();
-  for (int offset = blockDim.y/2;  offset > 1;  offset >>= 1) {
+  for (int offset = blockDim.y / 2; offset > 1; offset >>= 1) {
     if (threadIdx.y < offset) {
       int idx1 = threadIdx.y * row_stride + threadIdx.x;
       int idx2 = (threadIdx.y + offset) * row_stride + threadIdx.x;
@@ -515,14 +571,14 @@ __global__ void LayerNormFusedBackwardKernel_PartGammaBeta(const int nbatch,
     __syncthreads();
   }
   if (threadIdx.y == 0 && c < nchannel) {
-    part_gamma_grad[blockIdx.y * nchannel + c] = buf_gamma_grad[threadIdx.x]
-                                                   + buf_gamma_grad[threadIdx.x + row_stride];
-    part_beta_grad[blockIdx.y * nchannel + c] = buf_beta_grad[threadIdx.x]
-                                                   + buf_beta_grad[threadIdx.x + row_stride];
+    part_gamma_grad[blockIdx.y * nchannel + c] =
+        buf_gamma_grad[threadIdx.x] + buf_gamma_grad[threadIdx.x + row_stride];
+    part_beta_grad[blockIdx.y * nchannel + c] =
+        buf_beta_grad[threadIdx.x] + buf_beta_grad[threadIdx.x + row_stride];
   }
 }
 
-template<bool gamma_addto, bool beta_addto, typename AType, typename DType>
+template <bool gamma_addto, bool beta_addto, typename AType, typename DType>
 __global__ void LayerNormFusedBackwardKernel_GammaBeta(const int nbatch,
                                                        const int nchannel,
                                                        const int npart,
@@ -530,14 +586,14 @@ __global__ void LayerNormFusedBackwardKernel_GammaBeta(const int nbatch,
                                                        const AType* __restrict__ part_beta_grad,
                                                        DType* gamma_grad,
                                                        DType* beta_grad) {
-  const int c = blockIdx.x * blockDim.x + threadIdx.x;
+  const int c   = blockIdx.x * blockDim.x + threadIdx.x;
   const int tid = threadIdx.y * blockDim.x + threadIdx.x;
   if (c < nchannel) {
     extern __shared__ char buf[];
     AType* buf_gamma_grad = reinterpret_cast<AType*>(buf);
-    AType* buf_beta_grad = reinterpret_cast<AType*>(buf) + blockDim.x * blockDim.y;
-    buf_gamma_grad[tid] = 0;
-    buf_beta_grad[tid] = 0;
+    AType* buf_beta_grad  = reinterpret_cast<AType*>(buf) + blockDim.x * blockDim.y;
+    buf_gamma_grad[tid]   = 0;
+    buf_beta_grad[tid]    = 0;
     for (int r = threadIdx.y; r < npart; r += blockDim.y) {
       buf_gamma_grad[tid] += part_gamma_grad[r * nchannel + c];
       buf_beta_grad[tid] += part_beta_grad[r * nchannel + c];
@@ -545,7 +601,7 @@ __global__ void LayerNormFusedBackwardKernel_GammaBeta(const int nbatch,
     __syncthreads();
     // Begin for inter-warp reduce
     if (npart > 1) {
-      for (int offset = blockDim.y/2; offset > 0; offset >>= 1) {
+      for (int offset = blockDim.y / 2; offset > 0; offset >>= 1) {
         if (threadIdx.y < offset) {
           int idx1 = tid;
           int idx2 = tid + offset * blockDim.x;
@@ -578,7 +634,7 @@ __global__ void LayerNormFusedBackwardKernel_GammaBeta(const int nbatch,
  *
  *
  */
-template<int LOAD_UNROLL, bool data_addto, typename AType, typename DType>
+template <int LOAD_UNROLL, bool data_addto, typename AType, typename DType>
 __global__ void LayerNormFusedBackwardKernel_Data(const int nbatch,
                                                   const int nchannel,
                                                   const DType* __restrict__ in_data,
@@ -587,7 +643,7 @@ __global__ void LayerNormFusedBackwardKernel_Data(const int nbatch,
                                                   const DType* __restrict__ std_data,
                                                   const DType* __restrict__ gamma,
                                                   DType* data_grad) {
-  int bid = blockIdx.x + blockIdx.y * gridDim.x;
+  int bid           = blockIdx.x + blockIdx.y * gridDim.x;
   const int nthread = blockDim.x * blockDim.y;
   if (bid < nbatch) {
     // Shared memory with size blockDim.y * blockDim.x * sizeof(DType)
@@ -595,24 +651,24 @@ __global__ void LayerNormFusedBackwardKernel_Data(const int nbatch,
     int tid = threadIdx.x + threadIdx.y * blockDim.x;
     // 1. Calculate: mean(out_grad * gamma / std, axis=-1)
     //               mean(out_grad * gamma / std * (x - mean) / std, axis=-1)
-    AType sum_val0 = 0;  // Stores mean(out_grad * gamma / std, axis=-1)
-    AType sum_val1 = 0;  // Stores mean(out_grad * gamma / std * (x - mean) / std, axis=-1)
-    AType mean = static_cast<AType>(mean_data[bid]);
+    AType sum_val0   = 0;  // Stores mean(out_grad * gamma / std, axis=-1)
+    AType sum_val1   = 0;  // Stores mean(out_grad * gamma / std * (x - mean) / std, axis=-1)
+    AType mean       = static_cast<AType>(mean_data[bid]);
     AType invstd_eps = AType(1) / static_cast<AType>(std_data[bid]);
-    int l = LOAD_UNROLL * tid;
+    int l            = LOAD_UNROLL * tid;
     for (; l + LOAD_UNROLL - 1 < nchannel; l += nthread * LOAD_UNROLL) {
 #pragma unroll
       for (int i = 0; i < LOAD_UNROLL; ++i) {
-        AType ele_og = static_cast<AType>(out_grad[bid * nchannel + l + i]);
-        AType ele_x = static_cast<AType>(in_data[bid * nchannel + l + i]);
+        AType ele_og    = static_cast<AType>(out_grad[bid * nchannel + l + i]);
+        AType ele_x     = static_cast<AType>(in_data[bid * nchannel + l + i]);
         AType ele_gamma = static_cast<AType>(gamma[l + i]);
         sum_val0 += ele_og * ele_gamma * invstd_eps;
         sum_val1 += ele_og * ele_gamma * (ele_x - mean) * invstd_eps * invstd_eps;
       }
     }
     for (; l < nchannel; ++l) {
-      AType ele_og = static_cast<AType>(out_grad[bid * nchannel + l]);
-      AType ele_x = static_cast<AType>(in_data[bid * nchannel + l]);
+      AType ele_og    = static_cast<AType>(out_grad[bid * nchannel + l]);
+      AType ele_x     = static_cast<AType>(in_data[bid * nchannel + l]);
       AType ele_gamma = static_cast<AType>(gamma[l]);
       sum_val0 += ele_og * ele_gamma * invstd_eps;
       sum_val1 += ele_og * ele_gamma * (ele_x - mean) * invstd_eps * invstd_eps;
@@ -626,10 +682,10 @@ __global__ void LayerNormFusedBackwardKernel_Data(const int nbatch,
     if (blockDim.y > 1) {
       AType* sum_val0_buf = reinterpret_cast<AType*>(buf);
       AType* sum_val1_buf =
-        reinterpret_cast<AType*>(buf + blockDim.y / 2 * blockDim.x * sizeof(AType));
+          reinterpret_cast<AType*>(buf + blockDim.y / 2 * blockDim.x * sizeof(AType));
       for (int offset = blockDim.y / 2; offset > 0; offset >>= 1) {
         if (threadIdx.y >= offset && threadIdx.y < 2 * offset) {
-          const int idx = (threadIdx.y - offset) * blockDim.x + threadIdx.x;
+          const int idx     = (threadIdx.y - offset) * blockDim.x + threadIdx.x;
           sum_val0_buf[idx] = sum_val0;
           sum_val1_buf[idx] = sum_val1;
         }
@@ -655,37 +711,41 @@ __global__ void LayerNormFusedBackwardKernel_Data(const int nbatch,
     //      out_grad * gamma / std - sum_val0 - (x - mean) / std * sum_val1
     for (int l = tid; l < nchannel; l += nthread) {
       AType ele_out_grad = static_cast<AType>(out_grad[bid * nchannel + l]);
-      AType ele_x = static_cast<AType>(in_data[bid * nchannel + l]);
-      AType ele_gamma = static_cast<AType>(gamma[l]);
+      AType ele_x        = static_cast<AType>(in_data[bid * nchannel + l]);
+      AType ele_gamma    = static_cast<AType>(gamma[l]);
       if (data_addto) {
         data_grad[bid * nchannel + l] +=
-          static_cast<DType>(ele_out_grad * ele_gamma * invstd_eps
-                               - sum_val0 - (ele_x - mean) * invstd_eps * sum_val1);
+            static_cast<DType>(ele_out_grad * ele_gamma * invstd_eps - sum_val0 -
+                               (ele_x - mean) * invstd_eps * sum_val1);
       } else {
         data_grad[bid * nchannel + l] =
-          static_cast<DType>(ele_out_grad * ele_gamma * invstd_eps - sum_val0
-                                               - (ele_x - mean) * invstd_eps * sum_val1);
+            static_cast<DType>(ele_out_grad * ele_gamma * invstd_eps - sum_val0 -
+                               (ele_x - mean) * invstd_eps * sum_val1);
       }
     }
   }
 }
 
-void GetGammaBetaGradKernelParams(const int nbatch, const int nchannel,
-                                  dim3* part_grad_block_dim, dim3* part_grad_grid_dim,
-                                  dim3* gb_block_dim, dim3* gb_grid_dim,
+void GetGammaBetaGradKernelParams(const int nbatch,
+                                  const int nchannel,
+                                  dim3* part_grad_block_dim,
+                                  dim3* part_grad_grid_dim,
+                                  dim3* gb_block_dim,
+                                  dim3* gb_grid_dim,
                                   int* npart) {
-  *npart = 16;
+  *npart               = 16;
   *part_grad_block_dim = dim3(32, 16);
-  *part_grad_grid_dim = dim3((nchannel + 32 - 1) / 32, *npart);
-  *gb_block_dim = dim3(32, *npart);
-  *gb_grid_dim = dim3((nchannel + 32 - 1) / 32);
+  *part_grad_grid_dim  = dim3((nchannel + 32 - 1) / 32, *npart);
+  *gb_block_dim        = dim3(32, *npart);
+  *gb_grid_dim         = dim3((nchannel + 32 - 1) / 32);
   CheckLaunchParam(*part_grad_grid_dim, *part_grad_block_dim);
   CheckLaunchParam(*gb_grid_dim, *gb_block_dim);
 }
 
-template<bool safe_acc = false>
+template <bool safe_acc = false>
 void LayerNormGradGPUContig(const LayerNormParam param,
-                            const OpContext& ctx, const std::vector<TBlob>& inputs,
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
@@ -694,14 +754,14 @@ void LayerNormGradGPUContig(const LayerNormParam param,
 #else
   CHECK_EQ(inputs.size(), 5U);
 #endif
-  const TBlob out_grad = inputs[0];
-  const TBlob in_data = inputs[1];
-  const TBlob gamma = inputs[2];
-  const TBlob mean_data = inputs[3];
-  const TBlob std_data = inputs[4];
-  const TBlob data_grad = outputs[0];
+  const TBlob out_grad   = inputs[0];
+  const TBlob in_data    = inputs[1];
+  const TBlob gamma      = inputs[2];
+  const TBlob mean_data  = inputs[3];
+  const TBlob std_data   = inputs[4];
+  const TBlob data_grad  = outputs[0];
   const TBlob gamma_grad = outputs[1];
-  const TBlob beta_grad = outputs[2];
+  const TBlob beta_grad  = outputs[2];
 
   // Make sure the inputs are contiguous
   CHECK_EQ(out_grad.CheckContiguous(), true);
@@ -709,15 +769,15 @@ void LayerNormGradGPUContig(const LayerNormParam param,
   CHECK_EQ(gamma.CheckContiguous(), true);
   CHECK_EQ(mean_data.CheckContiguous(), true);
   CHECK_EQ(std_data.CheckContiguous(), true);
-  int nbatch = in_data.shape_.ProdShape(0, in_data.ndim() - 1);
-  int nchannel = in_data.shape_[in_data.ndim() - 1];
-  int data_grad_req = req[0];
+  int nbatch         = in_data.shape_.ProdShape(0, in_data.ndim() - 1);
+  int nchannel       = in_data.shape_[in_data.ndim() - 1];
+  int data_grad_req  = req[0];
   int gamma_grad_req = req[1];
-  int beta_grad_req = req[2];
+  int beta_grad_req  = req[2];
   CHECK_NE(data_grad_req, kWriteInplace);
   CHECK_NE(gamma_grad_req, kWriteInplace);
   CHECK_NE(beta_grad_req, kWriteInplace);
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s      = ctx.get_stream<gpu>();
   cudaStream_t stream = Stream<gpu>::GetStream(s);
 
   // Calculate the gradient for gamma/beta
@@ -725,45 +785,73 @@ void LayerNormGradGPUContig(const LayerNormParam param,
   CHECK_EQ(beta_grad.CheckContiguous(), true);
   dim3 part_grad_block_dim, part_grad_grid_dim, gb_block_dim, gb_grid_dim;
   int npart;
-  GetGammaBetaGradKernelParams(nbatch, nchannel, &part_grad_block_dim, &part_grad_grid_dim,
-                               &gb_block_dim, &gb_grid_dim, &npart);
+  GetGammaBetaGradKernelParams(nbatch,
+                               nchannel,
+                               &part_grad_block_dim,
+                               &part_grad_grid_dim,
+                               &gb_block_dim,
+                               &gb_grid_dim,
+                               &npart);
   if (gamma_grad_req != kNullOp || beta_grad_req != kNullOp) {
     MXNET_REAL_ACC_TYPE_SWITCH(in_data.type_flag_, DType, AccType, {
       typedef typename std::conditional<safe_acc, AccType, DType>::type AType;
       Tensor<gpu, 1, AType> workspace =
-        ctx.requested[0].get_space_typed<gpu, 1, AType>(Shape1(2 * npart * nchannel), s);
+          ctx.requested[0].get_space_typed<gpu, 1, AType>(Shape1(2 * npart * nchannel), s);
       AType* part_gamma_grad_ptr = workspace.dptr_;
-      AType* part_beta_grad_ptr = workspace.dptr_ + npart * nchannel;
-      const int nshared_K1 = 2 * (part_grad_block_dim.x + 1)
-                               * part_grad_block_dim.y * sizeof(AType);
-      const int nshared_K2 = 2 * gb_block_dim.x * gb_block_dim.y * sizeof(AType);
+      AType* part_beta_grad_ptr  = workspace.dptr_ + npart * nchannel;
+      const int nshared_K1 =
+          2 * (part_grad_block_dim.x + 1) * part_grad_block_dim.y * sizeof(AType);
+      const int nshared_K2  = 2 * gb_block_dim.x * gb_block_dim.y * sizeof(AType);
       DType* gamma_grad_ptr = (gamma_grad_req != kNullOp) ? gamma_grad.dptr<DType>() : nullptr;
-      DType* beta_grad_ptr = (beta_grad_req != kNullOp) ? beta_grad.dptr<DType>() : nullptr;
-      LayerNormFusedBackwardKernel_PartGammaBeta
-        <<<part_grad_grid_dim, part_grad_block_dim, nshared_K1, stream>>>
-        (nbatch, nchannel, in_data.dptr<DType>(), out_grad.dptr<DType>(),
-         mean_data.dptr<DType>(), std_data.dptr<DType>(), part_gamma_grad_ptr, part_beta_grad_ptr);
+      DType* beta_grad_ptr  = (beta_grad_req != kNullOp) ? beta_grad.dptr<DType>() : nullptr;
+      LayerNormFusedBackwardKernel_PartGammaBeta<<<part_grad_grid_dim,
+                                                   part_grad_block_dim,
+                                                   nshared_K1,
+                                                   stream>>>(nbatch,
+                                                             nchannel,
+                                                             in_data.dptr<DType>(),
+                                                             out_grad.dptr<DType>(),
+                                                             mean_data.dptr<DType>(),
+                                                             std_data.dptr<DType>(),
+                                                             part_gamma_grad_ptr,
+                                                             part_beta_grad_ptr);
       MSHADOW_CUDA_POST_KERNEL_CHECK(LayerNormFusedBackwardKernel_PartGammaBeta);
       if (gamma_grad_req == kAddTo && beta_grad_req != kAddTo) {
         LayerNormFusedBackwardKernel_GammaBeta<true, false>
-          <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>
-          (nbatch, nchannel, npart, part_gamma_grad_ptr, part_beta_grad_ptr,
-           gamma_grad_ptr, beta_grad_ptr);
+            <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>(nbatch,
+                                                                nchannel,
+                                                                npart,
+                                                                part_gamma_grad_ptr,
+                                                                part_beta_grad_ptr,
+                                                                gamma_grad_ptr,
+                                                                beta_grad_ptr);
       } else if (gamma_grad_req != kAddTo && beta_grad_req == kAddTo) {
         LayerNormFusedBackwardKernel_GammaBeta<false, true>
-          <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>
-          (nbatch, nchannel, npart, part_gamma_grad_ptr, part_beta_grad_ptr,
-            gamma_grad_ptr, beta_grad_ptr);
+            <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>(nbatch,
+                                                                nchannel,
+                                                                npart,
+                                                                part_gamma_grad_ptr,
+                                                                part_beta_grad_ptr,
+                                                                gamma_grad_ptr,
+                                                                beta_grad_ptr);
       } else if (gamma_grad_req == kAddTo && beta_grad_req == kAddTo) {
         LayerNormFusedBackwardKernel_GammaBeta<true, true>
-          <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>
-          (nbatch, nchannel, npart, part_gamma_grad_ptr, part_beta_grad_ptr,
-            gamma_grad_ptr, beta_grad_ptr);
+            <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>(nbatch,
+                                                                nchannel,
+                                                                npart,
+                                                                part_gamma_grad_ptr,
+                                                                part_beta_grad_ptr,
+                                                                gamma_grad_ptr,
+                                                                beta_grad_ptr);
       } else {
         LayerNormFusedBackwardKernel_GammaBeta<false, false>
-          <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>
-          (nbatch, nchannel, npart, part_gamma_grad_ptr, part_beta_grad_ptr,
-            gamma_grad_ptr, beta_grad_ptr);
+            <<<gb_grid_dim, gb_block_dim, nshared_K2, stream>>>(nbatch,
+                                                                nchannel,
+                                                                npart,
+                                                                part_gamma_grad_ptr,
+                                                                part_beta_grad_ptr,
+                                                                gamma_grad_ptr,
+                                                                beta_grad_ptr);
       }
     });
     MSHADOW_CUDA_POST_KERNEL_CHECK(LayerNormFusedBackwardKernel_GammaBeta);
@@ -793,27 +881,38 @@ void LayerNormGradGPUContig(const LayerNormParam param,
       CheckLaunchParam(data_grid_dim, data_block_dim);
       if (data_grad_req == kAddTo) {
         LayerNormFusedBackwardKernel_Data<LOAD_UNROLL, true, AType>
-          <<<data_grid_dim, data_block_dim, nshared, stream>>>
-          (nbatch, nchannel, in_data.dptr<DType>(), out_grad.dptr<DType>(), mean_data.dptr<DType>(),
-           std_data.dptr<DType>(), gamma.dptr<DType>(), data_grad.dptr<DType>());
+            <<<data_grid_dim, data_block_dim, nshared, stream>>>(nbatch,
+                                                                 nchannel,
+                                                                 in_data.dptr<DType>(),
+                                                                 out_grad.dptr<DType>(),
+                                                                 mean_data.dptr<DType>(),
+                                                                 std_data.dptr<DType>(),
+                                                                 gamma.dptr<DType>(),
+                                                                 data_grad.dptr<DType>());
       } else {
         LayerNormFusedBackwardKernel_Data<LOAD_UNROLL, false, AType>
-          <<<data_grid_dim, data_block_dim, nshared, stream>>>
-          (nbatch, nchannel, in_data.dptr<DType>(), out_grad.dptr<DType>(), mean_data.dptr<DType>(),
-           std_data.dptr<DType>(), gamma.dptr<DType>(), data_grad.dptr<DType>());
+            <<<data_grid_dim, data_block_dim, nshared, stream>>>(nbatch,
+                                                                 nchannel,
+                                                                 in_data.dptr<DType>(),
+                                                                 out_grad.dptr<DType>(),
+                                                                 mean_data.dptr<DType>(),
+                                                                 std_data.dptr<DType>(),
+                                                                 gamma.dptr<DType>(),
+                                                                 data_grad.dptr<DType>());
       }
     });
     MSHADOW_CUDA_POST_KERNEL_CHECK(LayerNormFusedBackwardKernel_Data);
   }
 }
 
-template<>
+template <>
 void LayerNormGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
-                               const OpContext& ctx, const std::vector<TBlob>& inputs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
   const LayerNormParam& param = nnvm::get<LayerNormParam>(attrs.parsed);
-  int axis = param.axis;
+  int axis                    = param.axis;
   if (axis < 0) {
     axis += static_cast<int>(inputs[0].ndim());
   }
@@ -830,12 +929,10 @@ void LayerNormGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
   return LayerNormGradComputeGeneral<gpu>(attrs, ctx, inputs, req, outputs);
 }
 
-
-NNVM_REGISTER_OP(LayerNorm)
-.set_attr<FCompute>("FCompute<gpu>", LayerNormCompute<gpu>);
+NNVM_REGISTER_OP(LayerNorm).set_attr<FCompute>("FCompute<gpu>", LayerNormCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_LayerNorm)
-.set_attr<FCompute>("FCompute<gpu>", LayerNormGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", LayerNormGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/log_softmax.cc b/src/operator/nn/log_softmax.cc
index 6275d54b1653..7aa7e117a792 100644
--- a/src/operator/nn/log_softmax.cc
+++ b/src/operator/nn/log_softmax.cc
@@ -40,7 +40,8 @@ static void LogSoftmaxComputeExCPU(const nnvm::NodeAttrs& attrs,
                                    const std::vector<NDArray>& inputs,
                                    const std::vector<OpReqType>& req,
                                    const std::vector<NDArray>& outputs) {
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
   if (SupportMKLDNNLogSoftmax(param, inputs[0], outputs[0])) {
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
@@ -49,8 +50,7 @@ static void LogSoftmaxComputeExCPU(const nnvm::NodeAttrs& attrs,
     MKLDNN_OPCHECK_RUN(fn, attrs, ctx, inputs, req, outputs);
     return;
   }
-  FallBackCompute(SoftmaxCompute<cpu, mxnet_op::log_softmax_fwd>, attrs, ctx,
-                  inputs, req, outputs);
+  FallBackCompute(SoftmaxCompute<cpu, mxnet_op::log_softmax_fwd>, attrs, ctx, inputs, req, outputs);
 }
 
 static void LogSoftmaxGradComputeExCPU(const nnvm::NodeAttrs& attrs,
@@ -58,7 +58,8 @@ static void LogSoftmaxGradComputeExCPU(const nnvm::NodeAttrs& attrs,
                                        const std::vector<NDArray>& inputs,
                                        const std::vector<OpReqType>& req,
                                        const std::vector<NDArray>& outputs) {
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
   if (SupportMKLDNNLogSoftmax(param, inputs[1], outputs[0])) {
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
@@ -68,30 +69,33 @@ static void LogSoftmaxGradComputeExCPU(const nnvm::NodeAttrs& attrs,
     return;
   }
   FallBackCompute(SoftmaxGradCompute<cpu, op::mshadow_op::left, mxnet_op::log_softmax_bwd>,
-                  attrs, ctx, inputs, req, outputs);
+                  attrs,
+                  ctx,
+                  inputs,
+                  req,
+                  outputs);
 }
 
 inline static bool LogSoftmaxStorageType(const nnvm::NodeAttrs& attrs,
                                          const int dev_mask,
                                          DispatchMode* dispatch_mode,
-                                         std::vector<int> *in_attrs,
-                                         std::vector<int> *out_attrs) {
-  CHECK_EQ(in_attrs->size(),  1U);
+                                         std::vector<int>* in_attrs,
+                                         std::vector<int>* out_attrs) {
+  CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
 inline static bool LogSoftmaxGradStorageType(const nnvm::NodeAttrs& attrs,
                                              const int dev_mask,
                                              DispatchMode* dispatch_mode,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-  bool support = true;
+                                             std::vector<int>* in_attrs,
+                                             std::vector<int>* out_attrs) {
+  bool support   = true;
   int num_inputs = 2U;
   if (softmax_has_dtype_override(attrs)) {
-    support = false;
+    support    = false;
     num_inputs = 3U;
   }
 
@@ -102,8 +106,8 @@ inline static bool LogSoftmaxGradStorageType(const nnvm::NodeAttrs& attrs,
 #endif
 
 NNVM_REGISTER_OP(log_softmax)
-.add_alias("_npx_log_softmax")
-.describe(R"code(Computes the log softmax of the input.
+    .add_alias("_npx_log_softmax")
+    .describe(R"code(Computes the log softmax of the input.
 This is equivalent to computing softmax followed by log.
 
 Examples::
@@ -119,103 +123,105 @@ Examples::
 
 
 )code")
-.set_attr_parser(ParamParser<SoftmaxParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs){
-      return std::vector<std::string>{"data"};
-})
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxCompute<cpu, mxnet_op::log_softmax_fwd>)
+    .set_attr_parser(ParamParser<SoftmaxParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxCompute<cpu, mxnet_op::log_softmax_fwd>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LogSoftmaxComputeExCPU)
-.set_attr<FInferStorageType>("FInferStorageType", LogSoftmaxStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LogSoftmaxComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", LogSoftmaxStorageType)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", SoftmaxFGradient{"_backward_log_softmax"})
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxOpType)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array.")
-.add_arguments(SoftmaxParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", SoftmaxFGradient{"_backward_log_softmax"})
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxOpType)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "The input array.")
+    .add_arguments(SoftmaxParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_log_softmax)
-.set_num_inputs(SoftmaxGradOpNumInputs)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", SoftmaxGradOpInputNames)
-.set_attr<mxnet::FInferShape>("FInferShape", SoftmaxGradOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxGradOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", SoftmaxGradOpInplaceOption)
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
-.set_attr_parser(ParamParser<SoftmaxParam>)
+    .set_num_inputs(SoftmaxGradOpNumInputs)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames", SoftmaxGradOpInputNames)
+    .set_attr<mxnet::FInferShape>("FInferShape", SoftmaxGradOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxGradOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption", SoftmaxGradOpInplaceOption)
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
+    .set_attr_parser(ParamParser<SoftmaxParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LogSoftmaxGradComputeExCPU)
-.set_attr<FInferStorageType>("FInferStorageType", LogSoftmaxGradStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LogSoftmaxGradComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", LogSoftmaxGradStorageType)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxGradCompute<cpu, mshadow_op::left,
-                                                        mxnet_op::log_softmax_bwd>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        SoftmaxGradCompute<cpu, mshadow_op::left, mxnet_op::log_softmax_bwd>);
 
 NNVM_REGISTER_OP(masked_log_softmax)
-.add_alias("_npx_masked_log_softmax")
-.describe(R"code(Computes the masked log softmax of the input.
+    .add_alias("_npx_masked_log_softmax")
+    .describe(R"code(Computes the masked log softmax of the input.
 This is equivalent to computing masked softmax followed by log.)code")
-.set_attr_parser(ParamParser<MaskedSoftmaxParam>)
-.set_attr<nnvm::FListOutputNames>("FListInputNames",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::string>{"data", "mask"};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MaskedSoftmaxCompute<cpu, mxnet_op::log_softmax_fwd,
-                                     true>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto data_grad = MakeNode("_backward_masked_log_softmax", n->attrs.name + "_backward_data",
-                              {ograds[0], n->inputs[1], nnvm::NodeEntry(n, 0, 0)},
-                              &n->attrs.dict, &n);
-    auto mask_grad = MakeNode("zeros_like", n->attrs.name + "_backward_mask",
-                              {n->inputs[1]}, nullptr, &n);
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(data_grad);
-    ret.emplace_back(mask_grad);
-    return ret;
-  })
-.set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxOpType)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxOpShape)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array.")
-.add_argument("mask", "NDArray-or-Symbol", "Mask to apply.")
-.add_arguments(MaskedSoftmaxParam::__FIELDS__());
+    .set_attr_parser(ParamParser<MaskedSoftmaxParam>)
+    .set_attr<nnvm::FListOutputNames>("FListInputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"data", "mask"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", MaskedSoftmaxCompute<cpu, mxnet_op::log_softmax_fwd, true>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto data_grad = MakeNode("_backward_masked_log_softmax",
+                                    n->attrs.name + "_backward_data",
+                                    {ograds[0], n->inputs[1], nnvm::NodeEntry(n, 0, 0)},
+                                    &n->attrs.dict,
+                                    &n);
+          auto mask_grad =
+              MakeNode("zeros_like", n->attrs.name + "_backward_mask", {n->inputs[1]}, nullptr, &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(data_grad);
+          ret.emplace_back(mask_grad);
+          return ret;
+        })
+    .set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxOpType)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxOpShape)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "The input array.")
+    .add_argument("mask", "NDArray-or-Symbol", "Mask to apply.")
+    .add_arguments(MaskedSoftmaxParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_masked_log_softmax)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListOutputNames>("FListInputNames",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::string>{"ograd", "mask", "output"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxGradOpShape)
-.set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxGradOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", MaskedSoftmaxGradOpInplaceOption)
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
-.set_attr_parser(ParamParser<MaskedSoftmaxParam>)
-.set_attr<FCompute>("FCompute<cpu>", MaskedSoftmaxGradCompute<cpu, mshadow_op::left,
-                                                              mxnet_op::log_softmax_bwd>);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListOutputNames>("FListInputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"ograd", "mask", "output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxGradOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxGradOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption", MaskedSoftmaxGradOpInplaceOption)
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
+    .set_attr_parser(ParamParser<MaskedSoftmaxParam>)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        MaskedSoftmaxGradCompute<cpu, mshadow_op::left, mxnet_op::log_softmax_bwd>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/log_softmax.cu b/src/operator/nn/log_softmax.cu
index 485290dc4fa3..95a1c5c8b554 100644
--- a/src/operator/nn/log_softmax.cu
+++ b/src/operator/nn/log_softmax.cu
@@ -29,18 +29,18 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(log_softmax)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCCompute{"log_softmax_fwd"});
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCCompute{"log_softmax_fwd"});
 
 NNVM_REGISTER_OP(_backward_log_softmax)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCGradCompute{"op::left", "log_softmax_bwd"});
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCGradCompute{"op::left", "log_softmax_bwd"});
 
 NNVM_REGISTER_OP(masked_log_softmax)
-.set_attr<FCompute>("FCompute<gpu>", MaskedSoftmaxCompute<gpu, mxnet_op::log_softmax_fwd,
-                                                          true>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        MaskedSoftmaxCompute<gpu, mxnet_op::log_softmax_fwd, true>);
 
 NNVM_REGISTER_OP(_backward_masked_log_softmax)
-.set_attr<FCompute>("FCompute<gpu>", MaskedSoftmaxGradCompute<gpu, mshadow_op::left,
-                                                              mxnet_op::log_softmax_bwd>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        MaskedSoftmaxGradCompute<gpu, mshadow_op::left, mxnet_op::log_softmax_bwd>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/lrn-inl.h b/src/operator/nn/lrn-inl.h
index 7bd914485335..d8417955e5d5 100644
--- a/src/operator/nn/lrn-inl.h
+++ b/src/operator/nn/lrn-inl.h
@@ -22,7 +22,7 @@
  * \file lrn-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_LRN_INL_H_
 #define MXNET_OPERATOR_NN_LRN_INL_H_
 #include <dmlc/logging.h>
@@ -39,8 +39,8 @@ namespace mxnet {
 namespace op {
 
 namespace lrn_enum {
-enum LRNInputs {kData};
-enum LRNOutputs {kOut, kTmpNorm};
+enum LRNInputs { kData };
+enum LRNOutputs { kOut, kTmpNorm };
 }  // namespace lrn_enum
 
 struct LRNParam : public dmlc::Parameter<LRNParam> {
@@ -49,20 +49,18 @@ struct LRNParam : public dmlc::Parameter<LRNParam> {
   float knorm;
   uint32_t nsize;
   DMLC_DECLARE_PARAMETER(LRNParam) {
-    DMLC_DECLARE_FIELD(alpha).set_default(1e-4f)
-    .describe("The variance scaling parameter :math:`\alpha` in the LRN expression.");
-    DMLC_DECLARE_FIELD(beta).set_default(0.75f)
-    .describe("The power parameter :math:`\beta` in the LRN expression.");
-    DMLC_DECLARE_FIELD(knorm).set_default(2.0f)
-    .describe("The parameter :math:`k` in the LRN expression.");
-    DMLC_DECLARE_FIELD(nsize)
-    .describe("normalization window width in elements.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1e-4f).describe(
+        "The variance scaling parameter :math:`\alpha` in the LRN expression.");
+    DMLC_DECLARE_FIELD(beta).set_default(0.75f).describe(
+        "The power parameter :math:`\beta` in the LRN expression.");
+    DMLC_DECLARE_FIELD(knorm).set_default(2.0f).describe(
+        "The parameter :math:`k` in the LRN expression.");
+    DMLC_DECLARE_FIELD(nsize).describe("normalization window width in elements.");
   }
 
   bool operator==(const LRNParam& other) const {
-    return (this->nsize == other.nsize &&
-            std::fabs(this->alpha - other.alpha) < 1e-6 &&
-            std::fabs(this->beta  - other.beta)  < 1e-6 &&
+    return (this->nsize == other.nsize && std::fabs(this->alpha - other.alpha) < 1e-6 &&
+            std::fabs(this->beta - other.beta) < 1e-6 &&
             std::fabs(this->knorm - other.knorm) < 1e-6);
   }
 };  // struct LRNParam
@@ -71,14 +69,14 @@ struct LRNParam : public dmlc::Parameter<LRNParam> {
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::LRNParam> {
   size_t operator()(const mxnet::op::LRNParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.alpha);
-    ret = dmlc::HashCombine(ret, val.beta);
-    ret = dmlc::HashCombine(ret, val.knorm);
-    ret = dmlc::HashCombine(ret, val.nsize);
+    ret        = dmlc::HashCombine(ret, val.alpha);
+    ret        = dmlc::HashCombine(ret, val.beta);
+    ret        = dmlc::HashCombine(ret, val.knorm);
+    ret        = dmlc::HashCombine(ret, val.nsize);
     return ret;
   }
 };
@@ -87,11 +85,12 @@ struct hash<mxnet::op::LRNParam> {
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
-void LRNForward(const nnvm::NodeAttrs& attrs, const OpContext &ctx,
-                const std::vector<TBlob> &in_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &out_data) {
+template <typename xpu>
+void LRNForward(const nnvm::NodeAttrs& attrs,
+                const OpContext& ctx,
+                const std::vector<TBlob>& in_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
   const LRNParam& param_ = nnvm::get<LRNParam>(attrs.parsed);
@@ -100,54 +99,62 @@ void LRNForward(const nnvm::NodeAttrs& attrs, const OpContext &ctx,
   CHECK_EQ(out_data.size(), 2U);
   // CHECK_EQ(req.size(), 2);
   CHECK_EQ(param_.nsize % 2, 1U) << "LRN only supports odd values for local_size";
-  const real_t salpha = param_.alpha / param_.nsize;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Tensor<xpu, 4> data = in_data[lrn_enum::kData].get<xpu, 4, real_t>(s);
-  Tensor<xpu, 4> out = out_data[lrn_enum::kOut].get<xpu, 4, real_t>(s);
+  const real_t salpha     = param_.alpha / param_.nsize;
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
+  Tensor<xpu, 4> data     = in_data[lrn_enum::kData].get<xpu, 4, real_t>(s);
+  Tensor<xpu, 4> out      = out_data[lrn_enum::kOut].get<xpu, 4, real_t>(s);
   Tensor<xpu, 4> tmp_norm = out_data[lrn_enum::kTmpNorm].get<xpu, 4, real_t>(s);
-  tmp_norm = chpool<red::sum>(F<mshadow_op::square>(data) , param_.nsize) * salpha + param_.knorm;
-  Assign(out, req[lrn_enum::kOut], data *  F<mshadow_op::power>(tmp_norm, -param_.beta));
+  tmp_norm = chpool<red::sum>(F<mshadow_op::square>(data), param_.nsize) * salpha + param_.knorm;
+  Assign(out, req[lrn_enum::kOut], data * F<mshadow_op::power>(tmp_norm, -param_.beta));
 }
 
-template<typename xpu>
-void LRNBackward(const nnvm::NodeAttrs& attrs, const OpContext &ctx,
-                 const TBlob &out_grad, const TBlob &in_data,
-                 const TBlob &out_norm, const OpReqType &req,
-                 const TBlob &in_grad) {
+template <typename xpu>
+void LRNBackward(const nnvm::NodeAttrs& attrs,
+                 const OpContext& ctx,
+                 const TBlob& out_grad,
+                 const TBlob& in_data,
+                 const TBlob& out_norm,
+                 const OpReqType& req,
+                 const TBlob& in_grad) {
   // LRNBackwards does not support kAddTo or kWriteInPlace
   using namespace mshadow;
   using namespace mshadow::expr;
-  const LRNParam& param_ = nnvm::get<LRNParam>(attrs.parsed);
-  const real_t salpha = param_.alpha / param_.nsize;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Tensor<xpu, 4> grad = out_grad.get<xpu, 4, real_t>(s);
+  const LRNParam& param_  = nnvm::get<LRNParam>(attrs.parsed);
+  const real_t salpha     = param_.alpha / param_.nsize;
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
+  Tensor<xpu, 4> grad     = out_grad.get<xpu, 4, real_t>(s);
   Tensor<xpu, 4> tmp_norm = out_norm.get<xpu, 4, real_t>(s);
-  Tensor<xpu, 4> data = in_data.get<xpu, 4, real_t>(s);
-  Tensor<xpu, 4> grad_in = in_grad.get<xpu, 4, real_t>(s);
-  grad_in = grad * F<mshadow_op::power>(tmp_norm, -param_.beta);
-  grad_in += (- 2.0f * param_.beta * salpha) *
-      chpool<red::sum>(grad * data *
-                       F<mshadow_op::power>(tmp_norm, -param_.beta - 1.0f),
-                       param_.nsize)  * data;
+  Tensor<xpu, 4> data     = in_data.get<xpu, 4, real_t>(s);
+  Tensor<xpu, 4> grad_in  = in_grad.get<xpu, 4, real_t>(s);
+  grad_in                 = grad * F<mshadow_op::power>(tmp_norm, -param_.beta);
+  grad_in += (-2.0f * param_.beta * salpha) *
+             chpool<red::sum>(grad * data * F<mshadow_op::power>(tmp_norm, -param_.beta - 1.0f),
+                              param_.nsize) *
+             data;
 }
 
-template<typename xpu>
-void LRNCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void LRNCompute(const nnvm::NodeAttrs& attrs,
+                const OpContext& ctx,
                 const std::vector<TBlob>& inputs,
                 const std::vector<OpReqType>& req,
                 const std::vector<TBlob>& outputs) {
   LRNForward<xpu>(attrs, ctx, inputs, req, outputs);
 }
 
-template<typename xpu>
-void LRNGradCompute(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void LRNGradCompute(const nnvm::NodeAttrs& attrs,
+                    const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
                     const std::vector<OpReqType>& req,
                     const std::vector<TBlob>& outputs) {
-  LRNBackward<xpu>(attrs, ctx, inputs[0],  // out_grad
-                   inputs[1],              // in_data
-                   inputs[2],              // out_norm
-                   req[lrn_enum::kData], outputs[lrn_enum::kData]);
+  LRNBackward<xpu>(attrs,
+                   ctx,
+                   inputs[0],  // out_grad
+                   inputs[1],  // in_data
+                   inputs[2],  // out_norm
+                   req[lrn_enum::kData],
+                   outputs[lrn_enum::kData]);
 }
 
 }  // namespace op
diff --git a/src/operator/nn/lrn.cc b/src/operator/nn/lrn.cc
index 920f34ad393a..92507fc60a45 100644
--- a/src/operator/nn/lrn.cc
+++ b/src/operator/nn/lrn.cc
@@ -22,7 +22,7 @@
  * \file lrn.cc
  * \brief
  * \author Bing Xu, Patric Zhao (patric.zhao@intel.com)
-*/
+ */
 
 #include "./lrn-inl.h"
 #include "../operator_common.h"
@@ -35,12 +35,13 @@ namespace mxnet {
 namespace op {
 
 bool LRNShape(const nnvm::NodeAttrs& attrs,
-              mxnet::ShapeVector *in_shape,
-              mxnet::ShapeVector *out_shape) {
+              mxnet::ShapeVector* in_shape,
+              mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   CHECK_EQ(in_shape->size(), 1U) << "Input:[data]";
-  const mxnet::TShape &dshape = in_shape->at(0);
-  if (!shape_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = in_shape->at(0);
+  if (!shape_is_known(dshape))
+    return false;
   out_shape->clear();
   out_shape->push_back(dshape);
   out_shape->push_back(dshape);
@@ -51,9 +52,7 @@ inline std::vector<std::string> ListArguments() {
   return {"data"};
 }
 
-bool LRNType(const nnvm::NodeAttrs& attrs,
-             std::vector<int> *in_type,
-             std::vector<int> *out_type) {
+bool LRNType(const nnvm::NodeAttrs& attrs, std::vector<int>* in_type, std::vector<int>* out_type) {
   CHECK_GE(in_type->size(), 1U);
   int dtype = (*in_type)[0];
   CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -66,14 +65,15 @@ bool LRNType(const nnvm::NodeAttrs& attrs,
   }
   int n_out = 2;
   out_type->clear();
-  for (int i = 0; i < n_out; ++i ) out_type->push_back(dtype);
+  for (int i = 0; i < n_out; ++i)
+    out_type->push_back(dtype);
   return true;
 }
 
 struct LRNGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
-                const std::vector<nnvm::NodeEntry>& ograds) const {
+                                          const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads;
     heads.push_back(ograds[0]);  // out_grad
     heads.push_back(n->inputs[lrn_enum::kData]);
@@ -86,30 +86,28 @@ struct LRNGrad {
 bool LRNForwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                 const int dev_mask,
                                 DispatchMode* dispatch_mode,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK(!in_attrs->empty());
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
 bool LRNBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                  const int dev_mask,
                                  DispatchMode* dispatch_mode,
-                                 std::vector<int> *in_attrs,
-                                 std::vector<int> *out_attrs) {
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
   CHECK(!in_attrs->empty());
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
-void LRNComputeExCPU(const nnvm::NodeAttrs &attrs,
-                     const OpContext &ctx,
-                     const std::vector<NDArray> &inputs,
-                     const std::vector<OpReqType> &req,
-                     const std::vector<NDArray> &outputs) {
+void LRNComputeExCPU(const nnvm::NodeAttrs& attrs,
+                     const OpContext& ctx,
+                     const std::vector<NDArray>& inputs,
+                     const std::vector<OpReqType>& req,
+                     const std::vector<NDArray>& outputs) {
   if (SupportMKLDNN(inputs[0])) {
     // We only need to test one output array.
     MKLDNN_OPCHECK_INIT(false, 1, inputs, outputs);
@@ -122,11 +120,11 @@ void LRNComputeExCPU(const nnvm::NodeAttrs &attrs,
   FallBackCompute(LRNCompute<cpu>, attrs, ctx, inputs, req, outputs);
 }
 
-void LRNGradComputeExCPU(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<NDArray> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<NDArray> &outputs) {
+void LRNGradComputeExCPU(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<NDArray>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<NDArray>& outputs) {
   if (SupportMKLDNN(inputs[0])) {
     MKLDNN_OPCHECK_INIT(true, outputs.size(), inputs, outputs);
     MKLDNNRun(MKLDNNLRNBackward, attrs, ctx, inputs, req, outputs);
@@ -140,7 +138,7 @@ void LRNGradComputeExCPU(const nnvm::NodeAttrs &attrs,
 DMLC_REGISTER_PARAMETER(LRNParam);
 
 NNVM_REGISTER_OP(LRN)
-.describe(R"code(Applies local response normalization to the input.
+    .describe(R"code(Applies local response normalization to the input.
 
 The local response normalization layer performs "lateral inhibition" by normalizing
 over local input regions.
@@ -156,48 +154,48 @@ where the sum runs over :math:`n` "adjacent" kernel maps at the same spatial pos
 number of kernels in the layer.
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-                                    [](const NodeAttrs& attrs) { return 1; })
-.set_attr_parser(ParamParser<LRNParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", LRNShape)
-.set_attr<nnvm::FInferType>("FInferType", LRNType)
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr_parser(ParamParser<LRNParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", LRNShape)
+    .set_attr<nnvm::FInferType>("FInferType", LRNType)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", LRNForwardInferStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", LRNForwardInferStorageType)
 #endif
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "tmp_norm"};
-})
-.set_attr<FCompute>("FCompute<cpu>", LRNCompute<cpu>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output", "tmp_norm"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", LRNCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LRNComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LRNComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", LRNGrad{"_backward_LRN"})
-.add_argument("data", "NDArray-or-Symbol", "Input data to LRN")
-.add_arguments(LRNParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", LRNGrad{"_backward_LRN"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data to LRN")
+    .add_arguments(LRNParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_LRN)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LRNParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LRNParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", LRNBackwardInferStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", LRNBackwardInferStorageType)
 #endif
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", LRNGradComputeExCPU)
-// Native compute requires norm while MKLDNN does not so cannot be compared in debug mode
-.set_attr<bool>("TExcludeMKLDNNDebug", true)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LRNGradComputeExCPU)
+    // Native compute requires norm while MKLDNN does not so cannot be compared in debug mode
+    .set_attr<bool>("TExcludeMKLDNNDebug", true)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", LRNGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", LRNGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/lrn.cu b/src/operator/nn/lrn.cu
index 4c31ca96025c..ae8f7316bdbc 100644
--- a/src/operator/nn/lrn.cu
+++ b/src/operator/nn/lrn.cu
@@ -22,20 +22,16 @@
  * \file lrn.cu
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./lrn-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(LRN)
-.set_attr<FCompute>("FCompute<gpu>", LRNCompute<gpu>);
+NNVM_REGISTER_OP(LRN).set_attr<FCompute>("FCompute<gpu>", LRNCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_LRN)
-.set_attr<FCompute>("FCompute<gpu>", LRNGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_LRN).set_attr<FCompute>("FCompute<gpu>", LRNGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
-
diff --git a/src/operator/nn/mkldnn/mkldnn_base-inl.h b/src/operator/nn/mkldnn/mkldnn_base-inl.h
index 2af0b5f59212..278075fe929f 100644
--- a/src/operator/nn/mkldnn/mkldnn_base-inl.h
+++ b/src/operator/nn/mkldnn/mkldnn_base-inl.h
@@ -217,7 +217,7 @@ bool SupportMKLDNNLogSoftmax(const SoftmaxParam& param,
 bool SupportMKLDNNSoftmaxOutput(const SoftmaxOutputParam& param);
 bool SupportMKLDNNTranspose(const TransposeParam& param, const NDArray& data);
 bool SupportMKLDNNBatchDot(const std::vector<NDArray>& inputs, const NDArray& output);
-bool SupportMKLDNNLayerNorm(const LayerNormParam& param, const std::vector<NDArray> &inputs);
+bool SupportMKLDNNLayerNorm(const LayerNormParam& param, const std::vector<NDArray>& inputs);
 }  // namespace op
 
 static int GetTypeSize(int dtype) {
diff --git a/src/operator/nn/mkldnn/mkldnn_layer_norm.cc b/src/operator/nn/mkldnn/mkldnn_layer_norm.cc
index 8b8e122c18f2..2b63319b0fef 100644
--- a/src/operator/nn/mkldnn/mkldnn_layer_norm.cc
+++ b/src/operator/nn/mkldnn/mkldnn_layer_norm.cc
@@ -83,7 +83,7 @@ MKLDNNLayerNormFwd& MKLDNNLayerNormFwd::GetCached(const LayerNormParam& param,
 MKLDNNLayerNormFwd::MKLDNNLayerNormFwd(const LayerNormParam& param, const NDArray& data) {
   const mkldnn::memory::desc data_md = data.GetMKLDNNData()->get_desc();
   fwd_pd                             = CreatePrimitiveDesc(param, data_md);
-  fwd = std::make_shared<layernorm_fwd_t>(*fwd_pd);
+  fwd                                = std::make_shared<layernorm_fwd_t>(*fwd_pd);
 }
 
 std::shared_ptr<layernorm_fwd_pd_t> MKLDNNLayerNormFwd::CreatePrimitiveDesc(
diff --git a/src/operator/nn/mkldnn/mkldnn_ops-inl.h b/src/operator/nn/mkldnn/mkldnn_ops-inl.h
index 44a6b8fb3dd2..d9d84e68050f 100644
--- a/src/operator/nn/mkldnn/mkldnn_ops-inl.h
+++ b/src/operator/nn/mkldnn/mkldnn_ops-inl.h
@@ -166,16 +166,16 @@ void MKLDNNBatchDotForward(const nnvm::NodeAttrs& attrs,
                            const std::vector<NDArray>& outputs);
 
 /* For layer normalization */
-void MKLDNNLayerNormForward(const nnvm::NodeAttrs &attrs,
-                            const OpContext &ctx,
-                            const std::vector<NDArray> &inputs,
+void MKLDNNLayerNormForward(const nnvm::NodeAttrs& attrs,
+                            const OpContext& ctx,
+                            const std::vector<NDArray>& inputs,
                             const std::vector<OpReqType>& req,
-                            const std::vector<NDArray> &outputs);
-void MKLDNNLayerNormBackward(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<NDArray> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<NDArray> &outputs);
+                            const std::vector<NDArray>& outputs);
+void MKLDNNLayerNormBackward(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<NDArray>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<NDArray>& outputs);
 
 void MKLDNNSum(const mkldnn::memory& arr1, const mkldnn::memory& arr2, const mkldnn::memory& out);
 
diff --git a/src/operator/nn/moments-inl.h b/src/operator/nn/moments-inl.h
index 78c7e4a1cd44..0491357acd01 100644
--- a/src/operator/nn/moments-inl.h
+++ b/src/operator/nn/moments-inl.h
@@ -22,7 +22,7 @@
  * \file moments-inl.h
  * \brief Moments operator
  * \author Hao Jin
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_MOMENTS_INL_H_
 #define MXNET_OPERATOR_NN_MOMENTS_INL_H_
@@ -37,10 +37,11 @@ struct MomentsParam : public dmlc::Parameter<MomentsParam> {
   dmlc::optional<mxnet::TShape> axes;
   bool keepdims;
   DMLC_DECLARE_PARAMETER(MomentsParam) {
-    DMLC_DECLARE_FIELD(axes).set_default(dmlc::optional<mxnet::TShape>())
-      .describe("Array of ints. Axes along which to compute mean and variance.");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("produce moments with the same dimensionality as the input.");
+    DMLC_DECLARE_FIELD(axes)
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe("Array of ints. Axes along which to compute mean and variance.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "produce moments with the same dimensionality as the input.");
   }
 };
 
@@ -51,8 +52,7 @@ inline bool MomentsShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
 
-  mxnet::TShape out_shape =
-    ReduceAxesShapeImpl((*in_attrs)[0], param.axes, param.keepdims, false);
+  mxnet::TShape out_shape = ReduceAxesShapeImpl((*in_attrs)[0], param.axes, param.keepdims, false);
   if (!param.axes.has_value() || param.axes.value().ndim() == 0) {
     LOG(FATAL) << "Empty axes is not supported, if you would like to do global moments, "
                << "please pass all axes to axes argument";
@@ -76,15 +76,15 @@ inline bool MomentsType(const nnvm::NodeAttrs& attrs,
 }
 
 struct VarBroadcastKernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  DType *out,
-                                  const DType *data,
-                                  const DType *mean,
+                                  DType* out,
+                                  const DType* data,
+                                  const DType* mean,
                                   mshadow::Shape<6> data_shape,
                                   mshadow::Shape<6> mean_shape) {
-    index_t data_idx = i;
-    index_t mean_idx = i;
+    index_t data_idx    = i;
+    index_t mean_idx    = i;
     index_t data_stride = 1;
     index_t mean_stride = 1;
     for (int axis = 5; axis >= 0; --axis) {
@@ -98,11 +98,11 @@ struct VarBroadcastKernel {
       mean_stride *= mean_shape[axis];
     }
     DType res = (data[i] - mean[mean_idx]);
-    out[i] = res * res;
+    out[i]    = res * res;
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MomentsForwardImpl(const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
@@ -113,11 +113,11 @@ inline void MomentsForwardImpl(const OpContext& ctx,
   using namespace mshadow_op;
   using namespace mxnet_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   const TBlob& data = inputs[0];
   const TBlob& mean = outputs[0];
-  const TBlob& var = outputs[1];
+  const TBlob& var  = outputs[1];
 
   mxnet::TShape small;
   if (keepdims) {
@@ -139,21 +139,27 @@ inline void MomentsForwardImpl(const OpContext& ctx,
       mean_shape[i] = (i < small.ndim()) ? small[i] : 1;
     }
     Tensor<xpu, 1, DType> temp_data =
-      ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(data.shape_.Size()), s);;
-    Kernel<VarBroadcastKernel, xpu>::Launch(s, data.shape_.Size(), temp_data.dptr_,
-      data.dptr<DType>(), mean.dptr<DType>(), data_shape, mean_shape);
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(data.shape_.Size()), s);
+
+    Kernel<VarBroadcastKernel, xpu>::Launch(s,
+                                            data.shape_.Size(),
+                                            temp_data.dptr_,
+                                            data.dptr<DType>(),
+                                            mean.dptr<DType>(),
+                                            data_shape,
+                                            mean_shape);
     temp = TBlob(temp_data);
   });
 #if !defined(__CUDACC__)
   ReduceAxesComputeImpl<xpu, mshadow_op::sum, true, true>(
-    ctx, {temp.reshape(data.shape_)}, {kWriteTo}, {var}, small);
+      ctx, {temp.reshape(data.shape_)}, {kWriteTo}, {var}, small);
 #else
-  ReduceAxesRTCComputeImpl(ctx, {temp.reshape(data.shape_)},
-                           {kWriteTo}, {var}, small, "red::sum{}", nullptr, true);
+  ReduceAxesRTCComputeImpl(
+      ctx, {temp.reshape(data.shape_)}, {kWriteTo}, {var}, small, "red::sum{}", nullptr, true);
 #endif
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void MomentsForward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -171,20 +177,20 @@ inline void MomentsForward(const nnvm::NodeAttrs& attrs,
   MomentsForwardImpl<xpu>(ctx, inputs, req, outputs, param.axes, param.keepdims);
 }
 
-template<int req>
+template <int req>
 struct VarBackwardKernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
-                                  DType *igrad,
-                                  const DType *ograd,
-                                  const DType *data,
-                                  const DType *mean,
+                                  DType* igrad,
+                                  const DType* ograd,
+                                  const DType* data,
+                                  const DType* mean,
                                   mshadow::Shape<6> data_shape,
                                   mshadow::Shape<6> mean_shape,
                                   const float N,
                                   const float ddof = 0.0f) {
-    size_t data_idx = i;
-    size_t mean_idx = i;
+    size_t data_idx    = i;
+    size_t mean_idx    = i;
     size_t data_stride = 1;
     size_t mean_stride = 1;
     for (int axis = 5; axis >= 0; --axis) {
@@ -201,7 +207,7 @@ struct VarBackwardKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MomentsBackwardImpl(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -213,36 +219,42 @@ inline void MomentsBackwardImpl(const nnvm::NodeAttrs& attrs,
   using namespace mshadow_op;
   using namespace mxnet_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   const TBlob& mean_grad = inputs[0];
-  const TBlob& var_grad = inputs[1];
-  const TBlob& data = inputs[2];
-  const TBlob& mean = inputs[3];
-  const TBlob& var = inputs[4];
+  const TBlob& var_grad  = inputs[1];
+  const TBlob& data      = inputs[2];
+  const TBlob& mean      = inputs[3];
+  const TBlob& var       = inputs[4];
   const TBlob& data_grad = outputs[0];
 
   mxnet::TShape small = ReduceAxesShapeImpl(data.shape_, axes, true, false);
   BroadcastComputeImpl<xpu>(attrs, ctx, {mean_grad}, req, outputs, small);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     Tensor<xpu, 1, DType> igrad = outputs[0].FlatTo1D<xpu, DType>(s);
-    igrad /= scalar<DType>(outputs[0].Size()/inputs[0].Size());
+    igrad /= scalar<DType>(outputs[0].Size() / inputs[0].Size());
   });
 
   Shape<6> data_shape, var_shape;
   float N = data_grad.Size() / var.Size();
   for (int i = 0; i < 6; ++i) {
     data_shape[i] = (i < data.shape_.ndim()) ? data.shape_[i] : 1;
-    var_shape[i] = (i < small.ndim()) ? small[i] : 1;
+    var_shape[i]  = (i < small.ndim()) ? small[i] : 1;
   }
   MSHADOW_TYPE_SWITCH(data_grad.type_flag_, DType, {
-    Kernel<VarBackwardKernel<kAddTo>, xpu>::Launch(
-      s, data_grad.shape_.Size(), data_grad.dptr<DType>(), var_grad.dptr<DType>(),
-      data.dptr<DType>(), mean.dptr<DType>(), data_shape, var_shape, N);
+    Kernel<VarBackwardKernel<kAddTo>, xpu>::Launch(s,
+                                                   data_grad.shape_.Size(),
+                                                   data_grad.dptr<DType>(),
+                                                   var_grad.dptr<DType>(),
+                                                   data.dptr<DType>(),
+                                                   mean.dptr<DType>(),
+                                                   data_shape,
+                                                   var_shape,
+                                                   N);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void MomentsBackward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
diff --git a/src/operator/nn/moments.cc b/src/operator/nn/moments.cc
index 180615e53d61..79d7dd9e78fa 100644
--- a/src/operator/nn/moments.cc
+++ b/src/operator/nn/moments.cc
@@ -22,7 +22,7 @@
  * \file moments.cc
  * \brief Moments operator
  * \author Hao Jin
-*/
+ */
 
 #include "./moments-inl.h"
 
@@ -32,7 +32,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(MomentsParam);
 
 NNVM_REGISTER_OP(moments)
-.describe(R"code(
+    .describe(R"code(
 Calculate the mean and variance of `data`.
 
 The mean and variance are calculated by aggregating the contents of data across axes.
@@ -52,35 +52,35 @@ If x is 1-D and axes = [0] this is just the mean and variance of a vector.
      var = [2.9166667]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<MomentsParam>)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", MomentsShape)
-.set_attr<nnvm::FInferType>("FInferType", MomentsType)
-.set_attr<FCompute>("FCompute<cpu>", MomentsForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_moments"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(MomentsParam::__FIELDS__());
+    .set_attr_parser(ParamParser<MomentsParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", MomentsShape)
+    .set_attr<nnvm::FInferType>("FInferType", MomentsType)
+    .set_attr<FCompute>("FCompute<cpu>", MomentsForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_moments"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(MomentsParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_moments)
-.set_attr_parser(ParamParser<MomentsParam>)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", MomentsBackward<cpu>);
+    .set_attr_parser(ParamParser<MomentsParam>)
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", MomentsBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/moments.cu b/src/operator/nn/moments.cu
index a45ae33281be..50afe6997b86 100644
--- a/src/operator/nn/moments.cu
+++ b/src/operator/nn/moments.cu
@@ -22,18 +22,16 @@
  * \file moments.cu
  * \brief Moments operator
  * \author Hao Jin
-*/
+ */
 
 #include "./moments-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(moments)
-.set_attr<FCompute>("FCompute<gpu>", MomentsForward<gpu>);
+NNVM_REGISTER_OP(moments).set_attr<FCompute>("FCompute<gpu>", MomentsForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_moments)
-.set_attr<FCompute>("FCompute<gpu>", MomentsBackward<gpu>);
+NNVM_REGISTER_OP(_backward_moments).set_attr<FCompute>("FCompute<gpu>", MomentsBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/pool.h b/src/operator/nn/pool.h
index 4ea39c3db166..3c37dc7d7483 100644
--- a/src/operator/nn/pool.h
+++ b/src/operator/nn/pool.h
@@ -71,35 +71,38 @@ namespace mxnet {
 namespace op {
 
 namespace pool_enum {
-enum PoolingOpInputs {kData};
-enum PoolingOpOutputs {kOut, kMask};
-enum PoolingOpType {kMaxPooling, kAvgPooling, kSumPooling, kLpPooling};
-enum PoolingOpPadConventionType {kValid, kFull, kSame};
+enum PoolingOpInputs { kData };
+enum PoolingOpOutputs { kOut, kMask };
+enum PoolingOpType { kMaxPooling, kAvgPooling, kSumPooling, kLpPooling };
+enum PoolingOpPadConventionType { kValid, kFull, kSame };
 }  // namespace pool_enum
 
 /*!
  * \brief max pooling cpu function for 1-D images in 'ncw' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType>
-inline void pool_max_1d_ncw_cpu(const DType *in_data, const mxnet::TShape &ishape,
-                                const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                DType *out_data) {
+template <typename DType>
+inline void pool_max_1d_ncw_cpu(const DType* in_data,
+                                const mxnet::TShape& ishape,
+                                const mxnet::TShape& oshape,
+                                const mxnet::TShape& kernel,
+                                const mxnet::TShape& pad,
+                                const mxnet::TShape& stride,
+                                DType* out_data) {
   using mshadow::red::limits::MinValue;
-  const int width = ishape[2];
-  const int pooled_width = oshape[2];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const index_t in_data_offset = ishape[2];
+  const int width               = ishape[2];
+  const int pooled_width        = oshape[2];
+  const int kernel_w            = kernel[0];
+  const int pad_w               = pad[0];
+  const int stride_w            = stride[0];
+  const index_t in_data_offset  = ishape[2];
   const index_t out_data_offset = oshape[2];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int wstart = pw * stride_w - pad_w;
-        int wend = std::min(wstart + kernel_w, width);
-        wstart = std::max(wstart, 0);
+        int wstart    = pw * stride_w - pad_w;
+        int wend      = std::min(wstart + kernel_w, width);
+        wstart        = std::max(wstart, 0);
         DType max_val = MinValue<DType>();
         for (int w = wstart; w < wend; ++w) {
           if (in_data[w] > max_val) {
@@ -118,26 +121,29 @@ inline void pool_max_1d_ncw_cpu(const DType *in_data, const mxnet::TShape &ishap
  * \brief max pooling cpu function for 1-D images in 'nwc' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType>
-inline void pool_max_1d_nwc_cpu(const DType* in_data, const mxnet::TShape& ishape,
-                                const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                                const mxnet::TShape& pad, const mxnet::TShape& stride,
+template <typename DType>
+inline void pool_max_1d_nwc_cpu(const DType* in_data,
+                                const mxnet::TShape& ishape,
+                                const mxnet::TShape& oshape,
+                                const mxnet::TShape& kernel,
+                                const mxnet::TShape& pad,
+                                const mxnet::TShape& stride,
                                 DType* out_data) {
   using mshadow::red::limits::MinValue;
-  const int width = ishape[1];
-  const int pooled_width = oshape[1];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const int features = oshape[2];
-  const index_t in_data_offset = ishape[1] * features;
+  const int width               = ishape[1];
+  const int pooled_width        = oshape[1];
+  const int kernel_w            = kernel[0];
+  const int pad_w               = pad[0];
+  const int stride_w            = stride[0];
+  const int features            = oshape[2];
+  const index_t in_data_offset  = ishape[1] * features;
   const index_t out_data_offset = oshape[1] * features;
   std::vector<DType> max_vals(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pw = 0; pw < pooled_width; ++pw) {
       int wstart = pw * stride_w - pad_w;
-      int wend = std::min(wstart + kernel_w, width);
-      wstart = std::max(wstart, 0);
+      int wend   = std::min(wstart + kernel_w, width);
+      wstart     = std::max(wstart, 0);
       std::fill(max_vals.begin(), max_vals.end(), MinValue<DType>());
       for (int w = wstart; w < wend; ++w) {
         for (index_t c = 0; c < features; ++c) {
@@ -158,31 +164,34 @@ inline void pool_max_1d_nwc_cpu(const DType* in_data, const mxnet::TShape& ishap
  * \brief max pooling cpu function for 2-D images in 'nchw' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType>
-inline void pool_max_2d_nchw_cpu(const DType *in_data, const mxnet::TShape &ishape,
-                                 const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                 const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                 DType *out_data) {
+template <typename DType>
+inline void pool_max_2d_nchw_cpu(const DType* in_data,
+                                 const mxnet::TShape& ishape,
+                                 const mxnet::TShape& oshape,
+                                 const mxnet::TShape& kernel,
+                                 const mxnet::TShape& pad,
+                                 const mxnet::TShape& stride,
+                                 DType* out_data) {
   using mshadow::red::limits::MinValue;
   const int height = ishape[2], width = ishape[3];
   const int pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const index_t in_data_offset = ishape[2] * ishape[3];
+  const index_t in_data_offset  = ishape[2] * ishape[3];
   const index_t out_data_offset = oshape[2] * oshape[3];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int hend = std::min(hstart + kernel_h, height);
-          int wend = std::min(wstart + kernel_w, width);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
+          int hstart           = ph * stride_h - pad_h;
+          int wstart           = pw * stride_w - pad_w;
+          int hend             = std::min(hstart + kernel_h, height);
+          int wend             = std::min(wstart + kernel_w, width);
+          hstart               = std::max(hstart, 0);
+          wstart               = std::max(wstart, 0);
           const int pool_index = ph * pooled_width + pw;
-          DType max_val = MinValue<DType>();
+          DType max_val        = MinValue<DType>();
           for (int h = hstart; h < hend; ++h) {
             for (int w = wstart; w < wend; ++w) {
               const int in_index = h * width + w;
@@ -204,10 +213,13 @@ inline void pool_max_2d_nchw_cpu(const DType *in_data, const mxnet::TShape &isha
  * \brief max pooling cpu function for 2-D images in 'nhwc' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType>
-inline void pool_max_2d_nhwc_cpu(const DType* in_data, const mxnet::TShape& ishape,
-                                 const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                                 const mxnet::TShape& pad, const mxnet::TShape& stride,
+template <typename DType>
+inline void pool_max_2d_nhwc_cpu(const DType* in_data,
+                                 const mxnet::TShape& ishape,
+                                 const mxnet::TShape& oshape,
+                                 const mxnet::TShape& kernel,
+                                 const mxnet::TShape& pad,
+                                 const mxnet::TShape& stride,
                                  DType* out_data) {
   using mshadow::red::limits::MinValue;
   const int height = ishape[1], width = ishape[2];
@@ -215,19 +227,19 @@ inline void pool_max_2d_nhwc_cpu(const DType* in_data, const mxnet::TShape& isha
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const int features = oshape[3];
-  const index_t in_data_offset = ishape[1] * ishape[2] * features;
+  const int features            = oshape[3];
+  const index_t in_data_offset  = ishape[1] * ishape[2] * features;
   const index_t out_data_offset = oshape[1] * oshape[2] * features;
   std::vector<DType> max_vals(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int ph = 0; ph < pooled_height; ++ph) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int hstart = ph * stride_h - pad_h;
-        int wstart = pw * stride_w - pad_w;
-        int hend = std::min(hstart + kernel_h, height);
-        int wend = std::min(wstart + kernel_w, width);
-        hstart = std::max(hstart, 0);
-        wstart = std::max(wstart, 0);
+        int hstart           = ph * stride_h - pad_h;
+        int wstart           = pw * stride_w - pad_w;
+        int hend             = std::min(hstart + kernel_h, height);
+        int wend             = std::min(wstart + kernel_w, width);
+        hstart               = std::max(hstart, 0);
+        wstart               = std::max(wstart, 0);
         const int pool_index = ph * pooled_width + pw;
         std::fill(max_vals.begin(), max_vals.end(), MinValue<DType>());
         for (int h = hstart; h < hend; ++h) {
@@ -253,35 +265,38 @@ inline void pool_max_2d_nhwc_cpu(const DType* in_data, const mxnet::TShape& isha
  * \brief max pooling cpu function for 3-D images in 'ncdhw' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType>
-inline void pool_max_3d_ncdhw_cpu(const DType *in_data, const mxnet::TShape &ishape,
-                                  const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                  const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                  DType *out_data) {
+template <typename DType>
+inline void pool_max_3d_ncdhw_cpu(const DType* in_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
+                                  DType* out_data) {
   using mshadow::red::limits::MinValue;
   const int depth = ishape[2], height = ishape[3], width = ishape[4];
   const int pooled_depth = oshape[2], pooled_height = oshape[3], pooled_width = oshape[4];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const index_t in_data_offset = ishape[2] * ishape[3] * ishape[4];
+  const index_t in_data_offset  = ishape[2] * ishape[3] * ishape[4];
   const index_t out_data_offset = oshape[2] * oshape[3] * oshape[4];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pd = 0; pd < pooled_depth; ++pd) {
         for (int ph = 0; ph < pooled_height; ++ph) {
           for (int pw = 0; pw < pooled_width; ++pw) {
-            int dstart = pd * stride_d - pad_d;
-            int hstart = ph * stride_h - pad_h;
-            int wstart = pw * stride_w - pad_w;
-            int dend = std::min(dstart + kernel_d, depth);
-            int hend = std::min(hstart + kernel_h, height);
-            int wend = std::min(wstart + kernel_w, width);
-            dstart = std::max(dstart, 0);
-            hstart = std::max(hstart, 0);
-            wstart = std::max(wstart, 0);
+            int dstart           = pd * stride_d - pad_d;
+            int hstart           = ph * stride_h - pad_h;
+            int wstart           = pw * stride_w - pad_w;
+            int dend             = std::min(dstart + kernel_d, depth);
+            int hend             = std::min(hstart + kernel_h, height);
+            int wend             = std::min(wstart + kernel_w, width);
+            dstart               = std::max(dstart, 0);
+            hstart               = std::max(hstart, 0);
+            wstart               = std::max(wstart, 0);
             const int pool_index = (pd * pooled_height + ph) * pooled_width + pw;
-            DType max_val = MinValue<DType>();
+            DType max_val        = MinValue<DType>();
             for (int d = dstart; d < dend; ++d) {
               for (int h = hstart; h < hend; ++h) {
                 for (int w = wstart; w < wend; ++w) {
@@ -306,10 +321,13 @@ inline void pool_max_3d_ncdhw_cpu(const DType *in_data, const mxnet::TShape &ish
  * \brief max pooling cpu function for 3-D images in 'ndhwc' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType>
-inline void pool_max_3d_ndhwc_cpu(const DType* in_data, const mxnet::TShape& ishape,
-                                  const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                                  const mxnet::TShape& pad, const mxnet::TShape& stride,
+template <typename DType>
+inline void pool_max_3d_ndhwc_cpu(const DType* in_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
                                   DType* out_data) {
   using mshadow::red::limits::MinValue;
   const int depth = ishape[1], height = ishape[2], width = ishape[3];
@@ -317,23 +335,23 @@ inline void pool_max_3d_ndhwc_cpu(const DType* in_data, const mxnet::TShape& ish
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const int features = oshape[4];
-  const index_t in_data_offset = ishape[1] * ishape[2] * ishape[3] * features;
+  const int features            = oshape[4];
+  const index_t in_data_offset  = ishape[1] * ishape[2] * ishape[3] * features;
   const index_t out_data_offset = oshape[1] * oshape[2] * oshape[3] * features;
   std::vector<DType> max_vals(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pd = 0; pd < pooled_depth; ++pd) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int dstart = pd * stride_d - pad_d;
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int dend = std::min(dstart + kernel_d, depth);
-          int hend = std::min(hstart + kernel_h, height);
-          int wend = std::min(wstart + kernel_w, width);
-          dstart = std::max(dstart, 0);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
+          int dstart           = pd * stride_d - pad_d;
+          int hstart           = ph * stride_h - pad_h;
+          int wstart           = pw * stride_w - pad_w;
+          int dend             = std::min(dstart + kernel_d, depth);
+          int hend             = std::min(hstart + kernel_h, height);
+          int wend             = std::min(wstart + kernel_w, width);
+          dstart               = std::max(dstart, 0);
+          hstart               = std::max(hstart, 0);
+          wstart               = std::max(wstart, 0);
           const int pool_index = (pd * pooled_height + ph) * pooled_width + pw;
           std::fill(max_vals.begin(), max_vals.end(), MinValue<DType>());
           for (int d = dstart; d < dend; ++d) {
@@ -362,28 +380,32 @@ inline void pool_max_3d_ndhwc_cpu(const DType* in_data, const mxnet::TShape& ish
  * \brief avg/sum pooling cpu function for 1-D images in 'ncw' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType, int p = 1>
-inline void pool_sum_1d_ncw_cpu(const DType *in_data, const mxnet::TShape &ishape,
-                                const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                DType *out_data,
-                                const bool get_avg = false, const bool count_include_pad = true) {
-  using AccType = typename PoolingTypes<DType>::AccType;
-  const int width = ishape[2];
-  const int pooled_width = oshape[2];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const index_t in_data_offset = ishape[2];
+template <typename DType, int p = 1>
+inline void pool_sum_1d_ncw_cpu(const DType* in_data,
+                                const mxnet::TShape& ishape,
+                                const mxnet::TShape& oshape,
+                                const mxnet::TShape& kernel,
+                                const mxnet::TShape& pad,
+                                const mxnet::TShape& stride,
+                                DType* out_data,
+                                const bool get_avg           = false,
+                                const bool count_include_pad = true) {
+  using AccType                 = typename PoolingTypes<DType>::AccType;
+  const int width               = ishape[2];
+  const int pooled_width        = oshape[2];
+  const int kernel_w            = kernel[0];
+  const int pad_w               = pad[0];
+  const int stride_w            = stride[0];
+  const index_t in_data_offset  = ishape[2];
   const index_t out_data_offset = oshape[2];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int wstart = pw * stride_w - pad_w;
-        int wend = std::min(wstart + kernel_w, width + pad_w);
+        int wstart    = pw * stride_w - pad_w;
+        int wend      = std::min(wstart + kernel_w, width + pad_w);
         int pool_size = (get_avg ? (wend - wstart) : 1);
-        wstart = std::max(wstart, 0);
-        wend = std::min(wend, width);
+        wstart        = std::max(wstart, 0);
+        wend          = std::min(wend, width);
         if (get_avg && !count_include_pad) {
           pool_size = (wend - wstart);
         }
@@ -403,29 +425,33 @@ inline void pool_sum_1d_ncw_cpu(const DType *in_data, const mxnet::TShape &ishap
  * \brief avg/sum pooling cpu function for 1-D images in 'nwc' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType, int p = 1>
-inline void pool_sum_1d_nwc_cpu(const DType* in_data, const mxnet::TShape& ishape,
-                                const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                                const mxnet::TShape& pad, const mxnet::TShape& stride,
+template <typename DType, int p = 1>
+inline void pool_sum_1d_nwc_cpu(const DType* in_data,
+                                const mxnet::TShape& ishape,
+                                const mxnet::TShape& oshape,
+                                const mxnet::TShape& kernel,
+                                const mxnet::TShape& pad,
+                                const mxnet::TShape& stride,
                                 DType* out_data,
-                                const bool get_avg = false, const bool count_include_pad = true) {
-  using AccType = typename PoolingTypes<DType>::AccType;
-  const int width = ishape[1];
-  const int pooled_width = oshape[1];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const int features = oshape[2];
-  const index_t in_data_offset = ishape[1] * features;
+                                const bool get_avg           = false,
+                                const bool count_include_pad = true) {
+  using AccType                 = typename PoolingTypes<DType>::AccType;
+  const int width               = ishape[1];
+  const int pooled_width        = oshape[1];
+  const int kernel_w            = kernel[0];
+  const int pad_w               = pad[0];
+  const int stride_w            = stride[0];
+  const int features            = oshape[2];
+  const index_t in_data_offset  = ishape[1] * features;
   const index_t out_data_offset = oshape[1] * features;
   std::vector<AccType> sums(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pw = 0; pw < pooled_width; ++pw) {
-      int wstart = pw * stride_w - pad_w;
-      int wend = std::min(wstart + kernel_w, width + pad_w);
+      int wstart    = pw * stride_w - pad_w;
+      int wend      = std::min(wstart + kernel_w, width + pad_w);
       int pool_size = (get_avg ? (wend - wstart) : 1);
-      wstart = std::max(wstart, 0);
-      wend = std::min(wend, width);
+      wstart        = std::max(wstart, 0);
+      wend          = std::min(wend, width);
       if (get_avg && !count_include_pad) {
         pool_size = (wend - wstart);
       }
@@ -447,43 +473,47 @@ inline void pool_sum_1d_nwc_cpu(const DType* in_data, const mxnet::TShape& ishap
  * \brief avg/sum pooling cpu function for 2-D images in 'nchw' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType, int p = 1>
-inline void pool_sum_2d_nchw_cpu(const DType *in_data, const mxnet::TShape &ishape,
-                                 const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                 const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                 DType *out_data,
-                                 const bool get_avg = false, const bool count_include_pad = true) {
-  using AccType = typename PoolingTypes<DType>::AccType;
+template <typename DType, int p = 1>
+inline void pool_sum_2d_nchw_cpu(const DType* in_data,
+                                 const mxnet::TShape& ishape,
+                                 const mxnet::TShape& oshape,
+                                 const mxnet::TShape& kernel,
+                                 const mxnet::TShape& pad,
+                                 const mxnet::TShape& stride,
+                                 DType* out_data,
+                                 const bool get_avg           = false,
+                                 const bool count_include_pad = true) {
+  using AccType    = typename PoolingTypes<DType>::AccType;
   const int height = ishape[2], width = ishape[3];
   const int pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const index_t in_data_offset = ishape[2] * ishape[3];
+  const index_t in_data_offset  = ishape[2] * ishape[3];
   const index_t out_data_offset = oshape[2] * oshape[3];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int hend = std::min(hstart + kernel_h, height + pad_h);
-          int wend = std::min(wstart + kernel_w, width + pad_w);
+          int hstart    = ph * stride_h - pad_h;
+          int wstart    = pw * stride_w - pad_w;
+          int hend      = std::min(hstart + kernel_h, height + pad_h);
+          int wend      = std::min(wstart + kernel_w, width + pad_w);
           int pool_size = (get_avg ? (hend - hstart) * (wend - wstart) : 1);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
-          hend = std::min(hend, height);
-          wend = std::min(wend, width);
+          hstart        = std::max(hstart, 0);
+          wstart        = std::max(wstart, 0);
+          hend          = std::min(hend, height);
+          wend          = std::min(wend, width);
           if (get_avg && !count_include_pad) {
             pool_size = (hend - hstart) * (wend - wstart);
           }
           AccType sum = 0;
           for (int h = hstart; h < hend; ++h) {
             for (int w = wstart; w < wend; ++w) {
-              sum += a_pow_p<AccType, p>::Map(in_data[h*width+w]) / pool_size;
+              sum += a_pow_p<AccType, p>::Map(in_data[h * width + w]) / pool_size;
             }
           }
-          out_data[ph*pooled_width+pw] = a_root_p<AccType, p>::Map(sum);
+          out_data[ph * pooled_width + pw] = a_root_p<AccType, p>::Map(sum);
         }
       }
       in_data += in_data_offset;
@@ -496,34 +526,38 @@ inline void pool_sum_2d_nchw_cpu(const DType *in_data, const mxnet::TShape &isha
  * \brief avg/sum pooling cpu function for 2-D images in 'nhwc' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType, int p = 1>
-inline void pool_sum_2d_nhwc_cpu(const DType* in_data, const mxnet::TShape& ishape,
-                                 const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                                 const mxnet::TShape& pad, const mxnet::TShape& stride,
+template <typename DType, int p = 1>
+inline void pool_sum_2d_nhwc_cpu(const DType* in_data,
+                                 const mxnet::TShape& ishape,
+                                 const mxnet::TShape& oshape,
+                                 const mxnet::TShape& kernel,
+                                 const mxnet::TShape& pad,
+                                 const mxnet::TShape& stride,
                                  DType* out_data,
-                                 const bool get_avg = false, const bool count_include_pad = true) {
-  using AccType = typename PoolingTypes<DType>::AccType;
+                                 const bool get_avg           = false,
+                                 const bool count_include_pad = true) {
+  using AccType    = typename PoolingTypes<DType>::AccType;
   const int height = ishape[1], width = ishape[2];
   const int pooled_height = oshape[1], pooled_width = oshape[2];
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const int features = oshape[3];
-  const index_t in_data_offset = ishape[1] * ishape[2] * features;
+  const int features            = oshape[3];
+  const index_t in_data_offset  = ishape[1] * ishape[2] * features;
   const index_t out_data_offset = oshape[1] * oshape[2] * features;
   std::vector<AccType> sums(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int ph = 0; ph < pooled_height; ++ph) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int hstart = ph * stride_h - pad_h;
-        int wstart = pw * stride_w - pad_w;
-        int hend = std::min(hstart + kernel_h, height + pad_h);
-        int wend = std::min(wstart + kernel_w, width + pad_w);
+        int hstart    = ph * stride_h - pad_h;
+        int wstart    = pw * stride_w - pad_w;
+        int hend      = std::min(hstart + kernel_h, height + pad_h);
+        int wend      = std::min(wstart + kernel_w, width + pad_w);
         int pool_size = (get_avg ? (hend - hstart) * (wend - wstart) : 1);
-        hstart = std::max(hstart, 0);
-        wstart = std::max(wstart, 0);
-        hend = std::min(hend, height);
-        wend = std::min(wend, width);
+        hstart        = std::max(hstart, 0);
+        wstart        = std::max(wstart, 0);
+        hend          = std::min(hend, height);
+        wend          = std::min(wend, width);
         if (get_avg && !count_include_pad) {
           pool_size = (hend - hstart) * (wend - wstart);
         }
@@ -550,38 +584,42 @@ inline void pool_sum_2d_nhwc_cpu(const DType* in_data, const mxnet::TShape& isha
  * \brief avg/sum pooling cpu function for 3-D images in 'ncdhw' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType, int p = 1>
-inline void pool_sum_3d_ncdhw_cpu(const DType *in_data, const mxnet::TShape &ishape,
-                                  const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                  const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                  DType *out_data,
-                                  const bool get_avg = false, const bool count_include_pad = true) {
-  using AccType = typename PoolingTypes<DType>::AccType;
+template <typename DType, int p = 1>
+inline void pool_sum_3d_ncdhw_cpu(const DType* in_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
+                                  DType* out_data,
+                                  const bool get_avg           = false,
+                                  const bool count_include_pad = true) {
+  using AccType   = typename PoolingTypes<DType>::AccType;
   const int depth = ishape[2], height = ishape[3], width = ishape[4];
   const int pooled_depth = oshape[2], pooled_height = oshape[3], pooled_width = oshape[4];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const index_t in_data_offset = ishape[2] * ishape[3] * ishape[4];
+  const index_t in_data_offset  = ishape[2] * ishape[3] * ishape[4];
   const index_t out_data_offset = oshape[2] * oshape[3] * oshape[4];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pd = 0; pd < pooled_depth; ++pd) {
         for (int ph = 0; ph < pooled_height; ++ph) {
           for (int pw = 0; pw < pooled_width; ++pw) {
-            int dstart = pd * stride_d - pad_d;
-            int hstart = ph * stride_h - pad_h;
-            int wstart = pw * stride_w - pad_w;
-            int dend = std::min(dstart + kernel_d, depth + pad_d);
-            int hend = std::min(hstart + kernel_h, height + pad_h);
-            int wend = std::min(wstart + kernel_w, width + pad_w);
+            int dstart    = pd * stride_d - pad_d;
+            int hstart    = ph * stride_h - pad_h;
+            int wstart    = pw * stride_w - pad_w;
+            int dend      = std::min(dstart + kernel_d, depth + pad_d);
+            int hend      = std::min(hstart + kernel_h, height + pad_h);
+            int wend      = std::min(wstart + kernel_w, width + pad_w);
             int pool_size = (get_avg ? (dend - dstart) * (hend - hstart) * (wend - wstart) : 1);
-            dstart = std::max(dstart, 0);
-            hstart = std::max(hstart, 0);
-            wstart = std::max(wstart, 0);
-            dend = std::min(dend, depth);
-            hend = std::min(hend, height);
-            wend = std::min(wend, width);
+            dstart        = std::max(dstart, 0);
+            hstart        = std::max(hstart, 0);
+            wstart        = std::max(wstart, 0);
+            dend          = std::min(dend, depth);
+            hend          = std::min(hend, height);
+            wend          = std::min(wend, width);
             if (get_avg && !count_include_pad) {
               pool_size = (dend - dstart) * (hend - hstart) * (wend - wstart);
             }
@@ -589,13 +627,13 @@ inline void pool_sum_3d_ncdhw_cpu(const DType *in_data, const mxnet::TShape &ish
             for (int d = dstart; d < dend; ++d) {
               for (int h = hstart; h < hend; ++h) {
                 for (int w = wstart; w < wend; ++w) {
-                  sum += a_pow_p<AccType, p>::Map(in_data[(d*height+h)*width+w]) / pool_size;
+                  sum +=
+                      a_pow_p<AccType, p>::Map(in_data[(d * height + h) * width + w]) / pool_size;
                 }
               }
             }
-            out_data[(pd*pooled_height+ph)*pooled_width+pw] = (pool_size == 0) ?
-                                                              AccType(nanf("")) :
-                                                              a_root_p<AccType, p>::Map(sum);
+            out_data[(pd * pooled_height + ph) * pooled_width + pw] =
+                (pool_size == 0) ? AccType(nanf("")) : a_root_p<AccType, p>::Map(sum);
           }
         }
       }
@@ -609,39 +647,43 @@ inline void pool_sum_3d_ncdhw_cpu(const DType *in_data, const mxnet::TShape &ish
  * \brief avg/sum pooling cpu function for 3-D images in 'ndhwc' layout.
  * Do not call this kernel directly. Use the interface pool().
  */
-template<typename DType, int p = 1>
-inline void pool_sum_3d_ndhwc_cpu(const DType* in_data, const mxnet::TShape& ishape,
-                                  const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                                  const mxnet::TShape& pad, const mxnet::TShape& stride,
+template <typename DType, int p = 1>
+inline void pool_sum_3d_ndhwc_cpu(const DType* in_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
                                   DType* out_data,
-                                  const bool get_avg = false, const bool count_include_pad = true) {
-  using AccType = typename PoolingTypes<DType>::AccType;
+                                  const bool get_avg           = false,
+                                  const bool count_include_pad = true) {
+  using AccType   = typename PoolingTypes<DType>::AccType;
   const int depth = ishape[1], height = ishape[2], width = ishape[3];
   const int pooled_depth = oshape[1], pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const int features = oshape[4];
-  const index_t in_data_offset = ishape[1] * ishape[2] * ishape[3] * features;
+  const int features            = oshape[4];
+  const index_t in_data_offset  = ishape[1] * ishape[2] * ishape[3] * features;
   const index_t out_data_offset = oshape[1] * oshape[2] * oshape[3] * features;
   std::vector<AccType> sums(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pd = 0; pd < pooled_depth; ++pd) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int dstart = pd * stride_d - pad_d;
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int dend = std::min(dstart + kernel_d, depth + pad_d);
-          int hend = std::min(hstart + kernel_h, height + pad_h);
-          int wend = std::min(wstart + kernel_w, width + pad_w);
+          int dstart    = pd * stride_d - pad_d;
+          int hstart    = ph * stride_h - pad_h;
+          int wstart    = pw * stride_w - pad_w;
+          int dend      = std::min(dstart + kernel_d, depth + pad_d);
+          int hend      = std::min(hstart + kernel_h, height + pad_h);
+          int wend      = std::min(wstart + kernel_w, width + pad_w);
           int pool_size = (get_avg ? (dend - dstart) * (hend - hstart) * (wend - wstart) : 1);
-          dstart = std::max(dstart, 0);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
-          dend = std::min(dend, depth);
-          hend = std::min(hend, height);
-          wend = std::min(wend, width);
+          dstart        = std::max(dstart, 0);
+          hstart        = std::max(hstart, 0);
+          wstart        = std::max(wstart, 0);
+          dend          = std::min(dend, depth);
+          hend          = std::min(hend, height);
+          wend          = std::min(wend, width);
           if (get_avg && !count_include_pad) {
             pool_size = (dend - dstart) * (hend - hstart) * (wend - wstart);
           }
@@ -658,9 +700,8 @@ inline void pool_sum_3d_ndhwc_cpu(const DType* in_data, const mxnet::TShape& ish
             }
           }
           for (index_t c = 0; c < features; ++c)
-            out_data[pool_index * features + c] = (pool_size == 0) ?
-                                                            AccType(nanf("")) :
-                                                            a_root_p<AccType, p>::Map(sums[c]);
+            out_data[pool_index * features + c] =
+                (pool_size == 0) ? AccType(nanf("")) : a_root_p<AccType, p>::Map(sums[c]);
         }
       }
     }
@@ -673,25 +714,29 @@ inline void pool_sum_3d_ndhwc_cpu(const DType* in_data, const mxnet::TShape& ish
  * \brief max unpooling cpu function for 1-D images in 'ncw' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType>
-inline void unpool_max_1d_ncw_cpu(const DType *out_grad, const DType *in_data,
-                                  const DType *out_data, const mxnet::TShape &ishape,
-                                  const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                  const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                  DType *in_grad) {
-  const int width = ishape[2];
-  const int pooled_width = oshape[2];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const index_t in_offset = ishape[2];
+template <typename DType>
+inline void unpool_max_1d_ncw_cpu(const DType* out_grad,
+                                  const DType* in_data,
+                                  const DType* out_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
+                                  DType* in_grad) {
+  const int width          = ishape[2];
+  const int pooled_width   = oshape[2];
+  const int kernel_w       = kernel[0];
+  const int pad_w          = pad[0];
+  const int stride_w       = stride[0];
+  const index_t in_offset  = ishape[2];
   const index_t out_offset = oshape[2];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int wstart = pw * stride_w - pad_w;
-        int wend = std::min(wstart + kernel_w, width);
-        wstart = std::max(wstart, 0);
+        int wstart  = pw * stride_w - pad_w;
+        int wend    = std::min(wstart + kernel_w, width);
+        wstart      = std::max(wstart, 0);
         int max_idx = -1;
         for (int w = wstart; w < wend; ++w) {
           if (in_data[w] == out_data[pw]) {
@@ -717,26 +762,30 @@ inline void unpool_max_1d_ncw_cpu(const DType *out_grad, const DType *in_data,
  * \brief max unpooling cpu function for 1-D images in 'nwc' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType>
-inline void unpool_max_1d_nwc_cpu(const DType* out_grad, const DType* in_data,
-                              const DType* out_data, const mxnet::TShape& ishape,
-                              const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                              const mxnet::TShape& pad, const mxnet::TShape& stride,
-                              DType* in_grad) {
-  const int width = ishape[1];
-  const int pooled_width = oshape[1];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const int features = oshape[2];
-  const index_t in_offset = ishape[1] * features;
+template <typename DType>
+inline void unpool_max_1d_nwc_cpu(const DType* out_grad,
+                                  const DType* in_data,
+                                  const DType* out_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
+                                  DType* in_grad) {
+  const int width          = ishape[1];
+  const int pooled_width   = oshape[1];
+  const int kernel_w       = kernel[0];
+  const int pad_w          = pad[0];
+  const int stride_w       = stride[0];
+  const int features       = oshape[2];
+  const index_t in_offset  = ishape[1] * features;
   const index_t out_offset = oshape[1] * features;
   std::vector<int> max_idxs(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pw = 0; pw < pooled_width; ++pw) {
       int wstart = pw * stride_w - pad_w;
-      int wend = std::min(wstart + kernel_w, width);
-      wstart = std::max(wstart, 0);
+      int wend   = std::min(wstart + kernel_w, width);
+      wstart     = std::max(wstart, 0);
       std::fill(max_idxs.begin(), max_idxs.end(), -1);
       for (index_t c = 0; c < features; ++c) {
         for (int w = wstart; w < wend; ++w) {
@@ -765,42 +814,47 @@ inline void unpool_max_1d_nwc_cpu(const DType* out_grad, const DType* in_data,
  * \brief max unpooling cpu function for 2-D images in 'nchw' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType>
-inline void unpool_max_2d_nchw_cpu(const DType *out_grad, const DType *in_data,
-                                   const DType *out_data, const mxnet::TShape &ishape,
-                                   const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                   const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                   DType *in_grad) {
+template <typename DType>
+inline void unpool_max_2d_nchw_cpu(const DType* out_grad,
+                                   const DType* in_data,
+                                   const DType* out_data,
+                                   const mxnet::TShape& ishape,
+                                   const mxnet::TShape& oshape,
+                                   const mxnet::TShape& kernel,
+                                   const mxnet::TShape& pad,
+                                   const mxnet::TShape& stride,
+                                   DType* in_grad) {
   const int height = ishape[2], width = ishape[3];
   const int pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const index_t in_offset = ishape[2] * ishape[3];
+  const index_t in_offset  = ishape[2] * ishape[3];
   const index_t out_offset = oshape[2] * oshape[3];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int hend = std::min(hstart + kernel_h, height);
-          int wend = std::min(wstart + kernel_w, width);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
+          int hstart           = ph * stride_h - pad_h;
+          int wstart           = pw * stride_w - pad_w;
+          int hend             = std::min(hstart + kernel_h, height);
+          int wend             = std::min(wstart + kernel_w, width);
+          hstart               = std::max(hstart, 0);
+          wstart               = std::max(wstart, 0);
           const int pool_index = ph * pooled_width + pw;
-          int max_idx = -1;
-          bool found = false;
+          int max_idx          = -1;
+          bool found           = false;
           for (int h = hstart; h < hend; ++h) {
             for (int w = wstart; w < wend; ++w) {
               const int idx = h * width + w;
               if (in_data[idx] == out_data[pool_index]) {
                 max_idx = idx;
-                found = true;
+                found   = true;
                 break;
               }
             }
-            if (found) break;
+            if (found)
+              break;
           }
           // In the case where pad > 0 and kernel = 1, for example,
           // max_idx can be -1 reaching this step.
@@ -821,30 +875,34 @@ inline void unpool_max_2d_nchw_cpu(const DType *out_grad, const DType *in_data,
  * \brief max unpooling cpu function for 2-D images in 'nhwc' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType>
-inline void unpool_max_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
-                              const DType* out_data, const mxnet::TShape& ishape,
-                              const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                              const mxnet::TShape& pad, const mxnet::TShape& stride,
-                              DType* in_grad) {
+template <typename DType>
+inline void unpool_max_2d_nhwc_cpu(const DType* out_grad,
+                                   const DType* in_data,
+                                   const DType* out_data,
+                                   const mxnet::TShape& ishape,
+                                   const mxnet::TShape& oshape,
+                                   const mxnet::TShape& kernel,
+                                   const mxnet::TShape& pad,
+                                   const mxnet::TShape& stride,
+                                   DType* in_grad) {
   const int height = ishape[1], width = ishape[2];
   const int pooled_height = oshape[1], pooled_width = oshape[2];
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const int features = oshape[3];
-  const index_t in_offset = ishape[1] * ishape[2] * features;
+  const int features       = oshape[3];
+  const index_t in_offset  = ishape[1] * ishape[2] * features;
   const index_t out_offset = oshape[1] * oshape[2] * features;
   std::vector<int> max_idxs(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int ph = 0; ph < pooled_height; ++ph) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int hstart = ph * stride_h - pad_h;
-        int wstart = pw * stride_w - pad_w;
-        int hend = std::min(hstart + kernel_h, height);
-        int wend = std::min(wstart + kernel_w, width);
-        hstart = std::max(hstart, 0);
-        wstart = std::max(wstart, 0);
+        int hstart           = ph * stride_h - pad_h;
+        int wstart           = pw * stride_w - pad_w;
+        int hend             = std::min(hstart + kernel_h, height);
+        int wend             = std::min(wstart + kernel_w, width);
+        hstart               = std::max(hstart, 0);
+        wstart               = std::max(wstart, 0);
         const int pool_index = ph * pooled_width + pw;
         std::fill(max_idxs.begin(), max_idxs.end(), -1);
         for (index_t c = 0; c < features; ++c) {
@@ -854,11 +912,12 @@ inline void unpool_max_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
               const int idx = h * width + w;
               if (in_data[idx * features + c] == out_data[pool_index * features + c]) {
                 max_idxs[c] = idx;
-                found = true;
+                found       = true;
                 break;
               }
             }
-            if (found) break;
+            if (found)
+              break;
           }
         }
         // In the case where pad > 0 and kernel = 1, for example,
@@ -881,49 +940,55 @@ inline void unpool_max_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
  * \brief max unpooling cpu function for 3-D images in 'ncdhw' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType>
-inline void unpool_max_3d_ncdhw_cpu(const DType *out_grad, const DType *in_data,
-                                    const DType *out_data, const mxnet::TShape &ishape,
-                                    const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                    const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                    DType *in_grad) {
+template <typename DType>
+inline void unpool_max_3d_ncdhw_cpu(const DType* out_grad,
+                                    const DType* in_data,
+                                    const DType* out_data,
+                                    const mxnet::TShape& ishape,
+                                    const mxnet::TShape& oshape,
+                                    const mxnet::TShape& kernel,
+                                    const mxnet::TShape& pad,
+                                    const mxnet::TShape& stride,
+                                    DType* in_grad) {
   const int depth = ishape[2], height = ishape[3], width = ishape[4];
   const int pooled_depth = oshape[2], pooled_height = oshape[3], pooled_width = oshape[4];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const index_t in_offset = ishape[2] * ishape[3] * ishape[4];
+  const index_t in_offset  = ishape[2] * ishape[3] * ishape[4];
   const index_t out_offset = oshape[2] * oshape[3] * oshape[4];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pd = 0; pd < pooled_depth; ++pd) {
         for (int ph = 0; ph < pooled_height; ++ph) {
           for (int pw = 0; pw < pooled_width; ++pw) {
-            int dstart = pd * stride_d - pad_d;
-            int hstart = ph * stride_h - pad_h;
-            int wstart = pw * stride_w - pad_w;
-            int dend = std::min(dstart + kernel_d, depth);
-            int hend = std::min(hstart + kernel_h, height);
-            int wend = std::min(wstart + kernel_w, width);
-            dstart = std::max(dstart, 0);
-            hstart = std::max(hstart, 0);
-            wstart = std::max(wstart, 0);
+            int dstart           = pd * stride_d - pad_d;
+            int hstart           = ph * stride_h - pad_h;
+            int wstart           = pw * stride_w - pad_w;
+            int dend             = std::min(dstart + kernel_d, depth);
+            int hend             = std::min(hstart + kernel_h, height);
+            int wend             = std::min(wstart + kernel_w, width);
+            dstart               = std::max(dstart, 0);
+            hstart               = std::max(hstart, 0);
+            wstart               = std::max(wstart, 0);
             const int pool_index = (pd * pooled_height + ph) * pooled_width + pw;
-            int max_idx = -1;
-            bool found = false;
+            int max_idx          = -1;
+            bool found           = false;
             for (int d = dstart; d < dend; ++d) {
               for (int h = hstart; h < hend; ++h) {
                 for (int w = wstart; w < wend; ++w) {
                   const int idx = (d * height + h) * width + w;
                   if (in_data[idx] == out_data[pool_index]) {
                     max_idx = idx;
-                    found = true;
+                    found   = true;
                     break;
                   }
                 }
-                if (found) break;
+                if (found)
+                  break;
               }
-              if (found) break;
+              if (found)
+                break;
             }
             // In the case where pad > 0 and kernel = 1, for example,
             // max_idx can be -1 reaching this step.
@@ -945,34 +1010,38 @@ inline void unpool_max_3d_ncdhw_cpu(const DType *out_grad, const DType *in_data,
  * \brief max unpooling cpu function for 3-D images in 'ndhwc' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType>
-inline void unpool_max_3d_ndhwc_cpu(const DType* out_grad, const DType* in_data,
-                              const DType* out_data, const mxnet::TShape& ishape,
-                              const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                              const mxnet::TShape& pad, const mxnet::TShape& stride,
-                              DType* in_grad) {
+template <typename DType>
+inline void unpool_max_3d_ndhwc_cpu(const DType* out_grad,
+                                    const DType* in_data,
+                                    const DType* out_data,
+                                    const mxnet::TShape& ishape,
+                                    const mxnet::TShape& oshape,
+                                    const mxnet::TShape& kernel,
+                                    const mxnet::TShape& pad,
+                                    const mxnet::TShape& stride,
+                                    DType* in_grad) {
   const int depth = ishape[1], height = ishape[2], width = ishape[3];
   const int pooled_depth = oshape[1], pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const int features = oshape[4];
-  const index_t in_offset = ishape[1] * ishape[2] * ishape[3] * features;
+  const int features       = oshape[4];
+  const index_t in_offset  = ishape[1] * ishape[2] * ishape[3] * features;
   const index_t out_offset = oshape[1] * oshape[2] * oshape[3] * features;
   std::vector<int> max_idxs(features);
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pd = 0; pd < pooled_depth; ++pd) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int dstart = pd * stride_d - pad_d;
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int dend = std::min(dstart + kernel_d, depth);
-          int hend = std::min(hstart + kernel_h, height);
-          int wend = std::min(wstart + kernel_w, width);
-          dstart = std::max(dstart, 0);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
+          int dstart           = pd * stride_d - pad_d;
+          int hstart           = ph * stride_h - pad_h;
+          int wstart           = pw * stride_w - pad_w;
+          int dend             = std::min(dstart + kernel_d, depth);
+          int hend             = std::min(hstart + kernel_h, height);
+          int wend             = std::min(wstart + kernel_w, width);
+          dstart               = std::max(dstart, 0);
+          hstart               = std::max(hstart, 0);
+          wstart               = std::max(wstart, 0);
           const int pool_index = (pd * pooled_height + ph) * pooled_width + pw;
           std::fill(max_idxs.begin(), max_idxs.end(), -1);
           for (index_t c = 0; c < features; ++c) {
@@ -983,13 +1052,15 @@ inline void unpool_max_3d_ndhwc_cpu(const DType* out_grad, const DType* in_data,
                   const int idx = (d * height + h) * width + w;
                   if (in_data[idx * features + c] == out_data[pool_index * features + c]) {
                     max_idxs[c] = idx;
-                    found = true;
+                    found       = true;
                     break;
                   }
                 }
-                if (found) break;
+                if (found)
+                  break;
               }
-              if (found) break;
+              if (found)
+                break;
             }
           }
           // In the case where pad > 0 and kernel = 1, for example,
@@ -1013,28 +1084,33 @@ inline void unpool_max_3d_ndhwc_cpu(const DType* out_grad, const DType* in_data,
  * \brief avg/sum unpooling cpu function for 1-D images in 'ncw' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType, int p = 1>
-inline void unpool_sum_1d_ncw_cpu(const DType *out_grad, const DType *in_data,
-                                  const DType *out_data,
-                                  const mxnet::TShape &ishape, const mxnet::TShape &oshape,
-                                  const mxnet::TShape &kernel, const mxnet::TShape &pad,
-                                  const mxnet::TShape &stride, DType *in_grad,
-                                  const bool is_avg = false, const bool count_include_pad = true) {
-  const int width = ishape[2];
-  const int pooled_width = oshape[2];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const index_t in_grad_offset = ishape[2];
+template <typename DType, int p = 1>
+inline void unpool_sum_1d_ncw_cpu(const DType* out_grad,
+                                  const DType* in_data,
+                                  const DType* out_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
+                                  DType* in_grad,
+                                  const bool is_avg            = false,
+                                  const bool count_include_pad = true) {
+  const int width               = ishape[2];
+  const int pooled_width        = oshape[2];
+  const int kernel_w            = kernel[0];
+  const int pad_w               = pad[0];
+  const int stride_w            = stride[0];
+  const index_t in_grad_offset  = ishape[2];
   const index_t out_grad_offset = oshape[2];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int wstart = pw * stride_w - pad_w;
-        int wend = std::min(wstart + kernel_w, width + pad_w);
+        int wstart    = pw * stride_w - pad_w;
+        int wend      = std::min(wstart + kernel_w, width + pad_w);
         int pool_size = (is_avg ? (wend - wstart) : 1);
-        wstart = std::max(wstart, 0);
-        wend = std::min(wend, width);
+        wstart        = std::max(wstart, 0);
+        wend          = std::min(wend, width);
         if (is_avg && !count_include_pad) {
           pool_size = (wend - wstart);
         }
@@ -1054,37 +1130,42 @@ inline void unpool_sum_1d_ncw_cpu(const DType *out_grad, const DType *in_data,
  * \brief avg/sum unpooling cpu function for 1-D images in 'nwc' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType, int p = 1>
-inline void unpool_sum_1d_nwc_cpu(const DType* out_grad, const DType* in_data,
-                                  const DType *out_data, const mxnet::TShape &ishape,
-                                  const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                  const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                  DType *in_grad, const bool is_avg = false,
+template <typename DType, int p = 1>
+inline void unpool_sum_1d_nwc_cpu(const DType* out_grad,
+                                  const DType* in_data,
+                                  const DType* out_data,
+                                  const mxnet::TShape& ishape,
+                                  const mxnet::TShape& oshape,
+                                  const mxnet::TShape& kernel,
+                                  const mxnet::TShape& pad,
+                                  const mxnet::TShape& stride,
+                                  DType* in_grad,
+                                  const bool is_avg            = false,
                                   const bool count_include_pad = true) {
-  const int width = ishape[1];
-  const int pooled_width = oshape[1];
-  const int kernel_w = kernel[0];
-  const int pad_w = pad[0];
-  const int stride_w = stride[0];
-  const int features = oshape[2];
-  const index_t in_grad_offset = ishape[1] * features;
+  const int width               = ishape[1];
+  const int pooled_width        = oshape[1];
+  const int kernel_w            = kernel[0];
+  const int pad_w               = pad[0];
+  const int stride_w            = stride[0];
+  const int features            = oshape[2];
+  const index_t in_grad_offset  = ishape[1] * features;
   const index_t out_grad_offset = oshape[1] * features;
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pw = 0; pw < pooled_width; ++pw) {
-      int wstart = pw * stride_w - pad_w;
-      int wend = std::min(wstart + kernel_w, width + pad_w);
+      int wstart    = pw * stride_w - pad_w;
+      int wend      = std::min(wstart + kernel_w, width + pad_w);
       int pool_size = (is_avg ? (wend - wstart) : 1);
-      wstart = std::max(wstart, 0);
-      wend = std::min(wend, width);
+      wstart        = std::max(wstart, 0);
+      wend          = std::min(wend, width);
       if (is_avg && !count_include_pad) {
         pool_size = (wend - wstart);
       }
       for (int w = wstart; w < wend; ++w) {
         for (index_t c = 0; c < features; ++c) {
-          in_grad[w * features + c] +=
-              lp_grad<DType, p>::Map(out_grad[pw * features + c],
-                                     in_data[w * features + c],
-                                     out_data[pw * features + c]) / pool_size;
+          in_grad[w * features + c] += lp_grad<DType, p>::Map(out_grad[pw * features + c],
+                                                              in_data[w * features + c],
+                                                              out_data[pw * features + c]) /
+                                       pool_size;
         }
       }
     }
@@ -1099,43 +1180,48 @@ inline void unpool_sum_1d_nwc_cpu(const DType* out_grad, const DType* in_data,
  * \brief avg/sum unpooling cpu function for 2-D images in 'nchw' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType, int p = 1>
-inline void unpool_sum_2d_nchw_cpu(const DType *out_grad, const DType *in_data,
-                                   const DType *out_data, const mxnet::TShape &ishape,
-                                   const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                   const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                   DType *in_grad, const bool is_avg = false,
+template <typename DType, int p = 1>
+inline void unpool_sum_2d_nchw_cpu(const DType* out_grad,
+                                   const DType* in_data,
+                                   const DType* out_data,
+                                   const mxnet::TShape& ishape,
+                                   const mxnet::TShape& oshape,
+                                   const mxnet::TShape& kernel,
+                                   const mxnet::TShape& pad,
+                                   const mxnet::TShape& stride,
+                                   DType* in_grad,
+                                   const bool is_avg            = false,
                                    const bool count_include_pad = true) {
   const int height = ishape[2], width = ishape[3];
   const int pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_h = kernel[0], kernel_w = kernel[1];
   const int pad_h = pad[0], pad_w = pad[1];
   const int stride_h = stride[0], stride_w = stride[1];
-  const index_t in_grad_offset = ishape[2] * ishape[3];
+  const index_t in_grad_offset  = ishape[2] * ishape[3];
   const index_t out_grad_offset = oshape[2] * oshape[3];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int hend = std::min(hstart + kernel_h, height + pad_h);
-          int wend = std::min(wstart + kernel_w, width + pad_w);
+          int hstart    = ph * stride_h - pad_h;
+          int wstart    = pw * stride_w - pad_w;
+          int hend      = std::min(hstart + kernel_h, height + pad_h);
+          int wend      = std::min(wstart + kernel_w, width + pad_w);
           int pool_size = (is_avg ? (hend - hstart) * (wend - wstart) : 1);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
-          hend = std::min(hend, height);
-          wend = std::min(wend, width);
+          hstart        = std::max(hstart, 0);
+          wstart        = std::max(wstart, 0);
+          hend          = std::min(hend, height);
+          wend          = std::min(wend, width);
           if (is_avg && !count_include_pad) {
             pool_size = (hend - hstart) * (wend - wstart);
           }
           const int pool_index = ph * pooled_width + pw;
           for (int h = hstart; h < hend; ++h) {
             for (int w = wstart; w < wend; ++w) {
-              in_grad[h*width+w] +=
-                lp_grad<DType, p>::Map(out_grad[pool_index],
-                                       in_data[h*width+w],
-                                       out_data[pool_index]) / pool_size;
+              in_grad[h * width + w] +=
+                  lp_grad<DType, p>::Map(
+                      out_grad[pool_index], in_data[h * width + w], out_data[pool_index]) /
+                  pool_size;
             }
           }
         }
@@ -1152,12 +1238,17 @@ inline void unpool_sum_2d_nchw_cpu(const DType *out_grad, const DType *in_data,
  * \brief avg/sum unpooling cpu function for 2-D images in 'nhwc' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType, int p = 1>
-inline void unpool_sum_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
-                                   const DType *out_data, const mxnet::TShape &ishape,
-                                   const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                   const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                   DType *in_grad, const bool is_avg = false,
+template <typename DType, int p = 1>
+inline void unpool_sum_2d_nhwc_cpu(const DType* out_grad,
+                                   const DType* in_data,
+                                   const DType* out_data,
+                                   const mxnet::TShape& ishape,
+                                   const mxnet::TShape& oshape,
+                                   const mxnet::TShape& kernel,
+                                   const mxnet::TShape& pad,
+                                   const mxnet::TShape& stride,
+                                   DType* in_grad,
+                                   const bool is_avg            = false,
                                    const bool count_include_pad = true) {
   const int height = ishape[1], width = ishape[2];
   const int pooled_height = oshape[1], pooled_width = oshape[2];
@@ -1165,20 +1256,20 @@ inline void unpool_sum_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
   const int pad_h = pad[0], pad_w = pad[1];
   const int features = oshape[3];
   const int stride_h = stride[0], stride_w = stride[1];
-  const index_t in_grad_offset = ishape[1] * ishape[2] * features;
+  const index_t in_grad_offset  = ishape[1] * ishape[2] * features;
   const index_t out_grad_offset = oshape[1] * oshape[2] * features;
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int ph = 0; ph < pooled_height; ++ph) {
       for (int pw = 0; pw < pooled_width; ++pw) {
-        int hstart = ph * stride_h - pad_h;
-        int wstart = pw * stride_w - pad_w;
-        int hend = std::min(hstart + kernel_h, height + pad_h);
-        int wend = std::min(wstart + kernel_w, width + pad_w);
+        int hstart    = ph * stride_h - pad_h;
+        int wstart    = pw * stride_w - pad_w;
+        int hend      = std::min(hstart + kernel_h, height + pad_h);
+        int wend      = std::min(wstart + kernel_w, width + pad_w);
         int pool_size = (is_avg ? (hend - hstart) * (wend - wstart) : 1);
-        hstart = std::max(hstart, 0);
-        wstart = std::max(wstart, 0);
-        hend = std::min(hend, height);
-        wend = std::min(wend, width);
+        hstart        = std::max(hstart, 0);
+        wstart        = std::max(wstart, 0);
+        hend          = std::min(hend, height);
+        wend          = std::min(wend, width);
         if (is_avg && !count_include_pad) {
           pool_size = (hend - hstart) * (wend - wstart);
         }
@@ -1190,7 +1281,8 @@ inline void unpool_sum_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
               in_grad[in_index * features + c] +=
                   lp_grad<DType, p>::Map(out_grad[pool_index * features + c],
                                          in_data[in_index * features + c],
-                                         out_data[pool_index * features + c]) / pool_size;
+                                         out_data[pool_index * features + c]) /
+                  pool_size;
             }
           }
         }
@@ -1207,38 +1299,43 @@ inline void unpool_sum_2d_nhwc_cpu(const DType* out_grad, const DType* in_data,
  * \brief avg/sum unpooling cpu function for 3-D images in 'ncdhw' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType, int p = 1>
-inline void unpool_sum_3d_ncdhw_cpu(const DType *out_grad, const DType *in_data,
-                                    const DType *out_data, const mxnet::TShape &ishape,
-                                    const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                    const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                    DType *in_grad, const bool is_avg = false,
+template <typename DType, int p = 1>
+inline void unpool_sum_3d_ncdhw_cpu(const DType* out_grad,
+                                    const DType* in_data,
+                                    const DType* out_data,
+                                    const mxnet::TShape& ishape,
+                                    const mxnet::TShape& oshape,
+                                    const mxnet::TShape& kernel,
+                                    const mxnet::TShape& pad,
+                                    const mxnet::TShape& stride,
+                                    DType* in_grad,
+                                    const bool is_avg            = false,
                                     const bool count_include_pad = true) {
   const int depth = ishape[2], height = ishape[3], width = ishape[4];
   const int pooled_depth = oshape[2], pooled_height = oshape[3], pooled_width = oshape[4];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const index_t in_grad_offset = ishape[2] * ishape[3] * ishape[4];
+  const index_t in_grad_offset  = ishape[2] * ishape[3] * ishape[4];
   const index_t out_grad_offset = oshape[2] * oshape[3] * oshape[4];
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (index_t c = 0; c < oshape[1]; ++c) {
       for (int pd = 0; pd < pooled_depth; ++pd) {
         for (int ph = 0; ph < pooled_height; ++ph) {
           for (int pw = 0; pw < pooled_width; ++pw) {
-            int dstart = pd * stride_d - pad_d;
-            int hstart = ph * stride_h - pad_h;
-            int wstart = pw * stride_w - pad_w;
-            int dend = std::min(dstart + kernel_d, depth + pad_d);
-            int hend = std::min(hstart + kernel_h, height + pad_h);
-            int wend = std::min(wstart + kernel_w, width + pad_w);
+            int dstart    = pd * stride_d - pad_d;
+            int hstart    = ph * stride_h - pad_h;
+            int wstart    = pw * stride_w - pad_w;
+            int dend      = std::min(dstart + kernel_d, depth + pad_d);
+            int hend      = std::min(hstart + kernel_h, height + pad_h);
+            int wend      = std::min(wstart + kernel_w, width + pad_w);
             int pool_size = (is_avg ? (dend - dstart) * (hend - hstart) * (wend - wstart) : 1);
-            dstart = std::max(dstart, 0);
-            hstart = std::max(hstart, 0);
-            wstart = std::max(wstart, 0);
-            dend = std::min(dend, depth);
-            hend = std::min(hend, height);
-            wend = std::min(wend, width);
+            dstart        = std::max(dstart, 0);
+            hstart        = std::max(hstart, 0);
+            wstart        = std::max(wstart, 0);
+            dend          = std::min(dend, depth);
+            hend          = std::min(hend, height);
+            wend          = std::min(wend, width);
             if (is_avg && !count_include_pad) {
               pool_size = (dend - dstart) * (hend - hstart) * (wend - wstart);
             }
@@ -1246,10 +1343,11 @@ inline void unpool_sum_3d_ncdhw_cpu(const DType *out_grad, const DType *in_data,
             for (int d = dstart; d < dend; ++d) {
               for (int h = hstart; h < hend; ++h) {
                 for (int w = wstart; w < wend; ++w) {
-                  in_grad[(d*height+h)*width+w] +=
-                    lp_grad<DType, p>::Map(out_grad[pool_index],
-                                           in_data[(d*height+h)*width+w],
-                                           out_data[pool_index]) / pool_size;
+                  in_grad[(d * height + h) * width + w] +=
+                      lp_grad<DType, p>::Map(out_grad[pool_index],
+                                             in_data[(d * height + h) * width + w],
+                                             out_data[pool_index]) /
+                      pool_size;
                 }
               }
             }
@@ -1268,38 +1366,43 @@ inline void unpool_sum_3d_ncdhw_cpu(const DType *out_grad, const DType *in_data,
  * \brief avg/sum unpooling cpu function for 3-D images in 'ndhwc' layout.
  * Do not call this kernel directly. Use the interface unpool().
  */
-template<typename DType, int p = 1>
-inline void unpool_sum_3d_ndhwc_cpu(const DType* out_grad, const DType* in_data,
-                                    const DType *out_data, const mxnet::TShape &ishape,
-                                    const mxnet::TShape &oshape, const mxnet::TShape &kernel,
-                                    const mxnet::TShape &pad, const mxnet::TShape &stride,
-                                    DType *in_grad, const bool is_avg = false,
+template <typename DType, int p = 1>
+inline void unpool_sum_3d_ndhwc_cpu(const DType* out_grad,
+                                    const DType* in_data,
+                                    const DType* out_data,
+                                    const mxnet::TShape& ishape,
+                                    const mxnet::TShape& oshape,
+                                    const mxnet::TShape& kernel,
+                                    const mxnet::TShape& pad,
+                                    const mxnet::TShape& stride,
+                                    DType* in_grad,
+                                    const bool is_avg            = false,
                                     const bool count_include_pad = true) {
   const int depth = ishape[1], height = ishape[2], width = ishape[3];
   const int pooled_depth = oshape[1], pooled_height = oshape[2], pooled_width = oshape[3];
   const int kernel_d = kernel[0], kernel_h = kernel[1], kernel_w = kernel[2];
   const int pad_d = pad[0], pad_h = pad[1], pad_w = pad[2];
   const int stride_d = stride[0], stride_h = stride[1], stride_w = stride[2];
-  const int features = oshape[4];
-  const index_t in_grad_offset = ishape[1] * ishape[2] * ishape[3] * features;
+  const int features            = oshape[4];
+  const index_t in_grad_offset  = ishape[1] * ishape[2] * ishape[3] * features;
   const index_t out_grad_offset = oshape[1] * oshape[2] * oshape[3] * features;
   for (index_t n = 0; n < oshape[0]; ++n) {
     for (int pd = 0; pd < pooled_depth; ++pd) {
       for (int ph = 0; ph < pooled_height; ++ph) {
         for (int pw = 0; pw < pooled_width; ++pw) {
-          int dstart = pd * stride_d - pad_d;
-          int hstart = ph * stride_h - pad_h;
-          int wstart = pw * stride_w - pad_w;
-          int dend = std::min(dstart + kernel_d, depth + pad_d);
-          int hend = std::min(hstart + kernel_h, height + pad_h);
-          int wend = std::min(wstart + kernel_w, width + pad_w);
+          int dstart    = pd * stride_d - pad_d;
+          int hstart    = ph * stride_h - pad_h;
+          int wstart    = pw * stride_w - pad_w;
+          int dend      = std::min(dstart + kernel_d, depth + pad_d);
+          int hend      = std::min(hstart + kernel_h, height + pad_h);
+          int wend      = std::min(wstart + kernel_w, width + pad_w);
           int pool_size = (is_avg ? (dend - dstart) * (hend - hstart) * (wend - wstart) : 1);
-          dstart = std::max(dstart, 0);
-          hstart = std::max(hstart, 0);
-          wstart = std::max(wstart, 0);
-          dend = std::min(dend, depth);
-          hend = std::min(hend, height);
-          wend = std::min(wend, width);
+          dstart        = std::max(dstart, 0);
+          hstart        = std::max(hstart, 0);
+          wstart        = std::max(wstart, 0);
+          dend          = std::min(dend, depth);
+          hend          = std::min(hend, height);
+          wend          = std::min(wend, width);
           if (is_avg && !count_include_pad) {
             pool_size = (dend - dstart) * (hend - hstart) * (wend - wstart);
           }
@@ -1312,7 +1415,8 @@ inline void unpool_sum_3d_ndhwc_cpu(const DType* out_grad, const DType* in_data,
                   in_grad[in_index * features + c] +=
                       lp_grad<DType, p>::Map(out_grad[pool_index * features + c],
                                              in_data[in_index * features + c],
-                                             out_data[pool_index * features + c]) / pool_size;
+                                             out_data[pool_index * features + c]) /
+                      pool_size;
                 }
               }
             }
@@ -1341,19 +1445,27 @@ inline void unpool_sum_3d_ndhwc_cpu(const DType* out_grad, const DType* in_data,
  * \param out_data pointer of the output tensor data in the format of NCW, NCHW, or NCDHW
  * \param p_value value of p for Lp pooling
  */
-template<typename DType, int p>
-inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TShape& ishape,
-                 const mxnet::TShape& oshape, const mxnet::TShape& kernel, const mxnet::TShape& pad,
-                 const mxnet::TShape& stride, const int pool_type, OpReqType req_type,
-                 DType* out_data, const bool count_include_pad, int layout) {
+template <typename DType, int p>
+inline void pool(mshadow::Stream<cpu>* s,
+                 const DType* in_data,
+                 const mxnet::TShape& ishape,
+                 const mxnet::TShape& oshape,
+                 const mxnet::TShape& kernel,
+                 const mxnet::TShape& pad,
+                 const mxnet::TShape& stride,
+                 const int pool_type,
+                 OpReqType req_type,
+                 DType* out_data,
+                 const bool count_include_pad,
+                 int layout) {
   CHECK_EQ(req_type, kWriteTo) << "Only support req=kWriteTo in pooling operations";
   if (kernel.ndim() == 1) {
     if (layout == mshadow::kNWC) {
       if (pool_enum::kMaxPooling == pool_type) {
         pool_max_1d_nwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        pool_sum_1d_nwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data,
-                        true, count_include_pad);
+        pool_sum_1d_nwc_cpu(
+            in_data, ishape, oshape, kernel, pad, stride, out_data, true, count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
         pool_sum_1d_nwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kLpPooling == pool_type) {
@@ -1365,8 +1477,8 @@ inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TSh
       if (pool_enum::kMaxPooling == pool_type) {
         pool_max_1d_ncw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        pool_sum_1d_ncw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data,
-                            true, count_include_pad);
+        pool_sum_1d_ncw_cpu(
+            in_data, ishape, oshape, kernel, pad, stride, out_data, true, count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
         pool_sum_1d_ncw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kLpPooling == pool_type) {
@@ -1382,8 +1494,8 @@ inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TSh
       if (pool_enum::kMaxPooling == pool_type) {
         pool_max_2d_nhwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        pool_sum_2d_nhwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data,
-                        true, count_include_pad);
+        pool_sum_2d_nhwc_cpu(
+            in_data, ishape, oshape, kernel, pad, stride, out_data, true, count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
         pool_sum_2d_nhwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kLpPooling == pool_type) {
@@ -1395,8 +1507,8 @@ inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TSh
       if (pool_enum::kMaxPooling == pool_type) {
         pool_max_2d_nchw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        pool_sum_2d_nchw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data,
-                             true, count_include_pad);
+        pool_sum_2d_nchw_cpu(
+            in_data, ishape, oshape, kernel, pad, stride, out_data, true, count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
         pool_sum_2d_nchw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kLpPooling == pool_type) {
@@ -1412,8 +1524,8 @@ inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TSh
       if (pool_enum::kMaxPooling == pool_type) {
         pool_max_3d_ndhwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        pool_sum_3d_ndhwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data,
-                        true, count_include_pad);
+        pool_sum_3d_ndhwc_cpu(
+            in_data, ishape, oshape, kernel, pad, stride, out_data, true, count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
         pool_sum_3d_ndhwc_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kLpPooling == pool_type) {
@@ -1425,8 +1537,8 @@ inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TSh
       if (pool_enum::kMaxPooling == pool_type) {
         pool_max_3d_ncdhw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        pool_sum_3d_ncdhw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data,
-                              true, count_include_pad);
+        pool_sum_3d_ncdhw_cpu(
+            in_data, ishape, oshape, kernel, pad, stride, out_data, true, count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
         pool_sum_3d_ncdhw_cpu(in_data, ishape, oshape, kernel, pad, stride, out_data);
       } else if (pool_enum::kLpPooling == pool_type) {
@@ -1458,50 +1570,74 @@ inline void pool(mshadow::Stream<cpu>* s, const DType* in_data, const mxnet::TSh
  * \param in_grad pointer of the gradient of the operator's input tensor
  * \param p_value value of p for Lp pooling
  */
-template<typename DType, int p>
-inline void unpool(mshadow::Stream<cpu>* s, const DType* out_grad, const DType* in_data,
-                   const DType* out_data, const mxnet::TShape& ishape,
-                   const mxnet::TShape& oshape, const mxnet::TShape& kernel,
-                   const mxnet::TShape& pad, const mxnet::TShape& stride,
-                   const int pool_type, OpReqType req_type, DType* in_grad,
-                   const bool count_include_pad, int layout) {
-  if (mxnet::kNullOp == req_type) return;
+template <typename DType, int p>
+inline void unpool(mshadow::Stream<cpu>* s,
+                   const DType* out_grad,
+                   const DType* in_data,
+                   const DType* out_data,
+                   const mxnet::TShape& ishape,
+                   const mxnet::TShape& oshape,
+                   const mxnet::TShape& kernel,
+                   const mxnet::TShape& pad,
+                   const mxnet::TShape& stride,
+                   const int pool_type,
+                   OpReqType req_type,
+                   DType* in_grad,
+                   const bool count_include_pad,
+                   int layout) {
+  if (mxnet::kNullOp == req_type)
+    return;
   if (mxnet::kAddTo != req_type) {
     mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, ishape.Size(), in_grad);
   }
   if (kernel.ndim() == 1) {
     if (layout == mshadow::kNWC) {
       if (pool_enum::kMaxPooling == pool_type) {
-        unpool_max_1d_nwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad);
+        unpool_max_1d_nwc_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        unpool_sum_1d_nwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                              in_grad, true, count_include_pad);
+        unpool_sum_1d_nwc_cpu(out_grad,
+                              in_data,
+                              out_data,
+                              ishape,
+                              oshape,
+                              kernel,
+                              pad,
+                              stride,
+                              in_grad,
+                              true,
+                              count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
-        unpool_sum_1d_nwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad);
+        unpool_sum_1d_nwc_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kLpPooling == pool_type) {
-        unpool_sum_1d_nwc_cpu<DType, p>(out_grad, in_data, out_data, ishape, oshape, kernel, pad,
-                                    stride,
-                                    in_grad);
+        unpool_sum_1d_nwc_cpu<DType, p>(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else {
         LOG(FATAL) << "Unknown pooling type " << pool_type;
       }
     } else if (layout == mshadow::kNCW) {
       if (pool_enum::kMaxPooling == pool_type) {
-        unpool_max_1d_ncw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                              in_grad);
+        unpool_max_1d_ncw_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        unpool_sum_1d_ncw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
+        unpool_sum_1d_ncw_cpu(out_grad,
+                              in_data,
+                              out_data,
+                              ishape,
+                              oshape,
+                              kernel,
+                              pad,
+                              stride,
                               in_grad,
-                              true, count_include_pad);
+                              true,
+                              count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
-        unpool_sum_1d_ncw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                              in_grad);
+        unpool_sum_1d_ncw_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kLpPooling == pool_type) {
-        unpool_sum_1d_ncw_cpu<DType, p>(out_grad, in_data, out_data, ishape, oshape, kernel, pad,
-                                        stride,
-                                        in_grad);
+        unpool_sum_1d_ncw_cpu<DType, p>(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else {
         LOG(FATAL) << "Unknown pooling type " << pool_type;
       }
@@ -1511,37 +1647,51 @@ inline void unpool(mshadow::Stream<cpu>* s, const DType* out_grad, const DType*
   } else if (kernel.ndim() == 2) {
     if (layout == mshadow::kNHWC) {
       if (pool_enum::kMaxPooling == pool_type) {
-        unpool_max_2d_nhwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad);
+        unpool_max_2d_nhwc_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        unpool_sum_2d_nhwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad,
-                          true, count_include_pad);
+        unpool_sum_2d_nhwc_cpu(out_grad,
+                               in_data,
+                               out_data,
+                               ishape,
+                               oshape,
+                               kernel,
+                               pad,
+                               stride,
+                               in_grad,
+                               true,
+                               count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
-        unpool_sum_2d_nhwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad);
+        unpool_sum_2d_nhwc_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kLpPooling == pool_type) {
-        unpool_sum_2d_nhwc_cpu<DType, p>(out_grad, in_data, out_data, ishape, oshape, kernel, pad,
-                                    stride,
-                                    in_grad);
+        unpool_sum_2d_nhwc_cpu<DType, p>(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else {
         LOG(FATAL) << "Unknown pooling type " << pool_type;
       }
     } else if (layout == mshadow::kNCHW) {
       if (pool_enum::kMaxPooling == pool_type) {
-        unpool_max_2d_nchw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                               in_grad);
+        unpool_max_2d_nchw_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        unpool_sum_2d_nchw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
+        unpool_sum_2d_nchw_cpu(out_grad,
+                               in_data,
+                               out_data,
+                               ishape,
+                               oshape,
+                               kernel,
+                               pad,
+                               stride,
                                in_grad,
-                               true, count_include_pad);
+                               true,
+                               count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
-        unpool_sum_2d_nchw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                               in_grad);
+        unpool_sum_2d_nchw_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kLpPooling == pool_type) {
-        unpool_sum_2d_nchw_cpu<DType, p>(out_grad, in_data, out_data, ishape, oshape, kernel, pad,
-                                         stride,
-                                         in_grad);
+        unpool_sum_2d_nchw_cpu<DType, p>(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else {
         LOG(FATAL) << "Unknown pooling type " << pool_type;
       }
@@ -1551,36 +1701,51 @@ inline void unpool(mshadow::Stream<cpu>* s, const DType* out_grad, const DType*
   } else if (kernel.ndim() == 3) {
     if (layout == mshadow::kNDHWC) {
       if (pool_enum::kMaxPooling == pool_type) {
-        unpool_max_3d_ndhwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad);
+        unpool_max_3d_ndhwc_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        unpool_sum_3d_ndhwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                                in_grad, true, count_include_pad);
+        unpool_sum_3d_ndhwc_cpu(out_grad,
+                                in_data,
+                                out_data,
+                                ishape,
+                                oshape,
+                                kernel,
+                                pad,
+                                stride,
+                                in_grad,
+                                true,
+                                count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
-        unpool_sum_3d_ndhwc_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                          in_grad);
+        unpool_sum_3d_ndhwc_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kLpPooling == pool_type) {
-        unpool_sum_3d_ndhwc_cpu<DType, p>(out_grad, in_data, out_data, ishape, oshape, kernel, pad,
-                                    stride,
-                                    in_grad);
+        unpool_sum_3d_ndhwc_cpu<DType, p>(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else {
         LOG(FATAL) << "Unknown pooling type " << pool_type;
       }
     } else if (layout == mshadow::kNCDHW) {
       if (pool_enum::kMaxPooling == pool_type) {
-        unpool_max_3d_ncdhw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                                in_grad);
+        unpool_max_3d_ncdhw_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kAvgPooling == pool_type) {
-        unpool_sum_3d_ncdhw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
+        unpool_sum_3d_ncdhw_cpu(out_grad,
+                                in_data,
+                                out_data,
+                                ishape,
+                                oshape,
+                                kernel,
+                                pad,
+                                stride,
                                 in_grad,
-                                true, count_include_pad);
+                                true,
+                                count_include_pad);
       } else if (pool_enum::kSumPooling == pool_type) {
-        unpool_sum_3d_ncdhw_cpu(out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride,
-                                in_grad);
+        unpool_sum_3d_ncdhw_cpu(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else if (pool_enum::kLpPooling == pool_type) {
-        unpool_sum_3d_ncdhw_cpu<DType, p>(out_grad, in_data, out_data, ishape, oshape, kernel, pad,
-                                          stride,
-                                          in_grad);
+        unpool_sum_3d_ncdhw_cpu<DType, p>(
+            out_grad, in_data, out_data, ishape, oshape, kernel, pad, stride, in_grad);
       } else {
         LOG(FATAL) << "Unknown pooling type " << pool_type;
       }
diff --git a/src/operator/nn/pool_utils.h b/src/operator/nn/pool_utils.h
index 6bf7235048dc..925ebcc66de6 100644
--- a/src/operator/nn/pool_utils.h
+++ b/src/operator/nn/pool_utils.h
@@ -26,87 +26,87 @@ namespace mxnet {
 namespace op {
 
 // Define an accumulator type AccType to permit float16-I/O lp pooling to avoid underflow.
-template<typename DType>
+template <typename DType>
 struct PoolingTypes {
   typedef DType AccType;
 };
 
-template<>
+template <>
 struct PoolingTypes<mshadow::half::half_t> {
   typedef float AccType;
 };
 
-template<typename DType, int p>
+template <typename DType, int p>
 struct a_pow_p {
   static MSHADOW_XINLINE DType Map(const DType a) {
     return mshadow_op::power::Map(a, DType(p));
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct a_pow_p<DType, 1> {
   static MSHADOW_XINLINE DType Map(const DType a) {
     return a;
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct a_pow_p<DType, 2> {
   static MSHADOW_XINLINE DType Map(const DType a) {
-    return a*a;
+    return a * a;
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct a_pow_p<DType, 3> {
   static MSHADOW_XINLINE DType Map(const DType a) {
-    return a*a*a;
+    return a * a * a;
   }
 };
 
-template<typename DType, int p>
+template <typename DType, int p>
 struct a_root_p {
   static MSHADOW_XINLINE DType Map(const DType a) {
     return mshadow_op::power::Map(a, DType(1.0 / p));
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct a_root_p<DType, 1> {
   static MSHADOW_XINLINE DType Map(const DType a) {
     return a;
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct a_root_p<DType, 2> {
   static MSHADOW_XINLINE DType Map(const DType a) {
     return mshadow_op::square_root::Map(a);
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct a_root_p<DType, 3> {
   static MSHADOW_XINLINE DType Map(const DType a) {
     return mshadow_op::cube_root::Map(a);
   }
 };
 
-template<typename DType, int p>
+template <typename DType, int p>
 struct lp_grad {
   static MSHADOW_XINLINE DType Map(const DType grad, const DType in_data, const DType out_data) {
     return grad * mshadow_op::power::Map(in_data / out_data, DType(p - 1));
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct lp_grad<DType, 1> {
   static MSHADOW_XINLINE DType Map(const DType grad, const DType in_data, const DType out_data) {
     return grad;
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct lp_grad<DType, 2> {
   static MSHADOW_XINLINE DType Map(const DType grad, const DType in_data, const DType out_data) {
     // Avoid inf, if out_data has underflowed to 0 for a non-zero input, or nan if grad is also 0.
@@ -114,7 +114,7 @@ struct lp_grad<DType, 2> {
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct lp_grad<DType, 3> {
   static MSHADOW_XINLINE DType Map(const DType grad, const DType in_data, const DType out_data) {
     // Avoid inf, if out_data has underflowed to 0 for a non-zero input, or nan if grad is also 0.
@@ -123,7 +123,7 @@ struct lp_grad<DType, 3> {
   }
 };
 
-}   // namespace op
-}   // namespace mxnet
+}  // namespace op
+}  // namespace mxnet
 
 #endif  // MXNET_OPERATOR_NN_POOL_UTILS_H_
diff --git a/src/operator/nn/pooling-inl.h b/src/operator/nn/pooling-inl.h
index be35b7372ed2..fe0c0ceb8bf3 100644
--- a/src/operator/nn/pooling-inl.h
+++ b/src/operator/nn/pooling-inl.h
@@ -22,7 +22,7 @@
  * \file pooling-inl.h
  * \brief
  * \author Bing Xu, Jun Wu, Da Zheng, Hao Jin
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NN_POOLING_INL_H_
 #define MXNET_OPERATOR_NN_POOLING_INL_H_
@@ -41,7 +41,7 @@
 namespace mxnet {
 namespace op {
 
-void PoolingParamParser(nnvm::NodeAttrs *attrs);
+void PoolingParamParser(nnvm::NodeAttrs* attrs);
 
 struct PoolingParam : public dmlc::Parameter<PoolingParam> {
   mxnet::TShape kernel;
@@ -55,68 +55,74 @@ struct PoolingParam : public dmlc::Parameter<PoolingParam> {
   dmlc::optional<bool> count_include_pad;
   dmlc::optional<int> layout;
   DMLC_DECLARE_PARAMETER(PoolingParam) {
-    DMLC_DECLARE_FIELD(kernel).set_default(mxnet::TShape(0, 0))  // add default value here
-    .enforce_nonzero()
-    .describe("Pooling kernel size: (y, x) or (d, y, x)");
-
-    DMLC_DECLARE_FIELD(pool_type).set_default(pool_enum::kMaxPooling)  // add default pooling method
-    .add_enum("max", pool_enum::kMaxPooling)
-    .add_enum("avg", pool_enum::kAvgPooling)
-    .add_enum("sum", pool_enum::kSumPooling)
-    .add_enum("lp", pool_enum::kLpPooling)
-    .describe("Pooling type to be applied.");
-
-    DMLC_DECLARE_FIELD(global_pool).set_default(false)
-    .describe("Ignore kernel size, do global pooling based on current input feature map. ");
-
-    DMLC_DECLARE_FIELD(cudnn_off).set_default(false)
-    .describe("Turn off cudnn pooling and use MXNet pooling operator. ");
-
-    DMLC_DECLARE_FIELD(pooling_convention).set_default(pool_enum::kValid)
-    .add_enum("full", pool_enum::kFull)
-    .add_enum("valid", pool_enum::kValid)
-    .add_enum("same", pool_enum::kSame)
-    .describe("Pooling convention to be applied.");
-
-    DMLC_DECLARE_FIELD(stride).set_default(mxnet::TShape(0, 0))
-    .enforce_nonzero()
-    .describe("Stride: for pooling (y, x) or (d, y, x). Defaults to 1 for each dimension.");
-
-    DMLC_DECLARE_FIELD(pad).set_default(mxnet::TShape(0, 0))
-    .describe("Pad for pooling: (y, x) or (d, y, x). Defaults to no padding.");
-
-    DMLC_DECLARE_FIELD(p_value).set_default(dmlc::optional<int>())
-    .describe("Value of p for Lp pooling, can be 1 or 2, required for Lp Pooling.");
-
-    DMLC_DECLARE_FIELD(count_include_pad).set_default(dmlc::optional<bool>())
-    .describe("Only used for AvgPool, specify whether to count padding elements for average"
-              "calculation. For example, with a 5*5 kernel on a 3*3 corner of a image,"
-              "the sum of the 9 valid elements will be divided by 25 if this is set to true,"
-              "or it will be divided by 9 if this is set to false. Defaults to true.");
+    DMLC_DECLARE_FIELD(kernel)
+        .set_default(mxnet::TShape(0, 0))  // add default value here
+        .enforce_nonzero()
+        .describe("Pooling kernel size: (y, x) or (d, y, x)");
+
+    DMLC_DECLARE_FIELD(pool_type)
+        .set_default(pool_enum::kMaxPooling)  // add default pooling method
+        .add_enum("max", pool_enum::kMaxPooling)
+        .add_enum("avg", pool_enum::kAvgPooling)
+        .add_enum("sum", pool_enum::kSumPooling)
+        .add_enum("lp", pool_enum::kLpPooling)
+        .describe("Pooling type to be applied.");
+
+    DMLC_DECLARE_FIELD(global_pool)
+        .set_default(false)
+        .describe("Ignore kernel size, do global pooling based on current input feature map. ");
+
+    DMLC_DECLARE_FIELD(cudnn_off).set_default(false).describe(
+        "Turn off cudnn pooling and use MXNet pooling operator. ");
+
+    DMLC_DECLARE_FIELD(pooling_convention)
+        .set_default(pool_enum::kValid)
+        .add_enum("full", pool_enum::kFull)
+        .add_enum("valid", pool_enum::kValid)
+        .add_enum("same", pool_enum::kSame)
+        .describe("Pooling convention to be applied.");
+
+    DMLC_DECLARE_FIELD(stride)
+        .set_default(mxnet::TShape(0, 0))
+        .enforce_nonzero()
+        .describe("Stride: for pooling (y, x) or (d, y, x). Defaults to 1 for each dimension.");
+
+    DMLC_DECLARE_FIELD(pad)
+        .set_default(mxnet::TShape(0, 0))
+        .describe("Pad for pooling: (y, x) or (d, y, x). Defaults to no padding.");
+
+    DMLC_DECLARE_FIELD(p_value)
+        .set_default(dmlc::optional<int>())
+        .describe("Value of p for Lp pooling, can be 1 or 2, required for Lp Pooling.");
+
+    DMLC_DECLARE_FIELD(count_include_pad)
+        .set_default(dmlc::optional<bool>())
+        .describe(
+            "Only used for AvgPool, specify whether to count padding elements for average"
+            "calculation. For example, with a 5*5 kernel on a 3*3 corner of a image,"
+            "the sum of the 9 valid elements will be divided by 25 if this is set to true,"
+            "or it will be divided by 9 if this is set to false. Defaults to true.");
 
     DMLC_DECLARE_FIELD(layout)
-    .add_enum("NCW", mshadow::kNCW)
-    .add_enum("NCHW", mshadow::kNCHW)
-    .add_enum("NCDHW", mshadow::kNCDHW)
-    .add_enum("NWC", mshadow::kNWC)
-    .add_enum("NHWC", mshadow::kNHWC)
-    .add_enum("NDHWC", mshadow::kNDHWC)
-    .set_default(dmlc::optional<int>())
-    .describe("Set layout for input and output. Empty for\n    "
-              "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d.");
+        .add_enum("NCW", mshadow::kNCW)
+        .add_enum("NCHW", mshadow::kNCHW)
+        .add_enum("NCDHW", mshadow::kNCDHW)
+        .add_enum("NWC", mshadow::kNWC)
+        .add_enum("NHWC", mshadow::kNHWC)
+        .add_enum("NDHWC", mshadow::kNDHWC)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Set layout for input and output. Empty for\n    "
+            "default layout: NCW for 1d, NCHW for 2d and NCDHW for 3d.");
   }
 
   bool operator==(const PoolingParam& other) const {
-    return this->kernel             == other.kernel &&
-           this->stride             == other.stride &&
-           this->pad                == other.pad &&
-           this->pool_type          == other.pool_type &&
+    return this->kernel == other.kernel && this->stride == other.stride && this->pad == other.pad &&
+           this->pool_type == other.pool_type &&
            this->pooling_convention == other.pooling_convention &&
-           this->global_pool        == other.global_pool &&
-           this->cudnn_off          == other.cudnn_off &&
-           this->p_value            == other.p_value &&
-           this->count_include_pad  == other.count_include_pad &&
-           this->layout             == other.layout;
+           this->global_pool == other.global_pool && this->cudnn_off == other.cudnn_off &&
+           this->p_value == other.p_value && this->count_include_pad == other.count_include_pad &&
+           this->layout == other.layout;
   }
 
   // Extract layout from param, or supply default layout based on provided input dimension.
@@ -126,9 +132,15 @@ struct PoolingParam : public dmlc::Parameter<PoolingParam> {
       ret_val = layout.value();
     } else {
       switch (input_dim) {
-        case 3U: ret_val = mshadow::kNCW; break;
-        case 4U: ret_val = mshadow::kNCHW; break;
-        case 5U: ret_val = mshadow::kNCDHW; break;
+        case 3U:
+          ret_val = mshadow::kNCW;
+          break;
+        case 4U:
+          ret_val = mshadow::kNCHW;
+          break;
+        case 5U:
+          ret_val = mshadow::kNCDHW;
+          break;
         default:
           LOG(FATAL) << "Unexpected input data dim " << input_dim << "\n"
                      << "Pooling: Input data should be  3D in (batch, channel, x), "
@@ -190,9 +202,8 @@ struct PoolingParam : public dmlc::Parameter<PoolingParam> {
     return "";
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream kernel_s, stride_s, pad_s, pool_type_s,
-                       pooling_convention_s, global_pool_s, cudnn_off_s,
-                       p_value_s, count_include_pad_s, layout_s;
+    std::ostringstream kernel_s, stride_s, pad_s, pool_type_s, pooling_convention_s, global_pool_s,
+        cudnn_off_s, p_value_s, count_include_pad_s, layout_s;
     kernel_s << kernel;
     stride_s << stride;
     pad_s << pad;
@@ -203,15 +214,15 @@ struct PoolingParam : public dmlc::Parameter<PoolingParam> {
     p_value_s << p_value;
     count_include_pad_s << count_include_pad;
     layout_s << layout;
-    (*dict)["kernel"] = kernel_s.str();
-    (*dict)["stride"] = stride_s.str();
-    (*dict)["pad"] = pad_s.str();
-    (*dict)["pool_type"] = PoolType2String(pool_type);
+    (*dict)["kernel"]             = kernel_s.str();
+    (*dict)["stride"]             = stride_s.str();
+    (*dict)["pad"]                = pad_s.str();
+    (*dict)["pool_type"]          = PoolType2String(pool_type);
     (*dict)["pooling_convention"] = Convention2String(pooling_convention);
-    (*dict)["global_pool"] = global_pool_s.str();
-    (*dict)["cudnn_off"] = cudnn_off_s.str();
-    (*dict)["p_value"] = p_value_s.str();
-    (*dict)["count_include_pad"] = count_include_pad_s.str();
+    (*dict)["global_pool"]        = global_pool_s.str();
+    (*dict)["cudnn_off"]          = cudnn_off_s.str();
+    (*dict)["p_value"]            = p_value_s.str();
+    (*dict)["count_include_pad"]  = count_include_pad_s.str();
     if (layout.has_value()) {
       (*dict)["layout"] = PoolingLayout2String(layout.value());
     } else {
@@ -224,21 +235,21 @@ struct PoolingParam : public dmlc::Parameter<PoolingParam> {
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::PoolingParam> {
   size_t operator()(const mxnet::op::PoolingParam& val) {
-    size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.kernel);
-    ret = dmlc::HashCombine(ret, val.stride);
-    ret = dmlc::HashCombine(ret, val.pad);
-    ret = dmlc::HashCombine(ret, val.pool_type);
-    ret = dmlc::HashCombine(ret, val.pooling_convention);
-    ret = dmlc::HashCombine(ret, val.global_pool);
-    ret = dmlc::HashCombine(ret, val.cudnn_off);
-    ret = dmlc::HashCombine(ret, val.p_value);
-    ret = dmlc::HashCombine(ret, val.count_include_pad);
+    size_t ret     = 0;
+    ret            = dmlc::HashCombine(ret, val.kernel);
+    ret            = dmlc::HashCombine(ret, val.stride);
+    ret            = dmlc::HashCombine(ret, val.pad);
+    ret            = dmlc::HashCombine(ret, val.pool_type);
+    ret            = dmlc::HashCombine(ret, val.pooling_convention);
+    ret            = dmlc::HashCombine(ret, val.global_pool);
+    ret            = dmlc::HashCombine(ret, val.cudnn_off);
+    ret            = dmlc::HashCombine(ret, val.p_value);
+    ret            = dmlc::HashCombine(ret, val.count_include_pad);
     int val_layout = val.layout.has_value() ? val.layout.value() : -1;
-    ret = dmlc::HashCombine(ret, val_layout);
+    ret            = dmlc::HashCombine(ret, val_layout);
     return ret;
   }
 };
@@ -251,34 +262,34 @@ namespace op {
  * When MKLDNN is enabled, we might want 2 outputs instead of one inputs, which
  * also changes the number of inputs for backward.
  */
-int GetNumOutputs(const PoolingParam &param);
-int GetNumBackInputs(const PoolingParam &param);
+int GetNumOutputs(const PoolingParam& param);
+int GetNumBackInputs(const PoolingParam& param);
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class PoolingOp {
  public:
   void Init(PoolingParam p) {
     this->param_ = p;
   }
 
-  void Forward(const OpContext& ctx, const TBlob& in_data,
-               const OpReqType& req, const TBlob& out_data) {
+  void Forward(const OpContext& ctx,
+               const TBlob& in_data,
+               const OpReqType& req,
+               const TBlob& out_data) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
     const mxnet::TShape& ishape = in_data.shape_;
-    mxnet::TShape kernel = param_.kernel;
-    mxnet::TShape padding = param_.pad;
-    mxnet::TShape stride = param_.stride;
-    int layout = param_.GetLayout(ishape.ndim());
+    mxnet::TShape kernel        = param_.kernel;
+    mxnet::TShape padding       = param_.pad;
+    mxnet::TShape stride        = param_.stride;
+    int layout                  = param_.GetLayout(ishape.ndim());
     if (param_.global_pool) {
       // with global pooling, kernel shape corresponds to input shape with 'N' and 'C' removed
       if (layout == mshadow::kNWC || layout == mshadow::kNHWC || layout == mshadow::kNDHWC) {
-        kernel = mxnet::TShape(ishape.data() + 1,
-                        ishape.data() + ishape.ndim() - 1);
+        kernel = mxnet::TShape(ishape.data() + 1, ishape.data() + ishape.ndim() - 1);
 
       } else {
-        kernel = mxnet::TShape(ishape.data() + 2,
-                        ishape.data() + ishape.ndim());
+        kernel = mxnet::TShape(ishape.data() + 2, ishape.data() + ishape.ndim());
       }
       padding = mxnet::TShape(ishape.ndim() - 2, 0);
       for (index_t i = 0; i < ishape.ndim() - 2; i++) {
@@ -286,56 +297,79 @@ class PoolingOp {
       }
       stride = mxnet::TShape(ishape.ndim() - 2, 1);
     }
-    const int p_value = (param_.pool_type == pool_enum::kLpPooling && param_.p_value.has_value()) ?
-                        param_.p_value.value() : 1;
-    const bool count_include_pad = (param_.count_include_pad.has_value()) ?
-                                   param_.count_include_pad.value() : true;
+    const int p_value = (param_.pool_type == pool_enum::kLpPooling && param_.p_value.has_value())
+                            ? param_.p_value.value()
+                            : 1;
+    const bool count_include_pad =
+        (param_.count_include_pad.has_value()) ? param_.count_include_pad.value() : true;
     switch (p_value) {
       case 1:
-        pool<DType, 1>(s, in_data.dptr<DType>(), in_data.shape_, out_data.shape_,
-          kernel,
-          padding,
-          stride,
-          param_.pool_type, req, out_data.dptr<DType>(), count_include_pad, layout);
+        pool<DType, 1>(s,
+                       in_data.dptr<DType>(),
+                       in_data.shape_,
+                       out_data.shape_,
+                       kernel,
+                       padding,
+                       stride,
+                       param_.pool_type,
+                       req,
+                       out_data.dptr<DType>(),
+                       count_include_pad,
+                       layout);
         break;
       case 2:
-        pool<DType, 2>(s, in_data.dptr<DType>(), in_data.shape_, out_data.shape_,
-          kernel,
-          padding,
-          stride,
-          param_.pool_type, req, out_data.dptr<DType>(), count_include_pad, layout);
+        pool<DType, 2>(s,
+                       in_data.dptr<DType>(),
+                       in_data.shape_,
+                       out_data.shape_,
+                       kernel,
+                       padding,
+                       stride,
+                       param_.pool_type,
+                       req,
+                       out_data.dptr<DType>(),
+                       count_include_pad,
+                       layout);
         break;
       case 3:
-        pool<DType, 3>(s, in_data.dptr<DType>(), in_data.shape_, out_data.shape_,
-          kernel,
-          padding,
-          stride,
-          param_.pool_type, req, out_data.dptr<DType>(), count_include_pad, layout);
+        pool<DType, 3>(s,
+                       in_data.dptr<DType>(),
+                       in_data.shape_,
+                       out_data.shape_,
+                       kernel,
+                       padding,
+                       stride,
+                       param_.pool_type,
+                       req,
+                       out_data.dptr<DType>(),
+                       count_include_pad,
+                       layout);
         break;
       default:
         LOG(FATAL) << "p value of " << p_value << " is not supported yet...";
     }
   }
 
-  void Backward(const OpContext& ctx, const TBlob& out_grad,
-                const TBlob& in_data, const TBlob& out_data,
-                const OpReqType& req, const TBlob& in_grad) {
+  void Backward(const OpContext& ctx,
+                const TBlob& out_grad,
+                const TBlob& in_data,
+                const TBlob& out_data,
+                const OpReqType& req,
+                const TBlob& in_grad) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s              = ctx.get_stream<xpu>();
     const mxnet::TShape& ishape = in_data.shape_;
-    mxnet::TShape kernel = param_.kernel;
-    mxnet::TShape padding = param_.pad;
-    mxnet::TShape stride = param_.stride;
-    int layout = param_.GetLayout(ishape.ndim());
+    mxnet::TShape kernel        = param_.kernel;
+    mxnet::TShape padding       = param_.pad;
+    mxnet::TShape stride        = param_.stride;
+    int layout                  = param_.GetLayout(ishape.ndim());
     if (param_.global_pool) {
       // with global pooling, kernel shape corresponds to input shape with 'N' and 'C' removed
       if (layout == mshadow::kNWC || layout == mshadow::kNHWC || layout == mshadow::kNDHWC) {
-        kernel = mxnet::TShape(ishape.data() + 1,
-                        ishape.data() + ishape.ndim() - 1);
+        kernel = mxnet::TShape(ishape.data() + 1, ishape.data() + ishape.ndim() - 1);
 
       } else {
-        kernel = mxnet::TShape(ishape.data() + 2,
-                        ishape.data() + ishape.ndim());
+        kernel = mxnet::TShape(ishape.data() + 2, ishape.data() + ishape.ndim());
       }
       padding = mxnet::TShape(ishape.ndim() - 2, 0);
       for (index_t i = 0; i < ishape.ndim() - 2; i++) {
@@ -344,34 +378,59 @@ class PoolingOp {
       stride = mxnet::TShape(ishape.ndim() - 2, 1);
     }
 
-    const int p_value = (param_.pool_type == pool_enum::kLpPooling && param_.p_value.has_value()) ?
-                        param_.p_value.value() : 1;
-    const bool count_include_pad = (param_.count_include_pad.has_value()) ?
-                                   param_.count_include_pad.value() : true;
+    const int p_value = (param_.pool_type == pool_enum::kLpPooling && param_.p_value.has_value())
+                            ? param_.p_value.value()
+                            : 1;
+    const bool count_include_pad =
+        (param_.count_include_pad.has_value()) ? param_.count_include_pad.value() : true;
     switch (p_value) {
       case 1:
-        unpool<DType, 1>(s, out_grad.dptr<DType>(), in_data.dptr<DType>(), out_data.dptr<DType>(),
-           in_grad.shape_, out_grad.shape_,
-           kernel,
-           padding,
-           stride,
-           param_.pool_type, req, in_grad.dptr<DType>(), count_include_pad, layout);
+        unpool<DType, 1>(s,
+                         out_grad.dptr<DType>(),
+                         in_data.dptr<DType>(),
+                         out_data.dptr<DType>(),
+                         in_grad.shape_,
+                         out_grad.shape_,
+                         kernel,
+                         padding,
+                         stride,
+                         param_.pool_type,
+                         req,
+                         in_grad.dptr<DType>(),
+                         count_include_pad,
+                         layout);
         break;
       case 2:
-        unpool<DType, 2>(s, out_grad.dptr<DType>(), in_data.dptr<DType>(), out_data.dptr<DType>(),
-           in_grad.shape_, out_grad.shape_,
-           kernel,
-           padding,
-           stride,
-           param_.pool_type, req, in_grad.dptr<DType>(), count_include_pad, layout);
+        unpool<DType, 2>(s,
+                         out_grad.dptr<DType>(),
+                         in_data.dptr<DType>(),
+                         out_data.dptr<DType>(),
+                         in_grad.shape_,
+                         out_grad.shape_,
+                         kernel,
+                         padding,
+                         stride,
+                         param_.pool_type,
+                         req,
+                         in_grad.dptr<DType>(),
+                         count_include_pad,
+                         layout);
         break;
       case 3:
-        unpool<DType, 3>(s, out_grad.dptr<DType>(), in_data.dptr<DType>(), out_data.dptr<DType>(),
-           in_grad.shape_, out_grad.shape_,
-           kernel,
-           padding,
-           stride,
-           param_.pool_type, req, in_grad.dptr<DType>(), count_include_pad, layout);
+        unpool<DType, 3>(s,
+                         out_grad.dptr<DType>(),
+                         in_data.dptr<DType>(),
+                         out_data.dptr<DType>(),
+                         in_grad.shape_,
+                         out_grad.shape_,
+                         kernel,
+                         padding,
+                         stride,
+                         param_.pool_type,
+                         req,
+                         in_grad.dptr<DType>(),
+                         count_include_pad,
+                         layout);
         break;
       default:
         LOG(FATAL) << "p value of " << p_value << " is not supported yet...";
@@ -382,7 +441,7 @@ class PoolingOp {
   PoolingParam param_;
 };  // class PoolingOp
 
-template<typename xpu>
+template <typename xpu>
 void PoolingCompute(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -397,10 +456,8 @@ void PoolingCompute(const nnvm::NodeAttrs& attrs,
         << "You need to set the kernel size if global pooling is not used";
   }
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    if (pool_enum::kMaxPooling == param.pool_type
-        || pool_enum::kAvgPooling == param.pool_type
-        || pool_enum::kSumPooling == param.pool_type
-        || pool_enum::kLpPooling == param.pool_type) {
+    if (pool_enum::kMaxPooling == param.pool_type || pool_enum::kAvgPooling == param.pool_type ||
+        pool_enum::kSumPooling == param.pool_type || pool_enum::kLpPooling == param.pool_type) {
       PoolingOp<xpu, DType> op;
       op.Init(param);
       op.Forward(ctx, inputs[0], req[0], outputs[0]);
@@ -410,7 +467,7 @@ void PoolingCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void PoolingGradCompute(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -428,23 +485,21 @@ void PoolingGradCompute(const nnvm::NodeAttrs& attrs,
   off_t ograd_idx, in_data_idx, out_data_idx;
   // When MKLDNN is enabled, the input data may contains arrays for workspace.
   if (GetNumBackInputs(param) == 5) {
-    ograd_idx = 0;
-    in_data_idx = 2;
+    ograd_idx    = 0;
+    in_data_idx  = 2;
     out_data_idx = 3;
   } else {
-    ograd_idx = 0;
-    in_data_idx = 1;
+    ograd_idx    = 0;
+    in_data_idx  = 1;
     out_data_idx = 2;
   }
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    if (pool_enum::kMaxPooling == param.pool_type
-        || pool_enum::kAvgPooling == param.pool_type
-        || pool_enum::kSumPooling == param.pool_type
-        || pool_enum::kLpPooling == param.pool_type) {
+    if (pool_enum::kMaxPooling == param.pool_type || pool_enum::kAvgPooling == param.pool_type ||
+        pool_enum::kSumPooling == param.pool_type || pool_enum::kLpPooling == param.pool_type) {
       PoolingOp<xpu, DType> op;
       op.Init(param);
-      op.Backward(ctx, inputs[ograd_idx], inputs[in_data_idx],
-                  inputs[out_data_idx], req[0], outputs[0]);
+      op.Backward(
+          ctx, inputs[ograd_idx], inputs[in_data_idx], inputs[out_data_idx], req[0], outputs[0]);
     } else {
       LOG(FATAL) << "unknown pooling type";
     }
diff --git a/src/operator/nn/pooling.cc b/src/operator/nn/pooling.cc
index 39bd32b5e473..a47ebbca7db5 100644
--- a/src/operator/nn/pooling.cc
+++ b/src/operator/nn/pooling.cc
@@ -22,7 +22,7 @@
  * \file pooling.cc
  * \brief
  * \author Bing Xu, Jun Wu, Da Zheng
-*/
+ */
 #include "../elemwise_op_common.h"
 #include "./pooling-inl.h"
 #if MXNET_USE_ONEDNN == 1
@@ -32,7 +32,7 @@
 namespace mxnet {
 namespace op {
 
-void PoolingParamParser(nnvm::NodeAttrs *attrs) {
+void PoolingParamParser(nnvm::NodeAttrs* attrs) {
   using namespace mshadow;
   PoolingParam param;
   param.Init(attrs->dict);
@@ -40,24 +40,29 @@ void PoolingParamParser(nnvm::NodeAttrs *attrs) {
   if (param.kernel.ndim() > 0)
     param.layout = param.GetLayout(param.kernel.ndim() + 2);
   if (param.kernel.ndim() == 1) {
-    if (param.stride.ndim() == 0) param.stride = Shape1(1);
-    if (param.pad.ndim() == 0) param.pad = Shape1(0);
+    if (param.stride.ndim() == 0)
+      param.stride = Shape1(1);
+    if (param.pad.ndim() == 0)
+      param.pad = Shape1(0);
   } else if (param.kernel.ndim() == 2) {
-    if (param.stride.ndim() == 0) param.stride = Shape2(1, 1);
-    if (param.pad.ndim() == 0) param.pad = Shape2(0, 0);
+    if (param.stride.ndim() == 0)
+      param.stride = Shape2(1, 1);
+    if (param.pad.ndim() == 0)
+      param.pad = Shape2(0, 0);
   } else {
-      // ignore kernel size only if global_pool not assigned false
-      if (param.global_pool == false) {
-        CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim()
-            << "D pooling not supported";
-      }
-    if (param.stride.ndim() == 0) param.stride = Shape3(1, 1, 1);
-    if (param.pad.ndim() == 0) param.pad = Shape3(0, 0, 0);
+    // ignore kernel size only if global_pool not assigned false
+    if (param.global_pool == false) {
+      CHECK_EQ(param.kernel.ndim(), 3U) << param.kernel.ndim() << "D pooling not supported";
+    }
+    if (param.stride.ndim() == 0)
+      param.stride = Shape3(1, 1, 1);
+    if (param.pad.ndim() == 0)
+      param.pad = Shape3(0, 0, 0);
   }
   attrs->parsed = std::move(param);
 }
 
-int GetNumOutputs(const PoolingParam &param) {
+int GetNumOutputs(const PoolingParam& param) {
 #if MXNET_USE_ONEDNN == 1
   return MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param) ? 2 : 1;
 #else
@@ -65,7 +70,7 @@ int GetNumOutputs(const PoolingParam &param) {
 #endif
 }
 
-int GetNumBackInputs(const PoolingParam &param) {
+int GetNumBackInputs(const PoolingParam& param) {
 #if MXNET_USE_ONEDNN == 1
   return MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param) ? 5 : 3;
 #else
@@ -74,11 +79,11 @@ int GetNumBackInputs(const PoolingParam &param) {
 }
 
 static bool PoolingType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
+                        std::vector<int>* in_attrs,
+                        std::vector<int>* out_attrs) {
   out_attrs->at(0) = in_attrs->at(0);
 #if MXNET_USE_ONEDNN == 1
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   if (MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param)) {
     CHECK_GT(out_attrs->size(), 1U);
     out_attrs->at(1) = mshadow::kInt32;
@@ -87,12 +92,12 @@ static bool PoolingType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-static bool PoolingShape(const nnvm::NodeAttrs &attrs,
-                         mxnet::ShapeVector *in_shape,
-                         mxnet::ShapeVector *out_shape) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
+static bool PoolingShape(const nnvm::NodeAttrs& attrs,
+                         mxnet::ShapeVector* in_shape,
+                         mxnet::ShapeVector* out_shape) {
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), 1U);
-  const mxnet::TShape &dshape = (*in_shape)[0];
+  const mxnet::TShape& dshape = (*in_shape)[0];
   if (!mxnet::ndim_is_known(dshape)) {
     return false;
   }
@@ -102,30 +107,27 @@ static bool PoolingShape(const nnvm::NodeAttrs &attrs,
   }
 
   if (param.pooling_convention == pool_enum::kSame) {
-    CHECK_EQ(dshape.ndim(), 3U)
-      << "Pooling: Input data should be 3D in (batch, channel, x)"
-      << ". Currently 'same' supports Max Pooling 1-D";
+    CHECK_EQ(dshape.ndim(), 3U) << "Pooling: Input data should be 3D in (batch, channel, x)"
+                                << ". Currently 'same' supports Max Pooling 1-D";
     CHECK(param.pad[0] == 0 && param.pad[1] == 0 && param.pad[2] == 0)
-      << "Same pooling convention disables the use of pad parameter.";
+        << "Same pooling convention disables the use of pad parameter.";
   }
-  CHECK_GE(dshape.ndim(), 3)
-      << "Pooling: Input data should be  3D in (batch, channel, x)"
-      << " Or 4D in (batch, channel, y, x) "
-      << " Or 5D in (batch, channel, d, y, x)";
-  CHECK_LE(dshape.ndim(), 5)
-      << "Pooling: Input data should be  3D in (batch, channel, x)"
-      << " Or 4D in (batch, channel, y, x) "
-      << " Or 5D in (batch, channel, d, y, x)";
+  CHECK_GE(dshape.ndim(), 3) << "Pooling: Input data should be  3D in (batch, channel, x)"
+                             << " Or 4D in (batch, channel, y, x) "
+                             << " Or 5D in (batch, channel, d, y, x)";
+  CHECK_LE(dshape.ndim(), 5) << "Pooling: Input data should be  3D in (batch, channel, x)"
+                             << " Or 4D in (batch, channel, y, x) "
+                             << " Or 5D in (batch, channel, d, y, x)";
 
   for (int i = 0; i < dshape.ndim(); i++) {
     CHECK_LT(dshape[i], INT32_MAX) << "Pooling does not support large"
-        << " dimensions (>= 2^31).";
+                                   << " dimensions (>= 2^31).";
   }
 
   int layout = param.GetLayout(dshape.ndim());
   if (param.global_pool) {
     mxnet::TShape oshape = dshape;
-    int c_index = 0;
+    int c_index          = 0;
     switch (layout) {
       case mshadow::kNCW:
       case mshadow::kNCHW:
@@ -147,124 +149,121 @@ static bool PoolingShape(const nnvm::NodeAttrs &attrs,
     out_shape->push_back(oshape);  // save output shape
 #if MXNET_USE_ONEDNN == 1
     if (MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param))
-        out_shape->push_back(oshape);   // for workspace
+      out_shape->push_back(oshape);  // for workspace
 #endif
   } else if (param.kernel.ndim() == 0) {
     return false;
   } else if (param.kernel.ndim() == 1) {
-    CHECK_EQ(dshape.ndim(), 3U) <<
-      "Pooling: Input data should be 3D in (batch, channel, x)";
+    CHECK_EQ(dshape.ndim(), 3U) << "Pooling: Input data should be 3D in (batch, channel, x)";
     CHECK(layout == mshadow::kNCW || layout == mshadow::kNWC) << "Need 1D layout";
     // Perform shape calculations in a standard (NCW) layout space
-    mshadow::Shape<3> dshape_ncw = (layout == mshadow::kNWC) ?
-                                    ConvertLayout(dshape.get<3>(), mshadow::kNWC, mshadow::kNCW) :
-                                    dshape.get<3>();
+    mshadow::Shape<3> dshape_ncw =
+        (layout == mshadow::kNWC) ? ConvertLayout(dshape.get<3>(), mshadow::kNWC, mshadow::kNCW)
+                                  : dshape.get<3>();
     mshadow::Shape<3> oshape_ncw = dshape_ncw;
     CHECK(param.kernel[0] <= dshape_ncw[2] + 2 * param.pad[0])
-        << "kernel size (" << param.kernel[0] << ") exceeds input (" << dshape[2]
-        << " padded to " << (dshape_ncw[2] + 2*param.pad[0]) << ")";
+        << "kernel size (" << param.kernel[0] << ") exceeds input (" << dshape[2] << " padded to "
+        << (dshape_ncw[2] + 2 * param.pad[0]) << ")";
     if (param.pooling_convention == pool_enum::kValid) {
-      oshape_ncw[2] = 1 +
-                      (dshape_ncw[2] + 2 * param.pad[0] - param.kernel[0]) /
-                          param.stride[0];
+      oshape_ncw[2] = 1 + (dshape_ncw[2] + 2 * param.pad[0] - param.kernel[0]) / param.stride[0];
     } else if (param.pooling_convention == pool_enum::kFull) {
-      oshape_ncw[2] = 1 + static_cast<int>(std::ceil(
-                              static_cast<float>(dshape_ncw[2] + 2 * param.pad[0] -
-                                                 param.kernel[0]) /
-                              param.stride[0]));
+      oshape_ncw[2] =
+          1 + static_cast<int>(
+                  std::ceil(static_cast<float>(dshape_ncw[2] + 2 * param.pad[0] - param.kernel[0]) /
+                            param.stride[0]));
     } else {
-      oshape_ncw[2] = static_cast<int>(std::ceil(
-                          static_cast<float>(dshape_ncw[2] + 2 * param.pad[0]) /
-                          param.stride[0]));
+      oshape_ncw[2] = static_cast<int>(
+          std::ceil(static_cast<float>(dshape_ncw[2] + 2 * param.pad[0]) / param.stride[0]));
     }
     // Convert back from standard (NCW) layout space to the actual layout type
-    mxnet::TShape oshape = (layout == mshadow::kNWC) ?
-                    ConvertLayout(oshape_ncw, mshadow::kNCW, mshadow::kNWC) : oshape_ncw;
+    mxnet::TShape oshape = (layout == mshadow::kNWC)
+                               ? ConvertLayout(oshape_ncw, mshadow::kNCW, mshadow::kNWC)
+                               : oshape_ncw;
     out_shape->clear();
     out_shape->push_back(oshape);  // save output shape
 #if MXNET_USE_ONEDNN == 1
     if (MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param))
-      out_shape->push_back(oshape);   // for workspace
+      out_shape->push_back(oshape);  // for workspace
 #endif
   } else if (param.kernel.ndim() == 2) {
     CHECK_EQ(dshape.ndim(), 4U) << "Pooling: Input data should be 4D in (batch, channel, y, x)";
     CHECK(layout == mshadow::kNCHW || layout == mshadow::kNHWC) << "Need 2D layout";
     // Perform shape calculations in a standard (NCHW) layout space
-    mshadow::Shape<4> dshape_nchw = (layout == mshadow::kNHWC) ?
-                                    ConvertLayout(dshape.get<4>(), mshadow::kNHWC, mshadow::kNCHW) :
-                                    dshape.get<4>();
+    mshadow::Shape<4> dshape_nchw =
+        (layout == mshadow::kNHWC) ? ConvertLayout(dshape.get<4>(), mshadow::kNHWC, mshadow::kNCHW)
+                                   : dshape.get<4>();
     mshadow::Shape<4> oshape_nchw = dshape_nchw;
     CHECK(param.kernel[0] <= dshape_nchw[2] + 2 * param.pad[0])
         << "kernel size (" << param.kernel[0] << ") exceeds input (" << dshape_nchw[2]
-        << " padded to " << (dshape_nchw[2] + 2*param.pad[0]) << ")";
+        << " padded to " << (dshape_nchw[2] + 2 * param.pad[0]) << ")";
     CHECK(param.kernel[1] <= dshape_nchw[3] + 2 * param.pad[1])
         << "kernel size (" << param.kernel[1] << ") exceeds input (" << dshape_nchw[3]
-        << " padded to " << (dshape_nchw[3] + 2*param.pad[1]) << ")";
+        << " padded to " << (dshape_nchw[3] + 2 * param.pad[1]) << ")";
     if (param.pooling_convention == pool_enum::kValid) {
-      oshape_nchw[2] = 1 + (dshape_nchw[2] + 2 * param.pad[0] - param.kernel[0]) /
-                          param.stride[0];
-      oshape_nchw[3] = 1 + (dshape_nchw[3] + 2 * param.pad[1] - param.kernel[1]) /
-                          param.stride[1];
+      oshape_nchw[2] = 1 + (dshape_nchw[2] + 2 * param.pad[0] - param.kernel[0]) / param.stride[0];
+      oshape_nchw[3] = 1 + (dshape_nchw[3] + 2 * param.pad[1] - param.kernel[1]) / param.stride[1];
     } else {
-      oshape_nchw[2] = 1 + static_cast<int>(ceil(
-                               static_cast<float>(dshape_nchw[2] + 2 * param.pad[0] -
-                                                  param.kernel[0]) /
-                               param.stride[0]));
-      oshape_nchw[3] = 1 + static_cast<int>(ceil(
-                               static_cast<float>(dshape_nchw[3] + 2 * param.pad[1] -
-                                                  param.kernel[1]) /
-                               param.stride[1]));
+      oshape_nchw[2] =
+          1 + static_cast<int>(
+                  ceil(static_cast<float>(dshape_nchw[2] + 2 * param.pad[0] - param.kernel[0]) /
+                       param.stride[0]));
+      oshape_nchw[3] =
+          1 + static_cast<int>(
+                  ceil(static_cast<float>(dshape_nchw[3] + 2 * param.pad[1] - param.kernel[1]) /
+                       param.stride[1]));
     }
     // Convert back from standard (NCHW) layout space to the actual layout type
-    mxnet::TShape oshape = (layout == mshadow::kNHWC) ?
-                    ConvertLayout(oshape_nchw, mshadow::kNCHW, mshadow::kNHWC) : oshape_nchw;
+    mxnet::TShape oshape = (layout == mshadow::kNHWC)
+                               ? ConvertLayout(oshape_nchw, mshadow::kNCHW, mshadow::kNHWC)
+                               : oshape_nchw;
     out_shape->clear();
     out_shape->push_back(oshape);  // save output shape
 #if MXNET_USE_ONEDNN == 1
     if (MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param))
-      out_shape->push_back(oshape);   // for workspace
+      out_shape->push_back(oshape);  // for workspace
 #endif
   } else if (param.kernel.ndim() == 3) {
-    CHECK_EQ(dshape.ndim(), 5U)
-      << "Pooling: Input data should be 5D in (batch, channel, d, y, x)";
+    CHECK_EQ(dshape.ndim(), 5U) << "Pooling: Input data should be 5D in (batch, channel, d, y, x)";
     CHECK(layout == mshadow::kNCDHW || layout == mshadow::kNDHWC) << "Need 3D layout";
     // Perform shape calculations in a standard (NCDHW) layout space
-    mshadow::Shape<5> dshape_ncdhw = (layout == mshadow::kNDHWC) ?
-                                  ConvertLayout(dshape.get<5>(), mshadow::kNDHWC, mshadow::kNCDHW) :
-                                  dshape.get<5>();
+    mshadow::Shape<5> dshape_ncdhw =
+        (layout == mshadow::kNDHWC)
+            ? ConvertLayout(dshape.get<5>(), mshadow::kNDHWC, mshadow::kNCDHW)
+            : dshape.get<5>();
     mshadow::Shape<5> oshape_ncdhw = dshape_ncdhw;
     CHECK_LE(param.kernel[0], dshape_ncdhw[2] + 2 * param.pad[0]) << "kernel size exceeds input";
     CHECK_LE(param.kernel[1], dshape_ncdhw[3] + 2 * param.pad[1]) << "kernel size exceeds input";
     CHECK_LE(param.kernel[2], dshape_ncdhw[4] + 2 * param.pad[2]) << "kernel size exceeds input";
     if (param.pooling_convention == pool_enum::kValid) {
-      oshape_ncdhw[2] = 1 + (dshape_ncdhw[2] + 2 * param.pad[0] - param.kernel[0]) /
-                          param.stride[0];
-      oshape_ncdhw[3] = 1 + (dshape_ncdhw[3] + 2 * param.pad[1] - param.kernel[1]) /
-                          param.stride[1];
-      oshape_ncdhw[4] = 1 + (dshape_ncdhw[4] + 2 * param.pad[2] - param.kernel[2]) /
-                          param.stride[2];
+      oshape_ncdhw[2] =
+          1 + (dshape_ncdhw[2] + 2 * param.pad[0] - param.kernel[0]) / param.stride[0];
+      oshape_ncdhw[3] =
+          1 + (dshape_ncdhw[3] + 2 * param.pad[1] - param.kernel[1]) / param.stride[1];
+      oshape_ncdhw[4] =
+          1 + (dshape_ncdhw[4] + 2 * param.pad[2] - param.kernel[2]) / param.stride[2];
     } else {
-      oshape_ncdhw[2] = 1 + static_cast<int>(ceil(
-                                static_cast<float>(dshape_ncdhw[2] + 2 * param.pad[0] -
-                                                   param.kernel[0]) /
-                                param.stride[0]));
-      oshape_ncdhw[3] = 1 + static_cast<int>(ceil(
-                                static_cast<float>(dshape_ncdhw[3] + 2 * param.pad[1] -
-                                                   param.kernel[1]) /
-                                param.stride[1]));
-      oshape_ncdhw[4] = 1 + static_cast<int>(ceil(
-                                static_cast<float>(dshape_ncdhw[4] + 2 * param.pad[2] -
-                                                   param.kernel[2]) /
-                                param.stride[2]));
+      oshape_ncdhw[2] =
+          1 + static_cast<int>(
+                  ceil(static_cast<float>(dshape_ncdhw[2] + 2 * param.pad[0] - param.kernel[0]) /
+                       param.stride[0]));
+      oshape_ncdhw[3] =
+          1 + static_cast<int>(
+                  ceil(static_cast<float>(dshape_ncdhw[3] + 2 * param.pad[1] - param.kernel[1]) /
+                       param.stride[1]));
+      oshape_ncdhw[4] =
+          1 + static_cast<int>(
+                  ceil(static_cast<float>(dshape_ncdhw[4] + 2 * param.pad[2] - param.kernel[2]) /
+                       param.stride[2]));
     }
     // Convert back from standard (NCDHW) layout space to the actual layout type
-    mxnet::TShape oshape = (layout == mshadow::kNDHWC) ?
-                    ConvertLayout(oshape_ncdhw, mshadow::kNCDHW, mshadow::kNDHWC) : oshape_ncdhw;
+    mxnet::TShape oshape = (layout == mshadow::kNDHWC)
+                               ? ConvertLayout(oshape_ncdhw, mshadow::kNCDHW, mshadow::kNDHWC)
+                               : oshape_ncdhw;
     out_shape->clear();
     out_shape->push_back(oshape);  // save output shape
 #if MXNET_USE_ONEDNN == 1
     if (MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param))
-      out_shape->push_back(oshape);   // for workspace
+      out_shape->push_back(oshape);  // for workspace
 #endif
   }
 
@@ -272,12 +271,13 @@ static bool PoolingShape(const nnvm::NodeAttrs &attrs,
 }
 
 #if MXNET_USE_ONEDNN == 1
-void PoolingComputeExCPU(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
-                         const std::vector<NDArray> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<NDArray> &outputs) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
-  const NDArray *workspace = nullptr;
+void PoolingComputeExCPU(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<NDArray>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<NDArray>& outputs) {
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
+  const NDArray* workspace  = nullptr;
 
   // Pooling does not currently support working with views
   if (inputs[0].IsView() || outputs[0].IsView()) {
@@ -298,11 +298,12 @@ void PoolingComputeExCPU(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
   FallBackCompute(PoolingCompute<cpu>, attrs, ctx, inputs, req, outputs);
 }
 
-void PoolingGradComputeExCPU(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
-                             const std::vector<NDArray> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<NDArray> &outputs) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
+void PoolingGradComputeExCPU(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<NDArray>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<NDArray>& outputs) {
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
 
   // Pooling does not currently support working with views
   if (inputs[0].IsView() || outputs[0].IsView()) {
@@ -310,66 +311,63 @@ void PoolingGradComputeExCPU(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
     return;
   }
 
-
   if (SupportMKLDNNPooling(param, inputs[0])) {
-    const NDArray &out_grad = inputs[0];
-    const NDArray *workspace = nullptr;
-    const NDArray *in_data = nullptr;
+    const NDArray& out_grad  = inputs[0];
+    const NDArray* workspace = nullptr;
+    const NDArray* in_data   = nullptr;
     if (MKLDNNRequireWorkspace(param)) {
       // The first two elements are the gradient of the outputs in forward.
       // The third is the input of forward.
       // The fourth and the fifth are the outputs of forward.
       CHECK_EQ(inputs.size(), 5U);
-      in_data = &inputs[2];
+      in_data   = &inputs[2];
       workspace = &inputs[4];
     } else {
       CHECK_EQ(inputs.size(), 3U);
       in_data = &inputs[1];
     }
-    const NDArray &in_grad = outputs[0];
+    const NDArray& in_grad = outputs[0];
     MKLDNN_OPCHECK_INIT(true, outputs.size(), inputs, outputs);
-    MKLDNNPoolingGradCompute(ctx, param, out_grad, *in_data, workspace,
-                             req[0], in_grad);
-    MKLDNN_OPCHECK_RUN(PoolingGradCompute<cpu>, attrs, ctx, inputs, req,
-                       outputs);
+    MKLDNNPoolingGradCompute(ctx, param, out_grad, *in_data, workspace, req[0], in_grad);
+    MKLDNN_OPCHECK_RUN(PoolingGradCompute<cpu>, attrs, ctx, inputs, req, outputs);
     return;
   }
   FallBackCompute(PoolingGradCompute<cpu>, attrs, ctx, inputs, req, outputs);
 }
 
-inline static bool PoolingStorageType(const nnvm::NodeAttrs &attrs,
+inline static bool PoolingStorageType(const nnvm::NodeAttrs& attrs,
                                       const int dev_mask,
-                                      DispatchMode *dispatch_mode,
-                                      std::vector<int> *in_attrs,
-                                      std::vector<int> *out_attrs) {
+                                      DispatchMode* dispatch_mode,
+                                      std::vector<int>* in_attrs,
+                                      std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
-  bool support_mkldnn_pool = SupportMKLDNNPooling(param);
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
+  bool support_mkldnn_pool  = SupportMKLDNNPooling(param);
 
-  return MKLDNNStorageType(attrs, dev_mask, support_mkldnn_pool,
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(
+      attrs, dev_mask, support_mkldnn_pool, dispatch_mode, in_attrs, out_attrs);
 }
 
-inline static bool BackwardPoolingStorageType(const nnvm::NodeAttrs &attrs,
+inline static bool BackwardPoolingStorageType(const nnvm::NodeAttrs& attrs,
                                               const int dev_mask,
-                                              DispatchMode *dispatch_mode,
-                                              std::vector<int> *in_attrs,
-                                              std::vector<int> *out_attrs) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
+                                              DispatchMode* dispatch_mode,
+                                              std::vector<int>* in_attrs,
+                                              std::vector<int>* out_attrs) {
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), GetNumBackInputs(param));
   CHECK_EQ(out_attrs->size(), 1);
   bool support_mkldnn_pool = SupportMKLDNNPooling(param);
 
-  return MKLDNNStorageType(attrs, dev_mask, support_mkldnn_pool,
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(
+      attrs, dev_mask, support_mkldnn_pool, dispatch_mode, in_attrs, out_attrs);
 }
 #endif
 
 DMLC_REGISTER_PARAMETER(PoolingParam);
 
 NNVM_REGISTER_OP(Pooling)
-.add_alias("_npx_pooling")
-.describe(R"code(Performs pooling on the input.
+    .add_alias("_npx_pooling")
+    .describe(R"code(Performs pooling on the input.
 
 The shapes for 1-D pooling are
 
@@ -419,76 +417,76 @@ For each window ``X``, the mathematical expression for Lp pooling is:
 :math:`f(X) = \sqrt[p]{\sum_{x}^{X} x^p}`
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
-  return GetNumOutputs(param);
-})
+    .set_num_inputs(1)
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
+      return GetNumOutputs(param);
+    })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-                                    [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
 #endif
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
-  if (GetNumOutputs(param) == 2)
-    return std::vector<std::string>{"output", "workspace"};
-  else
-    return std::vector<std::string>{"output"};
-})
-.set_attr_parser(PoolingParamParser)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        const PoolingParam& param =
+                                            nnvm::get<PoolingParam>(attrs.parsed);
+                                        if (GetNumOutputs(param) == 2)
+                                          return std::vector<std::string>{"output", "workspace"};
+                                        else
+                                          return std::vector<std::string>{"output"};
+                                      })
+    .set_attr_parser(PoolingParamParser)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", PoolingStorageType)
+    .set_attr<FInferStorageType>("FInferStorageType", PoolingStorageType)
 #endif
-.set_attr<nnvm::FInferType>("FInferType", PoolingType)
-.set_attr<mxnet::FInferShape>("FInferShape", PoolingShape)
-.set_attr<FCompute>("FCompute<cpu>", PoolingCompute<cpu>)
+    .set_attr<nnvm::FInferType>("FInferType", PoolingType)
+    .set_attr<mxnet::FInferShape>("FInferShape", PoolingShape)
+    .set_attr<FCompute>("FCompute<cpu>", PoolingCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", PoolingComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", PoolingComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient",
-                           ElemwiseGradUseInOut{"_backward_Pooling"})
-.add_argument("data", "NDArray-or-Symbol",
-              "Input data to the pooling operator.")
-.add_arguments(PoolingParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_Pooling"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the pooling operator.")
+    .add_arguments(PoolingParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Pooling)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
-  // 1 input to fwd op and 2 * outputs from fwd op (fwd outputs and gradient inputs)
-  return 1 + 2 * GetNumOutputs(param);
-})
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>(
-    "FInplaceOption",
-    [](const NodeAttrs &attrs) {
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
+      // 1 input to fwd op and 2 * outputs from fwd op (fwd outputs and gradient inputs)
+      return 1 + 2 * GetNumOutputs(param);
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
 // Different backend requires different FInplaceOption
 #if MXNET_USE_ONEDNN == 1
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
-  if (MKLDNNRequireWorkspace(param) && SupportMKLDNNPooling(param))
-    return std::vector<std::pair<int, int> >{{1, 0}};
+                                      const PoolingParam& param =
+                                          nnvm::get<PoolingParam>(attrs.parsed);
+                                      if (MKLDNNRequireWorkspace(param) &&
+                                          SupportMKLDNNPooling(param))
+                                        return std::vector<std::pair<int, int> >{{1, 0}};
 #endif
-  return std::vector<std::pair<int, int> >();
-})
+                                      return std::vector<std::pair<int, int> >();
+                                    })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FInferStorageType>("FInferStorageType",
-                             BackwardPoolingStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardPoolingStorageType)
 #endif
-.set_attr_parser(PoolingParamParser)
+    .set_attr_parser(PoolingParamParser)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", PoolingGradComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", PoolingGradComputeExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", PoolingGradCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", PoolingGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/pooling.cu b/src/operator/nn/pooling.cu
index 84cacc15e239..060f425dc409 100644
--- a/src/operator/nn/pooling.cu
+++ b/src/operator/nn/pooling.cu
@@ -22,7 +22,7 @@
  * \file pooling.cu
  * \brief
  * \author Bing Xu, Jun Wu, Da Zheng
-*/
+ */
 #include <vector>
 #include "./pooling-inl.h"
 #if MXNET_USE_CUDNN == 1
@@ -33,8 +33,8 @@ namespace mxnet {
 namespace op {
 
 #if MXNET_USE_CUDNN == 1
-template<typename DType>
-static CuDNNPoolingOp<DType> &GetCuDNNPoolingOp(const PoolingParam &param) {
+template <typename DType>
+static CuDNNPoolingOp<DType>& GetCuDNNPoolingOp(const PoolingParam& param) {
 #if DMLC_CXX11_THREAD_LOCAL
   static thread_local CuDNNPoolingOp<DType> op;
 #else
@@ -45,7 +45,7 @@ static CuDNNPoolingOp<DType> &GetCuDNNPoolingOp(const PoolingParam &param) {
 }
 #endif
 
-template<>
+template <>
 void PoolingCompute<gpu>(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -67,10 +67,8 @@ void PoolingCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif  // MXNET_USE_CUDNN
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    if (pool_enum::kMaxPooling == param.pool_type
-        || pool_enum::kAvgPooling == param.pool_type
-        || pool_enum::kSumPooling == param.pool_type
-        || pool_enum::kLpPooling == param.pool_type) {
+    if (pool_enum::kMaxPooling == param.pool_type || pool_enum::kAvgPooling == param.pool_type ||
+        pool_enum::kSumPooling == param.pool_type || pool_enum::kLpPooling == param.pool_type) {
       PoolingOp<gpu, DType> op;
       op.Init(param);
       op.Forward(ctx, inputs[0], req[0], outputs[0]);
@@ -80,7 +78,7 @@ void PoolingCompute<gpu>(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<>
+template <>
 void PoolingGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -93,12 +91,12 @@ void PoolingGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
   off_t ograd_idx, in_data_idx, out_data_idx;
   // When MKLDNN is enabled, the input data may contains arrays for workspace.
   if (GetNumBackInputs(param) == 5) {
-    ograd_idx = 0;
-    in_data_idx = 2;
+    ograd_idx    = 0;
+    in_data_idx  = 2;
     out_data_idx = 3;
   } else {
-    ograd_idx = 0;
-    in_data_idx = 1;
+    ograd_idx    = 0;
+    in_data_idx  = 1;
     out_data_idx = 2;
   }
 
@@ -106,35 +104,30 @@ void PoolingGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
   if (!param.cudnn_off) {
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
       if (CuDNNPoolingOp<DType>::Supports(param, inputs[in_data_idx])) {
-          GetCuDNNPoolingOp<DType>(param).Backward(ctx, inputs[ograd_idx],
-                                                   inputs[in_data_idx], inputs[out_data_idx],
-                                                   req[0], outputs[0]);
-          return;
+        GetCuDNNPoolingOp<DType>(param).Backward(
+            ctx, inputs[ograd_idx], inputs[in_data_idx], inputs[out_data_idx], req[0], outputs[0]);
+        return;
       }
     });
   }
 #endif  // MXNET_USE_CUDNN
 
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    if (pool_enum::kMaxPooling == param.pool_type
-        || pool_enum::kAvgPooling == param.pool_type
-        || pool_enum::kSumPooling == param.pool_type
-        || pool_enum::kLpPooling == param.pool_type) {
+    if (pool_enum::kMaxPooling == param.pool_type || pool_enum::kAvgPooling == param.pool_type ||
+        pool_enum::kSumPooling == param.pool_type || pool_enum::kLpPooling == param.pool_type) {
       PoolingOp<gpu, DType> op;
       op.Init(param);
-      op.Backward(ctx, inputs[ograd_idx], inputs[in_data_idx],
-                  inputs[out_data_idx], req[0], outputs[0]);
+      op.Backward(
+          ctx, inputs[ograd_idx], inputs[in_data_idx], inputs[out_data_idx], req[0], outputs[0]);
     } else {
       LOG(FATAL) << "unknown pooling type";
     }
   });
 }
 
-NNVM_REGISTER_OP(Pooling)
-.set_attr<FCompute>("FCompute<gpu>", PoolingCompute<gpu>);
+NNVM_REGISTER_OP(Pooling).set_attr<FCompute>("FCompute<gpu>", PoolingCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_Pooling)
-.set_attr<FCompute>("FCompute<gpu>", PoolingGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_Pooling).set_attr<FCompute>("FCompute<gpu>", PoolingGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/sequence_mask-inl.h b/src/operator/nn/sequence_mask-inl.h
index df98116372cd..548845fc8808 100644
--- a/src/operator/nn/sequence_mask-inl.h
+++ b/src/operator/nn/sequence_mask-inl.h
@@ -20,7 +20,7 @@
 /*!
  * \file sequence_mask-inl.h
  * \brief
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_SEQUENCE_MASK_INL_H_
 #define MXNET_OPERATOR_NN_SEQUENCE_MASK_INL_H_
 
@@ -29,8 +29,9 @@ namespace op {
 namespace mxnet_op {
 
 template <typename DType, typename LType>
-inline void SequenceMask(const mshadow::Tensor<cpu, 3, DType> &dst,
-                         const mshadow::Tensor<cpu, 1, LType> label, DType value) {
+inline void SequenceMask(const mshadow::Tensor<cpu, 3, DType>& dst,
+                         const mshadow::Tensor<cpu, 1, LType> label,
+                         DType value) {
   for (index_t b = 0; b < dst.size(1); ++b)
     for (index_t s = label[b]; s < dst.size(0); ++s)
       for (index_t r = 0; r < dst.size(2); ++r)
@@ -38,9 +39,10 @@ inline void SequenceMask(const mshadow::Tensor<cpu, 3, DType> &dst,
 }
 
 #ifdef __CUDACC__
-template<int n_bits, typename DType, typename LType>
+template <int n_bits, typename DType, typename LType>
 __global__ void SequenceMaskKernel(mshadow::Tensor<gpu, 3, DType> dst,
-                                   const mshadow::Tensor<gpu, 1, LType> lengths, DType value) {
+                                   const mshadow::Tensor<gpu, 1, LType> lengths,
+                                   DType value) {
   const index_t smax = dst.size(0);
   const index_t bmax = lengths.size(1);
   const index_t nmax = dst.size(2);
@@ -51,14 +53,15 @@ __global__ void SequenceMaskKernel(mshadow::Tensor<gpu, 3, DType> dst,
     return;
 
   // loop over batches
-    for (index_t s = lengths[batch]; s < smax; ++s)
-      for (index_t r = 0; r < nmax; ++r)
+  for (index_t s = lengths[batch]; s < smax; ++s)
+    for (index_t r = 0; r < nmax; ++r)
       dst[s][batch][r] = value;
 }
 
-template<typename DType, typename LType>
-inline void SequenceMask(const mshadow::Tensor<gpu, 3, DType> &dst,
-                         const mshadow::Tensor<gpu, 1, LType> &lengths, DType value) {
+template <typename DType, typename LType>
+inline void SequenceMask(const mshadow::Tensor<gpu, 3, DType>& dst,
+                         const mshadow::Tensor<gpu, 1, LType>& lengths,
+                         DType value) {
   using namespace mshadow;
   using namespace mshadow::cuda;
   dim3 dimBlock(kBaseThreadNum);
diff --git a/src/operator/nn/softmax-inl.h b/src/operator/nn/softmax-inl.h
index 59af42649776..620239ff003f 100644
--- a/src/operator/nn/softmax-inl.h
+++ b/src/operator/nn/softmax-inl.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2017 by Contributors
  * \file softmax-inl.h
  * \brief
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_SOFTMAX_INL_H_
 #define MXNET_OPERATOR_NN_SOFTMAX_INL_H_
 
@@ -42,53 +42,63 @@ namespace op {
 namespace mxnet_op {
 
 struct softmax_fwd {
-  template<typename AType>
+  template <typename AType>
   MSHADOW_XINLINE static AType Map(float a, AType b) {
-    return AType(expf(a)/b);
+    return AType(expf(a) / b);
   }
 
-  template<typename AType>
+  template <typename AType>
   MSHADOW_XINLINE static AType Map(double a, AType b) {
-    return AType(exp(a)/b);
+    return AType(exp(a) / b);
   }
 };
 
-
 struct log_softmax_fwd {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static float Map(DType a, float b) {
     return a - logf(b);
   }
 
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static double Map(DType a, double b) {
     return a - log(b);
   }
 };
 
-
-template<typename OP, bool negate, typename AType, typename DType, typename OType,
-         typename IType, int ndim>
-inline void Softmax(Stream<cpu> *s, DType *in, OType *out, IType *length,
-                    Shape<ndim> shape, int axis, const DType temperature) {
+template <typename OP,
+          bool negate,
+          typename AType,
+          typename DType,
+          typename OType,
+          typename IType,
+          int ndim>
+inline void Softmax(Stream<cpu>* s,
+                    DType* in,
+                    OType* out,
+                    IType* length,
+                    Shape<ndim> shape,
+                    int axis,
+                    const DType temperature) {
   index_t M = shape[axis];
-  if (M == 0) return;
-  index_t N = shape.Size()/M;
+  if (M == 0)
+    return;
+  index_t N          = shape.Size() / M;
   Shape<ndim> stride = calc_stride(shape);
   Shape<ndim> sshape = shape;
-  sshape[axis] = 1;
-  index_t sa = stride[axis];
+  sshape[axis]       = 1;
+  index_t sa         = stride[axis];
 
   if (length == nullptr) {
-    #pragma omp parallel for
+#pragma omp parallel for
     for (index_t i = 0; i < N; ++i) {
       index_t base = unravel_dot(i, sshape, stride);
 
       DType mmax = negate ? -in[base] : in[base];
       DType val;
       for (index_t j = 1; j < M; ++j) {
-        val = negate ? -in[base + j*sa] : in[base + j*sa];
-        if (mmax < val) mmax = val;
+        val = negate ? -in[base + j * sa] : in[base + j * sa];
+        if (mmax < val)
+          mmax = val;
       }
 
       AType sum = AType(0);
@@ -97,40 +107,41 @@ inline void Softmax(Stream<cpu> *s, DType *in, OType *out, IType *length,
       // Adding a branch here to save the CPU 'divide-by-1' computation at runtime
       if (temperature == 1.0) {
         for (index_t j = 0; j < M; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
+          in_val = negate ? -in[base + j * sa] : in[base + j * sa];
           sum += std::exp(in_val - mmax);
         }
 
         for (index_t j = 0; j < M; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
-          out[base + j*sa] = OP::Map(in_val - mmax, sum);
+          in_val             = negate ? -in[base + j * sa] : in[base + j * sa];
+          out[base + j * sa] = OP::Map(in_val - mmax, sum);
         }
       } else {
         for (index_t j = 0; j < M; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
-          sum += std::exp((in_val - mmax)/temperature);
+          in_val = negate ? -in[base + j * sa] : in[base + j * sa];
+          sum += std::exp((in_val - mmax) / temperature);
         }
 
         for (index_t j = 0; j < M; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
-          out[base + j*sa] = OP::Map((in_val - mmax)/temperature, sum);
+          in_val             = negate ? -in[base + j * sa] : in[base + j * sa];
+          out[base + j * sa] = OP::Map((in_val - mmax) / temperature, sum);
         }
       }
     }
   } else {
-    #pragma omp parallel for
+#pragma omp parallel for
     for (index_t i = 0; i < N; ++i) {
-      index_t len = static_cast<index_t>(length[i]);
+      index_t len  = static_cast<index_t>(length[i]);
       index_t base = unravel_dot(i, sshape, stride);
 
       DType mmax = negate ? -in[base] : in[base];
       DType val;
       for (index_t j = 1; j < len; ++j) {
-        val = negate ? -in[base + j*sa] : in[base + j*sa];
-        if (mmax < val) mmax = val;
+        val = negate ? -in[base + j * sa] : in[base + j * sa];
+        if (mmax < val)
+          mmax = val;
       }
       for (index_t j = len; j < M; ++j) {
-        out[base + j*sa] = OType(0.0f);
+        out[base + j * sa] = OType(0.0f);
       }
 
       AType sum = AType(0);
@@ -139,23 +150,23 @@ inline void Softmax(Stream<cpu> *s, DType *in, OType *out, IType *length,
       // Adding a branch here to save the CPU 'divide-by-1' computation at runtime
       if (temperature == 1.0) {
         for (index_t j = 0; j < len; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
+          in_val = negate ? -in[base + j * sa] : in[base + j * sa];
           sum += std::exp(in_val - mmax);
         }
 
         for (index_t j = 0; j < len; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
-          out[base + j*sa] = OP::Map(in_val - mmax, sum);
+          in_val             = negate ? -in[base + j * sa] : in[base + j * sa];
+          out[base + j * sa] = OP::Map(in_val - mmax, sum);
         }
       } else {
         for (index_t j = 0; j < len; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
-          sum += std::exp((in_val - mmax)/temperature);
+          in_val = negate ? -in[base + j * sa] : in[base + j * sa];
+          sum += std::exp((in_val - mmax) / temperature);
         }
 
         for (index_t j = 0; j < len; ++j) {
-          in_val = negate ? -in[base + j*sa] : in[base + j*sa];
-          out[base + j*sa] = OP::Map((in_val - mmax)/temperature, sum);
+          in_val             = negate ? -in[base + j * sa] : in[base + j * sa];
+          out[base + j * sa] = OP::Map((in_val - mmax) / temperature, sum);
         }
       }
     }
@@ -163,16 +174,20 @@ inline void Softmax(Stream<cpu> *s, DType *in, OType *out, IType *length,
 }
 
 struct masked_softmax_where {
-  template<typename DType, int ndim>
-  MSHADOW_XINLINE static void Map(index_t id, DType* out, const bool* cond,
-                                  const DType* x, const double y,
-                                  Shape<ndim> data_shape, Shape<ndim> mask_shape) {
+  template <typename DType, int ndim>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  DType* out,
+                                  const bool* cond,
+                                  const DType* x,
+                                  const double y,
+                                  Shape<ndim> data_shape,
+                                  Shape<ndim> mask_shape) {
     index_t mask_pos = 0;
-    index_t stride = 1;
-    for (index_t i = ndim-1, j = id; i >=0; --i) {
+    index_t stride   = 1;
+    for (index_t i = ndim - 1, j = id; i >= 0; --i) {
       auto tmp = j / data_shape[i];
       if (mask_shape[i] != 1) {
-        mask_pos += (j - tmp  * mask_shape[i]) * stride;
+        mask_pos += (j - tmp * mask_shape[i]) * stride;
       }
       stride *= mask_shape[i];
       j = tmp;
@@ -181,72 +196,88 @@ struct masked_softmax_where {
   }
 };
 
-template<typename OP, bool masked_neg_inf, bool negate,
-         typename AType, typename DType, int ndim>
-inline void MaskedSoftmax(Stream<cpu> *s, DType *in, DType *out, bool *mask,
-                          Shape<ndim> data_shape, Shape<ndim> mask_shape,
-                          int axis, const double temperature, bool normalize,
+template <typename OP, bool masked_neg_inf, bool negate, typename AType, typename DType, int ndim>
+inline void MaskedSoftmax(Stream<cpu>* s,
+                          DType* in,
+                          DType* out,
+                          bool* mask,
+                          Shape<ndim> data_shape,
+                          Shape<ndim> mask_shape,
+                          int axis,
+                          const double temperature,
+                          bool normalize,
                           const OpContext& ctx) {
-  Tensor<cpu, 1, DType> workspace = ctx.requested[0].get_space_typed<cpu, 1, DType>(
-      Shape1(data_shape.Size()), s);
+  Tensor<cpu, 1, DType> workspace =
+      ctx.requested[0].get_space_typed<cpu, 1, DType>(Shape1(data_shape.Size()), s);
   DType* masked_input = TBlob(workspace).dptr<DType>();
 
   double neg = MinValue<DType>();
-  Kernel<masked_softmax_where, cpu>::Launch(s, data_shape.Size(), masked_input,
-                                            mask, in, neg, data_shape, mask_shape);
-  int* max_lenghts = nullptr;
+  Kernel<masked_softmax_where, cpu>::Launch(
+      s, data_shape.Size(), masked_input, mask, in, neg, data_shape, mask_shape);
+  int* max_lenghts    = nullptr;
   double masked_value = 0.0;
   if (masked_neg_inf)
     masked_value = -INFINITY;
-  Softmax<OP, negate, AType, DType>(s, masked_input, out, max_lenghts,
-                                    data_shape, axis, temperature);
-  Kernel<masked_softmax_where, cpu>::Launch(s, data_shape.Size(), out,
-                                            mask, out, masked_value, data_shape,
-                                            mask_shape);
+  Softmax<OP, negate, AType, DType>(
+      s, masked_input, out, max_lenghts, data_shape, axis, temperature);
+  Kernel<masked_softmax_where, cpu>::Launch(
+      s, data_shape.Size(), out, mask, out, masked_value, data_shape, mask_shape);
 }
 
 struct softmax_bwd {
-  template<typename DType, typename AType>
+  template <typename DType, typename AType>
   MSHADOW_XINLINE static AType Map(DType ograd, DType out, AType sum) {
     return AType(out * (ograd - sum));
   }
 };
 
-
 struct log_softmax_bwd {
-  template<typename AType>
+  template <typename AType>
   MSHADOW_XINLINE static AType Map(float ograd, float out, AType sum) {
-    return AType(ograd - expf(out)*sum);
+    return AType(ograd - expf(out) * sum);
   }
 
-  template<typename AType>
+  template <typename AType>
   MSHADOW_XINLINE static AType Map(double ograd, double out, AType sum) {
-    return AType(ograd - exp(out)*sum);
+    return AType(ograd - exp(out) * sum);
   }
 };
 
-template<typename OP1, typename OP2, int Req, bool negate,
-         typename AType, typename DType, typename OType, typename IType, int ndim>
-inline void SoftmaxGrad(Stream<cpu> *s, OType *out, OType *ograd,
-                        DType *igrad, IType *length, Shape<ndim> shape,
-                        int axis, const DType temperature) {
+template <typename OP1,
+          typename OP2,
+          int Req,
+          bool negate,
+          typename AType,
+          typename DType,
+          typename OType,
+          typename IType,
+          int ndim>
+inline void SoftmaxGrad(Stream<cpu>* s,
+                        OType* out,
+                        OType* ograd,
+                        DType* igrad,
+                        IType* length,
+                        Shape<ndim> shape,
+                        int axis,
+                        const DType temperature) {
   index_t M = shape[axis];
-  if (M == 0) return;
-  index_t N = shape.Size()/M;
+  if (M == 0)
+    return;
+  index_t N          = shape.Size() / M;
   Shape<ndim> stride = calc_stride(shape);
   Shape<ndim> sshape = shape;
-  sshape[axis] = 1;
-  index_t sa = stride[axis];
+  sshape[axis]       = 1;
+  index_t sa         = stride[axis];
 
   if (length != nullptr) {
-    #pragma omp parallel for
+#pragma omp parallel for
     for (index_t i = 0; i < N; ++i) {
       index_t base = unravel_dot(i, sshape, stride);
-      index_t len = static_cast<index_t>(length[i]);
+      index_t len  = static_cast<index_t>(length[i]);
 
       AType sum = AType(0);
       for (index_t j = 0; j < len; ++j) {
-        sum += OP1::Map(ograd[base + j*sa], out[base + j*sa]);
+        sum += OP1::Map(ograd[base + j * sa], out[base + j * sa]);
       }
 
       // By default temperature is 1.0.
@@ -254,30 +285,29 @@ inline void SoftmaxGrad(Stream<cpu> *s, OType *out, OType *ograd,
       DType final_result;
       if (temperature == 1.0) {
         for (index_t j = 0; j < M; ++j) {
-          final_result = negate ?
-                         -OP2::Map(ograd[base + j*sa], out[base + j*sa], sum) :
-                         OP2::Map(ograd[base + j*sa], out[base + j*sa], sum);
+          final_result = negate ? -OP2::Map(ograd[base + j * sa], out[base + j * sa], sum)
+                                : OP2::Map(ograd[base + j * sa], out[base + j * sa], sum);
           final_result = (j < len) ? final_result : DType(0.0f);
-          KERNEL_ASSIGN(igrad[base + j*sa], Req, final_result);
+          KERNEL_ASSIGN(igrad[base + j * sa], Req, final_result);
         }
       } else {
         for (index_t j = 0; j < M; ++j) {
-          final_result = negate ?
-                         -OP2::Map(ograd[base + j*sa], out[base + j*sa], sum) / temperature :
-                         OP2::Map(ograd[base + j*sa], out[base + j*sa], sum) / temperature;
+          final_result =
+              negate ? -OP2::Map(ograd[base + j * sa], out[base + j * sa], sum) / temperature
+                     : OP2::Map(ograd[base + j * sa], out[base + j * sa], sum) / temperature;
           final_result = (j < len) ? final_result : DType(0.0f);
-          KERNEL_ASSIGN(igrad[base + j*sa], Req, final_result);
+          KERNEL_ASSIGN(igrad[base + j * sa], Req, final_result);
         }
       }
     }
   } else {
-    #pragma omp parallel for
+#pragma omp parallel for
     for (index_t i = 0; i < N; ++i) {
       index_t base = unravel_dot(i, sshape, stride);
 
       AType sum = AType(0);
       for (index_t j = 0; j < M; ++j) {
-        sum += OP1::Map(ograd[base + j*sa], out[base + j*sa]);
+        sum += OP1::Map(ograd[base + j * sa], out[base + j * sa]);
       }
 
       // By default temperature is 1.0.
@@ -285,58 +315,68 @@ inline void SoftmaxGrad(Stream<cpu> *s, OType *out, OType *ograd,
       DType final_result;
       if (temperature == 1.0) {
         for (index_t j = 0; j < M; ++j) {
-          final_result = negate ?
-                         -OP2::Map(ograd[base + j*sa], out[base + j*sa], sum) :
-                         OP2::Map(ograd[base + j*sa], out[base + j*sa], sum);
-          KERNEL_ASSIGN(igrad[base + j*sa], Req, final_result);
+          final_result = negate ? -OP2::Map(ograd[base + j * sa], out[base + j * sa], sum)
+                                : OP2::Map(ograd[base + j * sa], out[base + j * sa], sum);
+          KERNEL_ASSIGN(igrad[base + j * sa], Req, final_result);
         }
       } else {
         for (index_t j = 0; j < M; ++j) {
-          final_result = negate ?
-                         -OP2::Map(ograd[base + j*sa], out[base + j*sa], sum) / temperature :
-                         OP2::Map(ograd[base + j*sa], out[base + j*sa], sum) / temperature;
-          KERNEL_ASSIGN(igrad[base + j*sa], Req, final_result);
+          final_result =
+              negate ? -OP2::Map(ograd[base + j * sa], out[base + j * sa], sum) / temperature
+                     : OP2::Map(ograd[base + j * sa], out[base + j * sa], sum) / temperature;
+          KERNEL_ASSIGN(igrad[base + j * sa], Req, final_result);
         }
       }
     }
   }
 }
 
-template<typename OP1, typename OP2, int Req, bool negate, typename AType, int ndim,
-         typename DType>
-inline void MaskedSoftmaxGrad(Stream<cpu> *s, DType *out, DType *ograd,
-                              DType *igrad, bool *mask, Shape<ndim> data_shape,
-                              Shape<ndim> mask_shape, int axis,
+template <typename OP1,
+          typename OP2,
+          int Req,
+          bool negate,
+          typename AType,
+          int ndim,
+          typename DType>
+inline void MaskedSoftmaxGrad(Stream<cpu>* s,
+                              DType* out,
+                              DType* ograd,
+                              DType* igrad,
+                              bool* mask,
+                              Shape<ndim> data_shape,
+                              Shape<ndim> mask_shape,
+                              int axis,
                               const double temperature,
                               const OpContext& ctx) {
-  Tensor<cpu, 1, DType> workspace = ctx.requested[0].get_space_typed<cpu, 1, DType>(
-    Shape1(data_shape.Size()), s);
+  Tensor<cpu, 1, DType> workspace =
+      ctx.requested[0].get_space_typed<cpu, 1, DType>(Shape1(data_shape.Size()), s);
   DType* masked_ograd = TBlob(workspace).dptr<DType>();
-  Kernel<masked_softmax_where, cpu>::Launch(s, data_shape.Size(), masked_ograd,
-                                                  mask, ograd, 0.0, data_shape, mask_shape);
+  Kernel<masked_softmax_where, cpu>::Launch(
+      s, data_shape.Size(), masked_ograd, mask, ograd, 0.0, data_shape, mask_shape);
   int* max_lenghts = nullptr;
   SoftmaxGrad<OP1, OP2, Req, negate, AType, DType, DType, int, ndim>(
-      s, out, masked_ograd, igrad,
-      max_lenghts, data_shape,
-      axis, temperature);
-  Kernel<masked_softmax_where, cpu>::Launch(s, data_shape.Size(), igrad,
-                                            mask, igrad, 0.0, data_shape, mask_shape);
+      s, out, masked_ograd, igrad, max_lenghts, data_shape, axis, temperature);
+  Kernel<masked_softmax_where, cpu>::Launch(
+      s, data_shape.Size(), igrad, mask, igrad, 0.0, data_shape, mask_shape);
 }
 
 #ifdef __CUDACC__
 const int softmax_threads_per_block = 512;
 
-template<int ndim>
-MSHADOW_XINLINE index_t get_mask_position(const index_t idx, const Shape<ndim>& data_shape,
-  const Shape<ndim>& mask_shape, int axis, index_t* stride_axis) {
-  index_t ret = 0;
+template <int ndim>
+MSHADOW_XINLINE index_t get_mask_position(const index_t idx,
+                                          const Shape<ndim>& data_shape,
+                                          const Shape<ndim>& mask_shape,
+                                          int axis,
+                                          index_t* stride_axis) {
+  index_t ret    = 0;
   index_t stride = 1;
-  *stride_axis = 1;
-  #pragma unroll
-  for (index_t i = ndim-1, j = idx; i >=0; --i) {
+  *stride_axis   = 1;
+#pragma unroll
+  for (index_t i = ndim - 1, j = idx; i >= 0; --i) {
     auto tmp = j / data_shape[i];
     if (i != axis && mask_shape[i] != 1) {
-      ret += (j - tmp  * mask_shape[i]) * stride;
+      ret += (j - tmp * mask_shape[i]) * stride;
       if (i > axis)
         *stride_axis *= mask_shape[i];
     }
@@ -346,30 +386,41 @@ MSHADOW_XINLINE index_t get_mask_position(const index_t idx, const Shape<ndim>&
   return ret;
 }
 
-template<bool normalize, int x_bits, typename OP, bool masked_neg_inf,
-         bool negate, typename AType, int ndim, typename DType>
-__global__ void masked_softmax_kernel(DType *in, DType *out, bool *in_mask,
-                                      index_t M, int axis, Shape<ndim> sshape,
-                                      Shape<ndim> stride, Shape<ndim> mask_shape,
+template <bool normalize,
+          int x_bits,
+          typename OP,
+          bool masked_neg_inf,
+          bool negate,
+          typename AType,
+          int ndim,
+          typename DType>
+__global__ void masked_softmax_kernel(DType* in,
+                                      DType* out,
+                                      bool* in_mask,
+                                      index_t M,
+                                      int axis,
+                                      Shape<ndim> sshape,
+                                      Shape<ndim> stride,
+                                      Shape<ndim> mask_shape,
                                       const double temperature) {
   extern __shared__ double shared[];
   AType* smem = reinterpret_cast<AType*>(shared);  // x_size
 
   const unsigned x_size = 1 << x_bits;
-  index_t sa = stride[axis];
-  index_t base = unravel_dot(blockIdx.x, sshape, stride);
-  index_t sa_mask = 0;
-  index_t base_mask = get_mask_position(blockIdx.x, sshape, mask_shape, axis, &sa_mask);
-  bool bcst_mask_axis = (mask_shape[axis] == 1);
-  index_t x = threadIdx.x;
+  index_t sa            = stride[axis];
+  index_t base          = unravel_dot(blockIdx.x, sshape, stride);
+  index_t sa_mask       = 0;
+  index_t base_mask     = get_mask_position(blockIdx.x, sshape, mask_shape, axis, &sa_mask);
+  bool bcst_mask_axis   = (mask_shape[axis] == 1);
+  index_t x             = threadIdx.x;
 
   DType smax = 0.0;
   if (normalize) {
     red::maximum::SetInitValue(smem[x]);
     for (index_t i = x; i < M; i += x_size) {
-      bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i*sa_mask];
+      bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i * sa_mask];
       if (mask_value)
-        smem[x] = ::max(smem[x], negate ? -in[base + i*sa] : in[base + i*sa]);
+        smem[x] = ::max(smem[x], negate ? -in[base + i * sa] : in[base + i * sa]);
     }
     __syncthreads();
     cuda::Reduce1D<red::maximum, x_bits>(smem);
@@ -381,9 +432,9 @@ __global__ void masked_softmax_kernel(DType *in, DType *out, bool *in_mask,
   red::sum::SetInitValue(smem[x]);
   DType val;
   for (index_t i = x; i < M; i += x_size) {
-    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i*sa_mask];
+    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i * sa_mask];
     if (mask_value) {
-      val = (negate ? -in[base + i*sa]:in[base + i*sa]);
+      val = (negate ? -in[base + i * sa] : in[base + i * sa]);
       smem[x] += static_cast<AType>(expf((val - smax) / static_cast<AType>(temperature)));
     }
   }
@@ -397,28 +448,39 @@ __global__ void masked_softmax_kernel(DType *in, DType *out, bool *in_mask,
   if (masked_neg_inf)
     masked_value = -INFINITY;
   for (index_t i = x; i < M; i += x_size) {
-    val = (negate ? -in[base + i*sa] : in[base + i*sa]);
-    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i*sa_mask];
-    out[base + i*sa] =
-      mask_value ? DType(OP::Map((val - smax)/static_cast<DType>(temperature), ssum)) :
-                             DType(masked_value);
+    val                = (negate ? -in[base + i * sa] : in[base + i * sa]);
+    bool mask_value    = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i * sa_mask];
+    out[base + i * sa] = mask_value
+                             ? DType(OP::Map((val - smax) / static_cast<DType>(temperature), ssum))
+                             : DType(masked_value);
   }
 }
 
-template<bool normalize, typename OP,  bool masked_neg_inf, bool negate, typename AType,
-         typename LType, typename LTypeMask, typename DType, int ndim>
-__global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool *in_mask,
-                                              const index_t M, int axis, Shape<ndim> sshape,
+template <bool normalize,
+          typename OP,
+          bool masked_neg_inf,
+          bool negate,
+          typename AType,
+          typename LType,
+          typename LTypeMask,
+          typename DType,
+          int ndim>
+__global__ void masked_softmax_stride1_kernel(const DType* in,
+                                              DType* out,
+                                              bool* in_mask,
+                                              const index_t M,
+                                              int axis,
+                                              Shape<ndim> sshape,
                                               Shape<ndim> mask_shape,
                                               const double temperature,
                                               const int rows_per_block,
                                               const index_t total_rows,
                                               const size_t size_input_shared,
                                               const size_t size_mask_shared) {
-  const int entries_per_load = sizeof(LType)/sizeof(DType);
-  const int entries_per_load_mask = sizeof(LTypeMask)/sizeof(bool);
-  const int row_length = entries_per_load > 0 ? M / entries_per_load : 0;
-  const int row_length_mask =  entries_per_load > 0 ? M / entries_per_load_mask : 0;
+  const int entries_per_load      = sizeof(LType) / sizeof(DType);
+  const int entries_per_load_mask = sizeof(LTypeMask) / sizeof(bool);
+  const int row_length            = entries_per_load > 0 ? M / entries_per_load : 0;
+  const int row_length_mask       = entries_per_load > 0 ? M / entries_per_load_mask : 0;
   extern __shared__ double shared[];
   LType* persistent_storage = reinterpret_cast<LType*>(shared);
   // rows_per_block * M (DType), aligned to double
@@ -427,20 +489,21 @@ __global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool
   AType* scratch = reinterpret_cast<AType*>(&shared[size_input_shared + size_mask_shared]);
   // softmax_threads_per_block
 
-  const int warp_size = 32;
+  const int warp_size       = 32;
   const int threads_per_row = softmax_threads_per_block / rows_per_block;
-  const int my_local_row = threadIdx.x / threads_per_row;
-  const int my_row = blockIdx.x * rows_per_block + my_local_row;
-  if (my_row >= total_rows) return;
-  const int my_id = threadIdx.x % threads_per_row;
-  size_t base = my_row * row_length;
+  const int my_local_row    = threadIdx.x / threads_per_row;
+  const int my_row          = blockIdx.x * rows_per_block + my_local_row;
+  if (my_row >= total_rows)
+    return;
+  const int my_id  = threadIdx.x % threads_per_row;
+  size_t base      = my_row * row_length;
   index_t pos_mask = 0;
-  index_t stride = mask_shape[axis];
-  #pragma unroll
-  for (index_t i = axis-1, j = my_row; i >=0; --i) {
+  index_t stride   = mask_shape[axis];
+#pragma unroll
+  for (index_t i = axis - 1, j = my_row; i >= 0; --i) {
     auto tmp = j / sshape[i];
-    if (mask_shape[i]  != 1) {
-      pos_mask += (j - tmp  * mask_shape[i]) * stride;
+    if (mask_shape[i] != 1) {
+      pos_mask += (j - tmp * mask_shape[i]) * stride;
       stride *= mask_shape[i];
     }
     j = tmp;
@@ -452,11 +515,10 @@ __global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool
   }
   const LTypeMask* in_mask_aligned = reinterpret_cast<const LTypeMask*>(&in_mask[pos_mask]);
   for (index_t i = my_id; i < row_length_mask; i += threads_per_row) {
-    mask_shared[my_local_row * row_length_mask + i] = (mask_shape[axis] > 1) ?
-                                                      in_mask_aligned[i] :
-                                                      in_mask_aligned[0];
+    mask_shared[my_local_row * row_length_mask + i] =
+        (mask_shape[axis] > 1) ? in_mask_aligned[i] : in_mask_aligned[0];
   }
-  DType* row = reinterpret_cast<DType*>(persistent_storage + my_local_row * row_length);
+  DType* row     = reinterpret_cast<DType*>(persistent_storage + my_local_row * row_length);
   bool* row_mask = reinterpret_cast<bool*>(mask_shared + my_local_row * row_length_mask);
   __syncthreads();
 
@@ -477,8 +539,8 @@ __global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool
       __syncthreads();
     }
     if (my_id < warp_size) {
-      AType my_value = common::cuda::warp_reduce(scratch[threadIdx.x],
-                                   [](AType x, AType y) { return ::max(x, y); });
+      AType my_value       = common::cuda::warp_reduce(scratch[threadIdx.x],
+                                                 [](AType x, AType y) { return ::max(x, y); });
       scratch[threadIdx.x] = my_value;
     }
     __syncthreads();
@@ -503,8 +565,8 @@ __global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool
     __syncthreads();
   }
   if (my_id < warp_size) {
-    AType my_value = common::cuda::warp_reduce(scratch[threadIdx.x],
-                                 [](AType x, AType y) { return x + y;});
+    AType my_value =
+        common::cuda::warp_reduce(scratch[threadIdx.x], [](AType x, AType y) { return x + y; });
     scratch[threadIdx.x] = my_value;
   }
   __syncthreads();
@@ -517,8 +579,8 @@ __global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool
     masked_value = -INFINITY;
   for (index_t i = my_id; i < M; i += threads_per_row) {
     const DType val = (negate ? -row[i] : row[i]);
-    row[i] = row_mask[i] ? DType(OP::Map((val - smax)/static_cast<DType>(temperature), ssum)) :
-                           DType(masked_value);
+    row[i] = row_mask[i] ? DType(OP::Map((val - smax) / static_cast<DType>(temperature), ssum))
+                         : DType(masked_value);
   }
   __syncthreads();
 
@@ -529,67 +591,95 @@ __global__ void masked_softmax_stride1_kernel(const DType *in, DType *out, bool
   }
 }
 
-template<typename OP, bool masked_neg_inf, bool negate,
-         typename AType, typename DType, typename OType, int ndim>
-inline void MaskedSoftmax(Stream<gpu> *s, DType *in, OType *out, bool *mask,
-                          Shape<ndim> data_shape, Shape<ndim> mask_shape,
-                          int axis, const double temperature,
-                          bool normalize, const OpContext& ctx) {
+template <typename OP,
+          bool masked_neg_inf,
+          bool negate,
+          typename AType,
+          typename DType,
+          typename OType,
+          int ndim>
+inline void MaskedSoftmax(Stream<gpu>* s,
+                          DType* in,
+                          OType* out,
+                          bool* mask,
+                          Shape<ndim> data_shape,
+                          Shape<ndim> mask_shape,
+                          int axis,
+                          const double temperature,
+                          bool normalize,
+                          const OpContext& ctx) {
   const int x_bits = 7;
   const int x_size = 1 << x_bits;
-  index_t M = data_shape[axis];
-  if (M == 0 || data_shape.Size() == 0) return;
-  index_t N = data_shape.Size() / M;
+  index_t M        = data_shape[axis];
+  if (M == 0 || data_shape.Size() == 0)
+    return;
+  index_t N          = data_shape.Size() / M;
   Shape<ndim> stride = calc_stride(data_shape);
   Shape<ndim> sshape = data_shape;
-  sshape[axis] = 1;
+  sshape[axis]       = 1;
 
   const size_t DSize = sizeof(DType);
   // Using max of 20 kB of shared memory for InputData in the optimized case
   const size_t max_opt_M = 20 * 1024 / DSize;
-  if (stride[axis] == 1 &&
-      static_cast<size_t>(M) <= max_opt_M &&
+  if (stride[axis] == 1 && static_cast<size_t>(M) <= max_opt_M &&
       std::is_same<DType, OType>::value) {
-    int ltype = mxnet::common::cuda::get_load_type(M * sizeof(DType));
+    int ltype      = mxnet::common::cuda::get_load_type(M * sizeof(DType));
     int ltype_mask = mxnet::common::cuda::get_load_type(mask_shape[axis] * sizeof(bool));
     MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
       CHECK_LE(sizeof(DType), sizeof(LType));
       MXNET_LOAD_TYPE_SWITCH(ltype_mask, LTypeMask, {
         CHECK_LE(sizeof(bool), sizeof(LTypeMask));
-        int rows_per_block = mxnet::common::cuda::
-                               get_rows_per_block(M *
-                                                  sizeof(DType) / sizeof(LType),
-                                                  softmax_threads_per_block);
+        int rows_per_block = mxnet::common::cuda::get_rows_per_block(
+            M * sizeof(DType) / sizeof(LType), softmax_threads_per_block);
         // calculate amount shared memory (slots aligned to double)
-        int entries_per_load = entries_per_load = sizeof(LType)/sizeof(DType);
-        int entries_per_load_mask = sizeof(LTypeMask)/sizeof(bool);
-        size_t size_input_shared = entries_per_load > 0 ?
-                                 rows_per_block * M / entries_per_load : 0;
-        size_t size_mask_shared = entries_per_load_mask > 0 ?
-                                  rows_per_block * M / entries_per_load_mask : 0;
-        size_input_shared = ((size_input_shared * sizeof(LType) + sizeof(double) - 1) /
-                             sizeof(double));
-        size_mask_shared = ((size_mask_shared * sizeof(LTypeMask) + sizeof(double) - 1) /
-                            sizeof(double));
+        int entries_per_load = entries_per_load = sizeof(LType) / sizeof(DType);
+        int entries_per_load_mask               = sizeof(LTypeMask) / sizeof(bool);
+        size_t size_input_shared = entries_per_load > 0 ? rows_per_block * M / entries_per_load : 0;
+        size_t size_mask_shared =
+            entries_per_load_mask > 0 ? rows_per_block * M / entries_per_load_mask : 0;
+        size_input_shared =
+            ((size_input_shared * sizeof(LType) + sizeof(double) - 1) / sizeof(double));
+        size_mask_shared =
+            ((size_mask_shared * sizeof(LTypeMask) + sizeof(double) - 1) / sizeof(double));
         size_t amount_shared = size_input_shared * sizeof(double) +
                                size_mask_shared * sizeof(double) +
                                softmax_threads_per_block * sizeof(AType);
 
         int nblocks = (N + rows_per_block - 1) / rows_per_block;
         if (normalize) {
-          masked_softmax_stride1_kernel<true, OP, masked_neg_inf, negate,
-                                        AType, LType, LTypeMask>
-            <<<nblocks, softmax_threads_per_block, amount_shared,
-               mshadow::Stream<gpu>::GetStream(s)>>>(
-              in, out, mask, M, axis, sshape, mask_shape, temperature,
-              rows_per_block, N, size_input_shared, size_mask_shared);
+          masked_softmax_stride1_kernel<true, OP, masked_neg_inf, negate, AType, LType, LTypeMask>
+              <<<nblocks,
+                 softmax_threads_per_block,
+                 amount_shared,
+                 mshadow::Stream<gpu>::GetStream(s)>>>(in,
+                                                       out,
+                                                       mask,
+                                                       M,
+                                                       axis,
+                                                       sshape,
+                                                       mask_shape,
+                                                       temperature,
+                                                       rows_per_block,
+                                                       N,
+                                                       size_input_shared,
+                                                       size_mask_shared);
         } else {
-          masked_softmax_stride1_kernel<false, OP, masked_neg_inf, negate,
-                                        AType, LType, LTypeMask>
-            <<<nblocks, softmax_threads_per_block, amount_shared,
-               mshadow::Stream<gpu>::GetStream(s)>>>(
-              in, out, mask, M, axis, sshape, mask_shape, temperature,
-              rows_per_block, N, size_input_shared, size_mask_shared);
+          masked_softmax_stride1_kernel<false, OP, masked_neg_inf, negate, AType, LType, LTypeMask>
+              <<<nblocks,
+                 softmax_threads_per_block,
+                 amount_shared,
+                 mshadow::Stream<gpu>::GetStream(s)>>>(in,
+                                                       out,
+                                                       mask,
+                                                       M,
+                                                       axis,
+                                                       sshape,
+                                                       mask_shape,
+                                                       temperature,
+                                                       rows_per_block,
+                                                       N,
+                                                       size_input_shared,
+                                                       size_mask_shared);
         }
       });
     });
@@ -598,22 +688,33 @@ inline void MaskedSoftmax(Stream<gpu> *s, DType *in, OType *out, bool *mask,
     size_t amount_shared = x_size * sizeof(AType);
     if (normalize) {
       masked_softmax_kernel<true, x_bits, OP, masked_neg_inf, negate, AType, ndim>
-        <<<N, x_size, amount_shared, mshadow::Stream<gpu>::GetStream(s)>>>(
-          in, out, mask, M, axis, sshape, stride, mask_shape, temperature);
+          <<<N, x_size, amount_shared, mshadow::Stream<gpu>::GetStream(s)>>>(
+              in, out, mask, M, axis, sshape, stride, mask_shape, temperature);
     } else {
       masked_softmax_kernel<false, x_bits, OP, masked_neg_inf, negate, AType, ndim>
-        <<<N, x_size, amount_shared, mshadow::Stream<gpu>::GetStream(s)>>>(
-          in, out, mask, M, axis, sshape, stride, mask_shape, temperature);
+          <<<N, x_size, amount_shared, mshadow::Stream<gpu>::GetStream(s)>>>(
+              in, out, mask, M, axis, sshape, stride, mask_shape, temperature);
     }
     MSHADOW_CUDA_POST_KERNEL_CHECK(masked_softmax_kernel);
   }
 }
 
-template<typename OP1, typename OP2, int Req, bool negate, typename AType, typename LType,
-  typename LTypeMask, typename DType, typename OType, int ndim>
-__global__ void masked_softmax_stride1_grad_kernel(const OType *out, const OType *ograd,
-                                                   DType *igrad, const bool *in_mask,
-                                                   const index_t M, int axis,
+template <typename OP1,
+          typename OP2,
+          int Req,
+          bool negate,
+          typename AType,
+          typename LType,
+          typename LTypeMask,
+          typename DType,
+          typename OType,
+          int ndim>
+__global__ void masked_softmax_stride1_grad_kernel(const OType* out,
+                                                   const OType* ograd,
+                                                   DType* igrad,
+                                                   const bool* in_mask,
+                                                   const index_t M,
+                                                   int axis,
                                                    Shape<ndim> sshape,
                                                    Shape<ndim> mask_shape,
                                                    const double temperature,
@@ -621,10 +722,10 @@ __global__ void masked_softmax_stride1_grad_kernel(const OType *out, const OType
                                                    const index_t total_rows,
                                                    const size_t size_input_shared,
                                                    const size_t size_mask_shared) {
-  const int entries_per_load = sizeof(LType)/sizeof(DType);
-  const int entries_per_load_mask = sizeof(LTypeMask)/sizeof(bool);
-  const int row_length = entries_per_load > 0 ? M / entries_per_load : 0;
-  const int row_length_mask =  entries_per_load > 0 ? M / entries_per_load_mask : 0;
+  const int entries_per_load      = sizeof(LType) / sizeof(DType);
+  const int entries_per_load_mask = sizeof(LTypeMask) / sizeof(bool);
+  const int row_length            = entries_per_load > 0 ? M / entries_per_load : 0;
+  const int row_length_mask       = entries_per_load > 0 ? M / entries_per_load_mask : 0;
   extern __shared__ double shared[];
   LType* persistent_storage = reinterpret_cast<LType*>(shared);
   // 2 * rows_per_block * M (DType), aligned to double
@@ -633,38 +734,38 @@ __global__ void masked_softmax_stride1_grad_kernel(const OType *out, const OType
   AType* scratch = reinterpret_cast<AType*>(&shared[size_input_shared + size_mask_shared]);
   // softmax_threads_per_block
 
-  const int warp_size = 32;
+  const int warp_size       = 32;
   const int threads_per_row = softmax_threads_per_block / rows_per_block;
-  const int my_local_row = threadIdx.x / threads_per_row;
-  const int my_row = blockIdx.x * rows_per_block + my_local_row;
-  if (my_row >= total_rows) return;
-  const int my_id = threadIdx.x % threads_per_row;
-  size_t base = my_row * row_length;
+  const int my_local_row    = threadIdx.x / threads_per_row;
+  const int my_row          = blockIdx.x * rows_per_block + my_local_row;
+  if (my_row >= total_rows)
+    return;
+  const int my_id  = threadIdx.x % threads_per_row;
+  size_t base      = my_row * row_length;
   index_t pos_mask = 0;
-  index_t stride = mask_shape[axis];
-  #pragma unroll
-  for (index_t i = axis - 1, j = my_row; i >=0; --i) {
+  index_t stride   = mask_shape[axis];
+#pragma unroll
+  for (index_t i = axis - 1, j = my_row; i >= 0; --i) {
     auto tmp = j / sshape[i];
-    if (mask_shape[i]  != 1) {
-      pos_mask += (j - tmp  * mask_shape[i]) * stride;
+    if (mask_shape[i] != 1) {
+      pos_mask += (j - tmp * mask_shape[i]) * stride;
       stride *= mask_shape[i];
     }
     j = tmp;
   }
 
-  const LType* out_aligned = reinterpret_cast<const LType*>(out);
+  const LType* out_aligned   = reinterpret_cast<const LType*>(out);
   const LType* ograd_aligned = reinterpret_cast<const LType*>(ograd);
   for (index_t i = my_id; i < row_length; i += threads_per_row) {
-    persistent_storage[my_local_row * row_length * 2 + i] = out_aligned[base + i];
+    persistent_storage[my_local_row * row_length * 2 + i]              = out_aligned[base + i];
     persistent_storage[my_local_row * row_length * 2 + row_length + i] = ograd_aligned[base + i];
   }
   const LTypeMask* in_mask_aligned = reinterpret_cast<const LTypeMask*>(&in_mask[pos_mask]);
   for (index_t i = my_id; i < row_length_mask; i += threads_per_row) {
-    mask_shared[my_local_row * row_length_mask + i] = (mask_shape[axis] > 1) ?
-                                                      in_mask_aligned[i] :
-                                                      in_mask_aligned[0];
+    mask_shared[my_local_row * row_length_mask + i] =
+        (mask_shape[axis] > 1) ? in_mask_aligned[i] : in_mask_aligned[0];
   }
-  DType* row = reinterpret_cast<DType *>(persistent_storage + my_local_row * row_length * 2);
+  DType* row     = reinterpret_cast<DType*>(persistent_storage + my_local_row * row_length * 2);
   bool* row_mask = reinterpret_cast<bool*>(mask_shared + my_local_row * row_length_mask);
   __syncthreads();
 
@@ -684,8 +785,8 @@ __global__ void masked_softmax_stride1_grad_kernel(const OType *out, const OType
     __syncthreads();
   }
   if (my_id < warp_size) {
-    AType my_value = common::cuda::warp_reduce(scratch[threadIdx.x],
-                                 [](AType x, AType y) { return x + y; });
+    AType my_value =
+        common::cuda::warp_reduce(scratch[threadIdx.x], [](AType x, AType y) { return x + y; });
     scratch[threadIdx.x] = my_value;
   }
   __syncthreads();
@@ -694,11 +795,8 @@ __global__ void masked_softmax_stride1_grad_kernel(const OType *out, const OType
 
   for (index_t i = my_id; i < M; i += threads_per_row) {
     const DType val =
-      negate ?
-      -OP2::Map(row[i + M], row[i], ssum):
-      OP2::Map(row[i + M], row[i], ssum);
-    row[i] = row_mask[i] ? DType(val / static_cast<DType>(temperature)) :
-                           DType(0.0f);
+        negate ? -OP2::Map(row[i + M], row[i], ssum) : OP2::Map(row[i + M], row[i], ssum);
+    row[i] = row_mask[i] ? DType(val / static_cast<DType>(temperature)) : DType(0.0f);
     if (Req == kAddTo) {
       row[i] += igrad[my_row * M + i];
     }
@@ -712,27 +810,39 @@ __global__ void masked_softmax_stride1_grad_kernel(const OType *out, const OType
   }
 }
 
-template<int x_bits, typename OP1, typename OP2, int Req, bool negate, typename AType, int ndim,
-         typename DType, typename OType>
-__global__ void masked_softmax_grad_kernel(OType *out, OType *ograd, DType *igrad,
-                                           const bool *in_mask, index_t M, int axis,
-                                           Shape<ndim> sshape, Shape<ndim> stride,
+template <int x_bits,
+          typename OP1,
+          typename OP2,
+          int Req,
+          bool negate,
+          typename AType,
+          int ndim,
+          typename DType,
+          typename OType>
+__global__ void masked_softmax_grad_kernel(OType* out,
+                                           OType* ograd,
+                                           DType* igrad,
+                                           const bool* in_mask,
+                                           index_t M,
+                                           int axis,
+                                           Shape<ndim> sshape,
+                                           Shape<ndim> stride,
                                            Shape<ndim> mask_shape,
                                            const double temperature) {
   const unsigned x_size = 1 << x_bits;
   __shared__ AType smem[x_size];
-  index_t sa = stride[axis];
-  index_t base = unravel_dot(blockIdx.x, sshape, stride);
-  index_t sa_mask = 0;
-  index_t base_mask = get_mask_position(blockIdx.x, sshape, mask_shape, axis, &sa_mask);
+  index_t sa          = stride[axis];
+  index_t base        = unravel_dot(blockIdx.x, sshape, stride);
+  index_t sa_mask     = 0;
+  index_t base_mask   = get_mask_position(blockIdx.x, sshape, mask_shape, axis, &sa_mask);
   bool bcst_mask_axis = (mask_shape[axis] == 1);
-  index_t x = threadIdx.x;
+  index_t x           = threadIdx.x;
 
   red::sum::SetInitValue(smem[x]);
   for (index_t i = x; i < M; i += x_size) {
-    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i*sa_mask];
+    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i * sa_mask];
     if (mask_value)
-      smem[x] += OP1::Map(ograd[base + i*sa], out[base + i*sa]);
+      smem[x] += OP1::Map(ograd[base + i * sa], out[base + i * sa]);
   }
   __syncthreads();
   cuda::Reduce1D<red::sum, x_bits>(smem);
@@ -742,76 +852,94 @@ __global__ void masked_softmax_grad_kernel(OType *out, OType *ograd, DType *igra
 
   DType final_result;
   for (index_t i = x; i < M; i += x_size) {
-    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i*sa_mask];
-    final_result =
-      negate ?
-      -OP2::Map(ograd[base + i*sa], out[base + i*sa], ssum):
-      OP2::Map(ograd[base + i*sa], out[base + i*sa], ssum);
-    final_result = mask_value ? final_result / static_cast<DType>(temperature) : DType(0.0f);
-    KERNEL_ASSIGN(igrad[base + i*sa], Req, final_result);
+    bool mask_value = bcst_mask_axis ? in_mask[base_mask] : in_mask[base_mask + i * sa_mask];
+    final_result    = negate ? -OP2::Map(ograd[base + i * sa], out[base + i * sa], ssum)
+                             : OP2::Map(ograd[base + i * sa], out[base + i * sa], ssum);
+    final_result    = mask_value ? final_result / static_cast<DType>(temperature) : DType(0.0f);
+    KERNEL_ASSIGN(igrad[base + i * sa], Req, final_result);
   }
 }
 
-template<typename OP1, typename OP2, int Req, bool negate, typename AType, int ndim,
-         typename DType, typename OType>
-inline void MaskedSoftmaxGrad(Stream<gpu> *s, OType *out, OType *ograd,
-                              DType *igrad, bool *mask, Shape<ndim> data_shape,
-                              Shape<ndim> mask_shape, int axis,
+template <typename OP1,
+          typename OP2,
+          int Req,
+          bool negate,
+          typename AType,
+          int ndim,
+          typename DType,
+          typename OType>
+inline void MaskedSoftmaxGrad(Stream<gpu>* s,
+                              OType* out,
+                              OType* ograd,
+                              DType* igrad,
+                              bool* mask,
+                              Shape<ndim> data_shape,
+                              Shape<ndim> mask_shape,
+                              int axis,
                               const double temperature,
                               const OpContext& ctx) {
   const int x_bits = 7;
   const int x_size = 1 << x_bits;
-  index_t M = data_shape[axis];
-  if (M == 0 || data_shape.Size() == 0) return;
-  index_t N = data_shape.Size() / M;
+  index_t M        = data_shape[axis];
+  if (M == 0 || data_shape.Size() == 0)
+    return;
+  index_t N          = data_shape.Size() / M;
   Shape<ndim> stride = calc_stride(data_shape);
   Shape<ndim> sshape = data_shape;
-  sshape[axis] = 1;
+  sshape[axis]       = 1;
 
   const size_t DSize = sizeof(DType);
-    // Using max of 20 kB of shared memory for InputData in the optimized case
+  // Using max of 20 kB of shared memory for InputData in the optimized case
   const size_t max_opt_M = 20 * 1024 / DSize;
-  if (stride[axis] == 1 &&
-      static_cast<size_t>(M) <= max_opt_M &&
+  if (stride[axis] == 1 && static_cast<size_t>(M) <= max_opt_M &&
       std::is_same<DType, OType>::value) {
-    int ltype = mxnet::common::cuda::get_load_type(M * sizeof(DType));
+    int ltype      = mxnet::common::cuda::get_load_type(M * sizeof(DType));
     int ltype_mask = mxnet::common::cuda::get_load_type(mask_shape[axis] * sizeof(bool));
     MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
       CHECK_LE(sizeof(DType), sizeof(LType));
       MXNET_LOAD_TYPE_SWITCH(ltype_mask, LTypeMask, {
         CHECK_LE(sizeof(bool), sizeof(LTypeMask));
-        int rows_per_block = mxnet::common::cuda::
-                               get_rows_per_block(M *
-                                                  sizeof(DType) / sizeof(LType),
-                                                  softmax_threads_per_block);
+        int rows_per_block = mxnet::common::cuda::get_rows_per_block(
+            M * sizeof(DType) / sizeof(LType), softmax_threads_per_block);
         // calculate amount shared memory (slots aligned to double)
-        int entries_per_load = entries_per_load = sizeof(LType)/sizeof(DType);
-        int entries_per_load_mask = sizeof(LTypeMask)/sizeof(bool);
-        size_t size_input_shared = entries_per_load > 0 ?
-                                 rows_per_block * M / entries_per_load : 0;
-        size_t size_mask_shared = entries_per_load_mask > 0 ?
-                                  rows_per_block * M / entries_per_load_mask : 0;
-        size_input_shared = ((2 * size_input_shared * sizeof(LType) + sizeof(double) - 1) /
-                             sizeof(double));
-        size_mask_shared = ((size_mask_shared * sizeof(LTypeMask) + sizeof(double) - 1) /
-                            sizeof(double));
+        int entries_per_load = entries_per_load = sizeof(LType) / sizeof(DType);
+        int entries_per_load_mask               = sizeof(LTypeMask) / sizeof(bool);
+        size_t size_input_shared = entries_per_load > 0 ? rows_per_block * M / entries_per_load : 0;
+        size_t size_mask_shared =
+            entries_per_load_mask > 0 ? rows_per_block * M / entries_per_load_mask : 0;
+        size_input_shared =
+            ((2 * size_input_shared * sizeof(LType) + sizeof(double) - 1) / sizeof(double));
+        size_mask_shared =
+            ((size_mask_shared * sizeof(LTypeMask) + sizeof(double) - 1) / sizeof(double));
         size_t amount_shared = size_input_shared * sizeof(double) +
                                size_mask_shared * sizeof(double) +
                                softmax_threads_per_block * sizeof(AType);
 
         int nblocks = (N + rows_per_block - 1) / rows_per_block;
         masked_softmax_stride1_grad_kernel<OP1, OP2, Req, negate, AType, LType, LTypeMask>
-          <<<nblocks, softmax_threads_per_block, amount_shared,
-             mshadow::Stream<gpu>::GetStream(s)>>>(
-            out, ograd, igrad, mask, M, axis, sshape, mask_shape,
-            temperature, rows_per_block, N, size_input_shared, size_mask_shared);
+            <<<nblocks,
+               softmax_threads_per_block,
+               amount_shared,
+               mshadow::Stream<gpu>::GetStream(s)>>>(out,
+                                                     ograd,
+                                                     igrad,
+                                                     mask,
+                                                     M,
+                                                     axis,
+                                                     sshape,
+                                                     mask_shape,
+                                                     temperature,
+                                                     rows_per_block,
+                                                     N,
+                                                     size_input_shared,
+                                                     size_mask_shared);
       });
     });
     MSHADOW_CUDA_POST_KERNEL_CHECK(masked_softmax_stride1_grad_kernel);
   } else {
     masked_softmax_grad_kernel<x_bits, OP1, OP2, Req, negate, AType, ndim>
-      <<<N, x_size, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
-        out, ograd, igrad, mask, M, axis, sshape, stride, mask_shape, temperature);
+        <<<N, x_size, 0, mshadow::Stream<gpu>::GetStream(s)>>>(
+            out, ograd, igrad, mask, M, axis, sshape, stride, mask_shape, temperature);
     MSHADOW_CUDA_POST_KERNEL_CHECK(masked_softmax_grad_kernel);
   }
 }
@@ -819,34 +947,32 @@ inline void MaskedSoftmaxGrad(Stream<gpu> *s, OType *out, OType *ograd,
 
 }  // namespace mxnet_op
 
-
 struct SoftmaxParam : public dmlc::Parameter<SoftmaxParam> {
   int axis;
   dmlc::optional<double> temperature;
   dmlc::optional<int> dtype;
   dmlc::optional<bool> use_length;
   DMLC_DECLARE_PARAMETER(SoftmaxParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(-1)
-    .describe("The axis along which to compute softmax.");
-    DMLC_DECLARE_FIELD(temperature).set_default(dmlc::optional<double>())
-    .describe("Temperature parameter in softmax");
+    DMLC_DECLARE_FIELD(axis).set_default(-1).describe("The axis along which to compute softmax.");
+    DMLC_DECLARE_FIELD(temperature)
+        .set_default(dmlc::optional<double>())
+        .describe("Temperature parameter in softmax");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("float16", mshadow::kFloat16)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .set_default(dmlc::optional<int>())
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to the same as input's dtype if not defined (dtype=None).");
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to the same as input's dtype if not defined (dtype=None).");
     DMLC_DECLARE_FIELD(use_length)
-    .set_default(dmlc::optional<bool>(false))
-    .describe("Whether to use the length input as a mask over the data input.");
+        .set_default(dmlc::optional<bool>(false))
+        .describe("Whether to use the length input as a mask over the data input.");
   }
 
   bool operator==(const SoftmaxParam& other) const {
-    return this->axis == other.axis &&
-           this->temperature == other.temperature &&
-           this->dtype == other.dtype &&
-           this->use_length == other.use_length;
+    return this->axis == other.axis && this->temperature == other.temperature &&
+           this->dtype == other.dtype && this->use_length == other.use_length;
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, temperature_s, dtype_s, use_length_s;
@@ -854,7 +980,7 @@ struct SoftmaxParam : public dmlc::Parameter<SoftmaxParam> {
     temperature_s << temperature;
     dtype_s << dtype;
     use_length_s << use_length;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]        = axis_s.str();
     (*dict)["temperature"] = temperature_s.str();
     if (dtype.has_value()) {
       (*dict)["dtype"] = MXNetTypeWithBool2String(dtype.value());
@@ -870,22 +996,22 @@ struct MaskedSoftmaxParam : public dmlc::Parameter<MaskedSoftmaxParam> {
   dmlc::optional<double> temperature;
   dmlc::optional<bool> normalize;
   DMLC_DECLARE_PARAMETER(MaskedSoftmaxParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(-1)
-    .describe("The axis along which to compute softmax.");
-    DMLC_DECLARE_FIELD(temperature).set_default(dmlc::optional<double>())
-    .describe("Temperature parameter in softmax");
+    DMLC_DECLARE_FIELD(axis).set_default(-1).describe("The axis along which to compute softmax.");
+    DMLC_DECLARE_FIELD(temperature)
+        .set_default(dmlc::optional<double>())
+        .describe("Temperature parameter in softmax");
     DMLC_DECLARE_FIELD(normalize)
-    .set_default(dmlc::optional<bool>(true))
-    .describe("Whether to normalize input data x: x = x - max(x)");
+        .set_default(dmlc::optional<bool>(true))
+        .describe("Whether to normalize input data x: x = x - max(x)");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, temperature_s, normalize_s;
     axis_s << axis;
     temperature_s << temperature;
     normalize_s << normalize;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]        = axis_s.str();
     (*dict)["temperature"] = temperature_s.str();
-    (*dict)["normalize"] = normalize_s.str();
+    (*dict)["normalize"]   = normalize_s.str();
   }
 };
 
@@ -917,8 +1043,8 @@ static inline bool SoftmaxOpType(const nnvm::NodeAttrs& attrs,
 }
 
 static inline bool SoftmaxOpShape(const nnvm::NodeAttrs& attrs,
-                                  mxnet::ShapeVector *in_attrs,
-                                  mxnet::ShapeVector *out_attrs) {
+                                  mxnet::ShapeVector* in_attrs,
+                                  mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(out_attrs->size(), 1U);
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), param.use_length.value() ? 2U : 1U);
@@ -926,7 +1052,7 @@ static inline bool SoftmaxOpShape(const nnvm::NodeAttrs& attrs,
   if (param.use_length.value()) {
     mxnet::TShape& dshape = in_attrs->at(0);
     mxnet::TShape tmp_shape((dshape.ndim() == 1) ? 1U : dshape.ndim() - 1, 1);
-    int j = 0;
+    int j    = 0;
     int axis = param.axis != -1 ? param.axis : dshape.ndim() - 1;
     for (int i = 0; i < dshape.ndim(); ++i) {
       if (i != axis) {
@@ -940,20 +1066,20 @@ static inline bool SoftmaxOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 static inline bool SoftmaxGradOpShape(const nnvm::NodeAttrs& attrs,
-                                      mxnet::ShapeVector *in_attrs,
-                                      mxnet::ShapeVector *out_attrs) {
+                                      mxnet::ShapeVector* in_attrs,
+                                      mxnet::ShapeVector* out_attrs) {
   if (softmax_has_dtype_override(attrs) || softmax_use_length(attrs)) {
     if (softmax_use_length(attrs)) {
-      mxnet::ShapeVector ins = {in_attrs->at(0), in_attrs->at(1), in_attrs->at(3)};
+      mxnet::ShapeVector ins   = {in_attrs->at(0), in_attrs->at(1), in_attrs->at(3)};
       mxnet::ShapeVector dgrad = {out_attrs->at(0)};
-      bool res = ElemwiseShape<3, 1>(attrs, &ins, &dgrad);
+      bool res                 = ElemwiseShape<3, 1>(attrs, &ins, &dgrad);
       SHAPE_ASSIGN_CHECK(*in_attrs, 0, ins[0]);
       SHAPE_ASSIGN_CHECK(*in_attrs, 1, ins[1]);
       SHAPE_ASSIGN_CHECK(*in_attrs, 3, ins[2]);
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, dgrad[0]);
       mxnet::ShapeVector length = {in_attrs->at(2)};
-      mxnet::ShapeVector lgrad = {out_attrs->at(1)};
-      res = (res && ElemwiseShape<1, 1>(attrs, &length, &lgrad));
+      mxnet::ShapeVector lgrad  = {out_attrs->at(1)};
+      res                       = (res && ElemwiseShape<1, 1>(attrs, &length, &lgrad));
       SHAPE_ASSIGN_CHECK(*in_attrs, 2, length[0]);
       SHAPE_ASSIGN_CHECK(*out_attrs, 1, lgrad[0]);
       return res;
@@ -971,7 +1097,7 @@ static inline bool SoftmaxGradOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), softmax_use_length(attrs) ? 2U : 1U);
   if (softmax_has_dtype_override(attrs) || softmax_use_length(attrs)) {
     CHECK_EQ(in_attrs->size(), softmax_use_length(attrs) ? 4U : 3U);
-    int in_dtype = (*in_attrs)[1];
+    int in_dtype  = (*in_attrs)[1];
     int out_dtype = (*in_attrs)[softmax_use_length(attrs) ? 3 : 2];
     TYPE_ASSIGN_CHECK(*in_attrs, 0, out_dtype);
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_dtype);
@@ -991,16 +1117,16 @@ static inline bool SoftmaxGradOpType(const nnvm::NodeAttrs& attrs,
   }
 }
 
-static inline std::vector<std::pair<int, int> >
-SoftmaxGradOpInplaceOption(const nnvm::NodeAttrs& attrs) {
+static inline std::vector<std::pair<int, int>> SoftmaxGradOpInplaceOption(
+    const nnvm::NodeAttrs& attrs) {
   if (softmax_has_dtype_override(attrs) || softmax_use_length(attrs)) {
     if (softmax_use_length(attrs)) {
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}, {2, 1}, {3, 0}};
+      return std::vector<std::pair<int, int>>{{0, 0}, {1, 0}, {2, 1}, {3, 0}};
     } else {
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}, {2, 0}};
+      return std::vector<std::pair<int, int>>{{0, 0}, {1, 0}, {2, 0}};
     }
   } else {
-    return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+    return std::vector<std::pair<int, int>>{{0, 0}, {1, 0}};
   }
 }
 
@@ -1024,13 +1150,13 @@ static inline std::vector<std::string> SoftmaxGradOpInputNames(const nnvm::NodeA
 }
 
 struct SoftmaxFGradient {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     if (softmax_has_dtype_override(n->attrs) || softmax_use_length(n->attrs)) {
-      return ElemwiseGradUseInOut {op_name}(n, ograds);
+      return ElemwiseGradUseInOut{op_name}(n, ograds);  // NOLINT
     } else {
-      return ElemwiseGradUseOut {op_name}(n, ograds);
+      return ElemwiseGradUseOut{op_name}(n, ograds);  // NOLINT
     }
   }
 };
@@ -1046,8 +1172,8 @@ static inline bool MaskedSoftmaxOpType(const nnvm::NodeAttrs& attrs,
 }
 
 static inline bool MaskedSoftmaxOpShape(const nnvm::NodeAttrs& attrs,
-                                        mxnet::ShapeVector *in_shape,
-                                        mxnet::ShapeVector *out_shape) {
+                                        mxnet::ShapeVector* in_shape,
+                                        mxnet::ShapeVector* out_shape) {
   CHECK_EQ(out_shape->size(), 1U);
   CHECK_EQ(in_shape->size(), 2U);
 
@@ -1059,12 +1185,11 @@ static inline bool MaskedSoftmaxOpShape(const nnvm::NodeAttrs& attrs,
   }
   CHECK(data_shape.ndim() == mask_shape.ndim())
       << "Number of dimensions in data and mask does not match";
-  CHECK(data_shape.ndim() > 0)
-      << "Empty tuple is not allowed";
+  CHECK(data_shape.ndim() > 0) << "Empty tuple is not allowed";
 
   for (int i = 0; i < data_shape.ndim(); ++i) {
     CHECK(data_shape[i] == mask_shape[i] || mask_shape[i] == 1)
-      << "Mask cannot be broadcasted from " << mask_shape << " to " << data_shape;
+        << "Mask cannot be broadcasted from " << mask_shape << " to " << data_shape;
   }
   SHAPE_ASSIGN_CHECK(*out_shape, 0, in_shape->at(0));
   SHAPE_ASSIGN_CHECK(*in_shape, 0, out_shape->at(0));
@@ -1072,25 +1197,24 @@ static inline bool MaskedSoftmaxOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 static inline bool MaskedSoftmaxGradOpShape(const nnvm::NodeAttrs& attrs,
-                                            mxnet::ShapeVector *in_shape,
-                                            mxnet::ShapeVector *out_shape) {
+                                            mxnet::ShapeVector* in_shape,
+                                            mxnet::ShapeVector* out_shape) {
   CHECK_EQ(out_shape->size(), 1U);
   CHECK_EQ(in_shape->size(), 3U);
 
   mxnet::TShape& ograd_shape = (*in_shape)[0];
-  mxnet::TShape& mask_shape = (*in_shape)[1];
+  mxnet::TShape& mask_shape  = (*in_shape)[1];
 
   if (!mxnet::ndim_is_known(ograd_shape) || !mxnet::ndim_is_known(mask_shape)) {
     return false;
   }
   CHECK(ograd_shape.ndim() == mask_shape.ndim())
       << "Number of dimensions in data and mask does not match";
-  CHECK(ograd_shape.ndim() > 0)
-      << "Empty tuple is not allowed";
+  CHECK(ograd_shape.ndim() > 0) << "Empty tuple is not allowed";
 
   for (int i = 0; i < ograd_shape.ndim(); ++i) {
     CHECK(ograd_shape[i] == mask_shape[i] || mask_shape[i] == 1)
-      << "Mask cannot be broadcasted from " << mask_shape << " to " << ograd_shape;
+        << "Mask cannot be broadcasted from " << mask_shape << " to " << ograd_shape;
   }
 
   SHAPE_ASSIGN_CHECK(*out_shape, 0, in_shape->at(0));
@@ -1114,110 +1238,135 @@ static inline bool MaskedSoftmaxGradOpType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-static inline std::vector<std::pair<int, int> >
-MaskedSoftmaxGradOpInplaceOption(const nnvm::NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}, {2, 1}, {3, 0}};
+static inline std::vector<std::pair<int, int>> MaskedSoftmaxGradOpInplaceOption(
+    const nnvm::NodeAttrs& attrs) {
+  return std::vector<std::pair<int, int>>{{0, 0}, {1, 0}, {2, 1}, {3, 0}};
 }
 
-template<typename xpu, typename OP, bool negate = false>
+template <typename xpu, typename OP, bool negate = false>
 void SoftmaxCompute(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
                     const std::vector<OpReqType>& req,
                     const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  if (req[0] == kNullOp || inputs[0].Size() == 0U) return;
+  if (req[0] == kNullOp || inputs[0].Size() == 0U)
+    return;
   CHECK_NE(req[0], kAddTo);
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
-  const double temperature = param.temperature.has_value() ?
-    param.temperature.value() : 1.0;
-  mxnet::TShape shape = AxisShapeCompact(inputs[0].shape_, &axis, true);
-  bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
+  int axis                  = CheckAxis(param.axis, inputs[0].ndim());
+  const double temperature  = param.temperature.has_value() ? param.temperature.value() : 1.0;
+  mxnet::TShape shape       = AxisShapeCompact(inputs[0].shape_, &axis, true);
+  bool safe_acc             = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && inputs[0].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for softmax with float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for softmax with float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
 
   MXNET_REAL_ACC_TYPE_SWITCH(inputs[0].type_flag_, DType, AType, {
-    MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      int type = kInt32;
-      if (param.use_length.value()) {
-        CHECK(inputs.size() > 1)
-          << "Mask needs to be provided when using softmax with use_length=True.";
-        type = inputs[1].type_flag_;
-      }
-      MXNET_INT32_INT64_TYPE_SWITCH(type, IType, {
-        IType* mask_ptr = nullptr;
-        if (param.use_length.value()) {
-          mask_ptr = inputs[1].dptr<IType>();
-        }
-        if (safe_acc) {
-          if (shape.ndim() == 2) {
-            Softmax<OP, negate, AType>(
-              ctx.get_stream<xpu>(), inputs[0].dptr<DType>(),
-              outputs[0].dptr<OType>(), mask_ptr, shape.get<2>(),
-              axis, static_cast<DType>(temperature));
-          } else {
-            Softmax<OP, negate, AType>(
-              ctx.get_stream<xpu>(), inputs[0].dptr<DType>(),
-              outputs[0].dptr<OType>(), mask_ptr, shape.get<3>(),
-              axis, static_cast<DType>(temperature));
+    MSHADOW_REAL_TYPE_SWITCH(
+        outputs[0].type_flag_, OType, {
+          int type = kInt32;
+          if (param.use_length.value()) {
+            CHECK(inputs.size() > 1)
+                << "Mask needs to be provided when using softmax with use_length=True.";
+            type = inputs[1].type_flag_;
           }
-        } else {
-          if (shape.ndim() == 2) {
-            Softmax<OP, negate, DType>(
-              ctx.get_stream<xpu>(), inputs[0].dptr<DType>(),
-              outputs[0].dptr<OType>(), mask_ptr, shape.get<2>(),
-              axis, static_cast<DType>(temperature));
-          } else {
-            Softmax<OP, negate, DType>(
-              ctx.get_stream<xpu>(), inputs[0].dptr<DType>(),
-              outputs[0].dptr<OType>(), mask_ptr, shape.get<3>(),
-              axis, static_cast<DType>(temperature));
-          }
-        }
-      });
-    });
+          MXNET_INT32_INT64_TYPE_SWITCH(type, IType, {
+            IType* mask_ptr = nullptr;
+            if (param.use_length.value()) {
+              mask_ptr = inputs[1].dptr<IType>();
+            }
+            if (safe_acc) {
+              if (shape.ndim() == 2) {
+                Softmax<OP, negate, AType>(ctx.get_stream<xpu>(),
+                                           inputs[0].dptr<DType>(),
+                                           outputs[0].dptr<OType>(),
+                                           mask_ptr,
+                                           shape.get<2>(),
+                                           axis,
+                                           static_cast<DType>(temperature));
+              } else {
+                Softmax<OP, negate, AType>(ctx.get_stream<xpu>(),
+                                           inputs[0].dptr<DType>(),
+                                           outputs[0].dptr<OType>(),
+                                           mask_ptr,
+                                           shape.get<3>(),
+                                           axis,
+                                           static_cast<DType>(temperature));
+              }
+            } else {
+              if (shape.ndim() == 2) {
+                Softmax<OP, negate, DType>(ctx.get_stream<xpu>(),
+                                           inputs[0].dptr<DType>(),
+                                           outputs[0].dptr<OType>(),
+                                           mask_ptr,
+                                           shape.get<2>(),
+                                           axis,
+                                           static_cast<DType>(temperature));
+              } else {
+                Softmax<OP, negate, DType>(ctx.get_stream<xpu>(),
+                                           inputs[0].dptr<DType>(),
+                                           outputs[0].dptr<OType>(),
+                                           mask_ptr,
+                                           shape.get<3>(),
+                                           axis,
+                                           static_cast<DType>(temperature));
+              }
+            }
+          });
+        });
   });
 }
 
-template<typename xpu, typename OP, bool masked_neg_inf, bool negate = false>
+template <typename xpu, typename OP, bool masked_neg_inf, bool negate = false>
 void MaskedSoftmaxCompute(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  if (req[0] == kNullOp || inputs[0].Size() == 0U) return;
+  if (req[0] == kNullOp || inputs[0].Size() == 0U)
+    return;
   CHECK_NE(req[0], kAddTo);
   const MaskedSoftmaxParam& param = nnvm::get<MaskedSoftmaxParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
-  const double temperature = param.temperature.has_value() ?
-    param.temperature.value() : 1.0;
-  bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
+  int axis                        = CheckAxis(param.axis, inputs[0].ndim());
+  const double temperature        = param.temperature.has_value() ? param.temperature.value() : 1.0;
+  bool safe_acc                   = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && inputs[0].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for masked_softmax with "
-                    "float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for masked_softmax with "
+        "float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
   MXNET_REAL_ACC_TYPE_SWITCH(inputs[0].type_flag_, DType, AType, {
     MXNET_NDIM_SWITCH(inputs[0].ndim(), ndim, {
       bool* mask_ptr = inputs[1].dptr<bool>();
       if (safe_acc) {
-        MaskedSoftmax<OP, masked_neg_inf, negate, AType>(
-          ctx.get_stream<xpu>(), inputs[0].dptr<DType>(),
-          outputs[0].dptr<DType>(), mask_ptr,
-          inputs[0].shape_.get<ndim>(), inputs[1].shape_.get<ndim>(),
-          axis, temperature, param.normalize.value(), ctx);
+        MaskedSoftmax<OP, masked_neg_inf, negate, AType>(ctx.get_stream<xpu>(),
+                                                         inputs[0].dptr<DType>(),
+                                                         outputs[0].dptr<DType>(),
+                                                         mask_ptr,
+                                                         inputs[0].shape_.get<ndim>(),
+                                                         inputs[1].shape_.get<ndim>(),
+                                                         axis,
+                                                         temperature,
+                                                         param.normalize.value(),
+                                                         ctx);
       } else {
-        MaskedSoftmax<OP, masked_neg_inf, negate, DType>(
-          ctx.get_stream<xpu>(), inputs[0].dptr<DType>(),
-          outputs[0].dptr<DType>(), mask_ptr,
-          inputs[0].shape_.get<ndim>(), inputs[1].shape_.get<ndim>(),
-          axis, temperature, param.normalize.value(), ctx);
+        MaskedSoftmax<OP, masked_neg_inf, negate, DType>(ctx.get_stream<xpu>(),
+                                                         inputs[0].dptr<DType>(),
+                                                         outputs[0].dptr<DType>(),
+                                                         mask_ptr,
+                                                         inputs[0].shape_.get<ndim>(),
+                                                         inputs[1].shape_.get<ndim>(),
+                                                         axis,
+                                                         temperature,
+                                                         param.normalize.value(),
+                                                         ctx);
       }
     });
   });
@@ -1250,7 +1399,7 @@ struct SoftmaxRTCGradCompute {
 
 #endif
 
-template<typename xpu, typename OP1, typename OP2, bool negate = false>
+template <typename xpu, typename OP1, typename OP2, bool negate = false>
 void SoftmaxGradCompute(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -1261,57 +1410,69 @@ void SoftmaxGradCompute(const nnvm::NodeAttrs& attrs,
     MXNET_INT32_INT64_TYPE_SWITCH(inputs[2].type_flag_, IType, {
       if (req[1] != kNullOp) {
         mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(
-          ctx.get_stream<xpu>(), outputs[1].Size(), outputs[1].dptr<IType>());
+            ctx.get_stream<xpu>(), outputs[1].Size(), outputs[1].dptr<IType>());
       }
     });
   }
-  if (req[0] == kNullOp) return;
-  const int itype = softmax_use_length(attrs) ? inputs[2].type_flag_ : kInt32;
+  if (req[0] == kNullOp)
+    return;
+  const int itype           = softmax_use_length(attrs) ? inputs[2].type_flag_ : kInt32;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
-  const double temperature = param.temperature.has_value() ?
-    param.temperature.value() : 1.0;
-  mxnet::TShape shape = AxisShapeCompact(inputs[0].shape_, &axis, true);
+  int axis                  = CheckAxis(param.axis, inputs[0].ndim());
+  const double temperature  = param.temperature.has_value() ? param.temperature.value() : 1.0;
+  mxnet::TShape shape       = AxisShapeCompact(inputs[0].shape_, &axis, true);
 
-  int out_idx = softmax_has_dtype_override(attrs) ? 2 : 1;
-  out_idx = softmax_use_length(attrs) ? 3 : out_idx;
+  int out_idx   = softmax_has_dtype_override(attrs) ? 2 : 1;
+  out_idx       = softmax_use_length(attrs) ? 3 : out_idx;
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
 
   MXNET_REAL_ACC_TYPE_SWITCH(inputs[0].type_flag_, OType, AType, {
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         MXNET_INT32_INT64_TYPE_SWITCH(itype, IType, {
-          IType * length_ptr = nullptr;
+          IType* length_ptr = nullptr;
           if (softmax_use_length(attrs)) {
             length_ptr = inputs[2].dptr<IType>();
           }
           if (safe_acc) {
             if (shape.ndim() == 2) {
-              SoftmaxGrad<OP1, OP2, Req, negate, AType>(
-                  ctx.get_stream<xpu>(), inputs[out_idx].dptr<OType>(),
-                  inputs[0].dptr<OType>(), outputs[0].dptr<DType>(),
-                  length_ptr, shape.get<2>(), axis,
-                  static_cast<DType>(temperature));
+              SoftmaxGrad<OP1, OP2, Req, negate, AType>(ctx.get_stream<xpu>(),
+                                                        inputs[out_idx].dptr<OType>(),
+                                                        inputs[0].dptr<OType>(),
+                                                        outputs[0].dptr<DType>(),
+                                                        length_ptr,
+                                                        shape.get<2>(),
+                                                        axis,
+                                                        static_cast<DType>(temperature));
             } else {
-              SoftmaxGrad<OP1, OP2, Req, negate, AType>(
-                  ctx.get_stream<xpu>(), inputs[out_idx].dptr<OType>(),
-                  inputs[0].dptr<OType>(), outputs[0].dptr<DType>(),
-                  length_ptr, shape.get<3>(), axis,
-                  static_cast<DType>(temperature));
+              SoftmaxGrad<OP1, OP2, Req, negate, AType>(ctx.get_stream<xpu>(),
+                                                        inputs[out_idx].dptr<OType>(),
+                                                        inputs[0].dptr<OType>(),
+                                                        outputs[0].dptr<DType>(),
+                                                        length_ptr,
+                                                        shape.get<3>(),
+                                                        axis,
+                                                        static_cast<DType>(temperature));
             }
           } else {
             if (shape.ndim() == 2) {
-              SoftmaxGrad<OP1, OP2, Req, negate, DType>(
-                  ctx.get_stream<xpu>(), inputs[out_idx].dptr<OType>(),
-                  inputs[0].dptr<OType>(), outputs[0].dptr<DType>(),
-                  length_ptr, shape.get<2>(), axis,
-                  static_cast<DType>(temperature));
+              SoftmaxGrad<OP1, OP2, Req, negate, DType>(ctx.get_stream<xpu>(),
+                                                        inputs[out_idx].dptr<OType>(),
+                                                        inputs[0].dptr<OType>(),
+                                                        outputs[0].dptr<DType>(),
+                                                        length_ptr,
+                                                        shape.get<2>(),
+                                                        axis,
+                                                        static_cast<DType>(temperature));
             } else {
-              SoftmaxGrad<OP1, OP2, Req, negate, DType>(
-                  ctx.get_stream<xpu>(), inputs[out_idx].dptr<OType>(),
-                  inputs[0].dptr<OType>(), outputs[0].dptr<DType>(),
-                  length_ptr, shape.get<3>(), axis,
-                  static_cast<DType>(temperature));
+              SoftmaxGrad<OP1, OP2, Req, negate, DType>(ctx.get_stream<xpu>(),
+                                                        inputs[out_idx].dptr<OType>(),
+                                                        inputs[0].dptr<OType>(),
+                                                        outputs[0].dptr<DType>(),
+                                                        length_ptr,
+                                                        shape.get<3>(),
+                                                        axis,
+                                                        static_cast<DType>(temperature));
             }
           }
         });
@@ -1320,7 +1481,7 @@ void SoftmaxGradCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu, typename OP1, typename OP2, bool negate = false>
+template <typename xpu, typename OP1, typename OP2, bool negate = false>
 void MaskedSoftmaxGradCompute(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -1328,32 +1489,42 @@ void MaskedSoftmaxGradCompute(const nnvm::NodeAttrs& attrs,
                               const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
 
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   const MaskedSoftmaxParam& param = nnvm::get<MaskedSoftmaxParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
-  const double temperature = param.temperature.has_value() ?
-    param.temperature.value() : 1.0;
+  int axis                        = CheckAxis(param.axis, inputs[0].ndim());
+  const double temperature        = param.temperature.has_value() ? param.temperature.value() : 1.0;
 
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   MXNET_REAL_ACC_TYPE_SWITCH(inputs[0].type_flag_, DType, AType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MXNET_NDIM_SWITCH(inputs[0].ndim(), ndim, {
         DType* ograd_ptr = inputs[0].dptr<DType>();
-        DType* out_ptr = inputs[2].dptr<DType>();
-        bool* mask_ptr = inputs[1].dptr<bool>();
+        DType* out_ptr   = inputs[2].dptr<DType>();
+        bool* mask_ptr   = inputs[1].dptr<bool>();
         DType* grad_data = outputs[0].dptr<DType>();
         if (safe_acc) {
-          MaskedSoftmaxGrad<OP1, OP2, Req, negate, AType>(
-              ctx.get_stream<xpu>(), out_ptr,
-              ograd_ptr, grad_data, mask_ptr,
-              inputs[0].shape_.get<ndim>(), inputs[1].shape_.get<ndim>(),
-              axis, static_cast<DType>(temperature), ctx);
+          MaskedSoftmaxGrad<OP1, OP2, Req, negate, AType>(ctx.get_stream<xpu>(),
+                                                          out_ptr,
+                                                          ograd_ptr,
+                                                          grad_data,
+                                                          mask_ptr,
+                                                          inputs[0].shape_.get<ndim>(),
+                                                          inputs[1].shape_.get<ndim>(),
+                                                          axis,
+                                                          static_cast<DType>(temperature),
+                                                          ctx);
         } else {
-          MaskedSoftmaxGrad<OP1, OP2, Req, negate, DType>(
-              ctx.get_stream<xpu>(), out_ptr,
-              ograd_ptr, grad_data, mask_ptr,
-              inputs[0].shape_.get<ndim>(), inputs[1].shape_.get<ndim>(),
-              axis, static_cast<DType>(temperature), ctx);
+          MaskedSoftmaxGrad<OP1, OP2, Req, negate, DType>(ctx.get_stream<xpu>(),
+                                                          out_ptr,
+                                                          ograd_ptr,
+                                                          grad_data,
+                                                          mask_ptr,
+                                                          inputs[0].shape_.get<ndim>(),
+                                                          inputs[1].shape_.get<ndim>(),
+                                                          axis,
+                                                          static_cast<DType>(temperature),
+                                                          ctx);
         }
       });
     });
@@ -1364,14 +1535,14 @@ void MaskedSoftmaxGradCompute(const nnvm::NodeAttrs& attrs,
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::SoftmaxParam> {
   size_t operator()(const mxnet::op::SoftmaxParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.axis);
-    ret = dmlc::HashCombine(ret, val.temperature);
-    ret = dmlc::HashCombine(ret, val.dtype);
-    ret = dmlc::HashCombine(ret, val.use_length);
+    ret        = dmlc::HashCombine(ret, val.axis);
+    ret        = dmlc::HashCombine(ret, val.temperature);
+    ret        = dmlc::HashCombine(ret, val.dtype);
+    ret        = dmlc::HashCombine(ret, val.use_length);
     return ret;
   }
 };
diff --git a/src/operator/nn/softmax.cc b/src/operator/nn/softmax.cc
index 6e0e07aeb884..a02b397aed11 100644
--- a/src/operator/nn/softmax.cc
+++ b/src/operator/nn/softmax.cc
@@ -42,7 +42,8 @@ static void SoftmaxComputeExCPU(const nnvm::NodeAttrs& attrs,
                                 const std::vector<NDArray>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<NDArray>& outputs) {
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
   if (SupportMKLDNNSoftmax(param, inputs[0], outputs[0])) {
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
@@ -51,8 +52,7 @@ static void SoftmaxComputeExCPU(const nnvm::NodeAttrs& attrs,
     MKLDNN_OPCHECK_RUN(fn, attrs, ctx, inputs, req, outputs);
     return;
   }
-  FallBackCompute(SoftmaxCompute<cpu, mxnet_op::softmax_fwd>, attrs, ctx,
-                  inputs, req, outputs);
+  FallBackCompute(SoftmaxCompute<cpu, mxnet_op::softmax_fwd>, attrs, ctx, inputs, req, outputs);
 }
 
 static void SoftmaxGradComputeExCPU(const nnvm::NodeAttrs& attrs,
@@ -60,7 +60,8 @@ static void SoftmaxGradComputeExCPU(const nnvm::NodeAttrs& attrs,
                                     const std::vector<NDArray>& inputs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<NDArray>& outputs) {
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
   if (SupportMKLDNNSoftmax(param, inputs[1], outputs[0])) {
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
@@ -69,34 +70,36 @@ static void SoftmaxGradComputeExCPU(const nnvm::NodeAttrs& attrs,
     MKLDNN_OPCHECK_RUN(fn, attrs, ctx, inputs, req, outputs);
     return;
   }
-  FallBackCompute(SoftmaxGradCompute<cpu, op::mshadow_op::mul, mxnet_op::softmax_bwd>, attrs, ctx,
-                  inputs, req, outputs);
+  FallBackCompute(SoftmaxGradCompute<cpu, op::mshadow_op::mul, mxnet_op::softmax_bwd>,
+                  attrs,
+                  ctx,
+                  inputs,
+                  req,
+                  outputs);
 }
 
 inline static bool SoftmaxStorageType(const nnvm::NodeAttrs& attrs,
                                       const int dev_mask,
                                       DispatchMode* dispatch_mode,
-                                      std::vector<int> *in_attrs,
-                                      std::vector<int> *out_attrs) {
+                                      std::vector<int>* in_attrs,
+                                      std::vector<int>* out_attrs) {
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), (param.use_length.value()) ? 2U : 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   if (param.use_length.value()) {
     auto& out_stype = out_attrs->at(0);
-    return storage_type_assign(&out_stype, kDefaultStorage,
-                               dispatch_mode, DispatchMode::kFCompute);
+    return storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
 inline static bool SoftmaxGradStorageType(const nnvm::NodeAttrs& attrs,
-                                      const int dev_mask,
-                                      DispatchMode* dispatch_mode,
-                                      std::vector<int> *in_attrs,
-                                      std::vector<int> *out_attrs) {
+                                          const int dev_mask,
+                                          DispatchMode* dispatch_mode,
+                                          std::vector<int>* in_attrs,
+                                          std::vector<int>* out_attrs) {
   bool support = true;
   if (softmax_use_length(attrs) || softmax_has_dtype_override(attrs)) {
     support = false;
@@ -108,11 +111,9 @@ inline static bool SoftmaxGradStorageType(const nnvm::NodeAttrs& attrs,
 }
 #endif
 
-
-
 NNVM_REGISTER_OP(softmax)
-.add_alias("_npx_softmax")
-.describe(R"code(Applies the softmax function.
+    .add_alias("_npx_softmax")
+    .describe(R"code(Applies the softmax function.
 
 The resulting array contains elements in the range (0,1) and the elements along the given axis sum up to 1.
 
@@ -135,119 +136,123 @@ Example::
                        [ 0.33333334,  0.33333334,  0.33333334]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<SoftmaxParam>)
-.set_attr<nnvm::FListOutputNames>("FListInputNames",
-    [](const NodeAttrs& attrs){
-    const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
-    return (param.use_length.value()) ?
-           std::vector<std::string>{"data", "length"} :
-           std::vector<std::string>{"data"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxCompute<cpu, mxnet_op::softmax_fwd>)
+    .set_attr_parser(ParamParser<SoftmaxParam>)
+    .set_attr<nnvm::FListOutputNames>("FListInputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        const SoftmaxParam& param =
+                                            nnvm::get<SoftmaxParam>(attrs.parsed);
+                                        return (param.use_length.value())
+                                                   ? std::vector<std::string>{"data", "length"}
+                                                   : std::vector<std::string>{"data"};
+                                      })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxCompute<cpu, mxnet_op::softmax_fwd>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SoftmaxComputeExCPU)
-.set_attr<FInferStorageType>("FInferStorageType", SoftmaxStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SoftmaxComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", SoftmaxStorageType)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", SoftmaxFGradient{"_backward_softmax"})
-// .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxOpType)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
-    return (param.use_length.value()) ? 2 : 1;
-  })
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", SoftmaxOpShape)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array.")
-.add_argument("length", "NDArray-or-Symbol", "The length array.")
-.add_arguments(SoftmaxParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", SoftmaxFGradient{"_backward_softmax"})
+    // .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxOpType)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
+      return (param.use_length.value()) ? 2 : 1;
+    })
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", SoftmaxOpShape)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "The input array.")
+    .add_argument("length", "NDArray-or-Symbol", "The length array.")
+    .add_arguments(SoftmaxParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_softmax)
-.set_num_inputs(SoftmaxGradOpNumInputs)
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    return (softmax_use_length(attrs) ? 2 : 1);
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames", SoftmaxGradOpInputNames)
-.set_attr<mxnet::FInferShape>("FInferShape", SoftmaxGradOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxGradOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", SoftmaxGradOpInplaceOption)
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
-.set_attr_parser(ParamParser<SoftmaxParam>)
+    .set_num_inputs(SoftmaxGradOpNumInputs)
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      return (softmax_use_length(attrs) ? 2 : 1);
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames", SoftmaxGradOpInputNames)
+    .set_attr<mxnet::FInferShape>("FInferShape", SoftmaxGradOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxGradOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption", SoftmaxGradOpInplaceOption)
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
+    .set_attr_parser(ParamParser<SoftmaxParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SoftmaxGradComputeExCPU)
-.set_attr<FInferStorageType>("FInferStorageType", SoftmaxGradStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SoftmaxGradComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", SoftmaxGradStorageType)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxGradCompute<cpu, op::mshadow_op::mul,
-                                                        mxnet_op::softmax_bwd>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        SoftmaxGradCompute<cpu, op::mshadow_op::mul, mxnet_op::softmax_bwd>);
 
 NNVM_REGISTER_OP(masked_softmax)
-.add_alias("_npx_masked_softmax")
-.describe(R"code(Applies the softmax function masking elements according to the mask provided)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<MaskedSoftmaxParam>)
-.set_attr<nnvm::FListOutputNames>("FListInputNames",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::string>{"data", "mask"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MaskedSoftmaxCompute<cpu, mxnet_op::softmax_fwd,
-                                     false>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto data_grad = MakeNode("_backward_masked_softmax", n->attrs.name + "_backward_data",
-                              {ograds[0], n->inputs[1], nnvm::NodeEntry(n, 0, 0)},
-                              &n->attrs.dict, &n);
-    auto mask_grad = MakeNode("zeros_like", n->attrs.name + "_backward_mask",
-                              {n->inputs[1]}, nullptr, &n);
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(data_grad);
-    ret.emplace_back(mask_grad);
-    return ret;
-  })
-.set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxOpType)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxOpShape)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array.")
-.add_argument("mask", "NDArray-or-Symbol", "Mask to apply.")
-.add_arguments(MaskedSoftmaxParam::__FIELDS__());
+    .add_alias("_npx_masked_softmax")
+    .describe(
+        R"code(Applies the softmax function masking elements according to the mask provided)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<MaskedSoftmaxParam>)
+    .set_attr<nnvm::FListOutputNames>("FListInputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"data", "mask"};
+                                      })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", MaskedSoftmaxCompute<cpu, mxnet_op::softmax_fwd, false>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto data_grad = MakeNode("_backward_masked_softmax",
+                                    n->attrs.name + "_backward_data",
+                                    {ograds[0], n->inputs[1], nnvm::NodeEntry(n, 0, 0)},
+                                    &n->attrs.dict,
+                                    &n);
+          auto mask_grad =
+              MakeNode("zeros_like", n->attrs.name + "_backward_mask", {n->inputs[1]}, nullptr, &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(data_grad);
+          ret.emplace_back(mask_grad);
+          return ret;
+        })
+    .set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxOpType)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxOpShape)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "The input array.")
+    .add_argument("mask", "NDArray-or-Symbol", "Mask to apply.")
+    .add_arguments(MaskedSoftmaxParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_masked_softmax)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListOutputNames>("FListInputNames",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::string>{"ograd", "mask", "output"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxGradOpShape)
-.set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxGradOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", MaskedSoftmaxGradOpInplaceOption)
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
-.set_attr_parser(ParamParser<MaskedSoftmaxParam>)
-.set_attr<FCompute>("FCompute<cpu>", MaskedSoftmaxGradCompute<cpu, op::mshadow_op::mul,
-                                                              mxnet_op::softmax_bwd>);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListOutputNames>("FListInputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"ograd", "mask", "output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", MaskedSoftmaxGradOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", MaskedSoftmaxGradOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption", MaskedSoftmaxGradOpInplaceOption)
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
+    .set_attr_parser(ParamParser<MaskedSoftmaxParam>)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        MaskedSoftmaxGradCompute<cpu, op::mshadow_op::mul, mxnet_op::softmax_bwd>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/softmax.cu b/src/operator/nn/softmax.cu
index c8a05b840ab9..b88caf903eef 100644
--- a/src/operator/nn/softmax.cu
+++ b/src/operator/nn/softmax.cu
@@ -347,20 +347,23 @@ __global__ void softmax_stride1_compute_kernel(const softmax_params param,
 }
 )code";
 
-int get_rows_per_block(const index_t row_size, const int nvec,
-                       const index_t max_storage, const int num_threads_per_block,
-                       const index_t total_rows, const int dev_id) {
+int get_rows_per_block(const index_t row_size,
+                       const int nvec,
+                       const index_t max_storage,
+                       const int num_threads_per_block,
+                       const index_t total_rows,
+                       const int dev_id) {
   CHECK(common::IsPower2(num_threads_per_block))
-    << "Number of threads in a block must be power of 2 to use get_rows_per_block function";
+      << "Number of threads in a block must be power of 2 to use get_rows_per_block function";
   // How many read instructions should 1 thread at least do
-  const int read_instructions = 16;
-  const size_t row_size_in_vec = (row_size + nvec - 1) / nvec;
-  int desired_num_threads_per_row = (row_size_in_vec + read_instructions - 1) / read_instructions;
-  desired_num_threads_per_row = common::RoundToPower2(desired_num_threads_per_row);
-  desired_num_threads_per_row = std::min(desired_num_threads_per_row, num_threads_per_block);
+  const int read_instructions      = 16;
+  const size_t row_size_in_vec     = (row_size + nvec - 1) / nvec;
+  int desired_num_threads_per_row  = (row_size_in_vec + read_instructions - 1) / read_instructions;
+  desired_num_threads_per_row      = common::RoundToPower2(desired_num_threads_per_row);
+  desired_num_threads_per_row      = std::min(desired_num_threads_per_row, num_threads_per_block);
   const int desired_rows_per_block = num_threads_per_block / desired_num_threads_per_row;
-  int actual_rows_per_block = desired_rows_per_block;
-  int num_sms = MultiprocessorCount(dev_id);
+  int actual_rows_per_block        = desired_rows_per_block;
+  int num_sms                      = MultiprocessorCount(dev_id);
   while (actual_rows_per_block > 1 &&
          ((max_storage != -1 && max_storage < row_size * actual_rows_per_block) ||
           (total_rows + actual_rows_per_block - 1) / actual_rows_per_block < num_sms)) {
@@ -380,74 +383,88 @@ void SoftmaxRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
   using common::mshadow_type_info;
   using namespace common::cuda::rtc;
   using common::div_round;
-  if (req[0] == kNullOp || inputs[0].Size() == 0U) return;
+  if (req[0] == kNullOp || inputs[0].Size() == 0U)
+    return;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
-  const double temperature = param.temperature.has_value() ?
-                             param.temperature.value() : 1.0;
-  mxnet::TShape shape = AxisShapeCompact(inputs[0].shape_, &axis, true);
+  int axis                  = CheckAxis(param.axis, inputs[0].ndim());
+  const double temperature  = param.temperature.has_value() ? param.temperature.value() : 1.0;
+  mxnet::TShape shape       = AxisShapeCompact(inputs[0].shape_, &axis, true);
 
-  void* length_ptr = nullptr;
+  void* length_ptr            = nullptr;
   std::string length_typename = "int";
   if (param.use_length.value()) {
     CHECK(inputs.size() > 1)
-      << "Mask needs to be provided when using softmax with use_length=True.";
-    length_ptr = inputs[1].dptr_;
+        << "Mask needs to be provided when using softmax with use_length=True.";
+    length_ptr      = inputs[1].dptr_;
     length_typename = mshadow_type_info(inputs[1].type_flag_).name;
   }
   CHECK_EQ(outputs.size(), 1);
   index_t M = shape[axis];
-  if (M == 0 || shape.Size() == 0) return;
+  if (M == 0 || shape.Size() == 0)
+    return;
   index_t stride = 1;
   if (axis == shape.ndim() - 2) {
     stride = shape[shape.ndim() - 1];
   }
-  const index_t N = shape.Size() / M;
-  softmax_params params = {{inputs[0].dptr_, length_ptr, nullptr},
-                           {outputs[0].dptr_},
-                           stride, M,
-                           temperature, 1, N};
-  std::string code = "#define OP " + OP + "\n"
-                     "const OpReqType req = " + util::to_string(req[0]) + ";\n"
-                     "const bool negate = " + std::to_string(negate) + ";\n"
-                     "using InputType1 = " + length_typename + ";\n";
+  const index_t N       = shape.Size() / M;
+  softmax_params params = {
+      {inputs[0].dptr_, length_ptr, nullptr}, {outputs[0].dptr_}, stride, M, temperature, 1, N};
+  std::string code = "#define OP " + OP +
+                     "\n"
+                     "const OpReqType req = " +
+                     util::to_string(req[0]) +
+                     ";\n"
+                     "const bool negate = " +
+                     std::to_string(negate) +
+                     ";\n"
+                     "using InputType1 = " +
+                     length_typename + ";\n";
   Stream<gpu>* s = ctx.get_stream<gpu>();
 
   constexpr int nvec = 2;
   // Using 20 kB of shared memory for persistent storage in the optimized case
   const size_t acc_type_size = std::max(mshadow_type_info(inputs[0].type_flag_).acc_size,
                                         mshadow_type_info(outputs[0].type_flag_).acc_size);
-  const size_t max_opt_M = 20 * 1024 / acc_type_size;
-  int rows_per_block = get_rows_per_block(M, nvec, max_opt_M,
-                                          vectorized_kernel_thread_num,
-                                          N, ctx.run_ctx.ctx.dev_id);
+  const size_t max_opt_M     = 20 * 1024 / acc_type_size;
+  int rows_per_block         = get_rows_per_block(
+      M, nvec, max_opt_M, vectorized_kernel_thread_num, N, ctx.run_ctx.ctx.dev_id);
   constexpr int warp_size = common::cuda::warp_size;
-  if (stride == 1 &&
-      static_cast<size_t>(M * rows_per_block) <= max_opt_M) {
-    code += "const bool only_full_blocks = " + std::to_string(N % rows_per_block == 0) + ";\n"
+  if (stride == 1 && static_cast<size_t>(M * rows_per_block) <= max_opt_M) {
+    code += "const bool only_full_blocks = " + std::to_string(N % rows_per_block == 0) +
+            ";\n"
             "const bool reduction_inside_warp = " +
             std::to_string(vectorized_kernel_thread_num / rows_per_block <= warp_size) + ";\n";
     params.rows_per_block = rows_per_block;
-    int nblocks = (N + rows_per_block - 1) / rows_per_block;
-    VectorizedKernelRTCLauncher(code + softmax_common_functions, "softmax_stride1_compute_kernel",
-                                softmax_stride1_kernel_fwd, nvec,
-                                M * rows_per_block, N / rows_per_block, s, params,
-                                inputs, outputs,
-                                ctx.run_ctx.ctx.dev_id, 0, nblocks);
+    int nblocks           = (N + rows_per_block - 1) / rows_per_block;
+    VectorizedKernelRTCLauncher(code + softmax_common_functions,
+                                "softmax_stride1_compute_kernel",
+                                softmax_stride1_kernel_fwd,
+                                nvec,
+                                M * rows_per_block,
+                                N / rows_per_block,
+                                s,
+                                params,
+                                inputs,
+                                outputs,
+                                ctx.run_ctx.ctx.dev_id,
+                                0,
+                                nblocks);
     MSHADOW_CUDA_POST_KERNEL_CHECK(softmax_stride1_compute_kernel);
   } else {
-    code += "using InputType0 = " + mshadow_type_info(inputs[0].type_flag_).name + ";\n"
-            "using OutputType0 = " + mshadow_type_info(outputs[0].type_flag_).name + ";\n";
+    code += "using InputType0 = " + mshadow_type_info(inputs[0].type_flag_).name +
+            ";\n"
+            "using OutputType0 = " +
+            mshadow_type_info(outputs[0].type_flag_).name + ";\n";
     std::vector<const void*> args;
     args.emplace_back(&params);
     args.emplace_back(&M);
     int num_threads = std::min(static_cast<size_t>(128),
                                common::RoundToPower2(div_round(M, warp_size) * warp_size));
     if (stride != 1) {
-      const int num_sms = MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
+      const int num_sms         = MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
       const index_t rows_per_sm = div_round(N, (512 / num_threads) * num_sms);
-      params.rows_per_block = std::min(static_cast<size_t>(warp_size),
-                                       common::RoundToPower2(rows_per_sm));
+      params.rows_per_block =
+          std::min(static_cast<size_t>(warp_size), common::RoundToPower2(rows_per_sm));
     }
     const auto& kernel_func = get_function(code + softmax_common_functions,
                                            "simple_softmax_kernel",
@@ -709,61 +726,73 @@ void SoftmaxRTCGradCompute::operator()(const nnvm::NodeAttrs& attrs,
   Stream<gpu>* s = ctx.get_stream<gpu>();
   if (softmax_use_length(attrs)) {
     if (req[1] != kNullOp) {
-      cudaMemsetAsync(outputs[1].dptr_, 0,
+      cudaMemsetAsync(outputs[1].dptr_,
+                      0,
                       outputs[1].Size() * mshadow_type_info(outputs[1].type_flag_).size,
                       Stream<gpu>::GetStream(s));
     }
   }
-  if (req[0] == kNullOp || inputs[0].Size() == 0U) return;
+  if (req[0] == kNullOp || inputs[0].Size() == 0U)
+    return;
   const SoftmaxParam& param = nnvm::get<SoftmaxParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
-  const double temperature = param.temperature.has_value() ?
-                             param.temperature.value() : 1.0;
-  mxnet::TShape shape = AxisShapeCompact(inputs[0].shape_, &axis, true);
+  int axis                  = CheckAxis(param.axis, inputs[0].ndim());
+  const double temperature  = param.temperature.has_value() ? param.temperature.value() : 1.0;
+  mxnet::TShape shape       = AxisShapeCompact(inputs[0].shape_, &axis, true);
 
   int out_idx = softmax_has_dtype_override(attrs) ? 2 : 1;
-  out_idx = softmax_use_length(attrs) ? 3 : out_idx;
+  out_idx     = softmax_use_length(attrs) ? 3 : out_idx;
 
-  void* length_ptr = nullptr;
+  void* length_ptr            = nullptr;
   std::string length_typename = "int";
   if (softmax_use_length(attrs)) {
-    length_ptr = inputs[2].dptr_;
+    length_ptr      = inputs[2].dptr_;
     length_typename = mshadow_type_info(inputs[2].type_flag_).name;
   }
   index_t M = shape[axis];
-  if (M == 0 || shape.Size() == 0) return;
+  if (M == 0 || shape.Size() == 0)
+    return;
   index_t stride = 1;
   if (axis == shape.ndim() - 2) {
     stride = shape[shape.ndim() - 1];
   }
-  const index_t N = shape.Size() / M;
+  const index_t N       = shape.Size() / M;
   softmax_params params = {{inputs[out_idx].dptr_, inputs[0].dptr_, length_ptr},
                            {outputs[0].dptr_},
-                           stride, M,
-                           temperature, 1, N};
-  std::string code = "#define OP1 " + OP1 + "\n"
-                     "#define OP2 " + OP2 + "\n"
-                     "const OpReqType req = " + util::to_string(req[0]) + ";\n"
-                     "const bool negate = " + std::to_string(negate) + ";\n"
-                     "using InputType2 = " + length_typename + ";\n";
+                           stride,
+                           M,
+                           temperature,
+                           1,
+                           N};
+  std::string code      = "#define OP1 " + OP1 +
+                     "\n"
+                     "#define OP2 " +
+                     OP2 +
+                     "\n"
+                     "const OpReqType req = " +
+                     util::to_string(req[0]) +
+                     ";\n"
+                     "const bool negate = " +
+                     std::to_string(negate) +
+                     ";\n"
+                     "using InputType2 = " +
+                     length_typename + ";\n";
 
   constexpr int nvec = 2;
   // Using 20 kB of shared memory for persistent storage in the optimized case
   const size_t acc_type_size = std::max(mshadow_type_info(inputs[0].type_flag_).acc_size,
                                         mshadow_type_info(outputs[0].type_flag_).acc_size);
-  const size_t max_opt_M = 10 * 1024 / acc_type_size;
-  int rows_per_block = get_rows_per_block(M, nvec, max_opt_M,
-                                          vectorized_kernel_thread_num,
-                                          N, ctx.run_ctx.ctx.dev_id);
+  const size_t max_opt_M     = 10 * 1024 / acc_type_size;
+  int rows_per_block         = get_rows_per_block(
+      M, nvec, max_opt_M, vectorized_kernel_thread_num, N, ctx.run_ctx.ctx.dev_id);
   params.rows_per_block = rows_per_block;
-  bool debug_softmax = dmlc::GetEnv("DEBUG_SOFTMAX_GRAD", false);
-  if (!debug_softmax && stride == 1 &&
-      static_cast<size_t>(M * rows_per_block) <= max_opt_M) {
+  bool debug_softmax    = dmlc::GetEnv("DEBUG_SOFTMAX_GRAD", false);
+  if (!debug_softmax && stride == 1 && static_cast<size_t>(M * rows_per_block) <= max_opt_M) {
     const int warp_size = 32;
-    code += "const bool only_full_blocks = " + std::to_string(N % rows_per_block == 0) + ";\n"
+    code += "const bool only_full_blocks = " + std::to_string(N % rows_per_block == 0) +
+            ";\n"
             "const bool reduction_inside_warp = " +
             std::to_string(vectorized_kernel_thread_num / rows_per_block <= warp_size) + ";\n";
-    int nblocks = div_round(N, rows_per_block);
+    int nblocks                   = div_round(N, rows_per_block);
     std::vector<TBlob> new_inputs = {inputs[out_idx], inputs[0]};
     if (softmax_use_length(attrs)) {
       new_inputs.emplace_back(inputs[2]);
@@ -771,26 +800,37 @@ void SoftmaxRTCGradCompute::operator()(const nnvm::NodeAttrs& attrs,
     std::vector<TBlob> new_outputs = {outputs[0]};
     VectorizedKernelRTCLauncher(code + softmax_common_functions,
                                 "softmax_stride1_compute_grad_kernel",
-                                softmax_stride1_kernel_bwd, nvec,
-                                M * rows_per_block, N / rows_per_block, s, params,
-                                new_inputs, new_outputs,
-                                ctx.run_ctx.ctx.dev_id, 0, nblocks);
+                                softmax_stride1_kernel_bwd,
+                                nvec,
+                                M * rows_per_block,
+                                N / rows_per_block,
+                                s,
+                                params,
+                                new_inputs,
+                                new_outputs,
+                                ctx.run_ctx.ctx.dev_id,
+                                0,
+                                nblocks);
     MSHADOW_CUDA_POST_KERNEL_CHECK(softmax_stride1_compute_grad_kernel);
   } else {
-    code += "using InputType0 = " + mshadow_type_info(inputs[out_idx].type_flag_).name + ";\n"
-            "using InputType1 = " + mshadow_type_info(inputs[0].type_flag_).name + ";\n"
-            "using OutputType0 = " + mshadow_type_info(outputs[0].type_flag_).name + ";\n";
+    code += "using InputType0 = " + mshadow_type_info(inputs[out_idx].type_flag_).name +
+            ";\n"
+            "using InputType1 = " +
+            mshadow_type_info(inputs[0].type_flag_).name +
+            ";\n"
+            "using OutputType0 = " +
+            mshadow_type_info(outputs[0].type_flag_).name + ";\n";
     std::vector<const void*> args;
     args.emplace_back(&params);
     args.emplace_back(&M);
     const int warp_size = 32;
-    int num_threads = std::min(static_cast<size_t>(128),
+    int num_threads     = std::min(static_cast<size_t>(128),
                                common::RoundToPower2(div_round(M, warp_size) * warp_size));
     if (stride != 1) {
-      const int num_sms = MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
+      const int num_sms         = MultiprocessorCount(ctx.run_ctx.ctx.dev_id);
       const index_t rows_per_sm = div_round(N, (512 / num_threads) * num_sms);
-      params.rows_per_block = std::min(static_cast<size_t>(warp_size),
-                                       common::RoundToPower2(rows_per_sm));
+      params.rows_per_block =
+          std::min(static_cast<size_t>(warp_size), common::RoundToPower2(rows_per_sm));
     }
     const auto& kernel_func = get_function(code + softmax_common_functions,
                                            "simple_softmax_grad_kernel",
@@ -801,18 +841,16 @@ void SoftmaxRTCGradCompute::operator()(const nnvm::NodeAttrs& attrs,
   }
 }
 
-NNVM_REGISTER_OP(softmax)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCCompute{"softmax_fwd"});
+NNVM_REGISTER_OP(softmax).set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCCompute{"softmax_fwd"});
 
 NNVM_REGISTER_OP(_backward_softmax)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCGradCompute{"op::mul", "softmax_bwd"});
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCGradCompute{"op::mul", "softmax_bwd"});
 
 NNVM_REGISTER_OP(masked_softmax)
-.set_attr<FCompute>("FCompute<gpu>", MaskedSoftmaxCompute<gpu, mxnet_op::softmax_fwd,
-                                                          false>);
+    .set_attr<FCompute>("FCompute<gpu>", MaskedSoftmaxCompute<gpu, mxnet_op::softmax_fwd, false>);
 
 NNVM_REGISTER_OP(_backward_masked_softmax)
-.set_attr<FCompute>("FCompute<gpu>", MaskedSoftmaxGradCompute<gpu, op::mshadow_op::mul,
-                                                              mxnet_op::softmax_bwd>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        MaskedSoftmaxGradCompute<gpu, op::mshadow_op::mul, mxnet_op::softmax_bwd>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/softmax_activation-inl.h b/src/operator/nn/softmax_activation-inl.h
index 9f8e581e2fe3..278db9b023f3 100644
--- a/src/operator/nn/softmax_activation-inl.h
+++ b/src/operator/nn/softmax_activation-inl.h
@@ -22,7 +22,7 @@
  * \file softmax_activation-inl.h
  * \brief SoftmaxActivation operator
  * \author Junyuan Xie, Da Zheng
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_SOFTMAX_ACTIVATION_INL_H_
 #define MXNET_OPERATOR_NN_SOFTMAX_ACTIVATION_INL_H_
 
@@ -41,27 +41,28 @@ namespace op {
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace softmax_activation {
-enum SoftmaxActivationOpInputs {kData};
-enum SoftmaxActivationOpOutputs {kOut};
-enum SoftmaxActivationOpType {kInstance, kChannel};
-enum SoftmaxActivationOpResource {kTempSpace};
-}  // softmax_activation
+enum SoftmaxActivationOpInputs { kData };
+enum SoftmaxActivationOpOutputs { kOut };
+enum SoftmaxActivationOpType { kInstance, kChannel };
+enum SoftmaxActivationOpResource { kTempSpace };
+}  // namespace softmax_activation
 
 struct SoftmaxActivationParam : public dmlc::Parameter<SoftmaxActivationParam> {
   // use int for enumeration
   int mode;
   DMLC_DECLARE_PARAMETER(SoftmaxActivationParam) {
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("instance", softmax_activation::kInstance)
-    .add_enum("channel", softmax_activation::kChannel)
-    .set_default(softmax_activation::kInstance)
-    .describe("Specifies how to compute the softmax. If set to ``instance``, "
-              "it computes softmax for each instance. If set to ``channel``, "
-              "It computes cross channel softmax for each position of each instance.");
+        .add_enum("instance", softmax_activation::kInstance)
+        .add_enum("channel", softmax_activation::kChannel)
+        .set_default(softmax_activation::kInstance)
+        .describe(
+            "Specifies how to compute the softmax. If set to ``instance``, "
+            "it computes softmax for each instance. If set to ``channel``, "
+            "It computes cross channel softmax for each position of each instance.");
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void SoftmaxActivationCompute(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -72,26 +73,25 @@ void SoftmaxActivationCompute(const nnvm::NodeAttrs& attrs,
   const SoftmaxActivationParam& param = nnvm::get<SoftmaxActivationParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const TBlob &in_data = inputs[softmax_activation::kData];
-  const TBlob &out_data = outputs[softmax_activation::kOut];
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& in_data  = inputs[softmax_activation::kData];
+  const TBlob& out_data = outputs[softmax_activation::kOut];
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
   if (param.mode == softmax_activation::kInstance) {
     Tensor<xpu, 2> data = in_data.FlatTo2D<xpu, real_t>(s);
-    Tensor<xpu, 2> out = out_data.FlatTo2D<xpu, real_t>(s);
+    Tensor<xpu, 2> out  = out_data.FlatTo2D<xpu, real_t>(s);
     Softmax(out, data);
   } else {
-    CHECK_GE(in_data.ndim(), 3)
-        << "Input need to have a least 3 dimensions when mode=channel";
-    index_t n = in_data.size(0);
-    index_t k = in_data.size(1);
-    Shape<3> s3 = Shape3(n, k, static_cast<index_t>(in_data.Size()/n/k));
+    CHECK_GE(in_data.ndim(), 3) << "Input need to have a least 3 dimensions when mode=channel";
+    index_t n                   = in_data.size(0);
+    index_t k                   = in_data.size(1);
+    Shape<3> s3                 = Shape3(n, k, static_cast<index_t>(in_data.Size() / n / k));
     Tensor<xpu, 3, real_t> data = in_data.get_with_shape<xpu, 3, real_t>(s3, s);
-    Tensor<xpu, 3, real_t> out = out_data.get_with_shape<xpu, 3, real_t>(s3, s);
+    Tensor<xpu, 3, real_t> out  = out_data.get_with_shape<xpu, 3, real_t>(s3, s);
     Softmax(out, data);
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void SoftmaxActivationGradCompute(const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<TBlob>& inputs,
@@ -102,30 +102,27 @@ void SoftmaxActivationGradCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1);
   CHECK_EQ(reqs.size(), 1);
-  const TBlob &out_grad = inputs[0];
-  const TBlob &out_data = inputs[1];
-  const OpReqType &req = reqs[0];
-  const TBlob &in_grad = outputs[0];
+  const TBlob& out_grad = inputs[0];
+  const TBlob& out_data = inputs[1];
+  const OpReqType& req  = reqs[0];
+  const TBlob& in_grad  = outputs[0];
   // Use 3d tensor for both mode -> {instance, channel}. Get shapes
-  index_t total_size = in_grad.Size();
-  index_t batch_size = in_grad.shape_[0];
-  index_t channel_num = in_grad.shape_[1];
-  index_t rest_size = total_size / (batch_size * channel_num);
+  index_t total_size        = in_grad.Size();
+  index_t batch_size        = in_grad.shape_[0];
+  index_t channel_num       = in_grad.shape_[1];
+  index_t rest_size         = total_size / (batch_size * channel_num);
   const Shape<3> data_shape = Shape3(batch_size, channel_num, rest_size);
   // Get tensors
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Tensor<xpu, 3> m_out_grad =
-      out_grad.get_with_shape<xpu, 3, real_t>(data_shape, s);
-  Tensor<xpu, 3> m_out_data =
-      out_data.get_with_shape<xpu, 3, real_t>(data_shape, s);
-  Tensor<xpu, 3> m_in_grad =
-      in_grad.get_with_shape<xpu, 3, real_t>(data_shape, s);
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
+  Tensor<xpu, 3> m_out_grad = out_grad.get_with_shape<xpu, 3, real_t>(data_shape, s);
+  Tensor<xpu, 3> m_out_data = out_data.get_with_shape<xpu, 3, real_t>(data_shape, s);
+  Tensor<xpu, 3> m_in_grad  = in_grad.get_with_shape<xpu, 3, real_t>(data_shape, s);
   // get requested temp space
   Tensor<xpu, 2> workspace = ctx.requested[softmax_activation::kTempSpace].get_space<xpu>(
       Shape2(batch_size, rest_size), s);
   workspace = reduce_with_axis<red::sum, false>(m_out_grad * m_out_data, 1);
-  Assign(m_in_grad, req,
-         m_out_data * (m_out_grad - broadcast_with_axis(workspace, 0, channel_num)));
+  Assign(
+      m_in_grad, req, m_out_data * (m_out_grad - broadcast_with_axis(workspace, 0, channel_num)));
 }
 
 }  // namespace op
diff --git a/src/operator/nn/softmax_activation.cc b/src/operator/nn/softmax_activation.cc
index 4779b7732688..bdc60556fc8e 100644
--- a/src/operator/nn/softmax_activation.cc
+++ b/src/operator/nn/softmax_activation.cc
@@ -22,7 +22,7 @@
  * \file activation.cc
  * \brief softmax_activation op
  * \author Junyuan Xie, Da Zheng
-*/
+ */
 #include "./softmax_activation-inl.h"
 #include "../tensor/elemwise_unary_op.h"
 #include "../mshadow_op.h"
@@ -33,7 +33,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(SoftmaxActivationParam);
 
 MXNET_OPERATOR_REGISTER_UNARY(SoftmaxActivation)
-.describe(R"code(Applies softmax activation to input. This is intended for internal layers.
+    .describe(R"code(Applies softmax activation to input. This is intended for internal layers.
 
 .. note::
 
@@ -57,28 +57,30 @@ Example::
    [  6.56221947e-03   5.95310994e-04   9.73919690e-01   1.78379621e-02   1.08472735e-03]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<SoftmaxActivationParam>)
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxActivationCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_SoftmaxActivation"})
-.add_arguments(SoftmaxActivationParam::__FIELDS__());
+    .set_attr_parser(ParamParser<SoftmaxActivationParam>)
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxActivationCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_SoftmaxActivation"})
+    .add_arguments(SoftmaxActivationParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_SoftmaxActivation)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr_parser(ParamParser<SoftmaxActivationParam>)
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxActivationGradCompute<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr_parser(ParamParser<SoftmaxActivationParam>)
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxActivationGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/softmax_activation.cu b/src/operator/nn/softmax_activation.cu
index f3997e00052e..af8c0794b8dd 100644
--- a/src/operator/nn/softmax_activation.cu
+++ b/src/operator/nn/softmax_activation.cu
@@ -22,7 +22,7 @@
  * \file softmax_activation.cu
  * \brief
  * \author Junyuan Xie, Da Zheng
-*/
+ */
 #include "./softmax_activation-inl.h"
 #include "../mshadow_op.h"
 #if MXNET_USE_CUDNN == 1
@@ -34,7 +34,7 @@ namespace op {
 
 #if MXNET_USE_CUDNN == 1
 
-static inline CuDNNSoftmaxActivationOp &GetCuDNNSoftmaxActOp(const SoftmaxActivationParam& param) {
+static inline CuDNNSoftmaxActivationOp& GetCuDNNSoftmaxActOp(const SoftmaxActivationParam& param) {
 #if DMLC_CXX11_THREAD_LOCAL
   static thread_local CuDNNSoftmaxActivationOp op;
 #else
@@ -44,7 +44,7 @@ static inline CuDNNSoftmaxActivationOp &GetCuDNNSoftmaxActOp(const SoftmaxActiva
   return op;
 }
 
-template<>
+template <>
 void SoftmaxActivationCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const std::vector<TBlob>& inputs,
@@ -56,7 +56,7 @@ void SoftmaxActivationCompute<gpu>(const nnvm::NodeAttrs& attrs,
   GetCuDNNSoftmaxActOp(param).Forward(ctx, inputs[0], req[0], outputs[0]);
 }
 
-template<>
+template <>
 void SoftmaxActivationGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
                                        const OpContext& ctx,
                                        const std::vector<TBlob>& inputs,
@@ -71,11 +71,10 @@ void SoftmaxActivationGradCompute<gpu>(const nnvm::NodeAttrs& attrs,
 #endif
 
 NNVM_REGISTER_OP(SoftmaxActivation)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxActivationCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxActivationCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_SoftmaxActivation)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxActivationGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxActivationGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/nn/softmin.cc b/src/operator/nn/softmin.cc
index 0522c8c9b120..9b4d98530a48 100644
--- a/src/operator/nn/softmin.cc
+++ b/src/operator/nn/softmin.cc
@@ -31,7 +31,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(softmin)
-.describe(R"code(Applies the softmin function.
+    .describe(R"code(Applies the softmin function.
 
 The resulting array contains elements in the range (0,1) and the elements along the given axis sum
 up to 1.
@@ -55,35 +55,35 @@ Example::
                        [ 0.09003057,  0.24472848,  0.66524094]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<SoftmaxParam>)
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxCompute<cpu, mxnet_op::softmax_fwd, true>)
-.set_attr<nnvm::FGradient>("FGradient", SoftmaxFGradient{"_backward_softmin"})
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxOpType)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array.")
-.add_arguments(SoftmaxParam::__FIELDS__());
+    .set_attr_parser(ParamParser<SoftmaxParam>)
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxCompute<cpu, mxnet_op::softmax_fwd, true>)
+    .set_attr<nnvm::FGradient>("FGradient", SoftmaxFGradient{"_backward_softmin"})
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxOpType)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "The input array.")
+    .add_arguments(SoftmaxParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_softmin)
-.set_num_inputs(SoftmaxGradOpNumInputs)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", SoftmaxGradOpInputNames)
-.set_attr<mxnet::FInferShape>("FInferShape", SoftmaxGradOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxGradOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", SoftmaxGradOpInplaceOption)
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
-.set_attr_parser(ParamParser<SoftmaxParam>)
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxGradCompute<cpu, op::mshadow_op::mul,
-                                                        mxnet_op::softmax_bwd, true>);
+    .set_num_inputs(SoftmaxGradOpNumInputs)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames", SoftmaxGradOpInputNames)
+    .set_attr<mxnet::FInferShape>("FInferShape", SoftmaxGradOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxGradOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption", SoftmaxGradOpInplaceOption)
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments")
+    .set_attr_parser(ParamParser<SoftmaxParam>)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        SoftmaxGradCompute<cpu, op::mshadow_op::mul, mxnet_op::softmax_bwd, true>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/softmin.cu b/src/operator/nn/softmin.cu
index b6f56ced8dd0..c89ddbf8d342 100644
--- a/src/operator/nn/softmin.cu
+++ b/src/operator/nn/softmin.cu
@@ -28,11 +28,11 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(softmin)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCCompute{"softmax_fwd", true});
+NNVM_REGISTER_OP(softmin).set_attr<FCompute>("FCompute<gpu>",
+                                             SoftmaxRTCCompute{"softmax_fwd", true});
 
 NNVM_REGISTER_OP(_backward_softmin)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCGradCompute{"op::mul", "softmax_bwd", true});
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxRTCGradCompute{"op::mul", "softmax_bwd", true});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/upsampling-inl.h b/src/operator/nn/upsampling-inl.h
index daf74b71e410..aa56df98e5fc 100644
--- a/src/operator/nn/upsampling-inl.h
+++ b/src/operator/nn/upsampling-inl.h
@@ -22,7 +22,7 @@
  * \file upsampling-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_NN_UPSAMPLING_INL_H_
 #define MXNET_OPERATOR_NN_UPSAMPLING_INL_H_
 
@@ -41,10 +41,10 @@ namespace mxnet {
 namespace op {
 
 namespace up_enum {
-enum UpSamplingOpInputs {kData, kWeight};
-enum UpSamplingOpOutputs {kOut};
-enum UpSamplingType {kNearest, kBilinear};
-enum UpSamplingMultiInputMode {kConcat, kSum};
+enum UpSamplingOpInputs { kData, kWeight };
+enum UpSamplingOpOutputs { kOut };
+enum UpSamplingType { kNearest, kBilinear };
+enum UpSamplingMultiInputMode { kConcat, kSum };
 }  // namespace up_enum
 
 struct UpSamplingParam : public dmlc::Parameter<UpSamplingParam> {
@@ -55,40 +55,41 @@ struct UpSamplingParam : public dmlc::Parameter<UpSamplingParam> {
   int multi_input_mode;
   uint64_t workspace;
   DMLC_DECLARE_PARAMETER(UpSamplingParam) {
-    DMLC_DECLARE_FIELD(scale)
-    .set_lower_bound(1)
-    .describe("Up sampling scale");
+    DMLC_DECLARE_FIELD(scale).set_lower_bound(1).describe("Up sampling scale");
     DMLC_DECLARE_FIELD(num_filter)
-    .describe("Input filter. Only used by bilinear sample_type."
-              "Since bilinear upsampling uses deconvolution, num_filters "
-              "is set to the number of channels.")
-    .set_default(0);
+        .describe(
+            "Input filter. Only used by bilinear sample_type."
+            "Since bilinear upsampling uses deconvolution, num_filters "
+            "is set to the number of channels.")
+        .set_default(0);
     DMLC_DECLARE_FIELD(sample_type)
-    .add_enum("nearest", up_enum::kNearest)
-    .add_enum("bilinear", up_enum::kBilinear)
-    .describe("upsampling method");
+        .add_enum("nearest", up_enum::kNearest)
+        .add_enum("bilinear", up_enum::kBilinear)
+        .describe("upsampling method");
     DMLC_DECLARE_FIELD(multi_input_mode)
-    .add_enum("concat", up_enum::kConcat)
-    .add_enum("sum", up_enum::kSum)
-    .set_default(up_enum::kConcat)
-    .describe("How to handle multiple input. concat means concatenate upsampled "
-    "images along the channel dimension. sum means add all images together, "
-    "only available for nearest neighbor upsampling.");
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs to be upsampled. For nearest neighbor "
-    "upsampling, this can be 1-N; the size of output will be"
-    "(scale*h_0,scale*w_0) and all other inputs will be upsampled to the"
-    "same size. For bilinear upsampling this must be 2; 1 input and 1 weight.");
-    DMLC_DECLARE_FIELD(workspace).set_default(512).set_lower_bound(0)
-    .describe("Tmp workspace for deconvolution (MB)");
+        .add_enum("concat", up_enum::kConcat)
+        .add_enum("sum", up_enum::kSum)
+        .set_default(up_enum::kConcat)
+        .describe(
+            "How to handle multiple input. concat means concatenate upsampled "
+            "images along the channel dimension. sum means add all images together, "
+            "only available for nearest neighbor upsampling.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe(
+        "Number of inputs to be upsampled. For nearest neighbor "
+        "upsampling, this can be 1-N; the size of output will be"
+        "(scale*h_0,scale*w_0) and all other inputs will be upsampled to the"
+        "same size. For bilinear upsampling this must be 2; 1 input and 1 weight.");
+    DMLC_DECLARE_FIELD(workspace).set_default(512).set_lower_bound(0).describe(
+        "Tmp workspace for deconvolution (MB)");
   }
 };  // struct UpSamplingParam
 
-template<typename xpu, typename DType>
-void UpSamplingForward(const OpContext &ctx, const UpSamplingParam &param,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data) {
+template <typename xpu, typename DType>
+void UpSamplingForward(const OpContext& ctx,
+                       const UpSamplingParam& param,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data) {
   using namespace mshadow;
   using namespace mshadow::expr;
   CHECK_EQ(in_data.size(), static_cast<size_t>(param.num_args));
@@ -96,14 +97,14 @@ void UpSamplingForward(const OpContext &ctx, const UpSamplingParam &param,
   if (req[up_enum::kOut] == kNullOp) {
     return;
   }
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
   Tensor<xpu, 4, DType> out = out_data[up_enum::kOut].get<xpu, 4, DType>(s);
   if (param.num_args > 1) {
     int begin = 0;
     for (int i = 0; i < param.num_args; ++i) {
       Tensor<xpu, 4, DType> data = in_data[i].get<xpu, 4, DType>(s);
-      int end = begin + data.size(1);
-      int scale = out_data[up_enum::kOut].size(2)/in_data[i].size(2);
+      int end                    = begin + data.size(1);
+      int scale                  = out_data[up_enum::kOut].size(2) / in_data[i].size(2);
       if (param.multi_input_mode == up_enum::kSum) {
         if (i == 0) {
           Assign(out, req[up_enum::kOut], upsampling_nearest(data, scale));
@@ -121,77 +122,70 @@ void UpSamplingForward(const OpContext &ctx, const UpSamplingParam &param,
   }
 }
 
-template<typename xpu, typename DType>
-void UpSamplingBackward(const OpContext &ctx, const UpSamplingParam &param,
-                        const TBlob &out_grad, const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad) {
+template <typename xpu, typename DType>
+void UpSamplingBackward(const OpContext& ctx,
+                        const UpSamplingParam& param,
+                        const TBlob& out_grad,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad) {
   using namespace mshadow;
   using namespace mshadow::expr;
   CHECK_EQ(in_grad.size(), static_cast<size_t>(param.num_args));
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s             = ctx.get_stream<xpu>();
   Tensor<xpu, 4, DType> grad = out_grad.get<xpu, 4, DType>(s);
   if (param.num_args > 1) {
     int begin = 0;
     for (int i = 0; i < param.num_args; ++i) {
       Tensor<xpu, 4, DType> input_grad = in_grad[i].get<xpu, 4, DType>(s);
-      mshadow::Shape<2> in_shape = Shape2(input_grad.shape_[2], input_grad.shape_[3]);
-      int end = begin + input_grad.size(1);
-      int scale = grad.size(2)/in_shape[0];
+      mshadow::Shape<2> in_shape       = Shape2(input_grad.shape_[2], input_grad.shape_[3]);
+      int end                          = begin + input_grad.size(1);
+      int scale                        = grad.size(2) / in_shape[0];
       if (param.multi_input_mode == up_enum::kSum) {
-        Assign(input_grad, req[i],
-               pool<mshadow::red::sum>(grad,
-                                       in_shape,
-                                       scale,
-                                       scale,
-                                       scale,
-                                       scale));
+        Assign(input_grad,
+               req[i],
+               pool<mshadow::red::sum>(grad, in_shape, scale, scale, scale, scale));
       } else {
-        Assign(input_grad, req[i],
-               pool<mshadow::red::sum>(slice<1>(grad, begin, end),
-                                       in_shape,
-                                       scale,
-                                       scale,
-                                       scale,
-                                       scale));
+        Assign(input_grad,
+               req[i],
+               pool<mshadow::red::sum>(
+                   slice<1>(grad, begin, end), in_shape, scale, scale, scale, scale));
       }
       begin = end;
     }
   } else {
     Tensor<xpu, 4, DType> input_grad = in_grad[up_enum::kData].get<xpu, 4, DType>(s);
-    mshadow::Shape<2> in_shape = Shape2(input_grad.shape_[2], input_grad.shape_[3]);
-    Assign(input_grad, req[up_enum::kData],
-           pool<mshadow::red::sum>(grad,
-                                   in_shape,
-                                   param.scale,
-                                   param.scale,
-                                   param.scale,
-                                   param.scale));
+    mshadow::Shape<2> in_shape       = Shape2(input_grad.shape_[2], input_grad.shape_[3]);
+    Assign(input_grad,
+           req[up_enum::kData],
+           pool<mshadow::red::sum>(
+               grad, in_shape, param.scale, param.scale, param.scale, param.scale));
   }
 }
 
 static inline DeconvolutionParam GetDeconvolutionParam(const UpSamplingParam& param) {
   DeconvolutionParam p = DeconvolutionParam();
-  int kernel = 2 * param.scale - param.scale % 2;
-  int stride = param.scale;
-  int pad = static_cast<int>(ceil((param.scale - 1) / 2.));
-  p.workspace = param.workspace;
-  p.num_group = param.num_filter;
-  p.num_filter = param.num_filter;
-  p.no_bias =  true;
-  int shape[] = {1, 1};
-  p.dilate = mxnet::TShape(shape, shape + 2);
+  int kernel           = 2 * param.scale - param.scale % 2;
+  int stride           = param.scale;
+  int pad              = static_cast<int>(ceil((param.scale - 1) / 2.));
+  p.workspace          = param.workspace;
+  p.num_group          = param.num_filter;
+  p.num_filter         = param.num_filter;
+  p.no_bias            = true;
+  int shape[]          = {1, 1};
+  p.dilate             = mxnet::TShape(shape, shape + 2);
   shape[0] = shape[1] = kernel;
-  p.kernel = mxnet::TShape(shape, shape + 2);
+  p.kernel            = mxnet::TShape(shape, shape + 2);
   shape[0] = shape[1] = stride;
-  p.stride = mxnet::TShape(shape, shape + 2);
+  p.stride            = mxnet::TShape(shape, shape + 2);
   shape[0] = shape[1] = pad;
-  p.pad = mxnet::TShape(shape, shape + 2);
+  p.pad               = mxnet::TShape(shape, shape + 2);
   return p;
 }
 
-template<typename xpu>
+template <typename xpu>
 void UpSamplingCompute(const nnvm::NodeAttrs& attrs,
-                       const OpContext& ctx, const std::vector<TBlob>& inputs,
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
                        const std::vector<OpReqType>& req,
                        const std::vector<TBlob>& outputs) {
   const UpSamplingParam& param = nnvm::get<UpSamplingParam>(attrs.parsed);
@@ -207,9 +201,10 @@ void UpSamplingCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void UpSamplingGradCompute(const nnvm::NodeAttrs& attrs,
-                           const OpContext& ctx, const std::vector<TBlob>& inputs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   const UpSamplingParam& param = nnvm::get<UpSamplingParam>(attrs.parsed);
diff --git a/src/operator/nn/upsampling.cc b/src/operator/nn/upsampling.cc
index 2c4a1b9120fd..269d70a69197 100644
--- a/src/operator/nn/upsampling.cc
+++ b/src/operator/nn/upsampling.cc
@@ -22,7 +22,7 @@
  * \file upsampling_nearest.cc
  * \brief
  * \author Bing Xu, Da Zheng
-*/
+ */
 
 #include "./upsampling-inl.h"
 #include <nnvm/op_attr_types.h>
@@ -32,25 +32,26 @@ namespace mxnet {
 namespace op {
 
 static bool UpSamplingShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape) {
+                            mxnet::ShapeVector* in_shape,
+                            mxnet::ShapeVector* out_shape) {
   const UpSamplingParam& param_ = nnvm::get<UpSamplingParam>(attrs.parsed);
   CHECK_GE(in_shape->size(), 1U);
-  const mxnet::TShape &dshape = (*in_shape)[0];
-  mxnet::TShape oshape = dshape;
+  const mxnet::TShape& dshape = (*in_shape)[0];
+  mxnet::TShape oshape        = dshape;
   if (param_.sample_type == up_enum::kNearest) {
     CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args));
     oshape[1] = 0;
     for (auto& shape : *in_shape) {
-      CHECK_EQ(shape.ndim(), 4U) << \
-        "UpSamplingNearest: Input data should be 4D in (batch, channel, y, x)";
-      int oh = dshape[2]*param_.scale, ow = dshape[3]*param_.scale;
-      CHECK_EQ(oh%shape[2], 0U) << "UpSamplingNearest: input height of " << shape[2] << \
-        "does not divide output height of " << oh;
-      CHECK_EQ(ow%shape[3], 0U) << "UpSamplingNearest: input width of " << shape[3] << \
-        "does not divide output width of " << ow;
+      CHECK_EQ(shape.ndim(), 4U)
+          << "UpSamplingNearest: Input data should be 4D in (batch, channel, y, x)";
+      int oh = dshape[2] * param_.scale, ow = dshape[3] * param_.scale;
+      CHECK_EQ(oh % shape[2], 0U) << "UpSamplingNearest: input height of " << shape[2]
+                                  << "does not divide output height of " << oh;
+      CHECK_EQ(ow % shape[3], 0U) << "UpSamplingNearest: input width of " << shape[3]
+                                  << "does not divide output width of " << ow;
       if (param_.multi_input_mode == up_enum::kSum) {
-        CHECK(oshape[1] == 0 || oshape[1] == shape[1]) << \
-                         "Number of channels must be the same when multi_input_mode==sum";
+        CHECK(oshape[1] == 0 || oshape[1] == shape[1])
+            << "Number of channels must be the same when multi_input_mode==sum";
         oshape[1] = shape[1];
       } else {
         oshape[1] += shape[1];
@@ -58,13 +59,12 @@ static bool UpSamplingShape(const nnvm::NodeAttrs& attrs,
     }
   } else {
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, weight]";
-    CHECK_EQ(dshape.ndim(), 4U) << \
-      "UpSamplingBilinear: Input data should be 4D in (batch, channel, y, x)";
-    if (!shape_is_known(dshape)) return false;
+    CHECK_EQ(dshape.ndim(), 4U)
+        << "UpSamplingBilinear: Input data should be 4D in (batch, channel, y, x)";
+    if (!shape_is_known(dshape))
+      return false;
     int kernel = 2 * param_.scale - param_.scale % 2;
-    SHAPE_ASSIGN_CHECK(*in_shape,
-        up_enum::kWeight,
-        mshadow::Shape4(dshape[1], 1, kernel, kernel));
+    SHAPE_ASSIGN_CHECK(*in_shape, up_enum::kWeight, mshadow::Shape4(dshape[1], 1, kernel, kernel));
     oshape = dshape;
   }
   oshape[2] = dshape[2] * param_.scale;
@@ -88,7 +88,8 @@ static inline std::vector<std::string> ListArguments(const UpSamplingParam& para
 }
 
 static bool UpSamplingType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int> *in_type, std::vector<int> *out_type) {
+                           std::vector<int>* in_type,
+                           std::vector<int>* out_type) {
   const UpSamplingParam& param = nnvm::get<UpSamplingParam>(attrs.parsed);
   CHECK_GE(in_type->size(), 1U);
   int dtype = (*in_type)[0];
@@ -106,7 +107,7 @@ static bool UpSamplingType(const nnvm::NodeAttrs& attrs,
 }
 
 struct UpSamplingGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     const UpSamplingParam& param_ = nnvm::get<UpSamplingParam>(n->attrs.parsed);
@@ -122,7 +123,7 @@ struct UpSamplingGrad {
 DMLC_REGISTER_PARAMETER(UpSamplingParam);
 
 NNVM_REGISTER_OP(UpSampling)
-.describe(R"code(Upsamples the given input data.
+    .describe(R"code(Upsamples the given input data.
 
 Two algorithms (``sample_type``) are available for upsampling:
 
@@ -172,69 +173,80 @@ Example::
                                                                        [2. 4. 4. 4. 4. 2.]
                                                                        [1. 2. 2. 2. 2. 1.]]]]
 )code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const UpSamplingParam& params = nnvm::get<UpSamplingParam>(attrs.parsed);
-  return params.sample_type == up_enum::kNearest ? params.num_args : 2;
-})
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<UpSamplingParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  return ListArguments(nnvm::get<UpSamplingParam>(attrs.parsed));
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-    [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", UpSamplingShape)
-.set_attr<nnvm::FInferType>("FInferType", UpSamplingType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  const UpSamplingParam& param = nnvm::get<UpSamplingParam>(n.parsed);
-  if (param.sample_type == up_enum::kNearest) {
-    return std::vector<ResourceRequest>();
-  } else {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  }
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", UpSamplingCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", UpSamplingGrad{"_backward_UpSampling"})
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("data", "NDArray-or-Symbol[]", "Array of tensors to upsample. "
-              "For bilinear upsampling, there should be 2 inputs - 1 data and 1 weight.")
-.add_arguments(UpSamplingParam::__FIELDS__())
-.set_attr<nnvm::FSetInputVarAttrOnCompose>("FSetInputVarAttrOnCompose",
-    [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
-      if (var->attrs.dict.find("__init__") != var->attrs.dict.end()) return;
-      if (index == 1) {
-        var->attrs.dict["__init__"] = "[\"bilinear\", {}]";
-      }
-    });
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const UpSamplingParam& params = nnvm::get<UpSamplingParam>(attrs.parsed);
+      return params.sample_type == up_enum::kNearest ? params.num_args : 2;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<UpSamplingParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return ListArguments(
+                                           nnvm::get<UpSamplingParam>(attrs.parsed));
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", UpSamplingShape)
+    .set_attr<nnvm::FInferType>("FInferType", UpSamplingType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  const UpSamplingParam& param =
+                                      nnvm::get<UpSamplingParam>(n.parsed);
+                                  if (param.sample_type == up_enum::kNearest) {
+                                    return std::vector<ResourceRequest>();
+                                  } else {
+                                    return std::vector<ResourceRequest>{
+                                        ResourceRequest::kTempSpace};
+                                  }
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", UpSamplingCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", UpSamplingGrad{"_backward_UpSampling"})
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "Array of tensors to upsample. "
+                  "For bilinear upsampling, there should be 2 inputs - 1 data and 1 weight.")
+    .add_arguments(UpSamplingParam::__FIELDS__())
+    .set_attr<nnvm::FSetInputVarAttrOnCompose>(
+        "FSetInputVarAttrOnCompose",
+        [](const nnvm::NodeAttrs& attrs, nnvm::ObjectPtr var, const int index) {
+          if (var->attrs.dict.find("__init__") != var->attrs.dict.end())
+            return;
+          if (index == 1) {
+            var->attrs.dict["__init__"] = "[\"bilinear\", {}]";
+          }
+        });
 
 NNVM_REGISTER_OP(_backward_UpSampling)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const UpSamplingParam& param_ = nnvm::get<UpSamplingParam>(attrs.parsed);
-  if (param_.sample_type != up_enum::kNearest) {
-    return 3;
-  } else {
-    return 1;
-  }
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const UpSamplingParam& params = nnvm::get<UpSamplingParam>(attrs.parsed);
-  return params.sample_type == up_enum::kNearest ? params.num_args : 2;
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  const UpSamplingParam& param = nnvm::get<UpSamplingParam>(n.parsed);
-  if (param.sample_type == up_enum::kNearest) {
-    return std::vector<ResourceRequest>();
-  } else {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  }
-})
-.set_attr_parser(ParamParser<UpSamplingParam>)
-.set_attr<FCompute>("FCompute<cpu>", UpSamplingGradCompute<cpu>);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const UpSamplingParam& param_ = nnvm::get<UpSamplingParam>(attrs.parsed);
+      if (param_.sample_type != up_enum::kNearest) {
+        return 3;
+      } else {
+        return 1;
+      }
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const UpSamplingParam& params = nnvm::get<UpSamplingParam>(attrs.parsed);
+      return params.sample_type == up_enum::kNearest ? params.num_args : 2;
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  const UpSamplingParam& param =
+                                      nnvm::get<UpSamplingParam>(n.parsed);
+                                  if (param.sample_type == up_enum::kNearest) {
+                                    return std::vector<ResourceRequest>();
+                                  } else {
+                                    return std::vector<ResourceRequest>{
+                                        ResourceRequest::kTempSpace};
+                                  }
+                                })
+    .set_attr_parser(ParamParser<UpSamplingParam>)
+    .set_attr<FCompute>("FCompute<cpu>", UpSamplingGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/nn/upsampling.cu b/src/operator/nn/upsampling.cu
index c5ff2fafd64a..8cc181ecdeae 100644
--- a/src/operator/nn/upsampling.cu
+++ b/src/operator/nn/upsampling.cu
@@ -22,7 +22,7 @@
  * \file upsampling_nearest.cc
  * \brief
  * \author Bing Xu, Da Zheng
-*/
+ */
 
 #include "./deconvolution-inl.h"
 #include "./upsampling-inl.h"
@@ -30,11 +30,10 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(UpSampling)
-.set_attr<FCompute>("FCompute<gpu>", UpSamplingCompute<gpu>);
+NNVM_REGISTER_OP(UpSampling).set_attr<FCompute>("FCompute<gpu>", UpSamplingCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_UpSampling)
-.set_attr<FCompute>("FCompute<gpu>", UpSamplingGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UpSamplingGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/npx_control_flow.cc b/src/operator/npx_control_flow.cc
index d57041fb1eb3..a1dd419513e9 100644
--- a/src/operator/npx_control_flow.cc
+++ b/src/operator/npx_control_flow.cc
@@ -37,12 +37,12 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(NPXForeachParam);
 
-class ForeachState: public LoopState {
+class ForeachState : public LoopState {
  public:
   NPXForeachParam params;
   int num_iterations;
 
-  ForeachState(const nnvm::Symbol &g, const NPXForeachParam &params) : LoopState(g, false) {
+  ForeachState(const nnvm::Symbol& g, const NPXForeachParam& params) : LoopState(g, false) {
     this->params = params;
   }
 };
@@ -52,18 +52,18 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
                                 const std::vector<NDArray>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<NDArray>& outputs) {
-  ForeachState &state = state_ptr.get_state<ForeachState>();
+  ForeachState& state           = state_ptr.get_state<ForeachState>();
   const NPXForeachParam& params = state.params;
-  const size_t iter_dim = 0;
-  CHECK_EQ(outputs.size(), (size_t) params.num_outputs);
+  const size_t iter_dim         = 0;
+  CHECK_EQ(outputs.size(), (size_t)params.num_outputs);
   CHECK_GT(params.in_data_locs.ndim(), 0);
-  size_t len = inputs[0].shape()[iter_dim];
+  size_t len           = inputs[0].shape()[iter_dim];
   state.num_iterations = len;
   for (int i = 1; i < params.in_data_locs.ndim(); i++)
     CHECK_EQ(inputs[i].shape()[iter_dim], len);
-  for (size_t i = 0; i < (size_t) params.num_out_data; i++)
+  for (size_t i = 0; i < (size_t)params.num_out_data; i++)
     CHECK_EQ(len, outputs[i].shape()[iter_dim]);
-  for (const auto &arr : outputs)
+  for (const auto& arr : outputs)
     CHECK_EQ(arr.storage_type(), kDefaultStorage)
         << "The for operator doesn't support the sparse format";
 
@@ -73,21 +73,19 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
   // of the subgraph share the same memory.
   std::vector<NDArray> subg_outputs1(outputs.size());
   std::vector<NDArray> subg_outputs2(outputs.size());
-  std::vector<NDArray> *subg_outputs[2]{&subg_outputs1, &subg_outputs2};
+  std::vector<NDArray>* subg_outputs[2]{&subg_outputs1, &subg_outputs2};
   // If the length is an odd number, the last iteration will use the first set
   // of outputs. In this way, we don't need to copy the results from the
   // subgraph to the final outputs of the loop.
   if (len % 2 == 1) {
     for (size_t i = params.num_out_data; i < subg_outputs1.size(); i++) {
       subg_outputs1[i] = outputs[i];
-      subg_outputs2[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true,
-                                 outputs[i].dtype());
+      subg_outputs2[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
     }
   } else {
     // Otherwise, we'll use the second set of outputs.
     for (size_t i = params.num_out_data; i < subg_outputs1.size(); i++) {
-      subg_outputs1[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true,
-                                 outputs[i].dtype());
+      subg_outputs1[i] = NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
       subg_outputs2[i] = outputs[i];
     }
   }
@@ -99,23 +97,23 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
   // The remaining arrays (other than input data and states) only need to be set once.
   for (int j = 0; j < params.remain_locs.ndim(); j++) {
     CHECK_LT(params.remain_locs[j], subg_inputs.size());
-    subg_inputs[params.remain_locs[j]] = inputs[j + params.in_data_locs.ndim()
-        + params.in_state_locs.ndim()];
+    subg_inputs[params.remain_locs[j]] =
+        inputs[j + params.in_data_locs.ndim() + params.in_state_locs.ndim()];
   }
 
   // Here we iterate over the first dimension of the first input array.
   for (size_t i = 0; i < len; i++) {
     // Initialize outputs for the subgraph.
-    std::vector<NDArray> *subg_out_curr = subg_outputs[i % 2];
-    std::vector<NDArray> *subg_out_prev = subg_outputs[(i + 1) % 2];
+    std::vector<NDArray>* subg_out_curr = subg_outputs[i % 2];
+    std::vector<NDArray>* subg_out_prev = subg_outputs[(i + 1) % 2];
     for (int j = 0; j < params.num_out_data; j++)
       (*subg_out_curr)[j] = outputs[j].At(i);
     // When recording for backward computation, we should make sure
     // that output arrays are actually different in each iteration.
     if (ctx.need_grad && i < len - 1) {
       for (size_t j = params.num_out_data; j < subg_out_curr->size(); j++)
-        (*subg_out_curr)[j] = NDArray(outputs[j].shape(), outputs[j].ctx(),
-                                      true, outputs[j].dtype());
+        (*subg_out_curr)[j] =
+            NDArray(outputs[j].shape(), outputs[j].ctx(), true, outputs[j].dtype());
     } else if (ctx.need_grad && i == len - 1) {
       // For the last iteration, we need to write data to the output array
       // directly.
@@ -126,7 +124,7 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
     // Initialize inputs for the subgraph.
     // Get a slice from the input data arrays.
     for (int j = 0; j < params.in_data_locs.ndim(); j++) {
-      size_t loc = params.in_data_locs[j];
+      size_t loc       = params.in_data_locs[j];
       subg_inputs[loc] = inputs[j].At(i);
     }
     // For the rest of the iterations, the states are the outputs
@@ -135,7 +133,7 @@ static void ForeachComputeExCPU(const OpStatePtr& state_ptr,
       for (size_t j = 0; j < params.in_state_locs.ndim(); ++j) {
         CHECK_LT(params.in_state_locs[j], subg_inputs.size());
         for (size_t k = params.num_out_data; k < subg_out_prev->size(); ++k) {
-          if (params.in_state_index[j] == k-params.num_out_data) {
+          if (params.in_state_index[j] == k - params.num_out_data) {
             subg_inputs[params.in_state_locs[j]] = (*subg_out_prev)[k];
             break;
           }
@@ -157,14 +155,14 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
                                     const std::vector<NDArray>& inputs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<NDArray>& outputs) {
-  ForeachState &state = state_ptr.get_state<ForeachState>();
+  ForeachState& state           = state_ptr.get_state<ForeachState>();
   const NPXForeachParam& params = state.params;
-  CHECK_EQ(outputs.size(), (size_t) params.num_args);
+  CHECK_EQ(outputs.size(), (size_t)params.num_args);
   CHECK_GT(params.in_data_locs.ndim(), 0);
-  for (const auto &arr : outputs)
+  for (const auto& arr : outputs)
     CHECK_EQ(arr.storage_type(), kDefaultStorage)
         << "The for operator doesn't support the sparse format";
-  int len = state.num_iterations;
+  int len                = state.num_iterations;
   size_t num_output_data = params.num_out_data;
 
   // In backward computation, we need to run iterations from backwards.
@@ -185,10 +183,10 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
 
   // [remaining vars]
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
-    size_t loc = params.remain_locs[i];
-    size_t orig_loc = i + params.in_data_locs.ndim() + params.in_state_locs.ndim();
+    size_t loc       = params.remain_locs[i];
+    size_t orig_loc  = i + params.in_data_locs.ndim() + params.in_state_locs.ndim();
     subg_igrads[loc] = outputs[orig_loc];
-    subg_req[loc] = req[orig_loc];
+    subg_req[loc]    = req[orig_loc];
   }
 
   for (int iter_num = len - 1; iter_num >= 0; iter_num--) {
@@ -198,21 +196,21 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
       // For the rest of the iterations, we should add graidents to the
       // remaining vars.
       for (int i = 0; i < params.remain_locs.ndim(); i++) {
-        size_t loc = params.remain_locs[i];
+        size_t loc    = params.remain_locs[i];
         subg_req[loc] = kAddTo;
       }
     }
 
     // [data vars]
     for (int i = 0; i < params.in_data_locs.ndim(); i++) {
-      size_t loc = params.in_data_locs[i];
+      size_t loc       = params.in_data_locs[i];
       subg_igrads[loc] = outputs[i].At(iter_num);
-      subg_req[loc] = req[i];
+      subg_req[loc]    = req[i];
     }
     // [loop vars]
     for (int i = 0; i < params.in_state_locs.ndim(); i++) {
-      size_t loc = params.in_state_locs[i];
-      const NDArray &output = outputs[i + params.in_data_locs.ndim()];
+      size_t loc            = params.in_state_locs[i];
+      const NDArray& output = outputs[i + params.in_data_locs.ndim()];
       if (iter_num != 0) {
         // For state gradients, we need to allocate new NDArrays
         // because intermediate state gradients won't be returned to the users.
@@ -243,17 +241,19 @@ static void ForeachGradComputeExCPU(const OpStatePtr& state_ptr,
   state.Cleanup();
 }
 
-template<typename T>
-static void remap(const std::vector<T> &op_in, size_t start,
-                  const mxnet::Tuple<dim_t> &locs, std::vector<T> *subg_in) {
+template <typename T>
+static void remap(const std::vector<T>& op_in,
+                  size_t start,
+                  const mxnet::Tuple<dim_t>& locs,
+                  std::vector<T>* subg_in) {
   auto op_in_it = op_in.begin() + start;
   for (int i = 0; i < locs.ndim(); i++) {
-    dim_t loc = locs[i];
+    dim_t loc        = locs[i];
     subg_in->at(loc) = *(op_in_it + i);
   }
 }
 
-static inline mxnet::TShape SliceFirstDim(const mxnet::TShape &s) {
+static inline mxnet::TShape SliceFirstDim(const mxnet::TShape& s) {
   if (s.ndim() > 1) {
     return mxnet::TShape(s.begin() + 1, s.end());
   } else {
@@ -262,10 +262,10 @@ static inline mxnet::TShape SliceFirstDim(const mxnet::TShape &s) {
 }
 
 static bool ForeachShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_shape,
-                         mxnet::ShapeVector *out_shape) {
+                         mxnet::ShapeVector* in_shape,
+                         mxnet::ShapeVector* out_shape) {
   const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  CHECK_EQ(out_shape->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_shape->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
 
   mxnet::ShapeVector subg_in_shape(in_shape->size());
@@ -278,11 +278,12 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
     subg_in_shape[loc] = SliceFirstDim(in_shape->at(i));
   }
   // state shape
-  remap(*in_shape, params.in_data_locs.ndim(), params.in_state_locs,
-        &subg_in_shape);
+  remap(*in_shape, params.in_data_locs.ndim(), params.in_state_locs, &subg_in_shape);
   // remaining shape
-  remap(*in_shape, params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_in_shape);
+  remap(*in_shape,
+        params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_in_shape);
 
   mxnet::ShapeVector subg_out_shape = *out_shape;
   for (int i = 0; i < params.num_out_data; i++) {
@@ -293,8 +294,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
     subg_out_shape[i] = SliceFirstDim(shape);
   }
 
-  bool infer_success = InferSubgraphShape(*attrs.subgraphs[0],
-                                          &subg_in_shape, &subg_out_shape);
+  bool infer_success = InferSubgraphShape(*attrs.subgraphs[0], &subg_in_shape, &subg_out_shape);
 
   // After inference, we need to move inferred information back to in_shape and
   // out_shape.
@@ -308,7 +308,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
       continue;
 
     auto out = mxnet::TShape(g_out_shape.ndim() + 1, -1);
-    out[0] = len;
+    out[0]   = len;
     for (int i = 1; i < out.ndim(); i++)
       out[i] = g_out_shape[i - 1];
     SHAPE_ASSIGN_CHECK(*out_shape, i, out);
@@ -319,8 +319,8 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
 
   // For the shape of input data.
   for (int i = 0; i < params.in_data_locs.ndim(); i++) {
-    size_t loc = params.in_data_locs[i];
-    const auto &shape = subg_in_shape[loc];
+    size_t loc        = params.in_data_locs[i];
+    const auto& shape = subg_in_shape[loc];
     // If the input data shape isn't inferred, we don't need to propogate the
     // info.
     if (!mxnet::ndim_is_known(shape))
@@ -332,7 +332,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
       SHAPE_ASSIGN_CHECK(*in_shape, i, s);
     } else {
       auto in = mxnet::TShape(shape.ndim() + 1, -1);
-      in[0] = len;
+      in[0]   = len;
       for (int i = 1; i < in.ndim(); i++)
         in[i] = shape[i - 1];
       SHAPE_ASSIGN_CHECK(*in_shape, i, in);
@@ -341,8 +341,7 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
   // For the shape of state.
   for (int i = 0; i < params.in_state_locs.ndim(); i++) {
     size_t loc = params.in_state_locs[i];
-    SHAPE_ASSIGN_CHECK(*in_shape, i + params.in_data_locs.ndim(),
-                       subg_in_shape[loc]);
+    SHAPE_ASSIGN_CHECK(*in_shape, i + params.in_data_locs.ndim(), subg_in_shape[loc]);
   }
   // For the shape of remaining data.
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
@@ -370,15 +369,18 @@ static bool ForeachShape(const nnvm::NodeAttrs& attrs,
 }
 
 static bool ForeachType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_type, std::vector<int> *out_type) {
+                        std::vector<int>* in_type,
+                        std::vector<int>* out_type) {
   const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  CHECK_EQ(out_type->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_type->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
   std::vector<int> subg_in_type(in_type->size(), 0);
   remap(*in_type, 0, params.in_data_locs, &subg_in_type);
   remap(*in_type, params.in_data_locs.ndim(), params.in_state_locs, &subg_in_type);
-  remap(*in_type, params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_in_type);
+  remap(*in_type,
+        params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_in_type);
   bool success = InferSubgraphDataType(*attrs.subgraphs[0], &subg_in_type, out_type);
   for (int i = 0; i < params.in_data_locs.ndim(); i++) {
     size_t loc = params.in_data_locs[i];
@@ -390,8 +392,8 @@ static bool ForeachType(const nnvm::NodeAttrs& attrs,
   }
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
     size_t loc = params.remain_locs[i];
-    TYPE_ASSIGN_CHECK(*in_type, i + params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-                      subg_in_type[loc]);
+    TYPE_ASSIGN_CHECK(
+        *in_type, i + params.in_data_locs.ndim() + params.in_state_locs.ndim(), subg_in_type[loc]);
   }
   return success;
 }
@@ -399,26 +401,27 @@ static bool ForeachType(const nnvm::NodeAttrs& attrs,
 static bool ForeachStorageType(const nnvm::NodeAttrs& attrs,
                                const int dev_mask,
                                DispatchMode* dispatch_mode,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
   std::vector<int> subg_in_attrs(in_attrs->size(), kUndefinedStorage);
   remap(*in_attrs, 0, params.in_data_locs, &subg_in_attrs);
   remap(*in_attrs, params.in_data_locs.ndim(), params.in_state_locs, &subg_in_attrs);
-  remap(*in_attrs, params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_in_attrs);
-  bool success = InferSubgraphStorage(*attrs.subgraphs[0], dev_mask,
-                                      dispatch_mode, &subg_in_attrs, out_attrs);
+  remap(*in_attrs,
+        params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_in_attrs);
+  bool success =
+      InferSubgraphStorage(*attrs.subgraphs[0], dev_mask, dispatch_mode, &subg_in_attrs, out_attrs);
   for (int i = 0; i < params.in_data_locs.ndim(); i++) {
     size_t loc = params.in_data_locs[i];
     STORAGE_TYPE_ASSIGN_CHECK(*in_attrs, i, subg_in_attrs[loc]);
   }
   for (int i = 0; i < params.in_state_locs.ndim(); i++) {
     size_t loc = params.in_state_locs[i];
-    STORAGE_TYPE_ASSIGN_CHECK(*in_attrs, i + params.in_data_locs.ndim(),
-                              subg_in_attrs[loc]);
+    STORAGE_TYPE_ASSIGN_CHECK(*in_attrs, i + params.in_data_locs.ndim(), subg_in_attrs[loc]);
   }
   for (int i = 0; i < params.remain_locs.ndim(); i++) {
     size_t loc = params.remain_locs[i];
@@ -432,28 +435,30 @@ static bool ForeachStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardForeachStorageType(const nnvm::NodeAttrs& attrs,
                                        const int dev_mask,
                                        DispatchMode* dispatch_mode,
-                                       std::vector<int> *in_attrs,
-                                       std::vector<int> *out_attrs) {
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs) {
   const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_args);
-  CHECK_EQ(in_attrs->size(), (size_t) params.num_args + params.num_outputs * 2);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_args);
+  CHECK_EQ(in_attrs->size(), (size_t)params.num_args + params.num_outputs * 2);
   CHECK_EQ(attrs.subgraphs.size(), 1U);
-  CachedOp op(*attrs.subgraphs[0],
-              std::vector<std::pair<std::string, std::string> >());
+  CachedOp op(*attrs.subgraphs[0], std::vector<std::pair<std::string, std::string> >());
   // map the operator inputs to the subgraph inputs.
   std::vector<int> subg_forward_ins(params.num_args, kUndefinedStorage);
   remap(*in_attrs, params.num_outputs, params.in_data_locs, &subg_forward_ins);
-  remap(*in_attrs, params.num_outputs + params.in_data_locs.ndim(),
-        params.in_state_locs, &subg_forward_ins);
-  remap(*in_attrs, params.num_outputs + params.in_data_locs.ndim() + params.in_state_locs.ndim(),
-        params.remain_locs, &subg_forward_ins);
+  remap(*in_attrs,
+        params.num_outputs + params.in_data_locs.ndim(),
+        params.in_state_locs,
+        &subg_forward_ins);
+  remap(*in_attrs,
+        params.num_outputs + params.in_data_locs.ndim() + params.in_state_locs.ndim(),
+        params.remain_locs,
+        &subg_forward_ins);
 
   // Copy backward input storage to backward subgraph input storage.
   std::vector<int> subg_in_attrs = *in_attrs;
   for (size_t i = 0; i < subg_forward_ins.size(); i++)
     subg_in_attrs[i + params.num_outputs] = subg_forward_ins[i];
-  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode,
-                                &subg_in_attrs, out_attrs);
+  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode, &subg_in_attrs, out_attrs);
 }
 
 static OpStatePtr CreateForeachState(const NodeAttrs& attrs,
@@ -464,8 +469,8 @@ static OpStatePtr CreateForeachState(const NodeAttrs& attrs,
   return OpStatePtr::Create<ForeachState>(*attrs.subgraphs[0], params);
 }
 
-static std::vector<nnvm::NodeEntry>
-ForeachGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+static std::vector<nnvm::NodeEntry> ForeachGradient(const nnvm::ObjectPtr& n,
+                                                    const std::vector<nnvm::NodeEntry>& ograds) {
   std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
   for (auto& h : n->inputs) {
     heads.push_back(h);
@@ -475,17 +480,19 @@ ForeachGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& og
     heads.emplace_back(n, i, 0);
   }
 
-  auto p = nnvm::Node::Create();
-  p->attrs.op = nnvm::Op::Get("_backward_npx_foreach");
+  auto p        = nnvm::Node::Create();
+  p->attrs.op   = nnvm::Op::Get("_backward_npx_foreach");
   p->attrs.name = n->attrs.name;
   p->attrs.dict = n->attrs.dict;
-  p->inputs = heads;
+  p->inputs     = heads;
   p->control_deps.emplace_back(n);
   p->attrs.parsed = n->attrs.parsed;
   CHECK_EQ(p->num_inputs(), p->inputs.size())
-    << "Number of inputs to operator " << "_backward_npx_foreach" << " (" << p->num_inputs()
-    << ") does not match the actual number of inputs provided to operator "
-    << n->attrs.name << " (" << p->inputs.size() << ").";
+      << "Number of inputs to operator "
+      << "_backward_npx_foreach"
+      << " (" << p->num_inputs()
+      << ") does not match the actual number of inputs provided to operator " << n->attrs.name
+      << " (" << p->inputs.size() << ").";
 
   std::vector<nnvm::NodeEntry> entries;
   for (uint32_t i = 0; i < p->num_outputs(); ++i)
@@ -497,7 +504,7 @@ ForeachGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& og
 
 DMLC_REGISTER_PARAMETER(NPXWhileLoopParam);
 
-class WhileLoopState: public LoopState {
+class WhileLoopState : public LoopState {
  public:
   NPXWhileLoopParam params;
   size_t n_iterations;  // the actual number of steps taken in this while loop, <= max_iterations
@@ -506,17 +513,17 @@ class WhileLoopState: public LoopState {
   // indicates to which index the output of `func' will be copied to the input of `cond'
   std::vector<int> oi_map;
 
-  WhileLoopState(const NPXWhileLoopParam &params,
-                 const nnvm::Symbol &cond,
-                 const nnvm::Symbol &func) :
-                 LoopState(func),
-                 params(params),
-                 n_iterations(0U),
-                 cond_op(LoopState::MakeSharedOp(cond)),
-                 oi_map(params.func_var_locs.ndim(), -1) {
-    const mxnet::Tuple<dim_t> &func_input_locs = params.func_input_locs;
-    const mxnet::Tuple<dim_t> &func_var_locs = params.func_var_locs;
-    const mxnet::Tuple<dim_t> &cond_input_locs = params.cond_input_locs;
+  WhileLoopState(const NPXWhileLoopParam& params,
+                 const nnvm::Symbol& cond,
+                 const nnvm::Symbol& func)
+      : LoopState(func),
+        params(params),
+        n_iterations(0U),
+        cond_op(LoopState::MakeSharedOp(cond)),
+        oi_map(params.func_var_locs.ndim(), -1) {
+    const mxnet::Tuple<dim_t>& func_input_locs = params.func_input_locs;
+    const mxnet::Tuple<dim_t>& func_var_locs   = params.func_var_locs;
+    const mxnet::Tuple<dim_t>& cond_input_locs = params.cond_input_locs;
     for (int i = 0; i < func_var_locs.ndim(); ++i) {
       dim_t pos_i = func_input_locs[func_var_locs[i]];
       for (int j = 0; j < cond_input_locs.ndim(); ++j) {
@@ -540,20 +547,18 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
   // [0: num_out_data) are outputs at each step.
   // [num_out_data: ) are new_loop_vars
   // TODO(Junru): avoid dynamic NDArray allocation
-  WhileLoopState &state = state_ptr.get_state<WhileLoopState>();
+  WhileLoopState& state           = state_ptr.get_state<WhileLoopState>();
   const NPXWhileLoopParam& params = state.params;
   // a helper function, converting std::vector<NDArray> to std::vector<NDArray*>
-  const auto to_ptr_vec = [](std::vector<NDArray> &in, std::vector<NDArray*> *out) {
+  const auto to_ptr_vec = [](std::vector<NDArray>& in, std::vector<NDArray*>* out) {
     out->clear();
     out->reserve(in.size());
-    std::transform(std::begin(in),
-                   std::end(in),
-                   std::back_inserter(*out),
-                   [](NDArray &a) {return &a;});
+    std::transform(
+        std::begin(in), std::end(in), std::back_inserter(*out), [](NDArray& a) { return &a; });
   };
   // sanity checks
-  CHECK_EQ(inputs.size(), (size_t) params.num_args);
-  CHECK_EQ(outputs.size(), (size_t) params.num_outputs);
+  CHECK_EQ(inputs.size(), (size_t)params.num_args);
+  CHECK_EQ(outputs.size(), (size_t)params.num_outputs);
   CHECK_EQ(outputs.size(), req.size());
   // construct inputs and outputs for cond
   std::vector<NDArray> cond_inputs, cond_outputs = {NDArray()};
@@ -564,7 +569,7 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
   // construct inputs and outputs for func
   std::vector<NDArray> func_inputs, func_outputs(outputs.size());
   extract_by_loc(inputs, params.func_input_locs, &func_inputs);
-  for (size_t &step = state.n_iterations = 0; step < (size_t) params.max_iterations; ++step) {
+  for (size_t& step = state.n_iterations = 0; step < (size_t)params.max_iterations; ++step) {
     CHECK(inputs.size() > 0) << "while loop forward requires at least 1 input";
     Context default_ctx = inputs[0].ctx();
     state.cond_op->Forward(nullptr, cond_input_ptr, cond_output_ptr, default_ctx);
@@ -588,7 +593,7 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
         for (int j = 0; j < step_shape.ndim(); ++j) {
           shape[j + 1] = step_shape[j];
         }
-        const_cast<NDArray &>(outputs[i]).Init(shape);
+        const_cast<NDArray&>(outputs[i]).Init(shape);
       }
     }
     for (int i = 0; i < params.num_out_data; ++i) {
@@ -598,11 +603,11 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
     // func_inputs on the next step:
     // the output (new_loop_vars) will become the new inputs (loop_vars)
     for (size_t i = params.num_out_data; i < outputs.size(); ++i) {
-      int j = params.func_var_locs[i - params.num_out_data];
+      int j   = params.func_var_locs[i - params.num_out_data];
       int loc = -1;
       for (size_t m = 0; m < params.func_input_locs.ndim(); ++m) {
         if (m == j) {
-          loc = params.func_input_locs[m];
+          loc            = params.func_input_locs[m];
           func_inputs[m] = func_outputs[i];
         } else {
           if (params.func_input_locs[m] == loc) {
@@ -613,7 +618,7 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
       int k = state.oi_map[i - params.num_out_data];
       if (k != -1) {
         // I actually don't need to update cond_inputs
-        cond_inputs[k] = func_outputs[i];
+        cond_inputs[k]    = func_outputs[i];
         cond_input_ptr[k] = &func_outputs[i];
       }
     }
@@ -627,17 +632,17 @@ static void WhileLoopComputeExCPU(const OpStatePtr& state_ptr,
   for (size_t i = params.num_out_data; i < outputs.size(); ++i) {
     size_t j = params.func_var_locs[i - params.num_out_data];
     if (!shape_is_known(outputs[i].shape())) {
-      const_cast<NDArray &>(outputs[i]).Init(func_inputs[j].shape());
+      const_cast<NDArray&>(outputs[i]).Init(func_inputs[j].shape());
     }
     mxnet::CopyFromTo(func_inputs[j], &outputs[i]);
   }
   for (int i = 0; i < params.num_out_data; ++i) {
-    const_cast<NDArray &>(outputs[i]).SetShapeFromChunk();
+    const_cast<NDArray&>(outputs[i]).SetShapeFromChunk();
   }
   if (state.n_iterations == 0) {
-    for (const auto & output : outputs) {
+    for (const auto& output : outputs) {
       if (!shape_is_known(output.shape())) {
-        const_cast<NDArray &>(output).ReshapeAndAlloc({1});
+        const_cast<NDArray&>(output).ReshapeAndAlloc({1});
       }
     }
   }
@@ -653,10 +658,10 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
   // where f is the current function,
   // x is the input to the current function,
   // TODO(Junru): avoid dynamic NDArray allocation
-  WhileLoopState &state = state_ptr.get_state<WhileLoopState>();
+  WhileLoopState& state           = state_ptr.get_state<WhileLoopState>();
   const NPXWhileLoopParam& params = state.params;
   // sanity checks
-  CHECK_EQ(_outputs.size(), (size_t) params.num_args);
+  CHECK_EQ(_outputs.size(), (size_t)params.num_args);
   CHECK_EQ(_outputs.size(), _req.size());
   for (auto x : _req) {
     CHECK_NE(x, kWriteInplace);
@@ -680,7 +685,7 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
   // ...
   // (var_locs[-2], var_locs[-1] = params.num_args)
   std::vector<dim_t> var_locs(params.func_var_locs.begin(), params.func_var_locs.end());
-  var_locs.push_back((dim_t) params.num_args);
+  var_locs.push_back((dim_t)params.num_args);
   sort(var_locs.begin(), var_locs.end());
   // vectors for the backward loop
   std::vector<NDArray> ograds(params.num_outputs);
@@ -695,7 +700,7 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
     std::transform(std::begin(inputs),
                    std::begin(inputs) + params.num_out_data,
                    std::begin(ograds),
-                   [step] (const NDArray &a) { return a.At(step); } );
+                   [step](const NDArray& a) { return a.At(step); });
     // igrads[i] =
     //    outputs[i]            (step == 0)
     //    outputs[i]            (step != 0 && i not in loop_var_locs)
@@ -708,21 +713,18 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
     {
       size_t i = 0;
       for (size_t loc : var_locs) {
-        for ( ; i < loc; ++i) {
+        for (; i < loc; ++i) {
           // locs other that var_locs
-          igrads[i] = outputs[i];
-          iter_req[i] = (step + 1 == n_iter || req[i] == kNullOp)
-                      ? req[i]
-                      : kAddTo;
+          igrads[i]   = outputs[i];
+          iter_req[i] = (step + 1 == n_iter || req[i] == kNullOp) ? req[i] : kAddTo;
         }
-        if (i < (size_t) params.num_args) {
+        if (i < (size_t)params.num_args) {
           // a var
           igrads[i] = (step == 0)
-                    ? outputs[i]
-                    : NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
-          iter_req[i] = (step == 0 || req[i] == kNullOp)
-                      ? req[i]
-                      : kWriteTo;
+                          ? outputs[i]
+                          : NDArray(outputs[i].shape(), outputs[i].ctx(), true, outputs[i].dtype());
+
+          iter_req[i] = (step == 0 || req[i] == kNullOp) ? req[i] : kWriteTo;
           ++i;
         } else {
           break;
@@ -732,10 +734,10 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
     state.Backward(step, ograds, iter_req, igrads);
     for (int i = params.num_out_data; i < params.num_outputs; ++i) {
       size_t j = params.func_var_locs[i - params.num_out_data];
-      int loc = -1;
+      int loc  = -1;
       for (size_t m = 0; m < params.func_input_locs.ndim(); ++m) {
         if (m == j) {
-          loc = params.func_input_locs[m];
+          loc       = params.func_input_locs[m];
           ograds[i] = igrads[m];
         } else {
           if (params.func_input_locs[m] == loc) {
@@ -749,24 +751,23 @@ static void WhileLoopGradComputeExCPU(const OpStatePtr& state_ptr,
 }
 
 static bool WhileLoopShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_shape,
-                           mxnet::ShapeVector *out_shape) {
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  CHECK_EQ(out_shape->size(), (size_t) params.num_outputs);
+  CHECK_EQ(out_shape->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
 
   mxnet::ShapeVector subg_in_shape(params.func_input_locs.ndim());
   for (int i = 0; i < params.func_input_locs.ndim(); ++i) {
-    size_t loc = params.func_input_locs[i];
+    size_t loc       = params.func_input_locs[i];
     subg_in_shape[i] = in_shape->at(loc);
   }
   mxnet::ShapeVector subg_out_shape = *out_shape;
-  int num_out_data = params.num_out_data;
-  int num_outputs = params.num_outputs;
+  int num_out_data                  = params.num_out_data;
+  int num_outputs                   = params.num_outputs;
   for (size_t i = num_out_data; i < num_outputs; i++)
-    SHAPE_ASSIGN_CHECK(subg_out_shape, i, (*in_shape)[i-num_out_data]);
-  bool infer_success = InferSubgraphShape(*attrs.subgraphs[1],
-                                          &subg_in_shape, &subg_out_shape);
+    SHAPE_ASSIGN_CHECK(subg_out_shape, i, (*in_shape)[i - num_out_data]);
+  bool infer_success = InferSubgraphShape(*attrs.subgraphs[1], &subg_in_shape, &subg_out_shape);
   for (int i = 0; i < params.num_out_data; i++) {
     // If the output shape isn't inferred, we don't need to propogate the info.
     const auto& g_out_shape = subg_out_shape[i];
@@ -784,18 +785,19 @@ static bool WhileLoopShape(const nnvm::NodeAttrs& attrs,
     SHAPE_ASSIGN_CHECK(*out_shape, i, subg_out_shape[i]);
   if (infer_success) {
     for (size_t i = num_out_data; i < num_outputs; i++)
-      CHECK_EQ((*out_shape)[i], (*in_shape)[i-num_out_data]);
+      CHECK_EQ((*out_shape)[i], (*in_shape)[i - num_out_data]);
   }
   // Check if we have inferred the shapes correctly.
   return infer_success;
 }
 
 static bool WhileLoopType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type, std::vector<int> *out_type) {
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_type_udf;
-  CHECK_EQ(in_type->size(), (size_t) params.num_args);
-  CHECK_EQ(out_type->size(), (size_t) params.num_outputs);
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
+  const NPXWhileLoopParam& params                     = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_type_udf;
+  CHECK_EQ(in_type->size(), (size_t)params.num_args);
+  CHECK_EQ(out_type->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   std::vector<int> cond_in_type;
@@ -816,12 +818,12 @@ static bool WhileLoopType(const nnvm::NodeAttrs& attrs,
 static bool WhileLoopStorageType(const nnvm::NodeAttrs& attrs,
                                  const int dev_mask,
                                  DispatchMode* dispatch_mode,
-                                 std::vector<int> *in_attrs,
-                                 std::vector<int> *out_attrs) {
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_stype_udf;
-  CHECK_EQ(in_attrs->size(), (size_t) params.num_args);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_outputs);
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
+  const NPXWhileLoopParam& params                     = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_stype_udf;
+  CHECK_EQ(in_attrs->size(), (size_t)params.num_args);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   std::vector<int> cond_in_attrs;
@@ -829,16 +831,16 @@ static bool WhileLoopStorageType(const nnvm::NodeAttrs& attrs,
   extract_by_loc(*in_attrs, params.cond_input_locs, &cond_in_attrs);
   extract_by_loc(*in_attrs, params.func_input_locs, &func_in_attrs);
   std::vector<int> cond_out_attrs = {kDefaultStorage};
-  DispatchMode cond_mode = DispatchMode::kUndefined;
-  DispatchMode func_mode = DispatchMode::kUndefined;
-  *dispatch_mode = DispatchMode::kFComputeEx;
+  DispatchMode cond_mode          = DispatchMode::kUndefined;
+  DispatchMode func_mode          = DispatchMode::kUndefined;
+  *dispatch_mode                  = DispatchMode::kFComputeEx;
   CHECK(params.sync_in_out(in_attrs, out_attrs, is_udf));
-  bool succ_0 = InferSubgraphStorage(*attrs.subgraphs[0], dev_mask, \
-                                     &cond_mode, &cond_in_attrs, &cond_out_attrs);
+  bool succ_0 = InferSubgraphStorage(
+      *attrs.subgraphs[0], dev_mask, &cond_mode, &cond_in_attrs, &cond_out_attrs);
   CHECK(params.sync_in_out(in_attrs, out_attrs, is_udf));
   CHECK(sync_in_in(params.cond_input_locs, in_attrs, &cond_in_attrs, is_udf));
-  bool succ_1 = InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, \
-                                     &func_mode, &func_in_attrs, out_attrs);
+  bool succ_1 =
+      InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, &func_mode, &func_in_attrs, out_attrs);
   CHECK(params.sync_in_out(in_attrs, out_attrs, is_udf));
   CHECK(sync_in_in(params.func_input_locs, in_attrs, &func_in_attrs, is_udf));
   return succ_0 && succ_1;
@@ -847,15 +849,14 @@ static bool WhileLoopStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardWhileLoopStorageType(const nnvm::NodeAttrs& attrs,
                                          const int dev_mask,
                                          DispatchMode* dispatch_mode,
-                                         std::vector<int> *in_attrs,
-                                         std::vector<int> *out_attrs) {
+                                         std::vector<int>* in_attrs,
+                                         std::vector<int>* out_attrs) {
   // `cond' is not backwarded, don't check
   const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_args);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_args);
   CHECK_EQ(attrs.subgraphs.size(), 2U);
   CachedOp op(*attrs.subgraphs[1], {});
-  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode,
-                                in_attrs, out_attrs);
+  return op.BackwardStorageType(attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 }
 
 static OpStatePtr CreateWhileLoopState(const NodeAttrs& attrs,
@@ -866,8 +867,8 @@ static OpStatePtr CreateWhileLoopState(const NodeAttrs& attrs,
   return OpStatePtr::Create<WhileLoopState>(params, *attrs.subgraphs[0], *attrs.subgraphs[1]);
 }
 
-static std::vector<nnvm::NodeEntry>
-WhileLoopGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+static std::vector<nnvm::NodeEntry> WhileLoopGradient(const nnvm::ObjectPtr& n,
+                                                      const std::vector<nnvm::NodeEntry>& ograds) {
   std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
   for (auto& h : n->inputs) {
     heads.push_back(h);
@@ -877,17 +878,19 @@ WhileLoopGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>&
     heads.emplace_back(n, i, 0);
   }
 
-  auto p = nnvm::Node::Create();
-  p->attrs.op = nnvm::Op::Get("_backward_npx_while_loop");
+  auto p        = nnvm::Node::Create();
+  p->attrs.op   = nnvm::Op::Get("_backward_npx_while_loop");
   p->attrs.name = n->attrs.name;
   p->attrs.dict = n->attrs.dict;
-  p->inputs = heads;
+  p->inputs     = heads;
   p->control_deps.emplace_back(n);
   p->attrs.parsed = n->attrs.parsed;
   CHECK_EQ(p->num_inputs(), p->inputs.size())
-    << "Number of inputs to operator " << "_backward_npx_while_loop" << " (" << p->num_inputs()
-    << ") does not match the actual number of inputs provided to operator "
-    << n->attrs.name << " (" << p->inputs.size() << ").";
+      << "Number of inputs to operator "
+      << "_backward_npx_while_loop"
+      << " (" << p->num_inputs()
+      << ") does not match the actual number of inputs provided to operator " << n->attrs.name
+      << " (" << p->inputs.size() << ").";
 
   std::vector<nnvm::NodeEntry> entries;
   for (uint32_t i = 0; i < p->num_outputs(); ++i)
@@ -908,15 +911,14 @@ class CondState {
   int branch_selection;  // 1 if then branch; 0 if else branch; -1 if undefined
 
   CondState(NPXCondParam params,
-            const nnvm::Symbol &cond,
-            const nnvm::Symbol &then_sym,
-            const nnvm::Symbol &else_sym):
-            params(std::move(params)),
-            cond_op(LoopState::MakeSharedOp(cond)),
-            then_branch(then_sym),
-            else_branch(else_sym),
-            branch_selection(-1) {
-  }
+            const nnvm::Symbol& cond,
+            const nnvm::Symbol& then_sym,
+            const nnvm::Symbol& else_sym)
+      : params(std::move(params)),
+        cond_op(LoopState::MakeSharedOp(cond)),
+        then_branch(then_sym),
+        else_branch(else_sym),
+        branch_selection(-1) {}
 };
 
 static void CondComputeExCPU(const OpStatePtr& state_ptr,
@@ -929,20 +931,18 @@ static void CondComputeExCPU(const OpStatePtr& state_ptr,
   // The argument `outputs' are output and new_loop_vars
   // [0: num_out_data) are outputs at each step.
   // [num_out_data: ) are new_loop_vars
-  CondState &state = state_ptr.get_state<CondState>();
+  CondState& state           = state_ptr.get_state<CondState>();
   const NPXCondParam& params = state.params;
   // a helper function, converting std::vector<NDArray> to std::vector<NDArray*>
-  const auto to_ptr_vec = [](std::vector<NDArray> &in, std::vector<NDArray*> *out) {
+  const auto to_ptr_vec = [](std::vector<NDArray>& in, std::vector<NDArray*>* out) {
     out->clear();
     out->reserve(in.size());
-    std::transform(std::begin(in),
-                   std::end(in),
-                   std::back_inserter(*out),
-                   [](NDArray &a) {return &a;});
+    std::transform(
+        std::begin(in), std::end(in), std::back_inserter(*out), [](NDArray& a) { return &a; });
   };
   // sanity checks
-  CHECK_EQ(inputs.size(), (size_t) params.num_args);
-  CHECK_EQ(outputs.size(), (size_t) params.num_outputs);
+  CHECK_EQ(inputs.size(), (size_t)params.num_args);
+  CHECK_EQ(outputs.size(), (size_t)params.num_outputs);
   CHECK_EQ(outputs.size(), req.size());
   // construct inputs and outputs for cond
   std::vector<NDArray> cond_inputs;
@@ -952,19 +952,16 @@ static void CondComputeExCPU(const OpStatePtr& state_ptr,
   extract_by_loc(inputs, params.cond_input_locs, &cond_inputs);
   to_ptr_vec(cond_inputs, &cond_input_ptr);
   to_ptr_vec(cond_outputs, &cond_output_ptr);
-  int &branch_selection = state.branch_selection;
+  int& branch_selection = state.branch_selection;
   // run cond
   CHECK(cond_input_ptr.size() > 0) << "condition requires at least 1 input";
   Context default_ctx = cond_inputs[0].ctx();
   state.cond_op->Forward(nullptr, cond_input_ptr, cond_output_ptr, default_ctx);
   branch_selection = as_bool_scalar(*cond_output_ptr[0]);
   // select the right branch
-  const mxnet::Tuple<dim_t> &func_input_locs = branch_selection
-                                            ? params.then_input_locs
-                                            : params.else_input_locs;
-  LoopState &loop_state = branch_selection
-                        ? state.then_branch
-                        : state.else_branch;
+  const mxnet::Tuple<dim_t>& func_input_locs =
+      branch_selection ? params.then_input_locs : params.else_input_locs;
+  LoopState& loop_state = branch_selection ? state.then_branch : state.else_branch;
   // extract inputs for the branch
   std::vector<NDArray> func_inputs;
   extract_by_loc(inputs, func_input_locs, &func_inputs);
@@ -976,20 +973,17 @@ static void CondGradComputeExCPU(const OpStatePtr& state_ptr,
                                  const std::vector<NDArray>& inputs,
                                  const std::vector<OpReqType>& _req,
                                  const std::vector<NDArray>& outputs) {
-  CondState &state = state_ptr.get_state<CondState>();
+  CondState& state           = state_ptr.get_state<CondState>();
   const NPXCondParam& params = state.params;
   // sanity checks
-  CHECK_EQ(outputs.size(), (size_t) params.num_args);
+  CHECK_EQ(outputs.size(), (size_t)params.num_args);
   CHECK_EQ(outputs.size(), _req.size());
   // select the right branch
   int branch_selection = state.branch_selection;
   CHECK_NE(branch_selection, -1);
-  const mxnet::Tuple<dim_t> &func_input_locs = branch_selection
-                                            ? params.then_input_locs
-                                            : params.else_input_locs;
-  LoopState &loop_state = branch_selection
-                        ? state.then_branch
-                        : state.else_branch;
+  const mxnet::Tuple<dim_t>& func_input_locs =
+      branch_selection ? params.then_input_locs : params.else_input_locs;
+  LoopState& loop_state = branch_selection ? state.then_branch : state.else_branch;
   // construct parameters
   std::vector<NDArray> ograds(inputs.begin(), inputs.begin() + params.num_outputs);
   std::vector<OpReqType> req;
@@ -1001,12 +995,12 @@ static void CondGradComputeExCPU(const OpStatePtr& state_ptr,
 }
 
 static bool CondType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_type,
-                     std::vector<int> *out_type) {
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_type_udf;
-  CHECK_EQ(in_type->size(), (size_t) params.num_args);
-  CHECK_EQ(out_type->size(), (size_t) params.num_outputs);
+                     std::vector<int>* in_type,
+                     std::vector<int>* out_type) {
+  const NPXCondParam& params                          = nnvm::get<NPXCondParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_type_udf;
+  CHECK_EQ(in_type->size(), (size_t)params.num_args);
+  CHECK_EQ(out_type->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 3U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   CHECK_EQ(attrs.subgraphs[1]->outputs.size(), attrs.subgraphs[2]->outputs.size());
@@ -1029,12 +1023,12 @@ static bool CondType(const nnvm::NodeAttrs& attrs,
 static bool CondStorageType(const nnvm::NodeAttrs& attrs,
                             const int dev_mask,
                             DispatchMode* dispatch_mode,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  static const std::function<bool(const int &)> is_udf = is_stype_udf;
-  CHECK_EQ(in_attrs->size(), (size_t) params.num_args);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_outputs);
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
+  const NPXCondParam& params                          = nnvm::get<NPXCondParam>(attrs.parsed);
+  static const std::function<bool(const int&)> is_udf = is_stype_udf;
+  CHECK_EQ(in_attrs->size(), (size_t)params.num_args);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_outputs);
   CHECK_EQ(attrs.subgraphs.size(), 3U);
   CHECK_EQ(attrs.subgraphs[0]->outputs.size(), 1U);
   CHECK_EQ(attrs.subgraphs[1]->outputs.size(), attrs.subgraphs[2]->outputs.size());
@@ -1045,18 +1039,18 @@ static bool CondStorageType(const nnvm::NodeAttrs& attrs,
   extract_by_loc(*in_attrs, params.then_input_locs, &then_in_attrs);
   extract_by_loc(*in_attrs, params.else_input_locs, &else_in_attrs);
   std::vector<int> cond_out_attrs = {kDefaultStorage};
-  DispatchMode cond_mode = DispatchMode::kUndefined;
-  DispatchMode then_mode = DispatchMode::kUndefined;
-  DispatchMode else_mode = DispatchMode::kUndefined;
-  *dispatch_mode = DispatchMode::kFComputeEx;
-  bool succ_0 = InferSubgraphStorage(*attrs.subgraphs[0], dev_mask, \
-                                     &cond_mode, &cond_in_attrs, &cond_out_attrs);
+  DispatchMode cond_mode          = DispatchMode::kUndefined;
+  DispatchMode then_mode          = DispatchMode::kUndefined;
+  DispatchMode else_mode          = DispatchMode::kUndefined;
+  *dispatch_mode                  = DispatchMode::kFComputeEx;
+  bool succ_0                     = InferSubgraphStorage(
+      *attrs.subgraphs[0], dev_mask, &cond_mode, &cond_in_attrs, &cond_out_attrs);
   CHECK(sync_in_in(params.cond_input_locs, in_attrs, &cond_in_attrs, is_udf));
-  bool succ_1 = InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, \
-                                     &then_mode, &then_in_attrs, out_attrs);
+  bool succ_1 =
+      InferSubgraphStorage(*attrs.subgraphs[1], dev_mask, &then_mode, &then_in_attrs, out_attrs);
   CHECK(sync_in_in(params.then_input_locs, in_attrs, &then_in_attrs, is_udf));
-  bool succ_2 = InferSubgraphStorage(*attrs.subgraphs[2], dev_mask, \
-                                     &else_mode, &else_in_attrs, out_attrs);
+  bool succ_2 =
+      InferSubgraphStorage(*attrs.subgraphs[2], dev_mask, &else_mode, &else_in_attrs, out_attrs);
   CHECK(sync_in_in(params.else_input_locs, in_attrs, &else_in_attrs, is_udf));
   return succ_0 && succ_1 && succ_2;
 }
@@ -1064,31 +1058,28 @@ static bool CondStorageType(const nnvm::NodeAttrs& attrs,
 static bool BackwardCondStorageType(const nnvm::NodeAttrs& attrs,
                                     const int dev_mask,
                                     DispatchMode* dispatch_mode,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  CHECK_EQ(out_attrs->size(), (size_t) params.num_args);
+  CHECK_EQ(out_attrs->size(), (size_t)params.num_args);
   CHECK_EQ(attrs.subgraphs.size(), 3U);
-  static const std::function<bool(const int &)> is_udf = is_stype_udf;
-  auto sub_pass = [&](const std::shared_ptr<nnvm::Symbol> &subg,
-                      const mxnet::Tuple<dim_t> &input_locs) {
+  static const std::function<bool(const int&)> is_udf = is_stype_udf;
+  auto sub_pass = [&](const std::shared_ptr<nnvm::Symbol>& subg,
+                      const mxnet::Tuple<dim_t>& input_locs) {
     // A. first construct subg_in_attrs
     // need subg_in_attrs as subg_bwd_out (copy), subg_fwd_in (extract), subg_fwd_out (copy)
     std::vector<int> subg_in_attrs;
     size_t num_elts = params.num_outputs * 2 + input_locs.ndim();
     subg_in_attrs.reserve(num_elts);
     // part 1. subg_bwd_out (copy)
-    subg_in_attrs.insert(subg_in_attrs.end(),
-                         in_attrs->begin(),
-                         in_attrs->begin() + params.num_outputs);
+    subg_in_attrs.insert(
+        subg_in_attrs.end(), in_attrs->begin(), in_attrs->begin() + params.num_outputs);
     // part 2. subg_fwd_in (extract)
     std::vector<int> fwd_in(in_attrs->begin() + params.num_outputs,
                             in_attrs->begin() + params.num_outputs + params.num_args);
     std::vector<int> subg_fwd_in;
     extract_by_loc(fwd_in, input_locs, &subg_fwd_in);
-    subg_in_attrs.insert(subg_in_attrs.end(),
-                         subg_fwd_in.begin(),
-                         subg_fwd_in.end());
+    subg_in_attrs.insert(subg_in_attrs.end(), subg_fwd_in.begin(), subg_fwd_in.end());
     // part 3. subg_fwd_out (copy)
     subg_in_attrs.insert(subg_in_attrs.end(),
                          in_attrs->begin() + params.num_outputs + params.num_args,
@@ -1100,12 +1091,12 @@ static bool BackwardCondStorageType(const nnvm::NodeAttrs& attrs,
     extract_by_loc(*out_attrs, input_locs, &subg_out_attrs);
     // then we construct the subgraph and do inference
     CachedOp op(*subg, {});
-    bool ret = op.BackwardStorageType(attrs, dev_mask, dispatch_mode, \
-                                      &subg_in_attrs, &subg_out_attrs);
+    bool ret =
+        op.BackwardStorageType(attrs, dev_mask, dispatch_mode, &subg_in_attrs, &subg_out_attrs);
     CHECK(sync_in_in(input_locs, out_attrs, &subg_out_attrs, is_udf));
     return ret;
   };
-  for (const dim_t &cond_in : params.cond_input_locs) {
+  for (const dim_t& cond_in : params.cond_input_locs) {
     (*out_attrs)[cond_in] = kDefaultStorage;
   }
   bool succ_0 = sub_pass(attrs.subgraphs[1], params.then_input_locs);
@@ -1119,14 +1110,11 @@ static OpStatePtr CreateCondState(const NodeAttrs& attrs,
                                   const std::vector<int>& itype) {
   const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
   return OpStatePtr::Create<CondState>(
-    params,
-    *attrs.subgraphs[0],
-    *attrs.subgraphs[1],
-    *attrs.subgraphs[2]);
+      params, *attrs.subgraphs[0], *attrs.subgraphs[1], *attrs.subgraphs[2]);
 }
 
-static std::vector<nnvm::NodeEntry>
-CondGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+static std::vector<nnvm::NodeEntry> CondGradient(const nnvm::ObjectPtr& n,
+                                                 const std::vector<nnvm::NodeEntry>& ograds) {
   std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
   for (auto& h : n->inputs) {
     heads.push_back(h);
@@ -1136,17 +1124,19 @@ CondGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograd
     heads.emplace_back(n, i, 0);
   }
 
-  auto p = nnvm::Node::Create();
-  p->attrs.op = nnvm::Op::Get("_backward_npx_cond");
+  auto p        = nnvm::Node::Create();
+  p->attrs.op   = nnvm::Op::Get("_backward_npx_cond");
   p->attrs.name = n->attrs.name;
   p->attrs.dict = n->attrs.dict;
-  p->inputs = heads;
+  p->inputs     = heads;
   p->control_deps.emplace_back(n);
   p->attrs.parsed = n->attrs.parsed;
   CHECK_EQ(p->num_inputs(), p->inputs.size())
-    << "Number of inputs to operator " << "_backward_npx_cond" << " (" << p->num_inputs()
-    << ") does not match the actual number of inputs provided to operator "
-    << n->attrs.name << " (" << p->inputs.size() << ").";
+      << "Number of inputs to operator "
+      << "_backward_npx_cond"
+      << " (" << p->num_inputs()
+      << ") does not match the actual number of inputs provided to operator " << n->attrs.name
+      << " (" << p->inputs.size() << ").";
 
   std::vector<nnvm::NodeEntry> entries;
   for (uint32_t i = 0; i < p->num_outputs(); ++i)
@@ -1157,192 +1147,190 @@ CondGradient(const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograd
 }
 
 NNVM_REGISTER_OP(_npx_foreach)
-.add_alias("_npx_foreach")
-.MXNET_DESCRIBE("Run a for loop over an NDArray with user-defined computation")
-.set_attr_parser(ParamParser<NPXForeachParam>)
-.set_attr<FInferStorageType>("FInferStorageType", ForeachStorageType)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  return params.num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.emplace_back("fn");
-  for (int i = 0; i < params.num_args - 1; i++)
-    names.push_back("data" + std::to_string(i));
-  return names;
-})
-.set_attr<nnvm::FInputGraph>("FInputGraph",
-    [](const NodeAttrs& attrs) {
-  return std::vector<uint32_t>{0};
-})
-.set_attr<nnvm::FGradient>("FGradient", ForeachGradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateForeachState)
-.set_attr<mxnet::FInferShape>("FInferShape", ForeachShape)
-.set_attr<nnvm::FInferType>("FInferType", ForeachType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachComputeExCPU)
-// Foreach operator works like an executor. Its code will always run on CPU.
-// So the same code can be registered for both CPU and GPU.
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachComputeExCPU)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("fn", "Symbol", "Input graph.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(NPXForeachParam::__FIELDS__());
+    .add_alias("_npx_foreach")
+    .MXNET_DESCRIBE("Run a for loop over an NDArray with user-defined computation")
+    .set_attr_parser(ParamParser<NPXForeachParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", ForeachStorageType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
+      return params.num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NPXForeachParam& params =
+                                           nnvm::get<NPXForeachParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.emplace_back("fn");
+                                       for (int i = 0; i < params.num_args - 1; i++)
+                                         names.push_back("data" + std::to_string(i));
+                                       return names;
+                                     })
+    .set_attr<nnvm::FInputGraph>("FInputGraph",
+                                 [](const NodeAttrs& attrs) { return std::vector<uint32_t>{0}; })
+    .set_attr<nnvm::FGradient>("FGradient", ForeachGradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateForeachState)
+    .set_attr<mxnet::FInferShape>("FInferShape", ForeachShape)
+    .set_attr<nnvm::FInferType>("FInferType", ForeachType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachComputeExCPU)
+    // Foreach operator works like an executor. Its code will always run on CPU.
+    // So the same code can be registered for both CPU and GPU.
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachComputeExCPU)
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("fn", "Symbol", "Input graph.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(NPXForeachParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npx_foreach)
-.set_num_inputs([](const NodeAttrs& attrs){
-  const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  return params.num_outputs * 2 + params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs){
-  const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardForeachStorageType)
-.set_attr_parser(ParamParser<NPXForeachParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachGradComputeExCPU)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachGradComputeExCPU);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
+      return params.num_outputs * 2 + params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NPXForeachParam& params = nnvm::get<NPXForeachParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardForeachStorageType)
+    .set_attr_parser(ParamParser<NPXForeachParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", ForeachGradComputeExCPU)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", ForeachGradComputeExCPU);
 
 NNVM_REGISTER_OP(_npx_while_loop)
-.add_alias("_npx_while_loop")
-.MXNET_DESCRIBE("Run a while loop over with user-defined condition and computation")
-.set_attr_parser(ParamParser<NPXWhileLoopParam>)
-.set_attr<FInferStorageType>("FInferStorageType", WhileLoopStorageType)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  return params.num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.reserve(params.num_args);
-  names.emplace_back("cond");
-  names.emplace_back("func");
-  for (int i = 2; i < params.num_args; i++)
-    names.push_back("data" + std::to_string(i - 2));
-  return names;
-})
-.set_attr<nnvm::FInputGraph>("FInputGraph",
-    [](const NodeAttrs& attrs) {
-  return std::vector<uint32_t>{0, 1};
-})
-.set_attr<nnvm::FGradient>("FGradient", WhileLoopGradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateWhileLoopState)
-.set_attr<mxnet::FInferShape>("FInferShape", WhileLoopShape)
-.set_attr<nnvm::FInferType>("FInferType", WhileLoopType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopComputeExCPU)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopComputeExCPU)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("cond", "Symbol", "Input graph for the loop condition.")
-.add_argument("func", "Symbol", "Input graph for the loop body.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(NPXWhileLoopParam::__FIELDS__());
+    .add_alias("_npx_while_loop")
+    .MXNET_DESCRIBE("Run a while loop over with user-defined condition and computation")
+    .set_attr_parser(ParamParser<NPXWhileLoopParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", WhileLoopStorageType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+      return params.num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NPXWhileLoopParam& params =
+                                           nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.reserve(params.num_args);
+                                       names.emplace_back("cond");
+                                       names.emplace_back("func");
+                                       for (int i = 2; i < params.num_args; i++)
+                                         names.push_back("data" + std::to_string(i - 2));
+                                       return names;
+                                     })
+    .set_attr<nnvm::FInputGraph>("FInputGraph",
+                                 [](const NodeAttrs& attrs) {
+                                   return std::vector<uint32_t>{0, 1};
+                                 })
+    .set_attr<nnvm::FGradient>("FGradient", WhileLoopGradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateWhileLoopState)
+    .set_attr<mxnet::FInferShape>("FInferShape", WhileLoopShape)
+    .set_attr<nnvm::FInferType>("FInferType", WhileLoopType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopComputeExCPU)
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopComputeExCPU)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("cond", "Symbol", "Input graph for the loop condition.")
+    .add_argument("func", "Symbol", "Input graph for the loop body.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(NPXWhileLoopParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npx_while_loop)
-.set_num_inputs([](const NodeAttrs& attrs){
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  return params.num_outputs * 2 + params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs){
-  const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardWhileLoopStorageType)
-.set_attr_parser(ParamParser<NPXWhileLoopParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopGradComputeExCPU)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopGradComputeExCPU);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+      return params.num_outputs * 2 + params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NPXWhileLoopParam& params = nnvm::get<NPXWhileLoopParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardWhileLoopStorageType)
+    .set_attr_parser(ParamParser<NPXWhileLoopParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", WhileLoopGradComputeExCPU)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", WhileLoopGradComputeExCPU);
 
 NNVM_REGISTER_OP(_npx_cond)
-.add_alias("_npx_cond")
-.MXNET_DESCRIBE("Run a if-then-else using user-defined condition and computation")
-.set_attr_parser(ParamParser<NPXCondParam>)
-.set_attr<FInferStorageType>("FInferStorageType", CondStorageType)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  return params.num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  std::vector<std::string> names;
-  names.reserve(params.num_args);
-  names.emplace_back("cond");
-  names.emplace_back("then_branch");
-  names.emplace_back("else_branch");
-  for (int i = 3; i < params.num_args; ++i)
-    names.push_back("data" + std::to_string(i - 3));
-  return names;
-})
-.set_attr<nnvm::FInputGraph>("FInputGraph",
-    [](const NodeAttrs& attrs) {
-  return std::vector<uint32_t>{0, 1, 2};
-})
-.set_attr<nnvm::FGradient>("FGradient", CondGradient)
-.set_attr<FCreateOpState>("FCreateOpState", CreateCondState)
-.set_attr<nnvm::FInferType>("FInferType", CondType)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondComputeExCPU)
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondComputeExCPU)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("cond", "Symbol", "Input graph for the condition.")
-.add_argument("then_branch", "Symbol", "Input graph for the then branch.")
-.add_argument("else_branch", "Symbol", "Input graph for the else branch.")
-.add_argument("data", "NDArray-or-Symbol[]",
-              "The input arrays that include data arrays and states.")
-.add_arguments(NPXCondParam::__FIELDS__());
+    .add_alias("_npx_cond")
+    .MXNET_DESCRIBE("Run a if-then-else using user-defined condition and computation")
+    .set_attr_parser(ParamParser<NPXCondParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", CondStorageType)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
+      return params.num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NPXCondParam& params =
+                                           nnvm::get<NPXCondParam>(attrs.parsed);
+                                       std::vector<std::string> names;
+                                       names.reserve(params.num_args);
+                                       names.emplace_back("cond");
+                                       names.emplace_back("then_branch");
+                                       names.emplace_back("else_branch");
+                                       for (int i = 3; i < params.num_args; ++i)
+                                         names.push_back("data" + std::to_string(i - 3));
+                                       return names;
+                                     })
+    .set_attr<nnvm::FInputGraph>("FInputGraph",
+                                 [](const NodeAttrs& attrs) {
+                                   return std::vector<uint32_t>{0, 1, 2};
+                                 })
+    .set_attr<nnvm::FGradient>("FGradient", CondGradient)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateCondState)
+    .set_attr<nnvm::FInferType>("FInferType", CondType)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondComputeExCPU)
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondComputeExCPU)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("cond", "Symbol", "Input graph for the condition.")
+    .add_argument("then_branch", "Symbol", "Input graph for the then branch.")
+    .add_argument("else_branch", "Symbol", "Input graph for the else branch.")
+    .add_argument("data",
+                  "NDArray-or-Symbol[]",
+                  "The input arrays that include data arrays and states.")
+    .add_arguments(NPXCondParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npx_cond)
-.set_num_inputs([](const NodeAttrs& attrs){
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  return params.num_outputs * 2 + params.num_args;
-})
-.set_num_outputs([](const NodeAttrs& attrs){
-  const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr<FExecType>("FExecType", [](const NodeAttrs& attrs) {
-  return ExecType::kSubgraphExec;
-})
-.set_attr<FInferStorageType>("FInferStorageType", BackwardCondStorageType)
-.set_attr_parser(ParamParser<NPXCondParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondGradComputeExCPU)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondGradComputeExCPU);
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
+      return params.num_outputs * 2 + params.num_args;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NPXCondParam& params = nnvm::get<NPXCondParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr<FExecType>("FExecType",
+                         [](const NodeAttrs& attrs) { return ExecType::kSubgraphExec; })
+    .set_attr<FInferStorageType>("FInferStorageType", BackwardCondStorageType)
+    .set_attr_parser(ParamParser<NPXCondParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", CondGradComputeExCPU)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<gpu>", CondGradComputeExCPU);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/npx_control_flow.h b/src/operator/npx_control_flow.h
index 8adc08a810bf..9227819fccea 100644
--- a/src/operator/npx_control_flow.h
+++ b/src/operator/npx_control_flow.h
@@ -43,24 +43,17 @@ struct NPXForeachParam : public dmlc::Parameter<NPXForeachParam> {
   // The index mapping from out_states to in_states.
   mxnet::Tuple<dim_t> in_state_index;
   DMLC_DECLARE_PARAMETER(NPXForeachParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs.");
-    DMLC_DECLARE_FIELD(num_outputs)
-    .describe("The number of outputs of the subgraph.");
-    DMLC_DECLARE_FIELD(num_out_data)
-    .describe("The number of output data of the subgraph.");
-    DMLC_DECLARE_FIELD(in_state_locs)
-    .describe("The locations of loop states among the inputs.");
-    DMLC_DECLARE_FIELD(in_data_locs)
-    .describe("The locations of input data among the inputs.");
-    DMLC_DECLARE_FIELD(remain_locs)
-    .describe("The locations of remaining data among the inputs.");
-    DMLC_DECLARE_FIELD(in_state_index)
-    .describe("The index mapping from out_states to in_states.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs.");
+    DMLC_DECLARE_FIELD(num_outputs).describe("The number of outputs of the subgraph.");
+    DMLC_DECLARE_FIELD(num_out_data).describe("The number of output data of the subgraph.");
+    DMLC_DECLARE_FIELD(in_state_locs).describe("The locations of loop states among the inputs.");
+    DMLC_DECLARE_FIELD(in_data_locs).describe("The locations of input data among the inputs.");
+    DMLC_DECLARE_FIELD(remain_locs).describe("The locations of remaining data among the inputs.");
+    DMLC_DECLARE_FIELD(in_state_index).describe("The index mapping from out_states to in_states.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream num_args_s, num_outputs_s, num_out_data_s, in_state_locs_s,
-                       in_data_locs_s, remain_locs_s, in_state_index_s;
+    std::ostringstream num_args_s, num_outputs_s, num_out_data_s, in_state_locs_s, in_data_locs_s,
+        remain_locs_s, in_state_index_s;
     num_args_s << num_args;
     num_outputs_s << num_outputs;
     num_out_data_s << num_out_data;
@@ -84,24 +77,24 @@ struct NPXWhileLoopParam : public dmlc::Parameter<NPXWhileLoopParam> {
   mxnet::Tuple<dim_t> func_input_locs;
   mxnet::Tuple<dim_t> func_var_locs;
   DMLC_DECLARE_PARAMETER(NPXWhileLoopParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2)
-    .describe("Number of input arguments, including cond and func as two symbol inputs.");
-    DMLC_DECLARE_FIELD(num_outputs).set_lower_bound(1)
-    .describe("The number of outputs of the subgraph.");
-    DMLC_DECLARE_FIELD(num_out_data).set_lower_bound(0)
-    .describe("The number of outputs from the function body.");
-    DMLC_DECLARE_FIELD(max_iterations).set_lower_bound(1)
-    .describe("Maximum number of iterations.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(2).describe(
+        "Number of input arguments, including cond and func as two symbol inputs.");
+    DMLC_DECLARE_FIELD(num_outputs)
+        .set_lower_bound(1)
+        .describe("The number of outputs of the subgraph.");
+    DMLC_DECLARE_FIELD(num_out_data)
+        .set_lower_bound(0)
+        .describe("The number of outputs from the function body.");
+    DMLC_DECLARE_FIELD(max_iterations).set_lower_bound(1).describe("Maximum number of iterations.");
     DMLC_DECLARE_FIELD(cond_input_locs)
-    .describe("The locations of cond's inputs in the given inputs.");
+        .describe("The locations of cond's inputs in the given inputs.");
     DMLC_DECLARE_FIELD(func_input_locs)
-    .describe("The locations of func's inputs in the given inputs.");
-    DMLC_DECLARE_FIELD(func_var_locs)
-    .describe("The locations of loop_vars among func's inputs.");
+        .describe("The locations of func's inputs in the given inputs.");
+    DMLC_DECLARE_FIELD(func_var_locs).describe("The locations of loop_vars among func's inputs.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_args_s, num_outputs_s, num_out_data_s, max_iterations_s,
-                       cond_input_locs_s, func_input_locs_s, func_var_locs_s;
+        cond_input_locs_s, func_input_locs_s, func_var_locs_s;
     num_args_s << num_args;
     num_outputs_s << num_outputs;
     num_out_data_s << num_out_data;
@@ -111,13 +104,13 @@ struct NPXWhileLoopParam : public dmlc::Parameter<NPXWhileLoopParam> {
     func_var_locs_s << func_var_locs;
   }
   template <typename T>
-  bool sync_in_out(std::vector<T> *in,
-                   std::vector<T> *out,
-                   std::function<bool(const T &)> is_empty) const {
+  bool sync_in_out(std::vector<T>* in,
+                   std::vector<T>* out,
+                   std::function<bool(const T&)> is_empty) const {
     for (int i = this->num_out_data; i < this->num_outputs; ++i) {
       // each out->at(i) is a params, loop_var
-      T &x = in->at(this->func_input_locs[this->func_var_locs[i - this->num_out_data]]);
-      T &y = out->at(i);
+      T& x = in->at(this->func_input_locs[this->func_var_locs[i - this->num_out_data]]);
+      T& y = out->at(i);
       fill_value(&x, &y, is_empty(x), is_empty(y));
     }
     return true;
@@ -131,20 +124,21 @@ struct NPXCondParam : public dmlc::Parameter<NPXCondParam> {
   mxnet::Tuple<dim_t> then_input_locs;
   mxnet::Tuple<dim_t> else_input_locs;
   DMLC_DECLARE_PARAMETER(NPXCondParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(3)
-    .describe("Number of input arguments, including cond, then and else as three symbol inputs.");
-    DMLC_DECLARE_FIELD(num_outputs).set_lower_bound(1)
-    .describe("The number of outputs of the subgraph.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(3).describe(
+        "Number of input arguments, including cond, then and else as three symbol inputs.");
+    DMLC_DECLARE_FIELD(num_outputs)
+        .set_lower_bound(1)
+        .describe("The number of outputs of the subgraph.");
     DMLC_DECLARE_FIELD(cond_input_locs)
-    .describe("The locations of cond's inputs in the given inputs.");
+        .describe("The locations of cond's inputs in the given inputs.");
     DMLC_DECLARE_FIELD(then_input_locs)
-    .describe("The locations of then's inputs in the given inputs.");
+        .describe("The locations of then's inputs in the given inputs.");
     DMLC_DECLARE_FIELD(else_input_locs)
-    .describe("The locations of else's inputs in the given inputs.");
+        .describe("The locations of else's inputs in the given inputs.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream num_args_s, num_outputs_s,
-                       cond_input_locs_s, then_input_locs_s, else_input_locs_s;
+    std::ostringstream num_args_s, num_outputs_s, cond_input_locs_s, then_input_locs_s,
+        else_input_locs_s;
     num_args_s << num_args;
     num_outputs_s << num_outputs;
     cond_input_locs_s << cond_input_locs;
diff --git a/src/operator/numpy/linalg/broadcast_reduce_customized-inl.h b/src/operator/numpy/linalg/broadcast_reduce_customized-inl.h
index 2941d54fb56c..db25eac7a262 100644
--- a/src/operator/numpy/linalg/broadcast_reduce_customized-inl.h
+++ b/src/operator/numpy/linalg/broadcast_reduce_customized-inl.h
@@ -31,19 +31,24 @@ namespace mxnet {
 namespace op {
 namespace broadcast {
 using namespace mshadow;
-using mxnet_op::unravel;
-using mxnet_op::ravel;
 using mxnet_op::dot;
+using mxnet_op::ravel;
+using mxnet_op::unravel;
 using mxnet_op::unravel_dot;
 
-template<typename Reducer, int ndim, typename AType, typename DType, typename OType, typename OP>
-MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx, const size_t M, const bool addto,
-                                          const DType* __restrict big, OType *small,
-                                          const Shape<ndim>& bshape, const Shape<ndim>& sshape,
-                                          const Shape<ndim>& rshape, const Shape<ndim>& rstride,
+template <typename Reducer, int ndim, typename AType, typename DType, typename OType, typename OP>
+MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx,
+                                          const size_t M,
+                                          const bool addto,
+                                          const DType* __restrict big,
+                                          OType* small,
+                                          const Shape<ndim>& bshape,
+                                          const Shape<ndim>& sshape,
+                                          const Shape<ndim>& rshape,
+                                          const Shape<ndim>& rstride,
                                           Reducer* reducer) {
   Shape<ndim> coord = unravel(idx, sshape);
-  index_t j = ravel(coord, bshape);
+  index_t j         = ravel(coord, bshape);
   AType val, residual;
   reducer->SetInitValue(val, residual);
   for (size_t k = 0; k < M; ++k) {
@@ -54,58 +59,88 @@ MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx, const size_t M, con
   assign(&small[idx], addto, OType(val));
 }
 
-template<typename Reducer, int ndim, typename AType, typename DType, typename OType, typename OP>
-void seq_reduce_compute_wr(const size_t N, const size_t M, const bool addto,
-                           const DType *big, OType *small, const Shape<ndim> bshape,
-                           const Shape<ndim> sshape, const Shape<ndim> rshape,
+template <typename Reducer, int ndim, typename AType, typename DType, typename OType, typename OP>
+void seq_reduce_compute_wr(const size_t N,
+                           const size_t M,
+                           const bool addto,
+                           const DType* big,
+                           OType* small,
+                           const Shape<ndim> bshape,
+                           const Shape<ndim> sshape,
+                           const Shape<ndim> rshape,
                            const Shape<ndim> rstride,
                            Reducer* reducer) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t idx = 0; idx < static_cast<index_t>(N); ++idx) {
-    seq_reduce_assign_wr<Reducer, ndim, AType, DType, OType, OP>(idx, M, addto, big, small,
-        bshape, sshape, rshape, rstride, reducer);
+    seq_reduce_assign_wr<Reducer, ndim, AType, DType, OType, OP>(
+        idx, M, addto, big, small, bshape, sshape, rshape, rstride, reducer);
   }
 }
 
 template <typename Reducer, int ndim, typename DType, typename OP, bool safe_acc = false>
-void ReduceWithReducer(Stream<cpu>* s, const TBlob& small, const OpReqType req,
-                       const Tensor<cpu, 1, char>& workspace, const TBlob& big,
+void ReduceWithReducer(Stream<cpu>* s,
+                       const TBlob& small,
+                       const OpReqType req,
+                       const Tensor<cpu, 1, char>& workspace,
+                       const TBlob& big,
                        Reducer* reducer) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   Shape<ndim> rshape, rstride;
   diff(small.shape_.get<ndim>(), big.shape_.get<ndim>(), &rshape, &rstride);
   size_t N = small.shape_.Size(), M = rshape.Size();
   if (!safe_acc) {
-    seq_reduce_compute_wr<Reducer, ndim, DType, DType, DType, OP>(
-      N, M, req == kAddTo, big.dptr<DType>(), small.dptr<DType>(),
-      big.shape_.get<ndim>(), small.shape_.get<ndim>(), rshape, rstride, reducer);
+    seq_reduce_compute_wr<Reducer, ndim, DType, DType, DType, OP>(N,
+                                                                  M,
+                                                                  req == kAddTo,
+                                                                  big.dptr<DType>(),
+                                                                  small.dptr<DType>(),
+                                                                  big.shape_.get<ndim>(),
+                                                                  small.shape_.get<ndim>(),
+                                                                  rshape,
+                                                                  rstride,
+                                                                  reducer);
   } else {
     MXNET_ACC_TYPE_SWITCH(mshadow::DataType<DType>::kFlag, DataType, AType, {
       typedef typename std::conditional<safe_acc, AType, DataType>::type AccType;
       MSHADOW_TYPE_SWITCH_WITH_BOOL(small.type_flag_, OType, {
         typedef typename std::conditional<safe_acc, OType, DataType>::type OutType;
         seq_reduce_compute_wr<Reducer, ndim, AccType, DataType, OutType, OP>(
-          N, M, req == kAddTo, big.dptr<DataType>(), small.dptr<OutType>(),
-          big.shape_.get<ndim>(), small.shape_.get<ndim>(), rshape, rstride, reducer);
+            N,
+            M,
+            req == kAddTo,
+            big.dptr<DataType>(),
+            small.dptr<OutType>(),
+            big.shape_.get<ndim>(),
+            small.shape_.get<ndim>(),
+            rshape,
+            rstride,
+            reducer);
       });
     });
   }
 }
 
-template<typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
-MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx, const size_t M, const bool addto,
-                                          const DType* __restrict big, const DType* __restrict lhs,
-                                          const DType* __restrict rhs, DType *small,
+template <typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
+MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx,
+                                          const size_t M,
+                                          const bool addto,
+                                          const DType* __restrict big,
+                                          const DType* __restrict lhs,
+                                          const DType* __restrict rhs,
+                                          DType* small,
                                           const Shape<ndim>& big_shape,
                                           const Shape<ndim>& lhs_shape0,
                                           const Shape<ndim>& rhs_shape0,
-                                          const Shape<ndim>& small_shape, const Shape<ndim>& rshape,
+                                          const Shape<ndim>& small_shape,
+                                          const Shape<ndim>& rshape,
                                           const Shape<ndim>& lhs_shape,
                                           const Shape<ndim>& rhs_shape,
-                                          const Shape<ndim>& rstride, const Shape<ndim>& lhs_stride,
+                                          const Shape<ndim>& rstride,
+                                          const Shape<ndim>& lhs_stride,
                                           const Shape<ndim>& rhs_stride,
                                           Reducer* reducer) {
-  Shape<ndim> coord = unravel(idx, small_shape);
+  Shape<ndim> coord      = unravel(idx, small_shape);
   const index_t idx_big0 = ravel(coord, big_shape);
   const index_t idx_lhs0 = ravel(coord, lhs_shape0);
   const index_t idx_rhs0 = ravel(coord, rhs_shape0);
@@ -113,13 +148,13 @@ MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx, const size_t M, con
   reducer->SetInitValue(val, residual);
   for (size_t k = 0; k < M; ++k) {
     Shape<ndim> coord_big = unravel(k, rshape);
-    index_t idx_big = idx_big0 + dot(coord_big, rstride);
+    index_t idx_big       = idx_big0 + dot(coord_big, rstride);
 
     Shape<ndim> coord_lhs = unravel(k, lhs_shape);
-    index_t idx_lhs = idx_lhs0 + dot(coord_lhs, lhs_stride);
+    index_t idx_lhs       = idx_lhs0 + dot(coord_lhs, lhs_stride);
 
     Shape<ndim> coord_rhs = unravel(k, rhs_shape);
-    index_t idx_rhs = idx_rhs0 + dot(coord_rhs, rhs_stride);
+    index_t idx_rhs       = idx_rhs0 + dot(coord_rhs, rhs_stride);
 
     reducer->Reduce(val, OP1::Map(big[idx_big], OP2::Map(lhs[idx_lhs], rhs[idx_rhs])), residual);
   }
@@ -127,28 +162,59 @@ MSHADOW_XINLINE void seq_reduce_assign_wr(const index_t idx, const size_t M, con
   assign(&small[idx], addto, val);
 }
 
-template<typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
-void seq_reduce_compute_wr(const size_t N, const size_t M, const bool addto,
-                           const DType *big, const DType *lhs, const DType *rhs, DType *small,
-                           const Shape<ndim> big_shape, const Shape<ndim> small_shape,
-                           const Shape<ndim> rshape, const Shape<ndim> rstride,
-                           const Shape<ndim> lhs_shape, const Shape<ndim> lhs_stride,
-                           const Shape<ndim> rhs_shape, const Shape<ndim> rhs_stride,
-                           const Shape<ndim>& lhs_shape0, const Shape<ndim>& rhs_shape0,
+template <typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
+void seq_reduce_compute_wr(const size_t N,
+                           const size_t M,
+                           const bool addto,
+                           const DType* big,
+                           const DType* lhs,
+                           const DType* rhs,
+                           DType* small,
+                           const Shape<ndim> big_shape,
+                           const Shape<ndim> small_shape,
+                           const Shape<ndim> rshape,
+                           const Shape<ndim> rstride,
+                           const Shape<ndim> lhs_shape,
+                           const Shape<ndim> lhs_stride,
+                           const Shape<ndim> rhs_shape,
+                           const Shape<ndim> rhs_stride,
+                           const Shape<ndim>& lhs_shape0,
+                           const Shape<ndim>& rhs_shape0,
                            Reducer* reducer) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t idx = 0; idx < static_cast<index_t>(N); ++idx) {
-    seq_reduce_assign_wr<Reducer, ndim, DType, OP1, OP2>(idx, M, addto, big, lhs, rhs, small,
-      big_shape, lhs_shape0, rhs_shape0, small_shape, rshape, lhs_shape, rhs_shape, rstride,
-      lhs_stride, rhs_stride, reducer);
+    seq_reduce_assign_wr<Reducer, ndim, DType, OP1, OP2>(idx,
+                                                         M,
+                                                         addto,
+                                                         big,
+                                                         lhs,
+                                                         rhs,
+                                                         small,
+                                                         big_shape,
+                                                         lhs_shape0,
+                                                         rhs_shape0,
+                                                         small_shape,
+                                                         rshape,
+                                                         lhs_shape,
+                                                         rhs_shape,
+                                                         rstride,
+                                                         lhs_stride,
+                                                         rhs_stride,
+                                                         reducer);
   }
 }
 
-template<typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
-void ReduceWithReducer(Stream<cpu> *s, const TBlob& small, const OpReqType req,
-                       const Tensor<cpu, 1, char>& workspace, const TBlob& big, const TBlob& lhs,
-                       const TBlob& rhs, Reducer* reducer) {
-  if (req == kNullOp) return;
+template <typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
+void ReduceWithReducer(Stream<cpu>* s,
+                       const TBlob& small,
+                       const OpReqType req,
+                       const Tensor<cpu, 1, char>& workspace,
+                       const TBlob& big,
+                       const TBlob& lhs,
+                       const TBlob& rhs,
+                       Reducer* reducer) {
+  if (req == kNullOp)
+    return;
   Shape<ndim> rshape, rstride;
   diff(small.shape_.get<ndim>(), big.shape_.get<ndim>(), &rshape, &rstride);
   size_t N = small.shape_.Size();
@@ -160,15 +226,24 @@ void ReduceWithReducer(Stream<cpu> *s, const TBlob& small, const OpReqType req,
   Shape<ndim> rhs_shape, rhs_stride;
   diff(small.shape_.get<ndim>(), rhs.shape_.get<ndim>(), &rhs_shape, &rhs_stride);
 
-  seq_reduce_compute_wr<Reducer, ndim, DType, OP1, OP2>(
-    N, M, req == kAddTo,
-    big.dptr<DType>(), lhs.dptr<DType>(), rhs.dptr<DType>(), small.dptr<DType>(),
-    big.shape_.get<ndim>(), small.shape_.get<ndim>(),
-    rshape, rstride,
-    lhs_shape, lhs_stride,
-    rhs_shape, rhs_stride,
-    lhs.shape_.get<ndim>(), rhs.shape_.get<ndim>(),
-    reducer);
+  seq_reduce_compute_wr<Reducer, ndim, DType, OP1, OP2>(N,
+                                                        M,
+                                                        req == kAddTo,
+                                                        big.dptr<DType>(),
+                                                        lhs.dptr<DType>(),
+                                                        rhs.dptr<DType>(),
+                                                        small.dptr<DType>(),
+                                                        big.shape_.get<ndim>(),
+                                                        small.shape_.get<ndim>(),
+                                                        rshape,
+                                                        rstride,
+                                                        lhs_shape,
+                                                        lhs_stride,
+                                                        rhs_shape,
+                                                        rhs_stride,
+                                                        lhs.shape_.get<ndim>(),
+                                                        rhs.shape_.get<ndim>(),
+                                                        reducer);
 }
 
 }  // namespace broadcast
diff --git a/src/operator/numpy/linalg/broadcast_reduce_op_customized.h b/src/operator/numpy/linalg/broadcast_reduce_op_customized.h
index 976991f30f88..af3f6120f68d 100644
--- a/src/operator/numpy/linalg/broadcast_reduce_op_customized.h
+++ b/src/operator/numpy/linalg/broadcast_reduce_op_customized.h
@@ -32,8 +32,7 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu, typename Reducer, bool safe_acc,
-         typename OP = op::mshadow_op::identity>
+template <typename xpu, typename Reducer, bool safe_acc, typename OP = op::mshadow_op::identity>
 void ReduceAxesComputeImplWithReducer(const OpContext& ctx,
                                       const std::vector<TBlob>& inputs,
                                       const std::vector<OpReqType>& req,
@@ -45,13 +44,13 @@ void ReduceAxesComputeImplWithReducer(const OpContext& ctx,
 
   mxnet::TShape src_shape, dst_shape;
   BroadcastReduceShapeCompact(inputs[0].shape_, small, &src_shape, &dst_shape);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
-    const TBlob in_data = inputs[0].reshape(src_shape);
+    const TBlob in_data  = inputs[0].reshape(src_shape);
     const TBlob out_data = outputs[0].reshape(dst_shape);
     BROADCAST_NDIM_SWITCH(dst_shape.ndim(), NDim, {
-      size_t workspace_size = broadcast::ReduceWorkspaceSize(
-          s, out_data.shape_, req[0], in_data.shape_);
+      size_t workspace_size =
+          broadcast::ReduceWorkspaceSize(s, out_data.shape_, req[0], in_data.shape_);
       Tensor<xpu, 1, char> workspace =
           ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
       broadcast::ReduceWithReducer<Reducer, NDim, OType, OP, safe_acc>(
@@ -61,23 +60,23 @@ void ReduceAxesComputeImplWithReducer(const OpContext& ctx,
   });
 }
 
-template<int req, typename Mapper>
+template <int req, typename Mapper>
 struct reduce_axes_backward_broadcast_wm {
-  template<typename DType, typename OType>
+  template <typename DType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  DType *data,
-                                  OType *out,
-                                  DType *igrad,
-                                  OType *ograd,
+                                  DType* data,
+                                  OType* out,
+                                  DType* igrad,
+                                  OType* ograd,
                                   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape,
                                   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape,
                                   const uint32_t ndim,
                                   Mapper* OP = nullptr) {
-    size_t in_stride = 1;
+    size_t in_stride  = 1;
     size_t out_stride = 1;
-    index_t idx = i;
-    index_t out_idx = i;
-    bool need_clean = !OP;
+    index_t idx       = i;
+    index_t out_idx   = i;
+    bool need_clean   = !OP;
     for (int iter = ndim - 1; iter >= 0; --iter) {
       size_t dim_idx = idx % in_shape[iter];
       out_idx -= dim_idx * in_stride;
@@ -96,9 +95,9 @@ struct reduce_axes_backward_broadcast_wm {
   }
 };
 
-template<typename xpu, typename Mapper, bool normalize = false>
+template <typename xpu, typename Mapper, bool normalize = false>
 void ReduceAxesBackwardUseInOutImplWithMapper(const OpContext& ctx,
-                                              const mxnet::TShape &small,
+                                              const mxnet::TShape& small,
                                               const std::vector<TBlob>& inputs,
                                               const std::vector<OpReqType>& req,
                                               const std::vector<TBlob>& outputs,
@@ -109,7 +108,7 @@ void ReduceAxesBackwardUseInOutImplWithMapper(const OpContext& ctx,
 
   mxnet::TShape src_shape, dst_shape;
   BroadcastReduceShapeCompact(outputs[0].shape_, small, &src_shape, &dst_shape);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
@@ -117,44 +116,60 @@ void ReduceAxesBackwardUseInOutImplWithMapper(const OpContext& ctx,
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape;
       for (int i = 0; i < MXNET_SPECIAL_MAX_NDIM; ++i) {
         if (i < dst_shape.ndim()) {
-          in_shape[i] = src_shape[i];
+          in_shape[i]  = src_shape[i];
           out_shape[i] = dst_shape[i];
         } else {
-          in_shape[i] = 1;
+          in_shape[i]  = 1;
           out_shape[i] = 1;
         }
       }
       if (dst_shape.ndim() == 2) {
         Tensor<xpu, 2, OType> igrad =
-          outputs[0].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
+            outputs[0].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
         Tensor<xpu, 2, DType> ograd =
-          inputs[0].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
-        Tensor<xpu, 2, OType> data =
-          inputs[1].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
-        Tensor<xpu, 2, DType> out =
-          inputs[2].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
+            inputs[0].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
+        Tensor<xpu, 2, OType> data = inputs[1].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
+        Tensor<xpu, 2, DType> out  = inputs[2].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
         MXNET_REQ_TYPE_SWITCH(req[0], Req, {
           Kernel<reduce_axes_backward_broadcast_wm<Req, Mapper>, xpu>::Launch(
-            s, outputs[0].shape_.Size(), data.dptr_, out.dptr_, igrad.dptr_, ograd.dptr_,
-            in_shape, out_shape, src_shape.ndim(), OP);
+              s,
+              outputs[0].shape_.Size(),
+              data.dptr_,
+              out.dptr_,
+              igrad.dptr_,
+              ograd.dptr_,
+              in_shape,
+              out_shape,
+              src_shape.ndim(),
+              OP);
         });
-        if (normalize) igrad /= scalar<OType>(src_shape.Size()/dst_shape.Size());
+        if (normalize)
+          igrad /= scalar<OType>(src_shape.Size() / dst_shape.Size());
       } else {
         const int ndim = MXNET_SPECIAL_MAX_NDIM;
         Tensor<xpu, ndim, OType> igrad =
-          outputs[0].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
+            outputs[0].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
         Tensor<xpu, ndim, DType> ograd =
-          inputs[0].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
+            inputs[0].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
         Tensor<xpu, ndim, OType> data =
-          inputs[1].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
+            inputs[1].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
         Tensor<xpu, ndim, DType> out =
-          inputs[2].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
+            inputs[2].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
         MXNET_REQ_TYPE_SWITCH(req[0], Req, {
           Kernel<reduce_axes_backward_broadcast_wm<Req, Mapper>, xpu>::Launch(
-            s, outputs[0].shape_.Size(), data.dptr_, out.dptr_, igrad.dptr_, ograd.dptr_,
-            in_shape, out_shape, src_shape.ndim(), OP);
+              s,
+              outputs[0].shape_.Size(),
+              data.dptr_,
+              out.dptr_,
+              igrad.dptr_,
+              ograd.dptr_,
+              in_shape,
+              out_shape,
+              src_shape.ndim(),
+              OP);
         });
-        if (normalize) igrad /= scalar<OType>(src_shape.Size()/dst_shape.Size());
+        if (normalize)
+          igrad /= scalar<OType>(src_shape.Size() / dst_shape.Size());
       }
     });
   });
diff --git a/src/operator/numpy/linalg/np_eig-inl.h b/src/operator/numpy/linalg/np_eig-inl.h
index 602d70e7d2e6..d10aee300ad8 100644
--- a/src/operator/numpy/linalg/np_eig-inl.h
+++ b/src/operator/numpy/linalg/np_eig-inl.h
@@ -34,11 +34,15 @@ namespace op {
 
 using namespace mshadow;
 
-template<int req>
+template <int req>
 struct eigvec_assign_helper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, DType *out_data,
-                                  const int nrow, const int ld, const int step) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* in_data,
+                                  DType* out_data,
+                                  const int nrow,
+                                  const int ld,
+                                  const int step) {
     int idx = i / step, row = (i % step) / ld, col = (i % step) % ld;
     KERNEL_ASSIGN(out_data[idx * step + row + col * ld], req, in_data[i]);
   }
@@ -48,19 +52,23 @@ struct eigvec_assign_helper {
 // The dimension of the array WORK in LAPACKE_#GEEV should >= max(1,3*N), and
 // if JOBVL = 'V' or JOBVR = 'V', LWORK >= 4*N.
 // For good performance, LWORK must generally be larger.
-template<typename xpu>
+template <typename xpu>
 size_t EigForwardWorkspaceSize(const TBlob& a,
                                const TBlob& w,
                                const TBlob& v,
                                const std::vector<OpReqType>& req) {
-  if (kNullOp == req[0] && kNullOp == req[1]) { return 0U; }
+  if (kNullOp == req[0] && kNullOp == req[1]) {
+    return 0U;
+  }
 
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, DType, {
     size_t work_space_size = 0;
-    size_t n = a.size(a.ndim() - 1);
+    size_t n               = a.size(a.ndim() - 1);
     work_space_size += a.Size();      // For matrix.
     work_space_size += 2 * w.Size();  // For eigenvalues' real and image component.
     work_space_size += n * n;         // For left eigenvectors temp memory
@@ -73,42 +81,42 @@ size_t EigForwardWorkspaceSize(const TBlob& a,
   return 0U;
 }
 
-template<typename xpu>
+template <typename xpu>
 void EigOpForwardImpl(const TBlob& a,
                       const TBlob& w,
                       const TBlob& v,
                       const std::vector<OpReqType>& req,
-                      std::vector<char> *workspace,
-                      mshadow::Stream<xpu> *s) {
-  if (kNullOp == req[0] && kNullOp == req[1]) { return; }
+                      std::vector<char>* workspace,
+                      mshadow::Stream<xpu>* s) {
+  if (kNullOp == req[0] && kNullOp == req[1]) {
+    return;
+  }
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& w_shape = w.shape_;
   const mxnet::TShape& v_shape = v.shape_;
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim             = a_shape.ndim();
 
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, DType, {
-    const int N = a_shape[a_ndim - 1];
-    DType *a_ptr =
-      reinterpret_cast<DType*>(workspace->data());
-    DType *wr_ptr =
-      reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
-    DType *wi_ptr =
-      reinterpret_cast<DType*>(workspace->data() + (w.Size() + a.Size()) * sizeof(DType));
-    DType *vl_ptr =
-      reinterpret_cast<DType*>(workspace->data() + (2 * w.Size() + a.Size()) * sizeof(DType));
-    DType *vr_ptr =
-      reinterpret_cast<DType*>(
-        workspace->data() + (2 * w.Size() + N * N + a.Size()) * sizeof(DType));
-    DType *work_ptr =
-      reinterpret_cast<DType*>(
+    const int N   = a_shape[a_ndim - 1];
+    DType* a_ptr  = reinterpret_cast<DType*>(workspace->data());
+    DType* wr_ptr = reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
+    DType* wi_ptr =
+        reinterpret_cast<DType*>(workspace->data() + (w.Size() + a.Size()) * sizeof(DType));
+    DType* vl_ptr =
+        reinterpret_cast<DType*>(workspace->data() + (2 * w.Size() + a.Size()) * sizeof(DType));
+    DType* vr_ptr   = reinterpret_cast<DType*>(workspace->data() +
+                                             (2 * w.Size() + N * N + a.Size()) * sizeof(DType));
+    DType* work_ptr = reinterpret_cast<DType*>(
         workspace->data() + (2 * w.Size() + v.Size() + N * N + a.Size()) * sizeof(DType));
     MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
       // Cast type and transpose.
       mxnet_op::Kernel<SolveTypeTransposeHelper, xpu>::Launch(
-        s, a_shape.Size(), a.dptr<AType>(), a_ptr, N, N, N * N);
+          s, a_shape.Size(), a.dptr<AType>(), a_ptr, N, N, N * N);
     });
     char jobvl = 'N', jobvr = 'V';
     mxnet::TBlob a_trans_data(a_ptr, a_shape, a.dev_mask(), a.dev_id());
@@ -117,7 +125,8 @@ void EigOpForwardImpl(const TBlob& a,
     mxnet::TBlob vl_data(vl_ptr, Shape3(1, N, N), v.dev_mask(), v.dev_id());
     mxnet::TBlob vr_data(vr_ptr, v_shape, v.dev_mask(), v.dev_id());
     mxnet::TBlob work_data(work_ptr, Shape1(4 * N), a.dev_mask(), a.dev_id());
-    eig_eigvals::op(jobvl, jobvr,
+    eig_eigvals::op(jobvl,
+                    jobvr,
                     a_trans_data.FlatToKD<xpu, 3, DType>(s),
                     wr_data.FlatToKD<xpu, 2, DType>(s),
                     wi_data.FlatToKD<xpu, 2, DType>(s),
@@ -125,21 +134,20 @@ void EigOpForwardImpl(const TBlob& a,
                     vr_data.FlatToKD<xpu, 3, DType>(s),
                     work_data.get<xpu, 1, DType>(s));
     for (size_t i = 0; i < wi_data.Size(); ++i) {
-      CHECK_LE(fabs(wi_ptr[i]), 1e-15)
-        << "Complex eigvals is unsupported in linalg temporary.";
+      CHECK_LE(fabs(wi_ptr[i]), 1e-15) << "Complex eigvals is unsupported in linalg temporary.";
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       mxnet_op::Kernel<eigvals_assign_helper<req_type>, xpu>::Launch(
-        s, w.Size(), wr_ptr, w.dptr<DType>());
+          s, w.Size(), wr_ptr, w.dptr<DType>());
     });
     MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
       mxnet_op::Kernel<eigvec_assign_helper<req_type>, xpu>::Launch(
-        s, v.Size(), vr_ptr, v.dptr<DType>(), N, N, N * N);
+          s, v.Size(), vr_ptr, v.dptr<DType>(), N, N, N * N);
     });
   });
 }
 
-template<typename AType, typename WType>
+template <typename AType, typename WType>
 void GpuCallbackCpuImpl(const TBlob& a,
                         const TBlob& w,
                         const TBlob& v,
@@ -150,14 +158,14 @@ void GpuCallbackCpuImpl(const TBlob& a,
                         const OpContext& ctx,
                         const std::vector<OpReqType>& req) {
 #if MXNET_USE_CUDA
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  cudaStream_t stream = Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(),
-                            cudaMemcpyDeviceToHost, stream));
-  CUDA_CALL(cudaMemcpyAsync(w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(),
-                            cudaMemcpyDeviceToHost, stream));
-  CUDA_CALL(cudaMemcpyAsync(v_cp_ptr, v.dptr<WType>(), sizeof(WType) * v.Size(),
-                            cudaMemcpyDeviceToHost, stream));
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  cudaStream_t stream     = Stream<gpu>::GetStream(s);
+  CUDA_CALL(cudaMemcpyAsync(
+      a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(), cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(), cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      v_cp_ptr, v.dptr<WType>(), sizeof(WType) * v.Size(), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   mxnet::TBlob a_data(a_cp_ptr, a.shape_, cpu::kDevMask);
   mxnet::TBlob w_data(w_cp_ptr, w.shape_, cpu::kDevMask);
@@ -165,17 +173,17 @@ void GpuCallbackCpuImpl(const TBlob& a,
   // Op forward implement on cpu.
   EigOpForwardImpl<cpu>(a_data, w_data, v_data, req, workspace, ctx.get_stream<cpu>());
   // Copy back to gpu.
-  CUDA_CALL(cudaMemcpyAsync(w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(),
-                            cudaMemcpyHostToDevice, stream));
-  CUDA_CALL(cudaMemcpyAsync(v.dptr<WType>(), v_cp_ptr, sizeof(WType) * v.Size(),
-                            cudaMemcpyHostToDevice, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(), cudaMemcpyHostToDevice, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      v.dptr<WType>(), v_cp_ptr, sizeof(WType) * v.Size(), cudaMemcpyHostToDevice, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 #else
   LOG(FATAL) << "Please build with USE_CUDA=1 to enable GPU";
 #endif  // MXNET_USE_CUDA
 }
 
-template<typename xpu>
+template <typename xpu>
 void EigOpForward(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
@@ -213,9 +221,8 @@ void EigOpForward(const nnvm::NodeAttrs& attrs,
 struct EighParam : public dmlc::Parameter<EighParam> {
   char UPLO;
   DMLC_DECLARE_PARAMETER(EighParam) {
-    DMLC_DECLARE_FIELD(UPLO)
-    .set_default('L')
-    .describe("Specifies whether the calculation is done with the lower or upper triangular part.");
+    DMLC_DECLARE_FIELD(UPLO).set_default('L').describe(
+        "Specifies whether the calculation is done with the lower or upper triangular part.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream UPLO_s;
@@ -224,7 +231,7 @@ struct EighParam : public dmlc::Parameter<EighParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void EighOpForwardImpl(const TBlob& a,
                        const TBlob& w,
                        const TBlob& v,
@@ -232,47 +239,50 @@ void EighOpForwardImpl(const TBlob& a,
                        const OpContext& ctx,
                        const std::vector<OpReqType>& req,
                        std::vector<char>* workspace) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, DType, {
       const size_t workspace_size = (workspace->size() + sizeof(DType) - 1) / sizeof(DType);
-      DType *a_ptr =
-        reinterpret_cast<DType*>(workspace->data());
-      DType *w_ptr =
-        reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
-      DType *work_ptr =
-        reinterpret_cast<DType*>(workspace->data() + (a.Size() + w.Size()) * sizeof(DType));
+      DType* a_ptr                = reinterpret_cast<DType*>(workspace->data());
+      DType* w_ptr = reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
+      DType* work_ptr =
+          reinterpret_cast<DType*>(workspace->data() + (a.Size() + w.Size()) * sizeof(DType));
       TBlob a_data(a_ptr, a.shape_, a.dev_mask(), a.dev_id());
       TBlob w_data(w_ptr, w.shape_, w.dev_mask(), w.dev_id());
-      TBlob work_data(work_ptr, Shape1(workspace_size - a.Size() - w.Size()),
-                      w.dev_mask(), w.dev_id());
-      Tensor<xpu, 3, DType> A = a_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 2, DType> W = w_data.FlatToKD<xpu, 2, DType>(s);
+      TBlob work_data(
+          work_ptr, Shape1(workspace_size - a.Size() - w.Size()), w.dev_mask(), w.dev_id());
+      Tensor<xpu, 3, DType> A    = a_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 2, DType> W    = w_data.FlatToKD<xpu, 2, DType>(s);
       Tensor<xpu, 1, DType> Work = work_data.get<xpu, 1, DType>(s);
       // Copy used upper triangle part of 'a'.
-      mxnet_op::Kernel<eigh_eigvalsh_helper, xpu>::Launch(s, a.Size(),
-                                                          a.dptr<AType>(), A.dptr_,
-                                                          A.size(1), A.size(2), A.stride_,
-                                                          A.size(1) * A.stride_, UPLO == 'U');
+      mxnet_op::Kernel<eigh_eigvalsh_helper, xpu>::Launch(s,
+                                                          a.Size(),
+                                                          a.dptr<AType>(),
+                                                          A.dptr_,
+                                                          A.size(1),
+                                                          A.size(2),
+                                                          A.stride_,
+                                                          A.size(1) * A.stride_,
+                                                          UPLO == 'U');
       for (index_t i = 0; i < A.size(0); ++i) {
         linalg_syevd(A[i], W[i], Work, s);
       }
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<eigvals_assign_helper<req_type>, xpu>::Launch(
-          s, w.Size(), w_ptr, w.dptr<DType>());
+            s, w.Size(), w_ptr, w.dptr<DType>());
       });
       // Set signs of eigenvectors in a deterministic way
       mxnet_op::Kernel<SyevdEigenVecSigns, xpu>::Launch(
-        s, A.size(0) * A.size(1), A.size(1), A.dptr_, A.stride_);
+          s, A.size(0) * A.size(1), A.size(1), A.dptr_, A.stride_);
       MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
         mxnet_op::Kernel<eigvec_assign_helper<req_type>, xpu>::Launch(
-          s, v.Size(), a_ptr, v.dptr<DType>(), A.size(1), A.stride_, A.size(1) * A.stride_);
+            s, v.Size(), a_ptr, v.dptr<DType>(), A.size(1), A.stride_, A.size(1) * A.stride_);
       });
     });
   });
 }
 
-template<typename AType, typename WType>
+template <typename AType, typename WType>
 void GpuCallbackCpuImpl(const TBlob& a,
                         const TBlob& w,
                         const TBlob& v,
@@ -284,14 +294,14 @@ void GpuCallbackCpuImpl(const TBlob& a,
                         const OpContext& ctx,
                         const std::vector<OpReqType>& req) {
 #if MXNET_USE_CUDA
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  cudaStream_t stream = Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(),
-                            cudaMemcpyDeviceToHost, stream));
-  CUDA_CALL(cudaMemcpyAsync(w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(),
-                            cudaMemcpyDeviceToHost, stream));
-  CUDA_CALL(cudaMemcpyAsync(v_cp_ptr, v.dptr<WType>(), sizeof(WType) * v.Size(),
-                            cudaMemcpyDeviceToHost, stream));
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  cudaStream_t stream     = Stream<gpu>::GetStream(s);
+  CUDA_CALL(cudaMemcpyAsync(
+      a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(), cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(), cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      v_cp_ptr, v.dptr<WType>(), sizeof(WType) * v.Size(), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   mxnet::TBlob a_data(a_cp_ptr, a.shape_, cpu::kDevMask);
   mxnet::TBlob w_data(w_cp_ptr, w.shape_, cpu::kDevMask);
@@ -299,17 +309,17 @@ void GpuCallbackCpuImpl(const TBlob& a,
   // Op forward implement on cpu.
   EighOpForwardImpl<cpu>(a_data, w_data, v_data, UPLO, ctx, req, workspace);
   // Copy back to gpu.
-  CUDA_CALL(cudaMemcpyAsync(w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(),
-                            cudaMemcpyHostToDevice, stream));
-  CUDA_CALL(cudaMemcpyAsync(v.dptr<WType>(), v_cp_ptr, sizeof(WType) * v.Size(),
-                            cudaMemcpyHostToDevice, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(), cudaMemcpyHostToDevice, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      v.dptr<WType>(), v_cp_ptr, sizeof(WType) * v.Size(), cudaMemcpyHostToDevice, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 #else
   LOG(FATAL) << "Please build with USE_CUDA=1 to enable GPU";
 #endif  // MXNET_USE_CUDA
 }
 
-template<typename xpu>
+template <typename xpu>
 void EighOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -318,14 +328,18 @@ void EighOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
-  const TBlob& a = inputs[0];
-  const TBlob& w = outputs[0];
-  const TBlob& v = outputs[1];
+  const TBlob& a  = inputs[0];
+  const TBlob& w  = outputs[0];
+  const TBlob& v  = outputs[1];
   const char UPLO = nnvm::get<EighParam>(attrs.parsed).UPLO;
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   // Calculate workspace size.
   size_t workspace_size = EighEigvalshForwardWorkspaceSize<xpu>(a, w, req, ctx);
diff --git a/src/operator/numpy/linalg/np_eig.cc b/src/operator/numpy/linalg/np_eig.cc
index ab7bfd0b435f..e1e80ba27d10 100644
--- a/src/operator/numpy/linalg/np_eig.cc
+++ b/src/operator/numpy/linalg/np_eig.cc
@@ -30,21 +30,20 @@ namespace op {
 // Inputs: A.
 // Outputs: Eig, EigVec
 bool EigOpShape(const nnvm::NodeAttrs& attrs,
-                mxnet::ShapeVector *in_attrs,
-                mxnet::ShapeVector *out_attrs) {
+                mxnet::ShapeVector* in_attrs,
+                mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
-  const mxnet::TShape& a_shape = (*in_attrs)[0];
-  const mxnet::TShape& eig_shape = (*out_attrs)[0];
+  const mxnet::TShape& a_shape    = (*in_attrs)[0];
+  const mxnet::TShape& eig_shape  = (*out_attrs)[0];
   const mxnet::TShape& eigv_shape = (*out_attrs)[1];
 
   if (shape_is_known(a_shape)) {
     // Forward shape inference.
     const int a_ndim = a_shape.ndim();
-    CHECK_GE(a_ndim, 2)
-      << "Array must be at least two-dimensional";
+    CHECK_GE(a_ndim, 2) << "Array must be at least two-dimensional";
     CHECK_EQ(a_shape[a_ndim - 2], a_shape[a_ndim - 1])
-      << "Input A's last two dimension must be equal";
+        << "Input A's last two dimension must be equal";
 
     // Calculate eig shape.
     std::vector<int> eig_shape_vec(a_ndim - 1, -1);
@@ -58,23 +57,19 @@ bool EigOpShape(const nnvm::NodeAttrs& attrs,
   } else {
     // Backward shape inference.
     if (shape_is_known(eig_shape) && shape_is_known(eigv_shape)) {
-      const int eig_ndim = eig_shape.ndim();
+      const int eig_ndim  = eig_shape.ndim();
       const int eigv_ndim = eigv_shape.ndim();
-      CHECK_GE(eigv_ndim, 2)
-        << "Outputs V must be at least two-dimensional";
+      CHECK_GE(eigv_ndim, 2) << "Outputs V must be at least two-dimensional";
       CHECK_EQ(eigv_shape[eigv_ndim - 2], eigv_shape[eigv_ndim - 1])
-        << "Outputs V's last two dimension must be equal";
-      CHECK_EQ(eig_ndim + 1, eigv_ndim)
-        << "Outputs W, V must satisfy W.ndim == V.ndim - 1";
+          << "Outputs V's last two dimension must be equal";
+      CHECK_EQ(eig_ndim + 1, eigv_ndim) << "Outputs W, V must satisfy W.ndim == V.ndim - 1";
       for (int i = 0; i < eig_ndim; ++i) {
-        CHECK_EQ(eig_shape[i], eigv_shape[i])
-          << "Outputs W, V's shape dismatch";
+        CHECK_EQ(eig_shape[i], eigv_shape[i]) << "Outputs W, V's shape dismatch";
       }
       SHAPE_ASSIGN_CHECK(*in_attrs, 0, eigv_shape);
     } else if (shape_is_known(eig_shape)) {
       const int eig_ndim = eig_shape.ndim();
-      CHECK_GE(eig_ndim, 1)
-        << "Outputs W must be at least one-dimensional";
+      CHECK_GE(eig_ndim, 1) << "Outputs W must be at least one-dimensional";
       std::vector<int> eigv_shape_vec(eig_ndim + 1);
       for (int i = 0; i < eig_ndim; ++i) {
         eigv_shape_vec[i] = eig_shape[i];
@@ -85,10 +80,9 @@ bool EigOpShape(const nnvm::NodeAttrs& attrs,
       SHAPE_ASSIGN_CHECK(*out_attrs, 1, eigv_shape);
     } else {
       const int eigv_ndim = eigv_shape.ndim();
-      CHECK_GE(eigv_ndim, 2)
-        << "Outputs V must be at least two-dimensional";
+      CHECK_GE(eigv_ndim, 2) << "Outputs V must be at least two-dimensional";
       CHECK_EQ(eigv_shape[eigv_ndim - 2], eigv_shape[eigv_ndim - 1])
-        << "Outputs V's last two dimension must be equal";
+          << "Outputs V's last two dimension must be equal";
       std::vector<int> eig_shape_vec(eigv_ndim - 1);
       for (int i = 0; i < eigv_ndim - 1; ++i) {
         eig_shape_vec[i] = eigv_shape[i];
@@ -108,8 +102,7 @@ inline bool EigOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 2U);
   int a_type = in_attrs->at(0);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
   if (mshadow::kFloat32 == a_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
     TYPE_ASSIGN_CHECK(*out_attrs, 1, in_attrs->at(0));
@@ -121,34 +114,36 @@ inline bool EigOpType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_eig)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", EigOpShape)
-.set_attr<nnvm::FInferType>("FInferType", EigOpType)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", EigOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", EigOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", EigOpType)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", EigOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
 
 DMLC_REGISTER_PARAMETER(EighParam);
 
 NNVM_REGISTER_OP(_npi_eigh)
-.set_attr_parser(mxnet::op::ParamParser<EighParam>)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", EigOpShape)
-.set_attr<nnvm::FInferType>("FInferType", EigOpType)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", EighOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of real matrices")
-.add_arguments(EighParam::__FIELDS__());
+    .set_attr_parser(mxnet::op::ParamParser<EighParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", EigOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", EigOpType)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", EighOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of real matrices")
+    .add_arguments(EighParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_eig.cu b/src/operator/numpy/linalg/np_eig.cu
index c0184ad221d5..1f89106bab47 100644
--- a/src/operator/numpy/linalg/np_eig.cu
+++ b/src/operator/numpy/linalg/np_eig.cu
@@ -28,13 +28,11 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_eig)
-.set_attr<FCompute>("FCompute<gpu>", EigOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_eig).set_attr<FCompute>("FCompute<gpu>", EigOpForward<gpu>);
 
 #if MXNET_USE_CUSOLVER == 1
 
-NNVM_REGISTER_OP(_npi_eigh)
-.set_attr<FCompute>("FCompute<gpu>", EighOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_eigh).set_attr<FCompute>("FCompute<gpu>", EighOpForward<gpu>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_eigvals-inl.h b/src/operator/numpy/linalg/np_eigvals-inl.h
index 26b351ac8eab..55ed3e880820 100644
--- a/src/operator/numpy/linalg/np_eigvals-inl.h
+++ b/src/operator/numpy/linalg/np_eigvals-inl.h
@@ -39,33 +39,38 @@ namespace op {
 
 using namespace mshadow;
 
-template<int req>
+template <int req>
 struct eigvals_assign_helper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, const DType* in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i]);
   }
 };
 
 struct eigh_eigvalsh_helper {
-  template<typename InDType, typename OutDType>
-  MSHADOW_XINLINE static void Map(int i, const InDType *in_data, OutDType *out_data,
-                                  const int nrow, const int ncol, const int ld,
-                                  const int step, bool USE_UP) {
+  template <typename InDType, typename OutDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const InDType* in_data,
+                                  OutDType* out_data,
+                                  const int nrow,
+                                  const int ncol,
+                                  const int ld,
+                                  const int step,
+                                  bool USE_UP) {
     int idx = i / step, row = (i % step) / ld, col = (i % step) % ld;
     if (row < nrow && col < ncol) {
       if ((USE_UP && row > col) || (!USE_UP && row < col)) {
         out_data[idx * step + col + row * ld] =
-          static_cast<OutDType>(in_data[idx * step + row + col * ld]);
+            static_cast<OutDType>(in_data[idx * step + row + col * ld]);
       } else {
         out_data[idx * step + col + row * ld] =
-          static_cast<OutDType>(in_data[idx * step + col + row * ld]);
+            static_cast<OutDType>(in_data[idx * step + col + row * ld]);
       }
     }
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_geev(char jobvl,
                  char jobvr,
                  const Tensor<xpu, 2, DType>& a,
@@ -75,49 +80,57 @@ void linalg_geev(char jobvl,
                  const Tensor<xpu, 2, DType>& vr,
                  const Tensor<xpu, 1, DType>& work_array);
 
-#define LINALG_CPU_EIG(fname, DType) \
-template<> inline \
-void linalg_geev<cpu, DType>(char jobvl, \
-                             char jobvr, \
-                             const Tensor<cpu, 2, DType>& a, \
-                             const Tensor<cpu, 1, DType>& wr, \
-                             const Tensor<cpu, 1, DType>& wi, \
-                             const Tensor<cpu, 2, DType>& vl, \
-                             const Tensor<cpu, 2, DType>& vr, \
-                             const Tensor<cpu, 1, DType>& work_array) { \
-  const int n = a.size(1), lda = a.size(0); \
-  const int lwork = work_array.shape_.Size(); \
-  const int ldvl = vl.size(0), ldvr = vr.size(0); \
-  int res(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR, jobvl, jobvr, \
-                               n, a.dptr_, lda, \
-                               wr.dptr_, wi.dptr_, \
-                               vl.dptr_, ldvl, \
-                               vr.dptr_, ldvr, \
-                               work_array.dptr_, lwork)); \
-  CHECK_LE(res, 0) << #fname << "the QR algorithm failed to compute all the" \
-    << "eigenvalues, and no eigenvectors have been computed; elements " \
-    << res + 1 << ":N" << " of WR and WI contain eigenvalues which have converged"; \
-  CHECK_GE(res, 0) << #fname << ": the " << -res \
-    << "-th argument had an illegal value"; \
-}
+#define LINALG_CPU_EIG(fname, DType)                                                       \
+  template <>                                                                              \
+  inline void linalg_geev<cpu, DType>(char jobvl,                                          \
+                                      char jobvr,                                          \
+                                      const Tensor<cpu, 2, DType>& a,                      \
+                                      const Tensor<cpu, 1, DType>& wr,                     \
+                                      const Tensor<cpu, 1, DType>& wi,                     \
+                                      const Tensor<cpu, 2, DType>& vl,                     \
+                                      const Tensor<cpu, 2, DType>& vr,                     \
+                                      const Tensor<cpu, 1, DType>& work_array) {           \
+    const int n = a.size(1), lda = a.size(0);                                              \
+    const int lwork = work_array.shape_.Size();                                            \
+    const int ldvl = vl.size(0), ldvr = vr.size(0);                                        \
+    int res(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR,                                   \
+                                 jobvl,                                                    \
+                                 jobvr,                                                    \
+                                 n,                                                        \
+                                 a.dptr_,                                                  \
+                                 lda,                                                      \
+                                 wr.dptr_,                                                 \
+                                 wi.dptr_,                                                 \
+                                 vl.dptr_,                                                 \
+                                 ldvl,                                                     \
+                                 vr.dptr_,                                                 \
+                                 ldvr,                                                     \
+                                 work_array.dptr_,                                         \
+                                 lwork));                                                  \
+    CHECK_LE(res, 0) << #fname << "the QR algorithm failed to compute all the"             \
+                     << "eigenvalues, and no eigenvectors have been computed; elements "   \
+                     << res + 1 << ":N"                                                    \
+                     << " of WR and WI contain eigenvalues which have converged";          \
+    CHECK_GE(res, 0) << #fname << ": the " << -res << "-th argument had an illegal value"; \
+  }
 
 LINALG_CPU_EIG(sgeev, float)
 LINALG_CPU_EIG(dgeev, double)
 
 #ifdef __CUDACC__
 
-#define LINALG_GPU_EIG(fname, DType) \
-template<> inline \
-void linalg_geev<gpu, DType>(char jobvl, \
-                             char jobvr, \
-                             const Tensor<gpu, 2, DType>& a, \
-                             const Tensor<gpu, 1, DType>& wr, \
-                             const Tensor<gpu, 1, DType>& wi, \
-                             const Tensor<gpu, 2, DType>& vl, \
-                             const Tensor<gpu, 2, DType>& vr, \
-                             const Tensor<gpu, 1, DType>& work_array) { \
-  LOG(FATAL) << "Lapack _geev routines in gpu is unsupported"; \
-}
+#define LINALG_GPU_EIG(fname, DType)                                             \
+  template <>                                                                    \
+  inline void linalg_geev<gpu, DType>(char jobvl,                                \
+                                      char jobvr,                                \
+                                      const Tensor<gpu, 2, DType>& a,            \
+                                      const Tensor<gpu, 1, DType>& wr,           \
+                                      const Tensor<gpu, 1, DType>& wi,           \
+                                      const Tensor<gpu, 2, DType>& vl,           \
+                                      const Tensor<gpu, 2, DType>& vr,           \
+                                      const Tensor<gpu, 1, DType>& work_array) { \
+    LOG(FATAL) << "Lapack _geev routines in gpu is unsupported";                 \
+  }
 
 LINALG_GPU_EIG(sgeev, float)
 LINALG_GPU_EIG(dgeev, double)
@@ -125,7 +138,7 @@ LINALG_GPU_EIG(dgeev, double)
 #endif  // __CUDACC__
 
 struct eig_eigvals {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(char jobvl,
                  char jobvr,
                  const Tensor<xpu, 3, DType>& a,
@@ -135,14 +148,14 @@ struct eig_eigvals {
                  const Tensor<xpu, 3, DType>& vr,
                  const Tensor<xpu, 1, DType>& work_array) {
     const mxnet::TShape& a_shape = a.shape_;
-    const int a_ndim = a_shape.ndim();
+    const int a_ndim             = a_shape.ndim();
     if (jobvl == 'N' && jobvr == 'N') {
       CHECK_GE(work_array.shape_.Size(), 3 * a.shape_[a_ndim - 1])
-        << "The dimension of the array WORK in LAPACKE_#GEEV should >= max(1,3*N).";
+          << "The dimension of the array WORK in LAPACKE_#GEEV should >= max(1,3*N).";
     } else {
       CHECK_GE(work_array.shape_.Size(), 4 * a.shape_[a_ndim - 1])
-        << "If JOBVL = 'V' or JOBVR = 'V', "
-        << "the dimension of the array WORK in LAPACKE_#GEEV should >= 4*N.";
+          << "If JOBVL = 'V' or JOBVR = 'V', "
+          << "the dimension of the array WORK in LAPACKE_#GEEV should >= 4*N.";
     }
     for (int i = 0; i < a_shape[0]; ++i) {
       if (jobvl == 'N' && jobvr == 'N') {
@@ -162,18 +175,22 @@ struct eig_eigvals {
 // The dimension of the array WORK in LAPACKE_#GEEV should >= max(1,3*N), and
 // if JOBVL = 'V' or JOBVR = 'V', LWORK >= 4*N.
 // For good performance, LWORK must generally be larger.
-template<typename xpu>
+template <typename xpu>
 size_t EigvalsForwardWorkspaceSize(const TBlob& a,
                                    const TBlob& w,
                                    const std::vector<OpReqType>& req) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
 
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, DType, {
     size_t work_space_size = 0;
-    size_t n = a.size(a.ndim() - 1);
+    size_t n               = a.size(a.ndim() - 1);
     work_space_size += a.Size();      // For matrix.
     work_space_size += 2 * w.Size();  // For eigenvalues' real and image component.
     work_space_size += 2 * n * n;     // For left and right eigenvectors temp memory
@@ -185,40 +202,40 @@ size_t EigvalsForwardWorkspaceSize(const TBlob& a,
   return 0U;
 }
 
-template<typename xpu>
+template <typename xpu>
 void EigvalsOpForwardImpl(const TBlob& a,
                           const TBlob& w,
                           const std::vector<OpReqType>& req,
-                          std::vector<char> *workspace,
-                          mshadow::Stream<xpu> *s) {
-  if (kNullOp == req[0]) { return; }
+                          std::vector<char>* workspace,
+                          mshadow::Stream<xpu>* s) {
+  if (kNullOp == req[0]) {
+    return;
+  }
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& w_shape = w.shape_;
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim             = a_shape.ndim();
 
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, DType, {
-    const int N = a.size(a_ndim - 1);
-    DType *a_ptr =
-      reinterpret_cast<DType*>(workspace->data());
-    DType *wr_ptr =
-      reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
-    DType *wi_ptr =
-      reinterpret_cast<DType*>(workspace->data() + (w.Size() + a.Size()) * sizeof(DType));
-    DType *vl_ptr =
-      reinterpret_cast<DType*>(workspace->data() + (2 * w.Size() + a.Size()) * sizeof(DType));
-    DType *vr_ptr =
-      reinterpret_cast<DType*>(
-        workspace->data() + (N * N + 2 * w.Size() + a.Size()) * sizeof(DType));
-    DType *work_ptr =
-      reinterpret_cast<DType*>(
-        workspace->data() + (2 * (N * N + w.Size()) + a.Size()) * sizeof(DType));
+    const int N   = a.size(a_ndim - 1);
+    DType* a_ptr  = reinterpret_cast<DType*>(workspace->data());
+    DType* wr_ptr = reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
+    DType* wi_ptr =
+        reinterpret_cast<DType*>(workspace->data() + (w.Size() + a.Size()) * sizeof(DType));
+    DType* vl_ptr =
+        reinterpret_cast<DType*>(workspace->data() + (2 * w.Size() + a.Size()) * sizeof(DType));
+    DType* vr_ptr   = reinterpret_cast<DType*>(workspace->data() +
+                                             (N * N + 2 * w.Size() + a.Size()) * sizeof(DType));
+    DType* work_ptr = reinterpret_cast<DType*>(workspace->data() +
+                                               (2 * (N * N + w.Size()) + a.Size()) * sizeof(DType));
     MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
       // Cast type and transpose.
       mxnet_op::Kernel<SolveTypeTransposeHelper, xpu>::Launch(
-        s, a.Size(), a.dptr<AType>(), a_ptr, N, N, N * N);
+          s, a.Size(), a.dptr<AType>(), a_ptr, N, N, N * N);
     });
     char jobvl = 'N', jobvr = 'N';
     mxnet::TBlob a_trans_data(a_ptr, a_shape, a.dev_mask(), a.dev_id());
@@ -227,7 +244,8 @@ void EigvalsOpForwardImpl(const TBlob& a,
     mxnet::TBlob vl_data(vl_ptr, Shape3(1, N, N), w.dev_mask(), w.dev_id());
     mxnet::TBlob vr_data(vr_ptr, Shape3(1, N, N), w.dev_mask(), w.dev_id());
     mxnet::TBlob work_data(work_ptr, Shape1(3 * N), a.dev_mask(), a.dev_id());
-    eig_eigvals::op(jobvl, jobvr,
+    eig_eigvals::op(jobvl,
+                    jobvr,
                     a_trans_data.FlatToKD<xpu, 3, DType>(s),
                     wr_data.FlatToKD<xpu, 2, DType>(s),
                     wi_data.FlatToKD<xpu, 2, DType>(s),
@@ -235,17 +253,16 @@ void EigvalsOpForwardImpl(const TBlob& a,
                     vr_data.get<xpu, 3, DType>(s),
                     work_data.get<xpu, 1, DType>(s));
     for (size_t i = 0; i < wi_data.Size(); ++i) {
-      CHECK_LE(fabs(wi_ptr[i]), 1e-15)
-        << "Complex eigvals is unsupported in linalg temporary.";
+      CHECK_LE(fabs(wi_ptr[i]), 1e-15) << "Complex eigvals is unsupported in linalg temporary.";
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       mxnet_op::Kernel<eigvals_assign_helper<req_type>, xpu>::Launch(
-        s, w.Size(), wr_ptr, w.dptr<DType>());
+          s, w.Size(), wr_ptr, w.dptr<DType>());
     });
   });
 }
 
-template<typename AType, typename WType>
+template <typename AType, typename WType>
 void GpuCallbackCpuImpl(const TBlob& a,
                         const TBlob& w,
                         AType* a_cp_ptr,
@@ -254,27 +271,27 @@ void GpuCallbackCpuImpl(const TBlob& a,
                         const OpContext& ctx,
                         const std::vector<OpReqType>& req) {
 #if MXNET_USE_CUDA
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  cudaStream_t stream = Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(),
-                            cudaMemcpyDeviceToHost, stream));
-  CUDA_CALL(cudaMemcpyAsync(w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(),
-                            cudaMemcpyDeviceToHost, stream));
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  cudaStream_t stream     = Stream<gpu>::GetStream(s);
+  CUDA_CALL(cudaMemcpyAsync(
+      a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(), cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   mxnet::TBlob a_data(a_cp_ptr, a.shape_, cpu::kDevMask);
   mxnet::TBlob w_data(w_cp_ptr, w.shape_, cpu::kDevMask);
   // Op forward implement on cpu.
   EigvalsOpForwardImpl<cpu>(a_data, w_data, req, workspace, ctx.get_stream<cpu>());
   // Copy back to gpu.
-  CUDA_CALL(cudaMemcpyAsync(w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(),
-                            cudaMemcpyHostToDevice, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(), cudaMemcpyHostToDevice, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 #else
   LOG(FATAL) << "Please build with USE_CUDA=1 to enable GPU";
 #endif  // MXNET_USE_CUDA
 }
 
-template<typename xpu>
+template <typename xpu>
 void EigvalsOpForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -309,9 +326,8 @@ void EigvalsOpForward(const nnvm::NodeAttrs& attrs,
 struct EigvalshParam : public dmlc::Parameter<EigvalshParam> {
   char UPLO;
   DMLC_DECLARE_PARAMETER(EigvalshParam) {
-    DMLC_DECLARE_FIELD(UPLO)
-    .set_default('L')
-    .describe("Specifies whether the calculation is done with the lower or upper triangular part.");
+    DMLC_DECLARE_FIELD(UPLO).set_default('L').describe(
+        "Specifies whether the calculation is done with the lower or upper triangular part.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream UPLO_s;
@@ -320,23 +336,27 @@ struct EigvalshParam : public dmlc::Parameter<EigvalshParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 size_t EighEigvalshForwardWorkspaceSize(const TBlob& a,
                                         const TBlob& w,
                                         const std::vector<OpReqType>& req,
                                         const OpContext& ctx) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
 
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Stream<cpu> *s_cpu = ctx.get_stream<cpu>();
+  Stream<xpu>* s     = ctx.get_stream<xpu>();
+  Stream<cpu>* s_cpu = ctx.get_stream<cpu>();
   MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, WType, {
       Tensor<xpu, 2, AType> a_temp_tensor = a.FlatToKD<xpu, 3, AType>(s)[0];
       Tensor<xpu, 1, WType> w_temp_tensor = w.FlatToKD<xpu, 2, WType>(s)[0];
-      size_t work_space_size = 0;
+      size_t work_space_size              = 0;
       std::vector<WType> A_data(a_temp_tensor.MSize(), 0);
       std::vector<WType> W_data(w_temp_tensor.MSize(), 0);
       TBlob a_data(A_data.data(), a_temp_tensor.shape_, cpu::kDevMask, -1);
@@ -344,9 +364,8 @@ size_t EighEigvalshForwardWorkspaceSize(const TBlob& a,
       work_space_size += a.Size();  // For matrix.
       work_space_size += w.Size();  // For eigenvalues.
       work_space_size +=            // For workspace size in LAPACKE_#SYEVD.
-        linalg_syevd_workspace_query(a_data.get<cpu, 2, WType>(s_cpu),
-                                     w_data.get<cpu, 1, WType>(s_cpu),
-                                     s_cpu);
+          linalg_syevd_workspace_query(
+              a_data.get<cpu, 2, WType>(s_cpu), w_data.get<cpu, 1, WType>(s_cpu), s_cpu);
       return work_space_size * sizeof(WType);
     });
   });
@@ -354,77 +373,80 @@ size_t EighEigvalshForwardWorkspaceSize(const TBlob& a,
   return 0U;
 }
 
-template<typename xpu>
+template <typename xpu>
 void EigvalshOpForwardImpl(const TBlob& a,
                            const TBlob& w,
                            const char& UPLO,
                            const OpContext& ctx,
                            const std::vector<OpReqType>& req,
-                           std::vector<char> *workspace) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+                           std::vector<char>* workspace) {
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(w.type_flag_, DType, {
       const size_t workspace_size = (workspace->size() + sizeof(DType) - 1) / sizeof(DType);
-      DType *a_ptr =
-        reinterpret_cast<DType*>(workspace->data());
-      DType *w_ptr =
-        reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
-      DType *work_ptr =
-        reinterpret_cast<DType*>(workspace->data() + (a.Size() + w.Size()) * sizeof(DType));
+      DType* a_ptr                = reinterpret_cast<DType*>(workspace->data());
+      DType* w_ptr = reinterpret_cast<DType*>(workspace->data() + a.Size() * sizeof(DType));
+      DType* work_ptr =
+          reinterpret_cast<DType*>(workspace->data() + (a.Size() + w.Size()) * sizeof(DType));
       TBlob a_data(a_ptr, a.shape_, a.dev_mask(), a.dev_id());
       TBlob w_data(w_ptr, w.shape_, w.dev_mask(), w.dev_id());
-      TBlob work_data(work_ptr, Shape1(workspace_size - a.Size() - w.Size()),
-                      w.dev_mask(), w.dev_id());
-      Tensor<xpu, 3, DType> A = a_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 2, DType> W = w_data.FlatToKD<xpu, 2, DType>(s);
+      TBlob work_data(
+          work_ptr, Shape1(workspace_size - a.Size() - w.Size()), w.dev_mask(), w.dev_id());
+      Tensor<xpu, 3, DType> A    = a_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 2, DType> W    = w_data.FlatToKD<xpu, 2, DType>(s);
       Tensor<xpu, 1, DType> Work = work_data.get<xpu, 1, DType>(s);
       // Copy used upper triangle part of 'a'.
-      mxnet_op::Kernel<eigh_eigvalsh_helper, xpu>::Launch(s, a.Size(),
-                                                          a.dptr<AType>(), A.dptr_,
-                                                          A.size(1), A.size(2), A.stride_,
-                                                          A.size(1) * A.stride_, UPLO == 'U');
+      mxnet_op::Kernel<eigh_eigvalsh_helper, xpu>::Launch(s,
+                                                          a.Size(),
+                                                          a.dptr<AType>(),
+                                                          A.dptr_,
+                                                          A.size(1),
+                                                          A.size(2),
+                                                          A.stride_,
+                                                          A.size(1) * A.stride_,
+                                                          UPLO == 'U');
       for (index_t i = 0; i < A.size(0); ++i) {
         linalg_syevd(A[i], W[i], Work, s);
       }
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<eigvals_assign_helper<req_type>, xpu>::Launch(
-          s, w.Size(), w_ptr, w.dptr<DType>());
+            s, w.Size(), w_ptr, w.dptr<DType>());
       });
     });
   });
 }
 
-template<typename AType, typename WType>
+template <typename AType, typename WType>
 void GpuCallbackCpuImpl(const TBlob& a,
                         const TBlob& w,
                         const char& UPLO,
                         AType* a_cp_ptr,
                         WType* w_cp_ptr,
-                        std::vector<char> *workspace,
+                        std::vector<char>* workspace,
                         const OpContext& ctx,
                         const std::vector<OpReqType>& req) {
 #if MXNET_USE_CUDA
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  cudaStream_t stream = Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(),
-                            cudaMemcpyDeviceToHost, stream));
-  CUDA_CALL(cudaMemcpyAsync(w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(),
-                            cudaMemcpyDeviceToHost, stream));
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  cudaStream_t stream     = Stream<gpu>::GetStream(s);
+  CUDA_CALL(cudaMemcpyAsync(
+      a_cp_ptr, a.dptr<AType>(), sizeof(AType) * a.Size(), cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w_cp_ptr, w.dptr<WType>(), sizeof(WType) * w.Size(), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   mxnet::TBlob a_data(a_cp_ptr, a.shape_, cpu::kDevMask);
   mxnet::TBlob w_data(w_cp_ptr, w.shape_, cpu::kDevMask);
   // Op forward implement on cpu.
   EigvalshOpForwardImpl<cpu>(a_data, w_data, UPLO, ctx, req, workspace);
   // Copy back to gpu.
-  CUDA_CALL(cudaMemcpyAsync(w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(),
-                            cudaMemcpyHostToDevice, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      w.dptr<WType>(), w_cp_ptr, sizeof(WType) * w.Size(), cudaMemcpyHostToDevice, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 #else
   LOG(FATAL) << "Please build with USE_CUDA=1 to enable GPU";
 #endif  // MXNET_USE_CUDA
 }
 
-template<typename xpu>
+template <typename xpu>
 void EigvalshOpForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -435,11 +457,15 @@ void EigvalshOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req.size(), 1U);
   const TBlob& a = inputs[0];
   const TBlob& w = outputs[0];
-  char UPLO = nnvm::get<EigvalshParam>(attrs.parsed).UPLO;
+  char UPLO      = nnvm::get<EigvalshParam>(attrs.parsed).UPLO;
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   // Calculate workspace size.
   size_t workspace_size = EighEigvalshForwardWorkspaceSize<xpu>(a, w, req, ctx);
diff --git a/src/operator/numpy/linalg/np_eigvals.cc b/src/operator/numpy/linalg/np_eigvals.cc
index 6d5e05e98859..848c35c73fe2 100644
--- a/src/operator/numpy/linalg/np_eigvals.cc
+++ b/src/operator/numpy/linalg/np_eigvals.cc
@@ -30,20 +30,19 @@ namespace op {
 // Inputs: A.
 // Outputs: Eig.
 bool EigvalsOpShape(const nnvm::NodeAttrs& attrs,
-                    mxnet::ShapeVector *in_attrs,
-                    mxnet::ShapeVector *out_attrs) {
+                    mxnet::ShapeVector* in_attrs,
+                    mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const mxnet::TShape& a_shape = (*in_attrs)[0];
+  const mxnet::TShape& a_shape   = (*in_attrs)[0];
   const mxnet::TShape& eig_shape = (*out_attrs)[0];
 
   if (shape_is_known(a_shape)) {
     // Forward shape inference.
     const int a_ndim = a_shape.ndim();
-    CHECK_GE(a_ndim, 2)
-      << "Array must be at least two-dimensional";
+    CHECK_GE(a_ndim, 2) << "Array must be at least two-dimensional";
     CHECK_EQ(a_shape[a_ndim - 2], a_shape[a_ndim - 1])
-      << "Input A's last two dimension must be equal";
+        << "Input A's last two dimension must be equal";
 
     // Calculate eig shape.
     std::vector<int> eig_shape_vec(a_ndim - 1, -1);
@@ -55,8 +54,7 @@ bool EigvalsOpShape(const nnvm::NodeAttrs& attrs,
   } else if (shape_is_known(eig_shape)) {
     // Backward shape inference.
     const int eig_ndim = eig_shape.ndim();
-    CHECK_GE(eig_ndim, 1)
-      << "Outputs W must be at least one-dimensional";
+    CHECK_GE(eig_ndim, 1) << "Outputs W must be at least one-dimensional";
     std::vector<int> a_shape_vec(eig_ndim + 1);
     for (int i = 0; i < eig_ndim; ++i) {
       a_shape_vec[i] = eig_shape[i];
@@ -75,8 +73,7 @@ inline bool EigvalsOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
   int a_type = in_attrs->at(0);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
   if (mshadow::kFloat32 == a_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   } else {
@@ -86,34 +83,36 @@ inline bool EigvalsOpType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_eigvals)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", EigvalsOpShape)
-.set_attr<nnvm::FInferType>("FInferType", EigvalsOpType)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", EigvalsOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", EigvalsOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", EigvalsOpType)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", EigvalsOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
 
 DMLC_REGISTER_PARAMETER(EigvalshParam);
 
 NNVM_REGISTER_OP(_npi_eigvalsh)
-.set_attr_parser(mxnet::op::ParamParser<EigvalshParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", EigvalsOpShape)
-.set_attr<nnvm::FInferType>("FInferType", EigvalsOpType)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", EigvalshOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix")
-.add_arguments(EigvalshParam::__FIELDS__());
+    .set_attr_parser(mxnet::op::ParamParser<EigvalshParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", EigvalsOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", EigvalsOpType)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", EigvalshOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix")
+    .add_arguments(EigvalshParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_eigvals.cu b/src/operator/numpy/linalg/np_eigvals.cu
index 974dedc6172e..dc03805c54d0 100644
--- a/src/operator/numpy/linalg/np_eigvals.cu
+++ b/src/operator/numpy/linalg/np_eigvals.cu
@@ -28,13 +28,11 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_eigvals)
-.set_attr<FCompute>("FCompute<gpu>", EigvalsOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_eigvals).set_attr<FCompute>("FCompute<gpu>", EigvalsOpForward<gpu>);
 
 #if MXNET_USE_CUSOLVER == 1
 
-NNVM_REGISTER_OP(_npi_eigvalsh)
-.set_attr<FCompute>("FCompute<gpu>", EigvalshOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_eigvalsh).set_attr<FCompute>("FCompute<gpu>", EigvalshOpForward<gpu>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_gesvd-inl.h b/src/operator/numpy/linalg/np_gesvd-inl.h
index e19d4f064fb0..80686652a01a 100644
--- a/src/operator/numpy/linalg/np_gesvd-inl.h
+++ b/src/operator/numpy/linalg/np_gesvd-inl.h
@@ -34,9 +34,8 @@ namespace mxnet {
 namespace op {
 
 struct GesvdVecSign {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, int m, int n, DType* UT,
-                                  DType* V, int ldut, int ldv) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, int m, int n, DType* UT, DType* V, int ldut, int ldv) {
     DType* vrow(V + i * ldv);
     DType maxval(fabs(vrow[0])), vval(0.0);
     int maxind(0);
@@ -63,7 +62,7 @@ struct GesvdVecSign {
 // - V can overwrite A
 // - Needs workspace (DType), size of which is determined by a workspace query
 struct gesvd {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& A,
                  const Tensor<xpu, 3, DType>& UT,
                  const Tensor<xpu, 2, DType>& L,
@@ -71,18 +70,17 @@ struct gesvd {
                  const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs,
                  TBlob* workspace = nullptr) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    if (A.dptr_ != V.dptr_) Copy(V, A, s);
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+    if (A.dptr_ != V.dptr_)
+      Copy(V, A, s);
     // From here on, we work on V only
     // Reserve workspace (size determined by query)
     size_t lwork(linalg_gesvd_workspace_query(UT[0], L[0], V[0], s));
     Tensor<xpu, 1, DType> work;
     if (!workspace) {
-      work = ctx.requested[0]
-        .get_space_typed<xpu, 1, DType>(Shape1(lwork), s);
+      work = ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(lwork), s);
     } else {
-      work = workspace
-        ->get_with_shape<xpu, 1, DType>(Shape1(lwork), s);
+      work = workspace->get_with_shape<xpu, 1, DType>(Shape1(lwork), s);
     }
     // Loop over items in batch
     for (index_t i = 0; i < UT.size(0); ++i) {
@@ -90,14 +88,13 @@ struct gesvd {
     }
     // Set signs in a deterministic way
     using namespace mxnet_op;
-    Kernel<GesvdVecSign, xpu>::Launch
-      (s, V.size(0) * V.size(1), V.size(1), V.size(2),
-       UT.dptr_, V.dptr_, UT.stride_, V.stride_);
+    Kernel<GesvdVecSign, xpu>::Launch(
+        s, V.size(0) * V.size(1), V.size(1), V.size(2), UT.dptr_, V.dptr_, UT.stride_, V.stride_);
   }
 };
 
 // (A) => (UT, L, V)
-template<typename xpu, typename laop>
+template <typename xpu, typename laop>
 void NumpyLaGesvdForward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -110,42 +107,44 @@ void NumpyLaGesvdForward(const nnvm::NodeAttrs& attrs,
     return;
   }
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     laop::op(inputs[0].FlatToKD<xpu, 3, OType>(s),
              outputs[0].FlatToKD<xpu, 3, OType>(s),
              outputs[1].FlatToKD<xpu, 2, OType>(s),
-             outputs[2].FlatToKD<xpu, 3, OType>(s), ctx, attrs);
+             outputs[2].FlatToKD<xpu, 3, OType>(s),
+             ctx,
+             attrs);
   });
 }
 
 // Helper for gesvd_backward. See technical report
 // `Auto-Differentiating Linear Algebra` for details
 // on https://arxiv.org/pdf/1710.08717.pdf
-template<typename DType>
+template <typename DType>
 DType gesvd_back_helper_eps(DType* X);
 
-template<>
+template <>
 MSHADOW_XINLINE float gesvd_back_helper_eps(float* X) {
   return 1e-30;
 }
 
-template<>
+template <>
 MSHADOW_XINLINE double gesvd_back_helper_eps(double* X) {
   return 1e-100;
 }
 
 // dA overwritten by L^-1 dA
 struct GesvdBackHelper_dV {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int k, int m, int n, DType* L, int ldl,
-                                  DType* dA, int ldda) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int k, int m, int n, DType* L, int ldl, DType* dA, int ldda) {
     const int offl(k * ldl);
     const int offda(k * m * ldda);
     DType denom(0.0);
     const DType eps(gesvd_back_helper_eps(dA));
     for (int i = 0; i < m; ++i) {
       denom = L[offl + i];
-      if (denom < eps) denom = eps;
+      if (denom < eps)
+        denom = eps;
       for (int j = 0; j < n; ++j) {
         dA[offda + i * ldda + j] /= denom;
       }
@@ -156,9 +155,9 @@ struct GesvdBackHelper_dV {
 // X (square) overwritten by X L
 // Y overwritten by the diagonal of X
 struct GesvdBackHelper_G1 {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int k, int m, int n, DType* X, int ldx,
-                                  DType* L, int ldl, DType* Y, int ldy) {
+  template <typename DType>
+  MSHADOW_XINLINE static void
+  Map(int k, int m, int n, DType* X, int ldx, DType* L, int ldl, DType* Y, int ldy) {
     const int offl(k * ldl);
     const int offy(k * ldy);
     const int offx(k * m * ldx);
@@ -174,10 +173,18 @@ struct GesvdBackHelper_G1 {
 };
 
 struct GesvdBackHelper_G2 {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int k, int m, int n, DType* X, int ldx,
-                                  DType* L, int ldl, DType* dL, int lddl,
-                                  DType* Y, int ldy) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int k,
+                                  int m,
+                                  int n,
+                                  DType* X,
+                                  int ldx,
+                                  DType* L,
+                                  int ldl,
+                                  DType* dL,
+                                  int lddl,
+                                  DType* Y,
+                                  int ldy) {
     const int offx(k * m * ldx);
     const int offl(k * ldl);
     const int offdl(k * lddl);
@@ -189,9 +196,11 @@ struct GesvdBackHelper_G2 {
       for (int j = i + 1; j < m; ++j) {
         denom1 = L[offl + i] - L[offl + j];
         denom2 = L[offl + i] + L[offl + j];
-        if (denom1 < eps) denom1 = eps;
-        if (denom2 < eps) denom2 = eps;
-        elem = (X[offx + i * ldx + j] - X[offx + j * ldx + i]) / denom1 / denom2;
+        if (denom1 < eps)
+          denom1 = eps;
+        if (denom2 < eps)
+          denom2 = eps;
+        elem                  = (X[offx + i * ldx + j] - X[offx + j * ldx + i]) / denom1 / denom2;
         X[offx + i * ldx + j] = elem * L[offl + j];
         X[offx + j * ldx + i] = elem * L[offl + i];
       }
@@ -201,7 +210,7 @@ struct GesvdBackHelper_G2 {
 };
 
 struct gesvd_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dUT,
                  const Tensor<xpu, 2, DType>& dL,
                  const Tensor<xpu, 3, DType>& dV,
@@ -211,7 +220,8 @@ struct gesvd_backward {
                  const Tensor<xpu, 3, DType>& dA,
                  const Tensor<xpu, 3, DType>& tempM,
                  const Tensor<xpu, 2, DType>& tempMd,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of (UT, L, V) = gesvd(A)
     using namespace mxnet_op;
     if (dA.dptr_ != dV.dptr_) {
@@ -222,34 +232,40 @@ struct gesvd_backward {
 
     // Need temporal space, same shape as dUT
     // invdV:
-    Kernel<GesvdBackHelper_dV, xpu>::Launch
-      (s, k, m, n, L.dptr_, L.stride_, dA.dptr_, dA.stride_);
+    Kernel<GesvdBackHelper_dV, xpu>::Launch(s, k, m, n, L.dptr_, L.stride_, dA.dptr_, dA.stride_);
 
     // G1:
     // This is just to make sure there are no invalid values (NaN, infinity) in tempM and tempMd
-    tempM.FlatTo1D() = 0;
+    tempM.FlatTo1D()  = 0;
     tempMd.FlatTo1D() = 0;
     gemm::op(dA, V, tempM, DType(1.0), DType(0.0), false, true, s);
-    Kernel<GesvdBackHelper_G1, xpu>::Launch
-      (s, k, m, n, tempM.dptr_, tempM.stride_,
-       L.dptr_, L.stride_, tempMd.dptr_, tempMd.stride_);
+    Kernel<GesvdBackHelper_G1, xpu>::Launch(
+        s, k, m, n, tempM.dptr_, tempM.stride_, L.dptr_, L.stride_, tempMd.dptr_, tempMd.stride_);
     gemm::op(dUT, UT, tempM, DType(1.0), DType(1.0), true, false, s);
 
     // G2:
-    Kernel<GesvdBackHelper_G2, xpu>::Launch
-      (s, k, m, n, tempM.dptr_, tempM.stride_,
-       L.dptr_, L.stride_, dL.dptr_, dL.stride_,
-       tempMd.dptr_, tempMd.stride_);
+    Kernel<GesvdBackHelper_G2, xpu>::Launch(s,
+                                            k,
+                                            m,
+                                            n,
+                                            tempM.dptr_,
+                                            tempM.stride_,
+                                            L.dptr_,
+                                            L.stride_,
+                                            dL.dptr_,
+                                            dL.stride_,
+                                            tempMd.dptr_,
+                                            tempMd.stride_);
 
     // G3:
     gemm::op(tempM, V, dA, DType(1.0), DType(1.0), false, false, s);
     // dA <- dot(UT, dA). Loop over (k, m, m) blocks to avoid large temporary memory
     for (int i = 0; i < n; i += m) {
       int ncols = n - i < m ? n - i : m;
-      Tensor<xpu, 3, DType> t = Tensor<xpu, 3, DType>(dA.dptr_ + i,
-        Shape3(k, m, ncols), dA.stride_, dA.stream_);
-      Tensor<xpu, 3, DType> out = Tensor<xpu, 3, DType>(tempM.dptr_,
-        Shape3(k, m, ncols), tempM.stride_, tempM.stream_);
+      Tensor<xpu, 3, DType> t =
+          Tensor<xpu, 3, DType>(dA.dptr_ + i, Shape3(k, m, ncols), dA.stride_, dA.stream_);
+      Tensor<xpu, 3, DType> out =
+          Tensor<xpu, 3, DType>(tempM.dptr_, Shape3(k, m, ncols), tempM.stride_, tempM.stream_);
       gemm::op(UT, t, out, DType(1.0), DType(0.0), false, false, s);
       Copy(t, out, s);
     }
@@ -257,14 +273,14 @@ struct gesvd_backward {
 };
 
 // (dUT, dL, dV, UT, L, V) => (dA)
-template<typename xpu, typename laop>
+template <typename xpu, typename laop>
 void NumpyLaGesvdBackward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), 6);
   CHECK_EQ(outputs.size(), 1);
   if (outputs[0].shape_.Size() == 0) {
@@ -275,17 +291,17 @@ void NumpyLaGesvdBackward(const nnvm::NodeAttrs& attrs,
     TBlob tempM, tempMd;
     int kmn = outputs[0].shape_.Size();
     int kmm = inputs[0].shape_.Size();
-    int km = inputs[1].shape_.Size();
+    int km  = inputs[1].shape_.Size();
     if (req[0] == kAddTo) {
-      Tensor<xpu, 1, OType> tempspace = ctx.requested[0]
-        .get_space_typed<xpu, 1, OType>(Shape1(kmn + kmm + km), s);
+      Tensor<xpu, 1, OType> tempspace =
+          ctx.requested[0].get_space_typed<xpu, 1, OType>(Shape1(kmn + kmm + km), s);
       tspace = TBlob(tempspace.Slice(0, kmn)).reshape(outputs[0].shape_);
-      tempM = TBlob(tempspace.Slice(kmn, kmn + kmm)).reshape(inputs[0].shape_);
+      tempM  = TBlob(tempspace.Slice(kmn, kmn + kmm)).reshape(inputs[0].shape_);
       tempMd = TBlob(tempspace.Slice(kmn + kmm, kmn + kmm + km)).reshape(inputs[1].shape_);
     } else {
-      Tensor<xpu, 1, OType> tempspace = ctx.requested[0]
-        .get_space_typed<xpu, 1, OType>(Shape1(kmm + km), s);
-      tempM = TBlob(tempspace.Slice(0, kmm)).reshape(inputs[0].shape_);
+      Tensor<xpu, 1, OType> tempspace =
+          ctx.requested[0].get_space_typed<xpu, 1, OType>(Shape1(kmm + km), s);
+      tempM  = TBlob(tempspace.Slice(0, kmm)).reshape(inputs[0].shape_);
       tempMd = TBlob(tempspace.Slice(kmm, kmm + km)).reshape(inputs[1].shape_);
     }
     laop::op(inputs[0].FlatToKD<xpu, 3, OType>(s),  // dUT
@@ -294,10 +310,11 @@ void NumpyLaGesvdBackward(const nnvm::NodeAttrs& attrs,
              inputs[3].FlatToKD<xpu, 3, OType>(s),  // UT
              inputs[4].FlatToKD<xpu, 2, OType>(s),  // L
              inputs[5].FlatToKD<xpu, 3, OType>(s),  // V
-             tspace.FlatToKD<xpu, 3, OType>(s),  // dA
-             tempM.FlatToKD<xpu, 3, OType>(s),  // tempM
-             tempMd.FlatToKD<xpu, 2, OType>(s),  // tempMd
-             s, attrs);
+             tspace.FlatToKD<xpu, 3, OType>(s),     // dA
+             tempM.FlatToKD<xpu, 3, OType>(s),      // tempM
+             tempMd.FlatToKD<xpu, 2, OType>(s),     // tempMd
+             s,
+             attrs);
     if (req[0] == kAddTo) {
       Tensor<xpu, 1, OType> out = outputs[0].FlatTo1D<xpu, OType>(s);
       out += tspace.FlatTo1D<xpu, OType>(s);
diff --git a/src/operator/numpy/linalg/np_gesvd.cc b/src/operator/numpy/linalg/np_gesvd.cc
index 6d48c1ecabac..93d8ff9483bc 100644
--- a/src/operator/numpy/linalg/np_gesvd.cc
+++ b/src/operator/numpy/linalg/np_gesvd.cc
@@ -37,20 +37,20 @@ namespace op {
 // Shape inference function for gesvd
 // Inputs: A. Outputs: UT, L, V
 inline bool NumpyLaGesvdShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector* in_attrs,
-                           mxnet::ShapeVector* out_attrs) {
+                              mxnet::ShapeVector* in_attrs,
+                              mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 3);
-  const mxnet::TShape& in_a = (*in_attrs)[0];
+  const mxnet::TShape& in_a   = (*in_attrs)[0];
   const mxnet::TShape& out_ut = (*out_attrs)[0];
-  const mxnet::TShape& out_l = (*out_attrs)[1];
-  const mxnet::TShape& out_v = (*out_attrs)[2];
+  const mxnet::TShape& out_l  = (*out_attrs)[1];
+  const mxnet::TShape& out_v  = (*out_attrs)[2];
   if (in_a.ndim() >= 2) {
     // Forward shape inference.
     const int ndim(in_a.ndim());
     CHECK_LE(in_a[ndim - 2], in_a[ndim - 1])
-      << "Input A shape wrong: The second to last dimension must be less than or"
-      << "equal to the last dimension";
+        << "Input A shape wrong: The second to last dimension must be less than or"
+        << "equal to the last dimension";
     // V must have same shape as A
     SHAPE_ASSIGN_CHECK(*out_attrs, 2, in_a);
     std::vector<int> oshape_l(ndim - 1);
@@ -68,21 +68,18 @@ inline bool NumpyLaGesvdShape(const nnvm::NodeAttrs& attrs,
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, tshape_ut);
     return true;
   }
-  if (out_ut.ndim() >= 2 && out_ut.ndim() == out_l.ndim()+1 &&
-      out_v.ndim() == out_ut.ndim()) {
+  if (out_ut.ndim() >= 2 && out_ut.ndim() == out_l.ndim() + 1 && out_v.ndim() == out_ut.ndim()) {
     // Backward shape inference.
     const int ndim(out_ut.ndim());
     for (int i = 0; i < ndim - 1; ++i) {
-      CHECK_EQ(out_ut[i], out_l[i])
-        << "Outputs UT, L must have same dimensions except for last";
-      CHECK_EQ(out_v[i], out_l[i])
-        << "Outputs V, L must have same dimensions except for last";
+      CHECK_EQ(out_ut[i], out_l[i]) << "Outputs UT, L must have same dimensions except for last";
+      CHECK_EQ(out_v[i], out_l[i]) << "Outputs V, L must have same dimensions except for last";
     }
     CHECK_EQ(out_ut[ndim - 2], out_ut[ndim - 1])
-      << "Output UT shape wrong: Last two dimensions must be equal";
-    CHECK_LE(out_v[ndim-2], out_v[ndim-1])
-      << "Output V shape wrong: The second to last dimension must be less than or"
-      << "equal to the last dimension";
+        << "Output UT shape wrong: Last two dimensions must be equal";
+    CHECK_LE(out_v[ndim - 2], out_v[ndim - 1])
+        << "Output V shape wrong: The second to last dimension must be less than or"
+        << "equal to the last dimension";
     // A must have same shape as V
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_v);
     return true;
@@ -91,30 +88,40 @@ inline bool NumpyLaGesvdShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_svd)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"A"}; })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyLaGesvdShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 3>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int>>{{0, 2}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<FCompute>("FCompute<cpu>", NumpyLaGesvdForward<cpu, gesvd>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_npi_svd"})
-.add_argument("A", "NDArray-or-Symbol", "Input matrices to be factorized");
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyLaGesvdShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 3>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 2}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyLaGesvdForward<cpu, gesvd>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_npi_svd"})
+    .add_argument("A", "NDArray-or-Symbol", "Input matrices to be factorized");
 
 NNVM_REGISTER_OP(_backward_npi_svd)
-.set_num_inputs(6)
-.set_num_outputs(1)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int> >{{2, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyLaGesvdBackward<cpu, gesvd_backward>);
+    .set_num_inputs(6)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{2, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyLaGesvdBackward<cpu, gesvd_backward>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_gesvd.cu b/src/operator/numpy/linalg/np_gesvd.cu
index b2358fbdd4b7..70b342cf0517 100644
--- a/src/operator/numpy/linalg/np_gesvd.cu
+++ b/src/operator/numpy/linalg/np_gesvd.cu
@@ -31,11 +31,10 @@ namespace op {
 
 #if MXNET_USE_CUSOLVER == 1
 
-NNVM_REGISTER_OP(_npi_svd)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLaGesvdForward<gpu, gesvd>);
+NNVM_REGISTER_OP(_npi_svd).set_attr<FCompute>("FCompute<gpu>", NumpyLaGesvdForward<gpu, gesvd>);
 
 NNVM_REGISTER_OP(_backward_npi_svd)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLaGesvdBackward<gpu, gesvd_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyLaGesvdBackward<gpu, gesvd_backward>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_lstsq-inl.h b/src/operator/numpy/linalg/np_lstsq-inl.h
index c28143b64435..1cda51745b97 100644
--- a/src/operator/numpy/linalg/np_lstsq-inl.h
+++ b/src/operator/numpy/linalg/np_lstsq-inl.h
@@ -45,18 +45,12 @@ struct LstsqParam : public dmlc::Parameter<LstsqParam> {
   double finfoEps64;
   bool new_default;
   DMLC_DECLARE_PARAMETER(LstsqParam) {
-    DMLC_DECLARE_FIELD(rcond)
-    .set_default(-1)
-    .describe("Cut-off ratio for small singular values");
-    DMLC_DECLARE_FIELD(finfoEps32)
-    .set_default(0)
-    .describe("Machine limits for float32 type");
-    DMLC_DECLARE_FIELD(finfoEps64)
-    .set_default(0)
-    .describe("Machine limits for float64 type");
+    DMLC_DECLARE_FIELD(rcond).set_default(-1).describe("Cut-off ratio for small singular values");
+    DMLC_DECLARE_FIELD(finfoEps32).set_default(0).describe("Machine limits for float32 type");
+    DMLC_DECLARE_FIELD(finfoEps64).set_default(0).describe("Machine limits for float64 type");
     DMLC_DECLARE_FIELD(new_default)
-    .set_default(false)
-    .describe("Specifies whether rcond is default which is machine precision");
+        .set_default(false)
+        .describe("Specifies whether rcond is default which is machine precision");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream rcond_s, finfoEps32_s, finfoEps64_s, new_default_s;
@@ -64,29 +58,29 @@ struct LstsqParam : public dmlc::Parameter<LstsqParam> {
     finfoEps32_s << finfoEps32;
     finfoEps64_s << finfoEps64;
     new_default_s << new_default;
-    (*dict)["rcond"] = rcond_s.str();
-    (*dict)["finfoEps32"] = finfoEps32_s.str();
-    (*dict)["finfoEps64"] = finfoEps64_s.str();
+    (*dict)["rcond"]       = rcond_s.str();
+    (*dict)["finfoEps32"]  = finfoEps32_s.str();
+    (*dict)["finfoEps64"]  = finfoEps64_s.str();
     (*dict)["new_default"] = new_default_s.str();
   }
 };
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 inline void linalg_gelsd_workspace_query(const IndexT nrow,
                                          const IndexT ncol,
                                          const IndexT nrhs,
-                                         IndexT *lwork,
-                                         IndexT *liwork,
+                                         IndexT* lwork,
+                                         IndexT* liwork,
                                          const Tensor<xpu, 2, DType>& A,
                                          const Tensor<xpu, 2, DType>& B,
                                          const Tensor<xpu, 1, DType>& S);
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 inline void linalg_gelsd(const IndexT nrow,
                          const IndexT ncol,
                          const IndexT nrhs,
                          const DType rcond,
-                         IndexT *rank,
+                         IndexT* rank,
                          const Tensor<xpu, 2, DType>& A,
                          const Tensor<xpu, 2, DType>& B,
                          const Tensor<xpu, 1, DType>& SingularValues,
@@ -94,9 +88,12 @@ inline void linalg_gelsd(const IndexT nrow,
                          const Tensor<xpu, 1, IndexT>& Iwork);
 
 struct LstsqTypeTransposeHelper {
-  template<typename InDType, typename OutDType>
-  MSHADOW_XINLINE static void Map(lapack_index_t i, const InDType *in_ptr, OutDType *out_ptr,
-                                  const lapack_index_t nrow, const lapack_index_t ncol,
+  template <typename InDType, typename OutDType>
+  MSHADOW_XINLINE static void Map(lapack_index_t i,
+                                  const InDType* in_ptr,
+                                  OutDType* out_ptr,
+                                  const lapack_index_t nrow,
+                                  const lapack_index_t ncol,
                                   const lapack_index_t ld) {
     if (ld >= nrow && i < nrow * ncol) {
       out_ptr[i / ncol + (i % ncol) * ld] = static_cast<OutDType>(in_ptr[i]);
@@ -104,36 +101,44 @@ struct LstsqTypeTransposeHelper {
   }
 };
 
-template<int req>
+template <int req>
 struct ValuesAssignHelper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(lapack_index_t i, const DType *in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(lapack_index_t i, const DType* in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i]);
   }
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(lapack_index_t i, const DType& in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(lapack_index_t i, const DType& in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data);
   }
 };
 
-template<int req>
+template <int req>
 struct SolutionAssignHelper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(lapack_index_t i, const DType *trans_b_ptr, DType *x_ptr,
-                                  const lapack_index_t nrow, const lapack_index_t ncol,
-                                  const lapack_index_t nrhs, const lapack_index_t ldb) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(lapack_index_t i,
+                                  const DType* trans_b_ptr,
+                                  DType* x_ptr,
+                                  const lapack_index_t nrow,
+                                  const lapack_index_t ncol,
+                                  const lapack_index_t nrhs,
+                                  const lapack_index_t ldb) {
     if (i < ncol * nrhs && ldb >= nrow && ldb >= ncol) {
-      KERNEL_ASSIGN(x_ptr[i], req, trans_b_ptr[i / nrhs  + (i % nrhs) * ldb]);
+      KERNEL_ASSIGN(x_ptr[i], req, trans_b_ptr[i / nrhs + (i % nrhs) * ldb]);
     }
   }
 };
 
-template<int req>
+template <int req>
 struct ResidualsAssignHelper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(lapack_index_t i, const DType *trans_b_ptr, DType *residuals_ptr,
-                                  const lapack_index_t nrow, const lapack_index_t ncol,
-                                  const lapack_index_t nrhs, const lapack_index_t ldb) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(lapack_index_t i,
+                                  const DType* trans_b_ptr,
+                                  DType* residuals_ptr,
+                                  const lapack_index_t nrow,
+                                  const lapack_index_t ncol,
+                                  const lapack_index_t nrhs,
+                                  const lapack_index_t ldb) {
     if (i < nrhs) {
       DType residuals_values = 0;
       for (lapack_index_t j = ncol; j < nrow; ++j) {
@@ -144,67 +149,84 @@ struct ResidualsAssignHelper {
   }
 };
 
-#define LINALG_CPU_GELSD_WORKSPACE_QUERY(func, DType, IndexT) \
-template<> inline void \
-linalg_gelsd_workspace_query<cpu, DType, IndexT>(const IndexT nrow, \
-                                         const IndexT ncol, \
-                                         const IndexT nrhs, \
-                                         IndexT *lwork, \
-                                         IndexT *liwork, \
-                                         const Tensor<cpu, 2, DType>& A, \
-                                         const Tensor<cpu, 2, DType>& B, \
-                                         const Tensor<cpu, 1, DType>& S) { \
-  CHECK(A.size(0) == ncol && A.size(1) == A.stride_) \
-    << "ncol or lda dismatch A shape and lda should >= max(1, nrow)."; \
-  CHECK(B.size(0) == nrhs && B.size(1) == B.stride_) \
-    << "nrhs or ldb dismatch B shape and ldb should >= max(1, max(nrow, ncol))"; \
-  DType temp_work = -1, rcond = -1; \
-  IndexT temp_iwork = -1; \
-  IndexT rank = -1; \
-  IndexT info = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, nrow, ncol, nrhs, \
-                                 A.dptr_, A.stride_, \
-                                 B.dptr_, B.stride_, \
-                                 B.dptr_, rcond, &rank, \
-                                 &temp_work, -1, &temp_iwork); \
-  CHECK_GE(info, 0) << "MXNET_LAPACK_" << #func << ": " \
-    << "the " << -info << "-th argument had an illegal value"; \
-  *lwork = static_cast<IndexT>(temp_work); \
-  *liwork = temp_iwork; \
-  return; \
-}
+#define LINALG_CPU_GELSD_WORKSPACE_QUERY(func, DType, IndexT)                                    \
+  template <>                                                                                    \
+  inline void linalg_gelsd_workspace_query<cpu, DType, IndexT>(const IndexT nrow,                \
+                                                               const IndexT ncol,                \
+                                                               const IndexT nrhs,                \
+                                                               IndexT* lwork,                    \
+                                                               IndexT* liwork,                   \
+                                                               const Tensor<cpu, 2, DType>& A,   \
+                                                               const Tensor<cpu, 2, DType>& B,   \
+                                                               const Tensor<cpu, 1, DType>& S) { \
+    CHECK(A.size(0) == ncol && A.size(1) == A.stride_)                                           \
+        << "ncol or lda dismatch A shape and lda should >= max(1, nrow).";                       \
+    CHECK(B.size(0) == nrhs && B.size(1) == B.stride_)                                           \
+        << "nrhs or ldb dismatch B shape and ldb should >= max(1, max(nrow, ncol))";             \
+    DType temp_work = -1, rcond = -1;                                                            \
+    IndexT temp_iwork = -1;                                                                      \
+    IndexT rank       = -1;                                                                      \
+    IndexT info       = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR,                              \
+                                      nrow,                                                \
+                                      ncol,                                                \
+                                      nrhs,                                                \
+                                      A.dptr_,                                             \
+                                      A.stride_,                                           \
+                                      B.dptr_,                                             \
+                                      B.stride_,                                           \
+                                      B.dptr_,                                             \
+                                      rcond,                                               \
+                                      &rank,                                               \
+                                      &temp_work,                                          \
+                                      -1,                                                  \
+                                      &temp_iwork);                                        \
+    CHECK_GE(info, 0) << "MXNET_LAPACK_" << #func << ": "                                        \
+                      << "the " << -info << "-th argument had an illegal value";                 \
+    *lwork  = static_cast<IndexT>(temp_work);                                                    \
+    *liwork = temp_iwork;                                                                        \
+    return;                                                                                      \
+  }
 
-#define LINALG_CPU_GELSD(func, DType, IndexT) \
-template<> inline void \
-linalg_gelsd<cpu, DType, IndexT>(\
-                         const IndexT nrow, \
-                         const IndexT ncol, \
-                         const IndexT nrhs, \
-                         const DType rcond, \
-                         IndexT *rank, \
-                         const Tensor<cpu, 2, DType>& A, \
-                         const Tensor<cpu, 2, DType>& B, \
-                         const Tensor<cpu, 1, DType>& SingularValues, \
-                         const Tensor<cpu, 1, DType>& Work, \
-                         const Tensor<cpu, 1, IndexT>& Iwork) { \
-  CHECK(A.size(0) == ncol && A.size(1) == A.stride_) \
-    << "ncol or lda dismatch A shape and lda should >= max(1, nrow)."; \
-  CHECK(B.size(0) == nrhs && B.size(1) == B.stride_) \
-    << "nrhs or ldb dismatch B shape and ldb should >= max(1, max(nrow, ncol))"; \
-  CHECK(SingularValues.MSize() >= std::min(nrow, ncol)) \
-    << "SingularValues is too small"; \
-  const IndexT lwork = Work.MSize(); \
-  IndexT info = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, nrow, ncol, nrhs, \
-                                 A.dptr_, A.stride_, B.dptr_, B.stride_, \
-                                 SingularValues.dptr_, rcond, rank, \
-                                 Work.dptr_, lwork, Iwork.dptr_); \
-  CHECK_GE(info, 0) << "MXNET_LAPACK_" << #func << ": " \
-    << "the " << -info << "-th argument had an illegal value"; \
-  CHECK_LE(info, 0) << "MXNET_LAPACK_" << #func << ": " \
-    << "the algorithm for computing the SVD failed to converge; " \
-    << info << " off-diagonal elements of an intermediate bidiagonal " \
-    << "form did not converge to zero."; \
-  return; \
-}
+#define LINALG_CPU_GELSD(func, DType, IndexT)                                               \
+  template <>                                                                               \
+  inline void linalg_gelsd<cpu, DType, IndexT>(const IndexT nrow,                           \
+                                               const IndexT ncol,                           \
+                                               const IndexT nrhs,                           \
+                                               const DType rcond,                           \
+                                               IndexT* rank,                                \
+                                               const Tensor<cpu, 2, DType>& A,              \
+                                               const Tensor<cpu, 2, DType>& B,              \
+                                               const Tensor<cpu, 1, DType>& SingularValues, \
+                                               const Tensor<cpu, 1, DType>& Work,           \
+                                               const Tensor<cpu, 1, IndexT>& Iwork) {       \
+    CHECK(A.size(0) == ncol && A.size(1) == A.stride_)                                      \
+        << "ncol or lda dismatch A shape and lda should >= max(1, nrow).";                  \
+    CHECK(B.size(0) == nrhs && B.size(1) == B.stride_)                                      \
+        << "nrhs or ldb dismatch B shape and ldb should >= max(1, max(nrow, ncol))";        \
+    CHECK(SingularValues.MSize() >= std::min(nrow, ncol)) << "SingularValues is too small"; \
+    const IndexT lwork = Work.MSize();                                                      \
+    IndexT info        = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR,                        \
+                                      nrow,                                          \
+                                      ncol,                                          \
+                                      nrhs,                                          \
+                                      A.dptr_,                                       \
+                                      A.stride_,                                     \
+                                      B.dptr_,                                       \
+                                      B.stride_,                                     \
+                                      SingularValues.dptr_,                          \
+                                      rcond,                                         \
+                                      rank,                                          \
+                                      Work.dptr_,                                    \
+                                      lwork,                                         \
+                                      Iwork.dptr_);                                  \
+    CHECK_GE(info, 0) << "MXNET_LAPACK_" << #func << ": "                                   \
+                      << "the " << -info << "-th argument had an illegal value";            \
+    CHECK_LE(info, 0) << "MXNET_LAPACK_" << #func << ": "                                   \
+                      << "the algorithm for computing the SVD failed to converge; " << info \
+                      << " off-diagonal elements of an intermediate bidiagonal "            \
+                      << "form did not converge to zero.";                                  \
+    return;                                                                                 \
+  }
 
 LINALG_CPU_GELSD_WORKSPACE_QUERY(sgelsd, float, LapackIndex<cpu>::IndexT)
 LINALG_CPU_GELSD_WORKSPACE_QUERY(dgelsd, double, LapackIndex<cpu>::IndexT)
@@ -214,35 +236,35 @@ LINALG_CPU_GELSD(dgelsd, double, LapackIndex<cpu>::IndexT)
 
 #ifdef __CUDACC__
 
-#define LINALG_GPU_GELSD_WORKSPACE_QUERY(DType) \
-template<> inline void \
-linalg_gelsd_workspace_query<gpu, DType>(const int nrow, \
-                                         const int ncol, \
-                                         const int nrhs, \
-                                         int *lwork, \
-                                         int *liwork, \
-                                         const Tensor<gpu, 2, DType>& A, \
-                                         const Tensor<gpu, 2, DType>& B, \
-                                         const Tensor<gpu, 1, DType>& S) { \
-  LOG(FATAL) << "linalg gesld workspace query is unsupported in gpu!"; \
-  return; \
-}
+#define LINALG_GPU_GELSD_WORKSPACE_QUERY(DType)                                          \
+  template <>                                                                            \
+  inline void linalg_gelsd_workspace_query<gpu, DType>(const int nrow,                   \
+                                                       const int ncol,                   \
+                                                       const int nrhs,                   \
+                                                       int* lwork,                       \
+                                                       int* liwork,                      \
+                                                       const Tensor<gpu, 2, DType>& A,   \
+                                                       const Tensor<gpu, 2, DType>& B,   \
+                                                       const Tensor<gpu, 1, DType>& S) { \
+    LOG(FATAL) << "linalg gesld workspace query is unsupported in gpu!";                 \
+    return;                                                                              \
+  }
 
-#define LINALG_GPU_GELSD(DType) \
-template<> inline void \
-linalg_gelsd<gpu, DType>(const int nrow, \
-                         const int ncol, \
-                         const int nrhs, \
-                         const DType rcond, \
-                         int *rank, \
-                         const Tensor<gpu, 2, DType>& A, \
-                         const Tensor<gpu, 2, DType>& B, \
-                         const Tensor<gpu, 1, DType>& SingularValues, \
-                         const Tensor<gpu, 1, DType>& Work, \
-                         const Tensor<gpu, 1, int>& Iwork) { \
-  LOG(FATAL) << "linalg gesld is unsupported in gpu!"; \
-  return; \
-}
+#define LINALG_GPU_GELSD(DType)                                                     \
+  template <>                                                                       \
+  inline void linalg_gelsd<gpu, DType>(const int nrow,                              \
+                                       const int ncol,                              \
+                                       const int nrhs,                              \
+                                       const DType rcond,                           \
+                                       int* rank,                                   \
+                                       const Tensor<gpu, 2, DType>& A,              \
+                                       const Tensor<gpu, 2, DType>& B,              \
+                                       const Tensor<gpu, 1, DType>& SingularValues, \
+                                       const Tensor<gpu, 1, DType>& Work,           \
+                                       const Tensor<gpu, 1, int>& Iwork) {          \
+    LOG(FATAL) << "linalg gesld is unsupported in gpu!";                            \
+    return;                                                                         \
+  }
 
 LINALG_GPU_GELSD_WORKSPACE_QUERY(float)
 LINALG_GPU_GELSD_WORKSPACE_QUERY(double)
@@ -254,22 +276,20 @@ LINALG_GPU_GELSD(double)
 
 inline bool GetOutputShapes(const mxnet::TShape& a_shape,
                             const mxnet::TShape& b_shape,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* out_attrs) {
   if (!ndim_is_known(a_shape) || !ndim_is_known(b_shape)) {
     return false;
   }
-  const int a_ndim = a_shape.ndim();
-  const int b_ndim = b_shape.ndim();
+  const int a_ndim   = a_shape.ndim();
+  const int b_ndim   = b_shape.ndim();
   const dim_t a_nrow = a_shape[0];
   const dim_t a_ncol = a_shape[1];
   const dim_t b_nrow = b_shape[0];
   const dim_t b_nrhs = b_ndim == 2 ? b_shape[1] : 1;
-  CHECK_EQ(a_ndim, 2) << a_ndim
-    << "-dimensional array given. Array must be two-dimensional";
-  CHECK(b_ndim == 1 || b_ndim == 2) << b_ndim
-    << "-dimensional array given. Array must be one-dimensional or two-dimensional";
-  CHECK_EQ(a_nrow, b_nrow)
-    << "Incompatible dimensions of inputs";
+  CHECK_EQ(a_ndim, 2) << a_ndim << "-dimensional array given. Array must be two-dimensional";
+  CHECK(b_ndim == 1 || b_ndim == 2)
+      << b_ndim << "-dimensional array given. Array must be one-dimensional or two-dimensional";
+  CHECK_EQ(a_nrow, b_nrow) << "Incompatible dimensions of inputs";
   // x_shape
   if (b_ndim == 2) {
     std::vector<dim_t> x_shape_vec({a_ncol, b_nrhs});
@@ -285,18 +305,18 @@ inline bool GetOutputShapes(const mxnet::TShape& a_shape,
   if (a_nrow == 0 || a_ncol == 0) {
     SHAPE_ASSIGN_CHECK(*out_attrs, 3, mxnet::TShape(1, 0));
   } else {
-    SHAPE_ASSIGN_CHECK(*out_attrs, 3, mxnet::TShape(1, std::max(dim_t(1),
-                                                                std::min(a_nrow, a_ncol))));
+    SHAPE_ASSIGN_CHECK(
+        *out_attrs, 3, mxnet::TShape(1, std::max(dim_t(1), std::min(a_nrow, a_ncol))));
   }
   return shape_is_known(*out_attrs);
 }
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 size_t LstsqWorkspaceSize(const TBlob& a,
                           const TBlob& b,
                           const mxnet::TShape& x_shape,
-                          IndexT *lwork,
-                          IndexT *liwork,
+                          IndexT* lwork,
+                          IndexT* liwork,
                           const OpContext& ctx) {
   const int a_ndim = a.ndim();
   const int b_ndim = b.ndim();
@@ -304,7 +324,7 @@ size_t LstsqWorkspaceSize(const TBlob& a,
   CHECK_EQ(a.shape_[0], b.shape_[0]) << "Inputs shape dismatch";
 
   size_t workspace_size = 0;
-  Stream<cpu> *s_cpu = ctx.get_stream<cpu>();
+  Stream<cpu>* s_cpu    = ctx.get_stream<cpu>();
   MSHADOW_SGL_DBL_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(b.type_flag_, BType, {
       const mxnet::TShape& a_shape = a.shape_;
@@ -313,22 +333,25 @@ size_t LstsqWorkspaceSize(const TBlob& a,
         IndexT nrow = a_shape[0];
         IndexT ncol = a_shape[1];
         IndexT nrhs = b_ndim == 2 ? b_shape[1] : 1;
-        IndexT lda = std::max<IndexT>(1, nrow);
-        IndexT ldb = std::max<IndexT>(1, std::max(nrow, ncol));
+        IndexT lda  = std::max<IndexT>(1, nrow);
+        IndexT ldb  = std::max<IndexT>(1, std::max(nrow, ncol));
         // Lapack routine can't handle lda = 0 and ldb = 0.
         // If nrow == 0, leading dimension of A_trans and B_trans will be 0.
-        if (nrow == 0) { return 0U; }
-        if (ncol == 0 && nrhs == 0) { return 0U; }
+        if (nrow == 0) {
+          return 0U;
+        }
+        if (ncol == 0 && nrhs == 0) {
+          return 0U;
+        }
         // If ncol != 0, need to invoke lapack routine.
         // Lapack routine can't handle n_rhs = 0, so allocate the array one larger in that axis.
         IndexT temp_nrhs = nrhs == 0 ? 1 : nrhs;
-        IndexT SSize = std::max<IndexT>(1, std::min(nrow, ncol));
+        IndexT SSize     = std::max<IndexT>(1, std::min(nrow, ncol));
         mshadow::Tensor<cpu, 2, DType> A(nullptr, Shape2(ncol, lda), lda, s_cpu);
         mshadow::Tensor<cpu, 2, DType> B(nullptr, Shape2(temp_nrhs, ldb), ldb, s_cpu);
         mshadow::Tensor<cpu, 1, DType> S(nullptr, Shape1(SSize), s_cpu);
         // Invoke lapack workspace query.
-        linalg_gelsd_workspace_query<cpu, DType>(nrow, ncol, temp_nrhs,
-                                                 lwork, liwork, A, B, S);
+        linalg_gelsd_workspace_query<cpu, DType>(nrow, ncol, temp_nrhs, lwork, liwork, A, B, S);
         // For A size because on lapack routine exit, A will be overwritten.
         workspace_size += ncol * lda * sizeof(DType);
         // For B size because on lapack routine exit, B will be overwritten by solution result.
@@ -343,43 +366,43 @@ size_t LstsqWorkspaceSize(const TBlob& a,
   return workspace_size;
 }
 
-template<typename xpu, typename IndexT>
+template <typename xpu, typename IndexT>
 void LstsqOpForwardImpl(const TBlob& a,
                         const TBlob& b,
                         const TBlob& x,
                         const TBlob& temp_residuals,
                         const TBlob& rank,
                         const TBlob& singularValues,
-                        bool *empty_residuals,
+                        bool* empty_residuals,
                         const IndexT& lwork,
                         const IndexT& liwork,
-                        std::vector<char> *workspace,
+                        std::vector<char>* workspace,
                         const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<OpReqType>& req) {
   // Get param.
   const LstsqParam& param = nnvm::get<LstsqParam>(attrs.parsed);
-  double rcond = param.rcond;
-  bool new_default = param.new_default;
-  double finfoEps = a.type_flag_ == mshadow::kFloat32 ? param.finfoEps32 : param.finfoEps64;
+  double rcond            = param.rcond;
+  bool new_default        = param.new_default;
+  double finfoEps         = a.type_flag_ == mshadow::kFloat32 ? param.finfoEps32 : param.finfoEps64;
   if (new_default) {
     rcond = finfoEps * std::max(a.shape_[0], a.shape_[1]);
   }
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
   MSHADOW_SGL_DBL_TYPE_SWITCH(x.type_flag_, DType, {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    const IndexT nrow = a_shape[0];
-    const IndexT ncol = a_shape[1];
-    const IndexT nrhs = b.ndim() == 2 ? b_shape[1] : 1;
-    const IndexT lda  = std::max<IndexT>(1, nrow);
-    const IndexT ldb = std::max<IndexT>(1, std::max(nrow, ncol));
-    const IndexT snum = std::max<IndexT>(1, std::min(nrow, ncol));
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    const IndexT nrow       = a_shape[0];
+    const IndexT ncol       = a_shape[1];
+    const IndexT nrhs       = b.ndim() == 2 ? b_shape[1] : 1;
+    const IndexT lda        = std::max<IndexT>(1, nrow);
+    const IndexT ldb        = std::max<IndexT>(1, std::max(nrow, ncol));
+    const IndexT snum       = std::max<IndexT>(1, std::min(nrow, ncol));
     if (nrow == 0) {
       // Assign 0 for all values in x.
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<ValuesAssignHelper<req_type>, xpu>::Launch(
-          s, x.Size(), static_cast<DType>(0), x.dptr<DType>());
+            s, x.Size(), static_cast<DType>(0), x.dptr<DType>());
       });
       // Assign values for rank.
       ASSIGN_DISPATCH(*rank.dptr<IndexT>(), kWriteTo, 0);
@@ -395,14 +418,14 @@ void LstsqOpForwardImpl(const TBlob& a,
       return;
     }
     IndexT temp_nrhs = nrhs == 0 ? 1 : nrhs;
-    mxnet::TShape trans_a_shape(mxnet::Tuple<dim_t>({ ncol, lda }));
-    mxnet::TShape trans_b_shape(mxnet::Tuple<dim_t>({ temp_nrhs, ldb }));
+    mxnet::TShape trans_a_shape(mxnet::Tuple<dim_t>({ncol, lda}));
+    mxnet::TShape trans_b_shape(mxnet::Tuple<dim_t>({temp_nrhs, ldb}));
     // Allocate data memory.
-    DType *a_ptr = reinterpret_cast<DType*>(workspace->data());
-    DType *b_ptr = a_ptr + trans_a_shape.Size();
-    DType *s_ptr = b_ptr + trans_b_shape.Size();
-    DType *work_ptr = s_ptr + snum;
-    IndexT *iwork_ptr = reinterpret_cast<IndexT*>(work_ptr + lwork);
+    DType* a_ptr      = reinterpret_cast<DType*>(workspace->data());
+    DType* b_ptr      = a_ptr + trans_a_shape.Size();
+    DType* s_ptr      = b_ptr + trans_b_shape.Size();
+    DType* work_ptr   = s_ptr + snum;
+    IndexT* iwork_ptr = reinterpret_cast<IndexT*>(work_ptr + lwork);
     TBlob trans_a(a_ptr, trans_a_shape, a.dev_mask(), a.dev_id());
     TBlob trans_b(b_ptr, trans_b_shape, b.dev_mask(), b.dev_id());
     TBlob singular_values(s_ptr, Shape1(snum), singularValues.dev_mask(), singularValues.dev_id());
@@ -410,25 +433,26 @@ void LstsqOpForwardImpl(const TBlob& a,
     TBlob iwork(iwork_ptr, Shape1(liwork), x.dev_mask(), x.dev_id());
     // Transpose a to trans_a.
     MSHADOW_SGL_DBL_TYPE_SWITCH(a.type_flag_, AType, {
-      mxnet_op::Kernel<LstsqTypeTransposeHelper, xpu>::Launch(s, a.Size(), a.dptr<AType>(),
-                                                              trans_a.dptr<DType>(),
-                                                              nrow, ncol, lda);
+      mxnet_op::Kernel<LstsqTypeTransposeHelper, xpu>::Launch(
+          s, a.Size(), a.dptr<AType>(), trans_a.dptr<DType>(), nrow, ncol, lda);
     });
     // If nrhs == 0, assign 0 to trans_b directly.
     // If nrhs != 0, assign 0 to initialize trans_b because trans_b.Size > b.Size when nrow < ncol.
     mxnet_op::Kernel<ValuesAssignHelper<kWriteTo>, xpu>::Launch(
-      s, trans_b.Size(), static_cast<DType>(0), trans_b.dptr<DType>());
+        s, trans_b.Size(), static_cast<DType>(0), trans_b.dptr<DType>());
     if (nrhs != 0) {
       // Transpose b to trans_b.
       MSHADOW_SGL_DBL_TYPE_SWITCH(b.type_flag_, BType, {
-        mxnet_op::Kernel<LstsqTypeTransposeHelper, xpu>::Launch(s, b.Size(), b.dptr<BType>(),
-                                                                trans_b.dptr<DType>(),
-                                                                nrow, nrhs, ldb);
+        mxnet_op::Kernel<LstsqTypeTransposeHelper, xpu>::Launch(
+            s, b.Size(), b.dptr<BType>(), trans_b.dptr<DType>(), nrow, nrhs, ldb);
       });
     }
     // Invoke lapack routines.
-    linalg_gelsd<xpu, DType>(nrow, ncol, temp_nrhs,
-                             rcond, rank.dptr<IndexT>(),
+    linalg_gelsd<xpu, DType>(nrow,
+                             ncol,
+                             temp_nrhs,
+                             rcond,
+                             rank.dptr<IndexT>(),
                              trans_a.get<xpu, 2, DType>(s),
                              trans_b.get<xpu, 2, DType>(s),
                              singular_values.get<xpu, 1, DType>(s),
@@ -438,7 +462,7 @@ void LstsqOpForwardImpl(const TBlob& a,
       // Assign values for singularValues.
       MXNET_ASSIGN_REQ_SWITCH(req[3], req_type, {
         mxnet_op::Kernel<ValuesAssignHelper<req_type>, xpu>::Launch(
-          s, singularValues.Size(), singular_values.dptr<DType>(), singularValues.dptr<DType>());
+            s, singularValues.Size(), singular_values.dptr<DType>(), singularValues.dptr<DType>());
       });
       // Assign values for empty_residuals.
       *empty_residuals = true;
@@ -447,7 +471,7 @@ void LstsqOpForwardImpl(const TBlob& a,
       // Assign values for x.
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<SolutionAssignHelper<req_type>, xpu>::Launch(
-          s, x.Size(), trans_b.dptr<DType>(), x.dptr<DType>(), nrow, ncol, nrhs, ldb);
+            s, x.Size(), trans_b.dptr<DType>(), x.dptr<DType>(), nrow, ncol, nrhs, ldb);
       });
       // Assign values for residuals and residualsEmpty.
       if (*(rank.dptr<IndexT>()) < ncol || nrow <= ncol) {
@@ -456,20 +480,26 @@ void LstsqOpForwardImpl(const TBlob& a,
         *empty_residuals = false;
         MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
           mxnet_op::Kernel<ResidualsAssignHelper<req_type>, xpu>::Launch(
-            s, temp_residuals.Size(), trans_b.dptr<DType>(),
-            temp_residuals.dptr<DType>(), nrow, ncol, nrhs, ldb);
+              s,
+              temp_residuals.Size(),
+              trans_b.dptr<DType>(),
+              temp_residuals.dptr<DType>(),
+              nrow,
+              ncol,
+              nrhs,
+              ldb);
         });
       }
       // Assign values for singularValues.
       MXNET_ASSIGN_REQ_SWITCH(req[3], req_type, {
         mxnet_op::Kernel<ValuesAssignHelper<req_type>, xpu>::Launch(
-          s, singularValues.Size(), singular_values.dptr<DType>(), singularValues.dptr<DType>());
+            s, singularValues.Size(), singular_values.dptr<DType>(), singularValues.dptr<DType>());
       });
     }
   });
 }
 
-template<typename DType, typename IndexT>
+template <typename DType, typename IndexT>
 inline void GpuCallbackCpuImpl(const TBlob& a,
                                const TBlob& b,
                                const TBlob& x,
@@ -479,7 +509,7 @@ inline void GpuCallbackCpuImpl(const TBlob& a,
                                const mxnet::TShape& temp_residuals_shape,
                                const IndexT& lwork,
                                const IndexT& liwork,
-                               std::vector<char> *workspace,
+                               std::vector<char>* workspace,
                                const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<OpReqType>& req) {
@@ -492,27 +522,37 @@ inline void GpuCallbackCpuImpl(const TBlob& a,
       std::vector<DType> temp_residuals_vec(temp_residuals_shape.Size(), 0);
       std::vector<IndexT> rank_vec(rank.Size(), 0);
       std::vector<DType> singularValues_vec(singularValues.Size(), 0);
-      mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-      cudaStream_t stream = Stream<gpu>::GetStream(s);
+      mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+      cudaStream_t stream     = Stream<gpu>::GetStream(s);
       // Copy inputs from gpu to cpu.
-      CUDA_CALL(cudaMemcpyAsync(a_vec.data(), a.dptr<AType>(), sizeof(AType) * a.Size(),
-                                cudaMemcpyDeviceToHost, stream));
-      CUDA_CALL(cudaMemcpyAsync(b_vec.data(), b.dptr<BType>(), sizeof(BType) * b.Size(),
-                                cudaMemcpyDeviceToHost, stream));
+      CUDA_CALL(cudaMemcpyAsync(
+          a_vec.data(), a.dptr<AType>(), sizeof(AType) * a.Size(), cudaMemcpyDeviceToHost, stream));
+      CUDA_CALL(cudaMemcpyAsync(
+          b_vec.data(), b.dptr<BType>(), sizeof(BType) * b.Size(), cudaMemcpyDeviceToHost, stream));
       CUDA_CALL(cudaStreamSynchronize(stream));
       mxnet::TBlob a_data(a_vec.data(), a.shape_, cpu::kDevMask, -1);
       mxnet::TBlob b_data(b_vec.data(), b.shape_, cpu::kDevMask, -1);
       mxnet::TBlob x_data(x_vec.data(), x.shape_, cpu::kDevMask, -1);
       mxnet::TBlob rank_data(rank_vec.data(), rank.shape_, cpu::kDevMask, -1);
-      mxnet::TBlob temp_residuals_data(temp_residuals_vec.data(),
-                                       temp_residuals_shape, cpu::kDevMask, -1);
-      mxnet::TBlob singularValues_data(singularValues_vec.data(),
-                                       singularValues.shape_, cpu::kDevMask, -1);
+      mxnet::TBlob temp_residuals_data(
+          temp_residuals_vec.data(), temp_residuals_shape, cpu::kDevMask, -1);
+      mxnet::TBlob singularValues_data(
+          singularValues_vec.data(), singularValues.shape_, cpu::kDevMask, -1);
       // Op forward implement on cpu.
       bool empty_residuals = false;
-      LstsqOpForwardImpl<cpu>(a_data, b_data, x_data,
-                              temp_residuals_data, rank_data, singularValues_data,
-                              &empty_residuals, lwork, liwork, workspace, attrs, ctx, req);
+      LstsqOpForwardImpl<cpu>(a_data,
+                              b_data,
+                              x_data,
+                              temp_residuals_data,
+                              rank_data,
+                              singularValues_data,
+                              &empty_residuals,
+                              lwork,
+                              liwork,
+                              workspace,
+                              attrs,
+                              ctx,
+                              req);
       if (empty_residuals) {
         // Set residuals to empty deriectly.
         const_cast<NDArray&>(residuals_ndarray).Init(mxnet::TShape(1, 0));
@@ -520,19 +560,26 @@ inline void GpuCallbackCpuImpl(const TBlob& a,
         // No need set residuals to empty.
         const_cast<NDArray&>(residuals_ndarray).Init(temp_residuals_shape);
         // Copy back to gpu.
-        CUDA_CALL(cudaMemcpyAsync(residuals_ndarray.data().dptr<DType>(), temp_residuals_vec.data(),
+        CUDA_CALL(cudaMemcpyAsync(residuals_ndarray.data().dptr<DType>(),
+                                  temp_residuals_vec.data(),
                                   sizeof(DType) * temp_residuals_data.Size(),
-                                  cudaMemcpyHostToDevice, stream));
+                                  cudaMemcpyHostToDevice,
+                                  stream));
       }
       CUDA_CALL(cudaStreamSynchronize(stream));
       // Copy back to gpu.
-      CUDA_CALL(cudaMemcpyAsync(x.dptr<DType>(), x_vec.data(), sizeof(DType) * x.Size(),
-                                cudaMemcpyHostToDevice, stream));
-      CUDA_CALL(cudaMemcpyAsync(rank.dptr<IndexT>(), rank_vec.data(), sizeof(IndexT) * rank.Size(),
-                                cudaMemcpyHostToDevice, stream));
-      CUDA_CALL(cudaMemcpyAsync(singularValues.dptr<DType>(), singularValues_vec.data(),
+      CUDA_CALL(cudaMemcpyAsync(
+          x.dptr<DType>(), x_vec.data(), sizeof(DType) * x.Size(), cudaMemcpyHostToDevice, stream));
+      CUDA_CALL(cudaMemcpyAsync(rank.dptr<IndexT>(),
+                                rank_vec.data(),
+                                sizeof(IndexT) * rank.Size(),
+                                cudaMemcpyHostToDevice,
+                                stream));
+      CUDA_CALL(cudaMemcpyAsync(singularValues.dptr<DType>(),
+                                singularValues_vec.data(),
                                 sizeof(DType) * singularValues.Size(),
-                                cudaMemcpyHostToDevice, stream));
+                                cudaMemcpyHostToDevice,
+                                stream));
       CUDA_CALL(cudaStreamSynchronize(stream));
     });
   });
@@ -541,7 +588,7 @@ inline void GpuCallbackCpuImpl(const TBlob& a,
 #endif  // MXNET_USE_CUDA
 }
 
-template<typename xpu>
+template <typename xpu>
 void LstsqOpForward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<NDArray>& inputs,
@@ -555,28 +602,28 @@ void LstsqOpForward(const nnvm::NodeAttrs& attrs,
   CHECK(req[2] == kWriteTo || req[2] == kWriteInplace);
   CHECK(req[3] == kWriteTo || req[3] == kWriteInplace);
   using namespace mshadow;
-  using IndexT = typename LapackIndex<cpu>::IndexT;
-  const NDArray& a_ndarray = inputs[0];
-  const NDArray& b_ndarray = inputs[1];
-  const NDArray& x_ndarray = outputs[0];
-  const NDArray& residuals_ndarray = outputs[1];
-  const NDArray& rank_ndarray = outputs[2];
+  using IndexT                          = typename LapackIndex<cpu>::IndexT;
+  const NDArray& a_ndarray              = inputs[0];
+  const NDArray& b_ndarray              = inputs[1];
+  const NDArray& x_ndarray              = outputs[0];
+  const NDArray& residuals_ndarray      = outputs[1];
+  const NDArray& rank_ndarray           = outputs[2];
   const NDArray& singularValues_ndarray = outputs[3];
-  const mxnet::TShape& a_shape = a_ndarray.shape();
-  const mxnet::TShape& b_shape = b_ndarray.shape();
+  const mxnet::TShape& a_shape          = a_ndarray.shape();
+  const mxnet::TShape& b_shape          = b_ndarray.shape();
   // Force set output shapes.
   mxnet::ShapeVector out_shapes(4);
   GetOutputShapes(a_shape, b_shape, &out_shapes);
-  const mxnet::TShape& x_shape = out_shapes[0];
+  const mxnet::TShape& x_shape              = out_shapes[0];
   const mxnet::TShape& temp_residuals_shape = out_shapes[1];
-  const mxnet::TShape& rank_shape = out_shapes[2];
+  const mxnet::TShape& rank_shape           = out_shapes[2];
   const mxnet::TShape& singularValues_shape = out_shapes[3];
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(x_ndarray.dtype(), DType, {
     // Allocate workspace.
     IndexT lwork = 0, liwork = 0;
-    size_t workspace_size = LstsqWorkspaceSize<cpu, DType>(a_ndarray.data(), b_ndarray.data(),
-                                                           x_shape, &lwork, &liwork, ctx);
+    size_t workspace_size = LstsqWorkspaceSize<cpu, DType>(
+        a_ndarray.data(), b_ndarray.data(), x_shape, &lwork, &liwork, ctx);
     std::vector<char> workspace(workspace_size);
     // Force init.
     const_cast<NDArray&>(x_ndarray).Init(x_shape);
@@ -587,11 +634,21 @@ void LstsqOpForward(const nnvm::NodeAttrs& attrs,
     std::vector<DType> temp_residuals_vec(temp_residuals_shape.Size(), 0);
     if (xpu::kDevCPU) {
       bool empty_residuals = false;
-      TBlob temp_residuals(temp_residuals_vec.data(),
-                           Shape1(temp_residuals_vec.size()), cpu::kDevMask, -1);
-      LstsqOpForwardImpl<cpu>(a_ndarray.data(), b_ndarray.data(), x_ndarray.data(),
-                              temp_residuals, rank_ndarray.data(), singularValues_ndarray.data(),
-                              &empty_residuals, lwork, liwork, &workspace, attrs, ctx, req);
+      TBlob temp_residuals(
+          temp_residuals_vec.data(), Shape1(temp_residuals_vec.size()), cpu::kDevMask, -1);
+      LstsqOpForwardImpl<cpu>(a_ndarray.data(),
+                              b_ndarray.data(),
+                              x_ndarray.data(),
+                              temp_residuals,
+                              rank_ndarray.data(),
+                              singularValues_ndarray.data(),
+                              &empty_residuals,
+                              lwork,
+                              liwork,
+                              &workspace,
+                              attrs,
+                              ctx,
+                              req);
       if (empty_residuals) {
         // Set residuals to empty deriectly.
         const_cast<NDArray&>(residuals_ndarray).Init(mxnet::TShape(1, 0));
@@ -600,15 +657,26 @@ void LstsqOpForward(const nnvm::NodeAttrs& attrs,
         const_cast<NDArray&>(residuals_ndarray).Init(temp_residuals.shape_);
         MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
           mxnet_op::Kernel<ValuesAssignHelper<req_type>, cpu>::Launch(
-            ctx.get_stream<cpu>(), temp_residuals.Size(), temp_residuals.dptr<DType>(),
-            residuals_ndarray.data().dptr<DType>());
+              ctx.get_stream<cpu>(),
+              temp_residuals.Size(),
+              temp_residuals.dptr<DType>(),
+              residuals_ndarray.data().dptr<DType>());
         });
       }
     } else {
-      GpuCallbackCpuImpl<DType>(a_ndarray.data(), b_ndarray.data(), x_ndarray.data(),
-                                rank_ndarray.data(), singularValues_ndarray.data(),
-                                residuals_ndarray, temp_residuals_shape,
-                                lwork, liwork, &workspace, attrs, ctx, req);
+      GpuCallbackCpuImpl<DType>(a_ndarray.data(),
+                                b_ndarray.data(),
+                                x_ndarray.data(),
+                                rank_ndarray.data(),
+                                singularValues_ndarray.data(),
+                                residuals_ndarray,
+                                temp_residuals_shape,
+                                lwork,
+                                liwork,
+                                &workspace,
+                                attrs,
+                                ctx,
+                                req);
     }
   });
 }
diff --git a/src/operator/numpy/linalg/np_lstsq.cc b/src/operator/numpy/linalg/np_lstsq.cc
index e990aa50b11f..72dbf62b1a5e 100644
--- a/src/operator/numpy/linalg/np_lstsq.cc
+++ b/src/operator/numpy/linalg/np_lstsq.cc
@@ -30,8 +30,8 @@ namespace op {
 inline bool LstsqOpStorageType(const nnvm::NodeAttrs& attrs,
                                const int dev_mask,
                                DispatchMode* dispatch_mode,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
@@ -51,45 +51,44 @@ inline bool LstsqOpType(const nnvm::NodeAttrs& attrs,
   const int a_type = in_attrs->at(0);
   const int b_type = in_attrs->at(1);
   CHECK(a_type == mshadow::kFloat32 || a_type == mshadow::kFloat64)
-    << "lstsq operation only supports 32-bit and 64-bit floating point";
+      << "lstsq operation only supports 32-bit and 64-bit floating point";
   CHECK(b_type == mshadow::kFloat32 || b_type == mshadow::kFloat64)
-    << "lstsq operation only supports 32-bit and 64-bit floating point";
+      << "lstsq operation only supports 32-bit and 64-bit floating point";
 
-  const mshadow::TypeFlag floatFlag =
-    (mshadow::kFloat32 == a_type && mshadow::kFloat32 == b_type) ?
-    mshadow::kFloat32 :
-    mshadow::kFloat64;
+  const mshadow::TypeFlag floatFlag = (mshadow::kFloat32 == a_type && mshadow::kFloat32 == b_type)
+                                          ? mshadow::kFloat32
+                                          : mshadow::kFloat64;
   TYPE_ASSIGN_CHECK(*out_attrs, 0, floatFlag);
   TYPE_ASSIGN_CHECK(*out_attrs, 1, floatFlag);
   TYPE_ASSIGN_CHECK(*out_attrs, 2, index_type_flag);
   TYPE_ASSIGN_CHECK(*out_attrs, 3, floatFlag);
 
-  return out_attrs->at(0) != -1 &&
-         out_attrs->at(1) != -1 &&
-         out_attrs->at(2) != -1 &&
+  return out_attrs->at(0) != -1 && out_attrs->at(1) != -1 && out_attrs->at(2) != -1 &&
          out_attrs->at(3) != -1;
 }
 
 DMLC_REGISTER_PARAMETER(LstsqParam);
 
 NNVM_REGISTER_OP(_npi_lstsq)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(mxnet::op::ParamParser<LstsqParam>)
-.set_num_inputs(2)
-.set_num_outputs(4)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A", "B"};
-})
-.set_attr<nnvm::FInferType>("FInferType", LstsqOpType)
-.set_attr<FInferStorageType>("FInferStorageType", LstsqOpStorageType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FComputeEx>("FComputeEx<cpu>", LstsqOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of matrix")
-.add_argument("B", "NDArray-or-Symbol", "Tensor of matrix")
-.add_arguments(LstsqParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(mxnet::op::ParamParser<LstsqParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(4)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "B"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", LstsqOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", LstsqOpStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FComputeEx>("FComputeEx<cpu>", LstsqOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_argument("B", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_arguments(LstsqParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_lstsq.cu b/src/operator/numpy/linalg/np_lstsq.cu
index df8d7869f563..d02524b81684 100644
--- a/src/operator/numpy/linalg/np_lstsq.cu
+++ b/src/operator/numpy/linalg/np_lstsq.cu
@@ -28,8 +28,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_lstsq)
-.set_attr<FComputeEx>("FComputeEx<gpu>", LstsqOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_lstsq).set_attr<FComputeEx>("FComputeEx<gpu>", LstsqOpForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_matrix_rank-inl.h b/src/operator/numpy/linalg/np_matrix_rank-inl.h
index 5d8bd95572da..bc1d3d8ee182 100644
--- a/src/operator/numpy/linalg/np_matrix_rank-inl.h
+++ b/src/operator/numpy/linalg/np_matrix_rank-inl.h
@@ -44,15 +44,10 @@ struct MatrixRankNoneTolParam : public dmlc::Parameter<MatrixRankNoneTolParam> {
   double finfoEps64;
   bool hermitian;
   DMLC_DECLARE_PARAMETER(MatrixRankNoneTolParam) {
-    DMLC_DECLARE_FIELD(finfoEps32)
-    .set_default(0)
-    .describe("Machine limits for float32 type");
-    DMLC_DECLARE_FIELD(finfoEps64)
-    .set_default(0)
-    .describe("Machine limits for float64 type");
-    DMLC_DECLARE_FIELD(hermitian)
-    .set_default(false)
-    .describe("If True, M is assumed to be Hermitian (symmetric if real-valued).");
+    DMLC_DECLARE_FIELD(finfoEps32).set_default(0).describe("Machine limits for float32 type");
+    DMLC_DECLARE_FIELD(finfoEps64).set_default(0).describe("Machine limits for float64 type");
+    DMLC_DECLARE_FIELD(hermitian).set_default(false).describe(
+        "If True, M is assumed to be Hermitian (symmetric if real-valued).");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream finfoEps32_s, finfoEps64_s, hermitian_s;
@@ -61,16 +56,15 @@ struct MatrixRankNoneTolParam : public dmlc::Parameter<MatrixRankNoneTolParam> {
     hermitian_s << hermitian;
     (*dict)["finfoEps32"] = finfoEps32_s.str();
     (*dict)["finfoEps64"] = finfoEps64_s.str();
-    (*dict)["hermitian"] = hermitian_s.str();
+    (*dict)["hermitian"]  = hermitian_s.str();
   }
 };
 
 struct MatrixRankParam : public dmlc::Parameter<MatrixRankParam> {
   bool hermitian;
   DMLC_DECLARE_PARAMETER(MatrixRankParam) {
-    DMLC_DECLARE_FIELD(hermitian)
-    .set_default(false)
-    .describe("If True, M is assumed to be Hermitian (symmetric if real-valued).");
+    DMLC_DECLARE_FIELD(hermitian).set_default(false).describe(
+        "If True, M is assumed to be Hermitian (symmetric if real-valued).");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream hermitian_s;
@@ -79,11 +73,13 @@ struct MatrixRankParam : public dmlc::Parameter<MatrixRankParam> {
   }
 };
 
-template<int req>
+template <int req>
 struct VectorRankKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data,
-                                  int64_t *out_data, const int& data_size) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* in_data,
+                                  int64_t* out_data,
+                                  const int& data_size) {
     bool all_nozero = true;
     for (int j = 0; j < data_size; ++j) {
       if (!((in_data[j] > 0 ? in_data[j] : -in_data[j]) > 0)) {
@@ -95,16 +91,21 @@ struct VectorRankKernel {
   }
 };
 
-template<int req>
+template <int req>
 struct MatrixRankNoneTolKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, int64_t *out_data,
-                                  const int& nrow, const int& ncol, const double& finfoEps,
-                                  const int& data_size, const int& batch_size) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* in_data,
+                                  int64_t* out_data,
+                                  const int& nrow,
+                                  const int& ncol,
+                                  const double& finfoEps,
+                                  const int& data_size,
+                                  const int& batch_size) {
     if (i < batch_size) {
       DType max_singular_value = 0;
       for (int j = 0; j < data_size; ++j) {
-        DType sv = in_data[j + i * data_size];
+        DType sv           = in_data[j + i * data_size];
         max_singular_value = sv > max_singular_value ? sv : max_singular_value;
       }
       double tol = (nrow > ncol ? nrow : ncol) * static_cast<double>(max_singular_value) * finfoEps;
@@ -117,11 +118,14 @@ struct MatrixRankNoneTolKernel {
   }
 };
 
-template<int req>
+template <int req>
 struct MatrixRankKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, int64_t *out_data,
-                                  const int& data_size, const int& batch_size) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* in_data,
+                                  int64_t* out_data,
+                                  const int& data_size,
+                                  const int& batch_size) {
     if (i < batch_size) {
       int64_t rank_num = 0;
       for (int j = 0; j < data_size; ++j) {
@@ -133,36 +137,44 @@ struct MatrixRankKernel {
 };
 
 struct SVDWrapper {
-  template<typename xpu, typename DType>
-  static void op(const TBlob& a, const TBlob& s,
-                 const TBlob& u, const mxnet::TShape& ut_shape,
-                 const TBlob& v, const mxnet::TShape& vt_shape,
-                 const TBlob& work, const OpContext& ctx) {
-    Stream<xpu> *s_xpu = ctx.get_stream<xpu>();
-    using IndexT = typename LapackIndex<xpu>::IndexT;
+  template <typename xpu, typename DType>
+  static void op(const TBlob& a,
+                 const TBlob& s,
+                 const TBlob& u,
+                 const mxnet::TShape& ut_shape,
+                 const TBlob& v,
+                 const mxnet::TShape& vt_shape,
+                 const TBlob& work,
+                 const OpContext& ctx) {
+    Stream<xpu>* s_xpu           = ctx.get_stream<xpu>();
+    using IndexT                 = typename LapackIndex<xpu>::IndexT;
     const mxnet::TShape& a_shape = a.shape_;
     const mxnet::TShape& ut_axis = GetTransAxis(u.shape_);
-    const int a_ndim = a.ndim();
-    const IndexT nrow = a_shape[a_ndim - 2];
-    const IndexT ncol = a_shape[a_ndim - 1];
+    const int a_ndim             = a.ndim();
+    const IndexT nrow            = a_shape[a_ndim - 2];
+    const IndexT ncol            = a_shape[a_ndim - 1];
     if (nrow > ncol) {
       const_cast<TBlob&>(u) = u.reshape(ut_shape);
       const_cast<TBlob&>(v) = v.reshape(vt_shape);
       mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, a, u, ut_axis);
-      BatchSVDImpl(ncol, nrow,
+      BatchSVDImpl(ncol,
+                   nrow,
                    v.FlatToKD<xpu, 3, DType>(s_xpu),
                    s.FlatToKD<xpu, 2, DType>(s_xpu),
                    u.FlatToKD<xpu, 3, DType>(s_xpu),
-                   work.FlatToKD<xpu, 1, DType>(s_xpu), s_xpu);
+                   work.FlatToKD<xpu, 1, DType>(s_xpu),
+                   s_xpu);
     } else {
       if (a.dptr<DType>() != v.dptr<DType>()) {
         Copy(v.FlatToKD<xpu, 3, DType>(s_xpu), a.FlatToKD<xpu, 3, DType>(s_xpu), s_xpu);
       }
-      BatchSVDImpl(nrow, ncol,
+      BatchSVDImpl(nrow,
+                   ncol,
                    u.FlatToKD<xpu, 3, DType>(s_xpu),
                    s.FlatToKD<xpu, 2, DType>(s_xpu),
                    v.FlatToKD<xpu, 3, DType>(s_xpu),
-                   work.FlatToKD<xpu, 1, DType>(s_xpu), s_xpu);
+                   work.FlatToKD<xpu, 1, DType>(s_xpu),
+                   s_xpu);
     }
   }
 };
@@ -170,16 +182,18 @@ struct SVDWrapper {
 inline void GetOrCheckBroadcastShape(const nnvm::NodeAttrs& attrs,
                                      const mxnet::TShape& a_shape,
                                      const mxnet::TShape& tol_shape,
-                                     mxnet::TShape *broadcast_shape = nullptr,
-                                     mxnet::TShape *new_tol_shape = nullptr) {
+                                     mxnet::TShape* broadcast_shape = nullptr,
+                                     mxnet::TShape* new_tol_shape   = nullptr) {
   CHECK_GE(a_shape.ndim(), 2);
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim   = a_shape.ndim();
   const int tol_ndim = tol_shape.ndim();
-  const int nrow = a_shape[a_ndim - 2];
-  const int ncol = a_shape[a_ndim - 1];
+  const int nrow     = a_shape[a_ndim - 2];
+  const int ncol     = a_shape[a_ndim - 1];
   // Get new tol shape.
   mxnet::TShape temp_new_tol_shape(tol_ndim + 1, 1);
-  for (int i = 0; i < tol_ndim; ++i) { temp_new_tol_shape[i] = tol_shape[i]; }
+  for (int i = 0; i < tol_ndim; ++i) {
+    temp_new_tol_shape[i] = tol_shape[i];
+  }
   // Get singular value shape.
   mxnet::TShape temp_s_shape(a_ndim - 1, 0);
   for (int i = 0; i < a_ndim - 2; ++i) {
@@ -187,7 +201,7 @@ inline void GetOrCheckBroadcastShape(const nnvm::NodeAttrs& attrs,
   }
   temp_s_shape[a_ndim - 2] = std::min(nrow, ncol);
   // Check binary broadcast shape.
-  mxnet::ShapeVector in_shape_vec({ temp_s_shape, temp_new_tol_shape });
+  mxnet::ShapeVector in_shape_vec({temp_s_shape, temp_new_tol_shape});
   mxnet::ShapeVector out_shape_vec(1, mxnet::TShape());
   mxnet::op::BinaryBroadcastShape(attrs, &in_shape_vec, &out_shape_vec);
   // Assign shape.
@@ -199,19 +213,19 @@ inline void GetOrCheckBroadcastShape(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 struct WSQ {
   static size_t SVDWorkspaceSizeQuery(const TBlob& a,
                                       const mxnet::TShape& u_shape,
                                       const mxnet::TShape& s_shape,
                                       const mxnet::TShape& v_shape,
                                       const OpContext& ctx) {
-    size_t workspace_size = 0;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const int a_ndim = a.shape_.ndim();
-    const int u_ndim = u_shape.ndim();
-    const int s_ndim = s_shape.ndim();
-    const int v_ndim = v_shape.ndim();
+    size_t workspace_size  = 0;
+    Stream<xpu>* s         = ctx.get_stream<xpu>();
+    const int a_ndim       = a.shape_.ndim();
+    const int u_ndim       = u_shape.ndim();
+    const int s_ndim       = s_shape.ndim();
+    const int v_ndim       = v_shape.ndim();
     mxnet::TShape u_shape2 = Shape2(u_shape[u_ndim - 2], u_shape[u_ndim - 1]);
     mxnet::TShape s_shape1 = Shape1(s_shape[s_ndim - 1]);
     mxnet::TShape v_shape2 = Shape2(v_shape[v_ndim - 2], v_shape[v_ndim - 1]);
@@ -221,17 +235,19 @@ struct WSQ {
       std::vector<DType> v_vec(v_shape2.Size(), 0);
       // Get workspace size in linalg_gesdd.
       workspace_size += linalg_gesdd_workspace_query<xpu, DType, lapack_index_t>(
-        a.shape_[a_ndim - 2], a.shape_[a_ndim - 1],
-        TBlob(u_vec.data(), u_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, DType>(s),
-        TBlob(s_vec.data(), s_shape1, a.dev_mask(), a.dev_id()).get<xpu, 1, DType>(s),
-        TBlob(v_vec.data(), v_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, DType>(s), s);
+          a.shape_[a_ndim - 2],
+          a.shape_[a_ndim - 1],
+          TBlob(u_vec.data(), u_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, DType>(s),
+          TBlob(s_vec.data(), s_shape1, a.dev_mask(), a.dev_id()).get<xpu, 1, DType>(s),
+          TBlob(v_vec.data(), v_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, DType>(s),
+          s);
     } else {
       Storage::Handle u_handle =
-        Storage::Get()->Alloc(sizeof(DType) * u_shape2.Size(), Context::GPU());
+          Storage::Get()->Alloc(sizeof(DType) * u_shape2.Size(), Context::GPU());
       Storage::Handle s_handle =
-        Storage::Get()->Alloc(sizeof(DType) * s_shape1.Size(), Context::GPU());
+          Storage::Get()->Alloc(sizeof(DType) * s_shape1.Size(), Context::GPU());
       Storage::Handle v_handle =
-        Storage::Get()->Alloc(sizeof(DType) * v_shape2.Size(), Context::GPU());
+          Storage::Get()->Alloc(sizeof(DType) * v_shape2.Size(), Context::GPU());
       TBlob u_data(static_cast<DType*>(u_handle.dptr), u_shape2, a.dev_mask(), a.dev_id());
       TBlob s_data(static_cast<DType*>(s_handle.dptr), s_shape1, a.dev_mask(), a.dev_id());
       TBlob v_data(static_cast<DType*>(v_handle.dptr), v_shape2, a.dev_mask(), a.dev_id());
@@ -239,11 +255,13 @@ struct WSQ {
       if (a.shape_[a_ndim - 2] >= a.shape_[a_ndim - 1]) {
         workspace_size += linalg_gesvd_workspace_query(v_data.get<xpu, 2, DType>(s),
                                                        s_data.get<xpu, 1, DType>(s),
-                                                       u_data.get<xpu, 2, DType>(s), s);
+                                                       u_data.get<xpu, 2, DType>(s),
+                                                       s);
       } else {
         workspace_size += linalg_gesvd_workspace_query(u_data.get<xpu, 2, DType>(s),
                                                        s_data.get<xpu, 1, DType>(s),
-                                                       v_data.get<xpu, 2, DType>(s), s);
+                                                       v_data.get<xpu, 2, DType>(s),
+                                                       s);
       }
       Storage::Get()->Free(u_handle);
       Storage::Get()->Free(s_handle);
@@ -252,7 +270,7 @@ struct WSQ {
     return workspace_size;
   }
 
-  static size_t MatrixRankNoneTolForwardWSQ(size_t *svd_workspace_size,
+  static size_t MatrixRankNoneTolForwardWSQ(size_t* svd_workspace_size,
                                             const TBlob& a,
                                             const OpContext& ctx) {
     size_t workspace_size = 0;
@@ -266,14 +284,14 @@ struct WSQ {
     return workspace_size * sizeof(DType);
   }
 
-  static size_t MatrixRankForwardWSQ(size_t *svd_workspace_size,
+  static size_t MatrixRankForwardWSQ(size_t* svd_workspace_size,
                                      const TBlob& a,
                                      const TBlob& tol,
                                      const nnvm::NodeAttrs& attrs,
                                      const OpContext& ctx) {
-    const mxnet::TShape a_shape = a.shape_;
+    const mxnet::TShape a_shape   = a.shape_;
     const mxnet::TShape tol_shape = tol.shape_;
-    size_t workspace_size = 0;
+    size_t workspace_size         = 0;
     mxnet::TShape u_shape, s_shape, v_shape;
     GetPinvShape(a.shape_, &u_shape, &s_shape, &v_shape);
     mxnet::TShape broadcast_shape, new_tol_shape;
@@ -289,42 +307,42 @@ struct WSQ {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void MatrixRankNoneTolForwardImpl(const TBlob& a,
                                   const TBlob& rank,
                                   const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<OpReqType>& req) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
   const mxnet::TShape& a_shape = a.shape_;
-  const int a_ndim = a.ndim();
+  const int a_ndim             = a.ndim();
   MSHADOW_SGL_DBL_TYPE_SWITCH(a.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       if (a_ndim < 2) {
         mxnet_op::Kernel<VectorRankKernel<req_type>, xpu>::Launch(
-          s, 1, a.dptr<DType>(), rank.dptr<int64_t>(), a.Size());
+            s, 1, a.dptr<DType>(), rank.dptr<int64_t>(), a.Size());
         return;
       }
       // a_ndim >= 2
-      const int nrow = a_shape[a_ndim - 2];
-      const int ncol = a_shape[a_ndim - 1];
+      const int nrow                      = a_shape[a_ndim - 2];
+      const int ncol                      = a_shape[a_ndim - 1];
       const MatrixRankNoneTolParam& param = nnvm::get<MatrixRankNoneTolParam>(attrs.parsed);
       CHECK_EQ(param.hermitian, false)
-        << "matrix_rank not support param.hermitian = true at present.";
+          << "matrix_rank not support param.hermitian = true at present.";
       double finfoEps = a.type_flag_ == mshadow::kFloat32 ? param.finfoEps32 : param.finfoEps64;
       // Step1: Calculate workspace size.
       size_t svd_workspace_size = 0;
       size_t workspace_size =
-        WSQ<xpu, DType>::MatrixRankNoneTolForwardWSQ(&svd_workspace_size, a, ctx);
+          WSQ<xpu, DType>::MatrixRankNoneTolForwardWSQ(&svd_workspace_size, a, ctx);
       Tensor<xpu, 1, char> workspace =
-        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+          ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
       // Step2: Allocate memory.
       mxnet::TShape s_shape, u_shape, v_shape, ut_shape, vt_shape;
       GetPinvShape(a_shape, &u_shape, &s_shape, &v_shape, &ut_shape, &vt_shape);
-      DType *s_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-      DType *u_ptr = s_ptr + s_shape.Size();
-      DType *v_ptr = u_ptr + u_shape.Size();
-      DType *work_ptr = v_ptr + v_shape.Size();
+      DType* s_ptr    = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* u_ptr    = s_ptr + s_shape.Size();
+      DType* v_ptr    = u_ptr + u_shape.Size();
+      DType* work_ptr = v_ptr + v_shape.Size();
       TBlob s_data(s_ptr, s_shape, a.dev_mask(), a.dev_id());
       TBlob u_data(u_ptr, u_shape, a.dev_mask(), a.dev_id());
       TBlob v_data(v_ptr, v_shape, a.dev_mask(), a.dev_id());
@@ -332,18 +350,22 @@ void MatrixRankNoneTolForwardImpl(const TBlob& a,
       // Step3: SVD.
       SVDWrapper::op<xpu, DType>(a, s_data, u_data, ut_shape, v_data, vt_shape, work_data, ctx);
       // Step4: Calculate rank.
-      const int data_size = s_data.size(s_data.ndim() - 1);
+      const int data_size  = s_data.size(s_data.ndim() - 1);
       const int batch_size = a_ndim == 2 ? 1 : s_shape.ProdShape(0, s_shape.ndim() - 1);
-      mxnet_op::Kernel<MatrixRankNoneTolKernel<req_type>, xpu>::Launch(s, batch_size,
+      mxnet_op::Kernel<MatrixRankNoneTolKernel<req_type>, xpu>::Launch(s,
+                                                                       batch_size,
                                                                        s_data.dptr<DType>(),
                                                                        rank.dptr<int64_t>(),
-                                                                       nrow, ncol, finfoEps,
-                                                                       data_size, batch_size);
+                                                                       nrow,
+                                                                       ncol,
+                                                                       finfoEps,
+                                                                       data_size,
+                                                                       batch_size);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void MatrixRankNoneTolForward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -352,10 +374,12 @@ void MatrixRankNoneTolForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
 
-  const TBlob& a = inputs[0];
+  const TBlob& a    = inputs[0];
   const TBlob& rank = outputs[0];
   MatrixRankNoneTolForwardImpl<xpu>(a, rank, attrs, ctx, req);
 }
@@ -365,31 +389,34 @@ void MatrixRankNoneTolForward(const nnvm::NodeAttrs& attrs,
 #define NP_LINALG_MATRIX_RANK_BROADCAST(OP, RTCOP) \
   mxnet::op::BinaryBroadcastCompute<xpu, op::mshadow_op::OP>
 #else
-#define NP_LINALG_MATRIX_RANK_BROADCAST(OP, RTCOP) mxnet::op::BinaryBroadcastRTCCompute {#RTCOP}
+#define NP_LINALG_MATRIX_RANK_BROADCAST(OP, RTCOP) \
+  mxnet::op::BinaryBroadcastRTCCompute {           \
+#RTCOP                                         \
+  }
 #endif
 
-template<typename xpu>
+template <typename xpu>
 void MatrixRankForwardImpl(const TBlob& a,
                            const TBlob& tol,
                            const TBlob& rank,
                            const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<OpReqType>& req) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const mxnet::TShape& a_shape = a.shape_;
+  Stream<xpu>* s                 = ctx.get_stream<xpu>();
+  const mxnet::TShape& a_shape   = a.shape_;
   const mxnet::TShape& tol_shape = tol.shape_;
-  const int a_ndim = a.ndim();
+  const int a_ndim               = a.ndim();
   MSHADOW_SGL_DBL_TYPE_SWITCH(a.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       if (a_ndim < 2) {
         mxnet_op::Kernel<VectorRankKernel<req_type>, xpu>::Launch(
-          s, 1, a.dptr<DType>(), rank.dptr<int64_t>(), a.Size());
+            s, 1, a.dptr<DType>(), rank.dptr<int64_t>(), a.Size());
         return;
       }
       // a_ndim >= 2
       const MatrixRankParam& param = nnvm::get<MatrixRankParam>(attrs.parsed);
       CHECK_EQ(param.hermitian, false)
-        << "matrix_rank not support param.hermitian = true at present.";
+          << "matrix_rank not support param.hermitian = true at present.";
       mxnet::TShape s_shape, u_shape, v_shape, ut_shape, vt_shape;
       GetPinvShape(a_shape, &u_shape, &s_shape, &v_shape, &ut_shape, &vt_shape);
       mxnet::TShape broadcast_shape, new_tol_shape;
@@ -397,16 +424,16 @@ void MatrixRankForwardImpl(const TBlob& a,
       // Step1: Calculate workspace size.
       size_t svd_workspace_size = 0;
       size_t workspace_size =
-        WSQ<xpu, DType>::MatrixRankForwardWSQ(&svd_workspace_size, a, tol, attrs, ctx);
+          WSQ<xpu, DType>::MatrixRankForwardWSQ(&svd_workspace_size, a, tol, attrs, ctx);
       Tensor<xpu, 1, char> workspace =
-        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+          ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
       // Step2: Allocate memory.
-      DType *s_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-      DType *u_ptr = s_ptr + s_shape.Size();
-      DType *v_ptr = u_ptr + u_shape.Size();
-      DType *work_ptr = v_ptr + v_shape.Size();
-      DType *new_tol_ptr = work_ptr + svd_workspace_size;
-      DType *broadcast_ptr = new_tol_ptr + new_tol_shape.Size();
+      DType* s_ptr         = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* u_ptr         = s_ptr + s_shape.Size();
+      DType* v_ptr         = u_ptr + u_shape.Size();
+      DType* work_ptr      = v_ptr + v_shape.Size();
+      DType* new_tol_ptr   = work_ptr + svd_workspace_size;
+      DType* broadcast_ptr = new_tol_ptr + new_tol_shape.Size();
       TBlob s_data(s_ptr, s_shape, a.dev_mask(), a.dev_id());
       TBlob u_data(u_ptr, u_shape, a.dev_mask(), a.dev_id());
       TBlob v_data(v_ptr, v_shape, a.dev_mask(), a.dev_id());
@@ -419,24 +446,21 @@ void MatrixRankForwardImpl(const TBlob& a,
       if (new_tol_data.dptr<DType>() != tol.dptr<DType>()) {
         Copy(new_tol_data.FlatTo1D<xpu, DType>(s), tol.FlatTo1D<xpu, DType>(s), s);
       }
-      NP_LINALG_MATRIX_RANK_BROADCAST(gt, greater)(attrs, ctx,
-                                                   {s_data, new_tol_data},
-                                                   {kWriteTo}, {broadcast_data});
+      NP_LINALG_MATRIX_RANK_BROADCAST(gt, greater)
+      (attrs, ctx, {s_data, new_tol_data}, {kWriteTo}, {broadcast_data});
       // Step5: Calculate rank.
-      const int b_ndim  = broadcast_shape.ndim();
-      const int data_size = broadcast_data.size(b_ndim - 1);
+      const int b_ndim     = broadcast_shape.ndim();
+      const int data_size  = broadcast_data.size(b_ndim - 1);
       const int batch_size = b_ndim == 1 ? 1 : broadcast_shape.ProdShape(0, b_ndim - 1);
-      mxnet_op::Kernel<MatrixRankKernel<req_type>, xpu>::Launch(s, batch_size,
-                                                                broadcast_data.dptr<DType>(),
-                                                                rank.dptr<int64_t>(),
-                                                                data_size, batch_size);
+      mxnet_op::Kernel<MatrixRankKernel<req_type>, xpu>::Launch(
+          s, batch_size, broadcast_data.dptr<DType>(), rank.dptr<int64_t>(), data_size, batch_size);
     });
   });
 }
 
 #undef NP_LINALG_MATRIX_RANK_BROADCAST
 
-template<typename xpu>
+template <typename xpu>
 void MatrixRankForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -445,11 +469,13 @@ void MatrixRankForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
 
-  const TBlob& a = inputs[0];
-  const TBlob& tol = inputs[1];
+  const TBlob& a    = inputs[0];
+  const TBlob& tol  = inputs[1];
   const TBlob& rank = outputs[0];
   MatrixRankForwardImpl<xpu>(a, tol, rank, attrs, ctx, req);
 }
diff --git a/src/operator/numpy/linalg/np_matrix_rank.cc b/src/operator/numpy/linalg/np_matrix_rank.cc
index d3794a1de0e9..1a9ce948a155 100644
--- a/src/operator/numpy/linalg/np_matrix_rank.cc
+++ b/src/operator/numpy/linalg/np_matrix_rank.cc
@@ -28,21 +28,22 @@ namespace mxnet {
 namespace op {
 
 inline bool MatrixRankNoneTolShape(const nnvm::NodeAttrs& attrs,
-                                   mxnet::ShapeVector *in_attrs,
-                                   mxnet::ShapeVector *out_attrs) {
+                                   mxnet::ShapeVector* in_attrs,
+                                   mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& a_shape = (*in_attrs)[0];
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim             = a_shape.ndim();
 
   if (shape_is_known(a_shape)) {
-    CHECK_GT(a_shape.Size(), 0U)
-      << "Not support zero-size input array which has no identity";
+    CHECK_GT(a_shape.Size(), 0U) << "Not support zero-size input array which has no identity";
     if (a_ndim < 2) {
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(0, 0));
     } else {
       mxnet::TShape rank_shape(a_ndim - 2, 0);
-      for (int i = 0; i < a_ndim - 2; ++i) { rank_shape[i] = a_shape[i]; }
+      for (int i = 0; i < a_ndim - 2; ++i) {
+        rank_shape[i] = a_shape[i];
+      }
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, rank_shape);
     }
   }
@@ -56,10 +57,9 @@ inline bool MatrixRankNoneTolType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
   int a_type = in_attrs->at(0);
 
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg.";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg.";
   CHECK(a_type == mshadow::kFloat32 || a_type == mshadow::kFloat64)
-    << "array type should be float32 or float64.";
+      << "array type should be float32 or float64.";
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
   return out_attrs->at(0) != -1;
 }
@@ -67,36 +67,37 @@ inline bool MatrixRankNoneTolType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(MatrixRankNoneTolParam);
 
 NNVM_REGISTER_OP(_npi_matrix_rank_none_tol)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(mxnet::op::ParamParser<MatrixRankNoneTolParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"M"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", MatrixRankNoneTolShape)
-.set_attr<nnvm::FInferType>("FInferType", MatrixRankNoneTolType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", MatrixRankNoneTolForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("M", "NDArray-or-Symbol", "Tensor of matrix")
-.add_arguments(MatrixRankNoneTolParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(mxnet::op::ParamParser<MatrixRankNoneTolParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"M"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", MatrixRankNoneTolShape)
+    .set_attr<nnvm::FInferType>("FInferType", MatrixRankNoneTolType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", MatrixRankNoneTolForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("M", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_arguments(MatrixRankNoneTolParam::__FIELDS__());
 
 inline bool MatrixRankShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const mxnet::TShape& a_shape = (*in_attrs)[0];
+  const mxnet::TShape& a_shape   = (*in_attrs)[0];
   const mxnet::TShape& tol_shape = (*in_attrs)[1];
-  const int a_ndim = a_shape.ndim();
-  const int tol_ndim = tol_shape.ndim();
+  const int a_ndim               = a_shape.ndim();
+  const int tol_ndim             = tol_shape.ndim();
 
   if (shape_is_known(a_shape) && shape_is_known(tol_shape)) {
-    CHECK_GT(a_shape.Size(), 0U)
-      << "Not support zero-size input array which has no identity";
+    CHECK_GT(a_shape.Size(), 0U) << "Not support zero-size input array which has no identity";
     if (a_ndim < 2) {
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(0, 0));
     } else {
@@ -125,17 +126,15 @@ inline bool MatrixRankType(const nnvm::NodeAttrs& attrs,
                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  int a_type = in_attrs->at(0);
+  int a_type   = in_attrs->at(0);
   int tol_type = in_attrs->at(1);
 
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg.";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg.";
   CHECK(a_type == mshadow::kFloat32 || a_type == mshadow::kFloat64)
-    << "array type should be float32 or float64.";
+      << "array type should be float32 or float64.";
   CHECK(tol_type == mshadow::kFloat32 || tol_type == mshadow::kFloat64)
-    << "tol type should be float32 or float64.";
-  CHECK_EQ(a_type, tol_type)
-    << "array type and tol type should be the same.";
+      << "tol type should be float32 or float64.";
+  CHECK_EQ(a_type, tol_type) << "array type and tol type should be the same.";
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
   return out_attrs->at(0) != -1;
 }
@@ -143,23 +142,25 @@ inline bool MatrixRankType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(MatrixRankParam);
 
 NNVM_REGISTER_OP(_npi_matrix_rank)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(mxnet::op::ParamParser<MatrixRankParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"M", "tol"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", MatrixRankShape)
-.set_attr<nnvm::FInferType>("FInferType", MatrixRankType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", MatrixRankForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("M", "NDArray-or-Symbol", "Tensor of matrix")
-.add_argument("tol", "NDArray-or-Symbol", "Tensor of matrix")
-.add_arguments(MatrixRankParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(mxnet::op::ParamParser<MatrixRankParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"M", "tol"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", MatrixRankShape)
+    .set_attr<nnvm::FInferType>("FInferType", MatrixRankType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", MatrixRankForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("M", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_argument("tol", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_arguments(MatrixRankParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_matrix_rank.cu b/src/operator/numpy/linalg/np_matrix_rank.cu
index 9528f698d35c..95efee7bc122 100644
--- a/src/operator/numpy/linalg/np_matrix_rank.cu
+++ b/src/operator/numpy/linalg/np_matrix_rank.cu
@@ -29,10 +29,9 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_matrix_rank_none_tol)
-.set_attr<FCompute>("FCompute<gpu>", MatrixRankNoneTolForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", MatrixRankNoneTolForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_matrix_rank)
-.set_attr<FCompute>("FCompute<gpu>", MatrixRankForward<gpu>);
+NNVM_REGISTER_OP(_npi_matrix_rank).set_attr<FCompute>("FCompute<gpu>", MatrixRankForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_norm-inl.h b/src/operator/numpy/linalg/np_norm-inl.h
index 60dee6ac3492..1a280563c60a 100644
--- a/src/operator/numpy/linalg/np_norm-inl.h
+++ b/src/operator/numpy/linalg/np_norm-inl.h
@@ -46,8 +46,8 @@ namespace mshadow_op {
 
 struct nrmlp {
   double lp;
-  MSHADOW_XINLINE nrmlp(): lp(2) {}
-  MSHADOW_XINLINE nrmlp(double l): lp(l) {}
+  MSHADOW_XINLINE nrmlp() : lp(2) {}
+  MSHADOW_XINLINE nrmlp(double l) : lp(l) {}
 
   /* \brief power for Lp norm */
   MSHADOW_XINLINE static double lp_power(volatile double src, volatile double p) {
@@ -63,16 +63,18 @@ struct nrmlp {
   }
 
   /*! \brief do reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE void Reduce(volatile AType& sum_of_powers, volatile DType src) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE void Reduce(volatile AType& sum_of_powers, volatile DType src) {  // NOLINT(*)
     if (src != 0) {
       sum_of_powers += AType(lp_power(static_cast<double>(src), lp));
     }
   }
 
   /*! \brief do stable reduction into dst */
-  template<typename AType, typename DType>
-  MSHADOW_XINLINE void Reduce(volatile AType& sum_of_powers, volatile DType src, volatile DType& scale) { // NOLINT(*)
+  template <typename AType, typename DType>
+  MSHADOW_XINLINE void Reduce(volatile AType& sum_of_powers,  // NOLINT(*)
+                              volatile DType src,
+                              volatile DType& scale) {  // NOLINT(*)
 #pragma GCC diagnostic push
 #if __GNUC__ >= 7
 #pragma GCC diagnostic ignored "-Wint-in-bool-context"
@@ -82,7 +84,7 @@ struct nrmlp {
       if (scale < src_abs) {
         sum_of_powers = sum_of_powers * AType(lp_power(static_cast<double>(scale / src_abs), lp));
         sum_of_powers = sum_of_powers + 1;
-        scale = src_abs;
+        scale         = src_abs;
       } else {
         sum_of_powers = sum_of_powers + AType(lp_power(static_cast<double>(src_abs / scale), lp));
       }
@@ -91,14 +93,18 @@ struct nrmlp {
   }
 
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_val, volatile DType& src_val) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_val,    // NOLINT(*)
+                                    volatile DType& src_val) {  // NOLINT(*)
     dst_val += src_val;
   }
 
   /*! \brief combine the results of two reducers */
-  template<typename DType>
-  MSHADOW_XINLINE static void Merge(volatile DType& dst_ssq, volatile DType& dst_scale, volatile DType& src_ssq, volatile DType& src_scale) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Merge(volatile DType& dst_ssq,      // NOLINT(*)
+                                    volatile DType& dst_scale,    // NOLINT(*)
+                                    volatile DType& src_ssq,      // NOLINT(*)
+                                    volatile DType& src_scale) {  // NOLINT(*)
     if (dst_scale != 0 && dst_scale >= src_scale) {
       dst_ssq = dst_ssq + src_ssq * DType(lp_power(static_cast<double>(src_scale / dst_scale), 2));
     } else if (src_scale != 0 && dst_scale < src_scale) {
@@ -108,16 +114,17 @@ struct nrmlp {
   }
 
   /*! \brief finalize reduction result */
-  template<typename DType>
-  MSHADOW_XINLINE void Finalize(volatile DType& sum_of_powers) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE void Finalize(volatile DType& sum_of_powers) {  // NOLINT(*)
     if (lp != 0.0) {
       sum_of_powers = DType(lp_power(static_cast<double>(sum_of_powers), 1.0 / lp));
     }
   }
 
   /*! \brief finalize reduction result */
-  template<typename DType>
-  MSHADOW_XINLINE void Finalize(volatile DType& sum_of_powers, volatile DType& scale) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE void Finalize(volatile DType& sum_of_powers,  // NOLINT(*)
+                                volatile DType& scale) {        // NOLINT(*)
 #pragma GCC diagnostic push
 #if __GNUC__ >= 7
 #pragma GCC diagnostic ignored "-Wint-in-bool-context"
@@ -131,16 +138,16 @@ struct nrmlp {
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &sum_of_powers) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& sum_of_powers) {  // NOLINT(*)
     sum_of_powers = 0;
   }
 
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &sum_of_powers, DType &scale) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& sum_of_powers, DType& scale) {  // NOLINT(*)
     SetInitValue(sum_of_powers);
     scale = 0;
   }
@@ -149,17 +156,17 @@ struct nrmlp {
 /*! \brief Elementwise gradient of Lp-norm, does not handle p = 1 */
 struct nrmlp_grad : public mxnet_op::tunable {
   double lp;
-  MSHADOW_XINLINE nrmlp_grad(): lp(2) {}
-  MSHADOW_XINLINE nrmlp_grad(double l): lp(l) {}
+  MSHADOW_XINLINE nrmlp_grad() : lp(2) {}
+  MSHADOW_XINLINE nrmlp_grad(double l) : lp(l) {}
 
   /* \brief elementwise gradient of lp norm */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE DType Map(DType a, DType b) {
     DType ret;
     if (lp != 0.0) {  // dx_i = (|x_i| / y) ^ (p - 1) * sgn(x_i)
       DType abs_a = DType(abs::Map(a));
       DType sgn_a = DType(sign::Map(a));
-      ret = power::Map(DType(abs_a / b), DType(lp - 1)) * sgn_a;
+      ret         = power::Map(DType(abs_a / b), DType(lp - 1)) * sgn_a;
     } else {  // L0 norm is elementwise constant and non-differentiable
       ret = 0;
     }
@@ -169,18 +176,17 @@ struct nrmlp_grad : public mxnet_op::tunable {
 
 /*! \brief Gradient for abs-min/max */
 struct abs_grad : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
-    DType sgn = DType(sign::Map(a));
-    DType grad = DType(abs::Map(a)) == DType(abs::Map(b)) ?
-                 DType(1.0) : DType(0.0);
+    DType sgn  = DType(sign::Map(a));
+    DType grad = DType(abs::Map(a)) == DType(abs::Map(b)) ? DType(1.0) : DType(0.0);
     return sgn * grad;
   }
 };
 
 /*! \brief Sign */
 struct abs_sign : public mxnet_op::tunable {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType Map(DType a, DType b) {
     return DType(sign::Map(a));
   }
@@ -189,26 +195,26 @@ struct abs_sign : public mxnet_op::tunable {
 }  // namespace mshadow_op
 
 inline bool NumpyLpNormShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs);
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs);
 
 inline bool NumpyMatrixNormShape(const nnvm::NodeAttrs& attrs,
-                                   mxnet::ShapeVector *in_attrs,
-                                   mxnet::ShapeVector *out_attrs);
+                                 mxnet::ShapeVector* in_attrs,
+                                 mxnet::ShapeVector* out_attrs);
 
-inline void assign_svd_empty(mxnet::ShapeVector *out_attrs);
+inline void assign_svd_empty(mxnet::ShapeVector* out_attrs);
 
 bool NumpyNormShape(const nnvm::NodeAttrs& attrs,
-                    mxnet::ShapeVector *in_attrs,
-                    mxnet::ShapeVector *out_attrs);
+                    mxnet::ShapeVector* in_attrs,
+                    mxnet::ShapeVector* out_attrs);
 
 bool NumpyNormType(const nnvm::NodeAttrs& attrs,
                    std::vector<int>* in_attrs,
                    std::vector<int>* out_attrs);
 
-TShape swapMatDims(const TShape &shape, const TShape &axis);
+TShape swapMatDims(const TShape& shape, const TShape& axis);
 
-TShape inverseTranspose(const TShape &axes);
+TShape inverseTranspose(const TShape& axes);
 
 struct NumpyNormParam : public dmlc::Parameter<NumpyNormParam> {
   double ord;
@@ -216,10 +222,11 @@ struct NumpyNormParam : public dmlc::Parameter<NumpyNormParam> {
   bool keepdims;
   int flag;
   DMLC_DECLARE_PARAMETER(NumpyNormParam) {
-    DMLC_DECLARE_FIELD(ord).set_default(2)
-    .describe("Order of the norm. inf means numpy’s inf object.");
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<mxnet::TShape>())
-    .describe(R"code(If axis is an integer, it specifies the axis of x along
+    DMLC_DECLARE_FIELD(ord).set_default(2).describe(
+        "Order of the norm. inf means numpy’s inf object.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe(R"code(If axis is an integer, it specifies the axis of x along
      which to compute the vector norms. If axis is a 2-tuple,
      it specifies the axes that hold 2-D matrices, and the matrix norms of
      these matrices are computed. If axis is None then either a vector norm (when x is 1-D)
@@ -228,13 +235,13 @@ struct NumpyNormParam : public dmlc::Parameter<NumpyNormParam> {
      If axis is a 2-tuple, it specifies the axes that hold 2-D matrices,
      and the matrix norms of these matrices are computed. If axis is None then either a
      vector norm (when x is 1-D) or a matrix norm (when x is 2-D) is returned.)code");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-    .describe("If this is set to `True`, the reduced axis is left "
-    "in the result as dimension with size one.");
-    DMLC_DECLARE_FIELD(flag).set_default(-1)
-    .describe("Mapping relations between ord and flag."
-    "ord:  None,  'fro', 'nuc', 'inf'  '-inf'."
-    "flag:  0 ,    1,      2,    3,      4. ");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axis is left "
+        "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(flag).set_default(-1).describe(
+        "Mapping relations between ord and flag."
+        "ord:  None,  'fro', 'nuc', 'inf'  '-inf'."
+        "flag:  0 ,    1,      2,    3,      4. ");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -254,16 +261,17 @@ struct NumpyNormParam : public dmlc::Parameter<NumpyNormParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyLpNormCompute(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
                         const std::vector<OpReqType>& req,
                         const std::vector<TBlob>& outputs) {
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
-  double ord = param.ord;
+  double ord                  = param.ord;
 
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
   mxnet::TShape small;
   mxnet::TShape out_shape = outputs[0].shape_;
@@ -275,11 +283,12 @@ void NumpyLpNormCompute(const nnvm::NodeAttrs& attrs,
   }
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && inputs[0].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for LpNorm with float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for LpNorm with float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
-  if (param.axis.value().ndim() != 2) {  // elementwise Lp-norm
+  if (param.axis.value().ndim() != 2) {                     // elementwise Lp-norm
     if (ord == -std::numeric_limits<double>::infinity()) {  // -inf norm
       LOG(FATAL) << "-inf norm handled in front-end.";
     } else if (param.ord == std::numeric_limits<double>::infinity()) {  // inf norm
@@ -287,19 +296,25 @@ void NumpyLpNormCompute(const nnvm::NodeAttrs& attrs,
     } else {
 #ifndef __CUDACC__
       mshadow_op::nrmlp host_reducer(param.ord);
-      mshadow_op::nrmlp *reducer_instance = nullptr;
-      reducer_instance = &host_reducer;
+      mshadow_op::nrmlp* reducer_instance = nullptr;
+      reducer_instance                    = &host_reducer;
       if (safe_acc) {
         ReduceAxesComputeImplWithReducer<xpu, mshadow_op::nrmlp, true, mshadow_op::abs>(
-          ctx, inputs, req, outputs, small, reducer_instance);
+            ctx, inputs, req, outputs, small, reducer_instance);
       } else {
         ReduceAxesComputeImplWithReducer<xpu, mshadow_op::nrmlp, false, mshadow_op::abs>(
-          ctx, inputs, req, outputs, small, reducer_instance);
+            ctx, inputs, req, outputs, small, reducer_instance);
       }
 #else
-      ReduceAxesRTCComputeImpl(
-        ctx, inputs, req, outputs, small, "red::nrmlp{" + std::to_string(param.ord) + "}",
-        nullptr, false, "abs");
+      ReduceAxesRTCComputeImpl(ctx,
+                               inputs,
+                               req,
+                               outputs,
+                               small,
+                               "red::nrmlp{" + std::to_string(param.ord) + "}",
+                               nullptr,
+                               false,
+                               "abs");
 #endif
     }
   }
@@ -308,7 +323,7 @@ void NumpyLpNormCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyLpNormGradCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -319,17 +334,17 @@ void NumpyLpNormGradCompute(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
 
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
-  double ord = param.ord;
+  double ord                  = param.ord;
   mxnet::TShape small;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   if (param.keepdims) {
     small = inputs[0].shape_;
   } else {
     small = ReduceAxesShapeImpl(outputs[0].shape_, param.axis, true, false);
   }
 
-  if (param.axis.value().ndim() != 2) {  // Elementwise Lp norm
+  if (param.axis.value().ndim() != 2) {                     // Elementwise Lp norm
     if (ord == -std::numeric_limits<double>::infinity()) {  // -inf norm
       LOG(FATAL) << "-inf norm handled in front-end.";
     } else if (ord == std::numeric_limits<double>::infinity()) {  // inf norm
@@ -341,10 +356,10 @@ void NumpyLpNormGradCompute(const nnvm::NodeAttrs& attrs,
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape;
       for (int i = 0; i < MXNET_SPECIAL_MAX_NDIM; ++i) {
         if (i < dst_shape.ndim()) {
-          in_shape[i] = src_shape[i];
+          in_shape[i]  = src_shape[i];
           out_shape[i] = dst_shape[i];
         } else {
-          in_shape[i] = 1;
+          in_shape[i]  = 1;
           out_shape[i] = 1;
         }
       }
@@ -353,55 +368,68 @@ void NumpyLpNormGradCompute(const nnvm::NodeAttrs& attrs,
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
         if (dst_shape.ndim() == 2) {
           Tensor<xpu, 2, DType> ograd =
-            inputs[0].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
+              inputs[0].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
           Tensor<xpu, 2, DType> igrad =
-            outputs[0].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
+              outputs[0].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
           Tensor<xpu, 2, DType> data =
-            inputs[1].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
+              inputs[1].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
           MXNET_REQ_TYPE_SWITCH(req[0], Req, {
-            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(
-              s, igrad.shape_.Size(), igrad.dptr_, ograd.dptr_, data.dptr_,
-              in_shape, out_shape, src_shape.ndim());
+            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(s,
+                                                              igrad.shape_.Size(),
+                                                              igrad.dptr_,
+                                                              ograd.dptr_,
+                                                              data.dptr_,
+                                                              in_shape,
+                                                              out_shape,
+                                                              src_shape.ndim());
           });
         } else {
           const int ndim = MXNET_SPECIAL_MAX_NDIM;
           Tensor<xpu, ndim, DType> igrad =
-            outputs[0].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
+              outputs[0].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
           Tensor<xpu, ndim, DType> ograd =
-            inputs[0].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
+              inputs[0].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
           Tensor<xpu, ndim, DType> data =
-            inputs[1].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
+              inputs[1].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
           MXNET_REQ_TYPE_SWITCH(req[0], Req, {
-            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(
-              s, igrad.shape_.Size(), igrad.dptr_, ograd.dptr_, data.dptr_,
-              in_shape, out_shape, src_shape.ndim());
+            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(s,
+                                                              igrad.shape_.Size(),
+                                                              igrad.dptr_,
+                                                              ograd.dptr_,
+                                                              data.dptr_,
+                                                              in_shape,
+                                                              out_shape,
+                                                              src_shape.ndim());
           });
         }
       });
     } else {  // Elementwise Lp
       mshadow_op::nrmlp_grad host_mapper(ord);
-      mshadow_op::nrmlp_grad *mapper_instance = nullptr;
+      mshadow_op::nrmlp_grad* mapper_instance = nullptr;
 #ifdef __CUDACC__
       cudaStream_t copy_stream = mshadow::Stream<gpu>::GetStream(s);
       cudaMalloc(reinterpret_cast<void**>(&mapper_instance), sizeof(mshadow_op::nrmlp_grad));
-      cudaMemcpyAsync(mapper_instance, &host_mapper, sizeof(mshadow_op::nrmlp_grad),
-                      cudaMemcpyHostToDevice, copy_stream);
+      cudaMemcpyAsync(mapper_instance,
+                      &host_mapper,
+                      sizeof(mshadow_op::nrmlp_grad),
+                      cudaMemcpyHostToDevice,
+                      copy_stream);
       cudaStreamSynchronize(copy_stream);
 #else
       mapper_instance = &host_mapper;
 #endif
       MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
         if (req[0] == kAddTo) {
-          TBlob workspace = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                              Shape1(outputs[0].shape_.Size()), s));
+          TBlob workspace = TBlob(
+              ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(outputs[0].shape_.Size()), s));
           std::vector<TBlob> temp({workspace.reshape(outputs[0].shape_)});
           ReduceAxesBackwardUseInOutImplWithMapper<xpu, mshadow_op::nrmlp_grad, false>(
-            ctx, small, inputs, req, temp, mapper_instance);
+              ctx, small, inputs, req, temp, mapper_instance);
           Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
           out += workspace.FlatTo1D<xpu, DType>(s);
         } else {
           ReduceAxesBackwardUseInOutImplWithMapper<xpu, mshadow_op::nrmlp_grad, false>(
-            ctx, small, inputs, req, outputs, mapper_instance);
+              ctx, small, inputs, req, outputs, mapper_instance);
         }
       });
 #ifdef __CUDACC__
@@ -413,7 +441,7 @@ void NumpyLpNormGradCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -423,11 +451,12 @@ void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   using namespace mxnet_op;
 
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
-  double ord = param.ord;
+  double ord                  = param.ord;
 
   TShape reduced_shape;
   if (param.keepdims) {
@@ -439,10 +468,10 @@ void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
   if (param.flag == 1) {  // Frobenius norm
 #if !defined(__CUDACC__)
     ReduceAxesComputeImpl<xpu, mshadow_op::nrm2, false, false, mshadow_op::identity>(
-      ctx, inputs, req, outputs, reduced_shape);
+        ctx, inputs, req, outputs, reduced_shape);
 #else
     ReduceAxesRTCComputeImpl(
-      ctx, inputs, req, outputs, reduced_shape, "red::nrm2{}", nullptr, false, "identity");
+        ctx, inputs, req, outputs, reduced_shape, "red::nrm2{}", nullptr, false, "identity");
 #endif
     return;
   }
@@ -450,29 +479,29 @@ void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
   TShape mat_axis = param.axis.value();
 
   if (param.ord != 2 && param.ord != -2) {  // row norm or col norm
-    TShape sum_shape = inputs[0].shape_;
+    TShape sum_shape                                          = inputs[0].shape_;
     sum_shape[mat_axis[!(param.ord == 1 || param.ord == -1)]] = 1;
-    TBlob temp = outputs[1].reshape(sum_shape);
+    TBlob temp                                                = outputs[1].reshape(sum_shape);
     std::vector<TBlob> sum_output({temp});
 #if !defined(__CUDACC__)
     ReduceAxesComputeImpl<xpu, mshadow::red::sum, false, false, mshadow_op::abs>(
-      ctx, inputs, req, sum_output, sum_shape);
+        ctx, inputs, req, sum_output, sum_shape);
     if (param.ord > 0) {
       ReduceAxesComputeImpl<xpu, mshadow::red::maximum, false, false, mshadow_op::identity>(
-        ctx, sum_output, req, outputs, reduced_shape);
+          ctx, sum_output, req, outputs, reduced_shape);
     } else {
       ReduceAxesComputeImpl<xpu, mshadow::red::minimum, false, false, mshadow_op::identity>(
-        ctx, sum_output, req, outputs, reduced_shape);
+          ctx, sum_output, req, outputs, reduced_shape);
     }
 #else
-    ReduceAxesRTCComputeImpl(ctx, inputs, req, sum_output, sum_shape,
-                             "red::sum{}", nullptr, false, "abs");
+    ReduceAxesRTCComputeImpl(
+        ctx, inputs, req, sum_output, sum_shape, "red::sum{}", nullptr, false, "abs");
     if (param.ord > 0) {
-      ReduceAxesRTCComputeImpl(ctx, sum_output, req, outputs, reduced_shape,
-                               "red::maximum{}", nullptr, false);
+      ReduceAxesRTCComputeImpl(
+          ctx, sum_output, req, outputs, reduced_shape, "red::maximum{}", nullptr, false);
     } else {
-      ReduceAxesRTCComputeImpl(ctx, sum_output, req, outputs, reduced_shape,
-                               "red::minimum{}", nullptr, false);
+      ReduceAxesRTCComputeImpl(
+          ctx, sum_output, req, outputs, reduced_shape, "red::minimum{}", nullptr, false);
     }
 #endif
     return;
@@ -483,58 +512,58 @@ void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
   }
 
   // spectral norms
-  TShape old_shape = inputs[0].shape_;
+  TShape old_shape    = inputs[0].shape_;
   TShape svd_in_shape = inputs[0].shape_;
   TShape axes(old_shape.ndim(), 1);
   for (int i = 0; i < old_shape.ndim(); ++i) {
     axes[i] = i;
   }
 
-  svd_in_shape = swapMatDims(svd_in_shape, mat_axis);
-  axes = swapMatDims(axes, mat_axis);
+  svd_in_shape       = swapMatDims(svd_in_shape, mat_axis);
+  axes               = swapMatDims(axes, mat_axis);
   TShape reduce_axes = inverseTranspose(axes);
 
-  int row_dim = svd_in_shape[svd_in_shape.ndim() - 2];
-  int col_dim = svd_in_shape[svd_in_shape.ndim() - 1];
-  int svd_dim = row_dim <= col_dim ? row_dim : col_dim;
+  int row_dim   = svd_in_shape[svd_in_shape.ndim() - 2];
+  int col_dim   = svd_in_shape[svd_in_shape.ndim() - 1];
+  int svd_dim   = row_dim <= col_dim ? row_dim : col_dim;
   int batch_dim = svd_in_shape.ProdShape(0, svd_in_shape.ndim() - 2);
 
   TShape L_shape = svd_in_shape;
   TShape L_trans = inputs[0].shape_;
   if (row_dim > col_dim) {
     L_shape[L_shape.ndim() - 2] = 1;
-    L_trans[mat_axis[0]] = 1;
+    L_trans[mat_axis[0]]        = 1;
   } else {
     L_shape[L_shape.ndim() - 1] = 1;
-    L_trans[mat_axis[1]] = 1;
+    L_trans[mat_axis[1]]        = 1;
   }
 
   std::vector<TBlob> eigen;
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     Tensor<xpu, 3, DType> UT =
-      outputs[1].get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, row_dim), s);
+        outputs[1].get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, row_dim), s);
     Tensor<xpu, 2, DType> L =
-      outputs[2].get_with_shape<xpu, 2, DType>(Shape2(batch_dim, svd_dim), s);
+        outputs[2].get_with_shape<xpu, 2, DType>(Shape2(batch_dim, svd_dim), s);
     Tensor<xpu, 3, DType> V =
-      outputs[3].get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, col_dim), s);
+        outputs[3].get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, col_dim), s);
 
     size_t svd_space = linalg_gesvd_workspace_query(UT[0], L[0], V[0], s);
-    size_t space = svd_in_shape.Size() + svd_space;
+    size_t space     = svd_in_shape.Size() + svd_space;
     space += space & 1;
     size_t offset = svd_in_shape.Size() + (1 & svd_in_shape.Size());
 
-    TBlob temp = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                        Shape1(space), s));
-    TBlob workspace(reinterpret_cast<DType*>(temp.dptr_), svd_in_shape,
-                     temp.dev_mask(), temp.dev_id());
-    TBlob svd_workspace(reinterpret_cast<DType*>(temp.dptr_) + offset, TShape(1, svd_space),
-                        temp.dev_mask(), temp.dev_id());
+    TBlob temp = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(space), s));
+    TBlob workspace(
+        reinterpret_cast<DType*>(temp.dptr_), svd_in_shape, temp.dev_mask(), temp.dev_id());
+    TBlob svd_workspace(reinterpret_cast<DType*>(temp.dptr_) + offset,
+                        TShape(1, svd_space),
+                        temp.dev_mask(),
+                        temp.dev_id());
     TransposeImpl<xpu>(ctx.run_ctx, inputs[0], workspace, axes);
     Tensor<xpu, 3, DType> svd_input =
-      workspace.get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, col_dim), s);
+        workspace.get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, col_dim), s);
     gesvd::op(svd_input, UT, L, V, ctx, attrs, &svd_workspace);
-    TBlob workspace0(reinterpret_cast<DType*>(temp.dptr_), L_trans,
-                     temp.dev_mask(), temp.dev_id());
+    TBlob workspace0(reinterpret_cast<DType*>(temp.dptr_), L_trans, temp.dev_mask(), temp.dev_id());
     TransposeImpl<xpu>(ctx.run_ctx, TBlob(L).reshape(L_shape), workspace0, reduce_axes);
     eigen.emplace_back(workspace0);
   });
@@ -542,22 +571,22 @@ void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
 #if !defined(__CUDACC__)
   if (param.flag == 2) {  // nuclear norm
     ReduceAxesComputeImpl<xpu, mshadow::red::sum, false, false, mshadow_op::identity>(
-      ctx, eigen, req, outputs, reduced_shape);
+        ctx, eigen, req, outputs, reduced_shape);
   } else if (dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true)) {
     if (ord == 2) {
       ReduceAxesComputeImpl<xpu, mshadow::red::maximum, true, false, mshadow_op::abs>(
-        ctx, eigen, req, outputs, reduced_shape);
+          ctx, eigen, req, outputs, reduced_shape);
     } else if (ord == -2) {
       ReduceAxesComputeImpl<xpu, mshadow::red::minimum, true, false, mshadow_op::abs>(
-        ctx, eigen, req, outputs, reduced_shape);
+          ctx, eigen, req, outputs, reduced_shape);
     }
   } else {
     if (ord == 2) {
       ReduceAxesComputeImpl<xpu, mshadow::red::maximum, false, false, mshadow_op::abs>(
-        ctx, eigen, req, outputs, reduced_shape);
+          ctx, eigen, req, outputs, reduced_shape);
     } else if (ord == -2) {
       ReduceAxesComputeImpl<xpu, mshadow::red::minimum, false, false, mshadow_op::abs>(
-        ctx, eigen, req, outputs, reduced_shape);
+          ctx, eigen, req, outputs, reduced_shape);
     }
   }
 #else
@@ -565,17 +594,17 @@ void NumpyMatrixNormCompute(const nnvm::NodeAttrs& attrs,
     ReduceAxesRTCComputeImpl(ctx, eigen, req, outputs, reduced_shape, "red::sum{}", nullptr, false);
   } else {
     if (ord == 2) {
-      ReduceAxesRTCComputeImpl(ctx, eigen, req, outputs, reduced_shape,
-                               "red::maximum{}", nullptr, false, "abs");
+      ReduceAxesRTCComputeImpl(
+          ctx, eigen, req, outputs, reduced_shape, "red::maximum{}", nullptr, false, "abs");
     } else if (ord == -2) {
-      ReduceAxesRTCComputeImpl(ctx, eigen, req, outputs, reduced_shape,
-                               "red::minimum{}", nullptr, false, "abs");
+      ReduceAxesRTCComputeImpl(
+          ctx, eigen, req, outputs, reduced_shape, "red::minimum{}", nullptr, false, "abs");
     }
   }
 #endif
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -585,8 +614,9 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   using namespace mxnet_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  if (req[0] == kNullOp) return;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp)
+    return;
 
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
 
@@ -605,16 +635,16 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       map_inputs = std::vector<TBlob>({inputs[0], inputs[4], inputs[5]});
       if (req[0] == kAddTo) {
-        TBlob workspace = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                            Shape1(outputs[0].shape_.Size()), s));
+        TBlob workspace = TBlob(
+            ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(outputs[0].shape_.Size()), s));
         std::vector<TBlob> temp({workspace.reshape(outputs[0].shape_)});
         ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::div, false>(
-          ctx, reduced_shape, map_inputs, req, temp);
+            ctx, reduced_shape, map_inputs, req, temp);
         Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
         out += workspace.FlatTo1D<xpu, DType>(s);
       } else {
         ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::div, false>(
-          ctx, reduced_shape, map_inputs, req, outputs);
+            ctx, reduced_shape, map_inputs, req, outputs);
       }
     });
     return;
@@ -623,56 +653,57 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
   TShape mat_axis = param.axis.value();
 
   if (param.ord != 2 && param.ord != -2) {  // row norm or col norm
-    TShape sum_shape = outputs[0].shape_;
-    TShape out_shape = outputs[0].shape_;
-    int sum_dim = mat_axis[!(param.ord == 1 || param.ord == -1)];
+    TShape sum_shape   = outputs[0].shape_;
+    TShape out_shape   = outputs[0].shape_;
+    int sum_dim        = mat_axis[!(param.ord == 1 || param.ord == -1)];
     sum_shape[sum_dim] = 1;
     TShape small(3, 1), squeezed(3, outputs[0].shape_[sum_dim]);
     squeezed[0] = small[0] = sum_shape.ProdShape(0, sum_dim);
     squeezed[2] = small[2] = sum_shape.ProdShape(sum_dim + 1, sum_shape.ndim());
-    map_inputs = std::vector<TBlob>({ inputs[0], inputs[6], inputs[5] });
+    map_inputs             = std::vector<TBlob>({inputs[0], inputs[6], inputs[5]});
 
-    size_t sum_size = sum_shape.Size();
+    size_t sum_size  = sum_shape.Size();
     size_t ws_offset = sum_size + (sum_size & 1);
-    size_t ws_size = ws_offset + (req[0] == kAddTo ? outputs[0].shape_.Size() : 0);
+    size_t ws_size   = ws_offset + (req[0] == kAddTo ? outputs[0].shape_.Size() : 0);
     ws_size += ws_size & 1;
 
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      TBlob workspace = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                                Shape1(ws_size), s));
-      TBlob temp0 = TBlob(reinterpret_cast<DType*>(workspace.dptr_),
-                          sum_shape, workspace.dev_mask(), workspace.dev_id());
-      std::vector<TBlob> map_outputs({ temp0 });
+      TBlob workspace = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(ws_size), s));
+      TBlob temp0     = TBlob(reinterpret_cast<DType*>(workspace.dptr_),
+                          sum_shape,
+                          workspace.dev_mask(),
+                          workspace.dev_id());
+      std::vector<TBlob> map_outputs({temp0});
       ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::abs_grad, false>(
-        ctx, reduced_shape, map_inputs, req, map_outputs);
-      temp0 = temp0.reshape(small);
+          ctx, reduced_shape, map_inputs, req, map_outputs);
+      temp0       = temp0.reshape(small);
       map_outputs = std::vector<TBlob>({temp0, inputs[4], inputs[6]});
       if (req[0] == kAddTo) {
         TBlob out_temp = TBlob(reinterpret_cast<DType*>(workspace.dptr_) + ws_offset,
-                               outputs[0].shape_, workspace.dev_mask(), workspace.dev_id());
-        std::vector<TBlob> tmp_outputs({ out_temp });
+                               outputs[0].shape_,
+                               workspace.dev_mask(),
+                               workspace.dev_id());
+        std::vector<TBlob> tmp_outputs({out_temp});
         ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::abs_sign, false>(
-          ctx, sum_shape, map_outputs, req, tmp_outputs);
-        out_temp = out_temp.reshape(squeezed);
-        Tensor<xpu, 3, DType> tmp_out =
-          out_temp.get_with_shape<xpu, 3, DType>(Shape3(squeezed[0], squeezed[1], squeezed[2]), s);
+            ctx, sum_shape, map_outputs, req, tmp_outputs);
+        out_temp                      = out_temp.reshape(squeezed);
+        Tensor<xpu, 3, DType> tmp_out = out_temp.get_with_shape<xpu, 3, DType>(
+            Shape3(squeezed[0], squeezed[1], squeezed[2]), s);
         Tensor<xpu, 3, DType> mask =
-          temp0.get_with_shape<xpu, 3, DType>(Shape3(small[0], small[1], small[2]), s);
-        tmp_out = tmp_out * broadcast_to(mask, squeezed);
-        TBlob final_output = outputs[0].reshape(squeezed);
-        Tensor<xpu, 3, DType> out =
-          final_output.get_with_shape<xpu, 3, DType>(
+            temp0.get_with_shape<xpu, 3, DType>(Shape3(small[0], small[1], small[2]), s);
+        tmp_out                   = tmp_out * broadcast_to(mask, squeezed);
+        TBlob final_output        = outputs[0].reshape(squeezed);
+        Tensor<xpu, 3, DType> out = final_output.get_with_shape<xpu, 3, DType>(
             Shape3(squeezed[0], squeezed[1], squeezed[2]), s);
         out += tmp_out;
       } else {
         ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::abs_sign, false>(
-          ctx, sum_shape, map_outputs, req, outputs);
-        TBlob final_output = outputs[0].reshape(squeezed);
-        Tensor<xpu, 3, DType> out =
-          final_output.get_with_shape<xpu, 3, DType>(
+            ctx, sum_shape, map_outputs, req, outputs);
+        TBlob final_output        = outputs[0].reshape(squeezed);
+        Tensor<xpu, 3, DType> out = final_output.get_with_shape<xpu, 3, DType>(
             Shape3(squeezed[0], squeezed[1], squeezed[2]), s);
         Tensor<xpu, 3, DType> mask =
-          temp0.get_with_shape<xpu, 3, DType>(Shape3(small[0], small[1], small[2]), s);
+            temp0.get_with_shape<xpu, 3, DType>(Shape3(small[0], small[1], small[2]), s);
         out = out * broadcast_to(mask, squeezed);
       }
     });
@@ -685,39 +716,38 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
   }
 
   map_inputs.push_back(inputs[0]);
-  TBlob L_reduced = inputs[5];
+  TBlob L_reduced   = inputs[5];
   TBlob L_irreduced = inputs[7];
 
-  TShape old_shape = inputs[4].shape_;
+  TShape old_shape    = inputs[4].shape_;
   TShape svd_in_shape = old_shape;
   TShape axes(old_shape.ndim(), 1);
   for (int i = 0; i < old_shape.ndim(); ++i) {
     axes[i] = i;
   }
-  svd_in_shape = swapMatDims(svd_in_shape, mat_axis);
-  axes = swapMatDims(axes, mat_axis);
+  svd_in_shape       = swapMatDims(svd_in_shape, mat_axis);
+  axes               = swapMatDims(axes, mat_axis);
   TShape reduce_axes = inverseTranspose(axes);
 
-  int row_dim = svd_in_shape[svd_in_shape.ndim() - 2];
-  int col_dim = svd_in_shape[svd_in_shape.ndim() - 1];
+  int row_dim   = svd_in_shape[svd_in_shape.ndim() - 2];
+  int col_dim   = svd_in_shape[svd_in_shape.ndim() - 1];
   int batch_dim = svd_in_shape.ProdShape(0, svd_in_shape.ndim() - 2);
 
   TShape L_shape = svd_in_shape;
   TShape L_trans = old_shape;
   if (row_dim > col_dim) {
     L_shape[L_shape.ndim() - 2] = 1;
-    L_trans[mat_axis[0]] = 1;
+    L_trans[mat_axis[0]]        = 1;
   } else {
     L_shape[L_shape.ndim() - 1] = 1;
-    L_trans[mat_axis[1]] = 1;
-  }
-  L_irreduced = L_irreduced.reshape(L_shape);
-  int kmn = outputs[0].shape_.Size();
-  int kmm = inputs[1].shape_.Size();
-  int km = inputs[2].shape_.Size();
-  size_t workspace_size = svd_in_shape.ProdShape(0, svd_in_shape.ndim()) * 2
-                            + km + kmn + 5;
-  workspace_size += req[0] == kAddTo? kmn : kmm;
+    L_trans[mat_axis[1]]        = 1;
+  }
+  L_irreduced           = L_irreduced.reshape(L_shape);
+  int kmn               = outputs[0].shape_.Size();
+  int kmm               = inputs[1].shape_.Size();
+  int km                = inputs[2].shape_.Size();
+  size_t workspace_size = svd_in_shape.ProdShape(0, svd_in_shape.ndim()) * 2 + km + kmn + 5;
+  workspace_size += req[0] == kAddTo ? kmn : kmm;
   size_t workspace_offset1 = svd_in_shape.ProdShape(0, svd_in_shape.ndim());
   workspace_offset1 += workspace_offset1 & 1;
   size_t workspace_offset2 = workspace_offset1 * 2;
@@ -730,27 +760,37 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
   size_t workspace_offset4 = workspace_offset3 + km + (km & 1);
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    TBlob workspace = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                        Shape1(workspace_size), s));
-    TBlob workspace0(reinterpret_cast<DType*>(workspace.dptr_), L_trans,
-                     workspace.dev_mask(), workspace.dev_id());
-    TBlob workspace1(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset1, L_trans,
-                     workspace.dev_mask(), workspace.dev_id());
-    TBlob tempM(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset2, inputs[1].shape_,
-                     workspace.dev_mask(), workspace.dev_id());
-    TBlob tempMd(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset3, inputs[2].shape_,
-                     workspace.dev_mask(), workspace.dev_id());
-    TBlob temp(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset4, inputs[3].shape_,
-                     workspace.dev_mask(), workspace.dev_id());
+    TBlob workspace =
+        TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s));
+    TBlob workspace0(reinterpret_cast<DType*>(workspace.dptr_),
+                     L_trans,
+                     workspace.dev_mask(),
+                     workspace.dev_id());
+    TBlob workspace1(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset1,
+                     L_trans,
+                     workspace.dev_mask(),
+                     workspace.dev_id());
+    TBlob tempM(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset2,
+                inputs[1].shape_,
+                workspace.dev_mask(),
+                workspace.dev_id());
+    TBlob tempMd(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset3,
+                 inputs[2].shape_,
+                 workspace.dev_mask(),
+                 workspace.dev_id());
+    TBlob temp(reinterpret_cast<DType*>(workspace.dptr_) + workspace_offset4,
+               inputs[3].shape_,
+               workspace.dev_mask(),
+               workspace.dev_id());
     TransposeImpl<xpu>(ctx.run_ctx, L_irreduced.reshape(L_shape), workspace0, reduce_axes);
     map_inputs.push_back(workspace0);
     map_inputs.push_back(L_reduced);
     if (param.flag == 2) {  // nuclear norm
       mxnet::op::Fill<false, DType, xpu>(s, workspace1, req[0], DType(1.0));
     } else {
-      std::vector<TBlob> reduce_output({ workspace1 });
+      std::vector<TBlob> reduce_output({workspace1});
       ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::abs_grad, false>(
-        ctx, reduced_shape, map_inputs, req, reduce_output);
+          ctx, reduced_shape, map_inputs, req, reduce_output);
     }
     workspace1 = workspace1.reshape(L_shape);
     gesvd_backward::op(inputs[1].FlatToKD<xpu, 3, DType>(s),
@@ -762,17 +802,21 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
                        temp.get_with_shape<xpu, 3, DType>(Shape3(batch_dim, row_dim, col_dim)),
                        tempM.FlatToKD<xpu, 3, DType>(s),
                        tempMd.FlatToKD<xpu, 2, DType>(s),
-                       s, attrs);
+                       s,
+                       attrs);
     Tensor<xpu, 3, DType> temp_flat = temp.FlatToKD<xpu, 3, DType>(s);
     TBlob in_grad_trans(reinterpret_cast<DType*>(workspace0.dptr_),
                         swapMatDims(inputs[0].shape_, mat_axis),
-                        workspace.dev_mask(), workspace.dev_id());
+                        workspace.dev_mask(),
+                        workspace.dev_id());
     TransposeImpl<xpu>(ctx.run_ctx, inputs[0], in_grad_trans, axes);
     Tensor<xpu, 3, DType> trans_in_grad = in_grad_trans.FlatToKD<xpu, 3, DType>(s);
-    temp_flat = temp_flat * broadcast_to(trans_in_grad, temp.shape_);
+    temp_flat                           = temp_flat * broadcast_to(trans_in_grad, temp.shape_);
     if (req[0] == kAddTo) {
-      TBlob ograd(reinterpret_cast<DType*>(tempM.dptr_), outputs[0].shape_,
-                  workspace.dev_mask(), workspace.dev_id());
+      TBlob ograd(reinterpret_cast<DType*>(tempM.dptr_),
+                  outputs[0].shape_,
+                  workspace.dev_mask(),
+                  workspace.dev_id());
       TransposeImpl<xpu>(ctx.run_ctx, temp.reshape(svd_in_shape), ograd, reduce_axes);
       Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
       out += ograd.FlatTo1D<xpu, DType>(s);
@@ -786,13 +830,13 @@ void NumpyMatrixNormGradCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyNormComputeForward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
                              const std::vector<OpReqType>& req,
                              const std::vector<TBlob>& outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   if (inputs[0].shape_.Size() == 0U) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       mxnet::op::Fill<false, DType, xpu>(s, outputs[0], req[0], DType(0.0));
@@ -802,18 +846,21 @@ void NumpyNormComputeForward(const nnvm::NodeAttrs& attrs,
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
 
   if (param.flag == -2) {  // flattened L2 norm
-    std::vector<TBlob> flat_inputs({
-      inputs[0].reshape(TShape(1, inputs[0].shape_.Size()))
-    });
-    std::vector<TBlob> flat_outputs({
-      outputs[0].reshape(TShape(1, 1))
-    });
+    std::vector<TBlob> flat_inputs({inputs[0].reshape(TShape(1, inputs[0].shape_.Size()))});
+    std::vector<TBlob> flat_outputs({outputs[0].reshape(TShape(1, 1))});
 #if !defined(__CUDACC__)
     ReduceAxesComputeImpl<xpu, mshadow_op::nrm2, false, false, mshadow_op::identity>(
-      ctx, flat_inputs, req, flat_outputs, TShape(1, 1));
+        ctx, flat_inputs, req, flat_outputs, TShape(1, 1));
 #else
-    ReduceAxesRTCComputeImpl(
-      ctx, flat_inputs, req, flat_outputs, TShape(1, 1), "red::nrm2{}", nullptr, false, "identity");
+    ReduceAxesRTCComputeImpl(ctx,
+                             flat_inputs,
+                             req,
+                             flat_outputs,
+                             TShape(1, 1),
+                             "red::nrm2{}",
+                             nullptr,
+                             false,
+                             "identity");
 #endif
     return;
   }
@@ -825,13 +872,13 @@ void NumpyNormComputeForward(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyNormComputeBackward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
                               const std::vector<OpReqType>& req,
                               const std::vector<TBlob>& outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   if (inputs[0].shape_.Size() == 0U) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       mxnet::op::Fill<false, DType, xpu>(s, outputs[0], req[0], DType(0.0));
@@ -844,39 +891,31 @@ void NumpyNormComputeBackward(const nnvm::NodeAttrs& attrs,
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
 
   if (param.flag == -2) {  // flattened L2 norm
-    std::vector<TBlob> flat_inputs({
-      inputs[0].reshape(TShape(1, 1)),
-      inputs[4].reshape(TShape(1, outputs[0].shape_.Size())),
-      inputs[5].reshape(TShape(1, 1))
-    });
+    std::vector<TBlob> flat_inputs({inputs[0].reshape(TShape(1, 1)),
+                                    inputs[4].reshape(TShape(1, outputs[0].shape_.Size())),
+                                    inputs[5].reshape(TShape(1, 1))});
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       if (req[0] == kAddTo) {
-        TBlob workspace = TBlob(ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                            Shape1(outputs[0].shape_.Size()), s));
-        std::vector<TBlob> temp({ workspace });
+        TBlob workspace = TBlob(
+            ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(outputs[0].shape_.Size()), s));
+        std::vector<TBlob> temp({workspace});
         ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::div, false>(
-          ctx, TShape(1, 1), flat_inputs, req, temp);
+            ctx, TShape(1, 1), flat_inputs, req, temp);
         Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
         out += workspace.FlatTo1D<xpu, DType>(s);
       } else {
-        std::vector<TBlob> flat_outputs({
-          outputs[0].reshape(TShape(1, outputs[0].shape_.Size()))
-        });
+        std::vector<TBlob> flat_outputs({outputs[0].reshape(TShape(1, outputs[0].shape_.Size()))});
         ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::div, false>(
-          ctx, TShape(1, 1), flat_inputs, req, flat_outputs);
+            ctx, TShape(1, 1), flat_inputs, req, flat_outputs);
       }
     });
     return;
   }
 
   // need to infer shape again in backward
-  std::vector<TShape> in_attrs({
-    inputs.size() == 9 ? inputs[4].shape_ : inputs[1].shape_
-  });
-  std::vector<TShape> out_attrs({
-    inputs.size() == 9 ? inputs[5].shape_ : inputs[2].shape_,
-    TShape(), TShape(), TShape()
-  });
+  std::vector<TShape> in_attrs({inputs.size() == 9 ? inputs[4].shape_ : inputs[1].shape_});
+  std::vector<TShape> out_attrs(
+      {inputs.size() == 9 ? inputs[5].shape_ : inputs[2].shape_, TShape(), TShape(), TShape()});
   NumpyNormShape(attrs, &in_attrs, &out_attrs);
 
   if (param.axis.value().ndim() == 2) {
diff --git a/src/operator/numpy/linalg/np_norm.cc b/src/operator/numpy/linalg/np_norm.cc
index c284f4a80ea1..a6339d8a89fa 100644
--- a/src/operator/numpy/linalg/np_norm.cc
+++ b/src/operator/numpy/linalg/np_norm.cc
@@ -31,11 +31,12 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyNormParam);
 
 inline bool NumpyLpNormShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
-  if (!shape_is_known((*in_attrs)[0])) return false;
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
+  if (!shape_is_known((*in_attrs)[0]))
+    return false;
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
-  const int ndim = (*in_attrs)[0].ndim();
+  const int ndim              = (*in_attrs)[0].ndim();
   if ((!param.axis.has_value() && param.flag != 0 && ndim > 2) ||
       (param.axis.has_value() && param.axis.value().ndim() > 2))
     LOG(FATAL) << "Improper number of dimensions to norm.";
@@ -55,28 +56,28 @@ inline bool NumpyLpNormShape(const nnvm::NodeAttrs& attrs,
   if (!param.keepdims && (*in_attrs)[0].ndim() == 1) {
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, TShape(0, -1));
   } else {
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                       ReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims, false));
+    SHAPE_ASSIGN_CHECK(
+        *out_attrs, 0, ReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims, false));
   }
   return true;
 }
 
 inline bool NumpyMatrixNormShape(const nnvm::NodeAttrs& attrs,
-                                 mxnet::ShapeVector *in_attrs,
-                                 mxnet::ShapeVector *out_attrs) {
+                                 mxnet::ShapeVector* in_attrs,
+                                 mxnet::ShapeVector* out_attrs) {
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
-  const int ndim = (*in_attrs)[0].ndim();
-  auto shape = swapMatDims((*in_attrs)[0], param.axis.value());
+  const int ndim              = (*in_attrs)[0].ndim();
+  auto shape                  = swapMatDims((*in_attrs)[0], param.axis.value());
   if (param.axis.value().ndim() == 2) {
     int batch_dim = 1;
-    int row_dim = (*in_attrs)[0][param.axis.value()[0]];
-    int col_dim = (*in_attrs)[0][param.axis.value()[1]];
+    int row_dim   = (*in_attrs)[0][param.axis.value()[0]];
+    int col_dim   = (*in_attrs)[0][param.axis.value()[1]];
     TShape out_shape(ndim - (param.keepdims ? 0 : 2), 1);
     for (int i = 0; i < ndim - 2; ++i) {
       batch_dim *= shape[i];
     }
     if (param.keepdims) {
-      out_shape = (*in_attrs)[0];
+      out_shape                        = (*in_attrs)[0];
       out_shape[param.axis.value()[0]] = 1;
       out_shape[param.axis.value()[1]] = 1;
     } else {
@@ -87,20 +88,20 @@ inline bool NumpyMatrixNormShape(const nnvm::NodeAttrs& attrs,
     int svd_dim = row_dim < col_dim ? row_dim : col_dim;
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, out_shape);
     if (param.ord == 2 || param.ord == -2) {
-      SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape({ batch_dim, row_dim, row_dim }));  // UT
-      SHAPE_ASSIGN_CHECK(*out_attrs, 2, TShape({ batch_dim, svd_dim }));  // L
-      SHAPE_ASSIGN_CHECK(*out_attrs, 3, TShape({ batch_dim, row_dim, col_dim }));  // V
+      SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape({batch_dim, row_dim, row_dim}));  // UT
+      SHAPE_ASSIGN_CHECK(*out_attrs, 2, TShape({batch_dim, svd_dim}));           // L
+      SHAPE_ASSIGN_CHECK(*out_attrs, 3, TShape({batch_dim, row_dim, col_dim}));  // V
     } else {
       TShape sum_shape = (*in_attrs)[0];
-      TShape mat_axis = param.axis.value();
-      int sum_dim = mat_axis[!(param.ord == 1 || param.ord == -1)];
+      TShape mat_axis  = param.axis.value();
+      int sum_dim      = mat_axis[!(param.ord == 1 || param.ord == -1)];
       TShape small(3, 1);
       sum_shape[sum_dim] = 1;
-      small[0] = sum_shape.ProdShape(0, sum_dim);
-      small[2] = sum_shape.ProdShape(sum_dim + 1, sum_shape.ndim());
-      SHAPE_ASSIGN_CHECK(*out_attrs, 1, small);  // sum
-      SHAPE_ASSIGN_CHECK(*out_attrs, 2, TShape({ 0, 0 }));  // L
-      SHAPE_ASSIGN_CHECK(*out_attrs, 3, TShape({ 0, 0, 0 }));  // V
+      small[0]           = sum_shape.ProdShape(0, sum_dim);
+      small[2]           = sum_shape.ProdShape(sum_dim + 1, sum_shape.ndim());
+      SHAPE_ASSIGN_CHECK(*out_attrs, 1, small);              // sum
+      SHAPE_ASSIGN_CHECK(*out_attrs, 2, TShape({0, 0}));     // L
+      SHAPE_ASSIGN_CHECK(*out_attrs, 3, TShape({0, 0, 0}));  // V
     }
   } else {
     LOG(FATAL) << "Invalid norm or ord arguments.";
@@ -108,10 +109,10 @@ inline bool NumpyMatrixNormShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-inline void assign_svd_empty(mxnet::ShapeVector *out_attrs) {
-  SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape({ 0, 0, 0 }));  // UT
-  SHAPE_ASSIGN_CHECK(*out_attrs, 2, TShape({ 0, 0 }));  // L
-  SHAPE_ASSIGN_CHECK(*out_attrs, 3, TShape({ 0, 0, 0 }));  // V
+inline void assign_svd_empty(mxnet::ShapeVector* out_attrs) {
+  SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape({0, 0, 0}));  // UT
+  SHAPE_ASSIGN_CHECK(*out_attrs, 2, TShape({0, 0}));     // L
+  SHAPE_ASSIGN_CHECK(*out_attrs, 3, TShape({0, 0, 0}));  // V
 }
 
 bool NumpyNormType(const nnvm::NodeAttrs& attrs,
@@ -137,23 +138,23 @@ bool NumpyNormType(const nnvm::NodeAttrs& attrs,
 }
 
 bool NumpyNormShape(const nnvm::NodeAttrs& attrs,
-                    mxnet::ShapeVector *in_attrs,
-                    mxnet::ShapeVector *out_attrs) {
+                    mxnet::ShapeVector* in_attrs,
+                    mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 4U);  // reduced, UT, S, V
   const NumpyNormParam& param = nnvm::get<NumpyNormParam>(attrs.parsed);
   if (!param.axis.has_value()) {
     if (param.flag == -2) {
       int ndim = param.keepdims ? (*in_attrs)[0].ndim() : 0;
-      int sz = param.keepdims ? 1 : -1;
+      int sz   = param.keepdims ? 1 : -1;
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, TShape(ndim, sz));
       assign_svd_empty(out_attrs);
       return true;
     }
     if ((*in_attrs)[0].ndim() >= 2) {
       TShape axis(2, 0);
-      axis[0] = (*in_attrs)[0].ndim() - 2;
-      axis[1] = (*in_attrs)[0].ndim() - 1;
+      axis[0]                                 = (*in_attrs)[0].ndim() - 2;
+      axis[1]                                 = (*in_attrs)[0].ndim() - 1;
       const_cast<NumpyNormParam&>(param).axis = axis;
       return NumpyMatrixNormShape(attrs, in_attrs, out_attrs);
     } else {
@@ -165,9 +166,8 @@ bool NumpyNormShape(const nnvm::NodeAttrs& attrs,
   } else {
     TShape axis(param.axis.value().ndim(), 0);
     for (int i = 0; i < param.axis.value().ndim(); ++i) {
-      axis[i] = param.axis.value()[i] < 0 ?
-                  (*in_attrs)[0].ndim() + param.axis.value()[i] :
-                  param.axis.value()[i];
+      axis[i] = param.axis.value()[i] < 0 ? (*in_attrs)[0].ndim() + param.axis.value()[i]
+                                          : param.axis.value()[i];
     }
     const_cast<NumpyNormParam&>(param).axis = axis;
     if (param.axis.value().ndim() == 2) {
@@ -179,7 +179,7 @@ bool NumpyNormShape(const nnvm::NodeAttrs& attrs,
   }
 }
 
-TShape swapMatDims(const TShape &shape, const TShape &axis) {
+TShape swapMatDims(const TShape& shape, const TShape& axis) {
   TShape ret(shape.ndim(), 1);
   int i, j = 0;
   for (i = 0; i < shape.ndim(); ++i) {
@@ -188,11 +188,11 @@ TShape swapMatDims(const TShape &shape, const TShape &axis) {
     }
   }
   ret[j++] = shape[axis[0]];
-  ret[j] = shape[axis[1]];
+  ret[j]   = shape[axis[1]];
   return ret;
 }
 
-TShape inverseTranspose(const TShape &axes) {
+TShape inverseTranspose(const TShape& axes) {
   TShape ret(axes.ndim(), 1);
   for (int i = 0; i < axes.ndim(); ++i) {
     ret[axes[i]] = i;
diff --git a/src/operator/numpy/linalg/np_norm_backward.cc b/src/operator/numpy/linalg/np_norm_backward.cc
index f6db6864b5db..5eb0604b473d 100644
--- a/src/operator/numpy/linalg/np_norm_backward.cc
+++ b/src/operator/numpy/linalg/np_norm_backward.cc
@@ -29,15 +29,15 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_backward_npi_norm)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyNormParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_num_inputs(2 * 4 + 1)
-.set_attr<FCompute>("FCompute<cpu>", NumpyNormComputeBackward<cpu>);
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyNormParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_num_inputs(2 * 4 + 1)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyNormComputeBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_norm_backward.cu b/src/operator/numpy/linalg/np_norm_backward.cu
index 09e85ab36f19..399eaf5bc29b 100644
--- a/src/operator/numpy/linalg/np_norm_backward.cu
+++ b/src/operator/numpy/linalg/np_norm_backward.cu
@@ -1,33 +1,33 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 /*!
-* Copyright (c) 2019 by Contributors
-* \file np_norm_backward.cu
-* \brief GPU implementation of Operators for advanced linear algebra.
-*/
+ * Copyright (c) 2019 by Contributors
+ * \file np_norm_backward.cu
+ * \brief GPU implementation of Operators for advanced linear algebra.
+ */
 #include "./np_norm-inl.h"
 
 namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_backward_npi_norm)
-.set_attr<FCompute>("FCompute<gpu>", NumpyNormComputeBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyNormComputeBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_norm_forward.cc b/src/operator/numpy/linalg/np_norm_forward.cc
index 2c8f27638206..51eb5b367b2a 100644
--- a/src/operator/numpy/linalg/np_norm_forward.cc
+++ b/src/operator/numpy/linalg/np_norm_forward.cc
@@ -29,21 +29,21 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_norm)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(4)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs) { return 1; })
-.set_attr_parser(ParamParser<NumpyNormParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyNormShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyNormType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_norm"})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", NumpyNormComputeForward<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "The input");
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(4)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr_parser(ParamParser<NumpyNormParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyNormShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyNormType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_norm"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyNormComputeForward<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "The input");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_norm_forward.cu b/src/operator/numpy/linalg/np_norm_forward.cu
index 6feecb09a09e..6914d9ebaa21 100644
--- a/src/operator/numpy/linalg/np_norm_forward.cu
+++ b/src/operator/numpy/linalg/np_norm_forward.cu
@@ -1,33 +1,32 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 /*!
-* Copyright (c) 2019 by Contributors
-* \file np_norm_forward.cu
-* \brief GPU implementation of Operators for advanced linear algebra.
-*/
+ * Copyright (c) 2019 by Contributors
+ * \file np_norm_forward.cu
+ * \brief GPU implementation of Operators for advanced linear algebra.
+ */
 #include "./np_norm-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_norm)
-.set_attr<FCompute>("FCompute<gpu>", NumpyNormComputeForward<gpu>);
+NNVM_REGISTER_OP(_npi_norm).set_attr<FCompute>("FCompute<gpu>", NumpyNormComputeForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_pinv-inl.h b/src/operator/numpy/linalg/np_pinv-inl.h
index 73302233462d..247f75681036 100644
--- a/src/operator/numpy/linalg/np_pinv-inl.h
+++ b/src/operator/numpy/linalg/np_pinv-inl.h
@@ -45,9 +45,8 @@ using namespace mshadow;
 struct PinvParam : public dmlc::Parameter<PinvParam> {
   bool hermitian;
   DMLC_DECLARE_PARAMETER(PinvParam) {
-    DMLC_DECLARE_FIELD(hermitian)
-    .set_default(false)
-    .describe("If True, A is assumed to be Hermitian (symmetric if real-valued).");
+    DMLC_DECLARE_FIELD(hermitian).set_default(false).describe(
+        "If True, A is assumed to be Hermitian (symmetric if real-valued).");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream hermitian_s;
@@ -60,129 +59,163 @@ struct PinvScalarRcondParam : public dmlc::Parameter<PinvScalarRcondParam> {
   double rcond;
   bool hermitian;
   DMLC_DECLARE_PARAMETER(PinvScalarRcondParam) {
-    DMLC_DECLARE_FIELD(rcond)
-    .set_default(1e-15)
-    .describe("Cutoff for small singular values.");
-    DMLC_DECLARE_FIELD(hermitian)
-    .set_default(false)
-    .describe("If True, A is assumed to be Hermitian (symmetric if real-valued).");
+    DMLC_DECLARE_FIELD(rcond).set_default(1e-15).describe("Cutoff for small singular values.");
+    DMLC_DECLARE_FIELD(hermitian).set_default(false).describe(
+        "If True, A is assumed to be Hermitian (symmetric if real-valued).");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream rcond_s;
     std::ostringstream hermitian_s;
     rcond_s << rcond;
     hermitian_s << hermitian;
-    (*dict)["rcond"] = rcond_s.str();
+    (*dict)["rcond"]     = rcond_s.str();
     (*dict)["hermitian"] = hermitian_s.str();
   }
 };
 
-template<typename xpu, typename DType, typename IndexT>
-IndexT linalg_gesdd_workspace_query(const IndexT m, const IndexT n,
+template <typename xpu, typename DType, typename IndexT>
+IndexT linalg_gesdd_workspace_query(const IndexT m,
+                                    const IndexT n,
                                     const Tensor<xpu, 2, DType>& UT,
                                     const Tensor<xpu, 1, DType>& S,
                                     const Tensor<xpu, 2, DType>& V,
                                     Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType, typename IndexT>
-void linalg_gesdd(const IndexT m, const IndexT n,
+template <typename xpu, typename DType, typename IndexT>
+void linalg_gesdd(const IndexT m,
+                  const IndexT n,
                   const Tensor<xpu, 2, DType>& UT,
                   const Tensor<xpu, 1, DType>& S,
                   const Tensor<xpu, 2, DType>& V,
                   const Tensor<xpu, 1, DType>& work,
-                  Stream<xpu> *s = 0);
+                  Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType, typename IndexT>
-void BatchSVDImpl(const IndexT m, const IndexT n,
+template <typename xpu, typename DType, typename IndexT>
+void BatchSVDImpl(const IndexT m,
+                  const IndexT n,
                   const Tensor<xpu, 3, DType>& UT,
                   const Tensor<xpu, 2, DType>& S,
                   const Tensor<xpu, 3, DType>& V,
                   const Tensor<xpu, 1, DType>& work,
-                  Stream<xpu> *s = 0);
-
-#define LINALG_CPU_GESDD_WORKSPACE_QUERY(func, DType, IndexT) \
-template<> inline \
-IndexT linalg_gesdd_workspace_query<cpu, DType>(const IndexT m, const IndexT n, \
-                                                const Tensor<cpu, 2, DType>& UT, \
-                                                const Tensor<cpu, 1, DType>& S, \
-                                                const Tensor<cpu, 2, DType>& V, \
-                                                Stream<cpu> *s) { \
-  DType work(0.0); \
-  std::vector<IndexT> iwork(8 * std::min(m, n), 0); \
-  if (m > n) { \
-    MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, n, m, \
-                        UT.dptr_, UT.stride_, S.dptr_, \
-                        V.dptr_, V.stride_, \
-                        UT.dptr_, UT.stride_, \
-                        &work, -1, iwork.data()); \
-  } else { \
-    MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, n, m, \
-                        V.dptr_, V.stride_, S.dptr_, \
-                        V.dptr_, V.stride_, \
-                        UT.dptr_, UT.stride_, \
-                        &work, -1, iwork.data()); \
-  } \
-  return static_cast<IndexT>(work); \
-}
+                  Stream<xpu>* s = 0);
+
+#define LINALG_CPU_GESDD_WORKSPACE_QUERY(func, DType, IndexT)                             \
+  template <>                                                                             \
+  inline IndexT linalg_gesdd_workspace_query<cpu, DType>(const IndexT m,                  \
+                                                         const IndexT n,                  \
+                                                         const Tensor<cpu, 2, DType>& UT, \
+                                                         const Tensor<cpu, 1, DType>& S,  \
+                                                         const Tensor<cpu, 2, DType>& V,  \
+                                                         Stream<cpu>* s) {                \
+    DType work(0.0);                                                                      \
+    std::vector<IndexT> iwork(8 * std::min(m, n), 0);                                     \
+    if (m > n) {                                                                          \
+      MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR,                                         \
+                          n,                                                              \
+                          m,                                                              \
+                          UT.dptr_,                                                       \
+                          UT.stride_,                                                     \
+                          S.dptr_,                                                        \
+                          V.dptr_,                                                        \
+                          V.stride_,                                                      \
+                          UT.dptr_,                                                       \
+                          UT.stride_,                                                     \
+                          &work,                                                          \
+                          -1,                                                             \
+                          iwork.data());                                                  \
+    } else {                                                                              \
+      MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR,                                         \
+                          n,                                                              \
+                          m,                                                              \
+                          V.dptr_,                                                        \
+                          V.stride_,                                                      \
+                          S.dptr_,                                                        \
+                          V.dptr_,                                                        \
+                          V.stride_,                                                      \
+                          UT.dptr_,                                                       \
+                          UT.stride_,                                                     \
+                          &work,                                                          \
+                          -1,                                                             \
+                          iwork.data());                                                  \
+    }                                                                                     \
+    return static_cast<IndexT>(work);                                                     \
+  }
 
-#define LINALG_CPU_GESDD(func, DType) \
-template<> inline \
-void linalg_gesdd<cpu, DType>(const lapack_index_t m, \
-                              const lapack_index_t n, \
-                              const Tensor<cpu, 2, DType>& UT, \
-                              const Tensor<cpu, 1, DType>& S, \
-                              const Tensor<cpu, 2, DType>& V, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  std::vector<lapack_index_t> iwork(8 * std::min(m, n), 0); \
-  int res(0); \
-  if (m > n) { \
-    res = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, n, m, \
-                              UT.dptr_, UT.stride_, S.dptr_, \
-                              V.dptr_, V.stride_, \
-                              UT.dptr_, UT.stride_, \
-                              work.dptr_, work.shape_.Size(), iwork.data()); \
-  } else { \
-    res = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR, n, m, \
-                              V.dptr_, V.stride_, S.dptr_, \
-                              V.dptr_, V.stride_, \
-                              UT.dptr_, UT.stride_, \
-                              work.dptr_, work.shape_.Size(), iwork.data()); \
-  } \
-  CHECK_GE(res, 0) << #func << ": the " << -res \
-    << "-th argument had an illegal value"; \
-  CHECK_LE(res, 0) << #func << " did not converge, updating process failed."; \
-}
+#define LINALG_CPU_GESDD(func, DType)                                                     \
+  template <>                                                                             \
+  inline void linalg_gesdd<cpu, DType>(const lapack_index_t m,                            \
+                                       const lapack_index_t n,                            \
+                                       const Tensor<cpu, 2, DType>& UT,                   \
+                                       const Tensor<cpu, 1, DType>& S,                    \
+                                       const Tensor<cpu, 2, DType>& V,                    \
+                                       const Tensor<cpu, 1, DType>& work,                 \
+                                       Stream<cpu>* s) {                                  \
+    std::vector<lapack_index_t> iwork(8 * std::min(m, n), 0);                             \
+    int res(0);                                                                           \
+    if (m > n) {                                                                          \
+      res = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR,                                   \
+                                n,                                                        \
+                                m,                                                        \
+                                UT.dptr_,                                                 \
+                                UT.stride_,                                               \
+                                S.dptr_,                                                  \
+                                V.dptr_,                                                  \
+                                V.stride_,                                                \
+                                UT.dptr_,                                                 \
+                                UT.stride_,                                               \
+                                work.dptr_,                                               \
+                                work.shape_.Size(),                                       \
+                                iwork.data());                                            \
+    } else {                                                                              \
+      res = MXNET_LAPACK_##func(MXNET_LAPACK_COL_MAJOR,                                   \
+                                n,                                                        \
+                                m,                                                        \
+                                V.dptr_,                                                  \
+                                V.stride_,                                                \
+                                S.dptr_,                                                  \
+                                V.dptr_,                                                  \
+                                V.stride_,                                                \
+                                UT.dptr_,                                                 \
+                                UT.stride_,                                               \
+                                work.dptr_,                                               \
+                                work.shape_.Size(),                                       \
+                                iwork.data());                                            \
+    }                                                                                     \
+    CHECK_GE(res, 0) << #func << ": the " << -res << "-th argument had an illegal value"; \
+    CHECK_LE(res, 0) << #func << " did not converge, updating process failed.";           \
+  }
 
 LINALG_CPU_GESDD_WORKSPACE_QUERY(sgesdd, float, LapackIndex<cpu>::IndexT)
-LINALG_CPU_GESDD_WORKSPACE_QUERY(dgesdd, double, LapackIndex<cpu>::IndexT )
+LINALG_CPU_GESDD_WORKSPACE_QUERY(dgesdd, double, LapackIndex<cpu>::IndexT)
 
 LINALG_CPU_GESDD(sgesdd, float)
 LINALG_CPU_GESDD(dgesdd, double)
 
 #ifdef __CUDACC__
 
-#define LINALG_GPU_GESDD_WORKSPACE_QUERY(DType) \
-template<> inline \
-int linalg_gesdd_workspace_query<gpu, DType>(const int m, const int n, \
-                                             const Tensor<gpu, 2, DType>& U, \
-                                             const Tensor<gpu, 1, DType>& S, \
-                                             const Tensor<gpu, 2, DType>& VT, \
-                                             Stream<gpu> *s) { \
-  LOG(FATAL) << "Lapack gesdd workspace query routines is unsupported in gpu!"; \
-  return 0; \
-}
+#define LINALG_GPU_GESDD_WORKSPACE_QUERY(DType)                                        \
+  template <>                                                                          \
+  inline int linalg_gesdd_workspace_query<gpu, DType>(const int m,                     \
+                                                      const int n,                     \
+                                                      const Tensor<gpu, 2, DType>& U,  \
+                                                      const Tensor<gpu, 1, DType>& S,  \
+                                                      const Tensor<gpu, 2, DType>& VT, \
+                                                      Stream<gpu>* s) {                \
+    LOG(FATAL) << "Lapack gesdd workspace query routines is unsupported in gpu!";      \
+    return 0;                                                                          \
+  }
 
-#define LINALG_GPU_GESDD(DType) \
-template<> inline \
-void linalg_gesdd<gpu, DType>(const int m, const int n, \
-                              const Tensor<gpu, 2, DType>& U, \
-                              const Tensor<gpu, 1, DType>& S, \
-                              const Tensor<gpu, 2, DType>& VT, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  LOG(FATAL) << "Lapack gesdd routines is unsupported in gpu!"; \
-}
+#define LINALG_GPU_GESDD(DType)                                           \
+  template <>                                                             \
+  inline void linalg_gesdd<gpu, DType>(const int m,                       \
+                                       const int n,                       \
+                                       const Tensor<gpu, 2, DType>& U,    \
+                                       const Tensor<gpu, 1, DType>& S,    \
+                                       const Tensor<gpu, 2, DType>& VT,   \
+                                       const Tensor<gpu, 1, DType>& work, \
+                                       Stream<gpu>* s) {                  \
+    LOG(FATAL) << "Lapack gesdd routines is unsupported in gpu!";         \
+  }
 
 LINALG_GPU_GESDD_WORKSPACE_QUERY(float)
 LINALG_GPU_GESDD_WORKSPACE_QUERY(double)
@@ -192,36 +225,38 @@ LINALG_GPU_GESDD(double)
 
 #endif  // __CUDACC__
 
-#define BATCH_SVD_IMPL_CPU(DType) \
-template<> inline \
-void BatchSVDImpl<cpu, DType>(const lapack_index_t m, const lapack_index_t n, \
-                              const Tensor<cpu, 3, DType>& UT, \
-                              const Tensor<cpu, 2, DType>& S, \
-                              const Tensor<cpu, 3, DType>& V, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  for (index_t i = 0; i < S.size(0); ++i) { \
-    linalg_gesdd(m, n, UT[i], S[i], V[i], work, s); \
-  } \
-}
+#define BATCH_SVD_IMPL_CPU(DType)                                         \
+  template <>                                                             \
+  inline void BatchSVDImpl<cpu, DType>(const lapack_index_t m,            \
+                                       const lapack_index_t n,            \
+                                       const Tensor<cpu, 3, DType>& UT,   \
+                                       const Tensor<cpu, 2, DType>& S,    \
+                                       const Tensor<cpu, 3, DType>& V,    \
+                                       const Tensor<cpu, 1, DType>& work, \
+                                       Stream<cpu>* s) {                  \
+    for (index_t i = 0; i < S.size(0); ++i) {                             \
+      linalg_gesdd(m, n, UT[i], S[i], V[i], work, s);                     \
+    }                                                                     \
+  }
 
 BATCH_SVD_IMPL_CPU(float)
 BATCH_SVD_IMPL_CPU(double)
 
 #ifdef __CUDACC__
 
-#define BATCH_SVD_IMPL_GPU(DType) \
-template<> inline \
-void BatchSVDImpl<gpu, DType>(const int m, const int n, \
-                              const Tensor<gpu, 3, DType>& UT, \
-                              const Tensor<gpu, 2, DType>& S, \
-                              const Tensor<gpu, 3, DType>& V, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  for (index_t i = 0; i < S.size(0); ++i) { \
-    linalg_gesvd(UT[i], S[i], V[i], work, s); \
-  } \
-}
+#define BATCH_SVD_IMPL_GPU(DType)                                         \
+  template <>                                                             \
+  inline void BatchSVDImpl<gpu, DType>(const int m,                       \
+                                       const int n,                       \
+                                       const Tensor<gpu, 3, DType>& UT,   \
+                                       const Tensor<gpu, 2, DType>& S,    \
+                                       const Tensor<gpu, 3, DType>& V,    \
+                                       const Tensor<gpu, 1, DType>& work, \
+                                       Stream<gpu>* s) {                  \
+    for (index_t i = 0; i < S.size(0); ++i) {                             \
+      linalg_gesvd(UT[i], S[i], V[i], work, s);                           \
+    }                                                                     \
+  }
 
 BATCH_SVD_IMPL_GPU(float)
 BATCH_SVD_IMPL_GPU(double)
@@ -229,12 +264,15 @@ BATCH_SVD_IMPL_GPU(double)
 #endif  // __CUDACC__
 
 struct SingularValSmax {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *smax_ptr, const DType *s_ptr,
-                                  const int length, const int lds) {
-    const DType *s_iptr = s_ptr + i * lds;
-    DType *smax_iptr = smax_ptr + i;
-    *smax_iptr = s_iptr[0];
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* smax_ptr,
+                                  const DType* s_ptr,
+                                  const int length,
+                                  const int lds) {
+    const DType* s_iptr = s_ptr + i * lds;
+    DType* smax_iptr    = smax_ptr + i;
+    *smax_iptr          = s_iptr[0];
     for (int j = 1; j < length; ++j) {
       *smax_iptr = s_iptr[j] > *smax_iptr ? s_iptr[j] : *smax_iptr;
     }
@@ -242,8 +280,8 @@ struct SingularValSmax {
 };
 
 struct DiscardSmallSingularVal {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *s_ptr, const DType *large_ptr) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, DType* s_ptr, const DType* large_ptr) {
     if (large_ptr[i]) {
       s_ptr[i] = DType(1) / s_ptr[i];
     } else {
@@ -253,11 +291,14 @@ struct DiscardSmallSingularVal {
 };
 
 struct DiscardSmallSingularValWithScalarRcond {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType *s_ptr, const int length,
-                                  const int lds, const double rcond) {
-    DType *s_iptr = s_ptr + i * lds;
-    DType smax_i = s_iptr[0];
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* s_ptr,
+                                  const int length,
+                                  const int lds,
+                                  const double rcond) {
+    DType* s_iptr = s_ptr + i * lds;
+    DType smax_i  = s_iptr[0];
     for (int j = 1; j < length; ++j) {
       smax_i = s_iptr[j] > smax_i ? s_iptr[j] : smax_i;
     }
@@ -268,14 +309,14 @@ struct DiscardSmallSingularValWithScalarRcond {
 };
 
 inline void GetPinvShape(const mxnet::TShape& a_shape,
-                         mxnet::TShape *ut_shape,
-                         mxnet::TShape *s_shape,
-                         mxnet::TShape *v_shape,
-                         mxnet::TShape *u_shape = nullptr,
-                         mxnet::TShape *vt_shape = nullptr) {
+                         mxnet::TShape* ut_shape,
+                         mxnet::TShape* s_shape,
+                         mxnet::TShape* v_shape,
+                         mxnet::TShape* u_shape  = nullptr,
+                         mxnet::TShape* vt_shape = nullptr) {
   const int a_ndim = a_shape.ndim();
-  const int m = a_shape[a_ndim - 2];
-  const int n = a_shape[a_ndim - 1];
+  const int m      = a_shape[a_ndim - 2];
+  const int n      = a_shape[a_ndim - 1];
 
   // Calculate S shape.
   std::vector<int> s_shape_vec(a_ndim - 1, -1);
@@ -283,7 +324,7 @@ inline void GetPinvShape(const mxnet::TShape& a_shape,
     s_shape_vec[i] = a_shape[i];
   }
   s_shape_vec[a_ndim - 2] = std::min(m, n);
-  *s_shape = mxnet::TShape(s_shape_vec.begin(), s_shape_vec.end());
+  *s_shape                = mxnet::TShape(s_shape_vec.begin(), s_shape_vec.end());
 
   std::vector<int> temp_shape_vec(a_ndim, -1);
   for (int i = 0; i < a_ndim - 2; ++i) {
@@ -294,20 +335,20 @@ inline void GetPinvShape(const mxnet::TShape& a_shape,
   if (m >= n) {
     // UT must have same shape as A.
     *ut_shape = a_shape;
-    *v_shape = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
+    *v_shape  = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
     if (u_shape && vt_shape) {
-      *vt_shape = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
-      *u_shape = a_shape;
+      *vt_shape              = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
+      *u_shape               = a_shape;
       (*u_shape)[a_ndim - 2] = a_shape[a_ndim - 1];
       (*u_shape)[a_ndim - 1] = a_shape[a_ndim - 2];
     }
   } else {
     // V must have same shape as A.
-    *v_shape = a_shape;
+    *v_shape  = a_shape;
     *ut_shape = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
     if (u_shape && vt_shape) {
-      *u_shape = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
-      *vt_shape = a_shape;
+      *u_shape                = mxnet::TShape(temp_shape_vec.begin(), temp_shape_vec.end());
+      *vt_shape               = a_shape;
       (*vt_shape)[a_ndim - 2] = a_shape[a_ndim - 1];
       (*vt_shape)[a_ndim - 1] = a_shape[a_ndim - 2];
     }
@@ -317,10 +358,12 @@ inline void GetPinvShape(const mxnet::TShape& a_shape,
 inline void GetOrCheckCutoffAndLargeShape(const nnvm::NodeAttrs& attrs,
                                           const mxnet::TShape& a_shape,
                                           const mxnet::TShape& rcond_shape,
-                                          mxnet::TShape *cutoff_shape = nullptr,
-                                          mxnet::TShape *large_shape = nullptr) {
-  if (!shape_is_known(a_shape)) { return ; }
-  const int a_ndim = a_shape.ndim();
+                                          mxnet::TShape* cutoff_shape = nullptr,
+                                          mxnet::TShape* large_shape  = nullptr) {
+  if (!shape_is_known(a_shape)) {
+    return;
+  }
+  const int a_ndim     = a_shape.ndim();
   const int rcond_ndim = rcond_shape.ndim();
   mxnet::TShape s_shape(a_ndim - 1, 1);
   mxnet::TShape smax_shape(a_ndim - 1, 1);
@@ -331,23 +374,23 @@ inline void GetOrCheckCutoffAndLargeShape(const nnvm::NodeAttrs& attrs,
   }
   // Get Smax shape.
   for (int i = 0; i < a_ndim - 2; ++i) {
-    s_shape[i] = a_shape[i];
+    s_shape[i]    = a_shape[i];
     smax_shape[i] = a_shape[i];
   }
-  s_shape[s_shape.ndim() - 1] = std::min(a_shape[a_ndim - 2], a_shape[a_ndim - 1]);
+  s_shape[s_shape.ndim() - 1]       = std::min(a_shape[a_ndim - 2], a_shape[a_ndim - 1]);
   smax_shape[smax_shape.ndim() - 1] = 1;
   // Check cutoff = rcond[..., newaxis] * smax.
-  mxnet::ShapeVector in_shape_vec1({ new_rcond_shape, smax_shape });
+  mxnet::ShapeVector in_shape_vec1({new_rcond_shape, smax_shape});
   mxnet::ShapeVector out_shape_vec1(1);
   mxnet::op::BinaryBroadcastShape(attrs, &in_shape_vec1, &out_shape_vec1);
   // Check large = s > cutoff.
-  mxnet::ShapeVector in_shape_vec2({ s_shape, out_shape_vec1[0] });
+  mxnet::ShapeVector in_shape_vec2({s_shape, out_shape_vec1[0]});
   mxnet::ShapeVector out_shape_vec2(1);
   mxnet::op::BinaryBroadcastShape(attrs, &in_shape_vec2, &out_shape_vec2);
   // Check s = divide(1, s, where=large, out=s).
   if (s_shape != out_shape_vec2[0]) {
-    LOG(FATAL) << "Error: non-broadcastable output operand with shape "
-      << s_shape << " doesn't match the broadcast shape " << out_shape_vec2[0];
+    LOG(FATAL) << "Error: non-broadcastable output operand with shape " << s_shape
+               << " doesn't match the broadcast shape " << out_shape_vec2[0];
   }
   if (cutoff_shape) {
     *cutoff_shape = out_shape_vec1[0];
@@ -357,7 +400,7 @@ inline void GetOrCheckCutoffAndLargeShape(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 size_t SVDWorkspaceSize(const TBlob& a,
                         const TBlob& pinv_a,
                         const mxnet::TShape& u_shape,
@@ -365,18 +408,22 @@ size_t SVDWorkspaceSize(const TBlob& a,
                         const mxnet::TShape& v_shape,
                         const std::vector<OpReqType>& req,
                         const OpContext& ctx) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
 
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
   size_t work_space_size = 0;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   MSHADOW_SGL_DBL_TYPE_SWITCH(pinv_a.type_flag_, OType, {
-    const int a_ndim = a.shape_.ndim();
-    const int u_ndim = u_shape.ndim();
-    const int s_ndim = s_shape.ndim();
-    const int v_ndim = v_shape.ndim();
+    const int a_ndim       = a.shape_.ndim();
+    const int u_ndim       = u_shape.ndim();
+    const int s_ndim       = s_shape.ndim();
+    const int v_ndim       = v_shape.ndim();
     mxnet::TShape u_shape2 = Shape2(u_shape[u_ndim - 2], u_shape[u_ndim - 1]);
     mxnet::TShape s_shape1 = Shape1(s_shape[s_ndim - 1]);
     mxnet::TShape v_shape2 = Shape2(v_shape[v_ndim - 2], v_shape[v_ndim - 1]);
@@ -386,17 +433,19 @@ size_t SVDWorkspaceSize(const TBlob& a,
       std::vector<OType> v_vec(v_shape2.Size(), 0);
       // For workspace size in linalg_gesdd.
       work_space_size += linalg_gesdd_workspace_query<xpu, OType, lapack_index_t>(
-          a.shape_[a_ndim - 2], a.shape_[a_ndim - 1],
+          a.shape_[a_ndim - 2],
+          a.shape_[a_ndim - 1],
           TBlob(u_vec.data(), u_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, OType>(s),
           TBlob(s_vec.data(), s_shape1, a.dev_mask(), a.dev_id()).get<xpu, 1, OType>(s),
-          TBlob(v_vec.data(), v_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, OType>(s), s);
+          TBlob(v_vec.data(), v_shape2, a.dev_mask(), a.dev_id()).get<xpu, 2, OType>(s),
+          s);
     } else {
       Storage::Handle u_handle =
-        Storage::Get()->Alloc(sizeof(OType) * u_shape2.Size(), Context::GPU());
+          Storage::Get()->Alloc(sizeof(OType) * u_shape2.Size(), Context::GPU());
       Storage::Handle s_handle =
-        Storage::Get()->Alloc(sizeof(OType) * s_shape1.Size(), Context::GPU());
+          Storage::Get()->Alloc(sizeof(OType) * s_shape1.Size(), Context::GPU());
       Storage::Handle v_handle =
-        Storage::Get()->Alloc(sizeof(OType) * v_shape2.Size(), Context::GPU());
+          Storage::Get()->Alloc(sizeof(OType) * v_shape2.Size(), Context::GPU());
       TBlob u_data(static_cast<OType*>(u_handle.dptr), u_shape2, a.dev_mask(), a.dev_id());
       TBlob s_data(static_cast<OType*>(s_handle.dptr), s_shape1, a.dev_mask(), a.dev_id());
       TBlob v_data(static_cast<OType*>(v_handle.dptr), v_shape2, a.dev_mask(), a.dev_id());
@@ -404,11 +453,13 @@ size_t SVDWorkspaceSize(const TBlob& a,
       if (a.shape_[a_ndim - 2] >= a.shape_[a_ndim - 1]) {
         work_space_size += linalg_gesvd_workspace_query(v_data.get<xpu, 2, OType>(s),
                                                         s_data.get<xpu, 1, OType>(s),
-                                                        u_data.get<xpu, 2, OType>(s), s);
+                                                        u_data.get<xpu, 2, OType>(s),
+                                                        s);
       } else {
         work_space_size += linalg_gesvd_workspace_query(u_data.get<xpu, 2, OType>(s),
                                                         s_data.get<xpu, 1, OType>(s),
-                                                        v_data.get<xpu, 2, OType>(s), s);
+                                                        v_data.get<xpu, 2, OType>(s),
+                                                        s);
       }
       Storage::Get()->Free(u_handle);
       Storage::Get()->Free(s_handle);
@@ -419,29 +470,33 @@ size_t SVDWorkspaceSize(const TBlob& a,
 }
 
 // Calculates workspace size of pinv op forward.
-template<typename xpu>
+template <typename xpu>
 size_t PinvForwardWorkspaceSize(const TBlob& a,
                                 const TBlob& rcond,
                                 const TBlob& pinv_a,
                                 const nnvm::NodeAttrs& attrs,
                                 const std::vector<OpReqType>& req,
                                 const OpContext& ctx) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
   size_t work_space_size = 0;
   mxnet::TShape u_shape, s_shape, v_shape;
   GetPinvShape(a.shape_, &u_shape, &s_shape, &v_shape);
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(pinv_a.type_flag_, OType, {
-    mxnet::TShape smax_shape = s_shape;
+    mxnet::TShape smax_shape       = s_shape;
     smax_shape[s_shape.ndim() - 1] = 1;
     mxnet::TShape cutoff_shape;
     mxnet::TShape large_shape;
     GetOrCheckCutoffAndLargeShape(attrs, a.shape_, rcond.shape_, &cutoff_shape, &large_shape);
     work_space_size +=  // For #gesdd_ or #gesvd work space size.
-      SVDWorkspaceSize<xpu>(a, pinv_a, u_shape, s_shape, v_shape, req, ctx);
+        SVDWorkspaceSize<xpu>(a, pinv_a, u_shape, s_shape, v_shape, req, ctx);
     work_space_size += rcond.shape_.Size();  // For rcond.
     work_space_size += 2 * u_shape.Size();   // For UT.
     work_space_size += s_shape.Size();       // For S.
@@ -458,7 +513,9 @@ size_t PinvForwardWorkspaceSize(const TBlob& a,
 inline mxnet::TShape GetTransAxis(const mxnet::TShape& in_shape) {
   const int in_ndim = in_shape.ndim();
   std::vector<int> trans_axis(in_ndim, -1);
-  for (int i = 0; i < in_ndim - 2; ++i) { trans_axis[i] = i; }
+  for (int i = 0; i < in_ndim - 2; ++i) {
+    trans_axis[i] = i;
+  }
   trans_axis[in_ndim - 2] = in_ndim - 1;
   trans_axis[in_ndim - 1] = in_ndim - 2;
   return mxnet::TShape(trans_axis.begin(), trans_axis.end());
@@ -469,10 +526,13 @@ inline mxnet::TShape GetTransAxis(const mxnet::TShape& in_shape) {
 #define NP_LINALG_PINV_BROADCAST(OP, RTCOP) \
   mxnet::op::BinaryBroadcastCompute<xpu, op::mshadow_op::OP>
 #else
-#define NP_LINALG_PINV_BROADCAST(OP, RTCOP) mxnet::op::BinaryBroadcastRTCCompute {#RTCOP}
+#define NP_LINALG_PINV_BROADCAST(OP, RTCOP) \
+  mxnet::op::BinaryBroadcastRTCCompute {    \
+#RTCOP                                  \
+  }
 #endif
 
-template<typename xpu>
+template <typename xpu>
 void PinvOpForwardImpl(const TBlob& a,
                        const TBlob& rcond,
                        const TBlob& pinv_a,
@@ -480,12 +540,12 @@ void PinvOpForwardImpl(const TBlob& a,
                        const OpContext& ctx,
                        const std::vector<OpReqType>& req,
                        const Tensor<xpu, 1, char>& workspace) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  using IndexT = typename LapackIndex<xpu>::IndexT;
-  const mxnet::TShape a_shape = a.shape_;
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  using IndexT                    = typename LapackIndex<xpu>::IndexT;
+  const mxnet::TShape a_shape     = a.shape_;
   const mxnet::TShape rcond_shape = rcond.shape_;
-  const int a_ndim = a_shape.ndim();
-  const int rcond_ndim = rcond_shape.ndim();
+  const int a_ndim                = a_shape.ndim();
+  const int rcond_ndim            = rcond_shape.ndim();
   mxnet::TShape rcond_shape_newaxis(rcond_ndim + 1, 1);
   for (int i = 0; i < rcond_ndim; ++i) {
     rcond_shape_newaxis[i] = rcond_shape[i];
@@ -496,7 +556,7 @@ void PinvOpForwardImpl(const TBlob& a,
   mxnet::TShape v_shape;
   mxnet::TShape vt_shape;
   GetPinvShape(a_shape, &u_shape, &s_shape, &v_shape, &ut_shape, &vt_shape);
-  mxnet::TShape smax_shape = s_shape;
+  mxnet::TShape smax_shape       = s_shape;
   smax_shape[s_shape.ndim() - 1] = 1;
   mxnet::TShape s_shape_newaxis(s_shape.ndim() + 1, 1);
   for (int i = 0; i < s_shape.ndim(); ++i) {
@@ -509,19 +569,19 @@ void PinvOpForwardImpl(const TBlob& a,
   MSHADOW_SGL_DBL_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(pinv_a.type_flag_, DType, {
       const size_t workspace_size = (workspace.shape_.Size() + sizeof(DType) - 1) / sizeof(DType);
-      const size_t lwork = workspace_size - rcond_shape_newaxis.Size()
-        - 2 * u_shape.Size() - s_shape.Size() - 2 * v_shape.Size() - smax_shape.Size()
-        - cutoff_shape.Size() - large_shape.Size();
-      DType *work_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-      DType *rcond_ptr = work_ptr + lwork;
-      DType *ut_ptr = rcond_ptr + rcond_shape_newaxis.Size();
-      DType *u_ptr = ut_ptr + ut_shape.Size();
-      DType *s_ptr = u_ptr + u_shape.Size();
-      DType *v_ptr = s_ptr + s_shape.Size();
-      DType *vt_ptr = v_ptr + v_shape.Size();
-      DType *smax_ptr = vt_ptr + vt_shape.Size();
-      DType *cutoff_ptr = smax_ptr + smax_shape.Size();
-      DType *large_ptr = cutoff_ptr + cutoff_shape.Size();
+      const size_t lwork = workspace_size - rcond_shape_newaxis.Size() - 2 * u_shape.Size() -
+                           s_shape.Size() - 2 * v_shape.Size() - smax_shape.Size() -
+                           cutoff_shape.Size() - large_shape.Size();
+      DType* work_ptr   = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* rcond_ptr  = work_ptr + lwork;
+      DType* ut_ptr     = rcond_ptr + rcond_shape_newaxis.Size();
+      DType* u_ptr      = ut_ptr + ut_shape.Size();
+      DType* s_ptr      = u_ptr + u_shape.Size();
+      DType* v_ptr      = s_ptr + s_shape.Size();
+      DType* vt_ptr     = v_ptr + v_shape.Size();
+      DType* smax_ptr   = vt_ptr + vt_shape.Size();
+      DType* cutoff_ptr = smax_ptr + smax_shape.Size();
+      DType* large_ptr  = cutoff_ptr + cutoff_shape.Size();
       // Step1: Calculate SVD.
       TBlob work_data(work_ptr, Shape1(lwork), a.dev_mask(), a.dev_id());
       TBlob u_data(u_ptr, u_shape, a.dev_mask(), a.dev_id());
@@ -532,69 +592,77 @@ void PinvOpForwardImpl(const TBlob& a,
       // Noet: Only a_shape[a_ndim - 2] > a_shape[a_ndim - 1], need transpose operation.
       if (a_shape[a_ndim - 2] > a_shape[a_ndim - 1]) {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a.Size(), u_ptr, a.dptr<AType>());
-        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, u_data, ut_data,  // u_data: src, ut_data: res
+            s, a.Size(), u_ptr, a.dptr<AType>());
+        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
+                                      u_data,
+                                      ut_data,  // u_data: src, ut_data: res
                                       GetTransAxis(u_data.shape_));
         BatchSVDImpl(static_cast<IndexT>(a_shape[a_ndim - 1]),
                      static_cast<IndexT>(a_shape[a_ndim - 2]),
                      vt_data.FlatToKD<xpu, 3, DType>(s),
                      s_data.FlatToKD<xpu, 2, DType>(s),
                      ut_data.FlatToKD<xpu, 3, DType>(s),
-                     work_data.FlatToKD<xpu, 1, DType>(s), s);
+                     work_data.FlatToKD<xpu, 1, DType>(s),
+                     s);
       } else {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a.Size(), v_ptr, a.dptr<AType>());
+            s, a.Size(), v_ptr, a.dptr<AType>());
         BatchSVDImpl(static_cast<IndexT>(a_shape[a_ndim - 2]),
                      static_cast<IndexT>(a_shape[a_ndim - 1]),
                      u_data.FlatToKD<xpu, 3, DType>(s),
                      s_data.FlatToKD<xpu, 2, DType>(s),
                      v_data.FlatToKD<xpu, 3, DType>(s),
-                     work_data.FlatToKD<xpu, 1, DType>(s), s);
+                     work_data.FlatToKD<xpu, 1, DType>(s),
+                     s);
       }
       TBlob smax_data(smax_ptr, smax_shape, a.dev_mask(), a.dev_id());
       TBlob cutoff_data(cutoff_ptr, cutoff_shape, a.dev_mask(), a.dev_id());
       TBlob large_data(large_ptr, large_shape, a.dev_mask(), a.dev_id());
       TBlob rcond_data(rcond_ptr, rcond_shape_newaxis, a.dev_mask(), a.dev_id());
-      Tensor<xpu, 2, DType> S = s_data.FlatToKD<xpu, 2, DType>(s);
+      Tensor<xpu, 2, DType> S    = s_data.FlatToKD<xpu, 2, DType>(s);
       Tensor<xpu, 2, DType> Smax = smax_data.FlatToKD<xpu, 2, DType>(s);
       mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-        s, rcond_shape_newaxis.Size(), rcond_ptr, rcond.dptr<AType>());
+          s, rcond_shape_newaxis.Size(), rcond_ptr, rcond.dptr<AType>());
       // Step2: Calculate Smax.
       mxnet_op::Kernel<SingularValSmax, xpu>::Launch(
-        s, S.size(0), Smax.dptr_, S.dptr_, S.size(1), S.stride_);
+          s, S.size(0), Smax.dptr_, S.dptr_, S.size(1), S.stride_);
       // Step3: Calculate Cutoff.
       std::vector<OpReqType> temp_req({kWriteTo});
-      NP_LINALG_PINV_BROADCAST(mul, mul)(attrs, ctx,
-                                         {rcond_data, smax_data},
-                                         temp_req, {cutoff_data});
+      NP_LINALG_PINV_BROADCAST(mul, mul)
+      (attrs, ctx, {rcond_data, smax_data}, temp_req, {cutoff_data});
       // Step4: Calculte Large.
-      NP_LINALG_PINV_BROADCAST(gt, greater)(attrs, ctx,
-                                            {s_data, cutoff_data},
-                                            temp_req, {large_data});
+      NP_LINALG_PINV_BROADCAST(gt, greater)
+      (attrs, ctx, {s_data, cutoff_data}, temp_req, {large_data});
       // Step5: Discard small singular values.
       mxnet_op::Kernel<DiscardSmallSingularVal, xpu>::Launch(
-        s, s_data.Size(), s_data.dptr<DType>(), large_data.dptr<DType>());
+          s, s_data.Size(), s_data.dptr<DType>(), large_data.dptr<DType>());
       // Step6: Calculte matmul(transpose(v), multiply(s[..., newaxis], transpose(u))).
       // Note: No need transpose when a_shape[a_ndim - 2] >= a_shape[a_ndim - 1]
       if (a_shape[a_ndim - 2] <= a_shape[a_ndim - 1]) {
-        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, u_data, ut_data,  // u_data: src, ut_data: res
+        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
+                                      u_data,
+                                      ut_data,  // u_data: src, ut_data: res
                                       GetTransAxis(u_data.shape_));
-        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, v_data, vt_data,  // v_data: src, vt_data: res
+        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
+                                      v_data,
+                                      vt_data,  // v_data: src, vt_data: res
                                       GetTransAxis(v_data.shape_));
       }
       s_data = s_data.reshape(s_shape_newaxis);
       u_data = ut_data.reshape(ut_shape);
-      NP_LINALG_PINV_BROADCAST(mul, mul)(attrs, ctx, {s_data, ut_data},
-                                         temp_req, {u_data});
+      NP_LINALG_PINV_BROADCAST(mul, mul)(attrs, ctx, {s_data, ut_data}, temp_req, {u_data});
       gemm2::op(vt_data.FlatToKD<xpu, 3, DType>(s),
                 u_data.FlatToKD<xpu, 3, DType>(s),
                 pinv_a.FlatToKD<xpu, 3, DType>(s),
-                DType(1), false, false, s);
+                DType(1),
+                false,
+                false,
+                s);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void PinvOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -603,43 +671,51 @@ void PinvOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& a = inputs[0];
-  const TBlob& rcond = inputs[1];
-  const TBlob& pinv_a = outputs[0];
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
+  const TBlob& a              = inputs[0];
+  const TBlob& rcond          = inputs[1];
+  const TBlob& pinv_a         = outputs[0];
   const mxnet::TShape a_shape = a.shape_;
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
 
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   size_t workspace_size = PinvForwardWorkspaceSize<xpu>(a, rcond, pinv_a, attrs, req, ctx);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
   PinvOpForwardImpl<xpu>(a, rcond, pinv_a, attrs, ctx, req, workspace);
 }
 
 // Calculates workspace size of pinv scalar rcond op forward.
-template<typename xpu>
+template <typename xpu>
 size_t PinvScalarRcondForwardWorkspaceSize(const TBlob& a,
                                            const TBlob& pinv_a,
                                            const nnvm::NodeAttrs& attrs,
                                            const std::vector<OpReqType>& req,
                                            const OpContext& ctx) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
   size_t work_space_size = 0;
   mxnet::TShape u_shape, s_shape, v_shape;
   GetPinvShape(a.shape_, &u_shape, &s_shape, &v_shape);
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(pinv_a.type_flag_, OType, {
-    mxnet::TShape smax_shape = s_shape;
+    mxnet::TShape smax_shape       = s_shape;
     smax_shape[s_shape.ndim() - 1] = 1;
     work_space_size +=  // For #gesdd_ or #gesvd work space size.
-      SVDWorkspaceSize<xpu>(a, pinv_a, u_shape, s_shape, v_shape, req, ctx);
+        SVDWorkspaceSize<xpu>(a, pinv_a, u_shape, s_shape, v_shape, req, ctx);
     work_space_size += 2 * u_shape.Size();  // For UT.
     work_space_size += s_shape.Size();      // For S.
     work_space_size += 2 * v_shape.Size();  // For V.
@@ -649,17 +725,17 @@ size_t PinvScalarRcondForwardWorkspaceSize(const TBlob& a,
   return 0U;
 }
 
-template<typename xpu>
+template <typename xpu>
 void PinvScalarRcondOpForwardImpl(const TBlob& a,
                                   const TBlob& pinv_a,
                                   const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<OpReqType>& req,
                                   const Tensor<xpu, 1, char>& workspace) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  using IndexT = typename LapackIndex<xpu>::IndexT;
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
+  using IndexT                = typename LapackIndex<xpu>::IndexT;
   const mxnet::TShape a_shape = a.shape_;
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim            = a_shape.ndim();
 
   mxnet::TShape s_shape;
   mxnet::TShape u_shape;
@@ -673,16 +749,16 @@ void PinvScalarRcondOpForwardImpl(const TBlob& a,
   }
   MSHADOW_SGL_DBL_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(pinv_a.type_flag_, DType, {
-      const double rcond = nnvm::get<PinvScalarRcondParam>(attrs.parsed).rcond;
+      const double rcond          = nnvm::get<PinvScalarRcondParam>(attrs.parsed).rcond;
       const size_t workspace_size = (workspace.shape_.Size() + sizeof(DType) - 1) / sizeof(DType);
-      const size_t lwork = workspace_size - 2 * u_shape.Size() - s_shape.Size()
-        - 2 * v_shape.Size();
-      DType *work_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-      DType *u_ptr = work_ptr + lwork;
-      DType *ut_ptr = u_ptr + u_shape.Size();
-      DType *s_ptr = ut_ptr + ut_shape.Size();
-      DType *v_ptr = s_ptr + s_shape.Size();
-      DType *vt_ptr = v_ptr + v_shape.Size();
+      const size_t lwork =
+          workspace_size - 2 * u_shape.Size() - s_shape.Size() - 2 * v_shape.Size();
+      DType* work_ptr = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* u_ptr    = work_ptr + lwork;
+      DType* ut_ptr   = u_ptr + u_shape.Size();
+      DType* s_ptr    = ut_ptr + ut_shape.Size();
+      DType* v_ptr    = s_ptr + s_shape.Size();
+      DType* vt_ptr   = v_ptr + v_shape.Size();
       // Step1: Calculate SVD.
       TBlob work_data(work_ptr, Shape1(lwork), a.dev_mask(), a.dev_id());
       TBlob u_data(u_ptr, u_shape, a.dev_mask(), a.dev_id());
@@ -694,51 +770,61 @@ void PinvScalarRcondOpForwardImpl(const TBlob& a,
       // Noet: Only a_shape[a_ndim - 2] > a_shape[a_ndim - 1], need transpose operation.
       if (a_shape[a_ndim - 2] > a_shape[a_ndim - 1]) {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a.Size(), u_ptr, a.dptr<AType>());
-        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, u_data, ut_data,  // u_data: src, ut_data: res
+            s, a.Size(), u_ptr, a.dptr<AType>());
+        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
+                                      u_data,
+                                      ut_data,  // u_data: src, ut_data: res
                                       GetTransAxis(u_data.shape_));
         BatchSVDImpl(static_cast<IndexT>(a_shape[a_ndim - 1]),
                      static_cast<IndexT>(a_shape[a_ndim - 2]),
                      vt_data.FlatToKD<xpu, 3, DType>(s),
                      s_data.FlatToKD<xpu, 2, DType>(s),
                      ut_data.FlatToKD<xpu, 3, DType>(s),
-                     work_data.FlatToKD<xpu, 1, DType>(s), s);
+                     work_data.FlatToKD<xpu, 1, DType>(s),
+                     s);
       } else {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a.Size(), v_ptr, a.dptr<AType>());
+            s, a.Size(), v_ptr, a.dptr<AType>());
         BatchSVDImpl(static_cast<IndexT>(a_shape[a_ndim - 2]),
                      static_cast<IndexT>(a_shape[a_ndim - 1]),
                      u_data.FlatToKD<xpu, 3, DType>(s),
                      s_data.FlatToKD<xpu, 2, DType>(s),
                      v_data.FlatToKD<xpu, 3, DType>(s),
-                     work_data.FlatToKD<xpu, 1, DType>(s), s);
+                     work_data.FlatToKD<xpu, 1, DType>(s),
+                     s);
       }
       // Step2: Discard small singular values.
       mxnet_op::Kernel<DiscardSmallSingularValWithScalarRcond, xpu>::Launch(
-        s, S.size(0), S.dptr_, S.size(1), S.stride_, rcond);
+          s, S.size(0), S.dptr_, S.size(1), S.stride_, rcond);
       // Step3: Calculte matmul(transpose(v), multiply(s[..., newaxis], transpose(u))).
       // Note: No need transpose when a_shape[a_ndim - 2] >= a_shape[a_ndim - 1]
       if (a_shape[a_ndim - 2] <= a_shape[a_ndim - 1]) {
-        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, u_data, ut_data,  // u_data: src, ut_data: res
+        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
+                                      u_data,
+                                      ut_data,  // u_data: src, ut_data: res
                                       GetTransAxis(u_data.shape_));
-        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, v_data, vt_data,  // v_data: src, vt_data: res
+        mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
+                                      v_data,
+                                      vt_data,  // v_data: src, vt_data: res
                                       GetTransAxis(v_data.shape_));
       }
       s_data = s_data.reshape(s_shape_newaxis);
       u_data = ut_data.reshape(ut_shape);
-      NP_LINALG_PINV_BROADCAST(mul, mul)(attrs, ctx, {s_data, ut_data},
-                                         {kWriteTo}, {u_data});
+      NP_LINALG_PINV_BROADCAST(mul, mul)(attrs, ctx, {s_data, ut_data}, {kWriteTo}, {u_data});
       gemm2::op(vt_data.FlatToKD<xpu, 3, DType>(s),
                 u_data.FlatToKD<xpu, 3, DType>(s),
                 pinv_a.FlatToKD<xpu, 3, DType>(s),
-                DType(1), false, false, s);
+                DType(1),
+                false,
+                false,
+                s);
     });
   });
 }
 
 #undef NP_LINALG_PINV_BROADCAST
 
-template<typename xpu>
+template <typename xpu>
 void PinvScalarRcondOpForward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -747,18 +833,22 @@ void PinvScalarRcondOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& a = inputs[0];
+  Stream<xpu>* s      = ctx.get_stream<xpu>();
+  const TBlob& a      = inputs[0];
   const TBlob& pinv_a = outputs[0];
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   // Calculate workspace size.
   size_t workspace_size = PinvScalarRcondForwardWorkspaceSize<xpu>(a, pinv_a, attrs, req, ctx);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
   PinvScalarRcondOpForwardImpl<xpu>(a, pinv_a, attrs, ctx, req, workspace);
 }
 
diff --git a/src/operator/numpy/linalg/np_pinv.cc b/src/operator/numpy/linalg/np_pinv.cc
index 8f1968bb046a..b3317bafb68c 100644
--- a/src/operator/numpy/linalg/np_pinv.cc
+++ b/src/operator/numpy/linalg/np_pinv.cc
@@ -29,19 +29,18 @@ namespace mxnet {
 namespace op {
 
 bool PinvOpShape(const nnvm::NodeAttrs& attrs,
-                 mxnet::ShapeVector *in_attrs,
-                 mxnet::ShapeVector *out_attrs) {
+                 mxnet::ShapeVector* in_attrs,
+                 mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const mxnet::TShape& a_shape = (*in_attrs)[0];
+  const mxnet::TShape& a_shape     = (*in_attrs)[0];
   const mxnet::TShape& rcond_shape = (*in_attrs)[1];
-  const mxnet::TShape& pinv_shape = (*out_attrs)[0];
-  const int a_ndim = a_shape.ndim();
+  const mxnet::TShape& pinv_shape  = (*out_attrs)[0];
+  const int a_ndim                 = a_shape.ndim();
 
   if (shape_is_known(a_shape)) {
     // Forward shape inference.
-    CHECK_GE(a_ndim, 2)
-      << "Array must be at least two-dimensional";
+    CHECK_GE(a_ndim, 2) << "Array must be at least two-dimensional";
     // Calculte pinv shape.
     std::vector<int> pinv_shape_vec(a_ndim, -1);
     for (int i = 0; i < a_ndim - 2; ++i) {
@@ -56,8 +55,7 @@ bool PinvOpShape(const nnvm::NodeAttrs& attrs,
     // Backward shape inference.
     if (shape_is_known(pinv_shape)) {
       const int pinv_ndim = pinv_shape.ndim();
-      CHECK_GE(pinv_ndim, 2)
-        << "Array must be at least two-dimensional";
+      CHECK_GE(pinv_ndim, 2) << "Array must be at least two-dimensional";
       // Calculte 'a' shape.
       std::vector<int> a_shape_vec(pinv_ndim, -1);
       for (int i = 0; i < pinv_ndim - 2; ++i) {
@@ -78,13 +76,12 @@ inline bool PinvOpType(const nnvm::NodeAttrs& attrs,
                        std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  int a_type = in_attrs->at(0);
+  int a_type     = in_attrs->at(0);
   int rcond_type = in_attrs->at(1);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg.";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg.";
   CHECK(rcond_type == mshadow::kFloat32 || rcond_type == mshadow::kFloat64)
-    << "rcond type should be float32 or float64.";
+      << "rcond type should be float32 or float64.";
   if (mshadow::kFloat32 == a_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   } else {
@@ -96,37 +93,38 @@ inline bool PinvOpType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(PinvParam);
 
 NNVM_REGISTER_OP(_npi_pinv)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(mxnet::op::ParamParser<PinvParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A", "rcond"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", PinvOpShape)
-.set_attr<nnvm::FInferType>("FInferType", PinvOpType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", PinvOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of matrix")
-.add_argument("rcond", "NDArray-or-Symbol", "Cutoff for small singular values.")
-.add_arguments(PinvParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(mxnet::op::ParamParser<PinvParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "rcond"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", PinvOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", PinvOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", PinvOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_argument("rcond", "NDArray-or-Symbol", "Cutoff for small singular values.")
+    .add_arguments(PinvParam::__FIELDS__());
 
 bool PinvScalarRcondOpShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const mxnet::TShape& a_shape = (*in_attrs)[0];
+  const mxnet::TShape& a_shape    = (*in_attrs)[0];
   const mxnet::TShape& pinv_shape = (*out_attrs)[0];
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim                = a_shape.ndim();
 
   if (shape_is_known(a_shape)) {
     // Forward shape inference.
-    CHECK_GE(a_ndim, 2)
-      << "Array must be at least two-dimensional";
+    CHECK_GE(a_ndim, 2) << "Array must be at least two-dimensional";
     // Calculte pinv shape.
     std::vector<int> pinv_shape_vec(a_ndim, -1);
     for (int i = 0; i < a_ndim - 2; ++i) {
@@ -139,8 +137,7 @@ bool PinvScalarRcondOpShape(const nnvm::NodeAttrs& attrs,
     // Backward shape inference.
     if (shape_is_known(pinv_shape)) {
       const int pinv_ndim = pinv_shape.ndim();
-      CHECK_GE(pinv_ndim, 2)
-        << "Array must be at least two-dimensional";
+      CHECK_GE(pinv_ndim, 2) << "Array must be at least two-dimensional";
       // Calculte 'a' shape.
       std::vector<int> a_shape_vec(pinv_ndim, -1);
       for (int i = 0; i < pinv_ndim - 2; ++i) {
@@ -161,8 +158,7 @@ inline bool PinvScalarRcondOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
   int a_type = in_attrs->at(0);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg.";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg.";
   if (mshadow::kFloat32 == a_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   } else {
@@ -174,22 +170,24 @@ inline bool PinvScalarRcondOpType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(PinvScalarRcondParam);
 
 NNVM_REGISTER_OP(_npi_pinv_scalar_rcond)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(mxnet::op::ParamParser<PinvScalarRcondParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", PinvScalarRcondOpShape)
-.set_attr<nnvm::FInferType>("FInferType", PinvScalarRcondOpType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", PinvScalarRcondOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("A", "NDArray-or-Symbol", "Tensor of matrix")
-.add_arguments(PinvScalarRcondParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(mxnet::op::ParamParser<PinvScalarRcondParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", PinvScalarRcondOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", PinvScalarRcondOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", PinvScalarRcondOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of matrix")
+    .add_arguments(PinvScalarRcondParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_pinv.cu b/src/operator/numpy/linalg/np_pinv.cu
index 83ae5df6de2e..6ee3d99022fe 100644
--- a/src/operator/numpy/linalg/np_pinv.cu
+++ b/src/operator/numpy/linalg/np_pinv.cu
@@ -29,11 +29,10 @@ namespace op {
 
 #if MXNET_USE_CUSOLVER == 1
 
-NNVM_REGISTER_OP(_npi_pinv)
-.set_attr<FCompute>("FCompute<gpu>", PinvOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_pinv).set_attr<FCompute>("FCompute<gpu>", PinvOpForward<gpu>);
 
 NNVM_REGISTER_OP(_npi_pinv_scalar_rcond)
-.set_attr<FCompute>("FCompute<gpu>", PinvScalarRcondOpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", PinvScalarRcondOpForward<gpu>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_potrf.cc b/src/operator/numpy/linalg/np_potrf.cc
index 40e900872365..ae81379431f8 100644
--- a/src/operator/numpy/linalg/np_potrf.cc
+++ b/src/operator/numpy/linalg/np_potrf.cc
@@ -37,27 +37,30 @@ inline bool NumpyLaCholeskyShape(const nnvm::NodeAttrs& attrs,
                                  mxnet::ShapeVector* in_attrs,
                                  mxnet::ShapeVector* out_attrs) {
   const mxnet::TShape& in_shape = (*in_attrs)[0];
-  CHECK_GE(in_shape.ndim(), 2)
-    << "Array must be at least two-dimensional";
+  CHECK_GE(in_shape.ndim(), 2) << "Array must be at least two-dimensional";
   return ElemwiseShape<1, 1>(attrs, in_attrs, out_attrs);
 }
 
 // calls forward and backward implemented in la_op
 NNVM_REGISTER_OP(_npi_cholesky)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaCholeskyParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyLaCholeskyShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{0, 0}}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, potrf>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_potrf"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be decomposed")
-.add_arguments(LaCholeskyParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaCholeskyParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyLaCholeskyShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, potrf>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_potrf"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be decomposed")
+    .add_arguments(LaCholeskyParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_potrf.cu b/src/operator/numpy/linalg/np_potrf.cu
index b2d3db3c040c..4746c36f810d 100644
--- a/src/operator/numpy/linalg/np_potrf.cu
+++ b/src/operator/numpy/linalg/np_potrf.cu
@@ -32,7 +32,7 @@ namespace op {
 #if MXNET_USE_CUSOLVER == 1
 
 NNVM_REGISTER_OP(_npi_cholesky)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, potrf>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, potrf>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_qr-inl.h b/src/operator/numpy/linalg/np_qr-inl.h
index 19df4bb66b79..67be744b3762 100644
--- a/src/operator/numpy/linalg/np_qr-inl.h
+++ b/src/operator/numpy/linalg/np_qr-inl.h
@@ -49,161 +49,174 @@ using namespace mshadow;
 // - We call orgqr after geqrf. Apart from A, they also communicate via the
 //   first part of the workspace.
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_geqrf(const Tensor<xpu, 2, DType>& A,
                   const Tensor<xpu, 1, DType>& work,
-                  Stream<xpu> *s = 0);
+                  Stream<xpu>* s = 0);
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void linalg_orgqr(const Tensor<xpu, 2, DType>& A,
                   const Tensor<xpu, 1, DType>& work,
-                  Stream<xpu> *s = 0);
+                  Stream<xpu>* s = 0);
 
 // This function determines the amount of workspace needed for linalg_geqrf,
 // linalg_orgqr. The workspace can be used for both. The first mn entries are
 // used to communicate information from geqrf to orgqr (tau).
 
-template<typename xpu, typename DType>
-int linalg_qr_workspace_query(const Tensor<xpu, 2, DType>& A,
-                              Stream<xpu> *s = 0);
+template <typename xpu, typename DType>
+int linalg_qr_workspace_query(const Tensor<xpu, 2, DType>& A, Stream<xpu>* s = 0);
 
 //////////////////////////////// QR ////////////////////////////////////////////
 
 // CPU/GPU-versions of LAPACK function "geqrf", "orqrq." to be used in QR op.
 
-template<typename xpu, typename DType> inline
-void check_geqrf(const Tensor<xpu, 2, DType>& A,
-                 const Tensor<xpu, 1, DType>& work) {
-  CHECK_LE(A.size(0), work.size(0))
-    << "Size of work is too small";
+template <typename xpu, typename DType>
+inline void check_geqrf(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 1, DType>& work) {
+  CHECK_LE(A.size(0), work.size(0)) << "Size of work is too small";
 }
 
 // transpose helper
 struct QrTypeTransposeHelper {
-  template<typename InDType, typename OutDType>
-  MSHADOW_XINLINE static void Map(int i, const InDType *in_data, OutDType *out_data,
-                                  const int ncol1, const int ncol2, const int step) {
+  template <typename InDType, typename OutDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const InDType* in_data,
+                                  OutDType* out_data,
+                                  const int ncol1,
+                                  const int ncol2,
+                                  const int step) {
     int idx = i / step, row = (i % step) / ncol1, col = (i % step) % ncol1;
     out_data[idx * step + row + col * ncol2] = static_cast<OutDType>(in_data[i]);
   }
 };
 
-#define LINALG_CPU_GEQRF(fname, DType) \
-template<> inline \
-void linalg_geqrf<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  check_geqrf(A, work); \
-  const int m = A.size(1); \
-  const int n = A.size(0); \
-  const int mn = (m > n ? n : m); \
-  int lwork = work.shape_.Size() - mn; \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR, m, n, \
-                               A.dptr_, A.stride_, work.dptr_, \
-                               work.dptr_ + mn, lwork)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+#define LINALG_CPU_GEQRF(fname, DType)                                                          \
+  template <>                                                                                   \
+  inline void linalg_geqrf<cpu, DType>(                                                         \
+      const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 1, DType>& work, Stream<cpu>* s) {      \
+    check_geqrf(A, work);                                                                       \
+    const int m  = A.size(1);                                                                   \
+    const int n  = A.size(0);                                                                   \
+    const int mn = (m > n ? n : m);                                                             \
+    int lwork    = work.shape_.Size() - mn;                                                     \
+    int ret(MXNET_LAPACK_##fname(                                                               \
+        MXNET_LAPACK_COL_MAJOR, m, n, A.dptr_, A.stride_, work.dptr_, work.dptr_ + mn, lwork)); \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";                                  \
+  }
 LINALG_CPU_GEQRF(sgeqrf, float)
 LINALG_CPU_GEQRF(dgeqrf, double)
 
-#define LINALG_CPU_ORGQR(fname, DType) \
-template<> inline \
-void linalg_orgqr<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 1, DType>& work, \
-                              Stream<cpu> *s) { \
-  check_geqrf(A, work); \
-  const int m = A.size(1); \
-  const int n = A.size(0); \
-  const int mn = (m > n ? n : m); \
-  int lwork = work.shape_.Size() - mn; \
-  int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR, m, mn, mn, \
-                               A.dptr_, A.stride_, work.dptr_, \
-                               work.dptr_ + mn, lwork)); \
-  CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu."; \
-}
+#define LINALG_CPU_ORGQR(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_orgqr<cpu, DType>(                                                    \
+      const Tensor<cpu, 2, DType>& A, const Tensor<cpu, 1, DType>& work, Stream<cpu>* s) { \
+    check_geqrf(A, work);                                                                  \
+    const int m  = A.size(1);                                                              \
+    const int n  = A.size(0);                                                              \
+    const int mn = (m > n ? n : m);                                                        \
+    int lwork    = work.shape_.Size() - mn;                                                \
+    int ret(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR,                                   \
+                                 m,                                                        \
+                                 mn,                                                       \
+                                 mn,                                                       \
+                                 A.dptr_,                                                  \
+                                 A.stride_,                                                \
+                                 work.dptr_,                                               \
+                                 work.dptr_ + mn,                                          \
+                                 lwork));                                                  \
+    CHECK_EQ(ret, 0) << #fname << " failed in lapack on cpu.";                             \
+  }
 LINALG_CPU_ORGQR(sorgqr, float)
 LINALG_CPU_ORGQR(dorgqr, double)
 
-#define LINALG_CPU_QR_WORKSPACE_QUERY(prefix, DType) \
-template<> inline \
-int linalg_qr_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                                          Stream<cpu> *s) { \
-  const int m(A.size(1)); \
-  const int n(A.size(0)); \
-  const int mn = (m > n ? n : m); \
-  DType work = 0; \
-  int ret(MXNET_LAPACK_##prefix##geqrf(MXNET_LAPACK_COL_MAJOR, m, \
-                                       n, A.dptr_, A.stride_, &work, \
-                                       &work, -1)); \
-  CHECK_EQ(ret, 0) << #prefix << "geqrf: Workspace query failed on CPU."; \
-  int ws_size(static_cast<int>(work)); \
-  ret = MXNET_LAPACK_##prefix##orgqr(MXNET_LAPACK_COL_MAJOR, m, mn, \
-                                     mn, A.dptr_, \
-                                     A.stride_, &work, &work, -1); \
-  CHECK_EQ(ret, 0) << #prefix << "orgqr: Workspace query failed on CPU."; \
-  int wsz2(static_cast<int>(work)); \
-  if (wsz2 > ws_size) ws_size = wsz2; \
-  return ws_size + mn; \
-}
+#define LINALG_CPU_QR_WORKSPACE_QUERY(prefix, DType)                               \
+  template <>                                                                      \
+  inline int linalg_qr_workspace_query<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
+                                                   Stream<cpu>* s) {               \
+    const int m(A.size(1));                                                        \
+    const int n(A.size(0));                                                        \
+    const int mn = (m > n ? n : m);                                                \
+    DType work   = 0;                                                              \
+    int ret(MXNET_LAPACK_##prefix##geqrf(                                          \
+        MXNET_LAPACK_COL_MAJOR, m, n, A.dptr_, A.stride_, &work, &work, -1));      \
+    CHECK_EQ(ret, 0) << #prefix << "geqrf: Workspace query failed on CPU.";        \
+    int ws_size(static_cast<int>(work));                                           \
+    ret = MXNET_LAPACK_##prefix##orgqr(                                            \
+        MXNET_LAPACK_COL_MAJOR, m, mn, mn, A.dptr_, A.stride_, &work, &work, -1);  \
+    CHECK_EQ(ret, 0) << #prefix << "orgqr: Workspace query failed on CPU.";        \
+    int wsz2(static_cast<int>(work));                                              \
+    if (wsz2 > ws_size)                                                            \
+      ws_size = wsz2;                                                              \
+    return ws_size + mn;                                                           \
+  }
 LINALG_CPU_QR_WORKSPACE_QUERY(s, float)
 LINALG_CPU_QR_WORKSPACE_QUERY(d, double)
 
 #ifdef __CUDACC__
 
-#define LINALG_GPU_GEQRF(fname, DType) \
-template<> inline \
-void linalg_geqrf<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_geqrf(A, work); \
-  const int m = A.size(1); \
-  const int n = A.size(0); \
-  const int mn = (m > n ? n : m); \
-  int lwork(work.size(0) - mn); \
-  Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU()); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                m, n, A.dptr_, A.stride_, work.dptr_, \
-                work.dptr_ + mn, lwork, static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_GEQRF(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_geqrf<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& work, Stream<gpu>* s) { \
+    using namespace mxnet;                                                                 \
+    using mshadow::gpu;                                                                    \
+    CHECK_NOTNULL(s);                                                                      \
+    check_geqrf(A, work);                                                                  \
+    const int m  = A.size(1);                                                              \
+    const int n  = A.size(0);                                                              \
+    const int mn = (m > n ? n : m);                                                        \
+    int lwork(work.size(0) - mn);                                                          \
+    Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU());             \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                         \
+                                  m,                                                       \
+                                  n,                                                       \
+                                  A.dptr_,                                                 \
+                                  A.stride_,                                               \
+                                  work.dptr_,                                              \
+                                  work.dptr_ + mn,                                         \
+                                  lwork,                                                   \
+                                  static_cast<int*>(info.dptr)));                          \
+    Storage::Get()->Free(info);                                                            \
+  }
 LINALG_GPU_GEQRF(DnSgeqrf, float)
 LINALG_GPU_GEQRF(DnDgeqrf, double)
 
 // ORGQR only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_ORGQR(fname, DType) \
-template<> inline \
-void linalg_orgqr<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_geqrf(A, work); \
-  const int m = A.size(1); \
-  const int n = A.size(0); \
-  const int mn = (m > n ? n : m); \
-  int lwork(work.size(0) - mn); \
-  Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU()); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                m, mn, mn, A.dptr_, A.stride_, work.dptr_, \
-                work.dptr_ + mn, lwork, static_cast<int *>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_ORGQR(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_orgqr<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& work, Stream<gpu>* s) { \
+    using namespace mxnet;                                                                 \
+    using mshadow::gpu;                                                                    \
+    CHECK_NOTNULL(s);                                                                      \
+    check_geqrf(A, work);                                                                  \
+    const int m  = A.size(1);                                                              \
+    const int n  = A.size(0);                                                              \
+    const int mn = (m > n ? n : m);                                                        \
+    int lwork(work.size(0) - mn);                                                          \
+    Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU());             \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                         \
+                                  m,                                                       \
+                                  mn,                                                      \
+                                  mn,                                                      \
+                                  A.dptr_,                                                 \
+                                  A.stride_,                                               \
+                                  work.dptr_,                                              \
+                                  work.dptr_ + mn,                                         \
+                                  lwork,                                                   \
+                                  static_cast<int*>(info.dptr)));                          \
+    Storage::Get()->Free(info);                                                            \
+  }
 
 #else
 
-#define LINALG_GPU_ORGQR(fname, DType) \
-template<> inline \
-void linalg_orgqr<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 1, DType>& work, \
-                              Stream<gpu> *s) { \
-  LOG(FATAL) << "orgqr requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_ORGQR(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_orgqr<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, DType>& work, Stream<gpu>* s) { \
+    LOG(FATAL) << "orgqr requires CUDA version >= 8.0!";                                   \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -213,35 +226,41 @@ LINALG_GPU_ORGQR(DnDorgqr, double)
 // ORGQR only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_QR_WORKSPACE_QUERY(prefix, DType) \
-template<> inline \
-int linalg_qr_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                          Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  const int m(A.size(1)); \
-  const int n(A.size(0)); \
-  const int mn = (m > n ? n : m); \
-  int work1(0); \
-  CUSOLVER_CALL(cusolverDn##prefix##geqrf_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                m, n, A.dptr_, A.stride_, &work1)); \
-  int work2(0);  \
-  Storage::Handle tau = Storage::Get()->Alloc(sizeof(DType), Context::GPU()); \
-  CUSOLVER_CALL(cusolverDn##prefix##orgqr_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                m, mn, mn, A.dptr_, A.stride_, static_cast<DType *>(tau.dptr), &work2)); \
-  Storage::Get()->Free(tau); \
-  return std::max(work1, work2) + mn; \
-}
+#define LINALG_GPU_QR_WORKSPACE_QUERY(prefix, DType)                                    \
+  template <>                                                                           \
+  inline int linalg_qr_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A,      \
+                                                   Stream<gpu>* s) {                    \
+    using namespace mxnet;                                                              \
+    using mshadow::gpu;                                                                 \
+    const int m(A.size(1));                                                             \
+    const int n(A.size(0));                                                             \
+    const int mn = (m > n ? n : m);                                                     \
+    int work1(0);                                                                       \
+    CUSOLVER_CALL(cusolverDn##prefix##geqrf_bufferSize(                                 \
+        Stream<gpu>::GetSolverHandle(s), m, n, A.dptr_, A.stride_, &work1));            \
+    int work2(0);                                                                       \
+    Storage::Handle tau = Storage::Get()->Alloc(sizeof(DType), Context::GPU());         \
+    CUSOLVER_CALL(cusolverDn##prefix##orgqr_bufferSize(Stream<gpu>::GetSolverHandle(s), \
+                                                       m,                               \
+                                                       mn,                              \
+                                                       mn,                              \
+                                                       A.dptr_,                         \
+                                                       A.stride_,                       \
+                                                       static_cast<DType*>(tau.dptr),   \
+                                                       &work2));                        \
+    Storage::Get()->Free(tau);                                                          \
+    return std::max(work1, work2) + mn;                                                 \
+  }
 
 #else
 
-#define LINALG_GPU_QR_WORKSPACE_QUERY(prefix, DType) \
-template<> inline \
-int linalg_qr_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                          Stream<gpu> *s) { \
-  LOG(FATAL) << "orgqr requires CUDA version >= 8.0!"; \
-  return 0; \
-}
+#define LINALG_GPU_QR_WORKSPACE_QUERY(prefix, DType)                               \
+  template <>                                                                      \
+  inline int linalg_qr_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
+                                                   Stream<gpu>* s) {               \
+    LOG(FATAL) << "orgqr requires CUDA version >= 8.0!";                           \
+    return 0;                                                                      \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -256,13 +275,13 @@ LINALG_GPU_QR_WORKSPACE_QUERY(D, double)
 // - Needs workspace (DType), size of which is determined by a workspace query
 
 struct qr {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& a,
                  const Tensor<xpu, 3, DType>& q,
                  const Tensor<xpu, 1, DType>& work,
                  const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s               = ctx.get_stream<xpu>();
     const mxnet::TShape& a_shape = a.shape_;
     for (index_t i = 0; i < a_shape[0]; ++i) {
       const Tensor<xpu, 2, DType>& ai = a[i];
@@ -275,21 +294,25 @@ struct qr {
 };
 
 // Calculate the necessary workspace size
-template<typename xpu>
+template <typename xpu>
 size_t QrForwardWorkspaceSize(const TBlob& a,
                               const TBlob& q,
                               const TBlob& r,
                               const std::vector<OpReqType>& req,
                               const OpContext& ctx) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
   const mxnet::TShape& a_shape = a.shape_;
-  const int a_ndim = a_shape.ndim();
-  const int n = a.size(a_ndim - 1);
-  const int m = a.size(a_ndim - 2);
+  const int a_ndim             = a_shape.ndim();
+  const int n                  = a.size(a_ndim - 1);
+  const int m                  = a.size(a_ndim - 2);
 
   MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(q.type_flag_, DType, {
@@ -311,15 +334,13 @@ size_t QrForwardWorkspaceSize(const TBlob& a,
       if (xpu::kDevCPU) {
         std::vector<DType> A_data(a_temp_tensor.MSize(), 0);
         TBlob a_data(A_data.data(), a_temp_tensor.shape_, a.dev_mask(), a.dev_id());
-        work_space_size +=
-          linalg_qr_workspace_query(a_data.get<xpu, 2, DType>(s), s);
+        work_space_size += linalg_qr_workspace_query(a_data.get<xpu, 2, DType>(s), s);
       } else {
         Storage::Handle a_handle =
-          Storage::Get()->Alloc(sizeof(DType) * a_temp_tensor.shape_.Size(), Context::GPU());
-        TBlob a_data(static_cast<DType*>(a_handle.dptr), a_temp_tensor.shape_,
-                                         a.dev_mask(), a.dev_id());
-        work_space_size +=
-          linalg_qr_workspace_query(a_data.get<xpu, 2, DType>(s), s);
+            Storage::Get()->Alloc(sizeof(DType) * a_temp_tensor.shape_.Size(), Context::GPU());
+        TBlob a_data(
+            static_cast<DType*>(a_handle.dptr), a_temp_tensor.shape_, a.dev_mask(), a.dev_id());
+        work_space_size += linalg_qr_workspace_query(a_data.get<xpu, 2, DType>(s), s);
         Storage::Get()->Free(a_handle);
       }
       return work_space_size * sizeof(DType);
@@ -329,7 +350,7 @@ size_t QrForwardWorkspaceSize(const TBlob& a,
   return 0U;
 }
 
-template<typename xpu>
+template <typename xpu>
 void QrOpForwardImpl(const TBlob& a,
                      const TBlob& q,
                      const TBlob& r,
@@ -337,9 +358,9 @@ void QrOpForwardImpl(const TBlob& a,
                      const Tensor<xpu, 1, char>& workspace,
                      const OpContext& ctx,
                      const nnvm::NodeAttrs& attrs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
   const mxnet::TShape& a_shape = a.shape_;
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim             = a_shape.ndim();
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(q.type_flag_, DType, {
     const int n = a.size(a_ndim - 1);
@@ -350,105 +371,98 @@ void QrOpForwardImpl(const TBlob& a,
     transp_shape[a_ndim - 2] = n;
     // Common for all (m, n) shapes
     const size_t workspace_size = (workspace.shape_.Size() + sizeof(DType) - 1) / sizeof(DType);
-    DType *a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-    DType *qt_ptr = a_ptr + a_shape.Size();
+    DType* a_ptr                = reinterpret_cast<DType*>(workspace.dptr_);
+    DType* qt_ptr               = a_ptr + a_shape.Size();
     TBlob a_trans_data(a_ptr, transp_shape, a.dev_mask(), a.dev_id());
     TBlob q_trans_data(qt_ptr, transp_shape, a.dev_mask(), a.dev_id());
     Tensor<xpu, 3, DType> At = a_trans_data.FlatToKD<xpu, 3, DType>(s);
     Tensor<xpu, 3, DType> Qt = q_trans_data.FlatToKD<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> R = r.FlatToKD<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> Q = q.FlatToKD<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> R  = r.FlatToKD<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> Q  = q.FlatToKD<xpu, 3, DType>(s);
 
     MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
       // Cast type and transpose a
-        mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
+      mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
           s, a.Size(), a.dptr<AType>(), a_ptr, n, m, m * n);
-      });
+    });
 
     if (m == n) {
-      DType *work_ptr = qt_ptr + a_shape.Size();
-      TBlob work_data(work_ptr, Shape1(workspace_size - a_shape.Size()),
-                      a.dev_mask(), a.dev_id());
+      DType* work_ptr = qt_ptr + a_shape.Size();
+      TBlob work_data(work_ptr, Shape1(workspace_size - a_shape.Size()), a.dev_mask(), a.dev_id());
       Tensor<xpu, 1, DType> Work = work_data.get<xpu, 1, DType>(s);
-      qr::op(At,
-             Qt,
-             Work, ctx, attrs);
+      qr::op(At, Qt, Work, ctx, attrs);
       // Transpose into R
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, r.Size(), At.dptr_, R.dptr_, m, m, m * m);
+          s, r.Size(), At.dptr_, R.dptr_, m, m, m * m);
       // Transpose into Q
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, q.Size(), Qt.dptr_, Q.dptr_, m, m, m * m);
+          s, q.Size(), Qt.dptr_, Q.dptr_, m, m, m * m);
       // R is triu
       mxnet_op::Kernel<ZeroTriangular, xpu>::Launch(
-        s, R.MSize(), m * R.stride_, R.stride_, R.dptr_, true);
+          s, R.MSize(), m * R.stride_, R.stride_, R.dptr_, true);
     } else if (m > n) {
       // r shape transposed
       mxnet::TShape r_shape(transp_shape);
       r_shape[a_ndim - 1] = n;
-      DType *rtemp_ptr = qt_ptr + a_shape.Size();
-      DType *work_ptr = rtemp_ptr + r_shape.Size();
+      DType* rtemp_ptr    = qt_ptr + a_shape.Size();
+      DType* work_ptr     = rtemp_ptr + r_shape.Size();
       TBlob rtemp_data(rtemp_ptr, r_shape, a.dev_mask(), a.dev_id());
-      TBlob work_data(work_ptr, Shape1(workspace_size - 2 * a_shape.Size()),
-                      a.dev_mask(), a.dev_id());
+      TBlob work_data(
+          work_ptr, Shape1(workspace_size - 2 * a_shape.Size()), a.dev_mask(), a.dev_id());
       Tensor<xpu, 3, DType> Rtemp = rtemp_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 1, DType> Work = work_data.get<xpu, 1, DType>(s);
-      qr::op(At,
-             Qt,
-             Work, ctx, attrs);
+      Tensor<xpu, 1, DType> Work  = work_data.get<xpu, 1, DType>(s);
+      qr::op(At, Qt, Work, ctx, attrs);
       // Final Rt of shape (N, N)
       for (index_t i = 0; i < At.size(0); ++i) {
-        const Tensor<xpu, 2, DType>& Ati = At[i];
+        const Tensor<xpu, 2, DType>& Ati    = At[i];
         const Tensor<xpu, 2, DType>& Rtempi = Rtemp[i];
         Tensor<xpu, 2, DType> Rk(Ati.dptr_, Shape2(n, n), Ati.stride_, s);
         Copy(Rtempi, Rk, s);
       }
       // Transpose into R of shape (N, N)
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, r.Size(), Rtemp.dptr_, R.dptr_, n, n, n * n);
+          s, r.Size(), Rtemp.dptr_, R.dptr_, n, n, n * n);
       // Transpose resulting qt(N, M) into q of shape (M, N)
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, q.Size(), Qt.dptr_, Q.dptr_, m, n, m * n);
+          s, q.Size(), Qt.dptr_, Q.dptr_, m, n, m * n);
       // R is triu
       mxnet_op::Kernel<ZeroTriangular, xpu>::Launch(
-        s, R.MSize(), n * R.stride_, R.stride_, R.dptr_, true);
-    // case m < n
+          s, R.MSize(), n * R.stride_, R.stride_, R.dptr_, true);
+      // case m < n
     } else {
       // q shape transposed
       mxnet::TShape q_shape(transp_shape);
       q_shape[a_ndim - 2] = m;
-      DType *qtemp_ptr = qt_ptr + a_shape.Size();
-      DType *work_ptr = qtemp_ptr + q_shape.Size();
+      DType* qtemp_ptr    = qt_ptr + a_shape.Size();
+      DType* work_ptr     = qtemp_ptr + q_shape.Size();
       TBlob qtemp_data(qtemp_ptr, q_shape, a.dev_mask(), a.dev_id());
-      TBlob work_data(work_ptr, Shape1(workspace_size - 2 * a_shape.Size()),
-                      a.dev_mask(), a.dev_id());
+      TBlob work_data(
+          work_ptr, Shape1(workspace_size - 2 * a_shape.Size()), a.dev_mask(), a.dev_id());
       Tensor<xpu, 3, DType> Qtemp = qtemp_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 1, DType> Work = work_data.get<xpu, 1, DType>(s);
-      qr::op(At,
-             Qt,
-             Work, ctx, attrs);
+      Tensor<xpu, 1, DType> Work  = work_data.get<xpu, 1, DType>(s);
+      qr::op(At, Qt, Work, ctx, attrs);
       // Transpose into R of shape (M, N)
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, r.Size(), At.dptr_, R.dptr_, m, n, n * m);
+          s, r.Size(), At.dptr_, R.dptr_, m, n, n * m);
       // Get Qt(M, M) from Qt(N, M)
       for (index_t i = 0; i < Qt.size(0); ++i) {
-        const Tensor<xpu, 2, DType>& Qti = Qt[i];
+        const Tensor<xpu, 2, DType>& Qti    = Qt[i];
         const Tensor<xpu, 2, DType>& Qtempi = Qtemp[i];
         Tensor<xpu, 2, DType> Qk(Qti.dptr_, Shape2(m, m), Qti.stride_, s);
         Copy(Qtempi, Qk, s);
       }
       // Transpose resulting qt into q of shape (M, M)
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, q.Size(), Qtemp.dptr_, Q.dptr_, m, m, m * m);
+          s, q.Size(), Qtemp.dptr_, Q.dptr_, m, m, m * m);
       // R is triu
       mxnet_op::Kernel<ZeroTriangular, xpu>::Launch(
-        s, R.MSize(), m * R.stride_, R.stride_, R.dptr_, true);
+          s, R.MSize(), m * R.stride_, R.stride_, R.dptr_, true);
     }
   });
 }
 
 // (A) => (Q, R)
-template<typename xpu>
+template <typename xpu>
 void NumpyLaQrForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -458,36 +472,45 @@ void NumpyLaQrForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   const TBlob& a = inputs[0];
   const TBlob& q = outputs[0];
   const TBlob& r = outputs[1];
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   // Zero-size input, no need to launch kernel
-  if (0U == a.Size()) { return; }
+  if (0U == a.Size()) {
+    return;
+  }
 
   // Calculate workspace size
   size_t workspace_size = QrForwardWorkspaceSize<xpu>(a, q, r, req, ctx);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
   // Op
   QrOpForwardImpl<xpu>(a, q, r, req, workspace, ctx, attrs);
 }
 
-template<int req>
+template <int req>
 struct assign_helper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, const DType* in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i]);
   }
 };
 
 // backprop helper to get y, v
 struct QrBackHelper_G1 {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(const int k, const int m, const int n, const DType *in_data,
-                                  const int ldin, DType *out_data, const int ldout) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(const int k,
+                                  const int m,
+                                  const int n,
+                                  const DType* in_data,
+                                  const int ldin,
+                                  DType* out_data,
+                                  const int ldout) {
     const int offin(k * m * ldin);
     const int offout(k * m * ldout);
     for (index_t i = 0; i < m; ++i) {
@@ -500,19 +523,25 @@ struct QrBackHelper_G1 {
 
 // backprop helper to get da from dx, dy
 struct QrBackHelper_G2 {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(const int k, const int m, const int n, const DType *in_data_x,
-                                  const int ldinx, const DType *in_data_y, const int ldiny,
-                                  DType *out_data, const int ldout) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(const int k,
+                                  const int m,
+                                  const int n,
+                                  const DType* in_data_x,
+                                  const int ldinx,
+                                  const DType* in_data_y,
+                                  const int ldiny,
+                                  DType* out_data,
+                                  const int ldout) {
     const int offiny(k * m * ldiny);
     const int offinx(k * m * ldinx);
     const int offout(k * m * ldout);
     for (index_t i = 0; i < m; ++i) {
       for (index_t j = 0; j < n - m; ++j) {
-          out_data[offout + m + i * ldout + j] = in_data_y[offiny + i * ldiny + j];
+        out_data[offout + m + i * ldout + j] = in_data_y[offiny + i * ldiny + j];
       }
       for (index_t j = 0; j < m; ++j) {
-          out_data[offout + i * ldout + j] = in_data_x[offinx + i * ldinx + j];
+        out_data[offout + i * ldout + j] = in_data_x[offinx + i * ldinx + j];
       }
     }
   }
@@ -521,25 +550,27 @@ struct QrBackHelper_G2 {
 // QR backward methodology is explained in detail in
 // https://arxiv.org/abs/2009.10071
 struct qr_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dA,
                  const Tensor<xpu, 3, DType>& dQ,
                  const Tensor<xpu, 3, DType>& dR,
                  const Tensor<xpu, 3, DType>& Q,
                  const Tensor<xpu, 3, DType>& R,
                  const Tensor<xpu, 3, DType>& M,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     // Implements da = [dq + q@copyltu(M))]@r**(-T)
     // Where M = r@(dr**T) - (dq**T)@q
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    if (dQ.dptr_ != dA.dptr_) Copy(dA, dQ, s);
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+    if (dQ.dptr_ != dA.dptr_)
+      Copy(dA, dQ, s);
     // M = R@dR_T
     trmm::op(R, M, DType(1.0), false, false, false, s);
     // M = R@dR_T - dQ_T@Q
     gemm::op(dA, Q, M, DType(-1.0), DType(1.0), true, false, s);
     // M = copyltu(M)
-    mxnet_op::Kernel<CopyTriangularToOppositeSide, xpu>::Launch
-      (s, M.MSize(), M.size(1) * M.stride_, M.stride_, M.dptr_, false);
+    mxnet_op::Kernel<CopyTriangularToOppositeSide, xpu>::Launch(
+        s, M.MSize(), M.size(1) * M.stride_, M.stride_, M.dptr_, false);
     // dA = dQ + Q@M
     gemm::op(Q, M, dA, DType(1.0), DType(1.0), false, false, s);
     // dA = dA@R_inv_T
@@ -547,17 +578,19 @@ struct qr_backward {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 size_t QrBackwardWorkspaceSize(const TBlob& a,
                                const TBlob& q,
                                const TBlob& r,
                                const TBlob& grad_a) {
   const mxnet::TShape& a_shape = a.shape_;
-  const int a_ndim = a_shape.ndim();
-  const int n = a.size(a_ndim - 1);
-  const int m = a.size(a_ndim - 2);
+  const int a_ndim             = a_shape.ndim();
+  const int n                  = a.size(a_ndim - 1);
+  const int m                  = a.size(a_ndim - 2);
 
-  if (0U == a.Size()) { return 0U; }
+  if (0U == a.Size()) {
+    return 0U;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(grad_a.type_flag_, DType, {
     size_t work_space_size = 0;
@@ -579,7 +612,7 @@ size_t QrBackwardWorkspaceSize(const TBlob& a,
   return 0U;
 }
 
-template<typename xpu>
+template <typename xpu>
 void QrBackwardImpl(const TBlob& grad_a,
                     const TBlob& grad_q,
                     const TBlob& grad_r,
@@ -590,36 +623,41 @@ void QrBackwardImpl(const TBlob& grad_a,
                     const Tensor<xpu, 1, char>& workspace,
                     const OpContext& ctx,
                     const nnvm::NodeAttrs& attrs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& q_shape = q.shape_;
   const mxnet::TShape& r_shape = r.shape_;
-  const int a_ndim = a_shape.ndim();
-  const int m = a.size(a_ndim - 2);
-  const int n = a.size(a_ndim - 1);
+  const int a_ndim             = a_shape.ndim();
+  const int m                  = a.size(a_ndim - 2);
+  const int n                  = a.size(a_ndim - 1);
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
 
-  if (0U == a_shape.Size()) { return; }
+  if (0U == a_shape.Size()) {
+    return;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(grad_a.type_flag_, DType, {
     // common for all shapes (m, n)
-    DType *grad_a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
+    DType* grad_a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
     TBlob grad_a_data(grad_a_ptr, a_shape, xpu::kDevMask);
     if (m >= n) {
       // Q of same shape with A (m, n) and R is (n, n)
-      DType *m_ptr = grad_a_ptr + a_shape.Size();
+      DType* m_ptr = grad_a_ptr + a_shape.Size();
       TBlob temp_m(m_ptr, r_shape, xpu::kDevMask);
       // dR_T
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, r_shape.Size(), grad_r.dptr<DType>(), m_ptr, n, n, n * n);
+          s, r_shape.Size(), grad_r.dptr<DType>(), m_ptr, n, n, n * n);
       qr_backward::op(grad_a_data.FlatToKD<xpu, 3, DType>(s),
                       grad_q.FlatToKD<xpu, 3, DType>(s),
                       grad_r.FlatToKD<xpu, 3, DType>(s),
                       q.FlatToKD<xpu, 3, DType>(s),
                       r.FlatToKD<xpu, 3, DType>(s),
                       temp_m.FlatToKD<xpu, 3, DType>(s),
-                      ctx, attrs);
+                      ctx,
+                      attrs);
     } else {
       // R is same shape with A (m, n) and Q is (m, m)
       // Partition A = (X | Y); R = (U | V)
@@ -627,13 +665,13 @@ void QrBackwardImpl(const TBlob& grad_a,
       mxnet::TShape v_shape(q_shape);
       v_shape[a_ndim - 1] = n - m;
 
-      DType *m_ptr = grad_a_ptr + a_shape.Size();
-      DType *u_ptr = m_ptr + q_shape.Size();
-      DType *dq_prime_ptr = u_ptr + q_shape.Size();
-      DType *dv_ptr = dq_prime_ptr + q_shape.Size();
-      DType *y_ptr = dv_ptr + v_shape.Size();
-      DType *du_ptr = y_ptr + v_shape.Size();
-      DType *dx_ptr = du_ptr + q_shape.Size();
+      DType* m_ptr        = grad_a_ptr + a_shape.Size();
+      DType* u_ptr        = m_ptr + q_shape.Size();
+      DType* dq_prime_ptr = u_ptr + q_shape.Size();
+      DType* dv_ptr       = dq_prime_ptr + q_shape.Size();
+      DType* y_ptr        = dv_ptr + v_shape.Size();
+      DType* du_ptr       = y_ptr + v_shape.Size();
+      DType* dx_ptr       = du_ptr + q_shape.Size();
 
       TBlob temp_m(m_ptr, q_shape, xpu::kDevMask);
       TBlob u_data(u_ptr, q_shape, xpu::kDevMask);
@@ -643,19 +681,19 @@ void QrBackwardImpl(const TBlob& grad_a,
       TBlob du_data(du_ptr, q_shape, xpu::kDevMask);
       TBlob dx_data(dx_ptr, q_shape, xpu::kDevMask);
 
-      Tensor<xpu, 3, DType> R = r.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> dR = grad_r.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> Q = q.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> dQ = grad_q.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> R        = r.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> dR       = grad_r.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> Q        = q.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> dQ       = grad_q.FlatToKD<xpu, 3, DType>(s);
       Tensor<xpu, 3, DType> dQ_prime = dq_prime_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> A = a.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> dA = grad_a_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> U = u_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> dU = du_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> dV = dv_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> Y = y_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> dX = dx_data.FlatToKD<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> M = temp_m.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> A        = a.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> dA       = grad_a_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> U        = u_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> dU       = du_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> dV       = dv_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> Y        = y_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> dX       = dx_data.FlatToKD<xpu, 3, DType>(s);
+      Tensor<xpu, 3, DType> M        = temp_m.FlatToKD<xpu, 3, DType>(s);
 
       // U
       for (index_t i = 0; i < R.size(0); ++i) {
@@ -673,41 +711,35 @@ void QrBackwardImpl(const TBlob& grad_a,
       }
       // Y
       mxnet_op::Kernel<QrBackHelper_G1, xpu>::Launch(
-        s, A.size(0), m, n, A.dptr_, A.stride_, Y.dptr_, Y.stride_);
+          s, A.size(0), m, n, A.dptr_, A.stride_, Y.dptr_, Y.stride_);
       // dV
       mxnet_op::Kernel<QrBackHelper_G1, xpu>::Launch(
-        s, dR.size(0), m, n, dR.dptr_, dR.stride_, dV.dptr_, dV.stride_);
+          s, dR.size(0), m, n, dR.dptr_, dR.stride_, dV.dptr_, dV.stride_);
       // store dU_T in M
       mxnet_op::Kernel<QrTypeTransposeHelper, xpu>::Launch(
-        s, q_shape.Size(), dU.dptr_, m_ptr, m, m, m * m);
+          s, q_shape.Size(), dU.dptr_, m_ptr, m, m, m * m);
       // dq_prime = dQ
       Copy(dQ_prime, dQ, s);
       // dq_prime = dQ+Y@dV.T
       gemm::op(Y, dV, dQ_prime, DType(1.0), DType(1.0), false, true, s);
       // dX = op call
-      qr_backward::op(dX,
-                      dQ_prime,
-                      dU,
-                      Q,
-                      U,
-                      M,
-                      ctx, attrs);
+      qr_backward::op(dX, dQ_prime, dU, Q, U, M, ctx, attrs);
       // dY = Q@dV; reuse Y memory for dY
       gemm::op(Q, dV, Y, DType(1.0), DType(0.0), false, false, s);
       // copy dX and dY to dA
       mxnet_op::Kernel<QrBackHelper_G2, xpu>::Launch(
-        s, dA.size(0), m, n, dX.dptr_, dX.stride_, Y.dptr_, Y.stride_, dA.dptr_, dA.stride_);
+          s, dA.size(0), m, n, dX.dptr_, dX.stride_, Y.dptr_, Y.stride_, dA.dptr_, dA.stride_);
     }
     // common for all shapes
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       mxnet_op::Kernel<assign_helper<req_type>, xpu>::Launch(
-        s, a_shape.Size(), grad_a_data.dptr<DType>(), grad_a.dptr<DType>());
+          s, a_shape.Size(), grad_a_data.dptr<DType>(), grad_a.dptr<DType>());
     });
   });
 }
 
 // (dQ, dR, A, Q, R) => (dA)
-template<typename xpu>
+template <typename xpu>
 void NumpyLaQrBackward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -720,14 +752,14 @@ void NumpyLaQrBackward(const nnvm::NodeAttrs& attrs,
 
   const TBlob& grad_q = inputs[0];
   const TBlob& grad_r = inputs[1];
-  const TBlob& a = inputs[2];
-  const TBlob& q = inputs[3];
-  const TBlob& r = inputs[4];
+  const TBlob& a      = inputs[2];
+  const TBlob& q      = inputs[3];
+  const TBlob& r      = inputs[4];
   const TBlob& grad_a = outputs[0];
 
   size_t workspace_size = QrBackwardWorkspaceSize<xpu>(a, q, r, grad_a);
-  Tensor<xpu, 1, char> workspace = ctx.requested[0]
-    .get_space_typed<xpu, 1, char>(Shape1(workspace_size), ctx.get_stream<xpu>());
+  Tensor<xpu, 1, char> workspace =
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), ctx.get_stream<xpu>());
   QrBackwardImpl<xpu>(grad_a, grad_q, grad_r, a, q, r, req, workspace, ctx, attrs);
 }
 
diff --git a/src/operator/numpy/linalg/np_qr.cc b/src/operator/numpy/linalg/np_qr.cc
index 6e72a1ab98ce..b40ed8650608 100644
--- a/src/operator/numpy/linalg/np_qr.cc
+++ b/src/operator/numpy/linalg/np_qr.cc
@@ -69,14 +69,13 @@ inline bool NumpyLaQrShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NumpyLaQrType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int>* in_attrs,
-                        std::vector<int>* out_attrs) {
+                          std::vector<int>* in_attrs,
+                          std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
   int a_type = in_attrs->at(0);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
   if (mshadow::kFloat32 == a_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
     TYPE_ASSIGN_CHECK(*out_attrs, 1, in_attrs->at(0));
@@ -88,26 +87,32 @@ inline bool NumpyLaQrType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_qr)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"A"}; })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyLaQrShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyLaQrType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<FCompute>("FCompute<cpu>", NumpyLaQrForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_qr"})
-.add_argument("A", "NDArray-or-Symbol", "Input matrices to be factorized");
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyLaQrShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyLaQrType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyLaQrForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_qr"})
+    .add_argument("A", "NDArray-or-Symbol", "Input matrices to be factorized");
 
 NNVM_REGISTER_OP(_backward_npi_qr)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyLaQrBackward<cpu>);
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyLaQrBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_qr.cu b/src/operator/numpy/linalg/np_qr.cu
index 83d95584e104..98d7a365d507 100644
--- a/src/operator/numpy/linalg/np_qr.cu
+++ b/src/operator/numpy/linalg/np_qr.cu
@@ -31,11 +31,9 @@ namespace op {
 
 #if MXNET_USE_CUSOLVER == 1
 
-NNVM_REGISTER_OP(_npi_qr)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLaQrForward<gpu>);
+NNVM_REGISTER_OP(_npi_qr).set_attr<FCompute>("FCompute<gpu>", NumpyLaQrForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_qr)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLaQrBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_qr).set_attr<FCompute>("FCompute<gpu>", NumpyLaQrBackward<gpu>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_solve-inl.h b/src/operator/numpy/linalg/np_solve-inl.h
index 6d08d3b8d11c..048f806b7aec 100644
--- a/src/operator/numpy/linalg/np_solve-inl.h
+++ b/src/operator/numpy/linalg/np_solve-inl.h
@@ -38,67 +38,69 @@ namespace op {
 
 using namespace mshadow;
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 void linalg_solve(const Tensor<xpu, 2, DType>& A,
                   const Tensor<xpu, 2, DType>& X,
                   const Tensor<xpu, 1, IndexT>& ipiv,
-                  Stream<xpu> *s);
+                  Stream<xpu>* s);
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 void linalg_batch_solve(const Tensor<xpu, 3, DType>& A,
                         const Tensor<xpu, 3, DType>& X,
                         const Tensor<xpu, 2, IndexT>& ipiv,
                         const mxnet::OpContext& ctx);
 
-template<typename xpu, typename DType> inline
-int linalg_dn_getrf_workspace_query(const Tensor<xpu, 2, DType>& A,
-                                    Stream<xpu> *s);
+template <typename xpu, typename DType>
+inline int linalg_dn_getrf_workspace_query(const Tensor<xpu, 2, DType>& A, Stream<xpu>* s);
 
-template<typename xpu, typename DType> inline
-void linalg_dn_getrf(const Tensor<xpu, 2, DType>& A,
-                     const Tensor<xpu, 1, int>& ipiv,
-                     Stream<xpu> *s);
+template <typename xpu, typename DType>
+inline void linalg_dn_getrf(const Tensor<xpu, 2, DType>& A,
+                            const Tensor<xpu, 1, int>& ipiv,
+                            Stream<xpu>* s);
 
-template<typename xpu, typename DType> inline
-void linalg_dn_getrs(const Tensor<xpu, 2, DType>& A,
-                     const Tensor<xpu, 2, DType>& X,
-                     const Tensor<xpu, 1, int>& ipiv,
-                     Stream<xpu> *s);
+template <typename xpu, typename DType>
+inline void linalg_dn_getrs(const Tensor<xpu, 2, DType>& A,
+                            const Tensor<xpu, 2, DType>& X,
+                            const Tensor<xpu, 1, int>& ipiv,
+                            Stream<xpu>* s);
 
 // kernel for transpose
 struct SolveTypeTransposeHelper {
-  template<typename InDType, typename OutDType>
-  MSHADOW_XINLINE static void Map(int i, const InDType *in_data, OutDType *out_data,
-                                  const int ncol1, const int ncol2, const int step) {
+  template <typename InDType, typename OutDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const InDType* in_data,
+                                  OutDType* out_data,
+                                  const int ncol1,
+                                  const int ncol2,
+                                  const int step) {
     int idx = i / step, row = (i % step) / ncol1, col = (i % step) % ncol1;
     out_data[idx * step + row + col * ncol2] = static_cast<OutDType>(in_data[i]);
   }
 };
 
-template<typename xpu, typename DType>
-inline void check_solve(const Tensor<xpu, 2, DType>& A,
-                        const Tensor<xpu, 2, DType>& B) {
+template <typename xpu, typename DType>
+inline void check_solve(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 2, DType>& B) {
   CHECK_EQ(A.size(0), A.size(1)) << "A must bu square matrix";
   CHECK_EQ(A.size(1), B.size(1)) << "A, B have incompatible sizes";
 }
 
-#define LINALG_CPU_SOLVE(fname, DType) \
-template<> inline \
-void linalg_solve<cpu, DType>(const Tensor<cpu, 2, DType>& A, \
-                              const Tensor<cpu, 2, DType>& X, \
-                              const Tensor<cpu, 1, lapack_index_t>& ipiv, \
-                              Stream<cpu> *s) { \
-  check_solve(A, X); \
-  const lapack_index_t N = X.size(1), nrhs = X.size(0); \
-  const lapack_index_t lda = (N == 0 ? 1 : N), ldx = (N == 0 ? 1 : N); \
-  lapack_index_t res(MXNET_LAPACK_##fname(MXNET_LAPACK_COL_MAJOR, N, nrhs, \
-                               A.dptr_, lda, ipiv.dptr_, X.dptr_, ldx)); \
-  CHECK_LE(res, 0) << #fname << ": U(" << res << ", " << res \
-    << ") is exactly zero. The factorization has been completed," \
-    << "but the factor U is exactly singular, so the solution could not be computed."; \
-  CHECK_GE(res, 0) << #fname << ": the " << -res \
-    << "-th argument had an illegal value"; \
-}
+#define LINALG_CPU_SOLVE(fname, DType)                                                     \
+  template <>                                                                              \
+  inline void linalg_solve<cpu, DType>(const Tensor<cpu, 2, DType>& A,                     \
+                                       const Tensor<cpu, 2, DType>& X,                     \
+                                       const Tensor<cpu, 1, lapack_index_t>& ipiv,         \
+                                       Stream<cpu>* s) {                                   \
+    check_solve(A, X);                                                                     \
+    const lapack_index_t N = X.size(1), nrhs = X.size(0);                                  \
+    const lapack_index_t lda = (N == 0 ? 1 : N), ldx = (N == 0 ? 1 : N);                   \
+    lapack_index_t res(MXNET_LAPACK_##fname(                                               \
+        MXNET_LAPACK_COL_MAJOR, N, nrhs, A.dptr_, lda, ipiv.dptr_, X.dptr_, ldx));         \
+    CHECK_LE(res, 0)                                                                       \
+        << #fname << ": U(" << res << ", " << res                                          \
+        << ") is exactly zero. The factorization has been completed,"                      \
+        << "but the factor U is exactly singular, so the solution could not be computed."; \
+    CHECK_GE(res, 0) << #fname << ": the " << -res << "-th argument had an illegal value"; \
+  }
 LINALG_CPU_SOLVE(sgesv, float)
 LINALG_CPU_SOLVE(dgesv, double)
 
@@ -106,103 +108,114 @@ LINALG_CPU_SOLVE(dgesv, double)
 
 #if CUDA_VERSION >= 8000
 
-#define LINALG_GPU_DN_GETRF_WORKSPACE_QUERY(fname, DType) \
-template<> inline \
-int linalg_dn_getrf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                                Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  int lwork(0); \
-  CUSOLVER_CALL(cusolver##fname##_bufferSize(Stream<gpu>::GetSolverHandle(s), \
-                                             A.size(1), A.size(1), A.dptr_, \
-                                             (A.size(1) == 0 ? 1 : A.size(1)), &lwork)); \
-  return lwork; \
-}
+#define LINALG_GPU_DN_GETRF_WORKSPACE_QUERY(fname, DType)                                \
+  template <>                                                                            \
+  inline int linalg_dn_getrf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
+                                                         Stream<gpu>* s) {               \
+    using namespace mxnet;                                                               \
+    using mshadow::gpu;                                                                  \
+    int lwork(0);                                                                        \
+    CUSOLVER_CALL(cusolver##fname##_bufferSize(Stream<gpu>::GetSolverHandle(s),          \
+                                               A.size(1),                                \
+                                               A.size(1),                                \
+                                               A.dptr_,                                  \
+                                               (A.size(1) == 0 ? 1 : A.size(1)),         \
+                                               &lwork));                                 \
+    return lwork;                                                                        \
+  }
 
-#define LINALG_GPU_DN_GETRF(fname, DType) \
-template<> inline \
-void linalg_dn_getrf<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                 const Tensor<gpu, 1, int>& ipiv, \
-                                 Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU()); \
-  const int lwork = linalg_dn_getrf_workspace_query(A, s); \
-  Storage::Handle workspace = Storage::Get()->Alloc(sizeof(DType) * lwork, Context::GPU()); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                                A.size(1), A.size(1), A.dptr_, (A.size(1) == 0 ? 1 : A.size(1)), \
-                                static_cast<DType*>(workspace.dptr), ipiv.dptr_, \
-                                static_cast<int*>(info.dptr))); \
-  Storage::Get()->Free(info); \
-  Storage::Get()->Free(workspace); \
-}
+#define LINALG_GPU_DN_GETRF(fname, DType)                                                     \
+  template <>                                                                                 \
+  inline void linalg_dn_getrf<gpu, DType>(                                                    \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, int>& ipiv, Stream<gpu>* s) {      \
+    using namespace mxnet;                                                                    \
+    using mshadow::gpu;                                                                       \
+    Storage::Handle info      = Storage::Get()->Alloc(sizeof(int), Context::GPU());           \
+    const int lwork           = linalg_dn_getrf_workspace_query(A, s);                        \
+    Storage::Handle workspace = Storage::Get()->Alloc(sizeof(DType) * lwork, Context::GPU()); \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                            \
+                                  A.size(1),                                                  \
+                                  A.size(1),                                                  \
+                                  A.dptr_,                                                    \
+                                  (A.size(1) == 0 ? 1 : A.size(1)),                           \
+                                  static_cast<DType*>(workspace.dptr),                        \
+                                  ipiv.dptr_,                                                 \
+                                  static_cast<int*>(info.dptr)));                             \
+    Storage::Get()->Free(info);                                                               \
+    Storage::Get()->Free(workspace);                                                          \
+  }
 
-#define LINALG_GPU_DN_GETRS(fname, DType) \
-template<> inline \
-void linalg_dn_getrs<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                 const Tensor<gpu, 2, DType>& X, \
-                                 const Tensor<gpu, 1, int>& ipiv, \
-                                 Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  const int N = A.size(0), nrhs = X.size(0); \
-  const int lda = (A.size(1) == 0 ? 1 : A.size(1)), ldx = (X.size(1) == 0 ? 1 : X.size(1)); \
-  Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU()); \
-  CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s), \
-                                CUBLAS_OP_N, N, nrhs, \
-                                A.dptr_, lda, ipiv.dptr_, X.dptr_, ldx, \
-                                static_cast<int*>(info.dptr))); \
-  Storage::Get()->Free(info); \
-}
+#define LINALG_GPU_DN_GETRS(fname, DType)                                                     \
+  template <>                                                                                 \
+  inline void linalg_dn_getrs<gpu, DType>(const Tensor<gpu, 2, DType>& A,                     \
+                                          const Tensor<gpu, 2, DType>& X,                     \
+                                          const Tensor<gpu, 1, int>& ipiv,                    \
+                                          Stream<gpu>* s) {                                   \
+    using namespace mxnet;                                                                    \
+    using mshadow::gpu;                                                                       \
+    const int N = A.size(0), nrhs = X.size(0);                                                \
+    const int lda = (A.size(1) == 0 ? 1 : A.size(1)), ldx = (X.size(1) == 0 ? 1 : X.size(1)); \
+    Storage::Handle info = Storage::Get()->Alloc(sizeof(int), Context::GPU());                \
+    CUSOLVER_CALL(cusolver##fname(Stream<gpu>::GetSolverHandle(s),                            \
+                                  CUBLAS_OP_N,                                                \
+                                  N,                                                          \
+                                  nrhs,                                                       \
+                                  A.dptr_,                                                    \
+                                  lda,                                                        \
+                                  ipiv.dptr_,                                                 \
+                                  X.dptr_,                                                    \
+                                  ldx,                                                        \
+                                  static_cast<int*>(info.dptr)));                             \
+    Storage::Get()->Free(info);                                                               \
+  }
 
-#define LINALG_GPU_SOLVE(DType) \
-template<> inline \
-void linalg_solve<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 2, DType>& X, \
-                              const Tensor<gpu, 1, int>& ipiv, \
-                              Stream<gpu> *s) { \
-  using namespace mxnet; \
-  using mshadow::gpu; \
-  CHECK_NOTNULL(s); \
-  check_solve(A, X); \
-  linalg_dn_getrf(A, ipiv, s); \
-  linalg_dn_getrs(A, X, ipiv, s); \
-}
+#define LINALG_GPU_SOLVE(DType)                                         \
+  template <>                                                           \
+  inline void linalg_solve<gpu, DType>(const Tensor<gpu, 2, DType>& A,  \
+                                       const Tensor<gpu, 2, DType>& X,  \
+                                       const Tensor<gpu, 1, int>& ipiv, \
+                                       Stream<gpu>* s) {                \
+    using namespace mxnet;                                              \
+    using mshadow::gpu;                                                 \
+    CHECK_NOTNULL(s);                                                   \
+    check_solve(A, X);                                                  \
+    linalg_dn_getrf(A, ipiv, s);                                        \
+    linalg_dn_getrs(A, X, ipiv, s);                                     \
+  }
 
 #else  // CUDA_VERSION >= 8000
 
-#define LINALG_GPU_DN_GETRF_WORKSPACE_QUERY(fname, DType) \
-template<> inline \
-int linalg_dn_getrf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                                Stream<gpu> *s) { \
-  LOG(FATAL) << "Dn_getrf_workspace_query requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_DN_GETRF_WORKSPACE_QUERY(fname, DType)                                \
+  template <>                                                                            \
+  inline int linalg_dn_getrf_workspace_query<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
+                                                         Stream<gpu>* s) {               \
+    LOG(FATAL) << "Dn_getrf_workspace_query requires CUDA version >= 8.0!";              \
+  }
 
-#define LINALG_GPU_DN_GETRF(fname, DType) \
-template<> inline \
-void linalg_dn_getrf<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                 const Tensor<gpu, 1, int>& ipiv, \
-                                 Stream<gpu> *s) { \
-  LOG(FATAL) << "Dn_getrf requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_DN_GETRF(fname, DType)                                                \
+  template <>                                                                            \
+  inline void linalg_dn_getrf<gpu, DType>(                                               \
+      const Tensor<gpu, 2, DType>& A, const Tensor<gpu, 1, int>& ipiv, Stream<gpu>* s) { \
+    LOG(FATAL) << "Dn_getrf requires CUDA version >= 8.0!";                              \
+  }
 
-#define LINALG_GPU_DN_GETRS(fname, DType) \
-template<> inline \
-void linalg_dn_getrs<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                                 const Tensor<gpu, 2, DType>& X, \
-                                 const Tensor<gpu, 1, int>& ipiv, \
-                                 Stream<gpu> *s) { \
-  LOG(FATAL) << "Dn_getrs requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_DN_GETRS(fname, DType)                                  \
+  template <>                                                              \
+  inline void linalg_dn_getrs<gpu, DType>(const Tensor<gpu, 2, DType>& A,  \
+                                          const Tensor<gpu, 2, DType>& X,  \
+                                          const Tensor<gpu, 1, int>& ipiv, \
+                                          Stream<gpu>* s) {                \
+    LOG(FATAL) << "Dn_getrs requires CUDA version >= 8.0!";                \
+  }
 
-#define LINALG_GPU_SOLVE(DType) \
-template<> inline \
-void linalg_solve<gpu, DType>(const Tensor<gpu, 2, DType>& A, \
-                              const Tensor<gpu, 2, DType>& X, \
-                              const Tensor<gpu, 1, int>& ipiv, \
-                              Stream<gpu> *s) { \
-  LOG(FATAL) << "gpu solve requires CUDA version >= 8.0!"; \
-}
+#define LINALG_GPU_SOLVE(DType)                                         \
+  template <>                                                           \
+  inline void linalg_solve<gpu, DType>(const Tensor<gpu, 2, DType>& A,  \
+                                       const Tensor<gpu, 2, DType>& X,  \
+                                       const Tensor<gpu, 1, int>& ipiv, \
+                                       Stream<gpu>* s) {                \
+    LOG(FATAL) << "gpu solve requires CUDA version >= 8.0!";            \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -220,29 +233,29 @@ LINALG_GPU_SOLVE(double)
 
 #endif  // __CUDACC__
 
-#define LINALG_XPU_BATCH_SOLVE(xpu, DType, IndexT) \
-template<> inline \
-void linalg_batch_solve<xpu, DType, IndexT>(const Tensor<xpu, 3, DType>& A, \
-                                            const Tensor<xpu, 3, DType>& X, \
-                                            const Tensor<xpu, 2, IndexT>& ipiv, \
-                                            const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  for (index_t i = 0; i < A.size(0); ++i) { \
-    linalg_solve(A[i], X[i], ipiv[i], s); \
-  } \
-}
+#define LINALG_XPU_BATCH_SOLVE(xpu, DType, IndexT)                                       \
+  template <>                                                                            \
+  inline void linalg_batch_solve<xpu, DType, IndexT>(const Tensor<xpu, 3, DType>& A,     \
+                                                     const Tensor<xpu, 3, DType>& X,     \
+                                                     const Tensor<xpu, 2, IndexT>& ipiv, \
+                                                     const mxnet::OpContext& ctx) {      \
+    Stream<xpu>* s = ctx.get_stream<xpu>();                                              \
+    for (index_t i = 0; i < A.size(0); ++i) {                                            \
+      linalg_solve(A[i], X[i], ipiv[i], s);                                              \
+    }                                                                                    \
+  }
 LINALG_XPU_BATCH_SOLVE(cpu, float, LapackIndex<cpu>::IndexT)
-LINALG_XPU_BATCH_SOLVE(cpu, double,  LapackIndex<cpu>::IndexT)
+LINALG_XPU_BATCH_SOLVE(cpu, double, LapackIndex<cpu>::IndexT)
 
 #ifdef __CUDACC__
 
-LINALG_XPU_BATCH_SOLVE(gpu, float,  LapackIndex<gpu>::IndexT)
-LINALG_XPU_BATCH_SOLVE(gpu, double,  LapackIndex<gpu>::IndexT)
+LINALG_XPU_BATCH_SOLVE(gpu, float, LapackIndex<gpu>::IndexT)
+LINALG_XPU_BATCH_SOLVE(gpu, double, LapackIndex<gpu>::IndexT)
 
 #endif  // __CUDACC__
 
 struct solve {
-  template<typename xpu, typename DType, typename IndexT>
+  template <typename xpu, typename DType, typename IndexT>
   static void op(const Tensor<xpu, 3, DType>& A,
                  const Tensor<xpu, 3, DType>& X,
                  const Tensor<xpu, 2, IndexT>& ipiv,
@@ -252,7 +265,7 @@ struct solve {
   }
 };
 
-template<typename xpu, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, int idim, int odim, int inum, int onum, typename laop>
 void LaOpForwardSolve(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -264,54 +277,67 @@ void LaOpForwardSolve(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), onum);
   CHECK_EQ(req.size(), onum);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    const mxnet::TBlob& a_tblob = inputs[0];
-    const mxnet::TBlob& b_tblob = inputs[1];
-    const mxnet::TBlob& x_tblob = outputs[0];
+    mshadow::Stream<xpu>* s      = ctx.get_stream<xpu>();
+    const mxnet::TBlob& a_tblob  = inputs[0];
+    const mxnet::TBlob& b_tblob  = inputs[1];
+    const mxnet::TBlob& x_tblob  = outputs[0];
     const mxnet::TShape& a_shape = a_tblob.shape_;
     mxnet::TShape b_shape(a_shape.ndim(), 1);
-    for (int i = 0; i < a_shape.ndim() - 1; ++i) { b_shape[i] = b_tblob.shape_[i]; }
+    for (int i = 0; i < a_shape.ndim() - 1; ++i) {
+      b_shape[i] = b_tblob.shape_[i];
+    }
     if (b_tblob.shape_.ndim() == a_shape.ndim()) {
       b_shape[a_shape.ndim() - 1] = b_tblob.shape_[a_shape.ndim() - 1];
     }
     const int ndim = a_shape.ndim();
     mxnet::TShape ipiv_shape(a_shape);
     ipiv_shape[ndim - 1] = 1;
-    if (0 == a_shape[ndim - 1] || 0 == a_shape[ndim - 2] ||
-        0 == b_shape[ndim - 1] || 0 == b_shape[ndim - 2]) { return; }
+    if (0 == a_shape[ndim - 1] || 0 == a_shape[ndim - 2] || 0 == b_shape[ndim - 1] ||
+        0 == b_shape[ndim - 2]) {
+      return;
+    }
 
     const size_t work_space_size =
-      sizeof(OType) * (a_shape.Size() + b_shape.Size()) +
-      sizeof(IndexT) * ipiv_shape.Size();
+        sizeof(OType) * (a_shape.Size() + b_shape.Size()) + sizeof(IndexT) * ipiv_shape.Size();
     Tensor<xpu, 1, char> work_buffer =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(work_space_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(work_space_size), s);
     MSHADOW_TYPE_SWITCH(a_tblob.type_flag_, AType, {
       // cast type and transpose
       mxnet_op::Kernel<SolveTypeTransposeHelper, xpu>::Launch(
-        s, a_shape.Size(),
-        a_tblob.dptr<AType>(),
-        reinterpret_cast<OType*>(work_buffer.dptr_),
-        a_shape[ndim - 1], a_shape[ndim - 2], a_shape[ndim - 1] * a_shape[ndim - 2]);
+          s,
+          a_shape.Size(),
+          a_tblob.dptr<AType>(),
+          reinterpret_cast<OType*>(work_buffer.dptr_),
+          a_shape[ndim - 1],
+          a_shape[ndim - 2],
+          a_shape[ndim - 1] * a_shape[ndim - 2]);
     });
     MSHADOW_TYPE_SWITCH(b_tblob.type_flag_, BType, {
       // cast type and transpose
       mxnet_op::Kernel<SolveTypeTransposeHelper, xpu>::Launch(
-        s, b_shape.Size(),
-        b_tblob.dptr<BType>(),
-        reinterpret_cast<OType*>(work_buffer.dptr_) + a_shape.Size(),
-        b_shape[ndim - 1], b_shape[ndim - 2], b_shape[ndim - 1] * b_shape[ndim - 2]);
+          s,
+          b_shape.Size(),
+          b_tblob.dptr<BType>(),
+          reinterpret_cast<OType*>(work_buffer.dptr_) + a_shape.Size(),
+          b_shape[ndim - 1],
+          b_shape[ndim - 2],
+          b_shape[ndim - 1] * b_shape[ndim - 2]);
     });
     // transpose shape
-    IndexT temp = b_shape[ndim - 1];
+    IndexT temp       = b_shape[ndim - 1];
     b_shape[ndim - 1] = b_shape[ndim - 2];
     b_shape[ndim - 2] = temp;
-    mxnet::TBlob a_transpose_tblob(reinterpret_cast<OType*>(work_buffer.dptr_),
-      a_shape, a_tblob.dev_mask(), a_tblob.dev_id());
+    mxnet::TBlob a_transpose_tblob(
+        reinterpret_cast<OType*>(work_buffer.dptr_), a_shape, a_tblob.dev_mask(), a_tblob.dev_id());
     mxnet::TBlob b_transpose_tblob(reinterpret_cast<OType*>(work_buffer.dptr_) + a_shape.Size(),
-      b_shape, b_tblob.dev_mask(), b_tblob.dev_id());
-    mxnet::TBlob ipiv_tblob(reinterpret_cast<IndexT*>(
-      reinterpret_cast<OType*>(work_buffer.dptr_) + a_shape.Size() + b_shape.Size()),
-      ipiv_shape, b_tblob.dev_mask(), b_tblob.dev_id());
+                                   b_shape,
+                                   b_tblob.dev_mask(),
+                                   b_tblob.dev_id());
+    mxnet::TBlob ipiv_tblob(reinterpret_cast<IndexT*>(reinterpret_cast<OType*>(work_buffer.dptr_) +
+                                                      a_shape.Size() + b_shape.Size()),
+                            ipiv_shape,
+                            b_tblob.dev_mask(),
+                            b_tblob.dev_id());
 
     laop::op(a_transpose_tblob.FlatToKD<xpu, idim + 1, OType>(s),
              b_transpose_tblob.FlatToKD<xpu, idim + 1, OType>(s),
@@ -319,17 +345,19 @@ void LaOpForwardSolve(const nnvm::NodeAttrs& attrs,
              ctx,
              attrs);
     // X = transpose(B)
-    mxnet_op::Kernel<SolveTypeTransposeHelper, xpu>::Launch(
-      s, b_shape.Size(),
-      b_transpose_tblob.dptr<OType>(),
-      x_tblob.dptr<OType>(),
-      b_shape[ndim - 1], b_shape[ndim - 2], b_shape[ndim - 1] * b_shape[ndim - 2]);
+    mxnet_op::Kernel<SolveTypeTransposeHelper, xpu>::Launch(s,
+                                                            b_shape.Size(),
+                                                            b_transpose_tblob.dptr<OType>(),
+                                                            x_tblob.dptr<OType>(),
+                                                            b_shape[ndim - 1],
+                                                            b_shape[ndim - 2],
+                                                            b_shape[ndim - 1] * b_shape[ndim - 2]);
   });
 }
 
 // X = (inv_A) * B
 struct solve_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dX,
                  const Tensor<xpu, 3, DType>& inv_A,
                  const Tensor<xpu, 3, DType>& B,
@@ -340,33 +368,32 @@ struct solve_backward {
                  const nnvm::NodeAttrs& attrs) {
     // (1) calcualte dB = trans(inv(A)) * dX
     // (2) calcualte dA = dB * trans(X)
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     gemm2::op(inv_A, dX, dB, DType(1), true, false, s);
     gemm2::op(dB, X, dA, DType(-1), false, true, s);
   }
 };
 
-template<typename xpu, typename DType, typename IndexT>
+template <typename xpu, typename DType, typename IndexT>
 inline void batch_inverse(const Tensor<xpu, 3, DType>& inv_A,
                           const Tensor<xpu, 3, DType>& LU,
                           const Tensor<xpu, 2, IndexT>& pivot,
                           const mxnet::OpContext& ctx);
 
-#define CPU_BATCH_INVERSE(xpu, DType, IndexT) \
-template<> inline \
-void batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& inv_A, \
-                               const Tensor<xpu, 3, DType>& LU, \
-                               const Tensor<xpu, 2, IndexT>& pivot, \
-                               const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  for (IndexT i = 0; i < inv_A.size(0); ++i) { \
-    linalg_getrf(inv_A[i], pivot[i], true, s); \
-    const Tensor<xpu, 1, DType> work( \
-      LU[i].dptr_, Shape1(LU.size(1) * LU.size(2))); \
-    linalg_getri(inv_A[i], pivot[i], work, s); \
-  } \
-}
-CPU_BATCH_INVERSE(cpu, float,  LapackIndex<cpu>::IndexT)
+#define CPU_BATCH_INVERSE(xpu, DType, IndexT)                                         \
+  template <>                                                                         \
+  inline void batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& inv_A,           \
+                                        const Tensor<xpu, 3, DType>& LU,              \
+                                        const Tensor<xpu, 2, IndexT>& pivot,          \
+                                        const mxnet::OpContext& ctx) {                \
+    Stream<xpu>* s = ctx.get_stream<xpu>();                                           \
+    for (IndexT i = 0; i < inv_A.size(0); ++i) {                                      \
+      linalg_getrf(inv_A[i], pivot[i], true, s);                                      \
+      const Tensor<xpu, 1, DType> work(LU[i].dptr_, Shape1(LU.size(1) * LU.size(2))); \
+      linalg_getri(inv_A[i], pivot[i], work, s);                                      \
+    }                                                                                 \
+  }
+CPU_BATCH_INVERSE(cpu, float, LapackIndex<cpu>::IndexT)
 CPU_BATCH_INVERSE(cpu, double, LapackIndex<cpu>::IndexT)
 
 #ifdef __CUDACC__
@@ -374,28 +401,29 @@ CPU_BATCH_INVERSE(cpu, double, LapackIndex<cpu>::IndexT)
 // GETRF and GETRI only available with cuda8 or higher.
 #if CUDA_VERSION >= 8000
 
-#define GPU_BATCH_INVERSE(xpu, DType) \
-template<> inline \
-void batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& inv_A, \
-                               const Tensor<xpu, 3, DType>& LU, \
-                               const Tensor<xpu, 2, int>& pivot, \
-                               const mxnet::OpContext& ctx) { \
-  Stream<xpu> *s = ctx.get_stream<xpu>(); \
-  if (LU.dptr_ != inv_A.dptr_) Copy(LU, inv_A, s); \
-  linalg_batch_getrf(LU, pivot, true, s); \
-  linalg_batch_getri(inv_A, LU, pivot, s); \
-}
+#define GPU_BATCH_INVERSE(xpu, DType)                                       \
+  template <>                                                               \
+  inline void batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& inv_A, \
+                                        const Tensor<xpu, 3, DType>& LU,    \
+                                        const Tensor<xpu, 2, int>& pivot,   \
+                                        const mxnet::OpContext& ctx) {      \
+    Stream<xpu>* s = ctx.get_stream<xpu>();                                 \
+    if (LU.dptr_ != inv_A.dptr_)                                            \
+      Copy(LU, inv_A, s);                                                   \
+    linalg_batch_getrf(LU, pivot, true, s);                                 \
+    linalg_batch_getri(inv_A, LU, pivot, s);                                \
+  }
 
 #else  // CUDA_VERSION >= 8000
 
-#define GPU_BATCH_INVERSE(xpu, DType) \
-template<> inline \
-void batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& inv_A, \
-                               const Tensor<xpu, 3, DType>& LU, \
-                               const Tensor<xpu, 2, int>& pivot, \
-                               const mxnet::OpContext& ctx) { \
-  LOG(FATAL) << "gpu matrix inverse requires CUDA version >= 8.0!"; \
-}
+#define GPU_BATCH_INVERSE(xpu, DType)                                       \
+  template <>                                                               \
+  inline void batch_inverse<xpu, DType>(const Tensor<xpu, 3, DType>& inv_A, \
+                                        const Tensor<xpu, 3, DType>& LU,    \
+                                        const Tensor<xpu, 2, int>& pivot,   \
+                                        const mxnet::OpContext& ctx) {      \
+    LOG(FATAL) << "gpu matrix inverse requires CUDA version >= 8.0!";       \
+  }
 
 #endif  // CUDA_VERSION >= 8000
 
@@ -404,7 +432,7 @@ GPU_BATCH_INVERSE(gpu, double)
 
 #endif  // __CUDACC__
 
-template<typename xpu, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, int idim, int odim, int inum, int onum, typename laop>
 void LaOpBackwardSolve(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -416,68 +444,80 @@ void LaOpBackwardSolve(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), onum);
   CHECK_EQ(req.size(), onum);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
     const mxnet::TBlob& a_tblob = inputs[1];
     const mxnet::TBlob& b_tblob = inputs[2];
     const mxnet::TBlob& x_tblob = inputs[3];
 
     const mxnet::TShape& a_shape = a_tblob.shape_;
     mxnet::TShape b_shape(a_shape.ndim(), 1);
-    for (int i = 0; i < a_shape.ndim() - 1; ++i) { b_shape[i] = b_tblob.shape_[i]; }
+    for (int i = 0; i < a_shape.ndim() - 1; ++i) {
+      b_shape[i] = b_tblob.shape_[i];
+    }
     if (b_tblob.shape_.ndim() == a_shape.ndim()) {
       b_shape[a_shape.ndim() - 1] = b_tblob.shape_[a_shape.ndim() - 1];
     }
     const int ndim = a_shape.ndim();
     const IndexT N = a_shape[ndim - 1];
-    if (0 == a_shape[ndim - 1] || 0 == a_shape[ndim - 2] ||
-        0 == b_shape[ndim - 1] || 0 == b_shape[ndim - 2]) { return; }
+    if (0 == a_shape[ndim - 1] || 0 == a_shape[ndim - 2] || 0 == b_shape[ndim - 1] ||
+        0 == b_shape[ndim - 2]) {
+      return;
+    }
 
     const Tensor<xpu, idim + 1, OType> A = a_tblob.FlatToKD<xpu, idim + 1, OType>(s);
-    size_t work_space_size = sizeof(OType) * a_shape.Size();  // for inverse(A)
-    work_space_size += sizeof(OType) * a_shape.Size();  // for getri work space
-    work_space_size += 2 * sizeof(OType) * b_shape.Size();  // for B and X
-    work_space_size += sizeof(IndexT) * A.size(0) * N;  // for pivot work space
+    size_t work_space_size               = sizeof(OType) * a_shape.Size();  // for inverse(A)
+    work_space_size += sizeof(OType) * a_shape.Size();                      // for getri work space
+    work_space_size += 2 * sizeof(OType) * b_shape.Size();                  // for B and X
+    work_space_size += sizeof(IndexT) * A.size(0) * N;                      // for pivot work space
     Tensor<xpu, 1, char> work_buffer =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(work_space_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(work_space_size), s);
 
     MSHADOW_TYPE_SWITCH(a_tblob.type_flag_, AType, {
       mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-        s, a_shape.Size(),
-        reinterpret_cast<OType*>(work_buffer.dptr_),
-        a_tblob.dptr<AType>());
+          s, a_shape.Size(), reinterpret_cast<OType*>(work_buffer.dptr_), a_tblob.dptr<AType>());
     });
-    mxnet::TBlob a_inverse_tblob(reinterpret_cast<OType*>(work_buffer.dptr_),
-      a_shape, a_tblob.dev_mask(), a_tblob.dev_id());
+    mxnet::TBlob a_inverse_tblob(
+        reinterpret_cast<OType*>(work_buffer.dptr_), a_shape, a_tblob.dev_mask(), a_tblob.dev_id());
     const Tensor<xpu, idim + 1, OType> inv_A = a_inverse_tblob.FlatToKD<xpu, idim + 1, OType>(s);
 
     mxnet::TBlob lu_tblob(reinterpret_cast<OType*>(work_buffer.dptr_) + a_shape.Size(),
-      inv_A.shape_, a_tblob.dev_mask(), a_tblob.dev_id());
+                          inv_A.shape_,
+                          a_tblob.dev_mask(),
+                          a_tblob.dev_id());
     const Tensor<xpu, idim + 1, OType> LU = lu_tblob.FlatToKD<xpu, idim + 1, OType>(s);
 
     MSHADOW_TYPE_SWITCH(b_tblob.type_flag_, BType, {
       mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-        s, b_shape.Size(),
-        reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size(),
-        b_tblob.dptr<BType>());
+          s,
+          b_shape.Size(),
+          reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size(),
+          b_tblob.dptr<BType>());
     });
     mxnet::TBlob b_cp_tblob(reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size(),
-      b_shape, b_tblob.dev_mask(), b_tblob.dev_id());
+                            b_shape,
+                            b_tblob.dev_mask(),
+                            b_tblob.dev_id());
     const Tensor<xpu, idim + 1, OType> B = b_cp_tblob.FlatToKD<xpu, idim + 1, OType>(s);
 
     MSHADOW_TYPE_SWITCH(x_tblob.type_flag_, XType, {
       mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-        s, b_shape.Size(),
-        reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size() + b_shape.Size(),
-        x_tblob.dptr<XType>());
+          s,
+          b_shape.Size(),
+          reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size() + b_shape.Size(),
+          x_tblob.dptr<XType>());
     });
     mxnet::TBlob x_cp_tblob(
-      reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size() + b_shape.Size(),
-      b_shape, b_tblob.dev_mask(), b_tblob.dev_id());
+        reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size() + b_shape.Size(),
+        b_shape,
+        b_tblob.dev_mask(),
+        b_tblob.dev_id());
     const Tensor<xpu, idim + 1, OType> X = x_cp_tblob.FlatToKD<xpu, idim + 1, OType>(s);
 
-    mxnet::TBlob pivot_tblob(reinterpret_cast<IndexT*>(
-      reinterpret_cast<OType*>(work_buffer.dptr_) + 2 * a_shape.Size() + 2 * b_shape.Size()),
-      Shape2(A.size(0), N), a_tblob.dev_mask(), a_tblob.dev_id());
+    mxnet::TBlob pivot_tblob(reinterpret_cast<IndexT*>(reinterpret_cast<OType*>(work_buffer.dptr_) +
+                                                       2 * a_shape.Size() + 2 * b_shape.Size()),
+                             Shape2(A.size(0), N),
+                             a_tblob.dev_mask(),
+                             a_tblob.dev_id());
     const Tensor<xpu, idim, IndexT> pivot = pivot_tblob.FlatToKD<xpu, idim, IndexT>(s);
 
     // calculate inverse(A) on CPU or GPU
diff --git a/src/operator/numpy/linalg/np_solve.cc b/src/operator/numpy/linalg/np_solve.cc
index 55d02f18d4dc..52535e123348 100644
--- a/src/operator/numpy/linalg/np_solve.cc
+++ b/src/operator/numpy/linalg/np_solve.cc
@@ -33,27 +33,28 @@
 namespace mxnet {
 namespace op {
 
-inline bool SolveOpShape(const nnvm::NodeAttrs &attrs,
-                         std::vector<mxnet::TShape> *in_attrs,
-                         std::vector<mxnet::TShape> *out_attrs) {
+inline bool SolveOpShape(const nnvm::NodeAttrs& attrs,
+                         std::vector<mxnet::TShape>* in_attrs,
+                         std::vector<mxnet::TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& in_a_shape = (*in_attrs)[0];
   const mxnet::TShape& in_b_shape = (*in_attrs)[1];
-  if (!ndim_is_known(in_a_shape)) { return false; }
+  if (!ndim_is_known(in_a_shape)) {
+    return false;
+  }
   int in_a_ndim = in_a_shape.ndim(), in_b_ndim = in_b_shape.ndim();
 
-  CHECK_GE(in_a_ndim, 2)
-    << "Array must be at least two-dimensional";
+  CHECK_GE(in_a_ndim, 2) << "Array must be at least two-dimensional";
   CHECK_EQ(in_a_shape[in_a_ndim - 2], in_a_shape[in_a_ndim - 1])
-    << "Input A's last two dimension must be equal";
+      << "Input A's last two dimension must be equal";
 
   if (in_a_ndim == in_b_ndim + 1) {
     CHECK_EQ(in_a_shape[in_a_ndim - 1], in_b_shape[in_b_ndim - 1])
-      << "Input A's and B's last dimension must be equal";
+        << "Input A's and B's last dimension must be equal";
   } else if (in_a_ndim == in_b_ndim) {
     CHECK_EQ(in_a_shape[in_a_ndim - 1], in_b_shape[in_b_ndim - 2])
-      << "Input A's and B's last second dimension must be equal";
+        << "Input A's and B's last second dimension must be equal";
   } else {
     dmlc::LogMessageFatal(__FILE__, __LINE__).stream() << "A's and B's dimensions don't match";
   }
@@ -73,10 +74,8 @@ inline bool SolveOpType(const nnvm::NodeAttrs& attrs,
   int a_type = in_attrs->at(0);
   int b_type = in_attrs->at(1);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
-  CHECK_NE(b_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
+  CHECK_NE(b_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
   if (mshadow::kFloat32 == a_type && mshadow::kFloat32 == b_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(1));
   } else {
@@ -86,31 +85,34 @@ inline bool SolveOpType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_solve)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs){
-  return std::vector<std::string>{"A", "B"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", SolveOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SolveOpType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForwardSolve<cpu, 2, 2, 2, 1, solve>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_solve"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix")
-.add_argument("B", "NDArray-or-Symbol", "Tensor of right side vector");
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "B"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", SolveOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SolveOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForwardSolve<cpu, 2, 2, 2, 1, solve>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_solve"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix")
+    .add_argument("B", "NDArray-or-Symbol", "Tensor of right side vector");
 
 NNVM_REGISTER_OP(_backward_npi_solve)
-.set_num_inputs(4)
-.set_num_outputs(2)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& ){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackwardSolve<cpu, 2, 2, 4, 2, solve_backward>);
+    .set_num_inputs(4)
+    .set_num_outputs(2)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs&) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackwardSolve<cpu, 2, 2, 4, 2, solve_backward>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_solve.cu b/src/operator/numpy/linalg/np_solve.cu
index b849cf55540e..2565d099b19f 100644
--- a/src/operator/numpy/linalg/np_solve.cu
+++ b/src/operator/numpy/linalg/np_solve.cu
@@ -32,10 +32,10 @@ namespace op {
 #if MXNET_USE_CUSOLVER == 1
 
 NNVM_REGISTER_OP(_npi_solve)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForwardSolve<gpu, 2, 2, 2, 1, solve>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForwardSolve<gpu, 2, 2, 2, 1, solve>);
 
 NNVM_REGISTER_OP(_backward_npi_solve)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackwardSolve<gpu, 2, 2, 4, 2, solve_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackwardSolve<gpu, 2, 2, 4, 2, solve_backward>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_tensorinv-inl.h b/src/operator/numpy/linalg/np_tensorinv-inl.h
index 414c3f09ec45..fa6aa094f22b 100644
--- a/src/operator/numpy/linalg/np_tensorinv-inl.h
+++ b/src/operator/numpy/linalg/np_tensorinv-inl.h
@@ -41,9 +41,8 @@ using namespace mshadow;
 struct TensorinvParam : public dmlc::Parameter<TensorinvParam> {
   int ind;
   DMLC_DECLARE_PARAMETER(TensorinvParam) {
-    DMLC_DECLARE_FIELD(ind)
-      .set_default(2)
-      .describe("Number of first indices that are involved in the inverse sum.");
+    DMLC_DECLARE_FIELD(ind).set_default(2).describe(
+        "Number of first indices that are involved in the inverse sum.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream ind_s;
@@ -52,7 +51,7 @@ struct TensorinvParam : public dmlc::Parameter<TensorinvParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void TensorinvOpForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -62,14 +61,14 @@ void TensorinvOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const mxnet::TBlob& a_tblob = inputs[0];
+  mshadow::Stream<xpu>* s         = ctx.get_stream<xpu>();
+  const mxnet::TBlob& a_tblob     = inputs[0];
   const mxnet::TBlob& inv_a_tblob = outputs[0];
-  const mxnet::TShape& a_shape = a_tblob.shape_;
+  const mxnet::TShape& a_shape    = a_tblob.shape_;
   CHECK_EQ(inv_a_tblob.type_flag_, a_tblob.type_flag_)
       << "Binary function only support input/output with the same type.";
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    const int ind = nnvm::get<TensorinvParam>(attrs.parsed).ind;
+    const int ind    = nnvm::get<TensorinvParam>(attrs.parsed).ind;
     dim_t prod_front = 1, prod_back = 1;
     if (ind < a_shape.ndim()) {
       for (int i = 0; i < ind; ++i) {
@@ -84,14 +83,14 @@ void TensorinvOpForward(const nnvm::NodeAttrs& attrs,
       }
     }
     Tensor<xpu, 3, OType> A =
-      a_tblob.get_with_shape<xpu, 3, OType>(Shape3(1, prod_back, prod_front), s);
+        a_tblob.get_with_shape<xpu, 3, OType>(Shape3(1, prod_back, prod_front), s);
     Tensor<xpu, 3, OType> inv_A =
-      inv_a_tblob.get_with_shape<xpu, 3, OType>(Shape3(1, prod_back, prod_front), s);
+        inv_a_tblob.get_with_shape<xpu, 3, OType>(Shape3(1, prod_back, prod_front), s);
     inverse::op(A, inv_A, ctx, attrs);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void TensorinvOpBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -101,15 +100,14 @@ void TensorinvOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& out_grad = inputs[0];
-  const TBlob& inv_a = inputs[1];
-  const TBlob& grad_a = outputs[0];
+  mshadow::Stream<xpu>* s   = ctx.get_stream<xpu>();
+  const TBlob& out_grad     = inputs[0];
+  const TBlob& inv_a        = inputs[1];
+  const TBlob& grad_a       = outputs[0];
   const TShape& inv_a_shape = inv_a.shape_;
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
     const int axes = nnvm::get<TensorinvParam>(attrs.parsed).ind;
-    CHECK_LE(inv_a_shape.ndim(), 6U)
-      << "tensorinv backward only support tensor's dimension <= 6";
+    CHECK_LE(inv_a_shape.ndim(), 6U) << "tensorinv backward only support tensor's dimension <= 6";
     if (axes < inv_a_shape.ndim()) {
       const int axes1 = inv_a_shape.ndim() - axes, axes2 = axes;
       TShape inv_a_transpose_shape(inv_a_shape.ndim(), -1);
@@ -121,14 +119,13 @@ void TensorinvOpBackward(const nnvm::NodeAttrs& attrs,
       }
       TShape temp_shape(2 * axes, -1);
       for (int i = 0; i < axes; ++i) {
-        temp_shape[i] = inv_a_transpose_shape[i];
+        temp_shape[i]        = inv_a_transpose_shape[i];
         temp_shape[i + axes] = inv_a_transpose_shape[i];
       }
-      Tensor<xpu, 1, char> workspace =
-        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_shape.Size() * sizeof(OType)),
-                                                       ctx.get_stream<xpu>());
+      Tensor<xpu, 1, char> workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
+          Shape1(temp_shape.Size() * sizeof(OType)), ctx.get_stream<xpu>());
       TBlob temp_tblob =
-        TBlob(reinterpret_cast<OType*>(workspace.dptr_), temp_shape, xpu::kDevMask);
+          TBlob(reinterpret_cast<OType*>(workspace.dptr_), temp_shape, xpu::kDevMask);
       dim_t a1 = 1, a2 = 1;
       for (int i = 0; i < axes2; ++i) {
         a1 *= inv_a_transpose_shape[i];
@@ -137,13 +134,13 @@ void TensorinvOpBackward(const nnvm::NodeAttrs& attrs,
         a2 *= inv_a_shape[i];
       }
       Tensor<xpu, 3, OType> inv_a_tensor =
-        inv_a.get_with_shape<xpu, 3, OType>(Shape3(1, a2, a1), s);
+          inv_a.get_with_shape<xpu, 3, OType>(Shape3(1, a2, a1), s);
       Tensor<xpu, 3, OType> out_grad_tensor =
-        out_grad.get_with_shape<xpu, 3, OType>(Shape3(1, a2, a1), s);
+          out_grad.get_with_shape<xpu, 3, OType>(Shape3(1, a2, a1), s);
       Tensor<xpu, 3, OType> temp_tensor =
-        temp_tblob.get_with_shape<xpu, 3, OType>(Shape3(1, a1, a1), s);
+          temp_tblob.get_with_shape<xpu, 3, OType>(Shape3(1, a1, a1), s);
       Tensor<xpu, 3, OType> grad_a_tensor =
-        grad_a.get_with_shape<xpu, 3, OType>(Shape3(1, a1, a2), s);
+          grad_a.get_with_shape<xpu, 3, OType>(Shape3(1, a1, a2), s);
       gemm2::op(inv_a_tensor, out_grad_tensor, temp_tensor, OType(1), true, false, s);
       gemm2::op(temp_tensor, inv_a_tensor, grad_a_tensor, OType(-1), false, true, s);
     } else {  // axes >= inv_a_shape.ndim()
@@ -153,15 +150,12 @@ void TensorinvOpBackward(const nnvm::NodeAttrs& attrs,
       }
       // check again
       CHECK_EQ(a, 1U)
-        << "a shape must be square, i. e., prod(a.shape[:ind]) == prod(a.shape[ind:]).";
-      Tensor<xpu, 1, OType> inv_a_tensor =
-        inv_a.get_with_shape<xpu, 1, OType>(Shape1(1), s);
-      Tensor<xpu, 1, OType> out_grad_tensor =
-        out_grad.get_with_shape<xpu, 1, OType>(Shape1(1), s);
-      Tensor<xpu, 1, OType> grad_a_tensor =
-        grad_a.get_with_shape<xpu, 1, OType>(Shape1(1), s);
-      ASSIGN_DISPATCH(grad_a_tensor, kWriteTo,
-        OType(-1) * inv_a_tensor * out_grad_tensor * inv_a_tensor);
+          << "a shape must be square, i. e., prod(a.shape[:ind]) == prod(a.shape[ind:]).";
+      Tensor<xpu, 1, OType> inv_a_tensor    = inv_a.get_with_shape<xpu, 1, OType>(Shape1(1), s);
+      Tensor<xpu, 1, OType> out_grad_tensor = out_grad.get_with_shape<xpu, 1, OType>(Shape1(1), s);
+      Tensor<xpu, 1, OType> grad_a_tensor   = grad_a.get_with_shape<xpu, 1, OType>(Shape1(1), s);
+      ASSIGN_DISPATCH(
+          grad_a_tensor, kWriteTo, OType(-1) * inv_a_tensor * out_grad_tensor * inv_a_tensor);
     }
   });
 }
diff --git a/src/operator/numpy/linalg/np_tensorinv.cc b/src/operator/numpy/linalg/np_tensorinv.cc
index 2fee11c846b7..6bc6d2a680d3 100644
--- a/src/operator/numpy/linalg/np_tensorinv.cc
+++ b/src/operator/numpy/linalg/np_tensorinv.cc
@@ -27,21 +27,21 @@
 namespace mxnet {
 namespace op {
 
-inline bool TensorinvOpShape(const nnvm::NodeAttrs &attrs,
-                             std::vector<mxnet::TShape> *in_attrs,
-                             std::vector<mxnet::TShape> *out_attrs) {
+inline bool TensorinvOpShape(const nnvm::NodeAttrs& attrs,
+                             std::vector<mxnet::TShape>* in_attrs,
+                             std::vector<mxnet::TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   const mxnet::TShape& a_shape = (*in_attrs)[0];
-  const int a_ndim = a_shape.ndim();
+  const int a_ndim             = a_shape.ndim();
   mxnet::TShape inv_a_shape(a_shape);
   if (!ndim_is_known(a_shape)) {
     return false;
   }
   // ind > 0, defalut = 2
   int ind = 2;
-  ind = nnvm::get<TensorinvParam>(attrs.parsed).ind;
+  ind     = nnvm::get<TensorinvParam>(attrs.parsed).ind;
   CHECK_GT(ind, 0) << "Invalid ind argument.";
 
   if (a_ndim > 0 && ind < a_ndim) {
@@ -55,8 +55,7 @@ inline bool TensorinvOpShape(const nnvm::NodeAttrs &attrs,
   } else {  // ind >= a_ndim
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, inv_a_shape);
   }
-  CHECK_NE(inv_a_shape.ndim(), 0)
-    << "can not reshape array";
+  CHECK_NE(inv_a_shape.ndim(), 0) << "can not reshape array";
 
   dim_t prod_front = 1, prod_back = 1;
   if (ind < a_ndim) {
@@ -66,8 +65,7 @@ inline bool TensorinvOpShape(const nnvm::NodeAttrs &attrs,
     for (int i = ind; i < a_ndim; ++i) {
       prod_back *= a_shape[i];
     }
-    CHECK_GT(prod_back, 0)
-      << "can not reshape array of size 0 into shape";
+    CHECK_GT(prod_back, 0) << "can not reshape array of size 0 into shape";
   } else {
     for (int i = 0; i < a_ndim; ++i) {
       prod_front *= a_shape[i];
@@ -75,7 +73,7 @@ inline bool TensorinvOpShape(const nnvm::NodeAttrs &attrs,
   }
   // prod_back >= 1 and prod_front == prod_back
   CHECK_EQ(prod_front, prod_back)
-    << "a shape must be square, i. e., prod(a.shape[:ind]) == prod(a.shape[ind:]).";
+      << "a shape must be square, i. e., prod(a.shape[:ind]) == prod(a.shape[ind:]).";
   return !mxnet::op::shape_is_none(out_attrs->at(0));
 }
 
@@ -86,8 +84,7 @@ inline bool TensorinvOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
   int a_type = in_attrs->at(0);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
   if (mshadow::kFloat32 == a_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   } else {
@@ -99,36 +96,39 @@ inline bool TensorinvOpType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(TensorinvParam);
 
 NNVM_REGISTER_OP(_npi_tensorinv)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(mxnet::op::ParamParser<TensorinvParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", TensorinvOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TensorinvOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", TensorinvOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", mxnet::op::ElemwiseGradUseOut{"_backward_npi_tensorinv"})
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_arguments(TensorinvParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(mxnet::op::ParamParser<TensorinvParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TensorinvOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TensorinvOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", TensorinvOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               mxnet::op::ElemwiseGradUseOut{"_backward_npi_tensorinv"})
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_arguments(TensorinvParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_tensorinv)
-.set_attr_parser(mxnet::op::ParamParser<TensorinvParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& ){
-    return std::vector<ResourceRequest>{1, ResourceRequest::kTempSpace};
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TensorinvOpBackward<cpu>);
+    .set_attr_parser(mxnet::op::ParamParser<TensorinvParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<FResourceRequest>(
+        "FResourceRequest",
+        [](const NodeAttrs&) {
+          return std::vector<ResourceRequest>{1, ResourceRequest::kTempSpace};
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TensorinvOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_tensorinv.cu b/src/operator/numpy/linalg/np_tensorinv.cu
index 8cad95f40b3a..ca727773d5a1 100644
--- a/src/operator/numpy/linalg/np_tensorinv.cu
+++ b/src/operator/numpy/linalg/np_tensorinv.cu
@@ -31,11 +31,10 @@ namespace op {
 
 #if MXNET_USE_CUSOLVER == 1
 
-NNVM_REGISTER_OP(_npi_tensorinv)
-.set_attr<FCompute>("FCompute<gpu>", TensorinvOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_tensorinv).set_attr<FCompute>("FCompute<gpu>", TensorinvOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_tensorinv)
-.set_attr<FCompute>("FCompute<gpu>", TensorinvOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", TensorinvOpBackward<gpu>);
 
 #endif
 
diff --git a/src/operator/numpy/linalg/np_tensorsolve-inl.h b/src/operator/numpy/linalg/np_tensorsolve-inl.h
index ac777986ab14..0f6d2893ea77 100644
--- a/src/operator/numpy/linalg/np_tensorsolve-inl.h
+++ b/src/operator/numpy/linalg/np_tensorsolve-inl.h
@@ -44,8 +44,8 @@ struct TensorsolveParam : public dmlc::Parameter<TensorsolveParam> {
   mxnet::Tuple<int> a_axes;
   DMLC_DECLARE_PARAMETER(TensorsolveParam) {
     DMLC_DECLARE_FIELD(a_axes)
-    .set_default(mxnet::Tuple<int>())
-    .describe("Tuple of ints, optional. Axes in a to reorder to the right, before inversion.");
+        .set_default(mxnet::Tuple<int>())
+        .describe("Tuple of ints, optional. Axes in a to reorder to the right, before inversion.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream a_axes_s;
@@ -55,9 +55,10 @@ struct TensorsolveParam : public dmlc::Parameter<TensorsolveParam> {
 };
 
 // Fix negative axes.
-inline void FixNegativeAxes(mxnet::Tuple<int> *a_axes_param,
-                            const mxnet::TShape& a_shape) {
-  if (-1 == a_axes_param->ndim()) { return; }
+inline void FixNegativeAxes(mxnet::Tuple<int>* a_axes_param, const mxnet::TShape& a_shape) {
+  if (-1 == a_axes_param->ndim()) {
+    return;
+  }
   const int a_ndim = a_shape.ndim();
   for (auto& i : *a_axes_param) {
     i = (i + a_ndim) % a_ndim;
@@ -66,8 +67,8 @@ inline void FixNegativeAxes(mxnet::Tuple<int> *a_axes_param,
 
 // Get remained axes and axes of a.
 inline void GetReorderedAxes(const mxnet::Tuple<int>& a_axes_param,
-                             mxnet::Tuple<int> *a_axes_remained,
-                             mxnet::Tuple<int> *a_axes,
+                             mxnet::Tuple<int>* a_axes_remained,
+                             mxnet::Tuple<int>* a_axes,
                              const mxnet::TShape& a_shape) {
   std::vector<int> a_axes_vec;
   for (int i = 0; i < a_shape.ndim(); ++i) {
@@ -76,7 +77,7 @@ inline void GetReorderedAxes(const mxnet::Tuple<int>& a_axes_param,
   // Get remained axes and axes.
   if (-1 == a_axes_param.ndim()) {
     *a_axes_remained = mxnet::Tuple<int>(a_axes_vec);
-    *a_axes = mxnet::Tuple<int>(a_axes_vec);
+    *a_axes          = mxnet::Tuple<int>(a_axes_vec);
     return;
   }
   for (const auto& i : a_axes_param) {
@@ -95,8 +96,7 @@ inline void GetReorderedAxes(const mxnet::Tuple<int>& a_axes_param,
 }
 
 // Calculate output shape if a and b is tensor
-inline mxnet::TShape GetOutShape(const mxnet::TShape& a_shape,
-                                 const mxnet::TShape& b_shape) {
+inline mxnet::TShape GetOutShape(const mxnet::TShape& a_shape, const mxnet::TShape& b_shape) {
   const int a_ndim = a_shape.ndim(), b_ndim = b_shape.ndim();
   const int temp = a_ndim > b_ndim ? b_ndim : b_ndim - a_ndim;
   mxnet::TShape out_shape(a_ndim - temp, -1);
@@ -107,16 +107,20 @@ inline mxnet::TShape GetOutShape(const mxnet::TShape& a_shape,
 }
 
 // Calculates workspace size of tensorsolve forward.
-template<typename xpu>
+template <typename xpu>
 size_t TensorsolveForwardWorkspaceSize(const Tuple<int>& a_axes_param,
                                        const TBlob& a,
                                        const TBlob& b,
                                        const TBlob& out,
                                        const std::vector<OpReqType>& req) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
 
   // Zero-size output, no need to launch kernel
-  if (0U == out.shape_.Size()) { return 0U; }
+  if (0U == out.shape_.Size()) {
+    return 0U;
+  }
 
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
@@ -136,26 +140,26 @@ size_t TensorsolveForwardWorkspaceSize(const Tuple<int>& a_axes_param,
   return 0U;
 }
 
-template<int req>
+template <int req>
 struct assign_helper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, const DType* in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i]);
   }
 };
 
 struct tensorsolve {
-  template<typename xpu, typename DType,  typename IndexT>
+  template <typename xpu, typename DType, typename IndexT>
   static void op(const Tensor<xpu, 2, DType>& A,
                  const Tensor<xpu, 2, DType>& X,
                  const Tensor<xpu, 1, IndexT>& ipiv,
                  const OpContext& ctx) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     linalg_solve(A, X, ipiv, s);  // ipiv for work_space in Lapacke_#gesv
   }
 };
 
-template<typename xpu, typename laop>
+template <typename xpu, typename laop>
 void TensorsolveOpForward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -166,68 +170,68 @@ void TensorsolveOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
-  const TBlob& out = outputs[0];
-  const mxnet::TShape a_shape = a.shape_;
-  const mxnet::TShape b_shape = b.shape_;
-  const mxnet::TShape out_shape = out.shape_;
-  const TensorsolveParam& param = nnvm::get<TensorsolveParam>(attrs.parsed);
+  mshadow::Stream<xpu>* s        = ctx.get_stream<xpu>();
+  const TBlob& a                 = inputs[0];
+  const TBlob& b                 = inputs[1];
+  const TBlob& out               = outputs[0];
+  const mxnet::TShape a_shape    = a.shape_;
+  const mxnet::TShape b_shape    = b.shape_;
+  const mxnet::TShape out_shape  = out.shape_;
+  const TensorsolveParam& param  = nnvm::get<TensorsolveParam>(attrs.parsed);
   mxnet::Tuple<int> a_axes_param = param.a_axes;
   FixNegativeAxes(&a_axes_param, a_shape);
 
   size_t workspace_size = TensorsolveForwardWorkspaceSize<xpu>(a_axes_param, a, b, out, req);
-  Tensor<xpu, 1, char> workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
-    Shape1(workspace_size), ctx.get_stream<xpu>());
+  Tensor<xpu, 1, char> workspace =
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), ctx.get_stream<xpu>());
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
 
   // Zero-size output, no need to launch kernel
-  if (0U == out.shape_.Size()) { return; }
+  if (0U == out.shape_.Size()) {
+    return;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(out.type_flag_, DType, {
     if (0U == a_shape.Size() || 0U == b_shape.Size()) {  // 0-size input
       if (req[0] != kAddTo) {
         Tensor<xpu, 1, DType> out_tensor =
-          out.get_with_shape<xpu, 1, DType>(Shape1(out.shape_.Size()), s);
+            out.get_with_shape<xpu, 1, DType>(Shape1(out.shape_.Size()), s);
         out_tensor = static_cast<DType>(0);
       }
-    } else if (0U == a_shape.ndim() || 0U ==  b_shape.ndim()) {  // At least 1 scalar.
+    } else if (0U == a_shape.ndim() || 0U == b_shape.ndim()) {  // At least 1 scalar.
       // Check again
-      CHECK_EQ(a_shape.Size(), 1U)
-        << "a's and b's dimensions don't match";
-      CHECK_EQ(b_shape.Size(), 1U)
-        << "a's and b's dimensions don't match";
-
-      DType* a_ptr =
-        reinterpret_cast<DType*>(workspace.dptr_);
-      DType* b_ptr =
-        reinterpret_cast<DType*>(workspace.dptr_+ a.Size() * sizeof(DType));
+      CHECK_EQ(a_shape.Size(), 1U) << "a's and b's dimensions don't match";
+      CHECK_EQ(b_shape.Size(), 1U) << "a's and b's dimensions don't match";
+
+      DType* a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* b_ptr = reinterpret_cast<DType*>(workspace.dptr_ + a.Size() * sizeof(DType));
       IndexT* ipiv_ptr =
-        reinterpret_cast<IndexT*>(workspace.dptr_ + (a.Size() + b.Size()) * sizeof(DType));
+          reinterpret_cast<IndexT*>(workspace.dptr_ + (a.Size() + b.Size()) * sizeof(DType));
 
       // Cast type
       MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a_shape.Size(), a_ptr, a.dptr<AType>());
+            s, a_shape.Size(), a_ptr, a.dptr<AType>());
       });
       MSHADOW_TYPE_SWITCH(b.type_flag_, BType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, b_shape.Size(), b_ptr, b.dptr<BType>());
+            s, b_shape.Size(), b_ptr, b.dptr<BType>());
       });
 
       mxnet::TBlob a_tblob(a_ptr, Shape2(1, 1), a.dev_mask(), a.dev_id());
       mxnet::TBlob b_tblob(b_ptr, Shape2(1, 1), b.dev_mask(), b.dev_id());
       mxnet::TBlob ipiv_tblob(ipiv_ptr, Shape1(1), out.dev_mask(), out.dev_id());
-      Tensor<xpu, 2, DType> a_tensor = a_tblob.get<xpu, 2, DType>(s);
-      Tensor<xpu, 2, DType> b_tensor = b_tblob.get<xpu, 2, DType>(s);
+      Tensor<xpu, 2, DType> a_tensor     = a_tblob.get<xpu, 2, DType>(s);
+      Tensor<xpu, 2, DType> b_tensor     = b_tblob.get<xpu, 2, DType>(s);
       Tensor<xpu, 1, IndexT> ipiv_tensor = ipiv_tblob.get<xpu, 1, IndexT>(s);
 
       // Solve linear equation
       laop::op(a_tensor, b_tensor, ipiv_tensor, ctx);
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-          mxnet_op::Kernel<assign_helper<req_type>, xpu>::Launch(
+        mxnet_op::Kernel<assign_helper<req_type>, xpu>::Launch(
             s, out_shape.Size(), b_tensor.dptr_, out.dptr<DType>());
       });
     } else {
@@ -236,51 +240,41 @@ void TensorsolveOpForward(const nnvm::NodeAttrs& attrs,
       Tuple<int> a_axes;
       GetReorderedAxes(a_axes_param, &a_axes_remained, &a_axes, a_shape);
       mxnet::TShape a_transpose_shape = GetReorderedShape(a_shape, a_axes);
-      const IndexT N = b_shape.Size();
+      const IndexT N                  = b_shape.Size();
 
-      DType* a_ptr =
-        reinterpret_cast<DType*>(workspace.dptr_);
-      DType* a_trans_ptr =
-        reinterpret_cast<DType*>(workspace.dptr_ + a.Size() * sizeof(DType));
-      DType* b_ptr =
-        reinterpret_cast<DType*>(workspace.dptr_ + 2 * a.Size() * sizeof(DType));
-      IndexT* ipiv_ptr = reinterpret_cast<IndexT*>(
-        workspace.dptr_ + (2 * a.Size() + b.Size()) * sizeof(DType));
+      DType* a_ptr       = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* a_trans_ptr = reinterpret_cast<DType*>(workspace.dptr_ + a.Size() * sizeof(DType));
+      DType* b_ptr       = reinterpret_cast<DType*>(workspace.dptr_ + 2 * a.Size() * sizeof(DType));
+      IndexT* ipiv_ptr =
+          reinterpret_cast<IndexT*>(workspace.dptr_ + (2 * a.Size() + b.Size()) * sizeof(DType));
 
       // Cast type
       MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a_shape.Size(), a_ptr, a.dptr<AType>());
+            s, a_shape.Size(), a_ptr, a.dptr<AType>());
       });
       // Cast type
       MSHADOW_TYPE_SWITCH(b.type_flag_, BType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, b_shape.Size(), b_ptr, b.dptr<BType>());
+            s, b_shape.Size(), b_ptr, b.dptr<BType>());
       });
 
-      mxnet::TBlob a_tblob =
-        TBlob(a_ptr, a_shape, a.dev_mask(), a.dev_id());
+      mxnet::TBlob a_tblob = TBlob(a_ptr, a_shape, a.dev_mask(), a.dev_id());
       mxnet::TBlob a_transpose_tblob =
-        TBlob(a_trans_ptr, a_transpose_shape, a.dev_mask(), a.dev_id());
-      mxnet::TBlob b_tblob =
-        TBlob(b_ptr, b_shape, b.dev_mask(), b.dev_id());
-      mxnet::TBlob ipiv_tblob =
-        TBlob(ipiv_ptr, b_shape, out.dev_mask(), out.dev_id());
+          TBlob(a_trans_ptr, a_transpose_shape, a.dev_mask(), a.dev_id());
+      mxnet::TBlob b_tblob    = TBlob(b_ptr, b_shape, b.dev_mask(), b.dev_id());
+      mxnet::TBlob ipiv_tblob = TBlob(ipiv_ptr, b_shape, out.dev_mask(), out.dev_id());
       mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
                                     a_tblob,            // src
                                     a_transpose_tblob,  // res
                                     mxnet::TShape(a_axes.begin(), a_axes.end()));
 
-      Tensor<xpu, 2, DType> a_tensor =
-        a_tblob.get_with_shape<xpu, 2, DType>(Shape2(N, N), s);
-      Tensor<xpu, 1, IndexT> ipiv_tensor =
-        ipiv_tblob.get_with_shape<xpu, 1, IndexT>(Shape1(N), s);
-      Tensor<xpu, 2, DType> b_tensor =
-        b_tblob.get_with_shape<xpu, 2, DType>(Shape2(1, N), s);
-      Tensor<xpu, 2, DType> out_tensor =
-        out.get_with_shape<xpu, 2, DType>(Shape2(1, N), s);
+      Tensor<xpu, 2, DType> a_tensor     = a_tblob.get_with_shape<xpu, 2, DType>(Shape2(N, N), s);
+      Tensor<xpu, 1, IndexT> ipiv_tensor = ipiv_tblob.get_with_shape<xpu, 1, IndexT>(Shape1(N), s);
+      Tensor<xpu, 2, DType> b_tensor     = b_tblob.get_with_shape<xpu, 2, DType>(Shape2(1, N), s);
+      Tensor<xpu, 2, DType> out_tensor   = out.get_with_shape<xpu, 2, DType>(Shape2(1, N), s);
 
-      a_tblob = a_tblob.reshape(Shape2(N, N));
+      a_tblob           = a_tblob.reshape(Shape2(N, N));
       a_transpose_tblob = a_transpose_tblob.reshape(Shape2(N, N));
       Tuple<int> a_axes_2D(std::vector<int>{1, 0});
       mxnet::op::TransposeImpl<xpu>(ctx.run_ctx,
@@ -291,41 +285,43 @@ void TensorsolveOpForward(const nnvm::NodeAttrs& attrs,
       laop::op(a_tensor, b_tensor, ipiv_tensor, ctx);
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<assign_helper<req_type>, xpu>::Launch(
-          s, out_shape.Size(), b_tensor.dptr_, out_tensor.dptr_);
+            s, out_shape.Size(), b_tensor.dptr_, out_tensor.dptr_);
       });
     }
   });
 }
 
 // Calculates workspace size of tensordot backward.
-template<typename xpu>
+template <typename xpu>
 size_t TensorsolveBackwardWorkspaceSize(const TBlob& out_grad,
                                         const TBlob& a,
                                         const TBlob& b,
                                         const TBlob& x) {
-  using IndexT = typename LapackIndex<xpu>::IndexT;
+  using IndexT                 = typename LapackIndex<xpu>::IndexT;
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
   const mxnet::TShape& x_shape = x.shape_;
 
   // Zero-size output, no need to launch kernel
-  if (0U == a_shape.Size() || 0U == b_shape.Size()) { return 0U; }
+  if (0U == a_shape.Size() || 0U == b_shape.Size()) {
+    return 0U;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(out_grad.type_flag_, DType, {
     size_t work_space_size = 0;
     if (0U == a_shape.ndim() || 0U == b_shape.ndim()) {
       // At least 1 scalar.
-      work_space_size += sizeof(DType) * a_shape.Size();  // for tensorinv(a)
-      work_space_size += sizeof(DType) * a_shape.Size();  // for getri work space lu
+      work_space_size += sizeof(DType) * a_shape.Size();   // for tensorinv(a)
+      work_space_size += sizeof(DType) * a_shape.Size();   // for getri work space lu
       work_space_size += sizeof(IndexT) * b_shape.Size();  // for getri work space pivot
     } else {
       // Two tensors of at least 1 dimensions.
-      work_space_size += sizeof(DType) * a_shape.Size();  // for tensorinv(a)
-      work_space_size += sizeof(DType) * a_shape.Size();  // for getri work space lu
-      work_space_size += sizeof(DType) * b_shape.Size();  // for b
-      work_space_size += sizeof(DType) * x_shape.Size();  // for x
-      work_space_size += sizeof(DType) * a_shape.Size();  // for grad_a
-      work_space_size += sizeof(DType) * b_shape.Size();  // for grad_b
+      work_space_size += sizeof(DType) * a_shape.Size();   // for tensorinv(a)
+      work_space_size += sizeof(DType) * a_shape.Size();   // for getri work space lu
+      work_space_size += sizeof(DType) * b_shape.Size();   // for b
+      work_space_size += sizeof(DType) * x_shape.Size();   // for x
+      work_space_size += sizeof(DType) * a_shape.Size();   // for grad_a
+      work_space_size += sizeof(DType) * b_shape.Size();   // for grad_b
       work_space_size += sizeof(IndexT) * b_shape.Size();  // for getri work space pivot
     }
     return work_space_size;
@@ -337,7 +333,7 @@ size_t TensorsolveBackwardWorkspaceSize(const TBlob& out_grad,
 // Get original axes for tensor a.
 inline void GetOriginAxes(const mxnet::TShape& a_shape,
                           const mxnet::Tuple<int>& a_axes,
-                          mxnet::Tuple<int> *a_origin_axes) {
+                          mxnet::Tuple<int>* a_origin_axes) {
   std::vector<int> a_origin_axes_vec(a_shape.ndim(), -1);
   for (int i = 0; i < a_shape.ndim(); ++i) {
     a_origin_axes_vec[a_axes[i]] = i;
@@ -346,7 +342,7 @@ inline void GetOriginAxes(const mxnet::TShape& a_shape,
 }
 
 struct tensorsolve_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dX,
                  const Tensor<xpu, 3, DType>& inv_A,
                  const Tensor<xpu, 3, DType>& B,
@@ -356,13 +352,13 @@ struct tensorsolve_backward {
                  const OpContext& ctx) {
     // (1) calcualte dB = trans(tensorinv(A)) * dX
     // (2) calcualte dA = dB * trans(X)
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     gemm2::op(inv_A, dX, dB, DType(1), true, false, s);
     gemm2::op(dB, X, dA, DType(-1), false, true, s);
   }
 };
 
-template<typename xpu, typename laop, typename IndexT = typename LapackIndex<xpu>::IndexT>
+template <typename xpu, typename laop, typename IndexT = typename LapackIndex<xpu>::IndexT>
 void TensorsolveBackwardImpl(const Tuple<int>& a_axes_param,
                              const TBlob& out_grad,
                              const TBlob& a,
@@ -373,46 +369,44 @@ void TensorsolveBackwardImpl(const Tuple<int>& a_axes_param,
                              const OpContext& ctx,
                              const std::vector<OpReqType>& req,
                              const Tensor<xpu, 1, char>& workspace) {
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s      = ctx.get_stream<xpu>();
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
   const mxnet::TShape& x_shape = x.shape_;
 
-  if (kNullOp == req[0] && kNullOp == req[1]) { return; }
+  if (kNullOp == req[0] && kNullOp == req[1]) {
+    return;
+  }
 
   // Zero-size output, no need to launch kernel
-  if (0U == a_shape.Size() || 0U == b_shape.Size()) { return; }
+  if (0U == a_shape.Size() || 0U == b_shape.Size()) {
+    return;
+  }
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(out_grad.type_flag_, DType, {
     if (0 == a_shape.ndim() || 0 == b_shape.ndim()) {
       // At least 1 scalar.
-      CHECK_EQ(a_shape.Size(), 1U)
-        << "a's and b's dimensions don't match";
-      CHECK_EQ(b_shape.Size(), 1U)
-        << "a's and b's dimensions don't match";
+      CHECK_EQ(a_shape.Size(), 1U) << "a's and b's dimensions don't match";
+      CHECK_EQ(b_shape.Size(), 1U) << "a's and b's dimensions don't match";
 
       // Allocate workspace.
-      DType *tensorinv_a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-      DType *lu_ptr = reinterpret_cast<DType*>(workspace.dptr_ + a_shape.Size() * sizeof(DType));
-      IndexT *ipiv_ptr =
-        reinterpret_cast<IndexT*>(workspace.dptr_ + 2 * a_shape.Size() * sizeof(DType));
+      DType* tensorinv_a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* lu_ptr = reinterpret_cast<DType*>(workspace.dptr_ + a_shape.Size() * sizeof(DType));
+      IndexT* ipiv_ptr =
+          reinterpret_cast<IndexT*>(workspace.dptr_ + 2 * a_shape.Size() * sizeof(DType));
       TBlob tensorinv_a(tensorinv_a_ptr, a_shape, xpu::kDevMask);
       TBlob lu(lu_ptr, a_shape, xpu::kDevMask);
       TBlob ipiv(ipiv_ptr, b_shape, xpu::kDevMask);
 
       MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a_shape.Size(),
-          tensorinv_a_ptr,
-          a.dptr<AType>());
+            s, a_shape.Size(), tensorinv_a_ptr, a.dptr<AType>());
       });
       // Calculate tensorinv(a)
       Tensor<xpu, 3, DType> tensorinv_a_tensor =
-        tensorinv_a.get_with_shape<xpu, 3, DType>(Shape3(1, 1, 1), s);
-      Tensor<xpu, 3, DType> lu_tensor =
-        lu.get_with_shape<xpu, 3, DType>(Shape3(1, 1, 1), s);
-      Tensor<xpu, 2, IndexT> ipiv_tensor =
-        ipiv.get_with_shape<xpu, 2, IndexT>(Shape2(1, 1), s);
+          tensorinv_a.get_with_shape<xpu, 3, DType>(Shape3(1, 1, 1), s);
+      Tensor<xpu, 3, DType> lu_tensor    = lu.get_with_shape<xpu, 3, DType>(Shape3(1, 1, 1), s);
+      Tensor<xpu, 2, IndexT> ipiv_tensor = ipiv.get_with_shape<xpu, 2, IndexT>(Shape2(1, 1), s);
       batch_inverse(tensorinv_a_tensor, lu_tensor, ipiv_tensor, ctx);
 
       MSHADOW_TYPE_SWITCH(x.type_flag_, XType, {
@@ -434,20 +428,17 @@ void TensorsolveBackwardImpl(const Tuple<int>& a_axes_param,
       mxnet::TShape reordered_a_shape = GetReorderedShape(a_shape, a_axes);
 
       // Allocate workspace.
-      DType *tensorinv_a_ptr = reinterpret_cast<DType*>(
-        workspace.dptr_);
-      DType *lu_ptr = reinterpret_cast<DType*>(
-        workspace.dptr_ + a_shape.Size() * sizeof(DType));
-      DType *b_ptr = reinterpret_cast<DType*>(
-        workspace.dptr_ + 2 * a_shape.Size() * sizeof(DType));
-      DType *x_ptr = reinterpret_cast<DType*>(
-        workspace.dptr_ + (2 * a_shape.Size() + b_shape.Size()) * sizeof(DType));
-      DType *grad_a_ptr = reinterpret_cast<DType*>(
-        workspace.dptr_ + 2 * (a_shape.Size() + b_shape.Size()) * sizeof(DType));
-      DType *grad_b_ptr = reinterpret_cast<DType*>(
-        workspace.dptr_ + (3 * a_shape.Size() + 2 * b_shape.Size()) * sizeof(DType));
-      IndexT *ipiv_ptr = reinterpret_cast<IndexT*>(
-        workspace.dptr_ + 3 * (a_shape.Size() + b_shape.Size()) * sizeof(DType));
+      DType* tensorinv_a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* lu_ptr = reinterpret_cast<DType*>(workspace.dptr_ + a_shape.Size() * sizeof(DType));
+      DType* b_ptr = reinterpret_cast<DType*>(workspace.dptr_ + 2 * a_shape.Size() * sizeof(DType));
+      DType* x_ptr = reinterpret_cast<DType*>(
+          workspace.dptr_ + (2 * a_shape.Size() + b_shape.Size()) * sizeof(DType));
+      DType* grad_a_ptr = reinterpret_cast<DType*>(
+          workspace.dptr_ + 2 * (a_shape.Size() + b_shape.Size()) * sizeof(DType));
+      DType* grad_b_ptr = reinterpret_cast<DType*>(
+          workspace.dptr_ + (3 * a_shape.Size() + 2 * b_shape.Size()) * sizeof(DType));
+      IndexT* ipiv_ptr = reinterpret_cast<IndexT*>(
+          workspace.dptr_ + 3 * (a_shape.Size() + b_shape.Size()) * sizeof(DType));
 
       TBlob tensorinv_a_data(tensorinv_a_ptr, a_shape, xpu::kDevMask);
       TBlob lu_data(lu_ptr, a_shape, xpu::kDevMask);
@@ -458,21 +449,15 @@ void TensorsolveBackwardImpl(const Tuple<int>& a_axes_param,
       TBlob ipiv_data(ipiv_ptr, b_shape, xpu::kDevMask);
       MSHADOW_TYPE_SWITCH(a.type_flag_, AType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, a_shape.Size(),
-          lu_ptr,
-          a.dptr<AType>());
+            s, a_shape.Size(), lu_ptr, a.dptr<AType>());
       });
       MSHADOW_TYPE_SWITCH(b.type_flag_, BType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, b_shape.Size(),
-          b_ptr,
-          b.dptr<BType>());
+            s, b_shape.Size(), b_ptr, b.dptr<BType>());
       });
       MSHADOW_TYPE_SWITCH(x.type_flag_, XType, {
         mxnet_op::Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-          s, x_shape.Size(),
-          x_ptr,
-          x.dptr<XType>());
+            s, x_shape.Size(), x_ptr, x.dptr<XType>());
       });
       // Eg: lu_data(2, 3, 2, 15, 4, 5) -> tensorinv_a_data(3, 4, 5, 15, 2, 2)
       tensorinv_a_data = tensorinv_a_data.reshape(reordered_a_shape);
@@ -482,19 +467,16 @@ void TensorsolveBackwardImpl(const Tuple<int>& a_axes_param,
                                     mxnet::TShape(a_axes.begin(), a_axes.end()));
 
       Tensor<xpu, 3, DType> tensorinv_a_tensor =
-        tensorinv_a_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, N), s);
-      Tensor<xpu, 3, DType> lu_tensor =
-        lu_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, N), s);
-      Tensor<xpu, 3, DType> b_tensor =
-        b_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, 1), s);
-      Tensor<xpu, 3, DType> x_tensor =
-        x_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, 1), s);
+          tensorinv_a_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, N), s);
+      Tensor<xpu, 3, DType> lu_tensor = lu_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, N), s);
+      Tensor<xpu, 3, DType> b_tensor  = b_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, 1), s);
+      Tensor<xpu, 3, DType> x_tensor  = x_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, 1), s);
       Tensor<xpu, 3, DType> grad_a_tensor =
-        grad_a_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, N), s);
+          grad_a_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, N), s);
       Tensor<xpu, 3, DType> grad_b_tensor =
-        grad_b_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, 1), s);
+          grad_b_data.get_with_shape<xpu, 3, DType>(Shape3(1, N, 1), s);
       Tensor<xpu, 2, IndexT> ipiv_tensor =
-        ipiv_data.get_with_shape<xpu, 2, IndexT>(Shape2(1, N), s);
+          ipiv_data.get_with_shape<xpu, 2, IndexT>(Shape2(1, N), s);
 
       // Calculate tensorinv(a).
       batch_inverse(tensorinv_a_tensor, lu_tensor, ipiv_tensor, ctx);
@@ -515,17 +497,17 @@ void TensorsolveBackwardImpl(const Tuple<int>& a_axes_param,
 
       MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
         mxnet_op::Kernel<assign_helper<req_type>, xpu>::Launch(
-          s, b_shape.Size(), grad_b_tensor.dptr_, grad_b.dptr<DType>());
+            s, b_shape.Size(), grad_b_tensor.dptr_, grad_b.dptr<DType>());
       });
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<assign_helper<req_type>, xpu>::Launch(
-          s, a_shape.Size(), lu_tensor.dptr_, grad_a.dptr<DType>());
+            s, a_shape.Size(), lu_tensor.dptr_, grad_a.dptr<DType>());
       });
     }
   });
 }
 
-template<typename xpu, typename laop>
+template <typename xpu, typename laop>
 void TensorsolveOpBackward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -536,28 +518,23 @@ void TensorsolveOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
 
-  const TBlob& out_grad = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
-  const TBlob& x = inputs[3];
-  const TBlob& grad_a = outputs[0];
-  const TBlob& grad_b = outputs[1];
-  const mxnet::TShape a_shape = a.shape_;
-  const mxnet::TShape b_shape = b.shape_;
-  const TensorsolveParam& param = nnvm::get<TensorsolveParam>(attrs.parsed);
+  const TBlob& out_grad          = inputs[0];
+  const TBlob& a                 = inputs[1];
+  const TBlob& b                 = inputs[2];
+  const TBlob& x                 = inputs[3];
+  const TBlob& grad_a            = outputs[0];
+  const TBlob& grad_b            = outputs[1];
+  const mxnet::TShape a_shape    = a.shape_;
+  const mxnet::TShape b_shape    = b.shape_;
+  const TensorsolveParam& param  = nnvm::get<TensorsolveParam>(attrs.parsed);
   mxnet::Tuple<int> a_axes_param = param.a_axes;
   FixNegativeAxes(&a_axes_param, a_shape);
 
   size_t workspace_size = TensorsolveBackwardWorkspaceSize<xpu>(out_grad, a, b, x);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size),
-                                                   ctx.get_stream<xpu>());
-  TensorsolveBackwardImpl<xpu, laop>(a_axes_param,
-                                     out_grad,
-                                     a, b, x,
-                                     grad_a, grad_b,
-                                     ctx, req,
-                                     workspace);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), ctx.get_stream<xpu>());
+  TensorsolveBackwardImpl<xpu, laop>(
+      a_axes_param, out_grad, a, b, x, grad_a, grad_b, ctx, req, workspace);
 }
 
 }  // namespace op
diff --git a/src/operator/numpy/linalg/np_tensorsolve.cc b/src/operator/numpy/linalg/np_tensorsolve.cc
index 1dabcdd0eac4..211df02b194a 100644
--- a/src/operator/numpy/linalg/np_tensorsolve.cc
+++ b/src/operator/numpy/linalg/np_tensorsolve.cc
@@ -28,15 +28,15 @@ namespace mxnet {
 namespace op {
 
 bool TensorsolveOpShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   const mxnet::TShape& a_shape = in_attrs->at(0);
   const mxnet::TShape& b_shape = in_attrs->at(1);
-  const int a_ndim = a_shape.ndim();
-  const int b_ndim = b_shape.ndim();
+  const int a_ndim             = a_shape.ndim();
+  const int b_ndim             = b_shape.ndim();
 
   if (!ndim_is_known(a_shape) || !ndim_is_known(b_shape)) {
     return false;
@@ -47,17 +47,15 @@ bool TensorsolveOpShape(const nnvm::NodeAttrs& attrs,
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, b_shape);
   } else if (0 == a_ndim && 0 != b_ndim) {
     // a is scalar, b is tensor
-    CHECK_EQ(b_shape.Size(), 1U)
-      << "a's and b's dimensions don't match";
+    CHECK_EQ(b_shape.Size(), 1U) << "a's and b's dimensions don't match";
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, a_shape);
   } else if (0 != a_ndim && 0 == b_ndim) {
     // a is tensor, a is scalar
-    CHECK_EQ(a_shape.Size(), 1U)
-      << "a's and b's dimensions don't match";
+    CHECK_EQ(a_shape.Size(), 1U) << "a's and b's dimensions don't match";
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, a_shape);
   } else {
     // a and b of at least 1 dimensions.
-    const TensorsolveParam& param = nnvm::get<TensorsolveParam>(attrs.parsed);
+    const TensorsolveParam& param  = nnvm::get<TensorsolveParam>(attrs.parsed);
     mxnet::Tuple<int> a_axes_param = param.a_axes;
     FixNegativeAxes(&a_axes_param, a_shape);
 
@@ -94,10 +92,8 @@ inline bool TensorsolveOpType(const nnvm::NodeAttrs& attrs,
   int a_type = in_attrs->at(0);
   int b_type = in_attrs->at(1);
   // unsupport float16
-  CHECK_NE(a_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
-  CHECK_NE(b_type, mshadow::kFloat16)
-    << "array type float16 is unsupported in linalg";
+  CHECK_NE(a_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
+  CHECK_NE(b_type, mshadow::kFloat16) << "array type float16 is unsupported in linalg";
   if (mshadow::kFloat32 == a_type && mshadow::kFloat32 == b_type) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(1));
   } else {
@@ -109,37 +105,39 @@ inline bool TensorsolveOpType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(TensorsolveParam);
 
 NNVM_REGISTER_OP(_npi_tensorsolve)
-.set_attr_parser(mxnet::op::ParamParser<TensorsolveParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TensorsolveOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TensorsolveOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", TensorsolveOpForward<cpu, tensorsolve>)
-.set_attr<nnvm::FGradient>("FGradient",
-  mxnet::op::ElemwiseGradUseInOut{"_backward_npi_tensorsolve"})
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input")
-.add_arguments(TensorsolveParam::__FIELDS__());
+    .set_attr_parser(mxnet::op::ParamParser<TensorsolveParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TensorsolveOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TensorsolveOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", TensorsolveOpForward<cpu, tensorsolve>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               mxnet::op::ElemwiseGradUseInOut{"_backward_npi_tensorsolve"})
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input")
+    .add_arguments(TensorsolveParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_tensorsolve)
-.set_attr_parser(mxnet::op::ParamParser<TensorsolveParam>)
-.set_num_inputs(4)
-.set_num_outputs(2)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& ){
-    return std::vector<ResourceRequest>{1, ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TensorsolveOpBackward<cpu, tensorsolve_backward>);
+    .set_attr_parser(mxnet::op::ParamParser<TensorsolveParam>)
+    .set_num_inputs(4)
+    .set_num_outputs(2)
+    .set_attr<FResourceRequest>(
+        "FResourceRequest",
+        [](const NodeAttrs&) {
+          return std::vector<ResourceRequest>{1, ResourceRequest::kTempSpace};
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TensorsolveOpBackward<cpu, tensorsolve_backward>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/linalg/np_tensorsolve.cu b/src/operator/numpy/linalg/np_tensorsolve.cu
index 07e2121750d5..9ba0a134f6df 100644
--- a/src/operator/numpy/linalg/np_tensorsolve.cu
+++ b/src/operator/numpy/linalg/np_tensorsolve.cu
@@ -31,10 +31,10 @@ namespace op {
 #if MXNET_USE_CUSOLVER == 1
 
 NNVM_REGISTER_OP(_npi_tensorsolve)
-.set_attr<FCompute>("FCompute<gpu>", TensorsolveOpForward<gpu, tensorsolve>);
+    .set_attr<FCompute>("FCompute<gpu>", TensorsolveOpForward<gpu, tensorsolve>);
 
 NNVM_REGISTER_OP(_backward_npi_tensorsolve)
-.set_attr<FCompute>("FCompute<gpu>", TensorsolveOpBackward<gpu, tensorsolve_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", TensorsolveOpBackward<gpu, tensorsolve_backward>);
 
 #endif
 
diff --git a/src/operator/numpy/np_bincount_op-inl.h b/src/operator/numpy/np_bincount_op-inl.h
index a2e758f36059..f1dc9d050376 100644
--- a/src/operator/numpy/np_bincount_op-inl.h
+++ b/src/operator/numpy/np_bincount_op-inl.h
@@ -42,27 +42,26 @@ struct NumpyBincountParam : public dmlc::Parameter<NumpyBincountParam> {
   int minlength;
   bool has_weights;
   DMLC_DECLARE_PARAMETER(NumpyBincountParam) {
-    DMLC_DECLARE_FIELD(minlength)
-    .set_default(0)
-    .describe("A minimum number of bins for the output array"
-              "If minlength is specified, there will be at least this"
-              "number of bins in the output array");
+    DMLC_DECLARE_FIELD(minlength).set_default(0).describe(
+        "A minimum number of bins for the output array"
+        "If minlength is specified, there will be at least this"
+        "number of bins in the output array");
     DMLC_DECLARE_FIELD(has_weights)
-    .set_default(false)
-    .describe("Determine whether Bincount has weights.");
+        .set_default(false)
+        .describe("Determine whether Bincount has weights.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream minlength_s, has_weights_s;
     minlength_s << minlength;
     has_weights_s << has_weights;
-    (*dict)["minlength"] = minlength_s.str();
+    (*dict)["minlength"]   = minlength_s.str();
     (*dict)["has_weights"] = has_weights_s.str();
   }
 };
 
 inline bool NumpyBincountType(const nnvm::NodeAttrs& attrs,
-                              std::vector<int> *in_attrs,
-                              std::vector<int> *out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   const NumpyBincountParam& param = nnvm::get<NumpyBincountParam>(attrs.parsed);
   if (!param.has_weights) {
     return ElemwiseType<1, 1>(attrs, in_attrs, out_attrs) && in_attrs->at(0) != -1;
@@ -78,8 +77,8 @@ inline bool NumpyBincountType(const nnvm::NodeAttrs& attrs,
 inline bool NumpyBincountStorageType(const nnvm::NodeAttrs& attrs,
                                      const int dev_mask,
                                      DispatchMode* dispatch_mode,
-                                     std::vector<int> *in_attrs,
-                                     std::vector<int> *out_attrs) {
+                                     std::vector<int>* in_attrs,
+                                     std::vector<int>* out_attrs) {
   const NumpyBincountParam& param = nnvm::get<NumpyBincountParam>(attrs.parsed);
   if (param.has_weights) {
     CHECK_EQ(in_attrs->size(), 2U);
@@ -87,60 +86,60 @@ inline bool NumpyBincountStorageType(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(in_attrs->size(), 1U);
   }
   CHECK_EQ(out_attrs->size(), 1U);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
   *dispatch_mode = DispatchMode::kFComputeEx;
   return true;
 }
 
-template<typename xpu>
-void NumpyBincountForwardImpl(const OpContext &ctx,
-                              const NDArray &data,
-                              const NDArray &weights,
-                              const NDArray &out,
-                              const size_t &data_n,
-                              const int &minlength);
+template <typename xpu>
+void NumpyBincountForwardImpl(const OpContext& ctx,
+                              const NDArray& data,
+                              const NDArray& weights,
+                              const NDArray& out,
+                              const size_t& data_n,
+                              const int& minlength);
 
-template<typename xpu>
-void NumpyBincountForwardImpl(const OpContext &ctx,
-                              const NDArray &data,
-                              const NDArray &out,
-                              const size_t &data_n,
-                              const int &minlength);
+template <typename xpu>
+void NumpyBincountForwardImpl(const OpContext& ctx,
+                              const NDArray& data,
+                              const NDArray& out,
+                              const size_t& data_n,
+                              const int& minlength);
 
-template<typename xpu>
+template <typename xpu>
 void NumpyBincountForward(const nnvm::NodeAttrs& attrs,
-                          const OpContext &ctx,
-                          const std::vector<NDArray> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<NDArray> &outputs) {
+                          const OpContext& ctx,
+                          const std::vector<NDArray>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<NDArray>& outputs) {
   CHECK_GE(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK(req[0] == kWriteTo);
   const NumpyBincountParam& param = nnvm::get<NumpyBincountParam>(attrs.parsed);
-  const bool has_weights = param.has_weights;
-  const int minlength = param.minlength;
-  const NDArray &data = inputs[0];
-  const NDArray &out = outputs[0];
+  const bool has_weights          = param.has_weights;
+  const int minlength             = param.minlength;
+  const NDArray& data             = inputs[0];
+  const NDArray& out              = outputs[0];
   CHECK_LE(data.shape().ndim(), 1U) << "Input only accept 1d array";
-  CHECK(!common::is_float(data.dtype())) <<"Input data should be int type";
+  CHECK(!common::is_float(data.dtype())) << "Input data should be int type";
   size_t N = data.shape().Size();
   if (N == 0) {
-    mshadow::Stream<xpu> *stream = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* stream = ctx.get_stream<xpu>();
     mxnet::TShape s(1, minlength);
-    const_cast<NDArray &>(out).Init(s);
+    const_cast<NDArray&>(out).Init(s);
     MSHADOW_TYPE_SWITCH(out.dtype(), OType, {
       mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(
-        stream, minlength, out.data().dptr<OType>());
+          stream, minlength, out.data().dptr<OType>());
     });
   } else {
     if (has_weights) {
       CHECK_EQ(inputs.size(), 2U);
-      const NDArray &weights = inputs[1];
+      const NDArray& weights = inputs[1];
       CHECK_EQ(data.shape(), weights.shape()) << "weights should has same size as input";
       NumpyBincountForwardImpl<xpu>(ctx, data, weights, out, N, minlength);
     } else {
diff --git a/src/operator/numpy/np_bincount_op.cc b/src/operator/numpy/np_bincount_op.cc
index 88f9ff85b7bd..d0d91cf9132e 100644
--- a/src/operator/numpy/np_bincount_op.cc
+++ b/src/operator/numpy/np_bincount_op.cc
@@ -28,8 +28,10 @@
 namespace mxnet {
 namespace op {
 
-void BinNumberCount(const NDArray& data, const int& minlength,
-                    const NDArray& out, const size_t& N) {
+void BinNumberCount(const NDArray& data,
+                    const int& minlength,
+                    const NDArray& out,
+                    const size_t& N) {
   int bin = minlength;
   MSHADOW_TYPE_SWITCH(data.dtype(), DType, {
     DType* data_ptr = data.data().dptr<DType>();
@@ -41,19 +43,18 @@ void BinNumberCount(const NDArray& data, const int& minlength,
     }
   });  // bin number = max(max(data) + 1, minlength)
   mxnet::TShape s(1, bin);
-  const_cast<NDArray &>(out).Init(s);  // set the output shape forcefully
+  const_cast<NDArray&>(out).Init(s);  // set the output shape forcefully
 }
 
-template<typename DType, typename OType>
-void BincountCpuWeights(const DType* data, const OType* weights,
-                        OType* out, const size_t& data_n) {
+template <typename DType, typename OType>
+void BincountCpuWeights(const DType* data, const OType* weights, OType* out, const size_t& data_n) {
   for (size_t i = 0; i < data_n; i++) {
     int target = data[i];
     out[target] += weights[i];
   }
 }
 
-template<typename DType, typename OType>
+template <typename DType, typename OType>
 void BincountCpu(const DType* data, OType* out, const size_t& data_n) {
   for (size_t i = 0; i < data_n; i++) {
     int target = data[i];
@@ -61,73 +62,74 @@ void BincountCpu(const DType* data, OType* out, const size_t& data_n) {
   }
 }
 
-template<>
-void NumpyBincountForwardImpl<cpu>(const OpContext &ctx,
-                                   const NDArray &data,
-                                   const NDArray &weights,
-                                   const NDArray &out,
-                                   const size_t &data_n,
-                                   const int &minlength) {
+template <>
+void NumpyBincountForwardImpl<cpu>(const OpContext& ctx,
+                                   const NDArray& data,
+                                   const NDArray& weights,
+                                   const NDArray& out,
+                                   const size_t& data_n,
+                                   const int& minlength) {
   using namespace mxnet_op;
   BinNumberCount(data, minlength, out, data_n);
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   MSHADOW_TYPE_SWITCH(data.dtype(), DType, {
-      MSHADOW_TYPE_SWITCH(weights.dtype(), OType, {
-        size_t out_size = out.shape()[0];
-        Kernel<set_zero, cpu>::Launch(s, out_size, out.data().dptr<OType>());
-        BincountCpuWeights(data.data().dptr<DType>(), weights.data().dptr<OType>(),
-                          out.data().dptr<OType>(), data_n);
-      });
+    MSHADOW_TYPE_SWITCH(weights.dtype(), OType, {
+      size_t out_size = out.shape()[0];
+      Kernel<set_zero, cpu>::Launch(s, out_size, out.data().dptr<OType>());
+      BincountCpuWeights(data.data().dptr<DType>(),
+                         weights.data().dptr<OType>(),
+                         out.data().dptr<OType>(),
+                         data_n);
     });
+  });
 }
 
-template<>
-void NumpyBincountForwardImpl<cpu>(const OpContext &ctx,
-                                   const NDArray &data,
-                                   const NDArray &out,
-                                   const size_t &data_n,
-                                   const int &minlength) {
+template <>
+void NumpyBincountForwardImpl<cpu>(const OpContext& ctx,
+                                   const NDArray& data,
+                                   const NDArray& out,
+                                   const size_t& data_n,
+                                   const int& minlength) {
   using namespace mxnet_op;
   BinNumberCount(data, minlength, out, data_n);
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   MSHADOW_TYPE_SWITCH(data.dtype(), DType, {
-      MSHADOW_TYPE_SWITCH(out.dtype(), OType, {
-        size_t out_size = out.shape()[0];
-        Kernel<set_zero, cpu>::Launch(s, out_size, out.data().dptr<OType>());
-        BincountCpu(data.data().dptr<DType>(), out.data().dptr<OType>(), data_n);
-      });
+    MSHADOW_TYPE_SWITCH(out.dtype(), OType, {
+      size_t out_size = out.shape()[0];
+      Kernel<set_zero, cpu>::Launch(s, out_size, out.data().dptr<OType>());
+      BincountCpu(data.data().dptr<DType>(), out.data().dptr<OType>(), data_n);
     });
+  });
 }
 
 DMLC_REGISTER_PARAMETER(NumpyBincountParam);
 
 NNVM_REGISTER_OP(_npi_bincount)
-.set_attr_parser(ParamParser<NumpyBincountParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NumpyBincountParam& params =
-    nnvm::get<NumpyBincountParam>(attrs.parsed);
-  return params.has_weights? 2 : 1;
-  })
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyBincountParam& params =
-      nnvm::get<NumpyBincountParam>(attrs.parsed);
-    return params.has_weights ?
-           std::vector<std::string>{"data", "weights"} :
-           std::vector<std::string>{"data"};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<nnvm::FInferType>("FInferType", NumpyBincountType)
-.set_attr<FInferStorageType>("FInferStorageType", NumpyBincountStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", NumpyBincountForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Data")
-.add_argument("weights", "NDArray-or-Symbol", "Weights")
-.add_arguments(NumpyBincountParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyBincountParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyBincountParam& params = nnvm::get<NumpyBincountParam>(attrs.parsed);
+      return params.has_weights ? 2 : 1;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyBincountParam& params =
+                                           nnvm::get<NumpyBincountParam>(attrs.parsed);
+                                       return params.has_weights
+                                                  ? std::vector<std::string>{"data", "weights"}
+                                                  : std::vector<std::string>{"data"};
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInferType>("FInferType", NumpyBincountType)
+    .set_attr<FInferStorageType>("FInferStorageType", NumpyBincountStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", NumpyBincountForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Data")
+    .add_argument("weights", "NDArray-or-Symbol", "Weights")
+    .add_arguments(NumpyBincountParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_bincount_op.cu b/src/operator/numpy/np_bincount_op.cu
index ed1f90f00c16..27707a264a27 100644
--- a/src/operator/numpy/np_bincount_op.cu
+++ b/src/operator/numpy/np_bincount_op.cu
@@ -33,114 +33,127 @@ namespace mxnet {
 namespace op {
 
 struct BincountFusedKernel {
-  template<typename DType, typename OType>
+  template <typename DType, typename OType>
   static MSHADOW_XINLINE void Map(int i, const DType* data, OType* out) {
     int idx = data[i];
     atomicAdd(&out[idx], 1);
   }
 
-  template<typename DType, typename OType>
-  static MSHADOW_XINLINE void Map(int i, const DType* data, const OType* weights,
-                                  OType* out) {
+  template <typename DType, typename OType>
+  static MSHADOW_XINLINE void Map(int i, const DType* data, const OType* weights, OType* out) {
     int idx = data[i];
     atomicAdd(&out[idx], weights[i]);
   }
 };
 
 struct is_valid_check {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, char* invalid_ptr, const DType* data) {
-    if (data[i] < 0) *invalid_ptr = 1;
+    if (data[i] < 0)
+      *invalid_ptr = 1;
   }
 };
 
-template<typename DType>
-bool CheckInvalidInput(mshadow::Stream<gpu> *s, const DType *data, const size_t& data_size,
+template <typename DType>
+bool CheckInvalidInput(mshadow::Stream<gpu>* s,
+                       const DType* data,
+                       const size_t& data_size,
                        char* is_valid_ptr) {
   using namespace mxnet_op;
   int32_t is_valid = 0;
   Kernel<set_zero, gpu>::Launch(s, 1, is_valid_ptr);
   Kernel<is_valid_check, gpu>::Launch(s, data_size, is_valid_ptr, data);
-  CUDA_CALL(cudaMemcpyAsync(&is_valid, is_valid_ptr, sizeof(char),
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaMemcpyAsync(&is_valid,
+                            is_valid_ptr,
+                            sizeof(char),
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
   CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
   return is_valid == 0;
 }
 
-template<>
-void NumpyBincountForwardImpl<gpu>(const OpContext &ctx,
-                                   const NDArray &data,
-                                   const NDArray &weights,
-                                   const NDArray &out,
-                                   const size_t &data_n,
-                                   const int &minlength) {
+template <>
+void NumpyBincountForwardImpl<gpu>(const OpContext& ctx,
+                                   const NDArray& data,
+                                   const NDArray& weights,
+                                   const NDArray& out,
+                                   const size_t& data_n,
+                                   const int& minlength) {
   using namespace mxnet_op;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
 
   MXNET_NO_FLOAT16_TYPE_SWITCH(data.dtype(), DType, {
     DType* h_ptr;
     DType* d_ptr;
-    int bin = minlength;
-    d_ptr = data.data().dptr<DType>();
-    Tensor<gpu, 1, char> workspace = ctx.requested[0]
-            .get_space_typed<gpu, 1, char>(Shape1(1), s);
-    char* is_valid_ptr = reinterpret_cast<char*>(workspace.dptr_);
-    bool is_valid = CheckInvalidInput(s, d_ptr, data_n, is_valid_ptr);
-    CHECK(is_valid) << "Input should be nonnegative number";   // check invalid input
-
-    h_ptr = reinterpret_cast<DType*>(malloc(data_n*sizeof(DType)));
-    CUDA_CALL(cudaMemcpyAsync(h_ptr, d_ptr, data_n*sizeof(DType), cudaMemcpyDeviceToHost,
+    int bin                        = minlength;
+    d_ptr                          = data.data().dptr<DType>();
+    Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
+    char* is_valid_ptr             = reinterpret_cast<char*>(workspace.dptr_);
+    bool is_valid                  = CheckInvalidInput(s, d_ptr, data_n, is_valid_ptr);
+    CHECK(is_valid) << "Input should be nonnegative number";  // check invalid input
+
+    h_ptr = reinterpret_cast<DType*>(malloc(data_n * sizeof(DType)));
+    CUDA_CALL(cudaMemcpyAsync(h_ptr,
+                              d_ptr,
+                              data_n * sizeof(DType),
+                              cudaMemcpyDeviceToHost,
                               mshadow::Stream<gpu>::GetStream(s)));
     CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
     for (size_t i = 0; i < data_n; i++) {
-      if (h_ptr[i] + 1 > bin) bin = h_ptr[i] + 1;
+      if (h_ptr[i] + 1 > bin)
+        bin = h_ptr[i] + 1;
     }
     free(h_ptr);
     mxnet::TShape s(1, bin);
-    const_cast<NDArray &>(out).Init(s);  // set the output shape forcefully
+    const_cast<NDArray&>(out).Init(s);  // set the output shape forcefully
   });
 
   MSHADOW_TYPE_SWITCH(data.dtype(), DType, {
-      MSHADOW_TYPE_SWITCH(weights.dtype(), OType, {
-        size_t out_size = out.shape().Size();
-        Kernel<set_zero, gpu>::Launch(s, out_size, out.data().dptr<OType>());
-        Kernel<BincountFusedKernel, gpu>::Launch(
-          s, data_n, data.data().dptr<DType>(), weights.data().dptr<OType>(),
-          out.data().dptr<OType>());
-      });
+    MSHADOW_TYPE_SWITCH(weights.dtype(), OType, {
+      size_t out_size = out.shape().Size();
+      Kernel<set_zero, gpu>::Launch(s, out_size, out.data().dptr<OType>());
+      Kernel<BincountFusedKernel, gpu>::Launch(s,
+                                               data_n,
+                                               data.data().dptr<DType>(),
+                                               weights.data().dptr<OType>(),
+                                               out.data().dptr<OType>());
     });
+  });
 }
 
-template<>
-void NumpyBincountForwardImpl<gpu>(const OpContext &ctx,
-                                   const NDArray &data,
-                                   const NDArray &out,
-                                   const size_t &data_n,
-                                   const int &minlength) {
+template <>
+void NumpyBincountForwardImpl<gpu>(const OpContext& ctx,
+                                   const NDArray& data,
+                                   const NDArray& out,
+                                   const size_t& data_n,
+                                   const int& minlength) {
   using namespace mxnet_op;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
 
   MXNET_NO_FLOAT16_TYPE_SWITCH(data.dtype(), DType, {
     DType* h_ptr;
     DType* d_ptr;
-    int bin = minlength;
-    d_ptr = data.data().dptr<DType>();
-    Tensor<gpu, 1, char> workspace = ctx.requested[0]
-            .get_space_typed<gpu, 1, char>(Shape1(1), s);
-    char* is_valid_ptr = reinterpret_cast<char*>(workspace.dptr_);
-    bool is_valid = CheckInvalidInput(s, d_ptr, data_n, is_valid_ptr);
-    CHECK(is_valid) << "Input should be nonnegative number";   // check invalid input
-
-    h_ptr = reinterpret_cast<DType*>(malloc(data_n*sizeof(DType)));
-    CUDA_CALL(cudaMemcpyAsync(h_ptr, d_ptr, data_n*sizeof(DType), cudaMemcpyDeviceToHost,
+    int bin                        = minlength;
+    d_ptr                          = data.data().dptr<DType>();
+    Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
+    char* is_valid_ptr             = reinterpret_cast<char*>(workspace.dptr_);
+    bool is_valid                  = CheckInvalidInput(s, d_ptr, data_n, is_valid_ptr);
+    CHECK(is_valid) << "Input should be nonnegative number";  // check invalid input
+
+    h_ptr = reinterpret_cast<DType*>(malloc(data_n * sizeof(DType)));
+    CUDA_CALL(cudaMemcpyAsync(h_ptr,
+                              d_ptr,
+                              data_n * sizeof(DType),
+                              cudaMemcpyDeviceToHost,
                               mshadow::Stream<gpu>::GetStream(s)));
     CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
     for (size_t i = 0; i < data_n; i++) {
-      if (h_ptr[i] + 1 > bin) bin = h_ptr[i] + 1;
+      if (h_ptr[i] + 1 > bin)
+        bin = h_ptr[i] + 1;
     }
     free(h_ptr);
     mxnet::TShape s(1, bin);
-    const_cast<NDArray &>(out).Init(s);  // set the output shape forcefully
+    const_cast<NDArray&>(out).Init(s);  // set the output shape forcefully
   });
 
   MSHADOW_TYPE_SWITCH(data.dtype(), DType, {
@@ -148,13 +161,12 @@ void NumpyBincountForwardImpl<gpu>(const OpContext &ctx,
       size_t out_size = out.shape().Size();
       Kernel<set_zero, gpu>::Launch(s, out_size, out.data().dptr<OType>());
       Kernel<BincountFusedKernel, gpu>::Launch(
-        s, data_n, data.data().dptr<DType>(), out.data().dptr<OType>());
+          s, data_n, data.data().dptr<DType>(), out.data().dptr<OType>());
     });
   });
 }
 
-NNVM_REGISTER_OP(_npi_bincount)
-.set_attr<FComputeEx>("FComputeEx<gpu>", NumpyBincountForward<gpu>);
+NNVM_REGISTER_OP(_npi_bincount).set_attr<FComputeEx>("FComputeEx<gpu>", NumpyBincountForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_boolean_mask_assign.cc b/src/operator/numpy/np_boolean_mask_assign.cc
index defb901c55a6..3687a10ed749 100644
--- a/src/operator/numpy/np_boolean_mask_assign.cc
+++ b/src/operator/numpy/np_boolean_mask_assign.cc
@@ -28,12 +28,10 @@
 namespace mxnet {
 namespace op {
 
-template<bool scalar = false>
+template <bool scalar = false>
 struct BooleanAssignCPUKernel {
  private:
-  static size_t bin_search(const size_t* idx,
-                           const size_t idx_size,
-                           const size_t i) {
+  static size_t bin_search(const size_t* idx, const size_t idx_size, const size_t i) {
     size_t left = 0, right = idx_size, mid = (left + right) / 2;
     while (left != right) {
       if (idx[mid] == i + 1) {
@@ -42,28 +40,28 @@ struct BooleanAssignCPUKernel {
           break;
         } else if (idx[mid - 1] == i + 1) {
           right = mid;
-          mid = (left + right) / 2;
+          mid   = (left + right) / 2;
         }
       } else if (idx[mid] == i) {
         if (idx[mid + 1] == i + 1) {
           break;
         } else {
           left = mid;
-          mid = (left + right + 1) / 2;
+          mid  = (left + right + 1) / 2;
         }
       } else if (idx[mid] < i + 1) {
         left = mid;
-        mid = (left + right + 1) / 2;
+        mid  = (left + right + 1) / 2;
       } else if (idx[mid] > i + 1) {
         right = mid;
-        mid = (left + right) / 2;
+        mid   = (left + right) / 2;
       }
     }
     return mid;
   }
 
  public:
-  template<typename DType>
+  template <typename DType>
   static void Map(int i,
                   DType* data,
                   const size_t* idx,
@@ -82,7 +80,7 @@ struct BooleanAssignCPUKernel {
     }
   }
 
-  template<typename DType>
+  template <typename DType>
   static void Map(int i,
                   DType* data,
                   const size_t* idx,
@@ -102,9 +100,7 @@ struct BooleanAssignCPUKernel {
           data[(l * middle + mid) * trailing + t] = tensor[0];
         } else {
           data[(l * middle + mid) * trailing + t] =
-            (broadcast) ?
-            tensor[l * trailing + t] :
-            tensor[(l * valid_num + i) * trailing + t];
+              (broadcast) ? tensor[l * trailing + t] : tensor[(l * valid_num + i) * trailing + t];
         }
       }
     }
@@ -112,21 +108,21 @@ struct BooleanAssignCPUKernel {
 };
 
 bool BooleanAssignShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK(in_attrs->size() == 2U || in_attrs->size() == 3U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK(shape_is_known(in_attrs->at(0)) && shape_is_known(in_attrs->at(1)))
-    << "shape of both input and mask should be known";
+      << "shape of both input and mask should be known";
   const TShape& dshape = in_attrs->at(0);
   const TShape& mshape = in_attrs->at(1);
   const int start_axis = std::stoi(common::attr_value_string(attrs, "start_axis", "0"));
 
   for (int i = 0; i < mshape.ndim(); ++i) {
     CHECK_EQ(dshape[i + start_axis], mshape[i])
-      << "boolean index did not match indexed array along dimension " << i + start_axis
-      << "; dimension is " << dshape[i + start_axis] << " but corresponding boolean dimension is "
-      << mshape[i];
+        << "boolean index did not match indexed array along dimension " << i + start_axis
+        << "; dimension is " << dshape[i + start_axis] << " but corresponding boolean dimension is "
+        << mshape[i];
   }
 
   // check if output shape is the same as the input data
@@ -136,22 +132,21 @@ bool BooleanAssignShape(const nnvm::NodeAttrs& attrs,
   if (in_attrs->size() == 3U) {
     if (mshape.ndim() == dshape.ndim()) {
       CHECK_LE(in_attrs->at(2).ndim(), 1U)
-        << "boolean array indexing assignment requires a 0 or 1-dimensional input, input has "
-        << in_attrs->at(2).ndim() <<" dimensions";
+          << "boolean array indexing assignment requires a 0 or 1-dimensional input, input has "
+          << in_attrs->at(2).ndim() << " dimensions";
     } else {
       const TShape& vshape = in_attrs->at(2);
       if (vshape.Size() > 1) {
         for (int i = 0; i < start_axis; ++i) {
           CHECK_EQ(dshape[i], vshape[i])
-            << "shape mismatch of value with input at dimension " << i
-            << "; dimension is " << dshape[i] << " but corresponding value dimension is "
-            << vshape[i];
+              << "shape mismatch of value with input at dimension " << i << "; dimension is "
+              << dshape[i] << " but corresponding value dimension is " << vshape[i];
         }
         for (int i = 1; i <= (dshape.ndim() - start_axis - mshape.ndim()); ++i) {
           CHECK_EQ(dshape[dshape.ndim() - i], vshape[vshape.ndim() - i])
-            << "shape mismatch of value with input at dimension " << (dshape.ndim() - i)
-            << "; dimension is " << dshape[dshape.ndim() - i]
-            << " but corresponding value dimension is " << vshape[vshape.ndim() - 1];
+              << "shape mismatch of value with input at dimension " << (dshape.ndim() - i)
+              << "; dimension is " << dshape[dshape.ndim() - i]
+              << " but corresponding value dimension is " << vshape[vshape.ndim() - 1];
         }
       }
     }
@@ -161,8 +156,8 @@ bool BooleanAssignShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool BooleanAssignType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                       std::vector<int>* in_attrs,
+                       std::vector<int>* out_attrs) {
   CHECK(in_attrs->size() == 2U || in_attrs->size() == 3U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -181,7 +176,7 @@ bool BooleanAssignType(const nnvm::NodeAttrs& attrs,
 }
 
 // calculate the number of valid (masked) values, also completing the prefix_sum vector
-template<typename DType>
+template <typename DType>
 size_t GetValidNumCPU(const DType* idx, size_t* prefix_sum, const size_t idx_size) {
   prefix_sum[0] = 0;
   for (size_t i = 0; i < idx_size; i++) {
@@ -191,23 +186,22 @@ size_t GetValidNumCPU(const DType* idx, size_t* prefix_sum, const size_t idx_siz
 }
 
 void NumpyBooleanAssignForwardCPU(const nnvm::NodeAttrs& attrs,
-                                  const OpContext &ctx,
-                                  const std::vector<TBlob> &inputs,
-                                  const std::vector<OpReqType> &req,
-                                  const std::vector<TBlob> &outputs) {
+                                  const OpContext& ctx,
+                                  const std::vector<TBlob>& inputs,
+                                  const std::vector<OpReqType>& req,
+                                  const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
   CHECK(inputs.size() == 2U || inputs.size() == 3U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  CHECK_EQ(req[0], kWriteInplace)
-    << "Only WriteInplace is supported for npi_boolean_assign";
+  CHECK_EQ(req[0], kWriteInplace) << "Only WriteInplace is supported for npi_boolean_assign";
 
   Stream<cpu>* s = ctx.get_stream<cpu>();
 
-  const TBlob& data = inputs[0];
+  const TBlob& data    = inputs[0];
   const TShape& dshape = data.shape_;
-  const TBlob& mask = inputs[1];
+  const TBlob& mask    = inputs[1];
   const TShape& mshape = mask.shape_;
   const int start_axis = std::stoi(common::attr_value_string(attrs, "start_axis", "0"));
   // Get valid_num
@@ -218,7 +212,8 @@ void NumpyBooleanAssignForwardCPU(const nnvm::NodeAttrs& attrs,
     valid_num = GetValidNumCPU(mask.dptr<MType>(), prefix_sum.data(), mask_size);
   });
   // If there's no True in mask, return directly
-  if (valid_num == 0) return;
+  if (valid_num == 0)
+    return;
 
   if (inputs.size() == 3U) {
     // tensor case
@@ -231,15 +226,15 @@ void NumpyBooleanAssignForwardCPU(const nnvm::NodeAttrs& attrs,
       if ((vndim == (dndim - mndim + 1)) && (vshape[start_axis] != 1)) {
         // tensor case, check tensor size equal to or broadcastable with valid_num
         CHECK_EQ(static_cast<size_t>(valid_num), vshape[start_axis])
-          << "boolean array indexing assignment cannot assign " << vshape
-          << " input values to the " << valid_num << " output values where the mask is true"
-          << std::endl;
+            << "boolean array indexing assignment cannot assign " << vshape
+            << " input values to the " << valid_num << " output values where the mask is true"
+            << std::endl;
       }
     }
   }
 
-  size_t leading = 1U;
-  size_t middle = mask_size;
+  size_t leading  = 1U;
+  size_t middle   = mask_size;
   size_t trailing = 1U;
 
   for (int i = 0; i < dshape.ndim(); ++i) {
@@ -256,16 +251,31 @@ void NumpyBooleanAssignForwardCPU(const nnvm::NodeAttrs& attrs,
     const TShape& vshape = inputs.at(2).shape_;
     MSHADOW_TYPE_SWITCH_WITH_BOOL(data.type_flag_, DType, {
       if (inputs[2].shape_.Size() == 1) {
-        Kernel<BooleanAssignCPUKernel<true>, cpu>::Launch(
-          s, valid_num, data.dptr<DType>(), prefix_sum.data(), prefix_sum.size(),
-          leading, middle, valid_num, trailing, inputs[2].dptr<DType>());
+        Kernel<BooleanAssignCPUKernel<true>, cpu>::Launch(s,
+                                                          valid_num,
+                                                          data.dptr<DType>(),
+                                                          prefix_sum.data(),
+                                                          prefix_sum.size(),
+                                                          leading,
+                                                          middle,
+                                                          valid_num,
+                                                          trailing,
+                                                          inputs[2].dptr<DType>());
       } else {
-        bool need_broadcast = (vshape.ndim() == (dshape.ndim() - mshape.ndim() + 1)) ?
-                              (vshape[start_axis] == 1) :
-                              true;
-        Kernel<BooleanAssignCPUKernel<false>, cpu>::Launch(
-          s, valid_num, data.dptr<DType>(), prefix_sum.data(), prefix_sum.size(),
-          leading, middle, valid_num, trailing, inputs[2].dptr<DType>(), need_broadcast);
+        bool need_broadcast = (vshape.ndim() == (dshape.ndim() - mshape.ndim() + 1))
+                                  ? (vshape[start_axis] == 1)
+                                  : true;
+        Kernel<BooleanAssignCPUKernel<false>, cpu>::Launch(s,
+                                                           valid_num,
+                                                           data.dptr<DType>(),
+                                                           prefix_sum.data(),
+                                                           prefix_sum.size(),
+                                                           leading,
+                                                           middle,
+                                                           valid_num,
+                                                           trailing,
+                                                           inputs[2].dptr<DType>(),
+                                                           need_broadcast);
       }
     });
   } else {
@@ -273,61 +283,68 @@ void NumpyBooleanAssignForwardCPU(const nnvm::NodeAttrs& attrs,
     CHECK(attrs.dict.find("value") != attrs.dict.end()) << "value needs be provided";
     MSHADOW_TYPE_SWITCH_WITH_BOOL(data.type_flag_, DType, {
       Kernel<BooleanAssignCPUKernel<true>, cpu>::Launch(
-        s, valid_num, data.dptr<DType>(), prefix_sum.data(), prefix_sum.size(),
-        leading, middle, trailing, static_cast<DType>(std::stod(attrs.dict.at("value"))));
+          s,
+          valid_num,
+          data.dptr<DType>(),
+          prefix_sum.data(),
+          prefix_sum.size(),
+          leading,
+          middle,
+          trailing,
+          static_cast<DType>(std::stod(attrs.dict.at("value"))));
     });
   }
 }
 
 NNVM_REGISTER_OP(_npi_boolean_mask_assign_scalar)
-.describe(R"code(Scalar version of boolean assign)code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "mask"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BooleanAssignShape)
-.set_attr<nnvm::FInferType>("FInferType", BooleanAssignType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyBooleanAssignForwardCPU)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "input")
-.add_argument("mask", "NDArray-or-Symbol", "mask")
-.add_argument("value", "float", "value to be assigned to masked positions")
-.add_argument("start_axis", "int", "starting axis of boolean mask");
+    .describe(R"code(Scalar version of boolean assign)code" ADD_FILELINE)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "mask"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BooleanAssignShape)
+    .set_attr<nnvm::FInferType>("FInferType", BooleanAssignType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyBooleanAssignForwardCPU)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "input")
+    .add_argument("mask", "NDArray-or-Symbol", "mask")
+    .add_argument("value", "float", "value to be assigned to masked positions")
+    .add_argument("start_axis", "int", "starting axis of boolean mask");
 
 NNVM_REGISTER_OP(_npi_boolean_mask_assign_tensor)
-.describe(R"code(Tensor version of boolean assign)code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "mask", "value"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BooleanAssignShape)
-.set_attr<nnvm::FInferType>("FInferType", BooleanAssignType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyBooleanAssignForwardCPU)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "input")
-.add_argument("mask", "NDArray-or-Symbol", "mask")
-.add_argument("value", "NDArray-or-Symbol", "assignment")
-.add_argument("start_axis", "int", "starting axis of boolean mask");
+    .describe(R"code(Tensor version of boolean assign)code" ADD_FILELINE)
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "mask", "value"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BooleanAssignShape)
+    .set_attr<nnvm::FInferType>("FInferType", BooleanAssignType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyBooleanAssignForwardCPU)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "input")
+    .add_argument("mask", "NDArray-or-Symbol", "mask")
+    .add_argument("value", "NDArray-or-Symbol", "assignment")
+    .add_argument("start_axis", "int", "starting axis of boolean mask");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_boolean_mask_assign.cu b/src/operator/numpy/np_boolean_mask_assign.cu
index e1e645268565..10f8612a3ffb 100644
--- a/src/operator/numpy/np_boolean_mask_assign.cu
+++ b/src/operator/numpy/np_boolean_mask_assign.cu
@@ -29,12 +29,10 @@
 namespace mxnet {
 namespace op {
 
-template<bool scalar>
+template <bool scalar>
 struct BooleanAssignGPUKernel {
  private:
-  static size_t __device__ bin_search(const size_t* idx,
-                                      const size_t idx_size,
-                                      const size_t i) {
+  static size_t __device__ bin_search(const size_t* idx, const size_t idx_size, const size_t i) {
     size_t left = 0, right = idx_size, mid = (left + right) / 2;
     while (left != right) {
       if (idx[mid] == i + 1) {
@@ -43,28 +41,28 @@ struct BooleanAssignGPUKernel {
           break;
         } else if (idx[mid - 1] == i + 1) {
           right = mid;
-          mid = (left + right) / 2;
+          mid   = (left + right) / 2;
         }
       } else if (idx[mid] == i) {
         if (idx[mid + 1] == i + 1) {
           break;
         } else {
           left = mid;
-          mid = (left + right + 1) / 2;
+          mid  = (left + right + 1) / 2;
         }
       } else if (idx[mid] < i + 1) {
         left = mid;
-        mid = (left + right + 1) / 2;
+        mid  = (left + right + 1) / 2;
       } else if (idx[mid] > i + 1) {
         right = mid;
-        mid = (left + right) / 2;
+        mid   = (left + right) / 2;
       }
     }
     return mid;
   }
 
  public:
-  template<typename DType>
+  template <typename DType>
   static void __device__ Map(int i,
                              DType* data,
                              const size_t* idx,
@@ -75,8 +73,8 @@ struct BooleanAssignGPUKernel {
                              const size_t trailing,
                              const DType val) {
     // binary search for the turning point
-    size_t m = i / trailing % valid_num;
-    size_t l = i / trailing / valid_num;
+    size_t m   = i / trailing % valid_num;
+    size_t l   = i / trailing / valid_num;
     size_t mid = bin_search(idx, idx_size, m);
     // final answer is in mid
     // i = l * valid_num * trailing + m * trailing + t
@@ -84,7 +82,7 @@ struct BooleanAssignGPUKernel {
     data[i + (l * (middle - valid_num) + (mid - m)) * trailing] = val;
   }
 
-  template<typename DType>
+  template <typename DType>
   static void __device__ Map(int i,
                              DType* data,
                              const size_t* idx,
@@ -96,8 +94,8 @@ struct BooleanAssignGPUKernel {
                              DType* tensor,
                              const bool broadcast = false) {
     // binary search for the turning point
-    size_t m = i / trailing % valid_num;
-    size_t l = i / trailing / valid_num;
+    size_t m   = i / trailing % valid_num;
+    size_t l   = i / trailing / valid_num;
     size_t mid = bin_search(idx, idx_size, m);
     size_t dst = i + (l * (middle - valid_num) + (mid - m)) * trailing;
     // final answer is in mid
@@ -110,37 +108,33 @@ struct BooleanAssignGPUKernel {
 };
 
 struct NonZeroWithCast {
-  template<typename OType, typename IType>
+  template <typename OType, typename IType>
   static void __device__ Map(int i, OType* out, const IType* in) {
     out[i] = (in[i]) ? OType(1) : OType(0);
   }
 };
 
 // completing the prefix_sum vector and return the pointer to it
-template<typename DType>
-size_t* GetValidNumGPU(const OpContext &ctx, const DType *idx, const size_t idx_size) {
+template <typename DType>
+size_t* GetValidNumGPU(const OpContext& ctx, const DType* idx, const size_t idx_size) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace mshadow_op;
-  size_t* prefix_sum = nullptr;
-  void* d_temp_storage = nullptr;
+  size_t* prefix_sum        = nullptr;
+  void* d_temp_storage      = nullptr;
   size_t temp_storage_bytes = 0;
-  Stream<gpu>* s = ctx.get_stream<gpu>();
-  cudaStream_t stream = Stream<gpu>::GetStream(s);
+  Stream<gpu>* s            = ctx.get_stream<gpu>();
+  cudaStream_t stream       = Stream<gpu>::GetStream(s);
 
   // Calculate total temporary memory size
-  cub::DeviceScan::ExclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                idx_size + 1,
-                                stream);
+  cub::DeviceScan::ExclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size + 1, stream);
   size_t buffer_size = (idx_size + 1) * sizeof(size_t);
   temp_storage_bytes += buffer_size;
   // Allocate memory on GPU and allocate pointer
   Tensor<gpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
-  prefix_sum = reinterpret_cast<size_t*>(workspace.dptr_);
+      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
+  prefix_sum     = reinterpret_cast<size_t*>(workspace.dptr_);
   d_temp_storage = workspace.dptr_ + buffer_size;
 
   // Robustly set the bool values in mask
@@ -153,53 +147,49 @@ size_t* GetValidNumGPU(const OpContext &ctx, const DType *idx, const size_t idx_
   }
 
   // Calculate prefix sum
-  cub::DeviceScan::ExclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                idx_size + 1,
-                                stream);
+  cub::DeviceScan::ExclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size + 1, stream);
 
   return prefix_sum;
 }
 
 void NumpyBooleanAssignForwardGPU(const nnvm::NodeAttrs& attrs,
-                                  const OpContext &ctx,
-                                  const std::vector<TBlob> &inputs,
-                                  const std::vector<OpReqType> &req,
-                                  const std::vector<TBlob> &outputs) {
+                                  const OpContext& ctx,
+                                  const std::vector<TBlob>& inputs,
+                                  const std::vector<OpReqType>& req,
+                                  const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
   CHECK(inputs.size() == 2U || inputs.size() == 3U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  CHECK_EQ(req[0], kWriteInplace)
-    << "Only WriteInplace is supported for npi_boolean_assign";
+  CHECK_EQ(req[0], kWriteInplace) << "Only WriteInplace is supported for npi_boolean_assign";
 
   Stream<gpu>* s = ctx.get_stream<gpu>();
 
-  const TBlob& data = inputs[0];
+  const TBlob& data    = inputs[0];
   const TShape& dshape = data.shape_;
-  const TBlob& mask = inputs[1];
+  const TBlob& mask    = inputs[1];
   const TShape& mshape = mask.shape_;
   const int start_axis = std::stoi(common::attr_value_string(attrs, "start_axis", "0"));
 
   // Get valid_num
-  size_t mask_size = mask.shape_.Size();
-  size_t valid_num = 0;
+  size_t mask_size   = mask.shape_.Size();
+  size_t valid_num   = 0;
   size_t* prefix_sum = nullptr;
   if (mask_size != 0) {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(mask.type_flag_, MType, {
       prefix_sum = GetValidNumGPU<MType>(ctx, mask.dptr<MType>(), mask_size);
     });
     cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-    CUDA_CALL(cudaMemcpyAsync(&valid_num, &prefix_sum[mask_size], sizeof(size_t),
-                              cudaMemcpyDeviceToHost, stream));
+    CUDA_CALL(cudaMemcpyAsync(
+        &valid_num, &prefix_sum[mask_size], sizeof(size_t), cudaMemcpyDeviceToHost, stream));
     CUDA_CALL(cudaStreamSynchronize(stream));
   }
 
   // If there's no True in mask, return directly
-  if (valid_num == 0) return;
+  if (valid_num == 0)
+    return;
 
   const TShape& vshape = inputs[2].shape_;
 
@@ -213,15 +203,15 @@ void NumpyBooleanAssignForwardGPU(const nnvm::NodeAttrs& attrs,
       if ((vndim == (dndim - mndim + 1)) && (vshape[start_axis] != 1)) {
         // tensor case, check tensor size equal to or broadcastable with valid_num
         CHECK_EQ(static_cast<size_t>(valid_num), vshape[start_axis])
-          << "boolean array indexing assignment cannot assign " << vshape
-          << " input values to the " << valid_num << " output values where the mask is true"
-          << std::endl;
+            << "boolean array indexing assignment cannot assign " << vshape
+            << " input values to the " << valid_num << " output values where the mask is true"
+            << std::endl;
       }
     }
   }
 
-  size_t leading = 1U;
-  size_t middle = mask_size;
+  size_t leading  = 1U;
+  size_t middle   = mask_size;
   size_t trailing = 1U;
 
   for (int i = 0; i < dshape.ndim(); ++i) {
@@ -236,36 +226,57 @@ void NumpyBooleanAssignForwardGPU(const nnvm::NodeAttrs& attrs,
   if (inputs.size() == 3U) {
     if (inputs[2].shape_.Size() == 1) {
       MSHADOW_TYPE_SWITCH_WITH_BOOL(data.type_flag_, DType, {
-        Kernel<BooleanAssignGPUKernel<true>, gpu>::Launch(
-          s, leading * valid_num * trailing, data.dptr<DType>(), prefix_sum, mask_size + 1,
-          leading, middle, valid_num, trailing, inputs[2].dptr<DType>());
+        Kernel<BooleanAssignGPUKernel<true>, gpu>::Launch(s,
+                                                          leading * valid_num * trailing,
+                                                          data.dptr<DType>(),
+                                                          prefix_sum,
+                                                          mask_size + 1,
+                                                          leading,
+                                                          middle,
+                                                          valid_num,
+                                                          trailing,
+                                                          inputs[2].dptr<DType>());
       });
     } else {
-      bool need_broadcast = (vshape.ndim() == (dshape.ndim() - mshape.ndim() + 1)) ?
-                            (vshape[start_axis] == 1) :
-                            true;
+      bool need_broadcast =
+          (vshape.ndim() == (dshape.ndim() - mshape.ndim() + 1)) ? (vshape[start_axis] == 1) : true;
       MSHADOW_TYPE_SWITCH_WITH_BOOL(data.type_flag_, DType, {
-        Kernel<BooleanAssignGPUKernel<false>, gpu>::Launch(
-          s, leading * valid_num * trailing, data.dptr<DType>(), prefix_sum, mask_size + 1,
-          leading, middle, valid_num, trailing, inputs[2].dptr<DType>(), need_broadcast);
+        Kernel<BooleanAssignGPUKernel<false>, gpu>::Launch(s,
+                                                           leading * valid_num * trailing,
+                                                           data.dptr<DType>(),
+                                                           prefix_sum,
+                                                           mask_size + 1,
+                                                           leading,
+                                                           middle,
+                                                           valid_num,
+                                                           trailing,
+                                                           inputs[2].dptr<DType>(),
+                                                           need_broadcast);
       });
     }
   } else {
     CHECK(attrs.dict.find("value") != attrs.dict.end()) << "value is not provided";
     double value = std::stod(attrs.dict.at("value"));
     MSHADOW_TYPE_SWITCH_WITH_BOOL(data.type_flag_, DType, {
-      Kernel<BooleanAssignGPUKernel<true>, gpu>::Launch(
-        s, leading * valid_num * trailing, data.dptr<DType>(), prefix_sum, mask_size + 1,
-        leading, middle, valid_num, trailing, static_cast<DType>(value));
+      Kernel<BooleanAssignGPUKernel<true>, gpu>::Launch(s,
+                                                        leading * valid_num * trailing,
+                                                        data.dptr<DType>(),
+                                                        prefix_sum,
+                                                        mask_size + 1,
+                                                        leading,
+                                                        middle,
+                                                        valid_num,
+                                                        trailing,
+                                                        static_cast<DType>(value));
     });
   }
 }
 
 NNVM_REGISTER_OP(_npi_boolean_mask_assign_scalar)
-.set_attr<FCompute>("FCompute<gpu>", NumpyBooleanAssignForwardGPU);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyBooleanAssignForwardGPU);
 
 NNVM_REGISTER_OP(_npi_boolean_mask_assign_tensor)
-.set_attr<FCompute>("FCompute<gpu>", NumpyBooleanAssignForwardGPU);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyBooleanAssignForwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_broadcast_reduce_op.cc b/src/operator/numpy/np_broadcast_reduce_op.cc
index 4b64a1a29169..497cd2a7b289 100644
--- a/src/operator/numpy/np_broadcast_reduce_op.cc
+++ b/src/operator/numpy/np_broadcast_reduce_op.cc
@@ -31,33 +31,35 @@ namespace op {
 #if MXNET_USE_CUDA
 
 void NumpyArgMinMaxRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                                          const OpContext& ctx,
+                                          const std::vector<TBlob>& inputs,
+                                          const std::vector<OpReqType>& req,
+                                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   // parse param
-  const auto& param = nnvm::get<ReduceAxisParam>(attrs.parsed);
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  TBlob out = outputs[0];
-  TBlob in = inputs[0];
+  const auto& param       = nnvm::get<ReduceAxisParam>(attrs.parsed);
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  TBlob out               = outputs[0];
+  TBlob in                = inputs[0];
   // do some shape checks
   if (in.shape_.ndim() != 0) {
     if (param.axis.has_value()) {
       // cannot do argmax in an empty dimension
       int axis = param.axis.value();
-      axis = CheckAxis(axis, in.shape_.ndim());
+      axis     = CheckAxis(axis, in.shape_.ndim());
       CHECK_NE(in.shape_[axis], 0)
-          << "searching input tensor of shape " << inputs[0].shape_
-          << " along axis = " << axis << " of zero dim-size is not allowed";
+          << "searching input tensor of shape " << inputs[0].shape_ << " along axis = " << axis
+          << " of zero dim-size is not allowed";
     } else {
       // cannot do argmax on an empty array
       CHECK_NE(in.shape_.Size(), 0U) << "attempt to search an empty sequence";
     }
   }
-  if (in.shape_.Size() == 0U) return;  // zero-size tensor
+  if (in.shape_.Size() == 0U)
+    return;  // zero-size tensor
   // prepare shape
   dmlc::optional<mxnet::Tuple<int>> axes;
   if (param.axis.has_value()) {
@@ -72,10 +74,17 @@ void NumpyArgMinMaxRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
   // request a work space
   size_t workspace_size = broadcast::ReduceWorkspaceSize(s, dst_shape, req[0], src_shape);
   Tensor<gpu, 1, char> workspace =
-            ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
   BROADCAST_NDIM_SWITCH(dst_shape.ndim(), NDim, {
-      broadcast::RTCReduce(ctx, outputs[0].reshape(dst_shape), req[0], workspace, in_data,
-                           reducer, NDim, "identity", true);
+    broadcast::RTCReduce(ctx,
+                         outputs[0].reshape(dst_shape),
+                         req[0],
+                         workspace,
+                         in_data,
+                         reducer,
+                         NDim,
+                         "identity",
+                         true);
   });
 }
 
diff --git a/src/operator/numpy/np_broadcast_reduce_op.h b/src/operator/numpy/np_broadcast_reduce_op.h
index 9ce3967f4797..4ab5f0708f1a 100644
--- a/src/operator/numpy/np_broadcast_reduce_op.h
+++ b/src/operator/numpy/np_broadcast_reduce_op.h
@@ -44,29 +44,32 @@ struct NumpyReduceAxesParam : public dmlc::Parameter<NumpyReduceAxesParam> {
   dmlc::optional<double> initial;
   DMLC_DECLARE_PARAMETER(NumpyReduceAxesParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("Axis or axes along which a sum is performed. The default, axis=None, will sum "
-                "all of the elements of the input array. If axis is negative it counts from the "
-                "last to the first axis.");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Axis or axes along which a sum is performed. The default, axis=None, will sum "
+            "all of the elements of the input array. If axis is negative it counts from the "
+            "last to the first axis.");
     DMLC_DECLARE_FIELD(dtype)
-      .add_enum("float16", mshadow::kFloat16)
-      .add_enum("float32", mshadow::kFloat32)
-      .add_enum("float64", mshadow::kFloat64)
-      .add_enum("int8", mshadow::kInt8)
-      .add_enum("int32", mshadow::kInt32)
-      .add_enum("int64", mshadow::kInt64)
-      .add_enum("bool", mshadow::kBool)
-      .set_default(dmlc::optional<int>())
-      .describe("The type of the returned array and of the accumulator in which the elements are "
-                "summed. The dtype of a is used by default unless a has an integer dtype of less "
-                "precision than the default platform integer. In that case, if a is signed then "
-                "the platform integer is used while if a is unsigned then an unsigned integer of "
-                "the same precision as the platform integer is used.");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axes are left "
-                "in the result as dimension with size one.");
-    DMLC_DECLARE_FIELD(initial).set_default(dmlc::optional<double>())
-      .describe("Starting value for the sum.");
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("int8", mshadow::kInt8)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int64", mshadow::kInt64)
+        .add_enum("bool", mshadow::kBool)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "The type of the returned array and of the accumulator in which the elements are "
+            "summed. The dtype of a is used by default unless a has an integer dtype of less "
+            "precision than the default platform integer. In that case, if a is signed then "
+            "the platform integer is used while if a is unsigned then an unsigned integer of "
+            "the same precision as the platform integer is used.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axes are left "
+        "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(initial)
+        .set_default(dmlc::optional<double>())
+        .describe("Starting value for the sum.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -82,7 +85,7 @@ struct NumpyReduceAxesParam : public dmlc::Parameter<NumpyReduceAxesParam> {
       (*dict)["dtype"] = dtype_s.str();
     }
     (*dict)["keepdims"] = keepdims_s.str();
-    (*dict)["initial"] = initial_s.str();
+    (*dict)["initial"]  = initial_s.str();
   }
 };
 
@@ -92,24 +95,26 @@ struct NumpyReduceAxesNoDTypeParam : public dmlc::Parameter<NumpyReduceAxesNoDTy
   dmlc::optional<double> initial;
   DMLC_DECLARE_PARAMETER(NumpyReduceAxesNoDTypeParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("Axis or axes along which a sum is performed. The default, axis=None, will sum "
-                "all of the elements of the input array. If axis is negative it counts from the "
-                "last to the first axis.");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axes are left "
-                "in the result as dimension with size one.");
-    DMLC_DECLARE_FIELD(initial).set_default(dmlc::optional<double>())
-      .describe("Starting value for the sum.");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Axis or axes along which a sum is performed. The default, axis=None, will sum "
+            "all of the elements of the input array. If axis is negative it counts from the "
+            "last to the first axis.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axes are left "
+        "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(initial)
+        .set_default(dmlc::optional<double>())
+        .describe("Starting value for the sum.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, keepdims_s, initial_s;
     axis_s << axis;
     keepdims_s << keepdims;
     initial_s << initial;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]     = axis_s.str();
     (*dict)["keepdims"] = keepdims_s.str();
-    (*dict)["initial"] = initial_s.str();
+    (*dict)["initial"]  = initial_s.str();
   }
 };
 
@@ -118,19 +123,20 @@ struct NumpyReduceAxesBoolParam : public dmlc::Parameter<NumpyReduceAxesBoolPara
   bool keepdims;
   DMLC_DECLARE_PARAMETER(NumpyReduceAxesBoolParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("Axis or axes along which a sum is performed. The default, axis=None, will sum "
-                "all of the elements of the input array. If axis is negative it counts from the "
-                "last to the first axis.");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axes are left "
-                "in the result as dimension with size one.");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Axis or axes along which a sum is performed. The default, axis=None, will sum "
+            "all of the elements of the input array. If axis is negative it counts from the "
+            "last to the first axis.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axes are left "
+        "in the result as dimension with size one.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, keepdims_s;
     axis_s << axis;
     keepdims_s << keepdims;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]     = axis_s.str();
     (*dict)["keepdims"] = keepdims_s.str();
   }
 };
@@ -174,16 +180,12 @@ inline TShape NumpyReduceAxesShapeImpl(const TShape& ishape,
   std::sort(axes.begin(), axes.end());
 
   for (index_t i = 1; i < axes.ndim(); i++) {
-    CHECK_LT(axes[i-1], axes[i])
-        << "Reduction axes have duplicates "
-        << axes;
+    CHECK_LT(axes[i - 1], axes[i]) << "Reduction axes have duplicates " << axes;
   }
-  CHECK_LT(axes[axes.ndim()-1], ishape.ndim())
-      << "Reduction axis " << axes[axes.ndim()-1]
-      << " Exceeds input dimensions " << ishape;
-  CHECK_GE(axes[0], 0)
-      << "Reduction axis " << axis.value()
-      << " Exceeds input dimensions " << ishape;
+  CHECK_LT(axes[axes.ndim() - 1], ishape.ndim())
+      << "Reduction axis " << axes[axes.ndim() - 1] << " Exceeds input dimensions " << ishape;
+  CHECK_GE(axes[0], 0) << "Reduction axis " << axis.value() << " Exceeds input dimensions "
+                       << ishape;
 
   TShape oshape;
   if (keepdims) {
@@ -209,36 +211,36 @@ inline TShape NumpyReduceAxesShapeImpl(const TShape& ishape,
 }
 
 inline bool NumpyReduceAxesShape(const nnvm::NodeAttrs& attrs,
-                                 std::vector<TShape> *in_attrs,
-                                 std::vector<TShape> *out_attrs) {
+                                 std::vector<TShape>* in_attrs,
+                                 std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   if (!shape_is_known(in_attrs->at(0))) {
     return false;
   }
   const NumpyReduceAxesParam& param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims));
+  SHAPE_ASSIGN_CHECK(
+      *out_attrs, 0, NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims));
   return shape_is_known(out_attrs->at(0));
 }
 
 inline bool NumpyReduceAxesBoolShape(const nnvm::NodeAttrs& attrs,
-                                     std::vector<TShape> *in_attrs,
-                                     std::vector<TShape> *out_attrs) {
+                                     std::vector<TShape>* in_attrs,
+                                     std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   if (!shape_is_known(in_attrs->at(0))) {
     return false;
   }
   const NumpyReduceAxesBoolParam& param = nnvm::get<NumpyReduceAxesBoolParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims));
+  SHAPE_ASSIGN_CHECK(
+      *out_attrs, 0, NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims));
   return shape_is_known(out_attrs->at(0));
 }
 
 inline bool NumpyReduceAxesNoDTypeShape(const nnvm::NodeAttrs& attrs,
-                                        std::vector<TShape> *in_attrs,
-                                        std::vector<TShape> *out_attrs) {
+                                        std::vector<TShape>* in_attrs,
+                                        std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   if (!shape_is_known(in_attrs->at(0))) {
@@ -247,7 +249,7 @@ inline bool NumpyReduceAxesNoDTypeShape(const nnvm::NodeAttrs& attrs,
   const NumpyReduceAxesNoDTypeParam& param = nnvm::get<NumpyReduceAxesNoDTypeParam>(attrs.parsed);
   // check the case where the reduction axis should not be zero
   bool is_all_reducded_axes_not_zero = true;
-  const TShape& ishape = (*in_attrs)[0];
+  const TShape& ishape               = (*in_attrs)[0];
   if (param.axis.has_value()) {
     const mxnet::Tuple<int>& axes = param.axis.value();
     for (int i = 0; i < axes.ndim(); ++i) {
@@ -263,13 +265,13 @@ inline bool NumpyReduceAxesNoDTypeShape(const nnvm::NodeAttrs& attrs,
     }
   }
   CHECK(is_all_reducded_axes_not_zero)
-    << "zero-size array to reduction operation maximum which has no identity";
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims));
+      << "zero-size array to reduction operation maximum which has no identity";
+  SHAPE_ASSIGN_CHECK(
+      *out_attrs, 0, NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims));
   return shape_is_known(out_attrs->at(0));
 }
 
-template<bool safe_acc_hint = false>
+template <bool safe_acc_hint = false>
 inline bool NeedSafeAcc(int itype, int otype) {
   bool rule = (itype != otype) || (itype != mshadow::kFloat32 && itype != mshadow::kFloat64);
   return safe_acc_hint && rule;
@@ -277,59 +279,63 @@ inline bool NeedSafeAcc(int itype, int otype) {
 
 namespace mxnet_op {
 struct set_to_nan {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out) {
     out[i] = DType(nanf(""));
   }
 };
 
 }  // namespace mxnet_op
 
-void TVMOpReduce(const OpContext& ctx, const TBlob& input,
+void TVMOpReduce(const OpContext& ctx,
+                 const TBlob& input,
                  const dmlc::optional<mxnet::Tuple<int>>& axis,
-                 const TBlob& output, const OpReqType req, const std::string& reducer_name);
-
-template<typename xpu, typename reducer, bool safe_acc_hint = false, bool normalize = false,
-         typename OP = op::mshadow_op::identity>
+                 const TBlob& output,
+                 const OpReqType req,
+                 const std::string& reducer_name);
+
+template <typename xpu,
+          typename reducer,
+          bool safe_acc_hint = false,
+          bool normalize     = false,
+          typename OP        = op::mshadow_op::identity>
 void NumpyReduceAxesCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   const auto& param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
   if (param.initial.has_value()) {
     LOG(FATAL) << "initial is not supported yet";
   }
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  if (outputs[0].shape_.Size() == 0) return;
+  if (outputs[0].shape_.Size() == 0)
+    return;
   if (inputs[0].shape_.Size() == 0 && outputs[0].shape_.Size() != 0) {
     using namespace mxnet_op;
     if (normalize) {
       LOG(WARNING) << "WARNING: Mean of empty slice.";
       if (mxnet::common::is_float(outputs[0].type_flag_)) {
         MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-          Kernel<set_to_nan, xpu>::Launch(s, outputs[0].shape_.Size(),
-                                          outputs[0].dptr<DType>());
+          Kernel<set_to_nan, xpu>::Launch(s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
         });
       } else {
-        LOG(WARNING) << "WARNING: nan is outside the range of"<<
-                        "representable values of type 'int'";
+        LOG(WARNING) << "WARNING: nan is outside the range of"
+                     << "representable values of type 'int'";
         MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-          Kernel<set_zero, xpu>::Launch(s, outputs[0].shape_.Size(),
-                                        outputs[0].dptr<DType>());
+          Kernel<set_zero, xpu>::Launch(s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
         });
       }
     } else if (std::is_same<reducer, mshadow_op::sum>::value) {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        Kernel<set_zero, xpu>::Launch(s, outputs[0].shape_.Size(),
-                                      outputs[0].dptr<DType>());
+        Kernel<set_zero, xpu>::Launch(s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
       });
     } else {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        Kernel<set_one, xpu>::Launch(s, outputs[0].shape_.Size(),
-                                     outputs[0].dptr<DType>());
+        Kernel<set_one, xpu>::Launch(s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
       });
     }
     return;
@@ -349,7 +355,7 @@ void NumpyReduceAxesCompute(const nnvm::NodeAttrs& attrs,
       using namespace mshadow::expr;
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         auto out = outputs[0].FlatTo2D<xpu, OType>(s);
-        out /= scalar<OType>(inputs[0].Size()/outputs[0].Size());
+        out /= scalar<OType>(inputs[0].Size() / outputs[0].Size());
       });
     }
     return;
@@ -372,7 +378,7 @@ void NumpyReduceAxesCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu, typename reducer, typename OP = op::mshadow_op::identity>
+template <typename xpu, typename reducer, typename OP = op::mshadow_op::identity>
 void NumpyReduceAxesNoDTypeCompute(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const std::vector<TBlob>& inputs,
@@ -382,7 +388,8 @@ void NumpyReduceAxesNoDTypeCompute(const nnvm::NodeAttrs& attrs,
   if (param.initial.has_value()) {
     LOG(FATAL) << "initial is not supported yet";
   }
-  if (inputs[0].shape_.Size() == 0U || outputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (inputs[0].shape_.Size() == 0U || outputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
   if (param.axis.has_value() && param.axis.value().ndim() == 0) {
     UnaryOp::IdentityCompute<xpu>(attrs, ctx, inputs, req, outputs);
   }
@@ -395,15 +402,16 @@ void NumpyReduceAxesNoDTypeCompute(const nnvm::NodeAttrs& attrs,
   ReduceAxesComputeImpl<xpu, reducer, false, false, OP>(ctx, inputs, req, outputs, small);
 }
 
-template<typename xpu, typename reducer, typename OP = op::mshadow_op::NonZero, int init>
+template <typename xpu, typename reducer, typename OP = op::mshadow_op::NonZero, int init>
 void NumpyReduceAxesBoolCompute(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<TBlob>& outputs) {
   const NumpyReduceAxesBoolParam& param = nnvm::get<NumpyReduceAxesBoolParam>(attrs.parsed);
-  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
-  if (outputs[0].shape_.Size() == 0) return;
+  mshadow::Stream<xpu>* s               = ctx.get_stream<xpu>();
+  if (outputs[0].shape_.Size() == 0)
+    return;
   if (inputs[0].shape_.Size() == 0 && outputs[0].shape_.Size() != 0) {
     using namespace mxnet_op;
     if (init == 0) {
@@ -425,7 +433,7 @@ void NumpyReduceAxesBoolCompute(const nnvm::NodeAttrs& attrs,
   ReduceAxesComputeBoolImpl<xpu, reducer, false, false, OP>(ctx, inputs, req, outputs, small);
 }
 
-template<typename xpu, typename reducer>
+template <typename xpu, typename reducer>
 void NumpySearchAxisCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -434,9 +442,9 @@ void NumpySearchAxisCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const ReduceAxisParam& param = nnvm::get<ReduceAxisParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  int axis = inputs[0].ndim();
-  TBlob input = inputs[0];
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
+  int axis                     = inputs[0].ndim();
+  TBlob input                  = inputs[0];
   if (param.axis.has_value()) {
     axis = param.axis.value();
   } else {
@@ -444,28 +452,28 @@ void NumpySearchAxisCompute(const nnvm::NodeAttrs& attrs,
     // and search on axis = 1.
     mxnet::TShape shape_2d(2, 1);
     shape_2d[1] = input.shape_.Size();
-    input = TBlob(input.dptr_, shape_2d, input.dev_mask(), input.type_flag_, input.dev_id());
-    axis = 1;
+    input       = TBlob(input.dptr_, shape_2d, input.dev_mask(), input.type_flag_, input.dev_id());
+    axis        = 1;
   }
   axis = CheckAxis(axis, input.shape_.ndim());
   if (inputs[0].shape_.ndim() != 0) {
     if (param.axis.has_value()) {
       // cannot do argmax in an empty dimension
       CHECK_NE(inputs[0].shape_[axis], 0)
-          << "searching input tensor of shape " << inputs[0].shape_
-          << " along axis = " << axis << " of zero dim-size is not allowed";
+          << "searching input tensor of shape " << inputs[0].shape_ << " along axis = " << axis
+          << " of zero dim-size is not allowed";
     } else {
       // cannot do argmax on an empty array
       CHECK_NE(inputs[0].shape_.Size(), 0U) << "attempt to search an empty sequence";
     }
   }
-  if (input.shape_.Size() == 0U) return;  // zero-size tensor
+  if (input.shape_.Size() == 0U)
+    return;  // zero-size tensor
   mxnet::TShape shape = AxisShapeCompact(input.shape_, &axis, false);
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, int64_t> out =
-      outputs[0].get_with_shape<xpu, 2, int64_t>(Shape2(shape[0], shape[2]), s);
-    Tensor<xpu, 3, DType> in =
-      input.get_with_shape<xpu, 3, DType>(shape.get<3>(), s);
+        outputs[0].get_with_shape<xpu, 2, int64_t>(Shape2(shape[0], shape[2]), s);
+    Tensor<xpu, 3, DType> in = input.get_with_shape<xpu, 3, DType>(shape.get<3>(), s);
     CHECK(req[0] != kAddTo) << "AddTo is not supported";
     ASSIGN_DISPATCH(out, req[0], tcast<int64_t>(reduce_with_axis<reducer, true>(in, 1)));
   });
@@ -473,56 +481,69 @@ void NumpySearchAxisCompute(const nnvm::NodeAttrs& attrs,
 
 struct arg_min_max_parse {
   template <typename DType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i,
-                                  OType* out_data,
-                                  const DType* in_data) {
+  MSHADOW_XINLINE static void Map(index_t i, OType* out_data, const DType* in_data) {
     out_data[i] = in_data[i].idx;
   }
 };
 
 template <typename Reducer, int NDim, typename DType, typename OType>
-void NumpyArgMinMaxReduce(mshadow::Stream<cpu> *s, const TBlob& in_data, const TBlob& out_data,
+void NumpyArgMinMaxReduce(mshadow::Stream<cpu>* s,
+                          const TBlob& in_data,
+                          const TBlob& out_data,
                           const mshadow::Tensor<cpu, 1, char>& workspace) {
   using namespace mshadow;
   Shape<NDim> rshape, rstride;
   broadcast::diff<NDim>(out_data.shape_.get<NDim>(), in_data.shape_.get<NDim>(), &rshape, &rstride);
   size_t N = out_data.shape_.Size(), M = rshape.Size();
-  broadcast::seq_reduce_compute<Reducer, NDim, OType, DType, OType,
-    mxnet::op::mshadow_op::identity,
-    mxnet::op::mshadow_op::arg_min_max_set_index<OType, index_t>> (
-    N, M, false, in_data.dptr<DType>(), static_cast<OType*>(out_data.dptr_),
-    in_data.shape_.get<NDim>(), out_data.shape_.get<NDim>(), rshape, rstride);
+  broadcast::seq_reduce_compute<Reducer,
+                                NDim,
+                                OType,
+                                DType,
+                                OType,
+                                mxnet::op::mshadow_op::identity,
+                                mxnet::op::mshadow_op::arg_min_max_set_index<OType, index_t>>(
+      N,
+      M,
+      false,
+      in_data.dptr<DType>(),
+      static_cast<OType*>(out_data.dptr_),
+      in_data.shape_.get<NDim>(),
+      out_data.shape_.get<NDim>(),
+      rshape,
+      rstride);
 }
 
-template<typename Reducer, typename xpu, typename IType>
+template <typename Reducer, typename xpu, typename IType>
 void NumpyArgMinMaxCompute(const nnvm::NodeAttrs& attrs,
-                        const OpContext& ctx,
-                        const std::vector<TBlob>& inputs,
-                        const std::vector<OpReqType>& req,
-                        const std::vector<TBlob>& outputs) {
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   // parse param
-  const auto& param = nnvm::get<ReduceAxisParam>(attrs.parsed);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  TBlob out = outputs[0];
-  TBlob in = inputs[0];
+  const auto& param       = nnvm::get<ReduceAxisParam>(attrs.parsed);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  TBlob out               = outputs[0];
+  TBlob in                = inputs[0];
   // do some shape checks
   if (in.shape_.ndim() != 0) {
     if (param.axis.has_value()) {
       // cannot do argmax in an empty dimension
       int axis = param.axis.value();
-      axis = CheckAxis(axis, in.shape_.ndim());
+      axis     = CheckAxis(axis, in.shape_.ndim());
       CHECK_NE(in.shape_[axis], 0)
-          << "searching input tensor of shape " << inputs[0].shape_
-          << " along axis = " << axis << " of zero dim-size is not allowed";
+          << "searching input tensor of shape " << inputs[0].shape_ << " along axis = " << axis
+          << " of zero dim-size is not allowed";
     } else {
       // cannot do argmax on an empty array
       CHECK_NE(in.shape_.Size(), 0U) << "attempt to search an empty sequence";
     }
   }
-  if (in.shape_.Size() == 0U) return;  // zero-size tensor
+  if (in.shape_.Size() == 0U)
+    return;  // zero-size tensor
   // prepare shape
   dmlc::optional<mxnet::Tuple<int>> axes;
   if (param.axis.has_value()) {
@@ -542,25 +563,25 @@ void NumpyArgMinMaxCompute(const nnvm::NodeAttrs& attrs,
     // switch dim
     BROADCAST_NDIM_SWITCH(dst_shape.ndim(), NDim, {
       constexpr size_t align_size = 1024;
-      const size_t aligned_first_workspace_size = ((workspace_size + align_size - 1) / align_size)
-                                                  * align_size;
-      workspace_size = aligned_first_workspace_size +
-                       sizeof(OType) * out.shape_.Size();
+      const size_t aligned_first_workspace_size =
+          ((workspace_size + align_size - 1) / align_size) * align_size;
+      workspace_size = aligned_first_workspace_size + sizeof(OType) * out.shape_.Size();
       Tensor<xpu, 1, char> workspace =
-                ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+          ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
       // set up intermediate output
       TBlob intermediate = out;
-      intermediate.dptr_ = reinterpret_cast<int64_t*>(workspace.dptr_ +
-                                                      aligned_first_workspace_size);
+      intermediate.dptr_ =
+          reinterpret_cast<int64_t*>(workspace.dptr_ + aligned_first_workspace_size);
       // reshape the input and intermediate output tensor
       const TBlob intermediate_out_data = intermediate.reshape(dst_shape);
-      NumpyArgMinMaxReduce<Reducer, NDim, DType, OType>(s, in_data,
-        intermediate_out_data, workspace);
+      NumpyArgMinMaxReduce<Reducer, NDim, DType, OType>(
+          s, in_data, intermediate_out_data, workspace);
       // parse the indices from the intermediate tensor back to the actual output tensor
       using namespace mxnet_op;
-      Kernel<arg_min_max_parse, xpu>::Launch(
-          s, out.shape_.Size(), outputs[0].dptr<int64_t>(),
-          static_cast<OType*>(intermediate_out_data.dptr_));
+      Kernel<arg_min_max_parse, xpu>::Launch(s,
+                                             out.shape_.Size(),
+                                             outputs[0].dptr<int64_t>(),
+                                             static_cast<OType*>(intermediate_out_data.dptr_));
     });
   });
 }
@@ -579,7 +600,7 @@ struct NumpyArgMinMaxRTCCompute {
 
 #endif
 
-template<typename xpu, bool normalize = false>
+template <typename xpu, bool normalize = false>
 inline void NumpyReduceAxesBackwardUseNone(const nnvm::NodeAttrs& attrs,
                                            const OpContext& ctx,
                                            const std::vector<TBlob>& inputs,
@@ -589,7 +610,8 @@ inline void NumpyReduceAxesBackwardUseNone(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   CHECK_NE(outputs[0].type_flag_, kBool) << "reduce operators do not support gradient calculation "
                                             "for input tensors of boolean type.";
-  if (outputs[0].shape_.Size() == 0) return;
+  if (outputs[0].shape_.Size() == 0)
+    return;
   const NumpyReduceAxesParam& param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
   TShape small;
   if (param.keepdims) {
@@ -601,15 +623,15 @@ inline void NumpyReduceAxesBackwardUseNone(const nnvm::NodeAttrs& attrs,
   BroadcastComputeImpl<xpu>(attrs, ctx, inputs, req, outputs, small);
 
   if (normalize) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, IType, {
       Tensor<xpu, 1, IType> igrad = outputs[0].FlatTo1D<xpu, IType>(s);
-      igrad /= scalar<IType>(outputs[0].Size()/inputs[0].Size());
+      igrad /= scalar<IType>(outputs[0].Size() / inputs[0].Size());
     });
   }
 }
 
-template<typename xpu, typename OP, bool normalize = false>
+template <typename xpu, typename OP, bool normalize = false>
 void NumpyReduceAxesBackwardUseInOut(const nnvm::NodeAttrs& attrs,
                                      const OpContext& ctx,
                                      const std::vector<TBlob>& inputs,
@@ -634,28 +656,29 @@ struct NumpyMomentsParam : public dmlc::Parameter<NumpyMomentsParam> {
   int ddof;
   DMLC_DECLARE_PARAMETER(NumpyMomentsParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("Axis or axes along which a sum is performed. The default, axis=None, will sum "
-                "all of the elements of the input array. If axis is negative it counts from the "
-                "last to the first axis.");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Axis or axes along which a sum is performed. The default, axis=None, will sum "
+            "all of the elements of the input array. If axis is negative it counts from the "
+            "last to the first axis.");
     DMLC_DECLARE_FIELD(dtype)
-      .add_enum("float16", mshadow::kFloat16)
-      .add_enum("float32", mshadow::kFloat32)
-      .add_enum("float64", mshadow::kFloat64)
-      .add_enum("int8", mshadow::kInt8)
-      .add_enum("int32", mshadow::kInt32)
-      .add_enum("int64", mshadow::kInt64)
-      .set_default(dmlc::optional<int>())
-      .describe("The type of the returned array and of the accumulator in which the elements are "
-                "summed. The dtype of a is used by default unless a has an integer dtype of less "
-                "precision than the default platform integer. In that case, if a is signed then "
-                "the platform integer is used while if a is unsigned then an unsigned integer of "
-                "the same precision as the platform integer is used.");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axes are left "
-                "in the result as dimension with size one.");
-    DMLC_DECLARE_FIELD(ddof).set_default(0)
-      .describe("Starting value for the sum.");
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("int8", mshadow::kInt8)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int64", mshadow::kInt64)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "The type of the returned array and of the accumulator in which the elements are "
+            "summed. The dtype of a is used by default unless a has an integer dtype of less "
+            "precision than the default platform integer. In that case, if a is signed then "
+            "the platform integer is used while if a is unsigned then an unsigned integer of "
+            "the same precision as the platform integer is used.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axes are left "
+        "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(ddof).set_default(0).describe("Starting value for the sum.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -671,7 +694,7 @@ struct NumpyMomentsParam : public dmlc::Parameter<NumpyMomentsParam> {
       (*dict)["dtype"] = dtype_s.str();
     }
     (*dict)["keepdims"] = keepdims_s.str();
-    (*dict)["ddof"] = ddof_s.str();
+    (*dict)["ddof"]     = ddof_s.str();
   }
 };
 
@@ -682,20 +705,19 @@ struct NumpyWeightedAverageParam : public dmlc::Parameter<NumpyWeightedAveragePa
 
   DMLC_DECLARE_PARAMETER(NumpyWeightedAverageParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("Axis or axes along which a average is performed. "
-                "The default, axis=None, will average "
-                "all of the elements of the input array. If axis is negative it counts from the "
-                "last to the first axis.");
-    DMLC_DECLARE_FIELD(returned)
-      .set_default(false)
-      .describe("If True, the tuple (average, sum_of_weights) is returned,"
-                "otherwise only the average is returned."
-                "If weights=None, sum_of_weights is equivalent to"
-                "the number of elements over which the average is taken.");
-    DMLC_DECLARE_FIELD(weighted)
-      .set_default(true)
-      .describe("Auxiliary flag to deal with none weights.");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Axis or axes along which a average is performed. "
+            "The default, axis=None, will average "
+            "all of the elements of the input array. If axis is negative it counts from the "
+            "last to the first axis.");
+    DMLC_DECLARE_FIELD(returned).set_default(false).describe(
+        "If True, the tuple (average, sum_of_weights) is returned,"
+        "otherwise only the average is returned."
+        "If weights=None, sum_of_weights is equivalent to"
+        "the number of elements over which the average is taken.");
+    DMLC_DECLARE_FIELD(weighted).set_default(true).describe(
+        "Auxiliary flag to deal with none weights.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -703,15 +725,15 @@ struct NumpyWeightedAverageParam : public dmlc::Parameter<NumpyWeightedAveragePa
     axis_s << axis;
     returned_s << returned;
     weighted_s << weighted;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]     = axis_s.str();
     (*dict)["returned"] = returned_s.str();
     (*dict)["weighted"] = weighted_s.str();
   }
 };
 
 inline bool NumpyWeightedAverageShape(const nnvm::NodeAttrs& attrs,
-                                      std::vector<TShape> *in_attrs,
-                                      std::vector<TShape> *out_attrs) {
+                                      std::vector<TShape>* in_attrs,
+                                      std::vector<TShape>* out_attrs) {
   const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), (param.weighted ? 2U : 1U));
   CHECK_EQ(out_attrs->size(), 2U);
@@ -720,30 +742,28 @@ inline bool NumpyWeightedAverageShape(const nnvm::NodeAttrs& attrs,
   }
 
   const TShape& a_shape = (*in_attrs)[0];
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     NumpyReduceAxesShapeImpl(a_shape, param.axis, false));
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, NumpyReduceAxesShapeImpl(a_shape, param.axis, false));
 
   if (param.weighted) {
     const TShape& w_shape = (*in_attrs)[1];
     if (w_shape.ndim() != a_shape.ndim()) {
-      CHECK_EQ(w_shape.ndim(), 1U)
-        << "1D weights expected when shapes of a and weights differ.";
+      CHECK_EQ(w_shape.ndim(), 1U) << "1D weights expected when shapes of a and weights differ.";
       CHECK_EQ(param.axis.has_value(), true)
-        << "Axis must be specified when shapes of a and weights differ.";
+          << "Axis must be specified when shapes of a and weights differ.";
       mxnet::Tuple<int> axes(param.axis.value());
       CHECK_EQ(axes.ndim(), 1U) << "Axis must be int when shapes of a and weights differ.";
       int red_axis = axes[0] < 0 ? axes[0] + a_shape.ndim() : axes[0];
       CHECK_EQ(a_shape[red_axis], w_shape[0])
-        << "Length of weights not compatible with specified axis.";
-      SHAPE_ASSIGN_CHECK(*out_attrs, 1,
-                         NumpyReduceAxesShapeImpl(
-                           w_shape, dmlc::optional<mxnet::Tuple<int>>(), false));
+          << "Length of weights not compatible with specified axis.";
+      SHAPE_ASSIGN_CHECK(
+          *out_attrs,
+          1,
+          NumpyReduceAxesShapeImpl(w_shape, dmlc::optional<mxnet::Tuple<int>>(), false));
     } else {
       for (int i = 0; i < w_shape.ndim(); i++) {
         CHECK_EQ(w_shape[i], a_shape[i]);
       }
-      SHAPE_ASSIGN_CHECK(*out_attrs, 1,
-                         NumpyReduceAxesShapeImpl(w_shape, param.axis, false));
+      SHAPE_ASSIGN_CHECK(*out_attrs, 1, NumpyReduceAxesShapeImpl(w_shape, param.axis, false));
     }
   } else {
     SHAPE_ASSIGN_CHECK(*out_attrs, 1, TShape(0, -1));
@@ -752,9 +772,9 @@ inline bool NumpyWeightedAverageShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(out_attrs->at(0)) && shape_is_known(out_attrs->at(1));
 }
 
-template<int req, int NDim, bool onedim = false>
+template <int req, int NDim, bool onedim = false>
 struct avg_grad_a_kernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   DType* out,
                                   const DType* w,
@@ -763,12 +783,12 @@ struct avg_grad_a_kernel {
                                   mshadow::Shape<NDim> small,
                                   mshadow::Shape<NDim> big) {
     // partial a = w / sum(w)
-    size_t big_idx = i;
-    size_t small_idx = i;
-    size_t big_stride = 1;
+    size_t big_idx      = i;
+    size_t small_idx    = i;
+    size_t big_stride   = 1;
     size_t small_stride = 1;
     size_t red_axis_idx = 0;
-    for (int axis = NDim-1; axis >= 0; --axis) {
+    for (int axis = NDim - 1; axis >= 0; --axis) {
       size_t axis_idx = big_idx % big[axis];
       small_idx -= axis_idx * big_stride;
       if (small[axis] != 1) {
@@ -788,9 +808,9 @@ struct avg_grad_a_kernel {
   }
 };
 
-template<int req, int NDim>
+template <int req, int NDim>
 struct avg_grad_w_kernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   DType* out,
                                   const DType* a,
@@ -800,11 +820,11 @@ struct avg_grad_w_kernel {
                                   mshadow::Shape<NDim> small,
                                   mshadow::Shape<NDim> big) {
     // partial w = (a * sum(w) - sum(a*w)) / (sum(w) * sum(w))
-    size_t big_idx = i;
-    size_t small_idx = i;
-    size_t big_stride = 1;
+    size_t big_idx      = i;
+    size_t small_idx    = i;
+    size_t big_stride   = 1;
     size_t small_stride = 1;
-    for (int axis = NDim-1; axis >= 0; --axis) {
+    for (int axis = NDim - 1; axis >= 0; --axis) {
       size_t axis_idx = big_idx % big[axis];
       small_idx -= axis_idx * big_stride;
       if (small[axis] != 1) {
@@ -814,15 +834,16 @@ struct avg_grad_w_kernel {
       big_stride *= big[axis];
       small_stride *= small[axis];
     }
-    DType ret = ograd[small_idx] *
-      (((a[i] * scl[small_idx] - sum_of_wa[small_idx]) / scl[small_idx]) / scl[small_idx]);
+    DType ret =
+        ograd[small_idx] *
+        (((a[i] * scl[small_idx] - sum_of_wa[small_idx]) / scl[small_idx]) / scl[small_idx]);
     KERNEL_ASSIGN(out[i], req, ret);
   }
 };
 
-template<int req, int NDim>
+template <int req, int NDim>
 struct avg_grad_w_1D_kernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   DType* out,
                                   const DType* a,
@@ -832,9 +853,9 @@ struct avg_grad_w_1D_kernel {
                                   mshadow::Shape<NDim> big,
                                   const int red_axis) {
     DType scl_val = *scl;
-    size_t tail = 1;
-    size_t head = 1;
-    for (int axis = NDim-1; axis > red_axis; --axis) {
+    size_t tail   = 1;
+    size_t head   = 1;
+    for (int axis = NDim - 1; axis > red_axis; --axis) {
       tail *= big[axis];
     }
     for (int axis = 0; axis < red_axis; ++axis) {
@@ -843,17 +864,17 @@ struct avg_grad_w_1D_kernel {
     DType ret = 0;
     for (size_t j = 0; j < head; ++j) {
       for (size_t k = 0; k < tail; ++k) {
-        size_t a_idx = j*(tail*big[red_axis]) + i * tail + k;
-        size_t small_idx = j*tail + k;
+        size_t a_idx     = j * (tail * big[red_axis]) + i * tail + k;
+        size_t small_idx = j * tail + k;
         ret += (ograd[small_idx] *
-          (((a[a_idx] * scl_val - sum_of_wa[small_idx]) / scl_val) / scl_val));
+                (((a[a_idx] * scl_val - sum_of_wa[small_idx]) / scl_val) / scl_val));
       }
     }
     KERNEL_ASSIGN(out[i], req, ret);
   }
 };
 
-template<typename xpu, bool back = false>
+template <typename xpu, bool back = false>
 void NumpyWeightedAverageComputeImpl(const nnvm::NodeAttrs& attrs,
                                      const OpContext& ctx,
                                      const std::vector<TBlob>& inputs,
@@ -862,9 +883,9 @@ void NumpyWeightedAverageComputeImpl(const nnvm::NodeAttrs& attrs,
                                      const dmlc::optional<mxnet::Tuple<int>>& axis) {
   using namespace mshadow;
   using namespace mxnet_op;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob& data = inputs[0];
-  TShape small1 = NumpyReduceAxesShapeImpl(data.shape_, axis, true);
+  TShape small1     = NumpyReduceAxesShapeImpl(data.shape_, axis, true);
   // Reshape weights
   TShape small2 = small1;
   TBlob weights = inputs[1];
@@ -875,19 +896,18 @@ void NumpyWeightedAverageComputeImpl(const nnvm::NodeAttrs& attrs,
 
   if (one_dim) {
     CHECK_EQ(weights.shape_.ndim(), 1U)
-      << "1D weights expected when shapes of a and weights differ.";
+        << "1D weights expected when shapes of a and weights differ.";
     CHECK_EQ(axis.has_value(), true)
-      << "Axis must be specified when shapes of a and weights differ.";
+        << "Axis must be specified when shapes of a and weights differ.";
     Tuple<int> axes(axis.value());
-    CHECK_EQ(axes.ndim(), 1U)
-      << "Axis must be int when shapes of a and weights differ.";
+    CHECK_EQ(axes.ndim(), 1U) << "Axis must be int when shapes of a and weights differ.";
     red_axis = axes[0] < 0 ? axes[0] + data.shape_.ndim() : axes[0];
     CHECK_EQ(weights.shape_[0], data.shape_[red_axis])
-      << "Length of weights not compatible with specified axis.";
+        << "Length of weights not compatible with specified axis.";
     TShape new_w_shape(data.shape_.ndim(), 1);
     new_w_shape[red_axis] = weights.shape_[0];
-    weights = weights.reshape(new_w_shape);
-    small2 = TShape(new_w_shape.ndim(), 1);
+    weights               = weights.reshape(new_w_shape);
+    small2                = TShape(new_w_shape.ndim(), 1);
   }
   TBlob wa;
   TBlob sum_of_wa;
@@ -895,93 +915,109 @@ void NumpyWeightedAverageComputeImpl(const nnvm::NodeAttrs& attrs,
   MSHADOW_TYPE_SWITCH(data.type_flag_, DType, {
     // Get temp space
     size_t temp_data_size = data.shape_.Size() * sizeof(DType);
-    size_t temp_sum_size = small1.Size() * sizeof(DType);
+    size_t temp_sum_size  = small1.Size() * sizeof(DType);
     TShape src_shape, dst_shape;
     BroadcastReduceShapeCompact(data.shape_, small1, &src_shape, &dst_shape);
     size_t workspace_size = 0;
-    workspace_size = broadcast::ReduceWorkspaceSize(
-      s, dst_shape, {kWriteTo}, src_shape);
-    size_t temp_mem_size = temp_data_size + temp_sum_size + workspace_size;
+    workspace_size        = broadcast::ReduceWorkspaceSize(s, dst_shape, {kWriteTo}, src_shape);
+    size_t temp_mem_size  = temp_data_size + temp_sum_size + workspace_size;
     Tensor<xpu, 1, char> temp_mem =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
-    auto *temp_data_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
-    auto *temp_sum_ptr = reinterpret_cast<DType*>(temp_mem.dptr_ + temp_data_size);
-    char *workspace_ptr = temp_mem.dptr_ + temp_data_size + temp_sum_size;
-    workspace = Tensor<xpu, 1, char>(workspace_ptr, Shape1(workspace_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+    auto* temp_data_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
+    auto* temp_sum_ptr  = reinterpret_cast<DType*>(temp_mem.dptr_ + temp_data_size);
+    char* workspace_ptr = temp_mem.dptr_ + temp_data_size + temp_sum_size;
+    workspace           = Tensor<xpu, 1, char>(workspace_ptr, Shape1(workspace_size), s);
 
     // Compute weighted data
-    wa = TBlob(temp_data_ptr, data.shape_, xpu::kDevMask);
+    wa        = TBlob(temp_data_ptr, data.shape_, xpu::kDevMask);
     sum_of_wa = TBlob(temp_sum_ptr, small1, xpu::kDevMask);
   });
 #if !defined(__CUDACC__)
-  BinaryBroadcastCompute<xpu, mshadow_op::mul>(
-    attrs, ctx, {data, weights}, {kWriteTo}, {wa});
+  BinaryBroadcastCompute<xpu, mshadow_op::mul>(attrs, ctx, {data, weights}, {kWriteTo}, {wa});
 
   // Compute sum of weighted data
   ReduceAxesComputeImpl<xpu, mshadow_op::sum, true>(
-    ctx, {wa}, {kWriteTo}, {sum_of_wa}, small1, &workspace);
+      ctx, {wa}, {kWriteTo}, {sum_of_wa}, small1, &workspace);
 #else
-  BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, {data, weights}, {kWriteTo}, {wa});
+  BinaryBroadcastRTCCompute{"mul"}(attrs, ctx, {data, weights}, {kWriteTo}, {wa});  // NOLINT
 
   // Compute sum of weighted data
-  ReduceAxesRTCComputeImpl(ctx, {wa}, {kWriteTo}, {sum_of_wa}, small1, "red::sum{}",
-                           &workspace, false, "identity");
+  ReduceAxesRTCComputeImpl(
+      ctx, {wa}, {kWriteTo}, {sum_of_wa}, small1, "red::sum{}", &workspace, false, "identity");
 #endif
   if (!back) {
-    const TBlob& avg = outputs[0];
+    const TBlob& avg            = outputs[0];
     const TBlob& sum_of_weights = outputs[1];
     // Compute sum of weight
     TBlob scl = sum_of_weights.reshape(small2);
 #if !defined(__CUDACC__)
     ReduceAxesComputeImpl<xpu, mshadow_op::sum, true>(
-      ctx, {weights}, {kWriteTo}, {scl}, small2, &workspace);
+        ctx, {weights}, {kWriteTo}, {scl}, small2, &workspace);
     // Compute avg and assign output
     BinaryBroadcastCompute<xpu, mshadow_op::div>(
-      attrs, ctx, {sum_of_wa, scl}, req, {avg.reshape(small1)});
+        attrs, ctx, {sum_of_wa, scl}, req, {avg.reshape(small1)});
 #else
-    ReduceAxesRTCComputeImpl(ctx, {weights}, {kWriteTo}, {scl}, small2, "red::sum{}",
-                             &workspace, false, "identity");
+    ReduceAxesRTCComputeImpl(
+        ctx, {weights}, {kWriteTo}, {scl}, small2, "red::sum{}", &workspace, false, "identity");
     // Compute avg and assign output
-    BinaryBroadcastRTCCompute {"div"}(
-      attrs, ctx, {sum_of_wa, scl}, req, {avg.reshape(small1)});
+    BinaryBroadcastRTCCompute{"div"}(  // NOLINT
+        attrs,
+        ctx,
+        {sum_of_wa, scl},
+        req,
+        {avg.reshape(small1)});
 #endif
   } else {
     MSHADOW_TYPE_SWITCH(data.type_flag_, DType, {
       // Compute and assign the derivatives of a and weights
       const TBlob& igrad_a = outputs[0];
       const TBlob& igrad_w = outputs[1];
-      const TBlob& scl = inputs[2];
-      const TBlob& ograd = inputs[3];
+      const TBlob& scl     = inputs[2];
+      const TBlob& ograd   = inputs[3];
       MXNET_NDIM_SWITCH(igrad_a.shape_.ndim(), NDim, {
         MXNET_ASSIGN_REQ_SWITCH(req[0], req_a, {
           if (one_dim) {
             // 1D weights
-            Kernel<avg_grad_a_kernel<req_a, NDim, true>, xpu>::Launch(
-                s, igrad_a.shape_.Size(), igrad_a.dptr<DType>(),
-                weights.dptr<DType>(), scl.dptr<DType>(), ograd.dptr<DType>(),
-                small1.get<NDim>(),
-                igrad_a.shape_.get<NDim>());
+            Kernel<avg_grad_a_kernel<req_a, NDim, true>, xpu>::Launch(s,
+                                                                      igrad_a.shape_.Size(),
+                                                                      igrad_a.dptr<DType>(),
+                                                                      weights.dptr<DType>(),
+                                                                      scl.dptr<DType>(),
+                                                                      ograd.dptr<DType>(),
+                                                                      small1.get<NDim>(),
+                                                                      igrad_a.shape_.get<NDim>());
           } else {
-            Kernel<avg_grad_a_kernel<req_a, NDim, false>, xpu>::Launch(
-                s, igrad_a.shape_.Size(), igrad_a.dptr<DType>(),
-                weights.dptr<DType>(), scl.dptr<DType>(), ograd.dptr<DType>(),
-                small1.get<NDim>(),
-                igrad_a.shape_.get<NDim>());
+            Kernel<avg_grad_a_kernel<req_a, NDim, false>, xpu>::Launch(s,
+                                                                       igrad_a.shape_.Size(),
+                                                                       igrad_a.dptr<DType>(),
+                                                                       weights.dptr<DType>(),
+                                                                       scl.dptr<DType>(),
+                                                                       ograd.dptr<DType>(),
+                                                                       small1.get<NDim>(),
+                                                                       igrad_a.shape_.get<NDim>());
           }
         });
         MXNET_ASSIGN_REQ_SWITCH(req[1], req_w, {
           if (one_dim) {
-            Kernel<avg_grad_w_1D_kernel<req_w, NDim>, xpu>::Launch(
-                s, igrad_w.shape_.Size(), igrad_w.dptr<DType>(),
-                data.dptr<DType>(), scl.dptr<DType>(), sum_of_wa.dptr<DType>(), ograd.dptr<DType>(),
-                data.shape_.get<NDim>(),
-                red_axis);
+            Kernel<avg_grad_w_1D_kernel<req_w, NDim>, xpu>::Launch(s,
+                                                                   igrad_w.shape_.Size(),
+                                                                   igrad_w.dptr<DType>(),
+                                                                   data.dptr<DType>(),
+                                                                   scl.dptr<DType>(),
+                                                                   sum_of_wa.dptr<DType>(),
+                                                                   ograd.dptr<DType>(),
+                                                                   data.shape_.get<NDim>(),
+                                                                   red_axis);
           } else {
-            Kernel<avg_grad_w_kernel<req_w, NDim>, xpu>::Launch(
-                s, igrad_w.shape_.Size(), igrad_w.dptr<DType>(),
-                data.dptr<DType>(), scl.dptr<DType>(), sum_of_wa.dptr<DType>(), ograd.dptr<DType>(),
-                small1.get<NDim>(),
-                igrad_w.shape_.get<NDim>());
+            Kernel<avg_grad_w_kernel<req_w, NDim>, xpu>::Launch(s,
+                                                                igrad_w.shape_.Size(),
+                                                                igrad_w.dptr<DType>(),
+                                                                data.dptr<DType>(),
+                                                                scl.dptr<DType>(),
+                                                                sum_of_wa.dptr<DType>(),
+                                                                ograd.dptr<DType>(),
+                                                                small1.get<NDim>(),
+                                                                igrad_w.shape_.get<NDim>());
           }
         });
       })
@@ -989,7 +1025,7 @@ void NumpyWeightedAverageComputeImpl(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyWeightedAverageForward(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -997,7 +1033,8 @@ void NumpyWeightedAverageForward(const nnvm::NodeAttrs& attrs,
                                  const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   CHECK_NE(req[0], kWriteInplace) << "Average does not support write in-place";
   const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
   const TBlob& data = inputs[0];
@@ -1007,26 +1044,23 @@ void NumpyWeightedAverageForward(const nnvm::NodeAttrs& attrs,
       small = NumpyReduceAxesShapeImpl(data.shape_, param.axis, true);
       // Compute sum of weights which equals to the product of sizes of reduced axes
       Stream<xpu>* s = ctx.get_stream<xpu>();
-      auto ret = outputs[1].FlatTo1D<xpu, DType>(s);
-      ret = scalar<DType>(data.shape_.Size()/small.Size());
+      auto ret       = outputs[1].FlatTo1D<xpu, DType>(s);
+      ret            = scalar<DType>(data.shape_.Size() / small.Size());
     }
   });
   if (!param.weighted) {
     // Compute mean
 #if !defined(__CUDACC__)
-    ReduceAxesComputeImpl<xpu, mshadow_op::sum, true, true>(
-      ctx, inputs, req, {outputs[0]}, small);
+    ReduceAxesComputeImpl<xpu, mshadow_op::sum, true, true>(ctx, inputs, req, {outputs[0]}, small);
 #else
-    ReduceAxesRTCComputeImpl(ctx, inputs, req, {outputs[0]}, small,
-                             "red::sum{}", nullptr, true);
+    ReduceAxesRTCComputeImpl(ctx, inputs, req, {outputs[0]}, small, "red::sum{}", nullptr, true);
 #endif
   } else {
-    NumpyWeightedAverageComputeImpl<xpu>(
-      attrs, ctx, inputs, req, outputs, param.axis);
+    NumpyWeightedAverageComputeImpl<xpu>(attrs, ctx, inputs, req, outputs, param.axis);
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyWeightedAverageBackward(const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<TBlob>& inputs,
@@ -1035,28 +1069,29 @@ void NumpyWeightedAverageBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
-  if (req[0] == kNullOp && !param.weighted) return;
+  if (req[0] == kNullOp && !param.weighted)
+    return;
   CHECK_EQ(inputs.size(), (param.weighted ? 6U : 5U));
   CHECK_EQ(outputs.size(), (param.weighted ? 2U : 1U));
   const TBlob& ograd = inputs[0];
-  const TBlob& data = inputs[2];
+  const TBlob& data  = inputs[2];
   MSHADOW_TYPE_SWITCH(data.type_flag_, DType, {
     if (!param.weighted) {
-      TShape small = NumpyReduceAxesShapeImpl(outputs[0].shape_, param.axis, true);
-      Stream<xpu>* s = ctx.get_stream<xpu>();
+      TShape small      = NumpyReduceAxesShapeImpl(outputs[0].shape_, param.axis, true);
+      Stream<xpu>* s    = ctx.get_stream<xpu>();
       auto ograd_tensor = ograd.FlatTo1D<xpu, DType>(s);
-      ograd_tensor /= scalar<DType>(data.shape_.Size()/small.Size());
+      ograd_tensor /= scalar<DType>(data.shape_.Size() / small.Size());
       BroadcastComputeImpl<xpu>(attrs, ctx, {ograd}, req, {outputs[0]}, small);
     } else {
       const TBlob& weights = inputs[3];
-      const TBlob& scl = inputs[5];
+      const TBlob& scl     = inputs[5];
       NumpyWeightedAverageComputeImpl<xpu, true>(
-        attrs, ctx, {data, weights, scl, ograd}, req, outputs, param.axis);
+          attrs, ctx, {data, weights, scl, ograd}, req, outputs, param.axis);
     }
   });
 }
 
-template<typename xpu, bool sqrt>
+template <typename xpu, bool sqrt>
 void NumpyMomentsForward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -1073,11 +1108,11 @@ void NumpyMomentsForward(const nnvm::NodeAttrs& attrs,
 
   const NumpyMomentsParam& param = nnvm::get<NumpyMomentsParam>(attrs.parsed);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& data = inputs[0];
+  const TBlob& data   = inputs[0];
   const TBlob& moment = outputs[0];
-  const TBlob& mean = outputs[1];
+  const TBlob& mean   = outputs[1];
 
   mxnet::TShape small;
   if (param.keepdims) {
@@ -1092,18 +1127,18 @@ void NumpyMomentsForward(const nnvm::NodeAttrs& attrs,
   // Get workspace and temp space for data - mean
   size_t workspace_size = broadcast::ReduceWorkspaceSize(s, dst_shape, req[0], src_shape);
   size_t temp_data_size = data.shape_.Size() * common::mshadow_type_info(inputs[0].type_flag_).size;
-  size_t temp_mem_size = temp_data_size + workspace_size;
+  size_t temp_mem_size  = temp_data_size + workspace_size;
   Tensor<xpu, 1, char> temp_mem =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
-  char *workspace_ptr = temp_mem.dptr_ + temp_data_size;
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+  char* workspace_ptr = temp_mem.dptr_ + temp_data_size;
   Tensor<xpu, 1, char> workspace(workspace_ptr, Shape1(workspace_size), s);
   // Compute mean
 #if !defined(__CUDACC__)
   ReduceAxesComputeImpl<xpu, mshadow_op::sum, true, true>(
-    ctx, inputs, {kWriteTo}, {mean}, small, &workspace);
+      ctx, inputs, {kWriteTo}, {mean}, small, &workspace);
 #else
-  ReduceAxesRTCComputeImpl(ctx, inputs, {kWriteTo}, {mean}, small, "red::sum{}",
-                           &workspace, true, "identity");
+  ReduceAxesRTCComputeImpl(
+      ctx, inputs, {kWriteTo}, {mean}, small, "red::sum{}", &workspace, true, "identity");
 #endif
   // Compute data - mean
   Shape<6> data_shape, mean_shape;
@@ -1114,42 +1149,61 @@ void NumpyMomentsForward(const nnvm::NodeAttrs& attrs,
 #if !defined(__CUDACC__)
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      DType *temp_data_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
-      Kernel<VarBroadcastKernel, xpu>::Launch(s, data_shape.Size(), temp_data_ptr,
-        data.dptr<DType>(), mean.dptr<DType>(), data_shape, mean_shape);
+      DType* temp_data_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
+      Kernel<VarBroadcastKernel, xpu>::Launch(s,
+                                              data_shape.Size(),
+                                              temp_data_ptr,
+                                              data.dptr<DType>(),
+                                              mean.dptr<DType>(),
+                                              data_shape,
+                                              mean_shape);
       Tensor<xpu, 1, DType> temp_data_tensor(temp_data_ptr, Shape1(data.shape_.Size()), s);
       TBlob temp_data_blob = TBlob(temp_data_tensor).reshape(data.shape_);
       ReduceAxesComputeImpl<xpu, mshadow_op::sum, true, true>(
-        ctx, {temp_data_blob}, {req[0]}, {moment}, small, &workspace, param.ddof);
+          ctx, {temp_data_blob}, {req[0]}, {moment}, small, &workspace, param.ddof);
       if (sqrt && req[0] != kNullOp) {
         Tensor<xpu, 1, OType> moment_tensor = moment.FlatTo1D<xpu, OType>(s);
-        moment_tensor = F<mshadow_op::square_root>(moment_tensor);
+        moment_tensor                       = F<mshadow_op::square_root>(moment_tensor);
       }
     });
   });
 #else
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-      DType *temp_data_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
-      Kernel<VarBroadcastKernel, xpu>::Launch(s, data_shape.Size(), temp_data_ptr,
-        data.dptr<DType>(), mean.dptr<DType>(), data_shape, mean_shape);
-      Tensor<xpu, 1, DType> temp_data_tensor(temp_data_ptr, Shape1(data.shape_.Size()), s);
-      TBlob temp_data_blob = TBlob(temp_data_tensor).reshape(data.shape_);
-      ReduceAxesRTCComputeImpl(ctx, {temp_data_blob}, {req[0]}, {moment}, small,
-                               "red::sum{}", &workspace, true, "identity", param.ddof);
-      if (sqrt && req[0] != kNullOp) {
-        UnaryRTCCompute {"sqrt"}({}, ctx, {moment}, {kWriteInplace}, {moment});
-      }
+    DType* temp_data_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
+    Kernel<VarBroadcastKernel, xpu>::Launch(s,
+                                            data_shape.Size(),
+                                            temp_data_ptr,
+                                            data.dptr<DType>(),
+                                            mean.dptr<DType>(),
+                                            data_shape,
+                                            mean_shape);
+    Tensor<xpu, 1, DType> temp_data_tensor(temp_data_ptr, Shape1(data.shape_.Size()), s);
+    TBlob temp_data_blob = TBlob(temp_data_tensor).reshape(data.shape_);
+    ReduceAxesRTCComputeImpl(ctx,
+                             {temp_data_blob},
+                             {req[0]},
+                             {moment},
+                             small,
+                             "red::sum{}",
+                             &workspace,
+                             true,
+                             "identity",
+                             param.ddof);
+    if (sqrt && req[0] != kNullOp) {
+      UnaryRTCCompute{"sqrt"}({}, ctx, {moment}, {kWriteInplace}, {moment});  // NOLINT
+    }
   });
 #endif
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyBroadcastToForward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
                              const std::vector<OpReqType>& req,
                              const std::vector<TBlob>& outputs) {
-  if (outputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (outputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
   TShape expanded_ishape(outputs[0].shape_.ndim(), 1);
   const TShape& ishape = inputs[0].shape_;
   CHECK_LE(ishape.ndim(), expanded_ishape.ndim()) << "output ndim cannot be less than input ndim";
@@ -1157,17 +1211,18 @@ void NumpyBroadcastToForward(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < ishape.ndim(); ++i) {
     expanded_ishape[i + ndim_delta] = ishape[i];
   }
-  BroadcastComputeImpl<xpu>(attrs, ctx, {inputs[0].reshape(expanded_ishape)},
-                            req, outputs, expanded_ishape);
+  BroadcastComputeImpl<xpu>(
+      attrs, ctx, {inputs[0].reshape(expanded_ishape)}, req, outputs, expanded_ishape);
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyBroadcastToBackward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
                               const std::vector<OpReqType>& req,
                               const std::vector<TBlob>& outputs) {
-  if (inputs[0].shape_.Size() == 0U) return;  // zero-size ograd
+  if (inputs[0].shape_.Size() == 0U)
+    return;  // zero-size ograd
   TShape expanded_igrad_shape(inputs[0].shape_.ndim(), 1);
   const TShape& igrad_shape = outputs[0].shape_;
   CHECK_LE(igrad_shape.ndim(), expanded_igrad_shape.ndim())
@@ -1185,12 +1240,18 @@ void NumpyBroadcastToBackward(const nnvm::NodeAttrs& attrs,
         ctx, inputs, req, {outputs[0].reshape(expanded_igrad_shape)}, expanded_igrad_shape);
   }
 #else
-  ReduceAxesRTCComputeImpl(ctx, inputs, req, {outputs[0].reshape(expanded_igrad_shape)},
-                           expanded_igrad_shape, "red::sum{}", nullptr, false);
+  ReduceAxesRTCComputeImpl(ctx,
+                           inputs,
+                           req,
+                           {outputs[0].reshape(expanded_igrad_shape)},
+                           expanded_igrad_shape,
+                           "red::sum{}",
+                           nullptr,
+                           false);
 #endif
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void NumpyReduceAxesNoDTypeBackward(const nnvm::NodeAttrs& attrs,
                                     const OpContext& ctx,
                                     const std::vector<TBlob>& inputs,
diff --git a/src/operator/numpy/np_broadcast_reduce_op_boolean.cc b/src/operator/numpy/np_broadcast_reduce_op_boolean.cc
index 0c2f02b0d578..8b94a0d06247 100644
--- a/src/operator/numpy/np_broadcast_reduce_op_boolean.cc
+++ b/src/operator/numpy/np_broadcast_reduce_op_boolean.cc
@@ -29,8 +29,8 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyReduceAxesBoolType(const nnvm::NodeAttrs& attrs,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kBool);
@@ -40,47 +40,48 @@ inline bool NumpyReduceAxesBoolType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyReduceAxesBoolParam);
 
 NNVM_REGISTER_OP(_npi_any)
-.add_alias("_np_sometrue")
-.set_attr_parser(ParamParser<NumpyReduceAxesBoolParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesBoolShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesBoolType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBoolCompute<cpu,
-  mshadow_op::sum, mshadow_op::NonZero, 0>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyReduceAxesBoolParam::__FIELDS__());
+    .add_alias("_np_sometrue")
+    .set_attr_parser(ParamParser<NumpyReduceAxesBoolParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesBoolShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesBoolType)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyReduceAxesBoolCompute<cpu, mshadow_op::sum, mshadow_op::NonZero, 0>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyReduceAxesBoolParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_all)
-.set_attr_parser(ParamParser<NumpyReduceAxesBoolParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesBoolShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesBoolType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBoolCompute<cpu,
-  mshadow_op::product, mshadow_op::NonZero, 1>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyReduceAxesBoolParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyReduceAxesBoolParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesBoolShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesBoolType)
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        NumpyReduceAxesBoolCompute<cpu, mshadow_op::product, mshadow_op::NonZero, 1>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyReduceAxesBoolParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_broadcast_reduce_op_boolean.cu b/src/operator/numpy/np_broadcast_reduce_op_boolean.cu
index 405ae4b38eb7..400e321c25b2 100644
--- a/src/operator/numpy/np_broadcast_reduce_op_boolean.cu
+++ b/src/operator/numpy/np_broadcast_reduce_op_boolean.cu
@@ -28,13 +28,13 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_any)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<NumpyReduceAxesBoolParam, 0>
-                                     {"NonZero", "red::sum{}", false});
+NNVM_REGISTER_OP(_npi_any).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesBoolParam, 0>{"NonZero", "red::sum{}", false});
 
-NNVM_REGISTER_OP(_npi_all)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<NumpyReduceAxesBoolParam, 1>
-                                     {"NonZero", "red::product{}", false});
+NNVM_REGISTER_OP(_npi_all).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesBoolParam, 1>{"NonZero", "red::product{}", false});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_broadcast_reduce_op_index.cc b/src/operator/numpy/np_broadcast_reduce_op_index.cc
index 5564410d9907..f0b13a927316 100644
--- a/src/operator/numpy/np_broadcast_reduce_op_index.cc
+++ b/src/operator/numpy/np_broadcast_reduce_op_index.cc
@@ -28,8 +28,8 @@ namespace mxnet {
 namespace op {
 
 bool NumpyReduceAxisShape(const nnvm::NodeAttrs& attrs,
-                          std::vector<TShape> *in_attrs,
-                          std::vector<TShape> *out_attrs) {
+                          std::vector<TShape>* in_attrs,
+                          std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   if (!shape_is_known(in_attrs->at(0))) {
@@ -41,14 +41,13 @@ bool NumpyReduceAxisShape(const nnvm::NodeAttrs& attrs,
     mxnet::Tuple<int> t({param.axis.value()});
     axes = dmlc::optional<mxnet::Tuple<int>>(t);
   }
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     NumpyReduceAxesShapeImpl((*in_attrs)[0], axes, param.keepdims));
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, NumpyReduceAxesShapeImpl((*in_attrs)[0], axes, param.keepdims));
   return shape_is_known(out_attrs->at(0));
 }
 
 bool ArgMinMaxType(const nnvm::NodeAttrs& attrs,
-                   std::vector<int> *in_attrs,
-                   std::vector<int> *out_attrs) {
+                   std::vector<int>* in_attrs,
+                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK_NE(in_attrs->at(0), -1);
@@ -57,34 +56,34 @@ bool ArgMinMaxType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_argmax)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ReduceAxisParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxisShape)
-.set_attr<nnvm::FInferType>("FInferType", ArgMinMaxType)
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyArgMinMaxCompute<mshadow_op::argmax, cpu, index_t>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_arguments(ReduceAxisParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ReduceAxisParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxisShape)
+    .set_attr<nnvm::FInferType>("FInferType", ArgMinMaxType)
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyArgMinMaxCompute<mshadow_op::argmax, cpu, index_t>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_arguments(ReduceAxisParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_argmin)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ReduceAxisParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxisShape)
-.set_attr<nnvm::FInferType>("FInferType", ArgMinMaxType)
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyArgMinMaxCompute<mshadow_op::argmin, cpu, index_t>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_arguments(ReduceAxisParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ReduceAxisParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxisShape)
+    .set_attr<nnvm::FInferType>("FInferType", ArgMinMaxType)
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyArgMinMaxCompute<mshadow_op::argmin, cpu, index_t>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_arguments(ReduceAxisParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_broadcast_reduce_op_index.cu b/src/operator/numpy/np_broadcast_reduce_op_index.cu
index eb6086c9d7fe..4cbd5a6f397b 100644
--- a/src/operator/numpy/np_broadcast_reduce_op_index.cu
+++ b/src/operator/numpy/np_broadcast_reduce_op_index.cu
@@ -28,10 +28,10 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_argmax)
-.set_attr<FCompute>("FCompute<gpu>", NumpyArgMinMaxRTCCompute{"red::argmax{}"});
+    .set_attr<FCompute>("FCompute<gpu>", NumpyArgMinMaxRTCCompute{"red::argmax{}"});
 
 NNVM_REGISTER_OP(_npi_argmin)
-.set_attr<FCompute>("FCompute<gpu>", NumpyArgMinMaxRTCCompute{"red::argmin{}"});
+    .set_attr<FCompute>("FCompute<gpu>", NumpyArgMinMaxRTCCompute{"red::argmin{}"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_broadcast_reduce_op_value.cc b/src/operator/numpy/np_broadcast_reduce_op_value.cc
index 70068fb4a111..2cfc038b223f 100644
--- a/src/operator/numpy/np_broadcast_reduce_op_value.cc
+++ b/src/operator/numpy/np_broadcast_reduce_op_value.cc
@@ -26,7 +26,7 @@
 /*
  * move some op to np_moments_op.cc to aovid win platform build error:
  * fatal error C1002: compiler is out of heap space in pass 2
- * 
+ *
  * Do not add new op in this file.
  */
 
@@ -43,20 +43,18 @@ DMLC_REGISTER_PARAMETER(NumpyReduceAxesParam);
 DMLC_REGISTER_PARAMETER(NumpyReduceAxesNoDTypeParam);
 
 inline bool NumpySumType(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const NumpyReduceAxesParam &param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
+  const NumpyReduceAxesParam& param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
 
   if (param.dtype.has_value()) {
     if (in_attrs->at(0) == mshadow::kBool) {
-      CHECK(param.dtype.value() == mshadow::kInt32 ||
-            param.dtype.value() == mshadow::kInt64 ||
-            param.dtype.value() == mshadow::kFloat32 ||
-            param.dtype.value() == mshadow::kFloat64)
-        << "Only support the following output dtypes when input dtype is bool: "
-           "int32, int64, float32, float64.";
+      CHECK(param.dtype.value() == mshadow::kInt32 || param.dtype.value() == mshadow::kInt64 ||
+            param.dtype.value() == mshadow::kFloat32 || param.dtype.value() == mshadow::kFloat64)
+          << "Only support the following output dtypes when input dtype is bool: "
+             "int32, int64, float32, float64.";
     }
     TYPE_ASSIGN_CHECK(*out_attrs, 0, param.dtype.value());
   } else if (in_attrs->at(0) == mshadow::kBool) {
@@ -82,11 +80,13 @@ void TVMOpReduce(const OpContext& ctx,
                  const std::string& reducer_name) {
 #if MXNET_USE_TVM_OP
   CHECK_GE(input.ndim(), output.ndim());
-  CHECK_LE(input.ndim(), max_reduce_ndim) << "TVMOpReduce only supports ndim <= "
-                                          << max_reduce_ndim;
+  CHECK_LE(input.ndim(), max_reduce_ndim)
+      << "TVMOpReduce only supports ndim <= " << max_reduce_ndim;
 
-  const TBlob expanded_output = (input.ndim() == output.ndim() ?
-      output : output.reshape(NumpyReduceAxesShapeImpl(input.shape_, axis, true)));
+  const TBlob expanded_output =
+      (input.ndim() == output.ndim()
+           ? output
+           : output.reshape(NumpyReduceAxesShapeImpl(input.shape_, axis, true)));
   CHECK_EQ(input.ndim(), expanded_output.ndim());
   int reduce1st_dim = 0;
   if (input.ndim() > 0 && input.size(0) != expanded_output.size(0)) {
@@ -95,8 +95,8 @@ void TVMOpReduce(const OpContext& ctx,
   // collapse consecutive dimensions where reduction are performed or not performed
   std::vector<index_t> ishape_vec;
   for (int i = 0; i < input.ndim(); ++i) {
-    if (i == 0 || ((input.size(i) != expanded_output.size(i))
-                    != (input.size(i-1) != expanded_output.size(i-1)))) {
+    if (i == 0 || ((input.size(i) != expanded_output.size(i)) !=
+                   (input.size(i - 1) != expanded_output.size(i - 1)))) {
       ishape_vec.push_back(input.size(i));
     } else {
       ishape_vec.back() *= input.size(i);
@@ -111,15 +111,15 @@ void TVMOpReduce(const OpContext& ctx,
     oshape_vec.push_back(ishape_vec[i]);
   }
   TShape ishape(ishape_vec.begin(), ishape_vec.end()), oshape(oshape_vec.begin(), oshape_vec.end());
-  TBlob input_tvm = input.reshape(ishape);
+  TBlob input_tvm  = input.reshape(ishape);
   TBlob output_tvm = output.reshape(oshape);
   const std::string ctx_name =
       (ctx.run_ctx.ctx.dev_type == mxnet::Context::DeviceType::kCPU) ? "cpu" : "gpu";
   std::ostringstream func_name;
   func_name << reducer_name << "_"
             << (ctx.run_ctx.ctx.dev_type == mxnet::Context::DeviceType::kCPU ? "cpu" : "gpu")
-            << "reduce1st_dim_" << reduce1st_dim
-            << "req_" << (req == kWriteTo ? "kWriteTo" : "kAddTo");
+            << "reduce1st_dim_" << reduce1st_dim << "req_"
+            << (req == kWriteTo ? "kWriteTo" : "kAddTo");
   tvm::runtime::TVMOpModule::Get()->Call(func_name.str(), ctx, {input_tvm, output_tvm, output_tvm});
 #else
   LOG(FATAL) << "Please add USE_TVM_OP=1 as a compile flag to enable TVM-generated kernels.";
@@ -127,36 +127,36 @@ void TVMOpReduce(const OpContext& ctx,
 }
 
 NNVM_REGISTER_OP(_npi_sum)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpySumType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_arguments(NumpyReduceAxesParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesCompute<cpu, mshadow_op::sum, true>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_sum"});
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpySumType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_arguments(NumpyReduceAxesParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesCompute<cpu, mshadow_op::sum, true>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_sum"});
 
 NNVM_REGISTER_OP(_backward_npi_sum)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_num_inputs(1)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBackwardUseNone<cpu>);
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs(1)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBackwardUseNone<cpu>);
 
 inline bool NumpyReduceAxesNoDTypeType(const nnvm::NodeAttrs& attrs,
-                                       std::vector<int> *in_attrs,
-                                       std::vector<int> *out_attrs) {
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
@@ -166,104 +166,102 @@ inline bool NumpyReduceAxesNoDTypeType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_max)
-.add_alias("_npi_amax")
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesNoDTypeShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesNoDTypeType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_arguments(NumpyReduceAxesNoDTypeParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeCompute<cpu, mshadow::red::maximum>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_npi_max"});
+    .add_alias("_npi_amax")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesNoDTypeShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesNoDTypeType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_arguments(NumpyReduceAxesNoDTypeParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeCompute<cpu, mshadow::red::maximum>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_npi_max"});
 
 NNVM_REGISTER_OP(_backward_npi_max)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeBackward<cpu, mshadow_op::eq>);
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeBackward<cpu, mshadow_op::eq>);
 
 NNVM_REGISTER_OP(_npi_min)
-.add_alias("_npi_amin")
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesNoDTypeShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesNoDTypeType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-return std::vector<std::string>{"a"};
-})
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_arguments(NumpyReduceAxesNoDTypeParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeCompute<cpu, mshadow::red::minimum>)
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_npi_min"});
+    .add_alias("_npi_amin")
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesNoDTypeShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyReduceAxesNoDTypeType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_arguments(NumpyReduceAxesNoDTypeParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeCompute<cpu, mshadow::red::minimum>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_npi_min"});
 
 NNVM_REGISTER_OP(_backward_npi_min)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeBackward<cpu, mshadow_op::eq>);
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesNoDTypeParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesNoDTypeBackward<cpu, mshadow_op::eq>);
 
 NNVM_REGISTER_OP(_npi_prod)
-.add_alias("_np_product")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpySumType)
-.add_arguments(NumpyReduceAxesParam::__FIELDS__())
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesCompute<cpu, mshadow_op::product, true>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_npi_prod"});
+    .add_alias("_np_product")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpySumType)
+    .add_arguments(NumpyReduceAxesParam::__FIELDS__())
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesCompute<cpu, mshadow_op::product, true>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_npi_prod"});
 
 NNVM_REGISTER_OP(_backward_npi_prod)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBackwardUseInOut<cpu, mshadow_op::rdiv>);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBackwardUseInOut<cpu, mshadow_op::rdiv>);
 
 inline bool IsIntType(const int dtype) {
-  return (dtype == mshadow::kUint8 ||
-          dtype == mshadow::kInt32 ||
-          dtype == mshadow::kInt8 ||
+  return (dtype == mshadow::kUint8 || dtype == mshadow::kInt32 || dtype == mshadow::kInt8 ||
           dtype == mshadow::kInt64);
 }
 
 inline bool NumpyMeanType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_attrs,
-                          std::vector<int> *out_attrs) {
+                          std::vector<int>* in_attrs,
+                          std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const NumpyReduceAxesParam &param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
+  const NumpyReduceAxesParam& param = nnvm::get<NumpyReduceAxesParam>(attrs.parsed);
 
   if (param.dtype.has_value()) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, param.dtype.value());
@@ -280,46 +278,48 @@ inline bool NumpyMeanType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_mean)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyMeanType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_arguments(NumpyReduceAxesParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesCompute<cpu, mshadow_op::sum, true, true>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_mean"});
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReduceAxesShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyMeanType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_arguments(NumpyReduceAxesParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesCompute<cpu, mshadow_op::sum, true, true>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_mean"});
 
 NNVM_REGISTER_OP(_backward_np_mean)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReduceAxesParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_num_inputs(1)
-.set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBackwardUseNone<cpu, true>);
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReduceAxesParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs(1)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyReduceAxesBackwardUseNone<cpu, true>);
 
 bool NumpyBroadcastToShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!mxnet::shape_is_known(ishape)) return false;
+  if (!mxnet::shape_is_known(ishape))
+    return false;
   const BroadcastToParam& param = nnvm::get<BroadcastToParam>(attrs.parsed);
   CHECK_LE(ishape.ndim(), param.shape.ndim())
       << "shape " << ishape << " is not broadcastable to " << param.shape;
   TShape pshape = param.shape;
   for (int i = param.shape.ndim() - 1; i >= 0; --i) {
     int j = i - param.shape.ndim() + ishape.ndim();
-    if (j < 0) break;
+    if (j < 0)
+      break;
     if (pshape[i] == -2) {
       pshape[i] = ishape[j];
     }
@@ -333,32 +333,32 @@ bool NumpyBroadcastToShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_broadcast_to)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"array"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n,
-    const std::vector<nnvm::NodeEntry>& ograds) {
-    return MakeNonlossGradNode("_backward_np_broadcast_to", n, ograds, {}, n->attrs.dict);
-  })
-.add_argument("array", "NDArray-or-Symbol", "The input")
-.set_attr_parser(ParamParser<BroadcastToParam>)
-.add_arguments(BroadcastToParam::__FIELDS__())
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyBroadcastToShape)
-.set_attr<FCompute>("FCompute<cpu>", NumpyBroadcastToForward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"array"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 return MakeNonlossGradNode(
+                                     "_backward_np_broadcast_to", n, ograds, {}, n->attrs.dict);
+                               })
+    .add_argument("array", "NDArray-or-Symbol", "The input")
+    .set_attr_parser(ParamParser<BroadcastToParam>)
+    .add_arguments(BroadcastToParam::__FIELDS__())
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyBroadcastToShape)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyBroadcastToForward<cpu>);
 
 NNVM_REGISTER_OP(_backward_np_broadcast_to)
-.set_attr_parser(ParamParser<BroadcastToParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyBroadcastToBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_attr_parser(ParamParser<BroadcastToParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyBroadcastToBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_broadcast_reduce_op_value.cu b/src/operator/numpy/np_broadcast_reduce_op_value.cu
index 602057324af2..f0ce8f90956e 100644
--- a/src/operator/numpy/np_broadcast_reduce_op_value.cu
+++ b/src/operator/numpy/np_broadcast_reduce_op_value.cu
@@ -26,59 +26,56 @@
 
 namespace mxnet {
 namespace op {
-NNVM_REGISTER_OP(_npi_sum)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ReduceAxesRTCCompute<NumpyReduceAxesParam, 0>{"identity", "red::sum{}", false});
+NNVM_REGISTER_OP(_npi_sum).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesParam, 0>{"identity", "red::sum{}", false});
 
 NNVM_REGISTER_OP(_backward_npi_sum)
-.set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesBackwardUseNone<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesBackwardUseNone<gpu>);
 
-NNVM_REGISTER_OP(_npi_max)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<NumpyReduceAxesNoDTypeParam, 0>
-                                     {"identity", "red::maximum{}", false});
+NNVM_REGISTER_OP(_npi_max).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesNoDTypeParam, 0>{"identity", "red::maximum{}", false});
 
 NNVM_REGISTER_OP(_backward_npi_max)
-.set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesNoDTypeBackward<gpu, mshadow_op::eq>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesNoDTypeBackward<gpu, mshadow_op::eq>);
 
-NNVM_REGISTER_OP(_npi_min)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ReduceAxesRTCCompute<NumpyReduceAxesNoDTypeParam, 0>{"identity",
-                      "red::minimum{}", false});
+NNVM_REGISTER_OP(_npi_min).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesNoDTypeParam, 0>{"identity", "red::minimum{}", false});
 
 NNVM_REGISTER_OP(_backward_npi_min)
-.set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesNoDTypeBackward<gpu, mshadow_op::eq>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesNoDTypeBackward<gpu, mshadow_op::eq>);
 
-NNVM_REGISTER_OP(_npi_prod)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<NumpyReduceAxesParam, 1>{"identity",
-                                       "red::product{}", false});
+NNVM_REGISTER_OP(_npi_prod).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesParam, 1>{"identity", "red::product{}", false});
 
 NNVM_REGISTER_OP(_backward_npi_prod)
-.set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesBackwardUseInOut<gpu, mshadow_op::rdiv>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesBackwardUseInOut<gpu, mshadow_op::rdiv>);
 
 NNVM_REGISTER_OP(_npi_average)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWeightedAverageForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWeightedAverageForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_np_average)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWeightedAverageBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWeightedAverageBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_mean)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<NumpyReduceAxesParam, 0>{"identity",
-                                       "red::sum{}", true});
+NNVM_REGISTER_OP(_npi_mean).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<NumpyReduceAxesParam, 0>{"identity", "red::sum{}", true});
 
 NNVM_REGISTER_OP(_backward_np_mean)
-.set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesBackwardUseNone<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyReduceAxesBackwardUseNone<gpu, true>);
 
-NNVM_REGISTER_OP(_npi_std)
-.set_attr<FCompute>("FCompute<gpu>", NumpyMomentsForward<gpu, true>);
+NNVM_REGISTER_OP(_npi_std).set_attr<FCompute>("FCompute<gpu>", NumpyMomentsForward<gpu, true>);
 
-NNVM_REGISTER_OP(_npi_var)
-.set_attr<FCompute>("FCompute<gpu>", NumpyMomentsForward<gpu, false>);
+NNVM_REGISTER_OP(_npi_var).set_attr<FCompute>("FCompute<gpu>", NumpyMomentsForward<gpu, false>);
 
 NNVM_REGISTER_OP(_npi_broadcast_to)
-.set_attr<FCompute>("FCompute<gpu>", NumpyBroadcastToForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyBroadcastToForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_np_broadcast_to)
-.set_attr<FCompute>("FCompute<gpu>", NumpyBroadcastToBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyBroadcastToBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_constraint_check.cc b/src/operator/numpy/np_constraint_check.cc
index 450f4ddb392b..b8e2af15caab 100644
--- a/src/operator/numpy/np_constraint_check.cc
+++ b/src/operator/numpy/np_constraint_check.cc
@@ -27,8 +27,8 @@
 namespace mxnet {
 namespace op {
 
-template<>
-void GetReduceOutput<cpu>(mshadow::Stream<cpu> *s, const TBlob &output_blob, bool *red_output) {
+template <>
+void GetReduceOutput<cpu>(mshadow::Stream<cpu>* s, const TBlob& output_blob, bool* red_output) {
   *red_output = static_cast<bool>(*output_blob.dptr<bool>());
 }
 
@@ -57,7 +57,7 @@ inline bool ConstraintCheckType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(ConstraintCheckParam);
 
 NNVM_REGISTER_OP(_npx_constraint_check)
-.describe(R"code(This operator will check if all the elements in a boolean tensor is true.
+    .describe(R"code(This operator will check if all the elements in a boolean tensor is true.
 If not, ValueError exception will be raised in the backend with given error message.
 In order to evaluate this operator, one should multiply the origin tensor by the return value
 of this operator to force this operator become part of the computation graph, otherwise the check
@@ -77,23 +77,23 @@ the boolean tensor `constraint`, a `ValueError` exception with given message
 'Scale should be larger than zero' would be raised.
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<ConstraintCheckParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"input"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ConstraintCheckShape)
-.set_attr<nnvm::FInferType>("FInferType", ConstraintCheckType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", ConstraintCheckForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input", "NDArray-or-Symbol", "Input boolean array")
-.add_arguments(ConstraintCheckParam::__FIELDS__());
+    .set_attr_parser(ParamParser<ConstraintCheckParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"input"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ConstraintCheckShape)
+    .set_attr<nnvm::FInferType>("FInferType", ConstraintCheckType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", ConstraintCheckForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input", "NDArray-or-Symbol", "Input boolean array")
+    .add_arguments(ConstraintCheckParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_constraint_check.cu b/src/operator/numpy/np_constraint_check.cu
index f83fca0e5c33..04a0a36f4043 100644
--- a/src/operator/numpy/np_constraint_check.cu
+++ b/src/operator/numpy/np_constraint_check.cu
@@ -27,19 +27,18 @@
 namespace mxnet {
 namespace op {
 
-template<>
-void GetReduceOutput<gpu>(mshadow::Stream<gpu> *s, const TBlob &output_blob, bool *red_output) {
-  bool tmp = true;
+template <>
+void GetReduceOutput<gpu>(mshadow::Stream<gpu>* s, const TBlob& output_blob, bool* red_output) {
+  bool tmp            = true;
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(&tmp, output_blob.dptr<bool>(),
-                            sizeof(bool), cudaMemcpyDeviceToHost,
-                            stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      &tmp, output_blob.dptr<bool>(), sizeof(bool), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   *red_output = static_cast<bool>(tmp);
 }
 
 NNVM_REGISTER_OP(_npx_constraint_check)
-.set_attr<FCompute>("FCompute<gpu>", ConstraintCheckForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ConstraintCheckForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_constraint_check.h b/src/operator/numpy/np_constraint_check.h
index 01c54b650616..4ef51731761f 100644
--- a/src/operator/numpy/np_constraint_check.h
+++ b/src/operator/numpy/np_constraint_check.h
@@ -33,20 +33,21 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
-void GetReduceOutput(mshadow::Stream<xpu> *s, const TBlob &output_blob, bool *red_output);
+template <typename xpu>
+void GetReduceOutput(mshadow::Stream<xpu>* s, const TBlob& output_blob, bool* red_output);
 
 struct ConstraintCheckParam : public dmlc::Parameter<ConstraintCheckParam> {
   std::string msg;
   DMLC_DECLARE_PARAMETER(ConstraintCheckParam) {
     DMLC_DECLARE_FIELD(msg)
-    .set_default("Constraint violated.")
-    .describe("Error message raised when constraint violated");
+        .set_default("Constraint violated.")
+        .describe("Error message raised when constraint violated");
   }
 };
 
 template <typename xpu>
-void ConstraintCheckForward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+void ConstraintCheckForward(const nnvm::NodeAttrs& attrs,
+                            const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& outputs) {
@@ -54,15 +55,12 @@ void ConstraintCheckForward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const ConstraintCheckParam& param =
-      nnvm::get<ConstraintCheckParam>(attrs.parsed);
+  const ConstraintCheckParam& param = nnvm::get<ConstraintCheckParam>(attrs.parsed);
 #if !defined(__CUDACC__)
-  ReduceAxesComputeImpl<xpu, mshadow_op::product, false, false,
-                        op::mshadow_op::identity>(ctx, inputs, req, outputs,
-                                                  outputs[0].shape_);
+  ReduceAxesComputeImpl<xpu, mshadow_op::product, false, false, op::mshadow_op::identity>(
+      ctx, inputs, req, outputs, outputs[0].shape_);
 #else
-  ReduceAxesRTCComputeImpl(ctx, inputs, req, outputs,
-                           outputs[0].shape_, "red::product{}");
+  ReduceAxesRTCComputeImpl(ctx, inputs, req, outputs, outputs[0].shape_, "red::product{}");
 #endif
   std::string msg = param.msg;
   bool red_output = true;
diff --git a/src/operator/numpy/np_cross-inl.h b/src/operator/numpy/np_cross-inl.h
index 7d5dd30d813b..e4d9d0884fca 100644
--- a/src/operator/numpy/np_cross-inl.h
+++ b/src/operator/numpy/np_cross-inl.h
@@ -45,17 +45,14 @@ using namespace mshadow;
 struct NumpyCrossParam : public dmlc::Parameter<NumpyCrossParam> {
   int axisa, axisb, axisc;
   DMLC_DECLARE_PARAMETER(NumpyCrossParam) {
-    DMLC_DECLARE_FIELD(axisa)
-    .set_default(-1)
-    .describe("Axis of `a` that defines the vector(s).  By default, the last axis.");
-    DMLC_DECLARE_FIELD(axisb)
-    .set_default(-1)
-    .describe("Axis of `b` that defines the vector(s).  By default, the last axis.");
-    DMLC_DECLARE_FIELD(axisc)
-    .set_default(-1)
-    .describe("Axis of `c` containing the cross product vector(s)."
-              "Ignored if both input vectors have dimension 2, as the return is scalar."
-              "By default, the last axis.");
+    DMLC_DECLARE_FIELD(axisa).set_default(-1).describe(
+        "Axis of `a` that defines the vector(s).  By default, the last axis.");
+    DMLC_DECLARE_FIELD(axisb).set_default(-1).describe(
+        "Axis of `b` that defines the vector(s).  By default, the last axis.");
+    DMLC_DECLARE_FIELD(axisc).set_default(-1).describe(
+        "Axis of `c` containing the cross product vector(s)."
+        "Ignored if both input vectors have dimension 2, as the return is scalar."
+        "By default, the last axis.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axisa_s, axisb_s, axisc_s;
@@ -68,62 +65,73 @@ struct NumpyCrossParam : public dmlc::Parameter<NumpyCrossParam> {
   }
 };
 
-#define SUM_NDIM_SWITCH(ndim, NDim, ...)  \
-  if (ndim == 1) {                    \
-    const int NDim = 1;               \
-    {__VA_ARGS__}                     \
-  } else if (ndim == 2) {             \
-    const int NDim = 2;               \
-    {__VA_ARGS__}                     \
-  } else if (ndim == 3) {             \
-    const int NDim = 3;               \
-    {__VA_ARGS__}                     \
-  } else if (ndim == 4) {             \
-    const int NDim = 4;               \
-    {__VA_ARGS__}                     \
-  } else if (ndim <= broadcast::MAX_DIM) {  \
-    const int NDim = broadcast::MAX_DIM;    \
-    {__VA_ARGS__}                     \
-  } else {                            \
-    LOG(FATAL) << "NDim too large ";  \
+#define SUM_NDIM_SWITCH(ndim, NDim, ...)   \
+  if (ndim == 1) {                         \
+    const int NDim = 1;                    \
+    { __VA_ARGS__ }                        \
+  } else if (ndim == 2) {                  \
+    const int NDim = 2;                    \
+    { __VA_ARGS__ }                        \
+  } else if (ndim == 3) {                  \
+    const int NDim = 3;                    \
+    { __VA_ARGS__ }                        \
+  } else if (ndim == 4) {                  \
+    const int NDim = 4;                    \
+    { __VA_ARGS__ }                        \
+  } else if (ndim <= broadcast::MAX_DIM) { \
+    const int NDim = broadcast::MAX_DIM;   \
+    { __VA_ARGS__ }                        \
+  } else {                                 \
+    LOG(FATAL) << "NDim too large ";       \
   }
 
 struct CrossInAssign {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType *in_ptr, DType *out_ptr,
-                                  const index_t stride, const index_t index, const size_t msize) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* in_ptr,
+                                  DType* out_ptr,
+                                  const index_t stride,
+                                  const index_t index,
+                                  const size_t msize) {
     if (index < stride && i * stride + index < msize) {
       out_ptr[i] = in_ptr[i * stride + index];
     }
   }
 };
 
-template<int req>
+template <int req>
 struct CrossOutAssign {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType *in_ptr, DType *out_ptr,
-                                  const int positive, const index_t stride,
-                                  const index_t index, const size_t msize) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* in_ptr,
+                                  DType* out_ptr,
+                                  const int positive,
+                                  const index_t stride,
+                                  const index_t index,
+                                  const size_t msize) {
     if (index < stride && i * stride + index < msize) {
       KERNEL_ASSIGN(out_ptr[i * stride + index], req, positive == 1 ? in_ptr[i] : -in_ptr[i]);
     }
   }
 };
 
-template<int req>
+template <int req>
 struct ResAssign {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType *in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, const DType* in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i]);
   }
 };
 
 struct DeleteAssign {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType *in_data, DType *out_data,
-                                  const int in_stride, const int out_stride) {
-    const DType *in_ptr = in_data + i * in_stride;
-    DType *out_ptr = out_data + i * out_stride;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* in_data,
+                                  DType* out_data,
+                                  const int in_stride,
+                                  const int out_stride) {
+    const DType* in_ptr = in_data + i * in_stride;
+    DType* out_ptr      = out_data + i * out_stride;
     if (in_stride == out_stride + 1) {
       for (int idx = 0; idx < out_stride; ++idx) {
         out_ptr[idx] = in_ptr[idx];
@@ -136,12 +144,14 @@ struct DeleteAssign {
 inline mxnet::Tuple<int> GetMoveaxisIndex(const int& source,
                                           const int& destination,
                                           const mxnet::TShape& shape) {
-  const int ndim = shape.ndim();
-  const int src_axis = CheckAxis(source, ndim);
+  const int ndim      = shape.ndim();
+  const int src_axis  = CheckAxis(source, ndim);
   const int dest_axis = CheckAxis(destination, ndim);
   std::vector<int> moveaxis_index_vec;
   for (int i = 0; i < ndim; ++i) {
-    if (i != src_axis) { moveaxis_index_vec.push_back(i); }
+    if (i != src_axis) {
+      moveaxis_index_vec.push_back(i);
+    }
   }
   moveaxis_index_vec.insert(moveaxis_index_vec.begin() + dest_axis, src_axis);
   return mxnet::Tuple<int>(moveaxis_index_vec);
@@ -151,7 +161,9 @@ inline mxnet::Tuple<int> GetMoveaxisIndex(const int& source,
 inline mxnet::TShape GetMoveaxisShape(const Tuple<int>& moveaxis_index,
                                       const mxnet::TShape& org_shape) {
   const int ndim = org_shape.ndim();
-  if (ndim == 0) { return mxnet::TShape(0, 0); }
+  if (ndim == 0) {
+    return mxnet::TShape(0, 0);
+  }
   CHECK_EQ(moveaxis_index.ndim(), org_shape.ndim()) << "moveaxis index dismatch original shape.";
   std::vector<size_t> moveaxis_shape_vec(ndim, -1);
   for (int i = 0; i < ndim; ++i) {
@@ -164,7 +176,7 @@ inline mxnet::TShape GetMoveaxisShape(const Tuple<int>& moveaxis_index,
 inline void GetOrCheckLRShape(const nnvm::NodeAttrs& attrs,
                               const mxnet::TShape& a_moveaxis_shape,
                               const mxnet::TShape& b_moveaxis_shape,
-                              mxnet::TShape *c_shape_ptr = nullptr) {
+                              mxnet::TShape* c_shape_ptr = nullptr) {
   const int a_ndim = a_moveaxis_shape.ndim();
   const int b_ndim = b_moveaxis_shape.ndim();
   mxnet::TShape a_cutoff_shape(a_ndim - 1, -1);
@@ -175,8 +187,8 @@ inline void GetOrCheckLRShape(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < b_ndim - 1; ++i) {
     b_cutoff_shape[i] = b_moveaxis_shape[i];
   }
-  mxnet::ShapeVector in_shape_vec({ a_cutoff_shape, b_cutoff_shape});
-  mxnet::ShapeVector out_shape_vec({ mxnet::TShape() });
+  mxnet::ShapeVector in_shape_vec({a_cutoff_shape, b_cutoff_shape});
+  mxnet::ShapeVector out_shape_vec({mxnet::TShape()});
   mxnet::op::BinaryBroadcastShape(attrs, &in_shape_vec, &out_shape_vec);
   if (c_shape_ptr && (a_moveaxis_shape[a_ndim - 1] == 3 || b_moveaxis_shape[b_ndim - 1] == 3)) {
     mxnet::TShape c_shape(out_shape_vec[0].ndim() + 1, -1);
@@ -184,7 +196,7 @@ inline void GetOrCheckLRShape(const nnvm::NodeAttrs& attrs,
       c_shape[i] = out_shape_vec[0][i];
     }
     c_shape[c_shape.ndim() - 1] = 3;
-    *c_shape_ptr = c_shape;
+    *c_shape_ptr                = c_shape;
   } else {
     *c_shape_ptr = out_shape_vec[0];
   }
@@ -192,22 +204,25 @@ inline void GetOrCheckLRShape(const nnvm::NodeAttrs& attrs,
 
 // Get data[..., 0] shape.
 inline mxnet::TShape GetCutoffShape(const mxnet::TShape& shape) {
-  if (shape.ndim() == 0 || !ndim_is_known(shape)) { return mxnet::TShape(0, 0); }
+  if (shape.ndim() == 0 || !ndim_is_known(shape)) {
+    return mxnet::TShape(0, 0);
+  }
   mxnet::TShape cutoff_shape(shape.ndim() - 1, -1);
-  for (int i = 0; i < shape.ndim() - 1; ++i) { cutoff_shape[i] = shape[i]; }
+  for (int i = 0; i < shape.ndim() - 1; ++i) {
+    cutoff_shape[i] = shape[i];
+  }
   return cutoff_shape;
 }
 
-template<typename DType>
-inline size_t AligndWorkspaceSize(const size_t& offset,
-                                  const size_t& add_size) {
+template <typename DType>
+inline size_t AligndWorkspaceSize(const size_t& offset, const size_t& add_size) {
   size_t m32 = 32;
   size_t wks = offset + add_size;
   return ((wks * sizeof(DType) + m32 - 1) / m32 * m32 + sizeof(DType) - 1) / sizeof(DType);
 }
 
 // Calculate workspace size for numpy cross forward op.
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 inline size_t NumpyCrossWorkspaceSize(const mxnet::TShape& a_moveaxis_shape,
                                       const mxnet::TShape& b_moveaxis_shape,
                                       const mxnet::TShape& c_moveaxis_shape,
@@ -215,14 +230,18 @@ inline size_t NumpyCrossWorkspaceSize(const mxnet::TShape& a_moveaxis_shape,
                                       const int& b_axis,
                                       const OpContext& ctx,
                                       const std::vector<OpReqType>& req) {
-  if (kNullOp == req[0]) { return 0U; }
+  if (kNullOp == req[0]) {
+    return 0U;
+  }
   // Zero-size input, no need to launch kernel
-  if (0U == a_moveaxis_shape.Size() || 0U == b_moveaxis_shape.Size()) { return 0U; }
+  if (0U == a_moveaxis_shape.Size() || 0U == b_moveaxis_shape.Size()) {
+    return 0U;
+  }
 
   size_t workspace_size = 0;
-  const int a_ndim = a_moveaxis_shape.ndim();
-  const int b_ndim = b_moveaxis_shape.ndim();
-  const int c_ndim = c_moveaxis_shape.ndim();
+  const int a_ndim      = a_moveaxis_shape.ndim();
+  const int b_ndim      = b_moveaxis_shape.ndim();
+  const int c_ndim      = c_moveaxis_shape.ndim();
 
   if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
     if (a_moveaxis_shape[a_ndim - 1] == 2 && b_moveaxis_shape[b_ndim - 1] == 2) {
@@ -237,33 +256,31 @@ inline size_t NumpyCrossWorkspaceSize(const mxnet::TShape& a_moveaxis_shape,
       workspace_size += c_moveaxis_shape.Size();
       workspace_size += 3 * c_moveaxis_shape.ProdShape(0, c_ndim - 1);
     }
-    if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
+    if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
       workspace_size += a_moveaxis_shape.Size();
       workspace_size += b_moveaxis_shape.Size();
     }
   } else {
     if (a_moveaxis_shape[a_ndim - 1] == 2 && b_moveaxis_shape[b_ndim - 1] == 2) {
       // Case 1: a.shape[-1] == 2 and b.shape[-1] == 2, param.axisc is ignored.
-      workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                  a_moveaxis_shape.ProdShape(0, a_ndim - 1));
-      workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                  b_moveaxis_shape.ProdShape(0, b_ndim - 1));
-      workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                  c_moveaxis_shape.Size());
+      workspace_size =
+          AligndWorkspaceSize<DType>(workspace_size, a_moveaxis_shape.ProdShape(0, a_ndim - 1));
+      workspace_size =
+          AligndWorkspaceSize<DType>(workspace_size, b_moveaxis_shape.ProdShape(0, b_ndim - 1));
+      workspace_size = AligndWorkspaceSize<DType>(workspace_size, c_moveaxis_shape.Size());
     } else {
       // Case 2, 3, 4: a.shape[-1] == 3 or b.shape[-1] == 3, param.axisc is not ignored.
-      workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                  a_moveaxis_shape.ProdShape(0, a_ndim - 1));
-      workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                  b_moveaxis_shape.ProdShape(0, b_ndim - 1));
+      workspace_size =
+          AligndWorkspaceSize<DType>(workspace_size, a_moveaxis_shape.ProdShape(0, a_ndim - 1));
+      workspace_size =
+          AligndWorkspaceSize<DType>(workspace_size, b_moveaxis_shape.ProdShape(0, b_ndim - 1));
       for (int i = 0; i < 3; ++i) {
-        workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                    c_moveaxis_shape.ProdShape(0, c_ndim - 1));
+        workspace_size =
+            AligndWorkspaceSize<DType>(workspace_size, c_moveaxis_shape.ProdShape(0, c_ndim - 1));
       }
-      workspace_size = AligndWorkspaceSize<DType>(workspace_size,
-                                                  c_moveaxis_shape.Size());
+      workspace_size = AligndWorkspaceSize<DType>(workspace_size, c_moveaxis_shape.Size());
     }
-    if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
+    if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
       workspace_size = AligndWorkspaceSize<DType>(workspace_size, a_moveaxis_shape.Size());
       workspace_size = AligndWorkspaceSize<DType>(workspace_size, b_moveaxis_shape.Size());
     }
@@ -271,73 +288,83 @@ inline size_t NumpyCrossWorkspaceSize(const mxnet::TShape& a_moveaxis_shape,
   return workspace_size;
 }
 
-template<typename xpu, typename DType, int a_dim, int b_dim>
+template <typename xpu, typename DType, int a_dim, int b_dim>
 struct NumpyCrossForwardImpl {
-  static void op(const TBlob& a, const TBlob& b, const TBlob& c,
+  static void op(const TBlob& a,
+                 const TBlob& b,
+                 const TBlob& c,
                  const std::vector<Tuple<int> >& moveaxis_index_vec,
                  const std::vector<mxnet::TShape>& moveaxis_shape_vec,
-                 const int a_axis, const int b_axis, const int c_axis,
+                 const int a_axis,
+                 const int b_axis,
+                 const int c_axis,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<OpReqType>& req,
                  const Tensor<xpu, 1, DType>& workspace) {
     CHECK(a_dim == 3 || b_dim == 3)
-      << "no specialized NumpyCrossOp defined for template parameters.";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const Tuple<int>& a_moveaxis_index = moveaxis_index_vec[0];
-    const Tuple<int>& b_moveaxis_index = moveaxis_index_vec[1];
+        << "no specialized NumpyCrossOp defined for template parameters.";
+    Stream<xpu>* s                        = ctx.get_stream<xpu>();
+    const Tuple<int>& a_moveaxis_index    = moveaxis_index_vec[0];
+    const Tuple<int>& b_moveaxis_index    = moveaxis_index_vec[1];
     const mxnet::TShape& a_moveaxis_shape = moveaxis_shape_vec[0];
     const mxnet::TShape& b_moveaxis_shape = moveaxis_shape_vec[1];
     const mxnet::TShape& c_moveaxis_shape = moveaxis_shape_vec[2];
-    const int a_ndim = a_moveaxis_shape.ndim();
-    const int b_ndim = b_moveaxis_shape.ndim();
-    const int c_ndim = b_moveaxis_shape.ndim();
+    const int a_ndim                      = a_moveaxis_shape.ndim();
+    const int b_ndim                      = b_moveaxis_shape.ndim();
+    const int c_ndim                      = b_moveaxis_shape.ndim();
     CHECK_EQ(c_moveaxis_shape[c_ndim - 1], 3)
-      << "no specialized NumpyCrossOp defined for template parameters.";
+        << "no specialized NumpyCrossOp defined for template parameters.";
 
     TBlob aw_data, bw_data, c_data, cw_data, a_data, b_data;
     std::vector<TBlob> cw_data_vec;
     if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
       // Allocate workspace in cpu, no need to align address.
-      DType *aw_ptr = workspace.dptr_;
-      DType *bw_ptr = aw_ptr + a_moveaxis_shape.ProdShape(0, a_ndim - 1);
-      DType *cw_ptr = bw_ptr + b_moveaxis_shape.ProdShape(0, b_ndim - 1);
-      DType *c_ptr = cw_ptr + 3 * c_moveaxis_shape.ProdShape(0, c_ndim - 1);
-      a_data = a;
-      b_data = b;
-      if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
-        DType *a_ptr = c_ptr + c_moveaxis_shape.Size();
-        DType *b_ptr = a_ptr + a_moveaxis_shape.Size();
-        a_data = TBlob(a_ptr, a_moveaxis_shape, a.dev_mask(), a.dev_id());
-        b_data = TBlob(b_ptr, b_moveaxis_shape, b.dev_mask(), b.dev_id());
-        TransposeImpl<xpu>(ctx.run_ctx, a, a_data,
+      DType* aw_ptr = workspace.dptr_;
+      DType* bw_ptr = aw_ptr + a_moveaxis_shape.ProdShape(0, a_ndim - 1);
+      DType* cw_ptr = bw_ptr + b_moveaxis_shape.ProdShape(0, b_ndim - 1);
+      DType* c_ptr  = cw_ptr + 3 * c_moveaxis_shape.ProdShape(0, c_ndim - 1);
+      a_data        = a;
+      b_data        = b;
+      if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
+        DType* a_ptr = c_ptr + c_moveaxis_shape.Size();
+        DType* b_ptr = a_ptr + a_moveaxis_shape.Size();
+        a_data       = TBlob(a_ptr, a_moveaxis_shape, a.dev_mask(), a.dev_id());
+        b_data       = TBlob(b_ptr, b_moveaxis_shape, b.dev_mask(), b.dev_id());
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           a,
+                           a_data,
                            mxnet::TShape(a_moveaxis_index.begin(), a_moveaxis_index.end()));
-        TransposeImpl<xpu>(ctx.run_ctx, b, b_data,
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           b,
+                           b_data,
                            mxnet::TShape(b_moveaxis_index.begin(), b_moveaxis_index.end()));
       }
       aw_data = TBlob(aw_ptr, GetCutoffShape(a_moveaxis_shape), a.dev_mask(), a.dev_id());
       bw_data = TBlob(bw_ptr, GetCutoffShape(b_moveaxis_shape), b.dev_mask(), b.dev_id());
       cw_data = TBlob(cw_ptr, c_moveaxis_shape, c.dev_mask(), c.dev_id());
-      c_data = TBlob(c_ptr, c_moveaxis_shape, c.dev_mask(), c.dev_id());
+      c_data  = TBlob(c_ptr, c_moveaxis_shape, c.dev_mask(), c.dev_id());
       for (int i = 0; i < 3; ++i) {
         cw_data_vec.push_back(TBlob(cw_ptr + i * c_moveaxis_shape.ProdShape(0, c_ndim - 1),
-                                    GetCutoffShape(c_moveaxis_shape), c.dev_mask(), c.dev_id()));
+                                    GetCutoffShape(c_moveaxis_shape),
+                                    c.dev_mask(),
+                                    c.dev_id()));
       }
     } else {
       // Allocate workspace in gpu, need to align address.
       size_t offset = 0;
-      aw_data = TBlob(workspace.dptr_ + offset, GetCutoffShape(a_moveaxis_shape),
-                      a.dev_mask(), a.dev_id());
+      aw_data       = TBlob(
+          workspace.dptr_ + offset, GetCutoffShape(a_moveaxis_shape), a.dev_mask(), a.dev_id());
       offset = AligndWorkspaceSize<DType>(offset, aw_data.shape_.Size());
 
-      bw_data = TBlob(workspace.dptr_ + offset, GetCutoffShape(b_moveaxis_shape),
-                      b.dev_mask(), b.dev_id());
+      bw_data = TBlob(
+          workspace.dptr_ + offset, GetCutoffShape(b_moveaxis_shape), b.dev_mask(), b.dev_id());
       offset = AligndWorkspaceSize<DType>(offset, bw_data.shape_.Size());
 
       cw_data = TBlob(workspace.dptr_ + offset, c_moveaxis_shape, c.dev_mask(), c.dev_id());
       for (int i = 0; i < 3; ++i) {
-        cw_data_vec.push_back(TBlob(workspace.dptr_ + offset,
-                                    GetCutoffShape(c_moveaxis_shape), c.dev_mask(), c.dev_id()));
+        cw_data_vec.push_back(TBlob(
+            workspace.dptr_ + offset, GetCutoffShape(c_moveaxis_shape), c.dev_mask(), c.dev_id()));
         offset = AligndWorkspaceSize<DType>(offset, cw_data_vec[i].shape_.Size());
       }
       c_data = TBlob(workspace.dptr_ + offset, c_moveaxis_shape, c.dev_mask(), c.dev_id());
@@ -345,187 +372,227 @@ struct NumpyCrossForwardImpl {
 
       a_data = a;
       b_data = b;
-      if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
-        a_data = TBlob(workspace.dptr_ + offset, a_moveaxis_shape,
-                       a.dev_mask(), a.dev_id());
+      if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
+        a_data = TBlob(workspace.dptr_ + offset, a_moveaxis_shape, a.dev_mask(), a.dev_id());
         offset = AligndWorkspaceSize<DType>(offset, a_data.shape_.Size());
 
-        b_data = TBlob(workspace.dptr_ + offset, b_moveaxis_shape,
-                       b.dev_mask(), b.dev_id());
+        b_data = TBlob(workspace.dptr_ + offset, b_moveaxis_shape, b.dev_mask(), b.dev_id());
         offset = AligndWorkspaceSize<DType>(offset, b_data.shape_.Size());
 
-        TransposeImpl<xpu>(ctx.run_ctx, a, a_data,
-                          mxnet::TShape(a_moveaxis_index.begin(), a_moveaxis_index.end()));
-        TransposeImpl<xpu>(ctx.run_ctx, b, b_data,
-                          mxnet::TShape(b_moveaxis_index.begin(), b_moveaxis_index.end()));
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           a,
+                           a_data,
+                           mxnet::TShape(a_moveaxis_index.begin(), a_moveaxis_index.end()));
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           b,
+                           b_data,
+                           mxnet::TShape(b_moveaxis_index.begin(), b_moveaxis_index.end()));
       }
     }
     std::vector<int> positive_vec;
     std::vector<int> a_index_vec, b_index_vec, c_index_vec;
     std::vector<OpReqType> req_vec;
     if (a_dim == 2 && b_dim == 3) {
-      a_index_vec = {1, 0, 0, 1};
-      b_index_vec = {2, 2, 1, 0};
-      c_index_vec = {0, 1, 2, 2};
+      a_index_vec  = {1, 0, 0, 1};
+      b_index_vec  = {2, 2, 1, 0};
+      c_index_vec  = {0, 1, 2, 2};
       positive_vec = {1, 0, 1, 0};
-      req_vec = { kWriteTo, kWriteTo, kWriteTo, kAddTo };
+      req_vec      = {kWriteTo, kWriteTo, kWriteTo, kAddTo};
     } else if (a_dim == 3 && b_dim == 2) {
-      a_index_vec = {2, 2, 0, 1};
-      b_index_vec = {1, 0, 1, 0};
-      c_index_vec = {0, 1, 2, 2};
+      a_index_vec  = {2, 2, 0, 1};
+      b_index_vec  = {1, 0, 1, 0};
+      c_index_vec  = {0, 1, 2, 2};
       positive_vec = {0, 1, 1, 0};
-      req_vec = { kWriteTo, kWriteTo, kWriteTo, kAddTo };
+      req_vec      = {kWriteTo, kWriteTo, kWriteTo, kAddTo};
     } else {
-      a_index_vec = {1, 2, 2, 0, 0, 1};
-      b_index_vec = {2, 1, 0, 2, 1, 0};
-      c_index_vec = {0, 0, 1, 1, 2, 2};
+      a_index_vec  = {1, 2, 2, 0, 0, 1};
+      b_index_vec  = {2, 1, 0, 2, 1, 0};
+      c_index_vec  = {0, 0, 1, 1, 2, 2};
       positive_vec = {1, 0, 1, 0, 1, 0};
-      req_vec = { kWriteTo, kAddTo, kWriteTo, kAddTo, kWriteTo, kAddTo};
+      req_vec      = {kWriteTo, kAddTo, kWriteTo, kAddTo, kWriteTo, kAddTo};
     }
     for (size_t i = 0; i < a_index_vec.size(); ++i) {
       int idx = c_index_vec[i];
-      mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, aw_data.Size(), a_data.dptr<DType>(),
-                                                   aw_data.dptr<DType>(), a_data.size(a_ndim - 1),
-                                                   a_index_vec[i], a_data.Size());
-      mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, bw_data.Size(), b_data.dptr<DType>(),
-                                                   bw_data.dptr<DType>(), b_data.size(b_ndim - 1),
-                                                   b_index_vec[i], b_data.Size());
+      mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                   aw_data.Size(),
+                                                   a_data.dptr<DType>(),
+                                                   aw_data.dptr<DType>(),
+                                                   a_data.size(a_ndim - 1),
+                                                   a_index_vec[i],
+                                                   a_data.Size());
+      mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                   bw_data.Size(),
+                                                   b_data.dptr<DType>(),
+                                                   bw_data.dptr<DType>(),
+                                                   b_data.size(b_ndim - 1),
+                                                   b_index_vec[i],
+                                                   b_data.Size());
 #if !defined(__CUDACC__)
-      BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { aw_data, bw_data },
-                                                       { kWriteTo }, { cw_data_vec[idx] });
+      BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+          attrs, ctx, {aw_data, bw_data}, {kWriteTo}, {cw_data_vec[idx]});
 #else
-      BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { aw_data, bw_data },
-                                        { kWriteTo }, { cw_data_vec[idx] });
+      BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+          attrs,
+          ctx,
+          {aw_data, bw_data},
+          {kWriteTo},
+          {cw_data_vec[idx]});
 #endif  // !defined(__CUDACC__)
       MXNET_ASSIGN_REQ_SWITCH(req_vec[i], req_type, {
-        mxnet_op::Kernel<CrossOutAssign<req_type>, xpu>::Launch(s, cw_data_vec[idx].Size(),
+        mxnet_op::Kernel<CrossOutAssign<req_type>, xpu>::Launch(s,
+                                                                cw_data_vec[idx].Size(),
                                                                 cw_data_vec[idx].dptr<DType>(),
                                                                 c_data.dptr<DType>(),
                                                                 positive_vec[i],
                                                                 c_data.size(c_ndim - 1),
-                                                                idx, c_data.Size());
+                                                                idx,
+                                                                c_data.Size());
       });
     }
-    cw_data = cw_data.reshape(c.shape_);
-    const DType *res_ptr = c_data.dptr<DType>();
-    if (c_axis != c_ndim -1) {
+    cw_data              = cw_data.reshape(c.shape_);
+    const DType* res_ptr = c_data.dptr<DType>();
+    if (c_axis != c_ndim - 1) {
       const Tuple<int> c_axis_index = GetMoveaxisIndex(-1, c_axis, c_moveaxis_shape);
-      TransposeImpl<xpu>(ctx.run_ctx, c_data, cw_data,
-                         mxnet::TShape(c_axis_index.begin(), c_axis_index.end()));
+      TransposeImpl<xpu>(
+          ctx.run_ctx, c_data, cw_data, mxnet::TShape(c_axis_index.begin(), c_axis_index.end()));
       res_ptr = cw_data.dptr<DType>();
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-        s, c.Size(), res_ptr, c.dptr<DType>());
+      mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(s, c.Size(), res_ptr, c.dptr<DType>());
     });
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 struct NumpyCrossForwardImpl<xpu, DType, 2, 2> {
-  static void op(const TBlob& a, const TBlob& b, const TBlob& c,
+  static void op(const TBlob& a,
+                 const TBlob& b,
+                 const TBlob& c,
                  const std::vector<Tuple<int> >& moveaxis_index_vec,
                  const std::vector<mxnet::TShape>& moveaxis_shape_vec,
-                 const int a_axis, const int b_axis, const int c_axis,
+                 const int a_axis,
+                 const int b_axis,
+                 const int c_axis,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<OpReqType>& req,
                  const Tensor<xpu, 1, DType>& workspace) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const Tuple<int>& a_moveaxis_index = moveaxis_index_vec[0];
-    const Tuple<int>& b_moveaxis_index = moveaxis_index_vec[1];
+    Stream<xpu>* s                        = ctx.get_stream<xpu>();
+    const Tuple<int>& a_moveaxis_index    = moveaxis_index_vec[0];
+    const Tuple<int>& b_moveaxis_index    = moveaxis_index_vec[1];
     const mxnet::TShape& a_moveaxis_shape = moveaxis_shape_vec[0];
     const mxnet::TShape& b_moveaxis_shape = moveaxis_shape_vec[1];
-    const mxnet::TShape& c_shape = c.shape_;
-    const int a_ndim = a_moveaxis_shape.ndim();
-    const int b_ndim = b_moveaxis_shape.ndim();
+    const mxnet::TShape& c_shape          = c.shape_;
+    const int a_ndim                      = a_moveaxis_shape.ndim();
+    const int b_ndim                      = b_moveaxis_shape.ndim();
 
     TBlob aw_data, bw_data, cw_data, a_data, b_data;
     if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
       // Allocate workspace in cpu, no need to align address.
-      DType *aw_ptr = workspace.dptr_;
-      DType *bw_ptr = aw_ptr + a_moveaxis_shape.ProdShape(0, a_ndim - 1);
-      DType *cw_ptr = bw_ptr + b_moveaxis_shape.ProdShape(0, b_ndim - 1);
-      aw_data = TBlob(aw_ptr, GetCutoffShape(a_moveaxis_shape), a.dev_mask(), a.dev_id());
-      bw_data = TBlob(bw_ptr, GetCutoffShape(b_moveaxis_shape), b.dev_mask(), b.dev_id());
-      cw_data = TBlob(cw_ptr, c_shape, c.dev_mask(), c.dev_id());
-      a_data = a;
-      b_data = b;
-      if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
-        DType *a_ptr = cw_ptr + c_shape.Size();
-        DType *b_ptr = a_ptr + a_moveaxis_shape.Size();
-        a_data = TBlob(a_ptr, a_moveaxis_shape, a.dev_mask(), a.dev_id());
-        b_data = TBlob(b_ptr, b_moveaxis_shape, b.dev_mask(), b.dev_id());
-        TransposeImpl<xpu>(ctx.run_ctx, a, a_data,
+      DType* aw_ptr = workspace.dptr_;
+      DType* bw_ptr = aw_ptr + a_moveaxis_shape.ProdShape(0, a_ndim - 1);
+      DType* cw_ptr = bw_ptr + b_moveaxis_shape.ProdShape(0, b_ndim - 1);
+      aw_data       = TBlob(aw_ptr, GetCutoffShape(a_moveaxis_shape), a.dev_mask(), a.dev_id());
+      bw_data       = TBlob(bw_ptr, GetCutoffShape(b_moveaxis_shape), b.dev_mask(), b.dev_id());
+      cw_data       = TBlob(cw_ptr, c_shape, c.dev_mask(), c.dev_id());
+      a_data        = a;
+      b_data        = b;
+      if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
+        DType* a_ptr = cw_ptr + c_shape.Size();
+        DType* b_ptr = a_ptr + a_moveaxis_shape.Size();
+        a_data       = TBlob(a_ptr, a_moveaxis_shape, a.dev_mask(), a.dev_id());
+        b_data       = TBlob(b_ptr, b_moveaxis_shape, b.dev_mask(), b.dev_id());
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           a,
+                           a_data,
                            mxnet::TShape(a_moveaxis_index.begin(), a_moveaxis_index.end()));
-        TransposeImpl<xpu>(ctx.run_ctx, b, b_data,
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           b,
+                           b_data,
                            mxnet::TShape(b_moveaxis_index.begin(), b_moveaxis_index.end()));
       }
     } else {
       // Allocate workspace in cpu, need to align address.
       size_t offset = 0;
-      aw_data = TBlob(workspace.dptr_ + offset, GetCutoffShape(a_moveaxis_shape),
-                      a.dev_mask(), a.dev_id());
+      aw_data       = TBlob(
+          workspace.dptr_ + offset, GetCutoffShape(a_moveaxis_shape), a.dev_mask(), a.dev_id());
       offset = AligndWorkspaceSize<DType>(offset, aw_data.shape_.Size());
 
-      bw_data = TBlob(workspace.dptr_ + offset, GetCutoffShape(b_moveaxis_shape),
-                      b.dev_mask(), b.dev_id());
+      bw_data = TBlob(
+          workspace.dptr_ + offset, GetCutoffShape(b_moveaxis_shape), b.dev_mask(), b.dev_id());
       offset = AligndWorkspaceSize<DType>(offset, bw_data.shape_.Size());
 
-      cw_data = TBlob(workspace.dptr_ + offset, c_shape,
-                      c.dev_mask(), c.dev_id());
-      offset = AligndWorkspaceSize<DType>(offset, cw_data.shape_.Size());
-      a_data = a;
-      b_data = b;
-      if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
-        a_data = TBlob(workspace.dptr_ + offset, a_moveaxis_shape,
-                       a.dev_mask(), a.dev_id());
+      cw_data = TBlob(workspace.dptr_ + offset, c_shape, c.dev_mask(), c.dev_id());
+      offset  = AligndWorkspaceSize<DType>(offset, cw_data.shape_.Size());
+      a_data  = a;
+      b_data  = b;
+      if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
+        a_data = TBlob(workspace.dptr_ + offset, a_moveaxis_shape, a.dev_mask(), a.dev_id());
         offset = AligndWorkspaceSize<DType>(offset, a_data.shape_.Size());
 
-        b_data = TBlob(workspace.dptr_ + offset, b_moveaxis_shape,
-                       b.dev_mask(), b.dev_id());
+        b_data = TBlob(workspace.dptr_ + offset, b_moveaxis_shape, b.dev_mask(), b.dev_id());
         offset = AligndWorkspaceSize<DType>(offset, b_data.shape_.Size());
 
-        TransposeImpl<xpu>(ctx.run_ctx, a, a_data,
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           a,
+                           a_data,
                            mxnet::TShape(a_moveaxis_index.begin(), a_moveaxis_index.end()));
-        TransposeImpl<xpu>(ctx.run_ctx, b, b_data,
+        TransposeImpl<xpu>(ctx.run_ctx,
+                           b,
+                           b_data,
                            mxnet::TShape(b_moveaxis_index.begin(), b_moveaxis_index.end()));
       }
     }
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, aw_data.Size(), a_data.dptr<DType>(),
-                                                 aw_data.dptr<DType>(), a_data.size(a_ndim - 1),
-                                                 0, a_data.Size());
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, bw_data.Size(), b_data.dptr<DType>(),
-                                                 bw_data.dptr<DType>(), b_data.size(b_ndim - 1),
-                                                 1, b_data.Size());
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 aw_data.Size(),
+                                                 a_data.dptr<DType>(),
+                                                 aw_data.dptr<DType>(),
+                                                 a_data.size(a_ndim - 1),
+                                                 0,
+                                                 a_data.Size());
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 bw_data.Size(),
+                                                 b_data.dptr<DType>(),
+                                                 bw_data.dptr<DType>(),
+                                                 b_data.size(b_ndim - 1),
+                                                 1,
+                                                 b_data.Size());
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { aw_data, bw_data },
-                                                     { req[0] }, { c });
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, {aw_data, bw_data}, {req[0]}, {c});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { aw_data, bw_data },
-                                      { req[0] }, { c });
+    BinaryBroadcastRTCCompute{"mul"}(attrs, ctx, {aw_data, bw_data}, {req[0]}, {c});  // NOLINT
 #endif  // !defined(__CUDACC__)
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, aw_data.Size(), a_data.dptr<DType>(),
-                                                 aw_data.dptr<DType>(), a_data.size(a_ndim - 1),
-                                                 1, a_data.Size());
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, bw_data.Size(), b_data.dptr<DType>(),
-                                                 bw_data.dptr<DType>(), b_data.size(b_ndim - 1),
-                                                 0, b_data.Size());
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 aw_data.Size(),
+                                                 a_data.dptr<DType>(),
+                                                 aw_data.dptr<DType>(),
+                                                 a_data.size(a_ndim - 1),
+                                                 1,
+                                                 a_data.Size());
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 bw_data.Size(),
+                                                 b_data.dptr<DType>(),
+                                                 bw_data.dptr<DType>(),
+                                                 b_data.size(b_ndim - 1),
+                                                 0,
+                                                 b_data.Size());
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { aw_data, bw_data },
-                                                     { kWriteTo }, { cw_data });
-    BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(attrs, ctx, { c, cw_data },
-                                                       { kWriteTo }, { c });
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {aw_data, bw_data}, {kWriteTo}, {cw_data});
+    BinaryBroadcastCompute<xpu, op::mshadow_op::minus>(attrs, ctx, {c, cw_data}, {kWriteTo}, {c});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { aw_data, bw_data },
-                                      { kWriteTo }, { cw_data });
-    BinaryBroadcastRTCCompute {"sub"}(attrs, ctx, { c, cw_data },
-                                      { kWriteTo }, { c });
+    BinaryBroadcastRTCCompute{"mul"}(                                                 // NOLINT
+        attrs,
+        ctx,
+        {aw_data, bw_data},
+        {kWriteTo},
+        {cw_data});
+    BinaryBroadcastRTCCompute{"sub"}(attrs, ctx, {c, cw_data}, {kWriteTo}, {c});  // NOLINT
 #endif  // !defined(__CUDACC__)
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyCrossForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -536,68 +603,65 @@ void NumpyCrossForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   const TBlob& a = inputs[0];
   const TBlob& b = inputs[1];
   const TBlob& c = outputs[0];
 
-  if (kNullOp == req[0]) { return; }
+  if (kNullOp == req[0]) {
+    return;
+  }
   // Zero-size output, no need to launch kernel
-  if (0U == a.Size() || 0U == b.Size()) { return; }
+  if (0U == a.Size() || 0U == b.Size()) {
+    return;
+  }
 
-  const NumpyCrossParam& param = nnvm::get<NumpyCrossParam>(attrs.parsed);
-  const mxnet::TShape& a_shape = a.shape_;
-  const mxnet::TShape& b_shape = b.shape_;
-  const mxnet::TShape& c_shape = c.shape_;
-  const int a_ndim = a_shape.ndim();
-  const int b_ndim = b_shape.ndim();
-  const int c_ndim = c_shape.ndim();
-  Tuple<int> a_moveaxis_index = GetMoveaxisIndex(param.axisa, -1, a_shape);
-  Tuple<int> b_moveaxis_index = GetMoveaxisIndex(param.axisb, -1, b_shape);
-  Tuple<int> c_moveaxis_index = GetMoveaxisIndex(param.axisc, -1, c_shape);
+  const NumpyCrossParam& param   = nnvm::get<NumpyCrossParam>(attrs.parsed);
+  const mxnet::TShape& a_shape   = a.shape_;
+  const mxnet::TShape& b_shape   = b.shape_;
+  const mxnet::TShape& c_shape   = c.shape_;
+  const int a_ndim               = a_shape.ndim();
+  const int b_ndim               = b_shape.ndim();
+  const int c_ndim               = c_shape.ndim();
+  Tuple<int> a_moveaxis_index    = GetMoveaxisIndex(param.axisa, -1, a_shape);
+  Tuple<int> b_moveaxis_index    = GetMoveaxisIndex(param.axisb, -1, b_shape);
+  Tuple<int> c_moveaxis_index    = GetMoveaxisIndex(param.axisc, -1, c_shape);
   mxnet::TShape a_moveaxis_shape = GetMoveaxisShape(a_moveaxis_index, a_shape);
   mxnet::TShape b_moveaxis_shape = GetMoveaxisShape(b_moveaxis_index, b_shape);
   mxnet::TShape c_moveaxis_shape = GetMoveaxisShape(c_moveaxis_index, c_shape);
-  const int a_axis = CheckAxis(param.axisa, a_ndim);
-  const int b_axis = CheckAxis(param.axisb, b_ndim);
-  const int c_axis = CheckAxis(param.axisc, c_ndim);
-  const std::vector<mxnet::TShape > shape_vec({ a_moveaxis_shape, b_moveaxis_shape,
-                                                c_moveaxis_shape });
-  const std::vector<Tuple<int> > index_vec({ a_moveaxis_index, b_moveaxis_index,
-                                             c_moveaxis_index });
+  const int a_axis               = CheckAxis(param.axisa, a_ndim);
+  const int b_axis               = CheckAxis(param.axisb, b_ndim);
+  const int c_axis               = CheckAxis(param.axisc, c_ndim);
+  const std::vector<mxnet::TShape> shape_vec(
+      {a_moveaxis_shape, b_moveaxis_shape, c_moveaxis_shape});
+  const std::vector<Tuple<int> > index_vec({a_moveaxis_index, b_moveaxis_index, c_moveaxis_index});
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(c.type_flag_, DType, {
     // Calculate workspace.
-    size_t workspace_size = NumpyCrossWorkspaceSize<xpu, DType>(a_moveaxis_shape,
-                                                                b_moveaxis_shape,
-                                                                c_moveaxis_shape,
-                                                                a_axis, b_axis, ctx, req);
-    Tensor<xpu, 1, DType> workspace = ctx.requested[0].get_space_typed<xpu, 1, DType>(
-      Shape1(workspace_size), s);
+    size_t workspace_size = NumpyCrossWorkspaceSize<xpu, DType>(
+        a_moveaxis_shape, b_moveaxis_shape, c_moveaxis_shape, a_axis, b_axis, ctx, req);
+    Tensor<xpu, 1, DType> workspace =
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(workspace_size), s);
 
     if (a_moveaxis_shape[a_ndim - 1] == 2) {
       if (b_moveaxis_shape[b_ndim - 1] == 2) {
         // Case 1: a.shape[-1] == 2 and b.shape[-1] == 2, param.axisc is ignored.
-        NumpyCrossForwardImpl<xpu, DType, 2, 2>::op(a, b, c, index_vec, shape_vec,
-                                                    a_axis, b_axis, c_axis,
-                                                    attrs, ctx, req, workspace);
+        NumpyCrossForwardImpl<xpu, DType, 2, 2>::op(
+            a, b, c, index_vec, shape_vec, a_axis, b_axis, c_axis, attrs, ctx, req, workspace);
       } else {
         // Case 2: a.shape[-1] == 2 and b.shape[-1] == 3, param.axisc is not ignored.
-        NumpyCrossForwardImpl<xpu, DType, 2, 3>::op(a, b, c, index_vec, shape_vec,
-                                                    a_axis, b_axis, c_axis,
-                                                    attrs, ctx, req, workspace);
+        NumpyCrossForwardImpl<xpu, DType, 2, 3>::op(
+            a, b, c, index_vec, shape_vec, a_axis, b_axis, c_axis, attrs, ctx, req, workspace);
       }
     } else {
       if (b_moveaxis_shape[b_ndim - 1] == 2) {
         // Case 3: a.shape[-1] == 3 and b.shape[-1] == 2, param.axisc is not ignored.
-        NumpyCrossForwardImpl<xpu, DType, 3, 2>::op(a, b, c, index_vec, shape_vec,
-                                                    a_axis, b_axis, c_axis,
-                                                    attrs, ctx, req, workspace);
+        NumpyCrossForwardImpl<xpu, DType, 3, 2>::op(
+            a, b, c, index_vec, shape_vec, a_axis, b_axis, c_axis, attrs, ctx, req, workspace);
       } else {
         // Case 4: a.shape[-1] == 3 and b.shape[-1] == 3, param.axisc is not ignored.
-        NumpyCrossForwardImpl<xpu, DType, 3, 3>::op(a, b, c, index_vec, shape_vec,
-                                                    a_axis, b_axis, c_axis,
-                                                    attrs, ctx, req, workspace);
+        NumpyCrossForwardImpl<xpu, DType, 3, 3>::op(
+            a, b, c, index_vec, shape_vec, a_axis, b_axis, c_axis, attrs, ctx, req, workspace);
       }
     }
   });
@@ -608,8 +672,7 @@ inline bool CheckUseBroadcast(const mxnet::TShape& a_move_shape,
   return !(GetCutoffShape(a_move_shape) == GetCutoffShape(b_move_shape));
 }
 
-inline mxnet::TShape GetOriShape(const mxnet::TShape& move_shape,
-                                 const int axis) {
+inline mxnet::TShape GetOriShape(const mxnet::TShape& move_shape, const int axis) {
   Tuple<int> origin_index = GetMoveaxisIndex(-1, axis, move_shape);
   return GetMoveaxisShape(origin_index, move_shape);
 }
@@ -620,13 +683,15 @@ inline std::vector<int> GetReduceAxis(const mxnet::TShape& move_shape,
   if (move_shape.ndim() == broad_move_shape.ndim() ||
       move_shape.ndim() == broad_move_shape.ndim() + 1) {
     for (int i = 0; i < move_shape.ndim() - 1; ++i) {
-      if (move_shape[i] != broad_move_shape[i]) { axis_idx.push_back(i); }
+      if (move_shape[i] != broad_move_shape[i]) {
+        axis_idx.push_back(i);
+      }
     }
   }
   return axis_idx;
 }
 
-template<typename xpu, typename DType, int a_dim, int b_dim>
+template <typename xpu, typename DType, int a_dim, int b_dim>
 inline void CrossImplWrap(const std::vector<TBlob>& inputs,
                           const std::vector<TBlob>& outputs,
                           const std::vector<int>& axises,
@@ -641,43 +706,55 @@ inline void CrossImplWrap(const std::vector<TBlob>& inputs,
   const TBlob& a = inputs[0];
   const TBlob& b = inputs[1];
   const TBlob& c = outputs[0];
-  if (kNullOp == req) { return; }
-  if (0U == a.Size() || 0U == b.Size()) { return; }
+  if (kNullOp == req) {
+    return;
+  }
+  if (0U == a.Size() || 0U == b.Size()) {
+    return;
+  }
 
-  const int a_axis = CheckAxis(axises[0], a.ndim());
-  const int b_axis = CheckAxis(axises[1], b.ndim());
-  const int c_axis = CheckAxis(axises[2], c.ndim());
-  Tuple<int> a_move_index = GetMoveaxisIndex(a_axis, -1, a.shape_);
-  Tuple<int> b_move_index = GetMoveaxisIndex(b_axis, -1, b.shape_);
-  Tuple<int> c_move_index = GetMoveaxisIndex(c_axis, -1, c.shape_);
+  const int a_axis           = CheckAxis(axises[0], a.ndim());
+  const int b_axis           = CheckAxis(axises[1], b.ndim());
+  const int c_axis           = CheckAxis(axises[2], c.ndim());
+  Tuple<int> a_move_index    = GetMoveaxisIndex(a_axis, -1, a.shape_);
+  Tuple<int> b_move_index    = GetMoveaxisIndex(b_axis, -1, b.shape_);
+  Tuple<int> c_move_index    = GetMoveaxisIndex(c_axis, -1, c.shape_);
   mxnet::TShape a_move_shape = GetMoveaxisShape(a_move_index, a.shape_);
   mxnet::TShape b_move_shape = GetMoveaxisShape(b_move_index, b.shape_);
   mxnet::TShape c_move_shape = GetMoveaxisShape(c_move_index, c.shape_);
   // Check workspace size.
-  size_t workspace_size = NumpyCrossWorkspaceSize<xpu, DType>(a_move_shape, b_move_shape,
-                                                              c_move_shape, a_axis, b_axis,
-                                                              ctx, { req });
+  size_t workspace_size = NumpyCrossWorkspaceSize<xpu, DType>(
+      a_move_shape, b_move_shape, c_move_shape, a_axis, b_axis, ctx, {req});
   CHECK_GE(workspace.MSize(), workspace_size)
-    << "Not enough working space size for cross product(should >= " << workspace_size << ")";
-  NumpyCrossForwardImpl<xpu, DType, a_dim, b_dim>::op(a, b, c,
-                                                      { a_move_index, b_move_index},
-                                                      { a_move_shape, b_move_shape, c_move_shape},
-                                                      a_axis, b_axis, c_axis,
-                                                      attrs, ctx, { req }, workspace);
+      << "Not enough working space size for cross product(should >= " << workspace_size << ")";
+  NumpyCrossForwardImpl<xpu, DType, a_dim, b_dim>::op(a,
+                                                      b,
+                                                      c,
+                                                      {a_move_index, b_move_index},
+                                                      {a_move_shape, b_move_shape, c_move_shape},
+                                                      a_axis,
+                                                      b_axis,
+                                                      c_axis,
+                                                      attrs,
+                                                      ctx,
+                                                      {req},
+                                                      workspace);
 }
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 struct ReduceImplWrap {
   static size_t wks(const mxnet::TShape& out_shape,
                     const mxnet::TShape& out_move_shape,
                     const mxnet::TShape& in_shape,
                     const mxnet::TShape& in_move_shape,
-                    const OpContext& ctx, const OpReqType& req) {
-    size_t ws_reduce = 0U;
+                    const OpContext& ctx,
+                    const OpReqType& req) {
+    size_t ws_reduce             = 0U;
     std::vector<int> reduce_axis = GetReduceAxis(out_move_shape, in_move_shape);
-    if (reduce_axis.empty() || req == kNullOp) { return 0U; }
-    ws_reduce = broadcast::ReduceWorkspaceSize(ctx.get_stream<xpu>(),
-                                               out_shape, req, in_shape);
+    if (reduce_axis.empty() || req == kNullOp) {
+      return 0U;
+    }
+    ws_reduce = broadcast::ReduceWorkspaceSize(ctx.get_stream<xpu>(), out_shape, req, in_shape);
     return ws_reduce;
   }
 
@@ -687,76 +764,77 @@ struct ReduceImplWrap {
                  const OpContext& ctx,
                  const OpReqType& out_req,
                  const Tensor<xpu, 1, char> workspace_tensor) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // Reduce work_in to work_out.
 #if !defined(__CUDACC__)
     SUM_NDIM_SWITCH(work_out.ndim(), NDim, {
       op::broadcast::Reduce<mshadow_op::sum, NDim, DType, op::mshadow_op::identity, false>(
-        s, work_out, kWriteTo, workspace_tensor, work_in);
+          s, work_out, kWriteTo, workspace_tensor, work_in);
     });
 #else
     SUM_NDIM_SWITCH(work_out.ndim(), NDim, {
-      op::broadcast::RTCReduce(ctx, work_out, kWriteTo, workspace_tensor, work_in,
-                               "red::sum{}", NDim, "identity");
+      op::broadcast::RTCReduce(
+          ctx, work_out, kWriteTo, workspace_tensor, work_in, "red::sum{}", NDim, "identity");
     });
 #endif
     // Copy work_out to out_data.
     MXNET_ASSIGN_REQ_SWITCH(out_req, req_type, {
       mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-        s, out_data.Size(), work_out.dptr<DType>(), out_data.dptr<DType>());
+          s, out_data.Size(), work_out.dptr<DType>(), out_data.dptr<DType>());
     });
   }
 };
 
-template<typename xpu, typename DType, int a_dim, int b_dim>
+template <typename xpu, typename DType, int a_dim, int b_dim>
 struct NumpyCrossBackwardImpl {
-  static std::vector<size_t>
-  CrossBwkWorkspaceSize(const bool use_broadcast,
-                        const mxnet::TShape& a_shape,
-                        const mxnet::TShape& b_shape,
-                        const mxnet::TShape& c_shape,
-                        const mxnet::TShape& a_move_shape,
-                        const mxnet::TShape& b_move_shape,
-                        const mxnet::TShape& c_move_shape,
-                        const int& a_axis, const int& b_axis, const int& c_axis,
-                        const OpContext& ctx,
-                        const std::vector<OpReqType>& req) {
+  static std::vector<size_t> CrossBwkWorkspaceSize(const bool use_broadcast,
+                                                   const mxnet::TShape& a_shape,
+                                                   const mxnet::TShape& b_shape,
+                                                   const mxnet::TShape& c_shape,
+                                                   const mxnet::TShape& a_move_shape,
+                                                   const mxnet::TShape& b_move_shape,
+                                                   const mxnet::TShape& c_move_shape,
+                                                   const int& a_axis,
+                                                   const int& b_axis,
+                                                   const int& c_axis,
+                                                   const OpContext& ctx,
+                                                   const std::vector<OpReqType>& req) {
     CHECK((a_dim == 2 && b_dim == 3) || (a_dim == 3 && b_dim == 2))
-      << "no specialized NumpyCrossOp defined for template parameters.";
+        << "no specialized NumpyCrossOp defined for template parameters.";
     std::vector<size_t> workspace_size(3, 0U);
     if (use_broadcast) {
       size_t ws_a = 0U, ws_b = 0U, rws_a = 0U, rws_b = 0U;
-      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(b_move_shape, c_move_shape, c_move_shape,
-                                                       b_axis, c_axis, ctx, { kWriteTo });
-      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(b_move_shape, c_move_shape, a_move_shape,
-                                                       b_axis, c_axis, ctx, { kWriteTo });
-      ws_a = std::max(ws1, ws2);
-      size_t ws3 = NumpyCrossWorkspaceSize<xpu, DType>(c_move_shape, a_move_shape, c_move_shape,
-                                                       c_axis, a_axis, ctx, { kWriteTo });
-      size_t ws4 = NumpyCrossWorkspaceSize<xpu, DType>(c_move_shape, a_move_shape, b_move_shape,
-                                                       c_axis, a_axis, ctx, { kWriteTo });
+      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(
+          b_move_shape, c_move_shape, c_move_shape, b_axis, c_axis, ctx, {kWriteTo});
+      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(
+          b_move_shape, c_move_shape, a_move_shape, b_axis, c_axis, ctx, {kWriteTo});
+      ws_a       = std::max(ws1, ws2);
+      size_t ws3 = NumpyCrossWorkspaceSize<xpu, DType>(
+          c_move_shape, a_move_shape, c_move_shape, c_axis, a_axis, ctx, {kWriteTo});
+      size_t ws4 = NumpyCrossWorkspaceSize<xpu, DType>(
+          c_move_shape, a_move_shape, b_move_shape, c_axis, a_axis, ctx, {kWriteTo});
       ws_b = std::max(ws3, ws4);
       // Get delete result shape.
-      mxnet::TShape c_move_dshape = c_move_shape;
+      mxnet::TShape c_move_dshape            = c_move_shape;
       c_move_dshape[c_move_shape.ndim() - 1] = 2;
       if (a_dim == 2) {
         mxnet::TShape c_dshape = GetOriShape(c_move_dshape, a_axis);
         // Calculate workspace size used in sum(grad_a).
-        size_t rws1 = ReduceImplWrap<xpu, DType>::wks(c_dshape, c_move_dshape,
-                                                      c_shape, c_move_shape, ctx, req[0]);
+        size_t rws1 = ReduceImplWrap<xpu, DType>::wks(
+            c_dshape, c_move_dshape, c_shape, c_move_shape, ctx, req[0]);
         // Calculate workspace size used in sum(grad_b).
-        size_t rws2 = ReduceImplWrap<xpu, DType>::wks(b_shape, b_move_shape,
-                                                      c_shape, c_move_shape, ctx, req[1]);
+        size_t rws2 = ReduceImplWrap<xpu, DType>::wks(
+            b_shape, b_move_shape, c_shape, c_move_shape, ctx, req[1]);
         rws_a = std::max(rws1, rws2);
       }
       if (b_dim == 2) {
         mxnet::TShape c_dshape = GetOriShape(c_move_dshape, b_axis);
         // Calculate workspace size used in sum(grad_a).
-        size_t rws1 = ReduceImplWrap<xpu, DType>::wks(a_shape, a_move_shape,
-                                                      c_shape, c_move_shape, ctx, req[0]);
+        size_t rws1 = ReduceImplWrap<xpu, DType>::wks(
+            a_shape, a_move_shape, c_shape, c_move_shape, ctx, req[0]);
         // Calculate workspace size used in sum(grad_b).
-        size_t rws2 = ReduceImplWrap<xpu, DType>::wks(c_dshape, c_move_dshape,
-                                                      c_shape, c_move_shape, ctx, req[1]);
+        size_t rws2 = ReduceImplWrap<xpu, DType>::wks(
+            c_dshape, c_move_dshape, c_shape, c_move_shape, ctx, req[1]);
         rws_b = std::max(rws1, rws2);
       }
       size_t rws = (std::max(rws_a, rws_b) + sizeof(DType) - 1) / sizeof(DType);
@@ -767,12 +845,10 @@ struct NumpyCrossBackwardImpl {
     } else {
       mxnet::TShape a_moveaxis_shape = (a_dim == 2 ? c_move_shape : a_move_shape);
       mxnet::TShape b_moveaxis_shape = (b_dim == 2 ? c_move_shape : b_move_shape);
-      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(b_moveaxis_shape, c_move_shape,
-                                                       a_moveaxis_shape, b_axis, c_axis, ctx,
-                                                       { kWriteTo });
-      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(c_move_shape, a_moveaxis_shape,
-                                                       b_moveaxis_shape, c_axis, a_axis, ctx,
-                                                       { kWriteTo });
+      size_t ws1                     = NumpyCrossWorkspaceSize<xpu, DType>(
+          b_moveaxis_shape, c_move_shape, a_moveaxis_shape, b_axis, c_axis, ctx, {kWriteTo});
+      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(
+          c_move_shape, a_moveaxis_shape, b_moveaxis_shape, c_axis, a_axis, ctx, {kWriteTo});
       workspace_size[0] += std::max(ws1, ws2);  // For cross product workspace.
       if (a_dim == 2 && b_dim == 3) {
         workspace_size[1] += a_moveaxis_shape.Size();  // For cross product result.
@@ -787,56 +863,77 @@ struct NumpyCrossBackwardImpl {
   }
 
   static void op(const bool use_broadcast,
-                 const TBlob& grad_c, const TBlob& a, const TBlob& b,
-                 const TBlob& grad_a, const TBlob& grad_b,
+                 const TBlob& grad_c,
+                 const TBlob& a,
+                 const TBlob& b,
+                 const TBlob& grad_a,
+                 const TBlob& grad_b,
                  const std::vector<mxnet::TShape>& moveaxis_shape_vec,
-                 const int a_axis, const int b_axis, const int c_axis,
-                 const nnvm::NodeAttrs &attrs,
+                 const int a_axis,
+                 const int b_axis,
+                 const int c_axis,
+                 const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<OpReqType>& req) {
     CHECK((a_dim == 2 && b_dim == 3) || (a_dim == 3 && b_dim == 2))
-      << "no specialized NumpyCrossOp defined for template parameters.";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+        << "no specialized NumpyCrossOp defined for template parameters.";
+    Stream<xpu>* s                  = ctx.get_stream<xpu>();
     const mxnet::TShape& a_move_shp = moveaxis_shape_vec[0];
     const mxnet::TShape& b_move_shp = moveaxis_shape_vec[1];
     const mxnet::TShape& c_move_shp = moveaxis_shape_vec[2];
-    std::vector<int> a_reduce_axis = GetReduceAxis(a_move_shp, c_move_shp);
-    std::vector<int> b_reduce_axis = GetReduceAxis(b_move_shp, c_move_shp);
-    const int c_ndim = c_move_shp.ndim();
+    std::vector<int> a_reduce_axis  = GetReduceAxis(a_move_shp, c_move_shp);
+    std::vector<int> b_reduce_axis  = GetReduceAxis(b_move_shp, c_move_shp);
+    const int c_ndim                = c_move_shp.ndim();
     // Get delete result shape.
-    mxnet::TShape c_move_dshp = c_move_shp;
+    mxnet::TShape c_move_dshp          = c_move_shp;
     c_move_dshp[c_move_shp.ndim() - 1] = 2;
-    std::vector<size_t> wk_size = CrossBwkWorkspaceSize(use_broadcast,
-                                                        a.shape_, b.shape_, grad_c.shape_,
-                                                        a_move_shp, b_move_shp, c_move_shp,
-                                                        a_axis, b_axis, c_axis, ctx, req);
-    Tensor<xpu, 1, DType> workspace = ctx.requested[0].get_space_typed<xpu, 1, DType>(
-      Shape1(wk_size[0] + wk_size[1] + wk_size[2]), s);
+    std::vector<size_t> wk_size        = CrossBwkWorkspaceSize(use_broadcast,
+                                                        a.shape_,
+                                                        b.shape_,
+                                                        grad_c.shape_,
+                                                        a_move_shp,
+                                                        b_move_shp,
+                                                        c_move_shp,
+                                                        a_axis,
+                                                        b_axis,
+                                                        c_axis,
+                                                        ctx,
+                                                        req);
+    Tensor<xpu, 1, DType> workspace    = ctx.requested[0].get_space_typed<xpu, 1, DType>(
+        Shape1(wk_size[0] + wk_size[1] + wk_size[2]), s);
     if (use_broadcast) {
       // Use broadcast in forward, need reduce in backward.
-      DType *w0_ptr = workspace.dptr_;
-      DType *w1_ptr = w0_ptr + wk_size[0];
-      DType *w2_ptr = w1_ptr + c_move_shp.Size();
-      char *w3_ptr = reinterpret_cast<char*>(w2_ptr + c_move_shp.Size());
+      DType* w0_ptr = workspace.dptr_;
+      DType* w1_ptr = w0_ptr + wk_size[0];
+      DType* w2_ptr = w1_ptr + c_move_shp.Size();
+      char* w3_ptr  = reinterpret_cast<char*>(w2_ptr + c_move_shp.Size());
       TBlob w0_data(w0_ptr, Shape1(wk_size[0]), grad_c.dev_mask(), grad_c.dev_id());
       Tensor<xpu, 1, char> w3_tensor(w3_ptr, Shape1(wk_size[2] * sizeof(DType)), s);
       if (a_dim == 2) {  // a_dim == 2, b_dim == 3
         TBlob w1_data(w1_ptr, c_move_shp, grad_c.dev_mask(), grad_c.dev_id());
         TBlob w2_data(w2_ptr, c_move_dshp, grad_c.dev_mask(), grad_c.dev_id());
         // Calculate grad_a = cross(b, grad_c).
-        CrossImplWrap<xpu, DType, 3, 3>({ b, grad_c }, { w1_data }, { b_axis, c_axis, -1 },
-                                        attrs, ctx, kWriteTo, w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({b, grad_c},
+                                        {w1_data},
+                                        {b_axis, c_axis, -1},
+                                        attrs,
+                                        ctx,
+                                        kWriteTo,
+                                        w0_data.get<xpu, 1, DType>(s));
         // Copy w1_data to w2_data with delete.
-        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s, c_move_dshp.ProdShape(0, c_ndim - 1),
+        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s,
+                                                    c_move_dshp.ProdShape(0, c_ndim - 1),
                                                     w1_data.dptr<DType>(),
-                                                    w2_data.dptr<DType>(), 3, 2);
+                                                    w2_data.dptr<DType>(),
+                                                    3,
+                                                    2);
         // Transpose w2_data to w1_data.
         if (a_axis != grad_a.ndim() - 1) {
           const Tuple<int> axis_idx = GetMoveaxisIndex(-1, a_axis, c_move_dshp);
-          mxnet::TShape c_dshp = GetMoveaxisShape(axis_idx, c_move_dshp);
-          w1_data = TBlob(w1_ptr, c_dshp, grad_c.dev_mask(), grad_c.dev_id());
-          TransposeImpl<xpu>(ctx.run_ctx, w2_data, w1_data,
-                             mxnet::TShape(axis_idx.begin(), axis_idx.end()));
+          mxnet::TShape c_dshp      = GetMoveaxisShape(axis_idx, c_move_dshp);
+          w1_data                   = TBlob(w1_ptr, c_dshp, grad_c.dev_mask(), grad_c.dev_id());
+          TransposeImpl<xpu>(
+              ctx.run_ctx, w2_data, w1_data, mxnet::TShape(axis_idx.begin(), axis_idx.end()));
           w2_data = TBlob(w2_ptr, grad_a.shape_, grad_c.dev_mask(), grad_c.dev_id());
         } else {
           // If no transpose, exchange the pointer.
@@ -848,7 +945,7 @@ struct NumpyCrossBackwardImpl {
           // No need Reduce w1_data, Copy w1_data to grad_a.
           MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
             mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-              s, grad_a.Size(), w1_data.dptr<DType>(), grad_a.dptr<DType>());
+                s, grad_a.Size(), w1_data.dptr<DType>(), grad_a.dptr<DType>());
           });
         } else {
           // Need Reduce w1_data to w2_data and Copy w2_data to grad_a.
@@ -856,35 +953,53 @@ struct NumpyCrossBackwardImpl {
         }
         // Calculate grad_b = cross(grad_c, a).
         if (b_reduce_axis.empty()) {
-          CrossImplWrap<xpu, DType, 3, 2>({ grad_c, a }, { grad_b }, { c_axis, a_axis, b_axis },
-                                          attrs, ctx, req[1], w0_data.get<xpu, 1, DType>(s));
+          CrossImplWrap<xpu, DType, 3, 2>({grad_c, a},
+                                          {grad_b},
+                                          {c_axis, a_axis, b_axis},
+                                          attrs,
+                                          ctx,
+                                          req[1],
+                                          w0_data.get<xpu, 1, DType>(s));
         } else {
           mxnet::TShape c_shp = GetOriShape(c_move_shp, b_axis);
-          w1_data = TBlob(w1_ptr, c_shp, grad_c.dev_mask(), grad_c.dev_id());
-          w2_data = TBlob(w2_ptr, grad_b.shape_, grad_c.dev_mask(), grad_c.dev_id());
-          CrossImplWrap<xpu, DType, 3, 2>({ grad_c, a }, { w1_data }, { c_axis, a_axis, b_axis },
-                                          attrs, ctx, req[1], w0_data.get<xpu, 1, DType>(s));
+          w1_data             = TBlob(w1_ptr, c_shp, grad_c.dev_mask(), grad_c.dev_id());
+          w2_data             = TBlob(w2_ptr, grad_b.shape_, grad_c.dev_mask(), grad_c.dev_id());
+          CrossImplWrap<xpu, DType, 3, 2>({grad_c, a},
+                                          {w1_data},
+                                          {c_axis, a_axis, b_axis},
+                                          attrs,
+                                          ctx,
+                                          req[1],
+                                          w0_data.get<xpu, 1, DType>(s));
           // Need Reduce w1_data to w2_data and Copy w2_data to grad_b.
           ReduceImplWrap<xpu, DType>::op(w1_data, w2_data, grad_b, ctx, req[1], w3_tensor);
         }
-      }  // End of a_dim == 2
+      }                  // End of a_dim == 2
       if (b_dim == 2) {  // a_dim == 3, b_dim == 2
         TBlob w1_data(w1_ptr, c_move_shp, grad_c.dev_mask(), grad_c.dev_id());
         TBlob w2_data(w2_ptr, c_move_dshp, grad_c.dev_mask(), grad_c.dev_id());
         // Calculate grad_b = cross(grad_c, a).
-        CrossImplWrap<xpu, DType, 3, 3>({ grad_c, a }, { w1_data }, { c_axis, a_axis, -1 },
-                                        attrs, ctx, kWriteTo, w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({grad_c, a},
+                                        {w1_data},
+                                        {c_axis, a_axis, -1},
+                                        attrs,
+                                        ctx,
+                                        kWriteTo,
+                                        w0_data.get<xpu, 1, DType>(s));
         // Copy w1_data to w2_data with delete.
-        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s, c_move_dshp.ProdShape(0, c_ndim - 1),
+        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s,
+                                                    c_move_dshp.ProdShape(0, c_ndim - 1),
                                                     w1_data.dptr<DType>(),
-                                                    w2_data.dptr<DType>(), 3, 2);
+                                                    w2_data.dptr<DType>(),
+                                                    3,
+                                                    2);
         // Transpose w2_data to w1_data.
         if (b_axis != grad_b.ndim() - 1) {
           const Tuple<int> axis_idx = GetMoveaxisIndex(-1, b_axis, c_move_dshp);
-          mxnet::TShape c_dshp = GetMoveaxisShape(axis_idx, c_move_dshp);
-          w1_data = TBlob(w1_ptr, c_dshp, grad_c.dev_mask(), grad_c.dev_id());
-          TransposeImpl<xpu>(ctx.run_ctx, w2_data, w1_data,
-                             mxnet::TShape(axis_idx.begin(), axis_idx.end()));
+          mxnet::TShape c_dshp      = GetMoveaxisShape(axis_idx, c_move_dshp);
+          w1_data                   = TBlob(w1_ptr, c_dshp, grad_c.dev_mask(), grad_c.dev_id());
+          TransposeImpl<xpu>(
+              ctx.run_ctx, w2_data, w1_data, mxnet::TShape(axis_idx.begin(), axis_idx.end()));
           w2_data = TBlob(w2_ptr, grad_b.shape_, grad_c.dev_mask(), grad_c.dev_id());
         } else {
           // If no transpose, exchange the pointer.
@@ -896,7 +1011,7 @@ struct NumpyCrossBackwardImpl {
           // No need Reduce w1_data, Copy w1_data to grad_b.
           MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
             mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-              s, grad_b.Size(), w1_data.dptr<DType>(), grad_b.dptr<DType>());
+                s, grad_b.Size(), w1_data.dptr<DType>(), grad_b.dptr<DType>());
           });
         } else {
           // Need Reduce w1_data to w2_data and Copy w2_data to grad_a.
@@ -904,111 +1019,147 @@ struct NumpyCrossBackwardImpl {
         }
         // Calculate grad_a = cross(b, grad_c).
         if (a_reduce_axis.empty()) {
-          CrossImplWrap<xpu, DType, 2, 3>({ b, grad_c }, { grad_a }, { b_axis, c_axis, a_axis },
-                                          attrs, ctx, req[0], workspace);
+          CrossImplWrap<xpu, DType, 2, 3>(
+              {b, grad_c}, {grad_a}, {b_axis, c_axis, a_axis}, attrs, ctx, req[0], workspace);
         } else {
           mxnet::TShape c_shp = GetOriShape(c_move_shp, a_axis);
-          w1_data = TBlob(w1_ptr, c_shp, grad_c.dev_mask(), grad_c.dev_id());
-          w2_data = TBlob(w2_ptr, grad_a.shape_, grad_c.dev_mask(), grad_c.dev_id());
-          CrossImplWrap<xpu, DType, 2, 3>({ b, grad_c }, { w1_data }, { b_axis, c_axis, a_axis },
-                                          attrs, ctx, req[0], w0_data.get<xpu, 1, DType>(s));
+          w1_data             = TBlob(w1_ptr, c_shp, grad_c.dev_mask(), grad_c.dev_id());
+          w2_data             = TBlob(w2_ptr, grad_a.shape_, grad_c.dev_mask(), grad_c.dev_id());
+          CrossImplWrap<xpu, DType, 2, 3>({b, grad_c},
+                                          {w1_data},
+                                          {b_axis, c_axis, a_axis},
+                                          attrs,
+                                          ctx,
+                                          req[0],
+                                          w0_data.get<xpu, 1, DType>(s));
           // Need Reduce w1_data to w2_data and Copy w2_data to grad_b.
           ReduceImplWrap<xpu, DType>::op(w1_data, w2_data, grad_a, ctx, req[0], w3_tensor);
         }
       }  // End of b_dim == 3
     } else {
       // No use broadcast in forward, not need reduce in backward.
-      DType *w0_ptr = workspace.dptr_;
-      DType *w1_ptr = w0_ptr + wk_size[0];
-      DType *w2_ptr = w1_ptr + c_move_shp.Size();
+      DType* w0_ptr = workspace.dptr_;
+      DType* w1_ptr = w0_ptr + wk_size[0];
+      DType* w2_ptr = w1_ptr + c_move_shp.Size();
       TBlob w0_data(w0_ptr, Shape1(wk_size[0]), grad_c.dev_mask(), grad_c.dev_id());
       if (a_dim == 2) {  // a_dim == 2, b_dim == 3
         TBlob w1_data(w1_ptr, c_move_shp, grad_c.dev_mask(), grad_c.dev_id());
         TBlob w2_data(w2_ptr, a_move_shp, grad_c.dev_mask(), grad_c.dev_id());
         // Calculate w1_data = cross(b, grad_c).
-        CrossImplWrap<xpu, DType, 3, 3>({ b, grad_c }, { w1_data }, { b_axis, c_axis, -1 },
-                                        attrs, ctx, kWriteTo, w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({b, grad_c},
+                                        {w1_data},
+                                        {b_axis, c_axis, -1},
+                                        attrs,
+                                        ctx,
+                                        kWriteTo,
+                                        w0_data.get<xpu, 1, DType>(s));
         // Calculate grad_b = cross(grad_c, a).
-        CrossImplWrap<xpu, DType, 3, 2>({ grad_c, a }, { grad_b }, { c_axis, a_axis, b_axis },
-                                        attrs, ctx, req[1], w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 2>({grad_c, a},
+                                        {grad_b},
+                                        {c_axis, a_axis, b_axis},
+                                        attrs,
+                                        ctx,
+                                        req[1],
+                                        w0_data.get<xpu, 1, DType>(s));
         // Copy w1_data to w2_data with delete.
-        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s, a_move_shp.ProdShape(0, a.ndim() - 1),
+        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s,
+                                                    a_move_shp.ProdShape(0, a.ndim() - 1),
                                                     w1_data.dptr<DType>(),
-                                                    w2_data.dptr<DType>(), 3, 2);
-        DType *res_ptr = w2_data.dptr<DType>();
+                                                    w2_data.dptr<DType>(),
+                                                    3,
+                                                    2);
+        DType* res_ptr = w2_data.dptr<DType>();
         if (a_axis != grad_a.ndim() - 1) {
           // Transpose w2_data to w1_data.
           const Tuple<int> grad_a_axis_idx = GetMoveaxisIndex(-1, a_axis, a_move_shp);
           w1_data = TBlob(w1_ptr, grad_a.shape_, grad_c.dev_mask(), grad_c.dev_id());
-          TransposeImpl<xpu>(ctx.run_ctx, w2_data, w1_data,
+          TransposeImpl<xpu>(ctx.run_ctx,
+                             w2_data,
+                             w1_data,
                              mxnet::TShape(grad_a_axis_idx.begin(), grad_a_axis_idx.end()));
           res_ptr = w1_data.dptr<DType>();
         }
         // Copy w1_data to grad_a.
         MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
           mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-            s, grad_a.Size(), res_ptr, grad_a.dptr<DType>());
+              s, grad_a.Size(), res_ptr, grad_a.dptr<DType>());
         });
-      }  // End of a_dim == 2
+      }                  // End of a_dim == 2
       if (b_dim == 2) {  // a_dim == 3, b_dim == 2
         TBlob w1_data(w1_ptr, c_move_shp, grad_c.dev_mask(), grad_c.dev_id());
         TBlob w2_data(w2_ptr, b_move_shp, grad_c.dev_mask(), grad_c.dev_id());
         // Calculate grad_a = cross(b, grad_c).
-        CrossImplWrap<xpu, DType, 2, 3>({ b, grad_c }, { grad_a }, { b_axis, c_axis, a_axis },
-                                        attrs, ctx, req[0], w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 2, 3>({b, grad_c},
+                                        {grad_a},
+                                        {b_axis, c_axis, a_axis},
+                                        attrs,
+                                        ctx,
+                                        req[0],
+                                        w0_data.get<xpu, 1, DType>(s));
         // Calculate w1_data = cross(grad_c, a).
-        CrossImplWrap<xpu, DType, 3, 3>({ grad_c, a }, { w1_data }, { c_axis, a_axis, -1 },
-                                        attrs, ctx, kWriteTo, w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({grad_c, a},
+                                        {w1_data},
+                                        {c_axis, a_axis, -1},
+                                        attrs,
+                                        ctx,
+                                        kWriteTo,
+                                        w0_data.get<xpu, 1, DType>(s));
         // Copy w1_data to w2_data with delete.
-        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s, b_move_shp.ProdShape(0, b.ndim() - 1),
+        mxnet_op::Kernel<DeleteAssign, xpu>::Launch(s,
+                                                    b_move_shp.ProdShape(0, b.ndim() - 1),
                                                     w1_data.dptr<DType>(),
-                                                    w2_data.dptr<DType>(), 3, 2);
-        DType *res_ptr = w2_data.dptr<DType>();
+                                                    w2_data.dptr<DType>(),
+                                                    3,
+                                                    2);
+        DType* res_ptr = w2_data.dptr<DType>();
         if (b_axis != grad_b.ndim() - 1) {
           // Transpose w2_data to w1_data.
           const Tuple<int> grad_b_axis_idx = GetMoveaxisIndex(-1, b_axis, b_move_shp);
           w1_data = TBlob(w1_ptr, grad_b.shape_, grad_c.dev_mask(), grad_c.dev_id());
-          TransposeImpl<xpu>(ctx.run_ctx, w2_data, w1_data,
+          TransposeImpl<xpu>(ctx.run_ctx,
+                             w2_data,
+                             w1_data,
                              mxnet::TShape(grad_b_axis_idx.begin(), grad_b_axis_idx.end()));
           res_ptr = w1_data.dptr<DType>();
         }
         // Copy w1_data to grad_b.
         MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
           mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-            s, grad_b.Size(), res_ptr, grad_b.dptr<DType>());
+              s, grad_b.Size(), res_ptr, grad_b.dptr<DType>());
         });
       }  // End of b_dim == 2
-    }  // End of use_broadcast
+    }    // End of use_broadcast
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 struct NumpyCrossBackwardImpl<xpu, DType, 3, 3> {
-  static std::vector<size_t>
-  CrossBwkWorkspaceSize(const bool use_broadcast,
-                        const mxnet::TShape& a_shape,
-                        const mxnet::TShape& b_shape,
-                        const mxnet::TShape& c_shape,
-                        const mxnet::TShape& a_move_shape,
-                        const mxnet::TShape& b_move_shape,
-                        const mxnet::TShape& c_move_shape,
-                        const int& a_axis, const int& b_axis, const int& c_axis,
-                        const OpContext& ctx,
-                        const std::vector<OpReqType>& req) {
+  static std::vector<size_t> CrossBwkWorkspaceSize(const bool use_broadcast,
+                                                   const mxnet::TShape& a_shape,
+                                                   const mxnet::TShape& b_shape,
+                                                   const mxnet::TShape& c_shape,
+                                                   const mxnet::TShape& a_move_shape,
+                                                   const mxnet::TShape& b_move_shape,
+                                                   const mxnet::TShape& c_move_shape,
+                                                   const int& a_axis,
+                                                   const int& b_axis,
+                                                   const int& c_axis,
+                                                   const OpContext& ctx,
+                                                   const std::vector<OpReqType>& req) {
     std::vector<size_t> workspace_size(3, 0U);
     if (use_broadcast) {
       // Calculate workspace size used in cross(b_move, grad_c_move).
-      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(b_move_shape, c_move_shape, c_move_shape,
-                                                       b_axis, c_axis, ctx, { kWriteTo });
+      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(
+          b_move_shape, c_move_shape, c_move_shape, b_axis, c_axis, ctx, {kWriteTo});
       // Calculate workspace size used in cross(grad_c_move, a_move).
-      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(c_move_shape, a_move_shape, c_move_shape,
-                                                       c_axis, a_axis, ctx, { kWriteTo });
+      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(
+          c_move_shape, a_move_shape, c_move_shape, c_axis, a_axis, ctx, {kWriteTo});
       // Calculate workspace size used in sum(grad_a).
-      size_t rws1 = ReduceImplWrap<xpu, DType>::wks(a_shape, a_move_shape,
-                                                    c_shape, c_move_shape, ctx, req[0]);
+      size_t rws1 = ReduceImplWrap<xpu, DType>::wks(
+          a_shape, a_move_shape, c_shape, c_move_shape, ctx, req[0]);
       // Calculate workspace size used in sum(grad_b).
-      size_t rws2 = ReduceImplWrap<xpu, DType>::wks(b_shape, b_move_shape,
-                                                    c_shape, c_move_shape, ctx, req[1]);
+      size_t rws2 = ReduceImplWrap<xpu, DType>::wks(
+          b_shape, b_move_shape, c_shape, c_move_shape, ctx, req[1]);
       // For cross product workspace.
       workspace_size[0] += std::max(ws1, ws2);
       // For reduce workspace.
@@ -1017,110 +1168,146 @@ struct NumpyCrossBackwardImpl<xpu, DType, 3, 3> {
       workspace_size[2] += c_move_shape.Size();
       workspace_size[2] += std::max(a_move_shape.Size(), b_move_shape.Size());
     } else {
-      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(b_move_shape, c_move_shape, a_move_shape,
-                                                       b_axis, c_axis, ctx, { req[0] });
-      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(c_move_shape, a_move_shape, b_move_shape,
-                                                       c_axis, a_axis, ctx, { req[1] });
+      size_t ws1 = NumpyCrossWorkspaceSize<xpu, DType>(
+          b_move_shape, c_move_shape, a_move_shape, b_axis, c_axis, ctx, {req[0]});
+      size_t ws2 = NumpyCrossWorkspaceSize<xpu, DType>(
+          c_move_shape, a_move_shape, b_move_shape, c_axis, a_axis, ctx, {req[1]});
       workspace_size[0] += std::max(ws1, ws2);  // For cross product workspace.
     }
     return workspace_size;
   }
 
   static void op(const bool use_broadcast,
-                 const TBlob& grad_c, const TBlob& a, const TBlob& b,
-                 const TBlob& grad_a, const TBlob& grad_b,
+                 const TBlob& grad_c,
+                 const TBlob& a,
+                 const TBlob& b,
+                 const TBlob& grad_a,
+                 const TBlob& grad_b,
                  const std::vector<mxnet::TShape>& moveaxis_shape_vec,
-                 const int a_axis, const int b_axis, const int c_axis,
-                 const nnvm::NodeAttrs &attrs,
+                 const int a_axis,
+                 const int b_axis,
+                 const int c_axis,
+                 const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<OpReqType>& req) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s                  = ctx.get_stream<xpu>();
     const mxnet::TShape& a_move_shp = moveaxis_shape_vec[0];
     const mxnet::TShape& b_move_shp = moveaxis_shape_vec[1];
     const mxnet::TShape& c_move_shp = moveaxis_shape_vec[2];
-    std::vector<size_t> wk_size = CrossBwkWorkspaceSize(use_broadcast,
-                                                        a.shape_, b.shape_, grad_c.shape_,
-                                                        a_move_shp, b_move_shp, c_move_shp,
-                                                        a_axis, b_axis, c_axis, ctx, req);
+    std::vector<size_t> wk_size     = CrossBwkWorkspaceSize(use_broadcast,
+                                                        a.shape_,
+                                                        b.shape_,
+                                                        grad_c.shape_,
+                                                        a_move_shp,
+                                                        b_move_shp,
+                                                        c_move_shp,
+                                                        a_axis,
+                                                        b_axis,
+                                                        c_axis,
+                                                        ctx,
+                                                        req);
     Tensor<xpu, 1, DType> workspace = ctx.requested[0].get_space_typed<xpu, 1, DType>(
-      Shape1(wk_size[0] + wk_size[1] + wk_size[2]), s);
+        Shape1(wk_size[0] + wk_size[1] + wk_size[2]), s);
     if (use_broadcast) {
       // Use broadcast in forward, need reduce in backward.
       std::vector<int> a_reduce_axis = GetReduceAxis(a_move_shp, c_move_shp);
       std::vector<int> b_reduce_axis = GetReduceAxis(b_move_shp, c_move_shp);
       // Allocate workspace.
-      DType *w0_ptr = workspace.dptr_;
-      char *w1_ptr = reinterpret_cast<char*>(w0_ptr + wk_size[0]);
+      DType* w0_ptr = workspace.dptr_;
+      char* w1_ptr  = reinterpret_cast<char*>(w0_ptr + wk_size[0]);
       TBlob w0_data(w0_ptr, Shape1(wk_size[0]), grad_c.dev_mask(), grad_c.dev_id());
       Tensor<xpu, 1, char> w1_tensor(w1_ptr, Shape1(wk_size[1] * sizeof(DType)), s);
       if (a_reduce_axis.empty()) {
         // Calculate grad_a = cross(b, grad_c).
-        CrossImplWrap<xpu, DType, 3, 3>({ b, grad_c }, { grad_a }, { b_axis, c_axis, a_axis },
-                                        attrs, ctx, req[0], w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({b, grad_c},
+                                        {grad_a},
+                                        {b_axis, c_axis, a_axis},
+                                        attrs,
+                                        ctx,
+                                        req[0],
+                                        w0_data.get<xpu, 1, DType>(s));
       } else {
         mxnet::TShape c_shp = GetOriShape(c_move_shp, a_axis);
-        DType *w2_ptr = w0_ptr + wk_size[0] + wk_size[1];
-        DType *w3_ptr = w2_ptr + c_move_shp.Size();
+        DType* w2_ptr       = w0_ptr + wk_size[0] + wk_size[1];
+        DType* w3_ptr       = w2_ptr + c_move_shp.Size();
         TBlob w2_data(w2_ptr, c_shp, grad_c.dev_mask(), grad_c.dev_id());
         TBlob w3_data(w3_ptr, grad_a.shape_, grad_c.dev_mask(), grad_c.dev_id());
         // Calculate w2_data = cross(b, grad_c).
-        CrossImplWrap<xpu, DType, 3, 3>({ b, grad_c }, { w2_data }, { b_axis, c_axis, a_axis },
-                                        attrs, ctx, kWriteTo, w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({b, grad_c},
+                                        {w2_data},
+                                        {b_axis, c_axis, a_axis},
+                                        attrs,
+                                        ctx,
+                                        kWriteTo,
+                                        w0_data.get<xpu, 1, DType>(s));
         // Reduce w2_data to w3_data and Copy w3_data to grad_a.
         ReduceImplWrap<xpu, DType>::op(w2_data, w3_data, grad_a, ctx, req[0], w1_tensor);
       }
       if (b_reduce_axis.empty()) {
         // Calculate grad_b = cross(grad_c, a).
-        CrossImplWrap<xpu, DType, 3, 3>({ grad_c, a }, { grad_b }, { c_axis, a_axis, b_axis },
-                                        attrs, ctx, req[1], w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({grad_c, a},
+                                        {grad_b},
+                                        {c_axis, a_axis, b_axis},
+                                        attrs,
+                                        ctx,
+                                        req[1],
+                                        w0_data.get<xpu, 1, DType>(s));
       } else {
         mxnet::TShape c_shp = GetOriShape(c_move_shp, b_axis);
-        DType *w2_ptr = w0_ptr + wk_size[0] + wk_size[1];
-        DType *w3_ptr = w2_ptr + c_move_shp.Size();
+        DType* w2_ptr       = w0_ptr + wk_size[0] + wk_size[1];
+        DType* w3_ptr       = w2_ptr + c_move_shp.Size();
         TBlob w2_data(w2_ptr, c_shp, grad_c.dev_mask(), grad_c.dev_id());
         TBlob w3_data(w3_ptr, grad_b.shape_, grad_c.dev_mask(), grad_c.dev_id());
         // Calculate w2_data = cross(grad_c, a).
-        CrossImplWrap<xpu, DType, 3, 3>({ grad_c, a }, { w2_data }, { c_axis, a_axis, b_axis },
-                                        attrs, ctx, kWriteTo, w0_data.get<xpu, 1, DType>(s));
+        CrossImplWrap<xpu, DType, 3, 3>({grad_c, a},
+                                        {w2_data},
+                                        {c_axis, a_axis, b_axis},
+                                        attrs,
+                                        ctx,
+                                        kWriteTo,
+                                        w0_data.get<xpu, 1, DType>(s));
         // Reduce w2_data to w3_data and Copy w3_data to grad_b.
         ReduceImplWrap<xpu, DType>::op(w2_data, w3_data, grad_b, ctx, req[1], w1_tensor);
       }
     } else {
-      CrossImplWrap<xpu, DType, 3, 3>({ b, grad_c }, { grad_a }, { b_axis, c_axis, a_axis },
-                                      attrs, ctx, req[0], workspace);
-      CrossImplWrap<xpu, DType, 3, 3>({ grad_c, a }, { grad_b }, { c_axis, a_axis, b_axis },
-                                      attrs, ctx, req[1], workspace);
+      CrossImplWrap<xpu, DType, 3, 3>(
+          {b, grad_c}, {grad_a}, {b_axis, c_axis, a_axis}, attrs, ctx, req[0], workspace);
+      CrossImplWrap<xpu, DType, 3, 3>(
+          {grad_c, a}, {grad_b}, {c_axis, a_axis, b_axis}, attrs, ctx, req[1], workspace);
     }
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 struct NumpyCrossBackwardImpl<xpu, DType, 2, 2> {
-  static std::vector<size_t>
-  CrossBwkWorkspaceSize(const bool use_broadcast,
-                        const mxnet::TShape& a_shape,
-                        const mxnet::TShape& b_shape,
-                        const mxnet::TShape& c_shape,
-                        const mxnet::TShape& a_move_shape,
-                        const mxnet::TShape& b_move_shape,
-                        const mxnet::TShape& c_move_shape,
-                        const int& a_axis, const int& b_axis, const int& c_axis,
-                        const OpContext& ctx,
-                        const std::vector<OpReqType>& req) {
+  static std::vector<size_t> CrossBwkWorkspaceSize(const bool use_broadcast,
+                                                   const mxnet::TShape& a_shape,
+                                                   const mxnet::TShape& b_shape,
+                                                   const mxnet::TShape& c_shape,
+                                                   const mxnet::TShape& a_move_shape,
+                                                   const mxnet::TShape& b_move_shape,
+                                                   const mxnet::TShape& c_move_shape,
+                                                   const int& a_axis,
+                                                   const int& b_axis,
+                                                   const int& c_axis,
+                                                   const OpContext& ctx,
+                                                   const std::vector<OpReqType>& req) {
     std::vector<size_t> workspace_size(3, 0U);
     const int a_ndim = a_move_shape.ndim();
     const int b_ndim = b_move_shape.ndim();
     const int c_ndim = c_move_shape.ndim();
     mxnet::TShape grad_move_shape(c_ndim + 1, 2);
-    for (int i = 0; i < c_ndim; ++i) { grad_move_shape[i] = c_move_shape[i]; }
+    for (int i = 0; i < c_ndim; ++i) {
+      grad_move_shape[i] = c_move_shape[i];
+    }
 
     workspace_size[0] += grad_move_shape.Size();                 // For grad_a_move or grad_b_move.
     workspace_size[0] += a_move_shape.ProdShape(0, a_ndim - 1);  // For a_move work data.
     workspace_size[0] += b_move_shape.ProdShape(0, b_ndim - 1);  // For b_move work data.
     workspace_size[0] =                                          // For c_move work data.
-      AligndWorkspaceSize<DType>(workspace_size[0], c_move_shape.Size());
+        AligndWorkspaceSize<DType>(workspace_size[0], c_move_shape.Size());
 
-    if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
+    if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
       if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
         workspace_size[1] += a_move_shape.Size();     // For a_move size.
         workspace_size[1] += b_move_shape.Size();     // For b_move size.
@@ -1134,10 +1321,10 @@ struct NumpyCrossBackwardImpl<xpu, DType, 2, 2> {
     if (use_broadcast) {
       mxnet::TShape grad_a_dshape = GetOriShape(grad_move_shape, a_axis);
       mxnet::TShape grad_b_dshape = GetOriShape(grad_move_shape, b_axis);
-      size_t rws1 = ReduceImplWrap<xpu, DType>::wks(a_shape, a_move_shape,
-                                                    grad_a_dshape, grad_move_shape, ctx, req[0]);
-      size_t rws2 = ReduceImplWrap<xpu, DType>::wks(b_shape, b_move_shape,
-                                                    grad_b_dshape, grad_move_shape, ctx, req[1]);
+      size_t rws1                 = ReduceImplWrap<xpu, DType>::wks(
+          a_shape, a_move_shape, grad_a_dshape, grad_move_shape, ctx, req[0]);
+      size_t rws2 = ReduceImplWrap<xpu, DType>::wks(
+          b_shape, b_move_shape, grad_b_dshape, grad_move_shape, ctx, req[1]);
       size_t rws = (std::max(rws1, rws2) + sizeof(DType) - 1) / sizeof(DType);
       workspace_size[2] += std::max(a_shape.Size(), b_shape.Size());  // For reduce result.
       workspace_size[2] += rws;                                       // For reduce workspace.
@@ -1146,131 +1333,164 @@ struct NumpyCrossBackwardImpl<xpu, DType, 2, 2> {
   }
 
   static void op(const bool use_broadcast,
-                 const TBlob& grad_c, const TBlob& a, const TBlob& b,
-                 const TBlob& grad_a, const TBlob& grad_b,
+                 const TBlob& grad_c,
+                 const TBlob& a,
+                 const TBlob& b,
+                 const TBlob& grad_a,
+                 const TBlob& grad_b,
                  const std::vector<mxnet::TShape>& moveaxis_shape_vec,
-                 const int a_axis, const int b_axis, const int c_axis,
-                 const nnvm::NodeAttrs &attrs,
+                 const int a_axis,
+                 const int b_axis,
+                 const int c_axis,
+                 const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<OpReqType>& req) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tuple<int> a_move_idx = GetMoveaxisIndex(a_axis, -1, a.shape_);
-    Tuple<int> b_move_idx = GetMoveaxisIndex(b_axis, -1, b.shape_);
+    Stream<xpu>* s                  = ctx.get_stream<xpu>();
+    Tuple<int> a_move_idx           = GetMoveaxisIndex(a_axis, -1, a.shape_);
+    Tuple<int> b_move_idx           = GetMoveaxisIndex(b_axis, -1, b.shape_);
     const mxnet::TShape& a_move_shp = moveaxis_shape_vec[0];
     const mxnet::TShape& b_move_shp = moveaxis_shape_vec[1];
     const mxnet::TShape& c_move_shp = grad_c.shape_;
-    std::vector<int> a_reduce_axis = GetReduceAxis(a_move_shp, c_move_shp);
-    std::vector<int> b_reduce_axis = GetReduceAxis(b_move_shp, c_move_shp);
-    const int a_ndim = a_move_shp.ndim();
-    const int b_ndim = b_move_shp.ndim();
-    const int c_ndim = c_move_shp.ndim();
+    std::vector<int> a_reduce_axis  = GetReduceAxis(a_move_shp, c_move_shp);
+    std::vector<int> b_reduce_axis  = GetReduceAxis(b_move_shp, c_move_shp);
+    const int a_ndim                = a_move_shp.ndim();
+    const int b_ndim                = b_move_shp.ndim();
+    const int c_ndim                = c_move_shp.ndim();
     mxnet::TShape grad_move_shp(c_ndim + 1, 2);
-    for (int i = 0; i < c_ndim; ++i) { grad_move_shp[i] = c_move_shp[i]; }
+    for (int i = 0; i < c_ndim; ++i) {
+      grad_move_shp[i] = c_move_shp[i];
+    }
     // Calculate workspace size.
-    std::vector<size_t> wk_size = CrossBwkWorkspaceSize(use_broadcast,
-                                                        a.shape_, b.shape_, grad_c.shape_,
-                                                        a_move_shp, b_move_shp, c_move_shp,
-                                                        a_axis, b_axis, c_axis, ctx, req);
+    std::vector<size_t> wk_size     = CrossBwkWorkspaceSize(use_broadcast,
+                                                        a.shape_,
+                                                        b.shape_,
+                                                        grad_c.shape_,
+                                                        a_move_shp,
+                                                        b_move_shp,
+                                                        c_move_shp,
+                                                        a_axis,
+                                                        b_axis,
+                                                        c_axis,
+                                                        ctx,
+                                                        req);
     Tensor<xpu, 1, DType> workspace = ctx.requested[0].get_space_typed<xpu, 1, DType>(
-      Shape1(wk_size[0] + wk_size[1] + wk_size[2]), s);
+        Shape1(wk_size[0] + wk_size[1] + wk_size[2]), s);
 
     // Allocate workspace in cpu, no need to align address.
-    DType *grad_ptr = workspace.dptr_;
-    DType *aw_ptr = grad_ptr + grad_move_shp.Size();
-    DType *bw_ptr = aw_ptr + a_move_shp.ProdShape(0, a_ndim - 1);
-    DType *cw_ptr = bw_ptr + b_move_shp.ProdShape(0, b_ndim - 1);
+    DType* grad_ptr = workspace.dptr_;
+    DType* aw_ptr   = grad_ptr + grad_move_shp.Size();
+    DType* bw_ptr   = aw_ptr + a_move_shp.ProdShape(0, a_ndim - 1);
+    DType* cw_ptr   = bw_ptr + b_move_shp.ProdShape(0, b_ndim - 1);
     TBlob grad_move_data(grad_ptr, grad_move_shp, grad_c.dev_mask(), grad_c.dev_id());
     TBlob aw_data(aw_ptr, GetCutoffShape(a_move_shp), grad_c.dev_mask(), grad_c.dev_id());
     TBlob bw_data(bw_ptr, GetCutoffShape(b_move_shp), grad_c.dev_mask(), grad_c.dev_id());
     TBlob cw_data(cw_ptr, c_move_shp, grad_c.dev_mask(), grad_c.dev_id());
     TBlob a_move_data = a;
     TBlob b_move_data = b;
-    TBlob grad_data = grad_move_data;
-    size_t offset = 0;
-    if (a_axis != a_ndim -1 || b_axis != b_ndim - 1) {
+    TBlob grad_data   = grad_move_data;
+    size_t offset     = 0;
+    if (a_axis != a_ndim - 1 || b_axis != b_ndim - 1) {
       if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
-        DType *a_ptr = workspace.dptr_ + wk_size[0];
-        DType *b_ptr = a_ptr + a_move_shp.Size();
-        a_move_data = TBlob(a_ptr, a_move_shp, a.dev_mask(), a.dev_id());
-        b_move_data = TBlob(b_ptr, b_move_shp, b.dev_mask(), b.dev_id());
-        TransposeImpl<xpu>(ctx.run_ctx, a, a_move_data,
-                           mxnet::TShape(a_move_idx.begin(), a_move_idx.end()));
-        TransposeImpl<xpu>(ctx.run_ctx, b, b_move_data,
-                           mxnet::TShape(b_move_idx.begin(), b_move_idx.end()));
+        DType* a_ptr = workspace.dptr_ + wk_size[0];
+        DType* b_ptr = a_ptr + a_move_shp.Size();
+        a_move_data  = TBlob(a_ptr, a_move_shp, a.dev_mask(), a.dev_id());
+        b_move_data  = TBlob(b_ptr, b_move_shp, b.dev_mask(), b.dev_id());
+        TransposeImpl<xpu>(
+            ctx.run_ctx, a, a_move_data, mxnet::TShape(a_move_idx.begin(), a_move_idx.end()));
+        TransposeImpl<xpu>(
+            ctx.run_ctx, b, b_move_data, mxnet::TShape(b_move_idx.begin(), b_move_idx.end()));
       } else {
-        DType *w1_ptr = workspace.dptr_ + wk_size[0];
-        a_move_data = TBlob(w1_ptr + offset, a_move_shp, a.dev_mask(), a.dev_id());
-        offset = AligndWorkspaceSize<DType>(offset, a_move_shp.Size());
+        DType* w1_ptr = workspace.dptr_ + wk_size[0];
+        a_move_data   = TBlob(w1_ptr + offset, a_move_shp, a.dev_mask(), a.dev_id());
+        offset        = AligndWorkspaceSize<DType>(offset, a_move_shp.Size());
 
         b_move_data = TBlob(w1_ptr + offset, b_move_shp, a.dev_mask(), a.dev_id());
-        offset = AligndWorkspaceSize<DType>(offset, a_move_shp.Size());
+        offset      = AligndWorkspaceSize<DType>(offset, a_move_shp.Size());
 
-        TransposeImpl<xpu>(ctx.run_ctx, a, a_move_data,
-                           mxnet::TShape(a_move_idx.begin(), a_move_idx.end()));
-        TransposeImpl<xpu>(ctx.run_ctx, b, b_move_data,
-                           mxnet::TShape(b_move_idx.begin(), b_move_idx.end()));
+        TransposeImpl<xpu>(
+            ctx.run_ctx, a, a_move_data, mxnet::TShape(a_move_idx.begin(), a_move_idx.end()));
+        TransposeImpl<xpu>(
+            ctx.run_ctx, b, b_move_data, mxnet::TShape(b_move_idx.begin(), b_move_idx.end()));
       }
     }
     // Copy b_move_data[..., 1] to bw_data.
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, bw_data.Size(),
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 bw_data.Size(),
                                                  b_move_data.dptr<DType>(),
                                                  bw_data.dptr<DType>(),
                                                  b_move_data.size(b_ndim - 1),
-                                                 1, b_move_data.Size());
+                                                 1,
+                                                 b_move_data.Size());
     // cw_data = grad_c_move * b_move_data[..., 1].
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { grad_c, bw_data },
-                                                     { kWriteTo }, { cw_data });
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {grad_c, bw_data}, {kWriteTo}, {cw_data});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { grad_c, bw_data },
-                                      { kWriteTo }, { cw_data });
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {grad_c, bw_data},
+        {kWriteTo},
+        {cw_data});
 #endif  // !defined(__CUDACC__)
     // Copy cw_data to grad_move_data[..., 0].
-    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s, cw_data.Size(),
+    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s,
+                                                            cw_data.Size(),
                                                             cw_data.dptr<DType>(),
                                                             grad_move_data.dptr<DType>(),
-                                                            true, grad_move_data.size(c_ndim),
-                                                            0, grad_move_data.Size());
+                                                            true,
+                                                            grad_move_data.size(c_ndim),
+                                                            0,
+                                                            grad_move_data.Size());
     // Copy b_move_data[..., 0] to bw_data.
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, bw_data.Size(),
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 bw_data.Size(),
                                                  b_move_data.dptr<DType>(),
                                                  bw_data.dptr<DType>(),
                                                  b_move_data.size(b_ndim - 1),
-                                                 0, b_move_data.Size());
+                                                 0,
+                                                 b_move_data.Size());
     // cw_data = grad_c_move * b_move_data[..., 0].
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { grad_c, bw_data },
-                                                     { kWriteTo }, { cw_data });
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {grad_c, bw_data}, {kWriteTo}, {cw_data});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { grad_c, bw_data },
-                                      { kWriteTo }, { cw_data });
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {grad_c, bw_data},
+        {kWriteTo},
+        {cw_data});
 #endif  // !defined(__CUDACC__)
     // Copy -cw_data to grad_move_data[..., 1].
-    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s, cw_data.Size(),
+    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s,
+                                                            cw_data.Size(),
                                                             cw_data.dptr<DType>(),
                                                             grad_move_data.dptr<DType>(),
-                                                            false, grad_move_data.size(c_ndim),
-                                                            1, grad_move_data.Size());
+                                                            false,
+                                                            grad_move_data.size(c_ndim),
+                                                            1,
+                                                            grad_move_data.Size());
     // Transpose grad_move_data according to a_axis.
     grad_data = grad_move_data;
     if (a_axis != a_ndim - 1) {
       mxnet::TShape grad_shp = GetOriShape(grad_move_shp, a_axis);
       if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
-        DType *grad_ptr = workspace.dptr_ + wk_size[0] + a_move_shp.Size() + b_move_shp.Size();
-        grad_data = TBlob(grad_ptr, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
+        DType* grad_ptr = workspace.dptr_ + wk_size[0] + a_move_shp.Size() + b_move_shp.Size();
+        grad_data       = TBlob(grad_ptr, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
       } else {
-        DType *w1_ptr = workspace.dptr_ + wk_size[0];
-        grad_data = TBlob(w1_ptr + offset, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
-        offset = AligndWorkspaceSize<DType>(offset, grad_shp.Size());
+        DType* w1_ptr = workspace.dptr_ + wk_size[0];
+        grad_data     = TBlob(w1_ptr + offset, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
+        offset        = AligndWorkspaceSize<DType>(offset, grad_shp.Size());
       }
       const Tuple<int> axis_idx = GetMoveaxisIndex(-1, a_axis, grad_move_shp);
-      TransposeImpl<xpu>(ctx.run_ctx, grad_move_data, grad_data,
-                         mxnet::TShape(axis_idx.begin(), axis_idx.end()));
+      TransposeImpl<xpu>(
+          ctx.run_ctx, grad_move_data, grad_data, mxnet::TShape(axis_idx.begin(), axis_idx.end()));
     }
     if (!a_reduce_axis.empty()) {
-      size_t interval = std::max(grad_a.Size(), grad_b.Size());
-      DType *grad_delete_ptr = workspace.dptr_ + wk_size[0] + wk_size[1];
-      char *dw_ptr = reinterpret_cast<char*>(grad_delete_ptr + interval);
+      size_t interval        = std::max(grad_a.Size(), grad_b.Size());
+      DType* grad_delete_ptr = workspace.dptr_ + wk_size[0] + wk_size[1];
+      char* dw_ptr           = reinterpret_cast<char*>(grad_delete_ptr + interval);
       TBlob grad_delete_data(grad_delete_ptr, grad_a.shape_, grad_c.dev_mask(), grad_c.dev_id());
       Tensor<xpu, 1, char> dw_tensor(dw_ptr, Shape1((wk_size[2] - interval) * sizeof(DType)), s);
       // Reduce grad_data to grad_delete_data and copy to grad_a.
@@ -1278,70 +1498,88 @@ struct NumpyCrossBackwardImpl<xpu, DType, 2, 2> {
     } else {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-          s, grad_a.Size(), grad_data.dptr<DType>(), grad_a.dptr<DType>());
+            s, grad_a.Size(), grad_data.dptr<DType>(), grad_a.dptr<DType>());
       });
     }
 
     // Copy a_move_data[..., 1] to aw_data.
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, aw_data.Size(),
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 aw_data.Size(),
                                                  a_move_data.dptr<DType>(),
                                                  aw_data.dptr<DType>(),
                                                  a_move_data.size(a_ndim - 1),
-                                                 1, a_move_data.Size());
+                                                 1,
+                                                 a_move_data.Size());
     // cw_data = grad_c_move * a_move_data[..., 1].
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { grad_c, aw_data },
-                                                     { kWriteTo }, { cw_data });
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {grad_c, aw_data}, {kWriteTo}, {cw_data});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { grad_c, aw_data },
-                                      { kWriteTo }, { cw_data });
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {grad_c, aw_data},
+        {kWriteTo},
+        {cw_data});
 #endif  // !defined(__CUDACC__)
     // Copy -cw_data to grad_move_data[..., 0].
-    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s, cw_data.Size(),
+    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s,
+                                                            cw_data.Size(),
                                                             cw_data.dptr<DType>(),
                                                             grad_move_data.dptr<DType>(),
-                                                            false, grad_move_data.size(c_ndim),
-                                                            0, grad_move_data.Size());
+                                                            false,
+                                                            grad_move_data.size(c_ndim),
+                                                            0,
+                                                            grad_move_data.Size());
     // Copy a_move_data[..., 0] to aw_data.
-    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s, aw_data.Size(),
+    mxnet_op::Kernel<CrossInAssign, xpu>::Launch(s,
+                                                 aw_data.Size(),
                                                  a_move_data.dptr<DType>(),
                                                  aw_data.dptr<DType>(),
                                                  a_move_data.size(a_ndim - 1),
-                                                 0, a_move_data.Size());
+                                                 0,
+                                                 a_move_data.Size());
     // cw_data = grad_c_move * a_move_data[..., 0].
 #if !defined(__CUDACC__)
-    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(attrs, ctx, { grad_c, aw_data },
-                                                     { kWriteTo }, { cw_data });
+    BinaryBroadcastCompute<xpu, op::mshadow_op::mul>(
+        attrs, ctx, {grad_c, aw_data}, {kWriteTo}, {cw_data});
 #else
-    BinaryBroadcastRTCCompute {"mul"}(attrs, ctx, { grad_c, aw_data },
-                                      { kWriteTo }, { cw_data });
+    BinaryBroadcastRTCCompute{"mul"}(  // NOLINT
+        attrs,
+        ctx,
+        {grad_c, aw_data},
+        {kWriteTo},
+        {cw_data});
 #endif  // !defined(__CUDACC__)
     // Copy cw_data to grad_move_data[..., 1].
-    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s, cw_data.Size(),
+    mxnet_op::Kernel<CrossOutAssign<kWriteTo>, xpu>::Launch(s,
+                                                            cw_data.Size(),
                                                             cw_data.dptr<DType>(),
                                                             grad_move_data.dptr<DType>(),
-                                                            true, grad_move_data.size(c_ndim),
-                                                            1, grad_move_data.Size());
+                                                            true,
+                                                            grad_move_data.size(c_ndim),
+                                                            1,
+                                                            grad_move_data.Size());
     // Transpose grad_move_data according to b_axis.
     grad_data = grad_move_data;
     if (b_axis != b_ndim - 1) {
       mxnet::TShape grad_shp = GetOriShape(grad_move_shp, b_axis);
       if (ctx.run_ctx.get_ctx().dev_mask() == cpu::kDevMask) {
-        DType *grad_ptr = workspace.dptr_ + wk_size[0] + a_move_shp.Size() + b_move_shp.Size();
-        grad_data = TBlob(grad_ptr, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
+        DType* grad_ptr = workspace.dptr_ + wk_size[0] + a_move_shp.Size() + b_move_shp.Size();
+        grad_data       = TBlob(grad_ptr, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
       } else {
-        DType *w1_ptr = workspace.dptr_ + wk_size[0];
-        grad_data = TBlob(w1_ptr + offset, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
-        offset = AligndWorkspaceSize<DType>(offset, grad_shp.Size());
+        DType* w1_ptr = workspace.dptr_ + wk_size[0];
+        grad_data     = TBlob(w1_ptr + offset, grad_shp, grad_c.dev_mask(), grad_c.dev_id());
+        offset        = AligndWorkspaceSize<DType>(offset, grad_shp.Size());
       }
       const Tuple<int> axis_idx = GetMoveaxisIndex(-1, b_axis, grad_move_shp);
-      TransposeImpl<xpu>(ctx.run_ctx, grad_move_data, grad_data,
-                         mxnet::TShape(axis_idx.begin(), axis_idx.end()));
+      TransposeImpl<xpu>(
+          ctx.run_ctx, grad_move_data, grad_data, mxnet::TShape(axis_idx.begin(), axis_idx.end()));
     }
     if (!b_reduce_axis.empty()) {
-      size_t interval = std::max(grad_a.Size(), grad_b.Size());
-      DType *grad_delete_ptr = workspace.dptr_ + wk_size[0] + wk_size[1];
-      char *dw_ptr = reinterpret_cast<char*>(grad_delete_ptr + interval);
+      size_t interval        = std::max(grad_a.Size(), grad_b.Size());
+      DType* grad_delete_ptr = workspace.dptr_ + wk_size[0] + wk_size[1];
+      char* dw_ptr           = reinterpret_cast<char*>(grad_delete_ptr + interval);
       TBlob grad_delete_data(grad_delete_ptr, grad_b.shape_, grad_c.dev_mask(), grad_c.dev_id());
       Tensor<xpu, 1, char> dw_tensor(dw_ptr, Shape1((wk_size[2] - interval) * sizeof(DType)), s);
       // Reduce grad_data to grad_delete_data and copy to grad_a.
@@ -1349,75 +1587,119 @@ struct NumpyCrossBackwardImpl<xpu, DType, 2, 2> {
     } else {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         mxnet_op::Kernel<ResAssign<req_type>, xpu>::Launch(
-          s, grad_b.Size(), grad_data.dptr<DType>(), grad_b.dptr<DType>());
+            s, grad_b.Size(), grad_data.dptr<DType>(), grad_b.dptr<DType>());
       });
     }
   }
 };
 
 template <typename xpu>
-void NumpyCrossBackward(const nnvm::NodeAttrs &attrs,
-                        const OpContext &ctx,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
+void NumpyCrossBackward(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
   const TBlob& grad_c = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
+  const TBlob& a      = inputs[1];
+  const TBlob& b      = inputs[2];
   const TBlob& grad_a = outputs[0];
   const TBlob& grad_b = outputs[1];
 
-  if (kNullOp == req[0] && kNullOp == req[1]) { return; }
+  if (kNullOp == req[0] && kNullOp == req[1]) {
+    return;
+  }
   // Zero-size output, no need to launch kernel
-  if (0U == grad_c.Size()) { return; }
+  if (0U == grad_c.Size()) {
+    return;
+  }
 
-  const mxnet::TShape& a_shape = a.shape_;
-  const mxnet::TShape& b_shape = b.shape_;
-  const mxnet::TShape& c_shape = grad_c.shape_;
-  const int a_ndim = a_shape.ndim();
-  const int b_ndim = b_shape.ndim();
-  const int c_ndim = c_shape.ndim();
-  const NumpyCrossParam& param = nnvm::get<NumpyCrossParam>(attrs.parsed);
-  Tuple<int> a_moveaxis_index = GetMoveaxisIndex(param.axisa, -1, a_shape);
-  Tuple<int> b_moveaxis_index = GetMoveaxisIndex(param.axisb, -1, b_shape);
-  Tuple<int> c_moveaxis_index = GetMoveaxisIndex(param.axisc, -1, c_shape);
+  const mxnet::TShape& a_shape   = a.shape_;
+  const mxnet::TShape& b_shape   = b.shape_;
+  const mxnet::TShape& c_shape   = grad_c.shape_;
+  const int a_ndim               = a_shape.ndim();
+  const int b_ndim               = b_shape.ndim();
+  const int c_ndim               = c_shape.ndim();
+  const NumpyCrossParam& param   = nnvm::get<NumpyCrossParam>(attrs.parsed);
+  Tuple<int> a_moveaxis_index    = GetMoveaxisIndex(param.axisa, -1, a_shape);
+  Tuple<int> b_moveaxis_index    = GetMoveaxisIndex(param.axisb, -1, b_shape);
+  Tuple<int> c_moveaxis_index    = GetMoveaxisIndex(param.axisc, -1, c_shape);
   mxnet::TShape a_moveaxis_shape = GetMoveaxisShape(a_moveaxis_index, a_shape);
   mxnet::TShape b_moveaxis_shape = GetMoveaxisShape(b_moveaxis_index, b_shape);
   mxnet::TShape c_moveaxis_shape = GetMoveaxisShape(c_moveaxis_index, c_shape);
-  const int a_axis = CheckAxis(param.axisa, a_ndim);
-  const int b_axis = CheckAxis(param.axisb, b_ndim);
-  const int c_axis = CheckAxis(param.axisc, c_ndim);
-  std::vector<mxnet::TShape> move_shp_vec({ a_moveaxis_shape, b_moveaxis_shape, c_moveaxis_shape });
+  const int a_axis               = CheckAxis(param.axisa, a_ndim);
+  const int b_axis               = CheckAxis(param.axisb, b_ndim);
+  const int c_axis               = CheckAxis(param.axisc, c_ndim);
+  std::vector<mxnet::TShape> move_shp_vec({a_moveaxis_shape, b_moveaxis_shape, c_moveaxis_shape});
 
   MSHADOW_SGL_DBL_TYPE_SWITCH(grad_c.type_flag_, DType, {
     bool use_broadcast = CheckUseBroadcast(a_moveaxis_shape, b_moveaxis_shape);
     if (a_moveaxis_shape[a_ndim - 1] == 2) {
       if (b_moveaxis_shape[b_ndim - 1] == 2) {
         // Case 1: a.shape[-1] == 2 and b.shape[-1] == 2, param.axisc is ignored.
-        NumpyCrossBackwardImpl<xpu, DType, 2, 2>::op(use_broadcast, grad_c, a, b, grad_a, grad_b,
-                                                     move_shp_vec, a_axis, b_axis, c_axis,
-                                                     attrs, ctx, req);
+        NumpyCrossBackwardImpl<xpu, DType, 2, 2>::op(use_broadcast,
+                                                     grad_c,
+                                                     a,
+                                                     b,
+                                                     grad_a,
+                                                     grad_b,
+                                                     move_shp_vec,
+                                                     a_axis,
+                                                     b_axis,
+                                                     c_axis,
+                                                     attrs,
+                                                     ctx,
+                                                     req);
       } else {
         // Case 2: a.shape[-1] == 2 and b.shape[-1] == 3, param.axisc is not ignored.
-        NumpyCrossBackwardImpl<xpu, DType, 2, 3>::op(use_broadcast, grad_c, a, b, grad_a, grad_b,
-                                                     move_shp_vec, a_axis, b_axis, c_axis,
-                                                     attrs, ctx, req);
+        NumpyCrossBackwardImpl<xpu, DType, 2, 3>::op(use_broadcast,
+                                                     grad_c,
+                                                     a,
+                                                     b,
+                                                     grad_a,
+                                                     grad_b,
+                                                     move_shp_vec,
+                                                     a_axis,
+                                                     b_axis,
+                                                     c_axis,
+                                                     attrs,
+                                                     ctx,
+                                                     req);
       }
     } else {
       if (b_moveaxis_shape[b_ndim - 1] == 2) {
         // Case 3: a.shape[-1] == 3 and b.shape[-1] == 2, param.axisc is not ignored.
-        NumpyCrossBackwardImpl<xpu, DType, 3, 2>::op(use_broadcast, grad_c, a, b, grad_a, grad_b,
-                                                     move_shp_vec, a_axis, b_axis, c_axis,
-                                                     attrs, ctx, req);
+        NumpyCrossBackwardImpl<xpu, DType, 3, 2>::op(use_broadcast,
+                                                     grad_c,
+                                                     a,
+                                                     b,
+                                                     grad_a,
+                                                     grad_b,
+                                                     move_shp_vec,
+                                                     a_axis,
+                                                     b_axis,
+                                                     c_axis,
+                                                     attrs,
+                                                     ctx,
+                                                     req);
       } else {
         // Case 4: a.shape[-1] == 3 and b.shape[-1] == 3, param.axisc is not ignored.
-        NumpyCrossBackwardImpl<xpu, DType, 3, 3>::op(use_broadcast, grad_c, a, b, grad_a, grad_b,
-                                                     move_shp_vec, a_axis, b_axis, c_axis,
-                                                     attrs, ctx, req);
+        NumpyCrossBackwardImpl<xpu, DType, 3, 3>::op(use_broadcast,
+                                                     grad_c,
+                                                     a,
+                                                     b,
+                                                     grad_a,
+                                                     grad_b,
+                                                     move_shp_vec,
+                                                     a_axis,
+                                                     b_axis,
+                                                     c_axis,
+                                                     attrs,
+                                                     ctx,
+                                                     req);
       }
     }
   });
diff --git a/src/operator/numpy/np_cross.cc b/src/operator/numpy/np_cross.cc
index cdf81cc3edfd..c99df52bb05c 100644
--- a/src/operator/numpy/np_cross.cc
+++ b/src/operator/numpy/np_cross.cc
@@ -29,8 +29,8 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyCrossShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& a_shape = in_attrs->at(0);
@@ -41,24 +41,24 @@ inline bool NumpyCrossShape(const nnvm::NodeAttrs& attrs,
 
   if (shape_is_known(a_shape) && shape_is_known(b_shape)) {
     const NumpyCrossParam& param = nnvm::get<NumpyCrossParam>(attrs.parsed);
-    const int a_ndim = a_shape.ndim();
-    const int b_ndim = b_shape.ndim();
+    const int a_ndim             = a_shape.ndim();
+    const int b_ndim             = b_shape.ndim();
     CHECK_GE(a_ndim, 1) << "Array must be at least one-dimensional";
     CHECK_GE(b_ndim, 1) << "Array must be at least one-dimensional";
     CHECK_LE(a_ndim, broadcast::MAX_DIM)
-      << "cross product support at most " << broadcast::MAX_DIM << " dimensions";
+        << "cross product support at most " << broadcast::MAX_DIM << " dimensions";
     CHECK_LE(b_ndim, broadcast::MAX_DIM)
-      << "cross product support at most " << broadcast::MAX_DIM << " dimensions";
+        << "cross product support at most " << broadcast::MAX_DIM << " dimensions";
 
-    const Tuple<int> a_moveaxis_index = GetMoveaxisIndex(param.axisa, -1, a_shape);
-    const Tuple<int> b_moveaxis_index = GetMoveaxisIndex(param.axisb, -1, b_shape);
+    const Tuple<int> a_moveaxis_index    = GetMoveaxisIndex(param.axisa, -1, a_shape);
+    const Tuple<int> b_moveaxis_index    = GetMoveaxisIndex(param.axisb, -1, b_shape);
     const mxnet::TShape a_moveaxis_shape = GetMoveaxisShape(a_moveaxis_index, a_shape);
     const mxnet::TShape b_moveaxis_shape = GetMoveaxisShape(b_moveaxis_index, b_shape);
 
     CHECK(a_moveaxis_shape[a_ndim - 1] == 2 || a_moveaxis_shape[a_ndim - 1] == 3)
-      << "incompatible dimensions for cross product and axis should have dimensions 2 or 3.";
+        << "incompatible dimensions for cross product and axis should have dimensions 2 or 3.";
     CHECK(b_moveaxis_shape[b_ndim - 1] == 2 || b_moveaxis_shape[b_ndim - 1] == 3)
-      << "incompatible dimensions for cross product and axis should have dimensions 2 or 3.";
+        << "incompatible dimensions for cross product and axis should have dimensions 2 or 3.";
 
     if (a_ndim == 1 && b_ndim == 1) {
       if (a_moveaxis_shape[a_ndim - 1] == 2 && b_moveaxis_shape[b_ndim - 1] == 2) {
@@ -77,7 +77,7 @@ inline bool NumpyCrossShape(const nnvm::NodeAttrs& attrs,
       } else {
         // At least one N-D arrays and at least one dim = 3, param.axisc not ignored.
         // Check axisc is within bounds.
-        const Tuple<int> c_moveaxis_index = GetMoveaxisIndex(-1, param.axisc, c_shape);
+        const Tuple<int> c_moveaxis_index    = GetMoveaxisIndex(-1, param.axisc, c_shape);
         const mxnet::TShape c_moveaxis_shape = GetMoveaxisShape(c_moveaxis_index, c_shape);
         SHAPE_ASSIGN_CHECK(*out_attrs, 0, c_moveaxis_shape);
       }
@@ -89,33 +89,37 @@ inline bool NumpyCrossShape(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyCrossParam);
 
 NNVM_REGISTER_OP(_npi_cross)
-.set_attr_parser(ParamParser<NumpyCrossParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"a", "b"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyCrossShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyCrossForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_cross"})
-.add_argument("a", "NDArray-or-Symbol", "First vector")
-.add_argument("b", "NDArray-or-Symbol", "Second vector")
-.add_arguments(NumpyCrossParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyCrossParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyCrossShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyCrossForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_cross"})
+    .add_argument("a", "NDArray-or-Symbol", "First vector")
+    .add_argument("b", "NDArray-or-Symbol", "Second vector")
+    .add_arguments(NumpyCrossParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_cross)
-.set_attr_parser(ParamParser<NumpyCrossParam>)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-})
-.set_attr<FCompute>("FCompute<cpu>", NumpyCrossBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyCrossParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyCrossBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_cross.cu b/src/operator/numpy/np_cross.cu
index 50b2a2e7dd2c..cdf0a0ab1f57 100644
--- a/src/operator/numpy/np_cross.cu
+++ b/src/operator/numpy/np_cross.cu
@@ -28,11 +28,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_cross)
-.set_attr<FCompute>("FCompute<gpu>", NumpyCrossForward<gpu>);
+NNVM_REGISTER_OP(_npi_cross).set_attr<FCompute>("FCompute<gpu>", NumpyCrossForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_cross)
-.set_attr<FCompute>("FCompute<gpu>", NumpyCrossBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_cross).set_attr<FCompute>("FCompute<gpu>", NumpyCrossBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_cumsum-inl.h b/src/operator/numpy/np_cumsum-inl.h
index 61615562eb48..5d58b0254dec 100644
--- a/src/operator/numpy/np_cumsum-inl.h
+++ b/src/operator/numpy/np_cumsum-inl.h
@@ -42,21 +42,23 @@ struct CumsumParam : public dmlc::Parameter<CumsumParam> {
   dmlc::optional<int> dtype;
   DMLC_DECLARE_PARAMETER(CumsumParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<int>())
-      .describe("Axis along which the cumulative sum is computed."
-        " The default (None) is to compute the cumsum over the flattened array.");
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Axis along which the cumulative sum is computed."
+            " The default (None) is to compute the cumsum over the flattened array.");
     DMLC_DECLARE_FIELD(dtype)
-      .add_enum("float16", mshadow::kFloat16)
-      .add_enum("float32", mshadow::kFloat32)
-      .add_enum("float64", mshadow::kFloat64)
-      .add_enum("int8", mshadow::kInt8)
-      .add_enum("int32", mshadow::kInt32)
-      .add_enum("int64", mshadow::kInt64)
-      .set_default(dmlc::optional<int>())
-      .describe("Type of the returned array and of the accumulator in which the elements"
-                " are summed. If dtype is not specified, it defaults to the dtype of a,"
-                " unless a has an integer dtype with a precision less than that of the"
-                " default platform integer. In that case, the default platform integer is used.");
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("int8", mshadow::kInt8)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int64", mshadow::kInt64)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Type of the returned array and of the accumulator in which the elements"
+            " are summed. If dtype is not specified, it defaults to the dtype of a,"
+            " unless a has an integer dtype with a precision less than that of the"
+            " default platform integer. In that case, the default platform integer is used.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, dtype_s;
@@ -72,24 +74,24 @@ struct CumsumParam : public dmlc::Parameter<CumsumParam> {
 };
 
 struct cumsum_forward {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  OType *out,
-                                  const IType *in,
+                                  OType* out,
+                                  const IType* in,
                                   const index_t middle,
                                   const index_t trailing) {
     index_t left = i / trailing, right = i % trailing;
-    index_t offset = left * middle * trailing + right;
-    const IType *lane_in = in + offset;
-    OType *lane_out = out + offset;
-    lane_out[0] = OType(lane_in[0]);
+    index_t offset       = left * middle * trailing + right;
+    const IType* lane_in = in + offset;
+    OType* lane_out      = out + offset;
+    lane_out[0]          = OType(lane_in[0]);
     for (index_t j = 1; j < middle; ++j) {
       lane_out[j * trailing] = lane_out[(j - 1) * trailing] + OType(lane_in[j * trailing]);
     }
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void CumsumForwardImpl(const OpContext& ctx,
                        const TBlob& in,
                        const TBlob& out,
@@ -99,10 +101,11 @@ void CumsumForwardImpl(const OpContext& ctx,
 
   CHECK(!axis.has_value() ||
         ((axis.value() >= -out.shape_.ndim()) && axis.value() < out.shape_.ndim()))
-    << "axis value " << axis.value() << " out of range";
+      << "axis value " << axis.value() << " out of range";
 
   size_t middle = axis.has_value() ? out.shape_[axis.value()] : out.Size();
-  if (middle == 0 || out.Size() == 0) return;
+  if (middle == 0 || out.Size() == 0)
+    return;
   size_t trailing = 1;
   if (axis.has_value()) {
     for (index_t i = axis.value() + 1; i < out.shape_.ndim(); ++i) {
@@ -110,17 +113,16 @@ void CumsumForwardImpl(const OpContext& ctx,
     }
   }
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(in.type_flag_, IType, {
     MSHADOW_TYPE_SWITCH(out.type_flag_, OType, {
       Kernel<cumsum_forward, xpu>::Launch(
-        s, out.Size() / middle, out.dptr<OType>(),
-        in.dptr<IType>(), middle, trailing);
+          s, out.Size() / middle, out.dptr<OType>(), in.dptr<IType>(), middle, trailing);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void CumsumForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -131,22 +133,22 @@ void CumsumForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const CumsumParam &param = nnvm::get<CumsumParam>(attrs.parsed);
+  const CumsumParam& param = nnvm::get<CumsumParam>(attrs.parsed);
 
   CumsumForwardImpl<xpu>(ctx, inputs[0], outputs[0], param.axis);
 }
 
 struct cumsum_backward {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  IType *igrad,
-                                  const OType *ograd,
+                                  IType* igrad,
+                                  const OType* ograd,
                                   const index_t middle,
                                   const index_t trailing) {
     index_t left = i / trailing, right = i % trailing;
-    index_t offset = left * middle * trailing + right;
-    const OType *lane_ograd = ograd + offset;
-    IType *lane_igrad = igrad + offset;
+    index_t offset                      = left * middle * trailing + right;
+    const OType* lane_ograd             = ograd + offset;
+    IType* lane_igrad                   = igrad + offset;
     lane_igrad[(middle - 1) * trailing] = IType(lane_ograd[(middle - 1) * trailing]);
     for (index_t j = middle - 2; j >= 0; --j) {
       lane_igrad[j * trailing] = lane_igrad[(j + 1) * trailing] + IType(lane_ograd[j * trailing]);
@@ -154,7 +156,7 @@ struct cumsum_backward {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void CumsumBackwardImpl(const OpContext& ctx,
                         const TBlob& ograd,
                         const TBlob& igrad,
@@ -162,24 +164,24 @@ void CumsumBackwardImpl(const OpContext& ctx,
   using namespace mshadow;
   using namespace mxnet_op;
   size_t middle = axis.has_value() ? igrad.shape_[axis.value()] : igrad.Size();
-  if (middle == 0 || igrad.Size() == 0) return;
+  if (middle == 0 || igrad.Size() == 0)
+    return;
   size_t trailing = 1;
   if (axis.has_value()) {
     for (index_t i = axis.value() + 1; i < igrad.shape_.ndim(); ++i) {
       trailing *= igrad.shape_[i];
     }
   }
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(igrad.type_flag_, IType, {
     MSHADOW_TYPE_SWITCH(ograd.type_flag_, OType, {
       Kernel<cumsum_backward, xpu>::Launch(
-        s, igrad.Size() / middle, igrad.dptr<IType>(),
-        ograd.dptr<OType>(), middle, trailing);
+          s, igrad.Size() / middle, igrad.dptr<IType>(), ograd.dptr<OType>(), middle, trailing);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void CumsumBackward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -190,7 +192,7 @@ void CumsumBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const CumsumParam &param = nnvm::get<CumsumParam>(attrs.parsed);
+  const CumsumParam& param = nnvm::get<CumsumParam>(attrs.parsed);
 
   CumsumBackwardImpl<xpu>(ctx, inputs[0], outputs[0], param.axis);
 }
diff --git a/src/operator/numpy/np_cumsum.cc b/src/operator/numpy/np_cumsum.cc
index 594f7b796347..15ebd2c264a1 100644
--- a/src/operator/numpy/np_cumsum.cc
+++ b/src/operator/numpy/np_cumsum.cc
@@ -28,11 +28,11 @@ namespace mxnet {
 namespace op {
 
 inline bool CumsumShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const CumsumParam &param = nnvm::get<CumsumParam>(attrs.parsed);
+  const CumsumParam& param = nnvm::get<CumsumParam>(attrs.parsed);
 
   if (param.axis.has_value()) {
     return ElemwiseShape<1, 1>(attrs, in_attrs, out_attrs);
@@ -44,11 +44,11 @@ inline bool CumsumShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool CumsumType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                       std::vector<int>* in_attrs,
+                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const CumsumParam &param = nnvm::get<CumsumParam>(attrs.parsed);
+  const CumsumParam& param = nnvm::get<CumsumParam>(attrs.parsed);
 
   if (param.dtype.has_value()) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, param.dtype.value());
@@ -66,32 +66,33 @@ inline bool CumsumType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(CumsumParam);
 
 NNVM_REGISTER_OP(_npi_cumsum)
-.add_alias("cumsum")
-.describe(R"code(Return the cumulative sum of the elements along a given axis.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<CumsumParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", CumsumShape)
-.set_attr<nnvm::FInferType>("FInferType", CumsumType)
-.set_attr<FCompute>("FCompute<cpu>", CumsumForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_cumsum"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("a", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(CumsumParam::__FIELDS__());
+    .add_alias("cumsum")
+    .describe(
+        R"code(Return the cumulative sum of the elements along a given axis.)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<CumsumParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", CumsumShape)
+    .set_attr<nnvm::FInferType>("FInferType", CumsumType)
+    .set_attr<FCompute>("FCompute<cpu>", CumsumForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_cumsum"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("a", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(CumsumParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_cumsum)
-.set_attr_parser(ParamParser<CumsumParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", CumsumBackward<cpu>);
+    .set_attr_parser(ParamParser<CumsumParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", CumsumBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_cumsum.cu b/src/operator/numpy/np_cumsum.cu
index 438bab2b5efe..bbc95fe89136 100644
--- a/src/operator/numpy/np_cumsum.cu
+++ b/src/operator/numpy/np_cumsum.cu
@@ -27,11 +27,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_cumsum)
-.set_attr<FCompute>("FCompute<gpu>", CumsumForward<gpu>);
+NNVM_REGISTER_OP(_npi_cumsum).set_attr<FCompute>("FCompute<gpu>", CumsumForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_cumsum)
-.set_attr<FCompute>("FCompute<gpu>", CumsumBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_cumsum).set_attr<FCompute>("FCompute<gpu>", CumsumBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_delete_op-inl.h b/src/operator/numpy/np_delete_op-inl.h
index d71837975a9d..5e2a15a3ca91 100644
--- a/src/operator/numpy/np_delete_op-inl.h
+++ b/src/operator/numpy/np_delete_op-inl.h
@@ -55,21 +55,22 @@ struct NumpyDeleteParam : public dmlc::Parameter<NumpyDeleteParam> {
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(NumpyDeleteParam) {
     DMLC_DECLARE_FIELD(start)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is slice, 'start' is one of it's arguments.");
+        .set_default(dmlc::optional<index_t>())
+        .describe("If 'obj' is slice, 'start' is one of it's arguments.");
     DMLC_DECLARE_FIELD(stop)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is slice, 'stop' is one of it's arguments.");
+        .set_default(dmlc::optional<index_t>())
+        .describe("If 'obj' is slice, 'stop' is one of it's arguments.");
     DMLC_DECLARE_FIELD(step)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is slice, 'step' is one of it's arguments.");
+        .set_default(dmlc::optional<index_t>())
+        .describe("If 'obj' is slice, 'step' is one of it's arguments.");
     DMLC_DECLARE_FIELD(int_ind)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is int, 'int_ind' is the index before which"
-              "'values' is inserted");
+        .set_default(dmlc::optional<index_t>())
+        .describe(
+            "If 'obj' is int, 'int_ind' is the index before which"
+            "'values' is inserted");
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<int>())
-    .describe("Axis along which to insert `values`.");
+        .set_default(dmlc::optional<int>())
+        .describe("Axis along which to insert `values`.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream start_s, stop_s, step_s, int_ind_s, axis_s;
@@ -78,25 +79,25 @@ struct NumpyDeleteParam : public dmlc::Parameter<NumpyDeleteParam> {
     step_s << step;
     int_ind_s << int_ind;
     axis_s << axis;
-    (*dict)["start"] = start_s.str();
-    (*dict)["stop"] = stop_s.str();
-    (*dict)["step"] = step_s.str();
+    (*dict)["start"]   = start_s.str();
+    (*dict)["stop"]    = stop_s.str();
+    (*dict)["step"]    = step_s.str();
     (*dict)["int_ind"] = int_ind_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]    = axis_s.str();
   }
 };
 
 namespace delete_ {
 
-enum DeleteOpInputs {kArr, kObj};
-enum DeleteOpOutputs {kOut};
+enum DeleteOpInputs { kArr, kObj };
+enum DeleteOpOutputs { kOut };
 }  // namespace delete_
 
 struct SliceToIndices {
   /*!
    * \brief transfer slice to indices array
    */
-  template<typename IType>
+  template <typename IType>
   MSHADOW_XINLINE static void Map(index_t i, IType* indices, int start, int step) {
     indices[i] = start + i * step;
   }
@@ -105,12 +106,12 @@ struct SliceToIndices {
 struct IsDeleteCal {
   /*!
    * \brief indicate which indices need to be deleted in input
-   * \param N used to check indices legality 
+   * \param N used to check indices legality
    * \param is_delete if is_delete[i] == False, index i needn't to be deleted from output
    *                  if is_delete[i] == True, index i need to be deleted from output
    * \param indices the indices need to be deleted
    */
-  template<typename IType>
+  template <typename IType>
   MSHADOW_XINLINE static void Map(index_t i, int N, bool* is_delete, const IType* indices) {
     if ((indices[i] >= 0) && (indices[i] < N)) {
       is_delete[static_cast<index_t>(indices[i])] = true;
@@ -138,7 +139,7 @@ struct OutPosCal {
   }
 };
 
-template<int req, int ndim>
+template <int req, int ndim>
 struct DeleteKernel {
   /*!
    * \brief delete a sub-array from input along an axis according to 'is_delete'.
@@ -150,8 +151,9 @@ struct DeleteKernel {
    * \param out_stride - the stride of 'out_data'.
    * \param axis - delete sub-array along this axis
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
                                   const DType* in_arr,
                                   const bool* is_delete,
                                   const int64_t* out_pos,
@@ -161,7 +163,7 @@ struct DeleteKernel {
     // i -> position in in_arr's shape
     mshadow::Shape<ndim> arr_idx = mxnet_op::unravel(i, arrshape);
     if (!is_delete[arr_idx[axis]]) {
-      arr_idx[axis] = out_pos[arr_idx[axis]];
+      arr_idx[axis]    = out_pos[arr_idx[axis]];
       index_t dest_idx = mxnet_op::dot(arr_idx, out_stride);
       KERNEL_ASSIGN(out_data[dest_idx], req, in_arr[i]);
     }
@@ -182,7 +184,9 @@ inline void SliceIndices(const dmlc::optional<index_t>& pstart,
                          const dmlc::optional<index_t>& pstop,
                          const dmlc::optional<index_t>& pstep,
                          const index_t range,
-                         index_t* start, index_t* stop, index_t* step,
+                         index_t* start,
+                         index_t* stop,
+                         index_t* step,
                          size_t* tot) {
   *step = pstep.has_value() ? pstep.value() : 1;
   CHECK_NE(*step, 0) << "'step' can not equal to 0.";
@@ -209,28 +213,27 @@ inline void SliceIndices(const dmlc::optional<index_t>& pstart,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyDeleteCompute(const nnvm::NodeAttrs& attrs,
-                        const OpContext &ctx,
-                        const std::vector<NDArray> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<NDArray> &outputs) {
+                        const OpContext& ctx,
+                        const std::vector<NDArray>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
 
   const NumpyDeleteParam& param = nnvm::get<NumpyDeleteParam>(attrs.parsed);
-  CHECK_EQ(inputs.size(),
-          (param.step.has_value() || param.int_ind.has_value()) ? 1U : 2U);
+  CHECK_EQ(inputs.size(), (param.step.has_value() || param.int_ind.has_value()) ? 1U : 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   int ndim = inputs[delete_::kArr].shape().ndim();
   int axis = param.axis.has_value() ? param.axis.value() : -1;
   NDArray arr;  // original array
 
   if (!param.axis.has_value()) {
-    arr = inputs[delete_::kArr].Reshape(Shape1(inputs[delete_::kArr].shape().Size()));
+    arr  = inputs[delete_::kArr].Reshape(Shape1(inputs[delete_::kArr].shape().Size()));
     ndim = 1;
     axis = -1;
   } else {
@@ -238,12 +241,12 @@ void NumpyDeleteCompute(const nnvm::NodeAttrs& attrs,
   }
 
   if (ndim == 0) {
-    const_cast<NDArray &>(outputs[delete_::kOut]).Init(arr.shape());
+    const_cast<NDArray&>(outputs[delete_::kOut]).Init(arr.shape());
     mxnet_op::copy(s, outputs[delete_::kOut].data(), inputs[delete_::kArr].data());
     return;
   }
 
-  axis = CheckAxis(axis, ndim);
+  axis      = CheckAxis(axis, ndim);
   index_t N = (arr.shape())[axis];
   mxnet::TShape outshape(arr.shape());
   // if obj is slice, they're obj's arguments
@@ -254,76 +257,81 @@ void NumpyDeleteCompute(const nnvm::NodeAttrs& attrs,
   index_t index = 0;
 
   if (param.step.has_value()) {  // obj is slice
-    SliceIndices(param.start, param.stop, param.step,
-                 N, &start, &stop, &step, &numtodel);
+    SliceIndices(param.start, param.stop, param.step, N, &start, &stop, &step, &numtodel);
     if (numtodel == 0) {
-      const_cast<NDArray &>(outputs[delete_::kOut]).Init(arr.shape());
+      const_cast<NDArray&>(outputs[delete_::kOut]).Init(arr.shape());
       mxnet_op::copy(s, outputs[delete_::kOut].data(), inputs[delete_::kArr].data());
       return;
     }
     outshape[axis] -= numtodel;
-    const_cast<NDArray &>(outputs[delete_::kOut]).Init(outshape);
+    const_cast<NDArray&>(outputs[delete_::kOut]).Init(outshape);
   } else if (param.int_ind.has_value()) {  // obj is scaler
     index = param.int_ind.value();
     CHECK((index >= -1 * N) && (index < N))
-      << "index " << index
-      << " is out of bounds for axis " << axis
-      << " with size " << N << "\n";
+        << "index " << index << " is out of bounds for axis " << axis << " with size " << N << "\n";
     index += ((index < 0) ? N : 0);
     numtodel = static_cast<size_t>(1);
     outshape[axis] -= 1;
-    const_cast<NDArray &>(outputs[delete_::kOut]).Init(outshape);
+    const_cast<NDArray&>(outputs[delete_::kOut]).Init(outshape);
   } else {  // obj is tensor
     numtodel = inputs[delete_::kObj].shape().Size();
   }
 
-  char* out_pos_ptr = nullptr;
-  char* indices_ptr = nullptr;
+  char* out_pos_ptr   = nullptr;
+  char* indices_ptr   = nullptr;
   char* is_delete_ptr = nullptr;
-  MSHADOW_TYPE_SWITCH(((inputs.size() == 2U) ?  // obj is tensor
-                      inputs[delete_::kObj].dtype() :
-                      mshadow::DataType<int64_t>::kFlag), IType, {
-    size_t temp_mem_size = sizeof(int64_t) * arr.shape()[axis] +
-                           sizeof(IType) * numtodel +
-                           sizeof(bool) * arr.shape()[axis];
-    Tensor<xpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
-    out_pos_ptr = temp_mem.dptr_;
-    indices_ptr = out_pos_ptr + sizeof(int64_t) * arr.shape()[axis];
-    is_delete_ptr = indices_ptr + sizeof(IType) * numtodel;
-    if (param.step.has_value()) {  // obj is slice, transfer slice to tensor
-      Kernel<SliceToIndices, xpu>::Launch(
-        s, numtodel, reinterpret_cast<IType*>(indices_ptr), start, step);
-    } else if (param.int_ind.has_value()) {  // obj is scaler, copy it to tensor
-      Fill(s, TBlob(reinterpret_cast<IType*>(indices_ptr),
-           Shape1(numtodel), xpu::kDevMask), kWriteTo, index);
-    } else {  // obj is tensor, copy it to a unified tensor
-      mxnet_op::copy(s,
-        TBlob(reinterpret_cast<IType*>(indices_ptr), inputs[delete_::kObj].shape(),
-              inputs[delete_::kObj].data().dev_mask()),
-        inputs[delete_::kObj].data());
-    }
-    mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(
-      s, arr.shape()[axis], reinterpret_cast<bool*>(is_delete_ptr));
-    // mark which position need to be deleted from input arr
-    Kernel<IsDeleteCal, xpu>::Launch(
-      s, numtodel, N, reinterpret_cast<bool*>(is_delete_ptr),
-      reinterpret_cast<IType*>(indices_ptr));
-    // calculate output data's original position in input arr
-    Kernel<OutPosCal, xpu>::Launch(
-      s, arr.shape()[axis], reinterpret_cast<int64_t*>(out_pos_ptr),
-      reinterpret_cast<bool*>(is_delete_ptr));
-  });
+  MSHADOW_TYPE_SWITCH(
+      ((inputs.size() == 2U) ?  // obj is tensor
+           inputs[delete_::kObj].dtype()
+                             : mshadow::DataType<int64_t>::kFlag),
+      IType,
+      {
+        size_t temp_mem_size = sizeof(int64_t) * arr.shape()[axis] + sizeof(IType) * numtodel +
+                               sizeof(bool) * arr.shape()[axis];
+        Tensor<xpu, 1, char> temp_mem =
+            ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+        out_pos_ptr   = temp_mem.dptr_;
+        indices_ptr   = out_pos_ptr + sizeof(int64_t) * arr.shape()[axis];
+        is_delete_ptr = indices_ptr + sizeof(IType) * numtodel;
+        if (param.step.has_value()) {  // obj is slice, transfer slice to tensor
+          Kernel<SliceToIndices, xpu>::Launch(
+              s, numtodel, reinterpret_cast<IType*>(indices_ptr), start, step);
+        } else if (param.int_ind.has_value()) {  // obj is scaler, copy it to tensor
+          Fill(s,
+               TBlob(reinterpret_cast<IType*>(indices_ptr), Shape1(numtodel), xpu::kDevMask),
+               kWriteTo,
+               index);
+        } else {  // obj is tensor, copy it to a unified tensor
+          mxnet_op::copy(s,
+                         TBlob(reinterpret_cast<IType*>(indices_ptr),
+                               inputs[delete_::kObj].shape(),
+                               inputs[delete_::kObj].data().dev_mask()),
+                         inputs[delete_::kObj].data());
+        }
+        mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(
+            s, arr.shape()[axis], reinterpret_cast<bool*>(is_delete_ptr));
+        // mark which position need to be deleted from input arr
+        Kernel<IsDeleteCal, xpu>::Launch(s,
+                                         numtodel,
+                                         N,
+                                         reinterpret_cast<bool*>(is_delete_ptr),
+                                         reinterpret_cast<IType*>(indices_ptr));
+        // calculate output data's original position in input arr
+        Kernel<OutPosCal, xpu>::Launch(s,
+                                       arr.shape()[axis],
+                                       reinterpret_cast<int64_t*>(out_pos_ptr),
+                                       reinterpret_cast<bool*>(is_delete_ptr));
+      });
 
   if (inputs.size() == 2U) {  // obj is tensor
-    // get total number of nonredundant indices
-    #ifdef __CUDACC__
-      thrust::device_ptr<bool>is_delete_dev(reinterpret_cast<bool*>(is_delete_ptr));
-      thrust::device_vector<bool>vec_is_delete(is_delete_dev, is_delete_dev + arr.shape()[axis]);
-    #else
-      std::vector<bool>vec_is_delete(reinterpret_cast<bool*>(is_delete_ptr),
-                                     reinterpret_cast<bool*>(is_delete_ptr) + arr.shape()[axis]);
-    #endif
+// get total number of nonredundant indices
+#ifdef __CUDACC__
+    thrust::device_ptr<bool> is_delete_dev(reinterpret_cast<bool*>(is_delete_ptr));
+    thrust::device_vector<bool> vec_is_delete(is_delete_dev, is_delete_dev + arr.shape()[axis]);
+#else
+    std::vector<bool> vec_is_delete(reinterpret_cast<bool*>(is_delete_ptr),
+                                    reinterpret_cast<bool*>(is_delete_ptr) + arr.shape()[axis]);
+#endif
     numtodel = 0;
     for (index_t i = 0; i < arr.shape()[axis]; ++i) {
       if (vec_is_delete[i]) {
@@ -331,28 +339,33 @@ void NumpyDeleteCompute(const nnvm::NodeAttrs& attrs,
       }
     }
     outshape[axis] -= numtodel;
-    const_cast<NDArray &>(outputs[delete_::kOut]).Init(outshape);
+    const_cast<NDArray&>(outputs[delete_::kOut]).Init(outshape);
   }
 
   MSHADOW_TYPE_SWITCH(((inputs.size() == 2U) ?  // obj is tensor
-                      inputs[delete_::kObj].dtype() :
-                      mshadow::DataType<int64_t>::kFlag), IType, {
-    MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-      mshadow::Shape<ndim> out_strides = mxnet_op::calc_stride(outshape.get<ndim>());
-      MSHADOW_TYPE_SWITCH(outputs[delete_::kOut].dtype(), DType, {
-        MXNET_ASSIGN_REQ_SWITCH(req[delete_::kOut], req_type, {
-          Kernel<DeleteKernel<req_type, ndim>, xpu>::Launch(
-            s, arr.shape().Size(),
-            outputs[delete_::kOut].data().dptr<DType>(),
-            arr.data().dptr<DType>(),
-            reinterpret_cast<bool*>(is_delete_ptr),
-            reinterpret_cast<int64_t*>(out_pos_ptr),
-            arr.shape().get<ndim>(),
-            out_strides, axis);
-        });
-      });
-    });
-  });
+                           inputs[delete_::kObj].dtype()
+                                             : mshadow::DataType<int64_t>::kFlag),
+                      IType,
+                      {
+                        MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
+                          mshadow::Shape<ndim> out_strides =
+                              mxnet_op::calc_stride(outshape.get<ndim>());
+                          MSHADOW_TYPE_SWITCH(outputs[delete_::kOut].dtype(), DType, {
+                            MXNET_ASSIGN_REQ_SWITCH(req[delete_::kOut], req_type, {
+                              Kernel<DeleteKernel<req_type, ndim>, xpu>::Launch(
+                                  s,
+                                  arr.shape().Size(),
+                                  outputs[delete_::kOut].data().dptr<DType>(),
+                                  arr.data().dptr<DType>(),
+                                  reinterpret_cast<bool*>(is_delete_ptr),
+                                  reinterpret_cast<int64_t*>(out_pos_ptr),
+                                  arr.shape().get<ndim>(),
+                                  out_strides,
+                                  axis);
+                            });
+                          });
+                        });
+                      });
 }
 
 }  // namespace op
diff --git a/src/operator/numpy/np_delete_op.cc b/src/operator/numpy/np_delete_op.cc
index 48840bf9d230..51969953a4e5 100644
--- a/src/operator/numpy/np_delete_op.cc
+++ b/src/operator/numpy/np_delete_op.cc
@@ -32,17 +32,17 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyDeleteParam);
 
 bool NumpyDeleteType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_type,
-                     std::vector<int> *out_type) {
+                     std::vector<int>* in_type,
+                     std::vector<int>* out_type) {
   const NumpyDeleteParam& param = nnvm::get<NumpyDeleteParam>(attrs.parsed);
-  int insize = (param.step.has_value() || param.int_ind.has_value()) ? 1 : 2;
+  int insize                    = (param.step.has_value() || param.int_ind.has_value()) ? 1 : 2;
   CHECK_EQ(in_type->size(), insize);
   CHECK_EQ(out_type->size(), 1U);
   if (insize == 3) {
     CHECK_NE((*in_type)[1], -1) << "Index type must be set for insert operator\n";
     CHECK(((*in_type)[1] == mshadow::DataType<int64_t>::kFlag) ||
           ((*in_type)[1] == mshadow::DataType<int32_t>::kFlag))
-      << "Index type only support int32 or int64.\n";
+        << "Index type only support int32 or int64.\n";
   }
   TYPE_ASSIGN_CHECK(*out_type, 0, (*in_type)[0]);
   TYPE_ASSIGN_CHECK(*in_type, 0, (*out_type)[0]);
@@ -52,16 +52,16 @@ bool NumpyDeleteType(const nnvm::NodeAttrs& attrs,
 inline bool NumpyDeleteStorageType(const nnvm::NodeAttrs& attrs,
                                    const int dev_mask,
                                    DispatchMode* dispatch_mode,
-                                   std::vector<int> *in_attrs,
-                                   std::vector<int> *out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   const NumpyDeleteParam& param = nnvm::get<NumpyDeleteParam>(attrs.parsed);
-  unsigned int insize = (param.step.has_value() || param.int_ind.has_value()) ? 1U : 2U;
+  unsigned int insize           = (param.step.has_value() || param.int_ind.has_value()) ? 1U : 2U;
   CHECK_EQ(in_attrs->size(), insize);
   CHECK_EQ(out_attrs->size(), 1U);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
   *dispatch_mode = DispatchMode::kFComputeEx;
@@ -69,30 +69,33 @@ inline bool NumpyDeleteStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_delete)
-.describe(R"code(Delete values along the given axis before the given indices.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyDeleteParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NumpyDeleteParam& params = nnvm::get<NumpyDeleteParam>(attrs.parsed);
-  return (params.step.has_value() || params.int_ind.has_value()) ? 1U : 2U;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyDeleteParam& params = nnvm::get<NumpyDeleteParam>(attrs.parsed);
-    return (params.step.has_value() || params.int_ind.has_value()) ?
-            std::vector<std::string>{"arr"} :
-            std::vector<std::string>{"arr", "obj"};
-})
-.set_attr<nnvm::FInferType>("FInferType", NumpyDeleteType)
-.set_attr<mxnet::FComputeEx>("FComputeEx<cpu>", NumpyDeleteCompute<cpu>)
-.set_attr<FInferStorageType>("FInferStorageType", NumpyDeleteStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("obj", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyDeleteParam::__FIELDS__());
+    .describe(
+        R"code(Delete values along the given axis before the given indices.)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyDeleteParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyDeleteParam& params = nnvm::get<NumpyDeleteParam>(attrs.parsed);
+      return (params.step.has_value() || params.int_ind.has_value()) ? 1U : 2U;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyDeleteParam& params =
+                                           nnvm::get<NumpyDeleteParam>(attrs.parsed);
+                                       return (params.step.has_value() ||
+                                               params.int_ind.has_value())
+                                                  ? std::vector<std::string>{"arr"}
+                                                  : std::vector<std::string>{"arr", "obj"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", NumpyDeleteType)
+    .set_attr<mxnet::FComputeEx>("FComputeEx<cpu>", NumpyDeleteCompute<cpu>)
+    .set_attr<FInferStorageType>("FInferStorageType", NumpyDeleteStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("obj", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyDeleteParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_delete_op.cu b/src/operator/numpy/np_delete_op.cu
index 599d01788138..487fd3b37ed6 100644
--- a/src/operator/numpy/np_delete_op.cu
+++ b/src/operator/numpy/np_delete_op.cu
@@ -28,8 +28,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_delete)
-.set_attr<FComputeEx>("FComputeEx<gpu>", NumpyDeleteCompute<gpu>);
+NNVM_REGISTER_OP(_npi_delete).set_attr<FComputeEx>("FComputeEx<gpu>", NumpyDeleteCompute<gpu>);
 
 }
-}
+}  // namespace mxnet
diff --git a/src/operator/numpy/np_diff-inl.h b/src/operator/numpy/np_diff-inl.h
index 5f716bc63a59..52e30dcf4771 100644
--- a/src/operator/numpy/np_diff-inl.h
+++ b/src/operator/numpy/np_diff-inl.h
@@ -50,7 +50,7 @@ struct DiffParam : public dmlc::Parameter<DiffParam> {
     std::ostringstream n_s, axis_s;
     n_s << n;
     axis_s << axis;
-    (*dict)["n"] = n_s.str();
+    (*dict)["n"]    = n_s.str();
     (*dict)["axis"] = axis_s.str();
   }
 };
@@ -68,17 +68,20 @@ inline void YanghuiTri(std::vector<int>* buffer, int n) {
 
 struct diff_forward {
   template <typename IType, typename OType, int ndim>
-  MSHADOW_XINLINE static void Map(index_t i, int* diffFactor, OType* out,
-                                  const IType* in, const int n,
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int* diffFactor,
+                                  OType* out,
+                                  const IType* in,
+                                  const int n,
                                   const index_t stride,
                                   const mshadow::Shape<ndim> oshape,
                                   const mshadow::Shape<ndim> ishape) {
     using namespace mxnet_op;
 
     // j represent the memory index of the corresponding input entry
-    index_t j = ravel(unravel(i, oshape), ishape);
+    index_t j     = ravel(unravel(i, oshape), ishape);
     int indicator = 1;
-    out[i] = 0;
+    out[i]        = 0;
     for (int k = n; k >= 0; --k) {
       out[i] += in[j + stride * k] * indicator * diffFactor[k];
       indicator *= -1;
@@ -87,8 +90,11 @@ struct diff_forward {
 };
 
 template <typename xpu>
-void DiffForwardImpl(const OpContext& ctx, const TBlob& in, const TBlob& out,
-                     const int n, const int axis) {
+void DiffForwardImpl(const OpContext& ctx,
+                     const TBlob& in,
+                     const TBlob& out,
+                     const int n,
+                     const int axis) {
   using namespace mshadow;
   using namespace mxnet_op;
 
@@ -96,7 +102,8 @@ void DiffForwardImpl(const OpContext& ctx, const TBlob& in, const TBlob& out,
   CHECK_GE(n, 0);
   int axis_checked = CheckAxis(axis, in.ndim());
   // nothing in the output
-  if (n >= in.shape_[axis_checked]) return;
+  if (n >= in.shape_[axis_checked])
+    return;
   // stride for elements on the given axis, same in input and output
   index_t stride = 1;
   for (int i = in.ndim() - 1; i > axis_checked; --i) {
@@ -104,27 +111,31 @@ void DiffForwardImpl(const OpContext& ctx, const TBlob& in, const TBlob& out,
   }
 
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  std::vector<int> buffer(n+1, 0);
+  std::vector<int> buffer(n + 1, 0);
   YanghuiTri(&buffer, n);
-  Tensor<xpu, 1, int> diffFactor =
-      ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(n + 1), s);
+  Tensor<xpu, 1, int> diffFactor = ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(n + 1), s);
   Copy(diffFactor, Tensor<cpu, 1, int>(&buffer[0], Shape1(n + 1), 0), s);
 
   MSHADOW_TYPE_SWITCH(in.type_flag_, IType, {
     MSHADOW_TYPE_SWITCH(out.type_flag_, OType, {
       MXNET_NDIM_SWITCH(in.ndim(), ndim, {
-        Kernel<diff_forward, xpu>::Launch(
-          s, out.Size(), diffFactor.dptr_,
-          out.dptr<OType>(), in.dptr<IType>(),
-          n, stride, out.shape_.get<ndim>(),
-          in.shape_.get<ndim>());
+        Kernel<diff_forward, xpu>::Launch(s,
+                                          out.Size(),
+                                          diffFactor.dptr_,
+                                          out.dptr<OType>(),
+                                          in.dptr<IType>(),
+                                          n,
+                                          stride,
+                                          out.shape_.get<ndim>(),
+                                          in.shape_.get<ndim>());
       });
     });
   });
 }
 
 template <typename xpu>
-void DiffForward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+void DiffForward(const nnvm::NodeAttrs& attrs,
+                 const OpContext& ctx,
                  const std::vector<TBlob>& inputs,
                  const std::vector<OpReqType>& req,
                  const std::vector<TBlob>& outputs) {
@@ -140,9 +151,13 @@ void DiffForward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
 
 struct diff_backward {
   template <typename IType, typename OType, int ndim>
-  MSHADOW_XINLINE static void Map(index_t i, int* diffFactor, OType* igrad,
-                                  const IType* ograd, const int n,
-                                  const index_t stride, const int axis,
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int* diffFactor,
+                                  OType* igrad,
+                                  const IType* ograd,
+                                  const int n,
+                                  const index_t stride,
+                                  const int axis,
                                   const mshadow::Shape<ndim> oshape,
                                   const mshadow::Shape<ndim> ishape) {
     using namespace mxnet_op;
@@ -153,15 +168,16 @@ struct diff_backward {
 
     Shape<ndim> coor = unravel(i, oshape);
     // one head thread for a whole sequence along the axis
-    if (coor[axis] != 0) return;
+    if (coor[axis] != 0)
+      return;
     index_t j = ravel(coor, ishape);
     // initialize the elements of output array
-    for (index_t k = 0; k < oshape[axis]; ++k) igrad[i + k * stride] = 0;
+    for (index_t k = 0; k < oshape[axis]; ++k)
+      igrad[i + k * stride] = 0;
     for (index_t k = 0; k < ishape[axis]; ++k) {
       int indicator = 1;
       for (int m = n; m >= 0; --m) {
-        igrad[i + (m + k) * stride] +=
-            ograd[j + k * stride] * indicator * diffFactor[m];
+        igrad[i + (m + k) * stride] += ograd[j + k * stride] * indicator * diffFactor[m];
         indicator *= -1;
       }
     }
@@ -169,8 +185,11 @@ struct diff_backward {
 };
 
 template <typename xpu>
-void DiffBackwardImpl(const OpContext& ctx, const TBlob& ograd,
-                      const TBlob& igrad, const int n, const int axis) {
+void DiffBackwardImpl(const OpContext& ctx,
+                      const TBlob& ograd,
+                      const TBlob& igrad,
+                      const int n,
+                      const int axis) {
   using namespace mshadow;
   using namespace mxnet_op;
 
@@ -178,7 +197,8 @@ void DiffBackwardImpl(const OpContext& ctx, const TBlob& ograd,
   CHECK_GE(n, 0);
   int axis_checked = CheckAxis(axis, igrad.ndim());
   // nothing in the ograd and igrad
-  if (n >= igrad.shape_[axis_checked]) return;
+  if (n >= igrad.shape_[axis_checked])
+    return;
   // stride for elements on the given axis, same in input and output
   index_t stride = 1;
   for (int i = igrad.ndim() - 1; i > axis_checked; --i) {
@@ -186,27 +206,32 @@ void DiffBackwardImpl(const OpContext& ctx, const TBlob& ograd,
   }
 
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  std::vector<int> buffer(n+1, 0);
+  std::vector<int> buffer(n + 1, 0);
   YanghuiTri(&buffer, n);
-  Tensor<xpu, 1, int> diffFactor =
-      ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(n + 1), s);
+  Tensor<xpu, 1, int> diffFactor = ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(n + 1), s);
   Copy(diffFactor, Tensor<cpu, 1, int>(&buffer[0], Shape1(n + 1), 0), s);
 
   MSHADOW_TYPE_SWITCH(ograd.type_flag_, IType, {
     MSHADOW_TYPE_SWITCH(igrad.type_flag_, OType, {
       MXNET_NDIM_SWITCH(igrad.ndim(), ndim, {
-        Kernel<diff_backward, xpu>::Launch(
-          s, igrad.Size(), diffFactor.dptr_,
-          igrad.dptr<OType>(), ograd.dptr<IType>(),
-          n, stride, axis_checked,
-          igrad.shape_.get<ndim>(), ograd.shape_.get<ndim>());
+        Kernel<diff_backward, xpu>::Launch(s,
+                                           igrad.Size(),
+                                           diffFactor.dptr_,
+                                           igrad.dptr<OType>(),
+                                           ograd.dptr<IType>(),
+                                           n,
+                                           stride,
+                                           axis_checked,
+                                           igrad.shape_.get<ndim>(),
+                                           ograd.shape_.get<ndim>());
       });
     });
   });
 }
 
 template <typename xpu>
-void DiffBackward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+void DiffBackward(const nnvm::NodeAttrs& attrs,
+                  const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
                   const std::vector<OpReqType>& req,
                   const std::vector<TBlob>& outputs) {
diff --git a/src/operator/numpy/np_diff.cc b/src/operator/numpy/np_diff.cc
index 63847ef9dd94..1b0aaccc8618 100644
--- a/src/operator/numpy/np_diff.cc
+++ b/src/operator/numpy/np_diff.cc
@@ -27,9 +27,7 @@
 namespace mxnet {
 namespace op {
 
-inline TShape NumpyDiffShapeImpl(const TShape& ishape,
-                                 const int n,
-                                 const int axis) {
+inline TShape NumpyDiffShapeImpl(const TShape& ishape, const int n, const int axis) {
   CHECK_GE(n, 0);
   int axis_checked = CheckAxis(axis, ishape.ndim());
 
@@ -51,8 +49,7 @@ inline bool DiffShape(const nnvm::NodeAttrs& attrs,
     return false;
   }
   const DiffParam& param = nnvm::get<DiffParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     NumpyDiffShapeImpl((*in_attrs)[0], param.n, param.axis));
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, NumpyDiffShapeImpl((*in_attrs)[0], param.n, param.axis));
   return shape_is_known(out_attrs->at(0));
 }
 
@@ -71,39 +68,38 @@ inline bool DiffType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(DiffParam);
 
 NNVM_REGISTER_OP(_npi_diff)
-.set_attr_parser(ParamParser<DiffParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", DiffShape)
-.set_attr<nnvm::FInferType>("FInferType", DiffType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", DiffForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-                            ElemwiseGradUseNone{"_backward_npi_diff"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("a", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(DiffParam::__FIELDS__());
+    .set_attr_parser(ParamParser<DiffParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", DiffShape)
+    .set_attr<nnvm::FInferType>("FInferType", DiffType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", DiffForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diff"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("a", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(DiffParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_diff)
-.set_attr_parser(ParamParser<DiffParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", DiffBackward<cpu>);
+    .set_attr_parser(ParamParser<DiffParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", DiffBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_diff.cu b/src/operator/numpy/np_diff.cu
index daea6e368e05..3b9d7b8841e6 100644
--- a/src/operator/numpy/np_diff.cu
+++ b/src/operator/numpy/np_diff.cu
@@ -27,11 +27,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_diff)
-.set_attr<FCompute>("FCompute<gpu>", DiffForward<gpu>);
+NNVM_REGISTER_OP(_npi_diff).set_attr<FCompute>("FCompute<gpu>", DiffForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_diff)
-.set_attr<FCompute>("FCompute<gpu>", DiffBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_diff).set_attr<FCompute>("FCompute<gpu>", DiffBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_dot-inl.h b/src/operator/numpy/np_dot-inl.h
index fe63c0b0ec51..4a0b008a4a6e 100644
--- a/src/operator/numpy/np_dot-inl.h
+++ b/src/operator/numpy/np_dot-inl.h
@@ -35,7 +35,7 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyDotForward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -47,9 +47,9 @@ inline void NumpyDotForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
-  const TBlob& out = outputs[0];
+  const TBlob& a              = inputs[0];
+  const TBlob& b              = inputs[1];
+  const TBlob& out            = outputs[0];
   const mxnet::TShape a_shape = a.shape_;
   const mxnet::TShape b_shape = b.shape_;
 
@@ -63,18 +63,16 @@ inline void NumpyDotForward(const nnvm::NodeAttrs& attrs,
       //         of a and the 2nd-to-last axis of b
       const Tuple<int> a_axes_summed({a_shape.ndim() - 1});
       const Tuple<int> b_axes_summed({b_shape.ndim() - 2});
-      size_t workspace_size = TensordotWorkspaceSize<xpu>(a_axes_summed,
-                                                          b_axes_summed,
-                                                          a, b, out,
-                                                          req);
+      size_t workspace_size =
+          TensordotWorkspaceSize<xpu>(a_axes_summed, b_axes_summed, a, b, out, req);
       Tensor<xpu, 1, char> workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
-        Shape1(workspace_size), ctx.get_stream<xpu>());
+          Shape1(workspace_size), ctx.get_stream<xpu>());
       TensordotImpl<xpu>(a_axes_summed, b_axes_summed, ctx, a, b, out, req, workspace);
     }
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyDotBackward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -86,11 +84,11 @@ inline void NumpyDotBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
 
-  const TBlob& ograd = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
-  const TBlob& grad_a = outputs[0];
-  const TBlob& grad_b = outputs[1];
+  const TBlob& ograd          = inputs[0];
+  const TBlob& a              = inputs[1];
+  const TBlob& b              = inputs[2];
+  const TBlob& grad_a         = outputs[0];
+  const TBlob& grad_b         = outputs[1];
   const mxnet::TShape a_shape = a.shape_;
   const mxnet::TShape b_shape = b.shape_;
 
@@ -104,14 +102,12 @@ inline void NumpyDotBackward(const nnvm::NodeAttrs& attrs,
       //         of a and the 2nd-to-last axis of b
       const Tuple<int> a_axes_summed({a_shape.ndim() - 1});
       const Tuple<int> b_axes_summed({b_shape.ndim() - 2});
-      size_t workspace_size = TensordotBackwardWorkspaceSize<xpu>(a_axes_summed, b_axes_summed,
-                                                                  ograd, a, b, grad_a,
-                                                                  grad_b, req);
-      Tensor<xpu, 1, char> workspace =
-        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size),
-                                                       ctx.get_stream<xpu>());
-      TensordotBackwardImpl<xpu>(a_axes_summed, b_axes_summed, ctx, ograd, a, b, grad_a,
-                                 grad_b, req, workspace);
+      size_t workspace_size = TensordotBackwardWorkspaceSize<xpu>(
+          a_axes_summed, b_axes_summed, ograd, a, b, grad_a, grad_b, req);
+      Tensor<xpu, 1, char> workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
+          Shape1(workspace_size), ctx.get_stream<xpu>());
+      TensordotBackwardImpl<xpu>(
+          a_axes_summed, b_axes_summed, ctx, ograd, a, b, grad_a, grad_b, req, workspace);
     }
   });
 }
diff --git a/src/operator/numpy/np_dot.cc b/src/operator/numpy/np_dot.cc
index a65be3679bf5..66daf4ba6981 100644
--- a/src/operator/numpy/np_dot.cc
+++ b/src/operator/numpy/np_dot.cc
@@ -28,8 +28,8 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyDotShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -68,7 +68,7 @@ inline bool NumpyDotShape(const nnvm::NodeAttrs& attrs,
     tmp_shape[a_shape.ndim() - 1] = b_shape[0];
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tmp_shape);
 
-    tmp_shape = TShape(1, -1);
+    tmp_shape    = TShape(1, -1);
     tmp_shape[0] = a_shape[a_shape.ndim() - 1];
     SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_shape);
 
@@ -84,7 +84,7 @@ inline bool NumpyDotShape(const nnvm::NodeAttrs& attrs,
     tmp_shape[a_shape.ndim() - 1] = b_shape[b_shape.ndim() - 2];
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tmp_shape);
 
-    tmp_shape = TShape(b_shape.ndim(), -1);
+    tmp_shape                     = TShape(b_shape.ndim(), -1);
     tmp_shape[b_shape.ndim() - 2] = a_shape[a_shape.ndim() - 1];
     SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_shape);
 
@@ -102,7 +102,7 @@ inline bool NumpyDotShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_dot)
-.describe(R"doc(Dot product of two arrays. Specifically,
+    .describe(R"doc(Dot product of two arrays. Specifically,
 
 - If both a and b are 1-D arrays, it is inner product of vectors.
 
@@ -119,33 +119,35 @@ NNVM_REGISTER_OP(_npi_dot)
     dot(a, b)[i,j,k,m] = sum(a[i,j,:] * b[k,:,m])
 
 )doc" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyDotShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDotForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_dot"})
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyDotShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDotForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_dot"})
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input");
 
 NNVM_REGISTER_OP(_backward_npi_dot)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyDotBackward<cpu>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDotBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_dot.cu b/src/operator/numpy/np_dot.cu
index 085c7e4967c9..290bdd31ec90 100644
--- a/src/operator/numpy/np_dot.cu
+++ b/src/operator/numpy/np_dot.cu
@@ -27,11 +27,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_dot)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDotForward<gpu>);
+NNVM_REGISTER_OP(_npi_dot).set_attr<FCompute>("FCompute<gpu>", NumpyDotForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_dot)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDotBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_dot).set_attr<FCompute>("FCompute<gpu>", NumpyDotBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_ediff1d_op-inl.h b/src/operator/numpy/np_ediff1d_op-inl.h
index 45f925a7079b..d58a88e3404e 100644
--- a/src/operator/numpy/np_ediff1d_op-inl.h
+++ b/src/operator/numpy/np_ediff1d_op-inl.h
@@ -42,42 +42,40 @@ struct EDiff1DParam : public dmlc::Parameter<EDiff1DParam> {
   dmlc::optional<double> to_end_scalar;
   DMLC_DECLARE_PARAMETER(EDiff1DParam) {
     DMLC_DECLARE_FIELD(to_begin_arr_given)
-      .set_default(false)
-      .describe("To determine whether the `to_begin` parameter is an array.");
+        .set_default(false)
+        .describe("To determine whether the `to_begin` parameter is an array.");
     DMLC_DECLARE_FIELD(to_end_arr_given)
-      .set_default(false)
-      .describe("To determine whether the `to_end` parameter is an array.");
+        .set_default(false)
+        .describe("To determine whether the `to_end` parameter is an array.");
     DMLC_DECLARE_FIELD(to_begin_scalar)
-      .set_default(dmlc::optional<double>())
-      .describe("If the `to_begin`is a scalar, the value of this parameter.");
+        .set_default(dmlc::optional<double>())
+        .describe("If the `to_begin`is a scalar, the value of this parameter.");
     DMLC_DECLARE_FIELD(to_end_scalar)
-      .set_default(dmlc::optional<double>())
-      .describe("If the `to_end`is a scalar, the value of this parameter.");
+        .set_default(dmlc::optional<double>())
+        .describe("If the `to_end`is a scalar, the value of this parameter.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream to_end_arr_given_s, to_begin_arr_given_s,
-                       to_end_scalar_s, to_begin_scalar_s;
+    std::ostringstream to_end_arr_given_s, to_begin_arr_given_s, to_end_scalar_s, to_begin_scalar_s;
     to_end_arr_given_s << to_end_arr_given;
     to_begin_arr_given_s << to_begin_arr_given;
     to_end_scalar_s << to_end_scalar;
     to_begin_scalar_s << to_begin_scalar;
-    (*dict)["to_end_arr_given"] = to_end_arr_given_s.str();
+    (*dict)["to_end_arr_given"]   = to_end_arr_given_s.str();
     (*dict)["to_begin_arr_given"] = to_begin_arr_given_s.str();
-    (*dict)["to_end_scalar"] = to_end_scalar_s.str();
-    (*dict)["to_begin_scalar"] = to_begin_scalar_s.str();
+    (*dict)["to_end_scalar"]      = to_end_scalar_s.str();
+    (*dict)["to_begin_scalar"]    = to_begin_scalar_s.str();
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct set_to_val {
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, double val) {
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, double val) {
     out[i] = DType(val);
   }
 };
 
 template <typename DType>
-void copyArr(DType* dest, DType* src, size_t count,
-             mshadow::Stream<cpu> *s) {
+void copyArr(DType* dest, DType* src, size_t count, mshadow::Stream<cpu>* s) {
 #pragma GCC diagnostic push
 #if __GNUC__ >= 8
 #pragma GCC diagnostic ignored "-Wclass-memaccess"
@@ -87,27 +85,24 @@ void copyArr(DType* dest, DType* src, size_t count,
 }
 
 template <typename DType>
-void AssignScalar(DType* dest, index_t idx, double val,
-                  mshadow::Stream<cpu> *s) {
+void AssignScalar(DType* dest, index_t idx, double val, mshadow::Stream<cpu>* s) {
   dest[idx] = DType(val);
 }
 
 #ifdef __CUDACC__
 template <typename DType>
-void copyArr(DType* dest, DType* src, size_t count,
-             mshadow::Stream<gpu> *s) {
-  CUDA_CALL(cudaMemcpyAsync(dest, src, count, cudaMemcpyDeviceToHost,
-                            mshadow::Stream<gpu>::GetStream(s)));
+void copyArr(DType* dest, DType* src, size_t count, mshadow::Stream<gpu>* s) {
+  CUDA_CALL(cudaMemcpyAsync(
+      dest, src, count, cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
 }
 
 template <typename DType>
-void AssignScalar(DType* dest, index_t idx, double val,
-                  mshadow::Stream<gpu> *s) {
+void AssignScalar(DType* dest, index_t idx, double val, mshadow::Stream<gpu>* s) {
   mxnet_op::Kernel<set_to_val<DType>, gpu>::Launch(s, 1, dest + idx, val);
 }
 #endif
 
-template<int req>
+template <int req>
 struct ediff1d_forward {
   template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i,
@@ -118,7 +113,7 @@ struct ediff1d_forward {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void EDiff1DForward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -130,19 +125,19 @@ void EDiff1DForward(const nnvm::NodeAttrs& attrs,
   CHECK_LE(inputs.size(), 3U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& in_data    = inputs[0];
+  const TBlob& out_data   = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
     const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
-    size_t padding = 0;
-    size_t in_size = (in_data.Size() > 0)? in_data.Size() - 1: 0;
-    index_t idx = 1;  // used to index the rest of input arrays
+    size_t padding            = 0;
+    size_t in_size            = (in_data.Size() > 0) ? in_data.Size() - 1 : 0;
+    index_t idx               = 1;  // used to index the rest of input arrays
 
     if (param.to_begin_arr_given) {
       // if the `to_begin` parameter is an array, copy its values to the beginning of the out array
-      copyArr<DType>(out_data.dptr<DType>(), inputs[idx].dptr<DType>(),
-                      inputs[idx].Size() * sizeof(DType), s);
+      copyArr<DType>(
+          out_data.dptr<DType>(), inputs[idx].dptr<DType>(), inputs[idx].Size() * sizeof(DType), s);
       padding += inputs[idx].Size();
       idx += 1;
     } else if (param.to_begin_scalar.has_value()) {
@@ -154,7 +149,9 @@ void EDiff1DForward(const nnvm::NodeAttrs& attrs,
     if (param.to_end_arr_given) {
       // if the `to_end` parameter is an array, copy its values to the end of the out array
       copyArr<DType>(out_data.dptr<DType>() + padding + in_size,
-                     inputs[idx].dptr<DType>(), inputs[idx].Size() * sizeof(DType), s);
+                     inputs[idx].dptr<DType>(),
+                     inputs[idx].Size() * sizeof(DType),
+                     s);
     } else if (param.to_end_scalar.has_value()) {
       // if the `to_end` parameter is a scalar, directly assign its value
       AssignScalar(out_data.dptr<DType>(), padding + in_size, param.to_end_scalar.value(), s);
@@ -162,12 +159,12 @@ void EDiff1DForward(const nnvm::NodeAttrs& attrs,
 
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       Kernel<ediff1d_forward<req_type>, xpu>::Launch(
-        s, in_size, out_data.dptr<DType>(), in_data.dptr<DType>(), padding);
+          s, in_size, out_data.dptr<DType>(), in_data.dptr<DType>(), padding);
     });
   });
 }
 
-template<int req>
+template <int req>
 struct ediff1d_backward_arr {
   template <typename DType>
   MSHADOW_XINLINE static void Map(size_t i,
@@ -186,8 +183,9 @@ struct ediff1d_backward_arr {
   }
 };
 
-template<typename xpu>
-void EDiff1DBackward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+template <typename xpu>
+void EDiff1DBackward(const nnvm::NodeAttrs& attrs,
+                     const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
                      const std::vector<OpReqType>& req,
                      const std::vector<TBlob>& outputs) {
@@ -199,22 +197,23 @@ void EDiff1DBackward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   CHECK_LE(outputs.size(), 3U);
   CHECK_EQ(req.size(), outputs.size());
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s   = ctx.get_stream<xpu>();
   const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
 
   const TBlob& ograd = inputs[0];
   const TBlob& input = inputs[1];
   const TBlob& igrad = outputs[0];
-  size_t in_size = (input.Size() > 0)? input.Size() - 1: 0;
+  size_t in_size     = (input.Size() > 0) ? input.Size() - 1 : 0;
 
   MSHADOW_REAL_TYPE_SWITCH(ograd.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       size_t padding = 0;
-      index_t idx = 1;  // start from the second argument of `outputs`
+      index_t idx    = 1;  // start from the second argument of `outputs`
       if (param.to_begin_arr_given) {
         copyArr<DType>(outputs[idx].dptr<DType>(),
                        ograd.dptr<DType>(),
-                       outputs[idx].Size() * sizeof(DType), s);
+                       outputs[idx].Size() * sizeof(DType),
+                       s);
         padding += outputs[idx].Size();
         idx += 1;
       } else if (param.to_begin_scalar.has_value()) {
@@ -223,18 +222,23 @@ void EDiff1DBackward(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
 
       if (param.to_end_arr_given) {
         copyArr<DType>(outputs[idx].dptr<DType>(),
-                       ograd.dptr<DType>()+ in_size + padding,
-                       outputs[idx].Size() * sizeof(DType), s);
+                       ograd.dptr<DType>() + in_size + padding,
+                       outputs[idx].Size() * sizeof(DType),
+                       s);
       }
 
-      if (input.Size() == 0) return;
+      if (input.Size() == 0)
+        return;
       if (input.Size() == 1) {
         Kernel<set_to_val<DType>, xpu>::Launch(s, 1, igrad.dptr<DType>(), 0);
       } else {
-        Kernel<ediff1d_backward_arr<req_type>, xpu>::Launch(
-          s, igrad.Size(), igrad.dptr<DType>(),
-          input.dptr<DType>(), ograd.dptr<DType>(),
-          padding, igrad.Size());
+        Kernel<ediff1d_backward_arr<req_type>, xpu>::Launch(s,
+                                                            igrad.Size(),
+                                                            igrad.dptr<DType>(),
+                                                            input.dptr<DType>(),
+                                                            ograd.dptr<DType>(),
+                                                            padding,
+                                                            igrad.Size());
       }
     });
   });
diff --git a/src/operator/numpy/np_ediff1d_op.cc b/src/operator/numpy/np_ediff1d_op.cc
index 2fdcf7d082ca..bd30683bfad4 100644
--- a/src/operator/numpy/np_ediff1d_op.cc
+++ b/src/operator/numpy/np_ediff1d_op.cc
@@ -37,10 +37,10 @@ inline bool EDiff1DType(const nnvm::NodeAttrs& attrs,
 
   const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
   if (param.to_begin_arr_given && param.to_end_arr_given) {
-      TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(1));
-      TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(2));
+    TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(1));
+    TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(2));
   } else if (param.to_begin_arr_given || param.to_end_arr_given) {
-      TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(1));
+    TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(1));
   }
 
   TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
@@ -53,27 +53,27 @@ inline TShape NumpyEDiff1DShapeImpl(std::vector<TShape>* in_attrs,
                                     const bool to_end_arr_given,
                                     dmlc::optional<double> to_begin_scalar,
                                     dmlc::optional<double> to_end_scalar) {
-  size_t out = (in_attrs->at(0).Size() > 0)? in_attrs->at(0).Size() - 1: 0;
+  size_t out = (in_attrs->at(0).Size() > 0) ? in_attrs->at(0).Size() - 1 : 0;
   // case 1: when both `to_begin` and `to_end` are arrays
   if (to_begin_arr_given && to_end_arr_given) {
-      out += in_attrs->at(1).Size() + in_attrs->at(2).Size();
-  // case 2: only one of the parameters is an array
+    out += in_attrs->at(1).Size() + in_attrs->at(2).Size();
+    // case 2: only one of the parameters is an array
   } else if (to_begin_arr_given || to_end_arr_given) {
-      out += in_attrs->at(1).Size();
-      // if the other one is a scalar
-      if (to_begin_scalar.has_value() || to_end_scalar.has_value()) {
-          out += 1;
-      }
-  // case 3: neither of the parameters is an array
+    out += in_attrs->at(1).Size();
+    // if the other one is a scalar
+    if (to_begin_scalar.has_value() || to_end_scalar.has_value()) {
+      out += 1;
+    }
+    // case 3: neither of the parameters is an array
   } else {
-      // case 3.1: both of the parameters are scalars
-      if (to_begin_scalar.has_value() && to_end_scalar.has_value()) {
-          out += 2;
+    // case 3.1: both of the parameters are scalars
+    if (to_begin_scalar.has_value() && to_end_scalar.has_value()) {
+      out += 2;
       // case 3.2: only one of the parameters is a scalar
-      } else if (to_begin_scalar.has_value() || to_end_scalar.has_value()) {
-          out += 1;
-      }
-      // case 3.3: they are both `None` -- skip
+    } else if (to_begin_scalar.has_value() || to_end_scalar.has_value()) {
+      out += 1;
+    }
+    // case 3.3: they are both `None` -- skip
   }
   TShape oshape = TShape(1, out);
   return oshape;
@@ -89,7 +89,8 @@ inline bool EDiff1DShape(const nnvm::NodeAttrs& attrs,
     return false;
   }
   const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
+  SHAPE_ASSIGN_CHECK(*out_attrs,
+                     0,
                      NumpyEDiff1DShapeImpl(in_attrs,
                                            param.to_begin_arr_given,
                                            param.to_end_arr_given,
@@ -101,59 +102,67 @@ inline bool EDiff1DShape(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(EDiff1DParam);
 
 NNVM_REGISTER_OP(_npi_ediff1d)
-.set_attr_parser(ParamParser<EDiff1DParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-     const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
-     int num_inputs = 1;
-     if (param.to_begin_arr_given) num_inputs += 1;
-     if (param.to_end_arr_given) num_inputs += 1;
-     return num_inputs;
-  })
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.to_begin_arr_given) num_inputs += 1;
-    if (param.to_end_arr_given) num_inputs += 1;
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    if (num_inputs == 2) return std::vector<std::string>{"input1", "input2"};
-    return std::vector<std::string>{"input1", "input2", "input3"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape",  EDiff1DShape)
-.set_attr<nnvm::FInferType>("FInferType", EDiff1DType)
-.set_attr<FCompute>("FCompute<cpu>", EDiff1DForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_npi_backward_ediff1d"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_argument("input3", "NDArray-or-Symbol", "Source input")
-.add_arguments(EDiff1DParam::__FIELDS__());
+    .set_attr_parser(ParamParser<EDiff1DParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
+      int num_inputs            = 1;
+      if (param.to_begin_arr_given)
+        num_inputs += 1;
+      if (param.to_end_arr_given)
+        num_inputs += 1;
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
+          int num_inputs            = 1;
+          if (param.to_begin_arr_given)
+            num_inputs += 1;
+          if (param.to_end_arr_given)
+            num_inputs += 1;
+          if (num_inputs == 1)
+            return std::vector<std::string>{"input1"};
+          if (num_inputs == 2)
+            return std::vector<std::string>{"input1", "input2"};
+          return std::vector<std::string>{"input1", "input2", "input3"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", EDiff1DShape)
+    .set_attr<nnvm::FInferType>("FInferType", EDiff1DType)
+    .set_attr<FCompute>("FCompute<cpu>", EDiff1DForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_npi_backward_ediff1d"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_argument("input3", "NDArray-or-Symbol", "Source input")
+    .add_arguments(EDiff1DParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_backward_ediff1d)
-.set_attr_parser(ParamParser<EDiff1DParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-     const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
-     int num_inputs = 2;
-     if (param.to_begin_arr_given) num_inputs += 1;
-     if (param.to_end_arr_given) num_inputs += 1;
-     return num_inputs;
-  })
-.set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs) {
-     const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
-     int num_inputs = 1;
-     if (param.to_begin_arr_given) num_inputs += 1;
-     if (param.to_end_arr_given) num_inputs += 1;
-     return num_inputs;
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", EDiff1DBackward<cpu>);
+    .set_attr_parser(ParamParser<EDiff1DParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
+      int num_inputs            = 2;
+      if (param.to_begin_arr_given)
+        num_inputs += 1;
+      if (param.to_end_arr_given)
+        num_inputs += 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const EDiff1DParam& param = nnvm::get<EDiff1DParam>(attrs.parsed);
+      int num_inputs            = 1;
+      if (param.to_begin_arr_given)
+        num_inputs += 1;
+      if (param.to_end_arr_given)
+        num_inputs += 1;
+      return num_inputs;
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", EDiff1DBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_ediff1d_op.cu b/src/operator/numpy/np_ediff1d_op.cu
index 711d5e9b2498..ec2f06d5fd1c 100644
--- a/src/operator/numpy/np_ediff1d_op.cu
+++ b/src/operator/numpy/np_ediff1d_op.cu
@@ -27,11 +27,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_ediff1d)
-.set_attr<FCompute>("FCompute<gpu>", EDiff1DForward<gpu>);
+NNVM_REGISTER_OP(_npi_ediff1d).set_attr<FCompute>("FCompute<gpu>", EDiff1DForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_backward_ediff1d)
-.set_attr<FCompute>("FCompute<gpu>", EDiff1DBackward<gpu>);
+NNVM_REGISTER_OP(_npi_backward_ediff1d).set_attr<FCompute>("FCompute<gpu>", EDiff1DBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_einsum_op-inl.h b/src/operator/numpy/np_einsum_op-inl.h
index 17bb3d0e9e80..4aa8200cf8a7 100644
--- a/src/operator/numpy/np_einsum_op-inl.h
+++ b/src/operator/numpy/np_einsum_op-inl.h
@@ -84,7 +84,7 @@ inline TShape get_stride(const TShape& shape) {
   TShape stride = TShape(ndim, -1);
   for (int i = ndim - 1; i >= 0; i--) {
     stride[i] = shape[i] > 1 ? prod : 0;
-    prod = prod * shape[i];
+    prod      = prod * shape[i];
   }
   return stride;
 }
@@ -110,12 +110,17 @@ inline TShape pad(const TShape& shape, int odim) {
  *  - subscripts="abbcbc",  ndim=6 -> op_labels=[97, 98, -1, 99, -3, -2]
  *  - subscripts="ab...bc", ndim=6 -> op_labels=[97, 98, 0, 0, -3, 99]
  */
-inline int parse_operand_subscripts(const char *subscripts, int length,
-                                    int ndim, int iop, char *op_labels,
-                                    char *label_counts, int *min_label, int *max_label) {
+inline int parse_operand_subscripts(const char* subscripts,
+                                    int length,
+                                    int ndim,
+                                    int iop,
+                                    char* op_labels,
+                                    char* label_counts,
+                                    int* min_label,
+                                    int* max_label) {
   using namespace mxnet_op;
   int i;
-  int idim = 0;
+  int idim     = 0;
   int ellipsis = -1;
 
   /* Process all labels for this operand */
@@ -125,10 +130,8 @@ inline int parse_operand_subscripts(const char *subscripts, int length,
     /* A proper label for an axis. */
     if (label > 0 && isalpha(label)) {
       /* Check we don't exceed the operator dimensions. */
-      CHECK(idim < ndim)
-        << "einstein sum subscripts string contains "
-        << "too many subscripts for operand "
-        << iop;
+      CHECK(idim < ndim) << "einstein sum subscripts string contains "
+                         << "too many subscripts for operand " << iop;
 
       op_labels[idim++] = label;
       if (label < *min_label) {
@@ -141,29 +144,26 @@ inline int parse_operand_subscripts(const char *subscripts, int length,
     } else if (label == '.') {
       /* The beginning of the ellipsis. */
       /* Check it's a proper ellipsis. */
-      CHECK(!(ellipsis != -1 || i + 2 >= length
-              || subscripts[++i] != '.' || subscripts[++i] != '.'))
-        << "einstein sum subscripts string contains a "
-        << "'.' that is not part of an ellipsis ('...') "
-        << "in operand "
-        << iop;
+      CHECK(
+          !(ellipsis != -1 || i + 2 >= length || subscripts[++i] != '.' || subscripts[++i] != '.'))
+          << "einstein sum subscripts string contains a "
+          << "'.' that is not part of an ellipsis ('...') "
+          << "in operand " << iop;
 
       ellipsis = idim;
     } else {
-        CHECK(label == ' ')
-          << "invalid subscript '" << static_cast<char>(label)
-          << "' in einstein sum "
-          << "subscripts string, subscripts must "
-          << "be letters";
+      CHECK(label == ' ') << "invalid subscript '" << static_cast<char>(label)
+                          << "' in einstein sum "
+                          << "subscripts string, subscripts must "
+                          << "be letters";
     }
   }
 
   /* No ellipsis found, labels must match dimensions exactly. */
   if (ellipsis == -1) {
-    CHECK(idim == ndim)
-      << "operand has more dimensions than subscripts "
-      << "given in einstein sum, but no '...' ellipsis "
-      << "provided to broadcast the extra dimensions.";
+    CHECK(idim == ndim) << "operand has more dimensions than subscripts "
+                        << "given in einstein sum, but no '...' ellipsis "
+                        << "provided to broadcast the extra dimensions.";
   } else if (idim < ndim) {
     /* Ellipsis found, may have to add broadcast dimensions. */
     /* Move labels after ellipsis to the end. */
@@ -189,7 +189,7 @@ inline int parse_operand_subscripts(const char *subscripts, int length,
     /* If it is a proper label, find any duplicates of it. */
     if (label > 0) {
       /* Search for the next matching label. */
-      char *next = reinterpret_cast<char*>(memchr(op_labels + idim + 1, label, ndim - idim - 1));
+      char* next = reinterpret_cast<char*>(memchr(op_labels + idim + 1, label, ndim - idim - 1));
 
       while (next != nullptr) {
         /* The offset from next to op_labels[idim] (negative). */
@@ -211,12 +211,14 @@ inline int parse_operand_subscripts(const char *subscripts, int length,
  *  - the ASCII code of the corresponding label;
  *  - zero for broadcast dimensions, if subscripts has an ellipsis.
  */
-inline int parse_output_subscripts(const char *subscripts, int length,
+inline int parse_output_subscripts(const char* subscripts,
+                                   int length,
                                    int ndim_broadcast,
-                                   const char *label_counts, char *out_labels) {
+                                   const char* label_counts,
+                                   char* out_labels) {
   using namespace mxnet_op;
   int i, bdim;
-  int ndim = 0;
+  int ndim     = 0;
   int ellipsis = 0;
 
   /* Process all the output labels. */
@@ -227,61 +229,55 @@ inline int parse_output_subscripts(const char *subscripts, int length,
     if (label > 0 && isalpha(label)) {
       /* Check that it doesn't occur again. */
       CHECK(memchr(subscripts + i + 1, label, length - i - 1) == nullptr)
-        << "einstein sum subscripts string includes "
-        << "output subscript '" << static_cast<char>(label)
-        << "' multiple times";
+          << "einstein sum subscripts string includes "
+          << "output subscript '" << static_cast<char>(label) << "' multiple times";
 
       /* Check that it was used in the inputs. */
       CHECK(label_counts[label] != 0)
-        << "einstein sum subscripts string included "
-        << "output subscript '" << static_cast<char>(label)
-        << "' which never appeared "
-        << "in an input";
+          << "einstein sum subscripts string included "
+          << "output subscript '" << static_cast<char>(label) << "' which never appeared "
+          << "in an input";
 
       /* Check that there is room in out_labels for this label. */
-      CHECK(ndim < NPY_MAXDIMS)
-        << "einstein sum subscripts string contains "
-        << "too many subscripts in the output";
+      CHECK(ndim < NPY_MAXDIMS) << "einstein sum subscripts string contains "
+                                << "too many subscripts in the output";
 
       out_labels[ndim++] = label;
     } else if (label == '.') {
       /* The beginning of the ellipsis. */
       /* Check it is a proper ellipsis. */
-      CHECK(!(ellipsis || i + 2 >= length
-              || subscripts[++i] != '.' || subscripts[++i] != '.'))
-        << "einstein sum subscripts string "
-        << "contains a '.' that is not part of "
-        << "an ellipsis ('...') in the output";
+      CHECK(!(ellipsis || i + 2 >= length || subscripts[++i] != '.' || subscripts[++i] != '.'))
+          << "einstein sum subscripts string "
+          << "contains a '.' that is not part of "
+          << "an ellipsis ('...') in the output";
 
       /* Check there is room in out_labels for broadcast dims. */
-      CHECK(ndim + ndim_broadcast <= NPY_MAXDIMS)
-        << "einstein sum subscripts string contains "
-        << "too many subscripts in the output";
+      CHECK(ndim + ndim_broadcast <= NPY_MAXDIMS) << "einstein sum subscripts string contains "
+                                                  << "too many subscripts in the output";
 
       ellipsis = 1;
       for (bdim = 0; bdim < ndim_broadcast; ++bdim) {
         out_labels[ndim++] = 0;
       }
     } else {
-      CHECK(label == ' ')
-        << "invalid subscript '" << static_cast<char>(label)
-        << "' in einstein sum "
-        << "subscripts string, subscripts must "
-        << "be letters";
+      CHECK(label == ' ') << "invalid subscript '" << static_cast<char>(label)
+                          << "' in einstein sum "
+                          << "subscripts string, subscripts must "
+                          << "be letters";
     }
   }
 
   /* If no ellipsis was found there should be no broadcast dimensions. */
-  CHECK(!(!ellipsis && ndim_broadcast > 0))
-    << "output has more dimensions than subscripts "
-    << "given in einstein sum, but no '...' ellipsis "
-    << "provided to broadcast the extra dimensions.";
+  CHECK(!(!ellipsis && ndim_broadcast > 0)) << "output has more dimensions than subscripts "
+                                            << "given in einstein sum, but no '...' ellipsis "
+                                            << "provided to broadcast the extra dimensions.";
 
   return ndim;
 }
 
-inline void get_combined_dims_view(const TBlob& op, int iop,
-                                   char *labels,
+inline void get_combined_dims_view(const TBlob& op,
+                                   int iop,
+                                   char* labels,
                                    TShape* newshape,
                                    TShape* newstride) {
   using namespace mxnet_op;
@@ -290,13 +286,13 @@ inline void get_combined_dims_view(const TBlob& op, int iop,
   int newdim;
 
   const TShape& shape = op.shape_;
-  TShape stride = get_stride(shape);
-  ndim = op.shape_.ndim();
-  newdim = newshape->ndim();
+  TShape stride       = get_stride(shape);
+  ndim                = op.shape_.ndim();
+  newdim              = newshape->ndim();
 
   /* Initialize the dimensions and strides to zero */
   for (idim = 0; idim < newdim; ++idim) {
-    (*newshape)[idim] = 0;
+    (*newshape)[idim]  = 0;
     (*newstride)[idim] = 0;
   }
 
@@ -311,7 +307,7 @@ inline void get_combined_dims_view(const TBlob& op, int iop,
     /* If this label says to merge axes, get the actual label */
     if (label < 0) {
       combineoffset = label;
-      label = labels[idim+label];
+      label         = labels[idim + label];
     } else {
       combineoffset = 0;
       if (icombine != idim) {
@@ -321,17 +317,14 @@ inline void get_combined_dims_view(const TBlob& op, int iop,
     }
     /* If the label is 0, it's an unlabeled broadcast dimension */
     if (label == 0) {
-      (*newshape)[icombine] = shape[idim];
+      (*newshape)[icombine]  = shape[idim];
       (*newstride)[icombine] = stride[idim];
     } else {
       /* Update the combined axis dimensions and strides */
       int i = icombinemap[idim + combineoffset];
-      CHECK(!(combineoffset < 0 && (*newshape)[i] != 0 &&
-              (*newshape)[i] != shape[idim]))
-        << "dimensions in operand " << iop
-        << " for collapsing index '" << label
-        << "' don't match (" << static_cast<int>((*newshape)[i])
-        << " != " << shape[idim] << ")";
+      CHECK(!(combineoffset < 0 && (*newshape)[i] != 0 && (*newshape)[i] != shape[idim]))
+          << "dimensions in operand " << iop << " for collapsing index '" << label
+          << "' don't match (" << static_cast<int>((*newshape)[i]) << " != " << shape[idim] << ")";
       (*newshape)[i] = shape[idim];
       (*newstride)[i] += stride[idim];
     }
@@ -343,13 +336,17 @@ inline void get_combined_dims_view(const TBlob& op, int iop,
   }
 }
 
-inline static int prepare_op_axes(int ndim, int iop, char *labels,
-                                  int *axes, int ndim_iter, char *iter_labels) {
+inline static int prepare_op_axes(int ndim,
+                                  int iop,
+                                  char* labels,
+                                  int* axes,
+                                  int ndim_iter,
+                                  char* iter_labels) {
   using namespace mxnet_op;
   int i, label, ibroadcast;
 
-  ibroadcast = ndim-1;
-  for (i = ndim_iter-1; i >= 0; --i) {
+  ibroadcast = ndim - 1;
+  for (i = ndim_iter - 1; i >= 0; --i) {
     label = iter_labels[i];
     /*
      * If it's an unlabeled broadcast dimension, choose
@@ -372,7 +369,7 @@ inline static int prepare_op_axes(int ndim, int iop, char *labels,
       }
     } else {
       /* It's a labeled dimension, find the matching one */
-      char *match = reinterpret_cast<char*>(memchr(labels, label, ndim));
+      char* match = reinterpret_cast<char*>(memchr(labels, label, ndim));
       /* If the op doesn't have the label, broadcast it */
       if (match == nullptr) {
         axes[i] = -1;
@@ -385,30 +382,28 @@ inline static int prepare_op_axes(int ndim, int iop, char *labels,
   return 0;
 }
 
-struct NumpyEinsumParam: public dmlc::Parameter<NumpyEinsumParam> {
+struct NumpyEinsumParam : public dmlc::Parameter<NumpyEinsumParam> {
   int num_args;
   int optimize;
-  std::string  subscripts;
+  std::string subscripts;
   DMLC_DECLARE_PARAMETER(NumpyEinsumParam) {
-    DMLC_DECLARE_FIELD(num_args)
-      .set_lower_bound(1)
-      .describe("Number of input arrays.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of input arrays.");
     DMLC_DECLARE_FIELD(subscripts)
-      .set_default("")
-      .describe("Specifies the subscripts for summation as comma separated list"
-      " of subscript labels. An implicit (classical Einstein summation) calculation"
-      " is performed unless the explicit indicator '->' is included as well as"
-      " subscript labels of the precise output form.");
-    DMLC_DECLARE_FIELD(optimize)
-      .set_default(0);
+        .set_default("")
+        .describe(
+            "Specifies the subscripts for summation as comma separated list"
+            " of subscript labels. An implicit (classical Einstein summation) calculation"
+            " is performed unless the explicit indicator '->' is included as well as"
+            " subscript labels of the precise output form.");
+    DMLC_DECLARE_FIELD(optimize).set_default(0);
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_args_s, optimize_s, subscripts_s;
     num_args_s << num_args;
     optimize_s << optimize;
     subscripts_s << subscripts;
-    (*dict)["num_args"] = num_args_s.str();
-    (*dict)["optimize"] = optimize_s.str();
+    (*dict)["num_args"]   = num_args_s.str();
+    (*dict)["optimize"]   = optimize_s.str();
     (*dict)["subscripts"] = subscripts_s.str();
   }
 };
@@ -421,34 +416,33 @@ class EinsumOp {
   std::shared_ptr<NDArray> tempspace;
   std::vector<Step> paths;
   explicit EinsumOp(int num_args, int optimize, std::string subscripts) {
-    this->num_args = num_args;
-    this->optimize = optimize;
+    this->num_args   = num_args;
+    this->optimize   = optimize;
     this->subscripts = subscripts;
   }
   bool operator==(const EinsumOp& other) const {
-    return this->num_args == other.num_args &&
-           !this->subscripts.compare(other.subscripts) &&
+    return this->num_args == other.num_args && !this->subscripts.compare(other.subscripts) &&
            this->optimize == other.optimize;
   }
 };  // class EinsumOp
 
-template<int dimension, int req, bool back, typename AType>
-struct numpy_einsum{
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out,
-                                  common::StaticArray<DType*, NPY_MAXARGS> op,
-                                  mshadow::Shape<dimension> oshape,
-                                  common::StaticArray<mshadow::Shape<dimension>,
-                                                      NPY_MAXARGS> ostride,
-                                  mshadow::Shape<dimension> reduceshape,
-                                  common::StaticArray<mshadow::Shape<dimension>,
-                                                      NPY_MAXARGS> rstride,
-                                  int nop,
-                                  int iop0,
-                                  const DType* out_grad) {
+template <int dimension, int req, bool back, typename AType>
+struct numpy_einsum {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(
+      index_t i,
+      DType* out,
+      common::StaticArray<DType*, NPY_MAXARGS> op,
+      mshadow::Shape<dimension> oshape,
+      common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> ostride,
+      mshadow::Shape<dimension> reduceshape,
+      common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> rstride,
+      int nop,
+      int iop0,
+      const DType* out_grad) {
     using namespace mxnet_op;
     mshadow::Shape<dimension> oidx = unravel(i, oshape);
-    i = back ? dot(oidx, ostride[iop0]) : i;
+    i                              = back ? dot(oidx, ostride[iop0]) : i;
     if (req == kWriteTo) {
       out[i] = (DType)0;
     }
@@ -458,35 +452,35 @@ struct numpy_einsum{
       }
     }
     mshadow::Shape<dimension> ridx = unravel(0, reduceshape);
-    AType sum = 0;
+    AType sum                      = 0;
     do {
-      AType tmp = back ? static_cast<AType>(out_grad[dot(oidx, ostride[nop]) +
-                                                     dot(ridx, rstride[nop])]): (AType)1;
+      AType tmp =
+          back ? static_cast<AType>(out_grad[dot(oidx, ostride[nop]) + dot(ridx, rstride[nop])])
+               : (AType)1;
       for (int iop = 0; iop < nop; ++iop) {
         if (iop != iop0) {
           index_t k = dot(oidx, ostride[iop]) + dot(ridx, rstride[iop]);
-          tmp = tmp * static_cast<AType>(op[iop][k]);
+          tmp       = tmp * static_cast<AType>(op[iop][k]);
         }
       }
       sum = sum + tmp;
-    }while (inc(&ridx, reduceshape));
+    } while (inc(&ridx, reduceshape));
     out[i] = out[i] + static_cast<DType>(sum);
   }
 };
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs,
-                               const char *subscripts, int nop,
+                               const char* subscripts,
+                               int nop,
                                const OpContext& ctx) {
   using namespace mxnet_op;
 
   /* nop+1 (+1 is for the output) must fit in NPY_MAXARGS */
-  CHECK(nop < NPY_MAXARGS)
-    << "too many operands provided to einstein sum function";
-  CHECK(nop >= 1)
-    << "not enough operands provided to einstein sum function";
+  CHECK(nop < NPY_MAXARGS) << "too many operands provided to einstein sum function";
+  CHECK(nop >= 1) << "not enough operands provided to einstein sum function";
 
   /* Step 1: Parse the subscripts string into label_counts and op_labels */
   int iop, idim, min_label = 127, max_label = 0;
@@ -496,15 +490,20 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
     int length = static_cast<int>(strcspn(subscripts, ",-"));
 
     CHECK(!(iop == nop - 1 && subscripts[length] == ','))
-      << "more operands provided to einstein sum function "
-      << "than specified in the subscripts string";
-    CHECK(!(iop < nop-1 && subscripts[length] != ','))
-      << "fewer operands provided to einstein sum function "
-      << "than specified in the subscripts string";
-    CHECK_GE(parse_operand_subscripts(subscripts, length,
+        << "more operands provided to einstein sum function "
+        << "than specified in the subscripts string";
+    CHECK(!(iop < nop - 1 && subscripts[length] != ','))
+        << "fewer operands provided to einstein sum function "
+        << "than specified in the subscripts string";
+    CHECK_GE(parse_operand_subscripts(subscripts,
+                                      length,
                                       inputs[iop + back].shape_.ndim(),
-                                      iop, op_labels[iop], label_counts,
-                                      &min_label, &max_label), 0);
+                                      iop,
+                                      op_labels[iop],
+                                      label_counts,
+                                      &min_label,
+                                      &max_label),
+             0);
 
     /* Move subscripts to the start of the labels for the next op */
     subscripts += length;
@@ -521,7 +520,7 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
   for (iop = 0; iop < nop; ++iop) {
     int count_zeros = 0;
     int ndim;
-    char *labels = op_labels[iop];
+    char* labels = op_labels[iop];
 
     ndim = inputs[iop + back].shape_.ndim();
     for (idim = 0; idim < ndim; ++idim) {
@@ -548,22 +547,19 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
     }
     for (label = min_label; label <= max_label; ++label) {
       if (label_counts[label] == 1) {
-        CHECK(ndim_output < NPY_MAXDIMS)
-          << "einstein sum subscript string has too many "
-          << "distinct labels";
+        CHECK(ndim_output < NPY_MAXDIMS) << "einstein sum subscript string has too many "
+                                         << "distinct labels";
         output_labels[ndim_output++] = label;
       }
     }
   } else {
-    CHECK(subscripts[0] == '-' && subscripts[1] == '>')
-      << "einstein sum subscript string does not "
-      << "contain proper '->' output specified";
+    CHECK(subscripts[0] == '-' && subscripts[1] == '>') << "einstein sum subscript string does not "
+                                                        << "contain proper '->' output specified";
     subscripts += 2;
 
     /* Parse the output subscript string. */
-    ndim_output = parse_output_subscripts(subscripts, strlen(subscripts),
-                                          ndim_broadcast, label_counts,
-                                          output_labels);
+    ndim_output = parse_output_subscripts(
+        subscripts, strlen(subscripts), ndim_broadcast, label_counts, output_labels);
     CHECK_GE(ndim_output, 0);
   }
 
@@ -574,7 +570,7 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
    */
   std::vector<TShape> opshape(nop), opstride_true(nop);
   for (iop = 0; iop < nop; ++iop) {
-    char *labels = op_labels[iop];
+    char* labels = op_labels[iop];
     int combine, ndim;
 
     ndim = inputs[iop + back].shape_.ndim();
@@ -596,13 +592,12 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
     if (combine) {
       TShape tshape(ndim - combine, -1);
       TShape tstride(ndim - combine, -1);
-      get_combined_dims_view(inputs[iop + back], iop, labels,
-                             &tshape, &tstride);
-      opshape[iop] = tshape;
+      get_combined_dims_view(inputs[iop + back], iop, labels, &tshape, &tstride);
+      opshape[iop]       = tshape;
       opstride_true[iop] = tstride;
     } else {
       /* No combining needed */
-      opshape[iop] = inputs[iop + back].shape_;
+      opshape[iop]       = inputs[iop + back].shape_;
       opstride_true[iop] = get_stride(opshape[iop]);
     }
   }
@@ -613,13 +608,11 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
    * Can just share the output_labels memory, because iter_labels
    * is output_labels with some more labels appended.
    */
-  char *iter_labels = output_labels;
-  int ndim_iter = ndim_output;
+  char* iter_labels = output_labels;
+  int ndim_iter     = ndim_output;
   for (label = min_label; label <= max_label; ++label) {
-    if (label_counts[label] > 0 &&
-        memchr(output_labels, label, ndim_output) == nullptr) {
-      CHECK(ndim_iter < NPY_MAXDIMS)
-        << "too many subscripts in einsum";
+    if (label_counts[label] > 0 && memchr(output_labels, label, ndim_output) == nullptr) {
+      CHECK(ndim_iter < NPY_MAXDIMS) << "too many subscripts in einsum";
       iter_labels[ndim_iter++] = label;
     }
   }
@@ -627,17 +620,18 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
   /* Step 4: Set up the op_axes for the iterator */
   TShape itershape(ndim_iter, -1);
   std::vector<TShape> iterstride(nop + 1, TShape(ndim_iter, 0));
-  TShape oshape = back ? inputs[0].shape_ : outputs[0].shape_;
+  TShape oshape       = back ? inputs[0].shape_ : outputs[0].shape_;
   TShape ostride_true = get_stride(oshape);
   TShape reduceshape;
   std::vector<TShape> remainshape(nop);
   int op_axes_arrays[NPY_MAXARGS][NPY_MAXDIMS];
-  int *op_axes[NPY_MAXARGS];
+  int* op_axes[NPY_MAXARGS];
 
   for (iop = 0; iop < nop; ++iop) {
     op_axes[iop] = op_axes_arrays[iop];
-    CHECK_GE(prepare_op_axes(opshape[iop].ndim(), iop, op_labels[iop],
-             op_axes[iop], ndim_iter, iter_labels), 0);
+    CHECK_GE(prepare_op_axes(
+                 opshape[iop].ndim(), iop, op_labels[iop], op_axes[iop], ndim_iter, iter_labels),
+             0);
     for (idim = 0; idim < ndim_iter; idim++) {
       if (op_axes[iop][idim] != -1) {
         iterstride[iop][idim] = opstride_true[iop][op_axes[iop][idim]];
@@ -677,10 +671,10 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
   for (iop = 0; iop <= nop; ++iop) {
     iterstride[iop] = pad(iterstride[iop], ndim_iter);
   }
-  oshape = pad(oshape, ndim_iter);
+  oshape      = pad(oshape, ndim_iter);
   reduceshape = pad(reduceshape, ndim_iter);
   for (iop = 0; iop < nop; ++iop) {
-    opshape[iop] = pad(opshape[iop], ndim_iter);
+    opshape[iop]     = pad(opshape[iop], ndim_iter);
     remainshape[iop] = pad(remainshape[iop], ndim_iter);
   }
 
@@ -688,59 +682,58 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
     if (oshape.Size() == 0) {
       return;
     }
-    const TBlob &out_data = outputs[0];
+    const TBlob& out_data = outputs[0];
     MXNET_ACC_TYPE_SWITCH(out_data.type_flag_, DType, AType, {
       mxnet::common::StaticArray<DType*, NPY_MAXARGS> op;
       for (iop = 0; iop < nop; ++iop) {
         op[iop] = inputs[iop].dptr<DType>();
       }
-      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        MXNET_NDIM_SWITCH_EX(ndim_iter, dimension, {
-          mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> ostride_arr;
-          mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> rstride_arr;
-          for (iop = 0; iop < nop; ++iop) {
-            mshadow::Shape<dimension> otmp, rtmp;
-            for (idim = 0; idim < dimension; ++idim) {
-              otmp[idim] = idim < ndim_output ? iterstride[iop][idim] : 1;
-              rtmp[idim] = idim < dimension - ndim_output ? iterstride[iop][idim + ndim_output] : 1;
+      MXNET_ASSIGN_REQ_SWITCH(
+          req[0], req_type, {MXNET_NDIM_SWITCH_EX(ndim_iter, dimension, {
+            mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> ostride_arr;
+            mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> rstride_arr;
+            for (iop = 0; iop < nop; ++iop) {
+              mshadow::Shape<dimension> otmp, rtmp;
+              for (idim = 0; idim < dimension; ++idim) {
+                otmp[idim] = idim < ndim_output ? iterstride[iop][idim] : 1;
+                rtmp[idim] =
+                    idim < dimension - ndim_output ? iterstride[iop][idim + ndim_output] : 1;
+              }
+              ostride_arr[iop] = otmp;
+              rstride_arr[iop] = rtmp;
             }
-            ostride_arr[iop] = otmp;
-            rstride_arr[iop] = rtmp;
-          }
-          Kernel<numpy_einsum<dimension, req_type, 0, AType>,
-                 xpu>::Launch(ctx.get_stream<xpu>(),
-                              oshape.Size(),
-                              out_data.dptr<DType>(),
-                              op,
-                              oshape.get<dimension>(),
-                              ostride_arr,
-                              reduceshape.get<dimension>(),
-                              rstride_arr,
-                              nop,
-                              -1,
-                              reinterpret_cast<DType*>(NULL));
-        })
-      })
+            Kernel<numpy_einsum<dimension, req_type, 0, AType>, xpu>::Launch(
+                ctx.get_stream<xpu>(),
+                oshape.Size(),
+                out_data.dptr<DType>(),
+                op,
+                oshape.get<dimension>(),
+                ostride_arr,
+                reduceshape.get<dimension>(),
+                rstride_arr,
+                nop,
+                -1,
+                reinterpret_cast<DType*>(NULL));
+          })})
     })
   } else {
     if (oshape.Size() == 0) {
       for (iop = 0; iop < nop; ++iop) {
         const TBlob& out_data = outputs[iop];
         if (opshape[iop].Size() > 0) {
-          MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
-            MXNET_ASSIGN_REQ_SWITCH(req[iop], req_type, {
-              if (req_type == kWriteTo) {
-                out_data.FlatTo1D<xpu, DType>(ctx.get_stream<xpu>()) = 0;
-              }
-            })
-          })
+          MSHADOW_TYPE_SWITCH(
+              out_data.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[iop], req_type, {
+                if (req_type == kWriteTo) {
+                  out_data.FlatTo1D<xpu, DType>(ctx.get_stream<xpu>()) = 0;
+                }
+              })})
         }
       }
       return;
     }
     for (int i = 0; i < nop; ++i) {
-      const TBlob &out_data = outputs[i];
-      const TBlob &out_grad = inputs[0];
+      const TBlob& out_data = outputs[i];
+      const TBlob& out_grad = inputs[0];
       std::vector<TShape> opstride(nop + 1, TShape(ndim_iter, 0));
       std::vector<TShape> remainstride(nop + 1, TShape(ndim_iter, 0));
       for (iop = 0; iop <= nop; ++iop) {
@@ -748,8 +741,7 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
         for (idim = 0; idim < ndim_iter; ++idim) {
           if (op_axes_arrays[i][idim] == -1 ||
               (iop != nop && opshape[i][op_axes_arrays[i][idim]] == 1 &&
-              op_axes_arrays[iop][idim] != -1 &&
-              opshape[iop][op_axes_arrays[iop][idim]] != 1)) {
+               op_axes_arrays[iop][idim] != -1 && opshape[iop][op_axes_arrays[iop][idim]] != 1)) {
             remainstride[iop][j++] = iterstride[iop][idim];
           } else {
             opstride[iop][op_axes_arrays[i][idim]] = iterstride[iop][idim];
@@ -761,34 +753,33 @@ inline void NumpyEinsumProcess(const std::vector<TBlob>& inputs,
         for (iop = 0; iop < nop; ++iop) {
           op[iop] = inputs[iop + back].dptr<DType>();
         }
-        MXNET_ASSIGN_REQ_SWITCH(req[i], req_type, {
-          MXNET_NDIM_SWITCH_EX(ndim_iter, dimension, {
-            mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> opstride_arr;
-            mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> remainstride_arr;
-            for (iop = 0; iop <= nop; ++iop) {
-              opstride_arr[iop] = opstride[iop].get<dimension>();
-              remainstride_arr[iop] = remainstride[iop].get<dimension>();
-            }
-            Kernel<numpy_einsum<dimension, req_type, 1, AType>,
-                  xpu>::Launch(ctx.get_stream<xpu>(),
-                               opshape[i].Size(),
-                               out_data.dptr<DType>(),
-                               op,
-                               opshape[i].get<dimension>(),
-                               opstride_arr,
-                               remainshape[i].get<dimension>(),
-                               remainstride_arr,
-                               nop,
-                               i,
-                               out_grad.dptr<DType>());
-          })
-        })
+        MXNET_ASSIGN_REQ_SWITCH(
+            req[i], req_type, {MXNET_NDIM_SWITCH_EX(ndim_iter, dimension, {
+              mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> opstride_arr;
+              mxnet::common::StaticArray<mshadow::Shape<dimension>, NPY_MAXARGS> remainstride_arr;
+              for (iop = 0; iop <= nop; ++iop) {
+                opstride_arr[iop]     = opstride[iop].get<dimension>();
+                remainstride_arr[iop] = remainstride[iop].get<dimension>();
+              }
+              Kernel<numpy_einsum<dimension, req_type, 1, AType>, xpu>::Launch(
+                  ctx.get_stream<xpu>(),
+                  opshape[i].Size(),
+                  out_data.dptr<DType>(),
+                  op,
+                  opshape[i].get<dimension>(),
+                  opstride_arr,
+                  remainshape[i].get<dimension>(),
+                  remainstride_arr,
+                  nop,
+                  i,
+                  out_grad.dptr<DType>());
+            })})
       })
     }
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
@@ -796,11 +787,11 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
                                const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  EinsumOp& state = state_ptr.get_state<EinsumOp>();
-  int num_args = state.num_args;
-  int optimize = state.optimize;
+  EinsumOp& state        = state_ptr.get_state<EinsumOp>();
+  int num_args           = state.num_args;
+  int optimize           = state.optimize;
   const char* subscripts = state.subscripts.c_str();
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), num_args);
   CHECK_EQ(outputs.size(), 1U);
   if (optimize == 0) {
@@ -810,7 +801,7 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
   std::vector<Step>& paths = state.paths;
   std::vector<std::vector<int> > pos;
   std::string string_repr;
-  paths = einsum_path(state.subscripts, inputs, true, ctx.run_ctx, &pos, &string_repr);
+  paths         = einsum_path(state.subscripts, inputs, true, ctx.run_ctx, &pos, &string_repr);
   int paths_len = paths.size();
   size_t temp_space_size = 0, max_temp_space_size = 0;
   std::vector<TBlob> operands(inputs), tmp_operands, temp_space_vec(paths_len - 1);
@@ -822,16 +813,14 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
   }
   temp_space_size += max_temp_space_size;
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    state.tempspace.reset<NDArray>(new NDArray(TShape(Shape1(temp_space_size)),
-                                               ctx.run_ctx.ctx,
-                                               false,
-                                               outputs[0].type_flag_));
+    state.tempspace.reset<NDArray>(new NDArray(
+        TShape(Shape1(temp_space_size)), ctx.run_ctx.ctx, false, outputs[0].type_flag_));
     Tensor<xpu, 1, DType> temp_space = state.tempspace->data().FlatTo1D<xpu, DType>();
-    size_t begin = max_temp_space_size;
+    size_t begin                     = max_temp_space_size;
     for (int i = 0; i < paths_len - 1; ++i) {
-      TBlob tblob = TBlob(temp_space.Slice(begin, begin + paths[i].oshape.Size()));
+      TBlob tblob       = TBlob(temp_space.Slice(begin, begin + paths[i].oshape.Size()));
       temp_space_vec[i] = tblob.reshape(paths[i].oshape);
-      begin = begin + paths[i].oshape.Size();
+      begin             = begin + paths[i].oshape.Size();
     }
     for (int i = 0; i < paths_len; ++i) {
       tmp_operands.clear();
@@ -848,16 +837,16 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
         if (paths[i].do_einsum || handle_out) {
           TBlob max_temp_space = TBlob(temp_space.Slice(0, paths[i].tshape.Size()));
           max_temp_space.FlatTo1D<xpu, DType>(s) = 0;
-          max_temp_space = max_temp_space.reshape(paths[i].tshape);
+          max_temp_space                         = max_temp_space.reshape(paths[i].tshape);
           size_t tensordot_tempspace_size =
-            TensordotWorkspaceSize<xpu>(paths[i].left_pos,
-                                        paths[i].right_pos,
-                                        tmp_operands[0],
-                                        tmp_operands[1],
-                                        max_temp_space,
-                                        std::vector<OpReqType>{OpReqType::kWriteTo});
+              TensordotWorkspaceSize<xpu>(paths[i].left_pos,
+                                          paths[i].right_pos,
+                                          tmp_operands[0],
+                                          tmp_operands[1],
+                                          max_temp_space,
+                                          std::vector<OpReqType>{OpReqType::kWriteTo});
           Tensor<xpu, 1, char> tensordot_tempspace =
-            ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tensordot_tempspace_size), s);
+              ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tensordot_tempspace_size), s);
           TensordotImpl<xpu>(paths[i].left_pos,
                              paths[i].right_pos,
                              ctx,
@@ -867,20 +856,21 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
                              std::vector<OpReqType>{OpReqType::kWriteTo},
                              tensordot_tempspace);
           NumpyEinsumProcess<xpu, 0>(std::vector<TBlob>{max_temp_space},
-            handle_out ? req : std::vector<OpReqType>{OpReqType::kWriteTo},
-            handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
-            paths[i].blas2einsum_str.c_str(),
-            1, ctx);
+                                     handle_out ? req : std::vector<OpReqType>{OpReqType::kWriteTo},
+                                     handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
+                                     paths[i].blas2einsum_str.c_str(),
+                                     1,
+                                     ctx);
         } else {
           size_t tensordot_tempspace_size =
-            TensordotWorkspaceSize<xpu>(paths[i].left_pos,
-                                        paths[i].right_pos,
-                                        tmp_operands[0],
-                                        tmp_operands[1],
-                                        temp_space_vec[i],
-                                        std::vector<OpReqType>{OpReqType::kWriteTo});
-          Tensor<xpu, 1, char> tensordot_tempspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
-            Shape1(tensordot_tempspace_size), s);
+              TensordotWorkspaceSize<xpu>(paths[i].left_pos,
+                                          paths[i].right_pos,
+                                          tmp_operands[0],
+                                          tmp_operands[1],
+                                          temp_space_vec[i],
+                                          std::vector<OpReqType>{OpReqType::kWriteTo});
+          Tensor<xpu, 1, char> tensordot_tempspace =
+              ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tensordot_tempspace_size), s);
           TensordotImpl<xpu>(paths[i].left_pos,
                              paths[i].right_pos,
                              ctx,
@@ -892,9 +882,11 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
         }
       } else {
         NumpyEinsumProcess<xpu, 0>(tmp_operands,
-        handle_out ? req : std::vector<OpReqType>{OpReqType::kWriteTo},
-        handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
-        paths[i].einsum_str.c_str(), tmp_operands.size(), ctx);
+                                   handle_out ? req : std::vector<OpReqType>{OpReqType::kWriteTo},
+                                   handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
+                                   paths[i].einsum_str.c_str(),
+                                   tmp_operands.size(),
+                                   ctx);
       }
       if (!handle_out) {
         operands.push_back(temp_space_vec[i]);
@@ -903,7 +895,7 @@ inline void NumpyEinsumForward(const OpStatePtr& state_ptr,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -911,11 +903,11 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
                                 const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow_op;
-  const EinsumOp& state = state_ptr.get_state<EinsumOp>();
-  int num_args = state.num_args;
-  int optimize = state.optimize;
+  const EinsumOp& state  = state_ptr.get_state<EinsumOp>();
+  int num_args           = state.num_args;
+  int optimize           = state.optimize;
   const char* subscripts = state.subscripts.c_str();
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), 1 + num_args);
   CHECK_EQ(outputs.size(), num_args);
   if (optimize == 0) {
@@ -924,7 +916,7 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
   }
   // calculate temporary space size for temp_grad
   const std::vector<Step>& paths = state.paths;
-  int paths_len = paths.size();
+  int paths_len                  = paths.size();
   size_t temp_space_size = 0, max_temp_space_size = 0;
   for (int i = 0; i < paths_len - 1; ++i) {
     temp_space_size += paths[i].oshape.Size();
@@ -952,7 +944,7 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
   }
   // calculate temporary space size for tensordot
   size_t tensordot_max_tempspace_size = 0;
-  size_t begin_tensordot_tempspace = 0;
+  size_t begin_tensordot_tempspace    = 0;
   std::vector<TBlob> temp_inputs, temp_outputs;
   std::vector<OpReqType> temp_req;
   std::vector<size_t> tensordot_tempspace_size;
@@ -966,9 +958,8 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
       if (handle_out) {
         temp_inputs.push_back(inputs[0]);
       } else {
-        temp_inputs.push_back(TBlob(reinterpret_cast<DType*>(NULL),
-                                    paths[i].oshape,
-                                    xpu::kDevMask));
+        temp_inputs.push_back(
+            TBlob(reinterpret_cast<DType*>(NULL), paths[i].oshape, xpu::kDevMask));
       }
       for (auto p : paths[i].contract_inds) {
         int idx = op_idx[i][p];
@@ -977,44 +968,39 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
           temp_outputs.push_back(outputs[idx - 1]);
           temp_req.push_back(req[idx - 1]);
         } else {
-          temp_inputs.push_back(TBlob(reinterpret_cast<DType*>(NULL),
-                                      paths[-idx].oshape,
-                                      xpu::kDevMask));
-          temp_outputs.push_back(TBlob(reinterpret_cast<DType*>(NULL),
-                                      paths[-idx].oshape,
-                                      xpu::kDevMask));
+          temp_inputs.push_back(
+              TBlob(reinterpret_cast<DType*>(NULL), paths[-idx].oshape, xpu::kDevMask));
+          temp_outputs.push_back(
+              TBlob(reinterpret_cast<DType*>(NULL), paths[-idx].oshape, xpu::kDevMask));
           temp_req.push_back(OpReqType::kWriteTo);
         }
       }
       size_t cur_tensordot_tempspace_size = 0;
       if (paths[i].do_blas) {
         if (paths[i].do_einsum) {
-          cur_tensordot_tempspace_size =
-            TensordotBackwardWorkspaceSize<xpu>(paths[i].left_pos,
-                                                paths[i].right_pos,
-                                                TBlob(reinterpret_cast<DType*>(NULL),
-                                                      paths[i].tshape,
-                                                      xpu::kDevMask),
-                                                temp_inputs[1],
-                                                temp_inputs[2],
-                                                temp_outputs[0],
-                                                temp_outputs[1],
-                                                temp_req);
+          cur_tensordot_tempspace_size = TensordotBackwardWorkspaceSize<xpu>(
+              paths[i].left_pos,
+              paths[i].right_pos,
+              TBlob(reinterpret_cast<DType*>(NULL), paths[i].tshape, xpu::kDevMask),
+              temp_inputs[1],
+              temp_inputs[2],
+              temp_outputs[0],
+              temp_outputs[1],
+              temp_req);
         } else {
-          cur_tensordot_tempspace_size =
-            TensordotBackwardWorkspaceSize<xpu>(paths[i].left_pos,
-                                                paths[i].right_pos,
-                                                temp_inputs[0],
-                                                temp_inputs[1],
-                                                temp_inputs[2],
-                                                temp_outputs[0],
-                                                temp_outputs[1],
-                                                temp_req);
+          cur_tensordot_tempspace_size = TensordotBackwardWorkspaceSize<xpu>(paths[i].left_pos,
+                                                                             paths[i].right_pos,
+                                                                             temp_inputs[0],
+                                                                             temp_inputs[1],
+                                                                             temp_inputs[2],
+                                                                             temp_outputs[0],
+                                                                             temp_outputs[1],
+                                                                             temp_req);
         }
       }
       tensordot_tempspace_size.push_back(cur_tensordot_tempspace_size);
-      tensordot_max_tempspace_size = std::max(tensordot_max_tempspace_size,
-                                              cur_tensordot_tempspace_size);
+      tensordot_max_tempspace_size =
+          std::max(tensordot_max_tempspace_size, cur_tensordot_tempspace_size);
     }
     begin_tensordot_tempspace = temp_space_size;
     temp_space_size += (tensordot_max_tempspace_size + sizeof(DType) - 1) / sizeof(DType);
@@ -1023,22 +1009,22 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
   std::vector<TBlob> temp_grad(paths_len - 1), temp_data(paths_len - 1);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     // allocate temporary space for gradients of intermediate results
-    Tensor<xpu, 1, DType> temp_space = ctx.requested[0].get_space_typed<xpu, 1, DType>
-      (Shape1(temp_space_size), s);
+    Tensor<xpu, 1, DType> temp_space =
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(temp_space_size), s);
     size_t begin = max_temp_space_size;
     for (int i = 0; i + 1 < paths_len; ++i) {
-      TBlob tblob = TBlob(temp_space.Slice(begin, begin + paths[i].oshape.Size()));
+      TBlob tblob  = TBlob(temp_space.Slice(begin, begin + paths[i].oshape.Size()));
       temp_grad[i] = tblob.reshape(paths[i].oshape);
-      begin = begin + paths[i].oshape.Size();
+      begin        = begin + paths[i].oshape.Size();
     }
 
     // reinterprete ndarray for intermediate results
     Tensor<xpu, 1, DType> ndarray_space = state.tempspace->data().FlatTo1D<xpu, DType>();
-    begin = max_temp_space_size;
+    begin                               = max_temp_space_size;
     for (int i = 0; i + 1 < paths_len; ++i) {
-      TBlob tblob = TBlob(ndarray_space.Slice(begin, begin + paths[i].oshape.Size()));
+      TBlob tblob  = TBlob(ndarray_space.Slice(begin, begin + paths[i].oshape.Size()));
       temp_data[i] = tblob.reshape(paths[i].oshape);
-      begin = begin + paths[i].oshape.Size();
+      begin        = begin + paths[i].oshape.Size();
     }
 
     // go through the paths in the reversed order
@@ -1069,30 +1055,47 @@ inline void NumpyEinsumBackward(const OpStatePtr& state_ptr,
         CHECK_EQ(temp_inputs.size(), 3U);
         CHECK_EQ(temp_outputs.size(), 2U);
         CHECK_EQ(temp_req.size(), 2U);
-        Tensor<xpu, 1, DType> tensordot_tempspace = temp_space.Slice(begin_tensordot_tempspace,
-                                                                     temp_space_size);
+        Tensor<xpu, 1, DType> tensordot_tempspace =
+            temp_space.Slice(begin_tensordot_tempspace, temp_space_size);
         Tensor<xpu, 1, char> char_tempspace =
-          Tensor<xpu, 1, char>(reinterpret_cast<char*>(tensordot_tempspace.dptr_),
-                                                       Shape1(tensordot_tempspace_size[i]),
-                                                       tensordot_tempspace.stream_);
+            Tensor<xpu, 1, char>(reinterpret_cast<char*>(tensordot_tempspace.dptr_),
+                                 Shape1(tensordot_tempspace_size[i]),
+                                 tensordot_tempspace.stream_);
         if (paths[i].do_einsum) {
           TBlob max_temp_space = TBlob(temp_space.Slice(0, paths[i].tshape.Size()));
-          max_temp_space = max_temp_space.reshape(paths[i].tshape);
+          max_temp_space       = max_temp_space.reshape(paths[i].tshape);
           NumpyEinsumProcess<xpu, 0>(std::vector<TBlob>{temp_inputs[0]},
                                      std::vector<OpReqType>{kWriteTo},
                                      std::vector<TBlob>{max_temp_space},
                                      paths[i].einsum2blas_str.c_str(),
-                                     1, ctx);
-          TensordotBackwardImpl<xpu>(paths[i].left_pos, paths[i].right_pos, ctx,
-                                     max_temp_space, temp_inputs[1], temp_inputs[2],
-                                     temp_outputs[0], temp_outputs[1], temp_req, char_tempspace);
+                                     1,
+                                     ctx);
+          TensordotBackwardImpl<xpu>(paths[i].left_pos,
+                                     paths[i].right_pos,
+                                     ctx,
+                                     max_temp_space,
+                                     temp_inputs[1],
+                                     temp_inputs[2],
+                                     temp_outputs[0],
+                                     temp_outputs[1],
+                                     temp_req,
+                                     char_tempspace);
         } else {
-          TensordotBackwardImpl<xpu>(paths[i].left_pos, paths[i].right_pos, ctx,
-                                     temp_inputs[0], temp_inputs[1], temp_inputs[2],
-                                     temp_outputs[0], temp_outputs[1], temp_req, char_tempspace);
+          TensordotBackwardImpl<xpu>(paths[i].left_pos,
+                                     paths[i].right_pos,
+                                     ctx,
+                                     temp_inputs[0],
+                                     temp_inputs[1],
+                                     temp_inputs[2],
+                                     temp_outputs[0],
+                                     temp_outputs[1],
+                                     temp_req,
+                                     char_tempspace);
         }
       } else {
-        NumpyEinsumProcess<xpu, 1>(temp_inputs, temp_req, temp_outputs,
+        NumpyEinsumProcess<xpu, 1>(temp_inputs,
+                                   temp_req,
+                                   temp_outputs,
                                    paths[i].einsum_str.c_str(),
                                    temp_outputs.size(),
                                    ctx);
diff --git a/src/operator/numpy/np_einsum_op.cc b/src/operator/numpy/np_einsum_op.cc
index 6913eb2e14c2..486bb81599f9 100644
--- a/src/operator/numpy/np_einsum_op.cc
+++ b/src/operator/numpy/np_einsum_op.cc
@@ -64,15 +64,13 @@ namespace op {
 
 inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
                                                     const mxnet::ShapeVector& shapes) {
-  const std::string einsum_symbols =
-    "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
+  const std::string einsum_symbols = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
   std::bitset<MAXAXIS> einsum_symbols_set;
   for (const char& c : einsum_symbols) {
     einsum_symbols_set.set(c);
   }
 
-  CHECK_NE(shapes.size(), 0U)
-    << "No input operands";
+  CHECK_NE(shapes.size(), 0U) << "No input operands";
 
   auto end_pos = std::remove(subscripts.begin(), subscripts.end(), ' ');
   subscripts.erase(end_pos, subscripts.end());
@@ -82,33 +80,28 @@ inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
     if (c == '.' || c == ',' || c == '-' || c == '>') {
       continue;
     }
-    CHECK(einsum_symbols_set.test(c))
-      << "Character " << c
-      << " is not a valid symbol.";
+    CHECK(einsum_symbols_set.test(c)) << "Character " << c << " is not a valid symbol.";
   }
 
   // Check for proper "->"
-  if (subscripts.find('-') != std::string::npos ||
-      subscripts.find('>') != std::string::npos) {
+  if (subscripts.find('-') != std::string::npos || subscripts.find('>') != std::string::npos) {
     bool invalid = (std::count(subscripts.begin(), subscripts.end(), '-') > 1 ||
                     std::count(subscripts.begin(), subscripts.end(), '>') > 1);
     CHECK(!invalid && _count_substring(subscripts, "->") == 1)
-      << "Subscripts can only contain one '->'.";
+        << "Subscripts can only contain one '->'.";
   }
 
   // Parse ellipses
   if (subscripts.find('.') != std::string::npos) {
     std::string used = subscripts;
-    used.erase(std::remove_if(used.begin(),
-                              used.end(),
-                              [](const char& c){return c == '.' ||
-                                                       c == ',' ||
-                                                       c == '-' ||
-                                                       c == '>';}),
-               used.end());
+    used.erase(
+        std::remove_if(used.begin(),
+                       used.end(),
+                       [](const char& c) { return c == '.' || c == ',' || c == '-' || c == '>'; }),
+        used.end());
 
     std::bitset<MAXAXIS> used_set = str2set(used);
-    std::string ellipse_inds = "";
+    std::string ellipse_inds      = "";
     for (const char& c : einsum_symbols) {
       if (!used_set.test(static_cast<int>(c))) {
         ellipse_inds.append(1, c);
@@ -121,24 +114,22 @@ inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
 
     if (subscripts.find("->") != std::string::npos) {
       std::vector<std::string> tmp = split(subscripts, "->");
-      input_tmp = tmp[0];
-      output_sub = tmp[1];
-      split_subscripts = split(input_tmp, ",");
-      out_sub = true;
+      input_tmp                    = tmp[0];
+      output_sub                   = tmp[1];
+      split_subscripts             = split(input_tmp, ",");
+      out_sub                      = true;
     } else {
       split_subscripts = split(subscripts, ",");
-      out_sub = false;
+      out_sub          = false;
     }
 
     size_t size_split_subscripts = split_subscripts.size();
-    subscripts = "";
+    subscripts                   = "";
     for (size_t i = 0; i < size_split_subscripts; ++i) {
       const std::string& sub = split_subscripts[i];
       if (sub.find('.') != std::string::npos) {
-        CHECK_EQ(std::count(sub.begin(), sub.end(), '.'), 3)
-          << "Invalid Ellipses";
-        CHECK_EQ(_count_substring(sub, "..."), 1)
-          << "Invalid Ellipses";
+        CHECK_EQ(std::count(sub.begin(), sub.end(), '.'), 3) << "Invalid Ellipses";
+        CHECK_EQ(_count_substring(sub, "..."), 1) << "Invalid Ellipses";
 
         // Take into account numerical values
         int ellipse_count = 0;
@@ -153,8 +144,7 @@ inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
           longest = ellipse_count;
         }
 
-        CHECK_GE(ellipse_count, 0)
-          << "Ellipses lengths do not match.";
+        CHECK_GE(ellipse_count, 0) << "Ellipses lengths do not match.";
         if (ellipse_count == 0) {
           split_subscripts[i].erase(sub.find("..."), 3);
         } else {
@@ -188,9 +178,7 @@ inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
         if (c == ',') {
           continue;
         }
-        CHECK(einsum_symbols_set.test(c))
-          << "Character " << c
-          << " is not a valid symbol.";
+        CHECK(einsum_symbols_set.test(c)) << "Character " << c << " is not a valid symbol.";
         if ((i == 0 || tmp_subscripts[i - 1] != c) &&
             (i == len_tmp_subscripts - 1 || tmp_subscripts[i + 1] != c) &&
             !out_ellipse_set.test(c)) {
@@ -210,16 +198,14 @@ inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
     ret[1] = "";
     // Build output subscripts
     std::string tmp_subscripts = subscripts;
-    size_t len_tmp_subscripts = tmp_subscripts.length();
+    size_t len_tmp_subscripts  = tmp_subscripts.length();
     std::sort(tmp_subscripts.begin(), tmp_subscripts.end());
     for (size_t i = 0; i < len_tmp_subscripts; ++i) {
       const char& c = tmp_subscripts[i];
       if (c == ',') {
         continue;
       }
-      CHECK(einsum_symbols_set.test(c))
-        << "Character " << c
-        << " is not a valid symbol.";
+      CHECK(einsum_symbols_set.test(c)) << "Character " << c << " is not a valid symbol.";
       if ((i == 0 || tmp_subscripts[i - 1] != c) &&
           (i == len_tmp_subscripts - 1 || tmp_subscripts[i + 1] != c)) {
         ret[1].append(1, c);
@@ -231,25 +217,23 @@ inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
   std::bitset<MAXAXIS> input_subscripts_set = str2set(ret[0]);
   for (const char& c : ret[1]) {
     CHECK(input_subscripts_set.test(c))
-      << "Output character " << c
-      << " did not appear in the input";
+        << "Output character " << c << " did not appear in the input";
   }
 
   // Make sure number operands is equivalent to the number of terms
   CHECK_EQ(std::count(ret[0].begin(), ret[0].end(), ',') + 1, shapes.size())
-    << "Number of einsum subscripts must be equal to the "
-    << "number of operands.";
+      << "Number of einsum subscripts must be equal to the "
+      << "number of operands.";
 
   return ret;
 }
 
-
 bool NumpyEinsumShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector *in_attrs,
-                      mxnet::ShapeVector *out_attrs) {
-  const NumpyEinsumParam &param = nnvm::get<NumpyEinsumParam>(attrs.parsed);
+                      mxnet::ShapeVector* in_attrs,
+                      mxnet::ShapeVector* out_attrs) {
+  const NumpyEinsumParam& param = nnvm::get<NumpyEinsumParam>(attrs.parsed);
   const std::string& subscripts = param.subscripts;
-  int num_args = param.num_args;
+  int num_args                  = param.num_args;
   CHECK_EQ(in_attrs->size(), num_args);
   CHECK_EQ(out_attrs->size(), 1U);
   for (int i = 0; i < num_args; i++) {
@@ -263,21 +247,20 @@ bool NumpyEinsumShape(const nnvm::NodeAttrs& attrs,
 
   // Build a few useful list and sets
   std::vector<std::string> input_list = split(parsed_subscripts[0], ",");
-  size_t isize = input_list.size();
+  size_t isize                        = input_list.size();
 
   // Get length of each unique dimension and ensure all dimensions are correct
   dim_t dimension_dict[MAXAXIS];
   memset(dimension_dict, -1, sizeof(dimension_dict));
   for (size_t i = 0; i < isize; ++i) {
     const std::string& term = input_list[i];
-    const TShape& sh = in_attrs->at(i);
+    const TShape& sh        = in_attrs->at(i);
     CHECK_EQ(sh.ndim(), term.length())
-      << "Einstein sum subscript " << input_list[i]
-      << " does not contain the "
-      << "correct number of indices for operand " << i << ".";
+        << "Einstein sum subscript " << input_list[i] << " does not contain the "
+        << "correct number of indices for operand " << i << ".";
     size_t len_term = term.length();
     for (size_t j = 0; j < len_term; ++j) {
-      dim_t dim = sh[j];
+      dim_t dim     = sh[j];
       const char& c = term[j];
 
       if (dimension_dict[static_cast<int>(c)] != -1) {
@@ -286,11 +269,9 @@ bool NumpyEinsumShape(const nnvm::NodeAttrs& attrs,
           dimension_dict[static_cast<int>(c)] = dim;
         }
         CHECK(dim == 1 || dim == dimension_dict[static_cast<int>(c)])
-          << "Size of label '" << c
-          << "' for operand  " << i
-          << " (" << dimension_dict[static_cast<int>(c)]
-          << ") does not match previous terms ("
-          << dim << ").";
+            << "Size of label '" << c << "' for operand  " << i << " ("
+            << dimension_dict[static_cast<int>(c)] << ") does not match previous terms (" << dim
+            << ").";
       } else {
         dimension_dict[static_cast<int>(c)] = dim;
       }
@@ -299,7 +280,7 @@ bool NumpyEinsumShape(const nnvm::NodeAttrs& attrs,
 
   // Get oshape
   const std::string& output_str = parsed_subscripts[1];
-  size_t odim = output_str.size();
+  size_t odim                   = output_str.size();
   TShape oshape(odim, -1);
   for (size_t i = 0; i < odim; ++i) {
     oshape[i] = dimension_dict[static_cast<int>(output_str[i])];
@@ -308,14 +289,12 @@ bool NumpyEinsumShape(const nnvm::NodeAttrs& attrs,
   size_t lim = static_cast<size_t>(std::numeric_limits<index_t>::max());
   for (int i = 0; i < num_args; ++i) {
     CHECK_LE(in_attrs->at(i).Size(), lim)
-      << "Size of operand " << i
-      << " exceeds the maximum index."
-      << " Try setting `USE_INT64_TENSOR_SIZE`.";
+        << "Size of operand " << i << " exceeds the maximum index."
+        << " Try setting `USE_INT64_TENSOR_SIZE`.";
   }
-  CHECK_LE(oshape.Size(), lim)
-    << "Size of output"
-    << " exceeds the maximum index."
-    << " Try setting `USE_INT64_TENSOR_SIZE`.";
+  CHECK_LE(oshape.Size(), lim) << "Size of output"
+                               << " exceeds the maximum index."
+                               << " Try setting `USE_INT64_TENSOR_SIZE`.";
   return shape_is_known(oshape);
 }
 
@@ -330,53 +309,56 @@ OpStatePtr CreateEinsumState(const NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyEinsumParam);
 
 NNVM_REGISTER_OP(_npi_einsum)
-.describe(R"doc()doc" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyEinsumParam>)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyEinsumParam& param = dmlc::get<NumpyEinsumParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args);
-})
-.set_num_outputs(1)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    int num_args = dmlc::get<NumpyEinsumParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    ret.reserve(num_args);
-    for (int i = 0; i < num_args; i++) {
-      ret.push_back(std::string("arg") + std::to_string(i));
-    }
-    return ret;
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyEinsumShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
-.set_attr<FCreateOpState>("FCreateOpState", CreateEinsumState)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", NumpyEinsumForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_einsum"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of eimsum operands")
-.add_arguments(NumpyEinsumParam::__FIELDS__());
+    .describe(R"doc()doc" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyEinsumParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyEinsumParam& param = dmlc::get<NumpyEinsumParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_num_outputs(1)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const nnvm::NodeAttrs& attrs) {
+                                       int num_args =
+                                           dmlc::get<NumpyEinsumParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       ret.reserve(num_args);
+                                       for (int i = 0; i < num_args; i++) {
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyEinsumShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateEinsumState)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", NumpyEinsumForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_einsum"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of eimsum operands")
+    .add_arguments(NumpyEinsumParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_einsum)
-.set_attr_parser(ParamParser<NumpyEinsumParam>)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyEinsumParam& param = dmlc::get<NumpyEinsumParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args + 1);
-})
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyEinsumParam& param = dmlc::get<NumpyEinsumParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args);
-})
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", NumpyEinsumBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyEinsumParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyEinsumParam& param = dmlc::get<NumpyEinsumParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args + 1);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyEinsumParam& param = dmlc::get<NumpyEinsumParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", NumpyEinsumBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_einsum_op.cu b/src/operator/numpy/np_einsum_op.cu
index 7a775fa0d9b4..4d19601915fd 100644
--- a/src/operator/numpy/np_einsum_op.cu
+++ b/src/operator/numpy/np_einsum_op.cu
@@ -31,43 +31,43 @@ namespace op {
 // maximal tensor rank that is supported by cuTENSOR
 static const uint32_t kMaxTensorRank = 12;
 
-template<typename U>
+template <typename U>
 struct CuTensorTypeTraits;
-template<>
+template <>
 struct CuTensorTypeTraits<double> {
-  static const cudaDataType_t cudaType = CUDA_R_64F;
+  static const cudaDataType_t cudaType            = CUDA_R_64F;
   static const cutensorComputeType_t cutensorType = CUTENSOR_COMPUTE_64F;
   typedef double ScalarType;
 };
-template<>
+template <>
 struct CuTensorTypeTraits<float> {
-  static const cudaDataType_t cudaType = CUDA_R_32F;
+  static const cudaDataType_t cudaType            = CUDA_R_32F;
   static const cutensorComputeType_t cutensorType = CUTENSOR_COMPUTE_32F;
   typedef float ScalarType;
 };
-template<>
+template <>
 struct CuTensorTypeTraits<mshadow::half::half_t> {
-  static const cudaDataType_t cudaType = CUDA_R_16F;
+  static const cudaDataType_t cudaType            = CUDA_R_16F;
   static const cutensorComputeType_t cutensorType = CUTENSOR_COMPUTE_16F;
   typedef float ScalarType;
 };
 
 // Round num elements 'x' to be mem aligned according to 'multiple' and 'dtype_size'
 size_t RoundToMultiple(size_t x, size_t multiple, size_t dtype_size) {
-  size_t retVal = ((x*dtype_size + multiple - 1) / multiple) * multiple;
+  size_t retVal = ((x * dtype_size + multiple - 1) / multiple) * multiple;
   return retVal;
 }
 }  // namespace op
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::EinsumOp> {
   size_t operator()(const mxnet::op::EinsumOp& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.num_args);
-    ret = dmlc::HashCombine(ret, val.subscripts);
-    ret = dmlc::HashCombine(ret, val.optimize);
+    ret        = dmlc::HashCombine(ret, val.num_args);
+    ret        = dmlc::HashCombine(ret, val.subscripts);
+    ret        = dmlc::HashCombine(ret, val.optimize);
     return ret;
   }
 };
@@ -76,27 +76,25 @@ struct hash<mxnet::op::EinsumOp> {
 namespace mxnet {
 namespace op {
 
-template<typename ComputeType, typename IntType, int kMaxNumModes_>
+template <typename ComputeType, typename IntType, int kMaxNumModes_>
 struct Einsum {
-  Einsum(const std::string &equation,
-         const mxnet::TShape &a_shape,
-         const mxnet::TShape &b_shape):
-         num_modes_a_(a_shape.ndim()),
-         num_modes_b_(b_shape.ndim()),
-         num_modes_c_(0),
-         is_initialized_(false) {
-    const auto arrow_pos = equation.find("->");
-    const auto comma_pos = equation.find(",");
+  Einsum(const std::string& equation, const mxnet::TShape& a_shape, const mxnet::TShape& b_shape)
+      : num_modes_a_(a_shape.ndim()),
+        num_modes_b_(b_shape.ndim()),
+        num_modes_c_(0),
+        is_initialized_(false) {
+    const auto arrow_pos   = equation.find("->");
+    const auto comma_pos   = equation.find(",");
     const bool is_implicit = (arrow_pos == std::string::npos);
-    const bool uses_b = (comma_pos != std::string::npos);
+    const bool uses_b      = (comma_pos != std::string::npos);
 
     size_t a_start = 0;
-    size_t a_end = is_implicit ? (uses_b ? comma_pos : equation.size()):
-                                 (uses_b ? comma_pos : arrow_pos);
+    size_t a_end =
+        is_implicit ? (uses_b ? comma_pos : equation.size()) : (uses_b ? comma_pos : arrow_pos);
     size_t b_start = uses_b ? comma_pos + 1 : 0;
     size_t b_end   = uses_b ? (is_implicit ? equation.size() : arrow_pos) : 0;
     size_t c_start = is_implicit ? equation.size() : arrow_pos + 2;
-    size_t c_end = equation.size();
+    size_t c_end   = equation.size();
 
     char mode_a[kMaxNumModes_ + 2];
     uint32_t num_modes_a = 0;
@@ -124,13 +122,16 @@ struct Einsum {
     }
 
     /**
-    * Copy all modes from mode_a to mode_c if they don't appear in mode_b
-    */
-    auto CopyModesIf = [](const char* mode_a, uint32_t num_modes_a,
-                          const char* mode_b, uint32_t num_modes_b,
-                          char* mode_c, uint32_t &num_modes_c) {
+     * Copy all modes from mode_a to mode_c if they don't appear in mode_b
+     */
+    auto CopyModesIf = [](const char* mode_a,
+                          uint32_t num_modes_a,
+                          const char* mode_b,
+                          uint32_t num_modes_b,
+                          char* mode_c,
+                          uint32_t& num_modes_c) {
       for (uint32_t i = 0; i < num_modes_a; i++) {
-        auto mode = mode_a[i];
+        auto mode  = mode_a[i];
         bool found = false;
         for (uint32_t j = 0; j < num_modes_b; ++j) {
           if (mode == mode_b[j]) {
@@ -149,48 +150,50 @@ struct Einsum {
       return true;
     };
 
-    std::array<char, kMaxNumModes_+1> implicit_mode_c;
+    std::array<char, kMaxNumModes_ + 1> implicit_mode_c;
     char* redirect_mode_c;
     if (is_implicit) {
       // we have to copy all non-contracted modes from a over to c
-      if (CopyModesIf(mode_a, num_modes_a_, mode_b, num_modes_b_,
-                      implicit_mode_c.data(), num_modes_c_) == false) {
+      if (CopyModesIf(
+              mode_a, num_modes_a_, mode_b, num_modes_b_, implicit_mode_c.data(), num_modes_c_) ==
+          false) {
         return;
       }
       // we have to copy all non-contracted modes from b over to c
-      if (CopyModesIf(mode_b, num_modes_b_, mode_a, num_modes_a_,
-                      implicit_mode_c.data(), num_modes_c_) == false) {
+      if (CopyModesIf(
+              mode_b, num_modes_b_, mode_a, num_modes_a_, implicit_mode_c.data(), num_modes_c_) ==
+          false) {
         return;
       }
       std::sort(implicit_mode_c.begin(), std::next(implicit_mode_c.begin(), num_modes_c_));
       // modes are sorted w.r.t. lexical order
       implicit_mode_c[num_modes_c_] = '\0';
-      redirect_mode_c = implicit_mode_c.data();
+      redirect_mode_c               = implicit_mode_c.data();
     } else {
       redirect_mode_c = mode_c;
-      num_modes_c_ = num_modes_c;
+      num_modes_c_    = num_modes_c;
     }
 
     for (uint32_t i = 0; i < num_modes_a_; i++) {
-      modes_a_[i] = mode_a[num_modes_a_ - i - 1];
+      modes_a_[i]  = mode_a[num_modes_a_ - i - 1];
       extent_a_[i] = a_shape[num_modes_a_ - i - 1];
     }
     for (uint32_t i = 0; i < num_modes_b_; i++) {
-      modes_b_[i] = mode_b[num_modes_b_ - i - 1];
+      modes_b_[i]  = mode_b[num_modes_b_ - i - 1];
       extent_b_[i] = b_shape[num_modes_b_ - i - 1];
     }
     for (uint32_t i = 0; i < num_modes_c_; i++) {
       const auto mode = redirect_mode_c[num_modes_c_ - i - 1];
-      modes_c_[i] = mode;
-      bool found = false;
-      for (uint32_t j=0; j < num_modes_a_; ++j) {
+      modes_c_[i]     = mode;
+      bool found      = false;
+      for (uint32_t j = 0; j < num_modes_a_; ++j) {
         if (modes_a_[j] == mode) {
           extent_c_[i] = extent_a_[j];
-          found = true;
+          found        = true;
           break;
         }
       }
-      for (uint32_t j=0; !found && j < num_modes_b_; ++j) {
+      for (uint32_t j = 0; !found && j < num_modes_b_; ++j) {
         if (modes_b_[j] == mode) {
           extent_c_[i] = extent_b_[j];
           break;
@@ -202,27 +205,48 @@ struct Einsum {
   }
 
   std::vector<IntType> GetOutputShape() const {
-    if (!is_initialized_) return {};
+    if (!is_initialized_)
+      return {};
     std::vector<IntType> extent_c(num_modes_c_);
-    for (int i=0; i < num_modes_c_; ++i) {
+    for (int i = 0; i < num_modes_c_; ++i) {
       extent_c[i] = extent_c_.at(num_modes_c_ - i - 1);
     }
     return extent_c;
   }
 
-  bool IsInitialized() const { return is_initialized_; }
+  bool IsInitialized() const {
+    return is_initialized_;
+  }
 
-  const int64_t* GetExtentsA() const { return extent_a_.data(); }
-  const int64_t* GetExtentsB() const { return extent_b_.data(); }
-  const int64_t* GetExtentsC() const { return extent_c_.data(); }
+  const int64_t* GetExtentsA() const {
+    return extent_a_.data();
+  }
+  const int64_t* GetExtentsB() const {
+    return extent_b_.data();
+  }
+  const int64_t* GetExtentsC() const {
+    return extent_c_.data();
+  }
 
-  const int* GetModesA() const { return modes_a_.data(); }
-  const int* GetModesB() const { return modes_b_.data(); }
-  const int* GetModesC() const { return modes_c_.data(); }
+  const int* GetModesA() const {
+    return modes_a_.data();
+  }
+  const int* GetModesB() const {
+    return modes_b_.data();
+  }
+  const int* GetModesC() const {
+    return modes_c_.data();
+  }
 
-  int GetNumModesA() const { return num_modes_a_; }
-  int GetNumModesB() const { return num_modes_b_; }
-  int GetNumModesC() const { return num_modes_c_; }
+  int GetNumModesA() const {
+    return num_modes_a_;
+  }
+  int GetNumModesB() const {
+    return num_modes_b_;
+  }
+  int GetNumModesC() const {
+    return num_modes_c_;
+  }
 
  private:
   uint32_t num_modes_a_;
@@ -240,17 +264,15 @@ struct Einsum {
 /*!
  * \brief The Operator used to perform einsum using cuTensor library.
  */
-template<typename DType>
+template <typename DType>
 class CuTensorEinsum {
   STATIC_ASSERT_CUDNN_VERSION_GE(6000);
-  static_assert(CUTENSOR_MAJOR >= 1 && CUTENSOR_MINOR >= 2 &&
-                CUTENSOR_PATCH >= 0, "minimal cuTENSOR 1.2.0 is required.");
+  static_assert(CUTENSOR_MAJOR >= 1 && CUTENSOR_MINOR >= 2 && CUTENSOR_PATCH >= 0,
+                "minimal cuTENSOR 1.2.0 is required.");
 
  public:
-  CuTensorEinsum() {
-  }
-  ~CuTensorEinsum() {
-  }
+  CuTensorEinsum() {}
+  ~CuTensorEinsum() {}
 
   size_t Init(std::string equation,
               const mxnet::ShapeVector& in_shape,
@@ -258,16 +280,16 @@ class CuTensorEinsum {
               const OpContext& ctx,
               size_t prev_workspace_size,
               size_t alignment) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
     CHECK_EQ(in_shape.size(), 2);
     CHECK_EQ(out_shape.size(), 1);
 
-    constexpr cudaDataType_t cudaType = CuTensorTypeTraits<DType>::cudaType;
+    constexpr cudaDataType_t cudaType            = CuTensorTypeTraits<DType>::cudaType;
     constexpr cutensorComputeType_t cutensorType = CuTensorTypeTraits<DType>::cutensorType;
-    constexpr cutensorAlgo_t algo = CUTENSOR_ALGO_DEFAULT;
+    constexpr cutensorAlgo_t algo                = CUTENSOR_ALGO_DEFAULT;
     Einsum<DType, int, kMaxTensorRank> my_einsum(equation, in_shape[0], in_shape[1]);
     if (!my_einsum.IsInitialized()) {
-        CUTENSOR_CALL(CUTENSOR_STATUS_NOT_SUPPORTED);
+      CUTENSOR_CALL(CUTENSOR_STATUS_NOT_SUPPORTED);
     }
 
     cutensorTensorDescriptor_t descriptor_a;
@@ -284,7 +306,8 @@ class CuTensorEinsum {
                                                my_einsum.GetNumModesB(),
                                                my_einsum.GetExtentsB(),
                                                NULL,  // stride
-                                               cudaType, CUTENSOR_OP_IDENTITY));
+                                               cudaType,
+                                               CUTENSOR_OP_IDENTITY));
     cutensorTensorDescriptor_t descriptor_c;
     CUTENSOR_CALL(cutensorInitTensorDescriptor(&s->cutensor_handle_,
                                                &descriptor_c,
@@ -294,34 +317,38 @@ class CuTensorEinsum {
                                                cudaType,
                                                CUTENSOR_OP_IDENTITY));
 
-    CUTENSOR_CALL(cutensorInitContractionDescriptor(
-                  &s->cutensor_handle_,
-                  &descriptor_contraction,
-                  &descriptor_a, my_einsum.GetModesA(), alignment,
-                  &descriptor_b, my_einsum.GetModesB(), alignment,
-                  &descriptor_c, my_einsum.GetModesC(), alignment,
-                  &descriptor_c, my_einsum.GetModesC(), alignment,
-                  cutensorType));
-
-    CUTENSOR_CALL(cutensorInitContractionFind(&s->cutensor_handle_,
-                                              &find, algo));
+    CUTENSOR_CALL(cutensorInitContractionDescriptor(&s->cutensor_handle_,
+                                                    &descriptor_contraction,
+                                                    &descriptor_a,
+                                                    my_einsum.GetModesA(),
+                                                    alignment,
+                                                    &descriptor_b,
+                                                    my_einsum.GetModesB(),
+                                                    alignment,
+                                                    &descriptor_c,
+                                                    my_einsum.GetModesC(),
+                                                    alignment,
+                                                    &descriptor_c,
+                                                    my_einsum.GetModesC(),
+                                                    alignment,
+                                                    cutensorType));
+
+    CUTENSOR_CALL(cutensorInitContractionFind(&s->cutensor_handle_, &find, algo));
 
     if (s->cutensor_cachelines_ != nullptr) {
-        const cutensorAutotuneMode_t autotuneMode = CUTENSOR_AUTOTUNE_INCREMENTAL;
-        CUTENSOR_CALL(cutensorContractionFindSetAttribute(
-                    &s->cutensor_handle_,
-                    &find,
-                    CUTENSOR_CONTRACTION_FIND_AUTOTUNE_MODE,
-                    &autotuneMode,
-                    sizeof(cutensorAutotuneMode_t)));
-
-        const uint32_t incCount = 5;
-        CUTENSOR_CALL(cutensorContractionFindSetAttribute(
-                    &s->cutensor_handle_,
-                    &find,
-                    CUTENSOR_CONTRACTION_FIND_INCREMENTAL_COUNT,
-                    &incCount,
-                    sizeof(uint32_t)));
+      const cutensorAutotuneMode_t autotuneMode = CUTENSOR_AUTOTUNE_INCREMENTAL;
+      CUTENSOR_CALL(cutensorContractionFindSetAttribute(&s->cutensor_handle_,
+                                                        &find,
+                                                        CUTENSOR_CONTRACTION_FIND_AUTOTUNE_MODE,
+                                                        &autotuneMode,
+                                                        sizeof(cutensorAutotuneMode_t)));
+
+      const uint32_t incCount = 5;
+      CUTENSOR_CALL(cutensorContractionFindSetAttribute(&s->cutensor_handle_,
+                                                        &find,
+                                                        CUTENSOR_CONTRACTION_FIND_INCREMENTAL_COUNT,
+                                                        &incCount,
+                                                        sizeof(uint32_t)));
     }
 
     previous_workspace_size = prev_workspace_size * sizeof(DType);
@@ -331,18 +358,15 @@ class CuTensorEinsum {
                                                   CUTENSOR_WORKSPACE_MAX,
                                                   &my_workspace_size));
     if (s->cutensor_cachelines_ == nullptr) {
-        CUTENSOR_CALL(cutensorInitContractionPlan(&s->cutensor_handle_,
-                                              &plan,
-                                              &descriptor_contraction,
-                                              &find,
-                                              my_workspace_size));
+      CUTENSOR_CALL(cutensorInitContractionPlan(
+          &s->cutensor_handle_, &plan, &descriptor_contraction, &find, my_workspace_size));
     }
     return my_workspace_size;
   }
 
-  void Compute(const OpContext &ctx,
-               const std::vector<TBlob> &inputs,
-               const std::vector<TBlob> &outputs,
+  void Compute(const OpContext& ctx,
+               const std::vector<TBlob>& inputs,
+               const std::vector<TBlob>& outputs,
                bool req_write,
                char* workspace) {
     Stream<gpu>* s = ctx.get_stream<gpu>();
@@ -350,64 +374,61 @@ class CuTensorEinsum {
       beta = 1.0;  // kAddTo
     }
     if (s->cutensor_cachelines_ != nullptr) {
-        CUTENSOR_CALL(cutensorInitContractionPlan(&s->cutensor_handle_,
-                                              &plan,
-                                              &descriptor_contraction,
-                                              &find,
-                                              my_workspace_size));
+      CUTENSOR_CALL(cutensorInitContractionPlan(
+          &s->cutensor_handle_, &plan, &descriptor_contraction, &find, my_workspace_size));
     }
-    const TBlob &tensor_a = inputs[0];
-    const TBlob &tensor_b = inputs[1];
-    const TBlob &tensor_c = outputs[0];
-    const DType* tensor_a_ptr =  tensor_a.FlatTo2D<gpu, DType>(s).dptr_;
-    const DType* tensor_b_ptr =  tensor_b.FlatTo2D<gpu, DType>(s).dptr_;
-    DType* tensor_c_ptr =  tensor_c.FlatTo2D<gpu, DType>(s).dptr_;
+    const TBlob& tensor_a     = inputs[0];
+    const TBlob& tensor_b     = inputs[1];
+    const TBlob& tensor_c     = outputs[0];
+    const DType* tensor_a_ptr = tensor_a.FlatTo2D<gpu, DType>(s).dptr_;
+    const DType* tensor_b_ptr = tensor_b.FlatTo2D<gpu, DType>(s).dptr_;
+    DType* tensor_c_ptr       = tensor_c.FlatTo2D<gpu, DType>(s).dptr_;
     char* my_workspace(&workspace[previous_workspace_size]);
     CUTENSOR_CALL(cutensorContraction(&s->cutensor_handle_,
                                       &plan,
                                       reinterpret_cast<void*>(&alpha),
-                                      tensor_a_ptr, tensor_b_ptr,
+                                      tensor_a_ptr,
+                                      tensor_b_ptr,
                                       reinterpret_cast<void*>(&beta),
-                                      tensor_c_ptr, tensor_c_ptr,
+                                      tensor_c_ptr,
+                                      tensor_c_ptr,
                                       my_workspace,
                                       my_workspace_size,
                                       s->stream_));
   }
 
   cutensorContractionDescriptor_t descriptor_contraction;  // strucutre of the contraction
-  cutensorContractionPlan_t plan;  // encodes the execution plan
+  cutensorContractionPlan_t plan;                          // encodes the execution plan
   cutensorContractionFind_t find;  // limits the search space (of viable candidates)
 
   // workspace
   size_t previous_workspace_size = 0;
-  size_t my_workspace_size = 0;
-  size_t total_workspace_size = 0;
+  size_t my_workspace_size       = 0;
+  size_t total_workspace_size    = 0;
 
   typename CuTensorTypeTraits<DType>::ScalarType alpha = 1;
-  typename CuTensorTypeTraits<DType>::ScalarType beta = 0;
+  typename CuTensorTypeTraits<DType>::ScalarType beta  = 0;
 };
 // end CuTensorEinsum class
 
-template<typename DType>
+template <typename DType>
 class EinsumOpGPU {
  public:
-  EinsumOpGPU() {
-  }
-  ~EinsumOpGPU() {
-  }
+  EinsumOpGPU() {}
+  ~EinsumOpGPU() {}
 
   void InitCuTensorGrad(std::string equation,
                         const mxnet::ShapeVector& in_shape,
                         const mxnet::ShapeVector& out_shape,
-                        const OpContext &ctx,
+                        const OpContext& ctx,
                         size_t pos_cutensor_op,
                         size_t temp_grad_size_aligned) {
     CHECK_EQ(in_shape.size(), 3U);
     CHECK_EQ(out_shape.size(), 2U);
 
-    int comma_pos = equation.find(",");
-    int arrow_pos = equation.find("->", comma_pos + 1);
-    int len_op2 = arrow_pos - comma_pos - 1;
+    int comma_pos         = equation.find(",");
+    int arrow_pos         = equation.find("->", comma_pos + 1);
+    int len_op2           = arrow_pos - comma_pos - 1;
     const bool isImplicit = (arrow_pos == std::string::npos);
     std::string my_equation;
     if (isImplicit) {
@@ -417,13 +438,13 @@ class EinsumOpGPU {
         CUTENSOR_CALL(CUTENSOR_STATUS_NOT_SUPPORTED);
       }
       const int* modes_c = my_einsum.GetModesC();
-      my_equation = equation;
+      my_equation        = equation;
       my_equation.append("->");
       for (int i = my_einsum.GetNumModesC() - 1; i >= 0; --i) {
         my_equation += static_cast<char>(modes_c[i]);
       }
       arrow_pos = my_equation.find("->", comma_pos + 1);
-      len_op2 = arrow_pos - comma_pos - 1;
+      len_op2   = arrow_pos - comma_pos - 1;
     } else {
       my_equation = equation;
     }
@@ -440,14 +461,14 @@ class EinsumOpGPU {
     grad_operand1_equation += "->";
     grad_operand1_equation += my_equation.substr(0, comma_pos);
     bwd_cutensor_ops.push_back(CuTensorEinsum<DType>());
-    size_t req_workspace =
-      bwd_cutensor_ops[pos_cutensor_op].Init(grad_operand1_equation,
-                                             grad_op1_input_shapes,
-                                             grad_op1_output_shapes,
-                                             ctx,
-                                             temp_grad_size_aligned,
-                                             dptr_alignment);
-    if (req_workspace > max_workspace_cutensor) max_workspace_cutensor = req_workspace;
+    size_t req_workspace = bwd_cutensor_ops[pos_cutensor_op].Init(grad_operand1_equation,
+                                                                  grad_op1_input_shapes,
+                                                                  grad_op1_output_shapes,
+                                                                  ctx,
+                                                                  temp_grad_size_aligned,
+                                                                  dptr_alignment);
+    if (req_workspace > max_workspace_cutensor)
+      max_workspace_cutensor = req_workspace;
 
     // gradient for second operand
     mxnet::ShapeVector grad_op2_input_shapes;
@@ -461,14 +482,14 @@ class EinsumOpGPU {
     grad_operand2_equation += "->";
     grad_operand2_equation += my_equation.substr(comma_pos + 1, len_op2);
     bwd_cutensor_ops.push_back(CuTensorEinsum<DType>());
-    req_workspace =
-      bwd_cutensor_ops[pos_cutensor_op+1].Init(grad_operand2_equation,
-                                               grad_op2_input_shapes,
-                                               grad_op2_output_shapes,
-                                               ctx,
-                                               temp_grad_size_aligned,
-                                               dptr_alignment);
-    if (req_workspace > max_workspace_cutensor) max_workspace_cutensor = req_workspace;
+    req_workspace = bwd_cutensor_ops[pos_cutensor_op + 1].Init(grad_operand2_equation,
+                                                               grad_op2_input_shapes,
+                                                               grad_op2_output_shapes,
+                                                               ctx,
+                                                               temp_grad_size_aligned,
+                                                               dptr_alignment);
+    if (req_workspace > max_workspace_cutensor)
+      max_workspace_cutensor = req_workspace;
   }
 
   void Init(const EinsumOp& state,
@@ -478,9 +499,9 @@ class EinsumOpGPU {
             const OpContext& ctx,
             bool is_backward) {
     if (!is_backward) {
-      std::vector<std::vector<int> > pos;
+      std::vector<std::vector<int>> pos;
       std::string string_repr;
-      mypaths = einsum_path(state.subscripts, inputs, true, ctx.run_ctx, &pos, &string_repr);
+      mypaths   = einsum_path(state.subscripts, inputs, true, ctx.run_ctx, &pos, &string_repr);
       paths_len = mypaths.size();
       max_workspace_cutensor = 0;
       mxnet::ShapeVector operands_shape(in_shape);
@@ -500,17 +521,15 @@ class EinsumOpGPU {
         }
         fwd_cutensor_ops.push_back(CuTensorEinsum<DType>());
         if (mypaths[i].do_cutensor) {
-          size_t req_workspace = fwd_cutensor_ops[i].Init(mypaths[i].einsum_str,
-                                                          tmp_in_shape,
-                                                          tmp_out_shape,
-                                                          ctx,
-                                                          0, dptr_alignment);
+          size_t req_workspace = fwd_cutensor_ops[i].Init(
+              mypaths[i].einsum_str, tmp_in_shape, tmp_out_shape, ctx, 0, dptr_alignment);
 
-          if (req_workspace > max_workspace_cutensor) max_workspace_cutensor = req_workspace;
+          if (req_workspace > max_workspace_cutensor)
+            max_workspace_cutensor = req_workspace;
         }
         if (i != paths_len - 1) {
-          size_t new_aligned_mem_required = RoundToMultiple(mypaths[i].oshape.Size(),
-                                                            dptr_alignment, sizeof(DType));
+          size_t new_aligned_mem_required =
+              RoundToMultiple(mypaths[i].oshape.Size(), dptr_alignment, sizeof(DType));
           temp_ouputs_size_aligned += new_aligned_mem_required;
         }
         if (!handle_out) {
@@ -521,15 +540,14 @@ class EinsumOpGPU {
       // backward
       std::vector<TBlob> temp_inputs;  // inputs ignoring grad
       for (int i = 1; i < inputs.size(); ++i) {
-          temp_inputs.push_back(inputs[i]);
+        temp_inputs.push_back(inputs[i]);
       }
-      std::vector<std::vector<int> > pos;
+      std::vector<std::vector<int>> pos;
       std::string string_repr;
-      mypaths = einsum_path(state.subscripts, temp_inputs, true,
-                            ctx.run_ctx, &pos, &string_repr);
-      max_workspace_cutensor = 0;
+      mypaths = einsum_path(state.subscripts, temp_inputs, true, ctx.run_ctx, &pos, &string_repr);
+      max_workspace_cutensor     = 0;
       size_t pos_cutensor_bwd_op = 0;
-      paths_len = mypaths.size();
+      paths_len                  = mypaths.size();
       // replay the forward process
       bwd_op_idx.resize(paths_len + 1);
       for (int i = 0; i <= paths_len; ++i) {
@@ -549,8 +567,8 @@ class EinsumOpGPU {
       }
       // calculate amount mem for temporal grads
       for (int i = 0; i + 1 < paths_len; ++i) {
-        size_t new_aligned_mem_required = RoundToMultiple(mypaths[i].oshape.Size(),
-                                                          dptr_alignment, sizeof(DType));
+        size_t new_aligned_mem_required =
+            RoundToMultiple(mypaths[i].oshape.Size(), dptr_alignment, sizeof(DType));
         temp_grads_offsets.push_back(new_aligned_mem_required);
         temp_grads_size_aligned += new_aligned_mem_required;
       }
@@ -581,23 +599,24 @@ class EinsumOpGPU {
 
         if (mypaths[i].do_cutensor) {
           InitCuTensorGrad(mypaths[i].einsum_str,
-                           temp_in_shape, temp_out_shape,
-                           ctx, pos_cutensor_bwd_op,
+                           temp_in_shape,
+                           temp_out_shape,
+                           ctx,
+                           pos_cutensor_bwd_op,
                            temp_grads_size_aligned);
           pos_cutensor_bwd_op = pos_cutensor_bwd_op + 2;
         }
       }
-      total_workspace = max_workspace_cutensor/sizeof(DType) +
-                        temp_grads_size_aligned;
+      total_workspace = max_workspace_cutensor / sizeof(DType) + temp_grads_size_aligned;
     }
   }
 
   void Forward(const EinsumOp& state,
-               const OpContext &ctx,
-               const std::vector<TBlob> &inputs,
+               const OpContext& ctx,
+               const std::vector<TBlob>& inputs,
                const std::vector<TBlob>& outputs) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-    auto req = kWriteTo;
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    auto req                = kWriteTo;
     // cuTensor workspace
     Tensor<gpu, 1, char> cutensor_workspace =
         ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(max_workspace_cutensor), s);
@@ -608,12 +627,12 @@ class EinsumOpGPU {
     // temporal space shared with backward: stateful
     std::vector<TBlob> temp_space_vec(paths_len - 1);
     Tensor<gpu, 1, DType> temp_space = state.tempspace->data().FlatTo1D<gpu, DType>();
-    size_t begin = 0;
+    size_t begin                     = 0;
     for (int i = 0; i < paths_len - 1; ++i) {
-      TBlob tblob = TBlob(temp_space.Slice(begin, begin + mypaths[i].oshape.Size()));
+      TBlob tblob       = TBlob(temp_space.Slice(begin, begin + mypaths[i].oshape.Size()));
       temp_space_vec[i] = tblob.reshape(mypaths[i].oshape);
-      size_t aligned_mem_required = RoundToMultiple(mypaths[i].oshape.Size(),
-                                                    dptr_alignment, sizeof(DType));
+      size_t aligned_mem_required =
+          RoundToMultiple(mypaths[i].oshape.Size(), dptr_alignment, sizeof(DType));
       begin = begin + aligned_mem_required;
     }
     for (int i = 0; i < paths_len; ++i) {
@@ -625,18 +644,20 @@ class EinsumOpGPU {
         operands.erase(operands.begin() + p);
       }
       if (mypaths[i].do_cutensor) {
-        fwd_cutensor_ops[i].Compute(ctx, tmp_operands,
-                                    handle_out ? outputs :
-                                                 std::vector<TBlob>{temp_space_vec[i]},
+        fwd_cutensor_ops[i].Compute(ctx,
+                                    tmp_operands,
+                                    handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
                                     req,
                                     cutensor_workspace.dptr_);
       } else {
         // special cases do not use cuTensor: diagonal, trace,
         // implicit summation, dimension collapse, broadcasting
         NumpyEinsumProcess<gpu, 0>(tmp_operands,
-        std::vector<OpReqType>{OpReqType::kWriteTo},
-        handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
-        mypaths[i].einsum_str.c_str(), tmp_operands.size(), ctx);
+                                   std::vector<OpReqType>{OpReqType::kWriteTo},
+                                   handle_out ? outputs : std::vector<TBlob>{temp_space_vec[i]},
+                                   mypaths[i].einsum_str.c_str(),
+                                   tmp_operands.size(),
+                                   ctx);
       }
       if (!handle_out) {
         operands.push_back(temp_space_vec[i]);
@@ -644,13 +665,13 @@ class EinsumOpGPU {
     }
   }
 
-  void ComputeGradients(const std::string &equation,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<TBlob> &outputs,
-                        const std::vector<OpReqType> &req,
-                        const OpContext &ctx,
+  void ComputeGradients(const std::string& equation,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<TBlob>& outputs,
+                        const std::vector<OpReqType>& req,
+                        const OpContext& ctx,
                         size_t pos_cutensor_op,
-                        Tensor<gpu, 1, DType> *workspace) {
+                        Tensor<gpu, 1, DType>* workspace) {
     char* workspace_ptr = reinterpret_cast<char*>(workspace->dptr_);
     // gradient for first operand
     std::vector<TBlob> grad_operand1_inputs;
@@ -658,52 +679,46 @@ class EinsumOpGPU {
     grad_operand1_inputs.push_back(inputs[0]);
     grad_operand1_inputs.push_back(inputs[2]);
     grad_operand1_outputs.push_back(outputs[0]);
-    bwd_cutensor_ops[pos_cutensor_op].Compute(ctx,
-                                              grad_operand1_inputs,
-                                              grad_operand1_outputs,
-                                              req[0] == kWriteTo,
-                                              workspace_ptr);
+    bwd_cutensor_ops[pos_cutensor_op].Compute(
+        ctx, grad_operand1_inputs, grad_operand1_outputs, req[0] == kWriteTo, workspace_ptr);
     // gradient for second operand
     std::vector<TBlob> grad_operand2_inputs;
     std::vector<TBlob> grad_operand2_outputs;
     grad_operand2_inputs.push_back(inputs[1]);
     grad_operand2_inputs.push_back(inputs[0]);
     grad_operand2_outputs.push_back(outputs[1]);
-    bwd_cutensor_ops[pos_cutensor_op+1].Compute(ctx,
-                                                grad_operand2_inputs,
-                                                grad_operand2_outputs,
-                                                req[1] == kWriteTo,
-                                                workspace_ptr);
+    bwd_cutensor_ops[pos_cutensor_op + 1].Compute(
+        ctx, grad_operand2_inputs, grad_operand2_outputs, req[1] == kWriteTo, workspace_ptr);
   }
 
   void Backward(const EinsumOp& state,
-                const OpContext &ctx,
-                const std::vector<TBlob> &inputs,
+                const OpContext& ctx,
+                const std::vector<TBlob>& inputs,
                 const std::vector<TBlob>& outputs,
-                const std::vector<OpReqType> &req) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-    size_t pos_cutensor_op = 0;
+                const std::vector<OpReqType>& req) {
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    size_t pos_cutensor_op  = 0;
 
     // outputs from forward pass, no need to be re-computed, take from state
     Tensor<gpu, 1, DType> ndarray_space = state.tempspace->data().FlatTo1D<gpu, DType>();
     std::vector<TBlob> temp_data(paths_len - 1);
     size_t begin = 0;
-    for (int i = 0; i < paths_len -1; ++i) {
-      TBlob tblob = TBlob(ndarray_space.Slice(begin, begin + mypaths[i].oshape.Size()));
+    for (int i = 0; i < paths_len - 1; ++i) {
+      TBlob tblob  = TBlob(ndarray_space.Slice(begin, begin + mypaths[i].oshape.Size()));
       temp_data[i] = tblob.reshape(mypaths[i].oshape);
-      size_t aligned_mem_required = RoundToMultiple(mypaths[i].oshape.Size(),
-                                                    dptr_alignment, sizeof(DType));
+      size_t aligned_mem_required =
+          RoundToMultiple(mypaths[i].oshape.Size(), dptr_alignment, sizeof(DType));
       begin = begin + aligned_mem_required;
     }
     // workspace (temporal grad + cuTensor)
     std::vector<TBlob> temp_grad(paths_len - 1);
     Tensor<gpu, 1, DType> temp_space =
-      ctx.requested[0].get_space_typed<gpu, 1, DType>(Shape1(total_workspace), s);
+        ctx.requested[0].get_space_typed<gpu, 1, DType>(Shape1(total_workspace), s);
     begin = 0;
     for (int i = 0; i < paths_len - 1; ++i) {
-      TBlob tblob = TBlob(temp_space.Slice(begin, begin + mypaths[i].oshape.Size()));
+      TBlob tblob  = TBlob(temp_space.Slice(begin, begin + mypaths[i].oshape.Size()));
       temp_grad[i] = tblob.reshape(mypaths[i].oshape);
-      begin = begin + temp_grads_offsets[i];
+      begin        = begin + temp_grads_offsets[i];
     }
     // go through the paths in the reversed order
     std::vector<TBlob> temp_inputs, temp_outputs;
@@ -737,14 +752,19 @@ class EinsumOpGPU {
 
       if (mypaths[i].do_cutensor) {
         ComputeGradients(mypaths[i].einsum_str,
-                         temp_inputs, temp_outputs, temp_req,
-                         ctx, pos_cutensor_op,
+                         temp_inputs,
+                         temp_outputs,
+                         temp_req,
+                         ctx,
+                         pos_cutensor_op,
                          &temp_space);
         pos_cutensor_op = pos_cutensor_op + 2;
       } else {
         // special cases do not use cuTensor: diagonal, trace,
         // implicit summation, dimension collapse, broadcasting
-        NumpyEinsumProcess<gpu, 1>(temp_inputs, temp_req, temp_outputs,
+        NumpyEinsumProcess<gpu, 1>(temp_inputs,
+                                   temp_req,
+                                   temp_outputs,
                                    mypaths[i].einsum_str.c_str(),
                                    temp_outputs.size(),
                                    ctx);
@@ -756,32 +776,32 @@ class EinsumOpGPU {
   // cutensor ops for the forward and backward passs:
   std::vector<CuTensorEinsum<DType>> fwd_cutensor_ops;
   std::vector<CuTensorEinsum<DType>> bwd_cutensor_ops;
-  std::vector<std::vector<int> > bwd_op_idx;
+  std::vector<std::vector<int>> bwd_op_idx;
 
-  const size_t dptr_alignment = 128;
+  const size_t dptr_alignment     = 128;
   size_t temp_ouputs_size_aligned = 0;  // temporal outputs saved in FWD
-  size_t temp_grads_size_aligned = 0;
+  size_t temp_grads_size_aligned  = 0;
   std::vector<size_t> temp_grads_offsets;
   size_t max_workspace_cutensor = 0;
-  size_t total_workspace = 0;
+  size_t total_workspace        = 0;
 };
 
 typedef ParamOpSign<EinsumOp> EinsumSignature;
-template<typename DType>
+template <typename DType>
 static EinsumOpGPU<DType>& GetEinsumOpGPU(const EinsumOp& state,
                                           const std::vector<TBlob>& inputs,
                                           const std::vector<TBlob>& outputs,
-                                          const std::vector<OpReqType> &req,
+                                          const std::vector<OpReqType>& req,
                                           const OpContext& ctx,
                                           bool is_backward) {
 #if DMLC_CXX11_THREAD_LOCAL
-  static thread_local std::unordered_map<EinsumSignature,
-                                         std::shared_ptr<EinsumOpGPU<DType> >,
-                                         OpHash> ops;
+  static thread_local std::
+      unordered_map<EinsumSignature, std::shared_ptr<EinsumOpGPU<DType>>, OpHash>
+          ops;
 #else
-  static MX_THREAD_LOCAL std::unordered_map<EinsumSignature,
-                                            std::shared_ptr<EinsumOpGPU<DType> >,
-                                            OpHash> ops;
+  static MX_THREAD_LOCAL
+      std::unordered_map<EinsumSignature, std::shared_ptr<EinsumOpGPU<DType>>, OpHash>
+          ops;
 #endif
   mxnet::ShapeVector in_shape(inputs.size());
   mxnet::ShapeVector out_shape(outputs.size());
@@ -791,14 +811,13 @@ static EinsumOpGPU<DType>& GetEinsumOpGPU(const EinsumOp& state,
     out_shape[i] = outputs[i].shape_;
   EinsumSignature key(state);
   size_t ndim = 0;
-  for (auto &s : in_shape)
+  for (auto& s : in_shape)
     ndim += s.ndim();
-  for (auto &s : out_shape)
+  for (auto& s : out_shape)
     ndim += s.ndim();
-  key.Reserve(ndim +  // for in and out shapes
-              1 +  // for dev_id
-              req.size() +
-              1);  // for is_backward
+  key.Reserve(ndim +            // for in and out shapes
+              1 +               // for dev_id
+              req.size() + 1);  // for is_backward
   key.AddSign(in_shape);
   key.AddSign(out_shape);
   key.AddSign(ctx.run_ctx.ctx.dev_id);
@@ -810,13 +829,11 @@ static EinsumOpGPU<DType>& GetEinsumOpGPU(const EinsumOp& state,
   auto it = ops.find(key);
   if (it == ops.end()) {
     std::shared_ptr<EinsumOpGPU<DType>> op(new EinsumOpGPU<DType>());
-    auto ins_ret = ops.insert(std::pair<EinsumSignature, std::shared_ptr<EinsumOpGPU<DType>>>(
-                              key, op));
+    auto ins_ret =
+        ops.insert(std::pair<EinsumSignature, std::shared_ptr<EinsumOpGPU<DType>>>(key, op));
     CHECK(ins_ret.second);
     it = ins_ret.first;
-    it->second->Init(state, inputs,
-                     in_shape, out_shape,
-                     ctx, is_backward);
+    it->second->Init(state, inputs, in_shape, out_shape, ctx, is_backward);
   }
   return *it->second;
 }
@@ -825,19 +842,22 @@ bool IsCutensorCompatible(const EinsumOp state,
                           const std::vector<TBlob>& inputs,
                           const std::vector<TBlob>& outputs,
                           const OpContext& ctx) {
-  if (state.num_args <= 1) return false;
+  if (state.num_args <= 1)
+    return false;
   for (size_t i = 0; i < inputs.size(); i++) {
     if (!_tensordot_type_check(inputs[i].type_flag_, ctx.run_ctx))
       return false;
     for (size_t j = 0; j < inputs[i].ndim(); j++) {
-      if (inputs[i].size(j) <= 0) return false;
+      if (inputs[i].size(j) <= 0)
+        return false;
     }
   }
   for (size_t i = 0; i < outputs.size(); i++) {
     if (!_tensordot_type_check(outputs[i].type_flag_, ctx.run_ctx))
       return false;
     for (size_t j = 0; j < outputs[i].ndim(); j++) {
-      if (outputs[i].size(j) <= 0) return false;
+      if (outputs[i].size(j) <= 0)
+        return false;
     }
   }
   return true;
@@ -852,17 +872,16 @@ inline void NumpyEinsumForwardGpu(const OpStatePtr& state_ptr,
 #if MXNET_USE_CUTENSOR == 1
   // cutensor only available for compute capability larger or equal to 6.0
   STATIC_ASSERT_CUDNN_VERSION_GE(6000);
-  EinsumOp& state = state_ptr.get_state<EinsumOp>();
+  EinsumOp& state   = state_ptr.get_state<EinsumOp>();
   bool use_cutensor = IsCutensorCompatible(state, inputs, outputs, ctx);
   if (!use_cutensor) {
     NumpyEinsumForward<gpu>(state_ptr, ctx, inputs, req, outputs);
   } else {
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      EinsumOpGPU<DType> &op = GetEinsumOpGPU<DType>
-          (state, inputs, outputs,
-           req, ctx, false);
+      EinsumOpGPU<DType>& op = GetEinsumOpGPU<DType>(state, inputs, outputs, req, ctx, false);
       state.tempspace.reset<NDArray>(new NDArray(TShape(Shape1(op.temp_ouputs_size_aligned)),
-                                                 ctx.run_ctx.ctx, false,
+                                                 ctx.run_ctx.ctx,
+                                                 false,
                                                  outputs[0].type_flag_));
       op.Forward(state, ctx, inputs, outputs);
     });
@@ -881,14 +900,12 @@ inline void NumpyEinsumBackwardGpu(const OpStatePtr& state_ptr,
   // cutensor only available for compute capability larger or equal to 6.0
   STATIC_ASSERT_CUDNN_VERSION_GE(6000);
   const EinsumOp& state = state_ptr.get_state<EinsumOp>();
-  bool use_cutensor = IsCutensorCompatible(state, inputs, outputs, ctx);
+  bool use_cutensor     = IsCutensorCompatible(state, inputs, outputs, ctx);
   if (!use_cutensor) {
     NumpyEinsumBackward<gpu>(state_ptr, ctx, inputs, req, outputs);
   } else {
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      EinsumOpGPU<DType> &op = GetEinsumOpGPU<DType>
-          (state, inputs, outputs,
-           req, ctx, true);
+      EinsumOpGPU<DType>& op = GetEinsumOpGPU<DType>(state, inputs, outputs, req, ctx, true);
       op.Backward(state, ctx, inputs, outputs, req);
     });
   }
@@ -898,10 +915,10 @@ inline void NumpyEinsumBackwardGpu(const OpStatePtr& state_ptr,
 }
 
 NNVM_REGISTER_OP(_npi_einsum)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", NumpyEinsumForwardGpu);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", NumpyEinsumForwardGpu);
 
 NNVM_REGISTER_OP(_backward_npi_einsum)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", NumpyEinsumBackwardGpu);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", NumpyEinsumBackwardGpu);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_einsum_path_op-inl.h b/src/operator/numpy/np_einsum_path_op-inl.h
index b58b25cb4e95..bfdf081c5352 100644
--- a/src/operator/numpy/np_einsum_path_op-inl.h
+++ b/src/operator/numpy/np_einsum_path_op-inl.h
@@ -20,7 +20,7 @@
 /*
  * Copyright (c) 2005-2019, NumPy Developers.
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
  * met:
@@ -95,8 +95,7 @@ struct Step {
   Tuple<int> left_pos, right_pos;
 };
 
-inline size_t _compute_size_by_dict(const std::string& indices,
-                                    const dim_t idx_dict[]) {
+inline size_t _compute_size_by_dict(const std::string& indices, const dim_t idx_dict[]) {
   size_t ret = 1;
   for (const char& c : indices) {
     ret *= idx_dict[static_cast<int>(c)];
@@ -104,8 +103,7 @@ inline size_t _compute_size_by_dict(const std::string& indices,
   return ret;
 }
 
-inline size_t _compute_size_by_dict(const std::bitset<MAXAXIS>& indices,
-                                    const dim_t idx_dict[]) {
+inline size_t _compute_size_by_dict(const std::bitset<MAXAXIS>& indices, const dim_t idx_dict[]) {
   size_t ret = 1;
   for (int i = 0; i < MAXAXIS; ++i) {
     if (indices[i]) {
@@ -120,7 +118,7 @@ inline int64_t _flop_count(const std::string& idx_contraction,
                            int num_terms,
                            const dim_t size_dictionary[]) {
   size_t overall_size = _compute_size_by_dict(idx_contraction, size_dictionary);
-  int op_factor = std::max(1, num_terms - 1);
+  int op_factor       = std::max(1, num_terms - 1);
   if (inner) {
     ++op_factor;
   }
@@ -132,7 +130,7 @@ inline int64_t _flop_count(const std::bitset<MAXAXIS>& idx_contraction,
                            int num_terms,
                            const dim_t size_dictionary[]) {
   size_t overall_size = _compute_size_by_dict(idx_contraction, size_dictionary);
-  int op_factor = std::max(1, num_terms - 1);
+  int op_factor       = std::max(1, num_terms - 1);
   if (inner) {
     ++op_factor;
   }
@@ -153,7 +151,7 @@ inline Contraction _find_contraction(const std::vector<int>& positions,
       idx_remain |= input_sets[i];
     }
   }
-  ret.new_result = idx_remain & ret.idx_contract;
+  ret.new_result  = idx_remain & ret.idx_contract;
   ret.idx_removed = (ret.idx_contract & ~ret.new_result);
   ret.remaining.push_back(ret.new_result);
 
@@ -184,8 +182,8 @@ inline int _parse_possible_contraction(const std::vector<int>& positions,
   }
   int64_t remove_size = static_cast<int64_t>(old_sizes) - static_cast<int64_t>(new_size);
 
-  int64_t cost = _flop_count(contract.idx_contract, contract.idx_removed.any(),
-                             positions.size(), idx_dict);
+  int64_t cost =
+      _flop_count(contract.idx_contract, contract.idx_removed.any(), positions.size(), idx_dict);
   ret->cost[0] = -remove_size;
   ret->cost[1] = cost;
 
@@ -195,13 +193,12 @@ inline int _parse_possible_contraction(const std::vector<int>& positions,
   }
 
   // Add contraction to possible choices
-  ret->positions = positions;
+  ret->positions      = positions;
   ret->new_input_sets = contract.remaining;
   return 0;
 }
 
-inline void _update_other_results(std::vector<Alternative>* results,
-                                  const Alternative& best) {
+inline void _update_other_results(std::vector<Alternative>* results, const Alternative& best) {
   const std::vector<int>& best_con = best.positions;
   int bx = best_con[0], by = best_con[1];
   size_t size = results->size();
@@ -216,12 +213,11 @@ inline void _update_other_results(std::vector<Alternative>* results,
     }
 
     // Update the input_sets
-    CHECK_GT(by, bx)
-      << "by must be greater than bx";
-    results->at(i).new_input_sets.erase(results->at(i).new_input_sets.begin() +
-                                        by - static_cast<int>(by > x) - static_cast<int>(by > y));
-    results->at(i).new_input_sets.erase(results->at(i).new_input_sets.begin() +
-                                        bx - static_cast<int>(bx > x) - static_cast<int>(bx > y));
+    CHECK_GT(by, bx) << "by must be greater than bx";
+    results->at(i).new_input_sets.erase(results->at(i).new_input_sets.begin() + by -
+                                        static_cast<int>(by > x) - static_cast<int>(by > y));
+    results->at(i).new_input_sets.erase(results->at(i).new_input_sets.begin() + bx -
+                                        static_cast<int>(bx > x) - static_cast<int>(bx > y));
     results->at(i).new_input_sets.push_back(best.new_input_sets.back());
 
     // Update the position indices
@@ -234,7 +230,7 @@ inline std::vector<std::vector<int> > _greedy_path(const SetVector* input_sets,
                                                    const std::bitset<MAXAXIS>& output_set,
                                                    const dim_t idx_dict[],
                                                    size_t memory_limit) {
-  int isize = static_cast<int>(input_sets->size());
+  int isize         = static_cast<int>(input_sets->size());
   int iteration_num = isize;
   // Handle trivial cases that leaked through
   if (isize == 1) {
@@ -249,8 +245,8 @@ inline std::vector<std::vector<int> > _greedy_path(const SetVector* input_sets,
     range[i] = i;
   }
   Contraction contract = _find_contraction(range, *input_sets, output_set);
-  int64_t naive_cost = _flop_count(contract.idx_contract, contract.idx_removed.any(),
-                                   isize, idx_dict);
+  int64_t naive_cost =
+      _flop_count(contract.idx_contract, contract.idx_removed.any(), isize, idx_dict);
 
   // Initially iterate over all pairs
   std::vector<Alternative> known_contractions;
@@ -283,20 +279,20 @@ inline std::vector<std::vector<int> > _greedy_path(const SetVector* input_sets,
       for (int x = 0; x < isize - 1; ++x) {
         int y = isize - 1;
         if (!((input_sets->at(x) & input_sets->at(y)).any())) {
-            continue;
-          }
-          Alternative alternative;
-          int result = _parse_possible_contraction(std::vector<int>{x, y},
-                                                   *input_sets,
-                                                   output_set,
-                                                   idx_dict,
-                                                   memory_limit,
-                                                   path_cost,
-                                                   naive_cost,
-                                                   &alternative);
-          if (result != -1) {
-            known_contractions.push_back(alternative);
-          }
+          continue;
+        }
+        Alternative alternative;
+        int result = _parse_possible_contraction(std::vector<int>{x, y},
+                                                 *input_sets,
+                                                 output_set,
+                                                 idx_dict,
+                                                 memory_limit,
+                                                 path_cost,
+                                                 naive_cost,
+                                                 &alternative);
+        if (result != -1) {
+          known_contractions.push_back(alternative);
+        }
       }
     }
 
@@ -339,13 +335,12 @@ inline std::vector<std::vector<int> > _greedy_path(const SetVector* input_sets,
       if (idx == -1) {
         best_cost[0] = x.cost[0];
         best_cost[1] = x.cost[1];
-        idx = i;
+        idx          = i;
       } else if (x.cost[0] < best_cost[0] ||
-                 (x.cost[0] == best_cost[0] &&
-                  x.cost[1] < best_cost[1])) {
+                 (x.cost[0] == best_cost[0] && x.cost[1] < best_cost[1])) {
         best_cost[0] = x.cost[0];
         best_cost[1] = x.cost[1];
-        idx = i;
+        idx          = i;
       }
     }
     best = known_contractions[idx];
@@ -356,7 +351,7 @@ inline std::vector<std::vector<int> > _greedy_path(const SetVector* input_sets,
     // Next iteration only compute contractions with the new tensor
     // All other contractions have been accounted for
     input_sets = &best.new_input_sets;
-    isize = static_cast<int>(input_sets->size());
+    isize      = static_cast<int>(input_sets->size());
 
     // Update path and total cost
     ret.push_back(best.positions);
@@ -378,7 +373,7 @@ inline bool _can_dot(const std::vector<std::string>& inputs,
     return false;
   }
 
-  const std::string& input_left = inputs[0];
+  const std::string& input_left  = inputs[0];
   const std::string& input_right = inputs[1];
 
   if (input_left.size() == 0 || input_right.size() == 0) {
@@ -412,9 +407,9 @@ inline bool _can_dot(const std::vector<std::string>& inputs,
   for (const char& c : input_right) {
     set_right.set(c);
   }
-  std::bitset<MAXAXIS> keep_left = set_left & ~idx_removed;
+  std::bitset<MAXAXIS> keep_left  = set_left & ~idx_removed;
   std::bitset<MAXAXIS> keep_right = set_right & ~idx_removed;
-  size_t rs = idx_removed.count();
+  size_t rs                       = idx_removed.count();
 
   // At this point we are a DOT, GEMV, or GEMM operation
 
@@ -431,30 +426,22 @@ inline bool _can_dot(const std::vector<std::string>& inputs,
   // Handle the 4 possible (aligned) GEMV or GEMM cases
 
   // GEMM or GEMV no transpose
-  if (std::equal(input_left.end() - rs,
-                 input_left.end(),
-                 input_right.begin())) {
+  if (std::equal(input_left.end() - rs, input_left.end(), input_right.begin())) {
     return true;
   }
 
   // GEMM or GEMV transpose both
-  if (std::equal(input_left.begin(),
-                 input_left.begin() + rs,
-                 input_right.end() - rs)) {
+  if (std::equal(input_left.begin(), input_left.begin() + rs, input_right.end() - rs)) {
     return true;
   }
 
   // GEMM or GEMV transpose right
-  if (std::equal(input_left.end() - rs,
-                 input_left.end(),
-                 input_right.end() - rs)) {
+  if (std::equal(input_left.end() - rs, input_left.end(), input_right.end() - rs)) {
     return true;
   }
 
   // GEMM or GEMV transpose left
-  if (std::equal(input_left.begin(),
-                 input_left.begin() + rs,
-                 input_right.begin())) {
+  if (std::equal(input_left.begin(), input_left.begin() + rs, input_right.begin())) {
     return true;
   }
 
@@ -468,14 +455,14 @@ inline bool _can_dot(const std::vector<std::string>& inputs,
 }
 
 #if MXNET_USE_CUTENSOR == 1
-inline bool check_cutensor_indices(const std::string &indices,
+inline bool check_cutensor_indices(const std::string& indices,
                                    const TShape& shape,
-                                   std::unordered_map<char, int> *count,
-                                   std::unordered_map<char, int> *countAll,
-                                   std::unordered_map<char, dim_t> *extents) {
+                                   std::unordered_map<char, int>* count,
+                                   std::unordered_map<char, int>* countAll,
+                                   std::unordered_map<char, dim_t>* extents) {
   for (int i = 0; i < indices.size(); i++) {
     const char c = indices[i];
-    auto pos = count->find(c);
+    auto pos     = count->find(c);
     if (pos != count->end()) {
       // don't allow duplicated incides inside of the same tensor
       return false;
@@ -499,7 +486,7 @@ inline bool check_cutensor_indices(const std::string &indices,
       }
     } else {
       (*countAll)[c] = 1;
-      (*extents)[c] = shape[i];
+      (*extents)[c]  = shape[i];
     }
   }
   return true;
@@ -512,7 +499,7 @@ inline bool _can_cutensor(const std::vector<std::string>& inputs,
   if (inputs.size() != 2) {
     return false;
   }
-  const std::string& input_left = inputs[0];
+  const std::string& input_left  = inputs[0];
   const std::string& input_right = inputs[1];
   if (input_left.size() == 0 || input_right.size() == 0) {
     return false;
@@ -534,9 +521,8 @@ inline bool _can_cutensor(const std::vector<std::string>& inputs,
 }
 #endif
 
-inline int _count_substring(const std::string& str,
-                            const std::string& sub) {
-  int count = 0;
+inline int _count_substring(const std::string& str, const std::string& sub) {
+  int count                  = 0;
   std::string::size_type pos = 0;
   while ((pos = str.find(sub, pos)) != std::string::npos) {
     ++count;
@@ -563,9 +549,8 @@ inline std::string set2str(const std::bitset<MAXAXIS>& set) {
   return ret;
 }
 
-inline std::vector<std::string> split(const std::string& str,
-                                      const std::string& sub) {
-  std::string::size_type pos = 0;
+inline std::vector<std::string> split(const std::string& str, const std::string& sub) {
+  std::string::size_type pos   = 0;
   std::string::size_type start = 0;
   std::vector<std::string> ret;
   while ((pos = str.find(sub, start)) != std::string::npos) {
@@ -576,18 +561,15 @@ inline std::vector<std::string> split(const std::string& str,
   return ret;
 }
 
-inline std::vector<std::string> _parse_einsum_input(
-  std::string subscripts,
-  const std::vector<TBlob>& operands) {
-  const std::string einsum_symbols =
-    "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
+inline std::vector<std::string> _parse_einsum_input(std::string subscripts,
+                                                    const std::vector<TBlob>& operands) {
+  const std::string einsum_symbols = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
   std::bitset<MAXAXIS> einsum_symbols_set;
   for (const char& c : einsum_symbols) {
     einsum_symbols_set.set(c);
   }
 
-  CHECK_NE(operands.size(), 0U)
-    << "No input operands";
+  CHECK_NE(operands.size(), 0U) << "No input operands";
 
   auto end_pos = std::remove(subscripts.begin(), subscripts.end(), ' ');
   subscripts.erase(end_pos, subscripts.end());
@@ -597,33 +579,28 @@ inline std::vector<std::string> _parse_einsum_input(
     if (c == '.' || c == ',' || c == '-' || c == '>') {
       continue;
     }
-    CHECK(einsum_symbols_set.test(c))
-      << "Character " << c
-      << " is not a valid symbol.";
+    CHECK(einsum_symbols_set.test(c)) << "Character " << c << " is not a valid symbol.";
   }
 
   // Check for proper "->"
-  if (subscripts.find('-') != std::string::npos ||
-      subscripts.find('>') != std::string::npos) {
+  if (subscripts.find('-') != std::string::npos || subscripts.find('>') != std::string::npos) {
     bool invalid = (std::count(subscripts.begin(), subscripts.end(), '-') > 1 ||
                     std::count(subscripts.begin(), subscripts.end(), '>') > 1);
     CHECK(!invalid && _count_substring(subscripts, "->") == 1)
-      << "Subscripts can only contain one '->'.";
+        << "Subscripts can only contain one '->'.";
   }
 
   // Parse ellipses
   if (subscripts.find('.') != std::string::npos) {
     std::string used = subscripts;
-    used.erase(std::remove_if(used.begin(),
-                              used.end(),
-                              [](const char& c){return c == '.' ||
-                                                       c == ',' ||
-                                                       c == '-' ||
-                                                       c == '>';}),
-               used.end());
+    used.erase(
+        std::remove_if(used.begin(),
+                       used.end(),
+                       [](const char& c) { return c == '.' || c == ',' || c == '-' || c == '>'; }),
+        used.end());
 
     std::bitset<MAXAXIS> used_set = str2set(used);
-    std::string ellipse_inds = "";
+    std::string ellipse_inds      = "";
     for (const char& c : einsum_symbols) {
       if (!used_set.test(static_cast<int>(c))) {
         ellipse_inds.append(1, c);
@@ -636,24 +613,22 @@ inline std::vector<std::string> _parse_einsum_input(
 
     if (subscripts.find("->") != std::string::npos) {
       std::vector<std::string> tmp = split(subscripts, "->");
-      input_tmp = tmp[0];
-      output_sub = tmp[1];
-      split_subscripts = split(input_tmp, ",");
-      out_sub = true;
+      input_tmp                    = tmp[0];
+      output_sub                   = tmp[1];
+      split_subscripts             = split(input_tmp, ",");
+      out_sub                      = true;
     } else {
       split_subscripts = split(subscripts, ",");
-      out_sub = false;
+      out_sub          = false;
     }
 
     size_t size_split_subscripts = split_subscripts.size();
-    subscripts = "";
+    subscripts                   = "";
     for (size_t i = 0; i < size_split_subscripts; ++i) {
       const std::string& sub = split_subscripts[i];
       if (sub.find('.') != std::string::npos) {
-        CHECK_EQ(std::count(sub.begin(), sub.end(), '.'), 3)
-          << "Invalid Ellipses";
-        CHECK_EQ(_count_substring(sub, "..."), 1)
-          << "Invalid Ellipses";
+        CHECK_EQ(std::count(sub.begin(), sub.end(), '.'), 3) << "Invalid Ellipses";
+        CHECK_EQ(_count_substring(sub, "..."), 1) << "Invalid Ellipses";
 
         // Take into account numerical values
         int ellipse_count = 0;
@@ -668,8 +643,7 @@ inline std::vector<std::string> _parse_einsum_input(
           longest = ellipse_count;
         }
 
-        CHECK_GE(ellipse_count, 0)
-          << "Ellipses lengths do not match.";
+        CHECK_GE(ellipse_count, 0) << "Ellipses lengths do not match.";
         if (ellipse_count == 0) {
           split_subscripts[i].erase(sub.find("..."), 3);
         } else {
@@ -703,9 +677,7 @@ inline std::vector<std::string> _parse_einsum_input(
         if (c == ',') {
           continue;
         }
-        CHECK(einsum_symbols_set.test(c))
-          << "Character " << c
-          << " is not a valid symbol.";
+        CHECK(einsum_symbols_set.test(c)) << "Character " << c << " is not a valid symbol.";
         if ((i == 0 || tmp_subscripts[i - 1] != c) &&
             (i == len_tmp_subscripts - 1 || tmp_subscripts[i + 1] != c) &&
             !out_ellipse_set.test(c)) {
@@ -725,16 +697,14 @@ inline std::vector<std::string> _parse_einsum_input(
     ret[1] = "";
     // Build output subscripts
     std::string tmp_subscripts = subscripts;
-    size_t len_tmp_subscripts = tmp_subscripts.length();
+    size_t len_tmp_subscripts  = tmp_subscripts.length();
     std::sort(tmp_subscripts.begin(), tmp_subscripts.end());
     for (size_t i = 0; i < len_tmp_subscripts; ++i) {
       const char& c = tmp_subscripts[i];
       if (c == ',') {
         continue;
       }
-      CHECK(einsum_symbols_set.test(c))
-        << "Character " << c
-        << " is not a valid symbol.";
+      CHECK(einsum_symbols_set.test(c)) << "Character " << c << " is not a valid symbol.";
       if ((i == 0 || tmp_subscripts[i - 1] != c) &&
           (i == len_tmp_subscripts - 1 || tmp_subscripts[i + 1] != c)) {
         ret[1].append(1, c);
@@ -746,14 +716,13 @@ inline std::vector<std::string> _parse_einsum_input(
   std::bitset<MAXAXIS> input_subscripts_set = str2set(ret[0]);
   for (const char& c : ret[1]) {
     CHECK(input_subscripts_set.test(c))
-      << "Output character " << c
-      << " did not appear in the input";
+        << "Output character " << c << " did not appear in the input";
   }
 
   // Make sure number operands is equivalent to the number of terms
   CHECK_EQ(std::count(ret[0].begin(), ret[0].end(), ',') + 1, operands.size())
-    << "Number of einsum subscripts must be equal to the "
-    << "number of operands.";
+      << "Number of einsum subscripts must be equal to the "
+      << "number of operands.";
 
   return ret;
 }
@@ -779,13 +748,13 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
 
   // Build a few useful list and sets
   std::vector<std::string> input_list = split(parsed_subscripts[0], ",");
-  int isize = static_cast<int>(input_list.size());
+  int isize                           = static_cast<int>(input_list.size());
   SetVector input_sets;
   for (int i = 0; i < isize; ++i) {
     input_sets.push_back(str2set(input_list[i]));
   }
   std::bitset<MAXAXIS> output_set = str2set(parsed_subscripts[1]);
-  std::bitset<MAXAXIS> indices = str2set(parsed_subscripts[0]);
+  std::bitset<MAXAXIS> indices    = str2set(parsed_subscripts[0]);
   indices.set(',', false);
 
   // Get length of each unique dimension and ensure all dimensions are correct
@@ -794,14 +763,13 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
   memset(dimension_dict, -1, sizeof(dimension_dict));
   for (int i = 0; i < isize; ++i) {
     const std::string& term = input_list[i];
-    const TShape& sh = operands[i].shape_;
+    const TShape& sh        = operands[i].shape_;
     CHECK_EQ(sh.ndim(), term.length())
-      << "Einstein sum subscript " << input_list[i]
-      << " does not contain the "
-      << "correct number of indices for operand " << i << ".";
+        << "Einstein sum subscript " << input_list[i] << " does not contain the "
+        << "correct number of indices for operand " << i << ".";
     size_t len_term = term.length();
     for (size_t j = 0; j < len_term; ++j) {
-      dim_t dim = sh[j];
+      dim_t dim     = sh[j];
       const char& c = term[j];
       // Build out broadcast indices
       if (dim == 1) {
@@ -814,11 +782,9 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
           dimension_dict[static_cast<int>(c)] = dim;
         }
         CHECK(dim == 1 || dim == dimension_dict[static_cast<int>(c)])
-          << "Size of label '" << c
-          << "' for operand  " << i
-          << " (" << dimension_dict[static_cast<int>(c)]
-          << ") does not match previous terms ("
-          << dim << ").";
+            << "Size of label '" << c << "' for operand  " << i << " ("
+            << dimension_dict[static_cast<int>(c)] << ") does not match previous terms (" << dim
+            << ").";
       } else {
         dimension_dict[static_cast<int>(c)] = dim;
       }
@@ -830,11 +796,11 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
   size_t max_size = 0, memory_arg;
   for (int i = 0; i < isize; ++i) {
     size_list[i] = _compute_size_by_dict(input_list[i], dimension_dict);
-    max_size = std::max(max_size, size_list[i]);
+    max_size     = std::max(max_size, size_list[i]);
   }
   size_list[isize] = _compute_size_by_dict(parsed_subscripts[1], dimension_dict);
-  max_size = std::max(max_size, size_list[isize]);
-  memory_arg = max_size;
+  max_size         = std::max(max_size, size_list[isize]);
+  memory_arg       = max_size;
 
   // Compute naive cost
   // This isn't quite right, need to look into exactly how einsum does this
@@ -843,7 +809,7 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
     sum_len_input_sets += x.count();
   }
   bool inner_product = (sum_len_input_sets > indices.count());
-  int naive_cost = _flop_count(indices, inner_product, isize, dimension_dict);
+  int naive_cost     = _flop_count(indices, inner_product, isize, dimension_dict);
 
   // Compute the path
   std::vector<std::vector<int> > path;
@@ -870,17 +836,15 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
     std::sort(contract_inds.begin(), contract_inds.end(), std::greater<int>());
 
     Contraction contract = _find_contraction(contract_inds, input_sets, output_set);
-    input_sets = contract.remaining;
+    input_sets           = contract.remaining;
 
-    int64_t cost = _flop_count(contract.idx_contract,
-                           contract.idx_removed.any(),
-                           contract_inds.size(),
-                           dimension_dict);
+    int64_t cost = _flop_count(
+        contract.idx_contract, contract.idx_removed.any(), contract_inds.size(), dimension_dict);
     opt_cost += cost;
     cost_list.push_back(cost);
     scale_list.push_back(contract.idx_contract.count());
     size_list.push_back(_compute_size_by_dict(contract.new_result, dimension_dict));
-    max_i = std::max(max_i, size_list.back());
+    max_i     = std::max(max_i, size_list.back());
     max_scale = std::max(max_scale, scale_list.back());
 
     std::bitset<MAXAXIS> bcast;
@@ -909,17 +873,17 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
       idx_result = parsed_subscripts[1];
     } else {
       idx_result = set2str(contract.new_result);
-      std::sort(idx_result.begin(), idx_result.end(),
-                [&dimension_dict](const char& a, const char& b) -> bool {
-                  return dimension_dict[static_cast<int>(a)] <
-                         dimension_dict[static_cast<int>(b)] ||
-                         (dimension_dict[static_cast<int>(a)] ==
-                         dimension_dict[static_cast<int>(b)] &&
-                         a < b);
-                });
+      std::sort(
+          idx_result.begin(),
+          idx_result.end(),
+          [&dimension_dict](const char& a, const char& b) -> bool {
+            return dimension_dict[static_cast<int>(a)] < dimension_dict[static_cast<int>(b)] ||
+                   (dimension_dict[static_cast<int>(a)] == dimension_dict[static_cast<int>(b)] &&
+                    a < b);
+          });
     }
     int len_idx_result = static_cast<int>(idx_result.length());
-    ret[i].oshape = TShape(len_idx_result, -1);
+    ret[i].oshape      = TShape(len_idx_result, -1);
     for (int j = 0; j < len_idx_result; ++j) {
       ret[i].oshape[j] = dimension_dict[static_cast<int>(idx_result[j])];
     }
@@ -943,21 +907,21 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
 #endif
 
     if (do_blas) {
-      CHECK_EQ(tmp_inputs.size(), 2U)
-        << "BLAS accepts exactly 2 inputs";
+      CHECK_EQ(tmp_inputs.size(), 2U) << "BLAS accepts exactly 2 inputs";
       std::string tensor_result = tmp_inputs[0] + tmp_inputs[1];
       tensor_result.erase(std::remove_if(tensor_result.begin(),
                                          tensor_result.end(),
                                          [&](const char& c) {
-                                           return contract.idx_removed.test(static_cast<int>(c));}),
+                                           return contract.idx_removed.test(static_cast<int>(c));
+                                         }),
                           tensor_result.end());
 
       // Find indices to contract over
       std::vector<int> left_pos, right_pos;
       left_pos.reserve(MAXAXIS);
       right_pos.reserve(MAXAXIS);
-      int tmp[MAXAXIS] = {0};
-      int length_left_input = static_cast<int>(tmp_inputs[0].length());
+      int tmp[MAXAXIS]       = {0};
+      int length_left_input  = static_cast<int>(tmp_inputs[0].length());
       int length_right_input = static_cast<int>(tmp_inputs[1].length());
       for (int j = 0; j < length_right_input; ++j) {
         if (contract.idx_removed.test(static_cast<int>(tmp_inputs[1][j]))) {
@@ -971,14 +935,14 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
         }
       }
       // Calculate left_pos and right_pos
-      ret[i].left_pos = Tuple<int>(left_pos);
+      ret[i].left_pos  = Tuple<int>(left_pos);
       ret[i].right_pos = Tuple<int>(right_pos);
       // Calculate do_einsum
       ret[i].do_einsum = (tensor_result != idx_result);
       // Calculate tshape
       CHECK_EQ(static_cast<int>(tensor_result.length()), len_idx_result)
-        << "tensordot produces dim " << tensor_result.length()
-        << ", while einsum produces dim " << len_idx_result << ".";
+          << "tensordot produces dim " << tensor_result.length() << ", while einsum produces dim "
+          << len_idx_result << ".";
       ret[i].tshape = TShape(len_idx_result, -1);
       for (int j = 0; j < len_idx_result; ++j) {
         ret[i].tshape[j] = dimension_dict[static_cast<int>(tensor_result[j])];
@@ -998,9 +962,9 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
     }
     ret[i].einsum_str += "->" + idx_result;
     ret[i].contract_inds = contract_inds;
-    ret[i].idx_removed = contract.idx_removed;
-    ret[i].input_list = input_list;
-    ret[i].do_blas = do_blas;
+    ret[i].idx_removed   = contract.idx_removed;
+    ret[i].input_list    = input_list;
+    ret[i].do_blas       = do_blas;
   }
 
   if (ret_path == nullptr || ret_string_repr == nullptr) {
@@ -1009,12 +973,12 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
 
   // Return the path along with a nice string representation
   std::string overall_contraction = parsed_subscripts[0] + "->" + parsed_subscripts[1];
-  std::string header[3] = {"scaling", "current", "remaining"};
+  std::string header[3]           = {"scaling", "current", "remaining"};
 
   double speedup = 1.0 * naive_cost / (1.0 * opt_cost);
   std::ostringstream ss;
   ss << "  Complete contraction:  " << overall_contraction << std::endl;
-  ss << "         Naive scaling:  " <<  indices.count() << std::endl;
+  ss << "         Naive scaling:  " << indices.count() << std::endl;
   ss << "     Optimized scaling:  " << max_scale << std::endl;
   ss.precision(3);
   ss << "      Naive FLOP count:  " << std::scientific << naive_cost << std::endl;
@@ -1043,7 +1007,7 @@ inline std::vector<Step> einsum_path(const std::string& subscripts,
     ss << std::setw(40) << remaining_str;
   }
   *ret_string_repr = ss.str();
-  *ret_path = path;
+  *ret_path        = path;
   return ret;
 }
 
diff --git a/src/operator/numpy/np_elemwise_broadcast_logic_op.cc b/src/operator/numpy/np_elemwise_broadcast_logic_op.cc
index 6d3eb7a9a9b9..001cbdc1ecf7 100644
--- a/src/operator/numpy/np_elemwise_broadcast_logic_op.cc
+++ b/src/operator/numpy/np_elemwise_broadcast_logic_op.cc
@@ -38,24 +38,24 @@ namespace op {
 
 #pragma clang diagnostic push
 #pragma clang diagnostic ignored "-Wunused-const-variable"
-static constexpr char func_equal_cpu[] = "equal_cpu";
-static constexpr char func_equal_gpu[] = "equal_gpu";
-static constexpr char func_not_equal_cpu[] = "not_equal_cpu";
-static constexpr char func_not_equal_gpu[] = "not_equal_gpu";
-static constexpr char func_greater_cpu[] = "greater_cpu";
-static constexpr char func_greater_gpu[] = "greater_gpu";
-static constexpr char func_less_cpu[] = "less_cpu";
-static constexpr char func_less_gpu[] = "less_gpu";
+static constexpr char func_equal_cpu[]         = "equal_cpu";
+static constexpr char func_equal_gpu[]         = "equal_gpu";
+static constexpr char func_not_equal_cpu[]     = "not_equal_cpu";
+static constexpr char func_not_equal_gpu[]     = "not_equal_gpu";
+static constexpr char func_greater_cpu[]       = "greater_cpu";
+static constexpr char func_greater_gpu[]       = "greater_gpu";
+static constexpr char func_less_cpu[]          = "less_cpu";
+static constexpr char func_less_gpu[]          = "less_gpu";
 static constexpr char func_greater_equal_cpu[] = "greater_equal_cpu";
 static constexpr char func_greater_equal_gpu[] = "greater_equal_gpu";
-static constexpr char func_less_equal_cpu[] = "less_equal_cpu";
-static constexpr char func_less_equal_gpu[] = "less_equal_gpu";
-static constexpr char func_logical_and_cpu[] = "logical_and_cpu";
-static constexpr char func_logical_and_gpu[] = "logical_and_gpu";
-static constexpr char func_logical_or_cpu[] = "logical_or_cpu";
-static constexpr char func_logical_or_gpu[] = "logical_or_gpu";
-static constexpr char func_logical_xor_cpu[] = "logical_xor_cpu";
-static constexpr char func_logical_xor_gpu[] = "logical_xor_gpu";
+static constexpr char func_less_equal_cpu[]    = "less_equal_cpu";
+static constexpr char func_less_equal_gpu[]    = "less_equal_gpu";
+static constexpr char func_logical_and_cpu[]   = "logical_and_cpu";
+static constexpr char func_logical_and_gpu[]   = "logical_and_gpu";
+static constexpr char func_logical_or_cpu[]    = "logical_or_cpu";
+static constexpr char func_logical_or_gpu[]    = "logical_or_gpu";
+static constexpr char func_logical_xor_cpu[]   = "logical_xor_cpu";
+static constexpr char func_logical_xor_gpu[]   = "logical_xor_gpu";
 #pragma clang diagnostic pop
 
 bool NumpyBinaryLogicOpType(const nnvm::NodeAttrs& attrs,
@@ -63,7 +63,8 @@ bool NumpyBinaryLogicOpType(const nnvm::NodeAttrs& attrs,
                             std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  if (in_attrs->at(0) == -1 && in_attrs->at(1) == -1) return false;
+  if (in_attrs->at(0) == -1 && in_attrs->at(1) == -1)
+    return false;
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kBool);
   return true;
 }
@@ -71,7 +72,8 @@ bool NumpyBinaryLogicOpType(const nnvm::NodeAttrs& attrs,
 TBlob PrependAxes(const TBlob& src, const int dst_ndim) {
   CHECK_LE(src.shape_.ndim(), dst_ndim);
   const int src_ndim = src.shape_.ndim();
-  if (src_ndim == dst_ndim) return src;
+  if (src_ndim == dst_ndim)
+    return src;
   mxnet::TShape dst_shape(dst_ndim, 1);
   for (int i = dst_ndim - src_ndim; i < dst_ndim; ++i) {
     dst_shape[i] = src.shape_[i - dst_ndim + src_ndim];
@@ -90,7 +92,8 @@ struct TVMBinaryBroadcastCompute {
 #if MXNET_USE_TVM_OP
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
-    if (outputs[0].shape_.Size() == 0U) return;  // skip zero-size tensor
+    if (outputs[0].shape_.Size() == 0U)
+      return;  // skip zero-size tensor
 
     // prepare tblobs and TVMArgs
     std::vector<TBlob> tblobs = {inputs[0], inputs[1], outputs[0]};
@@ -110,25 +113,26 @@ struct TVMBinaryBroadcastCompute {
 
 #endif  // MXNET_USE_CUDA
 
-    const int ondim = outputs[0].shape_.ndim();
+    const int ondim       = outputs[0].shape_.ndim();
     const size_t num_args = inputs.size() + outputs.size();
     type_codes.resize(num_args);
     values.resize(num_args);
     for (size_t i = 0; i < num_args; ++i) {
-      tblobs[i] = PrependAxes(tblobs[i], ondim);
-      type_codes[i] = kTVMDLTensorHandle;
+      tblobs[i]          = PrependAxes(tblobs[i], ondim);
+      type_codes[i]      = kTVMDLTensorHandle;
       values[i].v_handle = const_cast<DLTensor*>(&(tblobs[i].dltensor()));
     }
     tvm::runtime::TVMArgs tvm_args(&values[0], &type_codes[0], tblobs.size());
     tvm::runtime::TVMOpModule::Get()->CallEx(func, ctx, tblobs, tvm_args);
 #else
     LOG(FATAL) << "Please add USE_TVM_OP=1 as a compile flag for compiling MXNet source code "
-                  "to enable TVM-generated kernels for operator " << func;
+                  "to enable TVM-generated kernels for operator "
+               << func;
 #endif  // MXNET_USE_TVM_OP
   }
 };
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 struct GetBinaryBroadcastCompute {
   const char* func;
   void operator()(const nnvm::NodeAttrs& attrs,
@@ -139,7 +143,8 @@ struct GetBinaryBroadcastCompute {
 #if MXNET_USE_TVM_OP
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
-    if (outputs[0].shape_.Size() == 0U) return;  // skip zero-size tensor
+    if (outputs[0].shape_.Size() == 0U)
+      return;  // skip zero-size tensor
 
     // prepare tblobs and TVMArgs
     std::vector<TBlob> tblobs = {inputs[0], inputs[1], outputs[0]};
@@ -149,28 +154,36 @@ struct GetBinaryBroadcastCompute {
     const TBlob& a = inputs[0];
     const TBlob& b = inputs[1];
     if (a.type_flag_ != b.type_flag_) {
-      if (outputs[0].shape_.Size() == 0U) return;
+      if (outputs[0].shape_.Size() == 0U)
+        return;
       mxnet::TShape new_lshape, new_rshape, new_oshape;
       const TBlob& lhs = inputs[0];
       const TBlob& rhs = inputs[1];
       const TBlob& out = outputs[0];
-      int ndim = BinaryBroadcastShapeCompact(lhs.shape_, rhs.shape_, out.shape_,
-                                            &new_lshape, &new_rshape, &new_oshape);
+      int ndim         = BinaryBroadcastShapeCompact(
+          lhs.shape_, rhs.shape_, out.shape_, &new_lshape, &new_rshape, &new_oshape);
       if (!ndim) {
         ElemwiseBinaryOp::ComputeLogic<xpu, OP>(attrs, ctx, inputs, req, outputs);
       } else {
-        if (req[0] == kNullOp) return;
-        mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+        if (req[0] == kNullOp)
+          return;
+        mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
         MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(lhs.type_flag_, DType, {
           MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(rhs.type_flag_, EType, {
             BROADCAST_NDIM_SWITCH(ndim, NDim, {
-              mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+              mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
               mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
               mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-              template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-                                lhs.dptr<DType>(), rhs.dptr<EType>(),
-                                out.dptr<bool>());
+              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+                  s,
+                  new_oshape.Size(),
+                  req[0],
+                  lstride,
+                  rstride,
+                  oshape,
+                  lhs.dptr<DType>(),
+                  rhs.dptr<EType>(),
+                  out.dptr<bool>());
             });
           });
         });
@@ -178,41 +191,42 @@ struct GetBinaryBroadcastCompute {
       return;
     }
 
-    const int ondim = outputs[0].shape_.ndim();
+    const int ondim       = outputs[0].shape_.ndim();
     const size_t num_args = inputs.size() + outputs.size();
     type_codes.resize(num_args);
     values.resize(num_args);
     for (size_t i = 0; i < num_args; ++i) {
-      tblobs[i] = PrependAxes(tblobs[i], ondim);
-      type_codes[i] = kTVMDLTensorHandle;
+      tblobs[i]          = PrependAxes(tblobs[i], ondim);
+      type_codes[i]      = kTVMDLTensorHandle;
       values[i].v_handle = const_cast<DLTensor*>(&(tblobs[i].dltensor()));
     }
     tvm::runtime::TVMArgs tvm_args(&values[0], &type_codes[0], tblobs.size());
     tvm::runtime::TVMOpModule::Get()->CallEx(func, ctx, tblobs, tvm_args);
 #else
     LOG(FATAL) << "Please add USE_TVM_OP=1 as a compile flag for compiling MXNet source code "
-                  "to enable TVM-generated kernels for operator " << func;
+                  "to enable TVM-generated kernels for operator "
+               << func;
 #endif  // MXNET_USE_TVM_OP
   }
 };
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC(name)                                 \
-  NNVM_REGISTER_OP(_npi_##name)                                                       \
-  .set_num_inputs(2)                                                                  \
-  .set_num_outputs(1)                                                                 \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                 \
-  [](const NodeAttrs& attrs) {                                                        \
-    return std::vector<std::string>{"lhs", "rhs"};                                    \
-  })                                                                                  \
-  .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)                  \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryLogicOpType)                   \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
-  [](const NodeAttrs& attrs) {                                                        \
-    return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};                         \
-  })                                                                                  \
-  .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                          \
-  .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")            \
-  .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function")
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC(name)                                             \
+  NNVM_REGISTER_OP(_npi_##name)                                                                   \
+      .set_num_inputs(2)                                                                          \
+      .set_num_outputs(1)                                                                         \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         return std::vector<std::string>{"lhs", "rhs"};           \
+                                       })                                                         \
+      .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)                          \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryLogicOpType)                           \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                           \
+                                      [](const NodeAttrs& attrs) {                                \
+                                        return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}}; \
+                                      })                                                          \
+      .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                                  \
+      .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")                    \
+      .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function")
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC(equal);
 MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC(not_equal);
@@ -226,16 +240,18 @@ MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC(logical_xor);
 
 #if MXNET_USE_TVM_OP
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_CPU(name)                          \
-  NNVM_REGISTER_OP(_npi_##name)                                                    \
-  .set_attr<FCompute>("FCompute<cpu>", GetBinaryBroadcastCompute<cpu,              \
-                      mshadow_op::np_##name>{func_##name##_cpu})
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_CPU(name) \
+  NNVM_REGISTER_OP(_npi_##name)                           \
+      .set_attr<FCompute>(                                \
+          "FCompute<cpu>",                                \
+          GetBinaryBroadcastCompute<cpu, mshadow_op::np_##name>{func_##name##_cpu})
 
 #if MXNET_USE_CUDA
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(name)                          \
-  NNVM_REGISTER_OP(_npi_##name)                                                    \
-  .set_attr<FCompute>("FCompute<gpu>", TVMBinaryBroadcastCompute{func_##name##_gpu, "np_" #name})\
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(name) \
+  NNVM_REGISTER_OP(_npi_##name)                           \
+      .set_attr<FCompute>("FCompute<gpu>",                \
+                          TVMBinaryBroadcastCompute{func_##name##_gpu, "np_" #name})
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(equal);
 MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(not_equal);
@@ -251,9 +267,10 @@ MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(logical_xor);
 
 #else
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_CPU(name)                                     \
-  NNVM_REGISTER_OP(_npi_##name)                                                               \
-  .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastComputeLogic<cpu, mshadow_op::np_##name>)
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_CPU(name) \
+  NNVM_REGISTER_OP(_npi_##name)                           \
+      .set_attr<FCompute>("FCompute<cpu>",                \
+                          BinaryBroadcastComputeLogic<cpu, mshadow_op::np_##name>)
 
 #endif  // MXNET_USE_TVM_OP
 
@@ -272,7 +289,8 @@ bool NumpyBinaryScalarLogicOpType(const nnvm::NodeAttrs& attrs,
                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  if (in_attrs->at(0) == -1) return false;
+  if (in_attrs->at(0) == -1)
+    return false;
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kBool);
   return true;
 }
@@ -287,7 +305,8 @@ struct TVMBinaryBroadcastScalarCompute {
 #if MXNET_USE_TVM_OP
     CHECK_EQ(inputs.size(), 1U);
     CHECK_EQ(outputs.size(), 1U);
-    if (outputs[0].shape_.Size() == 0U) return;  // skip zero-size tensor
+    if (outputs[0].shape_.Size() == 0U)
+      return;  // skip zero-size tensor
 
     // prepare tblobs and TVMArgs
     std::vector<TBlob> tblobs = {inputs[0], outputs[0]};
@@ -299,45 +318,45 @@ struct TVMBinaryBroadcastScalarCompute {
     values.resize(num_args);
 
     // input tensor setup
-    type_codes[0] = kTVMDLTensorHandle;
+    type_codes[0]      = kTVMDLTensorHandle;
     values[0].v_handle = const_cast<DLTensor*>(&(tblobs[0].dltensor()));
 
     // scalar param
-    type_codes[1] = kDLFloat;
+    type_codes[1]                       = kDLFloat;
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    values[1].v_float64 = param.scalar;
+    values[1].v_float64                 = param.scalar;
 
     // output tensor
-    type_codes[2] = kTVMDLTensorHandle;
+    type_codes[2]      = kTVMDLTensorHandle;
     values[2].v_handle = const_cast<DLTensor*>(&(tblobs[1].dltensor()));
 
     tvm::runtime::TVMArgs tvm_args(&values[0], &type_codes[0], 3);
     tvm::runtime::TVMOpModule::Get()->CallEx(func, ctx, tblobs, tvm_args);
 #else
     LOG(FATAL) << "Please add USE_TVM_OP=1 as a compile flag for compiling MXNet source code "
-                  "to enable TVM-generated kernels for operator " << func;
+                  "to enable TVM-generated kernels for operator "
+               << func;
 #endif  // MXNET_USE_TVM_OP
   }
 };
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC(name)                                \
-  NNVM_REGISTER_OP(_npi_##name##_scalar)                                                    \
-  .set_num_inputs(1)                                                                        \
-  .set_num_outputs(1)                                                                       \
-  .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                                     \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                       \
-  [](const NodeAttrs& attrs) {                                                              \
-    return std::vector<std::string>{"data"};                                                \
-  })                                                                                        \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                         \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarLogicOpType)                   \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                         \
-  [](const NodeAttrs& attrs) {                                                              \
-    return std::vector<std::pair<int, int> >{{0, 0}};                                       \
-  })                                                                                        \
-  .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                                \
-  .add_argument("data", "NDArray-or-Symbol", "First input to the function")                 \
-  .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC(name)                              \
+  NNVM_REGISTER_OP(_npi_##name##_scalar)                                                  \
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                               \
+      .set_attr<nnvm::FListInputNames>(                                                   \
+          "FListInputNames",                                                              \
+          [](const NodeAttrs& attrs) { return std::vector<std::string>{"data"}; })        \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarLogicOpType)             \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                          \
+      .add_argument("data", "NDArray-or-Symbol", "First input to the function")           \
+      .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC(equal);
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC(not_equal);
@@ -351,37 +370,39 @@ MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC(logical_xor);
 
 #pragma clang diagnostic push
 #pragma clang diagnostic ignored "-Wunused-const-variable"
-static constexpr char func_equal_scalar_cpu[] = "equal_scalar_cpu";
-static constexpr char func_equal_scalar_gpu[] = "equal_scalar_gpu";
-static constexpr char func_not_equal_scalar_cpu[] = "not_equal_scalar_cpu";
-static constexpr char func_not_equal_scalar_gpu[] = "not_equal_scalar_gpu";
-static constexpr char func_greater_scalar_cpu[] = "greater_scalar_cpu";
-static constexpr char func_greater_scalar_gpu[] = "greater_scalar_gpu";
-static constexpr char func_less_scalar_cpu[] = "less_scalar_cpu";
-static constexpr char func_less_scalar_gpu[] = "less_scalar_gpu";
+static constexpr char func_equal_scalar_cpu[]         = "equal_scalar_cpu";
+static constexpr char func_equal_scalar_gpu[]         = "equal_scalar_gpu";
+static constexpr char func_not_equal_scalar_cpu[]     = "not_equal_scalar_cpu";
+static constexpr char func_not_equal_scalar_gpu[]     = "not_equal_scalar_gpu";
+static constexpr char func_greater_scalar_cpu[]       = "greater_scalar_cpu";
+static constexpr char func_greater_scalar_gpu[]       = "greater_scalar_gpu";
+static constexpr char func_less_scalar_cpu[]          = "less_scalar_cpu";
+static constexpr char func_less_scalar_gpu[]          = "less_scalar_gpu";
 static constexpr char func_greater_equal_scalar_cpu[] = "greater_equal_scalar_cpu";
 static constexpr char func_greater_equal_scalar_gpu[] = "greater_equal_scalar_gpu";
-static constexpr char func_less_equal_scalar_cpu[] = "less_equal_scalar_cpu";
-static constexpr char func_less_equal_scalar_gpu[] = "less_equal_scalar_gpu";
-static constexpr char func_logical_and_scalar_cpu[] = "logical_and_scalar_cpu";
-static constexpr char func_logical_and_scalar_gpu[] = "logical_and_scalar_gpu";
-static constexpr char func_logical_or_scalar_cpu[] = "logical_or_scalar_cpu";
-static constexpr char func_logical_or_scalar_gpu[] = "logical_or_scalar_gpu";
-static constexpr char func_logical_xor_scalar_cpu[] = "logical_xor_scalar_cpu";
-static constexpr char func_logical_xor_scalar_gpu[] = "logical_xor_scalar_gpu";
+static constexpr char func_less_equal_scalar_cpu[]    = "less_equal_scalar_cpu";
+static constexpr char func_less_equal_scalar_gpu[]    = "less_equal_scalar_gpu";
+static constexpr char func_logical_and_scalar_cpu[]   = "logical_and_scalar_cpu";
+static constexpr char func_logical_and_scalar_gpu[]   = "logical_and_scalar_gpu";
+static constexpr char func_logical_or_scalar_cpu[]    = "logical_or_scalar_cpu";
+static constexpr char func_logical_or_scalar_gpu[]    = "logical_or_scalar_gpu";
+static constexpr char func_logical_xor_scalar_cpu[]   = "logical_xor_scalar_cpu";
+static constexpr char func_logical_xor_scalar_gpu[]   = "logical_xor_scalar_gpu";
 #pragma clang diagnostic pop
 
 #if MXNET_USE_TVM_OP
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_CPU(name)                                \
-  NNVM_REGISTER_OP(_npi_##name##_scalar)                                                        \
-  .set_attr<FCompute>("FCompute<cpu>", TVMBinaryBroadcastScalarCompute{func_##name##_scalar_cpu})
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_CPU(name) \
+  NNVM_REGISTER_OP(_npi_##name##_scalar)                         \
+      .set_attr<FCompute>("FCompute<cpu>",                       \
+                          TVMBinaryBroadcastScalarCompute{func_##name##_scalar_cpu})
 
 #if MXNET_USE_CUDA
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(name)                                \
-  NNVM_REGISTER_OP(_npi_##name##_scalar)                                                        \
-  .set_attr<FCompute>("FCompute<gpu>", TVMBinaryBroadcastScalarCompute{func_##name##_scalar_gpu})
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(name) \
+  NNVM_REGISTER_OP(_npi_##name##_scalar)                         \
+      .set_attr<FCompute>("FCompute<gpu>",                       \
+                          TVMBinaryBroadcastScalarCompute{func_##name##_scalar_gpu})
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(equal);
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(not_equal);
@@ -397,12 +418,13 @@ MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(logical_xor);
 
 #else
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_CPU(name)                                  \
-  NNVM_REGISTER_OP(_npi_##name##_scalar)                                                          \
-  .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeLogic<cpu, mshadow_op::np_##name>)  \
-  .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {                        \
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};                             \
-  })
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_CPU(name)                    \
+  NNVM_REGISTER_OP(_npi_##name##_scalar)                                            \
+      .set_attr<FCompute>("FCompute<cpu>",                                          \
+                          BinaryScalarOp::ComputeLogic<cpu, mshadow_op::np_##name>) \
+      .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {      \
+        return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};           \
+      })
 
 #endif  // MXNET_USE_TVM_OP
 
diff --git a/src/operator/numpy/np_elemwise_broadcast_logic_op.cu b/src/operator/numpy/np_elemwise_broadcast_logic_op.cu
index 90c5bb465a73..540d2aaddca8 100644
--- a/src/operator/numpy/np_elemwise_broadcast_logic_op.cu
+++ b/src/operator/numpy/np_elemwise_broadcast_logic_op.cu
@@ -29,16 +29,15 @@
 namespace mxnet {
 namespace op {
 
-
 #if MXNET_USE_TVM_OP == 0
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(name)                                     \
-  NNVM_REGISTER_OP(_npi_##name)                                                               \
-  .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"np_" #name})
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(name) \
+  NNVM_REGISTER_OP(_npi_##name)                           \
+      .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"np_" #name})
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(name)                               \
-  NNVM_REGISTER_OP(_npi_##name##_scalar)                                                       \
-  .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"np_" #name})
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR_LOGIC_GPU(name) \
+  NNVM_REGISTER_OP(_npi_##name##_scalar)                         \
+      .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"np_" #name})
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(equal);
 MXNET_OPERATOR_REGISTER_NP_BINARY_LOGIC_GPU(not_equal);
diff --git a/src/operator/numpy/np_elemwise_broadcast_op.cc b/src/operator/numpy/np_elemwise_broadcast_op.cc
index ae6697c0b23e..124b67df1665 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op.cc
+++ b/src/operator/numpy/np_elemwise_broadcast_op.cc
@@ -30,19 +30,20 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(NumpyBinaryScalarParam);
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(name)                    \
-  NNVM_REGISTER_OP(name)                                                  \
-  .set_num_inputs(1)                                                      \
-  .set_num_outputs(1)                                                     \
-  .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
-  .set_attr<FResourceRequest>("FResourceRequest",                         \
-    [](const NodeAttrs& attrs) {                                          \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};   \
-    })                                                                    \
-  .add_argument("data", "NDArray-or-Symbol", "source input")              \
-  .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(name)                        \
+  NNVM_REGISTER_OP(name)                                                      \
+      .set_num_inputs(1)                                                      \
+      .set_num_outputs(1)                                                     \
+      .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
+      .set_attr<FResourceRequest>(                                            \
+          "FResourceRequest",                                                 \
+          [](const NodeAttrs& attrs) {                                        \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; \
+          })                                                                  \
+      .add_argument("data", "NDArray-or-Symbol", "source input")              \
+      .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
 
 bool NumpyBinaryMixedPrecisionType(const nnvm::NodeAttrs& attrs,
                                    std::vector<int>* in_attrs,
@@ -60,168 +61,175 @@ bool NumpyBinaryMixedPrecisionType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(name)                \
-  NNVM_REGISTER_OP(name)                                                       \
-  .set_num_inputs(2)                                                           \
-  .set_num_outputs(1)                                                          \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                          \
-    [](const NodeAttrs& attrs) {                                               \
-      return std::vector<std::string>{"lhs", "rhs"};                           \
-    })                                                                         \
-  .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)           \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryMixedPrecisionType)     \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                            \
-    [](const NodeAttrs& attrs){                                                \
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};                \
-    })                                                                         \
-  .set_attr<FResourceRequest>("FResourceRequest",                              \
-    [](const NodeAttrs& attrs) {                                               \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};        \
-    })                                                                         \
-  .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")     \
-  .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function")
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(name)                                   \
+  NNVM_REGISTER_OP(name)                                                                          \
+      .set_num_inputs(2)                                                                          \
+      .set_num_outputs(1)                                                                         \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         return std::vector<std::string>{"lhs", "rhs"};           \
+                                       })                                                         \
+      .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)                          \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryMixedPrecisionType)                    \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                           \
+                                      [](const NodeAttrs& attrs) {                                \
+                                        return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}}; \
+                                      })                                                          \
+      .set_attr<FResourceRequest>(                                                                \
+          "FResourceRequest",                                                                     \
+          [](const NodeAttrs& attrs) {                                                            \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};                     \
+          })                                                                                      \
+      .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")                    \
+      .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function")
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(_npi_add)
-.set_attr<FCompute>(
-  "FCompute<cpu>",
-  NumpyBinaryBroadcastComputeWithBool<cpu, op::mshadow_op::plus, op::mshadow_op::mixed_plus,
-                                      op::mshadow_op::mixed_plus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_add"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBroadcastComputeWithBool<cpu,
+                                                            op::mshadow_op::plus,
+                                                            op::mshadow_op::mixed_plus,
+                                                            op::mshadow_op::mixed_plus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_add"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_add)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBinaryBackwardUseIn<cpu, mshadow_op::posone,
-                                                                mshadow_op::posone>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBackwardUseIn<cpu, mshadow_op::posone, mshadow_op::posone>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(_npi_subtract)
-.set_attr<FCompute>(
-  "FCompute<cpu>",
-  NumpyBinaryBroadcastCompute<cpu, op::mshadow_op::minus, op::mshadow_op::mixed_minus,
-                              op::mshadow_op::mixed_rminus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_sub"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBroadcastCompute<cpu,
+                                                    op::mshadow_op::minus,
+                                                    op::mshadow_op::mixed_minus,
+                                                    op::mshadow_op::mixed_rminus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_sub"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_sub)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBinaryBackwardUseIn<cpu, mshadow_op::posone,
-                                                                mshadow_op::negone>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBackwardUseIn<cpu, mshadow_op::posone, mshadow_op::negone>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(_npi_multiply)
-.set_attr<FCompute>(
-  "FCompute<cpu>",
-  NumpyBinaryBroadcastComputeWithBool<cpu, op::mshadow_op::mul, op::mshadow_op::mixed_mul,
-                                      op::mshadow_op::mixed_mul>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_mul"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBroadcastComputeWithBool<cpu,
+                                                            op::mshadow_op::mul,
+                                                            op::mshadow_op::mixed_mul,
+                                                            op::mshadow_op::mixed_mul>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_mul"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_mul)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBinaryBackwardUseIn<cpu, mshadow_op::right,
-                                                              mshadow_op::left>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBackwardUseIn<cpu, mshadow_op::right, mshadow_op::left>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(_npi_mod)
-.set_attr<FCompute>(
-  "FCompute<cpu>",
-  NumpyBinaryBroadcastCompute<cpu, op::mshadow_op::mod, op::mshadow_op::mixed_mod,
-                                      op::mshadow_op::mixed_rmod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_mod"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBroadcastCompute<cpu,
+                                                    op::mshadow_op::mod,
+                                                    op::mshadow_op::mixed_mod,
+                                                    op::mshadow_op::mixed_rmod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_mod"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_mod)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBinaryBackwardUseIn<cpu, mshadow_op::mod_grad,
-                                                              mshadow_op::mod_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBackwardUseIn<cpu, mshadow_op::mod_grad, mshadow_op::mod_rgrad>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_MIXED_PRECISION(_npi_power)
-.set_attr<FCompute>(
-  "FCompute<cpu>",
-  NumpyBinaryBroadcastComputeWithBool<cpu, op::mshadow_op::power, op::mshadow_op::mixed_power,
-                                      op::mshadow_op::mixed_rpower>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_power"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBroadcastComputeWithBool<cpu,
+                                                            op::mshadow_op::power,
+                                                            op::mshadow_op::mixed_power,
+                                                            op::mshadow_op::mixed_rpower>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_power"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_power)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBinaryBackwardUseIn<cpu, mshadow_op::power_grad,
-                                                              mshadow_op::power_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        NumpyBinaryBackwardUseIn<cpu, mshadow_op::power_grad, mshadow_op::power_rgrad>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_add_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::plus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::plus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_subtract_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::minus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::minus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rsubtract_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rminus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rminus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_multiply_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_mul_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_mul_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_mod_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::mod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mod_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::mod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mod_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rmod_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rmod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rmod_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rmod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rmod_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_power_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::power>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_power_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::power>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_power_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rpower_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rpower>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_rpower_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rpower>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_rpower_scalar"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_elemwise_broadcast_op.cu b/src/operator/numpy/np_elemwise_broadcast_op.cu
index a6f85a8bc219..635bc4dee20c 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op.cu
+++ b/src/operator/numpy/np_elemwise_broadcast_op.cu
@@ -28,59 +28,58 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_add)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"add"});
+NNVM_REGISTER_OP(_npi_add).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"add"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_add)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"one", "one"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"one", "one"});
 
 NNVM_REGISTER_OP(_npi_subtract)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"sub"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"sub"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_sub)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"one", "negone"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"one", "negone"});
 
 NNVM_REGISTER_OP(_npi_multiply)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mul"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mul"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_mul)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"right", "left"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"right", "left"});
 
-NNVM_REGISTER_OP(_npi_mod)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mod"});
+NNVM_REGISTER_OP(_npi_mod).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mod"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_mod)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"mod_grad", "mod_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"mod_grad", "mod_rgrad"});
 
 NNVM_REGISTER_OP(_npi_power)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"power"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"power"});
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_power)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"power_grad", "power_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        BinaryBroadcastRTCBackwardUseIn{"power_grad", "power_rgrad"});
 
 NNVM_REGISTER_OP(_npi_add_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"add"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"add"});
 
 NNVM_REGISTER_OP(_npi_subtract_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"sub"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"sub"});
 
 NNVM_REGISTER_OP(_npi_rsubtract_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rsub"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rsub"});
 
 NNVM_REGISTER_OP(_npi_multiply_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"});
 
 NNVM_REGISTER_OP(_npi_mod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mod"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mod"});
 
 NNVM_REGISTER_OP(_npi_rmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rmod"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rmod"});
 
 NNVM_REGISTER_OP(_npi_power_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"power"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"power"});
 
 NNVM_REGISTER_OP(_npi_rpower_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rpow"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rpow"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_elemwise_broadcast_op.h b/src/operator/numpy/np_elemwise_broadcast_op.h
index be19b3876a40..1f01bc62f06a 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op.h
+++ b/src/operator/numpy/np_elemwise_broadcast_op.h
@@ -41,7 +41,7 @@ inline void PrintErrorMessage(const std::string& op_name, const int dtype1, cons
              << " yet...";
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void MixedAllRealBinaryElemwiseCompute(const std::string& op_name,
                                        const OpContext& ctx,
                                        const TBlob& lhs,
@@ -52,48 +52,44 @@ void MixedAllRealBinaryElemwiseCompute(const std::string& op_name,
   using namespace mxnet_op;
   CHECK_EQ(lhs.type_flag_, out.type_flag_);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, DType, {
-    const size_t size = (ElemwiseBinaryOp::minthree(out.Size(), lhs.Size(), rhs.Size())
-      + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
-    if (size == 0) return;
+    const size_t size = (ElemwiseBinaryOp::minthree(out.Size(), lhs.Size(), rhs.Size()) +
+                         DataType<DType>::kLanes - 1) /
+                        DataType<DType>::kLanes;
+    if (size == 0)
+      return;
 
     switch (lhs.type_flag_) {
-      case mshadow::kFloat32:
-      {
+      case mshadow::kFloat32: {
         if (rhs.type_flag_ == mshadow::kFloat16) {
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
-              s, size, out.dptr<float>(), rhs.dptr<mshadow::half::half_t>(),
-              lhs.dptr<float>());
+                s, size, out.dptr<float>(), rhs.dptr<mshadow::half::half_t>(), lhs.dptr<float>());
           });
         } else {
           PrintErrorMessage(op_name, lhs.type_flag_, rhs.type_flag_);
         }
         break;
       }
-      case mshadow::kFloat64:
-      {
+      case mshadow::kFloat64: {
         if (rhs.type_flag_ == mshadow::kFloat16) {
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
-              s, size, out.dptr<double>(), rhs.dptr<mshadow::half::half_t>(),
-              lhs.dptr<double>());
+                s, size, out.dptr<double>(), rhs.dptr<mshadow::half::half_t>(), lhs.dptr<double>());
           });
         } else if (rhs.type_flag_ == mshadow::kFloat32) {
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
-              s, size, out.dptr<double>(), rhs.dptr<float>(),
-              lhs.dptr<double>());
+                s, size, out.dptr<double>(), rhs.dptr<float>(), lhs.dptr<double>());
           });
         } else {
           PrintErrorMessage(op_name, lhs.type_flag_, rhs.type_flag_);
         }
         break;
       }
-      default:
-      {
+      default: {
         PrintErrorMessage(op_name, lhs.type_flag_, rhs.type_flag_);
         break;
       }
@@ -101,7 +97,7 @@ void MixedAllRealBinaryElemwiseCompute(const std::string& op_name,
   });
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void MixedIntRealBinaryElemwiseCompute(const OpContext& ctx,
                                        const TBlob& lhs,
                                        const TBlob& rhs,
@@ -111,24 +107,25 @@ void MixedIntRealBinaryElemwiseCompute(const OpContext& ctx,
   using namespace mxnet_op;
   CHECK_EQ(lhs.type_flag_, out.type_flag_);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, FType, {
-    const size_t size = (ElemwiseBinaryOp::minthree(out.Size(), lhs.Size(), rhs.Size())
-      + DataType<FType>::kLanes - 1) / DataType<FType>::kLanes;
-    if (size == 0) return;
+    const size_t size = (ElemwiseBinaryOp::minthree(out.Size(), lhs.Size(), rhs.Size()) +
+                         DataType<FType>::kLanes - 1) /
+                        DataType<FType>::kLanes;
+    if (size == 0)
+      return;
 
     MXNET_INT_TYPE_SWITCH(rhs.type_flag_, IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
-          s, size, out.dptr<FType>(), rhs.dptr<IType>(),
-          lhs.dptr<FType>());
+            s, size, out.dptr<FType>(), rhs.dptr<IType>(), lhs.dptr<FType>());
       });
     });
   });
 }
 
-template<typename xpu, typename LOP, typename ROP>
+template <typename xpu, typename LOP, typename ROP>
 void MixedBinaryElemwiseCompute(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -159,7 +156,7 @@ void MixedBinaryElemwiseCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void MixedAllRealBinaryBroadcastCompute(const std::string& op_name,
                                         const OpContext& ctx,
                                         const TBlob& lhs,
@@ -174,41 +171,59 @@ void MixedAllRealBinaryBroadcastCompute(const std::string& op_name,
   using namespace mxnet_op;
   CHECK_EQ(lhs.type_flag_, out.type_flag_);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   BROADCAST_NDIM_SWITCH(ndim, NDim, {
-    mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+    mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
     mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
     mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
     switch (lhs.type_flag_) {
-      case mshadow::kFloat32:
-      {
+      case mshadow::kFloat32: {
         if (rhs.type_flag_ == mshadow::kFloat16) {
-          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-          template LaunchEx(s, new_oshape.Size(), req, rstride, lstride, oshape,
-          rhs.dptr<mshadow::half::half_t>(), lhs.dptr<float>(), out.dptr<float>());
+          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+              s,
+              new_oshape.Size(),
+              req,
+              rstride,
+              lstride,
+              oshape,
+              rhs.dptr<mshadow::half::half_t>(),
+              lhs.dptr<float>(),
+              out.dptr<float>());
         } else {
           PrintErrorMessage(op_name, lhs.type_flag_, rhs.type_flag_);
         }
         break;
       }
-      case mshadow::kFloat64:
-      {
+      case mshadow::kFloat64: {
         if (rhs.type_flag_ == mshadow::kFloat16) {
-          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-          template LaunchEx(s, new_oshape.Size(), req, rstride, lstride, oshape,
-          rhs.dptr<mshadow::half::half_t>(), lhs.dptr<double>(), out.dptr<double>());
+          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+              s,
+              new_oshape.Size(),
+              req,
+              rstride,
+              lstride,
+              oshape,
+              rhs.dptr<mshadow::half::half_t>(),
+              lhs.dptr<double>(),
+              out.dptr<double>());
         } else if (rhs.type_flag_ == mshadow::kFloat32) {
-          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-          template LaunchEx(s, new_oshape.Size(), req, rstride, lstride, oshape,
-          rhs.dptr<float>(), lhs.dptr<double>(), out.dptr<double>());
+          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+              s,
+              new_oshape.Size(),
+              req,
+              rstride,
+              lstride,
+              oshape,
+              rhs.dptr<float>(),
+              lhs.dptr<double>(),
+              out.dptr<double>());
         } else {
           PrintErrorMessage(op_name, lhs.type_flag_, rhs.type_flag_);
         }
         break;
       }
-      default:
-      {
+      default: {
         PrintErrorMessage(op_name, lhs.type_flag_, rhs.type_flag_);
         break;
       }
@@ -216,8 +231,7 @@ void MixedAllRealBinaryBroadcastCompute(const std::string& op_name,
   });
 }
 
-
-template<typename xpu, typename OP, typename LOP, typename ROP>
+template <typename xpu, typename OP, typename LOP, typename ROP>
 void MixedBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -233,41 +247,55 @@ void MixedBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
   const TBlob& out = outputs[0];
 
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(lhs.shape_, rhs.shape_, out.shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      lhs.shape_, rhs.shape_, out.shape_, &new_lshape, &new_rshape, &new_oshape);
   if (!ndim) {
     MixedBinaryElemwiseCompute<xpu, LOP, ROP>(attrs, ctx, inputs, req, outputs);
   } else {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     if (common::is_float(lhs.type_flag_) && common::is_float(rhs.type_flag_)) {
       if (lhs.type_flag_ == out.type_flag_) {
         MixedAllRealBinaryBroadcastCompute<xpu, ROP>(
-          attrs.op->name, ctx, lhs, rhs, out, req[0], ndim, new_oshape, new_lshape, new_rshape);
+            attrs.op->name, ctx, lhs, rhs, out, req[0], ndim, new_oshape, new_lshape, new_rshape);
       } else {
         MixedAllRealBinaryBroadcastCompute<xpu, LOP>(
-          attrs.op->name, ctx, rhs, lhs, out, req[0], ndim, new_oshape, new_rshape, new_lshape);
+            attrs.op->name, ctx, rhs, lhs, out, req[0], ndim, new_oshape, new_rshape, new_lshape);
       }
     } else if (common::is_float(lhs.type_flag_) || common::is_float(rhs.type_flag_)) {
       CHECK(lhs.type_flag_ == out.type_flag_ || rhs.type_flag_ == out.type_flag_)
-        << "One of the input type should be the same as the output";
+          << "One of the input type should be the same as the output";
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
-        mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+        mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
         mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
         mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
         if (lhs.type_flag_ == out.type_flag_) {
           MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, LType, {
             MXNET_INT_TYPE_SWITCH(rhs.type_flag_, RType, {
-              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, ROP>, xpu>::
-              template LaunchEx(s, new_oshape.Size(), req[0], rstride, lstride, oshape,
-              rhs.dptr<RType>(), lhs.dptr<LType>(), out.dptr<LType>());
+              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, ROP>,
+                               xpu>::template LaunchEx(s,
+                                                       new_oshape.Size(),
+                                                       req[0],
+                                                       rstride,
+                                                       lstride,
+                                                       oshape,
+                                                       rhs.dptr<RType>(),
+                                                       lhs.dptr<LType>(),
+                                                       out.dptr<LType>());
             });
           });
         } else {
           MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, RType, {
             MXNET_INT_TYPE_SWITCH(lhs.type_flag_, LType, {
-              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, LOP>, xpu>::
-              template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-              lhs.dptr<LType>(), rhs.dptr<RType>(), out.dptr<RType>());
+              mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, LOP>,
+                               xpu>::template LaunchEx(s,
+                                                       new_oshape.Size(),
+                                                       req[0],
+                                                       lstride,
+                                                       rstride,
+                                                       oshape,
+                                                       lhs.dptr<LType>(),
+                                                       rhs.dptr<RType>(),
+                                                       out.dptr<RType>());
             });
           });
         }
@@ -277,21 +305,21 @@ void MixedBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
       if (lhs.type_flag_ == out.type_flag_) {
         MXNET_INT_TYPE_SWITCH(lhs.type_flag_, LType, {
           Tensor<xpu, 1, LType> temp_tensor =
-            ctx.requested[0].get_space_typed<xpu, 1, LType>(Shape1(rhs.Size()), s);
+              ctx.requested[0].get_space_typed<xpu, 1, LType>(Shape1(rhs.Size()), s);
           temp_tblob = TBlob(temp_tensor);
         });
         CastCompute<xpu>(attrs, ctx, {rhs}, {kWriteTo}, {temp_tblob});
         BinaryBroadcastCompute<xpu, OP>(
-          attrs, ctx, {lhs, temp_tblob.reshape(rhs.shape_)}, req, outputs);
+            attrs, ctx, {lhs, temp_tblob.reshape(rhs.shape_)}, req, outputs);
       } else {
         MXNET_INT_TYPE_SWITCH(rhs.type_flag_, RType, {
           Tensor<xpu, 1, RType> temp_tensor =
-            ctx.requested[0].get_space_typed<xpu, 1, RType>(Shape1(lhs.Size()), s);
+              ctx.requested[0].get_space_typed<xpu, 1, RType>(Shape1(lhs.Size()), s);
           temp_tblob = TBlob(temp_tensor);
         });
         CastCompute<xpu>(attrs, ctx, {lhs}, {kWriteTo}, {temp_tblob});
         BinaryBroadcastCompute<xpu, OP>(
-          attrs, ctx, {temp_tblob.reshape(lhs.shape_), rhs}, req, outputs);
+            attrs, ctx, {temp_tblob.reshape(lhs.shape_), rhs}, req, outputs);
       }
     } else {
       PrintErrorMessage(attrs.op->name, lhs.type_flag_, rhs.type_flag_);
@@ -299,7 +327,7 @@ void MixedBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu, typename OP, typename LOP, typename ROP>
+template <typename xpu, typename OP, typename LOP, typename ROP>
 void NumpyBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -314,7 +342,8 @@ void NumpyBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
   const TBlob& rhs = inputs[1];
   const TBlob& out = outputs[0];
 
-  if ((out.shape_.Size() == 0U) || (req[0] == kNullOp)) return;
+  if ((out.shape_.Size() == 0U) || (req[0] == kNullOp))
+    return;
 
   if (lhs.type_flag_ == rhs.type_flag_) {
     BinaryBroadcastCompute<xpu, OP>(attrs, ctx, inputs, req, outputs);
@@ -324,7 +353,7 @@ void NumpyBinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
   MixedBinaryBroadcastCompute<xpu, OP, LOP, ROP>(attrs, ctx, inputs, req, outputs);
 }
 
-template<typename xpu, typename OP, typename LOP, typename ROP>
+template <typename xpu, typename OP, typename LOP, typename ROP>
 void NumpyBinaryBroadcastComputeWithBool(const nnvm::NodeAttrs& attrs,
                                          const OpContext& ctx,
                                          const std::vector<TBlob>& inputs,
@@ -339,40 +368,41 @@ void NumpyBinaryBroadcastComputeWithBool(const nnvm::NodeAttrs& attrs,
   const TBlob& rhs = inputs[1];
   const TBlob& out = outputs[0];
 
-  if ((out.shape_.Size() == 0U) || (req[0] == kNullOp)) return;
+  if ((out.shape_.Size() == 0U) || (req[0] == kNullOp))
+    return;
 
   if (lhs.type_flag_ == rhs.type_flag_) {
     BinaryBroadcastComputeWithBool<xpu, OP>(attrs, ctx, inputs, req, outputs);
     return;
   }
   if (!common::is_float(lhs.type_flag_) && !common::is_float(rhs.type_flag_)) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     TBlob temp_tblob;
     if (lhs.type_flag_ == out.type_flag_) {
       MXNET_INT_TYPE_SWITCH(lhs.type_flag_, LType, {
         Tensor<xpu, 1, LType> temp_tensor =
-          ctx.requested[0].get_space_typed<xpu, 1, LType>(Shape1(rhs.Size()), s);
+            ctx.requested[0].get_space_typed<xpu, 1, LType>(Shape1(rhs.Size()), s);
         temp_tblob = TBlob(temp_tensor);
       });
       CastCompute<xpu>(attrs, ctx, {rhs}, {kWriteTo}, {temp_tblob});
       BinaryBroadcastCompute<xpu, OP>(
-        attrs, ctx, {lhs, temp_tblob.reshape(rhs.shape_)}, req, outputs);
+          attrs, ctx, {lhs, temp_tblob.reshape(rhs.shape_)}, req, outputs);
     } else {
       MXNET_INT_TYPE_SWITCH(rhs.type_flag_, RType, {
         Tensor<xpu, 1, RType> temp_tensor =
-          ctx.requested[0].get_space_typed<xpu, 1, RType>(Shape1(lhs.Size()), s);
+            ctx.requested[0].get_space_typed<xpu, 1, RType>(Shape1(lhs.Size()), s);
         temp_tblob = TBlob(temp_tensor);
       });
       CastCompute<xpu>(attrs, ctx, {lhs}, {kWriteTo}, {temp_tblob});
       BinaryBroadcastCompute<xpu, OP>(
-        attrs, ctx, {temp_tblob.reshape(lhs.shape_), rhs}, req, outputs);
+          attrs, ctx, {temp_tblob.reshape(lhs.shape_), rhs}, req, outputs);
     }
     return;
   }
   MixedBinaryBroadcastCompute<xpu, OP, LOP, ROP>(attrs, ctx, inputs, req, outputs);
 }
 
-template<typename xpu, typename LOP, typename ROP>
+template <typename xpu, typename LOP, typename ROP>
 void NumpyBinaryBackwardUseIn(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -397,11 +427,12 @@ void NumpyBinaryBackwardUseIn(const nnvm::NodeAttrs& attrs,
   if (common::is_float(lhs.type_flag_) || common::is_float(rhs.type_flag_)) {
     // If any of the inputs is a float, it's the same type as the output
     // So 2 of the 3 tensors have the same data type
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     mxnet::TShape new_lshape, new_rshape, new_oshape;
     using namespace broadcast;
-    const bool need_bc = BinaryBroadcastShapeCompact(lgrad.shape_, rgrad.shape_, ograd.shape_,
-                                                     &new_lshape, &new_rshape, &new_oshape) != 0;
+    const bool need_bc =
+        BinaryBroadcastShapeCompact(
+            lgrad.shape_, rgrad.shape_, ograd.shape_, &new_lshape, &new_rshape, &new_oshape) != 0;
 
     // Prepare all the temporary memory
     size_t workspace_size_l = 0, workspace_size_r = 0;
@@ -412,65 +443,75 @@ void NumpyBinaryBackwardUseIn(const nnvm::NodeAttrs& attrs,
 
     MSHADOW_TYPE_SWITCH(ograd.type_flag_, OType, {
       if (need_bc) {
-          workspace_size_l = ReduceWorkspaceSize(
-            s, new_lshape, req[0], new_oshape, new_lshape, new_rshape);
-          workspace_size_r = ReduceWorkspaceSize(
-            s, new_rshape, req[1], new_oshape, new_lshape, new_rshape);
+        workspace_size_l =
+            ReduceWorkspaceSize(s, new_lshape, req[0], new_oshape, new_lshape, new_rshape);
+        workspace_size_r =
+            ReduceWorkspaceSize(s, new_rshape, req[1], new_oshape, new_lshape, new_rshape);
       }
-      size_t workspace_size = std::max(workspace_size_l, workspace_size_r);
+      size_t workspace_size   = std::max(workspace_size_l, workspace_size_r);
       size_t cast_tensor_size = tensor_size * sizeof(OType);
       // Allocate the temporary memories now
-      Tensor<xpu, 1, char> temp_space =
-        ctx.requested[0].get_space_typed<xpu, 1, char>(
+      Tensor<xpu, 1, char> temp_space = ctx.requested[0].get_space_typed<xpu, 1, char>(
           Shape1(workspace_size + cast_tensor_size * 2), s);
       // Tensor for temp_tblob
       Tensor<xpu, 1, OType> temp_tblob_tensor(
-                              reinterpret_cast<OType*>(temp_space.dptr_),
-                              Shape1(tensor_size), s);
+          reinterpret_cast<OType*>(temp_space.dptr_), Shape1(tensor_size), s);
       // Tensor for temp_igrad
       Tensor<xpu, 1, OType> temp_igrad_tensor(
-                              reinterpret_cast<OType*>(temp_space.dptr_) + tensor_size,
-                              Shape1(tensor_size), s);
-      temp_tblob =
-        TBlob(temp_tblob_tensor)
-          .reshape(((lgrad.type_flag_ != ograd.type_flag_) ? lhs.shape_ : rhs.shape_));
-      temp_igrad =
-        TBlob(temp_igrad_tensor)
-          .reshape(((lgrad.type_flag_ != ograd.type_flag_) ? lhs.shape_ : rhs.shape_));
+          reinterpret_cast<OType*>(temp_space.dptr_) + tensor_size, Shape1(tensor_size), s);
+      temp_tblob = TBlob(temp_tblob_tensor)
+                       .reshape(((lgrad.type_flag_ != ograd.type_flag_) ? lhs.shape_ : rhs.shape_));
+      temp_igrad = TBlob(temp_igrad_tensor)
+                       .reshape(((lgrad.type_flag_ != ograd.type_flag_) ? lhs.shape_ : rhs.shape_));
       if (temp_igrad.Size() != 0) {
         Kernel<set_zero, xpu>::Launch(s, temp_igrad.Size(), temp_igrad.dptr<OType>());
       }
       workspace =
-        Tensor<xpu, 1, char>(temp_space.dptr_ + 2 * cast_tensor_size, Shape1(workspace_size), s);
+          Tensor<xpu, 1, char>(temp_space.dptr_ + 2 * cast_tensor_size, Shape1(workspace_size), s);
     });
 
     // Cast the input that does not have consistent type to temp_tblob
-    CastCompute<xpu>(
-      attrs, ctx, {((lgrad.type_flag_ != ograd.type_flag_) ? lhs : rhs)}, {kWriteTo}, {temp_tblob});
+    CastCompute<xpu>(attrs,
+                     ctx,
+                     {((lgrad.type_flag_ != ograd.type_flag_) ? lhs : rhs)},
+                     {kWriteTo},
+                     {temp_tblob});
 
     if (!need_bc) {
       if (lhs.type_flag_ != ograd.type_flag_) {
         ElemwiseBinaryOp::BackwardUseIn<xpu, LOP, ROP>(
-          attrs, ctx, {ograd, temp_tblob, rhs}, {kWriteTo, req[1]}, {temp_igrad, rgrad});
+            attrs, ctx, {ograd, temp_tblob, rhs}, {kWriteTo, req[1]}, {temp_igrad, rgrad});
       } else {
         ElemwiseBinaryOp::BackwardUseIn<xpu, LOP, ROP>(
-          attrs, ctx, {ograd, lhs, temp_tblob}, {req[0], kWriteTo}, {lgrad, temp_igrad});
+            attrs, ctx, {ograd, lhs, temp_tblob}, {req[0], kWriteTo}, {lgrad, temp_igrad});
       }
     } else {
       if (lhs.type_flag_ != ograd.type_flag_) {
         MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {
           BROADCAST_NDIM_SWITCH(new_oshape.ndim(), NDim, {
             BinaryBroadcastBackwardUseInImplWithWorkspace<xpu, NDim, DType, LOP, ROP>(
-              ctx, {ograd, temp_tblob, rhs}, {kWriteTo, req[1]}, {temp_igrad, rgrad},
-              workspace, new_lshape, new_rshape, new_oshape);
+                ctx,
+                {ograd, temp_tblob, rhs},
+                {kWriteTo, req[1]},
+                {temp_igrad, rgrad},
+                workspace,
+                new_lshape,
+                new_rshape,
+                new_oshape);
           });
         });
       } else {
         MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {
           BROADCAST_NDIM_SWITCH(new_oshape.ndim(), NDim, {
             BinaryBroadcastBackwardUseInImplWithWorkspace<xpu, NDim, DType, LOP, ROP>(
-              ctx, {ograd, lhs, temp_tblob}, {req[0], kWriteTo}, {lgrad, temp_igrad},
-              workspace, new_lshape, new_rshape, new_oshape);
+                ctx,
+                {ograd, lhs, temp_tblob},
+                {req[0], kWriteTo},
+                {lgrad, temp_igrad},
+                workspace,
+                new_lshape,
+                new_rshape,
+                new_oshape);
           });
         });
       }
diff --git a/src/operator/numpy/np_elemwise_broadcast_op_extended.cc b/src/operator/numpy/np_elemwise_broadcast_op_extended.cc
index 188b6c853dbb..6054fbf2acb0 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op_extended.cc
+++ b/src/operator/numpy/np_elemwise_broadcast_op_extended.cc
@@ -29,216 +29,217 @@
 namespace mxnet {
 namespace op {
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(name)                    \
-  NNVM_REGISTER_OP(name)                                                  \
-  .set_num_inputs(1)                                                      \
-  .set_num_outputs(1)                                                     \
-  .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
-  .set_attr<FResourceRequest>("FResourceRequest",                         \
-    [](const NodeAttrs& attrs) {                                          \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};   \
-    })                                                                    \
-  .add_argument("data", "NDArray-or-Symbol", "source input")              \
-  .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(name)                        \
+  NNVM_REGISTER_OP(name)                                                      \
+      .set_num_inputs(1)                                                      \
+      .set_num_outputs(1)                                                     \
+      .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
+      .set_attr<FResourceRequest>(                                            \
+          "FResourceRequest",                                                 \
+          [](const NodeAttrs& attrs) {                                        \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; \
+          })                                                                  \
+      .add_argument("data", "NDArray-or-Symbol", "source input")              \
+      .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(_npi_copysign)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::copysign>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_copysign"});
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::copysign>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_copysign"});
 
 NNVM_REGISTER_OP(_backward_npi_copysign)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::copysign_grad,
-                                                                  mshadow_op::copysign_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::copysign_grad, mshadow_op::copysign_rgrad>);
 
 NNVM_REGISTER_OP(_npi_gcd)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"lhs", "rhs"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-[](const NodeAttrs& attrs){
-     return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-})
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::gcd>)
-.add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::gcd>)
+    .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
 
 NNVM_REGISTER_OP(_npi_gcd_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::gcd>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::gcd>);
 
 NNVM_REGISTER_OP(_npi_lcm)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"lhs", "rhs"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-[](const NodeAttrs& attrs){
-     return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-})
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::lcm>)
-.add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::lcm>)
+    .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
 
 NNVM_REGISTER_OP(_npi_lcm_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::lcm>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::lcm>);
 
 NNVM_REGISTER_OP(_npi_bitwise_and)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"lhs", "rhs"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-[](const NodeAttrs& attrs){
-     return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-})
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::bitwise_and>)
-.add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::bitwise_and>)
+    .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
 
 NNVM_REGISTER_OP(_npi_bitwise_and_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::bitwise_and>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::bitwise_and>);
 
 NNVM_REGISTER_OP(_npi_bitwise_xor)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"lhs", "rhs"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-[](const NodeAttrs& attrs){
-     return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-})
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::bitwise_xor>)
-.add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::bitwise_xor>)
+    .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
 
 NNVM_REGISTER_OP(_npi_bitwise_or)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"lhs", "rhs"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-[](const NodeAttrs& attrs){
-     return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-})
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::bitwise_or>)
-.add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastIntCompute<cpu, mshadow_op::bitwise_or>)
+    .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function");
 
 NNVM_REGISTER_OP(_npi_bitwise_xor_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::bitwise_xor>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::bitwise_xor>);
 
 NNVM_REGISTER_OP(_npi_bitwise_or_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::bitwise_or>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseIntType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::ComputeInt<cpu, mshadow_op::bitwise_or>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_copysign_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::copysign>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_copysign_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::copysign>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_copysign_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rcopysign_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rcopysign>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rcopysign>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_backward_npi_copysign_scalar)
-.set_attr<FCompute>("FCompute<cpu>",
-                    BinaryScalarOp::Backward<cpu, mshadow_op::copysign_grad>);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::copysign_grad>);
 
 inline bool Arctan2OpType(const nnvm::NodeAttrs& attrs,
                           std::vector<int>* in_attrs,
@@ -256,53 +257,52 @@ inline bool Arctan2OpType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_arctan2)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"x1", "x2"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", Arctan2OpType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::arctan2>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arctan2"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("x1", "NDArray-or-Symbol", "The input array")
-.add_argument("x2", "NDArray-or-Symbol", "The input array");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"x1", "x2"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", Arctan2OpType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::arctan2>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arctan2"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("x1", "NDArray-or-Symbol", "The input array")
+    .add_argument("x2", "NDArray-or-Symbol", "The input array");
 
 NNVM_REGISTER_OP(_backward_npi_arctan2)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::arctan2_grad,
-                                                                  mshadow_op::arctan2_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::arctan2_grad, mshadow_op::arctan2_rgrad>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_arctan2_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::arctan2>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arctan2_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::arctan2>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arctan2_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rarctan2_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rarctan2>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_rarctan2_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rarctan2>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_rarctan2_scalar"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_arctan2_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>",
-                    BinaryScalarOp::Backward<cpu, mshadow_op::arctan2_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::arctan2_grad>);
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_rarctan2_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>",
-                    BinaryScalarOp::Backward<cpu, mshadow_op::arctan2_rgrad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::arctan2_rgrad>);
 
 bool HypotOpType(const nnvm::NodeAttrs& attrs,
                  std::vector<int>* in_attrs,
@@ -321,74 +321,77 @@ bool HypotOpType(const nnvm::NodeAttrs& attrs,
 
 // rigister hypot that do not support int here
 NNVM_REGISTER_OP(_npi_hypot)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"x1", "x2"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", HypotOpType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::hypot>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_hypot"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-  })
-.add_argument("x1", "NDArray-or-Symbol", "The input array")
-.add_argument("x2", "NDArray-or-Symbol", "The input array");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"x1", "x2"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", HypotOpType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::hypot>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_hypot"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .add_argument("x1", "NDArray-or-Symbol", "The input array")
+    .add_argument("x2", "NDArray-or-Symbol", "The input array");
 
 NNVM_REGISTER_OP(_backward_npi_hypot)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> > {{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::hypot_grad_left,
-                                                                  mshadow_op::hypot_grad_right>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu,
+                                                     mshadow_op::hypot_grad_left,
+                                                     mshadow_op::hypot_grad_right>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(_npi_ldexp)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::ldexp>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_ldexp"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::ldexp>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_ldexp"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_ldexp_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::ldexp>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_ldexp_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::ldexp>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_ldexp_scalar"});
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rldexp_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rldexp>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_rldexp_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rldexp>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_rldexp_scalar"});
 
 NNVM_REGISTER_OP(_backward_npi_ldexp)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::ldexp_grad,
-                                                                  mshadow_op::ldexp_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::ldexp_grad, mshadow_op::ldexp_rgrad>);
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_ldexp_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::ldexp_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::ldexp_grad>);
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_rldexp_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rldexp_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rldexp_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_elemwise_broadcast_op_extended.cu b/src/operator/numpy/np_elemwise_broadcast_op_extended.cu
index ff1cedff53db..c106696362e2 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op_extended.cu
+++ b/src/operator/numpy/np_elemwise_broadcast_op_extended.cu
@@ -29,95 +29,91 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_copysign)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"copysign"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"copysign"});
 
-NNVM_REGISTER_OP(_npi_gcd)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"gcd"});
+NNVM_REGISTER_OP(_npi_gcd).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"gcd"});
 
-NNVM_REGISTER_OP(_npi_lcm)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"lcm"});
+NNVM_REGISTER_OP(_npi_lcm).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"lcm"});
 
 NNVM_REGISTER_OP(_npi_bitwise_and)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"bitwise_and"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"bitwise_and"});
 
 NNVM_REGISTER_OP(_npi_bitwise_xor)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"bitwise_xor"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"bitwise_xor"});
 
 NNVM_REGISTER_OP(_npi_bitwise_or)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"bitwise_or"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"bitwise_or"});
 
 NNVM_REGISTER_OP(_backward_npi_copysign)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"copysign_grad",
-                                                                     "zero"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"copysign_grad", "zero"});
 
 NNVM_REGISTER_OP(_npi_arctan2)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"arctan2"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"arctan2"});
 
 NNVM_REGISTER_OP(_backward_npi_arctan2)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"arctan2_grad",
-                                                                     "arctan2_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        BinaryBroadcastRTCBackwardUseIn{"arctan2_grad", "arctan2_rgrad"});
 
 NNVM_REGISTER_OP(_npi_hypot)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"hypot"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"hypot"});
 
 NNVM_REGISTER_OP(_backward_npi_hypot)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"hypot_grad_left",
-                                                                     "hypot_grad_right"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        BinaryBroadcastRTCBackwardUseIn{"hypot_grad_left", "hypot_grad_right"});
 NNVM_REGISTER_OP(_npi_copysign_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"copysign"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"copysign"});
 
 NNVM_REGISTER_OP(_npi_rcopysign_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rcopysign"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rcopysign"});
 
 NNVM_REGISTER_OP(_backward_npi_copysign_scalar)
-.set_attr<FCompute>("FCompute<gpu>",
-                    BinaryScalarRTCBackward{"copysign_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"copysign_grad"});
 
 NNVM_REGISTER_OP(_npi_arctan2_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"arctan2"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"arctan2"});
 
 NNVM_REGISTER_OP(_backward_npi_arctan2_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"arctan2_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"arctan2_grad"});
 
 NNVM_REGISTER_OP(_npi_rarctan2_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rarctan2"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rarctan2"});
 
 NNVM_REGISTER_OP(_backward_npi_rarctan2_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rarctan2_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rarctan2_grad"});
 
 NNVM_REGISTER_OP(_npi_gcd_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"gcd"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"gcd"});
 
 NNVM_REGISTER_OP(_npi_lcm_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"lcm"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"lcm"});
 
 NNVM_REGISTER_OP(_npi_bitwise_and_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"bitwise_and"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"bitwise_and"});
 
 NNVM_REGISTER_OP(_npi_bitwise_xor_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"bitwise_xor"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"bitwise_xor"});
 
 NNVM_REGISTER_OP(_npi_bitwise_or_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"bitwise_or"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"bitwise_or"});
 
 NNVM_REGISTER_OP(_npi_ldexp)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"ldexp"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"ldexp"});
 
 NNVM_REGISTER_OP(_npi_ldexp_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"ldexp"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"ldexp"});
 
 NNVM_REGISTER_OP(_npi_rldexp_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rldexp"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rldexp"});
 
 NNVM_REGISTER_OP(_backward_npi_ldexp)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"ldexp_grad",
-                                                                     "ldexp_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        BinaryBroadcastRTCBackwardUseIn{"ldexp_grad", "ldexp_rgrad"});
 
 NNVM_REGISTER_OP(_backward_npi_ldexp_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"ldexp_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"ldexp_grad"});
 
 NNVM_REGISTER_OP(_backward_npi_rldexp_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rldexp_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rldexp_grad"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc b/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
index e1b94ac20765..91a9d2593867 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
+++ b/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cc
@@ -20,7 +20,8 @@
 /*!
  *  Copyright (c) 2019 by Contributors
  * \file np_elemwise_broadcast_op_extended_sec.cc
- * \brief CPU Implementation of extended functions for elementwise numpy binary broadcast operator. (Second extended file)
+ * \brief CPU Implementation of extended functions for elementwise numpy binary broadcast operator.
+ * (Second extended file)
  */
 
 #include "../../common/utils.h"
@@ -29,112 +30,114 @@
 namespace mxnet {
 namespace op {
 
-#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(name)                    \
-  NNVM_REGISTER_OP(name)                                                  \
-  .set_num_inputs(1)                                                      \
-  .set_num_outputs(1)                                                     \
-  .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
-  .set_attr<FResourceRequest>("FResourceRequest",                         \
-    [](const NodeAttrs& attrs) {                                          \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};   \
-    })                                                                    \
-  .add_argument("data", "NDArray-or-Symbol", "source input")              \
-  .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(name)                        \
+  NNVM_REGISTER_OP(name)                                                      \
+      .set_num_inputs(1)                                                      \
+      .set_num_outputs(1)                                                     \
+      .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
+      .set_attr<FResourceRequest>(                                            \
+          "FResourceRequest",                                                 \
+          [](const NodeAttrs& attrs) {                                        \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; \
+          })                                                                  \
+      .add_argument("data", "NDArray-or-Symbol", "source input")              \
+      .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(_npi_fmax)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::fmax>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmax"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::fmax>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmax"});
 
 NNVM_REGISTER_OP(_backward_npi_fmax)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::ge,
-                                                                  mshadow_op::lt>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::ge, mshadow_op::lt>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_fmax_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::fmax>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmax_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::fmax>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmax_scalar"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_fmax_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::ge>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::ge>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(_npi_fmin)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::fmin>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmin"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::fmin>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmin"});
 
 NNVM_REGISTER_OP(_backward_npi_fmin)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::le,
-                                                                  mshadow_op::gt>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::le, mshadow_op::gt>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_fmin_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::fmin>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmin_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::fmin>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmin_scalar"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_fmin_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::le>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::le>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(_npi_fmod)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::fmod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmod"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::fmod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmod"});
 
 NNVM_REGISTER_OP(_backward_npi_fmod)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::mod_grad,
-                                                                  mshadow_op::mod_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::mod_grad, mshadow_op::mod_rgrad>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_fmod_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::fmod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmod_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::fmod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_fmod_scalar"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_fmod_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::mod_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::mod_grad>);
 
 MXNET_OPERATOR_REGISTER_NP_BINARY_SCALAR(_npi_rfmod_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rfmod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_rfmod_scalar"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rfmod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_rfmod_scalar"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_npi_rfmod_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rmod_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rmod_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cu b/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cu
index 93d2cf18350e..2a20724b3505 100644
--- a/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cu
+++ b/src/operator/numpy/np_elemwise_broadcast_op_extended_sec.cu
@@ -20,7 +20,8 @@
 /*!
  *  Copyright (c) 2019 by Contributors
  * \file np_elemwise_broadcast_op_extended_sec.cu
- * \brief GPU Implementation of extended functions for elementwise binary broadcast operator. (Second extended file)
+ * \brief GPU Implementation of extended functions for elementwise binary broadcast operator.
+ * (Second extended file)
  */
 
 #include "./np_elemwise_broadcast_op.h"
@@ -28,49 +29,44 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_fmax)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"fmax"});
+NNVM_REGISTER_OP(_npi_fmax).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"fmax"});
 
 NNVM_REGISTER_OP(_backward_npi_fmax)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"greater_equal", "less"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"greater_equal", "less"});
 
 NNVM_REGISTER_OP(_npi_fmax_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"fmax"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"fmax"});
 
 NNVM_REGISTER_OP(_backward_npi_fmax_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"greater_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"greater_equal"});
 
-NNVM_REGISTER_OP(_npi_fmin)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"fmin"});
+NNVM_REGISTER_OP(_npi_fmin).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"fmin"});
 
 NNVM_REGISTER_OP(_backward_npi_fmin)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"less_equal",
-                                                                     "greater"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"less_equal", "greater"});
 
 NNVM_REGISTER_OP(_npi_fmin_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"fmin"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"fmin"});
 
 NNVM_REGISTER_OP(_backward_npi_fmin_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"less_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"less_equal"});
 
-NNVM_REGISTER_OP(_npi_fmod)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"fmod"});
+NNVM_REGISTER_OP(_npi_fmod).set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"fmod"});
 
 NNVM_REGISTER_OP(_backward_npi_fmod)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"mod_grad",
-                                                                     "mod_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"mod_grad", "mod_rgrad"});
 
 NNVM_REGISTER_OP(_npi_fmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"fmod"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"fmod"});
 
 NNVM_REGISTER_OP(_backward_npi_fmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"mod_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"mod_grad"});
 
 NNVM_REGISTER_OP(_npi_rfmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rfmod"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rfmod"});
 
 NNVM_REGISTER_OP(_backward_npi_rfmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rmod_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rmod_grad"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_elemwise_unary_op_basic.cc b/src/operator/numpy/np_elemwise_unary_op_basic.cc
index 5993999848ee..847a50cb36e6 100644
--- a/src/operator/numpy/np_elemwise_unary_op_basic.cc
+++ b/src/operator/numpy/np_elemwise_unary_op_basic.cc
@@ -29,65 +29,64 @@ namespace mxnet {
 namespace op {
 
 MXNET_OPERATOR_REGISTER_UNARY(_npx_relu)
-.describe(R"code(Computes rectified linear activation.
+    .describe(R"code(Computes rectified linear activation.
 
 .. math::
 
    max(features, 0)
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::relu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_relu"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::relu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_relu"});
 
 MXNET_OPERATOR_REGISTER_UNARY(_npx_sigmoid)
-.describe(R"code(Computes sigmoid of x element-wise.
+    .describe(R"code(Computes sigmoid of x element-wise.
 
 .. math::
 
    y = 1 / (1 + exp(-x))
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::sigmoid>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_sigmoid"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::sigmoid>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_sigmoid"});
 
 NNVM_REGISTER_OP(_npi_copy)
-.describe(R"code(Return an array copy of the given object.)code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input");
+    .describe(R"code(Return an array copy of the given object.)code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input");
 
 #define MXNET_OPERATOR_REGISTER_NUMPY_UNARY(__name$, __input_name$, __kernel$)            \
   NNVM_REGISTER_OP(__name$)                                                               \
-  .set_num_inputs(1)                                                                      \
-  .set_num_outputs(1)                                                                     \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                       \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                           \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                       \
-    [](const NodeAttrs& attrs){                                                           \
-      return std::vector<std::pair<int, int> >{{0, 0}};                                   \
-    })                                                                                    \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                     \
-    [](const NodeAttrs& attrs) {                                                          \
-      return std::vector<std::string>{__input_name$};                                     \
-    })                                                                                    \
-  .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, __kernel$>)                  \
-  .add_argument(__input_name$, "NDArray-or-Symbol", "The input array.")
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                       \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .set_attr<nnvm::FListInputNames>(                                                   \
+          "FListInputNames",                                                              \
+          [](const NodeAttrs& attrs) { return std::vector<std::string>{__input_name$}; }) \
+      .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, __kernel$>)              \
+      .add_argument(__input_name$, "NDArray-or-Symbol", "The input array.")
 
 inline bool MixedUnaryOpType(const nnvm::NodeAttrs& attrs,
                              std::vector<int>* in_attrs,
@@ -107,68 +106,64 @@ inline bool MixedUnaryOpType(const nnvm::NodeAttrs& attrs,
 
 #define MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(__name$, __input_name$, __kernel$) \
   NNVM_REGISTER_OP(__name$)                                                               \
-  .set_num_inputs(1)                                                                      \
-  .set_num_outputs(1)                                                                     \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                       \
-  .set_attr<nnvm::FInferType>("FInferType", MixedUnaryOpType)                             \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                       \
-    [](const NodeAttrs& attrs){                                                           \
-      return std::vector<std::pair<int, int> >{{0, 0}};                                   \
-    })                                                                                    \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                     \
-    [](const NodeAttrs& attrs) {                                                          \
-      return std::vector<std::string>{__input_name$};                                     \
-    })                                                                                    \
-  .set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeMixedType<cpu, __kernel$>)         \
-  .add_argument(__input_name$, "NDArray-or-Symbol", "The input array.")
-
-#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_IN(name)        \
-  NNVM_REGISTER_OP(name)                                            \
-  .set_num_inputs(2)                                                \
-  .set_num_outputs(1)                                               \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",               \
-    [](const NodeAttrs& attrs) {                                    \
-      return std::vector<std::string>{"lhs", "rhs"};                \
-    })                                                              \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>) \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                 \
-    [](const NodeAttrs& attrs){                                     \
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};     \
-    })                                                              \
-  .add_argument("lhs", "NDArray-or-Symbol", "first input")          \
-  .add_argument("rhs", "NDArray-or-Symbol", "second input")
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", MixedUnaryOpType)                         \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .set_attr<nnvm::FListInputNames>(                                                   \
+          "FListInputNames",                                                              \
+          [](const NodeAttrs& attrs) { return std::vector<std::string>{__input_name$}; }) \
+      .set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeMixedType<cpu, __kernel$>)     \
+      .add_argument(__input_name$, "NDArray-or-Symbol", "The input array.")
+
+#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_IN(name)                                      \
+  NNVM_REGISTER_OP(name)                                                                          \
+      .set_num_inputs(2)                                                                          \
+      .set_num_outputs(1)                                                                         \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         return std::vector<std::string>{"lhs", "rhs"};           \
+                                       })                                                         \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)                           \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                           \
+                                      [](const NodeAttrs& attrs) {                                \
+                                        return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}}; \
+                                      })                                                          \
+      .add_argument("lhs", "NDArray-or-Symbol", "first input")                                    \
+      .add_argument("rhs", "NDArray-or-Symbol", "second input")
 
 /*! \brief Binary launch */
-#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_INOUT(name)     \
-  NNVM_REGISTER_OP(name)                                            \
-  .set_num_inputs(3)                                                \
-  .set_num_outputs(1)                                               \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",               \
-    [](const NodeAttrs& attrs) {                                    \
-      return std::vector<std::string>{"lhs", "rhs"};                \
-    })                                                              \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>) \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                 \
-    [](const NodeAttrs& attrs){                                     \
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};     \
-    })                                                              \
-  .add_argument("lhs", "NDArray-or-Symbol", "first input")          \
-  .add_argument("rhs", "NDArray-or-Symbol", "second input")
-
-#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_IN_CPU(__name$, __kernel$)                    \
-  MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_IN(__name$)                                     \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::MixedUnaryBackwardUseInCompute<cpu,  \
-                                                                       __kernel$>)            \
-
-#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEIN_BWD_CPU(__name$, __kernel$)             \
-  MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_IN(__name$)                                     \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::MixedUnaryBackwardUseInCompute<cpu,  \
-                                                                       __kernel$>)            \
-
-#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEINOUT_BWD_CPU(__name$, __kernel$)             \
-  MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_INOUT(__name$)                                     \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::MixedUnaryBackwardUseInOutCompute<cpu,  \
-                                                                               __kernel$>)
+#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_INOUT(name)                                   \
+  NNVM_REGISTER_OP(name)                                                                          \
+      .set_num_inputs(3)                                                                          \
+      .set_num_outputs(1)                                                                         \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         return std::vector<std::string>{"lhs", "rhs"};           \
+                                       })                                                         \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)                           \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                           \
+                                      [](const NodeAttrs& attrs) {                                \
+                                        return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}}; \
+                                      })                                                          \
+      .add_argument("lhs", "NDArray-or-Symbol", "first input")                                    \
+      .add_argument("rhs", "NDArray-or-Symbol", "second input")
+
+#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_IN_CPU(__name$, __kernel$)    \
+  MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_IN(__name$).set_attr<FCompute>( \
+      "FCompute<cpu>", ElemwiseBinaryOp::MixedUnaryBackwardUseInCompute<cpu, __kernel$>)
+
+#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEIN_BWD_CPU(__name$, __kernel$) \
+  MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_IN(__name$).set_attr<FCompute>(     \
+      "FCompute<cpu>", ElemwiseBinaryOp::MixedUnaryBackwardUseInCompute<cpu, __kernel$>)
+
+#define MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEINOUT_BWD_CPU(__name$, __kernel$) \
+  MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_BWD_INOUT(__name$).set_attr<FCompute>(     \
+      "FCompute<cpu>", ElemwiseBinaryOp::MixedUnaryBackwardUseInOutCompute<cpu, __kernel$>)
 
 bool NumpyUnaryBoolOpType(const nnvm::NodeAttrs& attrs,
                           std::vector<int>* in_attrs,
@@ -176,7 +171,8 @@ bool NumpyUnaryBoolOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
-  if (in_attrs->at(0) == -1) return false;
+  if (in_attrs->at(0) == -1)
+    return false;
   if (out_attrs->at(0) == -1) {
     out_attrs->at(0) = mshadow::kBool;
   } else if (out_attrs->at(0) != mshadow::kBool) {
@@ -187,330 +183,328 @@ bool NumpyUnaryBoolOpType(const nnvm::NodeAttrs& attrs,
 
 #define MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(__name$, __input_name$, __kernel$)       \
   NNVM_REGISTER_OP(__name$)                                                               \
-  .set_num_inputs(1)                                                                      \
-  .set_num_outputs(1)                                                                     \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                       \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyUnaryBoolOpType)                         \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                       \
-    [](const NodeAttrs& attrs){                                                           \
-      return std::vector<std::pair<int, int> >{{0, 0}};                                   \
-    })                                                                                    \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                     \
-    [](const NodeAttrs& attrs) {                                                          \
-      return std::vector<std::string>{__input_name$};                                     \
-    })                                                                                    \
-  .set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeLogic<cpu, __kernel$>)             \
-  .add_argument(__input_name$, "NDArray-or-Symbol", "The input array.")
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyUnaryBoolOpType)                     \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .set_attr<nnvm::FListInputNames>(                                                   \
+          "FListInputNames",                                                              \
+          [](const NodeAttrs& attrs) { return std::vector<std::string>{__input_name$}; }) \
+      .set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeLogic<cpu, __kernel$>)         \
+      .add_argument(__input_name$, "NDArray-or-Symbol", "The input array.")
 
 // negative
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY(_npi_negative, "x", mshadow_op::negation)
-.describe(R"code(Numerical negative, element-wise.
+    .describe(R"code(Numerical negative, element-wise.
 Example::
     negative([1.,  -1.]) = [-1.,  1.]
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"});
 
 // reciprocal
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY(_npi_reciprocal, "x", mshadow_op::reciprocal)
-.describe(R"code(Return the reciprocal of the argument, element-wise.
+    .describe(R"code(Return the reciprocal of the argument, element-wise.
 Example::
     reciprocal([-2, 1, 3, 1.6, 0.2]) = [-0.5, 1.0, 0.33333334, 0.625, 5.0]
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_reciprocal"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_reciprocal"});
 
 // abs
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY(_npi_absolute, "x", mshadow_op::abs)
-.add_alias("_npi_abs")
-.describe(R"code(Returns element-wise absolute value of the input.
+    .add_alias("_npi_abs")
+    .describe(R"code(Returns element-wise absolute value of the input.
 Example::
    absolute([-2, 0, 3]) = [2, 0, 3]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_abs"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_abs"});
 
 // sign
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY(_npi_sign, "x", mshadow_op::sign)
-.describe(R"code(Returns an element-wise indication of the sign of a number.
+    .describe(R"code(Returns an element-wise indication of the sign of a number.
 The sign function returns -1 if x < 0, 0 if x==0, 1 if x > 0.
 Example::
    sign([-2, 0, 3]) = [-1, 0, 1]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // rint
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_rint, "x", mshadow_op::rint)
-.describe(R"code(Round elements of the array to the nearest integer.
+    .describe(R"code(Round elements of the array to the nearest integer.
 Example::
    rint([-1.7, -1.5, -0.2, 0.2, 1.5, 1.7, 2.0]) = [-2., -2., -0.,  0.,  2.,  2.,  2.]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // ceil
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_ceil, "x", mshadow_op::ceil)
-.describe(R"code(Return the ceiling of the input, element-wise.
+    .describe(R"code(Return the ceiling of the input, element-wise.
 The ceil of the scalar x is the smallest integer i, such that i >= x.
 Example::
    ceil([-1.7, -1.5, -0.2, 0.2, 1.5, 1.7, 2.0]) = [-1., -1., -0.,  1.,  2.,  2.,  2.]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // floor
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_floor, "x", mshadow_op::floor)
-.describe(R"code(Return the floor of the input, element-wise.
+    .describe(R"code(Return the floor of the input, element-wise.
 The floor of the scalar x is the largest integer i, such that i <= x.
 Example::
    floor([-1.7, -1.5, -0.2, 0.2, 1.5, 1.7, 2.0]) = [-2., -2., -1.,  0.,  1.,  1.,  2.]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // bitwise_not
 NNVM_REGISTER_OP(_npi_bitwise_not)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"x"};
-})
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeInt<cpu, mshadow_op::bitwise_not>)
-.add_argument("x", "NDArray-or-Symbol", "The input array.")
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"x"};
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeInt<cpu, mshadow_op::bitwise_not>)
+    .add_argument("x", "NDArray-or-Symbol", "The input array.")
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // trunc
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_trunc, "x", mshadow_op::trunc)
-.describe(R"code(Return the truncated value of the input, element-wise.
+    .describe(R"code(Return the truncated value of the input, element-wise.
 The truncated value of the scalar x is the nearest integer i which is closer to
 zero than x is. In short, the fractional part of the signed number x is discarded.
 Example::
    trunc([-1.7, -1.5, -0.2, 0.2, 1.5, 1.7, 2.0]) = [-1., -1., -0.,  0.,  1.,  1.,  2.]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // fix
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_fix, "x", mshadow_op::fix)
-.describe(R"code(Round to nearest integer towards zero.
+    .describe(R"code(Round to nearest integer towards zero.
 Round an array of floats element-wise to nearest integer towards zero.
 The rounded values are returned as floats.
 Example::
    fix([-2.1, -1.9, 1.9, 2.1]) = [-2., -1.,  1., 2.]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // square
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY(_npi_square, "x", mshadow_op::square)
-.describe(R"code(Return the element-wise square of the input.
+    .describe(R"code(Return the element-wise square of the input.
 Example::
    square([2, 3, 4]) = [4, 9, 16]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square"});
 
 // sqrt
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_sqrt, "x", mshadow_op::square_root)
-.describe(R"code(Return the non-negative square-root of an array, element-wise.
+    .describe(R"code(Return the non-negative square-root of an array, element-wise.
 Example::
    sqrt([4, 9, 16]) = [2, 3, 4]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_sqrt"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_sqrt"});
 
 // cbrt
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_cbrt, "x", mshadow_op::cube_root)
-.describe(R"code(Return the cube-root of an array, element-wise.
+    .describe(R"code(Return the cube-root of an array, element-wise.
 Example::
    cbrt([1, 8, -125]) = [1, 2, -5]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_cbrt"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_cbrt"});
 
 // exp
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_exp, "x", mshadow_op::exp)
-.describe(R"code(Calculate the exponential of all elements in the input array.
+    .describe(R"code(Calculate the exponential of all elements in the input array.
 Example::
    exp([0, 1, 2]) = [1., 2.71828175, 7.38905621]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_exp"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_exp"});
 
 // log
 NNVM_REGISTER_OP(_npi_log)
-.describe(R"code(Returns element-wise Natural logarithmic value of the input.
+    .describe(R"code(Returns element-wise Natural logarithmic value of the input.
 The natural logarithm is logarithm in base *e*, so that ``log(exp(x)) = x``
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", MixedUnaryOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"x"};
-  })
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeMixedType<cpu, mshadow_op::log>)
-.add_argument("x", "NDArray-or-Symbol", "The input array.")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log"});
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", MixedUnaryOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"x"};
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::ComputeMixedType<cpu, mshadow_op::log>)
+    .add_argument("x", "NDArray-or-Symbol", "The input array.")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log"});
 
 // log10
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_log10, "x", mshadow_op::log10)
-.describe(R"code(Returns element-wise Base-10 logarithmic value of the input.
+    .describe(R"code(Returns element-wise Base-10 logarithmic value of the input.
 ``10**log10(x) = x``
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log10"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log10"});
 
 // log2
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_log2, "x", mshadow_op::log2)
-.describe(R"code(Returns element-wise Base-2 logarithmic value of the input.
+    .describe(R"code(Returns element-wise Base-2 logarithmic value of the input.
 ``2**log2(x) = x``
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log2"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log2"});
 
 // log1p
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_log1p, "x", mshadow_op::log1p)
-.describe(R"code(Return the natural logarithm of one plus the input array, element-wise.
+    .describe(R"code(Return the natural logarithm of one plus the input array, element-wise.
 Calculates ``log(1 + x)``.
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log1p"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_log1p"});
 
 // expm1
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_expm1, "x", mshadow_op::expm1)
-.describe(R"code(Calculate ``exp(x) - 1`` for all elements in the array.)code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_expm1"});
-
+    .describe(R"code(Calculate ``exp(x) - 1`` for all elements in the array.)code" ADD_FILELINE)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_expm1"});
 
 // logical_not
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(_npi_logical_not, "x", mshadow_op::np_logical_not)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // isnan
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(_npi_isnan, "x", mshadow_op::isnan)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // isinf
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(_npi_isinf, "x", mshadow_op::isinf)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // isposinf
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(_npi_isposinf, "x", mshadow_op::isposinf)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // isneginf
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(_npi_isneginf, "x", mshadow_op::isneginf)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // isfinite
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_BOOL(_npi_isfinite, "x", mshadow_op::isfinite)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // sin
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_sin, "x", mshadow_op::sin)
-.describe(R"code(Trigonometric sine, element-wise.
+    .describe(R"code(Trigonometric sine, element-wise.
 .. math::
    sin([0, \pi/4, \pi/2]) = [0, 0.707, 1]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_sin" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_sin"});
 
 // cos
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_cos, "x", mshadow_op::cos)
-.describe(R"code(Computes the element-wise cosine of the input array.
+    .describe(R"code(Computes the element-wise cosine of the input array.
 .. math::
    cos([0, \pi/4, \pi/2]) = [1, 0.707, 0]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_cos"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_cos"});
 
 // tan
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_tan, "x", mshadow_op::tan)
-.describe(R"code(Computes the element-wise tangent of the input array.
+    .describe(R"code(Computes the element-wise tangent of the input array.
 .. math::
    tan([0, \pi/4, \pi/2]) = [0, 1, -inf]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{ "_backward_npi_tan" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_tan"});
 
 // arcsin
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_arcsin, "x", mshadow_op::arcsin)
-.describe(R"code(Returns element-wise inverse sine of the input array.
+    .describe(R"code(Returns element-wise inverse sine of the input array.
 .. math::
    arcsin([-1, -.707, 0, .707, 1]) = [-\pi/2, -\pi/4, 0, \pi/4, \pi/2]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_arcsin" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arcsin"});
 
 // arccos
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_arccos, "x", mshadow_op::arccos)
-.describe(R"code(Returns element-wise inverse cosine of the input array.
+    .describe(R"code(Returns element-wise inverse cosine of the input array.
 The input should be in range `[-1, 1]`.
 The output is in the closed interval :math:`[0, \pi]`
 .. math::
    arccos([-1, -.707, 0, .707, 1]) = [\pi, 3\pi/4, \pi/2, \pi/4, 0]
 The storage type of ``arccos`` output is always dense
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_arccos" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arccos"});
 
 // arctan
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_arctan, "x", mshadow_op::arctan)
-.describe(R"code(Returns element-wise inverse tangent of the input array.
+    .describe(R"code(Returns element-wise inverse tangent of the input array.
 .. math::
    arctan([-1, 0, 1]) = [-\pi/4, 0, \pi/4]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_arctan" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arctan"});
 
 // degrees
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_degrees, "x", mshadow_op::degrees)
-.describe(R"code(Converts each element of the input array from radians to degrees.
+    .describe(R"code(Converts each element of the input array from radians to degrees.
 .. math::
    degrees([0, \pi/2, \pi, 3\pi/2, 2\pi]) = [0, 90, 180, 270, 360]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_degrees" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_degrees"});
 
 // radians
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_radians, "x", mshadow_op::radians)
-.describe(R"code(Converts each element of the input array from degrees to radians.
+    .describe(R"code(Converts each element of the input array from degrees to radians.
 .. math::
    radians([0, 90, 180, 270, 360]) = [0, \pi/2, \pi, 3\pi/2, 2\pi]
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_radians" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_radians"});
 
 // sinh
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_sinh, "x", mshadow_op::sinh)
-.describe(R"code(Returns the hyperbolic sine of the input array, computed element-wise.
+    .describe(R"code(Returns the hyperbolic sine of the input array, computed element-wise.
 .. math::
    sinh(x) = 0.5\times(exp(x) - exp(-x))
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_sinh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_sinh"});
 
 // cosh
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_cosh, "x", mshadow_op::cosh)
-.describe(R"code(Returns the hyperbolic cosine  of the input array, computed element-wise.
+    .describe(R"code(Returns the hyperbolic cosine  of the input array, computed element-wise.
 .. math::
    cosh(x) = 0.5\times(exp(x) + exp(-x))
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_cosh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_cosh"});
 
 // tanh
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_tanh, "x", mshadow_op::tanh)
-.describe(R"code(Returns the hyperbolic tangent of the input array, computed element-wise.
+    .describe(R"code(Returns the hyperbolic tangent of the input array, computed element-wise.
 .. math::
    tanh(x) = sinh(x) / cosh(x)
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{ "_backward_npi_tanh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_npi_tanh"});
 
 // arcsinh
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_arcsinh, "x", mshadow_op::arcsinh)
-.describe(R"code(Returns the element-wise inverse hyperbolic sine of the input array, \
+    .describe(R"code(Returns the element-wise inverse hyperbolic sine of the input array, \
 computed element-wise.
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_arcsinh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arcsinh"});
 
 // arccosh
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_arccosh, "x", mshadow_op::arccosh)
-.describe(R"code(Returns the element-wise inverse hyperbolic cosine of the input array, \
+    .describe(R"code(Returns the element-wise inverse hyperbolic cosine of the input array, \
 computed element-wise.
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_arccosh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arccosh"});
 
 // arctanh
 MXNET_OPERATOR_REGISTER_NUMPY_MIXED_TYPE_UNARY(_npi_arctanh, "x", mshadow_op::arctanh)
-.describe(R"code(Returns the element-wise inverse hyperbolic tangent of the input array, \
+    .describe(R"code(Returns the element-wise inverse hyperbolic tangent of the input array, \
 computed element-wise.
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_npi_arctanh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_arctanh"});
 
 inline bool AroundOpType(const nnvm::NodeAttrs& attrs,
                          std::vector<int>* in_attrs,
@@ -528,75 +522,75 @@ inline bool AroundOpType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(AroundParam);
 
 NNVM_REGISTER_OP(_npi_around)
-.set_attr_parser(ParamParser<AroundParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"x"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", AroundOpType)
-.set_attr<FCompute>("FCompute<cpu>", AroundOpForward<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("x", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(AroundParam::__FIELDS__())
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr_parser(ParamParser<AroundParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"x"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", AroundOpType)
+    .set_attr<FCompute>("FCompute<cpu>", AroundOpForward<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("x", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(AroundParam::__FIELDS__())
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 DMLC_REGISTER_PARAMETER(NumpyNanToNumParam);
 
 NNVM_REGISTER_OP(_npi_nan_to_num)
-.describe("" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyNanToNumParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyNanToNumOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_npi_backward_nan_to_num"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyNanToNumParam::__FIELDS__());
+    .describe("" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyNanToNumParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyNanToNumOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_npi_backward_nan_to_num"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyNanToNumParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_backward_nan_to_num)
-.set_attr_parser(ParamParser<NumpyNanToNumParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyNanToNumOpBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyNanToNumParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyNanToNumOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_backward_npi_exp)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "mid", "rhs"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-  })
-.add_argument("lhs", "NDArray-or-Symbol", "first input")
-.add_argument("rhs", "NDArray-or-Symbol", "second input")
-.set_attr<FCompute>("FCompute<cpu>",
-                    ElemwiseBinaryOp::MixedUnaryBackwardUseInOutCompute<cpu,
-                    op::mshadow_op::mul>)
-.set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */
-                              [](const NodeAttrs& attrs) {
-                                return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-                              })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "mid", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .add_argument("lhs", "NDArray-or-Symbol", "first input")
+    .add_argument("rhs", "NDArray-or-Symbol", "second input")
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::MixedUnaryBackwardUseInOutCompute<cpu, op::mshadow_op::mul>)
+    .set_attr<FResourceRequest>("FResourceRequest", /* For Sparse CSR */
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true);
 
 MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEIN_BWD_CPU(_backward_npi_log,
                                                       unary_bwd<mshadow_op::log_grad>);
@@ -622,8 +616,7 @@ MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEINOUT_BWD_CPU(_backward_npi_cbrt,
 MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEIN_BWD_CPU(_backward_npi_sin,
                                                       unary_bwd<mshadow_op::sin_grad>);
 
-MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_IN_CPU(_backward_npi_cos,
-                                               unary_bwd<mshadow_op::cos_grad>);
+MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_IN_CPU(_backward_npi_cos, unary_bwd<mshadow_op::cos_grad>);
 
 MXNET_OPERATOR_REGISTER_UNARY_MIXEDTYPE_USEINOUT_BWD_CPU(_backward_npi_tan,
                                                          unary_bwd<mshadow_op::tan_grad>);
diff --git a/src/operator/numpy/np_elemwise_unary_op_basic.cu b/src/operator/numpy/np_elemwise_unary_op_basic.cu
index d11a4addf97c..aabc070dea04 100644
--- a/src/operator/numpy/np_elemwise_unary_op_basic.cu
+++ b/src/operator/numpy/np_elemwise_unary_op_basic.cu
@@ -27,16 +27,14 @@
 namespace mxnet {
 namespace op {
 
-#define MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(__name$, __kernel$)       \
-  NNVM_REGISTER_OP(__name$)                                               \
-  .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{#__kernel$})
+#define MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(__name$, __kernel$) \
+  NNVM_REGISTER_OP(__name$).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{#__kernel$})
 
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(_npx_relu, relu);
 
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(_npx_sigmoid, sigmoid);
 
-NNVM_REGISTER_OP(_npi_copy)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(_npi_copy).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(_npi_negative, negation);
 
@@ -116,80 +114,78 @@ MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(_npi_arccosh, arccosh);
 
 MXNET_OPERATOR_REGISTER_NUMPY_UNARY_GPU(_npi_arctanh, arctanh);
 
-NNVM_REGISTER_OP(_npi_around)
-.set_attr<FCompute>("FCompute<gpu>", AroundOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_around).set_attr<FCompute>("FCompute<gpu>", AroundOpForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_nan_to_num)
-.set_attr<FCompute>("FCompute<gpu>", NumpyNanToNumOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_nan_to_num).set_attr<FCompute>("FCompute<gpu>", NumpyNanToNumOpForward<gpu>);
 
 NNVM_REGISTER_OP(_npi_backward_nan_to_num)
-.set_attr<FCompute>("FCompute<gpu>", NumpyNanToNumOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyNanToNumOpBackward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_exp)
-.set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"mul"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"mul"});
 
 NNVM_REGISTER_OP(_backward_npi_log)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log"});
 
 NNVM_REGISTER_OP(_backward_npi_log10)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log10"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log10"});
 
 NNVM_REGISTER_OP(_backward_npi_log2)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log2"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log2"});
 
 NNVM_REGISTER_OP(_backward_npi_log1p)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log1p"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log1p"});
 
 NNVM_REGISTER_OP(_backward_npi_expm1)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_expm1"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_expm1"});
 
 NNVM_REGISTER_OP(_backward_npi_sqrt)
-.set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_sqrt"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_sqrt"});
 
 NNVM_REGISTER_OP(_backward_npi_cbrt)
-.set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_cbrt"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_cbrt"});
 
 NNVM_REGISTER_OP(_backward_npi_sin)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sin"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sin"});
 
 NNVM_REGISTER_OP(_backward_npi_cos)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cos"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cos"});
 
 NNVM_REGISTER_OP(_backward_npi_tan)
-.set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_tan"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_tan"});
 
 NNVM_REGISTER_OP(_backward_npi_arcsin)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsin"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsin"});
 
 NNVM_REGISTER_OP(_backward_npi_arccos)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccos"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccos"});
 
 NNVM_REGISTER_OP(_backward_npi_arctan)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctan"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctan"});
 
 NNVM_REGISTER_OP(_backward_npi_degrees)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_degrees"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_degrees"});
 
 NNVM_REGISTER_OP(_backward_npi_radians)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_radians"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_radians"});
 
 NNVM_REGISTER_OP(_backward_npi_cosh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cosh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cosh"});
 
 NNVM_REGISTER_OP(_backward_npi_sinh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sinh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sinh"});
 
 NNVM_REGISTER_OP(_backward_npi_tanh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_tanh"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryBwdInOutRTCCompute{"backward_tanh"});
 
 NNVM_REGISTER_OP(_backward_npi_arcsinh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsinh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsinh"});
 
 NNVM_REGISTER_OP(_backward_npi_arccosh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccosh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccosh"});
 
 NNVM_REGISTER_OP(_backward_npi_arctanh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctanh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctanh"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_fill_diagonal_op-inl.h b/src/operator/numpy/np_fill_diagonal_op-inl.h
index c173db4730e6..3c1bfe964bd6 100644
--- a/src/operator/numpy/np_fill_diagonal_op-inl.h
+++ b/src/operator/numpy/np_fill_diagonal_op-inl.h
@@ -41,28 +41,27 @@ struct NumpyFillDiagonalParam : public dmlc::Parameter<NumpyFillDiagonalParam> {
   Tuple<double> val;
   bool wrap;
   DMLC_DECLARE_PARAMETER(NumpyFillDiagonalParam) {
-    DMLC_DECLARE_FIELD(val)
-      .describe("Value to be written on the diagonal, "
-                "its type must be compatible with that of the array a.");
-    DMLC_DECLARE_FIELD(wrap)
-    .set_default(false)
-    .describe("The diagonal “wrapped” after N columns."
-              "You can have this behavior with this option. "
-              "This affects only tall matrices.");
+    DMLC_DECLARE_FIELD(val).describe(
+        "Value to be written on the diagonal, "
+        "its type must be compatible with that of the array a.");
+    DMLC_DECLARE_FIELD(wrap).set_default(false).describe(
+        "The diagonal “wrapped” after N columns."
+        "You can have this behavior with this option. "
+        "This affects only tall matrices.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream val_s, wrap_s;
     val_s << val;
     wrap_s << wrap;
-    (*dict)["val"] = val_s.str();
+    (*dict)["val"]  = val_s.str();
     (*dict)["wrap"] = wrap_s.str();
   }
 };
 
 inline bool NumpyFillDiagonalOpShape(const nnvm::NodeAttrs& attrs,
-                                      mxnet::ShapeVector* in_attrs,
-                                      mxnet::ShapeVector* out_attrs) {
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -85,11 +84,16 @@ inline bool NumpyFillDiagonalOpShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-template<int req>
+template <int req>
 struct FillDiagonalOpForwardImpl {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const double* val, int length, index_t step, index_t end){
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const double* val,
+                                  int length,
+                                  index_t step,
+                                  index_t end) {
     using namespace mxnet_op;
     if (i < end) {
       if (i % step == 0) {
@@ -99,7 +103,7 @@ struct FillDiagonalOpForwardImpl {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyFillDiagonalForward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -109,37 +113,40 @@ void NumpyFillDiagonalForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
+  const TBlob& in_data  = inputs[0];
   const TBlob& out_data = outputs[0];
   CHECK_GE(in_data.ndim(), 2) << "Input ndim must greater or equal 2.";
   const TShape inshape = in_data.shape_;
 
   const NumpyFillDiagonalParam& param = nnvm::get<NumpyFillDiagonalParam>(attrs.parsed);
-  Tuple<double> val_data = param.val;
-  bool wrap = param.wrap;
+  Tuple<double> val_data              = param.val;
+  bool wrap                           = param.wrap;
 
   size_t total_temp_size = val_data.ndim() * sizeof(double);
   Tensor<xpu, 1, char> temp_space =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(total_temp_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(total_temp_size), s);
   double* val = reinterpret_cast<double*>(temp_space.dptr_);
 
   // filling in
   if (ctx.run_ctx.ctx.dev_mask() == gpu::kDevMask) {
-  #if MXNET_USE_CUDA
-    cudaMemcpyAsync(val, val_data.begin(), val_data.ndim() * sizeof(double),
-                    cudaMemcpyHostToDevice, Stream<gpu>::GetStream(ctx.get_stream<gpu>()));
-  #else
+#if MXNET_USE_CUDA
+    cudaMemcpyAsync(val,
+                    val_data.begin(),
+                    val_data.ndim() * sizeof(double),
+                    cudaMemcpyHostToDevice,
+                    Stream<gpu>::GetStream(ctx.get_stream<gpu>()));
+#else
     LOG(FATAL) << "Illegal attempt to use GPU in a CPU-only build";
-  #endif
+#endif
   } else {
     std::memcpy(val, val_data.begin(), val_data.ndim() * sizeof(double));
   }
 
   // for kernel
   int64_t step = 0;
-  int64_t end = 0;
+  int64_t end  = 0;
   // wrap only works when ndim is 2
   if (in_data.ndim() == 2) {
     if (!wrap) {
@@ -162,9 +169,14 @@ void NumpyFillDiagonalForward(const nnvm::NodeAttrs& attrs,
 
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<FillDiagonalOpForwardImpl<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-          val, val_data.ndim(), step, end);
+      Kernel<FillDiagonalOpForwardImpl<req_type>, xpu>::Launch(s,
+                                                               out_data.Size(),
+                                                               out_data.dptr<DType>(),
+                                                               in_data.dptr<DType>(),
+                                                               val,
+                                                               val_data.ndim(),
+                                                               step,
+                                                               end);
     });
   });
 }
diff --git a/src/operator/numpy/np_fill_diagonal_op.cc b/src/operator/numpy/np_fill_diagonal_op.cc
index 13f0fe515bd2..f48170125b84 100644
--- a/src/operator/numpy/np_fill_diagonal_op.cc
+++ b/src/operator/numpy/np_fill_diagonal_op.cc
@@ -18,10 +18,10 @@
  */
 
 /*!
-* Copyright (c) 2020 by Contributors
-* \file np_fill_diagonal_op.cc
-* \brief CPU implementation of numpy fill_diagonal operator
-*/
+ * Copyright (c) 2020 by Contributors
+ * \file np_fill_diagonal_op.cc
+ * \brief CPU implementation of numpy fill_diagonal operator
+ */
 
 #include "./np_fill_diagonal_op-inl.h"
 
@@ -31,24 +31,24 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyFillDiagonalParam);
 
 NNVM_REGISTER_OP(_npi_fill_diagonal)
-.describe(R"code(Fill the main diagonal of the given array"
-  "of any dimensionality.)code"
-  ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) { return std::vector<std::string>{"a"};
-})
-.set_attr_parser(ParamParser<NumpyFillDiagonalParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyFillDiagonalOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyFillDiagonalForward<cpu>)
-.add_argument("a", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyFillDiagonalParam::__FIELDS__());
+    .describe(R"code(Fill the main diagonal of the given array"
+  "of any dimensionality.)code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyFillDiagonalParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyFillDiagonalOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyFillDiagonalForward<cpu>)
+    .add_argument("a", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyFillDiagonalParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_fill_diagonal_op.cu b/src/operator/numpy/np_fill_diagonal_op.cu
index 6879547624a7..71fae8996c60 100644
--- a/src/operator/numpy/np_fill_diagonal_op.cu
+++ b/src/operator/numpy/np_fill_diagonal_op.cu
@@ -29,7 +29,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_fill_diagonal)
-.set_attr<FCompute>("FCompute<gpu>", NumpyFillDiagonalForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyFillDiagonalForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_indexing_op.cc b/src/operator/numpy/np_indexing_op.cc
index 1f1fecc1c8f3..63fc54ac14a0 100644
--- a/src/operator/numpy/np_indexing_op.cc
+++ b/src/operator/numpy/np_indexing_op.cc
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file np_indexing_op.cc
-*/
+ */
 
 #include "./np_indexing_op.h"
 
@@ -32,11 +32,15 @@ struct AdvancedIndexingTakeCPU {
   // M is the number of columns of in_data and out_data
   // K is the number of rows of in_data
   // i is the index of out_data
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const IType* idx, const size_t M, const int64_t K) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const size_t M,
+                                  const int64_t K) {
     int64_t j = static_cast<int64_t>(idx[i]);
-    j = j % K;
+    j         = j % K;
     j += (j < 0) ? K : 0;
 #pragma GCC diagnostic push
 #if __GNUC__ >= 8
@@ -53,11 +57,15 @@ struct AdvancedIndexingTakeMultiDimensionCPU {
   // M is the number of columns of in_data and out_data
   // K is the number of rows of in_data
   // i is the index of out_data
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const IType* idx, const size_t M, const int64_t K) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const size_t M,
+                                  const int64_t K) {
     int64_t j = static_cast<int64_t>(idx[i]);
-    j = j % K;
+    j         = j % K;
     j += (j < 0) ? K : 0;
 #pragma GCC diagnostic push
 #if __GNUC__ >= 8
@@ -69,7 +77,7 @@ struct AdvancedIndexingTakeMultiDimensionCPU {
 };
 
 struct AdvancedIndexingBooleanMaskBackwardCPUWriteKernel {
-  template<typename DType>
+  template <typename DType>
   static void Map(int i,
                   DType* igrad,
                   const OpReqType /*req*/,
@@ -92,9 +100,11 @@ struct AdvancedIndexingBooleanMaskBackwardCPUWriteKernel {
   }
 };
 
-template<typename DType>
-bool CheckIndexOutOfBound(const DType* data_ptr, size_t data_size,
-                          const DType min, const DType max) {
+template <typename DType>
+bool CheckIndexOutOfBound(const DType* data_ptr,
+                          size_t data_size,
+                          const DType min,
+                          const DType max) {
   bool is_valid = true;
   for (size_t i = 0; i < data_size; i++) {
     if (data_ptr[i] > max || data_ptr[i] < min) {
@@ -105,23 +115,27 @@ bool CheckIndexOutOfBound(const DType* data_ptr, size_t data_size,
   return is_valid;
 }
 
-template<typename DType>
-void GatherNDCheckBoundCPU(mshadow::Stream<cpu> *s, const DType* idx_ptr, index_t N,
-                        index_t M, const mshadow::Shape<10> mshape, DType* is_valid_dim_ptr) {
+template <typename DType>
+void GatherNDCheckBoundCPU(mshadow::Stream<cpu>* s,
+                           const DType* idx_ptr,
+                           index_t N,
+                           index_t M,
+                           const mshadow::Shape<10> mshape,
+                           DType* is_valid_dim_ptr) {
   using namespace mxnet_op;
   Kernel<set_zero, cpu>::Launch(s, M, is_valid_dim_ptr);
   Kernel<is_valid_check_gather_nd, cpu>::Launch(s, M, is_valid_dim_ptr, idx_ptr, N, mshape);
   for (int m = 0; m < M; m++) {
-    if (is_valid_dim_ptr[m] > mshape[m] - 1 || is_valid_dim_ptr[m] < - mshape[m]) {
-      LOG(FATAL)<< "IndexError: index " << is_valid_dim_ptr[m] << " is out of bounds for axis "
-        << m << " with size " << mshape[m];
+    if (is_valid_dim_ptr[m] > mshape[m] - 1 || is_valid_dim_ptr[m] < -mshape[m]) {
+      LOG(FATAL) << "IndexError: index " << is_valid_dim_ptr[m] << " is out of bounds for axis "
+                 << m << " with size " << mshape[m];
     }
   }
 }
 
 inline bool AdvancedIndexingOpType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK_NE((*in_attrs)[1], -1) << "Index type must be set for take operator";
@@ -132,16 +146,16 @@ inline bool AdvancedIndexingOpType(const nnvm::NodeAttrs& attrs,
 }
 
 bool AdvancedIndexingOpStorageType(const nnvm::NodeAttrs& attrs,
-                            const int dev_mask,
-                            DispatchMode* dispatch_mode,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+                                   const int dev_mask,
+                                   DispatchMode* dispatch_mode,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
   *dispatch_mode = DispatchMode::kFComputeEx;
@@ -149,40 +163,41 @@ bool AdvancedIndexingOpStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 bool AdvancedIndexingOpBackStorageType(const nnvm::NodeAttrs& attrs,
-                                const int dev_mask,
-                                DispatchMode* dispatch_mode,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                       const int dev_mask,
+                                       DispatchMode* dispatch_mode,
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3);
   CHECK_EQ(out_attrs->size(), 2);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
-  for (int & out_attr : *out_attrs)
+  for (int& out_attr : *out_attrs)
     out_attr = kDefaultStorage;
   *dispatch_mode = DispatchMode::kFComputeEx;
   return true;
 }
 
-template<>
+template <>
 void AdvancedIndexingOpForward<cpu>(const nnvm::NodeAttrs& attrs,
-                        const OpContext& ctx,
-                        const std::vector<NDArray>& inputs,
-                        const std::vector<OpReqType>& req,
-                        const std::vector<NDArray>& outputs) {
+                                    const OpContext& ctx,
+                                    const std::vector<NDArray>& inputs,
+                                    const std::vector<OpReqType>& req,
+                                    const std::vector<NDArray>& outputs) {
   using namespace mxnet_op;
-  if (req[np_indexing_::kOut] == kNullOp) return;
+  if (req[np_indexing_::kOut] == kNullOp)
+    return;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
   if (inputs[np_indexing_::kIdx].dtype() == mshadow::kBool) {
     CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
-    const NDArray &data = inputs[0];
-    const NDArray &idx = inputs[1];
-    const NDArray &out = outputs[0];
+    const NDArray& data = inputs[0];
+    const NDArray& idx  = inputs[1];
+    const NDArray& out  = outputs[0];
     CHECK_EQ(data.shape()[0], idx.shape()[0]);
     CHECK_EQ(idx.shape().ndim(), 1U);  // idx is required to be 1-d.
     // count the number of 1s in `idx`, so that we could know the output dimension
@@ -198,17 +213,20 @@ void AdvancedIndexingOpForward<cpu>(const nnvm::NodeAttrs& attrs,
     valid_num = prefix_sum[idx_size - 1];
     // set the output shape forcefully
     mxnet::TShape s = data.shape();
-    s[0] = valid_num;
+    s[0]            = valid_num;
 
-    const_cast<NDArray &>(out).Init(s);
+    const_cast<NDArray&>(out).Init(s);
     // do the copy
     MSHADOW_TYPE_SWITCH_WITH_BOOL(data.dtype(), DType, {
-      size_t input_size = data.shape().Size();
-      size_t col_size = input_size / idx_size;
-      mshadow::Stream<cpu> *stream = ctx.get_stream<cpu>();
-      mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(
-        stream, idx_size, out.data().dptr<DType>(), data.data().dptr<DType>(),
-        prefix_sum.data(), col_size);
+      size_t input_size            = data.shape().Size();
+      size_t col_size              = input_size / idx_size;
+      mshadow::Stream<cpu>* stream = ctx.get_stream<cpu>();
+      mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(stream,
+                                                                 idx_size,
+                                                                 out.data().dptr<DType>(),
+                                                                 data.data().dptr<DType>(),
+                                                                 prefix_sum.data(),
+                                                                 col_size);
     });
   } else if (inputs[np_indexing_::kIdx].dtype() == mshadow::kInt8 ||
              inputs[np_indexing_::kIdx].dtype() == mshadow::kInt16 ||
@@ -234,94 +252,106 @@ void AdvancedIndexingOpForward<cpu>(const nnvm::NodeAttrs& attrs,
       }
     }
 
-    const NDArray &out = outputs[0];
-    const_cast<NDArray &>(out).Init(oshape);
+    const NDArray& out = outputs[0];
+    const_cast<NDArray&>(out).Init(oshape);
 
-    Stream<cpu> *s = ctx.get_stream<cpu>();
+    Stream<cpu>* s = ctx.get_stream<cpu>();
 
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[np_indexing_::kOut].dtype(), DType, {  // output data type
       MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[np_indexing_::kIdx].dtype(), IType, {  // index data type
         IType min = 0;
         IType max = static_cast<IType>(arrshape[0] - 1);
         // check with single thread is faster since data is small
-        IType* idx_ptr = inputs[np_indexing_::kIdx].data().dptr<IType>();
+        IType* idx_ptr  = inputs[np_indexing_::kIdx].data().dptr<IType>();
         size_t idx_size = idxshape.Size();
-        bool is_valid = CheckIndexOutOfBound(idx_ptr, idx_size, min, max);
+        bool is_valid   = CheckIndexOutOfBound(idx_ptr, idx_size, min, max);
         CHECK(is_valid) << "take operator contains indices out of bound";
-        Kernel<AdvancedIndexingTakeCPU, cpu>::Launch(s, idxshape.Size(),
-                                                  outputs[np_indexing_::kOut].data().dptr<DType>(),
-                                                  inputs[np_indexing_::kArr].data().dptr<DType>(),
-                                                  inputs[np_indexing_::kIdx].data().dptr<IType>(),
-                                                  oshape.Size()/idxshape.Size(), arrshape[0]);
+        Kernel<AdvancedIndexingTakeCPU, cpu>::Launch(
+            s,
+            idxshape.Size(),
+            outputs[np_indexing_::kOut].data().dptr<DType>(),
+            inputs[np_indexing_::kArr].data().dptr<DType>(),
+            inputs[np_indexing_::kIdx].data().dptr<IType>(),
+            oshape.Size() / idxshape.Size(),
+            arrshape[0]);
       });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type. "
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type. "
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
-template<>
+template <>
 void AdvancedIndexingOpBackward<cpu>(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<NDArray> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<NDArray> &outputs) {
+                                     const OpContext& ctx,
+                                     const std::vector<NDArray>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
-  if (inputs[np_indexing_::kIdx+1].dtype() == mshadow::kBool) {
+  if (inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kBool) {
     // inputs: {ograd, data, idx}
     // outputs: {igrad_data, igrad_idx}
-    const NDArray& ograd = inputs[0];
-    const NDArray& idx = inputs[2];
+    const NDArray& ograd      = inputs[0];
+    const NDArray& idx        = inputs[2];
     const NDArray& igrad_data = outputs[0];
     MSHADOW_TYPE_SWITCH(igrad_data.dtype(), DType, {
       MSHADOW_TYPE_SWITCH_WITH_BOOL(idx.dtype(), IType, {
         size_t input_size = igrad_data.shape().Size();
-        size_t idx_size = idx.shape()[0];
-        size_t col_size = input_size / idx_size;
+        size_t idx_size   = idx.shape()[0];
+        size_t col_size   = input_size / idx_size;
         std::vector<int32_t> prefix_sum(idx_size, 0);
         bool* idx_dptr = idx.data().dptr<bool>();
         for (size_t i = 0; i < idx_size; i++) {
           prefix_sum[i] = (i == 0) ? 0 : prefix_sum[i - 1];
           prefix_sum[i] += (idx_dptr[i]) ? 1 : 0;
         }
-        mshadow::Stream<cpu> *stream = ctx.get_stream<cpu>();
+        mshadow::Stream<cpu>* stream = ctx.get_stream<cpu>();
         if (req[0] == kAddTo) {
-          mxnet_op::Kernel<BooleanMaskBackwardKernel, cpu>::Launch(
-            stream, idx_size, igrad_data.data().dptr<DType>(), req[0],
-            ograd.data().dptr<DType>(), prefix_sum.data(), col_size);
+          mxnet_op::Kernel<BooleanMaskBackwardKernel, cpu>::Launch(stream,
+                                                                   idx_size,
+                                                                   igrad_data.data().dptr<DType>(),
+                                                                   req[0],
+                                                                   ograd.data().dptr<DType>(),
+                                                                   prefix_sum.data(),
+                                                                   col_size);
         } else {
           mxnet_op::Kernel<AdvancedIndexingBooleanMaskBackwardCPUWriteKernel, cpu>::Launch(
-            stream, idx_size, igrad_data.data().dptr<DType>(), req[0],
-            ograd.data().dptr<DType>(), prefix_sum.data(), col_size);
+              stream,
+              idx_size,
+              igrad_data.data().dptr<DType>(),
+              req[0],
+              ograd.data().dptr<DType>(),
+              prefix_sum.data(),
+              col_size);
         }
       });
     });
-  } else if (inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt8 ||
-             inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt16 ||
-             inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt32 ||
-             inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt64) {
+  } else if (inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt8 ||
+             inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt16 ||
+             inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt32 ||
+             inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt64) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_NE(req[np_indexing_::kIdx], kAddTo)
-      << "take layer doesn't support gradient of req type kAddTo to index";
+        << "take layer doesn't support gradient of req type kAddTo to index";
 
     // grad_out is the gradient of the outputs in the feed-forward
     // grad_in is the gradient of the inputs in the feed-forward
-    Stream<cpu> *s = ctx.get_stream<cpu>();
+    Stream<cpu>* s = ctx.get_stream<cpu>();
 
-    MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {  // output data type
+    MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {   // output data type
       MSHADOW_TYPE_SWITCH(inputs[2].dtype(), IType, {  // index data type
         // inputs are specified in the .cc file, which are the gradients from
         // the upper layer and the input index
         // outputs are the gradients of inputs in the feed-forward pass
         const mxnet::TShape& idxshape = inputs[2].shape();
         const mxnet::TShape& arrshape = outputs[0].shape();
-        const mxnet::TShape& oshape = inputs[0].shape();
+        const mxnet::TShape& oshape   = inputs[0].shape();
 
         if (idxshape.Size() == 0) {
           return;
@@ -329,10 +359,10 @@ void AdvancedIndexingOpBackward<cpu>(const nnvm::NodeAttrs& attrs,
 
         if (req[np_indexing_::kIdx] != kNullOp) {
           mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(
-            s, idxshape.Size(), outputs[np_indexing_::kIdx].data().dptr<IType>());
+              s, idxshape.Size(), outputs[np_indexing_::kIdx].data().dptr<IType>());
         }
 
-        int idxndim = idxshape.ndim();
+        int idxndim               = idxshape.ndim();
         Tensor<cpu, 1, IType> idx = inputs[2].data().get_with_shape<cpu, 1, IType>(
             Shape1(idxshape.ProdShape(0, idxndim)), s);
         Tensor<cpu, 2, DType> grad_out = inputs[0].data().get_with_shape<cpu, 2, DType>(
@@ -352,75 +382,83 @@ void AdvancedIndexingOpBackward<cpu>(const nnvm::NodeAttrs& attrs,
       });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type. "
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type. "
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
 void AdvancedIndexingMultipleForwardCPU(const nnvm::NodeAttrs& attrs,
-                     const OpContext& ctx,
-                     const std::vector<TBlob>& inputs,
-                     const std::vector<OpReqType>& req,
-                     const std::vector<TBlob>& outputs) {
+                                        const OpContext& ctx,
+                                        const std::vector<TBlob>& inputs,
+                                        const std::vector<OpReqType>& req,
+                                        const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
   if (inputs[np_indexing_::kIdx].type_flag_ == mshadow::kBool) {
-    LOG(FATAL)
-    << "Multi-dimension boolean indexing is not supported.";
+    LOG(FATAL) << "Multi-dimension boolean indexing is not supported.";
   } else if (inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt8 ||
              inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt16 ||
              inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt32 ||
              inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt64) {
-    mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+    mshadow::Stream<cpu>* s     = ctx.get_stream<cpu>();
     const mxnet::TShape& dshape = inputs[0].shape_;
     const mxnet::TShape& ishape = inputs[1].shape_;
-    int M = ishape[0];
-    int N = ishape.Size() / M;
-    int K = dshape.ProdShape(M, dshape.ndim());
+    int M                       = ishape[0];
+    int N                       = ishape.Size() / M;
+    int K                       = dshape.ProdShape(M, dshape.ndim());
     mshadow::Shape<10> strides;
     mshadow::Shape<10> mshape;
-    for (int i = M-1, stride = K; i >= 0; stride *= dshape[i], --i) {
+    for (int i = M - 1, stride = K; i >= 0; stride *= dshape[i], --i) {
       strides[i] = stride;
-      mshape[i] = dshape[i];
+      mshape[i]  = dshape[i];
     }
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {  // output data type switch
-      MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // indices data type switch
+      MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {          // indices data type switch
         // check whether indices are out of bound
         IType* idx_ptr = inputs[1].dptr<IType>();
         Tensor<cpu, 1, IType> workspace =
-          ctx.requested[0].get_space_typed<cpu, 1, IType>(Shape1(M), s);
+            ctx.requested[0].get_space_typed<cpu, 1, IType>(Shape1(M), s);
         IType* is_valid_dim_ptr = reinterpret_cast<IType*>(workspace.dptr_);
         GatherNDCheckBoundCPU(s, idx_ptr, N, M, mshape, is_valid_dim_ptr);
-        Kernel<gather_nd, cpu>::Launch(
-          s, N, req[0], N, M, K, strides, mshape, outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[1].dptr<IType>());
+        Kernel<gather_nd, cpu>::Launch(s,
+                                       N,
+                                       req[0],
+                                       N,
+                                       M,
+                                       K,
+                                       strides,
+                                       mshape,
+                                       outputs[0].dptr<DType>(),
+                                       inputs[0].dptr<DType>(),
+                                       inputs[1].dptr<IType>());
       });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type."
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type."
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 inline typename std::enable_if<(!std::is_same<DType, mshadow::half::half_t>::value), void>::type
-GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+GatherNDBackwardImpl(index_t N,
+                     index_t M,
+                     index_t K,
                      const mshadow::Shape<10> strides,
                      DType* out,
                      const DType* data,
                      const IType* indices,
-                     mshadow::Stream<cpu> *s) {
+                     mshadow::Stream<cpu>* s) {
 #pragma omp parallel for
   for (index_t i = 0; i < N; i++) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<index_t>(indices[j*N + i]);
+      offset += strides[j] * static_cast<index_t>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
 #pragma omp atomic
@@ -429,18 +467,20 @@ GatherNDBackwardImpl(index_t N, index_t M, index_t K,
   }
 }
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 inline typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value, void>::type
-GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+GatherNDBackwardImpl(index_t N,
+                     index_t M,
+                     index_t K,
                      const mshadow::Shape<10> strides,
                      DType* out,
                      const DType* data,
                      const IType* indices,
-                     mshadow::Stream<cpu> *s) {
+                     mshadow::Stream<cpu>* s) {
   for (index_t i = 0; i < N; i++) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<index_t>(indices[j*N + i]);
+      offset += strides[j] * static_cast<index_t>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
       out[offset + j] += data[i * K + j];
@@ -449,103 +489,105 @@ GatherNDBackwardImpl(index_t N, index_t M, index_t K,
 }
 
 NNVM_REGISTER_OP(_npi_advanced_indexing)
-.describe(R"code(
+    .describe(R"code(
 Combination of boolean indexing and advanced ndarray indexing
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", AdvancedIndexingOpType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AdvancedIndexingOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_np_advanced_indexing"})
-.set_attr<FInferStorageType>("FInferStorageType", AdvancedIndexingOpStorageType)
-.add_argument("data", "NDArray-or-Symbol", "Data")
-.add_argument("indices", "NDArray-or-Symbol", "Indices");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", AdvancedIndexingOpType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AdvancedIndexingOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_np_advanced_indexing"})
+    .set_attr<FInferStorageType>("FInferStorageType", AdvancedIndexingOpStorageType)
+    .add_argument("data", "NDArray-or-Symbol", "Data")
+    .add_argument("indices", "NDArray-or-Symbol", "Indices");
 
 NNVM_REGISTER_OP(_backward_np_advanced_indexing)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", AdvancedIndexingOpBackStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AdvancedIndexingOpBackward<cpu>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", AdvancedIndexingOpBackStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AdvancedIndexingOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_npi_advanced_indexing_multiple)
-.describe(R"code(
+    .describe(R"code(
 Combination of multiple boolean indexing and advanced indexing
 )code")
-.set_num_outputs(1)
-.set_num_inputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", GatherNDShape)
-.set_attr<nnvm::FInferType>("FInferType", GatherNDType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", AdvancedIndexingMultipleForwardCPU)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_backward_np_advanced_indexing_multiple");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->inputs.push_back(ograds[0]);
-    p->inputs.push_back(n->inputs[1]);
-    p->control_deps.emplace_back(n);
-    auto zero = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                         {n->inputs[1]}, nullptr, &n);
-
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(p);
-    ret.emplace_back(zero);
-    return ret;
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.add_argument("data", "NDArray-or-Symbol", "data")
-.add_argument("indices", "NDArray-or-Symbol", "indices");
+    .set_num_outputs(1)
+    .set_num_inputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", GatherNDShape)
+    .set_attr<nnvm::FInferType>("FInferType", GatherNDType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", AdvancedIndexingMultipleForwardCPU)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto p        = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_backward_np_advanced_indexing_multiple");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->inputs.push_back(ograds[0]);
+          p->inputs.push_back(n->inputs[1]);
+          p->control_deps.emplace_back(n);
+          auto zero = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(p);
+          ret.emplace_back(zero);
+          return ret;
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .add_argument("data", "NDArray-or-Symbol", "data")
+    .add_argument("indices", "NDArray-or-Symbol", "indices");
 
 NNVM_REGISTER_OP(_backward_np_advanced_indexing_multiple)
-.describe(R"code(Accumulates data according to indices and get the result. It's the backward of
+    .describe(R"code(Accumulates data according to indices and get the result. It's the backward of
 `_npi_advanced_indexing_multiple`.
 )code")
-.set_num_outputs(1)
-.set_num_inputs(2)
-.set_attr_parser(ParamParser<ScatterNDParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ScatterNDShape)
-.set_attr<nnvm::FInferType>("FInferType", ScatterNDType)
-.set_attr<FCompute>("FCompute<cpu>", AdvancedIndexingMultipleBackward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_npi_advanced_indexing_multiple");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->inputs.push_back(ograds[0]);
-    p->inputs.push_back(n->inputs[1]);
-    p->control_deps.emplace_back(n);
-    auto zero = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                         {n->inputs[1]}, nullptr, &n);
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(p);
-    ret.emplace_back(zero);
-    return ret;
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.add_argument("data", "NDArray-or-Symbol", "data")
-.add_argument("indices", "NDArray-or-Symbol", "indices")
-.add_arguments(ScatterNDParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(2)
+    .set_attr_parser(ParamParser<ScatterNDParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ScatterNDShape)
+    .set_attr<nnvm::FInferType>("FInferType", ScatterNDType)
+    .set_attr<FCompute>("FCompute<cpu>", AdvancedIndexingMultipleBackward<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto p        = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_npi_advanced_indexing_multiple");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->inputs.push_back(ograds[0]);
+          p->inputs.push_back(n->inputs[1]);
+          p->control_deps.emplace_back(n);
+          auto zero = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(p);
+          ret.emplace_back(zero);
+          return ret;
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .add_argument("data", "NDArray-or-Symbol", "data")
+    .add_argument("indices", "NDArray-or-Symbol", "indices")
+    .add_arguments(ScatterNDParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_indexing_op.cu b/src/operator/numpy/np_indexing_op.cu
index f7ed4784de2d..6cdbbae96858 100644
--- a/src/operator/numpy/np_indexing_op.cu
+++ b/src/operator/numpy/np_indexing_op.cu
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file np_indexing_op.cu
-*/
+ */
 
 #include "./np_indexing_op.h"
 #include <cub/cub.cuh>
@@ -30,250 +30,263 @@ namespace op {
 /*! \brief If there are out-of-bound indices, out will be assigned to 1.
  */
 struct is_valid_check {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, char* out, const DType* data,
-                                  const DType min, const DType max) {
-    if (data[i] < min || data[i] > max) *out = 1;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  char* out,
+                                  const DType* data,
+                                  const DType min,
+                                  const DType max) {
+    if (data[i] < min || data[i] > max)
+      *out = 1;
   }
 };
 
-template<typename DType>
-bool CheckIndexOutOfBound(mshadow::Stream<gpu> *s, const DType* data_ptr, size_t data_size,
-                            const DType min, const DType max, char* is_valid_ptr) {
-    using namespace mxnet_op;
-    int32_t is_valid = 0;
-    Kernel<set_zero, gpu>::Launch(s, 1, is_valid_ptr);
-    Kernel<is_valid_check, gpu>::Launch(s, data_size, is_valid_ptr, data_ptr, min, max);
-    CUDA_CALL(cudaMemcpyAsync(&is_valid, is_valid_ptr, sizeof(char),
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
-    CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
-    return is_valid == 0;
+template <typename DType>
+bool CheckIndexOutOfBound(mshadow::Stream<gpu>* s,
+                          const DType* data_ptr,
+                          size_t data_size,
+                          const DType min,
+                          const DType max,
+                          char* is_valid_ptr) {
+  using namespace mxnet_op;
+  int32_t is_valid = 0;
+  Kernel<set_zero, gpu>::Launch(s, 1, is_valid_ptr);
+  Kernel<is_valid_check, gpu>::Launch(s, data_size, is_valid_ptr, data_ptr, min, max);
+  CUDA_CALL(cudaMemcpyAsync(&is_valid,
+                            is_valid_ptr,
+                            sizeof(char),
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
+  return is_valid == 0;
 }
 
 struct AdvancedIndexingTakeGPU {
-    // assume that idx have been flattened to a 1-D tensor (N,)
-    // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
-    // M is the number of columns of in_data and out_data
-    // K is the number of rows of in_data
-    // i is the index of out_data
-    template<typename DType, typename IType>
-    MSHADOW_XINLINE static void Map(int i, DType* out_data, const DType* in_data,
-                                    const IType* idx, const int64_t M, const int64_t K) {
-      int64_t j = static_cast<int64_t>(idx[i]);
-      j = j % K;
-      j += (j < 0) ? K : 0;
-
-      for (int64_t k = 0; k < M; k++){
-        out_data[i * M + k] = in_data[j * M + k];
-      }
+  // assume that idx have been flattened to a 1-D tensor (N,)
+  // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
+  // M is the number of columns of in_data and out_data
+  // K is the number of rows of in_data
+  // i is the index of out_data
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const int64_t M,
+                                  const int64_t K) {
+    int64_t j = static_cast<int64_t>(idx[i]);
+    j         = j % K;
+    j += (j < 0) ? K : 0;
+
+    for (int64_t k = 0; k < M; k++) {
+      out_data[i * M + k] = in_data[j * M + k];
     }
+  }
 };
 
 struct AdvancedIndexingTakeMultiDimensionGPU {
-    // assume that idx have been flattened to a 1-D tensor (N,)
-    // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
-    // M is the number of columns of in_data and out_data
-    // K is the number of rows of in_data
-    // i is the index of out_data
-    template<typename DType, typename IType>
-    MSHADOW_XINLINE static void Map(int i, DType* out_data, const DType* in_data,
-                                    const IType* idx, const int64_t M, const int64_t K) {
-      int64_t j = static_cast<int64_t>(idx[i]);
-      j = j % K;
-      j += (j < 0) ? K : 0;
-
-      for (int64_t k = 0; k < M; k++){
-        out_data[i * M + k] = in_data[(i * k + j) * M + k];
-      }
+  // assume that idx have been flattened to a 1-D tensor (N,)
+  // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
+  // M is the number of columns of in_data and out_data
+  // K is the number of rows of in_data
+  // i is the index of out_data
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const int64_t M,
+                                  const int64_t K) {
+    int64_t j = static_cast<int64_t>(idx[i]);
+    j         = j % K;
+    j += (j < 0) ? K : 0;
+
+    for (int64_t k = 0; k < M; k++) {
+      out_data[i * M + k] = in_data[(i * k + j) * M + k];
     }
+  }
 };
 
-template<>
+template <>
 inline void AdvancedIndexingOpForward<gpu>(const nnvm::NodeAttrs& attrs,
-                                    const OpContext &ctx,
-                                    const std::vector<NDArray> &inputs,
-                                    const std::vector<OpReqType> &req,
-                                    const std::vector<NDArray> &outputs) {
+                                           const OpContext& ctx,
+                                           const std::vector<NDArray>& inputs,
+                                           const std::vector<OpReqType>& req,
+                                           const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
   if (inputs[np_indexing_::kIdx].dtype() == mshadow::kBool) {
     CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
-    const int axis = 0;
-    const NDArray &data = inputs[0];
-    const NDArray &idx = inputs[1];
-    const NDArray &out = outputs[0];
+    const int axis      = 0;
+    const NDArray& data = inputs[0];
+    const NDArray& idx  = inputs[1];
+    const NDArray& out  = outputs[0];
     CHECK_EQ(axis, 0) << "Not supported yet";
     CHECK_EQ(data.shape()[axis], idx.shape()[0]);
     CHECK_EQ(idx.shape().ndim(), 1U);
-    Stream<gpu>* s = ctx.get_stream<gpu>();
+    Stream<gpu>* s      = ctx.get_stream<gpu>();
     cudaStream_t stream = Stream<gpu>::GetStream(s);
     // count the number of 1s in `idx`, so that we could know the output dimension
-    size_t idx_size = idx.shape()[0];
-    int32_t valid_num = 0;
-    int32_t* prefix_sum = nullptr;
-    void* d_temp_storage = nullptr;
+    size_t idx_size           = idx.shape()[0];
+    int32_t valid_num         = 0;
+    int32_t* prefix_sum       = nullptr;
+    void* d_temp_storage      = nullptr;
     size_t temp_storage_bytes = 0;
     // Calculate total temporary memory size
-    cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                    temp_storage_bytes,
-                                    prefix_sum,
-                                    prefix_sum,
-                                    idx_size,
-                                    stream);
+    cub::DeviceScan::InclusiveSum(
+        d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
     size_t buffer_size = idx_size * sizeof(int32_t);
     temp_storage_bytes += buffer_size;
     // Allocate memory on GPU and allocate pointer
     Tensor<gpu, 1, char> workspace =
         ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
-    prefix_sum = reinterpret_cast<int32_t*>(workspace.dptr_);
+    prefix_sum     = reinterpret_cast<int32_t*>(workspace.dptr_);
     d_temp_storage = workspace.dptr_ + buffer_size;
     mxnet_op::Kernel<mshadow_op::identity_with_cast, gpu>::Launch(
-    s, idx.shape()[0], prefix_sum, idx.data().dptr<bool>());
+        s, idx.shape()[0], prefix_sum, idx.data().dptr<bool>());
     // Calculate prefix sum
-    cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                    temp_storage_bytes,
-                                    prefix_sum,
-                                    prefix_sum,
-                                    idx_size,
-                                    stream);
-    CUDA_CALL(cudaMemcpyAsync(&valid_num, &prefix_sum[idx_size - 1], sizeof(int32_t),
-                                cudaMemcpyDeviceToHost, stream));
+    cub::DeviceScan::InclusiveSum(
+        d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
+    CUDA_CALL(cudaMemcpyAsync(
+        &valid_num, &prefix_sum[idx_size - 1], sizeof(int32_t), cudaMemcpyDeviceToHost, stream));
     CUDA_CALL(cudaStreamSynchronize(stream));
 
     // Set the output shape forcefully
     mxnet::TShape data_shape = data.shape();
-    data_shape[axis] = valid_num;
-    const_cast<NDArray &>(out).Init(data_shape);
+    data_shape[axis]         = valid_num;
+    const_cast<NDArray&>(out).Init(data_shape);
     size_t input_size = data.shape().Size();
-    size_t col_size = input_size / idx.shape()[0];
+    size_t col_size   = input_size / idx.shape()[0];
     // Do the copy
     MSHADOW_TYPE_SWITCH_WITH_BOOL(out.dtype(), DType, {
-        if (valid_num > 0) {
-        mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(
-            s, input_size, out.data().dptr<DType>(),
-            data.data().dptr<DType>(), prefix_sum, col_size);
-        }
+      if (valid_num > 0) {
+        mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(s,
+                                                                input_size,
+                                                                out.data().dptr<DType>(),
+                                                                data.data().dptr<DType>(),
+                                                                prefix_sum,
+                                                                col_size);
+      }
     });
-} else if (inputs[np_indexing_::kIdx].dtype() == mshadow::kInt8 ||
-           inputs[np_indexing_::kIdx].dtype() == mshadow::kInt16 ||
-           inputs[np_indexing_::kIdx].dtype() == mshadow::kInt32 ||
-           inputs[np_indexing_::kIdx].dtype() == mshadow::kInt64) {
+  } else if (inputs[np_indexing_::kIdx].dtype() == mshadow::kInt8 ||
+             inputs[np_indexing_::kIdx].dtype() == mshadow::kInt16 ||
+             inputs[np_indexing_::kIdx].dtype() == mshadow::kInt32 ||
+             inputs[np_indexing_::kIdx].dtype() == mshadow::kInt64) {
     using namespace mxnet_op;
     const mxnet::TShape& idxshape = inputs[np_indexing_::kIdx].shape();
     const mxnet::TShape& arrshape = inputs[np_indexing_::kArr].shape();
 
     if (idxshape.Size() == 0) {
-        return;
+      return;
     }
 
     mxnet::TShape oshape(idxshape.ndim() + arrshape.ndim() - 1, -1);
     for (index_t i = 0; i < idxshape.ndim(); ++i) {
-        oshape[i] = idxshape[i];
+      oshape[i] = idxshape[i];
     }
     for (index_t i = 0; i < arrshape.ndim(); i++) {
-        if (i < 0) {
+      if (i < 0) {
         oshape[i] = arrshape[i];
-        } else if (i > 0) {
+      } else if (i > 0) {
         oshape[i + idxshape.ndim() - 1] = arrshape[i];
-        }
+      }
     }
 
-    const NDArray &out = outputs[0];
-    const_cast<NDArray &>(out).Init(oshape);
+    const NDArray& out = outputs[0];
+    const_cast<NDArray&>(out).Init(oshape);
 
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
 
     MSHADOW_TYPE_SWITCH(outputs[np_indexing_::kOut].dtype(), DType, {  // output data type
-        MSHADOW_TYPE_SWITCH(inputs[np_indexing_::kIdx].dtype(), IType, {
+      MSHADOW_TYPE_SWITCH(inputs[np_indexing_::kIdx].dtype(), IType, {
         IType min = 0;
         IType max = static_cast<IType>(arrshape[0] - 1);
         // check with single thread is faster since data is small
-        IType* idx_ptr = inputs[np_indexing_::kIdx].data().dptr<IType>();
+        IType* idx_ptr  = inputs[np_indexing_::kIdx].data().dptr<IType>();
         size_t idx_size = idxshape.Size();
         Tensor<gpu, 1, char> workspace =
-          ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
+            ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
         char* is_valid_ptr = reinterpret_cast<char*>(workspace.dptr_);
-        bool is_valid = CheckIndexOutOfBound(s, idx_ptr, idx_size, min, max, is_valid_ptr);
+        bool is_valid      = CheckIndexOutOfBound(s, idx_ptr, idx_size, min, max, is_valid_ptr);
         CHECK(is_valid) << "take operator contains indices out of bound";
-        Kernel<AdvancedIndexingTakeGPU, gpu>::Launch(s, idxshape.Size(),
-                        outputs[np_indexing_::kOut].data().dptr<DType>(),
-                        inputs[np_indexing_::kArr].data().dptr<DType>(),
-                        inputs[np_indexing_::kIdx].data().dptr<IType>(),
-                        oshape.Size()/idxshape.Size(), arrshape[0]);
-        });
+        Kernel<AdvancedIndexingTakeGPU, gpu>::Launch(
+            s,
+            idxshape.Size(),
+            outputs[np_indexing_::kOut].data().dptr<DType>(),
+            inputs[np_indexing_::kArr].data().dptr<DType>(),
+            inputs[np_indexing_::kIdx].data().dptr<IType>(),
+            oshape.Size() / idxshape.Size(),
+            arrshape[0]);
+      });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type. "
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type. "
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
-template<>
+template <>
 inline void AdvancedIndexingOpBackward<gpu>(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<NDArray> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<NDArray> &outputs) {
+                                            const OpContext& ctx,
+                                            const std::vector<NDArray>& inputs,
+                                            const std::vector<OpReqType>& req,
+                                            const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
-  if (inputs[np_indexing_::kIdx+1].dtype() == mshadow::kBool) {
+  if (inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kBool) {
     // inputs: {ograd, data, idx}
     // outputs: {igrad_data, igrad_idx}
-    const NDArray& ograd = inputs[0];
-    const NDArray& idx = inputs[2];
+    const NDArray& ograd      = inputs[0];
+    const NDArray& idx        = inputs[2];
     const NDArray& igrad_data = outputs[0];
-    Stream<gpu>* s = ctx.get_stream<gpu>();
-    cudaStream_t stream = Stream<gpu>::GetStream(s);
+    Stream<gpu>* s            = ctx.get_stream<gpu>();
+    cudaStream_t stream       = Stream<gpu>::GetStream(s);
     // Count the number of 1s in `idx`, so that we could know the output dimension
-    size_t idx_size = idx.shape()[0];
-    int32_t* prefix_sum = nullptr;
-    void* d_temp_storage = nullptr;
+    size_t idx_size           = idx.shape()[0];
+    int32_t* prefix_sum       = nullptr;
+    void* d_temp_storage      = nullptr;
     size_t temp_storage_bytes = 0;
     // Calculate total temporary memory size
-    cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                    temp_storage_bytes,
-                                    prefix_sum,
-                                    prefix_sum,
-                                    idx_size,
-                                    stream);
+    cub::DeviceScan::InclusiveSum(
+        d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
     size_t buffer_size = idx_size * sizeof(int32_t);
     temp_storage_bytes += buffer_size;
     // Allocate memory on GPU and allocate pointer
     Tensor<gpu, 1, char> workspace =
         ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
-    prefix_sum = reinterpret_cast<int32_t*>(workspace.dptr_);
+    prefix_sum     = reinterpret_cast<int32_t*>(workspace.dptr_);
     d_temp_storage = workspace.dptr_ + buffer_size;
     MSHADOW_TYPE_SWITCH_WITH_BOOL(idx.dtype(), IType, {
-        mxnet_op::Kernel<mshadow_op::identity_with_cast, gpu>::Launch(
-        s, idx.shape()[0], prefix_sum, idx.data().dptr<IType>());
+      mxnet_op::Kernel<mshadow_op::identity_with_cast, gpu>::Launch(
+          s, idx.shape()[0], prefix_sum, idx.data().dptr<IType>());
     });
     // Calculate prefix sum
-    cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                    temp_storage_bytes,
-                                    prefix_sum,
-                                    prefix_sum,
-                                    idx_size,
-                                    stream);
+    cub::DeviceScan::InclusiveSum(
+        d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, idx_size, stream);
     size_t input_size = igrad_data.shape().Size();
-    size_t col_size = input_size / idx_size;
+    size_t col_size   = input_size / idx_size;
     // Backward pass
     MSHADOW_TYPE_SWITCH(igrad_data.dtype(), DType, {
-        if (input_size > 0) {
-        mxnet_op::Kernel<BooleanMaskBackwardKernel, gpu>::Launch(
-            s, input_size, igrad_data.data().dptr<DType>(), req[0], ograd.data().dptr<DType>(),
-            prefix_sum, col_size);
-        }
+      if (input_size > 0) {
+        mxnet_op::Kernel<BooleanMaskBackwardKernel, gpu>::Launch(s,
+                                                                 input_size,
+                                                                 igrad_data.data().dptr<DType>(),
+                                                                 req[0],
+                                                                 ograd.data().dptr<DType>(),
+                                                                 prefix_sum,
+                                                                 col_size);
+      }
     });
-  } else if (inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt8 ||
-             inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt16 ||
-             inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt32 ||
-             inputs[np_indexing_::kIdx+1].dtype() == mshadow::kInt64) {
+  } else if (inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt8 ||
+             inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt16 ||
+             inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt32 ||
+             inputs[np_indexing_::kIdx + 1].dtype() == mshadow::kInt64) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_NE(req[np_indexing_::kIdx], kAddTo)
@@ -281,139 +294,156 @@ inline void AdvancedIndexingOpBackward<gpu>(const nnvm::NodeAttrs& attrs,
 
     // grad_out is the gradient of the outputs in the feed-forward
     // grad_in is the gradient of the inputs in the feed-forward
-    Stream<gpu> *s = ctx.get_stream<gpu>();
-
-    MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {  // output data type
-        MSHADOW_TYPE_SWITCH(inputs[2].dtype(), IType, {  // index data type
-          // inputs are specified in the .cc file, which are the gradients from
-          // the upper layer and the input index
-          // outputs are the gradients of inputs in the feed-forward pass
-          const mxnet::TShape& idxshape = inputs[2].shape();
-          const mxnet::TShape& arrshape = outputs[0].shape();
-          const mxnet::TShape& oshape = inputs[0].shape();
-
-          if (idxshape.Size() == 0) {
-              return;
-          }
+    Stream<gpu>* s = ctx.get_stream<gpu>();
 
-          if (req[np_indexing_::kIdx] != kNullOp) {
-              mxnet_op::Kernel<mxnet_op::set_zero, gpu>::Launch(
+    MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {   // output data type
+      MSHADOW_TYPE_SWITCH(inputs[2].dtype(), IType, {  // index data type
+        // inputs are specified in the .cc file, which are the gradients from
+        // the upper layer and the input index
+        // outputs are the gradients of inputs in the feed-forward pass
+        const mxnet::TShape& idxshape = inputs[2].shape();
+        const mxnet::TShape& arrshape = outputs[0].shape();
+        const mxnet::TShape& oshape   = inputs[0].shape();
+
+        if (idxshape.Size() == 0) {
+          return;
+        }
+
+        if (req[np_indexing_::kIdx] != kNullOp) {
+          mxnet_op::Kernel<mxnet_op::set_zero, gpu>::Launch(
               s, idxshape.Size(), outputs[np_indexing_::kIdx].data().dptr<IType>());
-          }
+        }
 
-          int idxndim = idxshape.ndim();
-          Tensor<gpu, 1, IType> idx = inputs[2].data().get_with_shape<gpu, 1, IType>(
-              Shape1(idxshape.ProdShape(0, idxndim)), s);
-          Tensor<gpu, 2, DType> grad_out = inputs[0].data().get_with_shape<gpu, 2, DType>(
-              Shape2(oshape.ProdShape(0, idxndim), oshape.ProdShape(idxndim, oshape.ndim())), s);
-          Tensor<gpu, 2, DType> grad_in = outputs[0].data().get_with_shape<gpu, 2, DType>(
-              Shape2(arrshape[0], arrshape.ProdShape(1, arrshape.ndim())), s);
-
-          // re-using the previous code for axis = 0 case
-          if (req[np_indexing_::kArr] == kWriteTo || req[np_indexing_::kArr] == kAddTo) {
-              if (req[np_indexing_::kArr] == kWriteTo) {
-                  grad_in = scalar<DType>(0.0f);
-              }
-              AddTakeGrad<false>(grad_in, idx, grad_out);
-          } else {
-              LOG(FATAL) << "wrong req";
+        int idxndim               = idxshape.ndim();
+        Tensor<gpu, 1, IType> idx = inputs[2].data().get_with_shape<gpu, 1, IType>(
+            Shape1(idxshape.ProdShape(0, idxndim)), s);
+        Tensor<gpu, 2, DType> grad_out = inputs[0].data().get_with_shape<gpu, 2, DType>(
+            Shape2(oshape.ProdShape(0, idxndim), oshape.ProdShape(idxndim, oshape.ndim())), s);
+        Tensor<gpu, 2, DType> grad_in = outputs[0].data().get_with_shape<gpu, 2, DType>(
+            Shape2(arrshape[0], arrshape.ProdShape(1, arrshape.ndim())), s);
+
+        // re-using the previous code for axis = 0 case
+        if (req[np_indexing_::kArr] == kWriteTo || req[np_indexing_::kArr] == kAddTo) {
+          if (req[np_indexing_::kArr] == kWriteTo) {
+            grad_in = scalar<DType>(0.0f);
           }
-        });
+          AddTakeGrad<false>(grad_in, idx, grad_out);
+        } else {
+          LOG(FATAL) << "wrong req";
+        }
+      });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type. "
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type. "
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
 /*
-* \brief check if any of the indices is out of bound
-* \param s the stream
-* \param idx_ptr the indices on the stream
-* \param N the number of indices in an axis
-* \param M the number of axises to exmaine
-* \param mshape the array that stores shape for each dimension
-* \param is_valid_dim_ptr the temparary workspace that contains out-of-bound indices
-*/
-template<typename DType>
-void GatherNDCheckBoundGPU(mshadow::Stream<gpu> *s, const DType* idx_ptr, index_t N,
-                          index_t M, const mshadow::Shape<10> mshape, DType* is_valid_dim_ptr) {
+ * \brief check if any of the indices is out of bound
+ * \param s the stream
+ * \param idx_ptr the indices on the stream
+ * \param N the number of indices in an axis
+ * \param M the number of axises to exmaine
+ * \param mshape the array that stores shape for each dimension
+ * \param is_valid_dim_ptr the temparary workspace that contains out-of-bound indices
+ */
+template <typename DType>
+void GatherNDCheckBoundGPU(mshadow::Stream<gpu>* s,
+                           const DType* idx_ptr,
+                           index_t N,
+                           index_t M,
+                           const mshadow::Shape<10> mshape,
+                           DType* is_valid_dim_ptr) {
   using namespace mxnet_op;
   Kernel<set_zero, gpu>::Launch(s, M, is_valid_dim_ptr);
   Kernel<is_valid_check_gather_nd, gpu>::Launch(s, M, is_valid_dim_ptr, idx_ptr, N, mshape);
 
   std::vector<DType> is_valid_dim(M);
-  CUDA_CALL(cudaMemcpyAsync(is_valid_dim.data(), is_valid_dim_ptr, sizeof(DType)*M,
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaMemcpyAsync(is_valid_dim.data(),
+                            is_valid_dim_ptr,
+                            sizeof(DType) * M,
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
   CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
   for (int m = 0; m < M; m++) {
-    if (is_valid_dim[m] > mshape[m] - 1 || is_valid_dim[m] < - mshape[m]) {
-      LOG(FATAL)<< "IndexError: index " << is_valid_dim[m] << " is out of bounds for axis "
-        << m << " with size " << mshape[m];
+    if (is_valid_dim[m] > mshape[m] - 1 || is_valid_dim[m] < -mshape[m]) {
+      LOG(FATAL) << "IndexError: index " << is_valid_dim[m] << " is out of bounds for axis " << m
+                 << " with size " << mshape[m];
     }
   }
 }
 
 void AdvancedIndexingMultipleForwardGPU(const nnvm::NodeAttrs& attrs,
-                        const OpContext& ctx,
-                        const std::vector<TBlob>& inputs,
-                        const std::vector<OpReqType>& req,
-                        const std::vector<TBlob>& outputs) {
+                                        const OpContext& ctx,
+                                        const std::vector<TBlob>& inputs,
+                                        const std::vector<OpReqType>& req,
+                                        const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
   if (inputs[np_indexing_::kIdx].type_flag_ == mshadow::kBool) {
-    LOG(FATAL)
-    << "Multi-dimension boolean indexing is not supported.";
+    LOG(FATAL) << "Multi-dimension boolean indexing is not supported.";
   } else if (inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt8 ||
-          inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt16 ||
-          inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt32 ||
-          inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt64) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+             inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt16 ||
+             inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt32 ||
+             inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt64) {
+    mshadow::Stream<gpu>* s     = ctx.get_stream<gpu>();
     const mxnet::TShape& dshape = inputs[0].shape_;
     const mxnet::TShape& ishape = inputs[1].shape_;
-    int M = ishape[0];
-    int N = ishape.Size() / M;
-    int K = dshape.ProdShape(M, dshape.ndim());
+    int M                       = ishape[0];
+    int N                       = ishape.Size() / M;
+    int K                       = dshape.ProdShape(M, dshape.ndim());
     mshadow::Shape<10> strides;
     mshadow::Shape<10> mshape;
-    for (int i = M-1, stride = K; i >= 0; stride *= dshape[i], --i) {
+    for (int i = M - 1, stride = K; i >= 0; stride *= dshape[i], --i) {
       strides[i] = stride;
-      mshape[i] = dshape[i];
+      mshape[i]  = dshape[i];
     }
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {  // output data type switch
-      MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // indices data type switch
+      MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {          // indices data type switch
         // check whether indices are out of bound
         IType* idx_ptr = inputs[1].dptr<IType>();
         Tensor<gpu, 1, IType> workspace =
-          ctx.requested[0].get_space_typed<gpu, 1, IType>(Shape1(M), s);
+            ctx.requested[0].get_space_typed<gpu, 1, IType>(Shape1(M), s);
         IType* is_valid_dim_ptr = reinterpret_cast<IType*>(workspace.dptr_);
         GatherNDCheckBoundGPU(s, idx_ptr, N, M, mshape, is_valid_dim_ptr);
-        Kernel<gather_nd, gpu>::Launch(
-          s, N, req[0], N, M, K, strides, mshape, outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[1].dptr<IType>());
+        Kernel<gather_nd, gpu>::Launch(s,
+                                       N,
+                                       req[0],
+                                       N,
+                                       M,
+                                       K,
+                                       strides,
+                                       mshape,
+                                       outputs[0].dptr<DType>(),
+                                       inputs[0].dptr<DType>(),
+                                       inputs[1].dptr<IType>());
       });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type."
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type."
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
 struct backward_gather_nd_gpu {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t N, index_t M, index_t K,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t N,
+                                  index_t M,
+                                  index_t K,
                                   const mshadow::Shape<10> strides,
-                                  DType* out, const DType* data,
+                                  DType* out,
+                                  const DType* data,
                                   const IType* indices) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<int>(indices[j*N + i]);
+      offset += strides[j] * static_cast<int>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
       atomicAdd(out + (offset + j), data[i * K + j]);
@@ -421,32 +451,34 @@ struct backward_gather_nd_gpu {
   }
 };
 
-template<typename DType, typename IType>
-inline void GatherNDBackwardImpl(index_t N, index_t M, index_t K,
-                                const mshadow::Shape<10> strides,
-                                DType* out,
-                                const DType* data,
-                                const IType* indices,
-                                mshadow::Stream<gpu> *s) {
+template <typename DType, typename IType>
+inline void GatherNDBackwardImpl(index_t N,
+                                 index_t M,
+                                 index_t K,
+                                 const mshadow::Shape<10> strides,
+                                 DType* out,
+                                 const DType* data,
+                                 const IType* indices,
+                                 mshadow::Stream<gpu>* s) {
   mxnet_op::Kernel<backward_gather_nd_gpu, gpu>::Launch(s, N, N, M, K, strides, out, data, indices);
 }
 
 NNVM_REGISTER_OP(_npi_advanced_indexing)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FComputeEx>("FComputeEx<gpu>", AdvancedIndexingOpForward<gpu>);
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", AdvancedIndexingOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_np_advanced_indexing)
-.set_attr<FComputeEx>("FComputeEx<gpu>", AdvancedIndexingOpBackward<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", AdvancedIndexingOpBackward<gpu>);
 
 NNVM_REGISTER_OP(_npi_advanced_indexing_multiple)
-.set_attr<FCompute>("FCompute<gpu>", AdvancedIndexingMultipleForwardGPU);
+    .set_attr<FCompute>("FCompute<gpu>", AdvancedIndexingMultipleForwardGPU);
 
 NNVM_REGISTER_OP(_backward_np_advanced_indexing_multiple)
-.set_attr<FCompute>("FCompute<gpu>", AdvancedIndexingMultipleBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", AdvancedIndexingMultipleBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_indexing_op.h b/src/operator/numpy/np_indexing_op.h
index d83fce00704a..66339c8e0fe8 100644
--- a/src/operator/numpy/np_indexing_op.h
+++ b/src/operator/numpy/np_indexing_op.h
@@ -21,7 +21,7 @@
  * Copyright (c) 2017 by Contributors
  * \file np_indexing_op.h
  * \brief Function definition of numpy indexing operator
-*/
+ */
 #ifndef MXNET_OPERATOR_NUMPY_NP_INDEXING_OP_H_
 #define MXNET_OPERATOR_NUMPY_NP_INDEXING_OP_H_
 
@@ -37,25 +37,23 @@ namespace mxnet {
 namespace op {
 
 namespace np_indexing_ {  // to avoid name conflict
-enum Inputs {kArr, kIdx};
-enum Outputs {kOut};
+enum Inputs { kArr, kIdx };
+enum Outputs { kOut };
 }  // namespace np_indexing_
 
-struct AdvancedIndexingMultipleParam: public dmlc::Parameter<AdvancedIndexingMultipleParam> {
+struct AdvancedIndexingMultipleParam : public dmlc::Parameter<AdvancedIndexingMultipleParam> {
   int axis;
   DMLC_DECLARE_PARAMETER(AdvancedIndexingMultipleParam) {
-    DMLC_DECLARE_FIELD(axis)
-    .set_default(0)
-    .describe("The axis of tuple type indexing");
+    DMLC_DECLARE_FIELD(axis).set_default(0).describe("The axis of tuple type indexing");
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void AdvancedIndexingOpForward(const nnvm::NodeAttrs& attrs,
-                   const OpContext& ctx,
-                   const std::vector<NDArray>& inputs,
-                   const std::vector<OpReqType>& req,
-                   const std::vector<NDArray>& outputs);
+                               const OpContext& ctx,
+                               const std::vector<NDArray>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<NDArray>& outputs);
 
 // template<typename xpu>
 // void AdvancedIndexingMultipleOpForward(const nnvm::NodeAttrs& attrs,
@@ -64,12 +62,12 @@ void AdvancedIndexingOpForward(const nnvm::NodeAttrs& attrs,
 //                    const std::vector<OpReqType>& req,
 //                    const std::vector<NDArray>& outputs);
 
-template<typename xpu>
+template <typename xpu>
 void AdvancedIndexingOpBackward(const nnvm::NodeAttrs& attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<NDArray> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<NDArray> &outputs);
+                                const OpContext& ctx,
+                                const std::vector<NDArray>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<NDArray>& outputs);
 
 // template<typename xpu>
 // void AdvancedIndexingMultipleOpBackward(const nnvm::NodeAttrs& attrs,
@@ -78,49 +76,52 @@ void AdvancedIndexingOpBackward(const nnvm::NodeAttrs& attrs,
 //                          const std::vector<OpReqType>& req,
 //                          const std::vector<NDArray>& outputs);
 
-template<typename xpu>
+template <typename xpu>
 void AdvancedIndexingMultipleBackward(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx,
-                      const std::vector<TBlob>& inputs,
-                      const std::vector<OpReqType>& req,
-                      const std::vector<TBlob>& outputs) {
+                                      const OpContext& ctx,
+                                      const std::vector<TBlob>& inputs,
+                                      const std::vector<OpReqType>& req,
+                                      const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using nnvm::dim_t;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
   if (inputs[np_indexing_::kIdx].type_flag_ == mshadow::kBool) {
-    LOG(FATAL)
-    << "Multi-dimension boolean indexing is not supported.";
+    LOG(FATAL) << "Multi-dimension boolean indexing is not supported.";
   } else if (inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt8 ||
              inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt16 ||
              inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt32 ||
              inputs[np_indexing_::kIdx].type_flag_ == mshadow::kInt64) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
     const mxnet::TShape& oshape = outputs[0].shape_;
     const mxnet::TShape& ishape = inputs[1].shape_;
-    dim_t M = ishape[0];
-    dim_t N = ishape.Size() / M;
-    dim_t K = oshape.ProdShape(M, oshape.ndim());
+    dim_t M                     = ishape[0];
+    dim_t N                     = ishape.Size() / M;
+    dim_t K                     = oshape.ProdShape(M, oshape.ndim());
     mshadow::Shape<10> strides;
-    for (dim_t i = M-1, stride = K; i >= 0; stride *= oshape[i], --i) strides[i] = stride;
+    for (dim_t i = M - 1, stride = K; i >= 0; stride *= oshape[i], --i)
+      strides[i] = stride;
     if (kWriteTo == req[0]) {
       Fill<true>(s, outputs[0], req[0], 0);
     }
     MXNET_NO_INT8_TYPE_SWITCH(inputs[0].type_flag_, DType, {  // output data type switch
-      MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // indices data type switch
-        GatherNDBackwardImpl(N, M, K, strides,
-                            outputs[0].dptr<DType>(),
-                            inputs[0].dptr<DType>(),
-                            inputs[1].dptr<IType>(),
-                            s);
+      MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {      // indices data type switch
+        GatherNDBackwardImpl(N,
+                             M,
+                             K,
+                             strides,
+                             outputs[0].dptr<DType>(),
+                             inputs[0].dptr<DType>(),
+                             inputs[1].dptr<IType>(),
+                             s);
       });
     });
   } else {
-    LOG(FATAL)
-    << "arrays used as indices must be explictly declared as integer (or boolean) type."
-    << "Use np.astype() to cast indices to integer or boolean.";
+    LOG(FATAL) << "arrays used as indices must be explictly declared as integer (or boolean) type."
+               << "Use np.astype() to cast indices to integer or boolean.";
   }
 }
 
diff --git a/src/operator/numpy/np_init_op.cc b/src/operator/numpy/np_init_op.cc
index 6e7aca221e9e..f6ace5a445a2 100644
--- a/src/operator/numpy/np_init_op.cc
+++ b/src/operator/numpy/np_init_op.cc
@@ -30,7 +30,6 @@
 namespace mxnet {
 namespace op {
 
-
 DMLC_REGISTER_PARAMETER(NumpyEyeParam);
 DMLC_REGISTER_PARAMETER(IndicesOpParam);
 DMLC_REGISTER_PARAMETER(LogspaceParam);
@@ -44,16 +43,17 @@ inline bool NumpyIndicesShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_shapes->size(), 0U);
   CHECK_EQ(out_shapes->size(), 1U);
   CHECK_GE(param.dimensions.ndim(), 0)
-    << "_npi_indices dimensions the number of dim must not be less than 0";
+      << "_npi_indices dimensions the number of dim must not be less than 0";
   mxnet::TShape param_dim = param.dimensions;
-  if (!shape_is_known(param_dim)) return false;
+  if (!shape_is_known(param_dim))
+    return false;
   CHECK_LT(param_dim.Size(), INT32_MAX) << "ValueError: np.indices does not support large"
-     << " input tensors (containing >= 2^31 elements).";
+                                        << " input tensors (containing >= 2^31 elements).";
   const int indim = param.dimensions.ndim();
   mxnet::TShape ret(indim + 1, -1);
   ret[0] = indim;
   for (int i = 1; i < indim + 1; ++i) {
-    ret[i] = param_dim[i-1];
+    ret[i] = param_dim[i - 1];
   }
   SHAPE_ASSIGN_CHECK(*out_shapes, 0, ret);
   return shape_is_known(out_shapes->at(0));
@@ -70,58 +70,57 @@ inline bool NumpyIndicesType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool LogspaceShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   const LogspaceParam& param = nnvm::get<LogspaceParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
-  CHECK_GE(param.num, 0)
-    << "Number of sequence should be non-negative, received " << param.num;
+  CHECK_GE(param.num, 0) << "Number of sequence should be non-negative, received " << param.num;
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape({static_cast<nnvm::dim_t>(param.num)}));
   return true;
 }
 
 NNVM_REGISTER_OP(_npi_zeros)
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InitOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpParam>)
-.set_attr<FInferStorageType>("FInferStorageType", InitStorageType<InitOpParam, true, true>)
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
-.add_arguments(InitOpParam::__FIELDS__());
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", InitStorageType<InitOpParam, true, true>)
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
+    .add_arguments(InitOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_ones)
-.describe("Return a new array of given shape, type, and context, filled with ones.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InitOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpParam>)
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 1>)
-.add_arguments(InitOpParam::__FIELDS__());
+    .describe("Return a new array of given shape, type, and context, filled with ones.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpParam>)
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 1>)
+    .add_arguments(InitOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_identity)
-.describe("Return a new identity array of given shape, type, and context.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InitOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpParam>)
-.set_attr<FCompute>("FCompute<cpu>", IdentityCompute<cpu>)
-.add_arguments(InitOpParam::__FIELDS__());
+    .describe("Return a new identity array of given shape, type, and context.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpParam>)
+    .set_attr<FCompute>("FCompute<cpu>", IdentityCompute<cpu>)
+    .add_arguments(InitOpParam::__FIELDS__());
 
-template<int NDim>
+template <int NDim>
 inline bool AtleastNDShape(const nnvm::NodeAttrs& attrs,
-                           std::vector<mxnet::TShape> *in_attrs,
-                           std::vector<mxnet::TShape> *out_attrs) {
-  auto &param = nnvm::get<AtleastNDParam>(attrs.parsed);
+                           std::vector<mxnet::TShape>* in_attrs,
+                           std::vector<mxnet::TShape>* out_attrs) {
+  auto& param = nnvm::get<AtleastNDParam>(attrs.parsed);
 
   CHECK_EQ(in_attrs->size(), param.num_args);
   CHECK_EQ(out_attrs->size(), param.num_args);
 
   for (int i = 0; i < param.num_args; ++i) {
-    auto &shape = in_attrs->at(i);
+    auto& shape = in_attrs->at(i);
     if (shape.ndim() < NDim) {
       mxnet::TShape new_shape(NDim, 1);
       if (NDim == 2) {
@@ -145,36 +144,35 @@ inline bool AtleastNDShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(*in_attrs) && shape_is_known(*out_attrs);
 }
 
-#define NNVM_REGISTER_ATLEAST_ND(N)                                       \
-NNVM_REGISTER_OP(_npi_atleast_##N##d)                                      \
-.set_attr_parser(ParamParser<AtleastNDParam>)                             \
-.set_num_inputs(                                                          \
-[](const NodeAttrs& attrs) {                                              \
-  auto &param = nnvm::get<AtleastNDParam>(attrs.parsed);                  \
-  return param.num_args;                                                  \
-})                                                                        \
-.set_num_outputs(                                                         \
-[](const NodeAttrs& attrs) {                                              \
-  auto &param = nnvm::get<AtleastNDParam>(attrs.parsed);                  \
-  return param.num_args;                                                  \
-})                                                                        \
-.set_attr<std::string>("key_var_num_args", "num_args")                    \
-.set_attr<nnvm::FListInputNames>("FListInputNames",                       \
-[](const nnvm::NodeAttrs& attrs) {                                        \
-  int num_args = nnvm::get<AtleastNDParam>(attrs.parsed).num_args;        \
-  std::vector<std::string> ret;                                           \
-  ret.reserve(num_args);                                                  \
-  for (int i = 0; i < num_args; i++) {                                    \
-    ret.push_back(std::string("ary") + std::to_string(i));                \
-  }                                                                       \
-  return ret;                                                             \
-})                                                                        \
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)           \
-.set_attr<mxnet::FInferShape>("FInferShape", AtleastNDShape<N>)           \
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                \
-.set_attr<FCompute>("FCompute<cpu>", AtleastNDCompute<cpu>)               \
-.add_argument("arys", "NDArray-or-Symbol[]", "List of input arrays")      \
-.add_arguments(AtleastNDParam::__FIELDS__())                              \
+#define NNVM_REGISTER_ATLEAST_ND(N)                                                               \
+  NNVM_REGISTER_OP(_npi_atleast_##N##d)                                                           \
+      .set_attr_parser(ParamParser<AtleastNDParam>)                                               \
+      .set_num_inputs([](const NodeAttrs& attrs) {                                                \
+        auto& param = nnvm::get<AtleastNDParam>(attrs.parsed);                                    \
+        return param.num_args;                                                                    \
+      })                                                                                          \
+      .set_num_outputs([](const NodeAttrs& attrs) {                                               \
+        auto& param = nnvm::get<AtleastNDParam>(attrs.parsed);                                    \
+        return param.num_args;                                                                    \
+      })                                                                                          \
+      .set_attr<std::string>("key_var_num_args", "num_args")                                      \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const nnvm::NodeAttrs& attrs) {                         \
+                                         int num_args =                                           \
+                                             nnvm::get<AtleastNDParam>(attrs.parsed).num_args;    \
+                                         std::vector<std::string> ret;                            \
+                                         ret.reserve(num_args);                                   \
+                                         for (int i = 0; i < num_args; i++) {                     \
+                                           ret.push_back(std::string("ary") + std::to_string(i)); \
+                                         }                                                        \
+                                         return ret;                                              \
+                                       })                                                         \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)                             \
+      .set_attr<mxnet::FInferShape>("FInferShape", AtleastNDShape<N>)                             \
+      .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                                  \
+      .set_attr<FCompute>("FCompute<cpu>", AtleastNDCompute<cpu>)                                 \
+      .add_argument("arys", "NDArray-or-Symbol[]", "List of input arrays")                        \
+      .add_arguments(AtleastNDParam::__FIELDS__())
 
 NNVM_REGISTER_ATLEAST_ND(1);
 
@@ -183,83 +181,85 @@ NNVM_REGISTER_ATLEAST_ND(2);
 NNVM_REGISTER_ATLEAST_ND(3);
 
 NNVM_REGISTER_OP(_npi_full_like)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<FullLikeOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", FullLikeOpType<FullLikeOpParam>)
-.set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
-  [](const NodeAttrs& attrs) {
-    return std::vector<uint32_t>(1, 0);
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.set_attr<FCompute>("FCompute<cpu>", FullLikeOpCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("a", "NDArray-or-Symbol",
-              "The shape and data-type of a define these same attributes of the returned array.")
-.add_arguments(FullLikeOpParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<FullLikeOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", FullLikeOpType<FullLikeOpParam>)
+    .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>(1, 0);
+                                   })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", FullLikeOpCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument(
+        "a",
+        "NDArray-or-Symbol",
+        "The shape and data-type of a define these same attributes of the returned array.")
+    .add_arguments(FullLikeOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_full)
-  .describe("fill target with a scalar value")
-  .set_num_inputs(0)
-  .set_num_outputs(1)
-  .set_attr_parser(ParamParser<InitOpWithScalarParam>)
-  .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpWithScalarParam>)
-  .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpWithScalarParam>)
-  .set_attr<FCompute>("FCompute<cpu>", InitFillWithScalarCompute<cpu>)
-.add_arguments(InitOpWithScalarParam::__FIELDS__());
+    .describe("fill target with a scalar value")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpWithScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpWithScalarParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<InitOpWithScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", InitFillWithScalarCompute<cpu>)
+    .add_arguments(InitOpWithScalarParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_arange)
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(RangeParamParser)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyRangeShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<RangeParam>)
-.set_attr<FCompute>("FCompute<cpu>", RangeCompute<cpu, RangeParam>)
-.add_arguments(RangeParam::__FIELDS__());
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(RangeParamParser)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyRangeShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<RangeParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RangeCompute<cpu, RangeParam>)
+    .add_arguments(RangeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_eye)
-.describe("Return a 2-D array with ones on the diagonal and zeros elsewhere.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyEyeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyEyeShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyEyeParam>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyEyeFill<cpu>)
-.add_arguments(NumpyEyeParam::__FIELDS__());
+    .describe("Return a 2-D array with ones on the diagonal and zeros elsewhere.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyEyeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyEyeShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyEyeParam>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyEyeFill<cpu>)
+    .add_arguments(NumpyEyeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_indices)
-.describe("Return an array representing the indices of a grid.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<IndicesOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyIndicesShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyIndicesType)
-.set_attr<FCompute>("FCompute<cpu>", IndicesCompute<cpu>)
-.add_arguments(IndicesOpParam::__FIELDS__());
+    .describe("Return an array representing the indices of a grid.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<IndicesOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyIndicesShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyIndicesType)
+    .set_attr<FCompute>("FCompute<cpu>", IndicesCompute<cpu>)
+    .add_arguments(IndicesOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_linspace)
-.describe("Return evenly spaced numbers over a specified interval. Similar to Numpy")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LinspaceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", LinspaceShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<LinspaceParam>)
-.set_attr<FCompute>("FCompute<cpu>", LinspaceCompute<cpu>)
-.add_arguments(RangeParam::__FIELDS__());
+    .describe("Return evenly spaced numbers over a specified interval. Similar to Numpy")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LinspaceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", LinspaceShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<LinspaceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", LinspaceCompute<cpu>)
+    .add_arguments(RangeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_logspace)
-.describe("Return numbers spaced evenly on a log scale.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LogspaceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", LogspaceShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<LogspaceParam>)
-.set_attr<FCompute>("FCompute<cpu>", LogspaceCompute<cpu>)
-.add_arguments(LogspaceParam::__FIELDS__());
+    .describe("Return numbers spaced evenly on a log scale.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LogspaceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", LogspaceShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<LogspaceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", LogspaceCompute<cpu>)
+    .add_arguments(LogspaceParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_init_op.cu b/src/operator/numpy/np_init_op.cu
index 8b0760ed5765..1b997ec5cbdc 100644
--- a/src/operator/numpy/np_init_op.cu
+++ b/src/operator/numpy/np_init_op.cu
@@ -29,44 +29,31 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_zeros)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>);
+NNVM_REGISTER_OP(_npi_zeros).set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>);
 
-NNVM_REGISTER_OP(_npi_ones)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 1>);
+NNVM_REGISTER_OP(_npi_ones).set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 1>);
 
-NNVM_REGISTER_OP(_npi_identity)
-.set_attr<FCompute>("FCompute<gpu>", IdentityCompute<gpu>);
+NNVM_REGISTER_OP(_npi_identity).set_attr<FCompute>("FCompute<gpu>", IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_full_like)
-.set_attr<FCompute>("FCompute<gpu>", FullLikeOpCompute<gpu>);
+NNVM_REGISTER_OP(_npi_full_like).set_attr<FCompute>("FCompute<gpu>", FullLikeOpCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_full)
-.set_attr<FCompute>("FCompute<gpu>", InitFillWithScalarCompute<gpu>);
+NNVM_REGISTER_OP(_npi_full).set_attr<FCompute>("FCompute<gpu>", InitFillWithScalarCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_atleast_1d)
-.set_attr<FCompute>("FCompute<gpu>", AtleastNDCompute<gpu>);
+NNVM_REGISTER_OP(_npi_atleast_1d).set_attr<FCompute>("FCompute<gpu>", AtleastNDCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_atleast_2d)
-.set_attr<FCompute>("FCompute<gpu>", AtleastNDCompute<gpu>);
+NNVM_REGISTER_OP(_npi_atleast_2d).set_attr<FCompute>("FCompute<gpu>", AtleastNDCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_atleast_3d)
-.set_attr<FCompute>("FCompute<gpu>", AtleastNDCompute<gpu>);
+NNVM_REGISTER_OP(_npi_atleast_3d).set_attr<FCompute>("FCompute<gpu>", AtleastNDCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_arange)
-.set_attr<FCompute>("FCompute<gpu>", RangeCompute<gpu, RangeParam>);
+NNVM_REGISTER_OP(_npi_arange).set_attr<FCompute>("FCompute<gpu>", RangeCompute<gpu, RangeParam>);
 
-NNVM_REGISTER_OP(_npi_eye)
-.set_attr<FCompute>("FCompute<gpu>", NumpyEyeFill<gpu>);
+NNVM_REGISTER_OP(_npi_eye).set_attr<FCompute>("FCompute<gpu>", NumpyEyeFill<gpu>);
 
-NNVM_REGISTER_OP(_npi_indices)
-.set_attr<FCompute>("FCompute<gpu>", IndicesCompute<gpu>);
+NNVM_REGISTER_OP(_npi_indices).set_attr<FCompute>("FCompute<gpu>", IndicesCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_linspace)
-.set_attr<FCompute>("FCompute<gpu>", LinspaceCompute<gpu>);
+NNVM_REGISTER_OP(_npi_linspace).set_attr<FCompute>("FCompute<gpu>", LinspaceCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_logspace)
-.set_attr<FCompute>("FCompute<gpu>", LogspaceCompute<gpu>);
+NNVM_REGISTER_OP(_npi_logspace).set_attr<FCompute>("FCompute<gpu>", LogspaceCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_init_op.h b/src/operator/numpy/np_init_op.h
index f12e7f4f091e..683b685066b6 100644
--- a/src/operator/numpy/np_init_op.h
+++ b/src/operator/numpy/np_init_op.h
@@ -34,7 +34,6 @@
 #include "../tensor/elemwise_unary_op.h"
 #include "../../api/operator/op_utils.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -45,25 +44,19 @@ struct NumpyEyeParam : public dmlc::Parameter<NumpyEyeParam> {
   std::string ctx;
   int dtype;
   DMLC_DECLARE_PARAMETER(NumpyEyeParam) {
-    DMLC_DECLARE_FIELD(N)
-    .describe("Number of rows in the output.");
+    DMLC_DECLARE_FIELD(N).describe("Number of rows in the output.");
     DMLC_DECLARE_FIELD(M)
-    .set_default(dmlc::optional<nnvm::dim_t>())
-    .describe("Number of columns in the output. If None, defaults to N.");
-    DMLC_DECLARE_FIELD(k)
-    .set_default(0)
-    .describe("Index of the diagonal. 0 (the default) refers to the main diagonal,"
-              "a positive value refers to an upper diagonal."
-              "and a negative value to a lower diagonal.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL
-    .describe("Data-type of the returned array.");
+        .set_default(dmlc::optional<nnvm::dim_t>())
+        .describe("Number of columns in the output. If None, defaults to N.");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Index of the diagonal. 0 (the default) refers to the main diagonal,"
+        "a positive value refers to an upper diagonal."
+        "and a negative value to a lower diagonal.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL.describe("Data-type of the returned array.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream N_s, M_s, k_s, dtype_s;
@@ -71,9 +64,9 @@ struct NumpyEyeParam : public dmlc::Parameter<NumpyEyeParam> {
     M_s << M;
     k_s << k;
     dtype_s << dtype;
-    (*dict)["N"] = N_s.str();
-    (*dict)["M"] = M_s.str();
-    (*dict)["k"] = k_s.str();
+    (*dict)["N"]     = N_s.str();
+    (*dict)["M"]     = M_s.str();
+    (*dict)["k"]     = k_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
   }
 };
@@ -83,23 +76,19 @@ struct IndicesOpParam : public dmlc::Parameter<IndicesOpParam> {
   int dtype;
   std::string ctx;
   DMLC_DECLARE_PARAMETER(IndicesOpParam) {
-    DMLC_DECLARE_FIELD(dimensions)
-    .describe("The shape of the grid.");
-    DMLC_DECLARE_FIELD(dtype).set_default(-1)
-      .add_enum("None", -1)
-      MXNET_ADD_ALL_TYPES
-      .describe("Target data type.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dimensions).describe("The shape of the grid.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES.describe("Target data type.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream dimensions_s, dtype_s;
     dimensions_s << dimensions;
     dtype_s << dtype;
     (*dict)["dimensions"] = dimensions_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]      = MXNetTypeWithBool2String(dtype);
   }
 };
 
@@ -121,8 +110,8 @@ inline bool NumpyRangeShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NumpyEyeShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   const NumpyEyeParam& param = nnvm::get<NumpyEyeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -133,7 +122,7 @@ inline bool NumpyEyeShape(const nnvm::NodeAttrs& attrs,
 
   return out_attrs->at(0).ndim() != 0U;
 }
-template<typename xpu>
+template <typename xpu>
 void NumpyEyeFill(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
@@ -141,29 +130,31 @@ void NumpyEyeFill(const nnvm::NodeAttrs& attrs,
                   const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 0U);
   CHECK_EQ(outputs.size(), 1U);
-  if (outputs[0].shape_.Size() == 0) return;  // zero-size tensor
+  if (outputs[0].shape_.Size() == 0)
+    return;  // zero-size tensor
   const NumpyEyeParam& param = nnvm::get<NumpyEyeParam>(attrs.parsed);
   const nnvm::dim_t num_cols = param.M.has_value() ? param.M.value() : param.N;
   EyeFillImpl<xpu>(outputs[0], ctx, req, num_cols, param.N, param.k);
 }
 
-template<int req>
+template <int req>
 struct indices_fwd {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
                                   const nnvm::dim_t value,
                                   const nnvm::dim_t N,
                                   const nnvm::dim_t dim_i,
                                   const nnvm::dim_t j,
                                   const nnvm::dim_t k,
                                   const nnvm::dim_t t) {
-    KERNEL_ASSIGN(out[dim_i*N+N/(t*value)*j+i+k*N/t], req, static_cast<DType>(j));
+    KERNEL_ASSIGN(out[dim_i * N + N / (t * value) * j + i + k * N / t], req, static_cast<DType>(j));
   }
 };
 
-template<int req>
+template <int req>
 struct identity {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const int n) {
     using namespace mxnet_op;
 
@@ -177,7 +168,7 @@ struct identity {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void IndicesCompute(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -188,32 +179,33 @@ void IndicesCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   const IndicesOpParam& param = nnvm::get<IndicesOpParam>(attrs.parsed);
-  const TBlob& out_data = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  dim_t indim = param.dimensions.ndim();
-  dim_t t = 1;
-  dim_t N = out_data.Size()/indim;
-  dim_t value = 0;
-  if (out_data.Size() == 0) return;
+  const TBlob& out_data       = outputs[0];
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
+  dim_t indim                 = param.dimensions.ndim();
+  dim_t t                     = 1;
+  dim_t N                     = out_data.Size() / indim;
+  dim_t value                 = 0;
+  if (out_data.Size() == 0)
+    return;
   if (req[0] != kNullOp) {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-          for (int i = 0; i < indim; ++i) {
-            value = param.dimensions[i];
-            for (int k = 0; k < t; ++k) {
-              for (int j = 0; j < param.dimensions[i]; ++j) {
-                Kernel<indices_fwd<req_type>, xpu>::Launch(s, N/(param.dimensions[i] * t),
-                    out_data.dptr<DType>(), value, N, i, j, k, t);
-              }
+        for (int i = 0; i < indim; ++i) {
+          value = param.dimensions[i];
+          for (int k = 0; k < t; ++k) {
+            for (int j = 0; j < param.dimensions[i]; ++j) {
+              Kernel<indices_fwd<req_type>, xpu>::Launch(
+                  s, N / (param.dimensions[i] * t), out_data.dptr<DType>(), value, N, i, j, k, t);
             }
-            t = t * param.dimensions[i];
           }
+          t = t * param.dimensions[i];
+        }
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void IdentityCompute(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -224,13 +216,12 @@ void IdentityCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 0U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
   const TBlob& out_data = outputs[0];
-  int n = out_data.shape_[0];
+  int n                 = out_data.shape_[0];
   MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<identity<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), n);
+      Kernel<identity<req_type>, xpu>::Launch(s, out_data.Size(), out_data.dptr<DType>(), n);
     });
   });
 }
@@ -244,27 +235,19 @@ struct LogspaceParam : public dmlc::Parameter<LogspaceParam> {
   std::string ctx;
   int dtype;
   DMLC_DECLARE_PARAMETER(LogspaceParam) {
-    DMLC_DECLARE_FIELD(start)
-    .describe("The starting value of the sequence.");
-    DMLC_DECLARE_FIELD(stop)
-    .describe("The ending value of the sequence");
-    DMLC_DECLARE_FIELD(num)
-    .describe("Number of samples to generate. Must be non-negative.");
-    DMLC_DECLARE_FIELD(endpoint)
-    .set_default(true)
-    .describe("If True, stop is the last sample. Otherwise, it is not included.");
-    DMLC_DECLARE_FIELD(base)
-    .set_default(10.0)
-    .describe("The base of the log space. The step size between the elements in "
-    "ln(samples) / ln(base) (or log_base(samples)) is uniform.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-    "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype).set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES
-    .describe("Target data type.");
+    DMLC_DECLARE_FIELD(start).describe("The starting value of the sequence.");
+    DMLC_DECLARE_FIELD(stop).describe("The ending value of the sequence");
+    DMLC_DECLARE_FIELD(num).describe("Number of samples to generate. Must be non-negative.");
+    DMLC_DECLARE_FIELD(endpoint).set_default(true).describe(
+        "If True, stop is the last sample. Otherwise, it is not included.");
+    DMLC_DECLARE_FIELD(base).set_default(10.0).describe(
+        "The base of the log space. The step size between the elements in "
+        "ln(samples) / ln(base) (or log_base(samples)) is uniform.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES.describe("Target data type.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream start_s, stop_s, num_s, endpoint_s, base_s, dtype_s;
@@ -273,48 +256,53 @@ struct LogspaceParam : public dmlc::Parameter<LogspaceParam> {
     num_s << num;
     endpoint_s << endpoint;
     base_s << base;
-    (*dict)["start"] = start_s.str();
-    (*dict)["stop"] = stop_s.str();
-    (*dict)["num"] = num_s.str();
+    (*dict)["start"]    = start_s.str();
+    (*dict)["stop"]     = stop_s.str();
+    (*dict)["num"]      = num_s.str();
     (*dict)["endpoint"] = endpoint_s.str();
-    (*dict)["base"] = base_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["base"]     = base_s.str();
+    (*dict)["dtype"]    = MXNetTypeWithBool2String(dtype);
   }
 };
 
 struct logspace_fwd {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, double start, double stop, double base,
-                                  double step, int req, DType* out) {
-    KERNEL_ASSIGN(out[i], req,
-                  static_cast<DType>(math::pow(base, static_cast<double>(start + step * i))));
+  template <typename DType>
+  MSHADOW_XINLINE static void
+  Map(index_t i, double start, double stop, double base, double step, int req, DType* out) {
+    KERNEL_ASSIGN(
+        out[i], req, static_cast<DType>(math::pow(base, static_cast<double>(start + step * i))));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void LogspaceCompute(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
                      const std::vector<OpReqType>& req,
                      const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s             = ctx.get_stream<xpu>();
   const LogspaceParam& param = nnvm::get<LogspaceParam>(attrs.parsed);
-  if (param.num == 0) return;
+  if (param.num == 0)
+    return;
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      index_t step_num = param.endpoint ? param.num - 1 : param.num;
-      double step = step_num > 0 ? (param.stop - param.start) / step_num : 0.0f;
-      Kernel<logspace_fwd, xpu>::Launch(s, outputs[0].Size(), param.start, param.stop, param.base,
-          step, req[0], outputs[0].dptr<DType>());
+    index_t step_num = param.endpoint ? param.num - 1 : param.num;
+    double step      = step_num > 0 ? (param.stop - param.start) / step_num : 0.0f;
+    Kernel<logspace_fwd, xpu>::Launch(s,
+                                      outputs[0].Size(),
+                                      param.start,
+                                      param.stop,
+                                      param.base,
+                                      step,
+                                      req[0],
+                                      outputs[0].dptr<DType>());
   });
 }
 
 struct AtleastNDParam : dmlc::Parameter<AtleastNDParam> {
   int num_args;
   DMLC_DECLARE_PARAMETER(AtleastNDParam) {
-    DMLC_DECLARE_FIELD(num_args)
-    .set_lower_bound(1)
-    .describe("Number of input arrays.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of input arrays.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_args_s;
@@ -323,13 +311,13 @@ struct AtleastNDParam : dmlc::Parameter<AtleastNDParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void AtleastNDCompute(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs) {
-  auto &param = nnvm::get<AtleastNDParam>(attrs.parsed);
+  auto& param = nnvm::get<AtleastNDParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), param.num_args);
   CHECK_EQ(outputs.size(), param.num_args);
   for (int i = 0; i < param.num_args; ++i) {
diff --git a/src/operator/numpy/np_insert_op-inl.h b/src/operator/numpy/np_insert_op-inl.h
index be77c01f1584..2443b1b6baed 100644
--- a/src/operator/numpy/np_insert_op-inl.h
+++ b/src/operator/numpy/np_insert_op-inl.h
@@ -47,24 +47,25 @@ struct NumpyInsertParam : public dmlc::Parameter<NumpyInsertParam> {
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(NumpyInsertParam) {
     DMLC_DECLARE_FIELD(val)
-    .set_default(dmlc::optional<double>())
-    .describe("A scaler to be inserted into 'array'");
+        .set_default(dmlc::optional<double>())
+        .describe("A scaler to be inserted into 'array'");
     DMLC_DECLARE_FIELD(start)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is slice, 'start' is one of it's arguments.");
+        .set_default(dmlc::optional<index_t>())
+        .describe("If 'obj' is slice, 'start' is one of it's arguments.");
     DMLC_DECLARE_FIELD(stop)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is slice, 'stop' is one of it's arguments.");
+        .set_default(dmlc::optional<index_t>())
+        .describe("If 'obj' is slice, 'stop' is one of it's arguments.");
     DMLC_DECLARE_FIELD(step)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is slice, 'step' is one of it's arguments.");
+        .set_default(dmlc::optional<index_t>())
+        .describe("If 'obj' is slice, 'step' is one of it's arguments.");
     DMLC_DECLARE_FIELD(int_ind)
-    .set_default(dmlc::optional<index_t>())
-    .describe("If 'obj' is int, 'int_ind' is the index before which"
-              "'values' is inserted");
+        .set_default(dmlc::optional<index_t>())
+        .describe(
+            "If 'obj' is int, 'int_ind' is the index before which"
+            "'values' is inserted");
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<int>())
-    .describe("Axis along which to insert 'values'.");
+        .set_default(dmlc::optional<int>())
+        .describe("Axis along which to insert 'values'.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream val_s, start_s, stop_s, step_s, int_ind_s, axis_s;
@@ -74,12 +75,12 @@ struct NumpyInsertParam : public dmlc::Parameter<NumpyInsertParam> {
     step_s << step;
     int_ind_s << int_ind;
     axis_s << axis;
-    (*dict)["val"] = val_s.str();
-    (*dict)["start"] = start_s.str();
-    (*dict)["stop"] = stop_s.str();
-    (*dict)["step"] = step_s.str();
+    (*dict)["val"]     = val_s.str();
+    (*dict)["start"]   = start_s.str();
+    (*dict)["stop"]    = stop_s.str();
+    (*dict)["step"]    = step_s.str();
     (*dict)["int_ind"] = int_ind_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]    = axis_s.str();
   }
 };
 
@@ -88,8 +89,10 @@ struct NumpyInsertParam : public dmlc::Parameter<NumpyInsertParam> {
  * \tparam ndim - both 'in_arr', 'in_val' and 'out_data' have same ndim before call this.
  * \param out_data - output: insert 'value' to 'arr' according to 'index'.
  * \param in_arr - input: 'arr', original array.
- * \param index - input(only for first Map): it's the only element in 'obj' indicats insert position.
- * \param in_obj - input(only for second Map): It indicats insert position, it's ndim may equals to 0.
+ * \param index - input(only for first Map): it's the only element in 'obj' indicats insert
+ position.
+ * \param in_obj - input(only for second Map): It indicats insert position, it's ndim may equals to
+ 0.
  * \param in_val - input: 'value', insert to 'arr' according to 'index'.
  * \param N - (only for first Map) arr.shape_[axis]
  * \param numnew - extra dim size in 'out_data' compared with 'arr' in 'axis'.
@@ -100,19 +103,24 @@ struct NumpyInsertParam : public dmlc::Parameter<NumpyInsertParam> {
          The first one use a scaler index;
          The second one use a sequence of indecies which only has one index.
  */
-template<int ndim>
+template <int ndim>
 struct InsertSingleIndexKernel {
-  template<typename DType, typename VType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-                                  const VType* in_val, const DType* in_arr,
+  template <typename DType, typename VType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const VType* in_val,
+                                  const DType* in_arr,
                                   const mshadow::Shape<ndim> outshape,
                                   const mshadow::Shape<ndim> valshape,
-                                  const index_t index, const size_t numnew,
+                                  const index_t index,
+                                  const size_t numnew,
                                   const mshadow::Shape<ndim> val_stride,
                                   const mshadow::Shape<ndim> old_val_stride,
                                   const mshadow::Shape<ndim> arr_stride,
                                   const mshadow::Shape<ndim> out_stride,
-                                  const index_t axis, bool moveaxis, const int req) {
+                                  const index_t axis,
+                                  bool moveaxis,
+                                  const int req) {
     // i is the global flattened index in the output
     // out_idx: i -> position in output's shape
     mshadow::Shape<ndim> out_idx = mxnet_op::unravel(i, outshape);
@@ -133,7 +141,7 @@ struct InsertSingleIndexKernel {
           dest_idx += old_val_stride[j + 1] * val_idx[j];
         }
         dest_idx += old_val_stride[0] * val_idx[axis];
-        for (int j = axis + 1; j < ndim ; ++j) {
+        for (int j = axis + 1; j < ndim; ++j) {
           dest_idx += old_val_stride[j] * val_idx[j];
         }
       } else {
@@ -141,27 +149,32 @@ struct InsertSingleIndexKernel {
       }
       KERNEL_ASSIGN(out_data[i], req, static_cast<DType>(in_val[dest_idx]));
     } else {  // from 'arr'
-      index_t idx_arr = (out_idx[axis] < index) ?
-                     out_idx[axis] : out_idx[axis] - numnew;
+      index_t idx_arr = (out_idx[axis] < index) ? out_idx[axis] : out_idx[axis] - numnew;
       // arr_idx: i -> position in arr's shape
       mshadow::Shape<ndim> arr_idx(out_idx);
       arr_idx[axis] = idx_arr;
-      dest_idx = mxnet_op::dot(arr_stride, arr_idx);
+      dest_idx      = mxnet_op::dot(arr_stride, arr_idx);
       KERNEL_ASSIGN(out_data[i], req, in_arr[dest_idx]);
     }
   }
 
-  template<typename DType, typename VType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-                                  const VType* in_val, const DType* in_arr,
+  template <typename DType, typename VType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const VType* in_val,
+                                  const DType* in_arr,
                                   const mshadow::Shape<ndim> outshape,
                                   const mshadow::Shape<ndim> valshape,
-                                  const index_t N, const int64_t* in_obj, const size_t numnew,
+                                  const index_t N,
+                                  const int64_t* in_obj,
+                                  const size_t numnew,
                                   const mshadow::Shape<ndim> val_stride,
                                   const mshadow::Shape<ndim> old_val_stride,
                                   const mshadow::Shape<ndim> arr_stride,
                                   const mshadow::Shape<ndim> out_stride,
-                                  const int axis, bool moveaxis, const int req) {
+                                  const int axis,
+                                  bool moveaxis,
+                                  const int req) {
     // i is the global flattened index in the output
     // out_idx: i -> position in output's shape
     mshadow::Shape<ndim> out_idx = mxnet_op::unravel(i, outshape);
@@ -186,8 +199,8 @@ struct InsertSingleIndexKernel {
           dest_idx += old_val_stride[j + 1] * val_idx[j];
         }
         dest_idx += old_val_stride[0] * val_idx[axis];
-        for (int j = axis + 1; j < ndim ; ++j) {
-          dest_idx += old_val_stride[j] *val_idx[j];
+        for (int j = axis + 1; j < ndim; ++j) {
+          dest_idx += old_val_stride[j] * val_idx[j];
         }
       } else {
         dest_idx = mxnet_op::dot(val_stride, val_idx);
@@ -198,7 +211,7 @@ struct InsertSingleIndexKernel {
       // arr_idx: i -> position in arr's shape
       mshadow::Shape<ndim> arr_idx(out_idx);
       arr_idx[axis] = idx_arr;
-      dest_idx = mxnet_op::dot(arr_stride, arr_idx);
+      dest_idx      = mxnet_op::dot(arr_stride, arr_idx);
       KERNEL_ASSIGN(out_data[i], req, in_arr[dest_idx]);
     }
   }
@@ -212,17 +225,19 @@ struct InsertSingleIndexKernel {
  * \param in_obj - input: It indicats insert position, ndim may equals to 0.
  * \param in_val - input: 'value', insert to 'arr' according to 'index'.
  * \param is_insert - if is_insert[out_idx[axis]] is true, it's from 'values', else from 'arr'.
- * \param origin_idx - indicate the original position in 'arr' or 'values' in 'axis'. 
+ * \param origin_idx - indicate the original position in 'arr' or 'values' in 'axis'.
  * \param axis - insert 'value' to 'arr' in 'axis'.
  * \note Different between the two Map:
          The first one insert a block of data, param 'in_val' is a tensor;
          The second one insert only a single data, param 'in_val' is a scaler.
  */
-template<int ndim>
+template <int ndim>
 struct InsertSeqIndicesKernel {
-  template<typename DType, typename VType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-                                  const VType* in_val, const DType* in_arr,
+  template <typename DType, typename VType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const VType* in_val,
+                                  const DType* in_arr,
                                   const mshadow::Shape<ndim> outshape,
                                   const mshadow::Shape<ndim> valshape,
                                   const index_t* is_insert,
@@ -230,7 +245,8 @@ struct InsertSeqIndicesKernel {
                                   const mshadow::Shape<ndim> val_stride,
                                   const mshadow::Shape<ndim> arr_stride,
                                   const mshadow::Shape<ndim> out_stride,
-                                  const index_t axis, const int req) {
+                                  const index_t axis,
+                                  const int req) {
     // i is the global flattened index in the output
     // out_idx: i -> position in output's shape
     mshadow::Shape<ndim> out_idx = mxnet_op::unravel(i, outshape);
@@ -256,15 +272,14 @@ struct InsertSeqIndicesKernel {
       // arr_idx: i -> position in arr's shape
       mshadow::Shape<ndim> arr_idx(out_idx);
       arr_idx[axis] = idx_arr;
-      dest_idx = mxnet_op::dot(arr_idx, arr_stride);
+      dest_idx      = mxnet_op::dot(arr_idx, arr_stride);
       KERNEL_ASSIGN(out_data[i], req, in_arr[dest_idx]);
     }
   }
 };
 
 struct ObjToIndices {
-  MSHADOW_XINLINE static void Map(index_t i, int64_t* indices,
-                                  int N, const int64_t* obj) {
+  MSHADOW_XINLINE static void Map(index_t i, int64_t* indices, int N, const int64_t* obj) {
     indices[i] = obj[i];
     if (indices[i] < 0) {
       indices[i] += static_cast<index_t>(N);
@@ -291,8 +306,7 @@ struct SetOriginValuesIdx {
 };
 
 struct SetOriginArrIdx {
-  MSHADOW_XINLINE static void Map(index_t i, const index_t* is_insert,
-                         index_t* origin_idx) {
+  MSHADOW_XINLINE static void Map(index_t i, const index_t* is_insert, index_t* origin_idx) {
     if (!is_insert[i]) {
       index_t cnt = 0;
       for (index_t j = 0; j < i; ++j) {
@@ -305,78 +319,129 @@ struct SetOriginArrIdx {
   }
 };
 
-template<typename xpu, int ndim>
-void InsertScalerImpl(mshadow::Stream<xpu> *s, const TBlob& output,
-                      const TBlob& arr, const TBlob& values,
+template <typename xpu, int ndim>
+void InsertScalerImpl(mshadow::Stream<xpu>* s,
+                      const TBlob& output,
+                      const TBlob& arr,
+                      const TBlob& values,
                       const mshadow::Shape<ndim>& arr_strides,
                       const mshadow::Shape<ndim>& val_strides,
                       const mshadow::Shape<ndim>& old_val_strides,
                       const mshadow::Shape<ndim>& out_strides,
                       const mshadow::Shape<ndim>& k_outshape,
                       const mshadow::Shape<ndim>& k_valshape,
-                      const int dtype, const int vtype, const int req,
-                      const int axis, const index_t index, const size_t numnew,
-                      const size_t len, const bool moveaxis) {
+                      const int dtype,
+                      const int vtype,
+                      const int req,
+                      const int axis,
+                      const index_t index,
+                      const size_t numnew,
+                      const size_t len,
+                      const bool moveaxis) {
   using namespace mshadow;
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
     MSHADOW_TYPE_SWITCH(vtype, VType, {
-      Kernel<InsertSingleIndexKernel<ndim>, xpu>::Launch(
-        s, len, output.dptr<DType>(),
-        values.dptr<VType>(), arr.dptr<DType>(),
-        k_outshape, k_valshape, index, numnew,
-        val_strides, old_val_strides, arr_strides, out_strides,
-        axis, moveaxis, req);
+      Kernel<InsertSingleIndexKernel<ndim>, xpu>::Launch(s,
+                                                         len,
+                                                         output.dptr<DType>(),
+                                                         values.dptr<VType>(),
+                                                         arr.dptr<DType>(),
+                                                         k_outshape,
+                                                         k_valshape,
+                                                         index,
+                                                         numnew,
+                                                         val_strides,
+                                                         old_val_strides,
+                                                         arr_strides,
+                                                         out_strides,
+                                                         axis,
+                                                         moveaxis,
+                                                         req);
     });
   });
 }
 
-template<typename xpu, int ndim>
-void InsertSizeOneTensorImpl(mshadow::Stream<xpu> *s, const TBlob& output,
-                             const TBlob& arr, const TBlob& values,
+template <typename xpu, int ndim>
+void InsertSizeOneTensorImpl(mshadow::Stream<xpu>* s,
+                             const TBlob& output,
+                             const TBlob& arr,
+                             const TBlob& values,
                              const mshadow::Shape<ndim>& arr_strides,
                              const mshadow::Shape<ndim>& val_strides,
                              const mshadow::Shape<ndim>& old_val_strides,
                              const mshadow::Shape<ndim>& out_strides,
                              const mshadow::Shape<ndim>& k_outshape,
                              const mshadow::Shape<ndim>& k_valshape,
-                             const int dtype, const int vtype, const int req,
-                             const int axis, const TBlob& index, const size_t numnew,
-                             const index_t N, const size_t len, const bool moveaxis) {
+                             const int dtype,
+                             const int vtype,
+                             const int req,
+                             const int axis,
+                             const TBlob& index,
+                             const size_t numnew,
+                             const index_t N,
+                             const size_t len,
+                             const bool moveaxis) {
   using namespace mshadow;
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
     MSHADOW_TYPE_SWITCH(vtype, VType, {
-      Kernel<InsertSingleIndexKernel<ndim>, xpu>::Launch(
-        s, len, output.dptr<DType>(),
-        values.dptr<VType>(), arr.dptr<DType>(),
-        k_outshape, k_valshape, N, index.dptr<int64_t>(), numnew,
-        val_strides, old_val_strides, arr_strides, out_strides,
-        axis, moveaxis, req);
+      Kernel<InsertSingleIndexKernel<ndim>, xpu>::Launch(s,
+                                                         len,
+                                                         output.dptr<DType>(),
+                                                         values.dptr<VType>(),
+                                                         arr.dptr<DType>(),
+                                                         k_outshape,
+                                                         k_valshape,
+                                                         N,
+                                                         index.dptr<int64_t>(),
+                                                         numnew,
+                                                         val_strides,
+                                                         old_val_strides,
+                                                         arr_strides,
+                                                         out_strides,
+                                                         axis,
+                                                         moveaxis,
+                                                         req);
     });
   });
 }
 
-template<typename xpu, int ndim>
-void InsertSequenceImpl(mshadow::Stream<xpu> *s, const TBlob& output,
-                        const TBlob& arr, const TBlob& values,
+template <typename xpu, int ndim>
+void InsertSequenceImpl(mshadow::Stream<xpu>* s,
+                        const TBlob& output,
+                        const TBlob& arr,
+                        const TBlob& values,
                         const mshadow::Shape<ndim>& arr_strides,
                         const mshadow::Shape<ndim>& val_strides,
                         const mshadow::Shape<ndim>& out_strides,
                         const mshadow::Shape<ndim>& k_outshape,
                         const mshadow::Shape<ndim>& k_valshape,
-                        const index_t* is_insert, const index_t* origin_idx,
-                        const int dtype, const int vtype, const int req,
-                        const int axis, const size_t len) {
+                        const index_t* is_insert,
+                        const index_t* origin_idx,
+                        const int dtype,
+                        const int vtype,
+                        const int req,
+                        const int axis,
+                        const size_t len) {
   using namespace mshadow;
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
     MSHADOW_TYPE_SWITCH(vtype, VType, {
-      Kernel<InsertSeqIndicesKernel<ndim>, xpu>::Launch(
-        s, len, output.dptr<DType>(),
-        values.dptr<VType>(), arr.dptr<DType>(),
-        k_outshape, k_valshape, is_insert, origin_idx,
-        val_strides, arr_strides, out_strides, axis, req);
+      Kernel<InsertSeqIndicesKernel<ndim>, xpu>::Launch(s,
+                                                        len,
+                                                        output.dptr<DType>(),
+                                                        values.dptr<VType>(),
+                                                        arr.dptr<DType>(),
+                                                        k_outshape,
+                                                        k_valshape,
+                                                        is_insert,
+                                                        origin_idx,
+                                                        val_strides,
+                                                        arr_strides,
+                                                        out_strides,
+                                                        axis,
+                                                        req);
     });
   });
 }
diff --git a/src/operator/numpy/np_insert_op_scalar-inl.h b/src/operator/numpy/np_insert_op_scalar-inl.h
index a258ddb7bb6c..2f7041de5c70 100644
--- a/src/operator/numpy/np_insert_op_scalar-inl.h
+++ b/src/operator/numpy/np_insert_op_scalar-inl.h
@@ -35,7 +35,7 @@ namespace op {
 /*
  * Only support scalar index (the type of param 'obj' is scalar).
  */
-template<typename xpu>
+template <typename xpu>
 void NumpyInsertScalarCompute(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -45,28 +45,29 @@ void NumpyInsertScalarCompute(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
 
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  int input_count = param.val.has_value() ? 1 : 2;
+  int input_count               = param.val.has_value() ? 1 : 2;
   CHECK_EQ(inputs.size(), input_count);
   CHECK_EQ(outputs.size(), 1);
   CHECK_EQ(req.size(), 1);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const int arr_pos = 0;
-  const int val_pos = param.val.has_value() ? 0 : 1;
-  const int out_pos = 0;
-  int ndim = inputs[arr_pos].shape_.ndim();
-  int axis = param.axis.has_value() ? param.axis.value() : 0;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const int arr_pos       = 0;
+  const int val_pos       = param.val.has_value() ? 0 : 1;
+  const int out_pos       = 0;
+  int ndim                = inputs[arr_pos].shape_.ndim();
+  int axis                = param.axis.has_value() ? param.axis.value() : 0;
   TBlob arr;
-  TBlob values = param.val.has_value() ?
-                  TBlob(nullptr, mxnet::TShape(0, 1), xpu::kDevMask, outputs[out_pos].type_flag_) :
-                  inputs[val_pos];
+  TBlob values =
+      param.val.has_value()
+          ? TBlob(nullptr, mxnet::TShape(0, 1), xpu::kDevMask, outputs[out_pos].type_flag_)
+          : inputs[val_pos];
   if (!param.axis.has_value()) {
-    arr = inputs[arr_pos].reshape(Shape1(inputs[arr_pos].shape_.Size()));
+    arr  = inputs[arr_pos].reshape(Shape1(inputs[arr_pos].shape_.Size()));
     ndim = 1;
   } else if (ndim == 0) {
     if (param.val.has_value()) {
       CHECK_EQ(inputs[val_pos].shape_.ndim(), 0)
-        << "'arr' is a 0-d array, 'values' can not assign to it. "
-        << "alueError: assignment to 0-d array.";
+          << "'arr' is a 0-d array, 'values' can not assign to it. "
+          << "alueError: assignment to 0-d array.";
       mxnet_op::copy(s, outputs[out_pos], inputs[val_pos]);
     } else {
       MSHADOW_TYPE_SWITCH(outputs[out_pos].type_flag_, DType, {
@@ -77,19 +78,18 @@ void NumpyInsertScalarCompute(const nnvm::NodeAttrs& attrs,
   } else {
     arr = inputs[arr_pos];
     CHECK(axis >= -1 * arr.shape_.ndim() && axis < arr.shape_.ndim())
-      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+        << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
     axis += (axis < 0) ? arr.shape_.ndim() : 0;
   }
 
-  index_t N = arr.shape_[axis];
+  index_t N     = arr.shape_[axis];
   size_t numnew = 0;  // numnew = output.shape[axis] - arr.shape[axis]
   index_t index = 0;  // save modified index, because index may be negative integer
   mxnet::TShape val_newshape(arr.shape_.ndim(), -1);
   // modify values's ndim to arr's ndim, for broadcast easily later
   // e.g. value shape: (2,) arr shape: (3, 2) => value shape: (1, 2)
-  for (index_t i = values.shape_.ndim() - 1, j = arr.shape_.ndim() - 1;
-        i >= 0 || j >= 0;
-        --i, --j) {
+  for (index_t i = values.shape_.ndim() - 1, j = arr.shape_.ndim() - 1; i >= 0 || j >= 0;
+       --i, --j) {
     if (i >= 0 && j >= 0) {
       val_newshape[j] = values.shape_[i];
     } else if (i >= 0) {
@@ -105,7 +105,7 @@ void NumpyInsertScalarCompute(const nnvm::NodeAttrs& attrs,
   if (param.int_ind.has_value()) {
     index = param.int_ind.value();
     CHECK(index >= -1 * N && index <= N)
-      << "Index should be in the range of [-r, r-1] where r is the dim size in 'axis'";
+        << "Index should be in the range of [-r, r-1] where r is the dim size in 'axis'";
     if (index < 0) {
       index += N;
     }
@@ -129,10 +129,8 @@ void NumpyInsertScalarCompute(const nnvm::NodeAttrs& attrs,
   values.shape_.assign(val_newshape2.begin(), val_newshape2.end());
 
   const mxnet::TShape& outshape = outputs[out_pos].shape_;
-  int dtype = outputs[out_pos].type_flag_;
-  int vtype = param.val.has_value() ?
-              mshadow::DataType<double>::kFlag :
-              inputs[val_pos].type_flag_;
+  int dtype                     = outputs[out_pos].type_flag_;
+  int vtype = param.val.has_value() ? mshadow::DataType<double>::kFlag : inputs[val_pos].type_flag_;
   if (param.val.has_value()) {
     MSHADOW_TYPE_SWITCH(vtype, VType, {
       // If insert use single index and 'value' is inputed as numerical parameter
@@ -143,14 +141,24 @@ void NumpyInsertScalarCompute(const nnvm::NodeAttrs& attrs,
 
   // 'obj' is integer, need to moveaxis
   MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-    InsertScalerImpl<xpu, ndim>(s, outputs[out_pos], arr, values,
+    InsertScalerImpl<xpu, ndim>(s,
+                                outputs[out_pos],
+                                arr,
+                                values,
                                 mxnet_op::calc_stride(arr.shape_.get<ndim>()),
                                 mxnet_op::calc_stride(values.shape_.get<ndim>()),
                                 mxnet_op::calc_stride(old_valshape.get<ndim>()),
                                 mxnet_op::calc_stride(outshape.get<ndim>()),
-                                outshape.get<ndim>(), values.shape_.get<ndim>(),
-                                dtype, vtype, req[out_pos], axis, index, numnew,
-                                outshape.Size(), true);
+                                outshape.get<ndim>(),
+                                values.shape_.get<ndim>(),
+                                dtype,
+                                vtype,
+                                req[out_pos],
+                                axis,
+                                index,
+                                numnew,
+                                outshape.Size(),
+                                true);
   });
 }
 
diff --git a/src/operator/numpy/np_insert_op_scalar.cc b/src/operator/numpy/np_insert_op_scalar.cc
index 23ce41a4c6b2..aaac3a8f4d4d 100644
--- a/src/operator/numpy/np_insert_op_scalar.cc
+++ b/src/operator/numpy/np_insert_op_scalar.cc
@@ -29,11 +29,11 @@ namespace mxnet {
 namespace op {
 
 bool NumpyInsertScalarType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int> *in_type,
-                           std::vector<int> *out_type) {
+                           std::vector<int>* in_type,
+                           std::vector<int>* out_type) {
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  int input_count = param.val.has_value() ? 1 : 2;
-  int insize = input_count;
+  int input_count               = param.val.has_value() ? 1 : 2;
+  int insize                    = input_count;
   CHECK_EQ(in_type->size(), insize);
   CHECK_EQ(out_type->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_type, 0, (*in_type)[0]);  // output type equals to input arr's
@@ -42,18 +42,18 @@ bool NumpyInsertScalarType(const nnvm::NodeAttrs& attrs,
 }
 
 bool NumpyInsertScalarShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_shape,
-                            mxnet::ShapeVector *out_shape) {
+                            mxnet::ShapeVector* in_shape,
+                            mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  int input_count = param.val.has_value() ? 1 : 2;
-  int insize = input_count;
-  const int arr_pos = 0;
-  const int val_pos = param.val.has_value() ? 0 : 1;
+  int input_count               = param.val.has_value() ? 1 : 2;
+  int insize                    = input_count;
+  const int arr_pos             = 0;
+  const int val_pos             = param.val.has_value() ? 0 : 1;
   CHECK_EQ(in_shape->size(), insize);
   mxnet::TShape scale_shape(0, 1);
-  mxnet::TShape &arrshape = (*in_shape)[arr_pos];
-  mxnet::TShape &valshape = param.val.has_value() ? scale_shape : (*in_shape)[val_pos];
+  mxnet::TShape& arrshape = (*in_shape)[arr_pos];
+  mxnet::TShape& valshape = param.val.has_value() ? scale_shape : (*in_shape)[val_pos];
 
   out_shape->clear();
 
@@ -61,20 +61,19 @@ bool NumpyInsertScalarShape(const nnvm::NodeAttrs& attrs,
   int axis = param.axis.has_value() ? param.axis.value() : 0;
   if (!(param.axis.has_value())) {
     arrshape = Shape1(arrshape.Size());
-    ndim = 1;
+    ndim     = 1;
   } else if (ndim == 0) {
     if (param.val.has_value()) {
       out_shape->push_back(scale_shape);
     } else {
-      CHECK_EQ(valshape.ndim(), 0)
-        << "'arr' is a 0-d array, 'values' can not assign to it. "
-        << "alueError: assignment to 0-d array.";
+      CHECK_EQ(valshape.ndim(), 0) << "'arr' is a 0-d array, 'values' can not assign to it. "
+                                   << "alueError: assignment to 0-d array.";
       out_shape->push_back(valshape);
     }
     return shape_is_known(out_shape[0]);
   } else {
     CHECK(axis >= -1 * arrshape.ndim() && axis < arrshape.ndim())
-      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+        << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
     axis += (axis < 0) ? arrshape.ndim() : 0;
   }
 
@@ -103,33 +102,35 @@ bool NumpyInsertScalarShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_insert_scalar)
-.describe(R"code(Insert values along the given axis before the given indices.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyInsertParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
-    int input_count = params.val.has_value() ? 1 : 2;
-    return input_count;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
-    if (params.val.has_value()) {
-      return std::vector<std::string>{"arr"};
-    } else {
-      return std::vector<std::string>{"arr", "values"};
-    }
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyInsertScalarShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyInsertScalarType)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyInsertScalarCompute<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("values", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyInsertParam::__FIELDS__());
+    .describe(
+        R"code(Insert values along the given axis before the given indices.)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyInsertParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
+      int input_count                = params.val.has_value() ? 1 : 2;
+      return input_count;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyInsertParam& params =
+                                           nnvm::get<NumpyInsertParam>(attrs.parsed);
+                                       if (params.val.has_value()) {
+                                         return std::vector<std::string>{"arr"};
+                                       } else {
+                                         return std::vector<std::string>{"arr", "values"};
+                                       }
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyInsertScalarShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyInsertScalarType)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyInsertScalarCompute<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("values", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyInsertParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_insert_op_scalar.cu b/src/operator/numpy/np_insert_op_scalar.cu
index a068b836d7ab..863e0d240c6e 100644
--- a/src/operator/numpy/np_insert_op_scalar.cu
+++ b/src/operator/numpy/np_insert_op_scalar.cu
@@ -30,7 +30,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_insert_scalar)
-.set_attr<FCompute>("FCompute<gpu>", NumpyInsertScalarCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyInsertScalarCompute<gpu>);
 
 }
-}
+}  // namespace mxnet
diff --git a/src/operator/numpy/np_insert_op_slice-inl.h b/src/operator/numpy/np_insert_op_slice-inl.h
index fd32d9bc7bc1..cf6d2d53df69 100644
--- a/src/operator/numpy/np_insert_op_slice-inl.h
+++ b/src/operator/numpy/np_insert_op_slice-inl.h
@@ -35,7 +35,7 @@ namespace op {
 /*
  * Only support slice index (the type of param 'obj' is slice).
  */
-template<typename xpu>
+template <typename xpu>
 void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -48,24 +48,25 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), (param.val.has_value() ? 1 : 2));
   CHECK_EQ(outputs.size(), 1);
   CHECK_EQ(req.size(), 1);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const int arr_pos = 0;
-  const int val_pos = param.val.has_value() ? 0 : 1;
-  const int out_pos = 0;
-  int ndim = inputs[arr_pos].shape_.ndim();
-  int axis = param.axis.has_value() ? param.axis.value() : 0;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const int arr_pos       = 0;
+  const int val_pos       = param.val.has_value() ? 0 : 1;
+  const int out_pos       = 0;
+  int ndim                = inputs[arr_pos].shape_.ndim();
+  int axis                = param.axis.has_value() ? param.axis.value() : 0;
   TBlob arr;
-  TBlob values = param.val.has_value() ?
-                 TBlob(nullptr, mxnet::TShape(0, 1), xpu::kDevMask, outputs[out_pos].type_flag_) :
-                 inputs[val_pos];
+  TBlob values =
+      param.val.has_value()
+          ? TBlob(nullptr, mxnet::TShape(0, 1), xpu::kDevMask, outputs[out_pos].type_flag_)
+          : inputs[val_pos];
   if (!param.axis.has_value()) {
-    arr = inputs[arr_pos].reshape(Shape1(inputs[arr_pos].shape_.Size()));
+    arr  = inputs[arr_pos].reshape(Shape1(inputs[arr_pos].shape_.Size()));
     ndim = 1;
   } else if (ndim == 0) {
     if (param.val.has_value()) {
       CHECK_EQ(inputs[val_pos].shape_.ndim(), 0)
-        << "'arr' is a 0-d array, 'values' can not assign to it. "
-        << "alueError: assignment to 0-d array.";
+          << "'arr' is a 0-d array, 'values' can not assign to it. "
+          << "alueError: assignment to 0-d array.";
       mxnet_op::copy(s, outputs[out_pos], inputs[val_pos]);
     } else {
       MSHADOW_TYPE_SWITCH(outputs[out_pos].type_flag_, DType, {
@@ -76,26 +77,23 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
   } else {
     arr = inputs[arr_pos];
     CHECK(axis >= -1 * arr.shape_.ndim() && axis < arr.shape_.ndim())
-      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+        << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
     axis += (axis < 0) ? arr.shape_.ndim() : 0;
   }
 
-  index_t N = arr.shape_[axis];
-  size_t indices_len = 0;  // indices amount
+  index_t N          = arr.shape_[axis];
+  size_t indices_len = 0;                 // indices amount
   index_t start = 0, stop = 0, step = 0;  // arguments from 'obj' when it's 'slice'
 
   // get and check indices from slice or sequence of ints
-  SliceIndices(param.start, param.stop, param.step,
-                N, &start, &stop, &step, &indices_len);
+  SliceIndices(param.start, param.stop, param.step, N, &start, &stop, &step, &indices_len);
 
   int numnew = 0;  // numnew = output.shape[axis] - arr.shape[axis]
-  int index = 0;  // save modified index, because index may be negative integer
+  int index  = 0;  // save modified index, because index may be negative integer
   mxnet::TShape val_newshape(arr.shape_.ndim(), -1);
   // modify values's ndim to arr's ndim, for broadcast easily later
   // e.g. value shape: (2,) arr shape: (3, 2) => value shape: (1, 2)
-  for (int i = values.shape_.ndim() - 1, j = arr.shape_.ndim() - 1;
-        i >= 0 || j >= 0;
-        --i, --j) {
+  for (int i = values.shape_.ndim() - 1, j = arr.shape_.ndim() - 1; i >= 0 || j >= 0; --i, --j) {
     if (i >= 0 && j >= 0) {
       val_newshape[j] = values.shape_[i];
     } else if (i >= 0) {
@@ -110,9 +108,9 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
   mxnet::TShape old_valshape(values.shape_);
   if (indices_len == 1) {  // tensor with only one element
     numnew = values.shape_[axis];
-    index = start;
+    index  = start;
     CHECK(index >= -1 * N && index <= N)
-      << "Index should be in the range of [-r, r-1] where r is the dim size in 'axis'";
+        << "Index should be in the range of [-r, r-1] where r is the dim size in 'axis'";
     if (index < 0) {
       index += N;
     }
@@ -121,10 +119,8 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
   }
 
   const mxnet::TShape& outshape = outputs[out_pos].shape_;
-  int dtype = outputs[out_pos].type_flag_;
-  int vtype = param.val.has_value() ?
-              mshadow::DataType<double>::kFlag :
-              inputs[val_pos].type_flag_;
+  int dtype                     = outputs[out_pos].type_flag_;
+  int vtype = param.val.has_value() ? mshadow::DataType<double>::kFlag : inputs[val_pos].type_flag_;
   if ((indices_len == 1) && param.val.has_value()) {
     MSHADOW_TYPE_SWITCH(vtype, VType, {
       // If insert use single index and 'value' is inputed as numerical parameter
@@ -135,14 +131,24 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
 
   if (indices_len == 1) {
     MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-      InsertScalerImpl<xpu, ndim>(s, outputs[out_pos], arr, values,
+      InsertScalerImpl<xpu, ndim>(s,
+                                  outputs[out_pos],
+                                  arr,
+                                  values,
                                   mxnet_op::calc_stride(arr.shape_.get<ndim>()),
                                   mxnet_op::calc_stride(values.shape_.get<ndim>()),
                                   mxnet_op::calc_stride(old_valshape.get<ndim>()),
                                   mxnet_op::calc_stride(outshape.get<ndim>()),
-                                  outshape.get<ndim>(), values.shape_.get<ndim>(),
-                                  dtype, vtype, req[out_pos], axis, start, numnew,
-                                  outshape.Size(), false);
+                                  outshape.get<ndim>(),
+                                  values.shape_.get<ndim>(),
+                                  dtype,
+                                  vtype,
+                                  req[out_pos],
+                                  axis,
+                                  start,
+                                  numnew,
+                                  outshape.Size(),
+                                  false);
     });
   } else {
     // broadcast check
@@ -155,26 +161,24 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
     }
     size_t temp_storage_bytes, temp_mem_size;
     temp_storage_bytes = SortByKeyWorkspaceSize<int64_t, index_t, xpu>(indices_len, false, true);
-    temp_mem_size = indices_len * sizeof(int64_t) * 2 +
-                    indices_len * sizeof(index_t) +
-                    outshape[axis] * sizeof(index_t) * 2 +
-                    temp_storage_bytes;
+    temp_mem_size      = indices_len * sizeof(int64_t) * 2 + indices_len * sizeof(index_t) +
+                    outshape[axis] * sizeof(index_t) * 2 + temp_storage_bytes;
     Tensor<xpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
-    int64_t* indices_ptr = reinterpret_cast<int64_t*>(temp_mem.dptr_);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+    int64_t* indices_ptr        = reinterpret_cast<int64_t*>(temp_mem.dptr_);
     int64_t* sorted_indices_ptr = reinterpret_cast<int64_t*>(indices_ptr + indices_len);
-    index_t* order_ptr = reinterpret_cast<index_t*>(sorted_indices_ptr + indices_len);
-    index_t* is_insert = reinterpret_cast<index_t*>(order_ptr + indices_len);
-    index_t* origin_idx = reinterpret_cast<index_t*>(is_insert + outshape[axis]);
-    Tensor<xpu, 1, char> temp_storage(reinterpret_cast<char*>(origin_idx + outshape[axis]),
-                                      Shape1(temp_storage_bytes), s);
+    index_t* order_ptr          = reinterpret_cast<index_t*>(sorted_indices_ptr + indices_len);
+    index_t* is_insert          = reinterpret_cast<index_t*>(order_ptr + indices_len);
+    index_t* origin_idx         = reinterpret_cast<index_t*>(is_insert + outshape[axis]);
+    Tensor<xpu, 1, char> temp_storage(
+        reinterpret_cast<char*>(origin_idx + outshape[axis]), Shape1(temp_storage_bytes), s);
     Tensor<xpu, 1, int64_t> indices(indices_ptr, Shape1(indices_len), s);
     Tensor<xpu, 1, int64_t> sorted_indices(sorted_indices_ptr, Shape1(indices_len), s);
     Tensor<xpu, 1, index_t> order(order_ptr, Shape1(indices_len), s);
     int num_bits = 8 * sizeof(int64_t);
     Kernel<SliceToIndices, xpu>::Launch(s, indices_len, indices_ptr, start, step);
-    Kernel<range_fwd, xpu>::Launch(s, indices_len, index_t{1}, index_t{0}, index_t{1},
-                                   kWriteTo, order_ptr);
+    Kernel<range_fwd, xpu>::Launch(
+        s, indices_len, index_t{1}, index_t{0}, index_t{1}, kWriteTo, order_ptr);
     mxnet::op::SortByKey(indices, order, true, &temp_storage, 0, num_bits, &sorted_indices);
     Kernel<IndicesModify, xpu>::Launch(s, indices_len, indices_ptr, order_ptr);
 
@@ -184,13 +188,22 @@ void NumpyInsertSliceCompute(const nnvm::NodeAttrs& attrs,
     Kernel<SetOriginValuesIdx, xpu>::Launch(s, indices_len, indices_ptr, origin_idx);
     Kernel<SetOriginArrIdx, xpu>::Launch(s, outshape[axis], is_insert, origin_idx);
     MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-      InsertSequenceImpl<xpu, ndim>(s, outputs[out_pos], arr, values,
+      InsertSequenceImpl<xpu, ndim>(s,
+                                    outputs[out_pos],
+                                    arr,
+                                    values,
                                     mxnet_op::calc_stride(arr.shape_.get<ndim>()),
                                     mxnet_op::calc_stride(values.shape_.get<ndim>()),
                                     mxnet_op::calc_stride(outshape.get<ndim>()),
-                                    outshape.get<ndim>(), values.shape_.get<ndim>(),
-                                    is_insert, origin_idx, dtype, vtype, req[out_pos],
-                                    axis, outshape.Size());
+                                    outshape.get<ndim>(),
+                                    values.shape_.get<ndim>(),
+                                    is_insert,
+                                    origin_idx,
+                                    dtype,
+                                    vtype,
+                                    req[out_pos],
+                                    axis,
+                                    outshape.Size());
     });
   }
 }
diff --git a/src/operator/numpy/np_insert_op_slice.cc b/src/operator/numpy/np_insert_op_slice.cc
index 2fb40762f00e..8af0d73b65f2 100644
--- a/src/operator/numpy/np_insert_op_slice.cc
+++ b/src/operator/numpy/np_insert_op_slice.cc
@@ -29,8 +29,8 @@ namespace mxnet {
 namespace op {
 
 bool NumpyInsertSliceType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type,
-                          std::vector<int> *out_type) {
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), (param.val.has_value() ? 1 : 2));
   CHECK_EQ(out_type->size(), 1U);
@@ -40,16 +40,16 @@ bool NumpyInsertSliceType(const nnvm::NodeAttrs& attrs,
 }
 
 bool NumpyInsertSliceShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_shape,
-                           mxnet::ShapeVector *out_shape) {
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  const int arr_pos = 0;
-  const int val_pos = param.val.has_value() ? 0 : 1;
+  const int arr_pos             = 0;
+  const int val_pos             = param.val.has_value() ? 0 : 1;
   CHECK_EQ(in_shape->size(), (param.val.has_value() ? 1 : 2));
   mxnet::TShape scale_shape(0, 1);
-  mxnet::TShape &arrshape = (*in_shape)[arr_pos];
-  mxnet::TShape &valshape = param.val.has_value() ? scale_shape : (*in_shape)[val_pos];
+  mxnet::TShape& arrshape = (*in_shape)[arr_pos];
+  mxnet::TShape& valshape = param.val.has_value() ? scale_shape : (*in_shape)[val_pos];
 
   out_shape->clear();
 
@@ -57,26 +57,25 @@ bool NumpyInsertSliceShape(const nnvm::NodeAttrs& attrs,
   int axis = param.axis.has_value() ? param.axis.value() : 0;
   if (!(param.axis.has_value())) {
     arrshape = Shape1(arrshape.Size());
-    ndim = 1;
+    ndim     = 1;
   } else if (ndim == 0) {
     if (param.val.has_value()) {
       out_shape->push_back(scale_shape);
     } else {
-      CHECK_EQ(valshape.ndim(), 0)
-        << "'arr' is a 0-d array, 'values' can not assign to it. "
-        << "alueError: assignment to 0-d array.";
+      CHECK_EQ(valshape.ndim(), 0) << "'arr' is a 0-d array, 'values' can not assign to it. "
+                                   << "alueError: assignment to 0-d array.";
       out_shape->push_back(valshape);
     }
     return shape_is_known(out_shape[0]);
   } else {
     CHECK(axis >= -1 * arrshape.ndim() && axis < arrshape.ndim())
-      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+        << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
     axis += (axis < 0) ? arrshape.ndim() : 0;
   }
 
   index_t seq_cnt = -1;
-  index_t N = arrshape[axis];
-  index_t step = param.step.value();
+  index_t N       = arrshape[axis];
+  index_t step    = param.step.value();
   index_t stop, start;
   if (param.stop.has_value()) {
     stop = param.stop.value();
@@ -129,32 +128,34 @@ bool NumpyInsertSliceShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_insert_slice)
-.describe(R"code(Insert values along the given axis before the given indices.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyInsertParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
-    return params.val.has_value() ? 1 : 2;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
-    if (params.val.has_value()) {
-      return std::vector<std::string>{"arr"};
-    } else {
-      return std::vector<std::string>{"arr", "values"};
-    }
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyInsertSliceShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyInsertSliceType)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyInsertSliceCompute<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("values", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyInsertParam::__FIELDS__());
+    .describe(
+        R"code(Insert values along the given axis before the given indices.)code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyInsertParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
+      return params.val.has_value() ? 1 : 2;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyInsertParam& params =
+                                           nnvm::get<NumpyInsertParam>(attrs.parsed);
+                                       if (params.val.has_value()) {
+                                         return std::vector<std::string>{"arr"};
+                                       } else {
+                                         return std::vector<std::string>{"arr", "values"};
+                                       }
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyInsertSliceShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyInsertSliceType)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyInsertSliceCompute<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("values", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyInsertParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_insert_op_slice.cu b/src/operator/numpy/np_insert_op_slice.cu
index 43f5362f82ef..f9f1de61a7a3 100644
--- a/src/operator/numpy/np_insert_op_slice.cu
+++ b/src/operator/numpy/np_insert_op_slice.cu
@@ -30,7 +30,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_insert_slice)
-.set_attr<FCompute>("FCompute<gpu>", NumpyInsertSliceCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyInsertSliceCompute<gpu>);
 
 }
-}
+}  // namespace mxnet
diff --git a/src/operator/numpy/np_insert_op_tensor-inl.h b/src/operator/numpy/np_insert_op_tensor-inl.h
index 2f57a362653f..9d1bb57a2cfc 100644
--- a/src/operator/numpy/np_insert_op_tensor-inl.h
+++ b/src/operator/numpy/np_insert_op_tensor-inl.h
@@ -42,7 +42,7 @@ namespace op {
 /*
  * Only support tensor indices (the type of param 'obj' is tensor).
  */
-template<typename xpu>
+template <typename xpu>
 void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -52,30 +52,31 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
 
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  int input_count = param.val.has_value() ? 1 : 2;
-  int insize = input_count + 1;
+  int input_count               = param.val.has_value() ? 1 : 2;
+  int insize                    = input_count + 1;
   CHECK_EQ(inputs.size(), insize);
   CHECK_EQ(outputs.size(), 1);
   CHECK_EQ(req.size(), 1);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const int arr_pos = 0;
-  const int val_pos = param.val.has_value() ? 0 : 1;
-  const int obj_pos = val_pos + 1;
-  const int out_pos = 0;
-  int ndim = inputs[arr_pos].shape_.ndim();
-  int axis = param.axis.has_value() ? param.axis.value() : 0;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const int arr_pos       = 0;
+  const int val_pos       = param.val.has_value() ? 0 : 1;
+  const int obj_pos       = val_pos + 1;
+  const int out_pos       = 0;
+  int ndim                = inputs[arr_pos].shape_.ndim();
+  int axis                = param.axis.has_value() ? param.axis.value() : 0;
   TBlob arr;
-  TBlob values = param.val.has_value() ?
-                 TBlob(nullptr, mxnet::TShape(0, 1), xpu::kDevMask, outputs[out_pos].type_flag_) :
-                 inputs[val_pos];
+  TBlob values =
+      param.val.has_value()
+          ? TBlob(nullptr, mxnet::TShape(0, 1), xpu::kDevMask, outputs[out_pos].type_flag_)
+          : inputs[val_pos];
   if (!param.axis.has_value()) {
-    arr = inputs[arr_pos].reshape(Shape1(inputs[arr_pos].shape_.Size()));
+    arr  = inputs[arr_pos].reshape(Shape1(inputs[arr_pos].shape_.Size()));
     ndim = 1;
   } else if (ndim == 0) {
     if (param.val.has_value()) {
       CHECK_EQ(inputs[val_pos].shape_.ndim(), 0)
-        << "'arr' is a 0-d array, 'values' can not assign to it. "
-        << "alueError: assignment to 0-d array.";
+          << "'arr' is a 0-d array, 'values' can not assign to it. "
+          << "alueError: assignment to 0-d array.";
       mxnet_op::copy(s, outputs[out_pos], inputs[val_pos]);
     } else {
       MSHADOW_TYPE_SWITCH(outputs[out_pos].type_flag_, DType, {
@@ -86,11 +87,11 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
   } else {
     arr = inputs[arr_pos];
     CHECK(axis >= -1 * arr.shape_.ndim() && axis < arr.shape_.ndim())
-      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+        << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
     axis += (axis < 0) ? arr.shape_.ndim() : 0;
   }
 
-  size_t N = arr.shape_[axis];
+  size_t N           = arr.shape_[axis];
   size_t indices_len = inputs[obj_pos].shape_.Size();  // indices amount
 
   // get and check indices from tensor
@@ -98,9 +99,8 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
   mxnet::TShape val_newshape(arr.shape_.ndim(), -1);
   // modify values's ndim to arr's ndim, for broadcast easily later
   // e.g. value shape: (2,) arr shape: (3, 2) => value shape: (1, 2)
-  for (index_t i = values.shape_.ndim() - 1, j = arr.shape_.ndim() - 1;
-        i >= 0 || j >= 0;
-        --i, --j) {
+  for (index_t i = values.shape_.ndim() - 1, j = arr.shape_.ndim() - 1; i >= 0 || j >= 0;
+       --i, --j) {
     if (i >= 0 && j >= 0) {
       val_newshape[j] = values.shape_[i];
     } else if (i >= 0) {
@@ -137,12 +137,9 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
   }
 
   const mxnet::TShape& outshape = outputs[out_pos].shape_;
-  int dtype = outputs[out_pos].type_flag_;
-  int vtype = param.val.has_value() ?
-              mshadow::DataType<double>::kFlag :
-              inputs[val_pos].type_flag_;
-  if ((inputs[obj_pos].shape_.ndim() == 0 || indices_len == 1)
-      && param.val.has_value()) {
+  int dtype                     = outputs[out_pos].type_flag_;
+  int vtype = param.val.has_value() ? mshadow::DataType<double>::kFlag : inputs[val_pos].type_flag_;
+  if ((inputs[obj_pos].shape_.ndim() == 0 || indices_len == 1) && param.val.has_value()) {
     MSHADOW_TYPE_SWITCH(vtype, VType, {
       // If insert use single index and 'value' is inputed as numerical parameter
       values = TBlob(ctx.requested[0].get_space_typed<xpu, 1, VType>(Shape1(1), s));
@@ -152,25 +149,47 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
   if (inputs[obj_pos].shape_.ndim() == 0) {
     // 'obj' is tensor and the tensor's ndim is 0, also need to moveaxis
     MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-      InsertSizeOneTensorImpl<xpu, ndim>(s, outputs[out_pos], arr, values,
+      InsertSizeOneTensorImpl<xpu, ndim>(s,
+                                         outputs[out_pos],
+                                         arr,
+                                         values,
                                          mxnet_op::calc_stride(arr.shape_.get<ndim>()),
                                          mxnet_op::calc_stride(values.shape_.get<ndim>()),
                                          mxnet_op::calc_stride(old_valshape.get<ndim>()),
                                          mxnet_op::calc_stride(outshape.get<ndim>()),
-                                         outshape.get<ndim>(), values.shape_.get<ndim>(),
-                                         dtype, vtype, req[out_pos], axis, inputs[obj_pos],
-                                         numnew, N, outshape.Size(), true);
+                                         outshape.get<ndim>(),
+                                         values.shape_.get<ndim>(),
+                                         dtype,
+                                         vtype,
+                                         req[out_pos],
+                                         axis,
+                                         inputs[obj_pos],
+                                         numnew,
+                                         N,
+                                         outshape.Size(),
+                                         true);
     });
   } else if (indices_len == 1) {
     MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-      InsertSizeOneTensorImpl<xpu, ndim>(s, outputs[out_pos], arr, values,
+      InsertSizeOneTensorImpl<xpu, ndim>(s,
+                                         outputs[out_pos],
+                                         arr,
+                                         values,
                                          mxnet_op::calc_stride(arr.shape_.get<ndim>()),
                                          mxnet_op::calc_stride(values.shape_.get<ndim>()),
                                          mxnet_op::calc_stride(old_valshape.get<ndim>()),
                                          mxnet_op::calc_stride(outshape.get<ndim>()),
-                                         outshape.get<ndim>(), values.shape_.get<ndim>(),
-                                         dtype, vtype, req[out_pos], axis, inputs[obj_pos],
-                                         numnew, N, outshape.Size(), false);
+                                         outshape.get<ndim>(),
+                                         values.shape_.get<ndim>(),
+                                         dtype,
+                                         vtype,
+                                         req[out_pos],
+                                         axis,
+                                         inputs[obj_pos],
+                                         numnew,
+                                         N,
+                                         outshape.Size(),
+                                         false);
     });
   } else {
     // broadcast check
@@ -183,27 +202,25 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
     }
     size_t temp_storage_bytes, temp_mem_size;
     temp_storage_bytes = SortByKeyWorkspaceSize<int64_t, index_t, xpu>(indices_len, false, true);
-    temp_mem_size = indices_len * sizeof(int64_t) * 2 +
-                    indices_len * sizeof(index_t) +
-                    outshape[axis] * sizeof(index_t) * 2 +
-                    temp_storage_bytes;
+    temp_mem_size      = indices_len * sizeof(int64_t) * 2 + indices_len * sizeof(index_t) +
+                    outshape[axis] * sizeof(index_t) * 2 + temp_storage_bytes;
     Tensor<xpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
-    int64_t* indices_ptr = reinterpret_cast<int64_t*>(temp_mem.dptr_);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+    int64_t* indices_ptr        = reinterpret_cast<int64_t*>(temp_mem.dptr_);
     int64_t* sorted_indices_ptr = reinterpret_cast<int64_t*>(indices_ptr + indices_len);
-    index_t* order_ptr = reinterpret_cast<index_t*>(sorted_indices_ptr + indices_len);
-    index_t* is_insert = reinterpret_cast<index_t*>(order_ptr + indices_len);
-    index_t* origin_idx = reinterpret_cast<index_t*>(is_insert + outshape[axis]);
-    Tensor<xpu, 1, char> temp_storage(reinterpret_cast<char*>(origin_idx + outshape[axis]),
-                                      Shape1(temp_storage_bytes), s);
+    index_t* order_ptr          = reinterpret_cast<index_t*>(sorted_indices_ptr + indices_len);
+    index_t* is_insert          = reinterpret_cast<index_t*>(order_ptr + indices_len);
+    index_t* origin_idx         = reinterpret_cast<index_t*>(is_insert + outshape[axis]);
+    Tensor<xpu, 1, char> temp_storage(
+        reinterpret_cast<char*>(origin_idx + outshape[axis]), Shape1(temp_storage_bytes), s);
     Tensor<xpu, 1, int64_t> indices(indices_ptr, Shape1(indices_len), s);
     Tensor<xpu, 1, int64_t> sorted_indices(sorted_indices_ptr, Shape1(indices_len), s);
     Tensor<xpu, 1, index_t> order(order_ptr, Shape1(indices_len), s);
     int num_bits = 8 * sizeof(int64_t);
-    Kernel<ObjToIndices, xpu>::Launch(s, indices_len, indices_ptr, N,
-                                      inputs[obj_pos].dptr<int64_t>());
-    Kernel<range_fwd, xpu>::Launch(s, indices_len, index_t{1}, index_t{0}, index_t{1},
-                                   kWriteTo, order_ptr);
+    Kernel<ObjToIndices, xpu>::Launch(
+        s, indices_len, indices_ptr, N, inputs[obj_pos].dptr<int64_t>());
+    Kernel<range_fwd, xpu>::Launch(
+        s, indices_len, index_t{1}, index_t{0}, index_t{1}, kWriteTo, order_ptr);
     mxnet::op::SortByKey(indices, order, true, &temp_storage, 0, num_bits, &sorted_indices);
     Kernel<IndicesModify, xpu>::Launch(s, indices_len, indices_ptr, order_ptr);
 
@@ -213,13 +230,22 @@ void NumpyInsertTensorCompute(const nnvm::NodeAttrs& attrs,
     Kernel<SetOriginValuesIdx, xpu>::Launch(s, indices_len, indices_ptr, origin_idx);
     Kernel<SetOriginArrIdx, xpu>::Launch(s, outshape[axis], is_insert, origin_idx);
     MXNET_NDIM_SWITCH(outshape.ndim(), ndim, {
-      InsertSequenceImpl<xpu, ndim>(s, outputs[out_pos], arr, values,
+      InsertSequenceImpl<xpu, ndim>(s,
+                                    outputs[out_pos],
+                                    arr,
+                                    values,
                                     mxnet_op::calc_stride(arr.shape_.get<ndim>()),
                                     mxnet_op::calc_stride(values.shape_.get<ndim>()),
                                     mxnet_op::calc_stride(outshape.get<ndim>()),
-                                    outshape.get<ndim>(), values.shape_.get<ndim>(),
-                                    is_insert, origin_idx, dtype, vtype, req[out_pos],
-                                    axis, outshape.Size());
+                                    outshape.get<ndim>(),
+                                    values.shape_.get<ndim>(),
+                                    is_insert,
+                                    origin_idx,
+                                    dtype,
+                                    vtype,
+                                    req[out_pos],
+                                    axis,
+                                    outshape.Size());
     });
   }
 }
diff --git a/src/operator/numpy/np_insert_op_tensor.cc b/src/operator/numpy/np_insert_op_tensor.cc
index c26fd88ff188..962d6b263b7a 100644
--- a/src/operator/numpy/np_insert_op_tensor.cc
+++ b/src/operator/numpy/np_insert_op_tensor.cc
@@ -33,39 +33,39 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyInsertParam);
 
 bool NumpyInsertTensorType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int> *in_type,
-                           std::vector<int> *out_type) {
+                           std::vector<int>* in_type,
+                           std::vector<int>* out_type) {
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  int input_count = param.val.has_value() ? 1 : 2;
-  int insize = input_count + 1;
+  int input_count               = param.val.has_value() ? 1 : 2;
+  int insize                    = input_count + 1;
   CHECK_EQ(in_type->size(), insize);
   CHECK_EQ(out_type->size(), 1U);
   int obj_pos = input_count;
   CHECK_NE((*in_type)[obj_pos], -1) << "Index type must be set for insert operator\n";
   CHECK_EQ((*in_type)[obj_pos], mshadow::DataType<int64_t>::kFlag)
-    << "Index type only support int64.\n";
+      << "Index type only support int64.\n";
   TYPE_ASSIGN_CHECK(*out_type, 0, (*in_type)[0]);  // output type equals to input arr's
   TYPE_ASSIGN_CHECK(*in_type, 0, (*out_type)[0]);
   return (*in_type)[0] != -1;
 }
 
 bool NumpyInsertTensorShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_shape,
-                            mxnet::ShapeVector *out_shape) {
+                            mxnet::ShapeVector* in_shape,
+                            mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const NumpyInsertParam& param = nnvm::get<NumpyInsertParam>(attrs.parsed);
-  int input_count = param.val.has_value() ? 1 : 2;
-  int insize = input_count + 1;
-  const int arr_pos = 0;
-  const int val_pos = param.val.has_value() ? 0 : 1;
-  const int obj_pos = val_pos + 1;
+  int input_count               = param.val.has_value() ? 1 : 2;
+  int insize                    = input_count + 1;
+  const int arr_pos             = 0;
+  const int val_pos             = param.val.has_value() ? 0 : 1;
+  const int obj_pos             = val_pos + 1;
   CHECK_EQ(in_shape->size(), insize);
   mxnet::TShape scale_shape(0, 1);
-  mxnet::TShape &arrshape = (*in_shape)[arr_pos];
-  mxnet::TShape &valshape = param.val.has_value() ? scale_shape : (*in_shape)[val_pos];
-  mxnet::TShape &objShape = (*in_shape)[obj_pos];
+  mxnet::TShape& arrshape = (*in_shape)[arr_pos];
+  mxnet::TShape& valshape = param.val.has_value() ? scale_shape : (*in_shape)[val_pos];
+  mxnet::TShape& objShape = (*in_shape)[obj_pos];
   CHECK_LE(objShape.ndim(), 1)
-    << "index array argument obj to insert must be one dimensional or scale.\n";
+      << "index array argument obj to insert must be one dimensional or scale.\n";
 
   out_shape->clear();
 
@@ -76,17 +76,16 @@ bool NumpyInsertTensorShape(const nnvm::NodeAttrs& attrs,
     if (param.val.has_value()) {
       out_shape->push_back(scale_shape);
     } else {
-      CHECK_EQ(valshape.ndim(), 0)
-        << "'arr' is a 0-d array, 'values' can not assign to it. "
-        << "alueError: assignment to 0-d array.";
+      CHECK_EQ(valshape.ndim(), 0) << "'arr' is a 0-d array, 'values' can not assign to it. "
+                                   << "alueError: assignment to 0-d array.";
       out_shape->push_back(valshape);
     }
-    CHECK_LT((*out_shape)[0].Size(), (int64_t{1} << 31) - 1) <<
-        "Large Tensor Support is not support for [insert_tensor] variant of insert operator";
+    CHECK_LT((*out_shape)[0].Size(), (int64_t{1} << 31) - 1)
+        << "Large Tensor Support is not support for [insert_tensor] variant of insert operator";
     return shape_is_known(out_shape[0]);
   } else {
     CHECK(axis >= -1 * arrshape.ndim() && axis < arrshape.ndim())
-      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+        << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
     axis += (axis < 0) ? arrshape.ndim() : 0;
   }
 
@@ -116,41 +115,42 @@ bool NumpyInsertTensorShape(const nnvm::NodeAttrs& attrs,
 
   newshape[axis] += numnew;
   out_shape->push_back(newshape);
-  CHECK_LT((*out_shape)[0].Size(), (int64_t{1} << 31) - 1) <<
-      "Large Tensor Support is not support for [insert_tensor] variant of insert operator";
+  CHECK_LT((*out_shape)[0].Size(), (int64_t{1} << 31) - 1)
+      << "Large Tensor Support is not support for [insert_tensor] variant of insert operator";
   return shape_is_known(newshape);
 }
 
 NNVM_REGISTER_OP(_npi_insert_tensor)
-.describe(R"code(Insert values along the given axis before the given indices.
+    .describe(R"code(Insert values along the given axis before the given indices.
           Indices is tensor and ndim > 0.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyInsertParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
-    int input_count = params.val.has_value() ? 1 : 2;
-    return input_count + 1;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
-    if (params.val.has_value()) {
-      return std::vector<std::string>{"arr", "obj"};
-    } else {
-      return std::vector<std::string>{"arr", "values", "obj"};
-    }
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyInsertTensorShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyInsertTensorType)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyInsertTensorCompute<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("values", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("obj", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyInsertParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyInsertParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyInsertParam& params = nnvm::get<NumpyInsertParam>(attrs.parsed);
+      int input_count                = params.val.has_value() ? 1 : 2;
+      return input_count + 1;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyInsertParam& params =
+                                           nnvm::get<NumpyInsertParam>(attrs.parsed);
+                                       if (params.val.has_value()) {
+                                         return std::vector<std::string>{"arr", "obj"};
+                                       } else {
+                                         return std::vector<std::string>{"arr", "values", "obj"};
+                                       }
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyInsertTensorShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyInsertTensorType)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyInsertTensorCompute<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("arr", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("values", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("obj", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyInsertParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_insert_op_tensor.cu b/src/operator/numpy/np_insert_op_tensor.cu
index 6d417ad74aeb..0c40a551b0de 100644
--- a/src/operator/numpy/np_insert_op_tensor.cu
+++ b/src/operator/numpy/np_insert_op_tensor.cu
@@ -30,7 +30,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_insert_tensor)
-.set_attr<FCompute>("FCompute<gpu>", NumpyInsertTensorCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyInsertTensorCompute<gpu>);
 
 }
-}
+}  // namespace mxnet
diff --git a/src/operator/numpy/np_interp_op-inl.h b/src/operator/numpy/np_interp_op-inl.h
index 518dcdead239..92bc42aa7fd7 100644
--- a/src/operator/numpy/np_interp_op-inl.h
+++ b/src/operator/numpy/np_interp_op-inl.h
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2020 by Contributors
  * \file np_interp_op-inl.h
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NUMPY_NP_INTERP_OP_INL_H_
 #define MXNET_OPERATOR_NUMPY_NP_INTERP_OP_INL_H_
@@ -47,20 +47,21 @@ struct NumpyInterpParam : public dmlc::Parameter<NumpyInterpParam> {
   bool x_is_scalar;
   DMLC_DECLARE_PARAMETER(NumpyInterpParam) {
     DMLC_DECLARE_FIELD(left)
-      .set_default(dmlc::optional<double>())
-      .describe("Value to return for x < xp[0], default is fp[0].");
+        .set_default(dmlc::optional<double>())
+        .describe("Value to return for x < xp[0], default is fp[0].");
     DMLC_DECLARE_FIELD(right)
-      .set_default(dmlc::optional<double>())
-      .describe("Value to return for x > xp[-1], default is fp[-1].");
+        .set_default(dmlc::optional<double>())
+        .describe("Value to return for x > xp[-1], default is fp[-1].");
     DMLC_DECLARE_FIELD(period)
-      .set_default(dmlc::optional<double>())
-      .describe("A period for the x-coordinates. This parameter allows"
-                "the proper interpolation of angular x-coordinates. Parameters"
-                "left and right are ignored if period is specified.");
-    DMLC_DECLARE_FIELD(x_scalar).set_default(0.0)
-      .describe("x is a scalar input");
-    DMLC_DECLARE_FIELD(x_is_scalar).set_default(false)
-      .describe("Flag that determines whether input is a scalar");
+        .set_default(dmlc::optional<double>())
+        .describe(
+            "A period for the x-coordinates. This parameter allows"
+            "the proper interpolation of angular x-coordinates. Parameters"
+            "left and right are ignored if period is specified.");
+    DMLC_DECLARE_FIELD(x_scalar).set_default(0.0).describe("x is a scalar input");
+    DMLC_DECLARE_FIELD(x_is_scalar)
+        .set_default(false)
+        .describe("Flag that determines whether input is a scalar");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream left_s, right_s, period_s, x_scalar_s, x_is_scalar_s;
@@ -69,10 +70,10 @@ struct NumpyInterpParam : public dmlc::Parameter<NumpyInterpParam> {
     period_s << period;
     x_scalar_s << x_scalar;
     x_is_scalar_s << x_is_scalar;
-    (*dict)["left"] = left_s.str();
-    (*dict)["right"] = right_s.str();
-    (*dict)["period"] = period_s.str();
-    (*dict)["x_scalar"] = x_scalar_s.str();
+    (*dict)["left"]        = left_s.str();
+    (*dict)["right"]       = right_s.str();
+    (*dict)["period"]      = period_s.str();
+    (*dict)["x_scalar"]    = x_scalar_s.str();
     (*dict)["x_is_scalar"] = x_is_scalar_s.str();
   }
 };
@@ -88,11 +89,11 @@ struct interp {
                                   const double right,
                                   const bool has_left,
                                   const bool has_right) {
-    double x_value = x[i];
-    double xp_low = xp[0];
-    double xp_above = xp[dsize-1];
-    double lval = has_left ? left : fp[0];
-    double rval = has_right ? right : fp[dsize-1];
+    double x_value  = x[i];
+    double xp_low   = xp[0];
+    double xp_above = xp[dsize - 1];
+    double lval     = has_left ? left : fp[0];
+    double rval     = has_right ? right : fp[dsize - 1];
 
     if (x_value > xp_above) {
       out[i] = rval;
@@ -113,17 +114,17 @@ struct interp {
 
       index_t j = imin;
       if (j == dsize) {
-        out[i] = fp[dsize-1];
-      } else if (x_value == xp[j-1]) {
-        out[i] = fp[j-1];  // void potential non-finite interpolation
+        out[i] = fp[dsize - 1];
+      } else if (x_value == xp[j - 1]) {
+        out[i] = fp[j - 1];  // void potential non-finite interpolation
       } else {
-        double xp_below = xp[j-1];
-        double xp_above = xp[j];
+        double xp_below     = xp[j - 1];
+        double xp_above     = xp[j];
         double weight_above = (x_value - xp_below) / (xp_above - xp_below);
         double weigth_below = 1 - weight_above;
-        double x1 = fp[j-1] * weigth_below;
-        double x2 = fp[j] * weight_above;
-        out[i] = x1 + x2;
+        double x1           = fp[j - 1] * weigth_below;
+        double x2           = fp[j] * weight_above;
+        out[i]              = x1 + x2;
       }
     }
   }
@@ -139,8 +140,8 @@ struct interp_period {
                                   const size_t dsize,
                                   const double period) {
     double x_value = x[i];
-    index_t imin = 0;
-    index_t imax = static_cast<index_t>(dsize);
+    index_t imin   = 0;
+    index_t imax   = static_cast<index_t>(dsize);
     index_t imid;
     while (imin < imax) {
       imid = static_cast<index_t>((imax + imin) / 2);
@@ -155,36 +156,37 @@ struct interp_period {
     double xp_below, xp_above;
     double fp1, fp2;
     if (j == 0) {
-      xp_below = xp[idx[dsize-1]] - period;
+      xp_below = xp[idx[dsize - 1]] - period;
       xp_above = xp[idx[0]];
-      fp1 = fp[idx[dsize-1]];
-      fp2 = fp[idx[0]];
+      fp1      = fp[idx[dsize - 1]];
+      fp2      = fp[idx[0]];
     } else if (j == dsize) {
-      xp_below = xp[idx[dsize-1]];
+      xp_below = xp[idx[dsize - 1]];
       xp_above = xp[idx[0]] + period;
-      fp1 = fp[idx[dsize-1]];
-      fp2 = fp[idx[0]];
+      fp1      = fp[idx[dsize - 1]];
+      fp2      = fp[idx[0]];
     } else {
-      xp_below = xp[idx[j-1]];
+      xp_below = xp[idx[j - 1]];
       xp_above = xp[idx[j]];
-      fp1 = fp[idx[j-1]];
-      fp2 = fp[idx[j]];
+      fp1      = fp[idx[j - 1]];
+      fp2      = fp[idx[j]];
     }
     double weight_above = (x_value - xp_below) / (xp_above - xp_below);
     double weigth_below = 1 - weight_above;
-    double x1 = fp1 * weigth_below;
-    double x2 = fp2 * weight_above;
-    out[i] = x1 + x2;
+    double x1           = fp1 * weigth_below;
+    double x2           = fp2 * weight_above;
+    out[i]              = x1 + x2;
   }
 };
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void NumpyInterpForward(const nnvm::NodeAttrs& attrs,
-                        const OpContext &ctx,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
-  if (req[0] == kNullOp) return;
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
+  if (req[0] == kNullOp)
+    return;
   using namespace mxnet;
   using namespace mxnet_op;
   using namespace mshadow;
@@ -192,41 +194,40 @@ void NumpyInterpForward(const nnvm::NodeAttrs& attrs,
   CHECK_GE(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
   const NumpyInterpParam& param = nnvm::get<NumpyInterpParam>(attrs.parsed);
-  dmlc::optional<double> left = param.left;
-  dmlc::optional<double> right = param.right;
+  dmlc::optional<double> left   = param.left;
+  dmlc::optional<double> right  = param.right;
   dmlc::optional<double> period = param.period;
-  bool x_is_scalar = param.x_is_scalar;
+  bool x_is_scalar              = param.x_is_scalar;
 
-  TBlob xp = inputs[0];
-  const TBlob &fp = inputs[1];
-  const TBlob &out = outputs[0];
-  bool has_left = left.has_value() ? true : false;
-  bool has_right = right.has_value() ? true : false;
-  double left_value = left.has_value() ? left.value() : 0.0;
+  TBlob xp           = inputs[0];
+  const TBlob& fp    = inputs[1];
+  const TBlob& out   = outputs[0];
+  bool has_left      = left.has_value() ? true : false;
+  bool has_right     = right.has_value() ? true : false;
+  double left_value  = left.has_value() ? left.value() : 0.0;
   double right_value = right.has_value() ? right.value() : 0.0;
 
-  CHECK_GE(xp.Size(), 1U) <<"ValueError: array of sample points is empty";
+  CHECK_GE(xp.Size(), 1U) << "ValueError: array of sample points is empty";
 
   TopKParam topk_param = TopKParam();
-  topk_param.axis = dmlc::optional<int>(-1);
+  topk_param.axis      = dmlc::optional<int>(-1);
   topk_param.is_ascend = true;
-  topk_param.k = 0;
-  topk_param.ret_typ = topk_enum::kReturnIndices;
+  topk_param.k         = 0;
+  topk_param.ret_typ   = topk_enum::kReturnIndices;
 
   size_t topk_temp_size;  // Used by Sort
   size_t topk_workspace_size = TopKWorkspaceSize<xpu, double>(xp, topk_param, &topk_temp_size);
-  size_t size_x = x_is_scalar ? 8 : 0;
-  size_t size_norm_x = x_is_scalar ? 8 : inputs[2].Size() * sizeof(double);
-  size_t size_norm_xp = xp.Size() * sizeof(double);
-  size_t size_norm = period.has_value()? size_norm_x + size_norm_xp : 0;
-  size_t size_idx = period.has_value()? xp.Size() * sizeof(index_t) : 0;
-  size_t workspace_size =
-    topk_workspace_size + size_x + size_norm + size_idx;
+  size_t size_x              = x_is_scalar ? 8 : 0;
+  size_t size_norm_x         = x_is_scalar ? 8 : inputs[2].Size() * sizeof(double);
+  size_t size_norm_xp        = xp.Size() * sizeof(double);
+  size_t size_norm           = period.has_value() ? size_norm_x + size_norm_xp : 0;
+  size_t size_idx            = period.has_value() ? xp.Size() * sizeof(index_t) : 0;
+  size_t workspace_size      = topk_workspace_size + size_x + size_norm + size_idx;
 
   Tensor<xpu, 1, char> temp_mem =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 
   char* workspace_curr_ptr = temp_mem.dptr_;
 
@@ -234,14 +235,14 @@ void NumpyInterpForward(const nnvm::NodeAttrs& attrs,
   if (x_is_scalar) {
     double x_scalar = param.x_scalar;
     Tensor<cpu, 1, double> host_x(&x_scalar, Shape1(1), ctx.get_stream<cpu>());
-    Tensor<xpu, 1, double> device_x(reinterpret_cast<double*>(workspace_curr_ptr),
-                                    Shape1(1), ctx.get_stream<xpu>());
+    Tensor<xpu, 1, double> device_x(
+        reinterpret_cast<double*>(workspace_curr_ptr), Shape1(1), ctx.get_stream<xpu>());
     Copy(device_x, host_x, ctx.get_stream<xpu>());
     x = TBlob(device_x.dptr_, TShape(0, 1), xpu::kDevMask);
     workspace_curr_ptr += 8;
   } else {
     x = inputs[2];
-  }   // handle input x is a scalar
+  }  // handle input x is a scalar
 
   // normalize the input data by periodic boundaries.
   if (period.has_value()) {
@@ -249,34 +250,48 @@ void NumpyInterpForward(const nnvm::NodeAttrs& attrs,
     double* norm_x_ptr;
     double period_value = period.value();
     index_t* idx_ptr;
-    CHECK_NE(period_value, 0.0)<< "period must be a non-zero value";
+    CHECK_NE(period_value, 0.0) << "period must be a non-zero value";
 
     norm_xp_ptr = reinterpret_cast<double*>(workspace_curr_ptr);
-    norm_x_ptr = reinterpret_cast<double*>(workspace_curr_ptr + size_norm_xp);
-    idx_ptr = reinterpret_cast<index_t*>(workspace_curr_ptr + size_norm_xp + size_norm_x);
+    norm_x_ptr  = reinterpret_cast<double*>(workspace_curr_ptr + size_norm_xp);
+    idx_ptr     = reinterpret_cast<index_t*>(workspace_curr_ptr + size_norm_xp + size_norm_x);
 
-    TBlob norm_x = TBlob(norm_x_ptr, x.shape_, xpu::kDevMask);
-    TBlob norm_xp = TBlob(norm_xp_ptr, xp.shape_, xpu::kDevMask);
+    TBlob norm_x            = TBlob(norm_x_ptr, x.shape_, xpu::kDevMask);
+    TBlob norm_xp           = TBlob(norm_xp_ptr, xp.shape_, xpu::kDevMask);
     const OpReqType ReqType = kWriteTo;
     Kernel<op_with_req<OP, ReqType>, xpu>::Launch(
-      s, x.Size(), norm_x.dptr<double>(), x.dptr<double>(), period_value);
+        s, x.Size(), norm_x.dptr<double>(), x.dptr<double>(), period_value);
     Kernel<op_with_req<OP, ReqType>, xpu>::Launch(
-      s, xp.Size(), norm_xp.dptr<double>(), xp.dptr<double>(), period_value);
+        s, xp.Size(), norm_xp.dptr<double>(), xp.dptr<double>(), period_value);
 
     workspace_curr_ptr += size_x + size_norm + size_idx;
-    idx = TBlob(idx_ptr, xp.shape_, xpu::kDevMask);
+    idx                             = TBlob(idx_ptr, xp.shape_, xpu::kDevMask);
     std::vector<OpReqType> req_TopK = {kWriteTo};
-    std::vector<TBlob> ret = {idx};
+    std::vector<TBlob> ret          = {idx};
 
-    TopKImplwithWorkspace<xpu, double, index_t>(ctx.run_ctx, req_TopK, norm_xp, ret, topk_param,
-                                                workspace_curr_ptr, topk_temp_size, s);
-    Kernel<interp_period, xpu>::Launch(
-      s, norm_x.Size(), out.dptr<double>(), norm_x.dptr<double>(), norm_xp.dptr<double>(),
-      fp.dptr<double>(), idx.dptr<index_t>(), norm_xp.Size(), period_value);
+    TopKImplwithWorkspace<xpu, double, index_t>(
+        ctx.run_ctx, req_TopK, norm_xp, ret, topk_param, workspace_curr_ptr, topk_temp_size, s);
+    Kernel<interp_period, xpu>::Launch(s,
+                                       norm_x.Size(),
+                                       out.dptr<double>(),
+                                       norm_x.dptr<double>(),
+                                       norm_xp.dptr<double>(),
+                                       fp.dptr<double>(),
+                                       idx.dptr<index_t>(),
+                                       norm_xp.Size(),
+                                       period_value);
   } else {
-    Kernel<interp, xpu>::Launch(
-      s, x.Size(), out.dptr<double>(), x.dptr<double>(), xp.dptr<double>(), fp.dptr<double>(),
-      xp.Size(), left_value, right_value, has_left, has_right);
+    Kernel<interp, xpu>::Launch(s,
+                                x.Size(),
+                                out.dptr<double>(),
+                                x.dptr<double>(),
+                                xp.dptr<double>(),
+                                fp.dptr<double>(),
+                                xp.Size(),
+                                left_value,
+                                right_value,
+                                has_left,
+                                has_right);
   }
 }
 
diff --git a/src/operator/numpy/np_interp_op.cc b/src/operator/numpy/np_interp_op.cc
index af4bb1cd0bb3..e2ae751b8ac5 100644
--- a/src/operator/numpy/np_interp_op.cc
+++ b/src/operator/numpy/np_interp_op.cc
@@ -20,7 +20,7 @@
  * Copyright (c) 2020 by Contributors
  * \file np_interp_op.cc
  * \brief CPU Implementation of Numpy-compatible interp
-*/
+ */
 
 #include "np_interp_op-inl.h"
 
@@ -28,27 +28,25 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyInterpShape(const nnvm::NodeAttrs& attrs,
-                             std::vector<TShape> *in_attrs,
-                             std::vector<TShape> *out_attrs) {
+                             std::vector<TShape>* in_attrs,
+                             std::vector<TShape>* out_attrs) {
   CHECK_GE(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const NumpyInterpParam& param = nnvm::get<NumpyInterpParam>(attrs.parsed);
 
   TShape oshape;
-  CHECK_EQ(in_attrs->at(0).ndim(), 1U)
-    << "ValueError: Data points must be 1-D array";
-  CHECK_EQ(in_attrs->at(1).ndim(), 1U)
-    << "ValueError: Data points must be 1-D array";
+  CHECK_EQ(in_attrs->at(0).ndim(), 1U) << "ValueError: Data points must be 1-D array";
+  CHECK_EQ(in_attrs->at(1).ndim(), 1U) << "ValueError: Data points must be 1-D array";
   CHECK_EQ(in_attrs->at(0)[0], in_attrs->at(1)[0])
-    << "ValueError: fp and xp are not of the same length";
+      << "ValueError: fp and xp are not of the same length";
   oshape = param.x_is_scalar ? TShape(0, 1) : in_attrs->at(2);
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
   return shape_is_known(out_attrs->at(0));
 }
 
 inline bool NumpyInterpType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_GE(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -59,34 +57,33 @@ inline bool NumpyInterpType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyInterpParam);
 
 NNVM_REGISTER_OP(_npi_interp)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NumpyInterpParam& param =
-    nnvm::get<NumpyInterpParam>(attrs.parsed);
-  return param.x_is_scalar ? 2 : 3;
-  })
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyInterpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyInterpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyInterpType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyInterpParam& param =
-      nnvm::get<NumpyInterpParam>(attrs.parsed);
-    return param.x_is_scalar ?
-           std::vector<std::string>{"xp", "fp"} :
-           std::vector<std::string>{"xp", "fp", "x"};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyInterpForward<cpu, mshadow_op::mod>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("xp", "NDArray-or-Symbol", "Input x-coordinates")
-.add_argument("fp", "NDArray-or-Symbol", "Input y-coordinates")
-.add_argument("x", "NDArray-or-Symbol", "Input data")
-.add_arguments(NumpyInterpParam::__FIELDS__());
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyInterpParam& param = nnvm::get<NumpyInterpParam>(attrs.parsed);
+      return param.x_is_scalar ? 2 : 3;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyInterpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyInterpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyInterpType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyInterpParam& param =
+                                           nnvm::get<NumpyInterpParam>(attrs.parsed);
+                                       return param.x_is_scalar
+                                                  ? std::vector<std::string>{"xp", "fp"}
+                                                  : std::vector<std::string>{"xp", "fp", "x"};
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyInterpForward<cpu, mshadow_op::mod>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("xp", "NDArray-or-Symbol", "Input x-coordinates")
+    .add_argument("fp", "NDArray-or-Symbol", "Input y-coordinates")
+    .add_argument("x", "NDArray-or-Symbol", "Input data")
+    .add_arguments(NumpyInterpParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_interp_op.cu b/src/operator/numpy/np_interp_op.cu
index d3753e3eab0f..fa0d35429b40 100644
--- a/src/operator/numpy/np_interp_op.cu
+++ b/src/operator/numpy/np_interp_op.cu
@@ -20,7 +20,7 @@
  * Copyright (c) 2020 by Contributors
  * \file np_interp_op.cu
  * \brief GPU Implementation of Numpy-compatible interp
-*/
+ */
 
 #include "np_interp_op-inl.h"
 
@@ -28,7 +28,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_interp)
-.set_attr<FCompute>("FCompute<gpu>", NumpyInterpForward<gpu, mshadow_op::mod>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyInterpForward<gpu, mshadow_op::mod>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_kron-inl.h b/src/operator/numpy/np_kron-inl.h
index bf0983f10157..00b212d2c74d 100644
--- a/src/operator/numpy/np_kron-inl.h
+++ b/src/operator/numpy/np_kron-inl.h
@@ -31,11 +31,13 @@
 namespace mxnet {
 namespace op {
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct kron {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out,
-                                  const DType* a, const DType* b,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
+                                  const DType* b,
                                   mshadow::Shape<ndim> ashape,
                                   mshadow::Shape<ndim> bshape,
                                   mshadow::Shape<ndim> oshape) {
@@ -55,11 +57,13 @@ struct kron {
   }
 };
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct kron_back_a {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* agrad,
-                                  const DType* b, const DType* ograd,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* agrad,
+                                  const DType* b,
+                                  const DType* ograd,
                                   mshadow::Shape<ndim> ashape,
                                   mshadow::Shape<ndim> bshape,
                                   mshadow::Shape<ndim> oshape) {
@@ -72,20 +76,22 @@ struct kron_back_a {
     for (index_t idx_b = 0; idx_b < bshape.Size(); idx_b++) {
       auto jb = unravel(idx_b, bshape);
       for (int q = 0; q < ndim; q++) {
-        k[q] = ia[q]*bshape[q] + jb[q];
+        k[q] = ia[q] * bshape[q] + jb[q];
       }
       auto idx_o = ravel(k, oshape);
-      temp_agrad += b[idx_b]*ograd[idx_o];
+      temp_agrad += b[idx_b] * ograd[idx_o];
     }
     KERNEL_ASSIGN(agrad[i], req, temp_agrad);
   }
 };
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct kron_back_b {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType* a,
-                                  DType* bgrad, const DType* ograd,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* a,
+                                  DType* bgrad,
+                                  const DType* ograd,
                                   mshadow::Shape<ndim> ashape,
                                   mshadow::Shape<ndim> bshape,
                                   mshadow::Shape<ndim> oshape) {
@@ -101,19 +107,18 @@ struct kron_back_b {
         k[q] = ia[q] * bshape[q] + jb[q];
       }
       auto idx_o = ravel(k, oshape);
-      temp_bgrad += a[idx_a]*ograd[idx_o];
+      temp_bgrad += a[idx_a] * ograd[idx_o];
     }
     KERNEL_ASSIGN(bgrad[i], req, temp_bgrad);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void KronOpForwardImpl(const OpContext& ctx,
                        OpReqType req,
                        const TBlob& a,
                        const TBlob& b,
-                       const TBlob& out
-                       ) {
+                       const TBlob& out) {
   using namespace mshadow;
 
   if (req == kNullOp) {
@@ -128,21 +133,20 @@ void KronOpForwardImpl(const OpContext& ctx,
   const mxnet::TShape& bshape = b.shape_;
   const mxnet::TShape& oshape = out.shape_;
 
-
   // TensordotIntAxesImpl<xpu>(0, ctx, a, b, out, req[0]);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
     if (ashape.Size() == 0U || bshape.Size() == 0U) {
       // 0-size input
       if (req != kAddTo) {
-        Tensor<xpu, 1, DType> out_data = out.get_with_shape<xpu, 1, DType>(
-            Shape1(out.shape_.Size()), s);
+        Tensor<xpu, 1, DType> out_data =
+            out.get_with_shape<xpu, 1, DType>(Shape1(out.shape_.Size()), s);
         out_data = static_cast<DType>(0);
       }
     } else if (ashape.ndim() == 0 && bshape.ndim() == 0) {
       // Both 0-D scalars, equivalent to multiply
-      Tensor<xpu, 1, DType> a_data = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> b_data = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> a_data   = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> b_data   = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> out_data = out.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       ASSIGN_DISPATCH(out_data, req, a_data * b_data);
     } else if (ashape.ndim() == 0 || bshape.ndim() == 0) {
@@ -151,15 +155,15 @@ void KronOpForwardImpl(const OpContext& ctx,
       const DType* scalar = (ashape.ndim() == 0) ? a.dptr<DType>() : b.dptr<DType>();
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         mxnet_op::Kernel<scalar_mul_kernel<Req>, xpu>::Launch(
-          s, out.Size(), out.dptr<DType>(), tensor, scalar);
+            s, out.Size(), out.dptr<DType>(), tensor, scalar);
       });
     } else {
       MXNET_NDIM_SWITCH(oshape.ndim(), ndim, {
         Shape<ndim> ashape_ = oshape.get<ndim>();
         Shape<ndim> bshape_ = oshape.get<ndim>();
         Shape<ndim> oshape_ = oshape.get<ndim>();
-        int temp = ashape.ndim()-bshape.ndim();
-        int s_dim = (temp > 0)?bshape.ndim():ashape.ndim();
+        int temp            = ashape.ndim() - bshape.ndim();
+        int s_dim           = (temp > 0) ? bshape.ndim() : ashape.ndim();
         for (int i = 0; i < s_dim; i++) {
           ashape_[ndim - i - 1] = ashape[ashape.ndim() - i - 1];
           bshape_[ndim - i - 1] = bshape[bshape.ndim() - i - 1];
@@ -179,9 +183,14 @@ void KronOpForwardImpl(const OpContext& ctx,
           }
         }
         MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-          mxnet_op::Kernel<kron<ndim, req_type>, xpu>::Launch(
-            s, out.Size(), out.dptr<DType>(), a.dptr<DType>(), b.dptr<DType>(),
-            ashape_, bshape_, oshape_);
+          mxnet_op::Kernel<kron<ndim, req_type>, xpu>::Launch(s,
+                                                              out.Size(),
+                                                              out.dptr<DType>(),
+                                                              a.dptr<DType>(),
+                                                              b.dptr<DType>(),
+                                                              ashape_,
+                                                              bshape_,
+                                                              oshape_);
         });
       });
     }
@@ -196,7 +205,7 @@ void KronOpForwardImpl(const OpContext& ctx,
   ReduceAxesRTCComputeImpl(__VA_ARGS__, "red::sum{}", &workspace)
 #endif
 
-template<typename xpu>
+template <typename xpu>
 void KronOpBackwardImpl(const OpContext& ctx,
                         const std::vector<OpReqType>& req,
                         const TBlob& a,
@@ -208,56 +217,61 @@ void KronOpBackwardImpl(const OpContext& ctx,
   const mxnet::TShape& bshape = b.shape_;
   const mxnet::TShape& oshape = ograd.shape_;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {
     if (ashape.ndim() == 0 && bshape.ndim() == 0) {
       // Both 0-D scalars, equivalent to multiply
       Tensor<xpu, 1, DType> ograd_data = ograd.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> a_data = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> b_data = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> a_data     = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> b_data     = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> agrad_data = agrad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> bgrad_data = bgrad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       ASSIGN_DISPATCH(agrad_data, req[0], b_data * ograd_data);
       ASSIGN_DISPATCH(bgrad_data, req[1], a_data * ograd_data);
     } else if (ashape.ndim() == 0 || bshape.ndim() == 0) {
       // Either of them is a scalar, just scale by one of them
-      const TBlob& tensor = (ashape.ndim() == 0) ? b : a;
-      const TBlob& tensor_grad = (ashape.ndim() == 0) ? bgrad : agrad;
-      const TBlob& scalar = (ashape.ndim() == 0) ? a : b;
-      const TBlob& scalar_grad = (ashape.ndim() == 0) ? agrad : bgrad;
-      Tensor<xpu, 1, DType> scalar_ = scalar.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      const TBlob& tensor                = (ashape.ndim() == 0) ? b : a;
+      const TBlob& tensor_grad           = (ashape.ndim() == 0) ? bgrad : agrad;
+      const TBlob& scalar                = (ashape.ndim() == 0) ? a : b;
+      const TBlob& scalar_grad           = (ashape.ndim() == 0) ? agrad : bgrad;
+      Tensor<xpu, 1, DType> scalar_      = scalar.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> scalar_grad_ = scalar_grad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> tensor_ = tensor.FlatTo1D<xpu, DType>(s);
+      Tensor<xpu, 1, DType> tensor_      = tensor.FlatTo1D<xpu, DType>(s);
       Tensor<xpu, 1, DType> tensor_grad_ = tensor_grad.FlatTo1D<xpu, DType>(s);
-      Tensor<xpu, 1, DType> ograd_ = ograd.FlatTo1D<xpu, DType>(s);
-      const OpReqType& tensor_req = (ashape.ndim() == 0) ? req[1] : req[0];
-      const OpReqType& scalar_req = (ashape.ndim() == 0) ? req[0] : req[1];
-      ASSIGN_DISPATCH(tensor_grad_, tensor_req,
-                      broadcast_scalar(scalar_, tensor_grad_.shape_) * ograd_);
+      Tensor<xpu, 1, DType> ograd_       = ograd.FlatTo1D<xpu, DType>(s);
+      const OpReqType& tensor_req        = (ashape.ndim() == 0) ? req[1] : req[0];
+      const OpReqType& scalar_req        = (ashape.ndim() == 0) ? req[0] : req[1];
+      ASSIGN_DISPATCH(
+          tensor_grad_, tensor_req, broadcast_scalar(scalar_, tensor_grad_.shape_) * ograd_);
       TShape src_shape, dst_shape;
       BroadcastReduceShapeCompact(ograd.shape_, scalar_grad_.shape_, &src_shape, &dst_shape);
-      size_t workspace_size = broadcast::ReduceWorkspaceSize(s, dst_shape,
-                                                             {scalar_req}, src_shape);
+      size_t workspace_size = broadcast::ReduceWorkspaceSize(s, dst_shape, {scalar_req}, src_shape);
       constexpr size_t align_size = 1024;
-      const size_t aligned_first_workspace_size = ((workspace_size + align_size - 1) / align_size)
-                                                  * align_size;
+      const size_t aligned_first_workspace_size =
+          ((workspace_size + align_size - 1) / align_size) * align_size;
       workspace_size = aligned_first_workspace_size + ograd.shape_.Size() * sizeof(DType);
       Tensor<xpu, 1, char> workspace =
-        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
-      Tensor<xpu, 1, DType> temp(reinterpret_cast<DType*>(workspace.dptr_ +
-                                                          aligned_first_workspace_size),
-                                 Shape1(ograd.shape_.Size()), s);
+          ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      Tensor<xpu, 1, DType> temp(
+          reinterpret_cast<DType*>(workspace.dptr_ + aligned_first_workspace_size),
+          Shape1(ograd.shape_.Size()),
+          s);
       ASSIGN_DISPATCH(temp, kWriteTo, tensor_ * ograd_);
 
-      NP_KRON_REDUCE_AXES(true, workspace, ctx, {TBlob(temp)}, {scalar_req},
-                          {TBlob(scalar_grad_)}, scalar_grad_.shape_);
+      NP_KRON_REDUCE_AXES(true,
+                          workspace,
+                          ctx,
+                          {TBlob(temp)},
+                          {scalar_req},
+                          {TBlob(scalar_grad_)},
+                          scalar_grad_.shape_);
     } else {
       MXNET_NDIM_SWITCH(oshape.ndim(), ndim, {
         Shape<ndim> ashape_ = oshape.get<ndim>();
         Shape<ndim> bshape_ = oshape.get<ndim>();
         Shape<ndim> oshape_ = oshape.get<ndim>();
-        int temp = ashape.ndim()-bshape.ndim();
-        int s_dim =  (temp > 0)?bshape.ndim():ashape.ndim();
+        int temp            = ashape.ndim() - bshape.ndim();
+        int s_dim           = (temp > 0) ? bshape.ndim() : ashape.ndim();
         for (int i = 0; i < s_dim; i++) {
           ashape_[ndim - i - 1] = ashape[ashape.ndim() - i - 1];
           bshape_[ndim - i - 1] = bshape[bshape.ndim() - i - 1];
@@ -278,16 +292,26 @@ void KronOpBackwardImpl(const OpContext& ctx,
         }
         MSHADOW_TYPE_SWITCH(agrad.type_flag_, DType, {
           MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-            mxnet_op::Kernel<kron_back_a<ndim, req_type>, xpu>::Launch(
-              s, agrad.Size(), agrad.dptr<DType>(), b.dptr<DType>(), ograd.dptr<DType>(),
-              ashape_, bshape_, oshape_);
+            mxnet_op::Kernel<kron_back_a<ndim, req_type>, xpu>::Launch(s,
+                                                                       agrad.Size(),
+                                                                       agrad.dptr<DType>(),
+                                                                       b.dptr<DType>(),
+                                                                       ograd.dptr<DType>(),
+                                                                       ashape_,
+                                                                       bshape_,
+                                                                       oshape_);
           });
         });
         MSHADOW_TYPE_SWITCH(bgrad.type_flag_, DType, {
           MXNET_ASSIGN_REQ_SWITCH(req[1], req_type, {
-            mxnet_op::Kernel<kron_back_b<ndim, req_type>, xpu>::Launch(
-              s, bgrad.Size(), a.dptr<DType>(), bgrad.dptr<DType>(), ograd.dptr<DType>(),
-              ashape_, bshape_, oshape_);
+            mxnet_op::Kernel<kron_back_b<ndim, req_type>, xpu>::Launch(s,
+                                                                       bgrad.Size(),
+                                                                       a.dptr<DType>(),
+                                                                       bgrad.dptr<DType>(),
+                                                                       ograd.dptr<DType>(),
+                                                                       ashape_,
+                                                                       bshape_,
+                                                                       oshape_);
           });
         });
       });
@@ -297,7 +321,7 @@ void KronOpBackwardImpl(const OpContext& ctx,
 
 #undef NP_KRON_REDUCE_AXES
 
-template<typename xpu>
+template <typename xpu>
 inline void KronOpForward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -308,15 +332,14 @@ inline void KronOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
+  const TBlob& a   = inputs[0];
+  const TBlob& b   = inputs[1];
   const TBlob& out = outputs[0];
 
   KronOpForwardImpl<xpu>(ctx, req[0], a, b, out);
 }
 
-
-template<typename xpu>
+template <typename xpu>
 inline void KronOpBackward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -328,9 +351,9 @@ inline void KronOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
 
-  const TBlob& ograd = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
+  const TBlob& ograd  = inputs[0];
+  const TBlob& a      = inputs[1];
+  const TBlob& b      = inputs[2];
   const TBlob& grad_a = outputs[0];
   const TBlob& grad_b = outputs[1];
 
diff --git a/src/operator/numpy/np_kron.cc b/src/operator/numpy/np_kron.cc
index 321e51bc259e..19cf049ad083 100644
--- a/src/operator/numpy/np_kron.cc
+++ b/src/operator/numpy/np_kron.cc
@@ -28,8 +28,8 @@ namespace mxnet {
 namespace op {
 
 inline bool KronOpShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -63,32 +63,32 @@ inline bool KronOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_kron)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", KronOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", KronOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_kron"})
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", KronOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", KronOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_kron"})
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input");
 
 NNVM_REGISTER_OP(_backward_npi_kron)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", KronOpBackward<cpu>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", KronOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_kron.cu b/src/operator/numpy/np_kron.cu
index fc2fb1f765b9..4ec8b1a43cd5 100644
--- a/src/operator/numpy/np_kron.cu
+++ b/src/operator/numpy/np_kron.cu
@@ -27,11 +27,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_kron)
-.set_attr<FCompute>("FCompute<gpu>", KronOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_kron).set_attr<FCompute>("FCompute<gpu>", KronOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_kron)
-.set_attr<FCompute>("FCompute<gpu>", KronOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_kron).set_attr<FCompute>("FCompute<gpu>", KronOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_matmul_op-inl.h b/src/operator/numpy/np_matmul_op-inl.h
index 935de8b3cbbe..4c3d8cdcca56 100644
--- a/src/operator/numpy/np_matmul_op-inl.h
+++ b/src/operator/numpy/np_matmul_op-inl.h
@@ -36,11 +36,9 @@
 namespace mxnet {
 namespace op {
 
-inline bool MatmulNeedBroadcast(const mxnet::TShape& ashape,
-                                const mxnet::TShape& bshape) {
+inline bool MatmulNeedBroadcast(const mxnet::TShape& ashape, const mxnet::TShape& bshape) {
   bool need_bcast = false;
-  for (int i = ashape.ndim() - 3, j = bshape.ndim() - 3;
-       i >= 0 || j >=0; --i, --j) {
+  for (int i = ashape.ndim() - 3, j = bshape.ndim() - 3; i >= 0 || j >= 0; --i, --j) {
     if (i >= 0 && j >= 0) {
       need_bcast |= (ashape[i] != bshape[j]);
     } else if (i >= 0) {
@@ -62,10 +60,10 @@ inline bool MatmulNeedBroadcast(const mxnet::TShape& ashape,
  * \param shape - inshape.
  * \param N - the count of valid inshape ndims.
  */
-template<int ndim>
+template <int ndim>
 mshadow::Shape<ndim> GetKernelShape(const mxnet::TShape& shape, size_t N) {
-  mshadow::Shape<ndim>k_shape;
-  for (int i = shape.ndim() - 1, j = N - 1; i >= 0 || j >= 0 ; --i, --j) {
+  mshadow::Shape<ndim> k_shape;
+  for (int i = shape.ndim() - 1, j = N - 1; i >= 0 || j >= 0; --i, --j) {
     if (i >= 0) {
       k_shape[j] = shape[i];
     } else {
@@ -83,14 +81,14 @@ mshadow::Shape<ndim> GetKernelShape(const mxnet::TShape& shape, size_t N) {
  * \param dimstart start dimension
  * \param dimend end dimension
  */
-template<int ndim>
+template <int ndim>
 mshadow::Shape<ndim> GetBroadcastKernelShape(mshadow::Shape<ndim> in_shape,
                                              mshadow::Shape<ndim> broadcast_shape,
-                                             int dimstart, int dimend) {
+                                             int dimstart,
+                                             int dimend) {
   CHECK_GE(dimstart, 0) << "dimstart must be >= 0, while received " << dimstart;
-  CHECK_LT(dimend, ndim) << "dimend must be < " << ndim
-                         << ", while received " << dimend;
-  mshadow::Shape<ndim>out_shape(in_shape);
+  CHECK_LT(dimend, ndim) << "dimend must be < " << ndim << ", while received " << dimend;
+  mshadow::Shape<ndim> out_shape(in_shape);
   for (int i = dimstart; i < dimend; ++i) {
     out_shape[i] = std::max(in_shape[i], broadcast_shape[i]);
   }
@@ -107,10 +105,13 @@ struct SumByShape {
               output[1] = sum(input[1, 3, 5, 7, 9])
    * \note in_size >= out_size
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* output, DType* input,
-                                  size_t in_size, size_t out_size,
-                                  const int req){
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* output,
+                                  DType* input,
+                                  size_t in_size,
+                                  size_t out_size,
+                                  const int req) {
     // i is the global position in flattened output
     size_t pos = static_cast<size_t>(i);
     DType temp = 0;
@@ -122,23 +123,28 @@ struct SumByShape {
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 inline void MatmulImpl(const OpContext& ctx,
-                       const TBlob& input_a, const TBlob& input_b,
-                       const OpReqType& req, const TBlob& output,
+                       const TBlob& input_a,
+                       const TBlob& input_b,
+                       const OpReqType& req,
+                       const TBlob& output,
                        Tensor<xpu, 1, char> temp_mem,
-                       const size_t ndim, const size_t batch_size,
-                       const size_t bc_size_a, const size_t bc_size_b,
+                       const size_t ndim,
+                       const size_t batch_size,
+                       const size_t bc_size_a,
+                       const size_t bc_size_b,
                        const mxnet::TShape& a_shape,
                        const mxnet::TShape& b_shape,
                        const mxnet::TShape& out_shape,
-                       const bool TA, const bool TB) {
+                       const bool TA,
+                       const bool TB) {
   using namespace mshadow;
   using namespace mxnet_op;
   mshadow::Tensor<xpu, 1, DType*> workspace;
   mshadow::Tensor<xpu, 3, DType> ans, mlhs, mrhs;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  bool isCPU = std::is_same<xpu, cpu>::value;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  bool isCPU              = std::is_same<xpu, cpu>::value;
   // Is true if either a or b requires broadcast or not
   if (MatmulNeedBroadcast(a_shape, b_shape)) {
     // e.g. a.shape = (2, 3, 1, 4, 2)
@@ -146,15 +152,15 @@ inline void MatmulImpl(const OpContext& ctx,
     //      c = matmul(a, b), need to broadcast a and b
     //      c.shape = (2, 3, 5, 4, 4)
     mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> k_a_shape =
-      GetKernelShape<MXNET_SPECIAL_MAX_NDIM>(a_shape, ndim);
+        GetKernelShape<MXNET_SPECIAL_MAX_NDIM>(a_shape, ndim);
     mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> k_b_shape =
-      GetKernelShape<MXNET_SPECIAL_MAX_NDIM>(b_shape, ndim);
+        GetKernelShape<MXNET_SPECIAL_MAX_NDIM>(b_shape, ndim);
     mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> k_out_shape =
-      GetKernelShape<MXNET_SPECIAL_MAX_NDIM>(out_shape, ndim);
+        GetKernelShape<MXNET_SPECIAL_MAX_NDIM>(out_shape, ndim);
     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> k_a_shape_bc =
-      GetBroadcastKernelShape<MXNET_SPECIAL_MAX_NDIM>(k_a_shape, k_out_shape, 0, ndim - 2);
+        GetBroadcastKernelShape<MXNET_SPECIAL_MAX_NDIM>(k_a_shape, k_out_shape, 0, ndim - 2);
     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> k_b_shape_bc =
-      GetBroadcastKernelShape<MXNET_SPECIAL_MAX_NDIM>(k_b_shape, k_out_shape, 0, ndim - 2);
+        GetBroadcastKernelShape<MXNET_SPECIAL_MAX_NDIM>(k_b_shape, k_out_shape, 0, ndim - 2);
     DType* bc_a_ptr = reinterpret_cast<DType*>(temp_mem.dptr_);
     DType* bc_b_ptr = bc_a_ptr + bc_size_a;
     MSHADOW_TYPE_SWITCH_WITH_BOOL(input_a.type_flag_, IType, {
@@ -165,73 +171,85 @@ inline void MatmulImpl(const OpContext& ctx,
         if (isCPU) {
           if (!aux_data_a.shape_changed) {
             Kernel<direct_copy<mshadow_op::identity>, xpu>::Launch(
-              s, bc_size_a, input_a.dptr<IType>(), bc_a_ptr, OpReqType::kWriteTo);
-            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(
-              s, input_b.Size(), input_b.dptr<IType>(), bc_b_ptr,
-              aux_data_b, OpReqType::kWriteTo, ndim);
+                s, bc_size_a, input_a.dptr<IType>(), bc_a_ptr, OpReqType::kWriteTo);
+            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(s,
+                                                                            input_b.Size(),
+                                                                            input_b.dptr<IType>(),
+                                                                            bc_b_ptr,
+                                                                            aux_data_b,
+                                                                            OpReqType::kWriteTo,
+                                                                            ndim);
           } else if (!aux_data_b.shape_changed) {
             Kernel<direct_copy<mshadow_op::identity>, xpu>::Launch(
-              s, bc_size_b, input_b.dptr<IType>(), bc_b_ptr, OpReqType::kWriteTo);
-            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(
-              s, input_a.Size(), input_a.dptr<IType>(), bc_a_ptr,
-              aux_data_a, OpReqType::kWriteTo, ndim);
+                s, bc_size_b, input_b.dptr<IType>(), bc_b_ptr, OpReqType::kWriteTo);
+            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(s,
+                                                                            input_a.Size(),
+                                                                            input_a.dptr<IType>(),
+                                                                            bc_a_ptr,
+                                                                            aux_data_a,
+                                                                            OpReqType::kWriteTo,
+                                                                            ndim);
           } else {
-            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(
-              s, input_a.Size(), input_a.dptr<IType>(), bc_a_ptr,
-              aux_data_a, OpReqType::kWriteTo, ndim);
-            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(
-              s, input_b.Size(), input_b.dptr<IType>(), bc_b_ptr,
-              aux_data_b, OpReqType::kWriteTo, ndim);
+            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(s,
+                                                                            input_a.Size(),
+                                                                            input_a.dptr<IType>(),
+                                                                            bc_a_ptr,
+                                                                            aux_data_a,
+                                                                            OpReqType::kWriteTo,
+                                                                            ndim);
+            Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(s,
+                                                                            input_b.Size(),
+                                                                            input_b.dptr<IType>(),
+                                                                            bc_b_ptr,
+                                                                            aux_data_b,
+                                                                            OpReqType::kWriteTo,
+                                                                            ndim);
           }
         } else {
           Kernel<broadcast_kernel_gpu<mshadow_op::identity>, xpu>::Launch(
-            s, bc_size_a, input_a.dptr<IType>(), bc_a_ptr,
-            aux_data_a, OpReqType::kWriteTo, ndim);
+              s, bc_size_a, input_a.dptr<IType>(), bc_a_ptr, aux_data_a, OpReqType::kWriteTo, ndim);
           Kernel<broadcast_kernel_gpu<mshadow_op::identity>, xpu>::Launch(
-            s, bc_size_b, input_b.dptr<IType>(), bc_b_ptr,
-            aux_data_b, OpReqType::kWriteTo, ndim);
+              s, bc_size_b, input_b.dptr<IType>(), bc_b_ptr, aux_data_b, OpReqType::kWriteTo, ndim);
         }
       });
     });
-    ans = mshadow::Tensor<xpu, 3, DType>(output.dptr<DType>(),
-      Shape3(batch_size, k_out_shape[ndim - 2], k_out_shape[ndim - 1]), s);
-    mlhs = mshadow::Tensor<xpu, 3, DType>(bc_a_ptr,
-      Shape3(batch_size, k_a_shape_bc[ndim - 2], k_a_shape_bc[ndim - 1]), s);
-    mrhs = mshadow::Tensor<xpu, 3, DType>(bc_b_ptr,
-      Shape3(batch_size, k_b_shape_bc[ndim - 2], k_b_shape_bc[ndim - 1]), s);
+    ans = mshadow::Tensor<xpu, 3, DType>(
+        output.dptr<DType>(), Shape3(batch_size, k_out_shape[ndim - 2], k_out_shape[ndim - 1]), s);
+    mlhs = mshadow::Tensor<xpu, 3, DType>(
+        bc_a_ptr, Shape3(batch_size, k_a_shape_bc[ndim - 2], k_a_shape_bc[ndim - 1]), s);
+    mrhs = mshadow::Tensor<xpu, 3, DType>(
+        bc_b_ptr, Shape3(batch_size, k_b_shape_bc[ndim - 2], k_b_shape_bc[ndim - 1]), s);
     DType** workspace_ptr = reinterpret_cast<DType**>(bc_b_ptr + bc_size_b);
     workspace = mshadow::Tensor<xpu, 1, DType*>(workspace_ptr, Shape1(3 * ans.size(0)), s);
   } else {
     ans = output.get_with_shape<xpu, 3, DType>(
-      Shape3(batch_size, out_shape[ndim - 2], out_shape[ndim - 1]), s);
+        Shape3(batch_size, out_shape[ndim - 2], out_shape[ndim - 1]), s);
     mlhs = input_a.get_with_shape<xpu, 3, DType>(
-      Shape3(batch_size, (a_shape.ndim() == 1) ? 1 : a_shape[a_shape.ndim() - 2],
-             a_shape[a_shape.ndim() - 1]), s);
+        Shape3(batch_size,
+               (a_shape.ndim() == 1) ? 1 : a_shape[a_shape.ndim() - 2],
+               a_shape[a_shape.ndim() - 1]),
+        s);
     mrhs = input_b.get_with_shape<xpu, 3, DType>(
-      Shape3(batch_size, b_shape[b_shape.ndim() - 2], b_shape[b_shape.ndim() - 1]), s);
-    workspace = ctx.requested[0].get_space_typed<xpu, 1, DType*>
-      (mshadow::Shape1(3 * ans.size(0)), s);
+        Shape3(batch_size, b_shape[b_shape.ndim() - 2], b_shape[b_shape.ndim() - 1]), s);
+    workspace =
+        ctx.requested[0].get_space_typed<xpu, 1, DType*>(mshadow::Shape1(3 * ans.size(0)), s);
   }
   if (TA && TB) {
-    mshadow::BatchGEMM<true, true>(ans, mlhs, mrhs, (DType)1.0f,
-                                   (kAddTo == req) ? (DType)1.0f : (DType)0.0f,
-                                   workspace);
+    mshadow::BatchGEMM<true, true>(
+        ans, mlhs, mrhs, (DType)1.0f, (kAddTo == req) ? (DType)1.0f : (DType)0.0f, workspace);
   } else if (TA && !TB) {
-    mshadow::BatchGEMM<true, false>(ans, mlhs, mrhs, (DType)1.0f,
-                                    (kAddTo == req) ? (DType)1.0f : (DType)0.0f,
-                                    workspace);
+    mshadow::BatchGEMM<true, false>(
+        ans, mlhs, mrhs, (DType)1.0f, (kAddTo == req) ? (DType)1.0f : (DType)0.0f, workspace);
   } else if (!TA && TB) {
-    mshadow::BatchGEMM<false, true>(ans, mlhs, mrhs, (DType)1.0f,
-                                    (kAddTo == req) ? (DType)1.0f : (DType)0.0f,
-                                    workspace);
+    mshadow::BatchGEMM<false, true>(
+        ans, mlhs, mrhs, (DType)1.0f, (kAddTo == req) ? (DType)1.0f : (DType)0.0f, workspace);
   } else {
-    mshadow::BatchGEMM<false, false>(ans, mlhs, mrhs, (DType)1.0f,
-                                     (kAddTo == req) ? (DType)1.0f : (DType)0.0f,
-                                     workspace);
+    mshadow::BatchGEMM<false, false>(
+        ans, mlhs, mrhs, (DType)1.0f, (kAddTo == req) ? (DType)1.0f : (DType)0.0f, workspace);
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyMatmulForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -239,39 +257,38 @@ void NumpyMatmulForward(const nnvm::NodeAttrs& attrs,
                         const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  if (req[0] == kNullOp && req[1] == kNullOp) return;
+  if (req[0] == kNullOp && req[1] == kNullOp)
+    return;
 
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
-  const TBlob& out = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  CHECK_NE(a.shape_.ndim(), 0)
-    << "Multiplication by scalars is not allowed.\n";
-  CHECK_NE(b.shape_.ndim(), 0)
-    << "Multiplication by scalars is not allowed.\n";
+  const TBlob& a          = inputs[0];
+  const TBlob& b          = inputs[1];
+  const TBlob& out        = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  CHECK_NE(a.shape_.ndim(), 0) << "Multiplication by scalars is not allowed.\n";
+  CHECK_NE(b.shape_.ndim(), 0) << "Multiplication by scalars is not allowed.\n";
   CHECK_EQ(out.type_flag_, a.type_flag_)
       << "Mstmul function only support input/output with the same type";
   CHECK_EQ(out.type_flag_, b.type_flag_)
       << "Matmul function only support input/output with the same type";
   CHECK(out.type_flag_ == kFloat32 || out.type_flag_ == kFloat64 ||
-    (out.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
-    << "Matmul only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
+        (out.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
+      << "Matmul only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
 
   if ((a.shape_.Size() == 0) || (b.shape_.Size() == 0)) {
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Kernel<mxnet_op::set_zero, xpu>::Launch(
-        s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
+          s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
     });
     return;
   }
 
-  mxnet::TShape a_shape = (a.shape_.ndim() == 1) ? Shape2(1, a.shape_.Size()) : a.shape_;
-  mxnet::TShape b_shape = (b.shape_.ndim() == 1) ? Shape2(b.shape_.Size(), 1) : b.shape_;
+  mxnet::TShape a_shape   = (a.shape_.ndim() == 1) ? Shape2(1, a.shape_.Size()) : a.shape_;
+  mxnet::TShape b_shape   = (b.shape_.ndim() == 1) ? Shape2(b.shape_.Size(), 1) : b.shape_;
   mxnet::TShape out_shape = out.shape_;
-  size_t ndim = out_shape.ndim();
+  size_t ndim             = out_shape.ndim();
   if ((a.shape_.ndim() == 1) && (b.shape_.ndim() == 1)) {
     ndim = 2;
     std::vector<size_t> newshape({1, 1});
@@ -296,20 +313,31 @@ void NumpyMatmulForward(const nnvm::NodeAttrs& attrs,
   }
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     size_t batch_size = out_shape.ProdShape(0, ndim - 2);
-    size_t bc_size_a = batch_size * a_shape[a_shape.ndim() - 2] * a_shape[a_shape.ndim() - 1];
-    size_t bc_size_b = batch_size * b_shape[b_shape.ndim() - 2] * b_shape[b_shape.ndim() - 1];
-    size_t temp_mem_size = (bc_size_a + bc_size_b) * sizeof(DType) +
-                           3 * batch_size * sizeof(DType*);
+    size_t bc_size_a  = batch_size * a_shape[a_shape.ndim() - 2] * a_shape[a_shape.ndim() - 1];
+    size_t bc_size_b  = batch_size * b_shape[b_shape.ndim() - 2] * b_shape[b_shape.ndim() - 1];
+    size_t temp_mem_size =
+        (bc_size_a + bc_size_b) * sizeof(DType) + 3 * batch_size * sizeof(DType*);
     Tensor<xpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
-    MatmulImpl<xpu, DType>(ctx, inputs[0], inputs[1], req[0], outputs[0], temp_mem,
-                           ndim, batch_size, bc_size_a, bc_size_b,
-                           a_shape, b_shape, out_shape, false, false);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+    MatmulImpl<xpu, DType>(ctx,
+                           inputs[0],
+                           inputs[1],
+                           req[0],
+                           outputs[0],
+                           temp_mem,
+                           ndim,
+                           batch_size,
+                           bc_size_a,
+                           bc_size_b,
+                           a_shape,
+                           b_shape,
+                           out_shape,
+                           false,
+                           false);
   });
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void NumpyMatmulBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -317,25 +345,27 @@ void NumpyMatmulBackward(const nnvm::NodeAttrs& attrs,
                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  if (req[0] == kNullOp && req[1] == kNullOp) return;
+  if (req[0] == kNullOp && req[1] == kNullOp)
+    return;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
 
-  const TBlob& ograd = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
-  const TBlob& grad_a = outputs[0];
-  const TBlob& grad_b = outputs[1];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& ograd      = inputs[0];
+  const TBlob& a          = inputs[1];
+  const TBlob& b          = inputs[2];
+  const TBlob& grad_a     = outputs[0];
+  const TBlob& grad_b     = outputs[1];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   CHECK(grad_a.type_flag_ == kFloat32 || grad_a.type_flag_ == kFloat64 ||
         (grad_a.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
-    << "Matmul only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
+      << "Matmul only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
   CHECK(grad_b.type_flag_ == kFloat32 || grad_b.type_flag_ == kFloat64 ||
         (grad_b.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
-    << "Matmul only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
+      << "Matmul only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
   // ograd.shape_.Size() == 0 if and only if a.shape_.Size() == 0 && b.shape_.Size() == 0
-  if (a.shape_.Size() == 0 && b.shape_.Size() == 0) return;
+  if (a.shape_.Size() == 0 && b.shape_.Size() == 0)
+    return;
   if (a.shape_.Size() == 0) {  // a.shape_.Size() == 0 && b.shape_.Size() != 0
     if (req[1] == kWriteTo) {
       MSHADOW_REAL_TYPE_SWITCH(outputs[1].type_flag_, DType, {
@@ -353,10 +383,10 @@ void NumpyMatmulBackward(const nnvm::NodeAttrs& attrs,
     return;
   }
 
-  mxnet::TShape a_shape = (a.shape_.ndim() == 1) ? Shape2(1, a.shape_.Size()) : a.shape_;
-  mxnet::TShape b_shape = (b.shape_.ndim() == 1) ? Shape2(b.shape_.Size(), 1) : b.shape_;
+  mxnet::TShape a_shape   = (a.shape_.ndim() == 1) ? Shape2(1, a.shape_.Size()) : a.shape_;
+  mxnet::TShape b_shape   = (b.shape_.ndim() == 1) ? Shape2(b.shape_.Size(), 1) : b.shape_;
   mxnet::TShape out_shape = ograd.shape_;
-  size_t ndim = out_shape.ndim();
+  size_t ndim             = out_shape.ndim();
   if ((a.shape_.ndim() == 1) && (b.shape_.ndim() == 1)) {
     // e.g. a.shape = (x), b.shape = (x)
     //      c = matmul(a, b)
@@ -404,46 +434,75 @@ void NumpyMatmulBackward(const nnvm::NodeAttrs& attrs,
   vec_grad_b_shape[ndim - 1] = b_shape[b_shape.ndim() - 1];
   mxnet::TShape grad_b_shape = mxnet::TShape(vec_grad_b_shape.begin(), vec_grad_b_shape.end());
   MSHADOW_REAL_TYPE_SWITCH(ograd.type_flag_, DType, {
-    size_t batch_size =
-      out_shape.ProdShape(0, ndim - 2);
-    size_t bc_size_a =
-      batch_size * a_shape[a_shape.ndim() - 2] * a_shape[a_shape.ndim() - 1];
-    size_t bc_size_b =
-      batch_size * b_shape[b_shape.ndim() - 2] * b_shape[b_shape.ndim() - 1];
+    size_t batch_size = out_shape.ProdShape(0, ndim - 2);
+    size_t bc_size_a  = batch_size * a_shape[a_shape.ndim() - 2] * a_shape[a_shape.ndim() - 1];
+    size_t bc_size_b  = batch_size * b_shape[b_shape.ndim() - 2] * b_shape[b_shape.ndim() - 1];
     size_t bc_size_out =
-      batch_size * out_shape[out_shape.ndim() - 2] * out_shape[out_shape.ndim() - 1];
+        batch_size * out_shape[out_shape.ndim() - 2] * out_shape[out_shape.ndim() - 1];
 
-    size_t temp_mem_size_grada = (bc_size_out + bc_size_b) * sizeof(DType) +
-                                 3 * batch_size * sizeof(DType*);
-    size_t temp_mem_size_gradb = (bc_size_a + bc_size_out) * sizeof(DType) +
-                                 3 * batch_size * sizeof(DType*);
+    size_t temp_mem_size_grada =
+        (bc_size_out + bc_size_b) * sizeof(DType) + 3 * batch_size * sizeof(DType*);
+    size_t temp_mem_size_gradb =
+        (bc_size_a + bc_size_out) * sizeof(DType) + 3 * batch_size * sizeof(DType*);
     size_t temp_size_grada = bc_size_a * sizeof(DType);
     size_t temp_size_gradb = bc_size_b * sizeof(DType);
-    size_t temp_mem_size = temp_mem_size_grada + temp_mem_size_gradb +
-                           temp_size_grada + temp_size_gradb;
+    size_t temp_mem_size =
+        temp_mem_size_grada + temp_mem_size_gradb + temp_size_grada + temp_size_gradb;
     Tensor<xpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(temp_mem_size), s);
     Tensor<xpu, 1, char> workspace_grada(temp_mem.dptr_, Shape1(temp_mem_size_grada), s);
-    Tensor<xpu, 1, char> workspace_gradb(workspace_grada.dptr_ + temp_mem_size_grada,
-                                         Shape1(temp_mem_size_gradb), s);
+    Tensor<xpu, 1, char> workspace_gradb(
+        workspace_grada.dptr_ + temp_mem_size_grada, Shape1(temp_mem_size_gradb), s);
     Tensor<xpu, 1, DType> temp_grada(
-      reinterpret_cast<DType*>(workspace_gradb.dptr_ + temp_mem_size_gradb),
-      Shape1(bc_size_a), s);
+        reinterpret_cast<DType*>(workspace_gradb.dptr_ + temp_mem_size_gradb),
+        Shape1(bc_size_a),
+        s);
     Tensor<xpu, 1, DType> temp_gradb(
-      reinterpret_cast<DType*>(temp_grada.dptr_ + bc_size_a),
-      Shape1(bc_size_b), s);
-    MatmulImpl<xpu, DType>(ctx, ograd, b, kWriteTo, temp_grada, workspace_grada,
-                           ndim, batch_size, bc_size_out, bc_size_b,
-                           out_shape, b_shape, grad_a_shape, false, true);
-    MatmulImpl<xpu, DType>(ctx, a, ograd, kWriteTo, temp_gradb, workspace_gradb,
-                           ndim, batch_size, bc_size_a, bc_size_out,
-                           a_shape, out_shape, grad_b_shape, true, false);
-    Kernel<SumByShape, xpu>::Launch(
-      s, a_shape.Size(), grad_a.dptr<DType>(), temp_grada.dptr_,
-      bc_size_a, a_shape.Size(), req[0]);
-    Kernel<SumByShape, xpu>::Launch(
-      s, b_shape.Size(), grad_b.dptr<DType>(), temp_gradb.dptr_,
-      bc_size_b, b_shape.Size(), req[1]);
+        reinterpret_cast<DType*>(temp_grada.dptr_ + bc_size_a), Shape1(bc_size_b), s);
+    MatmulImpl<xpu, DType>(ctx,
+                           ograd,
+                           b,
+                           kWriteTo,
+                           temp_grada,
+                           workspace_grada,
+                           ndim,
+                           batch_size,
+                           bc_size_out,
+                           bc_size_b,
+                           out_shape,
+                           b_shape,
+                           grad_a_shape,
+                           false,
+                           true);
+    MatmulImpl<xpu, DType>(ctx,
+                           a,
+                           ograd,
+                           kWriteTo,
+                           temp_gradb,
+                           workspace_gradb,
+                           ndim,
+                           batch_size,
+                           bc_size_a,
+                           bc_size_out,
+                           a_shape,
+                           out_shape,
+                           grad_b_shape,
+                           true,
+                           false);
+    Kernel<SumByShape, xpu>::Launch(s,
+                                    a_shape.Size(),
+                                    grad_a.dptr<DType>(),
+                                    temp_grada.dptr_,
+                                    bc_size_a,
+                                    a_shape.Size(),
+                                    req[0]);
+    Kernel<SumByShape, xpu>::Launch(s,
+                                    b_shape.Size(),
+                                    grad_b.dptr<DType>(),
+                                    temp_gradb.dptr_,
+                                    bc_size_b,
+                                    b_shape.Size(),
+                                    req[1]);
   });
 }
 
diff --git a/src/operator/numpy/np_matmul_op.cc b/src/operator/numpy/np_matmul_op.cc
index 192584903d7b..b7e02f96a262 100644
--- a/src/operator/numpy/np_matmul_op.cc
+++ b/src/operator/numpy/np_matmul_op.cc
@@ -29,23 +29,21 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyMatmulShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   const mxnet::TShape& a_shape = in_attrs->at(0);
   const mxnet::TShape& b_shape = in_attrs->at(1);
-  const size_t a_ndim = a_shape.ndim();
-  const size_t b_ndim = b_shape.ndim();
+  const size_t a_ndim          = a_shape.ndim();
+  const size_t b_ndim          = b_shape.ndim();
   if (!ndim_is_known(a_shape) || !ndim_is_known(b_shape)) {
     return false;
   }
 
-  CHECK_NE(a_ndim, 0)
-    << "Multiplication by scalars is not allowed.\n";
-  CHECK_NE(b_ndim, 0)
-    << "Multiplication by scalars is not allowed.\n";
+  CHECK_NE(a_ndim, 0) << "Multiplication by scalars is not allowed.\n";
+  CHECK_NE(b_ndim, 0) << "Multiplication by scalars is not allowed.\n";
 
   if (a_ndim == 1 && b_ndim == 1) {
     // case 1: both 1-D arrays, inner product of vectors
@@ -73,7 +71,7 @@ inline bool NumpyMatmulShape(const nnvm::NodeAttrs& attrs,
     tmp_shape[a_ndim - 1] = b_shape[0];
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tmp_shape);
 
-    tmp_shape = TShape(1, -1);
+    tmp_shape    = TShape(1, -1);
     tmp_shape[0] = a_shape[a_ndim - 1];
     SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_shape);
 
@@ -90,7 +88,7 @@ inline bool NumpyMatmulShape(const nnvm::NodeAttrs& attrs,
     tmp_shape[b_ndim - 2] = a_shape[0];
     SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_shape);
 
-    tmp_shape = TShape(1, -1);
+    tmp_shape    = TShape(1, -1);
     tmp_shape[0] = b_shape[b_ndim - 2];
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tmp_shape);
 
@@ -106,23 +104,21 @@ inline bool NumpyMatmulShape(const nnvm::NodeAttrs& attrs,
     TShape tmp_shape(a_ndim, -1);
     tmp_shape[a_ndim - 1] = b_shape[b_ndim - 2];
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tmp_shape);
-    tmp_shape = TShape(b_ndim, -1);
+    tmp_shape             = TShape(b_ndim, -1);
     tmp_shape[b_ndim - 2] = a_shape[a_ndim - 1];
     SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_shape);
     size_t ndim = std::max(a_ndim, b_ndim);
     mxnet::TShape out_shape(ndim, -1);
     out_shape[ndim - 1] = b_shape[b_ndim - 1];
     out_shape[ndim - 2] = a_shape[a_ndim - 2];
-    for (int p = ndim - 3, pa = a_ndim - 3, pb = b_ndim - 3;
-         p >= 0; --p, --pa, --pb) {
+    for (int p = ndim - 3, pa = a_ndim - 3, pb = b_ndim - 3; p >= 0; --p, --pa, --pb) {
       if (pa >= 0 && pb >= 0) {
         if (a_shape[pa] == 1) {
           out_shape[p] = b_shape[pb];
         } else if (b_shape[pb] == 1) {
           out_shape[p] = a_shape[pa];
         } else {
-          CHECK_EQ(a_shape[pa], b_shape[pb])
-            << "Could not be broadcast.\n";
+          CHECK_EQ(a_shape[pa], b_shape[pb]) << "Could not be broadcast.\n";
           out_shape[p] = b_shape[pb];
         }
       } else if (pa >= 0) {
@@ -137,38 +133,38 @@ inline bool NumpyMatmulShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_matmul)
-.describe(R"doc()doc" ADD_FILELINE)
-.set_num_inputs(2U)
-.set_num_outputs(1U)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"out"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyMatmulShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyMatmulForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_np_matmul"})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input");
+    .describe(R"doc()doc" ADD_FILELINE)
+    .set_num_inputs(2U)
+    .set_num_outputs(1U)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"out"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyMatmulShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyMatmulForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_np_matmul"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input");
 
 NNVM_REGISTER_OP(_backward_np_matmul)
-.set_num_inputs(3U)
-.set_num_outputs(2U)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyMatmulBackward<cpu>);
+    .set_num_inputs(3U)
+    .set_num_outputs(2U)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyMatmulBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_matmul_op.cu b/src/operator/numpy/np_matmul_op.cu
index 4655b84d82c0..8226fca54263 100644
--- a/src/operator/numpy/np_matmul_op.cu
+++ b/src/operator/numpy/np_matmul_op.cu
@@ -26,11 +26,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_matmul)
-.set_attr<FCompute>("FCompute<gpu>", NumpyMatmulForward<gpu>);
+NNVM_REGISTER_OP(_npi_matmul).set_attr<FCompute>("FCompute<gpu>", NumpyMatmulForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_np_matmul)
-.set_attr<FCompute>("FCompute<gpu>", NumpyMatmulBackward<gpu>);
+NNVM_REGISTER_OP(_backward_np_matmul).set_attr<FCompute>("FCompute<gpu>", NumpyMatmulBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_matrix_op-inl.h b/src/operator/numpy/np_matrix_op-inl.h
index daeabc5e937a..6ea289537dfc 100644
--- a/src/operator/numpy/np_matrix_op-inl.h
+++ b/src/operator/numpy/np_matrix_op-inl.h
@@ -44,9 +44,11 @@ namespace op {
 struct NumpyTransposeParam : public dmlc::Parameter<NumpyTransposeParam> {
   mxnet::TShape axes;
   DMLC_DECLARE_PARAMETER(NumpyTransposeParam) {
-    DMLC_DECLARE_FIELD(axes).set_default(mxnet::TShape(-1, 0))
-    .describe("By default, reverse the dimensions, otherwise permute "
-              "the axes according to the values given.");
+    DMLC_DECLARE_FIELD(axes)
+        .set_default(mxnet::TShape(-1, 0))
+        .describe(
+            "By default, reverse the dimensions, otherwise permute "
+            "the axes according to the values given.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axes_s;
@@ -58,8 +60,7 @@ struct NumpyTransposeParam : public dmlc::Parameter<NumpyTransposeParam> {
 struct NumpyVstackParam : public dmlc::Parameter<NumpyVstackParam> {
   int num_args;
   DMLC_DECLARE_PARAMETER(NumpyVstackParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs to be vstacked.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs to be vstacked.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_args_s;
@@ -71,8 +72,8 @@ struct NumpyVstackParam : public dmlc::Parameter<NumpyVstackParam> {
 struct NumpyColumnStackParam : public dmlc::Parameter<NumpyColumnStackParam> {
   int num_args;
   DMLC_DECLARE_PARAMETER(NumpyColumnStackParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs to be column stacked");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe(
+        "Number of inputs to be column stacked");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream ss;
@@ -85,19 +86,18 @@ struct NumpyReshapeParam : public dmlc::Parameter<NumpyReshapeParam> {
   mxnet::TShape newshape;
   std::string order;
   DMLC_DECLARE_PARAMETER(NumpyReshapeParam) {
-    DMLC_DECLARE_FIELD(newshape)
-        .describe("The new shape should be compatible with the original shape."
-                  " If an integer, then the result will be a 1-D array of that length."
-                  " One shape dimension can be -1. In this case, the value is inferred"
-                  " from the length of the array and remaining dimensions.");
-    DMLC_DECLARE_FIELD(order)
-        .set_default("C")
-        .describe("Read the elements of a using this index order, and place the elements into"
-                  " the reshaped array using this index order. 'C' means to read/write the elements"
-                  " using C-like index order, with the last axis index changing fastest,"
-                  " back to the first axis index changing slowest."
-                  " Note that currently only C-like order is"
-                  " supported");
+    DMLC_DECLARE_FIELD(newshape).describe(
+        "The new shape should be compatible with the original shape."
+        " If an integer, then the result will be a 1-D array of that length."
+        " One shape dimension can be -1. In this case, the value is inferred"
+        " from the length of the array and remaining dimensions.");
+    DMLC_DECLARE_FIELD(order).set_default("C").describe(
+        "Read the elements of a using this index order, and place the elements into"
+        " the reshaped array using this index order. 'C' means to read/write the elements"
+        " using C-like index order, with the last axis index changing fastest,"
+        " back to the first axis index changing slowest."
+        " Note that currently only C-like order is"
+        " supported");
   }
 };
 
@@ -106,30 +106,28 @@ struct NumpyXReshapeParam : public dmlc::Parameter<NumpyXReshapeParam> {
   bool reverse;
   std::string order;
   DMLC_DECLARE_PARAMETER(NumpyXReshapeParam) {
-    DMLC_DECLARE_FIELD(newshape)
-        .describe("The new shape should be compatible with the original shape."
-                  " If an integer, then the result will be a 1-D array of that length."
-                  " One shape dimension can be -1. In this case, the value is inferred"
-                  " from the length of the array and remaining dimensions."
-                  " -2 to -6 are used for data manipulation."
-                  " -2 copy this dimension from the input to the output shape."
-                  " -3 will skip current dimension if and only if the current dim size is one."
-                  " -4 copy all remain of the input dimensions to the output shape."
-                  " -5 use the product of two consecutive dimensions of the input"
-                  " shape as the output."
-                  " -6 split one dimension of the input into two dimensions passed"
-                  " subsequent to -6 in the new shape.");
-    DMLC_DECLARE_FIELD(reverse)
-        .set_default(false)
-        .describe("If true then the special values are inferred from right to left");
-    DMLC_DECLARE_FIELD(order)
-        .set_default("C")
-        .describe("Read the elements of a using this index order, and place the elements into"
-                  " the reshaped array using this index order. 'C' means to read/write the elements"
-                  " using C-like index order, with the last axis index changing fastest,"
-                  " back to the first axis index changing slowest."
-                  " Note that currently only C-like order is"
-                  " supported");
+    DMLC_DECLARE_FIELD(newshape).describe(
+        "The new shape should be compatible with the original shape."
+        " If an integer, then the result will be a 1-D array of that length."
+        " One shape dimension can be -1. In this case, the value is inferred"
+        " from the length of the array and remaining dimensions."
+        " -2 to -6 are used for data manipulation."
+        " -2 copy this dimension from the input to the output shape."
+        " -3 will skip current dimension if and only if the current dim size is one."
+        " -4 copy all remain of the input dimensions to the output shape."
+        " -5 use the product of two consecutive dimensions of the input"
+        " shape as the output."
+        " -6 split one dimension of the input into two dimensions passed"
+        " subsequent to -6 in the new shape.");
+    DMLC_DECLARE_FIELD(reverse).set_default(false).describe(
+        "If true then the special values are inferred from right to left");
+    DMLC_DECLARE_FIELD(order).set_default("C").describe(
+        "Read the elements of a using this index order, and place the elements into"
+        " the reshaped array using this index order. 'C' means to read/write the elements"
+        " using C-like index order, with the last axis index changing fastest,"
+        " back to the first axis index changing slowest."
+        " Note that currently only C-like order is"
+        " supported");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream newshape_s, reverse_s, order_s;
@@ -137,20 +135,20 @@ struct NumpyXReshapeParam : public dmlc::Parameter<NumpyXReshapeParam> {
     reverse_s << reverse;
     order_s << order;
     (*dict)["newshape"] = newshape_s.str();
-    (*dict)["reverse"] = reverse_s.str();
-    (*dict)["order"] = order_s.str();
+    (*dict)["reverse"]  = reverse_s.str();
+    (*dict)["order"]    = order_s.str();
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyTranspose(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
                     const std::vector<OpReqType>& req,
                     const std::vector<TBlob>& outputs) {
-  if (req[0] == kNullOp) return;
-  CHECK(req[0] == kWriteTo || req[0] == kAddTo)
-      << "Transpose does not support inplace";
+  if (req[0] == kNullOp)
+    return;
+  CHECK(req[0] == kWriteTo || req[0] == kAddTo) << "Transpose does not support inplace";
   const NumpyTransposeParam& param = nnvm::get<NumpyTransposeParam>(attrs.parsed);
   mxnet::TShape axes;
   if (ndim_is_known(param.axes)) {
@@ -161,18 +159,15 @@ void NumpyTranspose(const nnvm::NodeAttrs& attrs,
       axes[i] = axes.ndim() - 1 - i;
     }
   }
-  mshadow::Tensor<xpu, 1, dim_t> workspace =
-    GetTransposeExWorkspace<xpu>(ctx, axes);
+  mshadow::Tensor<xpu, 1, dim_t> workspace = GetTransposeExWorkspace<xpu>(ctx, axes);
   if (req[0] == kAddTo) {
-    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   } else {
-    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyColumnStackForward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -191,7 +186,7 @@ void NumpyColumnStackForward(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < param.num_args; i++) {
     if (inputs[i].shape_.ndim() == 0 || inputs[i].shape_.ndim() == 1) {
       TShape shape = Shape2(inputs[i].shape_.Size(), 1);
-      data[i] = inputs[i].reshape(shape);
+      data[i]      = inputs[i].reshape(shape);
     } else {
       data[i] = inputs[i];
     }
@@ -200,7 +195,7 @@ void NumpyColumnStackForward(const nnvm::NodeAttrs& attrs,
   // initialize ConcatOp
   ConcatParam cparam;
   cparam.num_args = param.num_args;
-  cparam.dim = 1;
+  cparam.dim      = 1;
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     ConcatOp<xpu, DType> op;
     op.Init(cparam);
@@ -208,7 +203,7 @@ void NumpyColumnStackForward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyColumnStackBackward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -227,7 +222,7 @@ void NumpyColumnStackBackward(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < param.num_args; i++) {
     if (outputs[i].shape_.ndim() == 0 || outputs[i].shape_.ndim() == 1) {
       TShape shape = Shape2(outputs[i].shape_.Size(), 1);
-      data[i] = outputs[i].reshape(shape);
+      data[i]      = outputs[i].reshape(shape);
     } else {
       data[i] = outputs[i];
     }
@@ -236,7 +231,7 @@ void NumpyColumnStackBackward(const nnvm::NodeAttrs& attrs,
   // initialize ConcatOp
   ConcatParam cparam;
   cparam.num_args = param.num_args;
-  cparam.dim = 1;
+  cparam.dim      = 1;
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     ConcatOp<xpu, DType> op;
     op.Init(cparam);
@@ -244,7 +239,7 @@ void NumpyColumnStackBackward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyVstackForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -263,7 +258,7 @@ void NumpyVstackForward(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < param.num_args; i++) {
     if (inputs[i].shape_.ndim() == 0 || inputs[i].shape_.ndim() == 1) {
       TShape shape = Shape2(1, inputs[i].shape_.Size());
-      data[i] = inputs[i].reshape(shape);
+      data[i]      = inputs[i].reshape(shape);
     } else {
       data[i] = inputs[i];
     }
@@ -272,7 +267,7 @@ void NumpyVstackForward(const nnvm::NodeAttrs& attrs,
   // initialize ConcatOp
   ConcatParam cparam;
   cparam.num_args = param.num_args;
-  cparam.dim = 0;
+  cparam.dim      = 0;
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     ConcatOp<xpu, DType> op;
     op.Init(cparam);
@@ -280,7 +275,7 @@ void NumpyVstackForward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyVstackBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -299,7 +294,7 @@ void NumpyVstackBackward(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < param.num_args; i++) {
     if (outputs[i].shape_.ndim() == 0 || outputs[i].shape_.ndim() == 1) {
       TShape shape = Shape2(1, outputs[i].shape_.Size());
-      data[i] = outputs[i].reshape(shape);
+      data[i]      = outputs[i].reshape(shape);
     } else {
       data[i] = outputs[i];
     }
@@ -308,7 +303,7 @@ void NumpyVstackBackward(const nnvm::NodeAttrs& attrs,
   // initialize ConcatOp
   ConcatParam cparam;
   cparam.num_args = param.num_args;
-  cparam.dim = 0;
+  cparam.dim      = 0;
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     ConcatOp<xpu, DType> op;
     op.Init(cparam);
@@ -321,16 +316,14 @@ struct NumpyTrilindicesParam : public dmlc::Parameter<NumpyTrilindicesParam> {
   index_t k;
   index_t m;
   DMLC_DECLARE_PARAMETER(NumpyTrilindicesParam) {
-    DMLC_DECLARE_FIELD(n)
-      .describe("The row dimension of the arrays for which"
-                "the returned indices will be valid.");
-    DMLC_DECLARE_FIELD(k)
-      .set_default(0)
-      .describe("Diagonal offset");
-    DMLC_DECLARE_FIELD(m)
-      .describe("The column dimension of the arrays for "
-                "which the returned arrays will be valid."
-                "By default m is taken equal to n.");
+    DMLC_DECLARE_FIELD(n).describe(
+        "The row dimension of the arrays for which"
+        "the returned indices will be valid.");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe("Diagonal offset");
+    DMLC_DECLARE_FIELD(m).describe(
+        "The column dimension of the arrays for "
+        "which the returned arrays will be valid."
+        "By default m is taken equal to n.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream n_s, k_s, m_s;
@@ -343,17 +336,20 @@ struct NumpyTrilindicesParam : public dmlc::Parameter<NumpyTrilindicesParam> {
   }
 };
 
-template<int req>
+template <int req>
 struct TrilindicesOpForwardImpl {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data0, DType* out_data1,
-                                  index_t* data, index_t length) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data0,
+                                  DType* out_data1,
+                                  index_t* data,
+                                  index_t length) {
     KERNEL_ASSIGN(out_data0[i], req, data[i]);
     KERNEL_ASSIGN(out_data1[i], req, data[i + length]);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void TrilindicesOpForward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -363,9 +359,8 @@ void TrilindicesOpForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 0U);
   CHECK_EQ(outputs.size(), 2U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const NumpyTrilindicesParam& param =
-    nnvm::get<NumpyTrilindicesParam>(attrs.parsed);
+  Stream<xpu>* s                     = ctx.get_stream<xpu>();
+  const NumpyTrilindicesParam& param = nnvm::get<NumpyTrilindicesParam>(attrs.parsed);
 
   const TBlob& out_data0 = outputs[0];
   const TBlob& out_data1 = outputs[1];
@@ -376,7 +371,7 @@ void TrilindicesOpForward(const nnvm::NodeAttrs& attrs,
   std::vector<index_t> indices_cpu(2 * length, 0);
   size_t total_temp_size = 2 * length * sizeof(index_t);
   Tensor<xpu, 1, char> temp_space =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(total_temp_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(total_temp_size), s);
   index_t* indices = reinterpret_cast<index_t*>(temp_space.dptr_);
 
   index_t n = param.n;
@@ -387,7 +382,7 @@ void TrilindicesOpForward(const nnvm::NodeAttrs& attrs,
   index_t idx = 0;
   for (index_t i = 0; i < n; i++) {
     for (index_t j = 0; j <= std::min(end, m - 1); j++) {
-      indices_cpu[idx] = i;
+      indices_cpu[idx]          = i;
       indices_cpu[idx + length] = j;
       idx++;
     }
@@ -395,14 +390,15 @@ void TrilindicesOpForward(const nnvm::NodeAttrs& attrs,
   }
 
   if (ctx.run_ctx.ctx.dev_mask() == gpu::kDevMask) {
-  #if MXNET_USE_CUDA
-    cudaMemcpyAsync(indices, indices_cpu.data(),
+#if MXNET_USE_CUDA
+    cudaMemcpyAsync(indices,
+                    indices_cpu.data(),
                     indices_cpu.size() * sizeof(index_t),
                     cudaMemcpyHostToDevice,
                     Stream<gpu>::GetStream(ctx.get_stream<gpu>()));
-  #else
+#else
     LOG(FATAL) << "Illegal attempt to use GPU in a CPU-only build";
-  #endif
+#endif
   } else {
     std::memcpy(indices, indices_cpu.data(), indices_cpu.size() * sizeof(index_t));
   }
@@ -410,8 +406,7 @@ void TrilindicesOpForward(const nnvm::NodeAttrs& attrs,
   MSHADOW_IDX_TYPE_SWITCH(out_data0.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       Kernel<TrilindicesOpForwardImpl<req_type>, xpu>::Launch(
-          s, length, out_data0.dptr<DType>(), out_data1.dptr<DType>(),
-           indices, length);
+          s, length, out_data0.dptr<DType>(), out_data1.dptr<DType>(), indices, length);
     });
   });
 }
@@ -421,39 +416,46 @@ struct NumpyRollParam : public dmlc::Parameter<NumpyRollParam> {
   dmlc::optional<mxnet::TShape> axis;
   DMLC_DECLARE_PARAMETER(NumpyRollParam) {
     DMLC_DECLARE_FIELD(shift)
-    .set_default(dmlc::optional<mxnet::TShape>())
-    .describe("The number of places by which elements are shifted. If a tuple,"
-              "then axis must be a tuple of the same size, and each of the given axes is shifted"
-              "by the corresponding number. If an int while axis is a tuple of ints, "
-              "then the same value is used for all given axes.");
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe(
+            "The number of places by which elements are shifted. If a tuple,"
+            "then axis must be a tuple of the same size, and each of the given axes is shifted"
+            "by the corresponding number. If an int while axis is a tuple of ints, "
+            "then the same value is used for all given axes.");
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<mxnet::TShape>())
-    .describe("Axis or axes along which elements are shifted. By default, the array is flattened"
-              "before shifting, after which the original shape is restored.");
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe(
+            "Axis or axes along which elements are shifted. By default, the array is flattened"
+            "before shifting, after which the original shape is restored.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream shift_s, axis_s;
     shift_s << shift;
     axis_s << axis;
     (*dict)["shift"] = shift_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]  = axis_s.str();
   }
 };
 
-template<int req>
+template <int req>
 struct RollAxisNone_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const index_t size, const index_t shift) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const index_t size,
+                                  const index_t shift) {
     index_t new_index = i - shift < 0 ? i - shift + size : i - shift;
     KERNEL_ASSIGN(out_data[i], req, in_data[new_index]);
   }
 };
 
-template<int req>
+template <int req>
 struct RollAxis_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
                                   const size_t* new_index) {
     KERNEL_ASSIGN(out_data[i], req, in_data[new_index[i]]);
   }
@@ -462,7 +464,9 @@ struct RollAxis_forward {
 inline void RollDfs(const std::vector<std::vector<size_t>>& new_axes,
                     const std::vector<size_t>& value,
                     std::vector<size_t>* new_index,
-                    index_t index, int ndim, index_t mid) {
+                    index_t index,
+                    int ndim,
+                    index_t mid) {
   for (int a : new_axes[index]) {
     if (index == ndim - 1) {
       std::vector<size_t>& out = (*new_index);
@@ -475,7 +479,7 @@ inline void RollDfs(const std::vector<std::vector<size_t>>& new_axes,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyRollCompute(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -485,23 +489,27 @@ void NumpyRollCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (inputs[0].Size() == 0U) return;
+  if (inputs[0].Size() == 0U)
+    return;
   const NumpyRollParam& param = nnvm::get<NumpyRollParam>(attrs.parsed);
   const int ndim(inputs[0].shape_.ndim());
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   std::vector<index_t> shifts(ndim, 0);
   index_t input_size = inputs[0].Size();
   if (!param.axis.has_value()) {
     index_t shift = param.shift.value()[0];
-    shift = shift % input_size;
+    shift         = shift % input_size;
     if (shift < 0) {
       shift += inputs[0].shape_.Size();
     }
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<RollAxisNone_forward<req_type>, xpu>::Launch(
-            s, outputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>(),
-            inputs[0].Size(), shift);
+        Kernel<RollAxisNone_forward<req_type>, xpu>::Launch(s,
+                                                            outputs[0].Size(),
+                                                            outputs[0].dptr<DType>(),
+                                                            inputs[0].dptr<DType>(),
+                                                            inputs[0].Size(),
+                                                            shift);
       });
     });
   } else {
@@ -512,12 +520,10 @@ void NumpyRollCompute(const nnvm::NodeAttrs& attrs,
       }
     }
     for (int i = 0; i < axes.ndim(); ++i) {
-      CHECK_LT(axes[i], ndim)
-        << "axis " << axes[i]
-        << " Exceeds input dimensions " << inputs[0].shape_;
-      CHECK_GE(axes[0], 0)
-        << "Reduction axis " << param.axis.value()
-        << " Exceeds input dimensions " << inputs[0].shape_;
+      CHECK_LT(axes[i], ndim) << "axis " << axes[i] << " Exceeds input dimensions "
+                              << inputs[0].shape_;
+      CHECK_GE(axes[0], 0) << "Reduction axis " << param.axis.value()
+                           << " Exceeds input dimensions " << inputs[0].shape_;
     }
     if (param.shift.value().ndim() == 1) {
       for (int i = 0; i < axes.ndim(); ++i) {
@@ -566,14 +572,16 @@ void NumpyRollCompute(const nnvm::NodeAttrs& attrs,
     Tensor<xpu, 1, char> workspace =
         ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
     Tensor<cpu, 1, size_t> index_cpu_tensor(new_index.data(), Shape1(new_index.size()));
-    Tensor<xpu, 1, size_t> index_xpu_tensor(
-        reinterpret_cast<size_t*>(workspace.dptr_), Shape1(new_index.size()));
+    Tensor<xpu, 1, size_t> index_xpu_tensor(reinterpret_cast<size_t*>(workspace.dptr_),
+                                            Shape1(new_index.size()));
     mshadow::Copy(index_xpu_tensor, index_cpu_tensor, s);
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<RollAxis_forward<req_type>, xpu>::Launch(
-            s, outputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>(),
-            index_xpu_tensor.dptr_);
+        Kernel<RollAxis_forward<req_type>, xpu>::Launch(s,
+                                                        outputs[0].Size(),
+                                                        outputs[0].dptr<DType>(),
+                                                        inputs[0].dptr<DType>(),
+                                                        index_xpu_tensor.dptr_);
       });
     });
   }
@@ -582,8 +590,7 @@ void NumpyRollCompute(const nnvm::NodeAttrs& attrs,
 struct FlipParam : public dmlc::Parameter<FlipParam> {
   mxnet::Tuple<int> axis;
   DMLC_DECLARE_PARAMETER(FlipParam) {
-      DMLC_DECLARE_FIELD(axis)
-          .describe("The axis which to flip elements.");
+    DMLC_DECLARE_FIELD(axis).describe("The axis which to flip elements.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -596,7 +603,7 @@ struct FlipParam : public dmlc::Parameter<FlipParam> {
 #define FLIP_MAX_DIM 10
 #define FLIP_MIN_DIM -1
 
-template<typename xpu>
+template <typename xpu>
 void NumpyFlipForwardImpl(const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
                           const std::vector<TBlob>& outputs,
@@ -604,7 +611,7 @@ void NumpyFlipForwardImpl(const OpContext& ctx,
                           const std::vector<index_t>& trailing_,
                           const index_t& flip_index);
 
-template<typename xpu>
+template <typename xpu>
 void NumpyFlipForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -617,10 +624,10 @@ void NumpyFlipForward(const nnvm::NodeAttrs& attrs,
   CHECK_GE(param.axis.ndim(), FLIP_MIN_DIM);
   if (param.axis.ndim() == FLIP_MIN_DIM) {
     if (inputs[0].shape_.ndim() == 0) {
-      mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+      mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
       MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
         mshadow::Copy(outputs[0].FlatTo1D<xpu, DType>(s), inputs[0].FlatTo1D<xpu, DType>(s), s);
-    });
+      });
       return;
     }
     std::vector<int> temp;
@@ -637,15 +644,15 @@ void NumpyFlipForward(const nnvm::NodeAttrs& attrs,
     return;  // zero shape
   }
   std::vector<index_t> stride_(axistemp.ndim());
-  std::vector<index_t>  trailing_(axistemp.ndim());
+  std::vector<index_t> trailing_(axistemp.ndim());
   index_t flip_index = 0;
   for (int axis : axistemp) {
-    CHECK_LT(axis, ishape.ndim()) << "axis " << axis
-      << " is out of bounds for array of dimension " << ishape.ndim() << std::endl;
-    CHECK_GE(axis, -ishape.ndim()) << "axis" << axis
-      << " is out of bounds for array of dimension " << ishape.ndim() << std::endl;
-    axis = (axis < 0) ? axis + ishape.ndim() : axis;
-    stride_[flip_index] = ishape[axis];
+    CHECK_LT(axis, ishape.ndim()) << "axis " << axis << " is out of bounds for array of dimension "
+                                  << ishape.ndim() << std::endl;
+    CHECK_GE(axis, -ishape.ndim()) << "axis" << axis << " is out of bounds for array of dimension "
+                                   << ishape.ndim() << std::endl;
+    axis                  = (axis < 0) ? axis + ishape.ndim() : axis;
+    stride_[flip_index]   = ishape[axis];
     trailing_[flip_index] = 1;
     for (int i2 = axis + 1; i2 < ishape.ndim(); ++i2) {
       trailing_[flip_index] *= ishape[i2];
@@ -659,26 +666,23 @@ struct NumpyRollaxisParam : public dmlc::Parameter<NumpyRollaxisParam> {
   int axis;
   int start;
   DMLC_DECLARE_PARAMETER(NumpyRollaxisParam) {
-    DMLC_DECLARE_FIELD(axis)
-    .describe("The axis to roll backwards. "
-    "The positions of the other axes do not change relative to one another.");
-    DMLC_DECLARE_FIELD(start)
-    .set_default(0)
-    .describe("The axis is rolled until it lies before this position. "
-              "The default, 0, results in a “complete” roll.");
+    DMLC_DECLARE_FIELD(axis).describe(
+        "The axis to roll backwards. "
+        "The positions of the other axes do not change relative to one another.");
+    DMLC_DECLARE_FIELD(start).set_default(0).describe(
+        "The axis is rolled until it lies before this position. "
+        "The default, 0, results in a “complete” roll.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, start_s;
     axis_s << axis;
     start_s << start;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]  = axis_s.str();
     (*dict)["start"] = start_s.str();
   }
 };
 
-inline mxnet::TShape NumpyRollaxisShapeImpl(int axis,
-                                            int start,
-                                            const int& ndim) {
+inline mxnet::TShape NumpyRollaxisShapeImpl(int axis, int start, const int& ndim) {
   mxnet::TShape axes(ndim, -1);
   if (axis < 0) {
     axis += ndim;
@@ -707,23 +711,23 @@ struct NumpyMoveaxisParam : public dmlc::Parameter<NumpyMoveaxisParam> {
   mxnet::TShape source;
   mxnet::TShape destination;
   DMLC_DECLARE_PARAMETER(NumpyMoveaxisParam) {
-    DMLC_DECLARE_FIELD(source)
-    .describe("Original positions of the axes to move. These must be unique.");
+    DMLC_DECLARE_FIELD(source).describe(
+        "Original positions of the axes to move. These must be unique.");
     DMLC_DECLARE_FIELD(destination)
-    .describe("Destination positions for each of the original axes. "
-              "These must also be unique.");
+        .describe(
+            "Destination positions for each of the original axes. "
+            "These must also be unique.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream source_s, destination_s;
     source_s << source;
     destination_s << destination;
-    (*dict)["source"] = source_s.str();
+    (*dict)["source"]      = source_s.str();
     (*dict)["destination"] = destination_s.str();
   }
 };
 
-inline mxnet::TShape NumpyMoveaxisShapeImpl(const nnvm::NodeAttrs& attrs,
-                                            const int& ndim) {
+inline mxnet::TShape NumpyMoveaxisShapeImpl(const nnvm::NodeAttrs& attrs, const int& ndim) {
   const NumpyMoveaxisParam& param = nnvm::get<NumpyMoveaxisParam>(attrs.parsed);
   mxnet::TShape axes(ndim, -1);
   std::vector<bool> state_axes(ndim, false);
@@ -748,22 +752,20 @@ inline mxnet::TShape NumpyMoveaxisShapeImpl(const nnvm::NodeAttrs& attrs,
   if (ndim > 1) {
     for (int i = 0; i < param.source.ndim() - 1; ++i) {
       for (int j = i + 1; j < param.source.ndim(); ++j) {
-        CHECK_NE(real_src[i], real_src[j])
-          << "repeated axis in `source` argument";
-        CHECK_NE(real_des[i], real_des[j])
-          << "repeated axis in `destination` argument";
+        CHECK_NE(real_src[i], real_src[j]) << "repeated axis in `source` argument";
+        CHECK_NE(real_des[i], real_des[j]) << "repeated axis in `destination` argument";
       }
     }
   }
   for (int i = 0; i < param.source.ndim(); ++i) {
-    axes[real_des[i]] = real_src[i];
+    axes[real_des[i]]       = real_src[i];
     state_axes[real_src[i]] = true;
   }
   for (int i = 0; i < axes.ndim(); ++i) {
     if (axes[i] < 0) {
       for (int j = 0; j < axes.ndim(); ++j) {
         if (state_axes[j] == false) {
-          axes[i] = j;
+          axes[i]       = j;
           state_axes[j] = true;
           break;
         }
@@ -773,7 +775,7 @@ inline mxnet::TShape NumpyMoveaxisShapeImpl(const nnvm::NodeAttrs& attrs,
   return axes;
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyMoveaxisCompute(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -785,8 +787,7 @@ void NumpyMoveaxisCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req[0], kWriteTo) << "Moveaxis does not support inplace";
-  CHECK_EQ(param.source.ndim(), param.destination.ndim())
-    << "source and destination not equal.";
+  CHECK_EQ(param.source.ndim(), param.destination.ndim()) << "source and destination not equal.";
   mxnet::TShape axes;
   axes = NumpyMoveaxisShapeImpl(attrs, inputs[0].ndim());
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, Dtype, {
@@ -794,7 +795,7 @@ void NumpyMoveaxisCompute(const nnvm::NodeAttrs& attrs,
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyRollaxisCompute(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -804,38 +805,35 @@ void NumpyRollaxisCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
-  CHECK(req[0] == kWriteTo || req[0] == kAddTo)
-      << "Rollaxis does not support inplace";
+  if (req[0] == kNullOp)
+    return;
+  CHECK(req[0] == kWriteTo || req[0] == kAddTo) << "Rollaxis does not support inplace";
   const NumpyRollaxisParam& param = nnvm::get<NumpyRollaxisParam>(attrs.parsed);
   mxnet::TShape axes = NumpyRollaxisShapeImpl(param.axis, param.start, inputs[0].ndim());
 
-  mshadow::Tensor<xpu, 1, dim_t> workspace =
-    GetTransposeExWorkspace<xpu>(ctx, axes);
+  mshadow::Tensor<xpu, 1, dim_t> workspace = GetTransposeExWorkspace<xpu>(ctx, axes);
   if (req[0] == kAddTo) {
-    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   } else {
-    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   }
 }
 
-template<typename xpu>
-void NumpyRollaxisBackward(const nnvm::NodeAttrs &attrs,
-                            const OpContext &ctx,
-                            const std::vector<TBlob> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<TBlob> &outputs) {
+template <typename xpu>
+void NumpyRollaxisBackward(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  if (req[0] == kNullOp) return;
-  CHECK(req[0] == kWriteTo || req[0] == kAddTo)
-      << "Rollaxis Backward does not support inplace";
+  if (req[0] == kNullOp)
+    return;
+  CHECK(req[0] == kWriteTo || req[0] == kAddTo) << "Rollaxis Backward does not support inplace";
   const NumpyRollaxisParam& param = nnvm::get<NumpyRollaxisParam>(attrs.parsed);
-  int axis_origin = param.axis;
-  int start_origin = param.start;
-  int ndim = inputs[0].ndim();
+  int axis_origin                 = param.axis;
+  int start_origin                = param.start;
+  int ndim                        = inputs[0].ndim();
 
   int axis;
   int start;
@@ -849,22 +847,19 @@ void NumpyRollaxisBackward(const nnvm::NodeAttrs &attrs,
   }
 
   if (axis_origin < start_origin) {
-    axis = start_origin - 1;
+    axis  = start_origin - 1;
     start = axis_origin;
   } else {
-    axis = start_origin;
+    axis  = start_origin;
     start = axis_origin + 1;
   }
   mxnet::TShape axes = NumpyRollaxisShapeImpl(axis, start, inputs[0].ndim());
 
-  mshadow::Tensor<xpu, 1, dim_t> workspace =
-    GetTransposeExWorkspace<xpu>(ctx, axes);
+  mshadow::Tensor<xpu, 1, dim_t> workspace = GetTransposeExWorkspace<xpu>(ctx, axes);
   if (req[0] == kAddTo) {
-    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   } else {
-    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   }
 }
 
@@ -872,18 +867,18 @@ struct NumpyRot90Param : public dmlc::Parameter<NumpyRot90Param> {
   int k;
   dmlc::optional<mxnet::TShape> axes;
   DMLC_DECLARE_PARAMETER(NumpyRot90Param) {
-    DMLC_DECLARE_FIELD(k)
-    .set_default(1)
-    .describe("Number of times the array is rotated by 90 degrees.");
+    DMLC_DECLARE_FIELD(k).set_default(1).describe(
+        "Number of times the array is rotated by 90 degrees.");
     DMLC_DECLARE_FIELD(axes)
-    .set_default(dmlc::optional<mxnet::TShape>())
-    .describe(" The array is rotated in the plane defined by the axes. Axes must be different.");
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe(
+            " The array is rotated in the plane defined by the axes. Axes must be different.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream k_s, axes_s;
     k_s << k;
     axes_s << axes;
-    (*dict)["k"] = k_s.str();
+    (*dict)["k"]    = k_s.str();
     (*dict)["axes"] = axes_s.str();
   }
 };
@@ -891,45 +886,49 @@ struct NumpyRot90Param : public dmlc::Parameter<NumpyRot90Param> {
 struct rot90reverse {
   MSHADOW_XINLINE static index_t ReverseIndex(index_t idx,
                                               index_t nreversedim,
-                                              const index_t * stride_,
-                                              const index_t * trailing_) {
+                                              const index_t* stride_,
+                                              const index_t* trailing_) {
     index_t outputIndex = idx;
     for (index_t i = 0; i < nreversedim; ++i) {
       const index_t low = outputIndex % trailing_[i];
-      index_t high = outputIndex / trailing_[i];
-      const index_t x = high % stride_[i];
+      index_t high      = outputIndex / trailing_[i];
+      const index_t x   = high % stride_[i];
       high /= stride_[i];
       outputIndex = (high * stride_[i] + stride_[i] - 1 - x) * trailing_[i] + low;
     }
     return outputIndex;
   }
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t index, index_t nreversedim, const DType *src, DType *dst,
-                                  const index_t * stride_,
-                                  const index_t * trailing_) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t index,
+                                  index_t nreversedim,
+                                  const DType* src,
+                                  DType* dst,
+                                  const index_t* stride_,
+                                  const index_t* trailing_) {
     index_t new_idx = ReverseIndex(index, nreversedim, stride_, trailing_);
-    dst[new_idx] = src[index];
+    dst[new_idx]    = src[index];
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyRot90ComputeFlipIml(const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
                               const std::vector<OpReqType>& req,
                               const std::vector<TBlob>& outputs,
-                              const index_t axis0, const index_t axis1) {
+                              const index_t axis0,
+                              const index_t axis1) {
   using namespace mshadow;
   using namespace mxnet_op;
 
   const mxnet::TShape& ishape = inputs[0].shape_;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
 
   std::vector<index_t> stride_(2);
-  std::vector<index_t>  trailing_(2);
+  std::vector<index_t> trailing_(2);
   index_t reverse_index = 0;
   std::vector<index_t> temp{axis0, axis1};
   for (int axis : temp) {
-    stride_[reverse_index] = ishape[axis];
+    stride_[reverse_index]   = ishape[axis];
     trailing_[reverse_index] = 1;
     for (int i2 = axis + 1; i2 < ishape.ndim(); ++i2) {
       trailing_[reverse_index] *= ishape[i2];
@@ -941,8 +940,8 @@ void NumpyRot90ComputeFlipIml(const OpContext& ctx,
   Tensor<xpu, 1, char> workspace =
       ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(2 * workspace_size), s);
   Tensor<cpu, 1, index_t> stride_cpu_tensor(stride_.data(), Shape1(stride_.size()));
-  Tensor<xpu, 1, index_t> stride_xpu_tensor(
-      reinterpret_cast<index_t*>(workspace.dptr_), Shape1(stride_.size()));
+  Tensor<xpu, 1, index_t> stride_xpu_tensor(reinterpret_cast<index_t*>(workspace.dptr_),
+                                            Shape1(stride_.size()));
   Tensor<cpu, 1, index_t> trailing_cpu_tensor(trailing_.data(), Shape1(trailing_.size()));
   Tensor<xpu, 1, index_t> trailing_xpu_tensor(
       reinterpret_cast<index_t*>(workspace.dptr_ + workspace_size), Shape1(trailing_.size()));
@@ -950,9 +949,13 @@ void NumpyRot90ComputeFlipIml(const OpContext& ctx,
   mshadow::Copy(stride_xpu_tensor, stride_cpu_tensor, s);
   mshadow::Copy(trailing_xpu_tensor, trailing_cpu_tensor, s);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Kernel<rot90reverse, xpu>::Launch(s, inputs[0].Size(), reverse_index,
-                                      inputs[0].dptr<DType>(), outputs[0].dptr<DType>(),
-                                      stride_xpu_tensor.dptr_, trailing_xpu_tensor.dptr_);
+    Kernel<rot90reverse, xpu>::Launch(s,
+                                      inputs[0].Size(),
+                                      reverse_index,
+                                      inputs[0].dptr<DType>(),
+                                      outputs[0].dptr<DType>(),
+                                      stride_xpu_tensor.dptr_,
+                                      trailing_xpu_tensor.dptr_);
   });
 }
 
@@ -961,24 +964,26 @@ struct rot90Transreverse {
                                               const index_t stride_,
                                               const index_t trailing_) {
     index_t outputIndex = idx;
-    const index_t low = outputIndex % trailing_;
-    index_t high = outputIndex / trailing_;
-    const index_t x = high % stride_;
+    const index_t low   = outputIndex % trailing_;
+    index_t high        = outputIndex / trailing_;
+    const index_t x     = high % stride_;
     high /= stride_;
     outputIndex = (high * stride_ + stride_ - 1 - x) * trailing_ + low;
 
     return outputIndex;
   }
-  template<typename DType>
-  MSHADOW_XINLINE  static void Map(index_t index, const DType *src, DType *dst,
-                                   const index_t  stride_,
-                                   const index_t  trailing_) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t index,
+                                  const DType* src,
+                                  DType* dst,
+                                  const index_t stride_,
+                                  const index_t trailing_) {
     index_t new_idx = ReverseIndex(index, stride_, trailing_);
-    dst[new_idx] = src[index];
+    dst[new_idx]    = src[index];
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyRot90ComputeFlipTransposeIml(const OpContext& ctx,
                                        const std::vector<TBlob>& inputs,
                                        const std::vector<OpReqType>& req,
@@ -989,12 +994,12 @@ void NumpyRot90ComputeFlipTransposeIml(const OpContext& ctx,
   using namespace mxnet_op;
 
   const mxnet::TShape& ishape = inputs[0].shape_;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
 
   index_t stride_;
   index_t trailing_;
 
-  stride_ = ishape[axis];
+  stride_   = ishape[axis];
   trailing_ = 1;
   for (int i2 = axis + 1; i2 < ishape.ndim(); ++i2) {
     trailing_ *= ishape[i2];
@@ -1005,16 +1010,14 @@ void NumpyRot90ComputeFlipTransposeIml(const OpContext& ctx,
     Tensor<xpu, 1, char> workspace =
         ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
     DType* data_ptr = reinterpret_cast<DType*>(workspace.dptr_);
-    TBlob mid_data = TBlob(data_ptr, inputs[0].shape_, xpu::kDevMask);
-    Kernel<rot90Transreverse, xpu>::Launch(s, inputs[0].Size(), inputs[0].dptr<DType>(),
-                                           mid_data.dptr<DType>(),
-                                           stride_, trailing_);
+    TBlob mid_data  = TBlob(data_ptr, inputs[0].shape_, xpu::kDevMask);
+    Kernel<rot90Transreverse, xpu>::Launch(
+        s, inputs[0].Size(), inputs[0].dptr<DType>(), mid_data.dptr<DType>(), stride_, trailing_);
     mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, mid_data, outputs[0], axes_list);
   });
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void NumpyRot90ComputeTransposeFlipIml(const OpContext& ctx,
                                        const std::vector<TBlob>& inputs,
                                        const std::vector<OpReqType>& req,
@@ -1024,7 +1027,7 @@ void NumpyRot90ComputeTransposeFlipIml(const OpContext& ctx,
   using namespace mshadow;
   using namespace mxnet_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     index_t workspace_size = inputs[0].Size() * sizeof(DType);
@@ -1037,26 +1040,25 @@ void NumpyRot90ComputeTransposeFlipIml(const OpContext& ctx,
 
     index_t stride_;
     index_t trailing_;
-    stride_ = mid_shape[axis];
+    stride_   = mid_shape[axis];
     trailing_ = 1;
     for (int i2 = axis + 1; i2 < mid_shape.ndim(); ++i2) {
       trailing_ *= mid_shape[i2];
     }
-    Kernel<rot90Transreverse, xpu>::Launch(s, mid_data.Size(), mid_data.dptr<DType>(),
-                                           outputs[0].dptr<DType>(),
-                                           stride_, trailing_);
+    Kernel<rot90Transreverse, xpu>::Launch(
+        s, mid_data.Size(), mid_data.dptr<DType>(), outputs[0].dptr<DType>(), stride_, trailing_);
   });
 }
 
-template<int req>
+template <int req>
 struct rot90 {
-  template<typename DType>
-  MSHADOW_XINLINE  static void Map(index_t i, const DType *in_data, DType *out_data) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, const DType* in_data, DType* out_data) {
     KERNEL_ASSIGN(out_data[i], req, in_data[i]);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyRot90Compute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -1068,8 +1070,9 @@ void NumpyRot90Compute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs[0].type_flag_, outputs[0].type_flag_);
-  if (outputs[0].Size() == 0) return;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (outputs[0].Size() == 0)
+    return;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   int real_k(param.k);
   real_k = real_k % 4;
@@ -1087,8 +1090,8 @@ void NumpyRot90Compute(const nnvm::NodeAttrs& attrs,
   if (real_k == 0) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<rot90<req_type>, xpu>::Launch(s, inputs[0].Size(), inputs[0].dptr<DType>(),
-                                             outputs[0].dptr<DType>());
+        Kernel<rot90<req_type>, xpu>::Launch(
+            s, inputs[0].Size(), inputs[0].dptr<DType>(), outputs[0].dptr<DType>());
       });
     });
   } else if (real_k == 2) {
@@ -1114,19 +1117,19 @@ void NumpyRot90Compute(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
-inline void HSplitOpForward(const nnvm::NodeAttrs &attrs,
-                            const OpContext &ctx,
-                            const std::vector<TBlob> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void HSplitOpForward(const nnvm::NodeAttrs& attrs,
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
-  const SplitParam &param = nnvm::get<SplitParam>(attrs.parsed);
+  const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), param.sections > 0 ? param.sections : param.indices.ndim());
-  const TBlob &input_data = inputs[split_enum::kData];
+  const TBlob& input_data = inputs[split_enum::kData];
   int real_axis;
   if (input_data.ndim() > 1) {
     real_axis = 1;
@@ -1135,23 +1138,23 @@ inline void HSplitOpForward(const nnvm::NodeAttrs &attrs,
   }
   if (param.sections > 0) {
     CHECK_EQ(inputs[0].shape_[real_axis] % param.sections, 0U)
-      << "ValueError: array split does not result in an equal division";
+        << "ValueError: array split does not result in an equal division";
   }
   SplitOpForwardImpl<xpu>(attrs, ctx, inputs, req, outputs, real_axis);
 }
 
-template<typename xpu>
-inline void HSplitOpBackward(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+template <typename xpu>
+inline void HSplitOpBackward(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
-  const SplitParam &param = nnvm::get<SplitParam>(attrs.parsed);
+  const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), (param.sections > 0) ? param.sections : param.indices.ndim())
-    << "out grad vector size mush match the output size";
+      << "out grad vector size mush match the output size";
   CHECK_EQ(outputs.size(), 1U);
   int real_axis;
   if (outputs[split_enum::kData].ndim() > 1) {
@@ -1166,24 +1169,23 @@ struct NumpyConcatenateParam : public dmlc::Parameter<NumpyConcatenateParam> {
   int num_args;
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(NumpyConcatenateParam) {
-    DMLC_DECLARE_FIELD(num_args)
-    .set_lower_bound(1)
-    .describe("Number of inputs to be concated.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs to be concated.");
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<int>(0))
-    .describe("The axis along which `values` are appended.  If `axis` is not"
-              "given, both `arr` and `values` are flattened before use.");
+        .set_default(dmlc::optional<int>(0))
+        .describe(
+            "The axis along which `values` are appended.  If `axis` is not"
+            "given, both `arr` and `values` are flattened before use.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream num_args_s, axis_s;
     num_args_s << num_args;
     axis_s << axis;
     (*dict)["num_args"] = num_args_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]     = axis_s.str();
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyConcatenateForward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -1208,7 +1210,7 @@ void NumpyConcatenateForward(const nnvm::NodeAttrs& attrs,
 
   ConcatParam cparam;
   cparam.num_args = param.num_args;
-  cparam.dim = param.axis.has_value() ? param.axis.value() : 0;
+  cparam.dim      = param.axis.has_value() ? param.axis.value() : 0;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
     ConcatOp<xpu, DType> op;
     op.Init(cparam);
@@ -1216,7 +1218,7 @@ void NumpyConcatenateForward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyConcatenateBackward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -1241,7 +1243,7 @@ void NumpyConcatenateBackward(const nnvm::NodeAttrs& attrs,
 
   ConcatParam cparam;
   cparam.num_args = param.num_args;
-  cparam.dim = param.axis.has_value() ? param.axis.value() : 0;
+  cparam.dim      = param.axis.has_value() ? param.axis.value() : 0;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
     ConcatOp<xpu, DType> op;
     op.Init(cparam);
@@ -1252,10 +1254,10 @@ void NumpyConcatenateBackward(const nnvm::NodeAttrs& attrs,
 struct NumpyDiagParam : public dmlc::Parameter<NumpyDiagParam> {
   index_t k;
   DMLC_DECLARE_PARAMETER(NumpyDiagParam) {
-    DMLC_DECLARE_FIELD(k).set_default(0)
-      .describe("Diagonal in question. The default is 0. "
-                "Use k>0 for diagonals above the main diagonal, "
-                "and k<0 for diagonals below the main diagonal. ");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Diagonal in question. The default is 0. "
+        "Use k>0 for diagonals above the main diagonal, "
+        "and k<0 for diagonals below the main diagonal. ");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream k_s;
@@ -1264,8 +1266,7 @@ struct NumpyDiagParam : public dmlc::Parameter<NumpyDiagParam> {
   }
 };
 
-inline mxnet::TShape NumpyDiagShapeImpl(const mxnet::TShape &ishape,
-                                        const index_t k) {
+inline mxnet::TShape NumpyDiagShapeImpl(const mxnet::TShape& ishape, const index_t k) {
   CHECK_LE(ishape.ndim(), 2) << "Input must be 1- or 2-d";
 
   if (ishape.ndim() == 1) {
@@ -1282,7 +1283,7 @@ inline mxnet::TShape NumpyDiagShapeImpl(const mxnet::TShape &ishape,
     h += k;
   }
   dim_t a = 0;
-  auto s = std::max(std::min(h, w), a);
+  auto s  = std::max(std::min(h, w), a);
   // s is the length of diagonal with k as the offset
 
   int n_dim = ishape.ndim() - 1;
@@ -1291,19 +1292,19 @@ inline mxnet::TShape NumpyDiagShapeImpl(const mxnet::TShape &ishape,
   return oshape;
 }
 
-inline bool NumpyDiagOpShape(const nnvm::NodeAttrs &attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+inline bool NumpyDiagOpShape(const nnvm::NodeAttrs& attrs,
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
-  const mxnet::TShape &ishape = (*in_attrs)[0];
+  const mxnet::TShape& ishape = (*in_attrs)[0];
   if (!mxnet::ndim_is_known(ishape)) {
     return false;
   }
 
-  const NumpyDiagParam &param = nnvm::get<NumpyDiagParam>(attrs.parsed);
-  mxnet::TShape oshape = NumpyDiagShapeImpl(ishape, param.k);
+  const NumpyDiagParam& param = nnvm::get<NumpyDiagParam>(attrs.parsed);
+  mxnet::TShape oshape        = NumpyDiagShapeImpl(ishape, param.k);
 
   if (shape_is_none(oshape)) {
     LOG(FATAL) << "Diagonal does not exist.";
@@ -1313,9 +1314,9 @@ inline bool NumpyDiagOpShape(const nnvm::NodeAttrs &attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-inline bool NumpyDiagOpType(const nnvm::NodeAttrs &attrs,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+inline bool NumpyDiagOpType(const nnvm::NodeAttrs& attrs,
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -1327,8 +1328,11 @@ inline bool NumpyDiagOpType(const nnvm::NodeAttrs &attrs,
 template <int ndim, int req, bool back>
 struct diag {
   template <typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
-                                  index_t stride, index_t offset) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
+                                  index_t stride,
+                                  index_t offset) {
     using namespace mxnet_op;
     index_t j = offset + stride * i;
 
@@ -1343,8 +1347,11 @@ struct diag {
 template <int req, bool back>
 struct diag_gen {
   template <typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
-                                  mshadow::Shape<2> oshape, index_t k) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
+                                  mshadow::Shape<2> oshape,
+                                  index_t k) {
     using namespace mxnet_op;
 
     auto j = unravel(i, oshape);
@@ -1362,14 +1369,14 @@ struct diag_gen {
 };
 
 template <typename xpu, bool back>
-void NumpyDiagOpImpl(const TBlob &in_data,
-                     const TBlob &out_data,
-                     const mxnet::TShape &ishape,
-                     const mxnet::TShape &oshape,
+void NumpyDiagOpImpl(const TBlob& in_data,
+                     const TBlob& out_data,
+                     const mxnet::TShape& ishape,
+                     const mxnet::TShape& oshape,
                      index_t dsize,
-                     const index_t &k,
-                     mxnet_op::Stream<xpu> *s,
-                     const OpReqType &req) {
+                     const index_t& k,
+                     mxnet_op::Stream<xpu>* s,
+                     const OpReqType& req) {
   using namespace mxnet_op;
   using namespace mshadow;
   if (ishape.ndim() > 1) {
@@ -1394,64 +1401,65 @@ void NumpyDiagOpImpl(const TBlob &in_data,
         }
 
         Kernel<diag<2, req_type, back>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            stride1 + stride2, offset);
+            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), stride1 + stride2, offset);
       });
     });
   } else {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        Kernel<diag_gen<req_type, back>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            Shape2(oshape[0], oshape[1]), k);
+        Kernel<diag_gen<req_type, back>, xpu>::Launch(s,
+                                                      dsize,
+                                                      out_data.dptr<DType>(),
+                                                      in_data.dptr<DType>(),
+                                                      Shape2(oshape[0], oshape[1]),
+                                                      k);
       });
     });
   }
 }
 
 template <typename xpu>
-void NumpyDiagOpForward(const nnvm::NodeAttrs &attrs,
-                        const OpContext &ctx,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
+void NumpyDiagOpForward(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob &in_data = inputs[0];
-  const TBlob &out_data = outputs[0];
-  const mxnet::TShape &ishape = inputs[0].shape_;
-  const mxnet::TShape &oshape = outputs[0].shape_;
-  const NumpyDiagParam &param = nnvm::get<NumpyDiagParam>(attrs.parsed);
-
-  NumpyDiagOpImpl<xpu, false>(in_data, out_data, ishape, oshape,
-                              out_data.Size(), param.k, s, req[0]);
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
+  const TBlob& in_data        = inputs[0];
+  const TBlob& out_data       = outputs[0];
+  const mxnet::TShape& ishape = inputs[0].shape_;
+  const mxnet::TShape& oshape = outputs[0].shape_;
+  const NumpyDiagParam& param = nnvm::get<NumpyDiagParam>(attrs.parsed);
+
+  NumpyDiagOpImpl<xpu, false>(
+      in_data, out_data, ishape, oshape, out_data.Size(), param.k, s, req[0]);
 }
 
 template <typename xpu>
-void NumpyDiagOpBackward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyDiagOpBackward(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob &in_data = inputs[0];
-  const TBlob &out_data = outputs[0];
-  const mxnet::TShape &ishape = inputs[0].shape_;
-  const mxnet::TShape &oshape = outputs[0].shape_;
-  const NumpyDiagParam &param = nnvm::get<NumpyDiagParam>(attrs.parsed);
+  const TBlob& in_data        = inputs[0];
+  const TBlob& out_data       = outputs[0];
+  const mxnet::TShape& ishape = inputs[0].shape_;
+  const mxnet::TShape& oshape = outputs[0].shape_;
+  const NumpyDiagParam& param = nnvm::get<NumpyDiagParam>(attrs.parsed);
 
-  NumpyDiagOpImpl<xpu, true>(in_data, out_data, oshape, ishape,
-                             in_data.Size(), param.k, s, req[0]);
+  NumpyDiagOpImpl<xpu, true>(in_data, out_data, oshape, ishape, in_data.Size(), param.k, s, req[0]);
 }
 
 struct NumpyDiagonalParam : public dmlc::Parameter<NumpyDiagonalParam> {
@@ -1459,20 +1467,17 @@ struct NumpyDiagonalParam : public dmlc::Parameter<NumpyDiagonalParam> {
   int axis1;
   int axis2;
   DMLC_DECLARE_PARAMETER(NumpyDiagonalParam) {
-    DMLC_DECLARE_FIELD(offset)
-      .set_default(0)
-      .describe("Diagonal in question. The default is 0. "
-                "Use k>0 for diagonals above the main diagonal, "
-                "and k<0 for diagonals below the main diagonal. "
-                "If input has shape (S0 S1) k must be between -S0 and S1");
-    DMLC_DECLARE_FIELD(axis1)
-      .set_default(0)
-      .describe("The first axis of the sub-arrays of interest. "
-                "Ignored when the input is a 1-D array.");
-    DMLC_DECLARE_FIELD(axis2)
-      .set_default(1)
-      .describe("The second axis of the sub-arrays of interest. "
-                "Ignored when the input is a 1-D array.");
+    DMLC_DECLARE_FIELD(offset).set_default(0).describe(
+        "Diagonal in question. The default is 0. "
+        "Use k>0 for diagonals above the main diagonal, "
+        "and k<0 for diagonals below the main diagonal. "
+        "If input has shape (S0 S1) k must be between -S0 and S1");
+    DMLC_DECLARE_FIELD(axis1).set_default(0).describe(
+        "The first axis of the sub-arrays of interest. "
+        "Ignored when the input is a 1-D array.");
+    DMLC_DECLARE_FIELD(axis2).set_default(1).describe(
+        "The second axis of the sub-arrays of interest. "
+        "Ignored when the input is a 1-D array.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream offset_s, axis1_s, axis2_s;
@@ -1480,13 +1485,15 @@ struct NumpyDiagonalParam : public dmlc::Parameter<NumpyDiagonalParam> {
     axis1_s << axis1;
     axis2_s << axis2;
     (*dict)["offset"] = offset_s.str();
-    (*dict)["axis1"] = axis1_s.str();
-    (*dict)["axis2"] = axis2_s.str();
+    (*dict)["axis1"]  = axis1_s.str();
+    (*dict)["axis2"]  = axis2_s.str();
   }
 };
 
-inline mxnet::TShape NumpyDiagonalShapeImpl(const mxnet::TShape& ishape, const index_t k,
-                                            const int axis1, const int axis2) {
+inline mxnet::TShape NumpyDiagonalShapeImpl(const mxnet::TShape& ishape,
+                                            const index_t k,
+                                            const int axis1,
+                                            const int axis2) {
   int x1 = CheckAxis(axis1, ishape.ndim());
   int x2 = CheckAxis(axis2, ishape.ndim());
 
@@ -1500,8 +1507,10 @@ inline mxnet::TShape NumpyDiagonalShapeImpl(const mxnet::TShape& ishape, const i
     h += k;
   }
   auto s = std::min(h, w);
-  if (s < 0) s = 0;
-  if (x1 > x2) std::swap(x1, x2);
+  if (s < 0)
+    s = 0;
+  if (x1 > x2)
+    std::swap(x1, x2);
 
   int n_dim = ishape.ndim() - 1;
   mxnet::TShape oshape(n_dim, -1);
@@ -1520,28 +1529,27 @@ inline mxnet::TShape NumpyDiagonalShapeImpl(const mxnet::TShape& ishape, const i
 inline bool NumpyDiagonalOpShape(const nnvm::NodeAttrs& attrs,
                                  mxnet::ShapeVector* in_attrs,
                                  mxnet::ShapeVector* out_attrs) {
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
+  CHECK_EQ(in_attrs->size(), 1U);
+  CHECK_EQ(out_attrs->size(), 1U);
 
-    const mxnet::TShape& ishape = (*in_attrs)[0];
-    CHECK_GE(ishape.ndim(), 2) << "Input array should be at least 2d";
-    if (!mxnet::ndim_is_known(ishape)) {
-      return false;
-    }
+  const mxnet::TShape& ishape = (*in_attrs)[0];
+  CHECK_GE(ishape.ndim(), 2) << "Input array should be at least 2d";
+  if (!mxnet::ndim_is_known(ishape)) {
+    return false;
+  }
 
-    const NumpyDiagonalParam& param = nnvm::get<NumpyDiagonalParam>(attrs.parsed);
-    mxnet::TShape oshape = NumpyDiagonalShapeImpl(ishape, param.offset, param.axis1,
-                                         param.axis2);
-    if (shape_is_none(oshape)) {
-      LOG(FATAL) << "Diagonal does not exist.";
-    }
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
-    return shape_is_known(out_attrs->at(0));
+  const NumpyDiagonalParam& param = nnvm::get<NumpyDiagonalParam>(attrs.parsed);
+  mxnet::TShape oshape = NumpyDiagonalShapeImpl(ishape, param.offset, param.axis1, param.axis2);
+  if (shape_is_none(oshape)) {
+    LOG(FATAL) << "Diagonal does not exist.";
+  }
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
+  return shape_is_known(out_attrs->at(0));
 }
 
 inline bool NumpyDiagonalOpType(const nnvm::NodeAttrs& attrs,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -1550,17 +1558,20 @@ inline bool NumpyDiagonalOpType(const nnvm::NodeAttrs& attrs,
   return (*out_attrs)[0] != -1;
 }
 
-template<int ndim, int req, bool back>
+template <int ndim, int req, bool back>
 struct diag_n {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   mshadow::Shape<ndim> oshape,
                                   mshadow::Shape<ndim> ishape,
-                                  index_t stride, index_t offset,
+                                  index_t stride,
+                                  index_t offset,
                                   index_t base) {
     using namespace mxnet_op;
     index_t idx = i / base;
-    index_t j = ravel(unravel(idx, oshape), ishape) + offset + stride * (i - idx * base);
+    index_t j   = ravel(unravel(idx, oshape), ishape) + offset + stride * (i - idx * base);
     if (back) {
       KERNEL_ASSIGN(out[j], req, a[i]);
     } else {
@@ -1569,26 +1580,25 @@ struct diag_n {
   }
 };
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 void NumpyDiagonalOpImpl(const TBlob& in_data,
                          const TBlob& out_data,
                          const mxnet::TShape& ishape,
                          const mxnet::TShape& oshape,
                          index_t dsize,
                          const NumpyDiagonalParam& param,
-                         mxnet_op::Stream<xpu> *s,
+                         mxnet_op::Stream<xpu>* s,
                          const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow;
-  int x1 = CheckAxis(param.axis1, ishape.ndim());
-  int x2 = CheckAxis(param.axis2, ishape.ndim());
+  int x1   = CheckAxis(param.axis1, ishape.ndim());
+  int x2   = CheckAxis(param.axis2, ishape.ndim());
   int idim = ishape.ndim(), odim = oshape.ndim();
   int minx = x1, maxx = x2;
-  if (minx > maxx) std::swap(minx, maxx);
+  if (minx > maxx)
+    std::swap(minx, maxx);
 
-  index_t oleading = 1,
-          obody = 1,
-          otrailing = 1;
+  index_t oleading = 1, obody = 1, otrailing = 1;
   for (int i = 0; i < minx; ++i) {
     oleading *= ishape[i];
   }
@@ -1599,15 +1609,13 @@ void NumpyDiagonalOpImpl(const TBlob& in_data,
     otrailing *= ishape[i];
   }
 
-  index_t ileading = oleading,
-      ibody = obody * ishape[minx],
-      itrailing = otrailing * ishape[maxx];
+  index_t ileading = oleading, ibody = obody * ishape[minx], itrailing = otrailing * ishape[maxx];
 
-  index_t stride1 = itrailing * obody,
-      stride2 = otrailing;
+  index_t stride1 = itrailing * obody, stride2 = otrailing;
   // stride1 + stride2 is the stride for iterating over the diagonal
 
-  if (x1 == maxx) std::swap(stride1, stride2);
+  if (x1 == maxx)
+    std::swap(stride1, stride2);
   index_t offset;
   index_t k = param.offset;
   if (k > 0) {
@@ -1624,19 +1632,31 @@ void NumpyDiagonalOpImpl(const TBlob& in_data,
         out_data.FlatTo1D<xpu, DType>(s) = 0;
       }
       if (ileading == 1) {
-        Kernel<diag_n<2, req_type, back>, xpu>::Launch(s, dsize, out_data.dptr<DType>(),
-          in_data.dptr<DType>(), Shape2(obody, otrailing), Shape2(ibody, itrailing),
-          stride1 + stride2, offset, oshape[odim - 1]);
+        Kernel<diag_n<2, req_type, back>, xpu>::Launch(s,
+                                                       dsize,
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       Shape2(obody, otrailing),
+                                                       Shape2(ibody, itrailing),
+                                                       stride1 + stride2,
+                                                       offset,
+                                                       oshape[odim - 1]);
       } else {
-        Kernel<diag_n<3, req_type, back>, xpu>::Launch(s, dsize, out_data.dptr<DType>(),
-          in_data.dptr<DType>(), Shape3(oleading, obody, otrailing),
-          Shape3(ileading, ibody, itrailing), stride1 + stride2, offset, oshape[odim - 1]);
+        Kernel<diag_n<3, req_type, back>, xpu>::Launch(s,
+                                                       dsize,
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       Shape3(oleading, obody, otrailing),
+                                                       Shape3(ileading, ibody, itrailing),
+                                                       stride1 + stride2,
+                                                       offset,
+                                                       oshape[odim - 1]);
       }
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyDiagonalOpForward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -1648,18 +1668,18 @@ void NumpyDiagonalOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  const mxnet::TShape& ishape = inputs[0].shape_;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  const TBlob& in_data            = inputs[0];
+  const TBlob& out_data           = outputs[0];
+  const mxnet::TShape& ishape     = inputs[0].shape_;
+  const mxnet::TShape& oshape     = outputs[0].shape_;
   const NumpyDiagonalParam& param = nnvm::get<NumpyDiagonalParam>(attrs.parsed);
 
-  NumpyDiagonalOpImpl<xpu, false>(in_data, out_data, ishape, oshape,
-                                  out_data.Size(), param, s, req);
+  NumpyDiagonalOpImpl<xpu, false>(
+      in_data, out_data, ishape, oshape, out_data.Size(), param, s, req);
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyDiagonalOpBackward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -1669,25 +1689,24 @@ void NumpyDiagonalOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  const mxnet::TShape& ishape = inputs[0].shape_;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  const TBlob& in_data            = inputs[0];
+  const TBlob& out_data           = outputs[0];
+  const mxnet::TShape& ishape     = inputs[0].shape_;
+  const mxnet::TShape& oshape     = outputs[0].shape_;
   const NumpyDiagonalParam& param = nnvm::get<NumpyDiagonalParam>(attrs.parsed);
 
-  NumpyDiagonalOpImpl<xpu, true>(in_data, out_data, oshape, ishape,
-                                 in_data.Size(), param, s, req);
+  NumpyDiagonalOpImpl<xpu, true>(in_data, out_data, oshape, ishape, in_data.Size(), param, s, req);
 }
 
 struct NumpyDiagflatParam : public dmlc::Parameter<NumpyDiagflatParam> {
   int k;
   DMLC_DECLARE_PARAMETER(NumpyDiagflatParam) {
-    DMLC_DECLARE_FIELD(k).set_default(0)
-      .describe("Diagonal in question. The default is 0. "
-                "Use k>0 for diagonals above the main diagonal, "
-                "and k<0 for diagonals below the main diagonal. ");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Diagonal in question. The default is 0. "
+        "Use k>0 for diagonals above the main diagonal, "
+        "and k<0 for diagonals below the main diagonal. ");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream k_s;
@@ -1738,8 +1757,8 @@ inline bool NumpyDiagflatOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NumpyDiagflatOpType(const nnvm::NodeAttrs& attrs,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -1748,27 +1767,30 @@ inline bool NumpyDiagflatOpType(const nnvm::NodeAttrs& attrs,
   return (*out_attrs)[0] != -1;
 }
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 void NumpyDiagflatOpImpl(const TBlob& in_data,
                          const TBlob& out_data,
                          const mxnet::TShape& ishape,
                          const mxnet::TShape& oshape,
                          index_t dsize,
                          const NumpyDiagflatParam& param,
-                         mxnet_op::Stream<xpu> *s,
+                         mxnet_op::Stream<xpu>* s,
                          const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow;
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<diag_gen<req_type, back>, xpu>::Launch(
-        s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-        Shape2(oshape[0], oshape[1]), param.k);
+      Kernel<diag_gen<req_type, back>, xpu>::Launch(s,
+                                                    dsize,
+                                                    out_data.dptr<DType>(),
+                                                    in_data.dptr<DType>(),
+                                                    Shape2(oshape[0], oshape[1]),
+                                                    param.k);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyDiagflatOpForward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -1780,18 +1802,18 @@ void NumpyDiagflatOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  const mxnet::TShape& ishape = inputs[0].shape_;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  const TBlob& in_data            = inputs[0];
+  const TBlob& out_data           = outputs[0];
+  const mxnet::TShape& ishape     = inputs[0].shape_;
+  const mxnet::TShape& oshape     = outputs[0].shape_;
   const NumpyDiagflatParam& param = nnvm::get<NumpyDiagflatParam>(attrs.parsed);
 
-  NumpyDiagflatOpImpl<xpu, false>(in_data, out_data, ishape,
-                                  oshape, out_data.Size(), param, s, req);
+  NumpyDiagflatOpImpl<xpu, false>(
+      in_data, out_data, ishape, oshape, out_data.Size(), param, s, req);
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyDiagflatOpBackward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -1801,27 +1823,26 @@ void NumpyDiagflatOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  const mxnet::TShape& ishape = inputs[0].shape_;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  const TBlob& in_data            = inputs[0];
+  const TBlob& out_data           = outputs[0];
+  const mxnet::TShape& ishape     = inputs[0].shape_;
+  const mxnet::TShape& oshape     = outputs[0].shape_;
   const NumpyDiagflatParam& param = nnvm::get<NumpyDiagflatParam>(attrs.parsed);
 
-  NumpyDiagflatOpImpl<xpu, true>(in_data, out_data, oshape,
-                                 ishape, in_data.Size(), param, s, req);
+  NumpyDiagflatOpImpl<xpu, true>(in_data, out_data, oshape, ishape, in_data.Size(), param, s, req);
 }
 
 struct diag_indices_from {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i, DType* out, const int length) {
     int index = i % length;
-    out[i] = index;
+    out[i]    = index;
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyDiagIndicesFromForward(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -1833,15 +1854,15 @@ void NumpyDiagIndicesFromForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
+  const TBlob& in_data  = inputs[0];
   const TBlob& out_data = outputs[0];
-  const int length = in_data.shape_[0];
-  if (in_data.Size() == 0) return;
+  const int length      = in_data.shape_[0];
+  if (in_data.Size() == 0)
+    return;
 
   MSHADOW_IDX_TYPE_SWITCH(out_data.type_flag_, DType, {
-    Kernel<diag_indices_from, xpu>::Launch(
-      s, out_data.Size(), out_data.dptr<DType>(), length);
+    Kernel<diag_indices_from, xpu>::Launch(s, out_data.Size(), out_data.dptr<DType>(), length);
   });
 }
 
diff --git a/src/operator/numpy/np_matrix_op.cc b/src/operator/numpy/np_matrix_op.cc
index 55299742878e..53f4f7b433a4 100644
--- a/src/operator/numpy/np_matrix_op.cc
+++ b/src/operator/numpy/np_matrix_op.cc
@@ -42,14 +42,13 @@ DMLC_REGISTER_PARAMETER(NumpyDiagParam);
 DMLC_REGISTER_PARAMETER(NumpyDiagonalParam);
 DMLC_REGISTER_PARAMETER(NumpyDiagflatParam);
 
-
 bool NumpyTransposeShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   const NumpyTransposeParam& param = nnvm::get<NumpyTransposeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  mxnet::TShape& shp = (*in_attrs)[0];
+  mxnet::TShape& shp     = (*in_attrs)[0];
   mxnet::TShape& out_shp = (*out_attrs)[0];
 
   int ndim = -1;
@@ -70,13 +69,12 @@ bool NumpyTransposeShape(const nnvm::NodeAttrs& attrs,
 
   if (ndim_is_known(param.axes)) {
     CHECK_EQ(ndim, param.axes.ndim())
-        << "The number of axes does not match the dimension of the tensor. axes = "
-        << param.axes << ", input tensor shape = " << shp;
+        << "The number of axes does not match the dimension of the tensor. axes = " << param.axes
+        << ", input tensor shape = " << shp;
     mxnet::TShape axes = common::CanonicalizeAxes(param.axes);
     std::set<dim_t> axes_set(axes.begin(), axes.end());
     CHECK_EQ(axes_set.size(), axes.ndim()) << "ValueError: Repeated axis in transpose."
-                                           << " param.axes = "
-                                           << param.axes;
+                                           << " param.axes = " << param.axes;
     if (ndim_is_known(shp)) {
       for (int i = 0; i < ndim; ++i) {
         ret[i] = shp[axes[i]];
@@ -105,54 +103,54 @@ bool NumpyTransposeShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_transpose)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyTransposeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyTransposeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    const NumpyTransposeParam& param = nnvm::get<NumpyTransposeParam>(n->attrs.parsed);
-    if (ndim_is_known(param.axes)) {
-      mxnet::TShape axes = mxnet::TShape(param.axes.ndim(), -1);
-      for (int i = 0; i < axes.ndim(); ++i) {
-        int axis = param.axes[i];
-        if (axis < 0) {
-          axis += param.axes.ndim();
-        }
-        CHECK(axis >= 0 && axis < param.axes.ndim());
-        axes[axis] = i;
-      }
-      std::ostringstream os;
-      os << axes;
-      return MakeNonlossGradNode("_npi_transpose", n, ograds, {}, {{"axes", os.str()}});
-    } else {
-      return MakeNonlossGradNode("_npi_transpose", n, ograds, {},
-                                 std::unordered_map<std::string, std::string>());
-    }
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyTranspose<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyTransposeParam::__FIELDS__());
-
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyTransposeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyTransposeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const NumpyTransposeParam& param = nnvm::get<NumpyTransposeParam>(n->attrs.parsed);
+          if (ndim_is_known(param.axes)) {
+            mxnet::TShape axes = mxnet::TShape(param.axes.ndim(), -1);
+            for (int i = 0; i < axes.ndim(); ++i) {
+              int axis = param.axes[i];
+              if (axis < 0) {
+                axis += param.axes.ndim();
+              }
+              CHECK(axis >= 0 && axis < param.axes.ndim());
+              axes[axis] = i;
+            }
+            std::ostringstream os;
+            os << axes;
+            return MakeNonlossGradNode("_npi_transpose", n, ograds, {}, {{"axes", os.str()}});
+          } else {
+            return MakeNonlossGradNode(
+                "_npi_transpose", n, ograds, {}, std::unordered_map<std::string, std::string>());
+          }
+        })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyTranspose<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyTransposeParam::__FIELDS__());
 
 bool NumpyReshapeInferShape(const mxnet::TShape& src, mxnet::TShape* dst) {
   if (shape_is_known(src) && shape_is_known(*dst)) {
-    CHECK_EQ(src.Size(), dst->Size()) << "Cannot reshape array of size "
-                                      << src.Size() << " into shape " << *dst;
+    CHECK_EQ(src.Size(), dst->Size())
+        << "Cannot reshape array of size " << src.Size() << " into shape " << *dst;
     return true;
   } else if (!shape_is_known(src) || !ndim_is_known(*dst)) {
     return false;
   } else {
-    int unknown_axis = -1;
+    int unknown_axis          = -1;
     dim_t known_dim_size_prod = 1;
     for (int i = 0; i < dst->ndim(); ++i) {
       if (!dim_size_is_known(*dst, i)) {
@@ -165,10 +163,10 @@ bool NumpyReshapeInferShape(const mxnet::TShape& src, mxnet::TShape* dst) {
         known_dim_size_prod *= (*dst)[i];
       }
     }
-    CHECK_NE(known_dim_size_prod, 0) << "Cannot reshape array of size "
-                                     << src.Size() << " into shape " << *dst;
-    CHECK_EQ(src.Size() % known_dim_size_prod, 0) << "Cannot reshape array of size "
-                                                  << src.Size() << " into shape " << *dst;
+    CHECK_NE(known_dim_size_prod, 0)
+        << "Cannot reshape array of size " << src.Size() << " into shape " << *dst;
+    CHECK_EQ(src.Size() % known_dim_size_prod, 0)
+        << "Cannot reshape array of size " << src.Size() << " into shape " << *dst;
     (*dst)[unknown_axis] = src.Size() / known_dim_size_prod;
     return true;
   }
@@ -191,7 +189,7 @@ bool NumpyReshapeShape(const nnvm::NodeAttrs& attrs,
   }
 
   mxnet::TShape target_shape = param.newshape;
-  bool success = NumpyReshapeInferShape(in_attrs->at(0), &target_shape);
+  bool success               = NumpyReshapeInferShape(in_attrs->at(0), &target_shape);
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, target_shape);
   if (!success) {
     success = NumpyReshapeInferShape(out_attrs->at(0), &in_attrs->at(0));
@@ -202,13 +200,13 @@ bool NumpyReshapeShape(const nnvm::NodeAttrs& attrs,
 bool NumpyXReshapeInferShape(const mxnet::TShape& src,
                              const mxnet::TShape& target,
                              mxnet::TShape* output,
-                             const std::string &default_error_msg) {
+                             const std::string& default_error_msg) {
   bool target_shape_is_known = true;
-  dim_t target_size = 1;
+  dim_t target_size          = 1;
   for (int i = 0; i < target.ndim(); ++i) {
     if (target[i] < 0) {
       target_shape_is_known = false;
-      target_size  = -1;
+      target_size           = -1;
       break;
     } else {
       target_size *= target[i];
@@ -221,31 +219,28 @@ bool NumpyXReshapeInferShape(const mxnet::TShape& src,
   } else if (!shape_is_known(src) || target.ndim() == -1) {
     return false;
   } else {
-    int unknown_axis = -1;
+    int unknown_axis          = -1;
     dim_t known_dim_size_prod = 1;
     std::vector<dim_t> output_shape_vector;
     int src_inx = 0;
     for (int i = 0; i < target.ndim(); ++i) {
       dim_t proposed_dim = target[i];
-      CHECK(proposed_dim >= -6)
-        << "Dimension size must be greater than -6, received " << proposed_dim;
+      CHECK(proposed_dim >= -6) << "Dimension size must be greater than -6, received "
+                                << proposed_dim;
       if (proposed_dim == -1) {
         // infer the known dimension
-        CHECK_LT(unknown_axis, 0)
-          << "One and only one dim can be inferred";
+        CHECK_LT(unknown_axis, 0) << "One and only one dim can be inferred";
         unknown_axis = output_shape_vector.size();
         output_shape_vector.push_back(-1);
         src_inx++;
       } else if (proposed_dim == -2) {
         // copy the dimension from src to output
-        CHECK_LT(src_inx, src.ndim())
-          << "Unmatching dimension of proposed new shape";
+        CHECK_LT(src_inx, src.ndim()) << "Unmatching dimension of proposed new shape";
         known_dim_size_prod *= src[src_inx];
         output_shape_vector.push_back(src[src_inx++]);
       } else if (proposed_dim == -3) {
         // skip the source dimension if and only if it is one
-        CHECK_EQ(src[src_inx], 1)
-          << "-3 index should only be used to skip dimension size 1";
+        CHECK_EQ(src[src_inx], 1) << "-3 index should only be used to skip dimension size 1";
         src_inx++;
       } else if (proposed_dim == -4) {
         // copy all remaining dims from source
@@ -256,17 +251,15 @@ bool NumpyXReshapeInferShape(const mxnet::TShape& src,
         }
       } else if (proposed_dim == -5) {
         // merge two dims from source
-        CHECK_LT(src_inx, src.ndim()-1)
-          <<"Not enough dimensions left for the product";
+        CHECK_LT(src_inx, src.ndim() - 1) << "Not enough dimensions left for the product";
         const dim_t d1 = src[src_inx++];
         const dim_t d2 = src[src_inx++];
         if (!mxnet::dim_size_is_known(d1) || !mxnet::dim_size_is_known(d2)) {
-          CHECK_LT(unknown_axis, 0)
-            << "One and only one dim can be inferred";
+          CHECK_LT(unknown_axis, 0) << "One and only one dim can be inferred";
           unknown_axis = output_shape_vector.size();
           output_shape_vector.push_back(-1);
         } else {
-          known_dim_size_prod *= d1*d2;
+          known_dim_size_prod *= d1 * d2;
           output_shape_vector.push_back(d1 * d2);
         }
       } else if (proposed_dim == -6) {
@@ -275,20 +268,20 @@ bool NumpyXReshapeInferShape(const mxnet::TShape& src,
         CHECK_LT(i + 2, target.ndim());
         CHECK_LT(src_inx, src.ndim());
         const dim_t d0 = src[src_inx++];
-        dim_t d1 = target[++i];
-        dim_t d2 = target[++i];
+        dim_t d1       = target[++i];
+        dim_t d2       = target[++i];
         CHECK(d1 != -1 || d2 != -1) << "Split dims cannot both be -1.";
-        if (d1 == -1 && d0 >= 0) d1 = d0 / d2;  // d0 must be known to do this
-        if (d2 == -1 && d0 >= 0) d2 = d0 / d1;  // d0 must be known to do this
+        if (d1 == -1 && d0 >= 0)
+          d1 = d0 / d2;  // d0 must be known to do this
+        if (d2 == -1 && d0 >= 0)
+          d2 = d0 / d1;  // d0 must be known to do this
         CHECK(d1 * d2 == static_cast<dim_t>(d0) || static_cast<dim_t>(d0) == dim_t(-1))
-          <<"Split dims " << d1 << ", " << d2 << " do not divide original dim " << d0;
+            << "Split dims " << d1 << ", " << d2 << " do not divide original dim " << d0;
         if (d1 == -1) {
-          CHECK_LT(unknown_axis, 0)
-            << "One and only one dim can be inferred";
+          CHECK_LT(unknown_axis, 0) << "One and only one dim can be inferred";
           unknown_axis = output_shape_vector.size();
         } else if (d2 == -1) {
-          CHECK_LT(unknown_axis, 0)
-            << "One and only one dim can be inferred";
+          CHECK_LT(unknown_axis, 0) << "One and only one dim can be inferred";
           unknown_axis = output_shape_vector.size() + 1;
         }
         known_dim_size_prod *= d0 == -1 ? 1 : d0;
@@ -316,8 +309,8 @@ bool NumpyXReshapeInferShape(const mxnet::TShape& src,
 }
 
 bool NumpyXReshapeShape(const nnvm::NodeAttrs& attrs,
-                       mxnet::ShapeVector* in_attrs,
-                       mxnet::ShapeVector* out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U) << "Input: [data]";
   CHECK_EQ(out_attrs->size(), 1U);
   const NumpyXReshapeParam& param = nnvm::get<NumpyXReshapeParam>(attrs.parsed);
@@ -325,8 +318,7 @@ bool NumpyXReshapeShape(const nnvm::NodeAttrs& attrs,
   bool has_unknown_dim_size = false;
   for (int i = 0; i < param.newshape.ndim(); ++i) {
     if (param.newshape[i] < 0) {
-      CHECK_GE(param.newshape[i], -6)
-        << "Dimension size must be greater than or equal to -6";
+      CHECK_GE(param.newshape[i], -6) << "Dimension size must be greater than or equal to -6";
       if (param.newshape[i] == -1) {
         CHECK(!has_unknown_dim_size) << "Can only specify one unknown dimension";
         has_unknown_dim_size = true;
@@ -337,20 +329,17 @@ bool NumpyXReshapeShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape output_shape;
   bool success;
   std::stringstream ss;
-  ss << "Cannot reshape array of shape " << in_attrs->at(0)
-     << " into shape " << param.newshape
+  ss << "Cannot reshape array of shape " << in_attrs->at(0) << " into shape " << param.newshape
      << " , reverse = " << param.reverse;
   std::string err_msg = ss.str();
   if (!param.reverse) {
-    success = NumpyXReshapeInferShape(in_attrs->at(0),
-                                      param.newshape, &output_shape, err_msg);
+    success = NumpyXReshapeInferShape(in_attrs->at(0), param.newshape, &output_shape, err_msg);
   } else {
     mxnet::TShape rev_in_shape = in_attrs->at(0);
     mxnet::TShape rev_newshape = param.newshape;
     std::reverse(rev_in_shape.begin(), rev_in_shape.end());
     std::reverse(rev_newshape.begin(), rev_newshape.end());
-    success = NumpyXReshapeInferShape(rev_in_shape,
-                                      rev_newshape, &output_shape, err_msg);
+    success = NumpyXReshapeInferShape(rev_in_shape, rev_newshape, &output_shape, err_msg);
     std::reverse(output_shape.begin(), output_shape.end());
   }
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, output_shape);
@@ -358,72 +347,72 @@ bool NumpyXReshapeShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_np_reshape)
-.describe(R"code()code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyReshapeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyReshapeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "Array to be reshaped.")
-.add_arguments(NumpyReshapeParam::__FIELDS__());
-
+    .describe(R"code()code" ADD_FILELINE)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyReshapeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyReshapeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "Array to be reshaped.")
+    .add_arguments(NumpyReshapeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npx_reshape)
-.describe(R"code()code" ADD_FILELINE)
-.add_alias("_npi_reshape")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyXReshapeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyXReshapeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "Array to be reshaped.")
-.add_arguments(NumpyXReshapeParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .add_alias("_npi_reshape")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyXReshapeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyXReshapeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "Array to be reshaped.")
+    .add_arguments(NumpyXReshapeParam::__FIELDS__());
 
 bool NumpySqueezeShape(const nnvm::NodeAttrs& attrs,
-                       mxnet::ShapeVector *in_attrs,
-                       mxnet::ShapeVector *out_attrs) {
+                       mxnet::ShapeVector* in_attrs,
+                       mxnet::ShapeVector* out_attrs) {
   const SqueezeParam& param = nnvm::get<SqueezeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U) << "Input: [a]";
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& dshape = in_attrs->at(0);
-  const int dndim = dshape.ndim();
-  if (!shape_is_known(dshape)) return false;
+  const int dndim             = dshape.ndim();
+  if (!shape_is_known(dshape))
+    return false;
   mxnet::TShape oshape = dshape;
   // special case, scalar tensor
   if (dshape.ndim() == 0) {
     if (param.axis.has_value()) {
       mxnet::Tuple<int> axes = param.axis.value();
       CHECK_EQ(axes.ndim(), 1) << "cannot specify more than one axis for a scalar tensor";
-      CHECK(axes[0] == 0 || axes[0] == -1) << "axis " << axes[0]
-                                           << " is out of bounds of array of dimension 0";
+      CHECK(axes[0] == 0 || axes[0] == -1)
+          << "axis " << axes[0] << " is out of bounds of array of dimension 0";
     }
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(0, -1));
     return true;
@@ -434,59 +423,60 @@ bool NumpySqueezeShape(const nnvm::NodeAttrs& attrs,
     for (int i = 0; i < axes.ndim(); ++i) {
       if (axes[i] < 0) {
         axes[i] += dndim;
-        CHECK_GE(axes[i], 0)
-            << "axis " << axes[i] - dndim << " is out of bounds for array of dimension " << dndim;
+        CHECK_GE(axes[i], 0) << "axis " << axes[i] - dndim
+                             << " is out of bounds for array of dimension " << dndim;
       }
-      CHECK_LT(axes[i], dndim)
-          << "axis " << axes[i] << " is out of bounds for array of dimension " << dndim;
+      CHECK_LT(axes[i], dndim) << "axis " << axes[i] << " is out of bounds for array of dimension "
+                               << dndim;
       CHECK_EQ(dshape[axes[i]], 1)
-          << "cannot select an axis to squeeze out which has size="
-          << dshape[axes[i]] << " not equal to one";
+          << "cannot select an axis to squeeze out which has size=" << dshape[axes[i]]
+          << " not equal to one";
       CHECK_NE(oshape[axes[i]], 0) << "duplicate value in axis";
       oshape[axes[i]] = -1;
     }
   } else {
     for (int i = 0; i < oshape.ndim(); ++i) {
-      if (oshape[i] == 1) oshape[i] = -1;
+      if (oshape[i] == 1)
+        oshape[i] = -1;
     }
   }
   size_t oshape_size = SqueezeShapeHelper(&oshape);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(oshape.data(), oshape.data()+oshape_size));
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(oshape.data(), oshape.data() + oshape_size));
   return true;
 }
 
 NNVM_REGISTER_OP(_npi_squeeze)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SqueezeParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpySqueezeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_squeeze"})
-.add_argument("a", "NDArray-or-Symbol", "data to squeeze")
-.add_arguments(SqueezeParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SqueezeParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpySqueezeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_squeeze"})
+    .add_argument("a", "NDArray-or-Symbol", "data to squeeze")
+    .add_arguments(SqueezeParam::__FIELDS__());
 
 bool HStackShape(const nnvm::NodeAttrs& attrs,
-                 mxnet::ShapeVector *in_shape,
-                 mxnet::ShapeVector *out_shape) {
+                 mxnet::ShapeVector* in_shape,
+                 mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   ConcatParam param_ = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args));
   mxnet::TShape dshape;
-  dim_t size = 0;
+  dim_t size                = 0;
   bool has_unknown_dim_size = false;
-  int axis = (*in_shape)[0].ndim() > 1 ? 1 : 0;
-  param_.dim = axis;
+  int axis                  = (*in_shape)[0].ndim() > 1 ? 1 : 0;
+  param_.dim                = axis;
   for (int i = 0; i < param_.num_args; ++i) {
     // scalor tensor is treated as one dimensional vector
     if ((*in_shape)[i].ndim() == 0) {
       (*in_shape)[i] = mxnet::TShape(1, 1);
     }
-    mxnet::TShape &tmp = (*in_shape)[i];
+    mxnet::TShape& tmp = (*in_shape)[i];
     if (tmp.ndim() > 0) {
       CheckAxis(axis, tmp.ndim());
       if (!mxnet::dim_size_is_known(tmp, axis)) {
@@ -501,12 +491,13 @@ bool HStackShape(const nnvm::NodeAttrs& attrs,
 
   mxnet::TShape tmp = (*out_shape)[0];
   if (tmp.ndim() > 0) {
-    axis = CheckAxis(param_.dim, tmp.ndim());
+    axis      = CheckAxis(param_.dim, tmp.ndim());
     tmp[axis] = -1;
     shape_assign(&dshape, tmp);
   }
 
-  if (dshape.ndim() == -1) return false;
+  if (dshape.ndim() == -1)
+    return false;
   CHECK_NE(dshape.ndim(), 0) << "zero-dimensional arrays cannot be concatenated";
 
   for (int i = 0; i < param_.num_args; ++i) {
@@ -524,30 +515,30 @@ bool HStackShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool DStackShape(const nnvm::NodeAttrs& attrs,
-                 mxnet::ShapeVector *in_shape,
-                 mxnet::ShapeVector *out_shape) {
+                 mxnet::ShapeVector* in_shape,
+                 mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   ConcatParam param_ = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args));
   mxnet::TShape dshape;
-  dim_t size = 0;
+  dim_t size                = 0;
   bool has_unknown_dim_size = false;
-  int axis = 2;
-  param_.dim = axis;
+  int axis                  = 2;
+  param_.dim                = axis;
   for (int i = 0; i < param_.num_args; ++i) {
     if ((*in_shape)[i].ndim() == 0) {
       (*in_shape)[i] = mxnet::TShape(3, 1);
     } else if ((*in_shape)[i].ndim() == 1) {
       mxnet::TShape t = mxnet::TShape(3, 1);
-      t[1] = (*in_shape)[i][0];
-      (*in_shape)[i] = t;
+      t[1]            = (*in_shape)[i][0];
+      (*in_shape)[i]  = t;
     } else if ((*in_shape)[i].ndim() == 2) {
       mxnet::TShape t = mxnet::TShape(3, 1);
-      t[0] = (*in_shape)[i][0];
-      t[1] = (*in_shape)[i][1];
-      (*in_shape)[i] = t;
+      t[0]            = (*in_shape)[i][0];
+      t[1]            = (*in_shape)[i][1];
+      (*in_shape)[i]  = t;
     }
-    mxnet::TShape &tmp = (*in_shape)[i];
+    mxnet::TShape& tmp = (*in_shape)[i];
     if (tmp.ndim() > 0) {
       CheckAxis(axis, tmp.ndim());
       if (!mxnet::dim_size_is_known(tmp, axis)) {
@@ -562,37 +553,38 @@ bool DStackShape(const nnvm::NodeAttrs& attrs,
 
   mxnet::TShape tmp = (*out_shape)[0];
   if (tmp.ndim() > 0) {
-    axis = CheckAxis(param_.dim, tmp.ndim());
+    axis      = CheckAxis(param_.dim, tmp.ndim());
     tmp[axis] = -1;
     shape_assign(&dshape, tmp);
   }
 
-  if (dshape.ndim() == -1) return false;
+  if (dshape.ndim() == -1)
+    return false;
   CHECK_NE(dshape.ndim(), 0) << "zero-dimensional arrays cannot be concatenated";
 
   for (int i = 0; i < param_.num_args; ++i) {
     CHECK(shape_assign(&(*in_shape)[i], dshape))
-      << "Incompatible input shape: expected " << dshape << ", got " << (*in_shape)[i];
+        << "Incompatible input shape: expected " << dshape << ", got " << (*in_shape)[i];
   }
 
   if (!has_unknown_dim_size) {
     dshape[axis] = size;
   }
   CHECK(shape_assign(&(*out_shape)[0], dshape))
-    << "Incompatible output shape: expected " << dshape << ", got " << (*out_shape)[0];
+      << "Incompatible output shape: expected " << dshape << ", got " << (*out_shape)[0];
 
   return shape_is_known(dshape);
 }
 
 bool ConcatType(const nnvm::NodeAttrs& attrs,
-                std::vector<int> *in_type,
-                std::vector<int> *out_type);
+                std::vector<int>* in_type,
+                std::vector<int>* out_type);
 
 bool NumpyConcatenateType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type,
-                          std::vector<int> *out_type) {
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
   const NumpyConcatenateParam& param = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
-  const int num_args = param.num_args;
+  const int num_args                 = param.num_args;
   CHECK_EQ(in_type->size(), num_args);
   CHECK_EQ(out_type->size(), 1);
   int dtype = -1;
@@ -612,16 +604,16 @@ bool NumpyConcatenateType(const nnvm::NodeAttrs& attrs,
 }
 
 bool NumpyConcatenateShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_shape,
-                           mxnet::ShapeVector *out_shape) {
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const NumpyConcatenateParam& param_ = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
-  const int num_args = param_.num_args;
+  const int num_args                  = param_.num_args;
   CHECK_EQ(in_shape->size(), num_args);
 
   int param_axis;
   if (!(param_.axis.has_value())) {
-    for (int i = 0 ; i < num_args ; ++i) {
+    for (int i = 0; i < num_args; ++i) {
       (*in_shape)[i] = Shape1((*in_shape)[i].Size());
     }
     param_axis = 0;
@@ -630,13 +622,13 @@ bool NumpyConcatenateShape(const nnvm::NodeAttrs& attrs,
   }
 
   mxnet::TShape dshape;
-  dim_t size = 0;
+  dim_t size                = 0;
   bool has_unknown_dim_size = false;
-  int axis = -1;
+  int axis                  = -1;
   for (int i = 0; i < num_args; ++i) {
     mxnet::TShape tmp = (*in_shape)[i];
     if (tmp.ndim() > 0) {
-      axis = CheckAxis(param_axis, tmp.ndim());
+      axis                 = CheckAxis(param_axis, tmp.ndim());
       has_unknown_dim_size = !mxnet::dim_size_is_known(tmp, axis) || has_unknown_dim_size;
       size += tmp[axis];
       tmp[axis] = -1;
@@ -646,12 +638,13 @@ bool NumpyConcatenateShape(const nnvm::NodeAttrs& attrs,
 
   mxnet::TShape tmp = (*out_shape)[0];
   if (tmp.ndim() > 0) {
-    axis = CheckAxis(param_axis, tmp.ndim());
+    axis      = CheckAxis(param_axis, tmp.ndim());
     tmp[axis] = -1;
     shape_assign(&dshape, tmp);
   }
 
-  if (dshape.ndim() == -1) return false;
+  if (dshape.ndim() == -1)
+    return false;
   CHECK_NE(dshape.ndim(), 0) << "zero-dimensional arrays cannot be concatenated";
 
   for (int i = 0; i < num_args; ++i) {
@@ -659,7 +652,8 @@ bool NumpyConcatenateShape(const nnvm::NodeAttrs& attrs,
         << "Incompatible input shape: expected " << dshape << ", got " << (*in_shape)[i];
   }
 
-  if (!has_unknown_dim_size) dshape[axis] = size;
+  if (!has_unknown_dim_size)
+    dshape[axis] = size;
   CHECK(shape_assign(&(*out_shape)[0], dshape))
       << "Incompatible output shape: expected " << dshape << ", got " << (*out_shape)[0];
 
@@ -667,7 +661,7 @@ bool NumpyConcatenateShape(const nnvm::NodeAttrs& attrs,
 }
 
 struct NumpyConcatGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     CHECK_EQ(ograds.size(), 1);
@@ -679,47 +673,48 @@ struct NumpyConcatGrad {
 DMLC_REGISTER_PARAMETER(NumpyConcatenateParam);
 
 NNVM_REGISTER_OP(_npi_concatenate)
-.describe(R"code(Join a sequence of arrays along an existing axis.)code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NumpyConcatenateParam& params = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyConcatenateParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyConcatenateParam& params = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
-    std::vector<std::string> ret;
-    ret.reserve(params.num_args);
-    for (int i = 0; i < params.num_args; ++i) {
-      ret.push_back(std::string("data") + std::to_string(i));
-    }
-    return ret;
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"out"};
-})
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<nnvm::FInferType>("FInferType", NumpyConcatenateType)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyConcatenateShape)
-.set_attr<FCompute>("FCompute<cpu>", NumpyConcatenateForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_concat"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
-.add_arguments(ConcatParam::__FIELDS__());
+    .describe(R"code(Join a sequence of arrays along an existing axis.)code" ADD_FILELINE)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyConcatenateParam& params = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyConcatenateParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyConcatenateParam& params =
+                                           nnvm::get<NumpyConcatenateParam>(attrs.parsed);
+                                       std::vector<std::string> ret;
+                                       ret.reserve(params.num_args);
+                                       for (int i = 0; i < params.num_args; ++i) {
+                                         ret.push_back(std::string("data") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"out"};
+                                      })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<nnvm::FInferType>("FInferType", NumpyConcatenateType)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyConcatenateShape)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyConcatenateForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_concat"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
+    .add_arguments(ConcatParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_np_concat)
-.set_num_inputs(1)
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const NumpyConcatenateParam& params = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr_parser(ParamParser<NumpyConcatenateParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyConcatenateBackward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NumpyConcatenateParam& params = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr_parser(ParamParser<NumpyConcatenateParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyConcatenateBackward<cpu>);
 
 NNVM_REGISTER_OP(_npi_stack)
-.describe(R"code(Join a sequence of arrays along a new axis.
+    .describe(R"code(Join a sequence of arrays along a new axis.
 
 The axis parameter specifies the index of the new axis in the dimensions of the
 result. For example, if axis=0 it will be the first dimension and if axis=-1 it
@@ -735,32 +730,33 @@ Examples::
   stack(x, y, axis=1) = [[1, 3],
                          [2, 4]]
 )code")
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_args);
-  })
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<StackParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<StackParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("arg") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<mxnet::FInferShape>("FInferShape", StackOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", StackOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_stack"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to stack")
-.add_arguments(StackParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<StackParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<StackParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<mxnet::FInferShape>("FInferShape", StackOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", StackOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_stack"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to stack")
+    .add_arguments(StackParam::__FIELDS__());
 
 bool NumpyColumnStackType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type,
-                          std::vector<int> *out_type) {
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
   const NumpyColumnStackParam& param = nnvm::get<NumpyColumnStackParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), param.num_args);
   CHECK_EQ(out_type->size(), 1);
@@ -794,7 +790,7 @@ bool NumpyColumnStackShape(const nnvm::NodeAttrs& attrs,
       in_attrs_tmp[i] = TShape(2, 1);
     } else if ((*in_attrs)[i].ndim() == 1) {
       // Transpose 1D row into a column.
-      in_attrs_tmp[i] = TShape(2, 1);
+      in_attrs_tmp[i]    = TShape(2, 1);
       in_attrs_tmp[i][0] = (*in_attrs)[i][0];
     } else {
       in_attrs_tmp[i] = (*in_attrs)[i];
@@ -836,7 +832,7 @@ bool NumpyColumnStackShape(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < param.num_args; i++) {
     SHAPE_ASSIGN_CHECK(in_attrs_tmp, i, dshape)
   }
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape)\
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape)
   dshape[1] = 0;
   if (!shape_is_known(dshape)) {
     return false;
@@ -868,46 +864,47 @@ bool NumpyColumnStackShape(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyColumnStackParam);
 
 NNVM_REGISTER_OP(_npi_column_stack)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyColumnStackParam>)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyColumnStackParam& param = dmlc::get<NumpyColumnStackParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args);
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    int num_args = dmlc::get<NumpyColumnStackParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    ret.reserve(num_args);
-    for (int i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("arg") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyColumnStackShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyColumnStackType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyColumnStackForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_column_stack"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to column_stack")
-.add_arguments(NumpyColumnStackParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyColumnStackParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyColumnStackParam& param = dmlc::get<NumpyColumnStackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const nnvm::NodeAttrs& attrs) {
+                                       int num_args =
+                                           dmlc::get<NumpyColumnStackParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       ret.reserve(num_args);
+                                       for (int i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyColumnStackShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyColumnStackType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyColumnStackForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_column_stack"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to column_stack")
+    .add_arguments(NumpyColumnStackParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_np_column_stack)
-.set_attr_parser(ParamParser<NumpyColumnStackParam>)
-.set_num_inputs(1)
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyColumnStackParam& param = dmlc::get<NumpyColumnStackParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args);
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyColumnStackBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyColumnStackParam>)
+    .set_num_inputs(1)
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyColumnStackParam& param = dmlc::get<NumpyColumnStackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyColumnStackBackward<cpu>);
 
 DMLC_REGISTER_PARAMETER(NumpyVstackParam);
 
 bool NumpyVstackType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_type,
-                     std::vector<int> *out_type) {
+                     std::vector<int>* in_type,
+                     std::vector<int>* out_type) {
   const NumpyVstackParam& param = nnvm::get<NumpyVstackParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), param.num_args);
   CHECK_EQ(out_type->size(), 1);
@@ -939,7 +936,7 @@ bool NumpyVstackShape(const nnvm::NodeAttrs& attrs,
     if ((*in_attrs)[i].ndim() == 0) {
       in_attrs_tmp[i] = TShape(2, 1);
     } else if ((*in_attrs)[i].ndim() == 1) {
-      in_attrs_tmp[i] = TShape(2, 1);
+      in_attrs_tmp[i]    = TShape(2, 1);
       in_attrs_tmp[i][1] = (*in_attrs)[i][0];
     } else {
       in_attrs_tmp[i] = (*in_attrs)[i];
@@ -980,7 +977,7 @@ bool NumpyVstackShape(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < param.num_args; i++) {
     SHAPE_ASSIGN_CHECK(in_attrs_tmp, i, dshape)
   }
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape)\
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape)
   dshape[0] = 0;
   if (!shape_is_known(dshape)) {
     return false;
@@ -1011,124 +1008,127 @@ bool NumpyVstackShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_vstack)
-.describe(R"code()code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyVstackParam>)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyVstackParam& param = dmlc::get<NumpyVstackParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args);
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const nnvm::NodeAttrs& attrs) {
-    int num_args = dmlc::get<NumpyVstackParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    ret.reserve(num_args);
-    for (int i = 0; i < num_args; i++) {
-      ret.push_back(std::string("arg") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyVstackShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyVstackType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyVstackForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_vstack"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to vstack")
-.add_arguments(NumpyVstackParam::__FIELDS__());
+    .describe(R"code()code" ADD_FILELINE)
+    .set_attr_parser(ParamParser<NumpyVstackParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyVstackParam& param = dmlc::get<NumpyVstackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const nnvm::NodeAttrs& attrs) {
+                                       int num_args =
+                                           dmlc::get<NumpyVstackParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       ret.reserve(num_args);
+                                       for (int i = 0; i < num_args; i++) {
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyVstackShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyVstackType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyVstackForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_np_vstack"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to vstack")
+    .add_arguments(NumpyVstackParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_np_vstack)
-.set_attr_parser(ParamParser<NumpyVstackParam>)
-.set_num_inputs(1)
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-  const NumpyVstackParam& param = dmlc::get<NumpyVstackParam>(attrs.parsed);
-  return static_cast<uint32_t>(param.num_args);
-})
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyVstackBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyVstackParam>)
+    .set_num_inputs(1)
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyVstackParam& param = dmlc::get<NumpyVstackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyVstackBackward<cpu>);
 
 NNVM_REGISTER_OP(_npi_hstack)
-.describe(R"code(Stack tensors horizontally (in second dimension))code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ConcatParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-    std::vector<std::string> ret;
-    ret.reserve(params.num_args);
-    for (int i = 0; i < params.num_args; ++i) {
-      ret.push_back(std::string("data") + std::to_string(i));
-    }
-    return ret;
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"out"};
-})
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<nnvm::FInferType>("FInferType", ConcatType)
-.set_attr<mxnet::FInferShape>("FInferShape", HStackShape)
-.set_attr<FCompute>("FCompute<cpu>", HStackCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", NumpyConcatGrad{"_backward_np_hstack"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
-.add_arguments(ConcatParam::__FIELDS__());
+    .describe(R"code(Stack tensors horizontally (in second dimension))code" ADD_FILELINE)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ConcatParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const ConcatParam& params =
+                                           nnvm::get<ConcatParam>(attrs.parsed);
+                                       std::vector<std::string> ret;
+                                       ret.reserve(params.num_args);
+                                       for (int i = 0; i < params.num_args; ++i) {
+                                         ret.push_back(std::string("data") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"out"};
+                                      })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<nnvm::FInferType>("FInferType", ConcatType)
+    .set_attr<mxnet::FInferShape>("FInferShape", HStackShape)
+    .set_attr<FCompute>("FCompute<cpu>", HStackCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", NumpyConcatGrad{"_backward_np_hstack"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
+    .add_arguments(ConcatParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_np_hstack)
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr_parser(ParamParser<ConcatParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", HStackGradCompute<cpu>);
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr_parser(ParamParser<ConcatParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", HStackGradCompute<cpu>);
 
 NNVM_REGISTER_OP(_npi_dstack)
-.describe(R"code(Stack tensors in sequence depthwise (in third dimension))code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ConcatParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-    std::vector<std::string> ret;
-    ret.reserve(params.num_args);
-    for (int i = 0; i < params.num_args; ++i) {
-      ret.push_back(std::string("data") + std::to_string(i));
-    }
-    return ret;
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"out"};
-})
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<nnvm::FInferType>("FInferType", ConcatType)
-.set_attr<mxnet::FInferShape>("FInferShape", DStackShape)
-.set_attr<FCompute>("FCompute<cpu>", DStackCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", NumpyConcatGrad{"_backward_np_dstack"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
-.add_arguments(ConcatParam::__FIELDS__());
+    .describe(R"code(Stack tensors in sequence depthwise (in third dimension))code" ADD_FILELINE)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ConcatParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const ConcatParam& params =
+                                           nnvm::get<ConcatParam>(attrs.parsed);
+                                       std::vector<std::string> ret;
+                                       ret.reserve(params.num_args);
+                                       for (int i = 0; i < params.num_args; ++i) {
+                                         ret.push_back(std::string("data") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"out"};
+                                      })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<nnvm::FInferType>("FInferType", ConcatType)
+    .set_attr<mxnet::FInferShape>("FInferShape", DStackShape)
+    .set_attr<FCompute>("FCompute<cpu>", DStackCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", NumpyConcatGrad{"_backward_np_dstack"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
+    .add_arguments(ConcatParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_np_dstack)
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return params.num_args;
-})
-.set_attr_parser(ParamParser<ConcatParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", DStackGradCompute<cpu>);
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return params.num_args;
+    })
+    .set_attr_parser(ParamParser<ConcatParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", DStackGradCompute<cpu>);
 
 DMLC_REGISTER_PARAMETER(NumpyTrilindicesParam);
 
 inline bool TrilindicesOpType(const nnvm::NodeAttrs& attrs,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 2U);
 
@@ -1144,15 +1144,14 @@ inline bool TrilindicesOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 2U);
 
-  const NumpyTrilindicesParam& param =
-    nnvm::get<NumpyTrilindicesParam>(attrs.parsed);
+  const NumpyTrilindicesParam& param = nnvm::get<NumpyTrilindicesParam>(attrs.parsed);
 
   index_t n = param.n;
   index_t m = param.m;
   index_t k = param.k;
 
   index_t length = 0;
-  index_t end = k;
+  index_t end    = k;
   for (index_t i = 0; i < n; i++) {
     index_t mi = std::min(end, m - 1);
     if (mi >= 0)
@@ -1169,29 +1168,28 @@ inline bool TrilindicesOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_tril_indices)
-.set_attr_parser(ParamParser<NumpyTrilindicesParam>)
-.set_num_inputs(0)
-.set_num_outputs(2)
-.set_attr<mxnet::FInferShape>("FInferShape", TrilindicesOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TrilindicesOpType)
-.set_attr<FCompute>("FCompute<cpu>", TrilindicesOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_arguments(NumpyTrilindicesParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyTrilindicesParam>)
+    .set_num_inputs(0)
+    .set_num_outputs(2)
+    .set_attr<mxnet::FInferShape>("FInferShape", TrilindicesOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TrilindicesOpType)
+    .set_attr<FCompute>("FCompute<cpu>", TrilindicesOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_arguments(NumpyTrilindicesParam::__FIELDS__());
 
 inline bool NumpyRollShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
   const NumpyRollParam& param = nnvm::get<NumpyRollParam>(attrs.parsed);
 
   if (!param.shift.has_value()) {
     LOG(FATAL) << "roll missing 1 required positional argument: 'shift'.";
   }
-  if (param.shift.value().ndim() > 1 &&
-      param.axis.has_value() &&
+  if (param.shift.value().ndim() > 1 && param.axis.has_value() &&
       param.axis.value().ndim() != param.shift.value().ndim()) {
     LOG(FATAL) << "shift and `axis` must be a tuple of the same size.";
   }
@@ -1208,57 +1206,55 @@ inline bool NumpyRollShape(const nnvm::NodeAttrs& attrs,
     }
     std::sort(axes.begin(), axes.end());
     for (index_t i = 1; i < axes.ndim(); i++) {
-      CHECK_LT(axes[i - 1], axes[i])
-        << "axes have duplicates " << axes;
+      CHECK_LT(axes[i - 1], axes[i]) << "axes have duplicates " << axes;
     }
     CHECK_LT(axes[axes.ndim() - 1], ndim)
-      << "axis " << axes[axes.ndim() - 1]
-      << " Exceeds input dimensions " << (*in_attrs)[0];
-    CHECK_GE(axes[0], 0)
-      << "Reduction axis " << param.axis.value()
-      << " Exceeds input dimensions " << (*in_attrs)[0];
+        << "axis " << axes[axes.ndim() - 1] << " Exceeds input dimensions " << (*in_attrs)[0];
+    CHECK_GE(axes[0], 0) << "Reduction axis " << param.axis.value() << " Exceeds input dimensions "
+                         << (*in_attrs)[0];
   }
   return ElemwiseShape<1, 1>(attrs, in_attrs, out_attrs);
 }
 
 NNVM_REGISTER_OP(_npi_roll)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyRollParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyRollShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyRollCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-     const NumpyRollParam& param = nnvm::get<NumpyRollParam>(n->attrs.parsed);
-     if (!param.shift.has_value()) {
-       LOG(FATAL) << "roll missing 1 required positional argument: 'shift'.";
-     }
-     mxnet::TShape shifts(param.shift.value());
-     for (int i = 0; i < shifts.ndim(); ++i) {
-       shifts[i] = -shifts[i];
-     }
-     std::ostringstream os1;
-     os1 << dmlc::optional<mxnet::TShape>(shifts);
-     std::ostringstream os2;
-     os2 << param.axis;
-     return MakeNonlossGradNode("_npi_roll", n, ograds, {},
-                                {{"shift", os1.str()}, {"axis", os2.str()}});
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyRollParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyRollParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyRollShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyRollCompute<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const NumpyRollParam& param = nnvm::get<NumpyRollParam>(n->attrs.parsed);
+          if (!param.shift.has_value()) {
+            LOG(FATAL) << "roll missing 1 required positional argument: 'shift'.";
+          }
+          mxnet::TShape shifts(param.shift.value());
+          for (int i = 0; i < shifts.ndim(); ++i) {
+            shifts[i] = -shifts[i];
+          }
+          std::ostringstream os1;
+          os1 << dmlc::optional<mxnet::TShape>(shifts);
+          std::ostringstream os2;
+          os2 << param.axis;
+          return MakeNonlossGradNode(
+              "_npi_roll", n, ograds, {}, {{"shift", os1.str()}, {"axis", os2.str()}});
+        })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyRollParam::__FIELDS__());
 
 bool NumpyRollaxisShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   const NumpyRollaxisParam& param = nnvm::get<NumpyRollaxisParam>(attrs.parsed);
   // check 1 input, 1 output
   CHECK_EQ(in_attrs->size(), 1U);
@@ -1269,17 +1265,13 @@ bool NumpyRollaxisShape(const nnvm::NodeAttrs& attrs,
 
   // check axis and start range
   CHECK_GE(param.axis, -shp.ndim())
-  << "axis must be within the range of "
-  << -shp.ndim() << " and " << shp.ndim() - 1;
+      << "axis must be within the range of " << -shp.ndim() << " and " << shp.ndim() - 1;
   CHECK_LT(param.axis, shp.ndim())
-  << "axis must be within the range of "
-  << -shp.ndim() << " and " << shp.ndim() - 1;
+      << "axis must be within the range of " << -shp.ndim() << " and " << shp.ndim() - 1;
   CHECK_GE(param.start, -shp.ndim())
-  << "start must be within the range of "
-  << -shp.ndim() << " and " << shp.ndim();
+      << "start must be within the range of " << -shp.ndim() << " and " << shp.ndim();
   CHECK_LE(param.start, shp.ndim())
-  << "start must be within the range of "
-  << -shp.ndim() << " and " << shp.ndim();
+      << "start must be within the range of " << -shp.ndim() << " and " << shp.ndim();
 
   // generate output shape
   mxnet::TShape ret(shp.ndim(), -1);
@@ -1295,93 +1287,95 @@ bool NumpyRollaxisShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_rollaxis)
-.describe(R"code(Roll the specified axis backwards, 
+    .describe(R"code(Roll the specified axis backwards, 
 until it lies in a given position.)code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyRollaxisParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyRollaxisShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyRollaxisCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_npi_rollaxis_backward"})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyRollaxisParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyRollaxisParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyRollaxisShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyRollaxisCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_npi_rollaxis_backward"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyRollaxisParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_rollaxis_backward)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyRollaxisParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyRollaxisBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
-
-template<>
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyRollaxisParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyRollaxisBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
+
+template <>
 void NumpyFlipForwardImpl<cpu>(const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<TBlob>& outputs,
                                const std::vector<index_t>& stride_,
                                const std::vector<index_t>& trailing_,
                                const index_t& flip_index) {
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    mxnet_op::Kernel<reverse, cpu>::Launch(s, inputs[0].Size(), flip_index,
-      inputs[0].dptr<DType>(), outputs[0].dptr<DType>(),
-      stride_.data(), trailing_.data());
+    mxnet_op::Kernel<reverse, cpu>::Launch(s,
+                                           inputs[0].Size(),
+                                           flip_index,
+                                           inputs[0].dptr<DType>(),
+                                           outputs[0].dptr<DType>(),
+                                           stride_.data(),
+                                           trailing_.data());
   });
 }
 
 DMLC_REGISTER_PARAMETER(FlipParam);
 
 NNVM_REGISTER_OP(_npi_flip)
-.set_num_outputs(1)
-.set_num_inputs(1)
-.set_attr_parser(ParamParser<FlipParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-  return std::vector<std::string> {"data"};
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest> {ResourceRequest::kTempSpace};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyFlipForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_flip"})
-.add_argument("data", "NDArray-or-Symbol", "Input data array")
-.add_arguments(FlipParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(1)
+    .set_attr_parser(ParamParser<FlipParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyFlipForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_flip"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data array")
+    .add_arguments(FlipParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_flip)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<FlipParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest> {ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", NumpyFlipForward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<FlipParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyFlipForward<cpu>);
 
 bool NumpyMoveaxisShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   const NumpyMoveaxisParam& param = nnvm::get<NumpyMoveaxisParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& shp = (*in_attrs)[0];
-  CHECK_EQ(param.source.ndim(), param.destination.ndim())
-    << "source and destination not equal.";
+  CHECK_EQ(param.source.ndim(), param.destination.ndim()) << "source and destination not equal.";
   mxnet::TShape ret(shp.ndim(), -1);
   mxnet::TShape axes;
   axes = NumpyMoveaxisShapeImpl(attrs, shp.ndim());
@@ -1394,34 +1388,36 @@ bool NumpyMoveaxisShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_moveaxis)
-.describe(R"code(Move axes of an array to new positions.
+    .describe(R"code(Move axes of an array to new positions.
 Other axes remain in their original order.
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyMoveaxisParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyMoveaxisShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-     const NumpyMoveaxisParam& param = nnvm::get<NumpyMoveaxisParam>(n->attrs.parsed);
-     std::ostringstream os1;
-     os1 << param.source;
-     std::ostringstream os2;
-     os2 << param.destination;
-     return MakeNonlossGradNode("_npi_moveaxis", n, ograds, {},
-                                {{"source", os2.str()}, {"destination", os1.str()}});
-})
-.set_attr<FCompute>("FCompute<cpu>", NumpyMoveaxisCompute<cpu>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) { return std::vector<std::string>{"a"};
-})
-.add_argument("a", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyMoveaxisParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyMoveaxisParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyMoveaxisShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const NumpyMoveaxisParam& param = nnvm::get<NumpyMoveaxisParam>(n->attrs.parsed);
+          std::ostringstream os1;
+          os1 << param.source;
+          std::ostringstream os2;
+          os2 << param.destination;
+          return MakeNonlossGradNode(
+              "_npi_moveaxis", n, ograds, {}, {{"source", os2.str()}, {"destination", os1.str()}});
+        })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyMoveaxisCompute<cpu>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyMoveaxisParam::__FIELDS__());
 
 inline bool NumpyRot90Shape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
   const NumpyRot90Param& param = nnvm::get<NumpyRot90Param>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
@@ -1444,11 +1440,9 @@ inline bool NumpyRot90Shape(const nnvm::NodeAttrs& attrs,
     }
   }
 
-  CHECK_NE(real_axes[0], real_axes[1])
-      << "axes have duplicates "
-      << real_axes;
-  if (real_axes[0] > shp.ndim() || real_axes[1] > shp.ndim() ||
-      real_axes[0] < 0 || real_axes[1] < 0) {
+  CHECK_NE(real_axes[0], real_axes[1]) << "axes have duplicates " << real_axes;
+  if (real_axes[0] > shp.ndim() || real_axes[1] > shp.ndim() || real_axes[0] < 0 ||
+      real_axes[1] < 0) {
     LOG(FATAL) << "Axes out of range for array of ndim";
   }
 
@@ -1465,32 +1459,33 @@ inline bool NumpyRot90Shape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_rot90)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyRot90Param>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyRot90Shape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyRot90Compute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-     const NumpyRot90Param& param = nnvm::get<NumpyRot90Param>(n->attrs.parsed);
-     std::ostringstream os1;
-     os1 << param.k;
-     std::ostringstream os2;
-     os2 << param.axes;
-     return MakeNonlossGradNode("_npi_rot90", n, ograds, {},
-                                {{"k", os1.str()}, {"axes", os2.str()}});
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyRot90Param::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyRot90Param>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyRot90Shape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyRot90Compute<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const NumpyRot90Param& param = nnvm::get<NumpyRot90Param>(n->attrs.parsed);
+          std::ostringstream os1;
+          os1 << param.k;
+          std::ostringstream os2;
+          os2 << param.axes;
+          return MakeNonlossGradNode(
+              "_npi_rot90", n, ograds, {}, {{"k", os1.str()}, {"axes", os2.str()}});
+        })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyRot90Param::__FIELDS__());
 
 inline bool HSplitOpShape(const nnvm::NodeAttrs& attrs,
                           mxnet::ShapeVector* in_attrs,
@@ -1498,9 +1493,9 @@ inline bool HSplitOpShape(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(in_attrs->size(), 1U);
   mxnet::TShape dshape = in_attrs->at(split_enum::kData);
-  CHECK_GE(dshape.ndim(), 1U)
-    << "ValueError: hsplit only works on arrays of 1 or more dimensions";
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  CHECK_GE(dshape.ndim(), 1U) << "ValueError: hsplit only works on arrays of 1 or more dimensions";
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   int real_axis;
   if (dshape.ndim() > 1) {
     real_axis = 1;
@@ -1511,34 +1506,34 @@ inline bool HSplitOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_hsplit)
-.set_attr_parser(ParamParser<SplitParam>)
-.set_num_inputs(1)
-.set_num_outputs(SplitNumOutputs)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", HSplitOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SplitOpType)
-.set_attr<FCompute>("FCompute<cpu>", HSplitOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_npi_hsplit_backward"})
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(SplitParam::__FIELDS__());
+    .set_attr_parser(ParamParser<SplitParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(SplitNumOutputs)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", HSplitOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SplitOpType)
+    .set_attr<FCompute>("FCompute<cpu>", HSplitOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_npi_hsplit_backward"})
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(SplitParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_hsplit_backward)
-.set_attr_parser(ParamParser<SplitParam>)
-.set_num_inputs(SplitNumOutputs)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", HSplitOpBackward<cpu>);
+    .set_attr_parser(ParamParser<SplitParam>)
+    .set_num_inputs(SplitNumOutputs)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", HSplitOpBackward<cpu>);
 
 inline bool DSplitOpShape(const nnvm::NodeAttrs& attrs,
                           mxnet::ShapeVector* in_attrs,
@@ -1546,95 +1541,96 @@ inline bool DSplitOpShape(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(in_attrs->size(), 1U);
   mxnet::TShape dshape = in_attrs->at(split_enum::kData);
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   CHECK(dshape.ndim() >= 3) << "ValueError: dsplit only works on arrays of 3 or more dimensions";
   return SplitOpShapeImpl(attrs, in_attrs, out_attrs, 2);
 }
 
 NNVM_REGISTER_OP(_npi_dsplit)
-.set_attr_parser(ParamParser<SplitParam>)
-.set_num_inputs(1)
-.set_num_outputs(SplitNumOutputs)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-     return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", DSplitOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SplitOpType)
-.set_attr<FCompute>("FCompute<cpu>", SplitOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_split_v2_backward"})
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(SplitParam::__FIELDS__());
+    .set_attr_parser(ParamParser<SplitParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(SplitNumOutputs)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", DSplitOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SplitOpType)
+    .set_attr<FCompute>("FCompute<cpu>", SplitOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_split_v2_backward"})
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(SplitParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_diag)
-.set_attr_parser(ParamParser<NumpyDiagParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs &attrs) {
-    return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyDiagOpType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diag"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyDiagParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyDiagParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyDiagOpType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diag"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyDiagParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_diag)
-.set_attr_parser(ParamParser<NumpyDiagParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagOpBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyDiagParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_npi_diagonal)
-.set_attr_parser(ParamParser<NumpyDiagonalParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagonalOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyDiagonalOpType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagonalOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diagonal"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyDiagonalParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyDiagonalParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagonalOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyDiagonalOpType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagonalOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diagonal"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyDiagonalParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_diagonal)
-.set_attr_parser(ParamParser<NumpyDiagonalParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagonalOpBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyDiagonalParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagonalOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_npi_diagflat)
-.set_attr_parser(ParamParser<NumpyDiagflatParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagflatOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyDiagflatOpType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagflatOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diagflat"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyDiagflatParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyDiagflatParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagflatOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyDiagflatOpType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagflatOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_diagflat"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyDiagflatParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_diagflat)
-.set_attr_parser(ParamParser<NumpyDiagflatParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagflatOpBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyDiagflatParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagflatOpBackward<cpu>);
 
 bool NumpyDiagIndicesFromShape(const nnvm::NodeAttrs& attrs,
                                mxnet::ShapeVector* in_attrs,
@@ -1643,7 +1639,8 @@ bool NumpyDiagIndicesFromShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
 
   const mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!mxnet::shape_is_known(ishape)) return false;
+  if (!mxnet::shape_is_known(ishape))
+    return false;
   CHECK_GE(ishape.ndim(), 2) << "ValueError: Input array should be at least 2d";
 
   int size = ishape[0];
@@ -1660,8 +1657,8 @@ bool NumpyDiagIndicesFromShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool NumpyDiagIndicesFromType(const nnvm::NodeAttrs& attrs,
-                              std::vector<int> *in_attrs,
-                              std::vector<int> *out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -1670,17 +1667,17 @@ bool NumpyDiagIndicesFromType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_diag_indices_from)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs &attrs) {
-    return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagIndicesFromShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyDiagIndicesFromType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyDiagIndicesFromForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyDiagIndicesFromShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyDiagIndicesFromType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyDiagIndicesFromForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_matrix_op.cu b/src/operator/numpy/np_matrix_op.cu
index 1b143652f86a..f4aa500bd803 100644
--- a/src/operator/numpy/np_matrix_op.cu
+++ b/src/operator/numpy/np_matrix_op.cu
@@ -29,133 +29,115 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_transpose)
-.set_attr<FCompute>("FCompute<gpu>", NumpyTranspose<gpu>);
+NNVM_REGISTER_OP(_npi_transpose).set_attr<FCompute>("FCompute<gpu>", NumpyTranspose<gpu>);
 
-NNVM_REGISTER_OP(_np_reshape)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(_np_reshape).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_squeeze)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(_npi_squeeze).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 NNVM_REGISTER_OP(_npi_concatenate)
-.set_attr<FCompute>("FCompute<gpu>", NumpyConcatenateForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyConcatenateForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_np_concat)
-.set_attr<FCompute>("FCompute<gpu>", NumpyConcatenateBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyConcatenateBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_stack)
-.set_attr<FCompute>("FCompute<gpu>", StackOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_stack).set_attr<FCompute>("FCompute<gpu>", StackOpForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_vstack)
-.set_attr<FCompute>("FCompute<gpu>", NumpyVstackForward<gpu>);
+NNVM_REGISTER_OP(_npi_vstack).set_attr<FCompute>("FCompute<gpu>", NumpyVstackForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_np_vstack)
-.set_attr<FCompute>("FCompute<gpu>", NumpyVstackBackward<gpu>);
+NNVM_REGISTER_OP(_backward_np_vstack).set_attr<FCompute>("FCompute<gpu>", NumpyVstackBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_hstack)
-.set_attr<FCompute>("FCompute<gpu>", HStackCompute<gpu>);
+NNVM_REGISTER_OP(_npi_hstack).set_attr<FCompute>("FCompute<gpu>", HStackCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_np_hstack)
-.set_attr<FCompute>("FCompute<gpu>", HStackGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_np_hstack).set_attr<FCompute>("FCompute<gpu>", HStackGradCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_dstack)
-.set_attr<FCompute>("FCompute<gpu>", DStackCompute<gpu>);
+NNVM_REGISTER_OP(_npi_dstack).set_attr<FCompute>("FCompute<gpu>", DStackCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_np_dstack)
-.set_attr<FCompute>("FCompute<gpu>", DStackGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_np_dstack).set_attr<FCompute>("FCompute<gpu>", DStackGradCompute<gpu>);
 
 NNVM_REGISTER_OP(_npi_column_stack)
-.set_attr<FCompute>("FCompute<gpu>", NumpyColumnStackForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyColumnStackForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_np_column_stack)
-.set_attr<FCompute>("FCompute<gpu>", NumpyColumnStackBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyColumnStackBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_tril_indices)
-.set_attr<FCompute>("FCompute<gpu>", TrilindicesOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_tril_indices).set_attr<FCompute>("FCompute<gpu>", TrilindicesOpForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_roll)
-.set_attr<FCompute>("FCompute<gpu>", NumpyRollCompute<gpu>);
+NNVM_REGISTER_OP(_npi_roll).set_attr<FCompute>("FCompute<gpu>", NumpyRollCompute<gpu>);
 
-template<>
+template <>
 void NumpyFlipForwardImpl<gpu>(const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<TBlob>& outputs,
                                const std::vector<index_t>& stride_,
                                const std::vector<index_t>& trailing_,
                                const index_t& flip_index) {
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  mshadow::Tensor<gpu, 1, uint8_t> workspace =
-    ctx.requested[0].get_space_typed<gpu, 1, uint8_t>(
+  mshadow::Stream<gpu>* s                    = ctx.get_stream<gpu>();
+  mshadow::Tensor<gpu, 1, uint8_t> workspace = ctx.requested[0].get_space_typed<gpu, 1, uint8_t>(
       mshadow::Shape1(flip_index * sizeof(index_t) * 2), s);
 
-  auto stride_workspace = workspace.dptr_;
+  auto stride_workspace   = workspace.dptr_;
   auto trailing_workspace = workspace.dptr_ + flip_index * sizeof(index_t);
 
-  cudaMemcpyAsync(stride_workspace, thrust::raw_pointer_cast(stride_.data()),
+  cudaMemcpyAsync(stride_workspace,
+                  thrust::raw_pointer_cast(stride_.data()),
                   stride_.size() * sizeof(index_t),
-                  cudaMemcpyHostToDevice, mshadow::Stream<gpu>::GetStream(s));
-  cudaMemcpyAsync(trailing_workspace, thrust::raw_pointer_cast(trailing_.data()),
+                  cudaMemcpyHostToDevice,
+                  mshadow::Stream<gpu>::GetStream(s));
+  cudaMemcpyAsync(trailing_workspace,
+                  thrust::raw_pointer_cast(trailing_.data()),
                   trailing_.size() * sizeof(index_t),
-                  cudaMemcpyHostToDevice, mshadow::Stream<gpu>::GetStream(s));
+                  cudaMemcpyHostToDevice,
+                  mshadow::Stream<gpu>::GetStream(s));
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    mxnet_op::Kernel<reverse, gpu>::Launch(s, inputs[0].Size(), flip_index,
-      inputs[0].dptr<DType>(), outputs[0].dptr<DType>(),
-      reinterpret_cast<index_t*>(stride_workspace), reinterpret_cast<index_t*>(trailing_workspace));
+    mxnet_op::Kernel<reverse, gpu>::Launch(s,
+                                           inputs[0].Size(),
+                                           flip_index,
+                                           inputs[0].dptr<DType>(),
+                                           outputs[0].dptr<DType>(),
+                                           reinterpret_cast<index_t*>(stride_workspace),
+                                           reinterpret_cast<index_t*>(trailing_workspace));
   });
 }
 
-NNVM_REGISTER_OP(_npi_flip)
-.set_attr<FCompute>("FCompute<gpu>", NumpyFlipForward<gpu>);
+NNVM_REGISTER_OP(_npi_flip).set_attr<FCompute>("FCompute<gpu>", NumpyFlipForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_flip)
-.set_attr<FCompute>("FCompute<gpu>", NumpyFlipForward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_flip).set_attr<FCompute>("FCompute<gpu>", NumpyFlipForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_moveaxis)
-.set_attr<FCompute>("FCompute<gpu>", NumpyMoveaxisCompute<gpu>);
+NNVM_REGISTER_OP(_npi_moveaxis).set_attr<FCompute>("FCompute<gpu>", NumpyMoveaxisCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_rollaxis)
-.set_attr<FCompute>("FCompute<gpu>", NumpyRollaxisCompute<gpu>);
+NNVM_REGISTER_OP(_npi_rollaxis).set_attr<FCompute>("FCompute<gpu>", NumpyRollaxisCompute<gpu>);
 
 NNVM_REGISTER_OP(_npi_rollaxis_backward)
-.set_attr<FCompute>("FCompute<gpu>", NumpyRollaxisBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyRollaxisBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_rot90)
-.set_attr<FCompute>("FCompute<gpu>", NumpyRot90Compute<gpu>);
+NNVM_REGISTER_OP(_npi_rot90).set_attr<FCompute>("FCompute<gpu>", NumpyRot90Compute<gpu>);
 
-NNVM_REGISTER_OP(_npi_hsplit)
-.set_attr<FCompute>("FCompute<gpu>", HSplitOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_hsplit).set_attr<FCompute>("FCompute<gpu>", HSplitOpForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_hsplit_backward)
-.set_attr<FCompute>("FCompute<gpu>", HSplitOpBackward<gpu>);
+NNVM_REGISTER_OP(_npi_hsplit_backward).set_attr<FCompute>("FCompute<gpu>", HSplitOpBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_dsplit)
-.set_attr<FCompute>("FCompute<gpu>", SplitOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_dsplit).set_attr<FCompute>("FCompute<gpu>", SplitOpForward<gpu>);
 
-NNVM_REGISTER_OP(_npx_reshape)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(_npx_reshape).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(_npi_diag)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_diag).set_attr<FCompute>("FCompute<gpu>", NumpyDiagOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_diag)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_diag).set_attr<FCompute>("FCompute<gpu>", NumpyDiagOpBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_diagonal)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagonalOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_diagonal).set_attr<FCompute>("FCompute<gpu>", NumpyDiagonalOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_diagonal)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagonalOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyDiagonalOpBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_diagflat)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagflatOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_diagflat).set_attr<FCompute>("FCompute<gpu>", NumpyDiagflatOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_diagflat)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagflatOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyDiagflatOpBackward<gpu>);
 
 NNVM_REGISTER_OP(_npi_diag_indices_from)
-.set_attr<FCompute>("FCompute<gpu>", NumpyDiagIndicesFromForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyDiagIndicesFromForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_memory_op.cc b/src/operator/numpy/np_memory_op.cc
index 522998e9c45d..4e9245aea760 100644
--- a/src/operator/numpy/np_memory_op.cc
+++ b/src/operator/numpy/np_memory_op.cc
@@ -28,8 +28,8 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyShareMemoryType(const nnvm::NodeAttrs& attrs,
-                                 std::vector<int> *in_attrs,
-                                 std::vector<int> *out_attrs) {
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kBool);
@@ -37,8 +37,8 @@ inline bool NumpyShareMemoryType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NumpyShareMemoryShape(const nnvm::NodeAttrs& attrs,
-                                  mxnet::ShapeVector *in_attrs,
-                                  mxnet::ShapeVector *out_attrs) {
+                                  mxnet::ShapeVector* in_attrs,
+                                  mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(0, -1));
@@ -46,17 +46,17 @@ inline bool NumpyShareMemoryShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_share_memory)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyShareMemoryShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyShareMemoryType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyShareMemoryCompute<cpu>)
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyShareMemoryShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyShareMemoryType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyShareMemoryCompute<cpu>)
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_memory_op.cu b/src/operator/numpy/np_memory_op.cu
index 61bf70d26b8e..4196c5a8a9c3 100644
--- a/src/operator/numpy/np_memory_op.cu
+++ b/src/operator/numpy/np_memory_op.cu
@@ -28,7 +28,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_share_memory)
-.set_attr<FCompute>("FCompute<gpu>", NumpyShareMemoryCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyShareMemoryCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_memory_op.h b/src/operator/numpy/np_memory_op.h
index 2c0f3f063f65..657e8cda90fd 100644
--- a/src/operator/numpy/np_memory_op.h
+++ b/src/operator/numpy/np_memory_op.h
@@ -34,7 +34,7 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu>
+template <typename xpu>
 void NumpyShareMemoryCompute(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -44,9 +44,9 @@ void NumpyShareMemoryCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
+  const TBlob& a               = inputs[0];
+  const TBlob& b               = inputs[1];
   Tensor<xpu, 1, bool> outdata = outputs[0].FlatTo1D<xpu, bool>(s);
 
   if (a.Size() == 0 || b.Size() == 0) {
@@ -56,9 +56,9 @@ void NumpyShareMemoryCompute(const nnvm::NodeAttrs& attrs,
   MSHADOW_TYPE_SWITCH_WITH_BOOL(a.type_flag_, AType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(b.type_flag_, BType, {
       uint64_t start1 = reinterpret_cast<uint64_t>(a.dptr_);
-      uint64_t end1 = start1 + a.Size() * sizeof(AType);
+      uint64_t end1   = start1 + a.Size() * sizeof(AType);
       uint64_t start2 = reinterpret_cast<uint64_t>(b.dptr_);
-      uint64_t end2 = start2 + b.Size() * sizeof(BType);
+      uint64_t end2   = start2 + b.Size() * sizeof(BType);
       if (!(start1 < end2 && start2 < end1 && start1 < end1 && start2 < end2)) {
         ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, false);
       } else {
diff --git a/src/operator/numpy/np_moments_op.cc b/src/operator/numpy/np_moments_op.cc
index 8a6dd8cd835f..4369c8f9bcd6 100644
--- a/src/operator/numpy/np_moments_op.cc
+++ b/src/operator/numpy/np_moments_op.cc
@@ -36,8 +36,8 @@ DMLC_REGISTER_PARAMETER(NumpyMomentsParam);
 DMLC_REGISTER_PARAMETER(NumpyWeightedAverageParam);
 
 inline bool NumpyMomentsShape(const nnvm::NodeAttrs& attrs,
-                              std::vector<TShape> *in_attrs,
-                              std::vector<TShape> *out_attrs) {
+                              std::vector<TShape>* in_attrs,
+                              std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
   if (!shape_is_known(in_attrs->at(0))) {
@@ -52,11 +52,11 @@ inline bool NumpyMomentsShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NumpyMomentsType(const nnvm::NodeAttrs& attrs,
-                             std::vector<int> *in_attrs,
-                             std::vector<int> *out_attrs) {
+                             std::vector<int>* in_attrs,
+                             std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 2U);
-  const NumpyMomentsParam &param = nnvm::get<NumpyMomentsParam>(attrs.parsed);
+  const NumpyMomentsParam& param = nnvm::get<NumpyMomentsParam>(attrs.parsed);
 
   if (param.dtype.has_value()) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, param.dtype.value());
@@ -70,65 +70,61 @@ inline bool NumpyMomentsType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_std)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<NumpyMomentsParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyMomentsShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyMomentsType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"std", "mean"};
-  })
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs) {
-    return 1;
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_arguments(NumpyMomentsParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyMomentsForward<cpu, true>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<NumpyMomentsParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyMomentsShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyMomentsType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"std", "mean"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_arguments(NumpyMomentsParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyMomentsForward<cpu, true>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 NNVM_REGISTER_OP(_npi_var)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<NumpyMomentsParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyMomentsShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyMomentsType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"var", "mean"};
-  })
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs) {
-    return 1;
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_arguments(NumpyMomentsParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyMomentsForward<cpu, false>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<NumpyMomentsParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyMomentsShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyMomentsType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"var", "mean"};
+                                      })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_arguments(NumpyMomentsParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyMomentsForward<cpu, false>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 inline bool NumpyWeightedAverageType(const nnvm::NodeAttrs& attrs,
-                                     std::vector<int> *in_attrs,
-                                     std::vector<int> *out_attrs) {
-  const auto &param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
+                                     std::vector<int>* in_attrs,
+                                     std::vector<int>* out_attrs) {
+  const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), (param.weighted ? 2U : 1U));
   CHECK_EQ(out_attrs->size(), 2U);
 
@@ -140,60 +136,57 @@ inline bool NumpyWeightedAverageType(const nnvm::NodeAttrs& attrs,
   TYPE_ASSIGN_CHECK(*out_attrs, 1, in_attrs->at(0));
 
   return in_attrs->at(0) != -1 && out_attrs->at(0) != -1 &&
-         (!param.weighted || (in_attrs->at(1) != -1)) &&
-         out_attrs->at(1) != -1;
+         (!param.weighted || (in_attrs->at(1) != -1)) && out_attrs->at(1) != -1;
 }
 
 NNVM_REGISTER_OP(_npi_average)
-.set_num_inputs(
-  [](const NodeAttrs& attrs) {
-    const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
-    return param.weighted ? 2 : 1;
-  })
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs) {
-    const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
-    return param.returned ? 2 : 1;
-  })
-.set_attr_parser(ParamParser<NumpyWeightedAverageParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyWeightedAverageShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyWeightedAverageType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
-    return param.weighted ?
-    std::vector<std::string>{"a", "weights"} :
-    std::vector<std::string>{"a"};
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input")
-.add_argument("weights", "NDArray-or-Symbol", "The weights to calculate average")
-.add_arguments(NumpyWeightedAverageParam::__FIELDS__())
-.set_attr<FCompute>("FCompute<cpu>", NumpyWeightedAverageForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_np_average"});
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
+      return param.weighted ? 2 : 1;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) {
+                                          const auto& param =
+                                              nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
+                                          return param.returned ? 2 : 1;
+                                        })
+    .set_attr_parser(ParamParser<NumpyWeightedAverageParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyWeightedAverageShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyWeightedAverageType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const auto& param =
+                                           nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
+                                       return param.weighted
+                                                  ? std::vector<std::string>{"a", "weights"}
+                                                  : std::vector<std::string>{"a"};
+                                     })
+    .add_argument("a", "NDArray-or-Symbol", "The input")
+    .add_argument("weights", "NDArray-or-Symbol", "The weights to calculate average")
+    .add_arguments(NumpyWeightedAverageParam::__FIELDS__())
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWeightedAverageForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_np_average"});
 
 NNVM_REGISTER_OP(_backward_np_average)
-.set_num_outputs(
-  [](const NodeAttrs& attrs) {
-    const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
-    return param.weighted ? 2 : 1;
-  })
-.set_attr_parser(ParamParser<NumpyWeightedAverageParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_num_inputs(
-  [](const NodeAttrs& attrs) {
-    const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
-    return param.weighted ? 6 : 5;
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyWeightedAverageBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-});
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
+      return param.weighted ? 2 : 1;
+    })
+    .set_attr_parser(ParamParser<NumpyWeightedAverageParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const auto& param = nnvm::get<NumpyWeightedAverageParam>(attrs.parsed);
+      return param.weighted ? 6 : 5;
+    })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWeightedAverageBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_nonzero_op-inl.h b/src/operator/numpy/np_nonzero_op-inl.h
index 722588468f91..d57013df628f 100644
--- a/src/operator/numpy/np_nonzero_op-inl.h
+++ b/src/operator/numpy/np_nonzero_op-inl.h
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file np_nonzero_op-inl.h
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NUMPY_NP_NONZERO_OP_INL_H_
 #define MXNET_OPERATOR_NUMPY_NP_NONZERO_OP_INL_H_
@@ -44,7 +44,7 @@ namespace op {
 
 struct NonzeroForwardKernel {
   // this is for cpu
-  template<int ndim>
+  template <int ndim>
   MSHADOW_XINLINE static void Map(index_t i,
                                   int64_t* out,
                                   const index_t* idx,
@@ -62,7 +62,7 @@ struct NonzeroForwardKernel {
 
 struct NonzeroForwardKernelGPU {
   // for gpu implementation because it does not support int 64 indexing
-  template<int ndim>
+  template <int ndim>
   MSHADOW_XINLINE static void Map(int i,
                                   int64_t* out,
                                   const int32_t* idx,
diff --git a/src/operator/numpy/np_nonzero_op.cc b/src/operator/numpy/np_nonzero_op.cc
index 4fa7103dc410..b21674a48da6 100644
--- a/src/operator/numpy/np_nonzero_op.cc
+++ b/src/operator/numpy/np_nonzero_op.cc
@@ -19,15 +19,15 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file np_nonzero_op.cc
-*/
+ */
 #include "np_nonzero_op-inl.h"
 
 namespace mxnet {
 namespace op {
 
 bool NonzeroType(const nnvm::NodeAttrs& attrs,
-                 std::vector<int> *in_attrs,
-                 std::vector<int> *out_attrs) {
+                 std::vector<int>* in_attrs,
+                 std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   // Output must be int64.
@@ -40,14 +40,14 @@ bool NonzeroType(const nnvm::NodeAttrs& attrs,
 bool NonzeroStorageType(const nnvm::NodeAttrs& attrs,
                         const int dev_mask,
                         DispatchMode* dispatch_mode,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
+                        std::vector<int>* in_attrs,
+                        std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
   *dispatch_mode = DispatchMode::kFComputeEx;
@@ -55,14 +55,14 @@ bool NonzeroStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 void NonzeroForwardCPU(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<NDArray> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<NDArray> &outputs) {
+                       const OpContext& ctx,
+                       const std::vector<NDArray>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const NDArray &in = inputs[0];
-  const NDArray &out = outputs[0];
+  const NDArray& in  = inputs[0];
+  const NDArray& out = outputs[0];
   CHECK_LE(in.shape().ndim(), MAXDIM) << "ndim of input cannot larger than " << MAXDIM;
   // 0-dim
   if (0 == in.shape().ndim()) {
@@ -70,12 +70,12 @@ void NonzeroForwardCPU(const nnvm::NodeAttrs& attrs,
       DType* in_dptr = in.data().dptr<DType>();
       if (*in_dptr) {
         mxnet::TShape s(2, 1);
-        const_cast<NDArray &>(out).Init(s);
+        const_cast<NDArray&>(out).Init(s);
         *(out.data().dptr<int64_t>()) = 0;
       } else {
         mxnet::TShape s(2, 1);
         s[0] = 0;
-        const_cast<NDArray &>(out).Init(s);
+        const_cast<NDArray&>(out).Init(s);
       }
     });
     return;
@@ -85,7 +85,7 @@ void NonzeroForwardCPU(const nnvm::NodeAttrs& attrs,
   if (0 == in_size) {
     mxnet::TShape s(2, in.shape().ndim());
     s[0] = 0;
-    const_cast<NDArray &>(out).Init(s);
+    const_cast<NDArray&>(out).Init(s);
     return;
   }
   std::vector<index_t> prefix_sum(in_size, 0);
@@ -101,29 +101,29 @@ void NonzeroForwardCPU(const nnvm::NodeAttrs& attrs,
   // set the output shape forcefully
   mxnet::TShape s(2, in.shape().ndim());
   s[0] = valid_num;
-  const_cast<NDArray &>(out).Init(s);
+  const_cast<NDArray&>(out).Init(s);
   // get the shape from the input
   MXNET_NDIM_SWITCH(in.shape().ndim(), ndim, {
-    mshadow::Shape<ndim> shape = in.shape().get<ndim>();
-    mshadow::Stream<cpu> *stream = ctx.get_stream<cpu>();
+    mshadow::Shape<ndim> shape   = in.shape().get<ndim>();
+    mshadow::Stream<cpu>* stream = ctx.get_stream<cpu>();
     mxnet_op::Kernel<NonzeroForwardKernel, cpu>::Launch(
-      stream, in_size, out.data().dptr<int64_t>(), prefix_sum.data(), shape);
+        stream, in_size, out.data().dptr<int64_t>(), prefix_sum.data(), shape);
   })
 }
 
 NNVM_REGISTER_OP(_npx_nonzero)
-.add_alias("_npi_nonzero")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"x"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", NonzeroType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", NonzeroForwardCPU)
-.set_attr<FInferStorageType>("FInferStorageType", NonzeroStorageType)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("x", "NDArray-or-Symbol", "The input array.");
+    .add_alias("_npi_nonzero")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"x"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", NonzeroType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", NonzeroForwardCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", NonzeroStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("x", "NDArray-or-Symbol", "The input array.");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_nonzero_op.cu b/src/operator/numpy/np_nonzero_op.cu
index a09b89dec984..80a34503efbf 100644
--- a/src/operator/numpy/np_nonzero_op.cu
+++ b/src/operator/numpy/np_nonzero_op.cu
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file np_nonzero_op.cu
-*/
+ */
 
 #include "np_nonzero_op-inl.h"
 #include <cub/cub.cuh>
@@ -28,10 +28,8 @@ namespace mxnet {
 namespace op {
 
 struct PrefixSumInit {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i,
-                                  int32_t* out,
-                                  DType* in) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, int32_t* out, DType* in) {
     if (in[i]) {
       out[i] = 1;
     } else {
@@ -43,90 +41,82 @@ struct PrefixSumInit {
 #define MAXDIM 5
 
 void NonzeroForwardGPU(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<NDArray> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<NDArray> &outputs) {
+                       const OpContext& ctx,
+                       const std::vector<NDArray>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  const NDArray &in = inputs[0];
-  const NDArray &out = outputs[0];
+  const NDArray& in  = inputs[0];
+  const NDArray& out = outputs[0];
   CHECK_LE(in.shape().ndim(), MAXDIM) << "ndim of input cannot larger than " << MAXDIM;
   size_t in_size = in.shape().Size();
   // 0-shape
   if (0 == in_size) {
     mxnet::TShape s(2, in.shape().ndim());
     s[0] = 0;
-    const_cast<NDArray &>(out).Init(s);
+    const_cast<NDArray&>(out).Init(s);
     return;
   }
-  int32_t valid_num = 0;
-  Stream<gpu>* stream = ctx.get_stream<gpu>();
-  cudaStream_t cuda_stream = Stream<gpu>::GetStream(stream);
-  int32_t* prefix_sum = nullptr;
-  void* d_temp_storage = nullptr;
+  int32_t valid_num         = 0;
+  Stream<gpu>* stream       = ctx.get_stream<gpu>();
+  cudaStream_t cuda_stream  = Stream<gpu>::GetStream(stream);
+  int32_t* prefix_sum       = nullptr;
+  void* d_temp_storage      = nullptr;
   size_t temp_storage_bytes = 0;
   // Calculate total temporary memory size
-  cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                in_size,
-                                cuda_stream);
+  cub::DeviceScan::InclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, in_size, cuda_stream);
   size_t buffer_size = in_size * sizeof(int32_t);
   temp_storage_bytes += buffer_size;
   // Allocate memory on GPU and allocate pointer
   Tensor<gpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), stream);
-  prefix_sum = reinterpret_cast<int32_t*>(workspace.dptr_);
+      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), stream);
+  prefix_sum     = reinterpret_cast<int32_t*>(workspace.dptr_);
   d_temp_storage = workspace.dptr_ + buffer_size;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(in.dtype(), DType, {
     mxnet_op::Kernel<PrefixSumInit, gpu>::Launch(
-      stream, in_size, prefix_sum, in.data().dptr<DType>());
+        stream, in_size, prefix_sum, in.data().dptr<DType>());
   });
   // Calculate prefix sum
-  cub::DeviceScan::InclusiveSum(d_temp_storage,
-                                temp_storage_bytes,
-                                prefix_sum,
-                                prefix_sum,
-                                in_size,
-                                cuda_stream);
-  CUDA_CALL(cudaMemcpyAsync(&valid_num, &prefix_sum[in_size - 1], sizeof(int32_t),
-                            cudaMemcpyDeviceToHost, cuda_stream));
+  cub::DeviceScan::InclusiveSum(
+      d_temp_storage, temp_storage_bytes, prefix_sum, prefix_sum, in_size, cuda_stream);
+  CUDA_CALL(cudaMemcpyAsync(
+      &valid_num, &prefix_sum[in_size - 1], sizeof(int32_t), cudaMemcpyDeviceToHost, cuda_stream));
   CUDA_CALL(cudaStreamSynchronize(cuda_stream));
   // 0-dim
   if (0 == in.shape().ndim()) {
     mxnet::TShape s(2, 1);
     if (valid_num) {
-      const_cast<NDArray &>(out).Init(s);
+      const_cast<NDArray&>(out).Init(s);
       int64_t temp = 0;
-      CUDA_CALL(cudaMemcpyAsync(out.data().dptr<int64_t>(), &temp, sizeof(int64_t),
-                                cudaMemcpyHostToDevice, cuda_stream));
+      CUDA_CALL(cudaMemcpyAsync(
+          out.data().dptr<int64_t>(), &temp, sizeof(int64_t), cudaMemcpyHostToDevice, cuda_stream));
     } else {
       s[0] = 0;
-      const_cast<NDArray &>(out).Init(s);
+      const_cast<NDArray&>(out).Init(s);
     }
     return;
   }
   // Set the output shape forcefully
   mxnet::TShape s(2, in.shape().ndim());
   s[0] = valid_num;
-  const_cast<NDArray &>(out).Init(s);
+  const_cast<NDArray&>(out).Init(s);
   // get the shape from the input
   MXNET_NDIM_SWITCH(in.shape().ndim(), ndim, {
     mshadow::Shape<ndim> shape = in.shape().get<ndim>();
     mxnet_op::Kernel<NonzeroForwardKernelGPU, gpu>::Launch(
-      stream, in_size, out.data().dptr<int64_t>(), prefix_sum, shape);
+        stream, in_size, out.data().dptr<int64_t>(), prefix_sum, shape);
   })
 }
 
 NNVM_REGISTER_OP(_npx_nonzero)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FComputeEx>("FComputeEx<gpu>", NonzeroForwardGPU);
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FComputeEx>("FComputeEx<gpu>", NonzeroForwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_pad_op-inl.h b/src/operator/numpy/np_pad_op-inl.h
index 255e597d503b..2768b48ac164 100644
--- a/src/operator/numpy/np_pad_op-inl.h
+++ b/src/operator/numpy/np_pad_op-inl.h
@@ -46,11 +46,10 @@ enum PadOpType { kConstant, kEdge, kReflect, kSymmetric, kMinimum, kMaximum };
 }
 
 template <int ndim>
-MSHADOW_XINLINE index_t rravel(const mshadow::Shape<ndim>& coord,
-                               const index_t* shape) {
+MSHADOW_XINLINE index_t rravel(const mshadow::Shape<ndim>& coord, const index_t* shape) {
   index_t ret = 0;
-  int nndim = ndim;
-  #pragma unroll
+  int nndim   = ndim;
+#pragma unroll
   for (int i = 0; i < nndim; ++i) {
     ret = ret * shape[i] + (shape[i] > coord[i]) * coord[i];
   }
@@ -58,15 +57,14 @@ MSHADOW_XINLINE index_t rravel(const mshadow::Shape<ndim>& coord,
 }
 
 /* Compute coordinates from flattened index given shape */
-template<int ndim>
-MSHADOW_XINLINE mshadow::Shape<ndim> uunravel(const index_t idx,
-                                              const index_t* shape) {
+template <int ndim>
+MSHADOW_XINLINE mshadow::Shape<ndim> uunravel(const index_t idx, const index_t* shape) {
   mshadow::Shape<ndim> ret;
-  #pragma unroll
-  for (index_t i = ndim-1, j = idx; i >=0; --i) {
+#pragma unroll
+  for (index_t i = ndim - 1, j = idx; i >= 0; --i) {
     index_t tmp = j / shape[i];
-    ret[i] = j - tmp*shape[i];
-    j = tmp;
+    ret[i]      = j - tmp * shape[i];
+    j           = tmp;
   }
   return ret;
 }
@@ -98,14 +96,14 @@ struct NumpyPadParam : public dmlc::Parameter<NumpyPadParam> {
   double constant_values;
   std::string reflect_type;
   DMLC_DECLARE_PARAMETER(NumpyPadParam) {
-    DMLC_DECLARE_FIELD(pad_width)
-        .describe("Number of values padded to the edges of each axis. "
-                  "((before_1, after_1), ... (before_N,"
-                  "after_N)) unique pad widths for each axis. ((before, after),) "
-                  "yields same before and"
-                  "after pad for each axis. "
-                  "(pad,) or int is a shortcut for before = after = pad width for all"
-                  "axes.");
+    DMLC_DECLARE_FIELD(pad_width).describe(
+        "Number of values padded to the edges of each axis. "
+        "((before_1, after_1), ... (before_N,"
+        "after_N)) unique pad widths for each axis. ((before, after),) "
+        "yields same before and"
+        "after pad for each axis. "
+        "(pad,) or int is a shortcut for before = after = pad width for all"
+        "axes.");
     DMLC_DECLARE_FIELD(mode)
         .add_enum("constant", pad_enum::kConstant)
         .add_enum("edge", pad_enum::kEdge)
@@ -128,30 +126,32 @@ struct NumpyPadParam : public dmlc::Parameter<NumpyPadParam> {
             "vector along each axis.");
     DMLC_DECLARE_FIELD(constant_values)
         .set_default(0.0)
-        .describe("Used in 'constant'. The values to set the padded values for each axis."
-                  "((before_1, after_1), ... (before_N, after_N)) unique pad constants for"
-                  "each axis."
-                  "((before, after),) yields same before and after constants for each axis."
-                  "(constant,) or constant is a shortcut for before = after = constant for all"
-                  "axes."
-                  "Default is 0.");
+        .describe(
+            "Used in 'constant'. The values to set the padded values for each axis."
+            "((before_1, after_1), ... (before_N, after_N)) unique pad constants for"
+            "each axis."
+            "((before, after),) yields same before and after constants for each axis."
+            "(constant,) or constant is a shortcut for before = after = constant for all"
+            "axes."
+            "Default is 0.");
     DMLC_DECLARE_FIELD(reflect_type)
         .set_default("even")
-        .describe("Used in 'reflect', and 'symmetric'. "
-                  "The 'even' style is the default with an unaltered reflection around "
-                  "the edge value. For the 'odd' style,"
-                  "the extended part of the array is created by subtracting the "
-                  "reflected values from two times the edge value.");
+        .describe(
+            "Used in 'reflect', and 'symmetric'. "
+            "The 'even' style is the default with an unaltered reflection around "
+            "the edge value. For the 'odd' style,"
+            "the extended part of the array is created by subtracting the "
+            "reflected values from two times the edge value.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream pad_width_s, mode_s, constant_values_s, reflect_type_s;
     pad_width_s << pad_width;
     constant_values_s << constant_values;
     reflect_type_s << reflect_type;
-    (*dict)["pad_width"] = pad_width_s.str();
-    (*dict)["mode"] = MXNetPadType2String(mode);
+    (*dict)["pad_width"]       = pad_width_s.str();
+    (*dict)["mode"]            = MXNetPadType2String(mode);
     (*dict)["constant_values"] = constant_values_s.str();
-    (*dict)["reflect_type"] = reflect_type_s.str();
+    (*dict)["reflect_type"]    = reflect_type_s.str();
   }
 };
 
@@ -163,12 +163,12 @@ inline mxnet::TShape NumpyPadShapeImpl(const mxnet::TShape& ishape,
   } else if (ishape.ndim() >= 2) {
     int i;
     mxnet::TShape oshape(ishape.ndim(), -1);
-    for (i = ishape.ndim() - 1; i >=0; i--) {
+    for (i = ishape.ndim() - 1; i >= 0; i--) {
       index_t base = ishape[i];
-      base = base + pad_width[i][0] + pad_width[i][1];
-      oshape[i] = base;
+      base         = base + pad_width[i][0] + pad_width[i][1];
+      oshape[i]    = base;
     }
-  return oshape;
+    return oshape;
   }
   return mxnet::TShape({-1, -1});
 }
@@ -176,15 +176,17 @@ inline mxnet::TShape NumpyPadShapeImpl(const mxnet::TShape& ishape,
 template <typename xpu, int req, int ndim>
 struct constant_pad {
   template <typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width,
+                                  mshadow::Shape<ndim * 2> width,
                                   double constant_values) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     for (m = 0; m < ndim; m++) {
@@ -207,15 +209,17 @@ struct constant_pad {
 
 template <typename xpu, int req, int ndim>
 struct pad_copy {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width){
+                                  mshadow::Shape<ndim * 2> width) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     // if is origin
@@ -241,16 +245,18 @@ struct pad_copy {
 
 template <typename xpu, int req, int ndim>
 struct symmetric_pad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width,
-                                  size_t index){
+                                  mshadow::Shape<ndim * 2> width,
+                                  size_t index) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     for (m = 0; m < index; m++) {
@@ -273,11 +279,11 @@ struct symmetric_pad {
       return;
     }
     if (indexshape[index] < indexwidth[index * 2]) {
-    // we need to do the assignment
+      // we need to do the assignment
       index_t distance = indexwidth[index * 2] - indexshape[index];
-      index_t total = ishape[index];
+      index_t total    = ishape[index];
       // the round of this element
-      index_t round = (distance - 1) / total;
+      index_t round    = (distance - 1) / total;
       index_t position = distance % total;
       if (position == 0) {
         position = ishape[index];
@@ -289,11 +295,11 @@ struct symmetric_pad {
       }
       index_t l = rravel<ndim>(j, oshape);
       KERNEL_ASSIGN(out[i], req, out[l]);
-    } else if (indexshape[index] >= (indexwidth[index * 2]+ishape[index])) {
-      index_t distance = (indexshape[index]+1) - (indexwidth[index * 2]+ishape[index]);
-      index_t total = ishape[index];
+    } else if (indexshape[index] >= (indexwidth[index * 2] + ishape[index])) {
+      index_t distance = (indexshape[index] + 1) - (indexwidth[index * 2] + ishape[index]);
+      index_t total    = ishape[index];
       index_t position = distance % total;
-      index_t round = (distance - 1) / total;
+      index_t round    = (distance - 1) / total;
       if (position == 0) {
         position = ishape[index];
       }
@@ -310,28 +316,28 @@ struct symmetric_pad {
 
 template <typename xpu, int req, int ndim>
 struct edge_pad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width,
-                                  size_t index){
+                                  mshadow::Shape<ndim * 2> width,
+                                  size_t index) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     for (m = 0; m < index; m++) {
-      if (indexshape[m] < indexwidth[m * 2] ||
-          indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
-      // we can not do this now, since this is a former axis
+      if (indexshape[m] < indexwidth[m * 2] || indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
+        // we can not do this now, since this is a former axis
         return;
       }
     }
     for (m = 0; m < ndim; m++) {
-      if (indexshape[m] >= indexwidth[m * 2] &&
-          indexshape[m] < indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] >= indexwidth[m * 2] && indexshape[m] < indexwidth[m * 2] + ishape[m]) {
         continue;
       } else {
         origin = false;
@@ -339,17 +345,17 @@ struct edge_pad {
       }
     }
     if (origin) {
-    // this thread is in the origin position, then return
+      // this thread is in the origin position, then return
       return;
     }
     if (indexshape[index] < indexwidth[index * 2]) {
-    // we need to do the assignment
+      // we need to do the assignment
       indexshape[index] = indexwidth[index * 2];
-      index_t l = rravel<ndim>(j, oshape);
+      index_t l         = rravel<ndim>(j, oshape);
       KERNEL_ASSIGN(out[i], req, out[l]);
-    } else if (indexshape[index] >= (indexwidth[index * 2]+ishape[index])) {
+    } else if (indexshape[index] >= (indexwidth[index * 2] + ishape[index])) {
       indexshape[index] = indexwidth[index * 2] + ishape[index] - 1;
-      index_t l = rravel<ndim>(j, oshape);
+      index_t l         = rravel<ndim>(j, oshape);
       KERNEL_ASSIGN(out[i], req, out[l]);
     }
   }
@@ -357,28 +363,28 @@ struct edge_pad {
 
 template <typename xpu, int req, int ndim>
 struct reflect_pad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width,
-                                  size_t index){
+                                  mshadow::Shape<ndim * 2> width,
+                                  size_t index) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     for (m = 0; m < index; m++) {
-      if (indexshape[m] < indexwidth[m * 2] ||
-          indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] < indexwidth[m * 2] || indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
         // we can not do this now
         return;
       }
     }
     for (m = 0; m < ndim; m++) {
-      if (indexshape[m] >= indexwidth[m * 2] &&
-          indexshape[m] < indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] >= indexwidth[m * 2] && indexshape[m] < indexwidth[m * 2] + ishape[m]) {
         continue;
       } else {
         origin = false;
@@ -392,70 +398,70 @@ struct reflect_pad {
     if (indexshape[index] < indexwidth[index * 2]) {
       // we need to do the assignment
       index_t distance = indexwidth[index * 2] - indexshape[index];
-      index_t total = ishape[index];
+      index_t total    = ishape[index];
       if (total == 1) {
         indexshape[index] = indexwidth[index * 2];
-        index_t l = rravel<ndim>(j, oshape);
+        index_t l         = rravel<ndim>(j, oshape);
         KERNEL_ASSIGN(out[i], req, out[l]);
         return;
       }
       index_t round = (distance - 1) / (total - 1);
       if (round % 2 == 0) {
-        index_t position = (distance + round) % total;
+        index_t position  = (distance + round) % total;
         indexshape[index] = indexwidth[index * 2] + position;
       } else {
-        index_t position = (distance + round) % total;
+        index_t position  = (distance + round) % total;
         indexshape[index] = indexwidth[index * 2] + ishape[index] - 1 - (position);
       }
       index_t l = rravel<ndim>(j, oshape);
       KERNEL_ASSIGN(out[i], req, out[l]);
     } else if (indexshape[index] >= (indexwidth[index * 2] + ishape[index])) {
-      index_t distance = (indexshape[index]+1) - (indexwidth[index * 2] + ishape[index]);
-      index_t total = ishape[index];
+      index_t distance = (indexshape[index] + 1) - (indexwidth[index * 2] + ishape[index]);
+      index_t total    = ishape[index];
       if (total == 1) {
         indexshape[index] = indexwidth[index * 2];
-        index_t l = rravel<ndim>(j, oshape);
+        index_t l         = rravel<ndim>(j, oshape);
         KERNEL_ASSIGN(out[i], req, out[l]);
         return;
       }
       index_t round = (distance - 1) / (total - 1);
       if (round % 2 == 0) {
-        index_t position = (distance + round) % total;
+        index_t position  = (distance + round) % total;
         indexshape[index] = indexwidth[index * 2] + ishape[index] - 1 - (position);
       } else {
-        index_t position = (distance + round) % total;
+        index_t position  = (distance + round) % total;
         indexshape[index] = indexwidth[index * 2] + position;
       }
       index_t l = rravel<ndim>(j, oshape);
       KERNEL_ASSIGN(out[i], req, out[l]);
-  }
+    }
   }
 };
 
 template <typename xpu, int req, int ndim>
 struct max_pad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width,
-                                  size_t index){
+                                  mshadow::Shape<ndim * 2> width,
+                                  size_t index) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     for (m = 0; m < index; m++) {
-      if (indexshape[m] < indexwidth[m * 2] ||
-          indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] < indexwidth[m * 2] || indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
         // we can not do this now
         return;
       }
     }
     for (m = 0; m < ndim; m++) {
-      if (indexshape[m] >= indexwidth[m * 2] &&
-          indexshape[m] < indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] >= indexwidth[m * 2] && indexshape[m] < indexwidth[m * 2] + ishape[m]) {
         continue;
       } else {
         origin = false;
@@ -470,14 +476,14 @@ struct max_pad {
     if (indexshape[index] < indexwidth[index * 2] ||
         indexshape[index] >= indexwidth[index * 2] + ishape[index]) {
       indexshape[index] = indexwidth[index * 2];
-      index_t l = rravel<ndim>(j, oshape);
+      index_t l         = rravel<ndim>(j, oshape);
       index_t max_count = 0;
-      auto max_value = out[l];
+      auto max_value    = out[l];
       for (max_count = 0; max_count < ishape[index]; max_count++) {
         indexshape[index] = indexwidth[index * 2] + max_count;
-        l = rravel<ndim>(j, oshape);
+        l                 = rravel<ndim>(j, oshape);
         if (out[l] > max_value) {
-            max_value = out[l];
+          max_value = out[l];
         }
       }
       KERNEL_ASSIGN(out[i], req, max_value);
@@ -487,28 +493,28 @@ struct max_pad {
 
 template <typename xpu, int req, int ndim>
 struct min_pad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   const index_t* ishape,
                                   const index_t* oshape,
-                                  mshadow::Shape<ndim*2> width,
-                                  size_t index){
+                                  mshadow::Shape<ndim * 2> width,
+                                  size_t index) {
     using namespace mxnet_op;
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
-    bool origin = true;
+    bool origin         = true;
     index_t* indexwidth = width.shape_;
     index_t* indexshape = j.shape_;
     for (m = 0; m < index; m++) {
-      if (indexshape[m] < indexwidth[m * 2] ||
-          indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] < indexwidth[m * 2] || indexshape[m] >= indexwidth[m * 2] + ishape[m]) {
         // we can not do this now
         return;
       }
     }
     for (m = 0; m < ndim; m++) {
-      if (indexshape[m] >= indexwidth[m * 2] &&
-          indexshape[m] < indexwidth[m * 2] + ishape[m]) {
+      if (indexshape[m] >= indexwidth[m * 2] && indexshape[m] < indexwidth[m * 2] + ishape[m]) {
         continue;
       } else {
         origin = false;
@@ -522,14 +528,14 @@ struct min_pad {
     if (indexshape[index] < indexwidth[index * 2] ||
         indexshape[index] >= (indexwidth[index * 2] + ishape[index])) {
       indexshape[index] = indexwidth[index * 2];
-      index_t l = rravel<ndim>(j, oshape);
+      index_t l         = rravel<ndim>(j, oshape);
       index_t min_count = 0;
-      auto min_value = out[l];
+      auto min_value    = out[l];
       for (min_count = 0; min_count < ishape[index]; min_count++) {
         indexshape[index] = indexwidth[index * 2] + min_count;
-        l = rravel<ndim>(j, oshape);
+        l                 = rravel<ndim>(j, oshape);
         if (out[l] < min_value) {
-            min_value = out[l];
+          min_value = out[l];
         }
       }
       j = uunravel<ndim>(i, oshape);
@@ -542,11 +548,13 @@ struct min_pad {
 
 template <typename xpu, int req, int ndim>
 struct pad_grad {
-template<typename DType>
-MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
-                                const index_t* ishape,
-                                const index_t* oshape,
-                                mshadow::Shape<ndim*2> width) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
+                                  const index_t* ishape,
+                                  const index_t* oshape,
+                                  mshadow::Shape<ndim * 2> width) {
     auto j = uunravel<ndim>(i, oshape);
     size_t m;
     index_t* indexwidth = width.shape_;
@@ -559,7 +567,7 @@ MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *a,
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyPadOpImpl(const TBlob& in_data,
                     const TBlob& out_data,
                     index_t* ishape,
@@ -567,13 +575,13 @@ void NumpyPadOpImpl(const TBlob& in_data,
                     index_t dsize,
                     const NumpyPadParam& param,
                     const std::vector<OpReqType>& req,
-                    mxnet_op::Stream<xpu> *s) {
+                    mxnet_op::Stream<xpu>* s) {
   using namespace mxnet_op;
   using namespace mshadow;
   int mode = param.mode;
   int ndim = in_data.ndim();
   MXNET_NDIM_SWITCH(ndim, NDim, {
-    mshadow::Shape<NDim*2> width;
+    mshadow::Shape<NDim * 2> width;
     int dimcounter = 0;
     index_t* odptr = reinterpret_cast<index_t*>(oshape);
     if (ndim == 1) {
@@ -581,152 +589,171 @@ void NumpyPadOpImpl(const TBlob& in_data,
       width[1] = param.pad_width[1][0];
     } else {
       for (dimcounter = 0; dimcounter < NDim; dimcounter++) {
-        width[dimcounter*2] = param.pad_width[dimcounter][0];
-        width[dimcounter*2 + 1] = param.pad_width[dimcounter][1];
+        width[dimcounter * 2]     = param.pad_width[dimcounter][0];
+        width[dimcounter * 2 + 1] = param.pad_width[dimcounter][1];
       }
     }
     index_t* idptr = reinterpret_cast<index_t*>(ishape);
     switch (mode) {
-      case pad_enum::kConstant:
-        {
-          // constant padding start
-          MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-            MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-              Kernel<constant_pad<xpu, req_type, NDim>, xpu>::Launch(
-                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                idptr, odptr, width, param.constant_values);
-            });
+      case pad_enum::kConstant: {
+        // constant padding start
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+          MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+            Kernel<constant_pad<xpu, req_type, NDim>, xpu>::Launch(s,
+                                                                   dsize,
+                                                                   out_data.dptr<DType>(),
+                                                                   in_data.dptr<DType>(),
+                                                                   idptr,
+                                                                   odptr,
+                                                                   width,
+                                                                   param.constant_values);
           });
-          // constant padding end
-          break;
-        }
-      case pad_enum::kSymmetric:
-        {
+        });
+        // constant padding end
+        break;
+      }
+      case pad_enum::kSymmetric: {
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+          MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+            Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
+                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), idptr, odptr, width);
+          });
+        });
+        index_t index;
+        index_t dim = ndim;
+        // symmetric padding start
+        for (index = dim - 1; index >= 0; index--) {
           MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
             MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-              Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
-                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                idptr, odptr, width);
+              Kernel<symmetric_pad<xpu, req_type, NDim>, xpu>::Launch(s,
+                                                                      dsize,
+                                                                      out_data.dptr<DType>(),
+                                                                      in_data.dptr<DType>(),
+                                                                      idptr,
+                                                                      odptr,
+                                                                      width,
+                                                                      index);
             });
           });
-          index_t index;
-          index_t dim = ndim;
-          // symmetric padding start
-          for (index = dim-1; index >= 0; index--) {
-            MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-              MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-                Kernel<symmetric_pad<xpu, req_type, NDim>, xpu>::Launch(
-                  s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                  idptr, odptr, width, index);
-              });
-            });
-          }
-          // symmetric padding end
-          break;
         }
-      case pad_enum::kReflect:
-        {
+        // symmetric padding end
+        break;
+      }
+      case pad_enum::kReflect: {
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+          MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+            Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
+                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), idptr, odptr, width);
+          });
+        });
+        index_t index;
+        index_t dim = ndim;
+        // reflect padding start
+        for (index = dim - 1; index >= 0; index--) {
           MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
             MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-              Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
-                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                idptr, odptr, width);
+              Kernel<reflect_pad<xpu, req_type, NDim>, xpu>::Launch(s,
+                                                                    dsize,
+                                                                    out_data.dptr<DType>(),
+                                                                    in_data.dptr<DType>(),
+                                                                    idptr,
+                                                                    odptr,
+                                                                    width,
+                                                                    index);
             });
           });
-          index_t index;
-          index_t dim = ndim;
-          // reflect padding start
-          for (index = dim-1; index >= 0; index--) {
-            MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-              MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-                Kernel<reflect_pad<xpu, req_type, NDim>, xpu>::Launch(
-                  s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                  idptr, odptr, width, index);
-              });
-            });
-          }
-          // reflect padding end
-          break;
         }
-      case pad_enum::kEdge:
-        {
+        // reflect padding end
+        break;
+      }
+      case pad_enum::kEdge: {
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+          MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+            Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
+                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), idptr, odptr, width);
+          });
+        });
+        index_t index;
+        index_t dim = ndim;
+        // edge padding start
+        for (index = dim - 1; index >= 0; index--) {
           MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
             MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-              Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
-                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                idptr, odptr, width);
+              Kernel<edge_pad<xpu, req_type, NDim>, xpu>::Launch(s,
+                                                                 dsize,
+                                                                 out_data.dptr<DType>(),
+                                                                 in_data.dptr<DType>(),
+                                                                 idptr,
+                                                                 odptr,
+                                                                 width,
+                                                                 index);
             });
           });
-          index_t index;
-          index_t dim = ndim;
-          // edge padding start
-          for (index = dim-1; index >= 0; index--) {
-            MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-              MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-                Kernel<edge_pad<xpu, req_type, NDim>, xpu>::Launch(
-                  s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                  idptr, odptr, width, index);
-              });
-            });
-          }
-          // edge padding end
-          break;
         }
-      case pad_enum::kMinimum:
-        {
+        // edge padding end
+        break;
+      }
+      case pad_enum::kMinimum: {
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+          MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+            Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
+                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), idptr, odptr, width);
+          });
+        });
+        index_t index;
+        index_t dim = ndim;
+        // minimum padding start
+        for (index = dim - 1; index >= 0; index--) {
           MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
             MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-              Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
-                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                idptr, odptr, width);
+              Kernel<min_pad<xpu, req_type, NDim>, xpu>::Launch(s,
+                                                                dsize,
+                                                                out_data.dptr<DType>(),
+                                                                in_data.dptr<DType>(),
+                                                                idptr,
+                                                                odptr,
+                                                                width,
+                                                                index);
             });
           });
-          index_t index;
-          index_t dim = ndim;
-          // minimum padding start
-          for (index = dim-1; index >= 0; index--) {
-            MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-              MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-                Kernel<min_pad<xpu, req_type, NDim>, xpu>::Launch(
-                  s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                  idptr, odptr, width, index);
-              });
-            });
-          }
-          // minimum padding end
-          break;
         }
-      case pad_enum::kMaximum:
-        {
+        // minimum padding end
+        break;
+      }
+      case pad_enum::kMaximum: {
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+          MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+            Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
+                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), idptr, odptr, width);
+          });
+        });
+        index_t index;
+        index_t dim = ndim;
+        // maximum padding start
+        for (index = dim - 1; index >= 0; index--) {
           MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
             MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-              Kernel<pad_copy<xpu, req_type, NDim>, xpu>::Launch(
-                s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                idptr, odptr, width);
+              Kernel<max_pad<xpu, req_type, NDim>, xpu>::Launch(s,
+                                                                dsize,
+                                                                out_data.dptr<DType>(),
+                                                                in_data.dptr<DType>(),
+                                                                idptr,
+                                                                odptr,
+                                                                width,
+                                                                index);
             });
           });
-          index_t index;
-          index_t dim = ndim;
-          // maximum padding start
-          for (index = dim-1; index >= 0; index--) {
-            MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-              MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-                Kernel<max_pad<xpu, req_type, NDim>, xpu>::Launch(
-                  s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-                  idptr, odptr, width, index);
-              });
-            });
-          }
-          // maximum padding end
-          break;
         }
+        // maximum padding end
+        break;
+      }
       default:
         LOG(FATAL) << "Other modes are not supported. ";
     }
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyPadOpBackImpl(const TBlob& in_data,
                         const TBlob& out_data,
                         index_t* ishape,
@@ -734,39 +761,38 @@ void NumpyPadOpBackImpl(const TBlob& in_data,
                         index_t dsize,
                         const NumpyPadParam& param,
                         const std::vector<OpReqType>& req,
-                        mxnet_op::Stream<xpu> *s) {
-    using namespace mxnet_op;
-    using namespace mshadow;
-    int mode = param.mode;
-    int ndim = in_data.ndim();
-    if (mode != 0) {
-        LOG(FATAL) << "Other modes are not supported. ";
-    }
-    MXNET_NDIM_SWITCH(ndim, NDim, {
-      mshadow::Shape<NDim*2> width;
-      int dimcounter = 0;
-      index_t* odptr = reinterpret_cast<index_t*>(oshape);
-      if (ndim == 1) {
-        width[0] = param.pad_width[0][0];
-        width[1] = param.pad_width[1][0];
-      } else {
-        for (dimcounter = 0; dimcounter < NDim; dimcounter++) {
-          width[dimcounter*2] = param.pad_width[dimcounter][0];
-          width[dimcounter*2 + 1] = param.pad_width[dimcounter][1];
-        }
+                        mxnet_op::Stream<xpu>* s) {
+  using namespace mxnet_op;
+  using namespace mshadow;
+  int mode = param.mode;
+  int ndim = in_data.ndim();
+  if (mode != 0) {
+    LOG(FATAL) << "Other modes are not supported. ";
+  }
+  MXNET_NDIM_SWITCH(ndim, NDim, {
+    mshadow::Shape<NDim * 2> width;
+    int dimcounter = 0;
+    index_t* odptr = reinterpret_cast<index_t*>(oshape);
+    if (ndim == 1) {
+      width[0] = param.pad_width[0][0];
+      width[1] = param.pad_width[1][0];
+    } else {
+      for (dimcounter = 0; dimcounter < NDim; dimcounter++) {
+        width[dimcounter * 2]     = param.pad_width[dimcounter][0];
+        width[dimcounter * 2 + 1] = param.pad_width[dimcounter][1];
       }
-      index_t* idptr = reinterpret_cast<index_t*>(ishape);
-      MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
-        MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-          Kernel<pad_grad<xpu, req_type, NDim>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            idptr, odptr, width);
-        });
+    }
+    index_t* idptr = reinterpret_cast<index_t*>(ishape);
+    MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
+      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+        Kernel<pad_grad<xpu, req_type, NDim>, xpu>::Launch(
+            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), idptr, odptr, width);
       });
-    })
+    });
+  })
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyPadOpForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -780,22 +806,22 @@ void NumpyPadOpForward(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(req.size(), 1U);
     CHECK(req[0] != kNullOp);
     CHECK(req[0] != kWriteInplace);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const TBlob& in_data = inputs[0];
+    Stream<xpu>* s        = ctx.get_stream<xpu>();
+    const TBlob& in_data  = inputs[0];
     const TBlob& out_data = outputs[0];
-    size_t ts = in_data.ndim();
+    size_t ts             = in_data.ndim();
     size_t count;
     mshadow::Shape<NDim> inshape;
     for (count = 0; count < ts; count++) {
       inshape[count] = static_cast<index_t>((in_data.shape_)[count]);
     }
 
-    Tensor<xpu, 1, index_t> tsp = ctx.requested[0].
-                                  get_space_typed<xpu, 1, index_t>(Shape1(2*ts), s);
-    Tensor<cpu, 1, index_t> ta(reinterpret_cast<index_t*>(inshape.shape_),
-                               Shape1(ts), ctx.get_stream<cpu>());
-    Tensor<xpu, 1, index_t> ti(reinterpret_cast<index_t*>(tsp.dptr_),
-                               Shape1(ts), ctx.get_stream<xpu>());
+    Tensor<xpu, 1, index_t> tsp =
+        ctx.requested[0].get_space_typed<xpu, 1, index_t>(Shape1(2 * ts), s);
+    Tensor<cpu, 1, index_t> ta(
+        reinterpret_cast<index_t*>(inshape.shape_), Shape1(ts), ctx.get_stream<cpu>());
+    Tensor<xpu, 1, index_t> ti(
+        reinterpret_cast<index_t*>(tsp.dptr_), Shape1(ts), ctx.get_stream<xpu>());
     mshadow::Copy(ti, ta, ctx.get_stream<xpu>());
 
     mshadow::Shape<NDim> outshape;
@@ -804,22 +830,20 @@ void NumpyPadOpForward(const nnvm::NodeAttrs& attrs,
     }
     index_t* wcp = tsp.dptr_;
     wcp += ts;
-    Tensor<cpu, 1, index_t> tb(reinterpret_cast<index_t*>(outshape.shape_),
-                               Shape1(ts), ctx.get_stream<cpu>());
-    Tensor<xpu, 1, index_t> to(reinterpret_cast<index_t*>(wcp), Shape1(ts),
-                               ctx.get_stream<xpu>());
+    Tensor<cpu, 1, index_t> tb(
+        reinterpret_cast<index_t*>(outshape.shape_), Shape1(ts), ctx.get_stream<cpu>());
+    Tensor<xpu, 1, index_t> to(reinterpret_cast<index_t*>(wcp), Shape1(ts), ctx.get_stream<xpu>());
     mshadow::Copy(to, tb, ctx.get_stream<xpu>());
     const NumpyPadParam& param = nnvm::get<NumpyPadParam>(attrs.parsed);
 
     index_t* wt = reinterpret_cast<index_t*>(to.dptr_);
     index_t* wi = reinterpret_cast<index_t*>(ti.dptr_);
 
-    NumpyPadOpImpl<xpu>(in_data, out_data, wi,
-                        wt, out_data.Size(), param, req, s);
+    NumpyPadOpImpl<xpu>(in_data, out_data, wi, wt, out_data.Size(), param, req, s);
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyPadOpBackward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -833,22 +857,22 @@ void NumpyPadOpBackward(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(req.size(), 1U);
     CHECK(req[0] != kNullOp);
     CHECK(req[0] != kWriteInplace);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const TBlob& in_data = inputs[0];
+    Stream<xpu>* s        = ctx.get_stream<xpu>();
+    const TBlob& in_data  = inputs[0];
     const TBlob& out_data = outputs[0];
-    size_t ts = in_data.ndim();
+    size_t ts             = in_data.ndim();
     size_t count;
     mshadow::Shape<NDim> inshape;
     for (count = 0; count < ts; count++) {
       inshape[count] = static_cast<index_t>((in_data.shape_)[count]);
     }
 
-    Tensor<xpu, 1, index_t> tsp = ctx.requested[0].
-                                  get_space_typed<xpu, 1, index_t>(Shape1(2*ts), s);
-    Tensor<cpu, 1, index_t> ta(reinterpret_cast<index_t*>(inshape.shape_),
-                               Shape1(ts), ctx.get_stream<cpu>());
-    Tensor<xpu, 1, index_t> ti(reinterpret_cast<index_t*>(tsp.dptr_),
-                               Shape1(ts), ctx.get_stream<xpu>());
+    Tensor<xpu, 1, index_t> tsp =
+        ctx.requested[0].get_space_typed<xpu, 1, index_t>(Shape1(2 * ts), s);
+    Tensor<cpu, 1, index_t> ta(
+        reinterpret_cast<index_t*>(inshape.shape_), Shape1(ts), ctx.get_stream<cpu>());
+    Tensor<xpu, 1, index_t> ti(
+        reinterpret_cast<index_t*>(tsp.dptr_), Shape1(ts), ctx.get_stream<xpu>());
     mshadow::Copy(ti, ta, ctx.get_stream<xpu>());
 
     mshadow::Shape<NDim> outshape;
@@ -857,18 +881,16 @@ void NumpyPadOpBackward(const nnvm::NodeAttrs& attrs,
     }
     index_t* wcp = tsp.dptr_;
     wcp += ts;
-    Tensor<cpu, 1, index_t> tb(reinterpret_cast<index_t*>(outshape.shape_),
-                               Shape1(ts), ctx.get_stream<cpu>());
-    Tensor<xpu, 1, index_t> to(reinterpret_cast<index_t*>(wcp), Shape1(ts),
-                               ctx.get_stream<xpu>());
+    Tensor<cpu, 1, index_t> tb(
+        reinterpret_cast<index_t*>(outshape.shape_), Shape1(ts), ctx.get_stream<cpu>());
+    Tensor<xpu, 1, index_t> to(reinterpret_cast<index_t*>(wcp), Shape1(ts), ctx.get_stream<xpu>());
     mshadow::Copy(to, tb, ctx.get_stream<xpu>());
     const NumpyPadParam& param = nnvm::get<NumpyPadParam>(attrs.parsed);
 
     index_t* wt = reinterpret_cast<index_t*>(to.dptr_);
     index_t* wi = reinterpret_cast<index_t*>(ti.dptr_);
 
-    NumpyPadOpBackImpl<xpu>(in_data, out_data, wi,
-                            wt, out_data.Size(), param, req, s);
+    NumpyPadOpBackImpl<xpu>(in_data, out_data, wi, wt, out_data.Size(), param, req, s);
   })
 }
 
diff --git a/src/operator/numpy/np_pad_op.cc b/src/operator/numpy/np_pad_op.cc
index 4ca231433252..77cd014a4218 100644
--- a/src/operator/numpy/np_pad_op.cc
+++ b/src/operator/numpy/np_pad_op.cc
@@ -52,9 +52,9 @@ inline bool NumpyPadOpShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-inline bool NumpyPadOpType(const nnvm::NodeAttrs &attrs,
-                           std::vector<int> *in_attrs,
-                           std::vector<int> *out_attrs) {
+inline bool NumpyPadOpType(const nnvm::NodeAttrs& attrs,
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -66,34 +66,32 @@ inline bool NumpyPadOpType(const nnvm::NodeAttrs &attrs,
 DMLC_REGISTER_PARAMETER(NumpyPadParam);
 
 NNVM_REGISTER_OP(_npi_pad)
-.set_attr_parser(ParamParser<NumpyPadParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyPadOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyPadOpType)
-.set_attr<FCompute>("FCompute<cpu>", NumpyPadOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_pad"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyPadParam::__FIELDS__())
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_attr_parser(ParamParser<NumpyPadParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyPadOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyPadOpType)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyPadOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_pad"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyPadParam::__FIELDS__())
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(_backward_npi_pad)
-.set_attr_parser(ParamParser<NumpyPadParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyPadOpBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_attr_parser(ParamParser<NumpyPadParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyPadOpBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_pad_op.cu b/src/operator/numpy/np_pad_op.cu
index 77cf76fbb1c0..6a89134f5191 100644
--- a/src/operator/numpy/np_pad_op.cu
+++ b/src/operator/numpy/np_pad_op.cu
@@ -29,11 +29,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_pad)
-.set_attr<FCompute>("FCompute<gpu>", NumpyPadOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_pad).set_attr<FCompute>("FCompute<gpu>", NumpyPadOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_npi_pad)
-.set_attr<FCompute>("FCompute<gpu>", NumpyPadOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_npi_pad).set_attr<FCompute>("FCompute<gpu>", NumpyPadOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_percentile_op-inl.h b/src/operator/numpy/np_percentile_op-inl.h
index 80d275f8872c..45c2c5bd766e 100644
--- a/src/operator/numpy/np_percentile_op-inl.h
+++ b/src/operator/numpy/np_percentile_op-inl.h
@@ -19,7 +19,7 @@
 /*!
  * Copyright (c) 2019 by Contributors
  * \file np_percentile_op-inl.h
-*/
+ */
 
 #ifndef MXNET_OPERATOR_NUMPY_NP_PERCENTILE_OP_INL_H_
 #define MXNET_OPERATOR_NUMPY_NP_PERCENTILE_OP_INL_H_
@@ -39,8 +39,8 @@ namespace mxnet {
 namespace op {
 
 namespace percentile_enum {
-enum PercentileType {kLinear, kLower, kHigher, kMidpoint, kNearest};
-}  // percentile_enum
+enum PercentileType { kLinear, kLower, kHigher, kMidpoint, kNearest };
+}  // namespace percentile_enum
 
 struct NumpyPercentileParam : public dmlc::Parameter<NumpyPercentileParam> {
   dmlc::optional<mxnet::Tuple<int>> axis;
@@ -49,39 +49,43 @@ struct NumpyPercentileParam : public dmlc::Parameter<NumpyPercentileParam> {
   dmlc::optional<double> q_scalar;
   DMLC_DECLARE_PARAMETER(NumpyPercentileParam) {
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<mxnet::Tuple<int>>())
-      .describe("Axis or axes along which a sum is performed. The default, axis=None, will sum "
-                "all of the elements of the input array. If axis is negative it counts from the "
-                "last to the first axis.");
-    DMLC_DECLARE_FIELD(interpolation).set_default(percentile_enum::kLinear)
-      .add_enum("linear", percentile_enum::kLinear)
-      .add_enum("lower", percentile_enum::kLower)
-      .add_enum("higher", percentile_enum::kHigher)
-      .add_enum("midpoint", percentile_enum::kMidpoint)
-      .add_enum("nearest", percentile_enum::kNearest)
-      .describe("his optional parameter specifies the interpolation method to use when the"
-                "desired percentile lies between two data points i < j");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axes are left "
-                "in the result as dimension with size one.");
-    DMLC_DECLARE_FIELD(q_scalar).set_default(dmlc::optional<double>())
-      .describe("inqut q is a scalar");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Axis or axes along which a sum is performed. The default, axis=None, will sum "
+            "all of the elements of the input array. If axis is negative it counts from the "
+            "last to the first axis.");
+    DMLC_DECLARE_FIELD(interpolation)
+        .set_default(percentile_enum::kLinear)
+        .add_enum("linear", percentile_enum::kLinear)
+        .add_enum("lower", percentile_enum::kLower)
+        .add_enum("higher", percentile_enum::kHigher)
+        .add_enum("midpoint", percentile_enum::kMidpoint)
+        .add_enum("nearest", percentile_enum::kNearest)
+        .describe(
+            "his optional parameter specifies the interpolation method to use when the"
+            "desired percentile lies between two data points i < j");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axes are left "
+        "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(q_scalar)
+        .set_default(dmlc::optional<double>())
+        .describe("inqut q is a scalar");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, keepdims_s, q_scalar_s;
     axis_s << axis;
     keepdims_s << keepdims;
     q_scalar_s << q_scalar;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]          = axis_s.str();
     (*dict)["interpolation"] = MXNetPercentileType2String(interpolation);
-    (*dict)["keepdims"] = keepdims_s.str();
-    (*dict)["q_scalar"] = q_scalar_s.str();
+    (*dict)["keepdims"]      = keepdims_s.str();
+    (*dict)["q_scalar"]      = q_scalar_s.str();
   }
 };
 
-template<int NDim>
+template <int NDim>
 struct percentile_take {
-  template<typename DType, typename QType, typename OType>
+  template <typename DType, typename QType, typename OType>
   MSHADOW_XINLINE static void Map(int i,
                                   OType* out,
                                   const QType* q,
@@ -97,11 +101,11 @@ struct percentile_take {
 
     Shape<NDim> t_coord(t_shape);
 
-    for (int j = 0; j < NDim-1; ++j) {
-      t_coord[j] = r_coord[j+1];
+    for (int j = 0; j < NDim - 1; ++j) {
+      t_coord[j] = r_coord[j + 1];
     }
 
-    float idx = q[q_idx] * (t_shape[NDim-1]-1) / 100.0;
+    float idx        = q[q_idx] * (t_shape[NDim - 1] - 1) / 100.0;
     int integral_idx = -1;
     if (interpolation == percentile_enum::kLower) {
       integral_idx = floor(idx);
@@ -114,58 +118,59 @@ struct percentile_take {
     }
 
     if (integral_idx >= 0) {
-      t_coord[NDim-1] = integral_idx;
-      size_t t_idx = ravel(t_coord, t_shape);
-      out[i] = static_cast<OType> (a_sort[t_idx]);
+      t_coord[NDim - 1] = integral_idx;
+      size_t t_idx      = ravel(t_coord, t_shape);
+      out[i]            = static_cast<OType>(a_sort[t_idx]);
     } else {
-      int idx_below = floor(idx);
-      int idx_above = idx_below + 1;
-      idx_above = idx_above > t_shape[NDim-1] - 1 ? t_shape[NDim-1] - 1 : idx_above;
+      int idx_below      = floor(idx);
+      int idx_above      = idx_below + 1;
+      idx_above          = idx_above > t_shape[NDim - 1] - 1 ? t_shape[NDim - 1] - 1 : idx_above;
       float weight_above = idx - idx_below;
       float weight_below = 1 - weight_above;
-      t_coord[NDim-1] = idx_below;
-      size_t t_idx1 = ravel(t_coord, t_shape);
-      size_t t_idx2 = t_idx1 + (idx_above - idx_below);
-      OType x1 = static_cast<OType>(a_sort[t_idx1] * weight_below);
-      OType x2 = static_cast<OType>(a_sort[t_idx2] * weight_above);
-      out[i] = x1 + x2;
+      t_coord[NDim - 1]  = idx_below;
+      size_t t_idx1      = ravel(t_coord, t_shape);
+      size_t t_idx2      = t_idx1 + (idx_above - idx_below);
+      OType x1           = static_cast<OType>(a_sort[t_idx1] * weight_below);
+      OType x2           = static_cast<OType>(a_sort[t_idx2] * weight_above);
+      out[i]             = x1 + x2;
     }
   }
 };
 
-template<typename QType, typename xpu>
-bool CheckInvalidInput(mshadow::Stream<xpu> *s,
-                       const QType *data,
+template <typename QType, typename xpu>
+bool CheckInvalidInput(mshadow::Stream<xpu>* s,
+                       const QType* data,
                        const size_t& data_size,
                        char* is_valid_ptr);
 
-template<typename xpu>
+template <typename xpu>
 void NumpyPercentileForward(const nnvm::NodeAttrs& attrs,
-                            const OpContext &ctx,
-                            const std::vector<TBlob> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<TBlob> &outputs) {
-  if (req[0] == kNullOp) return;
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
+  if (req[0] == kNullOp)
+    return;
   using namespace mxnet;
   using namespace mxnet_op;
   CHECK_GE(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob &data = inputs[0];
-  const TBlob &out = outputs[0];
-  const NumpyPercentileParam& param = nnvm::get<NumpyPercentileParam>(attrs.parsed);
-  const int interpolation = param.interpolation;
+  Stream<xpu>* s                         = ctx.get_stream<xpu>();
+  const TBlob& data                      = inputs[0];
+  const TBlob& out                       = outputs[0];
+  const NumpyPercentileParam& param      = nnvm::get<NumpyPercentileParam>(attrs.parsed);
+  const int interpolation                = param.interpolation;
   dmlc::optional<mxnet::Tuple<int>> axis = param.axis;
-  dmlc::optional<double> q_scalar = param.q_scalar;
+  dmlc::optional<double> q_scalar        = param.q_scalar;
 
   auto small = NumpyReduceAxesShapeImpl(data.shape_, axis, false);
 
   TShape r_shape;
-  r_shape = TShape(small.ndim()+1, 1);
-  r_shape[0] = q_scalar.has_value()? 1 : inputs[1].Size();
+  r_shape    = TShape(small.ndim() + 1, 1);
+  r_shape[0] = q_scalar.has_value() ? 1 : inputs[1].Size();
   for (int i = 1; i < r_shape.ndim(); ++i) {
-    r_shape[i] = small[i-1];
+    r_shape[i] = small[i - 1];
   }
   // Origin axes
   TShape axes;
@@ -176,7 +181,7 @@ void NumpyPercentileForward(const nnvm::NodeAttrs& attrs,
     }
   } else {
     auto axis_tuple = axis.value();
-    axes = TShape(axis_tuple.ndim(), 1);
+    axes            = TShape(axis_tuple.ndim(), 1);
     for (int i = 0; i < axis_tuple.ndim(); ++i) {
       if (axis_tuple[i] < 0) {
         axes[i] = axis_tuple[i] + data.shape_.ndim();
@@ -201,10 +206,10 @@ void NumpyPercentileForward(const nnvm::NodeAttrs& attrs,
     }
   }
   for (int jj = j; jj < t_axes.ndim(); ++jj) {
-    t_axes[jj] = axes[jj-j];
+    t_axes[jj] = axes[jj - j];
   }
   // Transpose Shape with reduced dims at dim [-1]
-  TShape t_shape(small.ndim()+1, 1);
+  TShape t_shape(small.ndim() + 1, 1);
   for (int i = 0; i < small.ndim(); ++i) {
     t_shape[i] = small[i];
   }
@@ -212,32 +217,32 @@ void NumpyPercentileForward(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < axes.ndim(); ++i) {
     red_size *= data.shape_[axes[i]];
   }
-  t_shape[t_shape.ndim()-1] = red_size;
+  t_shape[t_shape.ndim() - 1] = red_size;
   // Transpose Shape extension
   TShape t_shape_ex(data.shape_.ndim(), 1);
   for (int i = 0; i < data.shape_.ndim(); ++i) {
     t_shape_ex[i] = data.shape_[t_axes[i]];
   }
   TopKParam topk_param = TopKParam();
-  topk_param.axis = dmlc::optional<int>(-1);
+  topk_param.axis      = dmlc::optional<int>(-1);
   topk_param.is_ascend = true;
-  topk_param.k = 0;
-  topk_param.ret_typ = topk_enum::kReturnValue;
+  topk_param.k         = 0;
+  topk_param.ret_typ   = topk_enum::kReturnValue;
 
   MSHADOW_TYPE_SWITCH(data.type_flag_, DType, {
     size_t temp_size;  // Used by Sort
     size_t topk_workspace_size = TopKWorkspaceSize<xpu, DType>(data, topk_param, &temp_size);
 
     size_t temp_data_size = data.Size() * sizeof(DType);
-    size_t idx_size = data.Size() * sizeof(index_t);
-    size_t temp_mem_size = 2 * temp_data_size + idx_size;
+    size_t idx_size       = data.Size() * sizeof(index_t);
+    size_t temp_mem_size  = 2 * temp_data_size + idx_size;
     size_t workspace_size = topk_workspace_size * 2 + temp_mem_size + 16;
 
     Tensor<xpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 
     char* workspace_curr_ptr = temp_mem.dptr_;
-    DType* trans_ptr, *sort_ptr;
+    DType *trans_ptr, *sort_ptr;
     index_t* idx_ptr;
     TBlob percentile;
     double q;
@@ -245,53 +250,57 @@ void NumpyPercentileForward(const nnvm::NodeAttrs& attrs,
     if (q_scalar.has_value()) {
       q = q_scalar.value();
       Tensor<cpu, 1, double> host_q(&q, Shape1(1), ctx.get_stream<cpu>());
-      Tensor<xpu, 1, double> device_q(reinterpret_cast<double*>(workspace_curr_ptr),
-                                      Shape1(1), ctx.get_stream<xpu>());
+      Tensor<xpu, 1, double> device_q(
+          reinterpret_cast<double*>(workspace_curr_ptr), Shape1(1), ctx.get_stream<xpu>());
       mshadow::Copy(device_q, host_q, ctx.get_stream<xpu>());
       percentile = TBlob(device_q.dptr_, TShape(0, 1), xpu::kDevMask);
       workspace_curr_ptr += 8;
     } else {
       percentile = inputs[1];
-    }   // handle input q is a scalar
+    }  // handle input q is a scalar
 
     char* is_valid_ptr = reinterpret_cast<char*>(workspace_curr_ptr);
     MSHADOW_TYPE_SWITCH(percentile.type_flag_, QType, {
-      bool is_valid = CheckInvalidInput<QType, xpu>(s, percentile.dptr<QType>(),
-                                                    percentile.Size(), is_valid_ptr);
-      CHECK(is_valid)<< "ValueError: percentile exceeds the valid range";
-    })   // check the invalid percentile
+      bool is_valid = CheckInvalidInput<QType, xpu>(
+          s, percentile.dptr<QType>(), percentile.Size(), is_valid_ptr);
+      CHECK(is_valid) << "ValueError: percentile exceeds the valid range";
+    })  // check the invalid percentile
     workspace_curr_ptr += 8;
 
     if (sizeof(DType) >= sizeof(index_t)) {
       trans_ptr = reinterpret_cast<DType*>(workspace_curr_ptr);
-      sort_ptr = reinterpret_cast<DType*>(workspace_curr_ptr + temp_data_size);
-      idx_ptr = reinterpret_cast<index_t*>(workspace_curr_ptr + 2 * temp_data_size);
+      sort_ptr  = reinterpret_cast<DType*>(workspace_curr_ptr + temp_data_size);
+      idx_ptr   = reinterpret_cast<index_t*>(workspace_curr_ptr + 2 * temp_data_size);
     } else {
-      idx_ptr = reinterpret_cast<index_t*>(workspace_curr_ptr);
+      idx_ptr   = reinterpret_cast<index_t*>(workspace_curr_ptr);
       trans_ptr = reinterpret_cast<DType*>(workspace_curr_ptr + idx_size);
-      sort_ptr = reinterpret_cast<DType*>(workspace_curr_ptr + temp_data_size + idx_size);
+      sort_ptr  = reinterpret_cast<DType*>(workspace_curr_ptr + temp_data_size + idx_size);
     }
     workspace_curr_ptr += 2 * temp_data_size + idx_size;
 
     TBlob a_trans = TBlob(trans_ptr, t_shape_ex, xpu::kDevMask);
     TransposeImpl<xpu>(ctx.run_ctx, data, a_trans, t_axes);
-    TBlob a_sort = TBlob(sort_ptr, t_shape, xpu::kDevMask);
-    TBlob a_idx = TBlob(idx_ptr, t_shape, xpu::kDevMask);
+    TBlob a_sort                    = TBlob(sort_ptr, t_shape, xpu::kDevMask);
+    TBlob a_idx                     = TBlob(idx_ptr, t_shape, xpu::kDevMask);
     std::vector<OpReqType> req_TopK = {kWriteTo, kNullOp};
-    TBlob src = a_trans.reshape(t_shape);
-    std::vector<TBlob> ret = {a_sort, a_idx};
+    TBlob src                       = a_trans.reshape(t_shape);
+    std::vector<TBlob> ret          = {a_sort, a_idx};
 
-    TopKImplwithWorkspace<xpu, DType, index_t>(ctx.run_ctx, req_TopK, src, ret, topk_param,
-                                               workspace_curr_ptr, temp_size, s);
-    MSHADOW_TYPE_SWITCH(percentile.type_flag_, QType, {
-      MSHADOW_SGL_DBL_TYPE_SWITCH(out.type_flag_, OType, {
-        MXNET_NDIM_SWITCH(small.ndim()+1, NDim, {
-          Kernel<percentile_take<NDim>, xpu>::Launch(
-            s, r_shape.Size(), out.dptr<OType>(), percentile.dptr<QType>(), a_sort.dptr<DType>(),
-            interpolation, t_shape.get<NDim>(), r_shape.get<NDim>());
-        })
-      })
-    })
+    TopKImplwithWorkspace<xpu, DType, index_t>(
+        ctx.run_ctx, req_TopK, src, ret, topk_param, workspace_curr_ptr, temp_size, s);
+    MSHADOW_TYPE_SWITCH(percentile.type_flag_,
+                        QType,
+                        {MSHADOW_SGL_DBL_TYPE_SWITCH(
+                            out.type_flag_, OType, {MXNET_NDIM_SWITCH(small.ndim() + 1, NDim, {
+                              Kernel<percentile_take<NDim>, xpu>::Launch(s,
+                                                                         r_shape.Size(),
+                                                                         out.dptr<OType>(),
+                                                                         percentile.dptr<QType>(),
+                                                                         a_sort.dptr<DType>(),
+                                                                         interpolation,
+                                                                         t_shape.get<NDim>(),
+                                                                         r_shape.get<NDim>());
+                            })})})
   })
 }
 
diff --git a/src/operator/numpy/np_percentile_op.cc b/src/operator/numpy/np_percentile_op.cc
index c57b0bc16a13..cfe2bd1d7dda 100644
--- a/src/operator/numpy/np_percentile_op.cc
+++ b/src/operator/numpy/np_percentile_op.cc
@@ -20,7 +20,7 @@
  * Copyright (c) 2019 by Contributors
  * \file np_percentile_op.cc
  * \brief CPU Implementation of Numpy-compatible percentile
-*/
+ */
 
 #include <string>
 #include "np_percentile_op-inl.h"
@@ -28,9 +28,11 @@
 namespace mxnet {
 namespace op {
 
-template<typename QType, typename cpu>
-bool CheckInvalidInput(mshadow::Stream<cpu> *s, const QType *data,
-                       const size_t& data_size, char* is_valid_ptr) {
+template <typename QType, typename cpu>
+bool CheckInvalidInput(mshadow::Stream<cpu>* s,
+                       const QType* data,
+                       const size_t& data_size,
+                       char* is_valid_ptr) {
   for (size_t i = 0; i < data_size; i++) {
     if (data[i] < 0.0 || data[i] > 100) {
       return false;
@@ -40,8 +42,8 @@ bool CheckInvalidInput(mshadow::Stream<cpu> *s, const QType *data,
 }
 
 inline bool NumpyPercentileShape(const nnvm::NodeAttrs& attrs,
-                                 std::vector<TShape> *in_attrs,
-                                 std::vector<TShape> *out_attrs) {
+                                 std::vector<TShape>* in_attrs,
+                                 std::vector<TShape>* out_attrs) {
   CHECK_GE(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   if (!shape_is_known(in_attrs->at(0))) {
@@ -50,15 +52,15 @@ inline bool NumpyPercentileShape(const nnvm::NodeAttrs& attrs,
   const NumpyPercentileParam& param = nnvm::get<NumpyPercentileParam>(attrs.parsed);
   mxnet::TShape shape = NumpyReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims);
 
-  mxnet::TShape qshape = param.q_scalar.has_value()? mxnet::TShape(0, 1) : in_attrs->at(1);
+  mxnet::TShape qshape = param.q_scalar.has_value() ? mxnet::TShape(0, 1) : in_attrs->at(1);
   CHECK_LE(qshape.ndim(), 1U);
 
   if (qshape.ndim() == 0) {
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, shape);
   } else {
-    mxnet::TShape oshape(shape.ndim() + 1 , -1);
+    mxnet::TShape oshape(shape.ndim() + 1, -1);
     oshape[0] = qshape[0];
-    for (int i = 1 ; i < oshape.ndim(); i ++)
+    for (int i = 1; i < oshape.ndim(); i++)
       oshape[i] = shape[i - 1];
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
   }
@@ -66,8 +68,8 @@ inline bool NumpyPercentileShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NumpyPercentileType(const nnvm::NodeAttrs& attrs,
-                                std::vector<int> *in_attrs,
-                                std::vector<int> *out_attrs) {
+                                std::vector<int>* in_attrs,
+                                std::vector<int>* out_attrs) {
   CHECK_GE(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -82,34 +84,32 @@ inline bool NumpyPercentileType(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyPercentileParam);
 
 NNVM_REGISTER_OP(_npi_percentile)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const NumpyPercentileParam& param =
-    nnvm::get<NumpyPercentileParam>(attrs.parsed);
-  return param.q_scalar.has_value()? 1 : 2;
-  })
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyPercentileParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyPercentileShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyPercentileType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyPercentileParam& param =
-      nnvm::get<NumpyPercentileParam>(attrs.parsed);
-    return param.q_scalar.has_value() ?
-           std::vector<std::string>{"a"} :
-           std::vector<std::string>{"a", "q"};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyPercentileForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("a", "NDArray-or-Symbol", "Input data")
-.add_argument("q", "NDArray-or-Symbol", "Input percentile")
-.add_arguments(NumpyPercentileParam::__FIELDS__());
-
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const NumpyPercentileParam& param = nnvm::get<NumpyPercentileParam>(attrs.parsed);
+      return param.q_scalar.has_value() ? 1 : 2;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyPercentileParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyPercentileShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyPercentileType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyPercentileParam& param =
+                                           nnvm::get<NumpyPercentileParam>(attrs.parsed);
+                                       return param.q_scalar.has_value()
+                                                  ? std::vector<std::string>{"a"}
+                                                  : std::vector<std::string>{"a", "q"};
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyPercentileForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("a", "NDArray-or-Symbol", "Input data")
+    .add_argument("q", "NDArray-or-Symbol", "Input percentile")
+    .add_arguments(NumpyPercentileParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_percentile_op.cu b/src/operator/numpy/np_percentile_op.cu
index b24c230d6216..6e85bbd8bded 100644
--- a/src/operator/numpy/np_percentile_op.cu
+++ b/src/operator/numpy/np_percentile_op.cu
@@ -20,7 +20,7 @@
  * Copyright (c) 2019 by Contributors
  * \file np_percentile_op.cu
  * \brief GPU Implementation of Numpy-compatible percentile
-*/
+ */
 
 #include "np_percentile_op-inl.h"
 
@@ -28,27 +28,32 @@ namespace mxnet {
 namespace op {
 
 struct is_valid_check {
-  template<typename QType>
+  template <typename QType>
   MSHADOW_XINLINE static void Map(int i, char* invalid_ptr, const QType* data) {
-    if (data[i] < 0.0 || data[i] > 100) *invalid_ptr = 1;
+    if (data[i] < 0.0 || data[i] > 100)
+      *invalid_ptr = 1;
   }
 };
 
-template<typename QType, typename gpu>
-bool CheckInvalidInput(mshadow::Stream<gpu> *s, const QType *data,
-                       const size_t& data_size, char* is_valid_ptr) {
+template <typename QType, typename gpu>
+bool CheckInvalidInput(mshadow::Stream<gpu>* s,
+                       const QType* data,
+                       const size_t& data_size,
+                       char* is_valid_ptr) {
   using namespace mxnet_op;
   int32_t is_valid = 0;
   Kernel<set_zero, gpu>::Launch(s, 1, is_valid_ptr);
   Kernel<is_valid_check, gpu>::Launch(s, data_size, is_valid_ptr, data);
-  CUDA_CALL(cudaMemcpyAsync(&is_valid, is_valid_ptr, sizeof(char),
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaMemcpyAsync(&is_valid,
+                            is_valid_ptr,
+                            sizeof(char),
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
   CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
   return is_valid == 0;
 }
 
-NNVM_REGISTER_OP(_npi_percentile)
-.set_attr<FCompute>("FCompute<gpu>", NumpyPercentileForward<gpu>);
+NNVM_REGISTER_OP(_npi_percentile).set_attr<FCompute>("FCompute<gpu>", NumpyPercentileForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_polynomial_op-inl.h b/src/operator/numpy/np_polynomial_op-inl.h
index a2cc044f25f6..e30ae9821a11 100644
--- a/src/operator/numpy/np_polynomial_op-inl.h
+++ b/src/operator/numpy/np_polynomial_op-inl.h
@@ -33,13 +33,12 @@
 #include "../../common/utils.h"
 #include "../tensor/elemwise_binary_broadcast_op.h"
 
-
 namespace mxnet {
 namespace op {
 
 inline bool NumpyPolyvalShape(const nnvm::NodeAttrs& attrs,
-                              mxnet::ShapeVector *in_attrs,
-                              mxnet::ShapeVector *out_attrs) {
+                              mxnet::ShapeVector* in_attrs,
+                              mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -52,9 +51,9 @@ inline bool NumpyPolyvalShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(*in_attrs) && shape_is_known(*out_attrs);
 }
 
-template<int req>
+template <int req>
 struct polyval_forward {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i,
                                   DType* out_data,
                                   const DType* p_data,
@@ -62,13 +61,13 @@ struct polyval_forward {
                                   const index_t p_size) {
     DType val = 0;
     for (index_t j = 0; j < p_size; j++) {
-        val = val * x_data[i] + p_data[j];
+      val = val * x_data[i] + p_data[j];
     }
     KERNEL_ASSIGN(out_data[i], req, val);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyPolyvalForward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -78,18 +77,21 @@ void NumpyPolyvalForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& p_data = inputs[0];
-  const TBlob& x_data = inputs[1];
-  const TBlob& out_data = outputs[0];
-  const size_t p_size = p_data.Size();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob& p_data     = inputs[0];
+  const TBlob& x_data     = inputs[1];
+  const TBlob& out_data   = outputs[0];
+  const size_t p_size     = p_data.Size();
   using namespace mxnet_op;
 
   MSHADOW_TYPE_SWITCH(x_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<polyval_forward<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(),
-          p_data.dptr<DType>(), x_data.dptr<DType>(), p_size);
+      Kernel<polyval_forward<req_type>, xpu>::Launch(s,
+                                                     out_data.Size(),
+                                                     out_data.dptr<DType>(),
+                                                     p_data.dptr<DType>(),
+                                                     x_data.dptr<DType>(),
+                                                     p_size);
     });
   });
 }
diff --git a/src/operator/numpy/np_polynomial_op.cc b/src/operator/numpy/np_polynomial_op.cc
index 4018964263dd..d54443f3c9f6 100644
--- a/src/operator/numpy/np_polynomial_op.cc
+++ b/src/operator/numpy/np_polynomial_op.cc
@@ -20,7 +20,7 @@
 /*!
  * Copyright (c) 202o by Contributors
  * \file np_polynomial_op.cc
-*/
+ */
 
 #include <cmath>
 #include "np_polynomial_op-inl.h"
@@ -28,34 +28,41 @@
 namespace mxnet {
 namespace op {
 
-template<int req>
+template <int req>
 struct polyval_backward_x {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType* p_dptr, const DType* x_dptr,
-                                  DType* igrad_x_dptr, const DType* ograd_dptr,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* p_dptr,
+                                  const DType* x_dptr,
+                                  DType* igrad_x_dptr,
+                                  const DType* ograd_dptr,
                                   const index_t p_size) {
     DType igrad_x = 0;
-    index_t j = p_size - 1;
+    index_t j     = p_size - 1;
     while (j > 0) {
-        igrad_x = igrad_x * x_dptr[i] + p_dptr[p_size - j - 1] * j;
-        j--;
+      igrad_x = igrad_x * x_dptr[i] + p_dptr[p_size - j - 1] * j;
+      j--;
     }
     KERNEL_ASSIGN(igrad_x_dptr[i], req, igrad_x * ograd_dptr[i]);
   }
 };
 
-template<int req>
+template <int req>
 struct polyval_backward_p {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType* p_dptr, const DType* x_dptr,
-                                  DType* igrad_p_dptr, const DType* ograd_dptr,
-                                  const index_t p_size, const index_t x_size) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* p_dptr,
+                                  const DType* x_dptr,
+                                  DType* igrad_p_dptr,
+                                  const DType* ograd_dptr,
+                                  const index_t p_size,
+                                  const index_t x_size) {
     DType igrad_p = 0;
-    index_t j = x_size - 1;
+    index_t j     = x_size - 1;
     while (j >= 0) {
-        igrad_p += pow(x_dptr[j], static_cast<DType>(p_size) -
-                                  static_cast<DType>(i + 1)) * ograd_dptr[j];
-        j--;
+      igrad_p +=
+          pow(x_dptr[j], static_cast<DType>(p_size) - static_cast<DType>(i + 1)) * ograd_dptr[j];
+      j--;
     }
     KERNEL_ASSIGN(igrad_p_dptr[i], req, igrad_p);
   }
@@ -70,52 +77,60 @@ void NumpyPolyvalBackwardCPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_NE(req[0], kWriteInplace);
 
-  if (inputs[1].type_flag_ != inputs[2].type_flag_ ||
-      !common::is_float(inputs[1].type_flag_) ||
+  if (inputs[1].type_flag_ != inputs[2].type_flag_ || !common::is_float(inputs[1].type_flag_) ||
       !common::is_float(inputs[2].type_flag_)) {
-        return;
+    return;
   }
 
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
-  const TBlob& ograd = inputs[0];
-  const TBlob& p = inputs[1];
-  const TBlob& x = inputs[2];
-  const TBlob& igrad_p = outputs[0];
-  const TBlob& igrad_x = outputs[1];
-  const size_t p_size = p.Size();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
+  const TBlob& ograd      = inputs[0];
+  const TBlob& p          = inputs[1];
+  const TBlob& x          = inputs[2];
+  const TBlob& igrad_p    = outputs[0];
+  const TBlob& igrad_x    = outputs[1];
+  const size_t p_size     = p.Size();
 
   using namespace mxnet_op;
   MSHADOW_REAL_TYPE_SWITCH(ograd.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<polyval_backward_x<req_type>, cpu>::Launch(
-        s, ograd.Size(), p.dptr<DType>(), x.dptr<DType>(),
-        igrad_x.dptr<DType>(), ograd.dptr<DType>(), p_size);
-      Kernel<polyval_backward_p<req_type>, cpu>::Launch(
-        s, p_size, p.dptr<DType>(), x.dptr<DType>(),
-        igrad_p.dptr<DType>(), ograd.dptr<DType>(), p_size, x.Size());
+      Kernel<polyval_backward_x<req_type>, cpu>::Launch(s,
+                                                        ograd.Size(),
+                                                        p.dptr<DType>(),
+                                                        x.dptr<DType>(),
+                                                        igrad_x.dptr<DType>(),
+                                                        ograd.dptr<DType>(),
+                                                        p_size);
+      Kernel<polyval_backward_p<req_type>, cpu>::Launch(s,
+                                                        p_size,
+                                                        p.dptr<DType>(),
+                                                        x.dptr<DType>(),
+                                                        igrad_p.dptr<DType>(),
+                                                        ograd.dptr<DType>(),
+                                                        p_size,
+                                                        x.Size());
     });
   });
 }
 
 NNVM_REGISTER_OP(_npi_polyval)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.add_argument("p", "NDArray-or-Symbol", "polynomial coefficients")
-.add_argument("x", "NDArray-or-Symbol", "variables")
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"p", "x"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyPolyvalShape)
-.set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyPolyvalForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_npi_backward_polyval"});
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .add_argument("p", "NDArray-or-Symbol", "polynomial coefficients")
+    .add_argument("x", "NDArray-or-Symbol", "variables")
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"p", "x"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyPolyvalShape)
+    .set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyPolyvalForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_npi_backward_polyval"});
 
 NNVM_REGISTER_OP(_npi_backward_polyval)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyPolyvalBackwardCPU);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<mxnet::FCompute>("FCompute<cpu>", NumpyPolyvalBackwardCPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_polynomial_op.cu b/src/operator/numpy/np_polynomial_op.cu
index 3c4655b2da22..42add2f53bf6 100644
--- a/src/operator/numpy/np_polynomial_op.cu
+++ b/src/operator/numpy/np_polynomial_op.cu
@@ -28,24 +28,28 @@
 namespace mxnet {
 namespace op {
 
-template<int req>
+template <int req>
 struct polyval_backward_gpu {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType* p_dptr, const DType* x_dptr,
-                                  DType* igrad_x_dptr, DType* igrad_p_dptr,
-                                  const DType* ograd_dptr, const index_t p_size) {
-  DType igrad_p = 1;
-  DType igrad_x = 0;
-  index_t j = p_size - 1;
-  while (j > 0) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* p_dptr,
+                                  const DType* x_dptr,
+                                  DType* igrad_x_dptr,
+                                  DType* igrad_p_dptr,
+                                  const DType* ograd_dptr,
+                                  const index_t p_size) {
+    DType igrad_p = 1;
+    DType igrad_x = 0;
+    index_t j     = p_size - 1;
+    while (j > 0) {
       // atomic add since different threads could update same variable
       atomicAdd(&igrad_p_dptr[j], igrad_p * ograd_dptr[i]);
       igrad_p *= x_dptr[i];
       igrad_x = igrad_x * x_dptr[i] + p_dptr[p_size - j - 1] * j;
       j--;
-  }
-  atomicAdd(&igrad_p_dptr[j], igrad_p * ograd_dptr[i]);
-  KERNEL_ASSIGN(igrad_x_dptr[i], req, igrad_x * ograd_dptr[i]);
+    }
+    atomicAdd(&igrad_p_dptr[j], igrad_p * ograd_dptr[i]);
+    KERNEL_ASSIGN(igrad_x_dptr[i], req, igrad_x * ograd_dptr[i]);
   }
 };
 
@@ -58,36 +62,38 @@ void NumpyPolyvalBackwardGPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_NE(req[0], kWriteInplace);
 
-  if (inputs[1].type_flag_ != inputs[2].type_flag_ ||
-    !common::is_float(inputs[1].type_flag_) ||
-    !common::is_float(inputs[2].type_flag_)) {
-      return;
+  if (inputs[1].type_flag_ != inputs[2].type_flag_ || !common::is_float(inputs[1].type_flag_) ||
+      !common::is_float(inputs[2].type_flag_)) {
+    return;
   }
 
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  const TBlob& ograd = inputs[0];
-  const TBlob& p = inputs[1];
-  const TBlob& x = inputs[2];
-  const TBlob& igrad_p = outputs[0];
-  const TBlob& igrad_x = outputs[1];
-  const size_t p_size = p.Size();
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  const TBlob& ograd      = inputs[0];
+  const TBlob& p          = inputs[1];
+  const TBlob& x          = inputs[2];
+  const TBlob& igrad_p    = outputs[0];
+  const TBlob& igrad_x    = outputs[1];
+  const size_t p_size     = p.Size();
 
   using namespace mxnet_op;
   MSHADOW_REAL_TYPE_SWITCH(ograd.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<polyval_backward_gpu<req_type>, gpu>::Launch(
-        s, ograd.Size(), p.dptr<DType>(), x.dptr<DType>(),
-        igrad_x.dptr<DType>(), igrad_p.dptr<DType>(),
-        ograd.dptr<DType>(), p_size);
+      Kernel<polyval_backward_gpu<req_type>, gpu>::Launch(s,
+                                                          ograd.Size(),
+                                                          p.dptr<DType>(),
+                                                          x.dptr<DType>(),
+                                                          igrad_x.dptr<DType>(),
+                                                          igrad_p.dptr<DType>(),
+                                                          ograd.dptr<DType>(),
+                                                          p_size);
     });
   });
 }
 
-NNVM_REGISTER_OP(_npi_polyval)
-.set_attr<mxnet::FCompute>("FCompute<gpu>", NumpyPolyvalForward<gpu>);
+NNVM_REGISTER_OP(_npi_polyval).set_attr<mxnet::FCompute>("FCompute<gpu>", NumpyPolyvalForward<gpu>);
 
 NNVM_REGISTER_OP(_npi_backward_polyval)
-.set_attr<mxnet::FCompute>("FCompute<gpu>", NumpyPolyvalBackwardGPU);
+    .set_attr<mxnet::FCompute>("FCompute<gpu>", NumpyPolyvalBackwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_repeat_op-inl.h b/src/operator/numpy/np_repeat_op-inl.h
index aa51d080e57e..f3821efb3136 100644
--- a/src/operator/numpy/np_repeat_op-inl.h
+++ b/src/operator/numpy/np_repeat_op-inl.h
@@ -46,36 +46,39 @@ struct RepeatsParam : public dmlc::Parameter<RepeatsParam> {
   dmlc::optional<mxnet::Tuple<int>> repeats;
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(RepeatsParam) {
-    DMLC_DECLARE_FIELD(repeats)
-      .describe("The number of repetitions for each element.");
+    DMLC_DECLARE_FIELD(repeats).describe("The number of repetitions for each element.");
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<int>())
-      .describe("The axis along which to repeat values."
-                " The negative numbers are interpreted counting from the backward."
-                " By default, use the flattened input array,"
-                " and return a flat output array.");
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "The axis along which to repeat values."
+            " The negative numbers are interpreted counting from the backward."
+            " By default, use the flattened input array,"
+            " and return a flat output array.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream repeats_s, axis_s;
     repeats_s << repeats;
     axis_s << axis;
     (*dict)["repeats"] = repeats_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]    = axis_s.str();
   }
 };
 
-inline void GetRepeatsParams(const RepeatsParam& param, const mxnet::TShape& ishape,
-                             int* repeats, dmlc::optional<int>* axisOpt, int* axis) {
-  *repeats = 0;
-  const mxnet::Tuple<int> &repts = param.repeats.value();
-  for (int i=0; i < repts.ndim(); i++) {
+inline void GetRepeatsParams(const RepeatsParam& param,
+                             const mxnet::TShape& ishape,
+                             int* repeats,
+                             dmlc::optional<int>* axisOpt,
+                             int* axis) {
+  *repeats                       = 0;
+  const mxnet::Tuple<int>& repts = param.repeats.value();
+  for (int i = 0; i < repts.ndim(); i++) {
     CHECK_GE(repts[i], 0) << "repeats cannot be a negative number";
     *repeats += repts[i];
   }
   *axisOpt = param.axis;
   if (static_cast<bool>(*axisOpt)) {
     int ndims = ishape.ndim();
-    *axis = axisOpt->value();
+    *axis     = axisOpt->value();
     if (*axis < 0) {
       *axis += ndims;
     }
@@ -84,13 +87,13 @@ inline void GetRepeatsParams(const RepeatsParam& param, const mxnet::TShape& ish
 }
 
 inline bool RepeatsOpShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   const RepeatsParam& param = nnvm::get<RepeatsParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& ishape = (*in_attrs)[0];
-  int repeats = 0;
+  int repeats                 = 0;
   dmlc::optional<int> axisOpt;
   int axis = -1;
   GetRepeatsParams(param, ishape, &repeats, &axisOpt, &axis);
@@ -111,110 +114,117 @@ inline bool RepeatsOpShape(const nnvm::NodeAttrs& attrs,
       }
     }
     CHECK_LT(shape.Size(), INT32_MAX) << "ValueError: np.repeat does not support large"
-      << " input tensors (containing >= 2^31 elements).";
+                                      << " input tensors (containing >= 2^31 elements).";
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, shape);
   } else {  // If axis is not input by user, return a flat 1D array of size = repeats
     repeats = param.repeats.value().ndim() == 1 ? ishape.Size() * repeats : repeats;
     mxnet::TShape shape(1, repeats);
     CHECK_LT(shape.Size(), INT32_MAX) << "ValueError: np.repeat does not support large"
-      << " input tensors (containing >= 2^31 elements).";
+                                      << " input tensors (containing >= 2^31 elements).";
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, shape);
   }
   return shape_is_known(out_attrs->at(0));
 }
 
 struct repeat_noaxis_fwd {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i, OType* out, IType* input,
-                                  const int* indx) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t i, OType* out, IType* input, const int* indx) {
     using namespace mxnet_op;
     int ind = 0;
-    while (i >= indx[ind]) ind++;
+    while (i >= indx[ind])
+      ind++;
     out[i] = input[ind];
   }
 };
 
 struct repeat_axis_fwd {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i, OType* out, IType* input,
-                                  const int* indx, int stride) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  OType* out,
+                                  IType* input,
+                                  const int* indx,
+                                  int stride) {
     using namespace mxnet_op;
     int ind_row = i / stride, ind_col = i % stride;
     int ind = 0;
-    while (ind_row >= indx[ind]) ind++;
+    while (ind_row >= indx[ind])
+      ind++;
     out[i] = input[ind * stride + ind_col];
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyRepeatsOpForward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  const TBlob& iTBlob = inputs[0];
+  const TBlob& iTBlob         = inputs[0];
   const mxnet::TShape& ishape = iTBlob.shape_;
-  if (!shape_is_known(ishape)) return;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (!shape_is_known(ishape))
+    return;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   int repeats = 0;
   dmlc::optional<int> axisOpt;
-  int axis = -1;
+  int axis                  = -1;
   const RepeatsParam& param = nnvm::get<RepeatsParam>(attrs.parsed);
   GetRepeatsParams(param, ishape, &repeats, &axisOpt, &axis);
-  if (0 == repeats) return;
+  if (0 == repeats)
+    return;
   mxnet::Tuple<int> repts = param.repeats.value();
   if (repts.ndim() == 1) {
     int len = static_cast<bool>(axisOpt) ? ishape[axis] : ishape.Size();
     std::vector<int> temp(len, repeats);
     repts = mxnet::Tuple<int>(temp);
   }
-  for (int i=1; i < repts.ndim(); i++) {
-    repts[i] += repts[i-1];
+  for (int i = 1; i < repts.ndim(); i++) {
+    repts[i] += repts[i - 1];
   }
   size_t total_temp_size = repts.ndim() * sizeof(int);
   Tensor<xpu, 1, char> temp_space =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(total_temp_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(total_temp_size), s);
   int* ind = reinterpret_cast<int*>(temp_space.dptr_);
 
   if (ctx.run_ctx.ctx.dev_mask() == gpu::kDevMask) {
-  #if MXNET_USE_CUDA
-    cudaMemcpyAsync(ind, repts.begin(), repts.ndim() * sizeof(int),
-                    cudaMemcpyHostToDevice, Stream<gpu>::GetStream(ctx.get_stream<gpu>()));
-  #else
+#if MXNET_USE_CUDA
+    cudaMemcpyAsync(ind,
+                    repts.begin(),
+                    repts.ndim() * sizeof(int),
+                    cudaMemcpyHostToDevice,
+                    Stream<gpu>::GetStream(ctx.get_stream<gpu>()));
+#else
     LOG(FATAL) << "Illegal attempt to use GPU in a CPU-only build";
-  #endif
+#endif
   } else {
     std::memcpy(ind, repts.begin(), repts.ndim() * sizeof(int));
   }
 
   if (!param.axis.has_value()) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    const TBlob& in_data = inputs[0];
-    const TBlob& out_data = outputs[0];
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    const TBlob& in_data    = inputs[0];
+    const TBlob& out_data   = outputs[0];
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-          mxnet_op::Kernel<repeat_noaxis_fwd, xpu>::Launch(
-            s, out_data.Size(), out_data.dptr<OType>(),
-            in_data.dptr<IType>(), ind);
-        });
+        mxnet_op::Kernel<repeat_noaxis_fwd, xpu>::Launch(
+            s, out_data.Size(), out_data.dptr<OType>(), in_data.dptr<IType>(), ind);
+      });
     });
   } else {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    const TBlob& in_data = inputs[0];
-    const TBlob& out_data = outputs[0];
-    int stride = 1;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    const TBlob& in_data    = inputs[0];
+    const TBlob& out_data   = outputs[0];
+    int stride              = 1;
     for (int i = 1; i < ishape.ndim(); i++) {
       stride *= ishape[i];
     }
 
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-          mxnet_op::Kernel<repeat_axis_fwd, xpu>::Launch(
-            s, out_data.Size(), out_data.dptr<OType>(),
-            in_data.dptr<IType>(), ind, stride);
-        });
+        mxnet_op::Kernel<repeat_axis_fwd, xpu>::Launch(
+            s, out_data.Size(), out_data.dptr<OType>(), in_data.dptr<IType>(), ind, stride);
+      });
     });
   }
 }
diff --git a/src/operator/numpy/np_repeat_op.cc b/src/operator/numpy/np_repeat_op.cc
index ad8803ba02d1..43e676aa1bb2 100644
--- a/src/operator/numpy/np_repeat_op.cc
+++ b/src/operator/numpy/np_repeat_op.cc
@@ -18,10 +18,10 @@
  */
 
 /*!
-* Copyright (c) 2019 by Contributors
-* \file np_repeat_op.cc
-* \brief CPU implementation of numpy repeat operator
-*/
+ * Copyright (c) 2019 by Contributors
+ * \file np_repeat_op.cc
+ * \brief CPU implementation of numpy repeat operator
+ */
 
 #include "./np_repeat_op-inl.h"
 #include "../tensor/matrix_op-inl.h"
@@ -32,19 +32,19 @@ namespace op {
 DMLC_REGISTER_PARAMETER(RepeatsParam);
 
 NNVM_REGISTER_OP(_npi_repeats)
-.set_attr_parser(ParamParser<RepeatsParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", RepeatsOpShape)
-.set_attr<nnvm::FInferType>("FInferType", RepeatOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-     return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", NumpyRepeatsOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Input data array")
-.add_arguments(RepeatsParam::__FIELDS__());
+    .set_attr_parser(ParamParser<RepeatsParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", RepeatsOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", RepeatOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyRepeatsOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Input data array")
+    .add_arguments(RepeatsParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_repeat_op.cu b/src/operator/numpy/np_repeat_op.cu
index 4f57278df38b..cb4bf64930d2 100644
--- a/src/operator/numpy/np_repeat_op.cu
+++ b/src/operator/numpy/np_repeat_op.cu
@@ -1,35 +1,34 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 
 /*!
-*  Copyright (c) 2015 by Contributors
-* \file np_repeat_op.cu
-* \brief GPU Implementation of numpy-compatible repeat operator
-*/
+ *  Copyright (c) 2015 by Contributors
+ * \file np_repeat_op.cu
+ * \brief GPU Implementation of numpy-compatible repeat operator
+ */
 #include <cub/cub.cuh>
 #include "./np_repeat_op-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_repeats)
-.set_attr<FCompute>("FCompute<gpu>", NumpyRepeatsOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_repeats).set_attr<FCompute>("FCompute<gpu>", NumpyRepeatsOpForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_tensordot_op-inl.h b/src/operator/numpy/np_tensordot_op-inl.h
index 47e42d01d6a6..7327d7d11352 100644
--- a/src/operator/numpy/np_tensordot_op-inl.h
+++ b/src/operator/numpy/np_tensordot_op-inl.h
@@ -105,8 +105,8 @@ inline void GetReorderedAxes(const mxnet::Tuple<int>& a_axes_summed,
     a_axes_remained_vector.push_back(i);
   }
   for (auto& i : a_axes_summed) {
-    a_axes_remained_vector.erase(std::find(a_axes_remained_vector.begin(),
-      a_axes_remained_vector.end(), i));
+    a_axes_remained_vector.erase(
+        std::find(a_axes_remained_vector.begin(), a_axes_remained_vector.end(), i));
   }
   *a_axes_remained = mxnet::Tuple<int>(a_axes_remained_vector);
 
@@ -121,8 +121,8 @@ inline void GetReorderedAxes(const mxnet::Tuple<int>& a_axes_summed,
     b_axes_remained_vector.push_back(i);
   }
   for (auto& i : b_axes_summed) {
-    b_axes_remained_vector.erase(std::find(b_axes_remained_vector.begin(),
-                                           b_axes_remained_vector.end(), i));
+    b_axes_remained_vector.erase(
+        std::find(b_axes_remained_vector.begin(), b_axes_remained_vector.end(), i));
   }
   *b_axes_remained = mxnet::Tuple<int>(b_axes_remained_vector);
 
@@ -151,7 +151,7 @@ inline mxnet::TShape GetReorderedShape(const mxnet::TShape& shape, const mxnet::
  * gets matrix dot. Reshapes tensor a as ad1-by-ad2 matrix, tensor b as bd1-by-bd2 matrix, then
  * calculates matrix dot a * b and stores in tensor out.
  */
-template<typename xpu>
+template <typename xpu>
 void MatrixDot(const OpContext& ctx,
                const TBlob& a,
                const TBlob& b,
@@ -166,7 +166,7 @@ void MatrixDot(const OpContext& ctx,
   using namespace mshadow;
   using namespace mshadow_op;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, DType, {
     Tensor<xpu, 2, DType> a_tensor = a.get_with_shape<xpu, 2, DType>(Shape2(ad1, ad2), s);
@@ -195,10 +195,10 @@ void MatrixDot(const OpContext& ctx,
 /**
  * Scalar multiply.
  */
-template<int req>
+template <int req>
 struct scalar_mul_kernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType* tensor, const DType *scalar) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* tensor, const DType* scalar) {
     KERNEL_ASSIGN(out[i], req, tensor[i] * scalar[0]);
   }
 };
@@ -206,7 +206,7 @@ struct scalar_mul_kernel {
 /**
  * Calculates tensordot.
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotImpl(const Tuple<int>& a_axes_summed,
                    const Tuple<int>& b_axes_summed,
                    const OpContext& ctx,
@@ -226,27 +226,27 @@ void TensordotImpl(const Tuple<int>& a_axes_summed,
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(out.type_flag_, a.type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK_EQ(out.type_flag_, b.type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK(out.type_flag_ == kFloat32 || out.type_flag_ == kFloat64 ||
-       (out.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
+        (out.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
       << "Tensordot only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
 
   MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, DType, {
     if (a_shape.Size() == 0U || b_shape.Size() == 0U) {
       // 0-size input
       if (req[0] != kAddTo) {
-        Tensor<xpu, 1, DType> out_data = out.get_with_shape<xpu, 1, DType>(
-            Shape1(out.shape_.Size()), s);
+        Tensor<xpu, 1, DType> out_data =
+            out.get_with_shape<xpu, 1, DType>(Shape1(out.shape_.Size()), s);
         out_data = static_cast<DType>(0);
       }
     } else if (a_shape.ndim() == 0 && b_shape.ndim() == 0) {
       // Both 0-D scalars, equivalent to multiply
-      Tensor<xpu, 1, DType> a_data = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> b_data = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> a_data   = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> b_data   = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> out_data = out.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       ASSIGN_DISPATCH(out_data, req[0], a_data * b_data);
     } else if (a_shape.ndim() == 0 || b_shape.ndim() == 0) {
@@ -255,7 +255,7 @@ void TensordotImpl(const Tuple<int>& a_axes_summed,
       const DType* scalar = (a_shape.ndim() == 0) ? a.dptr<DType>() : b.dptr<DType>();
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         mxnet_op::Kernel<scalar_mul_kernel<Req>, xpu>::Launch(
-          s, out.Size(), out.dptr<DType>(), tensor, scalar);
+            s, out.Size(), out.dptr<DType>(), tensor, scalar);
       });
     } else {
       // Two tensors of at least 1 dimensions.
@@ -263,25 +263,39 @@ void TensordotImpl(const Tuple<int>& a_axes_summed,
       Tuple<int> b_axes_remained;
       Tuple<int> a_axes;
       Tuple<int> b_axes;
-      GetReorderedAxes(a_axes_summed, &a_axes_remained, &a_axes, b_axes_summed, &b_axes_remained,
-                       &b_axes, a_shape, b_shape);
+      GetReorderedAxes(a_axes_summed,
+                       &a_axes_remained,
+                       &a_axes,
+                       b_axes_summed,
+                       &b_axes_remained,
+                       &b_axes,
+                       a_shape,
+                       b_shape);
 
       index_t ad1 = 1, ad2 = 1, bd1 = 1, bd2 = 1;
-      GetMatrixDimensions(&ad1, &ad2, &bd1, &bd2, a_axes_remained, a_axes_summed,
-                          b_axes_remained, b_axes_summed, a_shape, b_shape);
+      GetMatrixDimensions(&ad1,
+                          &ad2,
+                          &bd1,
+                          &bd2,
+                          a_axes_remained,
+                          a_axes_summed,
+                          b_axes_remained,
+                          b_axes_summed,
+                          a_shape,
+                          b_shape);
 
       mxnet::TShape a_temp_shape = GetReorderedShape(a_shape, a_axes);
       mxnet::TShape b_temp_shape = GetReorderedShape(b_shape, b_axes);
 
       DType* a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
       DType* b_ptr = reinterpret_cast<DType*>(workspace.dptr_ + a.Size() * sizeof(DType));
-      TBlob a_res = TBlob(a_ptr, a_temp_shape, xpu::kDevMask);
-      TBlob b_res = TBlob(b_ptr, b_temp_shape, xpu::kDevMask);
+      TBlob a_res  = TBlob(a_ptr, a_temp_shape, xpu::kDevMask);
+      TBlob b_res  = TBlob(b_ptr, b_temp_shape, xpu::kDevMask);
 
-      mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, a, a_res,
-                                    mxnet::TShape(a_axes.begin(), a_axes.end()));
-      mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, b, b_res,
-                                    mxnet::TShape(b_axes.begin(), b_axes.end()));
+      mxnet::op::TransposeImpl<xpu>(
+          ctx.run_ctx, a, a_res, mxnet::TShape(a_axes.begin(), a_axes.end()));
+      mxnet::op::TransposeImpl<xpu>(
+          ctx.run_ctx, b, b_res, mxnet::TShape(b_axes.begin(), b_axes.end()));
 
       MatrixDot<xpu>(ctx, a_res, b_res, out, req[0], ad1, ad2, bd1, bd2);
     }
@@ -291,7 +305,7 @@ void TensordotImpl(const Tuple<int>& a_axes_summed,
 /**
  * Calculates workspace size of tensordot.
  */
-template<typename xpu>
+template <typename xpu>
 size_t TensordotWorkspaceSize(const Tuple<int>& a_axes_summed,
                               const Tuple<int>& b_axes_summed,
                               const TBlob& a,
@@ -331,7 +345,7 @@ size_t TensordotWorkspaceSize(const Tuple<int>& a_axes_summed,
 /**
  * forward function
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotOpForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -341,21 +355,21 @@ void TensordotOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
-  const TBlob& out = outputs[0];
+  const TBlob& a              = inputs[0];
+  const TBlob& b              = inputs[1];
+  const TBlob& out            = outputs[0];
   const mxnet::TShape a_shape = a.shape_;
   const mxnet::TShape b_shape = b.shape_;
 
   const TensordotParam& param = nnvm::get<TensordotParam>(attrs.parsed);
-  Tuple<int> a_axes_summed = param.a_axes_summed;
-  Tuple<int> b_axes_summed = param.b_axes_summed;
+  Tuple<int> a_axes_summed    = param.a_axes_summed;
+  Tuple<int> b_axes_summed    = param.b_axes_summed;
   ShiftAxes(&a_axes_summed, a_shape.ndim());
   ShiftAxes(&b_axes_summed, b_shape.ndim());
 
   size_t workspace_size = TensordotWorkspaceSize<xpu>(a_axes_summed, b_axes_summed, a, b, out, req);
-  Tensor<xpu, 1, char> workspace = ctx.requested[0].get_space_typed<xpu, 1, char>(
-    Shape1(workspace_size), ctx.get_stream<xpu>());
+  Tensor<xpu, 1, char> workspace =
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), ctx.get_stream<xpu>());
   TensordotImpl<xpu>(a_axes_summed, b_axes_summed, ctx, a, b, out, req, workspace);
 }
 
@@ -374,14 +388,13 @@ inline mxnet::TShape GetReverseShape(const mxnet::Tuple<int>& shape) {
 #define NP_TENSORDOT_REDUCE_AXES(safe_acc, ...) \
   ReduceAxesComputeImpl<xpu, mshadow_op::sum, safe_acc>(__VA_ARGS__)
 #else
-#define NP_TENSORDOT_REDUCE_AXES(safe_acc, ...) \
-  ReduceAxesRTCComputeImpl(__VA_ARGS__, "red::sum{}")
+#define NP_TENSORDOT_REDUCE_AXES(safe_acc, ...) ReduceAxesRTCComputeImpl(__VA_ARGS__, "red::sum{}")
 #endif
 
 /**
  * calculates tensordot derivative.
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotBackwardImpl(const Tuple<int>& a_axes_summed,
                            const Tuple<int>& b_axes_summed,
                            const OpContext& ctx,
@@ -392,7 +405,7 @@ void TensordotBackwardImpl(const Tuple<int>& a_axes_summed,
                            const TBlob& grad_b,
                            const std::vector<OpReqType>& req,
                            const Tensor<xpu, 1, char>& workspace) {
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
@@ -404,48 +417,62 @@ void TensordotBackwardImpl(const Tuple<int>& a_axes_summed,
     if (a_shape.ndim() == 0 && b_shape.ndim() == 0) {
       // Both 0-D scalars, equivalent to multiply
       Tensor<xpu, 1, DType> out_grad_data = out_grad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> a_data = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> b_data = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> grad_a_data = grad_a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> grad_b_data = grad_b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> a_data        = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> b_data        = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> grad_a_data   = grad_a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> grad_b_data   = grad_b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       ASSIGN_DISPATCH(grad_a_data, req[0], b_data * out_grad_data);
       ASSIGN_DISPATCH(grad_b_data, req[1], a_data * out_grad_data);
     } else if (a_shape.ndim() == 0 || b_shape.ndim() == 0) {
       // Either of them is a scalar, just scale by one of them
-      const TBlob& tensor = (a_shape.ndim() == 0) ? b : a;
-      const TBlob& tensor_grad = (a_shape.ndim() == 0) ? grad_b : grad_a;
-      const TBlob& scalar = (a_shape.ndim() == 0) ? a : b;
-      const TBlob& scalar_grad = (a_shape.ndim() == 0) ? grad_a : grad_b;
-      Tensor<xpu, 1, DType> scalar_ = scalar.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      const TBlob& tensor                = (a_shape.ndim() == 0) ? b : a;
+      const TBlob& tensor_grad           = (a_shape.ndim() == 0) ? grad_b : grad_a;
+      const TBlob& scalar                = (a_shape.ndim() == 0) ? a : b;
+      const TBlob& scalar_grad           = (a_shape.ndim() == 0) ? grad_a : grad_b;
+      Tensor<xpu, 1, DType> scalar_      = scalar.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> scalar_grad_ = scalar_grad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> tensor_ = tensor.FlatTo1D<xpu, DType>(s);
+      Tensor<xpu, 1, DType> tensor_      = tensor.FlatTo1D<xpu, DType>(s);
       Tensor<xpu, 1, DType> tensor_grad_ = tensor_grad.FlatTo1D<xpu, DType>(s);
-      Tensor<xpu, 1, DType> out_grad_ = out_grad.FlatTo1D<xpu, DType>(s);
-      const OpReqType& tensor_req = (a_shape.ndim() == 0) ? req[1] : req[0];
-      const OpReqType& scalar_req = (a_shape.ndim() == 0) ? req[0] : req[1];
-      ASSIGN_DISPATCH(tensor_grad_, tensor_req,
-                      broadcast_scalar(scalar_, tensor_grad_.shape_) * out_grad_);
+      Tensor<xpu, 1, DType> out_grad_    = out_grad.FlatTo1D<xpu, DType>(s);
+      const OpReqType& tensor_req        = (a_shape.ndim() == 0) ? req[1] : req[0];
+      const OpReqType& scalar_req        = (a_shape.ndim() == 0) ? req[0] : req[1];
+      ASSIGN_DISPATCH(
+          tensor_grad_, tensor_req, broadcast_scalar(scalar_, tensor_grad_.shape_) * out_grad_);
       Tensor<xpu, 1, DType> dtypespace =
-        Tensor<xpu, 1, DType>(reinterpret_cast<DType*>(workspace.dptr_),
-                              workspace.shape_,
-                              workspace.stride_,
-                              workspace.stream_);
+          Tensor<xpu, 1, DType>(reinterpret_cast<DType*>(workspace.dptr_),
+                                workspace.shape_,
+                                workspace.stride_,
+                                workspace.stream_);
       ASSIGN_DISPATCH(dtypespace, kWriteTo, tensor_ * out_grad_);
 
-      NP_TENSORDOT_REDUCE_AXES(true, ctx, {TBlob(dtypespace)}, {scalar_req},
-                               {TBlob(scalar_grad_)}, scalar_grad_.shape_);
+      NP_TENSORDOT_REDUCE_AXES(
+          true, ctx, {TBlob(dtypespace)}, {scalar_req}, {TBlob(scalar_grad_)}, scalar_grad_.shape_);
     } else {
       // Two tensors of at least 1 dimensions.
       Tuple<int> a_axes_remained;
       Tuple<int> b_axes_remained;
       Tuple<int> a_axes;
       Tuple<int> b_axes;
-      GetReorderedAxes(a_axes_summed, &a_axes_remained, &a_axes, b_axes_summed, &b_axes_remained,
-                      &b_axes, a_shape, b_shape);
+      GetReorderedAxes(a_axes_summed,
+                       &a_axes_remained,
+                       &a_axes,
+                       b_axes_summed,
+                       &b_axes_remained,
+                       &b_axes,
+                       a_shape,
+                       b_shape);
 
       index_t ad1 = 1, ad2 = 1, bd1 = 1, bd2 = 1;
-      GetMatrixDimensions(&ad1, &ad2, &bd1, &bd2, a_axes_remained, a_axes_summed,
-                          b_axes_remained, b_axes_summed, a_shape, b_shape);
+      GetMatrixDimensions(&ad1,
+                          &ad2,
+                          &bd1,
+                          &bd2,
+                          a_axes_remained,
+                          a_axes_summed,
+                          b_axes_remained,
+                          b_axes_summed,
+                          a_shape,
+                          b_shape);
 
       std::vector<int> a_T_axes;
       for (int i = 0; i < a_axes_summed.ndim(); i++) {
@@ -467,27 +494,25 @@ void TensordotBackwardImpl(const Tuple<int>& a_axes_summed,
       mxnet::TShape b_temp_shape(GetReorderedShape(b_shape, b_axes));
       mxnet::TShape b_T_temp_shape(GetReorderedShape(b_shape, b_T_axes));
 
-      DType* a_ptr = reinterpret_cast<DType*>(workspace.dptr_);
+      DType* a_ptr  = reinterpret_cast<DType*>(workspace.dptr_);
       DType* a_ptr2 = reinterpret_cast<DType*>(workspace.dptr_ + a.Size() * sizeof(DType));
-      DType* b_ptr = reinterpret_cast<DType*>(workspace.dptr_ + 2 * a.Size() * sizeof(DType));
-      DType* b_ptr2 = reinterpret_cast<DType*>(workspace.dptr_ +
-                                               (2 * a.Size() +
-                                               b.Size()) *
-                                               sizeof(DType));
-
-      TBlob a_res = TBlob(a_ptr, a_temp_shape, xpu::kDevMask);
-      TBlob b_res = TBlob(b_ptr, b_temp_shape, xpu::kDevMask);
+      DType* b_ptr  = reinterpret_cast<DType*>(workspace.dptr_ + 2 * a.Size() * sizeof(DType));
+      DType* b_ptr2 =
+          reinterpret_cast<DType*>(workspace.dptr_ + (2 * a.Size() + b.Size()) * sizeof(DType));
+
+      TBlob a_res  = TBlob(a_ptr, a_temp_shape, xpu::kDevMask);
+      TBlob b_res  = TBlob(b_ptr, b_temp_shape, xpu::kDevMask);
       TBlob a_res2 = TBlob(a_ptr2, a_T_temp_shape, xpu::kDevMask);
       TBlob b_res2 = TBlob(b_ptr2, b_T_temp_shape, xpu::kDevMask);
 
-      mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, a, a_res2,
-                                    mxnet::TShape(a_T_axes.begin(), a_T_axes.end()));
-      mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, b, b_res2,
-                                    mxnet::TShape(b_T_axes.begin(), b_T_axes.end()));
-      mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, grad_a, a_res,
-                                    mxnet::TShape(a_axes.begin(), a_axes.end()));
-      mxnet::op::TransposeImpl<xpu>(ctx.run_ctx, grad_b, b_res,
-                                    mxnet::TShape(b_axes.begin(), b_axes.end()));
+      mxnet::op::TransposeImpl<xpu>(
+          ctx.run_ctx, a, a_res2, mxnet::TShape(a_T_axes.begin(), a_T_axes.end()));
+      mxnet::op::TransposeImpl<xpu>(
+          ctx.run_ctx, b, b_res2, mxnet::TShape(b_T_axes.begin(), b_T_axes.end()));
+      mxnet::op::TransposeImpl<xpu>(
+          ctx.run_ctx, grad_a, a_res, mxnet::TShape(a_axes.begin(), a_axes.end()));
+      mxnet::op::TransposeImpl<xpu>(
+          ctx.run_ctx, grad_b, b_res, mxnet::TShape(b_axes.begin(), b_axes.end()));
       MatrixDot<xpu>(ctx, a_res2, out_grad, b_res, req[1], ad2, ad1, ad1, bd2);
       MatrixDot<xpu>(ctx, out_grad, b_res2, a_res, req[0], ad1, bd2, bd2, bd1);
 
@@ -500,7 +525,7 @@ void TensordotBackwardImpl(const Tuple<int>& a_axes_summed,
 /**
  * Calculates workspace size of tensordot backward.
  */
-template<typename xpu>
+template <typename xpu>
 size_t TensordotBackwardWorkspaceSize(const Tuple<int>& a_axes_summed,
                                       const Tuple<int>& b_axes_summed,
                                       const TBlob& out_grad,
@@ -533,7 +558,7 @@ size_t TensordotBackwardWorkspaceSize(const Tuple<int>& a_axes_summed,
 /**
  * backward function.
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotOpBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -543,28 +568,26 @@ void TensordotOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
 
-  const TBlob& out_grad = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
-  const TBlob& grad_a = outputs[0];
-  const TBlob& grad_b = outputs[1];
+  const TBlob& out_grad       = inputs[0];
+  const TBlob& a              = inputs[1];
+  const TBlob& b              = inputs[2];
+  const TBlob& grad_a         = outputs[0];
+  const TBlob& grad_b         = outputs[1];
   const mxnet::TShape a_shape = a.shape_;
   const mxnet::TShape b_shape = b.shape_;
 
   const TensordotParam& param = nnvm::get<TensordotParam>(attrs.parsed);
-  Tuple<int> a_axes_summed = param.a_axes_summed;
-  Tuple<int> b_axes_summed = param.b_axes_summed;
+  Tuple<int> a_axes_summed    = param.a_axes_summed;
+  Tuple<int> b_axes_summed    = param.b_axes_summed;
   ShiftAxes(&a_axes_summed, a_shape.ndim());
   ShiftAxes(&b_axes_summed, b_shape.ndim());
 
-  size_t workspace_size = TensordotBackwardWorkspaceSize<xpu>(a_axes_summed, b_axes_summed,
-                                                              out_grad, a, b, grad_a,
-                                                              grad_b, req);
+  size_t workspace_size = TensordotBackwardWorkspaceSize<xpu>(
+      a_axes_summed, b_axes_summed, out_grad, a, b, grad_a, grad_b, req);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size),
-                                                   ctx.get_stream<xpu>());
-  TensordotBackwardImpl<xpu>(a_axes_summed, b_axes_summed, ctx, out_grad, a, b, grad_a,
-                             grad_b, req, workspace);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), ctx.get_stream<xpu>());
+  TensordotBackwardImpl<xpu>(
+      a_axes_summed, b_axes_summed, ctx, out_grad, a, b, grad_a, grad_b, req, workspace);
 }
 
 struct TensordotIntAxesParam : public dmlc::Parameter<TensordotIntAxesParam> {
@@ -602,7 +625,7 @@ inline void GetSummedAxes(mxnet::Tuple<int>* a_axes_summed_ptr,
 /**
  * Calculates tensordot.
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotIntAxesImpl(const int axes,
                           const OpContext& ctx,
                           const TBlob& a,
@@ -620,27 +643,27 @@ void TensordotIntAxesImpl(const int axes,
   const mxnet::TShape& a_shape = a.shape_;
   const mxnet::TShape& b_shape = b.shape_;
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(out.type_flag_, a.type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK_EQ(out.type_flag_, b.type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK(out.type_flag_ == kFloat32 || out.type_flag_ == kFloat64 ||
-       (out.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
+        (out.type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
       << "Tensordot only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
 
   MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, DType, {
     if (a_shape.Size() == 0U || b_shape.Size() == 0U) {
       // 0-size input
       if (req != kAddTo) {
-        Tensor<xpu, 1, DType> out_data = out.get_with_shape<xpu, 1, DType>(
-            Shape1(out.shape_.Size()), s);
+        Tensor<xpu, 1, DType> out_data =
+            out.get_with_shape<xpu, 1, DType>(Shape1(out.shape_.Size()), s);
         out_data = static_cast<DType>(0);
       }
     } else if (a_shape.ndim() == 0 && b_shape.ndim() == 0) {
       // Both 0-D scalars, equivalent to multiply
-      Tensor<xpu, 1, DType> a_data = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> b_data = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> a_data   = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> b_data   = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> out_data = out.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       ASSIGN_DISPATCH(out_data, req, a_data * b_data);
     } else if (a_shape.ndim() == 0 || b_shape.ndim() == 0) {
@@ -649,7 +672,7 @@ void TensordotIntAxesImpl(const int axes,
       const DType* scalar = (a_shape.ndim() == 0) ? a.dptr<DType>() : b.dptr<DType>();
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         mxnet_op::Kernel<scalar_mul_kernel<Req>, xpu>::Launch(
-          s, out.Size(), out.dptr<DType>(), tensor, scalar);
+            s, out.Size(), out.dptr<DType>(), tensor, scalar);
       });
     } else {
       // Two tensors of at least 1 dimensions.
@@ -661,12 +684,26 @@ void TensordotIntAxesImpl(const int axes,
       Tuple<int> b_axes_remained;
       Tuple<int> a_axes;
       Tuple<int> b_axes;
-      GetReorderedAxes(a_axes_summed, &a_axes_remained, &a_axes, b_axes_summed, &b_axes_remained,
-                      &b_axes, a_shape, b_shape);
+      GetReorderedAxes(a_axes_summed,
+                       &a_axes_remained,
+                       &a_axes,
+                       b_axes_summed,
+                       &b_axes_remained,
+                       &b_axes,
+                       a_shape,
+                       b_shape);
 
       index_t ad1 = 1, ad2 = 1, bd1 = 1, bd2 = 1;
-      GetMatrixDimensions(&ad1, &ad2, &bd1, &bd2, a_axes_remained, a_axes_summed,
-                          b_axes_remained, b_axes_summed, a_shape, b_shape);
+      GetMatrixDimensions(&ad1,
+                          &ad2,
+                          &bd1,
+                          &bd2,
+                          a_axes_remained,
+                          a_axes_summed,
+                          b_axes_remained,
+                          b_axes_summed,
+                          a_shape,
+                          b_shape);
       MatrixDot<xpu>(ctx, a, b, out, req, ad1, ad2, bd1, bd2);
     }
   });
@@ -675,7 +712,7 @@ void TensordotIntAxesImpl(const int axes,
 /**
  * forward function
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotIntAxesOpForward(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
@@ -685,17 +722,17 @@ void TensordotIntAxesOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
 
-  const TBlob& a = inputs[0];
-  const TBlob& b = inputs[1];
+  const TBlob& a   = inputs[0];
+  const TBlob& b   = inputs[1];
   const TBlob& out = outputs[0];
 
   const TensordotIntAxesParam& param = nnvm::get<TensordotIntAxesParam>(attrs.parsed);
-  const int axes = param.axes;
+  const int axes                     = param.axes;
 
   TensordotIntAxesImpl<xpu>(axes, ctx, a, b, out, req[0]);
 }
 
-template<typename xpu>
+template <typename xpu>
 void TensordotIntAxesBackwardImpl(const int axes,
                                   const OpContext& ctx,
                                   const TBlob& out_grad,
@@ -711,39 +748,39 @@ void TensordotIntAxesBackwardImpl(const int axes,
     return;  // zero-size output, no need to launch kernel
   }
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_REAL_TYPE_SWITCH(out_grad.type_flag_, DType, {
     if (a_shape.ndim() == 0 && b_shape.ndim() == 0) {
       // Both 0-D scalars, equivalent to multiply
       Tensor<xpu, 1, DType> out_grad_data = out_grad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> a_data = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> b_data = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> grad_a_data = grad_a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> grad_b_data = grad_b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> a_data        = a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> b_data        = b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> grad_a_data   = grad_a.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      Tensor<xpu, 1, DType> grad_b_data   = grad_b.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       ASSIGN_DISPATCH(grad_a_data, req[0], b_data * out_grad_data);
       ASSIGN_DISPATCH(grad_b_data, req[1], a_data * out_grad_data);
     } else if (a_shape.ndim() == 0 || b_shape.ndim() == 0) {
       // Either of them is a scalar, just scale by one of them
-      const TBlob& tensor = (a_shape.ndim() == 0) ? b : a;
-      const TBlob& tensor_grad = (a_shape.ndim() == 0) ? grad_b : grad_a;
-      const TBlob& scalar = (a_shape.ndim() == 0) ? a : b;
-      const TBlob& scalar_grad = (a_shape.ndim() == 0) ? grad_a : grad_b;
-      Tensor<xpu, 1, DType> scalar_ = scalar.get_with_shape<xpu, 1, DType>(Shape1(1), s);
+      const TBlob& tensor                = (a_shape.ndim() == 0) ? b : a;
+      const TBlob& tensor_grad           = (a_shape.ndim() == 0) ? grad_b : grad_a;
+      const TBlob& scalar                = (a_shape.ndim() == 0) ? a : b;
+      const TBlob& scalar_grad           = (a_shape.ndim() == 0) ? grad_a : grad_b;
+      Tensor<xpu, 1, DType> scalar_      = scalar.get_with_shape<xpu, 1, DType>(Shape1(1), s);
       Tensor<xpu, 1, DType> scalar_grad_ = scalar_grad.get_with_shape<xpu, 1, DType>(Shape1(1), s);
-      Tensor<xpu, 1, DType> tensor_ = tensor.FlatTo1D<xpu, DType>(s);
+      Tensor<xpu, 1, DType> tensor_      = tensor.FlatTo1D<xpu, DType>(s);
       Tensor<xpu, 1, DType> tensor_grad_ = tensor_grad.FlatTo1D<xpu, DType>(s);
-      Tensor<xpu, 1, DType> out_grad_ = out_grad.FlatTo1D<xpu, DType>(s);
-      const OpReqType& tensor_req = (a_shape.ndim() == 0) ? req[1] : req[0];
-      const OpReqType& scalar_req = (a_shape.ndim() == 0) ? req[0] : req[1];
-      ASSIGN_DISPATCH(tensor_grad_, tensor_req,
-                      broadcast_scalar(scalar_, tensor_grad_.shape_) * out_grad_);
+      Tensor<xpu, 1, DType> out_grad_    = out_grad.FlatTo1D<xpu, DType>(s);
+      const OpReqType& tensor_req        = (a_shape.ndim() == 0) ? req[1] : req[0];
+      const OpReqType& scalar_req        = (a_shape.ndim() == 0) ? req[0] : req[1];
+      ASSIGN_DISPATCH(
+          tensor_grad_, tensor_req, broadcast_scalar(scalar_, tensor_grad_.shape_) * out_grad_);
       Tensor<xpu, 1, DType> workspace =
-        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(out_grad.shape_.Size()), s);
+          ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(out_grad.shape_.Size()), s);
       ASSIGN_DISPATCH(workspace, kWriteTo, tensor_ * out_grad_);
 
-      NP_TENSORDOT_REDUCE_AXES(true, ctx, {TBlob(workspace)}, {scalar_req},
-                               {TBlob(scalar_grad_)}, scalar_grad_.shape_);
+      NP_TENSORDOT_REDUCE_AXES(
+          true, ctx, {TBlob(workspace)}, {scalar_req}, {TBlob(scalar_grad_)}, scalar_grad_.shape_);
     } else {
       // Two tensors of at least 1 dimensions.
       Tuple<int> a_axes_summed;
@@ -754,12 +791,26 @@ void TensordotIntAxesBackwardImpl(const int axes,
       Tuple<int> b_axes_remained;
       Tuple<int> a_axes;
       Tuple<int> b_axes;
-      GetReorderedAxes(a_axes_summed, &a_axes_remained, &a_axes, b_axes_summed, &b_axes_remained,
-                      &b_axes, a_shape, b_shape);
+      GetReorderedAxes(a_axes_summed,
+                       &a_axes_remained,
+                       &a_axes,
+                       b_axes_summed,
+                       &b_axes_remained,
+                       &b_axes,
+                       a_shape,
+                       b_shape);
 
       index_t ad1 = 1, ad2 = 1, bd1 = 1, bd2 = 1;
-      GetMatrixDimensions(&ad1, &ad2, &bd1, &bd2, a_axes_remained, a_axes_summed,
-                          b_axes_remained, b_axes_summed, a_shape, b_shape);
+      GetMatrixDimensions(&ad1,
+                          &ad2,
+                          &bd1,
+                          &bd2,
+                          a_axes_remained,
+                          a_axes_summed,
+                          b_axes_remained,
+                          b_axes_summed,
+                          a_shape,
+                          b_shape);
 
       MatrixDot<xpu>(ctx, a, out_grad, grad_b, req[1], ad1, ad2, ad1, bd2, true, false);
       MatrixDot<xpu>(ctx, out_grad, b, grad_a, req[0], ad1, bd2, bd1, bd2, false, true);
@@ -772,7 +823,7 @@ void TensordotIntAxesBackwardImpl(const int axes,
 /**
  * backward function.
  */
-template<typename xpu>
+template <typename xpu>
 void TensordotIntAxesOpBackward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -783,13 +834,13 @@ void TensordotIntAxesOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req.size(), 2U);
 
   const TBlob& out_grad = inputs[0];
-  const TBlob& a = inputs[1];
-  const TBlob& b = inputs[2];
-  const TBlob& grad_a = outputs[0];
-  const TBlob& grad_b = outputs[1];
+  const TBlob& a        = inputs[1];
+  const TBlob& b        = inputs[2];
+  const TBlob& grad_a   = outputs[0];
+  const TBlob& grad_b   = outputs[1];
 
   const TensordotIntAxesParam& param = nnvm::get<TensordotIntAxesParam>(attrs.parsed);
-  const int axes = param.axes;
+  const int axes                     = param.axes;
 
   TensordotIntAxesBackwardImpl<xpu>(axes, ctx, out_grad, a, b, grad_a, grad_b, req);
 }
diff --git a/src/operator/numpy/np_tensordot_op.cc b/src/operator/numpy/np_tensordot_op.cc
index 96de0decf73a..75d72d750b68 100644
--- a/src/operator/numpy/np_tensordot_op.cc
+++ b/src/operator/numpy/np_tensordot_op.cc
@@ -29,8 +29,8 @@ namespace mxnet {
 namespace op {
 
 bool TensordotOpShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector *in_attrs,
-                      mxnet::ShapeVector *out_attrs) {
+                      mxnet::ShapeVector* in_attrs,
+                      mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -52,8 +52,8 @@ bool TensordotOpShape(const nnvm::NodeAttrs& attrs,
   } else {
     // Two tensors of at least 1 dimensions.
     const TensordotParam& param = nnvm::get<TensordotParam>(attrs.parsed);
-    Tuple<int> a_axes_summed = param.a_axes_summed;
-    Tuple<int> b_axes_summed = param.b_axes_summed;
+    Tuple<int> a_axes_summed    = param.a_axes_summed;
+    Tuple<int> b_axes_summed    = param.b_axes_summed;
     ShiftAxes(&a_axes_summed, a_shape.ndim());
     ShiftAxes(&b_axes_summed, b_shape.ndim());
 
@@ -61,8 +61,14 @@ bool TensordotOpShape(const nnvm::NodeAttrs& attrs,
     Tuple<int> b_axes_remained;
     Tuple<int> a_axes;
     Tuple<int> b_axes;
-    GetReorderedAxes(a_axes_summed, &a_axes_remained, &a_axes, b_axes_summed, &b_axes_remained,
-                    &b_axes, a_shape, b_shape);
+    GetReorderedAxes(a_axes_summed,
+                     &a_axes_remained,
+                     &a_axes,
+                     b_axes_summed,
+                     &b_axes_remained,
+                     &b_axes,
+                     a_shape,
+                     b_shape);
 
     CHECK_EQ(a_axes_summed.ndim(), b_axes_summed.ndim());
 
@@ -100,40 +106,42 @@ bool TensordotOpShape(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(TensordotParam);
 
 NNVM_REGISTER_OP(_npi_tensordot)
-.set_attr_parser(mxnet::op::ParamParser<TensordotParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TensordotOpShape)
-.set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", TensordotOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", mxnet::op::ElemwiseGradUseIn{"_backward_npi_tensordot"})
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input")
-.add_arguments(TensordotParam::__FIELDS__());
+    .set_attr_parser(mxnet::op::ParamParser<TensordotParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TensordotOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", TensordotOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", mxnet::op::ElemwiseGradUseIn{"_backward_npi_tensordot"})
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input")
+    .add_arguments(TensordotParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_tensordot)
-.set_attr_parser(mxnet::op::ParamParser<TensordotParam>)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<FCompute>("FCompute<cpu>", TensordotOpBackward<cpu>);
+    .set_attr_parser(mxnet::op::ParamParser<TensordotParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", TensordotOpBackward<cpu>);
 
 bool TensordotIntAxesOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -152,7 +160,7 @@ bool TensordotIntAxesOpShape(const nnvm::NodeAttrs& attrs,
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
   } else {
     const TensordotIntAxesParam& param = nnvm::get<TensordotIntAxesParam>(attrs.parsed);
-    const int& axes = param.axes;
+    const int& axes                    = param.axes;
 
     Tuple<int> a_axes_summed;
     Tuple<int> b_axes_summed;
@@ -162,8 +170,14 @@ bool TensordotIntAxesOpShape(const nnvm::NodeAttrs& attrs,
     Tuple<int> b_axes_remained;
     Tuple<int> a_axes;
     Tuple<int> b_axes;
-    GetReorderedAxes(a_axes_summed, &a_axes_remained, &a_axes, b_axes_summed, &b_axes_remained,
-                    &b_axes, a_shape, b_shape);
+    GetReorderedAxes(a_axes_summed,
+                     &a_axes_remained,
+                     &a_axes,
+                     b_axes_summed,
+                     &b_axes_remained,
+                     &b_axes,
+                     a_shape,
+                     b_shape);
 
     CHECK_EQ(a_axes_summed.ndim(), b_axes_summed.ndim());
 
@@ -201,37 +215,39 @@ bool TensordotIntAxesOpShape(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(TensordotIntAxesParam);
 
 NNVM_REGISTER_OP(_npi_tensordot_int_axes)
-.set_attr_parser(mxnet::op::ParamParser<TensordotIntAxesParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "b"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TensordotIntAxesOpShape)
-.set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", TensordotIntAxesOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  mxnet::op::ElemwiseGradUseIn{"_backward_npi_tensordot_int_axes"})
-.add_argument("a", "NDArray-or-Symbol", "First input")
-.add_argument("b", "NDArray-or-Symbol", "Second input")
-.add_arguments(TensordotIntAxesParam::__FIELDS__());
+    .set_attr_parser(mxnet::op::ParamParser<TensordotIntAxesParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "b"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TensordotIntAxesOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", mxnet::op::ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", TensordotIntAxesOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               mxnet::op::ElemwiseGradUseIn{"_backward_npi_tensordot_int_axes"})
+    .add_argument("a", "NDArray-or-Symbol", "First input")
+    .add_argument("b", "NDArray-or-Symbol", "Second input")
+    .add_arguments(TensordotIntAxesParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_tensordot_int_axes)
-.set_attr_parser(mxnet::op::ParamParser<TensordotIntAxesParam>)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<FCompute>("FCompute<cpu>", TensordotIntAxesOpBackward<cpu>);
+    .set_attr_parser(mxnet::op::ParamParser<TensordotIntAxesParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", TensordotIntAxesOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_tensordot_op.cu b/src/operator/numpy/np_tensordot_op.cu
index e1d8a0b85e6e..1a2e050f2488 100644
--- a/src/operator/numpy/np_tensordot_op.cu
+++ b/src/operator/numpy/np_tensordot_op.cu
@@ -26,17 +26,16 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_tensordot)
-.set_attr<FCompute>("FCompute<gpu>", TensordotOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_tensordot).set_attr<FCompute>("FCompute<gpu>", TensordotOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_tensordot)
-.set_attr<FCompute>("FCompute<gpu>", TensordotOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", TensordotOpBackward<gpu>);
 
 NNVM_REGISTER_OP(_npi_tensordot_int_axes)
-.set_attr<FCompute>("FCompute<gpu>", TensordotIntAxesOpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", TensordotIntAxesOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_tensordot_int_axes)
-.set_attr<FCompute>("FCompute<gpu>", TensordotIntAxesOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", TensordotIntAxesOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_trace_op-inl.h b/src/operator/numpy/np_trace_op-inl.h
index ede7d37ee686..79bb2597b742 100644
--- a/src/operator/numpy/np_trace_op-inl.h
+++ b/src/operator/numpy/np_trace_op-inl.h
@@ -39,21 +39,18 @@
 namespace mxnet {
 namespace op {
 
-struct NumpyTraceParam: public dmlc::Parameter<NumpyTraceParam> {
+struct NumpyTraceParam : public dmlc::Parameter<NumpyTraceParam> {
   int offset, axis1, axis2;
   DMLC_DECLARE_PARAMETER(NumpyTraceParam) {
-    DMLC_DECLARE_FIELD(offset)
-    .set_default(0)
-    .describe("Offset of the diagonal from the main diagonal. "
-              "Can be both positive and negative. Defaults to 0.");
-    DMLC_DECLARE_FIELD(axis1)
-    .set_default(0)
-    .describe("Axes to be used as the first axis of the 2-D sub-arrays "
-              "from which the diagonals should be taken. Defaults to 0.");
-    DMLC_DECLARE_FIELD(axis2)
-    .set_default(1)
-    .describe("Axes to be used as the second axis of the 2-D sub-arrays "
-              "from which the diagonals should be taken. Defaults to 1.");
+    DMLC_DECLARE_FIELD(offset).set_default(0).describe(
+        "Offset of the diagonal from the main diagonal. "
+        "Can be both positive and negative. Defaults to 0.");
+    DMLC_DECLARE_FIELD(axis1).set_default(0).describe(
+        "Axes to be used as the first axis of the 2-D sub-arrays "
+        "from which the diagonals should be taken. Defaults to 0.");
+    DMLC_DECLARE_FIELD(axis2).set_default(1).describe(
+        "Axes to be used as the second axis of the 2-D sub-arrays "
+        "from which the diagonals should be taken. Defaults to 1.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream offset_s, axis1_s, axis2_s;
@@ -61,18 +58,22 @@ struct NumpyTraceParam: public dmlc::Parameter<NumpyTraceParam> {
     axis1_s << axis1;
     axis2_s << axis2;
     (*dict)["offset"] = offset_s.str();
-    (*dict)["axis1"] = axis1_s.str();
-    (*dict)["axis2"] = axis2_s.str();
+    (*dict)["axis1"]  = axis1_s.str();
+    (*dict)["axis2"]  = axis2_s.str();
   }
 };
 
-template<int ndim, int req, bool back>
+template <int ndim, int req, bool back>
 struct numpy_trace {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   mshadow::Shape<ndim> oshape,
                                   mshadow::Shape<ndim> ishape,
-                                  index_t stride, index_t offset, int dlength) {
+                                  index_t stride,
+                                  index_t offset,
+                                  int dlength) {
     using namespace mxnet_op;
     using namespace mshadow;
     index_t j = ravel(unravel(i, oshape), ishape) + offset;
@@ -98,14 +99,14 @@ struct numpy_trace {
   }
 };
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 void NumpyTraceOpProcess(const TBlob& in_data,
                          const TBlob& out_data,
                          const mxnet::TShape& ishape,
                          const mxnet::TShape& oshape,
                          index_t dsize,
                          const NumpyTraceParam& param,
-                         mxnet_op::Stream<xpu> *s,
+                         mxnet_op::Stream<xpu>* s,
                          const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow;
@@ -152,9 +153,7 @@ void NumpyTraceOpProcess(const TBlob& in_data,
   // three axes, hence improving the rave and
   // unravel efficiency)
 
-  index_t oleading = 1,
-          obody = 1,
-          otrailing = 1;
+  index_t oleading = 1, obody = 1, otrailing = 1;
 
   for (uint32_t i = 0; i < minx; ++i) {
     oleading *= ishape[i];
@@ -166,12 +165,9 @@ void NumpyTraceOpProcess(const TBlob& in_data,
     otrailing *= ishape[i];
   }
 
-  index_t ileading = oleading,
-          ibody = obody * ishape[minx],
-          itrailing = otrailing * ishape[maxx];
+  index_t ileading = oleading, ibody = obody * ishape[minx], itrailing = otrailing * ishape[maxx];
 
-  index_t stride1 = itrailing * obody,
-          stride2 = otrailing;
+  index_t stride1 = itrailing * obody, stride2 = otrailing;
   // stride1 + stride2 is the stride for
   // iterating over the diagonal in question
 
@@ -205,16 +201,20 @@ void NumpyTraceOpProcess(const TBlob& in_data,
       if (back) {
         out_data.FlatTo1D<xpu, DType>(s) = 0;
       }
-      Kernel<numpy_trace<3, req_type, back>, xpu>::Launch(s, dsize, out_data.dptr<DType>(),
+      Kernel<numpy_trace<3, req_type, back>, xpu>::Launch(s,
+                                                          dsize,
+                                                          out_data.dptr<DType>(),
                                                           in_data.dptr<DType>(),
                                                           Shape3(oleading, obody, otrailing),
                                                           Shape3(ileading, ibody, itrailing),
-                                                          stride1 + stride2, offset, dlength);
+                                                          stride1 + stride2,
+                                                          offset,
+                                                          dlength);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyTraceOpForward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -225,18 +225,18 @@ void NumpyTraceOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  const mxnet::TShape& ishape = inputs[0].shape_;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  mshadow::Stream<xpu>* s      = ctx.get_stream<xpu>();
+  const TBlob& in_data         = inputs[0];
+  const TBlob& out_data        = outputs[0];
+  const mxnet::TShape& ishape  = inputs[0].shape_;
+  const mxnet::TShape& oshape  = outputs[0].shape_;
   const NumpyTraceParam& param = nnvm::get<NumpyTraceParam>(attrs.parsed);
 
-  NumpyTraceOpProcess<xpu, false>(in_data, out_data, ishape, oshape,
-                                  out_data.Size(), param, s, req);
+  NumpyTraceOpProcess<xpu, false>(
+      in_data, out_data, ishape, oshape, out_data.Size(), param, s, req);
 }
 
-template<typename xpu>
+template <typename xpu>
 void NumpyTraceOpBackward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -247,16 +247,15 @@ void NumpyTraceOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  const mxnet::TShape& ishape = inputs[0].shape_;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  const TBlob& in_data         = inputs[0];
+  const TBlob& out_data        = outputs[0];
+  const mxnet::TShape& ishape  = inputs[0].shape_;
+  const mxnet::TShape& oshape  = outputs[0].shape_;
   const NumpyTraceParam& param = nnvm::get<NumpyTraceParam>(attrs.parsed);
 
-  NumpyTraceOpProcess<xpu, true>(in_data, out_data, oshape, ishape,
-                                 in_data.Size(), param, s, req);
+  NumpyTraceOpProcess<xpu, true>(in_data, out_data, oshape, ishape, in_data.Size(), param, s, req);
 }
 
 }  // namespace op
diff --git a/src/operator/numpy/np_trace_op.cc b/src/operator/numpy/np_trace_op.cc
index e6a120195925..f955b80a4005 100644
--- a/src/operator/numpy/np_trace_op.cc
+++ b/src/operator/numpy/np_trace_op.cc
@@ -39,10 +39,10 @@ inline bool NumpyTraceOpShape(const nnvm::NodeAttrs& attrs,
   }
   std::vector<int> oshape(ndim - 2);
   const NumpyTraceParam& param = nnvm::get<NumpyTraceParam>(attrs.parsed);
-  int x1 = CheckAxis(param.axis1, (*in_attrs)[0].ndim());
-  int x2 = CheckAxis(param.axis2, (*in_attrs)[0].ndim());
+  int x1                       = CheckAxis(param.axis1, (*in_attrs)[0].ndim());
+  int x2                       = CheckAxis(param.axis2, (*in_attrs)[0].ndim());
   CHECK_NE(x1, x2) << "axis1 and axis2 cannot refer to the the same axis " << x1;
-  for ( int i = 0, j = 0; i < ndim; ++i ) {
+  for (int i = 0, j = 0; i < ndim; ++i) {
     if (i != x1 && i != x2) {
       oshape[j++] = (*in_attrs)[0][i];
     }
@@ -55,7 +55,7 @@ inline bool NumpyTraceOpShape(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyTraceParam);
 
 NNVM_REGISTER_OP(_npi_trace)
-.describe(R"code(Computes the sum of the diagonal elements of a matrix.
+    .describe(R"code(Computes the sum of the diagonal elements of a matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, we sum the diagonal elements. The result has shape ().
@@ -73,26 +73,26 @@ Examples::
    A = [[[1.0, 1.0], [1.0, 7.0]], [[3.0, 0], [0, 17.0]]]
    trace(A) = [1.0, 18.0]
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<NumpyTraceParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyTraceOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyTraceOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_trace"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(NumpyTraceParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyTraceParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyTraceOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyTraceOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_npi_trace"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(NumpyTraceParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_npi_trace)
-.set_attr_parser(ParamParser<NumpyTraceParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyTraceOpBackward<cpu>);
+    .set_attr_parser(ParamParser<NumpyTraceParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyTraceOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_trace_op.cu b/src/operator/numpy/np_trace_op.cu
index 5ec29137d551..c70c297328e3 100644
--- a/src/operator/numpy/np_trace_op.cu
+++ b/src/operator/numpy/np_trace_op.cu
@@ -26,11 +26,10 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_trace)
-.set_attr<FCompute>("FCompute<gpu>", NumpyTraceOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_trace).set_attr<FCompute>("FCompute<gpu>", NumpyTraceOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_trace)
-.set_attr<FCompute>("FCompute<gpu>", NumpyTraceOpBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyTraceOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_tri_op-inl.h b/src/operator/numpy/np_tri_op-inl.h
index f6e20bc4705b..428dad49f178 100644
--- a/src/operator/numpy/np_tri_op-inl.h
+++ b/src/operator/numpy/np_tri_op-inl.h
@@ -46,24 +46,21 @@ struct TriParam : public dmlc::Parameter<TriParam> {
   int dtype;
   std::string ctx;
   DMLC_DECLARE_PARAMETER(TriParam) {
-    DMLC_DECLARE_FIELD(N)
-      .describe("Number of rows in the array.");
+    DMLC_DECLARE_FIELD(N).describe("Number of rows in the array.");
     DMLC_DECLARE_FIELD(M)
-      .set_default(dmlc::optional<nnvm::dim_t>())
-      .describe("Number of columns in the array. "
-                "By default, M is taken equal to N.");
-    DMLC_DECLARE_FIELD(k)
-      .set_default(0)
-      .describe("The sub-diagonal at and below which the array is filled. "
-                "k = 0 is the main diagonal, while k < 0 is below it, "
-                "and k > 0 is above. The default is 0.");
+        .set_default(dmlc::optional<nnvm::dim_t>())
+        .describe(
+            "Number of columns in the array. "
+            "By default, M is taken equal to N.");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "The sub-diagonal at and below which the array is filled. "
+        "k = 0 is the main diagonal, while k < 0 is below it, "
+        "and k > 0 is above. The default is 0.");
     DMLC_DECLARE_FIELD(dtype)
-    MXNET_ADD_ALL_TYPES_WITH_BOOL
-    .set_default(mshadow::kFloat32);
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    MXNET_ADD_ALL_TYPES_WITH_BOOL.set_default(mshadow::kFloat32);
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -72,17 +69,16 @@ struct TriParam : public dmlc::Parameter<TriParam> {
     M_s << M;
     k_s << k;
     dtype_s << dtype;
-    (*dict)["N"] = N_s.str();
-    (*dict)["M"] = M_s.str();
-    (*dict)["k"] = k_s.str();
+    (*dict)["N"]     = N_s.str();
+    (*dict)["M"]     = M_s.str();
+    (*dict)["k"]     = k_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
   }
 };
 
 struct tri_fwd {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out,
-                                  mshadow::Shape<2> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i, DType* out, mshadow::Shape<2> oshape, int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i / oshape[1];
@@ -95,26 +91,25 @@ struct tri_fwd {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void TriOpForward(const nnvm::NodeAttrs& attrs,
-                   const OpContext& ctx,
-                   const std::vector<TBlob>& inputs,
-                   const std::vector<OpReqType>& req,
-                   const std::vector<TBlob>& outputs) {
+                  const OpContext& ctx,
+                  const std::vector<TBlob>& inputs,
+                  const std::vector<OpReqType>& req,
+                  const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 0U);
   CHECK_EQ(outputs.size(), 1U);
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& out_data = outputs[0];
-  const TriParam& param = nnvm::get<TriParam>(attrs.parsed);
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
+  const TBlob& out_data       = outputs[0];
+  const TriParam& param       = nnvm::get<TriParam>(attrs.parsed);
   const mxnet::TShape& oshape = out_data.shape_;
 
   MSHADOW_TYPE_SWITCH_WITH_BOOL(out_data.type_flag_, DType, {
     Kernel<tri_fwd, xpu>::Launch(
-        s, out_data.Size(), out_data.dptr<DType>(),
-        Shape2(oshape[0], oshape[1]), param.k);
+        s, out_data.Size(), out_data.dptr<DType>(), Shape2(oshape[0], oshape[1]), param.k);
   });
 }
 
diff --git a/src/operator/numpy/np_tri_op.cc b/src/operator/numpy/np_tri_op.cc
index 945f28859d63..62b4af211168 100644
--- a/src/operator/numpy/np_tri_op.cc
+++ b/src/operator/numpy/np_tri_op.cc
@@ -18,10 +18,10 @@
  */
 
 /*!
-* Copyright (c) 2019 by Contributors
-* \file np_tri_op.cc
-* \brief CPU implementation of numpy tri operator
-*/
+ * Copyright (c) 2019 by Contributors
+ * \file np_tri_op.cc
+ * \brief CPU implementation of numpy tri operator
+ */
 
 #include "./np_tri_op-inl.h"
 
@@ -31,21 +31,21 @@ namespace op {
 DMLC_REGISTER_PARAMETER(TriParam);
 
 inline bool TriOpShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector* in_attrs,
-                      mxnet::ShapeVector* out_attrs) {
+                       mxnet::ShapeVector* in_attrs,
+                       mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   const TriParam& param = nnvm::get<TriParam>(attrs.parsed);
-  nnvm::dim_t M = param.M.has_value() ? param.M.value() : param.N;
+  nnvm::dim_t M         = param.M.has_value() ? param.M.value() : param.N;
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::Shape2(param.N, M));
 
   return shape_is_known(out_attrs->at(0));
 }
 
 inline bool TriOpType(const nnvm::NodeAttrs& attrs,
-                      std::vector<int> *in_attrs,
-                      std::vector<int> *out_attrs) {
+                      std::vector<int>* in_attrs,
+                      std::vector<int>* out_attrs) {
   CHECK_GE(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -56,14 +56,14 @@ inline bool TriOpType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_tri)
-.set_attr_parser(ParamParser<TriParam>)
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", TriOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TriOpType)
-.set_attr<FCompute>("FCompute<cpu>", TriOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_arguments(TriParam::__FIELDS__());
+    .set_attr_parser(ParamParser<TriParam>)
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", TriOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TriOpType)
+    .set_attr<FCompute>("FCompute<cpu>", TriOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_arguments(TriParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_tri_op.cu b/src/operator/numpy/np_tri_op.cu
index 7a94590e247b..6f9441af2720 100644
--- a/src/operator/numpy/np_tri_op.cu
+++ b/src/operator/numpy/np_tri_op.cu
@@ -28,8 +28,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_tri)
-.set_attr<FCompute>("FCompute<gpu>", TriOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_tri).set_attr<FCompute>("FCompute<gpu>", TriOpForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_tril_op-inl.h b/src/operator/numpy/np_tril_op-inl.h
index 50943a09caa2..f69a90337533 100644
--- a/src/operator/numpy/np_tril_op-inl.h
+++ b/src/operator/numpy/np_tril_op-inl.h
@@ -40,12 +40,11 @@ namespace op {
 struct TrilParam : public dmlc::Parameter<TrilParam> {
   int k;
   DMLC_DECLARE_PARAMETER(TrilParam) {
-    DMLC_DECLARE_FIELD(k)
-      .set_default(0)
-      .describe("Diagonal in question. The default is 0. "
-                "Use k>0 for diagonals above the main diagonal, "
-                "and k<0 for diagonals below the main diagonal. "
-                "If input has shape (S0 S1) k must be between -S0 and S1");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Diagonal in question. The default is 0. "
+        "Use k>0 for diagonals above the main diagonal, "
+        "and k<0 for diagonals below the main diagonal. "
+        "If input has shape (S0 S1) k must be between -S0 and S1");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream k_s;
@@ -55,8 +54,8 @@ struct TrilParam : public dmlc::Parameter<TrilParam> {
 };
 
 inline bool TrilOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector* in_attrs,
-                             mxnet::ShapeVector* out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -82,11 +81,14 @@ inline bool TrilOpShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-template<int req>
+template <int req>
 struct tril1Dforward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<2> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<2> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i / oshape[1];
@@ -99,15 +101,18 @@ struct tril1Dforward {
   }
 };
 
-template<int req>
+template <int req>
 struct tril1Dbackward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<1> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<1> oshape,
+                                  int k) {
     using namespace mxnet_op;
-    auto m = oshape[0];
+    auto m     = oshape[0];
     auto start = (i > k) ? (i - k) : 0;
-    DType res = 0;
+    DType res  = 0;
     for (auto y = start; y < m; y++) {
       res += data[y * m + i];
     }
@@ -115,11 +120,14 @@ struct tril1Dbackward {
   }
 };
 
-template<int req>
+template <int req>
 struct tril2D {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<2> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<2> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i / oshape[1];
@@ -132,11 +140,14 @@ struct tril2D {
   }
 };
 
-template<int req>
+template <int req>
 struct tril3D {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<3> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<3> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i % (oshape[1] * oshape[2]) / oshape[2];
@@ -149,12 +160,12 @@ struct tril3D {
   }
 };
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 void TrilOpProcess(const TBlob& in_data,
                    const TBlob& out_data,
                    index_t dsize,
                    const TrilParam& param,
-                   mxnet_op::Stream<xpu> *s,
+                   mxnet_op::Stream<xpu>* s,
                    const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow;
@@ -165,17 +176,23 @@ void TrilOpProcess(const TBlob& in_data,
   if (ishape.ndim() == 2 && oshape.ndim() == 2) {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<tril2D<req_type>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            Shape2(oshape[0], oshape[1]), param.k);
+        Kernel<tril2D<req_type>, xpu>::Launch(s,
+                                              dsize,
+                                              out_data.dptr<DType>(),
+                                              in_data.dptr<DType>(),
+                                              Shape2(oshape[0], oshape[1]),
+                                              param.k);
       });
     });
   } else if (ishape.ndim() > 2) {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<tril3D<req_type>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            oshape.FlatTo3D(oshape.ndim() - 2), param.k);
+        Kernel<tril3D<req_type>, xpu>::Launch(s,
+                                              dsize,
+                                              out_data.dptr<DType>(),
+                                              in_data.dptr<DType>(),
+                                              oshape.FlatTo3D(oshape.ndim() - 2),
+                                              param.k);
       });
     });
   } else {
@@ -183,19 +200,21 @@ void TrilOpProcess(const TBlob& in_data,
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         if (back) {
           Kernel<tril1Dbackward<req_type>, xpu>::Launch(
-              s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-              Shape1(oshape[0]), param.k);
+              s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), Shape1(oshape[0]), param.k);
         } else {
-          Kernel<tril1Dforward<req_type>, xpu>::Launch(
-              s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-              Shape2(oshape[0], oshape[1]), param.k);
+          Kernel<tril1Dforward<req_type>, xpu>::Launch(s,
+                                                       dsize,
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       Shape2(oshape[0], oshape[1]),
+                                                       param.k);
         }
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void TrilOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -206,15 +225,15 @@ void TrilOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
+  const TBlob& in_data   = inputs[0];
+  const TBlob& out_data  = outputs[0];
   const TrilParam& param = nnvm::get<TrilParam>(attrs.parsed);
 
   TrilOpProcess<xpu, false>(in_data, out_data, out_data.Size(), param, s, req);
 }
 
-template<typename xpu>
+template <typename xpu>
 void TrilOpBackward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -224,10 +243,10 @@ void TrilOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  const TBlob& in_data   = inputs[0];
+  const TBlob& out_data  = outputs[0];
   const TrilParam& param = nnvm::get<TrilParam>(attrs.parsed);
 
   TrilOpProcess<xpu, true>(in_data, out_data, out_data.Size(), param, s, req);
diff --git a/src/operator/numpy/np_tril_op.cc b/src/operator/numpy/np_tril_op.cc
index 5c4b339b7768..d11f1913fad7 100644
--- a/src/operator/numpy/np_tril_op.cc
+++ b/src/operator/numpy/np_tril_op.cc
@@ -18,10 +18,10 @@
  */
 
 /*!
-* Copyright (c) 2019 by Contributors
-* \file np_tril_op.cc
-* \brief CPU implementation of numpy tril operator
-*/
+ * Copyright (c) 2019 by Contributors
+ * \file np_tril_op.cc
+ * \brief CPU implementation of numpy tril operator
+ */
 
 #include "./np_tril_op-inl.h"
 
@@ -31,31 +31,30 @@ namespace op {
 DMLC_REGISTER_PARAMETER(TrilParam);
 
 NNVM_REGISTER_OP(_npi_tril)
-.set_attr_parser(ParamParser<TrilParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TrilOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", TrilOpForward<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_tril"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(TrilParam::__FIELDS__());
-
+    .set_attr_parser(ParamParser<TrilParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TrilOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", TrilOpForward<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_tril"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(TrilParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_tril)
-.set_attr_parser(ParamParser<TrilParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TrilOpBackward<cpu>);
+    .set_attr_parser(ParamParser<TrilParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TrilOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_tril_op.cu b/src/operator/numpy/np_tril_op.cu
index 64613b505ded..c188045dc9f2 100644
--- a/src/operator/numpy/np_tril_op.cu
+++ b/src/operator/numpy/np_tril_op.cu
@@ -28,11 +28,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_tril)
-.set_attr<FCompute>("FCompute<gpu>", TrilOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_tril).set_attr<FCompute>("FCompute<gpu>", TrilOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_tril)
-.set_attr<FCompute>("FCompute<gpu>", TrilOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_tril).set_attr<FCompute>("FCompute<gpu>", TrilOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_triu_op-inl.h b/src/operator/numpy/np_triu_op-inl.h
index 17a484f26efb..c9d42481b0d9 100644
--- a/src/operator/numpy/np_triu_op-inl.h
+++ b/src/operator/numpy/np_triu_op-inl.h
@@ -42,12 +42,11 @@ namespace op {
 struct TriuParam : public dmlc::Parameter<TriuParam> {
   int k;
   DMLC_DECLARE_PARAMETER(TriuParam) {
-    DMLC_DECLARE_FIELD(k)
-      .set_default(0)
-      .describe("Diagonal in question. The default is 0. "
-                "Use k>0 for diagonals above the main diagonal, "
-                "and k<0 for diagonals below the main diagonal. "
-                "If input has shape (S0 S1) k must be between -S0 and S1.");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Diagonal in question. The default is 0. "
+        "Use k>0 for diagonals above the main diagonal, "
+        "and k<0 for diagonals below the main diagonal. "
+        "If input has shape (S0 S1) k must be between -S0 and S1.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream k_s;
@@ -84,11 +83,14 @@ inline bool TriuOpShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-template<int req>
+template <int req>
 struct triu1Dforward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<2> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<2> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i / oshape[1];
@@ -101,15 +103,18 @@ struct triu1Dforward {
   }
 };
 
-template<int req>
+template <int req>
 struct triu1Dbackward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<1> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<1> oshape,
+                                  int k) {
     using namespace mxnet_op;
-    auto m = oshape[0];
+    auto m     = oshape[0];
     auto start = i - k;
-    DType res = 0;
+    DType res  = 0;
     for (auto y = 0; y <= start && y < m; y++) {
       res += data[y * m + i];
     }
@@ -117,11 +122,14 @@ struct triu1Dbackward {
   }
 };
 
-template<int req>
+template <int req>
 struct triu2D {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<2> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<2> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i / oshape[1];
@@ -134,11 +142,14 @@ struct triu2D {
   }
 };
 
-template<int req>
+template <int req>
 struct triu3D {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
-                                  mshadow::Shape<3> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
+                                  mshadow::Shape<3> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     const index_t row_id = i % (oshape[1] * oshape[2]) / oshape[2];
@@ -151,12 +162,12 @@ struct triu3D {
   }
 };
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 void TriuOpProcess(const TBlob& in_data,
                    const TBlob& out_data,
                    index_t dsize,
                    const TriuParam& param,
-                   mxnet_op::Stream<xpu> *s,
+                   mxnet_op::Stream<xpu>* s,
                    const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow;
@@ -167,17 +178,23 @@ void TriuOpProcess(const TBlob& in_data,
   if (ishape.ndim() == 2 && oshape.ndim() == 2) {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<triu2D<req_type>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            Shape2(oshape[0], oshape[1]), param.k);
+        Kernel<triu2D<req_type>, xpu>::Launch(s,
+                                              dsize,
+                                              out_data.dptr<DType>(),
+                                              in_data.dptr<DType>(),
+                                              Shape2(oshape[0], oshape[1]),
+                                              param.k);
       });
     });
   } else if (ishape.ndim() > 2) {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<triu3D<req_type>, xpu>::Launch(
-            s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-            oshape.FlatTo3D(oshape.ndim() - 2), param.k);
+        Kernel<triu3D<req_type>, xpu>::Launch(s,
+                                              dsize,
+                                              out_data.dptr<DType>(),
+                                              in_data.dptr<DType>(),
+                                              oshape.FlatTo3D(oshape.ndim() - 2),
+                                              param.k);
       });
     });
   } else {
@@ -185,19 +202,21 @@ void TriuOpProcess(const TBlob& in_data,
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         if (back) {
           Kernel<triu1Dbackward<req_type>, xpu>::Launch(
-              s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-              Shape1(oshape[0]), param.k);
+              s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(), Shape1(oshape[0]), param.k);
         } else {
-          Kernel<triu1Dforward<req_type>, xpu>::Launch(
-              s, dsize, out_data.dptr<DType>(), in_data.dptr<DType>(),
-              Shape2(oshape[0], oshape[1]), param.k);
+          Kernel<triu1Dforward<req_type>, xpu>::Launch(s,
+                                                       dsize,
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       Shape2(oshape[0], oshape[1]),
+                                                       param.k);
         }
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void TriuOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -208,15 +227,15 @@ void TriuOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
+  const TBlob& in_data   = inputs[0];
+  const TBlob& out_data  = outputs[0];
   const TriuParam& param = nnvm::get<TriuParam>(attrs.parsed);
 
   TriuOpProcess<xpu, false>(in_data, out_data, out_data.Size(), param, s, req);
 }
 
-template<typename xpu>
+template <typename xpu>
 void TriuOpBackward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -226,10 +245,10 @@ void TriuOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  const TBlob& in_data   = inputs[0];
+  const TBlob& out_data  = outputs[0];
   const TriuParam& param = nnvm::get<TriuParam>(attrs.parsed);
 
   TriuOpProcess<xpu, true>(in_data, out_data, out_data.Size(), param, s, req);
diff --git a/src/operator/numpy/np_triu_op.cc b/src/operator/numpy/np_triu_op.cc
index fdd526060001..5bd171f249d9 100644
--- a/src/operator/numpy/np_triu_op.cc
+++ b/src/operator/numpy/np_triu_op.cc
@@ -18,10 +18,10 @@
  */
 
 /*!
-* Copyright (c) 2020 by Contributors
-* \file np_triu_op.cc
-* \brief CPU implementation of numpy triu operator
-*/
+ * Copyright (c) 2020 by Contributors
+ * \file np_triu_op.cc
+ * \brief CPU implementation of numpy triu operator
+ */
 
 #include "./np_triu_op-inl.h"
 
@@ -31,31 +31,30 @@ namespace op {
 DMLC_REGISTER_PARAMETER(TriuParam);
 
 NNVM_REGISTER_OP(_npi_triu)
-.set_attr_parser(ParamParser<TriuParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TriuOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", TriuOpForward<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_triu"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(TriuParam::__FIELDS__());
-
+    .set_attr_parser(ParamParser<TriuParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TriuOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", TriuOpForward<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_triu"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(TriuParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_triu)
-.set_attr_parser(ParamParser<TriuParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TriuOpBackward<cpu>);
+    .set_attr_parser(ParamParser<TriuParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TriuOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_triu_op.cu b/src/operator/numpy/np_triu_op.cu
index a143859e1db6..e9d7e8b127ae 100644
--- a/src/operator/numpy/np_triu_op.cu
+++ b/src/operator/numpy/np_triu_op.cu
@@ -28,11 +28,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_triu)
-.set_attr<FCompute>("FCompute<gpu>", TriuOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_triu).set_attr<FCompute>("FCompute<gpu>", TriuOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_triu)
-.set_attr<FCompute>("FCompute<gpu>", TriuOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_triu).set_attr<FCompute>("FCompute<gpu>", TriuOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_true_divide-inl.h b/src/operator/numpy/np_true_divide-inl.h
index ea0057b1606c..21a4ba8a8b57 100644
--- a/src/operator/numpy/np_true_divide-inl.h
+++ b/src/operator/numpy/np_true_divide-inl.h
@@ -34,56 +34,57 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu, typename OP>
-void TrueDivideScalarCompute(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+template <typename xpu, typename OP>
+void TrueDivideScalarCompute(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp || outputs[0].Size() == 0U) return;
+  if (req[0] == kNullOp || outputs[0].Size() == 0U)
+    return;
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                      = ctx.get_stream<xpu>();
   const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-  const double alpha = param.scalar;
-  const TBlob& data = inputs[0];
-  const TBlob& out = outputs[0];
+  const double alpha                  = param.scalar;
+  const TBlob& data                   = inputs[0];
+  const TBlob& out                    = outputs[0];
   if (out.type_flag_ == data.type_flag_) {
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         Kernel<op_with_req<OP, Req>, xpu>::Launch(
-          s, data.Size(), out.dptr<DType>(), data.dptr<DType>(), DType(alpha));
+            s, data.Size(), out.dptr<DType>(), data.dptr<DType>(), DType(alpha));
       });
     });
   } else {
     CHECK(out.type_flag_ == mshadow::kFloat32 || out.type_flag_ == mshadow::kFloat64)
-      << "true_divide only supports float32 and float64"
-         " output when input's dtype is "
-      << type_string(inputs[0].type_flag_);
+        << "true_divide only supports float32 and float64"
+           " output when input's dtype is "
+        << type_string(inputs[0].type_flag_);
     MSHADOW_REAL_TYPE_SWITCH(out.type_flag_, ODType, {
       MXNET_INT_TYPE_SWITCH(inputs[0].type_flag_, DType, {
         MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
           Kernel<op_with_req<OP, Req>, xpu>::Launch(
-            s, data.Size(), out.dptr<ODType>(), data.dptr<DType>(),
-            static_cast<ODType>(alpha));
+              s, data.Size(), out.dptr<ODType>(), data.dptr<DType>(), static_cast<ODType>(alpha));
         });
       });
     });
   }
 }
 
-template<typename xpu>
-void TrueDivideElemwiseCompute(const nnvm::NodeAttrs &attrs,
-                               const OpContext &ctx,
-                               const std::vector<TBlob> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<TBlob> &outputs) {
+template <typename xpu>
+void TrueDivideElemwiseCompute(const nnvm::NodeAttrs& attrs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  if (req[0] == kNullOp || outputs[0].Size() == 0U) return;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp || outputs[0].Size() == 0U)
+    return;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
@@ -97,19 +98,19 @@ void TrueDivideElemwiseCompute(const nnvm::NodeAttrs &attrs,
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         MSHADOW_REAL_TYPE_SWITCH(lhs.type_flag_, DType, {
           Kernel<op_with_req<mshadow_op::true_divide, Req>, xpu>::Launch(
-            s, out.Size(), out.dptr<DType>(), lhs.dptr<DType>(), rhs.dptr<DType>());
+              s, out.Size(), out.dptr<DType>(), lhs.dptr<DType>(), rhs.dptr<DType>());
         });
       });
     } else {
       // If both are the same integers, output is float32 or float64
       CHECK_EQ(out.type_flag_, mxnet::common::GetDefaultDtype())
-        << "true_divide only supports float32 and float64"
-            " output when input's dtype is "
-        << type_string(lhs.type_flag_);
+          << "true_divide only supports float32 and float64"
+             " output when input's dtype is "
+          << type_string(lhs.type_flag_);
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         MXNET_INT_TYPE_SWITCH(lhs.type_flag_, DType, {
           Kernel<op_with_req<mshadow_op::true_divide, Req>, xpu>::Launch(
-            s, out.Size(), out.dptr<float>(), lhs.dptr<DType>(), rhs.dptr<DType>());
+              s, out.Size(), out.dptr<float>(), lhs.dptr<DType>(), rhs.dptr<DType>());
         });
       });
     }
@@ -120,16 +121,15 @@ void TrueDivideElemwiseCompute(const nnvm::NodeAttrs &attrs,
       LOG(FATAL) << "not implemented yet...";
     } else if (common::is_float(lhs.type_flag_) || common::is_float(rhs.type_flag_)) {
       // one is float type, the other is integer type, the output type should be the same as float
-      CHECK_EQ(out.type_flag_,
-               common::is_float(lhs.type_flag_) ? lhs.type_flag_ : rhs.type_flag_)
-        << "This case out type should be same as the float type";
+      CHECK_EQ(out.type_flag_, common::is_float(lhs.type_flag_) ? lhs.type_flag_ : rhs.type_flag_)
+          << "This case out type should be same as the float type";
       if (common::is_float(lhs.type_flag_)) {
         // lhs is the float one
         MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
           MSHADOW_REAL_TYPE_SWITCH(lhs.type_flag_, LType, {
             MXNET_INT_TYPE_SWITCH(rhs.type_flag_, RType, {
               Kernel<op_with_req<mshadow_op::rtrue_divide, Req>, xpu>::Launch(
-                s, out.Size(), out.dptr<LType>(), rhs.dptr<RType>(), lhs.dptr<LType>());
+                  s, out.Size(), out.dptr<LType>(), rhs.dptr<RType>(), lhs.dptr<LType>());
             });
           });
         });
@@ -139,7 +139,7 @@ void TrueDivideElemwiseCompute(const nnvm::NodeAttrs &attrs,
           MXNET_INT_TYPE_SWITCH(lhs.type_flag_, LType, {
             MSHADOW_REAL_TYPE_SWITCH(rhs.type_flag_, RType, {
               Kernel<op_with_req<mshadow_op::true_divide, Req>, xpu>::Launch(
-                s, out.Size(), out.dptr<RType>(), lhs.dptr<LType>(), rhs.dptr<RType>());
+                  s, out.Size(), out.dptr<RType>(), lhs.dptr<LType>(), rhs.dptr<RType>());
             });
           });
         });
@@ -151,28 +151,30 @@ void TrueDivideElemwiseCompute(const nnvm::NodeAttrs &attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void TrueDivideBroadcastCompute(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  if (outputs[0].shape_.Size() == 0U) return;
+  if (outputs[0].shape_.Size() == 0U)
+    return;
   CHECK_EQ(inputs.size(), 2U);
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      inputs[0].shape_, inputs[1].shape_, outputs[0].shape_, &new_lshape, &new_rshape, &new_oshape);
   if (!ndim) {
     TrueDivideElemwiseCompute<xpu>(attrs, ctx, inputs, req, outputs);
   } else {
-    if (req[0] == kNullOp) return;
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    const TBlob& lhs = inputs[0];
-    const TBlob& rhs = inputs[1];
-    const TBlob& out = outputs[0];
+    if (req[0] == kNullOp)
+      return;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    const TBlob& lhs        = inputs[0];
+    const TBlob& rhs        = inputs[1];
+    const TBlob& out        = outputs[0];
     BROADCAST_NDIM_SWITCH(ndim, NDim, {
-      mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+      mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
       mshadow::Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
       mshadow::Shape<NDim> rstride = calc_stride(new_rshape.get<NDim>());
       if (lhs.type_flag_ == rhs.type_flag_) {
@@ -180,19 +182,33 @@ void TrueDivideBroadcastCompute(const nnvm::NodeAttrs& attrs,
         if (common::is_float(lhs.type_flag_)) {
           // If both inputs are the same float types, output is the same float type
           MSHADOW_REAL_TYPE_SWITCH(lhs.type_flag_, DType, {
-            Kernel<binary_broadcast_kernel<NDim, mshadow_op::true_divide>, xpu>::
-              template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-                                lhs.dptr<DType>(), rhs.dptr<DType>(), out.dptr<DType>());
+            Kernel<binary_broadcast_kernel<NDim, mshadow_op::true_divide>, xpu>::template LaunchEx(
+                s,
+                new_oshape.Size(),
+                req[0],
+                lstride,
+                rstride,
+                oshape,
+                lhs.dptr<DType>(),
+                rhs.dptr<DType>(),
+                out.dptr<DType>());
           });
         } else {
           CHECK_EQ(out.type_flag_, mxnet::common::GetDefaultDtype())
-            << "true_divide only supports float32 and float64 output when input's dtype is "
-            << type_string(lhs.type_flag_);
+              << "true_divide only supports float32 and float64 output when input's dtype is "
+              << type_string(lhs.type_flag_);
           MXNET_INT_TYPE_SWITCH(lhs.type_flag_, DType, {
             // If both inputs are the same integer types, output is float type
-            Kernel<binary_broadcast_kernel<NDim, mshadow_op::true_divide>, xpu>::
-              template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-                                lhs.dptr<DType>(), rhs.dptr<DType>(), out.dptr<float>());
+            Kernel<binary_broadcast_kernel<NDim, mshadow_op::true_divide>, xpu>::template LaunchEx(
+                s,
+                new_oshape.Size(),
+                req[0],
+                lstride,
+                rstride,
+                oshape,
+                lhs.dptr<DType>(),
+                rhs.dptr<DType>(),
+                out.dptr<float>());
           });
         }
       } else {
@@ -204,23 +220,37 @@ void TrueDivideBroadcastCompute(const nnvm::NodeAttrs& attrs,
           if (common::is_float(lhs.type_flag_)) {
             // lhs is float type, output will be the same float type
             CHECK_EQ(lhs.type_flag_, out.type_flag_)
-              << "lhs should have the same type as out, infer type broken?";
+                << "lhs should have the same type as out, infer type broken?";
             MSHADOW_REAL_TYPE_SWITCH(lhs.type_flag_, LType, {
               MXNET_INT_TYPE_SWITCH(rhs.type_flag_, RType, {
-                Kernel<binary_broadcast_kernel<NDim, mshadow_op::rtrue_divide>, xpu>::
-                  template LaunchEx(s, new_oshape.Size(), req[0], rstride, lstride, oshape,
-                                    rhs.dptr<RType>(), lhs.dptr<LType>(), out.dptr<LType>());
+                Kernel<binary_broadcast_kernel<NDim, mshadow_op::rtrue_divide>,
+                       xpu>::template LaunchEx(s,
+                                               new_oshape.Size(),
+                                               req[0],
+                                               rstride,
+                                               lstride,
+                                               oshape,
+                                               rhs.dptr<RType>(),
+                                               lhs.dptr<LType>(),
+                                               out.dptr<LType>());
               });
             });
           } else {
             // rhs is float type, output will be the same float type
             CHECK_EQ(rhs.type_flag_, out.type_flag_)
-              << "rhs should have the same type as out, infer type broken?";
+                << "rhs should have the same type as out, infer type broken?";
             MXNET_INT_TYPE_SWITCH(lhs.type_flag_, LType, {
               MSHADOW_REAL_TYPE_SWITCH(rhs.type_flag_, RType, {
-                Kernel<binary_broadcast_kernel<NDim, mshadow_op::true_divide>, xpu>::
-                  template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-                                    lhs.dptr<LType>(), rhs.dptr<RType>(), out.dptr<RType>());
+                Kernel<binary_broadcast_kernel<NDim, mshadow_op::true_divide>,
+                       xpu>::template LaunchEx(s,
+                                               new_oshape.Size(),
+                                               req[0],
+                                               lstride,
+                                               rstride,
+                                               oshape,
+                                               lhs.dptr<LType>(),
+                                               rhs.dptr<RType>(),
+                                               out.dptr<RType>());
               });
             });
           }
diff --git a/src/operator/numpy/np_true_divide.cc b/src/operator/numpy/np_true_divide.cc
index 3c2d744e4a21..887a57fd0513 100644
--- a/src/operator/numpy/np_true_divide.cc
+++ b/src/operator/numpy/np_true_divide.cc
@@ -49,87 +49,87 @@ bool TrueDivideType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
 
   for (const int dtype : *in_attrs) {
-    if (dtype == -1) return false;
+    if (dtype == -1)
+      return false;
   }
 
   const int lhs_dtype = in_attrs->at(0);
-  const int rhs_dtype = (num_inputs == 2) ?
-                        in_attrs->at(1) :
-                        (common::is_float(lhs_dtype) ?
-                         lhs_dtype : mxnet::common::GetDefaultDtype());
+  const int rhs_dtype =
+      (num_inputs == 2)
+          ? in_attrs->at(1)
+          : (common::is_float(lhs_dtype) ? lhs_dtype : mxnet::common::GetDefaultDtype());
   TYPE_ASSIGN_CHECK(*out_attrs, 0, TrueDivideOutType(lhs_dtype, rhs_dtype));
   return true;
 }
 
 NNVM_REGISTER_OP(_npi_true_divide)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", TrueDivideType<2>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", TrueDivideBroadcastCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_div"})
-.add_argument("lhs", "NDArray-or-Symbol", "Dividend array")
-.add_argument("rhs", "NDArray-or-Symbol", "Divisor array");
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", TrueDivideType<2>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", TrueDivideBroadcastCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_npi_broadcast_div"})
+    .add_argument("lhs", "NDArray-or-Symbol", "Dividend array")
+    .add_argument("rhs", "NDArray-or-Symbol", "Divisor array");
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_div)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBinaryBackwardUseIn<cpu, mshadow_op::div_grad,
-                                                              mshadow_op::div_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyBinaryBackwardUseIn<cpu, mshadow_op::div_grad, mshadow_op::div_rgrad>);
 
 NNVM_REGISTER_OP(_npi_true_divide_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", TrueDivideType<1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", TrueDivideScalarCompute<cpu, op::mshadow_op::true_divide>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_div_scalar"})
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", TrueDivideType<1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", TrueDivideScalarCompute<cpu, op::mshadow_op::true_divide>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_div_scalar"})
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_rtrue_divide_scalar)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", TrueDivideType<1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", TrueDivideType<1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
 #ifdef _WIN32
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.set_attr<FCompute>("FCompute<cpu>", TrueDivideScalarCompute<cpu, mshadow_op::rtrue_divide>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rdiv_scalar"})
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__());
+    .set_attr<FCompute>("FCompute<cpu>", TrueDivideScalarCompute<cpu, mshadow_op::rtrue_divide>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rdiv_scalar"})
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_true_divide.cu b/src/operator/numpy/np_true_divide.cu
index 757fa0d9e8a2..e720e3476a08 100644
--- a/src/operator/numpy/np_true_divide.cu
+++ b/src/operator/numpy/np_true_divide.cu
@@ -29,16 +29,16 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_true_divide)
-.set_attr<FCompute>("FCompute<gpu>", TrueDivideBroadcastCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", TrueDivideBroadcastCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_npi_broadcast_div)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"div_grad", "div_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"div_grad", "div_rgrad"});
 
 NNVM_REGISTER_OP(_npi_true_divide_scalar)
-.set_attr<FCompute>("FCompute<gpu>", TrueDivideScalarCompute<gpu, mshadow_op::true_divide>);
+    .set_attr<FCompute>("FCompute<gpu>", TrueDivideScalarCompute<gpu, mshadow_op::true_divide>);
 
 NNVM_REGISTER_OP(_npi_rtrue_divide_scalar)
-.set_attr<FCompute>("FCompute<gpu>", TrueDivideScalarCompute<gpu, mshadow_op::rtrue_divide>);
+    .set_attr<FCompute>("FCompute<gpu>", TrueDivideScalarCompute<gpu, mshadow_op::rtrue_divide>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_unique_op.cc b/src/operator/numpy/np_unique_op.cc
index 7076b44ac3af..348e0a45a14b 100644
--- a/src/operator/numpy/np_unique_op.cc
+++ b/src/operator/numpy/np_unique_op.cc
@@ -28,8 +28,8 @@ namespace mxnet {
 namespace op {
 
 inline bool NumpyUniqueType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
@@ -42,14 +42,14 @@ inline bool NumpyUniqueType(const nnvm::NodeAttrs& attrs,
 inline bool NumpyUniqueStorageType(const nnvm::NodeAttrs& attrs,
                                    const int dev_mask,
                                    DispatchMode* dispatch_mode,
-                                   std::vector<int> *in_attrs,
-                                   std::vector<int> *out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   // CHECK_EQ(out_attrs->size(), 1U);
-  for (int &attr : *in_attrs) {
+  for (int& attr : *in_attrs) {
     CHECK_EQ(attr, kDefaultStorage) << "Only default storage is supported";
   }
-  for (int &attr : *out_attrs) {
+  for (int& attr : *out_attrs) {
     attr = kDefaultStorage;
   }
   *dispatch_mode = DispatchMode::kFComputeEx;
@@ -61,9 +61,12 @@ struct UniqueComputeAuxCPUKernel {
   // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
   // M is the number of columns of in_data and out_data
   // i is the index of out_data
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(dim_t i, DType* out_data, const DType* in_data,
-                                  const dim_t* idx, const dim_t M) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(dim_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const dim_t* idx,
+                                  const dim_t M) {
     dim_t j = idx[i];
 #pragma GCC diagnostic push
 #if __GNUC__ >= 8
@@ -75,7 +78,7 @@ struct UniqueComputeAuxCPUKernel {
 };
 
 struct UniqueComputeMaskCPUKernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(dim_t i,
                                   dim_t* out_data,
                                   const DType* in_data,
@@ -83,36 +86,39 @@ struct UniqueComputeMaskCPUKernel {
     if (i == 0) {
       out_data[i] = 1;
     } else {
-      out_data[i] = (std::memcmp(in_data + i * numel,
-                     in_data + (i - 1) * numel, numel * sizeof(DType)) == 0) ? 0 : 1;
+      out_data[i] =
+          (std::memcmp(in_data + i * numel, in_data + (i - 1) * numel, numel * sizeof(DType)) == 0)
+              ? 0
+              : 1;
     }
   }
 };
 
 void NumpyUniqueCPUNoneAxisImpl(const NumpyUniqueParam& param,
-                                const OpContext &ctx,
-                                const std::vector<NDArray> &inputs,
-                                const std::vector<OpReqType> &req,
-                                const std::vector<NDArray> &outputs) {
+                                const OpContext& ctx,
+                                const std::vector<NDArray>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<NDArray>& outputs) {
   MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {
-    mshadow::Stream<cpu> *stream = ctx.get_stream<cpu>();
+    mshadow::Stream<cpu>* stream = ctx.get_stream<cpu>();
 
     DType* input_data = inputs[0].data().dptr<DType>();
-    dim_t input_size = inputs[0].shape().Size();
+    dim_t input_size  = inputs[0].shape().Size();
     if (param.return_index || param.return_inverse || param.return_counts) {
       // argsort, result in perm
       std::vector<dim_t> perm(input_size);
       std::iota(perm.begin(), perm.end(), 0);
-      std::stable_sort(perm.begin(), perm.end(),
-        [&input_data] (dim_t i1, dim_t i2) {return input_data[i1] < input_data[i2];});
+      std::stable_sort(perm.begin(), perm.end(), [&input_data](dim_t i1, dim_t i2) {
+        return input_data[i1] < input_data[i2];
+      });
       // sorted data in aux
       std::vector<DType> aux(input_size);
       mxnet_op::Kernel<UniqueComputeAuxCPUKernel, cpu>::Launch(
-        stream, input_size, aux.data(), input_data, perm.data(), 1);
+          stream, input_size, aux.data(), input_data, perm.data(), 1);
       // calculate unique mask
       std::vector<dim_t> mask(input_size);
       mxnet_op::Kernel<UniqueComputeMaskCPUKernel, cpu>::Launch(
-        stream, input_size, mask.data(), aux.data(), 1);
+          stream, input_size, mask.data(), aux.data(), 1);
       // Calculate prefix sum
       std::vector<int32_t> prefix_sum(input_size, 0);
       int32_t valid_num = 0;
@@ -123,28 +129,26 @@ void NumpyUniqueCPUNoneAxisImpl(const NumpyUniqueParam& param,
       valid_num = prefix_sum[input_size - 1];
       // set the output shape forcefully
       mxnet::TShape s(1, valid_num);
-      const_cast<NDArray &>(outputs[0]).Init(s);
+      const_cast<NDArray&>(outputs[0]).Init(s);
       // launch kernal to obtain unique array, reuse boolean_mask kernel
       mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(
-        stream, input_size, outputs[0].data().dptr<DType>(), aux.data(),
-        prefix_sum.data(), 1);
+          stream, input_size, outputs[0].data().dptr<DType>(), aux.data(), prefix_sum.data(), 1);
       // handle other optional outputs
       int output_flag = 0;
       if (param.return_index) {
         output_flag += 1;
-        const_cast<NDArray &>(outputs[output_flag]).Init(s);
+        const_cast<NDArray&>(outputs[output_flag]).Init(s);
         dim_t* unique_indices = outputs[output_flag].data().dptr<dim_t>();
         // reuse boolean_mask kernel
         mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(
-          stream, input_size, unique_indices, perm.data(),
-          prefix_sum.data(), 1);
+            stream, input_size, unique_indices, perm.data(), prefix_sum.data(), 1);
       }
       if (param.return_inverse) {
         output_flag += 1;
-        const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, input_size));
+        const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, input_size));
         dim_t* unique_inverse = outputs[output_flag].data().dptr<dim_t>();
         mxnet_op::Kernel<UniqueReturnInverseKernel, cpu>::Launch(
-          stream, input_size, unique_inverse, prefix_sum.data(), perm.data());
+            stream, input_size, unique_inverse, prefix_sum.data(), perm.data());
       }
       if (param.return_counts) {
         output_flag += 1;
@@ -157,32 +161,32 @@ void NumpyUniqueCPUNoneAxisImpl(const NumpyUniqueParam& param,
           }
         }
         *iter = input_size;
-        const_cast<NDArray &>(outputs[output_flag]).Init(s);
+        const_cast<NDArray&>(outputs[output_flag]).Init(s);
         dim_t* unique_counts = outputs[output_flag].data().dptr<dim_t>();
         mxnet_op::Kernel<UniqueReturnCountsKernel, cpu>::Launch(
-          stream, valid_num, unique_counts, idx.data());
+            stream, valid_num, unique_counts, idx.data());
       }
     } else {
       std::set<DType> set(input_data, input_data + input_size);
       mxnet::TShape s(1, set.size());
-      const_cast<NDArray &>(outputs[0]).Init(s);
+      const_cast<NDArray&>(outputs[0]).Init(s);
       std::copy(set.begin(), set.end(), outputs[0].data().dptr<DType>());
     }
   });
 }
 
 void NumpyUniqueCPUImpl(const NumpyUniqueParam& param,
-                        const OpContext &ctx,
-                        const std::vector<NDArray> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<NDArray> &outputs) {
+                        const OpContext& ctx,
+                        const std::vector<NDArray>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<NDArray>& outputs) {
   CHECK(param.axis.value() >= -1 * inputs[0].shape().ndim() &&
-      param.axis.value() < inputs[0].shape().ndim())
+        param.axis.value() < inputs[0].shape().ndim())
       << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
   MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<cpu> *stream = ctx.get_stream<cpu>();
+    Stream<cpu>* stream = ctx.get_stream<cpu>();
     const index_t actual_axis =
         param.axis.value() + ((param.axis.value() < 0) ? inputs[0].shape().ndim() : 0);
     // reshape tensor to [origin_shape[axis], -1]
@@ -191,37 +195,39 @@ void NumpyUniqueCPUImpl(const NumpyUniqueParam& param,
         inputs[0].data().FlatTo3D<cpu, DType>(actual_axis, stream);
     Tensor<cpu, 1, DType> workspace = ctx.requested[0].get_space_typed<cpu, 1, DType>(
         Shape1(input_tensor_3d.shape_.Size() * 2), stream);
-    Tensor<cpu, 3, DType> input_tensor(workspace.dptr_, Shape3(
-        input_tensor_3d.shape_[1], input_tensor_3d.shape_[0], input_tensor_3d.shape_[2]), stream);
-    input_tensor = swapaxis<1, 0>(input_tensor_3d);
+    Tensor<cpu, 3, DType> input_tensor(
+        workspace.dptr_,
+        Shape3(input_tensor_3d.shape_[1], input_tensor_3d.shape_[0], input_tensor_3d.shape_[2]),
+        stream);
+    input_tensor              = swapaxis<1, 0>(input_tensor_3d);
     const Shape<3> temp_shape = input_tensor.shape_;
-    DType* input_data = input_tensor.dptr_;
-    dim_t numel = temp_shape[1] * temp_shape[2];
+    DType* input_data         = input_tensor.dptr_;
+    dim_t numel               = temp_shape[1] * temp_shape[2];
     // argsort, result in perm
     std::vector<dim_t> perm(temp_shape[0]);
     std::iota(perm.begin(), perm.end(), 0);
-    std::stable_sort(perm.begin(), perm.end(),
-      [&](dim_t a, dim_t b) -> bool {
-        for (dim_t i = 0; i < numel; ++i) {
-          DType lhs = input_data[i + a * numel];
-          DType rhs = input_data[i + b * numel];
-          if (lhs < rhs) {
-            return true;
-          } else if (lhs > rhs) {
-            return false;
-          }
+    std::stable_sort(perm.begin(), perm.end(), [&](dim_t a, dim_t b) -> bool {
+      for (dim_t i = 0; i < numel; ++i) {
+        DType lhs = input_data[i + a * numel];
+        DType rhs = input_data[i + b * numel];
+        if (lhs < rhs) {
+          return true;
+        } else if (lhs > rhs) {
+          return false;
         }
-        return false;
-      });
+      }
+      return false;
+    });
     // sorted data in aux
     Tensor<cpu, 2, DType> aux(workspace.dptr_ + input_tensor_3d.shape_.Size(),
-        Shape2(temp_shape[0], temp_shape[1] * temp_shape[2]), stream);
+                              Shape2(temp_shape[0], temp_shape[1] * temp_shape[2]),
+                              stream);
     mxnet_op::Kernel<UniqueComputeAuxCPUKernel, cpu>::Launch(
-      stream, temp_shape[0], aux.dptr_, input_data, perm.data(), numel);
+        stream, temp_shape[0], aux.dptr_, input_data, perm.data(), numel);
     // calculate unique mask
     std::vector<dim_t> mask(temp_shape[0]);
     mxnet_op::Kernel<UniqueComputeMaskCPUKernel, cpu>::Launch(
-      stream, temp_shape[0], mask.data(), aux.dptr_, numel);
+        stream, temp_shape[0], mask.data(), aux.dptr_, numel);
     // calculate prefix sum
     std::vector<int32_t> prefix_sum(temp_shape[0], 0);
     int32_t valid_num = 0;
@@ -231,36 +237,34 @@ void NumpyUniqueCPUImpl(const NumpyUniqueParam& param,
     }
     valid_num = prefix_sum[temp_shape[0] - 1];
     // store the temp output data, reuse the space of 'input_tensor'
-    Tensor<cpu, 3, DType> temp_tensor(workspace.dptr_,
-        Shape3(valid_num, temp_shape[1], temp_shape[2]), stream);
+    Tensor<cpu, 3, DType> temp_tensor(
+        workspace.dptr_, Shape3(valid_num, temp_shape[1], temp_shape[2]), stream);
     // launch kernal to obtain unique array, reuse boolean_mask kernel
     mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(
-      stream, temp_shape[0], temp_tensor.dptr_, aux.dptr_,
-      prefix_sum.data(), numel);
+        stream, temp_shape[0], temp_tensor.dptr_, aux.dptr_, prefix_sum.data(), numel);
     // set the output shape forcefully and swap axis back
     mxnet::TShape out_shape(origin_shape);
     out_shape[actual_axis] = valid_num;
-    const_cast<NDArray &>(outputs[0]).Init(out_shape);
-    Tensor<cpu, 3, DType> output_tensor(outputs[0].data().dptr<DType>(),
-        Shape3(temp_shape[1], valid_num, temp_shape[2]), stream);
+    const_cast<NDArray&>(outputs[0]).Init(out_shape);
+    Tensor<cpu, 3, DType> output_tensor(
+        outputs[0].data().dptr<DType>(), Shape3(temp_shape[1], valid_num, temp_shape[2]), stream);
     output_tensor = swapaxis<1, 0>(temp_tensor);
     // handle other optional outputs
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
       dim_t* unique_indices = outputs[output_flag].data().dptr<dim_t>();
       // reuse boolean_mask kernel
       mxnet_op::Kernel<BooleanMaskForwardCPUKernel, cpu>::Launch(
-        stream, temp_shape[0], unique_indices, perm.data(),
-        prefix_sum.data(), 1);
+          stream, temp_shape[0], unique_indices, perm.data(), prefix_sum.data(), 1);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, temp_shape[0]));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, temp_shape[0]));
       dim_t* unique_inverse = outputs[output_flag].data().dptr<dim_t>();
       mxnet_op::Kernel<UniqueReturnInverseKernel, cpu>::Launch(
-        stream, temp_shape[0], unique_inverse, prefix_sum.data(), perm.data());
+          stream, temp_shape[0], unique_inverse, prefix_sum.data(), perm.data());
     }
     if (param.return_counts) {
       output_flag += 1;
@@ -273,7 +277,7 @@ void NumpyUniqueCPUImpl(const NumpyUniqueParam& param,
         }
       }
       *iter = temp_shape[0];
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
       dim_t* unique_counts = outputs[output_flag].data().dptr<dim_t>();
       mxnet_op::Kernel<UniqueReturnCountsKernel, cpu>::Launch(
           stream, valid_num, unique_counts, idx.data());
@@ -282,20 +286,20 @@ void NumpyUniqueCPUImpl(const NumpyUniqueParam& param,
 }
 
 void NumpyUniqueCPUForward(const nnvm::NodeAttrs& attrs,
-                           const OpContext &ctx,
-                           const std::vector<NDArray> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<NDArray> &outputs) {
+                           const OpContext& ctx,
+                           const std::vector<NDArray>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
   using namespace mshadow;
   const NumpyUniqueParam& param = nnvm::get<NumpyUniqueParam>(attrs.parsed);
   if (inputs[0].shape().ndim() == 0) {
     CHECK(!param.axis.has_value() || param.axis.value() == -1 || param.axis.value() == 0)
-      << "Axis can only be -1 or 0 for scalor tensor";
-    Stream<cpu> *s = ctx.get_stream<cpu>();
+        << "Axis can only be -1 or 0 for scalor tensor";
+    Stream<cpu>* s = ctx.get_stream<cpu>();
     mxnet::TShape shape_1(1, 1);
-    const_cast<NDArray &>(outputs[0]).Init(shape_1);
+    const_cast<NDArray&>(outputs[0]).Init(shape_1);
     MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {
       Tensor<cpu, 1, DType> unique_out =
           outputs[0].data().get_with_shape<cpu, 1, DType>(Shape1(1), s);
@@ -304,21 +308,21 @@ void NumpyUniqueCPUForward(const nnvm::NodeAttrs& attrs,
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_1);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_1);
       Tensor<cpu, 1, dim_t> outdata =
           outputs[output_flag].data().get_with_shape<cpu, 1, dim_t>(Shape1(1), s);
       ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, 0);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_1);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_1);
       Tensor<cpu, 1, dim_t> outdata =
           outputs[output_flag].data().get_with_shape<cpu, 1, dim_t>(Shape1(1), s);
       ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, 0);
     }
     if (param.return_counts) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_1);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_1);
       Tensor<cpu, 1, dim_t> outdata =
           outputs[output_flag].data().get_with_shape<cpu, 1, dim_t>(Shape1(1), s);
       ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, 1);
@@ -327,29 +331,30 @@ void NumpyUniqueCPUForward(const nnvm::NodeAttrs& attrs,
     // If the input tensor is zero size, only a check on axis is needed
     if (param.axis.has_value()) {
       int axis = param.axis.value();
-      if (axis < 0) axis += inputs[0].shape().ndim();
+      if (axis < 0)
+        axis += inputs[0].shape().ndim();
       CHECK(axis >= 0 && axis < inputs[0].shape().ndim())
-        << "Axis must be within the range of input tensor's dimension";
+          << "Axis must be within the range of input tensor's dimension";
     }
     // set the shapes of outputs
     mxnet::TShape shape_0(1, 0);
-    const_cast<NDArray &>(outputs[0]).Init(shape_0);
+    const_cast<NDArray&>(outputs[0]).Init(shape_0);
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_0);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_0);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_0);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_0);
     }
     if (param.return_counts) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_0);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_0);
     }
   } else {
     CHECK_LT(inputs[0].shape().Size(), INT32_MAX) << "ValueError: np.unique does not support large"
-      << " input tensors (containing >= 2^31).";
+                                                  << " input tensors (containing >= 2^31).";
     if (!param.axis.has_value()) {
       NumpyUniqueCPUNoneAxisImpl(param, ctx, inputs, req, outputs);
     } else {
@@ -361,30 +366,33 @@ void NumpyUniqueCPUForward(const nnvm::NodeAttrs& attrs,
 DMLC_REGISTER_PARAMETER(NumpyUniqueParam);
 
 NNVM_REGISTER_OP(_npi_unique)
-.set_attr_parser(ParamParser<NumpyUniqueParam>)
-.set_num_inputs(1)
-.set_num_outputs([](const NodeAttrs& attrs) {
-    const NumpyUniqueParam& param = nnvm::get<NumpyUniqueParam>(attrs.parsed);
-    int output_num = 1;
-    if (param.return_index) output_num += 1;
-    if (param.return_inverse) output_num += 1;
-    if (param.return_counts) output_num += 1;
-    return output_num;
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", NumpyUniqueType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", NumpyUniqueCPUForward)
-.set_attr<FInferStorageType>("FInferStorageType", NumpyUniqueStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "The input array")
-.add_arguments(NumpyUniqueParam::__FIELDS__());
+    .set_attr_parser(ParamParser<NumpyUniqueParam>)
+    .set_num_inputs(1)
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const NumpyUniqueParam& param = nnvm::get<NumpyUniqueParam>(attrs.parsed);
+      int output_num                = 1;
+      if (param.return_index)
+        output_num += 1;
+      if (param.return_inverse)
+        output_num += 1;
+      if (param.return_counts)
+        output_num += 1;
+      return output_num;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<nnvm::FInferType>("FInferType", NumpyUniqueType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", NumpyUniqueCPUForward)
+    .set_attr<FInferStorageType>("FInferStorageType", NumpyUniqueStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "The input array")
+    .add_arguments(NumpyUniqueParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_unique_op.cu b/src/operator/numpy/np_unique_op.cu
index 22fd1d12ef18..060852868c1e 100644
--- a/src/operator/numpy/np_unique_op.cu
+++ b/src/operator/numpy/np_unique_op.cu
@@ -32,16 +32,19 @@ struct UniqueComputeAuxGPUKernel {
   // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
   // M is the number of columns of in_data and out_data
   // i is the index of out_data
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(dim_t i, DType* out_data, const DType* in_data,
-                                  const dim_t* idx, const dim_t M) {
-    dim_t j = idx[i/M];
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(dim_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const dim_t* idx,
+                                  const dim_t M) {
+    dim_t j     = idx[i / M];
     out_data[i] = in_data[j * M + i % M];
   }
 };
 
 struct UniqueComputeMaskGPUKernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(dim_t i,
                                   dim_t* out_data,
                                   const DType* in_data,
@@ -60,21 +63,19 @@ struct UniqueComputeMaskGPUKernel {
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct argsort_functor1d : public thrust::unary_function<dim_t, dim_t> {
   explicit argsort_functor1d(DType* data_) : data(data_) {}
-  __device__
-  bool operator()(dim_t a, dim_t b) {
+  __device__ bool operator()(dim_t a, dim_t b) {
     return data[a] < data[b];
   }
   DType* data;
 };
 
-template<typename DType>
+template <typename DType>
 struct argsort_functor2d : public thrust::unary_function<dim_t, dim_t> {
   argsort_functor2d(DType* data_, dim_t numel_) : data(data_), numel(numel_) {}
-  __device__
-  bool operator()(dim_t a, dim_t b) {
+  __device__ bool operator()(dim_t a, dim_t b) {
     for (dim_t i = 0; i < numel; ++i) {
       DType lhs = data[i + a * numel];
       DType rhs = data[i + b * numel];
@@ -91,64 +92,82 @@ struct argsort_functor2d : public thrust::unary_function<dim_t, dim_t> {
 };
 
 void NumpyUniqueGPUNoneAxisImpl(const NumpyUniqueParam& param,
-                                const OpContext &ctx,
-                                const std::vector<NDArray> &inputs,
-                                const std::vector<OpReqType> &req,
-                                const std::vector<NDArray> &outputs) {
+                                const OpContext& ctx,
+                                const std::vector<NDArray>& inputs,
+                                const std::vector<OpReqType>& req,
+                                const std::vector<NDArray>& outputs) {
   MXNET_NO_FLOAT16_TYPE_SWITCH(outputs[0].dtype(), DType, {
-    mshadow::Stream<gpu> *stream = ctx.get_stream<gpu>();
-    cudaStream_t cuda_stream = mshadow::Stream<gpu>::GetStream(stream);
-    auto policy = thrust::cuda::par.on(stream->stream_);
+    mshadow::Stream<gpu>* stream = ctx.get_stream<gpu>();
+    cudaStream_t cuda_stream     = mshadow::Stream<gpu>::GetStream(stream);
+    auto policy                  = thrust::cuda::par.on(stream->stream_);
 
     DType* input_data = inputs[0].data().dptr<DType>();
-    dim_t input_size = inputs[0].shape().Size();
+    dim_t input_size  = inputs[0].shape().Size();
     // argsort, result in perm
     thrust::device_vector<dim_t> perm(input_size);
     thrust::sequence(policy, perm.begin(), perm.end());
-    thrust::stable_sort(policy, perm.begin(), perm.end(),
-                        argsort_functor1d<DType>(input_data));
+    thrust::stable_sort(policy, perm.begin(), perm.end(), argsort_functor1d<DType>(input_data));
     // sorted data in aux
     thrust::device_vector<DType> aux(input_size);
-    mxnet_op::Kernel<UniqueComputeAuxGPUKernel, gpu>::Launch(
-      stream, input_size, thrust::raw_pointer_cast(aux.data()), input_data,
-      thrust::raw_pointer_cast(perm.data()), 1);
+    mxnet_op::Kernel<UniqueComputeAuxGPUKernel, gpu>::Launch(stream,
+                                                             input_size,
+                                                             thrust::raw_pointer_cast(aux.data()),
+                                                             input_data,
+                                                             thrust::raw_pointer_cast(perm.data()),
+                                                             1);
     // calculate unique mask
     thrust::device_vector<dim_t> mask(input_size);
-    mxnet_op::Kernel<UniqueComputeMaskGPUKernel, gpu>::Launch(
-      stream, input_size, thrust::raw_pointer_cast(mask.data()),
-      thrust::raw_pointer_cast(aux.data()), 1);
+    mxnet_op::Kernel<UniqueComputeMaskGPUKernel, gpu>::Launch(stream,
+                                                              input_size,
+                                                              thrust::raw_pointer_cast(mask.data()),
+                                                              thrust::raw_pointer_cast(aux.data()),
+                                                              1);
     // Calculate prefix sum
     thrust::device_vector<int32_t> prefix_sum(input_size, 0);
     thrust::inclusive_scan(policy, mask.begin(), mask.end(), prefix_sum.begin());
     int32_t valid_num = 0;
-    CUDA_CALL(cudaMemcpyAsync(&valid_num, thrust::raw_pointer_cast(&prefix_sum[input_size - 1]),
-                              sizeof(int32_t), cudaMemcpyDeviceToHost, cuda_stream));
+    CUDA_CALL(cudaMemcpyAsync(&valid_num,
+                              thrust::raw_pointer_cast(&prefix_sum[input_size - 1]),
+                              sizeof(int32_t),
+                              cudaMemcpyDeviceToHost,
+                              cuda_stream));
     CUDA_CALL(cudaStreamSynchronize(cuda_stream));
     // set the output shape forcefully
     mxnet::TShape s(1, valid_num);
-    const_cast<NDArray &>(outputs[0]).Init(s);
+    const_cast<NDArray&>(outputs[0]).Init(s);
     // launch kernal to obtain unique array, reuse boolean_mask kernel
     mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(
-      stream, input_size, outputs[0].data().dptr<DType>(),
-      thrust::raw_pointer_cast(aux.data()), thrust::raw_pointer_cast(prefix_sum.data()), 1);
+        stream,
+        input_size,
+        outputs[0].data().dptr<DType>(),
+        thrust::raw_pointer_cast(aux.data()),
+        thrust::raw_pointer_cast(prefix_sum.data()),
+        1);
     // handle other optional outputs
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(s);
+      const_cast<NDArray&>(outputs[output_flag]).Init(s);
       dim_t* unique_indices = outputs[output_flag].data().dptr<dim_t>();
       // reuse boolean_mask kernel
       mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(
-        stream, input_size, unique_indices,
-        thrust::raw_pointer_cast(perm.data()), thrust::raw_pointer_cast(prefix_sum.data()), 1);
+          stream,
+          input_size,
+          unique_indices,
+          thrust::raw_pointer_cast(perm.data()),
+          thrust::raw_pointer_cast(prefix_sum.data()),
+          1);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, input_size));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, input_size));
       dim_t* unique_inverse = outputs[output_flag].data().dptr<dim_t>();
       mxnet_op::Kernel<UniqueReturnInverseKernel, gpu>::Launch(
-        stream, input_size, unique_inverse,
-        thrust::raw_pointer_cast(prefix_sum.data()), thrust::raw_pointer_cast(perm.data()));
+          stream,
+          input_size,
+          unique_inverse,
+          thrust::raw_pointer_cast(prefix_sum.data()),
+          thrust::raw_pointer_cast(perm.data()));
     }
     if (param.return_counts) {
       output_flag += 1;
@@ -161,29 +180,28 @@ void NumpyUniqueGPUNoneAxisImpl(const NumpyUniqueParam& param,
         }
       }
       *iter = input_size;
-      const_cast<NDArray &>(outputs[output_flag]).Init(s);
+      const_cast<NDArray&>(outputs[output_flag]).Init(s);
       dim_t* unique_counts = outputs[output_flag].data().dptr<dim_t>();
       mxnet_op::Kernel<UniqueReturnCountsKernel, gpu>::Launch(
-        stream, valid_num, unique_counts,
-        thrust::raw_pointer_cast(idx.data()));
+          stream, valid_num, unique_counts, thrust::raw_pointer_cast(idx.data()));
     }
   });
 }
 
 void NumpyUniqueGPUImpl(const NumpyUniqueParam& param,
-                        const OpContext &ctx,
-                        const std::vector<NDArray> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<NDArray> &outputs) {
+                        const OpContext& ctx,
+                        const std::vector<NDArray>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<NDArray>& outputs) {
   CHECK(param.axis.value() >= -1 * inputs[0].shape().ndim() &&
-      param.axis.value() < inputs[0].shape().ndim())
+        param.axis.value() < inputs[0].shape().ndim())
       << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
   MXNET_NO_FLOAT16_TYPE_SWITCH(outputs[0].dtype(), DType, {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<gpu> *stream = ctx.get_stream<gpu>();
+    Stream<gpu>* stream      = ctx.get_stream<gpu>();
     cudaStream_t cuda_stream = Stream<gpu>::GetStream(stream);
-    auto policy = thrust::cuda::par.on(stream->stream_);
+    auto policy              = thrust::cuda::par.on(stream->stream_);
     const index_t actual_axis =
         param.axis.value() + ((param.axis.value() < 0) ? inputs[0].shape().ndim() : 0);
     // reshape tensor to [origin_shape[axis], -1]
@@ -192,66 +210,86 @@ void NumpyUniqueGPUImpl(const NumpyUniqueParam& param,
         inputs[0].data().FlatTo3D<gpu, DType>(actual_axis, stream);
     Tensor<gpu, 1, DType> workspace = ctx.requested[0].get_space_typed<gpu, 1, DType>(
         Shape1(input_tensor_3d.shape_.Size() * 2), stream);
-    Tensor<gpu, 3, DType> input_tensor(workspace.dptr_, Shape3(
-        input_tensor_3d.shape_[1], input_tensor_3d.shape_[0], input_tensor_3d.shape_[2]), stream);
-    input_tensor = swapaxis<1, 0>(input_tensor_3d);
+    Tensor<gpu, 3, DType> input_tensor(
+        workspace.dptr_,
+        Shape3(input_tensor_3d.shape_[1], input_tensor_3d.shape_[0], input_tensor_3d.shape_[2]),
+        stream);
+    input_tensor              = swapaxis<1, 0>(input_tensor_3d);
     const Shape<3> temp_shape = input_tensor.shape_;
-    DType* input_data = input_tensor.dptr_;
-    dim_t numel = temp_shape[1] * temp_shape[2];
+    DType* input_data         = input_tensor.dptr_;
+    dim_t numel               = temp_shape[1] * temp_shape[2];
     // argsort, result in perm
     thrust::device_vector<dim_t> perm(temp_shape[0]);
     thrust::sequence(policy, perm.begin(), perm.end());
-    thrust::stable_sort(policy, perm.begin(), perm.end(),
-                        argsort_functor2d<DType>(input_data, numel));
+    thrust::stable_sort(
+        policy, perm.begin(), perm.end(), argsort_functor2d<DType>(input_data, numel));
     // sorted data in aux
     Tensor<gpu, 2, DType> aux(workspace.dptr_ + input_tensor_3d.shape_.Size(),
-        Shape2(temp_shape[0], temp_shape[1] * temp_shape[2]), stream);
-    mxnet_op::Kernel<UniqueComputeAuxGPUKernel, gpu>::Launch(
-      stream, temp_shape.Size(), aux.dptr_, input_data,
-      thrust::raw_pointer_cast(perm.data()), numel);
+                              Shape2(temp_shape[0], temp_shape[1] * temp_shape[2]),
+                              stream);
+    mxnet_op::Kernel<UniqueComputeAuxGPUKernel, gpu>::Launch(stream,
+                                                             temp_shape.Size(),
+                                                             aux.dptr_,
+                                                             input_data,
+                                                             thrust::raw_pointer_cast(perm.data()),
+                                                             numel);
     // calculate unique mask
     thrust::device_vector<dim_t> mask(temp_shape[0]);
     mxnet_op::Kernel<UniqueComputeMaskGPUKernel, gpu>::Launch(
-      stream, temp_shape[0], thrust::raw_pointer_cast(mask.data()), aux.dptr_, numel);
+        stream, temp_shape[0], thrust::raw_pointer_cast(mask.data()), aux.dptr_, numel);
     // calculate prefix sum
     thrust::device_vector<int32_t> prefix_sum(temp_shape[0], 0);
     thrust::inclusive_scan(policy, mask.begin(), mask.end(), prefix_sum.begin());
     int32_t valid_num = 0;
-    CUDA_CALL(cudaMemcpyAsync(&valid_num, thrust::raw_pointer_cast(&prefix_sum[temp_shape[0] - 1]),
-                              sizeof(int32_t), cudaMemcpyDeviceToHost, cuda_stream));
+    CUDA_CALL(cudaMemcpyAsync(&valid_num,
+                              thrust::raw_pointer_cast(&prefix_sum[temp_shape[0] - 1]),
+                              sizeof(int32_t),
+                              cudaMemcpyDeviceToHost,
+                              cuda_stream));
     CUDA_CALL(cudaStreamSynchronize(cuda_stream));
     // store the temp output data, reuse the space of 'input_tensor'
-    Tensor<gpu, 3, DType> temp_tensor(workspace.dptr_,
-        Shape3(valid_num, temp_shape[1], temp_shape[2]), stream);
+    Tensor<gpu, 3, DType> temp_tensor(
+        workspace.dptr_, Shape3(valid_num, temp_shape[1], temp_shape[2]), stream);
     // launch kernal to obtain unique array, reuse boolean_mask kernel
     mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(
-      stream, temp_shape.Size(), temp_tensor.dptr_, aux.dptr_,
-      thrust::raw_pointer_cast(prefix_sum.data()), numel);
+        stream,
+        temp_shape.Size(),
+        temp_tensor.dptr_,
+        aux.dptr_,
+        thrust::raw_pointer_cast(prefix_sum.data()),
+        numel);
     // set the output shape forcefully and swap axis back
     mxnet::TShape out_shape(origin_shape);
     out_shape[actual_axis] = valid_num;
-    const_cast<NDArray &>(outputs[0]).Init(out_shape);
-    Tensor<gpu, 3, DType> output_tensor(outputs[0].data().dptr<DType>(),
-        Shape3(temp_shape[1], valid_num, temp_shape[2]), stream);
+    const_cast<NDArray&>(outputs[0]).Init(out_shape);
+    Tensor<gpu, 3, DType> output_tensor(
+        outputs[0].data().dptr<DType>(), Shape3(temp_shape[1], valid_num, temp_shape[2]), stream);
     output_tensor = swapaxis<1, 0>(temp_tensor);
     // handle other optional outputs
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
       dim_t* unique_indices = outputs[output_flag].data().dptr<dim_t>();
       // reuse boolean_mask kernel
       mxnet_op::Kernel<BooleanMaskForwardKernel, gpu>::Launch(
-        stream, temp_shape[0], unique_indices, thrust::raw_pointer_cast(perm.data()),
-        thrust::raw_pointer_cast(prefix_sum.data()), 1);
+          stream,
+          temp_shape[0],
+          unique_indices,
+          thrust::raw_pointer_cast(perm.data()),
+          thrust::raw_pointer_cast(prefix_sum.data()),
+          1);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, temp_shape[0]));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, temp_shape[0]));
       dim_t* unique_inverse = outputs[output_flag].data().dptr<dim_t>();
       mxnet_op::Kernel<UniqueReturnInverseKernel, gpu>::Launch(
-        stream, temp_shape[0], unique_inverse,
-        thrust::raw_pointer_cast(prefix_sum.data()), thrust::raw_pointer_cast(perm.data()));
+          stream,
+          temp_shape[0],
+          unique_inverse,
+          thrust::raw_pointer_cast(prefix_sum.data()),
+          thrust::raw_pointer_cast(perm.data()));
     }
     if (param.return_counts) {
       output_flag += 1;
@@ -264,53 +302,55 @@ void NumpyUniqueGPUImpl(const NumpyUniqueParam& param,
         }
       }
       *iter = temp_shape[0];
-      const_cast<NDArray &>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
+      const_cast<NDArray&>(outputs[output_flag]).Init(mxnet::TShape(1, valid_num));
       dim_t* unique_counts = outputs[output_flag].data().dptr<dim_t>();
       mxnet_op::Kernel<UniqueReturnCountsKernel, gpu>::Launch(
-        stream, valid_num, unique_counts,
-        thrust::raw_pointer_cast(idx.data()));
+          stream, valid_num, unique_counts, thrust::raw_pointer_cast(idx.data()));
     }
   });
 }
 
 void NumpyUniqueGPUForward(const nnvm::NodeAttrs& attrs,
-                           const OpContext &ctx,
-                           const std::vector<NDArray> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<NDArray> &outputs) {
+                           const OpContext& ctx,
+                           const std::vector<NDArray>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK(req[0] == kWriteTo || req[0] == kWriteInplace);
   using namespace mshadow;
   const NumpyUniqueParam& param = nnvm::get<NumpyUniqueParam>(attrs.parsed);
   if (inputs[0].shape().ndim() == 0) {
     CHECK(!param.axis.has_value() || param.axis.value() == -1 || param.axis.value() == 0)
-      << "Axis can only be -1 or 0 for scalor tensor";
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+        << "Axis can only be -1 or 0 for scalor tensor";
+    Stream<gpu>* s      = ctx.get_stream<gpu>();
     cudaStream_t stream = Stream<gpu>::GetStream(s);
     mxnet::TShape shape_1(1, 1);
-    const_cast<NDArray &>(outputs[0]).Init(shape_1);
+    const_cast<NDArray&>(outputs[0]).Init(shape_1);
     MSHADOW_TYPE_SWITCH(outputs[0].dtype(), DType, {
-      CUDA_CALL(cudaMemcpyAsync(outputs[0].data().dptr<DType>(), inputs[0].data().dptr<DType>(),
-                                sizeof(DType), cudaMemcpyDeviceToDevice, stream));
+      CUDA_CALL(cudaMemcpyAsync(outputs[0].data().dptr<DType>(),
+                                inputs[0].data().dptr<DType>(),
+                                sizeof(DType),
+                                cudaMemcpyDeviceToDevice,
+                                stream));
     });
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_1);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_1);
       Tensor<gpu, 1, dim_t> outdata =
           outputs[output_flag].data().get_with_shape<gpu, 1, dim_t>(Shape1(1), s);
       ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, 0);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_1);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_1);
       Tensor<gpu, 1, dim_t> outdata =
           outputs[output_flag].data().get_with_shape<gpu, 1, dim_t>(Shape1(1), s);
       ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, 0);
     }
     if (param.return_counts) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_1);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_1);
       Tensor<gpu, 1, dim_t> outdata =
           outputs[output_flag].data().get_with_shape<gpu, 1, dim_t>(Shape1(1), s);
       ASSIGN_DISPATCH(outdata, OpReqType::kWriteTo, 1);
@@ -319,25 +359,26 @@ void NumpyUniqueGPUForward(const nnvm::NodeAttrs& attrs,
     // If the input tensor is zero size, only a check on axis is needed
     if (param.axis.has_value()) {
       int axis = param.axis.value();
-      if (axis < 0) axis += inputs[0].shape().ndim();
+      if (axis < 0)
+        axis += inputs[0].shape().ndim();
       CHECK(axis >= 0 && axis < inputs[0].shape().ndim())
-        << "Axis must be within the range of input tensor's dimension";
+          << "Axis must be within the range of input tensor's dimension";
     }
     // set the shapes of outputs
     mxnet::TShape shape_0(1, 0);
-    const_cast<NDArray &>(outputs[0]).Init(shape_0);
+    const_cast<NDArray&>(outputs[0]).Init(shape_0);
     int output_flag = 0;
     if (param.return_index) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_0);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_0);
     }
     if (param.return_inverse) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_0);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_0);
     }
     if (param.return_counts) {
       output_flag += 1;
-      const_cast<NDArray &>(outputs[output_flag]).Init(shape_0);
+      const_cast<NDArray&>(outputs[output_flag]).Init(shape_0);
     }
   } else {
     if (!param.axis.has_value()) {
@@ -348,8 +389,7 @@ void NumpyUniqueGPUForward(const nnvm::NodeAttrs& attrs,
   }
 }
 
-NNVM_REGISTER_OP(_npi_unique)
-.set_attr<FComputeEx>("FComputeEx<gpu>", NumpyUniqueGPUForward);
+NNVM_REGISTER_OP(_npi_unique).set_attr<FComputeEx>("FComputeEx<gpu>", NumpyUniqueGPUForward);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_unique_op.h b/src/operator/numpy/np_unique_op.h
index 0a121cd69481..d62cf112f886 100644
--- a/src/operator/numpy/np_unique_op.h
+++ b/src/operator/numpy/np_unique_op.h
@@ -52,14 +52,14 @@ struct UniqueReturnInverseKernel {
                                   dim_t* unique_inverse,
                                   const int32_t* prefix_sum,
                                   const dim_t* perm) {
-      dim_t j = perm[i];
-      unique_inverse[j] = prefix_sum[i] - 1;
+    dim_t j           = perm[i];
+    unique_inverse[j] = prefix_sum[i] - 1;
   }
 };
 
 struct UniqueReturnCountsKernel {
   MSHADOW_XINLINE static void Map(dim_t i, dim_t* unique_counts, const dim_t* idx) {
-      unique_counts[i] = idx[i + 1] - idx[i];
+    unique_counts[i] = idx[i + 1] - idx[i];
   }
 };
 
@@ -68,17 +68,17 @@ struct NumpyUniqueParam : public dmlc::Parameter<NumpyUniqueParam> {
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(NumpyUniqueParam) {
     DMLC_DECLARE_FIELD(return_index)
-    .set_default(false)
-    .describe("If true, return the indices of the input.");
+        .set_default(false)
+        .describe("If true, return the indices of the input.");
     DMLC_DECLARE_FIELD(return_inverse)
-    .set_default(false)
-    .describe("If true, return the indices of the input.");
+        .set_default(false)
+        .describe("If true, return the indices of the input.");
     DMLC_DECLARE_FIELD(return_counts)
-    .set_default(false)
-    .describe("If true, return the number of times each unique item appears in input.");
+        .set_default(false)
+        .describe("If true, return the number of times each unique item appears in input.");
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<int>())
-    .describe("An integer that represents the axis to operator on.");
+        .set_default(dmlc::optional<int>())
+        .describe("An integer that represents the axis to operator on.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream return_index_s, return_inverse_s, return_counts_s, axis_s;
@@ -86,10 +86,10 @@ struct NumpyUniqueParam : public dmlc::Parameter<NumpyUniqueParam> {
     return_inverse_s << return_inverse;
     return_counts_s << return_counts;
     axis_s << axis;
-    (*dict)["return_index"] = return_index_s.str();
+    (*dict)["return_index"]   = return_index_s.str();
     (*dict)["return_inverse"] = return_inverse_s.str();
-    (*dict)["return_counts"] = return_counts_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["return_counts"]  = return_counts_s.str();
+    (*dict)["axis"]           = axis_s.str();
   }
 };
 
diff --git a/src/operator/numpy/np_where_op-inl.h b/src/operator/numpy/np_where_op-inl.h
index 43af21def5ae..719385f9392d 100644
--- a/src/operator/numpy/np_where_op-inl.h
+++ b/src/operator/numpy/np_where_op-inl.h
@@ -45,9 +45,7 @@ using namespace mshadow;
 struct NumpyWhereScalarParam : public dmlc::Parameter<NumpyWhereScalarParam> {
   double scalar;
   DMLC_DECLARE_PARAMETER(NumpyWhereScalarParam) {
-    DMLC_DECLARE_FIELD(scalar)
-    .set_default(0.0)
-    .describe("The scalar value of x/y.");
+    DMLC_DECLARE_FIELD(scalar).set_default(0.0).describe("The scalar value of x/y.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream scalar_s;
@@ -59,12 +57,8 @@ struct NumpyWhereScalarParam : public dmlc::Parameter<NumpyWhereScalarParam> {
 struct NumpyWhereScalar2Param : public dmlc::Parameter<NumpyWhereScalar2Param> {
   double x, y;
   DMLC_DECLARE_PARAMETER(NumpyWhereScalar2Param) {
-    DMLC_DECLARE_FIELD(x)
-    .set_default(0.0)
-    .describe("The scalar value of x.");
-    DMLC_DECLARE_FIELD(y)
-    .set_default(0.0)
-    .describe("The scalar value of y.");
+    DMLC_DECLARE_FIELD(x).set_default(0.0).describe("The scalar value of x.");
+    DMLC_DECLARE_FIELD(y).set_default(0.0).describe("The scalar value of y.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream x_s, y_s;
@@ -75,29 +69,39 @@ struct NumpyWhereScalar2Param : public dmlc::Parameter<NumpyWhereScalar2Param> {
   }
 };
 
-template<int ndim>
+template <int ndim>
 struct numpy_where_kernel {
-  template<typename CType, typename DType>
-  MSHADOW_XINLINE static void Map(index_t base, OpReqType req, const Shape<ndim> &cstride,
-                                  const Shape<ndim> &xstride, const Shape<ndim> &ystride,
-                                  const Shape<ndim> &oshape, CType *datac, DType *datax,
-                                  DType *datay, DType *out) {
+  template <typename CType, typename DType>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  OpReqType req,
+                                  const Shape<ndim>& cstride,
+                                  const Shape<ndim>& xstride,
+                                  const Shape<ndim>& ystride,
+                                  const Shape<ndim>& oshape,
+                                  CType* datac,
+                                  DType* datax,
+                                  DType* datay,
+                                  DType* out) {
     Shape<ndim> coord = mxnet_op::unravel(base, oshape);
-    auto cidx = static_cast<index_t>(mxnet_op::dot(coord, cstride));
-    auto xidx = static_cast<index_t>(mxnet_op::dot(coord, xstride));
-    auto yidx = static_cast<index_t>(mxnet_op::dot(coord, ystride));
+    auto cidx         = static_cast<index_t>(mxnet_op::dot(coord, cstride));
+    auto xidx         = static_cast<index_t>(mxnet_op::dot(coord, xstride));
+    auto yidx         = static_cast<index_t>(mxnet_op::dot(coord, ystride));
     KERNEL_ASSIGN(out[base], req, datac[cidx] != CType(0) ? datax[xidx] : datay[yidx]);
   }
 };
 
-template<int ndim, bool is_left>
+template <int ndim, bool is_left>
 struct numpy_where_backward_kernel {
-  template<typename CType, typename DType>
-  MSHADOW_XINLINE static void Map(index_t base, OpReqType req,
-                                  const Shape<ndim> &cstride, const Shape<ndim> &oshape,
-                                  CType *datac, DType *datao, DType *grad) {
+  template <typename CType, typename DType>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  OpReqType req,
+                                  const Shape<ndim>& cstride,
+                                  const Shape<ndim>& oshape,
+                                  CType* datac,
+                                  DType* datao,
+                                  DType* grad) {
     Shape<ndim> coord = mxnet_op::unravel(base, oshape);
-    auto cidx = static_cast<index_t>(mxnet_op::dot(coord, cstride));
+    auto cidx         = static_cast<index_t>(mxnet_op::dot(coord, cstride));
     if (is_left) {
       KERNEL_ASSIGN(grad[base], req, datac[cidx] != CType(0) ? datao[base] : DType(0));
     } else {
@@ -106,15 +110,21 @@ struct numpy_where_backward_kernel {
   }
 };
 
-template<int ndim, bool is_left>
+template <int ndim, bool is_left>
 struct numpy_where_scalar_kernel {
-  template<typename CType, typename DType>
-  MSHADOW_XINLINE static void Map(index_t base, OpReqType req, const Shape<ndim> &cstride,
-                                  const Shape<ndim> &ystride, const Shape<ndim> &oshape,
-                                  CType *datac, DType datax, DType *datay, DType *out) {
+  template <typename CType, typename DType>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  OpReqType req,
+                                  const Shape<ndim>& cstride,
+                                  const Shape<ndim>& ystride,
+                                  const Shape<ndim>& oshape,
+                                  CType* datac,
+                                  DType datax,
+                                  DType* datay,
+                                  DType* out) {
     Shape<ndim> coord = mxnet_op::unravel(base, oshape);
-    auto cidx = static_cast<index_t>(mxnet_op::dot(coord, cstride));
-    auto yidx = static_cast<index_t>(mxnet_op::dot(coord, ystride));
+    auto cidx         = static_cast<index_t>(mxnet_op::dot(coord, cstride));
+    auto yidx         = static_cast<index_t>(mxnet_op::dot(coord, ystride));
     if (is_left) {
       KERNEL_ASSIGN(out[base], req, datac[cidx] != CType(0) ? datax : datay[yidx]);
     } else {
@@ -124,14 +134,18 @@ struct numpy_where_scalar_kernel {
 };
 
 struct numpy_where_scalar2_kernel {
-  template<typename DType, typename CType>
-  MSHADOW_XINLINE static void Map(index_t i, OpReqType req, DType* out, const CType* cond,
-                                  const DType x, const DType y) {
-    KERNEL_ASSIGN(out[i], req, (CType(0) != cond[i]? x : y));
+  template <typename DType, typename CType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  OpReqType req,
+                                  DType* out,
+                                  const CType* cond,
+                                  const DType x,
+                                  const DType y) {
+    KERNEL_ASSIGN(out[i], req, (CType(0) != cond[i] ? x : y));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyWhereOpForward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -139,14 +153,15 @@ inline void NumpyWhereOpForward(const nnvm::NodeAttrs& attrs,
                                 const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 1U);
-  if (outputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (outputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
   CHECK_LE(outputs[0].shape_.ndim(), broadcast::MAX_DIM);
 
   const TBlob& cond = inputs[0];
-  const TBlob& x = inputs[1];
-  const TBlob& y = inputs[2];
-  const TBlob& out = outputs[0];
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& x    = inputs[1];
+  const TBlob& y    = inputs[2];
+  const TBlob& out  = outputs[0];
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   std::vector<Shape<broadcast::MAX_DIM>> in_strides;
   in_strides.resize(3);
   for (int i = 0; i < 3; ++i) {
@@ -166,11 +181,17 @@ inline void NumpyWhereOpForward(const nnvm::NodeAttrs& attrs,
   Shape<broadcast::MAX_DIM> oshape = expanded_oshape.get<broadcast::MAX_DIM>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(cond.type_flag_, CType, {
-      mxnet_op::Kernel<numpy_where_kernel<broadcast::MAX_DIM>, xpu>::Launch(
-        s, out.Size(), req[0],
-        in_strides[0], in_strides[1], in_strides[2], oshape,
-        cond.dptr<CType>(), x.dptr<DType>(),
-        y.dptr<DType>(), out.dptr<DType>());
+      mxnet_op::Kernel<numpy_where_kernel<broadcast::MAX_DIM>, xpu>::Launch(s,
+                                                                            out.Size(),
+                                                                            req[0],
+                                                                            in_strides[0],
+                                                                            in_strides[1],
+                                                                            in_strides[2],
+                                                                            oshape,
+                                                                            cond.dptr<CType>(),
+                                                                            x.dptr<DType>(),
+                                                                            y.dptr<DType>(),
+                                                                            out.dptr<DType>());
     });
   });
 }
@@ -182,7 +203,7 @@ inline void NumpyWhereOpForward(const nnvm::NodeAttrs& attrs,
 #define NP_WHERE_REDUCE_AXES(safe_acc, ...) ReduceAxesRTCComputeImpl(__VA_ARGS__, "red::sum{}")
 #endif
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyWhereOpBackward(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -191,13 +212,14 @@ inline void NumpyWhereOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   CHECK(common::is_float(inputs[0].type_flag_)) << "Backward only supports float types!";
-  if (inputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (inputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s     = ctx.get_stream<xpu>();
   const TBlob& ograd = inputs[0];
-  const TBlob& cond = inputs[1];
-  const TBlob& dx = outputs[0];
-  const TBlob& dy = outputs[1];
+  const TBlob& cond  = inputs[1];
+  const TBlob& dx    = outputs[0];
+  const TBlob& dy    = outputs[1];
   // get expanded oshape
   TShape expanded_oshape(broadcast::MAX_DIM, 1);
   int ndim_delta = expanded_oshape.ndim() - ograd.shape_.ndim();
@@ -232,61 +254,103 @@ inline void NumpyWhereOpBackward(const nnvm::NodeAttrs& attrs,
       Tensor<xpu, broadcast::MAX_DIM, DType> workspace;
       size_t ws_size = 0;
       if (ograd.shape_ != dx.shape_ || ograd.shape_ != dy.shape_) {
-        size_t ws_size1 = broadcast::ReduceWorkspaceSize(
-            s, expanded_lshape, req[0], expanded_oshape);
-        size_t ws_size2 = broadcast::ReduceWorkspaceSize(
-            s, expanded_rshape, req[1], expanded_oshape);
+        size_t ws_size1 =
+            broadcast::ReduceWorkspaceSize(s, expanded_lshape, req[0], expanded_oshape);
+        size_t ws_size2 =
+            broadcast::ReduceWorkspaceSize(s, expanded_rshape, req[1], expanded_oshape);
         ws_size = std::max(ws_size1, ws_size2);
       }
       // process left output
       if (ograd.shape_ == dx.shape_) {
         mxnet_op::Kernel<numpy_where_backward_kernel<broadcast::MAX_DIM, true>, xpu>::Launch(
-          s, ograd.Size(), req[0], cstride, oshape,
-          cond.dptr<CType>(), ograd.dptr<DType>(), dx.dptr<DType>());
+            s,
+            ograd.Size(),
+            req[0],
+            cstride,
+            oshape,
+            cond.dptr<CType>(),
+            ograd.dptr<DType>(),
+            dx.dptr<DType>());
       } else {
         largespace = ctx.requested[0].get_space_typed<xpu, 1, char>(
             Shape1(ograd.shape_.Size() * sizeof(DType) + ws_size), s);
         workspace = Tensor<xpu, broadcast::MAX_DIM, DType>(
             reinterpret_cast<DType*>(largespace.dptr_ + ws_size),
-            expanded_oshape.get<broadcast::MAX_DIM>(), s);
+            expanded_oshape.get<broadcast::MAX_DIM>(),
+            s);
         mxnet_op::Kernel<numpy_where_backward_kernel<broadcast::MAX_DIM, true>, xpu>::Launch(
-          s, ograd.Size(), req[0], cstride, oshape,
-          cond.dptr<CType>(), ograd.dptr<DType>(), workspace.dptr_);
+            s,
+            ograd.Size(),
+            req[0],
+            cstride,
+            oshape,
+            cond.dptr<CType>(),
+            ograd.dptr<DType>(),
+            workspace.dptr_);
         if (NeedSafeAcc<true>(dx.type_flag_, dx.type_flag_)) {
-          NP_WHERE_REDUCE_AXES(true, ctx, {TBlob(workspace)}, {req[0]},
-              {dx.reshape(expanded_lshape)}, expanded_lshape);
+          NP_WHERE_REDUCE_AXES(true,
+                               ctx,
+                               {TBlob(workspace)},
+                               {req[0]},
+                               {dx.reshape(expanded_lshape)},
+                               expanded_lshape);
         } else {
-          NP_WHERE_REDUCE_AXES(false, ctx, {TBlob(workspace)}, {req[0]},
-              {dx.reshape(expanded_lshape)}, expanded_lshape);
+          NP_WHERE_REDUCE_AXES(false,
+                               ctx,
+                               {TBlob(workspace)},
+                               {req[0]},
+                               {dx.reshape(expanded_lshape)},
+                               expanded_lshape);
         }
       }
       // process right output
       if (ograd.shape_ == dy.shape_) {
         mxnet_op::Kernel<numpy_where_backward_kernel<broadcast::MAX_DIM, false>, xpu>::Launch(
-          s, ograd.Size(), req[1], cstride, oshape,
-          cond.dptr<CType>(), ograd.dptr<DType>(), dy.dptr<DType>());
+            s,
+            ograd.Size(),
+            req[1],
+            cstride,
+            oshape,
+            cond.dptr<CType>(),
+            ograd.dptr<DType>(),
+            dy.dptr<DType>());
       } else {
         largespace = ctx.requested[0].get_space_typed<xpu, 1, char>(
             Shape1(ograd.shape_.Size() * sizeof(DType) + ws_size), s);
         workspace = Tensor<xpu, broadcast::MAX_DIM, DType>(
             reinterpret_cast<DType*>(largespace.dptr_ + ws_size),
-            expanded_oshape.get<broadcast::MAX_DIM>(), s);
+            expanded_oshape.get<broadcast::MAX_DIM>(),
+            s);
         mxnet_op::Kernel<numpy_where_backward_kernel<broadcast::MAX_DIM, false>, xpu>::Launch(
-          s, ograd.Size(), req[1], cstride, oshape,
-          cond.dptr<CType>(), ograd.dptr<DType>(), workspace.dptr_);
+            s,
+            ograd.Size(),
+            req[1],
+            cstride,
+            oshape,
+            cond.dptr<CType>(),
+            ograd.dptr<DType>(),
+            workspace.dptr_);
         if (NeedSafeAcc<true>(dy.type_flag_, dy.type_flag_)) {
-          NP_WHERE_REDUCE_AXES(true, ctx, {TBlob(workspace)}, {req[1]},
-              {dy.reshape(expanded_rshape)}, expanded_rshape);
+          NP_WHERE_REDUCE_AXES(true,
+                               ctx,
+                               {TBlob(workspace)},
+                               {req[1]},
+                               {dy.reshape(expanded_rshape)},
+                               expanded_rshape);
         } else {
-          NP_WHERE_REDUCE_AXES(false, ctx, {TBlob(workspace)}, {req[1]},
-              {dy.reshape(expanded_rshape)}, expanded_rshape);
+          NP_WHERE_REDUCE_AXES(false,
+                               ctx,
+                               {TBlob(workspace)},
+                               {req[1]},
+                               {dy.reshape(expanded_rshape)},
+                               expanded_rshape);
         }
       }
     });
   });
 }
 
-template<typename xpu, bool is_left>
+template <typename xpu, bool is_left>
 inline void NumpyWhereScalarOpForward(const nnvm::NodeAttrs& attrs,
                                       const OpContext& ctx,
                                       const std::vector<TBlob>& inputs,
@@ -294,14 +358,15 @@ inline void NumpyWhereScalarOpForward(const nnvm::NodeAttrs& attrs,
                                       const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (outputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (outputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
   CHECK_LE(outputs[0].shape_.ndim(), broadcast::MAX_DIM);
 
   const NumpyWhereScalarParam& param = nnvm::get<NumpyWhereScalarParam>(attrs.parsed);
-  const TBlob& cond = inputs[0];
-  const TBlob& y = inputs[1];
-  const TBlob& out = outputs[0];
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& cond                  = inputs[0];
+  const TBlob& y                     = inputs[1];
+  const TBlob& out                   = outputs[0];
+  Stream<xpu>* s                     = ctx.get_stream<xpu>();
   std::vector<Shape<broadcast::MAX_DIM>> in_strides;
   in_strides.resize(2);
   for (int i = 0; i < 2; ++i) {
@@ -322,15 +387,21 @@ inline void NumpyWhereScalarOpForward(const nnvm::NodeAttrs& attrs,
   MSHADOW_TYPE_SWITCH_WITH_BOOL(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(cond.type_flag_, CType, {
       mxnet_op::Kernel<numpy_where_scalar_kernel<broadcast::MAX_DIM, is_left>, xpu>::Launch(
-        s, out.Size(), req[0],
-        in_strides[0], in_strides[1], oshape,
-        cond.dptr<CType>(), DType(param.scalar),
-        y.dptr<DType>(), out.dptr<DType>());
+          s,
+          out.Size(),
+          req[0],
+          in_strides[0],
+          in_strides[1],
+          oshape,
+          cond.dptr<CType>(),
+          DType(param.scalar),
+          y.dptr<DType>(),
+          out.dptr<DType>());
     });
   });
 }
 
-template<typename xpu, bool is_lscalar>
+template <typename xpu, bool is_lscalar>
 inline void NumpyWhereScalarOpBackward(const nnvm::NodeAttrs& attrs,
                                        const OpContext& ctx,
                                        const std::vector<TBlob>& inputs,
@@ -339,12 +410,13 @@ inline void NumpyWhereScalarOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK(common::is_float(inputs[0].type_flag_)) << "Backward only supports float types!";
-  if (inputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (inputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s     = ctx.get_stream<xpu>();
   const TBlob& ograd = inputs[0];
-  const TBlob& cond = inputs[1];
-  const TBlob& dx = outputs[0];
+  const TBlob& cond  = inputs[1];
+  const TBlob& dx    = outputs[0];
   // get expanded oshape
   TShape expanded_oshape(broadcast::MAX_DIM, 1);
   int ndim_delta = expanded_oshape.ndim() - ograd.shape_.ndim();
@@ -373,29 +445,49 @@ inline void NumpyWhereScalarOpBackward(const nnvm::NodeAttrs& attrs,
       Tensor<xpu, broadcast::MAX_DIM, DType> workspace;
       size_t ws_size = 0;
       if (ograd.shape_ != dx.shape_) {
-        ws_size = broadcast::ReduceWorkspaceSize(s, expanded_lshape, req[0],
-                                                 expanded_oshape);
+        ws_size = broadcast::ReduceWorkspaceSize(s, expanded_lshape, req[0], expanded_oshape);
       }
       // If lscalar, then process right output, `is_left` should be false
       if (ograd.shape_ == dx.shape_) {
         mxnet_op::Kernel<numpy_where_backward_kernel<broadcast::MAX_DIM, !is_lscalar>, xpu>::Launch(
-          s, ograd.Size(), req[0], cstride, oshape,
-          cond.dptr<CType>(), ograd.dptr<DType>(), dx.dptr<DType>());
+            s,
+            ograd.Size(),
+            req[0],
+            cstride,
+            oshape,
+            cond.dptr<CType>(),
+            ograd.dptr<DType>(),
+            dx.dptr<DType>());
       } else {
         largespace = ctx.requested[0].get_space_typed<xpu, 1, char>(
             Shape1(ograd.shape_.Size() * sizeof(DType) + ws_size), s);
         workspace = Tensor<xpu, broadcast::MAX_DIM, DType>(
             reinterpret_cast<DType*>(largespace.dptr_ + ws_size),
-            expanded_oshape.get<broadcast::MAX_DIM>(), s);
+            expanded_oshape.get<broadcast::MAX_DIM>(),
+            s);
         mxnet_op::Kernel<numpy_where_backward_kernel<broadcast::MAX_DIM, !is_lscalar>, xpu>::Launch(
-          s, ograd.Size(), req[0], cstride, oshape,
-          cond.dptr<CType>(), ograd.dptr<DType>(), workspace.dptr_);
+            s,
+            ograd.Size(),
+            req[0],
+            cstride,
+            oshape,
+            cond.dptr<CType>(),
+            ograd.dptr<DType>(),
+            workspace.dptr_);
         if (NeedSafeAcc<true>(dx.type_flag_, dx.type_flag_)) {
-          NP_WHERE_REDUCE_AXES(true, ctx, {TBlob(workspace)}, {req[0]},
-              {dx.reshape(expanded_lshape)}, expanded_lshape);
+          NP_WHERE_REDUCE_AXES(true,
+                               ctx,
+                               {TBlob(workspace)},
+                               {req[0]},
+                               {dx.reshape(expanded_lshape)},
+                               expanded_lshape);
         } else {
-          NP_WHERE_REDUCE_AXES(false, ctx, {TBlob(workspace)}, {req[0]},
-              {dx.reshape(expanded_lshape)}, expanded_lshape);
+          NP_WHERE_REDUCE_AXES(false,
+                               ctx,
+                               {TBlob(workspace)},
+                               {req[0]},
+                               {dx.reshape(expanded_lshape)},
+                               expanded_lshape);
         }
       }
     });
@@ -404,24 +496,30 @@ inline void NumpyWhereScalarOpBackward(const nnvm::NodeAttrs& attrs,
 
 #undef NP_WHERE_REDUCE_AXES
 
-template<typename xpu>
+template <typename xpu>
 inline void NumpyWhereScalar2OpForward(const nnvm::NodeAttrs& attrs,
-                                      const OpContext& ctx,
-                                      const std::vector<TBlob>& inputs,
-                                      const std::vector<OpReqType>& req,
-                                      const std::vector<TBlob>& outputs) {
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  if (outputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (outputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
   using namespace mxnet_op;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s             = ctx.get_stream<xpu>();
   const NumpyWhereScalar2Param& param = nnvm::get<NumpyWhereScalar2Param>(attrs.parsed);
-  const TBlob& cond = inputs[0];
-  const TBlob& out = outputs[0];
+  const TBlob& cond                   = inputs[0];
+  const TBlob& out                    = outputs[0];
   MSHADOW_TYPE_SWITCH_WITH_BOOL(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(cond.type_flag_, CType, {
-      Kernel<numpy_where_scalar2_kernel, xpu>::Launch(s, out.Size(), req[0],
-          out.dptr<DType>(), cond.dptr<CType>(), DType(param.x), DType(param.y));
+      Kernel<numpy_where_scalar2_kernel, xpu>::Launch(s,
+                                                      out.Size(),
+                                                      req[0],
+                                                      out.dptr<DType>(),
+                                                      cond.dptr<CType>(),
+                                                      DType(param.x),
+                                                      DType(param.y));
     });
   });
 }
diff --git a/src/operator/numpy/np_where_op.cc b/src/operator/numpy/np_where_op.cc
index 4d342f075f59..54dcb89e9efa 100644
--- a/src/operator/numpy/np_where_op.cc
+++ b/src/operator/numpy/np_where_op.cc
@@ -48,13 +48,16 @@ inline bool NumpyWhereOpShape(const nnvm::NodeAttrs& attrs,
   const int b3 = out.ndim() - operand3.ndim();
   for (int i = 0; i < out.ndim(); ++i) {
     int s1 = 1, s2 = 1, s3 = 1;
-    if (i >= b1) s1 = operand1[i-b1];
-    if (i >= b2) s2 = operand2[i-b2];
-    if (i >= b3) s3 = operand3[i-b3];
+    if (i >= b1)
+      s1 = operand1[i - b1];
+    if (i >= b2)
+      s2 = operand2[i - b2];
+    if (i >= b3)
+      s3 = operand3[i - b3];
     if (!(s1 == s2 && s2 == s3)) {
       CHECK((s1 == 1 && s2 == 1) || (s1 == 1 && s3 == 1) || (s2 == 1 && s3 == 1) ||
             (s1 == 1 && s2 == s3) || (s2 == 1 && s1 == s3) || (s3 == 1 && s1 == s2))
-        << "Operands could not be broadcast together.";
+          << "Operands could not be broadcast together.";
       out[i] = std::max({s1, s2, s3});
     } else {
       out[i] = s1;
@@ -67,8 +70,8 @@ inline bool NumpyWhereOpShape(const nnvm::NodeAttrs& attrs,
 inline bool NumpyWhereOpType(const nnvm::NodeAttrs& attrs,
                              std::vector<int>* in_attrs,
                              std::vector<int>* out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U)
-    << "where operator takes 3 arguments (" << in_attrs->size() << " given)";
+  CHECK_EQ(in_attrs->size(), 3U) << "where operator takes 3 arguments (" << in_attrs->size()
+                                 << " given)";
   CHECK_EQ(out_attrs->size(), 1U);
   std::vector<int> sub_in_attrs(in_attrs->begin() + 1, in_attrs->end());
   bool flag = ElemwiseType<2, 1>(attrs, &sub_in_attrs, out_attrs);
@@ -89,191 +92,192 @@ DMLC_REGISTER_PARAMETER(NumpyWhereScalarParam);
 DMLC_REGISTER_PARAMETER(NumpyWhereScalar2Param);
 
 NNVM_REGISTER_OP(_npi_where)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"condition", "x", "y"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyWhereOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyWhereOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{1, 0}, {2, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  // Use the following lambda function instead of ElemwiseGradUseIn
-  // for best efficiency. grad[condition] = 0; to calculate grad[x] and grad[y]
-  // we need only condition from input.
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    std::vector<nnvm::NodeEntry> ret;
-    // make zero grad node for grad[condition]
-    auto p = MakeNode("zeros_like", n->attrs.name + "_cond_backward",
-                      {n->inputs[0]}, nullptr, &n);
-    ret.emplace_back(p);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"condition", "x", "y"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyWhereOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyWhereOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{1, 0}, {2, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereOpForward<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        // Use the following lambda function instead of ElemwiseGradUseIn
+        // for best efficiency. grad[condition] = 0; to calculate grad[x] and grad[y]
+        // we need only condition from input.
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> ret;
+          // make zero grad node for grad[condition]
+          auto p =
+              MakeNode("zeros_like", n->attrs.name + "_cond_backward", {n->inputs[0]}, nullptr, &n);
+          ret.emplace_back(p);
 
-    // make grad nodes for grad[x] and grad[y]
-    std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
-    heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
-    p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_backward_np_where");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->attrs.dict = n->attrs.dict;
-    if (p->op()->attr_parser != nullptr) {
-      p->op()->attr_parser(&(p->attrs));
-    }
-    p->control_deps.emplace_back(n);
-    p->inputs = std::move(heads);
-    ret.emplace_back(p, 0, 0);
-    ret.emplace_back(p, 1, 0);
-    return ret;
-  })
-.add_argument("condition", "NDArray-or-Symbol", "condition array")
-.add_argument("x", "NDArray-or-Symbol", "input x")
-.add_argument("y", "NDArray-or-Symbol", "input y");
+          // make grad nodes for grad[x] and grad[y]
+          std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
+          heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
+          p             = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_backward_np_where");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->attrs.dict = n->attrs.dict;
+          if (p->op()->attr_parser != nullptr) {
+            p->op()->attr_parser(&(p->attrs));
+          }
+          p->control_deps.emplace_back(n);
+          p->inputs = std::move(heads);
+          ret.emplace_back(p, 0, 0);
+          ret.emplace_back(p, 1, 0);
+          return ret;
+        })
+    .add_argument("condition", "NDArray-or-Symbol", "condition array")
+    .add_argument("x", "NDArray-or-Symbol", "input x")
+    .add_argument("y", "NDArray-or-Symbol", "input y");
 
 NNVM_REGISTER_OP(_backward_np_where)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereOpBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereOpBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(_npi_where_lscalar)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyWhereScalarParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"condition", "x"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyWhereScalarOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{1, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpForward<cpu, true>)
-.set_attr<nnvm::FGradient>("FGradient",
-  // Use the following lambda function instead of ElemwiseGradUseIn
-  // for best efficiency. grad[condition] = 0; to calculate grad[x] or grad[y]
-  // we need only condition from input.
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    std::vector<nnvm::NodeEntry> ret;
-    // make zero grad node for grad[condition]
-    auto p = MakeNode("zeros_like", n->attrs.name + "_cond_backward",
-                      {n->inputs[0]}, nullptr, &n);
-    ret.emplace_back(p);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyWhereScalarParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"condition", "x"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyWhereScalarOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{1, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpForward<cpu, true>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        // Use the following lambda function instead of ElemwiseGradUseIn
+        // for best efficiency. grad[condition] = 0; to calculate grad[x] or grad[y]
+        // we need only condition from input.
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> ret;
+          // make zero grad node for grad[condition]
+          auto p =
+              MakeNode("zeros_like", n->attrs.name + "_cond_backward", {n->inputs[0]}, nullptr, &n);
+          ret.emplace_back(p);
 
-    // make grad nodes for grad[x] and grad[y]
-    std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
-    heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
-    p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_backward_np_where_lscalar");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->attrs.dict = n->attrs.dict;
-    if (p->op()->attr_parser != nullptr) {
-      p->op()->attr_parser(&(p->attrs));
-    }
-    p->control_deps.emplace_back(n);
-    p->inputs = std::move(heads);
-    ret.emplace_back(p, 0, 0);
-    return ret;
-  })
-.add_argument("condition", "NDArray-or-Symbol", "condition array")
-.add_argument("x", "NDArray-or-Symbol", "input x")
-.add_arguments(NumpyWhereScalarParam::__FIELDS__());
+          // make grad nodes for grad[x] and grad[y]
+          std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
+          heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
+          p             = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_backward_np_where_lscalar");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->attrs.dict = n->attrs.dict;
+          if (p->op()->attr_parser != nullptr) {
+            p->op()->attr_parser(&(p->attrs));
+          }
+          p->control_deps.emplace_back(n);
+          p->inputs = std::move(heads);
+          ret.emplace_back(p, 0, 0);
+          return ret;
+        })
+    .add_argument("condition", "NDArray-or-Symbol", "condition array")
+    .add_argument("x", "NDArray-or-Symbol", "input x")
+    .add_arguments(NumpyWhereScalarParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_where_rscalar)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyWhereScalarParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"condition", "y"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyWhereScalarOpType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{1, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpForward<cpu, false>)
-.set_attr<nnvm::FGradient>("FGradient",
-  // Use the following lambda function instead of ElemwiseGradUseIn
-  // for best efficiency. grad[condition] = 0; to calculate grad[x] or grad[y]
-  // we need only condition from input.
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    std::vector<nnvm::NodeEntry> ret;
-    // make zero grad node for grad[condition]
-    auto p = MakeNode("zeros_like", n->attrs.name + "_cond_backward",
-                      {n->inputs[0]}, nullptr, &n);
-    ret.emplace_back(p);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyWhereScalarParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"condition", "y"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyWhereScalarOpType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{1, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpForward<cpu, false>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        // Use the following lambda function instead of ElemwiseGradUseIn
+        // for best efficiency. grad[condition] = 0; to calculate grad[x] or grad[y]
+        // we need only condition from input.
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> ret;
+          // make zero grad node for grad[condition]
+          auto p =
+              MakeNode("zeros_like", n->attrs.name + "_cond_backward", {n->inputs[0]}, nullptr, &n);
+          ret.emplace_back(p);
 
-    // make grad nodes for grad[x] and grad[y]
-    std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
-    heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
-    p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_backward_np_where_rscalar");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->attrs.dict = n->attrs.dict;
-    if (p->op()->attr_parser != nullptr) {
-      p->op()->attr_parser(&(p->attrs));
-    }
-    p->control_deps.emplace_back(n);
-    p->inputs = std::move(heads);
-    ret.emplace_back(p, 0, 0);
-    return ret;
-  })
-.add_argument("condition", "NDArray-or-Symbol", "condition array")
-.add_argument("y", "NDArray-or-Symbol", "input y")
-.add_arguments(NumpyWhereScalarParam::__FIELDS__());
+          // make grad nodes for grad[x] and grad[y]
+          std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
+          heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
+          p             = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_backward_np_where_rscalar");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->attrs.dict = n->attrs.dict;
+          if (p->op()->attr_parser != nullptr) {
+            p->op()->attr_parser(&(p->attrs));
+          }
+          p->control_deps.emplace_back(n);
+          p->inputs = std::move(heads);
+          ret.emplace_back(p, 0, 0);
+          return ret;
+        })
+    .add_argument("condition", "NDArray-or-Symbol", "condition array")
+    .add_argument("y", "NDArray-or-Symbol", "input y")
+    .add_arguments(NumpyWhereScalarParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_np_where_lscalar)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpBackward<cpu, true>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpBackward<cpu, true>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(_backward_np_where_rscalar)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpBackward<cpu, false>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalarOpBackward<cpu, false>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(_npi_where_scalar2)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyWhereScalar2Param>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"condition"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-                                             std::vector<int>* in_attrs,
-                                             std::vector<int>* out_attrs){
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
-    return in_attrs->at(0) != -1;
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalar2OpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("condition", "NDArray-or-Symbol", "condition array")
-.add_arguments(NumpyWhereScalar2Param::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyWhereScalar2Param>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"condition"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 1U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
+                                  return in_attrs->at(0) != -1;
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWhereScalar2OpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("condition", "NDArray-or-Symbol", "condition array")
+    .add_arguments(NumpyWhereScalar2Param::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_where_op.cu b/src/operator/numpy/np_where_op.cu
index f914292cdbcc..a1477c416f12 100644
--- a/src/operator/numpy/np_where_op.cu
+++ b/src/operator/numpy/np_where_op.cu
@@ -28,26 +28,24 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_where)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereOpForward<gpu>);
+NNVM_REGISTER_OP(_npi_where).set_attr<FCompute>("FCompute<gpu>", NumpyWhereOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_np_where)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_np_where).set_attr<FCompute>("FCompute<gpu>", NumpyWhereOpBackward<gpu>);
 
 NNVM_REGISTER_OP(_npi_where_lscalar)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpForward<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpForward<gpu, true>);
 
 NNVM_REGISTER_OP(_npi_where_rscalar)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpForward<gpu, false>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpForward<gpu, false>);
 
 NNVM_REGISTER_OP(_backward_np_where_lscalar)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpBackward<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpBackward<gpu, true>);
 
 NNVM_REGISTER_OP(_backward_np_where_rscalar)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpBackward<gpu, false>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalarOpBackward<gpu, false>);
 
 NNVM_REGISTER_OP(_npi_where_scalar2)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalar2OpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyWhereScalar2OpForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_window_op.cc b/src/operator/numpy/np_window_op.cc
index b1a039b4b2cb..ac109d8b8b0f 100644
--- a/src/operator/numpy/np_window_op.cc
+++ b/src/operator/numpy/np_window_op.cc
@@ -43,37 +43,40 @@ inline bool NumpyWindowsShape(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_hanning)
-.describe("Return the Hanning window."
-          "The Hanning window is a taper formed by using a weighted cosine.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyWindowsParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyWindowsShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyWindowsParam>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyWindowCompute<cpu, 0>)
-.add_arguments(NumpyWindowsParam::__FIELDS__());
+    .describe(
+        "Return the Hanning window."
+        "The Hanning window is a taper formed by using a weighted cosine.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyWindowsParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyWindowsShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyWindowsParam>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWindowCompute<cpu, 0>)
+    .add_arguments(NumpyWindowsParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_hamming)
-.describe("Return the Hamming window."
-          "The Hamming window is a taper formed by using a weighted cosine.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyWindowsParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyWindowsShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyWindowsParam>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyWindowCompute<cpu, 1>)
-.add_arguments(NumpyWindowsParam::__FIELDS__());
+    .describe(
+        "Return the Hamming window."
+        "The Hamming window is a taper formed by using a weighted cosine.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyWindowsParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyWindowsShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyWindowsParam>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWindowCompute<cpu, 1>)
+    .add_arguments(NumpyWindowsParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_blackman)
-.describe("Return the Blackman window."
-          "The Blackman window is a taper formed by using a weighted cosine.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyWindowsParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyWindowsShape)
-.set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyWindowsParam>)
-.set_attr<FCompute>("FCompute<cpu>", NumpyWindowCompute<cpu, 2>)
-.add_arguments(NumpyWindowsParam::__FIELDS__());
+    .describe(
+        "Return the Blackman window."
+        "The Blackman window is a taper formed by using a weighted cosine.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyWindowsParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyWindowsShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitNumpyType<NumpyWindowsParam>)
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWindowCompute<cpu, 2>)
+    .add_arguments(NumpyWindowsParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_window_op.cu b/src/operator/numpy/np_window_op.cu
index d56a96e9282f..83ba58b5d820 100644
--- a/src/operator/numpy/np_window_op.cu
+++ b/src/operator/numpy/np_window_op.cu
@@ -28,14 +28,11 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_hanning)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWindowCompute<gpu, 0>);
+NNVM_REGISTER_OP(_npi_hanning).set_attr<FCompute>("FCompute<gpu>", NumpyWindowCompute<gpu, 0>);
 
-NNVM_REGISTER_OP(_npi_hamming)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWindowCompute<gpu, 1>);
+NNVM_REGISTER_OP(_npi_hamming).set_attr<FCompute>("FCompute<gpu>", NumpyWindowCompute<gpu, 1>);
 
-NNVM_REGISTER_OP(_npi_blackman)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWindowCompute<gpu, 2>);
+NNVM_REGISTER_OP(_npi_blackman).set_attr<FCompute>("FCompute<gpu>", NumpyWindowCompute<gpu, 2>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/np_window_op.h b/src/operator/numpy/np_window_op.h
index 2447313de9b7..a33eeadd0937 100644
--- a/src/operator/numpy/np_window_op.h
+++ b/src/operator/numpy/np_window_op.h
@@ -47,30 +47,27 @@ struct NumpyWindowsParam : public dmlc::Parameter<NumpyWindowsParam> {
   int dtype;
   DMLC_DECLARE_PARAMETER(NumpyWindowsParam) {
     DMLC_DECLARE_FIELD(M)
-    .set_default(dmlc::optional<nnvm::dim_t>())
-    .describe("Number of points in the output window. "
-              "If zero or less, an empty array is returned.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-    "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES
-    .describe("Data-type of the returned array.");
+        .set_default(dmlc::optional<nnvm::dim_t>())
+        .describe(
+            "Number of points in the output window. "
+            "If zero or less, an empty array is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES.describe("Data-type of the returned array.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream M_s, dtype_s;
     M_s << M;
     dtype_s << dtype;
-    (*dict)["M"] = M_s.str();
+    (*dict)["M"]     = M_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
   }
 };
 
 struct hanning_fwd {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i, index_t M, int req, DType* out) {
     if (M == 1) {
       KERNEL_ASSIGN(out[i], req, static_cast<int64_t>(1));
@@ -81,49 +78,61 @@ struct hanning_fwd {
 };
 
 struct hamming_fwd {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i, index_t M, int req, DType* out) {
     if (M == 1) {
       KERNEL_ASSIGN(out[i], req, static_cast<int64_t>(1));
     } else {
-      KERNEL_ASSIGN(out[i], req,
-                    DType(0.54) - DType(0.46) * math::cos(DType(2 * PI * i / (M - 1))));
+      KERNEL_ASSIGN(
+          out[i], req, DType(0.54) - DType(0.46) * math::cos(DType(2 * PI * i / (M - 1))));
     }
   }
 };
 
 struct blackman_fwd {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i, index_t M, int req, DType* out) {
     if (M == 1) {
       KERNEL_ASSIGN(out[i], req, static_cast<int64_t>(1));
     } else {
-      KERNEL_ASSIGN(out[i], req, DType(0.42) - DType(0.5) * math::cos(DType(2 * PI * i /(M - 1))) +
-          DType(0.08) * math::cos(DType(4 * PI * i /(M - 1))));
+      KERNEL_ASSIGN(out[i],
+                    req,
+                    DType(0.42) - DType(0.5) * math::cos(DType(2 * PI * i / (M - 1))) +
+                        DType(0.08) * math::cos(DType(4 * PI * i / (M - 1))));
     }
   }
 };
 
-template<typename xpu, int window_select>
+template <typename xpu, int window_select>
 void NumpyWindowCompute(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<mxnet::TBlob>& inputs,
                         const std::vector<OpReqType>& req,
                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s        = ctx.get_stream<xpu>();
   const NumpyWindowsParam& param = nnvm::get<NumpyWindowsParam>(attrs.parsed);
-  if (param.M.has_value() && param.M.value() <= 0) return;
+  if (param.M.has_value() && param.M.value() <= 0)
+    return;
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     if (window_select == 0) {
-      Kernel<hanning_fwd, xpu>::Launch(s, outputs[0].Size(), static_cast<int>(param.M.value()),
-                                       req[0], outputs[0].dptr<DType>());
+      Kernel<hanning_fwd, xpu>::Launch(s,
+                                       outputs[0].Size(),
+                                       static_cast<int>(param.M.value()),
+                                       req[0],
+                                       outputs[0].dptr<DType>());
     } else if (window_select == 1) {
-      Kernel<hamming_fwd, xpu>::Launch(s, outputs[0].Size(), static_cast<int>(param.M.value()),
-                                       req[0], outputs[0].dptr<DType>());
+      Kernel<hamming_fwd, xpu>::Launch(s,
+                                       outputs[0].Size(),
+                                       static_cast<int>(param.M.value()),
+                                       req[0],
+                                       outputs[0].dptr<DType>());
     } else if (window_select == 2) {
-      Kernel<blackman_fwd, xpu>::Launch(s, outputs[0].Size(), static_cast<int>(param.M.value()),
-                                        req[0], outputs[0].dptr<DType>());
+      Kernel<blackman_fwd, xpu>::Launch(s,
+                                        outputs[0].Size(),
+                                        static_cast<int>(param.M.value()),
+                                        req[0],
+                                        outputs[0].dptr<DType>());
     } else {
       LOG(FATAL) << "window_select must be (0, 1, 2)";
     }
diff --git a/src/operator/numpy/random/dist_common.cc b/src/operator/numpy/random/dist_common.cc
index 18a20855bab9..687f880f8b76 100644
--- a/src/operator/numpy/random/dist_common.cc
+++ b/src/operator/numpy/random/dist_common.cc
@@ -30,12 +30,12 @@ namespace mxnet {
 namespace op {
 
 template <>
-void _copy<cpu>(mshadow::Stream<cpu> *s, float *dst, float *src) {
+void _copy<cpu>(mshadow::Stream<cpu>* s, float* dst, float* src) {
   *dst = *src;
 }
 
 template <>
-void _copy<cpu>(mshadow::Stream<cpu> *s, double *dst, double *src) {
+void _copy<cpu>(mshadow::Stream<cpu>* s, double* dst, double* src) {
   *dst = *src;
 }
 
diff --git a/src/operator/numpy/random/dist_common.cu b/src/operator/numpy/random/dist_common.cu
index dbd313be37e2..3a7f63c46b61 100644
--- a/src/operator/numpy/random/dist_common.cu
+++ b/src/operator/numpy/random/dist_common.cu
@@ -30,18 +30,16 @@ namespace mxnet {
 namespace op {
 
 template <>
-void _copy<gpu>(mshadow::Stream<gpu> *s, float *dst, float *src) {
+void _copy<gpu>(mshadow::Stream<gpu>* s, float* dst, float* src) {
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(dst, src, sizeof(float), cudaMemcpyDeviceToHost,
-                            stream));
+  CUDA_CALL(cudaMemcpyAsync(dst, src, sizeof(float), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 }
 
 template <>
-void _copy<gpu>(mshadow::Stream<gpu> *s, double *dst, double *src) {
+void _copy<gpu>(mshadow::Stream<gpu>* s, double* dst, double* src) {
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(s);
-  CUDA_CALL(cudaMemcpyAsync(dst, src, sizeof(double), cudaMemcpyDeviceToHost,
-                            stream));
+  CUDA_CALL(cudaMemcpyAsync(dst, src, sizeof(double), cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
 }
 
diff --git a/src/operator/numpy/random/dist_common.h b/src/operator/numpy/random/dist_common.h
index 1e43134e6e96..73c37a596cb8 100644
--- a/src/operator/numpy/random/dist_common.h
+++ b/src/operator/numpy/random/dist_common.h
@@ -41,29 +41,33 @@ namespace mxnet {
 namespace op {
 
 template <typename xpu>
-void _copy(mshadow::Stream<xpu> *s, float *dst, float*src);
+void _copy(mshadow::Stream<xpu>* s, float* dst, float* src);
 
 template <typename xpu>
-void _copy(mshadow::Stream<xpu> *s, double *dst, double*src);
+void _copy(mshadow::Stream<xpu>* s, double* dst, double* src);
 
-
-inline int FillShape(const mxnet::TShape &lshape, const mxnet::TShape &rshape,
-                     const mxnet::TShape &oshape, mxnet::TShape *new_lshape,
-                     mxnet::TShape *new_rshape, mxnet::TShape *new_oshape) {
+inline int FillShape(const mxnet::TShape& lshape,
+                     const mxnet::TShape& rshape,
+                     const mxnet::TShape& oshape,
+                     mxnet::TShape* new_lshape,
+                     mxnet::TShape* new_rshape,
+                     mxnet::TShape* new_oshape) {
   const int odim = std::max(oshape.ndim(), broadcast::MAX_DIM);
-  *new_lshape = mxnet::TShape(odim, 1);
-  *new_rshape = mxnet::TShape(odim, 1);
-  *new_oshape = mxnet::TShape(odim, 1);
-  int bl = oshape.ndim() - lshape.ndim();
-  int br = oshape.ndim() - rshape.ndim();
-  int j = 0;
+  *new_lshape    = mxnet::TShape(odim, 1);
+  *new_rshape    = mxnet::TShape(odim, 1);
+  *new_oshape    = mxnet::TShape(odim, 1);
+  int bl         = oshape.ndim() - lshape.ndim();
+  int br         = oshape.ndim() - rshape.ndim();
+  int j          = 0;
   dim_t lprod = 1, rprod = 1, oprod = 1;
   for (int i = 0; i < oshape.ndim(); ++i) {
     dim_t l = 1;
     dim_t r = 1;
     dim_t o = oshape[i];
-    if (i >= bl) l = lshape[i - bl];
-    if (i >= br) r = rshape[i - br];
+    if (i >= bl)
+      l = lshape[i - bl];
+    if (i >= br)
+      r = rshape[i - br];
     if ((lprod != rprod || lprod != oprod || l != r || l != o) &&
         (lprod * l > 1 || rprod * r > 1 || oprod * o > 1)) {
       (*new_lshape)[j] = lprod;
@@ -89,50 +93,52 @@ inline int FillShape(const mxnet::TShape &lshape, const mxnet::TShape &rshape,
       new_oshape->assign(new_oshape->begin(), new_oshape->begin() + NDim);
     });
   } else {
-    LOG(FATAL) << "Too many broadcast dimensions with operands " << lshape
-               << " " << rshape;
+    LOG(FATAL) << "Too many broadcast dimensions with operands " << lshape << " " << rshape;
   }
   return j;
 }
 
-inline void CheckBroadcastable(const mxnet::TShape &from,
-                               const mxnet::TShape &to) {
+inline void CheckBroadcastable(const mxnet::TShape& from, const mxnet::TShape& to) {
   const int bl = to.ndim() - from.ndim();
   const int br = 0;
   for (int i = 0; i < to.ndim(); ++i) {
     dim_t l = 1, r = 1;
-    if (i >= bl) l = from[i - bl];
-    if (i >= br) r = to[i - br];
-    if (!mxnet::dim_size_is_known(l) || !mxnet::dim_size_is_known(r)) continue;
+    if (i >= bl)
+      l = from[i - bl];
+    if (i >= br)
+      r = to[i - br];
+    if (!mxnet::dim_size_is_known(l) || !mxnet::dim_size_is_known(r))
+      continue;
     if (l != r) {
       // Make it compatible with NumPy.
       // For example, (2, 3) cannot broadcast to (2, 0, 3), but (1, 3) can
       // broadcast to (2, 0, 3).
-      CHECK(l == 1 || r == 1)
-          << "operands could not be broadcast together with shapes " << from
-          << " " << to;
+      CHECK(l == 1 || r == 1) << "operands could not be broadcast together with shapes " << from
+                              << " " << to;
     }
   }
 }
 
-inline void InferBroadcastShape(const mxnet::TShape &lhs,
-                                const mxnet::TShape &rhs,
-                                mxnet::TShape *out_ptr) {
-  mxnet::TShape &out = (*out_ptr);
-  const int bl = out.ndim() - lhs.ndim();
-  const int br = out.ndim() - rhs.ndim();
+inline void InferBroadcastShape(const mxnet::TShape& lhs,
+                                const mxnet::TShape& rhs,
+                                mxnet::TShape* out_ptr) {
+  mxnet::TShape& out = (*out_ptr);
+  const int bl       = out.ndim() - lhs.ndim();
+  const int br       = out.ndim() - rhs.ndim();
   for (int i = 0; i < out.ndim(); ++i) {
     dim_t l = 1, r = 1;
-    if (i >= bl) l = lhs[i - bl];
-    if (i >= br) r = rhs[i - br];
-    if (!mxnet::dim_size_is_known(l) || !mxnet::dim_size_is_known(r)) continue;
+    if (i >= bl)
+      l = lhs[i - bl];
+    if (i >= br)
+      r = rhs[i - br];
+    if (!mxnet::dim_size_is_known(l) || !mxnet::dim_size_is_known(r))
+      continue;
     if (l != r) {
       // Make it compatible with NumPy.
       // For example, (2, 3) cannot broadcast to (2, 0, 3), but (1, 3) can
       // broadcast to (2, 0, 3).
-      CHECK(l == 1 || r == 1)
-          << "operands could not be broadcast together with shapes " << lhs
-          << " " << rhs;
+      CHECK(l == 1 || r == 1) << "operands could not be broadcast together with shapes " << lhs
+                              << " " << rhs;
       out[i] = (l == 1 ? r : l);
     } else {
       out[i] = l;
@@ -141,22 +147,22 @@ inline void InferBroadcastShape(const mxnet::TShape &lhs,
 }
 
 template <typename DistParam>
-inline bool TwoparamsDistOpShape(const nnvm::NodeAttrs &attrs,
-                                 std::vector<TShape> *in_attrs,
-                                 std::vector<TShape> *out_attrs) {
+inline bool TwoparamsDistOpShape(const nnvm::NodeAttrs& attrs,
+                                 std::vector<TShape>* in_attrs,
+                                 std::vector<TShape>* out_attrs) {
   // The inferShape function for sampling Ops has two modes: Concat/Broadcast,
   // if size[0] == -2, the Concat schema will be selected:
   // output_size = (size[1:],) + broadcast(param1.shape, param2.shape)
   // otherwise output_size = broadcast(param1.shape, param2.shape, size)
-  const DistParam &param = nnvm::get<DistParam>(attrs.parsed);
+  const DistParam& param = nnvm::get<DistParam>(attrs.parsed);
   // Variable indicating the mode.
   bool concat_mode = false;
   // Variable storing the info from `size` parameter.
   std::vector<dim_t> oshape_vec;
   if (param.size.has_value()) {
     // Size declared.
-    const auto &size = param.size.value();
-    index_t head = size[0];
+    const auto& size = param.size.value();
+    index_t head     = size[0];
     if (head == -2) {
       concat_mode = true;
     } else {
@@ -167,9 +173,9 @@ inline bool TwoparamsDistOpShape(const nnvm::NodeAttrs &attrs,
     }
     // If under the broadcast mode, `size` is equivalent to the final output_size.
     if (!concat_mode) {
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, TShape(oshape_vec));
-    for (size_t input_idx = 0; input_idx < in_attrs->size(); input_idx++) {
-      CheckBroadcastable((*in_attrs)[input_idx], (*out_attrs)[0]);
+      SHAPE_ASSIGN_CHECK(*out_attrs, 0, TShape(oshape_vec));
+      for (size_t input_idx = 0; input_idx < in_attrs->size(); input_idx++) {
+        CheckBroadcastable((*in_attrs)[input_idx], (*out_attrs)[0]);
       }
     }
   }
@@ -179,8 +185,8 @@ inline bool TwoparamsDistOpShape(const nnvm::NodeAttrs &attrs,
     mxnet::TShape param_broadcast_shape;
     if (in_attrs->size() == 2U) {
       // Both params from ndarray.
-      mxnet::TShape &param1 = (*in_attrs)[0];
-      mxnet::TShape &param2 = (*in_attrs)[1];
+      mxnet::TShape& param1 = (*in_attrs)[0];
+      mxnet::TShape& param2 = (*in_attrs)[1];
       mxnet::TShape out(std::max(param1.ndim(), param2.ndim()), -1);
       InferBroadcastShape(param1, param2, &out);
       param_broadcast_shape = out;
@@ -207,14 +213,14 @@ inline bool TwoparamsDistOpShape(const nnvm::NodeAttrs &attrs,
 }
 
 template <typename DistParam>
-inline bool UnaryDistOpShape(const nnvm::NodeAttrs &attrs,
-                             std::vector<TShape> *in_attrs,
-                             std::vector<TShape> *out_attrs) {
-  const DistParam &param = nnvm::get<DistParam>(attrs.parsed);
+inline bool UnaryDistOpShape(const nnvm::NodeAttrs& attrs,
+                             std::vector<TShape>* in_attrs,
+                             std::vector<TShape>* out_attrs) {
+  const DistParam& param = nnvm::get<DistParam>(attrs.parsed);
   if (param.size.has_value()) {
     // Size declared.
     std::vector<dim_t> oshape_vec;
-    const auto &size = param.size.value();
+    const auto& size = param.size.value();
     for (int i = 0; i < size.ndim(); ++i) {
       oshape_vec.emplace_back(size[i]);
     }
@@ -233,34 +239,33 @@ inline bool UnaryDistOpShape(const nnvm::NodeAttrs &attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-
 // Infer Shape function for sample_n Op.
 // i.e. output_shape = (shape,) + broadcast(param1.shape, param2.shape)
 template <typename DistParam>
-inline bool TwoparamsDistOpConcatShape(const nnvm::NodeAttrs &attrs,
-                                       std::vector<TShape> *in_attrs,
-                                       std::vector<TShape> *out_attrs) {
-  const DistParam &param = nnvm::get<DistParam>(attrs.parsed);
+inline bool TwoparamsDistOpConcatShape(const nnvm::NodeAttrs& attrs,
+                                       std::vector<TShape>* in_attrs,
+                                       std::vector<TShape>* out_attrs) {
+  const DistParam& param = nnvm::get<DistParam>(attrs.parsed);
   // broadcast(param1.shape, param2.shape).
   mxnet::TShape param_broadcast_shape;
   if (in_attrs->size() == 2U) {
-      // Both params from ndarray.
-      mxnet::TShape &param1 = (*in_attrs)[0];
-      mxnet::TShape &param2 = (*in_attrs)[1];
-      mxnet::TShape out(std::max(param1.ndim(), param2.ndim()), -1);
-      InferBroadcastShape(param1, param2, &out);
-      param_broadcast_shape = out;
-    } else if (in_attrs->size() == 1U) {
-      // One param from ndarray.
-      param_broadcast_shape = in_attrs->at(0);
-    } else if (in_attrs->size() == 0) {
-      // Two scalar case.
-      param_broadcast_shape = TShape(0, -1);
-    }
+    // Both params from ndarray.
+    mxnet::TShape& param1 = (*in_attrs)[0];
+    mxnet::TShape& param2 = (*in_attrs)[1];
+    mxnet::TShape out(std::max(param1.ndim(), param2.ndim()), -1);
+    InferBroadcastShape(param1, param2, &out);
+    param_broadcast_shape = out;
+  } else if (in_attrs->size() == 1U) {
+    // One param from ndarray.
+    param_broadcast_shape = in_attrs->at(0);
+  } else if (in_attrs->size() == 0) {
+    // Two scalar case.
+    param_broadcast_shape = TShape(0, -1);
+  }
   if (param.size.has_value()) {
     // Size declared.
     std::vector<dim_t> oshape_vec;
-    const auto &size = param.size.value();
+    const auto& size = param.size.value();
     for (int i = 0; i < size.ndim(); ++i) {
       oshape_vec.emplace_back(size[i]);
     }
@@ -277,7 +282,7 @@ inline bool TwoparamsDistOpConcatShape(const nnvm::NodeAttrs &attrs,
   return true;
 }
 
-template<typename xpu, int ndim, typename DType>
+template <typename xpu, int ndim, typename DType>
 inline void CommonReparamBackwardImpl(const OpContext& ctx,
                                       const std::vector<TBlob>& inputs,
                                       const std::vector<OpReqType>& req,
@@ -288,35 +293,34 @@ inline void CommonReparamBackwardImpl(const OpContext& ctx,
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace broadcast;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob lgrad = outputs[0].reshape(new_lshape);
   const TBlob rgrad = outputs[1].reshape(new_rshape);
   const TBlob ograd = inputs[0].reshape(new_oshape);
   // Mean
   const TBlob lhs = inputs[2].reshape(new_lshape);
   // Scale
-  const TBlob rhs = inputs[3].reshape(new_rshape);
+  const TBlob rhs     = inputs[3].reshape(new_rshape);
   const TBlob samples = inputs[4].reshape(new_oshape);
-  const TBlob noise = inputs[5].reshape(new_oshape);
-  size_t workspace_size_l = ReduceWorkspaceSize(
-    s, lgrad.shape_, req[0], ograd.shape_, lhs.shape_, rhs.shape_);
-  size_t workspace_size_r = ReduceWorkspaceSize(
-    s, rgrad.shape_, req[1], ograd.shape_, lhs.shape_, rhs.shape_);
+  const TBlob noise   = inputs[5].reshape(new_oshape);
+  size_t workspace_size_l =
+      ReduceWorkspaceSize(s, lgrad.shape_, req[0], ograd.shape_, lhs.shape_, rhs.shape_);
+  size_t workspace_size_r =
+      ReduceWorkspaceSize(s, rgrad.shape_, req[1], ograd.shape_, lhs.shape_, rhs.shape_);
   size_t workspace_size = std::max(workspace_size_l, workspace_size_r);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 #if !defined(__CUDACC__)
-  Reduce<red::sum, ndim, DType, op::mshadow_op::identity>(
-    s, lgrad, req[0], workspace, ograd);
+  Reduce<red::sum, ndim, DType, op::mshadow_op::identity>(s, lgrad, req[0], workspace, ograd);
   Reduce<red::sum, ndim, DType, op::mshadow_op::mul, op::mshadow_op::left>(
-    s, rgrad, req[1], workspace, ograd, noise, rhs);
+      s, rgrad, req[1], workspace, ograd, noise, rhs);
 #else
   RTCReduce(ctx, lgrad, req[0], workspace, ograd, "red::sum{}", ndim, "identity");
   RTCReduce(ctx, rgrad, req[1], workspace, ograd, noise, rhs, "red::sum{}", ndim, "mul", "left");
 #endif
 }
 
-template<typename xpu, int ndim, typename DType>
+template <typename xpu, int ndim, typename DType>
 inline void CommonScalarReparamBackwardImpl(const OpContext& ctx,
                                             const std::vector<TBlob>& inputs,
                                             const std::vector<OpReqType>& req,
@@ -327,32 +331,30 @@ inline void CommonScalarReparamBackwardImpl(const OpContext& ctx,
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace broadcast;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob igrad = outputs[0].reshape(new_ishape);
   // inputs: [grad_from_samples, grad_from_noise(invisible), input_tensor,
   //          samples, noise]
-  const TBlob ograd = inputs[0].reshape(new_oshape);
-  const TBlob itensor = inputs[2].reshape(new_ishape);
-  const TBlob samples = inputs[3].reshape(new_oshape);
-  const TBlob noise = inputs[4].reshape(new_oshape);
-  size_t workspace_size =
-    ReduceWorkspaceSize(s, igrad.shape_, req[0], ograd.shape_);
+  const TBlob ograd     = inputs[0].reshape(new_oshape);
+  const TBlob itensor   = inputs[2].reshape(new_ishape);
+  const TBlob samples   = inputs[3].reshape(new_oshape);
+  const TBlob noise     = inputs[4].reshape(new_oshape);
+  size_t workspace_size = ReduceWorkspaceSize(s, igrad.shape_, req[0], ograd.shape_);
   Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 #if !defined(__CUDACC__)
   if (loc_is_tensor) {
-    Reduce<red::sum, ndim, DType, op::mshadow_op::identity>(s, igrad, req[0],
-                                                            workspace, ograd);
+    Reduce<red::sum, ndim, DType, op::mshadow_op::identity>(s, igrad, req[0], workspace, ograd);
   } else {
     Reduce<red::sum, ndim, DType, op::mshadow_op::mul, op::mshadow_op::left>(
-      s, igrad, req[0], workspace, ograd, noise, noise);
+        s, igrad, req[0], workspace, ograd, noise, noise);
   }
 #else
   if (loc_is_tensor) {
     RTCReduce(ctx, igrad, req[0], workspace, ograd, "red::sum{}", ndim, "identity");
   } else {
-    RTCReduce(ctx, igrad, req[0], workspace, ograd, noise, noise, "red::sum{}",
-              ndim, "mul", "left");
+    RTCReduce(
+        ctx, igrad, req[0], workspace, ograd, noise, noise, "red::sum{}", ndim, "mul", "left");
   }
 #endif
 }
diff --git a/src/operator/numpy/random/np_bernoulli_op.cc b/src/operator/numpy/random/np_bernoulli_op.cc
index 1377d525015d..1089cb4d9ea4 100644
--- a/src/operator/numpy/random/np_bernoulli_op.cc
+++ b/src/operator/numpy/random/np_bernoulli_op.cc
@@ -32,38 +32,39 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyBernoulliParam);
 
 NNVM_REGISTER_OP(_npi_bernoulli)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyBernoulliParam& param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.logit.has_value() || param.prob.has_value()) {
-      num_inputs -= 1;
-    }
-    return num_inputs;
-  }
-)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyBernoulliParam& param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.logit.has_value() || param.prob.has_value()) {
-      num_inputs -= 1;
-    }
-    return (num_inputs == 0) ? std::vector<std::string>() : std::vector<std::string>{"input1"};
-  })
-.set_attr_parser(ParamParser<NumpyBernoulliParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyBernoulliParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyBernoulliOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyBernoulliForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyBernoulliParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyBernoulliParam& param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
+      int num_inputs                   = 1;
+      if (param.logit.has_value() || param.prob.has_value()) {
+        num_inputs -= 1;
+      }
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyBernoulliParam& param =
+                                           nnvm::get<NumpyBernoulliParam>(attrs.parsed);
+                                       int num_inputs = 1;
+                                       if (param.logit.has_value() || param.prob.has_value()) {
+                                         num_inputs -= 1;
+                                       }
+                                       return (num_inputs == 0)
+                                                  ? std::vector<std::string>()
+                                                  : std::vector<std::string>{"input1"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyBernoulliParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyBernoulliParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyBernoulliOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyBernoulliForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyBernoulliParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_bernoulli_op.cu b/src/operator/numpy/random/np_bernoulli_op.cu
index a73bf9929db3..73d5ca577ca0 100644
--- a/src/operator/numpy/random/np_bernoulli_op.cu
+++ b/src/operator/numpy/random/np_bernoulli_op.cu
@@ -28,8 +28,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_bernoulli)
-.set_attr<FCompute>("FCompute<gpu>", NumpyBernoulliForward<gpu>);
+NNVM_REGISTER_OP(_npi_bernoulli).set_attr<FCompute>("FCompute<gpu>", NumpyBernoulliForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_bernoulli_op.h b/src/operator/numpy/random/np_bernoulli_op.h
index f8462c6c0392..5e2de7e631b3 100644
--- a/src/operator/numpy/random/np_bernoulli_op.h
+++ b/src/operator/numpy/random/np_bernoulli_op.h
@@ -75,12 +75,12 @@ struct NumpyBernoulliParam : public dmlc::Parameter<NumpyBernoulliParam> {
   }
 };
 
-inline bool NumpyBernoulliOpType(const nnvm::NodeAttrs &attrs,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
-  const NumpyBernoulliParam &param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
-  int otype = mxnet::common::GetDefaultDtype(param.dtype);
-  (*out_attrs)[0] = otype;
+inline bool NumpyBernoulliOpType(const nnvm::NodeAttrs& attrs,
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
+  const NumpyBernoulliParam& param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
+  int otype                        = mxnet::common::GetDefaultDtype(param.dtype);
+  (*out_attrs)[0]                  = otype;
   return true;
 }
 
@@ -88,7 +88,7 @@ namespace mxnet_op {
 
 struct prob_to_logit {
   MSHADOW_XINLINE static void Map(index_t i, float* uniforms) {
-    float prob = uniforms[i];
+    float prob  = uniforms[i];
     uniforms[i] = log(prob) - log(1 - prob);
   }
 };
@@ -96,26 +96,27 @@ struct prob_to_logit {
 template <int ndim, typename IType, typename OType>
 struct bernoulli_kernel {
   MSHADOW_XINLINE static void Map(index_t i,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape,
-                                  IType *inputs, float* threshold, OType *out) {
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* inputs,
+                                  float* threshold,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
-    out[i] =  inputs[idx] > threshold[i] ? OType(1) : OType(0);
+    auto idx          = static_cast<index_t>(dot(coord, stride));
+    out[i]            = inputs[idx] > threshold[i] ? OType(1) : OType(0);
   }
 };
 
 template <typename OType>
 struct scalar_bernoulli_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float inputs, float *threshold,
-                                  OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float inputs, float* threshold, OType* out) {
     out[i] = inputs > threshold[i] ? OType(1) : OType(0);
   }
 };
 
 template <typename IType>
 struct check_legal_prob_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *scalar, float* flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* scalar, float* flag) {
     if (scalar[i] < 0.0 || scalar[i] > 1.0) {
       flag[0] = -1.0;
     }
@@ -125,23 +126,23 @@ struct check_legal_prob_kernel {
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyBernoulliForward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyBernoulliForward(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyBernoulliParam &param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  index_t output_len = outputs[0].Size();
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
+  const NumpyBernoulliParam& param = nnvm::get<NumpyBernoulliParam>(attrs.parsed);
+  Stream<xpu>* s                   = ctx.get_stream<xpu>();
+  index_t output_len               = outputs[0].Size();
+  Random<xpu, float>* prnd         = ctx.requested[0].get_random<xpu, float>(s);
   Tensor<xpu, 1, float> workspace =
       ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(output_len + 1), s);
-  Tensor<xpu, 1, float> uniform_tensor = workspace.Slice(0, output_len);
+  Tensor<xpu, 1, float> uniform_tensor   = workspace.Slice(0, output_len);
   Tensor<xpu, 1, float> indicator_device = workspace.Slice(output_len, output_len + 1);
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&uniform_tensor, 0.0, 1.0);
   if (param.prob.has_value()) {
@@ -150,24 +151,23 @@ void NumpyBernoulliForward(const nnvm::NodeAttrs &attrs,
     CHECK_GE(param.prob.value(), 0.0) << "ValueError: expect probs >= 0 && probs <= 1";
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
       Kernel<scalar_bernoulli_kernel<OType>, xpu>::Launch(
-        s, outputs[0].Size(), param.prob.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          s, outputs[0].Size(), param.prob.value(), uniform_tensor.dptr_, outputs[0].dptr<OType>());
     });
   } else if (param.logit.has_value()) {
     // scalar logit input
     // sigmoid(x) > u  <=> x > logit(u)
-    Kernel<prob_to_logit, xpu>::Launch(s, outputs[0].Size(),
-                                         uniform_tensor.dptr_);
+    Kernel<prob_to_logit, xpu>::Launch(s, outputs[0].Size(), uniform_tensor.dptr_);
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
-      Kernel<scalar_bernoulli_kernel<OType>, xpu>::Launch(
-        s, outputs[0].Size(), param.logit.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<OType>());
+      Kernel<scalar_bernoulli_kernel<OType>, xpu>::Launch(s,
+                                                          outputs[0].Size(),
+                                                          param.logit.value(),
+                                                          uniform_tensor.dptr_,
+                                                          outputs[0].dptr<OType>());
     });
   } else {
     if (param.is_logit) {
       // tensor logit input
-      Kernel<prob_to_logit, xpu>::Launch(s, outputs[0].Size(),
-                                         uniform_tensor.dptr_);
+      Kernel<prob_to_logit, xpu>::Launch(s, outputs[0].Size(), uniform_tensor.dptr_);
     } else {
       // tensor prob input
       // sigmoid(x) > u  <=> x > logit(u)
@@ -176,20 +176,27 @@ void NumpyBernoulliForward(const nnvm::NodeAttrs &attrs,
             s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
       });
       _copy<xpu>(s, &indicator_host, indicator_device_ptr);
-      CHECK_GE(indicator_host, 0.0)
-          << "ValueError: expect probs >= 0 && probs <= 1";
+      CHECK_GE(indicator_host, 0.0) << "ValueError: expect probs >= 0 && probs <= 1";
     }
     mxnet::TShape new_lshape, new_oshape;
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<bernoulli_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), stride, oshape, inputs[0].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<bernoulli_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                    outputs[0].Size(),
+                                                                    stride,
+                                                                    oshape,
+                                                                    inputs[0].dptr<IType>(),
+                                                                    uniform_tensor.dptr_,
+                                                                    outputs[0].dptr<OType>());
         });
       });
     });
diff --git a/src/operator/numpy/random/np_choice_op.cc b/src/operator/numpy/random/np_choice_op.cc
index 328d7e264861..a2b9d40da51e 100644
--- a/src/operator/numpy/random/np_choice_op.cc
+++ b/src/operator/numpy/random/np_choice_op.cc
@@ -31,51 +31,53 @@ namespace op {
 
 template <>
 void _sort<cpu>(float* key, int64_t* data, index_t length) {
-  std::sort(data, data + length,
-            [key](int64_t const& i, int64_t const& j) -> bool {
-              return key[i] > key[j];
-            });
+  std::sort(data, data + length, [key](int64_t const& i, int64_t const& j) -> bool {
+    return key[i] > key[j];
+  });
 }
 
 DMLC_REGISTER_PARAMETER(NumpyChoiceParam);
 
 NNVM_REGISTER_OP(_npi_choice)
-.describe("random choice")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    int num_input = 0;
-    const NumpyChoiceParam& param = nnvm::get<NumpyChoiceParam>(attrs.parsed);
-    if (param.weighted) num_input += 1;
-    if (!param.a.has_value()) num_input += 1;
-    return num_input;
-})
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>(
-    "FListInputNames",
-    [](const NodeAttrs& attrs) {
-      int num_input = 0;
-      const NumpyChoiceParam& param =
-          nnvm::get<NumpyChoiceParam>(attrs.parsed);
-      if (param.weighted) num_input += 1;
-      if (!param.a.has_value()) num_input += 1;
-      if (num_input == 0) return std::vector<std::string>();
-      if (num_input == 1) return std::vector<std::string>{"input1"};
-      return std::vector<std::string>{"input1", "input2"};
-})
-.set_attr_parser(ParamParser<NumpyChoiceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyChoiceOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyChoiceOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom,
-        ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyChoiceForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyChoiceParam::__FIELDS__());
+    .describe("random choice")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      int num_input                 = 0;
+      const NumpyChoiceParam& param = nnvm::get<NumpyChoiceParam>(attrs.parsed);
+      if (param.weighted)
+        num_input += 1;
+      if (!param.a.has_value())
+        num_input += 1;
+      return num_input;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       int num_input = 0;
+                                       const NumpyChoiceParam& param =
+                                           nnvm::get<NumpyChoiceParam>(attrs.parsed);
+                                       if (param.weighted)
+                                         num_input += 1;
+                                       if (!param.a.has_value())
+                                         num_input += 1;
+                                       if (num_input == 0)
+                                         return std::vector<std::string>();
+                                       if (num_input == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyChoiceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyChoiceOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyChoiceOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyChoiceForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyChoiceParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_choice_op.cu b/src/operator/numpy/random/np_choice_op.cu
index 0f42a2e76df0..a82c87dd6afb 100644
--- a/src/operator/numpy/random/np_choice_op.cu
+++ b/src/operator/numpy/random/np_choice_op.cu
@@ -35,12 +35,10 @@ template <>
 void _sort<gpu>(float* key, int64_t* data, index_t length) {
   thrust::device_ptr<float> dev_key(key);
   thrust::device_ptr<int64_t> dev_data(data);
-  thrust::sort_by_key(dev_key, dev_key + length, dev_data,
-                      thrust::greater<float>());
+  thrust::sort_by_key(dev_key, dev_key + length, dev_data, thrust::greater<float>());
 }
 
-NNVM_REGISTER_OP(_npi_choice)
-.set_attr<FCompute>("FCompute<gpu>", NumpyChoiceForward<gpu>);
+NNVM_REGISTER_OP(_npi_choice).set_attr<FCompute>("FCompute<gpu>", NumpyChoiceForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_choice_op.h b/src/operator/numpy/random/np_choice_op.h
index bc1e712aeba0..d97651a59c81 100644
--- a/src/operator/numpy/random/np_choice_op.h
+++ b/src/operator/numpy/random/np_choice_op.h
@@ -59,28 +59,28 @@ struct NumpyChoiceParam : public dmlc::Parameter<NumpyChoiceParam> {
     size_s << size;
     replace_s << replace;
     weighted_s << weighted;
-    (*dict)["a"] = a_s.str();
-    (*dict)["size"] = size_s.str();
-    (*dict)["replace"] = replace_s.str();
+    (*dict)["a"]        = a_s.str();
+    (*dict)["size"]     = size_s.str();
+    (*dict)["replace"]  = replace_s.str();
     (*dict)["weighted"] = weighted_s.str();
   }
 };
 
-inline bool NumpyChoiceOpType(const nnvm::NodeAttrs &attrs,
-                              std::vector<int> *in_attrs,
-                              std::vector<int> *out_attrs) {
+inline bool NumpyChoiceOpType(const nnvm::NodeAttrs& attrs,
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   (*out_attrs)[0] = mshadow::kInt64;
   return true;
 }
 
-inline bool NumpyChoiceOpShape(const nnvm::NodeAttrs &attrs,
-                               std::vector<TShape> *in_attrs,
-                               std::vector<TShape> *out_attrs) {
-  const NumpyChoiceParam &param = nnvm::get<NumpyChoiceParam>(attrs.parsed);
+inline bool NumpyChoiceOpShape(const nnvm::NodeAttrs& attrs,
+                               std::vector<TShape>* in_attrs,
+                               std::vector<TShape>* out_attrs) {
+  const NumpyChoiceParam& param = nnvm::get<NumpyChoiceParam>(attrs.parsed);
   if (param.size.has_value()) {
     // Size declared.
     std::vector<dim_t> oshape_vec;
-    const mxnet::Tuple<int64_t> &size = param.size.value();
+    const mxnet::Tuple<int64_t>& size = param.size.value();
     for (int i = 0; i < size.ndim(); ++i) {
       oshape_vec.emplace_back(size[i]);
     }
@@ -92,27 +92,29 @@ inline bool NumpyChoiceOpShape(const nnvm::NodeAttrs &attrs,
 }
 
 template <typename xpu>
-void _sort(float *key, int64_t *data, index_t length);
+void _sort(float* key, int64_t* data, index_t length);
 
 namespace mxnet_op {
 
 // Uniform sample without replacement.
 struct generate_samples {
-  MSHADOW_XINLINE static void Map(index_t i, int64_t k, unsigned *rands) {
+  MSHADOW_XINLINE static void Map(index_t i, int64_t k, unsigned* rands) {
     rands[i] = rands[i] % (i + k + 1);
   }
 };
 
 template <typename xpu>
 struct generate_reservoir {
-  MSHADOW_XINLINE static void Map(index_t dummy_index, int64_t *indices,
-                                  unsigned *samples, int64_t nb_iterations,
+  MSHADOW_XINLINE static void Map(index_t dummy_index,
+                                  int64_t* indices,
+                                  unsigned* samples,
+                                  int64_t nb_iterations,
                                   int64_t k) {
     for (int64_t i = 0; i < nb_iterations; i++) {
       int64_t z = samples[i];
       if (z < k) {
-        int64_t t = indices[z];
-        indices[z] = indices[i + k];
+        int64_t t      = indices[z];
+        indices[z]     = indices[i + k];
         indices[i + k] = t;
       }
     }
@@ -121,8 +123,7 @@ struct generate_reservoir {
 
 // Uniform sample with replacement.
 struct random_indices {
-  MSHADOW_XINLINE static void Map(index_t i, unsigned *samples, int64_t *outs,
-                                  int64_t k) {
+  MSHADOW_XINLINE static void Map(index_t i, unsigned* samples, int64_t* outs, int64_t k) {
     outs[i] = samples[i] % k;
   }
 };
@@ -131,7 +132,7 @@ struct random_indices {
 // Use perturbed Gumbel variates as keys.
 template <typename IType>
 struct generate_keys {
-  MSHADOW_XINLINE static void Map(index_t i, float *uniforms, IType *weights) {
+  MSHADOW_XINLINE static void Map(index_t i, float* uniforms, IType* weights) {
     uniforms[i] = -logf(-logf(uniforms[i])) + logf(weights[i]);
   }
 };
@@ -139,10 +140,13 @@ struct generate_keys {
 // Weighted sample with replacement.
 template <typename IType>
 struct categorical_sampling {
-  MSHADOW_XINLINE static void Map(index_t i, IType *weights, size_t length,
-                                  float *uniforms, int64_t *outs) {
-    outs[i] = 0;
-    float acc = 0.0;
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  IType* weights,
+                                  size_t length,
+                                  float* uniforms,
+                                  int64_t* outs) {
+    outs[i]         = 0;
+    float acc       = 0.0;
     float threshold = uniforms[i];
     for (size_t k = 0; k < length; k++) {
       acc += weights[k];
@@ -156,18 +160,19 @@ struct categorical_sampling {
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyChoiceForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
+void NumpyChoiceForward(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyChoiceParam &param = nnvm::get<NumpyChoiceParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  bool replace = param.replace;
-  bool weighted = param.weighted;
-  int64_t input_size = 0;
-  int weight_index = 0;
+  const NumpyChoiceParam& param = nnvm::get<NumpyChoiceParam>(attrs.parsed);
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
+  bool replace                  = param.replace;
+  bool weighted                 = param.weighted;
+  int64_t input_size            = 0;
+  int weight_index              = 0;
   if (param.a.has_value()) {
     input_size = param.a.value();
   } else {
@@ -176,68 +181,63 @@ void NumpyChoiceForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
   }
   int64_t output_size = outputs[0].Size();
   if (weighted) {
-    Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-    int64_t random_tensor_size = replace ? output_size : input_size;
-    int64_t indices_size = replace ? 0 : input_size;
-    Tensor<xpu, 1, char> workspace =
-        ctx.requested[1].get_space_typed<xpu, 1, char>(
-            Shape1(indices_size * sizeof(int64_t) +
-                   (random_tensor_size * sizeof(float) / 7 + 1) * 8),
-            s);
+    Random<xpu, float>* prnd       = ctx.requested[0].get_random<xpu, float>(s);
+    int64_t random_tensor_size     = replace ? output_size : input_size;
+    int64_t indices_size           = replace ? 0 : input_size;
+    Tensor<xpu, 1, char> workspace = ctx.requested[1].get_space_typed<xpu, 1, char>(
+        Shape1(indices_size * sizeof(int64_t) + (random_tensor_size * sizeof(float) / 7 + 1) * 8),
+        s);
     // slice workspace
-    char *workspace_ptr = workspace.dptr_;
-    Tensor<xpu, 1, float> random_numbers =
-        Tensor<xpu, 1, float>(reinterpret_cast<float *>(workspace_ptr),
-                              Shape1(random_tensor_size), s);
+    char* workspace_ptr                  = workspace.dptr_;
+    Tensor<xpu, 1, float> random_numbers = Tensor<xpu, 1, float>(
+        reinterpret_cast<float*>(workspace_ptr), Shape1(random_tensor_size), s);
     prnd->SampleUniform(&random_numbers, 0, 1);
     workspace_ptr += ((random_tensor_size * sizeof(float) / 7 + 1) * 8);
     if (replace) {
       MSHADOW_REAL_TYPE_SWITCH(inputs[weight_index].type_flag_, IType, {
-        Kernel<categorical_sampling<IType>, xpu>::Launch(
-            s, output_size, inputs[weight_index].dptr<IType>(), input_size,
-            random_numbers.dptr_, outputs[0].dptr<int64_t>());
+        Kernel<categorical_sampling<IType>, xpu>::Launch(s,
+                                                         output_size,
+                                                         inputs[weight_index].dptr<IType>(),
+                                                         input_size,
+                                                         random_numbers.dptr_,
+                                                         outputs[0].dptr<int64_t>());
       });
     } else {
       Tensor<xpu, 1, int64_t> indices = Tensor<xpu, 1, int64_t>(
-          reinterpret_cast<int64_t *>(workspace_ptr), Shape1(indices_size), s);
+          reinterpret_cast<int64_t*>(workspace_ptr), Shape1(indices_size), s);
       indices = expr::range((int64_t)0, input_size);
       MSHADOW_REAL_TYPE_SWITCH(inputs[weight_index].type_flag_, IType, {
-        Kernel<generate_keys<IType>, xpu>::Launch(s, input_size, random_numbers.dptr_,
-                                           inputs[weight_index].dptr<IType>());
+        Kernel<generate_keys<IType>, xpu>::Launch(
+            s, input_size, random_numbers.dptr_, inputs[weight_index].dptr<IType>());
       });
       _sort<xpu>(random_numbers.dptr_, indices.dptr_, input_size);
       Copy(outputs[0].FlatTo1D<xpu, int64_t>(s), indices.Slice(0, output_size), s);
     }
   } else {
-    Random<xpu, unsigned> *prnd = ctx.requested[0].get_random<xpu, unsigned>(s);
+    Random<xpu, unsigned>* prnd = ctx.requested[0].get_random<xpu, unsigned>(s);
     int64_t random_tensor_size =
-        (replace ? output_size
-                 : std::min(output_size, input_size - output_size));
-    int64_t indices_size = replace ? 0 : input_size;
-    Tensor<xpu, 1, char> workspace =
-        ctx.requested[1].get_space_typed<xpu, 1, char>(
-            Shape1(indices_size * sizeof(int64_t) +
-                   (random_tensor_size * sizeof(unsigned) / 7 + 1) * 8),
-            s);
+        (replace ? output_size : std::min(output_size, input_size - output_size));
+    int64_t indices_size           = replace ? 0 : input_size;
+    Tensor<xpu, 1, char> workspace = ctx.requested[1].get_space_typed<xpu, 1, char>(
+        Shape1(indices_size * sizeof(int64_t) +
+               (random_tensor_size * sizeof(unsigned) / 7 + 1) * 8),
+        s);
     // slice workspace
-    char *workspace_ptr = workspace.dptr_;
-    Tensor<xpu, 1, unsigned> random_numbers =
-        Tensor<xpu, 1, unsigned>(reinterpret_cast<unsigned *>(workspace_ptr),
-                                 Shape1(random_tensor_size), s);
+    char* workspace_ptr                     = workspace.dptr_;
+    Tensor<xpu, 1, unsigned> random_numbers = Tensor<xpu, 1, unsigned>(
+        reinterpret_cast<unsigned*>(workspace_ptr), Shape1(random_tensor_size), s);
     prnd->GetRandInt(random_numbers);
     workspace_ptr += ((random_tensor_size * sizeof(unsigned) / 7 + 1) * 8);
     if (replace) {
-      Kernel<random_indices, xpu>::Launch(s, output_size, random_numbers.dptr_,
-                                          outputs[0].dptr<int64_t>(),
-                                          input_size);
+      Kernel<random_indices, xpu>::Launch(
+          s, output_size, random_numbers.dptr_, outputs[0].dptr<int64_t>(), input_size);
     } else {
       Tensor<xpu, 1, int64_t> indices = Tensor<xpu, 1, int64_t>(
-          reinterpret_cast<int64_t *>(workspace_ptr), Shape1(indices_size), s);
-      indices = expr::range((int64_t)0, input_size);
+          reinterpret_cast<int64_t*>(workspace_ptr), Shape1(indices_size), s);
+      indices               = expr::range((int64_t)0, input_size);
       int64_t nb_iterations = random_tensor_size;
-      int64_t split = input_size - nb_iterations;
-      Kernel<generate_samples, xpu>::Launch(s, random_tensor_size, split,
-                                            random_numbers.dptr_);
+      int64_t split         = input_size - nb_iterations;
+      Kernel<generate_samples, xpu>::Launch(s, random_tensor_size, split, random_numbers.dptr_);
       // Reservoir sampling.
       Kernel<generate_reservoir<xpu>, xpu>::Launch(
           s, 1, indices.dptr_, random_numbers.dptr_, nb_iterations, split);
@@ -245,10 +245,10 @@ void NumpyChoiceForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
       index_t end;
       if (2 * output_size < input_size) {
         begin = input_size - output_size;
-        end = input_size;
+        end   = input_size;
       } else {
         begin = 0;
-        end = output_size;
+        end   = output_size;
       }
       Copy(outputs[0].FlatTo1D<xpu, int64_t>(s), indices.Slice(begin, end), s);
     }
diff --git a/src/operator/numpy/random/np_exponential_op.cc b/src/operator/numpy/random/np_exponential_op.cc
index b4a7b64c3776..d8cb9fed1a81 100644
--- a/src/operator/numpy/random/np_exponential_op.cc
+++ b/src/operator/numpy/random/np_exponential_op.cc
@@ -32,73 +32,73 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyExponentialParam);
 
 NNVM_REGISTER_OP(_npi_exponential)
-.describe("Numpy behavior exponential")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.scale.has_value()) {
-      num_inputs -= 1;
-    }
-    return num_inputs;
-  })
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  return 1;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.scale.has_value()) {
-      num_inputs -= 1;
-    }
-    return (num_inputs == 0) ? std::vector<std::string>() : std::vector<std::string>{"input1"};
-  })
-.set_attr_parser(ParamParser<NumpyExponentialParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyExponentialParam>)
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs &attrs, std::vector<int> *in_attrs,  std::vector<int> *out_attrs) {
-    (*out_attrs)[0] = mshadow::kFloat32;
-    (*out_attrs)[1] = mshadow::kFloat32;
-    return true;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyExponentialForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_exponential"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyExponentialParam::__FIELDS__());
+    .describe("Numpy behavior exponential")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
+      int num_inputs                     = 1;
+      if (param.scale.has_value()) {
+        num_inputs -= 1;
+      }
+      return num_inputs;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyExponentialParam& param =
+                                           nnvm::get<NumpyExponentialParam>(attrs.parsed);
+                                       int num_inputs = 1;
+                                       if (param.scale.has_value()) {
+                                         num_inputs -= 1;
+                                       }
+                                       return (num_inputs == 0)
+                                                  ? std::vector<std::string>()
+                                                  : std::vector<std::string>{"input1"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyExponentialParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyExponentialParam>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  (*out_attrs)[1] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyExponentialForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_exponential"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyExponentialParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_broadcast_exponential)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<NumpyExponentialParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
-    int num_inputs = 5;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
-    int num_outputs = 1;
-    if (param.scale.has_value()) num_outputs -= 1;
-    return num_outputs;
-  }
-)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", ExponentialReparamBackward<cpu>)
-.add_arguments(NumpyExponentialParam::__FIELDS__());
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<NumpyExponentialParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
+      int num_inputs                     = 5;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
+      int num_outputs                    = 1;
+      if (param.scale.has_value())
+        num_outputs -= 1;
+      return num_outputs;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", ExponentialReparamBackward<cpu>)
+    .add_arguments(NumpyExponentialParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_exponential_op.cu b/src/operator/numpy/random/np_exponential_op.cu
index 4740b644a60c..317286ec29ec 100644
--- a/src/operator/numpy/random/np_exponential_op.cu
+++ b/src/operator/numpy/random/np_exponential_op.cu
@@ -29,10 +29,10 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_exponential)
-.set_attr<FCompute>("FCompute<gpu>", NumpyExponentialForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyExponentialForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_broadcast_exponential)
-.set_attr<FCompute>("FCompute<gpu>", ExponentialReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ExponentialReparamBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_exponential_op.h b/src/operator/numpy/random/np_exponential_op.h
index 0f0d4623800e..102d3b91ebd2 100644
--- a/src/operator/numpy/random/np_exponential_op.h
+++ b/src/operator/numpy/random/np_exponential_op.h
@@ -47,30 +47,29 @@ struct NumpyExponentialParam : public dmlc::Parameter<NumpyExponentialParam> {
   dmlc::optional<mxnet::Tuple<index_t>> size;
   std::string ctx;
   DMLC_DECLARE_PARAMETER(NumpyExponentialParam) {
-      DMLC_DECLARE_FIELD(scale)
-      .set_default(dmlc::optional<float>(1.0));
-      DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-          "e.g., (m, n, k), then m * n * k samples are drawn. "
-          "Default is None, in which case a single value is returned.");
-      DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
+    DMLC_DECLARE_FIELD(scale).set_default(dmlc::optional<float>(1.0));
+    DMLC_DECLARE_FIELD(size)
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
         "Context of output, in format [cpu|gpu|cpu_pinned](n)."
         " Only used for imperative calls.");
   }
-    void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
+  void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream scale_s, size_s;
     scale_s << scale;
     size_s << size;
     (*dict)["scale"] = scale_s.str();
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
 template <typename DType>
 struct scalar_exponential_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float scale, float *threshold,
-                                  DType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float scale, float* threshold, DType* out) {
     out[i] = -scale * log(threshold[i]);
   }
 };
@@ -79,80 +78,90 @@ namespace mxnet_op {
 
 template <typename IType>
 struct check_legal_scale_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *scalar, float* flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* scalar, float* flag) {
     if (scalar[i] < 0.0) {
       flag[0] = -1.0;
     }
   }
 };
 
-
 template <int ndim, typename IType, typename OType>
 struct exponential_kernel {
   MSHADOW_XINLINE static void Map(index_t i,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape,
-                                  IType *scales, float* threshold, OType *out) {
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* scales,
+                                  float* threshold,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
-    threshold[i] = -log(threshold[i]);
-    out[i] =  scales[idx] * threshold[i];
+    auto idx          = static_cast<index_t>(dot(coord, stride));
+    threshold[i]      = -log(threshold[i]);
+    out[i]            = scales[idx] * threshold[i];
   }
 };
 
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyExponentialForward(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+void NumpyExponentialForward(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyExponentialParam &param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-  Tensor<xpu, 1, float> workspace =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
-  Tensor<xpu, 1, float> uniform_tensor = outputs[1].FlatTo1D<xpu, float>(s);
+  const NumpyExponentialParam& param = nnvm::get<NumpyExponentialParam>(attrs.parsed);
+  Stream<xpu>* s                     = ctx.get_stream<xpu>();
+  Random<xpu, float>* prnd           = ctx.requested[0].get_random<xpu, float>(s);
+  Tensor<xpu, 1, float> workspace = ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
+  Tensor<xpu, 1, float> uniform_tensor   = outputs[1].FlatTo1D<xpu, float>(s);
   Tensor<xpu, 1, float> indicator_device = workspace;
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&uniform_tensor, 0.0, 1.0);
   if (param.scale.has_value()) {
     CHECK_GE(param.scale.value(), 0.0) << "ValueError: expect scale >= 0";
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Kernel<scalar_exponential_kernel<DType>, xpu>::Launch(
-        s, outputs[0].Size(), param.scale.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<DType>());
+      Kernel<scalar_exponential_kernel<DType>, xpu>::Launch(s,
+                                                            outputs[0].Size(),
+                                                            param.scale.value(),
+                                                            uniform_tensor.dptr_,
+                                                            outputs[0].dptr<DType>());
     });
   } else {
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       Kernel<check_legal_scale_kernel<IType>, xpu>::Launch(
-      s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
+          s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: expect scale >= 0";
     mxnet::TShape new_lshape, new_oshape;
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<exponential_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), stride, oshape, inputs[0].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<exponential_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                      outputs[0].Size(),
+                                                                      stride,
+                                                                      oshape,
+                                                                      inputs[0].dptr<IType>(),
+                                                                      uniform_tensor.dptr_,
+                                                                      outputs[0].dptr<OType>());
         });
       });
     });
   }
 }
 
-template<typename xpu, int ndim, typename DType>
+template <typename xpu, int ndim, typename DType>
 inline void ExponentialReparamBackwardImpl(const OpContext& ctx,
                                            const std::vector<TBlob>& inputs,
                                            const std::vector<OpReqType>& req,
@@ -162,28 +171,26 @@ inline void ExponentialReparamBackwardImpl(const OpContext& ctx,
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace broadcast;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob igrad = outputs[0].reshape(new_ishape);
   // inputs: [grad_from_samples, grad_from_noise(invisible), input_tensor,
   //          samples, noise]
-  const TBlob ograd = inputs[0].reshape(new_oshape);
-  const TBlob itensor = inputs[2].reshape(new_ishape);
-  const TBlob samples = inputs[3].reshape(new_oshape);
-  const TBlob noise = inputs[4].reshape(new_oshape);
-  size_t workspace_size =
-      ReduceWorkspaceSize(s, igrad.shape_, req[0], ograd.shape_);
+  const TBlob ograd     = inputs[0].reshape(new_oshape);
+  const TBlob itensor   = inputs[2].reshape(new_ishape);
+  const TBlob samples   = inputs[3].reshape(new_oshape);
+  const TBlob noise     = inputs[4].reshape(new_oshape);
+  size_t workspace_size = ReduceWorkspaceSize(s, igrad.shape_, req[0], ograd.shape_);
   Tensor<xpu, 1, char> workspace =
       ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 #if !defined(__CUDACC__)
   Reduce<red::sum, ndim, DType, op::mshadow_op::mul, op::mshadow_op::left>(
       s, igrad, req[0], workspace, ograd, noise, noise);
 #else
-  RTCReduce(ctx, igrad, req[0], workspace, ograd, noise, noise,
-            "red::sum{}", ndim, "mul", "left");
+  RTCReduce(ctx, igrad, req[0], workspace, ograd, noise, noise, "red::sum{}", ndim, "mul", "left");
 #endif
 }
 
-template<typename xpu>
+template <typename xpu>
 void ExponentialReparamBackward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -200,12 +207,16 @@ void ExponentialReparamBackward(const nnvm::NodeAttrs& attrs,
   // [tensor] case
   if (inputs.size() == 5U) {
     mxnet::TShape new_ishape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                         &new_ishape, &new_ishape, &new_oshape);
+    int ndim = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         ExponentialReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_ishape, new_oshape);
+            ctx, inputs, req, outputs, new_ishape, new_oshape);
       });
     });
   }
diff --git a/src/operator/numpy/random/np_gamma_op.cc b/src/operator/numpy/random/np_gamma_op.cc
index 847243da9491..0c01fca7b500 100644
--- a/src/operator/numpy/random/np_gamma_op.cc
+++ b/src/operator/numpy/random/np_gamma_op.cc
@@ -34,7 +34,7 @@ inline bool NumpyGammaOpType(const nnvm::NodeAttrs& attrs,
                              std::vector<int>* in_attrs,
                              std::vector<int>* out_attrs) {
   const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
-  int otype = param.dtype;
+  int otype                    = param.dtype;
   if (otype != -1) {
     (*out_attrs)[0] = otype;
   } else {
@@ -44,70 +44,73 @@ inline bool NumpyGammaOpType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_npi_gamma)
-.describe("Numpy behavior gamma")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.shape.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.scale.has_value()) num_inputs -= 1;
-    if (param.shape.has_value()) num_inputs -= 1;
-    if (num_inputs == 0) return std::vector<std::string>();
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    return std::vector<std::string>{"input1", "input2"};
-  })
-.set_attr_parser(ParamParser<NumpyGammaParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyGammaParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyGammaOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom,
-        ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyGammaForward<cpu, double>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_gamma_sample"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyGammaParam::__FIELDS__());
+    .describe("Numpy behavior gamma")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
+      int num_inputs               = 2;
+      if (param.shape.has_value())
+        num_inputs -= 1;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyGammaParam& param =
+                                           nnvm::get<NumpyGammaParam>(attrs.parsed);
+                                       int num_inputs = 2;
+                                       if (param.scale.has_value())
+                                         num_inputs -= 1;
+                                       if (param.shape.has_value())
+                                         num_inputs -= 1;
+                                       if (num_inputs == 0)
+                                         return std::vector<std::string>();
+                                       if (num_inputs == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyGammaParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyGammaParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyGammaOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyGammaForward<cpu, double>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_gamma_sample"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyGammaParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_gamma_sample)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<NumpyGammaParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
-    int num_inputs = 4;
-    if (param.shape.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
-    int num_outputs = 2;
-    if (param.shape.has_value()) num_outputs -= 1;
-    if (param.scale.has_value()) num_outputs -= 1;
-    return num_outputs;
-  }
-)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyGammaGrad<cpu>)
-.add_arguments(NumpyGammaParam::__FIELDS__());
-
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<NumpyGammaParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
+      int num_inputs               = 4;
+      if (param.shape.has_value())
+        num_inputs -= 1;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
+      int num_outputs              = 2;
+      if (param.shape.has_value())
+        num_outputs -= 1;
+      if (param.scale.has_value())
+        num_outputs -= 1;
+      return num_outputs;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyGammaGrad<cpu>)
+    .add_arguments(NumpyGammaParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_gamma_op.cu b/src/operator/numpy/random/np_gamma_op.cu
index 2d8b5b204dd2..84de4c86c0ea 100644
--- a/src/operator/numpy/random/np_gamma_op.cu
+++ b/src/operator/numpy/random/np_gamma_op.cu
@@ -29,11 +29,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_gamma)
-.set_attr<FCompute>("FCompute<gpu>", NumpyGammaForward<gpu, double>);
+NNVM_REGISTER_OP(_npi_gamma).set_attr<FCompute>("FCompute<gpu>", NumpyGammaForward<gpu, double>);
 
-NNVM_REGISTER_OP(_backward_gamma_sample)
-.set_attr<FCompute>("FCompute<gpu>", NumpyGammaGrad<gpu>);
+NNVM_REGISTER_OP(_backward_gamma_sample).set_attr<FCompute>("FCompute<gpu>", NumpyGammaGrad<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_gamma_op.h b/src/operator/numpy/random/np_gamma_op.h
index 55041a93b1f7..7418a948bc52 100644
--- a/src/operator/numpy/random/np_gamma_op.h
+++ b/src/operator/numpy/random/np_gamma_op.h
@@ -53,23 +53,24 @@ struct NumpyGammaParam : public dmlc::Parameter<NumpyGammaParam> {
     DMLC_DECLARE_FIELD(shape);
     DMLC_DECLARE_FIELD(scale);
     DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-                "e.g., (m, n, k), then m * n * k samples are drawn. "
-                "Default is None, in which case a single value is returned.");
-    DMLC_DECLARE_FIELD(ctx)
-      .set_default("cpu")
-      .describe("Context of output, in format [xpu|xpu|xpu_pinned](n)."
-                " Only used for imperative calls.");
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
+        "Context of output, in format [xpu|xpu|xpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-      .add_enum("None", -1)
-      .add_enum("float32", mshadow::kFloat32)
-      .add_enum("float64", mshadow::kFloat64)
-      .add_enum("float16", mshadow::kFloat16)
-      .set_default(-1)
-      .describe("DType of the output in case this can't be inferred."
-                "Defaults to float64 or float32 if not defined (dtype=None),"
-                "which depends on your current default dtype.");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred."
+            "Defaults to float64 or float32 if not defined (dtype=None),"
+            "which depends on your current default dtype.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream shape_s, scale_s, dtype_s, size_s;
@@ -80,25 +81,23 @@ struct NumpyGammaParam : public dmlc::Parameter<NumpyGammaParam> {
     (*dict)["shape"] = shape_s.str();
     (*dict)["scale"] = scale_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
-
 namespace mxnet_op {
 
 template <typename IType, typename FType>
-MSHADOW_XINLINE void GammaTransform(IType a, IType b,
-                                    FType* uniforms, FType* normals) {
+MSHADOW_XINLINE void GammaTransform(IType a, IType b, FType* uniforms, FType* normals) {
   FType d = a < 1 ? a + 2.0 / 3.0 : a - 1.0 / 3.0;
   FType k = sqrt(9.0 * d);
   FType c = 1.0 / k;
   for (size_t i = 0; i < M - 1; i++) {
-    FType u = uniforms[i];
-    FType n = normals[i];
+    FType u     = uniforms[i];
+    FType n     = normals[i];
     uniforms[i] = FType(-1);
-    FType ocn = 1+c*n;
-    FType v = ocn*ocn*ocn;
+    FType ocn   = 1 + c * n;
+    FType v     = ocn * ocn * ocn;
     if (v > 0) {
       if (u <= (1 - 0.0331 * (n * n) * (n * n))) {
         // rejection sample. The second operation should be
@@ -114,7 +113,6 @@ MSHADOW_XINLINE void GammaTransform(IType a, IType b,
   }
 }
 
-
 template <typename IType, typename FType>
 MSHADOW_XINLINE FType GammaReduce(IType a, FType* uniforms) {
   FType u2 = uniforms[M - 1];
@@ -127,7 +125,7 @@ MSHADOW_XINLINE FType GammaReduce(IType a, FType* uniforms) {
   return -1;
 }
 
-template<typename OType, typename FType>
+template <typename OType, typename FType>
 struct CheckSuccessKernel {
   MSHADOW_XINLINE static void Map(int i, OType* out, FType* flag) {
     if (out[i] < 0) {
@@ -136,7 +134,7 @@ struct CheckSuccessKernel {
   }
 };
 
-template<typename DType>
+template <typename DType>
 struct StandarizeKernel {
   MSHADOW_XINLINE static void Map(int i, DType* samples, float scale) {
     samples[i] /= scale;
@@ -145,51 +143,61 @@ struct StandarizeKernel {
 
 template <int ndim, typename IType, typename OType, typename FType>
 struct gamma_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, const Shape<ndim> &lstride,
-                                  const Shape<ndim> &hstride,
-                                  const Shape<ndim> &oshape, IType *shape,
-                                  IType *scale, FType *uniforms, FType *normals,
-                                  OType *out, FType *flag, bool resample) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& hstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* shape,
+                                  IType* scale,
+                                  FType* uniforms,
+                                  FType* normals,
+                                  OType* out,
+                                  FType* flag,
+                                  bool resample) {
     // We know the sampling procedure is in its first stage, if `flag` is
     // nullptr, i.e. there is no need for reseting the indicator
     // variable(flag[0] = 1) nor checking whether a specific element is sampled
     // successfully (out[i] < 0).
     bool in_first_stage = !resample;
-    Shape<ndim> coord = unravel(i, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto hidx = static_cast<index_t>(dot(coord, hstride));
-    IType shape_value = shape[lidx];
-    IType scale_value = scale[hidx];
+    Shape<ndim> coord   = unravel(i, oshape);
+    auto lidx           = static_cast<index_t>(dot(coord, lstride));
+    auto hidx           = static_cast<index_t>(dot(coord, hstride));
+    IType shape_value   = shape[lidx];
+    IType scale_value   = scale[hidx];
     if ((shape_value <= 0) || (scale_value <= 0)) {
       flag[0] = -1;
     }
     if (in_first_stage || out[i] < 0) {
       // map phase
-      GammaTransform<IType, FType>(shape_value, scale_value, uniforms + i * M,
-                                   normals + i * M);
+      GammaTransform<IType, FType>(shape_value, scale_value, uniforms + i * M, normals + i * M);
       // reduce phase
-      OType sample =
-          (OType)GammaReduce<IType, FType>(shape_value, uniforms + i * M);
-      out[i] = sample;
+      OType sample = (OType)GammaReduce<IType, FType>(shape_value, uniforms + i * M);
+      out[i]       = sample;
     }
   }
 };
 
 template <int ndim, typename IType, typename OType, typename FType>
 struct gamma_one_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, int scalar_pos,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape, IType *array,
-                                  float scalar, FType *uniforms, FType *normals,
-                                  OType *out, FType *flag, bool resample) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int scalar_pos,
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* array,
+                                  float scalar,
+                                  FType* uniforms,
+                                  FType* normals,
+                                  OType* out,
+                                  FType* flag,
+                                  bool resample) {
     // We know the sampling procedure is in its first stage, if `resample` is
     // false, i.e. there is no need for reseting the indicator
     // variable(flag[0] = 1) nor checking whether a specific element is sampled
     // successfully (out[i] < 0). Instead, we would check if `array` is strictly
     // larger than zero.
     bool in_first_stage = !resample;
-    Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
+    Shape<ndim> coord   = unravel(i, oshape);
+    auto idx            = static_cast<index_t>(dot(coord, stride));
     IType shape_value;
     IType scale_value;
     if (scalar_pos == 0) {
@@ -209,22 +217,23 @@ struct gamma_one_scalar_kernel {
     }
     if (in_first_stage || out[i] < 0) {
       // map phase
-      GammaTransform<IType, FType>(shape_value, scale_value, uniforms + i * M,
-                                   normals + i * M);
+      GammaTransform<IType, FType>(shape_value, scale_value, uniforms + i * M, normals + i * M);
       // reduce phase
-      OType sample =
-          (OType)GammaReduce<IType, FType>(shape_value, uniforms + i * M);
-      out[i] = sample;
+      OType sample = (OType)GammaReduce<IType, FType>(shape_value, uniforms + i * M);
+      out[i]       = sample;
     }
   }
 };
 
 template <typename OType, typename FType>
 struct gamma_two_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float shape_value,
-                                  float scale_value, FType *uniforms_origin,
-                                  FType *normals_origin, OType *out,
-                                  FType *flag = nullptr) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  float shape_value,
+                                  float scale_value,
+                                  FType* uniforms_origin,
+                                  FType* normals_origin,
+                                  OType* out,
+                                  FType* flag = nullptr) {
     // We know the sampling procedure is in its first stage, if `flag` is
     // nullptr, i.e. there is no need for reseting the indicator
     // variable(flag[0] = 1) nor checking whether a specific element is sampled
@@ -233,43 +242,44 @@ struct gamma_two_scalar_kernel {
     if (!in_first_stage) {
       flag[0] = 1;
     }
-    FType *uniforms = uniforms_origin + i * M;
-    FType *normals = normals_origin + i * M;
+    FType* uniforms = uniforms_origin + i * M;
+    FType* normals  = normals_origin + i * M;
     if (in_first_stage || out[i] < 0) {
       // map phase
       GammaTransform<float, FType>(shape_value, scale_value, uniforms, normals);
       // reduce phase
       OType sample = (OType)GammaReduce<float, FType>(shape_value, uniforms);
-      out[i] = sample;
+      out[i]       = sample;
     }
   }
 };
 }  // namespace mxnet_op
 
 template <typename xpu, typename FType>
-void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+void NumpyGammaForward(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyGammaParam &param = nnvm::get<NumpyGammaParam>(attrs.parsed);
+  const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
   CHECK_EQ(outputs.size(), 1);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // Generate base random number.
-  Random<xpu, FType> *prnd = ctx.requested[0].get_random<xpu, FType>(s);
-  index_t output_len = outputs[0].Size();
+  Random<xpu, FType>* prnd = ctx.requested[0].get_random<xpu, FType>(s);
+  index_t output_len       = outputs[0].Size();
   Tensor<xpu, 1, FType> random_tensor =
       ctx.requested[1].get_space_typed<xpu, 1, FType>(Shape1(output_len * 2 * M + 1), s);
   Tensor<xpu, 1, FType> uniform_tensor = random_tensor.Slice(0, output_len * M);
-  Tensor<xpu, 1, FType> normal_tensor = random_tensor.Slice(output_len * M, output_len * 2 * M);
+  Tensor<xpu, 1, FType> normal_tensor  = random_tensor.Slice(output_len * M, output_len * 2 * M);
   prnd->SampleUniform(&uniform_tensor, 0, 1);
   prnd->SampleGaussian(&normal_tensor, 0, 1);
   mxnet::TShape new_lshape, new_hshape, new_oshape;
   FType failure_indicator = 1.0;
   Tensor<xpu, 1, FType> failure_indic_workspace =
       random_tensor.Slice(output_len * 2 * M, output_len * 2 * M + 1);
-  FType *failure_indicator_device = failure_indic_workspace.dptr_;
+  FType* failure_indicator_device = failure_indic_workspace.dptr_;
   // [scalar scalar] case
   if (inputs.size() == 0U) {
     if (param.shape.value() <= 0) {
@@ -286,31 +296,39 @@ void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
           prnd->SampleGaussian(&normal_tensor, 0, 1);
         }
         Kernel<gamma_two_scalar_kernel<OType, FType>, xpu>::Launch(
-          s, outputs[0].Size(), param.shape.value(), param.scale.value(),
-          uniform_tensor.dptr_, normal_tensor.dptr_, outputs[0].dptr<OType>(),
-          in_resample_stage ? failure_indicator_device : nullptr);
+            s,
+            outputs[0].Size(),
+            param.shape.value(),
+            param.scale.value(),
+            uniform_tensor.dptr_,
+            normal_tensor.dptr_,
+            outputs[0].dptr<OType>(),
+            in_resample_stage ? failure_indicator_device : nullptr);
         failure_indicator = 1.0;
         Kernel<CheckSuccessKernel<OType, FType>, xpu>::Launch(
-          s, outputs[0].Size(), outputs[0].dptr<OType>(),
-          failure_indicator_device);
+            s, outputs[0].Size(), outputs[0].dptr<OType>(), failure_indicator_device);
         _copy<xpu>(s, &failure_indicator, failure_indicator_device);
         in_resample_stage = true;
       } while (failure_indicator < 0);
     });
   } else if (inputs.size() == 1U) {
     // [scalar tensor], [tensor scalar] case
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     int scalar_pos;
     float scalar_value;
     if (param.shape.has_value()) {
-      scalar_pos = 0;
+      scalar_pos   = 0;
       scalar_value = param.shape.value();
       if (scalar_value <= 0) {
         LOG(FATAL) << "ValueError: expect shape > 0";
       }
     } else {
-      scalar_pos = 1;
+      scalar_pos   = 1;
       scalar_value = param.scale.value();
       if (scalar_value <= 0) {
         LOG(FATAL) << "ValueError: expect scale > 0";
@@ -321,7 +339,7 @@ void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
           mshadow::Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          bool in_resample_stage = false;
+          bool in_resample_stage      = false;
           do {
             if (in_resample_stage) {
               prnd->SampleUniform(&uniform_tensor, 0, 1);
@@ -329,11 +347,18 @@ void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
             }
             Kernel<set_one, xpu>::Launch(s, 1, failure_indicator_device);
             Kernel<gamma_one_scalar_kernel<NDim, IType, OType, FType>, xpu>::Launch(
-              s, outputs[0].Size(), scalar_pos, stride, oshape,
-              inputs[0].dptr<IType>(), scalar_value,
-              uniform_tensor.dptr_, normal_tensor.dptr_,
-              outputs[0].dptr<OType>(),
-              failure_indicator_device, in_resample_stage);
+                s,
+                outputs[0].Size(),
+                scalar_pos,
+                stride,
+                oshape,
+                inputs[0].dptr<IType>(),
+                scalar_value,
+                uniform_tensor.dptr_,
+                normal_tensor.dptr_,
+                outputs[0].dptr<OType>(),
+                failure_indicator_device,
+                in_resample_stage);
             // We reuse `failure_indicator` for parameter check.
             failure_indicator = 1.0;
             if (!in_resample_stage) {
@@ -351,8 +376,7 @@ void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
             }
             failure_indicator = 1.0;
             Kernel<CheckSuccessKernel<OType, FType>, xpu>::Launch(
-              s, outputs[0].Size(), outputs[0].dptr<OType>(),
-              failure_indicator_device);
+                s, outputs[0].Size(), outputs[0].dptr<OType>(), failure_indicator_device);
             _copy<xpu>(s, &failure_indicator, failure_indicator_device);
             in_resample_stage = true;
           } while (failure_indicator < 0);
@@ -361,39 +385,49 @@ void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
     });
   } else if (inputs.size() == 2U) {
     // [tensor tensor] case
-    int ndim = FillShape(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                         &new_lshape, &new_hshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[1].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_hshape,
+                         &new_oshape);
     MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
-        mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
-        mshadow::Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
-        mshadow::Shape<NDim> hstride = calc_stride(new_hshape.get<NDim>());
-        bool in_resample_stage = false;
-        do {
-          if (in_resample_stage) {
-            prnd->SampleUniform(&uniform_tensor, 0, 1);
-            prnd->SampleGaussian(&normal_tensor, 0, 1);
-          }
-          Kernel<set_one, xpu>::Launch(s, 1, failure_indicator_device);
-          failure_indicator = 1.0;
-          Kernel<gamma_kernel<NDim, IType, OType, FType>, xpu>::Launch(
-            s, outputs[0].Size(), lstride, hstride, oshape,
-            inputs[0].dptr<IType>(), inputs[1].dptr<IType>(),
-            uniform_tensor.dptr_, normal_tensor.dptr_,
-            outputs[0].dptr<OType>(), failure_indicator_device, in_resample_stage);
-          if (!in_resample_stage) {
-            _copy<xpu>(s, &failure_indicator, failure_indicator_device);
-            if (failure_indicator < 0) {
-              LOG(FATAL) << "ValueError: expect shape and value > 0";
+          mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
+          mshadow::Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
+          mshadow::Shape<NDim> hstride = calc_stride(new_hshape.get<NDim>());
+          bool in_resample_stage       = false;
+          do {
+            if (in_resample_stage) {
+              prnd->SampleUniform(&uniform_tensor, 0, 1);
+              prnd->SampleGaussian(&normal_tensor, 0, 1);
             }
-          }
-          failure_indicator = 1.0;
-          Kernel<CheckSuccessKernel<OType, FType>, xpu>::Launch(
-            s, outputs[0].Size(), outputs[0].dptr<OType>(),
-            failure_indicator_device);
-          _copy<xpu>(s, &failure_indicator, failure_indicator_device);
-          in_resample_stage = true;
+            Kernel<set_one, xpu>::Launch(s, 1, failure_indicator_device);
+            failure_indicator = 1.0;
+            Kernel<gamma_kernel<NDim, IType, OType, FType>, xpu>::Launch(s,
+                                                                         outputs[0].Size(),
+                                                                         lstride,
+                                                                         hstride,
+                                                                         oshape,
+                                                                         inputs[0].dptr<IType>(),
+                                                                         inputs[1].dptr<IType>(),
+                                                                         uniform_tensor.dptr_,
+                                                                         normal_tensor.dptr_,
+                                                                         outputs[0].dptr<OType>(),
+                                                                         failure_indicator_device,
+                                                                         in_resample_stage);
+            if (!in_resample_stage) {
+              _copy<xpu>(s, &failure_indicator, failure_indicator_device);
+              if (failure_indicator < 0) {
+                LOG(FATAL) << "ValueError: expect shape and value > 0";
+              }
+            }
+            failure_indicator = 1.0;
+            Kernel<CheckSuccessKernel<OType, FType>, xpu>::Launch(
+                s, outputs[0].Size(), outputs[0].dptr<OType>(), failure_indicator_device);
+            _copy<xpu>(s, &failure_indicator, failure_indicator_device);
+            in_resample_stage = true;
           } while (failure_indicator < 0);
         });
       });
@@ -401,49 +435,57 @@ void NumpyGammaForward(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
   }
 }
 
-template<typename xpu, int ndim, typename DType>
+template <typename xpu, int ndim, typename DType>
 inline void GammaReparamBackwardImpl(const OpContext& ctx,
-                                            const std::vector<TBlob>& inputs,
-                                            const std::vector<OpReqType>& req,
-                                            const std::vector<TBlob>& outputs,
-                                            const mxnet::TShape& new_ishape,
-                                            const mxnet::TShape& new_oshape,
-                                            const float scale) {
+                                     const std::vector<TBlob>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<TBlob>& outputs,
+                                     const mxnet::TShape& new_ishape,
+                                     const mxnet::TShape& new_oshape,
+                                     const float scale) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace broadcast;
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob igrad = outputs[0].reshape(new_ishape);
   // inputs: [grad_from_samples, alpha_tensor, samples]
-  const TBlob ograd = inputs[0].reshape(new_oshape);
-  const TBlob alpha = inputs[1].reshape(new_ishape);
-  TBlob samples = inputs[2].reshape(new_oshape);
-  size_t workspace_size =
-      ReduceWorkspaceSize(s, igrad.shape_, req[0], ograd.shape_);
+  const TBlob ograd     = inputs[0].reshape(new_oshape);
+  const TBlob alpha     = inputs[1].reshape(new_ishape);
+  TBlob samples         = inputs[2].reshape(new_oshape);
+  size_t workspace_size = ReduceWorkspaceSize(s, igrad.shape_, req[0], ograd.shape_);
   // Convert samples to standard gamma
   Kernel<op_with_req<mshadow_op::div, kWriteTo>, xpu>::Launch(
-    s, samples.Size(), samples.dptr<DType>(), samples.dptr<DType>(), DType(scale));
+      s, samples.Size(), samples.dptr<DType>(), samples.dptr<DType>(), DType(scale));
   Tensor<xpu, 1, char> workspace =
       ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
 #if !defined(__CUDACC__)
   Reduce<red::sum, ndim, DType, op::mshadow_op::mul, op::mshadow_op::gamma_implicit_grad>(
       s, igrad, req[0], workspace, ograd, alpha, samples);
 #else
-  RTCReduce(ctx, igrad, req[0], workspace, ograd, alpha, samples, "red::sum{}", ndim,
-            "mul", "gamma_implicit_grad");
+  RTCReduce(ctx,
+            igrad,
+            req[0],
+            workspace,
+            ograd,
+            alpha,
+            samples,
+            "red::sum{}",
+            ndim,
+            "mul",
+            "gamma_implicit_grad");
 #endif
   Kernel<op_with_req<mshadow_op::mul, kWriteTo>, xpu>::Launch(
-    s, igrad.Size(), igrad.dptr<DType>(), igrad.dptr<DType>(), DType(scale));
+      s, igrad.Size(), igrad.dptr<DType>(), igrad.dptr<DType>(), DType(scale));
   // Convert samples back, otherwise the output would be corrupted.
   Kernel<op_with_req<mshadow_op::mul, kWriteTo>, xpu>::Launch(
-    s, samples.Size(), samples.dptr<DType>(), samples.dptr<DType>(), DType(scale));
+      s, samples.Size(), samples.dptr<DType>(), samples.dptr<DType>(), DType(scale));
 }
 
 // Allow gamma sampling to be differentiable,
 // using implicit reparameterization gradient:
 // -(d/d\alpha cdf(x;alpha)) / pdf(x;alpha)
-template<typename xpu>
+template <typename xpu>
 void NumpyGammaGrad(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -457,7 +499,7 @@ void NumpyGammaGrad(const nnvm::NodeAttrs& attrs,
   if (outputs.size() == 0U) {
     return;
   }
-  const NumpyGammaParam &param = nnvm::get<NumpyGammaParam>(attrs.parsed);
+  const NumpyGammaParam& param = nnvm::get<NumpyGammaParam>(attrs.parsed);
   // [tensor tensor] case, not supported.
   if (inputs.size() == 5U) {
     LOG(FATAL) << "ValueError: two tensor case not supported";
@@ -469,13 +511,17 @@ void NumpyGammaGrad(const nnvm::NodeAttrs& attrs,
       LOG(FATAL) << "ValueError: tensor scale case not supported";
     }
     mxnet::TShape new_ishape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                         &new_ishape, &new_ishape, &new_oshape);
+    int ndim   = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
     auto scale = param.scale.value();
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         GammaReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_ishape, new_oshape, scale);
+            ctx, inputs, req, outputs, new_ishape, new_oshape, scale);
       });
     });
   }
diff --git a/src/operator/numpy/random/np_laplace_op.cc b/src/operator/numpy/random/np_laplace_op.cc
index 9d147aca7009..63aee8287260 100644
--- a/src/operator/numpy/random/np_laplace_op.cc
+++ b/src/operator/numpy/random/np_laplace_op.cc
@@ -30,40 +30,45 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyLaplaceParam);
 
 NNVM_REGISTER_OP(_npi_laplace)
-.describe("numpy behavior Laplace")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyLaplaceParam& param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyLaplaceParam& param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    if (num_inputs == 0) return std::vector<std::string>();
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    return std::vector<std::string>{"input1", "input2"};
-  })
-.set_attr_parser(ParamParser<NumpyLaplaceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyLaplaceParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyLaplaceOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyLaplaceForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyLaplaceParam::__FIELDS__());
+    .describe("numpy behavior Laplace")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyLaplaceParam& param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
+      int num_inputs                 = 2;
+      if (param.loc.has_value())
+        num_inputs -= 1;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyLaplaceParam& param =
+                                           nnvm::get<NumpyLaplaceParam>(attrs.parsed);
+                                       int num_inputs = 2;
+                                       if (param.loc.has_value())
+                                         num_inputs -= 1;
+                                       if (param.scale.has_value())
+                                         num_inputs -= 1;
+                                       if (num_inputs == 0)
+                                         return std::vector<std::string>();
+                                       if (num_inputs == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyLaplaceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyLaplaceParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyLaplaceOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyLaplaceForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyLaplaceParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_laplace_op.cu b/src/operator/numpy/random/np_laplace_op.cu
index 2b199e4f01d3..2a6ef598bef6 100644
--- a/src/operator/numpy/random/np_laplace_op.cu
+++ b/src/operator/numpy/random/np_laplace_op.cu
@@ -28,8 +28,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_laplace)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLaplaceForward<gpu>);
+NNVM_REGISTER_OP(_npi_laplace).set_attr<FCompute>("FCompute<gpu>", NumpyLaplaceForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_laplace_op.h b/src/operator/numpy/random/np_laplace_op.h
index cdec42989621..b3c97f90b5b8 100644
--- a/src/operator/numpy/random/np_laplace_op.h
+++ b/src/operator/numpy/random/np_laplace_op.h
@@ -49,7 +49,7 @@ struct NumpyLaplaceParam : public dmlc::Parameter<NumpyLaplaceParam> {
     DMLC_DECLARE_FIELD(loc);
     DMLC_DECLARE_FIELD(scale);
     DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
         .describe(
             "Output shape. If the given shape is, "
             "e.g., (m, n, k), then m * n * k samples are drawn. "
@@ -73,20 +73,20 @@ struct NumpyLaplaceParam : public dmlc::Parameter<NumpyLaplaceParam> {
     scale_s << scale;
     size_s << size;
     dtype_s << dtype;
-    (*dict)["loc"] = loc_s.str();
+    (*dict)["loc"]   = loc_s.str();
     (*dict)["scale"] = scale_s.str();
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
     // We do not set ctx, because ctx has been set in dict instead of InitOpParam.
     // Setting ctx here results in an error.
   }
 };
 
-inline bool NumpyLaplaceOpType(const nnvm::NodeAttrs &attrs,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
-  const NumpyLaplaceParam &param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
-  int otype = param.dtype;
+inline bool NumpyLaplaceOpType(const nnvm::NodeAttrs& attrs,
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
+  const NumpyLaplaceParam& param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
+  int otype                      = param.dtype;
   if (otype != -1) {
     (*out_attrs)[0] = otype;
   } else {
@@ -98,14 +98,18 @@ inline bool NumpyLaplaceOpType(const nnvm::NodeAttrs &attrs,
 namespace mxnet_op {
 template <int ndim, typename IType, typename OType>
 struct laplace_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, const Shape<ndim> &lstride,
-                                  const Shape<ndim> &hstride,
-                                  const Shape<ndim> &oshape, IType *loc,
-                                  IType *scale, float *uniforms, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& hstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* loc,
+                                  IType* scale,
+                                  float* uniforms,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto hidx = static_cast<index_t>(dot(coord, hstride));
-    IType loc_value = loc[lidx];
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto hidx         = static_cast<index_t>(dot(coord, hstride));
+    IType loc_value   = loc[lidx];
     IType scale_value = scale[hidx];
     if (uniforms[i] < 0.5) {
       out[i] = loc_value + scale_value * log(2 * uniforms[i]);
@@ -117,19 +121,23 @@ struct laplace_kernel {
 
 template <int ndim, typename IType, typename OType>
 struct laplace_one_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, int scalar_pos,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape, IType *array,
-                                  float scalar, float *uniforms, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int scalar_pos,
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* array,
+                                  float scalar,
+                                  float* uniforms,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
     IType loc_value;
     IType scale_value;
     if (scalar_pos == 0) {
-      loc_value = scalar;
+      loc_value   = scalar;
       scale_value = array[idx];
     } else {
-      loc_value = array[idx];
+      loc_value   = array[idx];
       scale_value = scalar;
     }
     if (uniforms[i] < 0.5) {
@@ -142,8 +150,7 @@ struct laplace_one_scalar_kernel {
 
 template <typename OType>
 struct laplace_two_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale,
-                                  float *uniforms, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale, float* uniforms, OType* out) {
     if (uniforms[i] < 0.5) {
       out[i] = loc + scale * log(2 * uniforms[i]);
     } else {
@@ -154,43 +161,49 @@ struct laplace_two_scalar_kernel {
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyLaplaceForward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyLaplaceForward(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyLaplaceParam &param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
+  const NumpyLaplaceParam& param = nnvm::get<NumpyLaplaceParam>(attrs.parsed);
   CHECK_EQ(outputs.size(), 1);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   // Generate base random number.
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
+  Random<xpu, float>* prnd = ctx.requested[0].get_random<xpu, float>(s);
   Tensor<xpu, 1, float> laplace_tensor =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(outputs[0].Size()),
-                                                      s);
+      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(outputs[0].Size()), s);
   prnd->SampleUniform(&laplace_tensor, 0, 1);
   mxnet::TShape new_lshape, new_hshape, new_oshape;
 
   // [scalar scalar] case
   if (inputs.size() == 0U) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      Kernel<laplace_two_scalar_kernel<OType>, xpu>::Launch(
-          s, outputs[0].Size(), param.loc.value(), param.scale.value(),
-          laplace_tensor.dptr_, outputs[0].dptr<OType>());
+      Kernel<laplace_two_scalar_kernel<OType>, xpu>::Launch(s,
+                                                            outputs[0].Size(),
+                                                            param.loc.value(),
+                                                            param.scale.value(),
+                                                            laplace_tensor.dptr_,
+                                                            outputs[0].dptr<OType>());
     });
   } else if (inputs.size() == 1U) {
     // [scalar tensor], [tensor scalar] case
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     int scalar_pos;
     float scalar_value;
     if (param.loc.has_value()) {
-      scalar_pos = 0;
+      scalar_pos   = 0;
       scalar_value = param.loc.value();
     } else {
-      scalar_pos = 1;
+      scalar_pos   = 1;
       scalar_value = param.scale.value();
     }
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
@@ -199,26 +212,41 @@ void NumpyLaplaceForward(const nnvm::NodeAttrs &attrs,
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
           Kernel<laplace_one_scalar_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), scalar_pos, stride, oshape,
-              inputs[0].dptr<IType>(), scalar_value, laplace_tensor.dptr_,
+              s,
+              outputs[0].Size(),
+              scalar_pos,
+              stride,
+              oshape,
+              inputs[0].dptr<IType>(),
+              scalar_value,
+              laplace_tensor.dptr_,
               outputs[0].dptr<OType>());
         });
       });
     });
   } else if (inputs.size() == 2U) {
     // [tensor tensor] case
-    int ndim = FillShape(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                         &new_lshape, &new_hshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[1].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_hshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
-          Shape<NDim> oshape = new_oshape.get<NDim>();
+          Shape<NDim> oshape  = new_oshape.get<NDim>();
           Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
           Shape<NDim> hstride = calc_stride(new_hshape.get<NDim>());
-          Kernel<laplace_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), lstride, hstride, oshape,
-              inputs[0].dptr<IType>(), inputs[1].dptr<IType>(),
-              laplace_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<laplace_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                  outputs[0].Size(),
+                                                                  lstride,
+                                                                  hstride,
+                                                                  oshape,
+                                                                  inputs[0].dptr<IType>(),
+                                                                  inputs[1].dptr<IType>(),
+                                                                  laplace_tensor.dptr_,
+                                                                  outputs[0].dptr<OType>());
         });
       });
     });
diff --git a/src/operator/numpy/random/np_location_scale_op.cc b/src/operator/numpy/random/np_location_scale_op.cc
index 69995b38e437..3f95de9b88b5 100644
--- a/src/operator/numpy/random/np_location_scale_op.cc
+++ b/src/operator/numpy/random/np_location_scale_op.cc
@@ -30,18 +30,22 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyLocationScaleParam);
 
 MXNET_OPERATOR_REGISTER_LOCATION_SCALE(_npi_logistic)
-.set_attr<FCompute>("FCompute<cpu>", NumpyLocationScaleForward<cpu,
-                    mxnet_op::logistic_two_scalar_kernel, mxnet_op::logistic_one_scalar_kernel,
-                    mxnet_op::logistic_kernel>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_logistic"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyLocationScaleForward<cpu,
+                                                  mxnet_op::logistic_two_scalar_kernel,
+                                                  mxnet_op::logistic_one_scalar_kernel,
+                                                  mxnet_op::logistic_kernel>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_logistic"});
 
 MXNET_OPERATOR_REGISTER_LOCATION_SCALE_BACKWARD(_backward_broadcast_logistic)
 
 MXNET_OPERATOR_REGISTER_LOCATION_SCALE(_npi_gumbel)
-.set_attr<FCompute>("FCompute<cpu>", NumpyLocationScaleForward<cpu,
-                    mxnet_op::gumbel_two_scalar_kernel, mxnet_op::gumbel_one_scalar_kernel,
-                    mxnet_op::gumbel_kernel>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_gumbel"});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        NumpyLocationScaleForward<cpu,
+                                                  mxnet_op::gumbel_two_scalar_kernel,
+                                                  mxnet_op::gumbel_one_scalar_kernel,
+                                                  mxnet_op::gumbel_kernel>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_gumbel"});
 
 MXNET_OPERATOR_REGISTER_LOCATION_SCALE_BACKWARD(_backward_broadcast_gumbel)
 
diff --git a/src/operator/numpy/random/np_location_scale_op.cu b/src/operator/numpy/random/np_location_scale_op.cu
index e4d8ca4c54ed..095042d3f1ed 100644
--- a/src/operator/numpy/random/np_location_scale_op.cu
+++ b/src/operator/numpy/random/np_location_scale_op.cu
@@ -29,20 +29,24 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_npi_logistic)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLocationScaleForward<gpu,
-                    mxnet_op::logistic_two_scalar_kernel, mxnet_op::logistic_one_scalar_kernel,
-                    mxnet_op::logistic_kernel>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        NumpyLocationScaleForward<gpu,
+                                                  mxnet_op::logistic_two_scalar_kernel,
+                                                  mxnet_op::logistic_one_scalar_kernel,
+                                                  mxnet_op::logistic_kernel>);
 
 NNVM_REGISTER_OP(_backward_broadcast_logistic)
-.set_attr<FCompute>("FCompute<gpu>", LocationScaleReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", LocationScaleReparamBackward<gpu>);
 
 NNVM_REGISTER_OP(_npi_gumbel)
-.set_attr<FCompute>("FCompute<gpu>", NumpyLocationScaleForward<gpu,
-                    mxnet_op::gumbel_two_scalar_kernel, mxnet_op::gumbel_one_scalar_kernel,
-                    mxnet_op::gumbel_kernel>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        NumpyLocationScaleForward<gpu,
+                                                  mxnet_op::gumbel_two_scalar_kernel,
+                                                  mxnet_op::gumbel_one_scalar_kernel,
+                                                  mxnet_op::gumbel_kernel>);
 
 NNVM_REGISTER_OP(_backward_broadcast_gumbel)
-.set_attr<FCompute>("FCompute<gpu>", LocationScaleReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", LocationScaleReparamBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_location_scale_op.h b/src/operator/numpy/random/np_location_scale_op.h
index 0179a572bf3f..719db886391e 100644
--- a/src/operator/numpy/random/np_location_scale_op.h
+++ b/src/operator/numpy/random/np_location_scale_op.h
@@ -51,29 +51,29 @@ struct NumpyLocationScaleParam : public dmlc::Parameter<NumpyLocationScaleParam>
     DMLC_DECLARE_FIELD(loc);
     DMLC_DECLARE_FIELD(scale);
     DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe(
-          "Output shape. If the given shape is, "
-          "e.g., (m, n, k), then m * n * k samples are drawn. "
-          "Default is None, in which case a single value is returned.");
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
     DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
         "Context of output, in format [cpu|gpu|cpu_pinned](n)."
         " Only used for imperative calls.");
   }
-    void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
+  void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream loc_s, scale_s, size_s;
     loc_s << loc;
     scale_s << scale;
     size_s << size;
-    (*dict)["loc"] = loc_s.str();
+    (*dict)["loc"]   = loc_s.str();
     (*dict)["scale"] = scale_s.str();
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
-inline bool NumpyLocationScaleOpType(const nnvm::NodeAttrs &attrs,
-                                     std::vector<int> *in_attrs,
-                                     std::vector<int> *out_attrs) {
+inline bool NumpyLocationScaleOpType(const nnvm::NodeAttrs& attrs,
+                                     std::vector<int>* in_attrs,
+                                     std::vector<int>* out_attrs) {
   (*out_attrs)[0] = mshadow::kFloat32;
   (*out_attrs)[1] = mshadow::kFloat32;
   return true;
@@ -83,26 +83,23 @@ namespace mxnet_op {
 
 struct logistic_two_scalar_kernel {
   template <typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale,
-                                  float *noise, DType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale, float* noise, DType* out) {
     noise[i] = log(noise[i]) - log(1 - noise[i]);
-    out[i] = loc + noise[i] * scale;
+    out[i]   = loc + noise[i] * scale;
   }
 };
 
 struct gumbel_two_scalar_kernel {
   template <typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale,
-                                  float *noise, DType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale, float* noise, DType* out) {
     noise[i] = -log(-log(noise[i]));
-    out[i] = loc + noise[i] * scale;
+    out[i]   = loc + noise[i] * scale;
   }
 };
 
-
 template <typename IType>
 struct check_legal_scale_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *scalar, float* flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* scalar, float* flag) {
     if (scalar[i] < 0) {
       *flag = -1.0;
     }
@@ -111,101 +108,118 @@ struct check_legal_scale_kernel {
 
 struct logistic_one_scalar_kernel {
   template <int ndim, typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i, int scalar_pos,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape, IType *array,
-                                  float scalar, float *noise, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int scalar_pos,
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* array,
+                                  float scalar,
+                                  float* noise,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
     IType loc_value;
     IType scale_value;
     if (scalar_pos == 0) {
-      loc_value = scalar;
+      loc_value   = scalar;
       scale_value = array[idx];
     } else {
-      loc_value = array[idx];
+      loc_value   = array[idx];
       scale_value = scalar;
     }
     noise[i] = log(noise[i]) - log(1 - noise[i]);
-    out[i] = loc_value + noise[i] * scale_value;
+    out[i]   = loc_value + noise[i] * scale_value;
   }
 };
 
 struct gumbel_one_scalar_kernel {
   template <int ndim, typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i, int scalar_pos,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape, IType *array,
-                                  float scalar, float *noise, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int scalar_pos,
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* array,
+                                  float scalar,
+                                  float* noise,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
     IType loc_value;
     IType scale_value;
     if (scalar_pos == 0) {
-      loc_value = scalar;
+      loc_value   = scalar;
       scale_value = array[idx];
     } else {
-      loc_value = array[idx];
+      loc_value   = array[idx];
       scale_value = scalar;
     }
     noise[i] = -log(-log(noise[i]));
-    out[i] = loc_value + noise[i] * scale_value;
+    out[i]   = loc_value + noise[i] * scale_value;
   }
 };
 
 struct logistic_kernel {
   template <int ndim, typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i, const Shape<ndim> &lstride,
-                                  const Shape<ndim> &hstride,
-                                  const Shape<ndim> &oshape, IType *loc,
-                                  IType *scale, float *noise, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& hstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* loc,
+                                  IType* scale,
+                                  float* noise,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto hidx = static_cast<index_t>(dot(coord, hstride));
-    IType loc_value = loc[lidx];
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto hidx         = static_cast<index_t>(dot(coord, hstride));
+    IType loc_value   = loc[lidx];
     IType scale_value = scale[hidx];
-    noise[i] = log(noise[i]) - log(1 - noise[i]);
-    out[i] = loc_value + noise[i] * scale_value;
+    noise[i]          = log(noise[i]) - log(1 - noise[i]);
+    out[i]            = loc_value + noise[i] * scale_value;
   }
 };
 
 struct gumbel_kernel {
   template <int ndim, typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i, const Shape<ndim> &lstride,
-                                  const Shape<ndim> &hstride,
-                                  const Shape<ndim> &oshape, IType *loc,
-                                  IType *scale, float *noise, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& hstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* loc,
+                                  IType* scale,
+                                  float* noise,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto hidx = static_cast<index_t>(dot(coord, hstride));
-    IType loc_value = loc[lidx];
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto hidx         = static_cast<index_t>(dot(coord, hstride));
+    IType loc_value   = loc[lidx];
     IType scale_value = scale[hidx];
-    noise[i] = -log(-log(noise[i]));
-    out[i] = loc_value + noise[i] * scale_value;
+    noise[i]          = -log(-log(noise[i]));
+    out[i]            = loc_value + noise[i] * scale_value;
   }
 };
 
 }  // namespace mxnet_op
 
-template <typename xpu, typename two_scalar_kernel, typename scalar_tensor_kernel,
+template <typename xpu,
+          typename two_scalar_kernel,
+          typename scalar_tensor_kernel,
           typename two_tensor_kernel>
-void NumpyLocationScaleForward(const nnvm::NodeAttrs &attrs,
-                               const OpContext &ctx,
-                               const std::vector<TBlob> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<TBlob> &outputs) {
+void NumpyLocationScaleForward(const nnvm::NodeAttrs& attrs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyLocationScaleParam &param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);
+  Stream<xpu>* s                       = ctx.get_stream<xpu>();
   // Generate base random number.
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-  Tensor<xpu, 1, float> workspace =
-    ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
-  Tensor<xpu, 1, float> uniform_tensor = outputs[1].FlatTo1D<xpu, float>(s);
+  Random<xpu, float>* prnd        = ctx.requested[0].get_random<xpu, float>(s);
+  Tensor<xpu, 1, float> workspace = ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
+  Tensor<xpu, 1, float> uniform_tensor   = outputs[1].FlatTo1D<xpu, float>(s);
   Tensor<xpu, 1, float> indicator_device = workspace;
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&uniform_tensor, 0.0, 1.0);
   mxnet::TShape new_lshape, new_hshape, new_oshape;
@@ -213,27 +227,34 @@ void NumpyLocationScaleForward(const nnvm::NodeAttrs &attrs,
   if (inputs.size() == 0U) {
     CHECK_GE(param.scale.value(), 0.0) << "ValueError: scale < 0";
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Kernel<two_scalar_kernel, xpu>::Launch(
-        s, outputs[0].Size(), param.loc.value(), param.scale.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<DType>());
+      Kernel<two_scalar_kernel, xpu>::Launch(s,
+                                             outputs[0].Size(),
+                                             param.loc.value(),
+                                             param.scale.value(),
+                                             uniform_tensor.dptr_,
+                                             outputs[0].dptr<DType>());
     });
   } else if (inputs.size() == 1U) {
     // [scalar tensor], [tensor scalar] case
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     int scalar_pos;
     float scalar_value;
     if (param.loc.has_value()) {
-      scalar_pos = 0;
+      scalar_pos   = 0;
       scalar_value = param.loc.value();
       MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
         Kernel<check_legal_scale_kernel<IType>, xpu>::Launch(
-          s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
+            s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
       });
       _copy<xpu>(s, &indicator_host, indicator_device_ptr);
       CHECK_GE(indicator_host, 0.0) << "ValueError: scale < 0";
     } else {
-      scalar_pos = 1;
+      scalar_pos   = 1;
       scalar_value = param.scale.value();
       CHECK_GE(scalar_value, 0.0) << "ValueError: scale < 0";
     }
@@ -242,10 +263,15 @@ void NumpyLocationScaleForward(const nnvm::NodeAttrs &attrs,
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<scalar_tensor_kernel, xpu>::Launch(
-            s, outputs[0].Size(), scalar_pos, stride, oshape,
-            inputs[0].dptr<IType>(), scalar_value, uniform_tensor.dptr_,
-            outputs[0].dptr<OType>());
+          Kernel<scalar_tensor_kernel, xpu>::Launch(s,
+                                                    outputs[0].Size(),
+                                                    scalar_pos,
+                                                    stride,
+                                                    oshape,
+                                                    inputs[0].dptr<IType>(),
+                                                    scalar_value,
+                                                    uniform_tensor.dptr_,
+                                                    outputs[0].dptr<OType>());
         });
       });
     });
@@ -253,22 +279,31 @@ void NumpyLocationScaleForward(const nnvm::NodeAttrs &attrs,
     // [tensor tensor] case
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       Kernel<check_legal_scale_kernel<IType>, xpu>::Launch(
-        s, inputs[1].Size(), inputs[1].dptr<IType>(), indicator_device_ptr);
+          s, inputs[1].Size(), inputs[1].dptr<IType>(), indicator_device_ptr);
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: scale < 0";
-    int ndim = FillShape(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                         &new_lshape, &new_hshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[1].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_hshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
-          Shape<NDim> oshape = new_oshape.get<NDim>();
+          Shape<NDim> oshape  = new_oshape.get<NDim>();
           Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
           Shape<NDim> hstride = calc_stride(new_hshape.get<NDim>());
-          Kernel<two_tensor_kernel, xpu>::Launch(
-            s, outputs[0].Size(), lstride, hstride, oshape,
-            inputs[0].dptr<IType>(), inputs[1].dptr<IType>(),
-            uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<two_tensor_kernel, xpu>::Launch(s,
+                                                 outputs[0].Size(),
+                                                 lstride,
+                                                 hstride,
+                                                 oshape,
+                                                 inputs[0].dptr<IType>(),
+                                                 inputs[1].dptr<IType>(),
+                                                 uniform_tensor.dptr_,
+                                                 outputs[0].dptr<OType>());
         });
       });
     });
@@ -279,7 +314,7 @@ void NumpyLocationScaleForward(const nnvm::NodeAttrs &attrs,
 // using reparameterization trick described in:
 // Auto-encoding variational bayes.
 // Kingma, D. P., & Welling, M. (2013).
-template<typename xpu>
+template <typename xpu>
 void LocationScaleReparamBackward(const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<TBlob>& inputs,
@@ -293,99 +328,114 @@ void LocationScaleReparamBackward(const nnvm::NodeAttrs& attrs,
   if (outputs.size() == 0U) {
     return;
   }
-  const auto &param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);
+  const auto& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);
   // [tensor tensor] case
   if (inputs.size() == 6U) {
     mxnet::TShape new_lshape, new_rshape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[1].shape_, inputs[0].shape_,
-                         &new_lshape, &new_rshape, &new_oshape);
+    int ndim = FillShape(outputs[0].shape_,
+                         outputs[1].shape_,
+                         inputs[0].shape_,
+                         &new_lshape,
+                         &new_rshape,
+                         &new_oshape);
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         CommonReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_lshape, new_rshape, new_oshape);
+            ctx, inputs, req, outputs, new_lshape, new_rshape, new_oshape);
       });
     });
   }
   // [tensor scalar], [scalar tensor] case
   if (inputs.size() == 5U) {
     mxnet::TShape new_ishape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                         &new_ishape, &new_ishape, &new_oshape);
+    int ndim           = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
     bool loc_is_tensor = !param.loc.has_value();
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_ishape, new_oshape, loc_is_tensor);
+            ctx, inputs, req, outputs, new_ishape, new_oshape, loc_is_tensor);
       });
     });
   }
 }
 
 /*! \brief Location Scale launch */
-#define MXNET_OPERATOR_REGISTER_LOCATION_SCALE(name)                                            \
-  NNVM_REGISTER_OP(name)                                                                        \
-  .set_num_inputs(                                                                              \
-    [](const nnvm::NodeAttrs& attrs) {                                                          \
-      const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);  \
-      int num_inputs = 2;                                                                       \
-      if (param.loc.has_value()) num_inputs -= 1;                                               \
-      if (param.scale.has_value()) num_inputs -= 1;                                             \
-      return num_inputs;                                                                        \
-    })                                                                                          \
-  .set_num_outputs(2)                                                                           \
-  .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",                                     \
-      [](const NodeAttrs& attrs) {                                                              \
-    return 1;                                                                                   \
-  })                                                                                            \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                           \
-    [](const NodeAttrs& attrs) {                                                                \
-      const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);  \
-      int num_inputs = 2;                                                                       \
-      if (param.loc.has_value()) num_inputs -= 1;                                               \
-      if (param.scale.has_value()) num_inputs -= 1;                                             \
-      if (num_inputs == 0) return std::vector<std::string>();                                   \
-      if (num_inputs == 1) return std::vector<std::string>{"input1"};                           \
-      return std::vector<std::string>{"input1", "input2"};                                      \
-    })                                                                                          \
-  .set_attr_parser(ParamParser<NumpyLocationScaleParam>)                                        \
-  .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyLocationScaleParam>)   \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyLocationScaleOpType)                           \
-  .set_attr<FResourceRequest>("FResourceRequest",                                               \
-    [](const nnvm::NodeAttrs& attrs) {                                                          \
-        return std::vector<ResourceRequest>{                                                    \
-          ResourceRequest::kRandom, ResourceRequest::kTempSpace};                               \
-    })                                                                                          \
-    .add_argument("input1", "NDArray-or-Symbol", "Source input")                                \
-    .add_argument("input2", "NDArray-or-Symbol", "Source input")                                \
-    .add_arguments(NumpyLocationScaleParam::__FIELDS__())                                       \
+#define MXNET_OPERATOR_REGISTER_LOCATION_SCALE(name)                                              \
+  NNVM_REGISTER_OP(name)                                                                          \
+      .set_num_inputs([](const nnvm::NodeAttrs& attrs) {                                          \
+        const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);  \
+        int num_inputs                       = 2;                                                 \
+        if (param.loc.has_value())                                                                \
+          num_inputs -= 1;                                                                        \
+        if (param.scale.has_value())                                                              \
+          num_inputs -= 1;                                                                        \
+        return num_inputs;                                                                        \
+      })                                                                                          \
+      .set_num_outputs(2)                                                                         \
+      .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",                                   \
+                                          [](const NodeAttrs& attrs) { return 1; })               \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         const NumpyLocationScaleParam& param =                   \
+                                             nnvm::get<NumpyLocationScaleParam>(attrs.parsed);    \
+                                         int num_inputs = 2;                                      \
+                                         if (param.loc.has_value())                               \
+                                           num_inputs -= 1;                                       \
+                                         if (param.scale.has_value())                             \
+                                           num_inputs -= 1;                                       \
+                                         if (num_inputs == 0)                                     \
+                                           return std::vector<std::string>();                     \
+                                         if (num_inputs == 1)                                     \
+                                           return std::vector<std::string>{"input1"};             \
+                                         return std::vector<std::string>{"input1", "input2"};     \
+                                       })                                                         \
+      .set_attr_parser(ParamParser<NumpyLocationScaleParam>)                                      \
+      .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyLocationScaleParam>) \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyLocationScaleOpType)                         \
+      .set_attr<FResourceRequest>("FResourceRequest",                                             \
+                                  [](const nnvm::NodeAttrs& attrs) {                              \
+                                    return std::vector<ResourceRequest>{                          \
+                                        ResourceRequest::kRandom, ResourceRequest::kTempSpace};   \
+                                  })                                                              \
+      .add_argument("input1", "NDArray-or-Symbol", "Source input")                                \
+      .add_argument("input2", "NDArray-or-Symbol", "Source input")                                \
+      .add_arguments(NumpyLocationScaleParam::__FIELDS__())
 
 /*! \brief Location Scale backward launch */
 #define MXNET_OPERATOR_REGISTER_LOCATION_SCALE_BACKWARD(name)                                    \
   NNVM_REGISTER_OP(name)                                                                         \
-  .set_attr<nnvm::TIsBackward>("TIsBackward", true)                                              \
-  .set_attr_parser(ParamParser<NumpyLocationScaleParam>)                                         \
-  .set_num_inputs(                                                                               \
-    [](const nnvm::NodeAttrs& attrs) {                                                           \
-      const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);   \
-      int num_inputs = 6;                                                                        \
-      if (param.loc.has_value()) num_inputs -= 1;                                                \
-      if (param.scale.has_value()) num_inputs -= 1;                                              \
-      return num_inputs;                                                                         \
-    })                                                                                           \
-  .set_num_outputs(                                                                              \
-    [](const nnvm::NodeAttrs& attrs) {                                                           \
-      const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed);   \
-      int num_outputs = 2;                                                                       \
-      if (param.loc.has_value()) num_outputs -= 1;                                               \
-      if (param.scale.has_value()) num_outputs -= 1;                                             \
-      return num_outputs;                                                                        \
-    })                                                                                           \
-  .set_attr<FResourceRequest>("FResourceRequest",                                                \
-    [](const NodeAttrs& attrs) {                                                                 \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};                          \
-    })                                                                                           \
-  .set_attr<FCompute>("FCompute<cpu>", LocationScaleReparamBackward<cpu>)                        \
-  .add_arguments(NumpyLocationScaleParam::__FIELDS__());                                         \
+      .set_attr<nnvm::TIsBackward>("TIsBackward", true)                                          \
+      .set_attr_parser(ParamParser<NumpyLocationScaleParam>)                                     \
+      .set_num_inputs([](const nnvm::NodeAttrs& attrs) {                                         \
+        const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed); \
+        int num_inputs                       = 6;                                                \
+        if (param.loc.has_value())                                                               \
+          num_inputs -= 1;                                                                       \
+        if (param.scale.has_value())                                                             \
+          num_inputs -= 1;                                                                       \
+        return num_inputs;                                                                       \
+      })                                                                                         \
+      .set_num_outputs([](const nnvm::NodeAttrs& attrs) {                                        \
+        const NumpyLocationScaleParam& param = nnvm::get<NumpyLocationScaleParam>(attrs.parsed); \
+        int num_outputs                      = 2;                                                \
+        if (param.loc.has_value())                                                               \
+          num_outputs -= 1;                                                                      \
+        if (param.scale.has_value())                                                             \
+          num_outputs -= 1;                                                                      \
+        return num_outputs;                                                                      \
+      })                                                                                         \
+      .set_attr<FResourceRequest>(                                                               \
+          "FResourceRequest",                                                                    \
+          [](const NodeAttrs& attrs) {                                                           \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};                    \
+          })                                                                                     \
+      .set_attr<FCompute>("FCompute<cpu>", LocationScaleReparamBackward<cpu>)                    \
+      .add_arguments(NumpyLocationScaleParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_multinomial_op.cc b/src/operator/numpy/random/np_multinomial_op.cc
index bf4f88c591cf..132ab9a8b9f8 100644
--- a/src/operator/numpy/random/np_multinomial_op.cc
+++ b/src/operator/numpy/random/np_multinomial_op.cc
@@ -30,32 +30,30 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyMultinomialParam);
 
 NNVM_REGISTER_OP(_npi_multinomial)
-.describe(R"code(Draw samples from a multinomial distribution. "
+    .describe(R"code(Draw samples from a multinomial distribution. "
 "The multinomial distribution is a multivariate generalisation of the binomial distribution. "
 "Take an experiment with one of p possible outcomes. "
 "An example of such an experiment is throwing a dice, where the outcome can be 1 through 6. "
 "Each sample drawn from the distribution represents n such experiments. "
 "Its values, X_i = [X_0, X_1, ..., X_p], represent the number of times the outcome was i.
 )code")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyMultinomialParam& param = nnvm::get<NumpyMultinomialParam>(attrs.parsed);
-    return param.pvals.has_value() ? 0U : 1U;
-  }
-)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyMultinomialParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NumpyMultinomialOpShape)
-.set_attr<nnvm::FInferType>("FInferType", NumpyMultinomialOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyMultinomialForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("a", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyMultinomialParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyMultinomialParam& param = nnvm::get<NumpyMultinomialParam>(attrs.parsed);
+      return param.pvals.has_value() ? 0U : 1U;
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyMultinomialParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NumpyMultinomialOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyMultinomialOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyMultinomialForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("a", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyMultinomialParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_multinomial_op.cu b/src/operator/numpy/random/np_multinomial_op.cu
index 132d67beeb6a..053eec592143 100644
--- a/src/operator/numpy/random/np_multinomial_op.cu
+++ b/src/operator/numpy/random/np_multinomial_op.cu
@@ -27,23 +27,22 @@
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 void CheckPvalGPU(const OpContext& ctx, DType* input, int prob_length) {
   std::vector<DType> pvals_(prob_length);
   cudaStream_t stream = mshadow::Stream<gpu>::GetStream(ctx.get_stream<gpu>());
-  CUDA_CALL(cudaMemcpyAsync(&pvals_[0], input, sizeof(DType) * prob_length,
-                            cudaMemcpyDeviceToHost, stream));
+  CUDA_CALL(cudaMemcpyAsync(
+      &pvals_[0], input, sizeof(DType) * prob_length, cudaMemcpyDeviceToHost, stream));
   CUDA_CALL(cudaStreamSynchronize(stream));
   DType sum = DType(0.0);
   for (int i = 0; i < prob_length; ++i) {
     sum += pvals_[i];
-    CHECK(sum <= DType(1.0 + 1e-12))
-      << "sum(pvals[:-1]) > 1.0";
+    CHECK(sum <= DType(1.0 + 1e-12)) << "sum(pvals[:-1]) > 1.0";
   }
 }
 
 NNVM_REGISTER_OP(_npi_multinomial)
-.set_attr<FCompute>("FCompute<gpu>", NumpyMultinomialForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NumpyMultinomialForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_multinomial_op.h b/src/operator/numpy/random/np_multinomial_op.h
index af1f58e54c5d..b9f8832ecc9f 100644
--- a/src/operator/numpy/random/np_multinomial_op.h
+++ b/src/operator/numpy/random/np_multinomial_op.h
@@ -41,35 +41,36 @@ struct NumpyMultinomialParam : public dmlc::Parameter<NumpyMultinomialParam> {
   dmlc::optional<mxnet::Tuple<double>> pvals;
   dmlc::optional<mxnet::Tuple<index_t>> size;
   DMLC_DECLARE_PARAMETER(NumpyMultinomialParam) {
-    DMLC_DECLARE_FIELD(n)
-      .describe("Number of experiments.");
+    DMLC_DECLARE_FIELD(n).describe("Number of experiments.");
     DMLC_DECLARE_FIELD(pvals)
-      .set_default(dmlc::optional<mxnet::Tuple<double>>())
-      .describe("Probabilities of each of the p different outcomes. "
-      "These should sum to 1 (however, the last element is always assumed to "
-      "account for the remaining probability, as long as sum(pvals[:-1]) <= 1)"
-      "Note that this is for internal usage only. "
-      "This operator will only have either input mx.ndarray or this list of pvals");
+        .set_default(dmlc::optional<mxnet::Tuple<double>>())
+        .describe(
+            "Probabilities of each of the p different outcomes. "
+            "These should sum to 1 (however, the last element is always assumed to "
+            "account for the remaining probability, as long as sum(pvals[:-1]) <= 1)"
+            "Note that this is for internal usage only. "
+            "This operator will only have either input mx.ndarray or this list of pvals");
     DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-      "e.g., (m, n, k), then m * n * k samples are drawn. "
-      "Default is None, in which case a single value is returned.");
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream n_s, pvals_s, size_s;
     n_s << n;
     pvals_s << pvals;
     size_s << size;
-    (*dict)["n"] = n_s.str();
+    (*dict)["n"]     = n_s.str();
     (*dict)["pvals"] = pvals_s.str();
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
 inline bool NumpyMultinomialOpShape(const nnvm::NodeAttrs& attrs,
-                                     std::vector<TShape> *in_attrs,
-                                     std::vector<TShape> *out_attrs) {
+                                    std::vector<TShape>* in_attrs,
+                                    std::vector<TShape>* out_attrs) {
   const NumpyMultinomialParam& param = nnvm::get<NumpyMultinomialParam>(attrs.parsed);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -83,8 +84,7 @@ inline bool NumpyMultinomialOpShape(const nnvm::NodeAttrs& attrs,
     CHECK_EQ(in_attrs->size(), 1U);
     const TShape& ishape = (*in_attrs)[0];
     // check the input shape is only one dimension
-    CHECK_EQ(ishape.ndim(), 1U)
-      << "object too deep for desired array";
+    CHECK_EQ(ishape.ndim(), 1U) << "object too deep for desired array";
     pvals_length = ishape[0];
   }
   if (param.size.has_value()) {
@@ -95,12 +95,12 @@ inline bool NumpyMultinomialOpShape(const nnvm::NodeAttrs& attrs,
   }
   oshape_vec.emplace_back(pvals_length);
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, TShape(oshape_vec));
-  return out_attrs->at(0).ndim() != 0U;;
+  return out_attrs->at(0).ndim() != 0U;
 }
 
 inline bool NumpyMultinomialOpType(const nnvm::NodeAttrs& attrs,
-                                    std::vector<int>* in_attrs,
-                                    std::vector<int>* out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   const NumpyMultinomialParam& param = nnvm::get<NumpyMultinomialParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), (param.pvals.has_value()) ? 0U : 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -110,22 +110,21 @@ inline bool NumpyMultinomialOpType(const nnvm::NodeAttrs& attrs,
 }
 
 #if MXNET_USE_CUDA
-template<typename DType>
+template <typename DType>
 void CheckPvalGPU(const OpContext& ctx, DType* input, int prob_length);
 #endif
 
-template<typename DType>
+template <typename DType>
 void CheckPval(DType* input, int prob_length) {
   DType sum = DType(0.0);
   for (int i = 0; i < prob_length; ++i) {
     sum += input[i];
-    CHECK_LE(sum, 1.0 + 1e-12)
-      << "sum(pvals[:-1]) > 1.0";
+    CHECK_LE(sum, 1.0 + 1e-12) << "sum(pvals[:-1]) > 1.0";
   }
 }
 
 struct multinomial_kernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i,
                                   const int num_exp,
                                   const int prob_length,
@@ -133,8 +132,8 @@ struct multinomial_kernel {
                                   double* uniform,
                                   int64_t* out) {
     for (int j = 0; j < num_exp; ++j) {
-      DType loc = static_cast<DType>(uniform[i * num_exp + j]);
-      DType acc = 0.0;
+      DType loc  = static_cast<DType>(uniform[i * num_exp + j]);
+      DType acc  = 0.0;
       bool found = false;
       for (int k = 0; k < prob_length; ++k) {
         acc += pvals[k];
@@ -151,28 +150,28 @@ struct multinomial_kernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyMultinomialForward(const nnvm::NodeAttrs& attrs,
-                              const OpContext& ctx,
-                              const std::vector<TBlob>& inputs,
-                              const std::vector<OpReqType>& req,
-                              const std::vector<TBlob>& outputs) {
+                             const OpContext& ctx,
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
   const NumpyMultinomialParam& param = nnvm::get<NumpyMultinomialParam>(attrs.parsed);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs.size(), (param.pvals.has_value()) ? 0U : 1U);
 
-  int prob_length = (param.pvals.has_value())
-    ? param.pvals.value().ndim() : inputs[0].shape_[0];
+  int prob_length = (param.pvals.has_value()) ? param.pvals.value().ndim() : inputs[0].shape_[0];
   // if intput is [] or size contains 0 dimension
-  if (prob_length == 0U || outputs[0].shape_.Size() == 0) return;
-  int num_output = outputs[0].Size() / prob_length;
-  int num_exp = param.n;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Random<xpu, double> *prnd = ctx.requested[0].get_random<xpu, double>(s);
-  size_t temp_space_ = (param.pvals.has_value())
-                      ? num_output * param.n + prob_length : num_output * param.n;
+  if (prob_length == 0U || outputs[0].shape_.Size() == 0)
+    return;
+  int num_output            = outputs[0].Size() / prob_length;
+  int num_exp               = param.n;
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
+  Random<xpu, double>* prnd = ctx.requested[0].get_random<xpu, double>(s);
+  size_t temp_space_ =
+      (param.pvals.has_value()) ? num_output * param.n + prob_length : num_output * param.n;
   Tensor<xpu, 1, double> temp_tensor =
       ctx.requested[1].get_space_typed<xpu, 1, double>(Shape1(temp_space_), s);
 
@@ -187,33 +186,40 @@ void NumpyMultinomialForward(const nnvm::NodeAttrs& attrs,
     // check if sum of input(pvals) > 1.0
     double sum = 0.0;
     for (int i = 0; i < prob_length; ++i) {
-        sum += param.pvals.value()[i];
-        // copy the tuple to data for later kernel usage
-        pvals_[i] = param.pvals.value()[i];
-        CHECK_LE(sum, 1.0 + 1e-12)
-          << "sum(pvals[:-1]) > 1.0";
+      sum += param.pvals.value()[i];
+      // copy the tuple to data for later kernel usage
+      pvals_[i] = param.pvals.value()[i];
+      CHECK_LE(sum, 1.0 + 1e-12) << "sum(pvals[:-1]) > 1.0";
     }
     Kernel<multinomial_kernel, xpu>::Launch(
-      s, num_output, num_exp, prob_length, pvals_, temp_tensor.dptr_, outputs[0].dptr<int64_t>());
+        s, num_output, num_exp, prob_length, pvals_, temp_tensor.dptr_, outputs[0].dptr<int64_t>());
   } else {
 #if MXNET_USE_CUDA
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-       if (std::is_same<xpu, cpu>::value) {
-         CheckPval<DType>(inputs[0].dptr<DType>(), prob_length);
-       } else {
-         CheckPvalGPU<DType>(ctx, inputs[0].dptr<DType>(), prob_length);
-       }
-      Kernel<multinomial_kernel, xpu>::Launch(
-        s, num_output, num_exp, prob_length,
-        inputs[0].dptr<DType>(), temp_tensor.dptr_, outputs[0].dptr<int64_t>());
+      if (std::is_same<xpu, cpu>::value) {
+        CheckPval<DType>(inputs[0].dptr<DType>(), prob_length);
+      } else {
+        CheckPvalGPU<DType>(ctx, inputs[0].dptr<DType>(), prob_length);
+      }
+      Kernel<multinomial_kernel, xpu>::Launch(s,
+                                              num_output,
+                                              num_exp,
+                                              prob_length,
+                                              inputs[0].dptr<DType>(),
+                                              temp_tensor.dptr_,
+                                              outputs[0].dptr<int64_t>());
     });
 #else
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-        CheckPval<DType>(inputs[0].dptr<DType>(), prob_length);
-        Kernel<multinomial_kernel, xpu>::Launch(
-          s, num_output, num_exp, prob_length,
-          inputs[0].dptr<DType>(), temp_tensor.dptr_, outputs[0].dptr<int64_t>());
-      });
+      CheckPval<DType>(inputs[0].dptr<DType>(), prob_length);
+      Kernel<multinomial_kernel, xpu>::Launch(s,
+                                              num_output,
+                                              num_exp,
+                                              prob_length,
+                                              inputs[0].dptr<DType>(),
+                                              temp_tensor.dptr_,
+                                              outputs[0].dptr<int64_t>());
+    });
 #endif
   }
 }
diff --git a/src/operator/numpy/random/np_normal_op.cc b/src/operator/numpy/random/np_normal_op.cc
index e2aa1397af67..bf8781153621 100644
--- a/src/operator/numpy/random/np_normal_op.cc
+++ b/src/operator/numpy/random/np_normal_op.cc
@@ -30,113 +30,118 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyNormalParam);
 
 NNVM_REGISTER_OP(_npi_normal)
-.describe("Numpy behavior normal")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  return 1;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    if (num_inputs == 0) return std::vector<std::string>();
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    return std::vector<std::string>{"input1", "input2"};
-  })
-.set_attr_parser(ParamParser<NumpyNormalParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyNormalParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyNormalOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyNormalForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_normal"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyNormalParam::__FIELDS__());
+    .describe("Numpy behavior normal")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+      int num_inputs                = 2;
+      if (param.loc.has_value())
+        num_inputs -= 1;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyNormalParam& param =
+                                           nnvm::get<NumpyNormalParam>(attrs.parsed);
+                                       int num_inputs = 2;
+                                       if (param.loc.has_value())
+                                         num_inputs -= 1;
+                                       if (param.scale.has_value())
+                                         num_inputs -= 1;
+                                       if (num_inputs == 0)
+                                         return std::vector<std::string>();
+                                       if (num_inputs == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyNormalParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyNormalParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyNormalOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyNormalForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_normal"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyNormalParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_normal_n)
-.describe("Ndarray behavior normal")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  return 1;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    if (num_inputs == 0) return std::vector<std::string>();
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    return std::vector<std::string>{"input1", "input2"};
-  })
-.set_attr_parser(ParamParser<NumpyNormalParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpConcatShape<NumpyNormalParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyNormalOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyNormalForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_normal"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyNormalParam::__FIELDS__());
+    .describe("Ndarray behavior normal")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+      int num_inputs                = 2;
+      if (param.loc.has_value())
+        num_inputs -= 1;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyNormalParam& param =
+                                           nnvm::get<NumpyNormalParam>(attrs.parsed);
+                                       int num_inputs = 2;
+                                       if (param.loc.has_value())
+                                         num_inputs -= 1;
+                                       if (param.scale.has_value())
+                                         num_inputs -= 1;
+                                       if (num_inputs == 0)
+                                         return std::vector<std::string>();
+                                       if (num_inputs == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyNormalParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpConcatShape<NumpyNormalParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyNormalOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyNormalForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_normal"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyNormalParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_broadcast_normal)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<NumpyNormalParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-    int num_inputs = 6;
-    if (param.loc.has_value()) num_inputs -= 1;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-    int num_outputs = 2;
-    if (param.loc.has_value()) num_outputs -= 1;
-    if (param.scale.has_value()) num_outputs -= 1;
-    return num_outputs;
-  }
-)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NormalReparamBackward<cpu>)
-.add_arguments(NumpyNormalParam::__FIELDS__());
-
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<NumpyNormalParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+      int num_inputs                = 6;
+      if (param.loc.has_value())
+        num_inputs -= 1;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+      int num_outputs               = 2;
+      if (param.loc.has_value())
+        num_outputs -= 1;
+      if (param.scale.has_value())
+        num_outputs -= 1;
+      return num_outputs;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NormalReparamBackward<cpu>)
+    .add_arguments(NumpyNormalParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_normal_op.cu b/src/operator/numpy/random/np_normal_op.cu
index d45bc2321bd7..ba7cff001888 100644
--- a/src/operator/numpy/random/np_normal_op.cu
+++ b/src/operator/numpy/random/np_normal_op.cu
@@ -28,14 +28,12 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_normal)
-.set_attr<FCompute>("FCompute<gpu>", NumpyNormalForward<gpu>);
+NNVM_REGISTER_OP(_npi_normal).set_attr<FCompute>("FCompute<gpu>", NumpyNormalForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_broadcast_normal)
-.set_attr<FCompute>("FCompute<gpu>", NormalReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", NormalReparamBackward<gpu>);
 
-NNVM_REGISTER_OP(_npi_normal_n)
-.set_attr<FCompute>("FCompute<gpu>", NumpyNormalForward<gpu>);
+NNVM_REGISTER_OP(_npi_normal_n).set_attr<FCompute>("FCompute<gpu>", NumpyNormalForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_normal_op.h b/src/operator/numpy/random/np_normal_op.h
index 06b5bfaabf05..3a0d3e92e8a2 100644
--- a/src/operator/numpy/random/np_normal_op.h
+++ b/src/operator/numpy/random/np_normal_op.h
@@ -76,18 +76,18 @@ struct NumpyNormalParam : public dmlc::Parameter<NumpyNormalParam> {
     scale_s << scale;
     dtype_s << dtype;
     size_s << size;
-    (*dict)["loc"] = loc_s.str();
+    (*dict)["loc"]   = loc_s.str();
     (*dict)["scale"] = scale_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
-inline bool NumpyNormalOpType(const nnvm::NodeAttrs &attrs,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
-  const NumpyNormalParam &param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-  int otype = param.dtype;
+inline bool NumpyNormalOpType(const nnvm::NodeAttrs& attrs,
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
+  const NumpyNormalParam& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+  int otype                     = param.dtype;
   if (otype != -1) {
     (*out_attrs)[0] = otype;
   } else {
@@ -100,34 +100,42 @@ inline bool NumpyNormalOpType(const nnvm::NodeAttrs &attrs,
 namespace mxnet_op {
 template <int ndim, typename IType, typename OType>
 struct normal_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, const Shape<ndim> &lstride,
-                                  const Shape<ndim> &hstride,
-                                  const Shape<ndim> &oshape, IType *loc,
-                                  IType *scale, float *normals, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& hstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* loc,
+                                  IType* scale,
+                                  float* normals,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto hidx = static_cast<index_t>(dot(coord, hstride));
-    IType loc_value = loc[lidx];
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto hidx         = static_cast<index_t>(dot(coord, hstride));
+    IType loc_value   = loc[lidx];
     IType scale_value = scale[hidx];
-    out[i] = loc_value + normals[i] * scale_value;
+    out[i]            = loc_value + normals[i] * scale_value;
   }
 };
 
 template <int ndim, typename IType, typename OType>
 struct normal_one_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, int scalar_pos,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape, IType *array,
-                                  float scalar, float *normals, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int scalar_pos,
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* array,
+                                  float scalar,
+                                  float* normals,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
     IType loc_value;
     IType scale_value;
     if (scalar_pos == 0) {
-      loc_value = scalar;
+      loc_value   = scalar;
       scale_value = array[idx];
     } else {
-      loc_value = array[idx];
+      loc_value   = array[idx];
       scale_value = scalar;
     }
     out[i] = loc_value + normals[i] * scale_value;
@@ -136,15 +144,14 @@ struct normal_one_scalar_kernel {
 
 template <typename OType>
 struct normal_two_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale,
-                                  float *normals, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float loc, float scale, float* normals, OType* out) {
     out[i] = loc + normals[i] * scale;
   }
 };
 
 template <typename IType>
 struct check_legal_scale_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *scalar, float* flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* scalar, float* flag) {
     if (scalar[i] < 0) {
       *flag = -1.0;
     }
@@ -154,23 +161,22 @@ struct check_legal_scale_kernel {
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyNormalForward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyNormalForward(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const auto &param = nnvm::get<NumpyNormalParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const auto& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   // Generate base random number.
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-  Tensor<xpu, 1, float> workspace =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
-  Tensor<xpu, 1, float> normal_tensor = outputs[1].FlatTo1D<xpu, float>(s);
+  Random<xpu, float>* prnd        = ctx.requested[0].get_random<xpu, float>(s);
+  Tensor<xpu, 1, float> workspace = ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
+  Tensor<xpu, 1, float> normal_tensor    = outputs[1].FlatTo1D<xpu, float>(s);
   Tensor<xpu, 1, float> indicator_device = workspace;
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleGaussian(&normal_tensor, 0.0, 1.0);
   mxnet::TShape new_lshape, new_hshape, new_oshape;
@@ -178,18 +184,25 @@ void NumpyNormalForward(const nnvm::NodeAttrs &attrs,
   if (inputs.size() == 0U) {
     CHECK_GE(param.scale.value(), 0.0) << "ValueError: scale < 0";
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      Kernel<normal_two_scalar_kernel<OType>, xpu>::Launch(
-          s, outputs[0].Size(), param.loc.value(), param.scale.value(),
-          normal_tensor.dptr_, outputs[0].dptr<OType>());
+      Kernel<normal_two_scalar_kernel<OType>, xpu>::Launch(s,
+                                                           outputs[0].Size(),
+                                                           param.loc.value(),
+                                                           param.scale.value(),
+                                                           normal_tensor.dptr_,
+                                                           outputs[0].dptr<OType>());
     });
   } else if (inputs.size() == 1U) {
     // [scalar tensor], [tensor scalar] case
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     int scalar_pos;
     float scalar_value;
     if (param.loc.has_value()) {
-      scalar_pos = 0;
+      scalar_pos   = 0;
       scalar_value = param.loc.value();
       MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
         Kernel<check_legal_scale_kernel<IType>, xpu>::Launch(
@@ -198,7 +211,7 @@ void NumpyNormalForward(const nnvm::NodeAttrs &attrs,
       _copy<xpu>(s, &indicator_host, indicator_device_ptr);
       CHECK_GE(indicator_host, 0.0) << "ValueError: scale < 0";
     } else {
-      scalar_pos = 1;
+      scalar_pos   = 1;
       scalar_value = param.scale.value();
       CHECK_GE(scalar_value, 0.0) << "ValueError: scale < 0";
     }
@@ -208,8 +221,14 @@ void NumpyNormalForward(const nnvm::NodeAttrs &attrs,
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
           Kernel<normal_one_scalar_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), scalar_pos, stride, oshape,
-              inputs[0].dptr<IType>(), scalar_value, normal_tensor.dptr_,
+              s,
+              outputs[0].Size(),
+              scalar_pos,
+              stride,
+              oshape,
+              inputs[0].dptr<IType>(),
+              scalar_value,
+              normal_tensor.dptr_,
               outputs[0].dptr<OType>());
         });
       });
@@ -222,18 +241,27 @@ void NumpyNormalForward(const nnvm::NodeAttrs &attrs,
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: scale < 0";
-    int ndim = FillShape(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                         &new_lshape, &new_hshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[1].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_hshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
-          Shape<NDim> oshape = new_oshape.get<NDim>();
+          Shape<NDim> oshape  = new_oshape.get<NDim>();
           Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
           Shape<NDim> hstride = calc_stride(new_hshape.get<NDim>());
-          Kernel<normal_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), lstride, hstride, oshape,
-              inputs[0].dptr<IType>(), inputs[1].dptr<IType>(),
-              normal_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<normal_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                 outputs[0].Size(),
+                                                                 lstride,
+                                                                 hstride,
+                                                                 oshape,
+                                                                 inputs[0].dptr<IType>(),
+                                                                 inputs[1].dptr<IType>(),
+                                                                 normal_tensor.dptr_,
+                                                                 outputs[0].dptr<OType>());
         });
       });
     });
@@ -244,7 +272,7 @@ void NumpyNormalForward(const nnvm::NodeAttrs &attrs,
 // using reparameterization trick described in:
 // Auto-encoding variational bayes.
 // Kingma, D. P., & Welling, M. (2013).
-template<typename xpu>
+template <typename xpu>
 void NormalReparamBackward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -258,29 +286,37 @@ void NormalReparamBackward(const nnvm::NodeAttrs& attrs,
   if (outputs.size() == 0U) {
     return;
   }
-  const auto &param = nnvm::get<NumpyNormalParam>(attrs.parsed);
+  const auto& param = nnvm::get<NumpyNormalParam>(attrs.parsed);
   // [tensor tensor] case
   if (inputs.size() == 6U) {
     mxnet::TShape new_lshape, new_rshape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[1].shape_, inputs[0].shape_,
-                         &new_lshape, &new_rshape, &new_oshape);
+    int ndim = FillShape(outputs[0].shape_,
+                         outputs[1].shape_,
+                         inputs[0].shape_,
+                         &new_lshape,
+                         &new_rshape,
+                         &new_oshape);
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         CommonReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_lshape, new_rshape, new_oshape);
+            ctx, inputs, req, outputs, new_lshape, new_rshape, new_oshape);
       });
     });
   }
   // [tensor scalar], [scalar tensor] case
   if (inputs.size() == 5U) {
     mxnet::TShape new_ishape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                         &new_ishape, &new_ishape, &new_oshape);
+    int ndim           = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
     bool loc_is_tensor = !param.loc.has_value();
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_ishape, new_oshape, loc_is_tensor);
+            ctx, inputs, req, outputs, new_ishape, new_oshape, loc_is_tensor);
       });
     });
   }
diff --git a/src/operator/numpy/random/np_pareto_op.cc b/src/operator/numpy/random/np_pareto_op.cc
index bdfb8ca8a87b..e5002e3337d7 100644
--- a/src/operator/numpy/random/np_pareto_op.cc
+++ b/src/operator/numpy/random/np_pareto_op.cc
@@ -32,73 +32,73 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyParetoParam);
 
 NNVM_REGISTER_OP(_npi_pareto)
-.describe("Numpy behavior Pareto")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.a.has_value()) {
-      num_inputs -= 1;
-    }
-    return num_inputs;
-  })
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs){
-    return 1;
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.a.has_value()) {
-      num_inputs -= 1;
-    }
-    return (num_inputs == 0) ? std::vector<std::string>() : std::vector<std::string>{"input1"};
-  })
-.set_attr_parser(ParamParser<NumpyParetoParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyParetoParam>)
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs &attrs, std::vector<int> *in_attrs,  std::vector<int> *out_attrs) {
-    (*out_attrs)[0] = mshadow::kFloat32;
-    (*out_attrs)[1] = mshadow::kFloat32;
-    return true;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyParetoForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_pareto"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyParetoParam::__FIELDS__());
+    .describe("Numpy behavior Pareto")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
+      int num_inputs                = 1;
+      if (param.a.has_value()) {
+        num_inputs -= 1;
+      }
+      return num_inputs;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyParetoParam& param =
+                                           nnvm::get<NumpyParetoParam>(attrs.parsed);
+                                       int num_inputs = 1;
+                                       if (param.a.has_value()) {
+                                         num_inputs -= 1;
+                                       }
+                                       return (num_inputs == 0)
+                                                  ? std::vector<std::string>()
+                                                  : std::vector<std::string>{"input1"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyParetoParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyParetoParam>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  (*out_attrs)[1] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyParetoForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_pareto"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyParetoParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_broadcast_pareto)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<NumpyParetoParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs){
-    const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
-    int num_inputs = 5;
-    if (param.a.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-  .set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs){
-    const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
-    int num_outputs = 1;
-    if (param.a.has_value()) num_outputs -= 1;
-    return num_outputs;
-  }
-  )
-  .set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs){
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-  .set_attr<FCompute>("FCompute<cpu>", ParetoReparamBackward<cpu>)
-  .add_arguments(NumpyParetoParam::__FIELDS__());
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<NumpyParetoParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
+      int num_inputs                = 5;
+      if (param.a.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyParetoParam& param = nnvm::get<NumpyParetoParam>(attrs.parsed);
+      int num_outputs               = 1;
+      if (param.a.has_value())
+        num_outputs -= 1;
+      return num_outputs;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", ParetoReparamBackward<cpu>)
+    .add_arguments(NumpyParetoParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_pareto_op.cu b/src/operator/numpy/random/np_pareto_op.cu
index d8a8a896e653..2d583df23e53 100644
--- a/src/operator/numpy/random/np_pareto_op.cu
+++ b/src/operator/numpy/random/np_pareto_op.cu
@@ -28,11 +28,10 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_pareto)
-.set_attr<FCompute>("FCompute<gpu>", NumpyParetoForward<gpu>);
+NNVM_REGISTER_OP(_npi_pareto).set_attr<FCompute>("FCompute<gpu>", NumpyParetoForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_broadcast_pareto)
-.set_attr<FCompute>("FCompute<gpu>", ParetoReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", ParetoReparamBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_pareto_op.h b/src/operator/numpy/random/np_pareto_op.h
index 16731c126324..b8578d60c34e 100644
--- a/src/operator/numpy/random/np_pareto_op.h
+++ b/src/operator/numpy/random/np_pareto_op.h
@@ -47,14 +47,14 @@ struct NumpyParetoParam : public dmlc::Parameter<NumpyParetoParam> {
   dmlc::optional<mxnet::Tuple<index_t>> size;
   std::string ctx;
   DMLC_DECLARE_PARAMETER(NumpyParetoParam) {
-      DMLC_DECLARE_FIELD(a)
-      .set_default(dmlc::optional<float>());
-      DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-          "e.g., (m, n, k), then m * n * k samples are drawn. "
-          "Default is None, in which case a single value is returned.");
-      DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
+    DMLC_DECLARE_FIELD(a).set_default(dmlc::optional<float>());
+    DMLC_DECLARE_FIELD(size)
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
         "Context of output, in format [cpu|gpu|cpu_pinned](n)."
         " Only used for imperative calls.");
   }
@@ -63,16 +63,15 @@ struct NumpyParetoParam : public dmlc::Parameter<NumpyParetoParam> {
     std::ostringstream a_s, size_s;
     a_s << a;
     size_s << size;
-    (*dict)["a"] = a_s.str();
+    (*dict)["a"]    = a_s.str();
     (*dict)["size"] = size_s.str();
   }
 };
 
 template <typename DType>
 struct scalar_pareto_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float a, float *noise,
-                                  DType *out) {
-    out[i] = exp(-log(noise[i])/a) - DType(1);
+  MSHADOW_XINLINE static void Map(index_t i, float a, float* noise, DType* out) {
+    out[i] = exp(-log(noise[i]) / a) - DType(1);
   }
 };
 
@@ -80,104 +79,115 @@ namespace mxnet_op {
 
 template <typename IType>
 struct check_legal_a_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *a, float *flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* a, float* flag) {
     if (a[i] <= 0.0) {
       flag[0] = -1.0;
     }
   }
 };
 
-
 template <int ndim, typename IType, typename OType>
 struct pareto_kernel {
   MSHADOW_XINLINE static void Map(index_t i,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape,
-                                  IType *aparams, float *noise, OType *out) {
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* aparams,
+                                  float* noise,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
-    noise[i] = -log(noise[i]);
-    out[i] = exp(noise[i]/aparams[idx]) - IType(1);
+    auto idx          = static_cast<index_t>(dot(coord, stride));
+    noise[i]          = -log(noise[i]);
+    out[i]            = exp(noise[i] / aparams[idx]) - IType(1);
     // get grad
-    noise[i] = -noise[i] * (out[i] + 1.0) * (1.0/(aparams[idx] * aparams[idx]));
+    noise[i] = -noise[i] * (out[i] + 1.0) * (1.0 / (aparams[idx] * aparams[idx]));
   }
 };
 
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyParetoForward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyParetoForward(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyParetoParam &param = nnvm::get<NumpyParetoParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-  Tensor<xpu, 1, float> workspace =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
-  Tensor<xpu, 1, float> uniform_tensor = outputs[1].FlatTo1D<xpu, float>(s);
+  const NumpyParetoParam& param   = nnvm::get<NumpyParetoParam>(attrs.parsed);
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  Random<xpu, float>* prnd        = ctx.requested[0].get_random<xpu, float>(s);
+  Tensor<xpu, 1, float> workspace = ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
+  Tensor<xpu, 1, float> uniform_tensor   = outputs[1].FlatTo1D<xpu, float>(s);
   Tensor<xpu, 1, float> indicator_device = workspace;
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&uniform_tensor, 0.0, 1.0);
   if (param.a.has_value()) {
     CHECK_GT(param.a.value(), 0.0) << "ValueError: expect a > 0";
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Kernel<scalar_pareto_kernel<DType>, xpu>::Launch(
-        s, outputs[0].Size(), param.a.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<DType>());
+          s, outputs[0].Size(), param.a.value(), uniform_tensor.dptr_, outputs[0].dptr<DType>());
     });
   } else {
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       Kernel<check_legal_a_kernel<IType>, xpu>::Launch(
-      s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
+          s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: expect a > 0";
     mxnet::TShape new_lshape, new_oshape;
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<pareto_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), stride, oshape, inputs[0].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<pareto_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                 outputs[0].Size(),
+                                                                 stride,
+                                                                 oshape,
+                                                                 inputs[0].dptr<IType>(),
+                                                                 uniform_tensor.dptr_,
+                                                                 outputs[0].dptr<OType>());
         });
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void ParetoReparamBackward(const nnvm::NodeAttrs& attrs,
-                            const OpContext& ctx,
-                            const std::vector<TBlob>& inputs,
-                            const std::vector<OpReqType>& reqs,
-                            const std::vector<TBlob>& outputs) {
-// skip kernel launch for zero-size tensors
-if (inputs[0].shape_.Size() == 0U) {
-  return;
-}
-// [scalar] case
-if (outputs.size() == 0U) {
-  return;
-}
-// [tensor] case
-if (inputs.size() == 5U) {
-  mxnet::TShape new_ishape, new_oshape;
-  int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                      &new_ishape, &new_ishape, &new_oshape);
-  MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    BROADCAST_NDIM_SWITCH(ndim, NDim, {
-      CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
-        ctx, inputs, reqs, outputs, new_ishape, new_oshape);
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& reqs,
+                           const std::vector<TBlob>& outputs) {
+  // skip kernel launch for zero-size tensors
+  if (inputs[0].shape_.Size() == 0U) {
+    return;
+  }
+  // [scalar] case
+  if (outputs.size() == 0U) {
+    return;
+  }
+  // [tensor] case
+  if (inputs.size() == 5U) {
+    mxnet::TShape new_ishape, new_oshape;
+    int ndim = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
+    MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
+      BROADCAST_NDIM_SWITCH(ndim, NDim, {
+        CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
+            ctx, inputs, reqs, outputs, new_ishape, new_oshape);
       });
     });
   }
diff --git a/src/operator/numpy/random/np_power_op.cc b/src/operator/numpy/random/np_power_op.cc
index c58511d2973e..671ccf950228 100644
--- a/src/operator/numpy/random/np_power_op.cc
+++ b/src/operator/numpy/random/np_power_op.cc
@@ -32,41 +32,45 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyPowerParam);
 
 NNVM_REGISTER_OP(_npi_powerd)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyPowerParam& param = nnvm::get<NumpyPowerParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.a.has_value()) {
-      num_inputs -= 1;
-    }
-    return num_inputs;
-  })
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyPowerParam& param = nnvm::get<NumpyPowerParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.a.has_value()) {
-      num_inputs -= 1;
-    }
-    return (num_inputs == 0) ? std::vector<std::string>() : std::vector<std::string>{"input1"};
-  })
-.set_attr_parser(ParamParser<NumpyPowerParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", UnaryDistOpShape<NumpyPowerParam>)
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs &attrs, std::vector<int> *in_attrs,  std::vector<int> *out_attrs) {
-    (*out_attrs)[0] = mshadow::kFloat32;
-    return true;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyPowerForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyPowerParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyPowerParam& param = nnvm::get<NumpyPowerParam>(attrs.parsed);
+      int num_inputs               = 1;
+      if (param.a.has_value()) {
+        num_inputs -= 1;
+      }
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyPowerParam& param =
+                                           nnvm::get<NumpyPowerParam>(attrs.parsed);
+                                       int num_inputs = 1;
+                                       if (param.a.has_value()) {
+                                         num_inputs -= 1;
+                                       }
+                                       return (num_inputs == 0)
+                                                  ? std::vector<std::string>()
+                                                  : std::vector<std::string>{"input1"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyPowerParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", UnaryDistOpShape<NumpyPowerParam>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyPowerForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyPowerParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_power_op.cu b/src/operator/numpy/random/np_power_op.cu
index d5067f83bb02..3517a890dfe0 100644
--- a/src/operator/numpy/random/np_power_op.cu
+++ b/src/operator/numpy/random/np_power_op.cu
@@ -28,8 +28,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_powerd)
-.set_attr<FCompute>("FCompute<gpu>", NumpyPowerForward<gpu>);
+NNVM_REGISTER_OP(_npi_powerd).set_attr<FCompute>("FCompute<gpu>", NumpyPowerForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_power_op.h b/src/operator/numpy/random/np_power_op.h
index 9b510c131afc..9b0e97896056 100644
--- a/src/operator/numpy/random/np_power_op.h
+++ b/src/operator/numpy/random/np_power_op.h
@@ -47,14 +47,14 @@ struct NumpyPowerParam : public dmlc::Parameter<NumpyPowerParam> {
   std::string ctx;
   dmlc::optional<mxnet::Tuple<index_t>> size;
   DMLC_DECLARE_PARAMETER(NumpyPowerParam) {
-      DMLC_DECLARE_FIELD(a)
-      .set_default(dmlc::optional<float>());
-      DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-          "e.g., (m, n, k), then m * n * k samples are drawn. "
-          "Default is None, in which case a single value is returned.");
-      DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
+    DMLC_DECLARE_FIELD(a).set_default(dmlc::optional<float>());
+    DMLC_DECLARE_FIELD(size)
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
         "Context of output, in format [cpu|gpu|cpu_pinned](n)."
         " Only used for imperative calls.");
   }
@@ -63,16 +63,15 @@ struct NumpyPowerParam : public dmlc::Parameter<NumpyPowerParam> {
     std::ostringstream a_s, size_s;
     a_s << a;
     size_s << size;
-    (*dict)["a"] = a_s.str();
+    (*dict)["a"]    = a_s.str();
     (*dict)["size"] = size_s.str();
   }
 };
 
 template <typename DType>
 struct scalar_power_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float a, float *threshold,
-                                  DType *out) {
-    out[i] = powf(1 - threshold[i], DType(1.0/a));
+  MSHADOW_XINLINE static void Map(index_t i, float a, float* threshold, DType* out) {
+    out[i] = powf(1 - threshold[i], DType(1.0 / a));
   }
 };
 
@@ -80,73 +79,81 @@ namespace mxnet_op {
 
 template <typename IType>
 struct check_legal_a_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *a, float* flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* a, float* flag) {
     if (a[i] <= 0.0) {
       flag[0] = -1.0;
     }
   }
 };
 
-
 template <int ndim, typename IType, typename OType>
 struct power_kernel {
   MSHADOW_XINLINE static void Map(index_t i,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape,
-                                  IType *aparams, float* threshold, OType *out) {
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* aparams,
+                                  float* threshold,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
-    out[i] =  powf(1 - threshold[i], IType(1.0/aparams[idx]));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
+    out[i]            = powf(1 - threshold[i], IType(1.0 / aparams[idx]));
   }
 };
 
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyPowerForward(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+void NumpyPowerForward(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyPowerParam &param = nnvm::get<NumpyPowerParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  index_t output_len = outputs[0].Size();
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
+  const NumpyPowerParam& param = nnvm::get<NumpyPowerParam>(attrs.parsed);
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
+  index_t output_len           = outputs[0].Size();
+  Random<xpu, float>* prnd     = ctx.requested[0].get_random<xpu, float>(s);
   Tensor<xpu, 1, float> workspace =
       ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(output_len + 1), s);
-  Tensor<xpu, 1, float> uniform_tensor = workspace.Slice(0, output_len);
+  Tensor<xpu, 1, float> uniform_tensor   = workspace.Slice(0, output_len);
   Tensor<xpu, 1, float> indicator_device = workspace.Slice(output_len, output_len + 1);
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&workspace, 0.0, 1.0);
   if (param.a.has_value()) {
     CHECK_GT(param.a.value(), 0.0) << "ValueError: expect a > 0";
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Kernel<scalar_power_kernel<DType>, xpu>::Launch(
-        s, outputs[0].Size(), param.a.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<DType>());
+          s, outputs[0].Size(), param.a.value(), uniform_tensor.dptr_, outputs[0].dptr<DType>());
     });
   } else {
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       Kernel<check_legal_a_kernel<IType>, xpu>::Launch(
-      s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
+          s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: expect a > 0";
     mxnet::TShape new_lshape, new_oshape;
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<power_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), stride, oshape, inputs[0].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<power_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                outputs[0].Size(),
+                                                                stride,
+                                                                oshape,
+                                                                inputs[0].dptr<IType>(),
+                                                                uniform_tensor.dptr_,
+                                                                outputs[0].dptr<OType>());
         });
       });
     });
diff --git a/src/operator/numpy/random/np_rayleigh_op.cc b/src/operator/numpy/random/np_rayleigh_op.cc
index 720ae327c84f..e768f46752c3 100644
--- a/src/operator/numpy/random/np_rayleigh_op.cc
+++ b/src/operator/numpy/random/np_rayleigh_op.cc
@@ -32,73 +32,73 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyRayleighParam);
 
 NNVM_REGISTER_OP(_npi_rayleigh)
-.describe("Numpy behavior rayleigh")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.scale.has_value()) {
-      num_inputs -= 1;
-    }
-    return num_inputs;
-})
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-    [](const NodeAttrs& attrs) {
-  return 1;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.scale.has_value()) {
-      num_inputs -= 1;
-    }
-    return (num_inputs == 0) ? std::vector<std::string>() : std::vector<std::string>{"input1"};
-})
-.set_attr_parser(ParamParser<NumpyRayleighParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyRayleighParam>)
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs &attrs, std::vector<int> *in_attrs,  std::vector<int> *out_attrs) {
-    (*out_attrs)[0] = mshadow::kFloat32;
-    (*out_attrs)[1] = mshadow::kFloat32;
-    return true;
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", NumpyRayleighForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_rayleigh"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyRayleighParam::__FIELDS__());
+    .describe("Numpy behavior rayleigh")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
+      int num_inputs                  = 1;
+      if (param.scale.has_value()) {
+        num_inputs -= 1;
+      }
+      return num_inputs;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyRayleighParam& param =
+                                           nnvm::get<NumpyRayleighParam>(attrs.parsed);
+                                       int num_inputs = 1;
+                                       if (param.scale.has_value()) {
+                                         num_inputs -= 1;
+                                       }
+                                       return (num_inputs == 0)
+                                                  ? std::vector<std::string>()
+                                                  : std::vector<std::string>{"input1"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyRayleighParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyRayleighParam>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  (*out_attrs)[1] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyRayleighForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_rayleigh"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyRayleighParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_broadcast_rayleigh)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<NumpyRayleighParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
-    int num_inputs = 5;
-    if (param.scale.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
-    int num_outputs = 1;
-    if (param.scale.has_value()) num_outputs -= 1;
-    return num_outputs;
-  }
-)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", RayleighReparamBackward<cpu>)
-.add_arguments(NumpyRayleighParam::__FIELDS__());
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<NumpyRayleighParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
+      int num_inputs                  = 5;
+      if (param.scale.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
+      int num_outputs                 = 1;
+      if (param.scale.has_value())
+        num_outputs -= 1;
+      return num_outputs;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", RayleighReparamBackward<cpu>)
+    .add_arguments(NumpyRayleighParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_rayleigh_op.cu b/src/operator/numpy/random/np_rayleigh_op.cu
index d35ac073fc4d..5ba776d72d7e 100644
--- a/src/operator/numpy/random/np_rayleigh_op.cu
+++ b/src/operator/numpy/random/np_rayleigh_op.cu
@@ -28,11 +28,10 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_rayleigh)
-.set_attr<FCompute>("FCompute<gpu>", NumpyRayleighForward<gpu>);
+NNVM_REGISTER_OP(_npi_rayleigh).set_attr<FCompute>("FCompute<gpu>", NumpyRayleighForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_broadcast_rayleigh)
-.set_attr<FCompute>("FCompute<gpu>", RayleighReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", RayleighReparamBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_rayleigh_op.h b/src/operator/numpy/random/np_rayleigh_op.h
index 75c4784a515e..f6eaefa173c4 100644
--- a/src/operator/numpy/random/np_rayleigh_op.h
+++ b/src/operator/numpy/random/np_rayleigh_op.h
@@ -47,14 +47,14 @@ struct NumpyRayleighParam : public dmlc::Parameter<NumpyRayleighParam> {
   dmlc::optional<mxnet::Tuple<index_t>> size;
   std::string ctx;
   DMLC_DECLARE_PARAMETER(NumpyRayleighParam) {
-      DMLC_DECLARE_FIELD(scale)
-      .set_default(dmlc::optional<float>(1.0));
-      DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-          "e.g., (m, n, k), then m * n * k samples are drawn. "
-          "Default is None, in which case a single value is returned.");
-      DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
+    DMLC_DECLARE_FIELD(scale).set_default(dmlc::optional<float>(1.0));
+    DMLC_DECLARE_FIELD(size)
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
         "Context of output, in format [cpu|gpu|cpu_pinned](n)."
         " Only used for imperative calls.");
   }
@@ -64,16 +64,15 @@ struct NumpyRayleighParam : public dmlc::Parameter<NumpyRayleighParam> {
     scale_s << scale;
     size_s << size;
     (*dict)["scale"] = scale_s.str();
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
 template <typename DType>
 struct scalar_rayleigh_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float scale, float *threshold,
-                                  DType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float scale, float* threshold, DType* out) {
     threshold[i] = sqrt(-2 * log(threshold[i]));
-    out[i] =  scale * threshold[i];
+    out[i]       = scale * threshold[i];
   }
 };
 
@@ -81,7 +80,7 @@ namespace mxnet_op {
 
 template <typename IType>
 struct check_legal_scale_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *scalar, float* flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* scalar, float* flag) {
     if (scalar[i] < 0.0) {
       flag[0] = -1.0;
     }
@@ -91,69 +90,80 @@ struct check_legal_scale_kernel {
 template <int ndim, typename IType, typename OType>
 struct rayleigh_kernel {
   MSHADOW_XINLINE static void Map(index_t i,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape,
-                                  IType *scales, float* threshold, OType *out) {
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* scales,
+                                  float* threshold,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
-    threshold[i] = sqrt(-2 * log(threshold[i]));
-    out[i] = scales[idx] * threshold[i];
+    auto idx          = static_cast<index_t>(dot(coord, stride));
+    threshold[i]      = sqrt(-2 * log(threshold[i]));
+    out[i]            = scales[idx] * threshold[i];
   }
 };
 
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyRayleighForward(const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+void NumpyRayleighForward(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyRayleighParam &param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-  Tensor<xpu, 1, float> workspace =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
-  Tensor<xpu, 1, float> uniform_tensor = outputs[1].FlatTo1D<xpu, float>(s);
+  const NumpyRayleighParam& param = nnvm::get<NumpyRayleighParam>(attrs.parsed);
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  Random<xpu, float>* prnd        = ctx.requested[0].get_random<xpu, float>(s);
+  Tensor<xpu, 1, float> workspace = ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
+  Tensor<xpu, 1, float> uniform_tensor   = outputs[1].FlatTo1D<xpu, float>(s);
   Tensor<xpu, 1, float> indicator_device = workspace;
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&uniform_tensor, 0.0, 1.0);
   if (param.scale.has_value()) {
     CHECK_GE(param.scale.value(), 0.0) << "ValueError: expect scale >= 0";
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Kernel<scalar_rayleigh_kernel<DType>, xpu>::Launch(
-        s, outputs[0].Size(), param.scale.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<DType>());
+      Kernel<scalar_rayleigh_kernel<DType>, xpu>::Launch(s,
+                                                         outputs[0].Size(),
+                                                         param.scale.value(),
+                                                         uniform_tensor.dptr_,
+                                                         outputs[0].dptr<DType>());
     });
   } else {
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       Kernel<check_legal_scale_kernel<IType>, xpu>::Launch(
-      s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
+          s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: expect scale >= 0";
     mxnet::TShape new_lshape, new_oshape;
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<rayleigh_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), stride, oshape, inputs[0].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<rayleigh_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                   outputs[0].Size(),
+                                                                   stride,
+                                                                   oshape,
+                                                                   inputs[0].dptr<IType>(),
+                                                                   uniform_tensor.dptr_,
+                                                                   outputs[0].dptr<OType>());
         });
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void RayleighReparamBackward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -170,12 +180,16 @@ void RayleighReparamBackward(const nnvm::NodeAttrs& attrs,
   // [tensor] case
   if (inputs.size() == 5U) {
     mxnet::TShape new_ishape, new_oshape;
-    int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                         &new_ishape, &new_ishape, &new_oshape);
+    int ndim = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
-          ctx, inputs, req, outputs, new_ishape, new_oshape);
+            ctx, inputs, req, outputs, new_ishape, new_oshape);
       });
     });
   }
diff --git a/src/operator/numpy/random/np_uniform_op.cc b/src/operator/numpy/random/np_uniform_op.cc
index 1f4be230996c..fdea2511c1f7 100644
--- a/src/operator/numpy/random/np_uniform_op.cc
+++ b/src/operator/numpy/random/np_uniform_op.cc
@@ -30,76 +30,86 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyUniformParam);
 
 NNVM_REGISTER_OP(_npi_uniform)
-.describe("numpy behavior uniform")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.low.has_value()) num_inputs -= 1;
-    if (param.high.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.low.has_value()) num_inputs -= 1;
-    if (param.high.has_value()) num_inputs -= 1;
-    if (num_inputs == 0) return std::vector<std::string>();
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    return std::vector<std::string>{"input1", "input2"};
-  })
-.set_attr_parser(ParamParser<NumpyUniformParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyUniformParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyUniformOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyUniformForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyUniformParam::__FIELDS__());
+    .describe("numpy behavior uniform")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
+      int num_inputs                 = 2;
+      if (param.low.has_value())
+        num_inputs -= 1;
+      if (param.high.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyUniformParam& param =
+                                           nnvm::get<NumpyUniformParam>(attrs.parsed);
+                                       int num_inputs = 2;
+                                       if (param.low.has_value())
+                                         num_inputs -= 1;
+                                       if (param.high.has_value())
+                                         num_inputs -= 1;
+                                       if (num_inputs == 0)
+                                         return std::vector<std::string>();
+                                       if (num_inputs == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyUniformParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyUniformParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyUniformOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyUniformForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyUniformParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_npi_uniform_n)
-.describe("numpy behavior uniform")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.low.has_value()) num_inputs -= 1;
-    if (param.high.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
-    int num_inputs = 2;
-    if (param.low.has_value()) num_inputs -= 1;
-    if (param.high.has_value()) num_inputs -= 1;
-    if (num_inputs == 0) return std::vector<std::string>();
-    if (num_inputs == 1) return std::vector<std::string>{"input1"};
-    return std::vector<std::string>{"input1", "input2"};
-  })
-.set_attr_parser(ParamParser<NumpyUniformParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpConcatShape<NumpyUniformParam>)
-.set_attr<nnvm::FInferType>("FInferType", NumpyUniformOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyUniformForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_argument("input2", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyUniformParam::__FIELDS__());
+    .describe("numpy behavior uniform")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
+      int num_inputs                 = 2;
+      if (param.low.has_value())
+        num_inputs -= 1;
+      if (param.high.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyUniformParam& param =
+                                           nnvm::get<NumpyUniformParam>(attrs.parsed);
+                                       int num_inputs = 2;
+                                       if (param.low.has_value())
+                                         num_inputs -= 1;
+                                       if (param.high.has_value())
+                                         num_inputs -= 1;
+                                       if (num_inputs == 0)
+                                         return std::vector<std::string>();
+                                       if (num_inputs == 1)
+                                         return std::vector<std::string>{"input1"};
+                                       return std::vector<std::string>{"input1", "input2"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyUniformParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpConcatShape<NumpyUniformParam>)
+    .set_attr<nnvm::FInferType>("FInferType", NumpyUniformOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyUniformForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_argument("input2", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyUniformParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_uniform_op.cu b/src/operator/numpy/random/np_uniform_op.cu
index be21eae55647..a034ed4264b5 100644
--- a/src/operator/numpy/random/np_uniform_op.cu
+++ b/src/operator/numpy/random/np_uniform_op.cu
@@ -28,11 +28,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_uniform)
-.set_attr<FCompute>("FCompute<gpu>", NumpyUniformForward<gpu>);
+NNVM_REGISTER_OP(_npi_uniform).set_attr<FCompute>("FCompute<gpu>", NumpyUniformForward<gpu>);
 
-NNVM_REGISTER_OP(_npi_uniform_n)
-.set_attr<FCompute>("FCompute<gpu>", NumpyUniformForward<gpu>);
+NNVM_REGISTER_OP(_npi_uniform_n).set_attr<FCompute>("FCompute<gpu>", NumpyUniformForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_uniform_op.h b/src/operator/numpy/random/np_uniform_op.h
index 46f5140e1b09..1686a38e9493 100644
--- a/src/operator/numpy/random/np_uniform_op.h
+++ b/src/operator/numpy/random/np_uniform_op.h
@@ -75,18 +75,18 @@ struct NumpyUniformParam : public dmlc::Parameter<NumpyUniformParam> {
     high_s << high;
     dtype_s << dtype;
     size_s << size;
-    (*dict)["low"] = low_s.str();
-    (*dict)["high"] = high_s.str();
+    (*dict)["low"]   = low_s.str();
+    (*dict)["high"]  = high_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
-    (*dict)["size"] = size_s.str();
+    (*dict)["size"]  = size_s.str();
   }
 };
 
-inline bool NumpyUniformOpType(const nnvm::NodeAttrs &attrs,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
-  const NumpyUniformParam &param = nnvm::get<NumpyUniformParam>(attrs.parsed);
-  int otype = param.dtype;
+inline bool NumpyUniformOpType(const nnvm::NodeAttrs& attrs,
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
+  const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
+  int otype                      = param.dtype;
   if (otype != -1) {
     (*out_attrs)[0] = otype;
   } else {
@@ -98,34 +98,42 @@ inline bool NumpyUniformOpType(const nnvm::NodeAttrs &attrs,
 namespace mxnet_op {
 template <int ndim, typename IType, typename OType>
 struct uniform_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, const Shape<ndim> &lstride,
-                                  const Shape<ndim> &hstride,
-                                  const Shape<ndim> &oshape, IType *low,
-                                  IType *high, float *uniform, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& hstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* low,
+                                  IType* high,
+                                  float* uniform,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto hidx = static_cast<index_t>(dot(coord, hstride));
-    IType low_value = low[lidx];
-    IType high_value = high[hidx];
-    out[i] = low_value + uniform[i] * (high_value - low_value);
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto hidx         = static_cast<index_t>(dot(coord, hstride));
+    IType low_value   = low[lidx];
+    IType high_value  = high[hidx];
+    out[i]            = low_value + uniform[i] * (high_value - low_value);
   }
 };
 
 template <int ndim, typename IType, typename OType>
 struct uniform_one_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, int scalar_pos,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape, IType *array,
-                                  float scalar, float *uniform, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  int scalar_pos,
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* array,
+                                  float scalar,
+                                  float* uniform,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
     IType low_value;
     IType high_value;
     if (scalar_pos == 0) {
-      low_value = scalar;
+      low_value  = scalar;
       high_value = array[idx];
     } else {
-      low_value = array[idx];
+      low_value  = array[idx];
       high_value = scalar;
     }
     out[i] = low_value + uniform[i] * (high_value - low_value);
@@ -134,52 +142,57 @@ struct uniform_one_scalar_kernel {
 
 template <typename OType>
 struct uniform_two_scalar_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float low, float high,
-                                  float *uniform, OType *out) {
+  MSHADOW_XINLINE static void Map(index_t i, float low, float high, float* uniform, OType* out) {
     out[i] = low + uniform[i] * (high - low);
   }
 };
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyUniformForward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyUniformForward(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyUniformParam &param = nnvm::get<NumpyUniformParam>(attrs.parsed);
+  const NumpyUniformParam& param = nnvm::get<NumpyUniformParam>(attrs.parsed);
   CHECK_EQ(outputs.size(), 1);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   // Generate base random number.
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
+  Random<xpu, float>* prnd = ctx.requested[0].get_random<xpu, float>(s);
   Tensor<xpu, 1, float> uniform_tensor =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(outputs[0].Size()),
-                                                      s);
+      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(outputs[0].Size()), s);
   prnd->SampleUniform(&uniform_tensor, 0, 1);
   mxnet::TShape new_lshape, new_hshape, new_oshape;
 
   // [scalar scalar] case
   if (inputs.size() == 0U) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      Kernel<uniform_two_scalar_kernel<OType>, xpu>::Launch(
-          s, outputs[0].Size(), param.low.value(), param.high.value(),
-          uniform_tensor.dptr_, outputs[0].dptr<OType>());
+      Kernel<uniform_two_scalar_kernel<OType>, xpu>::Launch(s,
+                                                            outputs[0].Size(),
+                                                            param.low.value(),
+                                                            param.high.value(),
+                                                            uniform_tensor.dptr_,
+                                                            outputs[0].dptr<OType>());
     });
   } else if (inputs.size() == 1U) {
     // [scalar tensor], [tensor scalar] case
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     int scalar_pos;
     float scalar_value;
     // int type_flag = param.t;
     if (param.low.has_value()) {
-      scalar_pos = 0;
+      scalar_pos   = 0;
       scalar_value = param.low.value();
     } else {
-      scalar_pos = 1;
+      scalar_pos   = 1;
       scalar_value = param.high.value();
     }
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
@@ -188,26 +201,41 @@ void NumpyUniformForward(const nnvm::NodeAttrs &attrs,
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
           Kernel<uniform_one_scalar_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), scalar_pos, stride, oshape,
-              inputs[0].dptr<IType>(), scalar_value, uniform_tensor.dptr_,
+              s,
+              outputs[0].Size(),
+              scalar_pos,
+              stride,
+              oshape,
+              inputs[0].dptr<IType>(),
+              scalar_value,
+              uniform_tensor.dptr_,
               outputs[0].dptr<OType>());
         });
       });
     });
   } else if (inputs.size() == 2U) {
     // [tensor tensor] case
-    int ndim = FillShape(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                         &new_lshape, &new_hshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[1].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_hshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
-          Shape<NDim> oshape = new_oshape.get<NDim>();
+          Shape<NDim> oshape  = new_oshape.get<NDim>();
           Shape<NDim> lstride = calc_stride(new_lshape.get<NDim>());
           Shape<NDim> hstride = calc_stride(new_hshape.get<NDim>());
-          Kernel<uniform_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), lstride, hstride, oshape,
-              inputs[0].dptr<IType>(), inputs[1].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<uniform_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                  outputs[0].Size(),
+                                                                  lstride,
+                                                                  hstride,
+                                                                  oshape,
+                                                                  inputs[0].dptr<IType>(),
+                                                                  inputs[1].dptr<IType>(),
+                                                                  uniform_tensor.dptr_,
+                                                                  outputs[0].dptr<OType>());
         });
       });
     });
diff --git a/src/operator/numpy/random/np_weibull_op.cc b/src/operator/numpy/random/np_weibull_op.cc
index 7e8d8bf5fabc..06015c377e34 100644
--- a/src/operator/numpy/random/np_weibull_op.cc
+++ b/src/operator/numpy/random/np_weibull_op.cc
@@ -32,73 +32,73 @@ namespace op {
 DMLC_REGISTER_PARAMETER(NumpyWeibullParam);
 
 NNVM_REGISTER_OP(_npi_weibull)
-.describe("Numpy behavior Weibull")
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs) {
-    const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.a.has_value()) {
-      num_inputs -= 1;
-    }
-    return num_inputs;
-  })
-.set_num_outputs(2)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
-  [](const NodeAttrs& attrs){
-    return 1;
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
-    int num_inputs = 1;
-    if (param.a.has_value()) {
-      num_inputs -= 1;
-    }
-    return (num_inputs == 0) ? std::vector<std::string>() : std::vector<std::string>{"input1"};
-  })
-.set_attr_parser(ParamParser<NumpyWeibullParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyWeibullParam>)
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs &attrs, std::vector<int> *in_attrs,  std::vector<int> *out_attrs) {
-    (*out_attrs)[0] = mshadow::kFloat32;
-    (*out_attrs)[1] = mshadow::kFloat32;
-    return true;
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NumpyWeibullForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_weibull"})
-.add_argument("input1", "NDArray-or-Symbol", "Source input")
-.add_arguments(NumpyWeibullParam::__FIELDS__());
+    .describe("Numpy behavior Weibull")
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
+      int num_inputs                 = 1;
+      if (param.a.has_value()) {
+        num_inputs -= 1;
+      }
+      return num_inputs;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const NumpyWeibullParam& param =
+                                           nnvm::get<NumpyWeibullParam>(attrs.parsed);
+                                       int num_inputs = 1;
+                                       if (param.a.has_value()) {
+                                         num_inputs -= 1;
+                                       }
+                                       return (num_inputs == 0)
+                                                  ? std::vector<std::string>()
+                                                  : std::vector<std::string>{"input1"};
+                                     })
+    .set_attr_parser(ParamParser<NumpyWeibullParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TwoparamsDistOpShape<NumpyWeibullParam>)
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  (*out_attrs)[0] = mshadow::kFloat32;
+                                  (*out_attrs)[1] = mshadow::kFloat32;
+                                  return true;
+                                })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", NumpyWeibullForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_broadcast_weibull"})
+    .add_argument("input1", "NDArray-or-Symbol", "Source input")
+    .add_arguments(NumpyWeibullParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_broadcast_weibull)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr_parser(ParamParser<NumpyWeibullParam>)
-.set_num_inputs(
-  [](const nnvm::NodeAttrs& attrs){
-    const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
-    int num_inputs = 5;
-    if (param.a.has_value()) num_inputs -= 1;
-    return num_inputs;
-  }
-)
-  .set_num_outputs(
-  [](const nnvm::NodeAttrs& attrs){
-    const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
-    int num_outputs = 1;
-    if (param.a.has_value()) num_outputs -= 1;
-    return num_outputs;
-  }
-  )
-  .set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs){
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-  .set_attr<FCompute>("FCompute<cpu>", WeibullReparamBackward<cpu>)
-  .add_arguments(NumpyWeibullParam::__FIELDS__());
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr_parser(ParamParser<NumpyWeibullParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
+      int num_inputs                 = 5;
+      if (param.a.has_value())
+        num_inputs -= 1;
+      return num_inputs;
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const NumpyWeibullParam& param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
+      int num_outputs                = 1;
+      if (param.a.has_value())
+        num_outputs -= 1;
+      return num_outputs;
+    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", WeibullReparamBackward<cpu>)
+    .add_arguments(NumpyWeibullParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_weibull_op.cu b/src/operator/numpy/random/np_weibull_op.cu
index 57d609d62768..a37aeddbc413 100644
--- a/src/operator/numpy/random/np_weibull_op.cu
+++ b/src/operator/numpy/random/np_weibull_op.cu
@@ -28,11 +28,10 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_npi_weibull)
-.set_attr<FCompute>("FCompute<gpu>", NumpyWeibullForward<gpu>);
+NNVM_REGISTER_OP(_npi_weibull).set_attr<FCompute>("FCompute<gpu>", NumpyWeibullForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_broadcast_weibull)
-.set_attr<FCompute>("FCompute<gpu>", WeibullReparamBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", WeibullReparamBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/numpy/random/np_weibull_op.h b/src/operator/numpy/random/np_weibull_op.h
index a7d6d5d2c405..2c83bd88324f 100644
--- a/src/operator/numpy/random/np_weibull_op.h
+++ b/src/operator/numpy/random/np_weibull_op.h
@@ -47,14 +47,14 @@ struct NumpyWeibullParam : public dmlc::Parameter<NumpyWeibullParam> {
   dmlc::optional<mxnet::Tuple<index_t>> size;
   std::string ctx;
   DMLC_DECLARE_PARAMETER(NumpyWeibullParam) {
-      DMLC_DECLARE_FIELD(a)
-      .set_default(dmlc::optional<float>());
-      DMLC_DECLARE_FIELD(size)
-      .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
-      .describe("Output shape. If the given shape is, "
-          "e.g., (m, n, k), then m * n * k samples are drawn. "
-          "Default is None, in which case a single value is returned.");
-      DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
+    DMLC_DECLARE_FIELD(a).set_default(dmlc::optional<float>());
+    DMLC_DECLARE_FIELD(size)
+        .set_default(dmlc::optional<mxnet::Tuple<index_t>>())
+        .describe(
+            "Output shape. If the given shape is, "
+            "e.g., (m, n, k), then m * n * k samples are drawn. "
+            "Default is None, in which case a single value is returned.");
+    DMLC_DECLARE_FIELD(ctx).set_default("cpu").describe(
         "Context of output, in format [cpu|gpu|cpu_pinned](n)."
         " Only used for imperative calls.");
   }
@@ -63,16 +63,15 @@ struct NumpyWeibullParam : public dmlc::Parameter<NumpyWeibullParam> {
     std::ostringstream a_s, size_s;
     a_s << a;
     size_s << size;
-    (*dict)["a"] = a_s.str();
+    (*dict)["a"]    = a_s.str();
     (*dict)["size"] = size_s.str();
   }
 };
 
 template <typename DType>
 struct scalar_weibull_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, float a, float *noise,
-                                  DType *out) {
-    out[i] = powf(-log(noise[i]), DType(1.0/a));
+  MSHADOW_XINLINE static void Map(index_t i, float a, float* noise, DType* out) {
+    out[i] = powf(-log(noise[i]), DType(1.0 / a));
   }
 };
 
@@ -80,104 +79,115 @@ namespace mxnet_op {
 
 template <typename IType>
 struct check_legal_a_kernel {
-  MSHADOW_XINLINE static void Map(index_t i, IType *a, float *flag) {
+  MSHADOW_XINLINE static void Map(index_t i, IType* a, float* flag) {
     if (a[i] <= 0.0) {
       flag[0] = -1.0;
     }
   }
 };
 
-
 template <int ndim, typename IType, typename OType>
 struct weibull_kernel {
   MSHADOW_XINLINE static void Map(index_t i,
-                                  const Shape<ndim> &stride,
-                                  const Shape<ndim> &oshape,
-                                  IType *aparams, float *noise, OType *out) {
+                                  const Shape<ndim>& stride,
+                                  const Shape<ndim>& oshape,
+                                  IType* aparams,
+                                  float* noise,
+                                  OType* out) {
     Shape<ndim> coord = unravel(i, oshape);
-    auto idx = static_cast<index_t>(dot(coord, stride));
-    noise[i] = -log(noise[i]);
-    out[i] =  powf(noise[i], IType(1.0/aparams[idx]));
+    auto idx          = static_cast<index_t>(dot(coord, stride));
+    noise[i]          = -log(noise[i]);
+    out[i]            = powf(noise[i], IType(1.0 / aparams[idx]));
     // get grad
-    noise[i] = -log(noise[i]) * out[i] * (1.0/(aparams[idx] * aparams[idx]));
+    noise[i] = -log(noise[i]) * out[i] * (1.0 / (aparams[idx] * aparams[idx]));
   }
 };
 
 }  // namespace mxnet_op
 
 template <typename xpu>
-void NumpyWeibullForward(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+void NumpyWeibullForward(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  const NumpyWeibullParam &param = nnvm::get<NumpyWeibullParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
-  Tensor<xpu, 1, float> workspace =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
-  Tensor<xpu, 1, float> uniform_tensor = outputs[1].FlatTo1D<xpu, float>(s);
+  const NumpyWeibullParam& param  = nnvm::get<NumpyWeibullParam>(attrs.parsed);
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  Random<xpu, float>* prnd        = ctx.requested[0].get_random<xpu, float>(s);
+  Tensor<xpu, 1, float> workspace = ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(1), s);
+  Tensor<xpu, 1, float> uniform_tensor   = outputs[1].FlatTo1D<xpu, float>(s);
   Tensor<xpu, 1, float> indicator_device = workspace;
-  float indicator_host = 1.0;
-  float *indicator_device_ptr = indicator_device.dptr_;
+  float indicator_host                   = 1.0;
+  float* indicator_device_ptr            = indicator_device.dptr_;
   Kernel<set_zero, xpu>::Launch(s, 1, indicator_device_ptr);
   prnd->SampleUniform(&uniform_tensor, 0.0, 1.0);
   if (param.a.has_value()) {
     CHECK_GT(param.a.value(), 0.0) << "ValueError: expect a > 0";
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Kernel<scalar_weibull_kernel<DType>, xpu>::Launch(
-        s, outputs[0].Size(), param.a.value(),
-        uniform_tensor.dptr_, outputs[0].dptr<DType>());
+          s, outputs[0].Size(), param.a.value(), uniform_tensor.dptr_, outputs[0].dptr<DType>());
     });
   } else {
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       Kernel<check_legal_a_kernel<IType>, xpu>::Launch(
-      s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
+          s, inputs[0].Size(), inputs[0].dptr<IType>(), indicator_device_ptr);
     });
     _copy<xpu>(s, &indicator_host, indicator_device_ptr);
     CHECK_GE(indicator_host, 0.0) << "ValueError: expect a > 0";
     mxnet::TShape new_lshape, new_oshape;
-    int ndim = FillShape(inputs[0].shape_, inputs[0].shape_, outputs[0].shape_,
-                         &new_lshape, &new_lshape, &new_oshape);
+    int ndim = FillShape(inputs[0].shape_,
+                         inputs[0].shape_,
+                         outputs[0].shape_,
+                         &new_lshape,
+                         &new_lshape,
+                         &new_oshape);
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
         BROADCAST_NDIM_SWITCH(ndim, NDim, {
           Shape<NDim> oshape = new_oshape.get<NDim>();
           Shape<NDim> stride = calc_stride(new_lshape.get<NDim>());
-          Kernel<weibull_kernel<NDim, IType, OType>, xpu>::Launch(
-              s, outputs[0].Size(), stride, oshape, inputs[0].dptr<IType>(),
-              uniform_tensor.dptr_, outputs[0].dptr<OType>());
+          Kernel<weibull_kernel<NDim, IType, OType>, xpu>::Launch(s,
+                                                                  outputs[0].Size(),
+                                                                  stride,
+                                                                  oshape,
+                                                                  inputs[0].dptr<IType>(),
+                                                                  uniform_tensor.dptr_,
+                                                                  outputs[0].dptr<OType>());
         });
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void WeibullReparamBackward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
                             const std::vector<OpReqType>& reqs,
                             const std::vector<TBlob>& outputs) {
-// skip kernel launch for zero-size tensors
-if (inputs[0].shape_.Size() == 0U) {
-  return;
-}
-// [scalar] case
-if (outputs.size() == 0U) {
-  return;
-}
-// [tensor] case
-if (inputs.size() == 5U) {
-  mxnet::TShape new_ishape, new_oshape;
-  int ndim = FillShape(outputs[0].shape_, outputs[0].shape_, inputs[0].shape_,
-                      &new_ishape, &new_ishape, &new_oshape);
-  MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    BROADCAST_NDIM_SWITCH(ndim, NDim, {
-      CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
-        ctx, inputs, reqs, outputs, new_ishape, new_oshape);
+  // skip kernel launch for zero-size tensors
+  if (inputs[0].shape_.Size() == 0U) {
+    return;
+  }
+  // [scalar] case
+  if (outputs.size() == 0U) {
+    return;
+  }
+  // [tensor] case
+  if (inputs.size() == 5U) {
+    mxnet::TShape new_ishape, new_oshape;
+    int ndim = FillShape(outputs[0].shape_,
+                         outputs[0].shape_,
+                         inputs[0].shape_,
+                         &new_ishape,
+                         &new_ishape,
+                         &new_oshape);
+    MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
+      BROADCAST_NDIM_SWITCH(ndim, NDim, {
+        CommonScalarReparamBackwardImpl<xpu, NDim, DType>(
+            ctx, inputs, reqs, outputs, new_ishape, new_oshape);
       });
     });
   }
diff --git a/src/operator/operator.cc b/src/operator/operator.cc
index 6474cd08708b..503f7c3812eb 100644
--- a/src/operator/operator.cc
+++ b/src/operator/operator.cc
@@ -32,8 +32,8 @@ DMLC_REGISTRY_ENABLE(::mxnet::OperatorPropertyReg);
 
 namespace mxnet {
 // implementation of all factory functions
-OperatorProperty *OperatorProperty::Create(const char* type_name) {
-  auto *creator = dmlc::Registry<OperatorPropertyReg>::Find(type_name);
+OperatorProperty* OperatorProperty::Create(const char* type_name) {
+  auto* creator = dmlc::Registry<OperatorPropertyReg>::Find(type_name);
   if (creator == nullptr) {
     LOG(FATAL) << "Cannot find Operator " << type_name << " in registry";
   }
diff --git a/src/operator/operator_common.h b/src/operator/operator_common.h
index 3f82a14b1cfd..34321dbb2245 100644
--- a/src/operator/operator_common.h
+++ b/src/operator/operator_common.h
@@ -23,7 +23,7 @@
  * \brief common internal header of most operators
  *   this header includes utility functions operator can use
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_OPERATOR_COMMON_H_
 #define MXNET_OPERATOR_OPERATOR_COMMON_H_
 
@@ -52,24 +52,23 @@ namespace op {
  * \tparam OType output type
  * \tparam Exp expression type
  */
-#define Assign(out, req, exp)           \
-  {                                     \
-    switch (req) {                      \
-      case kNullOp:                     \
-        break;                          \
-      case kWriteTo:                    \
-      case kWriteInplace:               \
-        (out) = (exp);                  \
-        break;                          \
-      case kAddTo:                      \
-        (out) += (exp);                 \
-        break;                          \
-      default:                          \
-        LOG(FATAL) << "not reached";    \
-    }                                   \
+#define Assign(out, req, exp)        \
+  {                                  \
+    switch (req) {                   \
+      case kNullOp:                  \
+        break;                       \
+      case kWriteTo:                 \
+      case kWriteInplace:            \
+        (out) = (exp);               \
+        break;                       \
+      case kAddTo:                   \
+        (out) += (exp);              \
+        break;                       \
+      default:                       \
+        LOG(FATAL) << "not reached"; \
+    }                                \
   }
 
-
 /*! \brief exception throwed by InferShape error */
 struct InferShapeError : public dmlc::Error {
   /*! \brief analyze message */
@@ -78,7 +77,7 @@ struct InferShapeError : public dmlc::Error {
   int index;
   // constructor
   InferShapeError(const std::string& msg_, int index)
-    : dmlc::Error(msg_), msg(msg_), index(index) {}
+      : dmlc::Error(msg_), msg(msg_), index(index) {}
 };
 
 /*! \brief exception throwed by InferShape error */
@@ -88,8 +87,7 @@ struct InferTypeError : public dmlc::Error {
   /*! \brief corresponding input index */
   int index;
   // constructor
-  InferTypeError(const std::string& msg_, int index)
-    : dmlc::Error(msg_), msg(msg_), index(index) {}
+  InferTypeError(const std::string& msg_, int index) : dmlc::Error(msg_), msg(msg_), index(index) {}
 };
 
 /*! \brief exception throwed by InferStorageType error */
@@ -100,7 +98,7 @@ struct InferStorageTypeError : public dmlc::Error {
   int index;
   // constructor
   InferStorageTypeError(const std::string& msg_, int index)
-    : dmlc::Error(msg_), msg(msg_), index(index) {}
+      : dmlc::Error(msg_), msg(msg_), index(index) {}
 };
 
 /*! \brief check if shape is empty or contains unknown (0) dim.
@@ -161,7 +159,7 @@ inline std::string type_string(const int& x) {
  * \param x source shape.
  * \return whether x and y are compatible.
  */
-inline bool shape_assign(mxnet::TShape *y, const mxnet::TShape& x) {
+inline bool shape_assign(mxnet::TShape* y, const mxnet::TShape& x) {
   if (!mxnet::ndim_is_known(*y)) {
     *y = x;
     return true;
@@ -185,7 +183,7 @@ inline bool shape_assign(mxnet::TShape *y, const mxnet::TShape& x) {
  * \param x source type.
  * \return whether x and y are compatible.
  */
-inline bool type_assign(int *y, const int& x) {
+inline bool type_assign(int* y, const int& x) {
   if (*y == -1) {
     *y = x;
     return true;
@@ -201,7 +199,7 @@ inline bool type_assign(int *y, const int& x) {
  * \param x source mode.
  * \return whether x and y are compatible.
  */
-inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
+inline bool dispatch_mode_assign(DispatchMode* y, const DispatchMode& x) {
   if (*y == DispatchMode::kUndefined) {
     *y = x;
     return true;
@@ -212,8 +210,7 @@ inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
 }
 
 /*! \brief Register op name as an alias */
-#define MXNET_ADD_SPARSE_OP_ALIAS(__name$) \
-  .add_alias("_sparse_" #__name$)
+#define MXNET_ADD_SPARSE_OP_ALIAS(__name$) .add_alias("_sparse_" #__name$)
 
 /*!
  * \brief macro assign shape to out if out is unknown otherwise check consistency
@@ -222,14 +219,14 @@ inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
  * \param index the index of in the array
  * \param shape the inferred shape
  */
-#define SHAPE_ASSIGN_CHECK(shape_array, index, shape)                       \
-  {                                                                         \
+#define SHAPE_ASSIGN_CHECK(shape_array, index, shape)                              \
+  {                                                                                \
     if (!::mxnet::op::shape_assign(&(shape_array)[index], mxnet::TShape(shape))) { \
-      std::ostringstream os;                                                \
-      os << "Shape inconsistent, Provided = " << (shape_array)[index] << ','\
-         << " inferred shape=" << shape;                                    \
-      throw ::mxnet::op::InferShapeError(os.str(), index);                  \
-    }                                                                       \
+      std::ostringstream os;                                                       \
+      os << "Shape inconsistent, Provided = " << (shape_array)[index] << ','       \
+         << " inferred shape=" << shape;                                           \
+      throw ::mxnet::op::InferShapeError(os.str(), index);                         \
+    }                                                                              \
   }
 
 /*!
@@ -239,15 +236,14 @@ inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
  * \param index the index of in the array
  * \param type the inferred type
  */
-#define TYPE_ASSIGN_CHECK(type_array, index, type)                          \
-  {                                                                         \
-    if (!::mxnet::op::type_assign(&(type_array)[index], type)) {            \
-      std::ostringstream os;                                                \
-      os << "Type inconsistent, Provided = "                                \
-         << ::mxnet::op::type_string((type_array)[index]) << ','            \
-         << " inferred type = " << ::mxnet::op::type_string(type);          \
-      throw ::mxnet::op::InferTypeError(os.str(), index);                   \
-    }                                                                       \
+#define TYPE_ASSIGN_CHECK(type_array, index, type)                                            \
+  {                                                                                           \
+    if (!::mxnet::op::type_assign(&(type_array)[index], type)) {                              \
+      std::ostringstream os;                                                                  \
+      os << "Type inconsistent, Provided = " << ::mxnet::op::type_string((type_array)[index]) \
+         << ',' << " inferred type = " << ::mxnet::op::type_string(type);                     \
+      throw ::mxnet::op::InferTypeError(os.str(), index);                                     \
+    }                                                                                         \
   }
 
 /*!
@@ -257,15 +253,14 @@ inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
  * \param index the index of in the array
  * \param type the inferred storage type
  */
-#define STORAGE_TYPE_ASSIGN_CHECK(type_array, index, type)                  \
-  {                                                                         \
-    if (!::mxnet::op::type_assign(&(type_array)[index], type)) {            \
-      std::ostringstream os;                                                \
-      os << "Storage type inconsistent, Provided = "                        \
-         << common::stype_string((type_array)[index]) << ','                \
-         << " inferred storage type = " << common::stype_string(type);      \
-      throw ::mxnet::op::InferStorageTypeError(os.str(), index);            \
-    }                                                                       \
+#define STORAGE_TYPE_ASSIGN_CHECK(type_array, index, type)                                        \
+  {                                                                                               \
+    if (!::mxnet::op::type_assign(&(type_array)[index], type)) {                                  \
+      std::ostringstream os;                                                                      \
+      os << "Storage type inconsistent, Provided = " << common::stype_string((type_array)[index]) \
+         << ',' << " inferred storage type = " << common::stype_string(type);                     \
+      throw ::mxnet::op::InferStorageTypeError(os.str(), index);                                  \
+    }                                                                                             \
   }
 
 /*!
@@ -275,15 +270,15 @@ inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
  * \param index the index of in the array
  * \param type the inferred dispatch type
  */
-#define DISPATCH_MODE_ASSIGN_CHECK(type_array, index, type)                 \
-  {                                                                         \
-    if (!::mxnet::op::dispatch_mode_assign(&(type_array)[index], type)) {   \
-      std::ostringstream os;                                                \
-      os << "Dispatch mode inconsistent, Provided = "                       \
-         << common::dispatch_mode_string((type_array)[index]) << ','        \
-         << " inferred mode = " << common::dispatch_mode_string(type);      \
-      throw ::mxnet::op::InferStorageTypeError(os.str(), index);            \
-    }                                                                       \
+#define DISPATCH_MODE_ASSIGN_CHECK(type_array, index, type)               \
+  {                                                                       \
+    if (!::mxnet::op::dispatch_mode_assign(&(type_array)[index], type)) { \
+      std::ostringstream os;                                              \
+      os << "Dispatch mode inconsistent, Provided = "                     \
+         << common::dispatch_mode_string((type_array)[index]) << ','      \
+         << " inferred mode = " << common::dispatch_mode_string(type);    \
+      throw ::mxnet::op::InferStorageTypeError(os.str(), index);          \
+    }                                                                     \
   }
 
 /*!
@@ -291,29 +286,29 @@ inline bool dispatch_mode_assign(DispatchMode *y, const DispatchMode& x) {
  * \param type the type to be checked
  * \param expected the expected type
  */
-#define UNIFORM_TYPE_CHECK(type, expected, arg)                         \
-  {                                                                     \
-    CHECK_EQ(type, expected) << "This layer requires uniform type. "    \
-                             << "Expected '" << ::mxnet::op::type_string(expected)   \
-                             << "' v.s. given '" << ::mxnet::op::type_string(type)   \
-                             << "' at '" << arg << "'";                 \
+#define UNIFORM_TYPE_CHECK(type, expected, arg)                                                \
+  {                                                                                            \
+    CHECK_EQ(type, expected) << "This layer requires uniform type. "                           \
+                             << "Expected '" << ::mxnet::op::type_string(expected)             \
+                             << "' v.s. given '" << ::mxnet::op::type_string(type) << "' at '" \
+                             << arg << "'";                                                    \
   }
 
 // helper macro to implement bind dispatch
 #if MXNET_USE_CUDA
-#define DO_BIND_DISPATCH(Method, ...)                                \
-  if (ctx.dev_mask() == cpu::kDevMask) {                             \
-      return Method<cpu>(__VA_ARGS__);                               \
-    } else {                                                         \
-      return Method<gpu>(__VA_ARGS__);                               \
-    }
+#define DO_BIND_DISPATCH(Method, ...)    \
+  if (ctx.dev_mask() == cpu::kDevMask) { \
+    return Method<cpu>(__VA_ARGS__);     \
+  } else {                               \
+    return Method<gpu>(__VA_ARGS__);     \
+  }
 #else
-#define DO_BIND_DISPATCH(Method, ...)                                \
-  if (ctx.dev_mask() == cpu::kDevMask) {                             \
-    return Method<cpu>(__VA_ARGS__);                                 \
-  } else {                                                           \
-    LOG(FATAL) << "GPU is not enabled";                              \
-    return nullptr;                                                  \
+#define DO_BIND_DISPATCH(Method, ...)    \
+  if (ctx.dev_mask() == cpu::kDevMask) { \
+    return Method<cpu>(__VA_ARGS__);     \
+  } else {                               \
+    LOG(FATAL) << "GPU is not enabled";  \
+    return nullptr;                      \
   }
 #endif
 
@@ -361,10 +356,10 @@ inline bool dispatch_fallback(StorageTypeVector* stypes, DispatchMode* dispatch)
   return true;
 }
 
-inline std::vector<nnvm::NodeEntry>CreateNodeEntries(
-  nnvm::ObjectPtr pNode,
-  const std::vector<nnvm::NodeEntry>* pOgrads = nullptr,
-  const std::vector<nnvm::NodeEntry>* pInputs = nullptr) {
+inline std::vector<nnvm::NodeEntry> CreateNodeEntries(
+    nnvm::ObjectPtr pNode,
+    const std::vector<nnvm::NodeEntry>* pOgrads = nullptr,
+    const std::vector<nnvm::NodeEntry>* pInputs = nullptr) {
   if (pOgrads)
     pNode->inputs.insert(pNode->inputs.end(), pOgrads->begin(), pOgrads->end());
 
@@ -373,9 +368,9 @@ inline std::vector<nnvm::NodeEntry>CreateNodeEntries(
 
   if (!pNode->is_variable()) {
     CHECK_EQ(pNode->num_inputs(), pNode->inputs.size())
-      << "Number of inputs to operator " << pNode->op()->name << " (" << pNode->num_inputs()
-      << ") does not match the actual number of inputs provided to operator "
-      << pNode->attrs.name << " (" << pNode->inputs.size() << ").";
+        << "Number of inputs to operator " << pNode->op()->name << " (" << pNode->num_inputs()
+        << ") does not match the actual number of inputs provided to operator " << pNode->attrs.name
+        << " (" << pNode->inputs.size() << ").";
   }
 
   std::vector<nnvm::NodeEntry> ret;
@@ -386,16 +381,18 @@ inline std::vector<nnvm::NodeEntry>CreateNodeEntries(
 }
 
 // make a new node with operator op_name. Inputs are not filled.
-inline nnvm::ObjectPtr MakeNode(
-    const char* op_name, const std::string& name,
-    std::vector<nnvm::NodeEntry> const * inputs = nullptr,
-    std::unordered_map<std::string, std::string> const * dict = nullptr,
-    nnvm::ObjectPtr const * fwd_node = nullptr) {
-  auto p = nnvm::Node::Create();
-  p->attrs.op = nnvm::Op::Get(op_name);
+inline nnvm::ObjectPtr MakeNode(const char* op_name,
+                                const std::string& name,
+                                std::vector<nnvm::NodeEntry> const* inputs               = nullptr,
+                                std::unordered_map<std::string, std::string> const* dict = nullptr,
+                                nnvm::ObjectPtr const* fwd_node = nullptr) {
+  auto p        = nnvm::Node::Create();
+  p->attrs.op   = nnvm::Op::Get(op_name);
   p->attrs.name = name;
-  if (dict != nullptr) p->attrs.dict = *dict;
-  if (inputs != nullptr) p->inputs = *inputs;
+  if (dict != nullptr)
+    p->attrs.dict = *dict;
+  if (inputs != nullptr)
+    p->inputs = *inputs;
   if (fwd_node != nullptr) {
     p->control_deps.emplace_back(*fwd_node);
   }
@@ -404,37 +401,35 @@ inline nnvm::ObjectPtr MakeNode(
   }
   if (inputs != nullptr) {
     CHECK_EQ(p->num_inputs(), p->inputs.size())
-      << "Number of inputs to operator " << op_name << " (" << p->num_inputs()
-      << ") does not match the actual number of inputs provided to operator "
-      << name << " (" << p->inputs.size() << ").";
+        << "Number of inputs to operator " << op_name << " (" << p->num_inputs()
+        << ") does not match the actual number of inputs provided to operator " << name << " ("
+        << p->inputs.size() << ").";
   }
   return p;
 }
 
-inline nnvm::ObjectPtr MakeNode(
-    const char* op_name, const std::string& name,
-    const std::vector<nnvm::NodeEntry>& inputs,
-    std::unordered_map<std::string, std::string> const * dict,
-    nnvm::ObjectPtr const * fwd_node) {
+inline nnvm::ObjectPtr MakeNode(const char* op_name,
+                                const std::string& name,
+                                const std::vector<nnvm::NodeEntry>& inputs,
+                                std::unordered_map<std::string, std::string> const* dict,
+                                nnvm::ObjectPtr const* fwd_node) {
   return MakeNode(op_name, name, &inputs, dict, fwd_node);
 }
 
-
 // quick helper to make node
 inline std::vector<nnvm::NodeEntry> MakeGradNode(
-    const char* op_name, const nnvm::ObjectPtr& n,
+    const char* op_name,
+    const nnvm::ObjectPtr& n,
     const std::vector<nnvm::NodeEntry>& inputs,
     const std::unordered_map<std::string, std::string>& dict) {
-  auto p = MakeNode(op_name, n->attrs.name + "_backward",
-                    &inputs, &dict, &n);
+  auto p = MakeNode(op_name, n->attrs.name + "_backward", &inputs, &dict, &n);
 
   return CreateNodeEntries(p);
 }
 
 // quick helper to make gradient nodes that simply pass back zero. could be used in output ops.
-inline std::vector<nnvm::NodeEntry> MakeZeroGradNodes(
-    const nnvm::ObjectPtr& n,
-    const std::vector<nnvm::NodeEntry>& ograds) {
+inline std::vector<nnvm::NodeEntry> MakeZeroGradNodes(const nnvm::ObjectPtr& n,
+                                                      const std::vector<nnvm::NodeEntry>& ograds) {
   std::vector<nnvm::NodeEntry> ret;
   for (uint32_t i = 0; i < n->num_inputs(); ++i) {
     std::ostringstream os;
@@ -448,17 +443,16 @@ inline std::vector<nnvm::NodeEntry> MakeZeroGradNodes(
   return ret;
 }
 
-
 // check whether all output grads are zero.
 inline bool CheckGradAllZero(const std::vector<nnvm::NodeEntry>& ograds) {
-  static const auto zero_op = nnvm::Op::Get("_zeros");
+  static const auto zero_op      = nnvm::Op::Get("_zeros");
   static const auto zero_like_op = nnvm::Op::Get("zeros_like");
   if (ograds.empty())
     return false;
   for (const auto& grad : ograds) {
     if (!grad.node)
       return false;
-    if (grad.node->op() != zero_op && grad.node->op() != zero_like_op )
+    if (grad.node->op() != zero_op && grad.node->op() != zero_like_op)
       return false;
   }
   return true;
@@ -467,20 +461,20 @@ inline bool CheckGradAllZero(const std::vector<nnvm::NodeEntry>& ograds) {
 // make gradient node that doesn't add to objective.
 // i.e. igrads are always zero when ograds are zero.
 inline std::vector<nnvm::NodeEntry> MakeNonlossGradNode(
-    const char* op_name, const nnvm::ObjectPtr& n,
+    const char* op_name,
+    const nnvm::ObjectPtr& n,
     const std::vector<nnvm::NodeEntry>& ograds,
     const std::vector<nnvm::NodeEntry>& inputs,
     const std::unordered_map<std::string, std::string>& dict) {
   if (CheckGradAllZero(ograds))
     return MakeZeroGradNodes(n, ograds);
-  auto p = MakeNode(op_name, n->attrs.name + "_backward",
-                    nullptr, &dict, &n);
+  auto p = MakeNode(op_name, n->attrs.name + "_backward", nullptr, &dict, &n);
 
   return CreateNodeEntries(p, &ograds, &inputs);
 }
 
 /*! \brief Parse keyword arguments as PType arguments and save to parsed */
-template<typename PType>
+template <typename PType>
 inline void ParamParser(nnvm::NodeAttrs* attrs) {
   PType param;
   try {
@@ -499,26 +493,27 @@ inline void ParamParser(nnvm::NodeAttrs* attrs) {
   attrs->parsed = std::move(param);
 }
 
-inline void CheckAllRowsPresent(const NDArray& arr, const std::string& func,
+inline void CheckAllRowsPresent(const NDArray& arr,
+                                const std::string& func,
                                 const std::string& param) {
   if (arr.storage_type() == kRowSparseStorage) {
-    CHECK(arr.storage_shape()[0] == arr.shape()[0]) << func
-          << " for RowSparse " << param << " is only implemented for "
-          << "RowSparse " << param << " with all rows containing non-zeros. "
-          << "Expects " << param << ".data.shape[0] (" << arr.storage_shape()[0]
-          << ") == " << param << ".shape[0] (" << arr.shape()[0] << ").";
+    CHECK(arr.storage_shape()[0] == arr.shape()[0])
+        << func << " for RowSparse " << param << " is only implemented for "
+        << "RowSparse " << param << " with all rows containing non-zeros. "
+        << "Expects " << param << ".data.shape[0] (" << arr.storage_shape()[0] << ") == " << param
+        << ".shape[0] (" << arr.shape()[0] << ").";
   } else {
     CHECK(arr.storage_type() == kDefaultStorage);
   }
 }
 
 inline void LogUnimplementedOp(const nnvm::NodeAttrs& attrs,
-                               const OpContext &ctx,
-                               const std::vector<NDArray> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<NDArray> &outputs) {
-    using common::operator_string;
-    LOG(FATAL) << "Not implemented: " << operator_string(attrs, ctx, inputs, req, outputs);
+                               const OpContext& ctx,
+                               const std::vector<NDArray>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<NDArray>& outputs) {
+  using common::operator_string;
+  LOG(FATAL) << "Not implemented: " << operator_string(attrs, ctx, inputs, req, outputs);
 }
 
 class OpSignature {
@@ -551,9 +546,9 @@ class OpSignature {
    */
 
 #if MXNET_USE_ONEDNN == 1
-  void AddSign(const mkldnn::memory &mem) {
+  void AddSign(const mkldnn::memory& mem) {
     auto desc = mem.get_desc();
-    hash = hash * 2 + desc.data.format_kind;
+    hash      = hash * 2 + desc.data.format_kind;
     eles.push_back(desc.data.format_kind);
     hash = hash * 2 + desc.data.data_type;
     eles.push_back(desc.data.data_type);
@@ -605,19 +600,19 @@ class OpSignature {
         eles.push_back(desc.data.format_desc.rnn_packed_desc.size);
         break;
       default:
-      // nothing need to add
+        // nothing need to add
         break;
     }
   }
 #endif
 
-  void AddSign(const std::vector<NDArray> &arrs) {
-    for (auto &arr : arrs) {
+  void AddSign(const std::vector<NDArray>& arrs) {
+    for (auto& arr : arrs) {
       AddSign(arr);
     }
   }
 
-  void AddSign(const NDArray &arr) {
+  void AddSign(const NDArray& arr) {
 #if MXNET_USE_ONEDNN == 1
     if (arr.IsMKLDNNData()) {
       AddSign(*(arr.GetMKLDNNData()));
@@ -631,13 +626,13 @@ class OpSignature {
 #endif
   }
 
-  void AddSign(const mxnet::ShapeVector &shapes) {
-    for (auto &shape : shapes) {
+  void AddSign(const mxnet::ShapeVector& shapes) {
+    for (auto& shape : shapes) {
       AddSign(shape);
     }
   }
 
-  void AddSign(const mxnet::TShape &shape) {
+  void AddSign(const mxnet::TShape& shape) {
     for (int i = 0; i < shape.ndim(); i++) {
       hash = hash * 2 + shape[i];
       eles.push_back(shape[i]);
@@ -654,7 +649,7 @@ class OpSignature {
     eles.push_back(val);
   }
 
-  bool operator==(const OpSignature &sign) const {
+  bool operator==(const OpSignature& sign) const {
     if (hash != sign.hash)
       return false;
     if (eles.size() != sign.eles.size())
@@ -671,28 +666,26 @@ class OpSignature {
 };
 
 struct OpHash {
-  size_t operator()(const OpSignature &sign) const {
+  size_t operator()(const OpSignature& sign) const {
     return sign.GetHash();
   }
 };
 
-template<typename ParamType>
-class ParamOpSign: public OpSignature {
+template <typename ParamType>
+class ParamOpSign : public OpSignature {
   const ParamType param;
 
-  static size_t hash(const ParamType &param) {
+  static size_t hash(const ParamType& param) {
     std::hash<ParamType> fn;
     return fn(param);
   }
 
  public:
-  explicit ParamOpSign(const ParamType &_param): OpSignature(
-      hash(_param)), param(_param) {
-  }
+  explicit ParamOpSign(const ParamType& _param) : OpSignature(hash(_param)), param(_param) {}
 
-  bool operator==(const ParamOpSign<ParamType> &sign) const {
-    const OpSignature &this_upper = *this;
-    const OpSignature &other_upper = sign;
+  bool operator==(const ParamOpSign<ParamType>& sign) const {
+    const OpSignature& this_upper  = *this;
+    const OpSignature& other_upper = sign;
     return this_upper == other_upper && param == sign.param;
   }
 };
diff --git a/src/operator/operator_tune-inl.h b/src/operator/operator_tune-inl.h
index 6e32c8e12ef9..efd4170dbd9b 100644
--- a/src/operator/operator_tune-inl.h
+++ b/src/operator/operator_tune-inl.h
@@ -36,9 +36,9 @@
 #include "./operator_tune.h"
 
 #if (__GNUC__ >= 4 || (__GNUC__ >= 3 && __GNUC_MINOR__ >= 4)) && !defined(__mips__)
-#  define HAS_CXA_DEMANGLE 1
+#define HAS_CXA_DEMANGLE 1
 #else
-#  define HAS_CXA_DEMANGLE 0
+#define HAS_CXA_DEMANGLE 0
 #endif
 
 #if HAS_CXA_DEMANGLE
@@ -56,7 +56,7 @@ namespace op {
 #endif
 #endif  // MXNET_NO_INLINE
 
-#define OUTSIDE_COUNT_SHIFT  3
+#define OUTSIDE_COUNT_SHIFT 3
 
 namespace tune {
 
@@ -65,7 +65,7 @@ namespace tune {
  * \param tm  Scalar TuningMode value
  * \return Character pointer to a string representing the TuningMode value
  */
-inline const char *TuningModeToString(const TuningMode tm) {
+inline const char* TuningModeToString(const TuningMode tm) {
   switch (tm) {
     case kAuto:
       return "Auto";
@@ -102,10 +102,10 @@ inline const char *TuningModeToString(const TuningMode tm) {
  *
  * Results and efficiency of the tuning is tested in the gtest OMP_TUNING test suite
  */
-template<typename DType>
+template <typename DType>
 class OperatorTune : public OperatorTuneByType<DType> {
  public:
-  using Tick = OperatorTuneBase::Tick;
+  using Tick       = OperatorTuneBase::Tick;
   using duration_t = OperatorTuneBase::duration_t;
   using OperatorTuneByType<DType>::tuning_mode_;
 
@@ -125,7 +125,7 @@ class OperatorTune : public OperatorTuneByType<DType> {
       initialized_ = true;
       // Generate some random data for calling the operator kernels
       data_set_ =
-        std::unique_ptr<DType[]>(reinterpret_cast<DType*>(new char[0x100 * sizeof(DType)]));
+          std::unique_ptr<DType[]>(reinterpret_cast<DType*>(new char[0x100 * sizeof(DType)]));
       std::random_device rd;
       std::mt19937 gen(rd());
       if (!std::is_integral<DType>::value) {
@@ -153,8 +153,8 @@ class OperatorTune : public OperatorTuneByType<DType> {
       }
       // Use this environment variable to generate new tuning statistics
       // In order to avoid printing too many copies, only the float32 object prints
-      output_tuning_data_ = mshadow::DataType<DType>::kFlag == mshadow::kFloat32
-                            && dmlc::GetEnv("MXNET_OUTPUT_TUNING_DATA", false);
+      output_tuning_data_ = mshadow::DataType<DType>::kFlag == mshadow::kFloat32 &&
+                            dmlc::GetEnv("MXNET_OUTPUT_TUNING_DATA", false);
       // If outputting tuning data, then also output verbose logging info
       OperatorTuneBase::verbose_tuning_info_ = dmlc::GetEnv("MXNET_VERBOSE_TUNING_INFO", false);
 
@@ -190,7 +190,7 @@ class OperatorTune : public OperatorTuneByType<DType> {
    * \param tune_func Function to call which tunes the operator
    * \return true if the tune operation was scheduled
    */
-  template<typename OP>
+  template <typename OP>
   static bool ScheduleTune(void (*tune_func)()) {
 #ifdef MXNET_USE_OPERATOR_TUNING
     if (tune_func) {
@@ -209,7 +209,7 @@ class OperatorTune : public OperatorTuneByType<DType> {
    * \tparam OP kernel operator type
    * \return true if the operator/kernel is tuned
    */
-  template<typename OP>
+  template <typename OP>
   static bool IsTuned() {
     return operator_names_.find(demangle(typeid(OP).name())) != operator_names_.end();
   }
@@ -219,15 +219,16 @@ class OperatorTune : public OperatorTuneByType<DType> {
    */
   static bool TuneAll() {
     Initialize();
-    std::list<void (*)()> *tl = GetTuningList();
-    const size_t size_save = tl->size();  // For checking if anything asynchronous is
+    std::list<void (*)()>* tl = GetTuningList();
+    const size_t size_save    = tl->size();  // For checking if anything asynchronous is
     // adding or removing items, which is forbidden
     if (output_tuning_data_ && !tl->empty()) {
       // Only emit this once, use the most common case, 'float32'
       if (mshadow::DataType<DType>::kFlag == mshadow::kFloat32) {
         std::cout << "OperatorTuneBase::duration_t "
                   << "OperatorTuneBase::omp_overhead_ns_ = " << OperatorTuneBase::omp_overhead_ns_
-                  << ";" << std::endl << std::flush;
+                  << ";" << std::endl
+                  << std::flush;
       }
     }
     const Tick start = std::chrono::high_resolution_clock::now();
@@ -236,8 +237,8 @@ class OperatorTune : public OperatorTuneByType<DType> {
     }
     if (OperatorTuneBase::verbose_tuning_info_) {
       const duration_t duration = OperatorTune::GetDurationInNanoseconds(start);
-      LOG(INFO) << "Op Tuning  for " << type_name<DType>()
-                << " took " << (duration / 1000000) << " ms";
+      LOG(INFO) << "Op Tuning  for " << type_name<DType>() << " took " << (duration / 1000000)
+                << " ms";
     }
     CHECK_EQ(size_save, tl->size()) << "Tuning list size should not have changed while tuning";
     tl->clear();
@@ -258,20 +259,18 @@ class OperatorTune : public OperatorTuneByType<DType> {
    * \brief Get the list of tuning function calls for the operators
    * \return Pointer to list of tuning function calls
    */
-  static std::list<void (*)()> *GetTuningList();
+  static std::list<void (*)()>* GetTuningList();
 
   /*!
    * \brief Demangle typeid::name() in order to generate source macros
    * \param name C++ Mangled name
    * \return Demangled name as string
    */
-  static inline std::string demangle(const char *name) {
+  static inline std::string demangle(const char* name) {
 #if HAS_CXA_DEMANGLE
     int status = -4;  // some arbitrary value to eliminate the compiler warning
-    std::unique_ptr<char, void (*)(void *)> res{
-      abi::__cxa_demangle(name, nullptr, nullptr, &status),
-      &std::free
-    };
+    std::unique_ptr<char, void (*)(void*)> res{abi::__cxa_demangle(name, nullptr, nullptr, &status),
+                                               &std::free};
     return status ? name : res.get();
 #else
     return name;
@@ -283,7 +282,8 @@ class OperatorTune : public OperatorTuneByType<DType> {
    * \tparam T Type
    * \return std::string representing the human-readable demangled type name
    */
-  template<typename T> static inline std::string type_name() {
+  template <typename T>
+  static inline std::string type_name() {
     return demangle(typeid(T).name());
   }
 
@@ -305,7 +305,7 @@ class OperatorTune : public OperatorTuneByType<DType> {
       }
     }
     const OperatorTuneBase::duration_t no_omp_duration =
-      OperatorTuneBase::GetDurationInNanoseconds(start);
+        OperatorTuneBase::GetDurationInNanoseconds(start);
 
     // Scale OMP iterations by type calculation complexity
     double factor;
@@ -338,16 +338,16 @@ class OperatorTune : public OperatorTuneByType<DType> {
     }
 
     wl_count = static_cast<int>(factor * OperatorTuneBase::WORKLOAD_COUNT * omp_thread_count);
-    start = std::chrono::high_resolution_clock::now();
+    start    = std::chrono::high_resolution_clock::now();
     for (size_t i = 0; i < OUTSIDE_COUNT; ++i) {
-      #pragma omp parallel for num_threads(omp_thread_count)
+#pragma omp parallel for num_threads(omp_thread_count)
       for (int x = 0; x < wl_count; ++x) {
         // trivial operation
         volatile_int_ += x;
       }
     }
-    const duration_t omp_duration = OperatorTuneBase::GetDurationInNanoseconds(start)
-                                    - no_omp_duration;
+    const duration_t omp_duration =
+        OperatorTuneBase::GetDurationInNanoseconds(start) - no_omp_duration;
     return omp_duration >> OUTSIDE_COUNT_SHIFT;
   }
 
@@ -391,13 +391,12 @@ class OperatorTune : public OperatorTuneByType<DType> {
      * \return reference to the modified string. This is the same std::string object as what was
      *         supplied in the parameters
      */
-    static std::string &trim(std::string *s) {
-      s->erase(s->begin(), std::find_if(s->begin(), s->end(), [](int ch) {
-        return !std::isspace(ch);
-      }));
-      s->erase(std::find_if(s->rbegin(), s->rend(), [](int ch) {
-        return !std::isspace(ch);
-      }).base(), s->end());
+    static std::string& trim(std::string* s) {
+      s->erase(s->begin(),
+               std::find_if(s->begin(), s->end(), [](int ch) { return !std::isspace(ch); }));
+      s->erase(
+          std::find_if(s->rbegin(), s->rend(), [](int ch) { return !std::isspace(ch); }).base(),
+          s->end());
       return *s;
     }
 
@@ -406,7 +405,7 @@ class OperatorTune : public OperatorTuneByType<DType> {
      * \param s String to tokenize
      * \return std::list of tokens
      */
-    static std::list<std::string> string2list(const std::string &s) {
+    static std::list<std::string> string2list(const std::string& s) {
       std::list<std::string> res;
       std::istringstream iss(s);
       std::string token;
@@ -537,12 +536,12 @@ class OperatorTune : public OperatorTuneByType<DType> {
  * \brief Class that tunes unary operators
  * \tparam DType Data type to be used when tuning the kernel operations
  */
-template<typename DType>
+template <typename DType>
 class UnaryOpTune : public OperatorTune<DType> {
  protected:
   typedef OperatorTune<DType> Super;
   using duration_t = typename Super::duration_t;
-  using Tick = typename Super::Tick;
+  using Tick       = typename Super::Tick;
 
   /*!
    * \brief Determine the time it takes a kernel operator to execute WORKLOAD_COUNT iterations
@@ -550,11 +549,11 @@ class UnaryOpTune : public OperatorTune<DType> {
    * \tparam OP Kernel operator
    * \return Duration in nanoseconds for the 'WORKLOAD_COUNT' operations
    */
-  template<typename OP>
+  template <typename OP>
   static duration_t GetBlankWorkload() {
     DType tmp;
-    volatile DType *res = &tmp;
-    const Tick start = std::chrono::high_resolution_clock::now();
+    volatile DType* res = &tmp;
+    const Tick start    = std::chrono::high_resolution_clock::now();
     for (size_t i = 0; i < Super::WORKLOAD_COUNT; ++i) {
       // Use a logical AND instead of mod to avoid affecting the timing result with a slow divide
       *res += OP::Map();
@@ -569,11 +568,11 @@ class UnaryOpTune : public OperatorTune<DType> {
    * \tparam OP Kernel operator
    * \return Duration in nanoseconds for the 'WORKLOAD_COUNT' operations
    */
-  template<typename OP>
+  template <typename OP>
   static duration_t GetUnaryWorkload() {
     DType tmp;
-    volatile DType *res = &tmp;
-    const Tick start = std::chrono::high_resolution_clock::now();
+    volatile DType* res = &tmp;
+    const Tick start    = std::chrono::high_resolution_clock::now();
     for (size_t i = 0; i < Super::WORKLOAD_COUNT; ++i) {
       // Use a logical AND instead of mod to avoid affecting the timing result with a slow divide
       *res = OP::Map(Super::data_set_[i & 0xFF]);
@@ -588,11 +587,11 @@ class UnaryOpTune : public OperatorTune<DType> {
    * \tparam OP Kernel operator
    * \return Duration in nanoseconds for the 'WORKLOAD_COUNT' operations
    */
-  template<typename OP>
+  template <typename OP>
   static inline duration_t GetBinaryWorkload() {
     DType tmp;
-    volatile DType *res = &tmp;
-    const Tick start = std::chrono::high_resolution_clock::now();
+    volatile DType* res = &tmp;
+    const Tick start    = std::chrono::high_resolution_clock::now();
     for (size_t i = 0; i < Super::WORKLOAD_COUNT; ++i) {
       // Use a logical AND instead of mod to avoid affecting the timing result with a slow divide
       *res = OP::Map(Super::data_set_[i & 0xFF], Super::data_set_[(i + 1) & 0xFF]);
@@ -607,16 +606,15 @@ class UnaryOpTune : public OperatorTune<DType> {
    * \tparam OP Kernel operator
    * \return Duration in nanoseconds for the 'WORKLOAD_COUNT' operations
    */
-  template<typename OP>
+  template <typename OP>
   static duration_t GetTertiaryWorkload() {
     DType tmp;
-    volatile DType *res = &tmp;
-    const Tick start = std::chrono::high_resolution_clock::now();
+    volatile DType* res = &tmp;
+    const Tick start    = std::chrono::high_resolution_clock::now();
     for (size_t i = 0; i < Super::WORKLOAD_COUNT; ++i) {
       // Use a logical AND instead of mod to avoid affecting the timing result with a slow divide
-      *res = OP::Map(Super::data_set_[i & 0xFF],
-                     Super::data_set_[(i + 1) & 0xFF],
-                     Super::data_set_[i & 0xFF]);
+      *res = OP::Map(
+          Super::data_set_[i & 0xFF], Super::data_set_[(i + 1) & 0xFF], Super::data_set_[i & 0xFF]);
     }
     const duration_t omp_duration = Super::GetDurationInNanoseconds(start);
     return omp_duration ? omp_duration : 1;
@@ -628,10 +626,10 @@ class UnaryOpTune : public OperatorTune<DType> {
    * \tparam OP Kernel operator
    * \return Duration in nanoseconds for the 'WORKLOAD_COUNT' operations
    */
-  template<typename OP>
+  template <typename OP>
   static duration_t GetBlankWorkloadEx() {
     std::unique_ptr<DType[]> tmp(new DType[Super::WORKLOAD_COUNT]);
-    DType *tmp_ptr = tmp.get();
+    DType* tmp_ptr   = tmp.get();
     const Tick start = std::chrono::high_resolution_clock::now();
     for (size_t i = 0; i < Super::WORKLOAD_COUNT; ++i) {
       OP::Map(i, tmp_ptr);
@@ -647,13 +645,13 @@ class UnaryOpTune : public OperatorTune<DType> {
    *        This function tunes an operator which takes no arguments
    * \tparam OP The kernel operator to be tuned
    */
-  template<typename OP>
+  template <typename OP>
   static void TuneBlankOperator() {
     mxnet::op::mxnet_op::tuned_op<OP, DType>::workload_[0] = GetBlankWorkload<OP>();
     if (Super::output_tuning_data_) {
-      std::cout << "IMPLEMENT_UNARY_WORKLOAD_FWD("
-                << Super::template type_name<OP>()
-                << ");  // NOLINT()" << std::endl << std::flush;  // For long lines
+      std::cout << "IMPLEMENT_UNARY_WORKLOAD_FWD(" << Super::template type_name<OP>()
+                << ");  // NOLINT()" << std::endl
+                << std::flush;  // For long lines
     }
   }
 
@@ -663,13 +661,13 @@ class UnaryOpTune : public OperatorTune<DType> {
    *        This function tunes an operator which takes one argument
    * \tparam OP The kernel operator to be tuned
    */
-  template<typename OP>
+  template <typename OP>
   static void TuneUnaryOperator() {
     mxnet::op::mxnet_op::tuned_op<OP, DType>::workload_[0] = GetUnaryWorkload<OP>();
     if (Super::output_tuning_data_) {
-      std::cout << "IMPLEMENT_UNARY_WORKLOAD_FWD("
-                << Super::template type_name<OP>()
-                << ");  // NOLINT()" << std::endl << std::flush;  // For long lines
+      std::cout << "IMPLEMENT_UNARY_WORKLOAD_FWD(" << Super::template type_name<OP>()
+                << ");  // NOLINT()" << std::endl
+                << std::flush;  // For long lines
     }
   }
 
@@ -679,14 +677,14 @@ class UnaryOpTune : public OperatorTune<DType> {
    *        This function tunes a backward operator which takes one argument
    * \tparam OP The kernel operator to be tuned
    */
-  template<typename OP>
+  template <typename OP>
   static void TuneUnaryBackwardOperator() {
     mxnet::op::mxnet_op::tuned_op<mxnet_op::backward_grad_tuned<OP>, DType>::workload_[0] =
-      GetBinaryWorkload<mxnet::op::mxnet_op::backward_grad_tuned<OP>>();
+        GetBinaryWorkload<mxnet::op::mxnet_op::backward_grad_tuned<OP>>();
     if (Super::output_tuning_data_) {
-      std::cout << "IMPLEMENT_UNARY_WORKLOAD_BWD("
-                << Super::template type_name<OP>()
-                << ");  // NOLINT()" << std::endl << std::flush;  // For long lines
+      std::cout << "IMPLEMENT_UNARY_WORKLOAD_BWD(" << Super::template type_name<OP>()
+                << ");  // NOLINT()" << std::endl
+                << std::flush;  // For long lines
     }
   }
 
@@ -697,13 +695,13 @@ class UnaryOpTune : public OperatorTune<DType> {
    *        This function tunes an operator which takes no arguments
    * \tparam OP The kernel operator to be tuned
    */
-  template<typename OP>
+  template <typename OP>
   static void TuneBlankOperatorEx() {
     mxnet::op::mxnet_op::tuned_op<OP, DType>::workload_[0] = GetBlankWorkloadEx<OP>();
     if (Super::output_tuning_data_) {
-      std::cout << "IMPLEMENT_BLANK_WORKLOAD_FWD("
-                << Super::template type_name<OP>()
-                << ");  // NOLINT()" << std::endl << std::flush;  // For long lines
+      std::cout << "IMPLEMENT_BLANK_WORKLOAD_FWD(" << Super::template type_name<OP>()
+                << ");  // NOLINT()" << std::endl
+                << std::flush;  // For long lines
     }
   }
 
@@ -715,11 +713,10 @@ class UnaryOpTune : public OperatorTune<DType> {
    * \param thread_count Number of OMP threads available to perform the iterations
    * \returns Whether it's faster to use OMP for these iterations
    */
-  template<typename OP>
+  template <typename OP>
   inline static bool UseOMP(size_t N, size_t thread_count) {
-      return OperatorTune<DType>::UseOMP(N,
-                                         thread_count,
-                                         static_cast<uint64_t>(N) * OP::workload_[0]);
+    return OperatorTune<DType>::UseOMP(
+        N, thread_count, static_cast<uint64_t>(N) * OP::workload_[0]);
   }
 };
 
@@ -727,7 +724,7 @@ class UnaryOpTune : public OperatorTune<DType> {
  * \brief Class that tunes binary and unary operators
  * \tparam DType Data type to be used when tuning the kernel operations
  */
-template<typename DType>
+template <typename DType>
 class BinaryOpTune : public UnaryOpTune<DType> {
  protected:
   typedef UnaryOpTune<DType> Super;
@@ -737,13 +734,13 @@ class BinaryOpTune : public UnaryOpTune<DType> {
    * \brief Tune a generic binary operator
    * @tparam OP - Operator type
    */
-  template<typename OP>
+  template <typename OP>
   static void TuneBinaryOperator() {
     mxnet_op::tuned_op<OP, DType>::workload_[0] = Super::template GetBinaryWorkload<OP>();
     if (Super::Super::output_tuning_data_) {
-      std::cout << "IMPLEMENT_BINARY_WORKLOAD_FWD("
-                << Super::template type_name<OP>()
-                << ");  // NOLINT()" << std::endl << std::flush;  // For long lines
+      std::cout << "IMPLEMENT_BINARY_WORKLOAD_FWD(" << Super::template type_name<OP>()
+                << ");  // NOLINT()" << std::endl
+                << std::flush;  // For long lines
     }
   }
 
@@ -751,14 +748,14 @@ class BinaryOpTune : public UnaryOpTune<DType> {
    * \brief Tune binary backward operator
    * \tparam OP - operator
    */
-  template<typename OP>
+  template <typename OP>
   static void TuneBinaryBackwardOperator() {
     mxnet::op::mxnet_op::tuned_op<mxnet_op::backward_grad_tuned<OP>, DType>::workload_[0] =
-      Super::template GetTertiaryWorkload<mxnet::op::mxnet_op::backward_grad_tuned<OP>>();
+        Super::template GetTertiaryWorkload<mxnet::op::mxnet_op::backward_grad_tuned<OP>>();
     if (Super::Super::output_tuning_data_) {
-      std::cout << "IMPLEMENT_BINARY_WORKLOAD_BWD("
-                << Super::template type_name<OP>()
-                << ");  // NOLINT()" << std::endl << std::flush;  // For long lines
+      std::cout << "IMPLEMENT_BINARY_WORKLOAD_BWD(" << Super::template type_name<OP>()
+                << ");  // NOLINT()" << std::endl
+                << std::flush;  // For long lines
     }
   }
 };
diff --git a/src/operator/operator_tune.cc b/src/operator/operator_tune.cc
index c240fbc52ce1..f83885da1ba1 100644
--- a/src/operator/operator_tune.cc
+++ b/src/operator/operator_tune.cc
@@ -31,22 +31,29 @@ namespace op {
  * \brief Shared static variables for all OperatorTune data types
  */
 std::atomic<bool> OperatorTuneBase::calculated_(false);
-bool OperatorTuneBase::verbose_tuning_info_ = false;
+bool OperatorTuneBase::verbose_tuning_info_   = false;
 double OperatorTuneBase::tuning_weight_scale_ = 0.0;
 
 /*!
  * \brief Instantiate static variables for OperatorTune<DType>, where 'DType' is specified
  */
-#define IMPLEMENT_OPERATOR_TUNE_STATICS_FOR_TYPE(__typ$) \
-  template<> bool OperatorTune<__typ$>::initialized_ = false; \
-  template<> std::unique_ptr<__typ$[]> OperatorTune<__typ$>::data_set_ = nullptr; \
-  template<> volatile tune::TuningMode OperatorTuneByType<__typ$>::tuning_mode_ = tune::kAuto; \
-  template<> volatile int OperatorTune<__typ$>::volatile_int_ = 9;  /* arbitrary number */ \
-  template<> std::unordered_set<std::string> OperatorTune<__typ$>::operator_names_({}); \
-  template<> bool OperatorTune<__typ$>::output_tuning_data_ = false; \
-  template<> std::list<void (*)()> *OperatorTune<__typ$>::GetTuningList() { \
-    static std::list<void (*)()> ll; \
-    return &ll; \
+#define IMPLEMENT_OPERATOR_TUNE_STATICS_FOR_TYPE(__typ$)                            \
+  template <>                                                                       \
+  bool OperatorTune<__typ$>::initialized_ = false;                                  \
+  template <>                                                                       \
+  std::unique_ptr<__typ$[]> OperatorTune<__typ$>::data_set_ = nullptr;              \
+  template <>                                                                       \
+  volatile tune::TuningMode OperatorTuneByType<__typ$>::tuning_mode_ = tune::kAuto; \
+  template <>                                                                       \
+  volatile int OperatorTune<__typ$>::volatile_int_ = 9; /* arbitrary number */      \
+  template <>                                                                       \
+  std::unordered_set<std::string> OperatorTune<__typ$>::operator_names_({});        \
+  template <>                                                                       \
+  bool OperatorTune<__typ$>::output_tuning_data_ = false;                           \
+  template <>                                                                       \
+  std::list<void (*)()>* OperatorTune<__typ$>::GetTuningList() {                    \
+    static std::list<void (*)()> ll;                                                \
+    return &ll;                                                                     \
   }
 
 /*!
@@ -72,7 +79,7 @@ IMPLEMENT_OPERATOR_TUNE_STATICS_FOR_TYPE(uint64_t);
  * \tparam OP Operator type
  * \tparam DType Data type
  */
-template<typename OP, typename DType>
+template <typename OP, typename DType>
 struct static_init_var {
   static bool init_;
 };
@@ -82,126 +89,137 @@ struct static_init_var {
  *        appending the data type to the end of the arguments
  */
 #define MSHADOW_MACRO_FOREACH_TYPE(__macro$, ...) \
-  __macro$(__VA_ARGS__, float); \
-  __macro$(__VA_ARGS__, double); \
-  __macro$(__VA_ARGS__, mshadow::half::half_t); \
+  __macro$(__VA_ARGS__, float);                   \
+  __macro$(__VA_ARGS__, double);                  \
+  __macro$(__VA_ARGS__, mshadow::half::half_t);   \
   __macro$(__VA_ARGS__, mshadow::bfloat::bf16_t); \
-  __macro$(__VA_ARGS__, uint8_t); \
-  __macro$(__VA_ARGS__, int8_t); \
-  __macro$(__VA_ARGS__, int32_t); \
-  __macro$(__VA_ARGS__, int64_t); \
-  __macro$(__VA_ARGS__, int16_t); \
-  __macro$(__VA_ARGS__, uint16_t); \
-  __macro$(__VA_ARGS__, uint32_t); \
+  __macro$(__VA_ARGS__, uint8_t);                 \
+  __macro$(__VA_ARGS__, int8_t);                  \
+  __macro$(__VA_ARGS__, int32_t);                 \
+  __macro$(__VA_ARGS__, int64_t);                 \
+  __macro$(__VA_ARGS__, int16_t);                 \
+  __macro$(__VA_ARGS__, uint16_t);                \
+  __macro$(__VA_ARGS__, uint32_t);                \
   __macro$(__VA_ARGS__, uint64_t)
 
 #define MSHADOW_MACRO_FOREACH_TYPE_WITH_BOOL(__macro$, ...) \
-  __macro$(__VA_ARGS__, float); \
-  __macro$(__VA_ARGS__, double); \
-  __macro$(__VA_ARGS__, mshadow::half::half_t); \
-  __macro$(__VA_ARGS__, mshadow::bfloat::bf16_t); \
-  __macro$(__VA_ARGS__, uint8_t); \
-  __macro$(__VA_ARGS__, int8_t); \
-  __macro$(__VA_ARGS__, int32_t); \
-  __macro$(__VA_ARGS__, int64_t); \
-  __macro$(__VA_ARGS__, bool); \
-  __macro$(__VA_ARGS__, int16_t); \
-  __macro$(__VA_ARGS__, uint16_t); \
-  __macro$(__VA_ARGS__, uint32_t); \
+  __macro$(__VA_ARGS__, float);                             \
+  __macro$(__VA_ARGS__, double);                            \
+  __macro$(__VA_ARGS__, mshadow::half::half_t);             \
+  __macro$(__VA_ARGS__, mshadow::bfloat::bf16_t);           \
+  __macro$(__VA_ARGS__, uint8_t);                           \
+  __macro$(__VA_ARGS__, int8_t);                            \
+  __macro$(__VA_ARGS__, int32_t);                           \
+  __macro$(__VA_ARGS__, int64_t);                           \
+  __macro$(__VA_ARGS__, bool);                              \
+  __macro$(__VA_ARGS__, int16_t);                           \
+  __macro$(__VA_ARGS__, uint16_t);                          \
+  __macro$(__VA_ARGS__, uint32_t);                          \
   __macro$(__VA_ARGS__, uint64_t)
 
-#define IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$) \
-  namespace mxnet_op { \
-  template<> std::vector<float> mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::workload_ = \
-    { static_cast<float>(INT_MAX >> 3) }; \
-  }  /* namespace mxnet_op */
+#define IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$)                         \
+  namespace mxnet_op {                                                           \
+  template <>                                                                    \
+  std::vector<float> mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::workload_ = { \
+      static_cast<float>(INT_MAX >> 3)};                                         \
+  } /* namespace mxnet_op */
 /*!
  * \brief Implement tuning objects for a forward blank (no arguments) kernel operator
  */
-#define _IMPLEMENT_BLANK_WORKLOAD_FWD(__op$, __typ$) \
-  IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$); \
-  namespace mxnet_op { \
-  template<> bool ::mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::UseOMP( \
-    size_t N, size_t omp_threads) { \
-    return ::mxnet::op::UnaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op<__op$, __typ$>>( \
-      N, omp_threads); \
-  }}  /* namespace mxnet_op */ \
-  template<> bool static_init_var<__op$, __typ$>::init_ = \
-    ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>( \
-      ::mxnet::op::UnaryOpTune<__typ$>::TuneBlankOperatorEx<__op$>)
+#define _IMPLEMENT_BLANK_WORKLOAD_FWD(__op$, __typ$)                                          \
+  IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$);                                           \
+  namespace mxnet_op {                                                                        \
+  template <>                                                                                 \
+  bool ::mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::UseOMP(size_t N, size_t omp_threads) { \
+    return ::mxnet::op::UnaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op<__op$, __typ$>>(       \
+        N, omp_threads);                                                                      \
+  }                                                                                           \
+  } /* namespace mxnet_op */                                                                  \
+  template <>                                                                                 \
+  bool static_init_var<__op$, __typ$>::init_ =                                                \
+      ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>(                                 \
+          ::mxnet::op::UnaryOpTune<__typ$>::TuneBlankOperatorEx<__op$>)
 
 /*!
  * \brief Implement tuning objects for a forward unary kernel operator
  */
-#define _IMPLEMENT_UNARY_WORKLOAD_FWD(__op$, __typ$) \
-  IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$); \
-  namespace mxnet_op { \
-  template<> bool ::mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::UseOMP( \
-    size_t N, size_t omp_threads) { \
-    return ::mxnet::op::UnaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op<__op$, __typ$>>( \
-      N, omp_threads); \
-  }}  /* namespace mxnet_op */ \
-  template<> bool static_init_var<__op$, __typ$>::init_ = \
-    ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>( \
-      ::mxnet::op::UnaryOpTune<__typ$>::TuneUnaryOperator<__op$>)
+#define _IMPLEMENT_UNARY_WORKLOAD_FWD(__op$, __typ$)                                          \
+  IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$);                                           \
+  namespace mxnet_op {                                                                        \
+  template <>                                                                                 \
+  bool ::mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::UseOMP(size_t N, size_t omp_threads) { \
+    return ::mxnet::op::UnaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op<__op$, __typ$>>(       \
+        N, omp_threads);                                                                      \
+  }                                                                                           \
+  } /* namespace mxnet_op */                                                                  \
+  template <>                                                                                 \
+  bool static_init_var<__op$, __typ$>::init_ =                                                \
+      ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>(                                 \
+          ::mxnet::op::UnaryOpTune<__typ$>::TuneUnaryOperator<__op$>)
 
 /*!
  * \brief Implement tuning objects for a backward unary kernel operator
  */
-#define _IMPLEMENT_UNARY_WORKLOAD_BWD(__op$, __typ$) \
+#define _IMPLEMENT_UNARY_WORKLOAD_BWD(__op$, __typ$)                                            \
   IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$); \
-  namespace mxnet_op { \
-  template<> \
-  bool ::mxnet::op::mxnet_op::tuned_op<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>::\
-    UseOMP(size_t N, size_t omp_threads) { \
-    return ::mxnet::op::UnaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op< \
-      ::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>>(N, omp_threads); \
-  }}  /* namespace mxnet_op */ \
-  template<> bool static_init_var<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>:: \
-    init_ = ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>( \
-      ::mxnet::op::UnaryOpTune<__typ$>::TuneUnaryBackwardOperator<__op$>)
+  namespace mxnet_op {                                                                          \
+  template <>                                                                                   \
+  bool ::mxnet::op::mxnet_op::tuned_op<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>,       \
+                                       __typ$>::UseOMP(size_t N, size_t omp_threads) {          \
+    return ::mxnet::op::UnaryOpTune<__typ$>::UseOMP<                                            \
+        mxnet_op::tuned_op<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>>(         \
+        N, omp_threads);                                                                        \
+  }                                                                                             \
+  } /* namespace mxnet_op */                                                                    \
+  template <>                                                                                   \
+  bool static_init_var<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>::init_ =      \
+      ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>(                                   \
+          ::mxnet::op::UnaryOpTune<__typ$>::TuneUnaryBackwardOperator<__op$>)
 
 /*!
  * \brief Implement tuning objects for a forward binary kernel operator
  */
-#define _IMPLEMENT_BINARY_WORKLOAD_FWD(__op$, __typ$) \
-  IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$); \
-  namespace mxnet_op { \
-  template<> bool ::mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::UseOMP( \
-    size_t N, size_t omp_threads) { \
-    return ::mxnet::op::BinaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op<__op$, __typ$>>( \
-      N, omp_threads); \
-  }}  /* namespace mxnet_op */ \
-  template<> bool static_init_var<__op$, __typ$>::init_ = \
-    ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>( \
-      ::mxnet::op::BinaryOpTune<__typ$>::TuneBinaryOperator<__op$>)
+#define _IMPLEMENT_BINARY_WORKLOAD_FWD(__op$, __typ$)                                         \
+  IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$, __typ$);                                           \
+  namespace mxnet_op {                                                                        \
+  template <>                                                                                 \
+  bool ::mxnet::op::mxnet_op::tuned_op<__op$, __typ$>::UseOMP(size_t N, size_t omp_threads) { \
+    return ::mxnet::op::BinaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op<__op$, __typ$>>(      \
+        N, omp_threads);                                                                      \
+  }                                                                                           \
+  } /* namespace mxnet_op */                                                                  \
+  template <>                                                                                 \
+  bool static_init_var<__op$, __typ$>::init_ =                                                \
+      ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>(                                 \
+          ::mxnet::op::BinaryOpTune<__typ$>::TuneBinaryOperator<__op$>)
 
 /*!
  * \brief Implement tuning objects for a backward binary kernel operator
  */
-#define _IMPLEMENT_BINARY_WORKLOAD_BWD(__op$, __typ$) \
+#define _IMPLEMENT_BINARY_WORKLOAD_BWD(__op$, __typ$)                                           \
   IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$); \
-  namespace mxnet_op { \
-  template<> \
-    bool ::mxnet::op::mxnet_op::tuned_op< \
-      ::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>:: \
-      UseOMP(size_t N, size_t omp_threads) { \
-    return ::mxnet::op::BinaryOpTune<__typ$>::UseOMP<mxnet_op::tuned_op< \
-      ::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>>(N, omp_threads); \
-  }}  /* namespace mxnet_op */ \
-  template<> bool static_init_var<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, \
-    __typ$>::init_ = \
-    ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>(  \
-      ::mxnet::op::BinaryOpTune<__typ$>::TuneBinaryBackwardOperator<__op$>)
+  namespace mxnet_op {                                                                          \
+  template <>                                                                                   \
+  bool ::mxnet::op::mxnet_op::tuned_op<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>,       \
+                                       __typ$>::UseOMP(size_t N, size_t omp_threads) {          \
+    return ::mxnet::op::BinaryOpTune<__typ$>::UseOMP<                                           \
+        mxnet_op::tuned_op<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>>(         \
+        N, omp_threads);                                                                        \
+  }                                                                                             \
+  } /* namespace mxnet_op */                                                                    \
+  template <>                                                                                   \
+  bool static_init_var<::mxnet::op::mxnet_op::backward_grad_tuned<__op$>, __typ$>::init_ =      \
+      ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$>(                                   \
+          ::mxnet::op::BinaryOpTune<__typ$>::TuneBinaryBackwardOperator<__op$>)
 
 /*!
  * \brief Implement tuning objects for a custom forward kernel operator
  */
-#define _IMPLEMENT_CUSTOM_WORKLOAD_FWD(__op$, __typ$) \
+#define _IMPLEMENT_CUSTOM_WORKLOAD_FWD(__op$, __typ$)       \
   IMPLEMENT_WORKLOAD_VALUE_FOR_TYPE(__op$<__typ$>, __typ$); \
-  template<> bool static_init_var<__op$<__typ$>, __typ$>::init_ = \
-    ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$<__typ$>>(\
-      __op$<__typ$>::Tune)
+  template <>                                               \
+  bool static_init_var<__op$<__typ$>, __typ$>::init_ =      \
+      ::mxnet::op::OperatorTune<__typ$>::ScheduleTune<__op$<__typ$>>(__op$<__typ$>::Tune)
 
 /*!
  * \brief Macros for manually adding new blank, unary and binary operators to the tuning set
@@ -241,224 +259,224 @@ struct static_init_var {
  *       integer value
  */
 OperatorTuneBase::duration_t OperatorTuneBase::omp_overhead_ns_ = 5000;
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::identity);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::identity_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::negation);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::reciprocal);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::reciprocal_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sigmoid);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sigmoid_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log_sigmoid);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log_sigmoid_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::mish);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mish_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::softsign);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::softsign_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::relu);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::relu_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::selu);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::selu_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gelu);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::tanh);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::tanh_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::softrelu);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::softrelu_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::exp);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::exp);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::expm1);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log1p);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log1p_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log2);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log2_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log10);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log10_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::erf);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::erf_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::erfinv);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::erfinv_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sin);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sin_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sinh);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sinh_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arcsin);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arcsin_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arcsinh);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arcsinh_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::cos);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::cos_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::cosh);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::cosh_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arccos);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arccos_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arccosh);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arccosh_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::tan);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::tan_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arctan);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctan_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arctanh);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctanh_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::square);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::square_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::square_root);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::square_root_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::reciprocal_square_root);  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::identity);           // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::identity_grad);                // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::negation);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::reciprocal);                   // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::reciprocal_grad);              // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sigmoid);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sigmoid_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log_sigmoid);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log_sigmoid_grad);             // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::mish);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mish_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::softsign);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::softsign_grad);                // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::relu);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::relu_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::selu);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::selu_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gelu);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::tanh);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::tanh_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::softrelu);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::softrelu_grad);                // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::exp);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::exp);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::expm1);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log_grad);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log1p);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log1p_grad);                   // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log2);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log2_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::log10);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::log10_grad);                   // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::erf);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::erf_grad);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::erfinv);                       // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::erfinv_grad);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sin);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sin_grad);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sinh);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sinh_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arcsin);                       // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arcsin_grad);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arcsinh);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arcsinh_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::cos);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::cos_grad);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::cosh);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::cosh_grad);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arccos);                       // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arccos_grad);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arccosh);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arccosh_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::tan);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::tan_grad);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arctan);                       // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctan_grad);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arctanh);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctanh_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::square);                       // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::square_grad);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::square_root);                  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::square_root_grad);             // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::reciprocal_square_root);       // NOLINT()
 IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::reciprocal_square_root_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::cube_root);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::cube_root_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::reciprocal_cube_root);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::reciprocal_cube_root_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::abs);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sign);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sign);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::round);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::floor);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::trunc);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rint);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fix);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gamma);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gamma_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gammaln);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gammaln_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::digamma);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::trigamma);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ceil);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::degrees);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::degrees_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::radians);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::radians_grad);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::nt);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_not);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_not);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isnan);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isinf);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isposinf);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isneginf);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isfinite);  // NOLINT()
-IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::nt);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::clip);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::clip);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::plus);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::minus);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::mul);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::div);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::true_divide);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::minus_sign);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rminus);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rdiv);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::plus);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::minus);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mul);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::div);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::minus_sign);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rminus);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rdiv);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rtrue_divide);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::div_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::div_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::div_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::div_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rdiv_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::mod);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fmod);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rfmod);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mod_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mod_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rmod);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rmod_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::left);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::left);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::right);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::right);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::power);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rpower);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::xelu); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::elu); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::power_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rpower_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::power_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::copysign);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rcopysign);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::copysign_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::copysign_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arctan2);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rarctan2);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctan2_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rarctan2_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctan2_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::xelu_grad); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gelu_grad); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::prelu_grad); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::elu_grad); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::maximum);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fmax);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::minimum);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fmin);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::hypot);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::hypot_grad_left);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::hypot_grad_left);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::hypot_grad_right);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::hypot_grad_right);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::lt);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::lt);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::le);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::le);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gt);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gt);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ge);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ge);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ne);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ne);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::eq);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::eq);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_equal);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_not_equal);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_greater);  // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::cube_root);                    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::cube_root_grad);               // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::reciprocal_cube_root);         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::reciprocal_cube_root_grad);    // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::abs);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::sign);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::sign);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::round);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::floor);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::trunc);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rint);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fix);                          // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gamma);                        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gamma_grad);                   // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gammaln);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gammaln_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::digamma);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::trigamma);                     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ceil);                         // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::degrees);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::degrees_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::radians);                      // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::radians_grad);                 // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD(mxnet::op::mshadow_op::nt);                           // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_not);     // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_not);        // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isnan);              // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isinf);              // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isposinf);           // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isneginf);           // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::isfinite);           // NOLINT()
+IMPLEMENT_UNARY_WORKLOAD_BWD(mxnet::op::mshadow_op::nt);                           // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::clip);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::clip);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::plus);              // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::minus);             // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::mul);               // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::div);               // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::true_divide);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::minus_sign);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rminus);                      // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rdiv);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::plus);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::minus);                       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mul);                         // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::div);                         // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::minus_sign);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rminus);                      // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rdiv);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rtrue_divide);                // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::div_grad);                    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::div_grad);                    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::div_rgrad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::div_rgrad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rdiv_grad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::mod);                         // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fmod);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rfmod);                       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mod_grad);                    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::mod_rgrad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rmod);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rmod_grad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::left);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::left);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::right);                       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::right);                       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::power);             // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rpower);                      // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::xelu);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::elu);                         // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::power_grad);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rpower_grad);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::power_rgrad);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::copysign);                    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rcopysign);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::copysign_grad);               // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::copysign_rgrad);              // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::arctan2);                     // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rarctan2);                    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctan2_grad);                // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rarctan2_grad);               // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::arctan2_rgrad);               // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::xelu_grad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gelu_grad);                   // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::prelu_grad);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::elu_grad);                    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::maximum);                     // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fmax);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::minimum);                     // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::fmin);                        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::hypot);                       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::hypot_grad_left);             // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::hypot_grad_left);             // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::hypot_grad_right);            // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::hypot_grad_right);            // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::lt);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::lt);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::le);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::le);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::gt);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::gt);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ge);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ge);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ne);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ne);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::eq);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::eq);                          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_equal);          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_not_equal);      // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_greater);        // NOLINT()
 IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_greater_equal);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_less);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_less_equal);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_and);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_or);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_xor);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::logical_and);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::logical_and);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::logical_or);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::logical_or);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::logical_xor);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::logical_xor);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_and);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_xor);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_or);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::smooth_l1_loss);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::smooth_l1_gradient);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::gcd);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::lcm);  // NOLINT()
-IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_int<0>);  // NOLINT()
-IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_int<1>);  // NOLINT()
-IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_bool<false>);  // NOLINT()
-IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_bool<true>);  // NOLINT()
-IMPLEMENT_BLANK_WORKLOAD_FWD(mxnet::op::PopulateFullIdxRspKernel);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ldexp);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rldexp);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ldexp_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ldexp_rgrad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rldexp_grad);  // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::posone); // NOLINT()
-IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::negone); // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_less);           // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_less_equal);     // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_and);    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_or);     // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::np_logical_xor);    // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::logical_and);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::logical_and);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::logical_or);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::logical_or);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::logical_xor);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::logical_xor);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_and);       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_xor);       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::bitwise_or);        // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::smooth_l1_loss);              // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::smooth_l1_gradient);          // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::gcd);               // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mshadow_op::lcm);               // NOLINT()
+IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_int<0>);        // NOLINT()
+IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_int<1>);        // NOLINT()
+IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_bool<false>);   // NOLINT()
+IMPLEMENT_BLANK_WORKLOAD_FWD_WITH_BOOL(mxnet::op::mxnet_op::set_to_bool<true>);    // NOLINT()
+IMPLEMENT_BLANK_WORKLOAD_FWD(mxnet::op::PopulateFullIdxRspKernel);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::ldexp);                       // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_FWD(mxnet::op::mshadow_op::rldexp);                      // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ldexp_grad);                  // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::ldexp_rgrad);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::rldexp_grad);                 // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::posone);                      // NOLINT()
+IMPLEMENT_BINARY_WORKLOAD_BWD(mxnet::op::mshadow_op::negone);                      // NOLINT()
 /*!
  * \brief Tuner objects, *not* automatically generated
  */
 #ifdef MXNET_USE_OPERATOR_TUNING
-static BinaryOpTune<float>                   binaryOpTuneFloat;
-static BinaryOpTune<double>                  binaryOpTuneDouble;
-static BinaryOpTune<mshadow::half::half_t>   binaryOpTuneHalf;
+static BinaryOpTune<float> binaryOpTuneFloat;
+static BinaryOpTune<double> binaryOpTuneDouble;
+static BinaryOpTune<mshadow::half::half_t> binaryOpTuneHalf;
 static BinaryOpTune<mshadow::bfloat::bf16_t> binaryOpTuneBf16;
-static BinaryOpTune<int8_t>                  binaryOpTuneInt8;
-static BinaryOpTune<uint8_t>                 binaryOpTuneUInt8;
-static BinaryOpTune<int32_t>                 binaryOpTuneInt32;
-static BinaryOpTune<int64_t>                 binaryOpTuneInt64;
+static BinaryOpTune<int8_t> binaryOpTuneInt8;
+static BinaryOpTune<uint8_t> binaryOpTuneUInt8;
+static BinaryOpTune<int32_t> binaryOpTuneInt32;
+static BinaryOpTune<int64_t> binaryOpTuneInt64;
 #endif  // MXNET_USE_OPERATOR_TUNING
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/operator_tune.h b/src/operator/operator_tune.h
index b1f00a541d85..ce01ad258513 100644
--- a/src/operator/operator_tune.h
+++ b/src/operator/operator_tune.h
@@ -30,26 +30,25 @@
 
 #ifdef MXNET_DEBUG_TUNING_LAUNCH
 #include <cxxabi.h>
-template<typename T> inline std::string type_name() {
-  const char *name = typeid(T).name();
-  int status = -4;  // some arbitrary value to eliminate the compiler warning
-  std::unique_ptr<char, void (*)(void *)> res {
-    abi::__cxa_demangle(name, nullptr, nullptr, &status),
-    &std::free
-  };
+template <typename T>
+inline std::string type_name() {
+  const char* name = typeid(T).name();
+  int status       = -4;  // some arbitrary value to eliminate the compiler warning
+  std::unique_ptr<char, void (*)(void*)> res{abi::__cxa_demangle(name, nullptr, nullptr, &status),
+                                             &std::free};
   if (!status) {
     return res.get();
   }
   return std::move(name);
 }
-#define MXNET_DEBUG_PRINT_UNIQUE_OP(__label$, __op$) \
-  { \
-    static std::mutex cs; \
-    static std::unordered_set<std::string> ops; \
-    const std::string name = type_name<__op$>(); \
-    if (ops.emplace(name).second) { \
+#define MXNET_DEBUG_PRINT_UNIQUE_OP(__label$, __op$)                      \
+  {                                                                       \
+    static std::mutex cs;                                                 \
+    static std::unordered_set<std::string> ops;                           \
+    const std::string name = type_name<__op$>();                          \
+    if (ops.emplace(name).second) {                                       \
       std::cout << (__label$) << ": " << name << std::endl << std::flush; \
-    } \
+    }                                                                     \
   }
 #else
 #define MXNET_DEBUG_PRINT_UNIQUE_OP(__label$, __op$) /* */
@@ -58,7 +57,7 @@ template<typename T> inline std::string type_name() {
 namespace mxnet {
 namespace op {
 
-#define WORKLOAD_COUNT_SHIFT  11
+#define WORKLOAD_COUNT_SHIFT 11
 
 /*!
  * \brief Shared data for all data types being tuned, acts as a base class for the higher-level
@@ -95,9 +94,9 @@ class OperatorTuneBase {
    * \param t2 End time tick
    * \return duration in nanoseconds between t1 and t2
    */
-  static MSHADOW_CINLINE duration_t GetDurationInNanoseconds(const Tick &t1, const Tick &t2) {
+  static MSHADOW_CINLINE duration_t GetDurationInNanoseconds(const Tick& t1, const Tick& t2) {
     return static_cast<duration_t>(
-      std::chrono::duration_cast<std::chrono::nanoseconds>(t2 - t1).count());
+        std::chrono::duration_cast<std::chrono::nanoseconds>(t2 - t1).count());
   }
 
   /*!
@@ -105,7 +104,7 @@ class OperatorTuneBase {
    * \param since Reference time which to calculate the duration
    * \return Duration in nanoseconds between the given 'since' value and now
    */
-  static MSHADOW_CINLINE duration_t GetDurationInNanoseconds(const Tick &since) {
+  static MSHADOW_CINLINE duration_t GetDurationInNanoseconds(const Tick& since) {
     return GetDurationInNanoseconds(since, Now());
   }
 
@@ -119,8 +118,7 @@ class OperatorTuneBase {
     /*!
      * \brief Constructor, sets start time
      */
-    MSHADOW_CINLINE Timer()
-      : start_(OperatorTuneBase::Now()) {}
+    MSHADOW_CINLINE Timer() : start_(OperatorTuneBase::Now()) {}
     /*!
      * \brief Get duration in nanoseconds since construction
      * \return Duration in nanoseconds since construction
@@ -148,7 +146,7 @@ class OperatorTuneBase {
 
       // Compute time required for OMP + # items per thread
       const uint64_t omp_compute_time_ns = (serial_workload / thread_count) >> WORKLOAD_COUNT_SHIFT;
-      const uint64_t total_omp_time_ns = omp_overhead_ns_ + omp_compute_time_ns;
+      const uint64_t total_omp_time_ns   = omp_overhead_ns_ + omp_compute_time_ns;
 
       const bool rc = total_omp_time_ns < total_serial_time_ns;
       return rc;
@@ -162,13 +160,13 @@ namespace tune {
  * \brief Tuning mode for registered kernel operators
  */
 enum TuningMode {
-  kAuto,         // Based upon tuning data, choose whether to use OMP for kernel CPU Launch() loops
-  kNeverOMP,     // Don't use OMP for parallelism (legacy behavior for GPU builds)
-  kAlwaysOMP     // Don't use OMP for parallelism (legacy behavior for CPU builds)
+  kAuto,      // Based upon tuning data, choose whether to use OMP for kernel CPU Launch() loops
+  kNeverOMP,  // Don't use OMP for parallelism (legacy behavior for GPU builds)
+  kAlwaysOMP  // Don't use OMP for parallelism (legacy behavior for CPU builds)
 };
 }  // namespace tune
 
-template<typename DType>
+template <typename DType>
 class OperatorTuneByType : public OperatorTuneBase {
  public:
   /*!
@@ -177,7 +175,7 @@ class OperatorTuneByType : public OperatorTuneBase {
    */
   static MSHADOW_CINLINE void set_tuning_mode(const tune::TuningMode tuning_mode) {
     // Use const_cast to get past "assigning non-volatile to volatile warning
-    const_cast<tune::TuningMode &>(tuning_mode_) = tuning_mode;
+    const_cast<tune::TuningMode&>(tuning_mode_) = tuning_mode;
   }
 
   /*!
@@ -185,7 +183,7 @@ class OperatorTuneByType : public OperatorTuneBase {
    * \return tune::TuningMode value for the current tuning mode
    */
   static MSHADOW_CINLINE tune::TuningMode tuning_mode() {
-    return const_cast<tune::TuningMode &>(tuning_mode_);
+    return const_cast<tune::TuningMode&>(tuning_mode_);
   }
 
   /*!
@@ -223,7 +221,7 @@ namespace mxnet_op {
 /*!
  * \brief Kernel operator wrapper used for tuning data
  */
-template<typename Operation, typename DType>
+template <typename Operation, typename DType>
 struct tuned_op : public Operation {
   /*! \brief Runtime workload calculation values. Generally, nanoseconds to perform WORKLOAD_COUNT
    *        operations (for unary and binary ops), although they can be anything if the UseOMP()
@@ -243,7 +241,7 @@ struct tuned_op : public Operation {
    * \param args Variable arguments passed
    * \return true if OMP parallelism is recommended
    */
-  template<typename ...Args>
+  template <typename... Args>
   static MSHADOW_CINLINE bool UseOMP(size_t N, size_t thread_count, Args... args) {
     return Operation::UseOMP(N, thread_count, args...);
   }
@@ -267,7 +265,7 @@ struct tuned_op : public Operation {
  * \param function Lambda to time for WORKLOAD_COUNT calls
  * \return median workload for function call (nanoseconds for WORKLOAD_COUNT calls)
  */
-template<typename Function>
+template <typename Function>
 inline int64_t get_workload(Function function) {
   std::multiset<int64_t> durations;
   typename OperatorTuneBase::Timer timer;
diff --git a/src/operator/operator_util.cc b/src/operator/operator_util.cc
index bc097a5b0c1c..2dc6f3e2d59b 100644
--- a/src/operator/operator_util.cc
+++ b/src/operator/operator_util.cc
@@ -44,41 +44,34 @@ class SimpleOpRegEntryImpl : public SimpleOpRegEntry {
     std::lock_guard<std::mutex> lock(mutex_);
     std::string symbol_name(symbol_name_str);
     CHECK(op_reg_ == nullptr || symbol_name == symbol_name_)
-        << " operator " << this->name
-        << " need to call set_symbol_op_name "
-        << symbol_name << "before all other calls";
+        << " operator " << this->name << " need to call set_symbol_op_name " << symbol_name
+        << "before all other calls";
     symbol_name_ = symbol_name;
     return *this;
   }
 
-  TSelf& set_enable_scalar(
-      bool enable_scalar,
-      SimpleOpScalarOption type_mask) override {
+  TSelf& set_enable_scalar(bool enable_scalar, SimpleOpScalarOption type_mask) override {
     std::lock_guard<std::mutex> lock(mutex_);
-    enable_scalar_ = enable_scalar;
+    enable_scalar_    = enable_scalar;
     scalar_type_mask_ = type_mask;
-    CHECK(!enable_kwargs_ || !enable_scalar_)
-        << "Cannot have both kwargs and scalar arguments";
+    CHECK(!enable_kwargs_ || !enable_scalar_) << "Cannot have both kwargs and scalar arguments";
     return *this;
   }
 
   TSelf& set_enable_kwargs(bool enable_kwargs) override {
     std::lock_guard<std::mutex> lock(mutex_);
     enable_kwargs_ = enable_kwargs;
-    CHECK(!enable_kwargs_ || !enable_scalar_)
-        << "Cannot have both kwargs and scalar arguments";
+    CHECK(!enable_kwargs_ || !enable_scalar_) << "Cannot have both kwargs and scalar arguments";
     return *this;
   }
 
-  TSelf& set_resource_request(
-      const std::vector<ResourceRequest>& reqs) override {
+  TSelf& set_resource_request(const std::vector<ResourceRequest>& reqs) override {
     std::lock_guard<std::mutex> lock(mutex_);
     resource_requests_ = reqs;
     return *this;
   }
 
-  TSelf& set_resource_request(
-      ResourceRequest req) override {
+  TSelf& set_resource_request(ResourceRequest req) override {
     std::lock_guard<std::mutex> lock(mutex_);
     resource_requests_ = {req};
     return *this;
@@ -196,9 +189,10 @@ class SimpleOpRegEntryImpl : public SimpleOpRegEntry {
     return *this;
   }
 
-  TSelf& describe(const std::string &description) override {
+  TSelf& describe(const std::string& description) override {
     std::lock_guard<std::mutex> lock(mutex_);
-    if (reg_counter_ != 1) return *this;
+    if (reg_counter_ != 1)
+      return *this;
     NDArrayReg().describe(description);
     if (register_symbolic_) {
       OpReg().describe(description);
@@ -206,9 +200,10 @@ class SimpleOpRegEntryImpl : public SimpleOpRegEntry {
     return *this;
   }
 
-  TSelf& add_arguments(const std::vector<dmlc::ParamFieldInfo> &args) override {
+  TSelf& add_arguments(const std::vector<dmlc::ParamFieldInfo>& args) override {
     std::lock_guard<std::mutex> lock(mutex_);
-    if (reg_counter_ != 1) return *this;
+    if (reg_counter_ != 1)
+      return *this;
     NDArrayReg().add_arguments(args);
     if (register_symbolic_) {
       OpReg().add_arguments(args);
@@ -272,7 +267,7 @@ class SimpleOpRegEntryImpl : public SimpleOpRegEntry {
   // whether do inplace optimization of out_grad and in_grad0
   bool binary_backward_inplace_out_lhs_{false};
 
-  template<typename TFunction>
+  template <typename TFunction>
   inline void SetFunction(std::vector<TFunction>* vfunc,
                           int dev_mask,
                           TFunction func,
@@ -293,21 +288,21 @@ class SimpleOpRegEntryImpl : public SimpleOpRegEntry {
   // internal reference to operator registry
   OperatorPropertyReg* op_reg_{nullptr};
   // internal function to register NDArray function.
-  inline NDArrayFunctionReg &NDArrayReg() {
+  inline NDArrayFunctionReg& NDArrayReg() {
     if (ndarray_reg_ == nullptr) {
-      NDArrayFunctionReg &reg =
+      NDArrayFunctionReg& reg =
           ::dmlc::Registry<NDArrayFunctionReg>::Get()->__REGISTER__(this->name);
       ndarray_reg_ = &reg;
     }
     return *ndarray_reg_;
   }
   // internal function to register NDArray function.
-  inline OperatorPropertyReg &OpReg() {
+  inline OperatorPropertyReg& OpReg() {
     if (op_reg_ == nullptr) {
       if (symbol_name_.length() == 0) {
         symbol_name_ = this->name;
       }
-      OperatorPropertyReg &reg =
+      OperatorPropertyReg& reg =
           ::dmlc::Registry<OperatorPropertyReg>::Get()->__REGISTER__(symbol_name_);
       op_reg_ = &reg;
     }
@@ -329,10 +324,11 @@ class SimpleOpRegEntryImpl : public SimpleOpRegEntry {
 
 SimpleOpRegEntry& SimpleOpRegistry::__REGISTER_OR_FIND__(char const* name_str) {
   std::string name(name_str);
-  if (fmap_.count(name) != 0) return *fmap_.at(name);
-  SimpleOpRegEntry *e = new SimpleOpRegEntryImpl();
-  e->name = name;
-  fmap_[name] = e;
+  if (fmap_.count(name) != 0)
+    return *fmap_.at(name);
+  SimpleOpRegEntry* e = new SimpleOpRegEntryImpl();
+  e->name             = name;
+  fmap_[name]         = e;
   return *e;
 }
 
@@ -348,12 +344,10 @@ SimpleOpRegistry::~SimpleOpRegistry() {
 }
 
 // base class
-struct SimpleOpScalarParam :
-      public dmlc::Parameter<SimpleOpScalarParam> {
+struct SimpleOpScalarParam : public dmlc::Parameter<SimpleOpScalarParam> {
   float scalar;
   DMLC_DECLARE_PARAMETER(SimpleOpScalarParam) {
-    DMLC_DECLARE_FIELD(scalar)
-        .describe("scalar value.");
+    DMLC_DECLARE_FIELD(scalar).describe("scalar value.");
   }
 };
 
@@ -373,15 +367,14 @@ class SimpleOpPropBase : public OperatorProperty {
       param.Init(kwargs);
       env.scalar = param.scalar;
     } else {
-      CHECK_EQ(kwargs.size(), 0)
-          << "Operator " << source->symbol_name_ << " donot accept any keyword arguments";
+      CHECK_EQ(kwargs.size(), 0) << "Operator " << source->symbol_name_
+                                 << " donot accept any keyword arguments";
     }
   }
 
   std::map<std::string, std::string> GetParams() const override {
     if (source->enable_kwargs_) {
-      return std::map<std::string, std::string>(
-          env.kwargs.begin(), env.kwargs.end());
+      return std::map<std::string, std::string>(env.kwargs.begin(), env.kwargs.end());
     } else if (source->enable_scalar_) {
       SimpleOpScalarParam param;
       param.scalar = env.scalar;
@@ -391,19 +384,17 @@ class SimpleOpPropBase : public OperatorProperty {
     }
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return source->resource_requests_;
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return source->resource_requests_;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_LE(in_type->size(), this->ListArguments().size());
     int dtype = -1;
     // reduce dtype to a common one.
@@ -411,9 +402,8 @@ class SimpleOpPropBase : public OperatorProperty {
       if (dtype == -1) {
         dtype = i;
       } else {
-        CHECK(i == -1 ||
-            i == dtype) <<
-          "Non-uniform input data type. Expected " << dtype << "got " << i;
+        CHECK(i == -1 || i == dtype)
+            << "Non-uniform input data type. Expected " << dtype << "got " << i;
       }
     }
 
@@ -424,15 +414,18 @@ class SimpleOpPropBase : public OperatorProperty {
 
     int n_in = this->ListArguments().size();
     in_type->clear();
-    for (int i = 0; i < n_in; ++i) in_type->push_back(dtype);
+    for (int i = 0; i < n_in; ++i)
+      in_type->push_back(dtype);
 
     int n_out = this->ListOutputs().size();
     out_type->clear();
-    for (int i = 0; i < n_out; ++i) out_type->push_back(dtype);
+    for (int i = 0; i < n_out; ++i)
+      out_type->push_back(dtype);
 
     int n_aux = this->ListAuxiliaryStates().size();
     aux_type->clear();
-    for (int i = 0; i < n_aux; ++i) aux_type->push_back(dtype);
+    for (int i = 0; i < n_aux; ++i)
+      aux_type->push_back(dtype);
     return true;
   }
 
@@ -447,32 +440,31 @@ class SimpleOpPropBase : public OperatorProperty {
 void SimpleOpRegEntryImpl::RegisterSourceImperative() {
   CHECK_EQ(reg_counter_, 1);
   // The body to be registered
-  auto body = [this] (NDArray** used_vars,
-                      real_t* s,
-                      NDArray** mutate_vars,
-                      int num_params,
-                      char** param_keys,
-                      char** param_vals) {
+  auto body = [this](NDArray** used_vars,
+                     real_t* s,
+                     NDArray** mutate_vars,
+                     int num_params,
+                     char** param_keys,
+                     char** param_vals) {
     NDArray* out = mutate_vars[0];
     // setup env.
     EnvArguments env;
-    if (enable_scalar_) env.scalar = s[0];
+    if (enable_scalar_)
+      env.scalar = s[0];
     if (enable_kwargs_) {
       for (int i = 0; i < num_params; ++i) {
-        env.kwargs.emplace_back(std::make_pair(
-            std::string(param_keys[i]), std::string(param_vals[i])));
+        env.kwargs.emplace_back(
+            std::make_pair(std::string(param_keys[i]), std::string(param_vals[i])));
       }
     } else {
-      CHECK_EQ(num_params, 0)
-        << "operator " << this->name << " do not take keyword arguments";
+      CHECK_EQ(num_params, 0) << "operator " << this->name << " do not take keyword arguments";
     }
     // shape inference.
     CHECK(source_shape_ != nullptr);
     mxnet::TShape dshape = source_shape_(env);
     // check output shape.
     CHECK(!out->is_none());
-    CHECK(out->shape() == dshape) << "target shape mismatch "
-    << out->shape() << " vs. " << dshape;
+    CHECK(out->shape() == dshape) << "target shape mismatch " << out->shape() << " vs. " << dshape;
 
     // important: callback must always capture by value
     NDArray ret = *out;
@@ -485,38 +477,37 @@ void SimpleOpRegEntryImpl::RegisterSourceImperative() {
     // check if the function exist
     int dev_mask = ret.ctx().dev_mask();
     // error message
-    if (static_cast<size_t>(dev_mask) >= fsource_.size() ||
-        fsource_[dev_mask] == nullptr) {
+    if (static_cast<size_t>(dev_mask) >= fsource_.size() || fsource_[dev_mask] == nullptr) {
       if (dev_mask == gpu::kDevMask) {
         LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
       }
-      LOG(FATAL) << "Function " << this->name
-                 << "not registered for device " << dev_mask;
+      LOG(FATAL) << "Function " << this->name << "not registered for device " << dev_mask;
     }
     // invoke the function
     SourceFunction fun = fsource_[dev_mask];
-    OpReqType req = kWriteTo;
+    OpReqType req      = kWriteTo;
 
-    Engine::Get()->PushSync([ret, fun, dev_mask, req, env](RunContext ctx) {
-        TBlob tmp = ret.data();
-        (*fun)(env, &tmp, req, ctx);
+    Engine::Get()->PushSync(
+        [ret, fun, dev_mask, req, env](RunContext ctx) {
+          TBlob tmp = ret.data();
+          (*fun)(env, &tmp, req, ctx);
 #if MXNET_USE_CUDA
-        if (dev_mask == gpu::kDevMask) {
-          ctx.get_stream<gpu>()->Wait();
-        }
+          if (dev_mask == gpu::kDevMask) {
+            ctx.get_stream<gpu>()->Wait();
+          }
 #endif
-      }, ret.ctx(), {}, write_vars,
-      FnProperty::kNormal, 0, "RegisterSourceImperative");
+        },
+        ret.ctx(),
+        {},
+        write_vars,
+        FnProperty::kNormal,
+        0,
+        "RegisterSourceImperative");
   };
   // register the function.
-  NDArrayReg()
-      .set_body(body)
-      .set_num_use_vars(0)
-      .set_num_mutate_vars(1);
+  NDArrayReg().set_body(body).set_num_use_vars(0).set_num_mutate_vars(1);
   if (enable_scalar_) {
-      NDArrayReg()
-          .set_num_scalars(1)
-          .add_argument("scalar", "float", "scalar input to the function");
+    NDArrayReg().set_num_scalars(1).add_argument("scalar", "float", "scalar input to the function");
   }
 }
 
@@ -525,25 +516,26 @@ struct SimpleSourceOperator : public Operator {
   EnvArguments env;
   SourceFunction forward;
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data,
-               const std::vector<TBlob> &aux_args) override {
-    if (ctx.requested.size() != 0) env.resource = ctx.requested;
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_args) override {
+    if (ctx.requested.size() != 0)
+      env.resource = ctx.requested;
     CHECK_EQ(in_data.size(), 0);
     CHECK_EQ(out_data.size(), 1);
     TBlob out = out_data[0];
     (*forward)(env, &out, req[0], ctx.run_ctx);
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<TBlob> &out_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad,
-                const std::vector<TBlob> &aux_args) override {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad,
+                const std::vector<TBlob>& aux_args) override {
     LOG(FATAL) << "no gradient can be done";
     // no nothing.
   }
@@ -551,11 +543,10 @@ struct SimpleSourceOperator : public Operator {
 
 class SimpleSourceOpProp : public SimpleOpPropBase {
  public:
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
-    CHECK_EQ(in_shape->size(), 0)
-        << in_shape->size();
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
+    CHECK_EQ(in_shape->size(), 0) << in_shape->size();
     CHECK(source->source_shape_ != nullptr);
     out_shape->clear();
     out_shape->push_back((*(source->source_shape_))(env));
@@ -563,19 +554,19 @@ class SimpleSourceOpProp : public SimpleOpPropBase {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SimpleSourceOpProp();
+    auto ptr    = new SimpleSourceOpProp();
     ptr->source = source;
-    ptr->name = name;
-    ptr->env = env;
+    ptr->name   = name;
+    ptr->env    = env;
     return ptr;
   }
 
   Operator* CreateOperator(Context ctx) const override {
-    size_t dev_mask = ctx.dev_mask();
-    SimpleSourceOperator *op = new SimpleSourceOperator();
+    size_t dev_mask          = ctx.dev_mask();
+    SimpleSourceOperator* op = new SimpleSourceOperator();
     CHECK(dev_mask < source->fsource_.size() && source->fsource_[dev_mask] != nullptr);
     op->forward = source->fsource_[dev_mask];
-    op->env = this->env;
+    op->env     = this->env;
     return op;
   }
 
@@ -583,9 +574,9 @@ class SimpleSourceOpProp : public SimpleOpPropBase {
     return {};
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     out_type->clear();
     out_type->push_back(mshadow::kFloat32);
     return true;
@@ -595,13 +586,12 @@ class SimpleSourceOpProp : public SimpleOpPropBase {
 void SimpleOpRegEntryImpl::RegisterSourceSymbolic() {
   // register the operator
   auto op_factory = [this]() {
-    SimpleSourceOpProp *prop = new SimpleSourceOpProp();
-    prop->name = this->symbol_name_;
-    prop->source = this;
+    SimpleSourceOpProp* prop = new SimpleSourceOpProp();
+    prop->name               = this->symbol_name_;
+    prop->source             = this;
     return prop;
   };
-  OpReg()
-      .set_body(op_factory);
+  OpReg().set_body(op_factory);
 }
 
 //-------------------------------------
@@ -610,25 +600,25 @@ void SimpleOpRegEntryImpl::RegisterSourceSymbolic() {
 void SimpleOpRegEntryImpl::RegisterUnaryImperative() {
   CHECK_EQ(reg_counter_, 1);
   // The body to be registered
-  auto body = [this] (NDArray** used_vars,
-                      real_t* s,
-                      NDArray** mutate_vars,
-                      int num_params,
-                      char** param_keys,
-                      char** param_vals) {
+  auto body = [this](NDArray** used_vars,
+                     real_t* s,
+                     NDArray** mutate_vars,
+                     int num_params,
+                     char** param_keys,
+                     char** param_vals) {
     NDArray& src = *used_vars[0];
     NDArray* out = mutate_vars[0];
     // setup env.
     EnvArguments env;
-    if (enable_scalar_) env.scalar = s[0];
+    if (enable_scalar_)
+      env.scalar = s[0];
     if (enable_kwargs_) {
       for (int i = 0; i < num_params; ++i) {
-        env.kwargs.emplace_back(std::make_pair(
-            std::string(param_keys[i]), std::string(param_vals[i])));
+        env.kwargs.emplace_back(
+            std::make_pair(std::string(param_keys[i]), std::string(param_vals[i])));
       }
     } else {
-      CHECK_EQ(num_params, 0)
-        << "operator " << this->name << " do not take keyword arguments";
+      CHECK_EQ(num_params, 0) << "operator " << this->name << " do not take keyword arguments";
     }
     // shape inference.
     mxnet::TShape dshape;
@@ -643,8 +633,8 @@ void SimpleOpRegEntryImpl::RegisterUnaryImperative() {
     } else {
       CHECK(out->ctx() == src.ctx()) << "target context mismatch";
       CHECK(out->dtype() == src.dtype()) << "target data type mismatch";
-      CHECK(out->shape() == dshape) << "target shape mismatch "
-      << out->shape() << " vs. " << dshape;
+      CHECK(out->shape() == dshape)
+          << "target shape mismatch " << out->shape() << " vs. " << dshape;
     }
     // important: callback must always capture by value
     NDArray ret = *out;
@@ -664,39 +654,40 @@ void SimpleOpRegEntryImpl::RegisterUnaryImperative() {
     // check if the function exist
     int dev_mask = src.ctx().dev_mask();
     // error message
-    if (static_cast<size_t>(dev_mask) >= funary_.size() ||
-        funary_[dev_mask] == nullptr) {
+    if (static_cast<size_t>(dev_mask) >= funary_.size() || funary_[dev_mask] == nullptr) {
       if (dev_mask == gpu::kDevMask) {
         LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
       }
-      LOG(FATAL) << "Function " << this->name
-                 << "not registered for device " << dev_mask;
+      LOG(FATAL) << "Function " << this->name << "not registered for device " << dev_mask;
     }
     // invoke the function
     UnaryFunction fun = funary_[dev_mask];
-    OpReqType req = kWriteTo;
+    OpReqType req     = kWriteTo;
     if (src.var() == ret.var()) {
       req = kWriteInplace;
       CHECK(unary_forward_inplace_in_out_)
           << "inplace operation is not enabled for operator " << name;
     }
 
-    Engine::Get()->PushSync([src, ret, fun, dev_mask, req, env](RunContext ctx) {
-        TBlob tmp = ret.data();
-        (*fun)(src.data(), env, &tmp, req, ctx);
+    Engine::Get()->PushSync(
+        [src, ret, fun, dev_mask, req, env](RunContext ctx) {
+          TBlob tmp = ret.data();
+          (*fun)(src.data(), env, &tmp, req, ctx);
 #if MXNET_USE_CUDA
-        if (dev_mask == gpu::kDevMask) {
-          ctx.get_stream<gpu>()->Wait();
-        }
+          if (dev_mask == gpu::kDevMask) {
+            ctx.get_stream<gpu>()->Wait();
+          }
 #endif
-      }, src.ctx(), const_vars, write_vars,
-      FnProperty::kNormal, 0, "RegisterUnaryImperative");
+        },
+        src.ctx(),
+        const_vars,
+        write_vars,
+        FnProperty::kNormal,
+        0,
+        "RegisterUnaryImperative");
   };
   // register the function.
-  NDArrayReg()
-      .set_body(body)
-      .set_num_use_vars(1)
-      .set_num_mutate_vars(1);
+  NDArrayReg().set_body(body).set_num_use_vars(1).set_num_mutate_vars(1);
   if (enable_scalar_) {
     if (scalar_type_mask_ == kArrayBeforeScalar) {
       NDArrayReg()
@@ -713,8 +704,8 @@ void SimpleOpRegEntryImpl::RegisterUnaryImperative() {
     }
   } else {
     NDArrayReg()
-      .set_type_mask(kNDArrayArgBeforeScalar | kAcceptEmptyMutateTarget)
-      .add_argument("src", "NDArray-or-Symbol", "Source input to the function");
+        .set_type_mask(kNDArrayArgBeforeScalar | kAcceptEmptyMutateTarget)
+        .add_argument("src", "NDArray-or-Symbol", "Source input to the function");
   }
 }
 
@@ -726,39 +717,44 @@ struct SimpleUnaryOperator : public Operator {
   UnaryGradFunctionT1 backward1{nullptr};
   UnaryGradFunctionT2 backward2{nullptr};
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data,
-               const std::vector<TBlob> &aux_args) override {
-    if (ctx.requested.size() != 0) env.resource = ctx.requested;
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_args) override {
+    if (ctx.requested.size() != 0)
+      env.resource = ctx.requested;
     CHECK_EQ(in_data.size(), 1);
     CHECK_EQ(out_data.size(), 1);
     TBlob out = out_data[0];
     (*forward)(in_data[0], env, &out, req[0], ctx.run_ctx);
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<TBlob> &out_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad,
-                const std::vector<TBlob> &aux_args) override {
-    if (ctx.requested.size() != 0) env.resource = ctx.requested;
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad,
+                const std::vector<TBlob>& aux_args) override {
+    if (ctx.requested.size() != 0)
+      env.resource = ctx.requested;
     CHECK_EQ(out_grad.size(), 1);
     CHECK(in_data.size() == 1 && in_grad.size() == 1);
     CHECK_EQ(req.size(), 1);
-    OutputGrad ograd; ograd.data = out_grad[0];
+    OutputGrad ograd;
+    ograd.data  = out_grad[0];
     TBlob igrad = in_grad[0];
 
     if (backward0 != nullptr) {
       (*backward0)(ograd, env, &igrad, req[0], ctx.run_ctx);
     } else if (backward1 != nullptr) {
-      OutputValue out_value; out_value.data = out_data[0];
+      OutputValue out_value;
+      out_value.data = out_data[0];
       (*backward1)(ograd, out_value, env, &igrad, req[0], ctx.run_ctx);
     } else if (backward2 != nullptr) {
-      Input0 in0; in0.data = in_data[0];
+      Input0 in0;
+      in0.data = in_data[0];
       (*backward2)(ograd, in0, env, &igrad, req[0], ctx.run_ctx);
     } else {
       LOG(FATAL) << "Backward is not supported";
@@ -768,13 +764,14 @@ struct SimpleUnaryOperator : public Operator {
 
 class SimpleUnaryOpProp : public SimpleOpPropBase {
  public:
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1) << "Input:[data]";
-    const mxnet::TShape &dshape = in_shape->at(0);
-    if (!shape_is_known(dshape)) return false;
+    const mxnet::TShape& dshape = in_shape->at(0);
+    if (!shape_is_known(dshape))
+      return false;
     out_shape->clear();
     if (source->unary_shape_ == nullptr) {
       out_shape->push_back(dshape);
@@ -785,18 +782,17 @@ class SimpleUnaryOpProp : public SimpleOpPropBase {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SimpleUnaryOpProp();
+    auto ptr    = new SimpleUnaryOpProp();
     ptr->source = source;
-    ptr->name = name;
-    ptr->env = env;
+    ptr->name   = name;
+    ptr->env    = env;
     return ptr;
   }
 
   // decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (source->funary_grad_t0_.size() != 0) {
       return {out_grad[0]};
     } else if (source->funary_grad_t1_.size() != 0) {
@@ -810,10 +806,10 @@ class SimpleUnaryOpProp : public SimpleOpPropBase {
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     if (source->unary_backward_inplace_out_in_) {
       return {{out_grad[0], in_grad[0]}};
     } else {
@@ -822,8 +818,8 @@ class SimpleUnaryOpProp : public SimpleOpPropBase {
   }
 
   std::vector<std::pair<int, void*> > ForwardInplaceOption(
-    const std::vector<int> &in_data,
-    const std::vector<void*> &out_data) const override {
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     if (source->unary_forward_inplace_in_out_) {
       return {{in_data[0], out_data[0]}};
     } else {
@@ -832,11 +828,11 @@ class SimpleUnaryOpProp : public SimpleOpPropBase {
   }
 
   Operator* CreateOperator(Context ctx) const override {
-    size_t dev_mask = ctx.dev_mask();
-    SimpleUnaryOperator *op = new SimpleUnaryOperator();
+    size_t dev_mask         = ctx.dev_mask();
+    SimpleUnaryOperator* op = new SimpleUnaryOperator();
     CHECK(dev_mask < source->funary_.size() && source->funary_[dev_mask] != nullptr);
     op->forward = source->funary_[dev_mask];
-    op->env = this->env;
+    op->env     = this->env;
     if (dev_mask < source->funary_grad_t0_.size()) {
       op->backward0 = source->funary_grad_t0_[dev_mask];
     }
@@ -853,9 +849,9 @@ class SimpleUnaryOpProp : public SimpleOpPropBase {
 void SimpleOpRegEntryImpl::RegisterUnarySymbolic() {
   // register the operator
   auto op_factory = [this]() {
-    SimpleUnaryOpProp *prop = new SimpleUnaryOpProp();
-    prop->name = this->symbol_name_;
-    prop->source = this;
+    SimpleUnaryOpProp* prop = new SimpleUnaryOpProp();
+    prop->name              = this->symbol_name_;
+    prop->source            = this;
     return prop;
   };
   OpReg()
@@ -869,26 +865,26 @@ void SimpleOpRegEntryImpl::RegisterUnarySymbolic() {
 void SimpleOpRegEntryImpl::RegisterBinaryImperative() {
   CHECK_EQ(reg_counter_, 1);
   // The body to be registered
-  auto body = [this] (NDArray** used_vars,
-                      real_t* s,
-                      NDArray** mutate_vars,
-                      int num_params,
-                      char** param_keys,
-                      char** param_vals) {
+  auto body = [this](NDArray** used_vars,
+                     real_t* s,
+                     NDArray** mutate_vars,
+                     int num_params,
+                     char** param_keys,
+                     char** param_vals) {
     NDArray& lhs = *used_vars[0];
     NDArray& rhs = *used_vars[1];
     NDArray* out = mutate_vars[0];
     // setup env.
     EnvArguments env;
-    if (enable_scalar_) env.scalar = s[0];
+    if (enable_scalar_)
+      env.scalar = s[0];
     if (enable_kwargs_) {
       for (int i = 0; i < num_params; ++i) {
-        env.kwargs.emplace_back(std::make_pair(
-            std::string(param_keys[i]), std::string(param_vals[i])));
+        env.kwargs.emplace_back(
+            std::make_pair(std::string(param_keys[i]), std::string(param_vals[i])));
       }
     } else {
-      CHECK_EQ(num_params, 0)
-        << "operator " << this->name << " do not take keyword arguments";
+      CHECK_EQ(num_params, 0) << "operator " << this->name << " do not take keyword arguments";
     }
 
     // shape inference.
@@ -903,8 +899,8 @@ void SimpleOpRegEntryImpl::RegisterBinaryImperative() {
     // no check if all of them are on cpu
     if (lhs.ctx().dev_mask() != cpu::kDevMask || rhs.ctx().dev_mask() != cpu::kDevMask) {
       CHECK(lhs.ctx() == rhs.ctx())
-        << "operands context mismatch " << lhs.ctx().dev_type << " " << lhs.ctx().dev_id << \
-        " vs. " << rhs.ctx().dev_type << " " << rhs.ctx().dev_id;
+          << "operands context mismatch " << lhs.ctx().dev_type << " " << lhs.ctx().dev_id
+          << " vs. " << rhs.ctx().dev_type << " " << rhs.ctx().dev_id;
     }
     CHECK_EQ(lhs.dtype(), rhs.dtype()) << "operands type mismatch";
 
@@ -914,15 +910,17 @@ void SimpleOpRegEntryImpl::RegisterBinaryImperative() {
     } else {
       CHECK(out->ctx() == lhs.ctx()) << "target context mismatch";
       CHECK(out->dtype() == lhs.dtype()) << "target data type mismatch";
-      CHECK(out->shape() == dshape) << "target shape mismatch "
-      << out->shape() << " vs. " << dshape;
+      CHECK(out->shape() == dshape)
+          << "target shape mismatch " << out->shape() << " vs. " << dshape;
     }
     // important: callback must always capture by value
     NDArray ret = *out;
     // get the const variables
     std::vector<Engine::VarHandle> const_vars;
-    if (lhs.var() != ret.var()) const_vars.push_back(lhs.var());
-    if (rhs.var() != ret.var()) const_vars.push_back(rhs.var());
+    if (lhs.var() != ret.var())
+      const_vars.push_back(lhs.var());
+    if (rhs.var() != ret.var())
+      const_vars.push_back(rhs.var());
 
     // request resources.
     std::vector<Engine::VarHandle> write_vars = {ret.var()};
@@ -934,17 +932,15 @@ void SimpleOpRegEntryImpl::RegisterBinaryImperative() {
     // check if the function exist
     int dev_mask = lhs.ctx().dev_mask();
     // error message
-    if (static_cast<size_t>(dev_mask) >= fbinary_.size() ||
-        fbinary_[dev_mask] == nullptr) {
+    if (static_cast<size_t>(dev_mask) >= fbinary_.size() || fbinary_[dev_mask] == nullptr) {
       if (dev_mask == gpu::kDevMask) {
         LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
       }
-      LOG(FATAL) << "Function " << this->name
-                 << "not registered for device " << dev_mask;
+      LOG(FATAL) << "Function " << this->name << "not registered for device " << dev_mask;
     }
     // invoke the function
     BinaryFunction fun = fbinary_[dev_mask];
-    OpReqType req = kWriteTo;
+    OpReqType req      = kWriteTo;
     if (lhs.var() == ret.var()) {
       req = kWriteInplace;
       CHECK(binary_forward_inplace_lhs_out_)
@@ -952,25 +948,28 @@ void SimpleOpRegEntryImpl::RegisterBinaryImperative() {
     }
     if (rhs.var() == ret.var()) {
       LOG(ERROR) << " operation " << this->name
-        << " warning, perform inplace operation with right operand, may not be supported";
+                 << " warning, perform inplace operation with right operand, may not be supported";
     }
 
-    Engine::Get()->PushSync([lhs, rhs, ret, fun, dev_mask, req, env](RunContext ctx) {
-        TBlob tmp = ret.data();
-        (*fun)(lhs.data(), rhs.data(), env, &tmp, req, ctx);
-        #if MXNET_USE_CUDA
-        if (dev_mask == gpu::kDevMask) {
-          ctx.get_stream<gpu>()->Wait();
-        }
-        #endif
-      }, lhs.ctx(), const_vars, write_vars,
-      FnProperty::kNormal, 0, "RegisterBinaryImperative");
+    Engine::Get()->PushSync(
+        [lhs, rhs, ret, fun, dev_mask, req, env](RunContext ctx) {
+          TBlob tmp = ret.data();
+          (*fun)(lhs.data(), rhs.data(), env, &tmp, req, ctx);
+#if MXNET_USE_CUDA
+          if (dev_mask == gpu::kDevMask) {
+            ctx.get_stream<gpu>()->Wait();
+          }
+#endif
+        },
+        lhs.ctx(),
+        const_vars,
+        write_vars,
+        FnProperty::kNormal,
+        0,
+        "RegisterBinaryImperative");
   };
   // register the function.
-  NDArrayReg()
-      .set_body(body)
-      .set_num_use_vars(2)
-      .set_num_mutate_vars(1);
+  NDArrayReg().set_body(body).set_num_use_vars(2).set_num_mutate_vars(1);
   if (enable_scalar_) {
     if (scalar_type_mask_ == kArrayBeforeScalar) {
       NDArrayReg()
@@ -996,48 +995,50 @@ void SimpleOpRegEntryImpl::RegisterBinaryImperative() {
   }
 }
 
-
 struct SimpleBinaryOperator : public Operator {
   EnvArguments env;
   BinaryFunction forward;
   BinaryGradFunctionT0 backward0{nullptr};
   BinaryGradFunctionT1 backward1{nullptr};
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data,
-               const std::vector<TBlob> &aux_args) override {
-    if (ctx.requested.size() != 0) env.resource = ctx.requested;
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data,
+               const std::vector<TBlob>& aux_args) override {
+    if (ctx.requested.size() != 0)
+      env.resource = ctx.requested;
     CHECK_EQ(in_data.size(), 2);
     CHECK_EQ(out_data.size(), 1);
     TBlob out = out_data[0];
     (*forward)(in_data[0], in_data[1], env, &out, req[0], ctx.run_ctx);
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<TBlob> &out_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad,
-                const std::vector<TBlob> &aux_args) override {
-    if (ctx.requested.size() != 0) env.resource = ctx.requested;
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad,
+                const std::vector<TBlob>& aux_args) override {
+    if (ctx.requested.size() != 0)
+      env.resource = ctx.requested;
     CHECK_EQ(out_grad.size(), 1);
     CHECK(in_data.size() == 2 && in_grad.size() == 2);
     CHECK_EQ(req.size(), 2);
-    OutputGrad ograd; ograd.data = out_grad[0];
+    OutputGrad ograd;
+    ograd.data  = out_grad[0];
     TBlob lgrad = in_grad[0];
     TBlob rgrad = in_grad[1];
 
     if (backward0 != nullptr) {
-      (*backward0)(ograd, env,
-                   &lgrad, &rgrad, req[0], req[1], ctx.run_ctx);
+      (*backward0)(ograd, env, &lgrad, &rgrad, req[0], req[1], ctx.run_ctx);
     } else if (backward1 != nullptr) {
-      Input0 in0; in0.data = in_data[0];
-      Input1 in1; in1.data = in_data[1];
-      (*backward1)(ograd, in0, in1, env,
-                   &lgrad, &rgrad, req[0], req[1], ctx.run_ctx);
+      Input0 in0;
+      in0.data = in_data[0];
+      Input1 in1;
+      in1.data = in_data[1];
+      (*backward1)(ograd, in0, in1, env, &lgrad, &rgrad, req[0], req[1], ctx.run_ctx);
     } else {
       LOG(FATAL) << "Backward is not supported";
     }
@@ -1046,9 +1047,9 @@ struct SimpleBinaryOperator : public Operator {
 
 class SimpleBinaryOpProp : public SimpleOpPropBase {
  public:
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2) << "Input:[lhs, rhs]";
     const mxnet::TShape& lshape = in_shape->at(0);
@@ -1064,8 +1065,10 @@ class SimpleBinaryOpProp : public SimpleOpPropBase {
       }
       out_shape->push_back(lshape);
     } else {
-      if (lshape.ndim() == 0) return false;
-      if (rshape.ndim() == 0) return false;
+      if (lshape.ndim() == 0)
+        return false;
+      if (rshape.ndim() == 0)
+        return false;
       out_shape->push_back((*(source->binary_shape_))(lshape, rshape, env));
     }
     return true;
@@ -1076,18 +1079,17 @@ class SimpleBinaryOpProp : public SimpleOpPropBase {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SimpleBinaryOpProp();
+    auto ptr    = new SimpleBinaryOpProp();
     ptr->source = source;
-    ptr->name = name;
-    ptr->env = env;
+    ptr->name   = name;
+    ptr->env    = env;
     return ptr;
   }
 
   // decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (source->fbinary_grad_t0_.size() != 0) {
       return {out_grad[0]};
     } else if (source->fbinary_grad_t1_.size() != 0) {
@@ -1099,10 +1101,10 @@ class SimpleBinaryOpProp : public SimpleOpPropBase {
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     if (source->binary_backward_inplace_out_lhs_) {
       return {{out_grad[0], in_grad[0]}};
     } else {
@@ -1111,8 +1113,8 @@ class SimpleBinaryOpProp : public SimpleOpPropBase {
   }
 
   std::vector<std::pair<int, void*> > ForwardInplaceOption(
-    const std::vector<int> &in_data,
-    const std::vector<void*> &out_data) const override {
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     if (source->binary_forward_inplace_lhs_out_) {
       return {{in_data[0], out_data[0]}};
     } else {
@@ -1121,11 +1123,11 @@ class SimpleBinaryOpProp : public SimpleOpPropBase {
   }
 
   Operator* CreateOperator(Context ctx) const override {
-    size_t dev_mask = ctx.dev_mask();
-    SimpleBinaryOperator *op = new SimpleBinaryOperator();
+    size_t dev_mask          = ctx.dev_mask();
+    SimpleBinaryOperator* op = new SimpleBinaryOperator();
     CHECK(dev_mask < source->fbinary_.size() && source->fbinary_[dev_mask] != nullptr);
     op->forward = source->fbinary_[dev_mask];
-    op->env = this->env;
+    op->env     = this->env;
     if (dev_mask < source->fbinary_grad_t0_.size()) {
       op->backward0 = source->fbinary_grad_t0_[dev_mask];
     }
@@ -1139,9 +1141,9 @@ class SimpleBinaryOpProp : public SimpleOpPropBase {
 void SimpleOpRegEntryImpl::RegisterBinarySymbolic() {
   // register the operator
   auto op_factory = [this]() {
-    SimpleBinaryOpProp *prop = new SimpleBinaryOpProp();
-    prop->name = symbol_name_;
-    prop->source = this;
+    SimpleBinaryOpProp* prop = new SimpleBinaryOpProp();
+    prop->name               = symbol_name_;
+    prop->source             = this;
     return prop;
   };
   OpReg()
diff --git a/src/operator/optimizer_op-inl.h b/src/operator/optimizer_op-inl.h
index 6f13a70d277a..4e43211a90d7 100644
--- a/src/operator/optimizer_op-inl.h
+++ b/src/operator/optimizer_op-inl.h
@@ -47,11 +47,12 @@ namespace op {
  * \brief log message for optimizers with lazy update.
  */
 inline void LogLazyUpdate() {
-  common::LogOnce("Optimizer with lazy_update = True detected. "
-                  "Be aware that lazy update with row_sparse gradient is different from "
-                  "standard update, and may lead to different empirical results. See "
-                  "https://mxnet.apache.org/api/python/optimization/optimization.html "
-                  "for more details.");
+  common::LogOnce(
+      "Optimizer with lazy_update = True detected. "
+      "Be aware that lazy update with row_sparse gradient is different from "
+      "standard update, and may lead to different empirical results. See "
+      "https://mxnet.apache.org/api/python/optimization/optimization.html "
+      "for more details.");
 }
 
 struct SGDParam : public dmlc::Parameter<SGDParam> {
@@ -61,24 +62,23 @@ struct SGDParam : public dmlc::Parameter<SGDParam> {
   float clip_gradient;
   bool lazy_update;
   DMLC_DECLARE_PARAMETER(SGDParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
     DMLC_DECLARE_FIELD(lazy_update)
-    .set_default(true)
-    .describe("If true, lazy updates are applied if gradient's stype is row_sparse.");
+        .set_default(true)
+        .describe("If true, lazy updates are applied if gradient's stype is row_sparse.");
   }
 };
 
@@ -89,23 +89,21 @@ struct MultiSGDParam : public dmlc::Parameter<MultiSGDParam> {
   float clip_gradient;
   int num_weights;
   DMLC_DECLARE_PARAMETER(MultiSGDParam) {
-    DMLC_DECLARE_FIELD(lrs)
-    .describe("Learning rates.");
-    DMLC_DECLARE_FIELD(wds)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lrs).describe("Learning rates.");
+    DMLC_DECLARE_FIELD(wds).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(num_weights)
-    .set_default(1)
-    .describe("Number of updated weights.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(num_weights).set_default(1).describe("Number of updated weights.");
   }
 };
 
@@ -117,51 +115,47 @@ struct MultiSGDMomParam : public dmlc::Parameter<MultiSGDMomParam> {
   float clip_gradient;
   int num_weights;
   DMLC_DECLARE_PARAMETER(MultiSGDMomParam) {
-    DMLC_DECLARE_FIELD(lrs)
-    .describe("Learning rates.");
-    DMLC_DECLARE_FIELD(wds)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
-    DMLC_DECLARE_FIELD(momentum)
-    .set_default(0.0f)
-    .describe("The decay rate of momentum estimates at each epoch.");
+    DMLC_DECLARE_FIELD(lrs).describe("Learning rates.");
+    DMLC_DECLARE_FIELD(wds).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.0f).describe(
+        "The decay rate of momentum estimates at each epoch.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(num_weights)
-    .set_default(1)
-    .describe("Number of updated weights.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(num_weights).set_default(1).describe("Number of updated weights.");
   }
 };
 
-
-template<typename ParamType, int input_stride>
+template <typename ParamType, int input_stride>
 inline bool MultiSGDShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_weights);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_shapes = *in_attrs;
+  bool all_inferred   = true;
+  auto& input_shapes  = *in_attrs;
   auto& output_shapes = *out_attrs;
   // Learning rates
   CHECK_EQ(param.lrs.ndim(), param.num_weights)
-    << "Number of learning rates is inconsistent with num_weights "
-    << "parameter passed. Expected number of learning rates: "
-    << param.num_weights << ", and got " << param.lrs.ndim();
+      << "Number of learning rates is inconsistent with num_weights "
+      << "parameter passed. Expected number of learning rates: " << param.num_weights
+      << ", and got " << param.lrs.ndim();
   // Weight decays
   CHECK_EQ(param.wds.ndim(), param.num_weights)
-    << "Number of weight decays is inconsistent with num_weights "
-    << "parameter passed. Expected number of weight decays: "
-    << param.num_weights << ", and got " << param.wds.ndim();
+      << "Number of weight decays is inconsistent with num_weights "
+      << "parameter passed. Expected number of weight decays: " << param.num_weights << ", and got "
+      << param.wds.ndim();
   // Weights and gradients
   for (int i = 0; i < param.num_weights; ++i) {
     mxnet::ShapeVector input_vec;
@@ -176,14 +170,14 @@ inline bool MultiSGDShape(const nnvm::NodeAttrs& attrs,
 
 template <typename ParamType, int input_stride, int num_fp32_inputs>
 inline bool MP_MultiSGD_InferType(const nnvm::NodeAttrs& attrs,
-                                  std::vector<int> *in_attrs,
-                                  std::vector<int> *out_attrs) {
+                                  std::vector<int>* in_attrs,
+                                  std::vector<int>* out_attrs) {
   const ParamType& param = dmlc::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), input_stride * param.num_weights);
   CHECK_EQ(out_attrs->size(), param.num_weights);
 
-  bool all_inferred = true;
-  auto& input_types = *in_attrs;
+  bool all_inferred  = true;
+  auto& input_types  = *in_attrs;
   auto& output_types = *out_attrs;
   // Weights and gradients
   for (int i = 0; i < param.num_weights; ++i) {
@@ -204,17 +198,17 @@ inline bool MP_MultiSGD_InferType(const nnvm::NodeAttrs& attrs,
   return all_inferred;
 }
 
-template<typename DType, typename MPDType>
+template <typename DType, typename MPDType>
 struct MultiSGDKernelParam {
   static const int N = 60;
   int count;
   size_t max_size;
   size_t sizes[N];
-  DType * weights[N];
-  DType * grads[N];
-  MPDType * mom[N];
-  MPDType * weights32[N];
-  DType * out_data[N];
+  DType* weights[N];
+  DType* grads[N];
+  MPDType* mom[N];
+  MPDType* weights32[N];
+  DType* out_data[N];
   MPDType lrs[N];
   MPDType wds[N];
   MPDType clip_gradient;
@@ -224,13 +218,14 @@ struct MultiSGDKernelParam {
 
 template <typename MPDType, bool has_momentum, bool has_mixed_precision>
 struct MultiSGDKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const MultiSGDKernelParam<DType, MPDType>& param,
-    const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const MultiSGDKernelParam<DType, MPDType>& param,
+                                  const OpReqType req) {
     for (int index = 0; index < param.count; ++index) {
       if (i < static_cast<index_t>(param.sizes[index])) {
-        MPDType w = has_mixed_precision ? param.weights32[index][i] :
-                                          MPDType(param.weights[index][i]);
+        MPDType w =
+            has_mixed_precision ? param.weights32[index][i] : MPDType(param.weights[index][i]);
         MPDType rescale_grad = param.rescale_grad * static_cast<MPDType>(param.grads[index][i]);
         if (param.clip_gradient >= 0.0f) {
           rescale_grad = mshadow_op::clip::Map(rescale_grad, param.clip_gradient);
@@ -252,63 +247,56 @@ struct MultiSGDKernel {
   }
 };
 
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         typename ParamType = MultiSGDParam,
-         int input_stride = 2>
+template <typename xpu,
+          typename DType,
+          typename MPDType,
+          typename ParamType = MultiSGDParam,
+          int input_stride   = 2>
 MultiSGDKernelParam<DType, MPDType> FillMultiSGDKernelParam(const nnvm::NodeAttrs& attrs,
-                                                            const OpContext &ctx,
-                                                            const std::vector<TBlob> &inputs,
-                                                            const std::vector<TBlob> &outputs) {
+                                                            const OpContext& ctx,
+                                                            const std::vector<TBlob>& inputs,
+                                                            const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const ParamType& p = nnvm::get<ParamType>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s     = ctx.get_stream<xpu>();
   MultiSGDKernelParam<DType, MPDType> param;
   param.clip_gradient = p.clip_gradient;
-  param.rescale_grad = p.rescale_grad;
-  param.momentum = 0;
-  param.count = p.num_weights;
-  param.max_size = 0;
+  param.rescale_grad  = p.rescale_grad;
+  param.momentum      = 0;
+  param.count         = p.num_weights;
+  param.max_size      = 0;
   for (int i = 0; i < param.count; ++i) {
     param.sizes[i] = inputs[i * input_stride].shape_.Size();
     if (param.max_size < param.sizes[i]) {
       param.max_size = param.sizes[i];
     }
     param.weights[i] = inputs[i * input_stride].FlatTo2D<xpu, DType>(s).dptr_;
-    param.grads[i] = inputs[i * input_stride + 1].FlatTo2D<xpu, DType>(s).dptr_;
+    param.grads[i]   = inputs[i * input_stride + 1].FlatTo2D<xpu, DType>(s).dptr_;
     // if mixed precision, then the last input in a set
     // is 32-bit master copy of the weights
     if (!std::is_same<DType, MPDType>::value) {
-      param.weights32[i] = inputs[i * input_stride + input_stride - 1]
-                           .FlatTo2D<xpu, MPDType>(s).dptr_;
+      param.weights32[i] =
+          inputs[i * input_stride + input_stride - 1].FlatTo2D<xpu, MPDType>(s).dptr_;
     }
     param.out_data[i] = outputs[i].FlatTo2D<xpu, DType>(s).dptr_;
-    param.lrs[i] = p.lrs[i];
-    param.wds[i] = p.wds[i];
+    param.lrs[i]      = p.lrs[i];
+    param.wds[i]      = p.wds[i];
   }
 
   return param;
 }
 
-
-template<typename xpu,
-         typename DType,
-         typename MPDType,
-         int input_stride = 3>
+template <typename xpu, typename DType, typename MPDType, int input_stride = 3>
 MultiSGDKernelParam<DType, MPDType> FillMultiSGDMomKernelParam(const nnvm::NodeAttrs& attrs,
-                                                            const OpContext &ctx,
-                                                            const std::vector<TBlob> &inputs,
-                                                            const std::vector<TBlob> &outputs) {
+                                                               const OpContext& ctx,
+                                                               const std::vector<TBlob>& inputs,
+                                                               const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const MultiSGDMomParam& p = nnvm::get<MultiSGDMomParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
   MultiSGDKernelParam<DType, MPDType> param =
-    FillMultiSGDKernelParam<xpu,
-                            DType,
-                            MPDType,
-                            MultiSGDMomParam,
-                            input_stride>(attrs, ctx, inputs, outputs);
+      FillMultiSGDKernelParam<xpu, DType, MPDType, MultiSGDMomParam, input_stride>(
+          attrs, ctx, inputs, outputs);
   param.momentum = p.momentum;
   for (int i = 0; i < param.count; ++i) {
     param.mom[i] = inputs[i * input_stride + 2].FlatTo2D<xpu, MPDType>(s).dptr_;
@@ -317,69 +305,64 @@ MultiSGDKernelParam<DType, MPDType> FillMultiSGDMomKernelParam(const nnvm::NodeA
   return param;
 }
 
-template<typename T>
+template <typename T>
 class type_identity {
  public:
   using type = T;
 };
 
-template<typename T>
+template <typename T>
 class single_precision {
  public:
   using type = float;
 };
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 inline void MultiSGDUpdate(const nnvm::NodeAttrs& attrs,
-                           const OpContext &ctx,
-                           const std::vector<TBlob> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &outputs) {
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     MultiSGDKernelParam<DType, MPDType> param =
-      FillMultiSGDKernelParam<xpu,
-                              DType,
-                              MPDType,
-                              MultiSGDParam,
-                              input_stride>(attrs, ctx, inputs, outputs);
-    Kernel<MultiSGDKernel<MPDType,
-                          false,
-                          !std::is_same<DType, MPDType>::value>,
-                          xpu>::Launch(s, param.max_size, param, req[0]);
+        FillMultiSGDKernelParam<xpu, DType, MPDType, MultiSGDParam, input_stride>(
+            attrs, ctx, inputs, outputs);
+    Kernel<MultiSGDKernel<MPDType, false, !std::is_same<DType, MPDType>::value>, xpu>::Launch(
+        s, param.max_size, param, req[0]);
   });
 }
 
-template<typename xpu, template<typename> class MPTypeChooser, int input_stride>
+template <typename xpu, template <typename> class MPTypeChooser, int input_stride>
 inline void MultiSGDMomUpdate(const nnvm::NodeAttrs& attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     using MPDType = typename MPTypeChooser<DType>::type;
     MultiSGDKernelParam<DType, MPDType> param =
-      FillMultiSGDMomKernelParam<xpu,
-                                 DType,
-                                 MPDType,
-                                 input_stride>(attrs, ctx, inputs, outputs);
-    Kernel<MultiSGDKernel<MPDType,
-                          true,
-                          !std::is_same<DType, MPDType>::value>,
-                          xpu>::Launch(s, param.max_size, param, req[0]);
+        FillMultiSGDMomKernelParam<xpu, DType, MPDType, input_stride>(attrs, ctx, inputs, outputs);
+    Kernel<MultiSGDKernel<MPDType, true, !std::is_same<DType, MPDType>::value>, xpu>::Launch(
+        s, param.max_size, param, req[0]);
   });
 }
 
 struct SGDKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* weight_data,
-    const DType* grad_data, const DType param_clip_gradient,
-    const DType param_lr, const DType param_wd, const DType param_rescale_grad,
-    const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType param_clip_gradient,
+                                  const DType param_lr,
+                                  const DType param_wd,
+                                  const DType param_rescale_grad,
+                                  const OpReqType req) {
     DType rescale_grad = param_rescale_grad * grad_data[i];
     if (param_clip_gradient >= 0.0f) {
       rescale_grad = mshadow_op::clip::Map(rescale_grad, param_clip_gradient);
@@ -389,48 +372,60 @@ struct SGDKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void SGDUpdate(const nnvm::NodeAttrs& attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const SGDParam& param = nnvm::get<SGDParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<SGDKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, weight.dptr_,
-      grad.dptr_, static_cast<DType>(param.clip_gradient),
-      static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-      static_cast<DType>(param.rescale_grad), req[0]);
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<SGDKernel, xpu>::Launch(s,
+                                   weight.shape_.Size(),
+                                   out.dptr_,
+                                   weight.dptr_,
+                                   grad.dptr_,
+                                   static_cast<DType>(param.clip_gradient),
+                                   static_cast<DType>(param.lr),
+                                   static_cast<DType>(param.wd),
+                                   static_cast<DType>(param.rescale_grad),
+                                   req[0]);
   });
 }
 
 /*! \brief kernel for sparse sgd
  */
-template<int req, typename xpu>
+template <int req, typename xpu>
 struct SGDDnsRspKernel;
 
-template<int req>
+template <int req>
 struct SGDDnsRspKernel<req, gpu> {
   // DType is the output data type
   // IType is row sparse idx type
   // i is the ith element in row sparse gradient
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, const index_t row_length, DType* out,
-                                  const DType* weight, const IType* grad_idx,
-                                  const DType *grad_val, const DType clip_gradient, const DType lr,
-                                  const DType wd, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const index_t row_length,
+                                  DType* out,
+                                  const DType* weight,
+                                  const IType* grad_idx,
+                                  const DType* grad_val,
+                                  const DType clip_gradient,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
     using namespace mshadow_op;
-    const dim_t row_id = i / row_length;
-    const dim_t col_id = i % row_length;
+    const dim_t row_id     = i / row_length;
+    const dim_t col_id     = i % row_length;
     const dim_t row_offset = grad_idx[row_id] * row_length;
-    const dim_t data_i = row_offset + col_id;
-    DType grad_rescaled = rescale_grad * grad_val[i];
+    const dim_t data_i     = row_offset + col_id;
+    DType grad_rescaled    = rescale_grad * grad_val[i];
     if (clip_gradient >= 0.0f) {
       grad_rescaled = mshadow_op::clip::Map(grad_rescaled, clip_gradient);
     }
@@ -441,19 +436,25 @@ struct SGDDnsRspKernel<req, gpu> {
 
 /*! \brief kernel for sparse sgd
  */
-template<int req>
+template <int req>
 struct SGDDnsRspKernel<req, cpu> {
   // DType is the output data type
   // IType is row sparse idx type
   // i is the ith row in row sparse gradient
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, const index_t row_length, DType* out,
-                                  const DType* weight, const IType* grad_idx,
-                                  const DType *grad_val, const DType clip_gradient, const DType lr,
-                                  const DType wd, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const index_t row_length,
+                                  DType* out,
+                                  const DType* weight,
+                                  const IType* grad_idx,
+                                  const DType* grad_val,
+                                  const DType clip_gradient,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
     for (index_t j = 0; j < row_length; j++) {
-      index_t data_i = grad_idx[i] * row_length + j;
-      index_t grad_i = i * row_length + j;
+      index_t data_i      = grad_idx[i] * row_length + j;
+      index_t grad_i      = i * row_length + j;
       DType grad_rescaled = rescale_grad * grad_val[grad_i];
       if (clip_gradient >= 0.0f) {
         grad_rescaled = mshadow_op::clip::Map(grad_rescaled, clip_gradient);
@@ -468,13 +469,13 @@ struct SGDDnsRspKernel<req, cpu> {
  * \brief SGD update implementation for dense weight and row_sparse grad.
  *        Both standard update and lazy update are supported.
  */
-template<typename xpu>
+template <typename xpu>
 inline void SGDUpdateDnsRspImpl(const SGDParam& param,
-                                const OpContext &ctx,
+                                const OpContext& ctx,
                                 const TBlob& weight,
                                 const NDArray& grad,
                                 const OpReqType& req,
-                                TBlob *out) {
+                                TBlob* out) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mshadow_op;
@@ -482,7 +483,8 @@ inline void SGDUpdateDnsRspImpl(const SGDParam& param,
   Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(grad.storage_type(), kRowSparseStorage);
   // if gradients are zeros, no weights are updated
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse sgd_mom_update";
   CHECK_GT(weight.shape_.Size(), 0);
 
@@ -490,27 +492,38 @@ inline void SGDUpdateDnsRspImpl(const SGDParam& param,
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(rowsparse::kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
         DType* weight_data = weight.dptr<DType>();
-        float wd = param.wd;
+        float wd           = param.wd;
         // apply standard weight decay if not lazy update
         if (!param.lazy_update) {
-          Kernel<op_with_req<mshadow_op::mul, req_type>, xpu>::Launch(s, weight.Size(),
-          weight_data, weight_data, static_cast<DType>(1 - param.lr * param.wd));
+          Kernel<op_with_req<mshadow_op::mul, req_type>, xpu>::Launch(
+              s,
+              weight.Size(),
+              weight_data,
+              weight_data,
+              static_cast<DType>(1 - param.lr * param.wd));
           wd = 0;
         }
-        if (!grad.storage_initialized()) return;
-        const IType* grad_idx = grad.aux_data(rowsparse::kIdx).dptr<IType>();
-        const DType* grad_val = grad.data().dptr<DType>();
+        if (!grad.storage_initialized())
+          return;
+        const IType* grad_idx      = grad.aux_data(rowsparse::kIdx).dptr<IType>();
+        const DType* grad_val      = grad.data().dptr<DType>();
         const nnvm::dim_t num_rows = grad.aux_shape(rowsparse::kIdx)[0];
-        const auto row_length = weight.shape_.ProdShape(1, weight.ndim());
-        size_t num_threads = num_rows;
+        const auto row_length      = weight.shape_.ProdShape(1, weight.ndim());
+        size_t num_threads         = num_rows;
         if (std::is_same<xpu, gpu>::value) {
           num_threads = num_rows * row_length;
         }
-        Kernel<SGDDnsRspKernel<req_type, xpu>, xpu>::Launch(s, num_threads, row_length,
-          out->dptr<DType>(), weight_data, grad_idx, grad_val,
-          static_cast<DType>(param.clip_gradient),
-          static_cast<DType>(param.lr), static_cast<DType>(wd),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<SGDDnsRspKernel<req_type, xpu>, xpu>::Launch(s,
+                                                            num_threads,
+                                                            row_length,
+                                                            out->dptr<DType>(),
+                                                            weight_data,
+                                                            grad_idx,
+                                                            grad_val,
+                                                            static_cast<DType>(param.clip_gradient),
+                                                            static_cast<DType>(param.lr),
+                                                            static_cast<DType>(wd),
+                                                            static_cast<DType>(param.rescale_grad));
       });
     });
   });
@@ -520,29 +533,29 @@ inline void SGDUpdateDnsRspImpl(const SGDParam& param,
  * \brief SGD update implementation for row_sparse grad.
  *        Both standard update and lazy update are supported.
  */
-template<typename xpu>
+template <typename xpu>
 inline void SGDUpdateRspImpl(const SGDParam& param,
                              const OpContext& ctx,
                              const NDArray& weight,
                              const NDArray& grad,
                              const OpReqType& req,
-                             NDArray *out) {
+                             NDArray* out) {
   CheckAllRowsPresent(weight, "SGDUpdate", "weights");
   // reuse dns rsp implementation when storage_shape == shape
   TBlob out_blob = out->data();
   SGDUpdateDnsRspImpl<xpu>(param, ctx, weight.data(), grad, req, &out_blob);
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void SGDUpdateEx(const nnvm::NodeAttrs& attrs,
-                        const OpContext &ctx,
-                        const std::vector<NDArray> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<NDArray> &outputs) {
+                        const OpContext& ctx,
+                        const std::vector<NDArray>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<NDArray>& outputs) {
   const SGDParam& param = nnvm::get<SGDParam>(attrs.parsed);
-  const auto w_stype = inputs[0].storage_type();
-  const auto g_stype = inputs[1].storage_type();
-  const auto o_stype = outputs[0].storage_type();
+  const auto w_stype    = inputs[0].storage_type();
+  const auto g_stype    = inputs[1].storage_type();
+  const auto o_stype    = outputs[0].storage_type();
   if (o_stype == w_stype && g_stype == kRowSparseStorage &&
       (w_stype == kDefaultStorage || w_stype == kRowSparseStorage)) {
     NDArray out = outputs[0];
@@ -561,39 +574,43 @@ struct SGDMomParam : public dmlc::Parameter<SGDMomParam> {
   float clip_gradient;
   bool lazy_update;
   DMLC_DECLARE_PARAMETER(SGDMomParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(momentum)
-    .set_default(0.0f)
-    .describe("The decay rate of momentum estimates at each epoch.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.0f).describe(
+        "The decay rate of momentum estimates at each epoch.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
     DMLC_DECLARE_FIELD(lazy_update)
-    .set_default(true)
-    .describe("If true, lazy updates are applied if gradient's stype is row_sparse "
-              "and both weight and momentum have the same stype");
+        .set_default(true)
+        .describe(
+            "If true, lazy updates are applied if gradient's stype is row_sparse "
+            "and both weight and momentum have the same stype");
   }
 };
 
-
 struct SGDMomKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, DType* mom_data,
-                                  const DType* weight_data, const DType* grad_data,
-                                  const DType param_clip_gradient, const DType param_momentum,
-                                  const DType param_lr, const DType param_wd,
-                                  const DType param_rescale_grad, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType param_clip_gradient,
+                                  const DType param_momentum,
+                                  const DType param_lr,
+                                  const DType param_wd,
+                                  const DType param_rescale_grad,
+                                  const OpReqType req) {
     DType rescale_grad = param_rescale_grad * grad_data[i];
     if (param_clip_gradient >= 0.0f) {
       rescale_grad = mshadow_op::clip::Map(rescale_grad, param_clip_gradient);
@@ -605,31 +622,39 @@ struct SGDMomKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void SGDMomUpdate(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   SGDMomParam param = nnvm::get<SGDMomParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> mom = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<SGDMomKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, mom.dptr_, weight.dptr_,
-      grad.dptr_, static_cast<DType>(param.clip_gradient), static_cast<DType>(param.momentum),
-      static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-      static_cast<DType>(param.rescale_grad), req[0]);
-    });
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> mom    = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<SGDMomKernel, xpu>::Launch(s,
+                                      weight.shape_.Size(),
+                                      out.dptr_,
+                                      mom.dptr_,
+                                      weight.dptr_,
+                                      grad.dptr_,
+                                      static_cast<DType>(param.clip_gradient),
+                                      static_cast<DType>(param.momentum),
+                                      static_cast<DType>(param.lr),
+                                      static_cast<DType>(param.wd),
+                                      static_cast<DType>(param.rescale_grad),
+                                      req[0]);
+  });
 }
 
-template<int n_in, int n_out, int total_in>
+template <int n_in, int n_out, int total_in>
 inline bool MP_InferType(const nnvm::NodeAttrs& attrs,
-                             std::vector<int> *in_attrs,
-                             std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), static_cast<size_t>(total_in)) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   for (int i = n_in; i < total_in; ++i) {
@@ -640,12 +665,18 @@ inline bool MP_InferType(const nnvm::NodeAttrs& attrs,
 }
 
 struct MP_SGDKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* weight_data,
-    const DType* grad_data, float* weight32, const float param_clip_gradient,
-    const float param_lr, const float param_wd, const float param_rescale_grad,
-    const OpReqType req) {
-    float w = weight32[i];
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  float* weight32,
+                                  const float param_clip_gradient,
+                                  const float param_lr,
+                                  const float param_wd,
+                                  const float param_rescale_grad,
+                                  const OpReqType req) {
+    float w            = weight32[i];
     float rescale_grad = param_rescale_grad * static_cast<float>(grad_data[i]);
     if (param_clip_gradient >= 0.0f) {
       rescale_grad = mshadow_op::clip::Map(rescale_grad, param_clip_gradient);
@@ -657,36 +688,51 @@ struct MP_SGDKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MP_SGDUpdate(const nnvm::NodeAttrs& attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const SGDParam& param = nnvm::get<SGDParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> grad     = inputs[1].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, float> weight32 = inputs[2].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<MP_SGDKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, weight.dptr_,
-      grad.dptr_, weight32.dptr_, param.clip_gradient,
-      param.lr, param.wd,
-      param.rescale_grad, req[0]);
+    Tensor<xpu, 2, DType> out      = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<MP_SGDKernel, xpu>::Launch(s,
+                                      weight.shape_.Size(),
+                                      out.dptr_,
+                                      weight.dptr_,
+                                      grad.dptr_,
+                                      weight32.dptr_,
+                                      param.clip_gradient,
+                                      param.lr,
+                                      param.wd,
+                                      param.rescale_grad,
+                                      req[0]);
   });
 }
 
 struct MP_SGDMomKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, float* mom_data,
-    const DType* weight_data, const DType* grad_data, float* weight32,
-    const float param_clip_gradient, const float param_momentum, const float param_lr,
-    const float param_wd, const float param_rescale_grad, const OpReqType req) {
-    float w = weight32[i];
-    float mom = mom_data[i];
-    float grad_rescaled = param_rescale_grad*static_cast<float>(grad_data[i]);
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  float* mom_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  float* weight32,
+                                  const float param_clip_gradient,
+                                  const float param_momentum,
+                                  const float param_lr,
+                                  const float param_wd,
+                                  const float param_rescale_grad,
+                                  const OpReqType req) {
+    float w             = weight32[i];
+    float mom           = mom_data[i];
+    float grad_rescaled = param_rescale_grad * static_cast<float>(grad_data[i]);
     if (param_clip_gradient >= 0.0f) {
       grad_rescaled = mshadow_op::clip::Map(grad_rescaled, param_clip_gradient);
     }
@@ -694,46 +740,64 @@ struct MP_SGDMomKernel {
     mom *= param_momentum;
     mom -= param_lr * grad_rescaled;
     mom_data[i] = mom;
-    w = w + mom;
+    w           = w + mom;
     weight32[i] = w;
     KERNEL_ASSIGN(out_data[i], req, w);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MP_SGDMomUpdate(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   SGDMomParam param = nnvm::get<SGDMomParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, float> mom = inputs[2].FlatTo2D<xpu, float>(s);
+    Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> grad     = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, float> mom      = inputs[2].FlatTo2D<xpu, float>(s);
     Tensor<xpu, 2, float> weight32 = inputs[3].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<MP_SGDMomKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, mom.dptr_,
-      weight.dptr_, grad.dptr_, weight32.dptr_, param.clip_gradient, param.momentum,
-      param.lr, param.wd, param.rescale_grad, req[0]);
+    Tensor<xpu, 2, DType> out      = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<MP_SGDMomKernel, xpu>::Launch(s,
+                                         weight.shape_.Size(),
+                                         out.dptr_,
+                                         mom.dptr_,
+                                         weight.dptr_,
+                                         grad.dptr_,
+                                         weight32.dptr_,
+                                         param.clip_gradient,
+                                         param.momentum,
+                                         param.lr,
+                                         param.wd,
+                                         param.rescale_grad,
+                                         req[0]);
   });
 }
 
-template<int req, typename xpu>
+template <int req, typename xpu>
 struct SGDMomDnsRspDnsKernel;
 
-template<int req>
+template <int req>
 struct SGDMomDnsRspDnsKernel<req, cpu> {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t row_length, DType* out_data,
-    DType* mom_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType momentum,
-    const DType lr, const DType wd, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t row_length,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType momentum,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
     for (index_t j = 0; j < row_length; j++) {
-      index_t data_i = grad_idx[i] * row_length + j;
-      index_t grad_i = i * row_length + j;
+      index_t data_i      = grad_idx[i] * row_length + j;
+      index_t grad_i      = i * row_length + j;
       DType grad_rescaled = rescale_grad * grad_data[grad_i];
       if (clip_gradient >= 0.0f) {
         grad_rescaled = mshadow_op::clip::Map(grad_rescaled, clip_gradient);
@@ -746,17 +810,25 @@ struct SGDMomDnsRspDnsKernel<req, cpu> {
   }
 };
 
-template<int req>
+template <int req>
 struct SGDMomDnsRspDnsKernel<req, gpu> {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t row_length, DType* out_data,
-    DType* mom_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType momentum,
-    const DType lr, const DType wd, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t row_length,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType momentum,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
-    const dim_t row_id = i / row_length;
-    const dim_t col_id = i % row_length;
-    const dim_t data_i = grad_idx[row_id] * row_length + col_id;
+    const dim_t row_id  = i / row_length;
+    const dim_t col_id  = i % row_length;
+    const dim_t data_i  = grad_idx[row_id] * row_length + col_id;
     DType grad_rescaled = rescale_grad * grad_data[i];
     if (clip_gradient >= 0.0f) {
       grad_rescaled = mshadow_op::clip::Map(grad_rescaled, clip_gradient);
@@ -771,18 +843,19 @@ struct SGDMomDnsRspDnsKernel<req, gpu> {
 /*
  * \brief sgd mom lazy update for dense weight, row_sparse grad, dense state.
  */
-template<typename xpu>
+template <typename xpu>
 inline void SGDMomLazyUpdateDnsRspDnsImpl(const SGDMomParam& param,
                                           const OpContext& ctx,
                                           const TBlob& weight,
                                           const NDArray& grad,
                                           const TBlob& mom,
                                           const OpReqType& req,
-                                          TBlob *out) {
+                                          TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  if (!grad.storage_initialized() || req == kNullOp) return;
+  if (!grad.storage_initialized() || req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse sgd_mom_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(mom.shape_.Size(), 0);
@@ -791,21 +864,30 @@ inline void SGDMomLazyUpdateDnsRspDnsImpl(const SGDMomParam& param,
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
         DType* weight_data = weight.dptr<DType>();
-        IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        DType* grad_val = grad.data().dptr<DType>();
-        DType* mom_data = mom.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        index_t num_rows = grad.aux_shape(kIdx)[0];
-        auto row_length = weight.shape_.ProdShape(1, weight.ndim());
+        IType* grad_idx    = grad.aux_data(kIdx).dptr<IType>();
+        DType* grad_val    = grad.data().dptr<DType>();
+        DType* mom_data    = mom.dptr<DType>();
+        DType* out_data    = out->dptr<DType>();
+        index_t num_rows   = grad.aux_shape(kIdx)[0];
+        auto row_length    = weight.shape_.ProdShape(1, weight.ndim());
         size_t num_threads = num_rows;
         if (std::is_same<xpu, gpu>::value) {
           num_threads = num_rows * row_length;
         }
-        Kernel<SGDMomDnsRspDnsKernel<req_type, xpu>, xpu>::Launch(s, num_threads, row_length,
-          out_data, mom_data, weight_data, grad_idx, grad_val,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.momentum),
-          static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<SGDMomDnsRspDnsKernel<req_type, xpu>, xpu>::Launch(
+            s,
+            num_threads,
+            row_length,
+            out_data,
+            mom_data,
+            weight_data,
+            grad_idx,
+            grad_val,
+            static_cast<DType>(param.clip_gradient),
+            static_cast<DType>(param.momentum),
+            static_cast<DType>(param.lr),
+            static_cast<DType>(param.wd),
+            static_cast<DType>(param.rescale_grad));
       });
     });
   });
@@ -814,14 +896,14 @@ inline void SGDMomLazyUpdateDnsRspDnsImpl(const SGDMomParam& param,
 /*
  * \brief sgd momentum lazy update for row_sparse grad.
  */
-template<typename xpu>
+template <typename xpu>
 inline void SGDMomLazyUpdateRspImpl(const SGDMomParam& param,
                                     const OpContext& ctx,
                                     const NDArray& weight,
                                     const NDArray& grad,
                                     const NDArray& mom,
                                     const OpReqType& req,
-                                    NDArray *out) {
+                                    NDArray* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   CheckAllRowsPresent(weight, "SGDMomUpdate", "weights");
@@ -834,8 +916,7 @@ inline void SGDMomLazyUpdateRspImpl(const SGDMomParam& param,
   }
   TBlob out_blob = out->data();
   // reuse dns rsp implementation when storage_shape == shape
-  SGDMomLazyUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad,
-                                     mom.data(), req, &out_blob);
+  SGDMomLazyUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, mom.data(), req, &out_blob);
 }
 
 /*!
@@ -843,7 +924,7 @@ inline void SGDMomLazyUpdateRspImpl(const SGDMomParam& param,
  *        lazy update and standard update, with states (e.g. 2nd order moment)
  * \param num_states The number of states that could be row_sparse or dense
  */
-template<size_t num_states, typename ParamType>
+template <size_t num_states, typename ParamType>
 inline bool StdOptStorageType(const nnvm::NodeAttrs& attrs,
                               const int dev_mask,
                               DispatchMode* dispatch_mode,
@@ -855,34 +936,38 @@ inline bool StdOptStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 2 + num_states);
   CHECK_EQ(out_attrs->size(), 1U);
   const int weight_stype = in_attrs->at(0);
-  const int grad_stype = in_attrs->at(1);
-  const int state_stype = in_attrs->at(2);
+  const int grad_stype   = in_attrs->at(1);
+  const int state_stype  = in_attrs->at(2);
   // the storage type of all states should be the same
-  for (size_t i = 3; i <  2 + num_states; i++) {
-    CHECK_EQ(state_stype, in_attrs->at(i))
-      << "Inconsistent storage types detected in state " << i;
+  for (size_t i = 3; i < 2 + num_states; i++) {
+    CHECK_EQ(state_stype, in_attrs->at(i)) << "Inconsistent storage types detected in state " << i;
   }
   bool dispatched = false;
   if (!dispatched && ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
     // dns, ... -> dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && grad_stype == kRowSparseStorage &&
       (weight_stype == kRowSparseStorage || weight_stype == kDefaultStorage) &&
       state_stype == weight_stype) {
     // weight and state share stype, grad's stype = rsp
-    dispatched = storage_type_assign(out_attrs, static_cast<NDArrayStorageType>(weight_stype),
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(out_attrs,
+                                     static_cast<NDArrayStorageType>(weight_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
     // warn users if lazy_update is turned on
-    if (dispatched && param.lazy_update) LogLazyUpdate();
+    if (dispatched && param.lazy_update)
+      LogLazyUpdate();
   }
-  if (!dispatched && grad_stype == kRowSparseStorage &&
-      weight_stype == kRowSparseStorage && state_stype == kDefaultStorage) {
+  if (!dispatched && grad_stype == kRowSparseStorage && weight_stype == kRowSparseStorage &&
+      state_stype == kDefaultStorage) {
     // weight,  grad, state, ...  -> weight
     // rsp,     rsp,  dns,   ...  -> rsp, standard update
-    dispatched = storage_type_assign(out_attrs, static_cast<NDArrayStorageType>(weight_stype),
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(out_attrs,
+                                     static_cast<NDArrayStorageType>(weight_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -893,34 +978,33 @@ inline bool StdOptStorageType(const nnvm::NodeAttrs& attrs,
 /*
  * \brief kernel for standard momentum update for dense weight, sparse grad and dense state.
  */
-template<int req, typename xpu>
+template <int req, typename xpu>
 struct SGDMomStdDnsRspDnsKernel;
 
-
 /*
  * \brief standard momentum update for dense weight, row_sparse grad and dense states.
  */
-template<typename xpu>
+template <typename xpu>
 void SGDMomStdUpdateDnsRspDnsImpl(const SGDMomParam& param,
                                   const OpContext& ctx,
                                   const TBlob& weight,
                                   const NDArray& grad,
                                   const TBlob& mom,
                                   const OpReqType& req,
-                                  TBlob *out);
+                                  TBlob* out);
 
 /*
  * \brief standard momentum update for row_sparse grad.
  *        both row_sparse and dense weight are supported.
  */
-template<typename xpu>
+template <typename xpu>
 inline void SGDMomStdUpdateRspImpl(const SGDMomParam& param,
                                    const OpContext& ctx,
                                    const NDArray& weight,
                                    const NDArray& grad,
                                    const NDArray& mom,
                                    const OpReqType& req,
-                                   NDArray *out) {
+                                   NDArray* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   CheckAllRowsPresent(weight, "SGDMomUpdate", "weights");
@@ -932,28 +1016,27 @@ inline void SGDMomStdUpdateRspImpl(const SGDMomParam& param,
     FillDnsZerosRspImpl(s, &mom_zeros);
   }
   TBlob out_blob = out->data();
-  SGDMomStdUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad,
-                                    mom.data(), req, &out_blob);
+  SGDMomStdUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, mom.data(), req, &out_blob);
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void SGDMomUpdateEx(const nnvm::NodeAttrs& attrs,
-                           const OpContext &ctx,
-                           const std::vector<NDArray> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<NDArray> &outputs) {
+                           const OpContext& ctx,
+                           const std::vector<NDArray>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<NDArray>& outputs) {
   using namespace mxnet_op;
   const SGDMomParam& param = nnvm::get<SGDMomParam>(attrs.parsed);
-  auto &weight = inputs[0];
-  auto &grad = inputs[1];
-  auto &mom = inputs[2];
-  const auto w_stype = weight.storage_type();
-  const auto m_stype = mom.storage_type();
-  const auto out_stype = outputs[0].storage_type();
-  NDArray out = outputs[0];
-  const bool valid_weight = w_stype == kDefaultStorage || w_stype == kRowSparseStorage;
-  const bool valid_grad = grad.storage_type() == kRowSparseStorage;
-  const bool lazy_update = param.lazy_update;
+  auto& weight             = inputs[0];
+  auto& grad               = inputs[1];
+  auto& mom                = inputs[2];
+  const auto w_stype       = weight.storage_type();
+  const auto m_stype       = mom.storage_type();
+  const auto out_stype     = outputs[0].storage_type();
+  NDArray out              = outputs[0];
+  const bool valid_weight  = w_stype == kDefaultStorage || w_stype == kRowSparseStorage;
+  const bool valid_grad    = grad.storage_type() == kRowSparseStorage;
+  const bool lazy_update   = param.lazy_update;
   CHECK(w_stype == out_stype) << "Inconsistent weight stype and output stype";
   if (valid_weight && valid_grad && m_stype == w_stype) {
     if (lazy_update) {
@@ -971,29 +1054,27 @@ inline void SGDMomUpdateEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-
 struct NAGParam : public dmlc::Parameter<NAGParam> {
   float lr;
   float wd;
   float rescale_grad;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(NAGParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude "
-              "of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude "
+        "of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
@@ -1004,35 +1085,39 @@ struct NAGMomParam : public dmlc::Parameter<NAGMomParam> {
   float rescale_grad;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(NAGMomParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(momentum)
-    .set_default(0.0f)
-    .describe("The decay rate of momentum estimates at each epoch.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude "
-              "of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.0f).describe(
+        "The decay rate of momentum estimates at each epoch.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude "
+        "of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
 struct NAGMomKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, DType* mom_data,
-    const DType* weight_data, const DType* grad_data,
-    const DType param_clip_gradient, const DType param_momentum,
-    const DType param_lr, const DType param_wd,
-    const DType param_rescale_grad, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType param_clip_gradient,
+                                  const DType param_momentum,
+                                  const DType param_lr,
+                                  const DType param_wd,
+                                  const DType param_rescale_grad,
+                                  const OpReqType req) {
     DType grad_rescaled = param_rescale_grad * grad_data[i];
     if (param_clip_gradient >= 0.0f) {
       grad_rescaled = mshadow_op::clip::Map(grad_rescaled, param_clip_gradient);
@@ -1040,44 +1125,56 @@ struct NAGMomKernel {
     grad_rescaled += param_wd * weight_data[i];
     mom_data[i] *= param_momentum;
     mom_data[i] -= param_lr * grad_rescaled;
-    KERNEL_ASSIGN(out_data[i], req, weight_data[i] + (param_momentum * mom_data[i])
-                   - (param_lr * grad_rescaled));
+    KERNEL_ASSIGN(out_data[i],
+                  req,
+                  weight_data[i] + (param_momentum * mom_data[i]) - (param_lr * grad_rescaled));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void NAGMomUpdate(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   NAGMomParam param = nnvm::get<NAGMomParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> mom = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<NAGMomKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_,
-      mom.dptr_, weight.dptr_, grad.dptr_,
-      static_cast<DType>(param.clip_gradient),
-      static_cast<DType>(param.momentum), static_cast<DType>(param.lr),
-      static_cast<DType>(param.wd), static_cast<DType>(param.rescale_grad),
-      req[0]);
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> mom    = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<NAGMomKernel, xpu>::Launch(s,
+                                      weight.shape_.Size(),
+                                      out.dptr_,
+                                      mom.dptr_,
+                                      weight.dptr_,
+                                      grad.dptr_,
+                                      static_cast<DType>(param.clip_gradient),
+                                      static_cast<DType>(param.momentum),
+                                      static_cast<DType>(param.lr),
+                                      static_cast<DType>(param.wd),
+                                      static_cast<DType>(param.rescale_grad),
+                                      req[0]);
   });
 }
 
 struct MP_NAGMomKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    float* mom_data, const DType* weight_data,
-    const DType* grad_data, float* weight32,
-    const float param_clip_gradient,
-    const float param_momentum, const float param_lr,
-    const float param_wd, const float param_rescale_grad,
-    const OpReqType req) {
-    float w = weight32[i];
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  float* mom_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  float* weight32,
+                                  const float param_clip_gradient,
+                                  const float param_momentum,
+                                  const float param_lr,
+                                  const float param_wd,
+                                  const float param_rescale_grad,
+                                  const OpReqType req) {
+    float w             = weight32[i];
     float grad_rescaled = param_rescale_grad * static_cast<float>(grad_data[i]);
     if (param_clip_gradient >= 0.0f) {
       grad_rescaled = mshadow_op::clip::Map(grad_rescaled, param_clip_gradient);
@@ -1091,29 +1188,37 @@ struct MP_NAGMomKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MP_NAGMomUpdate(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                            const OpContext& ctx,
+                            const std::vector<TBlob>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   NAGMomParam param = nnvm::get<NAGMomParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, float> mom = inputs[2].FlatTo2D<xpu, float>(s);
+    Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> grad     = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, float> mom      = inputs[2].FlatTo2D<xpu, float>(s);
     Tensor<xpu, 2, float> weight32 = inputs[3].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<MP_NAGMomKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_,
-      mom.dptr_, weight.dptr_, grad.dptr_, weight32.dptr_,
-      param.clip_gradient, param.momentum, param.lr, param.wd,
-      param.rescale_grad, req[0]);
+    Tensor<xpu, 2, DType> out      = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<MP_NAGMomKernel, xpu>::Launch(s,
+                                         weight.shape_.Size(),
+                                         out.dptr_,
+                                         mom.dptr_,
+                                         weight.dptr_,
+                                         grad.dptr_,
+                                         weight32.dptr_,
+                                         param.clip_gradient,
+                                         param.momentum,
+                                         param.lr,
+                                         param.wd,
+                                         param.rescale_grad,
+                                         req[0]);
   });
 }
 
-
 struct FTMLParam : public dmlc::Parameter<FTMLParam> {
   float lr;
   float beta1;
@@ -1124,81 +1229,95 @@ struct FTMLParam : public dmlc::Parameter<FTMLParam> {
   float rescale_grad;
   float clip_grad;
   DMLC_DECLARE_PARAMETER(FTMLParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate.");
     DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.6f)
-    .set_range(0.0f, 1.0f)
-    .describe("Generally close to 0.5.");
+        .set_default(0.6f)
+        .set_range(0.0f, 1.0f)
+        .describe("Generally close to 0.5.");
     DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .set_range(0.0f, 1.0f)
-    .describe("Generally close to 1.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-8f)
-    .describe("Epsilon to prevent div 0.");
-    DMLC_DECLARE_FIELD(t)
-    .describe("Number of update.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+        .set_default(0.999f)
+        .set_range(0.0f, 1.0f)
+        .describe("Generally close to 1.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe("Epsilon to prevent div 0.");
+    DMLC_DECLARE_FIELD(t).describe("Number of update.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
-    DMLC_DECLARE_FIELD(clip_grad)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
+    DMLC_DECLARE_FIELD(clip_grad).set_default(-1.0f).describe(
+        "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+        "If clip_gradient <= 0, gradient clipping is turned off. "
+        "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
-
 struct FTMLKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, DType* weight, DType* grad,
-    DType* d, DType* v, DType* z, const DType lr, const DType beta1,
-    const DType beta2, const DType epsilon, const DType t,
-    const DType wd, const DType rescale_grad, const DType clip_grad,
-    const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  DType* weight,
+                                  DType* grad,
+                                  DType* d,
+                                  DType* v,
+                                  DType* z,
+                                  const DType lr,
+                                  const DType beta1,
+                                  const DType beta2,
+                                  const DType epsilon,
+                                  const DType t,
+                                  const DType wd,
+                                  const DType rescale_grad,
+                                  const DType clip_grad,
+                                  const OpReqType req) {
     using namespace mshadow_op;
     const DType grad_i = clip_grad >= 0.0f
-        ? clip::Map(rescale_grad * grad[i], clip_grad) + wd * weight[i]
-        : (rescale_grad * grad[i] + wd * weight[i]);
-    v[i] = beta2 * v[i] + (1 - beta2) * square::Map(grad_i);
-    const DType d_t = (1 - power::Map(beta1, t)) / lr *
-        (square_root::Map(v[i] / (1 - power::Map(beta2, t))) + epsilon);
+                             ? clip::Map(rescale_grad * grad[i], clip_grad) + wd * weight[i]
+                             : (rescale_grad * grad[i] + wd * weight[i]);
+    v[i]               = beta2 * v[i] + (1 - beta2) * square::Map(grad_i);
+    const DType d_t    = (1 - power::Map(beta1, t)) / lr *
+                      (square_root::Map(v[i] / (1 - power::Map(beta2, t))) + epsilon);
     z[i] = beta1 * z[i] + (1 - beta1) * grad_i - (d_t - beta1 * d[i]) * weight[i];
     d[i] = d_t;
-    KERNEL_ASSIGN(out[i], req, - z[i] / d_t);
+    KERNEL_ASSIGN(out[i], req, -z[i] / d_t);
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 inline void FTMLUpdate(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   FTMLParam param = nnvm::get<FTMLParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s  = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     DType* weight_data = inputs[0].dptr<DType>();
-    DType* grad_data = inputs[1].dptr<DType>();
-    DType* d_data = inputs[2].dptr<DType>();
-    DType* v_data = inputs[3].dptr<DType>();
-    DType* z_data = inputs[4].dptr<DType>();
-    DType* out_data = outputs[0].dptr<DType>();
-    Kernel<FTMLKernel, xpu>::Launch(s, inputs[0].shape_.Size(), out_data,
-      weight_data, grad_data, d_data, v_data, z_data, static_cast<DType>(param.lr),
-      static_cast<DType>(param.beta1), static_cast<DType>(param.beta2),
-      static_cast<DType>(param.epsilon), static_cast<DType>(param.t), static_cast<DType>(param.wd),
-      static_cast<DType>(param.rescale_grad), static_cast<DType>(param.clip_grad),
-      req[0]);
+    DType* grad_data   = inputs[1].dptr<DType>();
+    DType* d_data      = inputs[2].dptr<DType>();
+    DType* v_data      = inputs[3].dptr<DType>();
+    DType* z_data      = inputs[4].dptr<DType>();
+    DType* out_data    = outputs[0].dptr<DType>();
+    Kernel<FTMLKernel, xpu>::Launch(s,
+                                    inputs[0].shape_.Size(),
+                                    out_data,
+                                    weight_data,
+                                    grad_data,
+                                    d_data,
+                                    v_data,
+                                    z_data,
+                                    static_cast<DType>(param.lr),
+                                    static_cast<DType>(param.beta1),
+                                    static_cast<DType>(param.beta2),
+                                    static_cast<DType>(param.epsilon),
+                                    static_cast<DType>(param.t),
+                                    static_cast<DType>(param.wd),
+                                    static_cast<DType>(param.rescale_grad),
+                                    static_cast<DType>(param.clip_grad),
+                                    req[0]);
   });
 }
 
@@ -1212,45 +1331,50 @@ struct AdamParam : public dmlc::Parameter<AdamParam> {
   float clip_gradient;
   bool lazy_update;
   DMLC_DECLARE_PARAMETER(AdamParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(beta1)
-    .set_default(0.9f)
-    .describe("The decay rate for the 1st moment estimates.");
-    DMLC_DECLARE_FIELD(beta2)
-    .set_default(0.999f)
-    .describe("The decay rate for the 2nd moment estimates.");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "The decay rate for the 1st moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "The decay rate for the 2nd moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
     DMLC_DECLARE_FIELD(lazy_update)
-    .set_default(true)
-    .describe("If true, lazy updates are applied if gradient's stype is row_sparse "
-              "and all of w, m and v have the same stype");
+        .set_default(true)
+        .describe(
+            "If true, lazy updates are applied if gradient's stype is row_sparse "
+            "and all of w, m and v have the same stype");
   }
 };
 
 struct AdamUpdateKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    DType* mean_data, DType* var_data, const DType* weight_data, const DType* grad_data,
-    const DType clip_gradient, const DType rescale_grad,
-    const DType beta1, const DType beta2,
-    const DType lr, const DType wd,
-    const DType epsilon, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* mean_data,
+                                  DType* var_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType rescale_grad,
+                                  const DType beta1,
+                                  const DType beta2,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType epsilon,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     DType grad_rescaled = grad_data[i] * rescale_grad;
@@ -1260,40 +1384,49 @@ struct AdamUpdateKernel {
     grad_rescaled += weight_data[i] * wd;
 
     mean_data[i] = beta1 * mean_data[i] + (1.f - beta1) * grad_rescaled;
-    var_data[i] = beta2 * var_data[i] +
-                        (1.f - beta2) * grad_rescaled * grad_rescaled;
+    var_data[i]  = beta2 * var_data[i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
 
-    KERNEL_ASSIGN(out_data[i], req, weight_data[i] - lr * mean_data[i] /
-                  (square_root::Map(var_data[i]) + epsilon));
+    KERNEL_ASSIGN(out_data[i],
+                  req,
+                  weight_data[i] - lr * mean_data[i] / (square_root::Map(var_data[i]) + epsilon));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void AdamUpdate(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const AdamParam& param = nnvm::get<AdamParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> mean = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> var = inputs[3].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-
-    Kernel<AdamUpdateKernel, xpu>::Launch(s, weight.shape_.Size(),
-          out.dptr_, mean.dptr_, var.dptr_, weight.dptr_, grad.dptr_,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.rescale_grad),
-          static_cast<DType>(param.beta1), static_cast<DType>(param.beta2),
-          static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-          static_cast<DType>(param.epsilon), req[0]);
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> mean   = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> var    = inputs[3].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+
+    Kernel<AdamUpdateKernel, xpu>::Launch(s,
+                                          weight.shape_.Size(),
+                                          out.dptr_,
+                                          mean.dptr_,
+                                          var.dptr_,
+                                          weight.dptr_,
+                                          grad.dptr_,
+                                          static_cast<DType>(param.clip_gradient),
+                                          static_cast<DType>(param.rescale_grad),
+                                          static_cast<DType>(param.beta1),
+                                          static_cast<DType>(param.beta2),
+                                          static_cast<DType>(param.lr),
+                                          static_cast<DType>(param.wd),
+                                          static_cast<DType>(param.epsilon),
+                                          req[0]);
   });
 }
 
-template<int req, typename xpu>
+template <int req, typename xpu>
 struct AdamDnsRspDnsKernel;
 
 /*!
@@ -1302,13 +1435,24 @@ struct AdamDnsRspDnsKernel;
  * the update.
  * The kernel assumes dense weight/mean/var, and row_sparse gradient
  */
-template<int req>
+template <int req>
 struct AdamDnsRspDnsKernel<req, cpu> {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, const nnvm::dim_t row_length, DType* out_data,
-    DType* mean_data, DType* var_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType beta1, const DType beta2,
-    const DType lr, const DType wd, const DType epsilon, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const nnvm::dim_t row_length,
+                                  DType* out_data,
+                                  DType* mean_data,
+                                  DType* var_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType beta1,
+                                  const DType beta2,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType epsilon,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
     using namespace mshadow_op;
     const dim_t row_offset = grad_idx[i] * row_length;
@@ -1316,32 +1460,44 @@ struct AdamDnsRspDnsKernel<req, cpu> {
       // index in data/mean/var
       const dim_t data_i = row_offset + j;
       // index in grad
-      const dim_t grad_i = i * row_length + j;
+      const dim_t grad_i  = i * row_length + j;
       DType grad_rescaled = grad_data[grad_i] * rescale_grad;
       if (clip_gradient >= 0.0f) {
         grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
       }
       grad_rescaled += weight_data[data_i] * wd;
       mean_data[data_i] = beta1 * mean_data[data_i] + (1.f - beta1) * grad_rescaled;
-      var_data[data_i] = beta2 * var_data[data_i] +(1.f - beta2) * grad_rescaled * grad_rescaled;
-      KERNEL_ASSIGN(out_data[data_i], req, weight_data[data_i] - lr * mean_data[data_i] /
-                    (square_root::Map(var_data[data_i]) + epsilon));
+      var_data[data_i]  = beta2 * var_data[data_i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
+      KERNEL_ASSIGN(out_data[data_i],
+                    req,
+                    weight_data[data_i] -
+                        lr * mean_data[data_i] / (square_root::Map(var_data[data_i]) + epsilon));
     }
   }
 };
 
-
-template<int req>
+template <int req>
 struct AdamDnsRspDnsKernel<req, gpu> {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, const nnvm::dim_t row_length, DType* out_data,
-    DType* mean_data, DType* var_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType beta1, const DType beta2,
-    const DType lr, const DType wd, const DType epsilon, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const nnvm::dim_t row_length,
+                                  DType* out_data,
+                                  DType* mean_data,
+                                  DType* var_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType beta1,
+                                  const DType beta2,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType epsilon,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
     using namespace mshadow_op;
-    const dim_t row_id = i / row_length;
-    const dim_t col_id = i % row_length;
+    const dim_t row_id     = i / row_length;
+    const dim_t col_id     = i % row_length;
     const dim_t row_offset = grad_idx[row_id] * row_length;
     // index in data/mean/var
     const dim_t data_i = row_offset + col_id;
@@ -1352,17 +1508,18 @@ struct AdamDnsRspDnsKernel<req, gpu> {
     }
     grad_rescaled += weight_data[data_i] * wd;
     mean_data[data_i] = beta1 * mean_data[data_i] + (1.f - beta1) * grad_rescaled;
-    var_data[data_i] = beta2 * var_data[data_i] +
-                       (1.f - beta2) * grad_rescaled * grad_rescaled;
-    KERNEL_ASSIGN(out_data[data_i], req, weight_data[data_i] - lr * mean_data[data_i] /
-                  (square_root::Map(var_data[data_i]) + epsilon));
+    var_data[data_i]  = beta2 * var_data[data_i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
+    KERNEL_ASSIGN(out_data[data_i],
+                  req,
+                  weight_data[data_i] -
+                      lr * mean_data[data_i] / (square_root::Map(var_data[data_i]) + epsilon));
   }
 };
 
 /*
  * \brief lazy adam update for dense weight, dense states and rsp grad.
  */
-template<typename xpu>
+template <typename xpu>
 inline void AdamLazyUpdateDnsRspDnsImpl(const AdamParam& param,
                                         const OpContext& ctx,
                                         const TBlob& weight,
@@ -1370,11 +1527,12 @@ inline void AdamLazyUpdateDnsRspDnsImpl(const AdamParam& param,
                                         const TBlob& mean,
                                         const TBlob& var,
                                         const OpReqType& req,
-                                        TBlob *out) {
+                                        TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  if (!grad.storage_initialized() || req == kNullOp) return;
+  if (!grad.storage_initialized() || req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse adam_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(mean.shape_.Size(), 0);
@@ -1384,23 +1542,34 @@ inline void AdamLazyUpdateDnsRspDnsImpl(const AdamParam& param,
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
         const DType* weight_data = weight.dptr<DType>();
-        const IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        const DType* grad_val = grad.data().dptr<DType>();
-        DType* mean_data = mean.dptr<DType>();
-        DType* var_data = var.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        nnvm::dim_t num_rows = grad.aux_shape(kIdx)[0];
-        const auto row_length = weight.shape_.ProdShape(1, weight.ndim());
-        size_t num_threads = num_rows;
+        const IType* grad_idx    = grad.aux_data(kIdx).dptr<IType>();
+        const DType* grad_val    = grad.data().dptr<DType>();
+        DType* mean_data         = mean.dptr<DType>();
+        DType* var_data          = var.dptr<DType>();
+        DType* out_data          = out->dptr<DType>();
+        nnvm::dim_t num_rows     = grad.aux_shape(kIdx)[0];
+        const auto row_length    = weight.shape_.ProdShape(1, weight.ndim());
+        size_t num_threads       = num_rows;
         if (std::is_same<xpu, gpu>::value) {
           num_threads = num_rows * row_length;
         }
-        Kernel<AdamDnsRspDnsKernel<req_type, xpu>, xpu>::Launch(s, num_threads,
-          row_length, out_data, mean_data, var_data, weight_data, grad_idx, grad_val,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.beta1),
-          static_cast<DType>(param.beta2), static_cast<DType>(param.lr),
-          static_cast<DType>(param.wd), static_cast<DType>(param.epsilon),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<AdamDnsRspDnsKernel<req_type, xpu>, xpu>::Launch(
+            s,
+            num_threads,
+            row_length,
+            out_data,
+            mean_data,
+            var_data,
+            weight_data,
+            grad_idx,
+            grad_val,
+            static_cast<DType>(param.clip_gradient),
+            static_cast<DType>(param.beta1),
+            static_cast<DType>(param.beta2),
+            static_cast<DType>(param.lr),
+            static_cast<DType>(param.wd),
+            static_cast<DType>(param.epsilon),
+            static_cast<DType>(param.rescale_grad));
       });
     });
   });
@@ -1410,7 +1579,7 @@ inline void AdamLazyUpdateDnsRspDnsImpl(const AdamParam& param,
  * \brief lazy adam update for both row_sparse and dense weight.
  *        grad is expected to be row_sparse.
  */
-template<typename xpu>
+template <typename xpu>
 inline void AdamLazyUpdateRspImpl(const AdamParam& param,
                                   const OpContext& ctx,
                                   const NDArray& weight,
@@ -1418,7 +1587,7 @@ inline void AdamLazyUpdateRspImpl(const AdamParam& param,
                                   const NDArray& mean,
                                   const NDArray& var,
                                   const OpReqType& req,
-                                  NDArray *out) {
+                                  NDArray* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   CheckAllRowsPresent(weight, "AdamUpdate", "weights");
@@ -1434,20 +1603,20 @@ inline void AdamLazyUpdateRspImpl(const AdamParam& param,
   }
   TBlob out_blob = out->data();
   // reuse dns rsp implementation when storage_shape == shape
-  AdamLazyUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, mean.data(),
-                                   var.data(), req, &out_blob);
+  AdamLazyUpdateDnsRspDnsImpl<xpu>(
+      param, ctx, weight.data(), grad, mean.data(), var.data(), req, &out_blob);
 }
 
 /*
  * \brief kernel for standard adam update for dense weight, row_sparse grad and dense states.
  */
-template<int req, typename xpu>
+template <int req, typename xpu>
 struct AdamStdDnsRspDnsKernel;
 
 /*
  * \brief standard adam update for dense weight, row_sparse grad and dense states.
  */
-template<typename xpu>
+template <typename xpu>
 void AdamStdUpdateDnsRspDnsImpl(const AdamParam& param,
                                 const OpContext& ctx,
                                 const TBlob& weight,
@@ -1455,13 +1624,13 @@ void AdamStdUpdateDnsRspDnsImpl(const AdamParam& param,
                                 const TBlob& mean,
                                 const TBlob& var,
                                 const OpReqType& req,
-                                TBlob *out);
+                                TBlob* out);
 
 /*
  * \brief standard adam update for both row_sparse and dense weight.
  *        states are expected to be dense, while grad is expected to be row_sparse.
  */
-template<typename xpu>
+template <typename xpu>
 inline void AdamStdUpdateRspImpl(const AdamParam& param,
                                  const OpContext& ctx,
                                  const NDArray& weight,
@@ -1469,115 +1638,121 @@ inline void AdamStdUpdateRspImpl(const AdamParam& param,
                                  const NDArray& mean,
                                  const NDArray& var,
                                  const OpReqType& req,
-                                 NDArray *out) {
+                                 NDArray* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   CheckAllRowsPresent(weight, "AdamStdUpdate", "weights");
   TBlob out_blob = out->data();
   // reuse dns rsp implementation when storage_shape == shape
-  AdamStdUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, mean.data(),
-                                  var.data(), req, &out_blob);
+  AdamStdUpdateDnsRspDnsImpl<xpu>(
+      param, ctx, weight.data(), grad, mean.data(), var.data(), req, &out_blob);
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void AdamUpdateEx(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<NDArray> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<NDArray> &outputs) {
-  const AdamParam& param = nnvm::get<AdamParam>(attrs.parsed);
-  const auto w_stype = inputs[0].storage_type();
-  const auto g_stype = inputs[1].storage_type();
-  const auto m_stype = inputs[2].storage_type();
-  const auto v_stype = inputs[3].storage_type();
-  const auto out_stype = outputs[0].storage_type();
-  NDArray out = outputs[0];
+                         const OpContext& ctx,
+                         const std::vector<NDArray>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<NDArray>& outputs) {
+  const AdamParam& param  = nnvm::get<AdamParam>(attrs.parsed);
+  const auto w_stype      = inputs[0].storage_type();
+  const auto g_stype      = inputs[1].storage_type();
+  const auto m_stype      = inputs[2].storage_type();
+  const auto v_stype      = inputs[3].storage_type();
+  const auto out_stype    = outputs[0].storage_type();
+  NDArray out             = outputs[0];
   const bool valid_weight = w_stype == kDefaultStorage || w_stype == kRowSparseStorage;
   CHECK(w_stype == out_stype) << "Inconsistent weight stype and output stype";
   CHECK(m_stype == v_stype) << "Inconsistent mean stype and var stype";
   if (valid_weight && g_stype == kRowSparseStorage && m_stype == w_stype) {
-     if (param.lazy_update) {
-       // rsp grad && m.stype = w.stype && lazy_update = true -> lazy update
-       AdamLazyUpdateRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2],
-                                  inputs[3], req[0], &out);
-     } else {
-       // rsp grad && m.stype = w.stype && lazy_update = false -> std update
-       AdamStdUpdateRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2],
-                                 inputs[3], req[0], &out);
-     }
+    if (param.lazy_update) {
+      // rsp grad && m.stype = w.stype && lazy_update = true -> lazy update
+      AdamLazyUpdateRspImpl<xpu>(
+          param, ctx, inputs[0], inputs[1], inputs[2], inputs[3], req[0], &out);
+    } else {
+      // rsp grad && m.stype = w.stype && lazy_update = false -> std update
+      AdamStdUpdateRspImpl<xpu>(
+          param, ctx, inputs[0], inputs[1], inputs[2], inputs[3], req[0], &out);
+    }
   } else if (w_stype == kRowSparseStorage && g_stype == kRowSparseStorage &&
              m_stype == kDefaultStorage) {
-     // rsp, rsp, dns, dns -> rsp, standard update
-     AdamStdUpdateRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2],
-                               inputs[3], req[0], &out);
+    // rsp, rsp, dns, dns -> rsp, standard update
+    AdamStdUpdateRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2], inputs[3], req[0], &out);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
 }
 
 struct LambUpdatePhaseOneParam : public dmlc::Parameter<LambUpdatePhaseOneParam> {
-    float beta1;
-    float beta2;
-    float epsilon;
-    int t;
-    bool bias_correction;
-    float wd;
-    float rescale_grad;
-    float clip_gradient;
-    DMLC_DECLARE_PARAMETER(LambUpdatePhaseOneParam) {
-      DMLC_DECLARE_FIELD(beta1)
-      .set_default(0.9f)
-      .describe("The decay rate for the 1st moment estimates.");
-      DMLC_DECLARE_FIELD(beta2)
-      .set_default(0.999f)
-      .describe("The decay rate for the 2nd moment estimates.");
-      DMLC_DECLARE_FIELD(epsilon)
-      .set_default(1e-6f)
-      .describe("A small constant for numerical stability.");
-      DMLC_DECLARE_FIELD(t)
-      .describe("Index update count.");
-      DMLC_DECLARE_FIELD(bias_correction)
-      .set_default(true)
-      .describe("Whether to use bias correction.");
-      DMLC_DECLARE_FIELD(wd)
-      .describe("Weight decay augments the objective function with a "
-                "regularization term that penalizes large weights. "
-                "The penalty scales with the square of the magnitude of each weight.");
-      DMLC_DECLARE_FIELD(rescale_grad)
-      .set_default(1.0f)
-      .describe("Rescale gradient to grad = rescale_grad*grad.");
-      DMLC_DECLARE_FIELD(clip_gradient)
-      .set_default(-1.0f)
-      .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-                "If clip_gradient <= 0, gradient clipping is turned off. "
-                "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    }
+  float beta1;
+  float beta2;
+  float epsilon;
+  int t;
+  bool bias_correction;
+  float wd;
+  float rescale_grad;
+  float clip_gradient;
+  DMLC_DECLARE_PARAMETER(LambUpdatePhaseOneParam) {
+    DMLC_DECLARE_FIELD(beta1).set_default(0.9f).describe(
+        "The decay rate for the 1st moment estimates.");
+    DMLC_DECLARE_FIELD(beta2).set_default(0.999f).describe(
+        "The decay rate for the 2nd moment estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-6f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(t).describe("Index update count.");
+    DMLC_DECLARE_FIELD(bias_correction)
+        .set_default(true)
+        .describe("Whether to use bias correction.");
+    DMLC_DECLARE_FIELD(wd).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(rescale_grad)
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
+    DMLC_DECLARE_FIELD(clip_gradient)
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+  }
 };
 
 struct LambUpdatePhaseTwoParam : public dmlc::Parameter<LambUpdatePhaseTwoParam> {
-    float lr;
-    float lower_bound;
-    float upper_bound;
-    DMLC_DECLARE_PARAMETER(LambUpdatePhaseTwoParam) {
-      DMLC_DECLARE_FIELD(lr)
-      .describe("Learning rate");
-      DMLC_DECLARE_FIELD(lower_bound)
-      .set_default(-1.0f)
-      .describe("Lower limit of norm of weight. If lower_bound <= 0, Lower limit is not set");
-      DMLC_DECLARE_FIELD(upper_bound)
-      .set_default(-1.0f)
-      .describe("Upper limit of norm of weight. If upper_bound <= 0, Upper limit is not set");
-    }
+  float lr;
+  float lower_bound;
+  float upper_bound;
+  DMLC_DECLARE_PARAMETER(LambUpdatePhaseTwoParam) {
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(lower_bound)
+        .set_default(-1.0f)
+        .describe("Lower limit of norm of weight. If lower_bound <= 0, Lower limit is not set");
+    DMLC_DECLARE_FIELD(upper_bound)
+        .set_default(-1.0f)
+        .describe("Upper limit of norm of weight. If upper_bound <= 0, Upper limit is not set");
+  }
 };
 
 struct LambUpdatePhaseOneKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    DType* mean_data, DType* var_data, const DType* weight_data, const DType* grad_data,
-    const DType clip_gradient, const DType rescale_grad,
-    const DType beta1, const DType beta1_t, const DType beta2, const DType beta2_t,
-    const DType wd, const DType epsilon, const int t,
-    bool bias_correction, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* mean_data,
+                                  DType* var_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType rescale_grad,
+                                  const DType beta1,
+                                  const DType beta1_t,
+                                  const DType beta2,
+                                  const DType beta2_t,
+                                  const DType wd,
+                                  const DType epsilon,
+                                  const int t,
+                                  bool bias_correction,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     DType grad_rescaled = grad_data[i] * rescale_grad;
@@ -1586,67 +1761,79 @@ struct LambUpdatePhaseOneKernel {
     }
 
     mean_data[i] = beta1 * mean_data[i] + (1.f - beta1) * grad_rescaled;
-    var_data[i] = beta2 * var_data[i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
+    var_data[i]  = beta2 * var_data[i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
 
     DType g = mean_data[i] / (square_root::Map(var_data[i]) + epsilon) + wd * weight_data[i];
 
     if (bias_correction) {
       DType mean_hat = mean_data[i] / (1. - beta1_t);
-      DType var_hat = var_data[i] / (1 - beta2_t);
-      g = mean_hat / (square_root::Map(var_hat) + epsilon) + wd * weight_data[i];
+      DType var_hat  = var_data[i] / (1 - beta2_t);
+      g              = mean_hat / (square_root::Map(var_hat) + epsilon) + wd * weight_data[i];
     }
     KERNEL_ASSIGN(out_data[i], req, g);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void LambUpdatePhaseOne(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const LambUpdatePhaseOneParam& param = nnvm::get<LambUpdatePhaseOneParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                       = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    DType beta1_t = std::pow(param.beta1, param.t);
-    DType beta2_t = std::pow(param.beta2, param.t);
+    DType beta1_t                = std::pow(param.beta1, param.t);
+    DType beta2_t                = std::pow(param.beta2, param.t);
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> mean = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> var = inputs[3].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-
-  Kernel<LambUpdatePhaseOneKernel, xpu>::Launch(s, weight.shape_.Size(),
-    out.dptr_, mean.dptr_, var.dptr_, weight.dptr_, grad.dptr_,
-    static_cast<DType>(param.clip_gradient), static_cast<DType>(param.rescale_grad),
-    static_cast<DType>(param.beta1), beta1_t, static_cast<DType>(param.beta2), beta2_t,
-    static_cast<DType>(param.wd), static_cast<DType>(param.epsilon),
-    static_cast<int>(param.t), static_cast<bool>(param.bias_correction), req[0]);
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> mean   = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> var    = inputs[3].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+
+    Kernel<LambUpdatePhaseOneKernel, xpu>::Launch(s,
+                                                  weight.shape_.Size(),
+                                                  out.dptr_,
+                                                  mean.dptr_,
+                                                  var.dptr_,
+                                                  weight.dptr_,
+                                                  grad.dptr_,
+                                                  static_cast<DType>(param.clip_gradient),
+                                                  static_cast<DType>(param.rescale_grad),
+                                                  static_cast<DType>(param.beta1),
+                                                  beta1_t,
+                                                  static_cast<DType>(param.beta2),
+                                                  beta2_t,
+                                                  static_cast<DType>(param.wd),
+                                                  static_cast<DType>(param.epsilon),
+                                                  static_cast<int>(param.t),
+                                                  static_cast<bool>(param.bias_correction),
+                                                  req[0]);
   });
 }
 
 inline bool LambUpdatePhaseTwoShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector* in_attrs,
-                            mxnet::ShapeVector* out_attrs) {
+                                    mxnet::ShapeVector* in_attrs,
+                                    mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 4U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   mxnet::TShape expected_out(in_attrs->at(0).ndim(), -1);
 
   mxnet::TShape& weight_shape = in_attrs->at(0);
-  mxnet::TShape& g_shape = in_attrs->at(1);
+  mxnet::TShape& g_shape      = in_attrs->at(1);
   CHECK_EQ(weight_shape.ndim(), g_shape.ndim())
-           << "total no. of dimensions for weights and g must match";
-  for (int i=0; i < weight_shape.ndim(); ++i) {
+      << "total no. of dimensions for weights and g must match";
+  for (int i = 0; i < weight_shape.ndim(); ++i) {
     CHECK_EQ(weight_shape[i], g_shape[i])
-           << "weight and g dimension size mismatch at " << i << "-th index";
+        << "weight and g dimension size mismatch at " << i << "-th index";
   }
   mxnet::TShape& r1_shape = in_attrs->at(2);
   mxnet::TShape& r2_shape = in_attrs->at(3);
   CHECK_EQ(r1_shape[0], 1U) << "r1 shape incorrect";
   CHECK_EQ(r2_shape[0], 1U) << "r2 shape incorrect";
-  for (int i=0; i < expected_out.ndim(); ++i) {
+  for (int i = 0; i < expected_out.ndim(); ++i) {
     expected_out[i] = weight_shape[i];
   }
 
@@ -1655,12 +1842,17 @@ inline bool LambUpdatePhaseTwoShape(const nnvm::NodeAttrs& attrs,
 }
 
 struct LambUpdatePhaseTwoKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    const DType* weight_data, const DType* g,
-    const DType* r1, const DType* r2,
-    DType lr, const DType lower_bound,
-    const DType upper_bound, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* weight_data,
+                                  const DType* g,
+                                  const DType* r1,
+                                  const DType* r2,
+                                  DType lr,
+                                  const DType lower_bound,
+                                  const DType upper_bound,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     DType new_r1 = r1[0];
@@ -1680,33 +1872,40 @@ struct LambUpdatePhaseTwoKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void LambUpdatePhaseTwo(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const LambUpdatePhaseTwoParam& param = nnvm::get<LambUpdatePhaseTwoParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                       = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> g = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> r1 = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> r2 = inputs[3].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-
-  Kernel<LambUpdatePhaseTwoKernel, xpu>::Launch(s, weight.shape_.Size(),
-    out.dptr_, weight.dptr_, g.dptr_, r1.dptr_, r2.dptr_,
-    static_cast<DType>(param.lr), static_cast<DType>(param.lower_bound),
-    static_cast<DType>(param.upper_bound), req[0]);
+    Tensor<xpu, 2, DType> g      = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> r1     = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> r2     = inputs[3].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+
+    Kernel<LambUpdatePhaseTwoKernel, xpu>::Launch(s,
+                                                  weight.shape_.Size(),
+                                                  out.dptr_,
+                                                  weight.dptr_,
+                                                  g.dptr_,
+                                                  r1.dptr_,
+                                                  r2.dptr_,
+                                                  static_cast<DType>(param.lr),
+                                                  static_cast<DType>(param.lower_bound),
+                                                  static_cast<DType>(param.upper_bound),
+                                                  req[0]);
   });
 }
 
-template<int n_in, int n_out, int total_in>
+template <int n_in, int n_out, int total_in>
 inline bool MPLambPhaseOneType(const nnvm::NodeAttrs& attrs,
-                             std::vector<int> *in_attrs,
-                             std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), static_cast<size_t>(total_in)) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   for (int i = 0; i < n_in; ++i) {
@@ -1722,15 +1921,25 @@ inline bool MPLambPhaseOneType(const nnvm::NodeAttrs& attrs,
 }
 
 struct MPLambUpdatePhaseOneKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, float* out_data,
-    float* mean_data, float* var_data, const DType* weight_data,
-    const DType* grad_data, const float* weight32_data,
-    const float clip_gradient, const float rescale_grad,
-    const float beta1_t, const float beta1,
-    const float beta2_t, const float beta2,
-    const float wd, const float epsilon, const int t,
-    bool bias_correction, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  float* out_data,
+                                  float* mean_data,
+                                  float* var_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const float* weight32_data,
+                                  const float clip_gradient,
+                                  const float rescale_grad,
+                                  const float beta1_t,
+                                  const float beta1,
+                                  const float beta2_t,
+                                  const float beta2,
+                                  const float wd,
+                                  const float epsilon,
+                                  const int t,
+                                  bool bias_correction,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     float grad_rescaled = grad_data[i] * rescale_grad;
@@ -1739,71 +1948,86 @@ struct MPLambUpdatePhaseOneKernel {
     }
 
     mean_data[i] = beta1 * mean_data[i] + (1.f - beta1) * grad_rescaled;
-    var_data[i] = beta2 * var_data[i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
+    var_data[i]  = beta2 * var_data[i] + (1.f - beta2) * grad_rescaled * grad_rescaled;
 
     float g = mean_data[i] / (square_root::Map(var_data[i]) + epsilon) + wd * weight32_data[i];
 
     if (bias_correction) {
       float mean_hat = mean_data[i] / (1. - beta1_t);
-      float var_hat = var_data[i] / (1 - beta2_t);
-      g = mean_hat / (square_root::Map(var_hat) + epsilon) + wd * weight32_data[i];
+      float var_hat  = var_data[i] / (1 - beta2_t);
+      g              = mean_hat / (square_root::Map(var_hat) + epsilon) + wd * weight32_data[i];
     }
     KERNEL_ASSIGN(out_data[i], req, g);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MPLambUpdatePhaseOne(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const LambUpdatePhaseOneParam& param = nnvm::get<LambUpdatePhaseOneParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                       = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    float beta1_t = std::pow(param.beta1, param.t);
-    float beta2_t = std::pow(param.beta2, param.t);
-    Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, float> mean = inputs[2].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, float> var = inputs[3].FlatTo2D<xpu, float>(s);
+    float beta1_t                  = std::pow(param.beta1, param.t);
+    float beta2_t                  = std::pow(param.beta2, param.t);
+    Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> grad     = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, float> mean     = inputs[2].FlatTo2D<xpu, float>(s);
+    Tensor<xpu, 2, float> var      = inputs[3].FlatTo2D<xpu, float>(s);
     Tensor<xpu, 2, float> weight32 = inputs[4].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, float> out = outputs[0].FlatTo2D<xpu, float>(s);
-
-  Kernel<MPLambUpdatePhaseOneKernel, xpu>::Launch(s, weight.shape_.Size(),
-    out.dptr_, mean.dptr_, var.dptr_, weight.dptr_, grad.dptr_, weight32.dptr_,
-    param.clip_gradient, param.rescale_grad, beta1_t, param.beta1, beta2_t, param.beta2,
-    param.wd, param.epsilon, param.t, param.bias_correction, req[0]);
+    Tensor<xpu, 2, float> out      = outputs[0].FlatTo2D<xpu, float>(s);
+
+    Kernel<MPLambUpdatePhaseOneKernel, xpu>::Launch(s,
+                                                    weight.shape_.Size(),
+                                                    out.dptr_,
+                                                    mean.dptr_,
+                                                    var.dptr_,
+                                                    weight.dptr_,
+                                                    grad.dptr_,
+                                                    weight32.dptr_,
+                                                    param.clip_gradient,
+                                                    param.rescale_grad,
+                                                    beta1_t,
+                                                    param.beta1,
+                                                    beta2_t,
+                                                    param.beta2,
+                                                    param.wd,
+                                                    param.epsilon,
+                                                    param.t,
+                                                    param.bias_correction,
+                                                    req[0]);
   });
 }
 
 inline bool MPLambUpdatePhaseTwoShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector* in_attrs,
-                            mxnet::ShapeVector* out_attrs) {
+                                      mxnet::ShapeVector* in_attrs,
+                                      mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 5U);
   CHECK_EQ(out_attrs->size(), 1U);
 
   mxnet::TShape expected_out(in_attrs->at(0).ndim(), -1);
 
-  mxnet::TShape& weight_shape = in_attrs->at(0);
-  mxnet::TShape& g_shape = in_attrs->at(1);
+  mxnet::TShape& weight_shape   = in_attrs->at(0);
+  mxnet::TShape& g_shape        = in_attrs->at(1);
   mxnet::TShape& weight32_shape = in_attrs->at(4);
   CHECK_EQ(weight_shape.ndim(), g_shape.ndim())
-           << "total no. of dimensions for weights and g must match";
+      << "total no. of dimensions for weights and g must match";
   CHECK_EQ(weight_shape.ndim(), weight32_shape.ndim())
-           << "total no. of dimensions for weights and g must match";
-  for (int i=0; i < weight_shape.ndim(); ++i) {
+      << "total no. of dimensions for weights and g must match";
+  for (int i = 0; i < weight_shape.ndim(); ++i) {
     CHECK_EQ(weight_shape[i], g_shape[i])
-           << "weight and g dimension size mismatch at " << i << "-th index";
+        << "weight and g dimension size mismatch at " << i << "-th index";
     CHECK_EQ(weight_shape[i], weight32_shape[i])
-           << "weight and g dimension size mismatch at " << i << "-th index";
+        << "weight and g dimension size mismatch at " << i << "-th index";
   }
   mxnet::TShape& r1_shape = in_attrs->at(2);
   mxnet::TShape& r2_shape = in_attrs->at(3);
   CHECK_EQ(r1_shape[0], 1U) << "r1 shape incorrect";
   CHECK_EQ(r2_shape[0], 1U) << "r2 shape incorrect";
-  for (int i=0; i < expected_out.ndim(); ++i) {
+  for (int i = 0; i < expected_out.ndim(); ++i) {
     expected_out[i] = weight_shape[i];
   }
 
@@ -1812,12 +2036,18 @@ inline bool MPLambUpdatePhaseTwoShape(const nnvm::NodeAttrs& attrs,
 }
 
 struct MPLambUpdatePhaseTwoKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    const DType* weight_data, const float* g,
-    const float* r1, const float* r2, const float* weight32_data,
-    float lr, const float lower_bound,
-    const float upper_bound, const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* weight_data,
+                                  const float* g,
+                                  const float* r1,
+                                  const float* r2,
+                                  const float* weight32_data,
+                                  float lr,
+                                  const float lower_bound,
+                                  const float upper_bound,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     float new_r1 = r1[0];
@@ -1837,27 +2067,35 @@ struct MPLambUpdatePhaseTwoKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void MPLambUpdatePhaseTwo(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& inputs,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const LambUpdatePhaseTwoParam& param = nnvm::get<LambUpdatePhaseTwoParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                       = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, float> g = inputs[1].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, float> r1 = inputs[2].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, float> r2 = inputs[3].FlatTo2D<xpu, float>(s);
+    Tensor<xpu, 2, DType> weight   = inputs[0].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, float> g        = inputs[1].FlatTo2D<xpu, float>(s);
+    Tensor<xpu, 2, float> r1       = inputs[2].FlatTo2D<xpu, float>(s);
+    Tensor<xpu, 2, float> r2       = inputs[3].FlatTo2D<xpu, float>(s);
     Tensor<xpu, 2, float> weight32 = inputs[4].FlatTo2D<xpu, float>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-
-  Kernel<MPLambUpdatePhaseTwoKernel, xpu>::Launch(s, weight.shape_.Size(),
-    out.dptr_, weight.dptr_, g.dptr_, r1.dptr_, r2.dptr_, weight32.dptr_,
-    param.lr, param.lower_bound,
-    param.upper_bound, req[0]);
+    Tensor<xpu, 2, DType> out      = outputs[0].FlatTo2D<xpu, DType>(s);
+
+    Kernel<MPLambUpdatePhaseTwoKernel, xpu>::Launch(s,
+                                                    weight.shape_.Size(),
+                                                    out.dptr_,
+                                                    weight.dptr_,
+                                                    g.dptr_,
+                                                    r1.dptr_,
+                                                    r2.dptr_,
+                                                    weight32.dptr_,
+                                                    param.lr,
+                                                    param.lower_bound,
+                                                    param.upper_bound,
+                                                    req[0]);
   });
 }
 
@@ -1874,44 +2112,51 @@ struct RMSPropAlexParam : public dmlc::Parameter<RMSPropAlexParam> {
   float clip_gradient;
   float clip_weights;
   DMLC_DECLARE_PARAMETER(RMSPropAlexParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(rho).set_default(0.95f)
-    .describe("Decay rate.");
-    DMLC_DECLARE_FIELD(momentum).set_default(0.9f)
-    .describe("Decay rate.");
-    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wd).set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(rho).set_default(0.95f).describe("Decay rate.");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.9f).describe("Decay rate.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
     DMLC_DECLARE_FIELD(clip_weights)
-    .set_default(-1.0f)
-    .describe("Clip weights to the range of [-clip_weights, clip_weights] "
-              "If clip_weights <= 0, weight clipping is turned off. "
-              "weights = max(min(weights, clip_weights), -clip_weights).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip weights to the range of [-clip_weights, clip_weights] "
+            "If clip_weights <= 0, weight clipping is turned off. "
+            "weights = max(min(weights, clip_weights), -clip_weights).");
   }
 };
 
 struct RMSPropAlexUpdateKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    DType* state_n_data, DType* state_g_data, DType* delta_data,
-    const DType* weight_data, const DType* grad_data,
-    const DType clip_gradient, const DType rescale_grad,
-    const DType rho, const DType momentum,
-    const DType lr, const DType wd,
-    const DType clip_weights, const DType epsilon,
-    const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* state_n_data,
+                                  DType* state_g_data,
+                                  DType* delta_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType rescale_grad,
+                                  const DType rho,
+                                  const DType momentum,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType clip_weights,
+                                  const DType epsilon,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     DType grad_rescaled = rescale_grad * grad_data[i];
@@ -1920,14 +2165,11 @@ struct RMSPropAlexUpdateKernel {
     }
     grad_rescaled += wd * weight_data[i];
 
-    state_n_data[i] = (1.f - rho) * square::Map(grad_rescaled) +
-                      rho * state_n_data[i];
-    state_g_data[i] = (1.f - rho) * grad_rescaled +
-                      rho * state_g_data[i];
-    delta_data[i] = momentum * delta_data[i] -
+    state_n_data[i] = (1.f - rho) * square::Map(grad_rescaled) + rho * state_n_data[i];
+    state_g_data[i] = (1.f - rho) * grad_rescaled + rho * state_g_data[i];
+    delta_data[i]   = momentum * delta_data[i] -
                     (lr * (grad_rescaled) /
-                      (square_root::Map(state_n_data[i] -
-                                        square::Map(state_g_data[i]) + epsilon)));
+                     (square_root::Map(state_n_data[i] - square::Map(state_g_data[i]) + epsilon)));
 
     if (clip_weights >= 0.0f) {
       const DType clipped_weight = clip::Map(weight_data[i] + delta_data[i], clip_weights);
@@ -1939,28 +2181,39 @@ struct RMSPropAlexUpdateKernel {
 };
 
 template <typename xpu>
-inline void RMSPropAlexUpdate(const nnvm::NodeAttrs &attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
+inline void RMSPropAlexUpdate(const nnvm::NodeAttrs& attrs,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  const RMSPropAlexParam &param = nnvm::get<RMSPropAlexParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const RMSPropAlexParam& param = nnvm::get<RMSPropAlexParam>(attrs.parsed);
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    DType* weight_data = inputs[0].dptr<DType>();
-    DType* grad_data = inputs[1].dptr<DType>();
+    DType* weight_data  = inputs[0].dptr<DType>();
+    DType* grad_data    = inputs[1].dptr<DType>();
     DType* state_g_data = inputs[2].dptr<DType>();
     DType* state_n_data = inputs[3].dptr<DType>();
-    DType* delta_data = inputs[4].dptr<DType>();
-    DType* out_data = outputs[0].dptr<DType>();
-
-    Kernel<RMSPropAlexUpdateKernel, xpu>::Launch(s, inputs[0].shape_.Size(),
-      out_data, state_n_data, state_g_data, delta_data, weight_data, grad_data,
-      static_cast<DType>(param.clip_gradient), static_cast<DType>(param.rescale_grad),
-      static_cast<DType>(param.rho), static_cast<DType>(param.momentum),
-      static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-      static_cast<DType>(param.clip_weights), static_cast<DType>(param.epsilon), req[0]);
+    DType* delta_data   = inputs[4].dptr<DType>();
+    DType* out_data     = outputs[0].dptr<DType>();
+
+    Kernel<RMSPropAlexUpdateKernel, xpu>::Launch(s,
+                                                 inputs[0].shape_.Size(),
+                                                 out_data,
+                                                 state_n_data,
+                                                 state_g_data,
+                                                 delta_data,
+                                                 weight_data,
+                                                 grad_data,
+                                                 static_cast<DType>(param.clip_gradient),
+                                                 static_cast<DType>(param.rescale_grad),
+                                                 static_cast<DType>(param.rho),
+                                                 static_cast<DType>(param.momentum),
+                                                 static_cast<DType>(param.lr),
+                                                 static_cast<DType>(param.wd),
+                                                 static_cast<DType>(param.clip_weights),
+                                                 static_cast<DType>(param.epsilon),
+                                                 req[0]);
   });
 }
 
@@ -1976,41 +2229,47 @@ struct RMSPropParam : public dmlc::Parameter<RMSPropParam> {
   float clip_gradient;
   float clip_weights;
   DMLC_DECLARE_PARAMETER(RMSPropParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(rho).set_default(0.95f)
-    .describe("The decay rate of momentum estimates.");
-    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f)
-    .describe("A small constant for numerical stability.");
-    DMLC_DECLARE_FIELD(wd).set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(rho).set_default(0.95f).describe("The decay rate of momentum estimates.");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1e-8f).describe(
+        "A small constant for numerical stability.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
     DMLC_DECLARE_FIELD(clip_weights)
-    .set_default(-1.0f)
-    .describe("Clip weights to the range of [-clip_weights, clip_weights] "
-              "If clip_weights <= 0, weight clipping is turned off. "
-              "weights = max(min(weights, clip_weights), -clip_weights).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip weights to the range of [-clip_weights, clip_weights] "
+            "If clip_weights <= 0, weight clipping is turned off. "
+            "weights = max(min(weights, clip_weights), -clip_weights).");
   }
 };
 
 struct RMSPropUpdateKernel {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i,
-    DType* out_data, DType* state_n_data,
-    const DType* weight_data, const DType* grad_data,
-    const DType clip_gradient, const DType rescale_grad,
-    const DType rho, const DType lr, const DType wd,
-    const DType clip_weights, const DType epsilon,
-    const OpReqType req) {
+                                  DType* out_data,
+                                  DType* state_n_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType rescale_grad,
+                                  const DType rho,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType clip_weights,
+                                  const DType epsilon,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     DType grad_rescaled = rescale_grad * grad_data[i];
@@ -2021,8 +2280,8 @@ struct RMSPropUpdateKernel {
 
     state_n_data[i] = (1.f - rho) * square::Map(grad_rescaled) + rho * state_n_data[i];
 
-    DType weight = weight_data[i] -
-                   lr * (grad_rescaled) / (square_root::Map(state_n_data[i]) + epsilon);
+    DType weight =
+        weight_data[i] - lr * (grad_rescaled) / (square_root::Map(state_n_data[i]) + epsilon);
     if (clip_weights >= 0.0f) {
       weight = clip::Map(weight, clip_weights);
     }
@@ -2031,24 +2290,34 @@ struct RMSPropUpdateKernel {
 };
 
 template <typename xpu>
-inline void RMSPropUpdate(const nnvm::NodeAttrs &attrs, const OpContext &ctx,
-                          const std::vector<TBlob> &inputs,
-                          const std::vector<OpReqType> &req,
-                          const std::vector<TBlob> &outputs) {
+inline void RMSPropUpdate(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  const RMSPropParam &param = nnvm::get<RMSPropParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const RMSPropParam& param = nnvm::get<RMSPropParam>(attrs.parsed);
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    DType* weight_data = inputs[0].dptr<DType>();
-    DType* grad_data = inputs[1].dptr<DType>();
+    DType* weight_data  = inputs[0].dptr<DType>();
+    DType* grad_data    = inputs[1].dptr<DType>();
     DType* state_n_data = inputs[2].dptr<DType>();
-    DType* out_data = outputs[0].dptr<DType>();
-
-    Kernel<RMSPropUpdateKernel, xpu>::Launch(s, inputs[0].shape_.Size(),
-      out_data, state_n_data, weight_data, grad_data,
-      static_cast<DType>(param.clip_gradient), static_cast<DType>(param.rescale_grad),
-      static_cast<DType>(param.rho), static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-      static_cast<DType>(param.clip_weights), static_cast<DType>(param.epsilon), req[0]);
+    DType* out_data     = outputs[0].dptr<DType>();
+
+    Kernel<RMSPropUpdateKernel, xpu>::Launch(s,
+                                             inputs[0].shape_.Size(),
+                                             out_data,
+                                             state_n_data,
+                                             weight_data,
+                                             grad_data,
+                                             static_cast<DType>(param.clip_gradient),
+                                             static_cast<DType>(param.rescale_grad),
+                                             static_cast<DType>(param.rho),
+                                             static_cast<DType>(param.lr),
+                                             static_cast<DType>(param.wd),
+                                             static_cast<DType>(param.clip_weights),
+                                             static_cast<DType>(param.epsilon),
+                                             req[0]);
   });
 }
 
@@ -2060,38 +2329,40 @@ struct FtrlParam : public dmlc::Parameter<FtrlParam> {
   float rescale_grad;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(FtrlParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(lamda1)
-    .set_default(0.01f)
-    .describe("The L1 regularization coefficient.");
-    DMLC_DECLARE_FIELD(beta)
-    .set_default(1.0f)
-    .describe("Per-Coordinate Learning Rate beta.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(lamda1).set_default(0.01f).describe("The L1 regularization coefficient.");
+    DMLC_DECLARE_FIELD(beta).set_default(1.0f).describe("Per-Coordinate Learning Rate beta.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
 struct FtrlUpdateKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data,
-    DType* n_data, DType* z_data, const DType* weight_data, const DType* grad_data,
-    const DType clip_gradient, const DType rescale_grad,
-    const DType beta, const DType lamda1,
-    const DType lr, const DType wd,
-    const OpReqType req) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* n_data,
+                                  DType* z_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType rescale_grad,
+                                  const DType beta,
+                                  const DType lamda1,
+                                  const DType lr,
+                                  const DType wd,
+                                  const OpReqType req) {
     using namespace mshadow_op;
 
     DType grad_rescaled = grad_data[i] * rescale_grad;
@@ -2099,49 +2370,68 @@ struct FtrlUpdateKernel {
       grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
     }
 
-    z_data[i] += grad_rescaled - (square_root::Map(n_data[i] +
-                      square::Map(grad_rescaled)) - square_root::Map(n_data[i])) *
-                      weight_data[i] / lr;
+    z_data[i] += grad_rescaled - (square_root::Map(n_data[i] + square::Map(grad_rescaled)) -
+                                  square_root::Map(n_data[i])) *
+                                     weight_data[i] / lr;
     n_data[i] += square::Map(grad_rescaled);
 
-    DType d = - sign::Map(z_data[i]) * maximum::Map(abs::Map(z_data[i]) - lamda1,
-                                                    static_cast<DType>(0));
+    DType d =
+        -sign::Map(z_data[i]) * maximum::Map(abs::Map(z_data[i]) - lamda1, static_cast<DType>(0));
     KERNEL_ASSIGN(out_data[i], req, d / ((beta + square_root::Map(n_data[i])) / lr + wd));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void FtrlUpdate(const nnvm::NodeAttrs& attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
 
   const FtrlParam& param = nnvm::get<FtrlParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> z = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> n = inputs[3].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-
-    Kernel<FtrlUpdateKernel, xpu>::Launch(s, weight.shape_.Size(),
-      out.dptr_, n.dptr_, z.dptr_, weight.dptr_, grad.dptr_,
-      static_cast<DType>(param.clip_gradient), static_cast<DType>(param.rescale_grad),
-      static_cast<DType>(param.beta), static_cast<DType>(param.lamda1),
-      static_cast<DType>(param.lr), static_cast<DType>(param.wd), req[0]);
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> z      = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> n      = inputs[3].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+
+    Kernel<FtrlUpdateKernel, xpu>::Launch(s,
+                                          weight.shape_.Size(),
+                                          out.dptr_,
+                                          n.dptr_,
+                                          z.dptr_,
+                                          weight.dptr_,
+                                          grad.dptr_,
+                                          static_cast<DType>(param.clip_gradient),
+                                          static_cast<DType>(param.rescale_grad),
+                                          static_cast<DType>(param.beta),
+                                          static_cast<DType>(param.lamda1),
+                                          static_cast<DType>(param.lr),
+                                          static_cast<DType>(param.wd),
+                                          req[0]);
   });
 }
 
-template<int req>
+template <int req>
 struct FtrlDnsRspDnsKernel {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, const nnvm::dim_t row_length, DType* out_data,
-    DType* z_data, DType* n_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType lamda1, const DType beta,
-    const DType lr, const DType wd, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const nnvm::dim_t row_length,
+                                  DType* out_data,
+                                  DType* z_data,
+                                  DType* n_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType lamda1,
+                                  const DType beta,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
     using namespace mshadow_op;
     const dim_t row_offset = grad_idx[i] * row_length;
@@ -2149,26 +2439,26 @@ struct FtrlDnsRspDnsKernel {
       // index in data/z/n
       const dim_t data_i = row_offset + j;
       // index in grad
-      const dim_t grad_i = i * row_length + j;
+      const dim_t grad_i  = i * row_length + j;
       DType grad_rescaled = grad_data[grad_i] * rescale_grad;
       if (clip_gradient >= 0.0f) {
         grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
       }
-      z_data[data_i] += grad_rescaled - (square_root::Map(n_data[data_i] +
-                        square::Map(grad_rescaled)) - square_root::Map(n_data[data_i])) *
-                        weight_data[data_i] / lr;
+      z_data[data_i] +=
+          grad_rescaled - (square_root::Map(n_data[data_i] + square::Map(grad_rescaled)) -
+                           square_root::Map(n_data[data_i])) *
+                              weight_data[data_i] / lr;
       n_data[data_i] += square::Map(grad_rescaled);
 
-      DType d = - sign::Map(z_data[data_i]) * maximum::Map(abs::Map(z_data[data_i]) - lamda1,
-                                                           static_cast<DType>(0));
-      KERNEL_ASSIGN(out_data[data_i], req,
-                    d / ((beta + square_root::Map(n_data[data_i])) / lr + wd));
+      DType d = -sign::Map(z_data[data_i]) *
+                maximum::Map(abs::Map(z_data[data_i]) - lamda1, static_cast<DType>(0));
+      KERNEL_ASSIGN(
+          out_data[data_i], req, d / ((beta + square_root::Map(n_data[data_i])) / lr + wd));
     }
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 inline void FtrlUpdateDnsRspDnsImpl(const FtrlParam& param,
                                     const OpContext& ctx,
                                     const TBlob& weight,
@@ -2176,11 +2466,12 @@ inline void FtrlUpdateDnsRspDnsImpl(const FtrlParam& param,
                                     const TBlob& z,
                                     const TBlob& n,
                                     const OpReqType& req,
-                                    TBlob *out) {
+                                    TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  if (!grad.storage_initialized() || req == kNullOp) return;
+  if (!grad.storage_initialized() || req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse ftrl_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(z.shape_.Size(), 0);
@@ -2190,24 +2481,34 @@ inline void FtrlUpdateDnsRspDnsImpl(const FtrlParam& param,
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
         const DType* weight_data = weight.dptr<DType>();
-        const IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        const DType* grad_val = grad.data().dptr<DType>();
-        DType* z_data = z.dptr<DType>();
-        DType* n_data = n.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        nnvm::dim_t num_rows = grad.aux_shape(kIdx)[0];
-        const auto row_length = weight.shape_.ProdShape(1, weight.ndim());
-        Kernel<FtrlDnsRspDnsKernel<req_type>, xpu>::Launch(s, num_rows, row_length,
-          out_data, z_data, n_data, weight_data, grad_idx, grad_val,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.lamda1),
-          static_cast<DType>(param.beta), static_cast<DType>(param.lr),
-          static_cast<DType>(param.wd), static_cast<DType>(param.rescale_grad));
+        const IType* grad_idx    = grad.aux_data(kIdx).dptr<IType>();
+        const DType* grad_val    = grad.data().dptr<DType>();
+        DType* z_data            = z.dptr<DType>();
+        DType* n_data            = n.dptr<DType>();
+        DType* out_data          = out->dptr<DType>();
+        nnvm::dim_t num_rows     = grad.aux_shape(kIdx)[0];
+        const auto row_length    = weight.shape_.ProdShape(1, weight.ndim());
+        Kernel<FtrlDnsRspDnsKernel<req_type>, xpu>::Launch(s,
+                                                           num_rows,
+                                                           row_length,
+                                                           out_data,
+                                                           z_data,
+                                                           n_data,
+                                                           weight_data,
+                                                           grad_idx,
+                                                           grad_val,
+                                                           static_cast<DType>(param.clip_gradient),
+                                                           static_cast<DType>(param.lamda1),
+                                                           static_cast<DType>(param.beta),
+                                                           static_cast<DType>(param.lr),
+                                                           static_cast<DType>(param.wd),
+                                                           static_cast<DType>(param.rescale_grad));
       });
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void FtrlUpdateRspRspRspImpl(const FtrlParam& param,
                                     const OpContext& ctx,
                                     const NDArray& weight,
@@ -2215,7 +2516,7 @@ inline void FtrlUpdateRspRspRspImpl(const FtrlParam& param,
                                     const NDArray& z,
                                     const NDArray& n,
                                     const OpReqType& req,
-                                    NDArray *out) {
+                                    NDArray* out) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
@@ -2233,36 +2534,36 @@ inline void FtrlUpdateRspRspRspImpl(const FtrlParam& param,
   }
   TBlob out_blob = out->data();
   // reuse dns rsp implementation when storage_shape == shape
-  FtrlUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, z.data(),
-                               n.data(), req, &out_blob);
+  FtrlUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, z.data(), n.data(), req, &out_blob);
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void FtrlUpdateEx(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<NDArray> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<NDArray> &outputs) {
-  const FtrlParam& param = nnvm::get<FtrlParam>(attrs.parsed);
+                         const OpContext& ctx,
+                         const std::vector<NDArray>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<NDArray>& outputs) {
+  const FtrlParam& param  = nnvm::get<FtrlParam>(attrs.parsed);
   const auto weight_stype = inputs[0].storage_type();
-  const auto z_stype = inputs[2].storage_type();
-  const auto n_stype = inputs[3].storage_type();
+  const auto z_stype      = inputs[2].storage_type();
+  const auto n_stype      = inputs[3].storage_type();
 
   const auto out_stype = outputs[0].storage_type();
   CHECK_EQ(z_stype, weight_stype) << "Inconsistent storage type detected between "
-           << " z.stype = " << z_stype << " and weight.stype = " << weight_stype;
+                                  << " z.stype = " << z_stype
+                                  << " and weight.stype = " << weight_stype;
   CHECK_EQ(n_stype, weight_stype) << "Inconsistent storage type detected between "
-           << " n.stype = " << n_stype << " and weight.stype = " << weight_stype;
+                                  << " n.stype = " << n_stype
+                                  << " and weight.stype = " << weight_stype;
   if (common::ContainsOnlyStorage(inputs, kRowSparseStorage) && out_stype == kRowSparseStorage) {
-     NDArray out = outputs[0];
-     FtrlUpdateRspRspRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2],
-                                  inputs[3], req[0], &out);
+    NDArray out = outputs[0];
+    FtrlUpdateRspRspRspImpl<xpu>(
+        param, ctx, inputs[0], inputs[1], inputs[2], inputs[3], req[0], &out);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
 }
 
-
 // Implementation for signSGD and Signum
 
 struct SignSGDParam : public dmlc::Parameter<SignSGDParam> {
@@ -2271,60 +2572,68 @@ struct SignSGDParam : public dmlc::Parameter<SignSGDParam> {
   float rescale_grad;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(SignSGDParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
-
 struct SignSGDKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* weight_data,
-    const DType* grad_data, const DType param_clip_gradient,
-    const DType param_lr, const DType param_wd, const DType param_rescale_grad,
-    const OpReqType req) {
-
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType param_clip_gradient,
+                                  const DType param_lr,
+                                  const DType param_wd,
+                                  const DType param_rescale_grad,
+                                  const OpReqType req) {
     // param_clip_gradient has no effect for SignSGD
-    KERNEL_ASSIGN(out_data[i], req,
-             (1.f - param_lr * param_wd) * weight_data[i]
-               - (param_lr) * ((grad_data[i] > 0) - (grad_data[i] < 0)));
+    KERNEL_ASSIGN(out_data[i],
+                  req,
+                  (1.f - param_lr * param_wd) * weight_data[i] -
+                      (param_lr) * ((grad_data[i] > 0) - (grad_data[i] < 0)));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void SignSGDUpdate(const nnvm::NodeAttrs& attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   const SignSGDParam& param = nnvm::get<SignSGDParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<SignSGDKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, weight.dptr_,
-      grad.dptr_, static_cast<DType>(param.clip_gradient),
-      static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-      static_cast<DType>(param.rescale_grad), req[0]);
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<SignSGDKernel, xpu>::Launch(s,
+                                       weight.shape_.Size(),
+                                       out.dptr_,
+                                       weight.dptr_,
+                                       grad.dptr_,
+                                       static_cast<DType>(param.clip_gradient),
+                                       static_cast<DType>(param.lr),
+                                       static_cast<DType>(param.wd),
+                                       static_cast<DType>(param.rescale_grad),
+                                       req[0]);
   });
 }
 
-
 struct SignumParam : public dmlc::Parameter<SignumParam> {
   float lr;
   float momentum;
@@ -2333,38 +2642,41 @@ struct SignumParam : public dmlc::Parameter<SignumParam> {
   float clip_gradient;
   float wd_lh;  // the amount of algorithmic weight decay by Loshchilov and Frank Hutter
   DMLC_DECLARE_PARAMETER(SignumParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(momentum)
-    .set_default(0.0f)
-    .describe("The decay rate of momentum estimates at each epoch.");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("Weight decay augments the objective function with a "
-              "regularization term that penalizes large weights. "
-              "The penalty scales with the square of the magnitude of each weight.");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(momentum).set_default(0.0f).describe(
+        "The decay rate of momentum estimates at each epoch.");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe(
+        "Weight decay augments the objective function with a "
+        "regularization term that penalizes large weights. "
+        "The penalty scales with the square of the magnitude of each weight.");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
-    DMLC_DECLARE_FIELD(wd_lh)
-    .set_default(0.0f)
-    .describe("The amount of weight decay that does not go into gradient/momentum calculations"
-              "otherwise do weight decay algorithmically only.");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
+    DMLC_DECLARE_FIELD(wd_lh).set_default(0.0f).describe(
+        "The amount of weight decay that does not go into gradient/momentum calculations"
+        "otherwise do weight decay algorithmically only.");
   }
 };
 
 struct SignumKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, DType* mom_data,
-                                  const DType* weight_data, const DType* grad_data,
-                                  const DType param_clip_gradient, const DType param_momentum,
-                                  const DType param_lr, const DType param_wd,
-                                  const DType param_rescale_grad, const DType param_wd_lh,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const DType* grad_data,
+                                  const DType param_clip_gradient,
+                                  const DType param_momentum,
+                                  const DType param_lr,
+                                  const DType param_wd,
+                                  const DType param_rescale_grad,
+                                  const DType param_wd_lh,
                                   const OpReqType req) {
     DType rescale_grad = param_rescale_grad * grad_data[i];
     if (param_clip_gradient >= 0.0f) {
@@ -2373,30 +2685,41 @@ struct SignumKernel {
     rescale_grad += param_wd * weight_data[i];
     mom_data[i] *= param_momentum;
     mom_data[i] -= (1 - param_momentum) * rescale_grad;
-    KERNEL_ASSIGN(out_data[i], req, (1.f - param_lr * param_wd_lh) * weight_data[i]
-      + (param_lr) * ((mom_data[i] > 0) - (mom_data[i] < 0)));
+    KERNEL_ASSIGN(out_data[i],
+                  req,
+                  (1.f - param_lr * param_wd_lh) * weight_data[i] +
+                      (param_lr) * ((mom_data[i] > 0) - (mom_data[i] < 0)));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void SignumUpdate(const nnvm::NodeAttrs& attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   SignumParam param = nnvm::get<SignumParam>(attrs.parsed);
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     Tensor<xpu, 2, DType> weight = inputs[0].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> grad = inputs[1].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> mom = inputs[2].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
-    Kernel<SignumKernel, xpu>::Launch(s, weight.shape_.Size(), out.dptr_, mom.dptr_, weight.dptr_,
-      grad.dptr_, static_cast<DType>(param.clip_gradient), static_cast<DType>(param.momentum),
-      static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-      static_cast<DType>(param.rescale_grad), static_cast<DType>(param.wd_lh), req[0]);
-    });
+    Tensor<xpu, 2, DType> grad   = inputs[1].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> mom    = inputs[2].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out    = outputs[0].FlatTo2D<xpu, DType>(s);
+    Kernel<SignumKernel, xpu>::Launch(s,
+                                      weight.shape_.Size(),
+                                      out.dptr_,
+                                      mom.dptr_,
+                                      weight.dptr_,
+                                      grad.dptr_,
+                                      static_cast<DType>(param.clip_gradient),
+                                      static_cast<DType>(param.momentum),
+                                      static_cast<DType>(param.lr),
+                                      static_cast<DType>(param.wd),
+                                      static_cast<DType>(param.rescale_grad),
+                                      static_cast<DType>(param.wd_lh),
+                                      req[0]);
+  });
 }
 
 struct AdagradParam : public dmlc::Parameter<AdagradParam> {
@@ -2406,22 +2729,18 @@ struct AdagradParam : public dmlc::Parameter<AdagradParam> {
   float clip_gradient;
   float wd;
   DMLC_DECLARE_PARAMETER(AdagradParam) {
-    DMLC_DECLARE_FIELD(lr)
-    .describe("Learning rate");
-    DMLC_DECLARE_FIELD(epsilon)
-    .set_default(1.0e-7)
-    .describe("epsilon");
-    DMLC_DECLARE_FIELD(wd)
-    .set_default(0.0f)
-    .describe("weight decay");
+    DMLC_DECLARE_FIELD(lr).describe("Learning rate");
+    DMLC_DECLARE_FIELD(epsilon).set_default(1.0e-7).describe("epsilon");
+    DMLC_DECLARE_FIELD(wd).set_default(0.0f).describe("weight decay");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("Rescale gradient to grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("Rescale gradient to grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("Clip gradient to the range of [-clip_gradient, clip_gradient] "
-              "If clip_gradient <= 0, gradient clipping is turned off. "
-              "grad = max(min(grad, clip_gradient), -clip_gradient).");
+        .set_default(-1.0f)
+        .describe(
+            "Clip gradient to the range of [-clip_gradient, clip_gradient] "
+            "If clip_gradient <= 0, gradient clipping is turned off. "
+            "grad = max(min(grad, clip_gradient), -clip_gradient).");
   }
 };
 
@@ -2434,37 +2753,45 @@ inline bool AdagradStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
   const int weight_stype = in_attrs->at(0);
-  const int grad_stype = in_attrs->at(1);
-  const int state_stype = in_attrs->at(2);
-  bool dispatched = false;
+  const int grad_stype   = in_attrs->at(1);
+  const int state_stype  = in_attrs->at(2);
+  bool dispatched        = false;
   if (!dispatched && grad_stype == kRowSparseStorage &&
       (weight_stype == kRowSparseStorage || weight_stype == kDefaultStorage) &&
       state_stype == weight_stype && param.wd == 0.0f) {
     // weight and state share stype, grad's stype = rsp
-    dispatched = storage_type_assign(
-        out_attrs, static_cast<NDArrayStorageType>(weight_stype), dispatch_mode,
-        DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(out_attrs,
+                                     static_cast<NDArrayStorageType>(weight_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
 
-template<typename xpu>
+template <typename xpu>
 struct AdagradDnsRspDnsKernel;
 
-template<>
+template <>
 struct AdagradDnsRspDnsKernel<cpu> {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t row_length, DType* out_data,
-    DType* state_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType epsilon,
-    const DType lr, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t row_length,
+                                  DType* out_data,
+                                  DType* state_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType epsilon,
+                                  const DType lr,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
     using namespace mshadow_op;
     const dim_t data_i = grad_idx[i] * row_length;
     const dim_t grad_i = i * row_length;
     for (dim_t j = 0; j < row_length; j++) {
-      const dim_t data_j = data_i + j;
-      const dim_t grad_j = grad_i + j;
+      const dim_t data_j  = data_i + j;
+      const dim_t grad_j  = grad_i + j;
       DType grad_rescaled = grad_data[grad_j] * rescale_grad;
       if (clip_gradient >= 0.0f) {
         grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
@@ -2478,18 +2805,25 @@ struct AdagradDnsRspDnsKernel<cpu> {
   }
 };
 
-template<>
+template <>
 struct AdagradDnsRspDnsKernel<gpu> {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t row_length, DType* out_data,
-    DType* state_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const DType clip_gradient, const DType epsilon,
-    const DType lr, const DType rescale_grad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t row_length,
+                                  DType* out_data,
+                                  DType* state_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const DType clip_gradient,
+                                  const DType epsilon,
+                                  const DType lr,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
     using namespace mshadow_op;
-    const dim_t row_id = i / row_length;
-    const dim_t col_id = i % row_length;
-    const dim_t data_i = grad_idx[row_id] * row_length + col_id;
+    const dim_t row_id  = i / row_length;
+    const dim_t col_id  = i % row_length;
+    const dim_t data_i  = grad_idx[row_id] * row_length + col_id;
     DType grad_rescaled = grad_data[i] * rescale_grad;
     if (clip_gradient >= 0.0f) {
       grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
@@ -2502,53 +2836,61 @@ struct AdagradDnsRspDnsKernel<gpu> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void AdagradUpdateDnsRspDnsImpl(const AdagradParam& param,
                                 const OpContext& ctx,
                                 const TBlob& weight,
                                 const NDArray& grad,
                                 const TBlob& state,
                                 const OpReqType& req,
-                                TBlob *out) {
+                                TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   using namespace mshadow;
   Stream<xpu>* s = ctx.get_stream<xpu>();
-  CHECK_EQ(param.wd, 0.0f)
-    << "sparse adagrad_update does not support wd.";
-  if (req == kNullOp || !grad.storage_initialized()) return;
+  CHECK_EQ(param.wd, 0.0f) << "sparse adagrad_update does not support wd.";
+  if (req == kNullOp || !grad.storage_initialized())
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse adagrad_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(state.shape_.Size(), 0);
   MSHADOW_REAL_TYPE_SWITCH(weight.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       const DType* weight_data = weight.dptr<DType>();
-      const IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-      const DType* grad_val = grad.data().dptr<DType>();
-      DType* state_data = state.dptr<DType>();
-      DType* out_data = out->dptr<DType>();
-      const nnvm::dim_t nnr = grad.storage_shape()[0];
-      const auto row_length = weight.shape_.ProdShape(1, weight.ndim());
-      size_t num_threads = nnr;
+      const IType* grad_idx    = grad.aux_data(kIdx).dptr<IType>();
+      const DType* grad_val    = grad.data().dptr<DType>();
+      DType* state_data        = state.dptr<DType>();
+      DType* out_data          = out->dptr<DType>();
+      const nnvm::dim_t nnr    = grad.storage_shape()[0];
+      const auto row_length    = weight.shape_.ProdShape(1, weight.ndim());
+      size_t num_threads       = nnr;
       if (std::is_same<xpu, gpu>::value) {
         num_threads = nnr * row_length;
       }
-      Kernel<AdagradDnsRspDnsKernel<xpu>, xpu>::Launch(s, num_threads, row_length,
-        out_data, state_data, weight_data, grad_idx, grad_val,
-        static_cast<DType>(param.clip_gradient), static_cast<DType>(param.epsilon),
-        static_cast<DType>(param.lr), static_cast<DType>(param.rescale_grad));
+      Kernel<AdagradDnsRspDnsKernel<xpu>, xpu>::Launch(s,
+                                                       num_threads,
+                                                       row_length,
+                                                       out_data,
+                                                       state_data,
+                                                       weight_data,
+                                                       grad_idx,
+                                                       grad_val,
+                                                       static_cast<DType>(param.clip_gradient),
+                                                       static_cast<DType>(param.epsilon),
+                                                       static_cast<DType>(param.lr),
+                                                       static_cast<DType>(param.rescale_grad));
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void AdagradUpdateRspRspRspImpl(const AdagradParam& param,
                                        const OpContext& ctx,
                                        const NDArray& weight,
                                        const NDArray& grad,
                                        const NDArray& state,
                                        const OpReqType& req,
-                                       NDArray *out) {
+                                       NDArray* out) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace rowsparse;
@@ -2561,36 +2903,32 @@ inline void AdagradUpdateRspRspRspImpl(const AdagradParam& param,
   }
   TBlob out_blob = out->data();
   // reuse dns rsp implementation when storage_shape == shape
-  AdagradUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad,
-                                  state.data(), req, &out_blob);
+  AdagradUpdateDnsRspDnsImpl<xpu>(param, ctx, weight.data(), grad, state.data(), req, &out_blob);
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void AdagradUpdateEx(const nnvm::NodeAttrs& attrs,
-                            const OpContext &ctx,
-                            const std::vector<NDArray> &inputs,
-                            const std::vector<OpReqType> &req,
-                            const std::vector<NDArray> &outputs) {
+                            const OpContext& ctx,
+                            const std::vector<NDArray>& inputs,
+                            const std::vector<OpReqType>& req,
+                            const std::vector<NDArray>& outputs) {
   using namespace mxnet_op;
   const AdagradParam& param = nnvm::get<AdagradParam>(attrs.parsed);
 
   const auto weight_stype = inputs[0].storage_type();
-  const auto grad_stype = inputs[1].storage_type();
-  const auto state_stype = inputs[2].storage_type();
+  const auto grad_stype   = inputs[1].storage_type();
+  const auto state_stype  = inputs[2].storage_type();
   const auto output_stype = outputs[0].storage_type();
 
   if (common::ContainsOnlyStorage(inputs, kRowSparseStorage) &&
       common::ContainsOnlyStorage(outputs, kRowSparseStorage)) {
     NDArray out = outputs[0];
-    AdagradUpdateRspRspRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2],
-                                    req[0], &out);
+    AdagradUpdateRspRspRspImpl<xpu>(param, ctx, inputs[0], inputs[1], inputs[2], req[0], &out);
   } else if (state_stype == weight_stype && output_stype == weight_stype &&
-             weight_stype == kDefaultStorage &&
-             grad_stype == kRowSparseStorage) {
+             weight_stype == kDefaultStorage && grad_stype == kRowSparseStorage) {
     TBlob out_blob = outputs[0].data();
-    AdagradUpdateDnsRspDnsImpl<xpu>(param, ctx, inputs[0].data(), inputs[1],
-                                    inputs[2].data(), req[0],
-                                    &out_blob);
+    AdagradUpdateDnsRspDnsImpl<xpu>(
+        param, ctx, inputs[0].data(), inputs[1], inputs[2].data(), req[0], &out_blob);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
diff --git a/src/operator/optimizer_op.cc b/src/operator/optimizer_op.cc
index 901edb378581..eddc21dac519 100644
--- a/src/operator/optimizer_op.cc
+++ b/src/operator/optimizer_op.cc
@@ -47,7 +47,7 @@ DMLC_REGISTER_PARAMETER(LambUpdatePhaseOneParam);
 DMLC_REGISTER_PARAMETER(LambUpdatePhaseTwoParam);
 
 NNVM_REGISTER_OP(signsgd_update)
-.describe(R"code(Update function for SignSGD optimizer.
+    .describe(R"code(Update function for SignSGD optimizer.
 
 .. math::
 
@@ -61,19 +61,18 @@ It updates the weights using::
 .. note::
    - sparse ndarray not supported for this optimizer yet.
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SignSGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", SignSGDUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_arguments(SignSGDParam::__FIELDS__());
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SignSGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", SignSGDUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_arguments(SignSGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(signum_update)
-.describe(R"code(SIGN momentUM (Signum) optimizer.
+    .describe(R"code(SIGN momentUM (Signum) optimizer.
 
 .. math::
 
@@ -90,38 +89,45 @@ Where the parameter ``momentum`` is the decay rate of momentum estimates at each
 .. note::
    - sparse ndarray not supported for this optimizer yet.
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SignumParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.set_attr<FCompute>("FCompute<cpu>", SignumUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mom", "NDArray-or-Symbol", "Momentum")
-.add_arguments(SignumParam::__FIELDS__());
-
-template<int req>
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SignumParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", SignumUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mom", "NDArray-or-Symbol", "Momentum")
+    .add_arguments(SignumParam::__FIELDS__());
+
+template <int req>
 struct SGDMomStdDnsRspDnsKernel<req, cpu> {
-  template<typename DType, typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int i, index_t row_length, DType* out_data,
-    DType* mom_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const RType* prefix_sum, const DType clip_gradient,
-    const DType momentum, const DType lr, const DType wd, const DType rescale_grad) {
-    const bool non_zero = (i == 0) ? prefix_sum[0] > 0
-                                   : prefix_sum[i] > prefix_sum[i-1];
+  template <typename DType, typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  index_t row_length,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const RType* prefix_sum,
+                                  const DType clip_gradient,
+                                  const DType momentum,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
+    const bool non_zero = (i == 0) ? prefix_sum[0] > 0 : prefix_sum[i] > prefix_sum[i - 1];
 
     const index_t row_i = i * row_length;
-    const RType grad_i = (prefix_sum[i]-1) * row_length;
+    const RType grad_i  = (prefix_sum[i] - 1) * row_length;
     for (index_t j = 0; j < row_length; j++) {
       const index_t data_i = row_i + j;
-      const DType grad = non_zero ? grad_data[grad_i + j]
-                                  : static_cast<DType>(0);
-      DType grad_rescaled = rescale_grad * grad;
+      const DType grad     = non_zero ? grad_data[grad_i + j] : static_cast<DType>(0);
+      DType grad_rescaled  = rescale_grad * grad;
       if (clip_gradient >= 0.0f) {
         grad_rescaled = mshadow_op::clip::Map(grad_rescaled, clip_gradient);
       }
@@ -137,90 +143,109 @@ struct SGDMomStdDnsRspDnsKernel<req, cpu> {
  * \brief standard momentum update for dense weight on cpu.
  *        state is expected to be dense, while grad is expected to be row_sparse.
  */
-template<>
+template <>
 void SGDMomStdUpdateDnsRspDnsImpl<cpu>(const SGDMomParam& param,
                                        const OpContext& ctx,
                                        const TBlob& weight,
                                        const NDArray& grad,
                                        const TBlob& mom,
                                        const OpReqType& req,
-                                       TBlob *out) {
+                                       TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   using namespace mshadow;
   Stream<cpu>* s = ctx.get_stream<cpu>();
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse sgd_mom_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(mom.shape_.Size(), 0);
   MSHADOW_REAL_TYPE_SWITCH(weight.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        DType* weight_data = weight.dptr<DType>();
-        const IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        const DType* grad_val = grad.data().dptr<DType>();
-        DType* mom_data = mom.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        const nnvm::dim_t num_rows = weight.shape_[0];
-        const auto row_length = weight.shape_.ProdShape(1, weight.ndim());
-        Tensor<cpu, 1, char> workspace = ctx.requested[0]
-          .get_space_typed<cpu, 1, char>(Shape1(num_rows * sizeof(nnvm::dim_t)), s);
+        DType* weight_data             = weight.dptr<DType>();
+        const IType* grad_idx          = grad.aux_data(kIdx).dptr<IType>();
+        const DType* grad_val          = grad.data().dptr<DType>();
+        DType* mom_data                = mom.dptr<DType>();
+        DType* out_data                = out->dptr<DType>();
+        const nnvm::dim_t num_rows     = weight.shape_[0];
+        const auto row_length          = weight.shape_.ProdShape(1, weight.ndim());
+        Tensor<cpu, 1, char> workspace = ctx.requested[0].get_space_typed<cpu, 1, char>(
+            Shape1(num_rows * sizeof(nnvm::dim_t)), s);
 
         nnvm::dim_t* prefix_sum = reinterpret_cast<nnvm::dim_t*>(workspace.dptr_);
         // mark row flags
         Kernel<set_zero, cpu>::Launch(s, num_rows, prefix_sum);
         if (grad.storage_initialized()) {
-          Kernel<MarkRowFlgKernel, cpu>::Launch(s, grad.aux_shape(kIdx)[0],
-            prefix_sum, grad_idx);
+          Kernel<MarkRowFlgKernel, cpu>::Launch(s, grad.aux_shape(kIdx)[0], prefix_sum, grad_idx);
           // calculate inclusive prefix sum
           for (nnvm::dim_t i = 1; i < num_rows; i++) {
             prefix_sum[i] += prefix_sum[i - 1];
           }
         }
-        Kernel<SGDMomStdDnsRspDnsKernel<req_type, cpu>, cpu>::Launch(s, num_rows, row_length,
-          out_data, mom_data, weight_data, grad_idx, grad_val, prefix_sum,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.momentum),
-          static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<SGDMomStdDnsRspDnsKernel<req_type, cpu>, cpu>::Launch(
+            s,
+            num_rows,
+            row_length,
+            out_data,
+            mom_data,
+            weight_data,
+            grad_idx,
+            grad_val,
+            prefix_sum,
+            static_cast<DType>(param.clip_gradient),
+            static_cast<DType>(param.momentum),
+            static_cast<DType>(param.lr),
+            static_cast<DType>(param.wd),
+            static_cast<DType>(param.rescale_grad));
       });
     });
   });
 }
 
-template<int req>
+template <int req>
 struct AdamStdDnsRspDnsKernel<req, cpu> {
-  template<typename DType, typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int i, const nnvm::dim_t row_length, DType* out_data,
-    DType* mean_data, DType* var_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const RType* prefix_sum, const DType clip_gradient,
-    const DType beta1, const DType beta2, const DType lr, const DType wd,
-    const DType epsilon, const DType rescale_grad) {
+  template <typename DType, typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const nnvm::dim_t row_length,
+                                  DType* out_data,
+                                  DType* mean_data,
+                                  DType* var_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const RType* prefix_sum,
+                                  const DType clip_gradient,
+                                  const DType beta1,
+                                  const DType beta2,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType epsilon,
+                                  const DType rescale_grad) {
     using namespace mshadow_op;
-    const bool non_zero = (i == 0) ? prefix_sum[0] > 0
-                                   : prefix_sum[i] > prefix_sum[i-1];
+    const bool non_zero = (i == 0) ? prefix_sum[0] > 0 : prefix_sum[i] > prefix_sum[i - 1];
 
     const index_t row_i = i * row_length;
-    const RType grad_i = (prefix_sum[i]-1) * row_length;
+    const RType grad_i  = (prefix_sum[i] - 1) * row_length;
     for (index_t j = 0; j < row_length; j++) {
       const index_t data_i = row_i + j;
-      DType grad_rescaled = non_zero ? static_cast<DType>(
-                                         grad_data[grad_i + j] * rescale_grad)
-                                     : static_cast<DType>(0);
+      DType grad_rescaled  = non_zero ? static_cast<DType>(grad_data[grad_i + j] * rescale_grad)
+                                      : static_cast<DType>(0);
       if (clip_gradient >= 0.0f) {
         grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
       }
       grad_rescaled += weight_data[data_i] * wd;
       mean_data[data_i] = beta1 * mean_data[data_i] + (1.f - beta1) * grad_rescaled;
-      var_data[data_i] = beta2 * var_data[data_i] +
-                         (1.f - beta2) * square::Map(grad_rescaled);
-      KERNEL_ASSIGN(out_data[data_i], req, weight_data[data_i] - lr * mean_data[data_i] /
-                    (square_root::Map(var_data[data_i]) + epsilon));
+      var_data[data_i]  = beta2 * var_data[data_i] + (1.f - beta2) * square::Map(grad_rescaled);
+      KERNEL_ASSIGN(out_data[data_i],
+                    req,
+                    weight_data[data_i] -
+                        lr * mean_data[data_i] / (square_root::Map(var_data[data_i]) + epsilon));
     }
   }
 };
 
-
-template<>
+template <>
 void AdamStdUpdateDnsRspDnsImpl<cpu>(const AdamParam& param,
                                      const OpContext& ctx,
                                      const TBlob& weight,
@@ -228,12 +253,13 @@ void AdamStdUpdateDnsRspDnsImpl<cpu>(const AdamParam& param,
                                      const TBlob& mean,
                                      const TBlob& var,
                                      const OpReqType& req,
-                                     TBlob *out) {
+                                     TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   using namespace mshadow;
   Stream<cpu>* s = ctx.get_stream<cpu>();
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse adam_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(mean.shape_.Size(), 0);
@@ -242,35 +268,46 @@ void AdamStdUpdateDnsRspDnsImpl<cpu>(const AdamParam& param,
   MSHADOW_REAL_TYPE_SWITCH(weight.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        const DType* weight_data = weight.dptr<DType>();
-        const IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        const DType* grad_val = grad.data().dptr<DType>();
-        DType* mean_data = mean.dptr<DType>();
-        DType* var_data = var.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        nnvm::dim_t num_rows = weight.shape_[0];
-        nnvm::dim_t row_length = weight.shape_.ProdShape(1, weight.ndim());
-        Tensor<cpu, 1, char> workspace = ctx.requested[0]
-          .get_space_typed<cpu, 1, char>(Shape1(num_rows * sizeof(nnvm::dim_t)), s);
+        const DType* weight_data       = weight.dptr<DType>();
+        const IType* grad_idx          = grad.aux_data(kIdx).dptr<IType>();
+        const DType* grad_val          = grad.data().dptr<DType>();
+        DType* mean_data               = mean.dptr<DType>();
+        DType* var_data                = var.dptr<DType>();
+        DType* out_data                = out->dptr<DType>();
+        nnvm::dim_t num_rows           = weight.shape_[0];
+        nnvm::dim_t row_length         = weight.shape_.ProdShape(1, weight.ndim());
+        Tensor<cpu, 1, char> workspace = ctx.requested[0].get_space_typed<cpu, 1, char>(
+            Shape1(num_rows * sizeof(nnvm::dim_t)), s);
 
         nnvm::dim_t* prefix_sum = reinterpret_cast<nnvm::dim_t*>(workspace.dptr_);
         // mark row flags
         Kernel<set_zero, cpu>::Launch(s, num_rows, prefix_sum);
         if (grad.storage_initialized()) {
-          Kernel<MarkRowFlgKernel, cpu>::Launch(s, grad.aux_shape(kIdx)[0],
-            prefix_sum, grad_idx);
+          Kernel<MarkRowFlgKernel, cpu>::Launch(s, grad.aux_shape(kIdx)[0], prefix_sum, grad_idx);
           // calculate inclusive prefix sum
           for (nnvm::dim_t i = 1; i < num_rows; i++) {
             prefix_sum[i] += prefix_sum[i - 1];
           }
         }
 
-        Kernel<AdamStdDnsRspDnsKernel<req_type, cpu>, cpu>::Launch(s, num_rows, row_length,
-          out_data, mean_data, var_data, weight_data, grad_idx, grad_val, prefix_sum,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.beta1),
-          static_cast<DType>(param.beta2), static_cast<DType>(param.lr),
-          static_cast<DType>(param.wd), static_cast<DType>(param.epsilon),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<AdamStdDnsRspDnsKernel<req_type, cpu>, cpu>::Launch(
+            s,
+            num_rows,
+            row_length,
+            out_data,
+            mean_data,
+            var_data,
+            weight_data,
+            grad_idx,
+            grad_val,
+            prefix_sum,
+            static_cast<DType>(param.clip_gradient),
+            static_cast<DType>(param.beta1),
+            static_cast<DType>(param.beta2),
+            static_cast<DType>(param.lr),
+            static_cast<DType>(param.wd),
+            static_cast<DType>(param.epsilon),
+            static_cast<DType>(param.rescale_grad));
       });
     });
   });
@@ -289,20 +326,23 @@ inline bool SGDStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const int weight_stype = in_attrs->at(0);
-  const int grad_stype = in_attrs->at(1);
-  bool dispatched = false;
+  const int grad_stype   = in_attrs->at(1);
+  bool dispatched        = false;
   if (!dispatched && ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
     // dns, ... -> dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && grad_stype == kRowSparseStorage &&
       (weight_stype == kRowSparseStorage || weight_stype == kDefaultStorage)) {
     // grad's stype = rsp
-    dispatched = storage_type_assign(out_attrs, static_cast<NDArrayStorageType>(weight_stype),
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(out_attrs,
+                                     static_cast<NDArrayStorageType>(weight_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
     // warn users if lazy_update is turned on
-    if (dispatched && param.wd != 0 && param.lazy_update) LogLazyUpdate();
+    if (dispatched && param.wd != 0 && param.lazy_update)
+      LogLazyUpdate();
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -311,40 +351,41 @@ inline bool SGDStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(multi_sgd_update)
-.describe(R"code(Update function for Stochastic Gradient Descent (SDG) optimizer.
+    .describe(R"code(Update function for Stochastic Gradient Descent (SDG) optimizer.
 
 It updates the weights using::
 
  weight = weight - learning_rate * (gradient + wd * weight)
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 2);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<MultiSGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDParam, 2>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<MultiSGDParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiSGDUpdate<cpu, type_identity, 2>)
-.add_argument("data", "NDArray-or-Symbol[]", "Weights")
-.add_arguments(MultiSGDParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 2);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<MultiSGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDParam, 2>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<MultiSGDParam>(attrs.parsed).num_weights;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("weight_") + std::to_string(i));
+                                         ret.push_back(std::string("grad_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<FCompute>("FCompute<cpu>", MultiSGDUpdate<cpu, type_identity, 2>)
+    .add_argument("data", "NDArray-or-Symbol[]", "Weights")
+    .add_arguments(MultiSGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(multi_sgd_mom_update)
-.describe(R"code(Momentum update function for Stochastic Gradient Descent (SGD) optimizer.
+    .describe(R"code(Momentum update function for Stochastic Gradient Descent (SGD) optimizer.
 
 Momentum update has better convergence rates on neural networks. Mathematically it looks
 like below:
@@ -363,88 +404,95 @@ It updates the weights using::
 Where the parameter ``momentum`` is the decay rate of momentum estimates at each epoch.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 3);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<MultiSGDMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDMomParam, 3>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<MultiSGDParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-      ret.push_back(std::string("mom_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
-    ret.reserve(param.num_weights);
-    for (int i = 0; i < param.num_weights; ++i) {
-      ret.push_back(i * 3 + 2);
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiSGDMomUpdate<cpu, type_identity, 3>)
-.add_argument("data", "NDArray-or-Symbol[]", "Weights, gradients and momentum")
-.add_arguments(MultiSGDMomParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 3);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<MultiSGDMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDMomParam, 3>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, -1>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<MultiSGDParam>(attrs.parsed).num_weights;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("weight_") + std::to_string(i));
+                                         ret.push_back(std::string("grad_") + std::to_string(i));
+                                         ret.push_back(std::string("mom_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const MultiSGDMomParam& param =
+                                         dmlc::get<MultiSGDMomParam>(attrs.parsed);
+                                     ret.reserve(param.num_weights);
+                                     for (int i = 0; i < param.num_weights; ++i) {
+                                       ret.push_back(i * 3 + 2);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MultiSGDMomUpdate<cpu, type_identity, 3>)
+    .add_argument("data", "NDArray-or-Symbol[]", "Weights, gradients and momentum")
+    .add_arguments(MultiSGDMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(multi_mp_sgd_update)
-.describe(R"code(Update function for multi-precision Stochastic Gradient Descent (SDG) optimizer.
+    .describe(
+        R"code(Update function for multi-precision Stochastic Gradient Descent (SDG) optimizer.
 
 It updates the weights using::
 
  weight = weight - learning_rate * (gradient + wd * weight)
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 3);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<MultiSGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDParam, 3>)
-.set_attr<nnvm::FInferType>("FInferType", MP_MultiSGD_InferType<MultiSGDParam, 3, 1>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<MultiSGDParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-      ret.push_back(std::string("weight32_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
-    ret.reserve(param.num_weights);
-    for (int i = 0; i < param.num_weights; ++i) {
-      ret.push_back(i * 3 + 2);
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiSGDUpdate<cpu, single_precision, 3>)
-.add_argument("data", "NDArray-or-Symbol[]", "Weights")
-.add_arguments(MultiSGDParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 3);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDParam& param = dmlc::get<MultiSGDParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<MultiSGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDParam, 3>)
+    .set_attr<nnvm::FInferType>("FInferType", MP_MultiSGD_InferType<MultiSGDParam, 3, 1>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<MultiSGDParam>(attrs.parsed).num_weights;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("weight_") + std::to_string(i));
+                                         ret.push_back(std::string("grad_") + std::to_string(i));
+                                         ret.push_back(std::string("weight32_") +
+                                                       std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const MultiSGDParam& param =
+                                         dmlc::get<MultiSGDParam>(attrs.parsed);
+                                     ret.reserve(param.num_weights);
+                                     for (int i = 0; i < param.num_weights; ++i) {
+                                       ret.push_back(i * 3 + 2);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MultiSGDUpdate<cpu, single_precision, 3>)
+    .add_argument("data", "NDArray-or-Symbol[]", "Weights")
+    .add_arguments(MultiSGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(multi_mp_sgd_mom_update)
-.describe(R"code(Momentum update function for multi-precision Stochastic Gradient Descent (SGD) optimizer.
+    .describe(
+        R"code(Momentum update function for multi-precision Stochastic Gradient Descent (SGD) optimizer.
 
 Momentum update has better convergence rates on neural networks. Mathematically it looks
 like below:
@@ -463,46 +511,49 @@ It updates the weights using::
 Where the parameter ``momentum`` is the decay rate of momentum estimates at each epoch.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights * 4);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_weights);
-  })
-.set_attr_parser(ParamParser<MultiSGDMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDMomParam, 4>)
-.set_attr<nnvm::FInferType>("FInferType", MP_MultiSGD_InferType<MultiSGDMomParam, 4, 2>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<MultiSGDMomParam>(attrs.parsed).num_weights;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("weight_") + std::to_string(i));
-      ret.push_back(std::string("grad_") + std::to_string(i));
-      ret.push_back(std::string("mom_") + std::to_string(i));
-      ret.push_back(std::string("weight32_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    std::vector<uint32_t> ret;
-    const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
-    for (int i = 0; i < param.num_weights; ++i) {
-      ret.push_back(i * 4 + 2);
-      ret.push_back(i * 4 + 3);
-    }
-    return ret;
-  })
-.set_attr<FCompute>("FCompute<cpu>", MultiSGDMomUpdate<cpu, single_precision, 4>)
-.add_argument("data", "NDArray-or-Symbol[]", "Weights")
-.add_arguments(MultiSGDMomParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights * 4);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const MultiSGDMomParam& param = dmlc::get<MultiSGDMomParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_weights);
+    })
+    .set_attr_parser(ParamParser<MultiSGDMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MultiSGDShape<MultiSGDMomParam, 4>)
+    .set_attr<nnvm::FInferType>("FInferType", MP_MultiSGD_InferType<MultiSGDMomParam, 4, 2>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<MultiSGDMomParam>(attrs.parsed).num_weights;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("weight_") + std::to_string(i));
+                                         ret.push_back(std::string("grad_") + std::to_string(i));
+                                         ret.push_back(std::string("mom_") + std::to_string(i));
+                                         ret.push_back(std::string("weight32_") +
+                                                       std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     std::vector<uint32_t> ret;
+                                     const MultiSGDMomParam& param =
+                                         dmlc::get<MultiSGDMomParam>(attrs.parsed);
+                                     for (int i = 0; i < param.num_weights; ++i) {
+                                       ret.push_back(i * 4 + 2);
+                                       ret.push_back(i * 4 + 3);
+                                     }
+                                     return ret;
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MultiSGDMomUpdate<cpu, single_precision, 4>)
+    .add_argument("data", "NDArray-or-Symbol[]", "Weights")
+    .add_arguments(MultiSGDMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(sgd_update)
 MXNET_ADD_SPARSE_OP_ALIAS(sgd_update)
-.describe(R"code(Update function for Stochastic Gradient Descent (SGD) optimizer.
+    .describe(R"code(Update function for Stochastic Gradient Descent (SGD) optimizer.
 
 It updates the weights using::
 
@@ -515,21 +566,21 @@ only the row slices whose indices appear in grad.indices are updated::
      weight[row] = weight[row] - learning_rate * (gradient[row] + wd * weight[row])
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", SGDStorageType)
-.set_attr<FCompute>("FCompute<cpu>", SGDUpdate<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SGDUpdateEx<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_arguments(SGDParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", SGDStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", SGDUpdate<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SGDUpdateEx<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_arguments(SGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(sgd_mom_update)
 MXNET_ADD_SPARSE_OP_ALIAS(sgd_mom_update)
-.describe(R"code(Momentum update function for Stochastic Gradient Descent (SGD) optimizer.
+    .describe(R"code(Momentum update function for Stochastic Gradient Descent (SGD) optimizer.
 
 Momentum update has better convergence rates on neural networks. Mathematically it looks
 like below:
@@ -556,68 +607,70 @@ only the row slices whose indices appear in grad.indices are updated (for both w
       weight[row] += v[row]
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SGDMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", StdOptStorageType<1, SGDMomParam>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.set_attr<FResourceRequestEx>("FResourceRequestEx",
-  [](const NodeAttrs& attrs, const int dev_mask, const DispatchMode dispatch_mode) {
-    std::vector<ResourceRequest> request;
-    if (dispatch_mode == DispatchMode::kFComputeEx) {
-      request.emplace_back(ResourceRequest::kTempSpace);
-    }
-    return request;
-  })
-.set_attr<FCompute>("FCompute<cpu>", SGDMomUpdate<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SGDMomUpdateEx<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mom", "NDArray-or-Symbol", "Momentum")
-.add_arguments(SGDMomParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SGDMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", StdOptStorageType<1, SGDMomParam>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .set_attr<FResourceRequestEx>("FResourceRequestEx",
+                                  [](const NodeAttrs& attrs,
+                                     const int dev_mask,
+                                     const DispatchMode dispatch_mode) {
+                                    std::vector<ResourceRequest> request;
+                                    if (dispatch_mode == DispatchMode::kFComputeEx) {
+                                      request.emplace_back(ResourceRequest::kTempSpace);
+                                    }
+                                    return request;
+                                  })
+    .set_attr<FCompute>("FCompute<cpu>", SGDMomUpdate<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SGDMomUpdateEx<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mom", "NDArray-or-Symbol", "Momentum")
+    .add_arguments(SGDMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(mp_sgd_update)
-.describe("Updater function for multi-precision sgd optimizer")
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SGDParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInferType>("FInferType", MP_InferType<2, 1, 3>)
-.set_attr<FCompute>("FCompute<cpu>", MP_SGDUpdate<cpu>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "gradient")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_arguments(SGDParam::__FIELDS__());
+    .describe("Updater function for multi-precision sgd optimizer")
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SGDParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", MP_InferType<2, 1, 3>)
+    .set_attr<FCompute>("FCompute<cpu>", MP_SGDUpdate<cpu>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "gradient")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_arguments(SGDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(mp_sgd_mom_update)
-.describe("Updater function for multi-precision sgd optimizer")
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SGDMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
-.set_attr<nnvm::FInferType>("FInferType", MP_InferType<2, 1, 4>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MP_SGDMomUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mom", "NDArray-or-Symbol", "Momentum")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_arguments(SGDMomParam::__FIELDS__());
+    .describe("Updater function for multi-precision sgd optimizer")
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SGDMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", MP_InferType<2, 1, 4>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MP_SGDMomUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mom", "NDArray-or-Symbol", "Momentum")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_arguments(SGDMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(ftml_update)
-.describe(R"code(The FTML optimizer described in
+    .describe(R"code(The FTML optimizer described in
 *FTML - Follow the Moving Leader in Deep Learning*,
 available at http://proceedings.mlr.press/v70/zheng17a/zheng17a.pdf.
 
@@ -631,26 +684,26 @@ available at http://proceedings.mlr.press/v70/zheng17a/zheng17a.pdf.
  W_t = - \frac{ z_t }{ d_t }
 
 )code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<FTMLParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<5, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<5, 1>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3, 4};
-  })
-.set_attr<FCompute>("FCompute<cpu>", FTMLUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("d", "NDArray-or-Symbol", "Internal state ``d_t``")
-.add_argument("v", "NDArray-or-Symbol", "Internal state ``v_t``")
-.add_argument("z", "NDArray-or-Symbol", "Internal state ``z_t``")
-.add_arguments(FTMLParam::__FIELDS__());
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<FTMLParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<5, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<5, 1>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3, 4};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", FTMLUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("d", "NDArray-or-Symbol", "Internal state ``d_t``")
+    .add_argument("v", "NDArray-or-Symbol", "Internal state ``v_t``")
+    .add_argument("z", "NDArray-or-Symbol", "Internal state ``z_t``")
+    .add_arguments(FTMLParam::__FIELDS__());
 
 NNVM_REGISTER_OP(adam_update)
 MXNET_ADD_SPARSE_OP_ALIAS(adam_update)
-.describe(R"code(Update function for Adam optimizer. Adam is seen as a generalization
+    .describe(R"code(Update function for Adam optimizer. Adam is seen as a generalization
 of AdaGrad.
 
 Adam update consists of the following steps, where g represents gradient and m, v
@@ -679,31 +732,30 @@ only the row slices whose indices appear in grad.indices are updated (for w, m a
      w[row] += - learning_rate * m[row] / (sqrt(v[row]) + epsilon)
 
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AdamParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", StdOptStorageType<2, AdamParam>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.set_attr<FCompute>("FCompute<cpu>", AdamUpdate<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AdamUpdateEx<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_arguments(AdamParam::__FIELDS__());
-
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AdamParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", StdOptStorageType<2, AdamParam>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", AdamUpdate<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AdamUpdateEx<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_arguments(AdamParam::__FIELDS__());
 
 NNVM_REGISTER_OP(nag_mom_update)
-.describe(R"code(Update function for Nesterov Accelerated Gradient( NAG) optimizer.
+    .describe(R"code(Update function for Nesterov Accelerated Gradient( NAG) optimizer.
 It updates the weights using the following formula,
 
 .. math::
@@ -717,44 +769,43 @@ Where
 :math:`\W_t` is the weight vector at time step `t`
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NAGMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.set_attr<FCompute>("FCompute<cpu>", NAGMomUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mom", "NDArray-or-Symbol", "Momentum")
-.add_arguments(NAGMomParam::__FIELDS__());
-
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NAGMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", NAGMomUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mom", "NDArray-or-Symbol", "Momentum")
+    .add_arguments(NAGMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(mp_nag_mom_update)
-.describe(R"code(Update function for multi-precision Nesterov Accelerated Gradient( NAG) optimizer.
+    .describe(
+        R"code(Update function for multi-precision Nesterov Accelerated Gradient( NAG) optimizer.
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NAGMomParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
-.set_attr<nnvm::FInferType>("FInferType", MP_InferType<2, 1, 4>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.set_attr<FCompute>("FCompute<cpu>", MP_NAGMomUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mom", "NDArray-or-Symbol", "Momentum")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_arguments(NAGMomParam::__FIELDS__());
-
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NAGMomParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", MP_InferType<2, 1, 4>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", MP_NAGMomUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mom", "NDArray-or-Symbol", "Momentum")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_arguments(NAGMomParam::__FIELDS__());
 
 NNVM_REGISTER_OP(rmsprop_update)
-.describe(R"code(Update function for `RMSProp` optimizer.
+    .describe(R"code(Update function for `RMSProp` optimizer.
 
 `RMSprop` is a variant of stochastic gradient descent where the gradients are
 divided by a cache which grows with the sum of squares of recent gradients?
@@ -788,23 +839,23 @@ Hinton suggests the momentum term :math:`\rho` to be 0.9 and the learning rate
 :math:`\eta` to be 0.001.
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RMSPropParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs &attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.set_attr<FCompute>("FCompute<cpu>", RMSPropUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("n", "NDArray-or-Symbol", "n")
-.add_arguments(RMSPropParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RMSPropParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", RMSPropUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("n", "NDArray-or-Symbol", "n")
+    .add_arguments(RMSPropParam::__FIELDS__());
 
 NNVM_REGISTER_OP(rmspropalex_update)
-.describe(R"code(Update function for RMSPropAlex optimizer.
+    .describe(R"code(Update function for RMSPropAlex optimizer.
 
 `RMSPropAlex` is non-centered version of `RMSProp`.
 
@@ -827,26 +878,26 @@ The RMSPropAlex code follows the version in
 Graves suggests the momentum term :math:`\rho` to be 0.95, :math:`\gamma`
 to be 0.9 and the learning rate :math:`\eta` to be 0.0001.
 )code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RMSPropAlexParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<5, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<5, 1>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3, 4};
-  })
-.set_attr<FCompute>("FCompute<cpu>", RMSPropAlexUpdate<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("n", "NDArray-or-Symbol", "n")
-.add_argument("g", "NDArray-or-Symbol", "g")
-.add_argument("delta", "NDArray-or-Symbol", "delta")
-.add_arguments(RMSPropAlexParam::__FIELDS__());
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RMSPropAlexParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<5, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<5, 1>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3, 4};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", RMSPropAlexUpdate<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("n", "NDArray-or-Symbol", "n")
+    .add_argument("g", "NDArray-or-Symbol", "g")
+    .add_argument("delta", "NDArray-or-Symbol", "delta")
+    .add_arguments(RMSPropAlexParam::__FIELDS__());
 
 NNVM_REGISTER_OP(ftrl_update)
 MXNET_ADD_SPARSE_OP_ALIAS(ftrl_update)
-.describe(R"code(Update function for Ftrl optimizer.
+    .describe(R"code(Update function for Ftrl optimizer.
 Referenced from *Ad Click Prediction: a View from the Trenches*, available at
 http://dl.acm.org/citation.cfm?id=2488200.
 
@@ -867,26 +918,26 @@ only the row slices whose indices appear in grad.indices are updated (for w, z a
      w[row] = (sign(z[row]) * lamda1 - z[row]) / ((beta + sqrt(n[row])) / learning_rate + wd) * (abs(z[row]) > lamda1)
 
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<FtrlParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<4, 1, false, true, false>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.set_attr<FCompute>("FCompute<cpu>", FtrlUpdate<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FtrlUpdateEx<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("z", "NDArray-or-Symbol", "z")
-.add_argument("n", "NDArray-or-Symbol", "Square of grad")
-.add_arguments(FtrlParam::__FIELDS__());
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<FtrlParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<4, 1, false, true, false>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", FtrlUpdate<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FtrlUpdateEx<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("z", "NDArray-or-Symbol", "z")
+    .add_argument("n", "NDArray-or-Symbol", "Square of grad")
+    .add_arguments(FtrlParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_sparse_adagrad_update)
-.describe(R"code(Update function for AdaGrad optimizer.
+    .describe(R"code(Update function for AdaGrad optimizer.
 
 Referenced from *Adaptive Subgradient Methods for Online Learning and Stochastic Optimization*,
 and available at http://www.jmlr.org/papers/volume12/duchi11a/duchi11a.pdf.
@@ -900,24 +951,24 @@ Updates are applied by::
 Note that non-zero values for the weight decay option are not supported.
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<AdagradParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", AdagradStorageType)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2};
-  })
-.set_attr<FComputeEx>("FComputeEx<cpu>", AdagradUpdateEx<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("history", "NDArray-or-Symbol", "History")
-.add_arguments(AdagradParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<AdagradParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<3, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", AdagradStorageType)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2};
+                                   })
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AdagradUpdateEx<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("history", "NDArray-or-Symbol", "History")
+    .add_arguments(AdagradParam::__FIELDS__());
 
 NNVM_REGISTER_OP(lamb_update_phase1)
-.describe(R"code(Phase I of lamb update it performs the following operations and returns g:.
+    .describe(R"code(Phase I of lamb update it performs the following operations and returns g:.
 
 Link to paper: https://arxiv.org/pdf/1904.00962.pdf
 
@@ -944,24 +995,24 @@ Link to paper: https://arxiv.org/pdf/1904.00962.pdf
     \end{gather*}
 
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LambUpdatePhaseOneParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LambUpdatePhaseOne<cpu>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_arguments(LambUpdatePhaseOneParam::__FIELDS__());
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LambUpdatePhaseOneParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<4, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LambUpdatePhaseOne<cpu>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_arguments(LambUpdatePhaseOneParam::__FIELDS__());
 
 NNVM_REGISTER_OP(lamb_update_phase2)
-.describe(R"code(Phase II of lamb update it performs the following operations and updates grad.
+    .describe(R"code(Phase II of lamb update it performs the following operations and updates grad.
 
 Link to paper: https://arxiv.org/pdf/1904.00962.pdf
 
@@ -983,20 +1034,20 @@ Link to paper: https://arxiv.org/pdf/1904.00962.pdf
     \end{gather*}
 
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LambUpdatePhaseTwoParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", LambUpdatePhaseTwoShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LambUpdatePhaseTwo<cpu>)
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("g", "NDArray-or-Symbol", "Output of lamb_update_phase 1")
-.add_argument("r1", "NDArray-or-Symbol", "r1")
-.add_argument("r2", "NDArray-or-Symbol", "r2")
-.add_arguments(LambUpdatePhaseTwoParam::__FIELDS__());
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LambUpdatePhaseTwoParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", LambUpdatePhaseTwoShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<4, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LambUpdatePhaseTwo<cpu>)
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("g", "NDArray-or-Symbol", "Output of lamb_update_phase 1")
+    .add_argument("r1", "NDArray-or-Symbol", "r1")
+    .add_argument("r2", "NDArray-or-Symbol", "r2")
+    .add_arguments(LambUpdatePhaseTwoParam::__FIELDS__());
 
 NNVM_REGISTER_OP(mp_lamb_update_phase1)
-.describe(R"code(Mixed Precision version of Phase I of lamb update 
+    .describe(R"code(Mixed Precision version of Phase I of lamb update 
 it performs the following operations and returns g:.
 
           Link to paper: https://arxiv.org/pdf/1904.00962.pdf
@@ -1024,25 +1075,25 @@ it performs the following operations and returns g:.
               \end{gather*}
 
           )code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LambUpdatePhaseOneParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<5, 1>)
-.set_attr<nnvm::FInferType>("FInferType", MPLambPhaseOneType<2, 1, 5>)
-.set_attr<FCompute>("FCompute<cpu>", MPLambUpdatePhaseOne<cpu>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{2, 3};
-  })
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("grad", "NDArray-or-Symbol", "Gradient")
-.add_argument("mean", "NDArray-or-Symbol", "Moving mean")
-.add_argument("var", "NDArray-or-Symbol", "Moving variance")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_arguments(LambUpdatePhaseOneParam::__FIELDS__());
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LambUpdatePhaseOneParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<5, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", MPLambPhaseOneType<2, 1, 5>)
+    .set_attr<FCompute>("FCompute<cpu>", MPLambUpdatePhaseOne<cpu>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{2, 3};
+                                   })
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("grad", "NDArray-or-Symbol", "Gradient")
+    .add_argument("mean", "NDArray-or-Symbol", "Moving mean")
+    .add_argument("var", "NDArray-or-Symbol", "Moving variance")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_arguments(LambUpdatePhaseOneParam::__FIELDS__());
 
 NNVM_REGISTER_OP(mp_lamb_update_phase2)
-.describe(R"code(Mixed Precision version Phase II of lamb update 
+    .describe(R"code(Mixed Precision version Phase II of lamb update 
 it performs the following operations and updates grad.
 
           Link to paper: https://arxiv.org/pdf/1904.00962.pdf
@@ -1066,22 +1117,22 @@ it performs the following operations and updates grad.
               \end{gather*}
 
           )code" ADD_FILELINE)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LambUpdatePhaseTwoParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", MPLambUpdatePhaseTwoShape)
-.set_attr<nnvm::FInferType>("FInferType", MP_InferType<1, 1, 5>)
-.set_attr<FCompute>("FCompute<cpu>", MPLambUpdatePhaseTwo<cpu>)
-.set_attr<nnvm::FMutateInputs>("FMutateInputs",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<uint32_t>{4};
-  })
-.add_argument("weight", "NDArray-or-Symbol", "Weight")
-.add_argument("g", "NDArray-or-Symbol", "Output of mp_lamb_update_phase 1")
-.add_argument("r1", "NDArray-or-Symbol", "r1")
-.add_argument("r2", "NDArray-or-Symbol", "r2")
-.add_argument("weight32", "NDArray-or-Symbol", "Weight32")
-.add_arguments(LambUpdatePhaseTwoParam::__FIELDS__());
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LambUpdatePhaseTwoParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", MPLambUpdatePhaseTwoShape)
+    .set_attr<nnvm::FInferType>("FInferType", MP_InferType<1, 1, 5>)
+    .set_attr<FCompute>("FCompute<cpu>", MPLambUpdatePhaseTwo<cpu>)
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{4};
+                                   })
+    .add_argument("weight", "NDArray-or-Symbol", "Weight")
+    .add_argument("g", "NDArray-or-Symbol", "Output of mp_lamb_update_phase 1")
+    .add_argument("r1", "NDArray-or-Symbol", "r1")
+    .add_argument("r2", "NDArray-or-Symbol", "r2")
+    .add_argument("weight32", "NDArray-or-Symbol", "Weight32")
+    .add_arguments(LambUpdatePhaseTwoParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/optimizer_op.cu b/src/operator/optimizer_op.cu
index 95f45be981ce..b9bab8d2cfab 100644
--- a/src/operator/optimizer_op.cu
+++ b/src/operator/optimizer_op.cu
@@ -29,22 +29,29 @@
 namespace mxnet {
 namespace op {
 
-template<int req>
+template <int req>
 struct SGDMomStdDnsRspDnsKernel<req, gpu> {
-  template<typename DType, typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int i, index_t row_length, DType* out_data,
-    DType* mom_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const RType* prefix_sum, const DType clip_gradient,
-    const DType momentum, const DType lr, const DType wd, const DType rescale_grad) {
+  template <typename DType, typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  index_t row_length,
+                                  DType* out_data,
+                                  DType* mom_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const RType* prefix_sum,
+                                  const DType clip_gradient,
+                                  const DType momentum,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType rescale_grad) {
     using nnvm::dim_t;
-    const dim_t row_id = i / row_length;
-    const dim_t col_id = i % row_length;
-    const dim_t nnr = prefix_sum[row_id];
-    const bool non_zero = (row_id == 0) ? prefix_sum[0] > 0
-                                        : nnr > prefix_sum[row_id - 1];
-    const RType grad_i = (nnr - 1) * row_length + col_id;
-    const DType grad = non_zero ? grad_data[grad_i]
-                                : static_cast<DType>(0);
+    const dim_t row_id  = i / row_length;
+    const dim_t col_id  = i % row_length;
+    const dim_t nnr     = prefix_sum[row_id];
+    const bool non_zero = (row_id == 0) ? prefix_sum[0] > 0 : nnr > prefix_sum[row_id - 1];
+    const RType grad_i  = (nnr - 1) * row_length + col_id;
+    const DType grad    = non_zero ? grad_data[grad_i] : static_cast<DType>(0);
     DType grad_rescaled = rescale_grad * grad;
     if (clip_gradient >= 0.0f) {
       grad_rescaled = mshadow_op::clip::Map(grad_rescaled, clip_gradient);
@@ -56,19 +63,20 @@ struct SGDMomStdDnsRspDnsKernel<req, gpu> {
   }
 };
 
-template<>
+template <>
 void SGDMomStdUpdateDnsRspDnsImpl<gpu>(const SGDMomParam& param,
                                        const OpContext& ctx,
                                        const TBlob& weight,
                                        const NDArray& grad,
                                        const TBlob& mom,
                                        const OpReqType& req,
-                                       TBlob *out) {
+                                       TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   using namespace mshadow;
   Stream<gpu>* s = ctx.get_stream<gpu>();
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse sgd_mom_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(mom.shape_.Size(), 0);
@@ -76,16 +84,16 @@ void SGDMomStdUpdateDnsRspDnsImpl<gpu>(const SGDMomParam& param,
   MSHADOW_REAL_TYPE_SWITCH(weight.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        DType* weight_data = weight.dptr<DType>();
-        IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        DType* grad_val = grad.data().dptr<DType>();
-        DType* mom_data = mom.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        nnvm::dim_t num_rows = weight.shape_[0];
+        DType* weight_data     = weight.dptr<DType>();
+        IType* grad_idx        = grad.aux_data(kIdx).dptr<IType>();
+        DType* grad_val        = grad.data().dptr<DType>();
+        DType* mom_data        = mom.dptr<DType>();
+        DType* out_data        = out->dptr<DType>();
+        nnvm::dim_t num_rows   = weight.shape_[0];
         nnvm::dim_t row_length = weight.shape_.ProdShape(1, weight.ndim());
 
-        nnvm::dim_t* prefix_sum = nullptr;
-        void* d_temp_storage = nullptr;
+        nnvm::dim_t* prefix_sum   = nullptr;
+        void* d_temp_storage      = nullptr;
         size_t temp_storage_bytes = 0;
         cub::DeviceScan::InclusiveSum(d_temp_storage,
                                       temp_storage_bytes,
@@ -93,16 +101,14 @@ void SGDMomStdUpdateDnsRspDnsImpl<gpu>(const SGDMomParam& param,
                                       prefix_sum,
                                       num_rows,
                                       Stream<gpu>::GetStream(s));
-        Tensor<gpu, 1, char> workspace = ctx.requested[0]
-          .get_space_typed<gpu, 1, char>(Shape1(num_rows * sizeof(nnvm::dim_t) +
-                                         temp_storage_bytes), s);
-        prefix_sum = reinterpret_cast<nnvm::dim_t*>(workspace.dptr_);
-        d_temp_storage = workspace.dptr_ + num_rows*sizeof(nnvm::dim_t);
+        Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(
+            Shape1(num_rows * sizeof(nnvm::dim_t) + temp_storage_bytes), s);
+        prefix_sum     = reinterpret_cast<nnvm::dim_t*>(workspace.dptr_);
+        d_temp_storage = workspace.dptr_ + num_rows * sizeof(nnvm::dim_t);
         // mark row flags
         Fill<false>(s, TBlob(prefix_sum, Shape1(num_rows), gpu::kDevMask), kWriteTo, 0);
         if (grad.storage_initialized()) {
-          Kernel<MarkRowFlgKernel, gpu>::Launch(s, grad.aux_shape(kIdx)[0],
-            prefix_sum, grad_idx);
+          Kernel<MarkRowFlgKernel, gpu>::Launch(s, grad.aux_shape(kIdx)[0], prefix_sum, grad_idx);
           // calculate inclusive prefix sum
           cub::DeviceScan::InclusiveSum(d_temp_storage,
                                         temp_storage_bytes,
@@ -112,46 +118,67 @@ void SGDMomStdUpdateDnsRspDnsImpl<gpu>(const SGDMomParam& param,
                                         mshadow::Stream<gpu>::GetStream(s));
         }
         size_t num_threads = num_rows * row_length;
-        Kernel<SGDMomStdDnsRspDnsKernel<req_type, gpu>, gpu>::Launch(s, num_threads, row_length,
-          out_data, mom_data, weight_data, grad_idx, grad_val, prefix_sum,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.momentum),
-          static_cast<DType>(param.lr), static_cast<DType>(param.wd),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<SGDMomStdDnsRspDnsKernel<req_type, gpu>, gpu>::Launch(
+            s,
+            num_threads,
+            row_length,
+            out_data,
+            mom_data,
+            weight_data,
+            grad_idx,
+            grad_val,
+            prefix_sum,
+            static_cast<DType>(param.clip_gradient),
+            static_cast<DType>(param.momentum),
+            static_cast<DType>(param.lr),
+            static_cast<DType>(param.wd),
+            static_cast<DType>(param.rescale_grad));
       });
     });
   });
 }
 
-template<int req>
+template <int req>
 struct AdamStdDnsRspDnsKernel<req, gpu> {
-  template<typename DType, typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int i, const nnvm::dim_t row_length, DType* out_data,
-    DType* mean_data, DType* var_data, const DType* weight_data, const IType* grad_idx,
-    const DType* grad_data, const RType* prefix_sum, const DType clip_gradient,
-    const DType beta1, const DType beta2, const DType lr, const DType wd,
-    const DType epsilon, const DType rescale_grad) {
+  template <typename DType, typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const nnvm::dim_t row_length,
+                                  DType* out_data,
+                                  DType* mean_data,
+                                  DType* var_data,
+                                  const DType* weight_data,
+                                  const IType* grad_idx,
+                                  const DType* grad_data,
+                                  const RType* prefix_sum,
+                                  const DType clip_gradient,
+                                  const DType beta1,
+                                  const DType beta2,
+                                  const DType lr,
+                                  const DType wd,
+                                  const DType epsilon,
+                                  const DType rescale_grad) {
     using namespace mshadow_op;
     using nnvm::dim_t;
     const dim_t row_id = i / row_length;
     const dim_t col_id = i % row_length;
-    const bool non_zero = (row_id == 0) ? prefix_sum[0] > 0
-                          : prefix_sum[row_id] > prefix_sum[row_id - 1];
+    const bool non_zero =
+        (row_id == 0) ? prefix_sum[0] > 0 : prefix_sum[row_id] > prefix_sum[row_id - 1];
     const RType grad_offset = (prefix_sum[row_id] - 1) * row_length + col_id;
-    DType grad_rescaled = non_zero ? static_cast<DType>(grad_data[grad_offset] * rescale_grad)
-                                   : static_cast<DType>(0);
+    DType grad_rescaled     = non_zero ? static_cast<DType>(grad_data[grad_offset] * rescale_grad)
+                                       : static_cast<DType>(0);
     if (clip_gradient >= 0.0f) {
       grad_rescaled = clip::Map(grad_rescaled, clip_gradient);
     }
     grad_rescaled += weight_data[i] * wd;
     mean_data[i] = beta1 * mean_data[i] + (1.f - beta1) * grad_rescaled;
-    var_data[i] = beta2 * var_data[i] +
-                  (1.f - beta2) * square::Map(grad_rescaled);
-    KERNEL_ASSIGN(out_data[i], req, weight_data[i] - lr * mean_data[i] /
-                  (square_root::Map(var_data[i]) + epsilon));
+    var_data[i]  = beta2 * var_data[i] + (1.f - beta2) * square::Map(grad_rescaled);
+    KERNEL_ASSIGN(out_data[i],
+                  req,
+                  weight_data[i] - lr * mean_data[i] / (square_root::Map(var_data[i]) + epsilon));
   }
 };
 
-template<>
+template <>
 void AdamStdUpdateDnsRspDnsImpl<gpu>(const AdamParam& param,
                                      const OpContext& ctx,
                                      const TBlob& weight,
@@ -159,12 +186,13 @@ void AdamStdUpdateDnsRspDnsImpl<gpu>(const AdamParam& param,
                                      const TBlob& mean,
                                      const TBlob& var,
                                      const OpReqType& req,
-                                     TBlob *out) {
+                                     TBlob* out) {
   using namespace mxnet_op;
   using namespace rowsparse;
   using namespace mshadow;
   Stream<gpu>* s = ctx.get_stream<gpu>();
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteInplace) << "kWriteInplace is expected for sparse adam_update";
   CHECK_GT(weight.shape_.Size(), 0);
   CHECK_GT(mean.shape_.Size(), 0);
@@ -173,33 +201,31 @@ void AdamStdUpdateDnsRspDnsImpl<gpu>(const AdamParam& param,
   MSHADOW_REAL_TYPE_SWITCH(weight.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(grad.aux_type(kIdx), IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        const DType* weight_data = weight.dptr<DType>();
-        const IType* grad_idx = grad.aux_data(kIdx).dptr<IType>();
-        const DType* grad_val = grad.data().dptr<DType>();
-        DType* mean_data = mean.dptr<DType>();
-        DType* var_data = var.dptr<DType>();
-        DType* out_data = out->dptr<DType>();
-        const nnvm::dim_t num_rows = weight.shape_[0];
+        const DType* weight_data     = weight.dptr<DType>();
+        const IType* grad_idx        = grad.aux_data(kIdx).dptr<IType>();
+        const DType* grad_val        = grad.data().dptr<DType>();
+        DType* mean_data             = mean.dptr<DType>();
+        DType* var_data              = var.dptr<DType>();
+        DType* out_data              = out->dptr<DType>();
+        const nnvm::dim_t num_rows   = weight.shape_[0];
         const nnvm::dim_t row_length = weight.shape_.ProdShape(1, weight.ndim());
-        nnvm::dim_t* prefix_sum = nullptr;
-        void* d_temp_storage = nullptr;
-        size_t temp_storage_bytes = 0;
+        nnvm::dim_t* prefix_sum      = nullptr;
+        void* d_temp_storage         = nullptr;
+        size_t temp_storage_bytes    = 0;
         cub::DeviceScan::InclusiveSum(d_temp_storage,
                                       temp_storage_bytes,
                                       prefix_sum,
                                       prefix_sum,
                                       num_rows,
                                       Stream<gpu>::GetStream(s));
-        Tensor<gpu, 1, char> workspace = ctx.requested[0]
-          .get_space_typed<gpu, 1, char>(Shape1(num_rows * sizeof(nnvm::dim_t) +
-                                         temp_storage_bytes), s);
-        prefix_sum = reinterpret_cast<nnvm::dim_t*>(workspace.dptr_);
-        d_temp_storage = workspace.dptr_ + num_rows*sizeof(nnvm::dim_t);
+        Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(
+            Shape1(num_rows * sizeof(nnvm::dim_t) + temp_storage_bytes), s);
+        prefix_sum     = reinterpret_cast<nnvm::dim_t*>(workspace.dptr_);
+        d_temp_storage = workspace.dptr_ + num_rows * sizeof(nnvm::dim_t);
         // mark row flags
         Fill<false>(s, TBlob(prefix_sum, Shape1(num_rows), gpu::kDevMask), kWriteTo, 0);
         if (grad.storage_initialized()) {
-          Kernel<MarkRowFlgKernel, gpu>::Launch(s, grad.aux_shape(kIdx)[0],
-            prefix_sum, grad_idx);
+          Kernel<MarkRowFlgKernel, gpu>::Launch(s, grad.aux_shape(kIdx)[0], prefix_sum, grad_idx);
           // calculate inclusive prefix sum
           cub::DeviceScan::InclusiveSum(d_temp_storage,
                                         temp_storage_bytes,
@@ -209,83 +235,84 @@ void AdamStdUpdateDnsRspDnsImpl<gpu>(const AdamParam& param,
                                         Stream<gpu>::GetStream(s));
         }
 
-        Kernel<AdamStdDnsRspDnsKernel<req_type, gpu>, gpu>::Launch(s, weight.shape_.Size(),
-          row_length, out_data, mean_data, var_data, weight_data, grad_idx, grad_val, prefix_sum,
-          static_cast<DType>(param.clip_gradient), static_cast<DType>(param.beta1),
-          static_cast<DType>(param.beta2), static_cast<DType>(param.lr),
-          static_cast<DType>(param.wd), static_cast<DType>(param.epsilon),
-          static_cast<DType>(param.rescale_grad));
+        Kernel<AdamStdDnsRspDnsKernel<req_type, gpu>, gpu>::Launch(
+            s,
+            weight.shape_.Size(),
+            row_length,
+            out_data,
+            mean_data,
+            var_data,
+            weight_data,
+            grad_idx,
+            grad_val,
+            prefix_sum,
+            static_cast<DType>(param.clip_gradient),
+            static_cast<DType>(param.beta1),
+            static_cast<DType>(param.beta2),
+            static_cast<DType>(param.lr),
+            static_cast<DType>(param.wd),
+            static_cast<DType>(param.epsilon),
+            static_cast<DType>(param.rescale_grad));
       });
     });
   });
 }
 
-NNVM_REGISTER_OP(signsgd_update)
-.set_attr<FCompute>("FCompute<gpu>", SignSGDUpdate<gpu>);
+NNVM_REGISTER_OP(signsgd_update).set_attr<FCompute>("FCompute<gpu>", SignSGDUpdate<gpu>);
 
-NNVM_REGISTER_OP(signum_update)
-.set_attr<FCompute>("FCompute<gpu>", SignumUpdate<gpu>);
+NNVM_REGISTER_OP(signum_update).set_attr<FCompute>("FCompute<gpu>", SignumUpdate<gpu>);
 
 NNVM_REGISTER_OP(sgd_update)
-.set_attr<FCompute>("FCompute<gpu>", SGDUpdate<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SGDUpdateEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SGDUpdate<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SGDUpdateEx<gpu>);
 
 NNVM_REGISTER_OP(sgd_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", SGDMomUpdate<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SGDMomUpdateEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SGDMomUpdate<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SGDMomUpdateEx<gpu>);
 
-NNVM_REGISTER_OP(mp_sgd_update)
-.set_attr<FCompute>("FCompute<gpu>", MP_SGDUpdate<gpu>);
+NNVM_REGISTER_OP(mp_sgd_update).set_attr<FCompute>("FCompute<gpu>", MP_SGDUpdate<gpu>);
 
-NNVM_REGISTER_OP(mp_sgd_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", MP_SGDMomUpdate<gpu>);
+NNVM_REGISTER_OP(mp_sgd_mom_update).set_attr<FCompute>("FCompute<gpu>", MP_SGDMomUpdate<gpu>);
 
 NNVM_REGISTER_OP(multi_sgd_update)
-.set_attr<FCompute>("FCompute<gpu>", MultiSGDUpdate<gpu, type_identity, 2>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSGDUpdate<gpu, type_identity, 2>);
 NNVM_REGISTER_OP(multi_sgd_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", MultiSGDMomUpdate<gpu, type_identity, 3>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSGDMomUpdate<gpu, type_identity, 3>);
 NNVM_REGISTER_OP(multi_mp_sgd_update)
-.set_attr<FCompute>("FCompute<gpu>", MultiSGDUpdate<gpu, single_precision, 3>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSGDUpdate<gpu, single_precision, 3>);
 NNVM_REGISTER_OP(multi_mp_sgd_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", MultiSGDMomUpdate<gpu, single_precision, 4>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSGDMomUpdate<gpu, single_precision, 4>);
 
-NNVM_REGISTER_OP(nag_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", NAGMomUpdate<gpu>);
+NNVM_REGISTER_OP(nag_mom_update).set_attr<FCompute>("FCompute<gpu>", NAGMomUpdate<gpu>);
 
-NNVM_REGISTER_OP(mp_nag_mom_update)
-.set_attr<FCompute>("FCompute<gpu>", MP_NAGMomUpdate<gpu>);
+NNVM_REGISTER_OP(mp_nag_mom_update).set_attr<FCompute>("FCompute<gpu>", MP_NAGMomUpdate<gpu>);
 
-NNVM_REGISTER_OP(ftml_update)
-.set_attr<FCompute>("FCompute<gpu>", FTMLUpdate<gpu>);
+NNVM_REGISTER_OP(ftml_update).set_attr<FCompute>("FCompute<gpu>", FTMLUpdate<gpu>);
 
 NNVM_REGISTER_OP(adam_update)
-.set_attr<FCompute>("FCompute<gpu>", AdamUpdate<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", AdamUpdateEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", AdamUpdate<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", AdamUpdateEx<gpu>);
 
-NNVM_REGISTER_OP(rmsprop_update)
-.set_attr<FCompute>("FCompute<gpu>", RMSPropUpdate<gpu>);
+NNVM_REGISTER_OP(rmsprop_update).set_attr<FCompute>("FCompute<gpu>", RMSPropUpdate<gpu>);
 
-NNVM_REGISTER_OP(rmspropalex_update)
-.set_attr<FCompute>("FCompute<gpu>", RMSPropAlexUpdate<gpu>);
+NNVM_REGISTER_OP(rmspropalex_update).set_attr<FCompute>("FCompute<gpu>", RMSPropAlexUpdate<gpu>);
 
 NNVM_REGISTER_OP(ftrl_update)
-.set_attr<FCompute>("FCompute<gpu>", FtrlUpdate<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", FtrlUpdateEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", FtrlUpdate<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", FtrlUpdateEx<gpu>);
 
 NNVM_REGISTER_OP(_sparse_adagrad_update)
-.set_attr<FComputeEx>("FComputeEx<gpu>", AdagradUpdateEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", AdagradUpdateEx<gpu>);
 
-NNVM_REGISTER_OP(lamb_update_phase1)
-.set_attr<FCompute>("FCompute<gpu>", LambUpdatePhaseOne<gpu>);
+NNVM_REGISTER_OP(lamb_update_phase1).set_attr<FCompute>("FCompute<gpu>", LambUpdatePhaseOne<gpu>);
 
-NNVM_REGISTER_OP(lamb_update_phase2)
-.set_attr<FCompute>("FCompute<gpu>", LambUpdatePhaseTwo<gpu>);
+NNVM_REGISTER_OP(lamb_update_phase2).set_attr<FCompute>("FCompute<gpu>", LambUpdatePhaseTwo<gpu>);
 
 NNVM_REGISTER_OP(mp_lamb_update_phase1)
-.set_attr<FCompute>("FCompute<gpu>", MPLambUpdatePhaseOne<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", MPLambUpdatePhaseOne<gpu>);
 
 NNVM_REGISTER_OP(mp_lamb_update_phase2)
-.set_attr<FCompute>("FCompute<gpu>", MPLambUpdatePhaseTwo<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", MPLambUpdatePhaseTwo<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/pad-inl.h b/src/operator/pad-inl.h
index 9699c19ae064..cdd36cbcd0c0 100644
--- a/src/operator/pad-inl.h
+++ b/src/operator/pad-inl.h
@@ -22,7 +22,7 @@
  * \file pad-inl.h
  * \brief
  * \author Sebastian Bodenstien
-*/
+ */
 
 #ifndef MXNET_OPERATOR_PAD_INL_H_
 #define MXNET_OPERATOR_PAD_INL_H_
@@ -45,7 +45,7 @@ namespace pad_enum {
 enum PadOpInputs { kData };
 enum PadOpType { kConstant, kEdge, kReflect };
 enum PadOpOutputs { kOut };
-}
+}  // namespace pad_enum
 
 struct PadParam : public dmlc::Parameter<PadParam> {
   int mode;
@@ -77,88 +77,81 @@ struct PadParam : public dmlc::Parameter<PadParam> {
 template <typename xpu, typename DType>
 class PadOp : public Operator {
  public:
-  explicit PadOp(PadParam p) { this->param_ = p; }
+  explicit PadOp(PadParam p) {
+    this->param_ = p;
+  }
 
-  virtual void Forward(const OpContext &ctx, const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // Get any size input + output into required form
-    int rank = in_data[pad_enum::kData].ndim();
-    auto pad = param_.pad_width;
+    int rank             = in_data[pad_enum::kData].ndim();
+    auto pad             = param_.pad_width;
     DType constant_value = param_.constant_value;
     // TODO(nswamy@): update the documentation and log below when support is added for more than
     // 4D/5D arrays and not requiring higher dimensions to be zero.
     switch (rank) {
-      case 4:
-        {
-          Tensor<xpu, 4, DType> data =
-            in_data[pad_enum::kData].get<xpu, 4, DType>(s);
-          Tensor<xpu, 4, DType> out =
-            out_data[pad_enum::kOut].get<xpu, 4, DType>(s);
-          pad_image(out, data, param_.pad_width, param_.mode, constant_value);
-          break;
-        }
-      case 5:
-        {
-          Tensor<xpu, 5, DType> data =
-            in_data[pad_enum::kData].get<xpu, 5, DType>(s);
-          Tensor<xpu, 5, DType> out =
-            out_data[pad_enum::kOut].get<xpu, 5, DType>(s);
-          pad_image(out, data, param_.pad_width, param_.mode, constant_value);
-          break;
-        }
+      case 4: {
+        Tensor<xpu, 4, DType> data = in_data[pad_enum::kData].get<xpu, 4, DType>(s);
+        Tensor<xpu, 4, DType> out  = out_data[pad_enum::kOut].get<xpu, 4, DType>(s);
+        pad_image(out, data, param_.pad_width, param_.mode, constant_value);
+        break;
+      }
+      case 5: {
+        Tensor<xpu, 5, DType> data = in_data[pad_enum::kData].get<xpu, 5, DType>(s);
+        Tensor<xpu, 5, DType> out  = out_data[pad_enum::kOut].get<xpu, 5, DType>(s);
+        pad_image(out, data, param_.pad_width, param_.mode, constant_value);
+        break;
+      }
       default:
         LOG(FATAL) << "Attempted to run forward pass "
-                        "with input dimensions other than 4 or 5.";
+                      "with input dimensions other than 4 or 5.";
     }
     // Assign(out, req[pad_enum::kOut], F<mshadow_op::identity>(data));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // Get any size input + output into required form
     auto pad = param_.pad_width;
     int rank = in_grad[pad_enum::kData].ndim();
     switch (rank) {
-      case 4:
-        {
-          Tensor<xpu, 4, DType> in =
-            in_grad[pad_enum::kData].get<xpu, 4, DType>(s);
-          Tensor<xpu, 4, DType> out =
-            out_grad[pad_enum::kOut].get<xpu, 4, DType>(s);
-          if (req[pad_enum::kData] == kWriteTo) in = 0.0f;
-          pad_image_grad(in, out, param_.pad_width, param_.mode);
-          break;
-        }
-      case 5:
-        {
-          Tensor<xpu, 5, DType> in =
-            in_grad[pad_enum::kData].get<xpu, 5, DType>(s);
-          Tensor<xpu, 5, DType> out =
-            out_grad[pad_enum::kOut].get<xpu, 5, DType>(s);
-          if (req[pad_enum::kData] == kWriteTo) in = 0.0f;
-          pad_image_grad(in, out, param_.pad_width, param_.mode);
-          break;
-        }
+      case 4: {
+        Tensor<xpu, 4, DType> in  = in_grad[pad_enum::kData].get<xpu, 4, DType>(s);
+        Tensor<xpu, 4, DType> out = out_grad[pad_enum::kOut].get<xpu, 4, DType>(s);
+        if (req[pad_enum::kData] == kWriteTo)
+          in = 0.0f;
+        pad_image_grad(in, out, param_.pad_width, param_.mode);
+        break;
+      }
+      case 5: {
+        Tensor<xpu, 5, DType> in  = in_grad[pad_enum::kData].get<xpu, 5, DType>(s);
+        Tensor<xpu, 5, DType> out = out_grad[pad_enum::kOut].get<xpu, 5, DType>(s);
+        if (req[pad_enum::kData] == kWriteTo)
+          in = 0.0f;
+        pad_image_grad(in, out, param_.pad_width, param_.mode);
+        break;
+      }
       default:
         LOG(FATAL) << "Attempted to run backward pass "
-                        "with input dimensions other than 4 or 5.";
+                      "with input dimensions other than 4 or 5.";
     }
   }
 
@@ -167,21 +160,28 @@ class PadOp : public Operator {
 };  // class PadOp
 
 template <typename xpu>
-Operator *CreateOp(PadParam param, int dtype);
+Operator* CreateOp(PadParam param, int dtype);
 
 #if DMLC_USE_CXX11
 class PadProp : public OperatorProperty {
  public:
-  int NumVisibleOutputs() const override { return 1; }
+  int NumVisibleOutputs() const override {
+    return 1;
+  }
 
-  int NumOutputs() const override { return 1; }
+  int NumOutputs() const override {
+    return 1;
+  }
 
-  std::vector<std::string> ListArguments() const override { return {"data"}; }
+  std::vector<std::string> ListArguments() const override {
+    return {"data"};
+  }
 
-  std::vector<std::string> ListOutputs() const override { return {"output"}; }
+  std::vector<std::string> ListOutputs() const override {
+    return {"output"};
+  }
 
-  void Init(const std::vector<std::pair<std::string, std::string> > &kwargs)
-      override {
+  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.Init(kwargs);
   }
 
@@ -189,9 +189,9 @@ class PadProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     int dtype = (*in_type)[0];
     type_assign(&dtype, (*out_type)[0]);
 
@@ -200,66 +200,70 @@ class PadProp : public OperatorProperty {
     return dtype != -1;
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1U) << "Can only be one input to symbol.";
 
-    const mxnet::TShape &dshape = (*in_shape)[pad_enum::kData];
+    const mxnet::TShape& dshape = (*in_shape)[pad_enum::kData];
 
-    auto rank = dshape.ndim();
-    auto pad = param_.pad_width;
+    auto rank         = dshape.ndim();
+    auto pad          = param_.pad_width;
     auto pad_spec_len = param_.pad_width.ndim();
 
-    if (rank == 0) return false;
+    if (rank == 0)
+      return false;
     if ((rank != 4) && (rank != 5)) {
       LOG(FATAL) << "Current implementation only supports 4-D or 5-D input.";
     }
     if ((pad[0] != 0) || (pad[1] != 0) || (pad[2] != 0) || (pad[3] != 0)) {
       LOG(FATAL) << "Current implementation expects padding on the first two axes to be zero.";
     }
-    if ((2*rank) != pad_spec_len) {
+    if ((2 * rank) != pad_spec_len) {
       LOG(FATAL) << "Input shape vs padding spec mismatch.";
     }
     if (param_.mode == pad_enum::kReflect) {
       auto size = dshape.data();
-      if ((pad[4] >= size[2]) || (pad[5] >= size[2]) ||
-            (pad[6] >= size[3]) || (pad[7] >= size[3])) {
+      if ((pad[4] >= size[2]) || (pad[5] >= size[2]) || (pad[6] >= size[3]) ||
+          (pad[7] >= size[3])) {
         LOG(FATAL) << "Current implementation of reflection padding "
-                        "only supports padding sizes smaller than the input size.";
+                      "only supports padding sizes smaller than the input size.";
       }
     }
     mxnet::TShape oshape = dshape;
     for (int i = 0; i < dshape.ndim(); ++i) {
-      oshape[i] =
-          param_.pad_width[2 * i] + param_.pad_width[2 * i + 1] + dshape[i];
+      oshape[i] = param_.pad_width[2 * i] + param_.pad_width[2 * i + 1] + dshape[i];
     }
     out_shape->clear();
     out_shape->push_back(oshape);
     return true;
   }
 
-  OperatorProperty *Copy() const override {
-    auto ptr = new PadProp();
+  OperatorProperty* Copy() const override {
+    auto ptr    = new PadProp();
     ptr->param_ = param_;
     return ptr;
   }
 
-  std::string TypeString() const override { return "Pad"; }
+  std::string TypeString() const override {
+    return "Pad";
+  }
 
-  std::vector<int> DeclareBackwardDependency(
-      const std::vector<int> &out_grad, const std::vector<int> &in_data,
-      const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[pad_enum::kOut]};
   }
 
-  Operator *CreateOperator(Context ctx) const override {
+  Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator *CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   PadParam param_;
diff --git a/src/operator/pad.cc b/src/operator/pad.cc
index da59ae70541a..3dfe2d8924b7 100644
--- a/src/operator/pad.cc
+++ b/src/operator/pad.cc
@@ -22,7 +22,7 @@
  * \file pad.cc
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 #include "./pad-inl.h"
 
 namespace mshadow {
@@ -35,20 +35,21 @@ namespace mshadow {
 // https://github.com/torch/nn/blob/master/lib/THNN/generic/SpatialReplicationPadding.c
 template <typename DType>
 void single_image_edge(const Tensor<cpu, 3, DType> dst,
-                       const Tensor<cpu, 3, DType> src, mxnet::TShape pad) {
-  const int nslices = src.size(0);
+                       const Tensor<cpu, 3, DType> src,
+                       mxnet::TShape pad) {
+  const int nslices     = src.size(0);
   const index_t iheight = src.size(1);
-  const index_t iwidth = src.size(2);
+  const index_t iwidth  = src.size(2);
 
   const index_t oheight = dst.size(1);
-  const index_t owidth = dst.size(2);
+  const index_t owidth  = dst.size(2);
 
   const index_t pad_t = pad[4];
   const index_t pad_l = pad[6];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
 
   index_t k, ip_x, ip_y;
 #pragma omp parallel for private(k, ip_x, ip_y)
@@ -73,31 +74,31 @@ void single_image_edge(const Tensor<cpu, 3, DType> dst,
         }
         ip_y = ip_y - oStartY + iStartY;
 
-        DType *dest_p = dst.dptr_ + k * owidth * oheight + i * owidth + j;
-        DType *src_p = src.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
-        *dest_p = *src_p;
+        DType* dest_p = dst.dptr_ + k * owidth * oheight + i * owidth + j;
+        DType* src_p  = src.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
+        *dest_p       = *src_p;
       }
     }
   }
 }
 
 template <typename DType>
-void single_image_edge_grad(const Tensor<cpu, 3, DType> &grad_in,
+void single_image_edge_grad(const Tensor<cpu, 3, DType>& grad_in,
                             const Tensor<cpu, 3, DType> grad_out,
                             mxnet::TShape pad) {
-  const int nslices = grad_in.size(0);
+  const int nslices     = grad_in.size(0);
   const index_t iheight = grad_in.size(1);
-  const index_t iwidth = grad_in.size(2);
+  const index_t iwidth  = grad_in.size(2);
 
   const index_t oheight = grad_out.size(1);
-  const index_t owidth = grad_out.size(2);
+  const index_t owidth  = grad_out.size(2);
 
   const index_t pad_t = pad[4];
   const index_t pad_l = pad[6];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
 
   index_t k, ip_x, ip_y;
 #pragma omp parallel for private(k, ip_x, ip_y)
@@ -123,9 +124,8 @@ void single_image_edge_grad(const Tensor<cpu, 3, DType> &grad_in,
         }
         ip_y = ip_y - oStartY + iStartY;
 
-        DType *src_p = grad_out.dptr_ + k * owidth * oheight + i * owidth + j;
-        DType *dest_p =
-            grad_in.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
+        DType* src_p  = grad_out.dptr_ + k * owidth * oheight + i * owidth + j;
+        DType* dest_p = grad_in.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
         *dest_p += *src_p;
       }
     }
@@ -134,8 +134,9 @@ void single_image_edge_grad(const Tensor<cpu, 3, DType> &grad_in,
 
 // Case 2: Zero Padding
 template <typename DType>
-void single_image_constant(const Tensor<cpu, 3, DType> &dst,
-                           const Tensor<cpu, 3, DType> src, mxnet::TShape pad,
+void single_image_constant(const Tensor<cpu, 3, DType>& dst,
+                           const Tensor<cpu, 3, DType> src,
+                           mxnet::TShape pad,
                            DType constant_value) {
   const index_t pad_t = pad[4];
   const index_t pad_l = pad[6];
@@ -150,8 +151,7 @@ void single_image_constant(const Tensor<cpu, 3, DType> &dst,
   for (c = 0; c < dst0; ++c) {
     for (h = 0; h < dst1; ++h) {
       for (w = 0; w < dst2; ++w) {
-        if ((w < pad_l) || (h < pad_t) || (h >= (src1 + pad_t)) ||
-            (w >= (src2 + pad_l))) {
+        if ((w < pad_l) || (h < pad_t) || (h >= (src1 + pad_t)) || (w >= (src2 + pad_l))) {
           dst[c][h][w] = constant_value;
         } else {
           dst[c][h][w] = src[c][h - pad_t][w - pad_l];
@@ -162,7 +162,7 @@ void single_image_constant(const Tensor<cpu, 3, DType> &dst,
 }
 
 template <typename DType>
-void single_image_constant_grad(const Tensor<cpu, 3, DType> &in_grad,
+void single_image_constant_grad(const Tensor<cpu, 3, DType>& in_grad,
                                 const Tensor<cpu, 3, DType> out_grad,
                                 mxnet::TShape pad) {
   const index_t pad_t = pad[4];
@@ -184,21 +184,22 @@ void single_image_constant_grad(const Tensor<cpu, 3, DType> &in_grad,
 
 // Case 3: Reflection Padding
 template <typename DType>
-void single_image_reflect(const Tensor<cpu, 3, DType> &dst,
-                           const Tensor<cpu, 3, DType> src, mxnet::TShape pad) {
-  const int nslices = src.size(0);
+void single_image_reflect(const Tensor<cpu, 3, DType>& dst,
+                          const Tensor<cpu, 3, DType> src,
+                          mxnet::TShape pad) {
+  const int nslices     = src.size(0);
   const index_t iheight = src.size(1);
-  const index_t iwidth = src.size(2);
+  const index_t iwidth  = src.size(2);
 
   const index_t oheight = dst.size(1);
-  const index_t owidth = dst.size(2);
+  const index_t owidth  = dst.size(2);
 
   const index_t pad_t = pad[4];
   const index_t pad_l = pad[6];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
 
   index_t k, ip_x, ip_y;
 #pragma omp parallel for private(k, ip_x, ip_y)
@@ -225,31 +226,31 @@ void single_image_reflect(const Tensor<cpu, 3, DType> &dst,
         }
         ip_y = ip_y - oStartY + iStartY;
 
-        DType *dest_p = dst.dptr_ + k * owidth * oheight + i * owidth + j;
-        DType *src_p = src.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
-        *dest_p = *src_p;
+        DType* dest_p = dst.dptr_ + k * owidth * oheight + i * owidth + j;
+        DType* src_p  = src.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
+        *dest_p       = *src_p;
       }
     }
   }
 }
 
 template <typename DType>
-void single_image_reflect_grad(const Tensor<cpu, 3, DType> &grad_in,
-                            const Tensor<cpu, 3, DType> grad_out,
-                            mxnet::TShape pad) {
-  const int nslices = grad_in.size(0);
+void single_image_reflect_grad(const Tensor<cpu, 3, DType>& grad_in,
+                               const Tensor<cpu, 3, DType> grad_out,
+                               mxnet::TShape pad) {
+  const int nslices     = grad_in.size(0);
   const index_t iheight = grad_in.size(1);
-  const index_t iwidth = grad_in.size(2);
+  const index_t iwidth  = grad_in.size(2);
 
   const index_t oheight = grad_out.size(1);
-  const index_t owidth = grad_out.size(2);
+  const index_t owidth  = grad_out.size(2);
 
   const index_t pad_t = pad[4];
   const index_t pad_l = pad[6];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
 
   index_t k, ip_x, ip_y;
 #pragma omp parallel for private(k, ip_x, ip_y)
@@ -276,8 +277,8 @@ void single_image_reflect_grad(const Tensor<cpu, 3, DType> &grad_in,
         }
         ip_y = ip_y - oStartY + iStartY;
 
-        DType *src_p = grad_out.dptr_ + k * owidth * oheight + i * owidth + j;
-        DType *dest_p = grad_in.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
+        DType* src_p  = grad_out.dptr_ + k * owidth * oheight + i * owidth + j;
+        DType* dest_p = grad_in.dptr_ + k * iwidth * iheight + ip_y * iwidth + ip_x;
         *dest_p += *src_p;
       }
     }
@@ -292,25 +293,26 @@ void single_image_reflect_grad(const Tensor<cpu, 3, DType> &grad_in,
 // https://github.com/torch/nn/blob/master/lib/THNN/generic/VolumetricReplicationPadding.c
 template <typename DType>
 void single_image_edge(const Tensor<cpu, 4, DType> dst,
-                       const Tensor<cpu, 4, DType> src, mxnet::TShape pad) {
-  const int nslices = src.size(0);
-  const index_t idepth = src.size(1);
+                       const Tensor<cpu, 4, DType> src,
+                       mxnet::TShape pad) {
+  const int nslices     = src.size(0);
+  const index_t idepth  = src.size(1);
   const index_t iheight = src.size(2);
-  const index_t iwidth = src.size(3);
+  const index_t iwidth  = src.size(3);
 
-  const index_t odepth = dst.size(1);
+  const index_t odepth  = dst.size(1);
   const index_t oheight = dst.size(2);
-  const index_t owidth = dst.size(3);
+  const index_t owidth  = dst.size(3);
 
   const index_t pad_f = pad[4];
   const index_t pad_t = pad[6];
   const index_t pad_l = pad[8];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t iStartZ = std::max(index_t{0}, -pad_f);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
-  index_t oStartZ = std::max(index_t{0}, pad_f);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t iStartZ     = std::max(index_t{0}, -pad_f);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
+  index_t oStartZ     = std::max(index_t{0}, pad_f);
 
   index_t k, ip_x, ip_y, ip_z;
 #pragma omp parallel for private(k, ip_x, ip_y, ip_z)
@@ -346,10 +348,10 @@ void single_image_edge(const Tensor<cpu, 4, DType> dst,
           }
           ip_z = ip_z - oStartZ + iStartZ;
 
-          DType *dest_p = dst.dptr_ + k * owidth * oheight * odepth +
-                          z * owidth * oheight + i * owidth + j;
-          DType *src_p = src.dptr_ + k * iwidth * iheight * idepth +
-                         ip_z * iwidth * iheight + ip_y * iwidth + ip_x;
+          DType* dest_p =
+              dst.dptr_ + k * owidth * oheight * odepth + z * owidth * oheight + i * owidth + j;
+          DType* src_p = src.dptr_ + k * iwidth * iheight * idepth + ip_z * iwidth * iheight +
+                         ip_y * iwidth + ip_x;
           *dest_p = *src_p;
         }
       }
@@ -358,27 +360,27 @@ void single_image_edge(const Tensor<cpu, 4, DType> dst,
 }
 
 template <typename DType>
-void single_image_edge_grad(const Tensor<cpu, 4, DType> &grad_in,
+void single_image_edge_grad(const Tensor<cpu, 4, DType>& grad_in,
                             const Tensor<cpu, 4, DType> grad_out,
                             mxnet::TShape pad) {
-  const int nslices = grad_in.size(0);
-  const index_t idepth = grad_in.size(1);
+  const int nslices     = grad_in.size(0);
+  const index_t idepth  = grad_in.size(1);
   const index_t iheight = grad_in.size(2);
-  const index_t iwidth = grad_in.size(3);
+  const index_t iwidth  = grad_in.size(3);
 
-  const index_t odepth = grad_out.size(1);
+  const index_t odepth  = grad_out.size(1);
   const index_t oheight = grad_out.size(2);
-  const index_t owidth = grad_out.size(3);
+  const index_t owidth  = grad_out.size(3);
 
   const index_t pad_f = pad[4];
   const index_t pad_t = pad[6];
   const index_t pad_l = pad[8];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t iStartZ = std::max(index_t{0}, -pad_f);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
-  index_t oStartZ = std::max(index_t{0}, pad_f);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t iStartZ     = std::max(index_t{0}, -pad_f);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
+  index_t oStartZ     = std::max(index_t{0}, pad_f);
 
   index_t k, ip_x, ip_y, ip_z;
 #pragma omp parallel for private(k, ip_x, ip_y, ip_z)
@@ -414,10 +416,10 @@ void single_image_edge_grad(const Tensor<cpu, 4, DType> &grad_in,
           }
           ip_z = ip_z - oStartZ + iStartZ;
 
-          DType *src_p = grad_out.dptr_ + k * owidth * oheight * odepth +
-                         z * owidth * oheight + i * owidth + j;
-          DType *dest_p = grad_in.dptr_ + k * iwidth * iheight * idepth +
-                          ip_z * iwidth * iheight + ip_y * iwidth + ip_x;
+          DType* src_p = grad_out.dptr_ + k * owidth * oheight * odepth + z * owidth * oheight +
+                         i * owidth + j;
+          DType* dest_p = grad_in.dptr_ + k * iwidth * iheight * idepth + ip_z * iwidth * iheight +
+                          ip_y * iwidth + ip_x;
           *dest_p += *src_p;
         }
       }
@@ -427,8 +429,9 @@ void single_image_edge_grad(const Tensor<cpu, 4, DType> &grad_in,
 
 // Case 2: Zero Padding
 template <typename DType>
-void single_image_constant(const Tensor<cpu, 4, DType> &dst,
-                           const Tensor<cpu, 4, DType> src, mxnet::TShape pad,
+void single_image_constant(const Tensor<cpu, 4, DType>& dst,
+                           const Tensor<cpu, 4, DType> src,
+                           mxnet::TShape pad,
                            DType constant_value) {
   const index_t pad_f = pad[4];
   const index_t pad_t = pad[6];
@@ -448,9 +451,8 @@ void single_image_constant(const Tensor<cpu, 4, DType> &dst,
     for (d = 0; d < dst1; ++d) {
       for (h = 0; h < dst2; ++h) {
         for (w = 0; w < dst3; ++w) {
-          if ((w < pad_l) || (h < pad_t) || (d < pad_f) ||
-              (d >= (src1 + pad_f)) || (h >= (src2 + pad_t)) ||
-              (w >= (src3 + pad_l))) {
+          if ((w < pad_l) || (h < pad_t) || (d < pad_f) || (d >= (src1 + pad_f)) ||
+              (h >= (src2 + pad_t)) || (w >= (src3 + pad_l))) {
             dst[c][d][h][w] = constant_value;
           } else {
             dst[c][d][h][w] = src[c][d - pad_f][h - pad_t][w - pad_l];
@@ -462,18 +464,18 @@ void single_image_constant(const Tensor<cpu, 4, DType> &dst,
 }
 
 template <typename DType>
-void single_image_constant_grad(const Tensor<cpu, 4, DType> &in_grad,
+void single_image_constant_grad(const Tensor<cpu, 4, DType>& in_grad,
                                 const Tensor<cpu, 4, DType> out_grad,
                                 mxnet::TShape pad) {
-  const index_t pad_f = pad[4];
-  const index_t pad_t = pad[6];
-  const index_t pad_l = pad[8];
+  const index_t pad_f    = pad[4];
+  const index_t pad_t    = pad[6];
+  const index_t pad_l    = pad[8];
   const index_t in_grad0 = in_grad.size(0);
   const index_t in_grad1 = in_grad.size(1);
   const index_t in_grad2 = in_grad.size(2);
   const index_t in_grad3 = in_grad.size(3);
   index_t c, d, w, h;
-  #pragma omp parallel for private(c, d, w, h)
+#pragma omp parallel for private(c, d, w, h)
   for (c = 0; c < in_grad0; ++c) {
     for (d = 0; d < in_grad1; ++d) {
       for (h = 0; h < in_grad2; ++h) {
@@ -487,26 +489,27 @@ void single_image_constant_grad(const Tensor<cpu, 4, DType> &in_grad,
 
 // Case 3: Reflection Padding
 template <typename DType>
-void single_image_reflect(const Tensor<cpu, 4, DType> &dst,
-                           const Tensor<cpu, 4, DType> src, mxnet::TShape pad) {
-  const int nslices = src.size(0);
-  const index_t idepth = src.size(1);
+void single_image_reflect(const Tensor<cpu, 4, DType>& dst,
+                          const Tensor<cpu, 4, DType> src,
+                          mxnet::TShape pad) {
+  const int nslices     = src.size(0);
+  const index_t idepth  = src.size(1);
   const index_t iheight = src.size(2);
-  const index_t iwidth = src.size(3);
+  const index_t iwidth  = src.size(3);
 
-  const index_t odepth = dst.size(1);
+  const index_t odepth  = dst.size(1);
   const index_t oheight = dst.size(2);
-  const index_t owidth = dst.size(3);
+  const index_t owidth  = dst.size(3);
 
   const index_t pad_f = pad[4];
   const index_t pad_t = pad[6];
   const index_t pad_l = pad[8];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t iStartZ = std::max(index_t{0}, -pad_f);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
-  index_t oStartZ = std::max(index_t{0}, pad_f);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t iStartZ     = std::max(index_t{0}, -pad_f);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
+  index_t oStartZ     = std::max(index_t{0}, pad_f);
 
   index_t l, ip_x, ip_y, ip_z;
 #pragma omp parallel for private(l, ip_x, ip_y, ip_z)
@@ -542,10 +545,10 @@ void single_image_reflect(const Tensor<cpu, 4, DType> &dst,
           }
           ip_z = ip_z - oStartZ + iStartZ;
 
-          DType *dest_p = dst.dptr_ + l * owidth * oheight * odepth +
-                          k * owidth * oheight + i * owidth + j;
-          DType *src_p = src.dptr_ + l * iwidth * iheight * idepth +
-                         ip_z * iwidth * iheight + ip_y * iwidth + ip_x;
+          DType* dest_p =
+              dst.dptr_ + l * owidth * oheight * odepth + k * owidth * oheight + i * owidth + j;
+          DType* src_p = src.dptr_ + l * iwidth * iheight * idepth + ip_z * iwidth * iheight +
+                         ip_y * iwidth + ip_x;
           *dest_p = *src_p;
         }
       }
@@ -554,30 +557,30 @@ void single_image_reflect(const Tensor<cpu, 4, DType> &dst,
 }
 
 template <typename DType>
-void single_image_reflect_grad(const Tensor<cpu, 4, DType> &grad_in,
-                                const Tensor<cpu, 4, DType> grad_out,
-                                mxnet::TShape pad) {
-  const int nslices = grad_in.size(0);
-  const index_t idepth = grad_in.size(1);
+void single_image_reflect_grad(const Tensor<cpu, 4, DType>& grad_in,
+                               const Tensor<cpu, 4, DType> grad_out,
+                               mxnet::TShape pad) {
+  const int nslices     = grad_in.size(0);
+  const index_t idepth  = grad_in.size(1);
   const index_t iheight = grad_in.size(2);
-  const index_t iwidth = grad_in.size(3);
+  const index_t iwidth  = grad_in.size(3);
 
-  const index_t odepth = grad_out.size(1);
+  const index_t odepth  = grad_out.size(1);
   const index_t oheight = grad_out.size(2);
-  const index_t owidth = grad_out.size(3);
+  const index_t owidth  = grad_out.size(3);
 
   const index_t pad_f = pad[4];
   const index_t pad_t = pad[6];
   const index_t pad_l = pad[8];
-  index_t iStartX = std::max(index_t{0}, -pad_l);
-  index_t iStartY = std::max(index_t{0}, -pad_t);
-  index_t iStartZ = std::max(index_t{0}, -pad_f);
-  index_t oStartX = std::max(index_t{0}, pad_l);
-  index_t oStartY = std::max(index_t{0}, pad_t);
-  index_t oStartZ = std::max(index_t{0}, pad_f);
+  index_t iStartX     = std::max(index_t{0}, -pad_l);
+  index_t iStartY     = std::max(index_t{0}, -pad_t);
+  index_t iStartZ     = std::max(index_t{0}, -pad_f);
+  index_t oStartX     = std::max(index_t{0}, pad_l);
+  index_t oStartY     = std::max(index_t{0}, pad_t);
+  index_t oStartZ     = std::max(index_t{0}, pad_f);
 
   index_t l, ip_x, ip_y, ip_z;
-/*#pragma omp parallel for private(l, ip_x, ip_y, ip_z)*/
+  /*#pragma omp parallel for private(l, ip_x, ip_y, ip_z)*/
   for (l = 0; l < nslices; l++) {
     index_t i, j, k;
     for (k = 0; k < odepth; k++) {
@@ -610,10 +613,10 @@ void single_image_reflect_grad(const Tensor<cpu, 4, DType> &grad_in,
           }
           ip_z = ip_z - oStartZ + iStartZ;
 
-          DType *src_p = grad_out.dptr_ + l * owidth * oheight * odepth +
-                         k * owidth * oheight + i * owidth + j;
-          DType *dest_p = grad_in.dptr_ + l * iwidth * iheight * idepth +
-                          ip_z * iwidth * iheight + ip_y * iwidth + ip_x;
+          DType* src_p = grad_out.dptr_ + l * owidth * oheight * odepth + k * owidth * oheight +
+                         i * owidth + j;
+          DType* dest_p = grad_in.dptr_ + l * iwidth * iheight * idepth + ip_z * iwidth * iheight +
+                          ip_y * iwidth + ip_x;
           *dest_p += *src_p;
         }
       }
@@ -625,8 +628,10 @@ void single_image_reflect_grad(const Tensor<cpu, 4, DType> &grad_in,
 // Interface to 2d and 3d image pad methods
 
 template <int dim, typename DType>
-void pad_image(const Tensor<cpu, dim, DType> &dst,
-               const Tensor<cpu, dim, DType> src, mxnet::TShape pad, int mode,
+void pad_image(const Tensor<cpu, dim, DType>& dst,
+               const Tensor<cpu, dim, DType> src,
+               mxnet::TShape pad,
+               int mode,
                DType constant_value) {
   for (index_t n = 0; n < dst.size(0); ++n) {
     switch (mode) {
@@ -644,8 +649,9 @@ void pad_image(const Tensor<cpu, dim, DType> &dst,
 }
 
 template <int dim, typename DType>
-void pad_image_grad(const Tensor<cpu, dim, DType> &in_grad,
-                    const Tensor<cpu, dim, DType> out_grad, mxnet::TShape pad,
+void pad_image_grad(const Tensor<cpu, dim, DType>& in_grad,
+                    const Tensor<cpu, dim, DType> out_grad,
+                    mxnet::TShape pad,
                     int mode) {
   for (index_t n = 0; n < in_grad.size(0); ++n) {
     switch (mode) {
@@ -667,22 +673,23 @@ void pad_image_grad(const Tensor<cpu, dim, DType> &in_grad,
 namespace mxnet {
 namespace op {
 template <>
-Operator *CreateOp<cpu>(PadParam param, int dtype) {
-  Operator *op = nullptr;
+Operator* CreateOp<cpu>(PadParam param, int dtype) {
+  Operator* op = nullptr;
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new PadOp<cpu, DType>(param); })
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *PadProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                    std::vector<int> *in_type) const {
+Operator* PadProp::CreateOperatorEx(Context ctx,
+                                    mxnet::ShapeVector* in_shape,
+                                    std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(PadParam);
 
 MXNET_REGISTER_OP_PROPERTY(Pad, PadProp)
-.describe(R"code(Pads an input array with a constant or edge values of the array.
+    .describe(R"code(Pads an input array with a constant or edge values of the array.
 
 .. note:: `Pad` is deprecated. Use `pad` instead.
 
@@ -764,12 +771,10 @@ Example::
 
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "An n-dimensional input array.")
-.add_arguments(PadParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "An n-dimensional input array.")
+    .add_arguments(PadParam::__FIELDS__());
 
-NNVM_REGISTER_OP(Pad)
-.add_alias("pad")
-.add_alias("_npx_pad");
+NNVM_REGISTER_OP(Pad).add_alias("pad").add_alias("_npx_pad");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/pad.cu b/src/operator/pad.cu
index 8d82ba337fdd..6bc01bc3b9c0 100644
--- a/src/operator/pad.cu
+++ b/src/operator/pad.cu
@@ -22,7 +22,7 @@
  * \file pad.cu
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 #include <algorithm>
 #include "./pad-inl.h"
 #include "../common/cuda/utils.h"
@@ -40,10 +40,11 @@ namespace cuda {
 template <int n_bits, typename DType>
 __global__ void image_2d_pad_edge_kernel(Tensor<gpu, 4, DType> dst,
                                          const Tensor<gpu, 4, DType> src,
-                                         const int padT, const int padL) {
+                                         const int padT,
+                                         const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= dst.size(2) * dst.size(3)) {
     return;
   }
@@ -60,14 +61,14 @@ __global__ void image_2d_pad_edge_kernel(Tensor<gpu, 4, DType> dst,
   int inputPointY =
       min(max(padT, outputPointY), static_cast<int>(src.size(2)) + padT - 1) - oStartY + iStartY;
 
-  DType valueToCopy = src[batch][plane][inputPointY][inputPointX];
+  DType valueToCopy                             = src[batch][plane][inputPointY][inputPointX];
   dst[batch][plane][outputPointY][outputPointX] = valueToCopy;
 }
 
 template <typename DType>
 inline void image_pad_edge(Tensor<gpu, 4, DType> dst,
-                           const Tensor<gpu, 4, DType> &src,
-                           const mxnet::TShape &pad) {
+                           const Tensor<gpu, 4, DType>& src,
+                           const mxnet::TShape& pad) {
   const int padT = pad[4];
   const int padL = pad[6];
   dim3 dimBlock(kBaseThreadNum);
@@ -75,29 +76,29 @@ inline void image_pad_edge(Tensor<gpu, 4, DType> dst,
   dim3 dimGrid(xGridSize, dst.size(1), dst.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  image_2d_pad_edge_kernel<kBaseThreadBits,
-                           DType><<<dimGrid, dimBlock, 0, stream>>>(dst, src,
-                                                                    padT, padL);
+  image_2d_pad_edge_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(dst, src, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_2d_pad_edge_kernel);
 }
 
 template <int n_bits, typename DType>
-__global__ void image_2d_pad_edge_grad_kernel(
-    Tensor<gpu, 4, DType> grad_in, const Tensor<gpu, 4, DType> grad_out,
-    const int padT, const int padL) {
+__global__ void image_2d_pad_edge_grad_kernel(Tensor<gpu, 4, DType> grad_in,
+                                              const Tensor<gpu, 4, DType> grad_out,
+                                              const int padT,
+                                              const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= grad_out.size(2) * grad_out.size(3)) {
     return;
   }
   int outputPointX = outputPointId % grad_out.size(3);
   int outputPointY = outputPointId / grad_out.size(3);
 
-  int iStartX = max(0, -padL);
-  int iStartY = max(0, -padT);
-  int oStartX = max(0, padL);
-  int oStartY = max(0, padT);
+  int iStartX     = max(0, -padL);
+  int iStartY     = max(0, -padT);
+  int oStartX     = max(0, padL);
+  int oStartY     = max(0, padT);
   int inputPointX = min(max(padL, outputPointX), static_cast<int>(grad_in.size(3)) + padL - 1) -
                     oStartX + iStartX;
   int inputPointY = min(max(padT, outputPointY), static_cast<int>(grad_in.size(2)) + padT - 1) -
@@ -108,8 +109,8 @@ __global__ void image_2d_pad_edge_grad_kernel(
 
 template <typename DType>
 inline void image_pad_edge_grad(Tensor<gpu, 4, DType> grad_in,
-                                const Tensor<gpu, 4, DType> &grad_out,
-                                const mxnet::TShape &pad) {
+                                const Tensor<gpu, 4, DType>& grad_out,
+                                const mxnet::TShape& pad) {
   const int padT = pad[4];
   const int padL = pad[6];
   dim3 dimBlock(kBaseThreadNum);
@@ -117,9 +118,8 @@ inline void image_pad_edge_grad(Tensor<gpu, 4, DType> grad_in,
   dim3 dimGrid(xGridSize, grad_out.size(1), grad_out.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(grad_out.stream_);
-  image_2d_pad_edge_grad_kernel<kBaseThreadBits,
-                                DType><<<dimGrid, dimBlock, 0, stream>>>(
-      grad_in, grad_out, padT, padL);
+  image_2d_pad_edge_grad_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(grad_in, grad_out, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_2d_pad_edge_grad_kernel);
 }
 
@@ -127,7 +127,8 @@ inline void image_pad_edge_grad(Tensor<gpu, 4, DType> grad_in,
 template <int n_bits, typename DType>
 __global__ void image_2d_pad_constant_kernel(Tensor<gpu, 4, DType> dst,
                                              const Tensor<gpu, 4, DType> src,
-                                             const int padT, const int padL,
+                                             const int padT,
+                                             const int padL,
                                              const DType constant) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
   if (outputPointId >= dst.size(2) * dst.size(3)) {
@@ -137,27 +138,27 @@ __global__ void image_2d_pad_constant_kernel(Tensor<gpu, 4, DType> dst,
   int Ny = src.size(2);
   int Nx = src.size(3);
 
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane        = blockIdx.y;
+  int batch        = blockIdx.z;
   int outputPointX = outputPointId % dst.size(3);
   int outputPointY = outputPointId / dst.size(3);
-  int checkT = max(0, outputPointY - padT + 1);
-  int checkB = max(0, padT + Ny - outputPointY);
-  int checkL = max(0, outputPointX - padL + 1);
-  int checkR = max(0, padL + Nx - outputPointX);
-  int inputPointX = min(max(outputPointX - padL, 0), Nx - 1);
-  int inputPointY = min(max(outputPointY - padT, 0), Ny - 1);
+  int checkT       = max(0, outputPointY - padT + 1);
+  int checkB       = max(0, padT + Ny - outputPointY);
+  int checkL       = max(0, outputPointX - padL + 1);
+  int checkR       = max(0, padL + Nx - outputPointX);
+  int inputPointX  = min(max(outputPointX - padL, 0), Nx - 1);
+  int inputPointY  = min(max(outputPointY - padT, 0), Ny - 1);
   // 1 if need padding, 0 if not
-  int need_pad = !(checkT * checkB * checkL * checkR);
-  DType valueToCopy = src[batch][plane][inputPointY][inputPointX];
-  dst[batch][plane][outputPointY][outputPointX] =
-      valueToCopy * (!need_pad) + need_pad * constant;
+  int need_pad                                  = !(checkT * checkB * checkL * checkR);
+  DType valueToCopy                             = src[batch][plane][inputPointY][inputPointX];
+  dst[batch][plane][outputPointY][outputPointX] = valueToCopy * (!need_pad) + need_pad * constant;
 }
 
 template <typename DType>
 inline void image_pad_constant(Tensor<gpu, 4, DType> dst,
-                               const Tensor<gpu, 4, DType> &src,
-                               const mxnet::TShape &pad, const DType constant) {
+                               const Tensor<gpu, 4, DType>& src,
+                               const mxnet::TShape& pad,
+                               const DType constant) {
   const int padT = pad[4];
   const int padL = pad[6];
   dim3 dimBlock(kBaseThreadNum);
@@ -165,36 +166,35 @@ inline void image_pad_constant(Tensor<gpu, 4, DType> dst,
   dim3 dimGrid(xGridSize, dst.size(1), dst.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  image_2d_pad_constant_kernel<kBaseThreadBits,
-                               DType><<<dimGrid, dimBlock, 0, stream>>>(
-      dst, src, padT, padL, constant);
+  image_2d_pad_constant_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(dst, src, padT, padL, constant);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_2d_pad_constant_kernel);
 }
 
 template <int n_bits, typename DType>
-__global__ void image_2d_pad_constant_grad_kernel(
-    Tensor<gpu, 4, DType> grad_in, const Tensor<gpu, 4, DType> grad_out,
-    const int padT, const int padL) {
+__global__ void image_2d_pad_constant_grad_kernel(Tensor<gpu, 4, DType> grad_in,
+                                                  const Tensor<gpu, 4, DType> grad_out,
+                                                  const int padT,
+                                                  const int padL) {
   int inPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane     = blockIdx.y;
+  int batch     = blockIdx.z;
   int pixel_num = grad_in.size(2) * grad_in.size(3);
   if (inPointId >= pixel_num) {
     return;
   }
-  int inPointX = inPointId % grad_in.size(3);
-  int inPointY = inPointId / grad_in.size(3);
+  int inPointX  = inPointId % grad_in.size(3);
+  int inPointY  = inPointId / grad_in.size(3);
   int outPointX = inPointX + padL;
   int outPointY = inPointY + padT;
 
-  grad_in[batch][plane][inPointY][inPointX] =
-      grad_out[batch][plane][outPointY][outPointX];
+  grad_in[batch][plane][inPointY][inPointX] = grad_out[batch][plane][outPointY][outPointX];
 }
 
 template <typename DType>
 inline void image_pad_constant_grad(Tensor<gpu, 4, DType> grad_in,
-                                    const Tensor<gpu, 4, DType> &grad_out,
-                                    const mxnet::TShape &pad) {
+                                    const Tensor<gpu, 4, DType>& grad_out,
+                                    const mxnet::TShape& pad) {
   const int padT = pad[4];
   const int padL = pad[6];
   dim3 dimBlock(kBaseThreadNum);
@@ -202,24 +202,23 @@ inline void image_pad_constant_grad(Tensor<gpu, 4, DType> grad_in,
   dim3 dimGrid(xGridSize, grad_in.size(1), grad_in.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(grad_in.stream_);
-  image_2d_pad_constant_grad_kernel<kBaseThreadBits,
-                                    DType><<<dimGrid, dimBlock, 0, stream>>>(
-      grad_in, grad_out, padT, padL);
+  image_2d_pad_constant_grad_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(grad_in, grad_out, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_2d_pad_constant_grad_kernel);
 }
 
-
 // Case 3: Reflection Padding
 // adapted from Torch
 // https://github.com/torch/cunn/blob/master/lib/THCUNN/SpatialReflectionPadding.cu
 
 template <int n_bits, typename DType>
 __global__ void image_2d_pad_reflect_kernel(Tensor<gpu, 4, DType> dst,
-                                         const Tensor<gpu, 4, DType> src,
-                                         const int padT, const int padL) {
+                                            const Tensor<gpu, 4, DType> src,
+                                            const int padT,
+                                            const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= dst.size(2) * dst.size(3)) {
     return;
   }
@@ -231,26 +230,20 @@ __global__ void image_2d_pad_reflect_kernel(Tensor<gpu, 4, DType> dst,
   int oStartX = max(0, padL);
   int oStartY = max(0, padT);
 
-  int inputPointX = __sad(outputPointX, padL, 0)
-                  - __sad(outputPointX, src.size(3) + padL - 1, 0)
-                  - outputPointX
-                  + 2 * padL + src.size(3) - 1
-                  - oStartX + iStartX;
+  int inputPointX = __sad(outputPointX, padL, 0) - __sad(outputPointX, src.size(3) + padL - 1, 0) -
+                    outputPointX + 2 * padL + src.size(3) - 1 - oStartX + iStartX;
 
-  int inputPointY = __sad(outputPointY, padT, 0)
-                  - __sad(outputPointY, src.size(2) + padT - 1, 0)
-                  - outputPointY
-                  + 2 * padT + src.size(2) - 1
-                  - oStartY + iStartY;
+  int inputPointY = __sad(outputPointY, padT, 0) - __sad(outputPointY, src.size(2) + padT - 1, 0) -
+                    outputPointY + 2 * padT + src.size(2) - 1 - oStartY + iStartY;
 
-  DType valueToCopy = src[batch][plane][inputPointY][inputPointX];
+  DType valueToCopy                             = src[batch][plane][inputPointY][inputPointX];
   dst[batch][plane][outputPointY][outputPointX] = valueToCopy;
 }
 
 template <typename DType>
 inline void image_pad_reflect(Tensor<gpu, 4, DType> dst,
-                           const Tensor<gpu, 4, DType> &src,
-                           const mxnet::TShape &pad) {
+                              const Tensor<gpu, 4, DType>& src,
+                              const mxnet::TShape& pad) {
   const int padT = pad[4];
   const int padL = pad[6];
   dim3 dimBlock(kBaseThreadNum);
@@ -258,19 +251,19 @@ inline void image_pad_reflect(Tensor<gpu, 4, DType> dst,
   dim3 dimGrid(xGridSize, dst.size(1), dst.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  image_2d_pad_reflect_kernel<kBaseThreadBits,
-                           DType><<<dimGrid, dimBlock, 0, stream>>>(dst, src,
-                                                                    padT, padL);
+  image_2d_pad_reflect_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(dst, src, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_2d_pad_reflect_kernel);
 }
 
 template <int n_bits, typename DType>
-__global__ void image_2d_pad_reflect_grad_kernel(
-    Tensor<gpu, 4, DType> grad_in, const Tensor<gpu, 4, DType> grad_out,
-    const int padT, const int padL) {
+__global__ void image_2d_pad_reflect_grad_kernel(Tensor<gpu, 4, DType> grad_in,
+                                                 const Tensor<gpu, 4, DType> grad_out,
+                                                 const int padT,
+                                                 const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= grad_out.size(2) * grad_out.size(3)) {
     return;
   }
@@ -282,17 +275,13 @@ __global__ void image_2d_pad_reflect_grad_kernel(
   int oStartX = max(0, padL);
   int oStartY = max(0, padT);
 
-  int inputPointX = __sad(outputPointX, padL, 0)
-                  - __sad(outputPointX, grad_in.size(3) + padL - 1, 0)
-                  - outputPointX
-                  + 2 * padL + grad_in.size(3) - 1
-                  - oStartX + iStartX;
+  int inputPointX = __sad(outputPointX, padL, 0) -
+                    __sad(outputPointX, grad_in.size(3) + padL - 1, 0) - outputPointX + 2 * padL +
+                    grad_in.size(3) - 1 - oStartX + iStartX;
 
-  int inputPointY = __sad(outputPointY, padT, 0)
-                  - __sad(outputPointY, grad_in.size(2) + padT - 1, 0)
-                  - outputPointY
-                  + 2 * padT + grad_in.size(2) - 1
-                  - oStartY + iStartY;
+  int inputPointY = __sad(outputPointY, padT, 0) -
+                    __sad(outputPointY, grad_in.size(2) + padT - 1, 0) - outputPointY + 2 * padT +
+                    grad_in.size(2) - 1 - oStartY + iStartY;
 
   DType valueToCopy = grad_out[batch][plane][outputPointY][outputPointX];
   atomicAdd(&grad_in[batch][plane][inputPointY][inputPointX], valueToCopy);
@@ -300,8 +289,8 @@ __global__ void image_2d_pad_reflect_grad_kernel(
 
 template <typename DType>
 inline void image_pad_reflect_grad(Tensor<gpu, 4, DType> grad_in,
-                                const Tensor<gpu, 4, DType> &grad_out,
-                                const mxnet::TShape &pad) {
+                                   const Tensor<gpu, 4, DType>& grad_out,
+                                   const mxnet::TShape& pad) {
   const int padT = pad[4];
   const int padL = pad[6];
   dim3 dimBlock(kBaseThreadNum);
@@ -309,13 +298,11 @@ inline void image_pad_reflect_grad(Tensor<gpu, 4, DType> grad_in,
   dim3 dimGrid(xGridSize, grad_out.size(1), grad_out.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(grad_out.stream_);
-  image_2d_pad_reflect_grad_kernel<kBaseThreadBits,
-                                DType><<<dimGrid, dimBlock, 0, stream>>>(
-      grad_in, grad_out, padT, padL);
+  image_2d_pad_reflect_grad_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(grad_in, grad_out, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_2d_pad_reflect_grad_kernel);
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////
 // Special Case: 3d image (pad depth + width + height)
 
@@ -326,11 +313,12 @@ inline void image_pad_reflect_grad(Tensor<gpu, 4, DType> grad_in,
 template <int n_bits, typename DType>
 __global__ void image_3d_pad_edge_kernel(Tensor<gpu, 5, DType> dst,
                                          const Tensor<gpu, 5, DType> src,
-                                         const int padF, const int padT,
+                                         const int padF,
+                                         const int padT,
                                          const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= dst.size(2) * dst.size(3) * dst.size(4)) {
     return;
   }
@@ -358,8 +346,8 @@ __global__ void image_3d_pad_edge_kernel(Tensor<gpu, 5, DType> dst,
 
 template <typename DType>
 inline void image_pad_edge(Tensor<gpu, 5, DType> dst,
-                           const Tensor<gpu, 5, DType> &src,
-                           const mxnet::TShape &pad) {
+                           const Tensor<gpu, 5, DType>& src,
+                           const mxnet::TShape& pad) {
   const int padF = pad[4];
   const int padT = pad[6];
   const int padL = pad[8];
@@ -368,19 +356,20 @@ inline void image_pad_edge(Tensor<gpu, 5, DType> dst,
   dim3 dimGrid(xGridSize, dst.size(1), dst.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  image_3d_pad_edge_kernel<kBaseThreadBits,
-                           DType><<<dimGrid, dimBlock, 0, stream>>>(
-      dst, src, padF, padT, padL);
+  image_3d_pad_edge_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(dst, src, padF, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_3d_pad_edge_kernel);
 }
 
 template <int n_bits, typename DType>
-__global__ void image_3d_pad_edge_grad_kernel(
-    Tensor<gpu, 5, DType> grad_in, const Tensor<gpu, 5, DType> grad_out,
-    const int padF, const int padT, const int padL) {
+__global__ void image_3d_pad_edge_grad_kernel(Tensor<gpu, 5, DType> grad_in,
+                                              const Tensor<gpu, 5, DType> grad_out,
+                                              const int padF,
+                                              const int padT,
+                                              const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= grad_out.size(2) * grad_out.size(3) * grad_out.size(4)) {
     return;
   }
@@ -401,28 +390,24 @@ __global__ void image_3d_pad_edge_grad_kernel(
                     oStartY + iStartY;
   int inputPointZ = min(max(padF, outputPointZ), static_cast<int>(grad_in.size(2)) + padF - 1) -
                     oStartZ + iStartZ;
-  DType valueToCopy =
-      grad_out[batch][plane][outputPointZ][outputPointY][outputPointX];
-  atomicAdd(&grad_in[batch][plane][inputPointZ][inputPointY][inputPointX],
-            valueToCopy);
+  DType valueToCopy = grad_out[batch][plane][outputPointZ][outputPointY][outputPointX];
+  atomicAdd(&grad_in[batch][plane][inputPointZ][inputPointY][inputPointX], valueToCopy);
 }
 
 template <typename DType>
 inline void image_pad_edge_grad(Tensor<gpu, 5, DType> grad_in,
-                                const Tensor<gpu, 5, DType> &grad_out,
-                                const mxnet::TShape &pad) {
+                                const Tensor<gpu, 5, DType>& grad_out,
+                                const mxnet::TShape& pad) {
   const int padF = pad[4];
   const int padT = pad[6];
   const int padL = pad[8];
   dim3 dimBlock(kBaseThreadNum);
-  int xGridSize =
-      (grad_out.size(2) * grad_out.size(3) * grad_out.size(4) + 256 - 1) / 256;
+  int xGridSize = (grad_out.size(2) * grad_out.size(3) * grad_out.size(4) + 256 - 1) / 256;
   dim3 dimGrid(xGridSize, grad_out.size(1), grad_out.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(grad_out.stream_);
-  image_3d_pad_edge_grad_kernel<kBaseThreadBits,
-                                DType><<<dimGrid, dimBlock, 0, stream>>>(
-      grad_in, grad_out, padF, padT, padL);
+  image_3d_pad_edge_grad_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(grad_in, grad_out, padF, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_3d_pad_edge_grad_kernel);
 }
 
@@ -430,7 +415,8 @@ inline void image_pad_edge_grad(Tensor<gpu, 5, DType> grad_in,
 template <int n_bits, typename DType>
 __global__ void image_3d_pad_constant_kernel(Tensor<gpu, 5, DType> dst,
                                              const Tensor<gpu, 5, DType> src,
-                                             const int padF, const int padT,
+                                             const int padF,
+                                             const int padT,
                                              const int padL,
                                              const DType constant) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
@@ -442,25 +428,24 @@ __global__ void image_3d_pad_constant_kernel(Tensor<gpu, 5, DType> dst,
   int Ny = src.size(3);
   int Nx = src.size(4);
 
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane        = blockIdx.y;
+  int batch        = blockIdx.z;
   int outputPointX = outputPointId % dst.size(4);
   int outputPointY = (outputPointId / dst.size(4)) % dst.size(3);
   int outputPointZ = outputPointId / (dst.size(3) * dst.size(4));
 
-  int checkFront = max(0, outputPointZ - padF + 1);
-  int checkBack = max(0, padF + Nz - outputPointZ);
-  int checkTop = max(0, outputPointY - padT + 1);
+  int checkFront  = max(0, outputPointZ - padF + 1);
+  int checkBack   = max(0, padF + Nz - outputPointZ);
+  int checkTop    = max(0, outputPointY - padT + 1);
   int checkBottom = max(0, padT + Ny - outputPointY);
-  int checkLeft = max(0, outputPointX - padL + 1);
-  int checkRight = max(0, padL + Nx - outputPointX);
+  int checkLeft   = max(0, outputPointX - padL + 1);
+  int checkRight  = max(0, padL + Nx - outputPointX);
 
   int inputPointZ = min(max(outputPointZ - padF, 0), Nz - 1);
   int inputPointX = min(max(outputPointX - padL, 0), Nx - 1);
   int inputPointY = min(max(outputPointY - padT, 0), Ny - 1);
   // 1 if need padding, 0 if not
-  int need_pad = !(checkFront * checkBack * checkTop * checkBottom * checkLeft *
-                   checkRight);
+  int need_pad      = !(checkFront * checkBack * checkTop * checkBottom * checkLeft * checkRight);
   DType valueToCopy = src[batch][plane][inputPointZ][inputPointY][inputPointX];
   dst[batch][plane][outputPointZ][outputPointY][outputPointX] =
       valueToCopy * (!need_pad) + need_pad * constant;
@@ -468,8 +453,9 @@ __global__ void image_3d_pad_constant_kernel(Tensor<gpu, 5, DType> dst,
 
 template <typename DType>
 inline void image_pad_constant(Tensor<gpu, 5, DType> dst,
-                               const Tensor<gpu, 5, DType> &src,
-                               const mxnet::TShape &pad, const DType constant) {
+                               const Tensor<gpu, 5, DType>& src,
+                               const mxnet::TShape& pad,
+                               const DType constant) {
   const int padF = pad[4];
   const int padT = pad[6];
   const int padL = pad[8];
@@ -478,19 +464,20 @@ inline void image_pad_constant(Tensor<gpu, 5, DType> dst,
   dim3 dimGrid(xGridSize, dst.size(1), dst.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  image_3d_pad_constant_kernel<kBaseThreadBits,
-                               DType><<<dimGrid, dimBlock, 0, stream>>>(
-      dst, src, padF, padT, padL, constant);
+  image_3d_pad_constant_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(dst, src, padF, padT, padL, constant);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_3d_pad_constant_kernel);
 }
 
 template <int n_bits, typename DType>
-__global__ void image_3d_pad_constant_grad_kernel(
-    Tensor<gpu, 5, DType> grad_in, const Tensor<gpu, 5, DType> grad_out,
-    const int padF, const int padT, const int padL) {
+__global__ void image_3d_pad_constant_grad_kernel(Tensor<gpu, 5, DType> grad_in,
+                                                  const Tensor<gpu, 5, DType> grad_out,
+                                                  const int padF,
+                                                  const int padT,
+                                                  const int padL) {
   int inPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane     = blockIdx.y;
+  int batch     = blockIdx.z;
   int pixel_num = grad_in.size(2) * grad_in.size(3) * grad_in.size(4);
   if (inPointId >= pixel_num) {
     return;
@@ -510,20 +497,18 @@ __global__ void image_3d_pad_constant_grad_kernel(
 
 template <typename DType>
 inline void image_pad_constant_grad(Tensor<gpu, 5, DType> grad_in,
-                                    const Tensor<gpu, 5, DType> &grad_out,
-                                    const mxnet::TShape &pad) {
+                                    const Tensor<gpu, 5, DType>& grad_out,
+                                    const mxnet::TShape& pad) {
   const int padF = pad[4];
   const int padT = pad[6];
   const int padL = pad[8];
   dim3 dimBlock(kBaseThreadNum);
-  int xGridSize =
-      (grad_in.size(2) * grad_in.size(3) * grad_in.size(4) + 256 - 1) / 256;
+  int xGridSize = (grad_in.size(2) * grad_in.size(3) * grad_in.size(4) + 256 - 1) / 256;
   dim3 dimGrid(xGridSize, grad_in.size(1), grad_in.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(grad_in.stream_);
-  image_3d_pad_constant_grad_kernel<kBaseThreadBits,
-                                    DType><<<dimGrid, dimBlock, 0, stream>>>(
-      grad_in, grad_out, padF, padT, padL);
+  image_3d_pad_constant_grad_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(grad_in, grad_out, padF, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_3d_pad_constant_grad_kernel);
 }
 
@@ -531,12 +516,13 @@ inline void image_pad_constant_grad(Tensor<gpu, 5, DType> grad_in,
 
 template <int n_bits, typename DType>
 __global__ void image_3d_pad_reflect_kernel(Tensor<gpu, 5, DType> dst,
-                                         const Tensor<gpu, 5, DType> src,
-                                         const int padF, const int padT,
-                                         const int padL) {
+                                            const Tensor<gpu, 5, DType> src,
+                                            const int padF,
+                                            const int padT,
+                                            const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= dst.size(2) * dst.size(3) * dst.size(4)) {
     return;
   }
@@ -551,23 +537,14 @@ __global__ void image_3d_pad_reflect_kernel(Tensor<gpu, 5, DType> dst,
   int oStartY = max(0, padT);
   int oStartZ = max(0, padF);
 
-  int inputPointX = __sad(outputPointX, padL, 0)
-                  - __sad(outputPointX, src.size(4) + padL - 1, 0)
-                  - outputPointX
-                  + 2 * padL + src.size(4) - 1
-                  - oStartX + iStartX;
+  int inputPointX = __sad(outputPointX, padL, 0) - __sad(outputPointX, src.size(4) + padL - 1, 0) -
+                    outputPointX + 2 * padL + src.size(4) - 1 - oStartX + iStartX;
 
-  int inputPointY = __sad(outputPointY, padT, 0)
-                  - __sad(outputPointY, src.size(3) + padT - 1, 0)
-                  - outputPointY
-                  + 2 * padT + src.size(3) - 1
-                  - oStartY + iStartY;
+  int inputPointY = __sad(outputPointY, padT, 0) - __sad(outputPointY, src.size(3) + padT - 1, 0) -
+                    outputPointY + 2 * padT + src.size(3) - 1 - oStartY + iStartY;
 
-  int inputPointZ = __sad(outputPointZ, padF, 0)
-                  - __sad(outputPointZ, src.size(2) + padF - 1, 0)
-                  - outputPointZ
-                  + 2 * padF + src.size(2) - 1
-                  - oStartZ + iStartZ;
+  int inputPointZ = __sad(outputPointZ, padF, 0) - __sad(outputPointZ, src.size(2) + padF - 1, 0) -
+                    outputPointZ + 2 * padF + src.size(2) - 1 - oStartZ + iStartZ;
 
   DType valueToCopy = src[batch][plane][inputPointZ][inputPointY][inputPointX];
   dst[batch][plane][outputPointZ][outputPointY][outputPointX] = valueToCopy;
@@ -575,8 +552,8 @@ __global__ void image_3d_pad_reflect_kernel(Tensor<gpu, 5, DType> dst,
 
 template <typename DType>
 inline void image_pad_reflect(Tensor<gpu, 5, DType> dst,
-                           const Tensor<gpu, 5, DType> &src,
-                           const mxnet::TShape &pad) {
+                              const Tensor<gpu, 5, DType>& src,
+                              const mxnet::TShape& pad) {
   const int padF = pad[4];
   const int padT = pad[6];
   const int padL = pad[8];
@@ -585,19 +562,20 @@ inline void image_pad_reflect(Tensor<gpu, 5, DType> dst,
   dim3 dimGrid(xGridSize, dst.size(1), dst.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  image_3d_pad_reflect_kernel<kBaseThreadBits,
-                           DType><<<dimGrid, dimBlock, 0, stream>>>(
-      dst, src, padF, padT, padL);
+  image_3d_pad_reflect_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(dst, src, padF, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_3d_pad_reflect_kernel);
 }
 
 template <int n_bits, typename DType>
-__global__ void image_3d_pad_reflect_grad_kernel(
-    Tensor<gpu, 5, DType> grad_in, const Tensor<gpu, 5, DType> grad_out,
-    const int padF, const int padT, const int padL) {
+__global__ void image_3d_pad_reflect_grad_kernel(Tensor<gpu, 5, DType> grad_in,
+                                                 const Tensor<gpu, 5, DType> grad_out,
+                                                 const int padF,
+                                                 const int padT,
+                                                 const int padL) {
   int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
-  int plane = blockIdx.y;
-  int batch = blockIdx.z;
+  int plane         = blockIdx.y;
+  int batch         = blockIdx.z;
   if (outputPointId >= grad_out.size(2) * grad_out.size(3) * grad_out.size(4)) {
     return;
   }
@@ -612,28 +590,20 @@ __global__ void image_3d_pad_reflect_grad_kernel(
   int oStartY = max(0, padT);
   int oStartZ = max(0, padF);
 
-  int inputPointX = __sad(outputPointX, padL, 0)
-                  - __sad(outputPointX, grad_in.size(4) + padL - 1, 0)
-                  - outputPointX
-                  + 2 * padL + grad_in.size(4) - 1
-                  - oStartX + iStartX;
+  int inputPointX = __sad(outputPointX, padL, 0) -
+                    __sad(outputPointX, grad_in.size(4) + padL - 1, 0) - outputPointX + 2 * padL +
+                    grad_in.size(4) - 1 - oStartX + iStartX;
 
-  int inputPointY = __sad(outputPointY, padT, 0)
-                  - __sad(outputPointY, grad_in.size(3) + padT - 1, 0)
-                  - outputPointY
-                  + 2 * padT + grad_in.size(3) - 1
-                  - oStartY + iStartY;
+  int inputPointY = __sad(outputPointY, padT, 0) -
+                    __sad(outputPointY, grad_in.size(3) + padT - 1, 0) - outputPointY + 2 * padT +
+                    grad_in.size(3) - 1 - oStartY + iStartY;
 
-  int inputPointZ = __sad(outputPointZ, padF, 0)
-                  - __sad(outputPointZ, grad_in.size(2) + padF - 1, 0)
-                  - outputPointZ
-                  + 2 * padF + grad_in.size(2) - 1
-                  - oStartZ + iStartZ;
+  int inputPointZ = __sad(outputPointZ, padF, 0) -
+                    __sad(outputPointZ, grad_in.size(2) + padF - 1, 0) - outputPointZ + 2 * padF +
+                    grad_in.size(2) - 1 - oStartZ + iStartZ;
 
-  DType valueToCopy =
-      grad_out[batch][plane][outputPointZ][outputPointY][outputPointX];
-  atomicAdd(&grad_in[batch][plane][inputPointZ][inputPointY][inputPointX],
-            valueToCopy);
+  DType valueToCopy = grad_out[batch][plane][outputPointZ][outputPointY][outputPointX];
+  atomicAdd(&grad_in[batch][plane][inputPointZ][inputPointY][inputPointX], valueToCopy);
 }
 
 /*  int outputPointId = threadIdx.x + blockIdx.x * blockDim.x;
@@ -667,20 +637,18 @@ __global__ void image_3d_pad_reflect_grad_kernel(
 
 template <typename DType>
 inline void image_pad_reflect_grad(Tensor<gpu, 5, DType> grad_in,
-                                const Tensor<gpu, 5, DType> &grad_out,
-                                const mxnet::TShape &pad) {
+                                   const Tensor<gpu, 5, DType>& grad_out,
+                                   const mxnet::TShape& pad) {
   const int padF = pad[4];
   const int padT = pad[6];
   const int padL = pad[8];
   dim3 dimBlock(kBaseThreadNum);
-  int xGridSize =
-      (grad_out.size(2) * grad_out.size(3) * grad_out.size(4) + 256 - 1) / 256;
+  int xGridSize = (grad_out.size(2) * grad_out.size(3) * grad_out.size(4) + 256 - 1) / 256;
   dim3 dimGrid(xGridSize, grad_out.size(1), grad_out.size(0));
   CheckLaunchParam(dimGrid, dimBlock, "Pad");
   cudaStream_t stream = Stream<gpu>::GetStream(grad_out.stream_);
-  image_3d_pad_reflect_grad_kernel<kBaseThreadBits,
-                                DType><<<dimGrid, dimBlock, 0, stream>>>(
-      grad_in, grad_out, padF, padT, padL);
+  image_3d_pad_reflect_grad_kernel<kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(grad_in, grad_out, padF, padT, padL);
   MSHADOW_CUDA_POST_KERNEL_CHECK(image_3d_pad_reflect_grad_kernel);
 }
 
@@ -688,8 +656,11 @@ inline void image_pad_reflect_grad(Tensor<gpu, 5, DType> grad_in,
 }  // namespace cuda
 
 template <int dim, typename DType>
-void pad_image(Tensor<gpu, dim, DType> dst, const Tensor<gpu, dim, DType> src,
-               const mxnet::TShape pad, int mode, const DType constant_value) {
+void pad_image(Tensor<gpu, dim, DType> dst,
+               const Tensor<gpu, dim, DType> src,
+               const mxnet::TShape pad,
+               int mode,
+               const DType constant_value) {
   switch (mode) {
     case mxnet::op::pad_enum::kEdge:
       cuda::image_pad_edge(dst, src, pad);
@@ -706,7 +677,8 @@ void pad_image(Tensor<gpu, dim, DType> dst, const Tensor<gpu, dim, DType> src,
 template <int dim, typename DType>
 void pad_image_grad(Tensor<gpu, dim, DType> grad_in,
                     const Tensor<gpu, dim, DType> grad_out,
-                    const mxnet::TShape pad, int mode) {
+                    const mxnet::TShape pad,
+                    int mode) {
   switch (mode) {
     case mxnet::op::pad_enum::kEdge:
       cuda::image_pad_edge_grad(grad_in, grad_out, pad);
@@ -727,8 +699,8 @@ void pad_image_grad(Tensor<gpu, dim, DType> grad_in,
 namespace mxnet {
 namespace op {
 template <>
-Operator *CreateOp<gpu>(PadParam param, int dtype) {
-  Operator *op = nullptr;
+Operator* CreateOp<gpu>(PadParam param, int dtype) {
+  Operator* op = nullptr;
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new PadOp<gpu, DType>(param); })
   return op;
 }
diff --git a/src/operator/quantization/calibrate-inl.h b/src/operator/quantization/calibrate-inl.h
index ac7d04403be1..9305305ccf8b 100644
--- a/src/operator/quantization/calibrate-inl.h
+++ b/src/operator/quantization/calibrate-inl.h
@@ -37,9 +37,8 @@ struct CalibrateEntropyParam : public dmlc::Parameter<CalibrateEntropyParam> {
   int num_quantized_bins;
   DMLC_DECLARE_PARAMETER(CalibrateEntropyParam) {
     DMLC_DECLARE_FIELD(num_quantized_bins)
-      .set_default(255)
-      .describe(
-          "The number of quantized bins.");
+        .set_default(255)
+        .describe("The number of quantized bins.");
   }
 };
 
diff --git a/src/operator/quantization/calibrate.cc b/src/operator/quantization/calibrate.cc
index 5d4237da43ae..93909ad58b95 100644
--- a/src/operator/quantization/calibrate.cc
+++ b/src/operator/quantization/calibrate.cc
@@ -39,23 +39,25 @@ std::vector<float> SmoothDistribution(const std::vector<float>& p, const float e
   std::vector<size_t> is_nonzeros(p.size());
   {
     auto it = p.begin();
-    std::generate(is_zeros.begin(), is_zeros.end(),
-                  [&it]() { return static_cast<size_t>(*(it++) == 0.f); });
+    std::generate(
+        is_zeros.begin(), is_zeros.end(), [&it]() { return static_cast<size_t>(*(it++) == 0.f); });
   }
   {
     auto it = p.begin();
-    std::generate(is_nonzeros.begin(), is_nonzeros.end(),
-                  [&it]() { return static_cast<size_t>(*(it++) != 0.f); });
+    std::generate(is_nonzeros.begin(), is_nonzeros.end(), [&it]() {
+      return static_cast<size_t>(*(it++) != 0.f);
+    });
   }
 
-  size_t n_zeros = std::accumulate(is_zeros.begin(), is_zeros.end(), 0);
+  size_t n_zeros    = std::accumulate(is_zeros.begin(), is_zeros.end(), 0);
   size_t n_nonzeros = p.size() - n_zeros;
   if (!n_nonzeros) {
     // The discrete probability distribution is malformed. All entries are 0.
     return std::vector<float>();
   }
   float eps1 = eps * static_cast<float>(n_zeros) / static_cast<float>(n_nonzeros);
-  if (eps1 >= 1.0) return std::vector<float>();
+  if (eps1 >= 1.0)
+    return std::vector<float>();
   auto ret = p;
   for (size_t i = 0; i < p.size(); i++) {
     ret[i] += eps * is_zeros[i] - eps1 * is_nonzeros[i];
@@ -79,38 +81,41 @@ static float ComputeEntropy(std::vector<float>* p_ptr, std::vector<float>* q_ptr
   float ret = 0;
   for (size_t i = 0; i < p.size(); i++) {
     CHECK(p[i] > 0 && q[i] > 0);
-    if (p[i] && q[i]) ret += p[i] * std::log(p[i] / q[i]);
+    if (p[i] && q[i])
+      ret += p[i] * std::log(p[i] / q[i]);
   }
   return ret;
 }
 
-void CalibrateComputeCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
-                         const std::vector<TBlob>& inputs, const std::vector<OpReqType>& req,
+void CalibrateComputeCPU(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
                          const std::vector<TBlob>& outputs) {
-  const auto& param = nnvm::get<CalibrateEntropyParam>(attrs.parsed);
-  const auto& hist = inputs[0];
-  const auto& hist_ptr = hist.dptr<float>();
-  const auto& hist_edges = inputs[1];
-  const auto& hist_edges_ptr = hist_edges.dptr<float>();
-  float* const out_threshold = outputs[0].dptr<float>();
+  const auto& param           = nnvm::get<CalibrateEntropyParam>(attrs.parsed);
+  const auto& hist            = inputs[0];
+  const auto& hist_ptr        = hist.dptr<float>();
+  const auto& hist_edges      = inputs[1];
+  const auto& hist_edges_ptr  = hist_edges.dptr<float>();
+  float* const out_threshold  = outputs[0].dptr<float>();
   float* const out_divergence = outputs[1].dptr<float>();
-  const auto num_bins = hist.Size();
+  const auto num_bins         = hist.Size();
   CHECK_EQ(num_bins + 1, hist_edges.Size());
   int num_quantized_bins = param.num_quantized_bins;
 
-  const int zero_bin_idx = num_bins / 2;
+  const int zero_bin_idx            = num_bins / 2;
   const int num_half_quantized_bins = num_quantized_bins / 2;
   std::vector<float> thresholds(num_bins / 2 + 1 - num_quantized_bins / 2, 0.f);
   std::vector<float> divergence(thresholds.size(), 0.f);
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t i = num_quantized_bins / 2; i <= zero_bin_idx; i++) {
-    const size_t p_bin_idx_start = zero_bin_idx - i;
-    const size_t p_bin_idx_stop = zero_bin_idx + i + 1;
+    const size_t p_bin_idx_start            = zero_bin_idx - i;
+    const size_t p_bin_idx_stop             = zero_bin_idx + i + 1;
     thresholds[i - num_half_quantized_bins] = hist_edges_ptr[p_bin_idx_stop];
 
     std::vector<size_t> sliced_nd_hist(p_bin_idx_stop - p_bin_idx_start);
     std::vector<float> p(p_bin_idx_stop - p_bin_idx_start);
-    p[0] = 0;
+    p[0]     = 0;
     p.back() = 0;
     for (size_t j = 0; j < num_bins; j++) {
       if (j <= p_bin_idx_start) {
@@ -119,7 +124,7 @@ void CalibrateComputeCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
         p.back() += hist_ptr[j];
       } else {
         sliced_nd_hist[j - p_bin_idx_start] = hist_ptr[j];
-        p[j - p_bin_idx_start] = hist_ptr[j];
+        p[j - p_bin_idx_start]              = hist_ptr[j];
       }
     }
     // calculate how many bins should be merged to generate quantized distribution q
@@ -128,23 +133,26 @@ void CalibrateComputeCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
     std::vector<float> quantized_bins(num_quantized_bins, 0);
     for (index_t j = 0; j < num_quantized_bins; j++) {
       const int start = j * num_merged_bins;
-      const int stop = (j + 1) * num_merged_bins;
+      const int stop  = (j + 1) * num_merged_bins;
       quantized_bins[j] =
           std::accumulate(sliced_nd_hist.begin() + start, sliced_nd_hist.begin() + stop, 0);
     }
     quantized_bins.back() += std::accumulate(
         sliced_nd_hist.begin() + static_cast<int>(num_quantized_bins * num_merged_bins),
-        sliced_nd_hist.end(), 0);
+        sliced_nd_hist.end(),
+        0);
     // expand quantized_bins into p.size bins
     std::vector<float> q(sliced_nd_hist.size(), 0);
     for (index_t j = 0; j < num_quantized_bins; j++) {
       const int start = j * num_merged_bins;
-      const int stop = (j == num_quantized_bins - 1) ? q.size() : ((j + 1) * num_merged_bins);
-      int norm = std::count_if(sliced_nd_hist.begin() + start, sliced_nd_hist.begin() + stop,
+      const int stop  = (j == num_quantized_bins - 1) ? q.size() : ((j + 1) * num_merged_bins);
+      int norm        = std::count_if(sliced_nd_hist.begin() + start,
+                               sliced_nd_hist.begin() + stop,
                                [](size_t i) { return i != 0; });
       if (norm) {
         for (index_t k = start; k < stop; k++) {
-          if (p[k]) q[k] = quantized_bins[j] / norm;
+          if (p[k])
+            q[k] = quantized_bins[j] / norm;
         }
       }
     }
@@ -159,18 +167,19 @@ void CalibrateComputeCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
   }
 
   size_t min_divergence_idx = 0;
-  float min_divergence = mshadow::red::limits::MaxValue<float>();
+  float min_divergence      = mshadow::red::limits::MaxValue<float>();
   for (size_t i = 0; i < divergence.size(); i++) {
     if (divergence[i] < min_divergence) {
-      min_divergence = divergence[i];
+      min_divergence     = divergence[i];
       min_divergence_idx = i;
     }
   }
   *out_divergence = min_divergence;
-  *out_threshold = thresholds[min_divergence_idx];
+  *out_threshold  = thresholds[min_divergence_idx];
 }
 
-static inline bool CalibrateShape(const nnvm::NodeAttrs& attrs, std::vector<TShape>* in_attrs,
+static inline bool CalibrateShape(const nnvm::NodeAttrs& attrs,
+                                  std::vector<TShape>* in_attrs,
                                   std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 2U);
@@ -179,7 +188,8 @@ static inline bool CalibrateShape(const nnvm::NodeAttrs& attrs, std::vector<TSha
   return (!shape_is_none(in_attrs->at(0))) && (!shape_is_none(in_attrs->at(1)));
 }
 
-static inline bool CalibrateType(const nnvm::NodeAttrs& attrs, std::vector<int>* in_attrs,
+static inline bool CalibrateType(const nnvm::NodeAttrs& attrs,
+                                 std::vector<int>* in_attrs,
                                  std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 2U);
@@ -191,26 +201,28 @@ static inline bool CalibrateType(const nnvm::NodeAttrs& attrs, std::vector<int>*
 }
 
 NNVM_REGISTER_OP(_contrib_calibrate_entropy)
-.add_alias("_npx_contrib_calibrate_entropy")
-.describe(R"code(Provide calibrated min/max for input histogram.
+    .add_alias("_npx_contrib_calibrate_entropy")
+    .describe(R"code(Provide calibrated min/max for input histogram.
 
 .. Note::
     This operator only supports forward propagation. DO NOT use it in training.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<CalibrateEntropyParam>)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"hist", "hist_edges"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"threshold", "divergence"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", CalibrateShape)
-.set_attr<nnvm::FInferType>("FInferType", CalibrateType)
-.set_attr<FCompute>("FCompute<cpu>", CalibrateComputeCPU)
-.add_argument("hist", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
-.add_argument("hist_edges", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
-.add_arguments(CalibrateEntropyParam::__FIELDS__());
+    .set_attr_parser(ParamParser<CalibrateEntropyParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"hist", "hist_edges"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"threshold", "divergence"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", CalibrateShape)
+    .set_attr<nnvm::FInferType>("FInferType", CalibrateType)
+    .set_attr<FCompute>("FCompute<cpu>", CalibrateComputeCPU)
+    .add_argument("hist", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
+    .add_argument("hist_edges", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
+    .add_arguments(CalibrateEntropyParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/dequantize-inl.h b/src/operator/quantization/dequantize-inl.h
index b5f9e385c48e..d77eadb624b3 100644
--- a/src/operator/quantization/dequantize-inl.h
+++ b/src/operator/quantization/dequantize-inl.h
@@ -40,37 +40,44 @@ struct DequantizeParam : public dmlc::Parameter<DequantizeParam> {
   int out_type;
   DMLC_DECLARE_PARAMETER(DequantizeParam) {
     DMLC_DECLARE_FIELD(out_type)
-    .add_enum("float32", mshadow::kFloat32)
-    .set_default(mshadow::kFloat32)
-    .describe("Output data type.");
+        .add_enum("float32", mshadow::kFloat32)
+        .set_default(mshadow::kFloat32)
+        .describe("Output data type.");
   }
 };
 
 // dequantize unsigned int8 to float32
 struct dequantize_unsigned {
-  template<typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, const SrcDType *in,
-                                  const float *imin_range, const float *imax_range,
-                                  const float imin_limit, const float imax_limit) {
+  template <typename DstDType, typename SrcDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range,
+                                  const float imin_limit,
+                                  const float imax_limit) {
     const float scale = (*imax_range - *imin_range) / (imax_limit - imin_limit);
-    out[i] = static_cast<DstDType>(in[i] * scale + *imin_range);
+    out[i]            = static_cast<DstDType>(in[i] * scale + *imin_range);
   }
 };
 
 // keep zero-center
 struct dequantize_zero_centered {
-  template<typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, const SrcDType *in,
-                                  const float *imin_range, const float *imax_range,
+  template <typename DstDType, typename SrcDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range,
                                   const float quantized_range) {
     const float real_range = MaxAbs(*imax_range, *imin_range);
-    out[i] = in[i] * (real_range / quantized_range);
+    out[i]                 = in[i] * (real_range / quantized_range);
   }
 };
 
 inline bool DequantizeShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -90,12 +97,12 @@ inline bool DequantizeShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool DequantizeType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int> *in_attrs,
-                           std::vector<int> *out_attrs) {
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK(in_attrs->at(0) == mshadow::kUint8 || in_attrs->at(0) == mshadow::kInt8)
-    << "the input data type of dequantize op must be provided, either uint8 or int8";
+      << "the input data type of dequantize op must be provided, either uint8 or int8";
   TYPE_ASSIGN_CHECK(*in_attrs, 1, mshadow::kFloat32);
   TYPE_ASSIGN_CHECK(*in_attrs, 2, mshadow::kFloat32);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat32);
@@ -105,24 +112,33 @@ inline bool DequantizeType(const nnvm::NodeAttrs& attrs,
 template <typename xpu>
 class DequantizeOperator {
  public:
-  explicit DequantizeOperator(const nnvm::NodeAttrs &attrs) : attrs_(attrs) {}
-  void Forward(const OpContext &ctx, const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req, const std::vector<TBlob> &outputs) {
+  explicit DequantizeOperator(const nnvm::NodeAttrs& attrs) : attrs_(attrs) {}
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& inputs,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& outputs) {
     using namespace mshadow;
     using namespace mxnet_op;
     using mshadow::red::limits::MaxValue;
     using mshadow::red::limits::MinValue;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     if (inputs[0].type_flag_ == mshadow::kUint8) {
-      Kernel<dequantize_unsigned, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<float>(),
-                                               inputs[0].dptr<uint8_t>(), inputs[1].dptr<float>(),
-                                               inputs[2].dptr<float>(), MinValue<uint8_t>(),
+      Kernel<dequantize_unsigned, xpu>::Launch(s,
+                                               outputs[0].Size(),
+                                               outputs[0].dptr<float>(),
+                                               inputs[0].dptr<uint8_t>(),
+                                               inputs[1].dptr<float>(),
+                                               inputs[2].dptr<float>(),
+                                               MinValue<uint8_t>(),
                                                MaxValue<uint8_t>());
     } else if (inputs[0].type_flag_ == mshadow::kInt8) {
-      Kernel<dequantize_zero_centered, xpu>::Launch(
-          s, outputs[0].Size(), outputs[0].dptr<float>(), inputs[0].dptr<int8_t>(),
-          inputs[1].dptr<float>(), inputs[2].dptr<float>(),
-          MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
+      Kernel<dequantize_zero_centered, xpu>::Launch(s,
+                                                    outputs[0].Size(),
+                                                    outputs[0].dptr<float>(),
+                                                    inputs[0].dptr<int8_t>(),
+                                                    inputs[1].dptr<float>(),
+                                                    inputs[2].dptr<float>(),
+                                                    MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
     } else {
       LOG(FATAL) << "dequantize op only supports input type int8 or uint8";
     }
@@ -133,10 +149,12 @@ class DequantizeOperator {
 };
 
 template <typename xpu>
-static void DequantizeForward(const OpStatePtr &state_ptr, const OpContext &ctx,
-                              const std::vector<TBlob> &inputs, const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
-  auto &op = state_ptr.get_state<DequantizeOperator<xpu>>();
+static void DequantizeForward(const OpStatePtr& state_ptr,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
+  auto& op = state_ptr.get_state<DequantizeOperator<xpu>>();
   op.Forward(ctx, inputs, req, outputs);
 }
 
diff --git a/src/operator/quantization/dequantize.cc b/src/operator/quantization/dequantize.cc
index a12903d6492c..72324141153b 100644
--- a/src/operator/quantization/dequantize.cc
+++ b/src/operator/quantization/dequantize.cc
@@ -34,8 +34,8 @@ DMLC_REGISTER_PARAMETER(DequantizeParam);
 bool DequantizeStorageType(const nnvm::NodeAttrs& attrs,
                            const int dev_mask,
                            DispatchMode* dispatch_mode,
-                           std::vector<int> *in_attrs,
-                           std::vector<int> *out_attrs) {
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
   if (dev_mask == mshadow::cpu::kDevMask) {
@@ -46,9 +46,10 @@ bool DequantizeStorageType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-static OpStatePtr CreateDequantizeState(const nnvm::NodeAttrs &attrs, Context ctx,
-                                        const std::vector<TShape> &in_shapes,
-                                        const std::vector<int> &in_types) {
+static OpStatePtr CreateDequantizeState(const nnvm::NodeAttrs& attrs,
+                                        Context ctx,
+                                        const std::vector<TShape>& in_shapes,
+                                        const std::vector<int>& in_types) {
   OpStatePtr state;
   if (ctx.dev_type == kGPU) {
     state = OpStatePtr::Create<DequantizeOperator<gpu>>(attrs);
@@ -63,7 +64,7 @@ static OpStatePtr CreateDequantizeState(const nnvm::NodeAttrs &attrs, Context ct
 }
 
 NNVM_REGISTER_OP(_contrib_dequantize)
-.describe(R"code(Dequantize the input tensor into a float tensor.
+    .describe(R"code(Dequantize the input tensor into a float tensor.
 min_range and max_range are scalar floats that specify the range for
 the output data.
 
@@ -79,31 +80,36 @@ by keep zero centered for the quantized value:
 .. Note::
     This operator only supports forward propogation. DO NOT use it in training.
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<DequantizeParam>)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "min_range", "max_range"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", DequantizeShape)
-.set_attr<nnvm::FInferType>("FInferType", DequantizeType)
-.set_attr<FInferStorageType>("FInferStorageType", DequantizeStorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCreateOpState>("FCreateOpState", CreateDequantizeState)
+    .set_attr_parser(ParamParser<DequantizeParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "min_range", "max_range"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", DequantizeShape)
+    .set_attr<nnvm::FInferType>("FInferType", DequantizeType)
+    .set_attr<FInferStorageType>("FInferStorageType", DequantizeStorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateDequantizeState)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", SgMKLDNNDequantizeForward)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", SgMKLDNNDequantizeForward)
 #endif
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", DequantizeForward<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `uint8`")
-.add_argument("min_range", "NDArray-or-Symbol", "The minimum scalar value "
-  "possibly produced for the input in float32")
-.add_argument("max_range", "NDArray-or-Symbol", "The maximum scalar value "
-  "possibly produced for the input in float32")
-.add_arguments(DequantizeParam::__FIELDS__());
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", DequantizeForward<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `uint8`")
+    .add_argument("min_range",
+                  "NDArray-or-Symbol",
+                  "The minimum scalar value "
+                  "possibly produced for the input in float32")
+    .add_argument("max_range",
+                  "NDArray-or-Symbol",
+                  "The maximum scalar value "
+                  "possibly produced for the input in float32")
+    .add_arguments(DequantizeParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/dequantize.cu b/src/operator/quantization/dequantize.cu
index dee8b2207e01..a06bba6c6eae 100644
--- a/src/operator/quantization/dequantize.cu
+++ b/src/operator/quantization/dequantize.cu
@@ -28,7 +28,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_dequantize)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", DequantizeForward<gpu>);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", DequantizeForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantization_utils.h b/src/operator/quantization/quantization_utils.h
index 0d89570f05a6..5dfd59118af1 100644
--- a/src/operator/quantization/quantization_utils.h
+++ b/src/operator/quantization/quantization_utils.h
@@ -35,16 +35,16 @@ namespace op {
 using mshadow::red::limits::MaxValue;
 using mshadow::red::limits::MinValue;
 
-static const float kUint8Range = 255.5;
-static const float kInt8Range = 127.5;
+static const float kUint8Range  = 255.5;
+static const float kInt8Range   = 127.5;
 static const size_t kInt32Range = 0x7fffffff;
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE int Sign(T val) {
   return (val > T(0)) - (val < T(0));
 }
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE T Abs(T a) {
 #ifdef __CUDACC__
   return ::abs(a);
@@ -53,7 +53,7 @@ MSHADOW_XINLINE T Abs(T a) {
 #endif
 }
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE T Max(T a, T b) {
 #ifdef __CUDACC__
   return ::max(a, b);
@@ -62,7 +62,7 @@ MSHADOW_XINLINE T Max(T a, T b) {
 #endif
 }
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE T Min(T a, T b) {
 #ifdef __CUDACC__
   return ::min(a, b);
@@ -71,71 +71,81 @@ MSHADOW_XINLINE T Min(T a, T b) {
 #endif
 }
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE float MaxAbs(T a, T b) {
   return Max(Abs(static_cast<float>(a)), Abs(static_cast<float>(b)));
 }
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE float MinAbs(T a, T b) {
   return Min(Abs(static_cast<float>(a)), Abs(static_cast<float>(b)));
 }
 
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE T FloatToQuantized(float input, float min_range, float max_range) {
-  float real_range = MaxAbs(min_range, max_range);
+  float real_range      = MaxAbs(min_range, max_range);
   float quantized_range = MinAbs(MaxValue<T>(), MinValue<T>());
-  float scale = quantized_range / real_range;
+  float scale           = quantized_range / real_range;
   return Sign(input) * Min(Abs(input) * scale + 0.5f, quantized_range);
 }
 
 template <typename T>
 MSHADOW_XINLINE float QuantizedToFloat(T input, float min_range, float max_range) {
   float quantized_range = MinAbs(MinValue<T>(), MaxValue<T>());
-  float real_range = MaxAbs(min_range, max_range);
-  float scale = real_range / quantized_range;
+  float real_range      = MaxAbs(min_range, max_range);
+  float scale           = real_range / quantized_range;
   return input * scale;
 }
 
 struct QuantizedToFloatStruct {
-  template<typename T>
-  MSHADOW_XINLINE static void Map(int i, float *output, const T *input,
-                                  const float *range_min, const float *range_max) {
+  template <typename T>
+  MSHADOW_XINLINE static void Map(int i,
+                                  float* output,
+                                  const T* input,
+                                  const float* range_min,
+                                  const float* range_max) {
     output[i] = QuantizedToFloat(input[i], *range_min, *range_max);
   }
 };
 
 template <class T1, class T2>
-MSHADOW_XINLINE T2 RequantizeInNewRange(T1 input, float min_input, float max_input,
-                                        float min_new, float max_new) {
+MSHADOW_XINLINE T2
+RequantizeInNewRange(T1 input, float min_input, float max_input, float min_new, float max_new) {
   const float input_float = QuantizedToFloat<T1>(input, min_input, max_input);
   return FloatToQuantized<T2>(input_float, min_new, max_new);
 }
 
 template <class T1, class T2>
-MSHADOW_XINLINE void RequantizeManyInNewRange(size_t count, T2* output, const T1 *input,
-                                              float input_min, float input_max,
-                                              float actual_min, float actual_max) {
+MSHADOW_XINLINE void RequantizeManyInNewRange(size_t count,
+                                              T2* output,
+                                              const T1* input,
+                                              float input_min,
+                                              float input_max,
+                                              float actual_min,
+                                              float actual_max) {
   for (size_t i = 0; i < count; ++i) {
-    const float input_float =
-        QuantizedToFloat<T1>(input[i], input_min, input_max);
-    output[i] = FloatToQuantized<T2>(input_float, actual_min, actual_max);
+    const float input_float = QuantizedToFloat<T1>(input[i], input_min, input_max);
+    output[i]               = FloatToQuantized<T2>(input_float, actual_min, actual_max);
   }
 }
 
 /*!
  * \brief Get the scaling factor for converting type T to float.
  */
-template<typename T>
+template <typename T>
 MSHADOW_XINLINE float FloatForOneQuantizedLevel(float range_min, float range_max, bool all_sign) {
   float range_data = MaxAbs(range_min, range_max);
-  float range_T = all_sign ? MinAbs(MinValue<T>(), MaxValue<T>()) : MaxValue<T>();
+  float range_T    = all_sign ? MinAbs(MinValue<T>(), MaxValue<T>()) : MaxValue<T>();
   return range_data / range_T;
 }
 
 template <typename TA, typename TB, typename TC>
-MSHADOW_XINLINE void QuantizationRangeForMultiplication(float min_a, float max_a, float min_b,
-                                                        float max_b, float *min_c, float *max_c,
+MSHADOW_XINLINE void QuantizationRangeForMultiplication(float min_a,
+                                                        float max_a,
+                                                        float min_b,
+                                                        float max_b,
+                                                        float* min_c,
+                                                        float* max_c,
                                                         bool all_sign) {
   const float a_float_for_one_quant_level = FloatForOneQuantizedLevel<TA>(min_a, max_a, all_sign);
   const float b_float_for_one_quant_level = FloatForOneQuantizedLevel<TB>(min_b, max_b, all_sign);
@@ -149,31 +159,31 @@ MSHADOW_XINLINE void QuantizationRangeForMultiplication(float min_a, float max_a
 
 struct QuantizationRangeForS8S8MultiplicationStruct {
   MSHADOW_XINLINE static void Map(int i,
-                                  float *min_c,
-                                  float *max_c,
-                                  const float *min_a,
-                                  const float *max_a,
-                                  const float *min_b,
-                                  const float *max_b) {
-  QuantizationRangeForMultiplication<int8_t, int8_t, int32_t>(
-    min_a[i], max_a[i], min_b[i], max_b[i], min_c, max_c, true);
+                                  float* min_c,
+                                  float* max_c,
+                                  const float* min_a,
+                                  const float* max_a,
+                                  const float* min_b,
+                                  const float* max_b) {
+    QuantizationRangeForMultiplication<int8_t, int8_t, int32_t>(
+        min_a[i], max_a[i], min_b[i], max_b[i], min_c, max_c, true);
   }
 };
 
 struct QuantizationRangeForS8U8MultiplicationStruct {
   MSHADOW_XINLINE static void Map(int i,
-                                  float *min_c,
-                                  float *max_c,
-                                  const float *min_a,
-                                  const float *max_a,
-                                  const float *min_b,
-                                  const float *max_b) {
-  QuantizationRangeForMultiplication<int8_t, uint8_t, int32_t>(
-    min_a[i], max_a[i], min_b[i], max_b[i], min_c, max_c, false);
+                                  float* min_c,
+                                  float* max_c,
+                                  const float* min_a,
+                                  const float* max_a,
+                                  const float* min_b,
+                                  const float* max_b) {
+    QuantizationRangeForMultiplication<int8_t, uint8_t, int32_t>(
+        min_a[i], max_a[i], min_b[i], max_b[i], min_c, max_c, false);
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 inline size_t ConfigReduce(mshadow::Stream<xpu>* s,
                            const mxnet::TShape& data_shape,
                            const mxnet::TShape& out_shape,
@@ -189,8 +199,8 @@ inline size_t ConfigReduce(mshadow::Stream<xpu>* s,
 
 enum QuantizeOutType { kAuto = 0, kInt8, kUint8 };
 
-template<typename Param>
-static mshadow::TypeFlag GetQuantizeOutputType(const Param &param) {
+template <typename Param>
+static mshadow::TypeFlag GetQuantizeOutputType(const Param& param) {
   auto out_type = mshadow::kInt8;
   if (param.out_type == QuantizeOutType::kAuto) {
     if (param.min_calib_range.has_value() && param.max_calib_range.has_value()) {
@@ -205,13 +215,13 @@ static mshadow::TypeFlag GetQuantizeOutputType(const Param &param) {
   } else if (param.out_type == QuantizeOutType::kUint8) {
     out_type = mshadow::kUint8;
   } else {
-    LOG(FATAL) << "Unsupported out_type in params: " <<param.out_type;
+    LOG(FATAL) << "Unsupported out_type in params: " << param.out_type;
   }
   return out_type;
 }
 
 static inline float GetQuantizeScale(const int dtype, const float data_min, const float data_max) {
-  const float real_data_range = MaxAbs(data_min, data_max);
+  const float real_data_range     = MaxAbs(data_min, data_max);
   const auto quantized_data_range = (dtype == mshadow::kInt8) ? kInt8Range : kUint8Range;
   // If real_data_range == 0, to avoid `inf` in scale, use a large number here, which is MAX_INT.
   return real_data_range ? quantized_data_range / real_data_range : MaxValue<int32_t>();
diff --git a/src/operator/quantization/quantize-inl.h b/src/operator/quantization/quantize-inl.h
index 5108b130e1ab..f67f62b2ca57 100644
--- a/src/operator/quantization/quantize-inl.h
+++ b/src/operator/quantization/quantize-inl.h
@@ -37,51 +37,58 @@ namespace mxnet {
 namespace op {
 
 struct QuantizeParam : public dmlc::Parameter<QuantizeParam> {
-  int   out_type;
+  int out_type;
   DMLC_DECLARE_PARAMETER(QuantizeParam) {
     DMLC_DECLARE_FIELD(out_type)
-    .add_enum("int8", mshadow::kInt8)
-    .add_enum("uint8", mshadow::kUint8)
-    .set_default(mshadow::kUint8)
-    .describe("Output data type.");
+        .add_enum("int8", mshadow::kInt8)
+        .add_enum("uint8", mshadow::kUint8)
+        .set_default(mshadow::kUint8)
+        .describe("Output data type.");
   }
 };
 
 // quantize float to uint8_t
 struct quantize_unsigned {
-  template<typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range,
-                                  float *omax_range, const SrcDType *in,
-                                  const float *imin_range, const float *imax_range,
-                                  const double min_limit, const double max_limit) {
-    using mshadow::red::limits::MinValue;
+  template <typename DstDType, typename SrcDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range,
+                                  const double min_limit,
+                                  const double max_limit) {
     using mshadow::red::limits::MaxValue;
+    using mshadow::red::limits::MinValue;
     const float scale = (max_limit - min_limit) / (*imax_range - *imin_range);
-    out[i] = static_cast<DstDType>((in[i] - *imin_range) * scale + 0.5);
-    *omin_range = *imin_range;
-    *omax_range = *imax_range;
+    out[i]            = static_cast<DstDType>((in[i] - *imin_range) * scale + 0.5);
+    *omin_range       = *imin_range;
+    *omax_range       = *imax_range;
   }
 };
 
-
 // keep zero-center
 struct quantize_zero_centered {
-  template<typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range,
-                                  float *omax_range, const SrcDType *in,
-                                  const float *imin_range, const float *imax_range,
+  template <typename DstDType, typename SrcDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range,
                                   const float quantized_range) {
     float real_range = MaxAbs(*imin_range, *imax_range);
-    float scale = quantized_range / real_range;
-    SrcDType x = in[i];
-    out[i] = static_cast<DstDType>(
-        Sign(x) * Min(Abs(x) * scale + 0.5f, quantized_range));
-    *omin_range = -real_range;
-    *omax_range =  real_range;
+    float scale      = quantized_range / real_range;
+    SrcDType x       = in[i];
+    out[i]           = static_cast<DstDType>(Sign(x) * Min(Abs(x) * scale + 0.5f, quantized_range));
+    *omin_range      = -real_range;
+    *omax_range      = real_range;
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void QuantizeCompute(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -89,9 +96,9 @@ void QuantizeCompute(const nnvm::NodeAttrs& attrs,
                      const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  using mshadow::red::limits::MinValue;
   using mshadow::red::limits::MaxValue;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  using mshadow::red::limits::MinValue;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   const QuantizeParam& param = nnvm::get<QuantizeParam>(attrs.parsed);
   if (param.out_type == mshadow::kUint8) {
@@ -99,23 +106,34 @@ void QuantizeCompute(const nnvm::NodeAttrs& attrs,
       LOG(FATAL) << "currently, uint8 quantization is only supported by CPU, "
                     "please switch to the context of CPU or int8 data type for GPU.";
     }
-    Kernel<quantize_unsigned, xpu>::Launch(s, outputs[0].Size(),
-      outputs[0].dptr<uint8_t>(), outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-      inputs[0].dptr<float>(), inputs[1].dptr<float>(), inputs[2].dptr<float>(),
-      MinValue<uint8_t>(), MaxValue<uint8_t>());
+    Kernel<quantize_unsigned, xpu>::Launch(s,
+                                           outputs[0].Size(),
+                                           outputs[0].dptr<uint8_t>(),
+                                           outputs[1].dptr<float>(),
+                                           outputs[2].dptr<float>(),
+                                           inputs[0].dptr<float>(),
+                                           inputs[1].dptr<float>(),
+                                           inputs[2].dptr<float>(),
+                                           MinValue<uint8_t>(),
+                                           MaxValue<uint8_t>());
   } else if (param.out_type == mshadow::kInt8) {  // zero-centered quantization
-    Kernel<quantize_zero_centered, xpu>::Launch(s, outputs[0].Size(),
-      outputs[0].dptr<int8_t>(), outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-      inputs[0].dptr<float>(), inputs[1].dptr<float>(), inputs[2].dptr<float>(),
-      MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
+    Kernel<quantize_zero_centered, xpu>::Launch(s,
+                                                outputs[0].Size(),
+                                                outputs[0].dptr<int8_t>(),
+                                                outputs[1].dptr<float>(),
+                                                outputs[2].dptr<float>(),
+                                                inputs[0].dptr<float>(),
+                                                inputs[1].dptr<float>(),
+                                                inputs[2].dptr<float>(),
+                                                MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
   } else {
     LOG(FATAL) << "quantize op only supports int8 and uint8 as output type";
   }
 }
 
 inline bool QuantizeShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 3U);
 
@@ -137,8 +155,8 @@ inline bool QuantizeShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool QuantizeType(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 3U);
   const QuantizeParam& param = nnvm::get<QuantizeParam>(attrs.parsed);
diff --git a/src/operator/quantization/quantize.cc b/src/operator/quantization/quantize.cc
index c271bbabfe91..8e4552ef5c25 100644
--- a/src/operator/quantization/quantize.cc
+++ b/src/operator/quantization/quantize.cc
@@ -34,8 +34,8 @@ DMLC_REGISTER_PARAMETER(QuantizeParam);
 bool QuantizeStorageType(const nnvm::NodeAttrs& attrs,
                          const int dev_mask,
                          DispatchMode* dispatch_mode,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                         std::vector<int>* in_attrs,
+                         std::vector<int>* out_attrs) {
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
   if (dev_mask == mshadow::cpu::kDevMask) {
@@ -49,8 +49,8 @@ bool QuantizeStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantize)
-.add_alias("_npx_contrib_quantize")
-.describe(R"code(Quantize a input tensor from float to `out_type`,
+    .add_alias("_npx_contrib_quantize")
+    .describe(R"code(Quantize a input tensor from float to `out_type`,
 with user-specified `min_range` and `max_range`.
 
 min_range and max_range are scalar floats that specify the range for
@@ -73,30 +73,35 @@ where
 
 .. Note::
     This operator only supports forward propagation. DO NOT use it in training.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<QuantizeParam>)
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "min_range", "max_range"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizeShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizeType)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizeStorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr_parser(ParamParser<QuantizeParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "min_range", "max_range"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizeShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizeType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizeStorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", MKLDNNQuantizeCompute)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", MKLDNNQuantizeCompute)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", QuantizeCompute<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
-.add_argument("min_range", "NDArray-or-Symbol", "The minimum scalar value "
-  "possibly produced for the input")
-.add_argument("max_range", "NDArray-or-Symbol", "The maximum scalar value "
-  "possibly produced for the input")
-.add_arguments(QuantizeParam::__FIELDS__());
+    .set_attr<FCompute>("FCompute<cpu>", QuantizeCompute<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
+    .add_argument("min_range",
+                  "NDArray-or-Symbol",
+                  "The minimum scalar value "
+                  "possibly produced for the input")
+    .add_argument("max_range",
+                  "NDArray-or-Symbol",
+                  "The maximum scalar value "
+                  "possibly produced for the input")
+    .add_arguments(QuantizeParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantize.cu b/src/operator/quantization/quantize.cu
index d50eb25fe6c6..a19584573ab9 100644
--- a/src/operator/quantization/quantize.cu
+++ b/src/operator/quantization/quantize.cu
@@ -27,8 +27,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_contrib_quantize)
-.set_attr<FCompute>("FCompute<gpu>", QuantizeCompute<gpu>);
+NNVM_REGISTER_OP(_contrib_quantize).set_attr<FCompute>("FCompute<gpu>", QuantizeCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantize_graph_pass.cc b/src/operator/quantization/quantize_graph_pass.cc
index 7e1a9288c99b..dab8d50d2b0a 100644
--- a/src/operator/quantization/quantize_graph_pass.cc
+++ b/src/operator/quantization/quantize_graph_pass.cc
@@ -37,11 +37,11 @@
 namespace mxnet {
 namespace op {
 
-using nnvm::Symbol;
+using nnvm::Graph;
 using nnvm::Node;
-using nnvm::ObjectPtr;
 using nnvm::NodeEntry;
-using nnvm::Graph;
+using nnvm::ObjectPtr;
+using nnvm::Symbol;
 
 static inline std::string GetOutputName(const nnvm::Node* node, int index) {
   // Map where Key is Op and Value is function registered by FListOutputNames
@@ -75,13 +75,13 @@ static inline size_t GetNumOutputs(ObjectPtr node) {
 }
 
 ObjectPtr CreateNode(std::string op_name, std::string node_name) {
-  ObjectPtr node = Node::Create();
+  ObjectPtr node   = Node::Create();
   node->attrs.name = node_name;
   if (op_name == "nullptr") {
     node->attrs.op = nullptr;
     // ugly workaround because VariableParam is not exposed
     node->attrs.parsed =
-      nnvm::Symbol::CreateVariable(node->attrs.name).outputs[0].node->attrs.parsed;
+        nnvm::Symbol::CreateVariable(node->attrs.name).outputs[0].node->attrs.parsed;
   } else {
     node->attrs.op = Op::Get(op_name);
   }
@@ -93,7 +93,9 @@ ObjectPtr CreateNode(std::string op_name, std::string node_name) {
  * before the node current and after the node previous.
  */
 ObjectPtr InsertNode(std::string op_name,
-    std::string node_name, ObjectPtr current, NodeEntry previous) {
+                     std::string node_name,
+                     ObjectPtr current,
+                     NodeEntry previous) {
   ObjectPtr node = CreateNode(op_name, node_name);
   node->inputs.emplace_back(previous);
   current->inputs.emplace_back(node);
@@ -106,8 +108,7 @@ std::vector<NodeEntry> OfflineParams(std::vector<NodeEntry>&& outputs,
   std::unordered_map<Node*, ObjectPtr> mirror_map;
   nnvm::NodeEntryMap<ObjectPtr> entry_var;
   auto need_offline = [&](ObjectPtr n) {
-    return (n->op() == Op::Get("_contrib_quantize_v2")) &&
-           n->inputs[0].node->is_variable() &&
+    return (n->op() == Op::Get("_contrib_quantize_v2")) && n->inputs[0].node->is_variable() &&
            offline_params.count(n->inputs[0].node->attrs.name);
   };
   DFSVisit(outputs, [&](const ObjectPtr& node) {
@@ -117,8 +118,8 @@ std::vector<NodeEntry> OfflineParams(std::vector<NodeEntry>&& outputs,
         if (!entry_var.count(e)) {
           entry_var[e] = CreateNode("nullptr", node_name + node_suffixs[e.index]);
         }
-        e.node = entry_var[e];
-        e.index = 0;
+        e.node    = entry_var[e];
+        e.index   = 0;
         e.version = 0;
       }
     }
@@ -128,16 +129,16 @@ std::vector<NodeEntry> OfflineParams(std::vector<NodeEntry>&& outputs,
 
 // To check if a node is registered with a computation function on a target device.
 bool isRegistered(ObjectPtr node, const int& dev_type) {
-  const auto& op = node->op();
-  Context ctx = Context::Create(static_cast<Context::DeviceType>(dev_type), 0);
-  FCompute fcompute = common::GetFCompute<FCompute>(op, "FCompute", ctx);
+  const auto& op      = node->op();
+  Context ctx         = Context::Create(static_cast<Context::DeviceType>(dev_type), 0);
+  FCompute fcompute   = common::GetFCompute<FCompute>(op, "FCompute", ctx);
   FComputeEx fcomp_ex = common::GetFCompute<FComputeEx>(op, "FComputeEx", ctx);
   FStatefulCompute fcomputestateful =
       common::GetFCompute<FStatefulCompute>(op, "FStatefulCompute", ctx);
   FStatefulComputeEx fcomputestateful_ex =
       common::GetFCompute<FStatefulComputeEx>(op, "FStatefulComputeEx", ctx);
-  return (fcompute != nullptr || fcomp_ex != nullptr ||
-          fcomputestateful != nullptr || fcomputestateful_ex != nullptr);
+  return (fcompute != nullptr || fcomp_ex != nullptr || fcomputestateful != nullptr ||
+          fcomputestateful_ex != nullptr);
 }
 
 inline QuantizeType NeedQuantize(ObjectPtr node,
@@ -147,11 +148,11 @@ inline QuantizeType NeedQuantize(ObjectPtr node,
                                  std::unordered_map<ObjectPtr, ObjectPtr>* quantized_node_map,
                                  const std::string quantize_granularity) {
   std::unordered_map<ObjectPtr, ObjectPtr> quantized_node;
-  static auto& quantizable_map = Op::GetAttr<mxnet::FQuantizable>("FQuantizable");
+  static auto& quantizable_map  = Op::GetAttr<mxnet::FQuantizable>("FQuantizable");
   static auto& quantized_op_map = Op::GetAttr<mxnet::FQuantizedOp>("FQuantizedOp");
-  static auto& fexec_type = nnvm::Op::GetAttr<FExecType>("FExecType");
-  const auto& op = node->op();
-  bool need = false;
+  static auto& fexec_type       = nnvm::Op::GetAttr<FExecType>("FExecType");
+  const auto& op                = node->op();
+  bool need                     = false;
   if (op && quantized_op_map.count(op)) {
     need = true;
     // If the quantized node is not registered with a computation function, the node
@@ -163,8 +164,7 @@ inline QuantizeType NeedQuantize(ObjectPtr node,
                 << " is excluded automatically.";
       need = false;
     } else {
-      if (excluded_nodes.count(node->attrs.name) ||
-          excluded_ops.count(node->op()->name)) {
+      if (excluded_nodes.count(node->attrs.name) || excluded_ops.count(node->op()->name)) {
         need = false;
       } else if (!node->attrs.subgraphs.empty()) {
         ExecType exec_type = fexec_type.count(op) ? fexec_type[op](node->attrs) : ExecType::kSync;
@@ -173,7 +173,8 @@ inline QuantizeType NeedQuantize(ObjectPtr node,
           CHECK_EQ(node->attrs.subgraphs.size(), 1);
           auto subgraph_sym = node->attrs.subgraphs[0];
           DFSVisit(subgraph_sym->outputs, [&](const nnvm::ObjectPtr& n) {
-            if (n->is_variable()) return;
+            if (n->is_variable())
+              return;
             if (excluded_nodes.count(n->attrs.name)) {
               need = false;
             }
@@ -183,7 +184,8 @@ inline QuantizeType NeedQuantize(ObjectPtr node,
     }
     if (need) {
       auto quantized_node = quantized_op_map[op](node->attrs);
-      if (!quantized_node->op()) need = false;
+      if (!quantized_node->op())
+        need = false;
       if (need) {
         if ((quantize_granularity == "channel-wise") &&
             (node->op() == Op::Get("_sg_mkldnn_fully_connected"))) {
@@ -203,16 +205,16 @@ inline QuantizeType NeedQuantize(ObjectPtr node,
 }
 
 enum quantize_bit {
-  kFromInput = 1,
+  kFromInput  = 1,
   kFromOutput = 2,
 };
 
 static void MarkQuantizedNodes(const Graph& src,
                                std::unordered_map<ObjectPtr, ObjectPtr>* quantized_node_map) {
-  const auto excluded_nodes = src.GetAttr<std::unordered_set<std::string>>("excluded_nodes");
-  const auto excluded_ops = src.GetAttr<std::unordered_set<std::string>>("excluded_ops");
-  const auto quantize_mode = src.GetAttr<std::string>("quantize_mode");
-  const auto dev_type = src.GetAttr<int>("target_ctx");
+  const auto excluded_nodes       = src.GetAttr<std::unordered_set<std::string>>("excluded_nodes");
+  const auto excluded_ops         = src.GetAttr<std::unordered_set<std::string>>("excluded_ops");
+  const auto quantize_mode        = src.GetAttr<std::string>("quantize_mode");
+  const auto dev_type             = src.GetAttr<int>("target_ctx");
   const auto quantize_granularity = src.GetAttr<std::string>("quantize_granularity");
 
   std::unordered_map<ObjectPtr, std::vector<ObjectPtr>> node_output_map;
@@ -220,9 +222,8 @@ static void MarkQuantizedNodes(const Graph& src,
   std::unordered_map<ObjectPtr, int> support_quantize_nodes;
   // Build node_output_map, must_quantize_nodes and support_quantize_nodes;
   DFSVisit(src.outputs, [&](const ObjectPtr& node) {
-    auto quantize_type =
-        NeedQuantize(node, excluded_nodes, excluded_ops, dev_type,
-                     quantized_node_map, quantize_granularity);
+    auto quantize_type = NeedQuantize(
+        node, excluded_nodes, excluded_ops, dev_type, quantized_node_map, quantize_granularity);
     if (quantize_type == QuantizeType::kMust) {
       must_quantize_nodes.insert(node);
     } else if (quantize_type == QuantizeType::kSupport) {
@@ -244,9 +245,9 @@ static void MarkQuantizedNodes(const Graph& src,
     while (!task_queue.empty()) {
       const auto& node = task_queue.front();
       task_queue.pop();
-      for (auto & i : node->inputs) {
+      for (auto& i : node->inputs) {
         const auto& input = i.node;
-        auto it = support_quantize_nodes.find(input);
+        auto it           = support_quantize_nodes.find(input);
         if (it != support_quantize_nodes.end()) {
           it->second = it->second | kFromInput;
           task_queue.push(input);
@@ -262,7 +263,7 @@ static void MarkQuantizedNodes(const Graph& src,
       const auto& node = task_queue.front();
       task_queue.pop();
       const auto& outputs = node_output_map[node];
-      for (const auto & output : outputs) {
+      for (const auto& output : outputs) {
         auto it = support_quantize_nodes.find(output);
         if (it != support_quantize_nodes.end()) {
           it->second = it->second | kFromOutput;
@@ -283,15 +284,15 @@ static void MarkQuantizedNodes(const Graph& src,
   }
 }
 
-Graph QuantizeGraph(Graph &&src) {
+Graph QuantizeGraph(Graph&& src) {
   static const auto& need_requantize_map = Op::GetAttr<mxnet::FNeedRequantize>("FNeedRequantize");
   static const auto& avoid_quantize_input_map =
       Op::GetAttr<mxnet::FAvoidQuantizeInput>("FAvoidQuantizeInput");
   static const auto& flist_inputs = nnvm::Op::GetAttr<nnvm::FListOutputNames>("FListInputNames");
-  const auto offline_params = src.GetAttr<std::unordered_set<std::string>>("offline_params");
-  const auto quantized_dtype = src.GetAttr<std::string>("quantized_dtype");
+  const auto offline_params       = src.GetAttr<std::unordered_set<std::string>>("offline_params");
+  const auto quantized_dtype      = src.GetAttr<std::string>("quantized_dtype");
   const auto quantize_granularity = src.GetAttr<std::string>("quantize_granularity");
-  const auto dev_type = src.GetAttr<int>("target_ctx");
+  const auto dev_type             = src.GetAttr<int>("target_ctx");
 
   if (dev_type == Context::kGPU && quantize_granularity == "channel-wise") {
     LOG(FATAL) << "`channel-wise` quantization option is not supported yet by GPU,"
@@ -320,10 +321,9 @@ Graph QuantizeGraph(Graph &&src) {
 
       // add data into quantized op input
       for (size_t i = 0; i < node->inputs.size(); ++i) {
-        const auto& e = node->inputs[i];
-        ObjectPtr mirror_node = mirror_map.at(e.node.get());
-        NodeEntry mirror_entry = NodeEntry{
-          mirror_node, e.index, e.version};
+        const auto& e          = node->inputs[i];
+        ObjectPtr mirror_node  = mirror_map.at(e.node.get());
+        NodeEntry mirror_entry = NodeEntry{mirror_node, e.index, e.version};
         // If the NodeEntry e's node does not need quantization, and (the mirror_node is a variable,
         // or the mirror_node's op is not a quantize op), create quantize op, min op, and max op
         // taking mirror_entry as input to generate a quantized NDArray. Save the mapping between
@@ -340,24 +340,24 @@ Graph QuantizeGraph(Graph &&src) {
             // index (or output name) into quantize/min/max node to distinguish them.
             // Or the output name is not ending with 'output', just put the output name here
             // to better align with calibration phase. No need to change name to weights/bias.
-            std::string suffix = "";
+            std::string suffix   = "";
             std::string new_name = e.node->attrs.name;
 
             if (mirror_node->op() != nullptr) {
               std::string name = GetOutputName(e.node.get(), e.index);
-              suffix = "_" + name;
+              suffix           = "_" + name;
             } else if (!offline_params.count(new_name)) {
               std::string input_name;
               if (flist_inputs.count(node->op())) {
                 input_name = flist_inputs[node->op()](node->attrs)[i];
-                new_name = node->attrs.name + "_" + input_name;
+                new_name   = node->attrs.name + "_" + input_name;
               } else {
                 new_name = node->attrs.name + "_" + e.node->attrs.name;
               }
             }
 
-            ObjectPtr quantize_node = InsertNode("_contrib_quantize_v2",
-              new_name + suffix + "_quantize", new_node, mirror_entry);
+            ObjectPtr quantize_node = InsertNode(
+                "_contrib_quantize_v2", new_name + suffix + "_quantize", new_node, mirror_entry);
             quantize_node->attrs.dict["out_type"] = quantized_dtype;
             quantize_node->op()->attr_parser(&(quantize_node->attrs));
             mirror_entry_map[e] = NodeEntry{quantize_node, 0, e.version};
@@ -375,13 +375,12 @@ Graph QuantizeGraph(Graph &&src) {
       // add min and max into quantized op input assume order of quantized op inputs is:
       // data1, data2, ..., min1, max1, min2, max2, ...
       for (size_t i = 0; i < node->inputs.size(); ++i) {
-        const auto& e = node->inputs[i];
+        const auto& e         = node->inputs[i];
         ObjectPtr mirror_node = mirror_map.at(e.node.get());
         if (mirror_node->op() == Op::Get("_contrib_dequantize")) {
           mirror_node = mirror_node->inputs[0].node;
         }
-        NodeEntry mirror_entry = NodeEntry{
-          mirror_node, e.index, e.version};
+        NodeEntry mirror_entry = NodeEntry{mirror_node, e.index, e.version};
         // for quantize node
         uint32_t min_index = 1;
         uint32_t max_index = 2;
@@ -396,11 +395,10 @@ Graph QuantizeGraph(Graph &&src) {
           // there is only 1min and 1max output from mirror node (which is
           // currently true)
           size_t num_outputs = GetNumOutputs(mirror_node) - 2;
-          min_index = num_outputs + 2 * e.index;
-          max_index = num_outputs + 2 * e.index + 1;
+          min_index          = num_outputs + 2 * e.index;
+          max_index          = num_outputs + 2 * e.index + 1;
         } else {
-          CHECK(mirror_entry_map.count(e))
-              << "The input is not quantize or quantized_op";
+          CHECK(mirror_entry_map.count(e)) << "The input is not quantize or quantized_op";
         }
         if (mirror_entry_map.count(e)) {
           auto quantize_entry = mirror_entry_map[e];
@@ -417,9 +415,9 @@ Graph QuantizeGraph(Graph &&src) {
       // out_data, min_range, and max_range.
       if (need_requantize_map.count(new_node->op()) > 0 &&
           need_requantize_map[new_node->op()](new_node->attrs)) {
-        ObjectPtr requantize_node = Node::Create();
-        requantize_node->attrs.op = Op::Get("_contrib_requantize");
-        requantize_node->attrs.name = "requantize_" + node->attrs.name;
+        ObjectPtr requantize_node               = Node::Create();
+        requantize_node->attrs.op               = Op::Get("_contrib_requantize");
+        requantize_node->attrs.name             = "requantize_" + node->attrs.name;
         requantize_node->attrs.dict["out_type"] = quantized_dtype;
         if (requantize_node->op()->attr_parser != nullptr) {
           requantize_node->op()->attr_parser(&(requantize_node->attrs));
@@ -440,9 +438,8 @@ Graph QuantizeGraph(Graph &&src) {
       *new_node = *node;
       new_node->inputs.clear();
       for (const auto& e : node->inputs) {
-        ObjectPtr mirror_node = mirror_map.at(e.node.get());
-        NodeEntry mirror_entry = NodeEntry{
-          mirror_node, e.index, e.version};
+        ObjectPtr mirror_node  = mirror_map.at(e.node.get());
+        NodeEntry mirror_entry = NodeEntry{mirror_node, e.index, e.version};
         // if input node is quantized operator, add dequantize node
         if (quantized_node_map.count(e.node) &&
             (mirror_node->op() != Op::Get("_contrib_dequantize"))) {
@@ -453,15 +450,15 @@ Graph QuantizeGraph(Graph &&src) {
           size_t num_outputs = GetNumOutputs(mirror_node) - 2;
           uint32_t min_index = num_outputs + 2 * e.index;
           uint32_t max_index = num_outputs + 2 * e.index + 1;
-          ObjectPtr dequantize_node = CreateNode("_contrib_dequantize",
-            e.node->attrs.name + "_dequantize");
+          ObjectPtr dequantize_node =
+              CreateNode("_contrib_dequantize", e.node->attrs.name + "_dequantize");
           dequantize_node->inputs.emplace_back(mirror_entry);
           dequantize_node->inputs.emplace_back(mirror_node, min_index, 0);
           dequantize_node->inputs.emplace_back(mirror_node, max_index, 0);
           dequantize_node->op()->attr_parser(&(dequantize_node->attrs));
 
           new_node->inputs.emplace_back(dequantize_node, 0, 0);
-          mirror_map[e.node.get()] = dequantize_node;
+          mirror_map[e.node.get()]            = dequantize_node;
           reverse_mirror_map[dequantize_node] = e.node;
         } else if (mirror_entry_map.count(e)) {
           new_node->inputs.emplace_back(
@@ -471,7 +468,7 @@ Graph QuantizeGraph(Graph &&src) {
         }
       }
     }
-    mirror_map[node.get()] = new_node;
+    mirror_map[node.get()]       = new_node;
     reverse_mirror_map[new_node] = node;
   });
 
@@ -479,7 +476,7 @@ Graph QuantizeGraph(Graph &&src) {
   for (const auto& e : src.outputs) {
     if (quantized_node_map.count(e.node)) {
       // Only insert dequantize for those Ops supports quantize and not excluded.
-      ObjectPtr mirror_node = mirror_map.at(e.node.get());
+      ObjectPtr mirror_node  = mirror_map.at(e.node.get());
       NodeEntry mirror_entry = NodeEntry{mirror_node, e.index, e.version};
       // here we calculate the output number (exclude min/max, in order to
       // calculate min/max index from mirror node) based on assumption that
@@ -489,8 +486,8 @@ Graph QuantizeGraph(Graph &&src) {
       uint32_t min_index = num_outputs + 2 * e.index;
       uint32_t max_index = num_outputs + 2 * e.index + 1;
 
-      ObjectPtr dequantize_node = CreateNode("_contrib_dequantize",
-          e.node->attrs.name + "_dequantize");
+      ObjectPtr dequantize_node =
+          CreateNode("_contrib_dequantize", e.node->attrs.name + "_dequantize");
       dequantize_node->inputs.emplace_back(mirror_entry);
       dequantize_node->inputs.emplace_back(mirror_node, min_index, 0);
       dequantize_node->inputs.emplace_back(mirror_node, max_index, 0);
@@ -501,7 +498,8 @@ Graph QuantizeGraph(Graph &&src) {
     }
   }
 
-  if (!offline_params.empty()) outputs = OfflineParams(std::move(outputs), offline_params);
+  if (!offline_params.empty())
+    outputs = OfflineParams(std::move(outputs), offline_params);
 
   Graph ret;
   ret.outputs = std::move(outputs);
@@ -518,19 +516,18 @@ Graph QuantizeGraph(Graph &&src) {
       // find nodes where input is variable node
       // and add proper input_name to calib_nodes
       for (int i = 0; i < node->inputs.size(); i++) {
-        const auto &input_node = node->inputs[i];
+        const auto& input_node = node->inputs[i];
         if (calib_variables.find(input_node.node) != std::end(calib_variables)) {
-          auto fp32_node = std::find_if(std::begin(quantized_node_map),
-                                        std::end(quantized_node_map),
-                                        [&](const std::pair<ObjectPtr, ObjectPtr> &pair) {
-                                              return pair.second == node;
-                                          });
+          auto fp32_node = std::find_if(
+              std::begin(quantized_node_map),
+              std::end(quantized_node_map),
+              [&](const std::pair<ObjectPtr, ObjectPtr>& pair) { return pair.second == node; });
           if (fp32_node != std::end(quantized_node_map)) {
             const auto& fp32_in_node = fp32_node->first;
             std::string node_input_name;
             if (flist_inputs.count(fp32_in_node->op())) {
               std::string op_input_name = flist_inputs[fp32_in_node->op()](fp32_in_node->attrs)[i];
-              node_input_name = fp32_in_node->attrs.name + "_" + op_input_name;
+              node_input_name           = fp32_in_node->attrs.name + "_" + op_input_name;
             } else {
               node_input_name = fp32_in_node->attrs.name + "_" + input_node.node->attrs.name;
             }
@@ -542,10 +539,10 @@ Graph QuantizeGraph(Graph &&src) {
     }
     if (need_calib_input_map.count(node->op())) {
       const auto calib_idx = need_calib_input_map[node->op()](node->attrs);
-      for (const auto &idx : calib_idx) {
+      for (const auto& idx : calib_idx) {
         if (reverse_mirror_map.count(node)) {
           const auto& fp32_in_node = reverse_mirror_map[node];
-          std::string name = GetOutputName(fp32_in_node.get(), node->inputs[idx].index);
+          std::string name         = GetOutputName(fp32_in_node.get(), node->inputs[idx].index);
           calib_nodes.push_back(fp32_in_node->attrs.name + "_" + name);
         } else {
           const auto& e = node->inputs[idx];
@@ -560,7 +557,7 @@ Graph QuantizeGraph(Graph &&src) {
           } else {
             if (reverse_mirror_map.count(e.node)) {
               const auto& fp32_in_node = reverse_mirror_map.at(e.node);
-              std::string name = GetOutputName(fp32_in_node.get(), e.index);
+              std::string name         = GetOutputName(fp32_in_node.get(), e.index);
               calib_nodes.push_back(fp32_in_node->attrs.name + "_" + name);
             } else {
               LOG(FATAL) << "Can't find calibration node for " << node->attrs.name;
@@ -573,7 +570,7 @@ Graph QuantizeGraph(Graph &&src) {
       for (const auto& idx : calib_idx) {
         if (reverse_mirror_map.count(node)) {
           const auto& fp32_in_node = reverse_mirror_map[node];
-          std::string name = GetOutputName(fp32_in_node.get(), static_cast<uint32_t>(idx));
+          std::string name         = GetOutputName(fp32_in_node.get(), static_cast<uint32_t>(idx));
           calib_nodes.push_back(fp32_in_node->attrs.name + "_" + name);
         } else {
           std::string name = GetOutputName(node.get(), static_cast<uint32_t>(idx));
@@ -587,16 +584,17 @@ Graph QuantizeGraph(Graph &&src) {
 }
 
 static inline void SetCalibTableForEntry(
-    const NodeEntry& e, const ObjectPtr& node,
+    const NodeEntry& e,
+    const ObjectPtr& node,
     const std::unordered_map<std::string, std::pair<float, float>>& calib_table) {
-  std::string out_name = GetOutputName(e.node.get(), e.index);
+  std::string out_name       = GetOutputName(e.node.get(), e.index);
   std::string full_node_name = e.node->attrs.name;
 
   if (!e.node->is_variable()) {
     full_node_name += "_" + out_name;
   } else {
     const std::string suffix = "_quantize";
-    full_node_name = node->attrs.name;
+    full_node_name           = node->attrs.name;
     full_node_name = std::string(full_node_name.begin(), full_node_name.end() - suffix.size());
   }
 
@@ -605,7 +603,7 @@ static inline void SetCalibTableForEntry(
     full_node_name = full_node_name.substr(prefix.size());
   }
   const auto calib_table_iter = calib_table.find(full_node_name);
-  static int verbose = dmlc::GetEnv("MXNET_QUANTIZATION_VERBOSE", 0);
+  static int verbose          = dmlc::GetEnv("MXNET_QUANTIZATION_VERBOSE", 0);
   if (calib_table_iter != calib_table.end()) {
     if (verbose) {
       LOG(INFO) << "Set calibration result to " << node->attrs.name
@@ -614,7 +612,8 @@ static inline void SetCalibTableForEntry(
     }
     node->attrs.dict["min_calib_range"] = std::to_string(calib_table_iter->second.first);
     node->attrs.dict["max_calib_range"] = std::to_string(calib_table_iter->second.second);
-    if (node->op() && node->op()->attr_parser) node->op()->attr_parser(&(node->attrs));
+    if (node->op() && node->op()->attr_parser)
+      node->op()->attr_parser(&(node->attrs));
   } else {
     if (verbose) {
       LOG(INFO) << "Can't find calibration result for " << node->attrs.name;
@@ -650,15 +649,15 @@ Graph SetCalibTableToQuantizedGraph(Graph&& g) {
 }
 
 NNVM_REGISTER_PASS(QuantizeGraph)
-.describe("")
-.set_body(QuantizeGraph)
-.provide_graph_attr("calib_nodes")
-.set_change_graph(true);
+    .describe("")
+    .set_body(QuantizeGraph)
+    .provide_graph_attr("calib_nodes")
+    .set_change_graph(true);
 
 NNVM_REGISTER_PASS(SetCalibTableToQuantizedGraph)
-.describe("")
-.set_body(SetCalibTableToQuantizedGraph)
-.set_change_graph(true);
+    .describe("")
+    .set_body(SetCalibTableToQuantizedGraph)
+    .set_change_graph(true);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantize_v2-inl.h b/src/operator/quantization/quantize_v2-inl.h
index cfbdb7f8e0ab..6abd2116d498 100644
--- a/src/operator/quantization/quantize_v2-inl.h
+++ b/src/operator/quantization/quantize_v2-inl.h
@@ -43,40 +43,53 @@ struct QuantizeV2Param : public dmlc::Parameter<QuantizeV2Param> {
   dmlc::optional<float> max_calib_range;
   DMLC_DECLARE_PARAMETER(QuantizeV2Param) {
     DMLC_DECLARE_FIELD(out_type)
-      .add_enum("auto", QuantizeOutType::kAuto)
-      .add_enum("int8", QuantizeOutType::kInt8)
-      .add_enum("uint8", QuantizeOutType::kUint8)
-      .set_default(QuantizeOutType::kInt8)
-      .describe("Output data type. `auto` can be specified to automatically determine output type "
-                "according to min_calib_range.");
+        .add_enum("auto", QuantizeOutType::kAuto)
+        .add_enum("int8", QuantizeOutType::kInt8)
+        .add_enum("uint8", QuantizeOutType::kUint8)
+        .set_default(QuantizeOutType::kInt8)
+        .describe(
+            "Output data type. `auto` can be specified to automatically determine output type "
+            "according to min_calib_range.");
     DMLC_DECLARE_FIELD(min_calib_range)
-      .set_default(dmlc::optional<float>())
-      .describe("The minimum scalar value in the form of float32. If present, it will be used to "
-                "quantize the fp32 data into int8 or uint8.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The minimum scalar value in the form of float32. If present, it will be used to "
+            "quantize the fp32 data into int8 or uint8.");
     DMLC_DECLARE_FIELD(max_calib_range)
-      .set_default(dmlc::optional<float>())
-      .describe("The maximum scalar value in the form of float32. If present, it will be used to "
-                "quantize the fp32 data into int8 or uint8.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The maximum scalar value in the form of float32. If present, it will be used to "
+            "quantize the fp32 data into int8 or uint8.");
   }
 };
 
 // quantize float to uint8_t
 struct quantize_v2_unsigned {
   template <typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range, float *omax_range,
-                                  const SrcDType *in, const float imin_range,
-                                  const float imax_range, const double min_limit,
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float imin_range,
+                                  const float imax_range,
+                                  const double min_limit,
                                   const double max_limit) {
     const float scale = (max_limit - min_limit) / (imax_range - imin_range);
-    out[i] = static_cast<DstDType>((in[i] - imin_range) * scale + 0.5);
-    *omin_range = imin_range;
-    *omax_range = imax_range;
+    out[i]            = static_cast<DstDType>((in[i] - imin_range) * scale + 0.5);
+    *omin_range       = imin_range;
+    *omax_range       = imax_range;
   }
 
   template <typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range, float *omax_range,
-                                  const SrcDType *in, const float *imin_range,
-                                  const float *imax_range, const double min_limit,
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range,
+                                  const double min_limit,
                                   const double max_limit) {
     Map(i, out, omin_range, omax_range, in, *imin_range, *imax_range, min_limit, max_limit);
   }
@@ -85,27 +98,38 @@ struct quantize_v2_unsigned {
 // keep zero-center
 struct quantize_v2_zero_centered {
   template <typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range, float *omax_range,
-                                  const SrcDType *in, const float imin_range,
-                                  const float imax_range, const float quantized_range) {
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float imin_range,
+                                  const float imax_range,
+                                  const float quantized_range) {
     float real_range = MaxAbs(imin_range, imax_range);
-    float scale = quantized_range / real_range;
-    SrcDType x = in[i];
-    out[i] = static_cast<DstDType>(Sign(x) * Min(Abs(x) * scale + 0.5f, quantized_range));
-    *omin_range = -real_range;
-    *omax_range = real_range;
+    float scale      = quantized_range / real_range;
+    SrcDType x       = in[i];
+    out[i]           = static_cast<DstDType>(Sign(x) * Min(Abs(x) * scale + 0.5f, quantized_range));
+    *omin_range      = -real_range;
+    *omax_range      = real_range;
   }
 
   template <typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range, float *omax_range,
-                                  const SrcDType *in, const float *imin_range,
-                                  const float *imax_range, const float quantized_range) {
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range,
+                                  const float quantized_range) {
     Map(i, out, omin_range, omax_range, in, *imin_range, *imax_range, quantized_range);
   }
 };
 
-static inline bool QuantizeV2Shape(const nnvm::NodeAttrs &attrs, std::vector<TShape> *in_attrs,
-                                   std::vector<TShape> *out_attrs) {
+static inline bool QuantizeV2Shape(const nnvm::NodeAttrs& attrs,
+                                   std::vector<TShape>* in_attrs,
+                                   std::vector<TShape>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 3U);
 
@@ -122,11 +146,12 @@ static inline bool QuantizeV2Shape(const nnvm::NodeAttrs &attrs, std::vector<TSh
   return !shape_is_none(out_attrs->at(0));
 }
 
-static inline bool QuantizeV2Type(const nnvm::NodeAttrs &attrs, std::vector<int> *in_attrs,
-                                  std::vector<int> *out_attrs) {
+static inline bool QuantizeV2Type(const nnvm::NodeAttrs& attrs,
+                                  std::vector<int>* in_attrs,
+                                  std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 3U);
-  const QuantizeV2Param &param = nnvm::get<QuantizeV2Param>(attrs.parsed);
+  const QuantizeV2Param& param = nnvm::get<QuantizeV2Param>(attrs.parsed);
   CHECK(in_attrs->at(0) == mshadow::kFloat32 || in_attrs->at(0) == mshadow::kUint8 ||
         in_attrs->at(0) == mshadow::kInt8);
   auto out_type = GetQuantizeOutputType(param);
@@ -142,21 +167,23 @@ static inline bool QuantizeV2Type(const nnvm::NodeAttrs &attrs, std::vector<int>
   return (*in_attrs)[0] != -1;
 }
 
-template<typename xpu>
+template <typename xpu>
 class QuantizeV2Operator {
  public:
-  explicit QuantizeV2Operator(const nnvm::NodeAttrs &attrs) : attrs_(attrs) {}
+  explicit QuantizeV2Operator(const nnvm::NodeAttrs& attrs) : attrs_(attrs) {}
 
-  void Forward(const OpContext &ctx, const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req, const std::vector<TBlob> &outputs) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& inputs,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& outputs) {
     using namespace mshadow;
     using namespace mxnet_op;
     typedef float SrcDType;
     using mshadow::red::limits::MaxValue;
     using mshadow::red::limits::MinValue;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const QuantizeV2Param &param = nnvm::get<QuantizeV2Param>(attrs_.parsed);
-    auto out_type = GetQuantizeOutputType(param);
+    Stream<xpu>* s               = ctx.get_stream<xpu>();
+    const QuantizeV2Param& param = nnvm::get<QuantizeV2Param>(attrs_.parsed);
+    auto out_type                = GetQuantizeOutputType(param);
     if (out_type == mshadow::kUint8 && std::is_same<xpu, gpu>::value) {
       LOG(FATAL) << "currently, uint8 quantization is only supported by CPU, "
                     "please switch to the context of CPU or int8 data type for GPU.";
@@ -179,53 +206,89 @@ class QuantizeV2Operator {
     } else {
       if (param.min_calib_range.has_value() && param.max_calib_range.has_value()) {
         if (out_type == mshadow::kUint8) {
-          Kernel<quantize_v2_unsigned, xpu>::Launch(
-              s, outputs[0].Size(), outputs[0].dptr<uint8_t>(), outputs[1].dptr<float>(),
-              outputs[2].dptr<float>(), inputs[0].dptr<SrcDType>(), param.min_calib_range.value(),
-              param.max_calib_range.value(), MinValue<uint8_t>(), MaxValue<uint8_t>());
+          Kernel<quantize_v2_unsigned, xpu>::Launch(s,
+                                                    outputs[0].Size(),
+                                                    outputs[0].dptr<uint8_t>(),
+                                                    outputs[1].dptr<float>(),
+                                                    outputs[2].dptr<float>(),
+                                                    inputs[0].dptr<SrcDType>(),
+                                                    param.min_calib_range.value(),
+                                                    param.max_calib_range.value(),
+                                                    MinValue<uint8_t>(),
+                                                    MaxValue<uint8_t>());
         } else if (out_type == mshadow::kInt8) {  // zero-centered quantization
           Kernel<quantize_v2_zero_centered, xpu>::Launch(
-              s, outputs[0].Size(), outputs[0].dptr<int8_t>(), outputs[1].dptr<float>(),
-              outputs[2].dptr<float>(), inputs[0].dptr<SrcDType>(), param.min_calib_range.value(),
-              param.max_calib_range.value(), MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
+              s,
+              outputs[0].Size(),
+              outputs[0].dptr<int8_t>(),
+              outputs[1].dptr<float>(),
+              outputs[2].dptr<float>(),
+              inputs[0].dptr<SrcDType>(),
+              param.min_calib_range.value(),
+              param.max_calib_range.value(),
+              MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
         } else {
           LOG(FATAL) << "quantize op only supports int8 and uint8 as output type";
         }
       } else {  // model is not calibrated
         mxnet::TShape src_shape, dst_shape;
         const size_t actual_float_size = sizeof(float);
-        const size_t temp_reduce_size = ConfigReduce<xpu, SrcDType>(
+        const size_t temp_reduce_size  = ConfigReduce<xpu, SrcDType>(
             s, inputs[0].shape_, mxnet::TShape(1, 1), &src_shape, &dst_shape);
         Tensor<xpu, 1, char> temp_space = ctx.requested[0].get_space_typed<xpu, 1, char>(
             Shape1(2 * actual_float_size + temp_reduce_size), s);
         const int dev_id = ctx.run_ctx.ctx.dev_id;
-        TBlob in_min_t(reinterpret_cast<SrcDType *>(temp_space.dptr_), Shape1(1), xpu::kDevMask,
-                       dev_id);
-        TBlob in_max_t(reinterpret_cast<SrcDType *>(temp_space.dptr_) + 1, Shape1(1), xpu::kDevMask,
-                       dev_id);
-        Tensor<xpu, 1, char> workspace(temp_space.dptr_ + 2 * actual_float_size,
-                                       Shape1(temp_reduce_size), s);
+        TBlob in_min_t(
+            reinterpret_cast<SrcDType*>(temp_space.dptr_), Shape1(1), xpu::kDevMask, dev_id);
+        TBlob in_max_t(
+            reinterpret_cast<SrcDType*>(temp_space.dptr_) + 1, Shape1(1), xpu::kDevMask, dev_id);
+        Tensor<xpu, 1, char> workspace(
+            temp_space.dptr_ + 2 * actual_float_size, Shape1(temp_reduce_size), s);
 #if !defined(__CUDACC__)
         broadcast::Reduce<red::minimum, 2, SrcDType, mshadow::op::identity>(
             s, in_min_t.reshape(dst_shape), kWriteTo, workspace, inputs[0].reshape(src_shape));
         broadcast::Reduce<red::maximum, 2, SrcDType, mshadow::op::identity>(
             s, in_max_t.reshape(dst_shape), kWriteTo, workspace, inputs[0].reshape(src_shape));
 #else
-        broadcast::RTCReduce(ctx, in_min_t.reshape(dst_shape), kWriteTo, workspace,
-                             inputs[0].reshape(src_shape), "red::minimum{}", 2, "identity");
-        broadcast::RTCReduce(ctx, in_max_t.reshape(dst_shape), kWriteTo, workspace,
-                             inputs[0].reshape(src_shape), "red::maximum{}", 2, "identity");
+        broadcast::RTCReduce(ctx,
+                             in_min_t.reshape(dst_shape),
+                             kWriteTo,
+                             workspace,
+                             inputs[0].reshape(src_shape),
+                             "red::minimum{}",
+                             2,
+                             "identity");
+        broadcast::RTCReduce(ctx,
+                             in_max_t.reshape(dst_shape),
+                             kWriteTo,
+                             workspace,
+                             inputs[0].reshape(src_shape),
+                             "red::maximum{}",
+                             2,
+                             "identity");
 #endif
         if (out_type == mshadow::kUint8) {
-          Kernel<quantize_v2_unsigned, xpu>::Launch(
-              s, outputs[0].Size(), outputs[0].dptr<uint8_t>(), outputs[1].dptr<float>(),
-              outputs[2].dptr<float>(), inputs[0].dptr<SrcDType>(), in_min_t.dptr<float>(),
-              in_max_t.dptr<float>(), MinValue<uint8_t>(), MaxValue<uint8_t>());
+          Kernel<quantize_v2_unsigned, xpu>::Launch(s,
+                                                    outputs[0].Size(),
+                                                    outputs[0].dptr<uint8_t>(),
+                                                    outputs[1].dptr<float>(),
+                                                    outputs[2].dptr<float>(),
+                                                    inputs[0].dptr<SrcDType>(),
+                                                    in_min_t.dptr<float>(),
+                                                    in_max_t.dptr<float>(),
+                                                    MinValue<uint8_t>(),
+                                                    MaxValue<uint8_t>());
         } else if (out_type == mshadow::kInt8) {  // zero-centered quantization
           Kernel<quantize_v2_zero_centered, xpu>::Launch(
-              s, outputs[0].Size(), outputs[0].dptr<int8_t>(), outputs[1].dptr<float>(),
-              outputs[2].dptr<float>(), inputs[0].dptr<SrcDType>(), in_min_t.dptr<float>(),
-              in_max_t.dptr<float>(), MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
+              s,
+              outputs[0].Size(),
+              outputs[0].dptr<int8_t>(),
+              outputs[1].dptr<float>(),
+              outputs[2].dptr<float>(),
+              inputs[0].dptr<SrcDType>(),
+              in_min_t.dptr<float>(),
+              in_max_t.dptr<float>(),
+              MinAbs(MaxValue<int8_t>(), MinValue<int8_t>()));
         } else {
           LOG(FATAL) << "quantize op only supports int8 and uint8 as output type";
         }
@@ -238,10 +301,12 @@ class QuantizeV2Operator {
 };
 
 template <typename xpu>
-static void QuantizeV2Forward(const OpStatePtr &state_ptr, const OpContext &ctx,
-                              const std::vector<TBlob> &inputs, const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
-  auto &op = state_ptr.get_state<QuantizeV2Operator<xpu>>();
+static void QuantizeV2Forward(const OpStatePtr& state_ptr,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
+  auto& op = state_ptr.get_state<QuantizeV2Operator<xpu>>();
   op.Forward(ctx, inputs, req, outputs);
 }
 
diff --git a/src/operator/quantization/quantize_v2.cc b/src/operator/quantization/quantize_v2.cc
index dde1ed902fe9..d5a4088daf6d 100644
--- a/src/operator/quantization/quantize_v2.cc
+++ b/src/operator/quantization/quantize_v2.cc
@@ -32,8 +32,10 @@ namespace mxnet {
 namespace op {
 DMLC_REGISTER_PARAMETER(QuantizeV2Param);
 
-static bool QuantizeV2StorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
-                                  DispatchMode* dispatch_mode, std::vector<int>* in_attrs,
+static bool QuantizeV2StorageType(const nnvm::NodeAttrs& attrs,
+                                  const int dev_mask,
+                                  DispatchMode* dispatch_mode,
+                                  std::vector<int>* in_attrs,
                                   std::vector<int>* out_attrs) {
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
@@ -47,7 +49,8 @@ static bool QuantizeV2StorageType(const nnvm::NodeAttrs& attrs, const int dev_ma
   return true;
 }
 
-static OpStatePtr CreateQuantizeV2State(const nnvm::NodeAttrs& attrs, Context ctx,
+static OpStatePtr CreateQuantizeV2State(const nnvm::NodeAttrs& attrs,
+                                        Context ctx,
                                         const std::vector<TShape>& in_shapes,
                                         const std::vector<int>& in_types) {
   OpStatePtr state;
@@ -64,8 +67,8 @@ static OpStatePtr CreateQuantizeV2State(const nnvm::NodeAttrs& attrs, Context ct
 }
 
 NNVM_REGISTER_OP(_contrib_quantize_v2)
-.add_alias("_npx_contrib_quantize_v2")
-.describe(R"code(Quantize a input tensor from float to `out_type`,
+    .add_alias("_npx_contrib_quantize_v2")
+    .describe(R"code(Quantize a input tensor from float to `out_type`,
 with user-specified `min_calib_range` and `max_calib_range` or the input range collected at runtime.
 
 Output `min_range` and `max_range` are scalar floats that specify the range for the input data.
@@ -91,43 +94,49 @@ If min_calib_range isn't presented, the output type will be int8.
 
 .. Note::
     This operator only supports forward propagation. DO NOT use it in training.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<QuantizeV2Param>)
-.set_num_inputs(1)
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizeV2Shape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizeV2Type)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizeV2StorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FCreateOpState>("FCreateOpState", CreateQuantizeV2State)
+    .set_attr_parser(ParamParser<QuantizeV2Param>)
+    .set_num_inputs(1)
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizeV2Shape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizeV2Type)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizeV2StorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateQuantizeV2State)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", SgMKLDNNQuantizeForward)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", SgMKLDNNQuantizeForward)
 #endif
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", QuantizeV2Forward<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity", [](const NodeAttrs& attrs){
-  return std::vector<bool>{true};
-})
-.set_attr<FNeedCalibrateInput>("FNeedCalibrateInput", [](const NodeAttrs& attrs){
-  return std::vector<int>{0};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-  const QuantizeV2Param &param = nnvm::get<QuantizeV2Param>(attrs.parsed);
-  if (param.min_calib_range.has_value() && param.max_calib_range.has_value()) {
-    return std::vector<ResourceRequest>();
-  } else {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  }
-})
-.add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
-.add_arguments(QuantizeV2Param::__FIELDS__());
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", QuantizeV2Forward<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<FNeedCalibrateInput>("FNeedCalibrateInput",
+                                   [](const NodeAttrs& attrs) { return std::vector<int>{0}; })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  const QuantizeV2Param& param =
+                                      nnvm::get<QuantizeV2Param>(attrs.parsed);
+                                  if (param.min_calib_range.has_value() &&
+                                      param.max_calib_range.has_value()) {
+                                    return std::vector<ResourceRequest>();
+                                  } else {
+                                    return std::vector<ResourceRequest>(
+                                        1, ResourceRequest::kTempSpace);
+                                  }
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
+    .add_arguments(QuantizeV2Param::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantize_v2.cu b/src/operator/quantization/quantize_v2.cu
index 7acdf56082e5..ea1d3f5ee4a6 100644
--- a/src/operator/quantization/quantize_v2.cu
+++ b/src/operator/quantization/quantize_v2.cu
@@ -28,7 +28,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_quantize_v2)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", QuantizeV2Forward<gpu>);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", QuantizeV2Forward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_activation.cc b/src/operator/quantization/quantized_activation.cc
index 51b1065d7163..32a838252b96 100644
--- a/src/operator/quantization/quantized_activation.cc
+++ b/src/operator/quantization/quantized_activation.cc
@@ -20,7 +20,7 @@
 /*!
  * Copyright (c) 2019 by Contributors
  * \file quantized_activation.cc
-*/
+ */
 #include <mxnet/op_attr_types.h>
 #include "../nn/activation-inl.h"
 #include "../elemwise_op_common.h"
@@ -29,10 +29,11 @@ namespace mxnet {
 namespace op {
 
 bool QuantizedActivationShape(const nnvm::NodeAttrs& attrs,
-                              std::vector<TShape> *in_shape,
-                              std::vector<TShape> *out_shape) {
+                              std::vector<TShape>* in_shape,
+                              std::vector<TShape>* out_shape) {
   CHECK_EQ(in_shape->size(), 3U);
-  if (shape_is_none(in_shape->at(0))) return false;
+  if (shape_is_none(in_shape->at(0)))
+    return false;
   SHAPE_ASSIGN_CHECK(*in_shape, 1, TShape{1});
   SHAPE_ASSIGN_CHECK(*in_shape, 2, TShape{1});
   out_shape->clear();
@@ -43,8 +44,8 @@ bool QuantizedActivationShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool QuantizedActivationType(const nnvm::NodeAttrs& attrs,
-                             std::vector<int> *in_type,
-                             std::vector<int> *out_type) {
+                             std::vector<int>* in_type,
+                             std::vector<int>* out_type) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), 3U);
   CHECK_EQ(out_type->size(), 3U);
@@ -60,16 +61,16 @@ bool QuantizedActivationType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-inline static bool QuantizedActivationStorageType(const nnvm::NodeAttrs &attrs,
+inline static bool QuantizedActivationStorageType(const nnvm::NodeAttrs& attrs,
                                                   const int dev_mask,
-                                                  DispatchMode *dispatch_mode,
-                                                  std::vector<int> *in_attrs,
-                                                  std::vector<int> *out_attrs) {
+                                                  DispatchMode* dispatch_mode,
+                                                  std::vector<int>* in_attrs,
+                                                  std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3);
 
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
-  const ActivationParam &param = nnvm::get<ActivationParam>(attrs.parsed);
+  const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
   if (dev_mask == mshadow::cpu::kDevMask && param.act_type == activation::kReLU) {
     *dispatch_mode = DispatchMode::kFComputeEx;
   }
@@ -82,52 +83,53 @@ inline static bool QuantizedActivationStorageType(const nnvm::NodeAttrs &attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_act)
-.add_alias("_npx_quantized_act")
-.describe(R"code(Activation operator for input and output data type of int8.
+    .add_alias("_npx_quantized_act")
+    .describe(R"code(Activation operator for input and output data type of int8.
 The input and output data comes with min and max thresholds for quantizing
 the float32 data into int8.
 
 .. Note::
      This operator only supports forward propogation. DO NOT use it in training.
      This operator only supports `relu`)code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<ActivationParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "min_data", "max_data"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<nnvm::FInferType>("FInferType", QuantizedActivationType)
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedActivationShape)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizedActivationStorageType)
-.set_attr<FNeedRequantize>("FNeedRequantize",
-  [](const NodeAttrs& attrs) {
-    const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
-    CHECK(param.act_type == activation::kReLU)
-      << "_contrib_quantized_act only supports act_type=relu for now";
-    return false;
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
-.add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
-.add_arguments(ActivationParam::__FIELDS__());
-
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<ActivationParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "min_data", "max_data"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedActivationType)
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedActivationShape)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizedActivationStorageType)
+    .set_attr<FNeedRequantize>(
+        "FNeedRequantize",
+        [](const NodeAttrs& attrs) {
+          const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
+          CHECK(param.act_type == activation::kReLU)
+              << "_contrib_quantized_act only supports act_type=relu for now";
+          return false;
+        })
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
+    .add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
+    .add_arguments(ActivationParam::__FIELDS__());
 
-NNVM_REGISTER_OP(Activation)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+NNVM_REGISTER_OP(Activation).set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
   const ActivationParam& param = nnvm::get<ActivationParam>(attrs.parsed);
-  nnvm::ObjectPtr node = nnvm::Node::Create();
+  nnvm::ObjectPtr node         = nnvm::Node::Create();
   if (param.act_type == activation::kReLU) {
-    node->attrs.op = Op::Get("_contrib_quantized_act");
+    node->attrs.op   = Op::Get("_contrib_quantized_act");
     node->attrs.name = "quantized_" + attrs.name;
   } else {
-    LOG(INFO) << "Currently, quantized activation only supports relu, exclude "
-              << attrs.name << " which act_type is " << param.act_type;
-    node->attrs.op = nullptr;
+    LOG(INFO) << "Currently, quantized activation only supports relu, exclude " << attrs.name
+              << " which act_type is " << param.act_type;
+    node->attrs.op   = nullptr;
     node->attrs.name = attrs.name;
   }
   node->attrs.dict = attrs.dict;
diff --git a/src/operator/quantization/quantized_batch_norm.cc b/src/operator/quantization/quantized_batch_norm.cc
index 0be997c868c1..c330197846b4 100644
--- a/src/operator/quantization/quantized_batch_norm.cc
+++ b/src/operator/quantization/quantized_batch_norm.cc
@@ -22,7 +22,7 @@
  * \file quantized_batch_norm.cc
  * \brief
  * \author Yixin Bao
-*/
+ */
 #include <mxnet/op_attr_types.h>
 #include "../nn/batch_norm-inl.h"
 #if MXNET_USE_ONEDNN == 1
@@ -32,7 +32,8 @@
 namespace mxnet {
 namespace op {
 
-bool QuantizedBatchNormShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVector* in_shape,
+bool QuantizedBatchNormShape(const nnvm::NodeAttrs& attrs,
+                             mxnet::ShapeVector* in_shape,
                              mxnet::ShapeVector* out_shape) {
   const BatchNormParam& param = nnvm::get<BatchNormParam>(attrs.parsed);
   using namespace mshadow;
@@ -61,7 +62,8 @@ bool QuantizedBatchNormShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVector* i
   return true;
 }
 
-bool QuantizedBatchNormType(const nnvm::NodeAttrs& attrs, std::vector<int>* in_type,
+bool QuantizedBatchNormType(const nnvm::NodeAttrs& attrs,
+                            std::vector<int>* in_type,
                             std::vector<int>* out_type) {
   using namespace mshadow;
   CHECK_EQ(in_type->size(), 7U);
@@ -86,59 +88,64 @@ bool QuantizedBatchNormType(const nnvm::NodeAttrs& attrs, std::vector<int>* in_t
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_batch_norm)
-.describe(R"code(BatchNorm operator for input and output data type of int8.
+    .describe(R"code(BatchNorm operator for input and output data type of int8.
 The input and output data comes with min and max thresholds for quantizing
 the float32 data into int8.
 
 .. Note::
     This operator only supports forward propogation. DO NOT use it in training.
 )code" ADD_FILELINE)
-.set_num_inputs(7)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<BatchNormParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "gamma", "beta",
-    "moving_mean", "moving_var", "min_data", "max_data"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<nnvm::FMutateInputs>("FMutateInputs", [](const nnvm::NodeAttrs& attrs) {
-  return std::vector<uint32_t>{3, 4};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedBatchNormShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedBatchNormType)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return false; })
-.set_attr<FNeedCalibrateInput>("FNeedCalibrateOutput", [](const NodeAttrs& attrs){
-  return std::vector<int>{0};
-})
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_argument("gamma", "NDArray-or-Symbol", "gamma.")
-.add_argument("beta", "NDArray-or-Symbol", "beta.")
-.add_argument("moving_mean", "NDArray-or-Symbol", "moving_mean.")
-.add_argument("moving_var", "NDArray-or-Symbol", "moving_var.")
-.add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
-.add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
-.add_arguments(BatchNormParam::__FIELDS__());
+    .set_num_inputs(7)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<BatchNormParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{
+              "data", "gamma", "beta", "moving_mean", "moving_var", "min_data", "max_data"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<nnvm::FMutateInputs>("FMutateInputs",
+                                   [](const nnvm::NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>{3, 4};
+                                   })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedBatchNormShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedBatchNormType)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return false; })
+    .set_attr<FNeedCalibrateInput>("FNeedCalibrateOutput",
+                                   [](const NodeAttrs& attrs) { return std::vector<int>{0}; })
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_argument("gamma", "NDArray-or-Symbol", "gamma.")
+    .add_argument("beta", "NDArray-or-Symbol", "beta.")
+    .add_argument("moving_mean", "NDArray-or-Symbol", "moving_mean.")
+    .add_argument("moving_var", "NDArray-or-Symbol", "moving_var.")
+    .add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
+    .add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
+    .add_arguments(BatchNormParam::__FIELDS__());
 
 NNVM_REGISTER_OP(BatchNorm)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-    nnvm::ObjectPtr node = nnvm::Node::Create();
-    node->attrs.op = Op::Get("_contrib_quantized_batch_norm");
-    node->attrs.name = "quantized_" + attrs.name;
-    node->attrs.dict = attrs.dict;
-    if (node->op()->attr_parser != nullptr) {
-      node->op()->attr_parser(&(node->attrs));
-    }
-    return node;
-  })
-.set_attr<FAvoidQuantizeInput>("FAvoidQuantizeInput", [](
-  const NodeAttrs &attrs, const size_t index, const std::string quantize_granularity) {
-  return (index != 0);
-});
+    .set_attr<FQuantizedOp>("FQuantizedOp",
+                            [](const NodeAttrs& attrs) {
+                              nnvm::ObjectPtr node = nnvm::Node::Create();
+                              node->attrs.op       = Op::Get("_contrib_quantized_batch_norm");
+                              node->attrs.name     = "quantized_" + attrs.name;
+                              node->attrs.dict     = attrs.dict;
+                              if (node->op()->attr_parser != nullptr) {
+                                node->op()->attr_parser(&(node->attrs));
+                              }
+                              return node;
+                            })
+    .set_attr<FAvoidQuantizeInput>("FAvoidQuantizeInput",
+                                   [](const NodeAttrs& attrs,
+                                      const size_t index,
+                                      const std::string quantize_granularity) {
+                                     return (index != 0);
+                                   });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_concat.cc b/src/operator/quantization/quantized_concat.cc
index f955e7ef5e84..3c6190d5bae8 100644
--- a/src/operator/quantization/quantized_concat.cc
+++ b/src/operator/quantization/quantized_concat.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2018 by Contributors
  * \file quantized_concat.cc
  * \brief
-*/
+ */
 
 #include "../nn/concat-inl.h"
 #include "../numpy/np_matrix_op-inl.h"
@@ -29,19 +29,20 @@
 namespace mxnet {
 namespace op {
 
-static bool QuantizedConcatShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVector* in_shape,
+static bool QuantizedConcatShape(const nnvm::NodeAttrs& attrs,
+                                 mxnet::ShapeVector* in_shape,
                                  mxnet::ShapeVector* out_shape) {
   const ConcatParam& param_ = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), static_cast<size_t>(param_.num_args * 3));
   CHECK_EQ(out_shape->size(), 3U);
   mxnet::TShape dshape;
-  index_t size = 0;
+  index_t size              = 0;
   bool has_unknown_dim_size = false;
-  int axis = -1;
+  int axis                  = -1;
   for (int i = 0; i < param_.num_args; ++i) {
     mxnet::TShape tmp = (*in_shape)[i];
     if (tmp.ndim() > 0) {
-      axis = CheckAxis(param_.dim, tmp.ndim());
+      axis                 = CheckAxis(param_.dim, tmp.ndim());
       has_unknown_dim_size = !mxnet::dim_size_is_known(tmp, axis) || has_unknown_dim_size;
       size += tmp[axis];
       tmp[axis] = -1;
@@ -51,19 +52,21 @@ static bool QuantizedConcatShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVecto
 
   mxnet::TShape tmp = (*out_shape)[0];
   if (tmp.ndim() > 0) {
-    axis = CheckAxis(param_.dim, tmp.ndim());
+    axis      = CheckAxis(param_.dim, tmp.ndim());
     tmp[axis] = -1;
     shape_assign(&dshape, tmp);
   }
 
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   for (int i = 0; i < param_.num_args; ++i) {
     CHECK(shape_assign(&(*in_shape)[i], dshape))
         << "Incompatible input shape: expected " << dshape << ", got " << (*in_shape)[i];
   }
 
-  if (!has_unknown_dim_size) dshape[axis] = size;
+  if (!has_unknown_dim_size)
+    dshape[axis] = size;
   CHECK(shape_assign(&(*out_shape)[0], dshape))
       << "Incompatible output shape: expected " << dshape << ", got " << (*out_shape)[0];
 
@@ -75,7 +78,8 @@ static bool QuantizedConcatShape(const nnvm::NodeAttrs& attrs, mxnet::ShapeVecto
   return shape_is_known(dshape);
 }
 
-static bool QuantizedConcatType(const nnvm::NodeAttrs& attrs, std::vector<int>* in_type,
+static bool QuantizedConcatType(const nnvm::NodeAttrs& attrs,
+                                std::vector<int>* in_type,
                                 std::vector<int>* out_type) {
   const ConcatParam& param_ = nnvm::get<ConcatParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), static_cast<size_t>(param_.num_args * 3));
@@ -97,7 +101,7 @@ static bool QuantizedConcatType(const nnvm::NodeAttrs& attrs, std::vector<int>*
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_concat)
-.describe(R"code(Joins input arrays along a given axis.
+    .describe(R"code(Joins input arrays along a given axis.
 
 The dimensions of the input arrays should be the same except the axis along
 which they will be concatenated.
@@ -107,48 +111,51 @@ All inputs with different min/max will be rescaled by using largest [min, max] p
 If any input holds int8, then the output will be int8. Otherwise output will be uint8.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  return params.num_args * 3;
-})
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<ConcatParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
-  std::vector<std::string> ret;
-  ret.reserve(params.num_args);
-  for (int i = 0; i < params.num_args; ++i) {
-    ret.push_back(std::string("arg") + std::to_string(i));
-  }
-  for (int i = 0; i < params.num_args; ++i) {
-    ret.push_back(std::string("arg") + std::to_string(i) + "_min");
-    ret.push_back(std::string("arg") + std::to_string(i) + "_max");
-  }
-  return ret;
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "min_output", "max_output"};
-})
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedConcatType)
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedConcatShape)
-.set_attr<std::string>("key_var_num_args", "num_args")
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
-.add_arguments(ConcatParam::__FIELDS__());
-
-NNVM_REGISTER_OP(Concat)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+      return params.num_args * 3;
+    })
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<ConcatParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const ConcatParam& params = nnvm::get<ConcatParam>(attrs.parsed);
+          std::vector<std::string> ret;
+          ret.reserve(params.num_args);
+          for (int i = 0; i < params.num_args; ++i) {
+            ret.push_back(std::string("arg") + std::to_string(i));
+          }
+          for (int i = 0; i < params.num_args; ++i) {
+            ret.push_back(std::string("arg") + std::to_string(i) + "_min");
+            ret.push_back(std::string("arg") + std::to_string(i) + "_max");
+          }
+          return ret;
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedConcatType)
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedConcatShape)
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to concatenate")
+    .add_arguments(ConcatParam::__FIELDS__());
+
+NNVM_REGISTER_OP(Concat).set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
   const ConcatParam& param = nnvm::get<ConcatParam>(attrs.parsed);
-  nnvm::ObjectPtr node = nnvm::Node::Create();
+  nnvm::ObjectPtr node     = nnvm::Node::Create();
   if (param.dim > 0) {
-    node->attrs.op = Op::Get("_contrib_quantized_concat");
+    node->attrs.op   = Op::Get("_contrib_quantized_concat");
     node->attrs.name = "quantized_" + attrs.name;
   } else {
-    LOG(INFO) << "Currently, quantized concat only supports dim>0, exclude "
-              << attrs.name << " which dim is " << param.dim;
-    node->attrs.op = nullptr;
+    LOG(INFO) << "Currently, quantized concat only supports dim>0, exclude " << attrs.name
+              << " which dim is " << param.dim;
+    node->attrs.op   = nullptr;
     node->attrs.name = attrs.name;
   }
   node->attrs.dict = attrs.dict;
@@ -159,26 +166,26 @@ NNVM_REGISTER_OP(Concat)
 });
 
 NNVM_REGISTER_OP(_npi_concatenate)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-  const NumpyConcatenateParam& param = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
-  nnvm::ObjectPtr node = nnvm::Node::Create();
-  if (param.axis.has_value() && param.axis.value() > 0) {
-    node->attrs.op = Op::Get("_contrib_quantized_concat");
-    node->attrs.name = "quantized_" + attrs.name;
-  } else {
-    LOG(INFO) << "Currently, quantized numpy concatenate only supports axis>0, exclude "
-              << attrs.name << " which axis is " << param.axis;
-    node->attrs.op = nullptr;
-    node->attrs.name = attrs.name;
-  }
-  node->attrs.dict = attrs.dict;
-  node->attrs.dict["dim"] = node->attrs.dict["axis"];
-  node->attrs.dict.erase("axis");
-  if (node->op() != nullptr && node->op()->attr_parser != nullptr) {
-    node->op()->attr_parser(&(node->attrs));
-  }
-  return node;
-});
+    .set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+      const NumpyConcatenateParam& param = nnvm::get<NumpyConcatenateParam>(attrs.parsed);
+      nnvm::ObjectPtr node               = nnvm::Node::Create();
+      if (param.axis.has_value() && param.axis.value() > 0) {
+        node->attrs.op   = Op::Get("_contrib_quantized_concat");
+        node->attrs.name = "quantized_" + attrs.name;
+      } else {
+        LOG(INFO) << "Currently, quantized numpy concatenate only supports axis>0, exclude "
+                  << attrs.name << " which axis is " << param.axis;
+        node->attrs.op   = nullptr;
+        node->attrs.name = attrs.name;
+      }
+      node->attrs.dict        = attrs.dict;
+      node->attrs.dict["dim"] = node->attrs.dict["axis"];
+      node->attrs.dict.erase("axis");
+      if (node->op() != nullptr && node->op()->attr_parser != nullptr) {
+        node->op()->attr_parser(&(node->attrs));
+      }
+      return node;
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_conv.cc b/src/operator/quantization/quantized_conv.cc
index 08b855bdb496..692cbdb02032 100644
--- a/src/operator/quantization/quantized_conv.cc
+++ b/src/operator/quantization/quantized_conv.cc
@@ -22,7 +22,7 @@
  * \file quantized_conv.cc
  * \brief
  * \author Ziheng Jiang, Jun Wu
-*/
+ */
 #include "../nn/convolution-inl.h"
 #if MXNET_USE_ONEDNN == 1
 #include "../nn/mkldnn/mkldnn_ops-inl.h"
@@ -37,43 +37,43 @@ bool QuantizedConvShape(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
   CHECK_EQ(param.num_group, 1U) << "quantized_conv only supports num_group=1 for now";
-  CHECK_EQ(in_shape->size(), param.no_bias? 6U : 9U);
+  CHECK_EQ(in_shape->size(), param.no_bias ? 6U : 9U);
   CHECK_EQ(out_shape->size(), 3U);
   if (param.layout.has_value()) {
 #if MXNET_USE_ONEDNN == 1
     CHECK(param.layout.value() == mshadow::kNCHW || param.layout.value() == mshadow::kNCDHW)
-          << "mkldnn quantized_conv now supports NCHW or NCDHW for now";
+        << "mkldnn quantized_conv now supports NCHW or NCDHW for now";
 #else
     CHECK_EQ(param.layout.value(), mshadow::kNCHW) << "quantized_conv only supports NCHW for now";
 #endif
   }
 
-  const mxnet::TShape& dshape =  in_shape->at(0);
-  const int data_ndims = dshape.ndim();
-  const int kernel_ndims = param.kernel.ndim();
-  if (data_ndims == 0U) return false;
+  const mxnet::TShape& dshape = in_shape->at(0);
+  const int data_ndims        = dshape.ndim();
+  const int kernel_ndims      = param.kernel.ndim();
+  if (data_ndims == 0U)
+    return false;
 
 #if MXNET_USE_ONEDNN == 1
   CHECK(kernel_ndims == 2U || kernel_ndims == 3U)
-        << "mkldnn quantized_conv only supports 2d or 3d kernel for now";
+      << "mkldnn quantized_conv only supports 2d or 3d kernel for now";
   CHECK(data_ndims == 4U || data_ndims == 5U)
-        << "mkldnn quantized_conv only supports 4d or 5d layout for now";
+      << "mkldnn quantized_conv only supports 4d or 5d layout for now";
 #else
   CHECK_EQ(kernel_ndims, 2U) << "quantized_conv only supports 2D convolution for now";
   CHECK(param.dilate.ndim() == 0U || param.dilate.Size() == 1U)
-        << "quantized_conv only supports dilation=1 for all dimensions";
+      << "quantized_conv only supports dilation=1 for all dimensions";
   CHECK_EQ(data_ndims, 4U);
-  CHECK_EQ(dshape[1] % 4,  0U)
-    << "for 8bit cudnn conv, the number of channel must be multiple of 4";
+  CHECK_EQ(dshape[1] % 4, 0U) << "for 8bit cudnn conv, the number of channel must be multiple of 4";
   CHECK_EQ(param.num_filter % 4, 0U)
-    << "for 8bit cudnn conv, the number of channel must be multiple of 4";
+      << "for 8bit cudnn conv, the number of channel must be multiple of 4";
 #endif
 
   auto AddPad = [](index_t dsize, index_t pad) { return dsize + 2 * pad; };
   const int D = (data_ndims == 5) ? 2 : 1;
   const int N = 0, H = D + 1, W = D + 2, C = 1;
 
-if (data_ndims == 4) {
+  if (data_ndims == 4) {
     // conv 2d
     mxnet::TShape wshape(data_ndims, 0);
     wshape[N] = param.num_filter;
@@ -122,8 +122,8 @@ if (data_ndims == 4) {
 #endif
   }
 
-  const int start = param.no_bias? 2 : 3;
-  const int end = param.no_bias? 6 : 9;
+  const int start = param.no_bias ? 2 : 3;
+  const int end   = param.no_bias ? 6 : 9;
   for (int i = start; i < end; ++i) {
     SHAPE_ASSIGN_CHECK(*in_shape, i, mxnet::TShape{1});
   }
@@ -135,10 +135,10 @@ if (data_ndims == 4) {
 }
 
 bool QuantizedConvType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_type,
-                       std::vector<int> *out_type) {
+                       std::vector<int>* in_type,
+                       std::vector<int>* out_type) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
-  CHECK_EQ(in_type->size(), param.no_bias? 6U : 9U);
+  CHECK_EQ(in_type->size(), param.no_bias ? 6U : 9U);
   CHECK_EQ(out_type->size(), 3U);
 #ifndef MXNET_USE_ONEDNN
   TYPE_ASSIGN_CHECK(*in_type, 0, mshadow::kInt8);
@@ -147,8 +147,8 @@ bool QuantizedConvType(const nnvm::NodeAttrs& attrs,
   if (!param.no_bias) {
     TYPE_ASSIGN_CHECK(*in_type, 2, mshadow::kInt8);
   }
-  const size_t start = param.no_bias? 2 : 3;
-  const size_t end = param.no_bias? 6 : 9;
+  const size_t start = param.no_bias ? 2 : 3;
+  const size_t end   = param.no_bias ? 6 : 9;
   for (size_t i = start; i < end; ++i) {
     TYPE_ASSIGN_CHECK(*in_type, i, mshadow::kFloat32);
   }
@@ -162,8 +162,8 @@ bool QuantizedConvType(const nnvm::NodeAttrs& attrs,
 bool QuantizedConvStorageType(const nnvm::NodeAttrs& attrs,
                               const int dev_mask,
                               DispatchMode* dispatch_mode,
-                              std::vector<int> *in_attrs,
-                              std::vector<int> *out_attrs) {
+                              std::vector<int>* in_attrs,
+                              std::vector<int>* out_attrs) {
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
   if (dev_mask == mshadow::cpu::kDevMask) {
@@ -178,8 +178,8 @@ bool QuantizedConvStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_conv)
-.add_alias("_npx_quantized_conv")
-.describe(R"code(Convolution operator for input, weight and bias data type of int8,
+    .add_alias("_npx_quantized_conv")
+    .describe(R"code(Convolution operator for input, weight and bias data type of int8,
 and accumulates in type int32 for the output. For each argument, two more arguments of type
 float32 must be provided representing the thresholds of quantizing argument from data
 type float32 to int8. The final outputs contain the convolution result in int32, and min
@@ -187,64 +187,72 @@ and max thresholds representing the threholds for quantizing the float32 output
 
 .. Note::
     This operator only supports forward propogation. DO NOT use it in training.)code" ADD_FILELINE)
-.set_num_inputs(
-  [](const NodeAttrs& attrs) {
-    const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
-    return param.no_bias? 6 : 9;
-  })
-.set_num_outputs(3)
-.set_attr_parser(ConvolutionParamParser)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
-    if (param.no_bias) {
-      return std::vector<std::string>{"data", "weight", "min_data", "max_data",
-                                      "min_weight", "max_weight"};
-    } else {
-      return std::vector<std::string>{"data", "weight", "bias", "min_data", "max_data",
-                                      "min_weight", "max_weight", "min_bias", "max_bias"};
-    }
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedConvShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedConvType)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizedConvStorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-  })
-.set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_argument("weight", "NDArray-or-Symbol", "weight.")
-.add_argument("bias", "NDArray-or-Symbol", "bias.")
-.add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
-.add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
-.add_argument("min_weight", "NDArray-or-Symbol", "Minimum value of weight.")
-.add_argument("max_weight", "NDArray-or-Symbol", "Maximum value of weight.")
-.add_argument("min_bias", "NDArray-or-Symbol", "Minimum value of bias.")
-.add_argument("max_bias", "NDArray-or-Symbol", "Maximum value of bias.")
-.add_arguments(ConvolutionParam::__FIELDS__());
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
+      return param.no_bias ? 6 : 9;
+    })
+    .set_num_outputs(3)
+    .set_attr_parser(ConvolutionParamParser)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
+          if (param.no_bias) {
+            return std::vector<std::string>{
+                "data", "weight", "min_data", "max_data", "min_weight", "max_weight"};
+          } else {
+            return std::vector<std::string>{"data",
+                                            "weight",
+                                            "bias",
+                                            "min_data",
+                                            "max_data",
+                                            "min_weight",
+                                            "max_weight",
+                                            "min_bias",
+                                            "max_bias"};
+          }
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedConvShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedConvType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizedConvStorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>(1,
+                                                                      ResourceRequest::kTempSpace);
+                                })
+    .set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_argument("weight", "NDArray-or-Symbol", "weight.")
+    .add_argument("bias", "NDArray-or-Symbol", "bias.")
+    .add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
+    .add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
+    .add_argument("min_weight", "NDArray-or-Symbol", "Minimum value of weight.")
+    .add_argument("max_weight", "NDArray-or-Symbol", "Maximum value of weight.")
+    .add_argument("min_bias", "NDArray-or-Symbol", "Minimum value of bias.")
+    .add_argument("max_bias", "NDArray-or-Symbol", "Maximum value of bias.")
+    .add_arguments(ConvolutionParam::__FIELDS__());
 
 NNVM_REGISTER_OP(Convolution)
-.set_attr<FQuantizable>("FQuantizable", [](const NodeAttrs& attrs) {
-    return QuantizeType::kMust;
-})
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-    nnvm::ObjectPtr node = nnvm::Node::Create();
-    node->attrs.op = Op::Get("_contrib_quantized_conv");
-    node->attrs.name = "quantized_" + attrs.name;
-    node->attrs.dict = attrs.dict;
-    if (node->op()->attr_parser != nullptr) {
-      node->op()->attr_parser(&(node->attrs));
-    }
-    return node;
-  });
+    .set_attr<FQuantizable>("FQuantizable",
+                            [](const NodeAttrs& attrs) { return QuantizeType::kMust; })
+    .set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+      nnvm::ObjectPtr node = nnvm::Node::Create();
+      node->attrs.op       = Op::Get("_contrib_quantized_conv");
+      node->attrs.name     = "quantized_" + attrs.name;
+      node->attrs.dict     = attrs.dict;
+      if (node->op()->attr_parser != nullptr) {
+        node->op()->attr_parser(&(node->attrs));
+      }
+      return node;
+    });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_conv.cu b/src/operator/quantization/quantized_conv.cu
index 28bd43239066..5c91f5143c2e 100644
--- a/src/operator/quantization/quantized_conv.cu
+++ b/src/operator/quantization/quantized_conv.cu
@@ -22,7 +22,7 @@
  * \file quantized_conv.cu
  * \brief
  * \author Ziheng Jiang, Jun Wu
-*/
+ */
 #include "../nn/convolution-inl.h"
 #include "./quantization_utils.h"
 #include "../tensor/matrix_op-inl.h"
@@ -32,26 +32,30 @@ namespace op {
 
 // value + bias_value * (range1 / limit_range1) * (limit_range2 / range2)
 struct QuantizedBiasAddKernel {
-  MSHADOW_XINLINE static void Map(int i, size_t bias_size, int32_t *out,
-                                  const int8_t *bias, const float *min_out,
-                                  const float *max_out, const float *min_bias,
-                                  const float *max_bias, const size_t spatial_size) {
-    using mshadow::red::limits::MinValue;
+  MSHADOW_XINLINE static void Map(int i,
+                                  size_t bias_size,
+                                  int32_t* out,
+                                  const int8_t* bias,
+                                  const float* min_out,
+                                  const float* max_out,
+                                  const float* min_bias,
+                                  const float* max_bias,
+                                  const size_t spatial_size) {
     using mshadow::red::limits::MaxValue;
-    float float_for_one_out_quant  =
-      MaxAbs(*min_out, *max_out) / static_cast<double>(MaxValue<int32_t>());
+    using mshadow::red::limits::MinValue;
+    float float_for_one_out_quant =
+        MaxAbs(*min_out, *max_out) / static_cast<double>(MaxValue<int32_t>());
     float float_for_one_bias_quant =
-      MaxAbs(*min_bias, *max_bias) / static_cast<double>(MaxValue<int8_t>());
+        MaxAbs(*min_bias, *max_bias) / static_cast<double>(MaxValue<int8_t>());
     const size_t channel_id = (i / spatial_size) % bias_size;
-    out[i] = (out[i] * float_for_one_out_quant +
-              bias[channel_id] * float_for_one_bias_quant) /
+    out[i] = (out[i] * float_for_one_out_quant + bias[channel_id] * float_for_one_bias_quant) /
              float_for_one_out_quant;
   }
 };
 
 #if MXNET_USE_CUDNN == 1 && CUDA_VERSION >= 8000
 STATIC_ASSERT_CUDNN_VERSION_GE(6000);
-template<typename SrcType, typename DstType, typename CmpType>
+template <typename SrcType, typename DstType, typename CmpType>
 class QuantizedCuDNNConvOp {
  public:
   QuantizedCuDNNConvOp() {
@@ -67,20 +71,23 @@ class QuantizedCuDNNConvOp {
             const mxnet::ShapeVector& out_shape) {
     param_ = param;
     CHECK_EQ(param_.kernel.ndim(), 2U)
-      << "QuantizedCuDNNConvOp only supports 2D convolution for now";
+        << "QuantizedCuDNNConvOp only supports 2D convolution for now";
     if (param_.layout.has_value()) {
       CHECK_EQ(param_.layout.value(), mshadow::kNCHW)
-        << "QuantizedConvOp only supports NCHW for now";
+          << "QuantizedConvOp only supports NCHW for now";
     }
-    if (param_.stride.ndim() == 0U) param_.stride = mshadow::Shape2(1, 1);
-    if (param_.dilate.ndim() == 0U) param_.dilate = mshadow::Shape2(1, 1);
-    if (param_.pad.ndim() == 0U)    param_.pad = mshadow::Shape2(0, 0);
+    if (param_.stride.ndim() == 0U)
+      param_.stride = mshadow::Shape2(1, 1);
+    if (param_.dilate.ndim() == 0U)
+      param_.dilate = mshadow::Shape2(1, 1);
+    if (param_.pad.ndim() == 0U)
+      param_.pad = mshadow::Shape2(0, 0);
     N = 0, H = 2, W = 3, C = 1;
     src_type_ = mshadow::DataType<SrcType>::kCudnnFlag;
     dst_type_ = mshadow::DataType<DstType>::kCudnnFlag;
     cmp_type_ = mshadow::DataType<CmpType>::kCudnnFlag;
-    algo_ = CUDNN_CONVOLUTION_FWD_ALGO_IMPLICIT_PRECOMP_GEMM;
-    format_ = CUDNN_TENSOR_NHWC;
+    algo_     = CUDNN_CONVOLUTION_FWD_ALGO_IMPLICIT_PRECOMP_GEMM;
+    format_   = CUDNN_TENSOR_NHWC;
     InitDescriptors(in_shape, out_shape);
     GetTempSize(ctx);
   }
@@ -92,57 +99,65 @@ class QuantizedCuDNNConvOp {
     CUDNN_CALL(cudnnDestroyConvolutionDescriptor(conv_desc_));
   }
 
-  void Forward(const OpContext &ctx,
-               const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     CHECK_EQ(param_.kernel.ndim(), 2U)
-      << "QuantizedCuDNNConvOp only supports 2D convolution for now";
+        << "QuantizedCuDNNConvOp only supports 2D convolution for now";
     using namespace mshadow;
-    CHECK_EQ(in_data.size(), param_.no_bias? 6U : 9U);
+    CHECK_EQ(in_data.size(), param_.no_bias ? 6U : 9U);
     CHECK_EQ(out_data.size(), 3U);
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     CHECK_EQ(s->dnn_handle_ownership_, Stream<gpu>::OwnHandle);
 
-    const TBlob& data   = in_data[0];
-    const TBlob& filter = in_data[1];
-    const TBlob& out    = out_data[0];
+    const TBlob& data           = in_data[0];
+    const TBlob& filter         = in_data[1];
+    const TBlob& out            = out_data[0];
     const mxnet::TShape& dshape = data.shape_;
     const mxnet::TShape& fshape = filter.shape_;
     const mxnet::TShape& oshape = out.shape_;
 
     // allocate workspace
-    const int dev_id = ctx.run_ctx.ctx.dev_id;
+    const int dev_id   = ctx.run_ctx.ctx.dev_id;
     const int dev_mask = gpu::kDevMask;
     if (!param_.layout.has_value() || param_.layout.value() == mshadow::kNCHW) {
-      const size_t data_size = dshape.Size();
+      const size_t data_size   = dshape.Size();
       const size_t weight_size = fshape.Size();
       const size_t output_size = oshape.Size();
-      size_t total_temp_bytes = (workspace_ + data_size + weight_size) * sizeof(SrcType)
-                              + output_size * (sizeof(DstType) + sizeof(int32_t));
+      size_t total_temp_bytes  = (workspace_ + data_size + weight_size) * sizeof(SrcType) +
+                                output_size * (sizeof(DstType) + sizeof(int32_t));
       Tensor<gpu, 1, char> temp_space =
-        ctx.requested[0].get_space_typed<gpu, 1, char>(mshadow::Shape1(total_temp_bytes), s);
+          ctx.requested[0].get_space_typed<gpu, 1, char>(mshadow::Shape1(total_temp_bytes), s);
       char* temp_dptr = temp_space.dptr_;
       TBlob data_(reinterpret_cast<SrcType*>(temp_dptr),
                   mxnet::TShape({dshape[N], dshape[H], dshape[W], dshape[C]}),
-                  dev_mask, DataType<SrcType>::kFlag, dev_id);
+                  dev_mask,
+                  DataType<SrcType>::kFlag,
+                  dev_id);
       temp_dptr += data_size * sizeof(SrcType);
       TBlob filter_(reinterpret_cast<SrcType*>(temp_dptr),
                     mxnet::TShape({fshape[N], fshape[H], fshape[W], fshape[C]}),
-                    dev_mask, DataType<SrcType>::kFlag, dev_id);
+                    dev_mask,
+                    DataType<SrcType>::kFlag,
+                    dev_id);
       temp_dptr += weight_size * sizeof(SrcType);
 
       // input:  [NCHW] => [NHWC](batch, in_height, in_width, in_channels)
       // filter: [NCHW] => [NHWC](out_channels, filter_height, filter_width, in_channels)
-      TransposeImpl<gpu>(ctx.run_ctx, data,   data_,   mxnet::TShape({N, H, W, C}));
+      TransposeImpl<gpu>(ctx.run_ctx, data, data_, mxnet::TShape({N, H, W, C}));
       TransposeImpl<gpu>(ctx.run_ctx, filter, filter_, mxnet::TShape({N, H, W, C}));
       TBlob out_(reinterpret_cast<DstType*>(temp_dptr),
                  mxnet::TShape({oshape[N], oshape[H], oshape[W], oshape[C]}),
-                 dev_mask, DataType<DstType>::kFlag, dev_id);
+                 dev_mask,
+                 DataType<DstType>::kFlag,
+                 dev_id);
       temp_dptr += output_size * sizeof(DstType);
       TBlob out_tcast(reinterpret_cast<int32_t*>(temp_dptr),
                       mxnet::TShape({oshape[N], oshape[H], oshape[W], oshape[C]}),
-                      dev_mask, DataType<int32_t>::kFlag, dev_id);
+                      dev_mask,
+                      DataType<int32_t>::kFlag,
+                      dev_id);
       temp_dptr += output_size * sizeof(int32_t);
       // input:  [NHWC](batch, in_height, in_width, in_channels)
       // filter: [HWNC](out_channels, filter_height, filter_width, in_channels)
@@ -162,7 +177,7 @@ class QuantizedCuDNNConvOp {
                                          out_desc_,
                                          out_.dptr_));
 
-      Tensor<gpu, 1, DstType> out_tensor = out_.FlatTo1D<gpu, DstType>(s);
+      Tensor<gpu, 1, DstType> out_tensor       = out_.FlatTo1D<gpu, DstType>(s);
       Tensor<gpu, 1, int32_t> out_tcast_tensor = out_tcast.FlatTo1D<gpu, int32_t>(s);
       Assign(out_tcast_tensor, kWriteTo, mshadow::expr::tcast<int32_t>(out_tensor));
       // output: [NHWC](batch, out_height, out_width, out_channels) => [NCHW]
@@ -175,29 +190,38 @@ class QuantizedCuDNNConvOp {
     // of in_data[0] and in_data[1]. Need to rescale the min/max range of out_data
     // based on the min/max ranges of in_data[0] and in_data[1].
     const size_t num_inputs = param_.no_bias ? 2 : 3;
-    mxnet_op::Kernel<QuantizationRangeForS8S8MultiplicationStruct, gpu>::Launch(s, 1,
-      out_data[1].dptr<float>(), out_data[2].dptr<float>(),
-       in_data[num_inputs].dptr<float>(),  in_data[num_inputs+1].dptr<float>(),
-       in_data[num_inputs+2].dptr<float>(),  in_data[num_inputs+3].dptr<float>());
+    mxnet_op::Kernel<QuantizationRangeForS8S8MultiplicationStruct, gpu>::Launch(
+        s,
+        1,
+        out_data[1].dptr<float>(),
+        out_data[2].dptr<float>(),
+        in_data[num_inputs].dptr<float>(),
+        in_data[num_inputs + 1].dptr<float>(),
+        in_data[num_inputs + 2].dptr<float>(),
+        in_data[num_inputs + 3].dptr<float>());
 
     if (!param_.no_bias) {
       if (param_.layout.has_value()) {
         CHECK_EQ(param_.layout.value(), mshadow::kNCHW)
-          << "quantized_conv only supports NCHW when there is a bias";
+            << "quantized_conv only supports NCHW when there is a bias";
       }
       const TBlob& bias = in_data[2];
-      mxnet_op::Kernel<QuantizedBiasAddKernel, gpu>::Launch(s, out.Size(),
-          bias.Size(), out.dptr<int32_t>(), bias.dptr<int8_t>(),
-          out_data[1].dptr<float>(), out_data[2].dptr<float>(),
-          in_data[7].dptr<float>(),  in_data[8].dptr<float>(),
-          oshape[2] * oshape[3]);
+      mxnet_op::Kernel<QuantizedBiasAddKernel, gpu>::Launch(s,
+                                                            out.Size(),
+                                                            bias.Size(),
+                                                            out.dptr<int32_t>(),
+                                                            bias.dptr<int8_t>(),
+                                                            out_data[1].dptr<float>(),
+                                                            out_data[2].dptr<float>(),
+                                                            in_data[7].dptr<float>(),
+                                                            in_data[8].dptr<float>(),
+                                                            oshape[2] * oshape[3]);
     }
   }
 
-  void InitDescriptors(const mxnet::ShapeVector& in_shape,
-                       const mxnet::ShapeVector& out_shape) {
-    const mxnet::TShape& dshape =  in_shape[0];
-    const mxnet::TShape& kshape =  in_shape[1];
+  void InitDescriptors(const mxnet::ShapeVector& in_shape, const mxnet::ShapeVector& out_shape) {
+    const mxnet::TShape& dshape = in_shape[0];
+    const mxnet::TShape& kshape = in_shape[1];
     const mxnet::TShape& oshape = out_shape[0];
     CUDNN_CALL(cudnnSetConvolution2dDescriptor(conv_desc_,
                                                param_.pad[0],
@@ -209,38 +233,18 @@ class QuantizedCuDNNConvOp {
                                                CUDNN_CROSS_CORRELATION,
                                                cmp_type_));
 
-    CUDNN_CALL(cudnnSetTensor4dDescriptor(data_desc_,
-                                          format_,
-                                          src_type_,
-                                          dshape[N],
-                                          dshape[C],
-                                          dshape[H],
-                                          dshape[W]));
-    CUDNN_CALL(cudnnSetTensor4dDescriptor(out_desc_,
-                                          format_,
-                                          dst_type_,
-                                          oshape[N],
-                                          oshape[C],
-                                          oshape[H],
-                                          oshape[W]));
-    CUDNN_CALL(cudnnSetFilter4dDescriptor(filter_desc_,
-                                          src_type_,
-                                          format_,
-                                          kshape[N],
-                                          kshape[C],
-                                          kshape[H],
-                                          kshape[W]));
+    CUDNN_CALL(cudnnSetTensor4dDescriptor(
+        data_desc_, format_, src_type_, dshape[N], dshape[C], dshape[H], dshape[W]));
+    CUDNN_CALL(cudnnSetTensor4dDescriptor(
+        out_desc_, format_, dst_type_, oshape[N], oshape[C], oshape[H], oshape[W]));
+    CUDNN_CALL(cudnnSetFilter4dDescriptor(
+        filter_desc_, src_type_, format_, kshape[N], kshape[C], kshape[H], kshape[W]));
   }
 
   void GetTempSize(const OpContext& ctx) {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-    CUDNN_CALL(cudnnGetConvolutionForwardWorkspaceSize(s->dnn_handle_,
-                                                       data_desc_,
-                                                       filter_desc_,
-                                                       conv_desc_,
-                                                       out_desc_,
-                                                       algo_,
-                                                       &workspace_byte_));
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    CUDNN_CALL(cudnnGetConvolutionForwardWorkspaceSize(
+        s->dnn_handle_, data_desc_, filter_desc_, conv_desc_, out_desc_, algo_, &workspace_byte_));
     workspace_ = workspace_byte_ / sizeof(SrcType) + 1;
   }
 
@@ -259,8 +263,8 @@ class QuantizedCuDNNConvOp {
   cudnnConvolutionFwdAlgo_t algo_;
   uint32_t N, H, W, C;
   float alpha_ = 1.0f;
-  float beta_ = 0.0f;
-};  // class QuantizedCuDNNConvOp
+  float beta_  = 0.0f;
+};      // class QuantizedCuDNNConvOp
 #endif  // MXNET_USE_CUDNN == 1 && CUDA_VERSION >= 8000
 
 void QuantizedConvForwardGPU(const nnvm::NodeAttrs& attrs,
@@ -270,7 +274,7 @@ void QuantizedConvForwardGPU(const nnvm::NodeAttrs& attrs,
                              const std::vector<TBlob>& outputs) {
   const ConvolutionParam& param = nnvm::get<ConvolutionParam>(attrs.parsed);
   CHECK_EQ(param.kernel.ndim(), 2U)
-    << "QuantizedConvForward<gpu> only supports 2D convolution for now";
+      << "QuantizedConvForward<gpu> only supports 2D convolution for now";
 #if MXNET_USE_CUDNN == 1 && CUDA_VERSION >= 8000
   typedef QuantizedCuDNNConvOp<int8_t, float, int32_t> QuantizedConvOpInt8;
 #if DMLC_CXX11_THREAD_LOCAL
@@ -287,7 +291,7 @@ void QuantizedConvForwardGPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_conv)
-.set_attr<FCompute>("FCompute<gpu>", QuantizedConvForwardGPU);
+    .set_attr<FCompute>("FCompute<gpu>", QuantizedConvForwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_elemwise_add-inl.h b/src/operator/quantization/quantized_elemwise_add-inl.h
index 673b281d6cdc..3a916546ed16 100644
--- a/src/operator/quantization/quantized_elemwise_add-inl.h
+++ b/src/operator/quantization/quantized_elemwise_add-inl.h
@@ -35,22 +35,24 @@ struct QuantizeElemwiseAddParam : public dmlc::Parameter<QuantizeElemwiseAddPara
   dmlc::optional<float> max_calib_range;
   DMLC_DECLARE_PARAMETER(QuantizeElemwiseAddParam) {
     DMLC_DECLARE_FIELD(min_calib_range)
-    .set_default(dmlc::optional<float>())
-    .describe("The minimum scalar value in the form of float32 obtained "
-              "through calibration. If present, it will be used to requantize the "
-              "int8 output data.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The minimum scalar value in the form of float32 obtained "
+            "through calibration. If present, it will be used to requantize the "
+            "int8 output data.");
     DMLC_DECLARE_FIELD(max_calib_range)
-    .set_default(dmlc::optional<float>())
-    .describe("The maximum scalar value in the form of float32 obtained "
-              "through calibration. If present, it will be used to requantize the "
-              "int8 output data.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The maximum scalar value in the form of float32 obtained "
+            "through calibration. If present, it will be used to requantize the "
+            "int8 output data.");
   }
 };
 
 namespace quantized_elemwise_add_enum {
 enum QuantizedElemwiseAddOutputs { kOut, kMin, kMax };
-enum QuantizedElemwiseAddInputs { kDataA, kDataB, kAMin, kAMax, kBMin, kBMax};
-}
+enum QuantizedElemwiseAddInputs { kDataA, kDataB, kAMin, kAMax, kBMin, kBMax };
+}  // namespace quantized_elemwise_add_enum
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_elemwise_add.cc b/src/operator/quantization/quantized_elemwise_add.cc
index 92483af60dcc..9e505a2dd557 100644
--- a/src/operator/quantization/quantized_elemwise_add.cc
+++ b/src/operator/quantization/quantized_elemwise_add.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2019 by Contributors
  * \file quantized_elemwise_add.cc
  * \brief
-*/
+ */
 #include "../tensor/elemwise_unary_op.h"
 #include "./quantized_elemwise_add-inl.h"
 
@@ -37,7 +37,6 @@ static bool ElemwiseAddShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_shape->size(), 3U);
   CHECK_EQ((*in_shape)[0], (*in_shape)[1]);
 
-
   SHAPE_ASSIGN_CHECK(*in_shape, 2, TShape{1});
   SHAPE_ASSIGN_CHECK(*in_shape, 3, TShape{1});
   SHAPE_ASSIGN_CHECK(*in_shape, 4, TShape{1});
@@ -67,7 +66,7 @@ static bool ElemwiseAddType(const nnvm::NodeAttrs& attrs,
     }
   }
   // C
-  int dtype = mshadow::kInt32;
+  int dtype                              = mshadow::kInt32;
   const QuantizeElemwiseAddParam& params = nnvm::get<QuantizeElemwiseAddParam>(attrs.parsed);
   if (params.max_calib_range.has_value() && params.min_calib_range.has_value()) {
     dtype = (in_type->at(0) == in_type->at(1)) ? in_type->at(0) : mshadow::kInt8;
@@ -82,17 +81,17 @@ static bool ElemwiseAddType(const nnvm::NodeAttrs& attrs,
 }
 
 void QuantizedElemwiseAddForward(const nnvm::NodeAttrs& attrs,
-                                 const OpContext &ctx,
-                                 const std::vector<TBlob> &in_data,
-                                 const std::vector<OpReqType> &req,
-                                 const std::vector<TBlob> &out_data) {
+                                 const OpContext& ctx,
+                                 const std::vector<TBlob>& in_data,
+                                 const std::vector<OpReqType>& req,
+                                 const std::vector<TBlob>& out_data) {
   LOG(FATAL) << "Not supported for MXNet built without MKLDNN. "
                 "Please install MKLDNN enabled MXNet.";
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_elemwise_add)
-.add_alias("_npx_quantized_elemwise_add")
-.describe(R"code(elemwise_add operator for input dataA and input dataB data type of int8,
+    .add_alias("_npx_quantized_elemwise_add")
+    .describe(R"code(elemwise_add operator for input dataA and input dataB data type of int8,
 and accumulates in type int32 for the output. For each argument, two more arguments of type
 float32 must be provided representing the thresholds of quantizing argument from data
 type float32 to int8. The final outputs contain result in int32, and min
@@ -102,36 +101,38 @@ and max thresholds representing the threholds for quantizing the float32 output
     This operator only supports forward propogation. DO NOT use it in training.
 
 )code")
-.set_num_inputs([](const NodeAttrs& attrs) {
-// A, B, A_min, A_max, B_min, B_max
-  return 6;
-})
-// C, C_min, C_max
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"lhs", "rhs", "lhs_min", "lhs_max", "rhs_min", "rhs_max"}; \
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output", "min_output", "max_output"};
-})
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseAddType)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseAddShape)
-.set_attr<FCompute>("FCompute<cpu>", QuantizedElemwiseAddForward)
-.set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
-.add_argument("lhs", "NDArray-or-Symbol", "first input")
-.add_argument("rhs", "NDArray-or-Symbol", "second input")
-.add_argument("lhs_min", "NDArray-or-Symbol", "3rd input")
-.add_argument("lhs_max", "NDArray-or-Symbol", "4th input")
-.add_argument("rhs_min", "NDArray-or-Symbol", "5th input")
-.add_argument("rhs_max", "NDArray-or-Symbol", "6th input");
-
-
-NNVM_REGISTER_OP(elemwise_add)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      // A, B, A_min, A_max, B_min, B_max
+      return 6;
+    })
+    // C, C_min, C_max
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"lhs", "rhs", "lhs_min", "lhs_max", "rhs_min", "rhs_max"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseAddType)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseAddShape)
+    .set_attr<FCompute>("FCompute<cpu>", QuantizedElemwiseAddForward)
+    .set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
+    .add_argument("lhs", "NDArray-or-Symbol", "first input")
+    .add_argument("rhs", "NDArray-or-Symbol", "second input")
+    .add_argument("lhs_min", "NDArray-or-Symbol", "3rd input")
+    .add_argument("lhs_max", "NDArray-or-Symbol", "4th input")
+    .add_argument("rhs_min", "NDArray-or-Symbol", "5th input")
+    .add_argument("rhs_max", "NDArray-or-Symbol", "6th input");
+
+NNVM_REGISTER_OP(elemwise_add).set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
   nnvm::ObjectPtr node = nnvm::Node::Create();
-  node->attrs.op = Op::Get("_contrib_quantized_elemwise_add");
-  node->attrs.name = "quantized_" + attrs.name;
-  node->attrs.dict = attrs.dict;
+  node->attrs.op       = Op::Get("_contrib_quantized_elemwise_add");
+  node->attrs.name     = "quantized_" + attrs.name;
+  node->attrs.dict     = attrs.dict;
   if (node->op()->attr_parser != nullptr) {
     node->op()->attr_parser(&(node->attrs));
   }
diff --git a/src/operator/quantization/quantized_elemwise_mul-inl.h b/src/operator/quantization/quantized_elemwise_mul-inl.h
index f58db8a45eea..766eb85e0761 100644
--- a/src/operator/quantization/quantized_elemwise_mul-inl.h
+++ b/src/operator/quantization/quantized_elemwise_mul-inl.h
@@ -36,28 +36,29 @@ struct QuantizeElemwiseMulParam : public dmlc::Parameter<QuantizeElemwiseMulPara
   bool enable_float_output;
   DMLC_DECLARE_PARAMETER(QuantizeElemwiseMulParam) {
     DMLC_DECLARE_FIELD(min_calib_range)
-    .set_default(dmlc::optional<float>())
-    .describe("The minimum scalar value in the form of float32 obtained "
-              "through calibration. If present, it will be used to requantize the "
-              "int8 output data.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The minimum scalar value in the form of float32 obtained "
+            "through calibration. If present, it will be used to requantize the "
+            "int8 output data.");
     DMLC_DECLARE_FIELD(max_calib_range)
-    .set_default(dmlc::optional<float>())
-    .describe("The maximum scalar value in the form of float32 obtained "
-              "through calibration. If present, it will be used to requantize the "
-              "int8 output data.");
-    DMLC_DECLARE_FIELD(enable_float_output).set_default(false)
-    .describe("Whether to enable float32 output");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The maximum scalar value in the form of float32 obtained "
+            "through calibration. If present, it will be used to requantize the "
+            "int8 output data.");
+    DMLC_DECLARE_FIELD(enable_float_output)
+        .set_default(false)
+        .describe("Whether to enable float32 output");
   }
 };
 
 namespace quantized_elemwise_mul {
-enum QuantizedElemwiseMulOpInputs {kLhs, kRhs, kLhsMin, kLhsMax, kRhsMin, kRhsMax};
-enum QuantizedElemwiseMulOpOutputs {kOut, kOutMin, kOutMax};
-enum QuantizedElemwiseMulOpResource {kTempSpace};
+enum QuantizedElemwiseMulOpInputs { kLhs, kRhs, kLhsMin, kLhsMax, kRhsMin, kRhsMax };
+enum QuantizedElemwiseMulOpOutputs { kOut, kOutMin, kOutMax };
+enum QuantizedElemwiseMulOpResource { kTempSpace };
 }  // namespace quantized_elemwise_mul
 
-
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/quantization/quantized_elemwise_mul.cc b/src/operator/quantization/quantized_elemwise_mul.cc
index 41727d9f0ed0..043ac176b0af 100644
--- a/src/operator/quantization/quantized_elemwise_mul.cc
+++ b/src/operator/quantization/quantized_elemwise_mul.cc
@@ -33,15 +33,16 @@ namespace op {
 DMLC_REGISTER_PARAMETER(QuantizeElemwiseMulParam);
 
 inline bool QuantizedElemwiseMulOpShape(const nnvm::NodeAttrs& attrs,
-                                        mxnet::ShapeVector *in_attrs,
-                                        mxnet::ShapeVector *out_attrs) {
+                                        mxnet::ShapeVector* in_attrs,
+                                        mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
   const QuantizeElemwiseMulParam& params = nnvm::get<QuantizeElemwiseMulParam>(attrs.parsed);
-  const mxnet::TShape &lshape = (*in_attrs)[quantized_elemwise_mul::kLhs];
-  const mxnet::TShape &rshape = (*in_attrs)[quantized_elemwise_mul::kRhs];
-  if (!ndim_is_known(lshape) || !ndim_is_known(rshape)) return false;
+  const mxnet::TShape& lshape            = (*in_attrs)[quantized_elemwise_mul::kLhs];
+  const mxnet::TShape& rshape            = (*in_attrs)[quantized_elemwise_mul::kRhs];
+  if (!ndim_is_known(lshape) || !ndim_is_known(rshape))
+    return false;
   CHECK_EQ(lshape.ndim(), rshape.ndim())
-    << "Currently, quantized elemwise multiply doesn't support broadcast.";
+      << "Currently, quantized elemwise multiply doesn't support broadcast.";
   for (int i = 0; i < lshape.ndim(); ++i) {
     CHECK_EQ(lshape[i], rshape[i]);
   }
@@ -59,8 +60,8 @@ inline bool QuantizedElemwiseMulOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool QuantizedElemwiseMulOpType(const nnvm::NodeAttrs& attrs,
-                                       std::vector<int> *in_type,
-                                       std::vector<int> *out_type) {
+                                       std::vector<int>* in_type,
+                                       std::vector<int>* out_type) {
   const QuantizeElemwiseMulParam& params = nnvm::get<QuantizeElemwiseMulParam>(attrs.parsed);
   for (int i = 0; i < 2; ++i) {
     if (in_type->at(i) == mshadow::kInt8) {
@@ -91,19 +92,19 @@ inline bool QuantizedElemwiseMulOpType(const nnvm::NodeAttrs& attrs,
 inline bool QuantizedElemwiseMulOpStorageType(const nnvm::NodeAttrs& attrs,
                                               int dev_mask,
                                               DispatchMode* dispatch_mode,
-                                              std::vector<int> *in_attrs,
-                                              std::vector<int> *out_attrs) {
+                                              std::vector<int>* in_attrs,
+                                              std::vector<int>* out_attrs) {
   using namespace common;
   *dispatch_mode = DispatchMode::kFCompute;
 
-  for (auto &v : *out_attrs) {
+  for (auto& v : *out_attrs) {
     v = kDefaultStorage;
     if (common::stype_string(v).compare("unknown") == 0) {
       return false;
     }
   }
 
-  for (auto &v : *in_attrs) {
+  for (auto& v : *in_attrs) {
     v = kDefaultStorage;
     if (common::stype_string(v).compare("unknown") == 0) {
       return false;
@@ -112,11 +113,11 @@ inline bool QuantizedElemwiseMulOpStorageType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-void QuantizedElemwiseMulOpForward(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<TBlob> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<TBlob> &outputs) {
+void QuantizedElemwiseMulOpForward(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const std::vector<TBlob>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<TBlob>& outputs) {
   const QuantizeElemwiseMulParam& params = nnvm::get<QuantizeElemwiseMulParam>(attrs.parsed);
   using namespace mxnet_op;
 
@@ -127,8 +128,8 @@ void QuantizedElemwiseMulOpForward(const nnvm::NodeAttrs &attrs,
 
   float cached_output_min_ = 0.f;
   float cached_output_max_ = 0.f;
-  float out_data_scale = 1.f;
-  float out_scale = 1.f;
+  float out_data_scale     = 1.f;
+  float out_scale          = 1.f;
   if (!params.enable_float_output) {
     double output_data_range;
     // dataA && dataB are int8
@@ -140,12 +141,12 @@ void QuantizedElemwiseMulOpForward(const nnvm::NodeAttrs &attrs,
     if (params.max_calib_range.has_value() && params.min_calib_range.has_value()) {
       cached_output_min_ = params.min_calib_range.value();
       cached_output_max_ = params.max_calib_range.value();
-      out_data_scale = output_data_range / MaxAbs(cached_output_min_, cached_output_max_);
-      auto lhs_scale = kInt8Range / MaxAbs(lhs_min, lhs_max);
-      auto rhs_scale = kInt8Range / MaxAbs(rhs_min, rhs_max);
-      out_scale = out_data_scale / lhs_scale / rhs_scale;
+      out_data_scale     = output_data_range / MaxAbs(cached_output_min_, cached_output_max_);
+      auto lhs_scale     = kInt8Range / MaxAbs(lhs_min, lhs_max);
+      auto rhs_scale     = kInt8Range / MaxAbs(rhs_min, rhs_max);
+      out_scale          = out_data_scale / lhs_scale / rhs_scale;
     } else {
-      Stream<cpu> *s = ctx.get_stream<cpu>();
+      Stream<cpu>* s = ctx.get_stream<cpu>();
       if (inputs[quantized_elemwise_mul::kLhs].type_flag_ == mshadow::kInt8 &&
           inputs[quantized_elemwise_mul::kRhs].type_flag_ == mshadow::kInt8) {
         mxnet_op::Kernel<QuantizationRangeForS8S8MultiplicationStruct, cpu>::Launch(
@@ -157,48 +158,48 @@ void QuantizedElemwiseMulOpForward(const nnvm::NodeAttrs &attrs,
   } else {
     auto lhs_scale = kInt8Range / MaxAbs(lhs_min, lhs_max);
     auto rhs_scale = kInt8Range / MaxAbs(rhs_min, rhs_max);
-    out_scale = 1.0 / lhs_scale / rhs_scale;
+    out_scale      = 1.0 / lhs_scale / rhs_scale;
   }
 
   size_t out_size = outputs[quantized_elemwise_mul::kOut].Size();
-  auto *input_l = inputs[quantized_elemwise_mul::kLhs].dptr<int8_t>();
-  auto *input_r = inputs[quantized_elemwise_mul::kRhs].dptr<int8_t>();
+  auto* input_l   = inputs[quantized_elemwise_mul::kLhs].dptr<int8_t>();
+  auto* input_r   = inputs[quantized_elemwise_mul::kRhs].dptr<int8_t>();
   // TODO(Xinyu): a temp solution to enable Elemwise INT8 computation,
   // will be refactored after the DNNL primitive is done.
   if (!params.enable_float_output) {
     if (params.max_calib_range.has_value() && params.min_calib_range.has_value()) {
       typedef int8_t out_type;
-      auto *out_data = outputs[quantized_elemwise_mul::kOut].dptr<out_type>();
+      auto* out_data = outputs[quantized_elemwise_mul::kOut].dptr<out_type>();
 #if !defined(_MSC_VER)
 #pragma omp simd
 #endif
       for (size_t i = 0; i < out_size; ++i) {
         const int8_t a = input_l[i];
         const int8_t b = input_r[i];
-        out_data[i] = static_cast<out_type>(a * b * out_scale);
+        out_data[i]    = static_cast<out_type>(a * b * out_scale);
       }
     } else {
       using out_type = int32_t;
-      auto *out_data = outputs[quantized_elemwise_mul::kOut].dptr<out_type>();
+      auto* out_data = outputs[quantized_elemwise_mul::kOut].dptr<out_type>();
 #if !defined(_MSC_VER)
 #pragma omp simd
 #endif
       for (size_t i = 0; i < out_size; ++i) {
         const int8_t a = input_l[i];
         const int8_t b = input_r[i];
-        out_data[i] = static_cast<out_type>(a * b * out_scale);
+        out_data[i]    = static_cast<out_type>(a * b * out_scale);
       }
     }
   } else {
     using out_type = float_t;
-    auto *out_data = outputs[quantized_elemwise_mul::kOut].dptr<out_type>();
+    auto* out_data = outputs[quantized_elemwise_mul::kOut].dptr<out_type>();
 #if !defined(_MSC_VER)
 #pragma omp simd
 #endif
     for (size_t i = 0; i < out_size; ++i) {
       const int8_t a = input_l[i];
       const int8_t b = input_r[i];
-      out_data[i] = static_cast<out_type>(a * b * out_scale);
+      out_data[i]    = static_cast<out_type>(a * b * out_scale);
     }
   }
 
@@ -209,45 +210,45 @@ void QuantizedElemwiseMulOpForward(const nnvm::NodeAttrs &attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_elemwise_mul)
-.add_alias("_npx_quantized_elemwise_mul")
-.describe(R"code(Multiplies arguments int8 element-wise.
+    .add_alias("_npx_quantized_elemwise_mul")
+    .describe(R"code(Multiplies arguments int8 element-wise.
 )code" ADD_FILELINE)
-.set_num_inputs(6)
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const QuantizeElemwiseMulParam& params = nnvm::get<QuantizeElemwiseMulParam>(attrs.parsed);
-  return (!params.enable_float_output) ? 3 : 1;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs", "lhs_min", "lhs_max", "rhs_min", "rhs_max"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedElemwiseMulOpShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedElemwiseMulOpType)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizedElemwiseMulOpStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", QuantizedElemwiseMulOpForward)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
-.add_argument("lhs", "NDArray-or-Symbol", "first input")
-.add_argument("rhs", "NDArray-or-Symbol", "second input")
-.add_argument("lhs_min", "NDArray-or-Symbol", "Minimum value of first input.")
-.add_argument("lhs_max", "NDArray-or-Symbol", "Maximum value of first input.")
-.add_argument("rhs_min", "NDArray-or-Symbol", "Minimum value of second input.")
-.add_argument("rhs_max", "NDArray-or-Symbol", "Maximum value of second input.")
-.set_attr_parser(ParamParser<QuantizeElemwiseMulParam>)
-.add_arguments(QuantizeElemwiseMulParam::__FIELDS__());
+    .set_num_inputs(6)
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const QuantizeElemwiseMulParam& params = nnvm::get<QuantizeElemwiseMulParam>(attrs.parsed);
+      return (!params.enable_float_output) ? 3 : 1;
+    })
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"lhs", "rhs", "lhs_min", "lhs_max", "rhs_min", "rhs_max"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedElemwiseMulOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedElemwiseMulOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizedElemwiseMulOpStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", QuantizedElemwiseMulOpForward)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
+    .add_argument("lhs", "NDArray-or-Symbol", "first input")
+    .add_argument("rhs", "NDArray-or-Symbol", "second input")
+    .add_argument("lhs_min", "NDArray-or-Symbol", "Minimum value of first input.")
+    .add_argument("lhs_max", "NDArray-or-Symbol", "Maximum value of first input.")
+    .add_argument("rhs_min", "NDArray-or-Symbol", "Minimum value of second input.")
+    .add_argument("rhs_max", "NDArray-or-Symbol", "Maximum value of second input.")
+    .set_attr_parser(ParamParser<QuantizeElemwiseMulParam>)
+    .add_arguments(QuantizeElemwiseMulParam::__FIELDS__());
 
-NNVM_REGISTER_OP(elemwise_mul)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+NNVM_REGISTER_OP(elemwise_mul).set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
   nnvm::ObjectPtr node = nnvm::Node::Create();
-  node->attrs.op = Op::Get("_contrib_quantized_elemwise_mul");
-  node->attrs.name = "quantized_" + attrs.name;
-  node->attrs.dict = attrs.dict;
+  node->attrs.op       = Op::Get("_contrib_quantized_elemwise_mul");
+  node->attrs.name     = "quantized_" + attrs.name;
+  node->attrs.dict     = attrs.dict;
   if (node->op()->attr_parser != nullptr) {
     node->op()->attr_parser(&(node->attrs));
   }
diff --git a/src/operator/quantization/quantized_flatten-inl.h b/src/operator/quantization/quantized_flatten-inl.h
index de051b969659..bc6764a5d0c5 100644
--- a/src/operator/quantization/quantized_flatten-inl.h
+++ b/src/operator/quantization/quantized_flatten-inl.h
@@ -38,17 +38,21 @@ namespace op {
 
 // keep zero-center
 struct quantized_flatten {
-  template<typename DstDType, typename SrcDType>
-  MSHADOW_XINLINE static void Map(int i, DstDType *out, float *omin_range,
-                                  float *omax_range, const SrcDType *in,
-                                  const float *imin_range, const float *imax_range) {
-    out[i] = in[i];
+  template <typename DstDType, typename SrcDType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DstDType* out,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const SrcDType* in,
+                                  const float* imin_range,
+                                  const float* imax_range) {
+    out[i]        = in[i];
     omin_range[0] = imin_range[0];
     omax_range[0] = imax_range[0];
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void QuantizedFlattenCompute(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -57,36 +61,48 @@ void QuantizedFlattenCompute(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 3U);
   CHECK_EQ(req.size(), 3U);
-  if (req[0] == kWriteInplace && req[1] == kWriteInplace && req[2] == kWriteInplace) return;
+  if (req[0] == kWriteInplace && req[1] == kWriteInplace && req[2] == kWriteInplace)
+    return;
   using namespace mshadow;
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   if (inputs[0].type_flag_ == mshadow::kUint8) {
     typedef uint8_t SrcDType;
     typedef uint8_t DstDType;
-    Kernel<quantized_flatten, xpu>::Launch(s, outputs[0].Size(),
-      outputs[0].dptr<DstDType>(), outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-      inputs[0].dptr<SrcDType>(), inputs[1].dptr<float>(), inputs[2].dptr<float>());
+    Kernel<quantized_flatten, xpu>::Launch(s,
+                                           outputs[0].Size(),
+                                           outputs[0].dptr<DstDType>(),
+                                           outputs[1].dptr<float>(),
+                                           outputs[2].dptr<float>(),
+                                           inputs[0].dptr<SrcDType>(),
+                                           inputs[1].dptr<float>(),
+                                           inputs[2].dptr<float>());
   } else if (inputs[0].type_flag_ == mshadow::kInt8) {
     typedef int8_t SrcDType;
     typedef int8_t DstDType;
-    Kernel<quantized_flatten, xpu>::Launch(s, outputs[0].Size(),
-      outputs[0].dptr<DstDType>(), outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-      inputs[0].dptr<SrcDType>(), inputs[1].dptr<float>(), inputs[2].dptr<float>());
+    Kernel<quantized_flatten, xpu>::Launch(s,
+                                           outputs[0].Size(),
+                                           outputs[0].dptr<DstDType>(),
+                                           outputs[1].dptr<float>(),
+                                           outputs[2].dptr<float>(),
+                                           inputs[0].dptr<SrcDType>(),
+                                           inputs[1].dptr<float>(),
+                                           inputs[2].dptr<float>());
   } else {
     LOG(FATAL) << "quantized_flatten op only supports int8 and uint8 as input and output type";
   }
 }
 
 inline bool QuantizedFlattenShape(const nnvm::NodeAttrs& attrs,
-                                  mxnet::ShapeVector *in_attrs,
-                                  mxnet::ShapeVector *out_attrs) {
+                                  mxnet::ShapeVector* in_attrs,
+                                  mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 3U);
 
-  const mxnet::TShape &dshape = (*in_attrs)[0];
-  if (!shape_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = (*in_attrs)[0];
+  if (!shape_is_known(dshape))
+    return false;
 
   dim_t target_dim = 1;
   for (int i = 1; i < dshape.ndim(); ++i) {
@@ -102,8 +118,8 @@ inline bool QuantizedFlattenShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool QuantizedFlattenType(const nnvm::NodeAttrs& attrs,
-                                 std::vector<int> *in_attrs,
-                                 std::vector<int> *out_attrs) {
+                                 std::vector<int>* in_attrs,
+                                 std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 3U);
   TYPE_ASSIGN_CHECK(*in_attrs, 1, mshadow::kFloat32);
diff --git a/src/operator/quantization/quantized_flatten.cc b/src/operator/quantization/quantized_flatten.cc
index ead46f2c52fb..458ec46ea0b4 100644
--- a/src/operator/quantization/quantized_flatten.cc
+++ b/src/operator/quantization/quantized_flatten.cc
@@ -29,44 +29,50 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_quantized_flatten)
-.add_alias("_npx_quantized_flatten")
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedFlattenShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedFlattenType)
-.set_attr<FCompute>("FCompute<cpu>", QuantizedFlattenCompute<cpu>)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "min_data", "max_data"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {1, 1}, {2, 2}};
-  })
-.add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
-.add_argument("min_data", "NDArray-or-Symbol", "The minimum scalar value "
-  "possibly produced for the data")
-.add_argument("max_data", "NDArray-or-Symbol", "The maximum scalar value "
-  "possibly produced for the data");
+    .add_alias("_npx_quantized_flatten")
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedFlattenShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedFlattenType)
+    .set_attr<FCompute>("FCompute<cpu>", QuantizedFlattenCompute<cpu>)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "min_data", "max_data"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<nnvm::FInplaceOption>(
+        "FInplaceOption",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::pair<int, int> >{{0, 0}, {1, 1}, {2, 2}};
+        })
+    .add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `float32`")
+    .add_argument("min_data",
+                  "NDArray-or-Symbol",
+                  "The minimum scalar value "
+                  "possibly produced for the data")
+    .add_argument("max_data",
+                  "NDArray-or-Symbol",
+                  "The maximum scalar value "
+                  "possibly produced for the data");
 
-NNVM_REGISTER_OP(Flatten)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-    nnvm::ObjectPtr node = nnvm::Node::Create();
-    node->attrs.op = Op::Get("_contrib_quantized_flatten");
-    node->attrs.name = "quantized_" + attrs.name;
-    node->attrs.dict = attrs.dict;
-    if (node->op()->attr_parser != nullptr) {
-      node->op()->attr_parser(&(node->attrs));
-    }
-    return node;
-  });
+NNVM_REGISTER_OP(Flatten).set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+  nnvm::ObjectPtr node = nnvm::Node::Create();
+  node->attrs.op       = Op::Get("_contrib_quantized_flatten");
+  node->attrs.name     = "quantized_" + attrs.name;
+  node->attrs.dict     = attrs.dict;
+  if (node->op()->attr_parser != nullptr) {
+    node->op()->attr_parser(&(node->attrs));
+  }
+  return node;
+});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_flatten.cu b/src/operator/quantization/quantized_flatten.cu
index 4f0c8f93ab06..d3d0d0d2a46f 100644
--- a/src/operator/quantization/quantized_flatten.cu
+++ b/src/operator/quantization/quantized_flatten.cu
@@ -28,7 +28,7 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_contrib_quantized_flatten)
-.set_attr<FCompute>("FCompute<gpu>", QuantizedFlattenCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", QuantizedFlattenCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_fully_connected.cc b/src/operator/quantization/quantized_fully_connected.cc
index 644b55a6923d..310fa51b1acc 100644
--- a/src/operator/quantization/quantized_fully_connected.cc
+++ b/src/operator/quantization/quantized_fully_connected.cc
@@ -22,7 +22,7 @@
  * \file quantized_fully_connected.cc
  * \brief
  * \author Ziheng Jiang, Jun Wu
-*/
+ */
 #include <vector>
 #include "quantization_utils.h"
 #include "../nn/fully_connected-inl.h"
@@ -35,12 +35,12 @@ namespace mxnet {
 namespace op {
 
 namespace quantized_fc {
-enum QuantizedfcOpResource {kTempSpace};
+enum QuantizedfcOpResource { kTempSpace };
 }
 
 bool QuantizedFullyConnectedShape(const nnvm::NodeAttrs& attrs,
-                                  mxnet::ShapeVector *in_shape,
-                                  mxnet::ShapeVector *out_shape) {
+                                  mxnet::ShapeVector* in_shape,
+                                  mxnet::ShapeVector* out_shape) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
   using namespace mshadow;
   uint32_t num_inputs = param.no_bias ? 2 : 3;
@@ -49,7 +49,8 @@ bool QuantizedFullyConnectedShape(const nnvm::NodeAttrs& attrs,
 
   mxnet::TShape dshape = (*in_shape)[0];
   // require data ndim to be known
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   index_t num_input;
   if (!param.flatten) {
@@ -87,17 +88,17 @@ bool QuantizedFullyConnectedShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool QuantizedFullyConnectedType(const nnvm::NodeAttrs& attrs,
-                                 std::vector<int> *in_type,
-                                 std::vector<int> *out_type) {
+                                 std::vector<int>* in_type,
+                                 std::vector<int>* out_type) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t num_inputs = param.no_bias ? 2 : 3;
+  uint32_t num_inputs              = param.no_bias ? 2 : 3;
   CHECK_EQ(in_type->size(), num_inputs * 3);
   CHECK_EQ(out_type->size(), 3U);
 
 #if MXNET_USE_ONEDNN == 1
   CHECK(in_type->at(0) == mshadow::kInt8 || in_type->at(0) == mshadow::kUint8)
-      << "QuantizedFullyConnected only supports int8/uint8 input, while "
-      << in_type->at(0) << " is given.";
+      << "QuantizedFullyConnected only supports int8/uint8 input, while " << in_type->at(0)
+      << " is given.";
 #else
   TYPE_ASSIGN_CHECK(*in_type, 0, mshadow::kInt8);
 #endif
@@ -117,27 +118,26 @@ bool QuantizedFullyConnectedType(const nnvm::NodeAttrs& attrs,
 bool QuantizedFullyConnectedStorageType(const nnvm::NodeAttrs& attrs,
                                         const int dev_mask,
                                         DispatchMode* dispatch_mode,
-                                        std::vector<int> *in_attrs,
-                                        std::vector<int> *out_attrs) {
+                                        std::vector<int>* in_attrs,
+                                        std::vector<int>* out_attrs) {
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-  uint32_t num_inputs = param.no_bias ? 2 : 3;
+  uint32_t num_inputs              = param.no_bias ? 2 : 3;
   CHECK_EQ(in_attrs->size(), num_inputs * 3);
   CHECK_EQ(out_attrs->size(), 3U);
 
 #if MXNET_USE_ONEDNN == 1
-  return MKLDNNStorageType(attrs, dev_mask, true,
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 #else
   *dispatch_mode = DispatchMode::kFCompute;
 
-  for (auto &v : *out_attrs) {
+  for (auto& v : *out_attrs) {
     v = kDefaultStorage;
     if (common::stype_string(v).compare("unknown") == 0) {
       return false;
     }
   }
 
-  for (auto &v : *in_attrs) {
+  for (auto& v : *in_attrs) {
     v = kDefaultStorage;
     if (common::stype_string(v).compare("unknown") == 0) {
       return false;
@@ -149,21 +149,23 @@ bool QuantizedFullyConnectedStorageType(const nnvm::NodeAttrs& attrs,
 
 struct QuantizedSumInitKernelWithBias {
   //  init sum data with bias for matrix b (n)
-  MSHADOW_XINLINE static void Map(int i, int32_t *out,
-                                  const int8_t *bias, const float *min_out,
-                                  const float *max_out, const float *min_bias,
-                                  const float *max_bias) {
+  MSHADOW_XINLINE static void Map(int i,
+                                  int32_t* out,
+                                  const int8_t* bias,
+                                  const float* min_out,
+                                  const float* max_out,
+                                  const float* min_bias,
+                                  const float* max_bias) {
     typedef int32_t T1;
     using T2 = int8_t;
-    using mshadow::red::limits::MinValue;
     using mshadow::red::limits::MaxValue;
-    float float_for_one_out_quant  =
+    using mshadow::red::limits::MinValue;
+    float float_for_one_out_quant =
         MaxAbs(*min_out, *max_out) / static_cast<double>(MaxValue<T1>());
     float float_for_one_bias_quant =
         MaxAbs(*min_bias, *max_bias) / static_cast<double>(MaxValue<T2>());
     if (float_for_one_out_quant != 0) {
-      out[i] = bias[i] * float_for_one_bias_quant /
-          float_for_one_out_quant;
+      out[i] = bias[i] * float_for_one_bias_quant / float_for_one_out_quant;
     } else {
       LOG(INFO) << "float_for_one_out_quant is 0,"
                 << " need to check the why MaxAbs(*min_out, *max_out) of out_data is 0!";
@@ -172,58 +174,55 @@ struct QuantizedSumInitKernelWithBias {
   }
 };
 
-
 void QuantizedFullyConnectedForwardCPU(const nnvm::NodeAttrs& attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<TBlob> &in_data,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<TBlob> &out_data) {
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& in_data,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& out_data) {
 #if MSHADOW_USE_MKL == 1
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
   using namespace mshadow;
   using namespace mxnet_op;
-  Stream<cpu> *s = ctx.get_stream<cpu>();
+  Stream<cpu>* s    = ctx.get_stream<cpu>();
   size_t num_inputs = param.no_bias ? 2 : 3;
-  CHECK_EQ(in_data.size(),  num_inputs * 3);
+  CHECK_EQ(in_data.size(), num_inputs * 3);
   CHECK_EQ(out_data.size(), 3U);
 
-  const mxnet::TShape &dshape = in_data[fullc::kData].shape_;
-  const mxnet::TShape &wshape = in_data[fullc::kWeight].shape_;
-  const mxnet::TShape &oshape = out_data[fullc::kOut].shape_;
+  const mxnet::TShape& dshape = in_data[fullc::kData].shape_;
+  const mxnet::TShape& wshape = in_data[fullc::kWeight].shape_;
+  const mxnet::TShape& oshape = out_data[fullc::kOut].shape_;
 
   CHECK(in_data[fullc::kData].type_flag_ == mshadow::kInt8)
-    << "QuantizedFullyConnectedForwardCPU Op only supports int8 for now, but got "
-    << mxnet::op::type_string(in_data[fullc::kData].type_flag_);
+      << "QuantizedFullyConnectedForwardCPU Op only supports int8 for now, but got "
+      << mxnet::op::type_string(in_data[fullc::kData].type_flag_);
 
   if (dshape.ndim() != 2)
-    CHECK(param.flatten)
-        << "QuantizedFullyConnectedForwardCPU only supports flatten=true "
-        << "when dshape.ndim() != 2 for now.";
+    CHECK(param.flatten) << "QuantizedFullyConnectedForwardCPU only supports flatten=true "
+                         << "when dshape.ndim() != 2 for now.";
 
   Tensor<cpu, 2, int8_t> weight = in_data[fullc::kWeight].get<cpu, 2, int8_t>(s);
-  Tensor<cpu, 2, int8_t> data = in_data[fullc::kData].get_with_shape<cpu, 2, int8_t>(
-    Shape2(dshape[0], dshape.ProdShape(1, dshape.ndim())), s);
+  Tensor<cpu, 2, int8_t> data   = in_data[fullc::kData].get_with_shape<cpu, 2, int8_t>(
+      Shape2(dshape[0], dshape.ProdShape(1, dshape.ndim())), s);
   Tensor<cpu, 2, int32_t> out = out_data[fullc::kOut].get_with_shape<cpu, 2, int32_t>(
-    Shape2(oshape[0], oshape.ProdShape(1, oshape.ndim())), s);
-
-  auto data_temp = data.dptr_;
-  auto weight_temp = weight.dptr_;
-  auto output_temp = out.dptr_;
-  const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
-  const float alpha = 1.0f;
-  const float beta  = 1.0f;
+      Shape2(oshape[0], oshape.ProdShape(1, oshape.ndim())), s);
+
+  auto data_temp             = data.dptr_;
+  auto weight_temp           = weight.dptr_;
+  auto output_temp           = out.dptr_;
+  const int omp_threads      = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
+  const float alpha          = 1.0f;
+  const float beta           = 1.0f;
   const CBLAS_OFFSET offsetc = CblasFixOffset;
-  const MKL_INT8 oa = 0;
-  const MKL_INT8 ob = 0;
-  MKL_INT32 oc = 0;
+  const MKL_INT8 oa          = 0;
+  const MKL_INT8 ob          = 0;
+  MKL_INT32 oc               = 0;
   const int m = dshape[0], n = wshape[0], k = dshape.ProdShape(1, dshape.ndim());
   //  cblas_gemm_s8u8s32 required first matrix must be uint8
   //  shift data from int8(from -128 to 127) to uint8 (from 0 to 255)
   int shift = 128;
   Tensor<cpu, 1, uint8_t> shiftdata =
-    ctx.requested[quantized_fc::kTempSpace].get_space_typed<cpu, 1, uint8_t>(
-      Shape1(m * k), s);
-  #pragma omp parallel for num_threads(omp_threads)
+      ctx.requested[quantized_fc::kTempSpace].get_space_typed<cpu, 1, uint8_t>(Shape1(m * k), s);
+#pragma omp parallel for num_threads(omp_threads)
   for (int i = 0; i < m * k; ++i) {
     shiftdata.dptr_[i] = data_temp[i] + shift;
   }
@@ -231,39 +230,51 @@ void QuantizedFullyConnectedForwardCPU(const nnvm::NodeAttrs& attrs,
   Tensor<cpu, 1, float> min_output = out_data[quantized_fullc::kOutMin].get<cpu, 1, float>(s);
   Tensor<cpu, 1, float> max_output = out_data[quantized_fullc::kOutMax].get<cpu, 1, float>(s);
   Tensor<cpu, 1, float> min_data =
-    in_data[num_inputs + quantized_fullc::kDataMin].get<cpu, 1, float>(s);
+      in_data[num_inputs + quantized_fullc::kDataMin].get<cpu, 1, float>(s);
   Tensor<cpu, 1, float> max_data =
-    in_data[num_inputs + quantized_fullc::kDataMax].get<cpu, 1, float>(s);
+      in_data[num_inputs + quantized_fullc::kDataMax].get<cpu, 1, float>(s);
   Tensor<cpu, 1, float> min_weight =
-    in_data[num_inputs + quantized_fullc::kWeightMin].get<cpu, 1, float>(s);
+      in_data[num_inputs + quantized_fullc::kWeightMin].get<cpu, 1, float>(s);
   Tensor<cpu, 1, float> max_weight =
-    in_data[num_inputs + quantized_fullc::kWeightMax].get<cpu, 1, float>(s);
-
-  Kernel<QuantizationRangeForS8S8MultiplicationStruct, cpu>::Launch(s, 1, min_output.dptr_,
-      max_output.dptr_, min_data.dptr_, max_data.dptr_, min_weight.dptr_, max_weight.dptr_);
+      in_data[num_inputs + quantized_fullc::kWeightMax].get<cpu, 1, float>(s);
+
+  Kernel<QuantizationRangeForS8S8MultiplicationStruct, cpu>::Launch(s,
+                                                                    1,
+                                                                    min_output.dptr_,
+                                                                    max_output.dptr_,
+                                                                    min_data.dptr_,
+                                                                    max_data.dptr_,
+                                                                    min_weight.dptr_,
+                                                                    max_weight.dptr_);
   if (!param.no_bias) {
-    Tensor<cpu, 1, int8_t> bias = in_data[fullc::kBias].get_with_shape<cpu, 1, int8_t>(
-      Shape1(wshape[0]), s);
+    Tensor<cpu, 1, int8_t> bias =
+        in_data[fullc::kBias].get_with_shape<cpu, 1, int8_t>(Shape1(wshape[0]), s);
     Tensor<cpu, 1, float> min_bias =
-      in_data[num_inputs + quantized_fullc::kBiasMin].get<cpu, 1, float>(s);
+        in_data[num_inputs + quantized_fullc::kBiasMin].get<cpu, 1, float>(s);
     Tensor<cpu, 1, float> max_bias =
-      in_data[num_inputs + quantized_fullc::kBiasMax].get<cpu, 1, float>(s);
-
-    Kernel<QuantizedSumInitKernelWithBias, cpu>::Launch(s, n, out.dptr_,
-        bias.dptr_, min_output.dptr_, max_output.dptr_, min_bias.dptr_, max_bias.dptr_);
+        in_data[num_inputs + quantized_fullc::kBiasMax].get<cpu, 1, float>(s);
+
+    Kernel<QuantizedSumInitKernelWithBias, cpu>::Launch(s,
+                                                        n,
+                                                        out.dptr_,
+                                                        bias.dptr_,
+                                                        min_output.dptr_,
+                                                        max_output.dptr_,
+                                                        min_bias.dptr_,
+                                                        max_bias.dptr_);
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < m * n; ++i) {
       output_temp[i] = 0;
     }
   }
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (int i = 0; i < n; ++i) {
     for (int j = 0; j < k; ++j) {
       output_temp[i] -= shift * weight_temp[i * k + j];
     }
   }
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (int i = n; i < m * n; ++i) {
     output_temp[i] = output_temp[i % n];
   }
@@ -293,18 +304,18 @@ void QuantizedFullyConnectedForwardCPU(const nnvm::NodeAttrs& attrs,
 }
 
 #if MXNET_USE_ONEDNN == 1
-void QuantizedFullyConnectedForwardExCPU(const nnvm::NodeAttrs &attrs,
-                                         const OpContext &ctx,
-                                         const std::vector<NDArray> &in_data,
-                                         const std::vector<OpReqType> &req,
-                                         const std::vector<NDArray> &out_data) {
+void QuantizedFullyConnectedForwardExCPU(const nnvm::NodeAttrs& attrs,
+                                         const OpContext& ctx,
+                                         const std::vector<NDArray>& in_data,
+                                         const std::vector<OpReqType>& req,
+                                         const std::vector<NDArray>& out_data) {
   MKLDNNQuantizedFullyConnectedForward(attrs, ctx, in_data, req, out_data);
 }
 #endif
 
 NNVM_REGISTER_OP(_contrib_quantized_fully_connected)
-.add_alias("_npx_quantized_fully_connected")
-.describe(R"code(Fully Connected operator for input, weight and bias data type of int8,
+    .add_alias("_npx_quantized_fully_connected")
+    .describe(R"code(Fully Connected operator for input, weight and bias data type of int8,
 and accumulates in type int32 for the output. For each argument, two more arguments of type
 float32 must be provided representing the thresholds of quantizing argument from data
 type float32 to int8. The final outputs contain the convolution result in int32, and min
@@ -312,68 +323,75 @@ and max thresholds representing the threholds for quantizing the float32 output
 
 .. Note::
     This operator only supports forward propogation. DO NOT use it in training.)code" ADD_FILELINE)
-.set_num_inputs(
-  [](const NodeAttrs& attrs) {
-    const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-    return param.no_bias? 6 : 9;
-  })
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<FullyConnectedParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
-    if (param.no_bias) {
-      return std::vector<std::string>{"data", "weight", "min_data", "max_data",
-                                      "min_weight", "max_weight"};
-    } else {
-      return std::vector<std::string>{"data", "weight", "bias", "min_data", "max_data",
-                                      "min_weight", "max_weight", "min_bias", "max_bias"};
-    }
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedFullyConnectedShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedFullyConnectedType)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizedFullyConnectedStorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
-.set_attr<FCompute>("FCompute<cpu>", QuantizedFullyConnectedForwardCPU)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
+      return param.no_bias ? 6 : 9;
+    })
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<FullyConnectedParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
+          if (param.no_bias) {
+            return std::vector<std::string>{
+                "data", "weight", "min_data", "max_data", "min_weight", "max_weight"};
+          } else {
+            return std::vector<std::string>{"data",
+                                            "weight",
+                                            "bias",
+                                            "min_data",
+                                            "max_data",
+                                            "min_weight",
+                                            "max_weight",
+                                            "min_bias",
+                                            "max_bias"};
+          }
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedFullyConnectedShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedFullyConnectedType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizedFullyConnectedStorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FNeedRequantize>("FNeedRequantize", [](const NodeAttrs& attrs) { return true; })
+    .set_attr<FCompute>("FCompute<cpu>", QuantizedFullyConnectedForwardCPU)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", QuantizedFullyConnectedForwardExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", QuantizedFullyConnectedForwardExCPU)
 #endif
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_argument("weight", "NDArray-or-Symbol", "weight.")
-.add_argument("bias", "NDArray-or-Symbol", "bias.")
-.add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
-.add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
-.add_argument("min_weight", "NDArray-or-Symbol", "Minimum value of weight.")
-.add_argument("max_weight", "NDArray-or-Symbol", "Maximum value of weight.")
-.add_argument("min_bias", "NDArray-or-Symbol", "Minimum value of bias.")
-.add_argument("max_bias", "NDArray-or-Symbol", "Maximum value of bias.")
-.add_arguments(FullyConnectedParam::__FIELDS__());
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_argument("weight", "NDArray-or-Symbol", "weight.")
+    .add_argument("bias", "NDArray-or-Symbol", "bias.")
+    .add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
+    .add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
+    .add_argument("min_weight", "NDArray-or-Symbol", "Minimum value of weight.")
+    .add_argument("max_weight", "NDArray-or-Symbol", "Maximum value of weight.")
+    .add_argument("min_bias", "NDArray-or-Symbol", "Minimum value of bias.")
+    .add_argument("max_bias", "NDArray-or-Symbol", "Maximum value of bias.")
+    .add_arguments(FullyConnectedParam::__FIELDS__());
 
 NNVM_REGISTER_OP(FullyConnected)
-.set_attr<FQuantizable>("FQuantizable", [](const NodeAttrs& attrs) {
-    return QuantizeType::kMust;
-})
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-    nnvm::ObjectPtr node = nnvm::Node::Create();
-    node->attrs.op = Op::Get("_contrib_quantized_fully_connected");
-    node->attrs.name = "quantized_" + attrs.name;
-    node->attrs.dict = attrs.dict;
-    if (node->op()->attr_parser != nullptr) {
-      node->op()->attr_parser(&(node->attrs));
-    }
-    return node;
-  });
+    .set_attr<FQuantizable>("FQuantizable",
+                            [](const NodeAttrs& attrs) { return QuantizeType::kMust; })
+    .set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+      nnvm::ObjectPtr node = nnvm::Node::Create();
+      node->attrs.op       = Op::Get("_contrib_quantized_fully_connected");
+      node->attrs.name     = "quantized_" + attrs.name;
+      node->attrs.dict     = attrs.dict;
+      if (node->op()->attr_parser != nullptr) {
+        node->op()->attr_parser(&(node->attrs));
+      }
+      return node;
+    });
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_fully_connected.cu b/src/operator/quantization/quantized_fully_connected.cu
index 04680c8c2b78..7ea609fdf0f6 100644
--- a/src/operator/quantization/quantized_fully_connected.cu
+++ b/src/operator/quantization/quantized_fully_connected.cu
@@ -22,7 +22,7 @@
  * \file quantized_fully_connected.cu
  * \brief
  * \author Ziheng Jiang, Jun Wu
-*/
+ */
 #include "./quantization_utils.h"
 #include "../mxnet_op.h"
 #include "../nn/fully_connected-inl.h"
@@ -33,59 +33,61 @@ namespace op {
 #if CUDA_VERSION >= 8000
 // value + bias_value * (range1 / limit_range1) * (limit_range2 / range2)
 struct QuantizedBiasAddKernel {
-  MSHADOW_XINLINE static void Map(int i, size_t k, int32_t *out,
-                                  const int8_t *bias, const float *min_out,
-                                  const float *max_out, const float *min_bias,
-                                  const float *max_bias) {
+  MSHADOW_XINLINE static void Map(int i,
+                                  size_t k,
+                                  int32_t* out,
+                                  const int8_t* bias,
+                                  const float* min_out,
+                                  const float* max_out,
+                                  const float* min_bias,
+                                  const float* max_bias) {
     typedef int32_t T1;
-    typedef int8_t  T2;
-    using mshadow::red::limits::MinValue;
+    typedef int8_t T2;
     using mshadow::red::limits::MaxValue;
-    float float_for_one_out_quant  =
-      MaxAbs(*min_out, *max_out) / static_cast<double>(MaxValue<T1>());
+    using mshadow::red::limits::MinValue;
+    float float_for_one_out_quant =
+        MaxAbs(*min_out, *max_out) / static_cast<double>(MaxValue<T1>());
     float float_for_one_bias_quant =
-      MaxAbs(*min_bias, *max_bias) / static_cast<double>(MaxValue<T2>());
-    out[i] = (out[i] * float_for_one_out_quant +
-              bias[i%k] * float_for_one_bias_quant) /
+        MaxAbs(*min_bias, *max_bias) / static_cast<double>(MaxValue<T2>());
+    out[i] = (out[i] * float_for_one_out_quant + bias[i % k] * float_for_one_bias_quant) /
              float_for_one_out_quant;
   }
 };
 #endif  // CUDA_VERSION >= 8000
 
-template<typename SrcType, typename DstType, typename CmpType>
+template <typename SrcType, typename DstType, typename CmpType>
 void QuantizedFullyConnectedForwardGPU(const nnvm::NodeAttrs& attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<TBlob> &inputs,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<TBlob> &outputs) {
+                                       const OpContext& ctx,
+                                       const std::vector<TBlob>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<TBlob>& outputs) {
 #if CUDA_VERSION >= 8000
   const FullyConnectedParam& param = nnvm::get<FullyConnectedParam>(attrs.parsed);
   using namespace mshadow;
   using namespace mxnet_op;
   size_t num_inputs = param.no_bias ? 2 : 3;
-  CHECK_EQ(inputs.size(),  num_inputs * 3);
+  CHECK_EQ(inputs.size(), num_inputs * 3);
   CHECK_EQ(outputs.size(), 3U);
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(s->blas_handle_ownership_, Stream<gpu>::OwnHandle);
-  const TBlob& data   =  inputs[0];
-  const TBlob& weight =  inputs[1];
-  const TBlob& out    = outputs[0];
+  const TBlob& data    = inputs[0];
+  const TBlob& weight  = inputs[1];
+  const TBlob& out     = outputs[0];
   mxnet::TShape dshape = data.shape_;
   mxnet::TShape wshape = weight.shape_;
   mxnet::TShape oshape = out.shape_;
   // (m, n) * (k, n).T = (m, k)
   // A * B.T = C
   if (dshape.ndim() != 2) {
-    CHECK(param.flatten)
-      << "Currently, QuantizedFullyConnected Op only supports flatten=true "
-      << "when ishape.ndim()!=2 for GPU.";
+    CHECK(param.flatten) << "Currently, QuantizedFullyConnected Op only supports flatten=true "
+                         << "when ishape.ndim()!=2 for GPU.";
   }
 
   // row_C = col_C(T) = cublas(col_B * col_A(T)) = cublas(row_B(T), row_A)
   // row_C = col_C(T) = cublas(col_B(T) * col_A(T)) = cublas(row_B, row_A)
   const int m = dshape[0], n = dshape.ProdShape(1, dshape.ndim()), k = wshape[0];
-  CmpType alpha = 1.0f;
-  CmpType beta  = 0.0f;
+  CmpType alpha               = 1.0f;
+  CmpType beta                = 0.0f;
   const cudaDataType src_type = mshadow::DataType<SrcType>::kCudaFlag;
   const cudaDataType dst_type = mshadow::DataType<DstType>::kCudaFlag;
   const cudaDataType cmp_type = mshadow::DataType<CmpType>::kCudaFlag;
@@ -109,17 +111,27 @@ void QuantizedFullyConnectedForwardGPU(const nnvm::NodeAttrs& attrs,
                            cmp_type,
                            CUBLAS_GEMM_DFALT));
 
-  Kernel<QuantizationRangeForS8S8MultiplicationStruct, gpu>::Launch(s, 1,
-    outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-     inputs[num_inputs].dptr<float>(),   inputs[num_inputs+1].dptr<float>(),
-     inputs[num_inputs+2].dptr<float>(), inputs[num_inputs+3].dptr<float>());
+  Kernel<QuantizationRangeForS8S8MultiplicationStruct, gpu>::Launch(
+      s,
+      1,
+      outputs[1].dptr<float>(),
+      outputs[2].dptr<float>(),
+      inputs[num_inputs].dptr<float>(),
+      inputs[num_inputs + 1].dptr<float>(),
+      inputs[num_inputs + 2].dptr<float>(),
+      inputs[num_inputs + 3].dptr<float>());
 
   if (!param.no_bias) {
     const TBlob& bias = inputs[2];
-    Kernel<QuantizedBiasAddKernel, gpu>::Launch(s, out.Size(),
-        k, out.dptr<int32_t>(), bias.dptr<int8_t>(),
-        outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-         inputs[7].dptr<float>(),  inputs[8].dptr<float>());
+    Kernel<QuantizedBiasAddKernel, gpu>::Launch(s,
+                                                out.Size(),
+                                                k,
+                                                out.dptr<int32_t>(),
+                                                bias.dptr<int8_t>(),
+                                                outputs[1].dptr<float>(),
+                                                outputs[2].dptr<float>(),
+                                                inputs[7].dptr<float>(),
+                                                inputs[8].dptr<float>());
   }
 #else
   LOG(FATAL) << "QuantizedFullyConnectedForwardGPU only supports CUDA >= 8.0";
@@ -127,7 +139,8 @@ void QuantizedFullyConnectedForwardGPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_fully_connected)
-.set_attr<FCompute>("FCompute<gpu>", QuantizedFullyConnectedForwardGPU<int8_t, int32_t, int32_t>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        QuantizedFullyConnectedForwardGPU<int8_t, int32_t, int32_t>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_indexing_op.cc b/src/operator/quantization/quantized_indexing_op.cc
index 7f45c9955172..53538a9a634c 100644
--- a/src/operator/quantization/quantized_indexing_op.cc
+++ b/src/operator/quantization/quantized_indexing_op.cc
@@ -20,28 +20,28 @@
 /*!
  * Copyright (c) 2017 by Contributors
  * \file quantized_indexing_op.cc
-*/
+ */
 #include <mxnet/op_attr_types.h>
 #include "../tensor/indexing_op.h"
 
 namespace mxnet {
 namespace op {
 
-
 inline bool QuantizedEmbeddingOpShape(const nnvm::NodeAttrs& attrs,
-                                      mxnet::ShapeVector *in_attrs,
-                                      mxnet::ShapeVector *out_attrs) {
+                                      mxnet::ShapeVector* in_attrs,
+                                      mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
-  const mxnet::TShape &dshape = (*in_attrs)[quantized_embedding::kData];
-  if (!ndim_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = (*in_attrs)[quantized_embedding::kData];
+  if (!ndim_is_known(dshape))
+    return false;
   const EmbeddingParam& param = nnvm::get<EmbeddingParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*in_attrs, quantized_embedding::kWeight, Shape2(param.input_dim,
-                                                                     param.output_dim));
+  SHAPE_ASSIGN_CHECK(
+      *in_attrs, quantized_embedding::kWeight, Shape2(param.input_dim, param.output_dim));
   SHAPE_ASSIGN_CHECK(*in_attrs, quantized_embedding::kWeightMin, mxnet::TShape(1, 1));
   SHAPE_ASSIGN_CHECK(*in_attrs, quantized_embedding::kWeightMax, mxnet::TShape(1, 1));
   out_attrs->clear();
 
-  mxnet::TShape oshape(dshape.ndim()+1, -1);
+  mxnet::TShape oshape(dshape.ndim() + 1, -1);
   for (int i = 0; i < dshape.ndim(); ++i) {
     oshape[i] = dshape[i];
   }
@@ -53,8 +53,8 @@ inline bool QuantizedEmbeddingOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool QuantizedEmbeddingOpType(const nnvm::NodeAttrs& attrs,
-                                     std::vector<int> *in_type,
-                                     std::vector<int> *out_type) {
+                                     std::vector<int>* in_type,
+                                     std::vector<int>* out_type) {
   CHECK_EQ(in_type->size(), 4U);
   CHECK_GE(out_type->size(), 3U);
   int itype = (*in_type)[0];
@@ -79,29 +79,29 @@ inline bool QuantizedEmbeddingOpForwardStorageType(const nnvm::NodeAttrs& attrs,
                                                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 4U);
   CHECK_EQ(out_attrs->size(), 3U);
-  const int& data_stype = in_attrs->at(quantized_embedding::kData);
-  const int& weight_stype = in_attrs->at(quantized_embedding::kWeight);
+  const int& data_stype       = in_attrs->at(quantized_embedding::kData);
+  const int& weight_stype     = in_attrs->at(quantized_embedding::kWeight);
   const int& weight_min_stype = in_attrs->at(quantized_embedding::kWeightMin);
   const int& weight_max_stype = in_attrs->at(quantized_embedding::kWeightMax);
-  int& out_stype = out_attrs->at(quantized_embedding::kOut);
-  int& out_stype_min = out_attrs->at(quantized_embedding::kOutMin);
-  int& out_stype_max = out_attrs->at(quantized_embedding::kOutMax);
-  bool dispatched = false;
+  int& out_stype              = out_attrs->at(quantized_embedding::kOut);
+  int& out_stype_min          = out_attrs->at(quantized_embedding::kOutMin);
+  int& out_stype_max          = out_attrs->at(quantized_embedding::kOutMax);
+  bool dispatched             = false;
   CHECK_EQ(weight_min_stype, kDefaultStorage);
   CHECK_EQ(weight_max_stype, kDefaultStorage);
   if (!dispatched && data_stype == kDefaultStorage && weight_stype == kDefaultStorage) {
     // dns, dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
-    dispatched = storage_type_assign(&out_stype_min, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
-    dispatched = storage_type_assign(&out_stype_max, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
+    dispatched = storage_type_assign(
+        &out_stype_min, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
+    dispatched = storage_type_assign(
+        &out_stype_max, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && data_stype == kDefaultStorage && weight_stype == kRowSparseStorage) {
     // dns, rsp -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
@@ -115,11 +115,11 @@ void QuantizedEmbeddingOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 4U);
   CHECK_EQ(outputs.size(), 3U);
   CHECK_EQ(inputs[quantized_embedding::kWeight].ndim(), 2U)
-          << "Embedding layer expects its weight to be two-dimensional. "
-          << inputs[quantized_embedding::kWeight].ndim()
-          << " dimensional input is given instead";
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
-  EmbeddingOpForwardDnsImpl<cpu>(s, inputs[quantized_embedding::kData],
+      << "Embedding layer expects its weight to be two-dimensional. "
+      << inputs[quantized_embedding::kWeight].ndim() << " dimensional input is given instead";
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
+  EmbeddingOpForwardDnsImpl<cpu>(s,
+                                 inputs[quantized_embedding::kData],
                                  inputs[quantized_embedding::kWeight],
                                  req[quantized_embedding::kOut],
                                  outputs[quantized_embedding::kOut]);
@@ -130,62 +130,65 @@ void QuantizedEmbeddingOpForward(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_embedding)
-.add_alias("_npx_quantized_embedding")
-.describe(R"code(Maps integer indices to int8 vector representations (embeddings).
+    .add_alias("_npx_quantized_embedding")
+    .describe(R"code(Maps integer indices to int8 vector representations (embeddings).
 )code" ADD_FILELINE)
-.set_num_inputs(4)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<EmbeddingParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "weight", "min_weight", "max_weight"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedEmbeddingOpShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedEmbeddingOpType)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizedEmbeddingOpForwardStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", QuantizedEmbeddingOpForward)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "The input array to the embedding operator.")
-.add_argument("weight", "NDArray-or-Symbol", "The embedding weight matrix.")
-.add_argument("min_weight", "NDArray-or-Symbol", "Minimum value of data.")
-.add_argument("max_weight", "NDArray-or-Symbol", "Maximum value of data.")
-.add_arguments(EmbeddingParam::__FIELDS__());
+    .set_num_inputs(4)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<EmbeddingParam>)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "weight", "min_weight", "max_weight"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedEmbeddingOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedEmbeddingOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizedEmbeddingOpForwardStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", QuantizedEmbeddingOpForward)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "The input array to the embedding operator.")
+    .add_argument("weight", "NDArray-or-Symbol", "The embedding weight matrix.")
+    .add_argument("min_weight", "NDArray-or-Symbol", "Minimum value of data.")
+    .add_argument("max_weight", "NDArray-or-Symbol", "Maximum value of data.")
+    .add_arguments(EmbeddingParam::__FIELDS__());
 
 NNVM_REGISTER_OP(Embedding)
-.set_attr<FQuantizable>("FQuantizable", [](const NodeAttrs& attrs) {
-    return QuantizeType::kSupport;
-})
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-    EmbeddingParam param;
-    param.Init(attrs.dict);
-    nnvm::ObjectPtr node = nnvm::Node::Create();
-    if (param.dtype == mshadow::kFloat32) {
-      node->attrs.op = Op::Get("_contrib_quantized_embedding");
-      node->attrs.name = "quantized_" + attrs.name;
-    } else {
-      node->attrs.op = Op::Get("Embedding");
-      node->attrs.name = attrs.name;
-    }
-    node->attrs.dict = attrs.dict;
-    if (node->op()->attr_parser != nullptr) {
-      node->op()->attr_parser(&(node->attrs));
-    }
-    return node;
-  })
-.set_attr<FAvoidQuantizeInput>("FAvoidQuantizeInput", [](
-  const NodeAttrs &attrs, const size_t index, const std::string quantize_granularity) {
-  return (index == 0);
-});
+    .set_attr<FQuantizable>("FQuantizable",
+                            [](const NodeAttrs& attrs) { return QuantizeType::kSupport; })
+    .set_attr<FQuantizedOp>("FQuantizedOp",
+                            [](const NodeAttrs& attrs) {
+                              EmbeddingParam param;
+                              param.Init(attrs.dict);
+                              nnvm::ObjectPtr node = nnvm::Node::Create();
+                              if (param.dtype == mshadow::kFloat32) {
+                                node->attrs.op   = Op::Get("_contrib_quantized_embedding");
+                                node->attrs.name = "quantized_" + attrs.name;
+                              } else {
+                                node->attrs.op   = Op::Get("Embedding");
+                                node->attrs.name = attrs.name;
+                              }
+                              node->attrs.dict = attrs.dict;
+                              if (node->op()->attr_parser != nullptr) {
+                                node->op()->attr_parser(&(node->attrs));
+                              }
+                              return node;
+                            })
+    .set_attr<FAvoidQuantizeInput>("FAvoidQuantizeInput",
+                                   [](const NodeAttrs& attrs,
+                                      const size_t index,
+                                      const std::string quantize_granularity) {
+                                     return (index == 0);
+                                   });
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/quantization/quantized_pooling.cc b/src/operator/quantization/quantized_pooling.cc
index 1b5da8784eea..770931adf461 100644
--- a/src/operator/quantization/quantized_pooling.cc
+++ b/src/operator/quantization/quantized_pooling.cc
@@ -20,7 +20,7 @@
 /*!
  * Copyright (c) 2017 by Contributors
  * \file quantized_pooling.cc
-*/
+ */
 #include <mxnet/op_attr_types.h>
 #include "../nn/pooling-inl.h"
 #if MXNET_USE_ONEDNN == 1
@@ -31,33 +31,32 @@ namespace mxnet {
 namespace op {
 
 bool QuantizedPoolingShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_shape,
-                           mxnet::ShapeVector *out_shape) {
+                           mxnet::ShapeVector* in_shape,
+                           mxnet::ShapeVector* out_shape) {
   const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), 3U);
-  if (!shape_is_known(in_shape->at(0))) return false;
-  const mxnet::TShape &dshape = (*in_shape)[0];
+  if (!shape_is_known(in_shape->at(0)))
+    return false;
+  const mxnet::TShape& dshape = (*in_shape)[0];
 
-  const int data_ndims = dshape.ndim();
+  const int data_ndims   = dshape.ndim();
   const int kernel_ndims = param.kernel.ndim();
-  const int layout = param.GetLayout(data_ndims);
+  const int layout       = param.GetLayout(data_ndims);
 
 #if MXNET_USE_ONEDNN == 1
   CHECK(data_ndims == 4U || data_ndims == 5U)
-        << "MKL-DNN QuantizedPoolingOp only supports 4D/5D layout yet, input should be 4D in"
-        << "(batch, channel, y, x) or 5D in (batch, channel, d, y, x)";
+      << "MKL-DNN QuantizedPoolingOp only supports 4D/5D layout yet, input should be 4D in"
+      << "(batch, channel, y, x) or 5D in (batch, channel, d, y, x)";
   CHECK(layout == mshadow::kNCHW || layout == mshadow::kNCDHW)
-        << "MKL-DNN QuantizedPoolingOp only supports NCHW/NCDHW layout for now, saw " << layout;
+      << "MKL-DNN QuantizedPoolingOp only supports NCHW/NCDHW layout for now, saw " << layout;
   CHECK(kernel_ndims == 2U || kernel_ndims == 3U)
-        << "MKL-DNN QuantizedPoolingOp only supports 2D/3D pooling for now, saw" << kernel_ndims;
+      << "MKL-DNN QuantizedPoolingOp only supports 2D/3D pooling for now, saw" << kernel_ndims;
 #else
-  CHECK_EQ(data_ndims, 4U)
-           << "quantized_pooling: Input data should be 4D in "
-           << "(batch, channel, y, x)";
+  CHECK_EQ(data_ndims, 4U) << "quantized_pooling: Input data should be 4D in "
+                           << "(batch, channel, y, x)";
   CHECK_EQ(layout, mshadow::kNCHW)
-           << "QuantizedPoolingOp only supports NCHW layout for now, saw " << layout;
-  CHECK_EQ(kernel_ndims, 2U)
-           << "QuantizedPoolingOp only supports 2D pooling for now";
+      << "QuantizedPoolingOp only supports NCHW layout for now, saw " << layout;
+  CHECK_EQ(kernel_ndims, 2U) << "QuantizedPoolingOp only supports 2D pooling for now";
 #endif
 
   const int D = (data_ndims == 5) ? 2 : 1;
@@ -67,32 +66,30 @@ bool QuantizedPoolingShape(const nnvm::NodeAttrs& attrs,
   int idx = 0;
   if (kernel_ndims == 3) {
     CHECK(param.kernel[idx] <= dshape[D] + 2 * param.pad[idx])
-          << "kernel size (" << param.kernel[0]
-          << ") exceeds input (" << dshape[D]
-          << " padded to " << (dshape[D] + 2 * param.pad[idx]) << ")";
+        << "kernel size (" << param.kernel[0] << ") exceeds input (" << dshape[D] << " padded to "
+        << (dshape[D] + 2 * param.pad[idx]) << ")";
     ++idx;
   }
   CHECK(param.kernel[idx] <= dshape[H] + 2 * param.pad[idx])
-      << "kernel size (" << param.kernel[idx]
-      << ") exceeds input (" << dshape[H]
-      << " padded to " << (dshape[H] + 2 * param.pad[idx]) << ")";
+      << "kernel size (" << param.kernel[idx] << ") exceeds input (" << dshape[H] << " padded to "
+      << (dshape[H] + 2 * param.pad[idx]) << ")";
   ++idx;
   CHECK(param.kernel[idx] <= dshape[W] + 2 * param.pad[idx])
-      << "kernel size (" << param.kernel[idx]
-      << ") exceeds input (" << dshape[W]
-      << " padded to " << (dshape[W] + 2 * param.pad[idx]) << ")";
-
-#define OUTPUT_SHAPE_VALID_ASSIGN(spatial_dim, idx)                                            \
-{                                                                                              \
-  oshape[spatial_dim] = 1 + (dshape[spatial_dim] + 2 * param.pad[idx] - param.kernel[idx]) /   \
-                            param.stride[idx];                                                 \
-}
-#define OUTPUT_SHAPE_FULL_ASSIGN(spatial_dim, idx)                                             \
-{                                                                                              \
-  oshape[spatial_dim] = 1 + static_cast<int>(std::ceil(                                        \
-                              static_cast<float>(dshape[spatial_dim] + 2 * param.pad[idx] -    \
-                            param.kernel[idx]) / param.stride[idx]));                          \
-}
+      << "kernel size (" << param.kernel[idx] << ") exceeds input (" << dshape[W] << " padded to "
+      << (dshape[W] + 2 * param.pad[idx]) << ")";
+
+#define OUTPUT_SHAPE_VALID_ASSIGN(spatial_dim, idx)                                             \
+  {                                                                                             \
+    oshape[spatial_dim] =                                                                       \
+        1 + (dshape[spatial_dim] + 2 * param.pad[idx] - param.kernel[idx]) / param.stride[idx]; \
+  }
+#define OUTPUT_SHAPE_FULL_ASSIGN(spatial_dim, idx)                                                 \
+  {                                                                                                \
+    oshape[spatial_dim] =                                                                          \
+        1 + static_cast<int>(std::ceil(                                                            \
+                static_cast<float>(dshape[spatial_dim] + 2 * param.pad[idx] - param.kernel[idx]) / \
+                param.stride[idx]));                                                               \
+  }
 
   oshape[N] = dshape[N];
   oshape[C] = dshape[C];
@@ -134,8 +131,8 @@ bool QuantizedPoolingShape(const nnvm::NodeAttrs& attrs,
 }
 
 bool QuantizedPoolingType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_type,
-                          std::vector<int> *out_type) {
+                          std::vector<int>* in_type,
+                          std::vector<int>* out_type) {
   const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), 3U);
   CHECK_EQ(out_type->size(), 3U);
@@ -156,16 +153,16 @@ bool QuantizedPoolingType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-inline static bool QuantizedPoolingStorageType(const nnvm::NodeAttrs &attrs,
+inline static bool QuantizedPoolingStorageType(const nnvm::NodeAttrs& attrs,
                                                const int dev_mask,
-                                               DispatchMode *dispatch_mode,
-                                               std::vector<int> *in_attrs,
-                                               std::vector<int> *out_attrs) {
+                                               DispatchMode* dispatch_mode,
+                                               std::vector<int>* in_attrs,
+                                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3);
 
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
-  const PoolingParam &param = nnvm::get<PoolingParam>(attrs.parsed);
+  const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   if (dev_mask == mshadow::cpu::kDevMask && SupportMKLDNNPooling(param)) {
     *dispatch_mode = DispatchMode::kFComputeEx;
   }
@@ -178,64 +175,67 @@ inline static bool QuantizedPoolingStorageType(const nnvm::NodeAttrs &attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_pooling)
-.add_alias("_npx_quantized_pooling")
-.describe(R"code(Pooling operator for input and output data type of int8.
+    .add_alias("_npx_quantized_pooling")
+    .describe(R"code(Pooling operator for input and output data type of int8.
 The input and output data comes with min and max thresholds for quantizing
 the float32 data into int8.
 
 .. Note::
     This operator only supports forward propogation. DO NOT use it in training.
     This operator only supports `pool_type` of `avg` or `max`.)code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr_parser(PoolingParamParser)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "min_data", "max_data"};
-  })
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"output", "min_output", "max_output"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizedPoolingShape)
-.set_attr<nnvm::FInferType>("FInferType", QuantizedPoolingType)
-.set_attr<FInferStorageType>("FInferStorageType", QuantizedPoolingStorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FNeedRequantize>("FNeedRequantize",
-  [](const NodeAttrs& attrs) {
-    const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
-    CHECK(param.pool_type == pool_enum::kMaxPooling || param.pool_type == pool_enum::kAvgPooling)
-      << "QuantizedPoolingOp only supports pool_type=max/avg for now";
-    return false;
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input data.")
-.add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
-.add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
-.add_arguments(PoolingParam::__FIELDS__());
-
-NNVM_REGISTER_OP(Pooling)
-.set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
-    PoolingParam param;
-    param.Init(attrs.dict);
-    // TODO(junwu): Uncomment the following line and remove the above lines
-    // after pooling op is refactored
-    // const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
-    nnvm::ObjectPtr node = nnvm::Node::Create();
-    if (param.pool_type == pool_enum::kMaxPooling || param.pool_type == pool_enum::kAvgPooling) {
-      node->attrs.op = Op::Get("_contrib_quantized_pooling");
-      node->attrs.name = "quantized_" + attrs.name;
-    } else {
-      node->attrs.op = Op::Get("Pooling");
-      node->attrs.name = attrs.name;
-    }
-    node->attrs.dict = attrs.dict;
-    if (node->op()->attr_parser != nullptr) {
-      node->op()->attr_parser(&(node->attrs));
-    }
-    return node;
-  });
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr_parser(PoolingParamParser)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "min_data", "max_data"};
+        })
+    .set_attr<nnvm::FListOutputNames>(
+        "FListOutputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"output", "min_output", "max_output"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizedPoolingShape)
+    .set_attr<nnvm::FInferType>("FInferType", QuantizedPoolingType)
+    .set_attr<FInferStorageType>("FInferStorageType", QuantizedPoolingStorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FNeedRequantize>(
+        "FNeedRequantize",
+        [](const NodeAttrs& attrs) {
+          const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
+          CHECK(param.pool_type == pool_enum::kMaxPooling ||
+                param.pool_type == pool_enum::kAvgPooling)
+              << "QuantizedPoolingOp only supports pool_type=max/avg for now";
+          return false;
+        })
+    .add_argument("data", "NDArray-or-Symbol", "Input data.")
+    .add_argument("min_data", "NDArray-or-Symbol", "Minimum value of data.")
+    .add_argument("max_data", "NDArray-or-Symbol", "Maximum value of data.")
+    .add_arguments(PoolingParam::__FIELDS__());
+
+NNVM_REGISTER_OP(Pooling).set_attr<FQuantizedOp>("FQuantizedOp", [](const NodeAttrs& attrs) {
+  PoolingParam param;
+  param.Init(attrs.dict);
+  // TODO(junwu): Uncomment the following line and remove the above lines
+  // after pooling op is refactored
+  // const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
+  nnvm::ObjectPtr node = nnvm::Node::Create();
+  if (param.pool_type == pool_enum::kMaxPooling || param.pool_type == pool_enum::kAvgPooling) {
+    node->attrs.op   = Op::Get("_contrib_quantized_pooling");
+    node->attrs.name = "quantized_" + attrs.name;
+  } else {
+    node->attrs.op   = Op::Get("Pooling");
+    node->attrs.name = attrs.name;
+  }
+  node->attrs.dict = attrs.dict;
+  if (node->op()->attr_parser != nullptr) {
+    node->op()->attr_parser(&(node->attrs));
+  }
+  return node;
+});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/quantized_pooling.cu b/src/operator/quantization/quantized_pooling.cu
index 167c08e99683..debdd09ac1c3 100644
--- a/src/operator/quantization/quantized_pooling.cu
+++ b/src/operator/quantization/quantized_pooling.cu
@@ -20,7 +20,7 @@
 /*!
  * Copyright (c) 2017 by Contributors
  * \file quantized_pooling.cu
-*/
+ */
 #include <mxnet/operator_util.h>
 #include <vector>
 #include "../nn/pooling-inl.h"
@@ -31,7 +31,7 @@ namespace op {
 
 #if MXNET_USE_CUDNN == 1 && CUDA_VERSION >= 8000
 STATIC_ASSERT_CUDNN_VERSION_GE(6000);
-template<typename DType>
+template <typename DType>
 class QuantizedCuDNNPoolingOp {
  public:
   QuantizedCuDNNPoolingOp() {
@@ -51,20 +51,10 @@ class QuantizedCuDNNPoolingOp {
     } else {
       LOG(FATAL) << "QuantizedCuDNNPoolingOp only supports pool_type=max/avg";
     }
-    CUDNN_CALL(cudnnSetTensor4dDescriptor(in_desc_,
-                                          CUDNN_TENSOR_NCHW,
-                                          dtype,
-                                          dshape[N],
-                                          dshape[C],
-                                          dshape[H],
-                                          dshape[W]));
-    CUDNN_CALL(cudnnSetTensor4dDescriptor(out_desc_,
-                                          CUDNN_TENSOR_NCHW,
-                                          dtype,
-                                          oshape[N],
-                                          oshape[C],
-                                          oshape[H],
-                                          oshape[W]));
+    CUDNN_CALL(cudnnSetTensor4dDescriptor(
+        in_desc_, CUDNN_TENSOR_NCHW, dtype, dshape[N], dshape[C], dshape[H], dshape[W]));
+    CUDNN_CALL(cudnnSetTensor4dDescriptor(
+        out_desc_, CUDNN_TENSOR_NCHW, dtype, oshape[N], oshape[C], oshape[H], oshape[W]));
     CUDNN_CALL(cudnnSetPooling2dDescriptor(pool_desc_,
                                            mode_,
                                            CUDNN_NOT_PROPAGATE_NAN,
@@ -73,7 +63,7 @@ class QuantizedCuDNNPoolingOp {
                                            param.pad[0],
                                            param.pad[1],
                                            param.global_pool ? 1 : param.stride[0],
-                                           param.global_pool ? 1 :param.stride[1]));
+                                           param.global_pool ? 1 : param.stride[1]));
   }
 
   ~QuantizedCuDNNPoolingOp() {
@@ -83,9 +73,9 @@ class QuantizedCuDNNPoolingOp {
   }
 
   void Forward(mshadow::Stream<gpu>* s,
-               const std::vector<TBlob> &inputs,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &outputs) {
+               const std::vector<TBlob>& inputs,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& outputs) {
     CHECK_EQ(inputs.size(), 3U);
     CHECK_EQ(outputs.size(), 3U);
     using namespace mshadow;
@@ -104,10 +94,8 @@ class QuantizedCuDNNPoolingOp {
 
     Tensor<gpu, 1, float> omin_range = outputs[1].FlatTo1D<gpu, float>(s);
     Tensor<gpu, 1, float> omax_range = outputs[2].FlatTo1D<gpu, float>(s);
-    ASSIGN_DISPATCH(omin_range, req[1],
-      F<mshadow_op::identity>(inputs[1].FlatTo1D<gpu, float>(s)));
-    ASSIGN_DISPATCH(omax_range, req[2],
-      F<mshadow_op::identity>(inputs[2].FlatTo1D<gpu, float>(s)));
+    ASSIGN_DISPATCH(omin_range, req[1], F<mshadow_op::identity>(inputs[1].FlatTo1D<gpu, float>(s)));
+    ASSIGN_DISPATCH(omax_range, req[2], F<mshadow_op::identity>(inputs[2].FlatTo1D<gpu, float>(s)));
   }
 
  private:
@@ -115,7 +103,7 @@ class QuantizedCuDNNPoolingOp {
   cudnnTensorDescriptor_t in_desc_;
   cudnnTensorDescriptor_t out_desc_;
   cudnnPoolingDescriptor_t pool_desc_;
-};  // class QuantizedCuDNNPoolingOp
+};      // class QuantizedCuDNNPoolingOp
 #endif  // MXNET_USE_CUDNN == 1 && CUDA_VERSION >= 8000
 
 void QuantizedPoolingForwardGPU(const nnvm::NodeAttrs& attrs,
@@ -125,7 +113,7 @@ void QuantizedPoolingForwardGPU(const nnvm::NodeAttrs& attrs,
                                 const std::vector<TBlob>& outputs) {
   const PoolingParam& param = nnvm::get<PoolingParam>(attrs.parsed);
   CHECK_EQ(param.kernel.ndim(), 2U)
-    << "QuantizedPoolingForward<gpu> only supports 2D convolution for now";
+      << "QuantizedPoolingForward<gpu> only supports 2D convolution for now";
 #if MXNET_USE_CUDNN == 1 && CUDA_VERSION >= 8000
 #if DMLC_CXX11_THREAD_LOCAL
   static thread_local QuantizedCuDNNPoolingOp<int8_t> op;
@@ -141,7 +129,7 @@ void QuantizedPoolingForwardGPU(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_quantized_pooling)
-.set_attr<FCompute>("FCompute<gpu>", QuantizedPoolingForwardGPU);
+    .set_attr<FCompute>("FCompute<gpu>", QuantizedPoolingForwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/requantize-inl.h b/src/operator/quantization/requantize-inl.h
index 56686708dba4..02c0cc1d67e8 100644
--- a/src/operator/quantization/requantize-inl.h
+++ b/src/operator/quantization/requantize-inl.h
@@ -43,31 +43,34 @@ struct RequantizeParam : public dmlc::Parameter<RequantizeParam> {
   dmlc::optional<float> max_calib_range;  // max float value calculated from calibration dataset
   DMLC_DECLARE_PARAMETER(RequantizeParam) {
     DMLC_DECLARE_FIELD(out_type)
-      .add_enum("auto", QuantizeOutType::kAuto)
-      .add_enum("int8", QuantizeOutType::kInt8)
-      .add_enum("uint8", QuantizeOutType::kUint8)
-      .set_default(QuantizeOutType::kInt8)
-      .describe("Output data type. `auto` can be specified to automatically determine output type "
-                "according to min_calib_range.");
+        .add_enum("auto", QuantizeOutType::kAuto)
+        .add_enum("int8", QuantizeOutType::kInt8)
+        .add_enum("uint8", QuantizeOutType::kUint8)
+        .set_default(QuantizeOutType::kInt8)
+        .describe(
+            "Output data type. `auto` can be specified to automatically determine output type "
+            "according to min_calib_range.");
     DMLC_DECLARE_FIELD(min_calib_range)
-    .set_default(dmlc::optional<float>())
-    .describe("The minimum scalar value in the form of float32 obtained "
-              "through calibration. If present, it will be used to requantize the "
-              "int32 data into int8.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The minimum scalar value in the form of float32 obtained "
+            "through calibration. If present, it will be used to requantize the "
+            "int32 data into int8.");
     DMLC_DECLARE_FIELD(max_calib_range)
-    .set_default(dmlc::optional<float>())
-    .describe("The maximum scalar value in the form of float32 obtained "
-              "through calibration. If present, it will be used to requantize the "
-              "int32 data into int8.");
+        .set_default(dmlc::optional<float>())
+        .describe(
+            "The maximum scalar value in the form of float32 obtained "
+            "through calibration. If present, it will be used to requantize the "
+            "int32 data into int8.");
   }
 };
 
 inline bool RequantizeType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int> *in_attrs,
-                           std::vector<int> *out_attrs) {
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 3U);
-  const RequantizeParam &param = nnvm::get<RequantizeParam>(attrs.parsed);
+  const RequantizeParam& param = nnvm::get<RequantizeParam>(attrs.parsed);
   TYPE_ASSIGN_CHECK(*in_attrs, 0, mshadow::kInt32);
   TYPE_ASSIGN_CHECK(*in_attrs, 1, mshadow::kFloat32);
   TYPE_ASSIGN_CHECK(*in_attrs, 2, mshadow::kFloat32);
@@ -85,25 +88,43 @@ inline bool RequantizeType(const nnvm::NodeAttrs& attrs,
 }
 
 struct RequantizeKernel {
-  template<typename T1, typename T2>
-  MSHADOW_XINLINE static void Map(int i, T2 *output, float *omin_range, float *omax_range,
-      const T1 *input, const float *imin_range, const float *imax_range, const float real_range) {
+  template <typename T1, typename T2>
+  MSHADOW_XINLINE static void Map(int i,
+                                  T2* output,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const T1* input,
+                                  const float* imin_range,
+                                  const float* imax_range,
+                                  const float real_range) {
     const float input_float = QuantizedToFloat<T1>(input[i], *imin_range, *imax_range);
-    *omin_range = -real_range;
-    *omax_range =  real_range;
-    output[i] = FloatToQuantized<T2>(input_float, -real_range, real_range);
+    *omin_range             = -real_range;
+    *omax_range             = real_range;
+    output[i]               = FloatToQuantized<T2>(input_float, -real_range, real_range);
   }
 
-  template<typename T1, typename T2>
-  MSHADOW_XINLINE static void Map(int i, T2 *output, float *omin_range, float *omax_range,
-      const T1 *input, const float *imin_range, const float *imax_range,
-      const float *actual_min, const float *actual_max) {
-    Map(i, output, omin_range, omax_range, input, imin_range, imax_range,
+  template <typename T1, typename T2>
+  MSHADOW_XINLINE static void Map(int i,
+                                  T2* output,
+                                  float* omin_range,
+                                  float* omax_range,
+                                  const T1* input,
+                                  const float* imin_range,
+                                  const float* imax_range,
+                                  const float* actual_min,
+                                  const float* actual_max) {
+    Map(i,
+        output,
+        omin_range,
+        omax_range,
+        input,
+        imin_range,
+        imax_range,
         MaxAbs(*actual_min, *actual_max));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void RequantizeForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -112,73 +133,110 @@ void RequantizeForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mxnet_op;
   typedef int32_t SrcDType;
-  typedef int8_t  DstDType;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const RequantizeParam& param =
-    nnvm::get<RequantizeParam>(attrs.parsed);
-  auto out_type = GetQuantizeOutputType(param);
+  typedef int8_t DstDType;
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
+  const RequantizeParam& param = nnvm::get<RequantizeParam>(attrs.parsed);
+  auto out_type                = GetQuantizeOutputType(param);
   if (out_type == mshadow::kUint8 && std::is_same<xpu, gpu>::value) {
     LOG(FATAL) << "currently, uint8 quantization is only supported by CPU, "
                   "please switch to the context of CPU or int8 data type for GPU.";
   }
 
   if (param.min_calib_range.has_value() && param.max_calib_range.has_value()) {
-    Kernel<RequantizeKernel, xpu>::Launch(s, inputs[0].Size(),
-        outputs[0].dptr<DstDType>(), outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-        inputs[0].dptr<SrcDType>(), inputs[1].dptr<float>(), inputs[2].dptr<float>(),
+    Kernel<RequantizeKernel, xpu>::Launch(
+        s,
+        inputs[0].Size(),
+        outputs[0].dptr<DstDType>(),
+        outputs[1].dptr<float>(),
+        outputs[2].dptr<float>(),
+        inputs[0].dptr<SrcDType>(),
+        inputs[1].dptr<float>(),
+        inputs[2].dptr<float>(),
         MaxAbs(param.min_calib_range.value(), param.max_calib_range.value()));
   } else {  // model is not calibrated
     mxnet::TShape src_shape, dst_shape;
-    const size_t actual_float_size = sizeof(float);
+    const size_t actual_float_size     = sizeof(float);
     const size_t actual_quantized_size = sizeof(SrcDType);
-    const size_t temp_reduce_size = ConfigReduce<xpu, SrcDType>(
+    const size_t temp_reduce_size      = ConfigReduce<xpu, SrcDType>(
         s, inputs[0].shape_, mxnet::TShape(1, 1), &src_shape, &dst_shape);
-    Tensor<xpu, 1, char> temp_space =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(
-          Shape1(2*actual_float_size+2*actual_quantized_size+temp_reduce_size), s);
+    Tensor<xpu, 1, char> temp_space = ctx.requested[0].get_space_typed<xpu, 1, char>(
+        Shape1(2 * actual_float_size + 2 * actual_quantized_size + temp_reduce_size), s);
     Tensor<xpu, 1, float> actual_min_float(
         reinterpret_cast<float*>(temp_space.dptr_), Shape1(1), s);
     Tensor<xpu, 1, float> actual_max_float(
         reinterpret_cast<float*>(temp_space.dptr_) + 1, Shape1(1), s);
 
     const int dev_id = ctx.run_ctx.ctx.dev_id;
-    TBlob actual_min_quantized(reinterpret_cast<SrcDType*>(
-          temp_space.dptr_ + 8), Shape1(1), xpu::kDevMask, dev_id);
-    TBlob actual_max_quantized(reinterpret_cast<SrcDType*>(
-          temp_space.dptr_ + 8) + 1, Shape1(1), xpu::kDevMask, dev_id);
+    TBlob actual_min_quantized(
+        reinterpret_cast<SrcDType*>(temp_space.dptr_ + 8), Shape1(1), xpu::kDevMask, dev_id);
+    TBlob actual_max_quantized(
+        reinterpret_cast<SrcDType*>(temp_space.dptr_ + 8) + 1, Shape1(1), xpu::kDevMask, dev_id);
     Tensor<xpu, 1, char> workspace(
-        temp_space.dptr_+2*actual_float_size+2*actual_quantized_size, Shape1(temp_reduce_size), s);
+        temp_space.dptr_ + 2 * actual_float_size + 2 * actual_quantized_size,
+        Shape1(temp_reduce_size),
+        s);
 #if !defined(__CUDACC__)
     broadcast::Reduce<red::minimum, 2, SrcDType, mshadow::op::identity>(
-      s, actual_min_quantized.reshape(dst_shape),
-      kWriteTo, workspace, inputs[0].reshape(src_shape));
-    Kernel<QuantizedToFloatStruct, xpu>::Launch(s, 1,
-        actual_min_float.dptr_, actual_min_quantized.dptr<SrcDType>(),
-        inputs[1].dptr<float>(), inputs[2].dptr<float>());
+        s,
+        actual_min_quantized.reshape(dst_shape),
+        kWriteTo,
+        workspace,
+        inputs[0].reshape(src_shape));
+    Kernel<QuantizedToFloatStruct, xpu>::Launch(s,
+                                                1,
+                                                actual_min_float.dptr_,
+                                                actual_min_quantized.dptr<SrcDType>(),
+                                                inputs[1].dptr<float>(),
+                                                inputs[2].dptr<float>());
 
     broadcast::Reduce<red::maximum, 2, SrcDType, mshadow::op::identity>(
-      s, actual_max_quantized.reshape(dst_shape),
-      kWriteTo, workspace, inputs[0].reshape(src_shape));
+        s,
+        actual_max_quantized.reshape(dst_shape),
+        kWriteTo,
+        workspace,
+        inputs[0].reshape(src_shape));
 #else
-    broadcast::RTCReduce(ctx, actual_min_quantized.reshape(dst_shape),
-                         kWriteTo, workspace, inputs[0].reshape(src_shape),
-                         "red::minimum{}", 2, "identity");
-    Kernel<QuantizedToFloatStruct, xpu>::Launch(s, 1,
-        actual_min_float.dptr_, actual_min_quantized.dptr<SrcDType>(),
-        inputs[1].dptr<float>(), inputs[2].dptr<float>());
+    broadcast::RTCReduce(ctx,
+                         actual_min_quantized.reshape(dst_shape),
+                         kWriteTo,
+                         workspace,
+                         inputs[0].reshape(src_shape),
+                         "red::minimum{}",
+                         2,
+                         "identity");
+    Kernel<QuantizedToFloatStruct, xpu>::Launch(s,
+                                                1,
+                                                actual_min_float.dptr_,
+                                                actual_min_quantized.dptr<SrcDType>(),
+                                                inputs[1].dptr<float>(),
+                                                inputs[2].dptr<float>());
 
-    broadcast::RTCReduce(ctx, actual_max_quantized.reshape(dst_shape),
-                         kWriteTo, workspace, inputs[0].reshape(src_shape),
-                         "red::maximum{}", 2, "identity");
+    broadcast::RTCReduce(ctx,
+                         actual_max_quantized.reshape(dst_shape),
+                         kWriteTo,
+                         workspace,
+                         inputs[0].reshape(src_shape),
+                         "red::maximum{}",
+                         2,
+                         "identity");
 #endif
-    Kernel<QuantizedToFloatStruct, xpu>::Launch(s, 1,
-        actual_max_float.dptr_, actual_max_quantized.dptr<SrcDType>(),
-        inputs[1].dptr<float>(), inputs[2].dptr<float>());
+    Kernel<QuantizedToFloatStruct, xpu>::Launch(s,
+                                                1,
+                                                actual_max_float.dptr_,
+                                                actual_max_quantized.dptr<SrcDType>(),
+                                                inputs[1].dptr<float>(),
+                                                inputs[2].dptr<float>());
 
-    Kernel<RequantizeKernel, xpu>::Launch(s, inputs[0].Size(),
-        outputs[0].dptr<DstDType>(), outputs[1].dptr<float>(), outputs[2].dptr<float>(),
-        inputs[0].dptr<SrcDType>(), inputs[1].dptr<float>(), inputs[2].dptr<float>(),
-        actual_min_float.dptr_, actual_max_float.dptr_);
+    Kernel<RequantizeKernel, xpu>::Launch(s,
+                                          inputs[0].Size(),
+                                          outputs[0].dptr<DstDType>(),
+                                          outputs[1].dptr<float>(),
+                                          outputs[2].dptr<float>(),
+                                          inputs[0].dptr<SrcDType>(),
+                                          inputs[1].dptr<float>(),
+                                          inputs[2].dptr<float>(),
+                                          actual_min_float.dptr_,
+                                          actual_max_float.dptr_);
   }
 }
 
diff --git a/src/operator/quantization/requantize.cc b/src/operator/quantization/requantize.cc
index ff6c50e16624..e7923c46df03 100644
--- a/src/operator/quantization/requantize.cc
+++ b/src/operator/quantization/requantize.cc
@@ -33,10 +33,10 @@ namespace op {
 DMLC_REGISTER_PARAMETER(RequantizeParam);
 
 bool RequantizeStorageType(const nnvm::NodeAttrs& attrs,
-                         const int dev_mask,
-                         DispatchMode* dispatch_mode,
-                         std::vector<int> *in_attrs,
-                         std::vector<int> *out_attrs) {
+                           const int dev_mask,
+                           DispatchMode* dispatch_mode,
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   *dispatch_mode = DispatchMode::kFCompute;
 #if MXNET_USE_ONEDNN == 1
   if (dev_mask == mshadow::cpu::kDevMask) {
@@ -50,8 +50,8 @@ bool RequantizeStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_contrib_requantize)
-.add_alias("_npx_requantize")
-.describe(R"code(Given data that is quantized in int32 and the corresponding thresholds,
+    .add_alias("_npx_requantize")
+    .describe(R"code(Given data that is quantized in int32 and the corresponding thresholds,
 requantize the data into int8 using min and max thresholds either calculated at runtime
 or from calibration. It's highly recommended to pre-calucate the min and max thresholds
 through calibration since it is able to save the runtime of the operator and improve the
@@ -59,43 +59,50 @@ inference accuracy.
 
 .. Note::
     This operator only supports forward propogation. DO NOT use it in training.)code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RequantizeParam>)
-.set_num_inputs(3)
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "min_range", "max_range"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", QuantizeShape)
-.set_attr<nnvm::FInferType>("FInferType", RequantizeType)
-.set_attr<FInferStorageType>("FInferStorageType", RequantizeStorageType)
-// TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
-// will be reverted after the improvement of CachedOP is done.
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr_parser(ParamParser<RequantizeParam>)
+    .set_num_inputs(3)
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>(
+        "FListInputNames",
+        [](const NodeAttrs& attrs) {
+          return std::vector<std::string>{"data", "min_range", "max_range"};
+        })
+    .set_attr<mxnet::FInferShape>("FInferShape", QuantizeShape)
+    .set_attr<nnvm::FInferType>("FInferType", RequantizeType)
+    .set_attr<FInferStorageType>("FInferStorageType", RequantizeStorageType)
+    // TODO(Xinyu): a temp solution to enable GluonCV INT8 flow,
+    // will be reverted after the improvement of CachedOP is done.
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", MKLDNNRequantizeForward)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", MKLDNNRequantizeForward)
 #else
 .set_attr<FCompute>("FCompute<cpu>", RequantizeForward<cpu>)
 #endif
-.set_attr<FNeedCalibrateInput>("FNeedCalibrateInput", [](const NodeAttrs& attrs){
-  return std::vector<int>{0};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
-    const RequantizeParam& param =
-      nnvm::get<RequantizeParam>(attrs.parsed);
-    if (param.min_calib_range.has_value() && param.max_calib_range.has_value()) {
-      return std::vector<ResourceRequest>();
-    } else {
-      return std::vector<ResourceRequest>(1, ResourceRequest::kTempSpace);
-    }
-  })
-.add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `int32`")
-.add_argument("min_range", "NDArray-or-Symbol", "The original minimum scalar value "
-  "in the form of float32 used for quantizing data into int32.")
-.add_argument("max_range", "NDArray-or-Symbol", "The original maximum scalar value "
-  "in the form of float32 used for quantizing data into int32.")
-.add_arguments(RequantizeParam::__FIELDS__());
+    .set_attr<FNeedCalibrateInput>("FNeedCalibrateInput",
+                                   [](const NodeAttrs& attrs) { return std::vector<int>{0}; })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  const RequantizeParam& param =
+                                      nnvm::get<RequantizeParam>(attrs.parsed);
+                                  if (param.min_calib_range.has_value() &&
+                                      param.max_calib_range.has_value()) {
+                                    return std::vector<ResourceRequest>();
+                                  } else {
+                                    return std::vector<ResourceRequest>(
+                                        1, ResourceRequest::kTempSpace);
+                                  }
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "A ndarray/symbol of type `int32`")
+    .add_argument("min_range",
+                  "NDArray-or-Symbol",
+                  "The original minimum scalar value "
+                  "in the form of float32 used for quantizing data into int32.")
+    .add_argument("max_range",
+                  "NDArray-or-Symbol",
+                  "The original maximum scalar value "
+                  "in the form of float32 used for quantizing data into int32.")
+    .add_arguments(RequantizeParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/quantization/requantize.cu b/src/operator/quantization/requantize.cu
index be8ae59124e5..3334f30c83f4 100644
--- a/src/operator/quantization/requantize.cu
+++ b/src/operator/quantization/requantize.cu
@@ -27,8 +27,7 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_contrib_requantize)
-.set_attr<FCompute>("FCompute<gpu>", RequantizeForward<gpu>);
+NNVM_REGISTER_OP(_contrib_requantize).set_attr<FCompute>("FCompute<gpu>", RequantizeForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/multisample_op.cc b/src/operator/random/multisample_op.cc
index b4c5be160101..b493661c169b 100644
--- a/src/operator/random/multisample_op.cc
+++ b/src/operator/random/multisample_op.cc
@@ -30,41 +30,49 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(MultiSampleParam);
 
-#define MXNET_OPERATOR_REGISTER_SAMPLING(distr, sampler, num_inputs, \
-                                         input_name_1, input_name_2, \
-                                         input_desc_1, input_desc_2, \
-                                         description) \
-  NNVM_REGISTER_OP(_sample_##distr) \
-  .add_alias("sample_" #distr) \
-  .describe(description()+std::string(ADD_FILELINE)) \
-  .set_num_inputs(num_inputs) \
-  .set_num_outputs(1) \
-  .set_attr_parser(ParamParser<MultiSampleParam>) \
-  .set_attr<nnvm::FListInputNames>("FListInputNames", \
-    [](const NodeAttrs& attrs) { \
-      std::vector<std::string> v = {input_name_1, input_name_2}; v.resize(num_inputs); return v; \
-    }) \
-  .set_attr<mxnet::FInferShape>("FInferShape", MultiSampleOpShape) \
-  .set_attr<nnvm::FInferType>("FInferType", MultiSampleOpType) \
-  .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) { \
-      return std::vector<ResourceRequest>{ResourceRequest::kParallelRandom, \
-                                          ResourceRequest::kTempSpace}; \
-    }) \
-  .set_attr<FCompute>("FCompute<cpu>", MultiSampleOpForward<cpu, sampler, num_inputs>) \
-  .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes) \
-  .add_argument(input_name_1, "NDArray-or-Symbol", input_desc_1) \
-  .add_arguments(MultiSampleParam::__FIELDS__())
-
-#define MXNET_OPERATOR_REGISTER_SAMPLING1(distr, sampler, input_name, input_desc, \
-                                          description) \
-    MXNET_OPERATOR_REGISTER_SAMPLING(distr, sampler, 1, input_name, input_name, \
-                                     input_desc, input_desc, description)
-
-#define MXNET_OPERATOR_REGISTER_SAMPLING2(distr, sampler, input_name_1, input_name_2, \
-                                          input_desc_1, input_desc_2, description) \
-  MXNET_OPERATOR_REGISTER_SAMPLING(distr, sampler, 2, input_name_1, input_name_2, \
-                                   input_desc_1, input_desc_2, description) \
-  .add_argument(input_name_2, "NDArray-or-Symbol", input_desc_2)
+#define MXNET_OPERATOR_REGISTER_SAMPLING(distr,                                            \
+                                         sampler,                                          \
+                                         num_inputs,                                       \
+                                         input_name_1,                                     \
+                                         input_name_2,                                     \
+                                         input_desc_1,                                     \
+                                         input_desc_2,                                     \
+                                         description)                                      \
+  NNVM_REGISTER_OP(_sample_##distr)                                                        \
+      .add_alias("sample_" #distr)                                                         \
+      .describe(description() + std::string(ADD_FILELINE))                                 \
+      .set_num_inputs(num_inputs)                                                          \
+      .set_num_outputs(1)                                                                  \
+      .set_attr_parser(ParamParser<MultiSampleParam>)                                      \
+      .set_attr<nnvm::FListInputNames>(                                                    \
+          "FListInputNames",                                                               \
+          [](const NodeAttrs& attrs) {                                                     \
+            std::vector<std::string> v = {input_name_1, input_name_2};                     \
+            v.resize(num_inputs);                                                          \
+            return v;                                                                      \
+          })                                                                               \
+      .set_attr<mxnet::FInferShape>("FInferShape", MultiSampleOpShape)                     \
+      .set_attr<nnvm::FInferType>("FInferType", MultiSampleOpType)                         \
+      .set_attr<FResourceRequest>("FResourceRequest",                                      \
+                                  [](const NodeAttrs& attrs) {                             \
+                                    return std::vector<ResourceRequest>{                   \
+                                        ResourceRequest::kParallelRandom,                  \
+                                        ResourceRequest::kTempSpace};                      \
+                                  })                                                       \
+      .set_attr<FCompute>("FCompute<cpu>", MultiSampleOpForward<cpu, sampler, num_inputs>) \
+      .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                           \
+      .add_argument(input_name_1, "NDArray-or-Symbol", input_desc_1)                       \
+      .add_arguments(MultiSampleParam::__FIELDS__())
+
+#define MXNET_OPERATOR_REGISTER_SAMPLING1(distr, sampler, input_name, input_desc, description) \
+  MXNET_OPERATOR_REGISTER_SAMPLING(                                                            \
+      distr, sampler, 1, input_name, input_name, input_desc, input_desc, description)
+
+#define MXNET_OPERATOR_REGISTER_SAMPLING2(                                                    \
+    distr, sampler, input_name_1, input_name_2, input_desc_1, input_desc_2, description)      \
+  MXNET_OPERATOR_REGISTER_SAMPLING(                                                           \
+      distr, sampler, 2, input_name_1, input_name_2, input_desc_1, input_desc_2, description) \
+      .add_argument(input_name_2, "NDArray-or-Symbol", input_desc_2)
 
 inline std::string uniform_desc() {
   return std::string(R"code(Concurrent sampling from multiple
@@ -273,25 +281,52 @@ Examples::
 )code");
 }
 
-MXNET_OPERATOR_REGISTER_SAMPLING2(uniform, UniformSampler<cpu>, "low", "high",
-  "Lower bounds of the distributions.", "Upper bounds of the distributions.", uniform_desc);
-MXNET_OPERATOR_REGISTER_SAMPLING2(normal, NormalSampler<cpu>, "mu", "sigma",
-  "Means of the distributions.", "Standard deviations of the distributions.", normal_desc);
-MXNET_OPERATOR_REGISTER_SAMPLING2(gamma, GammaSampler<cpu>, "alpha", "beta",
-  "Alpha (shape) parameters of the distributions.", "Beta (scale) parameters of the distributions.",
-  gamma_desc);
-MXNET_OPERATOR_REGISTER_SAMPLING1(exponential, ExponentialSampler<cpu>, "lam",
-  "Lambda (rate) parameters of the distributions.", exponential_desc);
-MXNET_OPERATOR_REGISTER_SAMPLING1(poisson, PoissonSampler<cpu>, "lam",
-  "Lambda (rate) parameters of the distributions.", poisson_desc)
-.add_alias("_npx_tensor_poisson");
-MXNET_OPERATOR_REGISTER_SAMPLING2(negative_binomial, NegativeBinomialSampler<cpu>, "k", "p",
-  "Limits of unsuccessful experiments.", "Failure probabilities in each experiment.",
-  negative_binomial_desc);
+MXNET_OPERATOR_REGISTER_SAMPLING2(uniform,
+                                  UniformSampler<cpu>,
+                                  "low",
+                                  "high",
+                                  "Lower bounds of the distributions.",
+                                  "Upper bounds of the distributions.",
+                                  uniform_desc);
+MXNET_OPERATOR_REGISTER_SAMPLING2(normal,
+                                  NormalSampler<cpu>,
+                                  "mu",
+                                  "sigma",
+                                  "Means of the distributions.",
+                                  "Standard deviations of the distributions.",
+                                  normal_desc);
+MXNET_OPERATOR_REGISTER_SAMPLING2(gamma,
+                                  GammaSampler<cpu>,
+                                  "alpha",
+                                  "beta",
+                                  "Alpha (shape) parameters of the distributions.",
+                                  "Beta (scale) parameters of the distributions.",
+                                  gamma_desc);
+MXNET_OPERATOR_REGISTER_SAMPLING1(exponential,
+                                  ExponentialSampler<cpu>,
+                                  "lam",
+                                  "Lambda (rate) parameters of the distributions.",
+                                  exponential_desc);
+MXNET_OPERATOR_REGISTER_SAMPLING1(poisson,
+                                  PoissonSampler<cpu>,
+                                  "lam",
+                                  "Lambda (rate) parameters of the distributions.",
+                                  poisson_desc)
+    .add_alias("_npx_tensor_poisson");
+MXNET_OPERATOR_REGISTER_SAMPLING2(negative_binomial,
+                                  NegativeBinomialSampler<cpu>,
+                                  "k",
+                                  "p",
+                                  "Limits of unsuccessful experiments.",
+                                  "Failure probabilities in each experiment.",
+                                  negative_binomial_desc);
 MXNET_OPERATOR_REGISTER_SAMPLING2(generalized_negative_binomial,
-  GeneralizedNegativeBinomialSampler<cpu>, "mu", "alpha",
-  "Means of the distributions.", "Alpha (dispersion) parameters of the distributions.",
-  generalized_negative_binomial_desc);
+                                  GeneralizedNegativeBinomialSampler<cpu>,
+                                  "mu",
+                                  "alpha",
+                                  "Means of the distributions.",
+                                  "Alpha (dispersion) parameters of the distributions.",
+                                  generalized_negative_binomial_desc);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/multisample_op.cu b/src/operator/random/multisample_op.cu
index 0bd9777db4e8..4c571e705c9b 100644
--- a/src/operator/random/multisample_op.cu
+++ b/src/operator/random/multisample_op.cu
@@ -28,26 +28,27 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_sample_uniform)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, UniformSampler<gpu>, 2>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, UniformSampler<gpu>, 2>);
 
 NNVM_REGISTER_OP(_sample_normal)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, NormalSampler<gpu>, 2>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, NormalSampler<gpu>, 2>);
 
 NNVM_REGISTER_OP(_sample_gamma)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, GammaSampler<gpu>, 2>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, GammaSampler<gpu>, 2>);
 
 NNVM_REGISTER_OP(_sample_exponential)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, ExponentialSampler<gpu>, 1>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, ExponentialSampler<gpu>, 1>);
 
 NNVM_REGISTER_OP(_sample_poisson)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, PoissonSampler<gpu>, 1>);
+    .set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, PoissonSampler<gpu>, 1>);
 
 NNVM_REGISTER_OP(_sample_negative_binomial)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu, NegativeBinomialSampler<gpu>, 2>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        MultiSampleOpForward<gpu, NegativeBinomialSampler<gpu>, 2>);
 
 NNVM_REGISTER_OP(_sample_generalized_negative_binomial)
-.set_attr<FCompute>("FCompute<gpu>", MultiSampleOpForward<gpu,
-                    GeneralizedNegativeBinomialSampler<gpu>, 2>);
+    .set_attr<FCompute>("FCompute<gpu>",
+                        MultiSampleOpForward<gpu, GeneralizedNegativeBinomialSampler<gpu>, 2>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/multisample_op.h b/src/operator/random/multisample_op.h
index ff413bd6f286..7a77366ad866 100644
--- a/src/operator/random/multisample_op.h
+++ b/src/operator/random/multisample_op.h
@@ -33,7 +33,6 @@
 #include "../elemwise_op_common.h"
 #include "./sampler.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -42,30 +41,31 @@ struct MultiSampleParam : public dmlc::Parameter<MultiSampleParam> {
   int dtype;
   DMLC_DECLARE_PARAMETER(MultiSampleParam) {
     DMLC_DECLARE_FIELD(shape)
-      .set_default(mxnet::TShape(0, 1))
-      .describe("Shape to be sampled from each random distribution.");
+        .set_default(mxnet::TShape(0, 1))
+        .describe("Shape to be sampled from each random distribution.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float16", mshadow::kFloat16)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
 inline bool MultiSampleOpShape(const nnvm::NodeAttrs& attrs,
                                mxnet::ShapeVector* in_attrs,
                                mxnet::ShapeVector* out_attrs) {
-  CHECK_GT(in_attrs->size(), 0)
-    << "sampling operator takes 1 or 2 arguments (" << in_attrs->size() << " given)";
-  CHECK_LT(in_attrs->size(), 3)
-    << "sampling operator takes 1 or 2 arguments (" << in_attrs->size() << " given)";
+  CHECK_GT(in_attrs->size(), 0) << "sampling operator takes 1 or 2 arguments (" << in_attrs->size()
+                                << " given)";
+  CHECK_LT(in_attrs->size(), 3) << "sampling operator takes 1 or 2 arguments (" << in_attrs->size()
+                                << " given)";
   CHECK_EQ(out_attrs->size(), 1);
   // Get shape to be sampled for each parameter set.
   const MultiSampleParam& param = nnvm::get<MultiSampleParam>(attrs.parsed);
-  mxnet::TShape sshape = param.shape;
+  mxnet::TShape sshape          = param.shape;
   for (int i = 0; i < sshape.ndim(); ++i) {
     CHECK_GE(sshape[i], 0) << "shape parameter must be non-negative within each dimension";
   }
@@ -75,11 +75,12 @@ inline bool MultiSampleOpShape(const nnvm::NodeAttrs& attrs,
   // automatically crash when we back-propagate from inputs to outputs.
   if (tshape.ndim() > sshape.ndim()) {
     // Promote down by removing last dimensions which represent the samples.
-    tshape = mxnet::TShape(tshape.begin(), tshape.begin()+(tshape.ndim()-sshape.ndim()));
+    tshape = mxnet::TShape(tshape.begin(), tshape.begin() + (tshape.ndim() - sshape.ndim()));
   }
   // Shape assignment/checking for inputs.
   for (const auto& in_attr : *in_attrs) {
-    if ( !shape_assign(&tshape, in_attr)) return false;
+    if (!shape_assign(&tshape, in_attr))
+      return false;
   }
   for (size_t i = 0; i < in_attrs->size(); ++i) {
     SHAPE_ASSIGN_CHECK(*in_attrs, i, tshape);
@@ -97,82 +98,84 @@ inline bool MultiSampleOpShape(const nnvm::NodeAttrs& attrs,
 inline bool MultiSampleOpType(const nnvm::NodeAttrs& attrs,
                               std::vector<int>* in_attrs,
                               std::vector<int>* out_attrs) {
-  CHECK_GT(in_attrs->size(), 0)
-    << "sampling operator takes 1 or 2 arguments (" << in_attrs->size() << " given)";
-  CHECK_LT(in_attrs->size(), 3)
-    << "sampling operator takes 1 or 2 arguments (" << in_attrs->size() << " given)";
+  CHECK_GT(in_attrs->size(), 0) << "sampling operator takes 1 or 2 arguments (" << in_attrs->size()
+                                << " given)";
+  CHECK_LT(in_attrs->size(), 3) << "sampling operator takes 1 or 2 arguments (" << in_attrs->size()
+                                << " given)";
   CHECK_EQ(out_attrs->size(), 1);
 
   // All inputs must have same type.
   int dtype = -1;
   for (int in_attr : *in_attrs) {
-    if (!type_assign(&dtype, in_attr)) return false;
+    if (!type_assign(&dtype, in_attr))
+      return false;
   }
   for (size_t i = 0; i < in_attrs->size(); ++i) {
     TYPE_ASSIGN_CHECK(*in_attrs, i, dtype);
   }
-  if (-1 == dtype) return false;
+  if (-1 == dtype)
+    return false;
 
   // The output may have a different type so we can't infer from inputs.
   const MultiSampleParam& param = nnvm::get<MultiSampleParam>(attrs.parsed);
-  dtype = (*out_attrs)[0];
+  dtype                         = (*out_attrs)[0];
   if (dtype != -1) {
     if (param.dtype != -1) {
       // dtype given in args, check that it matches the output type
-      CHECK_EQ(dtype, param.dtype) << "Inferred output type does not match requested type: "
-      << dtype << " vs " << param.dtype;
+      CHECK_EQ(dtype, param.dtype)
+          << "Inferred output type does not match requested type: " << dtype << " vs "
+          << param.dtype;
     }
   } else {
     // Output type can't be inferred. Use type in args or default.
     dtype = (param.dtype == -1 ? mshadow::kFloat32 : param.dtype);
   }
-  bool dtype_ok = (dtype == mshadow::kFloat16) || (dtype == mshadow::kFloat32) ||
-    (dtype == mshadow::kFloat64);
-  CHECK_EQ(dtype_ok, true) << "Output type must be float16, float32, or float64: dtype is "
-    << dtype<< " vs " << mshadow::kFloat16 << " or " << mshadow::kFloat32 << " or "
-    << mshadow::kFloat64;
+  bool dtype_ok =
+      (dtype == mshadow::kFloat16) || (dtype == mshadow::kFloat32) || (dtype == mshadow::kFloat64);
+  CHECK_EQ(dtype_ok, true) << "Output type must be float16, float32, or float64: dtype is " << dtype
+                           << " vs " << mshadow::kFloat16 << " or " << mshadow::kFloat32 << " or "
+                           << mshadow::kFloat64;
   TYPE_ASSIGN_CHECK(*out_attrs, 0, dtype);
   return true;
 }
 
 using namespace mxnet::common::random;
 
-template<typename xpu, typename IType, typename OType, typename Sampler, int inum>
+template <typename xpu, typename IType, typename OType, typename Sampler, int inum>
 struct SamplerCaller;
 
-template<typename xpu, typename IType, typename OType, typename Sampler>
+template <typename xpu, typename IType, typename OType, typename Sampler>
 struct SamplerCaller<xpu, IType, OType, Sampler, 1> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
-                 RandGenerator<xpu, OType> *pgen,
-                 mshadow::Stream<xpu> *s) {
+                 RandGenerator<xpu, OType>* pgen,
+                 mshadow::Stream<xpu>* s) {
     Sampler sampler;
-    sampler.Sample(inputs[0].FlatTo1D<xpu, IType>(s),
-                   outputs[0].FlatTo1D<xpu, OType>(s),
-                   pgen, s);
+    sampler.Sample(inputs[0].FlatTo1D<xpu, IType>(s), outputs[0].FlatTo1D<xpu, OType>(s), pgen, s);
   }
 };
 
-template<typename xpu, typename IType, typename OType, typename Sampler>
+template <typename xpu, typename IType, typename OType, typename Sampler>
 struct SamplerCaller<xpu, IType, OType, Sampler, 2> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
-                 RandGenerator<xpu, OType> *pgen,
-                 mshadow::Stream<xpu> *s) {
+                 RandGenerator<xpu, OType>* pgen,
+                 mshadow::Stream<xpu>* s) {
     Sampler sampler;
     sampler.Sample(inputs[0].FlatTo1D<xpu, IType>(s),
                    inputs[1].FlatTo1D<xpu, IType>(s),
                    outputs[0].FlatTo1D<xpu, OType>(s),
-                   pgen, s);
+                   pgen,
+                   s);
   }
 };
 
-template<typename xpu, typename Sampler, int inum>
+template <typename xpu, typename Sampler, int inum>
 void MultiSampleOpForward(const nnvm::NodeAttrs& attrs,
-                       const OpContext& ctx,
-                       const std::vector<TBlob>& inputs,
-                       const std::vector<OpReqType>& req,
-                       const std::vector<TBlob>& outputs) {
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
+                          const std::vector<OpReqType>& req,
+                          const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
   CHECK_EQ(inputs.size(), inum);
@@ -180,10 +183,10 @@ void MultiSampleOpForward(const nnvm::NodeAttrs& attrs,
   if (inputs[0].Size() == 0) {
     return;
   }
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {
     MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+      RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
       SamplerCaller<xpu, IType, OType, Sampler, inum>::op(inputs, outputs, pgen, s);
     });
   });
diff --git a/src/operator/random/pdf_op.cc b/src/operator/random/pdf_op.cc
index 070ca81d61ff..83d3d2126658 100644
--- a/src/operator/random/pdf_op.cc
+++ b/src/operator/random/pdf_op.cc
@@ -20,7 +20,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file pdf_op.cc
- * \brief CPU-operators for computing the pdf of random distributions. 
+ * \brief CPU-operators for computing the pdf of random distributions.
  */
 
 #include "./pdf_op.h"
@@ -30,56 +30,68 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(PdfParam);
 
-#define MXNET_OPERATOR_REGISTER_PDF(distr, pdffunc, num_parms, \
-                                    parm_name_1, parm_name_2, \
-                                    parm_desc_1, parm_desc_2, \
-                                    description, vectorparms) \
-  NNVM_REGISTER_OP(_random_pdf_##distr) \
-  .add_alias("random_pdf_" #distr) \
-  .describe(description()+std::string(ADD_FILELINE)) \
-  .set_num_inputs(num_parms+1) \
-  .set_num_outputs(1) \
-  .set_attr_parser(ParamParser<PdfParam>) \
-  .set_attr<nnvm::FListInputNames>("FListInputNames", \
-    [](const NodeAttrs& attrs) { \
-      std::vector<std::string> v = {"sample", parm_name_1, parm_name_2}; \
-      v.resize(num_parms+1); \
-      return v; \
-    }) \
-  .set_attr<mxnet::FInferShape>("FInferShape", PdfOpShape<vectorparms>) \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<num_parms+1, 1>) \
-  .set_attr<FCompute>("FCompute<cpu>", PdfOpForward<cpu, pdffunc, num_parms, vectorparms>) \
-  .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_pdf_" #distr}) \
-  .add_argument("sample", "NDArray-or-Symbol", "Samples from the distributions.") \
-  .add_argument(parm_name_1, "NDArray-or-Symbol", parm_desc_1) \
-  .add_arguments(PdfParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_PDF(distr,                                                     \
+                                    pdffunc,                                                   \
+                                    num_parms,                                                 \
+                                    parm_name_1,                                               \
+                                    parm_name_2,                                               \
+                                    parm_desc_1,                                               \
+                                    parm_desc_2,                                               \
+                                    description,                                               \
+                                    vectorparms)                                               \
+  NNVM_REGISTER_OP(_random_pdf_##distr)                                                        \
+      .add_alias("random_pdf_" #distr)                                                         \
+      .describe(description() + std::string(ADD_FILELINE))                                     \
+      .set_num_inputs(num_parms + 1)                                                           \
+      .set_num_outputs(1)                                                                      \
+      .set_attr_parser(ParamParser<PdfParam>)                                                  \
+      .set_attr<nnvm::FListInputNames>(                                                        \
+          "FListInputNames",                                                                   \
+          [](const NodeAttrs& attrs) {                                                         \
+            std::vector<std::string> v = {"sample", parm_name_1, parm_name_2};                 \
+            v.resize(num_parms + 1);                                                           \
+            return v;                                                                          \
+          })                                                                                   \
+      .set_attr<mxnet::FInferShape>("FInferShape", PdfOpShape<vectorparms>)                    \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<num_parms + 1, 1>)                \
+      .set_attr<FCompute>("FCompute<cpu>", PdfOpForward<cpu, pdffunc, num_parms, vectorparms>) \
+      .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_pdf_" #distr})   \
+      .add_argument("sample", "NDArray-or-Symbol", "Samples from the distributions.")          \
+      .add_argument(parm_name_1, "NDArray-or-Symbol", parm_desc_1)                             \
+      .add_arguments(PdfParam::__FIELDS__())
 
 #define MXNET_OPERATOR_REGISTER_PDF_GRAD(distr, pdffunc, num_parms, vectorparms) \
-  NNVM_REGISTER_OP(_backward_pdf_##distr) \
-  .set_num_inputs(num_parms+3) \
-  .set_num_outputs(num_parms+1) \
-  .set_attr_parser(ParamParser<PdfParam>) \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs) \
-    { std::vector<std::pair<int, int> > v = {{1, 0}, {2, 1}, {3, 2}}; \
-    v.resize(num_parms+1); \
-    return v; }) \
-  .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) \
-    { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; }) \
-  .set_attr<nnvm::TIsBackward>("TIsBackward", true) \
-  .set_attr<FCompute>("FCompute<cpu>", PdfOpBackward<cpu, pdffunc##_Grad, num_parms, vectorparms>);
-
-
-#define MXNET_OPERATOR_REGISTER_PDF1(distr, pdffunc, parm_name, parm_desc, \
-                                     description, vectorparms) \
-    MXNET_OPERATOR_REGISTER_PDF(distr, pdffunc, 1, parm_name, parm_name, \
-                                parm_desc, parm_desc, description, vectorparms); \
-    MXNET_OPERATOR_REGISTER_PDF_GRAD(distr, pdffunc, 1, vectorparms)
-
-#define MXNET_OPERATOR_REGISTER_PDF2(distr, pdffunc, parm_name_1, parm_name_2, \
-                                     parm_desc_1, parm_desc_2, description) \
-  MXNET_OPERATOR_REGISTER_PDF(distr, pdffunc, 2, parm_name_1, parm_name_2, \
-                                   parm_desc_1, parm_desc_2, description, false) \
-  .add_argument(parm_name_2, "NDArray-or-Symbol", parm_desc_2); \
+  NNVM_REGISTER_OP(_backward_pdf_##distr)                                        \
+      .set_num_inputs(num_parms + 3)                                             \
+      .set_num_outputs(num_parms + 1)                                            \
+      .set_attr_parser(ParamParser<PdfParam>)                                    \
+      .set_attr<nnvm::FInplaceOption>(                                           \
+          "FInplaceOption",                                                      \
+          [](const NodeAttrs& attrs) {                                           \
+            std::vector<std::pair<int, int> > v = {{1, 0}, {2, 1}, {3, 2}};      \
+            v.resize(num_parms + 1);                                             \
+            return v;                                                            \
+          })                                                                     \
+      .set_attr<FResourceRequest>(                                               \
+          "FResourceRequest",                                                    \
+          [](const NodeAttrs& attrs) {                                           \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};    \
+          })                                                                     \
+      .set_attr<nnvm::TIsBackward>("TIsBackward", true)                          \
+      .set_attr<FCompute>("FCompute<cpu>",                                       \
+                          PdfOpBackward<cpu, pdffunc##_Grad, num_parms, vectorparms>);
+
+#define MXNET_OPERATOR_REGISTER_PDF1(                                                           \
+    distr, pdffunc, parm_name, parm_desc, description, vectorparms)                             \
+  MXNET_OPERATOR_REGISTER_PDF(                                                                  \
+      distr, pdffunc, 1, parm_name, parm_name, parm_desc, parm_desc, description, vectorparms); \
+  MXNET_OPERATOR_REGISTER_PDF_GRAD(distr, pdffunc, 1, vectorparms)
+
+#define MXNET_OPERATOR_REGISTER_PDF2(                                                            \
+    distr, pdffunc, parm_name_1, parm_name_2, parm_desc_1, parm_desc_2, description)             \
+  MXNET_OPERATOR_REGISTER_PDF(                                                                   \
+      distr, pdffunc, 2, parm_name_1, parm_name_2, parm_desc_1, parm_desc_2, description, false) \
+      .add_argument(parm_name_2, "NDArray-or-Symbol", parm_desc_2);                              \
   MXNET_OPERATOR_REGISTER_PDF_GRAD(distr, pdffunc, 2, false)
 
 inline std::string uniform_desc() {
@@ -294,26 +306,59 @@ Examples::
 )code");
 }
 
-MXNET_OPERATOR_REGISTER_PDF2(uniform, PDF_Uniform, "low", "high",
-  "Lower bounds of the distributions.", "Upper bounds of the distributions.", uniform_desc)
-MXNET_OPERATOR_REGISTER_PDF2(normal, PDF_Normal, "mu", "sigma",
-  "Means of the distributions.", "Standard deviations of the distributions.", normal_desc)
-MXNET_OPERATOR_REGISTER_PDF2(gamma, PDF_Gamma, "alpha", "beta",
-  "Alpha (shape) parameters of the distributions.", "Beta (scale) parameters of the distributions.",
-  gamma_desc)
-MXNET_OPERATOR_REGISTER_PDF1(exponential, PDF_Exponential, "lam",
-  "Lambda (rate) parameters of the distributions.", exponential_desc, false)
-MXNET_OPERATOR_REGISTER_PDF1(poisson, PDF_Poisson, "lam",
-  "Lambda (rate) parameters of the distributions.", poisson_desc, false)
-MXNET_OPERATOR_REGISTER_PDF2(negative_binomial, PDF_NegativeBinomial, "k", "p",
-  "Limits of unsuccessful experiments.", "Failure probabilities in each experiment.",
-  negative_binomial_desc)
+MXNET_OPERATOR_REGISTER_PDF2(uniform,
+                             PDF_Uniform,
+                             "low",
+                             "high",
+                             "Lower bounds of the distributions.",
+                             "Upper bounds of the distributions.",
+                             uniform_desc)
+MXNET_OPERATOR_REGISTER_PDF2(normal,
+                             PDF_Normal,
+                             "mu",
+                             "sigma",
+                             "Means of the distributions.",
+                             "Standard deviations of the distributions.",
+                             normal_desc)
+MXNET_OPERATOR_REGISTER_PDF2(gamma,
+                             PDF_Gamma,
+                             "alpha",
+                             "beta",
+                             "Alpha (shape) parameters of the distributions.",
+                             "Beta (scale) parameters of the distributions.",
+                             gamma_desc)
+MXNET_OPERATOR_REGISTER_PDF1(exponential,
+                             PDF_Exponential,
+                             "lam",
+                             "Lambda (rate) parameters of the distributions.",
+                             exponential_desc,
+                             false)
+MXNET_OPERATOR_REGISTER_PDF1(poisson,
+                             PDF_Poisson,
+                             "lam",
+                             "Lambda (rate) parameters of the distributions.",
+                             poisson_desc,
+                             false)
+MXNET_OPERATOR_REGISTER_PDF2(negative_binomial,
+                             PDF_NegativeBinomial,
+                             "k",
+                             "p",
+                             "Limits of unsuccessful experiments.",
+                             "Failure probabilities in each experiment.",
+                             negative_binomial_desc)
 MXNET_OPERATOR_REGISTER_PDF2(generalized_negative_binomial,
-  PDF_GeneralizedNegativeBinomial, "mu", "alpha",
-  "Means of the distributions.", "Alpha (dispersion) parameters of the distributions.",
-  generalized_negative_binomial_desc)
-MXNET_OPERATOR_REGISTER_PDF1(dirichlet, PDF_Dirichlet, "alpha",
-  "Concentration parameters of the distributions.", dirichlet_desc, true)
+                             PDF_GeneralizedNegativeBinomial,
+                             "mu",
+                             "alpha",
+                             "Means of the distributions.",
+                             "Alpha (dispersion) parameters of the distributions.",
+                             generalized_negative_binomial_desc)
+MXNET_OPERATOR_REGISTER_PDF1(dirichlet,
+                             PDF_Dirichlet,
+                             "alpha",
+                             "Concentration parameters of the distributions.",
+                             dirichlet_desc,
+                             true)
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/pdf_op.cu b/src/operator/random/pdf_op.cu
index e77720b2c329..5e32c21e3b58 100644
--- a/src/operator/random/pdf_op.cu
+++ b/src/operator/random/pdf_op.cu
@@ -20,7 +20,7 @@
 /*!
  * Copyright (c) 2018 by Contributors
  * \file pdf_op.cu
- * \brief GPU-operators for computing the pdf of random distributions. 
+ * \brief GPU-operators for computing the pdf of random distributions.
  */
 
 #include "./pdf_op.h"
@@ -28,11 +28,12 @@
 namespace mxnet {
 namespace op {
 
-#define MXNET_OPERATOR_REGISTER_PDF(distr, pdffunc, num_parms, vector_parms) \
-  NNVM_REGISTER_OP(_random_pdf_##distr) \
-  .set_attr<FCompute>("FCompute<gpu>", PdfOpForward<gpu, pdffunc, num_parms, vector_parms>); \
-  NNVM_REGISTER_OP(_backward_pdf_##distr) \
-  .set_attr<FCompute>("FCompute<gpu>", PdfOpBackward<gpu, pdffunc##_Grad, num_parms, vector_parms>);
+#define MXNET_OPERATOR_REGISTER_PDF(distr, pdffunc, num_parms, vector_parms)                     \
+  NNVM_REGISTER_OP(_random_pdf_##distr)                                                          \
+      .set_attr<FCompute>("FCompute<gpu>", PdfOpForward<gpu, pdffunc, num_parms, vector_parms>); \
+  NNVM_REGISTER_OP(_backward_pdf_##distr)                                                        \
+      .set_attr<FCompute>("FCompute<gpu>",                                                       \
+                          PdfOpBackward<gpu, pdffunc##_Grad, num_parms, vector_parms>);
 
 MXNET_OPERATOR_REGISTER_PDF(uniform, PDF_Uniform, 2, false)
 MXNET_OPERATOR_REGISTER_PDF(normal, PDF_Normal, 2, false)
@@ -41,7 +42,9 @@ MXNET_OPERATOR_REGISTER_PDF(exponential, PDF_Exponential, 1, false)
 MXNET_OPERATOR_REGISTER_PDF(poisson, PDF_Poisson, 1, false)
 MXNET_OPERATOR_REGISTER_PDF(negative_binomial, PDF_NegativeBinomial, 2, false)
 MXNET_OPERATOR_REGISTER_PDF(generalized_negative_binomial,
-                            PDF_GeneralizedNegativeBinomial, 2, false)
+                            PDF_GeneralizedNegativeBinomial,
+                            2,
+                            false)
 MXNET_OPERATOR_REGISTER_PDF(dirichlet, PDF_Dirichlet, 1, true)
 
 }  // namespace op
diff --git a/src/operator/random/pdf_op.h b/src/operator/random/pdf_op.h
index f53d3a6dd6e0..7bbb4fce12f3 100644
--- a/src/operator/random/pdf_op.h
+++ b/src/operator/random/pdf_op.h
@@ -38,269 +38,366 @@
 namespace mxnet {
 namespace op {
 
-template<typename DType>
-MSHADOW_XINLINE static DType ceph_psi(DType val) { return special_functions::cephes::psi(val); }
-template<>
+template <typename DType>
+MSHADOW_XINLINE static DType ceph_psi(DType val) {
+  return special_functions::cephes::psi(val);
+}
+template <>
 MSHADOW_XINLINE mshadow::half::half_t ceph_psi(mshadow::half::half_t val) {
-    return special_functions::cephes::psi<float>(val);
+  return special_functions::cephes::psi<float>(val);
 }
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Uniform {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *lower, IType2 *upper) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* lower,
+                                  IType2* upper) {
     const index_t index(start / sample_size);
     const DType l(lower[index]), h(upper[index]);
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        // No check whether sample is in the support.
-        out[i] = logpdf ? -DType(log(h - l)) : DType(1.0) / (h - l);
+      // No check whether sample is in the support.
+      out[i] = logpdf ? -DType(log(h - l)) : DType(1.0) / (h - l);
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Uniform_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *lower, IType2 *upper,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_lower, IType2 *grad_upper) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* lower,
+                                  IType2* upper,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_lower,
+                                  IType2* grad_upper) {
     const index_t index(start / sample_size);
     const DType l(lower[index]), h(upper[index]);
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType scaling(grad_out[i]*(logpdf ? DType(1) : out[i]));
-        grad_lower[i]  = scaling / (h - l);
-        grad_upper[i]  = scaling / (l - h);
-        KERNEL_ASSIGN(grad_sample[i], req, 0);
+      const DType scaling(grad_out[i] * (logpdf ? DType(1) : out[i]));
+      grad_lower[i] = scaling / (h - l);
+      grad_upper[i] = scaling / (l - h);
+      KERNEL_ASSIGN(grad_sample[i], req, 0);
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Normal {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *loc, IType2 *scale) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* loc,
+                                  IType2* scale) {
     const index_t index(start / sample_size);
     const DType u(loc[index]), s(scale[index]), sq(s * s);
     const DType normalizer(sqrt(2.0 * mxnet_op::PI) * s);
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType exponent((DType(-0.5) * (x - u) * (x - u)) / (sq));
-        out[i] = logpdf ? exponent - log(normalizer) : exp(exponent) / normalizer;
+      const DType x(sample[i]);
+      const DType exponent((DType(-0.5) * (x - u) * (x - u)) / (sq));
+      out[i] = logpdf ? exponent - log(normalizer) : exp(exponent) / normalizer;
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Normal_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *loc, IType2 *scale,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_loc, IType2 *grad_scale) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* loc,
+                                  IType2* scale,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_loc,
+                                  IType2* grad_scale) {
     const index_t index(start / sample_size);
     const DType u(loc[index]), s(scale[index]), s_squared(s * s), s_cubed(s_squared * s);
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType scaling(grad_out[i]*(logpdf ? DType(1) : out[i]));
-        grad_loc[i]    = scaling * (x - u) / s_squared;
-        grad_scale[i]  = scaling * ((x - u) * (x - u) - s_squared) / s_cubed;
-        KERNEL_ASSIGN(grad_sample[i], req, scaling * (u - x) / s_squared);
+      const DType x(sample[i]);
+      const DType scaling(grad_out[i] * (logpdf ? DType(1) : out[i]));
+      grad_loc[i]   = scaling * (x - u) / s_squared;
+      grad_scale[i] = scaling * ((x - u) * (x - u) - s_squared) / s_cubed;
+      KERNEL_ASSIGN(grad_sample[i], req, scaling * (u - x) / s_squared);
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Gamma {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *alpha, IType2 *beta) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* alpha,
+                                  IType2* beta) {
     const index_t index(start / sample_size);
     const DType a(alpha[index]), b(beta[index]), lgamma_a(lgamma(a)), a_log_b(a * log(b));
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType lpdf(a_log_b + (a - 1) * log(x) - b * x - lgamma_a);
-        out[i] = logpdf ? lpdf : DType(exp(lpdf));
+      const DType x(sample[i]);
+      const DType lpdf(a_log_b + (a - 1) * log(x) - b * x - lgamma_a);
+      out[i] = logpdf ? lpdf : DType(exp(lpdf));
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Gamma_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *alpha, IType2 *beta,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_alpha, IType2 *grad_beta) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* alpha,
+                                  IType2* beta,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_alpha,
+                                  IType2* grad_beta) {
     const index_t index(start / sample_size);
     const DType a(alpha[index]), b(beta[index]), log_b(log(b)), ceph_psi_a(ceph_psi(a));
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType scaling(grad_out[i]*(logpdf ? DType(1) : out[i]));
-        grad_alpha[i]  = scaling * (log_b + log(x) - ceph_psi_a);
-        grad_beta[i]   = scaling * (a / b - x);
-        KERNEL_ASSIGN(grad_sample[i], req, scaling * ((a - 1) / x - b));
+      const DType x(sample[i]);
+      const DType scaling(grad_out[i] * (logpdf ? DType(1) : out[i]));
+      grad_alpha[i] = scaling * (log_b + log(x) - ceph_psi_a);
+      grad_beta[i]  = scaling * (a / b - x);
+      KERNEL_ASSIGN(grad_sample[i], req, scaling * ((a - 1) / x - b));
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Exponential {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *lambda) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* lambda) {
     const index_t index(start / sample_size);
     const DType l(lambda[index]), log_l(log(l));
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        out[i] = logpdf ? log_l - l * x : l * exp(-l * x);
+      const DType x(sample[i]);
+      out[i] = logpdf ? log_l - l * x : l * exp(-l * x);
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Exponential_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *lambda,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_lambda) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* lambda,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_lambda) {
     const index_t index(start / sample_size);
     const DType l(lambda[index]);
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType scaling(grad_out[i]*(logpdf ? DType(1) : out[i]));
-        grad_lambda[i] = scaling * (DType(1) / l - x);
-        KERNEL_ASSIGN(grad_sample[i], req, -scaling * l);
+      const DType x(sample[i]);
+      const DType scaling(grad_out[i] * (logpdf ? DType(1) : out[i]));
+      grad_lambda[i] = scaling * (DType(1) / l - x);
+      KERNEL_ASSIGN(grad_sample[i], req, -scaling * l);
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Poisson {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *lambda) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* lambda) {
     const index_t index(start / sample_size);
     const DType l(lambda[index]), log_l(log(l));
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType lpdf((x * log_l - lgamma(x + 1)) - l);
-        out[i] = logpdf ? lpdf  : DType(exp(lpdf));
+      const DType x(sample[i]);
+      const DType lpdf((x * log_l - lgamma(x + 1)) - l);
+      out[i] = logpdf ? lpdf : DType(exp(lpdf));
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Poisson_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *lambda,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_lambda) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* lambda,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_lambda) {
     const index_t index(start / sample_size);
     const DType l(lambda[index]);
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType scaling(grad_out[i]*(logpdf ? DType(1) : out[i]));
-        grad_lambda[i] = scaling * (x / l - DType(1));
-        KERNEL_ASSIGN(grad_sample[i], req, 0);
+      const DType x(sample[i]);
+      const DType scaling(grad_out[i] * (logpdf ? DType(1) : out[i]));
+      grad_lambda[i] = scaling * (x / l - DType(1));
+      KERNEL_ASSIGN(grad_sample[i], req, 0);
     }
   }
 };
 
-
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_NegativeBinomial {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *limit, IType2 *prob) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* limit,
+                                  IType2* prob) {
     const index_t index(start / sample_size);
     const DType l(limit[index]), p(prob[index]), lgamma_l(lgamma(l));
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType x(sample[i]);
-        const DType lpdf((lgamma(x + l) - lgamma(x + 1) - lgamma_l) + l * log(p) + x * log(1 - p));
-        out[i] = logpdf ? lpdf : DType(exp(lpdf));
+      const DType x(sample[i]);
+      const DType lpdf((lgamma(x + l) - lgamma(x + 1) - lgamma_l) + l * log(p) + x * log(1 - p));
+      out[i] = logpdf ? lpdf : DType(exp(lpdf));
     }
   }
 
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType LPDF(DType l, DType p, DType x) {
     // Note that "p" is the failure and not the success probability.
     return (lgamma(x + l) - lgamma(x + 1) - lgamma(l)) + l * log(p) + x * log(1 - p);
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_NegativeBinomial_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *limit, IType2 *prob,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_limit, IType2 *grad_prob) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* limit,
+                                  IType2* prob,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_limit,
+                                  IType2* grad_prob) {
     const index_t index(start / sample_size);
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        DType grad_l(0), grad_p(0);
-        LPDF_GRAD(DType(limit[index]), DType(prob[index]),
-                  DType(sample[i]), out[i],
-                  grad_out[i], &grad_l, &grad_p);
-        grad_limit[i]  = grad_l;
-        grad_prob[i]   = grad_p;
-        KERNEL_ASSIGN(grad_sample[i], req, 0);
+      DType grad_l(0), grad_p(0);
+      LPDF_GRAD(DType(limit[index]),
+                DType(prob[index]),
+                DType(sample[i]),
+                out[i],
+                grad_out[i],
+                &grad_l,
+                &grad_p);
+      grad_limit[i] = grad_l;
+      grad_prob[i]  = grad_p;
+      KERNEL_ASSIGN(grad_sample[i], req, 0);
     }
   }
 
-  template<typename DType>
-  MSHADOW_XINLINE static void LPDF_GRAD(DType l, DType p, DType x, DType o, DType grad_o,
-                                        DType* grad_l, DType* grad_p) {
+  template <typename DType>
+  MSHADOW_XINLINE static void
+  LPDF_GRAD(DType l, DType p, DType x, DType o, DType grad_o, DType* grad_l, DType* grad_p) {
     const DType scaling(grad_o * (logpdf ? DType(1) : o));
     *grad_l = scaling * ((ceph_psi(x + l) - ceph_psi(l)) + log(p));
     *grad_p = scaling * (l / p - x / (1 - p));
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_GeneralizedNegativeBinomial {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                                  DType *out, IType1 *sample, IType2 *mu, IType2 *alpha) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* mu,
+                                  IType2* alpha) {
     const index_t index(start / sample_size);
 
     // Reparameterize with limit = 1 / alpha, prob = 1 / (mu * alpha + 1)
-    const DType limit(1.0 / alpha[index]), prob(1.0 / (mu[index]*alpha[index]+1.0));
+    const DType limit(1.0 / alpha[index]), prob(1.0 / (mu[index] * alpha[index] + 1.0));
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const DType lpdf(PDF_NegativeBinomial<logpdf>::LPDF(limit, prob, DType(sample[i])));
-        out[i] = logpdf ? lpdf : DType(exp(lpdf));
+      const DType lpdf(PDF_NegativeBinomial<logpdf>::LPDF(limit, prob, DType(sample[i])));
+      out[i] = logpdf ? lpdf : DType(exp(lpdf));
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_GeneralizedNegativeBinomial_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, OpReqType req,
-                  DType *out, IType1 *sample, IType2 *mu, IType2 *alpha,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_mu, IType2 *grad_alpha) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* mu,
+                                  IType2* alpha,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_mu,
+                                  IType2* grad_alpha) {
     const index_t index(start / sample_size);
     const DType fmu(mu[index]), falpha(alpha[index]), den(fmu * falpha + 1.0);
 
@@ -309,74 +406,83 @@ struct PDF_GeneralizedNegativeBinomial_Grad {
 
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        // Grad returned as d_limit, d_prob
-        DType grad_l(0), grad_p(0);
-        PDF_NegativeBinomial_Grad<logpdf>::LPDF_GRAD(limit, prob,
-            DType(sample[i]), out[i],
-            grad_out[i], &grad_l, &grad_p);
-        grad_mu[i]     = -grad_p * falpha / (den * den);
-        grad_alpha[i]  = -grad_l / (falpha * falpha) - grad_p * fmu / (den * den);
-        KERNEL_ASSIGN(grad_sample[i], req, 0);
+      // Grad returned as d_limit, d_prob
+      DType grad_l(0), grad_p(0);
+      PDF_NegativeBinomial_Grad<logpdf>::LPDF_GRAD(
+          limit, prob, DType(sample[i]), out[i], grad_out[i], &grad_l, &grad_p);
+      grad_mu[i]    = -grad_p * falpha / (den * den);
+      grad_alpha[i] = -grad_l / (falpha * falpha) - grad_p * fmu / (den * den);
+      KERNEL_ASSIGN(grad_sample[i], req, 0);
     }
   }
 };
 
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Dirichlet {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size, index_t k,
-                                  DType *out, IType1 *sample, IType2 *alpha) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  index_t k,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* alpha) {
     const index_t index(start / sample_size);
     const index_t end = start + length;
     for (index_t i = start; i < end; ++i) {
-        const IType1 *cur_sample = sample + i * k;
-        const IType2 *cur_alpha  = alpha + index * k;
-        DType sum_alpha(0), sum_lgamma(0), sum_sample(0);
-        for (index_t j = 0; j < k; ++j) {
-          sum_alpha  += cur_alpha[j];
-          sum_lgamma += lgamma(cur_alpha[j]);
-          sum_sample += (cur_alpha[j]-1) * log(cur_sample[j]);
-        }
-        DType lpdf(sum_sample + (lgamma(sum_alpha) - sum_lgamma));
-        out[i] = logpdf ? lpdf : DType(exp(lpdf));
+      const IType1* cur_sample = sample + i * k;
+      const IType2* cur_alpha  = alpha + index * k;
+      DType sum_alpha(0), sum_lgamma(0), sum_sample(0);
+      for (index_t j = 0; j < k; ++j) {
+        sum_alpha += cur_alpha[j];
+        sum_lgamma += lgamma(cur_alpha[j]);
+        sum_sample += (cur_alpha[j] - 1) * log(cur_sample[j]);
+      }
+      DType lpdf(sum_sample + (lgamma(sum_alpha) - sum_lgamma));
+      out[i] = logpdf ? lpdf : DType(exp(lpdf));
     }
   }
 };
 
-
-template<bool logpdf>
+template <bool logpdf>
 struct PDF_Dirichlet_Grad {
-  template<typename DType, typename IType1, typename IType2>
-  MSHADOW_XINLINE static void Map(index_t start, index_t length, index_t sample_size,
-                  OpReqType req, index_t k,
-                  DType *out, IType1 *sample, IType2 *alpha,
-                  DType *grad_out, IType1 *grad_sample, IType2 *grad_alpha
-                  ) {
+  template <typename DType, typename IType1, typename IType2>
+  MSHADOW_XINLINE static void Map(index_t start,
+                                  index_t length,
+                                  index_t sample_size,
+                                  OpReqType req,
+                                  index_t k,
+                                  DType* out,
+                                  IType1* sample,
+                                  IType2* alpha,
+                                  DType* grad_out,
+                                  IType1* grad_sample,
+                                  IType2* grad_alpha) {
     const index_t index(start / sample_size);
     const index_t end = start + length;
 
     for (index_t i = start; i < end; ++i) {
-        // Digamma function
-        const IType1 *cur_sample = sample + i * k;
-        const IType2 *cur_alpha = alpha + index * k;
-
-        const DType scaling(grad_out[i]*(logpdf ? DType(1) : out[i]));
-        DType sum_alpha(0);
-        for (index_t j = 0; j < k; ++j) {
-          sum_alpha += cur_alpha[j];
-        }
-        const DType psi_sum(ceph_psi(sum_alpha));
-
-        for (index_t j = 0; j < k; ++j) {
-          size_t grad_alpha_index = i%sample_size + sample_size * (j + k * index);
-          size_t grad_sample_index = i * k + j;
-
-          // order grad_alpha differently to allow efficient reduction at the end.
-          grad_alpha[grad_alpha_index] =
+      // Digamma function
+      const IType1* cur_sample = sample + i * k;
+      const IType2* cur_alpha  = alpha + index * k;
+
+      const DType scaling(grad_out[i] * (logpdf ? DType(1) : out[i]));
+      DType sum_alpha(0);
+      for (index_t j = 0; j < k; ++j) {
+        sum_alpha += cur_alpha[j];
+      }
+      const DType psi_sum(ceph_psi(sum_alpha));
+
+      for (index_t j = 0; j < k; ++j) {
+        size_t grad_alpha_index  = i % sample_size + sample_size * (j + k * index);
+        size_t grad_sample_index = i * k + j;
+
+        // order grad_alpha differently to allow efficient reduction at the end.
+        grad_alpha[grad_alpha_index] =
             scaling * (log(cur_sample[j]) + (psi_sum - ceph_psi(cur_alpha[j])));
-          KERNEL_ASSIGN(grad_sample[grad_sample_index],
-            req, scaling * (cur_alpha[j]-1) / cur_sample[j]);
-        }
+        KERNEL_ASSIGN(
+            grad_sample[grad_sample_index], req, scaling * (cur_alpha[j] - 1) / cur_sample[j]);
+      }
     }
   }
 };
@@ -384,30 +490,30 @@ struct PDF_Dirichlet_Grad {
 struct PdfParam : public dmlc::Parameter<PdfParam> {
   bool is_log;
   DMLC_DECLARE_PARAMETER(PdfParam) {
-    DMLC_DECLARE_FIELD(is_log).set_default(false)
-    .describe("If set, compute the density of the log-probability instead of the probability.");
+    DMLC_DECLARE_FIELD(is_log).set_default(false).describe(
+        "If set, compute the density of the log-probability instead of the probability.");
   }
 };
 
-template<bool vparm = false>
+template <bool vparm = false>
 inline bool PdfOpShape(const nnvm::NodeAttrs& attrs,
                        std::vector<TShape>* in_attrs,
                        std::vector<TShape>* out_attrs) {
-  CHECK_GT(in_attrs->size(), 1)
-    << "pdf operator takes at least 2 arguments (" << in_attrs->size() << " given)";
+  CHECK_GT(in_attrs->size(), 1) << "pdf operator takes at least 2 arguments (" << in_attrs->size()
+                                << " given)";
   CHECK_EQ(out_attrs->size(), 1);
   // All inputs must be defined in order to infer output shape.
-  if ( std::all_of((*in_attrs).begin(),
-                   (*in_attrs).end(),
-                   [](const TShape& s){ return s.ndim() > 0; }) ) {
+  if (std::all_of(
+          (*in_attrs).begin(), (*in_attrs).end(), [](const TShape& s) { return s.ndim() > 0; })) {
     // Tensors of distribution parameters must have same shape.
     for (size_t i = 2; i < in_attrs->size(); ++i) {
       SHAPE_ASSIGN_CHECK(*in_attrs, i, (*in_attrs)[i - 1]);
     }
     // Tensors of distribution parameters must match leftmost subshape of samples.
     CHECK_LE((*in_attrs)[1].ndim(), (*in_attrs)[0].ndim())
-      << "dimension of input samples (" << (*in_attrs)[0].ndim()
-      << ") must be at least dimension of distribution parameters ("<< (*in_attrs)[1].ndim() << ")";
+        << "dimension of input samples (" << (*in_attrs)[0].ndim()
+        << ") must be at least dimension of distribution parameters (" << (*in_attrs)[1].ndim()
+        << ")";
     TShape tshape((*in_attrs)[0].begin(), (*in_attrs)[0].begin() + (*in_attrs)[1].ndim());
     if (vparm) {
       *(tshape.end() - 1) = *((*in_attrs)[0].end() - 1);
@@ -430,17 +536,19 @@ inline bool PdfOpShape(const nnvm::NodeAttrs& attrs,
   return false;
 }
 
-template<typename OP>
+template <typename OP>
 struct LaunchExWrapper {
-  template<typename ...Args>
-  MSHADOW_XINLINE static void Map(const index_t start, const index_t length,
-                                  const index_t sample_size, Args... args) {
+  template <typename... Args>
+  MSHADOW_XINLINE static void Map(const index_t start,
+                                  const index_t length,
+                                  const index_t sample_size,
+                                  Args... args) {
     // Apply the operator to the sample in strides of sample_size, so that
     // the operators can assume that their distribution parameters are constant.
     index_t i = start;
 
     // Get aligned
-    const index_t align_step = sample_size - (i % sample_size);
+    const index_t align_step   = sample_size - (i % sample_size);
     const index_t first_stride = length > align_step ? align_step : length;
     OP::Map(i, first_stride, sample_size, args...);
     i += first_stride;
@@ -458,54 +566,66 @@ struct LaunchExWrapper {
   }
 };
 
-template<typename xpu, typename DType, typename pdf, int pnum, bool vparm = false>
+template <typename xpu, typename DType, typename pdf, int pnum, bool vparm = false>
 struct PdfCaller;
 
-template<typename xpu, typename DType, typename pdf>
+template <typename xpu, typename DType, typename pdf>
 struct PdfCaller<xpu, DType, pdf, 1, false> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
-                 mshadow::Stream<xpu> *s) {
-    CHECK_EQ(inputs[0].Size()%inputs[1].Size(), 0);
-    CHECK_EQ(inputs[0].Size()%outputs[0].Size(), 0);
+                 mshadow::Stream<xpu>* s) {
+    CHECK_EQ(inputs[0].Size() % inputs[1].Size(), 0);
+    CHECK_EQ(inputs[0].Size() % outputs[0].Size(), 0);
     index_t num_samples(inputs[0].Size() / inputs[1].Size());
-    mxnet_op::Kernel<LaunchExWrapper<pdf>, xpu>::LaunchEx(s, outputs[0].Size(), num_samples,
-                outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
+    mxnet_op::Kernel<LaunchExWrapper<pdf>, xpu>::LaunchEx(s,
+                                                          outputs[0].Size(),
+                                                          num_samples,
+                                                          outputs[0].dptr<DType>(),
+                                                          inputs[0].dptr<DType>(),
+                                                          inputs[1].dptr<DType>());
   }
 };
 
-template<typename xpu, typename DType, typename pdf>
+template <typename xpu, typename DType, typename pdf>
 struct PdfCaller<xpu, DType, pdf, 1, true> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
-                 mshadow::Stream<xpu> *s) {
-    CHECK_EQ(inputs[0].Size()%inputs[1].Size(), 0);
-    CHECK_EQ(inputs[0].Size()%outputs[0].Size(), 0);
+                 mshadow::Stream<xpu>* s) {
+    CHECK_EQ(inputs[0].Size() % inputs[1].Size(), 0);
+    CHECK_EQ(inputs[0].Size() % outputs[0].Size(), 0);
     index_t num_samples(inputs[0].Size() / inputs[1].Size());
     index_t sample_size(inputs[0].Size() / outputs[0].Size());
 
     // Covers distributions parametrized by a vector of parameters (Dirichlet distribution).
-    mxnet_op::Kernel<LaunchExWrapper<pdf>, xpu>::LaunchEx(s, outputs[0].Size(),
-                num_samples, sample_size,
-                outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
+    mxnet_op::Kernel<LaunchExWrapper<pdf>, xpu>::LaunchEx(s,
+                                                          outputs[0].Size(),
+                                                          num_samples,
+                                                          sample_size,
+                                                          outputs[0].dptr<DType>(),
+                                                          inputs[0].dptr<DType>(),
+                                                          inputs[1].dptr<DType>());
   }
 };
 
-template<typename xpu, typename DType, typename pdf>
+template <typename xpu, typename DType, typename pdf>
 struct PdfCaller<xpu, DType, pdf, 2, false> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
-                 mshadow::Stream<xpu> *s) {
-    CHECK_EQ(inputs[0].Size()%inputs[1].Size(), 0);
+                 mshadow::Stream<xpu>* s) {
+    CHECK_EQ(inputs[0].Size() % inputs[1].Size(), 0);
     CHECK_EQ(inputs[0].Size(), outputs[0].Size());
     index_t num_samples(inputs[0].Size() / inputs[1].Size());
-    mxnet_op::Kernel<LaunchExWrapper<pdf>, xpu>::LaunchEx(s, outputs[0].Size(), num_samples,
-                outputs[0].dptr<DType>(), inputs[0].dptr<DType>(),
-                inputs[1].dptr<DType>(), inputs[2].dptr<DType>());
+    mxnet_op::Kernel<LaunchExWrapper<pdf>, xpu>::LaunchEx(s,
+                                                          outputs[0].Size(),
+                                                          num_samples,
+                                                          outputs[0].dptr<DType>(),
+                                                          inputs[0].dptr<DType>(),
+                                                          inputs[1].dptr<DType>(),
+                                                          inputs[2].dptr<DType>());
   }
 };
 
-template<typename xpu, template<bool> class pdf, int pnum, bool vparm>
+template <typename xpu, template <bool> class pdf, int pnum, bool vparm>
 void PdfOpForward(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
@@ -520,10 +640,10 @@ void PdfOpForward(const nnvm::NodeAttrs& attrs,
     return;
   }
 
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const PdfParam& param = nnvm::get<PdfParam>(attrs.parsed);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const PdfParam& param   = nnvm::get<PdfParam>(attrs.parsed);
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    if ( param.is_log ) {
+    if (param.is_log) {
       PdfCaller<xpu, DType, pdf<true>, pnum, vparm>::op(inputs, outputs, s);
     } else {
       PdfCaller<xpu, DType, pdf<false>, pnum, vparm>::op(inputs, outputs, s);
@@ -531,55 +651,74 @@ void PdfOpForward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-
-template<typename xpu, typename DType, typename pdfgrad, int pnum, int vparm = false>
+template <typename xpu, typename DType, typename pdfgrad, int pnum, int vparm = false>
 struct PdfGradCaller;
 
-template<typename xpu, typename DType, typename pdfgrad>
+template <typename xpu, typename DType, typename pdfgrad>
 struct PdfGradCaller<xpu, DType, pdfgrad, 1, false> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<OpReqType>& req,
                  const std::vector<TBlob>& grads,
-                 mshadow::Stream<xpu> *s) {
+                 mshadow::Stream<xpu>* s) {
     index_t num_samples(inputs[1].Size() / inputs[2].Size());
-    mxnet_op::Kernel<LaunchExWrapper<pdfgrad>, xpu>::LaunchEx(s, inputs[0].Size(),
-                num_samples, req[0],
-                inputs[3].dptr<DType>(), inputs[1].dptr<DType>(), inputs[2].dptr<DType>(),
-                inputs[0].dptr<DType>(), grads[0].dptr<DType>(), grads[1].dptr<DType>());
+    mxnet_op::Kernel<LaunchExWrapper<pdfgrad>, xpu>::LaunchEx(s,
+                                                              inputs[0].Size(),
+                                                              num_samples,
+                                                              req[0],
+                                                              inputs[3].dptr<DType>(),
+                                                              inputs[1].dptr<DType>(),
+                                                              inputs[2].dptr<DType>(),
+                                                              inputs[0].dptr<DType>(),
+                                                              grads[0].dptr<DType>(),
+                                                              grads[1].dptr<DType>());
   }
 };
 
-template<typename xpu, typename DType, typename pdfgrad>
+template <typename xpu, typename DType, typename pdfgrad>
 struct PdfGradCaller<xpu, DType, pdfgrad, 1, true> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<OpReqType>& req,
                  const std::vector<TBlob>& grads,
-                 mshadow::Stream<xpu> *s) {
+                 mshadow::Stream<xpu>* s) {
     index_t num_samples(inputs[1].Size() / inputs[2].Size());
     index_t sample_size(inputs[1].Size() / inputs[0].Size());
-    mxnet_op::Kernel<LaunchExWrapper<pdfgrad>, xpu>::LaunchEx(s, inputs[0].Size(), num_samples,
-                req[0], sample_size,
-                inputs[3].dptr<DType>(), inputs[1].dptr<DType>(), inputs[2].dptr<DType>(),
-                inputs[0].dptr<DType>(), grads[0].dptr<DType>(), grads[1].dptr<DType>());
+    mxnet_op::Kernel<LaunchExWrapper<pdfgrad>, xpu>::LaunchEx(s,
+                                                              inputs[0].Size(),
+                                                              num_samples,
+                                                              req[0],
+                                                              sample_size,
+                                                              inputs[3].dptr<DType>(),
+                                                              inputs[1].dptr<DType>(),
+                                                              inputs[2].dptr<DType>(),
+                                                              inputs[0].dptr<DType>(),
+                                                              grads[0].dptr<DType>(),
+                                                              grads[1].dptr<DType>());
   }
 };
 
-template<typename xpu, typename DType, typename pdfgrad>
+template <typename xpu, typename DType, typename pdfgrad>
 struct PdfGradCaller<xpu, DType, pdfgrad, 2, false> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<OpReqType>& req,
                  const std::vector<TBlob>& grads,
-                 mshadow::Stream<xpu> *s) {
+                 mshadow::Stream<xpu>* s) {
     index_t num_samples(inputs[1].Size() / inputs[2].Size());
-    mxnet_op::Kernel<LaunchExWrapper<pdfgrad>, xpu>::LaunchEx(s, inputs[0].Size(),
-                num_samples, req[0],
-                inputs[4].dptr<DType>(), inputs[1].dptr<DType>(), inputs[2].dptr<DType>(),
-                inputs[3].dptr<DType>(), inputs[0].dptr<DType>(),
-                grads[0].dptr<DType>(), grads[1].dptr<DType>(), grads[2].dptr<DType>());
+    mxnet_op::Kernel<LaunchExWrapper<pdfgrad>, xpu>::LaunchEx(s,
+                                                              inputs[0].Size(),
+                                                              num_samples,
+                                                              req[0],
+                                                              inputs[4].dptr<DType>(),
+                                                              inputs[1].dptr<DType>(),
+                                                              inputs[2].dptr<DType>(),
+                                                              inputs[3].dptr<DType>(),
+                                                              inputs[0].dptr<DType>(),
+                                                              grads[0].dptr<DType>(),
+                                                              grads[1].dptr<DType>(),
+                                                              grads[2].dptr<DType>());
   }
 };
 
-template<typename xpu, template<bool> class pdfgrad, int pnum, bool vparm>
+template <typename xpu, template <bool> class pdfgrad, int pnum, bool vparm>
 void PdfOpBackward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -588,24 +727,29 @@ void PdfOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), pnum + 3);
   CHECK_EQ(outputs.size(), pnum + 1);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const PdfParam& param = nnvm::get<PdfParam>(attrs.parsed);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const PdfParam& param   = nnvm::get<PdfParam>(attrs.parsed);
   const size_t N(outputs[1].Size());
   const TShape src_shape(Shape2(N, outputs[0].Size() / N)), dst_shape(Shape2(N, 1));
-  const size_t red_work_size(broadcast::ReduceWorkspaceSize(
-          s, dst_shape, kAddTo, src_shape));
+  const size_t red_work_size(broadcast::ReduceWorkspaceSize(s, dst_shape, kAddTo, src_shape));
 #if !defined(__CUDACC__)
   // Inputs to PdfOpBackward: grad, samples, parm1, parm2, pdf.
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     const size_t tmp_size(outputs[0].Size() * pnum * sizeof(DType) + red_work_size);
     Tensor<xpu, 1, char> tmp_space =
-            ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tmp_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tmp_size), s);
     std::vector<TBlob> grads = {outputs[0]};
-    grads.push_back(TBlob(tmp_space.dptr_, outputs[0].shape_,
-                          outputs[1].dev_mask(), outputs[1].type_flag_, outputs[1].dev_id()));
+    grads.push_back(TBlob(tmp_space.dptr_,
+                          outputs[0].shape_,
+                          outputs[1].dev_mask(),
+                          outputs[1].type_flag_,
+                          outputs[1].dev_id()));
     if (pnum == 2) {
-      grads.push_back(TBlob(tmp_space.dptr_ + outputs[0].Size() * sizeof(DType), outputs[0].shape_,
-                            outputs[2].dev_mask(), outputs[2].type_flag_, outputs[2].dev_id()));
+      grads.push_back(TBlob(tmp_space.dptr_ + outputs[0].Size() * sizeof(DType),
+                            outputs[0].shape_,
+                            outputs[2].dev_mask(),
+                            outputs[2].type_flag_,
+                            outputs[2].dev_id()));
     }
     if (param.is_log) {
       PdfGradCaller<xpu, DType, pdfgrad<true>, pnum, vparm>::op(inputs, req, grads, s);
@@ -613,12 +757,12 @@ void PdfOpBackward(const nnvm::NodeAttrs& attrs,
       PdfGradCaller<xpu, DType, pdfgrad<false>, pnum, vparm>::op(inputs, req, grads, s);
     }
     Tensor<xpu, 1, char> red_work(
-            tmp_space.dptr_ + pnum * outputs[0].Size() * sizeof(DType), Shape1(red_work_size), s);
+        tmp_space.dptr_ + pnum * outputs[0].Size() * sizeof(DType), Shape1(red_work_size), s);
     broadcast::Reduce<red::sum, 2, DType, op::mshadow_op::identity>(
-       s, outputs[1].reshape(dst_shape), req[1], red_work, grads[1].reshape(src_shape));
+        s, outputs[1].reshape(dst_shape), req[1], red_work, grads[1].reshape(src_shape));
     if (pnum == 2) {
       broadcast::Reduce<red::sum, 2, DType, op::mshadow_op::identity>(
-       s, outputs[2].reshape(dst_shape), req[2], red_work, grads[2].reshape(src_shape));
+          s, outputs[2].reshape(dst_shape), req[2], red_work, grads[2].reshape(src_shape));
     }
   });
 #else
@@ -626,13 +770,19 @@ void PdfOpBackward(const nnvm::NodeAttrs& attrs,
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     const size_t tmp_size(outputs[0].Size() * pnum * sizeof(DType) + red_work_size);
     Tensor<xpu, 1, char> tmp_space =
-            ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tmp_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(tmp_size), s);
     std::vector<TBlob> grads = {outputs[0]};
-    grads.push_back(TBlob(tmp_space.dptr_, outputs[0].shape_,
-                          outputs[1].dev_mask(), outputs[1].type_flag_, outputs[1].dev_id()));
+    grads.push_back(TBlob(tmp_space.dptr_,
+                          outputs[0].shape_,
+                          outputs[1].dev_mask(),
+                          outputs[1].type_flag_,
+                          outputs[1].dev_id()));
     if (pnum == 2) {
-      grads.push_back(TBlob(tmp_space.dptr_ + outputs[0].Size() * sizeof(DType), outputs[0].shape_,
-                            outputs[2].dev_mask(), outputs[2].type_flag_, outputs[2].dev_id()));
+      grads.push_back(TBlob(tmp_space.dptr_ + outputs[0].Size() * sizeof(DType),
+                            outputs[0].shape_,
+                            outputs[2].dev_mask(),
+                            outputs[2].type_flag_,
+                            outputs[2].dev_id()));
     }
     if (param.is_log) {
       PdfGradCaller<xpu, DType, pdfgrad<true>, pnum, vparm>::op(inputs, req, grads, s);
@@ -640,12 +790,24 @@ void PdfOpBackward(const nnvm::NodeAttrs& attrs,
       PdfGradCaller<xpu, DType, pdfgrad<false>, pnum, vparm>::op(inputs, req, grads, s);
     }
     Tensor<xpu, 1, char> red_work(
-            tmp_space.dptr_ + pnum * outputs[0].Size() * sizeof(DType), Shape1(red_work_size), s);
-    broadcast::RTCReduce(ctx, outputs[1].reshape(dst_shape), req[1], red_work,
-                         grads[1].reshape(src_shape), "red::sum{}", 2, "identity");
+        tmp_space.dptr_ + pnum * outputs[0].Size() * sizeof(DType), Shape1(red_work_size), s);
+    broadcast::RTCReduce(ctx,
+                         outputs[1].reshape(dst_shape),
+                         req[1],
+                         red_work,
+                         grads[1].reshape(src_shape),
+                         "red::sum{}",
+                         2,
+                         "identity");
     if (pnum == 2) {
-      broadcast::RTCReduce(ctx, outputs[2].reshape(dst_shape), req[2], red_work,
-                           grads[2].reshape(src_shape), "red::sum{}", 2, "identity");
+      broadcast::RTCReduce(ctx,
+                           outputs[2].reshape(dst_shape),
+                           req[2],
+                           red_work,
+                           grads[2].reshape(src_shape),
+                           "red::sum{}",
+                           2,
+                           "identity");
     }
   });
 
diff --git a/src/operator/random/sample_multinomial_op.cc b/src/operator/random/sample_multinomial_op.cc
index f0aa246ecae6..5d9304260097 100644
--- a/src/operator/random/sample_multinomial_op.cc
+++ b/src/operator/random/sample_multinomial_op.cc
@@ -29,11 +29,10 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(SampleMultinomialParam);
 
-
 NNVM_REGISTER_OP(_sample_multinomial)
-.add_alias("sample_multinomial")
-.add_alias("_npx__random_categorical")
-.describe(R"code(Concurrent sampling from multiple multinomial distributions.
+    .add_alias("sample_multinomial")
+    .add_alias("_npx__random_categorical")
+    .describe(R"code(Concurrent sampling from multiple multinomial distributions.
 
 *data* is an *n* dimensional array whose last dimension has length *k*, where
 *k* is the number of possible outcomes of each multinomial distribution. This
@@ -62,54 +61,55 @@ Examples::
    // requests log likelihood
    sample_multinomial(probs, get_prob=True) = [2, 1], [0.2, 0.3]
 )code")
-.set_num_inputs(1)
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const SampleMultinomialParam& param = nnvm::get<SampleMultinomialParam>(attrs.parsed);
-    return param.get_prob ? 2U : 1U;
-  })
-.set_attr_parser(ParamParser<SampleMultinomialParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", SampleMultinomialOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SampleMultinomialOpType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-      return std::vector<ResourceRequest>{
-        ResourceRequest::kRandom, ResourceRequest::kTempSpace};
+    .set_num_inputs(1)
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const SampleMultinomialParam& param = nnvm::get<SampleMultinomialParam>(attrs.parsed);
+      return param.get_prob ? 2U : 1U;
     })
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    const SampleMultinomialParam& param = nnvm::get<SampleMultinomialParam>(n->attrs.parsed);
-    if (param.get_prob) {
-      return MakeGradNode("_backward_sample_multinomial", n,
-                          {ograds[1], n->inputs[0], nnvm::NodeEntry{n, 0, 0}},
-                          std::unordered_map<std::string, std::string>());
-    } else {
-      return MakeZeroGradNodes(n, ograds);
-    }
-  })
-.set_attr<FCompute>("FCompute<cpu>", SampleMultinomialForward<cpu>)
-.add_argument("data", "NDArray-or-Symbol",
-              "Distribution probabilities. Must sum to one on the last axis.")
-.add_arguments(SampleMultinomialParam::__FIELDS__());
-
+    .set_attr_parser(ParamParser<SampleMultinomialParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", SampleMultinomialOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SampleMultinomialOpType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const SampleMultinomialParam& param = nnvm::get<SampleMultinomialParam>(n->attrs.parsed);
+          if (param.get_prob) {
+            return MakeGradNode("_backward_sample_multinomial",
+                                n,
+                                {ograds[1], n->inputs[0], nnvm::NodeEntry{n, 0, 0}},
+                                std::unordered_map<std::string, std::string>());
+          } else {
+            return MakeZeroGradNodes(n, ograds);
+          }
+        })
+    .set_attr<FCompute>("FCompute<cpu>", SampleMultinomialForward<cpu>)
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "Distribution probabilities. Must sum to one on the last axis.")
+    .add_arguments(SampleMultinomialParam::__FIELDS__());
 
 struct SampleMultinomialBackwardCPUKernel {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, index_t K, index_t M,
-                                  DType* ograd, DType* dist, IType* out,
-                                  DType* igrad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void
+  Map(int i, index_t K, index_t M, DType* ograd, DType* dist, IType* out, DType* igrad) {
     for (index_t j = 0; j < M; ++j) {
-      igrad[i*K + static_cast<size_t>(out[i*M + j])] +=
-        ograd[i*M + j] / dist[i*K + static_cast<size_t>(out[i*M + j])];
+      igrad[i * K + static_cast<size_t>(out[i * M + j])] +=
+          ograd[i * M + j] / dist[i * K + static_cast<size_t>(out[i * M + j])];
     }
   }
 };
 
 NNVM_REGISTER_OP(_backward_sample_multinomial)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>",
-  SampleMultinomialBackward<SampleMultinomialBackwardCPUKernel, cpu>);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        SampleMultinomialBackward<SampleMultinomialBackwardCPUKernel, cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/sample_multinomial_op.cu b/src/operator/random/sample_multinomial_op.cu
index 039b9d155972..aecbdc8fe46b 100644
--- a/src/operator/random/sample_multinomial_op.cu
+++ b/src/operator/random/sample_multinomial_op.cu
@@ -28,26 +28,22 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_sample_multinomial)
-.set_attr<FCompute>("FCompute<gpu>", SampleMultinomialForward<gpu>);
-
+    .set_attr<FCompute>("FCompute<gpu>", SampleMultinomialForward<gpu>);
 
 struct SampleMultinomialBackwardGPUKernel {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, index_t K, index_t M,
-                                  DType* ograd, DType* dist, IType* out,
-                                  DType* igrad) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void
+  Map(int i, index_t K, index_t M, DType* ograd, DType* dist, IType* out, DType* igrad) {
     for (index_t j = 0; j < M; ++j) {
-      atomicAdd(&igrad[i*K + static_cast<size_t>(out[i*M + j])],
-        ograd[i*M + j] / dist[i*K + static_cast<size_t>(out[i*M + j])]);
+      atomicAdd(&igrad[i * K + static_cast<size_t>(out[i * M + j])],
+                ograd[i * M + j] / dist[i * K + static_cast<size_t>(out[i * M + j])]);
     }
   }
 };
 
-
 NNVM_REGISTER_OP(_backward_sample_multinomial)
-.set_attr<FCompute>("FCompute<gpu>",
-  SampleMultinomialBackward<SampleMultinomialBackwardGPUKernel, gpu>);
-
+    .set_attr<FCompute>("FCompute<gpu>",
+                        SampleMultinomialBackward<SampleMultinomialBackwardGPUKernel, gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/sample_multinomial_op.h b/src/operator/random/sample_multinomial_op.h
index e5ecadaf0c24..893f20a5f498 100644
--- a/src/operator/random/sample_multinomial_op.h
+++ b/src/operator/random/sample_multinomial_op.h
@@ -41,25 +41,23 @@ struct SampleMultinomialParam : public dmlc::Parameter<SampleMultinomialParam> {
   int dtype;
   DMLC_DECLARE_PARAMETER(SampleMultinomialParam) {
     DMLC_DECLARE_FIELD(shape)
-      .set_default(mxnet::TShape(0, 1))
-      .describe("Shape to be sampled from each random distribution.");
-    DMLC_DECLARE_FIELD(get_prob)
-    .set_default(false)
-    .describe("Whether to also return the log probability of sampled "
-          "result. This is usually used for differentiating through "
-          "stochastic variables, e.g. in reinforcement learning.");
+        .set_default(mxnet::TShape(0, 1))
+        .describe("Shape to be sampled from each random distribution.");
+    DMLC_DECLARE_FIELD(get_prob).set_default(false).describe(
+        "Whether to also return the log probability of sampled "
+        "result. This is usually used for differentiating through "
+        "stochastic variables, e.g. in reinforcement learning.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("uint8", mshadow::kUint8)
-    .add_enum("int32", mshadow::kInt32)
-    .add_enum("float16", mshadow::kFloat16)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .set_default(mshadow::kInt32)
-    .describe("DType of the output in case this can't be inferred.");
+        .add_enum("uint8", mshadow::kUint8)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .set_default(mshadow::kInt32)
+        .describe("DType of the output in case this can't be inferred.");
   }
 };
 
-
 inline bool SampleMultinomialOpShape(const nnvm::NodeAttrs& attrs,
                                      mxnet::ShapeVector* in_attrs,
                                      mxnet::ShapeVector* out_attrs) {
@@ -68,15 +66,18 @@ inline bool SampleMultinomialOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), param.get_prob ? 2U : 1U);
   const mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!ndim_is_known(ishape)) return false;
+  if (!ndim_is_known(ishape))
+    return false;
 
   if (ishape.ndim() == 1) {
     if (param.shape.ndim() > 0) {
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, param.shape);
-      if (param.get_prob) SHAPE_ASSIGN_CHECK(*out_attrs, 1, param.shape);
+      if (param.get_prob)
+        SHAPE_ASSIGN_CHECK(*out_attrs, 1, param.shape);
     } else {
       SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(1, 1));
-      if (param.get_prob) SHAPE_ASSIGN_CHECK(*out_attrs, 1, mxnet::TShape(1, 1));
+      if (param.get_prob)
+        SHAPE_ASSIGN_CHECK(*out_attrs, 1, mxnet::TShape(1, 1));
     }
     return true;
   }
@@ -89,14 +90,15 @@ inline bool SampleMultinomialOpShape(const nnvm::NodeAttrs& attrs,
     oshape[i + ishape.ndim() - 1] = param.shape[i];
   }
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
-  if (param.get_prob) SHAPE_ASSIGN_CHECK(*out_attrs, 1, oshape);
+  if (param.get_prob)
+    SHAPE_ASSIGN_CHECK(*out_attrs, 1, oshape);
   for (const auto& out_shape : *out_attrs) {
-    if (!shape_is_known(out_shape)) return false;
+    if (!shape_is_known(out_shape))
+      return false;
   }
   return true;
 }
 
-
 inline bool SampleMultinomialOpType(const nnvm::NodeAttrs& attrs,
                                     std::vector<int>* in_attrs,
                                     std::vector<int>* out_attrs) {
@@ -105,7 +107,8 @@ inline bool SampleMultinomialOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), param.get_prob ? 2U : 1U);
   int itype = (*in_attrs)[0];
-  if (itype == -1) return false;
+  if (itype == -1)
+    return false;
 
   TYPE_ASSIGN_CHECK(*out_attrs, 0, param.dtype);
   if (param.get_prob) {
@@ -115,37 +118,42 @@ inline bool SampleMultinomialOpType(const nnvm::NodeAttrs& attrs,
 }
 
 struct SampleMultinomialKernel {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t K, index_t M,
-                                  DType* dist, float* uniform, float* cum_table,
-                                  IType* out, DType* prob) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t K,
+                                  index_t M,
+                                  DType* dist,
+                                  float* uniform,
+                                  float* cum_table,
+                                  IType* out,
+                                  DType* prob) {
     double acc = 0.0;
     // CDF table
     for (index_t c = 0; c < K; ++c) {
-      acc += dist[i*K + c];
-      cum_table[i*K + c] = static_cast<float>(acc);
+      acc += dist[i * K + c];
+      cum_table[i * K + c] = static_cast<float>(acc);
     }
     for (index_t j = 0; j < M; ++j) {
       index_t left = 0, right = K;
       index_t middle = left + (right - left) / 2;
-      DType loc = static_cast<DType>(uniform[i*M + j]);
+      DType loc      = static_cast<DType>(uniform[i * M + j]);
       while (right - left > 0) {
-        middle = left + (right - left) / 2;
-        DType cum_prob = cum_table[i*K + middle];
+        middle         = left + (right - left) / 2;
+        DType cum_prob = cum_table[i * K + middle];
         if (cum_prob < loc) {
           left = middle + 1;
         } else {
           right = middle;
         }
       }
-      out[i*M + j] = static_cast<IType>(left);
-      if (prob != nullptr) prob[i*M + j] = logf(dist[i*K + left]);
+      out[i * M + j] = static_cast<IType>(left);
+      if (prob != nullptr)
+        prob[i * M + j] = logf(dist[i * K + left]);
     }
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void SampleMultinomialForward(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -155,28 +163,33 @@ void SampleMultinomialForward(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   const SampleMultinomialParam& param = nnvm::get<SampleMultinomialParam>(attrs.parsed);
 
-  index_t K = inputs[0].shape_[inputs[0].ndim()-1];
-  index_t N = inputs[0].Size()/K;
-  index_t M = outputs[0].Size()/N;
+  index_t K = inputs[0].shape_[inputs[0].ndim() - 1];
+  index_t N = inputs[0].Size() / K;
+  index_t M = outputs[0].Size() / N;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Random<xpu, float> *prnd = ctx.requested[0].get_random<xpu, float>(s);
+    Random<xpu, float>* prnd = ctx.requested[0].get_random<xpu, float>(s);
     Tensor<xpu, 1, float> workspace =
-      ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(N*M + N*K), s);
-    Tensor<xpu, 1, float> uniform(workspace.dptr_, Shape1(N*M));
+        ctx.requested[1].get_space_typed<xpu, 1, float>(Shape1(N * M + N * K), s);
+    Tensor<xpu, 1, float> uniform(workspace.dptr_, Shape1(N * M));
     prnd->SampleUniform(&uniform, 0, 1);
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, IType, {
       Kernel<SampleMultinomialKernel, xpu>::Launch(
-        s, N, K, M, inputs[0].dptr<DType>(), uniform.dptr_, workspace.dptr_ + N*M,
-        outputs[0].dptr<IType>(),
-        param.get_prob ? outputs[1].dptr<DType>() : nullptr);
+          s,
+          N,
+          K,
+          M,
+          inputs[0].dptr<DType>(),
+          uniform.dptr_,
+          workspace.dptr_ + N * M,
+          outputs[0].dptr<IType>(),
+          param.get_prob ? outputs[1].dptr<DType>() : nullptr);
     });
   });
 }
 
-
-template<typename kernel, typename xpu>
+template <typename kernel, typename xpu>
 void SampleMultinomialBackward(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
@@ -184,27 +197,32 @@ void SampleMultinomialBackward(const nnvm::NodeAttrs& attrs,
                                const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mxnet_op;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
-  index_t K = outputs[0].shape_[outputs[0].ndim()-1];
-  index_t N = outputs[0].Size()/K;
-  index_t M = inputs[0].Size()/N;
+  index_t K = outputs[0].shape_[outputs[0].ndim() - 1];
+  index_t N = outputs[0].Size() / K;
+  index_t M = inputs[0].Size() / N;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     if (req[0] != kAddTo) {
       Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
-      out = 0;
+      out                       = 0;
     }
     MSHADOW_TYPE_SWITCH(inputs[2].type_flag_, IType, {
-      Kernel<kernel, xpu>::Launch(
-        s, N, K, M, inputs[0].dptr<DType>(), inputs[1].dptr<DType>(),
-        inputs[2].dptr<IType>(), outputs[0].dptr<DType>());
+      Kernel<kernel, xpu>::Launch(s,
+                                  N,
+                                  K,
+                                  M,
+                                  inputs[0].dptr<DType>(),
+                                  inputs[1].dptr<DType>(),
+                                  inputs[2].dptr<IType>(),
+                                  outputs[0].dptr<DType>());
     });
   });
 }
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/random/sample_op.cc b/src/operator/random/sample_op.cc
index 01c21e54072e..6ea80bd07e0a 100644
--- a/src/operator/random/sample_op.cc
+++ b/src/operator/random/sample_op.cc
@@ -46,42 +46,42 @@ DMLC_REGISTER_PARAMETER(SamplePoissonLikeParam);
 DMLC_REGISTER_PARAMETER(SampleNegBinomialLikeParam);
 DMLC_REGISTER_PARAMETER(SampleGenNegBinomialLikeParam);
 
-#define MXNET_OPERATOR_REGISTER_SAMPLE(name, ParamType)                                      \
-  NNVM_REGISTER_OP(name)                                                                     \
-  .set_num_inputs(0)                                                                         \
-  .set_num_outputs(1)                                                                        \
-  .set_attr_parser(ParamParser<ParamType>)                                                   \
-  .set_attr<mxnet::FInferShape>("FInferShape", InitShape<ParamType>)                          \
-  .set_attr<nnvm::FInferType>("FInferType", SampleOpType<ParamType>)                \
-  .set_attr<FResourceRequest>("FResourceRequest", SampleResource)                            \
-  .add_arguments(ParamType::__FIELDS__())                                                    \
-  .set_attr<FInferStorageType>("FInferStorageType", InitStorageType<ParamType, true, false>) \
-  .set_attr<FCompute>("FCompute<cpu>", Sample_<cpu, ParamType>)                              \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", SampleEx_<cpu, ParamType>)
-
-#define MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(name, ParamType)                              \
-  NNVM_REGISTER_OP(name)                                                                  \
-  .set_num_inputs(1)                                                                      \
-  .set_num_outputs(1)                                                                     \
-  .set_attr_parser(ParamParser<ParamType>)                                                \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                        \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                           \
-  .set_attr<FResourceRequest>("FResourceRequest", SampleResource)                         \
-  .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",                                         \
-    [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 0); })                   \
-  .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                              \
-  .add_arguments(ParamType::__FIELDS__())                                                 \
-  .add_argument("data", "NDArray-or-Symbol", "The input")                                 \
-  .set_attr<FInferStorageType>("FInferStorageType",                                       \
-                               ElemwiseStorageType<1, 1, false, true, false>)             \
-  .set_attr<FCompute>("FCompute<cpu>", Sample_<cpu, ParamType>)                           \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", SampleEx_<cpu, ParamType>)
+#define MXNET_OPERATOR_REGISTER_SAMPLE(name, ParamType)                                          \
+  NNVM_REGISTER_OP(name)                                                                         \
+      .set_num_inputs(0)                                                                         \
+      .set_num_outputs(1)                                                                        \
+      .set_attr_parser(ParamParser<ParamType>)                                                   \
+      .set_attr<mxnet::FInferShape>("FInferShape", InitShape<ParamType>)                         \
+      .set_attr<nnvm::FInferType>("FInferType", SampleOpType<ParamType>)                         \
+      .set_attr<FResourceRequest>("FResourceRequest", SampleResource)                            \
+      .add_arguments(ParamType::__FIELDS__())                                                    \
+      .set_attr<FInferStorageType>("FInferStorageType", InitStorageType<ParamType, true, false>) \
+      .set_attr<FCompute>("FCompute<cpu>", Sample_<cpu, ParamType>)                              \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", SampleEx_<cpu, ParamType>)
+
+#define MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(name, ParamType)                                   \
+  NNVM_REGISTER_OP(name)                                                                       \
+      .set_num_inputs(1)                                                                       \
+      .set_num_outputs(1)                                                                      \
+      .set_attr_parser(ParamParser<ParamType>)                                                 \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                        \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                            \
+      .set_attr<FResourceRequest>("FResourceRequest", SampleResource)                          \
+      .set_attr<nnvm::FIgnoreInputs>(                                                          \
+          "FIgnoreInputs", [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 0); }) \
+      .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)                               \
+      .add_arguments(ParamType::__FIELDS__())                                                  \
+      .add_argument("data", "NDArray-or-Symbol", "The input")                                  \
+      .set_attr<FInferStorageType>("FInferStorageType",                                        \
+                                   ElemwiseStorageType<1, 1, false, true, false>)              \
+      .set_attr<FCompute>("FCompute<cpu>", Sample_<cpu, ParamType>)                            \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", SampleEx_<cpu, ParamType>)
 
 // Add "uniform" alias for backward compatibility
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_uniform, SampleUniformParam)
-.add_alias("uniform")
-.add_alias("random_uniform")
-.describe(R"code(Draw random samples from a uniform distribution.
+    .add_alias("uniform")
+    .add_alias("random_uniform")
+    .describe(R"code(Draw random samples from a uniform distribution.
 
 .. note:: The existing alias ``uniform`` is deprecated.
 
@@ -97,9 +97,9 @@ Example::
 
 // Add "normal" alias for backward compatibility
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_normal, SampleNormalParam)
-.add_alias("normal")
-.add_alias("random_normal")
-.describe(R"code(Draw random samples from a normal (Gaussian) distribution.
+    .add_alias("normal")
+    .add_alias("random_normal")
+    .describe(R"code(Draw random samples from a normal (Gaussian) distribution.
 
 .. note:: The existing alias ``normal`` is deprecated.
 
@@ -113,8 +113,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_gamma, SampleGammaParam)
-.add_alias("random_gamma")
-.describe(R"code(Draw random samples from a gamma distribution.
+    .add_alias("random_gamma")
+    .describe(R"code(Draw random samples from a gamma distribution.
 
 Samples are distributed according to a gamma distribution parametrized by *alpha* (shape) and *beta* (scale).
 
@@ -125,8 +125,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_exponential, SampleExponentialParam)
-.add_alias("random_exponential")
-.describe(R"code(Draw random samples from an exponential distribution.
+    .add_alias("random_exponential")
+    .describe(R"code(Draw random samples from an exponential distribution.
 
 Samples are distributed according to an exponential distribution parametrized by *lambda* (rate).
 
@@ -137,9 +137,9 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_poisson, SamplePoissonParam)
-.add_alias("random_poisson")
-.add_alias("_npx_scalar_poisson")
-.describe(R"code(Draw random samples from a Poisson distribution.
+    .add_alias("random_poisson")
+    .add_alias("_npx_scalar_poisson")
+    .describe(R"code(Draw random samples from a Poisson distribution.
 
 Samples are distributed according to a Poisson distribution parametrized by *lambda* (rate).
 Samples will always be returned as a floating point data type.
@@ -151,8 +151,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_negative_binomial, SampleNegBinomialParam)
-.add_alias("random_negative_binomial")
-.describe(R"code(Draw random samples from a negative binomial distribution.
+    .add_alias("random_negative_binomial")
+    .describe(R"code(Draw random samples from a negative binomial distribution.
 
 Samples are distributed according to a negative binomial distribution parametrized by
 *k* (limit of unsuccessful experiments) and *p* (failure probability in each experiment).
@@ -165,8 +165,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_generalized_negative_binomial, SampleGenNegBinomialParam)
-.add_alias("random_generalized_negative_binomial")
-.describe(R"code(Draw random samples from a generalized negative binomial distribution.
+    .add_alias("random_generalized_negative_binomial")
+    .describe(R"code(Draw random samples from a generalized negative binomial distribution.
 
 Samples are distributed according to a generalized negative binomial distribution parametrized by
 *mu* (mean) and *alpha* (dispersion). *alpha* is defined as *1/k* where *k* is the failure limit of the
@@ -180,9 +180,9 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE(_random_randint, SampleRandIntParam)
-.add_alias("random_randint")
-.add_alias("_npi_random_randint")
-.describe(R"code(Draw random samples from a discrete uniform distribution.
+    .add_alias("random_randint")
+    .add_alias("_npi_random_randint")
+    .describe(R"code(Draw random samples from a discrete uniform distribution.
 
 Samples are uniformly distributed over the half-open interval *[low, high)*
 (includes *low*, but excludes *high*).
@@ -197,7 +197,8 @@ Example::
 // *_like operators
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_uniform_like, SampleUniformLikeParam)
-.describe(R"code(Draw random samples from a uniform distribution according to the input array shape.
+    .describe(
+        R"code(Draw random samples from a uniform distribution according to the input array shape.
 
 Samples are uniformly distributed over the half-open interval *[low, high)*
 (includes *low*, but excludes *high*).
@@ -210,7 +211,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_normal_like, SampleNormalLikeParam)
-.describe(R"code(Draw random samples from a normal (Gaussian) distribution according to the input array shape.
+    .describe(
+        R"code(Draw random samples from a normal (Gaussian) distribution according to the input array shape.
 
 Samples are distributed according to a normal distribution parametrized by *loc* (mean) and *scale*
 (standard deviation).
@@ -222,7 +224,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_gamma_like, SampleGammaLikeParam)
-.describe(R"code(Draw random samples from a gamma distribution according to the input array shape.
+    .describe(
+        R"code(Draw random samples from a gamma distribution according to the input array shape.
 
 Samples are distributed according to a gamma distribution parametrized by *alpha* (shape) and *beta* (scale).
 
@@ -233,7 +236,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_exponential_like, SampleExponentialLikeParam)
-.describe(R"code(Draw random samples from an exponential distribution according to the input array shape.
+    .describe(
+        R"code(Draw random samples from an exponential distribution according to the input array shape.
 
 Samples are distributed according to an exponential distribution parametrized by *lambda* (rate).
 
@@ -244,7 +248,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_poisson_like, SamplePoissonLikeParam)
-.describe(R"code(Draw random samples from a Poisson distribution according to the input array shape.
+    .describe(
+        R"code(Draw random samples from a Poisson distribution according to the input array shape.
 
 Samples are distributed according to a Poisson distribution parametrized by *lambda* (rate).
 Samples will always be returned as a floating point data type.
@@ -256,7 +261,8 @@ Example::
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_negative_binomial_like, SampleNegBinomialLikeParam)
-.describe(R"code(Draw random samples from a negative binomial distribution according to the input array shape.
+    .describe(
+        R"code(Draw random samples from a negative binomial distribution according to the input array shape.
 
 Samples are distributed according to a negative binomial distribution parametrized by
 *k* (limit of unsuccessful experiments) and *p* (failure probability in each experiment).
@@ -270,7 +276,8 @@ Example::
 
 MXNET_OPERATOR_REGISTER_SAMPLE_LIKE(_random_generalized_negative_binomial_like,
                                     SampleGenNegBinomialLikeParam)
-.describe(R"code(Draw random samples from a generalized negative binomial distribution according to the
+    .describe(
+        R"code(Draw random samples from a generalized negative binomial distribution according to the
 input array shape.
 
 Samples are distributed according to a generalized negative binomial distribution parametrized by
diff --git a/src/operator/random/sample_op.cu b/src/operator/random/sample_op.cu
index 39ab55afc081..f2e13a644224 100644
--- a/src/operator/random/sample_op.cu
+++ b/src/operator/random/sample_op.cu
@@ -27,10 +27,10 @@
 namespace mxnet {
 namespace op {
 
-#define MXNET_OPERATOR_REGISTER_SAMPLE_GPU(name, ParamType)            \
-  NNVM_REGISTER_OP(name)                                               \
-  .set_attr<FCompute>("FCompute<gpu>", Sample_<gpu, ParamType>)        \
-  .set_attr<FComputeEx>("FComputeEx<gpu>", SampleEx_<gpu, ParamType>); \
+#define MXNET_OPERATOR_REGISTER_SAMPLE_GPU(name, ParamType)         \
+  NNVM_REGISTER_OP(name)                                            \
+      .set_attr<FCompute>("FCompute<gpu>", Sample_<gpu, ParamType>) \
+      .set_attr<FComputeEx>("FComputeEx<gpu>", SampleEx_<gpu, ParamType>);
 
 MXNET_OPERATOR_REGISTER_SAMPLE_GPU(_random_uniform, SampleUniformParam)
 MXNET_OPERATOR_REGISTER_SAMPLE_GPU(_random_normal, SampleNormalParam)
diff --git a/src/operator/random/sample_op.h b/src/operator/random/sample_op.h
index c5681a70353c..6bc60eb4c08f 100644
--- a/src/operator/random/sample_op.h
+++ b/src/operator/random/sample_op.h
@@ -39,7 +39,6 @@
 namespace mxnet {
 namespace op {
 
-
 struct SampleOpParam {
   mxnet::TShape shape;
   std::string ctx;
@@ -85,197 +84,177 @@ struct RandIntParam {
 };
 
 struct SampleUniformParam : public dmlc::Parameter<SampleUniformParam>,
-  UniformParam, SampleOpParam {
+                            UniformParam,
+                            SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleUniformParam) {
-    DMLC_DECLARE_FIELD(low).set_default(0.0f)
-    .describe("Lower bound of the distribution.");
-    DMLC_DECLARE_FIELD(high).set_default(1.0f)
-    .describe("Upper bound of the distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(low).set_default(0.0f).describe("Lower bound of the distribution.");
+    DMLC_DECLARE_FIELD(high).set_default(1.0f).describe("Upper bound of the distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
-struct SampleNormalParam : public dmlc::Parameter<SampleNormalParam>,
-  NormalParam, SampleOpParam {
+struct SampleNormalParam : public dmlc::Parameter<SampleNormalParam>, NormalParam, SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleNormalParam) {
-    DMLC_DECLARE_FIELD(loc).set_default(0.0f)
-    .describe("Mean of the distribution.");
-    DMLC_DECLARE_FIELD(scale).set_default(1.0f)
-    .describe("Standard deviation of the distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(loc).set_default(0.0f).describe("Mean of the distribution.");
+    DMLC_DECLARE_FIELD(scale).set_default(1.0f).describe("Standard deviation of the distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
-struct SampleGammaParam : public dmlc::Parameter<SampleGammaParam>,
-  GammaParam, SampleOpParam {
+struct SampleGammaParam : public dmlc::Parameter<SampleGammaParam>, GammaParam, SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleGammaParam) {
-    DMLC_DECLARE_FIELD(alpha).set_default(1.0f)
-    .describe("Alpha parameter (shape) of the gamma distribution.");
-    DMLC_DECLARE_FIELD(beta).set_default(1.0f)
-    .describe("Beta parameter (scale) of the gamma distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0f).describe(
+        "Alpha parameter (shape) of the gamma distribution.");
+    DMLC_DECLARE_FIELD(beta).set_default(1.0f).describe(
+        "Beta parameter (scale) of the gamma distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
 struct SampleExponentialParam : public dmlc::Parameter<SampleExponentialParam>,
-  ExponentialParam, SampleOpParam {
+                                ExponentialParam,
+                                SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleExponentialParam) {
-    DMLC_DECLARE_FIELD(lam).set_default(1.0f)
-    .describe("Lambda parameter (rate) of the exponential distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(lam).set_default(1.0f).describe(
+        "Lambda parameter (rate) of the exponential distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
 struct SamplePoissonParam : public dmlc::Parameter<SamplePoissonParam>,
-  PoissonParam, SampleOpParam {
+                            PoissonParam,
+                            SampleOpParam {
   DMLC_DECLARE_PARAMETER(SamplePoissonParam) {
-    DMLC_DECLARE_FIELD(lam).set_default(1.0f)
-    .describe("Lambda parameter (rate) of the Poisson distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(lam).set_default(1.0f).describe(
+        "Lambda parameter (rate) of the Poisson distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
 struct SampleNegBinomialParam : public dmlc::Parameter<SampleNegBinomialParam>,
-  NegBinomialParam, SampleOpParam {
+                                NegBinomialParam,
+                                SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleNegBinomialParam) {
-    DMLC_DECLARE_FIELD(k).set_default(1)
-    .describe("Limit of unsuccessful experiments.");
-    DMLC_DECLARE_FIELD(p).set_default(1.0f)
-    .describe("Failure probability in each experiment.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(k).set_default(1).describe("Limit of unsuccessful experiments.");
+    DMLC_DECLARE_FIELD(p).set_default(1.0f).describe("Failure probability in each experiment.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
 struct SampleGenNegBinomialParam : public dmlc::Parameter<SampleGenNegBinomialParam>,
-  GenNegBinomialParam, SampleOpParam {
+                                   GenNegBinomialParam,
+                                   SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleGenNegBinomialParam) {
-    DMLC_DECLARE_FIELD(mu).set_default(1.0f)
-    .describe("Mean of the negative binomial distribution.");
-    DMLC_DECLARE_FIELD(alpha).set_default(1.0f)
-    .describe("Alpha (dispersion) parameter of the negative binomial distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(mu).set_default(1.0f).describe(
+        "Mean of the negative binomial distribution.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0f).describe(
+        "Alpha (dispersion) parameter of the negative binomial distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .add_enum("float16", mshadow::kFloat16)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to float32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("float16", mshadow::kFloat16)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to float32 if not defined (dtype=None).");
   }
 };
 
 struct SampleRandIntParam : public dmlc::Parameter<SampleRandIntParam>,
-  RandIntParam, SampleOpParam {
+                            RandIntParam,
+                            SampleOpParam {
   DMLC_DECLARE_PARAMETER(SampleRandIntParam) {
-    DMLC_DECLARE_FIELD(low)
-    .describe("Lower bound of the distribution.");
-    DMLC_DECLARE_FIELD(high)
-    .describe("Upper bound of the distribution.");
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("Shape of the output.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              " Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(low).describe("Lower bound of the distribution.");
+    DMLC_DECLARE_FIELD(high).describe("Upper bound of the distribution.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("Shape of the output.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        " Only used for imperative calls.");
     DMLC_DECLARE_FIELD(dtype)
-    .add_enum("None", -1)
-    .add_enum("int32", mshadow::kInt32)
-    .add_enum("int64", mshadow::kInt64)
-    .set_default(-1)
-    .describe("DType of the output in case this can't be inferred. "
-              "Defaults to int32 if not defined (dtype=None).");
+        .add_enum("None", -1)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int64", mshadow::kInt64)
+        .set_default(-1)
+        .describe(
+            "DType of the output in case this can't be inferred. "
+            "Defaults to int32 if not defined (dtype=None).");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream low_s, high_s, dtype_s, shape_s;
@@ -283,149 +262,138 @@ struct SampleRandIntParam : public dmlc::Parameter<SampleRandIntParam>,
     high_s << high;
     dtype_s << dtype;
     shape_s << shape;
-    (*dict)["low"] = low_s.str();
-    (*dict)["high"] = high_s.str();
+    (*dict)["low"]   = low_s.str();
+    (*dict)["high"]  = high_s.str();
     (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
     (*dict)["shape"] = shape_s.str();
   }
 };
 
-struct SampleUniformLikeParam : public dmlc::Parameter<SampleUniformLikeParam>,
-  UniformParam {
+struct SampleUniformLikeParam : public dmlc::Parameter<SampleUniformLikeParam>, UniformParam {
   DMLC_DECLARE_PARAMETER(SampleUniformLikeParam) {
-    DMLC_DECLARE_FIELD(low).set_default(0.0f)
-    .describe("Lower bound of the distribution.");
-    DMLC_DECLARE_FIELD(high).set_default(1.0f)
-    .describe("Upper bound of the distribution.");
+    DMLC_DECLARE_FIELD(low).set_default(0.0f).describe("Lower bound of the distribution.");
+    DMLC_DECLARE_FIELD(high).set_default(1.0f).describe("Upper bound of the distribution.");
   }
 };
 
-struct SampleNormalLikeParam : public dmlc::Parameter<SampleNormalLikeParam>,
-  NormalParam {
+struct SampleNormalLikeParam : public dmlc::Parameter<SampleNormalLikeParam>, NormalParam {
   DMLC_DECLARE_PARAMETER(SampleNormalLikeParam) {
-    DMLC_DECLARE_FIELD(loc).set_default(0.0f)
-    .describe("Mean of the distribution.");
-    DMLC_DECLARE_FIELD(scale).set_default(1.0f)
-    .describe("Standard deviation of the distribution.");
+    DMLC_DECLARE_FIELD(loc).set_default(0.0f).describe("Mean of the distribution.");
+    DMLC_DECLARE_FIELD(scale).set_default(1.0f).describe("Standard deviation of the distribution.");
   }
 };
 
-struct SampleGammaLikeParam : public dmlc::Parameter<SampleGammaLikeParam>,
-  GammaParam {
+struct SampleGammaLikeParam : public dmlc::Parameter<SampleGammaLikeParam>, GammaParam {
   DMLC_DECLARE_PARAMETER(SampleGammaLikeParam) {
-    DMLC_DECLARE_FIELD(alpha).set_default(1.0f)
-    .describe("Alpha parameter (shape) of the gamma distribution.");
-    DMLC_DECLARE_FIELD(beta).set_default(1.0f)
-    .describe("Beta parameter (scale) of the gamma distribution.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0f).describe(
+        "Alpha parameter (shape) of the gamma distribution.");
+    DMLC_DECLARE_FIELD(beta).set_default(1.0f).describe(
+        "Beta parameter (scale) of the gamma distribution.");
   }
 };
 
 struct SampleExponentialLikeParam : public dmlc::Parameter<SampleExponentialLikeParam>,
-  ExponentialParam {
+                                    ExponentialParam {
   DMLC_DECLARE_PARAMETER(SampleExponentialLikeParam) {
-    DMLC_DECLARE_FIELD(lam).set_default(1.0f)
-    .describe("Lambda parameter (rate) of the exponential distribution.");
+    DMLC_DECLARE_FIELD(lam).set_default(1.0f).describe(
+        "Lambda parameter (rate) of the exponential distribution.");
   }
 };
 
-struct SamplePoissonLikeParam : public dmlc::Parameter<SamplePoissonLikeParam>,
-  PoissonParam {
+struct SamplePoissonLikeParam : public dmlc::Parameter<SamplePoissonLikeParam>, PoissonParam {
   DMLC_DECLARE_PARAMETER(SamplePoissonLikeParam) {
-    DMLC_DECLARE_FIELD(lam).set_default(1.0f)
-    .describe("Lambda parameter (rate) of the Poisson distribution.");
+    DMLC_DECLARE_FIELD(lam).set_default(1.0f).describe(
+        "Lambda parameter (rate) of the Poisson distribution.");
   }
 };
 
 struct SampleNegBinomialLikeParam : public dmlc::Parameter<SampleNegBinomialLikeParam>,
-  NegBinomialParam {
+                                    NegBinomialParam {
   DMLC_DECLARE_PARAMETER(SampleNegBinomialLikeParam) {
-    DMLC_DECLARE_FIELD(k).set_default(1)
-    .describe("Limit of unsuccessful experiments.");
-    DMLC_DECLARE_FIELD(p).set_default(1.0f)
-    .describe("Failure probability in each experiment.");
+    DMLC_DECLARE_FIELD(k).set_default(1).describe("Limit of unsuccessful experiments.");
+    DMLC_DECLARE_FIELD(p).set_default(1.0f).describe("Failure probability in each experiment.");
   }
 };
 
 struct SampleGenNegBinomialLikeParam : public dmlc::Parameter<SampleGenNegBinomialLikeParam>,
-  GenNegBinomialParam {
+                                       GenNegBinomialParam {
   DMLC_DECLARE_PARAMETER(SampleGenNegBinomialLikeParam) {
-    DMLC_DECLARE_FIELD(mu).set_default(1.0f)
-    .describe("Mean of the negative binomial distribution.");
-    DMLC_DECLARE_FIELD(alpha).set_default(1.0f)
-    .describe("Alpha (dispersion) parameter of the negative binomial distribution.");
+    DMLC_DECLARE_FIELD(mu).set_default(1.0f).describe(
+        "Mean of the negative binomial distribution.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0f).describe(
+        "Alpha (dispersion) parameter of the negative binomial distribution.");
   }
 };
 
-using FSampleCompute = std::function<void (const nnvm::NodeAttrs& attrs,
-                                           const OpContext& ctx,
-                                           const OpReqType& req,
-                                           TBlob* outputs)>;
+using FSampleCompute = std::function<
+    void(const nnvm::NodeAttrs& attrs, const OpContext& ctx, const OpReqType& req, TBlob* outputs)>;
 
 using mxnet::TBlob;
 using namespace mxnet::common::random;
 
 // Allocates a single chunk of workspace memory and partitions it into three
 // workspace tensors that hold the seeds as well as the distribution parameters.
-template<typename xpu, typename DType>
-MSHADOW_FORCE_INLINE void GetSamplingTempData(DType p1, DType p2, const OpContext& ctx,
+template <typename xpu, typename DType>
+MSHADOW_FORCE_INLINE void GetSamplingTempData(DType p1,
+                                              DType p2,
+                                              const OpContext& ctx,
                                               Tensor<xpu, 1, DType>* parm1,
                                               Tensor<xpu, 1, DType>* parm2) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   // Combined memory requirement for the workspace data.
   const index_t nInt((2 * sizeof(DType) + sizeof(unsigned) - 1) / sizeof(unsigned));
-  Tensor<xpu, 1, unsigned> wspace
-    = ctx.requested[1].get_space_typed<xpu, 1, unsigned>(Shape1(nInt), s);
+  Tensor<xpu, 1, unsigned> wspace =
+      ctx.requested[1].get_space_typed<xpu, 1, unsigned>(Shape1(nInt), s);
   // Partition workspace into two chunks and initialize them.
-  DType *pspace = static_cast<DType*>(static_cast<void*>(wspace.dptr_));
-  *parm1 = Tensor<xpu, 1, DType>(pspace, Shape1(1), s);
+  DType* pspace = static_cast<DType*>(static_cast<void*>(wspace.dptr_));
+  *parm1        = Tensor<xpu, 1, DType>(pspace, Shape1(1), s);
   Copy(*parm1, Tensor<cpu, 1, DType>(&p1, Shape1(1)), s);
-  *parm2 = Tensor<xpu, 1, DType>(pspace+1, Shape1(1), s);
+  *parm2 = Tensor<xpu, 1, DType>(pspace + 1, Shape1(1), s);
   Copy(*parm2, Tensor<cpu, 1, DType>(&p2, Shape1(1)), s);
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void uniform_op(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const OpReqType& req,
                               TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
   const UniformParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GE(param.high, param.low) << "low must be less or equal to high in uniform distribution";
   Tensor<xpu, 1, float> low, high;
-  GetSamplingTempData<xpu, float>(param.low, param.high, ctx,
-                                  &low, &high);
+  GetSamplingTempData<xpu, float>(param.low, param.high, ctx, &low, &high);
   UniformSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(low, high, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void normal_op(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const OpReqType& req,
                              TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s           = ctx.get_stream<xpu>();
   const NormalParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GT(param.scale, 0) << "scale parameter in gaussian has to be positive";
   Tensor<xpu, 1, float> loc, scale;
   GetSamplingTempData<xpu, float>(param.loc, param.scale, ctx, &loc, &scale);
   NormalSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(loc, scale, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void gamma_op(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const OpReqType& req,
                             TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
   const GammaParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GT(param.alpha, 0) << "alpha parameter in gamma distribution has to be positive";
   CHECK_GT(param.beta, 0) << "beta parameter in gamma distribution has to be positive";
@@ -433,54 +401,54 @@ static inline void gamma_op(const nnvm::NodeAttrs& attrs,
   GetSamplingTempData<xpu, float>(param.alpha, param.beta, ctx, &alpha, &beta);
   GammaSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(alpha, beta, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void exponential_op(const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const OpReqType& req,
                                   TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
   const ExponentialParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GT(param.lam, 0) << "lambda parameter in exponential distribution has to be positive";
   Tensor<xpu, 1, float> lam, dummy;
   GetSamplingTempData<xpu, float>(param.lam, 0, ctx, &lam, &dummy);
   ExponentialSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(lam, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void poisson_op(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const OpReqType& req,
                               TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s            = ctx.get_stream<xpu>();
   const PoissonParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GE(param.lam, 0) << "lambda parameter in poisson distribution has to be non-negative";
   Tensor<xpu, 1, float> lam, dummy;
   GetSamplingTempData<xpu, float>(param.lam, 0, ctx, &lam, &dummy);
   PoissonSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(lam, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void neg_binomial_op(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const OpReqType& req,
                                    TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
   const NegBinomialParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GE(param.k, 0) << "k parameter in negative binomial distribution has to be non-negative";
   CHECK_GE(param.p, 0) << "p parameter in negative binomial distribution has to be non-negative";
@@ -488,56 +456,55 @@ static inline void neg_binomial_op(const nnvm::NodeAttrs& attrs,
   GetSamplingTempData<xpu, float>(param.k, param.p, ctx, &k, &p);
   NegativeBinomialSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(k, p, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void gen_neg_binomial_op(const nnvm::NodeAttrs& attrs,
                                        const OpContext& ctx,
                                        const OpReqType& req,
                                        TBlob* outputs) {
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s                   = ctx.get_stream<xpu>();
   const GenNegBinomialParam& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_GE(param.mu, 0)
-    << "mu parameter in generalized negative binomial distribution has to be non-negative";
+      << "mu parameter in generalized negative binomial distribution has to be non-negative";
   CHECK_GE(param.alpha, 0)
-    << "alpha parameter in generalized negative binomial distribution has to be non-negative";
+      << "alpha parameter in generalized negative binomial distribution has to be non-negative";
   Tensor<xpu, 1, float> mu, alpha;
   GetSamplingTempData<xpu, float>(param.mu, param.alpha, ctx, &mu, &alpha);
   GeneralizedNegativeBinomialSampler<xpu> sampler;
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-    Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
     sampler.Sample(mu, alpha, out, pgen, s);
   });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 static inline void rand_int_op(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const OpReqType& req,
                                TBlob* outputs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    const SampleRandIntParam& param = nnvm::get<SampleRandIntParam>(attrs.parsed);
-    CHECK_GE(param.high, param.low) << "low must be less or equal to high in uniform distribution";
-    Tensor<xpu, 1, int64_t> low, high;
-    GetSamplingTempData<xpu, int64_t>(param.low, param.high, ctx,
-                                    &low, &high);
-    RandIntSampler<xpu> sampler;
-    MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-      RandGenerator<xpu, OType> *pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
-      Tensor<xpu, 1, OType> out = outputs->FlatTo1D<xpu, OType>(s);
-      sampler.Sample(low, high, out, pgen, s);
-    });
+  Stream<xpu>* s                  = ctx.get_stream<xpu>();
+  const SampleRandIntParam& param = nnvm::get<SampleRandIntParam>(attrs.parsed);
+  CHECK_GE(param.high, param.low) << "low must be less or equal to high in uniform distribution";
+  Tensor<xpu, 1, int64_t> low, high;
+  GetSamplingTempData<xpu, int64_t>(param.low, param.high, ctx, &low, &high);
+  RandIntSampler<xpu> sampler;
+  MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
+    RandGenerator<xpu, OType>* pgen = ctx.requested[0].get_parallel_random<xpu, OType>();
+    Tensor<xpu, 1, OType> out       = outputs->FlatTo1D<xpu, OType>(s);
+    sampler.Sample(low, high, out, pgen, s);
+  });
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 struct SampleMaster;
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleUniformParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -547,7 +514,7 @@ struct SampleMaster<xpu, SampleUniformParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleUniformLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -557,7 +524,7 @@ struct SampleMaster<xpu, SampleUniformLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleNormalParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -567,7 +534,7 @@ struct SampleMaster<xpu, SampleNormalParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleNormalLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -577,7 +544,7 @@ struct SampleMaster<xpu, SampleNormalLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleGammaParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -587,7 +554,7 @@ struct SampleMaster<xpu, SampleGammaParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleGammaLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -597,7 +564,7 @@ struct SampleMaster<xpu, SampleGammaLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleExponentialParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -607,7 +574,7 @@ struct SampleMaster<xpu, SampleExponentialParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleExponentialLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -617,7 +584,7 @@ struct SampleMaster<xpu, SampleExponentialLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SamplePoissonParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -627,7 +594,7 @@ struct SampleMaster<xpu, SamplePoissonParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SamplePoissonLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -637,7 +604,7 @@ struct SampleMaster<xpu, SamplePoissonLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleNegBinomialParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -647,7 +614,7 @@ struct SampleMaster<xpu, SampleNegBinomialParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleNegBinomialLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -657,7 +624,7 @@ struct SampleMaster<xpu, SampleNegBinomialLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleGenNegBinomialParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -667,7 +634,7 @@ struct SampleMaster<xpu, SampleGenNegBinomialParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleGenNegBinomialLikeParam> {
   static inline void op(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
@@ -677,7 +644,7 @@ struct SampleMaster<xpu, SampleGenNegBinomialLikeParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleMaster<xpu, SampleRandIntParam> {
   static void op(const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
@@ -687,7 +654,7 @@ struct SampleMaster<xpu, SampleRandIntParam> {
   }
 };
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 void SampleComputeEx_(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<NDArray>& inputs,
@@ -695,8 +662,8 @@ void SampleComputeEx_(const nnvm::NodeAttrs& attrs,
                       const std::vector<NDArray>& outputs,
                       SampleMaster<xpu, ParamType> sample_master) {
   using namespace mxnet::op;
-  NDArray output = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  NDArray output          = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   if (output.storage_type() == kRowSparseStorage) {
     // indices
     nnvm::dim_t nnr = output.shape()[0];
@@ -709,12 +676,11 @@ void SampleComputeEx_(const nnvm::NodeAttrs& attrs,
     TBlob out_blob = output.data();
     sample_master.op(attrs, ctx, req[0], &out_blob);
   } else {
-    LOG(FATAL) << "Unexpected storage type for SampleComputeEx_: "
-               << output.storage_type();
+    LOG(FATAL) << "Unexpected storage type for SampleComputeEx_: " << output.storage_type();
   }
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 void Sample_(const nnvm::NodeAttrs& attrs,
              const OpContext& ctx,
              const std::vector<TBlob>& inputs,
@@ -724,7 +690,7 @@ void Sample_(const nnvm::NodeAttrs& attrs,
   SampleMaster<xpu, ParamType>::op(attrs, ctx, req[0], &out);
 }
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 void SampleEx_(const nnvm::NodeAttrs& attrs,
                const OpContext& ctx,
                const std::vector<NDArray>& inputs,
@@ -734,22 +700,22 @@ void SampleEx_(const nnvm::NodeAttrs& attrs,
   SampleComputeEx_<xpu, ParamType>(attrs, ctx, inputs, req, outputs, sample_master);
 }
 
-template<typename ParamType>
+template <typename ParamType>
 inline bool SampleOpType(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_type,
-                         std::vector<int> *out_type) {
+                         std::vector<int>* in_type,
+                         std::vector<int>* out_type) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_type->size(), 0);
   CHECK_EQ(out_type->size(), 1);
-  int dtype = -1;
+  int dtype     = -1;
   int dtype_out = (*out_type)[0];
   if (dtype_out != -1) {
     // Output type can be inferred, use it and make sure it matches
     dtype = dtype_out;
     if (param.dtype != -1) {
       // dtype given in args, check that it matches the output type
-      CHECK_EQ(dtype_out, param.dtype) << "Output type does not match requested type: "
-      << dtype_out << " vs " << param.dtype;
+      CHECK_EQ(dtype_out, param.dtype)
+          << "Output type does not match requested type: " << dtype_out << " vs " << param.dtype;
     }
   } else {
     // Output type can't be inferred
@@ -761,31 +727,31 @@ inline bool SampleOpType(const nnvm::NodeAttrs& attrs,
       dtype = mxnet::common::GetDefaultDtype();
     }
   }
-  bool dtype_ok = (dtype == mshadow::kFloat16) || (dtype == mshadow::kFloat32) ||
-  (dtype == mshadow::kFloat64);
-  CHECK(dtype_ok) << "Output type must be float16, float32, float64: dtype is "
-  << dtype_out << " vs " << mshadow::kFloat16 << " or " << mshadow::kFloat32 << " or "
-  << mshadow::kFloat64;
+  bool dtype_ok =
+      (dtype == mshadow::kFloat16) || (dtype == mshadow::kFloat32) || (dtype == mshadow::kFloat64);
+  CHECK(dtype_ok) << "Output type must be float16, float32, float64: dtype is " << dtype_out
+                  << " vs " << mshadow::kFloat16 << " or " << mshadow::kFloat32 << " or "
+                  << mshadow::kFloat64;
   TYPE_ASSIGN_CHECK(*out_type, 0, dtype);
   return true;
 }
 
-template<>
+template <>
 inline bool SampleOpType<SampleRandIntParam>(const nnvm::NodeAttrs& attrs,
-                         std::vector<int> *in_type,
-                         std::vector<int> *out_type) {
+                                             std::vector<int>* in_type,
+                                             std::vector<int>* out_type) {
   const SampleRandIntParam& param = nnvm::get<SampleRandIntParam>(attrs.parsed);
   CHECK_EQ(in_type->size(), 0);
   CHECK_EQ(out_type->size(), 1);
-  int dtype = -1;
+  int dtype     = -1;
   int dtype_out = (*out_type)[0];
   if (dtype_out != -1) {
     // Output type can be inferred, use it and make sure it matches
     dtype = dtype_out;
     if (param.dtype != -1) {
       // dtype given in args, check that it matches the output type
-      CHECK_EQ(dtype_out, param.dtype) << "Output type does not match requested type: "
-      << dtype_out << " vs " << param.dtype;
+      CHECK_EQ(dtype_out, param.dtype)
+          << "Output type does not match requested type: " << dtype_out << " vs " << param.dtype;
     }
   } else {
     // Output type can't be inferred
@@ -798,14 +764,14 @@ inline bool SampleOpType<SampleRandIntParam>(const nnvm::NodeAttrs& attrs,
     }
   }
   bool dtype_ok = (dtype == mshadow::kInt32) || (dtype == mshadow::kInt64);
-  CHECK(dtype_ok) << "Output type must be int32, int64: dtype is "
-  << dtype_out << " vs " << mshadow::kInt32 << " or " << mshadow::kInt64;
+  CHECK(dtype_ok) << "Output type must be int32, int64: dtype is " << dtype_out << " vs "
+                  << mshadow::kInt32 << " or " << mshadow::kInt64;
   TYPE_ASSIGN_CHECK(*out_type, 0, dtype);
   return true;
 }
 
 inline std::vector<ResourceRequest> SampleResource(const NodeAttrs& attrs) {
-  return { ResourceRequest::kParallelRandom, ResourceRequest::kTempSpace };
+  return {ResourceRequest::kParallelRandom, ResourceRequest::kTempSpace};
 }
 
 }  // namespace op
diff --git a/src/operator/random/sampler.h b/src/operator/random/sampler.h
index 1a9bf7a4d169..7ed5529dc62e 100644
--- a/src/operator/random/sampler.h
+++ b/src/operator/random/sampler.h
@@ -40,98 +40,114 @@ namespace op {
  * \tparam N Number of iterations
  * \tparam Args Varargs type to eventually pass to the OP::Map() function
  */
-template<typename OP, typename xpu, typename GType, typename ...Args>
-inline static void LaunchRNG(mshadow::Stream<xpu> *s,
-                             common::random::RandGenerator<xpu, GType> *gen,
-                             const index_t N, Args... args) {
+template <typename OP, typename xpu, typename GType, typename... Args>
+inline static void LaunchRNG(mshadow::Stream<xpu>* s,
+                             common::random::RandGenerator<xpu, GType>* gen,
+                             const index_t N,
+                             Args... args) {
   // minimal check to avoid division by zero, below.
   // if `N` is zero the map operation is a no-op in any case.
   if (N <= 0) {
     return;
   }
   const index_t nloop = (N + RandGenerator<xpu>::kMinNumRandomPerThread - 1) /
-                    RandGenerator<xpu>::kMinNumRandomPerThread;
-  const index_t nthread = std::min(nloop,
-                                   static_cast<index_t>(RandGenerator<xpu>::kNumRandomStates));
+                        RandGenerator<xpu>::kMinNumRandomPerThread;
+  const index_t nthread =
+      std::min(nloop, static_cast<index_t>(RandGenerator<xpu>::kNumRandomStates));
   const index_t step = (N + nthread - 1) / nthread;
   Kernel<OP, xpu>::Launch(s, nthread, *gen, N, step, args...);
 }
 
-#define RNG_KERNEL_LOOP(xpu, GType, thread_id, gen, N, step, ...)        \
-  const index_t start = thread_id * step;                                    \
-  const index_t end = start + step;                                          \
-  typename RandGenerator<xpu, GType>::Impl genImpl(&gen, thread_id);     \
-  for (index_t i = start; i < end && i < N; ++i) {                           \
-    {__VA_ARGS__}                                                        \
+#define RNG_KERNEL_LOOP(xpu, GType, thread_id, gen, N, step, ...)    \
+  const index_t start = thread_id * step;                            \
+  const index_t end   = start + step;                                \
+  typename RandGenerator<xpu, GType>::Impl genImpl(&gen, thread_id); \
+  for (index_t i = start; i < end && i < N; ++i) {                   \
+    { __VA_ARGS__ }                                                  \
   }
 
-template<typename xpu>
+template <typename xpu>
 struct SampleUniformKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, OType> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *lower, const IType *upper, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, OType> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* lower,
+                                  const IType* upper,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, OType, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
-      out[i] = OType(lower[i / nBatch] +
-                     (upper[i / nBatch] - lower[i / nBatch]) * genImpl.uniform());
+      out[i] =
+          OType(lower[i / nBatch] + (upper[i / nBatch] - lower[i / nBatch]) * genImpl.uniform());
     });
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct UniformSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& lower,
                                    const Tensor<xpu, 1, IType>& upper,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    LaunchRNG<SampleUniformKernel<xpu>, xpu>(s, pgen, out.size(0), lower.size(0), out.size(0),
-                                             lower.dptr_, upper.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    LaunchRNG<SampleUniformKernel<xpu>, xpu>(
+        s, pgen, out.size(0), lower.size(0), out.size(0), lower.dptr_, upper.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleRandIntKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, OType> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *lower, const IType *upper, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, OType> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* lower,
+                                  const IType* upper,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, OType, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
       if (sizeof(IType) == sizeof(int64_t))
         out[i] = OType(lower[i / nBatch] +
-                     genImpl.rand_int64() % (upper[i / nBatch] - lower[i / nBatch]));
+                       genImpl.rand_int64() % (upper[i / nBatch] - lower[i / nBatch]));
       else
-        out[i] = OType(lower[i / nBatch] +
-                     genImpl.rand() % (upper[i / nBatch] - lower[i / nBatch]));
+        out[i] =
+            OType(lower[i / nBatch] + genImpl.rand() % (upper[i / nBatch] - lower[i / nBatch]));
     });
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct RandIntSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& lower,
                                    const Tensor<xpu, 1, IType>& upper,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    LaunchRNG<SampleRandIntKernel<xpu>, xpu>(s, pgen, out.size(0), lower.size(0), out.size(0),
-                                             lower.dptr_, upper.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    LaunchRNG<SampleRandIntKernel<xpu>, xpu>(
+        s, pgen, out.size(0), lower.size(0), out.size(0), lower.dptr_, upper.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleNormalKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, OType> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *mean, const IType *std, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, OType> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* mean,
+                                  const IType* std,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, OType, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
       out[i] = OType(genImpl.normal() * std[i / nBatch] + mean[i / nBatch]);
@@ -139,26 +155,30 @@ struct SampleNormalKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct NormalSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& mean,
                                    const Tensor<xpu, 1, IType>& std,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    LaunchRNG<SampleNormalKernel<xpu>, xpu>(s, pgen, out.size(0), mean.size(0), out.size(0),
-                                            mean.dptr_, std.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    LaunchRNG<SampleNormalKernel<xpu>, xpu>(
+        s, pgen, out.size(0), mean.size(0), out.size(0), mean.dptr_, std.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleExponentialKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, OType> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *lambda, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, OType> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* lambda,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, OType, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
       out[i] = OType(-log(1.0 - genImpl.uniform()) / lambda[i / nBatch]);
@@ -166,21 +186,20 @@ struct SampleExponentialKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct ExponentialSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& lambda,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    LaunchRNG<SampleExponentialKernel<xpu>, xpu>(s, pgen, out.size(0),
-                                                 lambda.size(0), out.size(0),
-                                                 lambda.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    LaunchRNG<SampleExponentialKernel<xpu>, xpu>(
+        s, pgen, out.size(0), lambda.size(0), out.size(0), lambda.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu, typename IType, typename OType>
-MSHADOW_XINLINE OType SampleGamma(IType a, IType b, typename RandGenerator<xpu, OType>::Impl *gen) {
+template <typename xpu, typename IType, typename OType>
+MSHADOW_XINLINE OType SampleGamma(IType a, IType b, typename RandGenerator<xpu, OType>::Impl* gen) {
   // Generate one sample of the gamma distribution
   OType sample;
   OType d = a < 1 ? a + 2.0 / 3.0 : a - 1.0 / 3.0;
@@ -191,7 +210,7 @@ MSHADOW_XINLINE OType SampleGamma(IType a, IType b, typename RandGenerator<xpu,
     if (Z > -k) {
       OType x = 1.0 + c * Z;
       OType V = x * x * x;
-      if (log(1.0-gen->uniform()) < 0.5 * Z * Z + d * (1.0 - V + log(V))) {
+      if (log(1.0 - gen->uniform()) < 0.5 * Z * Z + d * (1.0 - V + log(V))) {
         sample = d * V * b;
         break;
       }
@@ -200,75 +219,85 @@ MSHADOW_XINLINE OType SampleGamma(IType a, IType b, typename RandGenerator<xpu,
   return a < 1 ? sample * pow(gen->uniform(), OType(1.0 / a)) : sample;
 }
 
-template<typename xpu>
+template <typename xpu>
 struct SampleGammaKernel {
-  template<typename IType, typename OType, typename FType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, FType> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *alpha, const IType *beta, OType *out) {
+  template <typename IType, typename OType, typename FType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, FType> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* alpha,
+                                  const IType* beta,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, FType, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
-      out[i] = OType(SampleGamma<xpu, IType, FType>(alpha[i / nBatch],
-                                                    beta[i / nBatch], &genImpl));
+      out[i] = OType(SampleGamma<xpu, IType, FType>(alpha[i / nBatch], beta[i / nBatch], &genImpl));
     });
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct GammaSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& alpha,
                                    const Tensor<xpu, 1, IType>& beta,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    typedef typename std::conditional<std::is_floating_point<OType>::value,
-                                      OType, float>::type FType;
-    RandGenerator<xpu, FType> *gen = reinterpret_cast<RandGenerator<xpu, FType> *>(pgen);
-    LaunchRNG<SampleGammaKernel<xpu>, xpu>(s, gen, out.size(0), alpha.size(0), out.size(0),
-                                           alpha.dptr_, beta.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    typedef
+        typename std::conditional<std::is_floating_point<OType>::value, OType, float>::type FType;
+    RandGenerator<xpu, FType>* gen = reinterpret_cast<RandGenerator<xpu, FType>*>(pgen);
+    LaunchRNG<SampleGammaKernel<xpu>, xpu>(
+        s, gen, out.size(0), alpha.size(0), out.size(0), alpha.dptr_, beta.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu>
-MSHADOW_XINLINE int SamplePoisson(float lambda, typename RandGenerator<xpu, float>::Impl *gen) {
+template <typename xpu>
+MSHADOW_XINLINE int SamplePoisson(float lambda, typename RandGenerator<xpu, float>::Impl* gen) {
   // Generate one sample of the poisson distribution. Intentionally written
   // towards a specific type (float) for internal computation which is sufficient
   // for accurate enough computation.
-  if ( lambda < 12.0 ) {
+  if (lambda < 12.0) {
     float t = expf(-lambda);
-    int x = 0;
-    for ( float prod = gen->uniform(); prod > t; prod *= gen->uniform() ) { x += 1; }
+    int x   = 0;
+    for (float prod = gen->uniform(); prod > t; prod *= gen->uniform()) {
+      x += 1;
+    }
     return x;
   } else {
     // Approximation for high lambda according to:
     // Numerical Recipes in C: The Art of Scientific Computing
     // Cambridge University Press
     const float pi(3.1415926);
-    const float sq(sqrt(2.0*lambda));
+    const float sq(sqrt(2.0 * lambda));
     const float loglambda(log(lambda));
-    const float g(lambda*loglambda-lgammaf(lambda+1.0));
+    const float g(lambda * loglambda - lgammaf(lambda + 1.0));
     float em(0), t(0), y(0);
     do {
       do {
-        y = tanf(pi * gen->uniform());
+        y  = tanf(pi * gen->uniform());
         em = sq * y + lambda;
       } while (em < 0.0);
       em = floorf(em);
-      t = 0.9 * (1.0 + y * y) * expf(em * loglambda - lgammaf(em + 1.0) - g);
+      t  = 0.9 * (1.0 + y * y) * expf(em * loglambda - lgammaf(em + 1.0) - g);
     } while (gen->uniform() > t);
     return static_cast<int>(em);
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 struct SamplePoissonKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, float> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *lambda, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, float> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* lambda,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, float, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
       out[i] = OType(SamplePoisson<xpu>(lambda[i / nBatch], &genImpl));
@@ -276,81 +305,91 @@ struct SamplePoissonKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct PoissonSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& lambda,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    RandGenerator<xpu, float> *gen = reinterpret_cast<RandGenerator<xpu, float> *>(pgen);
-    LaunchRNG<SamplePoissonKernel<xpu>, xpu>(s, gen, out.size(0), lambda.size(0), out.size(0),
-                                             lambda.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    RandGenerator<xpu, float>* gen = reinterpret_cast<RandGenerator<xpu, float>*>(pgen);
+    LaunchRNG<SamplePoissonKernel<xpu>, xpu>(
+        s, gen, out.size(0), lambda.size(0), out.size(0), lambda.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleNegativeBinomialKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, float> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *k, const IType *p, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, float> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* k,
+                                  const IType* p,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, float, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
-      float alpha = k[i / nBatch];
-      float prob = p[i / nBatch];
-      float beta = (1.0 - prob) / prob;
+      float alpha  = k[i / nBatch];
+      float prob   = p[i / nBatch];
+      float beta   = (1.0 - prob) / prob;
       float lambda = SampleGamma<xpu, IType, float>(alpha, beta, &genImpl);
-      out[i] = OType(SamplePoisson<xpu>(lambda, &genImpl));
+      out[i]       = OType(SamplePoisson<xpu>(lambda, &genImpl));
     });
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct NegativeBinomialSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& k,
                                    const Tensor<xpu, 1, IType>& p,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    RandGenerator<xpu, float> *gen = reinterpret_cast<RandGenerator<xpu, float> *>(pgen);
-    LaunchRNG<SampleNegativeBinomialKernel<xpu>, xpu>(s, gen, out.size(0), k.size(0), out.size(0),
-                                                      k.dptr_, p.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    RandGenerator<xpu, float>* gen = reinterpret_cast<RandGenerator<xpu, float>*>(pgen);
+    LaunchRNG<SampleNegativeBinomialKernel<xpu>, xpu>(
+        s, gen, out.size(0), k.size(0), out.size(0), k.dptr_, p.dptr_, out.dptr_);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct SampleGeneralizedNegativeBinomialKernel {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t id, RandGenerator<xpu, float> gen,
-                                  const index_t N, const index_t step,
-                                  index_t nParm, index_t nSample,
-                                  const IType *mu, const IType *alpha, OType *out) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t id,
+                                  RandGenerator<xpu, float> gen,
+                                  const index_t N,
+                                  const index_t step,
+                                  index_t nParm,
+                                  index_t nSample,
+                                  const IType* mu,
+                                  const IType* alpha,
+                                  OType* out) {
     RNG_KERNEL_LOOP(xpu, float, id, gen, N, step, {
       index_t nBatch(1 + (nSample - 1) / nParm);
-      float lambda = alpha[i / nBatch] == 0 ?
-                     static_cast<float>(mu[i / nBatch]) :
-                     SampleGamma<xpu, IType, float>(IType(1) / alpha[i / nBatch],
-                                                    alpha[i / nBatch] * mu[i / nBatch], &genImpl);
+      float lambda =
+          alpha[i / nBatch] == 0
+              ? static_cast<float>(mu[i / nBatch])
+              : SampleGamma<xpu, IType, float>(
+                    IType(1) / alpha[i / nBatch], alpha[i / nBatch] * mu[i / nBatch], &genImpl);
       out[i] = OType(SamplePoisson<xpu>(lambda, &genImpl));
     });
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 struct GeneralizedNegativeBinomialSampler {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_FORCE_INLINE void Sample(const Tensor<xpu, 1, IType>& mu,
                                    const Tensor<xpu, 1, IType>& alpha,
                                    const Tensor<xpu, 1, OType>& out,
-                                   RandGenerator<xpu, OType> *pgen,
-                                   Stream<xpu> *s) {
-    RandGenerator<xpu, float> *gen = reinterpret_cast<RandGenerator<xpu, float> *>(pgen);
-    LaunchRNG<SampleGeneralizedNegativeBinomialKernel<xpu>, xpu>(s, gen, out.size(0),
-                                                                 mu.size(0), out.size(0),
-                                                                 mu.dptr_, alpha.dptr_, out.dptr_);
+                                   RandGenerator<xpu, OType>* pgen,
+                                   Stream<xpu>* s) {
+    RandGenerator<xpu, float>* gen = reinterpret_cast<RandGenerator<xpu, float>*>(pgen);
+    LaunchRNG<SampleGeneralizedNegativeBinomialKernel<xpu>, xpu>(
+        s, gen, out.size(0), mu.size(0), out.size(0), mu.dptr_, alpha.dptr_, out.dptr_);
   }
 };
 
diff --git a/src/operator/random/shuffle_op.cc b/src/operator/random/shuffle_op.cc
index c81d90689d58..f34001e2c231 100644
--- a/src/operator/random/shuffle_op.cc
+++ b/src/operator/random/shuffle_op.cc
@@ -23,7 +23,7 @@
  * \brief Operator to shuffle elements of an NDArray
  */
 #if ((__GNUC__ > 4 && !defined(__clang__major__)) || (__clang_major__ > 4 && __linux__)) && \
-  defined(_OPENMP) && !defined(__ANDROID__)
+    defined(_OPENMP) && !defined(__ANDROID__)
 #define USE_GNU_PARALLEL_SHUFFLE
 #endif
 
@@ -33,8 +33,8 @@
 #include <vector>
 #include <cstring>
 #ifdef USE_GNU_PARALLEL_SHUFFLE
-  #include <unistd.h>
-  #include <parallel/algorithm>
+#include <unistd.h>
+#include <parallel/algorithm>
 #endif
 #include "../elemwise_op_common.h"
 
@@ -43,38 +43,41 @@ namespace op {
 
 namespace {
 
-template<typename DType, typename Rand>
+template <typename DType, typename Rand>
 void Shuffle1D(DType* const out, const index_t size, Rand* const prnd) {
-  #ifdef USE_GNU_PARALLEL_SHUFFLE
-     /*
-      * See issue #15029: the data type of n needs to be compatible with
-      * the gcc library: https://github.com/gcc-mirror/gcc/blob/master/libstdc%2B%2B\
-      * -v3/include/parallel/random_shuffle.h#L384
-      */
-    auto rand_n = [prnd](uint32_t n) {
-      std::uniform_int_distribution<uint32_t> dist(0, n - 1);
-      return dist(*prnd);
-    };
-    __gnu_parallel::random_shuffle(out, out + size, rand_n);
-  #else
-    std::shuffle(out, out + size, *prnd);
-  #endif
+#ifdef USE_GNU_PARALLEL_SHUFFLE
+  /*
+   * See issue #15029: the data type of n needs to be compatible with
+   * the gcc library: https://github.com/gcc-mirror/gcc/blob/master/libstdc%2B%2B\
+   * -v3/include/parallel/random_shuffle.h#L384
+   */
+  auto rand_n = [prnd](uint32_t n) {
+    std::uniform_int_distribution<uint32_t> dist(0, n - 1);
+    return dist(*prnd);
+  };
+  __gnu_parallel::random_shuffle(out, out + size, rand_n);
+#else
+  std::shuffle(out, out + size, *prnd);
+#endif
 }
 
-template<typename DType, typename Rand>
-void ShuffleND(DType* const out, const index_t size, const index_t first_axis_len,
-                Rand* const prnd, const OpContext& ctx) {
+template <typename DType, typename Rand>
+void ShuffleND(DType* const out,
+               const index_t size,
+               const index_t first_axis_len,
+               Rand* const prnd,
+               const OpContext& ctx) {
   // Fisher-Yates shuffling
   using namespace mxnet_op;
   const index_t stride = size / first_axis_len;
-  auto rand_n = [prnd](index_t n) {
+  auto rand_n          = [prnd](index_t n) {
     std::uniform_int_distribution<index_t> dist(0, n - 1);
     return dist(*prnd);
   };
   CHECK_GT(first_axis_len, 0U);
   const size_t stride_bytes = sizeof(DType) * stride;
   Tensor<cpu, 1, char> buf =
-    ctx.requested[1].get_space_typed<cpu, 1, char>(Shape1(stride_bytes), ctx.get_stream<cpu>());
+      ctx.requested[1].get_space_typed<cpu, 1, char>(Shape1(stride_bytes), ctx.get_stream<cpu>());
   for (index_t i = first_axis_len - 1; i > 0; --i) {
     const index_t j = rand_n(i + 1);
     if (i != j) {
@@ -103,11 +106,11 @@ void ShuffleForwardCPU(const nnvm::NodeAttrs& attrs,
   }
   CHECK_NE(req[0], kAddTo) << "Shuffle does not support AddTo";
   const mxnet::TShape& input_shape = inputs[0].shape_;
-  const index_t size = inputs[0].Size();
-  const index_t first_axis_len = input_shape[0];
-  Stream<cpu> *s = ctx.get_stream<cpu>();
+  const index_t size               = inputs[0].Size();
+  const index_t first_axis_len     = input_shape[0];
+  Stream<cpu>* s                   = ctx.get_stream<cpu>();
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Tensor<cpu, 1, DType> in = inputs[0].get_with_shape<cpu, 1, DType>(Shape1(size), s);
+    Tensor<cpu, 1, DType> in  = inputs[0].get_with_shape<cpu, 1, DType>(Shape1(size), s);
     Tensor<cpu, 1, DType> out = outputs[0].get_with_shape<cpu, 1, DType>(Shape1(size), s);
     auto& prnd = ctx.requested[0].get_random<cpu, index_t>(ctx.get_stream<cpu>())->GetRndEngine();
     if (req[0] != kWriteInplace) {
@@ -121,34 +124,34 @@ void ShuffleForwardCPU(const nnvm::NodeAttrs& attrs,
   });
 }
 
-
 // No parameter is declared.
 // No backward computation is registered. Shuffling is not differentiable.
 
 NNVM_REGISTER_OP(_shuffle)
-.add_alias("shuffle")
-.add_alias("_npi_shuffle")
-.describe(R"code(Randomly shuffle the elements.
+    .add_alias("shuffle")
+    .add_alias("_npi_shuffle")
+    .describe(R"code(Randomly shuffle the elements.
 
 This shuffles the array along the first axis.
 The order of the elements in each subarray does not change.
 For example, if a 2D array is given, the order of the rows randomly changes,
 but the order of the elements in each row does not change.
 )code")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const nnvm::NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kRandom, ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int>>{{0, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", ShuffleForwardCPU)
-.add_argument("data", "NDArray-or-Symbol", "Data to be shuffled.");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const nnvm::NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kRandom,
+                                                                      ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", ShuffleForwardCPU)
+    .add_argument("data", "NDArray-or-Symbol", "Data to be shuffled.");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/shuffle_op.cu b/src/operator/random/shuffle_op.cu
index 91b378deace0..495af2805057 100644
--- a/src/operator/random/shuffle_op.cu
+++ b/src/operator/random/shuffle_op.cu
@@ -35,9 +35,12 @@ namespace op {
 namespace {
 
 struct CopyForShuffle {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, const DType* const in, DType* out,
-                                  const index_t* indices, const index_t stride) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  const DType* const in,
+                                  DType* out,
+                                  const index_t* indices,
+                                  const index_t stride) {
     out[i] = in[indices[i / stride] * stride + i % stride];
   }
 };
@@ -55,37 +58,37 @@ void ShuffleForwardGPU(const nnvm::NodeAttrs& attrs,
   }
   CHECK_NE(req[0], kAddTo) << "Shuffle does not support AddTo";
   const mxnet::TShape& input_shape = inputs[0].shape_;
-  const index_t size = inputs[0].Size();
-  const index_t first_axis_len = input_shape[0];
-  const index_t stride = size / first_axis_len;
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  const index_t size               = inputs[0].Size();
+  const index_t first_axis_len     = input_shape[0];
+  const index_t stride             = size / first_axis_len;
+  Stream<gpu>* s                   = ctx.get_stream<gpu>();
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    using KeyType = uint32_t;
-    Tensor<gpu, 1, DType> in = inputs[0].get_with_shape<gpu, 1, DType>(Shape1(size), s);
-    Tensor<gpu, 1, DType> out = outputs[0].get_with_shape<gpu, 1, DType>(Shape1(size), s);
-    Random<gpu, KeyType> *prnd = ctx.requested[0].get_random<gpu, KeyType>(s);
+    using KeyType              = uint32_t;
+    Tensor<gpu, 1, DType> in   = inputs[0].get_with_shape<gpu, 1, DType>(Shape1(size), s);
+    Tensor<gpu, 1, DType> out  = outputs[0].get_with_shape<gpu, 1, DType>(Shape1(size), s);
+    Random<gpu, KeyType>* prnd = ctx.requested[0].get_random<gpu, KeyType>(s);
     if (input_shape.ndim() == 1) {
       if (req[0] != kWriteInplace) {
         Copy(out, in, s);
       }
       Tensor<gpu, 1, KeyType> keys =
-        ctx.requested[1].get_space_typed<gpu, 1, KeyType>(Shape1(size), s);
+          ctx.requested[1].get_space_typed<gpu, 1, KeyType>(Shape1(size), s);
       prnd->GetRandInt(keys);
       SortByKey(keys, out, true);
     } else {
-      const size_t tmp_space_size = req[0] == kWriteInplace ?
-        2 * first_axis_len * sizeof(index_t) + size * sizeof(DType) :
-        2 * first_axis_len * sizeof(index_t);
+      const size_t tmp_space_size =
+          req[0] == kWriteInplace ? 2 * first_axis_len * sizeof(index_t) + size * sizeof(DType)
+                                  : 2 * first_axis_len * sizeof(index_t);
       Tensor<gpu, 1, char> tmp_space =
-        ctx.requested[1].get_space_typed<gpu, 1, char>(Shape1(tmp_space_size), s);
+          ctx.requested[1].get_space_typed<gpu, 1, char>(Shape1(tmp_space_size), s);
       char* tmp_space_ptr = tmp_space.dptr_;
-      Tensor<gpu, 1, index_t> indices(reinterpret_cast<index_t*>(tmp_space_ptr),
-                                      Shape1(first_axis_len), s);
+      Tensor<gpu, 1, index_t> indices(
+          reinterpret_cast<index_t*>(tmp_space_ptr), Shape1(first_axis_len), s);
       tmp_space_ptr += sizeof(index_t) * first_axis_len;
-      Kernel<range_fwd, gpu>::Launch(s, static_cast<int>(first_axis_len),
-                                     1, index_t(0), index_t(1), kWriteTo, indices.dptr_);
-      Tensor<gpu, 1, KeyType> keys(reinterpret_cast<KeyType*>(tmp_space_ptr),
-                                   Shape1(first_axis_len), s);
+      Kernel<range_fwd, gpu>::Launch(
+          s, static_cast<int>(first_axis_len), 1, index_t(0), index_t(1), kWriteTo, indices.dptr_);
+      Tensor<gpu, 1, KeyType> keys(
+          reinterpret_cast<KeyType*>(tmp_space_ptr), Shape1(first_axis_len), s);
       tmp_space_ptr += sizeof(KeyType) * first_axis_len;
       prnd->GetRandInt(keys);
       SortByKey(keys, indices, true);
@@ -100,8 +103,7 @@ void ShuffleForwardGPU(const nnvm::NodeAttrs& attrs,
   });
 }
 
-NNVM_REGISTER_OP(_shuffle)
-.set_attr<FCompute>("FCompute<gpu>", ShuffleForwardGPU);
+NNVM_REGISTER_OP(_shuffle).set_attr<FCompute>("FCompute<gpu>", ShuffleForwardGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/unique_sample_op.cc b/src/operator/random/unique_sample_op.cc
index b6664240d802..dd942f3612bc 100644
--- a/src/operator/random/unique_sample_op.cc
+++ b/src/operator/random/unique_sample_op.cc
@@ -31,17 +31,16 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(SampleUniqueZifpianParam);
 
-#define MXNET_OPERATOR_REGISTER_UNIQUE_SAMPLE(name, ParamType)             \
-  NNVM_REGISTER_OP(name)                                                   \
-  .set_num_inputs(0)                                                       \
-  .set_num_outputs(2)                                                      \
-  .set_attr_parser(ParamParser<ParamType>)                                 \
-  .set_attr<FResourceRequest>("FResourceRequest", UniqueSampleResource)    \
-  .add_arguments(ParamType::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_UNIQUE_SAMPLE(name, ParamType)              \
+  NNVM_REGISTER_OP(name)                                                    \
+      .set_num_inputs(0)                                                    \
+      .set_num_outputs(2)                                                   \
+      .set_attr_parser(ParamParser<ParamType>)                              \
+      .set_attr<FResourceRequest>("FResourceRequest", UniqueSampleResource) \
+      .add_arguments(ParamType::__FIELDS__())
 
-MXNET_OPERATOR_REGISTER_UNIQUE_SAMPLE(_sample_unique_zipfian,
-                                      SampleUniqueZifpianParam)
-.describe(R"code(Draw random samples from an an approximately log-uniform
+MXNET_OPERATOR_REGISTER_UNIQUE_SAMPLE(_sample_unique_zipfian, SampleUniqueZifpianParam)
+    .describe(R"code(Draw random samples from an an approximately log-uniform
 or Zipfian distribution without replacement.
 
 This operation takes a 2-D shape `(batch_size, num_sampled)`,
@@ -64,9 +63,9 @@ Example::
    trials[0] = 16435
 
 )code" ADD_FILELINE)
-.set_attr<mxnet::FInferShape>("FInferShape", SampleUniqueShape<SampleUniqueZifpianParam>)
-.set_attr<nnvm::FInferType>("FInferType", SampleUniqueType<SampleUniqueZifpianParam>)
-.set_attr<FCompute>("FCompute<cpu>", SampleUniqueZifpian);
+    .set_attr<mxnet::FInferShape>("FInferShape", SampleUniqueShape<SampleUniqueZifpianParam>)
+    .set_attr<nnvm::FInferType>("FInferType", SampleUniqueType<SampleUniqueZifpianParam>)
+    .set_attr<FCompute>("FCompute<cpu>", SampleUniqueZifpian);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/random/unique_sample_op.h b/src/operator/random/unique_sample_op.h
index e88b95a8bdd6..94b41dc4f2da 100644
--- a/src/operator/random/unique_sample_op.h
+++ b/src/operator/random/unique_sample_op.h
@@ -43,19 +43,19 @@ struct SampleUniqueZifpianParam : public dmlc::Parameter<SampleUniqueZifpianPara
   int range_max;
   mxnet::TShape shape;
   DMLC_DECLARE_PARAMETER(SampleUniqueZifpianParam) {
-    DMLC_DECLARE_FIELD(range_max)
-    .describe("The number of possible classes.");
+    DMLC_DECLARE_FIELD(range_max).describe("The number of possible classes.");
     DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("2-D shape of the output, where shape[0] is the batch size, and shape[1] "
-              "is the number of candidates to sample for each batch.");
+        .set_default(mxnet::TShape())
+        .describe(
+            "2-D shape of the output, where shape[0] is the batch size, and shape[1] "
+            "is the number of candidates to sample for each batch.");
   }
 };
 
-template<typename ParamType>
+template <typename ParamType>
 inline bool SampleUniqueShape(const nnvm::NodeAttrs& attrs,
-                              mxnet::ShapeVector *in_attrs,
-                              mxnet::ShapeVector *out_attrs) {
+                              mxnet::ShapeVector* in_attrs,
+                              mxnet::ShapeVector* out_attrs) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 2U);
@@ -70,10 +70,10 @@ inline bool SampleUniqueShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<typename ParamType>
+template <typename ParamType>
 inline bool SampleUniqueType(const nnvm::NodeAttrs& attrs,
-                             std::vector<int> *in_attrs,
-                             std::vector<int> *out_attrs) {
+                             std::vector<int>* in_attrs,
+                             std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 2U);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
@@ -92,36 +92,42 @@ inline std::vector<ResourceRequest> UniqueSampleResource(const NodeAttrs& attrs)
  * \tparam num_sampled the number of unique samples per batch
  * \tparam Args Varargs type to eventually pass to the OP::Map() function
  */
-template<typename GType, typename DType, typename OP, typename ...Args>
-inline static void LaunchUniqueRNG(mshadow::Stream<cpu> *s,
-                                   common::random::RandGenerator<cpu, GType> *gen,
-                                   const int batch_size, const size_t num_sampled,
-                                   std::vector<std::unordered_set<DType>> *results,
+template <typename GType, typename DType, typename OP, typename... Args>
+inline static void LaunchUniqueRNG(mshadow::Stream<cpu>* s,
+                                   common::random::RandGenerator<cpu, GType>* gen,
+                                   const int batch_size,
+                                   const size_t num_sampled,
+                                   std::vector<std::unordered_set<DType>>* results,
                                    Args... args) {
   // minimal check to avoid division by zero, below.
   // if `N` is zero the map operation is a no-op in any case.
-  if (batch_size <= 0 || num_sampled <= 0) return;
+  if (batch_size <= 0 || num_sampled <= 0)
+    return;
   const int nthread = std::min(batch_size, RandGenerator<cpu>::kNumRandomStates);
-  const int step = (batch_size + nthread - 1) / nthread;
+  const int step    = (batch_size + nthread - 1) / nthread;
   Kernel<OP, cpu>::Launch(s, nthread, *gen, batch_size, num_sampled, results, step, args...);
 }
 
 struct UniqueSampleUniformKernel {
-  template<typename GType, typename DType>
-  MSHADOW_XINLINE static void Map(int tid, RandGenerator<cpu, GType> gen,
-                                  const int batch_size, const size_t num_sampled,
-                                  std::vector<std::unordered_set<DType>> *results,
-                                  const int step, const GType log_range_max,
-                                  DType *samples, DType *num_tries) {
+  template <typename GType, typename DType>
+  MSHADOW_XINLINE static void Map(int tid,
+                                  RandGenerator<cpu, GType> gen,
+                                  const int batch_size,
+                                  const size_t num_sampled,
+                                  std::vector<std::unordered_set<DType>>* results,
+                                  const int step,
+                                  const GType log_range_max,
+                                  DType* samples,
+                                  DType* num_tries) {
     const int begin = tid * step;
-    const int end = (tid + 1) * step;
+    const int end   = (tid + 1) * step;
     typename RandGenerator<cpu, GType>::Impl generator(&gen, tid);
     for (int i = begin; i < end && i < batch_size; i++) {
-      auto &result = results->at(i);
+      auto& result   = results->at(i);
       const int base = i * num_sampled;
-      DType tries = 0;
+      DType tries    = 0;
       while (result.size() != num_sampled) {
-        const double x = generator.uniform();
+        const double x    = generator.uniform();
         const DType value = static_cast<DType>(lround(exp(x * log_range_max)) - 1);
         // sampling without replacement
         if (result.find(value) == result.end()) {
@@ -140,31 +146,29 @@ inline void SampleUniqueZifpian(const nnvm::NodeAttrs& attrs,
                                 const std::vector<TBlob>& inputs,
                                 const std::vector<OpReqType>& req,
                                 const std::vector<TBlob>& outputs) {
-  using DType = int64_t;
-  using GType = double;
+  using DType                           = int64_t;
+  using GType                           = double;
   const SampleUniqueZifpianParam& param = nnvm::get<SampleUniqueZifpianParam>(attrs.parsed);
-  const int batch_size = param.shape[0];
-  const size_t num_sampled = static_cast<size_t>(param.shape[1]);
-  const double log_range_max = log(param.range_max);
+  const int batch_size                  = param.shape[0];
+  const size_t num_sampled              = static_cast<size_t>(param.shape[1]);
+  const double log_range_max            = log(param.range_max);
   CHECK_EQ(outputs.size(), 2U);
   CHECK_LE(num_sampled, param.range_max)
-    << "Number of samples cannot exceed the number of possible classes";
+      << "Number of samples cannot exceed the number of possible classes";
   // rand generator resource and result sets
-  RandGenerator<cpu, GType> *pgen = ctx.requested[0].get_parallel_random<cpu, GType>();
+  RandGenerator<cpu, GType>* pgen = ctx.requested[0].get_parallel_random<cpu, GType>();
   std::vector<std::unordered_set<DType>> results(batch_size);
   for (int i = 0; i < batch_size; i++) {
     results[i].reserve(num_sampled);
   }
 
-  DType *num_tries = outputs[1].dptr<DType>();
-  DType *samples = outputs[0].dptr<DType>();
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  LaunchUniqueRNG<GType, DType, UniqueSampleUniformKernel>(s, pgen, batch_size, num_sampled,
-                                                           &results, log_range_max, samples,
-                                                           num_tries);
+  DType* num_tries = outputs[1].dptr<DType>();
+  DType* samples   = outputs[0].dptr<DType>();
+  Stream<cpu>* s   = ctx.get_stream<cpu>();
+  LaunchUniqueRNG<GType, DType, UniqueSampleUniformKernel>(
+      s, pgen, batch_size, num_sampled, &results, log_range_max, samples, num_tries);
 }
 
-
 }  // namespace op
 }  // namespace mxnet
 #endif  // MXNET_OPERATOR_RANDOM_UNIQUE_SAMPLE_OP_H_
diff --git a/src/operator/regression_output-inl.h b/src/operator/regression_output-inl.h
index 671e3c5cae94..adb5270b38a0 100644
--- a/src/operator/regression_output-inl.h
+++ b/src/operator/regression_output-inl.h
@@ -20,7 +20,7 @@
 /*!
  * \file regression_ouput-inl.h
  * \brief Regression output operator.
-*/
+ */
 #ifndef MXNET_OPERATOR_REGRESSION_OUTPUT_INL_H_
 #define MXNET_OPERATOR_REGRESSION_OUTPUT_INL_H_
 
@@ -31,7 +31,6 @@
 #include "./mxnet_op.h"
 #include "./operator_common.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -39,26 +38,28 @@ namespace op {
  * \brief regression namespace
  */
 namespace reg_enum {
-enum RegressionOutputOpInputs {kData, kLabel};
-enum RegressionOutputOutputs {kOut};
-}  // reg_enum
+enum RegressionOutputOpInputs { kData, kLabel };
+enum RegressionOutputOutputs { kOut };
+}  // namespace reg_enum
 
 struct RegressionOutputParam : public dmlc::Parameter<RegressionOutputParam> {
   float grad_scale;
   DMLC_DECLARE_PARAMETER(RegressionOutputParam) {
-    DMLC_DECLARE_FIELD(grad_scale).set_default(1.0f)
-    .describe("Scale the gradient by a float factor");
+    DMLC_DECLARE_FIELD(grad_scale)
+        .set_default(1.0f)
+        .describe("Scale the gradient by a float factor");
   };
 };
 
 inline bool RegressionOpShape(const nnvm::NodeAttrs& attrs,
-                              mxnet::ShapeVector *in_attrs,
-                              mxnet::ShapeVector *out_attrs) {
+                              mxnet::ShapeVector* in_attrs,
+                              mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
   CHECK_EQ(in_attrs->size(), 2U) << "Input:[data, label]";
-  const mxnet::TShape &dshape = in_attrs->at(0);
-  if (!shape_is_known(dshape)) return false;
-  auto &lshape = (*in_attrs)[1];
+  const mxnet::TShape& dshape = in_attrs->at(0);
+  if (!shape_is_known(dshape))
+    return false;
+  auto& lshape = (*in_attrs)[1];
   // if label is not defined, manually build the shape based on dshape
   if (lshape.ndim() == -1) {
     // special treatment for 1D output, to allow 1D label by default.
@@ -70,8 +71,7 @@ inline bool RegressionOpShape(const nnvm::NodeAttrs& attrs,
     }
   } else if (lshape[0] != dshape[0] || lshape.Size() != dshape.Size()) {
     std::ostringstream os;
-    os << "Shape inconsistent, Provided=" << lshape << ','
-       << " inferred shape=" << dshape;
+    os << "Shape inconsistent, Provided=" << lshape << ',' << " inferred shape=" << dshape;
     throw ::mxnet::op::InferShapeError(os.str(), 1);
   }
   out_attrs->clear();
@@ -79,7 +79,7 @@ inline bool RegressionOpShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<bool is_forward>
+template <bool is_forward>
 inline bool RegressionInferStorageType(const nnvm::NodeAttrs& attrs,
                                        const int dev_mask,
                                        DispatchMode* dispatch_mode,
@@ -89,17 +89,17 @@ inline bool RegressionInferStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), is_forward ? 1U : 2U);
   const size_t label_pos = is_forward ? 1U : 0U;
   const auto label_stype = in_attrs->at(label_pos);
-  const auto data_stype = in_attrs->at(1 - label_pos);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const auto data_stype  = in_attrs->at(1 - label_pos);
+  auto& out_stype        = out_attrs->at(0);
+  bool dispatched        = false;
   if (!dispatched && data_stype == kDefaultStorage && label_stype == kDefaultStorage) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
 
   if (!dispatched && data_stype == kDefaultStorage && label_stype == kCSRStorage) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
 
   if (!dispatched) {
@@ -107,7 +107,8 @@ inline bool RegressionInferStorageType(const nnvm::NodeAttrs& attrs,
   }
   // In backward pass, although we don't care about gradients of label,
   // a storage type should be assigned to it.
-  if (!is_forward) type_assign(&out_attrs->at(1), kDefaultStorage);
+  if (!is_forward)
+    type_assign(&out_attrs->at(1), kDefaultStorage);
 
   return dispatched;
 }
@@ -117,40 +118,42 @@ inline bool RegressionInferStorageType(const nnvm::NodeAttrs& attrs,
  * Right hand side of OP has no effect.
  * Parallelize by each row.
  */
-template<typename OP, int req>
+template <typename OP, int req>
 struct DnsCsrSparseKernel {
-  template<typename DType, typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data,
+  template <typename DType, typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
                                   const DType* dns_data,
                                   const DType* csr_data,
                                   const IType* csr_idx,
                                   const RType* csr_indptr,
                                   const nnvm::dim_t row_length) {
     nnvm::dim_t row_i = i * row_length;
-    for (nnvm::dim_t j=csr_indptr[i]; j < csr_indptr[i+1]; j++) {
-      KERNEL_ASSIGN(out_data[row_i + csr_idx[j]], req,
-        OP::Map(dns_data[row_i + csr_idx[j]], csr_data[j]));
+    for (nnvm::dim_t j = csr_indptr[i]; j < csr_indptr[i + 1]; j++) {
+      KERNEL_ASSIGN(
+          out_data[row_i + csr_idx[j]], req, OP::Map(dns_data[row_i + csr_idx[j]], csr_data[j]));
     }
   }
 };
 
-
-template<typename xpu, typename ForwardOp>
-inline void RegressionForwardImpl(mshadow::Stream<xpu> *s, const OpReqType req,
-                                  const TBlob &data, const TBlob &out) {
-  if (req == kNullOp) return;
+template <typename xpu, typename ForwardOp>
+inline void RegressionForwardImpl(mshadow::Stream<xpu>* s,
+                                  const OpReqType req,
+                                  const TBlob& data,
+                                  const TBlob& out) {
+  if (req == kNullOp)
+    return;
   MSHADOW_REAL_TYPE_SWITCH(data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req, Req, {
       const DType* in_data = data.dptr<DType>();
-      DType* out_data = out.dptr<DType>();
+      DType* out_data      = out.dptr<DType>();
       using namespace mxnet_op;
-      Kernel<op_with_req<ForwardOp, Req>, xpu>::Launch(
-        s, out.Size(), out_data, in_data);
+      Kernel<op_with_req<ForwardOp, Req>, xpu>::Launch(s, out.Size(), out_data, in_data);
     });
   });
 }
 
-template<typename xpu, typename ForwardOp>
+template <typename xpu, typename ForwardOp>
 void RegressionForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -158,12 +161,12 @@ void RegressionForward(const nnvm::NodeAttrs& attrs,
                        const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  RegressionForwardImpl<xpu, ForwardOp>(s, req[reg_enum::kOut],
-    inputs[reg_enum::kData], outputs[reg_enum::kOut]);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  RegressionForwardImpl<xpu, ForwardOp>(
+      s, req[reg_enum::kOut], inputs[reg_enum::kData], outputs[reg_enum::kOut]);
 }
 
-template<typename xpu, typename ForwardOp>
+template <typename xpu, typename ForwardOp>
 void RegressionForwardEx(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<NDArray>& inputs,
@@ -173,12 +176,12 @@ void RegressionForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs[reg_enum::kData].storage_type(), kDefaultStorage);
   CHECK_EQ(inputs[reg_enum::kOut].storage_type(), kDefaultStorage);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  RegressionForwardImpl<xpu, ForwardOp>(s, req[reg_enum::kOut],
-    inputs[reg_enum::kData].data(), outputs[reg_enum::kOut].data());
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  RegressionForwardImpl<xpu, ForwardOp>(
+      s, req[reg_enum::kOut], inputs[reg_enum::kData].data(), outputs[reg_enum::kOut].data());
 }
 
-template<typename xpu, typename BackwardOp>
+template <typename xpu, typename BackwardOp>
 void RegressionBackward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -186,68 +189,76 @@ void RegressionBackward(const nnvm::NodeAttrs& attrs,
                         const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 2);
   CHECK_EQ(outputs.size(), 2);
-  if (req[reg_enum::kData] == kNullOp) return;
+  if (req[reg_enum::kData] == kNullOp)
+    return;
   const RegressionOutputParam& param = nnvm::get<RegressionOutputParam>(attrs.parsed);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s            = ctx.get_stream<xpu>();
   // inputs are in_label, out_data
   // outputs are data_grad, label_grad
-  const TBlob& in_label = inputs[0], out_data = inputs[1];
+  const TBlob &in_label = inputs[0], out_data = inputs[1];
   const TBlob& data_grad = outputs[0];
   MSHADOW_REAL_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[reg_enum::kData], Req, {
       const DType* in_label_ptr = in_label.dptr<DType>();
       const DType* out_data_ptr = out_data.dptr<DType>();
-      DType* data_grad_ptr = data_grad.dptr<DType>();
-      const real_t num_output = in_label.Size()/in_label.shape_[0];
+      DType* data_grad_ptr      = data_grad.dptr<DType>();
+      const real_t num_output   = in_label.Size() / in_label.shape_[0];
       using namespace mxnet_op;
       Kernel<op_with_req<BackwardOp, Req>, xpu>::Launch(
-        s, data_grad.Size(), data_grad_ptr, out_data_ptr, in_label_ptr);
+          s, data_grad.Size(), data_grad_ptr, out_data_ptr, in_label_ptr);
       Kernel<op_with_req<mshadow_op::mul, Req>, xpu>::Launch(
-        s, data_grad.Size(), data_grad_ptr, data_grad_ptr,
-        static_cast<DType>(param.grad_scale/num_output));
+          s,
+          data_grad.Size(),
+          data_grad_ptr,
+          data_grad_ptr,
+          static_cast<DType>(param.grad_scale / num_output));
     });
   });
 }
 
-
-template<typename xpu, typename BackwardOp>
-inline void RegressionBackwardCSRImpl(mshadow::Stream<xpu> *s,
+template <typename xpu, typename BackwardOp>
+inline void RegressionBackwardCSRImpl(mshadow::Stream<xpu>* s,
                                       const RegressionOutputParam& param,
                                       const OpReqType req,
-                                      const NDArray &data, const NDArray &label,
-                                      const NDArray &data_grad) {
-  if (req == kNullOp) return;
+                                      const NDArray& data,
+                                      const NDArray& label,
+                                      const NDArray& data_grad) {
+  if (req == kNullOp)
+    return;
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace csr;
-  const mxnet::TShape dshape = data.shape();
-  const nnvm::dim_t num_rows = dshape[0];
+  const mxnet::TShape dshape   = data.shape();
+  const nnvm::dim_t num_rows   = dshape[0];
   const nnvm::dim_t row_length = dshape[1];
   CHECK_EQ(label.aux_type(kIndPtr), label.aux_type(kIdx))
-    << "Type of indices array and index pointer array of the label should be the same";
+      << "Type of indices array and index pointer array of the label should be the same";
   MSHADOW_IDX_TYPE_SWITCH(label.aux_type(kIdx), IType, {
     MSHADOW_REAL_TYPE_SWITCH(label.dtype(), DType, {
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         const IType* label_indptr = label.aux_data(kIndPtr).dptr<IType>();
-        const IType* label_idx = label.aux_data(kIdx).dptr<IType>();
-        const DType* label_data = label.data().dptr<DType>();
-        const DType* data_ptr = data.data().dptr<DType>();
-        DType* grad_ptr = data_grad.data().dptr<DType>();
+        const IType* label_idx    = label.aux_data(kIdx).dptr<IType>();
+        const DType* label_data   = label.data().dptr<DType>();
+        const DType* data_ptr     = data.data().dptr<DType>();
+        DType* grad_ptr           = data_grad.data().dptr<DType>();
         if (req != kWriteInplace) {
-          Kernel<op_with_req<mshadow_op::identity, Req>, xpu>::Launch(s,
-            dshape.Size(), grad_ptr, data_ptr);
+          Kernel<op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
+              s, dshape.Size(), grad_ptr, data_ptr);
         }
-        Kernel<DnsCsrSparseKernel<BackwardOp, Req>, xpu>::Launch(s, num_rows,
-          grad_ptr, data_ptr, label_data, label_idx, label_indptr, row_length);
-        Kernel<op_with_req<mshadow_op::mul, Req>, xpu>::Launch(s, dshape.Size(),
-          grad_ptr, grad_ptr, static_cast<DType>(param.grad_scale/row_length));
+        Kernel<DnsCsrSparseKernel<BackwardOp, Req>, xpu>::Launch(
+            s, num_rows, grad_ptr, data_ptr, label_data, label_idx, label_indptr, row_length);
+        Kernel<op_with_req<mshadow_op::mul, Req>, xpu>::Launch(
+            s,
+            dshape.Size(),
+            grad_ptr,
+            grad_ptr,
+            static_cast<DType>(param.grad_scale / row_length));
       });
     });
   });
 }
 
-
-template<typename xpu, typename BackwardOP>
+template <typename xpu, typename BackwardOP>
 void RegressionBackwardEx(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
@@ -256,19 +267,18 @@ void RegressionBackwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   const RegressionOutputParam& param = nnvm::get<RegressionOutputParam>(attrs.parsed);
-  const auto label_stype = inputs[0].storage_type();
-  const auto data_stype = inputs[1].storage_type();
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const auto label_stype             = inputs[0].storage_type();
+  const auto data_stype              = inputs[1].storage_type();
+  mshadow::Stream<xpu>* s            = ctx.get_stream<xpu>();
   if (data_stype == kDefaultStorage && label_stype == kCSRStorage) {
-    RegressionBackwardCSRImpl<xpu, BackwardOP>(s, param, req[0], inputs[1],
-      inputs[0], outputs[0]);
+    RegressionBackwardCSRImpl<xpu, BackwardOP>(s, param, req[0], inputs[1], inputs[0], outputs[0]);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
 }
 
 struct RegressionOpGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
     std::vector<nnvm::NodeEntry> heads;
@@ -278,7 +288,6 @@ struct RegressionOpGrad {
   }
 };
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/regression_output.cc b/src/operator/regression_output.cc
index a337ec1ca1ad..8c0f21f4abc9 100644
--- a/src/operator/regression_output.cc
+++ b/src/operator/regression_output.cc
@@ -20,57 +20,56 @@
 /*!
  * \file regression_ouput.cc
  * \brief Regression output operator.
-*/
+ */
 
 #include "./regression_output-inl.h"
 #include "./elemwise_op_common.h"
 
-
-#define MXNET_OPERATOR_REGISTER_REGRESSION_FWD(__name$, __kernel$, __bwdop$)           \
-  NNVM_REGISTER_OP(__name$)                                                            \
-  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                   \
-  .set_num_inputs(2)                                                                   \
-  .set_num_outputs(1)                                                                  \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                                  \
-    [](const NodeAttrs& attrs) {                                                       \
-      return std::vector<std::string>{"data", "label"};                                \
-    })                                                                                 \
-  .set_attr<mxnet::FInferShape>("FInferShape", RegressionOpShape)                       \
-  .set_attr<nnvm::FGradient>("FGradient", RegressionOpGrad{__bwdop$})                  \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)                        \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                    \
-  [](const NodeAttrs& attrs){                                                          \
-    return std::vector<std::pair<int, int> >{{0, 0}};                                  \
-  })                                                                                   \
-  .set_attr<FCompute>("FCompute<cpu>", RegressionForward<cpu, __kernel$>)              \
-  .add_argument("data", "NDArray-or-Symbol", "Input data to the function.")            \
-  .add_argument("label", "NDArray-or-Symbol", "Input label to the function.")          \
-  .add_arguments(RegressionOutputParam::__FIELDS__())
-
-#define MXNET_OPERATOR_REGISTER_REGRESSION_BWD(__name$, __kernel$)                      \
-  NNVM_REGISTER_OP(__name$)                                                             \
-  .set_num_inputs(2)                                                                    \
-  .set_num_outputs(2)                                                                   \
-  .set_attr_parser(ParamParser<RegressionOutputParam>)                                  \
-  .set_attr<nnvm::TIsBackward>("TIsBackward", true)                                     \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 2>)                         \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                     \
-  [](const NodeAttrs& attrs){                                                           \
-    return std::vector<std::pair<int, int> >{{1, 0}};                                   \
-  })                                                                                    \
-  .set_attr<FCompute>("FCompute<cpu>", RegressionBackward<cpu, __kernel$>)
+#define MXNET_OPERATOR_REGISTER_REGRESSION_FWD(__name$, __kernel$, __bwdop$)               \
+  NNVM_REGISTER_OP(__name$)                                                                \
+  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                       \
+      .set_num_inputs(2)                                                                   \
+      .set_num_outputs(1)                                                                  \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                  \
+                                       [](const NodeAttrs& attrs) {                        \
+                                         return std::vector<std::string>{"data", "label"}; \
+                                       })                                                  \
+      .set_attr<mxnet::FInferShape>("FInferShape", RegressionOpShape)                      \
+      .set_attr<nnvm::FGradient>("FGradient", RegressionOpGrad{__bwdop$})                  \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)                        \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                    \
+                                      [](const NodeAttrs& attrs) {                         \
+                                        return std::vector<std::pair<int, int> >{{0, 0}};  \
+                                      })                                                   \
+      .set_attr<FCompute>("FCompute<cpu>", RegressionForward<cpu, __kernel$>)              \
+      .add_argument("data", "NDArray-or-Symbol", "Input data to the function.")            \
+      .add_argument("label", "NDArray-or-Symbol", "Input label to the function.")          \
+      .add_arguments(RegressionOutputParam::__FIELDS__())
+
+#define MXNET_OPERATOR_REGISTER_REGRESSION_BWD(__name$, __kernel$)                        \
+  NNVM_REGISTER_OP(__name$)                                                               \
+      .set_num_inputs(2)                                                                  \
+      .set_num_outputs(2)                                                                 \
+      .set_attr_parser(ParamParser<RegressionOutputParam>)                                \
+      .set_attr<nnvm::TIsBackward>("TIsBackward", true)                                   \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 2>)                       \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{1, 0}}; \
+                                      })                                                  \
+      .set_attr<FCompute>("FCompute<cpu>", RegressionBackward<cpu, __kernel$>)
 
 namespace mxnet {
 namespace op {
 
-
 DMLC_REGISTER_PARAMETER(RegressionOutputParam);
 
 MXNET_OPERATOR_REGISTER_REGRESSION_FWD(LinearRegressionOutput,
-  mshadow_op::identity, "_backward_linear_reg_out")
-.set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<true>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", RegressionForwardEx<cpu, mshadow_op::identity>)
-.describe(R"code(Computes and optimizes for squared loss during backward propagation.
+                                       mshadow_op::identity,
+                                       "_backward_linear_reg_out")
+    .set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<true>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", RegressionForwardEx<cpu, mshadow_op::identity>)
+    .describe(R"code(Computes and optimizes for squared loss during backward propagation.
 Just outputs ``data`` during forward propagation.
 
 If :math:`\hat{y}_i` is the predicted value of the i-th sample, and :math:`y_i` is the corresponding target value,
@@ -92,12 +91,13 @@ The parameter `grad_scale` can be used to change this scale to `grad_scale/m`.
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_REGRESSION_BWD(_backward_linear_reg_out, mshadow_op::minus)
-.set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<false>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", RegressionBackwardEx<cpu, mshadow_op::minus>);
+    .set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<false>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", RegressionBackwardEx<cpu, mshadow_op::minus>);
 
 MXNET_OPERATOR_REGISTER_REGRESSION_FWD(MAERegressionOutput,
-  mshadow_op::identity, "_backward_mae_reg_out")
-.describe(R"code(Computes mean absolute error of the input.
+                                       mshadow_op::identity,
+                                       "_backward_mae_reg_out")
+    .describe(R"code(Computes mean absolute error of the input.
 
 MAE is a risk metric corresponding to the expected value of the absolute error.
 
@@ -122,10 +122,11 @@ The parameter `grad_scale` can be used to change this scale to `grad_scale/m`.
 MXNET_OPERATOR_REGISTER_REGRESSION_BWD(_backward_mae_reg_out, mshadow_op::minus_sign);
 
 MXNET_OPERATOR_REGISTER_REGRESSION_FWD(LogisticRegressionOutput,
-  mshadow_op::sigmoid, "_backward_logistic_reg_out")
-.set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<true>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", RegressionForwardEx<cpu, mshadow_op::sigmoid>)
-.describe(R"code(Applies a logistic function to the input.
+                                       mshadow_op::sigmoid,
+                                       "_backward_logistic_reg_out")
+    .set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<true>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", RegressionForwardEx<cpu, mshadow_op::sigmoid>)
+    .describe(R"code(Applies a logistic function to the input.
 
 The logistic function, also known as the sigmoid function, is computed as
 :math:`\frac{1}{1+exp(-\textbf{x})}`.
@@ -152,8 +153,8 @@ The parameter `grad_scale` can be used to change this scale to `grad_scale/m`.
 )code" ADD_FILELINE);
 
 MXNET_OPERATOR_REGISTER_REGRESSION_BWD(_backward_logistic_reg_out, mshadow_op::minus)
-.set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<false>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", RegressionBackwardEx<cpu, mshadow_op::minus>);
+    .set_attr<FInferStorageType>("FInferStorageType", RegressionInferStorageType<false>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", RegressionBackwardEx<cpu, mshadow_op::minus>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/regression_output.cu b/src/operator/regression_output.cu
index ca11b84a212d..cf09ca37095f 100644
--- a/src/operator/regression_output.cu
+++ b/src/operator/regression_output.cu
@@ -20,34 +20,33 @@
 /*!
  * \file regression_ouput.cu
  * \brief Regression output operator.
-*/
+ */
 #include "./regression_output-inl.h"
 
-
 namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(LinearRegressionOutput)
-.set_attr<FCompute>("FCompute<gpu>", RegressionForward<gpu, mshadow_op::identity>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", RegressionForwardEx<gpu, mshadow_op::identity>);
+    .set_attr<FCompute>("FCompute<gpu>", RegressionForward<gpu, mshadow_op::identity>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", RegressionForwardEx<gpu, mshadow_op::identity>);
 
 NNVM_REGISTER_OP(_backward_linear_reg_out)
-.set_attr<FCompute>("FCompute<gpu>", RegressionBackward<gpu, mshadow_op::minus>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", RegressionBackwardEx<gpu, mshadow_op::minus>);
+    .set_attr<FCompute>("FCompute<gpu>", RegressionBackward<gpu, mshadow_op::minus>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", RegressionBackwardEx<gpu, mshadow_op::minus>);
 
 NNVM_REGISTER_OP(MAERegressionOutput)
-.set_attr<FCompute>("FCompute<gpu>", RegressionForward<gpu, mshadow_op::identity>);
+    .set_attr<FCompute>("FCompute<gpu>", RegressionForward<gpu, mshadow_op::identity>);
 
 NNVM_REGISTER_OP(_backward_mae_reg_out)
-.set_attr<FCompute>("FCompute<gpu>", RegressionBackward<gpu, mshadow_op::minus_sign>);
+    .set_attr<FCompute>("FCompute<gpu>", RegressionBackward<gpu, mshadow_op::minus_sign>);
 
 NNVM_REGISTER_OP(LogisticRegressionOutput)
-.set_attr<FCompute>("FCompute<gpu>", RegressionForward<gpu, mshadow_op::sigmoid>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", RegressionForwardEx<gpu, mshadow_op::sigmoid>);
+    .set_attr<FCompute>("FCompute<gpu>", RegressionForward<gpu, mshadow_op::sigmoid>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", RegressionForwardEx<gpu, mshadow_op::sigmoid>);
 
 NNVM_REGISTER_OP(_backward_logistic_reg_out)
-.set_attr<FCompute>("FCompute<gpu>", RegressionBackward<gpu, mshadow_op::minus>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", RegressionBackwardEx<gpu, mshadow_op::minus>);
+    .set_attr<FCompute>("FCompute<gpu>", RegressionBackward<gpu, mshadow_op::minus>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", RegressionBackwardEx<gpu, mshadow_op::minus>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/rnn-inl.h b/src/operator/rnn-inl.h
index 74362e33ac7b..7b1d69bfbff6 100644
--- a/src/operator/rnn-inl.h
+++ b/src/operator/rnn-inl.h
@@ -22,7 +22,7 @@
  * \file rnn-inl.h
  * \brief
  * \author Sebastian Bodenstein, Shu Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_RNN_INL_H_
 #define MXNET_OPERATOR_RNN_INL_H_
 
@@ -53,11 +53,11 @@ namespace mxnet {
 namespace op {
 
 namespace rnn_enum {
-  enum RNNOpInputs {kData, kParams, kState, kStateCell, kSequenceLength};
-  enum RNNOpOutputs {kOut, kStateOut, kStateCellOut};
-  enum RNNModeType {kRnnRelu, kRnnTanh, kLstm, kGru};
-  enum RNNOpResource {kTempSpace, kCuDNNDropoutDescSpace};
-}
+enum RNNOpInputs { kData, kParams, kState, kStateCell, kSequenceLength };
+enum RNNOpOutputs { kOut, kStateOut, kStateCellOut };
+enum RNNModeType { kRnnRelu, kRnnTanh, kLstm, kGru };
+enum RNNOpResource { kTempSpace, kCuDNNDropoutDescSpace };
+}  // namespace rnn_enum
 
 struct RNNParam : public dmlc::Parameter<RNNParam> {
   uint32_t state_size;
@@ -78,54 +78,56 @@ struct RNNParam : public dmlc::Parameter<RNNParam> {
   bool lstm_state_clip_nan;
 
   DMLC_DECLARE_PARAMETER(RNNParam) {
-    DMLC_DECLARE_FIELD(state_size)
-    .describe("size of the state for each layer");
+    DMLC_DECLARE_FIELD(state_size).describe("size of the state for each layer");
 
-    DMLC_DECLARE_FIELD(num_layers)
-    .describe("number of stacked layers");
+    DMLC_DECLARE_FIELD(num_layers).describe("number of stacked layers");
 
-    DMLC_DECLARE_FIELD(bidirectional).set_default(false)
-    .describe("whether to use bidirectional recurrent layers");
+    DMLC_DECLARE_FIELD(bidirectional)
+        .set_default(false)
+        .describe("whether to use bidirectional recurrent layers");
 
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("rnn_relu", rnn_enum::kRnnRelu)
-    .add_enum("rnn_tanh", rnn_enum::kRnnTanh)
-    .add_enum("lstm", rnn_enum::kLstm)
-    .add_enum("gru", rnn_enum::kGru)
-    .describe("the type of RNN to compute");
+        .add_enum("rnn_relu", rnn_enum::kRnnRelu)
+        .add_enum("rnn_tanh", rnn_enum::kRnnTanh)
+        .add_enum("lstm", rnn_enum::kLstm)
+        .add_enum("gru", rnn_enum::kGru)
+        .describe("the type of RNN to compute");
 
-    DMLC_DECLARE_FIELD(p).set_default(0.)
-    .set_range(0, 1)
-    .describe("drop rate of the dropout on the outputs of each RNN layer, except the last layer.");
+    DMLC_DECLARE_FIELD(p).set_default(0.).set_range(0, 1).describe(
+        "drop rate of the dropout on the outputs of each RNN layer, except the last layer.");
 
-    DMLC_DECLARE_FIELD(state_outputs).set_default(false)
-    .describe("Whether to have the states as symbol outputs.");
+    DMLC_DECLARE_FIELD(state_outputs)
+        .set_default(false)
+        .describe("Whether to have the states as symbol outputs.");
 
     DMLC_DECLARE_FIELD(projection_size)
-    .set_default(dmlc::optional<int>())
-    .describe("size of project size");
+        .set_default(dmlc::optional<int>())
+        .describe("size of project size");
 
     DMLC_DECLARE_FIELD(lstm_state_clip_min)
-    .set_default(dmlc::optional<double>())
-    .describe("Minimum clip value of LSTM states. This option must be used together with "
-              "lstm_state_clip_max.");
+        .set_default(dmlc::optional<double>())
+        .describe(
+            "Minimum clip value of LSTM states. This option must be used together with "
+            "lstm_state_clip_max.");
 
     DMLC_DECLARE_FIELD(lstm_state_clip_max)
-    .set_default(dmlc::optional<double>())
-    .describe("Maximum clip value of LSTM states. This option must be used together with "
-              "lstm_state_clip_min.");
+        .set_default(dmlc::optional<double>())
+        .describe(
+            "Maximum clip value of LSTM states. This option must be used together with "
+            "lstm_state_clip_min.");
 
     DMLC_DECLARE_FIELD(lstm_state_clip_nan)
-    .set_default(false)
-    .describe("Whether to stop NaN from propagating in state by clipping it to min/max. "
-              "If clipping range is not specified, this option is ignored.");
+        .set_default(false)
+        .describe(
+            "Whether to stop NaN from propagating in state by clipping it to min/max. "
+            "If clipping range is not specified, this option is ignored.");
 
     DMLC_DECLARE_FIELD(use_sequence_length)
-    .set_default(false)
-    .describe(
-        "If set to true, this layer takes in an extra input parameter "
-        "`sequence_length` "
-        "to specify variable length sequence");
+        .set_default(false)
+        .describe(
+            "If set to true, this layer takes in an extra input parameter "
+            "`sequence_length` "
+            "to specify variable length sequence");
   }
   std::string ComputeMode2String(int mode) {
     switch (mode) {
@@ -144,11 +146,9 @@ struct RNNParam : public dmlc::Parameter<RNNParam> {
     return "";
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
-    std::ostringstream state_size_s, num_layers_s, bidirectional_s,
-                       state_outputs_s, mode_s, p_s,
-                       use_sequence_length_s, projection_size_s,
-                       lstm_state_clip_min_s, lstm_state_clip_max_s,
-                       lstm_state_clip_nan_s;
+    std::ostringstream state_size_s, num_layers_s, bidirectional_s, state_outputs_s, mode_s, p_s,
+        use_sequence_length_s, projection_size_s, lstm_state_clip_min_s, lstm_state_clip_max_s,
+        lstm_state_clip_nan_s;
     state_size_s << state_size;
     num_layers_s << num_layers;
     bidirectional_s << bidirectional;
@@ -160,14 +160,14 @@ struct RNNParam : public dmlc::Parameter<RNNParam> {
     lstm_state_clip_min_s << lstm_state_clip_min;
     lstm_state_clip_max_s << lstm_state_clip_max;
     lstm_state_clip_nan_s << lstm_state_clip_nan;
-    (*dict)["state_size"] = state_size_s.str();
-    (*dict)["num_layers"] = num_layers_s.str();
-    (*dict)["bidirectional"] = bidirectional_s.str();
-    (*dict)["state_outputs"] = state_outputs_s.str();
-    (*dict)["mode"] = ComputeMode2String(mode);
-    (*dict)["p"] = p_s.str();
+    (*dict)["state_size"]          = state_size_s.str();
+    (*dict)["num_layers"]          = num_layers_s.str();
+    (*dict)["bidirectional"]       = bidirectional_s.str();
+    (*dict)["state_outputs"]       = state_outputs_s.str();
+    (*dict)["mode"]                = ComputeMode2String(mode);
+    (*dict)["p"]                   = p_s.str();
     (*dict)["use_sequence_length"] = use_sequence_length_s.str();
-    (*dict)["projection_size"] = projection_size_s.str();
+    (*dict)["projection_size"]     = projection_size_s.str();
     (*dict)["lstm_state_clip_min"] = lstm_state_clip_min_s.str();
     (*dict)["lstm_state_clip_max"] = lstm_state_clip_max_s.str();
     (*dict)["lstm_state_clip_nan"] = lstm_state_clip_nan_s.str();
@@ -175,11 +175,11 @@ struct RNNParam : public dmlc::Parameter<RNNParam> {
 };
 
 inline index_t GetRnnParamSize(int num_layer,
-                           index_t input_size,
-                           int state_size,
-                           int direction,
-                           int mode,
-                           const dmlc::optional<int>& projection_size) {
+                               index_t input_size,
+                               int state_size,
+                               int direction,
+                               int mode,
+                               const dmlc::optional<int>& projection_size) {
   int size = state_size * direction;
   switch (mode) {
     case rnn_enum::kRnnRelu:
@@ -192,12 +192,12 @@ inline index_t GetRnnParamSize(int num_layer,
       size *= 3;
       break;
   }
-  index_t size1 = (input_size + state_size + 2) * size;  // first layer size
+  index_t size1 = (input_size + state_size + 2) * size;              // first layer size
   index_t size2 = (state_size * direction + state_size + 2) * size;  // other layers size
   if (projection_size.has_value()) {
     index_t proj_size = projection_size.value();
-    size1 = (input_size + proj_size + 2) * size;
-    size2 = (proj_size * direction + proj_size + 2) * size;
+    size1             = (input_size + proj_size + 2) * size;
+    size2             = (proj_size * direction + proj_size + 2) * size;
   }
   index_t param_size = size1 + (num_layer - 1) * size2;
   if (projection_size.has_value()) {
@@ -206,10 +206,7 @@ inline index_t GetRnnParamSize(int num_layer,
   return param_size;
 }
 
-inline int GetRnnBiasSize(int num_layer,
-                          int state_size,
-                          int direction,
-                          int mode) {
+inline int GetRnnBiasSize(int num_layer, int state_size, int direction, int mode) {
   int size = 2 * state_size * direction * num_layer;
   switch (mode) {
     case rnn_enum::kRnnRelu:
@@ -244,20 +241,20 @@ inline size_t GetRNNWorkspaceSize(index_t seq_length,
   switch (mode) {
     case rnn_enum::kLstm:
       size = seq_length * batch_size * hidden_size * (4 + direction) +  // wx*x + inter-y
-          batch_size * hidden_size * 6 +                                // wh*h + h + c
-          seq_length * hidden_size * 8 +                   // Used in Backward, Δbx, Δbh
-          // temporary dy in backward computation for bidirectional layers
-          seq_length * batch_size * hidden_size * (direction - 1 ? direction : 0);
+             batch_size * hidden_size * 6 +                             // wh*h + h + c
+             seq_length * hidden_size * 8 +  // Used in Backward, Δbx, Δbh
+             // temporary dy in backward computation for bidirectional layers
+             seq_length * batch_size * hidden_size * (direction - 1 ? direction : 0);
       break;
     case rnn_enum::kGru:
       // Differs with Lstm, the outputs of three gates are also held in memory
       size = seq_length * batch_size * hidden_size * direction * (3 + 1) +  // wx*x + inter-y
-          batch_size * hidden_size * (6 + direction);                       // wh*h + h + Ngates
+             batch_size * hidden_size * (6 + direction);                    // wh*h + h + Ngates
       break;
     case rnn_enum::kRnnRelu:
     case rnn_enum::kRnnTanh:
       size = seq_length * batch_size * hidden_size * direction * 2 +  // wx*x + inter-y
-          batch_size * hidden_size * (1 + direction);                 // h + Ngates
+             batch_size * hidden_size * (1 + direction);              // h + Ngates
       break;
     default:
       LOG(FATAL) << "unknown RNN mode " << mode;
@@ -279,14 +276,14 @@ inline size_t GetRNNReserveSpaceSize(int num_layer,
       break;
     case rnn_enum::kGru:
       size = seq_length * batch_size * hidden_size * direction * (num_layer * 9 - 1) +
-          batch_size * hidden_size * direction * 9 + hidden_size * seq_length * 6 +
-          seq_length * batch_size * 7 * hidden_size * direction;
+             batch_size * hidden_size * direction * 9 + hidden_size * seq_length * 6 +
+             seq_length * batch_size * 7 * hidden_size * direction;
       break;
     case rnn_enum::kRnnRelu:
     case rnn_enum::kRnnTanh:
       size = seq_length * batch_size * hidden_size * direction * (num_layer * 6 - 1) +
-          batch_size * hidden_size * direction * 3 + hidden_size * seq_length * 2 +
-          seq_length * batch_size * 2 * hidden_size * direction;
+             batch_size * hidden_size * direction * 3 + hidden_size * seq_length * 2 +
+             seq_length * batch_size * 2 * hidden_size * direction;
       break;
     default:
       LOG(FATAL) << "unknown RNN mode " << mode;
@@ -297,7 +294,8 @@ inline size_t GetRNNReserveSpaceSize(int num_layer,
 
 inline size_t GetNumInputArguments(RNNParam param_) {
   size_t num_inputs = (param_.mode == rnn_enum::kLstm) ? 4U : 3U;
-  if (param_.use_sequence_length) num_inputs += 1U;
+  if (param_.use_sequence_length)
+    num_inputs += 1U;
   return num_inputs;
 }
 
@@ -347,23 +345,66 @@ void RNNForwardTraining(DType* ws,
                         DType* cy_ptr,
                         const float dropout,
                         int mode,
-                        std::mt19937 &rnd_engine) {  // NOLINT(runtime/references)
+                        std::mt19937& rnd_engine) {  // NOLINT(runtime/references)
   switch (mode) {
     case rnn_enum::kLstm:
-      LstmForwardTraining<DType>(ws, rs, state_outputs, num_layers, direction, seq_length,
-                                 batch_size, input_size, state_size, x_ptr, hx_ptr, cx_ptr,
-                                 w_ptr, b_ptr, y_ptr, hy_ptr, cy_ptr, dropout, rnd_engine);
+      LstmForwardTraining<DType>(ws,
+                                 rs,
+                                 state_outputs,
+                                 num_layers,
+                                 direction,
+                                 seq_length,
+                                 batch_size,
+                                 input_size,
+                                 state_size,
+                                 x_ptr,
+                                 hx_ptr,
+                                 cx_ptr,
+                                 w_ptr,
+                                 b_ptr,
+                                 y_ptr,
+                                 hy_ptr,
+                                 cy_ptr,
+                                 dropout,
+                                 rnd_engine);
       break;
     case rnn_enum::kGru:
-      GruForwardTraining<DType>(ws, rs, state_outputs, num_layers, direction, seq_length,
-                                batch_size, input_size, state_size, x_ptr, hx_ptr,
-                                w_ptr, y_ptr, hy_ptr, dropout, rnd_engine);
+      GruForwardTraining<DType>(ws,
+                                rs,
+                                state_outputs,
+                                num_layers,
+                                direction,
+                                seq_length,
+                                batch_size,
+                                input_size,
+                                state_size,
+                                x_ptr,
+                                hx_ptr,
+                                w_ptr,
+                                y_ptr,
+                                hy_ptr,
+                                dropout,
+                                rnd_engine);
       break;
     case rnn_enum::kRnnTanh:
     case rnn_enum::kRnnRelu:
-      VanillaRNNForwardTraining<DType>(ws, rs, state_outputs, num_layers, direction, seq_length,
-                                       batch_size, input_size, state_size, x_ptr, hx_ptr,
-                                       w_ptr, y_ptr, hy_ptr, dropout, mode, rnd_engine);
+      VanillaRNNForwardTraining<DType>(ws,
+                                       rs,
+                                       state_outputs,
+                                       num_layers,
+                                       direction,
+                                       seq_length,
+                                       batch_size,
+                                       input_size,
+                                       state_size,
+                                       x_ptr,
+                                       hx_ptr,
+                                       w_ptr,
+                                       y_ptr,
+                                       hy_ptr,
+                                       dropout,
+                                       mode,
+                                       rnd_engine);
       break;
     default:
       LOG(FATAL) << "unknown RNN mode " << mode;
@@ -392,20 +433,55 @@ void RNNForwardInference(DType* ws,
                          int mode) {
   switch (mode) {
     case rnn_enum::kLstm:
-      LstmForwardInference<DType>(ws, state_outputs, num_layers, direction, seq_length,
-                                  batch_size, input_size, state_size, projection_size,
-                                  x_ptr, hx_ptr, cx_ptr, w_ptr, b_ptr, y_ptr, hy_ptr, cy_ptr);
+      LstmForwardInference<DType>(ws,
+                                  state_outputs,
+                                  num_layers,
+                                  direction,
+                                  seq_length,
+                                  batch_size,
+                                  input_size,
+                                  state_size,
+                                  projection_size,
+                                  x_ptr,
+                                  hx_ptr,
+                                  cx_ptr,
+                                  w_ptr,
+                                  b_ptr,
+                                  y_ptr,
+                                  hy_ptr,
+                                  cy_ptr);
       break;
     case rnn_enum::kGru:
-      GruForwardInference<DType>(ws, state_outputs, num_layers, direction, seq_length,
-                                 batch_size, input_size, state_size, x_ptr, hx_ptr,
-                                 w_ptr, y_ptr, hy_ptr);
+      GruForwardInference<DType>(ws,
+                                 state_outputs,
+                                 num_layers,
+                                 direction,
+                                 seq_length,
+                                 batch_size,
+                                 input_size,
+                                 state_size,
+                                 x_ptr,
+                                 hx_ptr,
+                                 w_ptr,
+                                 y_ptr,
+                                 hy_ptr);
       break;
     case rnn_enum::kRnnTanh:
     case rnn_enum::kRnnRelu:
-      VanillaRNNForwardInference<DType>(ws, state_outputs, num_layers, direction, seq_length,
-                                        batch_size, input_size, state_size, x_ptr, hx_ptr,
-                                        w_ptr, y_ptr, hy_ptr, mode);
+      VanillaRNNForwardInference<DType>(ws,
+                                        state_outputs,
+                                        num_layers,
+                                        direction,
+                                        seq_length,
+                                        batch_size,
+                                        input_size,
+                                        state_size,
+                                        x_ptr,
+                                        hx_ptr,
+                                        w_ptr,
+                                        y_ptr,
+                                        hy_ptr,
+                                        mode);
       break;
     default:
       LOG(FATAL) << "unknown RNN mode" << mode;
@@ -443,23 +519,78 @@ void RNNBackward(DType* ws,
                  int mode) {
   switch (mode) {
     case rnn_enum::kLstm:
-      LstmBackward<DType>(ws, rs, num_layers, direction, seq_length, batch_size,
-                          input_size, state_size, x_ptr, hx_ptr, cx_ptr, w_ptr, y_ptr,
-                          dy_ptr, dhy_ptr, dcy_ptr, dx_ptr, dhx_ptr, dcx_ptr, dw_ptr, db_ptr,
-                          req_data, req_params, req_state, req_statecell, dropout);
+      LstmBackward<DType>(ws,
+                          rs,
+                          num_layers,
+                          direction,
+                          seq_length,
+                          batch_size,
+                          input_size,
+                          state_size,
+                          x_ptr,
+                          hx_ptr,
+                          cx_ptr,
+                          w_ptr,
+                          y_ptr,
+                          dy_ptr,
+                          dhy_ptr,
+                          dcy_ptr,
+                          dx_ptr,
+                          dhx_ptr,
+                          dcx_ptr,
+                          dw_ptr,
+                          db_ptr,
+                          req_data,
+                          req_params,
+                          req_state,
+                          req_statecell,
+                          dropout);
       break;
     case rnn_enum::kGru:
-      GruBackward<DType>(ws, rs, num_layers, direction, seq_length, batch_size,
-                         input_size, state_size, x_ptr, hx_ptr, w_ptr,
-                         dy_ptr, dhy_ptr, dx_ptr, dhx_ptr, dw_ptr,
-                         req_data, req_params, req_state, dropout);
+      GruBackward<DType>(ws,
+                         rs,
+                         num_layers,
+                         direction,
+                         seq_length,
+                         batch_size,
+                         input_size,
+                         state_size,
+                         x_ptr,
+                         hx_ptr,
+                         w_ptr,
+                         dy_ptr,
+                         dhy_ptr,
+                         dx_ptr,
+                         dhx_ptr,
+                         dw_ptr,
+                         req_data,
+                         req_params,
+                         req_state,
+                         dropout);
       break;
     case rnn_enum::kRnnTanh:
     case rnn_enum::kRnnRelu:
-      VanillaRNNBackward<DType>(ws, rs, num_layers, direction, seq_length, batch_size,
-                                input_size, state_size, x_ptr, hx_ptr, w_ptr,
-                                dy_ptr, dhy_ptr, dx_ptr, dhx_ptr, dw_ptr,
-                                req_data, req_params, req_state, dropout, mode);
+      VanillaRNNBackward<DType>(ws,
+                                rs,
+                                num_layers,
+                                direction,
+                                seq_length,
+                                batch_size,
+                                input_size,
+                                state_size,
+                                x_ptr,
+                                hx_ptr,
+                                w_ptr,
+                                dy_ptr,
+                                dhy_ptr,
+                                dx_ptr,
+                                dhx_ptr,
+                                dw_ptr,
+                                req_data,
+                                req_params,
+                                req_state,
+                                dropout,
+                                mode);
       break;
     default:
       LOG(FATAL) << "unknown RNN mode" << mode;
@@ -467,7 +598,7 @@ void RNNBackward(DType* ws,
   }
 }
 
-template<typename xpu, typename DType, typename IType>
+template <typename xpu, typename DType, typename IType>
 class RNNOp {
  public:
   RNNParam param_;
@@ -475,12 +606,12 @@ class RNNOp {
 
   explicit RNNOp(RNNParam param, Context ctx) {
     this->param_ = param;
-    this->ctx_ = ctx;
+    this->ctx_   = ctx;
 
     if (ctx_.dev_type == kGPU) {
 #if MXNET_USE_CUDNN == 1
       init_cudnn_ = false;
-      dtype_ = mshadow::DataType<DType>::kCudnnFlag;
+      dtype_      = mshadow::DataType<DType>::kCudnnFlag;
       // TensorCore algos only allowed on fp16-I/O convolutions if permitted by the global policy.
       // No tests in place for fp16 RNNs, so leave TensorCore disabled for now.
       cudnn_tensor_core_ = false;
@@ -508,29 +639,25 @@ class RNNOp {
       }
 #if MXNET_USE_CUDNN_GE_7200
       if (param_.projection_size.has_value()) {
-        CHECK_EQ(param_.mode, rnn_enum::kLstm)
-          << "Projection is only supported for LSTM.";
+        CHECK_EQ(param_.mode, rnn_enum::kLstm) << "Projection is only supported for LSTM.";
         CHECK_GE(param_.state_size, param_.projection_size.value())
-          << "State size must be larger than projection size.";
+            << "State size must be larger than projection size.";
       }
 #else
       CHECK(!param_.projection_size.has_value())
-        << "Projection is only supported for LSTM with CuDNN version later than 7.1.1.";
+          << "Projection is only supported for LSTM with CuDNN version later than 7.1.1.";
 #endif  // MXNET_USE_CUDNN_GE_7200
 #if MXNET_USE_CUDNN_GE_7200
-      if (param_.lstm_state_clip_min.has_value()
-          || param_.lstm_state_clip_max.has_value()) {
-        CHECK_EQ(param_.mode, rnn_enum::kLstm)
-          << "State clipping is only supported for LSTM.";
+      if (param_.lstm_state_clip_min.has_value() || param_.lstm_state_clip_max.has_value()) {
+        CHECK_EQ(param_.mode, rnn_enum::kLstm) << "State clipping is only supported for LSTM.";
         CHECK(param_.lstm_state_clip_min.has_value() && param_.lstm_state_clip_max.has_value())
-          << "lstm_state_clip_min and lstm_state_clip_max must be specified together.";
+            << "lstm_state_clip_min and lstm_state_clip_max must be specified together.";
         CHECK_GE(param_.lstm_state_clip_max.value(), param_.lstm_state_clip_min.value())
-          << "lstm_state_clip_max must be greater or equal to lstm_state_clip_min";
+            << "lstm_state_clip_max must be greater or equal to lstm_state_clip_min";
       }
 #else
-      CHECK(!param_.lstm_state_clip_min.has_value()
-            && !param_.lstm_state_clip_max.has_value())
-        << "State clipping is only supported for LSTM with CuDNN version later than 7.2.1.";
+      CHECK(!param_.lstm_state_clip_min.has_value() && !param_.lstm_state_clip_max.has_value())
+          << "State clipping is only supported for LSTM with CuDNN version later than 7.2.1.";
 #endif  // MXNET_USE_CUDNN_GE_7200
       // RNN Direction
       direction_ = param_.bidirectional ? CUDNN_BIDIRECTIONAL : CUDNN_UNIDIRECTIONAL;
@@ -564,13 +691,12 @@ class RNNOp {
     }
 
     if (ctx_.dev_type == kCPU) {
-      this->init_space_ = false;
-      this->temp_init_space_ = false;
+      this->init_space_             = false;
+      this->temp_init_space_        = false;
       this->reserve_cpu_space_size_ = 0;
-      this->temp_cpu_space_size_ = 0;
+      this->temp_cpu_space_size_    = 0;
 
-      if (param_.lstm_state_clip_min.has_value()
-          || param_.lstm_state_clip_max.has_value()) {
+      if (param_.lstm_state_clip_min.has_value() || param_.lstm_state_clip_max.has_value()) {
         LOG(FATAL) << "LSTM state clipping is only supported for GPU with CuDNN later than 7.2.1";
       }
     }
@@ -579,49 +705,50 @@ class RNNOp {
   ~RNNOp() {
     if (ctx_.dev_type == kGPU) {
 #if MXNET_USE_CUDNN == 1
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(hx_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(cx_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(hy_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(cy_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(dhx_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(dcx_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(dhy_desc_));
-    CUDNN_CALL(cudnnDestroyTensorDescriptor(dcy_desc_));
-
-    CUDNN_CALL(cudnnDestroyFilterDescriptor(w_desc_));
-    CUDNN_CALL(cudnnDestroyFilterDescriptor(dw_desc_));
-    CUDNN_CALL(cudnnDestroyRNNDescriptor(rnn_desc_));
-    CUDNN_CALL(cudnnDestroyDropoutDescriptor(dropout_desc_));
-    if (dgrad_sync_event_created_)
-      CUDA_CALL(cudaEventDestroy(dgrad_sync_event_));
-
-    if (init_cudnn_) {
-      for (size_t i = 0; i < x_desc_vec_.size(); ++i) {
-        CUDNN_CALL(cudnnDestroyTensorDescriptor(x_desc_vec_[i]));
-        CUDNN_CALL(cudnnDestroyTensorDescriptor(y_desc_vec_[i]));
-        CUDNN_CALL(cudnnDestroyTensorDescriptor(dx_desc_vec_[i]));
-        CUDNN_CALL(cudnnDestroyTensorDescriptor(dy_desc_vec_[i]));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(hx_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(cx_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(hy_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(cy_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(dhx_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(dcx_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(dhy_desc_));
+      CUDNN_CALL(cudnnDestroyTensorDescriptor(dcy_desc_));
+
+      CUDNN_CALL(cudnnDestroyFilterDescriptor(w_desc_));
+      CUDNN_CALL(cudnnDestroyFilterDescriptor(dw_desc_));
+      CUDNN_CALL(cudnnDestroyRNNDescriptor(rnn_desc_));
+      CUDNN_CALL(cudnnDestroyDropoutDescriptor(dropout_desc_));
+      if (dgrad_sync_event_created_)
+        CUDA_CALL(cudaEventDestroy(dgrad_sync_event_));
+
+      if (init_cudnn_) {
+        for (size_t i = 0; i < x_desc_vec_.size(); ++i) {
+          CUDNN_CALL(cudnnDestroyTensorDescriptor(x_desc_vec_[i]));
+          CUDNN_CALL(cudnnDestroyTensorDescriptor(y_desc_vec_[i]));
+          CUDNN_CALL(cudnnDestroyTensorDescriptor(dx_desc_vec_[i]));
+          CUDNN_CALL(cudnnDestroyTensorDescriptor(dy_desc_vec_[i]));
+        }
+        init_cudnn_ = false;
+        Storage::Get()->Free(reserve_space_);
       }
-      init_cudnn_ = false;
-      Storage::Get()->Free(reserve_space_);
-    }
 #if MXNET_USE_CUDNN_GE_7200
-    CUDNN_CALL(cudnnDestroyRNNDataDescriptor(x_data_desc_));
-    CUDNN_CALL(cudnnDestroyRNNDataDescriptor(y_data_desc_));
-    CUDNN_CALL(cudnnDestroyRNNDataDescriptor(dx_data_desc_));
-    CUDNN_CALL(cudnnDestroyRNNDataDescriptor(dy_data_desc_));
+      CUDNN_CALL(cudnnDestroyRNNDataDescriptor(x_data_desc_));
+      CUDNN_CALL(cudnnDestroyRNNDataDescriptor(y_data_desc_));
+      CUDNN_CALL(cudnnDestroyRNNDataDescriptor(dx_data_desc_));
+      CUDNN_CALL(cudnnDestroyRNNDataDescriptor(dy_data_desc_));
 #endif  // MXNET_USE_CUDNN_GE_7200
 #endif  // MXNET_USE_CUDNN
     }
   }
 
-  void Forward(const OpContext &ctx, const std::vector<TBlob> &in_data,
-               const std::vector<OpReqType> &req,
-               const std::vector<TBlob> &out_data) {
+  void Forward(const OpContext& ctx,
+               const std::vector<TBlob>& in_data,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& out_data) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK(param_.p >= 0.0f && param_.p < 1.0f)
-      << "unsupported dropout value, should be 0 <= dropout < 1";
+        << "unsupported dropout value, should be 0 <= dropout < 1";
     size_t num_inputs = GetNumInputArguments(param_);
 
     //  kOut
@@ -633,13 +760,13 @@ class RNNOp {
 
     CHECK_EQ(in_data.size(), num_inputs);
     CHECK_EQ(out_data.size(), num_outputs);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     // get input + output tensors
-    Tensor<xpu, 3, DType> x = in_data[rnn_enum::kData].get<xpu, 3, DType>(s);
-    Tensor<xpu, 1, DType> w = in_data[rnn_enum::kParams].get<xpu, 1, DType>(s);
+    Tensor<xpu, 3, DType> x  = in_data[rnn_enum::kData].get<xpu, 3, DType>(s);
+    Tensor<xpu, 1, DType> w  = in_data[rnn_enum::kParams].get<xpu, 1, DType>(s);
     Tensor<xpu, 3, DType> hx = in_data[rnn_enum::kState].get<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> y = out_data[rnn_enum::kOut].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> y  = out_data[rnn_enum::kOut].get<xpu, 3, DType>(s);
 
     param_.seq_length_ = x.shape_[0];
     param_.batch_size_ = x.shape_[1];
@@ -647,37 +774,34 @@ class RNNOp {
 
     const int direction = param_.bidirectional ? 2 : 1;
     const int bsize = GetRnnBiasSize(param_.num_layers, param_.state_size, direction, param_.mode);
-    DType* b_ptr = w.dptr_ + w.shape_[0] - bsize;
+    DType* b_ptr    = w.dptr_ + w.shape_[0] - bsize;
 
     DType* hy_ptr = nullptr;
     if (param_.state_outputs) {
       hy_ptr = out_data[rnn_enum::kStateOut].dptr<DType>();
     }
 
-
 #if MXNET_USE_CUDNN_GE_7200
     Tensor<cpu, 1, char> host_workspace;
-    int *sequence_length_cpu_int = nullptr;
-    IType *sequence_length_cpu_itype = nullptr;
+    int* sequence_length_cpu_int     = nullptr;
+    IType* sequence_length_cpu_itype = nullptr;
 
     if (ctx_.dev_type == kGPU) {
       int host_workspace_bytes =
-        param_.batch_size_ * sizeof(IType) + param_.batch_size_ * sizeof(int);
+          param_.batch_size_ * sizeof(IType) + param_.batch_size_ * sizeof(int);
 
-      host_workspace =
-        ctx.requested[rnn_enum::kTempSpace].get_host_space_typed<1, char>(
-            Shape1(host_workspace_bytes));
+      host_workspace = ctx.requested[rnn_enum::kTempSpace].get_host_space_typed<1, char>(
+          Shape1(host_workspace_bytes));
 
       sequence_length_cpu_int = reinterpret_cast<int*>(host_workspace.dptr_);
       sequence_length_cpu_itype =
-        reinterpret_cast<IType*>(host_workspace.dptr_ + sizeof(int) * param_.batch_size_);
+          reinterpret_cast<IType*>(host_workspace.dptr_ + sizeof(int) * param_.batch_size_);
 
       (void)sequence_length_cpu_int;
       (void)sequence_length_cpu_itype;
     }
 #endif
 
-
     if (param_.use_sequence_length) {
 #if MXNET_USE_CUDNN_GE_7200
       if (ctx_.dev_type == kCPU) {
@@ -687,17 +811,19 @@ class RNNOp {
 
       // We can assume we are on GPU for now
       size_t seq_len_input_idx = rnn_enum::kSequenceLength;
-      if  (param_.mode != rnn_enum::kLstm) {
+      if (param_.mode != rnn_enum::kLstm) {
         seq_len_input_idx -= 1;
       }
-      IType *sequence_length_ptr_gpu = (in_data[seq_len_input_idx].get<xpu, 1, IType>(s)).dptr_;
+      IType* sequence_length_ptr_gpu = (in_data[seq_len_input_idx].get<xpu, 1, IType>(s)).dptr_;
 
       // Need to copy from GPU -> CPU, becuase cuDNN API requires this array on CPU memory.
       // TODO(stephenrawls): In future, allow users to pass this array on the CPU so we don't have
       //   to do this copy For now however it is required as several places in backend assume that
       //   all data arrays share the same context.
-      CUDA_CALL(cudaMemcpy(sequence_length_cpu_itype,  sequence_length_ptr_gpu,
-                           sizeof(IType) * param_.batch_size_, cudaMemcpyDeviceToHost));
+      CUDA_CALL(cudaMemcpy(sequence_length_cpu_itype,
+                           sequence_length_ptr_gpu,
+                           sizeof(IType) * param_.batch_size_,
+                           cudaMemcpyDeviceToHost));
 #else
       LOG(FATAL) << "RNN use_sequence_length option is only available for cuDNN version >= 7.2";
 #endif
@@ -752,7 +878,7 @@ class RNNOp {
                                          sequence_length_cpu_int,
                                          reinterpret_cast<void*>(&padding_fill_)));
     int out_size =
-      (param_.projection_size.has_value()) ? param_.projection_size.value() : param_.state_size;
+        (param_.projection_size.has_value()) ? param_.projection_size.value() : param_.state_size;
     out_size = (param_.bidirectional) ? (out_size * 2) : out_size;
     CUDNN_CALL(cudnnSetRNNDataDescriptor(y_data_desc_,
                                          dtype_,
@@ -782,7 +908,7 @@ class RNNOp {
     }
 
     bool clip_state = param_.lstm_state_clip_min.has_value();
-    bool clip_nan = param_.lstm_state_clip_nan;
+    bool clip_nan   = param_.lstm_state_clip_nan;
     CUDNN_CALL(cudnnRNNSetClip(s->dnn_handle_,
                                rnn_desc_,
                                clip_state ? CUDNN_RNN_CLIP_MINMAX : CUDNN_RNN_CLIP_NONE,
@@ -904,33 +1030,44 @@ class RNNOp {
       }
 
       // allocate temp space
-      const size_t work_cpu_space_size = GetRNNWorkspaceSize(param_.seq_length_, param_.batch_size_,
-          param_.state_size, projection_size, direction, param_.mode);
+      const size_t work_cpu_space_size = GetRNNWorkspaceSize(param_.seq_length_,
+                                                             param_.batch_size_,
+                                                             param_.state_size,
+                                                             projection_size,
+                                                             direction,
+                                                             param_.mode);
       if (!temp_init_space_ || temp_cpu_space_size_ < work_cpu_space_size) {
         temp_cpu_space_size_ = work_cpu_space_size;
-        temp_cpu_space_ = NDArray(TShape({static_cast<dim_t>(temp_cpu_space_size_)}), ctx_,
-            false, in_data[rnn_enum::kData].type_flag_);
-        temp_init_space_ = true;
+        temp_cpu_space_      = NDArray(TShape({static_cast<dim_t>(temp_cpu_space_size_)}),
+                                  ctx_,
+                                  false,
+                                  in_data[rnn_enum::kData].type_flag_);
+        temp_init_space_     = true;
       }
       DType* work_cpu_space = static_cast<DType*>(temp_cpu_space_.data().dptr_);
 
       if (ctx.is_train || ctx.need_grad) {
-        mshadow::Random<cpu, unsigned> *prnd = ctx.requested[0].get_random<xpu, unsigned int>(s);
-        std::mt19937 &rnd_engine = prnd->GetRndEngine();
+        mshadow::Random<cpu, unsigned>* prnd = ctx.requested[0].get_random<xpu, unsigned int>(s);
+        std::mt19937& rnd_engine             = prnd->GetRndEngine();
 
         // allocate reserve space
         if (param_.projection_size.has_value()) {
           LOG(FATAL) << "No training support for LSTM with projection on CPU currently.";
         }
 
-        const size_t r_size = GetRNNReserveSpaceSize(param_.num_layers, direction,
-                                                     param_.seq_length_, param_.batch_size_,
-                                                     param_.state_size, param_.mode);
+        const size_t r_size = GetRNNReserveSpaceSize(param_.num_layers,
+                                                     direction,
+                                                     param_.seq_length_,
+                                                     param_.batch_size_,
+                                                     param_.state_size,
+                                                     param_.mode);
         if (!init_space_ || reserve_cpu_space_size_ < r_size) {
           reserve_cpu_space_size_ = r_size;
-          reserve_cpu_space_ = NDArray(TShape({static_cast<dim_t>(reserve_cpu_space_size_)}), ctx_,
-              false, in_data[rnn_enum::kData].type_flag_);
-          init_space_ = true;
+          reserve_cpu_space_      = NDArray(TShape({static_cast<dim_t>(reserve_cpu_space_size_)}),
+                                       ctx_,
+                                       false,
+                                       in_data[rnn_enum::kData].type_flag_);
+          init_space_             = true;
         }
         DType* reserve_space_ptr = static_cast<DType*>(reserve_cpu_space_.data().dptr_);
 
@@ -978,12 +1115,12 @@ class RNNOp {
 #endif
   }
 
-  void Backward(const OpContext &ctx,
-                const std::vector<TBlob> &out_grad,
-                const std::vector<TBlob> &in_data,
-                const std::vector<TBlob> &out_data,
-                const std::vector<OpReqType> &req,
-                const std::vector<TBlob> &in_grad) {
+  void Backward(const OpContext& ctx,
+                const std::vector<TBlob>& out_grad,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req,
+                const std::vector<TBlob>& in_grad) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK(param_.p >= 0.0f && param_.p < 1.0f)
@@ -1005,16 +1142,16 @@ class RNNOp {
     CHECK_EQ(req.size(), num_inputs);
     CHECK_NE(req[rnn_enum::kData], kAddTo) << "AddTo is not supported for data";
     CHECK_NE(req[rnn_enum::kState], kAddTo) << "AddTo is not supported for state";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // get input + output tensors
-    Tensor<xpu, 3, DType> x = in_data[rnn_enum::kData].get<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> dx = in_grad[rnn_enum::kData].get<xpu, 3, DType>(s);
-    Tensor<xpu, 1, DType> w = in_data[rnn_enum::kParams].get<xpu, 1, DType>(s);
-    Tensor<xpu, 1, DType> dw = in_grad[rnn_enum::kParams].get<xpu, 1, DType>(s);
-    Tensor<xpu, 3, DType> hx = in_data[rnn_enum::kState].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> x   = in_data[rnn_enum::kData].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> dx  = in_grad[rnn_enum::kData].get<xpu, 3, DType>(s);
+    Tensor<xpu, 1, DType> w   = in_data[rnn_enum::kParams].get<xpu, 1, DType>(s);
+    Tensor<xpu, 1, DType> dw  = in_grad[rnn_enum::kParams].get<xpu, 1, DType>(s);
+    Tensor<xpu, 3, DType> hx  = in_data[rnn_enum::kState].get<xpu, 3, DType>(s);
     Tensor<xpu, 3, DType> dhx = in_grad[rnn_enum::kState].get<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> y = out_data[rnn_enum::kOut].get<xpu, 3, DType>(s);
-    Tensor<xpu, 3, DType> dy = out_grad[rnn_enum::kOut].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> y   = out_data[rnn_enum::kOut].get<xpu, 3, DType>(s);
+    Tensor<xpu, 3, DType> dy  = out_grad[rnn_enum::kOut].get<xpu, 3, DType>(s);
 
     CHECK_EQ(x.CheckContiguous(), true);
     CHECK_EQ(w.CheckContiguous(), true);
@@ -1038,22 +1175,22 @@ class RNNOp {
 
     DType* db_ptr = dw.dptr_ + w.shape_[0] - bsize;
 
-    DType * dhy_ptr = nullptr;
+    DType* dhy_ptr = nullptr;
     if (param_.state_outputs) {
       dhy_ptr = out_grad[rnn_enum::kStateOut].dptr<DType>();
     }
 
     DType* dcx_ptr = nullptr;
     DType* dcy_ptr = nullptr;
-    DType* cx_ptr = nullptr;
+    DType* cx_ptr  = nullptr;
 
     if (param_.mode == rnn_enum::kLstm) {
       CHECK_NE(req[rnn_enum::kStateCell], kAddTo) << "AddTo is not supported for state cell";
-      cx_ptr = (in_data[rnn_enum::kStateCell].get<xpu, 3, DType>(s)).dptr_;
+      cx_ptr  = (in_data[rnn_enum::kStateCell].get<xpu, 3, DType>(s)).dptr_;
       dcx_ptr = (in_grad[rnn_enum::kStateCell].get<xpu, 3, DType>(s)).dptr_;
     }
     if ((param_.mode == rnn_enum::kLstm) && param_.state_outputs) {
-        dcy_ptr = (out_grad[rnn_enum::kStateCellOut].get<xpu, 3, DType>(s)).dptr_;
+      dcy_ptr = (out_grad[rnn_enum::kStateCellOut].get<xpu, 3, DType>(s)).dptr_;
     }
 
 #if MXNET_USE_CUDNN == 1 && defined(__CUDACC__)
@@ -1173,16 +1310,22 @@ class RNNOp {
       }
 
       // allocate temp space
-      const size_t work_cpu_space_size =
-          GetRNNWorkspaceSize(param_.seq_length_, param_.batch_size_, param_.state_size,
-                              projection_size, direction, param_.mode);
+      const size_t work_cpu_space_size = GetRNNWorkspaceSize(param_.seq_length_,
+                                                             param_.batch_size_,
+                                                             param_.state_size,
+                                                             projection_size,
+                                                             direction,
+                                                             param_.mode);
       if (!temp_init_space_ || temp_cpu_space_size_ != work_cpu_space_size) {
         LOG(FATAL) << "Check temp init error";
       }
       DType* work_cpu_space = static_cast<DType*>(temp_cpu_space_.data().dptr_);
-      size_t r_size = GetRNNReserveSpaceSize(param_.num_layers, direction,
-                                             param_.seq_length_, param_.batch_size_,
-                                             param_.state_size, param_.mode);
+      size_t r_size         = GetRNNReserveSpaceSize(param_.num_layers,
+                                             direction,
+                                             param_.seq_length_,
+                                             param_.batch_size_,
+                                             param_.state_size,
+                                             param_.mode);
 
       if (!init_space_ || reserve_cpu_space_size_ != r_size) {
         LOG(FATAL) << "Check forward init error";
@@ -1221,10 +1364,10 @@ class RNNOp {
   }
 
  private:
-  inline void Init(const OpContext &ctx,
-                   mshadow::Stream<xpu> *s,
-                   const std::vector<TBlob> &in_data,
-                   const std::vector<TBlob> &out_data) {
+  inline void Init(const OpContext& ctx,
+                   mshadow::Stream<xpu>* s,
+                   const std::vector<TBlob>& in_data,
+                   const std::vector<TBlob>& out_data) {
     using namespace mshadow;
 
     size_t num_inputs = GetNumInputArguments(param_);
@@ -1246,9 +1389,9 @@ class RNNOp {
       // get input + output tensors
       Tensor<xpu, 3, DType> x = in_data[rnn_enum::kData].get<xpu, 3, DType>(s);
       Tensor<xpu, 1, DType> w = in_data[rnn_enum::kParams].get<xpu, 1, DType>(s);
-      param_.seq_length_ = x.shape_[0];
-      param_.batch_size_ = x.shape_[1];
-      param_.input_size_ = x.shape_[2];
+      param_.seq_length_      = x.shape_[0];
+      param_.batch_size_      = x.shape_[1];
+      param_.input_size_      = x.shape_[2];
 
       // Tensor Descriptors
       std::vector<cudnnTensorDescriptor_t> x_vec(param_.seq_length_);
@@ -1263,50 +1406,34 @@ class RNNOp {
         CUDNN_CALL(cudnnCreateTensorDescriptor(&dx_vec[i]));
         CUDNN_CALL(cudnnCreateTensorDescriptor(&dy_vec[i]));
 
-        dimA[0] = param_.batch_size_;
-        dimA[1] = param_.input_size_;
-        dimA[2] = 1;
+        dimA[0]    = param_.batch_size_;
+        dimA[1]    = param_.input_size_;
+        dimA[2]    = 1;
         strideA[0] = dimA[2] * dimA[1];
         strideA[1] = dimA[2];
         strideA[2] = 1;
 
-        CUDNN_CALL(cudnnSetTensorNdDescriptor(x_vec[i],
-                                              dtype_,
-                                              3,
-                                              dimA,
-                                              strideA));
-        CUDNN_CALL(cudnnSetTensorNdDescriptor(dx_vec[i],
-                                              dtype_,
-                                              3,
-                                              dimA,
-                                              strideA));
-        dimA[0] = param_.batch_size_;
-        dimA[1] = param_.bidirectional ? param_.state_size * 2 : param_.state_size;
-        dimA[2] = 1;
+        CUDNN_CALL(cudnnSetTensorNdDescriptor(x_vec[i], dtype_, 3, dimA, strideA));
+        CUDNN_CALL(cudnnSetTensorNdDescriptor(dx_vec[i], dtype_, 3, dimA, strideA));
+        dimA[0]    = param_.batch_size_;
+        dimA[1]    = param_.bidirectional ? param_.state_size * 2 : param_.state_size;
+        dimA[2]    = 1;
         strideA[0] = dimA[2] * dimA[1];
         strideA[1] = dimA[2];
         strideA[2] = 1;
 
-        CUDNN_CALL(cudnnSetTensorNdDescriptor(y_vec[i],
-                                              dtype_,
-                                              3,
-                                              dimA,
-                                              strideA));
-        CUDNN_CALL(cudnnSetTensorNdDescriptor(dy_vec[i],
-                                              dtype_,
-                                              3,
-                                              dimA,
-                                              strideA));
+        CUDNN_CALL(cudnnSetTensorNdDescriptor(y_vec[i], dtype_, 3, dimA, strideA));
+        CUDNN_CALL(cudnnSetTensorNdDescriptor(dy_vec[i], dtype_, 3, dimA, strideA));
       }
-      x_desc_vec_ = x_vec;
-      y_desc_vec_ = y_vec;
+      x_desc_vec_  = x_vec;
+      y_desc_vec_  = y_vec;
       dx_desc_vec_ = dx_vec;
       dy_desc_vec_ = dy_vec;
 
       // set the state tensors
-      dimA[0] = param_.num_layers * (param_.bidirectional ? 2 : 1);
-      dimA[1] = param_.batch_size_;
-      dimA[2] = param_.state_size;
+      dimA[0]    = param_.num_layers * (param_.bidirectional ? 2 : 1);
+      dimA[1]    = param_.batch_size_;
+      dimA[2]    = param_.state_size;
       strideA[0] = dimA[2] * dimA[1];
       strideA[1] = dimA[2];
       strideA[2] = 1;
@@ -1315,96 +1442,47 @@ class RNNOp {
       int strideB[3];
       dimB[0] = param_.num_layers * (param_.bidirectional ? 2 : 1);
       dimB[1] = param_.batch_size_;
-      dimB[2] = param_.projection_size.has_value() ?
-                param_.projection_size.value() : param_.state_size;
+      dimB[2] =
+          param_.projection_size.has_value() ? param_.projection_size.value() : param_.state_size;
       strideB[0] = dimB[2] * dimB[1];
       strideB[1] = dimB[2];
       strideB[2] = 1;
 #endif  // MXNET_USE_CUDNN_GE_7200
 #if MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(hx_desc_,
-                                            dtype_,
-                                            3,
-                                            dimB,
-                                            strideB));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(hx_desc_, dtype_, 3, dimB, strideB));
 #else
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(hx_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(hx_desc_, dtype_, 3, dimA, strideA));
 #endif  // MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(cx_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(cx_desc_, dtype_, 3, dimA, strideA));
 #if MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(hy_desc_,
-                                            dtype_,
-                                            3,
-                                            dimB,
-                                            strideB));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(hy_desc_, dtype_, 3, dimB, strideB));
 #else
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(hy_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(hy_desc_, dtype_, 3, dimA, strideA));
 #endif  // MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(cy_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(cy_desc_, dtype_, 3, dimA, strideA));
 #if MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhx_desc_,
-                                            dtype_,
-                                            3,
-                                            dimB,
-                                            strideB));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhx_desc_, dtype_, 3, dimB, strideB));
 #else
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhx_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhx_desc_, dtype_, 3, dimA, strideA));
 #endif  // MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dcx_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(dcx_desc_, dtype_, 3, dimA, strideA));
 #if MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhy_desc_,
-                                            dtype_,
-                                            3,
-                                            dimB,
-                                            strideB));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhy_desc_, dtype_, 3, dimB, strideB));
 #else
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhy_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(dhy_desc_, dtype_, 3, dimA, strideA));
 #endif  // MXNET_USE_CUDNN_GE_7200
-      CUDNN_CALL(cudnnSetTensorNdDescriptor(dcy_desc_,
-                                            dtype_,
-                                            3,
-                                            dimA,
-                                            strideA));
+      CUDNN_CALL(cudnnSetTensorNdDescriptor(dcy_desc_, dtype_, 3, dimA, strideA));
 
       // Create Dropout descriptors
-      ctx.requested[rnn_enum::kCuDNNDropoutDescSpace].get_cudnn_dropout_desc
-         (&dropout_desc_, s, param_.p);
+      ctx.requested[rnn_enum::kCuDNNDropoutDescSpace].get_cudnn_dropout_desc(
+          &dropout_desc_, s, param_.p);
 
       // RNN descriptors
       // adopt pseudo-fp16 for all architectures
       cudnnDataType_t dtype_with_fallback_ =
-        (cudnnGetVersion() >= 7500 && dtype_ == CUDNN_DATA_HALF) ? CUDNN_DATA_FLOAT
-                                                             : dtype_;
+          (cudnnGetVersion() >= 7500 && dtype_ == CUDNN_DATA_HALF) ? CUDNN_DATA_FLOAT : dtype_;
       cudnnRNNAlgo_t rnn_algo = CUDNN_RNN_ALGO_STANDARD;
-      dgrad_sync_needed_ = (rnn_algo == CUDNN_RNN_ALGO_STANDARD) && param_.bidirectional;
+      dgrad_sync_needed_      = (rnn_algo == CUDNN_RNN_ALGO_STANDARD) && param_.bidirectional;
       CUDNN_CALL(cudnnSetRNNDescriptor_v6(s->dnn_handle_,
                                           rnn_desc_,
                                           param_.state_size,
@@ -1428,10 +1506,8 @@ class RNNOp {
       CUDNN_CALL(cudnnSetRNNMatrixMathType(rnn_desc_, math_type));
 #if MXNET_USE_CUDNN_GE_7200
       if (param_.projection_size.has_value()) {
-        CUDNN_CALL(cudnnSetRNNProjectionLayers(s->dnn_handle_,
-                                               rnn_desc_,
-                                               param_.projection_size.value(),
-                                               0));
+        CUDNN_CALL(cudnnSetRNNProjectionLayers(
+            s->dnn_handle_, rnn_desc_, param_.projection_size.value(), 0));
       }
       if (param_.use_sequence_length) {
         CUDNN_CALL(cudnnSetRNNPaddingMode(rnn_desc_, CUDNN_RNN_PADDED_IO_ENABLED));
@@ -1439,43 +1515,26 @@ class RNNOp {
 #endif  // MXNET_USE_CUDNN_GE_7200
 
       // Get temp space sizes
-      CUDNN_CALL(cudnnGetRNNWorkspaceSize(s->dnn_handle_,
-                                          rnn_desc_,
-                                          param_.seq_length_,
-                                          x_desc_vec_.data(),
-                                          &workspace_byte_));
-      CUDNN_CALL(cudnnGetRNNTrainingReserveSize(s->dnn_handle_,
-                                                rnn_desc_,
-                                                param_.seq_length_,
-                                                x_desc_vec_.data(),
-                                                &reserve_space_byte_));
+      CUDNN_CALL(cudnnGetRNNWorkspaceSize(
+          s->dnn_handle_, rnn_desc_, param_.seq_length_, x_desc_vec_.data(), &workspace_byte_));
+      CUDNN_CALL(cudnnGetRNNTrainingReserveSize(
+          s->dnn_handle_, rnn_desc_, param_.seq_length_, x_desc_vec_.data(), &reserve_space_byte_));
       workspace_size_ = workspace_byte_ / sizeof(DType);
       // Allocate the reserve space
       reserve_space_ = Storage::Get()->Alloc(reserve_space_byte_, Context::GPU(s->dev_id));
       reserve_space_.profiler_scope = "cudnn_rnn:";
-      reserve_space_.name = "reserve_space";
+      reserve_space_.name           = "reserve_space";
       profiler::GpuDeviceStorageProfiler::Get()->UpdateStorageInfo(reserve_space_);
       // Check that number of params are correct
       size_t cudnn_param_size;
-      CUDNN_CALL(cudnnGetRNNParamsSize(s->dnn_handle_,
-                                       rnn_desc_,
-                                       x_desc_vec_[0],
-                                       &cudnn_param_size,
-                                       dtype_));
+      CUDNN_CALL(cudnnGetRNNParamsSize(
+          s->dnn_handle_, rnn_desc_, x_desc_vec_[0], &cudnn_param_size, dtype_));
       CHECK_EQ(w.shape_[0] * sizeof(DType), cudnn_param_size);
       // Set param descriptors
       int dim_w[3] = {1, 1, 1};
-      dim_w[0] = w.shape_[0];
-      CUDNN_CALL(cudnnSetFilterNdDescriptor(w_desc_,
-                                            dtype_,
-                                            format_,
-                                            3,
-                                            dim_w));
-      CUDNN_CALL(cudnnSetFilterNdDescriptor(dw_desc_,
-                                            dtype_,
-                                            format_,
-                                            3,
-                                            dim_w));
+      dim_w[0]     = w.shape_[0];
+      CUDNN_CALL(cudnnSetFilterNdDescriptor(w_desc_, dtype_, format_, 3, dim_w));
+      CUDNN_CALL(cudnnSetFilterNdDescriptor(dw_desc_, dtype_, format_, 3, dim_w));
 
       // Query weight layout
       // cudnnFilterDescriptor_t m_desc;
@@ -1565,11 +1624,11 @@ class RNNOp {
   cudnnTensorFormat_t format_;
   cudaEvent_t dgrad_sync_event_;
   bool dgrad_sync_event_created_ = false;
-  bool dgrad_sync_needed_ = false;
+  bool dgrad_sync_needed_        = false;
 #endif  // MXNET_USE_CUDNN
-};  //  class RNNOp
+};      //  class RNNOp
 
-template<typename xpu>
+template <typename xpu>
 void RNNStatefulCompute(const OpStatePtr& state,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -1603,7 +1662,7 @@ index description
 8: cy
 9: dcy
 */
-template<typename xpu>
+template <typename xpu>
 void RNNStatefulGradCompute(const OpStatePtr& state,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -1612,7 +1671,7 @@ void RNNStatefulGradCompute(const OpStatePtr& state,
   std::vector<TBlob> in_data(inputs.begin(), inputs.begin() + 3);
   std::vector<TBlob> out_data{inputs[3]};
   std::vector<TBlob> out_grad{inputs[4]};
-  const std::vector<TBlob> &in_grad = outputs;
+  const std::vector<TBlob>& in_grad = outputs;
 
   int dtype = inputs[rnn_enum::kData].type_flag_;
 
@@ -1624,8 +1683,8 @@ void RNNStatefulGradCompute(const OpStatePtr& state,
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
     MSHADOW_TYPE_SWITCH(itype, IType, {
       RNNOp<xpu, DType, IType>& op = state.get_state<RNNOp<xpu, DType, IType>>();
-      const RNNParam& param = op.param_;
-      int index = 5;
+      const RNNParam& param        = op.param_;
+      int index                    = 5;
       if (param.state_outputs) {
         out_data.push_back(inputs[index++]);
         out_grad.push_back(inputs[index++]);
@@ -1639,10 +1698,9 @@ void RNNStatefulGradCompute(const OpStatePtr& state,
         }
       }
 
-
       if (param.use_sequence_length) {
         size_t seq_len_input_idx = rnn_enum::kSequenceLength;
-        if  (param.mode != rnn_enum::kLstm) {
+        if (param.mode != rnn_enum::kLstm) {
           seq_len_input_idx -= 1;
         }
         in_data.push_back(outputs[seq_len_input_idx]);
diff --git a/src/operator/rnn.cc b/src/operator/rnn.cc
index 7cb9f4af6049..3e8b5df161a8 100644
--- a/src/operator/rnn.cc
+++ b/src/operator/rnn.cc
@@ -22,7 +22,7 @@
  * \file rnn.cc
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include <iterator>
 
@@ -53,39 +53,38 @@ static inline std::vector<std::string> ListArguments(const RNNParam& param_) {
 }
 
 static bool RNNShape(const nnvm::NodeAttrs& attrs,
-                     std::vector<TShape> *in_shape,
-                     std::vector<TShape> *out_shape) {
+                     std::vector<TShape>* in_shape,
+                     std::vector<TShape>* out_shape) {
   const RNNParam& param_ = nnvm::get<RNNParam>(attrs.parsed);
   using namespace mshadow;
 
   // Query param_ object to figure out what the expectd input arguments are
   std::vector<std::string> expected_arguments = ListArguments(param_);
 
-  CHECK_EQ(in_shape->size(), expected_arguments.size()) << "Input shape mismatch. Expected " <<
-    expected_arguments.size() << " input parameters but got " << in_shape->size() << ".";
+  CHECK_EQ(in_shape->size(), expected_arguments.size())
+      << "Input shape mismatch. Expected " << expected_arguments.size()
+      << " input parameters but got " << in_shape->size() << ".";
 
-  const TShape &dshape = (*in_shape)[rnn_enum::kData];
-  if (!mxnet::ndim_is_known(dshape)) return false;
-  CHECK_EQ(dshape.ndim(), 3U) \
+  const TShape& dshape = (*in_shape)[rnn_enum::kData];
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
+  CHECK_EQ(dshape.ndim(), 3U)
       << "Input data should be rank-3 tensor of dim [sequence length, batch size, input size]";
   // data: [sequence len, batch, input dimension]
   for (int i = 0; i < dshape.ndim(); i++) {
     CHECK_LT(dshape[i], INT32_MAX) << "ValueError: RNN does not support large"
-      << "dimensions (>= 2^31).";
+                                   << "dimensions (>= 2^31).";
   }
-  int batch_size = dshape[1];
-  int input_size = dshape[2];
+  int batch_size    = dshape[1];
+  int input_size    = dshape[2];
   int numDirections = param_.bidirectional ? 2 : 1;
-  int total_layers = numDirections * param_.num_layers;  // double for bidirectional
-  int layer_size = (param_.projection_size.has_value()) ?
-      param_.projection_size.value() : param_.state_size;
-  SHAPE_ASSIGN_CHECK(*in_shape,
-                     rnn_enum::kState,
-                     Shape3(total_layers, batch_size, layer_size));
+  int total_layers  = numDirections * param_.num_layers;  // double for bidirectional
+  int layer_size =
+      (param_.projection_size.has_value()) ? param_.projection_size.value() : param_.state_size;
+  SHAPE_ASSIGN_CHECK(*in_shape, rnn_enum::kState, Shape3(total_layers, batch_size, layer_size));
   if (param_.mode == rnn_enum::kLstm) {
-    SHAPE_ASSIGN_CHECK(*in_shape,
-                       rnn_enum::kStateCell,
-                       Shape3(total_layers, batch_size, param_.state_size));
+    SHAPE_ASSIGN_CHECK(
+        *in_shape, rnn_enum::kStateCell, Shape3(total_layers, batch_size, param_.state_size));
   }
 
   // calculate parameter vector length
@@ -100,7 +99,8 @@ static bool RNNShape(const nnvm::NodeAttrs& attrs,
   // Check on sequence_length shape if using
   if (param_.use_sequence_length) {
     size_t seq_len_input_idx = rnn_enum::kSequenceLength;
-    if (param_.mode != rnn_enum::kLstm) --seq_len_input_idx;
+    if (param_.mode != rnn_enum::kLstm)
+      --seq_len_input_idx;
 
     SHAPE_ASSIGN_CHECK(*in_shape, seq_len_input_idx, Shape1(batch_size));
   }
@@ -117,8 +117,8 @@ static bool RNNShape(const nnvm::NodeAttrs& attrs,
   if (param_.state_outputs) {
     // outStateShape: [layer_num, batch, state size]
     TShape outStateShape = dshape;
-    outStateShape[0] = total_layers;
-    outStateShape[1] = batch_size;
+    outStateShape[0]     = total_layers;
+    outStateShape[1]     = batch_size;
     if (param_.projection_size.has_value()) {
       outStateShape[2] = param_.projection_size.value();
     } else {
@@ -128,9 +128,9 @@ static bool RNNShape(const nnvm::NodeAttrs& attrs,
     // Deal with lstm cell state
     if (param_.mode == rnn_enum::kLstm) {
       TShape cellStateShape = dshape;
-      cellStateShape[0] = total_layers;
-      cellStateShape[1] = batch_size;
-      cellStateShape[2] = param_.state_size;
+      cellStateShape[0]     = total_layers;
+      cellStateShape[1]     = batch_size;
+      cellStateShape[2]     = param_.state_size;
       out_shape->push_back(cellStateShape);
     }
   }
@@ -139,14 +139,15 @@ static bool RNNShape(const nnvm::NodeAttrs& attrs,
 }
 
 static bool RNNType(const nnvm::NodeAttrs& attrs,
-                    std::vector<int> *in_type,
-                    std::vector<int> *out_type) {
+                    std::vector<int>* in_type,
+                    std::vector<int>* out_type) {
   const RNNParam& param_ = nnvm::get<RNNParam>(attrs.parsed);
 
   CHECK_EQ(in_type->size(), GetNumInputArguments(param_));
 
   size_t seq_len_input_idx = rnn_enum::kSequenceLength;
-  if (param_.mode != rnn_enum::kLstm)  --seq_len_input_idx;
+  if (param_.mode != rnn_enum::kLstm)
+    --seq_len_input_idx;
 
   int dtype = (*in_type)[0];
   CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -174,7 +175,8 @@ static bool RNNType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-static std::vector<ResourceRequest> RNNResourceEx(const NodeAttrs& attrs, const int dev_mask,
+static std::vector<ResourceRequest> RNNResourceEx(const NodeAttrs& attrs,
+                                                  const int dev_mask,
                                                   const DispatchMode dispatch_mode) {
   std::vector<ResourceRequest> request;
   if (dev_mask == kGPU) {
@@ -195,23 +197,22 @@ static std::vector<ResourceRequest> RNNResourceEx(const NodeAttrs& attrs, const
 inline static bool RNNStorageType(const nnvm::NodeAttrs& attrs,
                                   const int dev_mask,
                                   DispatchMode* dispatch_mode,
-                                  std::vector<int> *in_attrs,
-                                  std::vector<int> *out_attrs) {
+                                  std::vector<int>* in_attrs,
+                                  std::vector<int>* out_attrs) {
   const RNNParam& param = nnvm::get<RNNParam>(attrs.parsed);
   const bool support_mkldnn_rnn =
       !param.use_sequence_length && dmlc::GetEnv("MXNET_USE_ONEDNN_RNN", 1);
-  return MKLDNNStorageType(attrs, dev_mask, support_mkldnn_rnn,
-                           dispatch_mode, in_attrs, out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, support_mkldnn_rnn, dispatch_mode, in_attrs, out_attrs);
 }
 #endif  // MXNET_USE_ONEDNN == 1
 
 struct RNNGrad {
-  const char *op_name;
-  std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr &n,
-          const std::vector<nnvm::NodeEntry> &ograd) const {
+  const char* op_name;
+  std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
+                                          const std::vector<nnvm::NodeEntry>& ograd) const {
     const RNNParam& params = nnvm::get<RNNParam>(n->attrs.parsed);
-    std::vector<nnvm::NodeEntry> heads{ n->inputs[rnn_enum::kData],
-      n->inputs[rnn_enum::kParams], n->inputs[rnn_enum::kState] };
+    std::vector<nnvm::NodeEntry> heads{
+        n->inputs[rnn_enum::kData], n->inputs[rnn_enum::kParams], n->inputs[rnn_enum::kState]};
     heads.emplace_back(n, rnn_enum::kOut, 0);
     heads.push_back(ograd[rnn_enum::kOut]);
     if (params.state_outputs) {
@@ -229,14 +230,14 @@ struct RNNGrad {
   }
 };
 
-static OpStatePtr CreateRNNState(const nnvm::NodeAttrs &attrs,
+static OpStatePtr CreateRNNState(const nnvm::NodeAttrs& attrs,
                                  const Context ctx,
-                                 const mxnet::ShapeVector &in_shapes,
-                                 const std::vector<int> &in_types) {
+                                 const mxnet::ShapeVector& in_shapes,
+                                 const std::vector<int>& in_types) {
   const RNNParam& param = nnvm::get<RNNParam>(attrs.parsed);
-  OpStatePtr state = OpStatePtr();
-  int dtype = in_types[rnn_enum::kData];
-  int itype = dtype;
+  OpStatePtr state      = OpStatePtr();
+  int dtype             = in_types[rnn_enum::kData];
+  int itype             = dtype;
   if (param.use_sequence_length) {
     size_t seq_len_input_idx = rnn_enum::kSequenceLength;
     if (param.mode != rnn_enum::kLstm) {
@@ -248,8 +249,7 @@ static OpStatePtr CreateRNNState(const nnvm::NodeAttrs &attrs,
 #if MXNET_USE_ONEDNN == 1
   if (ctx.dev_type == kCPU && SupportMKLDNNRnn(param, in_types[rnn_enum::kData])) {
     const mxnet::TShape& data_shape = in_shapes[rnn_enum::kData];
-    state = OpStatePtr::Create<MKLDNNRnnOp>(param, data_shape[0],
-        data_shape[1], data_shape[2]);
+    state = OpStatePtr::Create<MKLDNNRnnOp>(param, data_shape[0], data_shape[1], data_shape[2]);
     return state;
   }
 #endif  // MXNET_USE_ONEDNN == 1
@@ -295,8 +295,9 @@ static void RNNStatefulGradComputeExCPU(const OpStatePtr& state_ptr,
 #endif  // MXNET_USE_ONEDNN == 1
 
 NNVM_REGISTER_OP(RNN)
-.add_alias("_npx_rnn")
-.describe(R"code(Applies recurrent layers to input data. Currently, vanilla RNN, LSTM and GRU are
+    .add_alias("_npx_rnn")
+    .describe(
+        R"code(Applies recurrent layers to input data. Currently, vanilla RNN, LSTM and GRU are
 implemented, with both multi-layer and bidirectional support.
 
 When the input data is of type float32 and the environment variables MXNET_CUDA_ALLOW_TENSOR_CORE
@@ -367,87 +368,91 @@ The definition of GRU here is slightly different from paper but compatible with
             h_t = (1 - z_t) * n_t + z_t * h_{(t-1)} \\
             \end{array}
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<RNNParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-  const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
-  return GetNumInputArguments(params);
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
-  //  kOut
-  int num_outputs = 1;
-  if (params.state_outputs) {
-    // kOut, kStateOut, kStateCellOut
-    num_outputs = (params.mode == rnn_enum::kLstm) ? 3 : 2;
-  }
+    .set_attr_parser(ParamParser<RNNParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
+      return GetNumInputArguments(params);
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
+      //  kOut
+      int num_outputs = 1;
+      if (params.state_outputs) {
+        // kOut, kStateOut, kStateCellOut
+        num_outputs = (params.mode == rnn_enum::kLstm) ? 3 : 2;
+      }
 
-  return num_outputs;
-})
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-  const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
-  return ListArguments(params);
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
-  std::vector<std::string> names{"output"};
-  if (params.state_outputs) {
-    names.emplace_back("state_output");
-    if (params.mode == rnn_enum::kLstm)
-      names.emplace_back("statecell_output");
-  }
-  return names;
-})
-.set_attr<mxnet::FInferShape>("FInferShape", RNNShape)
-.set_attr<nnvm::FInferType>("FInferType", RNNType)
-.set_attr<FCreateOpState>("FCreateOpState", CreateRNNState)
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", RNNStatefulCompute<cpu>)
+      return num_outputs;
+    })
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
+                                       return ListArguments(params);
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
+                                        std::vector<std::string> names{"output"};
+                                        if (params.state_outputs) {
+                                          names.emplace_back("state_output");
+                                          if (params.mode == rnn_enum::kLstm)
+                                            names.emplace_back("statecell_output");
+                                        }
+                                        return names;
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", RNNShape)
+    .set_attr<nnvm::FInferType>("FInferType", RNNType)
+    .set_attr<FCreateOpState>("FCreateOpState", CreateRNNState)
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", RNNStatefulCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", RNNStorageType)
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", RNNStatefulComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", RNNStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", RNNStatefulComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", RNNGrad{"_backward_RNN"})
-.set_attr<FResourceRequestEx>("FResourceRequestEx", RNNResourceEx)
-.add_argument("data", "NDArray-or-Symbol", "Input data to RNN")
-.add_argument("parameters", "NDArray-or-Symbol",
-              "Vector of all RNN trainable parameters concatenated")
-.add_argument("state", "NDArray-or-Symbol", "initial hidden state of the RNN")
-.add_argument("state_cell", "NDArray-or-Symbol",
-              "initial cell state for LSTM networks (only for LSTM)")
-.add_argument("sequence_length", "NDArray-or-Symbol",
-              "Vector of valid sequence lengths for each element in batch. (Only used if"
-              " use_sequence_length kwarg is True)")
-.add_arguments(RNNParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", RNNGrad{"_backward_RNN"})
+    .set_attr<FResourceRequestEx>("FResourceRequestEx", RNNResourceEx)
+    .add_argument("data", "NDArray-or-Symbol", "Input data to RNN")
+    .add_argument("parameters",
+                  "NDArray-or-Symbol",
+                  "Vector of all RNN trainable parameters concatenated")
+    .add_argument("state", "NDArray-or-Symbol", "initial hidden state of the RNN")
+    .add_argument("state_cell",
+                  "NDArray-or-Symbol",
+                  "initial cell state for LSTM networks (only for LSTM)")
+    .add_argument("sequence_length",
+                  "NDArray-or-Symbol",
+                  "Vector of valid sequence lengths for each element in batch. (Only used if"
+                  " use_sequence_length kwarg is True)")
+    .add_arguments(RNNParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_RNN)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
-    int ret = 5;
-    if (params.state_outputs) {
-      ret += 2;
-    }
-    if (params.mode == rnn_enum::kLstm) {
-      ++ret;
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
+      int ret                = 5;
       if (params.state_outputs) {
-      ret += 2;
+        ret += 2;
       }
-    }
-    return ret;
-})
-.set_num_outputs([](const NodeAttrs& attrs) {
-  const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
-  return GetNumInputArguments(params);
-})
-.set_attr_parser(ParamParser<RNNParam>)
-.set_attr<bool>("TIsLayerOpBackward", true)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FStatefulCompute>("FStatefulCompute<cpu>", RNNStatefulGradCompute<cpu>)
+      if (params.mode == rnn_enum::kLstm) {
+        ++ret;
+        if (params.state_outputs) {
+          ret += 2;
+        }
+      }
+      return ret;
+    })
+    .set_num_outputs([](const NodeAttrs& attrs) {
+      const RNNParam& params = nnvm::get<RNNParam>(attrs.parsed);
+      return GetNumInputArguments(params);
+    })
+    .set_attr_parser(ParamParser<RNNParam>)
+    .set_attr<bool>("TIsLayerOpBackward", true)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FStatefulCompute>("FStatefulCompute<cpu>", RNNStatefulGradCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", RNNStorageType)
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", RNNStatefulGradComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", RNNStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FStatefulComputeEx>("FStatefulComputeEx<cpu>", RNNStatefulGradComputeExCPU)
 #endif
-.set_attr<FResourceRequestEx>("FResourceRequestEx", RNNResourceEx);
+    .set_attr<FResourceRequestEx>("FResourceRequestEx", RNNResourceEx);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/rnn.cu b/src/operator/rnn.cu
index 093a64a0623a..a765fca3ea2d 100644
--- a/src/operator/rnn.cu
+++ b/src/operator/rnn.cu
@@ -22,7 +22,7 @@
  * \file rnn.cu
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include "./rnn-inl.h"
 #include <algorithm>
@@ -30,11 +30,9 @@
 namespace mxnet {
 namespace op {
 
-
-NNVM_REGISTER_OP(RNN)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", RNNStatefulCompute<gpu>);
+NNVM_REGISTER_OP(RNN).set_attr<FStatefulCompute>("FStatefulCompute<gpu>", RNNStatefulCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_RNN)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", RNNStatefulGradCompute<gpu>);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", RNNStatefulGradCompute<gpu>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/rnn_impl.h b/src/operator/rnn_impl.h
index 0b56984eab9b..7d4533539fcf 100644
--- a/src/operator/rnn_impl.h
+++ b/src/operator/rnn_impl.h
@@ -22,7 +22,7 @@
  * \file    rnn_impl.h
  * \brief
  * \author  Shu Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_RNN_IMPL_H_
 #define MXNET_OPERATOR_RNN_IMPL_H_
 
@@ -41,21 +41,20 @@
 #include "./mshadow_op.h"
 #include "./linalg.h"
 
-
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 inline DType sigmoid(DType x) {
   return 1.0f / (1.0f + exp(-x));
 }
 
-template<typename DType>
+template <typename DType>
 inline DType relu(DType x) {
   return x > 0.0f ? static_cast<float>(x) : 0.0f;
 }
 
-template<typename DType>
+template <typename DType>
 void LstmForwardTrainingSingleLayer(DType* ws,
                                     DType* rs,
                                     bool state_outputs,
@@ -64,10 +63,10 @@ void LstmForwardTrainingSingleLayer(DType* ws,
                                     const index_t N,
                                     const index_t I,
                                     const int H,
-                                    const Tensor<cpu, 2, DType> &x,
-                                    const Tensor<cpu, 2, DType> &hx,
-                                    const Tensor<cpu, 2, DType> &cx,
-                                    const Tensor<cpu, 3, DType> &y,
+                                    const Tensor<cpu, 2, DType>& x,
+                                    const Tensor<cpu, 2, DType>& hx,
+                                    const Tensor<cpu, 2, DType>& cx,
+                                    const Tensor<cpu, 3, DType>& y,
                                     DType* w_ptr,
                                     DType* b_ptr,
                                     DType* hy_ptr,
@@ -82,13 +81,13 @@ void LstmForwardTrainingSingleLayer(DType* ws,
   const Tensor<cpu, 4, DType> yx(yx_flat.dptr_, Shape4(T, N, 4, H));
   const Tensor<cpu, 3, DType> yh(yh_flat.dptr_, Shape3(N, 4, H));
   Tensor<cpu, 2, DType> h(yh_flat.dptr_ + N * H * 4, Shape2(N, H));
-  DType *c_ptr = bid ? rs + T * N * H * 7 : rs;
+  DType* c_ptr = bid ? rs + T * N * H * 7 : rs;
   Tensor<cpu, 3, DType> c(c_ptr, Shape3(T, N, H));
   Tensor<cpu, 4, DType> ifgo(c_ptr + T * N * H, Shape4(T, N, H, 4));
 
-  const int offset = bid ? H : 0;
-  const DType alpha = 1.0;
-  const DType beta = 0.0;
+  const int offset        = bid ? H : 0;
+  const DType alpha       = 1.0;
+  const DType beta        = 0.0;
   const index_t cell_size = N * H;
   linalg_gemm(x, wx, yx_flat, alpha, beta, false, true);
 
@@ -96,24 +95,24 @@ void LstmForwardTrainingSingleLayer(DType* ws,
   for (index_t i = 0; i < T; ++i) {
     index_t t = bid ? T - 1 - i : i;
     linalg_gemm(i ? h : hx, wh, yh_flat, alpha, beta, false, true);
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t jk = 0; jk < cell_size; ++jk) {
       index_t j = jk / H;
       index_t k = jk % H;
-      DType it = sigmoid<DType>(yx[t][j][0][k] + yh[j][0][k] + bx[0][k] + bh[0][k]);
-      DType ft = sigmoid<DType>(yx[t][j][1][k] + yh[j][1][k] + bx[1][k] + bh[1][k]);
-      DType gt =           tanh(yx[t][j][2][k] + yh[j][2][k] + bx[2][k] + bh[2][k]);
-      DType ot = sigmoid<DType>(yx[t][j][3][k] + yh[j][3][k] + bx[3][k] + bh[3][k]);
-      DType ct = (i ? c[i-1][j][k] : cx[j][k]) * ft + it * gt;
-      DType ht = ot * tanh(ct);
-      h[j][k] = ht;
+      DType it  = sigmoid<DType>(yx[t][j][0][k] + yh[j][0][k] + bx[0][k] + bh[0][k]);
+      DType ft  = sigmoid<DType>(yx[t][j][1][k] + yh[j][1][k] + bx[1][k] + bh[1][k]);
+      DType gt  = tanh(yx[t][j][2][k] + yh[j][2][k] + bx[2][k] + bh[2][k]);
+      DType ot  = sigmoid<DType>(yx[t][j][3][k] + yh[j][3][k] + bx[3][k] + bh[3][k]);
+      DType ct  = (i ? c[i - 1][j][k] : cx[j][k]) * ft + it * gt;
+      DType ht  = ot * tanh(ct);
+      h[j][k]   = ht;
       // reserve
       y[t][j][k + offset] = ht;
-      c[i][j][k] = ct;
-      ifgo[i][j][k][0] = it;
-      ifgo[i][j][k][1] = ft;
-      ifgo[i][j][k][2] = gt;
-      ifgo[i][j][k][3] = ot;
+      c[i][j][k]          = ct;
+      ifgo[i][j][k][0]    = it;
+      ifgo[i][j][k][1]    = ft;
+      ifgo[i][j][k][2]    = gt;
+      ifgo[i][j][k][3]    = ot;
       if (i == T - 1 && state_outputs) {
         hy_ptr[jk] = ht;
         cy_ptr[jk] = ct;
@@ -141,25 +140,39 @@ void LstmForwardTraining(DType* ws,
                          DType* hy_ptr,
                          DType* cy_ptr,
                          const float dropout,
-                         std::mt19937 &rnd_engine) {  // NOLINT(runtime/references)
-  DType* dropout_random = rs;
-  DType* rs2 = dropout_random + (L - 1) * D * T * N * H;
+                         std::mt19937& rnd_engine) {  // NOLINT(runtime/references)
+  DType* dropout_random  = rs;
+  DType* rs2             = dropout_random + (L - 1) * D * T * N * H;
   const int total_layers = D * L;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(total_layers, N, H));
   Tensor<cpu, 3, DType> cx(cx_ptr, Shape3(total_layers, N, H));
-  const index_t b_size = 2 * H * 4;
-  const index_t r_size = D * T * N * H * 6;
-  const index_t y_offset = T * N * H * 5;
+  const index_t b_size    = 2 * H * 4;
+  const index_t r_size    = D * T * N * H * 6;
+  const index_t y_offset  = T * N * H * 5;
   const index_t cell_size = N * H;
-  int idx = 0;  // state & cell state's idx;
-  const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
+  int idx                 = 0;  // state & cell state's idx;
+  const int omp_threads   = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   for (int i = 0; i < L; ++i) {
     const index_t input_size = i ? H * D : I;
-    const index_t w_size = (input_size + H) * H * 4;
+    const index_t w_size     = (input_size + H) * H * 4;
     Tensor<cpu, 2, DType> x(x_ptr, Shape2(T * N, input_size));
     Tensor<cpu, 3, DType> y(rs2 + y_offset, Shape3(T, N, H * D));
-    LstmForwardTrainingSingleLayer<DType>(ws, rs2, state_outputs, false, T, N, input_size, H, x,
-                                          hx[idx], cx[idx], y, w_ptr, b_ptr, hy_ptr, cy_ptr);
+    LstmForwardTrainingSingleLayer<DType>(ws,
+                                          rs2,
+                                          state_outputs,
+                                          false,
+                                          T,
+                                          N,
+                                          input_size,
+                                          H,
+                                          x,
+                                          hx[idx],
+                                          cx[idx],
+                                          y,
+                                          w_ptr,
+                                          b_ptr,
+                                          hy_ptr,
+                                          cy_ptr);
     if (D == 2) {
       w_ptr += w_size;
       b_ptr += b_size;
@@ -168,8 +181,22 @@ void LstmForwardTraining(DType* ws,
         hy_ptr += cell_size;
         cy_ptr += cell_size;
       }
-      LstmForwardTrainingSingleLayer<DType>(ws, rs2, state_outputs, true, T, N, input_size, H, x,
-                                            hx[idx], cx[idx], y, w_ptr, b_ptr, hy_ptr, cy_ptr);
+      LstmForwardTrainingSingleLayer<DType>(ws,
+                                            rs2,
+                                            state_outputs,
+                                            true,
+                                            T,
+                                            N,
+                                            input_size,
+                                            H,
+                                            x,
+                                            hx[idx],
+                                            cx[idx],
+                                            y,
+                                            w_ptr,
+                                            b_ptr,
+                                            hy_ptr,
+                                            cy_ptr);
     }
     if (i != L - 1) {
       w_ptr += w_size;
@@ -179,10 +206,10 @@ void LstmForwardTraining(DType* ws,
         for (index_t j = 0; j < T * N * H * D; j++) {
           if (distribution(rnd_engine) < dropout) {
             dropout_random[i * T * N * H * D + j] = 0;
-            y.dptr_[j] = 0;
+            y.dptr_[j]                            = 0;
           } else {
             dropout_random[i * T * N * H * D + j] = 1.0f - dropout;
-            y.dptr_[j] =  y.dptr_[j] / (1.0f - dropout);
+            y.dptr_[j]                            = y.dptr_[j] / (1.0f - dropout);
           }
         }
       }
@@ -195,13 +222,13 @@ void LstmForwardTraining(DType* ws,
       }
     }
   }
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < T * N * H * D; ++i) {
     y_ptr[i] = (rs2 + y_offset)[i];
   }
 }
 
-template<typename DType>
+template <typename DType>
 void LstmForwardInferenceSingleLayer(DType* ws,
                                      bool state_outputs,
                                      bool bid,
@@ -210,10 +237,10 @@ void LstmForwardInferenceSingleLayer(DType* ws,
                                      const index_t I,
                                      const int H,
                                      const int P,
-                                     const Tensor<cpu, 2, DType> &x,
-                                     const Tensor<cpu, 2, DType> &hx,
-                                     const Tensor<cpu, 2, DType> &cx,
-                                     const Tensor<cpu, 3, DType> &y,
+                                     const Tensor<cpu, 2, DType>& x,
+                                     const Tensor<cpu, 2, DType>& hx,
+                                     const Tensor<cpu, 2, DType>& cx,
+                                     const Tensor<cpu, 3, DType>& y,
                                      DType* w_ptr,
                                      DType* b_ptr,
                                      DType* hy_ptr,
@@ -222,7 +249,8 @@ void LstmForwardInferenceSingleLayer(DType* ws,
   const Tensor<cpu, 2, DType> wx(w_ptr, Shape2(H * 4, I));
   const Tensor<cpu, 2, DType> wh(w_ptr + I * H * 4, Shape2(H * 4, (P ? P : H)));
   Tensor<cpu, 2, DType> whr(w_ptr, Shape2(1, 1));
-  if (P > 0) whr = Tensor<cpu, 2, DType>(wh.dptr_ + P * 4 * H, Shape2(P, H));
+  if (P > 0)
+    whr = Tensor<cpu, 2, DType>(wh.dptr_ + P * 4 * H, Shape2(P, H));
   const Tensor<cpu, 2, DType> bx(b_ptr, Shape2(4, H));
   const Tensor<cpu, 2, DType> bh(b_ptr + H * 4, Shape2(4, H));
   Tensor<cpu, 2, DType> yx_flat(ws, Shape2(T * N, H * 4));
@@ -232,11 +260,12 @@ void LstmForwardInferenceSingleLayer(DType* ws,
   Tensor<cpu, 2, DType> h(yh_flat.dptr_ + N * H * 4, Shape2(N, H));
   Tensor<cpu, 2, DType> c(h.dptr_ + N * H, Shape2(N, H));
   Tensor<cpu, 2, DType> r(hy_ptr, Shape2(1, 1));
-  if (P > 0) r = Tensor<cpu, 2, DType>(hy_ptr, Shape2(N, P));
-  const int offset = bid ? H : 0;
-  const int proj_offset = bid ? P : 0;
-  const DType alpha = 1.0;
-  const DType beta = 0.0;
+  if (P > 0)
+    r = Tensor<cpu, 2, DType>(hy_ptr, Shape2(N, P));
+  const int offset        = bid ? H : 0;
+  const int proj_offset   = bid ? P : 0;
+  const DType alpha       = 1.0;
+  const DType beta        = 0.0;
   const index_t cell_size = N * H;
   linalg_gemm(x, wx, yx_flat, alpha, beta, false, true);
 
@@ -248,19 +277,21 @@ void LstmForwardInferenceSingleLayer(DType* ws,
     } else {
       linalg_gemm(i ? h : hx, wh, yh_flat, alpha, beta, false, true);
     }
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t jk = 0; jk < cell_size; ++jk) {
-      int j = jk / H;
-      int k = jk % H;
+      int j    = jk / H;
+      int k    = jk % H;
       DType it = sigmoid<DType>(yx[t][j][0][k] + yh[j][0][k] + bx[0][k] + bh[0][k]);
       DType ft = sigmoid<DType>(yx[t][j][1][k] + yh[j][1][k] + bx[1][k] + bh[1][k]);
-      DType gt =           tanh(yx[t][j][2][k] + yh[j][2][k] + bx[2][k] + bh[2][k]);
+      DType gt = tanh(yx[t][j][2][k] + yh[j][2][k] + bx[2][k] + bh[2][k]);
       DType ot = sigmoid<DType>(yx[t][j][3][k] + yh[j][3][k] + bx[3][k] + bh[3][k]);
       DType ct = (i ? c[j][k] : cx[j][k]) * ft + it * gt;
       DType ht = ot * tanh(ct);
-      if (P == 0) y[t][j][k + offset] = ht;
+      if (P == 0)
+        y[t][j][k + offset] = ht;
       if (i == T - 1 && state_outputs) {
-        if (P == 0) hy_ptr[jk] = ht;
+        if (P == 0)
+          hy_ptr[jk] = ht;
         cy_ptr[jk] = ct;
       } else {
         c[j][k] = ct;
@@ -303,28 +334,42 @@ void LstmForwardInference(DType* ws,
   const int total_layers = D * L;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(total_layers, N, P ? P : H));
   Tensor<cpu, 3, DType> cx(cx_ptr, Shape3(total_layers, N, H));
-  const index_t b_size = 2 * H * 4;
-  const index_t cell_size = N * H;
+  const index_t b_size          = 2 * H * 4;
+  const index_t cell_size       = N * H;
   const index_t projection_size = (P ? P : H) * N;
-  DType* y_tmp_ptr = ws + (T + 1) * cell_size * 4 + cell_size * 2;
-  DType* y_cur_ptr = y_ptr;
-  int idx = 0;  // state & cell state's idx;
-  bool flag = L % 2 ? false : true;
+  DType* y_tmp_ptr              = ws + (T + 1) * cell_size * 4 + cell_size * 2;
+  DType* y_cur_ptr              = y_ptr;
+  int idx                       = 0;  // state & cell state's idx;
+  bool flag                     = L % 2 ? false : true;
   for (int i = 0; i < L; ++i) {
     const index_t input_size = i ? (P ? P : H) * D : I;
-    index_t w_size = (input_size + (P ? P : H)) * H * 4;
+    index_t w_size           = (input_size + (P ? P : H)) * H * 4;
     if (P > 0) {
       w_size += P * H;
     }
     // If bidirectional, need space to save current layer output y.
     if (D == 2) {
       y_cur_ptr = flag ? y_tmp_ptr : y_ptr;
-      flag = !flag;
+      flag      = !flag;
     }
     Tensor<cpu, 2, DType> x(x_ptr, Shape2(T * N, input_size));
     Tensor<cpu, 3, DType> y(y_cur_ptr, Shape3(T, N, (P ? P : H) * D));
-    LstmForwardInferenceSingleLayer<DType>(ws, state_outputs, false, T, N, input_size, H, P,
-                                           x, hx[idx], cx[idx], y, w_ptr, b_ptr, hy_ptr, cy_ptr);
+    LstmForwardInferenceSingleLayer<DType>(ws,
+                                           state_outputs,
+                                           false,
+                                           T,
+                                           N,
+                                           input_size,
+                                           H,
+                                           P,
+                                           x,
+                                           hx[idx],
+                                           cx[idx],
+                                           y,
+                                           w_ptr,
+                                           b_ptr,
+                                           hy_ptr,
+                                           cy_ptr);
     // If bidirectional, then calculate the reverse direction's forward result.
     if (D == 2) {
       w_ptr += w_size;
@@ -334,8 +379,22 @@ void LstmForwardInference(DType* ws,
         hy_ptr += projection_size;
         cy_ptr += cell_size;
       }
-      LstmForwardInferenceSingleLayer<DType>(ws, state_outputs, true, T, N, input_size, H, P,
-                                             x, hx[idx], cx[idx], y, w_ptr, b_ptr, hy_ptr, cy_ptr);
+      LstmForwardInferenceSingleLayer<DType>(ws,
+                                             state_outputs,
+                                             true,
+                                             T,
+                                             N,
+                                             input_size,
+                                             H,
+                                             P,
+                                             x,
+                                             hx[idx],
+                                             cx[idx],
+                                             y,
+                                             w_ptr,
+                                             b_ptr,
+                                             hy_ptr,
+                                             cy_ptr);
     }
     // Don't need to move pointer in the last layer.
     if (i != L - 1) {
@@ -360,14 +419,14 @@ void LstmBackwardSingleLayer(DType* ws,
                              const index_t N,
                              const index_t I,
                              const int H,
-                             const Tensor<cpu, 2, DType> &x,
-                             const Tensor<cpu, 2, DType> &hx,
-                             const Tensor<cpu, 2, DType> &cx,
-                             const Tensor<cpu, 3, DType> &y,
-                             const Tensor<cpu, 3, DType> &dy,
-                             const Tensor<cpu, 2, DType> &dx,
-                             const Tensor<cpu, 2, DType> &dhx,
-                             const Tensor<cpu, 2, DType> &dcx,
+                             const Tensor<cpu, 2, DType>& x,
+                             const Tensor<cpu, 2, DType>& hx,
+                             const Tensor<cpu, 2, DType>& cx,
+                             const Tensor<cpu, 3, DType>& y,
+                             const Tensor<cpu, 3, DType>& dy,
+                             const Tensor<cpu, 2, DType>& dx,
+                             const Tensor<cpu, 2, DType>& dhx,
+                             const Tensor<cpu, 2, DType>& dcx,
                              DType* dhy_ptr,
                              DType* dcy_ptr,
                              DType* w_ptr,
@@ -384,16 +443,16 @@ void LstmBackwardSingleLayer(DType* ws,
   Tensor<cpu, 2, DType> dwh(dw_ptr + I * H * 4, Shape2(H * 4, H));
   Tensor<cpu, 1, DType> dbx(db_ptr, Shape1(H * 4));
   Tensor<cpu, 1, DType> dbh(dbx.dptr_ + H * 4, Shape1(H * 4));
-  DType *c_ptr = bid ? rs + T * N * H * 7 : rs;
+  DType* c_ptr = bid ? rs + T * N * H * 7 : rs;
   const Tensor<cpu, 3, DType> c(c_ptr, Shape3(T, N, H));
   const Tensor<cpu, 4, DType> ifgo(c_ptr + T * N * H, Shape4(T, N, H, 4));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (req_params != kNullOp && req_params != kAddTo) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < H * 4 * H; ++i) {
       dwh.dptr_[i] = 0;
     }
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < 4 * H; ++i) {
       dbx.dptr_[i] = 0;
       dbh.dptr_[i] = 0;
@@ -403,51 +462,51 @@ void LstmBackwardSingleLayer(DType* ws,
   Tensor<cpu, 2, DType> dh(ws + T * N * H * 4, Shape2(N, H));
   Tensor<cpu, 2, DType> dc(dh.dptr_ + N * H, Shape2(N, H));
   Tensor<cpu, 2, DType> htmp(dc.dptr_ + N * H, Shape2(N, H));
-  const int offset = bid ? H : 0;
-  const DType alpha = 1.0;
-  const DType beta0 = 0.0;
-  const DType beta1 = 1.0;
-  const DType beta2 = 2.0;
+  const int offset        = bid ? H : 0;
+  const DType alpha       = 1.0;
+  const DType beta0       = 0.0;
+  const DType beta1       = 1.0;
+  const DType beta2       = 2.0;
   const index_t cell_size = N * H;
   if (dhy_ptr != nullptr) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < cell_size; ++i) {
       dh.dptr_[i] = dhy_ptr[i];
     }
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < cell_size; ++i) {
       dh.dptr_[i] = 0;
     }
   }
   if (dcy_ptr != nullptr) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < cell_size; ++i) {
       dc.dptr_[i] = dcy_ptr[i];
     }
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < cell_size; ++i) {
       dc.dptr_[i] = 0;
     }
   }
 
   for (index_t i = T - 1; i >= 0; --i) {
-    index_t t = bid ? T - 1 - i : i;
-    index_t tnext = bid ? t + 1 : t - 1;
+    index_t t                           = bid ? T - 1 - i : i;
+    index_t tnext                       = bid ? t + 1 : t - 1;
     const Tensor<cpu, 2, DType>& dhnext = i ? dh : dhx;
     const Tensor<cpu, 2, DType>& dcnext = i ? dc : dcx;
-    const Tensor<cpu, 2, DType>& hnext = i ? htmp : hx;
-    const Tensor<cpu, 2, DType>& cnext = i ? c[i - 1] : cx;
-    #pragma omp parallel for num_threads(omp_threads)
+    const Tensor<cpu, 2, DType>& hnext  = i ? htmp : hx;
+    const Tensor<cpu, 2, DType>& cnext  = i ? c[i - 1] : cx;
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t jk = 0; jk < cell_size; ++jk) {
       index_t j = jk / H;
       index_t k = jk % H;
-      DType tc = tanh(c[i][j][k]);
-      DType it = ifgo[i][j][k][0];
-      DType ft = ifgo[i][j][k][1];
-      DType gt = ifgo[i][j][k][2];
-      DType ot = ifgo[i][j][k][3];
+      DType tc  = tanh(c[i][j][k]);
+      DType it  = ifgo[i][j][k][0];
+      DType ft  = ifgo[i][j][k][1];
+      DType gt  = ifgo[i][j][k][2];
+      DType ot  = ifgo[i][j][k][3];
       dh[j][k] += dy[t][j][k + offset];
       dc[j][k] += dh[j][k] * ot * (1 - tc * tc);
       difgo[t][j][0][k] = dc[j][k] * gt * it * (1 - it);
@@ -490,7 +549,7 @@ void LstmBackwardSingleLayer(DType* ws,
   if (req_params != kNullOp) {
     if (req_params != kAddTo) {
       for (index_t i = 0; i < row; ++i) {
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (index_t j = 0; j < col; ++j) {
           dbx[j] += dyx[i][j];
           dbh[j] = dbx[j];
@@ -499,20 +558,20 @@ void LstmBackwardSingleLayer(DType* ws,
     } else {
       const Tensor<cpu, 2, DType> tmp_dbx(tmp_buf, Shape2(col, T));
       const Tensor<cpu, 2, DType> tmp_dbh(tmp_buf + col * T, Shape2(col, T));
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < col * T; ++i) {
         tmp_dbx.dptr_[i] = 0;
         tmp_dbh.dptr_[i] = 0;
       }
       for (index_t t = T - 1; t >= 0; --t) {
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (index_t j = 0; j < col; ++j) {
           for (index_t i = 0; i < N; ++i) {
             tmp_dbx[j][t] += dyx[t * N + i][j];
             tmp_dbh[j][t] = tmp_dbx[j][t];
           }
         }
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (index_t j = 0; j < col; ++j) {
           dbx[j] += tmp_dbx[j][t] + dbx[j];
           dbh[j] += tmp_dbh[j][t] + dbh[j];
@@ -549,41 +608,62 @@ void LstmBackward(DType* ws,
                   int req_state,
                   int req_statecell,
                   const float dropout) {
-  DType* dropout_random = rs + (L - 1) * D * T * N * H;
-  DType* rs2 = rs + (L - 1) * D * T * N * H;
-  DType* tmp_buf = ws;
-  DType* ws2 = tmp_buf + 8 * T * H;
+  DType* dropout_random  = rs + (L - 1) * D * T * N * H;
+  DType* rs2             = rs + (L - 1) * D * T * N * H;
+  DType* tmp_buf         = ws;
+  DType* ws2             = tmp_buf + 8 * T * H;
   const int total_layers = D * L;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(total_layers, N, H));
   Tensor<cpu, 3, DType> cx(cx_ptr, Shape3(total_layers, N, H));
   Tensor<cpu, 3, DType> dhx(dhx_ptr, Shape3(total_layers, N, H));
   Tensor<cpu, 3, DType> dcx(dcx_ptr, Shape3(total_layers, N, H));
-  const index_t b_size = 2 * H * 4;
-  const index_t r_size = D * T * N * H * 6;
-  const index_t y_offset = T * N * H * 5;
-  const index_t w_size1 = (I + H) * H * 4;      // first layer
-  const index_t w_size2 = (D * H + H) * H * 4;  // other layers
+  const index_t b_size    = 2 * H * 4;
+  const index_t r_size    = D * T * N * H * 6;
+  const index_t y_offset  = T * N * H * 5;
+  const index_t w_size1   = (I + H) * H * 4;      // first layer
+  const index_t w_size2   = (D * H + H) * H * 4;  // other layers
   const index_t cell_size = N * H;
-  const index_t y_size = T * N * H * D;
-  DType* dy_tmp_ptr = ws2 + T * cell_size * 4 + cell_size * 3;
+  const index_t y_size    = T * N * H * D;
+  DType* dy_tmp_ptr       = ws2 + T * cell_size * 4 + cell_size * 3;
   for (int i = L - 1; i >= 0; --i) {
     const index_t input_size = i ? H * D : I;
-    const index_t w_size = i ? w_size2 : w_size1;
-    int idx = i * D;
-    DType* w_cur_ptr = i ? w_ptr + (w_size1 + (i - 1) * w_size2) * D : w_ptr;
-    DType* dw_cur_ptr = i ? dw_ptr + (w_size1 + (i - 1) * w_size2) * D : dw_ptr;
-    DType* db_cur_ptr = db_ptr + i * b_size * D;
-    DType* rs_cur_ptr = rs2 + i * r_size;
-    DType* dhy_cur_ptr = dhy_ptr ? dhy_ptr + i * cell_size * D : nullptr;
-    DType* dcy_cur_ptr = dcy_ptr ? dcy_ptr + i * cell_size * D : nullptr;
+    const index_t w_size     = i ? w_size2 : w_size1;
+    int idx                  = i * D;
+    DType* w_cur_ptr         = i ? w_ptr + (w_size1 + (i - 1) * w_size2) * D : w_ptr;
+    DType* dw_cur_ptr        = i ? dw_ptr + (w_size1 + (i - 1) * w_size2) * D : dw_ptr;
+    DType* db_cur_ptr        = db_ptr + i * b_size * D;
+    DType* rs_cur_ptr        = rs2 + i * r_size;
+    DType* dhy_cur_ptr       = dhy_ptr ? dhy_ptr + i * cell_size * D : nullptr;
+    DType* dcy_cur_ptr       = dcy_ptr ? dcy_ptr + i * cell_size * D : nullptr;
     Tensor<cpu, 3, DType> y(rs_cur_ptr + y_offset, Shape3(T, N, H * D));
     Tensor<cpu, 3, DType> dy(dy_ptr, Shape3(T, N, H * D));
     Tensor<cpu, 2, DType> x(i ? y.dptr_ - r_size : x_ptr, Shape2(T * N, input_size));
     Tensor<cpu, 2, DType> dx(i ? dy_tmp_ptr : dx_ptr, Shape2(T * N, input_size));
-    LstmBackwardSingleLayer<DType>(ws2, rs_cur_ptr, tmp_buf, false, T, N, input_size, H,
-                                   x, hx[idx], cx[idx], y, dy, dx, dhx[idx], dcx[idx],
-                                   dhy_cur_ptr, dcy_cur_ptr, w_cur_ptr, dw_cur_ptr, db_cur_ptr,
-                                   req_data, req_params, req_state, req_statecell);
+    LstmBackwardSingleLayer<DType>(ws2,
+                                   rs_cur_ptr,
+                                   tmp_buf,
+                                   false,
+                                   T,
+                                   N,
+                                   input_size,
+                                   H,
+                                   x,
+                                   hx[idx],
+                                   cx[idx],
+                                   y,
+                                   dy,
+                                   dx,
+                                   dhx[idx],
+                                   dcx[idx],
+                                   dhy_cur_ptr,
+                                   dcy_cur_ptr,
+                                   w_cur_ptr,
+                                   dw_cur_ptr,
+                                   db_cur_ptr,
+                                   req_data,
+                                   req_params,
+                                   req_state,
+                                   req_statecell);
     if (D == 2) {
       w_cur_ptr += w_size;
       dw_cur_ptr += w_size;
@@ -591,19 +671,40 @@ void LstmBackward(DType* ws,
       ++idx;
       dhy_cur_ptr = dhy_ptr ? dhy_cur_ptr + cell_size : nullptr;
       dcy_cur_ptr = dcy_ptr ? dcy_cur_ptr + cell_size : nullptr;
-      LstmBackwardSingleLayer<DType>(ws2, rs_cur_ptr, tmp_buf, true, T, N, input_size, H,
-                                     x, hx[idx], cx[idx], y, dy, dx, dhx[idx], dcx[idx],
-                                     dhy_cur_ptr, dcy_cur_ptr, w_cur_ptr, dw_cur_ptr, db_cur_ptr,
-                                     req_data, req_params, req_state, req_statecell);
+      LstmBackwardSingleLayer<DType>(ws2,
+                                     rs_cur_ptr,
+                                     tmp_buf,
+                                     true,
+                                     T,
+                                     N,
+                                     input_size,
+                                     H,
+                                     x,
+                                     hx[idx],
+                                     cx[idx],
+                                     y,
+                                     dy,
+                                     dx,
+                                     dhx[idx],
+                                     dcx[idx],
+                                     dhy_cur_ptr,
+                                     dcy_cur_ptr,
+                                     w_cur_ptr,
+                                     dw_cur_ptr,
+                                     db_cur_ptr,
+                                     req_data,
+                                     req_params,
+                                     req_state,
+                                     req_statecell);
 
       // Prevent overwritting dy while calculating dx in left2right layer
       const int loop_iteration = (L - 1) - i;
-      dy_tmp_ptr = loop_iteration % 2 ? dy_tmp_ptr - y_size : dy_tmp_ptr + y_size;
+      dy_tmp_ptr               = loop_iteration % 2 ? dy_tmp_ptr - y_size : dy_tmp_ptr + y_size;
     }
     if (dropout > 0.0f && i > 0 && req_data != kNullOp) {
-      dropout_random = dropout_random - T * N * D * H;
+      dropout_random        = dropout_random - T * N * D * H;
       const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t j = 0; j < T * N * D * H; j++) {
         if (dropout_random[j] == 0) {
           dx.dptr_[j] = 0;
@@ -616,7 +717,7 @@ void LstmBackward(DType* ws,
   }
 }
 
-template<typename DType>
+template <typename DType>
 void GruForwardInferenceSingleLayer(DType* ws,
                                     DType* tmp_buf,
                                     bool state_outputs,
@@ -625,29 +726,29 @@ void GruForwardInferenceSingleLayer(DType* ws,
                                     const index_t N,
                                     const index_t I,
                                     const int H,
-                                    const Tensor<cpu, 2, DType> &x,
-                                    const Tensor<cpu, 2, DType> &hx,
+                                    const Tensor<cpu, 2, DType>& x,
+                                    const Tensor<cpu, 2, DType>& hx,
                                     DType* wx_ptr,
                                     DType* wh_ptr,
                                     DType* bx_ptr,
                                     DType* bh_ptr,
                                     DType* y_ptr,
                                     DType* hy_ptr) {
-  DType* ht = y_ptr;
-  DType* ht_1 = y_ptr;
-  DType* back_ht_1 = y_ptr + (T-1) * N * H * D + H;
-  DType* back_ht = back_ht_1;
-  DType* gemmC1  = ws;              // [D, T, N, 3 * H]
-  DType* gemmC2  = gemmC1 + D * T * N * 3 * H;  // N * 3 * H
-  DType* rt = gemmC2 + N * 3 * H;
-  DType* zt = rt + N * H;
-  DType* nt = zt + N * H;
+  DType* ht          = y_ptr;
+  DType* ht_1        = y_ptr;
+  DType* back_ht_1   = y_ptr + (T - 1) * N * H * D + H;
+  DType* back_ht     = back_ht_1;
+  DType* gemmC1      = ws;                          // [D, T, N, 3 * H]
+  DType* gemmC2      = gemmC1 + D * T * N * 3 * H;  // N * 3 * H
+  DType* rt          = gemmC2 + N * 3 * H;
+  DType* zt          = rt + N * H;
+  DType* nt          = zt + N * H;
   DType* back_wx_ptr = wx_ptr + I * 3 * H + H * 3 * H;
   DType* back_wh_ptr = wh_ptr + I * 3 * H + H * 3 * H;
-  DType* back_bx_ptr = (bx_ptr != nullptr)? bx_ptr + 3 * H * 2 : nullptr;
-  DType* back_bh_ptr = (bh_ptr != nullptr)? bh_ptr + 3 * H * 2: nullptr;
+  DType* back_bx_ptr = (bx_ptr != nullptr) ? bx_ptr + 3 * H * 2 : nullptr;
+  DType* back_bh_ptr = (bh_ptr != nullptr) ? bh_ptr + 3 * H * 2 : nullptr;
   DType* back_gemmC1 = gemmC1 + T * N * 3 * H;
-  DType* gemmC1_t = gemmC1;
+  DType* gemmC1_t    = gemmC1;
 
   const Tensor<cpu, 2, DType> wx(wx_ptr, Shape2(H * 3, I));
   const Tensor<cpu, 2, DType> wh(wh_ptr, Shape2(H * 3, H));
@@ -659,18 +760,18 @@ void GruForwardInferenceSingleLayer(DType* ws,
   const Tensor<cpu, 2, DType> back_bh(back_bh_ptr, Shape2(3, H));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (D == 1) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
         y_ptr[i * H + j] = hx[i][j];
       }
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
-        y_ptr[i * D * H + j] = hx[i][j];
+        y_ptr[i * D * H + j]     = hx[i][j];
         back_ht_1[i * D * H + j] = hx[N + i][j];
-    }
+      }
   }
   Tensor<cpu, 2, DType> dgemmC1(ws, Shape2(T * N, 3 * H));
   Tensor<cpu, 2, DType> dgemmC2(gemmC2, Shape2(N, 3 * H));
@@ -678,7 +779,7 @@ void GruForwardInferenceSingleLayer(DType* ws,
 
   // x * wx.T : [T * N, I] * [I, 3 * H]
   DType alpha = 1.0;
-  DType beta = 0.0;
+  DType beta  = 0.0;
   linalg_gemm(x, wx, dgemmC1, alpha, beta, false, true);
   if (D == 2) {
     linalg_gemm(x, back_wx, dback_gemmC1, alpha, beta, false, true);
@@ -691,75 +792,73 @@ void GruForwardInferenceSingleLayer(DType* ws,
     if (D == 1) {
       linalg_gemm(dht_1, wh, dgemmC2, alpha, beta, false, true);
     } else {
-      Tensor<cpu, 3, DType> dht_1_tmp = Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf),
-                                     Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dht_1_tmp = reshape(dht_1.T(), Shape3(D, H, N));
       linalg_gemm(dht_1_tmp[0], wh, dgemmC2, alpha, beta, true, true);
     }
     gemmC1_t = gemmC1 + t * N * 3 * H;
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
-        index_t rtb = i * 3 * H;
-        index_t ztb = i * 3 * H + H;
-        index_t ntb = i * 3 * H + 2 * H;
-        rt[i * H + j] = sigmoid(gemmC1_t[rtb + j] + gemmC2[rtb + j]
-            + bx[0][j] + bh[0][j]);
-        zt[i * H + j] = sigmoid(gemmC1_t[ztb + j] + gemmC2[ztb + j]
-            + bx[1][j] + bh[1][j]);
-        nt[i * H + j] = tanh(gemmC1_t[ntb + j] + bx[2][j] +
-            rt[i * H + j] * (gemmC2[ntb + j] + bh[2][j]));
-        ht[i * D * H + j] = (1-zt[i * H + j]) * nt[i * H + j] +
-            zt[i * H + j] * ht_1[i * D * H + j];
+        index_t rtb   = i * 3 * H;
+        index_t ztb   = i * 3 * H + H;
+        index_t ntb   = i * 3 * H + 2 * H;
+        rt[i * H + j] = sigmoid(gemmC1_t[rtb + j] + gemmC2[rtb + j] + bx[0][j] + bh[0][j]);
+        zt[i * H + j] = sigmoid(gemmC1_t[ztb + j] + gemmC2[ztb + j] + bx[1][j] + bh[1][j]);
+        nt[i * H + j] =
+            tanh(gemmC1_t[ntb + j] + bx[2][j] + rt[i * H + j] * (gemmC2[ntb + j] + bh[2][j]));
+        ht[i * D * H + j] =
+            (1 - zt[i * H + j]) * nt[i * H + j] + zt[i * H + j] * ht_1[i * D * H + j];
       }
     }
     ht_1 = ht;
-    ht = ht + D * H * N;
+    ht   = ht + D * H * N;
     //  perform the second direction
     if (D == 2) {
       gemmC1_t = back_gemmC1 + (T - 1 - t) * N * 3 * H;
       Tensor<cpu, 2, DType> dback_ht_1(back_ht_1 - H, Shape2(N, D * H));
-      Tensor<cpu, 3, DType> dback_ht_1_tmp = Tensor<cpu, 3, DType>
-          (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dback_ht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dback_ht_1_tmp = reshape(dback_ht_1.T(), Shape3(D, H, N));
       linalg_gemm(dback_ht_1_tmp[1], back_wh, dgemmC2, alpha, beta, true, true);
 
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           index_t rtb = i * 3 * H;
           index_t ztb = i * 3 * H + H;
           index_t ntb = i * 3 * H + 2 * H;
-          rt[i * H + j] = sigmoid(gemmC1_t[rtb + j] +
-              gemmC2[rtb + j] + back_bx[0][j] + back_bh[0][j]);
-          zt[i * H + j] = sigmoid(gemmC1_t[ztb + j] +
-              gemmC2[ztb + j] + back_bx[1][j]+ back_bh[1][j]);
-          nt[i * H + j] = tanh(gemmC1_t[ntb + j] + back_bx[2][j]
-              + rt[i * H + j] * (gemmC2[ntb + j] + back_bh[2][j]));
-          back_ht[i * D * H + j] = (1 - zt[i * H + j]) * nt[i * H + j]
-              + zt[i * H + j] * back_ht_1[i * D * H + j];
+          rt[i * H + j] =
+              sigmoid(gemmC1_t[rtb + j] + gemmC2[rtb + j] + back_bx[0][j] + back_bh[0][j]);
+          zt[i * H + j] =
+              sigmoid(gemmC1_t[ztb + j] + gemmC2[ztb + j] + back_bx[1][j] + back_bh[1][j]);
+          nt[i * H + j] = tanh(gemmC1_t[ntb + j] + back_bx[2][j] +
+                               rt[i * H + j] * (gemmC2[ntb + j] + back_bh[2][j]));
+          back_ht[i * D * H + j] =
+              (1 - zt[i * H + j]) * nt[i * H + j] + zt[i * H + j] * back_ht_1[i * D * H + j];
         }
       }
       back_ht_1 = back_ht;
-      back_ht = back_ht - D * H * N;
+      back_ht   = back_ht - D * H * N;
     }
   }
   //  copy last state to hy, from(N, H * D) to (D, N, H)
   if (state_outputs) {
     if (D == 1) {
       DType* y_start = y_ptr + (T - 1) * N * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
           hy_ptr[i * H + j] = y_start[i * H + j];
         }
     } else {
-      DType* y_start = y_ptr + (T - 1) * N * H * D;
+      DType* y_start      = y_ptr + (T - 1) * N * H * D;
       DType* y_back_start = y_ptr + H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
-          hy_ptr[i * H + j] = y_start[i * D * H + j];
+          hy_ptr[i * H + j]         = y_start[i * D * H + j];
           hy_ptr[N * H + i * H + j] = y_back_start[i * D * H + j];
         }
     }
@@ -782,14 +881,14 @@ void GruForwardInference(DType* ws,
                          DType* hy_ptr) {
   DType* wx = w_ptr;
   DType* wh = wx + I * H * 3;
-  DType* bx = wh + H * H * 3 + (D - 1) * (H * H * 3 + I * H * 3)
-      + (L - 1) * ((D + 1) * H) * H * 3 * D;
+  DType* bx =
+      wh + H * H * 3 + (D - 1) * (H * H * 3 + I * H * 3) + (L - 1) * ((D + 1) * H) * H * 3 * D;
   DType* bh = bx + H * 3;
 
-  DType* y_tmp = ws;
-  DType* y_l = x_ptr;
+  DType* y_tmp   = ws;
+  DType* y_l     = x_ptr;
   DType* tmp_buf = y_tmp + D * T * N * H;
-  DType* ws2 = y_tmp + D * T * N * H + D * H * N;
+  DType* ws2     = y_tmp + D * T * N * H + D * H * N;
 
   DType* wx_l = wx;
   DType* wh_l = wh;
@@ -805,8 +904,8 @@ void GruForwardInference(DType* ws,
       y_l = y_tmp;
     }
     Tensor<cpu, 2, DType> hx_l = hx[D * l];
-    GruForwardInferenceSingleLayer<DType>(ws2, tmp_buf, state_outputs, D, T, N, I, H,
-                                        x_l, hx_l, wx_l, wh_l, bx_l, bh_l, y_l, hy_l);
+    GruForwardInferenceSingleLayer<DType>(
+        ws2, tmp_buf, state_outputs, D, T, N, I, H, x_l, hx_l, wx_l, wh_l, bx_l, bh_l, y_l, hy_l);
     hy_l = hy_l + D * N * H;
     bx_l = bx_l + 3 * H * D * 2;
     bh_l = bh_l + 3 * H * D * 2;
@@ -818,8 +917,7 @@ void GruForwardInference(DType* ws,
   }
 }
 
-
-template<typename DType>
+template <typename DType>
 void GruForwardTrainingSingleLayer(DType* ws,
                                    DType* tmp_buf,
                                    bool state_outputs,
@@ -828,8 +926,8 @@ void GruForwardTrainingSingleLayer(DType* ws,
                                    const index_t N,
                                    const index_t I,
                                    const int H,
-                                   const Tensor<cpu, 2, DType> &x,
-                                   const Tensor<cpu, 2, DType> &hx,
+                                   const Tensor<cpu, 2, DType>& x,
+                                   const Tensor<cpu, 2, DType>& hx,
                                    DType* wx_ptr,
                                    DType* wh_ptr,
                                    DType* bx_ptr,
@@ -840,26 +938,26 @@ void GruForwardTrainingSingleLayer(DType* ws,
                                    DType* Mnh,
                                    DType* y_ptr,
                                    DType* hy_ptr) {
-  DType* ht = y_ptr;
-  DType* ht_1 = y_ptr;
-  DType* back_ht_1 = y_ptr + (T - 1)* N * H * D + H;
-  DType* back_ht = back_ht_1;
-
-  DType* gemmC1  = ws;              // [D, T, N, 3 * H]
-  DType* gemmC2  = gemmC1 + D * T * N * 3 * H;  // N * 3 * H
-  DType* rt = gateR;
-  DType* zt = gateZ;
-  DType* nt = gateN;
+  DType* ht        = y_ptr;
+  DType* ht_1      = y_ptr;
+  DType* back_ht_1 = y_ptr + (T - 1) * N * H * D + H;
+  DType* back_ht   = back_ht_1;
+
+  DType* gemmC1      = ws;                          // [D, T, N, 3 * H]
+  DType* gemmC2      = gemmC1 + D * T * N * 3 * H;  // N * 3 * H
+  DType* rt          = gateR;
+  DType* zt          = gateZ;
+  DType* nt          = gateN;
   DType* back_wx_ptr = wx_ptr + I * 3 * H + H * 3 * H;
   DType* back_wh_ptr = wh_ptr + I * 3 * H + H * 3 * H;
-  DType* back_bx_ptr = (bx_ptr != nullptr)? bx_ptr + 3 * H * 2 : nullptr;
-  DType* back_bh_ptr = (bh_ptr != nullptr)? bh_ptr + 3 * H * 2 : nullptr;
-  DType* back_gateR = gateR + T * N * H;
-  DType* back_gateZ = gateZ + T * N * H;
-  DType* back_gateN = gateN + T * N * H;
-  DType* back_Mnh = Mnh + T * N * H;
+  DType* back_bx_ptr = (bx_ptr != nullptr) ? bx_ptr + 3 * H * 2 : nullptr;
+  DType* back_bh_ptr = (bh_ptr != nullptr) ? bh_ptr + 3 * H * 2 : nullptr;
+  DType* back_gateR  = gateR + T * N * H;
+  DType* back_gateZ  = gateZ + T * N * H;
+  DType* back_gateN  = gateN + T * N * H;
+  DType* back_Mnh    = Mnh + T * N * H;
   DType* back_gemmC1 = gemmC1 + T * N * 3 * H;
-  DType* gemmC1_t = gemmC1;
+  DType* gemmC1_t    = gemmC1;
 
   const Tensor<cpu, 2, DType> wx(wx_ptr, Shape2(H * 3, I));
   const Tensor<cpu, 2, DType> wh(wh_ptr, Shape2(H * 3, H));
@@ -871,18 +969,18 @@ void GruForwardTrainingSingleLayer(DType* ws,
   const Tensor<cpu, 2, DType> back_bh(back_bh_ptr, Shape2(3, H));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (D == 1) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
         y_ptr[i * H + j] = hx[i][j];
       }
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
-        y_ptr[i * D * H + j] = hx[i][j];
+        y_ptr[i * D * H + j]     = hx[i][j];
         back_ht_1[i * D * H + j] = hx[N + i][j];
-    }
+      }
   }
 
   Tensor<cpu, 2, DType> dgemmC1(ws, Shape2(T * N, 3 * H));
@@ -891,7 +989,7 @@ void GruForwardTrainingSingleLayer(DType* ws,
 
   // x * wx.T : [T * N, I] * [I, 3 * H]
   DType alpha = 1.0;
-  DType beta = 0.0;
+  DType beta  = 0.0;
   linalg_gemm(x, wx, dgemmC1, alpha, beta, false, true);
   if (D == 2) {
     linalg_gemm(x, back_wx, dback_gemmC1, alpha, beta, false, true);
@@ -904,67 +1002,65 @@ void GruForwardTrainingSingleLayer(DType* ws,
     if (D == 1) {
       linalg_gemm(dht_1, wh, dgemmC2, alpha, beta, false, true);
     } else {
-      Tensor<cpu, 3, DType> dht_1_tmp = Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf),
-                                     Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dht_1_tmp = reshape(dht_1.T(), Shape3(D, H, N));
       linalg_gemm(dht_1_tmp[0], wh, dgemmC2, alpha, beta, true, true);
     }
-    rt = gateR + t * N * H;
-    zt = gateZ + t * N * H;
-    nt = gateN + t * N * H;
-    gemmC1_t = gemmC1 + t * N * 3 * H;
+    rt          = gateR + t * N * H;
+    zt          = gateZ + t * N * H;
+    nt          = gateN + t * N * H;
+    gemmC1_t    = gemmC1 + t * N * 3 * H;
     DType* Mnht = Mnh + t * N * H;
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
-        index_t rtb = i * 3 * H;
-        index_t ztb = i * 3 * H + H;
-        index_t ntb = i * 3 * H + 2 * H;
+        index_t rtb     = i * 3 * H;
+        index_t ztb     = i * 3 * H + H;
+        index_t ntb     = i * 3 * H + 2 * H;
         Mnht[i * H + j] = gemmC2[ntb + j] + bh[2][j];
-        rt[i * H + j] = sigmoid(gemmC1_t[rtb + j] + gemmC2[rtb + j]
-            + bx[0][j] + bh[0][j]);
-        zt[i * H + j] = sigmoid(gemmC1_t[ztb + j] + gemmC2[ztb + j]
-            + bx[1][j] + bh[1][j]);
-        nt[i * H + j] = tanh(gemmC1_t[ntb + j] + bx[2][j] +
-            rt[i * H + j] * (gemmC2[ntb + j] + bh[2][j]));
-        ht[i * D * H + j] = (1-zt[i * H + j]) * nt[i * H + j] +
-            zt[i * H + j] * ht_1[i * D * H + j];
+        rt[i * H + j]   = sigmoid(gemmC1_t[rtb + j] + gemmC2[rtb + j] + bx[0][j] + bh[0][j]);
+        zt[i * H + j]   = sigmoid(gemmC1_t[ztb + j] + gemmC2[ztb + j] + bx[1][j] + bh[1][j]);
+        nt[i * H + j] =
+            tanh(gemmC1_t[ntb + j] + bx[2][j] + rt[i * H + j] * (gemmC2[ntb + j] + bh[2][j]));
+        ht[i * D * H + j] =
+            (1 - zt[i * H + j]) * nt[i * H + j] + zt[i * H + j] * ht_1[i * D * H + j];
       }
     }
     ht_1 = ht;
-    ht = ht + D * H * N;
+    ht   = ht + D * H * N;
     //  perform the second direction
     if (D == 2) {
-      rt = back_gateR + (T - 1 - t) * N * H;
-      zt = back_gateZ + (T - 1 - t) * N * H;
-      nt = back_gateN + (T - 1 - t) * N * H;
+      rt       = back_gateR + (T - 1 - t) * N * H;
+      zt       = back_gateZ + (T - 1 - t) * N * H;
+      nt       = back_gateN + (T - 1 - t) * N * H;
       gemmC1_t = back_gemmC1 + (T - 1 - t) * N * 3 * H;
       Tensor<cpu, 2, DType> dback_ht_1(back_ht_1 - H, Shape2(N, D * H));
-      Tensor<cpu, 3, DType> dback_ht_1_tmp = Tensor<cpu, 3, DType>
-          (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dback_ht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dback_ht_1_tmp = reshape(dback_ht_1.T(), Shape3(D, H, N));
       linalg_gemm(dback_ht_1_tmp[1], back_wh, dgemmC2, alpha, beta, true, true);
 
       DType* back_Mnht = back_Mnh + (T - 1 - t) * N * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
-          index_t rtb = i * 3 * H;
-          index_t ztb = i * 3 * H + H;
-          index_t ntb = i * 3 * H + 2 * H;
+          index_t rtb          = i * 3 * H;
+          index_t ztb          = i * 3 * H + H;
+          index_t ntb          = i * 3 * H + 2 * H;
           back_Mnht[i * H + j] = gemmC2[ntb + j] + back_bh[2][j];
-          rt[i * H + j] = sigmoid(gemmC1_t[rtb + j] +
-              gemmC2[rtb + j] + back_bx[0][j] + back_bh[0][j]);
-          zt[i * H + j] = sigmoid(gemmC1_t[ztb + j] +
-              gemmC2[ztb + j] + back_bx[1][j] + back_bh[1][j]);
-          nt[i * H + j] = tanh(gemmC1_t[ntb + j] + back_bx[2][j]
-              + rt[i * H + j] * (gemmC2[ntb + j] + back_bh[2][j]));
-          back_ht[i * D * H + j] = (1 - zt[i * H + j]) * nt[i * H + j]
-              + zt[i * H + j] * back_ht_1[i * D * H + j];
+          rt[i * H + j] =
+              sigmoid(gemmC1_t[rtb + j] + gemmC2[rtb + j] + back_bx[0][j] + back_bh[0][j]);
+          zt[i * H + j] =
+              sigmoid(gemmC1_t[ztb + j] + gemmC2[ztb + j] + back_bx[1][j] + back_bh[1][j]);
+          nt[i * H + j] = tanh(gemmC1_t[ntb + j] + back_bx[2][j] +
+                               rt[i * H + j] * (gemmC2[ntb + j] + back_bh[2][j]));
+          back_ht[i * D * H + j] =
+              (1 - zt[i * H + j]) * nt[i * H + j] + zt[i * H + j] * back_ht_1[i * D * H + j];
         }
       }
       back_ht_1 = back_ht;
-      back_ht = back_ht - D * H * N;
+      back_ht   = back_ht - D * H * N;
     }
   }
 
@@ -972,18 +1068,18 @@ void GruForwardTrainingSingleLayer(DType* ws,
   if (state_outputs) {
     if (D == 1) {
       DType* y_start = y_ptr + (T - 1) * N * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
           hy_ptr[i * H + j] = y_start[i * H + j];
         }
     } else {
-      DType* y_start = y_ptr + (T - 1) * N * H * D;
+      DType* y_start      = y_ptr + (T - 1) * N * H * D;
       DType* y_back_start = y_ptr + H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
-          hy_ptr[i * H + j] = y_start[i * D * H + j];
+          hy_ptr[i * H + j]         = y_start[i * D * H + j];
           hy_ptr[N * H + i * H + j] = y_back_start[i * D * H + j];
         }
     }
@@ -1006,56 +1102,73 @@ void GruForwardTraining(DType* ws,
                         DType* y_ptr,
                         DType* hy_ptr,
                         const float dropout,
-                        std::mt19937 &rnd_engine) {  // NOLINT(runtime/references)
+                        std::mt19937& rnd_engine) {  // NOLINT(runtime/references)
   DType* wx = w_ptr;
   DType* wh = wx + I * H * 3;
-  DType* bx = wh + H * H * 3 + (D - 1) * (H * H * 3 + I * H * 3)
-      + (L - 1) * ((D + 1) * H) * H * 3 * D;
+  DType* bx =
+      wh + H * H * 3 + (D - 1) * (H * H * 3 + I * H * 3) + (L - 1) * ((D + 1) * H) * H * 3 * D;
   DType* bh = bx + H * 3;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(D * L, N, H));
-  DType* hy_l = hy_ptr;
-  DType* gateR_l = rs;
-  DType* gateZ_l = gateR_l + L * T * D * N * H;
-  DType* gateN_l = gateZ_l + L * T * D * N * H;
-  DType* y_l = gateN_l + L * T * D * N * H;
-  DType* Mnh_l = y_l + L * T * N * H * D;
+  DType* hy_l           = hy_ptr;
+  DType* gateR_l        = rs;
+  DType* gateZ_l        = gateR_l + L * T * D * N * H;
+  DType* gateN_l        = gateZ_l + L * T * D * N * H;
+  DType* y_l            = gateN_l + L * T * D * N * H;
+  DType* Mnh_l          = y_l + L * T * N * H * D;
   DType* dropout_random = Mnh_l + L * D * T * N * H;
-  DType* tmp_buf = dropout_random + (L - 1) * D * T * N * H;
-  DType* ws2 = tmp_buf + D * N * H;
-  DType* wx_l = wx;
-  DType* wh_l = wh;
-  DType* bx_l = bx;
-  DType* bh_l = bh;
-  DType* y_tmp = x_ptr;
+  DType* tmp_buf        = dropout_random + (L - 1) * D * T * N * H;
+  DType* ws2            = tmp_buf + D * N * H;
+  DType* wx_l           = wx;
+  DType* wh_l           = wh;
+  DType* bx_l           = bx;
+  DType* bh_l           = bh;
+  DType* y_tmp          = x_ptr;
   for (int l = 0; l < L; l++) {
     if (l != 0) {
       y_tmp = y_l;
-      y_l = y_l + T * N * H * D;
+      y_l   = y_l + T * N * H * D;
     }
     if (dropout > 0.0f && l > 0) {
       std::uniform_real_distribution<float> distribution(0, 1);
       for (index_t i = 0; i < T * N * I; i++) {
         if (distribution(rnd_engine) < dropout) {
           dropout_random[(l - 1) * T * N * I + i] = 0;
-          y_tmp[i] = 0;
+          y_tmp[i]                                = 0;
         } else {
           dropout_random[(l - 1) * T * N * I + i] = 1.0f - dropout;
-          y_tmp[i] =  y_tmp[i] / (1.0f - dropout);
+          y_tmp[i]                                = y_tmp[i] / (1.0f - dropout);
         }
       }
     }
     Tensor<cpu, 2, DType> x_l(y_tmp, Shape2(T * N, I));
     Tensor<cpu, 2, DType> hx_l = hx[D * l];
-    GruForwardTrainingSingleLayer<DType>(ws2, tmp_buf, state_outputs, D, T, N, I, H,
-                                         x_l, hx_l, wx_l, wh_l, bx_l, bh_l,
-                                         gateR_l, gateZ_l, gateN_l, Mnh_l, y_l, hy_l);
+    GruForwardTrainingSingleLayer<DType>(ws2,
+                                         tmp_buf,
+                                         state_outputs,
+                                         D,
+                                         T,
+                                         N,
+                                         I,
+                                         H,
+                                         x_l,
+                                         hx_l,
+                                         wx_l,
+                                         wh_l,
+                                         bx_l,
+                                         bh_l,
+                                         gateR_l,
+                                         gateZ_l,
+                                         gateN_l,
+                                         Mnh_l,
+                                         y_l,
+                                         hy_l);
     gateR_l = gateR_l + T * D * N * H;
     gateZ_l = gateZ_l + T * D * N * H;
     gateN_l = gateN_l + T * D * N * H;
-    Mnh_l = Mnh_l +  T * D * N * H;
-    hy_l = hy_l + D * N * H;
-    bx_l = bx_l + 3 * H * D * 2;
-    bh_l = bh_l + 3 * H * D * 2;
+    Mnh_l   = Mnh_l + T * D * N * H;
+    hy_l    = hy_l + D * N * H;
+    bx_l    = bx_l + 3 * H * D * 2;
+    bh_l    = bh_l + 3 * H * D * 2;
 
     wx_l = wx_l + I * H * 3 * D + H * H * 3 * D;
     if (l == 0) {
@@ -1064,7 +1177,7 @@ void GruForwardTraining(DType* ws,
     wh_l = wx_l + I * 3 * H;
   }
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < T * N * H * D; ++i) {
     y_ptr[i] = y_l[i];
   }
@@ -1078,8 +1191,8 @@ void GruBackwardSingleLayer(DType* ws,
                             const index_t N,
                             const index_t I,
                             const int H,
-                            const Tensor<cpu, 2, DType> &x,
-                            const Tensor<cpu, 2, DType> &hx,
+                            const Tensor<cpu, 2, DType>& x,
+                            const Tensor<cpu, 2, DType>& hx,
                             DType* wx_ptr,
                             DType* wh_ptr,
                             DType* y_ptr,
@@ -1105,43 +1218,43 @@ void GruBackwardSingleLayer(DType* ws,
   DType* nt;
   DType* dat;
   DType* dart;
-  DType* dar = ws;  // [T, N, 3 * H]
-  DType* da = dar + T * N * 3 * H;  // [T, N, 3 * H]
-  DType* dht1 = da + T * N * 3 * H;  // [D, N, H]
-  DType* hx_ = dht1 + D * N * H;  // [N, D, H]
+  DType* dar  = ws;                   // [T, N, 3 * H]
+  DType* da   = dar + T * N * 3 * H;  // [T, N, 3 * H]
+  DType* dht1 = da + T * N * 3 * H;   // [D, N, H]
+  DType* hx_  = dht1 + D * N * H;     // [N, D, H]
   DType* Mnht = Mnh;
   DType* back_ht1;
-  DType* back_dht1 = dht1 + N * H;  // [N, H]
-  DType* back_Mnht = Mnh + T * N * H;
-  DType* back_gateR = gateR + T * N * H;
-  DType* back_gateZ = gateZ + T * N * H;
-  DType* back_gateN = gateN + T * N * H;
+  DType* back_dht1   = dht1 + N * H;  // [N, H]
+  DType* back_Mnht   = Mnh + T * N * H;
+  DType* back_gateR  = gateR + T * N * H;
+  DType* back_gateZ  = gateZ + T * N * H;
+  DType* back_gateN  = gateN + T * N * H;
   DType* back_wx_ptr = wx_ptr + I * 3 * H + H * 3 * H;
   DType* back_wh_ptr = wh_ptr + I * 3 * H + H * 3 * H;
-  DType* back_dwx = dwx + I * 3 * H + H * 3 * H;
-  DType* back_dwh = dwh + I * 3 * H + H * 3 * H;
-  DType* back_dbx = dbx + 3 * H * 2;
-  DType* back_dbh = dbh + 3 * H * 2;
+  DType* back_dwx    = dwx + I * 3 * H + H * 3 * H;
+  DType* back_dwh    = dwh + I * 3 * H + H * 3 * H;
+  DType* back_dbx    = dbx + 3 * H * 2;
+  DType* back_dbh    = dbh + 3 * H * 2;
 
   DType alpha = 1.0;
-  DType beta = 0.0;
+  DType beta  = 0.0;
   const Tensor<cpu, 2, DType> wx(wx_ptr, Shape2(H * 3, I));
   const Tensor<cpu, 2, DType> wh(wh_ptr, Shape2(H * 3, H));
   const Tensor<cpu, 2, DType> back_wx(back_wx_ptr, Shape2(H * 3, I));
   const Tensor<cpu, 2, DType> back_wh(back_wh_ptr, Shape2(H * 3, H));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (req_params != kNullOp && req_params != kAddTo) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < D * H * 3 * H; ++i) {
       dwh[i] = 0;
     }
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < D * 3 * H; ++i) {
       dbx[i] = 0;
       dbh[i] = 0;
     }
   }
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < N * H; ++i) {
     if (dhy_ptr) {
       dht1[i] = dhy_ptr[i];
@@ -1150,7 +1263,7 @@ void GruBackwardSingleLayer(DType* ws,
     }
   }
 
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < N; ++i) {
     for (int j = 0; j < H; ++j) {
       hx_[i * D * H + j] = hx[i][j];
@@ -1158,7 +1271,7 @@ void GruBackwardSingleLayer(DType* ws,
   }
 
   if (D == 2) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N * H; ++i) {
       if (dhy_ptr) {
         back_dht1[i] = dhy_ptr[N * H + i];
@@ -1166,7 +1279,7 @@ void GruBackwardSingleLayer(DType* ws,
         back_dht1[i] = 0;
       }
     }
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         hx_[i * D * H + H + j] = hx[N + i][j];
@@ -1182,38 +1295,36 @@ void GruBackwardSingleLayer(DType* ws,
     // add dy[T, N, D, H] to dhy[D, N, H]
     dyt = dy_ptr + t * N * D * H;
 
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         dht1[i * H + j] += dyt[i * D * H + j];
       }
     }
 
-    rt = gateR + t * N * H;
-    zt = gateZ + t * N * H;
-    nt = gateN + t * N * H;
-    Mnht = Mnh +  t * N * H;
-    dat = da + t * N * 3 * H;
+    rt   = gateR + t * N * H;
+    zt   = gateZ + t * N * H;
+    nt   = gateN + t * N * H;
+    Mnht = Mnh + t * N * H;
+    dat  = da + t * N * 3 * H;
     dart = dar + t * N * 3 * H;
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
-        int nid = i * 3 * H + 2 * H + j;
-        int zid = i * 3 * H + H + j;
-        int rid = i * 3 * H + j;
-        int id = i * H + j;
-        dat[nid] = dht1[id] * (1 - zt[id]) * (1 - nt[id] * nt[id]);
-        dart[zid] = dat[zid] = dht1[id] * (ht1[i * D * H + j] - nt[id]) *
-            zt[id] * (1 - zt[id]);
-        dart[rid] = dat[rid] = dat[nid] * Mnht[id] * rt[id] *
-            (1 - rt[id]);
-        dart[nid] = dat[nid] * rt[id];
-        dht1[id] = dht1[id] * zt[id];
+        int nid   = i * 3 * H + 2 * H + j;
+        int zid   = i * 3 * H + H + j;
+        int rid   = i * 3 * H + j;
+        int id    = i * H + j;
+        dat[nid]  = dht1[id] * (1 - zt[id]) * (1 - nt[id] * nt[id]);
+        dart[zid] = dat[zid] = dht1[id] * (ht1[i * D * H + j] - nt[id]) * zt[id] * (1 - zt[id]);
+        dart[rid] = dat[rid] = dat[nid] * Mnht[id] * rt[id] * (1 - rt[id]);
+        dart[nid]            = dat[nid] * rt[id];
+        dht1[id]             = dht1[id] * zt[id];
       }
     }
     if (req_params != kNullOp) {
       alpha = 1.0;
-      beta = 1.0;
+      beta  = 1.0;
       // dht1 = dart * wh    [N, H] = [N, 3 * H] * [3 * H, H]
       Tensor<cpu, 2, DType> d_dht1(dht1, Shape2(N, H));
       Tensor<cpu, 2, DType> d_dart(dart, Shape2(N, 3 * H));
@@ -1230,8 +1341,8 @@ void GruBackwardSingleLayer(DType* ws,
       // dwh = dart.T * ht1    [3 * H, H] = [3 * H, N] * [N, H]
       Tensor<cpu, 2, DType> d_ht1(ht1, Shape2(N, D * H));
       Tensor<cpu, 2, DType> d_dwh(dwh, Shape2(3 * H, H));
-      Tensor<cpu, 3, DType> d_ht1_tmp = Tensor<cpu, 3, DType>
-          (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+      Tensor<cpu, 3, DType> d_ht1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       d_ht1_tmp = reshape(d_ht1.T(), Shape3(D, H, N));
       linalg_gemm(d_dart, d_ht1_tmp[0], d_dwh, alpha, beta, true, true);
     }
@@ -1240,7 +1351,7 @@ void GruBackwardSingleLayer(DType* ws,
   if (req_params != kNullOp) {
     // dbx = e * da       [1, 3 * H] = [1, N] * [N, 3 * H]
     if (req_params != kAddTo) {
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (int i = 0; i < 3 * H; ++i) {
         for (index_t j = 0; j < N * T; ++j) {
           dbx[i] += da[j * 3 * H + i];
@@ -1250,21 +1361,21 @@ void GruBackwardSingleLayer(DType* ws,
     } else {
       const Tensor<cpu, 2, DType> tmp_dbx(tmp_buf + T * N * D * H, Shape2(H * 3, T));
       const Tensor<cpu, 2, DType> tmp_dbh(tmp_buf + T * N * D * H + 3 * H * T, Shape2(H * 3, T));
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < H * T * 3; ++i) {
         tmp_dbx.dptr_[i] = 0;
         tmp_dbh.dptr_[i] = 0;
       }
 
       for (index_t t = T - 1; t >= 0; --t) {
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (int i = 0; i < 3 * H; ++i) {
           for (index_t j = 0; j < N; ++j) {
             tmp_dbx[i][t] += da[t * N * 3 * H + j * 3 * H + i];
             tmp_dbh[i][t] += dar[t * N * 3 * H + j * 3 * H + i];
           }
         }
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (int i = 0; i < 3 * H; ++i) {
           dbx[i] += tmp_dbx[i][t] + dbx[i];
           dbh[i] += tmp_dbh[i][t] + dbh[i];
@@ -1273,7 +1384,7 @@ void GruBackwardSingleLayer(DType* ws,
     }
   }
   alpha = 1.0;
-  beta = 0.0;
+  beta  = 0.0;
 
   // dx = da * wx    [T * N, I] = [T * N, 3 * H] * [3 * H, I]
   Tensor<cpu, 2, DType> d_da(da, Shape2(T * N, 3 * H));
@@ -1290,7 +1401,7 @@ void GruBackwardSingleLayer(DType* ws,
 
   if (D == 2) {
     for (index_t t = 0; t < T; ++t) {
-      if (t == T-1) {
+      if (t == T - 1) {
         back_ht1 = hx_;
       } else {
         back_ht1 = y_ptr + (t + 1) * N * D * H;
@@ -1298,40 +1409,39 @@ void GruBackwardSingleLayer(DType* ws,
 
       //  add dy[T, N, D, H] to dhy[D, N, H]
       dyt = dy_ptr + t * N * D * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           back_dht1[i * H + j] += dyt[i * D * H + H + j];
         }
       }
 
-      rt = back_gateR + t * N * H;
-      zt = back_gateZ + t * N * H;
-      nt = back_gateN + t * N * H;
+      rt        = back_gateR + t * N * H;
+      zt        = back_gateZ + t * N * H;
+      nt        = back_gateN + t * N * H;
       back_Mnht = Mnh + (T + t) * N * H;
-      dat = da + t * N * 3 * H;
-      dart = dar + t * N * 3 * H;
+      dat       = da + t * N * 3 * H;
+      dart      = dar + t * N * 3 * H;
 
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           index_t nid = i * 3 * H + 2 * H + j;
           index_t zid = i * 3 * H + H + j;
           index_t rid = i * 3 * H + j;
-          index_t id = i * H + j;
-          dat[nid] = back_dht1[id] * (1 - zt[id]) * (1 - nt[id] * nt[id]);
-          dart[zid] = dat[zid] = back_dht1[id] * (back_ht1[i * D * H + H + j] -
-              nt[id]) * zt[id] * (1 - zt[id]);
-          dart[rid] = dat[rid] = dat[nid] * back_Mnht[id] * rt[id] *
-              (1 - rt[id]);
-          dart[nid] = dat[nid] * rt[id];
-          back_dht1[id] = back_dht1[id] * zt[id];
+          index_t id  = i * H + j;
+          dat[nid]    = back_dht1[id] * (1 - zt[id]) * (1 - nt[id] * nt[id]);
+          dart[zid]   = dat[zid] =
+              back_dht1[id] * (back_ht1[i * D * H + H + j] - nt[id]) * zt[id] * (1 - zt[id]);
+          dart[rid] = dat[rid] = dat[nid] * back_Mnht[id] * rt[id] * (1 - rt[id]);
+          dart[nid]            = dat[nid] * rt[id];
+          back_dht1[id]        = back_dht1[id] * zt[id];
         }
       }
 
       if (req_params != kNullOp) {
         alpha = 1.0;
-        beta = 1.0;
+        beta  = 1.0;
         // dht1 = da * wh    [N, H] = [N, 3 * H] * [3 * H, H]
         Tensor<cpu, 2, DType> d_dart(dart, Shape2(N, 3 * H));
         Tensor<cpu, 2, DType> d_back_dht1(back_dht1, Shape2(N, H));
@@ -1340,8 +1450,8 @@ void GruBackwardSingleLayer(DType* ws,
         // dwh = da.T * ht1     [3 * H, H] = [3 * H, N] * [N, H]
         Tensor<cpu, 2, DType> d_back_dwh(back_dwh, Shape2(3 * H, H));
         Tensor<cpu, 2, DType> d_back_ht1(back_ht1 + H, Shape2(N, D * H));
-        Tensor<cpu, 3, DType> d_back_ht1_tmp = Tensor<cpu, 3, DType>
-            (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+        Tensor<cpu, 3, DType> d_back_ht1_tmp =
+            Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
         d_back_ht1_tmp = reshape(d_back_ht1.T(), Shape3(D, H, N));
         if (req_params == kAddTo) {
           beta = 2.0;
@@ -1356,9 +1466,9 @@ void GruBackwardSingleLayer(DType* ws,
     }
 
     if (req_params != kNullOp) {
-    // dbx = e * da       [1, 3 * H] = [1, N] * [N, 3 * H]
+      // dbx = e * da       [1, 3 * H] = [1, N] * [N, 3 * H]
       if (req_params != kAddTo) {
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (int i = 0; i < 3 * H; ++i) {
           for (index_t j = 0; j < N * T; ++j) {
             back_dbx[i] += da[j * 3 * H + i];
@@ -1368,20 +1478,20 @@ void GruBackwardSingleLayer(DType* ws,
       } else {
         const Tensor<cpu, 2, DType> tmp_dbx(tmp_buf + T * N * D * H, Shape2(H * 3, T));
         const Tensor<cpu, 2, DType> tmp_dbh(tmp_buf + T * N * D * H + 3 * H * T, Shape2(H * 3, T));
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (index_t i = 0; i < H * T * 3; ++i) {
           tmp_dbx.dptr_[i] = 0;
           tmp_dbh.dptr_[i] = 0;
         }
         for (index_t t = T - 1; t >= 0; --t) {
-          #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
           for (int i = 0; i < 3 * H; ++i) {
             for (index_t j = 0; j < N; ++j) {
               tmp_dbx[i][t] += da[t * N * 3 * H + j * 3 * H + i];
               tmp_dbh[i][t] += dar[t * N * 3 * H + j * 3 * H + i];
             }
           }
-          #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
           for (int i = 0; i < 3 * H; ++i) {
             back_dbx[i] += tmp_dbx[i][t] + back_dbx[i];
             back_dbh[i] += tmp_dbh[i][t] + back_dbh[i];
@@ -1390,7 +1500,7 @@ void GruBackwardSingleLayer(DType* ws,
       }
     }
     alpha = 1.0;
-    beta = 1.0;
+    beta  = 1.0;
     // dxt = da * wx    [T * N, I] = [T * N, 3 * H] * [3 * H, I]
     Tensor<cpu, 2, DType> d_da2(da, Shape2(T * N, 3 * H));
     if (req_data != kNullOp) {
@@ -1398,7 +1508,7 @@ void GruBackwardSingleLayer(DType* ws,
       linalg_gemm(d_da2, back_wx, d_dx, alpha, beta, false, false);
     }
     alpha = 1.0;
-    beta = 0.0;
+    beta  = 0.0;
     // dwx = da.T * x    [3 * H, I] = [3 * H, T * N] * [T * N, I]
     if (req_params != kNullOp && req_params != kAddTo) {
       Tensor<cpu, 2, DType> d_back_dwx(back_dwx, Shape2(3 * H, I));
@@ -1406,7 +1516,7 @@ void GruBackwardSingleLayer(DType* ws,
     }
   }
   if (req_state != kNullOp) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N * H * D; ++i) {
       dhx[i] = dht1[i];
     }
@@ -1434,22 +1544,22 @@ void GruBackward(DType* ws,
                  int req_params,
                  int req_state,
                  const float dropout) {
-  DType* wx = w_ptr;
+  DType* wx  = w_ptr;
   DType* dwx = dw_ptr;
   DType* dwh = dwx + I * H * 3;
-  DType* dbx = dwh + H * H * 3 + (D - 1) * (H * H * 3 + I * H * 3)
-      + (L - 1) * ((D + 1) * H) * H * 3 * D;
-  DType* gateR_l = rs + (L - 1) * T * D * N * H;
-  DType* gateZ_l = gateR_l + L * T * D * N * H;
-  DType* gateN_l = gateZ_l + L * T * D * N * H;
-  DType* y_l = gateN_l + L * T * D * N * H;
-  DType* Mnh_l = y_l + L * T * N * H * D;
+  DType* dbx =
+      dwh + H * H * 3 + (D - 1) * (H * H * 3 + I * H * 3) + (L - 1) * ((D + 1) * H) * H * 3 * D;
+  DType* gateR_l        = rs + (L - 1) * T * D * N * H;
+  DType* gateZ_l        = gateR_l + L * T * D * N * H;
+  DType* gateN_l        = gateZ_l + L * T * D * N * H;
+  DType* y_l            = gateN_l + L * T * D * N * H;
+  DType* Mnh_l          = y_l + L * T * N * H * D;
   DType* dropout_random = Mnh_l + L * D * T * N * H;
-  DType* tmp_buf = dropout_random + (L - 1) * D * T * N * H;
-  DType* dx_l = tmp_buf + T * N * D * H + 3 * H * T * 2;
-  DType* ws2 = dx_l + T * N * D * H;
-  DType* wx_l = (L == 1)? wx : wx + (L - 2) * D * (D + 1) * H * 3 * H
-      + D * I * 3 * H + D * H * 3 * H;
+  DType* tmp_buf        = dropout_random + (L - 1) * D * T * N * H;
+  DType* dx_l           = tmp_buf + T * N * D * H + 3 * H * T * 2;
+  DType* ws2            = dx_l + T * N * D * H;
+  DType* wx_l =
+      (L == 1) ? wx : wx + (L - 2) * D * (D + 1) * H * 3 * H + D * I * 3 * H + D * H * 3 * H;
   DType* wh_l = wx_l;
   if (L == 1) {
     wh_l = wh_l + I * H * 3;
@@ -1459,8 +1569,8 @@ void GruBackward(DType* ws,
   DType* dhy_l = nullptr;
   if (dhy_ptr)
     dhy_l = dhy_ptr + (L - 1) * D * N * H;
-  DType* dwx_l = (L == 1)? dwx : dwx + (L - 2) * D * (D + 1) * H * 3 * H
-      + D * I * 3 * H + D * H * 3 * H;
+  DType* dwx_l =
+      (L == 1) ? dwx : dwx + (L - 2) * D * (D + 1) * H * 3 * H + D * I * 3 * H + D * H * 3 * H;
   DType* dwh_l = nullptr;
   if (L == 1) {
     dwh_l = dwx_l + I * H * 3;
@@ -1470,27 +1580,51 @@ void GruBackward(DType* ws,
   DType* dbx_l = dbx + (L - 1) * D * 3 * H * 2;
   DType* dbh_l = dbx_l + 3 * H;
   DType* dhx_l = dhx_ptr + (L - 1) * D * N * H;
-  DType* dy_l = dy_ptr;
+  DType* dy_l  = dy_ptr;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(L, D * N, H));
-  index_t inputsize = I;
-  DType* y_tmp = y_l - T * N * H * D;
+  index_t inputsize     = I;
+  DType* y_tmp          = y_l - T * N * H * D;
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   for (int l = L - 1; l >= 0; --l) {
     if (l == 0) {
-      I = inputsize;
+      I     = inputsize;
       y_tmp = x_ptr;
-      dx_l = dx_ptr;
+      dx_l  = dx_ptr;
     } else {
       I = D * H;
     }
     Tensor<cpu, 2, DType> hx_l = hx[l];
     Tensor<cpu, 2, DType> x_l(y_tmp, Shape2(T * N, I));
-    GruBackwardSingleLayer<DType>(ws2, tmp_buf, D, T, N, I, H, x_l, hx_l, wx_l, wh_l, y_l, dy_l,
-                                  dhy_l, gateR_l, gateZ_l, gateN_l, Mnh_l, dx_l, dhx_l,
-                                  dwx_l, dwh_l, dbx_l, dbh_l, req_data, req_params, req_state);
+    GruBackwardSingleLayer<DType>(ws2,
+                                  tmp_buf,
+                                  D,
+                                  T,
+                                  N,
+                                  I,
+                                  H,
+                                  x_l,
+                                  hx_l,
+                                  wx_l,
+                                  wh_l,
+                                  y_l,
+                                  dy_l,
+                                  dhy_l,
+                                  gateR_l,
+                                  gateZ_l,
+                                  gateN_l,
+                                  Mnh_l,
+                                  dx_l,
+                                  dhx_l,
+                                  dwx_l,
+                                  dwh_l,
+                                  dbx_l,
+                                  dbh_l,
+                                  req_data,
+                                  req_params,
+                                  req_state);
     if (dropout > 0.0f && l > 0 && req_data != kNullOp) {
       dropout_random = dropout_random - T * N * D * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < T * N * I; i++) {
         if (dropout_random[i] == 0) {
           dx_l[i] = 0;
@@ -1500,27 +1634,27 @@ void GruBackward(DType* ws,
       }
     }
     if (l > 0) {
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < T * N * H * D; ++i) {
         dy_l[i] = dx_l[i];
       }
       gateR_l = gateR_l - T * D * N * H;
       gateZ_l = gateZ_l - T * D * N * H;
       gateN_l = gateN_l - T * D * N * H;
-      Mnh_l = Mnh_l -  T * D * N * H;
-      dhx_l = dhx_l - D * N * H;
+      Mnh_l   = Mnh_l - T * D * N * H;
+      dhx_l   = dhx_l - D * N * H;
       if (dhy_l)
         dhy_l = dhy_l - D * N * H;
-      y_l = y_l - T * N * H * D;
+      y_l   = y_l - T * N * H * D;
       y_tmp = y_tmp - T * N * H * D;
       if (l == 1) {
-        wx_l = wx_l - (inputsize + H) * H * 3 * D;
-        wh_l = wx_l + inputsize * 3 * H;
+        wx_l  = wx_l - (inputsize + H) * H * 3 * D;
+        wh_l  = wx_l + inputsize * 3 * H;
         dwx_l = dwx_l - (inputsize + H) * H * 3 * D;
         dwh_l = dwx_l + inputsize * 3 * H;
       } else {
-        wx_l = wx_l - (I + H) * H * 3 * D;
-        wh_l = wx_l + I * 3 * H;
+        wx_l  = wx_l - (I + H) * H * 3 * D;
+        wh_l  = wx_l + I * 3 * H;
         dwx_l = dwx_l - (I + H) * H * 3 * D;
         dwh_l = dwx_l + I * 3 * H;
       }
@@ -1530,7 +1664,7 @@ void GruBackward(DType* ws,
   }
 }
 
-template<typename DType>
+template <typename DType>
 void VanillaRNNForwardInferenceSingleLayer(DType* ws,
                                            DType* tmp_buf,
                                            bool state_outputs,
@@ -1539,8 +1673,8 @@ void VanillaRNNForwardInferenceSingleLayer(DType* ws,
                                            const index_t N,
                                            const index_t I,
                                            const int H,
-                                           const Tensor<cpu, 2, DType> &x,
-                                           const Tensor<cpu, 2, DType> &hx,
+                                           const Tensor<cpu, 2, DType>& x,
+                                           const Tensor<cpu, 2, DType>& hx,
                                            DType* wx_ptr,
                                            DType* wh_ptr,
                                            DType* bx_ptr,
@@ -1548,18 +1682,18 @@ void VanillaRNNForwardInferenceSingleLayer(DType* ws,
                                            DType* y_ptr,
                                            DType* hy_ptr,
                                            int mode) {
-  DType* ht = y_ptr;
-  DType* ht_1 = y_ptr;
-  DType* back_ht_1 = y_ptr + (T-1) * N * H * D + H;
-  DType* back_ht = back_ht_1;
-  DType* gemmC1  = ws;              // [D, T, N, H]
-  DType* gemmC2  = gemmC1 + D * T * N * H;  // N * H
+  DType* ht          = y_ptr;
+  DType* ht_1        = y_ptr;
+  DType* back_ht_1   = y_ptr + (T - 1) * N * H * D + H;
+  DType* back_ht     = back_ht_1;
+  DType* gemmC1      = ws;                      // [D, T, N, H]
+  DType* gemmC2      = gemmC1 + D * T * N * H;  // N * H
   DType* back_wx_ptr = wx_ptr + I * H + H * H;
   DType* back_wh_ptr = wh_ptr + I * H + H * H;
-  DType* back_bx_ptr = (bx_ptr != nullptr)? bx_ptr + H * 2 : nullptr;
-  DType* back_bh_ptr = (bh_ptr != nullptr)? bh_ptr + H * 2: nullptr;
+  DType* back_bx_ptr = (bx_ptr != nullptr) ? bx_ptr + H * 2 : nullptr;
+  DType* back_bh_ptr = (bh_ptr != nullptr) ? bh_ptr + H * 2 : nullptr;
   DType* back_gemmC1 = gemmC1 + T * N * H;
-  DType* gemmC1_t = gemmC1;
+  DType* gemmC1_t    = gemmC1;
 
   const Tensor<cpu, 2, DType> wx(wx_ptr, Shape2(H, I));
   const Tensor<cpu, 2, DType> wh(wh_ptr, Shape2(H, H));
@@ -1571,18 +1705,18 @@ void VanillaRNNForwardInferenceSingleLayer(DType* ws,
   const Tensor<cpu, 2, DType> back_bh(back_bh_ptr, Shape2(1, H));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (D == 1) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
         y_ptr[i * H + j] = hx[i][j];
       }
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
-        y_ptr[i * D * H + j] = hx[i][j];
+        y_ptr[i * D * H + j]     = hx[i][j];
         back_ht_1[i * D * H + j] = hx[N + i][j];
-    }
+      }
   }
   Tensor<cpu, 2, DType> dgemmC1(ws, Shape2(T * N, H));
   Tensor<cpu, 2, DType> dgemmC2(gemmC2, Shape2(N, H));
@@ -1590,7 +1724,7 @@ void VanillaRNNForwardInferenceSingleLayer(DType* ws,
 
   // x * wx.T : [T * N, I] * [I, H]
   DType alpha = 1.0;
-  DType beta = 0.0;
+  DType beta  = 0.0;
   linalg_gemm(x, wx, dgemmC1, alpha, beta, false, true);
   if (D == 2) {
     linalg_gemm(x, back_wx, dback_gemmC1, alpha, beta, false, true);
@@ -1603,69 +1737,67 @@ void VanillaRNNForwardInferenceSingleLayer(DType* ws,
     if (D == 1) {
       linalg_gemm(dht_1, wh, dgemmC2, alpha, beta, false, true);
     } else {
-      Tensor<cpu, 3, DType> dht_1_tmp = Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf),
-                                     Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dht_1_tmp = reshape(dht_1.T(), Shape3(D, H, N));
       linalg_gemm(dht_1_tmp[0], wh, dgemmC2, alpha, beta, true, true);
     }
     gemmC1_t = gemmC1 + t * N * H;
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         index_t tb = i * H;
         if (mode == 1) {
-          ht[i * D * H + j] = tanh(gemmC1_t[tb + j] + bx[0][j] +
-              gemmC2[tb + j] + bh[0][j]);
+          ht[i * D * H + j] = tanh(gemmC1_t[tb + j] + bx[0][j] + gemmC2[tb + j] + bh[0][j]);
         } else {
-          ht[i * D * H + j] = relu(gemmC1_t[tb + j] + bx[0][j] +
-              gemmC2[tb + j] + bh[0][j]);
+          ht[i * D * H + j] = relu(gemmC1_t[tb + j] + bx[0][j] + gemmC2[tb + j] + bh[0][j]);
         }
       }
     }
     ht_1 = ht;
-    ht = ht + D * H * N;
+    ht   = ht + D * H * N;
     //  perform the second direction
     if (D == 2) {
       gemmC1_t = back_gemmC1 + (T - 1 - t) * N * H;
       Tensor<cpu, 2, DType> dback_ht_1(back_ht_1 - H, Shape2(N, D * H));
-      Tensor<cpu, 3, DType> dback_ht_1_tmp = Tensor<cpu, 3, DType>
-          (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dback_ht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dback_ht_1_tmp = reshape(dback_ht_1.T(), Shape3(D, H, N));
       linalg_gemm(dback_ht_1_tmp[1], back_wh, dgemmC2, alpha, beta, true, true);
 
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           index_t tb = i * H;
           if (mode == 1) {
-            back_ht[i * D * H + j] = tanh(gemmC1_t[tb + j] + back_bx[0][j]
-                + gemmC2[tb + j] + back_bh[0][j]);
+            back_ht[i * D * H + j] =
+                tanh(gemmC1_t[tb + j] + back_bx[0][j] + gemmC2[tb + j] + back_bh[0][j]);
           } else {
-            back_ht[i * D * H + j] = relu(gemmC1_t[tb + j] + back_bx[0][j]
-              + gemmC2[tb + j] + back_bh[0][j]);
+            back_ht[i * D * H + j] =
+                relu(gemmC1_t[tb + j] + back_bx[0][j] + gemmC2[tb + j] + back_bh[0][j]);
           }
         }
       }
       back_ht_1 = back_ht;
-      back_ht = back_ht - D * H * N;
+      back_ht   = back_ht - D * H * N;
     }
   }
   //  copy last state to hy, from(N, H * D) to (D, N, H)
   if (state_outputs) {
     if (D == 1) {
       DType* y_start = y_ptr + (T - 1) * N * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
           hy_ptr[i * H + j] = y_start[i * H + j];
         }
     } else {
-      DType* y_start = y_ptr + (T - 1) * N * H * D;
+      DType* y_start      = y_ptr + (T - 1) * N * H * D;
       DType* y_back_start = y_ptr + H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
-          hy_ptr[i * H + j] = y_start[i * D * H + j];
+          hy_ptr[i * H + j]         = y_start[i * D * H + j];
           hy_ptr[N * H + i * H + j] = y_back_start[i * D * H + j];
         }
     }
@@ -1689,14 +1821,13 @@ void VanillaRNNForwardInference(DType* ws,
                                 int mode) {
   DType* wx = w_ptr;
   DType* wh = wx + I * H;
-  DType* bx = wh + H * H + (D - 1) * (H * H + I * H)
-      + (L - 1) * ((D + 1) * H) * H * D;
+  DType* bx = wh + H * H + (D - 1) * (H * H + I * H) + (L - 1) * ((D + 1) * H) * H * D;
   DType* bh = bx + H;
 
-  DType* y_tmp = ws;
-  DType* y_l = x_ptr;
+  DType* y_tmp   = ws;
+  DType* y_l     = x_ptr;
   DType* tmp_buf = y_tmp + D * T * N * H;
-  DType* ws2 = y_tmp + D * T * N * H + D * H * N;
+  DType* ws2     = y_tmp + D * T * N * H + D * H * N;
 
   DType* wx_l = wx;
   DType* wh_l = wh;
@@ -1712,9 +1843,23 @@ void VanillaRNNForwardInference(DType* ws,
       y_l = y_tmp;
     }
     Tensor<cpu, 2, DType> hx_l = hx[D * l];
-    VanillaRNNForwardInferenceSingleLayer<DType>(ws2, tmp_buf, state_outputs, D, T, N, I, H,
-                                                 x_l, hx_l, wx_l, wh_l, bx_l, bh_l, y_l,
-                                                 hy_l, mode);
+    VanillaRNNForwardInferenceSingleLayer<DType>(ws2,
+                                                 tmp_buf,
+                                                 state_outputs,
+                                                 D,
+                                                 T,
+                                                 N,
+                                                 I,
+                                                 H,
+                                                 x_l,
+                                                 hx_l,
+                                                 wx_l,
+                                                 wh_l,
+                                                 bx_l,
+                                                 bh_l,
+                                                 y_l,
+                                                 hy_l,
+                                                 mode);
     hy_l = hy_l + D * N * H;
     bx_l = bx_l + H * D * 2;
     bh_l = bh_l + H * D * 2;
@@ -1726,41 +1871,40 @@ void VanillaRNNForwardInference(DType* ws,
   }
 }
 
-
-template<typename DType>
+template <typename DType>
 void VanillaRNNForwardTrainingSingleLayer(DType* ws,
-                                       DType* tmp_buf,
-                                       bool state_outputs,
-                                       const int D,
-                                       const index_t T,
-                                       const index_t N,
-                                       const index_t I,
-                                       const int H,
-                                       const Tensor<cpu, 2, DType> &x,
-                                       const Tensor<cpu, 2, DType> &hx,
-                                       DType* wx_ptr,
-                                       DType* wh_ptr,
-                                       DType* bx_ptr,
-                                       DType* bh_ptr,
-                                       DType* gateN,
-                                       DType* y_ptr,
-                                       DType* hy_ptr,
-                                       int mode) {
-  DType* ht = y_ptr;
-  DType* ht_1 = y_ptr;
-  DType* back_ht_1 = y_ptr + (T - 1)* N * H * D + H;
-  DType* back_ht = back_ht_1;
-
-  DType* gemmC1  = ws;              // [D, T, N, H]
-  DType* gemmC2  = gemmC1 + D * T * N * H;  // N * H
-  DType* nt = gateN;
+                                          DType* tmp_buf,
+                                          bool state_outputs,
+                                          const int D,
+                                          const index_t T,
+                                          const index_t N,
+                                          const index_t I,
+                                          const int H,
+                                          const Tensor<cpu, 2, DType>& x,
+                                          const Tensor<cpu, 2, DType>& hx,
+                                          DType* wx_ptr,
+                                          DType* wh_ptr,
+                                          DType* bx_ptr,
+                                          DType* bh_ptr,
+                                          DType* gateN,
+                                          DType* y_ptr,
+                                          DType* hy_ptr,
+                                          int mode) {
+  DType* ht        = y_ptr;
+  DType* ht_1      = y_ptr;
+  DType* back_ht_1 = y_ptr + (T - 1) * N * H * D + H;
+  DType* back_ht   = back_ht_1;
+
+  DType* gemmC1      = ws;                      // [D, T, N, H]
+  DType* gemmC2      = gemmC1 + D * T * N * H;  // N * H
+  DType* nt          = gateN;
   DType* back_wx_ptr = wx_ptr + I * H + H * H;
   DType* back_wh_ptr = wh_ptr + I * H + H * H;
-  DType* back_bx_ptr = (bx_ptr != nullptr)? bx_ptr + H * 2 : nullptr;
-  DType* back_bh_ptr = (bh_ptr != nullptr)? bh_ptr + H * 2 : nullptr;
-  DType* back_gateN = gateN + T * N * H;
+  DType* back_bx_ptr = (bx_ptr != nullptr) ? bx_ptr + H * 2 : nullptr;
+  DType* back_bh_ptr = (bh_ptr != nullptr) ? bh_ptr + H * 2 : nullptr;
+  DType* back_gateN  = gateN + T * N * H;
   DType* back_gemmC1 = gemmC1 + T * N * H;
-  DType* gemmC1_t = gemmC1;
+  DType* gemmC1_t    = gemmC1;
 
   const Tensor<cpu, 2, DType> wx(wx_ptr, Shape2(H, I));
   const Tensor<cpu, 2, DType> wh(wh_ptr, Shape2(H, H));
@@ -1772,18 +1916,18 @@ void VanillaRNNForwardTrainingSingleLayer(DType* ws,
   const Tensor<cpu, 2, DType> back_bh(back_bh_ptr, Shape2(1, H));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (D == 1) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
         y_ptr[i * H + j] = hx[i][j];
       }
   } else {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; i++)
       for (int j = 0; j < H; j++) {
-        y_ptr[i * D * H + j] = hx[i][j];
+        y_ptr[i * D * H + j]     = hx[i][j];
         back_ht_1[i * D * H + j] = hx[N + i][j];
-    }
+      }
   }
 
   Tensor<cpu, 2, DType> dgemmC1(ws, Shape2(T * N, H));
@@ -1792,7 +1936,7 @@ void VanillaRNNForwardTrainingSingleLayer(DType* ws,
 
   // x * wx.T : [T * N, I] * [I, H]
   DType alpha = 1.0;
-  DType beta = 0.0;
+  DType beta  = 0.0;
   linalg_gemm(x, wx, dgemmC1, alpha, beta, false, true);
   if (D == 2) {
     linalg_gemm(x, back_wx, dback_gemmC1, alpha, beta, false, true);
@@ -1805,44 +1949,44 @@ void VanillaRNNForwardTrainingSingleLayer(DType* ws,
     if (D == 1) {
       linalg_gemm(dht_1, wh, dgemmC2, alpha, beta, false, true);
     } else {
-      Tensor<cpu, 3, DType> dht_1_tmp = Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf),
-                                     Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dht_1_tmp = reshape(dht_1.T(), Shape3(D, H, N));
       linalg_gemm(dht_1_tmp[0], wh, dgemmC2, alpha, beta, true, true);
     }
-    nt = gateN + t * N * H;
+    nt       = gateN + t * N * H;
     gemmC1_t = gemmC1 + t * N * H;
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         index_t tb = i * H;
         if (mode == 1) {
-          nt[tb + j] = ht[i * D * H + j] = tanh(gemmC1_t[tb + j] + bx[0][j] +
-              gemmC2[tb + j] + bh[0][j]);
+          nt[tb + j] = ht[i * D * H + j] =
+              tanh(gemmC1_t[tb + j] + bx[0][j] + gemmC2[tb + j] + bh[0][j]);
         } else {
-          nt[tb + j] = gemmC1_t[tb + j] + bx[0][j] + gemmC2[tb + j] + bh[0][j];
+          nt[tb + j]        = gemmC1_t[tb + j] + bx[0][j] + gemmC2[tb + j] + bh[0][j];
           ht[i * D * H + j] = relu(nt[tb + j]);
         }
       }
     }
     ht_1 = ht;
-    ht = ht + D * H * N;
+    ht   = ht + D * H * N;
     //  perform the second direction
     if (D == 2) {
-      nt = back_gateN + (T - 1 - t) * N * H;
+      nt       = back_gateN + (T - 1 - t) * N * H;
       gemmC1_t = back_gemmC1 + (T - 1 - t) * N * H;
       Tensor<cpu, 2, DType> dback_ht_1(back_ht_1 - H, Shape2(N, D * H));
-      Tensor<cpu, 3, DType> dback_ht_1_tmp = Tensor<cpu, 3, DType>
-          (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+      Tensor<cpu, 3, DType> dback_ht_1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       dback_ht_1_tmp = reshape(dback_ht_1.T(), Shape3(D, H, N));
       linalg_gemm(dback_ht_1_tmp[1], back_wh, dgemmC2, alpha, beta, true, true);
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           index_t tb = i * H;
           if (mode == 1) {
-            nt[tb + j] = back_ht[i * D * H + j] = tanh(gemmC1_t[tb + j] + back_bx[0][j]
-                + gemmC2[tb + j] + back_bh[0][j]);
+            nt[tb + j] = back_ht[i * D * H + j] =
+                tanh(gemmC1_t[tb + j] + back_bx[0][j] + gemmC2[tb + j] + back_bh[0][j]);
           } else {
             nt[tb + j] = gemmC1_t[tb + j] + back_bx[0][j] + gemmC2[tb + j] + back_bh[0][j];
             back_ht[i * D * H + j] = relu(nt[tb + j]);
@@ -1850,7 +1994,7 @@ void VanillaRNNForwardTrainingSingleLayer(DType* ws,
         }
       }
       back_ht_1 = back_ht;
-      back_ht = back_ht - D * H * N;
+      back_ht   = back_ht - D * H * N;
     }
   }
 
@@ -1858,18 +2002,18 @@ void VanillaRNNForwardTrainingSingleLayer(DType* ws,
   if (state_outputs) {
     if (D == 1) {
       DType* y_start = y_ptr + (T - 1) * N * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
           hy_ptr[i * H + j] = y_start[i * H + j];
         }
     } else {
-      DType* y_start = y_ptr + (T - 1) * N * H * D;
+      DType* y_start      = y_ptr + (T - 1) * N * H * D;
       DType* y_back_start = y_ptr + H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; i++)
         for (int j = 0; j < H; j++) {
-          hy_ptr[i * H + j] = y_start[i * D * H + j];
+          hy_ptr[i * H + j]         = y_start[i * D * H + j];
           hy_ptr[N * H + i * H + j] = y_back_start[i * D * H + j];
         }
     }
@@ -1893,51 +2037,65 @@ void VanillaRNNForwardTraining(DType* ws,
                                DType* hy_ptr,
                                const float dropout,
                                int mode,
-                               std::mt19937 &rnd_engine) {  // NOLINT(runtime/references)
+                               std::mt19937& rnd_engine) {  // NOLINT(runtime/references)
   DType* wx = w_ptr;
   DType* wh = wx + I * H;
-  DType* bx = wh + H * H + (D - 1) * (H * H + I * H)
-      + (L - 1) * ((D + 1) * H) * H * D;
+  DType* bx = wh + H * H + (D - 1) * (H * H + I * H) + (L - 1) * ((D + 1) * H) * H * D;
   DType* bh = bx + H;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(D * L, N, H));
-  DType* hy_l = hy_ptr;
-  DType* gateN_l = rs;
-  DType* y_l = gateN_l + L * T * D * N * H;
+  DType* hy_l           = hy_ptr;
+  DType* gateN_l        = rs;
+  DType* y_l            = gateN_l + L * T * D * N * H;
   DType* dropout_random = y_l + L * D * T * N * H;
-  DType* tmp_buf = dropout_random + (L - 1) * D * T * N * H;
-  DType* ws2 = tmp_buf + D * N * H;
-  DType* wx_l = wx;
-  DType* wh_l = wh;
-  DType* bx_l = bx;
-  DType* bh_l = bh;
-  DType* y_tmp = x_ptr;
+  DType* tmp_buf        = dropout_random + (L - 1) * D * T * N * H;
+  DType* ws2            = tmp_buf + D * N * H;
+  DType* wx_l           = wx;
+  DType* wh_l           = wh;
+  DType* bx_l           = bx;
+  DType* bh_l           = bh;
+  DType* y_tmp          = x_ptr;
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   for (int l = 0; l < L; l++) {
     if (l != 0) {
       y_tmp = y_l;
-      y_l = y_l + T * N * H * D;
+      y_l   = y_l + T * N * H * D;
     }
     if (dropout > 0.0f && l > 0) {
       std::uniform_real_distribution<float> distribution(0, 1);
       for (index_t i = 0; i < T * N * I; i++) {
         if (distribution(rnd_engine) < dropout) {
           dropout_random[(l - 1) * T * N * I + i] = 0;
-          y_tmp[i] = 0;
+          y_tmp[i]                                = 0;
         } else {
           dropout_random[(l - 1) * T * N * I + i] = 1.0f - dropout;
-          y_tmp[i] =  y_tmp[i] / (1.0f - dropout);
+          y_tmp[i]                                = y_tmp[i] / (1.0f - dropout);
         }
       }
     }
     Tensor<cpu, 2, DType> x_l(y_tmp, Shape2(T * N, I));
     Tensor<cpu, 2, DType> hx_l = hx[D * l];
-    VanillaRNNForwardTrainingSingleLayer<DType>(ws2, tmp_buf, state_outputs, D, T, N, I, H,
-                                             x_l, hx_l, wx_l, wh_l, bx_l, bh_l,
-                                             gateN_l, y_l, hy_l, mode);
-    gateN_l = gateN_l +  T * D * N * H;
-    hy_l = hy_l + D * N * H;
-    bx_l = bx_l + H * D * 2;
-    bh_l = bh_l + H * D * 2;
+    VanillaRNNForwardTrainingSingleLayer<DType>(ws2,
+                                                tmp_buf,
+                                                state_outputs,
+                                                D,
+                                                T,
+                                                N,
+                                                I,
+                                                H,
+                                                x_l,
+                                                hx_l,
+                                                wx_l,
+                                                wh_l,
+                                                bx_l,
+                                                bh_l,
+                                                gateN_l,
+                                                y_l,
+                                                hy_l,
+                                                mode);
+    gateN_l = gateN_l + T * D * N * H;
+    hy_l    = hy_l + D * N * H;
+    bx_l    = bx_l + H * D * 2;
+    bh_l    = bh_l + H * D * 2;
 
     wx_l = wx_l + I * H * D + H * H * D;
     if (l == 0) {
@@ -1945,7 +2103,7 @@ void VanillaRNNForwardTraining(DType* ws,
     }
     wh_l = wx_l + I * H;
   }
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < T * N * H * D; ++i) {
     y_ptr[i] = y_l[i];
   }
@@ -1959,8 +2117,8 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
                                    const index_t N,
                                    const index_t I,
                                    const int H,
-                                   const Tensor<cpu, 2, DType> &x,
-                                   const Tensor<cpu, 2, DType> &hx,
+                                   const Tensor<cpu, 2, DType>& x,
+                                   const Tensor<cpu, 2, DType>& hx,
                                    DType* wx_ptr,
                                    DType* wh_ptr,
                                    DType* y_ptr,
@@ -1981,40 +2139,40 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
   DType* ht1;  // [N, D, H]
   DType* dart;
   DType* nt;
-  DType* dar = ws;  // [T, N, H]
-  DType* dht1 = dar + T * N * H;  // [D, N, H]
-  DType* hx_ = dht1 + D * N * H;  // [N, D, H]
+  DType* dar  = ws;                // [T, N, H]
+  DType* dht1 = dar + T * N * H;   // [D, N, H]
+  DType* hx_  = dht1 + D * N * H;  // [N, D, H]
 
   DType* back_ht1;
-  DType* back_dht1 = dht1 + N * H;  // [N, H]
-  DType* back_gateN = gateN + T * N * H;
+  DType* back_dht1   = dht1 + N * H;  // [N, H]
+  DType* back_gateN  = gateN + T * N * H;
   DType* back_wx_ptr = wx_ptr + I * H + H * H;
   DType* back_wh_ptr = wh_ptr + I * H + H * H;
-  DType* back_dwx = dwx + I * H + H * H;
-  DType* back_dwh = dwh + I * H + H * H;
-  DType* back_dbx = dbx + H * 2;
-  DType* back_dbh = dbh + H * 2;
+  DType* back_dwx    = dwx + I * H + H * H;
+  DType* back_dwh    = dwh + I * H + H * H;
+  DType* back_dbx    = dbx + H * 2;
+  DType* back_dbh    = dbh + H * 2;
 
   DType alpha = 1.0;
-  DType beta = 0.0;
+  DType beta  = 0.0;
   const Tensor<cpu, 2, DType> wx(wx_ptr, Shape2(H, I));
   const Tensor<cpu, 2, DType> wh(wh_ptr, Shape2(H, H));
   const Tensor<cpu, 2, DType> back_wx(back_wx_ptr, Shape2(H, I));
   const Tensor<cpu, 2, DType> back_wh(back_wh_ptr, Shape2(H, H));
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (req_params != kNullOp && req_params != kAddTo) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < D * H * H; ++i) {
       dwh[i] = 0;
     }
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (int i = 0; i < D * H; ++i) {
       dbx[i] = 0;
       dbh[i] = 0;
     }
   }
 
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < N * H; ++i) {
     if (dhy_ptr) {
       dht1[i] = dhy_ptr[i];
@@ -2023,7 +2181,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     }
   }
 
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < N; ++i) {
     for (int j = 0; j < H; ++j) {
       hx_[i * D * H + j] = hx[i][j];
@@ -2031,7 +2189,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
   }
 
   if (D == 2) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N * H; ++i) {
       if (dhy_ptr) {
         back_dht1[i] = dhy_ptr[N * H + i];
@@ -2039,7 +2197,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
         back_dht1[i] = 0;
       }
     }
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         hx_[i * D * H + H + j] = hx[N + i][j];
@@ -2055,16 +2213,16 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     // add dy[T, N, D, H] to dhy[D, N, H]
     dyt = dy_ptr + t * N * D * H;
 
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         dht1[i * H + j] += dyt[i * D * H + j];
       }
     }
 
-    nt = gateN + t * N * H;
+    nt   = gateN + t * N * H;
     dart = dar + t * N * H;
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N; ++i) {
       for (int j = 0; j < H; ++j) {
         index_t id = i * H + j;
@@ -2078,7 +2236,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     }
     if (req_params != kNullOp) {
       alpha = 1.0;
-      beta = 1.0;
+      beta  = 1.0;
       // dht1 = dart * wh    [N, H] = [N, H] * [H, H]
       Tensor<cpu, 2, DType> d_dht1(dht1, Shape2(N, H));
       Tensor<cpu, 2, DType> d_dart(dart, Shape2(N, H));
@@ -2094,8 +2252,8 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
       // dwh = dart.T * ht1    [H, H] = [H, N] * [N, H]
       Tensor<cpu, 2, DType> d_ht1(ht1, Shape2(N, D * H));
       Tensor<cpu, 2, DType> d_dwh(dwh, Shape2(H, H));
-      Tensor<cpu, 3, DType> d_ht1_tmp = Tensor<cpu, 3, DType>
-          (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+      Tensor<cpu, 3, DType> d_ht1_tmp =
+          Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
       d_ht1_tmp = reshape(d_ht1.T(), Shape3(D, H, N));
       linalg_gemm(d_dart, d_ht1_tmp[0], d_dwh, alpha, beta, true, true);
     }
@@ -2104,7 +2262,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
   if (req_params != kNullOp) {
     // dbx = e * da       [1, H] = [1, N] * [N, H]
     if (req_params != kAddTo) {
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (int i = 0; i < H; ++i) {
         for (index_t j = 0; j < N * T; ++j) {
           dbx[i] += dar[j * H + i];
@@ -2114,21 +2272,21 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     } else {
       const Tensor<cpu, 2, DType> tmp_dbx(tmp_buf + T * N * D * H, Shape2(H, T));
       const Tensor<cpu, 2, DType> tmp_dbh(tmp_buf + T * N * D * H + H * T, Shape2(H, T));
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < H * T; ++i) {
         tmp_dbx.dptr_[i] = 0;
         tmp_dbh.dptr_[i] = 0;
       }
 
       for (index_t t = T - 1; t >= 0; --t) {
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (int i = 0; i < H; ++i) {
           for (index_t j = 0; j < N; ++j) {
             tmp_dbx[i][t] += dar[t * N * H + j * H + i];
             tmp_dbh[i][t] = tmp_dbx[i][t];
           }
         }
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (int i = 0; i < H; ++i) {
           dbx[i] += tmp_dbx[i][t] + dbx[i];
           dbh[i] = dbx[i];
@@ -2137,7 +2295,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     }
   }
   alpha = 1.0;
-  beta = 0.0;
+  beta  = 0.0;
 
   // dx = da * wx    [T * N, I] = [T * N, H] * [H, I]
   Tensor<cpu, 2, DType> d_dar(dar, Shape2(T * N, H));
@@ -2154,7 +2312,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
 
   if (D == 2) {
     for (index_t t = 0; t < T; ++t) {
-      if (t == T-1) {
+      if (t == T - 1) {
         back_ht1 = hx_;
       } else {
         back_ht1 = y_ptr + (t + 1) * N * D * H;
@@ -2162,17 +2320,17 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
 
       //  add dy[T, N, D, H] to dhy[D, N, H]
       dyt = dy_ptr + t * N * D * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           back_dht1[i * H + j] += dyt[i * D * H + H + j];
         }
       }
 
-      nt = back_gateN + t * N * H;
+      nt   = back_gateN + t * N * H;
       dart = dar + t * N * H;
 
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < N; ++i) {
         for (int j = 0; j < H; ++j) {
           index_t id = i * H + j;
@@ -2187,7 +2345,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
 
       if (req_params != kNullOp) {
         alpha = 1.0;
-        beta = 1.0;
+        beta  = 1.0;
         // dht1 = da * wh    [N, H] = [N, H] * [H, H]
         Tensor<cpu, 2, DType> d_dart(dart, Shape2(N, H));
         Tensor<cpu, 2, DType> d_back_dht1(back_dht1, Shape2(N, H));
@@ -2196,8 +2354,8 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
         // dwh = da.T * ht1     [H, H] = [H, N] * [N, H]
         Tensor<cpu, 2, DType> d_back_dwh(back_dwh, Shape2(H, H));
         Tensor<cpu, 2, DType> d_back_ht1(back_ht1 + H, Shape2(N, D * H));
-        Tensor<cpu, 3, DType> d_back_ht1_tmp = Tensor<cpu, 3, DType>
-            (reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
+        Tensor<cpu, 3, DType> d_back_ht1_tmp =
+            Tensor<cpu, 3, DType>(reinterpret_cast<DType*>(tmp_buf), Shape3(D, H, N));
         d_back_ht1_tmp = reshape(d_back_ht1.T(), Shape3(D, H, N));
         if (req_params == kAddTo) {
           beta = 2.0;
@@ -2211,9 +2369,9 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     }
 
     if (req_params != kNullOp) {
-    // dbx = e * da       [1, H] = [1, N] * [N, H]
+      // dbx = e * da       [1, H] = [1, N] * [N, H]
       if (req_params != kAddTo) {
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (int i = 0; i < H; ++i) {
           for (index_t j = 0; j < N * T; ++j) {
             back_dbx[i] += dar[j * H + i];
@@ -2223,21 +2381,21 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
       } else {
         const Tensor<cpu, 2, DType> tmp_dbx(tmp_buf + T * N * D * H, Shape2(H, T));
         const Tensor<cpu, 2, DType> tmp_dbh(tmp_buf + T * N * D * H + H * T, Shape2(H, T));
-        #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
         for (index_t i = 0; i < H * T; ++i) {
           tmp_dbx.dptr_[i] = 0;
           tmp_dbh.dptr_[i] = 0;
         }
 
         for (index_t t = T - 1; t >= 0; --t) {
-          #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
           for (int i = 0; i < H; ++i) {
             for (index_t j = 0; j < N; ++j) {
               tmp_dbx[i][t] += dar[t * N * H + j * H + i];
               tmp_dbh[i][t] = tmp_dbx[i][t];
             }
           }
-          #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
           for (int i = 0; i < H; ++i) {
             back_dbx[i] += tmp_dbx[i][t] + back_dbx[i];
             back_dbh[i] = back_dbx[i];
@@ -2246,15 +2404,15 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
       }
     }
     alpha = 1.0;
-    beta = 1.0;
+    beta  = 1.0;
     // dxt = da * wx    [T * N, I] = [T * N, H] * [H, I]
-     Tensor<cpu, 2, DType> d_dar2(dar, Shape2(T * N, H));
+    Tensor<cpu, 2, DType> d_dar2(dar, Shape2(T * N, H));
     if (req_data != kNullOp) {
       Tensor<cpu, 2, DType> d_dx(dx, Shape2(T * N, I));
       linalg_gemm(d_dar2, back_wx, d_dx, alpha, beta, false, false);
     }
     alpha = 1.0;
-    beta = 0.0;
+    beta  = 0.0;
     // dwx = da.T * x    [H, I] = [H, T * N] * [T * N, I]
     if (req_params != kNullOp && req_params != kAddTo) {
       Tensor<cpu, 2, DType> d_back_dwx(back_dwx, Shape2(H, I));
@@ -2262,7 +2420,7 @@ void VanillaRNNBackwardSingleLayer(DType* ws,
     }
   }
   if (req_state != kNullOp) {
-    #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
     for (index_t i = 0; i < N * H * D; ++i) {
       dhx[i] = dht1[i];
     }
@@ -2291,19 +2449,17 @@ void VanillaRNNBackward(DType* ws,
                         int req_state,
                         const float dropout,
                         int mode) {
-  DType* wx = w_ptr;
-  DType* dwx = dw_ptr;
-  DType* dwh = dwx + I * H;
-  DType* dbx = dwh + H * H + (D - 1) * (H * H + I * H)
-      + (L - 1) * ((D + 1) * H) * H * D;
-  DType* gateN_l = rs + (L - 1) * T * D * N * H;
-  DType* y_l = gateN_l + L * T * D * N * H;
+  DType* wx             = w_ptr;
+  DType* dwx            = dw_ptr;
+  DType* dwh            = dwx + I * H;
+  DType* dbx            = dwh + H * H + (D - 1) * (H * H + I * H) + (L - 1) * ((D + 1) * H) * H * D;
+  DType* gateN_l        = rs + (L - 1) * T * D * N * H;
+  DType* y_l            = gateN_l + L * T * D * N * H;
   DType* dropout_random = y_l + L * D * T * N * H;
-  DType* tmp_buf = dropout_random + (L - 1) * D * T * N * H;
-  DType* dx_l = tmp_buf + T * N * D * H + H * T * 2;
-  DType* ws2 = dx_l + T * N * D * H;
-  DType* wx_l = (L == 1)? wx : wx + (L - 2) * D * (D + 1) * H * H
-      + D * I * H + D * H * H;
+  DType* tmp_buf        = dropout_random + (L - 1) * D * T * N * H;
+  DType* dx_l           = tmp_buf + T * N * D * H + H * T * 2;
+  DType* ws2            = dx_l + T * N * D * H;
+  DType* wx_l = (L == 1) ? wx : wx + (L - 2) * D * (D + 1) * H * H + D * I * H + D * H * H;
   DType* wh_l = wx_l;
   if (L == 1) {
     wh_l = wh_l + I * H;
@@ -2313,8 +2469,7 @@ void VanillaRNNBackward(DType* ws,
   DType* dhy_l = nullptr;
   if (dhy_ptr)
     dhy_l = dhy_ptr + (L - 1) * D * N * H;
-  DType* dwx_l = (L == 1)? dwx : dwx + (L - 2) * D * (D + 1) * H * H
-      + D * I * H + D * H * H;
+  DType* dwx_l = (L == 1) ? dwx : dwx + (L - 2) * D * (D + 1) * H * H + D * I * H + D * H * H;
   DType* dwh_l = nullptr;
   if (L == 1) {
     dwh_l = dwx_l + I * H;
@@ -2324,27 +2479,49 @@ void VanillaRNNBackward(DType* ws,
   DType* dbx_l = dbx + (L - 1) * D * H * 2;
   DType* dbh_l = dbx_l + H;
   DType* dhx_l = dhx_ptr + (L - 1) * D * N * H;
-  DType* dy_l = dy_ptr;
+  DType* dy_l  = dy_ptr;
   Tensor<cpu, 3, DType> hx(hx_ptr, Shape3(L, D * N, H));
-  index_t inputsize = I;
-  DType* y_tmp = y_l - T * N * H * D;
+  index_t inputsize     = I;
+  DType* y_tmp          = y_l - T * N * H * D;
   const int omp_threads = mxnet::engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   for (int l = L - 1; l >= 0; --l) {
     if (l == 0) {
-      I = inputsize;
+      I     = inputsize;
       y_tmp = x_ptr;
-      dx_l = dx_ptr;
+      dx_l  = dx_ptr;
     } else {
       I = D * H;
     }
     Tensor<cpu, 2, DType> hx_l = hx[l];
     Tensor<cpu, 2, DType> x_l(y_tmp, Shape2(T * N, I));
-    VanillaRNNBackwardSingleLayer<DType>(ws2, tmp_buf, D, T, N, I, H, x_l, hx_l, wx_l, wh_l,
-                                         y_l, dy_l, dhy_l, gateN_l, dx_l, dhx_l, dwx_l, dwh_l,
-                                         dbx_l, dbh_l, req_data, req_params, req_state, mode);
+    VanillaRNNBackwardSingleLayer<DType>(ws2,
+                                         tmp_buf,
+                                         D,
+                                         T,
+                                         N,
+                                         I,
+                                         H,
+                                         x_l,
+                                         hx_l,
+                                         wx_l,
+                                         wh_l,
+                                         y_l,
+                                         dy_l,
+                                         dhy_l,
+                                         gateN_l,
+                                         dx_l,
+                                         dhx_l,
+                                         dwx_l,
+                                         dwh_l,
+                                         dbx_l,
+                                         dbh_l,
+                                         req_data,
+                                         req_params,
+                                         req_state,
+                                         mode);
     if (dropout > 0.0f && l > 0 && req_data != kNullOp) {
       dropout_random = dropout_random - T * N * D * H;
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < T * N * I; i++) {
         if (dropout_random[i] == 0) {
           dx_l[i] = 0;
@@ -2354,24 +2531,24 @@ void VanillaRNNBackward(DType* ws,
       }
     }
     if (l > 0) {
-      #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
       for (index_t i = 0; i < T * N * H * D; ++i) {
         dy_l[i] = dx_l[i];
       }
-      gateN_l = gateN_l -  T * D * N * H;
-      dhx_l = dhx_l - D * N * H;
+      gateN_l = gateN_l - T * D * N * H;
+      dhx_l   = dhx_l - D * N * H;
       if (dhy_l)
         dhy_l = dhy_l - D * N * H;
-      y_l = y_l - T * N * H * D;
+      y_l   = y_l - T * N * H * D;
       y_tmp = y_l;
       if (l == 1) {
-        wx_l = wx_l - (inputsize + H) * H * D;
-        wh_l = wx_l + inputsize * H;
+        wx_l  = wx_l - (inputsize + H) * H * D;
+        wh_l  = wx_l + inputsize * H;
         dwx_l = dwx_l - (inputsize + H) * H * D;
         dwh_l = dwx_l + inputsize * H;
       } else {
-        wx_l = wx_l - (I + H) * H * D;
-        wh_l = wx_l + I * H;
+        wx_l  = wx_l - (I + H) * H * D;
+        wh_l  = wx_l + I * H;
         dwx_l = dwx_l - (I + H) * H * D;
         dwh_l = dwx_l + I * H;
       }
diff --git a/src/operator/roi_pooling-inl.h b/src/operator/roi_pooling-inl.h
index 89a59ab72a9f..22dfdad0374a 100644
--- a/src/operator/roi_pooling-inl.h
+++ b/src/operator/roi_pooling-inl.h
@@ -22,7 +22,7 @@
  * \file roi_pooling-inl.h
  * \brief roi pooling operator and symbol
  * \author Kye-Hyeon Kim, Jian Guo
-*/
+ */
 #ifndef MXNET_OPERATOR_ROI_POOLING_INL_H_
 #define MXNET_OPERATOR_ROI_POOLING_INL_H_
 
@@ -36,87 +36,89 @@
 #include "./mshadow_op.h"
 #include "./operator_common.h"
 
-
 namespace mxnet {
 namespace op {
 
 // Declare enumeration of input order to make code more intuitive.
 // These enums are only visible within this header
 namespace roipool {
-enum ROIPoolingOpInputs {kData, kBox};
-enum ROIPoolingOpOutputs {kOut, kMaxIdx};
-}  // roipool
+enum ROIPoolingOpInputs { kData, kBox };
+enum ROIPoolingOpOutputs { kOut, kMaxIdx };
+}  // namespace roipool
 
 struct ROIPoolingParam : public dmlc::Parameter<ROIPoolingParam> {
   mxnet::TShape pooled_size;
   float spatial_scale;
   DMLC_DECLARE_PARAMETER(ROIPoolingParam) {
     DMLC_DECLARE_FIELD(pooled_size)
-    .set_expect_ndim(2).enforce_nonzero()
-    .describe("ROI pooling output shape (h,w) ");
-    DMLC_DECLARE_FIELD(spatial_scale).set_range(0.0, 1.0)
-    .describe("Ratio of input feature map height (or w) to raw image height (or w). "
-    "Equals the reciprocal of total stride in convolutional layers");
+        .set_expect_ndim(2)
+        .enforce_nonzero()
+        .describe("ROI pooling output shape (h,w) ");
+    DMLC_DECLARE_FIELD(spatial_scale)
+        .set_range(0.0, 1.0)
+        .describe(
+            "Ratio of input feature map height (or w) to raw image height (or w). "
+            "Equals the reciprocal of total stride in convolutional layers");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class ROIPoolingOp : public Operator {
  public:
   explicit ROIPoolingOp(ROIPoolingParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     size_t expected = 2;
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(out_data.size(), expected);
     CHECK_EQ(out_data[roipool::kOut].shape_[0], in_data[roipool::kBox].shape_[0]);
     CHECK_EQ(out_data[roipool::kMaxIdx].shape_[0], in_data[roipool::kBox].shape_[0]);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    Tensor<xpu, 4, DType> data = in_data[roipool::kData].get<xpu, 4, DType>(s);
-    Tensor<xpu, 2, DType> bbox = in_data[roipool::kBox].get<xpu, 2, DType>(s);
-    Tensor<xpu, 4, DType> out = out_data[roipool::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> data      = in_data[roipool::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 2, DType> bbox      = in_data[roipool::kBox].get<xpu, 2, DType>(s);
+    Tensor<xpu, 4, DType> out       = out_data[roipool::kOut].get<xpu, 4, DType>(s);
     Tensor<xpu, 4, index_t> max_idx = out_data[roipool::kMaxIdx].get<xpu, 4, index_t>(s);
     CHECK_EQ(data.CheckContiguous(), true);
     CHECK_EQ(bbox.CheckContiguous(), true);
     CHECK_EQ(out.CheckContiguous(), true);
     CHECK_EQ(max_idx.CheckContiguous(), true);
-    out = -FLT_MAX;
+    out     = -FLT_MAX;
     max_idx = -1.0f;
     ROIPoolForward(out, data, bbox, max_idx, param_.spatial_scale);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     size_t expected = 2;
     CHECK_EQ(in_data.size(), expected);
     CHECK_EQ(out_data.size(), expected);
     CHECK_EQ(out_grad[roipool::kOut].shape_[0], in_data[roipool::kBox].shape_[0]);
     CHECK_EQ(out_data[roipool::kMaxIdx].shape_[0], in_data[roipool::kBox].shape_[0]);
-    CHECK_NE(req[roipool::kData], kWriteInplace) <<
-      "ROIPooling: Backward doesn't support kWriteInplace.";
-    CHECK_NE(req[roipool::kBox], kWriteInplace) <<
-      "ROIPooling: Backward doesn't support kWriteInplace.";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-
-    Tensor<xpu, 4, DType> grad_out = out_grad[roipool::kOut].get<xpu, 4, DType>(s);
-    Tensor<xpu, 2, DType> bbox = in_data[roipool::kBox].get<xpu, 2, DType>(s);
+    CHECK_NE(req[roipool::kData], kWriteInplace)
+        << "ROIPooling: Backward doesn't support kWriteInplace.";
+    CHECK_NE(req[roipool::kBox], kWriteInplace)
+        << "ROIPooling: Backward doesn't support kWriteInplace.";
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+
+    Tensor<xpu, 4, DType> grad_out  = out_grad[roipool::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 2, DType> bbox      = in_data[roipool::kBox].get<xpu, 2, DType>(s);
     Tensor<xpu, 4, index_t> max_idx = out_data[roipool::kMaxIdx].get<xpu, 4, index_t>(s);
-    Tensor<xpu, 4, DType> grad_in = in_grad[roipool::kData].get<xpu, 4, DType>(s);
-    Tensor<xpu, 2, DType> grad_roi = in_grad[roipool::kBox].get<xpu, 2, DType>(s);
+    Tensor<xpu, 4, DType> grad_in   = in_grad[roipool::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 2, DType> grad_roi  = in_grad[roipool::kBox].get<xpu, 2, DType>(s);
     CHECK_EQ(grad_out.CheckContiguous(), true);
     CHECK_EQ(bbox.CheckContiguous(), true);
     CHECK_EQ(max_idx.CheckContiguous(), true);
@@ -137,7 +139,7 @@ class ROIPoolingOp : public Operator {
 };  // class ROIPoolingOp
 
 // Decalre Factory function, used for dispatch specialization
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(ROIPoolingParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -167,9 +169,9 @@ class ROIPoolingProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, rois]";
 
@@ -178,8 +180,8 @@ class ROIPoolingProp : public OperatorProperty {
     CHECK_EQ(dshape.ndim(), 4U) << "data should be a 4D tensor";
 
     for (int i = 0; i < dshape.ndim(); i++) {
-        CHECK_LT(dshape[i], INT32_MAX) << "ROI Pooling does not support large"
-            << "dimensions (>= 2^31).";
+      CHECK_LT(dshape[i], INT32_MAX) << "ROI Pooling does not support large"
+                                     << "dimensions (>= 2^31).";
     }
 
     // bbox: [num_rois, 5]
@@ -191,15 +193,15 @@ class ROIPoolingProp : public OperatorProperty {
     // max_idx: [num_rois, c, pooled_h, pooled_w]
     out_shape->clear();
     out_shape->push_back(
-         Shape4(bshape[0], dshape[1], param_.pooled_size[0], param_.pooled_size[1]));
+        Shape4(bshape[0], dshape[1], param_.pooled_size[0], param_.pooled_size[1]));
     out_shape->push_back(
-         Shape4(bshape[0], dshape[1], param_.pooled_size[0], param_.pooled_size[1]));
+        Shape4(bshape[0], dshape[1], param_.pooled_size[0], param_.pooled_size[1]));
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     using namespace mshadow;
     CHECK_EQ(in_type->size(), 2U);
     int dtype = (*in_type)[0];
@@ -208,17 +210,17 @@ class ROIPoolingProp : public OperatorProperty {
 
     out_type->clear();
     out_type->push_back(dtype);
-# if MXNET_USE_INT64_TENSOR_SIZE == 1
+#if MXNET_USE_INT64_TENSOR_SIZE == 1
     out_type->push_back(kInt64);
-# else
+#else
     out_type->push_back(kInt32);
-# endif
+#endif
     return true;
   }
 
   OperatorProperty* Copy() const override {
     ROIPoolingProp* roi_pooling_sym = new ROIPoolingProp();
-    roi_pooling_sym->param_ = this->param_;
+    roi_pooling_sym->param_         = this->param_;
     return roi_pooling_sym;
   }
 
@@ -227,10 +229,9 @@ class ROIPoolingProp : public OperatorProperty {
   }
 
   // decalre dependency and inplace optimization options
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[roipool::kOut], in_data[roipool::kBox], out_data[roipool::kMaxIdx]};
   }
 
@@ -239,8 +240,9 @@ class ROIPoolingProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   ROIPoolingParam param_;
diff --git a/src/operator/roi_pooling.cc b/src/operator/roi_pooling.cc
index 56c872500822..0d5b24fffcf3 100644
--- a/src/operator/roi_pooling.cc
+++ b/src/operator/roi_pooling.cc
@@ -22,7 +22,7 @@
  * \file roi_pooling.cc
  * \brief roi pooling operator
  * \author Ross Girshick, Kye-Hyeon Kim, Jian Guo, Xinyu Chen
-*/
+ */
 #include "./roi_pooling-inl.h"
 #include <mshadow/base.h>
 #include <mshadow/tensor.h>
@@ -30,92 +30,86 @@
 #include <mshadow/dot_engine-inl.h>
 #include <cassert>
 
+using std::ceil;
+using std::floor;
 using std::max;
 using std::min;
-using std::floor;
-using std::ceil;
 
 namespace mshadow {
-template<typename Dtype>
-inline void ROIPoolForward(const Tensor<cpu, 4, Dtype> &out,
-                           const Tensor<cpu, 4, Dtype> &data,
-                           const Tensor<cpu, 2, Dtype> &bbox,
-                           const Tensor<cpu, 4, index_t> &max_idx,
+template <typename Dtype>
+inline void ROIPoolForward(const Tensor<cpu, 4, Dtype>& out,
+                           const Tensor<cpu, 4, Dtype>& data,
+                           const Tensor<cpu, 2, Dtype>& bbox,
+                           const Tensor<cpu, 4, index_t>& max_idx,
                            const float spatial_scale_) {
-  const Dtype *bottom_data = data.dptr_;
-  const Dtype *bottom_rois = bbox.dptr_;
-  Dtype *top_data = out.dptr_;
-  index_t *argmax_data = max_idx.dptr_;
-  const int batch_size = data.size(0);
-  const int channels_ = data.size(1);
-  const int height_ = data.size(2);
-  const int width_ = data.size(3);
+  const Dtype* bottom_data = data.dptr_;
+  const Dtype* bottom_rois = bbox.dptr_;
+  Dtype* top_data          = out.dptr_;
+  index_t* argmax_data     = max_idx.dptr_;
+  const int batch_size     = data.size(0);
+  const int channels_      = data.size(1);
+  const int height_        = data.size(2);
+  const int width_         = data.size(3);
   const int pooled_height_ = out.size(2);
-  const int pooled_width_ = out.size(3);
+  const int pooled_width_  = out.size(3);
 
-  const int num_rois = bbox.size(0);
-  const index_t data_size = data.size(1) * data.size(2) * data.size(3);
-  const index_t data_size_c = data.size(2) * data.size(3);
-  const index_t out_size_c = out.size(2) * out.size(3);
-  const index_t out_size = channels_ * out_size_c;
+  const int num_rois           = bbox.size(0);
+  const index_t data_size      = data.size(1) * data.size(2) * data.size(3);
+  const index_t data_size_c    = data.size(2) * data.size(3);
+  const index_t out_size_c     = out.size(2) * out.size(3);
+  const index_t out_size       = channels_ * out_size_c;
   const index_t max_idx_size_c = max_idx.size(2) * max_idx.size(3);
-  const index_t max_idx_size = channels_ * max_idx_size_c;
+  const index_t max_idx_size   = channels_ * max_idx_size_c;
   // For each ROI R = [batch_index x1 y1 x2 y2]: max pool over R
   for (int n = 0; n < num_rois; ++n) {
     // Increment ROI data pointer
-    const Dtype *bottom_rois_n = bottom_rois + n * bbox.size(1);
-    Dtype *top_data_n = top_data + n * out_size;
-    index_t *argmax_data_n = argmax_data + n * max_idx_size;
-    int roi_start_w = std::round(bottom_rois_n[1] * spatial_scale_);
-    int roi_start_h = std::round(bottom_rois_n[2] * spatial_scale_);
-    int roi_end_w = std::round(bottom_rois_n[3] * spatial_scale_);
-    int roi_end_h = std::round(bottom_rois_n[4] * spatial_scale_);
-
-    int roi_batch_ind = static_cast<int>(bottom_rois_n[0]);
+    const Dtype* bottom_rois_n = bottom_rois + n * bbox.size(1);
+    Dtype* top_data_n          = top_data + n * out_size;
+    index_t* argmax_data_n     = argmax_data + n * max_idx_size;
+    int roi_start_w            = std::round(bottom_rois_n[1] * spatial_scale_);
+    int roi_start_h            = std::round(bottom_rois_n[2] * spatial_scale_);
+    int roi_end_w              = std::round(bottom_rois_n[3] * spatial_scale_);
+    int roi_end_h              = std::round(bottom_rois_n[4] * spatial_scale_);
+
+    int roi_batch_ind   = static_cast<int>(bottom_rois_n[0]);
     bool is_ind_invalid = (roi_batch_ind < 0) || (roi_batch_ind >= batch_size);
 
     // force malformed ROIs to be 1 * 1
-    int roi_height = max(roi_end_h - roi_start_h + 1, 1);
-    int roi_width = max(roi_end_w - roi_start_w + 1, 1);
-    const Dtype bin_size_h = static_cast<Dtype>(roi_height)
-                             / static_cast<Dtype>(pooled_height_);
-    const Dtype bin_size_w = static_cast<Dtype>(roi_width)
-                             / static_cast<Dtype>(pooled_width_);
+    int roi_height         = max(roi_end_h - roi_start_h + 1, 1);
+    int roi_width          = max(roi_end_w - roi_start_w + 1, 1);
+    const Dtype bin_size_h = static_cast<Dtype>(roi_height) / static_cast<Dtype>(pooled_height_);
+    const Dtype bin_size_w = static_cast<Dtype>(roi_width) / static_cast<Dtype>(pooled_width_);
 
     index_t offset_batch_data = data_size * roi_batch_ind;
 
-    #pragma omp parallel for
+#pragma omp parallel for
     for (int c = 0; c < channels_; ++c) {
       // Increment all data pointers
       index_t offset_batch_data_c = offset_batch_data + c * data_size_c;
-      const Dtype* batch_data_c = bottom_data + offset_batch_data_c;
-      Dtype* top_data_c = top_data_n + c * out_size_c;
-      index_t* argmax_data_c = argmax_data_n + c * max_idx_size_c;
+      const Dtype* batch_data_c   = bottom_data + offset_batch_data_c;
+      Dtype* top_data_c           = top_data_n + c * out_size_c;
+      index_t* argmax_data_c      = argmax_data_n + c * max_idx_size_c;
 
       for (int ph = 0; ph < pooled_height_; ++ph) {
         for (int pw = 0; pw < pooled_width_; ++pw) {
           // Compute pooling region for this output unit:
           // start (included) = floor(ph * roi_height / pooled_height_)
           // end (excluded) = ceil((ph + 1) * roi_height / pooled_height_)
-          int hstart = static_cast<int>(floor(static_cast<Dtype>(ph)
-                                              * bin_size_h));
-          int wstart = static_cast<int>(floor(static_cast<Dtype>(pw)
-                                              * bin_size_w));
-          int hend = static_cast<int>(ceil(static_cast<Dtype>(ph + 1)
-                                           * bin_size_h));
-          int wend = static_cast<int>(ceil(static_cast<Dtype>(pw + 1)
-                                           * bin_size_w));
+          int hstart = static_cast<int>(floor(static_cast<Dtype>(ph) * bin_size_h));
+          int wstart = static_cast<int>(floor(static_cast<Dtype>(pw) * bin_size_w));
+          int hend   = static_cast<int>(ceil(static_cast<Dtype>(ph + 1) * bin_size_h));
+          int wend   = static_cast<int>(ceil(static_cast<Dtype>(pw + 1) * bin_size_w));
 
           hstart = min(max(hstart + roi_start_h, 0), height_);
-          hend = min(max(hend + roi_start_h, 0), height_);
+          hend   = min(max(hend + roi_start_h, 0), height_);
           wstart = min(max(wstart + roi_start_w, 0), width_);
-          wend = min(max(wend + roi_start_w, 0), width_);
+          wend   = min(max(wend + roi_start_w, 0), width_);
 
           bool is_empty = (hend <= hstart) || (wend <= wstart);
 
           const index_t pool_index = ph * pooled_width_ + pw;
           if (is_empty || is_ind_invalid) {
-            top_data_c[pool_index] = 0;
+            top_data_c[pool_index]    = 0;
             argmax_data_c[pool_index] = -1;
             continue;
           }
@@ -124,7 +118,7 @@ inline void ROIPoolForward(const Tensor<cpu, 4, Dtype> &out,
             for (int w = wstart; w < wend; ++w) {
               const index_t index = h * width_ + w;
               if (batch_data_c[index] > top_data_c[pool_index]) {
-                top_data_c[pool_index] = batch_data_c[index];
+                top_data_c[pool_index]    = batch_data_c[index];
                 argmax_data_c[pool_index] = offset_batch_data_c + index;
               }
             }
@@ -136,15 +130,15 @@ inline void ROIPoolForward(const Tensor<cpu, 4, Dtype> &out,
   return;
 }
 
-template<typename Dtype>
-inline void ROIPoolBackwardAcc(const Tensor<cpu, 4, Dtype> &in_grad,
-                               const Tensor<cpu, 4, Dtype> &out_grad,
-                               const Tensor<cpu, 2, Dtype> &bbox,
-                               const Tensor<cpu, 4, index_t> &max_idx,
+template <typename Dtype>
+inline void ROIPoolBackwardAcc(const Tensor<cpu, 4, Dtype>& in_grad,
+                               const Tensor<cpu, 4, Dtype>& out_grad,
+                               const Tensor<cpu, 2, Dtype>& bbox,
+                               const Tensor<cpu, 4, index_t>& max_idx,
                                const float spatial_scale_) {
-  const Dtype *top_diff = out_grad.dptr_;
-  Dtype *bottom_diff = in_grad.dptr_;
-  index_t *argmax_data = max_idx.dptr_;
+  const Dtype* top_diff = out_grad.dptr_;
+  Dtype* bottom_diff    = in_grad.dptr_;
+  index_t* argmax_data  = max_idx.dptr_;
 
   const index_t count = out_grad.shape_.Size();
 
@@ -162,24 +156,23 @@ inline void ROIPoolBackwardAcc(const Tensor<cpu, 4, Dtype> &in_grad,
 namespace mxnet {
 namespace op {
 
-template<>
-Operator *CreateOp<cpu>(ROIPoolingParam param, int dtype) {
+template <>
+Operator* CreateOp<cpu>(ROIPoolingParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new ROIPoolingOp<cpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new ROIPoolingOp<cpu, DType>(param); });
   return op;
 }
 
-Operator *ROIPoolingProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                           std::vector<int> *in_type) const {
+Operator* ROIPoolingProp::CreateOperatorEx(Context ctx,
+                                           mxnet::ShapeVector* in_shape,
+                                           std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, in_type->at(0));
 }
 
 DMLC_REGISTER_PARAMETER(ROIPoolingParam);
 
 MXNET_REGISTER_OP_PROPERTY(ROIPooling, ROIPoolingProp)
-.describe(R"code(Performs region of interest(ROI) pooling on the input array.
+    .describe(R"code(Performs region of interest(ROI) pooling on the input array.
 
 ROI pooling is a variant of a max pooling layer, in which the output size is fixed and
 region of interest is a parameter. Its purpose is to perform max pooling on the inputs
@@ -223,16 +216,21 @@ Example::
                                     [ 19.,  21.]]]]
 
 )code" ADD_FILELINE)
-.add_argument("data", "NDArray-or-Symbol", "The input array to the pooling operator, "
-                                            " a 4D Feature maps ")
-.add_argument("rois", "NDArray-or-Symbol", "Bounding box coordinates, a 2D array of "
-"[[batch_index, x1, y1, x2, y2]], where (x1, y1) and (x2, y2) are top left and bottom right "
-"corners of designated region of interest. `batch_index` indicates the index of corresponding "
-"image in the input array")
-.add_arguments(ROIPoolingParam::__FIELDS__());
-
-NNVM_REGISTER_OP(ROIPooling)
-.add_alias("_npx_roi_pooling");
+    .add_argument("data",
+                  "NDArray-or-Symbol",
+                  "The input array to the pooling operator, "
+                  " a 4D Feature maps ")
+    .add_argument("rois",
+                  "NDArray-or-Symbol",
+                  "Bounding box coordinates, a 2D array of "
+                  "[[batch_index, x1, y1, x2, y2]], where (x1, y1) and (x2, y2) are top left and "
+                  "bottom right "
+                  "corners of designated region of interest. `batch_index` indicates the index of "
+                  "corresponding "
+                  "image in the input array")
+    .add_arguments(ROIPoolingParam::__FIELDS__());
+
+NNVM_REGISTER_OP(ROIPooling).add_alias("_npx_roi_pooling");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/roi_pooling.cu b/src/operator/roi_pooling.cu
index b4013a672711..89f3380427ef 100644
--- a/src/operator/roi_pooling.cu
+++ b/src/operator/roi_pooling.cu
@@ -22,7 +22,7 @@
  * \file roi_pooling.cu
  * \brief roi pooling operator
  * \author Ross Girshick, Kye-Hyeon Kim, Jian Guo
-*/
+ */
 #include "./roi_pooling-inl.h"
 #include <mshadow/tensor.h>
 #include <mshadow/cuda/reduce.cuh>
@@ -32,12 +32,18 @@
 namespace mshadow {
 namespace cuda {
 
-template<typename Dtype>
-__global__ void ROIPoolForwardKernel(const int count, const Dtype* bottom_data,
-                                     const float spatial_scale, const int batch_size,
-                                     const int channels, const int height, const int width,
-                                     const int pooled_height, const int pooled_width,
-                                     const Dtype* bottom_rois, Dtype* top_data,
+template <typename Dtype>
+__global__ void ROIPoolForwardKernel(const int count,
+                                     const Dtype* bottom_data,
+                                     const float spatial_scale,
+                                     const int batch_size,
+                                     const int channels,
+                                     const int height,
+                                     const int width,
+                                     const int pooled_height,
+                                     const int pooled_width,
+                                     const Dtype* bottom_rois,
+                                     Dtype* top_data,
                                      index_t* argmax_data) {
   for (index_t index = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
        index < count;
@@ -45,51 +51,45 @@ __global__ void ROIPoolForwardKernel(const int count, const Dtype* bottom_data,
     // (n, c, ph, pw) is an element in the pooled output
     int pw = index % pooled_width;
     int ph = (index / pooled_width) % pooled_height;
-    int c = (index / pooled_width / pooled_height) % channels;
-    int n = index / pooled_width / pooled_height / channels;
+    int c  = (index / pooled_width / pooled_height) % channels;
+    int n  = index / pooled_width / pooled_height / channels;
 
     bottom_rois += n * 5;
     int roi_batch_ind = static_cast<int>(bottom_rois[0]);
 
     if (roi_batch_ind < 0 || roi_batch_ind >= batch_size) {
-      top_data[index] = 0;
+      top_data[index]    = 0;
       argmax_data[index] = -1;
       continue;
     }
 
     int roi_start_w = round(bottom_rois[1] * spatial_scale);
     int roi_start_h = round(bottom_rois[2] * spatial_scale);
-    int roi_end_w = round(bottom_rois[3] * spatial_scale);
-    int roi_end_h = round(bottom_rois[4] * spatial_scale);
+    int roi_end_w   = round(bottom_rois[3] * spatial_scale);
+    int roi_end_h   = round(bottom_rois[4] * spatial_scale);
 
     // Force malformed ROIs to be 1x1
-    int roi_width = max(roi_end_w - roi_start_w + 1, 1);
-    int roi_height = max(roi_end_h - roi_start_h + 1, 1);
-    Dtype bin_size_h = static_cast<Dtype>(roi_height)
-                       / static_cast<Dtype>(pooled_height);
-    Dtype bin_size_w = static_cast<Dtype>(roi_width)
-                       / static_cast<Dtype>(pooled_width);
-
-    int hstart = static_cast<int>(floor(static_cast<Dtype>(ph)
-                                        * bin_size_h));
-    int wstart = static_cast<int>(floor(static_cast<Dtype>(pw)
-                                        * bin_size_w));
-    int hend = static_cast<int>(ceil(static_cast<Dtype>(ph + 1)
-                                     * bin_size_h));
-    int wend = static_cast<int>(ceil(static_cast<Dtype>(pw + 1)
-                                     * bin_size_w));
+    int roi_width    = max(roi_end_w - roi_start_w + 1, 1);
+    int roi_height   = max(roi_end_h - roi_start_h + 1, 1);
+    Dtype bin_size_h = static_cast<Dtype>(roi_height) / static_cast<Dtype>(pooled_height);
+    Dtype bin_size_w = static_cast<Dtype>(roi_width) / static_cast<Dtype>(pooled_width);
+
+    int hstart = static_cast<int>(floor(static_cast<Dtype>(ph) * bin_size_h));
+    int wstart = static_cast<int>(floor(static_cast<Dtype>(pw) * bin_size_w));
+    int hend   = static_cast<int>(ceil(static_cast<Dtype>(ph + 1) * bin_size_h));
+    int wend   = static_cast<int>(ceil(static_cast<Dtype>(pw + 1) * bin_size_w));
 
     // Add roi offsets and clip to input boundaries
-    hstart = min(max(hstart + roi_start_h, 0), height);
-    hend = min(max(hend + roi_start_h, 0), height);
-    wstart = min(max(wstart + roi_start_w, 0), width);
-    wend = min(max(wend + roi_start_w, 0), width);
+    hstart        = min(max(hstart + roi_start_h, 0), height);
+    hend          = min(max(hend + roi_start_h, 0), height);
+    wstart        = min(max(wstart + roi_start_w, 0), width);
+    wend          = min(max(wend + roi_start_w, 0), width);
     bool is_empty = (hend <= hstart) || (wend <= wstart);
 
     // Define an empty pooling region to be zero
     Dtype maxval = is_empty ? 0 : -FLT_MAX;
     // If nothing is pooled, argmax = -1 causes nothing to be backprop'd
-    index_t maxidx = -1;
+    index_t maxidx             = -1;
     index_t offset_bottom_data = (roi_batch_ind * channels + c) * height * width;
     bottom_data += offset_bottom_data;
     for (int h = hstart; h < hend; ++h) {
@@ -101,42 +101,53 @@ __global__ void ROIPoolForwardKernel(const int count, const Dtype* bottom_data,
         }
       }
     }
-    top_data[index] = maxval;
+    top_data[index]    = maxval;
     argmax_data[index] = maxidx;
   }
 }
 
-template<typename Dtype>
-inline void ROIPoolForward(const Tensor<gpu, 4, Dtype> &out,
-                           const Tensor<gpu, 4, Dtype> &data,
-                           const Tensor<gpu, 2, Dtype> &bbox,
-                           const Tensor<gpu, 4, index_t> &max_idx,
+template <typename Dtype>
+inline void ROIPoolForward(const Tensor<gpu, 4, Dtype>& out,
+                           const Tensor<gpu, 4, Dtype>& data,
+                           const Tensor<gpu, 2, Dtype>& bbox,
+                           const Tensor<gpu, 4, index_t>& max_idx,
                            const float spatial_scale) {
-  const Dtype *bottom_data = data.dptr_;
-  const Dtype *bottom_rois = bbox.dptr_;
-  Dtype *top_data = out.dptr_;
-  index_t *argmax_data = max_idx.dptr_;
-  const index_t count = out.shape_.Size();
-  const int batch_size = data.size(0);
-  const int channels = data.size(1);
-  const int height = data.size(2);
-  const int width = data.size(3);
-  const int pooled_height = out.size(2);
-  const int pooled_width = out.size(3);
-  const int gridSize = (count + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
+  const Dtype* bottom_data = data.dptr_;
+  const Dtype* bottom_rois = bbox.dptr_;
+  Dtype* top_data          = out.dptr_;
+  index_t* argmax_data     = max_idx.dptr_;
+  const index_t count      = out.shape_.Size();
+  const int batch_size     = data.size(0);
+  const int channels       = data.size(1);
+  const int height         = data.size(2);
+  const int width          = data.size(3);
+  const int pooled_height  = out.size(2);
+  const int pooled_width   = out.size(3);
+  const int gridSize       = (count + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
   dim3 dimGrid(kMaxGridDim, (gridSize + kMaxGridDim - 1) / kMaxGridDim);
   dim3 dimBlock(kMaxThreadsPerBlock);
   CheckLaunchParam(dimGrid, dimBlock, "ROIPooling Forward");
   cudaStream_t stream = Stream<gpu>::GetStream(out.stream_);
-  ROIPoolForwardKernel<Dtype><<<dimGrid, dimBlock, 0, stream>>>(
-      count, bottom_data, spatial_scale, batch_size, channels, height, width,
-      pooled_height, pooled_width, bottom_rois, top_data, argmax_data);
+  ROIPoolForwardKernel<Dtype><<<dimGrid, dimBlock, 0, stream>>>(count,
+                                                                bottom_data,
+                                                                spatial_scale,
+                                                                batch_size,
+                                                                channels,
+                                                                height,
+                                                                width,
+                                                                pooled_height,
+                                                                pooled_width,
+                                                                bottom_rois,
+                                                                top_data,
+                                                                argmax_data);
   MSHADOW_CUDA_POST_KERNEL_CHECK(ROIPoolForwardKernel);
 }
 
-template<typename Dtype>
-__global__ void ROIPoolBackwardAccKernel(const int count, const Dtype* top_diff,
-                                         const index_t* argmax_data, Dtype* bottom_diff) {
+template <typename Dtype>
+__global__ void ROIPoolBackwardAccKernel(const int count,
+                                         const Dtype* top_diff,
+                                         const index_t* argmax_data,
+                                         Dtype* bottom_diff) {
   for (index_t index = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
        index < count;
        index += blockDim.x * gridDim.x * gridDim.y) {
@@ -147,58 +158,55 @@ __global__ void ROIPoolBackwardAccKernel(const int count, const Dtype* top_diff,
   }
 }
 
-template<typename Dtype>
-inline void ROIPoolBackwardAcc(const Tensor<gpu, 4, Dtype> &in_grad,
-                               const Tensor<gpu, 4, Dtype> &out_grad,
-                               const Tensor<gpu, 2, Dtype> &bbox,
-                               const Tensor<gpu, 4, index_t> &max_idx,
+template <typename Dtype>
+inline void ROIPoolBackwardAcc(const Tensor<gpu, 4, Dtype>& in_grad,
+                               const Tensor<gpu, 4, Dtype>& out_grad,
+                               const Tensor<gpu, 2, Dtype>& bbox,
+                               const Tensor<gpu, 4, index_t>& max_idx,
                                const float spatial_scale) {
-  const Dtype *top_diff = out_grad.dptr_;
-  Dtype *bottom_diff = in_grad.dptr_;
-  index_t *argmax_data = max_idx.dptr_;
-  const index_t count = out_grad.shape_.Size();
-  const int gridSize = (count + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
+  const Dtype* top_diff = out_grad.dptr_;
+  Dtype* bottom_diff    = in_grad.dptr_;
+  index_t* argmax_data  = max_idx.dptr_;
+  const index_t count   = out_grad.shape_.Size();
+  const int gridSize    = (count + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
   dim3 dimGrid(kMaxGridDim, (gridSize + kMaxGridDim - 1) / kMaxGridDim);
   dim3 dimBlock(kMaxThreadsPerBlock);
   CheckLaunchParam(dimGrid, dimBlock, "ROIPooling Backward");
   cudaStream_t stream = Stream<gpu>::GetStream(in_grad.stream_);
-  ROIPoolBackwardAccKernel<Dtype><<<dimGrid, dimBlock, 0, stream>>>(
-      count, top_diff, argmax_data, bottom_diff);
+  ROIPoolBackwardAccKernel<Dtype>
+      <<<dimGrid, dimBlock, 0, stream>>>(count, top_diff, argmax_data, bottom_diff);
   MSHADOW_CUDA_POST_KERNEL_CHECK(ROIPoolBackwardAccKernel);
 }
 
 }  // namespace cuda
 
-template<typename Dtype>
-inline void ROIPoolForward(const Tensor<gpu, 4, Dtype> &out,
-                           const Tensor<gpu, 4, Dtype> &data,
-                           const Tensor<gpu, 2, Dtype> &bbox,
-                           const Tensor<gpu, 4, index_t> &max_idx,
+template <typename Dtype>
+inline void ROIPoolForward(const Tensor<gpu, 4, Dtype>& out,
+                           const Tensor<gpu, 4, Dtype>& data,
+                           const Tensor<gpu, 2, Dtype>& bbox,
+                           const Tensor<gpu, 4, index_t>& max_idx,
                            const float spatial_scale) {
   cuda::ROIPoolForward(out, data, bbox, max_idx, spatial_scale);
 }
 
-template<typename Dtype>
-inline void ROIPoolBackwardAcc(const Tensor<gpu, 4, Dtype> &in_grad,
-                               const Tensor<gpu, 4, Dtype> &out_grad,
-                               const Tensor<gpu, 2, Dtype> &bbox,
-                               const Tensor<gpu, 4, index_t> &max_idx,
+template <typename Dtype>
+inline void ROIPoolBackwardAcc(const Tensor<gpu, 4, Dtype>& in_grad,
+                               const Tensor<gpu, 4, Dtype>& out_grad,
+                               const Tensor<gpu, 2, Dtype>& bbox,
+                               const Tensor<gpu, 4, index_t>& max_idx,
                                const float spatial_scale) {
   cuda::ROIPoolBackwardAcc(in_grad, out_grad, bbox, max_idx, spatial_scale);
 }
 
 }  // namespace mshadow
 
-
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 Operator* CreateOp<gpu>(ROIPoolingParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new ROIPoolingOp<gpu, DType>(param);
-  });
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new ROIPoolingOp<gpu, DType>(param); });
   return op;
 }
 
diff --git a/src/operator/sequence_last-inl.h b/src/operator/sequence_last-inl.h
index 2f386dd820e8..8d938ca61e50 100644
--- a/src/operator/sequence_last-inl.h
+++ b/src/operator/sequence_last-inl.h
@@ -22,7 +22,7 @@
  * \file sequence_last-inl.h
  * \brief
  * \author Sebastian Bodenstien
-*/
+ */
 #ifndef MXNET_OPERATOR_SEQUENCE_LAST_INL_H_
 #define MXNET_OPERATOR_SEQUENCE_LAST_INL_H_
 
@@ -46,7 +46,7 @@ namespace seq_last {
 enum SequenceLastOpInputs { kData, kSequenceLength };
 enum SequenceLastOpOutputs { kOut };
 enum SequenceLastOpResource { kTempSpace };
-}
+}  // namespace seq_last
 
 struct SequenceLastParam : public dmlc::Parameter<SequenceLastParam> {
   bool use_sequence_length;
@@ -66,24 +66,32 @@ struct SequenceLastParam : public dmlc::Parameter<SequenceLastParam> {
 template <int req>
 struct SequenceLastKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *out, const DType *in,
-                                  const IType *idx, index_t offset1, index_t offset2,
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* in,
+                                  const IType* idx,
+                                  index_t offset1,
+                                  index_t offset2,
                                   mshadow::Shape<2> oshape) {
-    const auto opos = mxnet_op::unravel(i, oshape);
+    const auto opos      = mxnet_op::unravel(i, oshape);
     const index_t seqpos = static_cast<index_t>(idx[opos[0]]) - 1;
-    const index_t ipos = seqpos * offset1 + opos[0] * offset2 + opos[1];
+    const index_t ipos   = seqpos * offset1 + opos[0] * offset2 + opos[1];
     KERNEL_ASSIGN(out[i], req, in[ipos]);
   }
 };
 
 struct SequenceLastGradKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType *in_grad, const DType *out_grad,
-                                  const IType *idx, index_t offset1, index_t offset2,
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* in_grad,
+                                  const DType* out_grad,
+                                  const IType* idx,
+                                  index_t offset1,
+                                  index_t offset2,
                                   mshadow::Shape<2> oshape) {
-    const auto opos = mxnet_op::unravel(i, oshape);
+    const auto opos      = mxnet_op::unravel(i, oshape);
     const index_t seqpos = static_cast<index_t>(idx[opos[0]]) - 1;
-    const index_t ipos = seqpos * offset1 + opos[0] * offset2 + opos[1];
+    const index_t ipos   = seqpos * offset1 + opos[0] * offset2 + opos[1];
     in_grad[ipos] += out_grad[i];
   }
 };
@@ -91,132 +99,137 @@ struct SequenceLastGradKernel {
 template <typename xpu, typename DType, typename IType>
 class SequenceLastOp : public Operator {
  public:
-  explicit SequenceLastOp(SequenceLastParam p) { this->param_ = p; }
+  explicit SequenceLastOp(SequenceLastParam p) {
+    this->param_ = p;
+  }
 
-  void sequence_last(const mshadow::Tensor<xpu, 3, DType> &data,
-                     const mshadow::Tensor<xpu, 2, DType> &out,
-                     const mshadow::Tensor<xpu, 1, IType> &indices,
-                     const OpReqType req, mshadow::Stream<xpu> *const s) {
+  void sequence_last(const mshadow::Tensor<xpu, 3, DType>& data,
+                     const mshadow::Tensor<xpu, 2, DType>& out,
+                     const mshadow::Tensor<xpu, 1, IType>& indices,
+                     const OpReqType req,
+                     mshadow::Stream<xpu>* const s) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
-    int axis = param_.axis;
-    index_t out_size = out.size(0) * out.size(1);
+    int axis            = param_.axis;
+    index_t out_size    = out.size(0) * out.size(1);
     index_t max_seq_len = data.size(axis);
-    index_t offset1 = axis ? out.size(1) : out_size;
-    index_t offset2 = axis ? (max_seq_len * out.size(1)) : out.size(1);
+    index_t offset1     = axis ? out.size(1) : out_size;
+    index_t offset2     = axis ? (max_seq_len * out.size(1)) : out.size(1);
 
     MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
       mxnet_op::Kernel<SequenceLastKernel<req_type>, xpu>::Launch(
-          s, out_size, out.dptr_, data.dptr_, indices.dptr_, offset1, offset2,
-          out.shape_);
+          s, out_size, out.dptr_, data.dptr_, indices.dptr_, offset1, offset2, out.shape_);
     });
   }
 
-  void sequence_last_grad(const mshadow::Tensor<xpu, 3, DType> &in_grad,
-                          const mshadow::Tensor<xpu, 2, DType> &out_grad,
-                          const mshadow::Tensor<xpu, 1, IType> &indices,
-                          mshadow::Stream<xpu> *const s) {
+  void sequence_last_grad(const mshadow::Tensor<xpu, 3, DType>& in_grad,
+                          const mshadow::Tensor<xpu, 2, DType>& out_grad,
+                          const mshadow::Tensor<xpu, 1, IType>& indices,
+                          mshadow::Stream<xpu>* const s) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
-    auto axis = param_.axis;
-    index_t batch = out_grad.size(0);
-    index_t rest = out_grad.size(1);
+    auto axis        = param_.axis;
+    index_t batch    = out_grad.size(0);
+    index_t rest     = out_grad.size(1);
     index_t out_size = batch * rest;
 
     index_t max_seq_len = in_grad.size(axis);
-    index_t offset1 = axis ? rest : out_size;
-    index_t offset2 = axis ? (max_seq_len * rest) : rest;
-
-    mxnet_op::Kernel<SequenceLastGradKernel, xpu>::Launch(
-        s, out_size, in_grad.dptr_, out_grad.dptr_, indices.dptr_, offset1,
-        offset2, out_grad.shape_);
+    index_t offset1     = axis ? rest : out_size;
+    index_t offset2     = axis ? (max_seq_len * rest) : rest;
+
+    mxnet_op::Kernel<SequenceLastGradKernel, xpu>::Launch(s,
+                                                          out_size,
+                                                          in_grad.dptr_,
+                                                          out_grad.dptr_,
+                                                          indices.dptr_,
+                                                          offset1,
+                                                          offset2,
+                                                          out_grad.shape_);
   }
 
-  virtual void Forward(const OpContext &ctx, const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
     CHECK_EQ(in_data.size(), param_.use_sequence_length ? 2U : 1U);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     // only support axis of 0 or 1 for now
     auto axis = param_.axis;
 
     // Get any size input + output into required form
-    auto d0 = in_data[seq_last::kData].size(0);
-    auto d1 = in_data[seq_last::kData].size(1);
+    auto d0    = in_data[seq_last::kData].size(0);
+    auto d1    = in_data[seq_last::kData].size(1);
     auto dsize = in_data[seq_last::kData].Size();
 
     if (dsize == 0) {
       return;  // noop if any input dimension is zero-sized, out_data is of a right shape
     }
 
-    auto batch = (axis != 0) ? d0 : d1;
+    auto batch       = (axis != 0) ? d0 : d1;
     auto max_seq_len = in_data[seq_last::kData].size(axis);
-    auto rest_size = dsize / (d0 * d1);
+    auto rest_size   = dsize / (d0 * d1);
 
     Tensor<xpu, 3, DType> data =
-        in_data[seq_last::kData].get_with_shape<xpu, 3, DType>(
-            Shape3(d0, d1, rest_size), s);
+        in_data[seq_last::kData].get_with_shape<xpu, 3, DType>(Shape3(d0, d1, rest_size), s);
     Tensor<xpu, 2, DType> out =
-        out_data[seq_last::kOut].get_with_shape<xpu, 2, DType>(
-            Shape2(batch, rest_size), s);
+        out_data[seq_last::kOut].get_with_shape<xpu, 2, DType>(Shape2(batch, rest_size), s);
     Tensor<xpu, 1, IType> indices =
         param_.use_sequence_length
             ? in_data[seq_last::kSequenceLength].get<xpu, 1, IType>(s)
-            : ctx.requested[seq_last::kTempSpace]
-                  .get_space_typed<xpu, 1, IType>(Shape1(batch), s);
-    if (!param_.use_sequence_length) indices = max_seq_len;
+            : ctx.requested[seq_last::kTempSpace].get_space_typed<xpu, 1, IType>(Shape1(batch), s);
+    if (!param_.use_sequence_length)
+      indices = max_seq_len;
 
     sequence_last(data, out, indices, req[seq_last::kOut], s);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(in_data.size(), param_.use_sequence_length ? 2U : 1U);
 
     // break immediately if null grad
-    if (req[seq_last::kData] == kNullOp) return;
+    if (req[seq_last::kData] == kNullOp)
+      return;
 
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // only support axis of 0 or 1 for now
     auto axis = param_.axis;
 
     // Get any size input + output into required form
-    auto d0 = in_data[seq_last::kData].size(0);
-    auto d1 = in_data[seq_last::kData].size(1);
+    auto d0    = in_data[seq_last::kData].size(0);
+    auto d1    = in_data[seq_last::kData].size(1);
     auto dsize = in_data[seq_last::kData].Size();
 
-    auto batch = (axis != 0) ? d0 : d1;
+    auto batch     = (axis != 0) ? d0 : d1;
     auto rest_size = dsize / (d0 * d1);
 
     Tensor<xpu, 3, DType> data_grad =
-        in_grad[seq_last::kData].get_with_shape<xpu, 3, DType>(
-            Shape3(d0, d1, rest_size), s);
+        in_grad[seq_last::kData].get_with_shape<xpu, 3, DType>(Shape3(d0, d1, rest_size), s);
     Tensor<xpu, 2, DType> output_grad =
-        out_grad[seq_last::kOut].get_with_shape<xpu, 2, DType>(
-            Shape2(batch, rest_size), s);
+        out_grad[seq_last::kOut].get_with_shape<xpu, 2, DType>(Shape2(batch, rest_size), s);
     Tensor<xpu, 1, IType> indices =
         param_.use_sequence_length
             ? in_data[seq_last::kSequenceLength].get<xpu, 1, IType>(s)
-            : ctx.requested[seq_last::kTempSpace]
-                  .get_space_typed<xpu, 1, IType>(Shape1(batch), s);
+            : ctx.requested[seq_last::kTempSpace].get_space_typed<xpu, 1, IType>(Shape1(batch), s);
 
-    if (req[seq_last::kData] == kWriteTo) data_grad = 0.0f;
+    if (req[seq_last::kData] == kWriteTo)
+      data_grad = 0.0f;
     sequence_last_grad(data_grad, output_grad, indices, s);
   }
 
@@ -225,12 +238,14 @@ class SequenceLastOp : public Operator {
 };  // class SequenceLastOp
 
 template <typename xpu>
-Operator *CreateOp(SequenceLastParam param, int dtype, int itype);
+Operator* CreateOp(SequenceLastParam param, int dtype, int itype);
 
 #if DMLC_USE_CXX11
 class SequenceLastProp : public OperatorProperty {
  public:
-  int NumOutputs() const override { return 1; }
+  int NumOutputs() const override {
+    return 1;
+  }
 
   std::vector<std::string> ListArguments() const override {
     if (param_.use_sequence_length)
@@ -239,10 +254,11 @@ class SequenceLastProp : public OperatorProperty {
       return {"data"};
   }
 
-  std::vector<std::string> ListOutputs() const override { return {"output"}; }
+  std::vector<std::string> ListOutputs() const override {
+    return {"output"};
+  }
 
-  void Init(
-      const std::vector<std::pair<std::string, std::string>> &kwargs) override {
+  void Init(const std::vector<std::pair<std::string, std::string>>& kwargs) override {
     param_.Init(kwargs);
   }
 
@@ -250,17 +266,17 @@ class SequenceLastProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), param_.use_sequence_length ? 2U : 1U)
         << "Input:[data, sequence_length]";
     CHECK((param_.axis == 0) || (param_.axis == 1))
         << "Current implementation expects axis to be 0 or 1.";
 
-    const mxnet::TShape &dshape = (*in_shape)[seq_last::kData];
-    CHECK_GT(dshape.ndim(), 1U)
-        << "The data array must be of rank 2 or greater.";
+    const mxnet::TShape& dshape = (*in_shape)[seq_last::kData];
+    CHECK_GT(dshape.ndim(), 1U) << "The data array must be of rank 2 or greater.";
     // seq length vector is same as batch size
     int sbatch = param_.axis ? dshape[0] : dshape[1];
     if (param_.use_sequence_length)
@@ -269,16 +285,18 @@ class SequenceLastProp : public OperatorProperty {
     // calculate output size
     mxnet::TShape shape_o(dshape.ndim() - 1, -1);
     shape_o[0] = sbatch;
-    for (index_t i = 1; i < shape_o.ndim(); ++i) shape_o[i] = dshape[i + 1];
+    for (index_t i = 1; i < shape_o.ndim(); ++i)
+      shape_o[i] = dshape[i + 1];
 
-    const mxnet::TShape &oshape = shape_o;
+    const mxnet::TShape& oshape = shape_o;
     out_shape->clear();
     out_shape->push_back(oshape);
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type, std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), param_.use_sequence_length ? 2U : 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -292,40 +310,41 @@ class SequenceLastProp : public OperatorProperty {
     return true;
   }
 
-  OperatorProperty *Copy() const override {
-    auto ptr = new SequenceLastProp();
+  OperatorProperty* Copy() const override {
+    auto ptr    = new SequenceLastProp();
     ptr->param_ = param_;
     return ptr;
   }
 
-  std::string TypeString() const override { return "SequenceLast"; }
+  std::string TypeString() const override {
+    return "SequenceLast";
+  }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<int> DeclareBackwardDependency(
-      const std::vector<int> &out_grad, const std::vector<int> &in_data,
-      const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (param_.use_sequence_length)
       return {out_grad[seq_last::kOut], in_data[seq_last::kSequenceLength]};
     else
       return {out_grad[seq_last::kOut]};
   }
 
-  Operator *CreateOperator(Context ctx) const override {
+  Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator *CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   SequenceLastParam param_;
diff --git a/src/operator/sequence_last.cc b/src/operator/sequence_last.cc
index a5c40055921a..404df6a3a54b 100644
--- a/src/operator/sequence_last.cc
+++ b/src/operator/sequence_last.cc
@@ -22,38 +22,36 @@
  * \file sequence_last.cc
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 #include "./sequence_last-inl.h"
 
 namespace mxnet {
 namespace op {
 template <>
-Operator *CreateOp<cpu>(SequenceLastParam param, int dtype, int itype) {
-  Operator *op = nullptr;
+Operator* CreateOp<cpu>(SequenceLastParam param, int dtype, int itype) {
+  Operator* op = nullptr;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
-      MSHADOW_TYPE_SWITCH(itype, IType, {
-          op = new SequenceLastOp<cpu, DType, IType>(param);
-        });
-    });
+    MSHADOW_TYPE_SWITCH(itype, IType, { op = new SequenceLastOp<cpu, DType, IType>(param); });
+  });
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *SequenceLastProp::CreateOperatorEx(Context ctx,
-                                             mxnet::ShapeVector *in_shape,
-                                             std::vector<int> *in_type) const {
+Operator* SequenceLastProp::CreateOperatorEx(Context ctx,
+                                             mxnet::ShapeVector* in_shape,
+                                             std::vector<int>* in_type) const {
   if (in_type->size() >= 2 && (*in_type)[1] != -1) {
     DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], (*in_type)[1]);
   }
 
-  // sequence_length not passed in, so fall back to using int32/int64 dtype for second argument
-  // second argument is the dtype of the sequence_length NDArray
-  // use int32 or int64 as index dtype based on build flag
-  #if MXNET_USE_INT64_TENSOR_SIZE == 1
-      DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], mshadow::kInt64);
-  #else
-      DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], mshadow::kInt32);
-  #endif
+// sequence_length not passed in, so fall back to using int32/int64 dtype for second argument
+// second argument is the dtype of the sequence_length NDArray
+// use int32 or int64 as index dtype based on build flag
+#if MXNET_USE_INT64_TENSOR_SIZE == 1
+  DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], mshadow::kInt64);
+#else
+  DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], mshadow::kInt32);
+#endif
 }
 
 DMLC_REGISTER_PARAMETER(SequenceLastParam);
@@ -104,15 +102,16 @@ Example::
              [  25.,  26.,  27.]]
 
 )code" ADD_FILELINE)
-    .add_argument("data", "NDArray-or-Symbol",
+    .add_argument("data",
+                  "NDArray-or-Symbol",
                   "n-dimensional input array of the form [max_sequence_length,"
                   " batch_size, other_feature_dims] where n>2")
-    .add_argument("sequence_length", "NDArray-or-Symbol",
+    .add_argument("sequence_length",
+                  "NDArray-or-Symbol",
                   "vector of sequence lengths of the form [batch_size]")
     .add_arguments(SequenceLastParam::__FIELDS__());
 
-NNVM_REGISTER_OP(SequenceLast)
-.add_alias("_npx_sequence_last");
+NNVM_REGISTER_OP(SequenceLast).add_alias("_npx_sequence_last");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/sequence_last.cu b/src/operator/sequence_last.cu
index 1829d3f3b5f5..338eb6e4b72b 100644
--- a/src/operator/sequence_last.cu
+++ b/src/operator/sequence_last.cu
@@ -22,19 +22,18 @@
  * \file sequence_last.cu
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include "./sequence_last-inl.h"
 
 namespace mxnet {
 namespace op {
-template <> Operator *CreateOp<gpu>(SequenceLastParam param, int dtype, int itype) {
-  Operator *op = nullptr;
+template <>
+Operator* CreateOp<gpu>(SequenceLastParam param, int dtype, int itype) {
+  Operator* op = nullptr;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
-      MSHADOW_TYPE_SWITCH(itype, IType, {
-          op = new SequenceLastOp<gpu, DType, IType>(param);
-        });
-    });
+    MSHADOW_TYPE_SWITCH(itype, IType, { op = new SequenceLastOp<gpu, DType, IType>(param); });
+  });
   return op;
 }
 
diff --git a/src/operator/sequence_mask-inl.h b/src/operator/sequence_mask-inl.h
index 2fc698aab205..beb7f63f83ad 100644
--- a/src/operator/sequence_mask-inl.h
+++ b/src/operator/sequence_mask-inl.h
@@ -22,7 +22,7 @@
  * \file wl_sequence_mask-inl.h
  * \brief
  * \author Sebastian Bodenstien
-*/
+ */
 
 #ifndef MXNET_OPERATOR_SEQUENCE_MASK_INL_H_
 #define MXNET_OPERATOR_SEQUENCE_MASK_INL_H_
@@ -45,7 +45,7 @@ namespace seq_mask {
 enum SequenceMaskOpInputs { kData, kSequenceLength };
 enum SequenceMaskOpOutputs { kOut };
 enum SequenceMaskOpBackResource { kTempSpace };
-}
+}  // namespace seq_mask
 
 struct SequenceMaskParam : public dmlc::Parameter<SequenceMaskParam> {
   bool use_sequence_length;
@@ -58,44 +58,50 @@ struct SequenceMaskParam : public dmlc::Parameter<SequenceMaskParam> {
             "If set to true, this layer takes in an extra input parameter "
             "`sequence_length` "
             "to specify variable length sequence");
-    DMLC_DECLARE_FIELD(value).set_default(0.).describe(
-        "The value to be used as a mask.");
+    DMLC_DECLARE_FIELD(value).set_default(0.).describe("The value to be used as a mask.");
     DMLC_DECLARE_FIELD(axis).set_default(0).describe(
         "The sequence axis. Only values of 0 and 1 are currently supported.");
   }
 };
 
-template<typename DType, typename IType>
-void SequenceMaskExec(const mshadow::Tensor<cpu, 3, DType> &data,
-                  const mshadow::Tensor<cpu, 1, IType> &indices,
-                  const OpReqType req, mshadow::Stream<cpu> *const s,
-                  int axis, DType val);
+template <typename DType, typename IType>
+void SequenceMaskExec(const mshadow::Tensor<cpu, 3, DType>& data,
+                      const mshadow::Tensor<cpu, 1, IType>& indices,
+                      const OpReqType req,
+                      mshadow::Stream<cpu>* const s,
+                      int axis,
+                      DType val);
 #ifdef __CUDACC__
-template<typename DType, typename IType>
-void SequenceMaskExec(const mshadow::Tensor<gpu, 3, DType> &data,
-                  const mshadow::Tensor<gpu, 1, IType> &indices,
-                  const OpReqType req, mshadow::Stream<gpu> *const s,
-                  int axis, DType val);
+template <typename DType, typename IType>
+void SequenceMaskExec(const mshadow::Tensor<gpu, 3, DType>& data,
+                      const mshadow::Tensor<gpu, 1, IType>& indices,
+                      const OpReqType req,
+                      mshadow::Stream<gpu>* const s,
+                      int axis,
+                      DType val);
 #endif
 
 template <typename xpu, typename DType, typename IType>
 class SequenceMaskOp : public Operator {
  public:
-  explicit SequenceMaskOp(SequenceMaskParam p) { this->param_ = p; }
+  explicit SequenceMaskOp(SequenceMaskParam p) {
+    this->param_ = p;
+  }
 
-  virtual void Forward(const OpContext &ctx, const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), param_.use_sequence_length ? 2U : 1U);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     // Get any size input + output into required form
-    auto d0 = in_data[seq_mask::kData].size(0);
-    auto d1 = in_data[seq_mask::kData].size(1);
+    auto d0    = in_data[seq_mask::kData].size(0);
+    auto d1    = in_data[seq_mask::kData].size(1);
     auto dsize = in_data[seq_mask::kData].Size();
 
     if (dsize == 0) {
@@ -104,65 +110,59 @@ class SequenceMaskOp : public Operator {
 
     auto rest_size = dsize / (d0 * d1);
 
-    Shape<3> s3 = Shape3(d0, d1, rest_size);
-    Tensor<xpu, 3, DType> data =
-        in_data[seq_mask::kData].get_with_shape<xpu, 3, DType>(s3, s);
-    Tensor<xpu, 3, DType> out =
-        out_data[seq_mask::kOut].get_with_shape<xpu, 3, DType>(s3, s);
+    Shape<3> s3                = Shape3(d0, d1, rest_size);
+    Tensor<xpu, 3, DType> data = in_data[seq_mask::kData].get_with_shape<xpu, 3, DType>(s3, s);
+    Tensor<xpu, 3, DType> out  = out_data[seq_mask::kOut].get_with_shape<xpu, 3, DType>(s3, s);
     // Actual implementation of masking
     Assign(out, req[seq_mask::kOut], F<mshadow_op::identity>(data));
     if (param_.use_sequence_length) {
-      Tensor<xpu, 1, IType> indices =
-          in_data[seq_mask::kSequenceLength].get<xpu, 1, IType>(s);
-      SequenceMaskExec<DType, IType>(out, indices, req[seq_mask::kOut], s,
-                   param_.axis, static_cast<DType>(param_.value));
+      Tensor<xpu, 1, IType> indices = in_data[seq_mask::kSequenceLength].get<xpu, 1, IType>(s);
+      SequenceMaskExec<DType, IType>(
+          out, indices, req[seq_mask::kOut], s, param_.axis, static_cast<DType>(param_.value));
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(in_data.size(), param_.use_sequence_length ? 2U : 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     // Get any size input + output into required form
-    auto d0 = in_grad[seq_mask::kData].size(0);
-    auto d1 = in_grad[seq_mask::kData].size(1);
-    auto dsize = in_grad[seq_mask::kData].Size();
+    auto d0        = in_grad[seq_mask::kData].size(0);
+    auto d1        = in_grad[seq_mask::kData].size(1);
+    auto dsize     = in_grad[seq_mask::kData].Size();
     auto rest_size = dsize / (d0 * d1);
 
-    Shape<3> s3 = Shape3(d0, d1, rest_size);
-    Tensor<xpu, 3, DType> data_g =
-        in_grad[seq_mask::kData].get_with_shape<xpu, 3, DType>(s3, s);
-    Tensor<xpu, 3, DType> out_g =
-        out_grad[seq_mask::kOut].get_with_shape<xpu, 3, DType>(s3, s);
+    Shape<3> s3                  = Shape3(d0, d1, rest_size);
+    Tensor<xpu, 3, DType> data_g = in_grad[seq_mask::kData].get_with_shape<xpu, 3, DType>(s3, s);
+    Tensor<xpu, 3, DType> out_g  = out_grad[seq_mask::kOut].get_with_shape<xpu, 3, DType>(s3, s);
 
     // Actual implementation of masking
-    if (req[seq_mask::kData] == kNullOp) return;
+    if (req[seq_mask::kData] == kNullOp)
+      return;
     if (!param_.use_sequence_length) {
       Assign(data_g, req[seq_mask::kData], F<mshadow_op::identity>(out_g));
     } else {
-      Tensor<xpu, 1, IType> indices =
-          in_data[seq_mask::kSequenceLength].get<xpu, 1, IType>(s);
+      Tensor<xpu, 1, IType> indices = in_data[seq_mask::kSequenceLength].get<xpu, 1, IType>(s);
       if (req[seq_mask::kData] == kAddTo) {
         Tensor<xpu, 3, DType> out_g_temp =
-            ctx.requested[seq_mask::kTempSpace].get_space_typed<xpu, 3, DType>(
-                s3, s);
+            ctx.requested[seq_mask::kTempSpace].get_space_typed<xpu, 3, DType>(s3, s);
         out_g_temp = F<mshadow_op::identity>(out_g);
-        out_g = out_g_temp;
+        out_g      = out_g_temp;
         SequenceMaskExec<DType, IType>(out_g, indices, kWriteInplace, s, param_.axis, DType(0.));
         Assign(data_g, kAddTo, F<mshadow_op::identity>(out_g));
       } else {
         Assign(data_g, req[seq_mask::kData], F<mshadow_op::identity>(out_g));
         SequenceMaskExec<DType, IType>(
-          data_g, indices, req[seq_mask::kData], s, param_.axis, DType(0.));
+            data_g, indices, req[seq_mask::kData], s, param_.axis, DType(0.));
       }
     }
   }
@@ -172,14 +172,18 @@ class SequenceMaskOp : public Operator {
 };  // class SequenceMaskOp
 
 template <typename xpu>
-Operator *CreateOp(SequenceMaskParam param, int dtype, int itype);
+Operator* CreateOp(SequenceMaskParam param, int dtype, int itype);
 
 #if DMLC_USE_CXX11
 class SequenceMaskProp : public OperatorProperty {
  public:
-  int NumVisibleOutputs() const override { return 1; }
+  int NumVisibleOutputs() const override {
+    return 1;
+  }
 
-  int NumOutputs() const override { return 1; }
+  int NumOutputs() const override {
+    return 1;
+  }
 
   std::vector<std::string> ListArguments() const override {
     if (param_.use_sequence_length)
@@ -188,10 +192,11 @@ class SequenceMaskProp : public OperatorProperty {
       return {"data"};
   }
 
-  std::vector<std::string> ListOutputs() const override { return {"output"}; }
+  std::vector<std::string> ListOutputs() const override {
+    return {"output"};
+  }
 
-  void Init(const std::vector<std::pair<std::string, std::string> > &kwargs)
-      override {
+  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.Init(kwargs);
   }
 
@@ -199,15 +204,15 @@ class SequenceMaskProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), param_.use_sequence_length ? 2U : 1U)
         << "Input:[data, sequence_length]";
 
-    const mxnet::TShape &dshape = (*in_shape)[seq_mask::kData];
-    CHECK_GT(dshape.ndim(), 1U)
-        << "The data array must be of rank 2 or greater.";
+    const mxnet::TShape& dshape = (*in_shape)[seq_mask::kData];
+    CHECK_GT(dshape.ndim(), 1U) << "The data array must be of rank 2 or greater.";
     CHECK((param_.axis == 0) || (param_.axis == 1))
         << "Current implementation expects axis to be 0 or 1.";
 
@@ -216,14 +221,15 @@ class SequenceMaskProp : public OperatorProperty {
     if (param_.use_sequence_length)
       SHAPE_ASSIGN_CHECK(*in_shape, seq_mask::kSequenceLength, Shape1(sbatch));
 
-    const mxnet::TShape &oshape = dshape;
+    const mxnet::TShape& oshape = dshape;
     out_shape->clear();
     out_shape->push_back(oshape);
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type, std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), param_.use_sequence_length ? 2U : 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -237,48 +243,51 @@ class SequenceMaskProp : public OperatorProperty {
     return true;
   }
 
-  OperatorProperty *Copy() const override {
-    auto ptr = new SequenceMaskProp();
+  OperatorProperty* Copy() const override {
+    auto ptr    = new SequenceMaskProp();
     ptr->param_ = param_;
     return ptr;
   }
 
-  std::string TypeString() const override { return "SequenceMask"; }
+  std::string TypeString() const override {
+    return "SequenceMask";
+  }
 
-  std::vector<int> DeclareBackwardDependency(
-      const std::vector<int> &out_grad, const std::vector<int> &in_data,
-      const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (param_.use_sequence_length)
       return {out_grad[seq_mask::kOut], in_data[seq_mask::kSequenceLength]};
     else
       return {out_grad[seq_mask::kOut]};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  std::vector<std::pair<int, void *> > BackwardInplaceOption(
-      const std::vector<int> &out_grad, const std::vector<int> &in_data,
-      const std::vector<int> &out_data,
-      const std::vector<void *> &in_grad) const override {
+  std::vector<std::pair<int, void*> > BackwardInplaceOption(
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {{out_grad[seq_mask::kOut], in_grad[seq_mask::kData]}};
   }
 
-  std::vector<std::pair<int, void *> > ForwardInplaceOption(
-      const std::vector<int> &in_data,
-      const std::vector<void *> &out_data) const override {
+  std::vector<std::pair<int, void*> > ForwardInplaceOption(
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     return {{in_data[seq_mask::kData], out_data[seq_mask::kOut]}};
   }
 
-  Operator *CreateOperator(Context ctx) const override {
+  Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator *CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   SequenceMaskParam param_;
diff --git a/src/operator/sequence_mask.cc b/src/operator/sequence_mask.cc
index d7731026ce21..8d42763f66c7 100644
--- a/src/operator/sequence_mask.cc
+++ b/src/operator/sequence_mask.cc
@@ -22,7 +22,7 @@
  * \file sequence_mask.cc
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 #include "./sequence_mask-inl.h"
 
 namespace mxnet {
@@ -32,9 +32,13 @@ namespace op {
 template <int req>
 struct SequenceMask0CPUKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int batch, DType *in, const IType *idx,
-                                  index_t max_s_len, index_t batch_size,
-                                  index_t restsize, DType value) {
+  MSHADOW_XINLINE static void Map(int batch,
+                                  DType* in,
+                                  const IType* idx,
+                                  index_t max_s_len,
+                                  index_t batch_size,
+                                  index_t restsize,
+                                  DType value) {
     const index_t seqpos = static_cast<int>(idx[batch]);
 #pragma unroll
     for (index_t s = seqpos; s < max_s_len; ++s) {
@@ -50,9 +54,13 @@ struct SequenceMask0CPUKernel {
 template <int req>
 struct SequenceMask1CPUKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int batch, DType *in, const IType *idx,
-                                  index_t max_s_len, index_t batch_size,
-                                  index_t restsize, DType value) {
+  MSHADOW_XINLINE static void Map(int batch,
+                                  DType* in,
+                                  const IType* idx,
+                                  index_t max_s_len,
+                                  index_t batch_size,
+                                  index_t restsize,
+                                  DType value) {
     const index_t seqpos = static_cast<int>(idx[batch]);
 #pragma unroll
     for (index_t s = seqpos; s < max_s_len; ++s) {
@@ -64,48 +72,45 @@ struct SequenceMask1CPUKernel {
   }
 };
 
-template<typename DType, typename IType>
-void SequenceMaskExec(
-       const mshadow::Tensor<cpu, 3, DType> &data,
-       const mshadow::Tensor<cpu, 1, IType> &indices,
-       const OpReqType req, mshadow::Stream<cpu> *const s,
-       int axis, DType val) {
+template <typename DType, typename IType>
+void SequenceMaskExec(const mshadow::Tensor<cpu, 3, DType>& data,
+                      const mshadow::Tensor<cpu, 1, IType>& indices,
+                      const OpReqType req,
+                      mshadow::Stream<cpu>* const s,
+                      int axis,
+                      DType val) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
 
-  index_t batch = indices.size(0);
+  index_t batch       = indices.size(0);
   index_t max_seq_len = data.size(axis);
-  index_t restsize = data.size(2);
+  index_t restsize    = data.size(2);
 
   MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
     if (axis == 1) {
       Kernel<SequenceMask1CPUKernel<req_type>, cpu>::Launch(
-        s, batch, data.dptr_, indices.dptr_, max_seq_len, batch, restsize,
-        val);
+          s, batch, data.dptr_, indices.dptr_, max_seq_len, batch, restsize, val);
     } else {
       Kernel<SequenceMask0CPUKernel<req_type>, cpu>::Launch(
-        s, batch, data.dptr_, indices.dptr_, max_seq_len, batch, restsize,
-        val);
+          s, batch, data.dptr_, indices.dptr_, max_seq_len, batch, restsize, val);
     }
   });
 }
 
 template <>
-Operator *CreateOp<cpu>(SequenceMaskParam param, int dtype, int itype) {
-  Operator *op = nullptr;
+Operator* CreateOp<cpu>(SequenceMaskParam param, int dtype, int itype) {
+  Operator* op = nullptr;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
-      MSHADOW_TYPE_SWITCH(itype, IType, {
-          op = new SequenceMaskOp<cpu, DType, IType>(param);
-        });
-    });
+    MSHADOW_TYPE_SWITCH(itype, IType, { op = new SequenceMaskOp<cpu, DType, IType>(param); });
+  });
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *SequenceMaskProp::CreateOperatorEx(Context ctx,
-                                             mxnet::ShapeVector *in_shape,
-                                             std::vector<int> *in_type) const {
+Operator* SequenceMaskProp::CreateOperatorEx(Context ctx,
+                                             mxnet::ShapeVector* in_shape,
+                                             std::vector<int>* in_type) const {
   if (in_type->size() >= 2 && (*in_type)[1] != -1) {
     DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], (*in_type)[1]);
   }
@@ -184,15 +189,16 @@ Example::
                   [  16.,  17.,  18.]]]
 
 )code" ADD_FILELINE)
-    .add_argument("data", "NDArray-or-Symbol",
+    .add_argument("data",
+                  "NDArray-or-Symbol",
                   "n-dimensional input array of the form [max_sequence_length,"
                   " batch_size, other_feature_dims] where n>2")
-    .add_argument("sequence_length", "NDArray-or-Symbol",
+    .add_argument("sequence_length",
+                  "NDArray-or-Symbol",
                   "vector of sequence lengths of the form [batch_size]")
     .add_arguments(SequenceMaskParam::__FIELDS__());
 
-NNVM_REGISTER_OP(SequenceMask)
-.add_alias("_npx_sequence_mask");
+NNVM_REGISTER_OP(SequenceMask).add_alias("_npx_sequence_mask");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/sequence_mask.cu b/src/operator/sequence_mask.cu
index d5c778992ded..5d7b27336628 100644
--- a/src/operator/sequence_mask.cu
+++ b/src/operator/sequence_mask.cu
@@ -22,7 +22,7 @@
  * \file sequence_mask.cu
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include "./sequence_mask-inl.h"
 
@@ -33,12 +33,16 @@ namespace op {
 template <int req>
 struct SequenceMask0GPUKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType *in, const IType *idx,
-                                  index_t max_s_len, index_t batch_size,
-                                  index_t restsize, DType value) {
-    index_t batch = i / restsize % batch_size;
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* in,
+                                  const IType* idx,
+                                  index_t max_s_len,
+                                  index_t batch_size,
+                                  index_t restsize,
+                                  DType value) {
+    index_t batch        = i / restsize % batch_size;
     const index_t seqpos = static_cast<int>(idx[batch]);
-    index_t seq = i / restsize / batch_size;
+    index_t seq          = i / restsize / batch_size;
     if (seq >= seqpos) {
       KERNEL_ASSIGN(in[i], req, value);
     }
@@ -49,52 +53,54 @@ struct SequenceMask0GPUKernel {
 template <int req>
 struct SequenceMask1GPUKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType *in, const IType *idx,
-                                  index_t max_s_len, index_t batch_size,
-                                  index_t restsize, DType value) {
-    index_t batch = i / restsize / max_s_len;
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* in,
+                                  const IType* idx,
+                                  index_t max_s_len,
+                                  index_t batch_size,
+                                  index_t restsize,
+                                  DType value) {
+    index_t batch        = i / restsize / max_s_len;
     const index_t seqpos = static_cast<int>(idx[batch]);
-    index_t seq = i / restsize % max_s_len;
+    index_t seq          = i / restsize % max_s_len;
     if (seq >= seqpos) {
       KERNEL_ASSIGN(in[i], req, value);
     }
   }
 };
 
-template<typename DType, typename IType>
-void SequenceMaskExec(
-       const mshadow::Tensor<gpu, 3, DType> &data,
-       const mshadow::Tensor<gpu, 1, IType> &indices,
-       const OpReqType req, mshadow::Stream<gpu> *const s,
-       int axis, DType val) {
+template <typename DType, typename IType>
+void SequenceMaskExec(const mshadow::Tensor<gpu, 3, DType>& data,
+                      const mshadow::Tensor<gpu, 1, IType>& indices,
+                      const OpReqType req,
+                      mshadow::Stream<gpu>* const s,
+                      int axis,
+                      DType val) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
 
-  index_t batch = indices.size(0);
+  index_t batch       = indices.size(0);
   index_t max_seq_len = data.size(axis);
-  index_t restsize = data.size(2);
+  index_t restsize    = data.size(2);
 
   MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
     if (axis == 1) {
       Kernel<SequenceMask1GPUKernel<req_type>, gpu>::Launch(
-        s, data.shape_.Size(), data.dptr_, indices.dptr_, max_seq_len, batch, restsize,
-        val);
+          s, data.shape_.Size(), data.dptr_, indices.dptr_, max_seq_len, batch, restsize, val);
     } else {
       Kernel<SequenceMask0GPUKernel<req_type>, gpu>::Launch(
-        s, data.shape_.Size(), data.dptr_, indices.dptr_, max_seq_len, batch, restsize,
-        val);
+          s, data.shape_.Size(), data.dptr_, indices.dptr_, max_seq_len, batch, restsize, val);
     }
   });
 }
 
-template <> Operator *CreateOp<gpu>(SequenceMaskParam param, int dtype, int itype) {
-  Operator *op = nullptr;
+template <>
+Operator* CreateOp<gpu>(SequenceMaskParam param, int dtype, int itype) {
+  Operator* op = nullptr;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
-      MSHADOW_TYPE_SWITCH(itype, IType, {
-          op = new SequenceMaskOp<gpu, DType, IType>(param);
-        });
-    });
+    MSHADOW_TYPE_SWITCH(itype, IType, { op = new SequenceMaskOp<gpu, DType, IType>(param); });
+  });
   return op;
 }
 
diff --git a/src/operator/sequence_op_common.h b/src/operator/sequence_op_common.h
index afc0203fcb25..4baa28eae17a 100644
--- a/src/operator/sequence_op_common.h
+++ b/src/operator/sequence_op_common.h
@@ -22,7 +22,7 @@
  * \file sequence_op_common.h
  * \brief common function used for sequence layers
  * \author Sebastian Bodenstein
-*/
+ */
 #ifndef MXNET_OPERATOR_SEQUENCE_OP_COMMON_H_
 #define MXNET_OPERATOR_SEQUENCE_OP_COMMON_H_
 #include <dmlc/logging.h>
@@ -34,16 +34,17 @@ namespace mxnet {
 namespace op {
 
 template <typename DType, typename RType>
-typename std::enable_if<std::is_integral<RType>::value>::type
-inline IndexTensorToVector(mshadow::Tensor<gpu, 1, DType> data,
-                           std::vector<RType> *index_vec) {
+typename std::enable_if<std::is_integral<RType>::value>::type inline IndexTensorToVector(
+    mshadow::Tensor<gpu, 1, DType> data,
+    std::vector<RType>* index_vec) {
 #if MXNET_USE_CUDA
   size_t const max_seq_len = data.shape_.Size();
-  DType *temp_index =
-      reinterpret_cast<DType *>(malloc(sizeof(DType) * max_seq_len));
-  cudaError_t cuda_status =
-      cudaMemcpyAsync(temp_index, data.dptr_, max_seq_len * sizeof(DType),
-                      cudaMemcpyDeviceToHost, data.stream_->stream_);
+  DType* temp_index        = reinterpret_cast<DType*>(malloc(sizeof(DType) * max_seq_len));
+  cudaError_t cuda_status  = cudaMemcpyAsync(temp_index,
+                                            data.dptr_,
+                                            max_seq_len * sizeof(DType),
+                                            cudaMemcpyDeviceToHost,
+                                            data.stream_->stream_);
   CHECK_EQ(cuda_status, cudaSuccess) << "cuda memcpy label error";
   for (size_t i = 0; i < max_seq_len; ++i) {
     (*index_vec)[i] = static_cast<RType>(std::lround(temp_index[i]));
@@ -52,11 +53,11 @@ inline IndexTensorToVector(mshadow::Tensor<gpu, 1, DType> data,
 #endif
 }
 template <typename DType, typename RType>
-typename std::enable_if<std::is_integral<RType>::value>::type
-inline IndexTensorToVector(mshadow::Tensor<cpu, 1, DType> data,
-                           std::vector<RType> *index_vec) {
-  int max_seq_len = data.shape_.Size();
-  DType *index_array = static_cast<DType *>(data.dptr_);
+typename std::enable_if<std::is_integral<RType>::value>::type inline IndexTensorToVector(
+    mshadow::Tensor<cpu, 1, DType> data,
+    std::vector<RType>* index_vec) {
+  int max_seq_len    = data.shape_.Size();
+  DType* index_array = static_cast<DType*>(data.dptr_);
   for (int i = 0; i < max_seq_len; ++i)
     (*index_vec)[i] = static_cast<RType>(std::lround(index_array[i]));
 }
diff --git a/src/operator/sequence_reverse-inl.h b/src/operator/sequence_reverse-inl.h
index e19e643744b8..fe209212b5eb 100644
--- a/src/operator/sequence_reverse-inl.h
+++ b/src/operator/sequence_reverse-inl.h
@@ -23,7 +23,7 @@
  * \brief
  * \author Sebastian Bodenstien
  * \author Marek Kolodziej
-*/
+ */
 
 #ifndef MXNET_OPERATOR_SEQUENCE_REVERSE_INL_H_
 #define MXNET_OPERATOR_SEQUENCE_REVERSE_INL_H_
@@ -47,7 +47,7 @@ namespace op {
 namespace seq_reverse {
 enum SequenceReverseOpInputs { kData, kSequenceLength };
 enum SequenceReverseOpOutputs { kOut };
-}
+}  // namespace seq_reverse
 
 struct SequenceReverseParam : public dmlc::Parameter<SequenceReverseParam> {
   bool use_sequence_length;
@@ -67,32 +67,30 @@ struct SequenceReverseParam : public dmlc::Parameter<SequenceReverseParam> {
 template <OpReqType req>
 struct ReverseKernel {
   template <typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(const index_t i, DType *const out_data,
-                                  const DType *const in_data,
+  MSHADOW_XINLINE static void Map(const index_t i,
+                                  DType* const out_data,
+                                  const DType* const in_data,
                                   const index_t max_seq_len,
                                   const index_t batch_size,
-                                  const index_t other_dim, const index_t numel,
-                                  const IType *const indices) {
-    const index_t batch = i / (max_seq_len * other_dim);
-    const index_t id = (i / other_dim) % max_seq_len;
-    const index_t j = i % other_dim;
-    const index_t num_seq =
-        indices ? static_cast<index_t>(indices[batch]) : max_seq_len;
+                                  const index_t other_dim,
+                                  const index_t numel,
+                                  const IType* const indices) {
+    const index_t batch          = i / (max_seq_len * other_dim);
+    const index_t id             = (i / other_dim) % max_seq_len;
+    const index_t j              = i % other_dim;
+    const index_t num_seq        = indices ? static_cast<index_t>(indices[batch]) : max_seq_len;
     const index_t padded_periods = max_seq_len - num_seq;
     // padded part
     if (padded_periods > 0 && id < padded_periods) {
-      const index_t padded_in_offset =
-          (id + num_seq) * batch_size * other_dim + batch * other_dim;
+      const index_t padded_in_offset = (id + num_seq) * batch_size * other_dim + batch * other_dim;
 
-      KERNEL_ASSIGN(out_data[padded_in_offset + j], req,
-                    in_data[padded_in_offset + j]);
+      KERNEL_ASSIGN(out_data[padded_in_offset + j], req, in_data[padded_in_offset + j]);
     }
     // unpadded part
     if (id < num_seq) {
       const index_t in_offset = id * batch_size * other_dim + batch * other_dim;
       const index_t out_offset =
-          numel - (id + 1 + padded_periods) * batch_size * other_dim +
-          batch * other_dim;
+          numel - (id + 1 + padded_periods) * batch_size * other_dim + batch * other_dim;
 
       KERNEL_ASSIGN(out_data[out_offset + j], req, in_data[in_offset + j]);
     }
@@ -102,40 +100,50 @@ struct ReverseKernel {
 template <typename xpu, typename DType, typename IType>
 class SequenceReverseOp : public Operator {
  public:
-  explicit SequenceReverseOp(SequenceReverseParam p) { this->param_ = p; }
-  void sequence_reverse(const mshadow::Tensor<xpu, 3, DType> &data,
-                        const mshadow::Tensor<xpu, 3, DType> &out,
-                        const OpReqType req, const IType *const indices,
-                        mshadow::Stream<xpu> *const s) {
+  explicit SequenceReverseOp(SequenceReverseParam p) {
+    this->param_ = p;
+  }
+  void sequence_reverse(const mshadow::Tensor<xpu, 3, DType>& data,
+                        const mshadow::Tensor<xpu, 3, DType>& out,
+                        const OpReqType req,
+                        const IType* const indices,
+                        mshadow::Stream<xpu>* const s) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
-    const index_t max_seq_len = data.size(0);
-    const index_t batch_size = data.size(1);
-    const index_t other_dim = data.size(2);
+    const index_t max_seq_len  = data.size(0);
+    const index_t batch_size   = data.size(1);
+    const index_t other_dim    = data.size(2);
     const index_t tensor_numel = data.shape_.Size();
 
     MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-      mxnet_op::Kernel<ReverseKernel<req_type>, xpu>::Launch(
-          s, max_seq_len * batch_size * other_dim, out.dptr_, data.dptr_,
-          max_seq_len, batch_size, other_dim, tensor_numel, indices);
+      mxnet_op::Kernel<ReverseKernel<req_type>, xpu>::Launch(s,
+                                                             max_seq_len * batch_size * other_dim,
+                                                             out.dptr_,
+                                                             data.dptr_,
+                                                             max_seq_len,
+                                                             batch_size,
+                                                             other_dim,
+                                                             tensor_numel,
+                                                             indices);
     });
   }
 
-  virtual void Forward(const OpContext &ctx, const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), param_.use_sequence_length ? 2U : 1U);
     CHECK_EQ(out_data.size(), 1U);
-    Stream<xpu> *const s = ctx.get_stream<xpu>();
+    Stream<xpu>* const s = ctx.get_stream<xpu>();
 
     // Get any size input + output into required form
     auto max_seq_len = in_data[seq_reverse::kData].size(0);
-    auto n = in_data[seq_reverse::kData].size(1);
-    auto total_size = in_data[seq_reverse::kData].Size();
+    auto n           = in_data[seq_reverse::kData].size(1);
+    auto total_size  = in_data[seq_reverse::kData].Size();
 
     if (total_size == 0) {
       return;  // noop if any input dimension is zero-sized, out_data is of a right shape
@@ -143,38 +151,34 @@ class SequenceReverseOp : public Operator {
 
     auto rest_dim = static_cast<int>(total_size / n / max_seq_len);
 
-    Shape<3> s3 = Shape3(max_seq_len, n, rest_dim);
-    Tensor<xpu, 3, DType> data =
-        in_data[seq_reverse::kData].get_with_shape<xpu, 3, DType>(s3, s);
-    Tensor<xpu, 3, DType> out =
-        out_data[seq_reverse::kOut].get_with_shape<xpu, 3, DType>(s3, s);
+    Shape<3> s3                = Shape3(max_seq_len, n, rest_dim);
+    Tensor<xpu, 3, DType> data = in_data[seq_reverse::kData].get_with_shape<xpu, 3, DType>(s3, s);
+    Tensor<xpu, 3, DType> out  = out_data[seq_reverse::kOut].get_with_shape<xpu, 3, DType>(s3, s);
 
-    const IType *const indices =
-        param_.use_sequence_length
-            ? in_data[seq_reverse::kSequenceLength].dptr<IType>()
-            : nullptr;
+    const IType* const indices =
+        param_.use_sequence_length ? in_data[seq_reverse::kSequenceLength].dptr<IType>() : nullptr;
 
     sequence_reverse(data, out, req[seq_reverse::kOut], indices, s);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_EQ(in_data.size(), param_.use_sequence_length ? 2U : 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     // Get any size input + output into required form
     auto max_seq_len = in_grad[seq_reverse::kData].size(0);
-    auto n = in_grad[seq_reverse::kData].size(1);
-    auto total_size = in_grad[seq_reverse::kData].Size();
-    auto rest_dim = static_cast<int>(total_size / n / max_seq_len);
+    auto n           = in_grad[seq_reverse::kData].size(1);
+    auto total_size  = in_grad[seq_reverse::kData].Size();
+    auto rest_dim    = static_cast<int>(total_size / n / max_seq_len);
 
     Shape<3> s3 = Shape3(max_seq_len, n, rest_dim);
 
@@ -183,13 +187,10 @@ class SequenceReverseOp : public Operator {
     Tensor<xpu, 3, DType> output_grad =
         out_grad[seq_reverse::kOut].get_with_shape<xpu, 3, DType>(s3, s);
 
-    const IType *const indices =
-        param_.use_sequence_length
-            ? in_data[seq_reverse::kSequenceLength].dptr<IType>()
-            : nullptr;
+    const IType* const indices =
+        param_.use_sequence_length ? in_data[seq_reverse::kSequenceLength].dptr<IType>() : nullptr;
 
-    sequence_reverse(output_grad, data_grad, req[seq_reverse::kData], indices,
-                     s);
+    sequence_reverse(output_grad, data_grad, req[seq_reverse::kData], indices, s);
   }
 
  private:
@@ -197,14 +198,18 @@ class SequenceReverseOp : public Operator {
 };  // class SequenceReverseOp
 
 template <typename xpu>
-Operator *CreateOp(SequenceReverseParam param, int dtype, int itype);
+Operator* CreateOp(SequenceReverseParam param, int dtype, int itype);
 
 #if DMLC_USE_CXX11
 class SequenceReverseProp : public OperatorProperty {
  public:
-  int NumVisibleOutputs() const override { return 1; }
+  int NumVisibleOutputs() const override {
+    return 1;
+  }
 
-  int NumOutputs() const override { return 1; }
+  int NumOutputs() const override {
+    return 1;
+  }
 
   std::vector<std::string> ListArguments() const override {
     if (param_.use_sequence_length)
@@ -213,10 +218,11 @@ class SequenceReverseProp : public OperatorProperty {
       return {"data"};
   }
 
-  std::vector<std::string> ListOutputs() const override { return {"output"}; }
+  std::vector<std::string> ListOutputs() const override {
+    return {"output"};
+  }
 
-  void Init(const std::vector<std::pair<std::string, std::string> > &kwargs)
-      override {
+  void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     param_.Init(kwargs);
   }
 
@@ -224,29 +230,29 @@ class SequenceReverseProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape, mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), param_.use_sequence_length ? 2U : 1U)
         << "Input:[data, sequence_length]";
     CHECK_EQ(param_.axis, 0) << "Current implementation expects axis to be 0.";
 
-    const mxnet::TShape &dshape = (*in_shape)[seq_reverse::kData];
-    CHECK_GT(dshape.ndim(), 1U)
-        << "The data array must be of rank 2 or greater.";
+    const mxnet::TShape& dshape = (*in_shape)[seq_reverse::kData];
+    CHECK_GT(dshape.ndim(), 1U) << "The data array must be of rank 2 or greater.";
     // seq length vector is same as batch size
     if (param_.use_sequence_length)
-      SHAPE_ASSIGN_CHECK(*in_shape, seq_reverse::kSequenceLength,
-                         Shape1(dshape[1]));
+      SHAPE_ASSIGN_CHECK(*in_shape, seq_reverse::kSequenceLength, Shape1(dshape[1]));
 
-    const mxnet::TShape &oshape = dshape;
+    const mxnet::TShape& oshape = dshape;
     out_shape->clear();
     out_shape->push_back(oshape);
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type, std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), param_.use_sequence_length ? 2U : 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -260,36 +266,37 @@ class SequenceReverseProp : public OperatorProperty {
     return true;
   }
 
-  OperatorProperty *Copy() const override {
-    auto ptr = new SequenceReverseProp();
+  OperatorProperty* Copy() const override {
+    auto ptr    = new SequenceReverseProp();
     ptr->param_ = param_;
     return ptr;
   }
 
-  std::string TypeString() const override { return "SequenceReverse"; }
+  std::string TypeString() const override {
+    return "SequenceReverse";
+  }
 
-  std::vector<int> DeclareBackwardDependency(
-      const std::vector<int> &out_grad, const std::vector<int> &in_data,
-      const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (param_.use_sequence_length)
-      return {out_grad[seq_reverse::kOut],
-              in_data[seq_reverse::kSequenceLength]};
+      return {out_grad[seq_reverse::kOut], in_data[seq_reverse::kSequenceLength]};
     else
       return {out_grad[seq_reverse::kOut]};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  Operator *CreateOperator(Context ctx) const override {
+  Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator *CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   SequenceReverseParam param_;
diff --git a/src/operator/sequence_reverse.cc b/src/operator/sequence_reverse.cc
index 591c9bae049b..359b8a680773 100644
--- a/src/operator/sequence_reverse.cc
+++ b/src/operator/sequence_reverse.cc
@@ -22,27 +22,24 @@
  * \file sequence_reverse.cc
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 #include "./sequence_reverse-inl.h"
 
 namespace mxnet {
 namespace op {
 template <>
-Operator *CreateOp<cpu>(SequenceReverseParam param, int dtype, int itype) {
-  Operator *op = nullptr;
+Operator* CreateOp<cpu>(SequenceReverseParam param, int dtype, int itype) {
+  Operator* op = nullptr;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
-      MSHADOW_TYPE_SWITCH(itype, IType, {
-          op = new SequenceReverseOp<cpu, DType, IType>(param);
-        });
-    });
+    MSHADOW_TYPE_SWITCH(itype, IType, { op = new SequenceReverseOp<cpu, DType, IType>(param); });
+  });
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *SequenceReverseProp::CreateOperatorEx(
-    Context ctx, mxnet::ShapeVector *in_shape,
-    std::vector<int> *in_type) const {
-
+Operator* SequenceReverseProp::CreateOperatorEx(Context ctx,
+                                                mxnet::ShapeVector* in_shape,
+                                                std::vector<int>* in_type) const {
   if (in_type->size() >= 2 && (*in_type)[1] != -1) {
     DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0], (*in_type)[1]);
   }
@@ -120,15 +117,16 @@ Example::
                       [  4.,   5.,   6.]]]
 
 )code" ADD_FILELINE)
-    .add_argument("data", "NDArray-or-Symbol",
+    .add_argument("data",
+                  "NDArray-or-Symbol",
                   "n-dimensional input array of the form [max_sequence_length,"
                   " batch_size, other dims] where n>2 ")
-    .add_argument("sequence_length", "NDArray-or-Symbol",
+    .add_argument("sequence_length",
+                  "NDArray-or-Symbol",
                   "vector of sequence lengths of the form [batch_size]")
     .add_arguments(SequenceReverseParam::__FIELDS__());
 
-NNVM_REGISTER_OP(SequenceReverse)
-.add_alias("_npx_sequence_reverse");
+NNVM_REGISTER_OP(SequenceReverse).add_alias("_npx_sequence_reverse");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/sequence_reverse.cu b/src/operator/sequence_reverse.cu
index db5b416b32d7..c05be4ee62ff 100644
--- a/src/operator/sequence_reverse.cu
+++ b/src/operator/sequence_reverse.cu
@@ -22,19 +22,18 @@
  * \file sequence_reverse.cu
  * \brief
  * \author Sebastian Bodenstein
-*/
+ */
 
 #include "./sequence_reverse-inl.h"
 
 namespace mxnet {
 namespace op {
-template <> Operator *CreateOp<gpu>(SequenceReverseParam param, int dtype, int itype) {
-  Operator *op = nullptr;
+template <>
+Operator* CreateOp<gpu>(SequenceReverseParam param, int dtype, int itype) {
+  Operator* op = nullptr;
   MSHADOW_TYPE_SWITCH(dtype, DType, {
-      MSHADOW_TYPE_SWITCH(itype, IType, {
-          op = new SequenceReverseOp<gpu, DType, IType>(param);
-        });
-    });
+    MSHADOW_TYPE_SWITCH(itype, IType, { op = new SequenceReverseOp<gpu, DType, IType>(param); });
+  });
   return op;
 }
 
diff --git a/src/operator/slice_channel-inl.h b/src/operator/slice_channel-inl.h
index 6f2aa2f4d17c..9f434395d352 100644
--- a/src/operator/slice_channel-inl.h
+++ b/src/operator/slice_channel-inl.h
@@ -22,7 +22,7 @@
  * \file slice_channel-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_SLICE_CHANNEL_INL_H_
 #define MXNET_OPERATOR_SLICE_CHANNEL_INL_H_
 
@@ -42,7 +42,7 @@ namespace mxnet {
 namespace op {
 
 namespace slice_enum {
-enum SliceChannelOpInputs {kData};
+enum SliceChannelOpInputs { kData };
 }  // namespace slice_enum
 
 struct SliceChannelParam : public dmlc::Parameter<SliceChannelParam> {
@@ -50,35 +50,37 @@ struct SliceChannelParam : public dmlc::Parameter<SliceChannelParam> {
   int axis;
   bool squeeze_axis;
   DMLC_DECLARE_PARAMETER(SliceChannelParam) {
-    DMLC_DECLARE_FIELD(num_outputs).set_lower_bound(1)
-    .describe("Number of splits. Note that this should evenly divide the length of the `axis`.");
-    DMLC_DECLARE_FIELD(axis).set_default(1)
-    .describe("Axis along which to split.");
-    DMLC_DECLARE_FIELD(squeeze_axis).set_default(0)
-    .describe("If true, Removes the axis with length 1 from the shapes of the output arrays."
-              " **Note** that setting `squeeze_axis` to ``true`` removes axis with length 1"
-              " only along the `axis` which it is split."
-              " Also `squeeze_axis` can be set to ``true``"
-              " only if ``input.shape[axis] == num_outputs``.");
+    DMLC_DECLARE_FIELD(num_outputs)
+        .set_lower_bound(1)
+        .describe(
+            "Number of splits. Note that this should evenly divide the length of the `axis`.");
+    DMLC_DECLARE_FIELD(axis).set_default(1).describe("Axis along which to split.");
+    DMLC_DECLARE_FIELD(squeeze_axis)
+        .set_default(0)
+        .describe(
+            "If true, Removes the axis with length 1 from the shapes of the output arrays."
+            " **Note** that setting `squeeze_axis` to ``true`` removes axis with length 1"
+            " only along the `axis` which it is split."
+            " Also `squeeze_axis` can be set to ``true``"
+            " only if ``input.shape[axis] == num_outputs``.");
   }
 };  // struct SliceChannelParam
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class SliceChannelOp : public Operator {
  public:
-  explicit SliceChannelOp(SliceChannelParam param)
-    : size_(param.num_outputs), axis_(param.axis) {}
+  explicit SliceChannelOp(SliceChannelParam param) : size_(param.num_outputs), axis_(param.axis) {}
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 1U);
     CHECK_EQ(out_data.size(), static_cast<size_t>(size_));
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     size_t leading = 1, trailing = 1;
     int real_axis = axis_;
     if (real_axis < 0) {
@@ -92,10 +94,10 @@ class SliceChannelOp : public Operator {
     for (int i = real_axis + 1; i < in_data[slice_enum::kData].ndim(); ++i) {
       trailing *= in_data[slice_enum::kData].shape_[i];
     }
-    Shape<3> dshape = Shape3(leading, mid, trailing);
+    Shape<3> dshape      = Shape3(leading, mid, trailing);
     Shape<3> slice_shape = Shape3(leading, mid / size_, trailing);
-    Tensor<xpu, 3, DType> data = in_data[slice_enum::kData].get_with_shape<xpu, 3, DType>(
-        dshape, s);
+    Tensor<xpu, 3, DType> data =
+        in_data[slice_enum::kData].get_with_shape<xpu, 3, DType>(dshape, s);
     std::vector<Tensor<xpu, 3, DType> > outputs(size_);
     for (int i = 0; i < size_; ++i) {
       outputs[i] = out_data[i].get_with_shape<xpu, 3, DType>(slice_shape, s);
@@ -103,22 +105,22 @@ class SliceChannelOp : public Operator {
     Split(data, &outputs, 1, req);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_states) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_states) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(out_grad.size(), static_cast<size_t>(size_));
     CHECK_EQ(in_grad.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     size_t leading = 1, trailing = 1;
     int real_axis = axis_;
     if (real_axis < 0) {
-        real_axis += in_grad[slice_enum::kData].ndim();
+      real_axis += in_grad[slice_enum::kData].ndim();
     }
     CHECK_LT(real_axis, in_grad[slice_enum::kData].ndim());
     size_t mid = in_grad[slice_enum::kData].shape_[real_axis];
@@ -128,10 +130,10 @@ class SliceChannelOp : public Operator {
     for (int i = real_axis + 1; i < in_grad[slice_enum::kData].ndim(); ++i) {
       trailing *= in_grad[slice_enum::kData].shape_[i];
     }
-    Shape<3> dshape = Shape3(leading, mid, trailing);
+    Shape<3> dshape      = Shape3(leading, mid, trailing);
     Shape<3> slice_shape = Shape3(leading, mid / size_, trailing);
-    Tensor<xpu, 3, DType> grad = in_grad[slice_enum::kData].get_with_shape<xpu, 3, DType>(
-        dshape, s);
+    Tensor<xpu, 3, DType> grad =
+        in_grad[slice_enum::kData].get_with_shape<xpu, 3, DType>(dshape, s);
     std::vector<Tensor<xpu, 3, DType> > grad_out(size_);
     for (int i = 0; i < size_; ++i) {
       grad_out[i] = out_grad[i].get_with_shape<xpu, 3, DType>(slice_shape, s);
@@ -144,10 +146,8 @@ class SliceChannelOp : public Operator {
   int axis_;
 };  // class SliceChannelOp
 
-
-template<typename xpu>
-Operator *CreateOp(SliceChannelParam param, int dtype);
-
+template <typename xpu>
+Operator* CreateOp(SliceChannelParam param, int dtype);
 
 #if DMLC_USE_CXX11
 class SliceChannelProp : public OperatorProperty {
@@ -174,23 +174,23 @@ class SliceChannelProp : public OperatorProperty {
     return param_.num_outputs;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     std::string node_name = "slice_channel_node";
-    return ElemwiseAttrHelper<int, type_is_none,
-                              type_assign, true,
-                              type_string, 1>(node_name, in_type, out_type, -1);
+    return ElemwiseAttrHelper<int, type_is_none, type_assign, true, type_string, 1>(
+        node_name, in_type, out_type, -1);
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 1U);
     mxnet::TShape dshape = in_shape->at(slice_enum::kData);
     mxnet::TShape ishape = in_shape->at(slice_enum::kData);
-    if (!mxnet::ndim_is_known(dshape)) return false;
+    if (!mxnet::ndim_is_known(dshape))
+      return false;
     if (param_.axis >= 0) {
       CHECK_LT(param_.axis, dshape.ndim());
     } else {
@@ -201,30 +201,28 @@ class SliceChannelProp : public OperatorProperty {
       real_axis += dshape.ndim();
     }
     CHECK_EQ(dshape[real_axis] % param_.num_outputs, 0U)
-      << "You are trying to split the " << real_axis
-      << "-th axis of input tensor with shape " << dshape
-      << " into num_outputs=" << param_.num_outputs
-      << " evenly sized chunks, but this is not possible because "
-      << param_.num_outputs << " does not evenly divide "
-      << dshape[real_axis];
+        << "You are trying to split the " << real_axis << "-th axis of input tensor with shape "
+        << dshape << " into num_outputs=" << param_.num_outputs
+        << " evenly sized chunks, but this is not possible because " << param_.num_outputs
+        << " does not evenly divide " << dshape[real_axis];
     if (param_.squeeze_axis && ishape[real_axis] != -1) {
       CHECK_EQ(ishape[real_axis], param_.num_outputs)
-        << "If squeeze axis is True, the size of the sliced axis must be the same as num_outputs."
-        << " Input shape=" << ishape << ", axis=" << real_axis
-        << ", num_outputs=" << param_.num_outputs << ".";
+          << "If squeeze axis is True, the size of the sliced axis must be the same as num_outputs."
+          << " Input shape=" << ishape << ", axis=" << real_axis
+          << ", num_outputs=" << param_.num_outputs << ".";
     }
     if (dshape[real_axis] >= 0) {
       dshape[real_axis] /= param_.num_outputs;
     }
-    if (param_.squeeze_axis && (dshape[real_axis] == 1
-        || !mxnet::dim_size_is_known(ishape, real_axis))) {
+    if (param_.squeeze_axis &&
+        (dshape[real_axis] == 1 || !mxnet::dim_size_is_known(ishape, real_axis))) {
       for (int d = real_axis; d < dshape.ndim() - 1; ++d) {
-        dshape[d] = dshape[d+1];
+        dshape[d] = dshape[d + 1];
       }
-      dshape = mxnet::TShape(&dshape[0], &dshape[dshape.ndim()-1]);
+      dshape = mxnet::TShape(&dshape[0], &dshape[dshape.ndim() - 1]);
     }
     CHECK_EQ(static_cast<int>((*out_shape).size()), param_.num_outputs)
-      << "Size of output shape mismatch!";
+        << "Size of output shape mismatch!";
     for (int i = 0; i < param_.num_outputs; ++i) {
       SHAPE_ASSIGN_CHECK(*out_shape, i, dshape);
       // Perform incomplete shape inference.
@@ -252,7 +250,7 @@ class SliceChannelProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SliceChannelProp();
+    auto ptr    = new SliceChannelProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -261,10 +259,9 @@ class SliceChannelProp : public OperatorProperty {
     return "SliceChannel";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return out_grad;
   }
 
@@ -273,12 +270,13 @@ class SliceChannelProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   SliceChannelParam param_;
-};  // class SliceChannelProp
+};      // class SliceChannelProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/slice_channel.cc b/src/operator/slice_channel.cc
index a8e7a36b9eba..9f501ba73bbb 100644
--- a/src/operator/slice_channel.cc
+++ b/src/operator/slice_channel.cc
@@ -22,18 +22,16 @@
  * \file slice_channel.cc
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./slice_channel-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<cpu>(SliceChannelParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_TYPE_SWITCH(dtype, DType, {
-    op = new SliceChannelOp<cpu, DType>(param);
-  })
+  MSHADOW_TYPE_SWITCH(dtype, DType, { op = new SliceChannelOp<cpu, DType>(param); })
   return op;
 }
 
@@ -46,7 +44,7 @@ Operator* SliceChannelProp::CreateOperatorEx(Context ctx,
 DMLC_REGISTER_PARAMETER(SliceChannelParam);
 
 MXNET_REGISTER_OP_PROPERTY(SliceChannel, SliceChannelProp)
-.describe(R"code(Splits an array along a particular axis into multiple sub-arrays.
+    .describe(R"code(Splits an array along a particular axis into multiple sub-arrays.
 
 .. note:: ``SliceChannel`` is deprecated. Use ``split`` instead.
 
@@ -105,13 +103,11 @@ Example::
    z[0].shape = (2 ,1 )
 
 )code" ADD_FILELINE)
-.set_return_type("NDArray-or-Symbol[]")
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(SliceChannelParam::__FIELDS__());
+    .set_return_type("NDArray-or-Symbol[]")
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(SliceChannelParam::__FIELDS__());
 
-NNVM_REGISTER_OP(SliceChannel)
-.add_alias("split")
-.add_alias("_npx_slice_channel");
+NNVM_REGISTER_OP(SliceChannel).add_alias("split").add_alias("_npx_slice_channel");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/slice_channel.cu b/src/operator/slice_channel.cu
index bc5ca52c2a90..8f72aa5faf9b 100644
--- a/src/operator/slice_channel.cu
+++ b/src/operator/slice_channel.cu
@@ -22,21 +22,18 @@
  * \file slice_channel.cc
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./slice_channel-inl.h"
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(SliceChannelParam param, int dtype) {
   Operator* op = nullptr;
-  MSHADOW_TYPE_SWITCH(dtype, DType, {
-    op = new SliceChannelOp<gpu, DType>(param);
-  })
+  MSHADOW_TYPE_SWITCH(dtype, DType, { op = new SliceChannelOp<gpu, DType>(param); })
   return op;
 }
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/softmax_output-inl.h b/src/operator/softmax_output-inl.h
index 22a1e5ff011c..161c10ac999f 100644
--- a/src/operator/softmax_output-inl.h
+++ b/src/operator/softmax_output-inl.h
@@ -22,7 +22,7 @@
  * \file softmax_output-inl.h
  * \brief
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_SOFTMAX_OUTPUT_INL_H_
 #define MXNET_OPERATOR_SOFTMAX_OUTPUT_INL_H_
 
@@ -40,10 +40,10 @@ namespace mxnet {
 namespace op {
 
 namespace softmaxout_enum {
-enum SoftmaxOutputOpInputs {kData, kLabel};
-enum SoftmaxOutputOpOutputs {kOut};
-enum SoftmaxOutputNormType {kNull, kBatch, kValid};
-enum SoftmaxOutputOpResource {kTempSpace};
+enum SoftmaxOutputOpInputs { kData, kLabel };
+enum SoftmaxOutputOpOutputs { kOut };
+enum SoftmaxOutputNormType { kNull, kBatch, kValid };
+enum SoftmaxOutputOpResource { kTempSpace };
 }  // namespace softmaxout_enum
 
 struct SoftmaxOutputParam : public dmlc::Parameter<SoftmaxOutputParam> {
@@ -56,70 +56,77 @@ struct SoftmaxOutputParam : public dmlc::Parameter<SoftmaxOutputParam> {
   bool out_grad;
   float smooth_alpha;
   DMLC_DECLARE_PARAMETER(SoftmaxOutputParam) {
-    DMLC_DECLARE_FIELD(grad_scale).set_default(1.0f)
-    .describe("Scales the gradient by a float factor.");
-    DMLC_DECLARE_FIELD(ignore_label).set_default(-1.0f)
-    .describe("The instances whose `labels` == `ignore_label` will be ignored "
-              "during backward, if `use_ignore` is set to ``true``).");
-    DMLC_DECLARE_FIELD(multi_output).set_default(false)
-    .describe("If set to ``true``, the softmax function will be computed along "
-              "axis ``1``. This is applied when the shape "
-              "of input array differs from the shape of label array.");
-    DMLC_DECLARE_FIELD(use_ignore).set_default(false)
-    .describe("If set to ``true``, the `ignore_label` value will not contribute "
-              "to the backward gradient.");
-    DMLC_DECLARE_FIELD(preserve_shape).set_default(false)
-    .describe("If set to ``true``, the softmax function will be computed along "
-              "the last axis (``-1``).");
+    DMLC_DECLARE_FIELD(grad_scale)
+        .set_default(1.0f)
+        .describe("Scales the gradient by a float factor.");
+    DMLC_DECLARE_FIELD(ignore_label)
+        .set_default(-1.0f)
+        .describe(
+            "The instances whose `labels` == `ignore_label` will be ignored "
+            "during backward, if `use_ignore` is set to ``true``).");
+    DMLC_DECLARE_FIELD(multi_output)
+        .set_default(false)
+        .describe(
+            "If set to ``true``, the softmax function will be computed along "
+            "axis ``1``. This is applied when the shape "
+            "of input array differs from the shape of label array.");
+    DMLC_DECLARE_FIELD(use_ignore)
+        .set_default(false)
+        .describe(
+            "If set to ``true``, the `ignore_label` value will not contribute "
+            "to the backward gradient.");
+    DMLC_DECLARE_FIELD(preserve_shape)
+        .set_default(false)
+        .describe(
+            "If set to ``true``, the softmax function will be computed along "
+            "the last axis (``-1``).");
     DMLC_DECLARE_FIELD(normalization)
-    .add_enum("null", softmaxout_enum::kNull)
-    .add_enum("batch", softmaxout_enum::kBatch)
-    .add_enum("valid", softmaxout_enum::kValid)
-    .set_default(softmaxout_enum::kNull)
-    .describe("Normalizes the gradient.");
-    DMLC_DECLARE_FIELD(out_grad)
-    .set_default(false)
-    .describe("Multiplies gradient with output gradient element-wise.");
+        .add_enum("null", softmaxout_enum::kNull)
+        .add_enum("batch", softmaxout_enum::kBatch)
+        .add_enum("valid", softmaxout_enum::kValid)
+        .set_default(softmaxout_enum::kNull)
+        .describe("Normalizes the gradient.");
+    DMLC_DECLARE_FIELD(out_grad).set_default(false).describe(
+        "Multiplies gradient with output gradient element-wise.");
     DMLC_DECLARE_FIELD(smooth_alpha)
-    .set_default(0.0f)
-    .set_range(0.0f, 1.0f)
-    .describe("Constant for computing a label smoothed version of cross-entropy"
-              "for the backwards pass.  This constant gets subtracted from the"
-              "one-hot encoding of the gold label and distributed uniformly to"
-              "all other labels.");
+        .set_default(0.0f)
+        .set_range(0.0f, 1.0f)
+        .describe(
+            "Constant for computing a label smoothed version of cross-entropy"
+            "for the backwards pass.  This constant gets subtracted from the"
+            "one-hot encoding of the gold label and distributed uniformly to"
+            "all other labels.");
   };
 
   bool operator==(const SoftmaxOutputParam& other) const {
-    return this->grad_scale == other.grad_scale &&
-           this->ignore_label == other.ignore_label &&
-           this->multi_output == other.multi_output &&
-           this->use_ignore == other.use_ignore &&
+    return this->grad_scale == other.grad_scale && this->ignore_label == other.ignore_label &&
+           this->multi_output == other.multi_output && this->use_ignore == other.use_ignore &&
            this->preserve_shape == other.preserve_shape &&
-           this->normalization == other.normalization &&
-           this->out_grad == other.out_grad &&
+           this->normalization == other.normalization && this->out_grad == other.out_grad &&
            this->smooth_alpha == other.smooth_alpha;
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class SoftmaxOutputOp : public Operator {
  public:
   explicit SoftmaxOutputOp(SoftmaxOutputParam param) : param_(param) {}
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U) << "SoftmaxOutput Input: [data, label]";
     CHECK_EQ(out_data.size(), 1U) << "SoftmaxOutput Output: [output]";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     if (param_.multi_output) {
       index_t n = in_data[softmaxout_enum::kData].size(0);
       index_t k = in_data[softmaxout_enum::kData].size(1);
-      Shape<3> s3 = Shape3(n, k, static_cast<index_t>(in_data[softmaxout_enum::kData].Size()/n/k));
+      Shape<3> s3 =
+          Shape3(n, k, static_cast<index_t>(in_data[softmaxout_enum::kData].Size() / n / k));
       Tensor<xpu, 3, DType> data =
           in_data[softmaxout_enum::kData].get_with_shape<xpu, 3, DType>(s3, s);
       Tensor<xpu, 3, DType> out =
@@ -128,11 +135,11 @@ class SoftmaxOutputOp : public Operator {
     } else {
       if (param_.preserve_shape) {
         Tensor<xpu, 2, DType> data = in_data[softmaxout_enum::kData].FlatTo2D<xpu, DType>(s);
-        Tensor<xpu, 2, DType> out = out_data[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s);
+        Tensor<xpu, 2, DType> out  = out_data[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s);
         Softmax(out, data);
       } else {
-        index_t n = in_data[softmaxout_enum::kData].size(0);
-        index_t k = in_data[softmaxout_enum::kData].Size()/n;
+        index_t n   = in_data[softmaxout_enum::kData].size(0);
+        index_t k   = in_data[softmaxout_enum::kData].Size() / n;
         Shape<2> s2 = Shape2(n, k);
         Tensor<xpu, 2, DType> data =
             in_data[softmaxout_enum::kData].get_with_shape<xpu, 2, DType>(s2, s);
@@ -143,37 +150,37 @@ class SoftmaxOutputOp : public Operator {
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_GE(in_grad.size(), 1U);
     CHECK_GE(req.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
-    if (out_data[softmaxout_enum::kOut].shape_ ==
-        in_data[softmaxout_enum::kLabel].shape_) {
+    if (out_data[softmaxout_enum::kOut].shape_ == in_data[softmaxout_enum::kLabel].shape_) {
       // use probability as label
       Tensor<xpu, 2, DType> label = in_data[softmaxout_enum::kLabel].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> out = out_data[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s);
-      Tensor<xpu, 2, DType> grad = in_grad[softmaxout_enum::kData].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> out   = out_data[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s);
+      Tensor<xpu, 2, DType> grad  = in_grad[softmaxout_enum::kData].FlatTo2D<xpu, DType>(s);
       if (param_.out_grad) {
         Tensor<xpu, 2, DType> ograd = out_grad[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s);
-        grad = scalar<DType>(param_.grad_scale) * (out - label) * ograd;
+        grad                        = scalar<DType>(param_.grad_scale) * (out - label) * ograd;
       } else {
         grad = (out - label) * scalar<DType>(param_.grad_scale);
       }
     } else if (param_.multi_output) {
       index_t n = out_data[softmaxout_enum::kOut].size(0);
       index_t k = out_data[softmaxout_enum::kOut].size(1);
-      Shape<3> s3 = Shape3(n, k, static_cast<index_t>(out_data[softmaxout_enum::kOut].Size()/n/k));
+      Shape<3> s3 =
+          Shape3(n, k, static_cast<index_t>(out_data[softmaxout_enum::kOut].Size() / n / k));
       Shape<2> s2 = Shape2(s3[0], s3[2]);
       Tensor<xpu, 2, DType> label =
           in_data[softmaxout_enum::kLabel].get_with_shape<xpu, 2, DType>(s2, s);
@@ -184,17 +191,16 @@ class SoftmaxOutputOp : public Operator {
 
       index_t valid_cnt = label.shape_.Size();
       if (param_.use_ignore) {
-          SoftmaxGrad(grad, out, label, static_cast<DType>(param_.ignore_label));
+        SoftmaxGrad(grad, out, label, static_cast<DType>(param_.ignore_label));
       } else {
-          SoftmaxGrad(grad, out, label);
+        SoftmaxGrad(grad, out, label);
       }
       if (param_.normalization == softmaxout_enum::kBatch) {
         valid_cnt = label.size(0);
       } else if (param_.normalization == softmaxout_enum::kValid) {
         int i_label = static_cast<int>(param_.ignore_label);
         Tensor<cpu, 2, DType> workspace =
-          ctx.requested[softmaxout_enum::kTempSpace].get_host_space_typed<2, DType>(
-          label.shape_);
+            ctx.requested[softmaxout_enum::kTempSpace].get_host_space_typed<2, DType>(label.shape_);
         Copy(workspace, label, label.stream_);
         for (index_t i = 0; i < workspace.size(0); ++i) {
           for (index_t j = 0; j < workspace.size(1); ++j) {
@@ -208,11 +214,10 @@ class SoftmaxOutputOp : public Operator {
         valid_cnt = 1;
       }
       grad *= DType(param_.grad_scale /
-                    (param_.normalization == softmaxout_enum::kValid ? 1 : s3[2]) /
-                    valid_cnt);
+                    (param_.normalization == softmaxout_enum::kValid ? 1 : s3[2]) / valid_cnt);
       if (param_.out_grad) {
         Tensor<xpu, 3, DType> ograd =
-          out_grad[softmaxout_enum::kOut].get_with_shape<xpu, 3, DType>(s3, s);
+            out_grad[softmaxout_enum::kOut].get_with_shape<xpu, 3, DType>(s3, s);
         grad *= ograd;
       }
     } else {
@@ -220,15 +225,16 @@ class SoftmaxOutputOp : public Operator {
       Shape<2> data_shape;
       if (param_.preserve_shape) {
         data_shape = out_data[softmaxout_enum::kOut].shape_.FlatTo2D();
-//        Tensor<xpu, 1, DType> label = in_data[softmaxout_enum::kLabel].FlatTo1D<xpu, DType>(s);
-//        Tensor<xpu, 2, DType> out = out_data[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s);
-//        Tensor<xpu, 2, DType> grad = in_grad[softmaxout_enum::kData].FlatTo2D<xpu, DType>(s);
+        //        Tensor<xpu, 1, DType> label = in_data[softmaxout_enum::kLabel].FlatTo1D<xpu,
+        //        DType>(s); Tensor<xpu, 2, DType> out =
+        //        out_data[softmaxout_enum::kOut].FlatTo2D<xpu, DType>(s); Tensor<xpu, 2, DType>
+        //        grad = in_grad[softmaxout_enum::kData].FlatTo2D<xpu, DType>(s);
       } else {
-        index_t n = out_data[softmaxout_enum::kOut].size(0);
-        data_shape = Shape2(n, out_data[softmaxout_enum::kOut].Size()/n);
+        index_t n  = out_data[softmaxout_enum::kOut].size(0);
+        data_shape = Shape2(n, out_data[softmaxout_enum::kOut].Size() / n);
       }
-      Tensor<xpu, 1, DType> label = in_data[softmaxout_enum::kLabel].get_with_shape<xpu, 1, DType>(
-          label_shape, s);
+      Tensor<xpu, 1, DType> label =
+          in_data[softmaxout_enum::kLabel].get_with_shape<xpu, 1, DType>(label_shape, s);
       Tensor<xpu, 2, DType> out =
           out_data[softmaxout_enum::kOut].get_with_shape<xpu, 2, DType>(data_shape, s);
       Tensor<xpu, 2, DType> grad =
@@ -238,8 +244,8 @@ class SoftmaxOutputOp : public Operator {
         if (param_.smooth_alpha == 0.0f) {
           SoftmaxGrad(grad, out, label, static_cast<DType>(param_.ignore_label));
         } else {
-          SmoothSoftmaxGrad(grad, out, label, static_cast<DType>(param_.ignore_label),
-                            param_.smooth_alpha);
+          SmoothSoftmaxGrad(
+              grad, out, label, static_cast<DType>(param_.ignore_label), param_.smooth_alpha);
         }
       } else {
         if (param_.smooth_alpha == 0.0f) {
@@ -253,8 +259,7 @@ class SoftmaxOutputOp : public Operator {
       } else if (param_.normalization == softmaxout_enum::kValid) {
         int i_label = static_cast<int>(param_.ignore_label);
         Tensor<cpu, 1, DType> workspace =
-          ctx.requested[softmaxout_enum::kTempSpace].get_host_space_typed<1, DType>(
-          label.shape_);
+            ctx.requested[softmaxout_enum::kTempSpace].get_host_space_typed<1, DType>(label.shape_);
         Copy(workspace, label, label.stream_);
         for (index_t i = 0; i < label.size(0); ++i) {
           if (static_cast<int>(workspace[i]) == i_label) {
@@ -268,7 +273,7 @@ class SoftmaxOutputOp : public Operator {
       grad *= DType(param_.grad_scale / valid_cnt);
       if (param_.out_grad) {
         Tensor<xpu, 2, DType> ograd =
-          out_grad[softmaxout_enum::kOut].get_with_shape<xpu, 2, DType>(data_shape, s);
+            out_grad[softmaxout_enum::kOut].get_with_shape<xpu, 2, DType>(data_shape, s);
         grad *= ograd;
       }
     }
@@ -278,12 +283,13 @@ class SoftmaxOutputOp : public Operator {
   SoftmaxOutputParam param_;
 };  // class SoftmaxOutputOp
 
-template<typename xpu>
+template <typename xpu>
 void SoftmaxOutputCompute(const nnvm::NodeAttrs& attrs,
-                          const OpContext& ctx, const std::vector<TBlob>& inputs,
+                          const OpContext& ctx,
+                          const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs) {
-  const SoftmaxOutputParam &param = nnvm::get<SoftmaxOutputParam>(attrs.parsed);
+  const SoftmaxOutputParam& param = nnvm::get<SoftmaxOutputParam>(attrs.parsed);
   const std::vector<TBlob> no_use_but_adapt_origin_api;
   CHECK_EQ(inputs.size(), 2U);
 
@@ -293,7 +299,7 @@ void SoftmaxOutputCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void SoftmaxOutputGradCompute(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -306,8 +312,8 @@ void SoftmaxOutputGradCompute(const nnvm::NodeAttrs& attrs,
   std::vector<TBlob> out_grad{inputs[0]};
   std::vector<TBlob> out_data{inputs[0]};
   std::vector<TBlob> in_data(inputs.begin(), inputs.end());
-  int dtype = inputs[0].type_flag_;
-  const std::vector<TBlob> &in_grad = outputs;
+  int dtype                         = inputs[0].type_flag_;
+  const std::vector<TBlob>& in_grad = outputs;
 
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
     SoftmaxOutputOp<xpu, DType> op(param);
@@ -315,7 +321,6 @@ void SoftmaxOutputGradCompute(const nnvm::NodeAttrs& attrs,
   });
 }
 
-
 #if DMLC_USE_CXX11
 class SoftmaxOutputProp : public OperatorProperty {
  public:
@@ -331,24 +336,25 @@ class SoftmaxOutputProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, label]";
-    const mxnet::TShape &dshape = in_shape->at(0);
-    if (!shape_is_known(dshape)) return false;
+    const mxnet::TShape& dshape = in_shape->at(0);
+    if (!shape_is_known(dshape))
+      return false;
 
     // label.shape == data.shape: use probability as label
     if (dshape != (*in_shape)[softmaxout_enum::kLabel]) {
       if (param_.multi_output) {
-        mxnet::TShape lshape1 = Shape2(dshape[0], dshape.Size()/dshape[0]/dshape[1]);
+        mxnet::TShape lshape1 = Shape2(dshape[0], dshape.Size() / dshape[0] / dshape[1]);
         mxnet::TShape lshape2(dshape.ndim() - 1, -1);
         lshape2[0] = dshape[0];
         for (int i = 2; i < dshape.ndim(); ++i)
-          lshape2[i-1] = dshape[i];
+          lshape2[i - 1] = dshape[i];
         mxnet::TShape lshape3 = dshape;
-        lshape3[1] = 1;
+        lshape3[1]            = 1;
         if (!mxnet::ndim_is_known(in_shape->at(softmaxout_enum::kLabel))) {
           in_shape->at(softmaxout_enum::kLabel) = lshape1;
         } else if (in_shape->at(softmaxout_enum::kLabel) == lshape1) {
@@ -356,8 +362,8 @@ class SoftmaxOutputProp : public OperatorProperty {
         } else if (in_shape->at(softmaxout_enum::kLabel) == lshape3) {
         } else {
           std::ostringstream os;
-          os << "Expecting " << lshape1 << " or " << lshape2
-             << ". But got " << in_shape->at(softmaxout_enum::kLabel);
+          os << "Expecting " << lshape1 << " or " << lshape2 << ". But got "
+             << in_shape->at(softmaxout_enum::kLabel);
           throw InferShapeError(os.str(), softmaxout_enum::kLabel);
         }
       } else {
@@ -372,9 +378,9 @@ class SoftmaxOutputProp : public OperatorProperty {
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -391,7 +397,7 @@ class SoftmaxOutputProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SoftmaxOutputProp();
+    auto ptr    = new SoftmaxOutputProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -400,12 +406,12 @@ class SoftmaxOutputProp : public OperatorProperty {
     return "SoftmaxOutput";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     if (param_.out_grad) {
-      return {in_data[softmaxout_enum::kLabel], out_data[softmaxout_enum::kOut],
+      return {in_data[softmaxout_enum::kLabel],
+              out_data[softmaxout_enum::kOut],
               out_grad[softmaxout_enum::kOut]};
     } else {
       return {in_data[softmaxout_enum::kLabel], out_data[softmaxout_enum::kOut]};
@@ -413,16 +419,16 @@ class SoftmaxOutputProp : public OperatorProperty {
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {{out_data[softmaxout_enum::kOut], in_grad[softmaxout_enum::kData]}};
   }
 
   std::vector<std::pair<int, void*> > ForwardInplaceOption(
-    const std::vector<int> &in_data,
-    const std::vector<void*> &out_data) const override {
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     return {{in_data[softmaxout_enum::kData], out_data[softmaxout_enum::kOut]}};
   }
 
@@ -431,8 +437,9 @@ class SoftmaxOutputProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  protected:
   SoftmaxOutputParam param_;
@@ -442,7 +449,7 @@ class DeprecatedSoftmaxProp : public SoftmaxOutputProp {
  public:
   void Init(const std::vector<std::pair<std::string, std::string> >& kwargs) override {
     LOG(INFO) << "Softmax symbol is renamed to SoftmaxOutput. "
-      << "This API will be deprecated in Dec, 2015";
+              << "This API will be deprecated in Dec, 2015";
     SoftmaxOutputProp::param_.Init(kwargs);
   }
 
@@ -456,18 +463,18 @@ class DeprecatedSoftmaxProp : public SoftmaxOutputProp {
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::SoftmaxOutputParam> {
   size_t operator()(const mxnet::op::SoftmaxOutputParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.grad_scale);
-    ret = dmlc::HashCombine(ret, val.ignore_label);
-    ret = dmlc::HashCombine(ret, val.multi_output);
-    ret = dmlc::HashCombine(ret, val.use_ignore);
-    ret = dmlc::HashCombine(ret, val.preserve_shape);
-    ret = dmlc::HashCombine(ret, val.normalization);
-    ret = dmlc::HashCombine(ret, val.out_grad);
-    ret = dmlc::HashCombine(ret, val.smooth_alpha);
+    ret        = dmlc::HashCombine(ret, val.grad_scale);
+    ret        = dmlc::HashCombine(ret, val.ignore_label);
+    ret        = dmlc::HashCombine(ret, val.multi_output);
+    ret        = dmlc::HashCombine(ret, val.use_ignore);
+    ret        = dmlc::HashCombine(ret, val.preserve_shape);
+    ret        = dmlc::HashCombine(ret, val.normalization);
+    ret        = dmlc::HashCombine(ret, val.out_grad);
+    ret        = dmlc::HashCombine(ret, val.smooth_alpha);
     return ret;
   }
 };
diff --git a/src/operator/softmax_output.cc b/src/operator/softmax_output.cc
index 3a87bdb599f1..6f2f9f1faf5d 100644
--- a/src/operator/softmax_output.cc
+++ b/src/operator/softmax_output.cc
@@ -22,7 +22,7 @@
  * \file softmax_output.cc
  * \brief
  * \author Bing Xu, Zhang Rong A
-*/
+ */
 #include "./softmax_output-inl.h"
 #if MXNET_USE_ONEDNN == 1
 #include "./nn/mkldnn/mkldnn_ops-inl.h"
@@ -33,27 +33,27 @@ namespace op {
 
 DMLC_REGISTER_PARAMETER(SoftmaxOutputParam);
 struct SoftmaxOutputGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) const {
-  std::vector<nnvm::NodeEntry> out_data(n->num_outputs());
-  for (uint32_t i = 0; i < out_data.size(); ++i) {
-    out_data[i] = nnvm::NodeEntry{n, i, 0};
-  }
-  std::vector<nnvm::NodeEntry> heads;
-  heads.push_back(out_data[softmaxout_enum::kOut]);
-  heads.push_back(n->inputs[softmaxout_enum::kLabel]);
-
-  nnvm::ObjectPtr gnode = nnvm::Node::Create();
-  gnode->inputs = std::move(heads);
-  gnode->control_deps.emplace_back(n);
-  gnode->attrs = n->attrs;
-  gnode->attrs.op = nnvm::Op::Get("_backward_SoftmaxOutput");
-  gnode->attrs.name = n->attrs.name + "_backward";
-  std::vector<nnvm::NodeEntry> in_grad(2);
-  in_grad[0] = nnvm::NodeEntry{gnode, 0, 0};
-  in_grad[1] = nnvm::NodeEntry{gnode, 1, 0};
-  return in_grad;
+    std::vector<nnvm::NodeEntry> out_data(n->num_outputs());
+    for (uint32_t i = 0; i < out_data.size(); ++i) {
+      out_data[i] = nnvm::NodeEntry{n, i, 0};
+    }
+    std::vector<nnvm::NodeEntry> heads;
+    heads.push_back(out_data[softmaxout_enum::kOut]);
+    heads.push_back(n->inputs[softmaxout_enum::kLabel]);
+
+    nnvm::ObjectPtr gnode = nnvm::Node::Create();
+    gnode->inputs         = std::move(heads);
+    gnode->control_deps.emplace_back(n);
+    gnode->attrs      = n->attrs;
+    gnode->attrs.op   = nnvm::Op::Get("_backward_SoftmaxOutput");
+    gnode->attrs.name = n->attrs.name + "_backward";
+    std::vector<nnvm::NodeEntry> in_grad(2);
+    in_grad[0] = nnvm::NodeEntry{gnode, 0, 0};
+    in_grad[1] = nnvm::NodeEntry{gnode, 1, 0};
+    return in_grad;
   }
 };
 
@@ -62,8 +62,8 @@ static inline std::vector<std::string> ListArguments() {
 }
 
 static bool SoftmaxOutputType(const nnvm::NodeAttrs& attrs,
-                              std::vector<int> *in_type,
-                              std::vector<int> *out_type) {
+                              std::vector<int>* in_type,
+                              std::vector<int>* out_type) {
   CHECK_EQ(in_type->size(), 2U);
   int dtype = (*in_type)[0];
   if (type_is_none(dtype)) {
@@ -92,24 +92,25 @@ static bool SoftmaxOutputType(const nnvm::NodeAttrs& attrs,
 }
 
 static bool SoftmaxOutputShape(const nnvm::NodeAttrs& attrs,
-                               mxnet::ShapeVector *in_shape,
-                               mxnet::ShapeVector *out_shape) {
+                               mxnet::ShapeVector* in_shape,
+                               mxnet::ShapeVector* out_shape) {
   using namespace mshadow;
   const SoftmaxOutputParam& param = nnvm::get<SoftmaxOutputParam>(attrs.parsed);
   CHECK_EQ(in_shape->size(), 2U) << "Input:[data, label]";
-  const mxnet::TShape &dshape = in_shape->at(0);
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = in_shape->at(0);
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
 
   // label.shape == data.shape: use probability as label
   if (dshape != (*in_shape)[softmaxout_enum::kLabel]) {
     if (param.multi_output) {
-      mxnet::TShape lshape1 = Shape2(dshape[0], dshape.Size()/dshape[0]/dshape[1]);
+      mxnet::TShape lshape1 = Shape2(dshape[0], dshape.Size() / dshape[0] / dshape[1]);
       mxnet::TShape lshape2(dshape.ndim() - 1, -1);
       lshape2[0] = dshape[0];
       for (int i = 2; i < dshape.ndim(); ++i)
-        lshape2[i-1] = dshape[i];
+        lshape2[i - 1] = dshape[i];
       mxnet::TShape lshape3 = dshape;
-      lshape3[1] = 1;
+      lshape3[1]            = 1;
       if (!mxnet::ndim_is_known(in_shape->at(softmaxout_enum::kLabel))) {
         in_shape->at(softmaxout_enum::kLabel) = lshape1;
       } else if (in_shape->at(softmaxout_enum::kLabel) == lshape1) {
@@ -117,8 +118,8 @@ static bool SoftmaxOutputShape(const nnvm::NodeAttrs& attrs,
       } else if (in_shape->at(softmaxout_enum::kLabel) == lshape3) {
       } else {
         std::ostringstream os;
-        os << "Expecting " << lshape1 << " or " << lshape2
-           << ". But got " << in_shape->at(softmaxout_enum::kLabel);
+        os << "Expecting " << lshape1 << " or " << lshape2 << ". But got "
+           << in_shape->at(softmaxout_enum::kLabel);
         throw InferShapeError(os.str(), softmaxout_enum::kLabel);
       }
     } else {
@@ -143,17 +144,16 @@ inline static bool SoftmaxOutputStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 
-void SoftmaxOutputComputeExCPU(const nnvm::NodeAttrs &attrs,
-                               const OpContext &ctx,
-                               const std::vector<NDArray> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<NDArray> &outputs) {
+void SoftmaxOutputComputeExCPU(const nnvm::NodeAttrs& attrs,
+                               const OpContext& ctx,
+                               const std::vector<NDArray>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 2U);
-  const SoftmaxOutputParam &param = nnvm::get<SoftmaxOutputParam>(attrs.parsed);
+  const SoftmaxOutputParam& param = nnvm::get<SoftmaxOutputParam>(attrs.parsed);
   if (SupportMKLDNN(inputs[0]) && !ctx.is_train && SupportMKLDNNSoftmaxOutput(param)) {
     MKLDNN_OPCHECK_INIT(false, outputs.size(), inputs, outputs);
     MKLDNNRun(MKLDNNSoftmaxOutputForward, attrs, ctx, inputs, req, outputs);
@@ -165,7 +165,7 @@ void SoftmaxOutputComputeExCPU(const nnvm::NodeAttrs &attrs,
 #endif
 
 NNVM_REGISTER_OP(SoftmaxOutput)
-.describe(R"code(Computes the gradient of cross entropy loss with respect to softmax output.
+    .describe(R"code(Computes the gradient of cross entropy loss with respect to softmax output.
 
 - This operator computes the gradient in two steps.
   The cross entropy loss does not actually need to be computed.
@@ -241,45 +241,50 @@ NNVM_REGISTER_OP(SoftmaxOutput)
     - ``'valid'``: divide the gradient by the number of instances which are not ignored.
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SoftmaxOutputParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SoftmaxOutputParam>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FInferStorageType>("FInferStorageType", SoftmaxOutputStorageType)
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SoftmaxOutputComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", SoftmaxOutputStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SoftmaxOutputComputeExCPU)
 #endif
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"data", "label"};
-})
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.set_attr<mxnet::FInferShape>("FInferShape", SoftmaxOutputShape)
-.set_attr<nnvm::FInferType>("FInferType", SoftmaxOutputType)
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxOutputCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", SoftmaxOutputGrad{"_backward_SoftmaxOutput"})
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.add_argument("data", "NDArray-or-Symbol", "Input array.")
-.add_argument("label", "NDArray-or-Symbol", "Ground truth label.")
-.add_arguments(SoftmaxOutputParam::__FIELDS__());
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "label"};
+                                     })
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .set_attr<mxnet::FInferShape>("FInferShape", SoftmaxOutputShape)
+    .set_attr<nnvm::FInferType>("FInferType", SoftmaxOutputType)
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxOutputCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", SoftmaxOutputGrad{"_backward_SoftmaxOutput"})
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "Input array.")
+    .add_argument("label", "NDArray-or-Symbol", "Ground truth label.")
+    .add_arguments(SoftmaxOutputParam::__FIELDS__());
 
 // Softmax symbol is renamed to SoftmaxOutput and deprecated since Dec, 2015
 NNVM_REGISTER_OP(SoftmaxOutput).add_alias("Softmax");
 
 NNVM_REGISTER_OP(_backward_SoftmaxOutput)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs){
-  return std::vector<std::pair<int, int> >{{0, 0}};
-})
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n){
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr_parser(ParamParser<SoftmaxOutputParam>)
-.set_attr<FCompute>("FCompute<cpu>", SoftmaxOutputGradCompute<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr_parser(ParamParser<SoftmaxOutputParam>)
+    .set_attr<FCompute>("FCompute<cpu>", SoftmaxOutputGradCompute<cpu>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/softmax_output.cu b/src/operator/softmax_output.cu
index 49daa5a5b218..8028dccd3bab 100644
--- a/src/operator/softmax_output.cu
+++ b/src/operator/softmax_output.cu
@@ -22,18 +22,17 @@
  * \file softmax_output.cu
  * \brief
  * \author Bing Xu
-*/
+ */
 
 #include "./softmax_output-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(SoftmaxOutput)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxOutputCompute<gpu>);
+NNVM_REGISTER_OP(SoftmaxOutput).set_attr<FCompute>("FCompute<gpu>", SoftmaxOutputCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_SoftmaxOutput)
-.set_attr<FCompute>("FCompute<gpu>", SoftmaxOutputGradCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SoftmaxOutputGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/spatial_transformer-inl.h b/src/operator/spatial_transformer-inl.h
index ddc3ec6bc24a..022a600f515f 100644
--- a/src/operator/spatial_transformer-inl.h
+++ b/src/operator/spatial_transformer-inl.h
@@ -23,7 +23,7 @@
  * \brief
  *  Reproducing paper: aderberg M, Simonyan K, Zisserman A. "Spatial transformer networks"
  * \author Wei Wu
-*/
+ */
 #ifndef MXNET_OPERATOR_SPATIAL_TRANSFORMER_INL_H_
 #define MXNET_OPERATOR_SPATIAL_TRANSFORMER_INL_H_
 
@@ -38,17 +38,16 @@
 #include "./operator_common.h"
 #include "./linalg.h"
 
-
 namespace mxnet {
 namespace op {
 
 namespace st {
-enum SpatialTransformerOpInputs {kData, kLoc};
-enum SpatialTransformerOpOutputs {kOut, kGridDst, kGridSrc};
-enum SpatialTransformerOpResource {kTempSpace};
-enum SpatialTransformerTransformType {kAffine};
-enum SpatialTransformerSamplerType {kBilinear};
-}
+enum SpatialTransformerOpInputs { kData, kLoc };
+enum SpatialTransformerOpOutputs { kOut, kGridDst, kGridSrc };
+enum SpatialTransformerOpResource { kTempSpace };
+enum SpatialTransformerTransformType { kAffine };
+enum SpatialTransformerSamplerType { kBilinear };
+}  // namespace st
 
 struct SpatialTransformerParam : public dmlc::Parameter<SpatialTransformerParam> {
   mxnet::TShape target_shape;
@@ -57,50 +56,51 @@ struct SpatialTransformerParam : public dmlc::Parameter<SpatialTransformerParam>
   dmlc::optional<bool> cudnn_off;
   DMLC_DECLARE_PARAMETER(SpatialTransformerParam) {
     int shape[] = {0, 0};
-    DMLC_DECLARE_FIELD(target_shape).set_default(mxnet::TShape(shape, shape + 2))
+    DMLC_DECLARE_FIELD(target_shape)
+        .set_default(mxnet::TShape(shape, shape + 2))
         .describe("output shape(h, w) of spatial transformer: (y, x)");
-    DMLC_DECLARE_FIELD(transform_type).add_enum("affine", st::kAffine)
+    DMLC_DECLARE_FIELD(transform_type)
+        .add_enum("affine", st::kAffine)
         .describe("transformation type");
-    DMLC_DECLARE_FIELD(sampler_type).add_enum("bilinear", st::kBilinear)
-        .describe("sampling type");
-    DMLC_DECLARE_FIELD(cudnn_off).set_default(dmlc::optional<bool>())
+    DMLC_DECLARE_FIELD(sampler_type).add_enum("bilinear", st::kBilinear).describe("sampling type");
+    DMLC_DECLARE_FIELD(cudnn_off)
+        .set_default(dmlc::optional<bool>())
         .describe("whether to turn cudnn off");
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class SpatialTransformerOp : public Operator {
  public:
   explicit SpatialTransformerOp(SpatialTransformerParam p) {
     this->param_ = p;
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 3U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 4, DType> data = in_data[st::kData].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> out = out_data[st::kOut].get<xpu, 4, DType>(s);
+    Stream<xpu>* s                 = ctx.get_stream<xpu>();
+    Tensor<xpu, 4, DType> data     = in_data[st::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> out      = out_data[st::kOut].get<xpu, 4, DType>(s);
     Tensor<xpu, 2, DType> grid_dst = out_data[st::kGridDst].get<xpu, 2, DType>(s);
     Tensor<xpu, 3, DType> grid_src = out_data[st::kGridSrc].get<xpu, 3, DType>(s);
-    Shape<3> loc_shape = Shape3(data.size(0), 2, 3);
-    Tensor<xpu, 3, DType> loc = in_data[st::kLoc].get_with_shape<xpu, 3, DType>(loc_shape, s);
+    Shape<3> loc_shape             = Shape3(data.size(0), 2, 3);
+    Tensor<xpu, 3, DType> loc      = in_data[st::kLoc].get_with_shape<xpu, 3, DType>(loc_shape, s);
     Tensor<cpu, 2, DType> workspace =
-          ctx.requested[st::kTempSpace].get_host_space_typed<2, DType>(
-          grid_dst.shape_);
+        ctx.requested[st::kTempSpace].get_host_space_typed<2, DType>(grid_dst.shape_);
     for (index_t i = 1; i <= workspace.size(1); i++) {
       // grid dst coordinate is (x, y, 1)
-      workspace[0][i-1] = -1.0 + (i-1) % param_.target_shape[1] * 2.0 /
-                          (param_.target_shape[1] - 1);
-      workspace[1][i-1] = -1.0 + (i-1) / param_.target_shape[1] * 2.0 /
-                          (param_.target_shape[0] - 1);
-      workspace[2][i-1] = 1.0;
+      workspace[0][i - 1] =
+          -1.0 + (i - 1) % param_.target_shape[1] * 2.0 / (param_.target_shape[1] - 1);
+      workspace[1][i - 1] =
+          -1.0 + (i - 1) / param_.target_shape[1] * 2.0 / (param_.target_shape[0] - 1);
+      workspace[2][i - 1] = 1.0;
     }
     Copy(grid_dst, workspace, grid_dst.stream_);
     for (index_t batch = 0; batch < data.size(0); batch++) {
@@ -115,26 +115,26 @@ class SpatialTransformerOp : public Operator {
     }
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_data.size(), 3U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 4, DType> data = in_data[st::kData].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> grad = out_grad[st::kOut].get<xpu, 4, DType>(s);
-    Tensor<xpu, 4, DType> gdata = in_grad[st::kData].get<xpu, 4, DType>(s);
+    Stream<xpu>* s                 = ctx.get_stream<xpu>();
+    Tensor<xpu, 4, DType> data     = in_data[st::kData].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> grad     = out_grad[st::kOut].get<xpu, 4, DType>(s);
+    Tensor<xpu, 4, DType> gdata    = in_grad[st::kData].get<xpu, 4, DType>(s);
     Tensor<xpu, 2, DType> grid_dst = out_data[st::kGridDst].get<xpu, 2, DType>(s);
     Tensor<xpu, 3, DType> grid_src = out_data[st::kGridSrc].get<xpu, 3, DType>(s);
-    Shape<3> loc_shape = Shape3(data.size(0), 2, 3);
-    Tensor<xpu, 3, DType> gloc = in_grad[st::kLoc].get_with_shape<xpu, 3, DType>(loc_shape, s);
-    gdata = 0.0;
+    Shape<3> loc_shape             = Shape3(data.size(0), 2, 3);
+    Tensor<xpu, 3, DType> gloc     = in_grad[st::kLoc].get_with_shape<xpu, 3, DType>(loc_shape, s);
+    gdata                          = 0.0;
     if (param_.sampler_type == st::kBilinear) {
       BilinearSamplingBackward(gdata, grid_src, grad, data);
     }
@@ -151,7 +151,7 @@ class SpatialTransformerOp : public Operator {
   SpatialTransformerParam param_;
 };  // class SpatialTransformerOp
 
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(SpatialTransformerParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -166,7 +166,7 @@ class SpatialTransformerProp : public OperatorProperty {
   }
 
   std::vector<std::string> ListArguments() const override {
-      return {"data", "loc"};
+    return {"data", "loc"};
   }
 
   std::vector<std::string> ListOutputs() const override {
@@ -181,68 +181,67 @@ class SpatialTransformerProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, loc]";
     CHECK_EQ(param_.transform_type, st::kAffine) << "only supports affine transform currently";
     CHECK_EQ(param_.sampler_type, st::kBilinear) << "only supports bilinear sampling currently";
-    const mxnet::TShape &dshape = (*in_shape)[st::kData];
-    const mxnet::TShape &lshape = (*in_shape)[st::kLoc];
-    if (!shape_is_known(dshape)) return false;
-    CHECK_EQ(dshape.ndim(), 4U) \
-        << "input data should be 4D in batch-num_filter-y-x";
-    if (!shape_is_known(lshape)) return false;
-    CHECK_EQ(lshape.ndim(), 2U) \
-        << "locolisation paramter should be 4D in batch-num_hidden";
+    const mxnet::TShape& dshape = (*in_shape)[st::kData];
+    const mxnet::TShape& lshape = (*in_shape)[st::kLoc];
+    if (!shape_is_known(dshape))
+      return false;
+    CHECK_EQ(dshape.ndim(), 4U) << "input data should be 4D in batch-num_filter-y-x";
+    if (!shape_is_known(lshape))
+      return false;
+    CHECK_EQ(lshape.ndim(), 2U) << "locolisation paramter should be 4D in batch-num_hidden";
     if (param_.transform_type == st::kAffine) {
       CHECK_EQ(lshape[1], 6U) << "incorrect locolisation network shape[1], should be 6";
     }
     out_shape->clear();
     out_shape->push_back(dshape);
-    CHECK_GT(param_.target_shape[0], 0U) \
-        << "incorrect target_shape: " << param_.target_shape[0];
-    CHECK_GT(param_.target_shape[1], 0U) \
-        << "incorrect target_shape: " << param_.target_shape[1];
+    CHECK_GT(param_.target_shape[0], 0U) << "incorrect target_shape: " << param_.target_shape[0];
+    CHECK_GT(param_.target_shape[1], 0U) << "incorrect target_shape: " << param_.target_shape[1];
     (*out_shape)[st::kOut][2] = param_.target_shape[0];
     (*out_shape)[st::kOut][3] = param_.target_shape[1];
-    out_shape->push_back(Shape2(3, param_.target_shape[0]*param_.target_shape[1]));
-    out_shape->push_back(Shape3(dshape[0], 2, param_.target_shape[0]*param_.target_shape[1]));
+    out_shape->push_back(Shape2(3, param_.target_shape[0] * param_.target_shape[1]));
+    out_shape->push_back(Shape3(dshape[0], 2, param_.target_shape[0] * param_.target_shape[1]));
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                   std::vector<int> *out_type,
-                   std::vector<int> *aux_type) const override {
-      int dtype = -1;
-      for (int i_type : *in_type) {
-        if (dtype == -1) {
-          dtype = i_type;
-        } else {
-          CHECK(i_type == dtype ||
-              i_type == -1) <<
-                "Non-uniform data type in SpatialTransformer";
-        }
-      }
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
+    int dtype = -1;
+    for (int i_type : *in_type) {
       if (dtype == -1) {
-        LOG(FATAL) << "Not enough information to infer type in SpatialTransformer.";
-        return false;
+        dtype = i_type;
+      } else {
+        CHECK(i_type == dtype || i_type == -1) << "Non-uniform data type in SpatialTransformer";
       }
-      size_t nin = this->ListArguments().size();
-      in_type->clear();
-      for (size_t i = 0; i < nin; ++i) in_type->push_back(dtype);
-      size_t naux = this->ListAuxiliaryStates().size();
-      aux_type->clear();
-      for (size_t i = 0; i < naux; ++i) aux_type->push_back(dtype);
-      size_t nout = this->ListOutputs().size();
-      out_type->clear();
-      for (size_t i = 0; i < nout; ++i) out_type->push_back(dtype);
-      return true;
     }
+    if (dtype == -1) {
+      LOG(FATAL) << "Not enough information to infer type in SpatialTransformer.";
+      return false;
+    }
+    size_t nin = this->ListArguments().size();
+    in_type->clear();
+    for (size_t i = 0; i < nin; ++i)
+      in_type->push_back(dtype);
+    size_t naux = this->ListAuxiliaryStates().size();
+    aux_type->clear();
+    for (size_t i = 0; i < naux; ++i)
+      aux_type->push_back(dtype);
+    size_t nout = this->ListOutputs().size();
+    out_type->clear();
+    for (size_t i = 0; i < nout; ++i)
+      out_type->push_back(dtype);
+    return true;
+  }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SpatialTransformerProp();
+    auto ptr    = new SpatialTransformerProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -251,40 +250,34 @@ class SpatialTransformerProp : public OperatorProperty {
     return "SpatialTransformer";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
-    return {out_grad[st::kOut],
-            out_data[st::kGridDst],
-            out_data[st::kGridSrc],
-            in_data[st::kData]
-           };
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
+    return {out_grad[st::kOut], out_data[st::kGridDst], out_data[st::kGridSrc], in_data[st::kData]};
   }
 
-  std::vector<ResourceRequest> ForwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> ForwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
-  #if MXNET_USE_CUDNN == 1
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+#if MXNET_USE_CUDNN == 1
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
-  #endif
+#endif
 
   Operator* CreateOperator(Context ctx) const override {
     LOG(FATAL) << "Not Implemented.";
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   SpatialTransformerParam param_;
-};  // class SpatialTransformerProp
+};      // class SpatialTransformerProp
 #endif  // DMLC_USE_CXX11
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/spatial_transformer.cc b/src/operator/spatial_transformer.cc
index 8dde5268a3b2..c7f1d38e32d9 100644
--- a/src/operator/spatial_transformer.cc
+++ b/src/operator/spatial_transformer.cc
@@ -22,170 +22,171 @@
  * \file spatial_transformer.cc
  * \brief
  * \author Wei Wu
-*/
+ */
 
 #include "./spatial_transformer-inl.h"
 
 namespace mshadow {
-template<typename DType>
+template <typename DType>
 static MSHADOW_CINLINE bool between(const DType value,
                                     const DType lowerBound,
                                     const DType upperBound) {
   return value >= lowerBound && value <= upperBound;
 }
 
-template<typename DType>
-inline void BilinearSamplingForward(const Tensor<cpu, 4, DType> &output,
-                                    const Tensor<cpu, 4, DType> &input,
+template <typename DType>
+inline void BilinearSamplingForward(const Tensor<cpu, 4, DType>& output,
+                                    const Tensor<cpu, 4, DType>& input,
                                     const Tensor<cpu, 3, DType> grid_src) {
-  DType *out = output.dptr_;
-  const DType *data = input.dptr_;
-  const DType *grid = grid_src.dptr_;
-  const index_t o_n = output.size(0), o_c = output.size(1),
-    o_h = output.size(2), o_w = output.size(3);
+  DType* out        = output.dptr_;
+  const DType* data = input.dptr_;
+  const DType* grid = grid_src.dptr_;
+  const index_t o_n = output.size(0), o_c = output.size(1), o_h = output.size(2),
+                o_w = output.size(3);
   const index_t i_c = input.size(1), i_h = input.size(2), i_w = input.size(3);
   for (index_t n = 0; n < static_cast<index_t>(o_n); ++n) {
     for (index_t c = 0; c < static_cast<index_t>(o_c); ++c) {
       for (index_t h = 0; h < static_cast<index_t>(o_h); ++h) {
         for (index_t w = 0; w < static_cast<index_t>(o_w); ++w) {
-          const index_t out_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
+          const index_t out_index  = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
           const index_t grid_index = n * o_h * o_w * 2 + h * o_w + w;
-          const DType y_real = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-          const DType x_real = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
-          const auto top_left_y = static_cast<index_t>(std::floor(y_real));
-          const auto top_left_x = static_cast<index_t>(std::floor(x_real));
+          const DType y_real       = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+          const DType x_real       = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
+          const auto top_left_y    = static_cast<index_t>(std::floor(y_real));
+          const auto top_left_x    = static_cast<index_t>(std::floor(x_real));
           const DType top_left_y_w = 1.0 - (y_real - top_left_y);
           const DType top_left_x_w = 1.0 - (x_real - top_left_x);
-          const index_t data_index = n * i_c * i_h * i_w + c * i_h * i_w +
-                                 top_left_y * i_w + top_left_x;
-          DType top_left_v = 0;
-          DType top_right_v = 0;
-          DType bottom_left_v = 0;
+          const index_t data_index =
+              n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+          DType top_left_v     = 0;
+          DType top_right_v    = 0;
+          DType bottom_left_v  = 0;
           DType bottom_right_v = 0;
-          index_t lower_bound = 0;
-          if (between(top_left_x, lower_bound, i_w-1) &&
-              between(top_left_y, lower_bound, i_h-1))
+          index_t lower_bound  = 0;
+          if (between(top_left_x, lower_bound, i_w - 1) &&
+              between(top_left_y, lower_bound, i_h - 1))
             top_left_v = *(data + data_index);
-          if (between(top_left_x + 1, lower_bound, i_w-1) &&
-              between(top_left_y, lower_bound, i_h-1))
+          if (between(top_left_x + 1, lower_bound, i_w - 1) &&
+              between(top_left_y, lower_bound, i_h - 1))
             top_right_v = *(data + data_index + 1);
-          if (between(top_left_x, lower_bound, i_w-1) &&
-              between(top_left_y + 1, lower_bound, i_h-1))
+          if (between(top_left_x, lower_bound, i_w - 1) &&
+              between(top_left_y + 1, lower_bound, i_h - 1))
             bottom_left_v = *(data + data_index + i_w);
-          if (between(top_left_x+1, lower_bound, i_w-1) &&
-              between(top_left_y + 1, lower_bound, i_h-1))
+          if (between(top_left_x + 1, lower_bound, i_w - 1) &&
+              between(top_left_y + 1, lower_bound, i_h - 1))
             bottom_right_v = *(data + data_index + i_w + 1);
-          *(out+out_index) = top_left_v * top_left_y_w * top_left_x_w +
-                             top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
-                             bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
-                             bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
+          *(out + out_index) = top_left_v * top_left_y_w * top_left_x_w +
+                               top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
+                               bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
+                               bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
         }
       }
     }
   }
 }
 
-template<typename DType>
-inline void BilinearSamplingBackward(const Tensor<cpu, 4, DType> &input_grad,
-                                     const Tensor<cpu, 3, DType> &grid_src_data,
-                                     const Tensor<cpu, 4, DType> &output_grad,
-                                     const Tensor<cpu, 4, DType> &input_data) {
-  DType *g_input = input_grad.dptr_;
-  DType *grid_src = grid_src_data.dptr_;
-  const DType *grad = output_grad.dptr_;
-  const DType *data = input_data.dptr_;
-  const index_t o_n = output_grad.size(0), o_c = output_grad.size(1),
-    o_h = output_grad.size(2), o_w = output_grad.size(3);
+template <typename DType>
+inline void BilinearSamplingBackward(const Tensor<cpu, 4, DType>& input_grad,
+                                     const Tensor<cpu, 3, DType>& grid_src_data,
+                                     const Tensor<cpu, 4, DType>& output_grad,
+                                     const Tensor<cpu, 4, DType>& input_data) {
+  DType* g_input    = input_grad.dptr_;
+  DType* grid_src   = grid_src_data.dptr_;
+  const DType* grad = output_grad.dptr_;
+  const DType* data = input_data.dptr_;
+  const index_t o_n = output_grad.size(0), o_c = output_grad.size(1), o_h = output_grad.size(2),
+                o_w = output_grad.size(3);
   const index_t i_c = input_data.size(1), i_h = input_data.size(2), i_w = input_data.size(3);
   for (index_t n = 0; n < static_cast<index_t>(o_n); ++n) {
-     for (index_t h = 0; h < static_cast<index_t>(o_h); ++h) {
-        for (index_t w = 0; w < static_cast<index_t>(o_w); ++w) {
-          DType top_left_y_gw = 0.0;
-          DType top_left_x_gw = 0.0;
-          const index_t grid_src_index = n * o_h * o_w * 2 + h * o_w + w;
-          const DType y_real = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-          const DType x_real = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
-          const auto top_left_y = static_cast<index_t>(std::floor(y_real));
-          const auto top_left_x = static_cast<index_t>(std::floor(x_real));
-          const DType top_left_y_w = 1.0 - (y_real - top_left_y);
-          const DType top_left_x_w = 1.0 - (x_real - top_left_x);
-          for (index_t c = 0; c < static_cast<index_t>(o_c); ++c) {
-            index_t grad_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
-            const index_t data_index = n * i_c * i_h * i_w + c * i_h * i_w +
-                                   top_left_y * i_w + top_left_x;
-            // calc 4 vertex value in input data
-            DType top_left_v = 0;
-            DType top_right_v = 0;
-            DType bottom_left_v = 0;
-            DType bottom_right_v = 0;
-            index_t lower_bound = 0;
-            if (between(top_left_x, lower_bound, i_w-1) &&
-                between(top_left_y, lower_bound, i_h-1)) {
-              *(g_input + data_index) += *(grad + grad_index) * top_left_y_w * top_left_x_w;
-              top_left_v = *(data + data_index);
-            }
-            if (between(top_left_x+1, lower_bound, i_w-1) &&
-                between(top_left_y, lower_bound, i_h-1)) {
-              *(g_input + data_index + 1) += *(grad + grad_index) * top_left_y_w
-                                             * (1.0 - top_left_x_w);
-              top_right_v = *(data + data_index + 1);
-            }
-            if (between(top_left_x, lower_bound, i_w-1) &&
-                between(top_left_y+1, lower_bound, i_h-1)) {
-              *(g_input + data_index+ i_w) += *(grad + grad_index) * (1.0 - top_left_y_w)
-                                              * top_left_x_w;
-              bottom_left_v = *(data + data_index + i_w);
-            }
-            if (between(top_left_x+1, lower_bound, i_w-1) &&
-                between(top_left_y+1, lower_bound, i_h-1)) {
-              *(g_input + data_index+ i_w + 1) += *(grad + grad_index) * (1.0 - top_left_y_w)
-                                                  * (1.0 - top_left_x_w);
-              bottom_right_v = *(data + data_index + i_w + 1);
-            }
-            // calc weight grad of top_left_w, then multiple -1 is the grad of grid_src
-            top_left_y_gw -= *(grad + grad_index) * (top_right_v - bottom_right_v +
-                             (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                             * top_left_x_w);
-            top_left_x_gw -= *(grad + grad_index) * (bottom_left_v - bottom_right_v +
-                             (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                             * top_left_y_w);
+    for (index_t h = 0; h < static_cast<index_t>(o_h); ++h) {
+      for (index_t w = 0; w < static_cast<index_t>(o_w); ++w) {
+        DType top_left_y_gw          = 0.0;
+        DType top_left_x_gw          = 0.0;
+        const index_t grid_src_index = n * o_h * o_w * 2 + h * o_w + w;
+        const DType y_real       = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+        const DType x_real       = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
+        const auto top_left_y    = static_cast<index_t>(std::floor(y_real));
+        const auto top_left_x    = static_cast<index_t>(std::floor(x_real));
+        const DType top_left_y_w = 1.0 - (y_real - top_left_y);
+        const DType top_left_x_w = 1.0 - (x_real - top_left_x);
+        for (index_t c = 0; c < static_cast<index_t>(o_c); ++c) {
+          index_t grad_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
+          const index_t data_index =
+              n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+          // calc 4 vertex value in input data
+          DType top_left_v     = 0;
+          DType top_right_v    = 0;
+          DType bottom_left_v  = 0;
+          DType bottom_right_v = 0;
+          index_t lower_bound  = 0;
+          if (between(top_left_x, lower_bound, i_w - 1) &&
+              between(top_left_y, lower_bound, i_h - 1)) {
+            *(g_input + data_index) += *(grad + grad_index) * top_left_y_w * top_left_x_w;
+            top_left_v = *(data + data_index);
           }
-          // calc grid_src grad
-          *(grid_src + grid_src_index + o_h * o_w) = top_left_y_gw * (i_h - 1) / 2;
-          *(grid_src + grid_src_index) = top_left_x_gw * (i_w - 1) / 2;
+          if (between(top_left_x + 1, lower_bound, i_w - 1) &&
+              between(top_left_y, lower_bound, i_h - 1)) {
+            *(g_input + data_index + 1) +=
+                *(grad + grad_index) * top_left_y_w * (1.0 - top_left_x_w);
+            top_right_v = *(data + data_index + 1);
+          }
+          if (between(top_left_x, lower_bound, i_w - 1) &&
+              between(top_left_y + 1, lower_bound, i_h - 1)) {
+            *(g_input + data_index + i_w) +=
+                *(grad + grad_index) * (1.0 - top_left_y_w) * top_left_x_w;
+            bottom_left_v = *(data + data_index + i_w);
+          }
+          if (between(top_left_x + 1, lower_bound, i_w - 1) &&
+              between(top_left_y + 1, lower_bound, i_h - 1)) {
+            *(g_input + data_index + i_w + 1) +=
+                *(grad + grad_index) * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
+            bottom_right_v = *(data + data_index + i_w + 1);
+          }
+          // calc weight grad of top_left_w, then multiple -1 is the grad of grid_src
+          top_left_y_gw -=
+              *(grad + grad_index) *
+              (top_right_v - bottom_right_v +
+               (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_x_w);
+          top_left_x_gw -=
+              *(grad + grad_index) *
+              (bottom_left_v - bottom_right_v +
+               (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_y_w);
         }
+        // calc grid_src grad
+        *(grid_src + grid_src_index + o_h * o_w) = top_left_y_gw * (i_h - 1) / 2;
+        *(grid_src + grid_src_index)             = top_left_x_gw * (i_w - 1) / 2;
       }
     }
   }
+}
 
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<cpu>(SpatialTransformerParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new SpatialTransformerOp<cpu, DType>(param);
-  })
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new SpatialTransformerOp<cpu, DType>(param); })
   return op;
 }
 
-Operator *SpatialTransformerProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                     std::vector<int> *in_type) const {
+Operator* SpatialTransformerProp::CreateOperatorEx(Context ctx,
+                                                   mxnet::ShapeVector* in_shape,
+                                                   std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(SpatialTransformerParam);
 
 MXNET_REGISTER_OP_PROPERTY(SpatialTransformer, SpatialTransformerProp)
-.add_argument("data", "NDArray-or-Symbol",
-              "Input data to the SpatialTransformerOp.")
-.add_argument("loc", "NDArray-or-Symbol",
-              "localisation net, the output dim should be 6 when transform_type "
-              "is affine. You shold initialize the weight and bias with identity tranform.")
-.add_arguments(SpatialTransformerParam::__FIELDS__())
-.describe("Applies a spatial transformer to input feature map.");
+    .add_argument("data", "NDArray-or-Symbol", "Input data to the SpatialTransformerOp.")
+    .add_argument("loc",
+                  "NDArray-or-Symbol",
+                  "localisation net, the output dim should be 6 when transform_type "
+                  "is affine. You shold initialize the weight and bias with identity tranform.")
+    .add_arguments(SpatialTransformerParam::__FIELDS__())
+    .describe("Applies a spatial transformer to input feature map.");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/spatial_transformer.cu b/src/operator/spatial_transformer.cu
index 3481a1c0efda..a0115a12c0a0 100644
--- a/src/operator/spatial_transformer.cu
+++ b/src/operator/spatial_transformer.cu
@@ -22,7 +22,7 @@
  * \file spatial_transformer.cu
  * \brief
  * \author Wei Wu
-*/
+ */
 
 #include "./spatial_transformer-inl.h"
 #include <algorithm>
@@ -31,7 +31,7 @@
 #endif  // MXNET_USE_CUDNN
 
 namespace mshadow {
-template<typename DType>
+template <typename DType>
 __device__ bool between(DType value, int lowerBound, int upperBound) {
   return (value >= lowerBound && value <= upperBound);
 }
@@ -56,36 +56,36 @@ BilinearSamplingForwardKernel(const int i_c, const int i_h,
        index < o_n * o_c * o_h * o_w;
        index += blockDim.x * gridDim.x * gridDim.y) {
     // (n, c, h, w) is the element in out
-    int w = index % o_w;
-    int h = (index / o_w) % o_h;
-    int c = (index / o_w / o_h) % o_c;
-    int n = index / o_w / o_h / o_c;
-    index_t out_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
-    index_t grid_index = n * o_h * o_w * 2 + h * o_w + w;
-    DType y_real = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-    DType x_real = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
-    int top_left_y = static_cast<int>(floor(y_real));
-    int top_left_x = static_cast<int>(floor(x_real));
-    DType top_left_y_w = 1.0 - (y_real - top_left_y);
-    DType top_left_x_w = 1.0 - (x_real - top_left_x);
-    int data_index = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
-    DType top_left_v = 0;
-    DType top_right_v = 0;
-    DType bottom_left_v = 0;
+    int w                = index % o_w;
+    int h                = (index / o_w) % o_h;
+    int c                = (index / o_w / o_h) % o_c;
+    int n                = index / o_w / o_h / o_c;
+    index_t out_index    = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
+    index_t grid_index   = n * o_h * o_w * 2 + h * o_w + w;
+    DType y_real         = (*(grid + grid_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+    DType x_real         = (*(grid + grid_index) + 1) * (i_w - 1) / 2;
+    int top_left_y       = static_cast<int>(floor(y_real));
+    int top_left_x       = static_cast<int>(floor(x_real));
+    DType top_left_y_w   = 1.0 - (y_real - top_left_y);
+    DType top_left_x_w   = 1.0 - (x_real - top_left_x);
+    int data_index       = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+    DType top_left_v     = 0;
+    DType top_right_v    = 0;
+    DType bottom_left_v  = 0;
     DType bottom_right_v = 0;
-    if (between(top_left_x, 0, i_w-1) && between(top_left_y, 0, i_h-1))
+    if (between(top_left_x, 0, i_w - 1) && between(top_left_y, 0, i_h - 1))
       top_left_v = *(data + data_index);
-    if (between(top_left_x + 1, 0, i_w-1) && between(top_left_y, 0, i_h-1))
+    if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y, 0, i_h - 1))
       top_right_v = *(data + data_index + 1);
-    if (between(top_left_x, 0, i_w-1) && between(top_left_y + 1, 0, i_h-1))
+    if (between(top_left_x, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1))
       bottom_left_v = *(data + data_index + i_w);
-    if (between(top_left_x+1, 0, i_w-1) && between(top_left_y + 1, 0, i_h-1))
+    if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1))
       bottom_right_v = *(data + data_index + i_w + 1);
-    *(out+out_index) = top_left_v * top_left_y_w * top_left_x_w +
-                        top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
-                        bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
-                        bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
-    }
+    *(out + out_index) = top_left_v * top_left_y_w * top_left_x_w +
+                         top_right_v * top_left_y_w * (1.0 - top_left_x_w) +
+                         bottom_left_v * (1.0 - top_left_y_w) * top_left_x_w +
+                         bottom_right_v * (1.0 - top_left_y_w) * (1.0 - top_left_x_w);
+  }
 }
 
 /*
@@ -96,114 +96,118 @@ BilinearSamplingForwardKernel(const int i_c, const int i_h,
  * threads per block. Setting __launch_bounds__ ensures
  * that such configuration can always be launched.
  */
-template<typename DType>
-__global__ void
-__launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
-BilinearSamplingBackwardKernel(const int i_c, const int i_h,
-                               const int i_w, const DType* grad,
-                               const DType* data, const int o_n,
-                               const int o_c, const int o_h,
-                               const int o_w, DType* g_input,
-                               DType* grid_src) {
+template <typename DType>
+__global__ void __launch_bounds__(cuda::kMaxThreadsPerBlock, 1)
+    BilinearSamplingBackwardKernel(const int i_c,
+                                   const int i_h,
+                                   const int i_w,
+                                   const DType* grad,
+                                   const DType* data,
+                                   const int o_n,
+                                   const int o_c,
+                                   const int o_h,
+                                   const int o_w,
+                                   DType* g_input,
+                                   DType* grid_src) {
   for (int index = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
        index < o_n * o_h * o_w;
        index += blockDim.x * gridDim.x * gridDim.y) {
     // (n, c, h, w) is the element in grad
-    int w = index % o_w;
-    int h = (index / o_w) % o_h;
-    int n = index / o_w / o_h;
-    DType top_left_y_gw = 0.0;
-    DType top_left_x_gw = 0.0;
+    int w                  = index % o_w;
+    int h                  = (index / o_w) % o_h;
+    int n                  = index / o_w / o_h;
+    DType top_left_y_gw    = 0.0;
+    DType top_left_x_gw    = 0.0;
     index_t grid_src_index = n * o_h * o_w * 2 + h * o_w + w;
-    DType y_real = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
-    DType x_real = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
-    int top_left_y = static_cast<int>(floor(y_real));
-    int top_left_x = static_cast<int>(floor(x_real));
-    DType top_left_y_w = 1.0 - (y_real - top_left_y);
-    DType top_left_x_w = 1.0 - (x_real - top_left_x);
+    DType y_real           = (*(grid_src + grid_src_index + o_h * o_w) + 1) * (i_h - 1) / 2;
+    DType x_real           = (*(grid_src + grid_src_index) + 1) * (i_w - 1) / 2;
+    int top_left_y         = static_cast<int>(floor(y_real));
+    int top_left_x         = static_cast<int>(floor(x_real));
+    DType top_left_y_w     = 1.0 - (y_real - top_left_y);
+    DType top_left_x_w     = 1.0 - (x_real - top_left_x);
     for (index_t c = 0; c < o_c; ++c) {
       index_t grad_index = n * o_c * o_h * o_w + c * o_h * o_w + h * o_w + w;
-      int data_index = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
+      int data_index     = n * i_c * i_h * i_w + c * i_h * i_w + top_left_y * i_w + top_left_x;
       // calc 4 vertex value in input data
-      DType top_left_v = 0;
-      DType top_right_v = 0;
-      DType bottom_left_v = 0;
+      DType top_left_v     = 0;
+      DType top_right_v    = 0;
+      DType bottom_left_v  = 0;
       DType bottom_right_v = 0;
       // calc input grad
-      if (between(top_left_x, 0, i_w-1) && between(top_left_y, 0, i_h-1)) {
+      if (between(top_left_x, 0, i_w - 1) && between(top_left_y, 0, i_h - 1)) {
         atomicAdd((g_input + data_index), *(grad + grad_index) * top_left_y_w * top_left_x_w);
         top_left_v = *(data + data_index);
       }
-      if (between(top_left_x+1, 0, i_w-1) && between(top_left_y, 0, i_h-1)) {
+      if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y, 0, i_h - 1)) {
         atomicAdd((g_input + data_index + 1),
                   *(grad + grad_index) * top_left_y_w * (1.0 - top_left_x_w));
         top_right_v = *(data + data_index + 1);
       }
-      if (between(top_left_x, 0, i_w-1) && between(top_left_y+1, 0, i_h-1)) {
+      if (between(top_left_x, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1)) {
         atomicAdd((g_input + data_index + i_w),
                   *(grad + grad_index) * (1.0 - top_left_y_w) * top_left_x_w);
         bottom_left_v = *(data + data_index + i_w);
       }
-      if (between(top_left_x+1, 0, i_w-1) && between(top_left_y+1, 0, i_h-1)) {
+      if (between(top_left_x + 1, 0, i_w - 1) && between(top_left_y + 1, 0, i_h - 1)) {
         atomicAdd((g_input + data_index + i_w + 1),
                   *(grad + grad_index) * (1.0 - top_left_y_w) * (1.0 - top_left_x_w));
         bottom_right_v = *(data + data_index + i_w + 1);
       }
       // calc weight grad of top_left_w, then multiple -1 is the grad of grid_src
-      top_left_y_gw -= *(grad + grad_index) * (top_right_v - bottom_right_v +
-                       (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                       * top_left_x_w);
-      top_left_x_gw -= *(grad + grad_index) * (bottom_left_v - bottom_right_v +
-                       (top_left_v - top_right_v - bottom_left_v + bottom_right_v)
-                       * top_left_y_w);
+      top_left_y_gw -= *(grad + grad_index) *
+                       (top_right_v - bottom_right_v +
+                        (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_x_w);
+      top_left_x_gw -= *(grad + grad_index) *
+                       (bottom_left_v - bottom_right_v +
+                        (top_left_v - top_right_v - bottom_left_v + bottom_right_v) * top_left_y_w);
     }
     // calc grid_src grad
     *(grid_src + grid_src_index + o_h * o_w) = top_left_y_gw * (i_h - 1) / 2;
-    *(grid_src + grid_src_index) = top_left_x_gw * (i_w - 1) / 2;
+    *(grid_src + grid_src_index)             = top_left_x_gw * (i_w - 1) / 2;
   }
 }
 
-template<typename DType>
-inline void BilinearSamplingForward(const Tensor<gpu, 4, DType> &output,
-                                    const Tensor<gpu, 4, DType> &input,
+template <typename DType>
+inline void BilinearSamplingForward(const Tensor<gpu, 4, DType>& output,
+                                    const Tensor<gpu, 4, DType>& input,
                                     const Tensor<gpu, 3, DType> grid_src) {
-    DType *out = output.dptr_;
-    const DType *data = input.dptr_;
-    const DType *grid = grid_src.dptr_;
-    int o_n = output.size(0), o_c = output.size(1), o_h = output.size(2), o_w = output.size(3);
-    int i_c = input.size(1), i_h = input.size(2), i_w = input.size(3);
-    using namespace cuda;
-    const int max_block = (output.shape_.Size() + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
-    dim3 num_blocks(kMaxGridDim, (max_block + kMaxGridDim - 1) / kMaxGridDim);
-    dim3 threads_per_block(kMaxThreadsPerBlock);
-    CheckLaunchParam(num_blocks, threads_per_block, "spatial transformer forward");
-    cudaStream_t stream = Stream<gpu>::GetStream(output.stream_);
-    BilinearSamplingForwardKernel<DType> << <num_blocks, threads_per_block, 0, stream >> >(
+  DType* out        = output.dptr_;
+  const DType* data = input.dptr_;
+  const DType* grid = grid_src.dptr_;
+  int o_n = output.size(0), o_c = output.size(1), o_h = output.size(2), o_w = output.size(3);
+  int i_c = input.size(1), i_h = input.size(2), i_w = input.size(3);
+  using namespace cuda;
+  const int max_block = (output.shape_.Size() + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
+  dim3 num_blocks(kMaxGridDim, (max_block + kMaxGridDim - 1) / kMaxGridDim);
+  dim3 threads_per_block(kMaxThreadsPerBlock);
+  CheckLaunchParam(num_blocks, threads_per_block, "spatial transformer forward");
+  cudaStream_t stream = Stream<gpu>::GetStream(output.stream_);
+  BilinearSamplingForwardKernel<DType><<<num_blocks, threads_per_block, 0, stream>>>(
       i_c, i_h, i_w, data, grid, o_n, o_c, o_h, o_w, out);
-    MSHADOW_CUDA_POST_KERNEL_CHECK(BilinearSamplingForwardKernel);
+  MSHADOW_CUDA_POST_KERNEL_CHECK(BilinearSamplingForwardKernel);
 }
 
-template<typename DType>
-inline void BilinearSamplingBackward(const Tensor<gpu, 4, DType> &input_grad,
-                                     const Tensor<gpu, 3, DType> &grid_src_data,
-                                     const Tensor<gpu, 4, DType> &output_grad,
-                                     const Tensor<gpu, 4, DType> &input_data) {
-  DType *g_input = input_grad.dptr_;
-  DType *grid_src = grid_src_data.dptr_;
-  const DType *grad = output_grad.dptr_;
-  const DType *data = input_data.dptr_;
-  int o_n = output_grad.size(0), o_c = output_grad.size(1),
-      o_h = output_grad.size(2), o_w = output_grad.size(3);
+template <typename DType>
+inline void BilinearSamplingBackward(const Tensor<gpu, 4, DType>& input_grad,
+                                     const Tensor<gpu, 3, DType>& grid_src_data,
+                                     const Tensor<gpu, 4, DType>& output_grad,
+                                     const Tensor<gpu, 4, DType>& input_data) {
+  DType* g_input    = input_grad.dptr_;
+  DType* grid_src   = grid_src_data.dptr_;
+  const DType* grad = output_grad.dptr_;
+  const DType* data = input_data.dptr_;
+  int o_n = output_grad.size(0), o_c = output_grad.size(1), o_h = output_grad.size(2),
+      o_w = output_grad.size(3);
   int i_c = input_data.size(1), i_h = input_data.size(2), i_w = input_data.size(3);
   using namespace cuda;
-  const int max_block = (output_grad.shape_.Size() / o_c + kMaxThreadsPerBlock - 1)
-                        / kMaxThreadsPerBlock;
+  const int max_block =
+      (output_grad.shape_.Size() / o_c + kMaxThreadsPerBlock - 1) / kMaxThreadsPerBlock;
   dim3 num_blocks(kMaxGridDim, (max_block + kMaxGridDim - 1) / kMaxGridDim);
   dim3 threads_per_block(kMaxThreadsPerBlock);
   CheckLaunchParam(num_blocks, threads_per_block, "spatial transformer backward");
   cudaStream_t stream = Stream<gpu>::GetStream(input_grad.stream_);
-  BilinearSamplingBackwardKernel<DType> << <num_blocks, threads_per_block, 0, stream >> >(
-    i_c, i_h, i_w, grad, data, o_n, o_c, o_h, o_w, g_input, grid_src);
+  BilinearSamplingBackwardKernel<DType><<<num_blocks, threads_per_block, 0, stream>>>(
+      i_c, i_h, i_w, grad, data, o_n, o_c, o_h, o_w, g_input, grid_src);
   MSHADOW_CUDA_POST_KERNEL_CHECK(BilinearSamplingBackwardKernel);
 }
 
@@ -211,9 +215,9 @@ inline void BilinearSamplingBackward(const Tensor<gpu, 4, DType> &input_grad,
 
 namespace mxnet {
 namespace op {
-template<>
+template <>
 Operator* CreateOp<gpu>(SpatialTransformerParam param, int dtype) {
-  Operator *op = nullptr;
+  Operator* op = nullptr;
 #if MXNET_USE_CUDNN == 1
   MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
     if (param.cudnn_off.has_value() && param.cudnn_off.value()) {
@@ -223,9 +227,7 @@ Operator* CreateOp<gpu>(SpatialTransformerParam param, int dtype) {
     }
   })
 #else
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new SpatialTransformerOp<gpu, DType>(param);
-  })
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new SpatialTransformerOp<gpu, DType>(param); })
 #endif  // MXNET_USE_CUDNN
   return op;
 }
diff --git a/src/operator/special_functions-inl.h b/src/operator/special_functions-inl.h
index a030b2878ea0..6c3c3a6db9af 100644
--- a/src/operator/special_functions-inl.h
+++ b/src/operator/special_functions-inl.h
@@ -22,8 +22,7 @@
  * \file special_functions-inl.h
  * \brief
  * \author Valentin Flunkert
-*/
-
+ */
 
 #ifndef MXNET_OPERATOR_SPECIAL_FUNCTIONS_INL_H_
 #define MXNET_OPERATOR_SPECIAL_FUNCTIONS_INL_H_
@@ -33,35 +32,35 @@ namespace op {
 
 namespace special_functions {
 
-template<typename DType>
+template <typename DType>
 struct helper_numeric_limits {
   MSHADOW_XINLINE static DType max();
 };
 
-template<>
+template <>
 struct helper_numeric_limits<double> {
   MSHADOW_XINLINE static double max() {
     return DBL_MAX;
   }
 };
 
-template<>
+template <>
 struct helper_numeric_limits<float> {
   MSHADOW_XINLINE static double max() {
     return FLT_MAX;
   }
 };
 
-template<typename DType>
+template <typename DType>
 MSHADOW_XINLINE static DType trigamma(DType x);
 
-template<>
+template <>
 MSHADOW_XINLINE double trigamma<double>(double x) {
   double PI(3.14159265358979323846);
-  double sign = +1;
+  double sign   = +1;
   double result = 0;
   if (x < 0.5) {
-    sign = -1;
+    sign                  = -1;
     const double sin_pi_x = sin(PI * x);
     result -= (PI * PI) / (sin_pi_x * sin_pi_x);
     x = 1 - x;
@@ -70,18 +69,18 @@ MSHADOW_XINLINE double trigamma<double>(double x) {
     result += 1 / (x * x);
     x += 1;
   }
-  const double ixx = 1 / (x*x);
-  result += (1 + 1 / (2*x) + ixx * (1./6 - ixx * (1./30 - ixx * (1./42)))) / x;
+  const double ixx = 1 / (x * x);
+  result += (1 + 1 / (2 * x) + ixx * (1. / 6 - ixx * (1. / 30 - ixx * (1. / 42)))) / x;
   return sign * result;
 }
 
-template<>
+template <>
 MSHADOW_XINLINE float trigamma<float>(float x) {
   float PI(3.14159265358979323846);
-  float sign = +1;
+  float sign   = +1;
   float result = 0;
   if (x < 0.5f) {
-    sign = -1;
+    sign                 = -1;
     const float sin_pi_x = sinf(PI * x);
     result -= (PI * PI) / (sin_pi_x * sin_pi_x);
     x = 1 - x;
@@ -90,8 +89,8 @@ MSHADOW_XINLINE float trigamma<float>(float x) {
     result += 1 / (x * x);
     x += 1;
   }
-  const float ixx = 1 / (x*x);
-  result += (1 + 1 / (2*x) + ixx * (1.f/6 - ixx * (1.f/30 - ixx * (1.f/42)))) / x;
+  const float ixx = 1 / (x * x);
+  result += (1 + 1 / (2 * x) + ixx * (1.f / 6 - ixx * (1.f / 30 - ixx * (1.f / 42)))) / x;
   return sign * result;
 }
 
@@ -123,26 +122,25 @@ struct cephes {
   template <typename DType>
   MSHADOW_XINLINE static DType polevl(DType x, const DType coef[], int N) {
     DType ans;
-    DType const *p;
+    DType const* p;
     int i;
 
-    p = coef;
+    p   = coef;
     ans = *p++;
 
     i = N;
     do {
-      ans = ans * x  +  *p++;
-    } while ( --i );
+      ans = ans * x + *p++;
+    } while (--i);
 
-    return( ans );
+    return (ans);
   }
 
-
   /*
    * Helper function for psi that handles double/float specific differences
    * in the algorithm.
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType psi_helper(DType s);
 
   /*
@@ -196,7 +194,7 @@ struct cephes {
    *     message         condition      value returned
    * psi singularity    x integer <=0      MAXNUMF
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType psi(DType x) {
     DType p, q, nz, s, w, y;
     int i, n, negative;
@@ -205,25 +203,25 @@ struct cephes {
     DType PI(3.14159265358979323846);
 
     negative = 0;
-    nz = 0.0;
+    nz       = 0.0;
 
-    if ( x <= 0.0 ) {
+    if (x <= 0.0) {
       negative = 1;
-      q = x;
-      p = std::floor(q);
-      if ( p == q ) {
+      q        = x;
+      p        = std::floor(q);
+      if (p == q) {
         return helper_numeric_limits<double>::max();
       }
       /* Remove the zeros of tan(PI x)
        * by subtracting the nearest integer from x
        */
       nz = q - p;
-      if ( nz != 0.5 ) {
-        if ( nz > 0.5 ) {
+      if (nz != 0.5) {
+        if (nz > 0.5) {
           p += 1.0;
           nz = q - p;
         }
-        nz = PI/std::tan(PI*nz);
+        nz = PI / std::tan(PI * nz);
       } else {
         nz = 0.0;
       }
@@ -231,12 +229,12 @@ struct cephes {
     }
 
     /* check for positive integer up to 10 */
-    if ( (x <= 10.0) && (x == std::floor(x)) ) {
+    if ((x <= 10.0) && (x == std::floor(x))) {
       y = 0.0;
       n = x;
-      for ( i = 1; i < n; i++ ) {
+      for (i = 1; i < n; i++) {
         w = i;
-        y += 1.0/w;
+        y += 1.0 / w;
       }
       y -= EUL;
       goto done;
@@ -244,59 +242,54 @@ struct cephes {
 
     s = x;
     w = 0.0;
-    while ( s < 10.0 ) {
-      w += 1.0/s;
+    while (s < 10.0) {
+      w += 1.0 / s;
       s += 1.0;
     }
 
     y = psi_helper(s);
 
-    y = logf(s)  -  (0.5/s)  -  y  -  w;
+    y = logf(s) - (0.5 / s) - y - w;
 
-done:
+  done:
 
-    if ( negative ) {
+    if (negative) {
       y -= nz;
     }
 
-    return(y);
+    return (y);
   }
 };
 
-
-template<>
+template <>
 MSHADOW_XINLINE double cephes::psi_helper<double>(double s) {
   double z;
-  const double A[] = {
-    8.33333333333333333333E-2,
-    -2.10927960927960927961E-2,
-    7.57575757575757575758E-3,
-    -4.16666666666666666667E-3,
-    3.96825396825396825397E-3,
-    -8.33333333333333333333E-3,
-    8.33333333333333333333E-2
-  };
-
-  if ( s < 1.0e17 ) {
-    z = 1.0/(s * s);
+  const double A[] = {8.33333333333333333333E-2,
+                      -2.10927960927960927961E-2,
+                      7.57575757575757575758E-3,
+                      -4.16666666666666666667E-3,
+                      3.96825396825396825397E-3,
+                      -8.33333333333333333333E-3,
+                      8.33333333333333333333E-2};
+
+  if (s < 1.0e17) {
+    z = 1.0 / (s * s);
     return z * cephes::polevl<double>(z, A, 6);
   } else {
     return 0.0;
   }
 }
 
-template<>
+template <>
 MSHADOW_XINLINE float cephes::psi_helper<float>(float s) {
   float z;
-  const float A[] = {
-    -4.16666666666666666667E-3f,
-    3.96825396825396825397E-3f,
-    -8.33333333333333333333E-3f,
-    8.33333333333333333333E-2f
-  };
+  const float A[] = {-4.16666666666666666667E-3f,
+                     3.96825396825396825397E-3f,
+                     -8.33333333333333333333E-3f,
+                     8.33333333333333333333E-2f};
 
-  if ( s < 1.0e8 ) {
-    z = 1.0/(s * s);
+  if (s < 1.0e8) {
+    z = 1.0 / (s * s);
     return z * cephes::polevl<float>(z, A, 3);
   } else {
     return 0.0;
diff --git a/src/operator/subgraph/build_subgraph.cc b/src/operator/subgraph/build_subgraph.cc
index e1db74da892c..04c2cbfe6e83 100644
--- a/src/operator/subgraph/build_subgraph.cc
+++ b/src/operator/subgraph/build_subgraph.cc
@@ -52,8 +52,9 @@ void PrintSubgraph(const std::vector<BiDirectedNode*>& simple_nodes) {
 }
 
 void PrintNodeEntry(const nnvm::NodeEntry& entry) {
-  std::string ret = "NodeEntry: node_name=" + entry.node->attrs.name
-    + ", index=" + std::to_string(entry.index) + ", version=" + std::to_string(entry.version);
+  std::string ret = "NodeEntry: node_name=" + entry.node->attrs.name +
+                    ", index=" + std::to_string(entry.index) +
+                    ", version=" + std::to_string(entry.version);
   LOG(INFO) << ret;
 }
 
@@ -69,19 +70,18 @@ void PrintNodeEntries(const std::vector<nnvm::NodeEntry*>& entries) {
  * \param g the MXNet computational graph
  * \param simple_nodes the nodes of undirected graph in top sorted order
  */
-void CreateSimpleGraph(const nnvm::Graph& g,
-                       std::vector<BiDirectedNodePtr>* simple_nodes) {
+void CreateSimpleGraph(const nnvm::Graph& g, std::vector<BiDirectedNodePtr>* simple_nodes) {
   const auto& indexed_graph = g.indexed_graph();
   simple_nodes->reserve(indexed_graph.num_nodes());
   DFSVisit(g.outputs, [&](const nnvm::ObjectPtr& node) {
     BiDirectedNodePtr sn = BiDirectedNode::Create();
-    sn->node = node.get();
+    sn->node             = node.get();
     for (size_t i = 0; i < sn->node->inputs.size(); ++i) {
-      const auto& e = sn->node->inputs[i];
+      const auto& e        = sn->node->inputs[i];
       const auto input_nid = indexed_graph.node_id(e.node.get());
       CHECK_LT(input_nid, simple_nodes->size());
       auto& input_node_outputs = (*simple_nodes)[input_nid]->outputs;
-      auto it = input_node_outputs.find(sn->node);
+      auto it                  = input_node_outputs.find(sn->node);
       if (it == input_node_outputs.end()) {
         input_node_outputs.emplace(sn->node, std::vector<size_t>{i});
       } else {
@@ -100,7 +100,7 @@ void ResetNodeLabels(const nnvm::Graph& g,
                      const std::vector<BiDirectedNodePtr>& simple_nodes,
                      std::vector<BiDirectedNode*>* subgraph_nodes) {
   for (auto n : *subgraph_nodes) {
-    const auto nid = g.indexed_graph().node_id(n->node);
+    const auto nid           = g.indexed_graph().node_id(n->node);
     simple_nodes[nid]->label = -1;
   }
   subgraph_nodes->clear();
@@ -113,11 +113,11 @@ static const std::shared_ptr<NodeAttr> PrepareNodeAttr(const nnvm::Graph& g,
                                                        const BiDirectedNode& node) {
   const auto& indexed_graph = g.indexed_graph();
   if (g.HasAttr("dtype") && g.HasAttr("shape") && g.HasAttr("dispatch_mode")) {
-    const auto& vdtype = g.GetAttr<nnvm::DTypeVector>("dtype");
-    const auto& vshape = g.GetAttr<mxnet::ShapeVector>("shape");
+    const auto& vdtype         = g.GetAttr<nnvm::DTypeVector>("dtype");
+    const auto& vshape         = g.GetAttr<mxnet::ShapeVector>("shape");
     const auto& dispatch_modes = g.GetAttr<mxnet::DispatchModeVector>("dispatch_mode");
-    auto ret = std::make_shared<NodeAttr>();
-    ret->dispatch_mode = dispatch_modes[indexed_graph.node_id(node.node)];
+    auto ret                   = std::make_shared<NodeAttr>();
+    ret->dispatch_mode         = dispatch_modes[indexed_graph.node_id(node.node)];
     for (const auto& e : node.node->inputs) {
       ret->ishape.emplace_back(vshape[indexed_graph.entry_id(e)]);
       ret->itype.emplace_back(vdtype[indexed_graph.entry_id(e)]);
@@ -136,10 +136,10 @@ static const std::shared_ptr<NodeAttr> PrepareNodeAttr(const nnvm::Graph& g,
  * \return true if the subgraph has external input, false otherwise.
  */
 bool HasInputEntries(const nnvm::Graph& g,
-                      const std::vector<BiDirectedNodePtr>& simple_nodes,
-                      const std::vector<BiDirectedNode*>& subgraph_nodes) {
+                     const std::vector<BiDirectedNodePtr>& simple_nodes,
+                     const std::vector<BiDirectedNode*>& subgraph_nodes) {
   const auto& indexed_graph = g.indexed_graph();
-  int label = -1;
+  int label                 = -1;
   for (auto subgraph_node : subgraph_nodes) {
     if (label == -1) {
       label = subgraph_node->label;
@@ -147,7 +147,7 @@ bool HasInputEntries(const nnvm::Graph& g,
       CHECK_EQ(subgraph_node->label, label);
     }
     auto& inputs = subgraph_node->node->inputs;
-    for (auto &e : inputs) {
+    for (auto& e : inputs) {
       if (indexed_graph.exist(e.node.get())) {
         // e's source node is not a subgraph node
         const auto nid = indexed_graph.node_id(e.node.get());
@@ -180,8 +180,11 @@ bool HasInputEntries(const nnvm::Graph& g,
  * \subgraph_nodes all the nodes belonging to the same subgraph of seed node
  * \excluded_nodes set of nodes that should be excluded from the current subgraph
  */
-bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector, const int label,
-                   const size_t snid, const std::vector<BiDirectedNodePtr>& simple_nodes,
+bool LabelSubgraph(const nnvm::Graph& g,
+                   SubgraphSelectorV2Ptr subgraph_selector,
+                   const int label,
+                   const size_t snid,
+                   const std::vector<BiDirectedNodePtr>& simple_nodes,
                    std::vector<BiDirectedNode*>* subgraph_nodes,
                    std::unordered_set<const BiDirectedNode*>* excluded_nodes) {
   const auto& indexed_graph = g.indexed_graph();
@@ -199,8 +202,8 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
   // When breaking the cycle, we want to start from removing the node with the largest node id
   // in the subgraph.
   std::unordered_map<const nnvm::Node*,
-    std::pair<std::vector<const nnvm::Node*>,
-              std::vector<const nnvm::Node*>>> non_subgraph_node_map;
+                     std::pair<std::vector<const nnvm::Node*>, std::vector<const nnvm::Node*>>>
+      non_subgraph_node_map;
   while (!node_queue.empty()) {
     BiDirectedNode* cur_node = node_queue.front();
     node_queue.pop();
@@ -208,8 +211,8 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
     // get qualified adjacent input nodes
     for (auto& e : cur_node->node->inputs) {
       const auto node = e.node.get();
-      const auto nid = indexed_graph.node_id(node);
-      auto snode = simple_nodes[nid].get();
+      const auto nid  = indexed_graph.node_id(node);
+      auto snode      = simple_nodes[nid].get();
       CHECK_LT(nid, simple_nodes.size());
       const bool select_input =
           (snode->label == -1) && (!excluded_nodes || !excluded_nodes->count(snode)) &&
@@ -226,7 +229,7 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
     // get qualified output nodes
     for (auto it = cur_node->outputs.begin(); it != cur_node->outputs.end(); ++it) {
       const auto nid = indexed_graph.node_id(it->first);
-      auto snode = simple_nodes[nid].get();
+      auto snode     = simple_nodes[nid].get();
       CHECK_LT(nid, simple_nodes.size());
       const bool select_output =
           (snode->label == -1) && (!excluded_nodes || !excluded_nodes->count(snode)) &&
@@ -242,7 +245,7 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
     }
   }
   // prepare to check if there is a cycle
-  auto node_cmp = [&] (const nnvm::Node* node1, const nnvm::Node* node2) {
+  auto node_cmp = [&](const nnvm::Node* node1, const nnvm::Node* node2) {
     return indexed_graph.node_id(node1) < indexed_graph.node_id(node2);
   };
   std::vector<const nnvm::Node*> non_subgraph_nodes;
@@ -255,9 +258,11 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
     non_subgraph_nodes.push_back(kv.first);
   }
   // check whether there is a cycle between the subgraph and its input/output nodes
-  auto is_ancestor = [&](const nnvm::Node* ancestor, const nnvm::Node* descendant,
+  auto is_ancestor = [&](const nnvm::Node* ancestor,
+                         const nnvm::Node* descendant,
                          const std::vector<BiDirectedNode*>& snodes) {
-    if (ancestor == descendant) return true;
+    if (ancestor == descendant)
+      return true;
     std::unordered_set<nnvm::Node*> snode_set;
     for (const auto& sn : snodes) {
       snode_set.insert(sn->node);
@@ -286,13 +291,13 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
   for (size_t i = 0; i < non_subgraph_nodes.size(); ++i) {
     auto it1 = non_subgraph_node_map.find(non_subgraph_nodes[i]);
     CHECK(it1 != non_subgraph_node_map.end());
-    auto& output_nodes = it1->second.first;  // has been top sorted
-    auto& input_nodes = it1->second.second;  // has been top sorted
+    auto& output_nodes = it1->second.first;   // has been top sorted
+    auto& input_nodes  = it1->second.second;  // has been top sorted
     if (!output_nodes.empty() && !input_nodes.empty()) {
       // there is a loop between node i and the subgraph
       const auto node_id = std::max(indexed_graph.node_id(output_nodes.back()),
                                     indexed_graph.node_id(input_nodes.back()));
-      excluded_node_id = std::max(excluded_node_id, static_cast<int>(node_id));
+      excluded_node_id   = std::max(excluded_node_id, static_cast<int>(node_id));
     } else if (!input_nodes.empty()) {
       // node i is an input to the subgraph, find out if there is a node j
       // which is an output of the subgraph and also a child of node i.
@@ -305,7 +310,7 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
           // found a loop
           const auto node_id = std::max(indexed_graph.node_id(input_nodes.back()),
                                         indexed_graph.node_id(it2->second.first.back()));
-          excluded_node_id = std::max(excluded_node_id, static_cast<int>(node_id));
+          excluded_node_id   = std::max(excluded_node_id, static_cast<int>(node_id));
         }
       }
     }
@@ -317,7 +322,7 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
     ResetNodeLabels(g, simple_nodes, subgraph_nodes);
     return false;
   }
-  auto sim_node_cmp = [&] (const BiDirectedNode* node1, const BiDirectedNode* node2) {
+  auto sim_node_cmp = [&](const BiDirectedNode* node1, const BiDirectedNode* node2) {
     return indexed_graph.node_id(node1->node) < indexed_graph.node_id(node2->node);
   };
   std::sort(subgraph_nodes->begin(), subgraph_nodes->end(), sim_node_cmp);
@@ -334,18 +339,20 @@ bool LabelSubgraph(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector
  * \subgraph_nodes all the nodes belonging to the same subgraph of seed node
  * \return Subgraph node candidates sorted in the topological order
  */
-void PreSelectSubgraphNodes(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph_selector,
-                            const int label, const size_t snid,
+void PreSelectSubgraphNodes(const nnvm::Graph& g,
+                            SubgraphSelectorV2Ptr subgraph_selector,
+                            const int label,
+                            const size_t snid,
                             const std::vector<BiDirectedNodePtr>& simple_nodes,
                             std::vector<BiDirectedNode*>* subgraph_nodes) {
   std::unordered_set<const BiDirectedNode*> excluded_nodes;
-  size_t n_excluded_nodes = 0;
+  size_t n_excluded_nodes    = 0;
   const size_t max_num_retry = simple_nodes.size() * simple_nodes.size();
-  size_t count = 0;
-  bool success = false;
+  size_t count               = 0;
+  bool success               = false;
   while (!success && count < max_num_retry) {
-    success = LabelSubgraph(g, subgraph_selector, label, snid, simple_nodes, subgraph_nodes,
-                            &excluded_nodes);
+    success = LabelSubgraph(
+        g, subgraph_selector, label, snid, simple_nodes, subgraph_nodes, &excluded_nodes);
     if (!success) {
       // Failed to label subgraph due to a cycle
       // If the number of excluded_nodes didn't change since the last iteration,
@@ -373,8 +380,8 @@ void PreSelectSubgraphNodes(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph
     // to make sure the subgraph gets external input.
     // this feature can be switched off by setting require_subgraph_inputs to false
     const SubgraphPropertyPtr& subg_prop = g.GetAttr<SubgraphPropertyPtr>("subgraph_property");
-    if (subg_prop->HasAttr("require_subgraph_inputs")
-        && subg_prop->GetAttr<bool>("require_subgraph_inputs")) {
+    if (subg_prop->HasAttr("require_subgraph_inputs") &&
+        subg_prop->GetAttr<bool>("require_subgraph_inputs")) {
       if (subgraph_nodes->size() > 0 && !HasInputEntries(g, simple_nodes, *subgraph_nodes)) {
         // relabel the node to -1
         (*subgraph_nodes)[0]->label = -1;
@@ -394,22 +401,25 @@ void PreSelectSubgraphNodes(const nnvm::Graph& g, SubgraphSelectorV2Ptr subgraph
   }
 }
 
-void SelectSubgraphNodes(nnvm::Graph* g, SubgraphSelectorV2Ptr subgraph_selector,
+void SelectSubgraphNodes(nnvm::Graph* g,
+                         SubgraphSelectorV2Ptr subgraph_selector,
                          const std::vector<BiDirectedNodePtr>& simple_nodes,
                          std::vector<std::vector<BiDirectedNode*>>* subgraph_nodes,
                          std::vector<SubgraphSelectorV2Ptr>* subgraph_selectors,
-                         const BiDirectedNode* node, const size_t snid, size_t* subgraph_id) {
+                         const BiDirectedNode* node,
+                         const size_t snid,
+                         size_t* subgraph_id) {
   const auto& indexed_graph = g->indexed_graph();
 
-  auto node_cmp = [&] (const BiDirectedNode* node1, const BiDirectedNode* node2) {
+  auto node_cmp = [&](const BiDirectedNode* node1, const BiDirectedNode* node2) {
     return indexed_graph.node_id(node1->node) < indexed_graph.node_id(node2->node);
   };
   if ((simple_nodes[snid]->label == -1) &&
       subgraph_selector->Select(*node, PrepareNodeAttr(*g, *node))) {
     // pre-select nodes that can be grouped in a subgraph
     std::vector<BiDirectedNode*> preselected_nodes;
-    PreSelectSubgraphNodes(*g, subgraph_selector, *subgraph_id, snid, simple_nodes,
-                            &preselected_nodes);
+    PreSelectSubgraphNodes(
+        *g, subgraph_selector, *subgraph_id, snid, simple_nodes, &preselected_nodes);
 
     // filter out unqualified pre-selected nodes
     std::vector<BiDirectedNode*> filtered_nodes = subgraph_selector->Filter(preselected_nodes);
@@ -447,7 +457,7 @@ void SelectSubgraphNodes(nnvm::Graph* g, SubgraphSelectorV2Ptr subgraph_selector
  * All nodes in a subgraph are marked with the same label.
  */
 void FindSubgraphs(nnvm::Graph* g,
-                   const SubgraphProperty &subg_prop,
+                   const SubgraphProperty& subg_prop,
                    const std::vector<BiDirectedNodePtr>& simple_nodes,
                    std::vector<std::vector<BiDirectedNode*>>* subgraph_nodes,
                    std::vector<SubgraphSelectorV2Ptr>* subgraph_selectors) {
@@ -456,10 +466,16 @@ void FindSubgraphs(nnvm::Graph* g,
 
   size_t subgraph_id = 0;
   for (size_t i = 0; i < simple_nodes.size(); ++i) {
-    const auto snode = simple_nodes[i];
+    const auto snode                        = simple_nodes[i];
     SubgraphSelectorV2Ptr subgraph_selector = subg_prop.CreateSubgraphSelectorV2();
-    SelectSubgraphNodes(g, subgraph_selector, simple_nodes, subgraph_nodes, subgraph_selectors,
-                        snode.get(), i, &subgraph_id);
+    SelectSubgraphNodes(g,
+                        subgraph_selector,
+                        simple_nodes,
+                        subgraph_nodes,
+                        subgraph_selectors,
+                        snode.get(),
+                        i,
+                        &subgraph_id);
   }
 }
 
@@ -495,7 +511,7 @@ void FindInputEntries(const nnvm::Graph& g,
                       const std::unordered_map<const nnvm::NodeEntry*, size_t>& entry_top_order_map,
                       std::vector<nnvm::NodeEntry*>* input_entries) {
   const auto& indexed_graph = g.indexed_graph();
-  int label = -1;
+  int label                 = -1;
   for (auto subgraph_node : subgraph_nodes) {
     if (label == -1) {
       label = subgraph_node->label;
@@ -503,7 +519,7 @@ void FindInputEntries(const nnvm::Graph& g,
       CHECK_EQ(subgraph_node->label, label);
     }
     auto& inputs = subgraph_node->node->inputs;
-    for (auto &e : inputs) {
+    for (auto& e : inputs) {
       if (indexed_graph.exist(e.node.get())) {
         // e's source node is not a subgraph node
         const auto nid = indexed_graph.node_id(e.node.get());
@@ -529,22 +545,23 @@ void FindInputEntries(const nnvm::Graph& g,
  * \param entry_top_order_map mapping entry pointer to its top sorted position
  * \param output_entries output entries of the subgraph
  */
-void FindOutputEntries(nnvm::Graph* g,
-                       const std::vector<BiDirectedNodePtr>& simple_nodes,
-                       const std::vector<BiDirectedNode*>& subgraph_nodes,
-                       const std::unordered_map<const nnvm::NodeEntry*, size_t>&
-                         entry_top_order_map,
-                       std::vector<nnvm::NodeEntry*>* output_entries) {
-  if (subgraph_nodes.empty()) return;
+void FindOutputEntries(
+    nnvm::Graph* g,
+    const std::vector<BiDirectedNodePtr>& simple_nodes,
+    const std::vector<BiDirectedNode*>& subgraph_nodes,
+    const std::unordered_map<const nnvm::NodeEntry*, size_t>& entry_top_order_map,
+    std::vector<nnvm::NodeEntry*>* output_entries) {
+  if (subgraph_nodes.empty())
+    return;
   const auto& indexed_graph = g->indexed_graph();
-  int label = -1;
+  int label                 = -1;
   for (auto subgraph_node : subgraph_nodes) {
     if (label == -1) {
       label = subgraph_node->label;
     } else {
       CHECK_EQ(subgraph_node->label, label);
     }
-    for (auto &output_node : subgraph_node->outputs) {
+    for (auto& output_node : subgraph_node->outputs) {
       if (indexed_graph.exist(output_node.first)) {
         // if the output node is a normal graph node (not a subgraph node)
         const auto nid = indexed_graph.node_id(output_node.first);
@@ -566,7 +583,7 @@ void FindOutputEntries(nnvm::Graph* g,
   }
   // Check if current subgraph contains a node which is the last node
   // of the whole graph. If so, save its corresponding entry as well.
-  for (auto &entry : g->outputs) {
+  for (auto& entry : g->outputs) {
     // The entry might has been updated as an output of
     // a subgraph node. In this case, no need
     // to check its source for the current subgraph. Otherwise,
@@ -587,19 +604,19 @@ void FindOutputEntries(nnvm::Graph* g,
  * subgraph. It returns the nodes that connect to the subgraph directly and
  * the names of the new variable nodes.
  */
-void CutGraphInputs(const std::vector<nnvm::NodeEntry*> &input_entries,
-                    std::vector<nnvm::NodeEntry> *orig_entries,
-                    std::vector<nnvm::NodeEntry> *unique_orig_entries,
-                    std::vector<nnvm::NodeEntry*> *unique_input_entries,
+void CutGraphInputs(const std::vector<nnvm::NodeEntry*>& input_entries,
+                    std::vector<nnvm::NodeEntry>* orig_entries,
+                    std::vector<nnvm::NodeEntry>* unique_orig_entries,
+                    std::vector<nnvm::NodeEntry*>* unique_input_entries,
                     const bool skip_var = false,
-                    const bool dedup = false) {
+                    const bool dedup    = false) {
   orig_entries->resize(input_entries.size());
   // map for creating unique var nodes for deduplicating entries from the same node
   std::unordered_map<std::string, nnvm::NodeEntry> name_map;
   std::unordered_map<std::string, int> name_count_map;
 
   for (size_t i = 0; i < input_entries.size(); ++i) {
-    nnvm::NodeEntry *e = input_entries[i];
+    nnvm::NodeEntry* e = input_entries[i];
     // If the node is a variable itself, we may want to skip the node.
     if (e->node->is_variable() && skip_var) {
       continue;
@@ -628,8 +645,8 @@ void CutGraphInputs(const std::vector<nnvm::NodeEntry*> &input_entries,
     if (dedup) {
       *e = name_map[var_name];
     } else {
-      nnvm::ObjectPtr n = nnvm::CreateVariableNode(
-        var_name + std::to_string(name_count_map[var_name]));
+      nnvm::ObjectPtr n =
+          nnvm::CreateVariableNode(var_name + std::to_string(name_count_map[var_name]));
       *e = nnvm::NodeEntry{n, 0, 0};
     }
   }
@@ -640,11 +657,11 @@ void CutGraphInputs(const std::vector<nnvm::NodeEntry*> &input_entries,
  * by CutGraphInputs. This function is used when subgraphs are rejected, it
  * reattaches the subgraph back to the main graph where it was cut earlier.
  */
-void ReattachGraphInputs(const std::vector<nnvm::NodeEntry*> &input_entries,
-                         std::vector<nnvm::NodeEntry> *orig_entries) {
+void ReattachGraphInputs(const std::vector<nnvm::NodeEntry*>& input_entries,
+                         std::vector<nnvm::NodeEntry>* orig_entries) {
   for (size_t i = 0; i < input_entries.size(); ++i) {
-    nnvm::NodeEntry *e = input_entries[i];
-    *e = orig_entries->at(i);
+    nnvm::NodeEntry* e = input_entries[i];
+    *e                 = orig_entries->at(i);
   }
 }
 
@@ -664,11 +681,15 @@ void CreateSubgraphNode(nnvm::Graph* g,
   bool dedup_subgraph = g->HasAttr("dedup_subgraph");
   std::vector<nnvm::NodeEntry*> input_entries;  // nodes that produce inputs to subgraph nodes
   FindInputEntries(*g, simple_nodes, subgraph_nodes, *entry_top_order_map, &input_entries);
-  std::vector<nnvm::NodeEntry> orig_input_entries;  // original input entries (dupes)
-  std::vector<nnvm::NodeEntry> unique_orig_entries;  // unique original input entries
+  std::vector<nnvm::NodeEntry> orig_input_entries;     // original input entries (dupes)
+  std::vector<nnvm::NodeEntry> unique_orig_entries;    // unique original input entries
   std::vector<nnvm::NodeEntry*> unique_input_entries;  // unique modified subgraph inputs
-  CutGraphInputs(input_entries, &orig_input_entries, &unique_orig_entries,
-                 &unique_input_entries, false, dedup_subgraph);
+  CutGraphInputs(input_entries,
+                 &orig_input_entries,
+                 &unique_orig_entries,
+                 &unique_input_entries,
+                 false,
+                 dedup_subgraph);
 #if DEBUG_SUBGRAPH
   PrintNodeEntries(input_entries);
   LOG(INFO) << "Searching for output entries...";
@@ -696,7 +717,7 @@ void CreateSubgraphNode(nnvm::Graph* g,
     }
   }
   if (dedup_subgraph)
-    sym.outputs.resize(idx+1);
+    sym.outputs.resize(idx + 1);
 
   const SubgraphPropertyPtr& subg_prop = g->GetAttr<SubgraphPropertyPtr>("subgraph_property");
   if (dedup_subgraph)
@@ -724,7 +745,7 @@ void CreateSubgraphNode(nnvm::Graph* g,
       // update input entries' source simple nodes' outputs map
       nnvm::Node* node = e.node.get();
       if (indexed_graph.exist(node)) {
-        const auto nid = indexed_graph.node_id(node);
+        const auto nid     = indexed_graph.node_id(node);
         BiDirectedNode* sn = simple_nodes[nid].get();
         for (BiDirectedNode* dest_node : subgraph_nodes) {
           sn->outputs.erase(dest_node->node);
@@ -777,7 +798,7 @@ void TopSortEntries(const nnvm::Graph& g,
   std::unordered_set<const nnvm::Node*> visited;
   // tuple: (graph node, index of node's inputs, node entry as the output of the graph node)
   std::stack<std::tuple<nnvm::Node*, size_t, const nnvm::NodeEntry*>> s;
-  auto in_degree = [] (const nnvm::Node* node)->size_t {
+  auto in_degree = [](const nnvm::Node* node) -> size_t {
     if (!node) {
       return 0;
     }
@@ -803,7 +824,7 @@ void TopSortEntries(const nnvm::Graph& g,
       } else {
         // The node still has input entries not visited.
         CHECK_LT(std::get<1>(top), std::get<0>(top)->inputs.size());
-        auto& entry = std::get<0>(top)->inputs[std::get<1>(top)++];
+        auto& entry            = std::get<0>(top)->inputs[std::get<1>(top)++];
         nnvm::Node* input_node = entry.node.get();
         if (visited.count(input_node) == 0U) {
           // The entry's source node has not been visited.
@@ -821,7 +842,7 @@ void TopSortEntries(const nnvm::Graph& g,
 }
 
 nnvm::Graph BuildSubgraph(nnvm::Graph&& g) {
-    static int verbose = dmlc::GetEnv("MXNET_SUBGRAPH_VERBOSE", 1);
+  static int verbose = dmlc::GetEnv("MXNET_SUBGRAPH_VERBOSE", 1);
   if (!g.HasAttr("subgraph_property")) {  // treat the whole graph as a subgraph
     if (verbose > 1) {
       LOG(INFO) << "The graph has no attribute of subgraph_property attached. "
@@ -857,8 +878,8 @@ nnvm::Graph BuildSubgraph(nnvm::Graph&& g) {
 #endif
     auto ptype = subg_prop->GetPropertyType();
     if (ptype == SubgraphProperty::SgPropertyType::kCreate) {
-      CreateSubgraphNode(&g, simple_nodes, subgraph_nodes[i], subgraph_selectors[i], i,
-                         &entry_top_order_map);
+      CreateSubgraphNode(
+          &g, simple_nodes, subgraph_nodes[i], subgraph_selectors[i], i, &entry_top_order_map);
     } else {
       CHECK_EQ(ptype, SubgraphProperty::SgPropertyType::kAdjust);
       AdjustSubgraphNode(&g, subgraph_nodes[i], subgraph_selectors[i], i);
@@ -868,11 +889,11 @@ nnvm::Graph BuildSubgraph(nnvm::Graph&& g) {
 }
 
 NNVM_REGISTER_PASS(BuildSubgraph)
-.describe("Apply a subgraph pass according to the user defined rules "
-          "in a derived class of SubgraphProperty")
-.set_body(BuildSubgraph)
-.set_change_graph(true);
-
+    .describe(
+        "Apply a subgraph pass according to the user defined rules "
+        "in a derived class of SubgraphProperty")
+    .set_body(BuildSubgraph)
+    .set_change_graph(true);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/subgraph/common.h b/src/operator/subgraph/common.h
index 5550ad284751..c2781faaf2e1 100644
--- a/src/operator/subgraph/common.h
+++ b/src/operator/subgraph/common.h
@@ -50,32 +50,32 @@ inline std::vector<std::string> DefaultSubgraphOpListOutputs(const nnvm::NodeAtt
 }
 
 inline bool DefaultSubgraphOpShapeHelper(const nnvm::Symbol& subgraph_sym,
-                                         mxnet::ShapeVector *in_shapes,
-                                         mxnet::ShapeVector *out_shapes) {
+                                         mxnet::ShapeVector* in_shapes,
+                                         mxnet::ShapeVector* out_shapes) {
   using namespace exec;
   nnvm::Graph g;
-  g.outputs = subgraph_sym.outputs;
+  g.outputs         = subgraph_sym.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_shapes->size());
   CHECK_EQ(idx_g.outputs().size(), out_shapes->size());
 
   // Put the input and output shapes to the shape vector.
   mxnet::ShapeVector shapes(idx_g.num_node_entries());
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_shapes->size());
   for (size_t i = 0; i < in_shapes->size(); i++) {
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto eid    = idx_g.entry_id(input_nids[i], 0);
     shapes[eid] = in_shapes->at(i);
   }
   CHECK_EQ(g.outputs.size(), out_shapes->size());
   for (size_t i = 0; i < out_shapes->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid    = idx_g.entry_id(g.outputs[i]);
     shapes[eid] = out_shapes->at(i);
   }
 
   // Infer shape of the graph.
   g.attrs["shape"] = std::make_shared<dmlc::any>(std::move(shapes));
-  g = exec::InferShape(std::move(g));
+  g                = exec::InferShape(std::move(g));
 
   // Copy the inferred shape back to the input shapes and the output shapes.
   shapes = g.GetAttr<mxnet::ShapeVector>("shape");
@@ -94,37 +94,37 @@ inline bool DefaultSubgraphOpShapeHelper(const nnvm::Symbol& subgraph_sym,
 }
 
 inline bool DefaultSubgraphOpShape(const nnvm::NodeAttrs& attrs,
-                                   mxnet::ShapeVector *in_shapes,
-                                   mxnet::ShapeVector *out_shapes) {
+                                   mxnet::ShapeVector* in_shapes,
+                                   mxnet::ShapeVector* out_shapes) {
   return DefaultSubgraphOpShapeHelper(*attrs.subgraphs[0], in_shapes, out_shapes);
 }
 
 inline bool DefaultSubgraphOpTypeHelper(const nnvm::Symbol& subgraph_sym,
-                                        std::vector<int> *in_types,
-                                        std::vector<int> *out_types) {
+                                        std::vector<int>* in_types,
+                                        std::vector<int>* out_types) {
   nnvm::Graph g;
-  g.outputs = subgraph_sym.outputs;
+  g.outputs         = subgraph_sym.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_types->size());
   CHECK_EQ(idx_g.outputs().size(), out_types->size());
 
   // Put the input and output data types to the dtype vector.
   nnvm::DTypeVector types(idx_g.num_node_entries(), -1);
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_types->size());
   for (size_t i = 0; i < in_types->size(); i++) {
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto eid   = idx_g.entry_id(input_nids[i], 0);
     types[eid] = in_types->at(i);
   }
   CHECK_EQ(g.outputs.size(), out_types->size());
   for (size_t i = 0; i < out_types->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid   = idx_g.entry_id(g.outputs[i]);
     types[eid] = out_types->at(i);
   }
 
   // Infer data type of the graph.
   g.attrs["dtype"] = std::make_shared<dmlc::any>(std::move(types));
-  g = exec::InferType(std::move(g));
+  g                = exec::InferType(std::move(g));
 
   types = g.GetAttr<nnvm::DTypeVector>("dtype");
   // assign to in_types
@@ -142,8 +142,8 @@ inline bool DefaultSubgraphOpTypeHelper(const nnvm::Symbol& subgraph_sym,
 }
 
 inline bool DefaultSubgraphOpType(const nnvm::NodeAttrs& attrs,
-                                  std::vector<int> *in_types,
-                                  std::vector<int> *out_types) {
+                                  std::vector<int>* in_types,
+                                  std::vector<int>* out_types) {
   return DefaultSubgraphOpTypeHelper(*attrs.subgraphs[0], in_types, out_types);
 }
 
@@ -153,7 +153,7 @@ inline bool DefaultSubgraphOpStorageTypeHelper(const nnvm::Symbol& subgraph_sym,
                                                std::vector<int>* in_stypes,
                                                std::vector<int>* out_stypes) {
   nnvm::Graph g;
-  g.outputs = subgraph_sym.outputs;
+  g.outputs         = subgraph_sym.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_stypes->size());
   CHECK_EQ(idx_g.outputs().size(), out_stypes->size());
@@ -161,26 +161,26 @@ inline bool DefaultSubgraphOpStorageTypeHelper(const nnvm::Symbol& subgraph_sym,
 
   // Put the input and output storages to the storage vector.
   StorageTypeVector stypes(idx_g.num_node_entries(), kUndefinedStorage);
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_stypes->size());
   for (size_t i = 0; i < in_stypes->size(); i++) {
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto eid    = idx_g.entry_id(input_nids[i], 0);
     stypes[eid] = in_stypes->at(i);
   }
   CHECK_EQ(g.outputs.size(), out_stypes->size());
   for (size_t i = 0; i < out_stypes->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid    = idx_g.entry_id(g.outputs[i]);
     stypes[eid] = out_stypes->at(i);
   }
 
   // Infer storage type of the graph.
-  bool dev_match = g.attrs.count("dev_mask") &&
-                   g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_masks;
+  bool dev_match =
+      g.attrs.count("dev_mask") && g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_masks;
   if (!dev_match) {
     g.attrs["dev_mask"] = std::make_shared<dmlc::any>(std::move(dev_masks));
   }
   g.attrs["storage_type"] = std::make_shared<dmlc::any>(std::move(stypes));
-  g = exec::InferStorageType(std::move(g));
+  g                       = exec::InferStorageType(std::move(g));
 
   stypes = g.GetAttr<StorageTypeVector>("storage_type");
   // assign to in_types
@@ -204,8 +204,8 @@ inline bool DefaultSubgraphOpStorageType(const nnvm::NodeAttrs& attrs,
                                          DispatchMode* dispatch_mode,
                                          std::vector<int>* in_stypes,
                                          std::vector<int>* out_stypes) {
-  return DefaultSubgraphOpStorageTypeHelper(*attrs.subgraphs[0], dev_mask, dispatch_mode,
-                                            in_stypes, out_stypes);
+  return DefaultSubgraphOpStorageTypeHelper(
+      *attrs.subgraphs[0], dev_mask, dispatch_mode, in_stypes, out_stypes);
 }
 
 inline ExecType DefaultSubgraphOpExecType(const nnvm::NodeAttrs& attrs) {
@@ -213,12 +213,12 @@ inline ExecType DefaultSubgraphOpExecType(const nnvm::NodeAttrs& attrs) {
 }
 
 inline std::vector<uint32_t> DefaultSubgraphOpMutableInputsHelper(
-  const nnvm::Symbol& subgraph_sym) {
+    const nnvm::Symbol& subgraph_sym) {
   const std::vector<std::string> input_names = subgraph_sym.ListInputNames(nnvm::Symbol::kAll);
   const std::vector<std::string> immutable_input_names =
-    subgraph_sym.ListInputNames(nnvm::Symbol::kReadOnlyArgs);
+      subgraph_sym.ListInputNames(nnvm::Symbol::kReadOnlyArgs);
   const std::vector<std::string> mutable_input_names =
-    subgraph_sym.ListInputNames(nnvm::Symbol::kAuxiliaryStates);
+      subgraph_sym.ListInputNames(nnvm::Symbol::kAuxiliaryStates);
   CHECK_EQ(immutable_input_names.size() + mutable_input_names.size(), input_names.size());
   std::vector<uint32_t> ret;
   size_t i1 = 0, i2 = 0;
@@ -245,7 +245,7 @@ inline std::vector<ResourceRequest> DefaultSubgraphOpResourceRequestHelper(
   std::set<ResourceRequest::Type> resource_types;
   DFSVisit(subgraph_sym.outputs, [&](const nnvm::ObjectPtr& node) {
     if (!node->is_variable() && fresource.count(node->op())) {
-      for (ResourceRequest& r : fresource[node->op()](node->attrs)){
+      for (ResourceRequest& r : fresource[node->op()](node->attrs)) {
         resource_types.insert(r.type);
       }
     }
diff --git a/src/operator/subgraph/default_subgraph_property.cc b/src/operator/subgraph/default_subgraph_property.cc
index ff51b6397c04..576e5c1dabf0 100644
--- a/src/operator/subgraph/default_subgraph_property.cc
+++ b/src/operator/subgraph/default_subgraph_property.cc
@@ -30,22 +30,23 @@ namespace op {
  * This selects nodes for a subgraph that only contains operators
  * in a given set and it visits nodes via both input and output links.
  */
-class ContainOpSelector: public SubgraphSelector {
+class ContainOpSelector : public SubgraphSelector {
  public:
   explicit ContainOpSelector(const std::unordered_set<std::string>& op_names)
-    : op_names_(op_names) {}
+      : op_names_(op_names) {}
 
-  bool Select(const nnvm::Node &seed_node) override {
+  bool Select(const nnvm::Node& seed_node) override {
     return !seed_node.is_variable() && op_names_.count(seed_node.op()->name);
   }
 
-  bool SelectInput(const nnvm::Node &cur_node, const nnvm::Node &input_node) override {
+  bool SelectInput(const nnvm::Node& cur_node, const nnvm::Node& input_node) override {
     return !input_node.is_variable() && op_names_.count(input_node.op()->name);
   }
 
-  bool SelectOutput(const nnvm::Node &cur_node, const nnvm::Node &output_node) override {
+  bool SelectOutput(const nnvm::Node& cur_node, const nnvm::Node& output_node) override {
     return !output_node.is_variable() && op_names_.count(output_node.op()->name);
   }
+
  private:
   const std::unordered_set<std::string>& op_names_;
 };
@@ -54,17 +55,19 @@ class ContainOpSelector: public SubgraphSelector {
  * This subgraph property finds a subgraph whose nodes have only operators
  * within a set. The operators in the subgraph will be executed by _CachedOp.
  */
-class DefaultSubgraphProperty: public SubgraphProperty {
+class DefaultSubgraphProperty : public SubgraphProperty {
  public:
-  static SubgraphPropertyPtr Create() { return std::make_shared<DefaultSubgraphProperty>(); }
-  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol &sym,
-                                           const int subgraph_id = 0) const override {
+  static SubgraphPropertyPtr Create() {
+    return std::make_shared<DefaultSubgraphProperty>();
+  }
+  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
+                                     const int subgraph_id = 0) const override {
     nnvm::ObjectPtr n = nnvm::Node::Create();
-    n->attrs.op = Op::Get("_CachedOp");
-    n->attrs.name = "_CachedOp" + std::to_string(subgraph_id);
+    n->attrs.op       = Op::Get("_CachedOp");
+    n->attrs.name     = "_CachedOp" + std::to_string(subgraph_id);
     n->attrs.subgraphs.push_back(std::make_shared<nnvm::Symbol>(sym));
 
-    std::vector<std::pair<std::string, std::string> > flags{{"static_alloc", "true"}};
+    std::vector<std::pair<std::string, std::string>> flags{{"static_alloc", "true"}};
     n->attrs.parsed = std::make_shared<CachedOp>(sym, flags);
 
     return n;
diff --git a/src/operator/subgraph/default_subgraph_property_v2.cc b/src/operator/subgraph/default_subgraph_property_v2.cc
index 7c942300ad12..c4cc9fe433c1 100644
--- a/src/operator/subgraph/default_subgraph_property_v2.cc
+++ b/src/operator/subgraph/default_subgraph_property_v2.cc
@@ -17,7 +17,6 @@
  * under the License.
  */
 
-
 #include <memory>
 
 #include "./common.h"
@@ -31,25 +30,26 @@ namespace op {
  * This selects nodes for a subgraph that only contains operators
  * in a given set and it visits nodes via both input and output links.
  */
-class ContainOpSelectorV2: public SubgraphSelectorV2 {
+class ContainOpSelectorV2 : public SubgraphSelectorV2 {
  public:
   explicit ContainOpSelectorV2(const std::unordered_set<std::string>& op_names)
-    : op_names_(op_names) {}
+      : op_names_(op_names) {}
 
-  bool Select(const BiDirectedNode &sn) override {
-    const auto &seed_node = *sn.node;
+  bool Select(const BiDirectedNode& sn) override {
+    const auto& seed_node = *sn.node;
     return !seed_node.is_variable() && op_names_.count(seed_node.op()->name);
   }
 
-  bool SelectInput(const BiDirectedNode &sn, const BiDirectedNode &snew_node) override {
-    const auto &input_node = *snew_node.node;
+  bool SelectInput(const BiDirectedNode& sn, const BiDirectedNode& snew_node) override {
+    const auto& input_node = *snew_node.node;
     return !input_node.is_variable() && op_names_.count(input_node.op()->name);
   }
 
-  bool SelectOutput(const BiDirectedNode &sn, const BiDirectedNode &snew_node) override {
-    const auto &output_node = *snew_node.node;
+  bool SelectOutput(const BiDirectedNode& sn, const BiDirectedNode& snew_node) override {
+    const auto& output_node = *snew_node.node;
     return !output_node.is_variable() && op_names_.count(output_node.op()->name);
   }
+
  private:
   const std::unordered_set<std::string>& op_names_;
 };
@@ -58,18 +58,20 @@ class ContainOpSelectorV2: public SubgraphSelectorV2 {
  * This subgraph property finds a subgraph whose nodes have only operators
  * within a set. The operators in the subgraph will be executed by _CachedOp.
  */
-class DefaultSubgraphProperty: public SubgraphProperty {
+class DefaultSubgraphProperty : public SubgraphProperty {
  public:
-  static SubgraphPropertyPtr Create() { return std::make_shared<DefaultSubgraphProperty>(); }
-  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol &sym,
-                                           const SubgraphSelectorPtr& subgraph_selector,
-                                           const int subgraph_id = 0) const override {
+  static SubgraphPropertyPtr Create() {
+    return std::make_shared<DefaultSubgraphProperty>();
+  }
+  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
+                                     const SubgraphSelectorPtr& subgraph_selector,
+                                     const int subgraph_id = 0) const override {
     nnvm::ObjectPtr n = nnvm::Node::Create();
-    n->attrs.op = Op::Get("_CachedOp");
-    n->attrs.name = "_CachedOp" + std::to_string(subgraph_id);
+    n->attrs.op       = Op::Get("_CachedOp");
+    n->attrs.name     = "_CachedOp" + std::to_string(subgraph_id);
     n->attrs.subgraphs.push_back(std::make_shared<nnvm::Symbol>(sym));
 
-    std::vector<std::pair<std::string, std::string> > flags{{"static_alloc", "true"}};
+    std::vector<std::pair<std::string, std::string>> flags{{"static_alloc", "true"}};
     n->attrs.parsed = std::make_shared<CachedOp>(sym, flags);
 
     return n;
diff --git a/src/operator/subgraph/partitioner/custom_subgraph_property.h b/src/operator/subgraph/partitioner/custom_subgraph_property.h
index 1ade2ed1fec1..68eb7964ccda 100644
--- a/src/operator/subgraph/partitioner/custom_subgraph_property.h
+++ b/src/operator/subgraph/partitioner/custom_subgraph_property.h
@@ -46,21 +46,27 @@ namespace op {
  * by the supportedOps from an external library. It visits nodes via
  * both input and output links.
  */
-class CustomContainOpSelector: public SubgraphSelector {
+class CustomContainOpSelector : public SubgraphSelector {
  public:
   explicit CustomContainOpSelector(std::unordered_map<std::string, int> supported_nodes,
-                                   void* sel_inst, mxnet::ext::partCallSelect_t callSelect,
+                                   void* sel_inst,
+                                   mxnet::ext::partCallSelect_t callSelect,
                                    mxnet::ext::partCallSelectInput_t callSelectInput,
                                    mxnet::ext::partCallSelectOutput_t callSelectOutput,
                                    mxnet::ext::partCallFilter_t callFilter,
                                    mxnet::ext::partCallReset_t callReset,
                                    mxnet::ext::opCallFree_t callFree,
-                                   std::unordered_map<const nnvm::Node*, unsigned> node2id) :
-  supported_nodes_(supported_nodes), sel_inst_(sel_inst), callSelect_(callSelect),
-    callSelectInput_(callSelectInput), callSelectOutput_(callSelectOutput),
-    callFilter_(callFilter), callReset_(callReset), callFree_(callFree),
-    node2id_(node2id) {}
-  virtual bool Select(const nnvm::Node &n) {
+                                   std::unordered_map<const nnvm::Node*, unsigned> node2id)
+      : supported_nodes_(supported_nodes),
+        sel_inst_(sel_inst),
+        callSelect_(callSelect),
+        callSelectInput_(callSelectInput),
+        callSelectOutput_(callSelectOutput),
+        callFilter_(callFilter),
+        callReset_(callReset),
+        callFree_(callFree),
+        node2id_(node2id) {}
+  virtual bool Select(const nnvm::Node& n) {
     if (!sel_inst_) {
       return supported_nodes_.count(n.attrs.name) > 0;
     } else {
@@ -69,26 +75,26 @@ class CustomContainOpSelector: public SubgraphSelector {
       return selected;
     }
   }
-  virtual bool SelectInput(const nnvm::Node &n, const nnvm::Node &new_node) {
+  virtual bool SelectInput(const nnvm::Node& n, const nnvm::Node& new_node) {
     if (!sel_inst_) {
       // check that op type is supported and that both nodes have the same ID
       // or the new node 's subgraph ID is any (-1)
       return supported_nodes_.count(new_node.attrs.name) > 0 &&
-        (supported_nodes_[n.attrs.name] == supported_nodes_[new_node.attrs.name] ||
-         supported_nodes_[new_node.attrs.name] == -1);
+             (supported_nodes_[n.attrs.name] == supported_nodes_[new_node.attrs.name] ||
+              supported_nodes_[new_node.attrs.name] == -1);
     } else {
       int selected = 0;
       callSelectInput_(sel_inst_, node2id_[&n], node2id_[&new_node], &selected);
       return selected;
     }
   }
-  virtual bool SelectOutput(const nnvm::Node &n, const nnvm::Node &new_node) {
+  virtual bool SelectOutput(const nnvm::Node& n, const nnvm::Node& new_node) {
     if (!sel_inst_) {
       // check that op type is supported and that both nodes have the same ID
       // or the new node 's subgraph ID is any (-1)
       return supported_nodes_.count(new_node.attrs.name) > 0 &&
-        (supported_nodes_[n.attrs.name] == supported_nodes_[new_node.attrs.name] ||
-         supported_nodes_[new_node.attrs.name] == -1);
+             (supported_nodes_[n.attrs.name] == supported_nodes_[new_node.attrs.name] ||
+              supported_nodes_[new_node.attrs.name] == -1);
     } else {
       int selected = 0;
       callSelectOutput_(sel_inst_, node2id_[&n], node2id_[&new_node], &selected);
@@ -105,11 +111,11 @@ class CustomContainOpSelector: public SubgraphSelector {
         cand.push_back(node2id_[node]);
         rev_map[node2id_[node]] = node;
       }
-      int* keep_ = nullptr;
+      int* keep_   = nullptr;
       int num_keep = 0;
       callFilter_(sel_inst_, cand.data(), cand.size(), &keep_, &num_keep);
       std::vector<nnvm::Node*> keep;
-      for (int i=0; i < num_keep; i++) {
+      for (int i = 0; i < num_keep; i++) {
         keep.push_back(rev_map[keep_[i]]);
       }
       callFree_(keep_);
@@ -138,22 +144,22 @@ class CustomContainOpSelector: public SubgraphSelector {
  * The operators in the subgraph will be executed by the operator
  * specified by the external library too.
  */
-class  CustomSubgraphProperty: public SubgraphProperty {
+class CustomSubgraphProperty : public SubgraphProperty {
  public:
-  CustomSubgraphProperty() :
-    subgraph_prop("error"),
-    call_supported_ops_(nullptr),
-    supported_ops_(nullptr),
-    call_create_selector_(nullptr),
-    create_selector_(nullptr),
-    callSelect_(nullptr),
-    callSelectInput_(nullptr),
-    callSelectOutput_(nullptr),
-    callFilter_(nullptr),
-    callReset_(nullptr),
-    call_review_subgraph_(nullptr),
-    review_subgraph_(nullptr),
-    subgraph_op_name("error") {}
+  CustomSubgraphProperty()
+      : subgraph_prop("error"),
+        call_supported_ops_(nullptr),
+        supported_ops_(nullptr),
+        call_create_selector_(nullptr),
+        create_selector_(nullptr),
+        callSelect_(nullptr),
+        callSelectInput_(nullptr),
+        callSelectOutput_(nullptr),
+        callFilter_(nullptr),
+        callReset_(nullptr),
+        call_review_subgraph_(nullptr),
+        review_subgraph_(nullptr),
+        subgraph_op_name("error") {}
   CustomSubgraphProperty(std::string subgraph_prop_name,
                          mxnet::ext::partCallSupportedOps_t call_supported_ops,
                          mxnet::ext::supportedOps_t supported_ops,
@@ -167,21 +173,21 @@ class  CustomSubgraphProperty: public SubgraphProperty {
                          mxnet::ext::partCallReviewSubgraph_t call_review_subgraph,
                          mxnet::ext::reviewSubgraph_t review_subgraph,
                          mxnet::ext::opCallFree_t call_free,
-                         std::string op_name) :
-      subgraph_prop(subgraph_prop_name),
-      call_supported_ops_(call_supported_ops),
-      supported_ops_(supported_ops),
-      call_create_selector_(call_create_selector),
-      create_selector_(create_selector),
-      callSelect_(callSelect),
-      callSelectInput_(callSelectInput),
-      callSelectOutput_(callSelectOutput),
-      callFilter_(callFilter),
-      callReset_(callReset),
-      call_review_subgraph_(call_review_subgraph),
-      review_subgraph_(review_subgraph),
-      call_free_(call_free),
-      subgraph_op_name(op_name) {}
+                         std::string op_name)
+      : subgraph_prop(subgraph_prop_name),
+        call_supported_ops_(call_supported_ops),
+        supported_ops_(supported_ops),
+        call_create_selector_(call_create_selector),
+        create_selector_(create_selector),
+        callSelect_(callSelect),
+        callSelectInput_(callSelectInput),
+        callSelectOutput_(callSelectOutput),
+        callFilter_(callFilter),
+        callReset_(callReset),
+        call_review_subgraph_(call_review_subgraph),
+        review_subgraph_(review_subgraph),
+        call_free_(call_free),
+        subgraph_op_name(op_name) {}
 
   // create custom subgraph property
   static SubgraphPropertyPtr Create() {
@@ -189,14 +195,14 @@ class  CustomSubgraphProperty: public SubgraphProperty {
   }
 
   void PrePartition(const nnvm::Graph& g,
-    const std::unordered_map<std::string, std::string>& options_map) {
+                    const std::unordered_map<std::string, std::string>& options_map) {
     // clear supported_nodes to remove state from previous calls
     supported_nodes.clear();
     // get input args and arg names
     in_arg_names = g.GetAttr<std::vector<std::string>>("in_arg_names");
-    in_args_ptr = g.GetAttr<NDArray**>("in_args");
+    in_args_ptr  = g.GetAttr<NDArray**>("in_args");
     in_aux_names = g.GetAttr<std::vector<std::string>>("in_aux_names");
-    in_aux_ptr = g.GetAttr<NDArray**>("in_aux");
+    in_aux_ptr   = g.GetAttr<NDArray**>("in_aux");
 
     // convert input args
     arg_names.clear();
@@ -207,10 +213,10 @@ class  CustomSubgraphProperty: public SubgraphProperty {
     arg_verIDs.clear();
     arg_dev_type.clear();
     arg_dev_id.clear();
-    for (size_t i=0; i < in_arg_names.size(); i++) {
+    for (size_t i = 0; i < in_arg_names.size(); i++) {
       if (in_args_ptr[i] != nullptr) {
         arg_names.push_back(in_arg_names[i].c_str());
-        const NDArray &in_arg = *(in_args_ptr[i]);
+        const NDArray& in_arg = *(in_args_ptr[i]);
 
 #if MXNET_USE_ONEDNN == 1
         // reorder data if in MKLDNN format
@@ -241,10 +247,10 @@ class  CustomSubgraphProperty: public SubgraphProperty {
     aux_verIDs.clear();
     aux_dev_type.clear();
     aux_dev_id.clear();
-    for (size_t i=0; i < in_aux_names.size(); i++) {
+    for (size_t i = 0; i < in_aux_names.size(); i++) {
       if (in_aux_ptr[i] != nullptr) {
         aux_names.push_back(in_aux_names[i].c_str());
-        const auto &in_aux = *(in_aux_ptr[i]);
+        const auto& in_aux = *(in_aux_ptr[i]);
 
 #if MXNET_USE_ONEDNN == 1
         // reorder data if in MKLDNN format
@@ -274,8 +280,8 @@ class  CustomSubgraphProperty: public SubgraphProperty {
     // create map from nnvm::Node to nid
     node2id.clear();
     for (unsigned nid = 0; nid < indexed_graph.num_nodes(); nid++) {
-        nnvm::Node* node = const_cast<nnvm::Node*>(indexed_graph[nid].source);
-        node2id[node] = nid;
+      nnvm::Node* node = const_cast<nnvm::Node*>(indexed_graph[nid].source);
+      node2id[node]    = nid;
     }
 
     // set shape attrs for each node in the graph
@@ -288,12 +294,13 @@ class  CustomSubgraphProperty: public SubgraphProperty {
         // set the output shapes for this node
         for (unsigned oid = 0; oid < node->num_outputs(); oid++) {
           const uint32_t out_entry_id = indexed_graph.entry_id(nid, oid);
-          mxnet::TShape& shape = shapes[out_entry_id];
+          mxnet::TShape& shape        = shapes[out_entry_id];
           if (shape.ndim() == -1)
             ss << "[None]";
           else
             ss << shape;
-          if (oid < node->num_outputs()-1) ss << ",";
+          if (oid < node->num_outputs() - 1)
+            ss << ",";
         }
         ss << "]";
         node->attrs.dict[MX_STR_SHAPE] = ss.str();
@@ -302,7 +309,7 @@ class  CustomSubgraphProperty: public SubgraphProperty {
 
     // set dtype attrs for each node in the graph
     if (g.HasAttr("dtype")) {
-      std::vector<int> dtypes = g.GetAttr<std::vector<int> >("dtype");
+      std::vector<int> dtypes = g.GetAttr<std::vector<int>>("dtype");
       for (unsigned nid = 0; nid < indexed_graph.num_nodes(); nid++) {
         nnvm::Node* node = const_cast<nnvm::Node*>(indexed_graph[nid].source);
         std::stringstream ss;
@@ -310,9 +317,10 @@ class  CustomSubgraphProperty: public SubgraphProperty {
         // set the output dtypes for this node
         for (unsigned oid = 0; oid < node->num_outputs(); oid++) {
           const uint32_t out_entry_id = indexed_graph.entry_id(nid, oid);
-          int dtype = dtypes[out_entry_id];
+          int dtype                   = dtypes[out_entry_id];
           ss << dtype;
-          if (oid < node->num_outputs()-1) ss << ",";
+          if (oid < node->num_outputs() - 1)
+            ss << ",";
         }
         ss << "]";
         node->attrs.dict[MX_STR_DTYPE] = ss.str();
@@ -320,7 +328,7 @@ class  CustomSubgraphProperty: public SubgraphProperty {
     }
 
     std::string graph_json = nnvm::pass::SaveJSON(graph);
-    const char* json = graph_json.c_str();
+    const char* json       = graph_json.c_str();
 
     // clear options from previous call
     opt_keys_.clear();
@@ -339,11 +347,16 @@ class  CustomSubgraphProperty: public SubgraphProperty {
     if (supported_ops_ && call_supported_ops_) {
       // setup array of subgraph IDs for each node
       std::vector<int> supported_node_IDs(indexed_graph.num_nodes(), -2);
-      int *ids = supported_node_IDs.data();
+      int* ids = supported_node_IDs.data();
       // call supportedOps
-      CHECK(call_supported_ops_(supported_ops_, json, supported_node_IDs.size(), ids,
-                                opt_keys_.data(), opt_vals_.data(), opt_keys_.size()))
-        << "Error calling supported_ops for '" << subgraph_prop << "'";
+      CHECK(call_supported_ops_(supported_ops_,
+                                json,
+                                supported_node_IDs.size(),
+                                ids,
+                                opt_keys_.data(),
+                                opt_vals_.data(),
+                                opt_keys_.size()))
+          << "Error calling supported_ops for '" << subgraph_prop << "'";
 
       const auto& idx = g.indexed_graph();
       // loop and add node names for each supported node ID
@@ -352,36 +365,35 @@ class  CustomSubgraphProperty: public SubgraphProperty {
           supported_nodes[idx[i].source->attrs.name] = supported_node_IDs[i];
         }
       }
-    } else if (call_create_selector_ && callSelect_ && callSelectInput_ &&
-              callSelectOutput_ && callFilter_ && callReset_ &&
-              create_selector_) {
+    } else if (call_create_selector_ && callSelect_ && callSelectInput_ && callSelectOutput_ &&
+               callFilter_ && callReset_ && create_selector_) {
       sel_inst = nullptr;
-      CHECK(call_create_selector_(create_selector_, json, &sel_inst,
-                                  opt_keys_.data(), opt_vals_.data(), opt_keys_.size()))
-        << "Error calling supported_ops for '" << subgraph_prop << "'";
+      CHECK(call_create_selector_(
+          create_selector_, json, &sel_inst, opt_keys_.data(), opt_vals_.data(), opt_keys_.size()))
+          << "Error calling supported_ops for '" << subgraph_prop << "'";
     } else {
       CHECK(supported_ops_ != nullptr)
-        << "supported_ops_ is null for " << subgraph_prop << std::endl;
+          << "supported_ops_ is null for " << subgraph_prop << std::endl;
       CHECK(call_supported_ops_ != nullptr)
-        << "call_supported_ops_ is null for " << subgraph_prop << std::endl;
+          << "call_supported_ops_ is null for " << subgraph_prop << std::endl;
     }
   }
   // override CreateSubgraphNode
-  virtual nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol &sym,
+  virtual nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
                                              const int subgraph_id = 0) const {
-    int accept = 1;
+    int accept   = 1;
     int num_attr = 0;
     std::map<std::string, std::string> user_attrs;
     char** attr_keys = nullptr;
     char** attr_vals = nullptr;
     if (review_subgraph_) {
       nnvm::Graph g;
-      g.outputs = sym.outputs;
+      g.outputs       = sym.outputs;
       const auto& idx = g.indexed_graph();
 
       // set isArg/isAux for each null op/param in the graph
       const std::vector<std::string> aux_state_names =
-        sym.ListInputNames(nnvm::Symbol::kAuxiliaryStates);
+          sym.ListInputNames(nnvm::Symbol::kAuxiliaryStates);
       std::unordered_set<std::string> aux_set(aux_state_names.begin(), aux_state_names.end());
       for (unsigned i = 0; i < idx.num_nodes(); i++) {
         nnvm::Node* node = const_cast<nnvm::Node*>(idx[i].source);
@@ -396,21 +408,39 @@ class  CustomSubgraphProperty: public SubgraphProperty {
       }
 
       std::string subgraph_json = nnvm::pass::SaveJSON(g);
-      CHECK(call_review_subgraph_(review_subgraph_, subgraph_json.c_str(),  subgraph_id,
-                                  &accept, opt_keys_.data(), opt_vals_.data(),
-                                  opt_keys_.size(),  &attr_keys, &attr_vals, &num_attr,
-                                  arg_names.data(), arg_names.size(), arg_data.data(),
-                                  arg_shapes.data(), arg_dims.data(), arg_types.data(),
-                                  arg_verIDs.data(), arg_dev_type.data(),
-                                  arg_dev_id.data(), aux_names.data(), aux_names.size(),
-                                  aux_data.data(), aux_shapes.data(), aux_dims.data(),
-                                  aux_types.data(), aux_verIDs.data(),
-                                  aux_dev_type.data(), aux_dev_id.data()))
-        << "Error calling review_subgraph for '" << subgraph_prop << "'";
+      CHECK(call_review_subgraph_(review_subgraph_,
+                                  subgraph_json.c_str(),
+                                  subgraph_id,
+                                  &accept,
+                                  opt_keys_.data(),
+                                  opt_vals_.data(),
+                                  opt_keys_.size(),
+                                  &attr_keys,
+                                  &attr_vals,
+                                  &num_attr,
+                                  arg_names.data(),
+                                  arg_names.size(),
+                                  arg_data.data(),
+                                  arg_shapes.data(),
+                                  arg_dims.data(),
+                                  arg_types.data(),
+                                  arg_verIDs.data(),
+                                  arg_dev_type.data(),
+                                  arg_dev_id.data(),
+                                  aux_names.data(),
+                                  aux_names.size(),
+                                  aux_data.data(),
+                                  aux_shapes.data(),
+                                  aux_dims.data(),
+                                  aux_types.data(),
+                                  aux_verIDs.data(),
+                                  aux_dev_type.data(),
+                                  aux_dev_id.data()))
+          << "Error calling review_subgraph for '" << subgraph_prop << "'";
 
       if (num_attr > 0) {
         // set user specified attributes
-        for (int i=0; i < num_attr; i++) {
+        for (int i = 0; i < num_attr; i++) {
           user_attrs[attr_keys[i]] = attr_vals[i];
           call_free_(attr_vals[i]);
           call_free_(attr_keys[i]);
@@ -423,22 +453,22 @@ class  CustomSubgraphProperty: public SubgraphProperty {
 
     if (accept) {
       nnvm::ObjectPtr n = nnvm::Node::Create();
-      n->attrs.op = Op::Get(subgraph_op_name);
-      n->attrs.name = "_op" + std::to_string(subgraph_id);
+      n->attrs.op       = Op::Get(subgraph_op_name);
+      n->attrs.name     = "_op" + std::to_string(subgraph_id);
       n->attrs.subgraphs.push_back(std::make_shared<nnvm::Symbol>(sym));
 
       // set shapes
       {
         std::stringstream ss;
         ss << "[";
-        for (unsigned i=0; i < sym.outputs.size(); i++) {
+        for (unsigned i = 0; i < sym.outputs.size(); i++) {
           const nnvm::NodeEntry& e = sym.outputs[i];
           if (e.node->attrs.dict.count(MX_STR_SHAPE) > 0) {
             std::string& shape = e.node->attrs.dict[MX_STR_SHAPE];
             // add this shape to the list
             ss << mxnet::ext::getShapeAt(shape, e.index);
           }
-          if (i < sym.outputs.size()-1)
+          if (i < sym.outputs.size() - 1)
             ss << ",";
         }
         ss << "]";
@@ -448,14 +478,14 @@ class  CustomSubgraphProperty: public SubgraphProperty {
       {
         std::stringstream ss;
         ss << "[";
-        for (unsigned i=0; i < sym.outputs.size(); i++) {
+        for (unsigned i = 0; i < sym.outputs.size(); i++) {
           const nnvm::NodeEntry& e = sym.outputs[i];
           if (e.node->attrs.dict.count(MX_STR_DTYPE) > 0) {
             std::string& dtype = e.node->attrs.dict[MX_STR_DTYPE];
             // add this dtype to the list
             ss << mxnet::ext::getDtypeAt(dtype, e.index);
           }
-          if (i < sym.outputs.size()-1)
+          if (i < sym.outputs.size() - 1)
             ss << ",";
         }
         ss << "]";
@@ -473,7 +503,7 @@ class  CustomSubgraphProperty: public SubgraphProperty {
   virtual void InitSubgraphInputs(std::vector<nnvm::NodeEntry*>* input_entries,
                                   std::vector<nnvm::NodeEntry>* orig_input_entries) const {
     for (size_t i = 0; i < input_entries->size(); ++i) {
-      nnvm::NodeEntry *e = input_entries->at(i);
+      nnvm::NodeEntry* e    = input_entries->at(i);
       nnvm::NodeEntry& orig = orig_input_entries->at(i);
 
       // set attribute for subgraph input to indicate if it is from an arg/param to model
@@ -485,7 +515,7 @@ class  CustomSubgraphProperty: public SubgraphProperty {
         CHECK_EQ(output_names.size(), 1U);
         const std::string& var_name = output_names[0];
 
-        e->node->attrs.dict["isArg"] = "True";
+        e->node->attrs.dict["isArg"]   = "True";
         e->node->attrs.dict["argName"] = var_name;
       } else {
         e->node->attrs.dict["isArg"] = "False";
@@ -514,8 +544,14 @@ class  CustomSubgraphProperty: public SubgraphProperty {
   // override CreateSubgraphSelector
   virtual SubgraphSelectorPtr CreateSubgraphSelector() const {
     return std::make_shared<CustomContainOpSelector>(supported_nodes,
-               sel_inst, callSelect_, callSelectInput_, callSelectOutput_,
-               callFilter_, callReset_, call_free_, node2id);
+                                                     sel_inst,
+                                                     callSelect_,
+                                                     callSelectInput_,
+                                                     callSelectOutput_,
+                                                     callFilter_,
+                                                     callReset_,
+                                                     call_free_,
+                                                     node2id);
   }
 
   std::string subgraph_prop;
@@ -536,8 +572,8 @@ class  CustomSubgraphProperty: public SubgraphProperty {
   std::unordered_map<std::string, std::string> options_map_;
   std::vector<const char*> opt_keys_, opt_vals_;
   std::vector<std::string> in_arg_names, in_aux_names;
-  NDArray **in_args_ptr;
-  NDArray **in_aux_ptr;
+  NDArray** in_args_ptr;
+  NDArray** in_aux_ptr;
   std::vector<const char*> arg_names, aux_names;
   std::vector<void*> arg_data, aux_data;
   std::vector<const int64_t*> arg_shapes, aux_shapes;
diff --git a/src/operator/subgraph/static_shape_subgraph_property.cc b/src/operator/subgraph/static_shape_subgraph_property.cc
index 923f70905e59..90f16fe2e1d0 100644
--- a/src/operator/subgraph/static_shape_subgraph_property.cc
+++ b/src/operator/subgraph/static_shape_subgraph_property.cc
@@ -28,20 +28,20 @@ namespace op {
  * This selects nodes for a subgraph that only contains static shape operators
  * and it visits nodes via both input and output links.
  */
-class StaticShapeOpSelector: public SubgraphSelector {
+class StaticShapeOpSelector : public SubgraphSelector {
  public:
   // select nodes with FInferShape attribute
-  bool Select(const nnvm::Node &seed_node) override {
+  bool Select(const nnvm::Node& seed_node) override {
     const auto& infershape = nnvm::Op::GetAttr<mxnet::FInferShape>("FInferShape");
     return !seed_node.is_variable() && infershape.count(seed_node.op()) &&
            !unsupported_op_names_.count(seed_node.op()->name);
   }
 
-  bool SelectInput(const nnvm::Node &cur_node, const nnvm::Node &input_node) override {
+  bool SelectInput(const nnvm::Node& cur_node, const nnvm::Node& input_node) override {
     return Select(input_node);
   }
 
-  bool SelectOutput(const nnvm::Node &cur_node, const nnvm::Node &output_node) override {
+  bool SelectOutput(const nnvm::Node& cur_node, const nnvm::Node& output_node) override {
     return Select(output_node);
   }
 
@@ -54,22 +54,24 @@ class StaticShapeOpSelector: public SubgraphSelector {
   }
 
  private:
-    // Rejecte the ops that have FInferShape registered but return true by CheckDynamicShapeExists()
-    std::unordered_set<std::string> unsupported_op_names_ {"_npi_dstack", "_npi_hstack"};
+  // Rejecte the ops that have FInferShape registered but return true by CheckDynamicShapeExists()
+  std::unordered_set<std::string> unsupported_op_names_{"_npi_dstack", "_npi_hstack"};
 };
 
 /*
  * This subgraph property finds a subgraph whose nodes have only static shape operators.
  * The operators in the subgraph will be executed by _CachedOp.
  */
-class StaticShapeSubgraphProperty: public SubgraphProperty {
+class StaticShapeSubgraphProperty : public SubgraphProperty {
  public:
   StaticShapeSubgraphProperty() {
     // flag to ensure subgraph CachedOp has at least one external input
     // as required by CachedOp::Forward
     attrs_["require_subgraph_inputs"] = std::make_shared<dmlc::any>(true);
   }
-  static SubgraphPropertyPtr Create() { return std::make_shared<StaticShapeSubgraphProperty>(); }
+  static SubgraphPropertyPtr Create() {
+    return std::make_shared<StaticShapeSubgraphProperty>();
+  }
 
   SubgraphSelectorPtr CreateSubgraphSelector() const override {
     return std::make_shared<StaticShapeOpSelector>();
@@ -88,21 +90,21 @@ class StaticShapeSubgraphProperty: public SubgraphProperty {
         } else {
           options_map_.emplace_back(kv.first, "false");
         }
-      // update param_name_set_ for data_indices and param_indices
+        // update param_name_set_ for data_indices and param_indices
       } else if (kv.first == "param_indices") {
         std::string param_str = kv.second;
-        int temp = 0;
+        int temp              = 0;
         for (int i = 0; param_str[i] != '\0'; i++) {
           if (param_str[i] == ',' || param_str[i] == '[') {
             continue;
           }
           if (param_str[i] == ' ' || param_str[i] == ']') {
-              auto nid = indexed_graph.input_nodes()[temp];
-              nnvm::Node n = *(indexed_graph[nid].source);
-              param_name_set_.emplace(n.attrs.name);
-              temp = 0;
+            auto nid     = indexed_graph.input_nodes()[temp];
+            nnvm::Node n = *(indexed_graph[nid].source);
+            param_name_set_.emplace(n.attrs.name);
+            temp = 0;
           } else {
-              temp = temp * 10 + (param_str[i] - 48);
+            temp = temp * 10 + (param_str[i] - 48);
           }
         }
       }
@@ -112,7 +114,7 @@ class StaticShapeSubgraphProperty: public SubgraphProperty {
   void InitSubgraphInputs(std::vector<nnvm::NodeEntry*>* input_entries,
                           std::vector<nnvm::NodeEntry>* orig_input_entries) const override {
     for (size_t i = 0; i < input_entries->size(); ++i) {
-      nnvm::NodeEntry *e = input_entries->at(i);
+      nnvm::NodeEntry* e    = input_entries->at(i);
       nnvm::NodeEntry& orig = orig_input_entries->at(i);
       // set attribute for subgraph input nodes
       if (orig.node->is_variable()) {
@@ -121,8 +123,8 @@ class StaticShapeSubgraphProperty: public SubgraphProperty {
         sym.outputs.push_back(orig);
         const auto output_names = sym.ListOutputNames();
         CHECK_EQ(output_names.size(), 1U);
-        const std::string& var_name = output_names[0];
-        e->node->attrs.dict["isArg"] = "True";
+        const std::string& var_name    = output_names[0];
+        e->node->attrs.dict["isArg"]   = "True";
         e->node->attrs.dict["argName"] = var_name;
       } else {
         e->node->attrs.dict["isArg"] = "False";
@@ -130,29 +132,29 @@ class StaticShapeSubgraphProperty: public SubgraphProperty {
     }
   }
 
-  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol &sym,
+  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
                                      const int subgraph_id = 0) const override {
     std::vector<std::pair<std::string, std::string>> flags;
     _set_cachedop_flags(sym, &flags);
     nnvm::ObjectPtr n = nnvm::Node::Create();
-    n->attrs.op = Op::Get("_CachedOp");
-    n->attrs.name = "_static_shape_CachedOp" + std::to_string(subgraph_id);
+    n->attrs.op       = Op::Get("_CachedOp");
+    n->attrs.name     = "_static_shape_CachedOp" + std::to_string(subgraph_id);
     n->attrs.subgraphs.push_back(std::make_shared<nnvm::Symbol>(sym));
     n->attrs.parsed = std::make_shared<CachedOp>(sym, flags);
     return n;
   }
 
  private:
-    // generate data_indices and param_indices for subgraph CachedOp node
-    void _set_cachedop_flags(nnvm::Symbol symbol,
-             std::vector<std::pair<std::string, std::string>>* flags) const {
+  // generate data_indices and param_indices for subgraph CachedOp node
+  void _set_cachedop_flags(nnvm::Symbol symbol,
+                           std::vector<std::pair<std::string, std::string>>* flags) const {
     std::vector<nnvm::ObjectPtr> inputs = symbol.ListInputs(nnvm::Symbol::ListInputOption(0));
-    std::string data_indices = "[";
-    std::string param_indices = "[";
+    std::string data_indices            = "[";
+    std::string param_indices           = "[";
     for (int i = 0; i < inputs.size(); i++) {
       nnvm::ObjectPtr node = inputs[i];
-      if (node->attrs.dict["isArg"] == "True"
-          && param_name_set_.count(node->attrs.dict["argName"]) > 0) {
+      if (node->attrs.dict["isArg"] == "True" &&
+          param_name_set_.count(node->attrs.dict["argName"]) > 0) {
         if (param_indices.compare("[") == 0) {
           param_indices += std::to_string(i);
         } else {
@@ -166,7 +168,7 @@ class StaticShapeSubgraphProperty: public SubgraphProperty {
         }
       }
     }
-    data_indices = data_indices + "]";
+    data_indices  = data_indices + "]";
     param_indices = param_indices + "]";
     for (auto kv : options_map_) {
       flags->emplace_back(kv);
@@ -184,4 +186,3 @@ MXNET_REGISTER_SUBGRAPH_PROPERTY(static_shape, StaticShapeSubgraphProperty);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/subgraph/subgraph_property.h b/src/operator/subgraph/subgraph_property.h
index c00356768798..007ac421eb8e 100644
--- a/src/operator/subgraph/subgraph_property.h
+++ b/src/operator/subgraph/subgraph_property.h
@@ -42,7 +42,9 @@ using BiDirectedNodePtr = std::shared_ptr<BiDirectedNode>;
  * subgraphs.
  */
 struct BiDirectedNode {
-  static BiDirectedNodePtr Create() { return std::make_shared<BiDirectedNode>(); }
+  static BiDirectedNodePtr Create() {
+    return std::make_shared<BiDirectedNode>();
+  }
   BiDirectedNode() : label(-1), node(nullptr) {}
   /*! subgraph label */
   int label;
@@ -106,7 +108,8 @@ class SubgraphSelector {
     LOG(FATAL) << "No SelectInput is implemented.";
     return false;
   }
-  virtual bool SelectInput(const nnvm::Node& cur_node, const nnvm::Node& input_node,
+  virtual bool SelectInput(const nnvm::Node& cur_node,
+                           const nnvm::Node& input_node,
                            const std::shared_ptr<NodeAttr>& input_node_attr) {
     return SelectInput(cur_node, input_node);
   }
@@ -120,7 +123,8 @@ class SubgraphSelector {
     LOG(FATAL) << "No SelectOutput is implemented.";
     return false;
   }
-  virtual bool SelectOutput(const nnvm::Node& cur_node, const nnvm::Node& output_node,
+  virtual bool SelectOutput(const nnvm::Node& cur_node,
+                            const nnvm::Node& output_node,
                             const std::shared_ptr<NodeAttr>& output_node_attr) {
     return SelectOutput(cur_node, output_node);
   }
@@ -165,7 +169,8 @@ class SubgraphSelectorV2 {
     LOG(FATAL) << "No SelectInput is implemented.";
     return false;
   }
-  virtual bool SelectInput(const BiDirectedNode& cur_node, const BiDirectedNode& input_node,
+  virtual bool SelectInput(const BiDirectedNode& cur_node,
+                           const BiDirectedNode& input_node,
                            const std::shared_ptr<NodeAttr>& input_node_attr) {
     return SelectInput(cur_node, input_node);
   }
@@ -179,7 +184,8 @@ class SubgraphSelectorV2 {
     LOG(FATAL) << "No SelectOutput is implemented.";
     return false;
   }
-  virtual bool SelectOutput(const BiDirectedNode& cur_node, const BiDirectedNode& output_node,
+  virtual bool SelectOutput(const BiDirectedNode& cur_node,
+                            const BiDirectedNode& output_node,
                             const std::shared_ptr<NodeAttr>& output_node_attr) {
     return SelectOutput(cur_node, output_node);
   }
@@ -213,12 +219,14 @@ class SubgraphSelectorV2Bridge : public SubgraphSelectorV2 {
     return ss_ptr_->Select(*seed_node.node, node_attr);
   }
 
-  bool SelectInput(const BiDirectedNode& cur_node, const BiDirectedNode& input_node,
+  bool SelectInput(const BiDirectedNode& cur_node,
+                   const BiDirectedNode& input_node,
                    const std::shared_ptr<NodeAttr>& node_attr) override {
     return ss_ptr_->SelectInput(*cur_node.node, *input_node.node, node_attr);
   }
 
-  bool SelectOutput(const BiDirectedNode& cur_node, const BiDirectedNode& output_node,
+  bool SelectOutput(const BiDirectedNode& cur_node,
+                    const BiDirectedNode& output_node,
                     const std::shared_ptr<NodeAttr>& node_attr) override {
     return ss_ptr_->SelectOutput(*cur_node.node, *output_node.node, node_attr);
   }
@@ -232,13 +240,18 @@ class SubgraphSelectorV2Bridge : public SubgraphSelectorV2 {
     }
     auto n_ret = ss_ptr_->Filter(n_candidates);
     std::vector<BiDirectedNode*> ret;
-    for (auto i : n_ret) ret.push_back(node_2_snode_map[i]);
+    for (auto i : n_ret)
+      ret.push_back(node_2_snode_map[i]);
     return ret;
   }
 
-  void Reset() override { ss_ptr_->Reset(); }
+  void Reset() override {
+    ss_ptr_->Reset();
+  }
 
-  const SubgraphSelectorPtr& GetV1ptr() const { return ss_ptr_; }
+  const SubgraphSelectorPtr& GetV1ptr() const {
+    return ss_ptr_;
+  }
 
  private:
   SubgraphSelectorPtr ss_ptr_;
@@ -269,7 +282,7 @@ class SubgraphProperty {
   }
 
   virtual void PrePartition(const nnvm::Graph& g,
-    const std::unordered_map<std::string, std::string>& options_map) {
+                            const std::unordered_map<std::string, std::string>& options_map) {
     if (options_map.count("dedup_subgraph") > 0 &&
         options_map.at("dedup_subgraph").compare("True") == 0) {
       dedup_subgraph = true;
@@ -292,7 +305,7 @@ class SubgraphProperty {
    * \param subgraph_id subgraph id
    */
   virtual nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
-                                           const int subgraph_id = 0) const {
+                                             const int subgraph_id = 0) const {
     CHECK_EQ(GetPropertyType(), kCreate);
     LOG(FATAL) << "Not implement CreateSubgraphNode() for this subgraph property.";
     return nullptr;
@@ -306,8 +319,8 @@ class SubgraphProperty {
    * \param subgraph_id subgraph id
    */
   virtual nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
-                                           const SubgraphSelectorPtr& subgraph_selector,
-                                           const int subgraph_id = 0) const {
+                                             const SubgraphSelectorPtr& subgraph_selector,
+                                             const int subgraph_id = 0) const {
     return CreateSubgraphNode(sym, subgraph_id);
   }
 
@@ -319,8 +332,8 @@ class SubgraphProperty {
    * \param subgraph_id subgraph id
    */
   virtual nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
-                                           const SubgraphSelectorV2Ptr& subgraph_selector,
-                                           const int subgraph_id = 0) const {
+                                             const SubgraphSelectorV2Ptr& subgraph_selector,
+                                             const int subgraph_id = 0) const {
     CHECK_EQ(GetPropertyType(), kCreate);
     const auto bridge = static_cast<SubgraphSelectorV2Bridge*>(subgraph_selector.get());
     return CreateSubgraphNode(sym, bridge->GetV1ptr(), subgraph_id);
@@ -424,7 +437,9 @@ class SubgraphProperty {
   /*!
    * \brief Get the property type.
    */
-  SgPropertyType GetPropertyType() const { return type_; }
+  SgPropertyType GetPropertyType() const {
+    return type_;
+  }
 
  protected:
   SgPropertyType type_;
@@ -440,7 +455,8 @@ class SubgraphPropertyEntry {
 
   template <typename T>
   SubgraphPropertyEntry set_attr(const std::string& name, const T value) const {
-    if (entry_) entry_->SetAttr<T>(name, value);
+    if (entry_)
+      entry_->SetAttr<T>(name, value);
     return *this;
   }
 
@@ -494,9 +510,13 @@ class SubgraphBackend {
     return prop;
   }
 
-  const std::string& GetName() const { return name_; }
+  const std::string& GetName() const {
+    return name_;
+  }
 
-  const std::vector<SubgraphPropertyPtr>& GetSubgraphProperties() const { return prop_ptr_; }
+  const std::vector<SubgraphPropertyPtr>& GetSubgraphProperties() const {
+    return prop_ptr_;
+  }
 
  private:
   const std::string name_;
@@ -561,9 +581,9 @@ class SubgraphBackendRegistry {
     return SubgraphPropertyEntry(prop);
   }
 
-  SubgraphBackendRegistry() = default;
+  SubgraphBackendRegistry()                               = default;
   SubgraphBackendRegistry(const SubgraphBackendRegistry&) = delete;
-  SubgraphBackendRegistry(SubgraphBackendRegistry&&) = delete;
+  SubgraphBackendRegistry(SubgraphBackendRegistry&&)      = delete;
   SubgraphBackendRegistry& operator=(const SubgraphBackendRegistry&) = delete;
   std::unordered_map<std::string, SubgraphBackendPtr> backend_map_;
 };
diff --git a/src/operator/subgraph/tensorrt/nnvm_to_onnx-inl.h b/src/operator/subgraph/tensorrt/nnvm_to_onnx-inl.h
index 721eb677c2c1..92df0a4b7d0b 100644
--- a/src/operator/subgraph/tensorrt/nnvm_to_onnx-inl.h
+++ b/src/operator/subgraph/tensorrt/nnvm_to_onnx-inl.h
@@ -24,7 +24,7 @@
  * \file nnvm_to_onnx-inl.h
  * \brief Conversion from NNVM to ONNX for TensorRT
  * \author Marek Kolodziej, Clement Fuji Tsang
-*/
+ */
 
 #if MXNET_USE_TENSORRT
 
@@ -41,199 +41,195 @@ namespace mxnet {
 namespace op {
 namespace nnvm_to_onnx {
 
-enum ConvDeconvType {Convolution, Deconvolution};
+enum ConvDeconvType { Convolution, Deconvolution };
 
 using namespace nnvm;
 using namespace ::onnx;
 using int64 = ::google::protobuf::int64;
 
-std::unordered_map<std::string, mxnet::TShape> GetPlaceholderShapes(
-    const ShapeVector& shape_inputs,
-    const nnvm::IndexedGraph& ig);
+std::unordered_map<std::string, mxnet::TShape> GetPlaceholderShapes(const ShapeVector& shape_inputs,
+                                                                    const nnvm::IndexedGraph& ig);
 
 std::unordered_map<std::string, int> GetPlaceholderDTypes(const DTypeVector& dtype_inputs,
-    const nnvm::IndexedGraph& ig);
+                                                          const nnvm::IndexedGraph& ig);
 
 std::unordered_map<std::string, uint32_t> GetOutputLookup(const nnvm::IndexedGraph& ig);
 
-void ConvertPlaceholder(
-  const std::string& node_name,
-  const std::unordered_map<std::string, TShape>& placeholder_shapes,
-  const std::unordered_map<std::string, int>& placeholder_dtypes,
-  GraphProto* graph_proto);
+void ConvertPlaceholder(const std::string& node_name,
+                        const std::unordered_map<std::string, TShape>& placeholder_shapes,
+                        const std::unordered_map<std::string, int>& placeholder_dtypes,
+                        GraphProto* graph_proto);
 
 void ConvertConstant(GraphProto* graph_proto,
-  const std::string& node_name,
-  const std::unordered_map<std::string, NDArray>* const params_map);
+                     const std::string& node_name,
+                     const std::unordered_map<std::string, NDArray>* const params_map);
 
 void ConvertOutput(GraphProto* graph_proto,
                    const std::unordered_map<std::string, uint32_t>::iterator& out_iter,
-                   const std::string& node_name, const ShapeVector& shapes,
-                   const DTypeVector& dtypes, const nnvm::IndexedGraph &ig);
+                   const std::string& node_name,
+                   const ShapeVector& shapes,
+                   const DTypeVector& dtypes,
+                   const nnvm::IndexedGraph& ig);
 
 void DefaultConnectInputsOutputs(const array_view<IndexedGraph::NodeEntry>& inputs,
                                  const nnvm::IndexedGraph& ig,
                                  const std::string& node_name);
 
-typedef void (*ConverterFunction)(GraphProto *graph_proto,
+typedef void (*ConverterFunction)(GraphProto* graph_proto,
                                   const std::string& node_name,
-                                  const NodeAttrs &attrs,
-                                  const nnvm::IndexedGraph &ig,
-                                  const array_view<IndexedGraph::NodeEntry> &inputs);
+                                  const NodeAttrs& attrs,
+                                  const nnvm::IndexedGraph& ig,
+                                  const array_view<IndexedGraph::NodeEntry>& inputs);
 
 template <class ConvDeconvParam>
-void ConvDeconvConvertHelper(NodeProto *node_proto,
-                             const NodeAttrs &attrs,
-                             const nnvm::IndexedGraph &ig,
-                             const array_view<IndexedGraph::NodeEntry> &inputs,
+void ConvDeconvConvertHelper(NodeProto* node_proto,
+                             const NodeAttrs& attrs,
+                             const nnvm::IndexedGraph& ig,
+                             const array_view<IndexedGraph::NodeEntry>& inputs,
                              const ConvDeconvParam& param,
                              ConvDeconvType type);
 
 // Forward declarations
-void ConvertIdentity(GraphProto *graph_proto,
+void ConvertIdentity(GraphProto* graph_proto,
                      const std::string& node_name,
-                     const NodeAttrs &attrs,
+                     const NodeAttrs& attrs,
                      const nnvm::IndexedGraph& ig,
-                     const array_view<IndexedGraph::NodeEntry> &inputs);
+                     const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertConvolution(
-                        GraphProto *graph_proto,
+void ConvertConvolution(GraphProto* graph_proto,
                         const std::string& node_name,
-                        const NodeAttrs &attrs,
-                        const nnvm::IndexedGraph &ig,
-                        const array_view<IndexedGraph::NodeEntry> &inputs);
+                        const NodeAttrs& attrs,
+                        const nnvm::IndexedGraph& ig,
+                        const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertDeconvolution(GraphProto *graph_proto,
-                        const std::string& node_name,
-                        const NodeAttrs &attrs,
-                        const nnvm::IndexedGraph &ig,
-                        const array_view<IndexedGraph::NodeEntry> &inputs);
+void ConvertDeconvolution(GraphProto* graph_proto,
+                          const std::string& node_name,
+                          const NodeAttrs& attrs,
+                          const nnvm::IndexedGraph& ig,
+                          const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertPooling(GraphProto *graph_proto,
+void ConvertPooling(GraphProto* graph_proto,
                     const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+                    const NodeAttrs& attrs,
+                    const nnvm::IndexedGraph& ig,
+                    const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertRelu(GraphProto *graph_proto,
+void ConvertRelu(GraphProto* graph_proto,
                  const std::string& node_name,
-                 const NodeAttrs &attrs,
-                 const nnvm::IndexedGraph &ig,
-                 const array_view<IndexedGraph::NodeEntry> &inputs);
+                 const NodeAttrs& attrs,
+                 const nnvm::IndexedGraph& ig,
+                 const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertActivation(GraphProto *graph_proto,
+void ConvertActivation(GraphProto* graph_proto,
                        const std::string& node_name,
-                       const NodeAttrs &attrs,
-                       const nnvm::IndexedGraph &ig,
-                       const array_view<IndexedGraph::NodeEntry> &inputs);
+                       const NodeAttrs& attrs,
+                       const nnvm::IndexedGraph& ig,
+                       const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertFullyConnected(GraphProto *graph_proto,
+void ConvertFullyConnected(GraphProto* graph_proto,
                            const std::string& node_name,
-                           const NodeAttrs &attrs,
-                           const nnvm::IndexedGraph &ig,
-                           const array_view<IndexedGraph::NodeEntry> &inputs);
+                           const NodeAttrs& attrs,
+                           const nnvm::IndexedGraph& ig,
+                           const array_view<IndexedGraph::NodeEntry>& inputs);
 
-
-void ConvertSlice(GraphProto *graph_proto,
+void ConvertSlice(GraphProto* graph_proto,
                   const std::string& node_name,
-                  const NodeAttrs &attrs,
-                  const nnvm::IndexedGraph &ig,
-                  const array_view<IndexedGraph::NodeEntry> &inputs);
+                  const NodeAttrs& attrs,
+                  const nnvm::IndexedGraph& ig,
+                  const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertSoftmaxOutput(GraphProto *graph_proto,
+void ConvertSoftmaxOutput(GraphProto* graph_proto,
                           const std::string& node_name,
-                          const NodeAttrs &attrs,
-                          const nnvm::IndexedGraph &ig,
-                          const array_view<IndexedGraph::NodeEntry> &inputs);
+                          const NodeAttrs& attrs,
+                          const nnvm::IndexedGraph& ig,
+                          const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertFlatten(GraphProto *graph_proto,
+void ConvertFlatten(GraphProto* graph_proto,
                     const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+                    const NodeAttrs& attrs,
+                    const nnvm::IndexedGraph& ig,
+                    const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertDropout(GraphProto *graph_proto,
+void ConvertDropout(GraphProto* graph_proto,
                     const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+                    const NodeAttrs& attrs,
+                    const nnvm::IndexedGraph& ig,
+                    const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertBatchNorm(GraphProto *graph_proto,
-                    const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+void ConvertBatchNorm(GraphProto* graph_proto,
+                      const std::string& node_name,
+                      const NodeAttrs& attrs,
+                      const nnvm::IndexedGraph& ig,
+                      const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertElementwiseAdd(GraphProto *graph_proto,
-                    const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+void ConvertElementwiseAdd(GraphProto* graph_proto,
+                           const std::string& node_name,
+                           const NodeAttrs& attrs,
+                           const nnvm::IndexedGraph& ig,
+                           const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertElementwiseMul(GraphProto *graph_proto,
-                    const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+void ConvertElementwiseMul(GraphProto* graph_proto,
+                           const std::string& node_name,
+                           const NodeAttrs& attrs,
+                           const nnvm::IndexedGraph& ig,
+                           const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertElementwiseSub(GraphProto *graph_proto,
-                    const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+void ConvertElementwiseSub(GraphProto* graph_proto,
+                           const std::string& node_name,
+                           const NodeAttrs& attrs,
+                           const nnvm::IndexedGraph& ig,
+                           const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertConcatenate(GraphProto *graph_proto,
-                    const std::string& node_name,
-                    const NodeAttrs &attrs,
-                    const nnvm::IndexedGraph &ig,
-                    const array_view<IndexedGraph::NodeEntry> &inputs);
+void ConvertConcatenate(GraphProto* graph_proto,
+                        const std::string& node_name,
+                        const NodeAttrs& attrs,
+                        const nnvm::IndexedGraph& ig,
+                        const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertClip(GraphProto *graph_proto,
+void ConvertClip(GraphProto* graph_proto,
                  const std::string& node_name,
-                 const NodeAttrs &attrs,
-                 const nnvm::IndexedGraph &ig,
-                 const array_view<IndexedGraph::NodeEntry> &inputs);
+                 const NodeAttrs& attrs,
+                 const nnvm::IndexedGraph& ig,
+                 const array_view<IndexedGraph::NodeEntry>& inputs);
 
-void ConvertPad(GraphProto *graph_proto,
+void ConvertPad(GraphProto* graph_proto,
                 const std::string& node_name,
-                const NodeAttrs & attrs,
-                const nnvm::IndexedGraph &ig,
-                const array_view<IndexedGraph::NodeEntry> &inputs);
+                const NodeAttrs& attrs,
+                const nnvm::IndexedGraph& ig,
+                const array_view<IndexedGraph::NodeEntry>& inputs);
 
-std::string ConvertNnvmGraphToOnnx(const nnvm::Graph &g,
-    std::unordered_map<std::string, NDArray>* params_map);
+std::string ConvertNnvmGraphToOnnx(const nnvm::Graph& g,
+                                   std::unordered_map<std::string, NDArray>* params_map);
 
 static const std::unordered_map<std::string, ConverterFunction> converter_map = {
-  {"_copy", ConvertIdentity},
-  {"Activation", ConvertActivation},
-  {"BatchNorm", ConvertBatchNorm},
-  {"clip", ConvertClip},
-  {"Convolution", ConvertConvolution},
-  {"Deconvolution", ConvertDeconvolution},
-  {"Concat", ConvertConcatenate},
-  {"Dropout", ConvertDropout},
-  {"elemwise_add", ConvertElementwiseAdd},
-  {"elemwise_mul", ConvertElementwiseMul},
-  {"elemwise_sub", ConvertElementwiseSub},
-  {"Flatten", ConvertFlatten},
-  {"FullyConnected", ConvertFullyConnected},
-  {"Pad", ConvertPad},
-  {"Pooling", ConvertPooling},
-  {"relu", ConvertRelu},
-  {"slice", ConvertSlice}
-};
-
-typedef void (*PreprocessFunction)(const NodeAttrs &attrs,
-                                   const std::vector<nnvm::NodeEntry> &inputs,
-                                   std::unordered_map<std::string, NDArray> *params_map);
-
-void PreprocessBatchNorm(const NodeAttrs &attrs,
-                         const std::vector<nnvm::NodeEntry> &inputs,
-                         std::unordered_map<std::string, NDArray> *params_map);
+    {"_copy", ConvertIdentity},
+    {"Activation", ConvertActivation},
+    {"BatchNorm", ConvertBatchNorm},
+    {"clip", ConvertClip},
+    {"Convolution", ConvertConvolution},
+    {"Deconvolution", ConvertDeconvolution},
+    {"Concat", ConvertConcatenate},
+    {"Dropout", ConvertDropout},
+    {"elemwise_add", ConvertElementwiseAdd},
+    {"elemwise_mul", ConvertElementwiseMul},
+    {"elemwise_sub", ConvertElementwiseSub},
+    {"Flatten", ConvertFlatten},
+    {"FullyConnected", ConvertFullyConnected},
+    {"Pad", ConvertPad},
+    {"Pooling", ConvertPooling},
+    {"relu", ConvertRelu},
+    {"slice", ConvertSlice}};
+
+typedef void (*PreprocessFunction)(const NodeAttrs& attrs,
+                                   const std::vector<nnvm::NodeEntry>& inputs,
+                                   std::unordered_map<std::string, NDArray>* params_map);
+
+void PreprocessBatchNorm(const NodeAttrs& attrs,
+                         const std::vector<nnvm::NodeEntry>& inputs,
+                         std::unordered_map<std::string, NDArray>* params_map);
 
 static const std::unordered_map<std::string, PreprocessFunction> preprocess_map = {
-  {"BatchNorm", PreprocessBatchNorm}
-};
+    {"BatchNorm", PreprocessBatchNorm}};
 
 }  // namespace nnvm_to_onnx
 }  // namespace op
diff --git a/src/operator/subgraph/tensorrt/nnvm_to_onnx.cc b/src/operator/subgraph/tensorrt/nnvm_to_onnx.cc
index cd83cb71092c..4aa4c2a0c011 100644
--- a/src/operator/subgraph/tensorrt/nnvm_to_onnx.cc
+++ b/src/operator/subgraph/tensorrt/nnvm_to_onnx.cc
@@ -22,7 +22,7 @@
  * \file nnvm_to_onnx.cc
  * \brief Conversion from NNVM to ONNX for TensorRT
  * \author Marek Kolodziej, Clement Fuji Tsang
-*/
+ */
 
 #if MXNET_USE_TENSORRT
 
@@ -52,19 +52,17 @@ namespace mxnet {
 namespace op {
 namespace nnvm_to_onnx {
 
-std::string ConvertNnvmGraphToOnnx(
-    const nnvm::Graph& g,
-    std::unordered_map<std::string, NDArray>* params_map) {
-
-  static std::atomic_ulong subgraph_count = { 0 };
+std::string ConvertNnvmGraphToOnnx(const nnvm::Graph& g,
+                                   std::unordered_map<std::string, NDArray>* params_map) {
+  static std::atomic_ulong subgraph_count = {0};
 
   std::string serialized_onnx_graph;
 
   const nnvm::IndexedGraph& ig = g.indexed_graph();
-  const auto& dtypes = g.GetAttr<DTypeVector>("dtype");
-  const auto& shapes = g.GetAttr<ShapeVector>("shape");
-  const auto& dtype_inputs = g.GetAttr<DTypeVector>("dtype_inputs");
-  const auto& shape_inputs = g.GetAttr<ShapeVector>("shape_inputs");
+  const auto& dtypes           = g.GetAttr<DTypeVector>("dtype");
+  const auto& shapes           = g.GetAttr<ShapeVector>("shape");
+  const auto& dtype_inputs     = g.GetAttr<DTypeVector>("dtype_inputs");
+  const auto& shape_inputs     = g.GetAttr<ShapeVector>("shape_inputs");
 
   ModelProto model_proto;
 
@@ -73,8 +71,8 @@ std::string ConvertNnvmGraphToOnnx(
   // More information on ONNX versions and opsets can be found at:
   // https://github.com/onnx/onnx/blob/master/docs/IR.md
 
-  auto opset_proto = model_proto.add_opset_import();
-  const int64 onnx_opset = 8;
+  auto opset_proto               = model_proto.add_opset_import();
+  const int64 onnx_opset         = 8;
   const int64 onnx_major_version = 3;
 
   // Declare our ONNX versions in our protobuf model.
@@ -82,33 +80,33 @@ std::string ConvertNnvmGraphToOnnx(
   model_proto.set_ir_version(onnx_major_version);
 
   GraphProto* graph_proto = model_proto.mutable_graph();
-  auto subgraph_name_id = subgraph_count.fetch_add(1);
+  auto subgraph_name_id   = subgraph_count.fetch_add(1);
   graph_proto->set_name("MXNetTRTSubgraph" + std::to_string(subgraph_name_id));
 
   auto placeholder_shapes = GetPlaceholderShapes(shape_inputs, ig);
   auto placeholder_dtypes = GetPlaceholderDTypes(dtype_inputs, ig);
-  auto output_lookup = GetOutputLookup(ig);
+  auto output_lookup      = GetOutputLookup(ig);
 
   for (uint32_t node_idx = 0; node_idx < ig.num_nodes(); ++node_idx) {
-      const IndexedGraph::Node& node = ig[node_idx];
-      const nnvm::Node* source = node.source;
-      // If this is a op
-      if (!source->is_variable()) {
-        auto mightNeedPreprocessNode = preprocess_map.find(source->op()->name);
-        // if this op is defined in preprocess_map
-        if (mightNeedPreprocessNode != preprocess_map.end()) {
-          mightNeedPreprocessNode->second(source->attrs, source->inputs, params_map);
-        }
+    const IndexedGraph::Node& node = ig[node_idx];
+    const nnvm::Node* source       = node.source;
+    // If this is a op
+    if (!source->is_variable()) {
+      auto mightNeedPreprocessNode = preprocess_map.find(source->op()->name);
+      // if this op is defined in preprocess_map
+      if (mightNeedPreprocessNode != preprocess_map.end()) {
+        mightNeedPreprocessNode->second(source->attrs, source->inputs, params_map);
       }
+    }
   }
 
   uint32_t current_input = 0;
   // Can't do a foreach over IndexedGraph since it doesn't implement begin(), etc.
   for (uint32_t node_idx = 0; node_idx < ig.num_nodes(); ++node_idx) {
     const IndexedGraph::Node& node = ig[node_idx];
-    const nnvm::Node* source = node.source;
-    const NodeAttrs& attrs = source->attrs;
-    const Op* op = source->op();
+    const nnvm::Node* source       = node.source;
+    const NodeAttrs& attrs         = source->attrs;
+    const Op* op                   = source->op();
 
     std::string node_name = attrs.name;
     // Here, "variable" actually means anything that's not an op i.e. a constant (weights) or a
@@ -130,8 +128,7 @@ std::string ConvertNnvmGraphToOnnx(
     } else {
       // It's an op, rather than a "variable" (constant or placeholder)
       if (converter_map.count(op->name) == 0) {
-        LOG(FATAL) << "Conversion for node of type " << op->name << " (node "
-                   << node_name << ") "
+        LOG(FATAL) << "Conversion for node of type " << op->name << " (node " << node_name << ") "
                    << " is not supported yet.";
       }
       // Find function ptr to a converter based on the op name, and invoke the converter. This
@@ -156,7 +153,7 @@ std::string ConvertNnvmGraphToOnnx(
   return serialized_onnx_graph;
 }
 
-void DefaultConnectInputsOutputs(NodeProto *node_proto,
+void DefaultConnectInputsOutputs(NodeProto* node_proto,
                                  const array_view<IndexedGraph::NodeEntry>& inputs,
                                  const nnvm::IndexedGraph& ig,
                                  const std::string& node_name) {
@@ -173,8 +170,10 @@ void DefaultConnectInputsOutputs(NodeProto *node_proto,
   node_proto->add_output(node_name);
 }
 
-TensorProto* const Make1DTensor(GraphProto* const graph_proto, const int64_t& size,
-                                const std::string& name, const TensorProto_DataType& dtype) {
+TensorProto* const Make1DTensor(GraphProto* const graph_proto,
+                                const int64_t& size,
+                                const std::string& name,
+                                const TensorProto_DataType& dtype) {
   TensorProto* const initializer_proto = graph_proto->add_initializer();
   initializer_proto->set_name(name);
   initializer_proto->set_data_type(dtype);
@@ -250,7 +249,9 @@ void ConvertSlice(GraphProto* const graph_proto, const Node* node, const Graph&
 }
 */
 
-void ConvertIdentity(GraphProto *graph_proto, const std::string& node_name, const NodeAttrs& attrs,
+void ConvertIdentity(GraphProto* graph_proto,
+                     const std::string& node_name,
+                     const NodeAttrs& attrs,
                      const nnvm::IndexedGraph& ig,
                      const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
@@ -260,7 +261,8 @@ void ConvertIdentity(GraphProto *graph_proto, const std::string& node_name, cons
 }
 
 template <class ConvDeconvParam>
-void ConvDeconvConvertHelper(NodeProto *node_proto, const NodeAttrs& attrs,
+void ConvDeconvConvertHelper(NodeProto* node_proto,
+                             const NodeAttrs& attrs,
                              const nnvm::IndexedGraph& ig,
                              const array_view<IndexedGraph::NodeEntry>& inputs,
                              const ConvDeconvParam& param,
@@ -274,8 +276,8 @@ void ConvDeconvConvertHelper(NodeProto *node_proto, const NodeAttrs& attrs,
   const mxnet::TShape kernel = param.kernel;
   const mxnet::TShape stride = param.stride;
   const mxnet::TShape dilate = param.dilate;
-  const mxnet::TShape pad = param.pad;
-  const uint32_t num_group = param.num_group;
+  const mxnet::TShape pad    = param.pad;
+  const uint32_t num_group   = param.num_group;
   // const bool no_bias = conv_param.no_bias;
   const dmlc::optional<int> layout = param.layout;
 
@@ -307,7 +309,7 @@ void ConvDeconvConvertHelper(NodeProto *node_proto, const NodeAttrs& attrs,
   pads->set_name("pads");
   pads->set_type(AttributeProto::INTS);
 
-  for (int i =0; i < 2; i++) {
+  for (int i = 0; i < 2; i++) {
     for (dim_t kval : pad) {
       pads->add_ints(static_cast<int64>(kval));
     }
@@ -322,31 +324,33 @@ void ConvDeconvConvertHelper(NodeProto *node_proto, const NodeAttrs& attrs,
   }
 }
 
-void ConvertConvolution(GraphProto *graph_proto, const std::string& node_name,
+void ConvertConvolution(GraphProto* graph_proto,
+                        const std::string& node_name,
                         const NodeAttrs& attrs,
                         const nnvm::IndexedGraph& ig,
                         const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
   node_proto->set_name(node_name);
   const auto& conv_param = nnvm::get<op::ConvolutionParam>(attrs.parsed);
-  ConvDeconvConvertHelper(node_proto, attrs, ig, inputs, conv_param,
-      ConvDeconvType::Convolution);
+  ConvDeconvConvertHelper(node_proto, attrs, ig, inputs, conv_param, ConvDeconvType::Convolution);
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }  // end ConvertConvolution
 
-void ConvertDeconvolution(GraphProto *graph_proto, const std::string& node_name,
+void ConvertDeconvolution(GraphProto* graph_proto,
+                          const std::string& node_name,
                           const NodeAttrs& attrs,
                           const nnvm::IndexedGraph& ig,
                           const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
   node_proto->set_name(node_name);
   const auto& deconv_param = nnvm::get<op::DeconvolutionParam>(attrs.parsed);
-  ConvDeconvConvertHelper(node_proto, attrs, ig, inputs, deconv_param,
-      ConvDeconvType::Deconvolution);
+  ConvDeconvConvertHelper(
+      node_proto, attrs, ig, inputs, deconv_param, ConvDeconvType::Deconvolution);
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }  // end ConvertDeconvolution
 
-void ConvertPooling(GraphProto *graph_proto, const std::string& node_name,
+void ConvertPooling(GraphProto* graph_proto,
+                    const std::string& node_name,
                     const NodeAttrs& attrs,
                     const nnvm::IndexedGraph& ig,
                     const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -356,9 +360,9 @@ void ConvertPooling(GraphProto *graph_proto, const std::string& node_name,
 
   const mxnet::TShape kernel = pooling_param.kernel;
   const mxnet::TShape stride = pooling_param.stride;
-  const mxnet::TShape pad = pooling_param.pad;
-  const int pool_type = pooling_param.pool_type;
-  const bool global_pool = pooling_param.global_pool;
+  const mxnet::TShape pad    = pooling_param.pad;
+  const int pool_type        = pooling_param.pool_type;
+  const bool global_pool     = pooling_param.global_pool;
 
   if (global_pool) {
     if (pool_type == pool_enum::kMaxPooling) {
@@ -386,7 +390,7 @@ void ConvertPooling(GraphProto *graph_proto, const std::string& node_name,
   pads->set_type(AttributeProto::INTS);
 
   // Convert from MXNet symetric pads to ONNX non-symetric by running through padding twice.
-  for (int i =0; i < 2; i++) {
+  for (int i = 0; i < 2; i++) {
     for (dim_t kval : pad) {
       pads->add_ints(static_cast<int64>(kval));
     }
@@ -426,7 +430,9 @@ void ConvertPooling(GraphProto *graph_proto, const std::string& node_name,
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }  // end ConvertPooling
 
-void ConvertRelu(GraphProto *graph_proto, const std::string& node_name, const NodeAttrs& /*attrs*/,
+void ConvertRelu(GraphProto* graph_proto,
+                 const std::string& node_name,
+                 const NodeAttrs& /*attrs*/,
                  const nnvm::IndexedGraph& ig,
                  const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
@@ -435,7 +441,8 @@ void ConvertRelu(GraphProto *graph_proto, const std::string& node_name, const No
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertActivation(GraphProto *graph_proto, const std::string& node_name,
+void ConvertActivation(GraphProto* graph_proto,
+                       const std::string& node_name,
                        const NodeAttrs& attrs,
                        const nnvm::IndexedGraph& ig,
                        const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -465,7 +472,8 @@ void ConvertActivation(GraphProto *graph_proto, const std::string& node_name,
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertFullyConnected(GraphProto *graph_proto, const std::string& node_name,
+void ConvertFullyConnected(GraphProto* graph_proto,
+                           const std::string& node_name,
                            const NodeAttrs& attrs,
                            const nnvm::IndexedGraph& ig,
                            const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -474,28 +482,28 @@ void ConvertFullyConnected(GraphProto *graph_proto, const std::string& node_name
   // by Transpose+MatMul+Add
   if (!act_param.flatten && !act_param.no_bias) {
     NodeProto* tranpose_node_proto = graph_proto->add_node();
-    NodeProto* matmul_node_proto = graph_proto->add_node();
-    NodeProto* add_node_proto = graph_proto->add_node();
-    tranpose_node_proto->set_name(node_name+"_Transpose");
-    matmul_node_proto->set_name(node_name+"_MatMul");
-    add_node_proto->set_name(node_name+"_Add");
+    NodeProto* matmul_node_proto   = graph_proto->add_node();
+    NodeProto* add_node_proto      = graph_proto->add_node();
+    tranpose_node_proto->set_name(node_name + "_Transpose");
+    matmul_node_proto->set_name(node_name + "_MatMul");
+    add_node_proto->set_name(node_name + "_Add");
 
     tranpose_node_proto->set_op_type("Transpose");
     matmul_node_proto->set_op_type("MatMul");
     add_node_proto->set_op_type("Add");
 
-    std::string input_node_name = ig[inputs[op::conv::kData].node_id].source->attrs.name;
+    std::string input_node_name  = ig[inputs[op::conv::kData].node_id].source->attrs.name;
     std::string weight_node_name = ig[inputs[op::conv::kWeight].node_id].source->attrs.name;
-    std::string bias_node_name = ig[inputs[op::conv::kBias].node_id].source->attrs.name;
+    std::string bias_node_name   = ig[inputs[op::conv::kBias].node_id].source->attrs.name;
 
     tranpose_node_proto->add_input(weight_node_name);
-    tranpose_node_proto->add_output(node_name+"_Transpose");
+    tranpose_node_proto->add_output(node_name + "_Transpose");
 
     matmul_node_proto->add_input(input_node_name);
-    matmul_node_proto->add_input(node_name+"_Transpose");
-    matmul_node_proto->add_output(node_name+"_MatMul");
+    matmul_node_proto->add_input(node_name + "_Transpose");
+    matmul_node_proto->add_output(node_name + "_MatMul");
 
-    add_node_proto->add_input(node_name+"_MatMul");
+    add_node_proto->add_input(node_name + "_MatMul");
     add_node_proto->add_input(bias_node_name);
     // Add's output is the output of the Transpose+MatMul+Add subgraph
     add_node_proto->add_output(node_name);
@@ -503,35 +511,37 @@ void ConvertFullyConnected(GraphProto *graph_proto, const std::string& node_name
     NodeProto* node_proto = graph_proto->add_node();
     node_proto->set_name(node_name);
     if (act_param.no_bias) {
-        node_proto->set_op_type("MatMul");
+      node_proto->set_op_type("MatMul");
     } else {
-        node_proto->set_op_type("Gemm");
-
-        AttributeProto* const alpha = node_proto->add_attribute();
-        alpha->set_name("alpha");
-        alpha->set_type(AttributeProto::FLOAT);
-        alpha->set_f(1.0f);
-
-        AttributeProto* const beta = node_proto->add_attribute();
-        beta->set_name("beta");
-        beta->set_type(AttributeProto::FLOAT);
-        beta->set_f(1.0f);
-
-        AttributeProto* const transA = node_proto->add_attribute();
-        transA->set_name("transA");
-        transA->set_type(AttributeProto::INT);
-        transA->set_i(0);
-
-        AttributeProto* const transB = node_proto->add_attribute();
-        transB->set_name("transB");
-        transB->set_type(AttributeProto::INT);
-        transB->set_i(1);
+      node_proto->set_op_type("Gemm");
+
+      AttributeProto* const alpha = node_proto->add_attribute();
+      alpha->set_name("alpha");
+      alpha->set_type(AttributeProto::FLOAT);
+      alpha->set_f(1.0f);
+
+      AttributeProto* const beta = node_proto->add_attribute();
+      beta->set_name("beta");
+      beta->set_type(AttributeProto::FLOAT);
+      beta->set_f(1.0f);
+
+      AttributeProto* const transA = node_proto->add_attribute();
+      transA->set_name("transA");
+      transA->set_type(AttributeProto::INT);
+      transA->set_i(0);
+
+      AttributeProto* const transB = node_proto->add_attribute();
+      transB->set_name("transB");
+      transB->set_type(AttributeProto::INT);
+      transB->set_i(1);
     }
     DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
   }
 }
 
-void ConvertSlice(GraphProto *graph_proto, const std::string& node_name, const NodeAttrs& attrs,
+void ConvertSlice(GraphProto* graph_proto,
+                  const std::string& node_name,
+                  const NodeAttrs& attrs,
                   const nnvm::IndexedGraph& ig,
                   const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
@@ -570,7 +580,8 @@ void ConvertSlice(GraphProto *graph_proto, const std::string& node_name, const N
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertFlatten(GraphProto *graph_proto, const std::string& node_name,
+void ConvertFlatten(GraphProto* graph_proto,
+                    const std::string& node_name,
                     const NodeAttrs& /*attrs*/,
                     const nnvm::IndexedGraph& ig,
                     const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -588,7 +599,8 @@ void ConvertFlatten(GraphProto *graph_proto, const std::string& node_name,
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertBatchNorm(GraphProto *graph_proto, const std::string& node_name,
+void ConvertBatchNorm(GraphProto* graph_proto,
+                      const std::string& node_name,
                       const NodeAttrs& attrs,
                       const nnvm::IndexedGraph& ig,
                       const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -617,7 +629,8 @@ void ConvertBatchNorm(GraphProto *graph_proto, const std::string& node_name,
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertElementwiseAdd(GraphProto *graph_proto, const std::string& node_name,
+void ConvertElementwiseAdd(GraphProto* graph_proto,
+                           const std::string& node_name,
                            const NodeAttrs& /*attrs*/,
                            const nnvm::IndexedGraph& ig,
                            const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -627,7 +640,8 @@ void ConvertElementwiseAdd(GraphProto *graph_proto, const std::string& node_name
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertElementwiseSub(GraphProto *graph_proto, const std::string& node_name,
+void ConvertElementwiseSub(GraphProto* graph_proto,
+                           const std::string& node_name,
                            const NodeAttrs& /*attrs*/,
                            const nnvm::IndexedGraph& ig,
                            const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -637,7 +651,8 @@ void ConvertElementwiseSub(GraphProto *graph_proto, const std::string& node_name
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertElementwiseMul(GraphProto *graph_proto, const std::string& node_name,
+void ConvertElementwiseMul(GraphProto* graph_proto,
+                           const std::string& node_name,
                            const NodeAttrs& /*attrs*/,
                            const nnvm::IndexedGraph& ig,
                            const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -647,7 +662,8 @@ void ConvertElementwiseMul(GraphProto *graph_proto, const std::string& node_name
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertConcatenate(GraphProto *graph_proto, const std::string& node_name,
+void ConvertConcatenate(GraphProto* graph_proto,
+                        const std::string& node_name,
                         const NodeAttrs& attrs,
                         const nnvm::IndexedGraph& ig,
                         const array_view<IndexedGraph::NodeEntry>& inputs) {
@@ -685,11 +701,11 @@ inline TensorProto_DataType ConvertDType(int dtype) {
   }
 }
 
-std::unordered_map<std::string, TShape> GetPlaceholderShapes(
-    const ShapeVector& shape_inputs, const nnvm::IndexedGraph& ig) {
+std::unordered_map<std::string, TShape> GetPlaceholderShapes(const ShapeVector& shape_inputs,
+                                                             const nnvm::IndexedGraph& ig) {
   std::unordered_map<std::string, mxnet::TShape> placeholder_shapes;
   for (uint32_t i = 0; i < shape_inputs.size(); ++i) {
-    std::string name = ig[ig.input_nodes()[i]].source->attrs.name;
+    std::string name  = ig[ig.input_nodes()[i]].source->attrs.name;
     mxnet::TShape shp = shape_inputs[i];
     if (!mxnet::op::shape_is_none(shp)) {
       // TODO(@reminisce): confirm
@@ -699,40 +715,37 @@ std::unordered_map<std::string, TShape> GetPlaceholderShapes(
   return placeholder_shapes;
 }
 
-std::unordered_map<std::string, int> GetPlaceholderDTypes(
-    const DTypeVector& dtype_inputs, const nnvm::IndexedGraph& ig) {
+std::unordered_map<std::string, int> GetPlaceholderDTypes(const DTypeVector& dtype_inputs,
+                                                          const nnvm::IndexedGraph& ig) {
   std::unordered_map<std::string, int> placeholder_dtypes;
   for (uint32_t i = 0; i < dtype_inputs.size(); ++i) {
     std::string name = ig[ig.input_nodes()[i]].source->attrs.name;
-    int dtype = dtype_inputs[i];
+    int dtype        = dtype_inputs[i];
     placeholder_dtypes.emplace(name, dtype);
   }
   return placeholder_dtypes;
 }
 
-std::unordered_map<std::string, uint32_t> GetOutputLookup(
-    const nnvm::IndexedGraph& ig) {
+std::unordered_map<std::string, uint32_t> GetOutputLookup(const nnvm::IndexedGraph& ig) {
   std::unordered_map<std::string, uint32_t> output_lookup;
-  const std::vector<nnvm::IndexedGraph::NodeEntry>& graph_outputs =
-      ig.outputs();
+  const std::vector<nnvm::IndexedGraph::NodeEntry>& graph_outputs = ig.outputs();
   for (uint32_t i = 0; i < graph_outputs.size(); ++i) {
-    const uint32_t id = graph_outputs[i].node_id;
+    const uint32_t id                = graph_outputs[i].node_id;
     const IndexedGraph::Node ig_node = ig[id];
-    const nnvm::Node* const source = ig_node.source;
-    const std::string name = source->attrs.name;
+    const nnvm::Node* const source   = ig_node.source;
+    const std::string name           = source->attrs.name;
     output_lookup.emplace(name, i);
   }
   return output_lookup;
 }
 
-void ConvertPlaceholder(
-    const std::string& node_name,
-    const std::unordered_map<std::string, TShape>& placeholder_shapes,
-    const std::unordered_map<std::string, int>& placeholder_dtypes,
-    GraphProto* const graph_proto) {
+void ConvertPlaceholder(const std::string& node_name,
+                        const std::unordered_map<std::string, TShape>& placeholder_shapes,
+                        const std::unordered_map<std::string, int>& placeholder_dtypes,
+                        GraphProto* const graph_proto) {
   auto val_info_proto = graph_proto->add_input();
-  auto type_proto = val_info_proto->mutable_type()->mutable_tensor_type();
-  auto shape_proto = type_proto->mutable_shape();
+  auto type_proto     = val_info_proto->mutable_type()->mutable_tensor_type();
+  auto shape_proto    = type_proto->mutable_shape();
 
   val_info_proto->set_name(node_name);
   auto entry_shape = placeholder_shapes.find(node_name)->second;
@@ -744,18 +757,18 @@ void ConvertPlaceholder(
   }
 }
 
-void ConvertConstant(
-    GraphProto* const graph_proto, const std::string& node_name,
-    const std::unordered_map<std::string, NDArray>* const params_map) {
-    TensorProto* const initializer_proto = graph_proto->add_initializer();
+void ConvertConstant(GraphProto* const graph_proto,
+                     const std::string& node_name,
+                     const std::unordered_map<std::string, NDArray>* const params_map) {
+  TensorProto* const initializer_proto = graph_proto->add_initializer();
 
   // Create initializer for constants
   initializer_proto->set_name(node_name);
 
-  const NDArray nd = params_map->find(node_name)->second;
-  const TBlob& blob = nd.data();
+  const NDArray nd   = params_map->find(node_name)->second;
+  const TBlob& blob  = nd.data();
   const TShape shape = blob.shape_;
-  const auto dtype = ConvertDType(nd.dtype());
+  const auto dtype   = ConvertDType(nd.dtype());
   initializer_proto->set_data_type(dtype);
 
   for (auto& dim : shape) {
@@ -777,8 +790,7 @@ void ConvertConstant(
     uint16_t* const data_ptr = shared_data_ptr.get();
     nd.SyncCopyToCPU(static_cast<void*>(data_ptr), size);
     for (size_t blob_idx = 0; blob_idx < size; ++blob_idx) {
-      initializer_proto->add_int32_data(
-          reinterpret_cast<int32_t*>(data_ptr)[blob_idx]);
+      initializer_proto->add_int32_data(reinterpret_cast<int32_t*>(data_ptr)[blob_idx]);
     }
   } else {
     LOG(FATAL) << "dtype not supported for variables: " << node_name;
@@ -795,15 +807,16 @@ void ConvertConstant(
   }
 }
 
-void ConvertOutput(
-    GraphProto* const graph_proto,
-    const std::unordered_map<std::string, uint32_t>::iterator& out_iter,
-    const std::string& node_name, const ShapeVector& shapes,
-    const DTypeVector& dtypes, const nnvm::IndexedGraph &ig) {
-  uint32_t out_idx = ig.entry_id(ig.outputs()[out_iter->second]);
-  int dtype = dtypes[out_idx];
-  auto graph_out = graph_proto->add_output();
-  auto tensor_type = graph_out->mutable_type()->mutable_tensor_type();
+void ConvertOutput(GraphProto* const graph_proto,
+                   const std::unordered_map<std::string, uint32_t>::iterator& out_iter,
+                   const std::string& node_name,
+                   const ShapeVector& shapes,
+                   const DTypeVector& dtypes,
+                   const nnvm::IndexedGraph& ig) {
+  uint32_t out_idx        = ig.entry_id(ig.outputs()[out_iter->second]);
+  int dtype               = dtypes[out_idx];
+  auto graph_out          = graph_proto->add_output();
+  auto tensor_type        = graph_out->mutable_type()->mutable_tensor_type();
   auto tensor_shape_proto = tensor_type->mutable_shape();
   graph_out->set_name(node_name);
 
@@ -816,7 +829,9 @@ void ConvertOutput(
   }
 }
 
-void ConvertClip(GraphProto *graph_proto, const std::string& node_name, const NodeAttrs& attrs,
+void ConvertClip(GraphProto* graph_proto,
+                 const std::string& node_name,
+                 const NodeAttrs& attrs,
                  const nnvm::IndexedGraph& ig,
                  const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
@@ -839,7 +854,9 @@ void ConvertClip(GraphProto *graph_proto, const std::string& node_name, const No
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertPad(GraphProto *graph_proto, const std::string& node_name, const NodeAttrs& attrs,
+void ConvertPad(GraphProto* graph_proto,
+                const std::string& node_name,
+                const NodeAttrs& attrs,
                 const nnvm::IndexedGraph& ig,
                 const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
@@ -874,8 +891,7 @@ void ConvertPad(GraphProto *graph_proto, const std::string& node_name, const Nod
   std::vector<int64> pad_begin;
   std::vector<int64> pad_end;
   for (int st = 0; st < 2; ++st) {
-    for (auto it = param.pad_width.begin() + st;
-         it != param.pad_width.end(); it += 2) {
+    for (auto it = param.pad_width.begin() + st; it != param.pad_width.end(); it += 2) {
       pads->add_ints(static_cast<int64>(*it));
     }
   }
@@ -888,7 +904,9 @@ void ConvertPad(GraphProto *graph_proto, const std::string& node_name, const Nod
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void ConvertDropout(GraphProto *graph_proto, const std::string& node_name, const NodeAttrs& attrs,
+void ConvertDropout(GraphProto* graph_proto,
+                    const std::string& node_name,
+                    const NodeAttrs& attrs,
                     const nnvm::IndexedGraph& ig,
                     const array_view<IndexedGraph::NodeEntry>& inputs) {
   NodeProto* node_proto = graph_proto->add_node();
@@ -897,14 +915,14 @@ void ConvertDropout(GraphProto *graph_proto, const std::string& node_name, const
   DefaultConnectInputsOutputs(node_proto, inputs, ig, node_name);
 }
 
-void PreprocessBatchNorm(const NodeAttrs &attrs,
-                         const std::vector<nnvm::NodeEntry> &inputs,
-                         std::unordered_map<std::string, NDArray> *params_map) {
+void PreprocessBatchNorm(const NodeAttrs& attrs,
+                         const std::vector<nnvm::NodeEntry>& inputs,
+                         std::unordered_map<std::string, NDArray>* params_map) {
   const auto& param = nnvm::get<op::BatchNormParam>(attrs.parsed);
   if (param.fix_gamma) {
     // if mxnet is specify fix_gamma, we will need to preprocess the params map
     // to convert the gamma associate with this batch norm layer to 1.
-    std::string gammaNodeName = inputs[batchnorm::kGamma].node->attrs.name;
+    std::string gammaNodeName    = inputs[batchnorm::kGamma].node->attrs.name;
     (*params_map)[gammaNodeName] = 1.0f;
   }
 }
diff --git a/src/operator/subgraph/tensorrt/onnx_to_tensorrt.cc b/src/operator/subgraph/tensorrt/onnx_to_tensorrt.cc
index 4f5bdcb8561c..cb2ae7cb6265 100644
--- a/src/operator/subgraph/tensorrt/onnx_to_tensorrt.cc
+++ b/src/operator/subgraph/tensorrt/onnx_to_tensorrt.cc
@@ -38,8 +38,8 @@
 #include <dmlc/logging.h>
 #include <dmlc/parameter.h>
 
-using std::cout;
 using std::cerr;
+using std::cout;
 using std::endl;
 
 namespace onnx_to_tensorrt {
@@ -48,34 +48,31 @@ std::string onnx_ir_version_string(int64_t ir_version = onnx::IR_VERSION) {
   int onnx_ir_major = ir_version / 1000000;
   int onnx_ir_minor = ir_version % 1000000 / 10000;
   int onnx_ir_patch = ir_version % 10000;
-  return (std::to_string(onnx_ir_major) + "." +
-    std::to_string(onnx_ir_minor) + "." +
-    std::to_string(onnx_ir_patch));
+  return (std::to_string(onnx_ir_major) + "." + std::to_string(onnx_ir_minor) + "." +
+          std::to_string(onnx_ir_patch));
 }
 
 void PrintVersion() {
   cout << "Parser built against:" << endl;
   cout << "  ONNX IR version:  " << onnx_ir_version_string(onnx::IR_VERSION) << endl;
-  cout << "  TensorRT version: "
-    << NV_TENSORRT_MAJOR << "."
-    << NV_TENSORRT_MINOR << "."
-    << NV_TENSORRT_PATCH << endl;
+  cout << "  TensorRT version: " << NV_TENSORRT_MAJOR << "." << NV_TENSORRT_MINOR << "."
+       << NV_TENSORRT_PATCH << endl;
 }
 
 std::tuple<unique_ptr<nvinfer1::ICudaEngine>,
            unique_ptr<nvonnxparser::IParser>,
-           std::unique_ptr<TRT_Logger> > onnxToTrtCtx(
-        const std::string& onnx_model,
-        int32_t max_batch_size,
-        size_t max_workspace_size,
-        nvinfer1::ILogger::Severity verbosity,
-        bool debug_builder) {
+           std::unique_ptr<TRT_Logger> >
+onnxToTrtCtx(const std::string& onnx_model,
+             int32_t max_batch_size,
+             size_t max_workspace_size,
+             nvinfer1::ILogger::Severity verbosity,
+             bool debug_builder) {
   GOOGLE_PROTOBUF_VERIFY_VERSION;
 
-  auto trt_logger = std::unique_ptr<TRT_Logger>(new TRT_Logger(verbosity));
+  auto trt_logger  = std::unique_ptr<TRT_Logger>(new TRT_Logger(verbosity));
   auto trt_builder = InferObject(nvinfer1::createInferBuilder(*trt_logger));
-  const auto explicitBatch = 1U << static_cast<uint32_t>(
-                             nvinfer1::NetworkDefinitionCreationFlag::kEXPLICIT_BATCH);
+  const auto explicitBatch =
+      1U << static_cast<uint32_t>(nvinfer1::NetworkDefinitionCreationFlag::kEXPLICIT_BATCH);
   auto trt_network = InferObject(trt_builder->createNetworkV2(explicitBatch));
   auto trt_parser  = InferObject(nvonnxparser::createParser(*trt_network, *trt_logger));
   ::ONNX_NAMESPACE::ModelProto parsed_model;
@@ -84,33 +81,28 @@ std::tuple<unique_ptr<nvinfer1::ICudaEngine>,
   if (!parsed_model.ParseFromString(onnx_model)) {
     throw dmlc::Error("Could not parse ONNX from string");
   }
-  if ( !trt_parser->parse(onnx_model.c_str(), onnx_model.size()) ) {
-      size_t nerror = trt_parser->getNbErrors();
-      for ( size_t i=0; i < nerror; ++i ) {
-        nvonnxparser::IParserError const* error = trt_parser->getError(i);
-        if ( error->node() != -1 ) {
-          ::ONNX_NAMESPACE::NodeProto const& node =
-            parsed_model.graph().node(error->node());
-          cerr << "While parsing node number " << error->node()
-               << " [" << node.op_type();
-          if ( !node.output().empty() ) {
-            cerr << " -> \"" << node.output(0) << "\"";
-          }
-          cerr << "]:" << endl;
-          if ( static_cast<int>(verbosity) >= \
-            static_cast<int>(nvinfer1::ILogger::Severity::kINFO) ) {
-            cerr << "--- Begin node ---" << endl;
-            cerr << node.DebugString() << endl;
-            cerr << "--- End node ---" << endl;
-          }
+  if (!trt_parser->parse(onnx_model.c_str(), onnx_model.size())) {
+    size_t nerror = trt_parser->getNbErrors();
+    for (size_t i = 0; i < nerror; ++i) {
+      nvonnxparser::IParserError const* error = trt_parser->getError(i);
+      if (error->node() != -1) {
+        ::ONNX_NAMESPACE::NodeProto const& node = parsed_model.graph().node(error->node());
+        cerr << "While parsing node number " << error->node() << " [" << node.op_type();
+        if (!node.output().empty()) {
+          cerr << " -> \"" << node.output(0) << "\"";
+        }
+        cerr << "]:" << endl;
+        if (static_cast<int>(verbosity) >= static_cast<int>(nvinfer1::ILogger::Severity::kINFO)) {
+          cerr << "--- Begin node ---" << endl;
+          cerr << node.DebugString() << endl;
+          cerr << "--- End node ---" << endl;
         }
-        cerr << "ERROR: "
-             << error->file() << ":" << error->line()
-             << " In function " << error->func() << ":\n"
-             << "[" << static_cast<int>(error->code()) << "] " << error->desc()
-             << endl;
       }
-      throw dmlc::Error("Cannot parse ONNX into TensorRT Engine");
+      cerr << "ERROR: " << error->file() << ":" << error->line() << " In function " << error->func()
+           << ":\n"
+           << "[" << static_cast<int>(error->code()) << "] " << error->desc() << endl;
+    }
+    throw dmlc::Error("Cannot parse ONNX into TensorRT Engine");
   }
   if (dmlc::GetEnv("MXNET_TENSORRT_USE_FP16", true)) {
     if (trt_builder->platformHasFastFp16()) {
diff --git a/src/operator/subgraph/tensorrt/onnx_to_tensorrt.h b/src/operator/subgraph/tensorrt/onnx_to_tensorrt.h
index b89422f59069..653831d32f76 100644
--- a/src/operator/subgraph/tensorrt/onnx_to_tensorrt.h
+++ b/src/operator/subgraph/tensorrt/onnx_to_tensorrt.h
@@ -42,20 +42,20 @@
 namespace onnx_to_tensorrt {
 
 struct InferDeleter {
-  template<typename T>
-    void operator()(T* obj) const {
-      if ( obj ) {
-        obj->destroy();
-      }
+  template <typename T>
+  void operator()(T* obj) const {
+    if (obj) {
+      obj->destroy();
     }
+  }
 };
 
-template<typename T>
+template <typename T>
 using unique_ptr = std::unique_ptr<T, InferDeleter>;
 
-template<typename T>
+template <typename T>
 inline unique_ptr<T> InferObject(T* obj) {
-  if ( !obj ) {
+  if (!obj) {
     throw std::runtime_error("Failed to create object");
   }
   return unique_ptr<T>(obj, InferDeleter());
@@ -64,20 +64,20 @@ inline unique_ptr<T> InferObject(T* obj) {
 class TRT_Logger : public nvinfer1::ILogger {
   nvinfer1::ILogger::Severity _verbosity;
   std::ostream* _ostream;
+
  public:
-  TRT_Logger(Severity verbosity = Severity::kWARNING,
-             std::ostream& ostream = std::cout) :
-               _verbosity(verbosity), _ostream(&ostream) {}
+  TRT_Logger(Severity verbosity = Severity::kWARNING, std::ostream& ostream = std::cout)  // NOLINT
+      : _verbosity(verbosity), _ostream(&ostream) {}
   void log(Severity severity, const char* msg) override {
     if (severity <= _verbosity) {
       time_t rawtime = std::time(0);
       char buf[256];
       strftime(&buf[0], 256, "%Y-%m-%d %H:%M:%S", std::gmtime(&rawtime));
-      const char* sevstr = (severity == Severity::kINTERNAL_ERROR ? "    BUG" :
-                            severity == Severity::kERROR          ? "  ERROR" :
-                            severity == Severity::kWARNING        ? "WARNING" :
-                            severity == Severity::kINFO           ? "   INFO" :
-                            "UNKNOWN");
+      const char* sevstr = (severity == Severity::kINTERNAL_ERROR ? "    BUG"
+                            : severity == Severity::kERROR        ? "  ERROR"
+                            : severity == Severity::kWARNING      ? "WARNING"
+                            : severity == Severity::kINFO         ? "   INFO"
+                                                                  : "UNKNOWN");
       (*_ostream) << "[" << buf << " " << sevstr << "] " << msg << std::endl;
     }
   }
@@ -85,12 +85,12 @@ class TRT_Logger : public nvinfer1::ILogger {
 
 std::tuple<unique_ptr<nvinfer1::ICudaEngine>,
            unique_ptr<nvonnxparser::IParser>,
-           std::unique_ptr<TRT_Logger> > onnxToTrtCtx(
-        const std::string& onnx_model,
-        int32_t max_batch_size = 32,
-        size_t max_workspace_size = 1L << 30,
-        nvinfer1::ILogger::Severity verbosity = nvinfer1::ILogger::Severity::kWARNING,
-        bool debug_builder = false);
+           std::unique_ptr<TRT_Logger> >
+onnxToTrtCtx(const std::string& onnx_model,
+             int32_t max_batch_size                = 32,
+             size_t max_workspace_size             = 1L << 30,
+             nvinfer1::ILogger::Severity verbosity = nvinfer1::ILogger::Severity::kWARNING,
+             bool debug_builder                    = false);
 }  // namespace onnx_to_tensorrt
 
 #endif  // MXNET_USE_TENSORRT
diff --git a/src/operator/subgraph/tensorrt/tensorrt-inl.h b/src/operator/subgraph/tensorrt/tensorrt-inl.h
index 79e3d82dfc26..5f84d8e1dd3d 100644
--- a/src/operator/subgraph/tensorrt/tensorrt-inl.h
+++ b/src/operator/subgraph/tensorrt/tensorrt-inl.h
@@ -24,7 +24,7 @@
  * \file tensorrt-inl.h
  * \brief TensorRT operation registration
  * \author Marek Kolodziej, Clement Fuji Tsang
-*/
+ */
 
 #if MXNET_USE_TENSORRT
 
@@ -64,11 +64,11 @@ struct TRTEngineParam {
                  std::unique_ptr<onnx_to_tensorrt::TRT_Logger> _trt_logger,
                  const std::unordered_map<std::string, uint32_t>& input_map,
                  const std::unordered_map<std::string, uint32_t>& output_map) {
-    trt_engine = std::move(_trt_engine);
-    trt_logger = std::move(_trt_logger);
-    trt_parser = std::move(_trt_parser);
-    binding_order = std::make_shared<std::vector<std::pair<uint32_t, bool> > >();
-    bindings = std::make_shared<std::vector<void*> >();
+    trt_engine    = std::move(_trt_engine);
+    trt_logger    = std::move(_trt_logger);
+    trt_parser    = std::move(_trt_parser);
+    binding_order = std::make_shared<std::vector<std::pair<uint32_t, bool>>>();
+    bindings      = std::make_shared<std::vector<void*>>();
     binding_order->reserve(trt_engine->getNbBindings());
     bindings->resize(trt_engine->getNbBindings());
     for (int b = 0; b < trt_engine->getNbBindings(); ++b) {
@@ -86,32 +86,30 @@ struct TRTEngineParam {
   onnx_to_tensorrt::unique_ptr<nvinfer1::IExecutionContext> trt_executor;
   onnx_to_tensorrt::unique_ptr<nvonnxparser::IParser> trt_parser;
   std::unique_ptr<onnx_to_tensorrt::TRT_Logger> trt_logger;
-  std::shared_ptr<std::vector<std::pair<uint32_t, bool> > > binding_order;
-  std::shared_ptr<std::vector<void*> > bindings;
+  std::shared_ptr<std::vector<std::pair<uint32_t, bool>>> binding_order;
+  std::shared_ptr<std::vector<void*>> bindings;
 };
 
 class TensorrtSelector : public SubgraphSelector {
  public:
   const std::unordered_set<std::string> unconditionalTRTops = {
-    "_copy",
-    "clip",
-    "elemwise_add",
-    "elemwise_sub",
-    "elemwise_mul",
-    "Flatten",
-    "Pad",
-    "relu",
-    "rsqrt",
+      "_copy",
+      "clip",
+      "elemwise_add",
+      "elemwise_sub",
+      "elemwise_mul",
+      "Flatten",
+      "Pad",
+      "relu",
+      "rsqrt",
   };
 
-  const std::unordered_set<std::string> withWeightsOps = {
-    "BatchNorm",
-    "Convolution",
-    "Deconvolution",
-    "FullyConnected"
-  };
+  const std::unordered_set<std::string> withWeightsOps = {"BatchNorm",
+                                                          "Convolution",
+                                                          "Deconvolution",
+                                                          "FullyConnected"};
 
-  bool isTRTCompatible(const nnvm::Node &n) {
+  bool isTRTCompatible(const nnvm::Node& n) {
     const std::string op_name = n.op()->name;
     if (op_name == "FullyConnected") {
       const auto& param = nnvm::get<FullyConnectedParam>(n.attrs.parsed);
@@ -204,9 +202,8 @@ class TensorrtSelector : public SubgraphSelector {
     }
 
     if (op_name == "Activation") {
-      return n.attrs.dict.at("act_type") == "relu" ||
-        n.attrs.dict.at("act_type") == "tanh" ||
-        n.attrs.dict.at("act_type") == "sigmoid";
+      return n.attrs.dict.at("act_type") == "relu" || n.attrs.dict.at("act_type") == "tanh" ||
+             n.attrs.dict.at("act_type") == "sigmoid";
     }
 
     if (op_name == "BatchNorm") {
@@ -226,11 +223,11 @@ class TensorrtSelector : public SubgraphSelector {
     return false;
   }
 
-  bool Select(const nnvm::Node &n) override {
+  bool Select(const nnvm::Node& n) override {
     return !n.is_variable() && isTRTCompatible(n);
   }
 
-  bool SelectInput(const nnvm::Node &n, const nnvm::Node &new_node) override {
+  bool SelectInput(const nnvm::Node& n, const nnvm::Node& new_node) override {
     if (new_node.is_variable()) {
       if (withWeightsOps.count(n.op()->name)) {
         return n.inputs[0].node->attrs.name != new_node.attrs.name;
@@ -241,7 +238,7 @@ class TensorrtSelector : public SubgraphSelector {
     return isTRTCompatible(new_node);
   }
 
-  bool SelectOutput(const nnvm::Node &n, const nnvm::Node &new_node) override {
+  bool SelectOutput(const nnvm::Node& n, const nnvm::Node& new_node) override {
     return isTRTCompatible(new_node);
   }
 
@@ -268,11 +265,11 @@ class TensorrtProperty : public SubgraphProperty {
   }
 
   void PrePartition(const nnvm::Graph& g,
-    const std::unordered_map<std::string, std::string>& options_map) override {
-    auto& in_arg_names = g.GetAttr<std::vector<std::string>>("in_arg_names");
-    auto& in_aux_names = g.GetAttr<std::vector<std::string>>("in_aux_names");
-    NDArray **in_args_ptr = g.GetAttr<NDArray**>("in_args");
-    NDArray **in_aux_ptr = g.GetAttr<NDArray**>("in_aux");
+                    const std::unordered_map<std::string, std::string>& options_map) override {
+    auto& in_arg_names    = g.GetAttr<std::vector<std::string>>("in_arg_names");
+    auto& in_aux_names    = g.GetAttr<std::vector<std::string>>("in_aux_names");
+    NDArray** in_args_ptr = g.GetAttr<NDArray**>("in_args");
+    NDArray** in_aux_ptr  = g.GetAttr<NDArray**>("in_aux");
     in_args_dict.clear();
     in_aux_dict.clear();
     // we trust the Python API, len(in_arg_names) == len(in_args_ptr)
@@ -284,26 +281,27 @@ class TensorrtProperty : public SubgraphProperty {
     }
   }
 
-  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol &sym,
-                                   const int subgraph_id) const override {
+  nnvm::ObjectPtr CreateSubgraphNode(const nnvm::Symbol& sym,
+                                     const int subgraph_id) const override {
     nnvm::ObjectPtr n = nnvm::Node::Create();
     nnvm::Symbol new_sym;
-    std::unique_copy(sym.outputs.begin(), sym.outputs.end(),
-        std::back_inserter(new_sym.outputs), [](
-        nnvm::NodeEntry lhs, nnvm::NodeEntry rhs) {
-          return lhs.index == rhs.index && lhs.node.get() == rhs.node.get();
-        });
+    std::unique_copy(sym.outputs.begin(),
+                     sym.outputs.end(),
+                     std::back_inserter(new_sym.outputs),
+                     [](nnvm::NodeEntry lhs, nnvm::NodeEntry rhs) {
+                       return lhs.index == rhs.index && lhs.node.get() == rhs.node.get();
+                     });
     n->attrs.name = "TensorRT" + std::to_string(subgraph_id);
-    n->attrs.op = Op::Get("_TensorRT");
+    n->attrs.op   = Op::Get("_TensorRT");
     CHECK(n->attrs.op);
     n->attrs.subgraphs.emplace_back(std::make_shared<nnvm::Symbol>(new_sym));
 
     // Mapping subgraph params with NDArrays
     TRTParam param;
     std::ostringstream params_oss;
-    for (auto &param_name : new_sym.ListInputNames(nnvm::Symbol::kAll)) {
-      NDArray *cache = nullptr;
-      auto it_args = in_args_dict.find(param_name);
+    for (auto& param_name : new_sym.ListInputNames(nnvm::Symbol::kAll)) {
+      NDArray* cache = nullptr;
+      auto it_args   = in_args_dict.find(param_name);
       if (it_args != in_args_dict.end()) {
         cache = it_args->second;
       } else {
@@ -322,7 +320,7 @@ class TensorrtProperty : public SubgraphProperty {
     if (!tensorrt_params_names.empty()) {
       tensorrt_params_names.pop_back();
     }
-    n->attrs.parsed = param;
+    n->attrs.parsed                        = param;
     n->attrs.dict["subgraph_params_names"] = tensorrt_params_names;
     return n;
   }
@@ -331,16 +329,16 @@ class TensorrtProperty : public SubgraphProperty {
     return std::make_shared<TensorrtSelector>();
   }
 
-  void ConnectSubgraphOutputs(const nnvm::ObjectPtr subgraph_node, \
+  void ConnectSubgraphOutputs(const nnvm::ObjectPtr subgraph_node,
                               std::vector<nnvm::NodeEntry*>* output_entries) const override {
     std::vector<nnvm::NodeEntry>& outputs = subgraph_node->attrs.subgraphs[0]->outputs;
-    TRTParam& _params = nnvm::get<TRTParam>(subgraph_node->attrs.parsed);
+    TRTParam& _params                     = nnvm::get<TRTParam>(subgraph_node->attrs.parsed);
     for (size_t i = 0; i < outputs.size(); i++) {
       auto& o = outputs[i];
       for (auto& e : *output_entries) {
         if (o.index == e->index && o.node.get() == e->node.get()) {
           e->index = i;
-          e->node = subgraph_node;
+          e->node  = subgraph_node;
           // TODO(cfujitsang): For future support this would fail
           //                   if the node have multiple outputs
           _params.outputs_to_idx[o.node->attrs.name] = i;
@@ -357,7 +355,7 @@ class TensorrtProperty : public SubgraphProperty {
     subgraph_node->inputs.clear();
     subgraph_node->inputs.resize(orig_input_entries->size());
     for (size_t i = 0; i < orig_input_entries->size(); ++i) {
-      subgraph_node->inputs[i] = orig_input_entries->at(i);
+      subgraph_node->inputs[i]                                      = orig_input_entries->at(i);
       _params.inputs_to_idx[input_entries->at(i)->node->attrs.name] = i;
     }
     subgraph_node->attrs.parsed = std::move(_params);
@@ -366,7 +364,6 @@ class TensorrtProperty : public SubgraphProperty {
   std::unordered_map<std::string, NDArray*> in_args_dict, in_aux_dict;
 };
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/subgraph/tensorrt/tensorrt.cc b/src/operator/subgraph/tensorrt/tensorrt.cc
index e872e9274f21..831baf30722c 100644
--- a/src/operator/subgraph/tensorrt/tensorrt.cc
+++ b/src/operator/subgraph/tensorrt/tensorrt.cc
@@ -22,7 +22,7 @@
  * \file tensorrt.cc
  * \brief TensorRT operation registration
  * \author Marek Kolodziej, Clement Fuji Tsang
-*/
+ */
 
 #if MXNET_USE_TENSORRT
 
@@ -32,14 +32,14 @@ namespace mxnet {
 namespace op {
 
 inline uint32_t TRTNumInputs(const nnvm::NodeAttrs& attrs) {
-  const TRTParam& param = nnvm::get<TRTParam>(attrs.parsed);
+  const TRTParam& param    = nnvm::get<TRTParam>(attrs.parsed);
   const auto inputs_to_idx = param.inputs_to_idx;
   return inputs_to_idx.size();
 }
 
 inline std::vector<std::string> TRTListInputNames(const nnvm::NodeAttrs& attrs) {
   std::vector<std::string> outputs;
-  const TRTParam& param = nnvm::get<TRTParam>(attrs.parsed);
+  const TRTParam& param    = nnvm::get<TRTParam>(attrs.parsed);
   const auto inputs_to_idx = param.inputs_to_idx;
   for (auto& p : inputs_to_idx) {
     outputs[p.second] = p.first;
@@ -48,26 +48,26 @@ inline std::vector<std::string> TRTListInputNames(const nnvm::NodeAttrs& attrs)
 }
 
 inline bool TRTInferShape(const nnvm::NodeAttrs& attrs,
-                          std::vector<TShape> *in_shapes,
-                          std::vector<TShape> *out_shapes) {
+                          std::vector<TShape>* in_shapes,
+                          std::vector<TShape>* out_shapes) {
   using namespace exec;
   const nnvm::Symbol subgraph_sym = *(attrs.subgraphs[0]);
-  const TRTParam& param = nnvm::get<TRTParam>(attrs.parsed);
-  auto params_map = param.params_map;
-  auto inputs_to_idx = param.inputs_to_idx;
+  const TRTParam& param           = nnvm::get<TRTParam>(attrs.parsed);
+  auto params_map                 = param.params_map;
+  auto inputs_to_idx              = param.inputs_to_idx;
   nnvm::Graph g;
-  g.outputs = subgraph_sym.outputs;
+  g.outputs         = subgraph_sym.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_shapes->size() + params_map.size());
   CHECK_EQ(idx_g.outputs().size(), out_shapes->size());
 
   // Put the input and output shapes to the shape vector.
   mxnet::ShapeVector shapes(idx_g.num_node_entries());
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_shapes->size() + params_map.size());
   for (size_t i = 0; i < input_nids.size(); i++) {
-    auto node = idx_g[input_nids[i]].source;
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto node      = idx_g[input_nids[i]].source;
+    auto eid       = idx_g.entry_id(input_nids[i], 0);
     auto it_params = params_map.find(node->attrs.name);
     auto it_inputs = inputs_to_idx.find(node->attrs.name);
     if (it_params != params_map.end()) {
@@ -80,20 +80,20 @@ inline bool TRTInferShape(const nnvm::NodeAttrs& attrs,
   }
   CHECK_EQ(g.outputs.size(), out_shapes->size());
   for (size_t i = 0; i < out_shapes->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid    = idx_g.entry_id(g.outputs[i]);
     shapes[eid] = out_shapes->at(i);
   }
 
   // Infer shape of the graph.
   g.attrs["shape"] = std::make_shared<dmlc::any>(std::move(shapes));
-  g = exec::InferShape(std::move(g));
+  g                = exec::InferShape(std::move(g));
   // Copy the inferred shape back to the input shapes and the output shapes.
   shapes = g.GetAttr<mxnet::ShapeVector>("shape");
   // assign to in_shapes
   for (size_t i = 0; i < input_nids.size(); ++i) {
     const auto node = idx_g[input_nids[i]].source;
-    const auto eid = idx_g.entry_id(input_nids[i], 0);
-    auto it = inputs_to_idx.find(node->attrs.name);
+    const auto eid  = idx_g.entry_id(input_nids[i], 0);
+    auto it         = inputs_to_idx.find(node->attrs.name);
     if (it != inputs_to_idx.end()) {
       SHAPE_ASSIGN_CHECK(*in_shapes, it->second, shapes[eid]);
     }
@@ -108,26 +108,26 @@ inline bool TRTInferShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool TRTInferType(const nnvm::NodeAttrs& attrs,
-                    std::vector<int> *in_types,
-                    std::vector<int> *out_types) {
+                         std::vector<int>* in_types,
+                         std::vector<int>* out_types) {
   const nnvm::Symbol subgraph_sym = *(attrs.subgraphs[0]);
-  const TRTParam& param = nnvm::get<TRTParam>(attrs.parsed);
-  auto params_map = param.params_map;
-  auto inputs_to_idx = param.inputs_to_idx;
+  const TRTParam& param           = nnvm::get<TRTParam>(attrs.parsed);
+  auto params_map                 = param.params_map;
+  auto inputs_to_idx              = param.inputs_to_idx;
 
   nnvm::Graph g;
-  g.outputs = subgraph_sym.outputs;
+  g.outputs         = subgraph_sym.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_types->size() + params_map.size());
   CHECK_EQ(idx_g.outputs().size(), out_types->size());
 
   // Put the input and output data types to the dtype vector.
   nnvm::DTypeVector types(idx_g.num_node_entries(), -1);
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_types->size() + params_map.size());
   for (size_t i = 0; i < input_nids.size(); i++) {
-    auto node = idx_g[input_nids[i]].source;
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto node      = idx_g[input_nids[i]].source;
+    auto eid       = idx_g.entry_id(input_nids[i], 0);
     auto it_params = params_map.find(node->attrs.name);
     auto it_inputs = inputs_to_idx.find(node->attrs.name);
     if (it_params != params_map.end()) {
@@ -135,26 +135,25 @@ inline bool TRTInferType(const nnvm::NodeAttrs& attrs,
     } else if (it_inputs != inputs_to_idx.end()) {
       types[eid] = in_types->at(it_inputs->second);
     } else {
-      LOG(FATAL) << node->attrs.name
-                 << " dtype information is missing for attributes inference";
+      LOG(FATAL) << node->attrs.name << " dtype information is missing for attributes inference";
     }
   }
   CHECK_EQ(g.outputs.size(), out_types->size());
   for (size_t i = 0; i < out_types->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid   = idx_g.entry_id(g.outputs[i]);
     types[eid] = out_types->at(i);
   }
 
   // Infer data type of the graph.
   g.attrs["dtype"] = std::make_shared<dmlc::any>(std::move(types));
-  g = exec::InferType(std::move(g));
+  g                = exec::InferType(std::move(g));
 
   types = g.GetAttr<nnvm::DTypeVector>("dtype");
   // assign to in_types
   for (size_t i = 0; i < input_nids.size(); ++i) {
     const auto node = idx_g[input_nids[i]].source;
-    const auto eid = idx_g.entry_id(input_nids[i], 0);
-    auto it = inputs_to_idx.find(node->attrs.name);
+    const auto eid  = idx_g.entry_id(input_nids[i], 0);
+    auto it         = inputs_to_idx.find(node->attrs.name);
     if (it != inputs_to_idx.end()) {
       TYPE_ASSIGN_CHECK(*in_types, it->second, types[eid]);
     }
@@ -170,16 +169,16 @@ inline bool TRTInferType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool TRTInferStorageType(const nnvm::NodeAttrs& attrs,
-                           const int dev_mask,
-                           DispatchMode* dispatch_mode,
-                           std::vector<int>* in_stypes,
-                           std::vector<int>* out_stypes) {
+                                const int dev_mask,
+                                DispatchMode* dispatch_mode,
+                                std::vector<int>* in_stypes,
+                                std::vector<int>* out_stypes) {
   const nnvm::Symbol subgraph_sym = *(attrs.subgraphs[0]);
-  const TRTParam& param = nnvm::get<TRTParam>(attrs.parsed);
-  auto params_map = param.params_map;
-  auto inputs_to_idx = param.inputs_to_idx;
+  const TRTParam& param           = nnvm::get<TRTParam>(attrs.parsed);
+  auto params_map                 = param.params_map;
+  auto inputs_to_idx              = param.inputs_to_idx;
   nnvm::Graph g;
-  g.outputs = subgraph_sym.outputs;
+  g.outputs         = subgraph_sym.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_stypes->size() + params_map.size());
   CHECK_EQ(idx_g.outputs().size(), out_stypes->size());
@@ -187,11 +186,11 @@ inline bool TRTInferStorageType(const nnvm::NodeAttrs& attrs,
 
   // Put the input and output storages to the storage vector.
   StorageTypeVector stypes(idx_g.num_node_entries(), kUndefinedStorage);
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_stypes->size() + params_map.size());
   for (size_t i = 0; i < input_nids.size(); i++) {
-    auto node = idx_g[input_nids[i]].source;
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto node      = idx_g[input_nids[i]].source;
+    auto eid       = idx_g.entry_id(input_nids[i], 0);
     auto it_params = params_map.find(node->attrs.name);
     auto it_inputs = inputs_to_idx.find(node->attrs.name);
     if (it_params != params_map.end()) {
@@ -205,25 +204,25 @@ inline bool TRTInferStorageType(const nnvm::NodeAttrs& attrs,
   }
   CHECK_EQ(g.outputs.size(), out_stypes->size());
   for (size_t i = 0; i < out_stypes->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid    = idx_g.entry_id(g.outputs[i]);
     stypes[eid] = out_stypes->at(i);
   }
 
   // Infer storage type of the graph.
-  bool dev_match = g.attrs.count("dev_mask") &&
-                   g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_masks;
+  bool dev_match =
+      g.attrs.count("dev_mask") && g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_masks;
   if (!dev_match) {
     g.attrs["dev_mask"] = std::make_shared<dmlc::any>(std::move(dev_masks));
   }
   g.attrs["storage_type"] = std::make_shared<dmlc::any>(std::move(stypes));
-  g = exec::InferStorageType(std::move(g));
+  g                       = exec::InferStorageType(std::move(g));
 
   stypes = g.GetAttr<StorageTypeVector>("storage_type");
   // assign to in_types
   for (size_t i = 0; i < input_nids.size(); ++i) {
     const auto node = idx_g[input_nids[i]].source;
-    const auto eid = idx_g.entry_id(input_nids[i], 0);
-    auto it = inputs_to_idx.find(node->attrs.name);
+    const auto eid  = idx_g.entry_id(input_nids[i], 0);
+    auto it         = inputs_to_idx.find(node->attrs.name);
     if (it != inputs_to_idx.end()) {
       STORAGE_TYPE_ASSIGN_CHECK(*in_stypes, it->second, stypes[eid]);
     }
@@ -240,16 +239,15 @@ inline bool TRTInferStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 void TRTParamParser(nnvm::NodeAttrs* attrs) {
-  TRTParam& _param = nnvm::get<TRTParam>(attrs->parsed);
+  TRTParam& _param   = nnvm::get<TRTParam>(attrs->parsed);
   std::string prefix = "subgraph_param_";
   std::string str_dtype, str_shape, str_pointer, _tmp;
   for (auto it = attrs->dict.begin(); it != attrs->dict.end();) {
     std::string attrs_name = it->first;
     if (std::equal(prefix.begin(), prefix.end(), attrs_name.begin())) {
-      std::string param_name = attrs_name.substr(prefix.size(),
-                                                 attrs_name.size() - prefix.size());
+      std::string param_name = attrs_name.substr(prefix.size(), attrs_name.size() - prefix.size());
       // TODO(cfujitsang): find a less dirty way to give weights
-      NDArray *cache = reinterpret_cast<NDArray*>(stol(it->second));
+      NDArray* cache = reinterpret_cast<NDArray*>(stol(it->second));
       _param.params_map.emplace(param_name, cache->Copy(Context()));
       _param.params_map[param_name].WaitToRead();
       it = attrs->dict.erase(it);
@@ -260,12 +258,13 @@ void TRTParamParser(nnvm::NodeAttrs* attrs) {
   attrs->parsed = std::move(_param);
 }
 
-OpStatePtr TRTCreateState(const nnvm::NodeAttrs& attrs, Context ctx,
+OpStatePtr TRTCreateState(const nnvm::NodeAttrs& attrs,
+                          Context ctx,
                           const std::vector<TShape>& in_shape,
                           const std::vector<int>& in_type) {
   const auto& node_param = nnvm::get<TRTParam>(attrs.parsed);
   nnvm::Graph graph;
-  graph.outputs = attrs.subgraphs[0]->outputs;
+  graph.outputs           = attrs.subgraphs[0]->outputs;
   uint32_t max_batch_size = dmlc::GetEnv("MXNET_TENSORRT_MAX_BATCH_SIZE", in_shape[0][0]);
   if (max_batch_size < in_shape[0][0]) {
     LOG(INFO) << "Warning: max batch size changed to be is: " << in_shape[0][0]
@@ -273,14 +272,14 @@ OpStatePtr TRTCreateState(const nnvm::NodeAttrs& attrs, Context ctx,
     max_batch_size = in_shape[0][0];
   }
   std::unordered_map<std::string, NDArray> params_map = node_param.params_map;
-  const auto& inputs_to_idx = node_param.inputs_to_idx;
-  const auto& outputs_to_idx = node_param.outputs_to_idx;
-  const auto& idx_g = graph.indexed_graph();
-  const auto& input_nids = idx_g.input_nodes();
+  const auto& inputs_to_idx                           = node_param.inputs_to_idx;
+  const auto& outputs_to_idx                          = node_param.outputs_to_idx;
+  const auto& idx_g                                   = graph.indexed_graph();
+  const auto& input_nids                              = idx_g.input_nodes();
   mxnet::ShapeVector shape_inputs(input_nids.size());
   nnvm::DTypeVector dtype_inputs(input_nids.size());
   for (int i = 0; i < input_nids.size(); ++i) {
-    auto node = idx_g[input_nids[i]].source;
+    auto node      = idx_g[input_nids[i]].source;
     auto it_params = params_map.find(node->attrs.name);
     auto it_inputs = inputs_to_idx.find(node->attrs.name);
     if (it_params != params_map.end()) {
@@ -302,7 +301,7 @@ OpStatePtr TRTCreateState(const nnvm::NodeAttrs& attrs, Context ctx,
   nnvm::DTypeVector dtypes(idx_g.num_node_entries());
   mxnet::ShapeVector shapes(idx_g.num_node_entries());
   for (int i = 0; i < graph.outputs.size(); ++i) {
-    auto eid = idx_g.entry_id(graph.outputs[i]);
+    auto eid    = idx_g.entry_id(graph.outputs[i]);
     dtypes[eid] = out_type[i];
     shapes[eid] = out_shape[i];
   }
@@ -310,12 +309,13 @@ OpStatePtr TRTCreateState(const nnvm::NodeAttrs& attrs, Context ctx,
   graph.attrs["shape_inputs"] = std::make_shared<nnvm::any>(std::move(shape_inputs));
   graph.attrs["dtype"]        = std::make_shared<nnvm::any>(std::move(dtypes));
   graph.attrs["shape"]        = std::make_shared<nnvm::any>(std::move(shapes));
-  auto onnx_graph = op::nnvm_to_onnx::ConvertNnvmGraphToOnnx(graph, &params_map);
+  auto onnx_graph             = op::nnvm_to_onnx::ConvertNnvmGraphToOnnx(graph, &params_map);
   auto trt_tuple = ::onnx_to_tensorrt::onnxToTrtCtx(onnx_graph, max_batch_size, 1 << 30);
   return OpStatePtr::Create<TRTEngineParam>(std::move(std::get<0>(trt_tuple)),
                                             std::move(std::get<1>(trt_tuple)),
                                             std::move(std::get<2>(trt_tuple)),
-                                            inputs_to_idx, outputs_to_idx);
+                                            inputs_to_idx,
+                                            outputs_to_idx);
 }
 
 NNVM_REGISTER_OP(_TensorRT)
diff --git a/src/operator/subgraph/tensorrt/tensorrt.cu b/src/operator/subgraph/tensorrt/tensorrt.cu
index 826f9a5876b6..8b6b37b94eaa 100644
--- a/src/operator/subgraph/tensorrt/tensorrt.cu
+++ b/src/operator/subgraph/tensorrt/tensorrt.cu
@@ -22,7 +22,7 @@
  * \file tensorrt.cu
  * \brief TensorRT GPU operation registration
  * \author Marek Kolodziej, Clement Fuji Tsang
-*/
+ */
 
 #if MXNET_USE_TENSORRT
 
@@ -31,23 +31,30 @@
 namespace mxnet {
 namespace op {
 
-#define CHECK_CUDART(x) do { \
-  cudaError_t res = (x); \
-  if (res != cudaSuccess) { \
-    fprintf(stderr, "CUDART: %s = %d (%s) at (%s:%d)\n", \
-      #x, res, cudaGetErrorString(res), __FILE__, __LINE__); \
-    exit(1); \
-  } \
-} while (0)
+#define CHECK_CUDART(x)                            \
+  do {                                             \
+    cudaError_t res = (x);                         \
+    if (res != cudaSuccess) {                      \
+      fprintf(stderr,                              \
+              "CUDART: %s = %d (%s) at (%s:%d)\n", \
+              #x,                                  \
+              res,                                 \
+              cudaGetErrorString(res),             \
+              __FILE__,                            \
+              __LINE__);                           \
+      exit(1);                                     \
+    }                                              \
+  } while (0)
 
-void TRTCompute(const OpStatePtr& state, const OpContext& ctx,
+void TRTCompute(const OpStatePtr& state,
+                const OpContext& ctx,
                 const std::vector<TBlob>& inputs,
                 const std::vector<OpReqType>& req,
                 const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   cudaStream_t cuda_s = Stream<gpu>::GetStream(ctx.get_stream<gpu>());
-  const auto& param = state.get_state<TRTEngineParam>();
+  const auto& param   = state.get_state<TRTEngineParam>();
   for (size_t i = 0; i < param.binding_order->size(); ++i) {
     auto& p = param.binding_order->at(i);
     if (p.second == true) {
@@ -60,8 +67,8 @@ void TRTCompute(const OpStatePtr& state, const OpContext& ctx,
 }
 
 NNVM_REGISTER_OP(_TensorRT)
-.set_attr<FStatefulCompute>("FStatefulCompute<gpu>", TRTCompute)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FStatefulCompute>("FStatefulCompute<gpu>", TRTCompute)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/subgraph_op_common.cc b/src/operator/subgraph_op_common.cc
index dea02fb72c63..ad12d3ded5d2 100644
--- a/src/operator/subgraph_op_common.cc
+++ b/src/operator/subgraph_op_common.cc
@@ -24,32 +24,32 @@
 namespace mxnet {
 namespace op {
 
-bool InferSubgraphDataType(const nnvm::Symbol &subgraph,
-                           std::vector<int> *in_types,
-                           std::vector<int> *out_types) {
+bool InferSubgraphDataType(const nnvm::Symbol& subgraph,
+                           std::vector<int>* in_types,
+                           std::vector<int>* out_types) {
   nnvm::Graph g;
-  g.outputs = subgraph.outputs;
+  g.outputs         = subgraph.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_types->size());
   CHECK_EQ(idx_g.outputs().size(), out_types->size());
 
   // Put the input and output data types to the dtype vector.
   nnvm::DTypeVector types(idx_g.num_node_entries(), -1);
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_types->size());
   for (size_t i = 0; i < in_types->size(); i++) {
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto eid   = idx_g.entry_id(input_nids[i], 0);
     types[eid] = in_types->at(i);
   }
   CHECK_EQ(g.outputs.size(), out_types->size());
   for (size_t i = 0; i < out_types->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid   = idx_g.entry_id(g.outputs[i]);
     types[eid] = out_types->at(i);
   }
 
   // Infer data type of the graph.
   g.attrs["dtype"] = std::make_shared<dmlc::any>(std::move(types));
-  g = exec::InferType(std::move(g));
+  g                = exec::InferType(std::move(g));
 
   const auto& types1 = g.GetAttr<nnvm::DTypeVector>("dtype");
   // assign to in_types
@@ -66,13 +66,13 @@ bool InferSubgraphDataType(const nnvm::Symbol &subgraph,
   return g.GetAttr<size_t>("dtype_num_unknown_nodes") == 0;
 }
 
-bool InferSubgraphStorage(const nnvm::Symbol &subgraph,
+bool InferSubgraphStorage(const nnvm::Symbol& subgraph,
                           const int dev_mask,
                           DispatchMode* dispatch_mode,
-                          std::vector<int> *in_stypes,
-                          std::vector<int> *out_stypes) {
+                          std::vector<int>* in_stypes,
+                          std::vector<int>* out_stypes) {
   nnvm::Graph g;
-  g.outputs = subgraph.outputs;
+  g.outputs         = subgraph.outputs;
   const auto& idx_g = g.indexed_graph();
   CHECK_EQ(idx_g.input_nodes().size(), in_stypes->size());
   CHECK_EQ(idx_g.outputs().size(), out_stypes->size());
@@ -80,26 +80,26 @@ bool InferSubgraphStorage(const nnvm::Symbol &subgraph,
 
   // Put the input and output storages to the storage vector.
   nnvm::StorageVector stypes(idx_g.num_node_entries(), exec::kBadStorageID);
-  const auto &input_nids = idx_g.input_nodes();
+  const auto& input_nids = idx_g.input_nodes();
   CHECK_EQ(input_nids.size(), in_stypes->size());
   for (size_t i = 0; i < in_stypes->size(); i++) {
-    auto eid = idx_g.entry_id(input_nids[i], 0);
+    auto eid    = idx_g.entry_id(input_nids[i], 0);
     stypes[eid] = in_stypes->at(i);
   }
   CHECK_EQ(g.outputs.size(), out_stypes->size());
   for (size_t i = 0; i < out_stypes->size(); i++) {
-    auto eid = idx_g.entry_id(g.outputs[i]);
+    auto eid    = idx_g.entry_id(g.outputs[i]);
     stypes[eid] = out_stypes->at(i);
   }
 
   // Infer storage type of the graph.
-  bool dev_match = g.attrs.count("dev_mask") &&
-                   g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_masks;
+  bool dev_match =
+      g.attrs.count("dev_mask") && g.GetAttr<exec::DevMaskVector>("dev_mask") == dev_masks;
   if (!dev_match) {
     g.attrs["dev_mask"] = std::make_shared<dmlc::any>(std::move(dev_masks));
   }
   g.attrs["storage_type"] = std::make_shared<dmlc::any>(std::move(stypes));
-  g = exec::InferStorageType(std::move(g));
+  g                       = exec::InferStorageType(std::move(g));
 
   const auto& stypes1 = g.GetAttr<StorageTypeVector>("storage_type");
   // assign to in_types
@@ -118,32 +118,32 @@ bool InferSubgraphStorage(const nnvm::Symbol &subgraph,
   return g.GetAttr<size_t>("storage_type_num_unknown_nodes") == 0;
 }
 
-bool InferSubgraphShape(const nnvm::Symbol &subgraph,
-                        mxnet::ShapeVector *in_shape,
-                        mxnet::ShapeVector *out_shape) {
+bool InferSubgraphShape(const nnvm::Symbol& subgraph,
+                        mxnet::ShapeVector* in_shape,
+                        mxnet::ShapeVector* out_shape) {
   nnvm::Graph g;
-  g.outputs = subgraph.outputs;
+  g.outputs       = subgraph.outputs;
   const auto& idx = g.indexed_graph();
   CHECK_EQ(idx.input_nodes().size(), in_shape->size());
   CHECK_EQ(idx.outputs().size(), out_shape->size());
 
   // Put the input and output shapes to the shape vector.
   mxnet::ShapeVector shapes(idx.num_node_entries());
-  const auto &input_nids = idx.input_nodes();
+  const auto& input_nids = idx.input_nodes();
   CHECK_EQ(input_nids.size(), in_shape->size());
   for (size_t i = 0; i < in_shape->size(); i++) {
-    auto eid = idx.entry_id(input_nids[i], 0);
+    auto eid    = idx.entry_id(input_nids[i], 0);
     shapes[eid] = in_shape->at(i);
   }
   CHECK_EQ(g.outputs.size(), out_shape->size());
   for (size_t i = 0; i < out_shape->size(); i++) {
-    auto eid = idx.entry_id(g.outputs[i]);
+    auto eid    = idx.entry_id(g.outputs[i]);
     shapes[eid] = out_shape->at(i);
   }
 
   // Infer shape of the graph.
   g.attrs["shape"] = std::make_shared<dmlc::any>(std::move(shapes));
-  g = exec::InferShape(std::move(g));
+  g                = exec::InferShape(std::move(g));
 
   const auto& shapes1 = g.GetAttr<mxnet::ShapeVector>("shape");
   // Inferring the shape in the subgraph may infer the shape of the inputs.
@@ -162,43 +162,41 @@ bool InferSubgraphShape(const nnvm::Symbol &subgraph,
 }
 
 template <typename T>
-T _asscalar(const NDArray &a) {
+T _asscalar(const NDArray& a) {
   CHECK_EQ(a.shape().Size(), 1U);
   T data;
   a.SyncCopyToCPU(&data, 1U);
   return data;
 }
 
-bool as_bool_scalar(const NDArray &a) {
-  MSHADOW_TYPE_SWITCH(a.dtype(), DType, {
-    return static_cast<bool>(_asscalar<DType>(a));
-  });
+bool as_bool_scalar(const NDArray& a) {
+  MSHADOW_TYPE_SWITCH(a.dtype(), DType, { return static_cast<bool>(_asscalar<DType>(a)); });
   LOG(FATAL) << "Unknown dtype";
   return false;
 }
 
-bool is_shape_udf(const mxnet::TShape &x) {
+bool is_shape_udf(const mxnet::TShape& x) {
   return !shape_is_known(x);
 }
 
-bool is_stype_udf(const int &x) {
+bool is_stype_udf(const int& x) {
   return x == exec::kBadStorageID;
 }
 
-bool is_type_udf(const int &x) {
+bool is_type_udf(const int& x) {
   return x == -1;
 }
 
-LoopState::LoopState(const nnvm::Symbol &g, bool is_dynamic) {
-  this->subgraph_sym = g;
+LoopState::LoopState(const nnvm::Symbol& g, bool is_dynamic) {
+  this->subgraph_sym     = g;
   this->subgraph.outputs = g.outputs;
-  this->iter_op = LoopState::MakeSharedOp(g, is_dynamic);
+  this->iter_op          = LoopState::MakeSharedOp(g, is_dynamic);
 }
 
 void LoopState::Forward(int iter_no,
-                        const std::vector<NDArray> &cinputs,
+                        const std::vector<NDArray>& cinputs,
                         const std::vector<OpReqType>& req,
-                        const std::vector<NDArray> &coutputs,
+                        const std::vector<NDArray>& coutputs,
                         bool is_recording) {
   using namespace nnvm;
   using namespace imperative;
@@ -209,17 +207,17 @@ void LoopState::Forward(int iter_no,
   else
     orig_is_record = Imperative::Get()->is_recording();
 
-  std::vector<NDArray> in_bufs = cinputs;
+  std::vector<NDArray> in_bufs  = cinputs;
   std::vector<NDArray> out_bufs = coutputs;
-  std::vector<NDArray *> inputs(cinputs.size());
-  std::vector<NDArray *> outputs(coutputs.size());
+  std::vector<NDArray*> inputs(cinputs.size());
+  std::vector<NDArray*> outputs(coutputs.size());
   for (size_t i = 0; i < inputs.size(); i++)
     inputs[i] = &in_bufs[i];
   for (size_t i = 0; i < outputs.size(); i++)
     outputs[i] = &out_bufs[i];
   CHECK(inputs.size() > 0) << "loop forward requires at least 1 input";
   Context default_ctx = cinputs[0].ctx();
-  OpStatePtr state = iter_op->Forward(nullptr, inputs, outputs, default_ctx);
+  OpStatePtr state    = iter_op->Forward(nullptr, inputs, outputs, default_ctx);
   // If an input and an output share the array, the output array will be changed
   // by CachedOp. We need to copy data to the real output.
   for (size_t i = 0; i < out_bufs.size(); i++)
@@ -227,7 +225,7 @@ void LoopState::Forward(int iter_no,
       // The line below checks whether dynamic shape exists.
       // If so, re-initialize the shape.
       if (!shape_is_known(coutputs[i].shape())) {
-        const_cast<NDArray &>(coutputs[i]).Init(out_bufs[i].shape());
+        const_cast<NDArray&>(coutputs[i]).Init(out_bufs[i].shape());
       }
       CopyFromTo(out_bufs[i], coutputs[i]);
     }
@@ -241,17 +239,17 @@ void LoopState::Forward(int iter_no,
 }
 
 void LoopState::Backward(int iter_no,
-                         const std::vector<NDArray> &ograds,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<NDArray> &igrads) {
+                         const std::vector<NDArray>& ograds,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<NDArray>& igrads) {
   using namespace nnvm;
   using namespace imperative;
 
   CHECK_GT(all_states.size(), iter_no)
       << "We didn't record the computation for iteration " << iter_no;
   auto op = iter_op;
-  std::vector<NDArray *> inputs;
-  std::vector<NDArray *> outputs;
+  std::vector<NDArray*> inputs;
+  std::vector<NDArray*> outputs;
   inputs.reserve(op->num_backward_inputs());
   outputs.reserve(op->num_inputs());
   std::vector<NDArray> ograd_bufs = ograds;
@@ -259,8 +257,8 @@ void LoopState::Backward(int iter_no,
   for (size_t i = 0; i < ograds.size(); i++)
     inputs.push_back(&ograd_bufs[i]);
 
-  const std::vector<bool> &save_inputs = op->save_inputs();
-  const std::vector<bool> &save_outputs = op->save_outputs();
+  const std::vector<bool>& save_inputs  = op->save_inputs();
+  const std::vector<bool>& save_outputs = op->save_outputs();
   CHECK_EQ(save_inputs.size(), all_inputs[iter_no].size());
   CHECK_EQ(op->num_outputs(), all_outputs[iter_no].size());
   for (size_t i = 0; i < all_inputs[iter_no].size(); i++) {
diff --git a/src/operator/subgraph_op_common.h b/src/operator/subgraph_op_common.h
index 78328d80d891..b7edc70c5bd8 100644
--- a/src/operator/subgraph_op_common.h
+++ b/src/operator/subgraph_op_common.h
@@ -36,39 +36,40 @@ namespace op {
  * Infer the data types of inputs and outputs of an operator that contains a
  * subgraph.
  */
-bool InferSubgraphDataType(const nnvm::Symbol &subgraph, std::vector<int> *in_type,
-                           std::vector<int> *out_type);
+bool InferSubgraphDataType(const nnvm::Symbol& subgraph,
+                           std::vector<int>* in_type,
+                           std::vector<int>* out_type);
 
 /*
  * Infer the shape of inputs and outputs of an operator that contains a
  * subgraph.
  */
-bool InferSubgraphShape(const nnvm::Symbol &subgraph,
-                        mxnet::ShapeVector *in_shape,
-                        mxnet::ShapeVector *out_shape);
+bool InferSubgraphShape(const nnvm::Symbol& subgraph,
+                        mxnet::ShapeVector* in_shape,
+                        mxnet::ShapeVector* out_shape);
 
 /*
  * Infer the storage types of inputs and outputs of an operator that contains a
  * subgraph.
  */
-bool InferSubgraphStorage(const nnvm::Symbol &subgraph,
+bool InferSubgraphStorage(const nnvm::Symbol& subgraph,
                           const int dev_mask,
                           DispatchMode* dispatch_mode,
-                          std::vector<int> *in_attrs,
-                          std::vector<int> *out_attrs);
+                          std::vector<int>* in_attrs,
+                          std::vector<int>* out_attrs);
 
-bool as_bool_scalar(const NDArray &a);
+bool as_bool_scalar(const NDArray& a);
 
-bool is_shape_udf(const mxnet::TShape &x);
+bool is_shape_udf(const mxnet::TShape& x);
 
-bool is_stype_udf(const int &x);
+bool is_stype_udf(const int& x);
 
-bool is_type_udf(const int &x);
+bool is_type_udf(const int& x);
 
 template <typename T>
-void extract_by_loc(const std::vector<T> &array,
+void extract_by_loc(const std::vector<T>& array,
                     const mxnet::Tuple<dim_t> input_locs,
-                    std::vector<T> *out) {
+                    std::vector<T>* out) {
   out->clear();
   out->reserve(input_locs.ndim());
   for (dim_t i : input_locs) {
@@ -77,7 +78,7 @@ void extract_by_loc(const std::vector<T> &array,
 }
 
 template <typename T>
-bool fill_value(T *x, T *y, bool x_empty, bool y_empty) {
+bool fill_value(T* x, T* y, bool x_empty, bool y_empty) {
   if (*x == *y || (x_empty && y_empty)) {
     return true;
   }
@@ -94,26 +95,26 @@ bool fill_value(T *x, T *y, bool x_empty, bool y_empty) {
 }
 
 template <typename T>
-bool sync_in_in(const mxnet::Tuple<dim_t> &input_locs,
-                std::vector<T> *in,
-                std::vector<T> *subg_in,
-                std::function<bool(const T &)> is_empty) {
+bool sync_in_in(const mxnet::Tuple<dim_t>& input_locs,
+                std::vector<T>* in,
+                std::vector<T>* subg_in,
+                std::function<bool(const T&)> is_empty) {
   for (int i = 0; i < input_locs.ndim(); ++i) {
-    T &x = in->at(input_locs[i]);
-    T &y = subg_in->at(i);
+    T& x = in->at(input_locs[i]);
+    T& y = subg_in->at(i);
     fill_value(&x, &y, is_empty(x), is_empty(y));
   }
   return true;
 }
 
 template <typename T>
-bool sync_out_out(std::vector<T> *out_1,
-                  std::vector<T> *out_2,
-                  std::function<bool(const T &)> is_empty) {
+bool sync_out_out(std::vector<T>* out_1,
+                  std::vector<T>* out_2,
+                  std::function<bool(const T&)> is_empty) {
   CHECK_EQ(out_1->size(), out_2->size());
   for (size_t i = 0; i < out_1->size(); ++i) {
-    T &x = out_1->at(i);
-    T &y = out_2->at(i);
+    T& x = out_1->at(i);
+    T& y = out_2->at(i);
     fill_value(&x, &y, is_empty(x), is_empty(y));
   }
   return true;
@@ -139,30 +140,28 @@ class LoopState {
   nnvm::Graph subgraph;
 
  public:
-  explicit LoopState(const nnvm::Symbol &g, bool is_dynamic = true);
+  explicit LoopState(const nnvm::Symbol& g, bool is_dynamic = true);
 
   void Forward(int iter_no,
-               const std::vector<NDArray> &inputs,
+               const std::vector<NDArray>& inputs,
                const std::vector<OpReqType>& req,
-               const std::vector<NDArray> &outputs,
+               const std::vector<NDArray>& outputs,
                bool is_recording);
   void Backward(int iter_no,
-                const std::vector<NDArray> &ograds,
-                const std::vector<OpReqType> &req,
-                const std::vector<NDArray> &igrads);
+                const std::vector<NDArray>& ograds,
+                const std::vector<OpReqType>& req,
+                const std::vector<NDArray>& igrads);
   void Cleanup() {
     all_outputs.clear();
     all_inputs.clear();
     all_states.clear();
   }
-  static CachedOpPtr MakeSharedOp(const nnvm::Symbol &sym, bool is_dynamic = true) {
+  static CachedOpPtr MakeSharedOp(const nnvm::Symbol& sym, bool is_dynamic = true) {
     // We turn on static_alloc for two reasons.
     // It avoids the overhead of unnecessary memory allocation.
     // only static_alloc supports nested call of CachedOp.
-    std::vector<std::pair<std::string, std::string> > kwargs = {
-      {"inline_limit", "0"},
-      {"static_alloc", "1"}
-    };
+    std::vector<std::pair<std::string, std::string> > kwargs = {{"inline_limit", "0"},
+                                                                {"static_alloc", "1"}};
     if (is_dynamic) {
       kwargs.push_back({"is_dynamic", "1"});
     } else {
diff --git a/src/operator/svm_output-inl.h b/src/operator/svm_output-inl.h
index 71fb91175f37..3a6d801db17d 100644
--- a/src/operator/svm_output-inl.h
+++ b/src/operator/svm_output-inl.h
@@ -22,7 +22,7 @@
  * \file svm_output-inl.h
  * \brief
  * \author Jonas Amaro
-*/
+ */
 #ifndef MXNET_OPERATOR_SVM_OUTPUT_INL_H_
 #define MXNET_OPERATOR_SVM_OUTPUT_INL_H_
 
@@ -41,69 +41,71 @@ namespace mxnet {
 namespace op {
 
 namespace svm_enum {
-enum SVMOutputOpInputs {kData, kLabel};
-enum SVMOutputOpOutputs {kOut};
-enum SVMOutputNormType {kNull, kBatch, kValid};
-enum SVMOutputOpResource {kTempSpace};
+enum SVMOutputOpInputs { kData, kLabel };
+enum SVMOutputOpOutputs { kOut };
+enum SVMOutputNormType { kNull, kBatch, kValid };
+enum SVMOutputOpResource { kTempSpace };
 }  // namespace svm_enum
 
-
 struct SVMOutputParam : public dmlc::Parameter<SVMOutputParam> {
   float margin;
   float regularization_coefficient;
   bool use_linear;
   DMLC_DECLARE_PARAMETER(SVMOutputParam) {
-    DMLC_DECLARE_FIELD(margin).set_default(1.0f)
-    .describe("The loss function penalizes outputs that lie outside this margin. "
+    DMLC_DECLARE_FIELD(margin).set_default(1.0f).describe(
+        "The loss function penalizes outputs that lie outside this margin. "
         "Default margin is 1.");
-    DMLC_DECLARE_FIELD(regularization_coefficient).set_default(1.0f)
-    .describe("Regularization parameter for the SVM. "
-        "This balances the tradeoff between coefficient size and error.");
-    DMLC_DECLARE_FIELD(use_linear).set_default(false)
-    .describe("Whether to use L1-SVM objective. L2-SVM objective is used by default.");
+    DMLC_DECLARE_FIELD(regularization_coefficient)
+        .set_default(1.0f)
+        .describe(
+            "Regularization parameter for the SVM. "
+            "This balances the tradeoff between coefficient size and error.");
+    DMLC_DECLARE_FIELD(use_linear)
+        .set_default(false)
+        .describe("Whether to use L1-SVM objective. L2-SVM objective is used by default.");
   };
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class SVMOutputOp : public Operator {
  public:
   explicit SVMOutputOp(SVMOutputParam param) : param_(param) {}
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U) << "Expecting [data, label]";
     CHECK_EQ(out_data.size(), 1U) << "Expecting [output]";
     CHECK_EQ(req.size(), 1U) << "Expecting output.size() == req.size()";
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
     Tensor<xpu, 2, DType> data = in_data[svm_enum::kData].FlatTo2D<xpu, DType>(s);
-    Tensor<xpu, 2, DType> out = out_data[svm_enum::kOut].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out  = out_data[svm_enum::kOut].FlatTo2D<xpu, DType>(s);
     Assign(out, req[svm_enum::kOut], F<mshadow_op::identity>(data));
   }
 
-  virtual void Backward(const OpContext &ctx,
-                        const std::vector<TBlob> &out_grad,
-                        const std::vector<TBlob> &in_data,
-                        const std::vector<TBlob> &out_data,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &in_grad,
-                        const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(in_data.size(), 2U);
     CHECK_EQ(out_grad.size(), 1U);
     CHECK_GE(in_grad.size(), 1U);
     CHECK_GE(req.size(), 1U);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s                   = ctx.get_stream<xpu>();
     const mxnet::TShape& label_shape = in_data[svm_enum::kLabel].shape_;
 
     Tensor<xpu, 1, DType> label = in_data[svm_enum::kLabel].get_with_shape<xpu, 1, DType>(
         Shape1(label_shape.ProdShape(0, label_shape.ndim())), s);
-    Tensor<xpu, 2, DType> out = out_data[svm_enum::kOut].FlatTo2D<xpu, DType>(s);
+    Tensor<xpu, 2, DType> out  = out_data[svm_enum::kOut].FlatTo2D<xpu, DType>(s);
     Tensor<xpu, 2, DType> grad = in_grad[svm_enum::kData].FlatTo2D<xpu, DType>(s);
     CHECK_EQ(grad.shape_, out.shape_) << "SVMOutputs: shape mismatch";
 
@@ -119,7 +121,7 @@ class SVMOutputOp : public Operator {
 };  // class SVMOutputOp
 
 // Declare Factory function, used for dispatch specialization
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(SVMOutputParam param, int dtype);
 
 #if DMLC_USE_CXX11
@@ -137,13 +139,14 @@ class SVMOutputProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     using namespace mshadow;
     CHECK_EQ(in_shape->size(), 2U) << "Input:[data, label]";
-    const mxnet::TShape &dshape = in_shape->at(0);
-    if (!mxnet::ndim_is_known(dshape)) return false;
+    const mxnet::TShape& dshape = in_shape->at(0);
+    if (!mxnet::ndim_is_known(dshape))
+      return false;
     mxnet::TShape label_shape(dshape.ndim() - 1, -1);
     for (int i = 0; i + 1 < dshape.ndim(); ++i)
       label_shape[i] = dshape[i];
@@ -153,9 +156,9 @@ class SVMOutputProp : public OperatorProperty {
     return true;
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_GE(in_type->size(), 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "First input must have specified type";
@@ -172,7 +175,7 @@ class SVMOutputProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SVMOutputProp();
+    auto ptr    = new SVMOutputProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -181,29 +184,27 @@ class SVMOutputProp : public OperatorProperty {
     return "SVMOutput";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {in_data[svm_enum::kLabel], out_data[svm_enum::kOut]};
   }
 
   std::vector<std::pair<int, void*> > BackwardInplaceOption(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data,
-    const std::vector<void*> &in_grad) const override {
+      const std::vector<int>& out_grad,
+      const std::vector<int>& in_data,
+      const std::vector<int>& out_data,
+      const std::vector<void*>& in_grad) const override {
     return {{out_data[svm_enum::kOut], in_grad[svm_enum::kData]}};
   }
 
   std::vector<std::pair<int, void*> > ForwardInplaceOption(
-    const std::vector<int> &in_data,
-    const std::vector<void*> &out_data) const override {
+      const std::vector<int>& in_data,
+      const std::vector<void*>& out_data) const override {
     return {{in_data[svm_enum::kData], out_data[svm_enum::kOut]}};
   }
 
-  std::vector<ResourceRequest> BackwardResource(
-      const mxnet::ShapeVector &in_shape) const override {
+  std::vector<ResourceRequest> BackwardResource(const mxnet::ShapeVector& in_shape) const override {
     return {ResourceRequest::kTempSpace};
   }
 
@@ -212,12 +213,13 @@ class SVMOutputProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  protected:
   SVMOutputParam param_;
-};  // class SVMOutputProp
+};      // class SVMOutputProp
 #endif  // DMLC_USE_CXX11
 
 }  // namespace op
diff --git a/src/operator/svm_output.cc b/src/operator/svm_output.cc
index 06e1ba2e8aa2..fe8fa1a9cb77 100644
--- a/src/operator/svm_output.cc
+++ b/src/operator/svm_output.cc
@@ -22,80 +22,78 @@
  * \file svm_output.cc
  * \brief
  * \author Jonas Amaro
-*/
+ */
 #include "./svm_output-inl.h"
 #include "./mshadow_op.h"
 
 namespace mshadow {
-  template<typename DType>
-  inline void L1_SVM(const DType & margin,
-                     const DType & reg_coef,
-                     Tensor<cpu, 2, DType> dst,
-                     const Tensor<cpu, 1, DType> & label,
-                     const Tensor<cpu, 2, DType> & src) {
-    for (index_t y = 0; y < dst.size(0); y++) {
-      const index_t k = static_cast<int>(label[y]);
-      for (index_t x = 0; x < dst.size(1); x++) {
-        if (x == k) {
-          dst[y][k] = -DType(margin > src[y][k]) * reg_coef;
-        } else {
-          dst[y][x] = DType(margin > -src[y][x]) * reg_coef;
-        }
+template <typename DType>
+inline void L1_SVM(const DType& margin,
+                   const DType& reg_coef,
+                   Tensor<cpu, 2, DType> dst,
+                   const Tensor<cpu, 1, DType>& label,
+                   const Tensor<cpu, 2, DType>& src) {
+  for (index_t y = 0; y < dst.size(0); y++) {
+    const index_t k = static_cast<int>(label[y]);
+    for (index_t x = 0; x < dst.size(1); x++) {
+      if (x == k) {
+        dst[y][k] = -DType(margin > src[y][k]) * reg_coef;
+      } else {
+        dst[y][x] = DType(margin > -src[y][x]) * reg_coef;
       }
     }
   }
+}
 
-
-  template<typename DType>
-  inline void L2_SVM(const DType & margin,
-                     const DType & reg_coef,
-                     Tensor<cpu, 2, DType> dst,
-                     const Tensor<cpu, 1, DType> & label,
-                     const Tensor<cpu, 2, DType> & src) {
-    for (index_t y = 0; y < dst.size(0); y++) {
-      const index_t k = static_cast<int>(label[y]);
-      for (index_t x = 0; x < dst.size(1); x++) {
-        if (x == k) {
-          dst[y][k] = margin > src[y][k] ?  2*(margin - src[y][k]) : DType(0.0f);
-          dst[y][k] *= -reg_coef;
-        } else {
-          dst[y][x] = margin > -src[y][x] ? (-2)*(margin + src[y][x]) : DType(0.0f);
-          dst[y][x] *= -reg_coef;
-        }
+template <typename DType>
+inline void L2_SVM(const DType& margin,
+                   const DType& reg_coef,
+                   Tensor<cpu, 2, DType> dst,
+                   const Tensor<cpu, 1, DType>& label,
+                   const Tensor<cpu, 2, DType>& src) {
+  for (index_t y = 0; y < dst.size(0); y++) {
+    const index_t k = static_cast<int>(label[y]);
+    for (index_t x = 0; x < dst.size(1); x++) {
+      if (x == k) {
+        dst[y][k] = margin > src[y][k] ? 2 * (margin - src[y][k]) : DType(0.0f);
+        dst[y][k] *= -reg_coef;
+      } else {
+        dst[y][x] = margin > -src[y][x] ? (-2) * (margin + src[y][x]) : DType(0.0f);
+        dst[y][x] *= -reg_coef;
       }
     }
   }
+}
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<cpu>(SVMOutputParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new SVMOutputOp<cpu, DType>(param);
-  })
+template <>
+Operator* CreateOp<cpu>(SVMOutputParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new SVMOutputOp<cpu, DType>(param); })
   return op;
 }
 
 // DO_BIND_DISPATCH comes from operator_common.h
-Operator *SVMOutputProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                     std::vector<int> *in_type) const {
+Operator* SVMOutputProp::CreateOperatorEx(Context ctx,
+                                          mxnet::ShapeVector* in_shape,
+                                          std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, (*in_type)[0]);
 }
 
 DMLC_REGISTER_PARAMETER(SVMOutputParam);
 
 MXNET_REGISTER_OP_PROPERTY(SVMOutput, SVMOutputProp)
-.describe(R"code(Computes support vector machine based transformation of the input.
+    .describe(R"code(Computes support vector machine based transformation of the input.
 
 This tutorial demonstrates using SVM as output layer for classification instead of softmax:
 https://github.com/dmlc/mxnet/tree/v1.x/example/svm_mnist.
 
 )code")
-.add_argument("data", "NDArray-or-Symbol", "Input data for SVM transformation.")
-.add_argument("label", "NDArray-or-Symbol", "Class label for the input data.")
-.add_arguments(SVMOutputParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Input data for SVM transformation.")
+    .add_argument("label", "NDArray-or-Symbol", "Class label for the input data.")
+    .add_arguments(SVMOutputParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/svm_output.cu b/src/operator/svm_output.cu
index 081433df377a..f438f6c7afb6 100644
--- a/src/operator/svm_output.cu
+++ b/src/operator/svm_output.cu
@@ -22,26 +22,25 @@
  * \file svm_output.cu
  * \brief
  * \author Jonas Amaro
-*/
+ */
 
 #include "./svm_output-inl.h"
 #include <device_launch_parameters.h>
 #include "mshadow/tensor.h"
 
-
 namespace mshadow {
 
-template<int n_bits, typename DType>
-__global__  void L1_SVMKernel(const DType margin,
-                              const DType reg_coef,
-                              Tensor<gpu, 2, DType> dst,
-                              const Tensor<gpu, 1, DType> label,
-                              const Tensor<gpu, 2, DType> src) {
-  const index_t nmax = dst.size(1);
+template <int n_bits, typename DType>
+__global__ void L1_SVMKernel(const DType margin,
+                             const DType reg_coef,
+                             Tensor<gpu, 2, DType> dst,
+                             const Tensor<gpu, 1, DType> label,
+                             const Tensor<gpu, 2, DType> src) {
+  const index_t nmax    = dst.size(1);
   const unsigned n_size = 1 << n_bits;
-  const int y = blockIdx.x;
-  const int n = threadIdx.x;
-  const index_t k = static_cast<int>(label[y]);
+  const int y           = blockIdx.x;
+  const int n           = threadIdx.x;
+  const index_t k       = static_cast<int>(label[y]);
   for (index_t n_index = n; n_index < nmax; n_index += n_size) {
     if (n_index == k) {
       dst[y][k] = -DType(margin > src[y][k]) * reg_coef;
@@ -51,69 +50,65 @@ __global__  void L1_SVMKernel(const DType margin,
   }
 }
 
-template<typename DType>
-inline void L1_SVM(const DType & margin,
-                   const DType & reg_coef,
+template <typename DType>
+inline void L1_SVM(const DType& margin,
+                   const DType& reg_coef,
                    Tensor<gpu, 2, DType> dst,
-                   const Tensor<gpu, 1, DType> & label,
-                   const Tensor<gpu, 2, DType> & src) {
+                   const Tensor<gpu, 1, DType>& label,
+                   const Tensor<gpu, 2, DType>& src) {
   dim3 dimBlock(cuda::kBaseThreadNum);
   dim3 dimGrid(dst.size(0));
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  L1_SVMKernel<cuda::kBaseThreadBits, DType> <<<dimGrid, dimBlock, 0, stream >>>
-    (margin, reg_coef, dst, label, src);
+  L1_SVMKernel<cuda::kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(margin, reg_coef, dst, label, src);
   MSHADOW_CUDA_POST_KERNEL_CHECK(L1_SVMKernel);
 }
 
-
-template<int n_bits, typename DType>
-__global__  void L2_SVMKernel(const DType margin,
-                              const DType reg_coef,
-                              Tensor<gpu, 2, DType> dst,
-                              const Tensor<gpu, 1, DType> label,
-                              const Tensor<gpu, 2, DType> src) {
-  const index_t nmax = dst.size(1);
+template <int n_bits, typename DType>
+__global__ void L2_SVMKernel(const DType margin,
+                             const DType reg_coef,
+                             Tensor<gpu, 2, DType> dst,
+                             const Tensor<gpu, 1, DType> label,
+                             const Tensor<gpu, 2, DType> src) {
+  const index_t nmax    = dst.size(1);
   const unsigned n_size = 1 << n_bits;
-  const int y = blockIdx.x;
-  const int n = threadIdx.x;
-  const index_t k = static_cast<int>(label[y]);
+  const int y           = blockIdx.x;
+  const int n           = threadIdx.x;
+  const index_t k       = static_cast<int>(label[y]);
   for (index_t n_index = n; n_index < nmax; n_index += n_size) {
     if (n_index == k) {
       dst[y][k] = margin > src[y][k] ? 2 * (margin - src[y][k]) : DType(0.0f);
       dst[y][k] *= -reg_coef;
     } else {
-      dst[y][n_index] = margin > -src[y][n_index] ? (-2)*(margin + src[y][n_index]) : DType(0.0f);
+      dst[y][n_index] = margin > -src[y][n_index] ? (-2) * (margin + src[y][n_index]) : DType(0.0f);
       dst[y][n_index] *= -reg_coef;
     }
   }
 }
 
-template<typename DType>
-inline void L2_SVM(const DType & margin,
-                   const DType & reg_coef,
+template <typename DType>
+inline void L2_SVM(const DType& margin,
+                   const DType& reg_coef,
                    Tensor<gpu, 2, DType> dst,
-                   const Tensor<gpu, 1, DType> & label,
-                   const Tensor<gpu, 2, DType> & src) {
+                   const Tensor<gpu, 1, DType>& label,
+                   const Tensor<gpu, 2, DType>& src) {
   dim3 dimBlock(cuda::kBaseThreadNum);
   dim3 dimGrid(dst.size(0));
   cudaStream_t stream = Stream<gpu>::GetStream(dst.stream_);
-  L2_SVMKernel<cuda::kBaseThreadBits, DType> <<<dimGrid, dimBlock, 0, stream >>>
-    (margin, reg_coef, dst, label, src);
+  L2_SVMKernel<cuda::kBaseThreadBits, DType>
+      <<<dimGrid, dimBlock, 0, stream>>>(margin, reg_coef, dst, label, src);
   MSHADOW_CUDA_POST_KERNEL_CHECK(L2_SVMKernel);
 }
 }  // namespace mshadow
 
 namespace mxnet {
 namespace op {
-template<>
-Operator *CreateOp<gpu>(SVMOutputParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, {
-    op = new SVMOutputOp<gpu, DType>(param);
-  })
+template <>
+Operator* CreateOp<gpu>(SVMOutputParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_REAL_TYPE_SWITCH(dtype, DType, { op = new SVMOutputOp<gpu, DType>(param); })
   return op;
 }
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/swapaxis-inl.h b/src/operator/swapaxis-inl.h
index b8affdc61009..2600c8628d67 100644
--- a/src/operator/swapaxis-inl.h
+++ b/src/operator/swapaxis-inl.h
@@ -22,7 +22,7 @@
  * \file swapaxis-inl.h
  * \brief
  * \author Ming Zhang
-*/
+ */
 #ifndef MXNET_OPERATOR_SWAPAXIS_INL_H_
 #define MXNET_OPERATOR_SWAPAXIS_INL_H_
 
@@ -41,35 +41,30 @@ namespace mxnet {
 namespace op {
 
 namespace swapaxisenum {
-enum SwapAxisOpInputs {kData};
-enum SwapAxisOpOutputs {kOut};
-};
-
+enum SwapAxisOpInputs { kData };
+enum SwapAxisOpOutputs { kOut };
+};  // namespace swapaxisenum
 
 struct SwapAxisParam : public dmlc::Parameter<SwapAxisParam> {
   // use int for enumeration
   int dim1, dim2;
   DMLC_DECLARE_PARAMETER(SwapAxisParam) {
-    DMLC_DECLARE_FIELD(dim1)
-    .set_default(0)
-    .describe("the first axis to be swapped.");
-    DMLC_DECLARE_FIELD(dim2)
-    .set_default(0)
-    .describe("the second axis to be swapped.");
+    DMLC_DECLARE_FIELD(dim1).set_default(0).describe("the first axis to be swapped.");
+    DMLC_DECLARE_FIELD(dim2).set_default(0).describe("the second axis to be swapped.");
   }
 };
 
-
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 class SwapAxisOp : public Operator {
  public:
   explicit SwapAxisOp(SwapAxisParam p) {
     this->param_ = p;
   }
 
-  void Reshape2Five(mshadow::Shape<5> *inter_shape,
-                    const mxnet::TShape &shape,
-                    int dim1, int dim2) {
+  void Reshape2Five(mshadow::Shape<5>* inter_shape,
+                    const mxnet::TShape& shape,
+                    int dim1,
+                    int dim2) {
     using namespace mshadow;
     using namespace mshadow::expr;
     int ndim_in = shape.ndim();
@@ -100,20 +95,20 @@ class SwapAxisOp : public Operator {
     }
   }
 
-  void SwapAxis(mshadow::Stream<xpu> *s,
-                const std::vector<TBlob> &in_data,
-                const std::vector<TBlob> &out_data,
-                const std::vector<OpReqType> &req) {
+  void SwapAxis(mshadow::Stream<xpu>* s,
+                const std::vector<TBlob>& in_data,
+                const std::vector<TBlob>& out_data,
+                const std::vector<OpReqType>& req) {
     using namespace mshadow;
     using namespace mshadow::expr;
 
-    TBlob data_in = in_data[swapaxisenum::kData];
-    TBlob data_out = out_data[swapaxisenum::kData];
+    TBlob data_in     = in_data[swapaxisenum::kData];
+    TBlob data_out    = out_data[swapaxisenum::kData];
     OpReqType out_req = req[swapaxisenum::kData];
 
-    mxnet::TShape shape_in = data_in.shape_;
+    mxnet::TShape shape_in  = data_in.shape_;
     mxnet::TShape shape_out = data_out.shape_;
-    int axis1 = param_.dim1;
+    int axis1               = param_.dim1;
     if (axis1 < 0) {
       axis1 += shape_in.ndim();
     }
@@ -129,12 +124,13 @@ class SwapAxisOp : public Operator {
         << "axis2: axis " << param_.dim2 << " is out of bounds for array of ndim "
         << shape_in.ndim();
 
-    if (shape_in.Size() == 0U) return;
+    if (shape_in.Size() == 0U)
+      return;
 
     if (axis1 == axis2) {
       if (out_req == kAddTo) {
         mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, kAddTo>, xpu>::Launch(
-          s, data_out.Size(), data_out.dptr<DType>(), data_in.dptr<DType>());
+            s, data_out.Size(), data_out.dptr<DType>(), data_in.dptr<DType>());
       } else {
         mxnet_op::copy(s, data_out, data_in);
       }
@@ -153,32 +149,32 @@ class SwapAxisOp : public Operator {
     Tensor<xpu, 5, DType> inter_data_out = data_out.get_with_shape<xpu, 5, DType>(inter_shape2, s);
 
     if (out_req == kAddTo) {
-        inter_data_out += swapaxis<3, 1>(inter_data_in);
+      inter_data_out += swapaxis<3, 1>(inter_data_in);
     } else {
-        inter_data_out = swapaxis<3, 1>(inter_data_in);
+      inter_data_out = swapaxis<3, 1>(inter_data_in);
     }
   }
 
-  virtual void Forward(const OpContext &ctx,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Forward(const OpContext& ctx,
+                       const std::vector<TBlob>& in_data,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& out_data,
+                       const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     SwapAxis(s, in_data, out_data, req);
   }
 
-  virtual void Backward(const OpContext &ctx,
-                       const std::vector<TBlob> &out_grad,
-                       const std::vector<TBlob> &in_data,
-                       const std::vector<TBlob> &out_data,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &in_grad,
-                       const std::vector<TBlob> &aux_args) {
+  virtual void Backward(const OpContext& ctx,
+                        const std::vector<TBlob>& out_grad,
+                        const std::vector<TBlob>& in_data,
+                        const std::vector<TBlob>& out_data,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& in_grad,
+                        const std::vector<TBlob>& aux_args) {
     using namespace mshadow;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
 
     SwapAxis(s, out_grad, in_grad, req);
   }
@@ -186,11 +182,9 @@ class SwapAxisOp : public Operator {
   SwapAxisParam param_;
 };
 
-
-template<typename xpu>
+template <typename xpu>
 Operator* CreateOp(SwapAxisParam param, int dtype);
 
-
 #if DMLC_USE_CXX11
 class SwapAxisProp : public OperatorProperty {
  public:
@@ -206,13 +200,14 @@ class SwapAxisProp : public OperatorProperty {
     return param_.__DICT__();
   }
 
-  bool InferShape(mxnet::ShapeVector *in_shape,
-                  mxnet::ShapeVector *out_shape,
-                  mxnet::ShapeVector *aux_shape) const override {
+  bool InferShape(mxnet::ShapeVector* in_shape,
+                  mxnet::ShapeVector* out_shape,
+                  mxnet::ShapeVector* aux_shape) const override {
     CHECK_EQ(in_shape->size(), 1U);
 
-    mxnet::TShape &shape0 = (*in_shape)[swapaxisenum::kData];
-    if (!ndim_is_known(shape0)) return false;
+    mxnet::TShape& shape0 = (*in_shape)[swapaxisenum::kData];
+    if (!ndim_is_known(shape0))
+      return false;
     int axis1 = param_.dim1;
     if (axis1 < 0) {
       axis1 += shape0.ndim();
@@ -229,16 +224,16 @@ class SwapAxisProp : public OperatorProperty {
 
     out_shape->clear();
     out_shape->push_back(shape0);
-    mxnet::TShape &shape1 = (*out_shape)[swapaxisenum::kOut];
+    mxnet::TShape& shape1 = (*out_shape)[swapaxisenum::kOut];
 
     std::swap(shape1[axis1], shape1[axis2]);
 
     return shape_is_known(*out_shape);
   }
 
-  bool InferType(std::vector<int> *in_type,
-                 std::vector<int> *out_type,
-                 std::vector<int> *aux_type) const override {
+  bool InferType(std::vector<int>* in_type,
+                 std::vector<int>* out_type,
+                 std::vector<int>* aux_type) const override {
     CHECK_EQ(in_type->size(), 1U);
     int dtype = (*in_type)[0];
     CHECK_NE(dtype, -1) << "Input must have specified type";
@@ -248,7 +243,7 @@ class SwapAxisProp : public OperatorProperty {
   }
 
   OperatorProperty* Copy() const override {
-    auto ptr = new SwapAxisProp();
+    auto ptr    = new SwapAxisProp();
     ptr->param_ = param_;
     return ptr;
   }
@@ -257,10 +252,9 @@ class SwapAxisProp : public OperatorProperty {
     return "SwapAxis";
   }
 
-  std::vector<int> DeclareBackwardDependency(
-    const std::vector<int> &out_grad,
-    const std::vector<int> &in_data,
-    const std::vector<int> &out_data) const override {
+  std::vector<int> DeclareBackwardDependency(const std::vector<int>& out_grad,
+                                             const std::vector<int>& in_data,
+                                             const std::vector<int>& out_data) const override {
     return {out_grad[swapaxisenum::kOut]};
   };
 
@@ -269,15 +263,15 @@ class SwapAxisProp : public OperatorProperty {
     return nullptr;
   }
 
-  Operator* CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                             std::vector<int> *in_type) const override;
+  Operator* CreateOperatorEx(Context ctx,
+                             mxnet::ShapeVector* in_shape,
+                             std::vector<int>* in_type) const override;
 
  private:
   SwapAxisParam param_;
-};  // class SwapAxisProp
+};      // class SwapAxisProp
 #endif  // DMLC_USE_CXX11
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/swapaxis.cc b/src/operator/swapaxis.cc
index 32b26cc14f0c..b037f5f1d284 100644
--- a/src/operator/swapaxis.cc
+++ b/src/operator/swapaxis.cc
@@ -22,34 +22,32 @@
  * \file swapaxis.cc
  * \brief
  * \author Ming Zhang
-*/
+ */
 
 #include "./swapaxis-inl.h"
 
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 Operator* CreateOp<cpu>(SwapAxisParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_TYPE_SWITCH(dtype, DType, {
-    op = new SwapAxisOp<cpu, DType>(param);
-  });
+  Operator* op = nullptr;
+  MSHADOW_TYPE_SWITCH(dtype, DType, { op = new SwapAxisOp<cpu, DType>(param); });
   return op;
 }
 
-Operator* SwapAxisProp::CreateOperatorEx(Context ctx, mxnet::ShapeVector *in_shape,
-                                         std::vector<int> *in_type) const {
+Operator* SwapAxisProp::CreateOperatorEx(Context ctx,
+                                         mxnet::ShapeVector* in_shape,
+                                         std::vector<int>* in_type) const {
   DO_BIND_DISPATCH(CreateOp, param_, in_type->at(0));
 }
 
-
 DMLC_REGISTER_PARAMETER(SwapAxisParam);
 
 MXNET_REGISTER_OP_PROPERTY(SwapAxis, SwapAxisProp)
-.add_argument("data", "NDArray-or-Symbol", "Input array.")
-.add_arguments(SwapAxisParam::__FIELDS__())
-.describe(R"code(Interchanges two axes of an array.
+    .add_argument("data", "NDArray-or-Symbol", "Input array.")
+    .add_arguments(SwapAxisParam::__FIELDS__())
+    .describe(R"code(Interchanges two axes of an array.
 
 Examples::
 
diff --git a/src/operator/swapaxis.cu b/src/operator/swapaxis.cu
index c9ede887ee25..9133d1968df1 100644
--- a/src/operator/swapaxis.cu
+++ b/src/operator/swapaxis.cu
@@ -22,22 +22,19 @@
  * \file swapaxis.cu
  * \brief
  * \author Ming Zhang
-*/
+ */
 
 #include "./swapaxis-inl.h"
 
 namespace mxnet {
 namespace op {
 
-template<>
-Operator *CreateOp<gpu>(SwapAxisParam param, int dtype) {
-  Operator *op = nullptr;
-  MSHADOW_TYPE_SWITCH(dtype, DType, {
-    op =  new SwapAxisOp<gpu, DType>(param);
-  });
+template <>
+Operator* CreateOp<gpu>(SwapAxisParam param, int dtype) {
+  Operator* op = nullptr;
+  MSHADOW_TYPE_SWITCH(dtype, DType, { op = new SwapAxisOp<gpu, DType>(param); });
   return op;
 }
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/tensor/amp_cast.cc b/src/operator/tensor/amp_cast.cc
index fa0fb3b19eb6..c2109de209b3 100644
--- a/src/operator/tensor/amp_cast.cc
+++ b/src/operator/tensor/amp_cast.cc
@@ -32,10 +32,10 @@ DMLC_REGISTER_PARAMETER(AMPMultiCastParam);
 
 #if MXNET_USE_ONEDNN == 1
 static void AMPCastExCPU(const nnvm::NodeAttrs& attrs,
-                    const OpContext& ctx,
-                    const std::vector<NDArray>& inputs,
-                    const std::vector<OpReqType>& req,
-                    const std::vector<NDArray>& outputs) {
+                         const OpContext& ctx,
+                         const std::vector<NDArray>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   if (req[0] == kWriteInplace) {
@@ -46,15 +46,16 @@ static void AMPCastExCPU(const nnvm::NodeAttrs& attrs,
     mkldnn::engine cpu_engine = mxnet::CpuEngine::Get()->get_engine();
     if (data.IsView() && data.IsMKLDNNData())
       data = data.Reorder2Default();
-    const auto i_mem = data.GetMKLDNNData();
-    const size_t i_ndim = data.shape().ndim();
+    const auto i_mem            = data.GetMKLDNNData();
+    const size_t i_ndim         = data.shape().ndim();
     mkldnn::memory::dims i_dims = mkldnn::memory::dims(i_ndim);
     for (size_t i = 0; i < i_ndim; i++) {
       i_dims[i] = static_cast<int>(data.shape()[i]);
     }
     const auto o_desc =
-        mkldnn::memory::desc(i_dims, get_mkldnn_type(outputs[0].dtype()),
-                            static_cast<mkldnn::memory::format_tag>(GetDefaultFormat(i_ndim)));
+        mkldnn::memory::desc(i_dims,
+                             get_mkldnn_type(outputs[0].dtype()),
+                             static_cast<mkldnn::memory::format_tag>(GetDefaultFormat(i_ndim)));
     const auto out_mem = CreateMKLDNNMem(outputs[0], o_desc, req[0]);
     mkldnn_args_map_t reorder_args;
     reorder_args[MKLDNN_ARG_SRC] = *i_mem;
@@ -66,8 +67,10 @@ static void AMPCastExCPU(const nnvm::NodeAttrs& attrs,
   FallBackCompute(AMPCastCompute<cpu>, attrs, ctx, inputs, req, outputs);
 }
 
-inline static bool AMPCastStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
-                                      DispatchMode* dispatch_mode, std::vector<int>* in_attrs,
+inline static bool AMPCastStorageType(const nnvm::NodeAttrs& attrs,
+                                      const int dev_mask,
+                                      DispatchMode* dispatch_mode,
+                                      std::vector<int>* in_attrs,
                                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
@@ -75,8 +78,10 @@ inline static bool AMPCastStorageType(const nnvm::NodeAttrs& attrs, const int de
   return ret;
 }
 
-static void AMPMultiCastExCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
-                              const std::vector<NDArray>& inputs, const std::vector<OpReqType>& req,
+static void AMPMultiCastExCPU(const nnvm::NodeAttrs& attrs,
+                              const OpContext& ctx,
+                              const std::vector<NDArray>& inputs,
+                              const std::vector<OpReqType>& req,
                               const std::vector<NDArray>& outputs) {
   const AMPMultiCastParam& param = nnvm::get<AMPMultiCastParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), param.num_outputs);
@@ -89,14 +94,15 @@ static void AMPMultiCastExCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx
     auto data = inputs[i];
     if (data.IsView() && data.IsMKLDNNData())
       data = data.Reorder2Default();
-    const auto i_mem = data.GetMKLDNNData();
-    const size_t i_ndim = data.shape().ndim();
+    const auto i_mem            = data.GetMKLDNNData();
+    const size_t i_ndim         = data.shape().ndim();
     mkldnn::memory::dims i_dims = mkldnn::memory::dims(i_ndim);
     for (size_t j = 0; j < i_ndim; j++) {
       i_dims[j] = static_cast<int>(data.shape()[j]);
     }
     const auto o_desc =
-        mkldnn::memory::desc(i_dims, get_mkldnn_type(outputs[i].dtype()),
+        mkldnn::memory::desc(i_dims,
+                             get_mkldnn_type(outputs[i].dtype()),
                              static_cast<mkldnn::memory::format_tag>(GetDefaultFormat(i_ndim)));
     const auto out_mem = CreateMKLDNNMem(outputs[i], o_desc, req[i]);
     mkldnn_args_map_t reorder_args;
@@ -107,8 +113,10 @@ static void AMPMultiCastExCPU(const nnvm::NodeAttrs& attrs, const OpContext& ctx
   MKLDNNStream::Get()->Submit();
 }
 
-inline static bool AMPMultiCastStorageType(const nnvm::NodeAttrs& attrs, const int dev_mask,
-                                           DispatchMode* dispatch_mode, std::vector<int>* in_attrs,
+inline static bool AMPMultiCastStorageType(const nnvm::NodeAttrs& attrs,
+                                           const int dev_mask,
+                                           DispatchMode* dispatch_mode,
+                                           std::vector<int>* in_attrs,
                                            std::vector<int>* out_attrs) {
   const AMPMultiCastParam& param = nnvm::get<AMPMultiCastParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), param.num_outputs);
@@ -119,147 +127,150 @@ inline static bool AMPMultiCastStorageType(const nnvm::NodeAttrs& attrs, const i
 #endif  // MXNET_USE_ONEDNN == 1
 
 NNVM_REGISTER_OP(amp_cast)
-.add_alias("_npi_amp_cast")
-.describe(R"code(Cast function between low precision float/FP32 used by AMP.
+    .add_alias("_npi_amp_cast")
+    .describe(R"code(Cast function between low precision float/FP32 used by AMP.
 
 It casts only between low precision float/FP32 and does not do anything for other types.
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<AMPCastParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", AMPCastType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<FCompute>("FCompute<cpu>", AMPCastCompute<cpu>)
+    .set_attr_parser(ParamParser<AMPCastParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", AMPCastType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", AMPCastCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", AMPCastStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AMPCastExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", AMPCastStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AMPCastExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_amp_cast"})
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(AMPCastParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_amp_cast"})
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(AMPCastParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_amp_cast)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", AMPCastStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AMPCastExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", AMPCastStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AMPCastExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", AMPCastCompute<cpu>);
+    .set_attr<FCompute>("FCompute<cpu>", AMPCastCompute<cpu>);
 
 NNVM_REGISTER_OP(amp_multicast)
-.add_alias("_npi_amp_multicast")
-.describe(R"code(Cast function used by AMP, that casts its inputs to the common widest type.
+    .add_alias("_npi_amp_multicast")
+    .describe(R"code(Cast function used by AMP, that casts its inputs to the common widest type.
 
 It casts only between low precision float/FP32 and does not do anything for other types.
 
 )code" ADD_FILELINE)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_outputs);
-})
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_outputs);
-})
-.set_attr_parser(ParamParser<AMPMultiCastParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", AMPMultiCastShape)
-.set_attr<nnvm::FInferType>("FInferType", AMPMultiCastType)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args =
-        dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("data_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    int num_args =
-        dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
-    std::vector<std::pair<int, int>> ret;
-    ret.reserve(num_args);
-    for (int i = 0; i < num_args; ++i) {
-      ret.emplace_back(i, i);
-    }
-    return ret;
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs) {
-    int num_args =
-        dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
-    return std::vector<bool>(num_args, true);
-  })
-.set_attr<FCompute>("FCompute<cpu>", AMPMultiCastCompute<cpu>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_outputs);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_outputs);
+    })
+    .set_attr_parser(ParamParser<AMPMultiCastParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", AMPMultiCastShape)
+    .set_attr<nnvm::FInferType>("FInferType", AMPMultiCastType)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("data_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      int num_args =
+                                          dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
+                                      std::vector<std::pair<int, int>> ret;
+                                      ret.reserve(num_args);
+                                      for (int i = 0; i < num_args; ++i) {
+                                        ret.emplace_back(i, i);
+                                      }
+                                      return ret;
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        int num_args =
+                                            dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
+                                        return std::vector<bool>(num_args, true);
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", AMPMultiCastCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", AMPMultiCastStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AMPMultiCastExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", AMPMultiCastStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AMPMultiCastExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_amp_multicast"})
-.add_argument("data", "NDArray-or-Symbol[]", "Weights")
-.add_arguments(AMPMultiCastParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_amp_multicast"})
+    .add_argument("data", "NDArray-or-Symbol[]", "Weights")
+    .add_arguments(AMPMultiCastParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_amp_multicast)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_outputs);
-  })
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_outputs);
-  })
-.set_attr_parser(ParamParser<AMPMultiCastParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("grad_") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    int num_args = dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
-    std::vector<std::pair<int, int>> ret;
-    ret.reserve(num_args);
-    for (int i = 0; i < num_args; ++i) {
-      ret.emplace_back(i, i);
-    }
-    return ret;
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    int num_args = dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
-    return std::vector<bool>(num_args, true);
-  })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_outputs);
+    })
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_outputs);
+    })
+    .set_attr_parser(ParamParser<AMPMultiCastParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("grad_") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      int num_args =
+                                          dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
+                                      std::vector<std::pair<int, int>> ret;
+                                      ret.reserve(num_args);
+                                      for (int i = 0; i < num_args; ++i) {
+                                        ret.emplace_back(i, i);
+                                      }
+                                      return ret;
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        int num_args =
+                                            dmlc::get<AMPMultiCastParam>(attrs.parsed).num_outputs;
+                                        return std::vector<bool>(num_args, true);
+                                      })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", AMPMultiCastStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", AMPMultiCastExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", AMPMultiCastStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", AMPMultiCastExCPU)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", AMPMultiCastCompute<cpu>)
-.add_argument("grad", "NDArray-or-Symbol[]", "Gradients")
-.add_arguments(AMPMultiCastParam::__FIELDS__());
+    .set_attr<FCompute>("FCompute<cpu>", AMPMultiCastCompute<cpu>)
+    .add_argument("grad", "NDArray-or-Symbol[]", "Gradients")
+    .add_arguments(AMPMultiCastParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/amp_cast.cu b/src/operator/tensor/amp_cast.cu
index 0a4f7c56c90b..7fe198ef30c4 100644
--- a/src/operator/tensor/amp_cast.cu
+++ b/src/operator/tensor/amp_cast.cu
@@ -27,14 +27,11 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(amp_cast)
-.set_attr<FCompute>("FCompute<gpu>", AMPCastCompute<gpu>);
-NNVM_REGISTER_OP(_backward_amp_cast)
-.set_attr<FCompute>("FCompute<gpu>", AMPCastCompute<gpu>);
+NNVM_REGISTER_OP(amp_cast).set_attr<FCompute>("FCompute<gpu>", AMPCastCompute<gpu>);
+NNVM_REGISTER_OP(_backward_amp_cast).set_attr<FCompute>("FCompute<gpu>", AMPCastCompute<gpu>);
 
-NNVM_REGISTER_OP(amp_multicast)
-.set_attr<FCompute>("FCompute<gpu>", AMPMultiCastCompute<gpu>);
+NNVM_REGISTER_OP(amp_multicast).set_attr<FCompute>("FCompute<gpu>", AMPMultiCastCompute<gpu>);
 NNVM_REGISTER_OP(_backward_amp_multicast)
-.set_attr<FCompute>("FCompute<gpu>", AMPMultiCastCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", AMPMultiCastCompute<gpu>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/amp_cast.h b/src/operator/tensor/amp_cast.h
index 9a45bd0d932e..87158c8e5f41 100644
--- a/src/operator/tensor/amp_cast.h
+++ b/src/operator/tensor/amp_cast.h
@@ -41,8 +41,7 @@ struct AMPCastParam : public dmlc::Parameter<AMPCastParam> {
   int dtype;
   DMLC_DECLARE_PARAMETER(AMPCastParam) {
     DMLC_DECLARE_FIELD(dtype)
-    MXNET_ADD_ALL_TYPES
-    .describe("Output data type.");
+    MXNET_ADD_ALL_TYPES.describe("Output data type.");
   }
 };
 
@@ -52,18 +51,19 @@ struct AMPMultiCastParam : public dmlc::Parameter<AMPMultiCastParam> {
 
   DMLC_DECLARE_PARAMETER(AMPMultiCastParam) {
     DMLC_DECLARE_FIELD(num_outputs)
-    .describe("Number of input/output pairs to be casted to the widest type.");
-    DMLC_DECLARE_FIELD(cast_narrow).set_default(false)
-    .describe("Whether to cast to the narrowest type");
+        .describe("Number of input/output pairs to be casted to the widest type.");
+    DMLC_DECLARE_FIELD(cast_narrow)
+        .set_default(false)
+        .describe("Whether to cast to the narrowest type");
   }
 };
 
 inline bool AMPCastType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
-  using mshadow::kFloat32;
-  using mshadow::kFloat16;
+                        std::vector<int>* in_attrs,
+                        std::vector<int>* out_attrs) {
   using mshadow::kBfloat16;
+  using mshadow::kFloat16;
+  using mshadow::kFloat32;
   const AMPCastParam& param = nnvm::get<AMPCastParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -76,15 +76,15 @@ inline bool AMPCastType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool AMPMultiCastType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
-  using mshadow::kFloat32;
-  using mshadow::kFloat16;
+                             std::vector<int>* in_attrs,
+                             std::vector<int>* out_attrs) {
   using mshadow::kBfloat16;
+  using mshadow::kFloat16;
+  using mshadow::kFloat32;
   const AMPMultiCastParam& param = nnvm::get<AMPMultiCastParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), param.num_outputs);
   CHECK_EQ(out_attrs->size(), param.num_outputs);
-  bool ret = true;
+  bool ret        = true;
   int widest_type = param.cast_narrow ? kFloat32 : (*in_attrs)[0];
   for (int i = 0; i < param.num_outputs; ++i) {
     if (!param.cast_narrow && ((*in_attrs)[i] == kFloat32 || (*out_attrs)[i] == kFloat32)) {
@@ -107,8 +107,8 @@ inline bool AMPMultiCastType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool AMPMultiCastShape(const nnvm::NodeAttrs& attrs,
-                              std::vector<TShape> *in_attrs,
-                              std::vector<TShape> *out_attrs) {
+                              std::vector<TShape>* in_attrs,
+                              std::vector<TShape>* out_attrs) {
   const AMPMultiCastParam& param = dmlc::get<AMPMultiCastParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), param.num_outputs);
   CHECK_EQ(out_attrs->size(), param.num_outputs);
@@ -124,7 +124,7 @@ inline bool AMPMultiCastShape(const nnvm::NodeAttrs& attrs,
   return all_inferred;
 }
 
-template<typename xpu>
+template <typename xpu>
 void AMPCastCompute(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -132,35 +132,33 @@ void AMPCastCompute(const nnvm::NodeAttrs& attrs,
                     const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, DstDType, {
     Tensor<xpu, 1, DstDType> out = outputs[0].FlatTo1D<xpu, DstDType>(s);
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, SrcDType, {
       Tensor<xpu, 1, SrcDType> data = inputs[0].FlatTo1D<xpu, SrcDType>(s);
-      if (outputs[0].type_flag_ != inputs[0].type_flag_ ||
-          req[0] != kWriteInplace) {
+      if (outputs[0].type_flag_ != inputs[0].type_flag_ || req[0] != kWriteInplace) {
         Assign(out, req[0], tcast<DstDType>(data));
       }
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void AMPMultiCastCompute(const nnvm::NodeAttrs& attrs,
-                    const OpContext& ctx,
-                    const std::vector<TBlob>& inputs,
-                    const std::vector<OpReqType>& req,
-                    const std::vector<TBlob>& outputs) {
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   for (size_t i = 0; i < outputs.size(); ++i) {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[i].type_flag_, DstDType, {
       Tensor<xpu, 1, DstDType> out = outputs[i].FlatTo1D<xpu, DstDType>(s);
       MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[i].type_flag_, SrcDType, {
         Tensor<xpu, 1, SrcDType> data = inputs[i].FlatTo1D<xpu, SrcDType>(s);
-        if (outputs[i].type_flag_ != inputs[i].type_flag_ ||
-            req[i] != kWriteInplace) {
+        if (outputs[i].type_flag_ != inputs[i].type_flag_ || req[i] != kWriteInplace) {
           Assign(out, req[i], tcast<DstDType>(data));
         }
       });
diff --git a/src/operator/tensor/broadcast_reduce-inl.h b/src/operator/tensor/broadcast_reduce-inl.h
index 13fadbf41918..737b17dee2d1 100644
--- a/src/operator/tensor/broadcast_reduce-inl.h
+++ b/src/operator/tensor/broadcast_reduce-inl.h
@@ -37,17 +37,22 @@
 namespace mxnet {
 namespace op {
 namespace mxnet_op {
-template<int ndim, typename OP>
+template <int ndim, typename OP>
 struct binary_broadcast_kernel {
   /*! \brief Map function for binary_broadcast_kernel */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(index_t base, index_t length, OpReqType req,
-                                  const Shape <ndim> &lstride, const Shape <ndim> &rstride,
-                                  const Shape <ndim> &oshape, IType *lhs, IType *rhs,
-                                  DType *out) {
-    Shape <ndim> coord = unravel(base, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto ridx = static_cast<index_t>(dot(coord, rstride));
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  index_t length,
+                                  OpReqType req,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& rstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* lhs,
+                                  IType* rhs,
+                                  DType* out) {
+    Shape<ndim> coord = unravel(base, oshape);
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto ridx         = static_cast<index_t>(dot(coord, rstride));
     KERNEL_ASSIGN(out[base], req, OP::Map(lhs[lidx], rhs[ridx]));
     // starts from 1 to avoid extra inc at end of loop
     for (index_t i = 1; i < length; ++i) {
@@ -59,14 +64,19 @@ struct binary_broadcast_kernel {
   }
 
   /*! \brief Map function for binary_broadcast_kernel */
-  template<typename LType, typename RType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t base, index_t length, OpReqType req,
-                                  const Shape <ndim> &lstride, const Shape <ndim> &rstride,
-                                  const Shape <ndim> &oshape, LType *lhs, RType *rhs,
-                                  OType *out) {
-    Shape <ndim> coord = unravel(base, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto ridx = static_cast<index_t>(dot(coord, rstride));
+  template <typename LType, typename RType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  index_t length,
+                                  OpReqType req,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& rstride,
+                                  const Shape<ndim>& oshape,
+                                  LType* lhs,
+                                  RType* rhs,
+                                  OType* out) {
+    Shape<ndim> coord = unravel(base, oshape);
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto ridx         = static_cast<index_t>(dot(coord, rstride));
     KERNEL_ASSIGN(out[base], req, OP::Map(lhs[lidx], rhs[ridx]));
     // starts from 1 to avoid extra inc at end of loop
     for (index_t i = 1; i < length; ++i) {
@@ -78,14 +88,19 @@ struct binary_broadcast_kernel {
   }
 
   /*! \brief Map function for binary_broadcast_kernel */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(index_t base, index_t length, OpReqType req,
-                                  const Shape <ndim> &lstride, const Shape <ndim> &rstride,
-                                  const Shape <ndim> &oshape, IType lhs, IType *rhs,
-                                  DType *out) {
-    Shape <ndim> coord = unravel(base, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto ridx = static_cast<index_t>(dot(coord, rstride));
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  index_t length,
+                                  OpReqType req,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& rstride,
+                                  const Shape<ndim>& oshape,
+                                  IType lhs,
+                                  IType* rhs,
+                                  DType* out) {
+    Shape<ndim> coord = unravel(base, oshape);
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto ridx         = static_cast<index_t>(dot(coord, rstride));
     KERNEL_ASSIGN(out[base], req, OP::Map(lhs, rhs[ridx]));
     // starts from 1 to avoid extra inc at end of loop
     for (index_t i = 1; i < length; ++i) {
@@ -98,15 +113,21 @@ struct binary_broadcast_kernel {
 
   /*! \brief Map function for binary_broadcast_kernel */
   /* used for mixed type binary ops */
-  template<typename IType, typename DType,
-           typename std::enable_if<!std::is_same<IType, DType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t base, index_t length, OpReqType req,
-                                  const Shape <ndim> &lstride, const Shape <ndim> &rstride,
-                                  const Shape <ndim> &oshape, IType *lhs, DType *rhs,
-                                  DType *out) {
-    Shape <ndim> coord = unravel(base, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto ridx = static_cast<index_t>(dot(coord, rstride));
+  template <typename IType,
+            typename DType,
+            typename std::enable_if<!std::is_same<IType, DType>::value, int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  index_t length,
+                                  OpReqType req,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& rstride,
+                                  const Shape<ndim>& oshape,
+                                  IType* lhs,
+                                  DType* rhs,
+                                  DType* out) {
+    Shape<ndim> coord = unravel(base, oshape);
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto ridx         = static_cast<index_t>(dot(coord, rstride));
     KERNEL_ASSIGN(out[base], req, OP::Map(lhs[lidx], rhs[ridx]));
     // starts from 1 to avoid extra inc at end of loop
     for (index_t i = 1; i < length; ++i) {
@@ -119,16 +140,23 @@ struct binary_broadcast_kernel {
 
   /*! \brief Map function for binary_broadcast_kernel */
   /* used for mixed type binary ops */
-  template<typename IType, typename DType,
-           typename std::enable_if<!std::is_same<IType, DType>::value &&
-                                   !std::is_pointer<IType>::value, int>::type = 0>
-  MSHADOW_XINLINE static void Map(index_t base, index_t length, OpReqType req,
-                                  const Shape <ndim> &lstride, const Shape <ndim> &rstride,
-                                  const Shape <ndim> &oshape, IType lhs, DType *rhs,
-                                  DType *out) {
-    Shape <ndim> coord = unravel(base, oshape);
-    auto lidx = static_cast<index_t>(dot(coord, lstride));
-    auto ridx = static_cast<index_t>(dot(coord, rstride));
+  template <
+      typename IType,
+      typename DType,
+      typename std::enable_if<!std::is_same<IType, DType>::value && !std::is_pointer<IType>::value,
+                              int>::type = 0>
+  MSHADOW_XINLINE static void Map(index_t base,
+                                  index_t length,
+                                  OpReqType req,
+                                  const Shape<ndim>& lstride,
+                                  const Shape<ndim>& rstride,
+                                  const Shape<ndim>& oshape,
+                                  IType lhs,
+                                  DType* rhs,
+                                  DType* out) {
+    Shape<ndim> coord = unravel(base, oshape);
+    auto lidx         = static_cast<index_t>(dot(coord, lstride));
+    auto ridx         = static_cast<index_t>(dot(coord, rstride));
     KERNEL_ASSIGN(out[base], req, OP::Map(lhs, rhs[ridx]));
     // starts from 1 to avoid extra inc at end of loop
     for (index_t i = 1; i < length; ++i) {
@@ -140,7 +168,7 @@ struct binary_broadcast_kernel {
   }
 };
 
-template<int req, typename OP, bool col_vec>
+template <int req, typename OP, bool col_vec>
 struct csr_dns_csr_broadcast_kernel {
   /*!
    * \brief Map function for broadcast between csr and 1D vector
@@ -151,14 +179,18 @@ struct csr_dns_csr_broadcast_kernel {
    * \param dns          ptr to data buffer of the dense vector
    * \param out          ptr to the data buffer of the result csr matrix
    */
-  template<typename DType, typename CType, typename RType>
-  MSHADOW_XINLINE static void Map(index_t row, const DType *csr_data, const CType *csr_indices,
-                                  const RType *csr_indptr, const DType *dns, DType *out) {
+  template <typename DType, typename CType, typename RType>
+  MSHADOW_XINLINE static void Map(index_t row,
+                                  const DType* csr_data,
+                                  const CType* csr_indices,
+                                  const RType* csr_indptr,
+                                  const DType* dns,
+                                  DType* out) {
     const nnvm::dim_t curr_row_i = csr_indptr[row];
     const nnvm::dim_t next_row_i = csr_indptr[row + 1];
     for (nnvm::dim_t iter = curr_row_i; iter < next_row_i; iter++) {
-      KERNEL_ASSIGN(out[iter], req, OP::Map(csr_data[iter],
-                    (col_vec)? dns[row] : dns[csr_indices[iter]]));
+      KERNEL_ASSIGN(
+          out[iter], req, OP::Map(csr_data[iter], (col_vec) ? dns[row] : dns[csr_indices[iter]]));
     }
   }
 
@@ -170,9 +202,12 @@ struct csr_dns_csr_broadcast_kernel {
    * \param out         ptr to the data buffer of output csr matrix
    * \param nnz         number of non-zero elements in input csr matrix
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType *csr_data, const DType* scalar_ptr,
-                                  DType *out, const nnvm::dim_t nnz) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* csr_data,
+                                  const DType* scalar_ptr,
+                                  DType* out,
+                                  const nnvm::dim_t nnz) {
     const DType scale = scalar_ptr[0];
     if (i < nnz) {
       KERNEL_ASSIGN(out[i], req, OP::Map(csr_data[i], scale));
@@ -180,20 +215,25 @@ struct csr_dns_csr_broadcast_kernel {
   }
 };
 
-template<int req, typename OP, bool reverse = false>
+template <int req, typename OP, bool reverse = false>
 struct csr_dns_map_kernel {
   template <typename DType, typename CType, typename RType>
-  MSHADOW_XINLINE static void Map(index_t row, const DType *csr_data, const CType *csr_indices,
-                                  const RType *csr_indptr, DType *out, const nnvm::dim_t num_rows,
+  MSHADOW_XINLINE static void Map(index_t row,
+                                  const DType* csr_data,
+                                  const CType* csr_indices,
+                                  const RType* csr_indptr,
+                                  DType* out,
+                                  const nnvm::dim_t num_rows,
                                   const nnvm::dim_t num_cols) {
     if (row < num_rows) {
       const nnvm::dim_t curr_row_i = csr_indptr[row];
       const nnvm::dim_t next_row_i = csr_indptr[row + 1];
       for (nnvm::dim_t iter = curr_row_i; iter < next_row_i; iter++) {
         const nnvm::dim_t target = row * num_cols + csr_indices[iter];
-        KERNEL_ASSIGN(out[target], req,
-                      reverse ? OP::Map(out[target], csr_data[iter]) :
-                                OP::Map(csr_data[iter], out[target]));
+        KERNEL_ASSIGN(
+            out[target],
+            req,
+            reverse ? OP::Map(out[target], csr_data[iter]) : OP::Map(csr_data[iter], out[target]));
       }
     }
   }
@@ -206,47 +246,51 @@ using namespace mshadow;
 
 const int MAX_DIM = 5;
 
-template<int ndim>
-MSHADOW_XINLINE void unravel_dot(const index_t idx, const Shape<ndim>& shape,
-  const Shape<ndim>& stridej, const Shape<ndim>& stridek, index_t* j, index_t* k) {
+template <int ndim>
+MSHADOW_XINLINE void unravel_dot(const index_t idx,
+                                 const Shape<ndim>& shape,
+                                 const Shape<ndim>& stridej,
+                                 const Shape<ndim>& stridek,
+                                 index_t* j,
+                                 index_t* k) {
   *j = 0;
   *k = 0;
-  #pragma unroll
-  for (index_t i = ndim-1, idx_t = idx; i >=0; --i) {
-    const auto tmp = idx_t / shape[i];
-    const auto coord = idx_t - tmp*shape[i];
-    *j += coord*stridej[i];
-    *k += coord*stridek[i];
+#pragma unroll
+  for (index_t i = ndim - 1, idx_t = idx; i >= 0; --i) {
+    const auto tmp   = idx_t / shape[i];
+    const auto coord = idx_t - tmp * shape[i];
+    *j += coord * stridej[i];
+    *k += coord * stridek[i];
     idx_t = tmp;
   }
 }
 
-template<int ndim>
+template <int ndim>
 MSHADOW_XINLINE int diff(const Shape<ndim>& small,
                          const Shape<ndim>& big,
                          Shape<ndim>* dims,
                          Shape<ndim>* stride) {
   int mdim = 0;
-  #pragma unroll
+#pragma unroll
   for (int i = 0; i < ndim; ++i) {
     mdim += small[i] != big[i];
     (*dims)[i] = (*stride)[i] = 1;
   }
 
   index_t s = 1;
-  #pragma unroll
+#pragma unroll
   for (int i = ndim - 1, j = mdim; i >= 0; --i) {
     if (small[i] != big[i]) {
       --j;
       (*stride)[j] = s;
-      (*dims)[j] = big[i];
+      (*dims)[j]   = big[i];
     }
     s *= big[i];
   }
   return mdim;
 }
 
-template<typename DType>
+template <typename DType>
 MSHADOW_XINLINE void assign(DType* dst, const bool addto, const DType src) {
   if (addto) {
     *dst += src;
@@ -255,30 +299,39 @@ MSHADOW_XINLINE void assign(DType* dst, const bool addto, const DType src) {
   }
 }
 
-template<int ndim, typename DType, typename OP>
-MSHADOW_XINLINE void binary_broadcast_assign(const index_t idx, const bool addto,
+template <int ndim, typename DType, typename OP>
+MSHADOW_XINLINE void binary_broadcast_assign(const index_t idx,
+                                             const bool addto,
                                              const DType* __restrict lhs,
-                                             const DType* __restrict rhs, DType* out,
-                                             const Shape<ndim>& lshape, const Shape<ndim>& rshape,
+                                             const DType* __restrict rhs,
+                                             DType* out,
+                                             const Shape<ndim>& lshape,
+                                             const Shape<ndim>& rshape,
                                              const Shape<ndim>& oshape) {
   const Shape<ndim> coord = mxnet_op::unravel(idx, oshape);
-  const index_t j = mxnet_op::ravel(coord, lshape);
-  const index_t k = mxnet_op::ravel(coord, rshape);
+  const index_t j         = mxnet_op::ravel(coord, lshape);
+  const index_t k         = mxnet_op::ravel(coord, rshape);
   assign(&out[idx], addto, OP::Map(lhs[j], rhs[k]));
 }
 
-template<typename Reducer, int ndim, typename AType, typename DType, typename OType, typename OP,
-         typename IndexOP = mxnet::op::mshadow_op::set_index_no_op<AType, index_t>>
-MSHADOW_XINLINE std::pair<AType, AType> seq_reduce_assign_block(size_t start, size_t len,
-                                              size_t j,
-                                              const DType* __restrict big,
-                                              const Shape<ndim>& rshape,
-                                              const Shape<ndim>& rstride) {
+template <typename Reducer,
+          int ndim,
+          typename AType,
+          typename DType,
+          typename OType,
+          typename OP,
+          typename IndexOP = mxnet::op::mshadow_op::set_index_no_op<AType, index_t>>
+MSHADOW_XINLINE std::pair<AType, AType> seq_reduce_assign_block(size_t start,
+                                                                size_t len,
+                                                                size_t j,
+                                                                const DType* __restrict big,
+                                                                const Shape<ndim>& rshape,
+                                                                const Shape<ndim>& rstride) {
   Shape<ndim> coord;
   AType val, residual;
   Reducer::SetInitValue(val, residual);
   for (size_t k = start; k < start + len; ++k) {
-    coord = mxnet_op::unravel(k, rshape);
+    coord      = mxnet_op::unravel(k, rshape);
     AType temp = OP::Map(big[j + mxnet_op::dot(coord, rstride)]);
     if (IndexOP::do_op)
       IndexOP::Op(&temp, k);
@@ -287,20 +340,30 @@ MSHADOW_XINLINE std::pair<AType, AType> seq_reduce_assign_block(size_t start, si
   return std::make_pair(val, residual);
 }
 
-template<typename Reducer, int ndim, typename AType, typename DType, typename OType,
-         typename OP, typename IndexOP = mxnet::op::mshadow_op::set_index_no_op<AType, index_t>>
-MSHADOW_XINLINE void seq_reduce_assign(const index_t idx, const size_t M, const bool addto,
-                                       const DType* __restrict big, OType *small,
-                                       const Shape<ndim>& bshape, const Shape<ndim>& sshape,
-                                       const Shape<ndim>& rshape, const Shape<ndim>& rstride,
+template <typename Reducer,
+          int ndim,
+          typename AType,
+          typename DType,
+          typename OType,
+          typename OP,
+          typename IndexOP = mxnet::op::mshadow_op::set_index_no_op<AType, index_t>>
+MSHADOW_XINLINE void seq_reduce_assign(const index_t idx,
+                                       const size_t M,
+                                       const bool addto,
+                                       const DType* __restrict big,
+                                       OType* small,
+                                       const Shape<ndim>& bshape,
+                                       const Shape<ndim>& sshape,
+                                       const Shape<ndim>& rshape,
+                                       const Shape<ndim>& rstride,
                                        const bool use_omp = false) {
   Shape<ndim> coord = mxnet_op::unravel(idx, sshape);
-  index_t j = mxnet_op::ravel(coord, bshape);
+  index_t j         = mxnet_op::ravel(coord, bshape);
   AType val, residual;
   Reducer::SetInitValue(val, residual);
   if (!use_omp) {
     for (size_t k = 0; k < M; ++k) {
-      coord = mxnet_op::unravel(k, rshape);
+      coord      = mxnet_op::unravel(k, rshape);
       AType temp = OP::Map(big[j + mxnet_op::dot(coord, rstride)]);
       // argmin/max, set IndexedNum.idx
       if (IndexOP::do_op)
@@ -309,13 +372,16 @@ MSHADOW_XINLINE void seq_reduce_assign(const index_t idx, const size_t M, const
     }
   } else {
     const int thread_count = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
-    auto pairs = std::make_unique<std::pair<AType, AType>[]>(thread_count);
-    #pragma omp parallel for num_threads(thread_count)
+    auto pairs             = std::make_unique<std::pair<AType, AType>[]>(thread_count);
+#pragma omp parallel for num_threads(thread_count)
     for (int i = 0; i < thread_count; ++i) {
-      pairs[i] = seq_reduce_assign_block<Reducer, ndim, AType, DType, OType, OP, IndexOP>
-          (i * (M / thread_count),
+      pairs[i] = seq_reduce_assign_block<Reducer, ndim, AType, DType, OType, OP, IndexOP>(
+          i * (M / thread_count),
           i < (thread_count - 1) ? (M / thread_count) : (M / thread_count) + M % thread_count,
-          j, big, rshape, rstride);
+          j,
+          big,
+          rshape,
+          rstride);
     }
     for (int i = 0; i < thread_count; ++i) {
       Reducer::Merge(val, residual, pairs[i].first, pairs[i].second);
@@ -329,10 +395,9 @@ namespace {
 
 // Returns the stride with which the fastest dimension is moving.
 // Used to detect memory access scatter.
-inline int fastest_stride(const TShape &small, const TShape &big,
-                                   const TShape &big_stride) {
+inline int fastest_stride(const TShape& small, const TShape& big, const TShape& big_stride) {
   const int ndim = small.ndim();
-  for (int i = ndim-1; i >= 0; --i) {
+  for (int i = ndim - 1; i >= 0; --i) {
     if (big[i] != 1) {
       return (small[i] == big[i]) ? 1 : big_stride[i];
     }
@@ -342,50 +407,73 @@ inline int fastest_stride(const TShape &small, const TShape &big,
 
 }  // namespace
 
-template<int ndim, typename DType, typename OP>
-void BinaryBroadcastComputeImpl(Stream<cpu> *s, const OpReqType req,
-                                const TBlob& lhs, const TBlob& rhs, const TBlob& out) {
-  mshadow::Shape<ndim> oshape = out.shape_.get<ndim>();
+template <int ndim, typename DType, typename OP>
+void BinaryBroadcastComputeImpl(Stream<cpu>* s,
+                                const OpReqType req,
+                                const TBlob& lhs,
+                                const TBlob& rhs,
+                                const TBlob& out) {
+  mshadow::Shape<ndim> oshape  = out.shape_.get<ndim>();
   mshadow::Shape<ndim> lstride = mxnet_op::calc_stride(lhs.shape_.get<ndim>());
   mshadow::Shape<ndim> rstride = mxnet_op::calc_stride(rhs.shape_.get<ndim>());
-  mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<ndim, OP>, cpu>::
-  template LaunchEx(s, out.shape_.Size(), req, lstride, rstride, oshape,
-                    lhs.dptr<DType>(), rhs.dptr<DType>(), out.dptr<DType>());
+  mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<ndim, OP>, cpu>::template LaunchEx(
+      s,
+      out.shape_.Size(),
+      req,
+      lstride,
+      rstride,
+      oshape,
+      lhs.dptr<DType>(),
+      rhs.dptr<DType>(),
+      out.dptr<DType>());
 }
 
-template<typename Reducer, int ndim, typename AType, typename DType, typename OType, typename OP,
-         typename IndexOP = mxnet::op::mshadow_op::set_index_no_op<AType, index_t>>
-void seq_reduce_compute(const size_t N, const size_t M, const bool addto,
-                        const DType *big, OType *small, const Shape<ndim> bshape,
-                        const Shape<ndim> sshape, const Shape<ndim> rshape,
+template <typename Reducer,
+          int ndim,
+          typename AType,
+          typename DType,
+          typename OType,
+          typename OP,
+          typename IndexOP = mxnet::op::mshadow_op::set_index_no_op<AType, index_t>>
+void seq_reduce_compute(const size_t N,
+                        const size_t M,
+                        const bool addto,
+                        const DType* big,
+                        OType* small,
+                        const Shape<ndim> bshape,
+                        const Shape<ndim> sshape,
+                        const Shape<ndim> rshape,
                         const Shape<ndim> rstride) {
   const int thread_count = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
   if (N >= thread_count) {
-    #pragma omp parallel for num_threads(thread_count)
+#pragma omp parallel for num_threads(thread_count)
     for (index_t idx = 0; idx < static_cast<index_t>(N); ++idx) {
-      seq_reduce_assign<Reducer, ndim, AType, DType, OType, OP, IndexOP>
-          (idx, M, addto, big, small, bshape, sshape, rshape, rstride, false);
+      seq_reduce_assign<Reducer, ndim, AType, DType, OType, OP, IndexOP>(
+          idx, M, addto, big, small, bshape, sshape, rshape, rstride, false);
     }
   } else {
     for (index_t idx = 0; idx < static_cast<index_t>(N); ++idx) {
-      seq_reduce_assign<Reducer, ndim, AType, DType, OType, OP, IndexOP>
-          (idx, M, addto, big, small, bshape, sshape, rshape, rstride, true);
+      seq_reduce_assign<Reducer, ndim, AType, DType, OType, OP, IndexOP>(
+          idx, M, addto, big, small, bshape, sshape, rshape, rstride, true);
     }
   }
 }
 
 template <typename Reducer, int ndim, typename DType, typename OP>
-void seq_reduce_compute_extra_mem(const size_t N, const size_t M, const bool addto,
-                                  const DType* big, DType* small,
+void seq_reduce_compute_extra_mem(const size_t N,
+                                  const size_t M,
+                                  const bool addto,
+                                  const DType* big,
+                                  DType* small,
                                   const Shape<ndim> bshape,
                                   const Shape<ndim> sshape,
                                   const Shape<ndim> rshape,
                                   const Shape<ndim> rstride,
                                   const index_t* ws_dptr) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t idx = 0; idx < static_cast<index_t>(N); ++idx) {
     Shape<ndim> coord = mxnet_op::unravel(idx, sshape);
-    index_t j = mxnet_op::ravel(coord, bshape);
+    index_t j         = mxnet_op::ravel(coord, bshape);
     DType val, residual;
     Reducer::SetInitValue(val, residual);
     for (size_t k = 0; k < M; ++k) {
@@ -396,68 +484,110 @@ void seq_reduce_compute_extra_mem(const size_t N, const size_t M, const bool add
 }
 
 template <typename Reducer, int ndim, typename DType, typename OP, bool safe_acc = false>
-void Reduce(Stream<cpu>* s, const TBlob& small, const OpReqType req,
-            const Tensor<cpu, 1, char>& workspace, const TBlob& big) {
-  if (req == kNullOp) return;
+void Reduce(Stream<cpu>* s,
+            const TBlob& small,
+            const OpReqType req,
+            const Tensor<cpu, 1, char>& workspace,
+            const TBlob& big) {
+  if (req == kNullOp)
+    return;
   Shape<ndim> rshape, rstride;
   diff(small.shape_.get<ndim>(), big.shape_.get<ndim>(), &rshape, &rstride);
   size_t N = small.shape_.Size(), M = rshape.Size();
   if (!safe_acc) {
-    seq_reduce_compute<Reducer, ndim, DType, DType, DType, OP>(
-      N, M, req == kAddTo, big.dptr<DType>(), small.dptr<DType>(),
-      big.shape_.get<ndim>(), small.shape_.get<ndim>(), rshape, rstride);
+    seq_reduce_compute<Reducer, ndim, DType, DType, DType, OP>(N,
+                                                               M,
+                                                               req == kAddTo,
+                                                               big.dptr<DType>(),
+                                                               small.dptr<DType>(),
+                                                               big.shape_.get<ndim>(),
+                                                               small.shape_.get<ndim>(),
+                                                               rshape,
+                                                               rstride);
   } else {
     MXNET_ACC_TYPE_SWITCH(mshadow::DataType<DType>::kFlag, DataType, AType, {
       typedef typename std::conditional<safe_acc, AType, DataType>::type AccType;
       MSHADOW_TYPE_SWITCH_WITH_BOOL(small.type_flag_, OType, {
         typedef typename std::conditional<safe_acc, OType, DataType>::type OutType;
-        seq_reduce_compute<Reducer, ndim, AccType, DataType, OutType, OP>(
-          N, M, req == kAddTo, big.dptr<DataType>(), small.dptr<OutType>(),
-          big.shape_.get<ndim>(), small.shape_.get<ndim>(), rshape, rstride);
+        seq_reduce_compute<Reducer, ndim, AccType, DataType, OutType, OP>(N,
+                                                                          M,
+                                                                          req == kAddTo,
+                                                                          big.dptr<DataType>(),
+                                                                          small.dptr<OutType>(),
+                                                                          big.shape_.get<ndim>(),
+                                                                          small.shape_.get<ndim>(),
+                                                                          rshape,
+                                                                          rstride);
       });
     });
   }
 }
 
 template <typename Reducer, int ndim, typename DType, typename OP>
-void ReduceBool(Stream<cpu>* s, const TBlob& small, const OpReqType req,
-                const Tensor<cpu, 1, char>& workspace, const TBlob& big) {
-  if (req == kNullOp) return;
+void ReduceBool(Stream<cpu>* s,
+                const TBlob& small,
+                const OpReqType req,
+                const Tensor<cpu, 1, char>& workspace,
+                const TBlob& big) {
+  if (req == kNullOp)
+    return;
   Shape<ndim> rshape, rstride;
   diff(small.shape_.get<ndim>(), big.shape_.get<ndim>(), &rshape, &rstride);
   size_t N = small.shape_.Size(), M = rshape.Size();
-  seq_reduce_compute<Reducer, ndim, bool, DType, bool, OP>(
-    N, M, req == kAddTo, big.dptr<DType>(), small.dptr<bool>(),
-    big.shape_.get<ndim>(), small.shape_.get<ndim>(), rshape, rstride);
+  seq_reduce_compute<Reducer, ndim, bool, DType, bool, OP>(N,
+                                                           M,
+                                                           req == kAddTo,
+                                                           big.dptr<DType>(),
+                                                           small.dptr<bool>(),
+                                                           big.shape_.get<ndim>(),
+                                                           small.shape_.get<ndim>(),
+                                                           rshape,
+                                                           rstride);
 }
 
 template <typename Reducer, int ndim, typename DType, typename OP>
-void ReduceWithExtraMem(Stream<cpu>* s, const TBlob& small, const OpReqType req,
-                        const Tensor<cpu, 1, char>& workspace, const TBlob& big) {
+void ReduceWithExtraMem(Stream<cpu>* s,
+                        const TBlob& small,
+                        const OpReqType req,
+                        const Tensor<cpu, 1, char>& workspace,
+                        const TBlob& big) {
   using namespace mxnet_op;
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   Shape<ndim> rshape, rstride;
   diff(small.shape_.get<ndim>(), big.shape_.get<ndim>(), &rshape, &rstride);
   index_t* ws_dptr = reinterpret_cast<index_t*>(workspace.dptr_);
   size_t N = small.shape_.Size(), M = rshape.Size();
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t k = 0; k < static_cast<index_t>(M); k++) {
     Shape<ndim> coord = mxnet_op::unravel(k, rshape);
-    ws_dptr[k] = mxnet_op::dot(coord, rstride);
+    ws_dptr[k]        = mxnet_op::dot(coord, rstride);
   }
 
-  seq_reduce_compute_extra_mem<Reducer, ndim, DType, OP>(
-    N, M, req == kAddTo, big.dptr<DType>(), small.dptr<DType>(), big.shape_.get<ndim>(),
-    small.shape_.get<ndim>(), rshape, rstride, ws_dptr);
+  seq_reduce_compute_extra_mem<Reducer, ndim, DType, OP>(N,
+                                                         M,
+                                                         req == kAddTo,
+                                                         big.dptr<DType>(),
+                                                         small.dptr<DType>(),
+                                                         big.shape_.get<ndim>(),
+                                                         small.shape_.get<ndim>(),
+                                                         rshape,
+                                                         rstride,
+                                                         ws_dptr);
 }
 
-inline size_t ReduceWorkspaceSize(Stream<cpu> *s, const mxnet::TShape& small, const OpReqType req,
+inline size_t ReduceWorkspaceSize(Stream<cpu>* s,
+                                  const mxnet::TShape& small,
+                                  const OpReqType req,
                                   const mxnet::TShape& big) {
   return 0;
 }
 
-inline size_t ReduceWorkspaceSize(Stream<cpu> *s, const mxnet::TShape& small, const OpReqType req,
-                                  const mxnet::TShape& big, const mxnet::TShape& lhs,
+inline size_t ReduceWorkspaceSize(Stream<cpu>* s,
+                                  const mxnet::TShape& small,
+                                  const OpReqType req,
+                                  const mxnet::TShape& big,
+                                  const mxnet::TShape& lhs,
                                   const mxnet::TShape& rhs) {
   return 0;
 }
@@ -466,13 +596,13 @@ inline size_t ReduceWorkspaceSize(Stream<cpu> *s, const mxnet::TShape& small, co
 
 namespace {
 
-constexpr int warpSize = 32;
+constexpr int warpSize      = 32;
 constexpr int unroll_reduce = 2;
 
 // Returns a/b integer division rounded up
-template<typename Type>
+template <typename Type>
 Type ceil_idiv(const Type a, const Type b) {
-  return (a + b - 1)/b;
+  return (a + b - 1) / b;
 }
 
 uint64_t calc_num_load(const int X, const int Y, const int* strides) {
@@ -481,44 +611,43 @@ uint64_t calc_num_load(const int X, const int Y, const int* strides) {
   // Length of the partial warp i.e. number of threads that are performing loads
   uint64_t len_part_warp = X % warpSize;
 
-  uint64_t num_load_full = (std::min(warpSize, strides[0]) +
-    std::min(warpSize, strides[1]) +
-    std::min(warpSize, strides[2]))*num_full_warp;
+  uint64_t num_load_full = (std::min(warpSize, strides[0]) + std::min(warpSize, strides[1]) +
+                            std::min(warpSize, strides[2])) *
+                           num_full_warp;
 
   uint64_t num_load_part =
-  (std::min(len_part_warp, ceil_idiv<uint64_t>(len_part_warp*strides[0], warpSize)) +
-    std::min(len_part_warp, ceil_idiv<uint64_t>(len_part_warp*strides[1], warpSize)) +
-    std::min(len_part_warp, ceil_idiv<uint64_t>(len_part_warp*strides[2], warpSize)))*
-  (len_part_warp != 0);
+      (std::min(len_part_warp, ceil_idiv<uint64_t>(len_part_warp * strides[0], warpSize)) +
+       std::min(len_part_warp, ceil_idiv<uint64_t>(len_part_warp * strides[1], warpSize)) +
+       std::min(len_part_warp, ceil_idiv<uint64_t>(len_part_warp * strides[2], warpSize))) *
+      (len_part_warp != 0);
 
-  uint64_t num_load = (num_load_full + num_load_part)*(uint64_t)Y;
+  uint64_t num_load = (num_load_full + num_load_part) * (uint64_t)Y;
   return num_load;
 }
 
-inline int diff(const TShape& small, const TShape& big,
-                TShape* dims, TShape* stride) {
+inline int diff(const TShape& small, const TShape& big, TShape* dims, TShape* stride) {
   int ndim = small.ndim();
   int mdim = 0;
-  #pragma unroll
+#pragma unroll
   for (int i = 0; i < ndim; ++i) {
     mdim += small[i] != big[i];
     (*dims)[i] = (*stride)[i] = 1;
   }
 
   index_t s = 1;
-  #pragma unroll
+#pragma unroll
   for (int i = ndim - 1, j = mdim; i >= 0; --i) {
     if (small[i] != big[i]) {
       --j;
       (*stride)[j] = s;
-      (*dims)[j] = big[i];
+      (*dims)[j]   = big[i];
     }
     s *= big[i];
   }
   return mdim;
 }
 
-constexpr int nthread_reduce = 512;
+constexpr int nthread_reduce   = 512;
 constexpr index_t kBaseGridNum = 1024;
 
 }  // namespace
@@ -544,17 +673,21 @@ struct ReduceImplConfig {
   TShape lhs_shape, lhs_stride;
   TShape rhs_shape, rhs_stride;
 
-  inline ReduceImplConfig(const ::mxnet::TShape& small, const ::mxnet::TShape& big,
+  inline ReduceImplConfig(const ::mxnet::TShape& small,
+                          const ::mxnet::TShape& big,
                           const ::mxnet::TShape* lhs,
-                          const ::mxnet::TShape* rhs) :
-    rshape(small.ndim(), 1), rstride(small.ndim(), 1),
-    lhs_shape(small.ndim(), 1), lhs_stride(small.ndim(), 1),
-    rhs_shape(small.ndim(), 1), rhs_stride(small.ndim(), 1) {
+                          const ::mxnet::TShape* rhs)
+      : rshape(small.ndim(), 1),
+        rstride(small.ndim(), 1),
+        lhs_shape(small.ndim(), 1),
+        lhs_stride(small.ndim(), 1),
+        rhs_shape(small.ndim(), 1),
+        rhs_stride(small.ndim(), 1) {
     // The largest reduction type currently is (index_t, double) struct
     // aligned to 16B
     constexpr size_t max_type_size = 2 * sizeof(double);
-    constexpr int maxLoopPerTB = 64;
-    int ndim = small.ndim();
+    constexpr int maxLoopPerTB     = 64;
+    int ndim                       = small.ndim();
 
     diff(small, big, &rshape, &rstride);
     N = small.Size();
@@ -572,14 +705,14 @@ struct ReduceImplConfig {
       multiOp = true;
     }
 
-    workspace_size = 0;
-    kernel_1.shMemSize = 0;
+    workspace_size        = 0;
+    kernel_1.shMemSize    = 0;
     kernel_1.do_transpose = false;
 
     if (M == 1) {
       kernel_1.blockDim.x = nthread_reduce;
-      kernel_1.gridDim.x = std::min(kBaseGridNum,
-          static_cast<index_t>((N + kernel_1.blockDim.x - 1)/kernel_1.blockDim.x));
+      kernel_1.gridDim.x  = std::min(
+          kBaseGridNum, static_cast<index_t>((N + kernel_1.blockDim.x - 1) / kernel_1.blockDim.x));
     } else {
       int reduce_strides[3];
       reduce_strides[0] = fastest_stride(small, big, big);
@@ -588,15 +721,13 @@ struct ReduceImplConfig {
 
       int reduce_strides_transp[3];
       reduce_strides_transp[0] = fastest_stride(small, rshape, rstride);
-      reduce_strides_transp[1] = (multiOp) ?
-        fastest_stride(small, lhs_shape, lhs_stride) : 1;
-      reduce_strides_transp[2] = (multiOp) ?
-        fastest_stride(small, rhs_shape, rhs_stride) : 1;
+      reduce_strides_transp[1] = (multiOp) ? fastest_stride(small, lhs_shape, lhs_stride) : 1;
+      reduce_strides_transp[2] = (multiOp) ? fastest_stride(small, rhs_shape, rhs_stride) : 1;
 
-      uint64_t num_load = calc_num_load(N, M, reduce_strides);
+      uint64_t num_load        = calc_num_load(N, M, reduce_strides);
       uint64_t num_load_transp = calc_num_load(M, N, reduce_strides_transp);
 
-      Mnext = 1;
+      Mnext                 = 1;
       kernel_1.do_transpose = (num_load > num_load_transp);
 
       kernel_1.blockDim.x = 0;
@@ -646,31 +777,32 @@ struct ReduceImplConfig {
 
       if (kernel_1.do_transpose) {
         // Fastest thread ID goes through M
-        kernel_1.gridDim.x = std::min((unsigned int)kBaseGridNum,
-            ceil_idiv<unsigned int>(N, kernel_1.blockDim.y));
+        kernel_1.gridDim.x =
+            std::min((unsigned int)kBaseGridNum, ceil_idiv<unsigned int>(N, kernel_1.blockDim.y));
         kernel_1.gridDim.y = std::min(kBaseGridNum, Mnext);
-        int by = kernel_1.blockDim.y;
+        int by             = kernel_1.blockDim.y;
         if (kernel_1.blockDim.y % warpSize == 0) {
           // Fix shared memory bank conflict
           by++;
         }
-        kernel_1.shMemSize = (kernel_1.blockDim.x > 1) ?
-          kernel_1.blockDim.x*by*max_type_size * 2 : 0;
+        kernel_1.shMemSize =
+            (kernel_1.blockDim.x > 1) ? kernel_1.blockDim.x * by * max_type_size * 2 : 0;
         // Maximum number of times we want TB to loop in M
         // Max size of M-block each TB can handle
-        int maxMblock = kernel_1.blockDim.x*maxLoopPerTB;
-        Mnext = (M + maxMblock - 1) / maxMblock;
+        int maxMblock = kernel_1.blockDim.x * maxLoopPerTB;
+        Mnext         = (M + maxMblock - 1) / maxMblock;
       } else {
         // Fastest thread ID goes through N
-        kernel_1.gridDim.x = std::min((unsigned int)kBaseGridNum,
-            ceil_idiv<unsigned int>(N, kernel_1.blockDim.x));
+        kernel_1.gridDim.x =
+            std::min((unsigned int)kBaseGridNum, ceil_idiv<unsigned int>(N, kernel_1.blockDim.x));
         kernel_1.gridDim.y = std::min(kBaseGridNum, Mnext);
-        kernel_1.shMemSize = (kernel_1.blockDim.y > 1) ?
-          kernel_1.blockDim.x*kernel_1.blockDim.y*max_type_size * 2 : 0;
+        kernel_1.shMemSize = (kernel_1.blockDim.y > 1)
+                                 ? kernel_1.blockDim.x * kernel_1.blockDim.y * max_type_size * 2
+                                 : 0;
         // Maximum number of times we want TB to loop in M
         // Max size of M-block each TB can handle
-        int maxMblock = kernel_1.blockDim.y*maxLoopPerTB;
-        Mnext = (M + maxMblock - 1) / maxMblock;
+        int maxMblock = kernel_1.blockDim.y * maxLoopPerTB;
+        Mnext         = (M + maxMblock - 1) / maxMblock;
       }
 
       if (Mnext > 1) {
@@ -682,41 +814,56 @@ struct ReduceImplConfig {
 
       if (Mnext > 1) {
         kernel_2.blockSize = nthread_reduce;
-        kernel_2.gridSize = std::min(kBaseGridNum,
-            static_cast<index_t>((N + kernel_2.blockSize - 1)/kernel_2.blockSize));
+        kernel_2.gridSize  = std::min(
+            kBaseGridNum, static_cast<index_t>((N + kernel_2.blockSize - 1) / kernel_2.blockSize));
       }
     }
   }
 };
 
-inline size_t ReduceWorkspaceSize(Stream<gpu> *s, const ::mxnet::TShape& small, const OpReqType req,
+inline size_t ReduceWorkspaceSize(Stream<gpu>* s,
+                                  const ::mxnet::TShape& small,
+                                  const OpReqType req,
                                   const ::mxnet::TShape& big) {
-  if (req == kNullOp) return 0;
+  if (req == kNullOp)
+    return 0;
   ReduceImplConfig config(small, big, nullptr, nullptr);
   return config.workspace_size;
 }
 
-inline size_t ReduceWorkspaceSize(Stream<gpu> *s, const ::mxnet::TShape& small, const OpReqType req,
-                                  const ::mxnet::TShape& big, const ::mxnet::TShape& lhs,
+inline size_t ReduceWorkspaceSize(Stream<gpu>* s,
+                                  const ::mxnet::TShape& small,
+                                  const OpReqType req,
+                                  const ::mxnet::TShape& big,
+                                  const ::mxnet::TShape& lhs,
                                   const ::mxnet::TShape& rhs) {
-  if (req == kNullOp) return 0;
+  if (req == kNullOp)
+    return 0;
   ReduceImplConfig config(small, big, &lhs, &rhs);
   return config.workspace_size;
 }
 
 #endif  // MXNET_USE_CUDA
 
-template<typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
-MSHADOW_XINLINE void seq_reduce_assign(const index_t idx, const size_t M, const bool addto,
-                                       const DType* __restrict big, const DType* __restrict lhs,
-                                       const DType* __restrict rhs, DType *small,
-                                       const Shape<ndim>& big_shape, const Shape<ndim>& lhs_shape0,
+template <typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
+MSHADOW_XINLINE void seq_reduce_assign(const index_t idx,
+                                       const size_t M,
+                                       const bool addto,
+                                       const DType* __restrict big,
+                                       const DType* __restrict lhs,
+                                       const DType* __restrict rhs,
+                                       DType* small,
+                                       const Shape<ndim>& big_shape,
+                                       const Shape<ndim>& lhs_shape0,
                                        const Shape<ndim>& rhs_shape0,
-                                       const Shape<ndim>& small_shape, const Shape<ndim>& rshape,
-                                       const Shape<ndim>& lhs_shape, const Shape<ndim>& rhs_shape,
-                                       const Shape<ndim>& rstride, const Shape<ndim>& lhs_stride,
+                                       const Shape<ndim>& small_shape,
+                                       const Shape<ndim>& rshape,
+                                       const Shape<ndim>& lhs_shape,
+                                       const Shape<ndim>& rhs_shape,
+                                       const Shape<ndim>& rstride,
+                                       const Shape<ndim>& lhs_stride,
                                        const Shape<ndim>& rhs_stride) {
-  Shape<ndim> coord = mxnet_op::unravel(idx, small_shape);
+  Shape<ndim> coord      = mxnet_op::unravel(idx, small_shape);
   const index_t idx_big0 = mxnet_op::ravel(coord, big_shape);
   const index_t idx_lhs0 = mxnet_op::ravel(coord, lhs_shape0);
   const index_t idx_rhs0 = mxnet_op::ravel(coord, rhs_shape0);
@@ -724,13 +871,13 @@ MSHADOW_XINLINE void seq_reduce_assign(const index_t idx, const size_t M, const
   Reducer::SetInitValue(val, residual);
   for (size_t k = 0; k < M; ++k) {
     Shape<ndim> coord_big = mxnet_op::unravel(k, rshape);
-    index_t idx_big = idx_big0 + mxnet_op::dot(coord_big, rstride);
+    index_t idx_big       = idx_big0 + mxnet_op::dot(coord_big, rstride);
 
     Shape<ndim> coord_lhs = mxnet_op::unravel(k, lhs_shape);
-    index_t idx_lhs = idx_lhs0 + mxnet_op::dot(coord_lhs, lhs_stride);
+    index_t idx_lhs       = idx_lhs0 + mxnet_op::dot(coord_lhs, lhs_stride);
 
     Shape<ndim> coord_rhs = mxnet_op::unravel(k, rhs_shape);
-    index_t idx_rhs = idx_rhs0 + mxnet_op::dot(coord_rhs, rhs_stride);
+    index_t idx_rhs       = idx_rhs0 + mxnet_op::dot(coord_rhs, rhs_stride);
 
     Reducer::Reduce(val, OP1::Map(big[idx_big], OP2::Map(lhs[idx_lhs], rhs[idx_rhs])), residual);
   }
@@ -738,27 +885,56 @@ MSHADOW_XINLINE void seq_reduce_assign(const index_t idx, const size_t M, const
   assign(&small[idx], addto, val);
 }
 
-template<typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
-void seq_reduce_compute(const size_t N, const size_t M, const bool addto,
-                        const DType *big, const DType *lhs, const DType *rhs, DType *small,
-                        const Shape<ndim> big_shape, const Shape<ndim> small_shape,
-                        const Shape<ndim> rshape, const Shape<ndim> rstride,
-                        const Shape<ndim> lhs_shape, const Shape<ndim> lhs_stride,
-                        const Shape<ndim> rhs_shape, const Shape<ndim> rhs_stride,
-                        const Shape<ndim>& lhs_shape0, const Shape<ndim>& rhs_shape0) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+template <typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
+void seq_reduce_compute(const size_t N,
+                        const size_t M,
+                        const bool addto,
+                        const DType* big,
+                        const DType* lhs,
+                        const DType* rhs,
+                        DType* small,
+                        const Shape<ndim> big_shape,
+                        const Shape<ndim> small_shape,
+                        const Shape<ndim> rshape,
+                        const Shape<ndim> rstride,
+                        const Shape<ndim> lhs_shape,
+                        const Shape<ndim> lhs_stride,
+                        const Shape<ndim> rhs_shape,
+                        const Shape<ndim> rhs_stride,
+                        const Shape<ndim>& lhs_shape0,
+                        const Shape<ndim>& rhs_shape0) {
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t idx = 0; idx < static_cast<index_t>(N); ++idx) {
-    seq_reduce_assign<Reducer, ndim, DType, OP1, OP2>(idx, M, addto, big, lhs, rhs, small,
-      big_shape, lhs_shape0, rhs_shape0, small_shape, rshape, lhs_shape, rhs_shape, rstride,
-      lhs_stride, rhs_stride);
+    seq_reduce_assign<Reducer, ndim, DType, OP1, OP2>(idx,
+                                                      M,
+                                                      addto,
+                                                      big,
+                                                      lhs,
+                                                      rhs,
+                                                      small,
+                                                      big_shape,
+                                                      lhs_shape0,
+                                                      rhs_shape0,
+                                                      small_shape,
+                                                      rshape,
+                                                      lhs_shape,
+                                                      rhs_shape,
+                                                      rstride,
+                                                      lhs_stride,
+                                                      rhs_stride);
   }
 }
 
-template<typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
-void Reduce(Stream<cpu> *s, const TBlob& small, const OpReqType req,
-            const Tensor<cpu, 1, char>& workspace, const TBlob& big, const TBlob& lhs,
+template <typename Reducer, int ndim, typename DType, typename OP1, typename OP2>
+void Reduce(Stream<cpu>* s,
+            const TBlob& small,
+            const OpReqType req,
+            const Tensor<cpu, 1, char>& workspace,
+            const TBlob& big,
+            const TBlob& lhs,
             const TBlob& rhs) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   Shape<ndim> rshape, rstride;
   diff(small.shape_.get<ndim>(), big.shape_.get<ndim>(), &rshape, &rstride);
   size_t N = small.shape_.Size();
@@ -770,14 +946,23 @@ void Reduce(Stream<cpu> *s, const TBlob& small, const OpReqType req,
   Shape<ndim> rhs_shape, rhs_stride;
   diff(small.shape_.get<ndim>(), rhs.shape_.get<ndim>(), &rhs_shape, &rhs_stride);
 
-  seq_reduce_compute<Reducer, ndim, DType, OP1, OP2>(
-    N, M, req == kAddTo,
-    big.dptr<DType>(), lhs.dptr<DType>(), rhs.dptr<DType>(), small.dptr<DType>(),
-    big.shape_.get<ndim>(), small.shape_.get<ndim>(),
-    rshape, rstride,
-    lhs_shape, lhs_stride,
-    rhs_shape, rhs_stride,
-    lhs.shape_.get<ndim>(), rhs.shape_.get<ndim>());
+  seq_reduce_compute<Reducer, ndim, DType, OP1, OP2>(N,
+                                                     M,
+                                                     req == kAddTo,
+                                                     big.dptr<DType>(),
+                                                     lhs.dptr<DType>(),
+                                                     rhs.dptr<DType>(),
+                                                     small.dptr<DType>(),
+                                                     big.shape_.get<ndim>(),
+                                                     small.shape_.get<ndim>(),
+                                                     rshape,
+                                                     rstride,
+                                                     lhs_shape,
+                                                     lhs_stride,
+                                                     rhs_shape,
+                                                     rhs_stride,
+                                                     lhs.shape_.get<ndim>(),
+                                                     rhs.shape_.get<ndim>());
 }
 
 #if MXNET_USE_CUDA
@@ -797,8 +982,8 @@ void RTCReduce(const OpContext& ctx,
                const OpReqType req,
                const Tensor<gpu, 1, char>& workspace,
                const TBlob& big,
-               const TBlob &lhs,
-               const TBlob &rhs,
+               const TBlob& lhs,
+               const TBlob& rhs,
                const std::string& reducer,
                int ndim,
                const std::string& OP1,
diff --git a/src/operator/tensor/broadcast_reduce_minmax_value.cc b/src/operator/tensor/broadcast_reduce_minmax_value.cc
index e77d42b042ae..50f8025d166c 100644
--- a/src/operator/tensor/broadcast_reduce_minmax_value.cc
+++ b/src/operator/tensor/broadcast_reduce_minmax_value.cc
@@ -28,34 +28,34 @@ namespace mxnet {
 namespace op {
 
 MXNET_OPERATOR_REGISTER_MINMAX_REDUCE(max)
-.add_alias("max_axis")
-.describe(get_reduce_axes_description("max", __LINE__))
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::maximum>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_max"});
+    .add_alias("max_axis")
+    .describe(get_reduce_axes_description("max", __LINE__))
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::maximum>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_max"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_max)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::eq>);
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::eq>);
 
 MXNET_OPERATOR_REGISTER_MINMAX_REDUCE(min)
-.add_alias("min_axis")
-.describe(get_reduce_axes_description("min", __LINE__))
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::minimum>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_min"});
+    .add_alias("min_axis")
+    .describe(get_reduce_axes_description("min", __LINE__))
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::minimum>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_min"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_min)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::eq>);
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::eq>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_minmax_value.cu b/src/operator/tensor/broadcast_reduce_minmax_value.cu
index c8cb757cd9a3..e596923290c2 100644
--- a/src/operator/tensor/broadcast_reduce_minmax_value.cu
+++ b/src/operator/tensor/broadcast_reduce_minmax_value.cu
@@ -27,19 +27,21 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(max)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>
-                                     {"identity", "red::maximum{}", false});
+NNVM_REGISTER_OP(max).set_attr<FCompute>("FCompute<gpu>",
+                                         ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
+                                                                                  "red::maximum{}",
+                                                                                  false});
 
 NNVM_REGISTER_OP(_backward_max)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::eq>);
+    .set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::eq>);
 
-NNVM_REGISTER_OP(min)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>
-                                     {"identity", "red::minimum{}", false});
+NNVM_REGISTER_OP(min).set_attr<FCompute>("FCompute<gpu>",
+                                         ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
+                                                                                  "red::minimum{}",
+                                                                                  false});
 
 NNVM_REGISTER_OP(_backward_min)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::eq>);
+    .set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::eq>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_norm_value.cc b/src/operator/tensor/broadcast_reduce_norm_value.cc
index 43a22b2a8314..d3b074c25ed9 100644
--- a/src/operator/tensor/broadcast_reduce_norm_value.cc
+++ b/src/operator/tensor/broadcast_reduce_norm_value.cc
@@ -28,7 +28,7 @@ namespace mxnet {
 namespace op {
 DMLC_REGISTER_PARAMETER(NormParam);
 
-template<>
+template <>
 void L2NormComputeEx<cpu>(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
@@ -37,12 +37,12 @@ void L2NormComputeEx<cpu>(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
-  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
+  const NormParam& param          = nnvm::get<NormParam>(attrs.parsed);
+  mshadow::Stream<cpu>* s         = ctx.get_stream<cpu>();
   const NDArrayStorageType istype = inputs[0].storage_type();
   const mxnet::TShape axis = param.axis.has_value() ? param.axis.value() : mxnet::TShape(0, -1);
   if ((istype == kRowSparseStorage || istype == kCSRStorage) && axis.ndim() == 0 &&
-       param.ord == 2) {
+      param.ord == 2) {
     // l2 norm on the entire array
     L2NormComputeSparseImpl<cpu>(s, inputs[0], req[0], outputs[0].data());
   } else if (istype == kCSRStorage && axis.ndim() == 1 && (axis[0] == 0 || axis[0] == 1) &&
@@ -59,7 +59,7 @@ void L2NormComputeEx<cpu>(const nnvm::NodeAttrs& attrs,
 
 NNVM_REGISTER_OP(norm)
 MXNET_ADD_SPARSE_OP_ALIAS(norm)
-.describe(R"code(Computes the norm on an NDArray.
+    .describe(R"code(Computes the norm on an NDArray.
 
 This operator computes the norm on an NDArray with the specified axis, depending
 on the value of the ord parameter. By default, it computes the L2 norm on the entire
@@ -87,35 +87,34 @@ Examples::
   norm(csr) = [5.47722578]
 
 )code" ADD_FILELINE)
-.add_alias("_npx_norm")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NormParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", NormShape)
-.set_attr<nnvm::FInferType>("FInferType", NormType)
-.set_attr<FInferStorageType>("FInferStorageType", LpNormStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{ "_backward_norm" })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", LpNormCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", L2NormComputeEx<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(NormParam::__FIELDS__());
+    .add_alias("_npx_norm")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NormParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", NormShape)
+    .set_attr<nnvm::FInferType>("FInferType", NormType)
+    .set_attr<FInferStorageType>("FInferStorageType", LpNormStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_norm"})
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", LpNormCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", L2NormComputeEx<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(NormParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_norm)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NormParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", LpNormGradCompute<cpu>);
-
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NormParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", LpNormGradCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_norm_value.cu b/src/operator/tensor/broadcast_reduce_norm_value.cu
index 735c3d7faec9..21af3742197b 100644
--- a/src/operator/tensor/broadcast_reduce_norm_value.cu
+++ b/src/operator/tensor/broadcast_reduce_norm_value.cu
@@ -27,7 +27,7 @@
 namespace mxnet {
 namespace op {
 
-template<>
+template <>
 void L2NormComputeEx<gpu>(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
@@ -36,12 +36,12 @@ void L2NormComputeEx<gpu>(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
-  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  const NormParam& param          = nnvm::get<NormParam>(attrs.parsed);
+  mshadow::Stream<gpu>* s         = ctx.get_stream<gpu>();
   const NDArrayStorageType istype = inputs[0].storage_type();
   const mxnet::TShape axis = param.axis.has_value() ? param.axis.value() : mxnet::TShape(0, -1);
   if ((istype == kRowSparseStorage || istype == kCSRStorage) && axis.ndim() == 0 &&
-       param.ord == 2) {
+      param.ord == 2) {
     // l2 norm on the entire array
     L2NormComputeSparseImpl<gpu>(s, inputs[0], req[0], outputs[0].data());
   } else {
@@ -50,11 +50,10 @@ void L2NormComputeEx<gpu>(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(norm)
-.set_attr<FCompute>("FCompute<gpu>", LpNormCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", L2NormComputeEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", LpNormCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", L2NormComputeEx<gpu>);
 
-NNVM_REGISTER_OP(_backward_norm)
-.set_attr<FCompute>("FCompute<gpu>", LpNormGradCompute<gpu>);
+NNVM_REGISTER_OP(_backward_norm).set_attr<FCompute>("FCompute<gpu>", LpNormGradCompute<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_op.cc b/src/operator/tensor/broadcast_reduce_op.cc
index 483787ec7b0a..20c1a34229d6 100644
--- a/src/operator/tensor/broadcast_reduce_op.cc
+++ b/src/operator/tensor/broadcast_reduce_op.cc
@@ -45,22 +45,21 @@ void ReduceAxesRTCComputeImpl(const OpContext& ctx,
   Stream<gpu>* s = ctx.get_stream<gpu>();
   Tensor<gpu, 1, char> w;
   if (workspace == nullptr) {
-    size_t workspace_size = broadcast::ReduceWorkspaceSize(
-        s, dst_shape, req[0], src_shape);
-    w = ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
+    size_t workspace_size = broadcast::ReduceWorkspaceSize(s, dst_shape, req[0], src_shape);
+    w         = ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
     workspace = &w;
   }
-  const TBlob in_data = inputs[0].reshape(src_shape);
+  const TBlob in_data  = inputs[0].reshape(src_shape);
   const TBlob out_data = outputs[0].reshape(dst_shape);
   BROADCAST_NDIM_SWITCH(dst_shape.ndim(), NDim, {
     broadcast::RTCReduce(ctx, out_data, req[0], *workspace, in_data, reducer, NDim, OP);
   });
   if (normalize) {
     NumpyBinaryScalarParam p{};
-    p.scalar = static_cast<double>(src_shape.Size()/dst_shape.Size() - ddof);
+    p.scalar = static_cast<double>(src_shape.Size() / dst_shape.Size() - ddof);
     NodeAttrs a;
     a.parsed = p;
-    BinaryScalarRTCCompute {"div"}(a, ctx, {out_data}, {kWriteInplace}, {out_data});
+    BinaryScalarRTCCompute{"div"}(a, ctx, {out_data}, {kWriteInplace}, {out_data});  // NOLINT
   }
 }
 
@@ -69,13 +68,15 @@ template <typename Param>
 void PrepareReduce(const Param& param,
                    const std::vector<TBlob>& inputs,
                    const std::vector<TBlob>& outputs,
-                   mxnet::TShape* shape, int* ddof);
+                   mxnet::TShape* shape,
+                   int* ddof);
 
 template <>
 void PrepareReduce<ReduceAxesParam>(const ReduceAxesParam& param,
                                     const std::vector<TBlob>& inputs,
                                     const std::vector<TBlob>& outputs,
-                                    mxnet::TShape* small, int* ddof) {
+                                    mxnet::TShape* small,
+                                    int* ddof) {
   if (param.keepdims) {
     *small = outputs[0].shape_;
   } else {
@@ -89,7 +90,8 @@ template <>
 void PrepareReduce<NumpyReduceAxesNoDTypeParam>(const NumpyReduceAxesNoDTypeParam& param,
                                                 const std::vector<TBlob>& inputs,
                                                 const std::vector<TBlob>& outputs,
-                                                mxnet::TShape* small, int* ddof) {
+                                                mxnet::TShape* small,
+                                                int* ddof) {
   if (param.initial.has_value()) {
     LOG(FATAL) << "initial is not supported yet";
   }
@@ -106,7 +108,8 @@ template <>
 void PrepareReduce<NumpyReduceAxesParam>(const NumpyReduceAxesParam& param,
                                          const std::vector<TBlob>& inputs,
                                          const std::vector<TBlob>& outputs,
-                                         mxnet::TShape* small, int* ddof) {
+                                         mxnet::TShape* small,
+                                         int* ddof) {
   if (param.initial.has_value()) {
     LOG(FATAL) << "initial is not supported yet";
   }
@@ -123,7 +126,8 @@ template <>
 void PrepareReduce<NumpyReduceAxesBoolParam>(const NumpyReduceAxesBoolParam& param,
                                              const std::vector<TBlob>& inputs,
                                              const std::vector<TBlob>& outputs,
-                                             mxnet::TShape* small, int* ddof) {
+                                             mxnet::TShape* small,
+                                             int* ddof) {
   if (param.keepdims) {
     *small = outputs[0].shape_;
   } else {
@@ -141,32 +145,35 @@ void ReduceAxesRTCCompute<Param, init>::operator()(const nnvm::NodeAttrs& attrs,
                                                    const std::vector<TBlob>& inputs,
                                                    const std::vector<OpReqType>& req,
                                                    const std::vector<TBlob>& outputs) {
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   mxnet::TShape small;
   int ddof;
   const auto& param = nnvm::get<Param>(attrs.parsed);
   CHECK_NE(req[0], kWriteInplace) << "Reduce does not support write in-place";
   PrepareReduce(param, inputs, outputs, &small, &ddof);
-  if (outputs[0].shape_.Size() == 0U) return;  // zero-size tensor
+  if (outputs[0].shape_.Size() == 0U)
+    return;  // zero-size tensor
   if (inputs[0].shape_.Size() == 0) {
     if (normalize && mxnet::common::is_float(outputs[0].type_flag_)) {
       LOG(WARNING) << "WARNING: Mean of empty slice.";
-        NumpyBinaryScalarParam p{};
-        p.scalar = std::numeric_limits<float>::quiet_NaN();
-        NodeAttrs a;
-        a.parsed = p;
-        BinaryScalarRTCCompute {"right"} (a, ctx, outputs, {kWriteTo}, outputs);
+      NumpyBinaryScalarParam p{};
+      p.scalar = std::numeric_limits<float>::quiet_NaN();
+      NodeAttrs a;
+      a.parsed = p;
+      BinaryScalarRTCCompute{"right"}(a, ctx, outputs, {kWriteTo}, outputs);  // NOLINT
     } else {
       if (normalize) {
-        LOG(WARNING) << "WARNING: nan is outside the range of"<<
-                        "representable values of type 'int'";
+        LOG(WARNING) << "WARNING: nan is outside the range of"
+                     << "representable values of type 'int'";
       }
-      if (init == 0 && req[0] == kAddTo) return;
+      if (init == 0 && req[0] == kAddTo)
+        return;
       NumpyBinaryScalarParam p{};
       p.scalar = init;
       NodeAttrs a;
       a.parsed = p;
-      BinaryScalarRTCCompute {"right"} (a, ctx, outputs, {req[0]}, outputs);
+      BinaryScalarRTCCompute{"right"}(a, ctx, outputs, {req[0]}, outputs);  // NOLINT
     }
     return;
   }
diff --git a/src/operator/tensor/broadcast_reduce_op.h b/src/operator/tensor/broadcast_reduce_op.h
index 7baf25552f7f..29e8f3382aba 100644
--- a/src/operator/tensor/broadcast_reduce_op.h
+++ b/src/operator/tensor/broadcast_reduce_op.h
@@ -43,8 +43,9 @@ struct ReduceAxesParam : public dmlc::Parameter<ReduceAxesParam> {
   bool keepdims;
   bool exclude;
   DMLC_DECLARE_PARAMETER(ReduceAxesParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<mxnet::TShape>())
-      .describe(R"code(The axis or axes along which to perform the reduction.
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe(R"code(The axis or axes along which to perform the reduction.
 
       The default, `axis=()`, will compute over all elements into a
       scalar array with shape `(1,)`.
@@ -58,11 +59,11 @@ struct ReduceAxesParam : public dmlc::Parameter<ReduceAxesParam> {
       NOT in axis instead.
 
       Negative values means indexing from right to left.)code");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axes are left "
-                "in the result as dimension with size one.");
-    DMLC_DECLARE_FIELD(exclude).set_default(false)
-      .describe("Whether to perform reduction on axis that are NOT in axis instead.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axes are left "
+        "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(exclude).set_default(false).describe(
+        "Whether to perform reduction on axis that are NOT in axis instead.");
   }
 };
 
@@ -72,27 +73,28 @@ struct NormParam : public dmlc::Parameter<NormParam> {
   dmlc::optional<int> out_dtype;
   bool keepdims;
   DMLC_DECLARE_PARAMETER(NormParam) {
-    DMLC_DECLARE_FIELD(ord).set_default(2)
-      .describe("Order of the norm. Currently ord=1 and ord=2 is supported.");
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<mxnet::TShape>())
-      .describe(R"code(The axis or axes along which to perform the reduction.
+    DMLC_DECLARE_FIELD(ord).set_default(2).describe(
+        "Order of the norm. Currently ord=1 and ord=2 is supported.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe(R"code(The axis or axes along which to perform the reduction.
       The default, `axis=()`, will compute over all elements into a
       scalar array with shape `(1,)`.
       If `axis` is int, a reduction is performed on a particular axis.
       If `axis` is a 2-tuple, it specifies the axes that hold 2-D matrices,
       and the matrix norms of these matrices are computed.)code");
     DMLC_DECLARE_FIELD(out_dtype)
-      .add_enum("float16", mshadow::kFloat16)
-      .add_enum("float32", mshadow::kFloat32)
-      .add_enum("float64", mshadow::kFloat64)
-      .add_enum("int64", mshadow::kInt64)
-      .add_enum("int32", mshadow::kInt32)
-      .add_enum("int8", mshadow::kInt8)
-      .set_default(dmlc::optional<int>())
-      .describe(R"code(The data type of the output.)code");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axis is left "
-                "in the result as dimension with size one.");
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .add_enum("int64", mshadow::kInt64)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int8", mshadow::kInt8)
+        .set_default(dmlc::optional<int>())
+        .describe(R"code(The data type of the output.)code");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axis is left "
+        "in the result as dimension with size one.");
   }
 };
 
@@ -100,47 +102,52 @@ struct ReduceAxisParam : public dmlc::Parameter<ReduceAxisParam> {
   dmlc::optional<int> axis;
   bool keepdims;
   DMLC_DECLARE_PARAMETER(ReduceAxisParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<int>())
-      .describe("The axis along which to perform the reduction. "
-                "Negative values means indexing from right to left. "
-                "``Requires axis to be set as int, because global reduction "
-                "is not supported yet.``");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If this is set to `True`, the reduced axis is left "
-                "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "The axis along which to perform the reduction. "
+            "Negative values means indexing from right to left. "
+            "``Requires axis to be set as int, because global reduction "
+            "is not supported yet.``");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If this is set to `True`, the reduced axis is left "
+        "in the result as dimension with size one.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, keepdims_s;
     axis_s << axis;
     keepdims_s << keepdims;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]     = axis_s.str();
     (*dict)["keepdims"] = keepdims_s.str();
   }
 };
 
-enum PickOpMode {kWrap, kClip};
+enum PickOpMode { kWrap, kClip };
 
 struct PickParam : public dmlc::Parameter<PickParam> {
   dmlc::optional<int> axis;
   int mode;
   bool keepdims;
   DMLC_DECLARE_PARAMETER(PickParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<int>(-1))
-      .describe("int or None. The axis to picking the elements. "
-                "Negative values means indexing from right to left. "
-                "If is `None`, the elements in the index w.r.t the "
-                "flattened input will be picked.");
-    DMLC_DECLARE_FIELD(keepdims).set_default(false)
-      .describe("If true, the axis where we pick the elements is left "
-                "in the result as dimension with size one.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<int>(-1))
+        .describe(
+            "int or None. The axis to picking the elements. "
+            "Negative values means indexing from right to left. "
+            "If is `None`, the elements in the index w.r.t the "
+            "flattened input will be picked.");
+    DMLC_DECLARE_FIELD(keepdims).set_default(false).describe(
+        "If true, the axis where we pick the elements is left "
+        "in the result as dimension with size one.");
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("wrap", kWrap)
-    .add_enum("clip", kClip)
-    .set_default(kClip)
-    .describe("Specify how out-of-bound indices behave. Default is \"clip\"."
-              " \"clip\" means clip to the range. So, if all indices mentioned are too large,"
-              " they are replaced by the index that addresses the last element along an axis. "
-              " \"wrap\" means to wrap around.");
+        .add_enum("wrap", kWrap)
+        .add_enum("clip", kClip)
+        .set_default(kClip)
+        .describe(
+            "Specify how out-of-bound indices behave. Default is \"clip\"."
+            " \"clip\" means clip to the range. So, if all indices mentioned are too large,"
+            " they are replaced by the index that addresses the last element along an axis. "
+            " \"wrap\" means to wrap around.");
   }
   std::string PickMode2String(int mode) {
     switch (mode) {
@@ -159,8 +166,8 @@ struct PickParam : public dmlc::Parameter<PickParam> {
     axis_s << axis;
     mode_s << mode;
     keepdims_s << keepdims;
-    (*dict)["axis"] = axis_s.str();
-    (*dict)["mode"] = PickMode2String(mode);
+    (*dict)["axis"]     = axis_s.str();
+    (*dict)["mode"]     = PickMode2String(mode);
     (*dict)["keepdims"] = keepdims_s.str();
   }
 };
@@ -169,21 +176,25 @@ struct BroadcastAxesParam : public dmlc::Parameter<BroadcastAxesParam> {
   mxnet::TShape axis;
   mxnet::TShape size;
   DMLC_DECLARE_PARAMETER(BroadcastAxesParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(mxnet::TShape(0, -1))
-      .describe("The axes to perform the broadcasting.");
-    DMLC_DECLARE_FIELD(size).set_default(mxnet::TShape(0, -1))
-      .describe("Target sizes of the broadcasting axes.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("The axes to perform the broadcasting.");
+    DMLC_DECLARE_FIELD(size)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Target sizes of the broadcasting axes.");
   }
 };
 
 struct BroadcastToParam : public dmlc::Parameter<BroadcastToParam> {
   mxnet::TShape shape;
   DMLC_DECLARE_PARAMETER(BroadcastToParam) {
-    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape(0, -1))
-      .describe("The shape of the desired array."
-                " We can set the dim to zero if it's same as the original."
-                " E.g `A = broadcast_to(B, shape=(10, 0, 0))` "
-                "has the same meaning as `A = broadcast_axis(B, axis=0, size=10)`.");
+    DMLC_DECLARE_FIELD(shape)
+        .set_default(mxnet::TShape(0, -1))
+        .describe(
+            "The shape of the desired array."
+            " We can set the dim to zero if it's same as the original."
+            " E.g `A = broadcast_to(B, shape=(10, 0, 0))` "
+            "has the same meaning as `A = broadcast_axis(B, axis=0, size=10)`.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream shape_s;
@@ -196,10 +207,12 @@ struct BroadcastLikeParam : public dmlc::Parameter<BroadcastLikeParam> {
   dmlc::optional<mxnet::TShape> lhs_axes;
   dmlc::optional<mxnet::TShape> rhs_axes;
   DMLC_DECLARE_PARAMETER(BroadcastLikeParam) {
-    DMLC_DECLARE_FIELD(lhs_axes).set_default(dmlc::optional<mxnet::TShape>())
-      .describe("Axes to perform broadcast on in the first input array");
-    DMLC_DECLARE_FIELD(rhs_axes).set_default(dmlc::optional<mxnet::TShape>())
-      .describe("Axes to copy from the second input array");
+    DMLC_DECLARE_FIELD(lhs_axes)
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe("Axes to perform broadcast on in the first input array");
+    DMLC_DECLARE_FIELD(rhs_axes)
+        .set_default(dmlc::optional<mxnet::TShape>())
+        .describe("Axes to copy from the second input array");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream lhs_axes_s, rhs_axes_s;
@@ -223,8 +236,7 @@ struct BroadcastLikeParam : public dmlc::Parameter<BroadcastLikeParam> {
  */
 inline int CheckAxis(const int axis, const int ndim) {
   if (ndim == 0) {
-    CHECK(axis == 0 || axis == -1) << "axis " << axis
-                                   << " is out of bounds for 0-dimension tensor";
+    CHECK(axis == 0 || axis == -1) << "axis " << axis << " is out of bounds for 0-dimension tensor";
     return 0;
   } else {
     CHECK(axis < ndim && axis >= -ndim)
@@ -233,14 +245,16 @@ inline int CheckAxis(const int axis, const int ndim) {
   }
 }
 
-inline mxnet::TShape AxisShapeCompact(mxnet::TShape shape, int *axis, bool allow_2d) {
-  int ndim = shape.ndim();
+inline mxnet::TShape AxisShapeCompact(mxnet::TShape shape, int* axis, bool allow_2d) {
+  int ndim        = shape.ndim();
   index_t leading = 1, trailing = 1, M = 1;
   if (shape.ndim() > *axis) {
     M = shape[*axis];
   }
-  for (int i = 0; i < *axis; ++i) leading *= shape[i];
-  for (int i = *axis + 1; i < ndim; ++i) trailing *= shape[i];
+  for (int i = 0; i < *axis; ++i)
+    leading *= shape[i];
+  for (int i = *axis + 1; i < ndim; ++i)
+    trailing *= shape[i];
   if (allow_2d && trailing == 1) {
     *axis = 1;
     return mshadow::Shape2(leading, M);
@@ -266,35 +280,37 @@ inline mxnet::TShape ReduceAxisShapeImpl(const mxnet::TShape& ishape,
   int new_axis = CheckAxis(axis.value(), ishape.ndim());
   if (keepdims) {
     mxnet::TShape oshape = ishape;
-    oshape[new_axis] = 1;
+    oshape[new_axis]     = 1;
     return oshape;
   }
 
   mxnet::TShape oshape(ishape.ndim() - 1, 1);
-  for (int i = 0; i < new_axis; ++i) oshape[i] = ishape[i];
-  for (int i = new_axis+1; i < static_cast<int>(ishape.ndim()); ++i) {
-    oshape[i-1] = ishape[i];
+  for (int i = 0; i < new_axis; ++i)
+    oshape[i] = ishape[i];
+  for (int i = new_axis + 1; i < static_cast<int>(ishape.ndim()); ++i) {
+    oshape[i - 1] = ishape[i];
   }
   return oshape;
 }
 
 inline bool ReduceAxisShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!shape_is_known(ishape)) return false;
+  if (!shape_is_known(ishape))
+    return false;
 
   const ReduceAxisParam& param = nnvm::get<ReduceAxisParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     ReduceAxisShapeImpl(ishape, param.axis, param.keepdims));
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, ReduceAxisShapeImpl(ishape, param.axis, param.keepdims));
   return true;
 }
 
 inline mxnet::TShape ReduceAxesShapeImpl(const mxnet::TShape& ishape,
                                          const dmlc::optional<mxnet::TShape>& axis,
-                                         bool keepdims, bool exclude) {
+                                         bool keepdims,
+                                         bool exclude) {
   // if axis doesn't have value, treat it same mxnet::TShape(0).
   if (!axis.has_value() || axis.value().ndim() == 0) {
     if (keepdims) {
@@ -313,16 +329,12 @@ inline mxnet::TShape ReduceAxesShapeImpl(const mxnet::TShape& ishape,
   std::sort(axes.begin(), axes.end());
 
   for (index_t i = 1; i < axes.ndim(); i++) {
-    CHECK_LT(axes[i-1], axes[i])
-      << "Reduction axes have duplicates "
-      << axes;
+    CHECK_LT(axes[i - 1], axes[i]) << "Reduction axes have duplicates " << axes;
   }
-  CHECK_LT(axes[axes.ndim()-1], ishape.ndim())
-    << "Reduction axis " << axes[axes.ndim()-1]
-    << " Exceeds input dimensions " << ishape;
-  CHECK_GE(axes[0], 0)
-    << "Reduction axis " << axis.value()
-    << " Exceeds input dimensions " << ishape;
+  CHECK_LT(axes[axes.ndim() - 1], ishape.ndim())
+      << "Reduction axis " << axes[axes.ndim() - 1] << " Exceeds input dimensions " << ishape;
+  CHECK_GE(axes[0], 0) << "Reduction axis " << axis.value() << " Exceeds input dimensions "
+                       << ishape;
 
   mxnet::TShape oshape;
   if (keepdims) {
@@ -362,44 +374,45 @@ inline mxnet::TShape ReduceAxesShapeImpl(const mxnet::TShape& ishape,
 }
 
 inline bool ReduceAxesShape(const nnvm::NodeAttrs& attrs,
-                            mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                            mxnet::ShapeVector* in_attrs,
+                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  if (!ndim_is_known((*in_attrs)[0])) return false;
+  if (!ndim_is_known((*in_attrs)[0]))
+    return false;
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     ReduceAxesShapeImpl((*in_attrs)[0], param.axis,
-                                         param.keepdims, param.exclude));
+  SHAPE_ASSIGN_CHECK(
+      *out_attrs,
+      0,
+      ReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims, param.exclude));
   return shape_is_known((*out_attrs)[0]);
 }
 
 inline bool ReduceMinMaxAxesShape(const nnvm::NodeAttrs& attrs,
-                                  mxnet::ShapeVector *in_attrs,
-                                  mxnet::ShapeVector *out_attrs) {
+                                  mxnet::ShapeVector* in_attrs,
+                                  mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  if (!shape_is_known((*in_attrs)[0])) return false;
-  CHECK_GT((*in_attrs)[0].Size(), 0U)
-    << "Reduction input's size should > 0 "
-    << (*in_attrs)[0];
+  if (!shape_is_known((*in_attrs)[0]))
+    return false;
+  CHECK_GT((*in_attrs)[0].Size(), 0U) << "Reduction input's size should > 0 " << (*in_attrs)[0];
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     ReduceAxesShapeImpl((*in_attrs)[0], param.axis,
-                                         param.keepdims, param.exclude));
+  SHAPE_ASSIGN_CHECK(
+      *out_attrs,
+      0,
+      ReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims, param.exclude));
   return true;
 }
 
-
 inline bool NormType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_attrs,
-                     std::vector<int> *out_attrs) {
+                     std::vector<int>* in_attrs,
+                     std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
   if (param.out_dtype.has_value()) {
     CHECK_NE(in_attrs->at(0), -1)
-      << "input data type should be specified when out_dtype is not null";
+        << "input data type should be specified when out_dtype is not null";
     TYPE_ASSIGN_CHECK(*out_attrs, 0, param.out_dtype.value());
   } else {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, (*in_attrs)[0]);
@@ -409,28 +422,29 @@ inline bool NormType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool NormShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector *in_attrs,
-                      mxnet::ShapeVector *out_attrs) {
+                      mxnet::ShapeVector* in_attrs,
+                      mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  if (!shape_is_known((*in_attrs)[0])) return false;
+  if (!shape_is_known((*in_attrs)[0]))
+    return false;
   const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0,
-                     ReduceAxesShapeImpl((*in_attrs)[0], param.axis,
-                                         param.keepdims, false));
+  SHAPE_ASSIGN_CHECK(
+      *out_attrs, 0, ReduceAxesShapeImpl((*in_attrs)[0], param.axis, param.keepdims, false));
   return true;
 }
 
 inline bool BroadcastAxesShape(const nnvm::NodeAttrs& attrs,
-                               mxnet::ShapeVector *in_attrs,
-                               mxnet::ShapeVector *out_attrs) {
+                               mxnet::ShapeVector* in_attrs,
+                               mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  if (!shape_is_known((*in_attrs)[0])) return false;
+  if (!shape_is_known((*in_attrs)[0]))
+    return false;
   const BroadcastAxesParam& param = nnvm::get<BroadcastAxesParam>(attrs.parsed);
-  CHECK_EQ(param.axis.ndim() , param.size.ndim());
-  mxnet::TShape &ishape = (*in_attrs)[0];
-  mxnet::TShape oshape = ishape;
+  CHECK_EQ(param.axis.ndim(), param.size.ndim());
+  mxnet::TShape& ishape = (*in_attrs)[0];
+  mxnet::TShape oshape  = ishape;
   for (int i = 0; i < param.axis.ndim(); ++i) {
     CHECK_EQ(oshape[param.axis[i]], 1U) << "Broadcasting axis must have size 1";
     oshape[param.axis[i]] = param.size[i];
@@ -440,20 +454,21 @@ inline bool BroadcastAxesShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool BroadcastToShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!mxnet::ndim_is_known(ishape)) return false;
+  if (!mxnet::ndim_is_known(ishape))
+    return false;
   const BroadcastToParam& param = nnvm::get<BroadcastToParam>(attrs.parsed);
   CHECK_EQ(ishape.ndim(), param.shape.ndim())
-    << "Operand of shape " << ishape << " cannot be broadcasted to " << param.shape;
+      << "Operand of shape " << ishape << " cannot be broadcasted to " << param.shape;
   mxnet::TShape oshape = param.shape;
   for (int i = 0; i < ishape.ndim(); ++i) {
     if (oshape[i] != 0) {
       CHECK(ishape[i] == oshape[i] || ishape[i] == 1)
-        << "Array cannot be broadcasted from " << ishape << " to " << param.shape;
+          << "Array cannot be broadcasted from " << ishape << " to " << param.shape;
     } else {
       oshape[i] = ishape[i];
     }
@@ -463,8 +478,8 @@ inline bool BroadcastToShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool BroadcastLikeShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                            mxnet::ShapeVector *out_attrs) {
+                               mxnet::ShapeVector* in_attrs,
+                               mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& lhs_shape = (*in_attrs)[0];
@@ -480,13 +495,13 @@ inline bool BroadcastLikeShape(const nnvm::NodeAttrs& attrs,
   // lhs or rhs or both params were not specified
   if (!param.lhs_axes.has_value() || !param.rhs_axes.has_value()) {
     CHECK_EQ(lhs_shape.ndim(), rhs_shape.ndim())
-      << "Operand of shape " << lhs_shape << " cannot be broadcasted to " << rhs_shape;
+        << "Operand of shape " << lhs_shape << " cannot be broadcasted to " << rhs_shape;
 
     oshape = mxnet::TShape(rhs_shape);
     for (int i = 0; i < lhs_shape.ndim(); ++i) {
       if (rhs_shape[i] != -1) {
         CHECK(lhs_shape[i] == rhs_shape[i] || lhs_shape[i] == 1)
-          << "Array cannot be broadcasted from " << lhs_shape << " to " << rhs_shape;
+            << "Array cannot be broadcasted from " << lhs_shape << " to " << rhs_shape;
       } else {
         oshape[i] = lhs_shape[i];
       }
@@ -495,30 +510,28 @@ inline bool BroadcastLikeShape(const nnvm::NodeAttrs& attrs,
     auto lhs_axes = param.lhs_axes.value();
     auto rhs_axes = param.rhs_axes.value();
 
-    CHECK(rhs_axes.ndim() == lhs_axes.ndim())
-      << "Input_axis and other_axis size does not match";
+    CHECK(rhs_axes.ndim() == lhs_axes.ndim()) << "Input_axis and other_axis size does not match";
 
-    CHECK(lhs_axes.ndim() > 0)
-      << "Empty axes tuple is not allowed";
+    CHECK(lhs_axes.ndim() > 0) << "Empty axes tuple is not allowed";
 
     oshape = mxnet::TShape(lhs_shape);
     for (int i = 0; i < lhs_axes.ndim(); ++i) {
       auto copyfrom = lhs_axes[i];
       if (copyfrom < 0) {
-        copyfrom =  lhs_shape.ndim() + copyfrom;
+        copyfrom = lhs_shape.ndim() + copyfrom;
       }
       CHECK(copyfrom >= 0 && copyfrom < oshape.ndim())
-        << "Invalid dimension specified in lhs_axes: " << lhs_axes[i];
+          << "Invalid dimension specified in lhs_axes: " << lhs_axes[i];
 
       auto copyto = rhs_axes[i];
       if (copyto < 0) {
-        copyto =  rhs_shape.ndim() + copyto;
+        copyto = rhs_shape.ndim() + copyto;
       }
       CHECK(copyto >= 0 && copyto < rhs_shape.ndim())
-        << "Invalid dimension specified in rhs_axes: " << rhs_axes[i];
+          << "Invalid dimension specified in rhs_axes: " << rhs_axes[i];
 
-      CHECK(lhs_shape[copyfrom] == 1) << "Input axis " << lhs_axes[i]
-        << " at dimension " << i << " cannot be broadcasted to " << rhs_shape[copyto];
+      CHECK(lhs_shape[copyfrom] == 1) << "Input axis " << lhs_axes[i] << " at dimension " << i
+                                      << " cannot be broadcasted to " << rhs_shape[copyto];
       oshape[copyfrom] = rhs_shape[copyto];
     }
   }
@@ -527,12 +540,14 @@ inline bool BroadcastLikeShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-inline void BroadcastReduceShapeCompact(const mxnet::TShape& big, const mxnet::TShape& small,
-                                        mxnet::TShape *new_big, mxnet::TShape *new_small) {
+inline void BroadcastReduceShapeCompact(const mxnet::TShape& big,
+                                        const mxnet::TShape& small,
+                                        mxnet::TShape* new_big,
+                                        mxnet::TShape* new_small) {
   const int idim = std::max(big.ndim(), MXNET_SPECIAL_MAX_NDIM);
-  *new_big = mxnet::TShape(idim, 1);
-  *new_small = mxnet::TShape(idim, 1);
-  index_t j = 0;
+  *new_big       = mxnet::TShape(idim, 1);
+  *new_small     = mxnet::TShape(idim, 1);
+  index_t j      = 0;
   if (small.Size() == 1) {
     (*new_big)[j++] = big.Size();
   } else {
@@ -540,9 +555,10 @@ inline void BroadcastReduceShapeCompact(const mxnet::TShape& big, const mxnet::T
     for (index_t i = 0, k = 0; i < big.ndim(); ++i) {
       bool red_axis = big[i] != small[i];
       if ((red_axis && sprod > 1) || (!red_axis && bprod != sprod)) {
-        (*new_big)[j] = bprod;
+        (*new_big)[j]   = bprod;
         (*new_small)[j] = sprod;
-        bprod = sprod = 1; ++j;
+        bprod = sprod = 1;
+        ++j;
       }
       bprod *= big[i];
       if (red_axis) {
@@ -552,13 +568,13 @@ inline void BroadcastReduceShapeCompact(const mxnet::TShape& big, const mxnet::T
       }
     }
     if (bprod > 1 || sprod > 1) {
-      (*new_big)[j] = bprod;
+      (*new_big)[j]   = bprod;
       (*new_small)[j] = sprod;
       ++j;
     }
   }
   if (j <= MXNET_SPECIAL_MAX_NDIM) {
-    const int ndim = (j <= 2? 2 : MXNET_SPECIAL_MAX_NDIM);
+    const int ndim = (j <= 2 ? 2 : MXNET_SPECIAL_MAX_NDIM);
     new_small->assign(new_small->begin(), new_small->begin() + ndim);
     new_big->assign(new_big->begin(), new_big->begin() + ndim);
   } else {
@@ -575,8 +591,8 @@ inline bool ReduceAxesOpForwardStorage(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
-  const int in_stype = in_attrs->at(0);
-  int& out_stype = out_attrs->at(0);
+  const int in_stype           = in_attrs->at(0);
+  int& out_stype               = out_attrs->at(0);
   // sum and reduce only supports for CPU for now.
   const bool invalid_ctx = dev_mask != mshadow::cpu::kDevMask;
   const auto dispatch_ex =
@@ -585,16 +601,15 @@ inline bool ReduceAxesOpForwardStorage(const nnvm::NodeAttrs& attrs,
   if (!dispatched && in_stype == kDefaultStorage) {
     // When input is dense output storage is set as dense and dispatched to
     // dense operator
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                     DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   mxnet::TShape axis = param.axis.has_value() ? param.axis.value() : mxnet::TShape();
   if (!dispatched && in_stype == kCSRStorage && axis.ndim() == 1 &&
       (axis[0] == 0 || axis[0] == 1) && !param.keepdims && !param.exclude) {
     // If input is csr and axis is 0 or 1, and neither of keepdims or exclude
     // are set, dipsatch to sparse operator and output storage is set as dense
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                     dispatch_ex);
+    dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, dispatch_ex);
   }
 
   if (!dispatched) {
@@ -605,7 +620,7 @@ inline bool ReduceAxesOpForwardStorage(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-template<typename xpu, typename reducer>
+template <typename xpu, typename reducer>
 void SearchAxisCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -614,9 +629,9 @@ void SearchAxisCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const ReduceAxisParam& param = nnvm::get<ReduceAxisParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  int axis = inputs[0].ndim();
-  TBlob input = inputs[0];
+  Stream<xpu>* s               = ctx.get_stream<xpu>();
+  int axis                     = inputs[0].ndim();
+  TBlob input                  = inputs[0];
   if (param.axis.has_value()) {
     axis = param.axis.value();
   } else {
@@ -624,8 +639,8 @@ void SearchAxisCompute(const nnvm::NodeAttrs& attrs,
     // and search on axis = 1.
     mxnet::TShape shape_2d(2, 1);
     shape_2d[1] = input.shape_.Size();
-    input = TBlob(input.dptr_, shape_2d, input.dev_mask(), input.type_flag_, input.dev_id());
-    axis = 1;
+    input       = TBlob(input.dptr_, shape_2d, input.dev_mask(), input.type_flag_, input.dev_id());
+    axis        = 1;
   }
 
   axis = CheckAxis(axis, input.shape_.ndim());
@@ -633,65 +648,71 @@ void SearchAxisCompute(const nnvm::NodeAttrs& attrs,
     if (param.axis.has_value()) {
       // cannot do argmax in an empty dimension
       CHECK_NE(inputs[0].shape_[axis], 0)
-          << "searching input tensor of shape " << inputs[0].shape_
-          << " along axis = " << axis << " of zero dim-size is not allowed";
+          << "searching input tensor of shape " << inputs[0].shape_ << " along axis = " << axis
+          << " of zero dim-size is not allowed";
     } else {
       // cannot do argmax on an empty array
       CHECK_NE(inputs[0].shape_.Size(), 0U) << "attempt to search an empty sequence";
     }
   }
-  if (input.shape_.Size() == 0U) return;  // zero-size tensor
+  if (input.shape_.Size() == 0U)
+    return;  // zero-size tensor
   mxnet::TShape shape = AxisShapeCompact(input.shape_, &axis, false);
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
-    Tensor<xpu, 2, DType> out = outputs[0].get_with_shape<xpu, 2, DType>(
-      Shape2(shape[0], shape[2]), s);
-    Tensor<xpu, 3, DType> in = input.get_with_shape<xpu, 3, DType>(
-      shape.get<3>(), s);
+    Tensor<xpu, 2, DType> out =
+        outputs[0].get_with_shape<xpu, 2, DType>(Shape2(shape[0], shape[2]), s);
+    Tensor<xpu, 3, DType> in = input.get_with_shape<xpu, 3, DType>(shape.get<3>(), s);
     CHECK(req[0] != kAddTo) << "AddTo is not supported";
     ASSIGN_DISPATCH(out, req[0], (reduce_with_axis<reducer, true>(in, 1)));
   });
 }
 
-template<typename xpu, typename reducer, bool safe_acc, bool normalize = false,
-         typename OP = op::mshadow_op::identity>
+template <typename xpu,
+          typename reducer,
+          bool safe_acc,
+          bool normalize = false,
+          typename OP    = op::mshadow_op::identity>
 void ReduceAxesComputeImpl(const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs,
                            const mxnet::TShape& small,
                            const mshadow::Tensor<xpu, 1, char>* workspace = nullptr,
-                           const int ddof = 0) {
+                           const int ddof                                 = 0) {
   using namespace mshadow;
   using namespace mshadow::expr;
 
   mxnet::TShape src_shape, dst_shape;
   BroadcastReduceShapeCompact(inputs[0].shape_, small, &src_shape, &dst_shape);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
-      const TBlob in_data = inputs[0].reshape(src_shape);
+      const TBlob in_data  = inputs[0].reshape(src_shape);
       const TBlob out_data = outputs[0].reshape(dst_shape);
       BROADCAST_NDIM_SWITCH(dst_shape.ndim(), NDim, {
         Tensor<xpu, 1, char> w;
         if (workspace == nullptr) {
-          size_t workspace_size = broadcast::ReduceWorkspaceSize(
-              s, out_data.shape_, req[0], in_data.shape_);
-          w = ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+          size_t workspace_size =
+              broadcast::ReduceWorkspaceSize(s, out_data.shape_, req[0], in_data.shape_);
+          w         = ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
           workspace = &w;
         }
         broadcast::Reduce<reducer, NDim, DType, OP, safe_acc>(
             s, out_data, req[0], *workspace, in_data);
         if (normalize) {
           auto out = out_data.FlatTo2D<xpu, OType>(s);
-          out /= scalar<OType>(src_shape.Size()/dst_shape.Size() - ddof);
+          out /= scalar<OType>(src_shape.Size() / dst_shape.Size() - ddof);
         }
       });
     });
   });
 }
 
-template<typename xpu, typename reducer, bool safe_acc, bool normalize = false,
-         typename OP = op::mshadow_op::NonZero>
+template <typename xpu,
+          typename reducer,
+          bool safe_acc,
+          bool normalize = false,
+          typename OP    = op::mshadow_op::NonZero>
 void ReduceAxesComputeBoolImpl(const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
@@ -702,29 +723,30 @@ void ReduceAxesComputeBoolImpl(const OpContext& ctx,
 
   mxnet::TShape src_shape, dst_shape;
   BroadcastReduceShapeCompact(inputs[0].shape_, small, &src_shape, &dst_shape);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
-      const TBlob in_data = inputs[0].reshape(src_shape);
+      const TBlob in_data  = inputs[0].reshape(src_shape);
       const TBlob out_data = outputs[0].reshape(dst_shape);
       BROADCAST_NDIM_SWITCH(dst_shape.ndim(), NDim, {
-        size_t workspace_size = broadcast::ReduceWorkspaceSize(
-            s, out_data.shape_, req[0], in_data.shape_);
+        size_t workspace_size =
+            broadcast::ReduceWorkspaceSize(s, out_data.shape_, req[0], in_data.shape_);
         Tensor<xpu, 1, char> workspace =
             ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
-        broadcast::ReduceBool<reducer, NDim, DType, OP>(
-            s, out_data, req[0], workspace, in_data);
+        broadcast::ReduceBool<reducer, NDim, DType, OP>(s, out_data, req[0], workspace, in_data);
         if (normalize) {
           auto out = out_data.FlatTo2D<xpu, OType>(s);
-          out /= scalar<OType>(src_shape.Size()/dst_shape.Size());
+          out /= scalar<OType>(src_shape.Size() / dst_shape.Size());
         }
       });
     });
   });
 }
 
-template<typename xpu, typename reducer, bool normalize = false,
-         typename OP = op::mshadow_op::identity>
+template <typename xpu,
+          typename reducer,
+          bool normalize = false,
+          typename OP    = op::mshadow_op::identity>
 void ReduceAxesCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -764,9 +786,9 @@ void ReduceAxesRTCComputeImpl(const OpContext& ctx,
                               const std::string& reducer,
                               const mshadow::Tensor<gpu, 1, char>* workspace = nullptr,
 
-                              const bool normalize = false,
+                              const bool normalize  = false,
                               const std::string& OP = "identity",
-                              const int ddof = 0);
+                              const int ddof        = 0);
 
 #endif
 
@@ -787,8 +809,10 @@ template <typename red_op, int req>
  */
 struct ReduceCsrKernel<red_op, req, 0> {
   template <typename RType, typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int j, DType* out_data,
-                                  const RType* in_indptr, const IType* in_idx,
+  MSHADOW_XINLINE static void Map(int j,
+                                  DType* out_data,
+                                  const RType* in_indptr,
+                                  const IType* in_idx,
                                   const DType* in_data,
                                   DType* sum,
                                   DType* residual,
@@ -796,34 +820,36 @@ struct ReduceCsrKernel<red_op, req, 0> {
                                   IType num_cols,
                                   const nnvm::dim_t seg_len) {
     const IType seg_start = j * seg_len;
-    if (seg_start >= num_cols) return;
+    if (seg_start >= num_cols)
+      return;
     const IType seg_end = std::min(seg_start + seg_len, num_cols);
 
     for (RType row = 0; row < num_rows; ++row) {
       // row specific seg starts
       IType row_seg_start = seg_start;
-      IType row_seg_end = seg_end;
+      IType row_seg_end   = seg_end;
 
       // Cache starting and ending indptr values for the row
       IType row_indptr_start = in_indptr[row];
-      IType row_indptr_end = in_indptr[row + 1] - 1;
-      if (row_indptr_start == (row_indptr_end + 1)) continue;
+      IType row_indptr_end   = in_indptr[row + 1] - 1;
+      if (row_indptr_start == (row_indptr_end + 1))
+        continue;
 
       // If row_seg_start is less than the first index for the row, move the
       // row_seg_start forward
-      while (row_seg_start < in_idx[row_indptr_start] &&
-             row_seg_start < row_seg_end) {
+      while (row_seg_start < in_idx[row_indptr_start] && row_seg_start < row_seg_end) {
         row_seg_start++;
       }
 
       // If row_seg_start is greater than last index for the row, move on to
       // the next row
-      if (row_seg_start > in_idx[row_indptr_end]) continue;
+      if (row_seg_start > in_idx[row_indptr_end])
+        continue;
 
       // Do binary search for row_seg_start between in_idx[in_indptr[i]] and
       // in_idx[in_indptr[i + 1]]
       IType start = row_indptr_start;
-      IType end = row_indptr_end;
+      IType end   = row_indptr_end;
 
       // Initialize mid with the first indice of the row
       IType mid = start;
@@ -841,13 +867,11 @@ struct ReduceCsrKernel<red_op, req, 0> {
       // At this point we have a in_idx[mid] which is close to row_seg_start
       // Safety check to make sure mid is a valid indptr value
       if (mid < row_indptr_start || mid > row_indptr_end)
-          mid = row_indptr_start;
-
+        mid = row_indptr_start;
 
       // Linear search for nnzs for column subset between row_seg_start
       // and row_seg_end
-      for (IType col = row_seg_start;
-           col < row_seg_end && mid <= row_indptr_end;) {
+      for (IType col = row_seg_start; col < row_seg_end && mid <= row_indptr_end;) {
         if (col == in_idx[mid]) {
           red_op::Reduce(sum[col], in_data[mid], residual[col]);
           mid++;
@@ -861,7 +885,7 @@ struct ReduceCsrKernel<red_op, req, 0> {
     }
 
     for (IType col = seg_start; col < seg_end; col++) {
-        KERNEL_ASSIGN(out_data[col], req, sum[col]);
+      KERNEL_ASSIGN(out_data[col], req, sum[col]);
     }
   }
 };
@@ -869,7 +893,8 @@ struct ReduceCsrKernel<red_op, req, 0> {
 template <typename red_op, int req>
 struct ReduceCsrKernel<red_op, req, 1> {
   template <typename RType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data,
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
                                   const RType* in_indptr,
                                   const DType* in_data) {
     DType sum, residual;
@@ -882,10 +907,14 @@ struct ReduceCsrKernel<red_op, req, 1> {
 };
 
 template <typename xpu, typename red_op, bool normalize = false>
-void ReduceCsrImpl(mshadow::Stream<xpu>* s, const OpContext& ctx,
-                   const NDArray& input, const OpReqType req,
-                   NDArray* output, const mxnet::TShape reduce_axis) {
-  if (req == kNullOp) return;
+void ReduceCsrImpl(mshadow::Stream<xpu>* s,
+                   const OpContext& ctx,
+                   const NDArray& input,
+                   const OpReqType req,
+                   NDArray* output,
+                   const mxnet::TShape reduce_axis) {
+  if (req == kNullOp)
+    return;
   int64_t out_data_size = 0;
   if (reduce_axis[0] == 0) {
     out_data_size = input.shape()[1];
@@ -903,8 +932,7 @@ void ReduceCsrImpl(mshadow::Stream<xpu>* s, const OpContext& ctx,
 
   if (req == kWriteTo || req == kWriteInplace) {
     MSHADOW_TYPE_SWITCH(output->data().type_flag_, DType, {
-      Kernel<set_zero, xpu>::Launch(s, out_data_size,
-                                    output->data().dptr<DType>());
+      Kernel<set_zero, xpu>::Launch(s, out_data_size, output->data().dptr<DType>());
     })
   }
 
@@ -918,34 +946,39 @@ void ReduceCsrImpl(mshadow::Stream<xpu>* s, const OpContext& ctx,
         MSHADOW_TYPE_SWITCH(input.dtype(), DType, {
           MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
             const RType* in_indptr = input.aux_data(kIndPtr).dptr<RType>();
-            const IType* in_idx = input.aux_data(kIdx).dptr<IType>();
-            const DType* in_data = input.data().dptr<DType>();
-            const RType num_rows = input.shape()[0];
-            const IType num_cols = input.shape()[1];
-            dim_t num_threads = mxnet_op::get_num_threads<xpu>(16);
-            dim_t seg_len = (out_data_size + num_threads - 1) / num_threads;
+            const IType* in_idx    = input.aux_data(kIdx).dptr<IType>();
+            const DType* in_data   = input.data().dptr<DType>();
+            const RType num_rows   = input.shape()[0];
+            const IType num_cols   = input.shape()[1];
+            dim_t num_threads      = mxnet_op::get_num_threads<xpu>(16);
+            dim_t seg_len          = (out_data_size + num_threads - 1) / num_threads;
             mshadow::Tensor<xpu, 1, DType> workspace =
-                ctx.requested[0].get_space_typed<xpu, 1, DType>(
-                    Shape1(2 * out_data_size), s);
-            mshadow::Tensor<xpu, 1, DType> sum(
-                reinterpret_cast<DType*>(workspace.dptr_),
-                Shape1(out_data_size));
+                ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(2 * out_data_size), s);
+            mshadow::Tensor<xpu, 1, DType> sum(reinterpret_cast<DType*>(workspace.dptr_),
+                                               Shape1(out_data_size));
             mshadow::Tensor<xpu, 1, DType> residual(
-                reinterpret_cast<DType*>(workspace.dptr_ +
-                                         out_data_size),
-                Shape1(out_data_size));
+                reinterpret_cast<DType*>(workspace.dptr_ + out_data_size), Shape1(out_data_size));
 
             Kernel<set_zero, xpu>::Launch(s, out_data_size, sum.dptr_);
             Kernel<set_zero, xpu>::Launch(s, out_data_size, residual.dptr_);
-            Kernel<ReduceCsrKernel<red_op, req_type, 0>, xpu>::Launch(
-                s, num_threads, output->data().dptr<DType>(), in_indptr, in_idx,
-                in_data, sum.dptr_, residual.dptr_, num_rows, num_cols,
-                seg_len);
+            Kernel<ReduceCsrKernel<red_op, req_type, 0>, xpu>::Launch(s,
+                                                                      num_threads,
+                                                                      output->data().dptr<DType>(),
+                                                                      in_indptr,
+                                                                      in_idx,
+                                                                      in_data,
+                                                                      sum.dptr_,
+                                                                      residual.dptr_,
+                                                                      num_rows,
+                                                                      num_cols,
+                                                                      seg_len);
             if (normalize) {
-              mxnet_op::Kernel<
-                  mxnet_op::op_with_req<op::mshadow_op::div, req_type>,
-                  xpu>::Launch(s, out_data_size, output->data().dptr<DType>(),
-                               output->data().dptr<DType>(), DType(num_rows));
+              mxnet_op::Kernel<mxnet_op::op_with_req<op::mshadow_op::div, req_type>, xpu>::Launch(
+                  s,
+                  out_data_size,
+                  output->data().dptr<DType>(),
+                  output->data().dptr<DType>(),
+                  DType(num_rows));
             }
           });
         });
@@ -957,16 +990,17 @@ void ReduceCsrImpl(mshadow::Stream<xpu>* s, const OpContext& ctx,
         MSHADOW_TYPE_SWITCH(input.dtype(), DType, {
           MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
             const RType* in_indptr = input.aux_data(kIndPtr).dptr<RType>();
-            const DType* in_data = input.data().dptr<DType>();
-            const IType num_cols = input.shape()[1];
+            const DType* in_data   = input.data().dptr<DType>();
+            const IType num_cols   = input.shape()[1];
             Kernel<ReduceCsrKernel<red_op, req_type, 1>, xpu>::Launch(
-                s, out_data_size, output->data().dptr<DType>(), in_indptr,
-                in_data);
+                s, out_data_size, output->data().dptr<DType>(), in_indptr, in_data);
             if (normalize) {
-              mxnet_op::Kernel<
-                  mxnet_op::op_with_req<op::mshadow_op::div, req_type>,
-                  xpu>::Launch(s, out_data_size, output->data().dptr<DType>(),
-                               output->data().dptr<DType>(), DType(num_cols));
+              mxnet_op::Kernel<mxnet_op::op_with_req<op::mshadow_op::div, req_type>, xpu>::Launch(
+                  s,
+                  out_data_size,
+                  output->data().dptr<DType>(),
+                  output->data().dptr<DType>(),
+                  DType(num_cols));
             }
           });
         });
@@ -977,53 +1011,56 @@ void ReduceCsrImpl(mshadow::Stream<xpu>* s, const OpContext& ctx,
 
 /*! \brief If normalize is true, the mean should be computed instead of sum */
 template <typename xpu, typename red_op, bool normalize = false>
-void ReduceCsr(const nnvm::NodeAttrs& attrs, mshadow::Stream<xpu>* s, const OpContext& ctx,
-               const NDArray& input, const OpReqType req, NDArray* output) {
+void ReduceCsr(const nnvm::NodeAttrs& attrs,
+               mshadow::Stream<xpu>* s,
+               const OpContext& ctx,
+               const NDArray& input,
+               const OpReqType req,
+               NDArray* output) {
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
   CHECK(param.axis.has_value());
   const mxnet::TShape axis = param.axis.value();
   CHECK_EQ(axis.ndim(), 1U) << "sum(csr)/mean(csr) only supports axis 0 or 1";
-  CHECK(axis[0] == 0 || axis[0] == 1)
-     << "sum(csr)/mean(csr) only support axis 0 or 1";
+  CHECK(axis[0] == 0 || axis[0] == 1) << "sum(csr)/mean(csr) only support axis 0 or 1";
   CHECK(!param.keepdims) << "keepdims not supported for sparse";
   CHECK(!param.exclude) << "exclude not supported for sparse";
   ReduceCsrImpl<xpu, red_op, normalize>(s, ctx, input, req, output, axis);
 }
 
 template <typename xpu, typename reducer, bool normalize = false>
-void ReduceAxesOpForwardEx(const nnvm::NodeAttrs& attrs, const OpContext& ctx,
+void ReduceAxesOpForwardEx(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
                            const std::vector<NDArray>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s         = ctx.get_stream<xpu>();
   const NDArrayStorageType istype = inputs[0].storage_type();
   if (istype == kCSRStorage) {
     NDArray output = outputs[0];
-    ReduceCsr<xpu, mshadow::red::sum, normalize>(attrs, s, ctx, inputs[0],
-                                                 req[0], &output);
+    ReduceCsr<xpu, mshadow::red::sum, normalize>(attrs, s, ctx, inputs[0], req[0], &output);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
 }
 
-template<int req, typename OP>
+template <int req, typename OP>
 struct reduce_axes_backward_broadcast {
-  template<typename DType, typename OType>
+  template <typename DType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  DType *data,
-                                  OType *out,
-                                  DType *igrad,
-                                  OType *ograd,
+                                  DType* data,
+                                  OType* out,
+                                  DType* igrad,
+                                  OType* ograd,
                                   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape,
                                   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape,
                                   const uint32_t ndim) {
-    size_t in_stride = 1;
+    size_t in_stride  = 1;
     size_t out_stride = 1;
-    index_t idx = i;
-    index_t out_idx = i;
+    index_t idx       = i;
+    index_t out_idx   = i;
     for (int iter = ndim - 1; iter >= 0; --iter) {
       size_t dim_idx = idx % in_shape[iter];
       out_idx -= dim_idx * in_stride;
@@ -1038,9 +1075,9 @@ struct reduce_axes_backward_broadcast {
   }
 };
 
-template<typename xpu, typename OP, bool normalize = false>
+template <typename xpu, typename OP, bool normalize = false>
 void ReduceAxesBackwardUseInOutImpl(const OpContext& ctx,
-                                    const mxnet::TShape &small,
+                                    const mxnet::TShape& small,
                                     const std::vector<TBlob>& inputs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<TBlob>& outputs) {
@@ -1050,7 +1087,7 @@ void ReduceAxesBackwardUseInOutImpl(const OpContext& ctx,
 
   mxnet::TShape src_shape, dst_shape;
   BroadcastReduceShapeCompact(outputs[0].shape_, small, &src_shape, &dst_shape);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
@@ -1058,51 +1095,63 @@ void ReduceAxesBackwardUseInOutImpl(const OpContext& ctx,
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape;
       for (int i = 0; i < MXNET_SPECIAL_MAX_NDIM; ++i) {
         if (i < dst_shape.ndim()) {
-          in_shape[i] = src_shape[i];
+          in_shape[i]  = src_shape[i];
           out_shape[i] = dst_shape[i];
         } else {
-          in_shape[i] = 1;
+          in_shape[i]  = 1;
           out_shape[i] = 1;
         }
       }
       if (dst_shape.ndim() == 2) {
         Tensor<xpu, 2, OType> igrad =
-          outputs[0].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
+            outputs[0].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
         Tensor<xpu, 2, DType> ograd =
-          inputs[0].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
-        Tensor<xpu, 2, OType> data =
-          inputs[1].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
-        Tensor<xpu, 2, DType> out =
-          inputs[2].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
+            inputs[0].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
+        Tensor<xpu, 2, OType> data = inputs[1].get_with_shape<xpu, 2, OType>(src_shape.get<2>(), s);
+        Tensor<xpu, 2, DType> out  = inputs[2].get_with_shape<xpu, 2, DType>(dst_shape.get<2>(), s);
         MXNET_REQ_TYPE_SWITCH(req[0], Req, {
-          Kernel<reduce_axes_backward_broadcast<Req, OP>, xpu>::Launch(
-            s, outputs[0].shape_.Size(), data.dptr_, out.dptr_, igrad.dptr_, ograd.dptr_,
-            in_shape, out_shape, src_shape.ndim());
+          Kernel<reduce_axes_backward_broadcast<Req, OP>, xpu>::Launch(s,
+                                                                       outputs[0].shape_.Size(),
+                                                                       data.dptr_,
+                                                                       out.dptr_,
+                                                                       igrad.dptr_,
+                                                                       ograd.dptr_,
+                                                                       in_shape,
+                                                                       out_shape,
+                                                                       src_shape.ndim());
         });
-        if (normalize) igrad /= scalar<OType>(src_shape.Size()/dst_shape.Size());
+        if (normalize)
+          igrad /= scalar<OType>(src_shape.Size() / dst_shape.Size());
       } else {
         const int ndim = MXNET_SPECIAL_MAX_NDIM;
         Tensor<xpu, ndim, OType> igrad =
-          outputs[0].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
+            outputs[0].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
         Tensor<xpu, ndim, DType> ograd =
-          inputs[0].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
+            inputs[0].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
         Tensor<xpu, ndim, OType> data =
-          inputs[1].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
+            inputs[1].get_with_shape<xpu, ndim, OType>(src_shape.get<ndim>(), s);
         Tensor<xpu, ndim, DType> out =
-          inputs[2].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
+            inputs[2].get_with_shape<xpu, ndim, DType>(dst_shape.get<ndim>(), s);
         MXNET_REQ_TYPE_SWITCH(req[0], Req, {
-          Kernel<reduce_axes_backward_broadcast<Req, OP>, xpu>::Launch(
-            s, outputs[0].shape_.Size(), data.dptr_, out.dptr_, igrad.dptr_, ograd.dptr_,
-            in_shape, out_shape, src_shape.ndim());
+          Kernel<reduce_axes_backward_broadcast<Req, OP>, xpu>::Launch(s,
+                                                                       outputs[0].shape_.Size(),
+                                                                       data.dptr_,
+                                                                       out.dptr_,
+                                                                       igrad.dptr_,
+                                                                       ograd.dptr_,
+                                                                       in_shape,
+                                                                       out_shape,
+                                                                       src_shape.ndim());
         });
-        if (normalize) igrad /= scalar<OType>(src_shape.Size()/dst_shape.Size());
+        if (normalize)
+          igrad /= scalar<OType>(src_shape.Size() / dst_shape.Size());
       }
     });
   });
 }
 
 // works when shape inference of output is given
-template<typename xpu, typename OP, bool normalize = false>
+template <typename xpu, typename OP, bool normalize = false>
 void ReduceAxesBackwardUseInOut(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -1129,7 +1178,7 @@ struct ShapeAndStride {
   // axes: stores which axes in input is to broadcasted
   index_t axes[MXNET_SPECIAL_MAX_NDIM];
   int num_broadcast_axes = -1;
-  bool shape_changed = false;
+  bool shape_changed     = false;
 };
 }  // unnamed namespace
 
@@ -1142,27 +1191,27 @@ struct ShapeAndStride {
  * \param out_shape output shape
  * \param ndim no of dimensions in output
  */
-inline void PrepareAUXData(ShapeAndStride *aux_data,
-                    mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape,
-                    mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape,
-                    int ndim) {
+inline void PrepareAUXData(ShapeAndStride* aux_data,
+                           mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape,
+                           mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape,
+                           int ndim) {
   int iter = ndim - 1, i = 0;
-  aux_data->out_stride[iter] = 1;
-  aux_data->in_stride[iter] = 1;
-  aux_data->input_shape[iter] = in_shape[iter];
+  aux_data->out_stride[iter]   = 1;
+  aux_data->in_stride[iter]    = 1;
+  aux_data->input_shape[iter]  = in_shape[iter];
   aux_data->output_shape[iter] = out_shape[iter];
   if (in_shape[iter] != out_shape[iter]) {
-    aux_data->axes[i++] = iter;
+    aux_data->axes[i++]     = iter;
     aux_data->shape_changed = true;
   }
   iter--;
   for (; iter >= 0; --iter) {
-    aux_data->out_stride[iter] = aux_data->out_stride[iter + 1] * out_shape[iter + 1];
-    aux_data->in_stride[iter] = aux_data->in_stride[iter + 1] * in_shape[iter + 1];
-    aux_data->input_shape[iter] = in_shape[iter];
+    aux_data->out_stride[iter]   = aux_data->out_stride[iter + 1] * out_shape[iter + 1];
+    aux_data->in_stride[iter]    = aux_data->in_stride[iter + 1] * in_shape[iter + 1];
+    aux_data->input_shape[iter]  = in_shape[iter];
     aux_data->output_shape[iter] = out_shape[iter];
     if (in_shape[iter] != out_shape[iter]) {
-      aux_data->axes[i++] = iter;
+      aux_data->axes[i++]     = iter;
       aux_data->shape_changed = true;
     }
   }
@@ -1170,20 +1219,20 @@ inline void PrepareAUXData(ShapeAndStride *aux_data,
   assert(aux_data->num_broadcast_axes > -1 && aux_data->num_broadcast_axes < 4);
 }
 
-template<typename OP>
+template <typename OP>
 struct broadcast_kernel_gpu {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  IType *input,
-                                  OType *output,
+                                  IType* input,
+                                  OType* output,
                                   const ShapeAndStride& aux_data,
                                   const OpReqType req,
                                   const int ndim) {
-    index_t idx = i;
+    index_t idx    = i;
     index_t in_idx = i;
 #pragma unroll 4
     for (int iter = ndim - 1; iter >= 0; --iter) {
-      index_t out_dim_shape = aux_data.output_shape[iter];
+      index_t out_dim_shape  = aux_data.output_shape[iter];
       index_t out_dim_stride = aux_data.out_stride[iter];
       // x % y = x - (x / y) * y
       // speeds up modulo(%) operation in GPU
@@ -1206,16 +1255,16 @@ struct broadcast_kernel_gpu {
  * index(stride=1) of the tensor is to be broadcasted.
  * In other cases it simply performs better by better load balancing.
  */
-template<typename OP>
+template <typename OP>
 struct broadcast_kernel_cpu {
-  template<typename IType, typename OType>
+  template <typename IType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  IType *input,
-                                  OType *output,
+                                  IType* input,
+                                  OType* output,
                                   const ShapeAndStride& aux_data,
                                   const OpReqType req,
                                   const int ndim) {
-    index_t idx = i;
+    index_t idx      = i;
     index_t init_off = 0;
     for (int iter = ndim - 1; idx > 0 && iter >= 0; --iter) {
       size_t dim_idx = idx % aux_data.input_shape[iter];
@@ -1232,11 +1281,10 @@ struct broadcast_kernel_cpu {
       // in case of (x_1,1) the system leverages vectorization but in other 2
       // the performance is improved due avoidance of duplicate stride calculations
       // for each output location input[i] needs to be written to.
-      case 1 :
+      case 1:
         stride_0 = aux_data.out_stride[aux_data.axes[0]];
         for (index_t l = 0; l < aux_data.output_shape[aux_data.axes[0]]; l++) {
-          KERNEL_ASSIGN(output[init_off + l * stride_0],
-              req, OP::Map(input[i]));
+          KERNEL_ASSIGN(output[init_off + l * stride_0], req, OP::Map(input[i]));
         }
         break;
       // when input shape is one of the follwing forms
@@ -1250,8 +1298,7 @@ struct broadcast_kernel_cpu {
         stride_0 = aux_data.out_stride[aux_data.axes[0]];
         for (index_t k = 0; k < aux_data.output_shape[aux_data.axes[1]]; k++) {
           for (index_t l = 0; l < aux_data.output_shape[aux_data.axes[0]]; l++) {
-            KERNEL_ASSIGN(output[init_off + k * stride_1 + l * stride_0],
-                req, OP::Map(input[i]));
+            KERNEL_ASSIGN(output[init_off + k * stride_1 + l * stride_0], req, OP::Map(input[i]));
           }
         }
         break;
@@ -1269,7 +1316,8 @@ struct broadcast_kernel_cpu {
           for (index_t k = 0; k < aux_data.output_shape[aux_data.axes[1]]; k++) {
             for (index_t l = 0; l < aux_data.output_shape[aux_data.axes[0]]; l++) {
               KERNEL_ASSIGN(output[init_off + j * stride_2 + k * stride_1 + l * stride_0],
-                  req, OP::Map(input[i]));
+                            req,
+                            OP::Map(input[i]));
             }
           }
         }
@@ -1278,13 +1326,10 @@ struct broadcast_kernel_cpu {
   }
 };
 
-template<typename OP>
+template <typename OP>
 struct direct_copy {
-  template<typename IType, typename OType>
-  MSHADOW_XINLINE static void Map(index_t i,
-                                  IType *input,
-                                  OType *output,
-                                  const OpReqType req) {
+  template <typename IType, typename OType>
+  MSHADOW_XINLINE static void Map(index_t i, IType* input, OType* output, const OpReqType req) {
     KERNEL_ASSIGN(output[i], req, OP::Map(input[i]));
   }
 };
@@ -1296,7 +1341,7 @@ struct direct_copy {
  * the no. of output elements, this ensures coalesced memory writes to output
  * and improves coalesced memory reads.
  */
-template<typename xpu>
+template <typename xpu>
 inline void BroadcastComputeImpl(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
@@ -1313,18 +1358,18 @@ inline void BroadcastComputeImpl(const nnvm::NodeAttrs& attrs,
   //      and this is the new input for broadcast_kernel whose total
   //      num of dimensions cannot be greater than 5(throws an error otherwise).
   BroadcastReduceShapeCompact(outputs[0].shape_, small, &dst_shape, &src_shape);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  bool isCPU = std::is_same<xpu, cpu>::value;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
+  bool isCPU     = std::is_same<xpu, cpu>::value;
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, IType, {
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, OType, {
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape;
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape;
       for (int i = 0; i < MXNET_SPECIAL_MAX_NDIM; ++i) {
         if (i < dst_shape.ndim()) {
-          in_shape[i] = src_shape[i];
+          in_shape[i]  = src_shape[i];
           out_shape[i] = dst_shape[i];
         } else {
-          in_shape[i] = 1;
+          in_shape[i]  = 1;
           out_shape[i] = 1;
         }
       }
@@ -1334,38 +1379,36 @@ inline void BroadcastComputeImpl(const nnvm::NodeAttrs& attrs,
         // If no broadcast is required (i.e. input_shape == output_shape)
         // then simply copy input to outout.
         Kernel<direct_copy<mshadow_op::identity>, xpu>::Launch(
-          s, outputs[0].Size(), inputs[0].dptr<IType>(), outputs[0].dptr<OType>(), req[0]);
+            s, outputs[0].Size(), inputs[0].dptr<IType>(), outputs[0].dptr<OType>(), req[0]);
       } else if (dst_shape.ndim() == 2) {
-        Tensor<xpu, 2, OType> out =
-          outputs[0].get_with_shape<xpu, 2, OType>(dst_shape.get<2>(), s);
-        Tensor<xpu, 2, IType> data =
-          inputs[0].get_with_shape<xpu, 2, IType>(src_shape.get<2>(), s);
+        Tensor<xpu, 2, OType> out = outputs[0].get_with_shape<xpu, 2, OType>(dst_shape.get<2>(), s);
+        Tensor<xpu, 2, IType> data = inputs[0].get_with_shape<xpu, 2, IType>(src_shape.get<2>(), s);
         if (isCPU) {
           Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(
-            s, data.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], 2);
+              s, data.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], 2);
         } else {
           Kernel<broadcast_kernel_gpu<mshadow_op::identity>, xpu>::Launch(
-            s, out.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], 2);
+              s, out.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], 2);
         }
       } else {
         const int ndim = MXNET_SPECIAL_MAX_NDIM;
         Tensor<xpu, ndim, OType> out =
-          outputs[0].get_with_shape<xpu, ndim, OType>(dst_shape.get<ndim>(), s);
+            outputs[0].get_with_shape<xpu, ndim, OType>(dst_shape.get<ndim>(), s);
         Tensor<xpu, ndim, IType> data =
-          inputs[0].get_with_shape<xpu, ndim, IType>(src_shape.get<ndim>(), s);
+            inputs[0].get_with_shape<xpu, ndim, IType>(src_shape.get<ndim>(), s);
         if (isCPU) {
           Kernel<broadcast_kernel_cpu<mshadow_op::identity>, xpu>::Launch(
-            s, data.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], ndim);
+              s, data.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], ndim);
         } else {
           Kernel<broadcast_kernel_gpu<mshadow_op::identity>, xpu>::Launch(
-            s, out.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], ndim);
+              s, out.shape_.Size(), data.dptr_, out.dptr_, aux_data, req[0], ndim);
         }
       }
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void BroadcastCompute(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -1374,7 +1417,7 @@ inline void BroadcastCompute(const nnvm::NodeAttrs& attrs,
   BroadcastComputeImpl<xpu>(attrs, ctx, inputs, req, outputs, inputs[0].shape_);
 }
 
-template<typename xpu, bool normalize = false>
+template <typename xpu, bool normalize = false>
 inline void ReduceAxesBackwardUseNone(const nnvm::NodeAttrs& attrs,
                                       const OpContext& ctx,
                                       const std::vector<TBlob>& inputs,
@@ -1391,16 +1434,16 @@ inline void ReduceAxesBackwardUseNone(const nnvm::NodeAttrs& attrs,
   }
 
   BroadcastComputeImpl<xpu>(attrs, ctx, inputs, req, outputs, small);
-  if (normalize)  {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (normalize) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       Tensor<xpu, 1, DType> igrad = outputs[0].FlatTo1D<xpu, DType>(s);
-      igrad /= scalar<DType>(outputs[0].Size()/inputs[0].Size());
+      igrad /= scalar<DType>(outputs[0].Size() / inputs[0].Size());
     });
   }
 }
 
-template<typename PType>
+template <typename PType>
 inline void AxesParamParser(nnvm::NodeAttrs* attrs) {
   PType param;
   param.Init(attrs->dict);
@@ -1408,13 +1451,11 @@ inline void AxesParamParser(nnvm::NodeAttrs* attrs) {
 }
 
 struct ReduceGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) {
     return MakeNonlossGradNode(
-        op_name, n,
-        ograds, {n->inputs[0], nnvm::NodeEntry{n, 0, 0}},
-        n->attrs.dict);
+        op_name, n, ograds, {n->inputs[0], nnvm::NodeEntry{n, 0, 0}}, n->attrs.dict);
   }
 };
 
@@ -1425,32 +1466,31 @@ inline bool LpNormStorageType(const nnvm::NodeAttrs& attrs,
                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const int in_stype = in_attrs->at(0);
-  int& out_stype = out_attrs->at(0);
+  const int in_stype     = in_attrs->at(0);
+  int& out_stype         = out_attrs->at(0);
   const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
-  bool dispatched = false;
+  bool dispatched        = false;
   // l2 norm on a particular axis only supports cpu
   const bool invalid_ctx = dev_mask != mshadow::cpu::kDevMask;
   const auto dispatch_ex =
       invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
   if (!dispatched && in_stype == kDefaultStorage) {
     // dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                     DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (param.ord == 2) {
     const mxnet::TShape axis = param.axis.has_value() ? param.axis.value() : mxnet::TShape(0, -1);
     if (!dispatched && (in_stype == kRowSparseStorage || in_stype == kCSRStorage) &&
         axis.ndim() == 0 && param.ord == 2) {
       // l2 norm: rsp/csr, axis = () -> dns
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                       DispatchMode::kFComputeEx);
+      dispatched = storage_type_assign(
+          &out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
     if (!dispatched && in_stype == kCSRStorage && axis.ndim() == 1 && !param.keepdims &&
         (axis[0] == 0 || axis[0] == 1) && param.ord == 2) {
       // l2 norm: csr, axis = 0/1 -> dns
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                       dispatch_ex);
+      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, dispatch_ex);
     }
   }
   if (!dispatched) {
@@ -1462,23 +1502,25 @@ inline bool LpNormStorageType(const nnvm::NodeAttrs& attrs,
 /*! \brief compute square on each element and sum reducer */
 struct sq_sum {
   /*! \brief do reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst,  volatile DType src) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst, volatile DType src) {  // NOLINT(*)
     dst += src * src;
   }
   /*! \brief do stable reduction into dst */
-  template<typename DType>
-  MSHADOW_XINLINE static void Reduce(volatile DType& dst,  volatile DType src, volatile DType& residual) { // NOLINT(*)
-    DType y = src * src - residual;
-    DType t = dst + y;
+  template <typename DType>
+  MSHADOW_XINLINE static void Reduce(volatile DType& dst,  // NOLINT(*)
+                                     volatile DType src,
+                                     volatile DType& residual) {  // NOLINT(*)
+    DType y  = src * src - residual;
+    DType t  = dst + y;
     residual = (t - dst) - y;
-    dst = t;
+    dst      = t;
   }
   /*!
    *\brief calculate gradient of redres with respect to redsrc,
    * redres: reduced result, redsrc: one of reduction element
    */
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType PartialGrad(DType redres, DType redsrc) {
     // This won't be called in backward.
     return 1;
@@ -1486,55 +1528,55 @@ struct sq_sum {
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv) {  // NOLINT(*)
     initv = 0;
   }
   /*!
    *\brief set the initial value during reduction
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void SetInitValue(DType &initv, DType &residual) { // NOLINT(*)
+  template <typename DType>
+  MSHADOW_XINLINE static void SetInitValue(DType& initv, DType& residual) {  // NOLINT(*)
     SetInitValue(initv);
     residual = 0;
   }
 };
 
-template<typename xpu>
-void L2NormComputeImpl(mshadow::Stream<xpu> *s,
+template <typename xpu>
+void L2NormComputeImpl(mshadow::Stream<xpu>* s,
                        const TBlob& input,
                        const OpReqType req,
                        const TBlob& output) {
   MSHADOW_REAL_TYPE_SWITCH(output.type_flag_, DType, {
     // assign_req switch exits immediately for null req
     MXNET_ASSIGN_REQ_SWITCH(req, Req, {
-      mshadow::Tensor<xpu, 1, DType> out = output.get_with_shape<xpu, 1, DType>(
-        mshadow::Shape1(output.shape_.Size()), s);
-      mshadow::Tensor<xpu, 1, DType> in = input.get_with_shape<xpu, 1, DType>(
-        mshadow::Shape1(input.shape_.Size()), s);
+      mshadow::Tensor<xpu, 1, DType> out =
+          output.get_with_shape<xpu, 1, DType>(mshadow::Shape1(output.shape_.Size()), s);
+      mshadow::Tensor<xpu, 1, DType> in =
+          input.get_with_shape<xpu, 1, DType>(mshadow::Shape1(input.shape_.Size()), s);
       mshadow::VectorDot(out, in, in);
       DType* out_data = output.dptr<DType>();
       using namespace mxnet_op;
       Kernel<op_with_req<mshadow_op::square_root, Req>, xpu>::Launch(
-        s, output.Size(), out_data, out_data);
+          s, output.Size(), out_data, out_data);
     });
   });
 }
 
-template<typename xpu>
-void SqRootForL2(const OpContext& ctx, OpReqType req, const TBlob &output) {
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+template <typename xpu>
+void SqRootForL2(const OpContext& ctx, OpReqType req, const TBlob& output) {
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_REAL_TYPE_SWITCH(output.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req, Req, {
       DType* out_data = output.dptr<DType>();
       using namespace mxnet_op;
       Kernel<op_with_req<mshadow_op::square_root, Req>, xpu>::Launch(
-        s, output.Size(), out_data, out_data);
+          s, output.Size(), out_data, out_data);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void LpNormCompute(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -1542,7 +1584,8 @@ void LpNormCompute(const nnvm::NodeAttrs& attrs,
                    const std::vector<TBlob>& outputs) {
   const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
   CHECK(param.ord == 1 || param.ord == 2) << "norm only supports ord=1 and ord=2";
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
   mxnet::TShape small;
   if (param.keepdims) {
@@ -1553,52 +1596,49 @@ void LpNormCompute(const nnvm::NodeAttrs& attrs,
 #if !defined(__CUDACC__)
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", false);
   if (!safe_acc && inputs[0].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for LpNorm with float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for LpNorm with float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
   if (param.ord == 1) {
     if (safe_acc) {
       ReduceAxesComputeImpl<xpu, mshadow_op::sum, true, false, mshadow_op::abs>(
-        ctx, inputs, req, outputs, small);
+          ctx, inputs, req, outputs, small);
     } else {
       ReduceAxesComputeImpl<xpu, mshadow_op::sum, false, false, mshadow_op::abs>(
-        ctx, inputs, req, outputs, small);
+          ctx, inputs, req, outputs, small);
     }
   } else if (param.ord == 2) {
     if (safe_acc) {
       ReduceAxesComputeImpl<xpu, mshadow_op::nrm2, true, false, mshadow_op::identity>(
-        ctx, inputs, req, outputs, small);
+          ctx, inputs, req, outputs, small);
     } else {
       ReduceAxesComputeImpl<xpu, mshadow_op::nrm2, false, false, mshadow_op::identity>(
-        ctx, inputs, req, outputs, small);
+          ctx, inputs, req, outputs, small);
     }
   }
 #else
-  const std::string &red = param.ord == 1
-                           ? "red::sum{}"
-                           : "red::nrm2{}";
-  const std::string &op = param.ord == 1
-                          ? "abs"
-                          : "identity";
+  const std::string& red = param.ord == 1 ? "red::sum{}" : "red::nrm2{}";
+  const std::string& op  = param.ord == 1 ? "abs" : "identity";
   ReduceAxesRTCComputeImpl(ctx, inputs, req, outputs, small, red, nullptr, false, op);
 #endif
 }
 
-template<int req>
+template <int req>
 struct norm_backward_broadcast {
-  template<typename DType, typename OType>
+  template <typename DType, typename OType>
   MSHADOW_XINLINE static void Map(index_t i,
-                                  DType *igrad,
-                                  OType *ograd,
-                                  DType *data,
+                                  DType* igrad,
+                                  OType* ograd,
+                                  DType* data,
                                   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape,
                                   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape,
                                   const uint32_t ndim) {
-    size_t in_stride = 1;
+    size_t in_stride  = 1;
     size_t out_stride = 1;
-    index_t idx = i;
-    index_t out_idx = i;
+    index_t idx       = i;
+    index_t out_idx   = i;
     for (int iter = ndim - 1; iter >= 0; --iter) {
       size_t dim_idx = idx % in_shape[iter];
       out_idx -= dim_idx * in_stride;
@@ -1613,7 +1653,7 @@ struct norm_backward_broadcast {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void LpNormGradCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -1622,7 +1662,8 @@ void LpNormGradCompute(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 
   const NormParam& param = nnvm::get<NormParam>(attrs.parsed);
   mxnet::TShape small;
@@ -1634,15 +1675,15 @@ void LpNormGradCompute(const nnvm::NodeAttrs& attrs,
   if (param.ord == 1) {
     mxnet::TShape src_shape, dst_shape;
     BroadcastReduceShapeCompact(outputs[0].shape_, small, &src_shape, &dst_shape);
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> in_shape;
     mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> out_shape;
     for (int i = 0; i < MXNET_SPECIAL_MAX_NDIM; ++i) {
       if (i < dst_shape.ndim()) {
-        in_shape[i] = src_shape[i];
+        in_shape[i]  = src_shape[i];
         out_shape[i] = dst_shape[i];
       } else {
-        in_shape[i] = 1;
+        in_shape[i]  = 1;
         out_shape[i] = 1;
       }
     }
@@ -1650,55 +1691,66 @@ void LpNormGradCompute(const nnvm::NodeAttrs& attrs,
       MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, OType, {
         if (dst_shape.ndim() == 2) {
           Tensor<xpu, 2, OType> ograd =
-            inputs[0].get_with_shape<xpu, 2, OType>(dst_shape.get<2>(), s);
+              inputs[0].get_with_shape<xpu, 2, OType>(dst_shape.get<2>(), s);
           Tensor<xpu, 2, DType> igrad =
-            outputs[0].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
+              outputs[0].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
           Tensor<xpu, 2, DType> data =
-            inputs[1].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
+              inputs[1].get_with_shape<xpu, 2, DType>(src_shape.get<2>(), s);
           MXNET_REQ_TYPE_SWITCH(req[0], Req, {
-            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(
-              s, igrad.shape_.Size(), igrad.dptr_, ograd.dptr_, data.dptr_,
-              in_shape, out_shape, src_shape.ndim());
+            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(s,
+                                                              igrad.shape_.Size(),
+                                                              igrad.dptr_,
+                                                              ograd.dptr_,
+                                                              data.dptr_,
+                                                              in_shape,
+                                                              out_shape,
+                                                              src_shape.ndim());
           });
         } else {
           const int ndim = MXNET_SPECIAL_MAX_NDIM;
           Tensor<xpu, ndim, DType> igrad =
-            outputs[0].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
+              outputs[0].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
           Tensor<xpu, ndim, OType> ograd =
-            inputs[0].get_with_shape<xpu, ndim, OType>(dst_shape.get<ndim>(), s);
+              inputs[0].get_with_shape<xpu, ndim, OType>(dst_shape.get<ndim>(), s);
           Tensor<xpu, ndim, DType> data =
-            inputs[1].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
+              inputs[1].get_with_shape<xpu, ndim, DType>(src_shape.get<ndim>(), s);
           MXNET_REQ_TYPE_SWITCH(req[0], Req, {
-            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(
-              s, igrad.shape_.Size(), igrad.dptr_, ograd.dptr_, data.dptr_,
-              in_shape, out_shape, src_shape.ndim());
+            Kernel<norm_backward_broadcast<Req>, xpu>::Launch(s,
+                                                              igrad.shape_.Size(),
+                                                              igrad.dptr_,
+                                                              ograd.dptr_,
+                                                              data.dptr_,
+                                                              in_shape,
+                                                              out_shape,
+                                                              src_shape.ndim());
           });
         }
       });
     });
   } else if (param.ord == 2) {
-    ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::div, false>(ctx, small, inputs,
-                                                                req, outputs);
+    ReduceAxesBackwardUseInOutImpl<xpu, mshadow_op::div, false>(ctx, small, inputs, req, outputs);
   }
 }
 
-template<typename xpu>
-void L2NormComputeSparseImpl(mshadow::Stream<xpu> *s,
+template <typename xpu>
+void L2NormComputeSparseImpl(mshadow::Stream<xpu>* s,
                              const NDArray& input,
                              const OpReqType req,
                              const TBlob& output) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   // input is zeros
   if (!input.storage_initialized()) {
     // Add zeros. No op.
-    if (req == kAddTo) return;
+    if (req == kAddTo)
+      return;
     Fill<false>(s, output, req, 0);
   } else {
     L2NormComputeImpl(s, input.data(), req, output);
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void L2NormComputeEx(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<NDArray>& inputs,
@@ -1706,75 +1758,87 @@ void L2NormComputeEx(const nnvm::NodeAttrs& attrs,
                      const std::vector<NDArray>& outputs);
 
 /*! \brief index element from array along axes */
-template<int ndim, bool clip = true>
+template <int ndim, bool clip = true>
 struct pick {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* a,
-                                  const IType *idx, index_t M, index_t stride,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
+                                  const IType* idx,
+                                  index_t M,
+                                  index_t stride,
                                   mshadow::Shape<ndim> bshape,
                                   mshadow::Shape<ndim> sshape) {
     using namespace mxnet_op;
     index_t j = static_cast<index_t>(idx[i]);
     if (clip) {
-      if (j <= 0) j = 0;
-      else if (j >= M) j = M - 1;
+      if (j <= 0)
+        j = 0;
+      else if (j >= M)
+        j = M - 1;
     } else {
       j = j % M;
       j += (j < 0) ? M : 0;
     }
-    j = ravel(unravel(i, sshape), bshape) + j*stride;
+    j      = ravel(unravel(i, sshape), bshape) + j * stride;
     out[i] = a[j];
   }
 };
 
 /*! \brief index element from array along axes */
-template<int ndim, bool clip = true>
+template <int ndim, bool clip = true>
 struct pick_grad {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* igrad, const DType* ograd,
-                                  const IType *idx, index_t M, index_t stride,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* igrad,
+                                  const DType* ograd,
+                                  const IType* idx,
+                                  index_t M,
+                                  index_t stride,
                                   mshadow::Shape<ndim> bshape,
                                   mshadow::Shape<ndim> sshape) {
     using namespace mxnet_op;
     index_t j = static_cast<index_t>(idx[i]);
     if (clip) {
-      if (j <= 0) j = 0;
-      else if (j >= M) j = M - 1;
+      if (j <= 0)
+        j = 0;
+      else if (j >= M)
+        j = M - 1;
     } else {
       j = j % M;
       j += (j < 0) ? M : 0;
     }
-    j = ravel(unravel(i, sshape), bshape) + j*stride;
+    j = ravel(unravel(i, sshape), bshape) + j * stride;
     igrad[j] += ograd[i];
   }
 };
 
 inline bool PickOpShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
   const mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!ndim_is_known(ishape)) return false;
+  if (!ndim_is_known(ishape))
+    return false;
   const PickParam& param = nnvm::get<PickParam>(attrs.parsed);
-  if (!param.axis) LOG(FATAL)
-    << "axis=None is not supported by pick yet. Must specify an axis.";
+  if (!param.axis)
+    LOG(FATAL) << "axis=None is not supported by pick yet. Must specify an axis.";
   mxnet::TShape oshape = ReduceAxisShapeImpl(ishape, param.axis, param.keepdims);
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
-  if (!(*in_attrs)[1].ndim()) return false;
+  if (!(*in_attrs)[1].ndim())
+    return false;
   if ((*in_attrs)[1].ndim() == ishape.ndim()) {
-    SHAPE_ASSIGN_CHECK(*in_attrs, 1,
-                       ReduceAxisShapeImpl(ishape, param.axis, true));
+    SHAPE_ASSIGN_CHECK(*in_attrs, 1, ReduceAxisShapeImpl(ishape, param.axis, true));
   } else {
-    SHAPE_ASSIGN_CHECK(*in_attrs, 1,
-                       ReduceAxisShapeImpl(ishape, param.axis, false));
+    SHAPE_ASSIGN_CHECK(*in_attrs, 1, ReduceAxisShapeImpl(ishape, param.axis, false));
   }
   return shape_is_known((*out_attrs)[0]);
 }
 
 inline bool PickOpType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                       std::vector<int>* in_attrs,
+                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK_NE((*in_attrs)[1], -1) << "Index type must be set for pick operator";
@@ -1783,7 +1847,7 @@ inline bool PickOpType(const nnvm::NodeAttrs& attrs,
   return (*out_attrs)[0] != -1;
 }
 
-template<typename xpu>
+template <typename xpu>
 void PickOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -1792,45 +1856,69 @@ void PickOpForward(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(req[0], kWriteTo);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const PickParam& param = nnvm::get<PickParam>(attrs.parsed);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const PickParam& param  = nnvm::get<PickParam>(attrs.parsed);
 
   const mxnet::TShape& ishape = inputs[0].shape_;
-  index_t axis = CheckAxis(param.axis.value(), ishape.ndim());
+  index_t axis                = CheckAxis(param.axis.value(), ishape.ndim());
   index_t leading = 1, trailing = 1, M = ishape[axis];
-  for (index_t i = 0; i < axis; ++i) leading *= ishape[i];
-  for (index_t i = axis+1; i < ishape.ndim(); ++i) trailing *= ishape[i];
+  for (index_t i = 0; i < axis; ++i)
+    leading *= ishape[i];
+  for (index_t i = axis + 1; i < ishape.ndim(); ++i)
+    trailing *= ishape[i];
 
-  MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {  // output type
+  MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {   // output type
     MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // index type
       if (param.mode == kWrap) {
         if (trailing == 1) {
-            Kernel<pick<2, false>, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
-                                    inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                    M, 1, Shape2(leading, M), Shape2(leading, 1));
+          Kernel<pick<2, false>, xpu>::Launch(s,
+                                              outputs[0].Size(),
+                                              outputs[0].dptr<DType>(),
+                                              inputs[0].dptr<DType>(),
+                                              inputs[1].dptr<IType>(),
+                                              M,
+                                              1,
+                                              Shape2(leading, M),
+                                              Shape2(leading, 1));
         } else {
-            Kernel<pick<3, false>, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
-                                    inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                    M, trailing, Shape3(leading, M, trailing),
-                                    Shape3(leading, 1, trailing));
+          Kernel<pick<3, false>, xpu>::Launch(s,
+                                              outputs[0].Size(),
+                                              outputs[0].dptr<DType>(),
+                                              inputs[0].dptr<DType>(),
+                                              inputs[1].dptr<IType>(),
+                                              M,
+                                              trailing,
+                                              Shape3(leading, M, trailing),
+                                              Shape3(leading, 1, trailing));
         }
       } else {
         if (trailing == 1) {
-            Kernel<pick<2, true>, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
-                                   inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                   M, 1, Shape2(leading, M), Shape2(leading, 1));
+          Kernel<pick<2, true>, xpu>::Launch(s,
+                                             outputs[0].Size(),
+                                             outputs[0].dptr<DType>(),
+                                             inputs[0].dptr<DType>(),
+                                             inputs[1].dptr<IType>(),
+                                             M,
+                                             1,
+                                             Shape2(leading, M),
+                                             Shape2(leading, 1));
         } else {
-            Kernel<pick<3, true>, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
-                                   inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                   M, trailing, Shape3(leading, M, trailing),
-                                   Shape3(leading, 1, trailing));
+          Kernel<pick<3, true>, xpu>::Launch(s,
+                                             outputs[0].Size(),
+                                             outputs[0].dptr<DType>(),
+                                             inputs[0].dptr<DType>(),
+                                             inputs[1].dptr<IType>(),
+                                             M,
+                                             trailing,
+                                             Shape3(leading, M, trailing),
+                                             Shape3(leading, 1, trailing));
         }
       }
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void PickOpBackward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -1838,40 +1926,66 @@ void PickOpBackward(const nnvm::NodeAttrs& attrs,
                     const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const PickParam& param = nnvm::get<PickParam>(attrs.parsed);
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const PickParam& param  = nnvm::get<PickParam>(attrs.parsed);
 
   const mxnet::TShape& ishape = outputs[0].shape_;
-  const index_t axis = CheckAxis(param.axis.value(), ishape.ndim());
+  const index_t axis          = CheckAxis(param.axis.value(), ishape.ndim());
   index_t leading = 1, trailing = 1, M = ishape[axis];
-  for (index_t i = 0; i < axis; ++i) leading *= ishape[i];
-  for (index_t i = axis+1; i < ishape.ndim(); ++i) trailing *= ishape[i];
+  for (index_t i = 0; i < axis; ++i)
+    leading *= ishape[i];
+  for (index_t i = axis + 1; i < ishape.ndim(); ++i)
+    trailing *= ishape[i];
 
-  MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {  // output type
+  MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {   // output type
     MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // index type
-      if (req[0] != kAddTo) outputs[0].FlatTo1D<xpu, DType>(s) = 0;
+      if (req[0] != kAddTo)
+        outputs[0].FlatTo1D<xpu, DType>(s) = 0;
       if (param.mode == kWrap) {
         if (trailing == 1) {
-          Kernel<pick_grad<2, false>, xpu>::Launch(s, inputs[0].Size(), outputs[0].dptr<DType>(),
-                                      inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                      M, 1, Shape2(leading, M), Shape2(leading, 1));
+          Kernel<pick_grad<2, false>, xpu>::Launch(s,
+                                                   inputs[0].Size(),
+                                                   outputs[0].dptr<DType>(),
+                                                   inputs[0].dptr<DType>(),
+                                                   inputs[1].dptr<IType>(),
+                                                   M,
+                                                   1,
+                                                   Shape2(leading, M),
+                                                   Shape2(leading, 1));
         } else {
-          Kernel<pick_grad<3, false>, xpu>::Launch(s, inputs[0].Size(), outputs[0].dptr<DType>(),
-                                      inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                      M, trailing, Shape3(leading, M, trailing),
-                                      Shape3(leading, 1, trailing));
+          Kernel<pick_grad<3, false>, xpu>::Launch(s,
+                                                   inputs[0].Size(),
+                                                   outputs[0].dptr<DType>(),
+                                                   inputs[0].dptr<DType>(),
+                                                   inputs[1].dptr<IType>(),
+                                                   M,
+                                                   trailing,
+                                                   Shape3(leading, M, trailing),
+                                                   Shape3(leading, 1, trailing));
         }
       } else {
-          if (trailing == 1) {
-          Kernel<pick_grad<2, true>, xpu>::Launch(s, inputs[0].Size(), outputs[0].dptr<DType>(),
-                                      inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                      M, 1, Shape2(leading, M), Shape2(leading, 1));
+        if (trailing == 1) {
+          Kernel<pick_grad<2, true>, xpu>::Launch(s,
+                                                  inputs[0].Size(),
+                                                  outputs[0].dptr<DType>(),
+                                                  inputs[0].dptr<DType>(),
+                                                  inputs[1].dptr<IType>(),
+                                                  M,
+                                                  1,
+                                                  Shape2(leading, M),
+                                                  Shape2(leading, 1));
         } else {
-          Kernel<pick_grad<3, true>, xpu>::Launch(s, inputs[0].Size(), outputs[0].dptr<DType>(),
-                                      inputs[0].dptr<DType>(), inputs[1].dptr<IType>(),
-                                      M, trailing, Shape3(leading, M, trailing),
-                                      Shape3(leading, 1, trailing));
+          Kernel<pick_grad<3, true>, xpu>::Launch(s,
+                                                  inputs[0].Size(),
+                                                  outputs[0].dptr<DType>(),
+                                                  inputs[0].dptr<DType>(),
+                                                  inputs[1].dptr<IType>(),
+                                                  M,
+                                                  trailing,
+                                                  Shape3(leading, M, trailing),
+                                                  Shape3(leading, 1, trailing));
         }
       }
     });
@@ -1892,54 +2006,54 @@ Defined in )code";
   return doc;
 }
 
-#define MXNET_OPERATOR_REGISTER_REDUCE_AXIS(name)               \
-  NNVM_REGISTER_OP(name)                                        \
-  .set_num_inputs(1)                                            \
-  .set_num_outputs(1)                                           \
-  .set_attr_parser(ParamParser<ReduceAxisParam>)                \
-  .set_attr<mxnet::FInferShape>("FInferShape", ReduceAxisShape)  \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>) \
-  .add_argument("data", "NDArray-or-Symbol", "The input")       \
-  .add_arguments(ReduceAxisParam::__FIELDS__())
-
-#define MXNET_OPERATOR_REGISTER_REDUCE(name)                    \
-  NNVM_REGISTER_OP(name)                                        \
-  .set_num_inputs(1)                                            \
-  .set_num_outputs(1)                                           \
-  .set_attr_parser(AxesParamParser<ReduceAxesParam>)            \
-  .set_attr<mxnet::FInferShape>("FInferShape", ReduceAxesShape)  \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>) \
-  .add_argument("data", "NDArray-or-Symbol", "The input")       \
-  .add_arguments(ReduceAxesParam::__FIELDS__())
-
-#define MXNET_OPERATOR_REGISTER_MINMAX_REDUCE(name)             \
-  NNVM_REGISTER_OP(name)                                        \
-  .set_num_inputs(1)                                            \
-  .set_num_outputs(1)                                           \
-  .set_attr_parser(AxesParamParser<ReduceAxesParam>)            \
-  .set_attr<mxnet::FInferShape>("FInferShape", ReduceMinMaxAxesShape)  \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>) \
-  .add_argument("data", "NDArray-or-Symbol", "The input")       \
-  .add_arguments(ReduceAxesParam::__FIELDS__())
-
-#define MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(name)               \
+#define MXNET_OPERATOR_REGISTER_REDUCE_AXIS(name)                   \
+  NNVM_REGISTER_OP(name)                                            \
+      .set_num_inputs(1)                                            \
+      .set_num_outputs(1)                                           \
+      .set_attr_parser(ParamParser<ReduceAxisParam>)                \
+      .set_attr<mxnet::FInferShape>("FInferShape", ReduceAxisShape) \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>) \
+      .add_argument("data", "NDArray-or-Symbol", "The input")       \
+      .add_arguments(ReduceAxisParam::__FIELDS__())
+
+#define MXNET_OPERATOR_REGISTER_REDUCE(name)                        \
   NNVM_REGISTER_OP(name)                                            \
-  .set_num_outputs(1)                                               \
-  .set_attr_parser(AxesParamParser<ReduceAxesParam>)                \
-  .set_attr<nnvm::TIsBackward>("TIsBackward", true)
-
-#define MXNET_OPERATOR_REGISTER_BROADCAST(name)                 \
-  NNVM_REGISTER_OP(name)                                        \
-  .set_num_inputs(1)                                            \
-  .set_num_outputs(1)                                           \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>) \
-  .set_attr<nnvm::FGradient>("FGradient",                       \
-    [](const nnvm::ObjectPtr& n,                                  \
-       const std::vector<nnvm::NodeEntry>& ograds) {            \
-      return MakeNonlossGradNode("_broadcast_backward", n, ograds, {},    \
-                                 {{"keepdims", "true"}});              \
-    })                                                          \
-  .add_argument("data", "NDArray-or-Symbol", "The input")
+      .set_num_inputs(1)                                            \
+      .set_num_outputs(1)                                           \
+      .set_attr_parser(AxesParamParser<ReduceAxesParam>)            \
+      .set_attr<mxnet::FInferShape>("FInferShape", ReduceAxesShape) \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>) \
+      .add_argument("data", "NDArray-or-Symbol", "The input")       \
+      .add_arguments(ReduceAxesParam::__FIELDS__())
+
+#define MXNET_OPERATOR_REGISTER_MINMAX_REDUCE(name)                       \
+  NNVM_REGISTER_OP(name)                                                  \
+      .set_num_inputs(1)                                                  \
+      .set_num_outputs(1)                                                 \
+      .set_attr_parser(AxesParamParser<ReduceAxesParam>)                  \
+      .set_attr<mxnet::FInferShape>("FInferShape", ReduceMinMaxAxesShape) \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)       \
+      .add_argument("data", "NDArray-or-Symbol", "The input")             \
+      .add_arguments(ReduceAxesParam::__FIELDS__())
+
+#define MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(name)    \
+  NNVM_REGISTER_OP(name)                                 \
+      .set_num_outputs(1)                                \
+      .set_attr_parser(AxesParamParser<ReduceAxesParam>) \
+      .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+
+#define MXNET_OPERATOR_REGISTER_BROADCAST(name)                                      \
+  NNVM_REGISTER_OP(name)                                                             \
+      .set_num_inputs(1)                                                             \
+      .set_num_outputs(1)                                                            \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                  \
+      .set_attr<nnvm::FGradient>(                                                    \
+          "FGradient",                                                               \
+          [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) { \
+            return MakeNonlossGradNode(                                              \
+                "_broadcast_backward", n, ograds, {}, {{"keepdims", "true"}});       \
+          })                                                                         \
+      .add_argument("data", "NDArray-or-Symbol", "The input")
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_op_index.cc b/src/operator/tensor/broadcast_reduce_op_index.cc
index b7c4e61c0b7e..8ceb55b465c4 100644
--- a/src/operator/tensor/broadcast_reduce_op_index.cc
+++ b/src/operator/tensor/broadcast_reduce_op_index.cc
@@ -29,7 +29,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(PickParam);
 
 MXNET_OPERATOR_REGISTER_REDUCE_AXIS(argmax)
-.describe(R"code(Returns indices of the maximum values along an axis.
+    .describe(R"code(Returns indices of the maximum values along an axis.
 
 In the case of multiple occurrences of maximum values, the indices corresponding to the first occurrence
 are returned.
@@ -50,11 +50,11 @@ Examples::
                                       [ 2.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", SearchAxisCompute<cpu, mshadow::red::maximum>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", SearchAxisCompute<cpu, mshadow::red::maximum>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_REDUCE_AXIS(argmin)
-.describe(R"code(Returns indices of the minimum values along an axis.
+    .describe(R"code(Returns indices of the minimum values along an axis.
 
 In the case of multiple occurrences of minimum values, the indices corresponding to the first occurrence
 are returned.
@@ -75,12 +75,12 @@ Examples::
                                       [ 0.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", SearchAxisCompute<cpu, mshadow::red::minimum>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", SearchAxisCompute<cpu, mshadow::red::minimum>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // Legacy support
 NNVM_REGISTER_OP(argmax_channel)
-.describe(R"code(Returns argmax indices of each channel from the input array.
+    .describe(R"code(Returns argmax indices of each channel from the input array.
 
 The result will be an NDArray of shape (num_channel,).
 
@@ -95,23 +95,24 @@ Examples::
   argmax_channel(x) = [ 2.,  2.]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser([](NodeAttrs* attrs) {
-    ReduceAxisParam param;
-    param.axis = 1;
-    param.keepdims = false;
-    attrs->parsed = param;
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ReduceAxisShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", SearchAxisCompute<cpu, mshadow::red::maximum>)
-.add_argument("data", "NDArray-or-Symbol", "The input array");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser([](NodeAttrs* attrs) {
+      ReduceAxisParam param;
+      param.axis     = 1;
+      param.keepdims = false;
+      attrs->parsed  = param;
+    })
+    .set_attr<mxnet::FInferShape>("FInferShape", ReduceAxisShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", SearchAxisCompute<cpu, mshadow::red::maximum>)
+    .add_argument("data", "NDArray-or-Symbol", "The input array");
 
 NNVM_REGISTER_OP(pick)
-.add_alias("choose_element_0index")
-.add_alias("_npx_pick")
-.describe(R"code(Picks elements from an input array according to the input indices along the given axis.
+    .add_alias("choose_element_0index")
+    .add_alias("_npx_pick")
+    .describe(
+        R"code(Picks elements from an input array according to the input indices along the given axis.
 
 Given an input array of shape ``(d0, d1)`` and indices of shape ``(i0,)``, the result will be
 an output array of shape ``(i0,)`` with::
@@ -149,36 +150,36 @@ Examples::
                                  [ 6.]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<PickParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "index"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", PickOpShape)
-.set_attr<nnvm::FInferType>("FInferType", PickOpType)
-.set_attr<FCompute>("FCompute<cpu>", PickOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    if (CheckGradAllZero(ograds)) return MakeZeroGradNodes(n, ograds);
-    auto ret = MakeGradNode("_backward_pick", n, {ograds[0], n->inputs[1]},
-                            n->attrs.dict);
-    ret.emplace_back(MakeNode("zeros_like", n->attrs.name + "_index_backward",
-                     {n->inputs[1]}, nullptr, &n));
-    return ret;
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array")
-.add_argument("index", "NDArray-or-Symbol", "The index array")
-.add_arguments(PickParam::__FIELDS__());
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<PickParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "index"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", PickOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", PickOpType)
+    .set_attr<FCompute>("FCompute<cpu>", PickOpForward<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          if (CheckGradAllZero(ograds))
+            return MakeZeroGradNodes(n, ograds);
+          auto ret = MakeGradNode("_backward_pick", n, {ograds[0], n->inputs[1]}, n->attrs.dict);
+          ret.emplace_back(MakeNode(
+              "zeros_like", n->attrs.name + "_index_backward", {n->inputs[1]}, nullptr, &n));
+          return ret;
+        })
+    .add_argument("data", "NDArray-or-Symbol", "The input array")
+    .add_argument("index", "NDArray-or-Symbol", "The index array")
+    .add_arguments(PickParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_pick)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<PickParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", PickOpBackward<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<PickParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", PickOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_op_index.cu b/src/operator/tensor/broadcast_reduce_op_index.cu
index c8f2b0755fe6..cb04b4630979 100644
--- a/src/operator/tensor/broadcast_reduce_op_index.cu
+++ b/src/operator/tensor/broadcast_reduce_op_index.cu
@@ -26,22 +26,19 @@
 
 namespace mxnet {
 namespace op {
-NNVM_REGISTER_OP(argmax)
-.set_attr<FCompute>("FCompute<gpu>", SearchAxisCompute<gpu, mshadow::red::maximum>);
+NNVM_REGISTER_OP(argmax).set_attr<FCompute>("FCompute<gpu>",
+                                            SearchAxisCompute<gpu, mshadow::red::maximum>);
 
-NNVM_REGISTER_OP(argmin)
-.set_attr<FCompute>("FCompute<gpu>", SearchAxisCompute<gpu, mshadow::red::minimum>);
+NNVM_REGISTER_OP(argmin).set_attr<FCompute>("FCompute<gpu>",
+                                            SearchAxisCompute<gpu, mshadow::red::minimum>);
 
 // Legacy support
 NNVM_REGISTER_OP(argmax_channel)
-.set_attr<FCompute>("FCompute<gpu>", SearchAxisCompute<gpu, mshadow::red::maximum>);
+    .set_attr<FCompute>("FCompute<gpu>", SearchAxisCompute<gpu, mshadow::red::maximum>);
 
-NNVM_REGISTER_OP(pick)
-.set_attr<FCompute>("FCompute<gpu>", PickOpForward<gpu>);
+NNVM_REGISTER_OP(pick).set_attr<FCompute>("FCompute<gpu>", PickOpForward<gpu>);
 
-
-NNVM_REGISTER_OP(_backward_pick)
-.set_attr<FCompute>("FCompute<gpu>", PickOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_pick).set_attr<FCompute>("FCompute<gpu>", PickOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_op_value.cc b/src/operator/tensor/broadcast_reduce_op_value.cc
index 71be8f814f3b..9b1d054b5c55 100644
--- a/src/operator/tensor/broadcast_reduce_op_value.cc
+++ b/src/operator/tensor/broadcast_reduce_op_value.cc
@@ -32,18 +32,14 @@ DMLC_REGISTER_PARAMETER(BroadcastAxesParam);
 DMLC_REGISTER_PARAMETER(BroadcastToParam);
 DMLC_REGISTER_PARAMETER(BroadcastLikeParam);
 
-template<typename DType>
-void BroadcastAxisKer(DType* src,
-                      DType* dst,
-                      index_t outer,
-                      index_t inner,
-                      index_t size) {
+template <typename DType>
+void BroadcastAxisKer(DType* src, DType* dst, index_t outer, index_t inner, index_t size) {
 #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t i = 0; i < outer * size; i++) {
     const index_t m = i / size;
     const index_t n = i % size;
-    void* offset = reinterpret_cast<void*>(dst + m * size * inner + n * inner);
-    memcpy(offset, reinterpret_cast<void*>(src + m * inner), inner * sizeof (DType));
+    void* offset    = reinterpret_cast<void*>(dst + m * size * inner + n * inner);
+    memcpy(offset, reinterpret_cast<void*>(src + m * inner), inner * sizeof(DType));
   }
 }
 
@@ -56,8 +52,8 @@ inline void BroadcastAxisComputeCPU(const nnvm::NodeAttrs& attrs,
   const BroadcastAxesParam& param = nnvm::get<BroadcastAxesParam>(attrs.parsed);
   if (param.axis.ndim() == 1 && inputs[0].shape_[param.axis[0]] == 1 && req[0] == kWriteTo) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      auto dst = outputs[0].dptr<DType>();
-      auto src = inputs[0].dptr<DType>();
+      auto dst      = outputs[0].dptr<DType>();
+      auto src      = inputs[0].dptr<DType>();
       index_t outer = inputs[0].shape_.ProdShape(0, param.axis[0]);
       index_t inner = inputs[0].shape_.ProdShape(param.axis[0], inputs[0].shape_.ndim());
       BroadcastAxisKer(src, dst, outer, inner, param.size[0]);
@@ -68,8 +64,8 @@ inline void BroadcastAxisComputeCPU(const nnvm::NodeAttrs& attrs,
 }
 
 MXNET_OPERATOR_REGISTER_BROADCAST(broadcast_axis)
-.add_alias("broadcast_axes")
-.describe(R"code(Broadcasts the input array over particular axes.
+    .add_alias("broadcast_axes")
+    .describe(R"code(Broadcasts the input array over particular axes.
 
 Broadcasting is allowed on axes with size 1, such as from `(2,1,3,1)` to
 `(2,8,3,9)`. Elements will be duplicated on the broadcasted axes.
@@ -91,13 +87,13 @@ Example::
                                                 [[ 1.,  1.,  1.],
                                                  [ 2.,  2.,  2.]]]
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<BroadcastAxesParam>)
-.add_arguments(BroadcastAxesParam::__FIELDS__())
-.set_attr<mxnet::FInferShape>("FInferShape", BroadcastAxesShape)
-.set_attr<FCompute>("FCompute<cpu>", BroadcastAxisComputeCPU);
+    .set_attr_parser(ParamParser<BroadcastAxesParam>)
+    .add_arguments(BroadcastAxesParam::__FIELDS__())
+    .set_attr<mxnet::FInferShape>("FInferShape", BroadcastAxesShape)
+    .set_attr<FCompute>("FCompute<cpu>", BroadcastAxisComputeCPU);
 
 MXNET_OPERATOR_REGISTER_BROADCAST(broadcast_to)
-.describe(R"code(Broadcasts the input array to a new shape.
+    .describe(R"code(Broadcasts the input array to a new shape.
 
 Broadcasting is a mechanism that allows NDArrays to perform arithmetic operations
 with arrays of different shapes efficiently without creating multiple copies of arrays.
@@ -115,53 +111,52 @@ The dimension which you do not want to change can also be kept as `0` which mean
 So with `shape=(2,0)`, we will obtain the same result as in the above example.
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<BroadcastToParam>)
-.add_arguments(BroadcastToParam::__FIELDS__())
-.set_attr<mxnet::FInferShape>("FInferShape", BroadcastToShape)
-.set_attr<FCompute>("FCompute<cpu>", BroadcastCompute<cpu>);
+    .set_attr_parser(ParamParser<BroadcastToParam>)
+    .add_arguments(BroadcastToParam::__FIELDS__())
+    .set_attr<mxnet::FInferShape>("FInferShape", BroadcastToShape)
+    .set_attr<FCompute>("FCompute<cpu>", BroadcastCompute<cpu>);
 
 // backward op for broadcast.
 NNVM_REGISTER_OP(_broadcast_backward)
-.set_attr_parser(ParamParser<ReduceAxesParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::sum>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  });
+    .set_attr_parser(ParamParser<ReduceAxesParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::sum>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(broadcast_like)
-.add_alias("_npx_broadcast_like")
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-    [](const NodeAttrs& attrs) {
-      return std::vector<std::string>{"lhs", "rhs"};
-    })
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 2) << " in operator " << attrs.name;
-  std::vector<int> checked_in_attrs = { (*in_attrs)[0] };
-  bool ret = !type_is_none((*in_attrs)[1]) &&
-             ElemwiseType<1, 1>(attrs, &checked_in_attrs, out_attrs);
-  (*in_attrs)[0] = checked_in_attrs[0];
-  return ret;
-})
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n,
-    const std::vector<nnvm::NodeEntry>& ograds) {
-      if (CheckGradAllZero(ograds))
-        return MakeZeroGradNodes(n, ograds);
-      std::vector<nnvm::NodeEntry> lhs = MakeNonlossGradNode("_broadcast_backward", n, ograds, {},
-            {{"keepdims", "true"}});
-      lhs.emplace_back(MakeNode("zeros_like", n->attrs.name + "_rhs_backward",
-                       {n->inputs[1]}, nullptr, &n));
-      return lhs;
-    })
-.add_argument("lhs", "NDArray-or-Symbol", "First input.")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input.")
-.describe(R"code(Broadcasts lhs to have the same shape as rhs.
+    .add_alias("_npx_broadcast_like")
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_attrs, std::vector<int>* out_attrs) {
+          CHECK_EQ(in_attrs->size(), 2) << " in operator " << attrs.name;
+          std::vector<int> checked_in_attrs = {(*in_attrs)[0]};
+          bool ret                          = !type_is_none((*in_attrs)[1]) &&
+                     ElemwiseType<1, 1>(attrs, &checked_in_attrs, out_attrs);
+          (*in_attrs)[0] = checked_in_attrs[0];
+          return ret;
+        })
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          if (CheckGradAllZero(ograds))
+            return MakeZeroGradNodes(n, ograds);
+          std::vector<nnvm::NodeEntry> lhs =
+              MakeNonlossGradNode("_broadcast_backward", n, ograds, {}, {{"keepdims", "true"}});
+          lhs.emplace_back(
+              MakeNode("zeros_like", n->attrs.name + "_rhs_backward", {n->inputs[1]}, nullptr, &n));
+          return lhs;
+        })
+    .add_argument("lhs", "NDArray-or-Symbol", "First input.")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input.")
+    .describe(R"code(Broadcasts lhs to have the same shape as rhs.
 
 Broadcasting is a mechanism that allows NDArrays to perform arithmetic operations
 with arrays of different shapes efficiently without creating multiple copies of arrays.
@@ -178,10 +173,10 @@ For example::
    broadcast_like([9], [1,2,3,4,5], lhs_axes=(0,), rhs_axes=(-1,)) = [9,9,9,9,9]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<BroadcastLikeParam>)
-.add_arguments(BroadcastLikeParam::__FIELDS__())
-.set_attr<mxnet::FInferShape>("FInferShape", BroadcastLikeShape)
-.set_attr<FCompute>("FCompute<cpu>", BroadcastCompute<cpu>);
+    .set_attr_parser(ParamParser<BroadcastLikeParam>)
+    .add_arguments(BroadcastLikeParam::__FIELDS__())
+    .set_attr<mxnet::FInferShape>("FInferShape", BroadcastLikeShape)
+    .set_attr<FCompute>("FCompute<cpu>", BroadcastCompute<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_op_value.cu b/src/operator/tensor/broadcast_reduce_op_value.cu
index f7c28341fed5..aa79cf6b769f 100644
--- a/src/operator/tensor/broadcast_reduce_op_value.cu
+++ b/src/operator/tensor/broadcast_reduce_op_value.cu
@@ -27,18 +27,15 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(broadcast_axis)
-.set_attr<FCompute>("FCompute<gpu>", BroadcastCompute<gpu>);
+NNVM_REGISTER_OP(broadcast_axis).set_attr<FCompute>("FCompute<gpu>", BroadcastCompute<gpu>);
 
-NNVM_REGISTER_OP(broadcast_to)
-.set_attr<FCompute>("FCompute<gpu>", BroadcastCompute<gpu>);
+NNVM_REGISTER_OP(broadcast_to).set_attr<FCompute>("FCompute<gpu>", BroadcastCompute<gpu>);
 
-NNVM_REGISTER_OP(broadcast_like)
-.set_attr<FCompute>("FCompute<gpu>", BroadcastCompute<gpu>);
+NNVM_REGISTER_OP(broadcast_like).set_attr<FCompute>("FCompute<gpu>", BroadcastCompute<gpu>);
 
 NNVM_REGISTER_OP(_broadcast_backward)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
-                                                                              "red::sum{}", false});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity", "red::sum{}", false});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_prod_value.cc b/src/operator/tensor/broadcast_reduce_prod_value.cc
index a38f37a3e55c..f41e94e9af8d 100644
--- a/src/operator/tensor/broadcast_reduce_prod_value.cc
+++ b/src/operator/tensor/broadcast_reduce_prod_value.cc
@@ -28,34 +28,35 @@ namespace mxnet {
 namespace op {
 
 MXNET_OPERATOR_REGISTER_REDUCE(prod)
-.describe(get_reduce_axes_description("product", __LINE__))
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow_op::product>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{ "_backward_prod" });
+    .describe(get_reduce_axes_description("product", __LINE__))
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow_op::product>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_prod"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_prod)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut< cpu, mshadow_op::rdiv>);
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::rdiv>);
 
 MXNET_OPERATOR_REGISTER_REDUCE(nanprod)
-.describe(R"code(Computes the product of array elements over given axes treating Not a Numbers (``NaN``) as one.
+    .describe(
+        R"code(Computes the product of array elements over given axes treating Not a Numbers (``NaN``) as one.
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow_op::nanprod>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{ "_backward_nanprod" });
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow_op::nanprod>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_nanprod"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_nanprod)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::nanprod_grad>);
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::nanprod_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_prod_value.cu b/src/operator/tensor/broadcast_reduce_prod_value.cu
index 7e7a95b50677..6b097d0c5ed9 100644
--- a/src/operator/tensor/broadcast_reduce_prod_value.cu
+++ b/src/operator/tensor/broadcast_reduce_prod_value.cu
@@ -27,19 +27,20 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(prod)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>
-                                     {"identity", "red::product{}", false});
+NNVM_REGISTER_OP(prod).set_attr<FCompute>("FCompute<gpu>",
+                                          ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
+                                                                                   "red::product{}",
+                                                                                   false});
 
 NNVM_REGISTER_OP(_backward_prod)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::rdiv>);
+    .set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::rdiv>);
 
-NNVM_REGISTER_OP(nanprod)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>
-                                     {"identity", "red::nanprod{}", false});
+NNVM_REGISTER_OP(nanprod).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity", "red::nanprod{}", false});
 
 NNVM_REGISTER_OP(_backward_nanprod)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::nanprod_grad>);
+    .set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::nanprod_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_sum_value.cc b/src/operator/tensor/broadcast_reduce_sum_value.cc
index 53e37e437f96..70bfce8f3991 100644
--- a/src/operator/tensor/broadcast_reduce_sum_value.cc
+++ b/src/operator/tensor/broadcast_reduce_sum_value.cc
@@ -29,8 +29,8 @@ namespace op {
 
 MXNET_OPERATOR_REGISTER_REDUCE(sum)
 MXNET_ADD_SPARSE_OP_ALIAS(sum)
-.add_alias("sum_axis")
-.describe(R"code(Computes the sum of array elements over given axes.
+    .add_alias("sum_axis")
+    .describe(R"code(Computes the sum of array elements over given axes.
 
 .. Note::
 
@@ -65,52 +65,53 @@ Example::
   [ 3.  4.  5.]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::sum>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ReduceAxesOpForwardEx<cpu, mshadow::red::sum>)
-.set_attr<FInferStorageType>("FInferStorageType", ReduceAxesOpForwardStorage)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_sum"});
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::sum>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ReduceAxesOpForwardEx<cpu, mshadow::red::sum>)
+    .set_attr<FInferStorageType>("FInferStorageType", ReduceAxesOpForwardStorage)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_sum"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_sum)
-.set_num_inputs(1)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseNone<cpu>);
+    .set_num_inputs(1)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseNone<cpu>);
 
 MXNET_OPERATOR_REGISTER_REDUCE(mean)
 MXNET_ADD_SPARSE_OP_ALIAS(mean)
-.describe(get_reduce_axes_description("mean", __LINE__))
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::sum, true>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ReduceAxesOpForwardEx<cpu, mshadow::red::sum, true>)
-.set_attr<FInferStorageType>("FInferStorageType", ReduceAxesOpForwardStorage)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_mean"});
+    .describe(get_reduce_axes_description("mean", __LINE__))
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow::red::sum, true>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ReduceAxesOpForwardEx<cpu, mshadow::red::sum, true>)
+    .set_attr<FInferStorageType>("FInferStorageType", ReduceAxesOpForwardStorage)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_mean"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_mean)
-.set_num_inputs(1)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseNone<cpu, true>);
+    .set_num_inputs(1)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseNone<cpu, true>);
 
 MXNET_OPERATOR_REGISTER_REDUCE(nansum)
-.describe(R"code(Computes the sum of array elements over given axes treating Not a Numbers (``NaN``) as zero.
+    .describe(
+        R"code(Computes the sum of array elements over given axes treating Not a Numbers (``NaN``) as zero.
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow_op::nansum>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ReduceGrad{ "_backward_nansum" });
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesCompute<cpu, mshadow_op::nansum>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceGrad{"_backward_nansum"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_nansum)
-.set_num_inputs(3)
-.set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::nansum_grad>);
+    .set_num_inputs(3)
+    .set_attr<FCompute>("FCompute<cpu>", ReduceAxesBackwardUseInOut<cpu, mshadow_op::nansum_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/broadcast_reduce_sum_value.cu b/src/operator/tensor/broadcast_reduce_sum_value.cu
index 40a8ed8d17bf..bf9d166cb59e 100644
--- a/src/operator/tensor/broadcast_reduce_sum_value.cu
+++ b/src/operator/tensor/broadcast_reduce_sum_value.cu
@@ -27,26 +27,27 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(sum)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
-                                                                           "red::sum{}", false});
+NNVM_REGISTER_OP(sum).set_attr<FCompute>("FCompute<gpu>",
+                                         ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
+                                                                                  "red::sum{}",
+                                                                                  false});
 
-NNVM_REGISTER_OP(_backward_sum)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseNone<gpu>);
+NNVM_REGISTER_OP(_backward_sum).set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseNone<gpu>);
 
-NNVM_REGISTER_OP(mean)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
-                                                                           "red::sum{}", true});
+NNVM_REGISTER_OP(mean).set_attr<FCompute>("FCompute<gpu>",
+                                          ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
+                                                                                   "red::sum{}",
+                                                                                   true});
 
 NNVM_REGISTER_OP(_backward_mean)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseNone<gpu, true>);
+    .set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseNone<gpu, true>);
 
-NNVM_REGISTER_OP(nansum)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity",
-                                                                           "red::nansum{}", false});
+NNVM_REGISTER_OP(nansum).set_attr<FCompute>(
+    "FCompute<gpu>",
+    ReduceAxesRTCCompute<ReduceAxesParam, 0>{"identity", "red::nansum{}", false});
 
 NNVM_REGISTER_OP(_backward_nansum)
-.set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::nansum_grad>);
+    .set_attr<FCompute>("FCompute<gpu>", ReduceAxesBackwardUseInOut<gpu, mshadow_op::nansum_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/cast_storage-inl.h b/src/operator/tensor/cast_storage-inl.h
index aa2eb0d2711d..293b255bea0f 100644
--- a/src/operator/tensor/cast_storage-inl.h
+++ b/src/operator/tensor/cast_storage-inl.h
@@ -38,7 +38,6 @@
 #include "../nn/mkldnn/mkldnn_base-inl.h"
 #endif
 
-
 namespace mxnet {
 namespace op {
 
@@ -47,16 +46,16 @@ namespace op {
  */
 struct MarkRspRowIdx {
   // i represents the row index of the tensor data
-  template<typename DType, typename RType>
+  template <typename DType, typename RType>
   MSHADOW_CINLINE static void Map(int i,
                                   RType* row_idx,
                                   const DType* data,
                                   const nnvm::dim_t row_length) {
     using nnvm::dim_t;
-    dim_t j = 0;
+    dim_t j      = 0;
     dim_t offset = i * row_length;
     for (; j < row_length; ++j) {
-      if (data[offset+j] != 0) {
+      if (data[offset + j] != 0) {
         break;
       }
     }
@@ -82,26 +81,27 @@ inline void CastStorageDnsRspImpl(const OpContext& ctx,
   CHECK_EQ(rsp->storage_type(), kRowSparseStorage);
   CHECK_EQ(dns.shape_, rsp->shape());
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  MSHADOW_TYPE_SWITCH(dns.type_flag_, DType, {  // data type
+  MSHADOW_TYPE_SWITCH(dns.type_flag_, DType, {             // data type
     MSHADOW_IDX_TYPE_SWITCH(rsp->aux_type(kIdx), RType, {  // row idx type
-      const dim_t num_rows = dns.shape_[0];
+      const dim_t num_rows   = dns.shape_[0];
       const dim_t row_length = dns.shape_.ProdShape(1, dns.shape_.ndim());
       rsp->CheckAndAllocAuxData(kIdx, Shape1(num_rows));
       TBlob row_idx_blob = rsp->aux_data(kIdx);
-      RType* row_idx = row_idx_blob.dptr<RType>();
-      dim_t num_threads = num_rows;
-      mxnet_op::Kernel<MarkRspRowIdx, cpu>::Launch(s, num_threads,
-          row_idx, dns.dptr<DType>(), row_length);
+      RType* row_idx     = row_idx_blob.dptr<RType>();
+      dim_t num_threads  = num_rows;
+      mxnet_op::Kernel<MarkRspRowIdx, cpu>::Launch(
+          s, num_threads, row_idx, dns.dptr<DType>(), row_length);
       dim_t nnr = 0;
-      nnr = common::ParallelAccumulate(row_idx, num_rows, nnr);
+      nnr       = common::ParallelAccumulate(row_idx, num_rows, nnr);
       rsp->set_aux_shape(kIdx, Shape1(nnr));
-      if (0 == nnr) return;
+      if (0 == nnr)
+        return;
       auto storage_shape = dns.shape_;
-      storage_shape[0] = nnr;
+      storage_shape[0]   = nnr;
       rsp->CheckAndAllocData(storage_shape);
       auto dns_data = dns.get_with_shape<cpu, 2, DType>(Shape2(num_rows, row_length), s);
       auto rsp_data = rsp->data().get_with_shape<cpu, 2, DType>(Shape2(nnr, row_length), s);
-      dim_t idx = 0;
+      dim_t idx     = 0;
       for (dim_t i = 0; i < num_rows; ++i) {
         if (row_idx[i] > 0) {
           row_idx[idx] = i;
@@ -115,14 +115,14 @@ inline void CastStorageDnsRspImpl(const OpContext& ctx,
 
 // TODO(haibin) Use memcopy instead will be much faster than assigning each individual element
 struct CastStorageRspDnsKernel {
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   MSHADOW_XINLINE static void Map(int i,
                                   const nnvm::dim_t row_length,
                                   const IType* idx,
-                                  const DType *data,
+                                  const DType* data,
                                   DType* dns) {
     using nnvm::dim_t;
-    IType rid = idx[i];
+    IType rid        = idx[i];
     dim_t dns_offset = rid * row_length;
     dim_t rsp_offset = i * row_length;
     for (dim_t col = 0; col < row_length; col++) {
@@ -135,10 +135,8 @@ struct CastStorageRspDnsKernel {
  * \brief This function assumes that the memory for dns has been allocated already
  * since the shape is known at binding stage.
  */
-template<typename xpu>
-void CastStorageRspDnsImpl(const OpContext& ctx,
-                           const NDArray& rsp,
-                           TBlob* dns) {
+template <typename xpu>
+void CastStorageRspDnsImpl(const OpContext& ctx, const NDArray& rsp, TBlob* dns) {
   mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(rsp.storage_type(), kRowSparseStorage);
   using nnvm::dim_t;
@@ -148,15 +146,15 @@ void CastStorageRspDnsImpl(const OpContext& ctx,
       mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(s, dns->Size(), dns->dptr<DType>());
       if (rsp.storage_initialized()) {
         // copy over row by row
-        auto in_idx = rsp.aux_data(rowsparse::kIdx).FlatTo1D<xpu, IType>(s).dptr_;
-        auto in_data = rsp.data().dptr<DType>();
-        auto out_data = dns->dptr<DType>();
-        auto shape = rsp.shape();
-        const dim_t num_rows = rsp.aux_shape(rowsparse::kIdx).Size();
-        const dim_t row_length = shape.ProdShape(1, shape.ndim());
+        auto in_idx             = rsp.aux_data(rowsparse::kIdx).FlatTo1D<xpu, IType>(s).dptr_;
+        auto in_data            = rsp.data().dptr<DType>();
+        auto out_data           = dns->dptr<DType>();
+        auto shape              = rsp.shape();
+        const dim_t num_rows    = rsp.aux_shape(rowsparse::kIdx).Size();
+        const dim_t row_length  = shape.ProdShape(1, shape.ndim());
         const dim_t num_threads = num_rows;
-        mxnet_op::Kernel<CastStorageRspDnsKernel, xpu>::Launch(s, num_threads,
-            row_length, in_idx, in_data, out_data);
+        mxnet_op::Kernel<CastStorageRspDnsKernel, xpu>::Launch(
+            s, num_threads, row_length, in_idx, in_data, out_data);
       }
     });
   });
@@ -174,18 +172,18 @@ struct FillCsrIndPtr {
    * \param num_rows  number of rows of the dns tensor
    * \param num_cols  number of columns of the dns tensor
    */
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   MSHADOW_CINLINE static void Map(int i,
                                   IType* indptr,
                                   const DType* dns,
                                   const nnvm::dim_t num_rows,
                                   const nnvm::dim_t num_cols) {
     using nnvm::dim_t;
-    indptr[i+1] = 0;
+    indptr[i + 1]      = 0;
     const dim_t offset = i * num_cols;
     for (dim_t j = 0; j < num_cols; ++j) {
-      if (dns[offset+j] != 0) {
-        ++indptr[i+1];
+      if (dns[offset + j] != 0) {
+        ++indptr[i + 1];
       }
     }
   }
@@ -205,7 +203,7 @@ struct FillCsrColIdxAndVals {
    * \param num_rows  number of rows of the dns tensor
    * \param num_cols  number of columns of the dns tensor
    */
-  template<typename DType, typename IType, typename CType>
+  template <typename DType, typename IType, typename CType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* val,
                                   CType* col_idx,
@@ -215,10 +213,10 @@ struct FillCsrColIdxAndVals {
                                   const nnvm::dim_t num_cols) {
     using nnvm::dim_t;
     const dim_t offset = i * num_cols;
-    IType k = indptr[i];
+    IType k            = indptr[i];
     for (dim_t j = 0; j < num_cols; ++j) {
-      if (dns[offset+j] != 0) {
-        val[k] = dns[offset+j];
+      if (dns[offset + j] != 0) {
+        val[k]     = dns[offset + j];
         col_idx[k] = j;
         ++k;
       }
@@ -240,30 +238,35 @@ inline void CastStorageDnsCsrImpl(const OpContext& ctx,
   using mshadow::Shape1;
   using nnvm::dim_t;
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  MSHADOW_TYPE_SWITCH(dns.type_flag_, DType, {  // data type
+  MSHADOW_TYPE_SWITCH(dns.type_flag_, DType, {                     // data type
     MSHADOW_IDX_TYPE_SWITCH(csr->aux_type(csr::kIndPtr), IType, {  // indptr type
-      MSHADOW_IDX_TYPE_SWITCH(csr->aux_type(csr::kIdx), CType, {  // col idx type
+      MSHADOW_IDX_TYPE_SWITCH(csr->aux_type(csr::kIdx), CType, {   // col idx type
         const dim_t num_rows = dns.shape_[0];
         const dim_t num_cols = dns.shape_[1];
-        csr->CheckAndAllocAuxData(csr::kIndPtr, mshadow::Shape1(num_rows+1));
-        IType* indptr = csr->aux_data(csr::kIndPtr).dptr<IType>();
-        DType* dns_data = dns.dptr<DType>();
+        csr->CheckAndAllocAuxData(csr::kIndPtr, mshadow::Shape1(num_rows + 1));
+        IType* indptr     = csr->aux_data(csr::kIndPtr).dptr<IType>();
+        DType* dns_data   = dns.dptr<DType>();
         dim_t num_threads = num_rows;
-        mxnet_op::Kernel<FillCsrIndPtr, cpu>::Launch(s, num_threads,
-            indptr, dns_data, num_rows, num_cols);
+        mxnet_op::Kernel<FillCsrIndPtr, cpu>::Launch(
+            s, num_threads, indptr, dns_data, num_rows, num_cols);
         // single thread to accumulate indptr
         // indptr[num_rows] indicates the number of non-zero elements
         indptr[0] = 0;
         for (dim_t i = 0; i < num_rows; ++i) {
-          indptr[i+1] += indptr[i];
+          indptr[i + 1] += indptr[i];
         }
         // allocate column idx array and value array
         csr->CheckAndAllocAuxData(csr::kIdx, Shape1(static_cast<index_t>(indptr[num_rows])));
         csr->CheckAndAllocData(Shape1(static_cast<index_t>(indptr[num_rows])));
         // fill col_idx and value arrays of the csr
-        mxnet_op::Kernel<FillCsrColIdxAndVals, cpu>::Launch(s, num_threads,
-            csr->data().dptr<DType>(), csr->aux_data(csr::kIdx).dptr<CType>(),
-            indptr, dns_data, num_rows, num_cols);
+        mxnet_op::Kernel<FillCsrColIdxAndVals, cpu>::Launch(s,
+                                                            num_threads,
+                                                            csr->data().dptr<DType>(),
+                                                            csr->aux_data(csr::kIdx).dptr<CType>(),
+                                                            indptr,
+                                                            dns_data,
+                                                            num_rows,
+                                                            num_cols);
       });
     });
   });
@@ -282,7 +285,7 @@ struct CopyCsrDataToDns {
    * \param csr_data  data blob of the csr tensor
    * \param num_cols  number of columns of the dns tensor
    */
-  template<typename DType, typename IType, typename CType>
+  template <typename DType, typename IType, typename CType>
   MSHADOW_XINLINE static void Map(index_t i,
                                   DType* dns_data,
                                   const CType* col_idx,
@@ -290,8 +293,8 @@ struct CopyCsrDataToDns {
                                   const DType* csr_data,
                                   const nnvm::dim_t num_cols) {
     const nnvm::dim_t offset = i * num_cols;
-    for (IType j = indptr[i]; j < indptr[i+1]; ++j) {
-      dns_data[offset+col_idx[j]] = csr_data[j];
+    for (IType j = indptr[i]; j < indptr[i + 1]; ++j) {
+      dns_data[offset + col_idx[j]] = csr_data[j];
     }
   }
 };
@@ -299,31 +302,30 @@ struct CopyCsrDataToDns {
 /*!
  * \brief Casts a csr matrix to dns format.
  */
-template<typename xpu>
-void CastStorageCsrDnsImpl(const OpContext& ctx,
-                           const NDArray& csr,
-                           TBlob* dns) {
+template <typename xpu>
+void CastStorageCsrDnsImpl(const OpContext& ctx, const NDArray& csr, TBlob* dns) {
   CHECK(dns != nullptr);
   CHECK_EQ(csr.storage_type(), kCSRStorage);
   CHECK_EQ(dns->shape_.ndim(), 2);
   CHECK_EQ(dns->shape_, csr.shape());
   using nnvm::dim_t;
   mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
-  MSHADOW_TYPE_SWITCH(dns->type_flag_, DType, {  // data type
+  MSHADOW_TYPE_SWITCH(dns->type_flag_, DType, {                   // data type
     MSHADOW_IDX_TYPE_SWITCH(csr.aux_type(csr::kIndPtr), IType, {  // indptr type
-      MSHADOW_IDX_TYPE_SWITCH(csr.aux_type(csr::kIdx), CType, {  // col idx type
+      MSHADOW_IDX_TYPE_SWITCH(csr.aux_type(csr::kIdx), CType, {   // col idx type
         const dim_t num_rows = dns->shape_[0];
         const dim_t num_cols = dns->shape_[1];
-        DType* dns_data = dns->dptr<DType>();
-        dim_t num_threads = dns->shape_.Size();
+        DType* dns_data      = dns->dptr<DType>();
+        dim_t num_threads    = dns->shape_.Size();
         mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(s, num_threads, dns_data);
-        if (!csr.storage_initialized()) return;
-        const IType* indptr = csr.aux_data(csr::kIndPtr).dptr<IType>();
-        const CType* col_idx = csr.aux_data(csr::kIdx).dptr<CType>();
+        if (!csr.storage_initialized())
+          return;
+        const IType* indptr   = csr.aux_data(csr::kIndPtr).dptr<IType>();
+        const CType* col_idx  = csr.aux_data(csr::kIdx).dptr<CType>();
         const DType* csr_data = csr.data().dptr<DType>();
-        num_threads = num_rows;
-        mxnet_op::Kernel<CopyCsrDataToDns, xpu>::Launch(s, num_threads,
-            dns_data, col_idx, indptr, csr_data, num_cols);
+        num_threads           = num_rows;
+        mxnet_op::Kernel<CopyCsrDataToDns, xpu>::Launch(
+            s, num_threads, dns_data, col_idx, indptr, csr_data, num_cols);
       });
     });
   });
@@ -333,8 +335,7 @@ void CastStorageCsrDnsImpl(const OpContext& ctx,
  * \brief Casts a csr matrix to another csr.
  */
 template <typename xpu>
-void CastStorageCsrCsrImpl(const OpContext& ctx, const NDArray& csr,
-                           NDArray* output) {
+void CastStorageCsrCsrImpl(const OpContext& ctx, const NDArray& csr, NDArray* output) {
   mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   if (!csr.storage_initialized()) {
     FillZerosCsrImpl(s, *output);
@@ -342,9 +343,9 @@ void CastStorageCsrCsrImpl(const OpContext& ctx, const NDArray& csr,
   }
   mxnet::ShapeVector aux_shapes({csr.aux_shape(csr::kIndPtr), csr.aux_shape(csr::kIdx)});
   output->CheckAndAlloc(aux_shapes);
-  const TBlob& val = output->data();
+  const TBlob& val    = output->data();
   const TBlob& indptr = output->aux_data(csr::kIndPtr);
-  const TBlob& idx = output->aux_data(csr::kIdx);
+  const TBlob& idx    = output->aux_data(csr::kIdx);
   mxnet_op::copy(s, val, csr.data());
   mxnet_op::copy(s, indptr, csr.aux_data(csr::kIndPtr));
   mxnet_op::copy(s, idx, csr.aux_data(csr::kIdx));
@@ -354,10 +355,8 @@ void CastStorageCsrCsrImpl(const OpContext& ctx, const NDArray& csr,
  * \brief Casts a rsp matrix to another rsp.
  */
 template <typename xpu>
-void CastStorageRspRspImpl(const OpContext& ctx, const NDArray& rsp,
-                           NDArray* output) {
-  CHECK_EQ(rsp.storage_type(), output->storage_type())
-      << "Copying with different storage type";
+void CastStorageRspRspImpl(const OpContext& ctx, const NDArray& rsp, NDArray* output) {
+  CHECK_EQ(rsp.storage_type(), output->storage_type()) << "Copying with different storage type";
   mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   if (!rsp.storage_initialized()) {
     FillZerosRspImpl(s, *output);
@@ -365,18 +364,16 @@ void CastStorageRspRspImpl(const OpContext& ctx, const NDArray& rsp,
   }
   auto aux_shape = rsp.aux_shape(rowsparse::kIdx);
   output->CheckAndAlloc({aux_shape});
-  const TBlob& val = output->data();
-  const TBlob& idx = output->aux_data(rowsparse::kIdx);
+  const TBlob& val      = output->data();
+  const TBlob& idx      = output->aux_data(rowsparse::kIdx);
   const TBlob& from_val = rsp.data();
   const TBlob& from_idx = rsp.aux_data(rowsparse::kIdx);
   mxnet_op::copy(s, val, from_val);
   mxnet_op::copy(s, idx, from_idx);
 }
 
-template<typename xpu>
-void CastStorageComputeImpl(const OpContext& ctx,
-                            const NDArray& input,
-                            const NDArray& output) {
+template <typename xpu>
+void CastStorageComputeImpl(const OpContext& ctx, const NDArray& input, const NDArray& output) {
   const auto src_stype = input.storage_type();
   const auto dst_stype = output.storage_type();
   if (src_stype == kRowSparseStorage && dst_stype == kDefaultStorage) {
@@ -407,8 +404,8 @@ void CastStorageComputeImpl(const OpContext& ctx,
       // data first.
       if (input.IsMKLDNNData() && input.IsView())
         tmp_input = input.Reorder2Default();
-      const mkldnn::memory *in_mem = tmp_input.GetMKLDNNData();
-      const_cast<NDArray &>(output).CopyFrom(*in_mem);
+      const mkldnn::memory* in_mem = tmp_input.GetMKLDNNData();
+      const_cast<NDArray&>(output).CopyFrom(*in_mem);
       MKLDNNStream::Get()->Submit();
     } else {
       mxnet_op::copy(ctx.get_stream<xpu>(), output.data(), input.data());
@@ -423,28 +420,26 @@ struct CastStorageParam : public dmlc::Parameter<CastStorageParam> {
   int stype;
   DMLC_DECLARE_PARAMETER(CastStorageParam) {
     DMLC_DECLARE_FIELD(stype)
-    .add_enum("default", kDefaultStorage)
-    .add_enum("row_sparse", kRowSparseStorage)
-    .add_enum("csr", kCSRStorage)
-    .describe("Output storage type.");
+        .add_enum("default", kDefaultStorage)
+        .add_enum("row_sparse", kRowSparseStorage)
+        .add_enum("csr", kCSRStorage)
+        .describe("Output storage type.");
   }
 };
 
 inline bool CastStorageInferStorageType(const nnvm::NodeAttrs& attrs,
                                         const int dev_mask,
                                         DispatchMode* dispatch_mode,
-                                        std::vector<int> *in_attrs,
-                                        std::vector<int> *out_attrs) {
+                                        std::vector<int>* in_attrs,
+                                        std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  CHECK_NE(in_attrs->at(0), kUndefinedStorage)
-    << "src ndarray's storage type must be specified";
+  CHECK_NE(in_attrs->at(0), kUndefinedStorage) << "src ndarray's storage type must be specified";
   const CastStorageParam& param = nnvm::get<CastStorageParam>(attrs.parsed);
-  CHECK_NE(param.stype, kUndefinedStorage)
-    << "dst ndarray's storage type must be specified";
-  const auto& in_stype = in_attrs->at(0);
+  CHECK_NE(param.stype, kUndefinedStorage) << "dst ndarray's storage type must be specified";
+  const auto& in_stype    = in_attrs->at(0);
   const auto& param_stype = static_cast<NDArrayStorageType>(param.stype);
-  bool dispatched = false;
+  bool dispatched         = false;
   // dns -> dns, dns -> rsp, dns -> csr
   if (!dispatched && in_stype == kDefaultStorage && param_stype == kDefaultStorage) {
     // dns -> dns
@@ -458,27 +453,27 @@ inline bool CastStorageInferStorageType(const nnvm::NodeAttrs& attrs,
     dispatched = storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, mode);
   }
   if (!dispatched && in_stype == kDefaultStorage &&
-    (param_stype == kRowSparseStorage || param_stype == kCSRStorage)) {
+      (param_stype == kRowSparseStorage || param_stype == kCSRStorage)) {
     // dns -> rsp, dns -> csr
-    dispatched = storage_type_assign(out_attrs, param_stype,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(out_attrs, param_stype, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched && in_stype == kRowSparseStorage &&
       (param_stype == kRowSparseStorage || param_stype == kDefaultStorage)) {
     // rsp -> rsp, rsp -> dns
-    dispatched = storage_type_assign(out_attrs, param_stype,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(out_attrs, param_stype, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched && in_stype == kCSRStorage &&
       (param_stype == kCSRStorage || param_stype == kDefaultStorage)) {
     // csr -> csr, csr -> dns
-    dispatched = storage_type_assign(out_attrs, param_stype,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(out_attrs, param_stype, dispatch_mode, DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
 
-template<typename xpu>
+template <typename xpu>
 void CastStorageComputeEx(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
@@ -486,7 +481,8 @@ void CastStorageComputeEx(const nnvm::NodeAttrs& attrs,
                           const std::vector<NDArray>& outputs) {
   CHECK_EQ(inputs.size(), 1);
   CHECK_EQ(outputs.size(), 1);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   CHECK_EQ(req[0], kWriteTo) << "CastStorageComputeEx expects req[0] == kWriteTo";
   CastStorageComputeImpl<xpu>(ctx, inputs[0], outputs[0]);
 }
diff --git a/src/operator/tensor/cast_storage.cc b/src/operator/tensor/cast_storage.cc
index ce5025696619..c46103608c60 100644
--- a/src/operator/tensor/cast_storage.cc
+++ b/src/operator/tensor/cast_storage.cc
@@ -32,7 +32,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(CastStorageParam);
 NNVM_REGISTER_OP(cast_storage)
 MXNET_ADD_SPARSE_OP_ALIAS(cast_storage)
-.describe(R"code(Casts tensor storage type to the new type.
+    .describe(R"code(Casts tensor storage type to the new type.
 
 When an NDArray with default storage type is cast to csr or row_sparse storage,
 the result is compact, which means:
@@ -69,22 +69,22 @@ Example::
     csr.indptr = [0, 1, 3, 3, 3]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<CastStorageParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", CastStorageInferStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", CastStorageComputeEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(CastStorageParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<CastStorageParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", CastStorageInferStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", CastStorageComputeEx<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(CastStorageParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/cast_storage.cu b/src/operator/tensor/cast_storage.cu
index 48e387b264d7..938585e84d46 100644
--- a/src/operator/tensor/cast_storage.cu
+++ b/src/operator/tensor/cast_storage.cu
@@ -28,8 +28,8 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(cast_storage)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", CastStorageComputeEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", CastStorageComputeEx<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/control_flow_op.cc b/src/operator/tensor/control_flow_op.cc
index 8f54aba57c35..89a358c96b21 100644
--- a/src/operator/tensor/control_flow_op.cc
+++ b/src/operator/tensor/control_flow_op.cc
@@ -29,7 +29,7 @@ namespace op {
 
 NNVM_REGISTER_OP(where)
 MXNET_ADD_SPARSE_OP_ALIAS(where)
-.describe(R"code(Return the elements, either from x or y, depending on the condition.
+    .describe(R"code(Return the elements, either from x or y, depending on the condition.
 
 Given three ndarrays, condition, x, and y, return an ndarray with the elements from x or y,
 depending on the elements from condition are true or false. x and y must have the same shape.
@@ -55,56 +55,56 @@ Examples::
   where(csr_cond, x, y) = [[5, 2], [3, 8]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"condition", "x", "y"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", WhereOpShape)
-.set_attr<nnvm::FInferType>("FInferType", WhereOpType)
-.set_attr<FInferStorageType>("FInferStorageType", WhereOpForwardStorageType)
-.set_attr<FCompute>("FCompute<cpu>", WhereOpForward<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", WhereOpForwardEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  // Use the following lambda function instead of ElemwiseGradUseIn
-  // for best efficiency. grad[condition] = 0; to calculate grad[x] and grad[y]
-  // we need only condition from input.
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    std::vector<nnvm::NodeEntry> ret;
-    // make zero grad node for grad[condition]
-    auto p = MakeNode("zeros_like", n->attrs.name + "_cond_backward",
-                      {n->inputs[0]}, nullptr, &n);
-    ret.emplace_back(p);
-
-    // make grad nodes for grad[x] and grad[y]
-    std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
-    heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
-    p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_backward_where");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->attrs.dict = n->attrs.dict;
-    if (p->op()->attr_parser != nullptr) {
-      p->op()->attr_parser(&(p->attrs));
-    }
-    p->control_deps.emplace_back(n);
-    p->inputs = std::move(heads);
-    ret.emplace_back(p, 0, 0);
-    ret.emplace_back(p, 1, 0);
-    return ret;
-  })
-.add_argument("condition", "NDArray-or-Symbol", "condition array")
-.add_argument("x", "NDArray-or-Symbol", "")
-.add_argument("y", "NDArray-or-Symbol", "");
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"condition", "x", "y"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", WhereOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", WhereOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", WhereOpForwardStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", WhereOpForward<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", WhereOpForwardEx<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        // Use the following lambda function instead of ElemwiseGradUseIn
+        // for best efficiency. grad[condition] = 0; to calculate grad[x] and grad[y]
+        // we need only condition from input.
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> ret;
+          // make zero grad node for grad[condition]
+          auto p =
+              MakeNode("zeros_like", n->attrs.name + "_cond_backward", {n->inputs[0]}, nullptr, &n);
+          ret.emplace_back(p);
+
+          // make grad nodes for grad[x] and grad[y]
+          std::vector<nnvm::NodeEntry> heads(ograds.begin(), ograds.end());
+          heads.push_back(n->inputs[0]);  // only need condition to calculate gradients
+          p             = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_backward_where");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->attrs.dict = n->attrs.dict;
+          if (p->op()->attr_parser != nullptr) {
+            p->op()->attr_parser(&(p->attrs));
+          }
+          p->control_deps.emplace_back(n);
+          p->inputs = std::move(heads);
+          ret.emplace_back(p, 0, 0);
+          ret.emplace_back(p, 1, 0);
+          return ret;
+        })
+    .add_argument("condition", "NDArray-or-Symbol", "condition array")
+    .add_argument("x", "NDArray-or-Symbol", "")
+    .add_argument("y", "NDArray-or-Symbol", "");
 
 NNVM_REGISTER_OP(_backward_where)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", WhereOpBackwardStorageType)
-.set_attr<FCompute>("FCompute<cpu>", WhereOpBackward<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", WhereOpBackwardEx<cpu>);
-
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", WhereOpBackwardStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", WhereOpBackward<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", WhereOpBackwardEx<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/control_flow_op.cu b/src/operator/tensor/control_flow_op.cu
index 6371b62d489a..5795c5a04430 100644
--- a/src/operator/tensor/control_flow_op.cu
+++ b/src/operator/tensor/control_flow_op.cu
@@ -28,12 +28,12 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(where)
-.set_attr<FCompute>("FCompute<gpu>", WhereOpForward<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", WhereOpForwardEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", WhereOpForward<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", WhereOpForwardEx<gpu>);
 
 NNVM_REGISTER_OP(_backward_where)
-.set_attr<FCompute>("FCompute<gpu>", WhereOpBackward<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", WhereOpBackwardEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", WhereOpBackward<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", WhereOpBackwardEx<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/control_flow_op.h b/src/operator/tensor/control_flow_op.h
index 8fda3344d8f1..5466c7f9fe72 100644
--- a/src/operator/tensor/control_flow_op.h
+++ b/src/operator/tensor/control_flow_op.h
@@ -41,14 +41,17 @@ namespace op {
  * The returned array is formed by elements from x or y
  * depending on the elements of condition.
  */
-template<int req>
+template <int req>
 struct where {
   // DType is the output data type
   // CType is condition data type
-  template<typename DType, typename CType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const CType* cond,
-                                  const DType* x, const DType* y) {
-    KERNEL_ASSIGN(out[i], req, (0 != cond[i]? x[i] : y[i]));
+  template <typename DType, typename CType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const CType* cond,
+                                  const DType* x,
+                                  const DType* y) {
+    KERNEL_ASSIGN(out[i], req, (0 != cond[i] ? x[i] : y[i]));
   }
 };
 
@@ -58,15 +61,19 @@ struct where {
  * depending on the elements of condition.
  * The condition is a csr matrix, while x and y are both dense.
  */
-template<int req>
+template <int req>
 struct where_csr {
   // DType is the output data type
   // CType is condition data type
   // i is for i-th row in the output
-  template<typename DType, typename CType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const IType* cond_idx,
-                                  const IType* cond_indptr, const CType* cond_data,
-                                  const nnvm::dim_t num_cols, const DType* x) {
+  template <typename DType, typename CType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const IType* cond_idx,
+                                  const IType* cond_indptr,
+                                  const CType* cond_data,
+                                  const nnvm::dim_t num_cols,
+                                  const DType* x) {
     using nnvm::dim_t;
     const dim_t offset = i * num_cols;
     for (dim_t j = cond_indptr[i]; j < cond_indptr[i + 1]; j++) {
@@ -80,21 +87,24 @@ struct where_csr {
   }
 };
 
-
 /*! \brief Choose elements from x or y depending on condition
  * The condition is a vector whose size is the same as the
  * x's first dim size.
  * The returned array is formed by rows from x or y depending on
  * the condition's elements.
  */
-template<int req>
+template <int req>
 struct where_batch {
   // DType is the output data type
   // CType is the condition data type
-  template<typename DType, typename CType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const CType* cond,
-                                  const DType* x, const DType* y, index_t M) {
-    KERNEL_ASSIGN(out[i], req, (0 != cond[i/M]? x[i] : y[i]));
+  template <typename DType, typename CType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const CType* cond,
+                                  const DType* x,
+                                  const DType* y,
+                                  index_t M) {
+    KERNEL_ASSIGN(out[i], req, (0 != cond[i / M] ? x[i] : y[i]));
   }
 };
 
@@ -104,16 +114,16 @@ struct where_batch {
  * whether the output is grad_x (negate=true)
  * or grad_y (negate=false).
  */
-template<int req, bool negate>
+template <int req, bool negate>
 struct where_backward {
   // DType is the output data type
   // CType is condition data type
-  template<typename DType, typename CType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* grad_out,
+  template <typename DType, typename CType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* grad_out,
                                   const DType* grad_in,
                                   const CType* cond) {
-    KERNEL_ASSIGN(grad_out[i], req,
-      ((0 == cond[i])^negate)? grad_in[i] : static_cast<DType>(0));
+    KERNEL_ASSIGN(grad_out[i], req, ((0 == cond[i]) ^ negate) ? grad_in[i] : static_cast<DType>(0));
   }
 };
 
@@ -124,30 +134,30 @@ struct where_backward {
  * or grad_y (negate=false).
  * cond is a csr matrix, while others are dense ones.
  */
-template<int req, bool negate>
+template <int req, bool negate>
 struct where_backward_csr {
   // DType is the output data type
   // CType is condition data type
   // IType is condition aux data type
-  template<typename DType, typename CType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* grad_out,
+  template <typename DType, typename CType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* grad_out,
                                   const DType* grad_in,
                                   const CType* cond_data,
                                   const IType* cond_idx,
                                   const IType* cond_indptr,
                                   const nnvm::dim_t num_cols) {
     const IType offset = i * num_cols;
-    const DType zero = static_cast<DType>(0);
+    const DType zero   = static_cast<DType>(0);
     for (IType j = cond_indptr[i]; j < cond_indptr[i + 1]; j++) {
-      const IType col = cond_idx[j];
+      const IType col         = cond_idx[j];
       const IType grad_offset = offset + col;
-      KERNEL_ASSIGN(grad_out[grad_offset], req,
-        ((0 == cond_data[j])^negate)? grad_in[grad_offset] : zero);
+      KERNEL_ASSIGN(
+          grad_out[grad_offset], req, ((0 == cond_data[j]) ^ negate) ? grad_in[grad_offset] : zero);
     }
   }
 };
 
-
 /*!
  * \brief Template for calculating grad[x] and grad[y].
  * template argument req is OpReqType; negate indicates
@@ -156,36 +166,42 @@ struct where_backward_csr {
  * The condition is a vector whose size is the same as the
  * x's first dim size.
  */
-template<int req, bool negate>
+template <int req, bool negate>
 struct where_batch_backward {
   // DType is the output data type
   // CType is condition data type
-  template<typename DType, typename CType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* grad_out,
+  template <typename DType, typename CType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* grad_out,
                                   const DType* grad_in,
-                                  const CType* cond, index_t M) {
-    KERNEL_ASSIGN(grad_out[i], req,
-      ((0 == cond[i/M])^negate)? grad_in[i] : static_cast<DType>(0));
+                                  const CType* cond,
+                                  index_t M) {
+    KERNEL_ASSIGN(
+        grad_out[i], req, ((0 == cond[i / M]) ^ negate) ? grad_in[i] : static_cast<DType>(0));
   }
 };
 
 inline bool WhereOpShape(const nnvm::NodeAttrs& attrs,
                          mxnet::ShapeVector* in_attrs,
                          mxnet::ShapeVector* out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U)
-    << "where operator takes 3 arguments (" << in_attrs->size() << " given)";
+  CHECK_EQ(in_attrs->size(), 3U) << "where operator takes 3 arguments (" << in_attrs->size()
+                                 << " given)";
   CHECK_EQ(out_attrs->size(), 1U);
-  if (!mxnet::shape_is_known((*in_attrs)[0])) return false;
+  if (!mxnet::shape_is_known((*in_attrs)[0]))
+    return false;
 
   mxnet::TShape tshape((*in_attrs)[1]);
-  if (!shape_assign(&tshape, (*in_attrs)[2])) return false;
-  if (!shape_assign(&tshape, (*out_attrs)[0])) return false;
+  if (!shape_assign(&tshape, (*in_attrs)[2]))
+    return false;
+  if (!shape_assign(&tshape, (*out_attrs)[0]))
+    return false;
   SHAPE_ASSIGN_CHECK(*in_attrs, 1, tshape);
   SHAPE_ASSIGN_CHECK(*in_attrs, 2, tshape);
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, tshape);
 
   if ((*in_attrs)[0].ndim() == tshape.ndim()) {
-    if (!shape_assign(&tshape, (*in_attrs)[0])) return false;
+    if (!shape_assign(&tshape, (*in_attrs)[0]))
+      return false;
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tshape);
     return true;
   } else if ((*in_attrs)[0].ndim() == 1) {
@@ -198,15 +214,19 @@ inline bool WhereOpShape(const nnvm::NodeAttrs& attrs,
 inline bool WhereOpType(const nnvm::NodeAttrs& attrs,
                         std::vector<int>* in_attrs,
                         std::vector<int>* out_attrs) {
-  CHECK_EQ(in_attrs->size(), 3U)
-    << "where operator takes 3 arguments (" << in_attrs->size() << " given)";
+  CHECK_EQ(in_attrs->size(), 3U) << "where operator takes 3 arguments (" << in_attrs->size()
+                                 << " given)";
   CHECK_EQ(out_attrs->size(), 1U);
 
   int dtype = -1;
-  if (!type_assign(&dtype, (*in_attrs)[1])) return false;
-  if (!type_assign(&dtype, (*in_attrs)[2])) return false;
-  if (!type_assign(&dtype, (*out_attrs)[0])) return false;
-  if (-1 == dtype) return false;
+  if (!type_assign(&dtype, (*in_attrs)[1]))
+    return false;
+  if (!type_assign(&dtype, (*in_attrs)[2]))
+    return false;
+  if (!type_assign(&dtype, (*out_attrs)[0]))
+    return false;
+  if (-1 == dtype)
+    return false;
 
   TYPE_ASSIGN_CHECK(*in_attrs, 1, dtype);
   TYPE_ASSIGN_CHECK(*in_attrs, 2, dtype);
@@ -223,20 +243,20 @@ inline bool WhereOpForwardStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 1U);
   const int cond_stype = in_attrs->at(0);
-  const int x_stype = in_attrs->at(1);
-  const int y_stype = in_attrs->at(2);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const int x_stype    = in_attrs->at(1);
+  const int y_stype    = in_attrs->at(2);
+  auto& out_stype      = out_attrs->at(0);
+  bool dispatched      = false;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
     // dns, dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                     DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && cond_stype == kCSRStorage && x_stype == kDefaultStorage &&
       y_stype == kDefaultStorage) {
     // csr, dns, dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -252,17 +272,17 @@ inline bool WhereOpBackwardStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 2U);
   const auto in_grad_stype = in_attrs->at(0);
-  const auto cond_stype = in_attrs->at(1);
-  bool dispatched = false;
+  const auto cond_stype    = in_attrs->at(1);
+  bool dispatched          = false;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
     // dns, dns -> dns, dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && cond_stype == kCSRStorage && in_grad_stype == kDefaultStorage) {
     // dns, csr -> dns, dns
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -270,9 +290,7 @@ inline bool WhereOpBackwardStorageType(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-
-
-template<typename xpu>
+template <typename xpu>
 void WhereOpForward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -282,31 +300,39 @@ void WhereOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   using namespace mxnet_op;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& cond = inputs[0];
-  const TBlob& x = inputs[1];
-  const TBlob& y = inputs[2];
-  const TBlob& out = outputs[0];
-  if (out.Size() == 0) return;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob& cond       = inputs[0];
+  const TBlob& x          = inputs[1];
+  const TBlob& y          = inputs[2];
+  const TBlob& out        = outputs[0];
+  if (out.Size() == 0)
+    return;
   MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(cond.type_flag_, CType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         if (cond.shape_ == x.shape_) {
-          Kernel<where<req_type>, xpu>::Launch(s, out.Size(), out.dptr<DType>(),
-                                               cond.dptr<CType>(), x.dptr<DType>(),
+          Kernel<where<req_type>, xpu>::Launch(s,
+                                               out.Size(),
+                                               out.dptr<DType>(),
+                                               cond.dptr<CType>(),
+                                               x.dptr<DType>(),
                                                y.dptr<DType>());
         } else {
-          Kernel<where_batch<req_type>, xpu>::Launch(s, out.Size(), out.dptr<DType>(),
-                                                     cond.dptr<CType>(), x.dptr<DType>(),
-                                                     y.dptr<DType>(), x.Size()/cond.Size());
+          Kernel<where_batch<req_type>, xpu>::Launch(s,
+                                                     out.Size(),
+                                                     out.dptr<DType>(),
+                                                     cond.dptr<CType>(),
+                                                     x.dptr<DType>(),
+                                                     y.dptr<DType>(),
+                                                     x.Size() / cond.Size());
         }
       });
     });
   });
 }
 
-template<typename xpu>
-void WhereOpForwardCsrImpl(mshadow::Stream<xpu> *s,
+template <typename xpu>
+void WhereOpForwardCsrImpl(mshadow::Stream<xpu>* s,
                            const NDArray& cond,
                            const TBlob& x,
                            const TBlob& y,
@@ -314,30 +340,38 @@ void WhereOpForwardCsrImpl(mshadow::Stream<xpu> *s,
                            const TBlob& out) {
   using namespace mxnet_op;
   using namespace csr;
-  if (out.Size() == 0 || req == kNullOp) return;
+  if (out.Size() == 0 || req == kNullOp)
+    return;
   CHECK(cond.shape() == x.shape_)
-    << "WhereOpForwardCsrImpl only supports inputs of same 2-D shapes";
+      << "WhereOpForwardCsrImpl only supports inputs of same 2-D shapes";
   CHECK(req == kWriteInplace || req == kWriteTo)
-    << "WhereOpForwardCsrImpl doesn't support req = " << req;
+      << "WhereOpForwardCsrImpl doesn't support req = " << req;
   MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(cond.dtype(), CType, {
       MSHADOW_TYPE_SWITCH(cond.aux_type(kIdx), IType, {
         MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
           mshadow::Copy(out.FlatTo1D<xpu, DType>(s), y.FlatTo1D<xpu, DType>(s), s);
           // no condition is satisfied
-          if (!cond.storage_initialized()) return;
-          IType* cond_idx = cond.aux_data(kIdx).dptr<IType>();
+          if (!cond.storage_initialized())
+            return;
+          IType* cond_idx    = cond.aux_data(kIdx).dptr<IType>();
           IType* cond_indptr = cond.aux_data(kIndPtr).dptr<IType>();
-          CType* cond_data = cond.data().dptr<CType>();
-          Kernel<where_csr<req_type>, xpu>::Launch(s, cond.shape()[0], out.dptr<DType>(),
-                 cond_idx, cond_indptr, cond_data, cond.shape()[1], x.dptr<DType>());
+          CType* cond_data   = cond.data().dptr<CType>();
+          Kernel<where_csr<req_type>, xpu>::Launch(s,
+                                                   cond.shape()[0],
+                                                   out.dptr<DType>(),
+                                                   cond_idx,
+                                                   cond_indptr,
+                                                   cond_data,
+                                                   cond.shape()[1],
+                                                   x.dptr<DType>());
         });
       });
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void WhereOpForwardEx(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<NDArray>& inputs,
@@ -346,16 +380,16 @@ void WhereOpForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const int cond_stype = inputs[0].storage_type();
-  const int x_stype = inputs[1].storage_type();
-  const int y_stype = inputs[2].storage_type();
-  const auto& out_stype = outputs[0].storage_type();
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const int cond_stype    = inputs[0].storage_type();
+  const int x_stype       = inputs[1].storage_type();
+  const int y_stype       = inputs[2].storage_type();
+  const auto& out_stype   = outputs[0].storage_type();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_NE(inputs[0].shape().ndim(), 1) << "WhereOpForwardEx with 1-D cond is not implemented";
-  if (cond_stype == kCSRStorage && x_stype == kDefaultStorage &&
-      y_stype == kDefaultStorage && out_stype == kDefaultStorage) {
-    WhereOpForwardCsrImpl(s, inputs[0], inputs[1].data(), inputs[2].data(), req[0],
-                          outputs[0].data());
+  if (cond_stype == kCSRStorage && x_stype == kDefaultStorage && y_stype == kDefaultStorage &&
+      out_stype == kDefaultStorage) {
+    WhereOpForwardCsrImpl(
+        s, inputs[0], inputs[1].data(), inputs[2].data(), req[0], outputs[0].data());
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
@@ -372,7 +406,7 @@ void WhereOpForwardEx(const nnvm::NodeAttrs& attrs,
  * The outputs are gradients with respect to
  * condition, x, and y.
  */
-template<typename xpu>
+template <typename xpu>
 void WhereOpBackward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -382,41 +416,49 @@ void WhereOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   using namespace mxnet_op;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& grad_in = inputs[0];
-  const TBlob& cond = inputs[1];
-  const TBlob& grad_x = outputs[0];
-  const TBlob& grad_y = outputs[1];
-  if (grad_in.Size() == 0) return;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob& grad_in    = inputs[0];
+  const TBlob& cond       = inputs[1];
+  const TBlob& grad_x     = outputs[0];
+  const TBlob& grad_y     = outputs[1];
+  if (grad_in.Size() == 0)
+    return;
   MSHADOW_TYPE_SWITCH(grad_in.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(cond.type_flag_, CType, {
       bool same_shape = (cond.shape_ == grad_in.shape_);
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type_x, {
         if (same_shape) {
-          Kernel<where_backward<req_type_x, true>, xpu>::Launch(s, grad_in.Size(),
-            grad_x.dptr<DType>(), grad_in.dptr<DType>(), cond.dptr<CType>());
+          Kernel<where_backward<req_type_x, true>, xpu>::Launch(
+              s, grad_in.Size(), grad_x.dptr<DType>(), grad_in.dptr<DType>(), cond.dptr<CType>());
         } else {
-          Kernel<where_batch_backward<req_type_x, true>, xpu>::Launch(s, grad_in.Size(),
-            grad_x.dptr<DType>(), grad_in.dptr<DType>(), cond.dptr<CType>(),
-            grad_in.Size()/cond.Size());
+          Kernel<where_batch_backward<req_type_x, true>, xpu>::Launch(s,
+                                                                      grad_in.Size(),
+                                                                      grad_x.dptr<DType>(),
+                                                                      grad_in.dptr<DType>(),
+                                                                      cond.dptr<CType>(),
+                                                                      grad_in.Size() / cond.Size());
         }
       });
       MXNET_ASSIGN_REQ_SWITCH(req[1], req_type_y, {
         if (same_shape) {
-          Kernel<where_backward<req_type_y, false>, xpu>::Launch(s, grad_in.Size(),
-            grad_y.dptr<DType>(), grad_in.dptr<DType>(), cond.dptr<CType>());
+          Kernel<where_backward<req_type_y, false>, xpu>::Launch(
+              s, grad_in.Size(), grad_y.dptr<DType>(), grad_in.dptr<DType>(), cond.dptr<CType>());
         } else {
-          Kernel<where_batch_backward<req_type_y, false>, xpu>::Launch(s, grad_in.Size(),
-            grad_y.dptr<DType>(), grad_in.dptr<DType>(), cond.dptr<CType>(),
-            grad_in.Size()/cond.Size());
+          Kernel<where_batch_backward<req_type_y, false>, xpu>::Launch(
+              s,
+              grad_in.Size(),
+              grad_y.dptr<DType>(),
+              grad_in.dptr<DType>(),
+              cond.dptr<CType>(),
+              grad_in.Size() / cond.Size());
         }
       });
     });
   });
 }
 
-template<typename xpu>
-void WhereOpBackwardCsrImpl(mshadow::Stream<xpu> *s,
+template <typename xpu>
+void WhereOpBackwardCsrImpl(mshadow::Stream<xpu>* s,
                             const TBlob& grad_in,
                             const NDArray& cond,
                             const std::vector<OpReqType>& req,
@@ -424,9 +466,10 @@ void WhereOpBackwardCsrImpl(mshadow::Stream<xpu> *s,
                             const TBlob& grad_y) {
   using namespace mxnet_op;
   using namespace csr;
-  if (grad_in.Size() == 0) return;
+  if (grad_in.Size() == 0)
+    return;
   CHECK(cond.shape() == grad_x.shape_)
-    << "WhereOpForwardCsrImpl only supports inputs of same 2-D shapes";
+      << "WhereOpForwardCsrImpl only supports inputs of same 2-D shapes";
   CHECK_NE(req[0], kAddTo) << "WhereOpForwardCsrImpl doesn't support kAddTo";
   CHECK_NE(req[1], kAddTo) << "WhereOpForwardCsrImpl doesn't support kAddTo";
   MSHADOW_TYPE_SWITCH(grad_in.type_flag_, DType, {
@@ -437,12 +480,17 @@ void WhereOpBackwardCsrImpl(mshadow::Stream<xpu> *s,
           // some conditions are satisfied
           if (cond.storage_initialized()) {
             const IType* cond_indptr = cond.aux_data(kIndPtr).dptr<IType>();
-            const IType* cond_idx = cond.aux_data(kIdx).dptr<IType>();
-            const CType* cond_data = cond.data().dptr<CType>();
+            const IType* cond_idx    = cond.aux_data(kIdx).dptr<IType>();
+            const CType* cond_data   = cond.data().dptr<CType>();
             MXNET_ASSIGN_REQ_SWITCH(req[0], req_type_x, {
-              Kernel<where_backward_csr<req_type_x, true>, xpu>::Launch(s, cond.shape()[0],
-                grad_x.dptr<DType>(), grad_in.dptr<DType>(), cond_data, cond_idx,
-                cond_indptr, cond.shape()[1]);
+              Kernel<where_backward_csr<req_type_x, true>, xpu>::Launch(s,
+                                                                        cond.shape()[0],
+                                                                        grad_x.dptr<DType>(),
+                                                                        grad_in.dptr<DType>(),
+                                                                        cond_data,
+                                                                        cond_idx,
+                                                                        cond_indptr,
+                                                                        cond.shape()[1]);
             });
           }
         }
@@ -451,12 +499,17 @@ void WhereOpBackwardCsrImpl(mshadow::Stream<xpu> *s,
           CHECK_EQ(req[1], kWriteTo);
           if (cond.storage_initialized()) {
             const IType* cond_indptr = cond.aux_data(kIndPtr).dptr<IType>();
-            const IType* cond_idx = cond.aux_data(kIdx).dptr<IType>();
-            const CType* cond_data = cond.data().dptr<CType>();
+            const IType* cond_idx    = cond.aux_data(kIdx).dptr<IType>();
+            const CType* cond_data   = cond.data().dptr<CType>();
             MXNET_ASSIGN_REQ_SWITCH(req[1], req_type_y, {
-              Kernel<where_backward_csr<req_type_y, false>, xpu>::Launch(s, cond.shape()[0],
-                grad_y.dptr<DType>(), grad_in.dptr<DType>(), cond_data, cond_idx,
-                cond_indptr, cond.shape()[1]);
+              Kernel<where_backward_csr<req_type_y, false>, xpu>::Launch(s,
+                                                                         cond.shape()[0],
+                                                                         grad_y.dptr<DType>(),
+                                                                         grad_in.dptr<DType>(),
+                                                                         cond_data,
+                                                                         cond_idx,
+                                                                         cond_indptr,
+                                                                         cond.shape()[1]);
             });
           }
         }
@@ -465,7 +518,7 @@ void WhereOpBackwardCsrImpl(mshadow::Stream<xpu> *s,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void WhereOpBackwardEx(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<NDArray>& inputs,
@@ -474,18 +527,18 @@ void WhereOpBackwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   if (inputs[1].shape().ndim() == 1) {
     LOG(FATAL) << "WhereOpBackwardEx with 1-D cond is not implemented";
   }
   const auto grad_in_stype = inputs[0].storage_type();
-  const auto cond_stype = inputs[1].storage_type();
-  const auto grad_x_stype = outputs[0].storage_type();
-  const auto grad_y_stype = outputs[1].storage_type();
+  const auto cond_stype    = inputs[1].storage_type();
+  const auto grad_x_stype  = outputs[0].storage_type();
+  const auto grad_y_stype  = outputs[1].storage_type();
   if (grad_in_stype == kDefaultStorage && cond_stype == kCSRStorage &&
       grad_x_stype == kDefaultStorage && grad_y_stype == kDefaultStorage) {
-    WhereOpBackwardCsrImpl(s, inputs[0].data(), inputs[1], req, outputs[0].data(),
-                           outputs[1].data());
+    WhereOpBackwardCsrImpl(
+        s, inputs[0].data(), inputs[1], req, outputs[0].data(), outputs[1].data());
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
diff --git a/src/operator/tensor/diag_op-inl.h b/src/operator/tensor/diag_op-inl.h
index 73eb4e1daf54..7abe7437af4f 100644
--- a/src/operator/tensor/diag_op-inl.h
+++ b/src/operator/tensor/diag_op-inl.h
@@ -18,11 +18,11 @@
  */
 
 /*!
-* Copyright (c) 2015 by Contributors
-* \file diag_op-inl.h
-* \brief Function definition of the diag op
-* \author Istvan Fehervari, Zhijingcheng Yu
-*/
+ * Copyright (c) 2015 by Contributors
+ * \file diag_op-inl.h
+ * \brief Function definition of the diag op
+ * \author Istvan Fehervari, Zhijingcheng Yu
+ */
 
 #ifndef MXNET_OPERATOR_TENSOR_DIAG_OP_INL_H_
 #define MXNET_OPERATOR_TENSOR_DIAG_OP_INL_H_
@@ -44,25 +44,24 @@ struct DiagParam : public dmlc::Parameter<DiagParam> {
   int32_t axis1;
   int32_t axis2;
   DMLC_DECLARE_PARAMETER(DiagParam) {
-    DMLC_DECLARE_FIELD(k)
-      .set_default(0)
-      .describe("Diagonal in question. The default is 0. "
-                "Use k>0 for diagonals above the main diagonal, "
-                "and k<0 for diagonals below the main diagonal. "
-                "If input has shape (S0 S1) k must be between -S0 and S1");
-    DMLC_DECLARE_FIELD(axis1)
-      .set_default(0)
-      .describe("The first axis of the sub-arrays of interest. "
-                "Ignored when the input is a 1-D array.");
-    DMLC_DECLARE_FIELD(axis2)
-      .set_default(1)
-      .describe("The second axis of the sub-arrays of interest. "
-                "Ignored when the input is a 1-D array.");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Diagonal in question. The default is 0. "
+        "Use k>0 for diagonals above the main diagonal, "
+        "and k<0 for diagonals below the main diagonal. "
+        "If input has shape (S0 S1) k must be between -S0 and S1");
+    DMLC_DECLARE_FIELD(axis1).set_default(0).describe(
+        "The first axis of the sub-arrays of interest. "
+        "Ignored when the input is a 1-D array.");
+    DMLC_DECLARE_FIELD(axis2).set_default(1).describe(
+        "The second axis of the sub-arrays of interest. "
+        "Ignored when the input is a 1-D array.");
   }
 };
 
-inline mxnet::TShape DiagShapeImpl(const mxnet::TShape& ishape, const int k,
-                            const int32_t axis1, const int32_t axis2) {
+inline mxnet::TShape DiagShapeImpl(const mxnet::TShape& ishape,
+                                   const int k,
+                                   const int32_t axis1,
+                                   const int32_t axis2) {
   if (ishape.ndim() == 1) {
     auto s = ishape[0] + std::abs(k);
     return mxnet::TShape({s, s});
@@ -108,33 +107,30 @@ inline mxnet::TShape DiagShapeImpl(const mxnet::TShape& ishape, const int k,
 }
 
 inline bool DiagOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector* in_attrs,
-                             mxnet::ShapeVector* out_attrs) {
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
-
-    const mxnet::TShape& ishape = (*in_attrs)[0];
-    if (!mxnet::ndim_is_known(ishape)) {
-      return false;
-    }
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
+  CHECK_EQ(in_attrs->size(), 1U);
+  CHECK_EQ(out_attrs->size(), 1U);
 
-    const DiagParam& param = nnvm::get<DiagParam>(attrs.parsed);
+  const mxnet::TShape& ishape = (*in_attrs)[0];
+  if (!mxnet::ndim_is_known(ishape)) {
+    return false;
+  }
 
-    mxnet::TShape oshape = DiagShapeImpl(ishape,
-                                  param.k,
-                                  param.axis1,
-                                  param.axis2);
-    if (shape_is_none(oshape)) {
-      LOG(FATAL) << "Diagonal does not exist.";
-    }
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
+  const DiagParam& param = nnvm::get<DiagParam>(attrs.parsed);
+
+  mxnet::TShape oshape = DiagShapeImpl(ishape, param.k, param.axis1, param.axis2);
+  if (shape_is_none(oshape)) {
+    LOG(FATAL) << "Diagonal does not exist.";
+  }
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
 
-    return shape_is_known(out_attrs->at(0));
+  return shape_is_known(out_attrs->at(0));
 }
 
 inline bool DiagOpType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                       std::vector<int>* in_attrs,
+                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
 
@@ -143,17 +139,20 @@ inline bool DiagOpType(const nnvm::NodeAttrs& attrs,
   return (*out_attrs)[0] != -1;
 }
 
-template<int ndim, int req, bool back>
+template <int ndim, int req, bool back>
 struct diag {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* a,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
                                   mshadow::Shape<ndim> oshape,
                                   mshadow::Shape<ndim> ishape,
-                                  index_t stride, index_t offset,
+                                  index_t stride,
+                                  index_t offset,
                                   index_t base) {
     using namespace mxnet_op;
     index_t idx = i / base;
-    index_t j = ravel(unravel(idx, oshape), ishape) + offset + stride * (i - idx * base);
+    index_t j   = ravel(unravel(idx, oshape), ishape) + offset + stride * (i - idx * base);
     if (back) {
       KERNEL_ASSIGN(out[j], req, a[i]);
     } else {
@@ -162,11 +161,14 @@ struct diag {
   }
 };
 
-template<int req, bool back>
+template <int req, bool back>
 struct diag_gen {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* a,
-                                  mshadow::Shape<2> oshape, int k) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* a,
+                                  mshadow::Shape<2> oshape,
+                                  int k) {
     using namespace mxnet_op;
 
     auto j = unravel(i, oshape);
@@ -183,14 +185,14 @@ struct diag_gen {
   }
 };
 
-template<typename xpu, bool back>
+template <typename xpu, bool back>
 void DiagOpProcess(const TBlob& in_data,
                    const TBlob& out_data,
                    const mxnet::TShape& ishape,
                    const mxnet::TShape& oshape,
                    index_t dsize,
                    const DiagParam& param,
-                   mxnet_op::Stream<xpu> *s,
+                   mxnet_op::Stream<xpu>* s,
                    const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow;
@@ -214,9 +216,7 @@ void DiagOpProcess(const TBlob& in_data,
     // three axes, hence improving the rave and
     // unravel efficiency)
 
-    index_t oleading = 1,
-           obody = 1,
-           otrailing = 1;
+    index_t oleading = 1, obody = 1, otrailing = 1;
 
     for (uint32_t i = 0; i < minx; ++i) {
       oleading *= ishape[i];
@@ -228,12 +228,9 @@ void DiagOpProcess(const TBlob& in_data,
       otrailing *= ishape[i];
     }
 
-    index_t ileading = oleading,
-        ibody = obody * ishape[minx],
-        itrailing = otrailing * ishape[maxx];
+    index_t ileading = oleading, ibody = obody * ishape[minx], itrailing = otrailing * ishape[maxx];
 
-    index_t stride1 = itrailing * obody,
-        stride2 = otrailing;
+    index_t stride1 = itrailing * obody, stride2 = otrailing;
     // stride1 + stride2 is the stride for
     // iterating over the diagonal in question
 
@@ -258,30 +255,43 @@ void DiagOpProcess(const TBlob& in_data,
           out_data.FlatTo1D<xpu, DType>(s) = 0;
         }
         if (ileading == 1) {
-          Kernel<diag<2, req_type, back>, xpu>::Launch(s, dsize, out_data.dptr<DType>(),
-                              in_data.dptr<DType>(), Shape2(obody, otrailing),
-                              Shape2(ibody, itrailing),
-                              stride1 + stride2, offset, oshape[odim - 1]);
+          Kernel<diag<2, req_type, back>, xpu>::Launch(s,
+                                                       dsize,
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       Shape2(obody, otrailing),
+                                                       Shape2(ibody, itrailing),
+                                                       stride1 + stride2,
+                                                       offset,
+                                                       oshape[odim - 1]);
         } else {
-          Kernel<diag<3, req_type, back>, xpu>::Launch(s, dsize, out_data.dptr<DType>(),
-                              in_data.dptr<DType>(), Shape3(oleading, obody, otrailing),
-                              Shape3(ileading, ibody, itrailing),
-                              stride1 + stride2, offset, oshape[odim - 1]);
+          Kernel<diag<3, req_type, back>, xpu>::Launch(s,
+                                                       dsize,
+                                                       out_data.dptr<DType>(),
+                                                       in_data.dptr<DType>(),
+                                                       Shape3(oleading, obody, otrailing),
+                                                       Shape3(ileading, ibody, itrailing),
+                                                       stride1 + stride2,
+                                                       offset,
+                                                       oshape[odim - 1]);
         }
       });
     });
   } else {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Kernel<diag_gen<req_type, back>, xpu>::Launch(s, dsize, out_data.dptr<DType>(),
-                            in_data.dptr<DType>(), Shape2(oshape[0], oshape[1]),
-                            param.k);
+        Kernel<diag_gen<req_type, back>, xpu>::Launch(s,
+                                                      dsize,
+                                                      out_data.dptr<DType>(),
+                                                      in_data.dptr<DType>(),
+                                                      Shape2(oshape[0], oshape[1]),
+                                                      param.k);
       });
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void DiagOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -293,38 +303,37 @@ void DiagOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_EQ(req[0], kWriteTo);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  Stream<xpu>* s              = ctx.get_stream<xpu>();
+  const TBlob& in_data        = inputs[0];
+  const TBlob& out_data       = outputs[0];
   const mxnet::TShape& ishape = inputs[0].shape_;
   const mxnet::TShape& oshape = outputs[0].shape_;
-  const DiagParam& param = nnvm::get<DiagParam>(attrs.parsed);
+  const DiagParam& param      = nnvm::get<DiagParam>(attrs.parsed);
 
   DiagOpProcess<xpu, false>(in_data, out_data, ishape, oshape, out_data.Size(), param, s, req);
 }
 
-template<typename xpu>
+template <typename xpu>
 void DiagOpBackward(const nnvm::NodeAttrs& attrs,
-                  const OpContext& ctx,
-                  const std::vector<TBlob>& inputs,
-                  const std::vector<OpReqType>& req,
-                  const std::vector<TBlob>& outputs) {
+                    const OpContext& ctx,
+                    const std::vector<TBlob>& inputs,
+                    const std::vector<OpReqType>& req,
+                    const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  const TBlob& in_data        = inputs[0];
+  const TBlob& out_data       = outputs[0];
   const mxnet::TShape& ishape = inputs[0].shape_;
   const mxnet::TShape& oshape = outputs[0].shape_;
-  const DiagParam& param = nnvm::get<DiagParam>(attrs.parsed);
+  const DiagParam& param      = nnvm::get<DiagParam>(attrs.parsed);
 
   DiagOpProcess<xpu, true>(in_data, out_data, oshape, ishape, in_data.Size(), param, s, req);
 }
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/tensor/diag_op.cc b/src/operator/tensor/diag_op.cc
index 4d14cbc29140..95aff241f3a9 100644
--- a/src/operator/tensor/diag_op.cc
+++ b/src/operator/tensor/diag_op.cc
@@ -18,11 +18,11 @@
  */
 
 /*!
-* Copyright (c) 2015 by Contributors
-* \file diag_op.cc
-* \brief CPU implementation of diag operator
-* \author Istvan Fehervari, Zhijingcheng Yu
-*/
+ * Copyright (c) 2015 by Contributors
+ * \file diag_op.cc
+ * \brief CPU implementation of diag operator
+ * \author Istvan Fehervari, Zhijingcheng Yu
+ */
 
 #include "./diag_op-inl.h"
 
@@ -32,7 +32,7 @@ namespace op {
 DMLC_REGISTER_PARAMETER(DiagParam);
 
 NNVM_REGISTER_OP(diag)
-.describe(R"code(Extracts a diagonal or constructs a diagonal array.
+    .describe(R"code(Extracts a diagonal or constructs a diagonal array.
 
 ``diag``'s behavior depends on the input array dimensions:
 
@@ -85,28 +85,26 @@ Examples::
                                  [5, 8]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<DiagParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", DiagOpShape)
-.set_attr<nnvm::FInferType>("FInferType", DiagOpType)
-.set_attr<FCompute>("FCompute<cpu>", DiagOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_diag"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(DiagParam::__FIELDS__());
-
+    .set_attr_parser(ParamParser<DiagParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", DiagOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", DiagOpType)
+    .set_attr<FCompute>("FCompute<cpu>", DiagOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_diag"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(DiagParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_diag)
-.set_attr_parser(ParamParser<DiagParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", DiagOpBackward<cpu>);
-
+    .set_attr_parser(ParamParser<DiagParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", DiagOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/diag_op.cu b/src/operator/tensor/diag_op.cu
index c7db3d9970a2..37c1b12afbde 100644
--- a/src/operator/tensor/diag_op.cu
+++ b/src/operator/tensor/diag_op.cu
@@ -18,22 +18,20 @@
  */
 
 /*!
-* Copyright (c) 2015 by Contributors
-* \file diag_op.cu
-* \brief GPU Implementation of the diag operator
-* \author Istvan Fehervari
-*/
+ * Copyright (c) 2015 by Contributors
+ * \file diag_op.cu
+ * \brief GPU Implementation of the diag operator
+ * \author Istvan Fehervari
+ */
 
 #include "./diag_op-inl.h"
 
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(diag)
-.set_attr<FCompute>("FCompute<gpu>", DiagOpForward<gpu>);
+NNVM_REGISTER_OP(diag).set_attr<FCompute>("FCompute<gpu>", DiagOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_diag)
-.set_attr<FCompute>("FCompute<gpu>", DiagOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_diag).set_attr<FCompute>("FCompute<gpu>", DiagOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/dot-inl.h b/src/operator/tensor/dot-inl.h
index f60a18d90444..839b84c9c4d6 100644
--- a/src/operator/tensor/dot-inl.h
+++ b/src/operator/tensor/dot-inl.h
@@ -50,24 +50,24 @@ struct DotParam : public dmlc::Parameter<DotParam> {
   dmlc::optional<int> forward_stype;
   DMLC_DECLARE_PARAMETER(DotParam) {
     DMLC_DECLARE_FIELD(transpose_a)
-      .describe("If true then transpose the first input before dot.")
-      .set_default(false);
+        .describe("If true then transpose the first input before dot.")
+        .set_default(false);
     DMLC_DECLARE_FIELD(transpose_b)
-      .describe("If true then transpose the second input before dot.")
-      .set_default(false);
+        .describe("If true then transpose the second input before dot.")
+        .set_default(false);
     DMLC_DECLARE_FIELD(forward_stype)
-      .describe("The desired storage type of the forward output given by user, if the"
-                "combination of input storage types and this hint does not match"
-                "any implemented ones, the dot operator will perform fallback operation"
-                "and still produce an output of the desired storage type.")
-      .add_enum("default", kDefaultStorage)
-      .add_enum("row_sparse", kRowSparseStorage)
-      .add_enum("csr", kCSRStorage)
-      .set_default(dmlc::optional<int>());
+        .describe(
+            "The desired storage type of the forward output given by user, if the"
+            "combination of input storage types and this hint does not match"
+            "any implemented ones, the dot operator will perform fallback operation"
+            "and still produce an output of the desired storage type.")
+        .add_enum("default", kDefaultStorage)
+        .add_enum("row_sparse", kRowSparseStorage)
+        .add_enum("csr", kCSRStorage)
+        .set_default(dmlc::optional<int>());
   }
   bool operator==(const DotParam& other) const {
-    return this->transpose_a == other.transpose_a &&
-           this->transpose_b == other.transpose_b &&
+    return this->transpose_a == other.transpose_a && this->transpose_b == other.transpose_b &&
            this->forward_stype == other.forward_stype;
   }
   std::string ForwardStype2String(int forward_stype) {
@@ -99,7 +99,7 @@ struct DotParam : public dmlc::Parameter<DotParam> {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void DotForward_(const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<TBlob>& inputs,
@@ -108,48 +108,43 @@ void DotForward_(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
   CHECK_EQ(outputs[0].type_flag_, inputs[0].type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK_EQ(outputs[0].type_flag_, inputs[1].type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK(outputs[0].type_flag_ == kFloat32 || outputs[0].type_flag_ == kFloat64 ||
-      (outputs[0].type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
+        (outputs[0].type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
       << "dot only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     // VectorDot() with fp16 is not supported in mshadow. Dispatch to dot() instead.
     if (inputs[0].ndim() == 1 && inputs[1].ndim() == 1 && inputs[0].type_flag_ != kFloat16) {
       CHECK_NE(req[0], kAddTo) << "AddTo not yet supported";
       Tensor<xpu, 1, DType> out = outputs[0].get<xpu, 1, DType>(s);
-      VectorDot(out,
-                inputs[0].get<xpu, 1, DType>(s),
-                inputs[1].get<xpu, 1, DType>(s));
+      VectorDot(out, inputs[0].get<xpu, 1, DType>(s), inputs[1].get<xpu, 1, DType>(s));
     } else {
       index_t ma, na, mb, nb, m, n;
       if (param.transpose_a) {
         ma = inputs[0].size(0);
-        na = inputs[0].Size()/ma;
-        m = na;
+        na = inputs[0].Size() / ma;
+        m  = na;
       } else {
-        na = inputs[0].size(inputs[0].ndim()-1);
-        ma = inputs[0].Size()/na;
-        m = ma;
+        na = inputs[0].size(inputs[0].ndim() - 1);
+        ma = inputs[0].Size() / na;
+        m  = ma;
       }
       if (param.transpose_b) {
-        nb = inputs[1].size(inputs[1].ndim()-1);
-        mb = inputs[1].Size()/nb;
-        n = mb;
+        nb = inputs[1].size(inputs[1].ndim() - 1);
+        mb = inputs[1].Size() / nb;
+        n  = mb;
       } else {
         mb = inputs[1].size(0);
-        nb = inputs[1].Size()/mb;
-        n = nb;
+        nb = inputs[1].Size() / mb;
+        n  = nb;
       }
-      Tensor<xpu, 2, DType> input0 =
-      inputs[0].get_with_shape<xpu, 2, DType>(Shape2(ma, na), s);
-      Tensor<xpu, 2, DType> input1 =
-      inputs[1].get_with_shape<xpu, 2, DType>(Shape2(mb, nb), s);
-      Tensor<xpu, 2, DType> out =
-      outputs[0].get_with_shape<xpu, 2, DType>(Shape2(m, n), s);
+      Tensor<xpu, 2, DType> input0 = inputs[0].get_with_shape<xpu, 2, DType>(Shape2(ma, na), s);
+      Tensor<xpu, 2, DType> input1 = inputs[1].get_with_shape<xpu, 2, DType>(Shape2(mb, nb), s);
+      Tensor<xpu, 2, DType> out    = outputs[0].get_with_shape<xpu, 2, DType>(Shape2(m, n), s);
       if (param.transpose_a && param.transpose_b) {
         ASSIGN_DISPATCH(out, req[0], dot(input0.T(), input1.T()));
       } else if (!param.transpose_a && param.transpose_b) {
@@ -163,7 +158,7 @@ void DotForward_(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void DotBackward_(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
@@ -172,7 +167,7 @@ void DotBackward_(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s        = ctx.get_stream<xpu>();
   CHECK_NE(req[0], kWriteInplace);
   CHECK_NE(req[1], kWriteInplace);
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
@@ -182,40 +177,33 @@ void DotBackward_(const nnvm::NodeAttrs& attrs,
       Tensor<xpu, 1, DType> mrhs_data = inputs[2].get<xpu, 1, DType>(s);
       Tensor<xpu, 1, DType> mlhs_grad = outputs[0].get<xpu, 1, DType>(s);
       Tensor<xpu, 1, DType> mrhs_grad = outputs[1].get<xpu, 1, DType>(s);
-      ASSIGN_DISPATCH(mrhs_grad, req[1],
-                      broadcast_scalar(mout_grad, mlhs_data.shape_) * mlhs_data);
-      ASSIGN_DISPATCH(mlhs_grad, req[0],
-                      broadcast_scalar(mout_grad, mlhs_data.shape_) * mrhs_data);
+      ASSIGN_DISPATCH(mrhs_grad, req[1], broadcast_scalar(mout_grad, mlhs_data.shape_) * mlhs_data);
+      ASSIGN_DISPATCH(mlhs_grad, req[0], broadcast_scalar(mout_grad, mlhs_data.shape_) * mrhs_data);
     } else {
       int ma, na, mb, nb, m, n;
       if (param.transpose_a) {
         ma = outputs[0].size(0);
-        na = outputs[0].Size()/ma;
-        m = na;
+        na = outputs[0].Size() / ma;
+        m  = na;
       } else {
-        na = outputs[0].size(outputs[0].ndim()-1);
-        ma = outputs[0].Size()/na;
-        m = ma;
+        na = outputs[0].size(outputs[0].ndim() - 1);
+        ma = outputs[0].Size() / na;
+        m  = ma;
       }
       if (param.transpose_b) {
-        nb = outputs[1].size(outputs[1].ndim()-1);
-        mb = outputs[1].Size()/nb;
-        n = mb;
+        nb = outputs[1].size(outputs[1].ndim() - 1);
+        mb = outputs[1].Size() / nb;
+        n  = mb;
       } else {
         mb = outputs[1].size(0);
-        nb = outputs[1].Size()/mb;
-        n = nb;
+        nb = outputs[1].Size() / mb;
+        n  = nb;
       }
-      Tensor<xpu, 2, DType> mout_grad =
-      inputs[0].get_with_shape<xpu, 2, DType>(Shape2(m, n), s);
-      Tensor<xpu, 2, DType> mlhs_data =
-      inputs[1].get_with_shape<xpu, 2, DType>(Shape2(ma, na), s);
-      Tensor<xpu, 2, DType> mrhs_data =
-      inputs[2].get_with_shape<xpu, 2, DType>(Shape2(mb, nb), s);
-      Tensor<xpu, 2, DType> mlhs_grad =
-      outputs[0].get_with_shape<xpu, 2, DType>(Shape2(ma, na), s);
-      Tensor<xpu, 2, DType> mrhs_grad =
-      outputs[1].get_with_shape<xpu, 2, DType>(Shape2(mb, nb), s);
+      Tensor<xpu, 2, DType> mout_grad = inputs[0].get_with_shape<xpu, 2, DType>(Shape2(m, n), s);
+      Tensor<xpu, 2, DType> mlhs_data = inputs[1].get_with_shape<xpu, 2, DType>(Shape2(ma, na), s);
+      Tensor<xpu, 2, DType> mrhs_data = inputs[2].get_with_shape<xpu, 2, DType>(Shape2(mb, nb), s);
+      Tensor<xpu, 2, DType> mlhs_grad = outputs[0].get_with_shape<xpu, 2, DType>(Shape2(ma, na), s);
+      Tensor<xpu, 2, DType> mrhs_grad = outputs[1].get_with_shape<xpu, 2, DType>(Shape2(mb, nb), s);
       if (param.transpose_a && param.transpose_b) {
         // Gradient of z = dot(x.T, y.T)
         // dy = dot(x, dz).T = dot(dz.T, x.T)
@@ -255,45 +243,43 @@ inline bool DotForwardInferStorageType(const nnvm::NodeAttrs& attrs,
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
   // csr has many zero columns, so the result of dot(csr.T, matrix) should be
   // rsp
-  const auto& lhs_stype = in_attrs->at(0);
-  const auto& rhs_stype = in_attrs->at(1);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const auto& lhs_stype   = in_attrs->at(0);
+  const auto& rhs_stype   = in_attrs->at(1);
+  auto& out_stype         = out_attrs->at(0);
+  bool dispatched         = false;
   bool only_lhs_transpose = param.transpose_a && !param.transpose_b;
-  bool rhs_rsp_or_dns =
-      rhs_stype == kRowSparseStorage || rhs_stype == kDefaultStorage;
-  bool hint_has_value = param.forward_stype.has_value();
-  NDArrayStorageType target_stype = hint_has_value ?
-                                    static_cast<NDArrayStorageType>(param.forward_stype.value()) :
-                                    kUndefinedStorage;
-  if (!dispatched && lhs_stype == kDefaultStorage &&
-      rhs_stype == kDefaultStorage) {
+  bool rhs_rsp_or_dns     = rhs_stype == kRowSparseStorage || rhs_stype == kDefaultStorage;
+  bool hint_has_value     = param.forward_stype.has_value();
+  NDArrayStorageType target_stype =
+      hint_has_value ? static_cast<NDArrayStorageType>(param.forward_stype.value())
+                     : kUndefinedStorage;
+  if (!dispatched && lhs_stype == kDefaultStorage && rhs_stype == kDefaultStorage) {
     // dns, dns -> dns
     target_stype = hint_has_value ? target_stype : kDefaultStorage;
     if (target_stype == kDefaultStorage) {
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                       DispatchMode::kFCompute);
+      dispatched =
+          storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
     }
   }
   if (!dispatched && lhs_stype == kCSRStorage && only_lhs_transpose && rhs_rsp_or_dns) {
     // csr.T, rsp/dns -> rsp
     target_stype = hint_has_value ? target_stype : kRowSparseStorage;
     if (target_stype == kRowSparseStorage) {
-      dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                       dispatch_mode, DispatchMode::kFComputeEx);
-    // csr.T, rsp/dns -> dns
+      dispatched = storage_type_assign(
+          &out_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
+      // csr.T, rsp/dns -> dns
     } else if (target_stype == kDefaultStorage) {
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                       DispatchMode::kFComputeEx);
+      dispatched = storage_type_assign(
+          &out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
   }
-  if (!dispatched && lhs_stype == kCSRStorage && rhs_rsp_or_dns &&
-      !param.transpose_a && !param.transpose_b) {
+  if (!dispatched && lhs_stype == kCSRStorage && rhs_rsp_or_dns && !param.transpose_a &&
+      !param.transpose_b) {
     // csr, rsp/dns -> dns
     target_stype = hint_has_value ? target_stype : kDefaultStorage;
     if (target_stype == kDefaultStorage) {
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                       DispatchMode::kFComputeEx);
+      dispatched = storage_type_assign(
+          &out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
   }
   if (!dispatched && lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage &&
@@ -302,25 +288,25 @@ inline bool DotForwardInferStorageType(const nnvm::NodeAttrs& attrs,
     if (dev_mask == mshadow::cpu::kDevMask) {
       // dns, csr -> csr on CPU
       if (target_stype == kCSRStorage && !param.transpose_b) {
-        dispatched = storage_type_assign(&out_stype, kCSRStorage, dispatch_mode,
-                                         DispatchMode::kFComputeEx);
-      // dns, csr/csr.T -> dns on CPU
+        dispatched =
+            storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
+        // dns, csr/csr.T -> dns on CPU
       } else if (target_stype == kDefaultStorage) {
-        dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                         DispatchMode::kFComputeEx);
+        dispatched = storage_type_assign(
+            &out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
       }
-    // dns, csr/csr.T -> dns on GPU
+      // dns, csr/csr.T -> dns on GPU
     } else if (dev_mask == mshadow::gpu::kDevMask) {
       if (target_stype == kDefaultStorage) {
-        dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode,
-                                         DispatchMode::kFComputeEx);
+        dispatched = storage_type_assign(
+            &out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
       }
     }
   }
   if (!dispatched) {
-    target_stype = (target_stype == kUndefinedStorage)? kDefaultStorage : target_stype;
-    dispatched = storage_type_assign(&out_stype, target_stype, dispatch_mode,
-                                     DispatchMode::kFComputeFallback);
+    target_stype = (target_stype == kUndefinedStorage) ? kDefaultStorage : target_stype;
+    dispatched   = storage_type_assign(
+        &out_stype, target_stype, dispatch_mode, DispatchMode::kFComputeFallback);
   }
   return dispatched;
 }
@@ -328,18 +314,18 @@ inline bool DotForwardInferStorageType(const nnvm::NodeAttrs& attrs,
 inline bool DotBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                         const int dev_mask,
                                         DispatchMode* dispatch_mode,
-                                        std::vector<int> *in_attrs,
-                                        std::vector<int> *out_attrs) {
+                                        std::vector<int>* in_attrs,
+                                        std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 2U);
-  const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
+  const DotParam& param   = nnvm::get<DotParam>(attrs.parsed);
   const auto& ograd_stype = in_attrs->at(0);
-  const auto& lhs_stype = in_attrs->at(1);
-  const auto& rhs_stype = in_attrs->at(2);
+  const auto& lhs_stype   = in_attrs->at(1);
+  const auto& rhs_stype   = in_attrs->at(2);
   const bool no_transpose = !param.transpose_a && !param.transpose_b;
-  auto& lhs_grad_stype = out_attrs->at(0);
-  auto& rhs_grad_stype = out_attrs->at(1);
-  bool dispatched = false;
+  auto& lhs_grad_stype    = out_attrs->at(0);
+  auto& rhs_grad_stype    = out_attrs->at(1);
+  bool dispatched         = false;
   if (!dispatched && lhs_stype == kDefaultStorage && rhs_stype == kDefaultStorage &&
       ograd_stype == kDefaultStorage) {
     if (type_assign(&lhs_grad_stype, kDefaultStorage) &&
@@ -366,9 +352,8 @@ inline bool DotBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
       dispatched = true;
     }
   }
-  if (!dispatched && !param.transpose_a &&
-      lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage &&
-      ograd_stype == kDefaultStorage) {
+  if (!dispatched && !param.transpose_a && lhs_stype == kDefaultStorage &&
+      rhs_stype == kCSRStorage && ograd_stype == kDefaultStorage) {
     if (type_assign(&lhs_grad_stype, kDefaultStorage) &&
         type_assign(&rhs_grad_stype, kDefaultStorage)) {
       DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -390,7 +375,7 @@ struct DotCsrDnsDnsByRowBlocks {
    * \brief
    * \param i the i-th thread
    */
-  template<typename DType, typename IType, typename CType>
+  template <typename DType, typename IType, typename CType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   const DType* data_l,
@@ -402,16 +387,18 @@ struct DotCsrDnsDnsByRowBlocks {
                                   const nnvm::dim_t num_cols) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows) return;
+    if (seg_start >= num_rows)
+      return;
     const dim_t seg_end = std::min(seg_start + seg_len, num_rows);
     for (dim_t j = seg_start; j < seg_end; ++j) {
-      if (indptr_l[j] == indptr_l[j+1]) continue;
+      if (indptr_l[j] == indptr_l[j + 1])
+        continue;
       const dim_t offset_out = j * num_cols;
-      for (IType k = indptr_l[j]; k < indptr_l[j+1]; ++k) {
-        const DType val = data_l[k];
+      for (IType k = indptr_l[j]; k < indptr_l[j + 1]; ++k) {
+        const DType val      = data_l[k];
         const dim_t offset_r = col_idx_l[k] * num_cols;
         for (dim_t l = 0; l < num_cols; ++l) {
-          out[offset_out+l] += data_r[offset_r+l] * val;
+          out[offset_out + l] += data_r[offset_r + l] * val;
         }
       }
     }
@@ -427,7 +414,7 @@ struct DotCsrTransDnsDnsByRowBlocks {
    * \brief
    * \param i the i-th thread
    */
-  template<typename DType, typename IType, typename CType>
+  template <typename DType, typename IType, typename CType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   const DType* data_l,
@@ -440,18 +427,21 @@ struct DotCsrTransDnsDnsByRowBlocks {
                                   const nnvm::dim_t num_cols) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows) return;
+    if (seg_start >= num_rows)
+      return;
     const dim_t seg_end = (i + 1) * seg_len;
     for (dim_t j = 0; j < num_rows_l; ++j) {
-      if (indptr_l[j] == indptr_l[j+1]) continue;
+      if (indptr_l[j] == indptr_l[j + 1])
+        continue;
       const dim_t offset_r = j * num_cols;
-      for (IType k = indptr_l[j]; k < indptr_l[j+1]; ++k) {
+      for (IType k = indptr_l[j]; k < indptr_l[j + 1]; ++k) {
         const CType col_idx = col_idx_l[k];
-        if (col_idx < seg_start || col_idx >= seg_end) continue;
+        if (col_idx < seg_start || col_idx >= seg_end)
+          continue;
         const dim_t offset_out = col_idx * num_cols;
-        const DType val = data_l[k];
+        const DType val        = data_l[k];
         for (dim_t l = 0; l < num_cols; ++l) {
-          out[offset_out+l] += data_r[offset_r+l] * val;
+          out[offset_out + l] += data_r[offset_r + l] * val;
         }
       }
     }
@@ -467,7 +457,7 @@ struct DotCsrTransDnsRspByRowBlocks {
    * \brief
    * \param i the i-th thread
    */
-  template<typename DType, typename IType, typename CType, typename RType>
+  template <typename DType, typename IType, typename CType, typename RType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   nnvm::dim_t* row_flg_sum,
@@ -482,23 +472,26 @@ struct DotCsrTransDnsRspByRowBlocks {
                                   const nnvm::dim_t num_cols) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= nnr) return;
-    const dim_t seg_end = (i + 1) * seg_len;
+    if (seg_start >= nnr)
+      return;
+    const dim_t seg_end   = (i + 1) * seg_len;
     const dim_t col_start = row_idx[seg_start];
-    const dim_t col_end = seg_end >= nnr ? (row_idx[nnr-1] + 1) : row_idx[seg_end];
+    const dim_t col_end   = seg_end >= nnr ? (row_idx[nnr - 1] + 1) : row_idx[seg_end];
     for (dim_t j = 0; j < num_rows_l; ++j) {
-      if (indptr_l[j] == indptr_l[j+1]) continue;
+      if (indptr_l[j] == indptr_l[j + 1])
+        continue;
       const dim_t offset_r = j * num_cols;
-      for (IType k = indptr_l[j]; k < indptr_l[j+1]; ++k) {
+      for (IType k = indptr_l[j]; k < indptr_l[j + 1]; ++k) {
         const CType col_idx = col_idx_l[k];
-        if (col_idx < col_start || col_idx >= col_end) continue;
+        if (col_idx < col_start || col_idx >= col_end)
+          continue;
 
-        const nnvm::dim_t rsp_row = row_flg_sum[col_idx] - 1;
+        const nnvm::dim_t rsp_row    = row_flg_sum[col_idx] - 1;
         const nnvm::dim_t offset_out = rsp_row * num_cols;
-        const DType val = data_l[k];
+        const DType val              = data_l[k];
 
         for (dim_t l = 0; l < num_cols; ++l) {
-          out[offset_out+l] += data_r[offset_r+l] * val;
+          out[offset_out + l] += data_r[offset_r + l] * val;
         }
       }
     }
@@ -517,7 +510,7 @@ struct DotCsrRspDnsByRowBlocks {
    * \param num_rows  dns.shape[0]
    * \param num_cols  dns.shape[1]
    */
-  template<typename DType, typename IType, typename CType, typename RType>
+  template <typename DType, typename IType, typename CType, typename RType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   const DType* data_l,
@@ -531,19 +524,21 @@ struct DotCsrRspDnsByRowBlocks {
                                   const nnvm::dim_t seg_len) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows) return;
+    if (seg_start >= num_rows)
+      return;
     const dim_t seg_end = std::min(seg_start + seg_len, num_rows);
     for (dim_t j = seg_start; j < seg_end; ++j) {
-      if (indptr_l[j] == indptr_l[j+1]) continue;
+      if (indptr_l[j] == indptr_l[j + 1])
+        continue;
       const dim_t offset_out = j * num_cols;
       // Use binary search to find the lower_bound of val in row_idx array
       const RType* first = row_idx_r;
-      const RType* last = row_idx_r + nnr_r;
-      const CType val = col_idx_l[indptr_l[j]];
+      const RType* last  = row_idx_r + nnr_r;
+      const CType val    = col_idx_l[indptr_l[j]];
       const RType* it;
       int count = last - first, step;
       while (count > 0) {
-        it = first;
+        it   = first;
         step = count / 2;
         it += step;
         if (*it < val) {
@@ -555,12 +550,13 @@ struct DotCsrRspDnsByRowBlocks {
       }
       const RType* row_idx_ptr = first;
       // end of binary search
-      if (row_idx_ptr == row_idx_r+nnr_r || *row_idx_ptr > col_idx_l[indptr_l[j+1]-1]) continue;
-      for (IType k = indptr_l[j]; k < indptr_l[j+1] && row_idx_ptr != row_idx_r+nnr_r;) {
+      if (row_idx_ptr == row_idx_r + nnr_r || *row_idx_ptr > col_idx_l[indptr_l[j + 1] - 1])
+        continue;
+      for (IType k = indptr_l[j]; k < indptr_l[j + 1] && row_idx_ptr != row_idx_r + nnr_r;) {
         if (col_idx_l[k] == *row_idx_ptr) {
           const dim_t offset_r = (row_idx_ptr - row_idx_r) * num_cols;
           for (dim_t l = 0; l < num_cols; ++l) {
-            out[offset_out+l] += data_l[k] * data_r[offset_r+l];
+            out[offset_out + l] += data_l[k] * data_r[offset_r + l];
           }
           ++k;
           ++row_idx_ptr;
@@ -587,7 +583,7 @@ struct DotCsrTransRspRspByRowBlocks {
    * \param num_rows number of rows of out matrix
    * \param num_cols number of cols of out matrix
    */
-  template<typename DType, typename IType, typename CType, typename RType>
+  template <typename DType, typename IType, typename CType, typename RType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   RType* row_idx_out,
@@ -603,19 +599,22 @@ struct DotCsrTransRspRspByRowBlocks {
                                   const nnvm::dim_t seg_len) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows) return;
+    if (seg_start >= num_rows)
+      return;
     const dim_t seg_end = (i + 1) * seg_len;
     for (dim_t rid = 0; rid < nnr_r; ++rid) {
       const RType j = row_idx_r[rid];
-      if (indptr_l[j] == indptr_l[j+1]) continue;
+      if (indptr_l[j] == indptr_l[j + 1])
+        continue;
       const dim_t offset_r = rid * num_cols;
-      for (IType k = indptr_l[j]; k < indptr_l[j+1]; ++k) {
+      for (IType k = indptr_l[j]; k < indptr_l[j + 1]; ++k) {
         const CType col_idx = col_idx_l[k];
-        if (col_idx < seg_start || col_idx >= seg_end) continue;
-        row_idx_out[col_idx] = 1;  // mark nonzero row as 1
+        if (col_idx < seg_start || col_idx >= seg_end)
+          continue;
+        row_idx_out[col_idx]   = 1;  // mark nonzero row as 1
         const dim_t offset_out = col_idx * num_cols;
         for (dim_t l = 0; l < num_cols; ++l) {
-          out[offset_out+l] += data_r[offset_r+l] * data_l[k];
+          out[offset_out + l] += data_r[offset_r + l] * data_l[k];
         }
       }
     }
@@ -639,14 +638,17 @@ struct PopulateCsrForNNC {
    * \param num_rows_l number of rows in lhs
    */
   template <typename IType, typename CType>
-  MSHADOW_CINLINE static void Map(int i, const CType* nnc_idx,
-                                  IType* indptr_out, CType* col_idx_out,
+  MSHADOW_CINLINE static void Map(int i,
+                                  const CType* nnc_idx,
+                                  IType* indptr_out,
+                                  CType* col_idx_out,
                                   const nnvm::dim_t nnc,
                                   const nnvm::dim_t num_rows_l) {
     const CType start_idx = i * nnc;
-    nnvm::dim_t cur = 0;
-    indptr_out[i] = start_idx;
-    if (static_cast<nnvm::dim_t>(i) == (num_rows_l - 1)) indptr_out[i + 1] = indptr_out[i] + nnc;
+    nnvm::dim_t cur       = 0;
+    indptr_out[i]         = start_idx;
+    if (static_cast<nnvm::dim_t>(i) == (num_rows_l - 1))
+      indptr_out[i + 1] = indptr_out[i] + nnc;
     for (IType idx = start_idx; idx < (start_idx + nnc); idx++) {
       col_idx_out[idx] = nnc_idx[cur++];
     }
@@ -667,22 +669,30 @@ struct DotDnsCsrCsrByRowBlocks {
    */
 
   template <typename DType, typename IType, typename CType>
-  MSHADOW_CINLINE static void Map(
-      int i, DType* out, const DType* data_l, const IType* indptr_r,
-      const CType* col_idx_r, const DType* data_r, const nnvm::dim_t seg_len,
-      const IType num_rows_r, const IType num_rows_l,
-      const nnvm::dim_t num_cols, const nnvm::dim_t nnc,
-      const CType* prefix_sum) {
+  MSHADOW_CINLINE static void Map(int i,
+                                  DType* out,
+                                  const DType* data_l,
+                                  const IType* indptr_r,
+                                  const CType* col_idx_r,
+                                  const DType* data_r,
+                                  const nnvm::dim_t seg_len,
+                                  const IType num_rows_r,
+                                  const IType num_rows_l,
+                                  const nnvm::dim_t num_cols,
+                                  const nnvm::dim_t nnc,
+                                  const CType* prefix_sum) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows_l) return;
+    if (seg_start >= num_rows_l)
+      return;
     const dim_t seg_end = std::min(seg_start + seg_len, num_rows_l);
 
     for (dim_t j = seg_start; j < seg_end; j++) {
       for (dim_t k = 0; k < num_rows_r; k++) {
         const dim_t working_idx = j * num_rows_r + k;
-        const DType val = data_l[working_idx];
-        if (indptr_r[k] == indptr_r[k + 1]) continue;
+        const DType val         = data_l[working_idx];
+        if (indptr_r[k] == indptr_r[k + 1])
+          continue;
         const dim_t row_start = j * nnc;
         for (dim_t cur = indptr_r[k]; cur < indptr_r[k + 1]; cur++) {
           dim_t cur_col_idx_r = col_idx_r[cur];
@@ -713,7 +723,7 @@ struct DotDnsCsrDnsByRowBlocks {
    * \param num_rows_r  number of rows in rhs
    * \param num_cols_r  number of columns in rhs
    */
-  template<typename DType, typename IType, typename CType>
+  template <typename DType, typename IType, typename CType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   const DType* data_l,
@@ -727,15 +737,17 @@ struct DotDnsCsrDnsByRowBlocks {
                                   const nnvm::dim_t num_cols_r) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows_l) return;
+    if (seg_start >= num_rows_l)
+      return;
     const dim_t seg_end = std::min(seg_start + seg_len, num_rows_l);
     for (dim_t j = 0; j < num_rows_r; ++j) {
-      if (indptr_r[j] == indptr_r[j+1]) continue;
-      for (IType k = indptr_r[j]; k < indptr_r[j+1]; ++k) {
+      if (indptr_r[j] == indptr_r[j + 1])
+        continue;
+      for (IType k = indptr_r[j]; k < indptr_r[j + 1]; ++k) {
         const CType col_idx = col_idx_r[k];
-        const DType val = data_r[k];
+        const DType val     = data_r[k];
         for (dim_t r = seg_start; r < seg_end; ++r) {
-          out[r*num_cols_r+col_idx] += data_l[r*num_cols_l+j] * val;
+          out[r * num_cols_r + col_idx] += data_l[r * num_cols_l + j] * val;
         }
       }
     }
@@ -761,7 +773,7 @@ struct DotDnsCsrTransDnsByRowBlocks {
    * \param num_rows_r  number of rows in rhs
    * \param num_cols_r  number of columns in rhs
    */
-  template<typename DType, typename IType, typename CType>
+  template <typename DType, typename IType, typename CType>
   MSHADOW_CINLINE static void Map(int i,
                                   DType* out,
                                   const DType* data_l,
@@ -775,15 +787,17 @@ struct DotDnsCsrTransDnsByRowBlocks {
                                   const nnvm::dim_t num_cols_r) {
     using nnvm::dim_t;
     const dim_t seg_start = i * seg_len;
-    if (seg_start >= num_rows_l) return;
+    if (seg_start >= num_rows_l)
+      return;
     const dim_t seg_end = std::min(seg_start + seg_len, num_rows_l);
     for (dim_t j = 0; j < num_rows_r; ++j) {
-      if (indptr_r[j] == indptr_r[j+1]) continue;
-      for (IType k = indptr_r[j]; k < indptr_r[j+1]; ++k) {
+      if (indptr_r[j] == indptr_r[j + 1])
+        continue;
+      for (IType k = indptr_r[j]; k < indptr_r[j + 1]; ++k) {
         const CType col_idx = col_idx_r[k];
-        const DType val = data_r[k];
+        const DType val     = data_r[k];
         for (dim_t r = seg_start; r < seg_end; ++r) {
-          out[r*num_rows_r+j] += data_l[r*num_cols_l+col_idx] * val;
+          out[r * num_rows_r + j] += data_l[r * num_cols_l + col_idx] * val;
         }
       }
     }
@@ -800,7 +814,8 @@ inline void DotCsrDnsDnsImpl(const OpContext& ctx,
                              const OpReqType req,
                              const bool trans_lhs,
                              TBlob* ret) {
-  if (kNullOp == req) return;
+  if (kNullOp == req)
+    return;
   CHECK_EQ(lhs.storage_type(), kCSRStorage);
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   if (!lhs.storage_initialized()) {
@@ -810,47 +825,65 @@ inline void DotCsrDnsDnsImpl(const OpContext& ctx,
 
   using nnvm::dim_t;
 
-  const TBlob data_l = lhs.data();
-  const TBlob indptr_l = lhs.aux_data(csr::kIndPtr);
+  const TBlob data_l    = lhs.data();
+  const TBlob indptr_l  = lhs.aux_data(csr::kIndPtr);
   const TBlob col_idx_l = lhs.aux_data(csr::kIdx);
-  const TBlob& data_r = rhs;
-  const TBlob data_out = *ret;
+  const TBlob& data_r   = rhs;
+  const TBlob data_out  = *ret;
 
-  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {  // data type
-    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {  // indptr type
+  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {     // data type
+    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {     // indptr type
       MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {  // col idx type
         dim_t num_threads;
         if (kWriteTo == req) {
           num_threads = data_out.Size();
-          mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(
-              s, num_threads, data_out.dptr<DType>());
+          mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, num_threads, data_out.dptr<DType>());
         }
-        num_threads = mxnet_op::get_num_threads<cpu>(data_out.shape_[0]);
-        bool dynamic = false;
+        num_threads                        = mxnet_op::get_num_threads<cpu>(data_out.shape_[0]);
+        bool dynamic                       = false;
         const dim_t large_matrix_threshold = 1024 * 10;
         if (data_out.shape_[0] > large_matrix_threshold) {
           dynamic = true;
           // each unit of work processes at least 1024 elements in the output
           const dim_t unit_work_per_thread = 1024;
-          num_threads = data_out.Size() / unit_work_per_thread;
+          num_threads                      = data_out.Size() / unit_work_per_thread;
         }
         dim_t seg_len = (data_out.shape_[0] + num_threads - 1) / num_threads;
         if (trans_lhs) {
-          mxnet_op::Kernel<DotCsrTransDnsDnsByRowBlocks, cpu>::Launch(s, num_threads,
-              data_out.dptr<DType>(), data_l.dptr<DType>(), indptr_l.dptr<IType>(),
-              col_idx_l.dptr<CType>(), data_r.dptr<DType>(), seg_len,
-              lhs.shape()[0], data_out.shape_[0], data_out.shape_[1]);
+          mxnet_op::Kernel<DotCsrTransDnsDnsByRowBlocks, cpu>::Launch(s,
+                                                                      num_threads,
+                                                                      data_out.dptr<DType>(),
+                                                                      data_l.dptr<DType>(),
+                                                                      indptr_l.dptr<IType>(),
+                                                                      col_idx_l.dptr<CType>(),
+                                                                      data_r.dptr<DType>(),
+                                                                      seg_len,
+                                                                      lhs.shape()[0],
+                                                                      data_out.shape_[0],
+                                                                      data_out.shape_[1]);
         } else {
           if (dynamic) {
-            mxnet_op::Kernel<DotCsrDnsDnsByRowBlocks, cpu>::LaunchDynamic(s, num_threads,
-                data_out.dptr<DType>(), data_l.dptr<DType>(), indptr_l.dptr<IType>(),
-                col_idx_l.dptr<CType>(), data_r.dptr<DType>(), seg_len,
-                data_out.shape_[0], data_out.shape_[1]);
+            mxnet_op::Kernel<DotCsrDnsDnsByRowBlocks, cpu>::LaunchDynamic(s,
+                                                                          num_threads,
+                                                                          data_out.dptr<DType>(),
+                                                                          data_l.dptr<DType>(),
+                                                                          indptr_l.dptr<IType>(),
+                                                                          col_idx_l.dptr<CType>(),
+                                                                          data_r.dptr<DType>(),
+                                                                          seg_len,
+                                                                          data_out.shape_[0],
+                                                                          data_out.shape_[1]);
           } else {
-            mxnet_op::Kernel<DotCsrDnsDnsByRowBlocks, cpu>::Launch(s, num_threads,
-                data_out.dptr<DType>(), data_l.dptr<DType>(), indptr_l.dptr<IType>(),
-                col_idx_l.dptr<CType>(), data_r.dptr<DType>(), seg_len,
-                data_out.shape_[0], data_out.shape_[1]);
+            mxnet_op::Kernel<DotCsrDnsDnsByRowBlocks, cpu>::Launch(s,
+                                                                   num_threads,
+                                                                   data_out.dptr<DType>(),
+                                                                   data_l.dptr<DType>(),
+                                                                   indptr_l.dptr<IType>(),
+                                                                   col_idx_l.dptr<CType>(),
+                                                                   data_r.dptr<DType>(),
+                                                                   seg_len,
+                                                                   data_out.shape_[0],
+                                                                   data_out.shape_[1]);
           }
         }
       });
@@ -868,7 +901,8 @@ inline void DotCsrDnsRspImpl(const OpContext& ctx,
                              const OpReqType req,
                              const bool trans_lhs,
                              NDArray* ret) {
-  if (kNullOp == req) return;
+  if (kNullOp == req)
+    return;
   CHECK_EQ(lhs.storage_type(), kCSRStorage);
   CHECK_EQ(ret->storage_type(), kRowSparseStorage);
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
@@ -881,26 +915,25 @@ inline void DotCsrDnsRspImpl(const OpContext& ctx,
   using namespace mxnet_op;
   using nnvm::dim_t;
 
-  const TBlob data_l = lhs.data();
-  const TBlob indptr_l = lhs.aux_data(csr::kIndPtr);
+  const TBlob data_l    = lhs.data();
+  const TBlob indptr_l  = lhs.aux_data(csr::kIndPtr);
   const TBlob col_idx_l = lhs.aux_data(csr::kIdx);
-  const TBlob& data_r = rhs;
+  const TBlob& data_r   = rhs;
 
-  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {  // data type
-    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {  // indptr type
-      MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {  // col idx type
+  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {                 // data type
+    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {                 // indptr type
+      MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {              // col idx type
         MSHADOW_IDX_TYPE_SWITCH(ret->aux_type(rowsparse::kIdx), RType, {  // row idx type
-          const dim_t num_rows = lhs.shape()[1];
+          const dim_t num_rows  = lhs.shape()[1];
           size_t workspace_size = num_rows * sizeof(dim_t);
           mshadow::Tensor<cpu, 1, char> workspace =
-            ctx.requested[0].get_space_typed<cpu, 1, char>(
-            mshadow::Shape1(workspace_size), s);
+              ctx.requested[0].get_space_typed<cpu, 1, char>(mshadow::Shape1(workspace_size), s);
           dim_t* row_flg = reinterpret_cast<dim_t*>(workspace.dptr_);
           // prefix sum array re-uses the row_flg array temp space
           dim_t* prefix_sum = row_flg;
           Kernel<set_zero, cpu>::Launch(s, num_rows, row_flg);
-          Kernel<MarkRowFlgKernel, cpu>::Launch(s, lhs.aux_shape(csr::kIdx)[0], row_flg,
-            col_idx_l.dptr<CType>());
+          Kernel<MarkRowFlgKernel, cpu>::Launch(
+              s, lhs.aux_shape(csr::kIdx)[0], row_flg, col_idx_l.dptr<CType>());
 
           prefix_sum[0] = row_flg[0];
           for (nnvm::dim_t i = 1; i < num_rows; i++) {
@@ -915,22 +948,31 @@ inline void DotCsrDnsRspImpl(const OpContext& ctx,
 
           ret->CheckAndAlloc({mshadow::Shape1(nnr)});
           const TBlob& data_out = ret->data();
-          const TBlob& row_idx = ret->aux_data(rowsparse::kIdx);
+          const TBlob& row_idx  = ret->aux_data(rowsparse::kIdx);
 
           dim_t num_threads = data_out.Size();
           mxnet_op::Kernel<set_zero, cpu>::Launch(s, num_threads, data_out.dptr<DType>());
           RType* row_idx_out = row_idx.dptr<RType>();
 
-          mxnet_op::Kernel<FillRspRowIdxKernel, cpu>::Launch(s, num_rows,
-            row_idx_out, prefix_sum, num_rows);
+          mxnet_op::Kernel<FillRspRowIdxKernel, cpu>::Launch(
+              s, num_rows, row_idx_out, prefix_sum, num_rows);
 
-          num_threads = mxnet_op::get_num_threads<cpu>(nnr);
+          num_threads   = mxnet_op::get_num_threads<cpu>(nnr);
           dim_t seg_len = (nnr + num_threads - 1) / num_threads;
           if (trans_lhs) {
-            mxnet_op::Kernel<DotCsrTransDnsRspByRowBlocks, cpu>::Launch(s, num_threads,
-              data_out.dptr<DType>(), prefix_sum, row_idx_out, data_l.dptr<DType>(),
-              indptr_l.dptr<IType>(), col_idx_l.dptr<CType>(), data_r.dptr<DType>(),
-              seg_len, lhs.shape()[0], nnr, ret->shape()[1]);
+            mxnet_op::Kernel<DotCsrTransDnsRspByRowBlocks, cpu>::Launch(s,
+                                                                        num_threads,
+                                                                        data_out.dptr<DType>(),
+                                                                        prefix_sum,
+                                                                        row_idx_out,
+                                                                        data_l.dptr<DType>(),
+                                                                        indptr_l.dptr<IType>(),
+                                                                        col_idx_l.dptr<CType>(),
+                                                                        data_r.dptr<DType>(),
+                                                                        seg_len,
+                                                                        lhs.shape()[0],
+                                                                        nnr,
+                                                                        ret->shape()[1]);
           } else {
             LOG(FATAL) << "DotCsrDnsRspImpl has not implemented dot(csr, dns)=rsp yet.";
           }
@@ -950,7 +992,8 @@ inline void DotCsrRspDnsImpl(const OpContext& ctx,
                              const OpReqType req,
                              const bool trans_lhs,
                              TBlob* ret) {
-  if (kNullOp == req) return;
+  if (kNullOp == req)
+    return;
   // reuse csr dns implementation when storage_shape == shape for rhs
   if (rhs.storage_shape()[0] == rhs.shape()[0]) {  // if rsp is actually dense
     DotCsrDnsDnsImpl(ctx, cpu_dev, lhs, rhs.data(), req, trans_lhs, ret);
@@ -963,40 +1006,45 @@ inline void DotCsrRspDnsImpl(const OpContext& ctx,
   if (!lhs.storage_initialized() || !rhs.storage_initialized()) {
     if (kWriteTo == req) {
       MSHADOW_SGL_DBL_TYPE_SWITCH(ret->type_flag_, DType, {  // data type
-        mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(
-            s, ret->Size(), ret->dptr<DType>());
+        mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, ret->Size(), ret->dptr<DType>());
       });
     }
     return;
   }
   using nnvm::dim_t;
 
-  const TBlob data_l = lhs.data();
-  const TBlob indptr_l = lhs.aux_data(csr::kIndPtr);
+  const TBlob data_l    = lhs.data();
+  const TBlob indptr_l  = lhs.aux_data(csr::kIndPtr);
   const TBlob col_idx_l = lhs.aux_data(csr::kIdx);
-  const TBlob data_r = rhs.data();
+  const TBlob data_r    = rhs.data();
   const TBlob row_idx_r = rhs.aux_data(rowsparse::kIdx);
 
-  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {  // data type
-    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {  // indptr type
-      MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {  // col idx type
+  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {       // data type
+    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {       // indptr type
+      MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {    // col idx type
         MSHADOW_IDX_TYPE_SWITCH(row_idx_r.type_flag_, RType, {  // row idx type
           dim_t num_threads;
           if (kWriteTo == req) {
             num_threads = ret->Size();
-            mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, num_threads,
-                                                              ret->dptr<DType>());
+            mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, num_threads, ret->dptr<DType>());
           }
-          num_threads = mxnet_op::get_num_threads<cpu>(ret->shape_[0]);
+          num_threads   = mxnet_op::get_num_threads<cpu>(ret->shape_[0]);
           dim_t seg_len = (ret->shape_[0] + num_threads - 1) / num_threads;
           if (trans_lhs) {
             LOG(FATAL) << "DotCsrRspDnsImpl has not implemented dot(csr.T, rsp) = dns yet";
           } else {
-            mxnet_op::Kernel<DotCsrRspDnsByRowBlocks, cpu>::Launch(s, num_threads,
-                ret->dptr<DType>(), data_l.dptr<DType>(),
-                indptr_l.dptr<IType>(), col_idx_l.dptr<CType>(), data_r.dptr<DType>(),
-                row_idx_r.dptr<RType>(), rhs.storage_shape()[0],
-                ret->shape_[0], ret->shape_[1], seg_len);
+            mxnet_op::Kernel<DotCsrRspDnsByRowBlocks, cpu>::Launch(s,
+                                                                   num_threads,
+                                                                   ret->dptr<DType>(),
+                                                                   data_l.dptr<DType>(),
+                                                                   indptr_l.dptr<IType>(),
+                                                                   col_idx_l.dptr<CType>(),
+                                                                   data_r.dptr<DType>(),
+                                                                   row_idx_r.dptr<RType>(),
+                                                                   rhs.storage_shape()[0],
+                                                                   ret->shape_[0],
+                                                                   ret->shape_[1],
+                                                                   seg_len);
           }
         });
       });
@@ -1014,7 +1062,8 @@ inline void DotCsrRspRspImpl(const OpContext& ctx,
                              const OpReqType req,
                              const bool trans_lhs,
                              NDArray* ret) {
-  if (kNullOp == req) return;
+  if (kNullOp == req)
+    return;
   // reuse csr dns implementation when storage_shape == shape for rhs
   if (rhs.storage_shape()[0] == rhs.shape()[0]) {  // if rsp is actually dense
     DotCsrDnsRspImpl(ctx, cpu_dev, lhs, rhs.data(), req, trans_lhs, ret);
@@ -1034,45 +1083,54 @@ inline void DotCsrRspRspImpl(const OpContext& ctx,
   using mxnet_op::set_zero;
   using nnvm::dim_t;
 
-  const TBlob data_l = lhs.data();
-  const TBlob indptr_l = lhs.aux_data(csr::kIndPtr);
+  const TBlob data_l    = lhs.data();
+  const TBlob indptr_l  = lhs.aux_data(csr::kIndPtr);
   const TBlob col_idx_l = lhs.aux_data(csr::kIdx);
-  const TBlob data_r = rhs.data();
+  const TBlob data_r    = rhs.data();
   const TBlob row_idx_r = rhs.aux_data(rowsparse::kIdx);
 
   // pre-allocate spaces for ret using the dense dimension size
   if (ret->storage_type() == kRowSparseStorage) {
     ret->CheckAndAlloc({mshadow::Shape1(lhs.shape()[1])});
   }
-  const TBlob data_out = ret->data();
+  const TBlob data_out    = ret->data();
   const TBlob row_idx_out = ret->aux_data(rowsparse::kIdx);
 
-  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {  // data type
-    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {  // indptr type
-      MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {  // col idx type
+  MSHADOW_SGL_DBL_TYPE_SWITCH(data_l.type_flag_, DType, {       // data type
+    MSHADOW_IDX_TYPE_SWITCH(indptr_l.type_flag_, IType, {       // indptr type
+      MSHADOW_IDX_TYPE_SWITCH(col_idx_l.type_flag_, CType, {    // col idx type
         MSHADOW_IDX_TYPE_SWITCH(row_idx_r.type_flag_, RType, {  // row idx type
           dim_t num_threads = data_out.Size();
           mxnet_op::Kernel<set_zero, cpu>::Launch(s, num_threads, data_out.dptr<DType>());
-          num_threads = mxnet_op::get_num_threads<cpu>(data_out.shape_[0]);
+          num_threads   = mxnet_op::get_num_threads<cpu>(data_out.shape_[0]);
           dim_t seg_len = (data_out.shape_[0] + num_threads - 1) / num_threads;
           if (trans_lhs) {
             RType* row_idx = row_idx_out.dptr<RType>();
-            num_threads = row_idx_out.Size();
+            num_threads    = row_idx_out.Size();
             mxnet_op::Kernel<set_zero, cpu>::Launch(s, num_threads, row_idx);
-            mxnet_op::Kernel<DotCsrTransRspRspByRowBlocks, cpu>::Launch(s, num_threads,
-                data_out.dptr<DType>(), row_idx, data_l.dptr<DType>(),
-                indptr_l.dptr<IType>(), col_idx_l.dptr<CType>(), data_r.dptr<DType>(),
-                row_idx_r.dptr<RType>(), lhs.shape()[0], rhs.storage_shape()[0],
-                ret->shape()[0], ret->shape()[1], seg_len);
+            mxnet_op::Kernel<DotCsrTransRspRspByRowBlocks, cpu>::Launch(s,
+                                                                        num_threads,
+                                                                        data_out.dptr<DType>(),
+                                                                        row_idx,
+                                                                        data_l.dptr<DType>(),
+                                                                        indptr_l.dptr<IType>(),
+                                                                        col_idx_l.dptr<CType>(),
+                                                                        data_r.dptr<DType>(),
+                                                                        row_idx_r.dptr<RType>(),
+                                                                        lhs.shape()[0],
+                                                                        rhs.storage_shape()[0],
+                                                                        ret->shape()[0],
+                                                                        ret->shape()[1],
+                                                                        seg_len);
             dim_t nnr = 0;
-            nnr = mxnet::common::ParallelAccumulate(row_idx, ret->shape()[0], nnr);
+            nnr       = mxnet::common::ParallelAccumulate(row_idx, ret->shape()[0], nnr);
             if (0 == nnr) {
               FillZerosRspImpl(s, *ret);
               return;
             }
             ret->set_aux_shape(rowsparse::kIdx, mshadow::Shape1(nnr));
             mshadow::Tensor<cpu, 2, DType> rsp_data = data_out.FlatTo2D<cpu, DType>(s);
-            dim_t idx = 0;
+            dim_t idx                               = 0;
             for (index_t i = 0; i < ret->shape()[0]; ++i) {
               if (row_idx[i] > 0) {
                 row_idx[idx] = i;
@@ -1092,10 +1150,14 @@ inline void DotCsrRspRspImpl(const OpContext& ctx,
 /*
  * \brief Impl of dot(dns, csr) = csr
  */
-inline void DotDnsCsrCsrImpl(const OpContext& ctx, const cpu& cpu_dev,
-                             const TBlob& lhs, const NDArray& rhs,
-                             const OpReqType req, NDArray* ret) {
-  if (kNullOp == req) return;
+inline void DotDnsCsrCsrImpl(const OpContext& ctx,
+                             const cpu& cpu_dev,
+                             const TBlob& lhs,
+                             const NDArray& rhs,
+                             const OpReqType req,
+                             NDArray* ret) {
+  if (kNullOp == req)
+    return;
 
   CHECK_EQ(req, kWriteTo);
   CHECK_EQ(rhs.storage_type(), kCSRStorage);
@@ -1106,11 +1168,11 @@ inline void DotDnsCsrCsrImpl(const OpContext& ctx, const cpu& cpu_dev,
 
   /* Initialize data structures */
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-  const NDArray& out = *ret;
-  const TBlob data_l = lhs;
-  const TBlob data_r = rhs.data();
-  const TBlob indptr_r = rhs.aux_data(csr::kIndPtr);
-  const TBlob col_idx_r = rhs.aux_data(csr::kIdx);
+  const NDArray& out      = *ret;
+  const TBlob data_l      = lhs;
+  const TBlob data_r      = rhs.data();
+  const TBlob indptr_r    = rhs.aux_data(csr::kIndPtr);
+  const TBlob col_idx_r   = rhs.aux_data(csr::kIdx);
   if (!rhs.storage_initialized()) {
     FillZerosCsrImpl(s, *ret);
     return;
@@ -1120,59 +1182,67 @@ inline void DotDnsCsrCsrImpl(const OpContext& ctx, const cpu& cpu_dev,
     MSHADOW_IDX_TYPE_SWITCH(indptr_r.type_flag_, IType, {     // indptr type
       MSHADOW_IDX_TYPE_SWITCH(col_idx_r.type_flag_, CType, {  // colidx type
         /* Allocate workspace */
-        CType num_cols_out = out.shape()[1];
-        CType rhs_data_size = static_cast<CType>(col_idx_r.shape_.Size());
+        CType num_cols_out    = out.shape()[1];
+        CType rhs_data_size   = static_cast<CType>(col_idx_r.shape_.Size());
         size_t workspace_size = 2 * num_cols_out * sizeof(CType);
         Tensor<cpu, 1, char> workspace =
-            ctx.requested[0].get_space_typed<cpu, 1, char>(
-                Shape1(workspace_size), s);
+            ctx.requested[0].get_space_typed<cpu, 1, char>(Shape1(workspace_size), s);
         CType* col_flg = reinterpret_cast<dim_t*>(workspace.dptr_);
 
         CType* prefix_sum = col_flg;
-        CType* nnc_idx = prefix_sum + num_cols_out;
+        CType* nnc_idx    = prefix_sum + num_cols_out;
 
         /* Set the column flags for nnz columns */
-        mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, num_cols_out,
-                                                          col_flg);
+        mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, num_cols_out, col_flg);
         mxnet_op::Kernel<MarkRowFlgKernel, cpu>::Launch(
             s, rhs_data_size, col_flg, col_idx_r.dptr<CType>());
 
         /* 1. Calculate prefix sum from col flgs
          * 2. Storage all non zero column indexes in nnc_idx
          */
-        CType cur = 0;
+        CType cur     = 0;
         prefix_sum[0] = col_flg[0];
-        if (prefix_sum[0]) nnc_idx[cur++] = 0;
+        if (prefix_sum[0])
+          nnc_idx[cur++] = 0;
         for (CType i = 1; i < num_cols_out; i++) {
           prefix_sum[i] = prefix_sum[i - 1] + col_flg[i];
-          if (prefix_sum[i] > prefix_sum[i - 1]) nnc_idx[cur++] = i;
+          if (prefix_sum[i] > prefix_sum[i - 1])
+            nnc_idx[cur++] = i;
         }
 
         /* Allocate aux data for out */
         IType num_rows_l = lhs.shape_[0];
-        dim_t nnc = prefix_sum[num_cols_out - 1];
-        dim_t nnz = nnc * num_rows_l;
+        dim_t nnc        = prefix_sum[num_cols_out - 1];
+        dim_t nnz        = nnc * num_rows_l;
         out.CheckAndAllocAuxData(csr::kIndPtr, Shape1(num_rows_l + 1));
         out.CheckAndAllocAuxData(csr::kIdx, Shape1(nnz));
         out.CheckAndAllocData(Shape1(nnz));
 
         /* Set csr indptr and index according to nnc_idx*/
-        IType* indptr_out = out.aux_data(csr::kIndPtr).dptr<IType>();
+        IType* indptr_out  = out.aux_data(csr::kIndPtr).dptr<IType>();
         CType* col_idx_out = out.aux_data(csr::kIdx).dptr<CType>();
-        DType* data_out = out.data().dptr<DType>();
+        DType* data_out    = out.data().dptr<DType>();
         mxnet_op::Kernel<PopulateCsrForNNC, cpu>::Launch(
             s, num_rows_l, nnc_idx, indptr_out, col_idx_out, nnc, num_rows_l);
         mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, nnz, data_out);
 
         const dim_t num_threads = mxnet_op::get_num_threads<cpu>(num_rows_l);
-        const dim_t seg_len = (num_rows_l + num_threads - 1) / num_threads;
+        const dim_t seg_len     = (num_rows_l + num_threads - 1) / num_threads;
 
         IType num_rows_r = rhs.shape()[0];
-        mxnet_op::Kernel<DotDnsCsrCsrByRowBlocks, cpu>::Launch(
-            s, num_threads, data_out, data_l.dptr<DType>(),
-            indptr_r.dptr<IType>(), col_idx_r.dptr<CType>(),
-            data_r.dptr<DType>(), seg_len, num_rows_r, num_rows_l, num_cols_out,
-            nnc, prefix_sum);
+        mxnet_op::Kernel<DotDnsCsrCsrByRowBlocks, cpu>::Launch(s,
+                                                               num_threads,
+                                                               data_out,
+                                                               data_l.dptr<DType>(),
+                                                               indptr_r.dptr<IType>(),
+                                                               col_idx_r.dptr<CType>(),
+                                                               data_r.dptr<DType>(),
+                                                               seg_len,
+                                                               num_rows_r,
+                                                               num_rows_l,
+                                                               num_cols_out,
+                                                               nnc,
+                                                               prefix_sum);
       });
     });
   });
@@ -1181,11 +1251,15 @@ inline void DotDnsCsrCsrImpl(const OpContext& ctx, const cpu& cpu_dev,
 /*
  * \brief Impl of dot(dns, csr) = dns and dot(dns, csr.T) = dns
  */
-inline void DotDnsCsrDnsImpl(const OpContext& ctx, const cpu& cpu_dev,
-  const TBlob& dns, const NDArray& rhs,
-  const OpReqType req, NDArray* ret,
-  const bool transpose_b) {
-  if (req == kNullOp) return;
+inline void DotDnsCsrDnsImpl(const OpContext& ctx,
+                             const cpu& cpu_dev,
+                             const TBlob& dns,
+                             const NDArray& rhs,
+                             const OpReqType req,
+                             NDArray* ret,
+                             const bool transpose_b) {
+  if (req == kNullOp)
+    return;
   CHECK_EQ(rhs.storage_type(), kCSRStorage);
   mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   if (!rhs.storage_initialized()) {
@@ -1195,38 +1269,49 @@ inline void DotDnsCsrDnsImpl(const OpContext& ctx, const cpu& cpu_dev,
 
   using nnvm::dim_t;
 
-  const TBlob data_r = rhs.data();
-  const TBlob indptr_r = rhs.aux_data(csr::kIndPtr);
+  const TBlob data_r    = rhs.data();
+  const TBlob indptr_r  = rhs.aux_data(csr::kIndPtr);
   const TBlob col_idx_r = rhs.aux_data(csr::kIdx);
-  const TBlob& data_l = dns;
-  const TBlob data_out = ret->data();
+  const TBlob& data_l   = dns;
+  const TBlob data_out  = ret->data();
 
-  MSHADOW_REAL_TYPE_SWITCH(data_r.type_flag_, DType, {  // data type
-    MSHADOW_IDX_TYPE_SWITCH(indptr_r.type_flag_, IType, {  // indptr type
+  MSHADOW_REAL_TYPE_SWITCH(data_r.type_flag_, DType, {        // data type
+    MSHADOW_IDX_TYPE_SWITCH(indptr_r.type_flag_, IType, {     // indptr type
       MSHADOW_IDX_TYPE_SWITCH(col_idx_r.type_flag_, CType, {  // col idx type
         dim_t num_threads;
         if (req == kWriteTo || req == kWriteInplace) {
           num_threads = data_out.Size();
-          mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(
-              s, num_threads, data_out.dptr<DType>());
+          mxnet_op::Kernel<mxnet_op::set_zero, cpu>::Launch(s, num_threads, data_out.dptr<DType>());
         }
         num_threads = mxnet_op::get_num_threads<cpu>(data_out.shape_[0]);
         // seg by output row
         dim_t seg_len = (data_out.shape_[0] + num_threads - 1) / num_threads;
         if (transpose_b) {
-          mxnet_op::Kernel<DotDnsCsrTransDnsByRowBlocks, cpu>::Launch(s, num_threads,
-              data_out.dptr<DType>(), data_l.dptr<DType>(),
-              data_r.dptr<DType>(), indptr_r.dptr<IType>(),
-              col_idx_r.dptr<CType>(), seg_len,
-              dns.shape_[0], dns.shape_[1],
-              rhs.shape()[0], rhs.shape()[1]);
+          mxnet_op::Kernel<DotDnsCsrTransDnsByRowBlocks, cpu>::Launch(s,
+                                                                      num_threads,
+                                                                      data_out.dptr<DType>(),
+                                                                      data_l.dptr<DType>(),
+                                                                      data_r.dptr<DType>(),
+                                                                      indptr_r.dptr<IType>(),
+                                                                      col_idx_r.dptr<CType>(),
+                                                                      seg_len,
+                                                                      dns.shape_[0],
+                                                                      dns.shape_[1],
+                                                                      rhs.shape()[0],
+                                                                      rhs.shape()[1]);
         } else {
-          mxnet_op::Kernel<DotDnsCsrDnsByRowBlocks, cpu>::Launch(s, num_threads,
-              data_out.dptr<DType>(), data_l.dptr<DType>(),
-              data_r.dptr<DType>(), indptr_r.dptr<IType>(),
-              col_idx_r.dptr<CType>(), seg_len,
-              dns.shape_[0], dns.shape_[1],
-              rhs.shape()[0], rhs.shape()[1]);
+          mxnet_op::Kernel<DotDnsCsrDnsByRowBlocks, cpu>::Launch(s,
+                                                                 num_threads,
+                                                                 data_out.dptr<DType>(),
+                                                                 data_l.dptr<DType>(),
+                                                                 data_r.dptr<DType>(),
+                                                                 indptr_r.dptr<IType>(),
+                                                                 col_idx_r.dptr<CType>(),
+                                                                 seg_len,
+                                                                 dns.shape_[0],
+                                                                 dns.shape_[1],
+                                                                 rhs.shape()[0],
+                                                                 rhs.shape()[1]);
         }
       });
     });
@@ -1234,14 +1319,15 @@ inline void DotDnsCsrDnsImpl(const OpContext& ctx, const cpu& cpu_dev,
 }
 
 inline bool DotShape(const nnvm::NodeAttrs& attrs,
-                     mxnet::ShapeVector *in_attrs,
-                     mxnet::ShapeVector *out_attrs) {
+                     mxnet::ShapeVector* in_attrs,
+                     mxnet::ShapeVector* out_attrs) {
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& lshape = (*in_attrs)[0];
   mxnet::TShape& rshape = (*in_attrs)[1];
-  if (!ndim_is_known(lshape) || !ndim_is_known(rshape)) return false;
+  if (!ndim_is_known(lshape) || !ndim_is_known(rshape))
+    return false;
   CHECK_GT(lshape.ndim(), 0) << "scalar tensor is not supported by this operator.";
   CHECK_GT(rshape.ndim(), 0) << "scalar tensor is not supported by this operator.";
   if (lshape.ndim() == 1 && rshape.ndim() == 1) {
@@ -1253,30 +1339,29 @@ inline bool DotShape(const nnvm::NodeAttrs& attrs,
     mxnet::TShape L[2], R[2];
     if (Ta) {
       L[0] = mshadow::Shape1(lshape[0]);
-      L[1] = lshape.ndim() > 1 ?
-             mxnet::TShape(&lshape[1], lshape.end()) : mxnet::TShape(1, 1);
+      L[1] = lshape.ndim() > 1 ? mxnet::TShape(&lshape[1], lshape.end()) : mxnet::TShape(1, 1);
     } else {
-      L[0] = lshape.ndim() > 1 ?
-             mxnet::TShape(&lshape[0], &lshape[lshape.ndim()-1]) : mxnet::TShape(1, 1);
-      L[1] = mshadow::Shape1(lshape[lshape.ndim()-1]);
+      L[0] = lshape.ndim() > 1 ? mxnet::TShape(&lshape[0], &lshape[lshape.ndim() - 1])
+                               : mxnet::TShape(1, 1);
+      L[1] = mshadow::Shape1(lshape[lshape.ndim() - 1]);
     }
     if (Tb) {
-      R[0] = rshape.ndim() > 1 ?
-             mxnet::TShape(&rshape[0], &rshape[rshape.ndim()-1]) : mxnet::TShape(1, 1);
-      R[1] = mshadow::Shape1(rshape[rshape.ndim()-1]);
+      R[0] = rshape.ndim() > 1 ? mxnet::TShape(&rshape[0], &rshape[rshape.ndim() - 1])
+                               : mxnet::TShape(1, 1);
+      R[1] = mshadow::Shape1(rshape[rshape.ndim() - 1]);
     } else {
       R[0] = mshadow::Shape1(rshape[0]);
-      R[1] = rshape.ndim() > 1 ?
-             mxnet::TShape(&rshape[1], rshape.end()) : mxnet::TShape(1, 1);
+      R[1] = rshape.ndim() > 1 ? mxnet::TShape(&rshape[1], rshape.end()) : mxnet::TShape(1, 1);
     }
 
     if (L[!Ta].Size() != 0 && R[Tb].Size() != 0) {
-      CHECK_EQ(L[!Ta].Size(), R[Tb].Size())
-        << "dot shape error: " << lshape << " X " << rshape;
+      CHECK_EQ(L[!Ta].Size(), R[Tb].Size()) << "dot shape error: " << lshape << " X " << rshape;
     }
     std::vector<index_t> buf;
-    if (lshape.ndim() > 1) buf.insert(buf.end(), &L[Ta][0], L[Ta].end());
-    if (rshape.ndim() > 1) buf.insert(buf.end(), &R[!Tb][0], R[!Tb].end());
+    if (lshape.ndim() > 1)
+      buf.insert(buf.end(), &L[Ta][0], L[Ta].end());
+    if (rshape.ndim() > 1)
+      buf.insert(buf.end(), &R[!Tb][0], R[!Tb].end());
     mxnet::TShape oshape(buf.begin(), buf.end());
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
   }
@@ -1284,7 +1369,7 @@ inline bool DotShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known((*out_attrs)[0]);
 }
 
-template<typename xpu>
+template <typename xpu>
 void DotForwardEx(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<NDArray>& inputs,
@@ -1299,24 +1384,23 @@ void DotForwardEx(const nnvm::NodeAttrs& attrs,
   auto lhs_stype = inputs[0].storage_type();
   auto rhs_stype = inputs[1].storage_type();
   auto out_stype = outputs[0].storage_type();
-  if (lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage &&
-      out_stype == kDefaultStorage && !param.transpose_b) {
+  if (lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage && out_stype == kDefaultStorage &&
+      !param.transpose_b) {
     TBlob ret = outputs[0].data();
     DotCsrDnsDnsImpl(ctx, xpu(), inputs[0], inputs[1].data(), req[0], param.transpose_a, &ret);
-  } else if (lhs_stype == kCSRStorage && rhs_stype == kRowSparseStorage
-      && out_stype == kDefaultStorage && !param.transpose_b) {
+  } else if (lhs_stype == kCSRStorage && rhs_stype == kRowSparseStorage &&
+             out_stype == kDefaultStorage && !param.transpose_b) {
     TBlob ret = outputs[0].data();
     DotCsrRspDnsImpl(ctx, xpu(), inputs[0], inputs[1], req[0], param.transpose_a, &ret);
-  } else if (lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage
-      && out_stype == kRowSparseStorage && !param.transpose_b) {
+  } else if (lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage &&
+             out_stype == kRowSparseStorage && !param.transpose_b) {
     NDArray out = outputs[0];
     DotCsrDnsRspImpl(ctx, xpu(), inputs[0], inputs[1].data(), req[0], param.transpose_a, &out);
-  } else if (lhs_stype == kCSRStorage && rhs_stype == kRowSparseStorage
-      && out_stype == kRowSparseStorage && !param.transpose_b) {
+  } else if (lhs_stype == kCSRStorage && rhs_stype == kRowSparseStorage &&
+             out_stype == kRowSparseStorage && !param.transpose_b) {
     NDArray ret = outputs[0];
     DotCsrRspRspImpl(ctx, xpu(), inputs[0], inputs[1], req[0], param.transpose_a, &ret);
-  } else if (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage &&
-             out_stype == kCSRStorage &&
+  } else if (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage && out_stype == kCSRStorage &&
              !(param.transpose_a || param.transpose_b)) {
     NDArray ret = outputs[0];
     DotDnsCsrCsrImpl(ctx, xpu(), inputs[0].data(), inputs[1], req[0], &ret);
@@ -1329,7 +1413,7 @@ void DotForwardEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void DotBackwardEx(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<NDArray>& inputs,
@@ -1339,37 +1423,37 @@ void DotBackwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req.size(), 2U);
   CHECK(!(req[0] != kNullOp && outputs[0].storage_type() == kCSRStorage))
-    << "sparse dot does not support computing the gradient of csr";
+      << "sparse dot does not support computing the gradient of csr";
   CHECK(!(req[1] != kNullOp && outputs[1].storage_type() == kCSRStorage))
-    << "sparse dot does not support computing the gradient of csr";
+      << "sparse dot does not support computing the gradient of csr";
   CHECK_NE(req[1], kWriteInplace) << "DotBackwardEx does not support WriteInplace";
 
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
   CHECK_EQ(inputs[0].shape().ndim(), 2) << "sparse dot only supports 2 dimensional lhs";
   CHECK_EQ(inputs[1].shape().ndim(), 2) << "sparse dot only supports 2 dimensional rhs";
-  const auto ograd_stype = inputs[0].storage_type();
-  const auto lhs_stype = inputs[1].storage_type();
-  const auto rhs_stype = inputs[2].storage_type();
+  const auto ograd_stype    = inputs[0].storage_type();
+  const auto lhs_stype      = inputs[1].storage_type();
+  const auto rhs_stype      = inputs[2].storage_type();
   const auto grad_rhs_stype = outputs[1].storage_type();
-  if (ograd_stype == kDefaultStorage  // ograd dns format
-      && lhs_stype == kCSRStorage  // csr input lhs of the op
+  if (ograd_stype == kDefaultStorage                                 // ograd dns format
+      && lhs_stype == kCSRStorage                                    // csr input lhs of the op
       && grad_rhs_stype == kDefaultStorage && !param.transpose_b) {  // grad(rhs) dns format
     TBlob ret = outputs[1].data();
     DotCsrDnsDnsImpl(ctx, xpu(), inputs[1], inputs[0].data(), req[1], !param.transpose_a, &ret);
-  } else if (ograd_stype == kDefaultStorage && lhs_stype == kCSRStorage
-      && grad_rhs_stype == kRowSparseStorage && !param.transpose_b) {
+  } else if (ograd_stype == kDefaultStorage && lhs_stype == kCSRStorage &&
+             grad_rhs_stype == kRowSparseStorage && !param.transpose_b) {
     NDArray ret = outputs[1];
     DotCsrDnsRspImpl(ctx, xpu(), inputs[1], inputs[0].data(), req[1], !param.transpose_a, &ret);
-  } else if (ograd_stype == kRowSparseStorage && lhs_stype == kCSRStorage
-      && grad_rhs_stype == kRowSparseStorage && !param.transpose_b) {
+  } else if (ograd_stype == kRowSparseStorage && lhs_stype == kCSRStorage &&
+             grad_rhs_stype == kRowSparseStorage && !param.transpose_b) {
     NDArray ret = outputs[1];
     DotCsrRspRspImpl(ctx, xpu(), inputs[1], inputs[0], req[1], !param.transpose_a, &ret);
-  } else if (ograd_stype == kRowSparseStorage && lhs_stype == kCSRStorage
-      && grad_rhs_stype == kDefaultStorage && !param.transpose_b) {
+  } else if (ograd_stype == kRowSparseStorage && lhs_stype == kCSRStorage &&
+             grad_rhs_stype == kDefaultStorage && !param.transpose_b) {
     TBlob ret = outputs[1].data();
     DotCsrRspDnsImpl(ctx, xpu(), inputs[1], inputs[0], req[1], !param.transpose_a, &ret);
   } else if (ograd_stype == kDefaultStorage &&  // ograd dns format
-             lhs_stype == kDefaultStorage &&  // lhs dns format
+             lhs_stype == kDefaultStorage &&    // lhs dns format
              rhs_stype == kCSRStorage && !param.transpose_a) {
     NDArray ret = outputs[0];
     DotDnsCsrDnsImpl(ctx, xpu(), inputs[0].data(), inputs[2], req[0], &ret, !param.transpose_b);
@@ -1378,7 +1462,7 @@ void DotBackwardEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void BatchDotForward_(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -1386,90 +1470,83 @@ void BatchDotForward_(const nnvm::NodeAttrs& attrs,
                       const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  if (req[0] == kNullOp) return;
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp)
+    return;
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
   CHECK_EQ(outputs[0].type_flag_, inputs[0].type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK_EQ(outputs[0].type_flag_, inputs[1].type_flag_)
       << "Binary function only support input/output with the same type";
   CHECK(outputs[0].type_flag_ == kFloat32 || outputs[0].type_flag_ == kFloat64 ||
-    (outputs[0].type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
-    << "dot only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
+        (outputs[0].type_flag_ == kFloat16 && ctx.run_ctx.ctx.dev_mask() == mshadow::gpu::kDevMask))
+      << "dot only supports float32/float64 for CPU, and float16/float32/float64 for GPU";
   MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     int ndim = outputs[0].ndim();
-    if (outputs[0].shape_.Size() == 0 || inputs[0].shape_.Size() == 0
-                                      || inputs[1].shape_.Size() == 0) {
+    if (outputs[0].shape_.Size() == 0 || inputs[0].shape_.Size() == 0 ||
+        inputs[1].shape_.Size() == 0) {
       if (outputs[0].shape_.Size() != 0 && req[0] != kAddTo) {
-        mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(s, outputs[0].shape_.Size(),
-                                                          outputs[0].dptr<DType>());
+        mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(
+            s, outputs[0].shape_.Size(), outputs[0].dptr<DType>());
       }
       return;
     }
-    size_t batch_size = outputs[0].shape_.ProdShape(0, ndim - 2);
-    mshadow::Tensor<xpu, 3, DType> out =
-        outputs[0].get_with_shape<xpu, 3, DType>(Shape3(batch_size,
-                                                        outputs[0].shape_[ndim - 2],
-                                                        outputs[0].shape_[ndim - 1]), s);
-    mshadow::Tensor<xpu, 3, DType> mlhs =
-        inputs[0].get_with_shape<xpu, 3, DType>(Shape3(batch_size,
-                                                       inputs[0].shape_[ndim - 2],
-                                                       inputs[0].shape_[ndim - 1]), s);
-    mshadow::Tensor<xpu, 3, DType> mrhs =
-        inputs[1].get_with_shape<xpu, 3, DType>(Shape3(batch_size,
-                                                       inputs[1].shape_[ndim - 2],
-                                                       inputs[1].shape_[ndim - 1]), s);
+    size_t batch_size                  = outputs[0].shape_.ProdShape(0, ndim - 2);
+    mshadow::Tensor<xpu, 3, DType> out = outputs[0].get_with_shape<xpu, 3, DType>(
+        Shape3(batch_size, outputs[0].shape_[ndim - 2], outputs[0].shape_[ndim - 1]), s);
+    mshadow::Tensor<xpu, 3, DType> mlhs = inputs[0].get_with_shape<xpu, 3, DType>(
+        Shape3(batch_size, inputs[0].shape_[ndim - 2], inputs[0].shape_[ndim - 1]), s);
+    mshadow::Tensor<xpu, 3, DType> mrhs = inputs[1].get_with_shape<xpu, 3, DType>(
+        Shape3(batch_size, inputs[1].shape_[ndim - 2], inputs[1].shape_[ndim - 1]), s);
     mshadow::Tensor<xpu, 1, DType*> workspace =
         ctx.requested[0].get_space_typed<xpu, 1, DType*>(mshadow::Shape1(3 * out.size(0)), s);
     if (param.transpose_a && param.transpose_b) {
-      mshadow::BatchGEMM<true, true>(out, mlhs, mrhs, (DType)1.0f,
-                                     (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f,
-                                     workspace);
+      mshadow::BatchGEMM<true, true>(
+          out, mlhs, mrhs, (DType)1.0f, (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f, workspace);
     } else if (!param.transpose_a && param.transpose_b) {
-      mshadow::BatchGEMM<false, true>(out, mlhs, mrhs, (DType)1.0f,
-                                     (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f,
-                                     workspace);
+      mshadow::BatchGEMM<false, true>(
+          out, mlhs, mrhs, (DType)1.0f, (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f, workspace);
     } else if (param.transpose_a && !param.transpose_b) {
-      mshadow::BatchGEMM<true, false>(out, mlhs, mrhs, (DType)1.0f,
-                                     (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f,
-                                     workspace);
+      mshadow::BatchGEMM<true, false>(
+          out, mlhs, mrhs, (DType)1.0f, (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f, workspace);
     } else {
-      mshadow::BatchGEMM<false, false>(out, mlhs, mrhs, (DType)1.0f,
-                                     (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f,
-                                     workspace);
+      mshadow::BatchGEMM<false, false>(
+          out, mlhs, mrhs, (DType)1.0f, (kAddTo == req[0]) ? (DType)1.0f : (DType)0.0f, workspace);
     }
   });
 }
 
 inline bool BatchDotShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const DotParam& param = nnvm::get<DotParam>(attrs.parsed);
   mxnet::TShape& lshape = (*in_attrs)[0];
   mxnet::TShape& rshape = (*in_attrs)[1];
   // return false if lhs and rhs both have fully unknown shape
-  if (!ndim_is_known(lshape) || !ndim_is_known(rshape)) return false;
+  if (!ndim_is_known(lshape) || !ndim_is_known(rshape))
+    return false;
   if (lshape.ndim() >= 3 && rshape.ndim() >= 3 && lshape.ndim() == rshape.ndim()) {
     int ndim = lshape.ndim();
     // only partially infer shape if last dim of lhs and second dim of rhs is known
-    bool last_dim_known = dim_size_is_known(lshape, ndim - 1);
+    bool last_dim_known   = dim_size_is_known(lshape, ndim - 1);
     bool second_dim_known = dim_size_is_known(rshape, ndim - 2);
-    if ( !last_dim_known || !second_dim_known) return false;
+    if (!last_dim_known || !second_dim_known)
+      return false;
     for (int i = 0; i < ndim - 2; i++) {
       CHECK_EQ(lshape[i], rshape[i])
-        << "batch_dot shape error (the leading batch dimensions must be equal): "
-        << lshape << " X " << rshape
-        << " trans_a=" << param.transpose_a << " trans_b=" << param.transpose_b;
+          << "batch_dot shape error (the leading batch dimensions must be equal): " << lshape
+          << " X " << rshape << " trans_a=" << param.transpose_a
+          << " trans_b=" << param.transpose_b;
     }
-    dim_t out_m = param.transpose_a ? lshape[ndim - 1] : lshape[ndim - 2];
+    dim_t out_m    = param.transpose_a ? lshape[ndim - 1] : lshape[ndim - 2];
     dim_t lshape_k = param.transpose_a ? lshape[ndim - 2] : lshape[ndim - 1];
-    dim_t out_n = param.transpose_b ? rshape[ndim - 2] : rshape[ndim - 1];
+    dim_t out_n    = param.transpose_b ? rshape[ndim - 2] : rshape[ndim - 1];
     dim_t rshape_k = param.transpose_b ? rshape[ndim - 1] : rshape[ndim - 2];
-    CHECK_EQ(lshape_k, rshape_k)
-      << "batch_dot shape error (shape mismatch): " << lshape << " X " << rshape
-      << " trans_a=" << param.transpose_a << " trans_b=" << param.transpose_b;
+    CHECK_EQ(lshape_k, rshape_k) << "batch_dot shape error (shape mismatch): " << lshape << " X "
+                                 << rshape << " trans_a=" << param.transpose_a
+                                 << " trans_b=" << param.transpose_b;
     std::vector<dim_t> out_shape_vec;
     for (int i = 0; i < ndim - 2; i++) {
       out_shape_vec.push_back(lshape[i]);
@@ -1478,8 +1555,8 @@ inline bool BatchDotShape(const nnvm::NodeAttrs& attrs,
     out_shape_vec.push_back(out_n);
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(out_shape_vec));
   } else {
-    LOG(FATAL) << "batch_dot currently only support N-D*N-D array (N >= 3)"
-               << lshape << " v.s. " << rshape;
+    LOG(FATAL) << "batch_dot currently only support N-D*N-D array (N >= 3)" << lshape << " v.s. "
+               << rshape;
   }
   // return true if output shape is fully inferred
   return shape_is_known((*out_attrs)[0]);
@@ -1488,13 +1565,13 @@ inline bool BatchDotShape(const nnvm::NodeAttrs& attrs,
 }  // namespace op
 }  // namespace mxnet
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::DotParam> {
   size_t operator()(const mxnet::op::DotParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.transpose_a);
-    ret = dmlc::HashCombine(ret, val.transpose_b);
-    ret = dmlc::HashCombine(ret, val.forward_stype);
+    ret        = dmlc::HashCombine(ret, val.transpose_a);
+    ret        = dmlc::HashCombine(ret, val.transpose_b);
+    ret        = dmlc::HashCombine(ret, val.forward_stype);
     return ret;
   }
 };
diff --git a/src/operator/tensor/dot.cc b/src/operator/tensor/dot.cc
index 0ef4cb216d26..f9203d51a453 100644
--- a/src/operator/tensor/dot.cc
+++ b/src/operator/tensor/dot.cc
@@ -34,7 +34,7 @@ DMLC_REGISTER_PARAMETER(DotParam);
 
 NNVM_REGISTER_OP(dot)
 MXNET_ADD_SPARSE_OP_ALIAS(dot)
-.describe(R"doc(Dot product of two arrays.
+    .describe(R"doc(Dot product of two arrays.
 
 ``dot``'s behavior depends on the input array dimensions:
 
@@ -79,41 +79,41 @@ above patterns, ``dot`` will fallback and generate output with default storage.
     https://mxnet.apache.org/versions/master/api/python/docs/api/optimizer/index.html
 
 )doc" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<DotParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", DotShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", DotForwardInferStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", DotForward_<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DotForwardEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_dot"})
-.add_argument("lhs", "NDArray-or-Symbol", "The first input")
-.add_argument("rhs", "NDArray-or-Symbol", "The second input")
-.add_arguments(DotParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<DotParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", DotShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", DotForwardInferStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", DotForward_<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DotForwardEx<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_dot"})
+    .add_argument("lhs", "NDArray-or-Symbol", "The first input")
+    .add_argument("rhs", "NDArray-or-Symbol", "The second input")
+    .add_arguments(DotParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_dot)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<DotParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", DotBackwardInferStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", DotBackward_<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", DotBackwardEx<cpu>)
-.add_arguments(DotParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<DotParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", DotBackwardInferStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", DotBackward_<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", DotBackwardEx<cpu>)
+    .add_arguments(DotParam::__FIELDS__());
 
 #if MXNET_USE_ONEDNN == 1
 static void BatchDotComputeExCPU(const nnvm::NodeAttrs& attrs,
@@ -138,14 +138,13 @@ static bool BatchDotStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
 
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 #endif
 
 NNVM_REGISTER_OP(batch_dot)
-.add_alias("_npx_batch_dot")
-.describe(R"doc(Batchwise dot product.
+    .add_alias("_npx_batch_dot")
+    .describe(R"doc(Batchwise dot product.
 
 ``batch_dot`` is used to compute dot product of ``x`` and ``y`` when ``x`` and
 ``y`` are data in batch, namely N-D (N >= 3) arrays in shape of `(B0, ..., B_i, :, :)`.
@@ -157,93 +156,93 @@ which is computed by::
    batch_dot(x,y)[b_0, ..., b_i, :, :] = dot(x[b_0, ..., b_i, :, :], y[b_0, ..., b_i, :, :])
 
 )doc" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<DotParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BatchDotShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", BatchDotForward_<cpu>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<DotParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BatchDotShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", BatchDotForward_<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FInferStorageType>("FInferStorageType", BatchDotStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BatchDotComputeExCPU)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BatchDotStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BatchDotComputeExCPU)
 #endif
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n,
-       const std::vector<nnvm::NodeEntry>& ograds) {
-  const DotParam& param = nnvm::get<DotParam>(n->attrs.parsed);
-  nnvm::ObjectPtr lhs_grad;
-  nnvm::ObjectPtr rhs_grad;
-  std::string lhs_gnode_name = n->attrs.name + "_backward_lhs";
-  std::string rhs_gnode_name = n->attrs.name + "_backward_rhs";
-  if (param.transpose_a && param.transpose_b) {
-    // Gradient of z = dot(x.T, y.T)
-    // dx = dot(dz, y).T = dot(y.T, dz.T)
-    // dy = dot(x, dz).T = dot(dz.T, x.T)
-    lhs_grad = MakeNode("batch_dot", lhs_gnode_name,
-                        {n->inputs[1], ograds[0]}, &(n->attrs.dict), &n);
-    rhs_grad = MakeNode("batch_dot", rhs_gnode_name,
-                        {ograds[0], n->inputs[0]}, &(n->attrs.dict), &n);
-  } else if (!param.transpose_a && param.transpose_b) {
-    // Gradient of z = dot(x, y.T)
-    // dx = dot(dz, y)
-    // dy = dot(x.T, dz).T = dot(dz.T, x)
-    auto lhs_attrs_dict = n->attrs.dict;
-    auto rhs_attrs_dict = n->attrs.dict;
-    lhs_attrs_dict["transpose_a"] = "false";
-    lhs_attrs_dict["transpose_b"] = "false";
-    rhs_attrs_dict["transpose_a"] = "true";
-    rhs_attrs_dict["transpose_b"] = "false";
-    lhs_grad = MakeNode("batch_dot", lhs_gnode_name,
-                        {ograds[0], n->inputs[1]}, &lhs_attrs_dict, &n);
-    rhs_grad = MakeNode("batch_dot", rhs_gnode_name,
-                        {ograds[0], n->inputs[0]}, &rhs_attrs_dict, &n);
-  } else if (param.transpose_a && !param.transpose_b) {
-    // Gradient of z = dot(x.T, y)
-    // dx = dot(dz, y.T).T = dot(y, dz.T)
-    // dy = dot(x, dz)
-    auto lhs_attrs_dict = n->attrs.dict;
-    auto rhs_attrs_dict = n->attrs.dict;
-    lhs_attrs_dict["transpose_a"] = "false";
-    lhs_attrs_dict["transpose_b"] = "true";
-    rhs_attrs_dict["transpose_a"] = "false";
-    rhs_attrs_dict["transpose_b"] = "false";
-    lhs_grad = MakeNode("batch_dot", lhs_gnode_name,
-                        {n->inputs[1], ograds[0]}, &lhs_attrs_dict, &n);
-    rhs_grad = MakeNode("batch_dot", rhs_gnode_name,
-                        {n->inputs[0], ograds[0]}, &rhs_attrs_dict, &n);
-  } else {
-    // Gradient of z = dot(x, y)
-    // dx = dot(dz, y.T)
-    // dy = dot(x.T, dz)
-    auto lhs_attrs_dict = n->attrs.dict;
-    auto rhs_attrs_dict = n->attrs.dict;
-    lhs_attrs_dict["transpose_a"] = "false";
-    lhs_attrs_dict["transpose_b"] = "true";
-    rhs_attrs_dict["transpose_a"] = "true";
-    rhs_attrs_dict["transpose_b"] = "false";
-    lhs_grad = MakeNode("batch_dot", lhs_gnode_name,
-                        {ograds[0], n->inputs[1]}, &lhs_attrs_dict, &n);
-    rhs_grad = MakeNode("batch_dot", rhs_gnode_name,
-                        {n->inputs[0], ograds[0]}, &rhs_attrs_dict, &n);
-  }
-  std::vector<nnvm::NodeEntry> ret;
-  ret.emplace_back(nnvm::NodeEntry{lhs_grad, 0, 0});
-  ret.emplace_back(nnvm::NodeEntry{rhs_grad, 0, 0});
-  return ret;
-})
-.add_argument("lhs", "NDArray-or-Symbol", "The first input")
-.add_argument("rhs", "NDArray-or-Symbol", "The second input")
-.add_arguments(DotParam::__FIELDS__());
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const DotParam& param = nnvm::get<DotParam>(n->attrs.parsed);
+          nnvm::ObjectPtr lhs_grad;
+          nnvm::ObjectPtr rhs_grad;
+          std::string lhs_gnode_name = n->attrs.name + "_backward_lhs";
+          std::string rhs_gnode_name = n->attrs.name + "_backward_rhs";
+          if (param.transpose_a && param.transpose_b) {
+            // Gradient of z = dot(x.T, y.T)
+            // dx = dot(dz, y).T = dot(y.T, dz.T)
+            // dy = dot(x, dz).T = dot(dz.T, x.T)
+            lhs_grad = MakeNode(
+                "batch_dot", lhs_gnode_name, {n->inputs[1], ograds[0]}, &(n->attrs.dict), &n);
+            rhs_grad = MakeNode(
+                "batch_dot", rhs_gnode_name, {ograds[0], n->inputs[0]}, &(n->attrs.dict), &n);
+          } else if (!param.transpose_a && param.transpose_b) {
+            // Gradient of z = dot(x, y.T)
+            // dx = dot(dz, y)
+            // dy = dot(x.T, dz).T = dot(dz.T, x)
+            auto lhs_attrs_dict           = n->attrs.dict;
+            auto rhs_attrs_dict           = n->attrs.dict;
+            lhs_attrs_dict["transpose_a"] = "false";
+            lhs_attrs_dict["transpose_b"] = "false";
+            rhs_attrs_dict["transpose_a"] = "true";
+            rhs_attrs_dict["transpose_b"] = "false";
+            lhs_grad                      = MakeNode(
+                "batch_dot", lhs_gnode_name, {ograds[0], n->inputs[1]}, &lhs_attrs_dict, &n);
+            rhs_grad = MakeNode(
+                "batch_dot", rhs_gnode_name, {ograds[0], n->inputs[0]}, &rhs_attrs_dict, &n);
+          } else if (param.transpose_a && !param.transpose_b) {
+            // Gradient of z = dot(x.T, y)
+            // dx = dot(dz, y.T).T = dot(y, dz.T)
+            // dy = dot(x, dz)
+            auto lhs_attrs_dict           = n->attrs.dict;
+            auto rhs_attrs_dict           = n->attrs.dict;
+            lhs_attrs_dict["transpose_a"] = "false";
+            lhs_attrs_dict["transpose_b"] = "true";
+            rhs_attrs_dict["transpose_a"] = "false";
+            rhs_attrs_dict["transpose_b"] = "false";
+            lhs_grad                      = MakeNode(
+                "batch_dot", lhs_gnode_name, {n->inputs[1], ograds[0]}, &lhs_attrs_dict, &n);
+            rhs_grad = MakeNode(
+                "batch_dot", rhs_gnode_name, {n->inputs[0], ograds[0]}, &rhs_attrs_dict, &n);
+          } else {
+            // Gradient of z = dot(x, y)
+            // dx = dot(dz, y.T)
+            // dy = dot(x.T, dz)
+            auto lhs_attrs_dict           = n->attrs.dict;
+            auto rhs_attrs_dict           = n->attrs.dict;
+            lhs_attrs_dict["transpose_a"] = "false";
+            lhs_attrs_dict["transpose_b"] = "true";
+            rhs_attrs_dict["transpose_a"] = "true";
+            rhs_attrs_dict["transpose_b"] = "false";
+            lhs_grad                      = MakeNode(
+                "batch_dot", lhs_gnode_name, {ograds[0], n->inputs[1]}, &lhs_attrs_dict, &n);
+            rhs_grad = MakeNode(
+                "batch_dot", rhs_gnode_name, {n->inputs[0], ograds[0]}, &rhs_attrs_dict, &n);
+          }
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(nnvm::NodeEntry{lhs_grad, 0, 0});
+          ret.emplace_back(nnvm::NodeEntry{rhs_grad, 0, 0});
+          return ret;
+        })
+    .add_argument("lhs", "NDArray-or-Symbol", "The first input")
+    .add_argument("rhs", "NDArray-or-Symbol", "The second input")
+    .add_arguments(DotParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/dot.cu b/src/operator/tensor/dot.cu
index b245b1c9e5ed..22e15c7a8877 100644
--- a/src/operator/tensor/dot.cu
+++ b/src/operator/tensor/dot.cu
@@ -28,15 +28,14 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(dot)
-.set_attr<FCompute>("FCompute<gpu>", DotForward_<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", DotForwardEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", DotForward_<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", DotForwardEx<gpu>);
 
 NNVM_REGISTER_OP(_backward_dot)
-.set_attr<FCompute>("FCompute<gpu>", DotBackward_<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", DotBackwardEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", DotBackward_<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", DotBackwardEx<gpu>);
 
-NNVM_REGISTER_OP(batch_dot)
-.set_attr<FCompute>("FCompute<gpu>", BatchDotForward_<gpu>);
+NNVM_REGISTER_OP(batch_dot).set_attr<FCompute>("FCompute<gpu>", BatchDotForward_<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op.cc b/src/operator/tensor/elemwise_binary_broadcast_op.cc
index 9a682dc649c3..8f8a38176729 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op.cc
+++ b/src/operator/tensor/elemwise_binary_broadcast_op.cc
@@ -247,43 +247,44 @@ void BinaryBroadcastRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
                                            const std::vector<OpReqType>& req,
                                            const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (outputs[0].shape_.Size() == 0U) return;
-  if (req[0] == kNullOp) return;
+  if (outputs[0].shape_.Size() == 0U)
+    return;
+  if (req[0] == kNullOp)
+    return;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      inputs[0].shape_, inputs[1].shape_, outputs[0].shape_, &new_lshape, &new_rshape, &new_oshape);
   // Pad the ndim
   BROADCAST_NDIM_SWITCH(ndim, NDim, {
-      if (ndim != 0) {
-        ndim = NDim;
-      }
+    if (ndim != 0) {
+      ndim = NDim;
+    }
   });
 
   if (!ndim) {
-    ElemwiseBinaryRTCCompute {OP}(attrs, ctx, inputs, req, outputs);
+    ElemwiseBinaryRTCCompute{OP}(attrs, ctx, inputs, req, outputs);  // NOLINT
   } else {
-    mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-    const TBlob& lhs = inputs[0].reshape(new_lshape);
-    const TBlob& rhs = inputs[1].reshape(new_rshape);
-    const TBlob& output = outputs[0].reshape(new_oshape);
+    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+    const TBlob& lhs        = inputs[0].reshape(new_lshape);
+    const TBlob& rhs        = inputs[1].reshape(new_rshape);
+    const TBlob& output     = outputs[0].reshape(new_oshape);
 
     const auto& lstride = calc_stride(lhs.shape_, ndim);
     const auto& rstride = calc_stride(rhs.shape_, ndim);
 
     size_t output_type_size = common::mshadow_type_info(outputs[0].type_flag_).size;
-    const int nvec = output_type_size <= sizeof(uint64_t)
-                       ? (sizeof(uint64_t) / output_type_size)
-                       : 1;
+    const int nvec =
+        output_type_size <= sizeof(uint64_t) ? (sizeof(uint64_t) / output_type_size) : 1;
     binary_broadcast_params params{};
-    params.inputs[0] = lhs.dptr_;
-    params.inputs[1] = rhs.dptr_;
+    params.inputs[0]  = lhs.dptr_;
+    params.inputs[1]  = rhs.dptr_;
     params.outputs[0] = output.dptr_;
     for (int i = 0; i < ndim; ++i) {
       params.stride[0][i] = lstride[i];
       params.stride[1][i] = rstride[i];
-      params.oshape[i] = new_oshape[i];
+      params.oshape[i]    = new_oshape[i];
     }
     params.size[0] = lhs.shape_.Size();
     params.size[1] = rhs.shape_.Size();
@@ -301,7 +302,7 @@ void BinaryBroadcastRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
     const index_t other_dim = output.shape_.Size() / lead_dim;
 
     int first_different = -1;
-    int common_shape = 1;
+    int common_shape    = 1;
     for (int i = ndim - 1; i >= 0; --i) {
       if (params.stride[0][i] == params.stride[1][i]) {
         common_shape *= params.oshape[i];
@@ -312,37 +313,49 @@ void BinaryBroadcastRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
     }
 
     int lead_input_num = 0;
-    std::string code = std::string("const OpReqType req = ") +
-                       util::to_string(req[0]) +
+    std::string code   = std::string("const OpReqType req = ") + util::to_string(req[0]) +
                        ";\n"
                        "#define OP op::" +
                        OP +
                        "\n"
                        "const int ndim = " +
-                       std::to_string(ndim) +
-                       ";\n";
+                       std::to_string(ndim) + ";\n";
     if (common_shape != 1) {
-      VectorizedKernelRTCLauncher(code, "binary_broadcast_kernel",
-                                  broadcast_kernel_fwd, nvec,
-                                  lead_dim, other_dim, s, params,
-                                  inputs, outputs,
+      VectorizedKernelRTCLauncher(code,
+                                  "binary_broadcast_kernel",
+                                  broadcast_kernel_fwd,
+                                  nvec,
+                                  lead_dim,
+                                  other_dim,
+                                  s,
+                                  params,
+                                  inputs,
+                                  outputs,
                                   ctx.run_ctx.get_ctx().dev_id,
                                   lead_input_num);
     } else {
       if (params.stride[0][first_different] == 0) {
         lead_input_num = 1;
-        code += "const int side = 1;\n"
-                "using DType = InputType1;\n"
-                "using DType2 = InputType0;\n";
+        code +=
+            "const int side = 1;\n"
+            "using DType = InputType1;\n"
+            "using DType2 = InputType0;\n";
       } else {
-        code += "const int side = 0;\n"
-                "using DType = InputType0;\n"
-                "using DType2 = InputType1;\n";
+        code +=
+            "const int side = 0;\n"
+            "using DType = InputType0;\n"
+            "using DType2 = InputType1;\n";
       }
-      VectorizedKernelRTCLauncher(code, "single_side_binary_broadcast_kernel",
-                                  single_side_broadcast_kernel_fwd, nvec,
-                                  lead_dim, other_dim, s, params,
-                                  inputs, outputs,
+      VectorizedKernelRTCLauncher(code,
+                                  "single_side_binary_broadcast_kernel",
+                                  single_side_broadcast_kernel_fwd,
+                                  nvec,
+                                  lead_dim,
+                                  other_dim,
+                                  s,
+                                  params,
+                                  inputs,
+                                  outputs,
                                   ctx.run_ctx.get_ctx().dev_id,
                                   lead_input_num);
     }
@@ -358,37 +371,38 @@ void BinaryBroadcastRTCBackwardUseNone::operator()(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U);
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(outputs[0].shape_, outputs[1].shape_, inputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(outputs[0].shape_,
+                                         outputs[1].shape_,
+                                         inputs[0].shape_,
+                                         &new_lshape,
+                                         &new_rshape,
+                                         &new_oshape);
   if (!ndim) {
-    ElemwiseBinaryRTCBwdUseNone {LOP, ROP}(attrs, ctx, inputs, req, outputs);
+    ElemwiseBinaryRTCBwdUseNone{LOP, ROP}(attrs, ctx, inputs, req, outputs);  // NOLINT
   } else {
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s  = ctx.get_stream<gpu>();
     const TBlob lhs = outputs[0].reshape(new_lshape);
     const TBlob rhs = outputs[1].reshape(new_rshape);
     const TBlob out = inputs[0].reshape(new_oshape);
     BROADCAST_NDIM_SWITCH(ndim, NDim, {
       // Request temporary storage
-      size_t workspace_size = new_oshape.Size();
-      Tensor<gpu, 1, char> workspace =
-          ctx.requested[0].get_space_typed<gpu, 1, char>(
-              Shape1(workspace_size * sizeof(index_t)), s);
+      size_t workspace_size          = new_oshape.Size();
+      Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(
+          Shape1(workspace_size * sizeof(index_t)), s);
       if (out.shape_.Size() != 0) {
-        broadcast::RTCReduce(ctx, lhs, req[0],
-                             workspace, out,
-                             "red::sum{}", NDim, LOP);
-        broadcast::RTCReduce(ctx, rhs, req[1],
-                             workspace, out,
-                             "red::sum{}", NDim, ROP);
+        broadcast::RTCReduce(ctx, lhs, req[0], workspace, out, "red::sum{}", NDim, LOP);
+        broadcast::RTCReduce(ctx, rhs, req[1], workspace, out, "red::sum{}", NDim, ROP);
       } else {
         using namespace common::cuda::rtc::util;
         if (lhs.shape_.Size() != 0) {
-          cudaMemsetAsync(lhs.dptr_, 0,
+          cudaMemsetAsync(lhs.dptr_,
+                          0,
                           lhs.shape_.Size() * common::mshadow_type_info(lhs.type_flag_).size,
                           Stream<gpu>::GetStream(s));
         }
         if (rhs.shape_.Size() != 0) {
-          cudaMemsetAsync(rhs.dptr_, 0,
+          cudaMemsetAsync(rhs.dptr_,
+                          0,
                           rhs.shape_.Size() * common::mshadow_type_info(rhs.type_flag_).size,
                           Stream<gpu>::GetStream(s));
         }
@@ -410,38 +424,37 @@ void BinaryBroadcastRTCBackwardUseIn::operator()(const nnvm::NodeAttrs& attrs,
   }
   mxnet::TShape new_lshape, new_rshape, new_oshape;
   const bool need_bc = BinaryBroadcastShapeCompact(outputs[0].shape_,
-                                                   outputs[1].shape_, inputs[0].shape_,
-                                                   &new_lshape, &new_rshape, &new_oshape) != 0;
+                                                   outputs[1].shape_,
+                                                   inputs[0].shape_,
+                                                   &new_lshape,
+                                                   &new_rshape,
+                                                   &new_oshape) != 0;
   if (!need_bc) {
-    ElemwiseBinaryRTCBwdUseIn {LOP, ROP}(attrs, ctx, inputs, req, outputs);
+    ElemwiseBinaryRTCBwdUseIn{LOP, ROP}(attrs, ctx, inputs, req, outputs);  // NOLINT
   } else {
     BROADCAST_NDIM_SWITCH(new_oshape.ndim(), NDim, {
-        using namespace mshadow;
-        Stream<gpu> *s = ctx.get_stream<gpu>();
-        const TBlob lgrad = outputs[0].reshape(new_lshape);
-        const TBlob rgrad = outputs[1].reshape(new_rshape);
-        const TBlob ograd = inputs[0].reshape(new_oshape);
-        const TBlob lhs = inputs[1].reshape(new_lshape);
-        const TBlob rhs = inputs[2].reshape(new_rshape);
-        size_t workspace_size_l = broadcast::ReduceWorkspaceSize(
-            s, lgrad.shape_, req[0], ograd.shape_, lhs.shape_,
-            rhs.shape_);
-        size_t workspace_size_r = broadcast::ReduceWorkspaceSize(
-            s, rgrad.shape_, req[1], ograd.shape_, lhs.shape_,
-            rhs.shape_);
-        size_t workspace_size = std::max(workspace_size_l, workspace_size_r);
-        Tensor<gpu, 1, char> workspace =
-            ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
-        if (req[0] != kNullOp) {
-          broadcast::RTCReduce(ctx, lgrad, req[0], workspace,
-                               ograd, lhs, rhs, "red::sum{}", NDim,
-                               "mul", LOP);
-        }
-        if (req[1] != kNullOp) {
-          broadcast::RTCReduce(ctx, rgrad, req[1], workspace,
-                               ograd, lhs, rhs, "red::sum{}", NDim,
-                               "mul", ROP);
-        }
+      using namespace mshadow;
+      Stream<gpu>* s          = ctx.get_stream<gpu>();
+      const TBlob lgrad       = outputs[0].reshape(new_lshape);
+      const TBlob rgrad       = outputs[1].reshape(new_rshape);
+      const TBlob ograd       = inputs[0].reshape(new_oshape);
+      const TBlob lhs         = inputs[1].reshape(new_lshape);
+      const TBlob rhs         = inputs[2].reshape(new_rshape);
+      size_t workspace_size_l = broadcast::ReduceWorkspaceSize(
+          s, lgrad.shape_, req[0], ograd.shape_, lhs.shape_, rhs.shape_);
+      size_t workspace_size_r = broadcast::ReduceWorkspaceSize(
+          s, rgrad.shape_, req[1], ograd.shape_, lhs.shape_, rhs.shape_);
+      size_t workspace_size = std::max(workspace_size_l, workspace_size_r);
+      Tensor<gpu, 1, char> workspace =
+          ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
+      if (req[0] != kNullOp) {
+        broadcast::RTCReduce(
+            ctx, lgrad, req[0], workspace, ograd, lhs, rhs, "red::sum{}", NDim, "mul", LOP);
+      }
+      if (req[1] != kNullOp) {
+        broadcast::RTCReduce(
+            ctx, rgrad, req[1], workspace, ograd, lhs, rhs, "red::sum{}", NDim, "mul", ROP);
+      }
     });
   }
 }
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op.h b/src/operator/tensor/elemwise_binary_broadcast_op.h
index 62aa3eb6aa69..8f53837571a5 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op.h
+++ b/src/operator/tensor/elemwise_binary_broadcast_op.h
@@ -40,15 +40,16 @@
 namespace mxnet {
 namespace op {
 inline bool BinaryBroadcastShape(const nnvm::NodeAttrs& attrs,
-                                 mxnet::ShapeVector *in_attrs,
-                                 mxnet::ShapeVector *out_attrs) {
+                                 mxnet::ShapeVector* in_attrs,
+                                 mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& lhs = (*in_attrs)[0];
   mxnet::TShape& rhs = (*in_attrs)[1];
 
   // avoid pre-mature shape inference.
-  if (!mxnet::ndim_is_known(lhs) || !mxnet::ndim_is_known(rhs)) return false;
+  if (!mxnet::ndim_is_known(lhs) || !mxnet::ndim_is_known(rhs))
+    return false;
 
   if (lhs == rhs) {
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, lhs);
@@ -59,14 +60,17 @@ inline bool BinaryBroadcastShape(const nnvm::NodeAttrs& attrs,
   const int br = out.ndim() - rhs.ndim();
   for (int i = 0; i < out.ndim(); ++i) {
     dim_t l = 1, r = 1;
-    if (i >= bl) l = lhs[i-bl];
-    if (i >= br) r = rhs[i-br];
-    if (!mxnet::dim_size_is_known(l) || !mxnet::dim_size_is_known(r)) continue;
+    if (i >= bl)
+      l = lhs[i - bl];
+    if (i >= br)
+      r = rhs[i - br];
+    if (!mxnet::dim_size_is_known(l) || !mxnet::dim_size_is_known(r))
+      continue;
     if (l != r) {
       // Make it compatible with NumPy.
       // For example, (2, 3) cannot broadcast to (2, 0, 3), but (1, 3) can broadcast to (2, 0, 3).
-      CHECK(l == 1 || r == 1)
-        << "operands could not be broadcast together with shapes " << lhs << " " << rhs;
+      CHECK(l == 1 || r == 1) << "operands could not be broadcast together with shapes " << lhs
+                              << " " << rhs;
       out[i] = (l == 1 ? r : l);
     } else {
       out[i] = l;
@@ -85,15 +89,15 @@ inline bool BinaryBroadcastMulStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
   const int lhs_stype = in_attrs->at(0);
   const int rhs_stype = in_attrs->at(1);
-  int& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  int& out_stype      = out_attrs->at(0);
+  bool dispatched     = false;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) {
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -110,16 +114,16 @@ inline bool BinaryBroadcastAddStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1U);
   const int lhs_stype = in_attrs->at(0);
   const int rhs_stype = in_attrs->at(1);
-  int& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  int& out_stype      = out_attrs->at(0);
+  bool dispatched     = false;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && ((lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) ||
                       (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage))) {
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -127,42 +131,48 @@ inline bool BinaryBroadcastAddStorageType(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-#define BROADCAST_NDIM_SWITCH(ndim, NDim, ...)  \
-  if (ndim <= 2) {                    \
-    const int NDim = 2;               \
-    {__VA_ARGS__}                     \
-  } else if (ndim <= 4) {             \
-    const int NDim = 4;               \
-    {__VA_ARGS__}                     \
-  } else if (ndim <= broadcast::MAX_DIM) {  \
-    const int NDim = broadcast::MAX_DIM;    \
-    {__VA_ARGS__}                     \
-  } else {                            \
-    LOG(FATAL) << "NDim too large ";  \
+#define BROADCAST_NDIM_SWITCH(ndim, NDim, ...) \
+  if (ndim <= 2) {                             \
+    const int NDim = 2;                        \
+    { __VA_ARGS__ }                            \
+  } else if (ndim <= 4) {                      \
+    const int NDim = 4;                        \
+    { __VA_ARGS__ }                            \
+  } else if (ndim <= broadcast::MAX_DIM) {     \
+    const int NDim = broadcast::MAX_DIM;       \
+    { __VA_ARGS__ }                            \
+  } else {                                     \
+    LOG(FATAL) << "NDim too large ";           \
   }
 
-inline int BinaryBroadcastShapeCompact(const mxnet::TShape& lshape, const mxnet::TShape& rshape,
-                                       const mxnet::TShape& oshape, mxnet::TShape *new_lshape,
-                                       mxnet::TShape *new_rshape, mxnet::TShape *new_oshape) {
-  if (lshape == rshape) return 0;
+inline int BinaryBroadcastShapeCompact(const mxnet::TShape& lshape,
+                                       const mxnet::TShape& rshape,
+                                       const mxnet::TShape& oshape,
+                                       mxnet::TShape* new_lshape,
+                                       mxnet::TShape* new_rshape,
+                                       mxnet::TShape* new_oshape) {
+  if (lshape == rshape)
+    return 0;
   const int odim = std::max(oshape.ndim(), broadcast::MAX_DIM);
-  *new_lshape = mxnet::TShape(odim, 1);
-  *new_rshape = mxnet::TShape(odim, 1);
-  *new_oshape = mxnet::TShape(odim, 1);
-  int bl = oshape.ndim() - lshape.ndim();
-  int br = oshape.ndim() - rshape.ndim();
-  int j = 0;
+  *new_lshape    = mxnet::TShape(odim, 1);
+  *new_rshape    = mxnet::TShape(odim, 1);
+  *new_oshape    = mxnet::TShape(odim, 1);
+  int bl         = oshape.ndim() - lshape.ndim();
+  int br         = oshape.ndim() - rshape.ndim();
+  int j          = 0;
   index_t lprod = 1, rprod = 1, oprod = 1;
   for (int i = 0; i < oshape.ndim(); ++i) {
     index_t l = 1, r = 1, o = oshape[i];
-    if (i >= bl) l = lshape[i-bl];
-    if (i >= br) r = rshape[i-br];
-    if ((lprod != rprod || l != r) &&
-        lprod*l > 1 && rprod*r > 1) {
+    if (i >= bl)
+      l = lshape[i - bl];
+    if (i >= br)
+      r = rshape[i - br];
+    if ((lprod != rprod || l != r) && lprod * l > 1 && rprod * r > 1) {
       (*new_lshape)[j] = lprod;
       (*new_rshape)[j] = rprod;
       (*new_oshape)[j] = oprod;
-      lprod = rprod = oprod = 1; ++j;
+      lprod = rprod = oprod = 1;
+      ++j;
     }
     lprod *= l;
     rprod *= r;
@@ -187,58 +197,70 @@ inline int BinaryBroadcastShapeCompact(const mxnet::TShape& lshape, const mxnet:
   return j;
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastIntCompute(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
-  if (outputs[0].shape_.Size() == 0U) return;
+  if (outputs[0].shape_.Size() == 0U)
+    return;
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      inputs[0].shape_, inputs[1].shape_, outputs[0].shape_, &new_lshape, &new_rshape, &new_oshape);
   if (!ndim) {
     ElemwiseBinaryOp::ComputeInt<xpu, OP>(attrs, ctx, inputs, req, outputs);
   } else {
-    if (req[0] == kNullOp) return;
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     if (outputs[0].type_flag_ == mshadow::kBool) {
       LOG(FATAL) << "Operator " << attrs.op->name << " does not support boolean type";
     }
     MXNET_INT_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
-        mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+        mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
         mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
         mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-        mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-        template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-        inputs[0].dptr<DType>(), inputs[1].dptr<DType>(), outputs[0].dptr<DType>());
+        mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+            s,
+            new_oshape.Size(),
+            req[0],
+            lstride,
+            rstride,
+            oshape,
+            inputs[0].dptr<DType>(),
+            inputs[1].dptr<DType>(),
+            outputs[0].dptr<DType>());
       });
     });
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastCompute(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& outputs) {
-  if (outputs[0].shape_.Size() == 0U) return;
+  if (outputs[0].shape_.Size() == 0U)
+    return;
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      inputs[0].shape_, inputs[1].shape_, outputs[0].shape_, &new_lshape, &new_rshape, &new_oshape);
   if (!ndim) {
     ElemwiseBinaryOp::Compute<xpu, OP>(attrs, ctx, inputs, req, outputs);
   } else {
-    if (req[0] == kNullOp) return;
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     if (outputs[0].type_flag_ == mshadow::kBool) {
       LOG(FATAL) << "Operator " << attrs.op->name << " does not support boolean type";
     }
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
-        broadcast::BinaryBroadcastComputeImpl<NDim, DType, OP>(s, req[0],
+        broadcast::BinaryBroadcastComputeImpl<NDim, DType, OP>(s,
+                                                               req[0],
                                                                inputs[0].reshape(new_lshape),
                                                                inputs[1].reshape(new_rshape),
                                                                outputs[0].reshape(new_oshape));
@@ -283,69 +305,86 @@ struct BinaryBroadcastRTCBackwardUseIn {
 
 #endif  // MXNET_USE_CUDA
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastComputeWithBool(const nnvm::NodeAttrs& attrs,
                                     const OpContext& ctx,
                                     const std::vector<TBlob>& inputs,
                                     const std::vector<OpReqType>& req,
                                     const std::vector<TBlob>& outputs) {
-  if (outputs[0].shape_.Size() == 0U) return;
+  if (outputs[0].shape_.Size() == 0U)
+    return;
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(inputs[0].shape_, inputs[1].shape_, outputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      inputs[0].shape_, inputs[1].shape_, outputs[0].shape_, &new_lshape, &new_rshape, &new_oshape);
   if (!ndim) {
     ElemwiseBinaryOp::ComputeWithBool<xpu, OP>(attrs, ctx, inputs, req, outputs);
   } else {
-    if (req[0] == kNullOp) return;
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
-        mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+        mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
         mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
         mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-        mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-        template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-        inputs[0].dptr<DType>(), inputs[1].dptr<DType>(), outputs[0].dptr<DType>());
+        mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+            s,
+            new_oshape.Size(),
+            req[0],
+            lstride,
+            rstride,
+            oshape,
+            inputs[0].dptr<DType>(),
+            inputs[1].dptr<DType>(),
+            outputs[0].dptr<DType>());
       });
     });
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastComputeLogic(const nnvm::NodeAttrs& attrs,
                                  const OpContext& ctx,
                                  const std::vector<TBlob>& inputs,
                                  const std::vector<OpReqType>& req,
                                  const std::vector<TBlob>& outputs) {
-  if (outputs[0].shape_.Size() == 0U) return;
+  if (outputs[0].shape_.Size() == 0U)
+    return;
   mxnet::TShape new_lshape, new_rshape, new_oshape;
   const TBlob& lhs = inputs[0];
   const TBlob& rhs = inputs[1];
   const TBlob& out = outputs[0];
-  int ndim = BinaryBroadcastShapeCompact(lhs.shape_, rhs.shape_, out.shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim         = BinaryBroadcastShapeCompact(
+      lhs.shape_, rhs.shape_, out.shape_, &new_lshape, &new_rshape, &new_oshape);
   if (!ndim) {
     ElemwiseBinaryOp::ComputeLogic<xpu, OP>(attrs, ctx, inputs, req, outputs);
   } else {
-    if (req[0] == kNullOp) return;
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(lhs.type_flag_, DType, {
       MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(rhs.type_flag_, EType, {
-         BROADCAST_NDIM_SWITCH(ndim, NDim, {
-          mshadow::Shape<NDim> oshape = new_oshape.get<NDim>();
+        BROADCAST_NDIM_SWITCH(ndim, NDim, {
+          mshadow::Shape<NDim> oshape  = new_oshape.get<NDim>();
           mshadow::Shape<NDim> lstride = mxnet_op::calc_stride(new_lshape.get<NDim>());
           mshadow::Shape<NDim> rstride = mxnet_op::calc_stride(new_rshape.get<NDim>());
-          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::
-          template LaunchEx(s, new_oshape.Size(), req[0], lstride, rstride, oshape,
-                            lhs.dptr<DType>(), rhs.dptr<EType>(),
-                            out.dptr<bool>());
+          mxnet_op::Kernel<mxnet_op::binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(
+              s,
+              new_oshape.Size(),
+              req[0],
+              lstride,
+              rstride,
+              oshape,
+              lhs.dptr<DType>(),
+              rhs.dptr<EType>(),
+              out.dptr<bool>());
         });
       });
     });
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastCsrDnsCsrImpl(const OpContext& ctx,
                                   const NDArray& csr,
                                   const NDArray& dns,
@@ -355,16 +394,16 @@ void BinaryBroadcastCsrDnsCsrImpl(const OpContext& ctx,
   using namespace mxnet_op;
   using namespace csr;
   CHECK(req != kAddTo && req != kWriteInplace);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   bool col_vec;
   if (dns.shape().ndim() == 1) {
     col_vec = false;
   } else {
-    col_vec = (dns.shape()[0] == csr.shape()[0])? true : false;
+    col_vec = (dns.shape()[0] == csr.shape()[0]) ? true : false;
   }
 
   if (csr.storage_initialized()) {
-    const nnvm::dim_t nnz = csr.storage_shape()[0];
+    const nnvm::dim_t nnz      = csr.storage_shape()[0];
     const nnvm::dim_t num_rows = output.shape()[0];
     output.CheckAndAlloc({Shape1(num_rows + 1), Shape1(nnz)});
 
@@ -376,39 +415,53 @@ void BinaryBroadcastCsrDnsCsrImpl(const OpContext& ctx,
             if ((dns.shape().ndim() == 2 && dns.shape()[0] == 1 && dns.shape()[1] == 1) ||
                 (dns.shape().ndim() == 1 && dns.shape()[0] == 1)) {
               Kernel<csr_dns_csr_broadcast_kernel<req_type, OP, false>, xpu>::Launch(
-                s, nnz, csr.data().dptr<DType>(), dns.data().dptr<DType>(),
-                output.data().dptr<DType>(), nnz);
+                  s,
+                  nnz,
+                  csr.data().dptr<DType>(),
+                  dns.data().dptr<DType>(),
+                  output.data().dptr<DType>(),
+                  nnz);
             } else {
               // broadcast_mul/div between csr and column vector
               if (col_vec) {
                 Kernel<csr_dns_csr_broadcast_kernel<req_type, OP, true>, xpu>::Launch(
-                  s, num_rows, csr.data().dptr<DType>(), csr.aux_data(kIdx).dptr<CType>(),
-                  csr.aux_data(kIndPtr).dptr<RType>(), dns.data().dptr<DType>(),
-                  output.data().dptr<DType>());
-              // broadcast_mul/div between csr and row vector
+                    s,
+                    num_rows,
+                    csr.data().dptr<DType>(),
+                    csr.aux_data(kIdx).dptr<CType>(),
+                    csr.aux_data(kIndPtr).dptr<RType>(),
+                    dns.data().dptr<DType>(),
+                    output.data().dptr<DType>());
+                // broadcast_mul/div between csr and row vector
               } else {
                 Kernel<csr_dns_csr_broadcast_kernel<req_type, OP, false>, xpu>::Launch(
-                  s, num_rows, csr.data().dptr<DType>(), csr.aux_data(kIdx).dptr<CType>(),
-                  csr.aux_data(kIndPtr).dptr<RType>(), dns.data().dptr<DType>(),
-                  output.data().dptr<DType>());
+                    s,
+                    num_rows,
+                    csr.data().dptr<DType>(),
+                    csr.aux_data(kIdx).dptr<CType>(),
+                    csr.aux_data(kIndPtr).dptr<RType>(),
+                    dns.data().dptr<DType>(),
+                    output.data().dptr<DType>());
               }
             }
             Copy(output.aux_data(kIdx).FlatTo1D<xpu, CType>(),
-                 csr.aux_data(kIdx).FlatTo1D<xpu, CType>(), s);
+                 csr.aux_data(kIdx).FlatTo1D<xpu, CType>(),
+                 s);
             Copy(output.aux_data(kIndPtr).FlatTo1D<xpu, RType>(),
-                 csr.aux_data(kIndPtr).FlatTo1D<xpu, RType>(), s);
+                 csr.aux_data(kIndPtr).FlatTo1D<xpu, RType>(),
+                 s);
           });
         });
       });
     });
-  // If input csr is an empty matrix, fill zeros and return
+    // If input csr is an empty matrix, fill zeros and return
   } else {
     FillZerosCsrImpl(s, output);
     return;
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastCsrDnsDnsImpl(const OpContext& ctx,
                                   const NDArray& csr,
                                   const NDArray& dns,
@@ -423,33 +476,46 @@ void BinaryBroadcastCsrDnsDnsImpl(const OpContext& ctx,
   using namespace mxnet_op;
   using namespace csr;
   CHECK(req == kWriteTo) << "Only kWriteTo supported for broadcast(csr, dns) = dns";
-  const bool legal_op = std::is_same<OP, mshadow_op::plus>::value ||
-                        std::is_same<OP, mshadow_op::minus>::value;
+  const bool legal_op =
+      std::is_same<OP, mshadow_op::plus>::value || std::is_same<OP, mshadow_op::minus>::value;
   CHECK(legal_op) << "Only add/sub are supported for broadcast(csr, dns) = dns";
   CHECK_EQ(csr.shape()[0], output.shape()[0]);
   CHECK_EQ(csr.shape()[1], output.shape()[1]);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s    = ctx.get_stream<xpu>();
   const nnvm::dim_t num_rows = output.shape()[0];
   const nnvm::dim_t num_cols = output.shape()[1];
-  const TBlob& csr_data = csr.data();
-  const TBlob& csr_indices = csr.aux_data(kIdx);
-  const TBlob& csr_indptr = csr.aux_data(kIndPtr);
-  TBlob dns_data = dns.data();
-  TBlob out_data = output.data();
+  const TBlob& csr_data      = csr.data();
+  const TBlob& csr_indices   = csr.aux_data(kIdx);
+  const TBlob& csr_indptr    = csr.aux_data(kIndPtr);
+  TBlob dns_data             = dns.data();
+  TBlob out_data             = output.data();
 
   MSHADOW_TYPE_SWITCH(output.dtype(), DType, {
     BROADCAST_NDIM_SWITCH(ndim, NDim, {
-      Shape<NDim> oshape = new_oshape.get<NDim>();
+      Shape<NDim> oshape  = new_oshape.get<NDim>();
       Shape<NDim> lstride = calc_stride(new_csrshape.get<NDim>());
       Shape<NDim> rstride = calc_stride(new_dnsshape.get<NDim>());
       if (reverse && std::is_same<OP, mshadow_op::minus>::value) {
-        Kernel<binary_broadcast_kernel<NDim, mshadow_op::plus>, xpu>::
-        template LaunchEx(s, new_oshape.Size(), req, lstride, rstride, oshape,
-        DType(0), dns_data.dptr<DType>(), out_data.dptr<DType>());
+        Kernel<binary_broadcast_kernel<NDim, mshadow_op::plus>, xpu>::template LaunchEx(
+            s,
+            new_oshape.Size(),
+            req,
+            lstride,
+            rstride,
+            oshape,
+            DType(0),
+            dns_data.dptr<DType>(),
+            out_data.dptr<DType>());
       } else {
-        Kernel<binary_broadcast_kernel<NDim, OP>, xpu>::
-        template LaunchEx(s, new_oshape.Size(), req, lstride, rstride, oshape,
-        DType(0), dns_data.dptr<DType>(), out_data.dptr<DType>());
+        Kernel<binary_broadcast_kernel<NDim, OP>, xpu>::template LaunchEx(s,
+                                                                          new_oshape.Size(),
+                                                                          req,
+                                                                          lstride,
+                                                                          rstride,
+                                                                          oshape,
+                                                                          DType(0),
+                                                                          dns_data.dptr<DType>(),
+                                                                          out_data.dptr<DType>());
       }
     });
   });
@@ -460,12 +526,24 @@ void BinaryBroadcastCsrDnsDnsImpl(const OpContext& ctx,
           MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
             if (reverse && std::is_same<OP, mshadow_op::minus>::value) {
               Kernel<csr_dns_map_kernel<req_type, mshadow_op::minus, true>, xpu>::Launch(
-                s, num_rows, csr_data.dptr<DType>(), csr_indices.dptr<CType>(),
-                csr_indptr.dptr<RType>(), out_data.dptr<DType>(), num_rows, num_cols);
+                  s,
+                  num_rows,
+                  csr_data.dptr<DType>(),
+                  csr_indices.dptr<CType>(),
+                  csr_indptr.dptr<RType>(),
+                  out_data.dptr<DType>(),
+                  num_rows,
+                  num_cols);
             } else {
               Kernel<csr_dns_map_kernel<req_type, mshadow_op::plus>, xpu>::Launch(
-                s, num_rows, csr_data.dptr<DType>(), csr_indices.dptr<CType>(),
-                csr_indptr.dptr<RType>(), out_data.dptr<DType>(), num_rows, num_cols);
+                  s,
+                  num_rows,
+                  csr_data.dptr<DType>(),
+                  csr_indices.dptr<CType>(),
+                  csr_indptr.dptr<RType>(),
+                  out_data.dptr<DType>(),
+                  num_rows,
+                  num_cols);
             }
           });
         });
@@ -474,7 +552,7 @@ void BinaryBroadcastCsrDnsDnsImpl(const OpContext& ctx,
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastComputeSparseEx(const nnvm::NodeAttrs& attrs,
                                     const OpContext& ctx,
                                     const std::vector<NDArray>& inputs,
@@ -484,11 +562,12 @@ void BinaryBroadcastComputeSparseEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_LE(inputs[1].shape().ndim(), 2)
-    << "input dense matrix should have less than or equal to 2 dimensions";
-  if (req[0] == kNullOp) return;
-  const NDArray& lhs = inputs[0];
-  const NDArray& rhs = inputs[1];
-  const NDArray& out = outputs[0];
+      << "input dense matrix should have less than or equal to 2 dimensions";
+  if (req[0] == kNullOp)
+    return;
+  const NDArray& lhs   = inputs[0];
+  const NDArray& rhs   = inputs[1];
+  const NDArray& out   = outputs[0];
   const auto lhs_stype = lhs.storage_type();
   const auto rhs_stype = rhs.storage_type();
   const auto out_stype = out.storage_type();
@@ -497,7 +576,7 @@ void BinaryBroadcastComputeSparseEx(const nnvm::NodeAttrs& attrs,
     if (lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage && out_stype == kCSRStorage) {
       const bool supported_op = std::is_same<OP, mshadow_op::mul>::value;
       CHECK(supported_op)
-        << "Please use elemwise_div for division between csr and dense of the same shape";
+          << "Please use elemwise_div for division between csr and dense of the same shape";
       ElemwiseBinaryOp::DnsCsrCsrOp<xpu, mshadow_op::mul>(attrs, ctx, rhs, lhs, req[0], out, true);
     }
   } else {
@@ -510,7 +589,7 @@ void BinaryBroadcastComputeSparseEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu, typename OP>
+template <typename xpu, typename OP>
 void BinaryBroadcastComputeDenseEx(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const std::vector<NDArray>& inputs,
@@ -520,20 +599,21 @@ void BinaryBroadcastComputeDenseEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   CHECK_LE(inputs[1].shape().ndim(), 2)
-    << "input dense matrix should have less than or equal to 2 dimensions";
-  if (req[0] == kNullOp) return;
-  const NDArray& lhs = inputs[0];
-  const NDArray& rhs = inputs[1];
-  const NDArray& out = outputs[0];
+      << "input dense matrix should have less than or equal to 2 dimensions";
+  if (req[0] == kNullOp)
+    return;
+  const NDArray& lhs   = inputs[0];
+  const NDArray& rhs   = inputs[1];
+  const NDArray& out   = outputs[0];
   const auto lhs_stype = lhs.storage_type();
   const auto rhs_stype = rhs.storage_type();
   const auto out_stype = out.storage_type();
-  bool reverse = (lhs_stype == kDefaultStorage);
-  const NDArray& dns = (reverse) ? lhs : rhs;
-  const NDArray& csr = (reverse) ? rhs : lhs;
+  bool reverse         = (lhs_stype == kDefaultStorage);
+  const NDArray& dns   = (reverse) ? lhs : rhs;
+  const NDArray& csr   = (reverse) ? rhs : lhs;
   mxnet::TShape new_csrshape, new_dnsshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(csr.shape(), dns.shape(), out.shape(),
-                                         &new_csrshape, &new_dnsshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(
+      csr.shape(), dns.shape(), out.shape(), &new_csrshape, &new_dnsshape, &new_oshape);
 
   if (((lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) ||
        (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage)) &&
@@ -544,40 +624,42 @@ void BinaryBroadcastComputeDenseEx(const nnvm::NodeAttrs& attrs,
       ElemwiseBinaryOp::DnsCsrDnsOp<OP>(s, attrs, ctx, dns, csr, req[0], outputs[0], !reverse);
     } else {
       // broadcast(CSR, Dense(1D)) = CSR
-      BinaryBroadcastCsrDnsDnsImpl<xpu, OP>(ctx, csr, dns, req[0], out,
-                                            new_csrshape, new_dnsshape, new_oshape,
-                                            ndim, reverse);
+      BinaryBroadcastCsrDnsDnsImpl<xpu, OP>(
+          ctx, csr, dns, req[0], out, new_csrshape, new_dnsshape, new_oshape, ndim, reverse);
     }
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
 }
 
-template<typename xpu, typename LOP, typename ROP>
+template <typename xpu, typename LOP, typename ROP>
 inline typename std::enable_if<std::is_same<xpu, cpu>::value, void>::type
 BinaryBroadcastBackwardUseNone(const nnvm::NodeAttrs& attrs,
-                                    const OpContext& ctx,
-                                    const std::vector<TBlob>& inputs,
-                                    const std::vector<OpReqType>& req,
-                                    const std::vector<TBlob>& outputs) {
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   using namespace broadcast;
   mxnet::TShape new_lshape, new_rshape, new_oshape;
-  int ndim = BinaryBroadcastShapeCompact(outputs[0].shape_, outputs[1].shape_, inputs[0].shape_,
-                                         &new_lshape, &new_rshape, &new_oshape);
+  int ndim = BinaryBroadcastShapeCompact(outputs[0].shape_,
+                                         outputs[1].shape_,
+                                         inputs[0].shape_,
+                                         &new_lshape,
+                                         &new_rshape,
+                                         &new_oshape);
   if (!ndim) {
     ElemwiseBinaryOp::BackwardUseNone<cpu, LOP, ROP>(attrs, ctx, inputs, req, outputs);
   } else {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Stream<cpu> *s = ctx.get_stream<cpu>();
+      Stream<cpu>* s  = ctx.get_stream<cpu>();
       const TBlob lhs = outputs[0].reshape(new_lshape);
       const TBlob rhs = outputs[1].reshape(new_rshape);
       const TBlob out = inputs[0].reshape(new_oshape);
       BROADCAST_NDIM_SWITCH(ndim, NDim, {
         // Request temporary storage
-        size_t workspace_size = new_oshape.Size();
-        Tensor<cpu, 1, char> workspace =
-            ctx.requested[0].get_space_typed<cpu, 1, char>(
-                Shape1(workspace_size * sizeof(index_t)), s);
+        size_t workspace_size          = new_oshape.Size();
+        Tensor<cpu, 1, char> workspace = ctx.requested[0].get_space_typed<cpu, 1, char>(
+            Shape1(workspace_size * sizeof(index_t)), s);
         ReduceWithExtraMem<red::sum, NDim, DType, LOP>(s, lhs, req[0], workspace, out);
         ReduceWithExtraMem<red::sum, NDim, DType, ROP>(s, rhs, req[1], workspace, out);
       });
@@ -585,7 +667,7 @@ BinaryBroadcastBackwardUseNone(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu, int ndim, typename DType, typename LOP, typename ROP>
+template <typename xpu, int ndim, typename DType, typename LOP, typename ROP>
 void BinaryBroadcastBackwardUseInImplWithWorkspace(const OpContext& ctx,
                                                    const std::vector<TBlob>& inputs,
                                                    const std::vector<OpReqType>& req,
@@ -597,21 +679,21 @@ void BinaryBroadcastBackwardUseInImplWithWorkspace(const OpContext& ctx,
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace broadcast;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob lgrad = outputs[0].reshape(new_lshape);
   const TBlob rgrad = outputs[1].reshape(new_rshape);
   const TBlob ograd = inputs[0].reshape(new_oshape);
-  const TBlob lhs = inputs[1].reshape(new_lshape);
-  const TBlob rhs = inputs[2].reshape(new_rshape);
+  const TBlob lhs   = inputs[1].reshape(new_lshape);
+  const TBlob rhs   = inputs[2].reshape(new_rshape);
   if (ograd.Size() != 0) {
-    Reduce<red::sum, ndim, DType, op::mshadow_op::mul, LOP>(s, lgrad, req[0], workspace,
-      ograd, lhs, rhs);
-    Reduce<red::sum, ndim, DType, op::mshadow_op::mul, ROP>(s, rgrad, req[1], workspace,
-      ograd, lhs, rhs);
+    Reduce<red::sum, ndim, DType, op::mshadow_op::mul, LOP>(
+        s, lgrad, req[0], workspace, ograd, lhs, rhs);
+    Reduce<red::sum, ndim, DType, op::mshadow_op::mul, ROP>(
+        s, rgrad, req[1], workspace, ograd, lhs, rhs);
   }
 }
 
-template<typename xpu, int ndim, typename DType, typename LOP, typename ROP>
+template <typename xpu, int ndim, typename DType, typename LOP, typename ROP>
 inline void BinaryBroadcastBackwardUseInImpl(const OpContext& ctx,
                                              const std::vector<TBlob>& inputs,
                                              const std::vector<OpReqType>& req,
@@ -622,26 +704,26 @@ inline void BinaryBroadcastBackwardUseInImpl(const OpContext& ctx,
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace broadcast;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob lgrad = outputs[0].reshape(new_lshape);
   const TBlob rgrad = outputs[1].reshape(new_rshape);
   const TBlob ograd = inputs[0].reshape(new_oshape);
-  const TBlob lhs = inputs[1].reshape(new_lshape);
-  const TBlob rhs = inputs[2].reshape(new_rshape);
-  size_t workspace_size_l = ReduceWorkspaceSize(
-      s, lgrad.shape_, req[0], ograd.shape_, lhs.shape_, rhs.shape_);
-  size_t workspace_size_r = ReduceWorkspaceSize(
-      s, rgrad.shape_, req[1], ograd.shape_, lhs.shape_, rhs.shape_);
+  const TBlob lhs   = inputs[1].reshape(new_lshape);
+  const TBlob rhs   = inputs[2].reshape(new_rshape);
+  size_t workspace_size_l =
+      ReduceWorkspaceSize(s, lgrad.shape_, req[0], ograd.shape_, lhs.shape_, rhs.shape_);
+  size_t workspace_size_r =
+      ReduceWorkspaceSize(s, rgrad.shape_, req[1], ograd.shape_, lhs.shape_, rhs.shape_);
   size_t workspace_size = std::max(workspace_size_l, workspace_size_r);
   Tensor<xpu, 1, char> workspace =
       ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
-  Reduce<red::sum, ndim, DType, op::mshadow_op::mul, LOP>(s, lgrad, req[0], workspace,
-    ograd, lhs, rhs);
-  Reduce<red::sum, ndim, DType, op::mshadow_op::mul, ROP>(s, rgrad, req[1], workspace,
-    ograd, lhs, rhs);
+  Reduce<red::sum, ndim, DType, op::mshadow_op::mul, LOP>(
+      s, lgrad, req[0], workspace, ograd, lhs, rhs);
+  Reduce<red::sum, ndim, DType, op::mshadow_op::mul, ROP>(
+      s, rgrad, req[1], workspace, ograd, lhs, rhs);
 }
 
-template<typename xpu, typename LOP, typename ROP>
+template <typename xpu, typename LOP, typename ROP>
 void BinaryBroadcastBackwardUseIn(const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<TBlob>& inputs,
@@ -653,36 +735,39 @@ void BinaryBroadcastBackwardUseIn(const nnvm::NodeAttrs& attrs,
   }
   mxnet::TShape new_lshape, new_rshape, new_oshape;
   const bool need_bc = BinaryBroadcastShapeCompact(outputs[0].shape_,
-                                                   outputs[1].shape_, inputs[0].shape_,
-                                                   &new_lshape, &new_rshape, &new_oshape) != 0;
+                                                   outputs[1].shape_,
+                                                   inputs[0].shape_,
+                                                   &new_lshape,
+                                                   &new_rshape,
+                                                   &new_oshape) != 0;
   if (!need_bc) {
     ElemwiseBinaryOp::BackwardUseIn<xpu, LOP, ROP>(attrs, ctx, inputs, req, outputs);
   } else {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       BROADCAST_NDIM_SWITCH(new_oshape.ndim(), NDim, {
         BinaryBroadcastBackwardUseInImpl<xpu, NDim, DType, LOP, ROP>(
-          ctx, inputs, req, outputs, new_lshape, new_rshape, new_oshape);
+            ctx, inputs, req, outputs, new_lshape, new_rshape, new_oshape);
       });
     });
   }
 }
 
-#define MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(name)                \
-  NNVM_REGISTER_OP(name)                                              \
-  .set_num_inputs(2)                                                  \
-  .set_num_outputs(1)                                                 \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",                 \
-    [](const NodeAttrs& attrs) {                                      \
-      return std::vector<std::string>{"lhs", "rhs"};                  \
-    })                                                                \
-  .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)  \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)       \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                   \
-    [](const NodeAttrs& attrs){                                       \
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};       \
-    })                                                                \
-  .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")                      \
-  .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function")
+#define MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(name)                                            \
+  NNVM_REGISTER_OP(name)                                                                          \
+      .set_num_inputs(2)                                                                          \
+      .set_num_outputs(1)                                                                         \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         return std::vector<std::string>{"lhs", "rhs"};           \
+                                       })                                                         \
+      .set_attr<mxnet::FInferShape>("FInferShape", BinaryBroadcastShape)                          \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)                               \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                           \
+                                      [](const NodeAttrs& attrs) {                                \
+                                        return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}}; \
+                                      })                                                          \
+      .add_argument("lhs", "NDArray-or-Symbol", "First input to the function")                    \
+      .add_argument("rhs", "NDArray-or-Symbol", "Second input to the function")
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op_basic.cc b/src/operator/tensor/elemwise_binary_broadcast_op_basic.cc
index 18fe653b1c85..cb3d17ede83c 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op_basic.cc
+++ b/src/operator/tensor/elemwise_binary_broadcast_op_basic.cc
@@ -31,8 +31,8 @@ namespace op {
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_add)
 MXNET_ADD_SPARSE_OP_ALIAS(broadcast_add)
 MXNET_ADD_SPARSE_OP_ALIAS(broadcast_plus)
-.add_alias("broadcast_plus")
-.describe(R"code(Returns element-wise sum of the input arrays with broadcasting.
+    .add_alias("broadcast_plus")
+    .describe(R"code(Returns element-wise sum of the input arrays with broadcasting.
 
 `broadcast_plus` is an alias to the function `broadcast_add`.
 
@@ -56,31 +56,33 @@ Supported sparse operations:
    broadcast_add(dense(1D), csr) = dense
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::plus>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryBroadcastComputeDenseEx<cpu, op::mshadow_op::plus>)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastAddStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_broadcast_add"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::plus>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>",
+                          BinaryBroadcastComputeDenseEx<cpu, op::mshadow_op::plus>)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastAddStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_broadcast_add"});
 
 NNVM_REGISTER_OP(_backward_broadcast_add)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseNone<cpu, mshadow_op::identity,
-                                                                mshadow_op::identity>);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseNone<cpu, mshadow_op::identity, mshadow_op::identity>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_sub)
 MXNET_ADD_SPARSE_OP_ALIAS(broadcast_sub)
 MXNET_ADD_SPARSE_OP_ALIAS(broadcast_minus)
-.add_alias("broadcast_minus")
-.describe(R"code(Returns element-wise difference of the input arrays with broadcasting.
+    .add_alias("broadcast_minus")
+    .describe(R"code(Returns element-wise difference of the input arrays with broadcasting.
 
 `broadcast_minus` is an alias to the function `broadcast_sub`.
 
@@ -104,29 +106,31 @@ Supported sparse operations:
    broadcast_sub/minus(dense(1D), csr) = dense
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::minus>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryBroadcastComputeDenseEx<cpu, op::mshadow_op::minus>)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastAddStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_broadcast_sub"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::minus>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>",
+                          BinaryBroadcastComputeDenseEx<cpu, op::mshadow_op::minus>)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastAddStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_broadcast_sub"});
 
 NNVM_REGISTER_OP(_backward_broadcast_sub)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseNone<cpu, mshadow_op::identity,
-                                                                mshadow_op::negation>);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseNone<cpu, mshadow_op::identity, mshadow_op::negation>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_mul)
 MXNET_ADD_SPARSE_OP_ALIAS(broadcast_mul)
-.describe(R"code(Returns element-wise product of the input arrays with broadcasting.
+    .describe(R"code(Returns element-wise product of the input arrays with broadcasting.
 
 Example::
 
@@ -144,30 +148,30 @@ Supported sparse operations:
    broadcast_mul(csr, dense(1D)) = csr
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::mul>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryBroadcastComputeSparseEx<cpu, op::mshadow_op::mul>)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastMulStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_mul"});
-
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::mul>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>",
+                          BinaryBroadcastComputeSparseEx<cpu, op::mshadow_op::mul>)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastMulStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_mul"});
 
 NNVM_REGISTER_OP(_backward_broadcast_mul)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::right,
-                                                              mshadow_op::left>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::right, mshadow_op::left>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_div)
 MXNET_ADD_SPARSE_OP_ALIAS(broadcast_div)
-.describe(R"code(Returns element-wise division of the input arrays with broadcasting.
+    .describe(R"code(Returns element-wise division of the input arrays with broadcasting.
 
 Example::
 
@@ -185,28 +189,30 @@ Supported sparse operations:
    broadcast_div(csr, dense(1D)) = csr
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::div>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryBroadcastComputeSparseEx<cpu, op::mshadow_op::div>)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastMulStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_div"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, op::mshadow_op::div>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>",
+                          BinaryBroadcastComputeSparseEx<cpu, op::mshadow_op::div>)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryBroadcastMulStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_div"});
 
 NNVM_REGISTER_OP(_backward_broadcast_div)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::div_grad,
-                                                              mshadow_op::div_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::div_grad, mshadow_op::div_rgrad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_mod)
-.describe(R"code(Returns element-wise modulo of the input arrays with broadcasting.
+    .describe(R"code(Returns element-wise modulo of the input arrays with broadcasting.
 
 Example::
 
@@ -220,23 +226,24 @@ Example::
                           [ 2.,  2.,  2.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::mod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_mod"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::mod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_mod"});
 
 NNVM_REGISTER_OP(_backward_broadcast_mod)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::mod_grad,
-                                                                  mshadow_op::mod_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::mod_grad, mshadow_op::mod_rgrad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op_basic.cu b/src/operator/tensor/elemwise_binary_broadcast_op_basic.cu
index f20a014944eb..a1b85783c890 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op_basic.cu
+++ b/src/operator/tensor/elemwise_binary_broadcast_op_basic.cu
@@ -29,38 +29,42 @@
 namespace mxnet {
 namespace op {
 NNVM_REGISTER_OP(broadcast_add)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"add"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryBroadcastComputeDenseEx<gpu, op::mshadow_op::plus>);
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"add"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>",
+                          BinaryBroadcastComputeDenseEx<gpu, op::mshadow_op::plus>);
 
 NNVM_REGISTER_OP(_backward_broadcast_add)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseNone{"identity", "identity"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseNone{"identity", "identity"});
 
 NNVM_REGISTER_OP(broadcast_sub)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"sub"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryBroadcastComputeDenseEx<gpu, op::mshadow_op::minus>);
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"sub"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>",
+                          BinaryBroadcastComputeDenseEx<gpu, op::mshadow_op::minus>);
 
 NNVM_REGISTER_OP(_backward_broadcast_sub)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseNone{"identity", "negation"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseNone{"identity", "negation"});
 
 NNVM_REGISTER_OP(broadcast_mul)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mul"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryBroadcastComputeSparseEx<gpu, op::mshadow_op::mul>);
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mul"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>",
+                          BinaryBroadcastComputeSparseEx<gpu, op::mshadow_op::mul>);
 
 NNVM_REGISTER_OP(_backward_broadcast_mul)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"right", "left"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"right", "left"});
 
 NNVM_REGISTER_OP(broadcast_div)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"div"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryBroadcastComputeSparseEx<gpu, op::mshadow_op::div>);
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"div"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>",
+                          BinaryBroadcastComputeSparseEx<gpu, op::mshadow_op::div>);
 
 NNVM_REGISTER_OP(_backward_broadcast_div)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"div_grad", "div_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"div_grad", "div_rgrad"});
 
 NNVM_REGISTER_OP(broadcast_mod)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mod"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"mod"});
 
 NNVM_REGISTER_OP(_backward_broadcast_mod)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"mod_grad", "mod_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"mod_grad", "mod_rgrad"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op_extended.cc b/src/operator/tensor/elemwise_binary_broadcast_op_extended.cc
index 9e52b3197dcb..152a634e646a 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op_extended.cc
+++ b/src/operator/tensor/elemwise_binary_broadcast_op_extended.cc
@@ -29,7 +29,8 @@
 namespace mxnet {
 namespace op {
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_power)
-.describe(R"code(Returns result of first array elements raised to powers from second array, element-wise with broadcasting.
+    .describe(
+        R"code(Returns result of first array elements raised to powers from second array, element-wise with broadcasting.
 
 Example::
 
@@ -43,27 +44,28 @@ Example::
                             [ 4.,  4.,  4.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::power>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_power"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::power>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_power"});
 
 NNVM_REGISTER_OP(_backward_broadcast_power)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::power_grad,
-                                                              mshadow_op::power_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::power_grad, mshadow_op::power_rgrad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_maximum)
-.add_alias("_npi_maximum")
-.describe(R"code(Returns element-wise maximum of the input arrays with broadcasting.
+    .add_alias("_npi_maximum")
+    .describe(R"code(Returns element-wise maximum of the input arrays with broadcasting.
 
 This function compares two input arrays and returns a new array having the element-wise maxima.
 
@@ -79,27 +81,27 @@ Example::
                               [ 1.,  1.,  1.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::maximum>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_maximum"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::maximum>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_maximum"});
 
 NNVM_REGISTER_OP(_backward_broadcast_maximum)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::ge,
-                                                              mshadow_op::lt>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::ge, mshadow_op::lt>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_minimum)
-.add_alias("_npi_minimum")
-.describe(R"code(Returns element-wise minimum of the input arrays with broadcasting.
+    .add_alias("_npi_minimum")
+    .describe(R"code(Returns element-wise minimum of the input arrays with broadcasting.
 
 This function compares two input arrays and returns a new array having the element-wise minima.
 
@@ -115,26 +117,26 @@ Example::
                               [ 1.,  1.,  1.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::minimum>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_minimum"});
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::minimum>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_minimum"});
 
 NNVM_REGISTER_OP(_backward_broadcast_minimum)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 1}};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::le,
-                                                              mshadow_op::gt>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu, mshadow_op::le, mshadow_op::gt>);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_hypot)
-.describe(R"code( Returns the hypotenuse of a right angled triangle, given its "legs"
+    .describe(R"code( Returns the hypotenuse of a right angled triangle, given its "legs"
 with broadcasting.
 
 It is equivalent to doing :math:`sqrt(x_1^2 + x_2^2)`.
@@ -156,23 +158,25 @@ Example::
                             [ 5.,  5.,  5.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::hypot>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_broadcast_hypot" });
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::hypot>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_broadcast_hypot"});
 
 NNVM_REGISTER_OP(_backward_broadcast_hypot)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-[](const NodeAttrs& attrs) {
-  return std::vector<std::pair<int, int> > {{0, 1}};
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastBackwardUseIn<cpu, mshadow_op::hypot_grad_left,
-                    mshadow_op::hypot_grad_right>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryBroadcastBackwardUseIn<cpu,
+                                                     mshadow_op::hypot_grad_left,
+                                                     mshadow_op::hypot_grad_right>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op_extended.cu b/src/operator/tensor/elemwise_binary_broadcast_op_extended.cu
index 042a4da2b688..a34c09cd38f7 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op_extended.cu
+++ b/src/operator/tensor/elemwise_binary_broadcast_op_extended.cu
@@ -29,29 +29,30 @@
 namespace mxnet {
 namespace op {
 NNVM_REGISTER_OP(broadcast_power)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"power"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"power"});
 
 NNVM_REGISTER_OP(_backward_broadcast_power)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"power_grad", "power_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        BinaryBroadcastRTCBackwardUseIn{"power_grad", "power_rgrad"});
 
 NNVM_REGISTER_OP(broadcast_maximum)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"max"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"max"});
 
 NNVM_REGISTER_OP(_backward_broadcast_maximum)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"greater_equal", "less"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"greater_equal", "less"});
 
 NNVM_REGISTER_OP(broadcast_minimum)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"min"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"min"});
 
 NNVM_REGISTER_OP(_backward_broadcast_minimum)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"less_equal", "greater"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"less_equal", "greater"});
 
 NNVM_REGISTER_OP(broadcast_hypot)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"hypot"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"hypot"});
 
 NNVM_REGISTER_OP(_backward_broadcast_hypot)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCBackwardUseIn{"hypot_grad_left",
-                                                                     "hypot_grad_right"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        BinaryBroadcastRTCBackwardUseIn{"hypot_grad_left", "hypot_grad_right"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op_logic.cc b/src/operator/tensor/elemwise_binary_broadcast_op_logic.cc
index d7e51418e4e4..808356a89214 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op_logic.cc
+++ b/src/operator/tensor/elemwise_binary_broadcast_op_logic.cc
@@ -30,7 +30,8 @@ namespace mxnet {
 namespace op {
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_equal)
-.describe(R"code(Returns the result of element-wise **equal to** (==) comparison operation with broadcasting.
+    .describe(
+        R"code(Returns the result of element-wise **equal to** (==) comparison operation with broadcasting.
 
 Example::
 
@@ -44,11 +45,12 @@ Example::
                             [ 1.,  1.,  1.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::eq>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::eq>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_not_equal)
-.describe(R"code(Returns the result of element-wise **not equal to** (!=) comparison operation with broadcasting.
+    .describe(
+        R"code(Returns the result of element-wise **not equal to** (!=) comparison operation with broadcasting.
 
 Example::
 
@@ -62,11 +64,12 @@ Example::
                                 [ 0.,  0.,  0.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::ne>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::ne>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_greater)
-.describe(R"code(Returns the result of element-wise **greater than** (>) comparison operation with broadcasting.
+    .describe(
+        R"code(Returns the result of element-wise **greater than** (>) comparison operation with broadcasting.
 
 Example::
 
@@ -80,14 +83,14 @@ Example::
                               [ 0.,  0.,  0.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::gt>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::gt>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
-NNVM_REGISTER_OP(broadcast_greater)
-.add_alias("_npx_broadcast_greater");
+NNVM_REGISTER_OP(broadcast_greater).add_alias("_npx_broadcast_greater");
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_greater_equal)
-.describe(R"code(Returns the result of element-wise **greater than or equal to** (>=) comparison operation with broadcasting.
+    .describe(
+        R"code(Returns the result of element-wise **greater than or equal to** (>=) comparison operation with broadcasting.
 
 Example::
 
@@ -101,11 +104,12 @@ Example::
                                     [ 1.,  1.,  1.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::ge>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::ge>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_lesser)
-.describe(R"code(Returns the result of element-wise **lesser than** (<) comparison operation with broadcasting.
+    .describe(
+        R"code(Returns the result of element-wise **lesser than** (<) comparison operation with broadcasting.
 
 Example::
 
@@ -119,11 +123,12 @@ Example::
                              [ 0.,  0.,  0.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::lt>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::lt>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_lesser_equal)
-.describe(R"code(Returns the result of element-wise **lesser than or equal to** (<=) comparison operation with broadcasting.
+    .describe(
+        R"code(Returns the result of element-wise **lesser than or equal to** (<=) comparison operation with broadcasting.
 
 Example::
 
@@ -137,11 +142,11 @@ Example::
                                    [ 1.,  1.,  1.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::le>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::le>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_logical_and)
-.describe(R"code(Returns the result of element-wise **logical and** with broadcasting.
+    .describe(R"code(Returns the result of element-wise **logical and** with broadcasting.
 
 Example::
 
@@ -155,11 +160,11 @@ Example::
                                   [ 1.,  1.,  1.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::logical_and>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::logical_and>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_logical_or)
-.describe(R"code(Returns the result of element-wise **logical or** with broadcasting.
+    .describe(R"code(Returns the result of element-wise **logical or** with broadcasting.
 
 Example::
 
@@ -173,11 +178,11 @@ Example::
                                  [ 1.,  1.,  0.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::logical_or>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::logical_or>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY_BROADCAST(broadcast_logical_xor)
-.describe(R"code(Returns the result of element-wise **logical xor** with broadcasting.
+    .describe(R"code(Returns the result of element-wise **logical xor** with broadcasting.
 
 Example::
 
@@ -191,8 +196,8 @@ Example::
                                   [ 1.,  1.,  0.]]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::logical_xor>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", BinaryBroadcastCompute<cpu, mshadow_op::logical_xor>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_broadcast_op_logic.cu b/src/operator/tensor/elemwise_binary_broadcast_op_logic.cu
index bd2f50a23566..f685dcc06460 100644
--- a/src/operator/tensor/elemwise_binary_broadcast_op_logic.cu
+++ b/src/operator/tensor/elemwise_binary_broadcast_op_logic.cu
@@ -30,31 +30,31 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(broadcast_equal)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"equal"});
 
 NNVM_REGISTER_OP(broadcast_not_equal)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"not_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"not_equal"});
 
 NNVM_REGISTER_OP(broadcast_greater)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"greater"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"greater"});
 
 NNVM_REGISTER_OP(broadcast_greater_equal)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"greater_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"greater_equal"});
 
 NNVM_REGISTER_OP(broadcast_lesser)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"less"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"less"});
 
 NNVM_REGISTER_OP(broadcast_lesser_equal)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"less_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"less_equal"});
 
 NNVM_REGISTER_OP(broadcast_logical_and)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"logical_and"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"logical_and"});
 
 NNVM_REGISTER_OP(broadcast_logical_or)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"logical_or"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"logical_or"});
 
 NNVM_REGISTER_OP(broadcast_logical_xor)
-.set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"logical_xor"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryBroadcastRTCCompute{"logical_xor"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_op-inl.h b/src/operator/tensor/elemwise_binary_op-inl.h
index f47c5d3cc8fa..9d8b43adb2af 100644
--- a/src/operator/tensor/elemwise_binary_op-inl.h
+++ b/src/operator/tensor/elemwise_binary_op-inl.h
@@ -28,7 +28,7 @@
 #include <algorithm>
 #include "./elemwise_binary_op.h"
 #include "../mxnet_op.h"
-#define WARP_SIZE 32
+#define WARP_SIZE      32
 #define WARP_SIZE_BITS 5
 
 namespace mxnet {
@@ -41,24 +41,24 @@ namespace op {
   dns, rsp -> dns,
   rsp, dns -> dns,
 */
-template<typename OP>
-void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
-                                const nnvm::NodeAttrs &attrs,
-                                const OpContext &ctx,
-                                const NDArray &lhs,
-                                const NDArray &rhs,
+template <typename OP>
+void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu>* s,
+                                const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const NDArray& lhs,
+                                const NDArray& rhs,
                                 const OpReqType req,
-                                const NDArray &output,
+                                const NDArray& output,
                                 const bool lhs_may_be_dense,
                                 const bool rhs_may_be_dense,
                                 const bool allow_inplace,
                                 const bool scatter) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  const NDArray& rsp = lhs.storage_type() == kRowSparseStorage ? lhs : rhs;
+  const NDArray& rsp         = lhs.storage_type() == kRowSparseStorage ? lhs : rhs;
   const bool is_dense_result = output.storage_type() == kDefaultStorage;
-  const bool lhs_is_dense = lhs.storage_type() == kDefaultStorage;
-  const bool rhs_is_dense = rhs.storage_type() == kDefaultStorage;
+  const bool lhs_is_dense    = lhs.storage_type() == kDefaultStorage;
+  const bool rhs_is_dense    = rhs.storage_type() == kDefaultStorage;
   CHECK(!lhs_is_dense || lhs_may_be_dense) << "rvalue cannot be dense";
   CHECK(!rhs_is_dense || rhs_may_be_dense) << "rvalue cannot be dense";
   CHECK(!lhs_is_dense || !rhs_is_dense);
@@ -81,10 +81,10 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
       // Memory Estimation: This is (roughly) the number of result rows. We may still
       // need to subtract the number of common rows
       bool lhs_in_place = false, rhs_in_place = false;
-      const size_t num_rows_l = lhs_is_dense ? lhs.shape()[0] :
-                                               lhs.aux_shape(rowsparse::kIdx).Size();
-      const size_t num_rows_r = rhs_is_dense ? rhs.shape()[0] :
-                                               rhs.aux_shape(rowsparse::kIdx).Size();
+      const size_t num_rows_l =
+          lhs_is_dense ? lhs.shape()[0] : lhs.aux_shape(rowsparse::kIdx).Size();
+      const size_t num_rows_r =
+          rhs_is_dense ? rhs.shape()[0] : rhs.aux_shape(rowsparse::kIdx).Size();
       if (is_dense_result) {
         output.CheckAndAlloc();
       } else {
@@ -112,31 +112,31 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
       }
 
       // Indices
-      const Tensor<cpu, 1, IType> indices_l = lhs_is_dense ?
-                                              Tensor<cpu, 1, IType>() :
-                                              lhs.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(s);
-      const Tensor<cpu, 1, IType> indices_r = rhs_is_dense ?
-                                              Tensor<cpu, 1, IType>() :
-                                              rhs.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(s);
-      Tensor<cpu, 1, IType> indices_out = is_dense_result ?
-                                          Tensor<cpu, 1, IType>() :
-                                          output.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(s);
+      const Tensor<cpu, 1, IType> indices_l =
+          lhs_is_dense ? Tensor<cpu, 1, IType>()
+                       : lhs.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(s);
+      const Tensor<cpu, 1, IType> indices_r =
+          rhs_is_dense ? Tensor<cpu, 1, IType>()
+                       : rhs.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(s);
+      Tensor<cpu, 1, IType> indices_out =
+          is_dense_result ? Tensor<cpu, 1, IType>()
+                          : output.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(s);
 
       // Data
       // TODO(cjolivier01): Change to get_with_shape() calls
       const Tensor<cpu, 2, DType> data_l = AsRowise2D<DType>(s, lhs.data());
       const Tensor<cpu, 2, DType> data_r = AsRowise2D<DType>(s, rhs.data());
-      Tensor<cpu, 2, DType> out = AsRowise2D<DType>(s, output.data());
+      Tensor<cpu, 2, DType> out          = AsRowise2D<DType>(s, output.data());
 
-      size_t iter_l = 0;
-      size_t iter_r = 0;
-      size_t iter_out = 0;
+      size_t iter_l           = 0;
+      size_t iter_r           = 0;
+      size_t iter_out         = 0;
       int32_t num_common_rows = 0;
 
       if (is_dense_result) {
         if (!num_rows_l && !num_rows_r) {
           const size_t all_rows = static_cast<size_t>(lhs.shape()[0]);
-          iter_out = FillDense<DType, OP>(s, all_rows, all_rows, req, &out, iter_out);
+          iter_out              = FillDense<DType, OP>(s, all_rows, all_rows, req, &out, iter_out);
         }
       }
 
@@ -172,7 +172,7 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
           DCHECK_EQ(lvalue.shape_.Size(), rvalue.shape_.Size());
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, cpu>::Launch(
-              s, lvalue.shape_.Size(), out[iter_out].dptr_, lvalue.dptr_, rvalue.dptr_);
+                s, lvalue.shape_.Size(), out[iter_out].dptr_, lvalue.dptr_, rvalue.dptr_);
           });
           num_common_rows++;
         } else if (idx_l < idx_r) {
@@ -183,7 +183,7 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
           Tensor<cpu, 1, DType> lvalue = !lhs_is_dense ? data_l[iter_l++] : data_l[idx_l];
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             mxnet_op::Kernel<MissingRValueOp<OP, Req>, cpu>::Launch(
-              s, lvalue.shape_.Size(), out[iter_out].dptr_, lvalue.dptr_);
+                s, lvalue.shape_.Size(), out[iter_out].dptr_, lvalue.dptr_);
           });
         } else {
           // Right only
@@ -197,7 +197,7 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
           Tensor<cpu, 1, DType> rvalue = !rhs_is_dense ? data_r[iter_r++] : data_r[idx_r];
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             mxnet_op::Kernel<MissingLValueOp<OP, Req>, cpu>::Launch(
-              s, rvalue.shape_.Size(), out[iter_out].dptr_, rvalue.dptr_);
+                s, rvalue.shape_.Size(), out[iter_out].dptr_, rvalue.dptr_);
           });
         }
         ++iter_out;
@@ -208,12 +208,12 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
           indices_out[iter_out] = indices_l[iter_l];
         } else {
           const IType idx_l = indices_l[iter_l];
-          iter_out = FillDense<DType, OP>(s, lhs.shape()[0], idx_l, req, &out, iter_out);
+          iter_out          = FillDense<DType, OP>(s, lhs.shape()[0], idx_l, req, &out, iter_out);
         }
         Tensor<cpu, 1, DType> lvalue = data_l[iter_l++];
         MXNET_ASSIGN_REQ_SWITCH(req, Req, {
           mxnet_op::Kernel<MissingRValueOp<OP, Req>, cpu>::Launch(
-            s, lvalue.shape_.Size(), out[iter_out++].dptr_, lvalue.dptr_);
+              s, lvalue.shape_.Size(), out[iter_out++].dptr_, lvalue.dptr_);
         });
       }
       while (iter_r < num_rows_r && !rhs_is_dense && !lhs_in_place && !scatter) {
@@ -221,17 +221,17 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
           indices_out[iter_out] = indices_r[iter_r];
         } else {
           const IType idx_r = indices_r[iter_r];
-          iter_out = FillDense<DType, OP>(s, lhs.shape()[0], idx_r, req, &out, iter_out);
+          iter_out          = FillDense<DType, OP>(s, lhs.shape()[0], idx_r, req, &out, iter_out);
         }
         Tensor<cpu, 1, DType> rvalue = data_r[iter_r++];
         MXNET_ASSIGN_REQ_SWITCH(req, Req, {
           mxnet_op::Kernel<MissingLValueOp<OP, Req>, cpu>::Launch(
-            s, rvalue.shape_.Size(), out[iter_out++].dptr_, rvalue.dptr_);
+              s, rvalue.shape_.Size(), out[iter_out++].dptr_, rvalue.dptr_);
         });
       }
       if (is_dense_result) {
         const size_t all_rows = static_cast<size_t>(lhs.shape()[0]);
-        iter_out = FillDense<DType, OP>(s, all_rows, all_rows, req, &out, iter_out);
+        iter_out              = FillDense<DType, OP>(s, all_rows, all_rows, req, &out, iter_out);
       } else {
         if (lhs_in_place) {
           CHECK_LE(iter_out, num_rows_l);
@@ -253,26 +253,26 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<cpu> *s,
 }
 
 /*! \brief CSR -op- CSR binary operator for non-canonical NDArray */
-template<typename OP>
-void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<gpu> *s,
-                                const nnvm::NodeAttrs &attrs,
-                                const OpContext &ctx,
-                                const NDArray &lhs,
-                                const NDArray &rhs,
+template <typename OP>
+void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<gpu>* s,
+                                const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const NDArray& lhs,
+                                const NDArray& rhs,
                                 const OpReqType req,
-                                const NDArray &output) {
+                                const NDArray& output) {
   LOG(FATAL) << "GPU not supported for CsrCsrOp";
 }
 
 /*! \brief CSR -op- CSR binary operator for non-canonical NDArray */
-template<typename OP>
-void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu> *s,
-                                const nnvm::NodeAttrs &attrs,
-                                const OpContext &ctx,
-                                const NDArray &lhs,
-                                const NDArray &rhs,
+template <typename OP>
+void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu>* s,
+                                const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const NDArray& lhs,
+                                const NDArray& rhs,
                                 const OpReqType req,
-                                const NDArray &output) {
+                                const NDArray& output) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace mshadow::expr;
@@ -303,19 +303,18 @@ void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu> *s,
         const size_t alloc_size = nr_cols * sizeof(IType) + 2 * nr_cols * sizeof(DType);
 
         Tensor<cpu, 1, uint8_t> workspace =
-          ctx.requested[ResourceRequestType::kTempSpace].get_space_typed<cpu, 1, uint8_t>(
-            mshadow::Shape1(alloc_size), s);
+            ctx.requested[ResourceRequestType::kTempSpace].get_space_typed<cpu, 1, uint8_t>(
+                mshadow::Shape1(alloc_size), s);
 
         // Allocate temp space and partition into three tensors
-        mshadow::Tensor<cpu, 1, IType> next(reinterpret_cast<IType *>(workspace.dptr_),
+        mshadow::Tensor<cpu, 1, IType> next(reinterpret_cast<IType*>(workspace.dptr_),
                                             Shape1(nr_cols));
-        mshadow::Tensor<cpu, 1, DType> lhs_row(reinterpret_cast<DType *>(
-                                                 workspace.dptr_ + nr_cols * sizeof(IType)),
-                                               Shape1(nr_cols));
+        mshadow::Tensor<cpu, 1, DType> lhs_row(
+            reinterpret_cast<DType*>(workspace.dptr_ + nr_cols * sizeof(IType)), Shape1(nr_cols));
         mshadow::Tensor<cpu, 1, DType> rhs_row;
 
         OpBase::FillDense<IType>(s, next.shape_.Size(), IType(-1), req, next.dptr_);
-        OpBase::FillDense<DType>(s, lhs_row.shape_.Size(), DType(0),  req, lhs_row.dptr_);
+        OpBase::FillDense<DType>(s, lhs_row.shape_.Size(), DType(0), req, lhs_row.dptr_);
 
         if (!same_lhs_rhs) {
           rhs_row = Tensor<cpu, 1, DType>(lhs_row.dptr_ + nr_cols, Shape1(nr_cols));
@@ -334,27 +333,27 @@ void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu> *s,
         const Tensor<cpu, 1, CType> row_ptr_r = rhs.aux_data(csr::kIndPtr).FlatTo1D<cpu, CType>(s);
         Tensor<cpu, 1, CType> row_ptr_out = output.aux_data(csr::kIndPtr).FlatTo1D<cpu, CType>(s);
 
-        Tensor<cpu, 1, DType>   data_l = lhs.data().FlatTo1D<cpu, DType>(s);
-        Tensor<cpu, 1, DType>   data_r = rhs.data().FlatTo1D<cpu, DType>(s);
+        Tensor<cpu, 1, DType> data_l   = lhs.data().FlatTo1D<cpu, DType>(s);
+        Tensor<cpu, 1, DType> data_r   = rhs.data().FlatTo1D<cpu, DType>(s);
         Tensor<cpu, 1, DType> data_out = output.data().FlatTo1D<cpu, DType>(s);
 
-        IType nnz = 0;
+        IType nnz      = 0;
         row_ptr_out[0] = 0;
 
         for (IType i = 0; i < static_cast<IType>(nr_rows); i++) {
-          IType head = -2;
+          IType head   = -2;
           IType length = 0;
 
           // add a row of A to lhs_row
           const IType i_start_l = row_ptr_l[i];
-          const IType i_end_l = row_ptr_l[i + 1];
+          const IType i_end_l   = row_ptr_l[i + 1];
           for (IType jj = i_start_l; jj < i_end_l; jj++) {
             IType col = col_indices_l[jj];
             lhs_row[col] += data_l[jj];
 
             if (next[col] == -1) {
               next[col] = head;
-              head = col;
+              head      = col;
               ++length;
             }
           }
@@ -362,14 +361,14 @@ void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu> *s,
           if (!same_lhs_rhs) {
             // add a row of B to rhs_row
             const IType i_start_r = row_ptr_r[i];
-            const IType i_end_r = row_ptr_r[i + 1];
+            const IType i_end_r   = row_ptr_r[i + 1];
             for (IType jj = i_start_r; jj < i_end_r; jj++) {
               const IType col = col_indices_r[jj];
               rhs_row[col] += data_r[jj];
 
               if (next[col] == -1) {
                 next[col] = head;
-                head = col;
+                head      = col;
                 ++length;
               }
             }
@@ -382,16 +381,17 @@ void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu> *s,
 
             if (result != 0) {
               col_indices_out[nnz] = head;
-              data_out[nnz] = result;
+              data_out[nnz]        = result;
               ++nnz;
             }
 
             const IType temp = head;
-            head = next[head];
+            head             = next[head];
 
-            next[temp] = -1;
+            next[temp]    = -1;
             lhs_row[temp] = 0;
-            if (!same_lhs_rhs) rhs_row[temp] = 0;
+            if (!same_lhs_rhs)
+              rhs_row[temp] = 0;
           }
 
           row_ptr_out[i + 1] = nnz;
@@ -413,16 +413,21 @@ void ElemwiseBinaryOp::CsrCsrOp(mshadow::Stream<cpu> *s,
  * \param num_rows     number of rows of both inputs
  * \param num_cols     number of columns of both inputs
  */
-template<int req, typename OP>
+template <int req, typename OP>
 struct ElemwiseDnsCsrDnsKernel {
-  template<typename DType, typename IType, typename CType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, DType* dns_data,
-                                  const DType* csr_data, const IType* csr_indices,
-                                  const CType* csr_indptr, const nnvm::dim_t num_rows,
+  template <typename DType, typename IType, typename CType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  DType* dns_data,
+                                  const DType* csr_data,
+                                  const IType* csr_indices,
+                                  const CType* csr_indptr,
+                                  const nnvm::dim_t num_rows,
                                   const nnvm::dim_t num_cols) {
     if (i < num_rows) {
-      for (int j = csr_indptr[i]; j < csr_indptr[i+1]; ++j) {
-        KERNEL_ASSIGN(out[i * num_cols + csr_indices[j]], req,
+      for (int j = csr_indptr[i]; j < csr_indptr[i + 1]; ++j) {
+        KERNEL_ASSIGN(out[i * num_cols + csr_indices[j]],
+                      req,
                       OP::Map(dns_data[i * num_cols + csr_indices[j]], csr_data[j]));
       }
     }
@@ -441,18 +446,23 @@ struct ElemwiseDnsCsrDnsKernel {
  * \param num_rows     number of rows of both inputs
  * \param num_cols     number of columns of both inputs
  */
-template<int req, typename OP>
+template <int req, typename OP>
 struct ElemwiseDnsCsrDnsWarpKernel {
-  template<typename DType, typename IType, typename CType>
-  MSHADOW_XINLINE static void Map(int tid, DType* out, DType* dns_data,
-                                  const DType* csr_data, const IType* csr_indices,
-                                  const CType* csr_indptr, const nnvm::dim_t num_rows,
+  template <typename DType, typename IType, typename CType>
+  MSHADOW_XINLINE static void Map(int tid,
+                                  DType* out,
+                                  DType* dns_data,
+                                  const DType* csr_data,
+                                  const IType* csr_indices,
+                                  const CType* csr_indptr,
+                                  const nnvm::dim_t num_rows,
                                   const nnvm::dim_t num_cols) {
     if (tid < WARP_SIZE * num_rows) {
-      const int row_id = tid >> WARP_SIZE_BITS;
+      const int row_id  = tid >> WARP_SIZE_BITS;
       const int warp_id = tid & (WARP_SIZE - 1);
-      for (int j = csr_indptr[row_id] + warp_id; j < csr_indptr[row_id+1]; j += WARP_SIZE) {
-        KERNEL_ASSIGN(out[row_id * num_cols + csr_indices[j]], req,
+      for (int j = csr_indptr[row_id] + warp_id; j < csr_indptr[row_id + 1]; j += WARP_SIZE) {
+        KERNEL_ASSIGN(out[row_id * num_cols + csr_indices[j]],
+                      req,
                       OP::Map(dns_data[row_id * num_cols + csr_indices[j]], csr_data[j]));
       }
     }
@@ -460,14 +470,14 @@ struct ElemwiseDnsCsrDnsWarpKernel {
 };
 
 /*! \brief DNS -op- CSR binary operator for non-canonical NDArray */
-template<typename OP>
-void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<cpu> *s,
-                                   const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const NDArray &dns,
-                                   const NDArray &csr,
+template <typename OP>
+void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<cpu>* s,
+                                   const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const NDArray& dns,
+                                   const NDArray& csr,
                                    const OpReqType req,
-                                   const NDArray &output,
+                                   const NDArray& output,
                                    const bool reverse) {
   using namespace mshadow;
   using namespace mxnet_op;
@@ -475,36 +485,52 @@ void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<cpu> *s,
   CHECK_EQ(csr.storage_type(), kCSRStorage);
   CHECK(req != kAddTo);
   CHECK(req != kNullOp);
-  const bool supported_op = std::is_same<OP, mshadow_op::minus>::value ||
-                            std::is_same<OP, mshadow_op::plus>::value;
+  const bool supported_op =
+      std::is_same<OP, mshadow_op::minus>::value || std::is_same<OP, mshadow_op::plus>::value;
   CHECK(supported_op == true);
   const nnvm::dim_t num_csr_rows = csr.shape()[0];
   const nnvm::dim_t num_csr_cols = csr.shape()[1];
-  TBlob csr_data = csr.data();
-  TBlob csr_indices = csr.aux_data(csr::kIdx);
-  TBlob csr_indptr = csr.aux_data(csr::kIndPtr);
+  TBlob csr_data                 = csr.data();
+  TBlob csr_indices              = csr.aux_data(csr::kIdx);
+  TBlob csr_indptr               = csr.aux_data(csr::kIndPtr);
   MSHADOW_SGL_DBL_TYPE_SWITCH(csr_data.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {
       MSHADOW_IDX_TYPE_SWITCH(csr_indptr.type_flag_, CType, {
         MXNET_ASSIGN_REQ_SWITCH(req, Req, {
           if (reverse && std::is_same<OP, mshadow_op::minus>::value) {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::negation, Req>, cpu>::Launch(
-              s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
-            if (!csr.storage_initialized()) { return; }
+                s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+            if (!csr.storage_initialized()) {
+              return;
+            }
             mxnet_op::Kernel<ElemwiseDnsCsrDnsKernel<Req, mshadow_op::plus>, cpu>::Launch(
-              s, num_csr_rows, output.data().dptr<DType>(),
-              output.data().dptr<DType>(), csr_data.dptr<DType>(), csr_indices.dptr<IType>(),
-              csr_indptr.dptr<CType>(), num_csr_rows, num_csr_cols);
+                s,
+                num_csr_rows,
+                output.data().dptr<DType>(),
+                output.data().dptr<DType>(),
+                csr_data.dptr<DType>(),
+                csr_indices.dptr<IType>(),
+                csr_indptr.dptr<CType>(),
+                num_csr_rows,
+                num_csr_cols);
           } else {
             if (req == kWriteTo) {
               mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, cpu>::Launch(
-                s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+                  s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+            }
+            if (!csr.storage_initialized()) {
+              return;
             }
-            if (!csr.storage_initialized()) { return; }
             mxnet_op::Kernel<ElemwiseDnsCsrDnsKernel<Req, OP>, cpu>::Launch(
-              s, num_csr_rows, output.data().dptr<DType>(),
-              output.data().dptr<DType>(), csr_data.dptr<DType>(), csr_indices.dptr<IType>(),
-              csr_indptr.dptr<CType>(), num_csr_rows, num_csr_cols);
+                s,
+                num_csr_rows,
+                output.data().dptr<DType>(),
+                output.data().dptr<DType>(),
+                csr_data.dptr<DType>(),
+                csr_indices.dptr<IType>(),
+                csr_indptr.dptr<CType>(),
+                num_csr_rows,
+                num_csr_cols);
           }
         });
       });
@@ -524,31 +550,36 @@ void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<cpu> *s,
  * \param num_rows     number of rows of both inputs
  * \param num_cols     number of columns of both inputs
  */
-template<int req, typename OP, bool reverse>
+template <int req, typename OP, bool reverse>
 struct ElemwiseDnsCsrCsrKernel {
-  template<typename DType, typename IType, typename CType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, DType* dns_data,
-                                  const DType* csr_data, const IType* csr_indices,
-                                  const CType* csr_indptr, const nnvm::dim_t num_rows,
+  template <typename DType, typename IType, typename CType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  DType* dns_data,
+                                  const DType* csr_data,
+                                  const IType* csr_indices,
+                                  const CType* csr_indptr,
+                                  const nnvm::dim_t num_rows,
                                   const nnvm::dim_t num_cols) {
     if (i < num_rows) {
-      for (int j = csr_indptr[i]; j < csr_indptr[i+1]; ++j) {
-        KERNEL_ASSIGN(out[j], req, reverse ?
-                                   OP::Map(dns_data[i * num_cols + csr_indices[j]], csr_data[j]) :
-                                   OP::Map(csr_data[j], dns_data[i * num_cols + csr_indices[j]]));
+      for (int j = csr_indptr[i]; j < csr_indptr[i + 1]; ++j) {
+        KERNEL_ASSIGN(out[j],
+                      req,
+                      reverse ? OP::Map(dns_data[i * num_cols + csr_indices[j]], csr_data[j])
+                              : OP::Map(csr_data[j], dns_data[i * num_cols + csr_indices[j]]));
       }
     }
   }
 };
 
 /*! \brief DNS -op- CSR binary operator for non-canonical NDArray */
-template<typename xpu, typename OP>
-void ElemwiseBinaryOp::DnsCsrCsrOp(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const NDArray &dns,
-                                   const NDArray &csr,
+template <typename xpu, typename OP>
+void ElemwiseBinaryOp::DnsCsrCsrOp(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const NDArray& dns,
+                                   const NDArray& csr,
                                    const OpReqType req,
-                                   const NDArray &output,
+                                   const NDArray& output,
                                    const bool reverse) {
   using namespace mshadow;
   using namespace mxnet_op;
@@ -556,38 +587,53 @@ void ElemwiseBinaryOp::DnsCsrCsrOp(const nnvm::NodeAttrs &attrs,
   CHECK_EQ(dns.storage_type(), kDefaultStorage);
   CHECK_EQ(csr.storage_type(), kCSRStorage);
   CHECK_EQ(req, kWriteTo) << "elemwise(dns, csr) = csr only supports kWriteTo";
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   const bool supported_op = std::is_same<OP, mshadow_op::mul>::value;
   CHECK(supported_op == true) << "elemwise(dns, csr) = csr only supports mul";
   const nnvm::dim_t num_csr_rows = csr.shape()[0];
   const nnvm::dim_t num_csr_cols = csr.shape()[1];
-  const nnvm::dim_t nnz = csr.storage_shape()[0];
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  const nnvm::dim_t nnz          = csr.storage_shape()[0];
+  Stream<xpu>* s                 = ctx.get_stream<xpu>();
 
   output.CheckAndAlloc({Shape1(num_csr_rows + 1), Shape1(nnz)});
   if (csr.storage_initialized()) {
-    TBlob csr_data = csr.data();
+    TBlob csr_data    = csr.data();
     TBlob csr_indices = csr.aux_data(kIdx);
-    TBlob csr_indptr = csr.aux_data(kIndPtr);
+    TBlob csr_indptr  = csr.aux_data(kIndPtr);
     MSHADOW_SGL_DBL_TYPE_SWITCH(csr_data.type_flag_, DType, {
       MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {
         MSHADOW_IDX_TYPE_SWITCH(csr_indptr.type_flag_, CType, {
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             if (reverse) {
               Kernel<ElemwiseDnsCsrCsrKernel<Req, OP, true>, xpu>::Launch(
-                s, num_csr_rows, output.data().dptr<DType>(), dns.data().dptr<DType>(),
-                csr_data.dptr<DType>(), csr_indices.dptr<IType>(), csr_indptr.dptr<CType>(),
-                num_csr_rows, num_csr_cols);
+                  s,
+                  num_csr_rows,
+                  output.data().dptr<DType>(),
+                  dns.data().dptr<DType>(),
+                  csr_data.dptr<DType>(),
+                  csr_indices.dptr<IType>(),
+                  csr_indptr.dptr<CType>(),
+                  num_csr_rows,
+                  num_csr_cols);
             } else {
               Kernel<ElemwiseDnsCsrCsrKernel<Req, OP, false>, xpu>::Launch(
-                s, num_csr_rows, output.data().dptr<DType>(), dns.data().dptr<DType>(),
-                csr_data.dptr<DType>(), csr_indices.dptr<IType>(), csr_indptr.dptr<CType>(),
-                num_csr_rows, num_csr_cols);
+                  s,
+                  num_csr_rows,
+                  output.data().dptr<DType>(),
+                  dns.data().dptr<DType>(),
+                  csr_data.dptr<DType>(),
+                  csr_indices.dptr<IType>(),
+                  csr_indptr.dptr<CType>(),
+                  num_csr_rows,
+                  num_csr_cols);
             }
             Copy(output.aux_data(kIdx).FlatTo1D<xpu, IType>(),
-                 csr.aux_data(kIdx).FlatTo1D<xpu, IType>(), s);
+                 csr.aux_data(kIdx).FlatTo1D<xpu, IType>(),
+                 s);
             Copy(output.aux_data(kIndPtr).FlatTo1D<xpu, CType>(),
-                 csr.aux_data(kIndPtr).FlatTo1D<xpu, CType>(), s);
+                 csr.aux_data(kIndPtr).FlatTo1D<xpu, CType>(),
+                 s);
           });
         });
       });
@@ -609,33 +655,38 @@ void ElemwiseBinaryOp::DnsCsrCsrOp(const nnvm::NodeAttrs &attrs,
  * \param nz_rows      number of non-zero rows of rsp tensor
  * \param num_cols     number of columns of both inputs
  */
-template<int req, typename OP>
+template <int req, typename OP>
 struct ElemwiseDnsRspDnsKernel {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, DType* dns_data,
-                                  const DType* rsp_data, const IType* rsp_indices,
-                                  const nnvm::dim_t num_rows, const nnvm::dim_t nz_rows,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out,
+                                  DType* dns_data,
+                                  const DType* rsp_data,
+                                  const IType* rsp_indices,
+                                  const nnvm::dim_t num_rows,
+                                  const nnvm::dim_t nz_rows,
                                   const nnvm::dim_t num_cols) {
     if (i < nz_rows * num_cols) {
       const nnvm::dim_t rsp_idx = i / num_cols;
       const nnvm::dim_t dns_row = rsp_indices[rsp_idx];
-      const nnvm::dim_t col = i % num_cols;
-      KERNEL_ASSIGN(out[dns_row * num_cols + col], req,
-                    OP::Map(dns_data[dns_row * num_cols + col],
-                            rsp_data[rsp_idx * num_cols + col]));
+      const nnvm::dim_t col     = i % num_cols;
+      KERNEL_ASSIGN(
+          out[dns_row * num_cols + col],
+          req,
+          OP::Map(dns_data[dns_row * num_cols + col], rsp_data[rsp_idx * num_cols + col]));
     }
   }
 };
 
 /*! \brief DNS -op- RSP binary operator for non-canonical NDArray */
-template<typename xpu, typename OP>
-void ElemwiseBinaryOp::DnsRspDnsOp(mshadow::Stream<xpu> *s,
-                                   const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const NDArray &dns,
-                                   const NDArray &rsp,
+template <typename xpu, typename OP>
+void ElemwiseBinaryOp::DnsRspDnsOp(mshadow::Stream<xpu>* s,
+                                   const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const NDArray& dns,
+                                   const NDArray& rsp,
                                    const OpReqType req,
-                                   const NDArray &output,
+                                   const NDArray& output,
                                    const bool reverse) {
   using namespace mshadow;
   using namespace mxnet_op;
@@ -643,39 +694,52 @@ void ElemwiseBinaryOp::DnsRspDnsOp(mshadow::Stream<xpu> *s,
   CHECK_EQ(rsp.storage_type(), kRowSparseStorage);
   CHECK_EQ(output.data().Size(), dns.data().Size());
   CHECK(req != kAddTo);
-  if (req == kNullOp) return;
-  const bool supported_op = std::is_same<OP, mshadow_op::minus>::value ||
-                            std::is_same<OP, mshadow_op::plus>::value;
-  CHECK(supported_op == true) <<
-    "Only plus and minus supported now for elemwise operation between default and rsp matrices";
+  if (req == kNullOp)
+    return;
+  const bool supported_op =
+      std::is_same<OP, mshadow_op::minus>::value || std::is_same<OP, mshadow_op::plus>::value;
+  CHECK(supported_op == true) << "Only plus and minus supported now for elemwise operation between "
+                                 "default and rsp matrices";
   const nnvm::dim_t num_rows = dns.shape()[0];
   const nnvm::dim_t num_cols = dns.data().Size() / num_rows;
-  const nnvm::dim_t nz_rows = rsp.aux_shape(rowsparse::kIdx).Size();
-  TBlob rsp_data = rsp.data();
-  TBlob rsp_indices = rsp.aux_data(rowsparse::kIdx);
+  const nnvm::dim_t nz_rows  = rsp.aux_shape(rowsparse::kIdx).Size();
+  TBlob rsp_data             = rsp.data();
+  TBlob rsp_indices          = rsp.aux_data(rowsparse::kIdx);
 
   MSHADOW_TYPE_SWITCH(rsp_data.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(rsp_indices.type_flag_, IType, {
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         if (reverse && std::is_same<OP, mshadow_op::minus>::value) {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::negation, Req>, xpu>::Launch(
-            s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+              s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
           if (rsp.storage_initialized()) {
             mxnet_op::Kernel<ElemwiseDnsRspDnsKernel<Req, mshadow_op::plus>, xpu>::Launch(
-              s, nz_rows * num_cols, output.data().dptr<DType>(),
-              output.data().dptr<DType>(), rsp_data.dptr<DType>(), rsp_indices.dptr<IType>(),
-              num_rows, nz_rows, num_cols);
+                s,
+                nz_rows * num_cols,
+                output.data().dptr<DType>(),
+                output.data().dptr<DType>(),
+                rsp_data.dptr<DType>(),
+                rsp_indices.dptr<IType>(),
+                num_rows,
+                nz_rows,
+                num_cols);
           }
         } else {
           if (req == kWriteTo) {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
-              s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+                s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
           }
           if (rsp.storage_initialized()) {
             mxnet_op::Kernel<ElemwiseDnsRspDnsKernel<Req, OP>, xpu>::Launch(
-              s, nz_rows * num_cols, output.data().dptr<DType>(),
-              output.data().dptr<DType>(), rsp_data.dptr<DType>(), rsp_indices.dptr<IType>(),
-              num_rows, nz_rows, num_cols);
+                s,
+                nz_rows * num_cols,
+                output.data().dptr<DType>(),
+                output.data().dptr<DType>(),
+                rsp_data.dptr<DType>(),
+                rsp_indices.dptr<IType>(),
+                num_rows,
+                nz_rows,
+                num_cols);
           }
         }
       });
diff --git a/src/operator/tensor/elemwise_binary_op.cc b/src/operator/tensor/elemwise_binary_op.cc
index c4fb5e1f5a39..b3a227dfeda2 100644
--- a/src/operator/tensor/elemwise_binary_op.cc
+++ b/src/operator/tensor/elemwise_binary_op.cc
@@ -36,21 +36,21 @@ namespace op {
 bool ElemwiseBinaryOp::SparseSparseWithDenseResult(const nnvm::NodeAttrs& attrs,
                                                    const int dev_mask,
                                                    DispatchMode* dispatch_mode,
-                                                   std::vector<int> *in_attrs,
-                                                   std::vector<int> *out_attrs) {
+                                                   std::vector<int>* in_attrs,
+                                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U) << " in operator " << attrs.name;
   CHECK_EQ(out_attrs->size(), 1U) << " in operator " << attrs.name;
-  const auto& lhs_stype = in_attrs->at(0);
-  const auto& rhs_stype = in_attrs->at(1);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const auto& lhs_stype  = in_attrs->at(0);
+  const auto& rhs_stype  = in_attrs->at(1);
+  auto& out_stype        = out_attrs->at(0);
+  bool dispatched        = false;
   const bool invalid_ctx = dev_mask != mshadow::cpu::kDevMask;
-  const auto dispatch_ex = invalid_ctx ?
-                           DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
+  const auto dispatch_ex =
+      invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
   if (!dispatched && (lhs_stype == kDefaultStorage || rhs_stype == kDefaultStorage)) {
     // dns, dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && lhs_stype == kRowSparseStorage && rhs_stype == kRowSparseStorage) {
     // rsp, rsp -> dns
@@ -65,24 +65,23 @@ bool ElemwiseBinaryOp::SparseSparseWithDenseResult(const nnvm::NodeAttrs& attrs,
 bool ElemwiseBinaryOp::BackwardUseInStorageType(const nnvm::NodeAttrs& attrs,
                                                 const int dev_mask,
                                                 DispatchMode* dispatch_mode,
-                                                std::vector<int> *in_attrs,
-                                                std::vector<int> *out_attrs) {
+                                                std::vector<int>* in_attrs,
+                                                std::vector<int>* out_attrs) {
   using namespace common;
   CHECK_EQ(in_attrs->size(), 3U);
   CHECK_EQ(out_attrs->size(), 2U);
-  bool dispatched = false;
+  bool dispatched        = false;
   const bool invalid_ctx = dev_mask != mshadow::cpu::kDevMask;
-  const auto dispatch_ex = invalid_ctx ? DispatchMode::kFComputeFallback :
-                           DispatchMode::kFComputeEx;
+  const auto dispatch_ex =
+      invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
   if (!dispatched && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched) {
-    if (common::ContainsOnlyStorage(*in_attrs, kRowSparseStorage)
-      && common::ContainsOnlyStorage(*out_attrs, kRowSparseStorage)) {
-      dispatched = storage_type_assign(out_attrs, kRowSparseStorage,
-                                       dispatch_mode, dispatch_ex);
+    if (common::ContainsOnlyStorage(*in_attrs, kRowSparseStorage) &&
+        common::ContainsOnlyStorage(*out_attrs, kRowSparseStorage)) {
+      dispatched = storage_type_assign(out_attrs, kRowSparseStorage, dispatch_mode, dispatch_ex);
     }
   }
   if (!dispatched) {
@@ -94,8 +93,8 @@ bool ElemwiseBinaryOp::BackwardUseInStorageType(const nnvm::NodeAttrs& attrs,
 #if MXNET_USE_CUDA
 
 struct binary_kernel_params {
-  const void *inputs[3];
-  void *outputs[2];
+  const void* inputs[3];
+  void* outputs[2];
 };
 
 const char binary_kernel_fwd[] = R"code(
@@ -155,32 +154,40 @@ __global__ void binary_kernel(const binary_kernel_params params,
 )code";
 
 void ElemwiseBinaryRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                                          const OpContext& ctx,
+                                          const std::vector<TBlob>& inputs,
+                                          const std::vector<OpReqType>& req,
+                                          const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
   std::string code = "const OpReqType req = ";
   code += util::to_string(req[0]);
-  code += ";\n"
-          "#define OP op::";
+  code +=
+      ";\n"
+      "#define OP op::";
   code += OP;
   code += "\n";
   const int nvec = outputs[0].type_flag_ == mshadow::kFloat64 ? 2 : 4;
 
-  const index_t size = outputs[0].Size();
-  binary_kernel_params params = { {inputs[0].dptr_, inputs[1].dptr_, nullptr},
-                                  {outputs[0].dptr_, nullptr} };
-
-  VectorizedKernelRTCLauncher(code, "binary_kernel",
-                              binary_kernel_fwd, nvec,
-                              size, 1, s, params,
-                              inputs, outputs,
+  const index_t size          = outputs[0].Size();
+  binary_kernel_params params = {{inputs[0].dptr_, inputs[1].dptr_, nullptr},
+                                 {outputs[0].dptr_, nullptr}};
+
+  VectorizedKernelRTCLauncher(code,
+                              "binary_kernel",
+                              binary_kernel_fwd,
+                              nvec,
+                              size,
+                              1,
+                              s,
+                              params,
+                              inputs,
+                              outputs,
                               ctx.run_ctx.get_ctx().dev_id);
 }
 
@@ -258,26 +265,24 @@ __global__ void binary_kernel_bwd(const binary_kernel_params params,
 )code";
 
 void ElemwiseBinaryRTCBwdUseNone::operator()(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                                             const OpContext& ctx,
+                                             const std::vector<TBlob>& inputs,
+                                             const std::vector<OpReqType>& req,
+                                             const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (req[0] == kNullOp && req[1] == kNullOp) return;
+  if (req[0] == kNullOp && req[1] == kNullOp)
+    return;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 2U);
 
-  bool write_left_output = req[0] != kNullOp &&
-                           (req[0] != kWriteInplace ||
-                           (req[0] == kWriteInplace && LOP != "identity"));
+  bool write_left_output = req[0] != kNullOp && (req[0] != kWriteInplace ||
+                                                 (req[0] == kWriteInplace && LOP != "identity"));
 
-  bool write_right_output = req[1] != kNullOp &&
-                            (req[1] != kWriteInplace ||
-                            (req[1] == kWriteInplace && LOP != "identity"));
+  bool write_right_output = req[1] != kNullOp && (req[1] != kWriteInplace ||
+                                                  (req[1] == kWriteInplace && LOP != "identity"));
 
-  const std::string code = std::string("const OpReqType lreq = ") +
-                           util::to_string(req[0]) +
+  const std::string code = std::string("const OpReqType lreq = ") + util::to_string(req[0]) +
                            ";\n"
                            "const OpReqType rreq = " +
                            util::to_string(req[1]) +
@@ -292,18 +297,23 @@ void ElemwiseBinaryRTCBwdUseNone::operator()(const nnvm::NodeAttrs& attrs,
                            std::to_string(write_left_output) +
                            ";\n"
                            "const bool write_right_output = " +
-                           std::to_string(write_right_output) +
-                           ";\n";
+                           std::to_string(write_right_output) + ";\n";
   const int nvec = outputs[0].type_flag_ == mshadow::kFloat64 ? 2 : 4;
 
-  const index_t size = outputs[0].Size();
-  binary_kernel_params params = { {inputs[0].dptr_, nullptr, nullptr},
-                                  {outputs[0].dptr_, outputs[1].dptr_} };
-
-  VectorizedKernelRTCLauncher(code, "binary_kernel_bwd",
-                              binary_kernel_bwd_use_none, nvec,
-                              size, 1, s, params,
-                              inputs, outputs,
+  const index_t size          = outputs[0].Size();
+  binary_kernel_params params = {{inputs[0].dptr_, nullptr, nullptr},
+                                 {outputs[0].dptr_, outputs[1].dptr_}};
+
+  VectorizedKernelRTCLauncher(code,
+                              "binary_kernel_bwd",
+                              binary_kernel_bwd_use_none,
+                              nvec,
+                              size,
+                              1,
+                              s,
+                              params,
+                              inputs,
+                              outputs,
                               ctx.run_ctx.get_ctx().dev_id);
 }
 
@@ -391,18 +401,18 @@ __global__ void binary_kernel_bwd(const binary_kernel_params params,
 )code";
 
 void ElemwiseBinaryRTCBwdUseIn::operator()(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                                           const OpContext& ctx,
+                                           const std::vector<TBlob>& inputs,
+                                           const std::vector<OpReqType>& req,
+                                           const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (req[0] == kNullOp && req[1] == kNullOp) return;
+  if (req[0] == kNullOp && req[1] == kNullOp)
+    return;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 2U);
 
-  const std::string code = std::string("const OpReqType lreq = ") +
-                           util::to_string(req[0]) +
+  const std::string code = std::string("const OpReqType lreq = ") + util::to_string(req[0]) +
                            ";\n"
                            "const OpReqType rreq = " +
                            util::to_string(req[1]) +
@@ -411,26 +421,28 @@ void ElemwiseBinaryRTCBwdUseIn::operator()(const nnvm::NodeAttrs& attrs,
                            ROP +
                            "\n"
                            "#define LOP op::" +
-                           LOP +
-                           "\n";
+                           LOP + "\n";
   // Using 64 bit loads to reduce register pressure
   size_t output_type_size = common::mshadow_type_info(outputs[0].type_flag_).size;
-  const int nvec = output_type_size <= sizeof(uint64_t)
-                     ? (sizeof(uint64_t) / output_type_size)
-                     : 1;
-
-  const index_t size = outputs[0].Size();
-  binary_kernel_params params = { {inputs[0].dptr_, inputs[1].dptr_, inputs[2].dptr_},
-                                  {outputs[0].dptr_, outputs[1].dptr_} };
-
-  VectorizedKernelRTCLauncher(code, "binary_kernel_bwd",
-                              binary_kernel_bwd_use_in, nvec,
-                              size, 1, s, params,
-                              inputs, outputs,
+  const int nvec = output_type_size <= sizeof(uint64_t) ? (sizeof(uint64_t) / output_type_size) : 1;
+
+  const index_t size          = outputs[0].Size();
+  binary_kernel_params params = {{inputs[0].dptr_, inputs[1].dptr_, inputs[2].dptr_},
+                                 {outputs[0].dptr_, outputs[1].dptr_}};
+
+  VectorizedKernelRTCLauncher(code,
+                              "binary_kernel_bwd",
+                              binary_kernel_bwd_use_in,
+                              nvec,
+                              size,
+                              1,
+                              s,
+                              params,
+                              inputs,
+                              outputs,
                               ctx.run_ctx.get_ctx().dev_id);
 }
 
-
 #endif  // MXNET_USE_CUDA
 
 }  // namespace op
diff --git a/src/operator/tensor/elemwise_binary_op.h b/src/operator/tensor/elemwise_binary_op.h
index 69813f1f6dc4..f48d48c0e946 100644
--- a/src/operator/tensor/elemwise_binary_op.h
+++ b/src/operator/tensor/elemwise_binary_op.h
@@ -47,21 +47,21 @@ namespace op {
 class ElemwiseBinaryOp : public OpBase {
  public:
   /*! \brief For sparse, assume missing rvalue is 0 */
-  template<typename OP, int Req>
+  template <typename OP, int Req>
   struct MissingRValueOp {
     typedef OP Operation;
-    template<typename DType>
-    MSHADOW_XINLINE static void Map(int i, DType *out, const DType *lhs) {
+    template <typename DType>
+    MSHADOW_XINLINE static void Map(int i, DType* out, const DType* lhs) {
       KERNEL_ASSIGN(out[i], Req, OP::Map(lhs[i], DType(0)));
     }
   };
 
   /*! \brief For sparse, assume missing lvalue is 0 */
-  template<typename OP, int Req>
+  template <typename OP, int Req>
   struct MissingLValueOp {
     typedef OP Operation;
-    template<typename DType>
-    MSHADOW_XINLINE static void Map(int i, DType *out, const DType *rhs) {
+    template <typename DType>
+    MSHADOW_XINLINE static void Map(int i, DType* out, const DType* rhs) {
       KERNEL_ASSIGN(out[i], Req, OP::Map(DType(0), rhs[i]));
     }
   };
@@ -70,25 +70,23 @@ class ElemwiseBinaryOp : public OpBase {
   /*!
    * \brief CSR operation requires temp space
    */
-  enum ResourceRequestType {
-    kTempSpace
-  };
+  enum ResourceRequestType { kTempSpace };
 
   /*!
    * \brief Fill contiguous dense output rows with value computed from 0 lhs and 0 rhs input
    *        CPU-Only version
    */
-  template<typename DType, typename OP, typename xpu>
-  static inline size_t FillDense(mshadow::Stream<xpu> *s,
+  template <typename DType, typename OP, typename xpu>
+  static inline size_t FillDense(mshadow::Stream<xpu>* s,
                                  const size_t idx_l,
                                  const size_t idx_r,
                                  const OpReqType req,
-                                 mshadow::Tensor<xpu, 2, DType> *out,
+                                 mshadow::Tensor<xpu, 2, DType>* out,
                                  const size_t iter_out) {
     const int index_out_min = static_cast<int>(std::min(idx_l, idx_r));
     if (static_cast<size_t>(index_out_min) > iter_out) {
       const DType zero_input_val = OP::Map(DType(0), DType(0));
-      #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
       for (int i = static_cast<int>(iter_out); i < index_out_min; ++i) {
         Fill<false>(s, (*out)[i], req, zero_input_val);
       }
@@ -107,21 +105,21 @@ class ElemwiseBinaryOp : public OpBase {
   }
 
  private:
-  template<typename LOP, typename ROP>
-  static void BackwardUseNone_(const nnvm::NodeAttrs &attrs,
+  template <typename LOP, typename ROP>
+  static void BackwardUseNone_(const nnvm::NodeAttrs& attrs,
                                mshadow::Stream<cpu>* s,
-                               const std::vector<TBlob> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<TBlob> &outputs) {
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       using namespace mxnet_op;
-      const size_t size = static_cast<size_t>((outputs[0].Size() + DataType<DType>::kLanes - 1)
-                                        / DataType<DType>::kLanes);
-      const DType *ograd_dptr = inputs[0].dptr<DType>();
+      const size_t size = static_cast<size_t>((outputs[0].Size() + DataType<DType>::kLanes - 1) /
+                                              DataType<DType>::kLanes);
+      const DType* ograd_dptr = inputs[0].dptr<DType>();
       if (std::is_same<LOP, mshadow_op::identity>::value && req[0] == kWriteInplace) {
         CHECK_EQ(ograd_dptr, outputs[0].dptr<DType>());
       } else if (req[0] != kNullOp) {
-        DType *lgrad_dptr = outputs[0].dptr<DType>();
+        DType* lgrad_dptr = outputs[0].dptr<DType>();
         MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
           Kernel<mxnet_op::op_with_req<LOP, Req>, cpu>::Launch(s, size, lgrad_dptr, ograd_dptr);
         });
@@ -129,7 +127,7 @@ class ElemwiseBinaryOp : public OpBase {
       if (std::is_same<ROP, mshadow_op::identity>::value && req[1] == kWriteInplace) {
         CHECK_EQ(ograd_dptr, outputs[1].dptr<DType>());
       } else if (req[1] != kNullOp) {
-        DType *rgrad_dptr = outputs[1].dptr<DType>();
+        DType* rgrad_dptr = outputs[1].dptr<DType>();
         MXNET_ASSIGN_REQ_SWITCH(req[1], Req, {
           Kernel<mxnet_op::op_with_req<ROP, Req>, cpu>::Launch(s, size, rgrad_dptr, ograd_dptr);
         });
@@ -137,167 +135,160 @@ class ElemwiseBinaryOp : public OpBase {
     });
   }
 
-  template<typename LOP, typename ROP>
-  static void BackwardUseIn_(const nnvm::NodeAttrs &attrs,
+  template <typename LOP, typename ROP>
+  static void BackwardUseIn_(const nnvm::NodeAttrs& attrs,
                              mshadow::Stream<cpu>* s,
-                             const std::vector<TBlob> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<TBlob> &outputs) {
+                             const std::vector<TBlob>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<TBlob>& outputs) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       DCHECK_EQ(outputs.size(), 2U);
       DCHECK_EQ(inputs.size(), 3U);
-      const DType *ograd_dptr = inputs[0].dptr<DType>();
-      const DType *lhs_dptr = inputs[1].dptr<DType>();
-      const DType *rhs_dptr = inputs[2].dptr<DType>();
+      const DType* ograd_dptr = inputs[0].dptr<DType>();
+      const DType* lhs_dptr   = inputs[1].dptr<DType>();
+      const DType* rhs_dptr   = inputs[2].dptr<DType>();
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        const size_t size = static_cast<size_t>(
-          (outputs[0].Size() + mxnet_op::DataType<DType>::kLanes - 1)
-          / mxnet_op::DataType<DType>::kLanes);
-        DType * lgrad_dptr = outputs[0].dptr<DType>();
-        mxnet_op::Kernel<
-          mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<LOP>, Req>, cpu>::Launch(
-            s, size, lgrad_dptr, ograd_dptr, lhs_dptr, rhs_dptr);
+        const size_t size =
+            static_cast<size_t>((outputs[0].Size() + mxnet_op::DataType<DType>::kLanes - 1) /
+                                mxnet_op::DataType<DType>::kLanes);
+        DType* lgrad_dptr = outputs[0].dptr<DType>();
+        mxnet_op::Kernel<mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<LOP>, Req>,
+                         cpu>::Launch(s, size, lgrad_dptr, ograd_dptr, lhs_dptr, rhs_dptr);
       });
       MXNET_ASSIGN_REQ_SWITCH(req[1], Req, {
-        const size_t size = static_cast<size_t>(
-          (outputs[1].Size() + mxnet_op::DataType<DType>::kLanes - 1)
-          / mxnet_op::DataType<DType>::kLanes);
-        DType * rgrad_dptr = outputs[1].dptr<DType>();
-        mxnet_op::Kernel<
-          mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<ROP>, Req>, cpu>::Launch(
-            s, size, rgrad_dptr, ograd_dptr, lhs_dptr, rhs_dptr);
+        const size_t size =
+            static_cast<size_t>((outputs[1].Size() + mxnet_op::DataType<DType>::kLanes - 1) /
+                                mxnet_op::DataType<DType>::kLanes);
+        DType* rgrad_dptr = outputs[1].dptr<DType>();
+        mxnet_op::Kernel<mxnet_op::op_with_req<mxnet_op::backward_grad_tuned<ROP>, Req>,
+                         cpu>::Launch(s, size, rgrad_dptr, ograd_dptr, lhs_dptr, rhs_dptr);
       });
     });
   }
 
-  template<
-    typename xpu,
-    typename LOP,
-    typename ROP,
-    bool in0_ok_dense = false,
-    bool in1_ok_dense = false,
-    bool in2_ok_dense = false,
-    typename BackupCompute>
-  static inline void RspRspOpBackward(const nnvm::NodeAttrs &attrs,
-                                      const OpContext &ctx,
-                                      const std::vector<NDArray> &inputs,
-                                      const std::vector<OpReqType> &req,
-                                      const std::vector<NDArray> &outputs,
+  template <typename xpu,
+            typename LOP,
+            typename ROP,
+            bool in0_ok_dense = false,
+            bool in1_ok_dense = false,
+            bool in2_ok_dense = false,
+            typename BackupCompute>
+  static inline void RspRspOpBackward(const nnvm::NodeAttrs& attrs,
+                                      const OpContext& ctx,
+                                      const std::vector<NDArray>& inputs,
+                                      const std::vector<OpReqType>& req,
+                                      const std::vector<NDArray>& outputs,
                                       BackupCompute backup_compute) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     // lhs grad
     if (req[0] != kNullOp) {
       // RspRspOp can handle dense outputs so long as OP(0, 0) == 0
       RspRspOp<LOP>(
-          s, attrs, ctx, inputs[1], inputs[2], req[0], outputs[0],
-          false, false, false, false);
+          s, attrs, ctx, inputs[1], inputs[2], req[0], outputs[0], false, false, false, false);
       // lhs in-place
       RspRspOp<op::mshadow_op::mul>(
-          s, attrs, ctx, outputs[0], inputs[0], req[0], outputs[0],
-          false, false, true, false);
+          s, attrs, ctx, outputs[0], inputs[0], req[0], outputs[0], false, false, true, false);
     }
     // rhs grad
     if (req[1] != kNullOp) {
       RspRspOp<ROP>(
-        s, attrs, ctx, inputs[1], inputs[2], req[1], outputs[1],
-        false, false, false, false);
+          s, attrs, ctx, inputs[1], inputs[2], req[1], outputs[1], false, false, false, false);
       // rhs in-place
       RspRspOp<op::mshadow_op::mul>(
-        s, attrs, ctx, inputs[0], outputs[1], req[1], outputs[1],
-        false, false, true, false);
+          s, attrs, ctx, inputs[0], outputs[1], req[1], outputs[1], false, false, true, false);
     }
   }
 
  public:
   /*! \brief Binary op handling for lhr/rhs: RspDns, RspRsp, DnsRsp, or RspRsp->Dns result */
-  template<typename OP>
-  static void RspRspOp(mshadow::Stream<cpu> *s,
-                       const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const NDArray &lhs,
-                       const NDArray &rhs,
+  template <typename OP>
+  static void RspRspOp(mshadow::Stream<cpu>* s,
+                       const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const NDArray& lhs,
+                       const NDArray& rhs,
                        OpReqType req,
-                       const NDArray &output,
+                       const NDArray& output,
                        bool lhs_may_be_dense,
                        bool rhs_may_be_dense,
                        bool allow_inplace,
                        bool scatter);
 
   /*! \brief Binary op handling for lhr/rhs: RspDns, RspRsp, DnsRsp, or RspRsp->Dns result */
-  template<typename OP>
-  static void RspRspOp(mshadow::Stream<gpu> *s,
-                       const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const NDArray &lhs,
-                       const NDArray &rhs,
+  template <typename OP>
+  static void RspRspOp(mshadow::Stream<gpu>* s,
+                       const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const NDArray& lhs,
+                       const NDArray& rhs,
                        OpReqType req,
-                       const NDArray &output,
+                       const NDArray& output,
                        bool lhs_may_be_dense,
                        bool rhs_may_be_dense,
                        bool allow_inplace,
                        bool scatter);
 
   /*! \brief CSR -op- CSR binary operator for non-canonical NDArray */
-  template<typename OP>
-  static void CsrCsrOp(mshadow::Stream<cpu> *s,
-                       const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const NDArray &lhs,
-                       const NDArray &rhs,
+  template <typename OP>
+  static void CsrCsrOp(mshadow::Stream<cpu>* s,
+                       const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const NDArray& lhs,
+                       const NDArray& rhs,
                        OpReqType req,
-                       const NDArray &output);
+                       const NDArray& output);
 
   /*! \brief CSR -op- CSR binary operator for non-canonical NDArray */
-  template<typename OP>
-  static void CsrCsrOp(mshadow::Stream<gpu> *s,
-                       const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const NDArray &lhs,
-                       const NDArray &rhs,
+  template <typename OP>
+  static void CsrCsrOp(mshadow::Stream<gpu>* s,
+                       const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const NDArray& lhs,
+                       const NDArray& rhs,
                        OpReqType req,
-                       const NDArray &output);
+                       const NDArray& output);
 
   /*! \brief DNS -op- CSR binary operator for non-canonical NDArray */
-  template<typename OP>
-  static void DnsCsrDnsOp(mshadow::Stream<cpu> *s,
-                          const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const NDArray &lhs,
-                          const NDArray &rhs,
+  template <typename OP>
+  static void DnsCsrDnsOp(mshadow::Stream<cpu>* s,
+                          const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const NDArray& lhs,
+                          const NDArray& rhs,
                           OpReqType req,
-                          const NDArray &output,
+                          const NDArray& output,
                           const bool reverse);
 
   /*! \brief DNS -op- CSR binary operator for non-canonical NDArray */
-  template<typename OP>
-  static void DnsCsrDnsOp(mshadow::Stream<gpu> *s,
-                          const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const NDArray &lhs,
-                          const NDArray &rhs,
+  template <typename OP>
+  static void DnsCsrDnsOp(mshadow::Stream<gpu>* s,
+                          const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const NDArray& lhs,
+                          const NDArray& rhs,
                           OpReqType req,
-                          const NDArray &output,
+                          const NDArray& output,
                           const bool reverse);
 
   /*! \brief DNS -op- CSR binary operator for non-canonical NDArray */
-  template<typename xpu, typename OP>
-  static void DnsCsrCsrOp(const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const NDArray &lhs,
-                          const NDArray &rhs,
+  template <typename xpu, typename OP>
+  static void DnsCsrCsrOp(const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const NDArray& lhs,
+                          const NDArray& rhs,
                           OpReqType req,
-                          const NDArray &output,
+                          const NDArray& output,
                           const bool reverse);
 
   /*! \brief DNS -op- RSP binary operator for non-canonical NDArray */
-  template<typename xpu, typename OP>
-  static void DnsRspDnsOp(mshadow::Stream<xpu> *s,
-                          const nnvm::NodeAttrs &attrs,
-                          const OpContext &ctx,
-                          const NDArray &lhs,
-                          const NDArray &rhs,
+  template <typename xpu, typename OP>
+  static void DnsRspDnsOp(mshadow::Stream<xpu>* s,
+                          const nnvm::NodeAttrs& attrs,
+                          const OpContext& ctx,
+                          const NDArray& lhs,
+                          const NDArray& rhs,
                           OpReqType req,
-                          const NDArray &output,
+                          const NDArray& output,
                           const bool reverse);
 
  public:
@@ -313,8 +304,8 @@ class ElemwiseBinaryOp : public OpBase {
   static bool SparseSparseWithDenseResult(const nnvm::NodeAttrs& attrs,
                                           int dev_mask,
                                           DispatchMode* dispatch_mode,
-                                          std::vector<int> *in_attrs,
-                                          std::vector<int> *out_attrs);
+                                          std::vector<int>* in_attrs,
+                                          std::vector<int>* out_attrs);
 
   /*!
    * \brief Allow one of the binary inputs to be dense and still produce a sparse output.
@@ -330,48 +321,43 @@ class ElemwiseBinaryOp : public OpBase {
   static bool PreferSparseStorageType(const nnvm::NodeAttrs& attrs,
                                       int dev_mask,
                                       DispatchMode* dispatch_mode,
-                                      std::vector<int> *in_attrs,
-                                      std::vector<int> *out_attrs) {
+                                      std::vector<int>* in_attrs,
+                                      std::vector<int>* out_attrs) {
     using namespace common;
     CHECK_EQ(in_attrs->size(), 2U) << " in operator " << attrs.name;
     CHECK_EQ(out_attrs->size(), 1U) << " in operator " << attrs.name;
-    const auto& lhs_stype = in_attrs->at(0);
-    const auto& rhs_stype = in_attrs->at(1);
-    auto& out_stype = out_attrs->at(0);
-    bool dispatched = false;
+    const auto& lhs_stype  = in_attrs->at(0);
+    const auto& rhs_stype  = in_attrs->at(1);
+    auto& out_stype        = out_attrs->at(0);
+    bool dispatched        = false;
     const bool invalid_ctx = dev_mask != mshadow::cpu::kDevMask;
-    const auto dispatch_ex = invalid_ctx ? DispatchMode::kFComputeFallback :
-                             DispatchMode::kFComputeEx;
+    const auto dispatch_ex =
+        invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
     if (!dispatched && ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
       // dns, dns -> dns
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFCompute);
+      dispatched =
+          storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
     }
     if (!dispatched && ContainsOnlyStorage(*in_attrs, kRowSparseStorage)) {
-        // rsp, rsp -> rsp
-        dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                         dispatch_mode, dispatch_ex);
+      // rsp, rsp -> rsp
+      dispatched = storage_type_assign(&out_stype, kRowSparseStorage, dispatch_mode, dispatch_ex);
     }
     if (!dispatched && ContainsOnlyStorage(*in_attrs, kCSRStorage)) {
-        // csr, csr -> csr
-        dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                         dispatch_mode, dispatch_ex);
+      // csr, csr -> csr
+      dispatched = storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, dispatch_ex);
     }
-    if (!dispatched &&
-        ((lhs_stype == kRowSparseStorage && rhs_stype == kDefaultStorage) ||
-         (lhs_stype == kDefaultStorage && rhs_stype == kRowSparseStorage))) {
-        // rsp, dns -> rsp
-        // dns, rsp -> rsp
-        dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                         dispatch_mode, dispatch_ex);
+    if (!dispatched && ((lhs_stype == kRowSparseStorage && rhs_stype == kDefaultStorage) ||
+                        (lhs_stype == kDefaultStorage && rhs_stype == kRowSparseStorage))) {
+      // rsp, dns -> rsp
+      // dns, rsp -> rsp
+      dispatched = storage_type_assign(&out_stype, kRowSparseStorage, dispatch_mode, dispatch_ex);
     }
-    if (!dispatched &&
-        ((lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) ||
-         (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage))) {
-        // csr, dns -> csr
-        // dns, csr -> csr
-        dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                         dispatch_mode, DispatchMode::kFComputeEx);
+    if (!dispatched && ((lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) ||
+                        (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage))) {
+      // csr, dns -> csr
+      // dns, csr -> csr
+      dispatched =
+          storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
     if (!dispatched) {
       dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -379,7 +365,6 @@ class ElemwiseBinaryOp : public OpBase {
     return dispatched;
   }
 
-
   /*!
    * \brief Allow one of the inputs to be dense and produce a dense output,
    *        for rsp inputs only support when both inputs are rsp type.
@@ -390,47 +375,46 @@ class ElemwiseBinaryOp : public OpBase {
    * \param out_attrs Output storage attributes
    * \return true if handled
    */
-  template<bool cpu_only, bool rsp, bool csr>
+  template <bool cpu_only, bool rsp, bool csr>
   static bool PreferDenseStorageType(const nnvm::NodeAttrs& attrs,
                                      const int dev_mask,
                                      DispatchMode* dispatch_mode,
-                                     std::vector<int> *in_attrs,
-                                     std::vector<int> *out_attrs) {
+                                     std::vector<int>* in_attrs,
+                                     std::vector<int>* out_attrs) {
     using namespace common;
     CHECK_EQ(in_attrs->size(), 2);
     CHECK_EQ(out_attrs->size(), 1);
-    const auto lhs_stype = (*in_attrs)[0];
-    const auto rhs_stype = (*in_attrs)[1];
-    bool dispatched = false;
+    const auto lhs_stype   = (*in_attrs)[0];
+    const auto rhs_stype   = (*in_attrs)[1];
+    bool dispatched        = false;
     const bool invalid_ctx = cpu_only && dev_mask != mshadow::cpu::kDevMask;
-    const auto dispatch_ex = invalid_ctx ? DispatchMode::kFComputeFallback :
-                                           DispatchMode::kFComputeEx;
+    const auto dispatch_ex =
+        invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
     if (!dispatched && ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
       // dns, dns ... -> dns
-      dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFCompute);
+      dispatched =
+          storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
     }
     if (!dispatched && rsp && ContainsOnlyStorage(*in_attrs, kRowSparseStorage)) {
       // rsp, rsp, ... -> rsp
-      dispatched = storage_type_assign(out_attrs, kRowSparseStorage,
-                                       dispatch_mode, DispatchMode::kFComputeEx);
+      dispatched = storage_type_assign(
+          out_attrs, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
     if (!dispatched && csr && ContainsOnlyStorage(*in_attrs, kCSRStorage)) {
       // csr, csr, ... -> csr
-      dispatched = storage_type_assign(out_attrs, kCSRStorage,
-                                       dispatch_mode, dispatch_ex);
+      dispatched = storage_type_assign(out_attrs, kCSRStorage, dispatch_mode, dispatch_ex);
     }
     if (!dispatched && ((lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage) ||
                         (lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage))) {
       // dense, csr -> dense / csr, dense -> dense
-      dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFComputeEx);
+      dispatched =
+          storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
     if (!dispatched && ((lhs_stype == kDefaultStorage && rhs_stype == kRowSparseStorage) ||
                         (lhs_stype == kRowSparseStorage && rhs_stype == kDefaultStorage))) {
       // dense, rsp -> dense / rsp, dense -> dense
-      dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFComputeEx);
+      dispatched =
+          storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
     }
     if (!dispatched) {
       dispatch_fallback(out_attrs, dispatch_mode);
@@ -438,7 +422,6 @@ class ElemwiseBinaryOp : public OpBase {
     return true;
   }
 
-
   /*!
    * \brief Backward pass computing input gradient using forward inputs
    * \param attrs Attributes
@@ -451,42 +434,44 @@ class ElemwiseBinaryOp : public OpBase {
   static bool BackwardUseInStorageType(const nnvm::NodeAttrs& attrs,
                                        int dev_mask,
                                        DispatchMode* dispatch_mode,
-                                       std::vector<int> *in_attrs,
-                                       std::vector<int> *out_attrs);
-
-  template<typename xpu, typename OP>
-  static void ComputeInt(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+                                       std::vector<int>* in_attrs,
+                                       std::vector<int>* out_attrs);
+
+  template <typename xpu, typename OP>
+  static void ComputeInt(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
     using namespace mxnet_op;
-    if (req[0] == kNullOp) return;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MXNET_INT_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size())
-        + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size()) +
+                             DataType<DType>::kLanes - 1) /
+                            DataType<DType>::kLanes;
         if (size != 0) {
-          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(s, size,
-          outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
+          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
+              s, size, outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
         }
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void Compute(const nnvm::NodeAttrs &attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void Compute(const nnvm::NodeAttrs& attrs,
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
     using namespace mxnet_op;
-    if (req[0] == kNullOp) return;
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
     if (outputs[0].type_flag_ == mshadow::kBool) {
@@ -494,163 +479,165 @@ class ElemwiseBinaryOp : public OpBase {
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size())
-        + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size()) +
+                             DataType<DType>::kLanes - 1) /
+                            DataType<DType>::kLanes;
         if (size != 0) {
-          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(s, size,
-          outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
+          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
+              s, size, outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
         }
       });
     });
   }
 
-template<typename xpu, typename OP>
-  static void MixedUnaryBackwardUseInCompute(const nnvm::NodeAttrs &attrs,
-                                             const OpContext &ctx,
-                                             const std::vector<TBlob> &inputs,
-                                             const std::vector<OpReqType> &req,
-                                             const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void MixedUnaryBackwardUseInCompute(const nnvm::NodeAttrs& attrs,
+                                             const OpContext& ctx,
+                                             const std::vector<TBlob>& inputs,
+                                             const std::vector<OpReqType>& req,
+                                             const std::vector<TBlob>& outputs) {
     using namespace mxnet_op;
-    if (req[0] == kNullOp) return;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
-    if (mxnet::common::is_int(outputs[0].type_flag_) ||
-        outputs[0].type_flag_ == mshadow::kBool) {
+    if (mxnet::common::is_int(outputs[0].type_flag_) || outputs[0].type_flag_ == mshadow::kBool) {
       LOG(FATAL) << "gradient computation of operator " << attrs.op->name << " for "
                  << mshadow::dtype_string(outputs[0].type_flag_) << " type is not supported";
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size())
-        + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size()) +
+                             DataType<DType>::kLanes - 1) /
+                            DataType<DType>::kLanes;
         if (size != 0) {
-          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(s, size,
-          outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
+          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
+              s, size, outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
         }
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void MixedUnaryBackwardUseInOutCompute(const nnvm::NodeAttrs &attrs,
-                                                const OpContext &ctx,
-                                                const std::vector<TBlob> &inputs,
-                                                const std::vector<OpReqType> &req,
-                                                const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void MixedUnaryBackwardUseInOutCompute(const nnvm::NodeAttrs& attrs,
+                                                const OpContext& ctx,
+                                                const std::vector<TBlob>& inputs,
+                                                const std::vector<OpReqType>& req,
+                                                const std::vector<TBlob>& outputs) {
     using namespace mxnet_op;
-    if (req[0] == kNullOp) return;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     CHECK_EQ(inputs.size(), 3U);
     CHECK_EQ(outputs.size(), 1U);
-    if (mxnet::common::is_int(outputs[0].type_flag_) ||
-        outputs[0].type_flag_ == mshadow::kBool) {
+    if (mxnet::common::is_int(outputs[0].type_flag_) || outputs[0].type_flag_ == mshadow::kBool) {
       LOG(FATAL) << "gradient computation of operator " << attrs.op->name << " for "
                  << mshadow::dtype_string(outputs[0].type_flag_) << " type is not supported";
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MSHADOW_REAL_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[2].Size())
-        + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[2].Size()) +
+                             DataType<DType>::kLanes - 1) /
+                            DataType<DType>::kLanes;
         if (size != 0) {
-          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(s, size,
-          outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[2].dptr<DType>());
+          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
+              s, size, outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[2].dptr<DType>());
         }
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void ComputeWithBool(const nnvm::NodeAttrs &attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void ComputeWithBool(const nnvm::NodeAttrs& attrs,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
     using namespace mxnet_op;
-    if (req[0] == kNullOp) return;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, DType, {
-        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size())
-        + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+        const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size()) +
+                             DataType<DType>::kLanes - 1) /
+                            DataType<DType>::kLanes;
         if (size != 0) {
-          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(s, size,
-          outputs[0].dptr<DType>(),
-          inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
+          Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
+              s, size, outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), inputs[1].dptr<DType>());
         }
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void ComputeLogic(const nnvm::NodeAttrs &attrs,
-                           const OpContext &ctx,
-                           const std::vector<TBlob> &inputs,
-                           const std::vector<OpReqType> &req,
-                           const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void ComputeLogic(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
     using namespace mxnet_op;
-    if (req[0] == kNullOp) return;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     CHECK_EQ(inputs.size(), 2U);
     CHECK_EQ(outputs.size(), 1U);
     MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
       MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(inputs[0].type_flag_, DType, {
         MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(inputs[1].type_flag_, EType, {
-          const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size())
-          + DataType<DType>::kLanes - 1) / DataType<DType>::kLanes;
+          const size_t size = (minthree(outputs[0].Size(), inputs[0].Size(), inputs[1].Size()) +
+                               DataType<DType>::kLanes - 1) /
+                              DataType<DType>::kLanes;
           if (size != 0) {
-            Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(s, size,
-                                                                outputs[0].dptr<bool>(),
-                                                                inputs[0].dptr<DType>(),
-                                                                inputs[1].dptr<EType>());
+            Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
+                s, size, outputs[0].dptr<bool>(), inputs[0].dptr<DType>(), inputs[1].dptr<EType>());
           }
         });
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void ComputeEx(const nnvm::NodeAttrs &attrs,
-                        const OpContext &ctx,
-                        const std::vector<NDArray> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<NDArray> &outputs) {
+  template <typename xpu, typename OP>
+  static void ComputeEx(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<NDArray>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<NDArray>& outputs) {
     using namespace common;
     CHECK_EQ(inputs.size(), 2);
     CHECK_EQ(outputs.size(), 1);
-    if (req[0] == kNullOp) return;
-    const auto lhs_stype = inputs[0].storage_type();
-    const auto rhs_stype = inputs[1].storage_type();
-    const auto out_stype = outputs[0].storage_type();
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    if (req[0] == kNullOp)
+      return;
+    const auto lhs_stype    = inputs[0].storage_type();
+    const auto rhs_stype    = inputs[1].storage_type();
+    const auto out_stype    = outputs[0].storage_type();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     if ((ContainsOnlyStorage(inputs, kRowSparseStorage)) &&
         (out_stype == kRowSparseStorage || out_stype == kDefaultStorage)) {
       // rsp, rsp -> rsp
       // rsp, rsp -> dns
       RspRspOp<OP>(
-            s, attrs, ctx, inputs[0], inputs[1], req[0], outputs[0], false, false, false, false);
+          s, attrs, ctx, inputs[0], inputs[1], req[0], outputs[0], false, false, false, false);
     } else if (ContainsOnlyStorage(inputs, kCSRStorage) && out_stype == kCSRStorage) {
       // csr, csr -> csr
       CsrCsrOp<OP>(s, attrs, ctx, inputs[0], inputs[1], req[0], outputs[0]);
     } else if (((lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) ||
                 (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage)) &&
-                out_stype == kDefaultStorage) {
-      const NDArray& dns = (lhs_stype == kDefaultStorage)? inputs[0] : inputs[1];
-      const NDArray& csr = (lhs_stype == kCSRStorage)? inputs[0] : inputs[1];
+               out_stype == kDefaultStorage) {
+      const NDArray& dns = (lhs_stype == kDefaultStorage) ? inputs[0] : inputs[1];
+      const NDArray& csr = (lhs_stype == kCSRStorage) ? inputs[0] : inputs[1];
       const bool reverse = (lhs_stype == kCSRStorage);
 
       DnsCsrDnsOp<OP>(s, attrs, ctx, dns, csr, req[0], outputs[0], reverse);
     } else if (((lhs_stype == kRowSparseStorage && rhs_stype == kDefaultStorage) ||
                 (lhs_stype == kDefaultStorage && rhs_stype == kRowSparseStorage)) &&
-                out_stype == kDefaultStorage) {
-      const NDArray& dns = (lhs_stype == kDefaultStorage)? inputs[0] : inputs[1];
+               out_stype == kDefaultStorage) {
+      const NDArray& dns = (lhs_stype == kDefaultStorage) ? inputs[0] : inputs[1];
       const bool reverse = (lhs_stype == kRowSparseStorage);
-      const NDArray& rsp = (reverse)? inputs[0] : inputs[1];
+      const NDArray& rsp = (reverse) ? inputs[0] : inputs[1];
 
       DnsRspDnsOp<xpu, OP>(s, attrs, ctx, dns, rsp, req[0], outputs[0], reverse);
     } else {
@@ -659,17 +646,18 @@ template<typename xpu, typename OP>
   }
 
   /*! \brief ComputeEx allowing dense lvalue and/or rvalue */
-  template<typename xpu, typename OP, bool lhs_may_be_dense, bool rhs_may_be_dense>
-  static void ComputeDnsLRValueEx(const nnvm::NodeAttrs &attrs,
-                                  const OpContext &ctx,
-                                  const std::vector<NDArray> &inputs,
-                                  const std::vector<OpReqType> &req,
-                                  const std::vector<NDArray> &outputs) {
+  template <typename xpu, typename OP, bool lhs_may_be_dense, bool rhs_may_be_dense>
+  static void ComputeDnsLRValueEx(const nnvm::NodeAttrs& attrs,
+                                  const OpContext& ctx,
+                                  const std::vector<NDArray>& inputs,
+                                  const std::vector<OpReqType>& req,
+                                  const std::vector<NDArray>& outputs) {
     using namespace mshadow;
     using namespace mshadow::expr;
     CHECK_EQ(inputs.size(), 2);
     CHECK_EQ(outputs.size(), 1);
-    if (req[0] == kNullOp) return;
+    if (req[0] == kNullOp)
+      return;
     const auto lhs_stype = inputs[0].storage_type();
     const auto rhs_stype = inputs[1].storage_type();
     const auto out_stype = outputs[0].storage_type();
@@ -677,7 +665,7 @@ template<typename xpu, typename OP>
         ((lhs_stype == kRowSparseStorage && rhs_stype == kRowSparseStorage) ||
          (lhs_stype == kRowSparseStorage && rhs_stype == kDefaultStorage) ||
          (lhs_stype == kDefaultStorage && rhs_stype == kRowSparseStorage)) &&
-         lhs_may_be_dense && rhs_may_be_dense) {
+        lhs_may_be_dense && rhs_may_be_dense) {
       // rsp, rsp -> rsp
       // rsp, rsp -> dns
       // rsp, dns -> rsp
@@ -685,17 +673,25 @@ template<typename xpu, typename OP>
       // More than once dense not allowed (this will be checked in RspRspOp):
       //   rsp, dns -> dns  <-- NOT ALLOWED
       //   dns, rsp -> dns  <-- NOT ALLOWED
-      mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-      RspRspOp<OP>(
-            s, attrs, ctx, inputs[0], inputs[1],
-            req[0], outputs[0], lhs_may_be_dense, rhs_may_be_dense, false, false);
+      mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+      RspRspOp<OP>(s,
+                   attrs,
+                   ctx,
+                   inputs[0],
+                   inputs[1],
+                   req[0],
+                   outputs[0],
+                   lhs_may_be_dense,
+                   rhs_may_be_dense,
+                   false,
+                   false);
     } else if (lhs_stype == kCSRStorage && rhs_stype == kCSRStorage) {
       ComputeEx<xpu, OP>(attrs, ctx, inputs, req, outputs);
     } else if (((lhs_stype == kCSRStorage && rhs_stype == kDefaultStorage) ||
                 (lhs_stype == kDefaultStorage && rhs_stype == kCSRStorage)) &&
-                out_stype == kCSRStorage) {
-      const NDArray& dns = (lhs_stype == kDefaultStorage)? inputs[0] : inputs[1];
-      const NDArray& csr = (lhs_stype == kCSRStorage)? inputs[0] : inputs[1];
+               out_stype == kCSRStorage) {
+      const NDArray& dns = (lhs_stype == kDefaultStorage) ? inputs[0] : inputs[1];
+      const NDArray& csr = (lhs_stype == kCSRStorage) ? inputs[0] : inputs[1];
       const bool reverse = (lhs_stype == kCSRStorage);
 
       DnsCsrCsrOp<xpu, OP>(attrs, ctx, dns, csr, req[0], outputs[0], reverse);
@@ -704,25 +700,25 @@ template<typename xpu, typename OP>
     }
   }
 
-  template<typename xpu, typename LOP, typename ROP>
-  static inline void BackwardUseNone(const nnvm::NodeAttrs &attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<TBlob> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<TBlob> &outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename LOP, typename ROP>
+  static inline void BackwardUseNone(const nnvm::NodeAttrs& attrs,
+                                     const OpContext& ctx,
+                                     const std::vector<TBlob>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<TBlob>& outputs) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     BackwardUseNone_<LOP, ROP>(attrs, s, inputs, req, outputs);
   }
 
-  template<typename xpu, typename LOP, typename ROP>
-  static inline void BackwardUseNoneEx(const nnvm::NodeAttrs &attrs,
-                                       const OpContext &ctx,
-                                       const std::vector<NDArray> &inputs,
-                                       const std::vector<OpReqType> &req,
-                                       const std::vector<NDArray> &outputs) {
+  template <typename xpu, typename LOP, typename ROP>
+  static inline void BackwardUseNoneEx(const nnvm::NodeAttrs& attrs,
+                                       const OpContext& ctx,
+                                       const std::vector<NDArray>& inputs,
+                                       const std::vector<OpReqType>& req,
+                                       const std::vector<NDArray>& outputs) {
     CHECK_EQ(inputs.size(), 1U);   // output grad
     CHECK_EQ(outputs.size(), 2U);  // lhs input grad, rhs input grad
-    const auto in_stype = inputs[0].storage_type();
+    const auto in_stype  = inputs[0].storage_type();
     const auto lhs_stype = outputs[0].storage_type();
     const auto rhs_stype = outputs[1].storage_type();
     // lhs grad
@@ -749,23 +745,22 @@ template<typename xpu, typename OP>
     }
   }
 
-  template<typename xpu, typename LOP, typename ROP>
-  static inline void BackwardUseIn(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<TBlob> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<TBlob> &outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename LOP, typename ROP>
+  static inline void BackwardUseIn(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const std::vector<TBlob>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<TBlob>& outputs) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     BackwardUseIn_<LOP, ROP>(attrs, s, inputs, req, outputs);
   }
 
-
-  template<typename xpu, typename LOP, typename ROP>
-  static inline void BackwardUseInEx(const nnvm::NodeAttrs &attrs,
-                                     const OpContext &ctx,
-                                     const std::vector<NDArray> &inputs,
-                                     const std::vector<OpReqType> &req,
-                                     const std::vector<NDArray> &outputs) {
+  template <typename xpu, typename LOP, typename ROP>
+  static inline void BackwardUseInEx(const nnvm::NodeAttrs& attrs,
+                                     const OpContext& ctx,
+                                     const std::vector<NDArray>& inputs,
+                                     const std::vector<OpReqType>& req,
+                                     const std::vector<NDArray>& outputs) {
     using namespace common;
     CHECK_EQ(inputs.size(), 3U);
     CHECK_EQ(outputs.size(), 2U);  // lhs input grad, rhs input grad
@@ -776,7 +771,7 @@ template<typename xpu, typename OP>
         (rhs_grad_stype == kDefaultStorage || rhs_grad_stype == kRowSparseStorage)) {
       // rsp, rsp, rsp -> [dns, rsp], [dns, rsp]
       RspRspOpBackward<xpu, LOP, ROP, false, false, false>(
-        attrs, ctx, inputs, req, outputs, BackwardUseIn<xpu, LOP, ROP>);
+          attrs, ctx, inputs, req, outputs, BackwardUseIn<xpu, LOP, ROP>);
     } else {
       LOG(FATAL) << "Not Implemented";
     }
@@ -784,68 +779,72 @@ template<typename xpu, typename OP>
 };  // class ElemwiseBinaryOp
 
 /*! \brief Binary launch */
-#define MXNET_OPERATOR_REGISTER_BINARY(name)                        \
-  NNVM_REGISTER_OP(name)                                            \
-  .set_num_inputs(2)                                                \
-  .set_num_outputs(1)                                               \
-  .set_attr<nnvm::FListInputNames>("FListInputNames",               \
-    [](const NodeAttrs& attrs) {                                    \
-      return std::vector<std::string>{"lhs", "rhs"};                \
-    })                                                              \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)  \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)     \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                 \
-    [](const NodeAttrs& attrs){                                     \
-      return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}};     \
-    })                                                              \
-  .add_argument("lhs", "NDArray-or-Symbol", "first input")          \
-  .add_argument("rhs", "NDArray-or-Symbol", "second input")
+#define MXNET_OPERATOR_REGISTER_BINARY(name)                                                      \
+  NNVM_REGISTER_OP(name)                                                                          \
+      .set_num_inputs(2)                                                                          \
+      .set_num_outputs(1)                                                                         \
+      .set_attr<nnvm::FListInputNames>("FListInputNames",                                         \
+                                       [](const NodeAttrs& attrs) {                               \
+                                         return std::vector<std::string>{"lhs", "rhs"};           \
+                                       })                                                         \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)                           \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)                               \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                           \
+                                      [](const NodeAttrs& attrs) {                                \
+                                        return std::vector<std::pair<int, int> >{{0, 0}, {1, 0}}; \
+                                      })                                                          \
+      .add_argument("lhs", "NDArray-or-Symbol", "first input")                                    \
+      .add_argument("rhs", "NDArray-or-Symbol", "second input")
 
 /*! \brief Binary launch, with FComputeEx for csr and rsp available */
-#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(__name$, __kernel$)              \
-  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                               \
-  .set_attr<FInferStorageType>("FInferStorageType",                                     \
-    ElemwiseStorageType<2, 1, true, true, true>)                                        \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)       \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>) \
-  .set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */ \
-    [](const NodeAttrs& attrs) { \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};})
+#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(__name$, __kernel$)                  \
+  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                                   \
+      .set_attr<FInferStorageType>("FInferStorageType",                                     \
+                                   ElemwiseStorageType<2, 1, true, true, true>)             \
+      .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)       \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>) \
+      .set_attr<FResourceRequest>(                                                          \
+          "FResourceRequest", /* For Sparse CSR */                                          \
+          [](const NodeAttrs& attrs) {                                                      \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};               \
+          })
 
 /*! \brief Binary launch, with FComputeEx for csr and rsp available.
            when inputs contain both sparse and dense, sparse output is preferred. */
-#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_PS(__name$, __kernel$)           \
-  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                               \
-  .set_attr<FInferStorageType>("FInferStorageType",                                     \
-                               ElemwiseBinaryOp::PreferSparseStorageType)               \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)       \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>) \
-  .set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */ \
-    [](const NodeAttrs& attrs) { \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};})
-
+#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_PS(__name$, __kernel$)                      \
+  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                                          \
+      .set_attr<FInferStorageType>("FInferStorageType", ElemwiseBinaryOp::PreferSparseStorageType) \
+      .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)              \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>)        \
+      .set_attr<FResourceRequest>(                                                                 \
+          "FResourceRequest", /* For Sparse CSR */                                                 \
+          [](const NodeAttrs& attrs) {                                                             \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};                      \
+          })
 
 /*! \brief Binary launch, dense result
  *         FInferStorageType attr is not set using this macro.
  *         By default DefaultStorageType is used.
  */
-#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(__name$, __kernel$)                  \
-  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                                      \
-  .set_attr<FInferStorageType>("FInferStorageType",                                            \
-                               ElemwiseBinaryOp::SparseSparseWithDenseResult)                  \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)              \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>)
+#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(__name$, __kernel$)         \
+  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                             \
+      .set_attr<FInferStorageType>("FInferStorageType",                               \
+                                   ElemwiseBinaryOp::SparseSparseWithDenseResult)     \
+      .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>) \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>)
 
 /*! \brief Binary launch, with FComputeEx for prefer dense */
-#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_PD(__name$, __kernel$)              \
-  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                               \
-  .set_attr<FInferStorageType>("FInferStorageType",                                     \
-    ElemwiseBinaryOp::PreferDenseStorageType<true, true, true>)                         \
-  .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)       \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>) \
-  .set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */ \
-    [](const NodeAttrs& attrs) { \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};})
+#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_PD(__name$, __kernel$)                  \
+  MXNET_OPERATOR_REGISTER_BINARY(__name$)                                                      \
+      .set_attr<FInferStorageType>("FInferStorageType",                                        \
+                                   ElemwiseBinaryOp::PreferDenseStorageType<true, true, true>) \
+      .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, __kernel$>)          \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::ComputeEx<cpu, __kernel$>)    \
+      .set_attr<FResourceRequest>(                                                             \
+          "FResourceRequest", /* For Sparse CSR */                                             \
+          [](const NodeAttrs& attrs) {                                                         \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};                  \
+          })
 
 #if MXNET_USE_CUDA
 
diff --git a/src/operator/tensor/elemwise_binary_op_basic.cc b/src/operator/tensor/elemwise_binary_op_basic.cc
index 1620579e7044..5872ab53254e 100644
--- a/src/operator/tensor/elemwise_binary_op_basic.cc
+++ b/src/operator/tensor/elemwise_binary_op_basic.cc
@@ -47,32 +47,31 @@ static void ElemwiseAddEx(const nnvm::NodeAttrs& attrs,
   if (SupportMKLDNNSum(inputs[0]) && SupportMKLDNNSum(inputs[1])) {
     MKLDNNRun(MKLDNNSumForward, attrs, ctx, inputs, req, outputs);
     return;
-  } else if (inputs[0].storage_type() == kDefaultStorage
-             && inputs[1].storage_type() == kDefaultStorage) {
-    FallBackCompute(ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::plus>,
-                    attrs, ctx, inputs, req, outputs);
+  } else if (inputs[0].storage_type() == kDefaultStorage &&
+             inputs[1].storage_type() == kDefaultStorage) {
+    FallBackCompute(
+        ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::plus>, attrs, ctx, inputs, req, outputs);
     return;
   }
 #endif
-  ElemwiseBinaryOp::ComputeEx<cpu, op::mshadow_op::plus>(attrs, ctx, inputs,
-                                                         req, outputs);
+  ElemwiseBinaryOp::ComputeEx<cpu, op::mshadow_op::plus>(attrs, ctx, inputs, req, outputs);
 }
 
 static inline bool ElemwiseAddStorageType(const nnvm::NodeAttrs& attrs,
                                           const int dev_mask,
                                           DispatchMode* dispatch_mode,
-                                          std::vector<int> *in_attrs,
-                                          std::vector<int> *out_attrs) {
+                                          std::vector<int>* in_attrs,
+                                          std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
   bool ret = ElemwiseBinaryOp::PreferDenseStorageType<true, true, true>(
-               attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
+      attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 #if MXNET_USE_ONEDNN == 1
   if (dev_mask == mshadow::cpu::kDevMask && !MKLDNNEnvSet()) {
     *dispatch_mode = DispatchMode::kFComputeFallback;
-  } else if (dev_mask == mshadow::cpu::kDevMask
-      && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)
-      && out_attrs->at(0) == kDefaultStorage) {
+  } else if (dev_mask == mshadow::cpu::kDevMask &&
+             common::ContainsOnlyStorage(*in_attrs, kDefaultStorage) &&
+             out_attrs->at(0) == kDefaultStorage) {
     *dispatch_mode = DispatchMode::kFComputeEx;
   }
 #endif
@@ -80,22 +79,25 @@ static inline bool ElemwiseAddStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 MXNET_OPERATOR_REGISTER_BINARY(elemwise_add)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseAddStorageType)
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::plus>)
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseAddStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::plus>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<bool>("TIsMKLDNN", true)
 #endif
-.set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseAddEx)
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */
-                            [](const NodeAttrs& attrs) {
-                            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};})
-MXNET_ADD_SPARSE_OP_ALIAS(elemwise_add)
-.add_alias("_add").add_alias("_plus").add_alias("_Plus")
-.set_attr<nnvm::FListOutputNames>("FListOutputNames", [](const NodeAttrs& attrs) {
-  return std::vector<std::string>{"output"};
-})
-.describe(R"code(Adds arguments element-wise.
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseAddEx)
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FResourceRequest>("FResourceRequest", /* For Sparse CSR */
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                }) MXNET_ADD_SPARSE_OP_ALIAS(elemwise_add)
+    .add_alias("_add")
+    .add_alias("_plus")
+    .add_alias("_Plus")
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"output"};
+                                      })
+    .describe(R"code(Adds arguments element-wise.
 
 The storage type of ``elemwise_add`` output depends on storage types of inputs
 
@@ -108,7 +110,7 @@ The storage type of ``elemwise_add`` output depends on storage types of inputs
    - otherwise, ``elemwise_add`` generates output with default storage
 
 )code")
-.set_attr<nnvm::FGradient>("FGradient", CloneGradient{"_backward_add"});
+    .set_attr<nnvm::FGradient>("FGradient", CloneGradient{"_backward_add"});
 
 // specialized gradient add function to do add to optimization
 // this must differ from elemwise_add to prevent add to optimization in forward pass.
@@ -129,7 +131,11 @@ static void _backward_ElemwiseAddEx(const nnvm::NodeAttrs& attrs,
   } else if (common::ContainsOnlyStorage(inputs, kDefaultStorage)) {
     FallBackCompute(
         ElemwiseBinaryOp::BackwardUseNone<cpu, mshadow_op::identity, mshadow_op::identity>,
-            attrs, ctx, inputs, req, outputs);
+        attrs,
+        ctx,
+        inputs,
+        req,
+        outputs);
     return;
   }
 #endif
@@ -140,12 +146,12 @@ static void _backward_ElemwiseAddEx(const nnvm::NodeAttrs& attrs,
 static inline bool ElemwiseAddBackwardStorageType(const nnvm::NodeAttrs& attrs,
                                                   const int dev_mask,
                                                   DispatchMode* dispatch_mode,
-                                                  std::vector<int> *in_attrs,
-                                                  std::vector<int> *out_attrs) {
+                                                  std::vector<int>* in_attrs,
+                                                  std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 2);
-  bool ret = ElemwiseStorageType<1, 2, true, true, true>(attrs, dev_mask, dispatch_mode,
-                                                         in_attrs, out_attrs);
+  bool ret = ElemwiseStorageType<1, 2, true, true, true>(
+      attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 #if MXNET_USE_ONEDNN == 1
   if (dev_mask == mshadow::cpu::kDevMask && !MKLDNNEnvSet()) {
     *dispatch_mode = DispatchMode::kFComputeFallback;
@@ -157,29 +163,32 @@ static inline bool ElemwiseAddBackwardStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 NNVM_REGISTER_OP(_backward_add)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 0},
-                                                                           {0, 1}};
-                                })
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
+                                    })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<bool>("TIsMKLDNN", true)
 #endif
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseNone<
-  cpu, mshadow_op::identity, mshadow_op::identity>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", _backward_ElemwiseAddEx)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseAddBackwardStorageType);
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::BackwardUseNone<cpu, mshadow_op::identity, mshadow_op::identity>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", _backward_ElemwiseAddEx)
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseAddBackwardStorageType);
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_PD(elemwise_sub, op::mshadow_op::minus)
 MXNET_ADD_SPARSE_OP_ALIAS(elemwise_sub)
-.add_alias("_sub").add_alias("_minus").add_alias("_Minus")
-.describe(R"code(Subtracts arguments element-wise.
+    .add_alias("_sub")
+    .add_alias("_minus")
+    .add_alias("_Minus")
+    .describe(R"code(Subtracts arguments element-wise.
 
 The storage type of ``elemwise_sub`` output depends on storage types of inputs
 
@@ -192,27 +201,27 @@ The storage type of ``elemwise_sub`` output depends on storage types of inputs
    - otherwise, ``elemwise_sub`` generates output with default storage
 
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_sub"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_sub"});
 
 NNVM_REGISTER_OP(_backward_sub)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 0},
-                                                                           {0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseNone<cpu,
-  mshadow_op::identity, mshadow_op::negation>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::BackwardUseNoneEx<cpu,
-  mshadow_op::identity, mshadow_op::negation>)
-.set_attr<FInferStorageType>("FInferStorageType",
-                             ElemwiseStorageType<1, 2, true, true, true>);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}, {0, 1}};
+                                    })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::BackwardUseNone<cpu, mshadow_op::identity, mshadow_op::negation>)
+    .set_attr<FComputeEx>(
+        "FComputeEx<cpu>",
+        ElemwiseBinaryOp::BackwardUseNoneEx<cpu, mshadow_op::identity, mshadow_op::negation>)
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 2, true, true, true>);
 
 MXNET_OPERATOR_REGISTER_BINARY(elemwise_mul)
 MXNET_ADD_SPARSE_OP_ALIAS(elemwise_mul)
-.describe(R"code(Multiplies arguments element-wise.
+    .describe(R"code(Multiplies arguments element-wise.
 
 The storage type of ``elemwise_mul`` output depends on storage types of inputs
 
@@ -224,73 +233,78 @@ The storage type of ``elemwise_mul`` output depends on storage types of inputs
    - otherwise, ``elemwise_mul`` generates output with default storage
 
 )code")
-.set_attr<FInferStorageType>("FInferStorageType",
-                             ElemwiseBinaryOp::PreferSparseStorageType)
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::mul>)
-.set_attr<FComputeEx>("FComputeEx<cpu>",
-                      ElemwiseBinaryOp::ComputeDnsLRValueEx<cpu, op::mshadow_op::mul, true, true>)
-.set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */
-                              [](const NodeAttrs& attrs) {
-                                return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-                              })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_alias("_mul").add_alias("_Mul")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mul"});
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseBinaryOp::PreferSparseStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, op::mshadow_op::mul>)
+    .set_attr<FComputeEx>(
+        "FComputeEx<cpu>",
+        ElemwiseBinaryOp::ComputeDnsLRValueEx<cpu, op::mshadow_op::mul, true, true>)
+    .set_attr<FResourceRequest>("FResourceRequest", /* For Sparse CSR */
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_alias("_mul")
+    .add_alias("_Mul")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mul"});
 
 NNVM_REGISTER_OP(_backward_mul)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 1}};
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseBinaryOp::BackwardUseInStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest", /* For Sparse CSR */
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
                                 })
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseBinaryOp::BackwardUseInStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",  /* For Sparse CSR */
-                              [](const NodeAttrs& attrs) {
-                                return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-                              })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<
-  cpu, mshadow_op::right, mshadow_op::left>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ElemwiseBinaryOp::BackwardUseInEx<
-  cpu, mshadow_op::right, mshadow_op::left>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::right, mshadow_op::left>)
+    .set_attr<FComputeEx>(
+        "FComputeEx<cpu>",
+        ElemwiseBinaryOp::BackwardUseInEx<cpu, mshadow_op::right, mshadow_op::left>);
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(elemwise_div, op::mshadow_op::div)
 MXNET_ADD_SPARSE_OP_ALIAS(elemwise_div)
-.describe(R"code(Divides arguments element-wise.
+    .describe(R"code(Divides arguments element-wise.
 
 The storage type of ``elemwise_div`` output is always dense
 
 )code")
-.add_alias("_div").add_alias("_Div")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_div"});
+    .add_alias("_div")
+    .add_alias("_Div")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_div"});
 
 NNVM_REGISTER_OP(_backward_div)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<
-  cpu, mshadow_op::div_grad, mshadow_op::div_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::div_grad, mshadow_op::div_rgrad>);
 
 MXNET_OPERATOR_REGISTER_BINARY(_mod)
-.add_alias("_Mod")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::mod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mod"});
+    .add_alias("_Mod")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::mod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mod"});
 
 NNVM_REGISTER_OP(_backward_mod)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<
-  cpu, mshadow_op::mod_grad, mshadow_op::mod_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::mod_grad, mshadow_op::mod_rgrad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_op_basic.cu b/src/operator/tensor/elemwise_binary_op_basic.cu
index cb0da7554bc3..cc71a70efb6c 100644
--- a/src/operator/tensor/elemwise_binary_op_basic.cu
+++ b/src/operator/tensor/elemwise_binary_op_basic.cu
@@ -31,30 +31,34 @@
 namespace mxnet {
 namespace op {
 
-template<typename OP>
+template <typename OP>
 struct RspElemwiseKernel {
-  template<typename DType, typename IType>
-  static MSHADOW_XINLINE void Map(int i, DType* out, const IType* lookup_table,
-                                  const DType* data, const IType* indices,
-                                  const nnvm::dim_t nz_rows, const nnvm::dim_t num_cols) {
+  template <typename DType, typename IType>
+  static MSHADOW_XINLINE void Map(int i,
+                                  DType* out,
+                                  const IType* lookup_table,
+                                  const DType* data,
+                                  const IType* indices,
+                                  const nnvm::dim_t nz_rows,
+                                  const nnvm::dim_t num_cols) {
     if (i < nz_rows * num_cols) {
-      const nnvm::dim_t row = i / num_cols;
-      const nnvm::dim_t col = i % num_cols;
+      const nnvm::dim_t row     = i / num_cols;
+      const nnvm::dim_t col     = i % num_cols;
       const nnvm::dim_t out_row = lookup_table[indices[row]] - 1;
       const nnvm::dim_t out_idx = out_row * num_cols + col;
-      out[out_idx] = OP::Map(out[out_idx], data[i]);
+      out[out_idx]              = OP::Map(out[out_idx], data[i]);
     }
   }
 };
 
-template<typename OP>
-void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
-                                const nnvm::NodeAttrs &attrs,
-                                const OpContext &ctx,
-                                const NDArray &lhs,
-                                const NDArray &rhs,
+template <typename OP>
+void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu>* s,
+                                const nnvm::NodeAttrs& attrs,
+                                const OpContext& ctx,
+                                const NDArray& lhs,
+                                const NDArray& rhs,
                                 const OpReqType req,
-                                const NDArray &output,
+                                const NDArray& output,
                                 const bool lhs_may_be_dense,
                                 const bool rhs_may_be_dense,
                                 const bool allow_inplace,
@@ -64,7 +68,8 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
   using namespace mshadow::expr;
   using namespace rowsparse;
 
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
 
   CHECK(!scatter) << "scatter is not supported in RspRspOp on GPU yet...";
   CHECK(lhs.storage_type() == kRowSparseStorage && rhs.storage_type() == kRowSparseStorage);
@@ -77,7 +82,7 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
       if (lhs.storage_initialized() && rhs.storage_initialized()) {
         const nnvm::dim_t lhs_nz_rows = lhs.storage_shape()[0];
         const nnvm::dim_t rhs_nz_rows = rhs.storage_shape()[0];
-        const nnvm::dim_t num_cols = lhs.data().Size() / lhs_nz_rows;
+        const nnvm::dim_t num_cols    = lhs.data().Size() / lhs_nz_rows;
         // Optimize for the case where one of the rsps is actually dense
         if ((lhs_nz_rows == num_rows || rhs_nz_rows == num_rows) && req == kWriteInplace) {
           const NDArray& dns = (output.IsSame(lhs)) ? lhs : rhs;
@@ -87,12 +92,12 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
           return;
         }
         CHECK(req == kWriteTo) << "Should be kWriteTo but got " << req;
-        const TBlob& lhs_indices = lhs.aux_data(kIdx);
-        const TBlob& rhs_indices = rhs.aux_data(kIdx);
+        const TBlob& lhs_indices      = lhs.aux_data(kIdx);
+        const TBlob& rhs_indices      = rhs.aux_data(kIdx);
         size_t common_row_table_bytes = num_rows * sizeof(IType);
-        IType* common_row_table = nullptr;
-        void* temp_storage_ptr = nullptr;
-        size_t temp_storage_bytes = 0;
+        IType* common_row_table       = nullptr;
+        void* temp_storage_ptr        = nullptr;
+        size_t temp_storage_bytes     = 0;
         cub::DeviceScan::InclusiveSum(temp_storage_ptr,
                                       temp_storage_bytes,
                                       common_row_table,
@@ -101,14 +106,14 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
                                       mshadow::Stream<gpu>::GetStream(s));
         size_t workspace_bytes = common_row_table_bytes + temp_storage_bytes;
         Tensor<gpu, 1, char> workspace =
-          ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_bytes), s);
+            ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_bytes), s);
         common_row_table = reinterpret_cast<IType*>(workspace.dptr_);
         temp_storage_ptr = workspace.dptr_ + common_row_table_bytes;
         mxnet_op::Kernel<set_zero, gpu>::Launch(s, num_rows, common_row_table);
         Kernel<MarkRspRowFlgKernel, gpu>::Launch(
-          s, lhs_nz_rows, common_row_table, lhs_indices.dptr<IType>(), lhs_nz_rows);
+            s, lhs_nz_rows, common_row_table, lhs_indices.dptr<IType>(), lhs_nz_rows);
         Kernel<MarkRspRowFlgKernel, gpu>::Launch(
-          s, rhs_nz_rows, common_row_table, rhs_indices.dptr<IType>(), rhs_nz_rows);
+            s, rhs_nz_rows, common_row_table, rhs_indices.dptr<IType>(), rhs_nz_rows);
         cub::DeviceScan::InclusiveSum(temp_storage_ptr,
                                       temp_storage_bytes,
                                       common_row_table,
@@ -116,27 +121,40 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
                                       num_rows,
                                       mshadow::Stream<gpu>::GetStream(s));
         nnvm::dim_t nnr_out = 0;
-        CUDA_CALL(cudaMemcpyAsync(&nnr_out, &common_row_table[num_rows-1], sizeof(nnvm::dim_t),
-                                  cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+        CUDA_CALL(cudaMemcpyAsync(&nnr_out,
+                                  &common_row_table[num_rows - 1],
+                                  sizeof(nnvm::dim_t),
+                                  cudaMemcpyDeviceToHost,
+                                  mshadow::Stream<gpu>::GetStream(s)));
         CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)))
         output.CheckAndAlloc({mshadow::Shape1(nnr_out)});
         Kernel<FillRspRowIdxKernel, gpu>::Launch(
-          s, num_rows, output.aux_data(kIdx).dptr<IType>(), common_row_table, num_rows);
+            s, num_rows, output.aux_data(kIdx).dptr<IType>(), common_row_table, num_rows);
         Kernel<set_zero, gpu>::Launch(s, nnr_out * num_cols, output.data().dptr<DType>());
-        Kernel<RspElemwiseKernel<mshadow_op::plus>, gpu>::Launch(
-          s, lhs_nz_rows * num_cols, output.data().dptr<DType>(), common_row_table,
-          lhs.data().dptr<DType>(), lhs_indices.dptr<IType>(), lhs_nz_rows, num_cols);
-        Kernel<RspElemwiseKernel<OP>, gpu>::Launch(
-          s, rhs_nz_rows * num_cols, output.data().dptr<DType>(), common_row_table,
-          rhs.data().dptr<DType>(), rhs_indices.dptr<IType>(), rhs_nz_rows, num_cols);
+        Kernel<RspElemwiseKernel<mshadow_op::plus>, gpu>::Launch(s,
+                                                                 lhs_nz_rows * num_cols,
+                                                                 output.data().dptr<DType>(),
+                                                                 common_row_table,
+                                                                 lhs.data().dptr<DType>(),
+                                                                 lhs_indices.dptr<IType>(),
+                                                                 lhs_nz_rows,
+                                                                 num_cols);
+        Kernel<RspElemwiseKernel<OP>, gpu>::Launch(s,
+                                                   rhs_nz_rows * num_cols,
+                                                   output.data().dptr<DType>(),
+                                                   common_row_table,
+                                                   rhs.data().dptr<DType>(),
+                                                   rhs_indices.dptr<IType>(),
+                                                   rhs_nz_rows,
+                                                   num_cols);
       } else {
         if (lhs.storage_initialized()) {
           if (req == kWriteTo) {
             output.CheckAndAlloc({lhs.aux_shape(kIdx)});
-            Copy(output.data().FlatTo1D<gpu, DType>(),
-                 lhs.data().FlatTo1D<gpu, DType>(), s);
+            Copy(output.data().FlatTo1D<gpu, DType>(), lhs.data().FlatTo1D<gpu, DType>(), s);
             Copy(output.aux_data(kIdx).FlatTo1D<gpu, IType>(),
-                 lhs.aux_data(kIdx).FlatTo1D<gpu, IType>(), s);
+                 lhs.aux_data(kIdx).FlatTo1D<gpu, IType>(),
+                 s);
           } else if (req == kWriteInplace && rhs.IsSame(output)) {
             LOG(FATAL) << "Inplace on an empty rhs is not supported";
           }
@@ -148,14 +166,14 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
           }
           if (std::is_same<OP, mshadow_op::minus>::value) {
             Kernel<op_with_req<mshadow_op::negation, kWriteTo>, gpu>::Launch(
-              s, rhs.data().Size(), output.data().dptr<DType>(), rhs.data().dptr<DType>());
+                s, rhs.data().Size(), output.data().dptr<DType>(), rhs.data().dptr<DType>());
           } else if (req == kWriteTo) {
-            Copy(output.data().FlatTo1D<gpu, DType>(),
-                 rhs.data().FlatTo1D<gpu, DType>(), s);
+            Copy(output.data().FlatTo1D<gpu, DType>(), rhs.data().FlatTo1D<gpu, DType>(), s);
           }
           if (req == kWriteTo) {
             Copy(output.aux_data(kIdx).FlatTo1D<gpu, IType>(),
-                 rhs.aux_data(kIdx).FlatTo1D<gpu, IType>(), s);
+                 rhs.aux_data(kIdx).FlatTo1D<gpu, IType>(),
+                 s);
           }
         } else {
           FillZerosRspImpl(s, output);
@@ -166,14 +184,14 @@ void ElemwiseBinaryOp::RspRspOp(mshadow::Stream<gpu> *s,
 }
 
 /*! \brief DNS -op- CSR binary operator for non-canonical NDArray */
-template<typename OP>
-void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<gpu> *s,
-                                   const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const NDArray &dns,
-                                   const NDArray &csr,
+template <typename OP>
+void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<gpu>* s,
+                                   const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const NDArray& dns,
+                                   const NDArray& csr,
                                    const OpReqType req,
-                                   const NDArray &output,
+                                   const NDArray& output,
                                    const bool reverse) {
   using namespace mshadow;
   using namespace mxnet_op;
@@ -181,36 +199,52 @@ void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<gpu> *s,
   CHECK_EQ(csr.storage_type(), kCSRStorage);
   CHECK(req != kAddTo);
   CHECK(req != kNullOp);
-  const bool supported_op = std::is_same<OP, mshadow_op::minus>::value ||
-                            std::is_same<OP, mshadow_op::plus>::value;
+  const bool supported_op =
+      std::is_same<OP, mshadow_op::minus>::value || std::is_same<OP, mshadow_op::plus>::value;
   CHECK(supported_op == true);
   const nnvm::dim_t num_csr_rows = csr.shape()[0];
   const nnvm::dim_t num_csr_cols = csr.shape()[1];
-  TBlob csr_data = csr.data();
-  TBlob csr_indices = csr.aux_data(csr::kIdx);
-  TBlob csr_indptr = csr.aux_data(csr::kIndPtr);
+  TBlob csr_data                 = csr.data();
+  TBlob csr_indices              = csr.aux_data(csr::kIdx);
+  TBlob csr_indptr               = csr.aux_data(csr::kIndPtr);
   MSHADOW_SGL_DBL_TYPE_SWITCH(csr_data.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(csr_indices.type_flag_, IType, {
       MSHADOW_IDX_TYPE_SWITCH(csr_indptr.type_flag_, CType, {
         MXNET_ASSIGN_REQ_SWITCH(req, Req, {
           if (reverse && std::is_same<OP, mshadow_op::minus>::value) {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::negation, Req>, gpu>::Launch(
-              s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
-            if (!csr.storage_initialized()) { return; }
+                s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+            if (!csr.storage_initialized()) {
+              return;
+            }
             mxnet_op::Kernel<ElemwiseDnsCsrDnsWarpKernel<Req, mshadow_op::plus>, gpu>::Launch(
-              s, kWarpSize * num_csr_rows, output.data().dptr<DType>(),
-              output.data().dptr<DType>(), csr_data.dptr<DType>(), csr_indices.dptr<IType>(),
-              csr_indptr.dptr<CType>(), num_csr_rows, num_csr_cols);
+                s,
+                kWarpSize * num_csr_rows,
+                output.data().dptr<DType>(),
+                output.data().dptr<DType>(),
+                csr_data.dptr<DType>(),
+                csr_indices.dptr<IType>(),
+                csr_indptr.dptr<CType>(),
+                num_csr_rows,
+                num_csr_cols);
           } else {
             if (req == kWriteTo) {
               mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, gpu>::Launch(
-                s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+                  s, output.data().Size(), output.data().dptr<DType>(), dns.data().dptr<DType>());
+            }
+            if (!csr.storage_initialized()) {
+              return;
             }
-            if (!csr.storage_initialized()) { return; }
             mxnet_op::Kernel<ElemwiseDnsCsrDnsWarpKernel<Req, OP>, gpu>::Launch(
-              s, kWarpSize * num_csr_rows, output.data().dptr<DType>(),
-              output.data().dptr<DType>(), csr_data.dptr<DType>(), csr_indices.dptr<IType>(),
-              csr_indptr.dptr<CType>(), num_csr_rows, num_csr_cols);
+                s,
+                kWarpSize * num_csr_rows,
+                output.data().dptr<DType>(),
+                output.data().dptr<DType>(),
+                csr_data.dptr<DType>(),
+                csr_indices.dptr<IType>(),
+                csr_indptr.dptr<CType>(),
+                num_csr_rows,
+                num_csr_cols);
           }
         });
       });
@@ -219,47 +253,41 @@ void ElemwiseBinaryOp::DnsCsrDnsOp(mshadow::Stream<gpu> *s,
 }
 
 NNVM_REGISTER_OP(elemwise_add)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"add"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", ElemwiseBinaryOp::ComputeEx<gpu, op::mshadow_op::plus>);
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"add"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>",
+                          ElemwiseBinaryOp::ComputeEx<gpu, op::mshadow_op::plus>);
 
-NNVM_REGISTER_OP(_grad_add)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"add"});
+NNVM_REGISTER_OP(_grad_add).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"add"});
 
 NNVM_REGISTER_OP(_backward_add)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCBwdUseNone{"identity", "identity"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseNone{"identity", "identity"});
 
 NNVM_REGISTER_OP(elemwise_sub)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"sub"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", ElemwiseBinaryOp::ComputeEx<gpu, op::mshadow_op::minus>);
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"sub"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>",
+                          ElemwiseBinaryOp::ComputeEx<gpu, op::mshadow_op::minus>);
 
 NNVM_REGISTER_OP(_backward_sub)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCBwdUseNone{"identity", "negation"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseNone{"identity", "negation"});
 
 NNVM_REGISTER_OP(elemwise_mul)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"mul"})
-.set_attr<FComputeEx>("FComputeEx<gpu>",
-  ElemwiseBinaryOp::ComputeDnsLRValueEx<gpu, op::mshadow_op::mul, true, true>);
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"mul"})
+    .set_attr<FComputeEx>(
+        "FComputeEx<gpu>",
+        ElemwiseBinaryOp::ComputeDnsLRValueEx<gpu, op::mshadow_op::mul, true, true>);
 
 NNVM_REGISTER_OP(_backward_mul)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCBwdUseIn{"right", "left"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"right", "left"});
 
-NNVM_REGISTER_OP(elemwise_div)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCCompute{"div"});
+NNVM_REGISTER_OP(elemwise_div).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"div"});
 
 NNVM_REGISTER_OP(_backward_div)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCBwdUseIn{"div_grad", "div_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"div_grad", "div_rgrad"});
 
-NNVM_REGISTER_OP(_mod)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"mod"});
+NNVM_REGISTER_OP(_mod).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"mod"});
 
 NNVM_REGISTER_OP(_backward_mod)
-.set_attr<FCompute>("FCompute<gpu>",
-  ElemwiseBinaryRTCBwdUseIn{"mod_grad", "mod_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"mod_grad", "mod_rgrad"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_op_extended.cc b/src/operator/tensor/elemwise_binary_op_extended.cc
index 53c0b5c057dc..ed778bb8221c 100644
--- a/src/operator/tensor/elemwise_binary_op_extended.cc
+++ b/src/operator/tensor/elemwise_binary_op_extended.cc
@@ -28,67 +28,70 @@
 namespace mxnet {
 namespace op {
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_power, mshadow_op::power)
-.add_alias("_Power")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_power"});
+    .add_alias("_Power")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_power"});
 
 NNVM_REGISTER_OP(_backward_power)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<
-  cpu, mshadow_op::power_grad, mshadow_op::power_rgrad>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::power_grad, mshadow_op::power_rgrad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_maximum, mshadow_op::maximum)
-.add_alias("_Maximum")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_maximum"});
+    .add_alias("_Maximum")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_maximum"});
 
 NNVM_REGISTER_OP(_backward_maximum)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::ge,
-  mshadow_op::lt>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::ge, mshadow_op::lt>);
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_minimum, mshadow_op::minimum)
-.add_alias("_Minimum")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_minimum"});
+    .add_alias("_Minimum")
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_minimum"});
 
 NNVM_REGISTER_OP(_backward_minimum)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> >{{0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::le,
-  mshadow_op::gt>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::BackwardUseIn<cpu, mshadow_op::le, mshadow_op::gt>);
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_hypot, mshadow_op::hypot)
-.add_alias("_Hypot")
-.describe(R"code(Given the "legs" of a right triangle, return its hypotenuse.
+    .add_alias("_Hypot")
+    .describe(R"code(Given the "legs" of a right triangle, return its hypotenuse.
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_hypot" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_hypot"});
 
 NNVM_REGISTER_OP(_backward_hypot)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs &attrs) {
-                                  return std::vector<std::pair<int, int> > {{0, 1}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::BackwardUseIn<cpu,
-  mshadow_op::hypot_grad_left, mshadow_op::hypot_grad_right>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 1}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::BackwardUseIn<cpu,
+                                                        mshadow_op::hypot_grad_left,
+                                                        mshadow_op::hypot_grad_right>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_op_extended.cu b/src/operator/tensor/elemwise_binary_op_extended.cu
index 9d568a404f3d..2bfcb93a403a 100644
--- a/src/operator/tensor/elemwise_binary_op_extended.cu
+++ b/src/operator/tensor/elemwise_binary_op_extended.cu
@@ -26,30 +26,26 @@
 
 namespace mxnet {
 namespace op {
-NNVM_REGISTER_OP(_power)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"power"});
+NNVM_REGISTER_OP(_power).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"power"});
 
 NNVM_REGISTER_OP(_backward_power)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"power_grad", "power_rgrad"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"power_grad", "power_rgrad"});
 
-NNVM_REGISTER_OP(_maximum)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"max"});
+NNVM_REGISTER_OP(_maximum).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"max"});
 
 NNVM_REGISTER_OP(_backward_maximum)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"greater_equal", "less"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"greater_equal", "less"});
 
-NNVM_REGISTER_OP(_minimum)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"min"});
+NNVM_REGISTER_OP(_minimum).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"min"});
 
 NNVM_REGISTER_OP(_backward_minimum)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"less_equal", "greater"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"less_equal", "greater"});
 
-NNVM_REGISTER_OP(_hypot)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"hypot"});
+NNVM_REGISTER_OP(_hypot).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"hypot"});
 
 NNVM_REGISTER_OP(_backward_hypot)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCBwdUseIn{"hypot_grad_left",
-                                                               "hypot_grad_right"});
+    .set_attr<FCompute>("FCompute<gpu>",
+                        ElemwiseBinaryRTCBwdUseIn{"hypot_grad_left", "hypot_grad_right"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_op_logic.cc b/src/operator/tensor/elemwise_binary_op_logic.cc
index a6f61c2f03d8..d911637d3d80 100644
--- a/src/operator/tensor/elemwise_binary_op_logic.cc
+++ b/src/operator/tensor/elemwise_binary_op_logic.cc
@@ -28,49 +28,49 @@
 namespace mxnet {
 namespace op {
 MXNET_OPERATOR_REGISTER_BINARY(_equal)
-.add_alias("_Equal")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::eq>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Equal")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::eq>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_not_equal)
-.add_alias("_Not_Equal")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::ne>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Not_Equal")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::ne>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_greater)
-.add_alias("_Greater")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::gt>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Greater")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::gt>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_greater_equal)
-.add_alias("_Greater_Equal")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::ge>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Greater_Equal")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::ge>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_lesser)
-.add_alias("_Lesser")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::lt>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Lesser")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::lt>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_lesser_equal)
-.add_alias("_Lesser_Equal")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::le>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Lesser_Equal")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::le>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_logical_and)
-.add_alias("_Logical_And")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::logical_and>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Logical_And")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::logical_and>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_logical_or)
-.add_alias("_Logical_Or")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::logical_or>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Logical_Or")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::logical_or>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_BINARY(_logical_xor)
-.add_alias("_Logical_Xor")
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::logical_xor>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .add_alias("_Logical_Xor")
+    .set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu, mshadow_op::logical_xor>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_op_logic.cu b/src/operator/tensor/elemwise_binary_op_logic.cu
index 8ef84130c5e5..669ed1ff61ed 100644
--- a/src/operator/tensor/elemwise_binary_op_logic.cu
+++ b/src/operator/tensor/elemwise_binary_op_logic.cu
@@ -26,32 +26,29 @@
 
 namespace mxnet {
 namespace op {
-NNVM_REGISTER_OP(_equal)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"equal"});
+NNVM_REGISTER_OP(_equal).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"equal"});
 
 NNVM_REGISTER_OP(_not_equal)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"not_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"not_equal"});
 
-NNVM_REGISTER_OP(_greater)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"greater"});
+NNVM_REGISTER_OP(_greater).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"greater"});
 
 NNVM_REGISTER_OP(_greater_equal)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"greater_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"greater_equal"});
 
-NNVM_REGISTER_OP(_lesser)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"less"});
+NNVM_REGISTER_OP(_lesser).set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"less"});
 
 NNVM_REGISTER_OP(_lesser_equal)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"less_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"less_equal"});
 
 NNVM_REGISTER_OP(_logical_and)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"logical_and"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"logical_and"});
 
 NNVM_REGISTER_OP(_logical_or)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"logical_or"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"logical_or"});
 
 NNVM_REGISTER_OP(_logical_xor)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"logical_xor"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"logical_xor"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_scalar_op.cc b/src/operator/tensor/elemwise_binary_scalar_op.cc
index d7fde47fe3d1..36ad611e5f79 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op.cc
+++ b/src/operator/tensor/elemwise_binary_scalar_op.cc
@@ -30,8 +30,8 @@ namespace op {
 #if MXNET_USE_CUDA
 
 struct binary_scalar_kernel_params {
-  const void *inputs[2];
-  void *outputs[1];
+  const void* inputs[2];
+  void* outputs[1];
   double scalar;
 };
 
@@ -97,30 +97,31 @@ void BinaryScalarRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
                                         const std::vector<OpReqType>& req,
                                         const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-  const double alpha = param.scalar;
+  const double alpha                  = param.scalar;
 
-  const std::string code = std::string("const OpReqType req = ") +
-                           util::to_string(req[0]) +
-                           ";\n" +
-                           "#define OP op::" +
-                           OP +
-                           "\n";
+  const std::string code = std::string("const OpReqType req = ") + util::to_string(req[0]) + ";\n" +
+                           "#define OP op::" + OP + "\n";
   const int nvec = common::mshadow_type_info(outputs[0].type_flag_).size == 8 ? 2 : 4;
 
-  const index_t size = outputs[0].Size();
-  binary_scalar_kernel_params params = { {inputs[0].dptr_, nullptr},
-                                         {outputs[0].dptr_},
-                                         alpha };
-
-  VectorizedKernelRTCLauncher(code, "binary_scalar_kernel",
-                              binary_scalar_kernel_fwd, nvec,
-                              size, 1, s, params,
-                              inputs, outputs,
+  const index_t size                 = outputs[0].Size();
+  binary_scalar_kernel_params params = {{inputs[0].dptr_, nullptr}, {outputs[0].dptr_}, alpha};
+
+  VectorizedKernelRTCLauncher(code,
+                              "binary_scalar_kernel",
+                              binary_scalar_kernel_fwd,
+                              nvec,
+                              size,
+                              1,
+                              s,
+                              params,
+                              inputs,
+                              outputs,
                               ctx.run_ctx.get_ctx().dev_id);
 }
 
@@ -136,9 +137,9 @@ void BinaryScalarRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   InitStorageGeometry<1, 1>(attrs, inputs, outputs);
   CHECK_NE(outputs[0].storage_type(), kDefaultStorage)
-    << "This function works only for sparse types.";
+      << "This function works only for sparse types.";
   CHECK_EQ(inputs[0].storage_type(), outputs[0].storage_type())
-    << "The storage type of both inputs and outputs needs to be the same.";
+      << "The storage type of both inputs and outputs needs to be the same.";
   AllocateGeometry(&outputs[0], req[0], &inputs[0]);
   CopyGeometryBlobs<gpu>(ctx.get_stream<gpu>(), &outputs[0], req[0], inputs[0]);
   outputs[0].CheckAndAllocData(inputs[0].storage_shape());
@@ -146,10 +147,10 @@ void BinaryScalarRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
     std::vector<TBlob> in_blobs, out_blobs;
     in_blobs.reserve(inputs.size());
     out_blobs.reserve(outputs.size());
-    for (auto &input : inputs) {
+    for (auto& input : inputs) {
       in_blobs.emplace_back(input.data());
     }
-    for (auto &output : outputs) {
+    for (auto& output : outputs) {
       out_blobs.emplace_back(output.data());
     }
     this->operator()(attrs, ctx, in_blobs, req, out_blobs);
@@ -224,30 +225,34 @@ void BinaryScalarRTCBackward::operator()(const nnvm::NodeAttrs& attrs,
                                          const std::vector<OpReqType>& req,
                                          const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-  const double alpha = param.scalar;
+  const double alpha                  = param.scalar;
 
-  const std::string code = std::string("const OpReqType req = ") +
-                           util::to_string(req[0]) +
+  const std::string code = std::string("const OpReqType req = ") + util::to_string(req[0]) +
                            ";\n"
                            "#define OP op::" +
-                           OP +
-                           "\n";
+                           OP + "\n";
   const int nvec = outputs[0].type_flag_ == mshadow::kFloat64 ? 2 : 4;
 
-  const index_t size = outputs[0].Size();
-  binary_scalar_kernel_params params = { {inputs[0].dptr_, inputs[1].dptr_},
-                                         {outputs[0].dptr_},
-                                         alpha };
-
-  VectorizedKernelRTCLauncher(code, "binary_scalar_kernel_bwd",
-                              binary_scalar_kernel_bwd, nvec,
-                              size, 1, s, params,
-                              inputs, outputs,
+  const index_t size                 = outputs[0].Size();
+  binary_scalar_kernel_params params = {
+      {inputs[0].dptr_, inputs[1].dptr_}, {outputs[0].dptr_}, alpha};
+
+  VectorizedKernelRTCLauncher(code,
+                              "binary_scalar_kernel_bwd",
+                              binary_scalar_kernel_bwd,
+                              nvec,
+                              size,
+                              1,
+                              s,
+                              params,
+                              inputs,
+                              outputs,
                               ctx.run_ctx.get_ctx().dev_id);
 }
 
diff --git a/src/operator/tensor/elemwise_binary_scalar_op.h b/src/operator/tensor/elemwise_binary_scalar_op.h
index 13d147bc698c..9c19b163d61d 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op.h
+++ b/src/operator/tensor/elemwise_binary_scalar_op.h
@@ -41,12 +41,9 @@ struct NumpyBinaryScalarParam : public dmlc::Parameter<NumpyBinaryScalarParam> {
   double scalar;
   bool is_int;
   DMLC_DECLARE_PARAMETER(NumpyBinaryScalarParam) {
-    DMLC_DECLARE_FIELD(scalar)
-    .set_default(1)
-    .describe("Scalar input value");
-    DMLC_DECLARE_FIELD(is_int)
-    .set_default(true)
-    .describe("Indicate whether scalar input is int type");
+    DMLC_DECLARE_FIELD(scalar).set_default(1).describe("Scalar input value");
+    DMLC_DECLARE_FIELD(is_int).set_default(true).describe(
+        "Indicate whether scalar input is int type");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -59,12 +56,12 @@ struct NumpyBinaryScalarParam : public dmlc::Parameter<NumpyBinaryScalarParam> {
 };
 
 inline bool NumpyBinaryScalarType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int>* in_attrs,
-                           std::vector<int>* out_attrs) {
+                                  std::vector<int>* in_attrs,
+                                  std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-  bool scalar_is_int = param.is_int;
+  bool scalar_is_int                  = param.is_int;
   if (common::is_int(in_attrs->at(0)) && !scalar_is_int) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kFloat64);
   } else if (in_attrs->at(0) == mshadow::kBool) {
@@ -78,31 +75,31 @@ inline bool NumpyBinaryScalarType(const nnvm::NodeAttrs& attrs,
 
 class BinaryScalarOp : public UnaryOp {
   /*! \brief Tensor operation against a scalar with a dense result */
-  template<typename OP, typename DType, typename IType>
-  static void ComputeExDenseResultRsp(mshadow::Stream<cpu> *stream,
-                                      const nnvm::NodeAttrs &attrs,
-                                      const OpContext &ctx,
-                                      const NDArray &input,
+  template <typename OP, typename DType, typename IType>
+  static void ComputeExDenseResultRsp(mshadow::Stream<cpu>* stream,
+                                      const nnvm::NodeAttrs& attrs,
+                                      const OpContext& ctx,
+                                      const NDArray& input,
                                       const OpReqType req,
-                                      const NDArray &output) {
+                                      const NDArray& output) {
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    const double alpha = param.scalar;
+    const double alpha                  = param.scalar;
     CHECK_EQ(output.shape(), input.shape());
-    const int64_t row_count = output.shape()[0];
-    const int64_t items_per_row = output.shape().Size() / row_count;
-    const DType result_for_zero = OP::Map(DType(0), DType(alpha));
-    mshadow::Tensor<cpu, 1, DType> input_data = input.data().FlatTo1D<cpu, DType>(stream);
+    const int64_t row_count                    = output.shape()[0];
+    const int64_t items_per_row                = output.shape().Size() / row_count;
+    const DType result_for_zero                = OP::Map(DType(0), DType(alpha));
+    mshadow::Tensor<cpu, 1, DType> input_data  = input.data().FlatTo1D<cpu, DType>(stream);
     mshadow::Tensor<cpu, 1, DType> output_data = output.data().FlatTo1D<cpu, DType>(stream);
-    const int64_t sparse_row_count = input.aux_shape(rowsparse::kIdx).Size();
+    const int64_t sparse_row_count             = input.aux_shape(rowsparse::kIdx).Size();
     if (sparse_row_count != row_count) {
-      mshadow::Tensor<cpu, 1, IType> row_indexes = input.aux_data(
-        rowsparse::kIdx).FlatTo1D<cpu, IType>(stream);
-      int64_t input_iter = 0;
-      int64_t output_row = 0;
+      mshadow::Tensor<cpu, 1, IType> row_indexes =
+          input.aux_data(rowsparse::kIdx).FlatTo1D<cpu, IType>(stream);
+      int64_t input_iter   = 0;
+      int64_t output_row   = 0;
       IType next_input_row = 0;
       while (output_row < row_count) {
-        next_input_row = input_iter < sparse_row_count ? int64_t(row_indexes[input_iter])
-                                                       : row_count;
+        next_input_row =
+            input_iter < sparse_row_count ? int64_t(row_indexes[input_iter]) : row_count;
         // Split up into blocks of contiguous data and do those together
 
         // Do contiguous dense blocks
@@ -110,10 +107,10 @@ class BinaryScalarOp : public UnaryOp {
         if (dense_block_count > 0) {
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, cpu>::Launch(
-              stream,
-              items_per_row * dense_block_count,
-              output_data.dptr_ + items_per_row * output_row,
-              result_for_zero);
+                stream,
+                items_per_row * dense_block_count,
+                output_data.dptr_ + items_per_row * output_row,
+                result_for_zero);
           });
           output_row += dense_block_count;
           continue;
@@ -122,8 +119,8 @@ class BinaryScalarOp : public UnaryOp {
         // Do contiguous sparse blocks
         int64_t next_non_contiguous_sparse = input_iter;
         while (next_non_contiguous_sparse < sparse_row_count - 1) {
-          if (row_indexes[next_non_contiguous_sparse + 1]
-              != row_indexes[next_non_contiguous_sparse] + 1) {
+          if (row_indexes[next_non_contiguous_sparse + 1] !=
+              row_indexes[next_non_contiguous_sparse] + 1) {
             break;
           }
           ++next_non_contiguous_sparse;
@@ -132,11 +129,11 @@ class BinaryScalarOp : public UnaryOp {
         if (sparse_block_count > 0) {
           MXNET_ASSIGN_REQ_SWITCH(req, Req, {
             mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, cpu>::Launch(
-              stream,
-              items_per_row * sparse_block_count,
-              &output_data.dptr_[items_per_row * output_row],
-              &input_data.dptr_[items_per_row * input_iter],
-              DType(alpha));
+                stream,
+                items_per_row * sparse_block_count,
+                &output_data.dptr_[items_per_row * output_row],
+                &input_data.dptr_[items_per_row * input_iter],
+                DType(alpha));
           });
           output_row += sparse_block_count;
           input_iter += sparse_block_count;
@@ -148,80 +145,75 @@ class BinaryScalarOp : public UnaryOp {
       // things to call GPU kernels because we don't need to access row indices)
       MXNET_ASSIGN_REQ_SWITCH(req, Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, cpu>::Launch(
-          stream,
-          items_per_row * row_count,
-          output_data.dptr_,
-          input_data.dptr_,
-          DType(alpha));
+            stream, items_per_row * row_count, output_data.dptr_, input_data.dptr_, DType(alpha));
       });
     }
   }
 
   /*! \brief Tensor operation against a scalar with a dense result */
-  template<typename OP, typename DType, typename IType>
-  static void ComputeExDenseResultRsp(mshadow::Stream<gpu> *stream,
-                                      const nnvm::NodeAttrs &attrs,
-                                      const OpContext &ctx,
-                                      const NDArray &input,
+  template <typename OP, typename DType, typename IType>
+  static void ComputeExDenseResultRsp(mshadow::Stream<gpu>* stream,
+                                      const nnvm::NodeAttrs& attrs,
+                                      const OpContext& ctx,
+                                      const NDArray& input,
                                       const OpReqType req,
-                                      const NDArray &output) {
+                                      const NDArray& output) {
     LOG(FATAL) << "NOT IMPLEMENTED";
   }
 
   /*! \brief Tensor operation against a scalar with a dense result */
-  template<typename OP, typename DType, typename IType, typename CType>
-  static void ComputeExDenseResultCsr(mshadow::Stream<cpu> *stream,
-                                      const nnvm::NodeAttrs &attrs,
-                                      const OpContext &ctx,
-                                      const NDArray &input,
+  template <typename OP, typename DType, typename IType, typename CType>
+  static void ComputeExDenseResultCsr(mshadow::Stream<cpu>* stream,
+                                      const nnvm::NodeAttrs& attrs,
+                                      const OpContext& ctx,
+                                      const NDArray& input,
                                       const OpReqType req,
-                                      const NDArray &output) {
+                                      const NDArray& output) {
     CHECK_EQ(output.shape(), input.shape());
 
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    const double alpha = param.scalar;
-    const DType dense_fill_val = OP::Map(DType(0), DType(alpha));
-    const TBlob  column_indexes = input.aux_data(csr::kIdx);
-    const size_t item_count = column_indexes.Size();
+    const double alpha                  = param.scalar;
+    const DType dense_fill_val          = OP::Map(DType(0), DType(alpha));
+    const TBlob column_indexes          = input.aux_data(csr::kIdx);
+    const size_t item_count             = column_indexes.Size();
 
     // Pre-fill dense with 0-input/output value
-    FillDense<DType>(stream, output.shape().Size(), dense_fill_val,
-                     req, output.data().dptr<DType>());
+    FillDense<DType>(
+        stream, output.shape().Size(), dense_fill_val, req, output.data().dptr<DType>());
 
     mshadow::Tensor<cpu, 2, DType> out = AsRowise2D<DType>(stream, output.data());
     if (item_count) {
-      const DType *in = input.data().dptr<DType>();
-      const IType *column_indexes_ptr = column_indexes.dptr<IType>();
+      const DType* in                 = input.data().dptr<DType>();
+      const IType* column_indexes_ptr = column_indexes.dptr<IType>();
 
-      const auto row_count = static_cast<size_t>(input.shape()[0]);
-      const TBlob row_starts = input.aux_data(csr::kIndPtr);
-      const CType *row_starts_ptr = row_starts.dptr<CType>();
+      const auto row_count        = static_cast<size_t>(input.shape()[0]);
+      const TBlob row_starts      = input.aux_data(csr::kIndPtr);
+      const CType* row_starts_ptr = row_starts.dptr<CType>();
 
-      #pragma omp parallel for
+#pragma omp parallel for
       for (int i = 0; i < static_cast<int>(row_count); ++i) {
         const bool last_row = i == static_cast<int>(row_count) - 1;
         // Split up into blocks of contiguous data and do those together
         const size_t row_item_start_iter = row_starts_ptr[i];
-        const size_t input_items_this_row = !last_row
-                                            ? static_cast<size_t>(row_starts_ptr[i + 1])
-                                              - row_item_start_iter
-                                            : item_count - row_item_start_iter;
+        const size_t input_items_this_row =
+            !last_row ? static_cast<size_t>(row_starts_ptr[i + 1]) - row_item_start_iter
+                      : item_count - row_item_start_iter;
         if (input_items_this_row) {
-          const IType *this_row_column_indexes = column_indexes_ptr + row_item_start_iter;
-          const DType *row_data_start = in + row_item_start_iter;
-          DType *output_this_row = out[i].dptr_;
+          const IType* this_row_column_indexes = column_indexes_ptr + row_item_start_iter;
+          const DType* row_data_start          = in + row_item_start_iter;
+          DType* output_this_row               = out[i].dptr_;
           // More overhead to use OMP for small loops, so don't
           if (input_items_this_row > 1000) {
-            #pragma omp parallel for
+#pragma omp parallel for
             for (CType j = 0; j < static_cast<CType>(input_items_this_row); ++j) {
-              const IType col = this_row_column_indexes[j];
-              const DType val = row_data_start[j];
+              const IType col      = this_row_column_indexes[j];
+              const DType val      = row_data_start[j];
               output_this_row[col] = OP::Map(val, DType(alpha));
             }
           } else {
             for (CType j = 0; j < static_cast<CType>(input_items_this_row); ++j) {
-              const IType col = this_row_column_indexes[j];
-              const DType val = row_data_start[j];
+              const IType col      = this_row_column_indexes[j];
+              const DType val      = row_data_start[j];
               output_this_row[col] = OP::Map(val, DType(alpha));
             }
           }
@@ -231,23 +223,23 @@ class BinaryScalarOp : public UnaryOp {
   }
 
   /*! \brief Tensor operation against a scalar with a dense result */
-  template<typename OP, typename DType, typename IType, typename CType>
-  static void ComputeExDenseResultCsr(mshadow::Stream<gpu> *stream,
-                                      const nnvm::NodeAttrs &attrs,
-                                      const OpContext &ctx,
-                                      const NDArray &input,
+  template <typename OP, typename DType, typename IType, typename CType>
+  static void ComputeExDenseResultCsr(mshadow::Stream<gpu>* stream,
+                                      const nnvm::NodeAttrs& attrs,
+                                      const OpContext& ctx,
+                                      const NDArray& input,
                                       const OpReqType req,
-                                      const NDArray &output) {
+                                      const NDArray& output) {
     LOG(FATAL) << "NOT IMPLEMENTED";
   }
 
-  template<typename xpu, typename OP, typename DType, typename IType>
-  static void ComputeExDenseResult(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const NDArray &input,
+  template <typename xpu, typename OP, typename DType, typename IType>
+  static void ComputeExDenseResult(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const NDArray& input,
                                    const OpReqType req,
                                    const NDArray output) {
-    mshadow::Stream<xpu> *stream = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* stream = ctx.get_stream<xpu>();
     CHECK_EQ(output.storage_type(), kDefaultStorage);
     switch (input.storage_type()) {
       case kRowSparseStorage: {
@@ -267,21 +259,21 @@ class BinaryScalarOp : public UnaryOp {
   }
 
  public:
-  template<typename OP>
-  static void Compute_(const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
+  template <typename OP>
+  static void Compute_(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
                        mshadow::Stream<cpu>* s,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
     DCHECK_EQ(inputs.size(), 1);
     DCHECK_EQ(outputs.size(), 1);
     using namespace mshadow;
     using namespace mshadow::expr;
     TBlob temp_tblob;
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    bool scalar_is_int = param.is_int;
-    const double alpha = param.scalar;
+    bool scalar_is_int                  = param.is_int;
+    const double alpha                  = param.scalar;
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       if ((common::is_int(inputs[0].type_flag_) && !scalar_is_int) ||
           (inputs[0].type_flag_ == kBool)) {
@@ -294,56 +286,56 @@ class BinaryScalarOp : public UnaryOp {
       }
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, cpu>::Launch(
-          s, inputs[0].Size(), outputs[0].dptr<DType>(), temp_tblob.dptr<DType>(), DType(alpha));
+            s, inputs[0].Size(), outputs[0].dptr<DType>(), temp_tblob.dptr<DType>(), DType(alpha));
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void Compute(const nnvm::NodeAttrs &attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename OP>
+  static void Compute(const nnvm::NodeAttrs& attrs,
+                      const OpContext& ctx,
+                      const std::vector<TBlob>& inputs,
+                      const std::vector<OpReqType>& req,
+                      const std::vector<TBlob>& outputs) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     Compute_<OP>(attrs, ctx, s, inputs, req, outputs);
   }
 
-  template<typename xpu, typename OP>
-  static void ComputeInt(const nnvm::NodeAttrs &attrs,
-                         const OpContext &ctx,
-                         const std::vector<TBlob> &inputs,
-                         const std::vector<OpReqType> &req,
-                         const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void ComputeInt(const nnvm::NodeAttrs& attrs,
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
     DCHECK_EQ(inputs.size(), 1);
     DCHECK_EQ(outputs.size(), 1);
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s                      = ctx.get_stream<xpu>();
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    const double alpha = param.scalar;
+    const double alpha                  = param.scalar;
     MXNET_INT_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
-          s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), DType(alpha));
+            s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>(), DType(alpha));
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void ComputeLogic(const nnvm::NodeAttrs &attrs,
-                      const OpContext &ctx,
-                      const std::vector<TBlob> &inputs,
-                      const std::vector<OpReqType> &req,
-                      const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void ComputeLogic(const nnvm::NodeAttrs& attrs,
+                           const OpContext& ctx,
+                           const std::vector<TBlob>& inputs,
+                           const std::vector<OpReqType>& req,
+                           const std::vector<TBlob>& outputs) {
     DCHECK_EQ(inputs.size(), 1);
     DCHECK_EQ(outputs.size(), 1);
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s                      = ctx.get_stream<xpu>();
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    bool scalar_is_int = param.is_int;
-    const double alpha = param.scalar;
+    bool scalar_is_int                  = param.is_int;
+    const double alpha                  = param.scalar;
     TBlob temp_tblob;
     if (common::is_int(inputs[0].type_flag_) && !scalar_is_int) {
       Tensor<xpu, 1, double> temp_tensor =
@@ -361,15 +353,15 @@ class BinaryScalarOp : public UnaryOp {
     });
   }
 
-  template<typename xpu, typename OP>
-  static void ComputeEx(const nnvm::NodeAttrs &attrs,
-                        const OpContext &ctx,
-                        const std::vector<NDArray> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<NDArray> &outputs) {
+  template <typename xpu, typename OP>
+  static void ComputeEx(const nnvm::NodeAttrs& attrs,
+                        const OpContext& ctx,
+                        const std::vector<NDArray>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<NDArray>& outputs) {
     DCHECK_EQ(inputs.size(), 1);
     DCHECK_EQ(outputs.size(), 1);
-    const auto in_stype = inputs[0].storage_type();
+    const auto in_stype  = inputs[0].storage_type();
     const auto out_stype = outputs[0].storage_type();
     if (req[0] == kNullOp) {
       return;
@@ -379,7 +371,7 @@ class BinaryScalarOp : public UnaryOp {
       // csr -> csr, or rsp -> rsp
       UnaryOp::MapToFCompute<xpu>(attrs, ctx, inputs, req, outputs, Compute<xpu, OP>);
     } else if (out_stype == kDefaultStorage &&
-              (in_stype == kRowSparseStorage || in_stype == kCSRStorage)) {
+               (in_stype == kRowSparseStorage || in_stype == kCSRStorage)) {
       MSHADOW_TYPE_SWITCH(outputs[0].data().type_flag_, DType, {
         MSHADOW_IDX_TYPE_SWITCH(inputs[0].aux_type(rowsparse::kIdx), IType, {
           ComputeExDenseResult<xpu, OP, DType, IType>(attrs, ctx, inputs[0], req[0], outputs[0]);
@@ -390,15 +382,15 @@ class BinaryScalarOp : public UnaryOp {
     }
   }
 
-  template<typename xpu, typename OP>
-  static void LogicComputeEx(const nnvm::NodeAttrs &attrs,
-                             const OpContext &ctx,
-                             const std::vector<NDArray> &inputs,
-                             const std::vector<OpReqType> &req,
-                             const std::vector<NDArray> &outputs) {
+  template <typename xpu, typename OP>
+  static void LogicComputeEx(const nnvm::NodeAttrs& attrs,
+                             const OpContext& ctx,
+                             const std::vector<NDArray>& inputs,
+                             const std::vector<OpReqType>& req,
+                             const std::vector<NDArray>& outputs) {
     DCHECK_EQ(inputs.size(), 1);
     DCHECK_EQ(outputs.size(), 1);
-    const auto in_stype = inputs[0].storage_type();
+    const auto in_stype  = inputs[0].storage_type();
     const auto out_stype = outputs[0].storage_type();
     if (req[0] == kNullOp) {
       return;
@@ -412,57 +404,61 @@ class BinaryScalarOp : public UnaryOp {
     }
   }
 
-  template<typename OP>
-  static void Backward_(const nnvm::NodeAttrs &attrs,
+  template <typename OP>
+  static void Backward_(const nnvm::NodeAttrs& attrs,
                         mshadow::Stream<cpu>* s,
-                        const std::vector<TBlob> &inputs,
-                        const std::vector<OpReqType> &req,
-                        const std::vector<TBlob> &outputs) {
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
     using namespace mshadow;
     using namespace mshadow::expr;
     const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-    const double alpha = param.scalar;
+    const double alpha                  = param.scalar;
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        mxnet::op::mxnet_op::Kernel<mxnet::op::mxnet_op::op_with_req<
-          mxnet::op::mxnet_op::backward_grad_tuned<OP>, Req>, cpu>::
-          Launch(s, inputs[0].Size(), outputs[0].dptr<DType>(),
-                 inputs[0].dptr<DType>(), inputs[1].dptr<DType>(),
-                 DType(alpha));
+        mxnet::op::mxnet_op::Kernel<
+            mxnet::op::mxnet_op::op_with_req<mxnet::op::mxnet_op::backward_grad_tuned<OP>, Req>,
+            cpu>::Launch(s,
+                         inputs[0].Size(),
+                         outputs[0].dptr<DType>(),
+                         inputs[0].dptr<DType>(),
+                         inputs[1].dptr<DType>(),
+                         DType(alpha));
       });
     });
   }
 
-  template<typename xpu, typename OP>
-  static void Backward(const nnvm::NodeAttrs &attrs,
-                       const OpContext &ctx,
-                       const std::vector<TBlob> &inputs,
-                       const std::vector<OpReqType> &req,
-                       const std::vector<TBlob> &outputs) {
+  template <typename xpu, typename OP>
+  static void Backward(const nnvm::NodeAttrs& attrs,
+                       const OpContext& ctx,
+                       const std::vector<TBlob>& inputs,
+                       const std::vector<OpReqType>& req,
+                       const std::vector<TBlob>& outputs) {
     using namespace mshadow;
     using namespace mshadow::expr;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     Backward_<OP>(attrs, s, inputs, req, outputs);
   }
 };
 
-#define MXNET_OPERATOR_REGISTER_BINARY_SCALAR(name)                       \
-  NNVM_REGISTER_OP(name)                                                  \
-  .set_num_inputs(1)                                                      \
-  .set_num_outputs(1)                                                     \
-  .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                   \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)       \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)        \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                       \
-    [](const NodeAttrs& attrs){                                           \
-      return std::vector<std::pair<int, int> >{{0, 0}};                   \
-    })                                                                    \
-  .set_attr<FResourceRequest>("FResourceRequest",                         \
-    [](const NodeAttrs& attrs) {                                          \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};   \
-    })                                                                    \
-  .add_argument("data", "NDArray-or-Symbol", "source input")              \
-  .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_BINARY_SCALAR(name)                                       \
+  NNVM_REGISTER_OP(name)                                                                  \
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                               \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)                    \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .set_attr<FResourceRequest>(                                                        \
+          "FResourceRequest",                                                             \
+          [](const NodeAttrs& attrs) {                                                    \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};             \
+          })                                                                              \
+      .add_argument("data", "NDArray-or-Symbol", "source input")                          \
+      .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
 
 #if MXNET_USE_CUDA
 
@@ -497,5 +493,4 @@ struct BinaryScalarRTCBackward {
 }  // namespace op
 }  // namespace mxnet
 
-
 #endif  // MXNET_OPERATOR_TENSOR_ELEMWISE_BINARY_SCALAR_OP_H_
diff --git a/src/operator/tensor/elemwise_binary_scalar_op_basic.cc b/src/operator/tensor/elemwise_binary_scalar_op_basic.cc
index 53d38d8f8299..fb599b0d8794 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op_basic.cc
+++ b/src/operator/tensor/elemwise_binary_scalar_op_basic.cc
@@ -26,25 +26,26 @@
 #include "./elemwise_binary_op.h"
 #include "./elemwise_binary_scalar_op.h"
 
-#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SCALAR_SUPPORT_WITH_DENSE_RESULT(name)    \
-  NNVM_REGISTER_OP(name)                                                              \
-  .set_num_inputs(1)                                                                  \
-  .set_num_outputs(1)                                                                 \
-  .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                               \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
-  .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)                    \
-  .set_attr<FInferStorageType>("FInferStorageType",                                   \
-    BinaryScalarStorageTypeWithDenseResultStorageType)                                \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
-    [](const NodeAttrs& attrs){                                                       \
-      return std::vector<std::pair<int, int> >{{0, 0}};                               \
-    })                                                                                \
-  .set_attr<FResourceRequest>("FResourceRequest",                                     \
-    [](const NodeAttrs& attrs) {                                                      \
-      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};               \
-    })                                                                                \
-  .add_argument("data", "NDArray-or-Symbol", "source input")                          \
-  .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+#define MXNET_OPERATOR_REGISTER_BINARY_WITH_SCALAR_SUPPORT_WITH_DENSE_RESULT(name)        \
+  NNVM_REGISTER_OP(name)                                                                  \
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)                               \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", NumpyBinaryScalarType)                    \
+      .set_attr<FInferStorageType>("FInferStorageType",                                   \
+                                   BinaryScalarStorageTypeWithDenseResultStorageType)     \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .set_attr<FResourceRequest>(                                                        \
+          "FResourceRequest",                                                             \
+          [](const NodeAttrs& attrs) {                                                    \
+            return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};             \
+          })                                                                              \
+      .add_argument("data", "NDArray-or-Symbol", "source input")                          \
+      .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
 
 namespace mxnet {
 namespace op {
@@ -58,23 +59,23 @@ static bool BinaryScalarStorageTypeWithDenseResultStorageType(const NodeAttrs& a
                                                               const int dev_mask,
                                                               DispatchMode* dispatch_mode,
                                                               std::vector<int>* in_attrs,
-                                                              std::vector<int>* out_attrs)  {
+                                                              std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
-  bool dispatched = false;
-  const bool invalid_ctx = dev_mask != kCPU;
+  bool dispatched                  = false;
+  const bool invalid_ctx           = dev_mask != kCPU;
   const NDArrayStorageType instype = static_cast<NDArrayStorageType>(in_attrs->at(0));
-  const auto dispatch_ex = invalid_ctx ? DispatchMode::kFComputeFallback
-                                       : DispatchMode::kFComputeEx;
+  const auto dispatch_ex =
+      invalid_ctx ? DispatchMode::kFComputeFallback : DispatchMode::kFComputeEx;
   const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-  const double alpha = param.scalar;
+  const double alpha                  = param.scalar;
   if (common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)) {
-    dispatched = storage_type_assign(&out_attrs[0],
-      kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_attrs[0], kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && (instype == kCSRStorage || instype == kRowSparseStorage)) {
-    dispatched = storage_type_assign(&out_attrs[0], alpha == 0 ? instype : kDefaultStorage,
-      dispatch_mode, dispatch_ex);
+    dispatched = storage_type_assign(
+        &out_attrs[0], alpha == 0 ? instype : kDefaultStorage, dispatch_mode, dispatch_ex);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -85,22 +86,22 @@ static bool BinaryScalarStorageTypeWithDenseResultStorageType(const NodeAttrs& a
 static bool BinaryScalarStorageType(const nnvm::NodeAttrs& attrs,
                                     const int dev_mask,
                                     DispatchMode* dispatch_mode,
-                                    std::vector<int> *in_attrs,
-                                    std::vector<int> *out_attrs) {
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   const auto in_stype = in_attrs->at(0);
-  auto &out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  auto& out_stype     = out_attrs->at(0);
+  bool dispatched     = false;
   if (!dispatched && (in_stype == kDefaultStorage)) {
     // dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && in_stype == kRowSparseStorage) {
     // rsp -> rsp
-    dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        &out_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
     // FComputeEx can handle dns output on cpu, too
     if (dev_mask == cpu::kDevMask && out_stype == kDefaultStorage) {
       DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -109,8 +110,8 @@ static bool BinaryScalarStorageType(const nnvm::NodeAttrs& attrs,
   }
   if (!dispatched && in_stype == kCSRStorage) {
     // csr -> csr
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
     // FComputeEx can handle dns output on cpu, too
     if (dev_mask == cpu::kDevMask && out_stype == kDefaultStorage) {
       DISPATCH_MODE_ASSIGN_CHECK(dispatch_mode, 0, DispatchMode::kFComputeEx);
@@ -124,24 +125,24 @@ static bool BinaryScalarStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SCALAR_SUPPORT_WITH_DENSE_RESULT(_plus_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::plus>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::plus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
-.add_alias("_PlusScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::plus>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::plus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
+    .add_alias("_PlusScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SCALAR_SUPPORT_WITH_DENSE_RESULT(_minus_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::minus>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::minus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
-.add_alias("_MinusScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::minus>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::minus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"})
+    .add_alias("_MinusScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_rminus_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rminus>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"})
-.add_alias("_RMinusScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rminus>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"})
+    .add_alias("_RMinusScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_mul_scalar)
-.describe(R"doc(Multiply an array with a scalar.
+    .describe(R"doc(Multiply an array with a scalar.
 
 ``_mul_scalar`` only operates on data array of input if input is sparse.
 
@@ -150,20 +151,20 @@ i.e. input.data = [5, 6], scalar = nan,
 it will result output.data = [nan, nan] instead of 10000 nans.
 
 )doc" ADD_FILELINE)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::mul>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_mul_scalar"})
-.add_alias("_MulScalar");
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::mul>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_mul_scalar"})
+    .add_alias("_MulScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_backward_mul_scalar)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::mul>);
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::mul>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::mul>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_div_scalar)
-.describe(R"doc(Divide an array with a scalar.
+    .describe(R"doc(Divide an array with a scalar.
 
 ``_div_scalar`` only operates on data array of input if input is sparse.
 
@@ -172,51 +173,47 @@ i.e. input.data = [5, 6], scalar = nan,
 it will result output.data = [nan, nan] instead of 10000 nans.
 
 )doc" ADD_FILELINE)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::div>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::div>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_div_scalar"})
-.add_alias("_DivScalar");
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::div>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::div>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_div_scalar"})
+    .add_alias("_DivScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_backward_div_scalar)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::div>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::div>);
-
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, op::mshadow_op::div>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::ComputeEx<cpu, op::mshadow_op::div>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_rdiv_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rdiv>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rdiv_scalar"})
-.add_alias("_RDivScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rdiv>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rdiv_scalar"})
+    .add_alias("_RDivScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_rdiv_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<
-  cpu, mshadow_op::rdiv_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rdiv_grad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_mod_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::mod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mod_scalar"})
-.add_alias("_ModScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::mod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mod_scalar"})
+    .add_alias("_ModScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_mod_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<
-  cpu, mshadow_op::mod_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::mod_grad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_rmod_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rmod>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rmod_scalar"})
-.add_alias("_RModScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rmod>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rmod_scalar"})
+    .add_alias("_RModScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_rmod_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<
-  cpu, mshadow_op::rmod_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rmod_grad>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_scalar_op_basic.cu b/src/operator/tensor/elemwise_binary_scalar_op_basic.cu
index 9635e83b4453..bdbaba927ae9 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op_basic.cu
+++ b/src/operator/tensor/elemwise_binary_scalar_op_basic.cu
@@ -28,48 +28,43 @@
 
 namespace mxnet {
 namespace op {
-NNVM_REGISTER_OP(_plus_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"add"});
+NNVM_REGISTER_OP(_plus_scalar).set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"add"});
 
-NNVM_REGISTER_OP(_minus_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"sub"});
+NNVM_REGISTER_OP(_minus_scalar).set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"sub"});
 
 NNVM_REGISTER_OP(_rminus_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rsub"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rsub"});
 
 NNVM_REGISTER_OP(_mul_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"mul"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"mul"});
 
 NNVM_REGISTER_OP(_backward_mul_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"mul"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mul"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"mul"});
 
 NNVM_REGISTER_OP(_div_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"div"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"div"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"div"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"div"});
 
 NNVM_REGISTER_OP(_backward_div_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"div"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"div"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"div"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"div"});
 
-NNVM_REGISTER_OP(_rdiv_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rdiv"});
+NNVM_REGISTER_OP(_rdiv_scalar).set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rdiv"});
 
 NNVM_REGISTER_OP(_backward_rdiv_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rdiv_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rdiv_grad"});
 
-NNVM_REGISTER_OP(_mod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mod"});
+NNVM_REGISTER_OP(_mod_scalar).set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"mod"});
 
 NNVM_REGISTER_OP(_backward_mod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"mod_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"mod_grad"});
 
-NNVM_REGISTER_OP(_rmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rmod"});
+NNVM_REGISTER_OP(_rmod_scalar).set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rmod"});
 
 NNVM_REGISTER_OP(_backward_rmod_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rmod_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rmod_grad"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_scalar_op_extended.cc b/src/operator/tensor/elemwise_binary_scalar_op_extended.cc
index 26b572a8ee99..ba467ea734fc 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op_extended.cc
+++ b/src/operator/tensor/elemwise_binary_scalar_op_extended.cc
@@ -29,66 +29,62 @@
 namespace mxnet {
 namespace op {
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_maximum_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::maximum>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_maximum_scalar"})
-.add_alias("_MaximumScalar")
-.add_alias("_npi_maximum_scalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::maximum>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_maximum_scalar"})
+    .add_alias("_MaximumScalar")
+    .add_alias("_npi_maximum_scalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_maximum_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::ge>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::ge>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_minimum_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::minimum>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_minimum_scalar"})
-.add_alias("_MinimumScalar")
-.add_alias("_npi_minimum_scalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::minimum>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_minimum_scalar"})
+    .add_alias("_MinimumScalar")
+    .add_alias("_npi_minimum_scalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_minimum_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::le>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::le>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_power_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::power>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_power_scalar"})
-.add_alias("_PowerScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::power>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_power_scalar"})
+    .add_alias("_PowerScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_power_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<
-  cpu, mshadow_op::power_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::power_grad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_rpower_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<
-  cpu, mshadow_op::rpower>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_rpower_scalar"})
-.add_alias("_RPowerScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::rpower>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_rpower_scalar"})
+    .add_alias("_RPowerScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_rpower_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<
-  cpu, mshadow_op::rpower_grad>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<cpu, mshadow_op::rpower_grad>);
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_hypot_scalar)
-.add_alias("_npi_hypot_scalar")
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<
-  cpu, mshadow_op::hypot>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_hypot_scalar" })
-.add_alias("_HypotScalar");
+    .add_alias("_npi_hypot_scalar")
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::hypot>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_hypot_scalar"})
+    .add_alias("_HypotScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_hypot_scalar)
-.add_arguments(NumpyBinaryScalarParam::__FIELDS__())
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Backward<
-  cpu, mshadow_op::hypot_grad_left>);
+    .add_arguments(NumpyBinaryScalarParam::__FIELDS__())
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryScalarOp::Backward<cpu, mshadow_op::hypot_grad_left>);
 
 NNVM_REGISTER_OP(smooth_l1)
-.add_alias("_npx_smooth_l1")
-.describe(R"code(Calculate Smooth L1 Loss(lhs, scalar) by summing
+    .add_alias("_npx_smooth_l1")
+    .describe(R"code(Calculate Smooth L1 Loss(lhs, scalar) by summing
 
 .. math::
 
@@ -106,24 +102,24 @@ Example::
   smooth_l1([1, 2, 3, 4], scalar=1) = [0.5, 1.5, 2.5, 3.5]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs& attrs){
-                                  return std::vector<std::pair<int, int> >{{0, 0}};
-                                })
-.add_argument("data", "NDArray-or-Symbol", "source input")
-.add_argument("scalar", "float", "scalar input")
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::smooth_l1_loss>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_smooth_l1" });
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .add_argument("data", "NDArray-or-Symbol", "source input")
+    .add_argument("scalar", "float", "scalar input")
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::smooth_l1_loss>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_smooth_l1"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_smooth_l1)
-.set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
-.set_attr<FCompute>("FCompute<cpu>",
-                    BinaryScalarOp::Backward<cpu, mshadow_op::smooth_l1_gradient>);
+    .set_attr_parser(ParamParser<NumpyBinaryScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>",
+                        BinaryScalarOp::Backward<cpu, mshadow_op::smooth_l1_gradient>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_scalar_op_extended.cu b/src/operator/tensor/elemwise_binary_scalar_op_extended.cu
index c662dc2d2923..507fb0b87f7c 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op_extended.cu
+++ b/src/operator/tensor/elemwise_binary_scalar_op_extended.cu
@@ -29,40 +29,40 @@
 namespace mxnet {
 namespace op {
 NNVM_REGISTER_OP(_maximum_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"max"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"max"});
 
 NNVM_REGISTER_OP(_backward_maximum_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"greater_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"greater_equal"});
 
 NNVM_REGISTER_OP(_minimum_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"min"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"min"});
 
 NNVM_REGISTER_OP(_backward_minimum_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"less_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"less_equal"});
 
 NNVM_REGISTER_OP(_power_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"power"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"power"});
 
 NNVM_REGISTER_OP(_backward_power_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"power_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"power_grad"});
 
 NNVM_REGISTER_OP(_rpower_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rpow"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"rpow"});
 
 NNVM_REGISTER_OP(_backward_rpower_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rpower_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"rpower_grad"});
 
 NNVM_REGISTER_OP(_hypot_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"hypot"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"hypot"});
 
 NNVM_REGISTER_OP(_backward_hypot_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"hypot_grad_left"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"hypot_grad_left"});
 
-NNVM_REGISTER_OP(smooth_l1)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"smooth_l1"});
+NNVM_REGISTER_OP(smooth_l1).set_attr<FCompute>("FCompute<gpu>",
+                                               BinaryScalarRTCCompute{"smooth_l1"});
 
 NNVM_REGISTER_OP(_backward_smooth_l1)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"smooth_l1_grad"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCBackward{"smooth_l1_grad"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_scalar_op_logic.cc b/src/operator/tensor/elemwise_binary_scalar_op_logic.cc
index 0594997877d3..346370f538e4 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op_logic.cc
+++ b/src/operator/tensor/elemwise_binary_scalar_op_logic.cc
@@ -29,40 +29,40 @@
 namespace mxnet {
 namespace op {
 
-#define MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(__name$, __kernel$)                      \
-  MXNET_OPERATOR_REGISTER_BINARY_SCALAR(__name$)                                             \
-  .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarLogicStorageType<__kernel$>) \
-  .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, __kernel$>)              \
-  .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::LogicComputeEx<cpu, __kernel$>)
+#define MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(__name$, __kernel$)                          \
+  MXNET_OPERATOR_REGISTER_BINARY_SCALAR(__name$)                                                 \
+      .set_attr<FInferStorageType>("FInferStorageType", BinaryScalarLogicStorageType<__kernel$>) \
+      .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, __kernel$>)              \
+      .set_attr<FComputeEx>("FComputeEx<cpu>", BinaryScalarOp::LogicComputeEx<cpu, __kernel$>)
 
-template<typename OP>
+template <typename OP>
 static bool BinaryScalarLogicStorageType(const nnvm::NodeAttrs& attrs,
                                          const int dev_mask,
                                          DispatchMode* dispatch_mode,
-                                         std::vector<int> *in_attrs,
-                                         std::vector<int> *out_attrs) {
+                                         std::vector<int>* in_attrs,
+                                         std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
-  const auto in_stype = in_attrs->at(0);
-  auto &out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const auto in_stype                 = in_attrs->at(0);
+  auto& out_stype                     = out_attrs->at(0);
+  bool dispatched                     = false;
   const NumpyBinaryScalarParam& param = nnvm::get<NumpyBinaryScalarParam>(attrs.parsed);
-  const double alpha = param.scalar;
-  bool is_sparse = OP::Map(static_cast<double>(0), alpha) == 0;
+  const double alpha                  = param.scalar;
+  bool is_sparse                      = OP::Map(static_cast<double>(0), alpha) == 0;
   if (!dispatched && in_stype == kDefaultStorage) {
     // dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && in_stype == kRowSparseStorage && is_sparse) {
     // rsp -> rsp
-    dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        &out_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched && in_stype == kCSRStorage && is_sparse) {
     // csr -> csr
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -70,45 +70,44 @@ static bool BinaryScalarLogicStorageType(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(_equal_scalar, mshadow_op::eq)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_EqualScalar");
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_EqualScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(_not_equal_scalar, mshadow_op::ne)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_NotEqualScalar");
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_NotEqualScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(_greater_scalar, mshadow_op::gt)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_GreaterScalar");
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_GreaterScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(_greater_equal_scalar, mshadow_op::ge)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_GreaterEqualScalar");
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_GreaterEqualScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(_lesser_scalar, mshadow_op::lt)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_LesserScalar");
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_LesserScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR_LOGIC(_lesser_equal_scalar, mshadow_op::le)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_LesserEqualScalar");
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_LesserEqualScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_logical_and_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::logical_and>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_LogicalAndScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::logical_and>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_LogicalAndScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_logical_or_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::logical_or>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_LogicalOrScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::logical_or>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_LogicalOrScalar");
 
 MXNET_OPERATOR_REGISTER_BINARY_SCALAR(_logical_xor_scalar)
-.set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::logical_xor>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_alias("_LogicalXorScalar");
+    .set_attr<FCompute>("FCompute<cpu>", BinaryScalarOp::Compute<cpu, mshadow_op::logical_xor>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_alias("_LogicalXorScalar");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_binary_scalar_op_logic.cu b/src/operator/tensor/elemwise_binary_scalar_op_logic.cu
index 70ef26b0a5e5..af382a7dfd44 100644
--- a/src/operator/tensor/elemwise_binary_scalar_op_logic.cu
+++ b/src/operator/tensor/elemwise_binary_scalar_op_logic.cu
@@ -28,37 +28,37 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_equal_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"equal"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"equal"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"equal"});
 
 NNVM_REGISTER_OP(_not_equal_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"not_equal"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"not_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"not_equal"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"not_equal"});
 
 NNVM_REGISTER_OP(_greater_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"greater"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"greater"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"greater"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"greater"});
 
 NNVM_REGISTER_OP(_greater_equal_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"greater_equal"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"greater_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"greater_equal"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"greater_equal"});
 
 NNVM_REGISTER_OP(_lesser_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"less"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"less"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"less"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"less"});
 
 NNVM_REGISTER_OP(_lesser_equal_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"less_equal"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"less_equal"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"less_equal"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", BinaryScalarRTCCompute{"less_equal"});
 
 NNVM_REGISTER_OP(_logical_and_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"logical_and"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"logical_and"});
 
 NNVM_REGISTER_OP(_logical_or_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"logical_or"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"logical_or"});
 
 NNVM_REGISTER_OP(_logical_xor_scalar)
-.set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"logical_xor"});
+    .set_attr<FCompute>("FCompute<gpu>", BinaryScalarRTCCompute{"logical_xor"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_sum.cc b/src/operator/tensor/elemwise_sum.cc
index 66c89ca37e37..494a0d5abb43 100644
--- a/src/operator/tensor/elemwise_sum.cc
+++ b/src/operator/tensor/elemwise_sum.cc
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file elemwise_sum.cc
  * \brief CPU implementation of elementwise sum operator
-*/
+ */
 #include "./elemwise_sum.h"
 #include "../../ndarray/ndarray_function.h"
 #include "../nn/mkldnn/mkldnn_ops-inl.h"
@@ -34,60 +34,57 @@ namespace op {
 struct ElementWiseSumParam : public dmlc::Parameter<ElementWiseSumParam> {
   int num_args;
   DMLC_DECLARE_PARAMETER(ElementWiseSumParam) {
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-        .describe("Number of inputs to be summed.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs to be summed.");
   }
 };
 
 DMLC_REGISTER_PARAMETER(ElementWiseSumParam);
 
-std::vector<nnvm::NodeEntry> ElementWiseSumGrad(
-    const nnvm::ObjectPtr& n,
-    const std::vector<nnvm::NodeEntry>& ograds) {
+std::vector<nnvm::NodeEntry> ElementWiseSumGrad(const nnvm::ObjectPtr& n,
+                                                const std::vector<nnvm::NodeEntry>& ograds) {
   // identity constraints in the beginning for easier shape inference.
-  const nnvm::Op* copy_op =
-      nnvm::Op::Get("identity");
+  const nnvm::Op* copy_op = nnvm::Op::Get("identity");
   CHECK_EQ(ograds.size(), 1);
   std::vector<nnvm::NodeEntry> ret;
   for (size_t i = 0; i < n->inputs.size(); ++i) {
     nnvm::ObjectPtr node = nnvm::Node::Create();
-    node->attrs.op = copy_op;
-    node->inputs = {ograds[0]};
+    node->attrs.op       = copy_op;
+    node->inputs         = {ograds[0]};
     ret.emplace_back(std::move(node));
   }
   return ret;
 }
 
 bool ElementWiseSumShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(out_attrs->size(), 1);
   return ElemwiseAttr<mxnet::TShape, shape_is_none, shape_assign, true, shape_string>(
-    attrs, in_attrs, out_attrs, mxnet::TShape());
+      attrs, in_attrs, out_attrs, mxnet::TShape());
 }
 
 bool ElementWiseSumType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
+                        std::vector<int>* in_attrs,
+                        std::vector<int>* out_attrs) {
   CHECK_EQ(out_attrs->size(), 1);
   return ElemwiseAttr<int, type_is_none, type_assign, true, type_string>(
-    attrs, in_attrs, out_attrs, -1);
+      attrs, in_attrs, out_attrs, -1);
 }
 
 bool ElementWiseSumForwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                            const int dev_mask,
                                            DispatchMode* dispatch_mode,
-                                           std::vector<int> *in_attrs,
-                                           std::vector<int> *out_attrs) {
+                                           std::vector<int>* in_attrs,
+                                           std::vector<int>* out_attrs) {
   CHECK(!in_attrs->empty());
   CHECK_EQ(out_attrs->size(), 1U);
-  bool ret = ElemwiseStorageAttr<false, true, false>(attrs, dev_mask, dispatch_mode,
-                                                     in_attrs, out_attrs);
+  bool ret =
+      ElemwiseStorageAttr<false, true, false>(attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 #if MXNET_USE_ONEDNN == 1
   // We should always use FComputeEx.
-  if (dev_mask == mshadow::cpu::kDevMask
-      && common::ContainsOnlyStorage(*in_attrs, kDefaultStorage)
-      && out_attrs->at(0) == kDefaultStorage) {
+  if (dev_mask == mshadow::cpu::kDevMask &&
+      common::ContainsOnlyStorage(*in_attrs, kDefaultStorage) &&
+      out_attrs->at(0) == kDefaultStorage) {
     *dispatch_mode = DispatchMode::kFComputeEx;
   }
 #endif
@@ -95,8 +92,8 @@ bool ElementWiseSumForwardInferStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 #if MXNET_USE_ONEDNN == 1
-static inline bool IsMKLDNNData(const std::vector<NDArray> &arrs) {
-  for (auto &arr : arrs) {
+static inline bool IsMKLDNNData(const std::vector<NDArray>& arrs) {
+  for (auto& arr : arrs) {
     if (!arr.IsMKLDNNData())
       return false;
   }
@@ -112,7 +109,8 @@ void ElementWiseSumComputeExCPU(const nnvm::NodeAttrs& attrs,
   CHECK(!inputs.empty());
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
 #if MXNET_USE_ONEDNN == 1
   if (IsMKLDNNData(inputs)) {
     MKLDNNRun(MKLDNNSumForward, attrs, ctx, inputs, req, outputs);
@@ -120,15 +118,16 @@ void ElementWiseSumComputeExCPU(const nnvm::NodeAttrs& attrs,
     FallBackCompute(ElementWiseSumCompute<cpu>, attrs, ctx, inputs, req, outputs);
   }
 #endif
-  else if (common::ContainsOnlyStorage(inputs, kRowSparseStorage) || // NOLINT(*)
-      (inputs.size() == 3U && inputs[0].storage_type() == kDefaultStorage &&
-       inputs[1].storage_type() == kCSRStorage && inputs[2].storage_type() == kDefaultStorage) ||
-      (inputs.size() > 4U && common::ContainsStorageType(inputs, kDefaultStorage) &&
-       outputs[0].storage_type() == kDefaultStorage)) {
+  else if (common::ContainsOnlyStorage(inputs, kRowSparseStorage) ||  // NOLINT(*)
+           (inputs.size() == 3U && inputs[0].storage_type() == kDefaultStorage &&
+            inputs[1].storage_type() == kCSRStorage &&
+            inputs[2].storage_type() == kDefaultStorage) ||
+           (inputs.size() > 4U && common::ContainsStorageType(inputs, kDefaultStorage) &&
+            outputs[0].storage_type() == kDefaultStorage)) {
     mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-    Resource rsc = ResourceManager::Get()->Request(ctx.run_ctx.get_ctx(),
-        ResourceRequest(ResourceRequest::kTempSpace));
-    NDArray out_nd = outputs[0];
+    Resource rsc            = ResourceManager::Get()->Request(ctx.run_ctx.get_ctx(),
+                                                   ResourceRequest(ResourceRequest::kTempSpace));
+    NDArray out_nd          = outputs[0];
     mxnet::ndarray::ElementwiseSum<cpu>(s, rsc, inputs, &out_nd);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
@@ -138,9 +137,9 @@ void ElementWiseSumComputeExCPU(const nnvm::NodeAttrs& attrs,
 NNVM_REGISTER_OP(add_n)
 MXNET_ADD_SPARSE_OP_ALIAS(add_n)
 MXNET_ADD_SPARSE_OP_ALIAS(ElementWiseSum)
-.add_alias("ElementWiseSum")
-.add_alias("_npx_add_n")
-.describe(R"doc(Adds all input arguments element-wise.
+    .add_alias("ElementWiseSum")
+    .add_alias("_npx_add_n")
+    .describe(R"doc(Adds all input arguments element-wise.
 
 .. math::
    add\_n(a_1, a_2, ..., a_n) = a_1 + a_2 + ... + a_n
@@ -155,40 +154,41 @@ The storage type of ``add_n`` output depends on storage types of inputs
 - otherwise, ``add_n`` falls all inputs back to default storage and generates default storage
 
 )doc" ADD_FILELINE)
-.set_attr_parser(ParamParser<ElementWiseSumParam>)
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    uint32_t ret = dmlc::get<ElementWiseSumParam>(attrs.parsed).num_args;
-    return ret;
-  })
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<ElementWiseSumParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("arg") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<FCompute>("FCompute<cpu>", ElementWiseSumCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ElementWiseSumComputeExCPU)
-.set_attr<nnvm::FInplaceOption>(
-    "FInplaceOption", [](const NodeAttrs& attrs) {
-      return std::vector<std::pair<int, int> >{{0, 0}};
+    .set_attr_parser(ParamParser<ElementWiseSumParam>)
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      uint32_t ret = dmlc::get<ElementWiseSumParam>(attrs.parsed).num_args;
+      return ret;
     })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<ElementWiseSumParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<FCompute>("FCompute<cpu>", ElementWiseSumCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ElementWiseSumComputeExCPU)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<bool>("TIsMKLDNN", true)
 #endif
-.set_attr<mxnet::FInferShape>("FInferShape", ElementWiseSumShape)
-.set_attr<nnvm::FInferType>("FInferType", ElementWiseSumType)
-.set_attr<FInferStorageType>("FInferStorageType", ElementWiseSumForwardInferStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElementWiseSumGrad)
-.add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments");
+    .set_attr<mxnet::FInferShape>("FInferShape", ElementWiseSumShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElementWiseSumType)
+    .set_attr<FInferStorageType>("FInferStorageType", ElementWiseSumForwardInferStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElementWiseSumGrad)
+    .add_argument("args", "NDArray-or-Symbol[]", "Positional input arguments");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_sum.cu b/src/operator/tensor/elemwise_sum.cu
index 267477ad3110..52cdd98d6a80 100644
--- a/src/operator/tensor/elemwise_sum.cu
+++ b/src/operator/tensor/elemwise_sum.cu
@@ -21,7 +21,7 @@
  * Copyright (c) 2015 by Contributors
  * \file elemwise_sum.cu
  * \brief GPU implementation of elementwise sum operator
-*/
+ */
 #include "./elemwise_sum.h"
 #include "../../ndarray/ndarray_function.h"
 #include "../../common/cuda/rtc.h"
@@ -103,36 +103,39 @@ __global__ void elementwise_sum_kernel(
 }
 )code";
 
-void VectorizedElementwiseSum(const nnvm::NodeAttrs &attrs,
-                              const OpContext &ctx,
-                              const std::vector<TBlob> &inputs,
-                              const std::vector<OpReqType> &req,
-                              const std::vector<TBlob> &outputs) {
+void VectorizedElementwiseSum(const nnvm::NodeAttrs& attrs,
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  if (req[0] == kNullOp) return;
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  if (req[0] == kNullOp)
+    return;
   CHECK_EQ(outputs.size(), 1U);
   size_t output_type_size = common::mshadow_type_info(outputs[0].type_flag_).size;
-  const int nvec = output_type_size <= sizeof(uint2)
-                     ? (sizeof(uint2) / output_type_size)
-                     : 1;
+  const int nvec     = output_type_size <= sizeof(uint2) ? (sizeof(uint2) / output_type_size) : 1;
   const index_t size = inputs[0].Size();
   for (size_t i = 0; i < inputs.size(); i += num_inputs_per_kernel) {
-    const std::string code = std::string("const OpReqType req = ") +
-                             util::to_string(i == 0 ? req[0] : kAddTo) +
-                             ";\n";
+    const std::string code =
+        std::string("const OpReqType req = ") + util::to_string(i == 0 ? req[0] : kAddTo) + ";\n";
     elementwise_sum_params params{};
     params.num_inputs = std::min(num_inputs_per_kernel, inputs.size() - i);
     for (int j = 0; j < params.num_inputs; ++j) {
       params.inputs[j] = inputs[i + j].dptr_;
     }
     params.outputs[0] = outputs[0].dptr_;
-    const std::vector<TBlob> new_inputs(inputs.begin() + i,
-                                        inputs.begin() + i + params.num_inputs);
-    VectorizedKernelRTCLauncher(code, "elementwise_sum_kernel",
-                                elementwise_sum_kernel, nvec,
-                                size, 1, s, params,
-                                new_inputs, outputs,
+    const std::vector<TBlob> new_inputs(inputs.begin() + i, inputs.begin() + i + params.num_inputs);
+    VectorizedKernelRTCLauncher(code,
+                                "elementwise_sum_kernel",
+                                elementwise_sum_kernel,
+                                nvec,
+                                size,
+                                1,
+                                s,
+                                params,
+                                new_inputs,
+                                outputs,
                                 ctx.run_ctx.get_ctx().dev_id);
   }
 }
@@ -145,7 +148,8 @@ void ElementWiseSumComputeExGPU(const nnvm::NodeAttrs& attrs,
   CHECK(!inputs.empty());
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   CHECK_EQ(req[0], kWriteTo) << "ElementWiseSumComputeExGPU only supports req = kWriteTo";
   if (common::ContainsOnlyStorage(inputs, kRowSparseStorage) ||
       (inputs.size() == 3U && inputs[0].storage_type() == kDefaultStorage &&
@@ -153,7 +157,7 @@ void ElementWiseSumComputeExGPU(const nnvm::NodeAttrs& attrs,
       (inputs.size() > 4U && common::ContainsStorageType(inputs, kDefaultStorage) &&
        outputs[0].storage_type() == kDefaultStorage)) {
     mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
-    NDArray out_nd = outputs[0];
+    NDArray out_nd          = outputs[0];
     mxnet::ndarray::ElementwiseSum<gpu>(s, ctx.requested[0], inputs, &out_nd);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
@@ -163,8 +167,8 @@ void ElementWiseSumComputeExGPU(const nnvm::NodeAttrs& attrs,
 }  // namespace
 
 NNVM_REGISTER_OP(add_n)
-.set_attr<FCompute>("FCompute<gpu>", VectorizedElementwiseSum)
-.set_attr<FComputeEx>("FComputeEx<gpu>", ElementWiseSumComputeExGPU);
+    .set_attr<FCompute>("FCompute<gpu>", VectorizedElementwiseSum)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", ElementWiseSumComputeExGPU);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_sum.h b/src/operator/tensor/elemwise_sum.h
index d40ab4de0f0f..e559a669c025 100644
--- a/src/operator/tensor/elemwise_sum.h
+++ b/src/operator/tensor/elemwise_sum.h
@@ -22,7 +22,7 @@
  * \file elemwise_sum.h
  * \brief Function definition of elementwise sum
  * \author Bing Xu
-*/
+ */
 #ifndef MXNET_OPERATOR_TENSOR_ELEMWISE_SUM_H_
 #define MXNET_OPERATOR_TENSOR_ELEMWISE_SUM_H_
 
@@ -38,34 +38,38 @@ namespace mxnet {
 namespace op {
 
 struct Sum {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static DType sum(index_t i, const DType* a) {
     return a[i];
   }
-  template<typename DType, typename... DTypes>
+  template <typename DType, typename... DTypes>
   MSHADOW_XINLINE static DType sum(index_t i, const DType* a, const DTypes... b) {
     return a[i] + sum(i, b...);
   }
-  template<typename DType, typename... DTypes>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const OpReqType req, const DType* in0,
-    const DTypes... ins) {
+  template <typename DType, typename... DTypes>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const OpReqType req,
+                                  const DType* in0,
+                                  const DTypes... ins) {
     KERNEL_ASSIGN(out[i], req, sum(i, in0, ins...));
   }
 };
 
-template<typename xpu, typename DType>
+template <typename xpu, typename DType>
 void ElementWiseSumCompute_(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& in_data,
                             const std::vector<OpReqType>& req,
                             const std::vector<TBlob>& out_data) {
   using namespace mxnet_op;
-  if (req[0] == kNullOp) return;
-  size_t size = in_data.size();
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  DType* out_dptr = out_data[0].dptr<DType>();
-  index_t out_size = static_cast<index_t>((out_data[0].Size() + DataType<DType>::kLanes - 1)
-                                  /DataType<DType>::kLanes);
+  if (req[0] == kNullOp)
+    return;
+  size_t size      = in_data.size();
+  Stream<xpu>* s   = ctx.get_stream<xpu>();
+  DType* out_dptr  = out_data[0].dptr<DType>();
+  index_t out_size = static_cast<index_t>((out_data[0].Size() + DataType<DType>::kLanes - 1) /
+                                          DataType<DType>::kLanes);
   switch (size) {
     case 2: {
       DType* in_0_dptr = in_data[0].dptr<DType>();
@@ -85,8 +89,8 @@ void ElementWiseSumCompute_(const nnvm::NodeAttrs& attrs,
       DType* in_1_dptr = in_data[1].dptr<DType>();
       DType* in_2_dptr = in_data[2].dptr<DType>();
       DType* in_3_dptr = in_data[3].dptr<DType>();
-      Kernel<Sum, xpu>::Launch(s, out_size, out_dptr, req[0], in_0_dptr, in_1_dptr, in_2_dptr,
-        in_3_dptr);
+      Kernel<Sum, xpu>::Launch(
+          s, out_size, out_dptr, req[0], in_0_dptr, in_1_dptr, in_2_dptr, in_3_dptr);
       break;
     }
     default: {
@@ -101,7 +105,7 @@ void ElementWiseSumCompute_(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void ElementWiseSumCompute(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -109,7 +113,7 @@ void ElementWiseSumCompute(const nnvm::NodeAttrs& attrs,
                            const std::vector<TBlob>& outputs) {
   CHECK_EQ(outputs.size(), 1U);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      ElementWiseSumCompute_<xpu, DType>(attrs, ctx, inputs, req, outputs);
+    ElementWiseSumCompute_<xpu, DType>(attrs, ctx, inputs, req, outputs);
   });
 }
 
diff --git a/src/operator/tensor/elemwise_unary_op.cc b/src/operator/tensor/elemwise_unary_op.cc
index df51c7ba2d12..2fe7153e88d3 100644
--- a/src/operator/tensor/elemwise_unary_op.cc
+++ b/src/operator/tensor/elemwise_unary_op.cc
@@ -32,8 +32,8 @@ namespace op {
 #if MXNET_USE_CUDA
 
 struct unary_kernel_params {
-  const void *inputs[1];
-  void *outputs[1];
+  const void* inputs[1];
+  void* outputs[1];
 };
 
 const char unary_kernel_fwd[] = R"code(
@@ -93,27 +93,31 @@ void UnaryRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
                                  const std::vector<OpReqType>& req,
                                  const std::vector<TBlob>& outputs) {
   using namespace mxnet::common::cuda::rtc;
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
 
-  const std::string code = std::string("const OpReqType req = ") +
-                           util::to_string(req[0]) +
+  const std::string code = std::string("const OpReqType req = ") + util::to_string(req[0]) +
                            ";\n"
                            "#define OP op::" +
-                           OP +
-                           "\n";
+                           OP + "\n";
   const int nvec = outputs[0].type_flag_ == mshadow::kFloat64 ? 2 : 4;
 
-  const index_t size = outputs[0].Size();
-  unary_kernel_params params = { {inputs[0].dptr_},
-                                 {outputs[0].dptr_} };
-
-  VectorizedKernelRTCLauncher(code, "unary_kernel",
-                              unary_kernel_fwd, nvec,
-                              size, 1, s, params,
-                              inputs, outputs,
+  const index_t size         = outputs[0].Size();
+  unary_kernel_params params = {{inputs[0].dptr_}, {outputs[0].dptr_}};
+
+  VectorizedKernelRTCLauncher(code,
+                              "unary_kernel",
+                              unary_kernel_fwd,
+                              nvec,
+                              size,
+                              1,
+                              s,
+                              params,
+                              inputs,
+                              outputs,
                               ctx.run_ctx.get_ctx().dev_id);
 }
 
@@ -129,9 +133,9 @@ void UnaryRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   InitStorageGeometry<1, 1>(attrs, inputs, outputs);
   CHECK_NE(outputs[0].storage_type(), kDefaultStorage)
-    << "This function works only for sparse types.";
+      << "This function works only for sparse types.";
   CHECK_EQ(inputs[0].storage_type(), outputs[0].storage_type())
-    << "The storage type of both inputs and outputs needs to be the same.";
+      << "The storage type of both inputs and outputs needs to be the same.";
   AllocateGeometry(&outputs[0], req[0], &inputs[0]);
   CopyGeometryBlobs<gpu>(ctx.get_stream<gpu>(), &outputs[0], req[0], inputs[0]);
   outputs[0].CheckAndAllocData(inputs[0].storage_shape());
@@ -139,10 +143,10 @@ void UnaryRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
     std::vector<TBlob> in_blobs, out_blobs;
     in_blobs.reserve(inputs.size());
     out_blobs.reserve(outputs.size());
-    for (auto &input : inputs) {
+    for (auto& input : inputs) {
       in_blobs.emplace_back(input.data());
     }
-    for (auto &output : outputs) {
+    for (auto& output : outputs) {
       out_blobs.emplace_back(output.data());
     }
     this->operator()(attrs, ctx, in_blobs, req, out_blobs);
@@ -154,7 +158,7 @@ void UnaryBwdInOutRTCCompute::operator()(const nnvm::NodeAttrs& attrs,
                                          const std::vector<TBlob>& inputs,
                                          const std::vector<OpReqType>& req,
                                          const std::vector<TBlob>& outputs) {
-  ElemwiseBinaryRTCCompute {OP} (attrs, ctx, {inputs[0], inputs[2]}, req, outputs);
+  ElemwiseBinaryRTCCompute{OP}(attrs, ctx, {inputs[0], inputs[2]}, req, outputs);  // NOLINT
 }
 
 #endif  // MXNET_USE_CUDA
diff --git a/src/operator/tensor/elemwise_unary_op.h b/src/operator/tensor/elemwise_unary_op.h
index 839d0ad67e7e..bed270e60bd7 100644
--- a/src/operator/tensor/elemwise_unary_op.h
+++ b/src/operator/tensor/elemwise_unary_op.h
@@ -51,22 +51,20 @@ namespace {
 /*! \brief Infer the output storage geometry
  * \return boolean signifying whether the proper storage geometry was initialized
  */
-template<int n_in, int n_out>
+template <int n_in, int n_out>
 bool InitStorageGeometry(const nnvm::NodeAttrs& attrs,
-                                const std::vector<NDArray>& inputs,
-                                const std::vector<NDArray>& outputs) {
-  CHECK_EQ(inputs.size(), static_cast<size_t>(n_in))
-    << " in operator " << attrs.name;
-  CHECK_EQ(outputs.size(), static_cast<size_t>(n_out))
-    << " in operator " << attrs.name;
+                         const std::vector<NDArray>& inputs,
+                         const std::vector<NDArray>& outputs) {
+  CHECK_EQ(inputs.size(), static_cast<size_t>(n_in)) << " in operator " << attrs.name;
+  CHECK_EQ(outputs.size(), static_cast<size_t>(n_out)) << " in operator " << attrs.name;
   static_assert(n_in > 0 && n_out > 0, "Invalid input and/or output count values");
   const mxnet::TShape& isshape = inputs[0].storage_shape();
   if (!shape_is_none(isshape)) {
-    NDArray *output = nullptr;
+    NDArray* output = nullptr;
     for (size_t i = 0, n = inputs.size(); i < n; ++i) {
-      const NDArray &input = inputs[i];
+      const NDArray& input = inputs[i];
       if (i < n_out) {
-        output = const_cast<NDArray *>(&outputs[i]);
+        output = const_cast<NDArray*>(&outputs[i]);
       }
       CHECK_EQ(output->shape(), inputs[i].shape());
       CHECK_EQ(output->storage_type(), input.storage_type());
@@ -82,8 +80,7 @@ bool InitStorageGeometry(const nnvm::NodeAttrs& attrs,
     }
     return true;
   }
-  if (isshape.ndim() > 0 && !isshape.Size()
-    && inputs[0].storage_type() != kDefaultStorage) {
+  if (isshape.ndim() > 0 && !isshape.Size() && inputs[0].storage_type() != kDefaultStorage) {
     return true;  // 0% density
   } else {
     CHECK(false);  // implement when necessary
@@ -92,11 +89,11 @@ bool InitStorageGeometry(const nnvm::NodeAttrs& attrs,
 }
 
 /*! \brief Copy blob data */
-template<typename xpu>
-void inline CopyBlob(mshadow::Stream<xpu> *s,
-                            const TBlob *dest_blob,
-                            const OpReqType reqi,
-                            const TBlob& src_blob) {
+template <typename xpu>
+void inline CopyBlob(mshadow::Stream<xpu>* s,
+                     const TBlob* dest_blob,
+                     const OpReqType reqi,
+                     const TBlob& src_blob) {
   CHECK_EQ(src_blob.type_flag_, dest_blob->type_flag_);
   CHECK_EQ(src_blob.shape_, dest_blob->shape_);
   MSHADOW_TYPE_SWITCH(src_blob.type_flag_, DType, {
@@ -111,7 +108,7 @@ void inline CopyBlob(mshadow::Stream<xpu> *s,
  * \param dest Destination sparse NDArray
  * \param clone_from sparse NDArray from which to clone storage attributes
  */
-void inline AllocateGeometry(const NDArray *dest,
+void inline AllocateGeometry(const NDArray* dest,
                              const OpReqType req,
                              const NDArray* clone_from = nullptr) {
   if (req != kNullOp) {
@@ -133,17 +130,17 @@ void inline AllocateGeometry(const NDArray *dest,
 }
 
 /*! \brief Copy the geometry-related blobs (row sparse indexes, etc.) */
-template<typename xpu>
-inline void CopyGeometryBlobs(mshadow::Stream<xpu> *s,
-                                     const NDArray *dest,
-                                     const OpReqType reqi,
-                                     const NDArray &src) {
+template <typename xpu>
+inline void CopyGeometryBlobs(mshadow::Stream<xpu>* s,
+                              const NDArray* dest,
+                              const OpReqType reqi,
+                              const NDArray& src) {
   CHECK_EQ(src.aux_shapes().size(), dest->aux_shapes().size());
   // My assumption is that the geometry blobs are not large enough to justify an omp loop here,
   // since the thread synchronization calls for each fork will take longer
   // than copying a few floats
   for (size_t i = 0, n = src.aux_shapes().size(); i < n; ++i) {
-    const TBlob src_blob = src.aux_data(i);
+    const TBlob src_blob  = src.aux_data(i);
     const TBlob dest_blob = dest->aux_data(i);
     CopyBlob<xpu>(s, &dest_blob, reqi, src_blob);
   }
@@ -154,14 +151,13 @@ inline void CopyGeometryBlobs(mshadow::Stream<xpu> *s,
 class OpBase {
  protected:
   /*! \brief simple kernel to set to a scalar value of arbitrary type */
-  template<int req>
+  template <int req>
   using set_to_scalar = mxnet_op::op_with_req<mshadow_op::identity, req>;
 
-
   /*! \brief Generic copy NDArray */
-  template<typename xpu>
-  static inline void CopyNDArray(mshadow::Stream<xpu> *s,
-                                 const NDArray *dest,
+  template <typename xpu>
+  static inline void CopyNDArray(mshadow::Stream<xpu>* s,
+                                 const NDArray* dest,
                                  const OpReqType reqi,
                                  const NDArray& src) {
     DCHECK_EQ(dest->storage_type(), src.storage_type());
@@ -171,12 +167,12 @@ class OpBase {
   }
 
   /*! \brief Map NDArray vectors to TBlob vectors and pass to compute function */
-  template<typename xpu, typename FComputer>
-  static inline void MapToFCompute(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<NDArray> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<NDArray> &outputs,
+  template <typename xpu, typename FComputer>
+  static inline void MapToFCompute(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const std::vector<NDArray>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<NDArray>& outputs,
                                    FComputer computer) {
     std::vector<TBlob> in_blobs, out_blobs;
     in_blobs.reserve(inputs.size());
@@ -191,8 +187,8 @@ class OpBase {
   }
 
   /*! \brief Keep row shape[0] dimension and gather the remaining dimensions in location shape[1] */
-  template<typename DType, typename xpu>
-  static inline mshadow::Tensor<xpu, 2, DType> AsRowise2D(mshadow::Stream<xpu> *s,
+  template <typename DType, typename xpu>
+  static inline mshadow::Tensor<xpu, 2, DType> AsRowise2D(mshadow::Stream<xpu>* s,
                                                           const TBlob& blob) {
     const size_t dim = blob.shape_.ndim();
     if (dim) {
@@ -201,18 +197,18 @@ class OpBase {
         shape[1] *= blob.shape_[i];
       }
       return mshadow::Tensor<xpu, 2, DType>(
-        blob.dptr<DType>(), mshadow::Shape2(shape[0], shape[1]), s);
+          blob.dptr<DType>(), mshadow::Shape2(shape[0], shape[1]), s);
     }
     return mshadow::Tensor<xpu, 2, DType>();
   }
 
   /*! \brief Fill dense output block with a single scalar value */
-  template<typename DType>
-  static inline void FillDense(mshadow::Stream<cpu> *s,
+  template <typename DType>
+  static inline void FillDense(mshadow::Stream<cpu>* s,
                                const size_t size,
                                const DType val,
                                const OpReqType req,
-                               DType *out) {
+                               DType* out) {
     MXNET_ASSIGN_REQ_SWITCH(req, Req, {
       mxnet_op::Kernel<OpBase::set_to_scalar<Req>, cpu>::Launch(s, size, out, val);
     });
@@ -223,12 +219,12 @@ class OpBase {
 class UnaryOp : public OpBase {
  public:
   /*! \brief Map NDArray vectors to TBlob vectors and pass to compute function */
-  template<typename xpu, typename FComputer>
-  static inline void MapToFCompute(const nnvm::NodeAttrs &attrs,
-                                   const OpContext &ctx,
-                                   const std::vector<NDArray> &inputs,
-                                   const std::vector<OpReqType> &req,
-                                   const std::vector<NDArray> &outputs,
+  template <typename xpu, typename FComputer>
+  static inline void MapToFCompute(const nnvm::NodeAttrs& attrs,
+                                   const OpContext& ctx,
+                                   const std::vector<NDArray>& inputs,
+                                   const std::vector<OpReqType>& req,
+                                   const std::vector<NDArray>& outputs,
                                    FComputer computer) {
     InitStorageGeometry<1, 1>(attrs, inputs, outputs);
     CHECK_EQ(inputs.size(), outputs.size());  // need to figure out what to do for binary type
@@ -242,7 +238,7 @@ class UnaryOp : public OpBase {
     }
   }
 
-  template<typename OP>
+  template <typename OP>
   static void Compute_(const nnvm::NodeAttrs& attrs,
                        mshadow::Stream<cpu>* s,
                        const std::vector<TBlob>& inputs,
@@ -252,29 +248,29 @@ class UnaryOp : public OpBase {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         if (inputs[0].Size() != 0) {
           mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, cpu>::Launch(
-            s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>());
+              s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>());
         }
       });
     });
   }
 
-  template<typename xpu, typename OP>
+  template <typename xpu, typename OP>
   static void Compute(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     Compute_<OP>(attrs, s, inputs, req, outputs);
   }
 
-  template<typename xpu, typename OP>
+  template <typename xpu, typename OP>
   static void ComputeMixedType(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
                                const std::vector<OpReqType>& req,
                                const std::vector<TBlob>& outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
 
     if (mxnet::common::is_float(inputs[0].type_flag_)) {
       UnaryOp::Compute<xpu, OP>(attrs, ctx, inputs, req, outputs);
@@ -284,7 +280,7 @@ class UnaryOp : public OpBase {
           MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
             if (inputs[0].Size() != 0) {
               mxnet_op::Kernel<mxnet_op::mixed_type_unary_op<OP, Req>, xpu>::Launch(
-                s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<IType>());
+                  s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<IType>());
             }
           });
         });
@@ -292,30 +288,30 @@ class UnaryOp : public OpBase {
     }
   }
 
-  template<typename xpu, typename OP>
+  template <typename xpu, typename OP>
   static void ComputeInt(const nnvm::NodeAttrs& attrs,
-                      const OpContext& ctx,
-                      const std::vector<TBlob>& inputs,
-                      const std::vector<OpReqType>& req,
-                      const std::vector<TBlob>& outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+                         const OpContext& ctx,
+                         const std::vector<TBlob>& inputs,
+                         const std::vector<OpReqType>& req,
+                         const std::vector<TBlob>& outputs) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     MXNET_INT_TYPE_SWITCH(outputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         if (inputs[0].Size() != 0) {
           mxnet_op::Kernel<mxnet_op::op_with_req<OP, Req>, xpu>::Launch(
-            s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>());
+              s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>());
         }
       });
     });
   }
 
-  template<typename xpu, typename OP>
+  template <typename xpu, typename OP>
   static void ComputeLogic(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
                            const std::vector<OpReqType>& req,
                            const std::vector<TBlob>& outputs) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
         if (inputs[0].Size() != 0) {
@@ -326,7 +322,7 @@ class UnaryOp : public OpBase {
     });
   }
 
-  template<typename xpu, typename OP>
+  template <typename xpu, typename OP>
   static void ComputeEx(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<NDArray>& inputs,
@@ -335,26 +331,26 @@ class UnaryOp : public OpBase {
     CHECK_EQ(inputs.size(), 1U);
     CHECK_EQ(outputs.size(), 1U);
     CHECK_NE(inputs[0].storage_type(), kDefaultStorage)
-      << "Operation requires a sparse input storage type";
+        << "Operation requires a sparse input storage type";
     CHECK_NE(outputs[0].storage_type(), kDefaultStorage)
-      << "Operation requires a sparse output storage type";
+        << "Operation requires a sparse output storage type";
     if (inputs[0].storage_shape().Size()) {
       MapToFCompute<xpu>(attrs, ctx, inputs, req, outputs, Compute<xpu, OP>);
     }
   }
 
 #if MSHADOW_USE_MKL == 1
-  template<typename OP, typename MKL_OP>
+  template <typename OP, typename MKL_OP>
   static void MKL_Compute(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
                           const std::vector<OpReqType>& req,
                           const std::vector<TBlob>& outputs) {
-    if (req[0] == kNullOp)  return;
-    auto type_flag = inputs[0].type_flag_;
+    if (req[0] == kNullOp)
+      return;
+    auto type_flag    = inputs[0].type_flag_;
     size_t input_size = inputs[0].Size();
-    if ((req[0] == kWriteTo || req[0] == kWriteInplace) &&
-        mkl_func::check_size(input_size) &&
+    if ((req[0] == kWriteTo || req[0] == kWriteInplace) && mkl_func::check_size(input_size) &&
         mkl_func::check_type(type_flag)) {
       // set DType as float or double according to type_flag
       MSHADOW_SGL_DBL_TYPE_SWITCH(type_flag, DType, {
@@ -365,27 +361,25 @@ class UnaryOp : public OpBase {
     }
   }
 
-  template<typename OP, typename MKL_OP>
+  template <typename OP, typename MKL_OP>
   static void MKL_ComputeEx(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<NDArray>& inputs,
                             const std::vector<OpReqType>& req,
                             const std::vector<NDArray>& outputs) {
-    CHECK_EQ(inputs.size(), 1U)
-      << "Invalid input, only one input is allowed";
-    CHECK_EQ(outputs.size(), 1U)
-      << "Invalid output, only one output is allowed";
+    CHECK_EQ(inputs.size(), 1U) << "Invalid input, only one input is allowed";
+    CHECK_EQ(outputs.size(), 1U) << "Invalid output, only one output is allowed";
     CHECK_NE(inputs[0].storage_type(), kDefaultStorage)
-      << "Operation requires a sparse input storage type";
+        << "Operation requires a sparse input storage type";
     CHECK_NE(outputs[0].storage_type(), kDefaultStorage)
-      << "Operation requires a sparse output storage type";
+        << "Operation requires a sparse output storage type";
     if (inputs[0].storage_shape().Size()) {
       MapToFCompute<cpu>(attrs, ctx, inputs, req, outputs, MKL_Compute<OP, MKL_OP>);
     }
   }
 #endif
 
-  template<typename xpu>
+  template <typename xpu>
   static void IdentityCompute(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -399,13 +393,12 @@ class UnaryOp : public OpBase {
         mxnet_op::copy(ctx.get_stream<xpu>(), outputs[0], inputs[0]);
         break;
       case kAddTo: {
-          Stream<xpu> *s = ctx.get_stream<xpu>();
-          MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, DType, {
-            mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, kAddTo>, xpu>::Launch(
+        Stream<xpu>* s = ctx.get_stream<xpu>();
+        MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, DType, {
+          mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, kAddTo>, xpu>::Launch(
               s, inputs[0].Size(), outputs[0].dptr<DType>(), inputs[0].dptr<DType>());
-          });
-        }
-        break;
+        });
+      } break;
       case kWriteInplace:
 // cannot check if ptrs are the same for MKLDNN because we may have
 // created copies of input when reordering. WriteInPlace will still write to original array
@@ -418,7 +411,7 @@ class UnaryOp : public OpBase {
     }
   }
 
-  template<typename xpu>
+  template <typename xpu>
   static void IdentityComputeEx(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<NDArray>& inputs,
@@ -426,7 +419,7 @@ class UnaryOp : public OpBase {
                                 const std::vector<NDArray>& outputs) {
     CHECK_EQ(inputs.size(), 1U);
     CHECK_EQ(outputs.size(), 1U);
-    const auto in_stype = inputs[0].storage_type();
+    const auto in_stype  = inputs[0].storage_type();
     const auto out_stype = outputs[0].storage_type();
     if (in_stype == out_stype && (in_stype == kRowSparseStorage || in_stype == kCSRStorage)) {
       MapToFCompute<xpu>(attrs, ctx, inputs, req, outputs, IdentityCompute<xpu>);
@@ -435,7 +428,7 @@ class UnaryOp : public OpBase {
     }
   }
 
-  template<typename xpu>
+  template <typename xpu>
   static void IdentityComputeFirstItemEx(const nnvm::NodeAttrs& attrs,
                                          const OpContext& ctx,
                                          const std::vector<NDArray>& inputs,
@@ -450,7 +443,7 @@ class UnaryOp : public OpBase {
       // csr, _ -> csr, or rsp, _ -> rsp
       OpBase::CopyNDArray(ctx.get_stream<xpu>(), &outputs[0], req[0], inputs[0]);
     } else if (supported_stype && out_stype == kDefaultStorage) {
-     // csr/rsp, _ -> dns
+      // csr/rsp, _ -> dns
       CastStorageComputeImpl<xpu>(ctx, inputs[0], outputs[0]);
     } else {
       LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
@@ -459,7 +452,7 @@ class UnaryOp : public OpBase {
 };
 
 /*! \brief Map legacy unary_bwd to backward_grad */
-template<typename GRAD_OP>
+template <typename GRAD_OP>
 using unary_bwd = ::mxnet::op::mxnet_op::backward_grad_tuned<GRAD_OP>;
 
 struct CastParam : public dmlc::Parameter<CastParam> {
@@ -467,14 +460,13 @@ struct CastParam : public dmlc::Parameter<CastParam> {
   int dtype;
   DMLC_DECLARE_PARAMETER(CastParam) {
     DMLC_DECLARE_FIELD(dtype)
-    MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL
-    .describe("Output data type.");
+    MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL.describe("Output data type.");
   }
 };
 
 inline bool CastType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_attrs,
-                     std::vector<int> *out_attrs) {
+                     std::vector<int>* in_attrs,
+                     std::vector<int>* out_attrs) {
   const CastParam& param = nnvm::get<CastParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -482,7 +474,7 @@ inline bool CastType(const nnvm::NodeAttrs& attrs,
   return (*in_attrs)[0] != -1;
 }
 
-template<typename xpu>
+template <typename xpu>
 void CastCompute(const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<TBlob>& inputs,
@@ -490,13 +482,13 @@ void CastCompute(const nnvm::NodeAttrs& attrs,
                  const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(outputs[0].type_flag_, DstDType, {
     Tensor<xpu, 1, DstDType> out = outputs[0].FlatTo1D<xpu, DstDType>(s);
     MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(inputs[0].type_flag_, SrcDType, {
       Tensor<xpu, 1, SrcDType> data = inputs[0].FlatTo1D<xpu, SrcDType>(s);
-      if ((outputs[0].type_flag_ != inputs[0].type_flag_ ||
-          req[0] != kWriteInplace) && outputs[0].Size() != 0) {
+      if ((outputs[0].type_flag_ != inputs[0].type_flag_ || req[0] != kWriteInplace) &&
+          outputs[0].Size() != 0) {
         Assign(out, req[0], tcast<DstDType>(data));
       }
     });
@@ -507,41 +499,43 @@ struct HardSigmoidParam : public dmlc::Parameter<HardSigmoidParam> {
   real_t alpha;
   real_t beta;
   DMLC_DECLARE_PARAMETER(HardSigmoidParam) {
-    DMLC_DECLARE_FIELD(alpha)
-    .set_default(0.2)
-    .describe("Slope of hard sigmoid");
-    DMLC_DECLARE_FIELD(beta)
-    .set_default(0.5)
-    .describe("Bias of hard sigmoid.");
+    DMLC_DECLARE_FIELD(alpha).set_default(0.2).describe("Slope of hard sigmoid");
+    DMLC_DECLARE_FIELD(beta).set_default(0.5).describe("Bias of hard sigmoid.");
   }
 };
 
-template<int req>
+template <int req>
 struct hard_sigmoid_forward {
-  template<typename DType>
-    MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                    const real_t alpha, const real_t beta) {
-      DType result = DType(alpha * in_data[i] + beta);
-      result = (DType(1) < result) ? DType(1) : result;
-      result = (DType(0) > result) ? DType(0) : result;
-      KERNEL_ASSIGN(out_data[i], req, result);
-    }
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const real_t alpha,
+                                  const real_t beta) {
+    DType result = DType(alpha * in_data[i] + beta);
+    result       = (DType(1) < result) ? DType(1) : result;
+    result       = (DType(0) > result) ? DType(0) : result;
+    KERNEL_ASSIGN(out_data[i], req, result);
+  }
 };
 
-template<int req>
+template <int req>
 struct hard_sigmoid_backward {
-  template<typename DType>
-    MSHADOW_XINLINE static void Map(index_t i, DType* in_grad, const DType* in_data,
-                                    const DType* out_grad, const real_t alpha, const real_t beta) {
-      DType out_val = DType(alpha) * in_data[i] + DType(beta);
-      DType grad = (out_val > DType(0) && out_val < DType(1)) ?
-                   (out_grad[i] * DType(alpha)) : DType(0);
-      KERNEL_ASSIGN(in_grad[i], req, grad);
-    }
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* in_grad,
+                                  const DType* in_data,
+                                  const DType* out_grad,
+                                  const real_t alpha,
+                                  const real_t beta) {
+    DType out_val = DType(alpha) * in_data[i] + DType(beta);
+    DType grad =
+        (out_val > DType(0) && out_val < DType(1)) ? (out_grad[i] * DType(alpha)) : DType(0);
+    KERNEL_ASSIGN(in_grad[i], req, grad);
+  }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void HardSigmoidForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -552,21 +546,24 @@ void HardSigmoidForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req.size(), 1U);
   CHECK(req[0] != kNullOp);
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
+  const TBlob& in_data          = inputs[0];
+  const TBlob& out_data         = outputs[0];
   const HardSigmoidParam& param = nnvm::get<HardSigmoidParam>(attrs.parsed);
   using namespace mxnet_op;
   MSHADOW_REAL_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<hard_sigmoid_forward<req_type>, xpu>::Launch(
-        s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-        param.alpha, param.beta);
+      Kernel<hard_sigmoid_forward<req_type>, xpu>::Launch(s,
+                                                          out_data.Size(),
+                                                          out_data.dptr<DType>(),
+                                                          in_data.dptr<DType>(),
+                                                          param.alpha,
+                                                          param.beta);
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void HardSigmoidBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -576,17 +573,21 @@ void HardSigmoidBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& out_grad = inputs[0];
-  const TBlob& in_data = inputs[1];
-  const TBlob& in_grad = outputs[0];
+  Stream<xpu>* s                = ctx.get_stream<xpu>();
+  const TBlob& out_grad         = inputs[0];
+  const TBlob& in_data          = inputs[1];
+  const TBlob& in_grad          = outputs[0];
   const HardSigmoidParam& param = nnvm::get<HardSigmoidParam>(attrs.parsed);
   using namespace mxnet_op;
   MSHADOW_REAL_TYPE_SWITCH(in_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<hard_sigmoid_backward<req_type>, xpu>::Launch(
-        s, in_grad.Size(), in_grad.dptr<DType>(), in_data.dptr<DType>(),
-        out_grad.dptr<DType>(), param.alpha, param.beta);
+      Kernel<hard_sigmoid_backward<req_type>, xpu>::Launch(s,
+                                                           in_grad.Size(),
+                                                           in_grad.dptr<DType>(),
+                                                           in_data.dptr<DType>(),
+                                                           out_grad.dptr<DType>(),
+                                                           param.alpha,
+                                                           param.beta);
     });
   });
 }
@@ -602,29 +603,30 @@ struct ReshapeLikeParam : public dmlc::Parameter<ReshapeLikeParam> {
             "reshaped. Supports negative indices.");
     DMLC_DECLARE_FIELD(lhs_end)
         .set_default(dmlc::optional<int>())
-        .describe("Defaults to None. "
-                  "The ending index along which the lhs dimensions are to be "
-                  "used for reshaping. Supports negative indices.");
+        .describe(
+            "Defaults to None. "
+            "The ending index along which the lhs dimensions are to be "
+            "used for reshaping. Supports negative indices.");
     DMLC_DECLARE_FIELD(rhs_begin)
         .set_default(dmlc::optional<int>())
-        .describe("Defaults to 0. "
-                  "The beginning index along which the rhs dimensions are to "
-                  "be used for "
-                  "reshaping. Supports negative indices.");
+        .describe(
+            "Defaults to 0. "
+            "The beginning index along which the rhs dimensions are to "
+            "be used for "
+            "reshaping. Supports negative indices.");
     DMLC_DECLARE_FIELD(rhs_end)
         .set_default(dmlc::optional<int>())
-        .describe("Defaults to None. "
-                  "The ending index along which the rhs dimensions are to be "
-                  "used for reshaping. Supports negative indices.");
+        .describe(
+            "Defaults to None. "
+            "The ending index along which the rhs dimensions are to be "
+            "used for reshaping. Supports negative indices.");
   }
 };
 
 struct AroundParam : public dmlc::Parameter<AroundParam> {
   int decimals;
   DMLC_DECLARE_PARAMETER(AroundParam) {
-    DMLC_DECLARE_FIELD(decimals)
-      .set_default(0)
-      .describe("Number of decimal places to round to.");
+    DMLC_DECLARE_FIELD(decimals).set_default(0).describe("Number of decimal places to round to.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream decimals_s;
@@ -633,12 +635,14 @@ struct AroundParam : public dmlc::Parameter<AroundParam> {
   }
 };
 
-template<int req>
+template <int req>
 struct around_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
                                   const int decimals) {
-    int d = 0;
+    int d      = 0;
     DType temp = in_data[i];
     DType roundtemp;
     while (d != decimals) {
@@ -674,7 +678,7 @@ struct around_forward {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void AroundOpForward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -683,25 +687,24 @@ void AroundOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  mshadow::Stream<xpu>* s  = ctx.get_stream<xpu>();
+  const TBlob& in_data     = inputs[0];
+  const TBlob& out_data    = outputs[0];
   const AroundParam& param = nnvm::get<AroundParam>(attrs.parsed);
   using namespace mxnet_op;
   // if the type is uint8, int8, int32 or int64 and decimals is greater than 0
   // we simply return the number back.
-  if (in_data.type_flag_ >= mshadow::kUint8 && in_data.type_flag_ <= mshadow::kInt64 \
-     && param.decimals > 0) {
+  if (in_data.type_flag_ >= mshadow::kUint8 && in_data.type_flag_ <= mshadow::kInt64 &&
+      param.decimals > 0) {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       Kernel<mshadow_op::identity_with_cast, xpu>::Launch(
-        s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>());
+          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>());
     });
   } else {
     MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
       MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
         Kernel<around_forward<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-          param.decimals);
+            s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(), param.decimals);
       });
     });
   }
@@ -712,26 +715,26 @@ struct NumpyNanToNumParam : public dmlc::Parameter<NumpyNanToNumParam> {
   double nan;
   dmlc::optional<double> posinf, neginf;
   DMLC_DECLARE_PARAMETER(NumpyNanToNumParam) {
-    DMLC_DECLARE_FIELD(copy)
-    .set_default(true)
-    .describe("Whether to create a copy of `x` (True) or to replace values"
-              "in-place (False). The in-place operation only occurs if"
-              "casting to an array does not require a copy."
-              "Default is True.");
-    DMLC_DECLARE_FIELD(nan)
-    .set_default(0.0)
-    .describe("Value to be used to fill NaN values. If no value is passed"
-              "then NaN values will be replaced with 0.0.");
+    DMLC_DECLARE_FIELD(copy).set_default(true).describe(
+        "Whether to create a copy of `x` (True) or to replace values"
+        "in-place (False). The in-place operation only occurs if"
+        "casting to an array does not require a copy."
+        "Default is True.");
+    DMLC_DECLARE_FIELD(nan).set_default(0.0).describe(
+        "Value to be used to fill NaN values. If no value is passed"
+        "then NaN values will be replaced with 0.0.");
     DMLC_DECLARE_FIELD(posinf)
-    .set_default(dmlc::optional<double>())
-    .describe("Value to be used to fill positive infinity values."
-              "If no value is passed then positive infinity values will be"
-              "replaced with a very large number.");
+        .set_default(dmlc::optional<double>())
+        .describe(
+            "Value to be used to fill positive infinity values."
+            "If no value is passed then positive infinity values will be"
+            "replaced with a very large number.");
     DMLC_DECLARE_FIELD(neginf)
-    .set_default(dmlc::optional<double>())
-    .describe("Value to be used to fill negative infinity values."
-              "If no value is passed then negative infinity values"
-              "will be replaced with a very small (or negative) number.");
+        .set_default(dmlc::optional<double>())
+        .describe(
+            "Value to be used to fill negative infinity values."
+            "If no value is passed then negative infinity values"
+            "will be replaced with a very small (or negative) number.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream copy_s, nan_s, posinf_s, neginf_s;
@@ -739,16 +742,16 @@ struct NumpyNanToNumParam : public dmlc::Parameter<NumpyNanToNumParam> {
     nan_s << nan;
     posinf_s << posinf;
     neginf_s << neginf;
-    (*dict)["copy"] = copy_s.str();
-    (*dict)["nan"] = nan_s.str();
+    (*dict)["copy"]   = copy_s.str();
+    (*dict)["nan"]    = nan_s.str();
     (*dict)["posinf"] = posinf_s.str();
     (*dict)["neginf"] = neginf_s.str();
   }
 };
 
-template<int req>
+template <int req>
 struct nan_to_num_forward {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i,
                                   DType* out_data,
                                   const DType* in_data,
@@ -756,14 +759,17 @@ struct nan_to_num_forward {
                                   const DType posinf,
                                   const DType neginf) {
     DType val = in_data[i];
-    if (mshadow_op::IsNan<DType>(val))  val = nan;
-    if (val > 0 && mshadow_op::IsInf(val))  val = posinf;
-    if (val < 0 && mshadow_op::IsInf(val))  val = neginf;
+    if (mshadow_op::IsNan<DType>(val))
+      val = nan;
+    if (val > 0 && mshadow_op::IsInf(val))
+      val = posinf;
+    if (val < 0 && mshadow_op::IsInf(val))
+      val = neginf;
     KERNEL_ASSIGN(out_data[i], req, val);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyNanToNumOpForward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -773,13 +779,14 @@ void NumpyNanToNumOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  mshadow::Stream<xpu>* s         = ctx.get_stream<xpu>();
+  const TBlob& in_data            = inputs[0];
+  const TBlob& out_data           = outputs[0];
   const NumpyNanToNumParam& param = nnvm::get<NumpyNanToNumParam>(attrs.parsed);
   using namespace mxnet_op;
 
-  if (!common::is_float(in_data.type_flag_) && req[0] == kWriteInplace) return;
+  if (!common::is_float(in_data.type_flag_) && req[0] == kWriteInplace)
+    return;
   if (!common::is_float(in_data.type_flag_)) {
     copy(s, out_data, in_data);
     return;
@@ -800,29 +807,36 @@ void NumpyNanToNumOpForward(const nnvm::NodeAttrs& attrs,
       neginf = mshadow::red::limits::MinValue<DType>();
     }
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<nan_to_num_forward<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-          defaultnan, posinf, neginf);
+      Kernel<nan_to_num_forward<req_type>, xpu>::Launch(s,
+                                                        out_data.Size(),
+                                                        out_data.dptr<DType>(),
+                                                        in_data.dptr<DType>(),
+                                                        defaultnan,
+                                                        posinf,
+                                                        neginf);
     });
   });
 }
 
-template<int req>
+template <int req>
 struct nan_to_num_backward {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(index_t i,
                                   DType* in_grad,
                                   const DType* out_grad,
                                   const DType* in_data) {
     DType val = out_grad[i];
-    if (mshadow_op::IsNan(in_data[i]))  val = 0;
-    if (val > 0 && mshadow_op::IsInf(in_data[i]))  val = 0;
-    if (val < 0 && mshadow_op::IsInf(in_data[i]))  val = 0;
+    if (mshadow_op::IsNan(in_data[i]))
+      val = 0;
+    if (val > 0 && mshadow_op::IsInf(in_data[i]))
+      val = 0;
+    if (val < 0 && mshadow_op::IsInf(in_data[i]))
+      val = 0;
     KERNEL_ASSIGN(in_grad[i], req, val);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void NumpyNanToNumOpBackward(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<TBlob>& inputs,
@@ -831,88 +845,88 @@ void NumpyNanToNumOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_NE(req[0], kWriteInplace);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& out_grad = inputs[0];
-  const TBlob& in_data = inputs[1];
-  const TBlob& in_grad = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob& out_grad   = inputs[0];
+  const TBlob& in_data    = inputs[1];
+  const TBlob& in_grad    = outputs[0];
   CHECK_EQ(common::is_float(in_data.type_flag_), true);
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(out_grad.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
       Kernel<nan_to_num_backward<req_type>, xpu>::Launch(
-          s, in_grad.Size(), in_grad.dptr<DType>(), out_grad.dptr<DType>(),
-          in_data.dptr<DType>());
+          s, in_grad.Size(), in_grad.dptr<DType>(), out_grad.dptr<DType>(), in_data.dptr<DType>());
     });
   });
 }
 
 /*! \brief Unary compute */
-#define MXNET_OPERATOR_REGISTER_UNARY(__name$)                      \
-  NNVM_REGISTER_OP(__name$)                                         \
-  .set_num_inputs(1)                                                \
-  .set_num_outputs(1)                                               \
-  .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>) \
-  .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)     \
-  .set_attr<nnvm::FInplaceOption>("FInplaceOption",                 \
-    [](const NodeAttrs& attrs){                                     \
-      return std::vector<std::pair<int, int> >{{0, 0}};             \
-    })                                                              \
-  .add_argument("data", "NDArray-or-Symbol", "The input array.")
+#define MXNET_OPERATOR_REGISTER_UNARY(__name$)                                            \
+  NNVM_REGISTER_OP(__name$)                                                               \
+      .set_num_inputs(1)                                                                  \
+      .set_num_outputs(1)                                                                 \
+      .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)                   \
+      .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)                       \
+      .set_attr<nnvm::FInplaceOption>("FInplaceOption",                                   \
+                                      [](const NodeAttrs& attrs) {                        \
+                                        return std::vector<std::pair<int, int> >{{0, 0}}; \
+                                      })                                                  \
+      .add_argument("data", "NDArray-or-Symbol", "The input array.")
 
 #if MSHADOW_USE_MKL == 1
-  /*! \bried MKL Unary compute.
-   *  With this macro means mxnet compile with MKL to accelerate math function with mkl.
-   *  Will Register FCompute with UnaryOp::MKL_Compute() to compelet the math function.
-  */
-  #define MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(__name$, __xpu$,                          \
-                                                         __kernel$, __mkl_kernel$)                 \
-    MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                         \
-    MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                             \
-    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1,                    \
-                                 false, true, true>)                                               \
-    .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::MKL_Compute<__kernel$, __mkl_kernel$>)   \
-    .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::ComputeEx<__xpu$, __kernel$>)
-
-  /*! \bried MKL Unary compute.
-   *  With this macro means mxnet compile with MKL to accelerate math function with mkl.
-   *  Will Register FCompute with UnaryOp::MKL_Compute() to compelet the math function.
-  */
-  #define MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_RSP(__name$, __xpu$, __kernel$, __mkl_kernel$)    \
-    MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                         \
-    MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                             \
-    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1,                    \
-                                 false, true, false>)                                              \
-    .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::MKL_Compute<__kernel$, __mkl_kernel$>)   \
-    .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::MKL_ComputeEx<__xpu$, __kernel$>)
-
-  #define MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(__name$, __xpu$, __kernel$,             \
-                                                           __mkl_kernel$)                          \
-    MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                         \
-    .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::MKL_Compute<__kernel$, __mkl_kernel$>)
+/*! \bried MKL Unary compute.
+ *  With this macro means mxnet compile with MKL to accelerate math function with mkl.
+ *  Will Register FCompute with UnaryOp::MKL_Compute() to compelet the math function.
+ */
+#define MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(__name$, __xpu$, __kernel$, __mkl_kernel$)  \
+  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                           \
+  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                               \
+      .set_attr<FInferStorageType>("FInferStorageType",                                            \
+                                   ElemwiseStorageType<1, 1, false, true, true>)                   \
+      .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::MKL_Compute<__kernel$, __mkl_kernel$>) \
+      .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::ComputeEx<__xpu$, __kernel$>)
+
+/*! \bried MKL Unary compute.
+ *  With this macro means mxnet compile with MKL to accelerate math function with mkl.
+ *  Will Register FCompute with UnaryOp::MKL_Compute() to compelet the math function.
+ */
+#define MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_RSP(__name$, __xpu$, __kernel$, __mkl_kernel$)      \
+  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                           \
+  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                               \
+      .set_attr<FInferStorageType>("FInferStorageType",                                            \
+                                   ElemwiseStorageType<1, 1, false, true, false>)                  \
+      .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::MKL_Compute<__kernel$, __mkl_kernel$>) \
+      .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::MKL_ComputeEx<__xpu$, __kernel$>)
+
+#define MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(    \
+    __name$, __xpu$, __kernel$, __mkl_kernel$)               \
+  MXNET_OPERATOR_REGISTER_UNARY(__name$).set_attr<FCompute>( \
+      "FCompute<" #__xpu$ ">", UnaryOp::MKL_Compute<__kernel$, __mkl_kernel$>)
 #endif
 
 /*! \brief Unary compute, with FComputeEx for csr and rsp available  */
-#define MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(__name$, __xpu$, __kernel$)                     \
-  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                           \
-  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                               \
-  .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)  \
-  .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::Compute<__xpu$, __kernel$>)                \
-  .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::ComputeEx<__xpu$, __kernel$>)
+#define MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(__name$, __xpu$, __kernel$)          \
+  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                \
+  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                    \
+      .set_attr<FInferStorageType>("FInferStorageType",                                 \
+                                   ElemwiseStorageType<1, 1, false, true, true>)        \
+      .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::Compute<__xpu$, __kernel$>) \
+      .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::ComputeEx<__xpu$, __kernel$>)
 
 /*! \brief Unary compute, with FComputeEx for rsp available  */
-#define MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP(__name$, __xpu$, __kernel$)                         \
-  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                           \
-  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                               \
-  .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, false>) \
-  .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::Compute<__xpu$, __kernel$>)                \
-  .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::ComputeEx<__xpu$, __kernel$>)
+#define MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP(__name$, __xpu$, __kernel$)              \
+  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                \
+  MXNET_ADD_SPARSE_OP_ALIAS(__name$)                                                    \
+      .set_attr<FInferStorageType>("FInferStorageType",                                 \
+                                   ElemwiseStorageType<1, 1, false, true, false>)       \
+      .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::Compute<__xpu$, __kernel$>) \
+      .set_attr<FComputeEx>("FComputeEx<" #__xpu$ ">", UnaryOp::ComputeEx<__xpu$, __kernel$>)
 
 /*! \brief Unary compute, dense result.
  *  FInferStorageType attr is not set using this macro. By default DefaultStorageType is used.
  */
-#define MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(__name$, __xpu$, __kernel$)        \
-  MXNET_OPERATOR_REGISTER_UNARY(__name$)                                                \
-  .set_attr<FCompute>("FCompute<" #__xpu$ ">", UnaryOp::Compute<__xpu$, __kernel$>)
+#define MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(__name$, __xpu$, __kernel$)     \
+  MXNET_OPERATOR_REGISTER_UNARY(__name$).set_attr<FCompute>("FCompute<" #__xpu$ ">", \
+                                                            UnaryOp::Compute<__xpu$, __kernel$>)
 
 #if MXNET_USE_CUDA
 
diff --git a/src/operator/tensor/elemwise_unary_op_basic.cc b/src/operator/tensor/elemwise_unary_op_basic.cc
index 079b9873d434..0e8f61a1d930 100644
--- a/src/operator/tensor/elemwise_unary_op_basic.cc
+++ b/src/operator/tensor/elemwise_unary_op_basic.cc
@@ -33,14 +33,14 @@ namespace op {
 static bool IdentityAttrLikeRhsStorageType(const nnvm::NodeAttrs& attrs,
                                            const int dev_mask,
                                            DispatchMode* dispatch_mode,
-                                           std::vector<int> *in_attrs,
-                                           std::vector<int> *out_attrs) {
+                                           std::vector<int>* in_attrs,
+                                           std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const auto& rhs_stype = in_attrs->at(1);
-  auto& lhs_stype = in_attrs->at(0);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
+  auto& lhs_stype       = in_attrs->at(0);
+  auto& out_stype       = out_attrs->at(0);
+  bool dispatched       = false;
 
   CHECK_NE(rhs_stype, kUndefinedStorage);
   type_assign(&out_stype, rhs_stype);
@@ -48,20 +48,24 @@ static bool IdentityAttrLikeRhsStorageType(const nnvm::NodeAttrs& attrs,
   if (!dispatched && lhs_stype == kDefaultStorage && rhs_stype == kDefaultStorage &&
       out_stype == kDefaultStorage) {
     // dns, dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && (lhs_stype == kRowSparseStorage || lhs_stype == kCSRStorage) &&
       (lhs_stype == out_stype)) {
     // rsp, _ -> rsp, or csr, _ -> csr
-    dispatched = storage_type_assign(&out_stype, static_cast<NDArrayStorageType>(out_stype),
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(&out_stype,
+                                     static_cast<NDArrayStorageType>(out_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
   }
   if (!dispatched && (lhs_stype == kRowSparseStorage || lhs_stype == kCSRStorage) &&
       (out_stype == kDefaultStorage)) {
     // rsp/csr, _ -> dns
-    dispatched = storage_type_assign(&out_stype, static_cast<NDArrayStorageType>(out_stype),
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(&out_stype,
+                                     static_cast<NDArrayStorageType>(out_stype),
+                                     dispatch_mode,
+                                     DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -71,7 +75,7 @@ static bool IdentityAttrLikeRhsStorageType(const nnvm::NodeAttrs& attrs,
 
 // relu
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(relu, cpu, mshadow_op::relu)
-.describe(R"code(Computes rectified linear activation.
+    .describe(R"code(Computes rectified linear activation.
 
 .. math::
    max(features, 0)
@@ -83,33 +87,41 @@ The storage type of ``relu`` output depends upon the input storage type:
    - relu(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_relu"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_relu"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_relu, unary_bwd<mshadow_op::relu_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      std::vector<nnvm::NodeEntry> ret;
-      // ograds[0]: dL/dxgrad
-      // inputs[0]: dL/dy
-      // inputs[1]: y
-      // f(x) -> relu(x)
-      // f'(x) = 1 if x > 0 else 0
-      // f''(x) = 0
-      auto dydx = MakeNode("_greater", n->attrs.name + "_dydx",
-          {n->inputs[1], nnvm::NodeEntry{
-            MakeNode("zeros_like", n->attrs.name + "tmp", {n->inputs[1]}, nullptr, &n)
-          }}, nullptr, &n);
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry(dydx)}, nullptr, &n));
-      ret.emplace_back(MakeNode("zeros_like", n->attrs.name + "_backward_grad_grad_in",
-                                {n->inputs[1]}, nullptr, &n));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> ret;
+          // ograds[0]: dL/dxgrad
+          // inputs[0]: dL/dy
+          // inputs[1]: y
+          // f(x) -> relu(x)
+          // f'(x) = 1 if x > 0 else 0
+          // f''(x) = 0
+          auto dydx =
+              MakeNode("_greater",
+                       n->attrs.name + "_dydx",
+                       {n->inputs[1],
+                        nnvm::NodeEntry{MakeNode(
+                            "zeros_like", n->attrs.name + "tmp", {n->inputs[1]}, nullptr, &n)}},
+                       nullptr,
+                       &n);
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry(dydx)},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode(
+              "zeros_like", n->attrs.name + "_backward_grad_grad_in", {n->inputs[1]}, nullptr, &n));
+          return ret;
+        });
 
 // sigmoid
 MXNET_OPERATOR_REGISTER_UNARY(sigmoid)
 MXNET_ADD_SPARSE_OP_ALIAS(sigmoid)
-.describe(R"code(Computes sigmoid of x element-wise.
+    .describe(R"code(Computes sigmoid of x element-wise.
 
 .. math::
    y = 1 / (1 + exp(-x))
@@ -117,42 +129,60 @@ MXNET_ADD_SPARSE_OP_ALIAS(sigmoid)
 The storage type of ``sigmoid`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::sigmoid>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_sigmoid"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::sigmoid>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_sigmoid"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_sigmoid,
                                                unary_bwd<mshadow_op::sigmoid_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // n->inputs[0] : y_grad
-      // n->inputs[1] : f(x) = sigmoid(x)
-      // ograds[0] : head_grads
-      // f''(x) = f'(x) * (1 - 2*f(x))
-      // NodeEntry{n} : y_grad * f'(x)
-      auto ones = MakeNode("ones_like", n->attrs.name + "_grad_ones", {n->inputs[1]}, nullptr, &n);
-      const std::unordered_map<std::string, std::string> args = {{"scalar", "2.0"}};
-      auto two_y = MakeNode("_mul_scalar", n->attrs.name + "_mul_two", {n->inputs[1]}, &args, &n);
-      auto one_minus_two_y = MakeNode("elemwise_sub", n->attrs.name + "_grad_sub",
-                                    {nnvm::NodeEntry{ones}, nnvm::NodeEntry{two_y}}, nullptr, &n);
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_grad_mul",
-                                    {n->inputs[0], nnvm::NodeEntry{one_minus_two_y}}, nullptr, &n);
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_grad_div",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      // when building gradient graph, the backward node of n->inputs[1] will be
-      // added to the graph again, therefore f`(x) will be multiplied
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // n->inputs[0] : y_grad
+          // n->inputs[1] : f(x) = sigmoid(x)
+          // ograds[0] : head_grads
+          // f''(x) = f'(x) * (1 - 2*f(x))
+          // NodeEntry{n} : y_grad * f'(x)
+          auto ones =
+              MakeNode("ones_like", n->attrs.name + "_grad_ones", {n->inputs[1]}, nullptr, &n);
+          const std::unordered_map<std::string, std::string> args = {{"scalar", "2.0"}};
+          auto two_y =
+              MakeNode("_mul_scalar", n->attrs.name + "_mul_two", {n->inputs[1]}, &args, &n);
+          auto one_minus_two_y = MakeNode("elemwise_sub",
+                                          n->attrs.name + "_grad_sub",
+                                          {nnvm::NodeEntry{ones}, nnvm::NodeEntry{two_y}},
+                                          nullptr,
+                                          &n);
+          auto grad_grad_mid   = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_grad_mul",
+                                        {n->inputs[0], nnvm::NodeEntry{one_minus_two_y}},
+                                        nullptr,
+                                        &n);
+          auto dydx            = MakeNode("elemwise_div",
+                               n->attrs.name + "_grad_div",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          // when building gradient graph, the backward node of n->inputs[1] will be
+          // added to the graph again, therefore f`(x) will be multiplied
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // log_sigmoid
 MXNET_OPERATOR_REGISTER_UNARY(log_sigmoid)
 MXNET_ADD_SPARSE_OP_ALIAS(log_sigmoid)
-.describe(R"code(Computes log_sigmoid of x element-wise.
+    .describe(R"code(Computes log_sigmoid of x element-wise.
 
 .. math::
    y = log(1 / (1 + exp(-x)))
@@ -160,40 +190,57 @@ MXNET_ADD_SPARSE_OP_ALIAS(log_sigmoid)
 The storage type of ``log_sigmoid`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::log_sigmoid>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_log_sigmoid"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::log_sigmoid>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_log_sigmoid"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_log_sigmoid,
                                                unary_bwd<mshadow_op::log_sigmoid_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // n->inputs[0] : y_grad
-      // n->inputs[1] : f(x) = log_sigmoid(x)
-      // ograds[0] : head_grads
-      // f''(x) = f'(x) * (f'(x) - 1)
-      // NodeEntry{n} : y_grad * f'(x)
-      auto ones = MakeNode("ones_like", n->attrs.name + "_grad_ones", {n->inputs[1]}, nullptr, &n);
-      auto grad_minus_one = MakeNode("elemwise_sub", n->attrs.name + "_grad_sub",
-                                    {n->inputs[0], nnvm::NodeEntry{ones}}, nullptr, &n);
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_grad_mul",
-                                    {n->inputs[0], nnvm::NodeEntry{grad_minus_one}}, nullptr, &n);
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_grad_div",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      // when building gradient graph, the backward node of n->inputs[1] will be
-      // added to the graph again, therefore f`(x) will be multiplied
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // n->inputs[0] : y_grad
+          // n->inputs[1] : f(x) = log_sigmoid(x)
+          // ograds[0] : head_grads
+          // f''(x) = f'(x) * (f'(x) - 1)
+          // NodeEntry{n} : y_grad * f'(x)
+          auto ones =
+              MakeNode("ones_like", n->attrs.name + "_grad_ones", {n->inputs[1]}, nullptr, &n);
+          auto grad_minus_one = MakeNode("elemwise_sub",
+                                         n->attrs.name + "_grad_sub",
+                                         {n->inputs[0], nnvm::NodeEntry{ones}},
+                                         nullptr,
+                                         &n);
+          auto grad_grad_mid  = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_grad_mul",
+                                        {n->inputs[0], nnvm::NodeEntry{grad_minus_one}},
+                                        nullptr,
+                                        &n);
+          auto dydx           = MakeNode("elemwise_div",
+                               n->attrs.name + "_grad_div",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          // when building gradient graph, the backward node of n->inputs[1] will be
+          // added to the graph again, therefore f`(x) will be multiplied
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // mish
 MXNET_OPERATOR_REGISTER_UNARY(mish)
 MXNET_ADD_SPARSE_OP_ALIAS(mish)
-.describe(R"code(Computes mish of x element-wise.
+    .describe(R"code(Computes mish of x element-wise.
 
 .. math::
    y = x * tanh(log(1 + exp(x)))
@@ -201,45 +248,42 @@ MXNET_ADD_SPARSE_OP_ALIAS(mish)
 The storage type of ``mish`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::mish>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mish"});
-
-MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_mish,
-                                               unary_bwd<mshadow_op::mish_grad>);
-
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::mish>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_mish"});
 
+MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_mish, unary_bwd<mshadow_op::mish_grad>);
 
 DMLC_REGISTER_PARAMETER(HardSigmoidParam);
 MXNET_OPERATOR_REGISTER_UNARY(hard_sigmoid)
-.describe(R"code(Computes hard sigmoid of x element-wise.
+    .describe(R"code(Computes hard sigmoid of x element-wise.
 
 .. math::
    y = max(0, min(1, alpha * x + beta))
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<HardSigmoidParam>)
-.set_attr<FCompute>("FCompute<cpu>", HardSigmoidForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_hard_sigmoid"})
-.add_arguments(HardSigmoidParam::__FIELDS__());
+    .set_attr_parser(ParamParser<HardSigmoidParam>)
+    .set_attr<FCompute>("FCompute<cpu>", HardSigmoidForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_hard_sigmoid"})
+    .add_arguments(HardSigmoidParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_hard_sigmoid)
-.set_attr_parser(ParamParser<HardSigmoidParam>)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<FCompute>("FCompute<cpu>", HardSigmoidBackward<cpu>);
+    .set_attr_parser(ParamParser<HardSigmoidParam>)
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", HardSigmoidBackward<cpu>);
 
 // softsign
 MXNET_OPERATOR_REGISTER_UNARY(softsign)
-.describe(R"code(Computes softsign of x element-wise.
+    .describe(R"code(Computes softsign of x element-wise.
 
 .. math::
    y = x / (1 + abs(x))
@@ -247,15 +291,14 @@ MXNET_OPERATOR_REGISTER_UNARY(softsign)
 The storage type of ``softsign`` output is always dense
 
 )code" ADD_FILELINE)
-  .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::softsign>)
-  .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_softsign"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::softsign>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_softsign"});
 
-NNVM_REGISTER_OP(softsign)
-.add_alias("_npx_softsign");
+NNVM_REGISTER_OP(softsign).add_alias("_npx_softsign");
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_softsign)
-.set_attr<FCompute>("FCompute<cpu>", ElemwiseBinaryOp::Compute<cpu,
-  unary_bwd<mshadow_op::softsign_grad> >);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::softsign_grad>>);
 
 // copy
 static void CopyEx(const nnvm::NodeAttrs& attrs,
@@ -266,7 +309,7 @@ static void CopyEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
 #if MXNET_USE_ONEDNN == 1
-  const auto in_stype = inputs[0].storage_type();
+  const auto in_stype  = inputs[0].storage_type();
   const auto out_stype = outputs[0].storage_type();
   if (inputs[0].IsMKLDNNData()) {
     MKLDNNRun(MKLDNNCopy, attrs, ctx, inputs[0], req[0], outputs[0]);
@@ -283,18 +326,17 @@ static void CopyEx(const nnvm::NodeAttrs& attrs,
 static inline bool CopyStorageType(const nnvm::NodeAttrs& attrs,
                                    const int dev_mask,
                                    DispatchMode* dispatch_mode,
-                                   std::vector<int> *in_attrs,
-                                   std::vector<int> *out_attrs) {
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
-  bool ret = ElemwiseStorageType<1, 1, false, true, true>(attrs, dev_mask, dispatch_mode,
-                                                          in_attrs, out_attrs);
+  bool ret = ElemwiseStorageType<1, 1, false, true, true>(
+      attrs, dev_mask, dispatch_mode, in_attrs, out_attrs);
 #if MXNET_USE_ONEDNN == 1
   // We have to make sure all inputs are default layouts. Otherwise, we might
   // want to fallback.
-  if (dev_mask == mshadow::cpu::kDevMask
-      && in_attrs->at(0) == kDefaultStorage
-      && out_attrs->at(0) == kDefaultStorage) {
+  if (dev_mask == mshadow::cpu::kDevMask && in_attrs->at(0) == kDefaultStorage &&
+      out_attrs->at(0) == kDefaultStorage) {
     *dispatch_mode = DispatchMode::kFComputeEx;
   }
 #endif  // MXNET_USE_ONEDNN == 1
@@ -302,64 +344,64 @@ static inline bool CopyStorageType(const nnvm::NodeAttrs& attrs,
 }
 
 MXNET_OPERATOR_REGISTER_UNARY(_copy)
-.MXNET_DESCRIBE("Returns a copy of the input.")
-.add_alias("identity")
-.set_attr<FInferStorageType>("FInferStorageType", CopyStorageType)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", CopyEx)
+    .MXNET_DESCRIBE("Returns a copy of the input.")
+    .add_alias("identity")
+    .set_attr<FInferStorageType>("FInferStorageType", CopyStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", CopyEx)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<bool>("TIsMKLDNN", true)
 #endif  // MXNET_USE_ONEDNN == 1
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"});
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_copy"});
 
 NNVM_REGISTER_OP(_backward_copy)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FInferStorageType>("FInferStorageType", CopyStorageType)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", CopyEx)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FInferStorageType>("FInferStorageType", CopyStorageType)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", CopyEx)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})  // MXNET_USE_ONEDNN == 1
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })  // MXNET_USE_ONEDNN == 1
 #endif
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  });
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity", [](const NodeAttrs& attrs) {
+      return std::vector<bool>{true};
+    });
 
 NNVM_REGISTER_OP(_backward_reshape)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-                                [](const NodeAttrs& attrs){
-                                  return std::vector<std::pair<int, int> >{{0, 0}};
-                                })
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-                                  [](const NodeAttrs& attrs){
-                                    return std::vector<bool>{true};
-                                  });
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity", [](const NodeAttrs& attrs) {
+      return std::vector<bool>{true};
+    });
 
 MXNET_OPERATOR_REGISTER_UNARY(BlockGrad)
 MXNET_ADD_SPARSE_OP_ALIAS(stop_gradient)
-.add_alias("_npx_stop_gradient")
-.add_alias("stop_gradient")
-.describe(R"code(Stops gradient computation.
+    .add_alias("_npx_stop_gradient")
+    .add_alias("stop_gradient")
+    .describe(R"code(Stops gradient computation.
 
 Stops the accumulated gradient of the inputs from flowing through this operator
 in the backward direction. In other words, this operator prevents the contribution
@@ -385,18 +427,18 @@ Example::
   [ 1.  1.]
 
 )code" ADD_FILELINE)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeEx<cpu>)
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeEx<cpu>)
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 MXNET_OPERATOR_REGISTER_UNARY(make_loss)
 MXNET_ADD_SPARSE_OP_ALIAS(make_loss)
-  .describe(R"code(Make your own loss function in network construction.
+    .describe(R"code(Make your own loss function in network construction.
 
 This operator accepts a customized loss function symbol as a terminal loss and
 the symbol should be an operator with no backward dependency.
@@ -418,62 +460,72 @@ The storage type of ``make_loss`` output depends upon the input storage type:
    - make_loss(row_sparse) = row_sparse
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FListOutputNames>("FListOutputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"loss"};
-  })
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeEx<cpu>)
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(MakeNode("ones_like", n->attrs.name + "_backward",
-                     &(n->inputs), nullptr, &n));
-    return ret;
-  });
+    .set_attr<nnvm::FListOutputNames>("FListOutputNames",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<std::string>{"loss"};
+                                      })
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeEx<cpu>)
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(
+              MakeNode("ones_like", n->attrs.name + "_backward", &(n->inputs), nullptr, &n));
+          return ret;
+        });
 
 // identity output as first input, but attributes (shape and type) are constrained to be like rhs
 // storage type attribute is not constrained to be like rhs if it is already defined
 // for internal use only
 NNVM_REGISTER_OP(_identity_with_attr_like_rhs)
-.set_num_inputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) { return std::vector<std::string>{"lhs", "rhs"}; })
-.set_attr<nnvm::FInplaceOption>(
-    "FInplaceOption", [](const NodeAttrs& attrs) {
-      return std::vector<std::pair<int, int> >{{0, 0}};
-    })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-    [](const NodeAttrs& attrs){ return std::vector<bool>{true}; })
-.set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
-    [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 1); })
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeFirstItemEx<cpu>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", IdentityAttrLikeRhsStorageType)
-.set_attr<nnvm::FGradient>(
-    "FGradient",  [](const nnvm::ObjectPtr& n,
-                     const std::vector<nnvm::NodeEntry>& ograds) {
-      if (CheckGradAllZero(ograds)) return MakeZeroGradNodes(n, ograds);
-      std::vector<nnvm::NodeEntry> lhs = MakeGradNode("_backward_copy", n, ograds,
-                              std::unordered_map<std::string, std::string>());
-      lhs.emplace_back(MakeNode("zeros_like", n->attrs.name + "_rhs_backward",
-                         {n->inputs[1]}, nullptr, &n));
-      return lhs;
-    })
-.add_argument("lhs", "NDArray-or-Symbol", "First input.")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input.");
-
-void ReshapeLikeRangeCanonicalize(int ndims, const char *side,
-                                  const dmlc::optional<int> &begin,
-                                  const dmlc::optional<int> &end, int *cbegin,
-                                  int *cend) {
+    .set_num_inputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>(1, 1);
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", UnaryOp::IdentityComputeFirstItemEx<cpu>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<2, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", IdentityAttrLikeRhsStorageType)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          if (CheckGradAllZero(ograds))
+            return MakeZeroGradNodes(n, ograds);
+          std::vector<nnvm::NodeEntry> lhs = MakeGradNode(
+              "_backward_copy", n, ograds, std::unordered_map<std::string, std::string>());
+          lhs.emplace_back(
+              MakeNode("zeros_like", n->attrs.name + "_rhs_backward", {n->inputs[1]}, nullptr, &n));
+          return lhs;
+        })
+    .add_argument("lhs", "NDArray-or-Symbol", "First input.")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input.");
+
+void ReshapeLikeRangeCanonicalize(int ndims,
+                                  const char* side,
+                                  const dmlc::optional<int>& begin,
+                                  const dmlc::optional<int>& end,
+                                  int* cbegin,
+                                  int* cend) {
   *cbegin = begin.has_value() ? begin.value() : 0;
   if (*cbegin < 0)
     *cbegin += ndims;
@@ -488,37 +540,39 @@ void ReshapeLikeRangeCanonicalize(int ndims, const char *side,
   }
   CHECK(*cend <= ndims) << "Invalid end for " << side << "_end=" << end
                         << " as dimension number is " << ndims;
-  CHECK((*cbegin < *cend)) << "Invalid begin, end, get " << side
-                           << "_begin=" << begin << ", " << side
-                           << "_end=" << end;
+  CHECK((*cbegin < *cend)) << "Invalid begin, end, get " << side << "_begin=" << begin << ", "
+                           << side << "_end=" << end;
 
   CHECK(*cend >= 0) << "Invalid end for " << side << "_end=" << end;
   CHECK(*cbegin >= 0) << "Invalid begin for " << side << "_begin=" << begin;
 }
 
-void GetReshapeLikeParams(const ReshapeLikeParam &param, const mxnet::TShape &lshape,
-                          const mxnet::TShape &rshape, int *lhs_begin, int *lhs_end,
-                          int *rhs_begin, int *rhs_end) {
+void GetReshapeLikeParams(const ReshapeLikeParam& param,
+                          const mxnet::TShape& lshape,
+                          const mxnet::TShape& rshape,
+                          int* lhs_begin,
+                          int* lhs_end,
+                          int* rhs_begin,
+                          int* rhs_end) {
   // LHS params
-  ReshapeLikeRangeCanonicalize(lshape.ndim(), "lhs", param.lhs_begin,
-                               param.lhs_end, lhs_begin, lhs_end);
+  ReshapeLikeRangeCanonicalize(
+      lshape.ndim(), "lhs", param.lhs_begin, param.lhs_end, lhs_begin, lhs_end);
   // RHS params
-  ReshapeLikeRangeCanonicalize(rshape.ndim(), "rhs", param.rhs_begin,
-                               param.rhs_end, rhs_begin, rhs_end);
+  ReshapeLikeRangeCanonicalize(
+      rshape.ndim(), "rhs", param.rhs_begin, param.rhs_end, rhs_begin, rhs_end);
 }
 
-bool ReshapeLikeShapeCompute(const nnvm::NodeAttrs &attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
-  const ReshapeLikeParam &param = nnvm::get<ReshapeLikeParam>(attrs.parsed);
-  const mxnet::TShape &lshape = (*in_attrs)[0];
-  const mxnet::TShape &rshape = (*in_attrs)[1];
+bool ReshapeLikeShapeCompute(const nnvm::NodeAttrs& attrs,
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
+  const ReshapeLikeParam& param = nnvm::get<ReshapeLikeParam>(attrs.parsed);
+  const mxnet::TShape& lshape   = (*in_attrs)[0];
+  const mxnet::TShape& rshape   = (*in_attrs)[1];
   int lhs_begin, lhs_end, rhs_begin, rhs_end;
-  GetReshapeLikeParams(param, lshape, rshape, &lhs_begin, &lhs_end, &rhs_begin,
-                       &rhs_end);
+  GetReshapeLikeParams(param, lshape, rshape, &lhs_begin, &lhs_end, &rhs_begin, &rhs_end);
 
   int lhsrank = lshape.ndim();
-  int orank = lhsrank + (rhs_end - rhs_begin) - (lhs_end - lhs_begin);
+  int orank   = lhsrank + (rhs_end - rhs_begin) - (lhs_end - lhs_begin);
   mxnet::TShape oshape(orank, -1);
 
   for (int i = 0; i < lhs_begin; ++i)
@@ -545,7 +599,8 @@ bool ReshapeLikeShapeCompute(const nnvm::NodeAttrs &attrs,
 
 DMLC_REGISTER_PARAMETER(ReshapeLikeParam);
 NNVM_REGISTER_OP(reshape_like)
-.describe(R"code(Reshape some or all dimensions of `lhs` to have the same shape as some or all dimensions of `rhs`.
+    .describe(
+        R"code(Reshape some or all dimensions of `lhs` to have the same shape as some or all dimensions of `rhs`.
 
 Returns a **view** of the `lhs` array with a new shape without altering any data.
 
@@ -571,44 +626,51 @@ Negative indices are supported, and `None` can be used for either `lhs_end` or `
   - lhs shape = (30, 12), rhs shape = (4, 2, 2, 3), lhs_begin=-1, lhs_end=None, rhs_begin=1, rhs_end=None, output shape = (30, 2, 2, 3)
 
 )code" ADD_FILELINE)
-.add_alias("_npx_reshape_like")
-.set_num_inputs(2)
-.set_attr_parser(ParamParser<ReshapeLikeParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) { return std::vector<std::string>{"lhs", "rhs"}; })
-.set_attr<nnvm::FInplaceOption>(
-    "FInplaceOption", [](const NodeAttrs& attrs) {
-      return std::vector<std::pair<int, int> >{{0, 0}};
-    })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-    [](const NodeAttrs& attrs){ return std::vector<bool>{true}; })
-.set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
-    [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 1); })
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<mxnet::FInferShape>("FInferShape", ReshapeLikeShapeCompute)
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-    CHECK_EQ(in_attrs->size(), 2) << " in operator " << attrs.name;
-    std::vector<int> checked_in_attrs = { (*in_attrs)[0] };
-    bool ret = !type_is_none((*in_attrs)[1]) &&
-               ElemwiseType<1, 1>(attrs, &checked_in_attrs, out_attrs);
-    (*in_attrs)[0] = checked_in_attrs[0];
-    return ret;
-  })
-.set_attr<nnvm::FGradient>(
-    "FGradient",  [](const nnvm::ObjectPtr& n,
-                     const std::vector<nnvm::NodeEntry>& ograds) {
-      if (CheckGradAllZero(ograds)) return MakeZeroGradNodes(n, ograds);
-      std::vector<nnvm::NodeEntry> lhs = MakeGradNode("_backward_copy", n, ograds,
-                              std::unordered_map<std::string, std::string>());
-      lhs.emplace_back(MakeNode("zeros_like", n->attrs.name + "_rhs_backward",
-                         {n->inputs[1]}, nullptr, &n));
-      return lhs;
-    })
-.add_argument("lhs", "NDArray-or-Symbol", "First input.")
-.add_argument("rhs", "NDArray-or-Symbol", "Second input.")
-.add_arguments(ReshapeLikeParam::__FIELDS__());
+    .add_alias("_npx_reshape_like")
+    .set_num_inputs(2)
+    .set_attr_parser(ParamParser<ReshapeLikeParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>(1, 1);
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ReshapeLikeShapeCompute)
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_attrs, std::vector<int>* out_attrs) {
+          CHECK_EQ(in_attrs->size(), 2) << " in operator " << attrs.name;
+          std::vector<int> checked_in_attrs = {(*in_attrs)[0]};
+          bool ret                          = !type_is_none((*in_attrs)[1]) &&
+                     ElemwiseType<1, 1>(attrs, &checked_in_attrs, out_attrs);
+          (*in_attrs)[0] = checked_in_attrs[0];
+          return ret;
+        })
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          if (CheckGradAllZero(ograds))
+            return MakeZeroGradNodes(n, ograds);
+          std::vector<nnvm::NodeEntry> lhs = MakeGradNode(
+              "_backward_copy", n, ograds, std::unordered_map<std::string, std::string>());
+          lhs.emplace_back(
+              MakeNode("zeros_like", n->attrs.name + "_rhs_backward", {n->inputs[1]}, nullptr, &n));
+          return lhs;
+        })
+    .add_argument("lhs", "NDArray-or-Symbol", "First input.")
+    .add_argument("rhs", "NDArray-or-Symbol", "Second input.")
+    .add_arguments(ReshapeLikeParam::__FIELDS__());
 
 void ShapeComputeCPU(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
@@ -618,46 +680,46 @@ void ShapeComputeCPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const TBlob& in_data = inputs[0];
+  const TBlob& in_data  = inputs[0];
   const TBlob& out_data = outputs[0];
-  size_t type_size = mshadow::mshadow_sizeof(out_data.type_flag_);
+  size_t type_size      = mshadow::mshadow_sizeof(out_data.type_flag_);
   memcpy(out_data.dptr_, in_data.shape_.data(), in_data.ndim() * type_size);
 }
 
 NNVM_REGISTER_OP(shape_array)
-.add_alias("_npx_shape_array")
-.describe(R"code(Returns a 1D int64 array containing the shape of data.
+    .add_alias("_npx_shape_array")
+    .describe(R"code(Returns a 1D int64 array containing the shape of data.
 
 Example::
 
   shape_array([[1,2,3,4], [5,6,7,8]]) = [2,4]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<FCompute>("FCompute<cpu>", ShapeComputeCPU)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     mxnet::ShapeVector *in_attrs,
-     mxnet::ShapeVector *out_attrs) {
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    mxnet::TShape target_shape(1, -1);
-    target_shape[0] = in_attrs->at(0).ndim();
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, target_shape);
-    return !shape_is_none(out_attrs->at(0));
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int>* in_attrs,
-     std::vector<int>* out_attrs) {
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
-    return out_attrs->at(0) != -1;
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input Array.");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<FCompute>("FCompute<cpu>", ShapeComputeCPU)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
+                                    CHECK_EQ(in_attrs->size(), 1U);
+                                    CHECK_EQ(out_attrs->size(), 1U);
+                                    mxnet::TShape target_shape(1, -1);
+                                    target_shape[0] = in_attrs->at(0).ndim();
+                                    SHAPE_ASSIGN_CHECK(*out_attrs, 0, target_shape);
+                                    return !shape_is_none(out_attrs->at(0));
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 1U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
+                                  return out_attrs->at(0) != -1;
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "Input Array.");
 
 void SizeComputeCPU(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
@@ -669,51 +731,51 @@ void SizeComputeCPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  size_t type_size = mshadow::mshadow_sizeof(out_data.type_flag_);
+  const TBlob& in_data   = inputs[0];
+  const TBlob& out_data  = outputs[0];
+  size_t type_size       = mshadow::mshadow_sizeof(out_data.type_flag_);
   const index_t size_var = in_data.Size();
   memcpy(out_data.dptr_, &size_var, type_size);
 }
 
 NNVM_REGISTER_OP(size_array)
-.describe(R"code(Returns a 1D int64 array containing the size of data.
+    .describe(R"code(Returns a 1D int64 array containing the size of data.
 
 Example::
 
   size_array([[1,2,3,4], [5,6,7,8]]) = [8]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<FCompute>("FCompute<cpu>", SizeComputeCPU)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     mxnet::ShapeVector *in_attrs,
-     mxnet::ShapeVector *out_attrs) {
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(1, 1));
-    return !shape_is_none(out_attrs->at(0));
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int>* in_attrs,
-     std::vector<int>* out_attrs) {
-    CHECK_EQ(in_attrs->size(), 1U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
-    return out_attrs->at(0) != -1;
-  })
-.add_argument("data", "NDArray-or-Symbol", "Input Array.");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<FCompute>("FCompute<cpu>", SizeComputeCPU)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<mxnet::FInferShape>("FInferShape",
+                                  [](const nnvm::NodeAttrs& attrs,
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
+                                    CHECK_EQ(in_attrs->size(), 1U);
+                                    CHECK_EQ(out_attrs->size(), 1U);
+                                    SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(1, 1));
+                                    return !shape_is_none(out_attrs->at(0));
+                                  })
+    .set_attr<nnvm::FInferType>("FInferType",
+                                [](const nnvm::NodeAttrs& attrs,
+                                   std::vector<int>* in_attrs,
+                                   std::vector<int>* out_attrs) {
+                                  CHECK_EQ(in_attrs->size(), 1U);
+                                  CHECK_EQ(out_attrs->size(), 1U);
+                                  TYPE_ASSIGN_CHECK(*out_attrs, 0, mshadow::kInt64);
+                                  return out_attrs->at(0) != -1;
+                                })
+    .add_argument("data", "NDArray-or-Symbol", "Input Array.");
 
 DMLC_REGISTER_PARAMETER(CastParam);
 NNVM_REGISTER_OP(Cast)
-.add_alias("cast")
-.add_alias("_npi_cast")
-.add_alias("_npx_cast")
-.describe(R"code(Casts all elements of the input to a new type.
+    .add_alias("cast")
+    .add_alias("_npi_cast")
+    .add_alias("_npx_cast")
+    .describe(R"code(Casts all elements of the input to a new type.
 
 .. note:: ``Cast`` is deprecated. Use ``cast`` instead.
 
@@ -724,37 +786,37 @@ Example::
    cast([300, 11.1, 10.9, -1, -3], dtype='uint8') = [44, 11, 10, 255, 253]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<CastParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", CastType)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<FCompute>("FCompute<cpu>", CastCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_cast"})
-.add_argument("data", "NDArray-or-Symbol", "The input.")
-.add_arguments(CastParam::__FIELDS__());
+    .set_attr_parser(ParamParser<CastParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", CastType)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", CastCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_cast"})
+    .add_argument("data", "NDArray-or-Symbol", "The input.")
+    .add_arguments(CastParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_cast)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<FCompute>("FCompute<cpu>", CastCompute<cpu>);
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<FCompute>("FCompute<cpu>", CastCompute<cpu>);
 
 // negative
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(negative, cpu, mshadow_op::negation)
-.describe(R"code(Numerical negative of the argument, element-wise.
+    .describe(R"code(Numerical negative of the argument, element-wise.
 
 The storage type of ``negative`` output depends upon the input storage type:
 
@@ -763,11 +825,11 @@ The storage type of ``negative`` output depends upon the input storage type:
    - negative(csr) = csr
 
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"negative"});
 
 // abs
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(abs, cpu, mshadow_op::abs)
-.describe(R"code(Returns element-wise absolute value of the input.
+    .describe(R"code(Returns element-wise absolute value of the input.
 
 Example::
 
@@ -780,32 +842,38 @@ The storage type of ``abs`` output depends upon the input storage type:
    - abs(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_abs"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_abs"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_abs, unary_bwd<mshadow_op::sign>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: dL/dxgrad
-      // inputs[0]: dL/dy
-      // inputs[1]: x
-      // f(x) -> abs(x)
-      // f'(x) = 1 if x > 0 else -1
-      // f''(x) = 0
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_dydx",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry(dydx)}, nullptr, &n));
-      ret.emplace_back(MakeNode("zeros_like", n->attrs.name + "_backward_grad_grad_in",
-                                {n->inputs[1]}, nullptr, &n));
-      return ret;
-    });
-
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: dL/dxgrad
+          // inputs[0]: dL/dy
+          // inputs[1]: x
+          // f(x) -> abs(x)
+          // f'(x) = 1 if x > 0 else -1
+          // f''(x) = 0
+          auto dydx = MakeNode("elemwise_div",
+                               n->attrs.name + "_dydx",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry(dydx)},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode(
+              "zeros_like", n->attrs.name + "_backward_grad_grad_in", {n->inputs[1]}, nullptr, &n));
+          return ret;
+        });
 
 // sign
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(sign, cpu, mshadow_op::sign)
-.describe(R"code(Returns element-wise sign of the input.
+    .describe(R"code(Returns element-wise sign of the input.
 
 Example::
 
@@ -818,11 +886,11 @@ The storage type of ``sign`` output depends upon the input storage type:
    - sign(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // round
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(round, cpu, mshadow_op::round)
-.describe(R"code(Returns element-wise rounded value to the nearest integer of the input.
+    .describe(R"code(Returns element-wise rounded value to the nearest integer of the input.
 
 Example::
 
@@ -835,11 +903,11 @@ The storage type of ``round`` output depends upon the input storage type:
   - round(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // rint
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(rint, cpu, mshadow_op::rint)
-.describe(R"code(Returns element-wise rounded value to the nearest integer of the input.
+    .describe(R"code(Returns element-wise rounded value to the nearest integer of the input.
 
 .. note::
    - For input ``n.5`` ``rint`` returns ``n`` while ``round`` returns ``n+1``.
@@ -856,11 +924,11 @@ The storage type of ``rint`` output depends upon the input storage type:
    - rint(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // ceil
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(ceil, cpu, mshadow_op::ceil)
-.describe(R"code(Returns element-wise ceiling of the input.
+    .describe(R"code(Returns element-wise ceiling of the input.
 
 The ceil of the scalar x is the smallest integer i, such that i >= x.
 
@@ -875,11 +943,11 @@ The storage type of ``ceil`` output depends upon the input storage type:
    - ceil(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // floor
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(floor, cpu, mshadow_op::floor)
-.describe(R"code(Returns element-wise floor of the input.
+    .describe(R"code(Returns element-wise floor of the input.
 
 The floor of the scalar x is the largest integer i, such that i <= x.
 
@@ -894,11 +962,11 @@ The storage type of ``floor`` output depends upon the input storage type:
    - floor(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // trunc
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(trunc, cpu, mshadow_op::trunc)
-.describe(R"code(Return the element-wise truncated value of the input.
+    .describe(R"code(Return the element-wise truncated value of the input.
 
 The truncated value of the scalar x is the nearest integer i which is closer to
 zero than x is. In short, the fractional part of the signed number x is discarded.
@@ -914,11 +982,11 @@ The storage type of ``trunc`` output depends upon the input storage type:
    - trunc(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // fix
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(fix, cpu, mshadow_op::fix)
-.describe(R"code(Returns element-wise rounded value to the nearest \
+    .describe(R"code(Returns element-wise rounded value to the nearest \
 integer towards zero of the input.
 
 Example::
@@ -932,12 +1000,12 @@ The storage type of ``fix`` output depends upon the input storage type:
    - fix(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // erf
 MXNET_OPERATOR_REGISTER_UNARY(erf)
-.add_alias("_npx_erf")
-.describe(R"code(Returns element-wise gauss error function of the input.
+    .add_alias("_npx_erf")
+    .describe(R"code(Returns element-wise gauss error function of the input.
 
 Example::
 
@@ -945,88 +1013,85 @@ Example::
 
 )code" ADD_FILELINE)
 #if MSHADOW_USE_MKL == 1
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::MKL_Compute<mshadow_op::erf, mkl_func::erf>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::MKL_Compute<mshadow_op::erf, mkl_func::erf>)
 #else
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::erf>)
-#endif    // MSHADOW_USE_MKL == 1
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_erf"});
-
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::erf>)
+#endif  // MSHADOW_USE_MKL == 1
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_erf"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_erf)
-.set_attr<FCompute>("FCompute<cpu>",
-                    ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::erf_grad>>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::erf_grad>>);
 
 // erfinv
 MXNET_OPERATOR_REGISTER_UNARY(erfinv)
-.add_alias("_npx_erfinv")
-.describe(R"code(Returns element-wise inverse gauss error function of the input.
+    .add_alias("_npx_erfinv")
+    .describe(R"code(Returns element-wise inverse gauss error function of the input.
 
 Example::
 
    erfinv([0, 0.5., -1.]) = [0., 0.4769, -inf]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::erfinv>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_erfinv"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::erfinv>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_erfinv"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_erfinv)
-.set_attr<FCompute>("FCompute<cpu>",
-                    ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::erfinv_grad>>);
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::erfinv_grad>>);
 
 // gamma
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(gamma, cpu, mshadow_op::gamma)
 MXNET_ADD_SPARSE_OP_ALIAS(gamma)
-.add_alias("_npx_gamma")
-.describe(R"code(Returns the gamma function (extension of the factorial function \
+    .add_alias("_npx_gamma")
+    .describe(R"code(Returns the gamma function (extension of the factorial function \
 to the reals), computed element-wise on the input array.
 
 The storage type of ``gamma`` output is always dense
 
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_gamma"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_gamma"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_gamma,
                                                   unary_bwd<mshadow_op::gamma_grad>);
 
 // gammaln
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(gammaln, cpu, mshadow_op::gammaln)
-.add_alias("_npx_gammaln")
-MXNET_ADD_SPARSE_OP_ALIAS(gammaln)
-.describe(R"code(Returns element-wise log of the absolute value of the gamma function \
+    .add_alias("_npx_gammaln") MXNET_ADD_SPARSE_OP_ALIAS(gammaln)
+    .describe(R"code(Returns element-wise log of the absolute value of the gamma function \
 of the input.
 
 The storage type of ``gammaln`` output is always dense
 
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_gammaln"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_gammaln"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_gammaln,
                                                   unary_bwd<mshadow_op::gammaln_grad>);
 
 // digamma
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(digamma, cpu, mshadow_op::digamma)
-.add_alias("_npx_digamma")
-MXNET_ADD_SPARSE_OP_ALIAS(digamma)
-.describe(R"code(Returns element-wise log derivative of the gamma function \
+    .add_alias("_npx_digamma") MXNET_ADD_SPARSE_OP_ALIAS(digamma)
+    .describe(R"code(Returns element-wise log derivative of the gamma function \
 of the input.
 
 The storage type of ``digamma`` output is always dense
 
 )code")
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_digamma"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_digamma"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_digamma,
                                                   unary_bwd<mshadow_op::trigamma>);
 
 MXNET_OPERATOR_REGISTER_UNARY(logical_not)
-.describe(R"code(Returns the result of logical NOT (!) function
+    .describe(R"code(Returns the result of logical NOT (!) function
 
 Example:
   logical_not([-2., 0., 1.]) = [0., 1., 0.]
 
 )code")
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::nt>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::nt>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_basic.cu b/src/operator/tensor/elemwise_unary_op_basic.cu
index 2c2abe2e58b6..7fdc047630cb 100644
--- a/src/operator/tensor/elemwise_unary_op_basic.cu
+++ b/src/operator/tensor/elemwise_unary_op_basic.cu
@@ -27,85 +27,74 @@
 namespace mxnet {
 namespace op {
 NNVM_REGISTER_OP(relu)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"relu"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"relu"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"relu"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"relu"});
 
 NNVM_REGISTER_OP(_backward_relu)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_relu"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_relu"});
 
-NNVM_REGISTER_OP(sigmoid)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sigmoid"});
+NNVM_REGISTER_OP(sigmoid).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sigmoid"});
 
 NNVM_REGISTER_OP(_backward_sigmoid)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sigmoid"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sigmoid"});
 
-NNVM_REGISTER_OP(log_sigmoid)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log_sigmoid"});
+NNVM_REGISTER_OP(log_sigmoid).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log_sigmoid"});
 
 NNVM_REGISTER_OP(_backward_log_sigmoid)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log_sigmoid"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log_sigmoid"});
 
-NNVM_REGISTER_OP(mish)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"mish"});
+NNVM_REGISTER_OP(mish).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"mish"});
 
 NNVM_REGISTER_OP(_backward_mish)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_mish"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_mish"});
 
-NNVM_REGISTER_OP(hard_sigmoid)
-.set_attr<FCompute>("FCompute<gpu>", HardSigmoidForward<gpu>);
+NNVM_REGISTER_OP(hard_sigmoid).set_attr<FCompute>("FCompute<gpu>", HardSigmoidForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_hard_sigmoid)
-.set_attr<FCompute>("FCompute<gpu>", HardSigmoidBackward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", HardSigmoidBackward<gpu>);
 
 // softsign
-NNVM_REGISTER_OP(softsign)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"softsign"});
+NNVM_REGISTER_OP(softsign).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"softsign"});
 
 NNVM_REGISTER_OP(_backward_softsign)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_softsign"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_softsign"});
 
 // erf
-NNVM_REGISTER_OP(erf)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"erf"});
+NNVM_REGISTER_OP(erf).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"erf"});
 
 NNVM_REGISTER_OP(_backward_erf)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCCompute{"backward_erf"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_erf"});
 
 // erfinv
-NNVM_REGISTER_OP(erfinv)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"erfinv"});
+NNVM_REGISTER_OP(erfinv).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"erfinv"});
 
 NNVM_REGISTER_OP(_backward_erfinv)
-.set_attr<FCompute>("FCompute<gpu>",
-                    ElemwiseBinaryRTCCompute{"backward_erfinv"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_erfinv"});
 
 // copy
 NNVM_REGISTER_OP(_copy)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>);
 
 NNVM_REGISTER_OP(_backward_copy)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>);
 
 NNVM_REGISTER_OP(_backward_reshape)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(BlockGrad)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(BlockGrad).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 NNVM_REGISTER_OP(make_loss)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeEx<gpu>);
 
 // identity output as first input, but attributes are constrainted to be like rhs
 NNVM_REGISTER_OP(_identity_with_attr_like_rhs)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeFirstItemEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryOp::IdentityComputeFirstItemEx<gpu>);
 
-NNVM_REGISTER_OP(reshape_like)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(reshape_like).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 void ShapeComputeGPU(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
@@ -116,9 +105,9 @@ void ShapeComputeGPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  const TBlob& in_data    = inputs[0];
+  const TBlob& out_data   = outputs[0];
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   cudaMemcpyAsync(out_data.dptr_,
                   in_data.shape_.data(),
                   in_data.ndim() * sizeof(int64_t),
@@ -126,8 +115,7 @@ void ShapeComputeGPU(const nnvm::NodeAttrs& attrs,
                   mshadow::Stream<gpu>::GetStream(s));
 }
 
-NNVM_REGISTER_OP(shape_array)
-.set_attr<FCompute>("FCompute<gpu>", ShapeComputeGPU);
+NNVM_REGISTER_OP(shape_array).set_attr<FCompute>("FCompute<gpu>", ShapeComputeGPU);
 
 void SizeComputeGPU(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
@@ -139,10 +127,10 @@ void SizeComputeGPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  const index_t size_var = in_data.Size();
+  const TBlob& in_data    = inputs[0];
+  const TBlob& out_data   = outputs[0];
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  const index_t size_var  = in_data.Size();
   cudaMemcpyAsync(out_data.dptr_,
                   &size_var,
                   1U * sizeof(int64_t),
@@ -150,87 +138,80 @@ void SizeComputeGPU(const nnvm::NodeAttrs& attrs,
                   mshadow::Stream<gpu>::GetStream(s));
 }
 
-NNVM_REGISTER_OP(size_array)
-.set_attr<FCompute>("FCompute<gpu>", SizeComputeGPU);
+NNVM_REGISTER_OP(size_array).set_attr<FCompute>("FCompute<gpu>", SizeComputeGPU);
 
-NNVM_REGISTER_OP(Cast)
-.set_attr<FCompute>("FCompute<gpu>", CastCompute<gpu>);
+NNVM_REGISTER_OP(Cast).set_attr<FCompute>("FCompute<gpu>", CastCompute<gpu>);
 
-NNVM_REGISTER_OP(_backward_cast)
-.set_attr<FCompute>("FCompute<gpu>", CastCompute<gpu>);
+NNVM_REGISTER_OP(_backward_cast).set_attr<FCompute>("FCompute<gpu>", CastCompute<gpu>);
 
 // negative
 NNVM_REGISTER_OP(negative)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"negation"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"negation"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"negation"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"negation"});
 
 // abs
 NNVM_REGISTER_OP(abs)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"abs"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"abs"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"abs"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"abs"});
 
 NNVM_REGISTER_OP(_backward_abs)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_abs"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_abs"});
 
 // sign
 NNVM_REGISTER_OP(sign)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sign"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sign"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sign"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sign"});
 
 // round
 NNVM_REGISTER_OP(round)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"round"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"round"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"round"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"round"});
 
 // ceil
 NNVM_REGISTER_OP(ceil)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"ceil"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"ceil"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"ceil"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"ceil"});
 
 // floor
 NNVM_REGISTER_OP(floor)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"floor"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"floor"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"floor"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"floor"});
 
 // trunc
 NNVM_REGISTER_OP(trunc)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"trunc"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"trunc"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"trunc"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"trunc"});
 
 // rint
 NNVM_REGISTER_OP(rint)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"rint"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"rint"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"rint"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"rint"});
 
 // fix
 NNVM_REGISTER_OP(fix)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"fix"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"fix"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"fix"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"fix"});
 
 // gamma
-NNVM_REGISTER_OP(gamma)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"gamma"});
+NNVM_REGISTER_OP(gamma).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"gamma"});
 
 NNVM_REGISTER_OP(_backward_gamma)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_gamma"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_gamma"});
 
 // gammaln
-NNVM_REGISTER_OP(gammaln)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"gammaln"});
+NNVM_REGISTER_OP(gammaln).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"gammaln"});
 
 NNVM_REGISTER_OP(_backward_gammaln)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_gammaln"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_gammaln"});
 
 // digamma
-NNVM_REGISTER_OP(digamma)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"digamma"});
+NNVM_REGISTER_OP(digamma).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"digamma"});
 
 NNVM_REGISTER_OP(_backward_digamma)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_digamma"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_digamma"});
 
 // logical not
-NNVM_REGISTER_OP(logical_not)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"logical_not"});
+NNVM_REGISTER_OP(logical_not).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"logical_not"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_logexp.cc b/src/operator/tensor/elemwise_unary_op_logexp.cc
index 9970071f86ed..4ce9c8ad5324 100644
--- a/src/operator/tensor/elemwise_unary_op_logexp.cc
+++ b/src/operator/tensor/elemwise_unary_op_logexp.cc
@@ -34,7 +34,7 @@ namespace op {
 #if MSHADOW_USE_MKL == 1
 MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(exp, cpu, mshadow_op::exp, mkl_func::exp)
 MXNET_ADD_SPARSE_OP_ALIAS(exp)
-.describe(R"code(Returns element-wise exponential value of the input.
+    .describe(R"code(Returns element-wise exponential value of the input.
 
 .. math::
    exp(x) = e^x \approx 2.718^x
@@ -46,11 +46,11 @@ Example::
 The storage type of ``exp`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_mul"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_mul"});
 #else
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(exp, cpu, mshadow_op::exp)
 MXNET_ADD_SPARSE_OP_ALIAS(exp)
-.describe(R"code(Returns element-wise exponential value of the input.
+    .describe(R"code(Returns element-wise exponential value of the input.
 
 .. math::
    exp(x) = e^x \approx 2.718^x
@@ -62,13 +62,13 @@ Example::
 The storage type of ``exp`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_mul"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_mul"});
 #endif
 
 // log
 MXNET_OPERATOR_REGISTER_UNARY(log)
 MXNET_ADD_SPARSE_OP_ALIAS(log)
-.describe(R"code(Returns element-wise Natural logarithmic value of the input.
+    .describe(R"code(Returns element-wise Natural logarithmic value of the input.
 
 The natural logarithm is logarithm in base *e*, so that ``log(exp(x)) = x``
 
@@ -76,116 +76,117 @@ The storage type of ``log`` output is always dense
 
 )code" ADD_FILELINE)
 #if MSHADOW_USE_MKL == 1
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::MKL_Compute<mshadow_op::log, mkl_func::log>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::MKL_Compute<mshadow_op::log, mkl_func::log>)
 #else
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::log>)
-#endif    // MSHADOW_USE_MKL == 1
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::log>)
+#endif  // MSHADOW_USE_MKL == 1
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log"});
 
 // log10
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(log10, cpu, mshadow_op::log10)
 MXNET_ADD_SPARSE_OP_ALIAS(log10)
-.describe(R"code(Returns element-wise Base-10 logarithmic value of the input.
+    .describe(R"code(Returns element-wise Base-10 logarithmic value of the input.
 
 ``10**log10(x) = x``
 
 The storage type of ``log10`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log10"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log10"});
 
 // log2
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(log2, cpu, mshadow_op::log2)
 MXNET_ADD_SPARSE_OP_ALIAS(log2)
-.describe(R"code(Returns element-wise Base-2 logarithmic value of the input.
+    .describe(R"code(Returns element-wise Base-2 logarithmic value of the input.
 
 ``2**log2(x) = x``
 
 The storage type of ``log2`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log2"});
-
-MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_log,
-                                                  unary_bwd<mshadow_op::log_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: dL/dxgrad
-    // inputs[0]: dL/dy (ygrad)
-    // inputs[1]: x (ElemewiseGradUseIn)
-    // f(x) = y = log(x)
-    // f'(x) = 1/x
-    // f''(x) = -1 * (f'(x) * f'(x))
-    auto x = n->inputs[1];
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto op = mxnet::util::NodeOpGen{n};
-
-    auto dlogx = op.reciprocal(x);
-    auto d2ydx2_mid = op.mul(dydx_mul_dldy, dlogx);
-    auto d2ydx2 = op.negative(d2ydx2_mid);
-
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(op.mul(ograds[0], dlogx));
-    ret.emplace_back(op.mul(ograds[0], d2ydx2));
-
-    return ret;
-  });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log2"});
+
+MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_log, unary_bwd<mshadow_op::log_grad>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 // ograds[0]: dL/dxgrad
+                                 // inputs[0]: dL/dy (ygrad)
+                                 // inputs[1]: x (ElemewiseGradUseIn)
+                                 // f(x) = y = log(x)
+                                 // f'(x) = 1/x
+                                 // f''(x) = -1 * (f'(x) * f'(x))
+                                 auto x             = n->inputs[1];
+                                 auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+                                 auto op            = mxnet::util::NodeOpGen{n};
+
+                                 auto dlogx      = op.reciprocal(x);
+                                 auto d2ydx2_mid = op.mul(dydx_mul_dldy, dlogx);
+                                 auto d2ydx2     = op.negative(d2ydx2_mid);
+
+                                 std::vector<nnvm::NodeEntry> ret;
+                                 ret.emplace_back(op.mul(ograds[0], dlogx));
+                                 ret.emplace_back(op.mul(ograds[0], d2ydx2));
+
+                                 return ret;
+                               });
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_log10,
                                                   unary_bwd<mshadow_op::log10_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: dL/dxgrad
-    // inputs[0]: dL/dy (ygrad)
-    // inputs[1]: x (ElemewiseGradUseIn)
-    // f(x) = y = log10(x)
-    // f'(x) = 1 / (log(10) * x)
-    // f''(x) = -1 * (f'(x) * 1/x)
-    auto dldy = n->inputs[0];
-    auto x = n->inputs[1];
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto op = mxnet::util::NodeOpGen{n};
-    auto dydx = op.div(dydx_mul_dldy, dldy);
-    auto dlogx = op.reciprocal(x);
-    auto d2ydx2_mid = op.mul(dydx_mul_dldy, dlogx);
-    auto d2ydx2 = op.negative(d2ydx2_mid);
-
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(op.mul(ograds[0], dydx));
-    ret.emplace_back(op.mul(ograds[0], d2ydx2));
-
-    return ret;
-  });
-
-MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_log2,
-                                                  unary_bwd<mshadow_op::log2_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: dL/dxgrad
-    // inputs[0]: dL/dy (ygrad)
-    // inputs[1]: x (ElemewiseGradUseIn)
-    // f(x) = y = log2(x)
-    // f'(x) = 1 / (log(2) * x)
-    // f''(x) = -1 * (f'(x) * 1/x)
-    auto dldy = n->inputs[0];
-    auto x = n->inputs[1];
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto op = mxnet::util::NodeOpGen{n};
-    auto dydx = op.div(dydx_mul_dldy, dldy);
-    auto dlogx = op.reciprocal(x);
-    auto d2ydx2_mid = op.mul(dydx_mul_dldy, dlogx);
-    auto d2ydx2 = op.negative(d2ydx2_mid);
-
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(op.mul(ograds[0], dydx));
-    ret.emplace_back(op.mul(ograds[0], d2ydx2));
-
-    return ret;
-  });
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 // ograds[0]: dL/dxgrad
+                                 // inputs[0]: dL/dy (ygrad)
+                                 // inputs[1]: x (ElemewiseGradUseIn)
+                                 // f(x) = y = log10(x)
+                                 // f'(x) = 1 / (log(10) * x)
+                                 // f''(x) = -1 * (f'(x) * 1/x)
+                                 auto dldy          = n->inputs[0];
+                                 auto x             = n->inputs[1];
+                                 auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+                                 auto op            = mxnet::util::NodeOpGen{n};
+                                 auto dydx          = op.div(dydx_mul_dldy, dldy);
+                                 auto dlogx         = op.reciprocal(x);
+                                 auto d2ydx2_mid    = op.mul(dydx_mul_dldy, dlogx);
+                                 auto d2ydx2        = op.negative(d2ydx2_mid);
+
+                                 std::vector<nnvm::NodeEntry> ret;
+                                 ret.emplace_back(op.mul(ograds[0], dydx));
+                                 ret.emplace_back(op.mul(ograds[0], d2ydx2));
+
+                                 return ret;
+                               });
+
+MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_log2, unary_bwd<mshadow_op::log2_grad>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 // ograds[0]: dL/dxgrad
+                                 // inputs[0]: dL/dy (ygrad)
+                                 // inputs[1]: x (ElemewiseGradUseIn)
+                                 // f(x) = y = log2(x)
+                                 // f'(x) = 1 / (log(2) * x)
+                                 // f''(x) = -1 * (f'(x) * 1/x)
+                                 auto dldy          = n->inputs[0];
+                                 auto x             = n->inputs[1];
+                                 auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+                                 auto op            = mxnet::util::NodeOpGen{n};
+                                 auto dydx          = op.div(dydx_mul_dldy, dldy);
+                                 auto dlogx         = op.reciprocal(x);
+                                 auto d2ydx2_mid    = op.mul(dydx_mul_dldy, dlogx);
+                                 auto d2ydx2        = op.negative(d2ydx2_mid);
+
+                                 std::vector<nnvm::NodeEntry> ret;
+                                 ret.emplace_back(op.mul(ograds[0], dydx));
+                                 ret.emplace_back(op.mul(ograds[0], d2ydx2));
+
+                                 return ret;
+                               });
 
 // log1p
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(log1p, cpu, mshadow_op::log1p)
-.describe(R"code(Returns element-wise ``log(1 + x)`` value of the input.
+    .describe(R"code(Returns element-wise ``log(1 + x)`` value of the input.
 
 This function is more accurate than ``log(1 + x)``  for small ``x`` so that
 :math:`1+x\approx 1`
@@ -197,41 +198,41 @@ The storage type of ``log1p`` output depends upon the input storage type:
    - log1p(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log1p"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_log1p"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_log1p,
                                                   unary_bwd<mshadow_op::log1p_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: head_grad_grads (dL/dxgrad)
-    // inputs[0]: dL/dy
-    // inputs[1]: x (ElemwiseGradUseIn)
-    // f(x) = y = log(1+x)
-    // f'(x) = 1/(1+x)
-    // f''(x) = -1/(1+x)^2
-    auto dldy = n->inputs[0];
-    auto x = n->inputs[1];
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto op = mxnet::util::NodeOpGen{n};
-
-    auto ones = op.ones_like(x);
-    auto dydx = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_log1p",
-                                                  n->attrs.name + "_backward_log1p",
-                                                  {ones, x}, nullptr, &n)};
-    auto d2ydx2_mid = op.mul(dydx, dydx);
-    auto d2ydx2_neg_mid = op.negative(d2ydx2_mid);
-    auto d2ydx2 = op.mul(d2ydx2_neg_mid, dldy);
-
-    std::vector<nnvm::NodeEntry> ret;
-
-    ret.emplace_back(op.mul(ograds[0], dydx));
-    ret.emplace_back(op.mul(ograds[0], d2ydx2));
-    return ret;
-  });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = y = log(1+x)
+          // f'(x) = 1/(1+x)
+          // f''(x) = -1/(1+x)^2
+          auto dldy          = n->inputs[0];
+          auto x             = n->inputs[1];
+          auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+          auto op            = mxnet::util::NodeOpGen{n};
+
+          auto ones           = op.ones_like(x);
+          auto dydx           = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_log1p", n->attrs.name + "_backward_log1p", {ones, x}, nullptr, &n)};
+          auto d2ydx2_mid     = op.mul(dydx, dydx);
+          auto d2ydx2_neg_mid = op.negative(d2ydx2_mid);
+          auto d2ydx2         = op.mul(d2ydx2_neg_mid, dldy);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(op.mul(ograds[0], dydx));
+          ret.emplace_back(op.mul(ograds[0], d2ydx2));
+          return ret;
+        });
 
 // expm1
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(expm1, cpu, mshadow_op::expm1)
-.describe(R"code(Returns ``exp(x) - 1`` computed element-wise on the input.
+    .describe(R"code(Returns ``exp(x) - 1`` computed element-wise on the input.
 
 This function provides greater precision than ``exp(x) - 1`` for small values of ``x``.
 
@@ -242,35 +243,35 @@ The storage type of ``expm1`` output depends upon the input storage type:
    - expm1(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_expm1"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_expm1"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_expm1, unary_bwd<mshadow_op::exp>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: head_grad_grads (dL/dxgrad)
-    // inputs[0]: dL/dy
-    // inputs[1]: x (ElemwiseGradUseIn)
-    // f(x) = y = exp(x) - 1
-    // f'(x) = exp(x)
-    // f''(x) = exp(x)
-    auto dldy = n->inputs[0];
-    auto x = n->inputs[1];
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto op = mxnet::util::NodeOpGen{n};
-
-    auto dydx = op.div(dydx_mul_dldy, dldy);
-
-    auto exp_x = MakeNode("exp", n->attrs.name + "_backward_exp_grad",
-                         {n->inputs[1]}, nullptr, &n);
-    auto d2ydx2_mul_dldy = op.mul(nnvm::NodeEntry{exp_x}, dldy);
-
-    std::vector<nnvm::NodeEntry> ret;
-
-
-    ret.emplace_back(op.mul(ograds[0], dydx));
-    ret.emplace_back(op.mul(ograds[0], d2ydx2_mul_dldy));
-    return ret;
-  });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = y = exp(x) - 1
+          // f'(x) = exp(x)
+          // f''(x) = exp(x)
+          auto dldy          = n->inputs[0];
+          auto x             = n->inputs[1];
+          auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+          auto op            = mxnet::util::NodeOpGen{n};
+
+          auto dydx = op.div(dydx_mul_dldy, dldy);
+
+          auto exp_x =
+              MakeNode("exp", n->attrs.name + "_backward_exp_grad", {n->inputs[1]}, nullptr, &n);
+          auto d2ydx2_mul_dldy = op.mul(nnvm::NodeEntry{exp_x}, dldy);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(op.mul(ograds[0], dydx));
+          ret.emplace_back(op.mul(ograds[0], d2ydx2_mul_dldy));
+          return ret;
+        });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_logexp.cu b/src/operator/tensor/elemwise_unary_op_logexp.cu
index e0f0d69cac11..5d4df7dd21f1 100644
--- a/src/operator/tensor/elemwise_unary_op_logexp.cu
+++ b/src/operator/tensor/elemwise_unary_op_logexp.cu
@@ -27,45 +27,41 @@ namespace mxnet {
 namespace op {
 
 // exp
-NNVM_REGISTER_OP(exp)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"exp"});
+NNVM_REGISTER_OP(exp).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"exp"});
 
 // log
-NNVM_REGISTER_OP(log)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log"});
+NNVM_REGISTER_OP(log).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log"});
 
 // log10
-NNVM_REGISTER_OP(log10)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log10"});
+NNVM_REGISTER_OP(log10).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log10"});
 
 // log2
-NNVM_REGISTER_OP(log2)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log2"});
+NNVM_REGISTER_OP(log2).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log2"});
 
 NNVM_REGISTER_OP(_backward_log)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log"});
 
 NNVM_REGISTER_OP(_backward_log10)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log10"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log10"});
 
 NNVM_REGISTER_OP(_backward_log2)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log2"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log2"});
 
 // log1p
 NNVM_REGISTER_OP(log1p)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log1p"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"log1p"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"log1p"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"log1p"});
 
 NNVM_REGISTER_OP(_backward_log1p)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log1p"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_log1p"});
 
 // expm1
 NNVM_REGISTER_OP(expm1)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"expm1"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"expm1"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"expm1"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"expm1"});
 
 NNVM_REGISTER_OP(_backward_expm1)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_expm1"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_expm1"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_pow.cc b/src/operator/tensor/elemwise_unary_op_pow.cc
index 914cb820f038..bc935e362cb7 100644
--- a/src/operator/tensor/elemwise_unary_op_pow.cc
+++ b/src/operator/tensor/elemwise_unary_op_pow.cc
@@ -32,7 +32,7 @@ namespace op {
 
 // reciprocal
 MXNET_OPERATOR_REGISTER_UNARY(reciprocal)
-.describe(R"code(Returns the reciprocal of the argument, element-wise.
+    .describe(R"code(Returns the reciprocal of the argument, element-wise.
 
 Calculates 1/x.
 
@@ -41,48 +41,57 @@ Example::
     reciprocal([-2, 1, 3, 1.6, 0.2]) = [-0.5, 1.0, 0.33333334, 0.625, 5.0]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::reciprocal>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_reciprocal"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::reciprocal>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_reciprocal"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_reciprocal)
-.set_attr<FCompute>("FCompute<cpu>",
-  ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::reciprocal_grad> >)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: dL/dxgrad
-    // inputs[0]: dL/dy
-    // inputs[1]: x
-    // f(x) = y = 1/x
-    // f'(x) = -1/x^2
-    // f''(x) = 2/x^3 = -2 * (f'(x) * f(x))
-
-    const std::unordered_map<std::string, std::string> args = {{"scalar", "-2.0"}};
-
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto dydx = MakeNode("elemwise_div", n->attrs.name + "_dydx",
-                         {dydx_mul_dldy, n->inputs[0]}, nullptr, &n);
-    auto fx = MakeNode("reciprocal", n->attrs.name + "_fx",
-                       {n->inputs[1]}, nullptr, &n);
-
-    auto d2ydx2_mid = MakeNode("elemwise_mul", n->attrs.name + "_d2ydx2_mid",
-                               {dydx_mul_dldy, nnvm::NodeEntry{fx}}, nullptr, &n);
-
-    auto d2ydx2 = MakeNode("_mul_scalar", n->attrs.name + "_d2ydx2",
-                           {nnvm::NodeEntry{d2ydx2_mid}}, &args, &n);
-
-    std::vector<nnvm::NodeEntry> ret;
-
-    ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                             {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-    ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad_inp",
-                             {ograds[0], nnvm::NodeEntry{d2ydx2}}, nullptr, &n));
-    return ret;
-});
+    .set_attr<FCompute>("FCompute<cpu>",
+                        ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::reciprocal_grad>>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: dL/dxgrad
+          // inputs[0]: dL/dy
+          // inputs[1]: x
+          // f(x) = y = 1/x
+          // f'(x) = -1/x^2
+          // f''(x) = 2/x^3 = -2 * (f'(x) * f(x))
+
+          const std::unordered_map<std::string, std::string> args = {{"scalar", "-2.0"}};
+
+          auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+          auto dydx          = MakeNode(
+              "elemwise_div", n->attrs.name + "_dydx", {dydx_mul_dldy, n->inputs[0]}, nullptr, &n);
+          auto fx = MakeNode("reciprocal", n->attrs.name + "_fx", {n->inputs[1]}, nullptr, &n);
+
+          auto d2ydx2_mid = MakeNode("elemwise_mul",
+                                     n->attrs.name + "_d2ydx2_mid",
+                                     {dydx_mul_dldy, nnvm::NodeEntry{fx}},
+                                     nullptr,
+                                     &n);
+
+          auto d2ydx2 = MakeNode(
+              "_mul_scalar", n->attrs.name + "_d2ydx2", {nnvm::NodeEntry{d2ydx2_mid}}, &args, &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad_inp",
+                                    {ograds[0], nnvm::NodeEntry{d2ydx2}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // square
 #if MSHADOW_USE_MKL == 1
 MXNET_MKL_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(square, cpu, mshadow_op::square, mkl_func::square)
-.describe(R"code(Returns element-wise squared value of the input.
+    .describe(R"code(Returns element-wise squared value of the input.
 
 .. math::
    square(x) = x^2
@@ -98,10 +107,10 @@ The storage type of ``square`` output depends upon the input storage type:
    - square(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square"});
 #else
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(square, cpu, mshadow_op::square)
-.describe(R"code(Returns element-wise squared value of the input.
+    .describe(R"code(Returns element-wise squared value of the input.
 
 .. math::
    square(x) = x^2
@@ -117,42 +126,42 @@ The storage type of ``square`` output depends upon the input storage type:
    - square(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square"});
 #endif
 
-MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_square,
-                                               unary_bwd<mshadow_op::square_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    // ograds[0]: head_grad_grads (dL/dxgrad)
-    // inputs[0]: dL/dy
-    // inputs[1]: x (ElemwiseGradUseIn)
-    // f(x) = y = x^2
-    // f'(x) = 2*x
-    // f''(x) = 2
-    auto dldy = n->inputs[0];
-    auto x = n->inputs[1];
-    auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
-    auto op = mxnet::util::NodeOpGen{n};
-
-    auto dydx = op.div(dydx_mul_dldy, dldy);
-
-    std::unordered_map<std::string, std::string> args = {{"scalar", "2.0"}};
-    auto ones_like = MakeNode("ones_like", n->attrs.name + "_backward_ones_like",
-                         {n->inputs[1]}, nullptr, &n);
-    auto d2ydx2 = op.mul(2.0, nnvm::NodeEntry{ones_like});
-    auto d2ydx2_mul_dldy = op.mul(d2ydx2, dldy);
-
-    std::vector<nnvm::NodeEntry> ret;
-
-    ret.emplace_back(op.mul(ograds[0], dydx));
-    ret.emplace_back(op.mul(ograds[0], d2ydx2_mul_dldy));
-    return ret;
-  });
+MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_square, unary_bwd<mshadow_op::square_grad>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = y = x^2
+          // f'(x) = 2*x
+          // f''(x) = 2
+          auto dldy          = n->inputs[0];
+          auto x             = n->inputs[1];
+          auto dydx_mul_dldy = nnvm::NodeEntry{n};  // f'(x) * head_grads
+          auto op            = mxnet::util::NodeOpGen{n};
+
+          auto dydx = op.div(dydx_mul_dldy, dldy);
+
+          std::unordered_map<std::string, std::string> args = {{"scalar", "2.0"}};
+          auto ones_like                                    = MakeNode(
+              "ones_like", n->attrs.name + "_backward_ones_like", {n->inputs[1]}, nullptr, &n);
+          auto d2ydx2          = op.mul(2.0, nnvm::NodeEntry{ones_like});
+          auto d2ydx2_mul_dldy = op.mul(d2ydx2, dldy);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(op.mul(ograds[0], dydx));
+          ret.emplace_back(op.mul(ograds[0], d2ydx2_mul_dldy));
+          return ret;
+        });
 
 // sqrt
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(sqrt, cpu, mshadow_op::square_root)
-.describe(R"code(Returns element-wise square-root value of the input.
+    .describe(R"code(Returns element-wise square-root value of the input.
 
 .. math::
    \textrm{sqrt}(x) = \sqrt{x}
@@ -168,46 +177,61 @@ The storage type of ``sqrt`` output depends upon the input storage type:
    - sqrt(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_sqrt"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_sqrt"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_sqrt,
                                                   unary_bwd<mshadow_op::square_root_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // NodeEntry{n} : y_grad * f'(x)
-      // n->inputs[0] : y_grad
-      // n->inputs[1] : f(x) = x^1/2
-      // ograds[0] : head_grads
-      // f'(x) = 1/(2*x^1/2)
-      // f''(x) = f'(x) * -1/(2*x) = -1/(4 * x^3/2)
-      const std::unordered_map<std::string, std::string> mul_args = {{"scalar", "0.5"}};
-      auto x = MakeNode("square", n->attrs.name + "_cube_x", {n->inputs[1]}, nullptr, &n);
-      auto r_x = MakeNode("reciprocal", n->attrs.name + "_reciprocal_x",
-                                    {nnvm::NodeEntry{x}}, nullptr, &n);
-      auto neg_r_x = MakeNode("negative", n->attrs.name + "_neg_reciprocal_x",
-                                    {nnvm::NodeEntry{r_x}}, nullptr, &n);
-      auto half_neg_r_cube_x = MakeNode("_mul_scalar", n->attrs.name + "_half_neg_reciprocal_x",
-                                    {nnvm::NodeEntry{neg_r_x}}, &mul_args, &n);
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_grad_grad_mid",
-                                    {nnvm::NodeEntry{half_neg_r_cube_x}, n->inputs[0]},
-                                    nullptr, &n);
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_grad_div",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      // when building gradient graph, the backward node of n->inputs[1] will be
-      // added to the graph again, therefore f`(x) will be multiplied
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-  });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // NodeEntry{n} : y_grad * f'(x)
+          // n->inputs[0] : y_grad
+          // n->inputs[1] : f(x) = x^1/2
+          // ograds[0] : head_grads
+          // f'(x) = 1/(2*x^1/2)
+          // f''(x) = f'(x) * -1/(2*x) = -1/(4 * x^3/2)
+          const std::unordered_map<std::string, std::string> mul_args = {{"scalar", "0.5"}};
+          auto x   = MakeNode("square", n->attrs.name + "_cube_x", {n->inputs[1]}, nullptr, &n);
+          auto r_x = MakeNode(
+              "reciprocal", n->attrs.name + "_reciprocal_x", {nnvm::NodeEntry{x}}, nullptr, &n);
+          auto neg_r_x = MakeNode(
+              "negative", n->attrs.name + "_neg_reciprocal_x", {nnvm::NodeEntry{r_x}}, nullptr, &n);
+          auto half_neg_r_cube_x = MakeNode("_mul_scalar",
+                                            n->attrs.name + "_half_neg_reciprocal_x",
+                                            {nnvm::NodeEntry{neg_r_x}},
+                                            &mul_args,
+                                            &n);
+          auto grad_grad_mid     = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_grad_grad_mid",
+                                        {nnvm::NodeEntry{half_neg_r_cube_x}, n->inputs[0]},
+                                        nullptr,
+                                        &n);
+          auto dydx              = MakeNode("elemwise_div",
+                               n->attrs.name + "_grad_div",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          // when building gradient graph, the backward node of n->inputs[1] will be
+          // added to the graph again, therefore f`(x) will be multiplied
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // rsqrt
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(rsqrt, cpu, mshadow_op::reciprocal_square_root)
 MXNET_ADD_SPARSE_OP_ALIAS(rsqrt)
-.describe(R"code(Returns element-wise inverse square-root value of the input.
+    .describe(R"code(Returns element-wise inverse square-root value of the input.
 
 .. math::
    rsqrt(x) = 1/\sqrt{x}
@@ -219,40 +243,42 @@ Example::
 The storage type of ``rsqrt`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rsqrt"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rsqrt"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(
-  _backward_rsqrt, unary_bwd<mshadow_op::reciprocal_square_root_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // NodeEntry{n} : y_grad * f'(x)
-      // n->inputs[0] : y_grad
-      // n->inputs[1] : x
-      // ograds[0] : head_grad_grads (dL/dxgrad)
-      // f(x) = 1/(x^1/2)
-      // f'(x) = -1/(2*x^3/2)
-      // f''(x) = f'(x) * -3/(2*x) = 3/(4 * x^5/2)
-      auto dydx = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dydx_mul_grad_x = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto two_x = op.mul(2.0, x);
-      auto r_two_x = op.reciprocal(two_x);
-      auto neg_r_two_x = op.negative(r_two_x);
-      auto three_by_two_neg_r_x = op.mul(3.0, neg_r_two_x);
-      auto x_grad_grad = op.mul(three_by_two_neg_r_x, dydx_mul_grad_x);
-      auto x_grad = op.div(dydx_mul_grad_x, dydx);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], x_grad));
-      ret.emplace_back(op.mul(ograds[0], x_grad_grad));
-      return ret;
-  });
+    _backward_rsqrt,
+    unary_bwd<mshadow_op::reciprocal_square_root_grad>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 // NodeEntry{n} : y_grad * f'(x)
+                                 // n->inputs[0] : y_grad
+                                 // n->inputs[1] : x
+                                 // ograds[0] : head_grad_grads (dL/dxgrad)
+                                 // f(x) = 1/(x^1/2)
+                                 // f'(x) = -1/(2*x^3/2)
+                                 // f''(x) = f'(x) * -3/(2*x) = 3/(4 * x^5/2)
+                                 auto dydx            = n->inputs[0];
+                                 auto x               = n->inputs[1];
+                                 auto dydx_mul_grad_x = nnvm::NodeEntry{n};
+                                 auto op              = mxnet::util::NodeOpGen{n};
+
+                                 auto two_x                = op.mul(2.0, x);
+                                 auto r_two_x              = op.reciprocal(two_x);
+                                 auto neg_r_two_x          = op.negative(r_two_x);
+                                 auto three_by_two_neg_r_x = op.mul(3.0, neg_r_two_x);
+                                 auto x_grad_grad = op.mul(three_by_two_neg_r_x, dydx_mul_grad_x);
+                                 auto x_grad      = op.div(dydx_mul_grad_x, dydx);
+
+                                 std::vector<nnvm::NodeEntry> ret;
+                                 ret.emplace_back(op.mul(ograds[0], x_grad));
+                                 ret.emplace_back(op.mul(ograds[0], x_grad_grad));
+                                 return ret;
+                               });
 
 // cbrt
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(cbrt, cpu, mshadow_op::cube_root)
-.describe(R"code(Returns element-wise cube-root value of the input.
+    .describe(R"code(Returns element-wise cube-root value of the input.
 
 .. math::
    cbrt(x) = \sqrt[3]{x}
@@ -268,50 +294,69 @@ The storage type of ``cbrt`` output depends upon the input storage type:
    - cbrt(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_cbrt"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_cbrt"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_cbrt,
                                                   unary_bwd<mshadow_op::cube_root_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // NodeEntry{n} : y_grad * f'(x)
-      // n->inputs[0] : y_grad
-      // n->inputs[1] : f(x) = x^1/3
-      // ograds[0] : head_grads
-      // f'(x) = 1/(3*x^2/3)
-      // f''(x) = f'(x) * -2/(3*x) = -2/(9 * x^5/3)
-      const std::unordered_map<std::string, std::string> three = {{"scalar", "3.0"}};
-      const std::unordered_map<std::string, std::string> two = {{"scalar", "2.0"}};
-      auto x = MakeNode("_power_scalar", n->attrs.name + "_x", {n->inputs[1]}, &three, &n);
-      auto three_x = MakeNode("_mul_scalar", n->attrs.name + "_three_x",
-                                    {nnvm::NodeEntry{x}}, &three, &n);
-      auto r_three_x = MakeNode("reciprocal", n->attrs.name + "_reciprocal_three_x",
-                                    {nnvm::NodeEntry{three_x}}, nullptr, &n);
-      auto neg_r_three_x = MakeNode("negative", n->attrs.name + "_neg_reciprocal_three_x",
-                                    {nnvm::NodeEntry{r_three_x}}, nullptr, &n);
-      auto two_third_neg_r_x = MakeNode("_mul_scalar",
-                                        n->attrs.name + "_two_third_neg_reciprocal_x",
-                                        {nnvm::NodeEntry{neg_r_three_x}}, &two, &n);
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_grad_grad_mid",
-                                    {nnvm::NodeEntry{two_third_neg_r_x}, n->inputs[0]},
-                                    nullptr, &n);
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_grad_div",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      // when building gradient graph, the backward node of n->inputs[1] will be
-      // added to the graph again, therefore f`(x) will be multiplied
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-  });
-
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // NodeEntry{n} : y_grad * f'(x)
+          // n->inputs[0] : y_grad
+          // n->inputs[1] : f(x) = x^1/3
+          // ograds[0] : head_grads
+          // f'(x) = 1/(3*x^2/3)
+          // f''(x) = f'(x) * -2/(3*x) = -2/(9 * x^5/3)
+          const std::unordered_map<std::string, std::string> three = {{"scalar", "3.0"}};
+          const std::unordered_map<std::string, std::string> two   = {{"scalar", "2.0"}};
+          auto x = MakeNode("_power_scalar", n->attrs.name + "_x", {n->inputs[1]}, &three, &n);
+          auto three_x =
+              MakeNode("_mul_scalar", n->attrs.name + "_three_x", {nnvm::NodeEntry{x}}, &three, &n);
+          auto r_three_x         = MakeNode("reciprocal",
+                                    n->attrs.name + "_reciprocal_three_x",
+                                    {nnvm::NodeEntry{three_x}},
+                                    nullptr,
+                                    &n);
+          auto neg_r_three_x     = MakeNode("negative",
+                                        n->attrs.name + "_neg_reciprocal_three_x",
+                                        {nnvm::NodeEntry{r_three_x}},
+                                        nullptr,
+                                        &n);
+          auto two_third_neg_r_x = MakeNode("_mul_scalar",
+                                            n->attrs.name + "_two_third_neg_reciprocal_x",
+                                            {nnvm::NodeEntry{neg_r_three_x}},
+                                            &two,
+                                            &n);
+          auto grad_grad_mid     = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_grad_grad_mid",
+                                        {nnvm::NodeEntry{two_third_neg_r_x}, n->inputs[0]},
+                                        nullptr,
+                                        &n);
+          auto dydx              = MakeNode("elemwise_div",
+                               n->attrs.name + "_grad_div",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          // when building gradient graph, the backward node of n->inputs[1] will be
+          // added to the graph again, therefore f`(x) will be multiplied
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // rcbrt
 MXNET_OPERATOR_REGISTER_UNARY(rcbrt)
-.describe(R"code(Returns element-wise inverse cube-root value of the input.
+    .describe(R"code(Returns element-wise inverse cube-root value of the input.
 
 .. math::
    rcbrt(x) = 1/\sqrt[3]{x}
@@ -321,39 +366,40 @@ Example::
    rcbrt([1,8,-125]) = [1.0, 0.5, -0.2]
 
 )code" ADD_FILELINE)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::reciprocal_cube_root>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rcbrt"});
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::Compute<cpu, mshadow_op::reciprocal_cube_root>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_rcbrt"});
 
 MXNET_OPERATOR_REGISTER_BINARY(_backward_rcbrt)
-.set_attr<FCompute>("FCompute<cpu>",
-                    ElemwiseBinaryOp::Compute<cpu,
-                      unary_bwd<mshadow_op::reciprocal_cube_root_grad>>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // NodeEntry{n} : y_grad * f'(x)
-      // n->inputs[0] : y_grad
-      // n->inputs[1] : x
-      // ograds[0] : head_grad_grads (dL/dxgrad)
-      // f(x) = 1/(x^1/3)
-      // f'(x) = -1/(3*x^4/3)
-      // f''(x) = f'(x) * -4/(3*x) = 4/(9 * x^7/3)
-      auto dydx = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dydx_mul_grad_x = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto three_x = op.mul(3.0, x);
-      auto r_three_x = op.reciprocal(three_x);
-      auto neg_r_three_x = op.negative(r_three_x);
-      auto four_by_three_neg_r_x = op.mul(4.0, neg_r_three_x);
-      auto x_grad_grad = op.mul(four_by_three_neg_r_x, dydx_mul_grad_x);
-      auto x_grad = op.div(dydx_mul_grad_x, dydx);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], x_grad));
-      ret.emplace_back(op.mul(ograds[0], x_grad_grad));
-      return ret;
-  });
+    .set_attr<FCompute>(
+        "FCompute<cpu>",
+        ElemwiseBinaryOp::Compute<cpu, unary_bwd<mshadow_op::reciprocal_cube_root_grad>>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 // NodeEntry{n} : y_grad * f'(x)
+                                 // n->inputs[0] : y_grad
+                                 // n->inputs[1] : x
+                                 // ograds[0] : head_grad_grads (dL/dxgrad)
+                                 // f(x) = 1/(x^1/3)
+                                 // f'(x) = -1/(3*x^4/3)
+                                 // f''(x) = f'(x) * -4/(3*x) = 4/(9 * x^7/3)
+                                 auto dydx            = n->inputs[0];
+                                 auto x               = n->inputs[1];
+                                 auto dydx_mul_grad_x = nnvm::NodeEntry{n};
+                                 auto op              = mxnet::util::NodeOpGen{n};
+
+                                 auto three_x               = op.mul(3.0, x);
+                                 auto r_three_x             = op.reciprocal(three_x);
+                                 auto neg_r_three_x         = op.negative(r_three_x);
+                                 auto four_by_three_neg_r_x = op.mul(4.0, neg_r_three_x);
+                                 auto x_grad_grad = op.mul(four_by_three_neg_r_x, dydx_mul_grad_x);
+                                 auto x_grad      = op.div(dydx_mul_grad_x, dydx);
+
+                                 std::vector<nnvm::NodeEntry> ret;
+                                 ret.emplace_back(op.mul(ograds[0], x_grad));
+                                 ret.emplace_back(op.mul(ograds[0], x_grad_grad));
+                                 return ret;
+                               });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_pow.cu b/src/operator/tensor/elemwise_unary_op_pow.cu
index c05627724738..77ac2652c410 100644
--- a/src/operator/tensor/elemwise_unary_op_pow.cu
+++ b/src/operator/tensor/elemwise_unary_op_pow.cu
@@ -28,52 +28,46 @@ namespace mxnet {
 namespace op {
 
 // reciprocal
-NNVM_REGISTER_OP(reciprocal)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"reciprocal"});
+NNVM_REGISTER_OP(reciprocal).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"reciprocal"});
 
 NNVM_REGISTER_OP(_backward_reciprocal)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_reciprocal"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_reciprocal"});
 
 // square
 NNVM_REGISTER_OP(square)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"square"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"square"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"square"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"square"});
 
 NNVM_REGISTER_OP(_backward_square)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_square"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_square"});
 
 // sqrt
 NNVM_REGISTER_OP(sqrt)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sqrt"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sqrt"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sqrt"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sqrt"});
 
 NNVM_REGISTER_OP(_backward_sqrt)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sqrt"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sqrt"});
 
 // rsqrt
-NNVM_REGISTER_OP(rsqrt)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"rsqrt"});
+NNVM_REGISTER_OP(rsqrt).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"rsqrt"});
 
 NNVM_REGISTER_OP(_backward_rsqrt)
-.set_attr<FCompute>("FCompute<gpu>",
-  ElemwiseBinaryRTCCompute{"backward_rsqrt"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_rsqrt"});
 
 // cbrt
 NNVM_REGISTER_OP(cbrt)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"cbrt"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"cbrt"});
-
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"cbrt"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"cbrt"});
 
 NNVM_REGISTER_OP(_backward_cbrt)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cbrt"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cbrt"});
 
 // rcbrt
-NNVM_REGISTER_OP(rcbrt)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"rcbrt"});
+NNVM_REGISTER_OP(rcbrt).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"rcbrt"});
 
 NNVM_REGISTER_OP(_backward_rcbrt)
-.set_attr<FCompute>("FCompute<gpu>",
-  ElemwiseBinaryRTCCompute{"backward_rcbrt"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_rcbrt"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_trig.cc b/src/operator/tensor/elemwise_unary_op_trig.cc
index 7558b92536ce..12b383283ee4 100644
--- a/src/operator/tensor/elemwise_unary_op_trig.cc
+++ b/src/operator/tensor/elemwise_unary_op_trig.cc
@@ -31,7 +31,7 @@ namespace op {
 
 // sin
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(sin, cpu, mshadow_op::sin)
-.describe(R"code(Computes the element-wise sine of the input array.
+    .describe(R"code(Computes the element-wise sine of the input array.
 
 The input should be in radians (:math:`2\pi` rad equals 360 degrees).
 
@@ -45,40 +45,52 @@ The storage type of ``sin`` output depends upon the input storage type:
    - sin(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_sin" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_sin"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_sin, unary_bwd<mshadow_op::sin_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseUseIn)
-      // f(x) = sin(x)
-      // f'(x) = cos(x)
-      // f''(x) = -sin(x)
-      auto dydx = MakeNode("cos", n->attrs.name + "_dydx",
-                             {n->inputs[1]}, nullptr, &n);
-      auto d2ydx2 = MakeNode("negative", n->attrs.name + "_d2ydx2",
-          {nnvm::NodeEntry{
-            MakeNode("sin", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n)
-          }}, nullptr, &n);
-
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_mid",
-                                    {n->inputs[0], nnvm::NodeEntry{d2ydx2}}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseUseIn)
+          // f(x) = sin(x)
+          // f'(x) = cos(x)
+          // f''(x) = -sin(x)
+          auto dydx = MakeNode("cos", n->attrs.name + "_dydx", {n->inputs[1]}, nullptr, &n);
+          auto d2ydx2 =
+              MakeNode("negative",
+                       n->attrs.name + "_d2ydx2",
+                       {nnvm::NodeEntry{MakeNode(
+                           "sin", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n)}},
+                       nullptr,
+                       &n);
+
+          auto grad_grad_mid = MakeNode("elemwise_mul",
+                                        n->attrs.name + "backward_grad_grad_mid",
+                                        {n->inputs[0], nnvm::NodeEntry{d2ydx2}},
+                                        nullptr,
+                                        &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // cos
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(cos, cpu, mshadow_op::cos)
 MXNET_ADD_SPARSE_OP_ALIAS(cos)
-.describe(R"code(Computes the element-wise cosine of the input array.
+    .describe(R"code(Computes the element-wise cosine of the input array.
 
 The input should be in radians (:math:`2\pi` rad equals 360 degrees).
 
@@ -88,43 +100,58 @@ The input should be in radians (:math:`2\pi` rad equals 360 degrees).
 The storage type of ``cos`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_cos"});
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_cos"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_cos, unary_bwd<mshadow_op::cos_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dx_grad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseUseIn)
-      // f(x) = cos(x)
-      // f'(x) = -sin(x)
-      // f''(x) = -cos(x)
-      auto dydx = MakeNode("negative", n->attrs.name + "_dydx",
-          {nnvm::NodeEntry{
-            MakeNode("sin", n->attrs.name + "_grad_mid", {n->inputs[1]}, nullptr, &n)
-          }}, nullptr, &n);
-      auto d2ydx2 = MakeNode("negative", n->attrs.name + "_d2ydx2",
-          {nnvm::NodeEntry{
-            MakeNode("cos", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n)
-          }}, nullptr, &n);
-
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad_mid",
-                                    {n->inputs[0], nnvm::NodeEntry{d2ydx2}}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-      // for the backward of the _backward_cos node
-      // first input is the ograd and second input is x (because ElemwiseUseIn)
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-    });
-
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dx_grad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseUseIn)
+          // f(x) = cos(x)
+          // f'(x) = -sin(x)
+          // f''(x) = -cos(x)
+          auto dydx =
+              MakeNode("negative",
+                       n->attrs.name + "_dydx",
+                       {nnvm::NodeEntry{MakeNode(
+                           "sin", n->attrs.name + "_grad_mid", {n->inputs[1]}, nullptr, &n)}},
+                       nullptr,
+                       &n);
+          auto d2ydx2 =
+              MakeNode("negative",
+                       n->attrs.name + "_d2ydx2",
+                       {nnvm::NodeEntry{MakeNode(
+                           "cos", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n)}},
+                       nullptr,
+                       &n);
+
+          auto grad_grad_mid = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_backward_grad_grad_mid",
+                                        {n->inputs[0], nnvm::NodeEntry{d2ydx2}},
+                                        nullptr,
+                                        &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+          // for the backward of the _backward_cos node
+          // first input is the ograd and second input is x (because ElemwiseUseIn)
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // tan
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(tan, cpu, mshadow_op::tan)
-.describe(R"code(Computes the element-wise tangent of the input array.
+    .describe(R"code(Computes the element-wise tangent of the input array.
 
 The input should be in radians (:math:`2\pi` rad equals 360 degrees).
 
@@ -138,39 +165,53 @@ The storage type of ``tan`` output depends upon the input storage type:
    - tan(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{ "_backward_tan" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_tan"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_tan, unary_bwd<mshadow_op::tan_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // NodeEntry{n} : y_grad * f'(x)
-      // n->inputs[0] : y_grad (dL/dy)
-      // n->inputs[1] : y = f(x) = tan(x) (ElemwiseGradUseOut)
-      // ograds[0] : head_grads (dL/dxgrad)
-      // f'(x) = sec^2(x)
-      // f''(x) = 2 * f'(x) * f(x)
-      //
-      // Note: When building gradient graph, the backward node of n->inputs[1] will be
-      // added to the graph again, therefore f`(x) will be multiplied
-      // So we need to compute only -> 2 * f(x) * dL/dy_grad * y_grad
-      const std::unordered_map<std::string, std::string> args = {{"scalar", "2.0"}};
-      auto two_y = MakeNode("_mul_scalar", n->attrs.name + "_mul_two", {n->inputs[1]}, &args, &n);
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_grad_mul",
-                                    {n->inputs[0], nnvm::NodeEntry{two_y}}, nullptr, &n);
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_grad_div",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-  });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // NodeEntry{n} : y_grad * f'(x)
+          // n->inputs[0] : y_grad (dL/dy)
+          // n->inputs[1] : y = f(x) = tan(x) (ElemwiseGradUseOut)
+          // ograds[0] : head_grads (dL/dxgrad)
+          // f'(x) = sec^2(x)
+          // f''(x) = 2 * f'(x) * f(x)
+          //
+          // Note: When building gradient graph, the backward node of n->inputs[1] will be
+          // added to the graph again, therefore f`(x) will be multiplied
+          // So we need to compute only -> 2 * f(x) * dL/dy_grad * y_grad
+          const std::unordered_map<std::string, std::string> args = {{"scalar", "2.0"}};
+          auto two_y =
+              MakeNode("_mul_scalar", n->attrs.name + "_mul_two", {n->inputs[1]}, &args, &n);
+          auto grad_grad_mid = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_grad_mul",
+                                        {n->inputs[0], nnvm::NodeEntry{two_y}},
+                                        nullptr,
+                                        &n);
+          auto dydx          = MakeNode("elemwise_div",
+                               n->attrs.name + "_grad_div",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // arcsin
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(arcsin, cpu, mshadow_op::arcsin)
-.describe(R"code(Returns element-wise inverse sine of the input array.
+    .describe(R"code(Returns element-wise inverse sine of the input array.
 
 The input should be in the range `[-1, 1]`.
 The output is in the closed interval of [:math:`-\pi/2`, :math:`\pi/2`].
@@ -185,42 +226,42 @@ The storage type of ``arcsin`` output depends upon the input storage type:
    - arcsin(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_arcsin" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_arcsin"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_arcsin,
                                                   unary_bwd<mshadow_op::arcsin_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseGradUseIn)
-      // f(x) = arcsin(x)
-      // n: f'(x) = 1/(1-x^2)^1/2
-      // f''(x) = f'(x) * x/(1-x^2)
-      // Note: x/(1-x^2) = x * f'(x)^2
-      auto dydx = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dydx_mul_grad_x = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto ones = op.ones_like(x);
-      auto x_grad = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_arcsin",
-                                                   n->attrs.name + "_backward_arcsin",
-                                                   {ones, x}, nullptr, &n)};
-      auto x_grad_square = op.square(x_grad);
-      auto x_grad_square_mul_x = op.mul(x_grad_square, x);
-      auto x_grad_grad = op.mul(dydx_mul_grad_x, x_grad_square_mul_x);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], x_grad));
-      ret.emplace_back(op.mul(ograds[0], x_grad_grad));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = arcsin(x)
+          // n: f'(x) = 1/(1-x^2)^1/2
+          // f''(x) = f'(x) * x/(1-x^2)
+          // Note: x/(1-x^2) = x * f'(x)^2
+          auto dydx            = n->inputs[0];
+          auto x               = n->inputs[1];
+          auto dydx_mul_grad_x = nnvm::NodeEntry{n};
+          auto op              = mxnet::util::NodeOpGen{n};
+
+          auto ones                = op.ones_like(x);
+          auto x_grad              = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_arcsin", n->attrs.name + "_backward_arcsin", {ones, x}, nullptr, &n)};
+          auto x_grad_square       = op.square(x_grad);
+          auto x_grad_square_mul_x = op.mul(x_grad_square, x);
+          auto x_grad_grad         = op.mul(dydx_mul_grad_x, x_grad_square_mul_x);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(op.mul(ograds[0], x_grad));
+          ret.emplace_back(op.mul(ograds[0], x_grad_grad));
+          return ret;
+        });
 
 // arccos
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(arccos, cpu, mshadow_op::arccos)
 MXNET_ADD_SPARSE_OP_ALIAS(arccos)
-.describe(R"code(Returns element-wise inverse cosine of the input array.
+    .describe(R"code(Returns element-wise inverse cosine of the input array.
 
 The input should be in range `[-1, 1]`.
 The output is in the closed interval :math:`[0, \pi]`
@@ -231,42 +272,41 @@ The output is in the closed interval :math:`[0, \pi]`
 The storage type of ``arccos`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_arccos" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_arccos"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_arccos,
                                                   unary_bwd<mshadow_op::arccos_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseGradUseIn)
-      // f(x) = arccos(x)
-      // n: f'(x) = -1/(1-x^2)^1/2
-      // f''(x) = f'(x) * x/(1-x^2)
-      // Note: x/(1-x^2) = x * f'(x)^2
-      auto dydx = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dydx_mul_grad_x = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto ones = op.ones_like(x);
-      auto x_grad = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_arccos",
-                                                   n->attrs.name + "_backward_arccos",
-                                                   {ones, x}, nullptr, &n)};
-      auto x_grad_square = op.square(x_grad);
-      auto x_grad_square_mul_x = op.mul(x_grad_square, x);
-      auto x_grad_grad = op.mul(dydx_mul_grad_x, x_grad_square_mul_x);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], x_grad));
-      ret.emplace_back(op.mul(ograds[0], x_grad_grad));
-      return ret;
-    });
-
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = arccos(x)
+          // n: f'(x) = -1/(1-x^2)^1/2
+          // f''(x) = f'(x) * x/(1-x^2)
+          // Note: x/(1-x^2) = x * f'(x)^2
+          auto dydx            = n->inputs[0];
+          auto x               = n->inputs[1];
+          auto dydx_mul_grad_x = nnvm::NodeEntry{n};
+          auto op              = mxnet::util::NodeOpGen{n};
+
+          auto ones                = op.ones_like(x);
+          auto x_grad              = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_arccos", n->attrs.name + "_backward_arccos", {ones, x}, nullptr, &n)};
+          auto x_grad_square       = op.square(x_grad);
+          auto x_grad_square_mul_x = op.mul(x_grad_square, x);
+          auto x_grad_grad         = op.mul(dydx_mul_grad_x, x_grad_square_mul_x);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(op.mul(ograds[0], x_grad));
+          ret.emplace_back(op.mul(ograds[0], x_grad_grad));
+          return ret;
+        });
 
 // arctan
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(arctan, cpu, mshadow_op::arctan)
-.describe(R"code(Returns element-wise inverse tangent of the input array.
+    .describe(R"code(Returns element-wise inverse tangent of the input array.
 
 The output is in the closed interval :math:`[-\pi/2, \pi/2]`
 
@@ -280,45 +320,45 @@ The storage type of ``arctan`` output depends upon the input storage type:
    - arctan(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_arctan" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_arctan"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_arctan,
                                                   unary_bwd<mshadow_op::arctan_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseGradUseIn)
-      // n: dL/dy * f'(x)
-      // f(x) = arctanh(x)
-      // dydx = f'(x) = 1/(1+x^2)
-      // f''(x) = f'(x) * f'(x) * -2 * x = (-2 * x) / (1 + x^2)^2
-      // return:
-      //     0: dL/dy_grad * dy/dx
-      //     1: dL/dy_grad * dL/dy * f''(x)
-      auto dldy = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dldy_mul_dydx = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto ones = op.ones_like(x);
-      auto x_grad = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_arctan",
-                                                   n->attrs.name + "_backward_arctan",
-                                                   {ones, x}, nullptr, &n)};
-      auto x_grad_square = op.square(x_grad);
-      auto x_grad_square_mul_x = op.mul(x_grad_square, x);
-      auto x_grad_square_mul_2_x = op.mul(-2.0, x_grad_square_mul_x);
-      auto grad_grad_x = op.mul(dldy, x_grad_square_mul_2_x);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], x_grad));
-      ret.emplace_back(op.mul(ograds[0], grad_grad_x));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // n: dL/dy * f'(x)
+          // f(x) = arctanh(x)
+          // dydx = f'(x) = 1/(1+x^2)
+          // f''(x) = f'(x) * f'(x) * -2 * x = (-2 * x) / (1 + x^2)^2
+          // return:
+          //     0: dL/dy_grad * dy/dx
+          //     1: dL/dy_grad * dL/dy * f''(x)
+          auto dldy          = n->inputs[0];
+          auto x             = n->inputs[1];
+          auto dldy_mul_dydx = nnvm::NodeEntry{n};
+          auto op            = mxnet::util::NodeOpGen{n};
+
+          auto ones                  = op.ones_like(x);
+          auto x_grad                = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_arctan", n->attrs.name + "_backward_arctan", {ones, x}, nullptr, &n)};
+          auto x_grad_square         = op.square(x_grad);
+          auto x_grad_square_mul_x   = op.mul(x_grad_square, x);
+          auto x_grad_square_mul_2_x = op.mul(-2.0, x_grad_square_mul_x);
+          auto grad_grad_x           = op.mul(dldy, x_grad_square_mul_2_x);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(op.mul(ograds[0], x_grad));
+          ret.emplace_back(op.mul(ograds[0], grad_grad_x));
+          return ret;
+        });
 
 // degrees
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(degrees, cpu, mshadow_op::degrees)
-.describe(R"code(Converts each element of the input array from radians to degrees.
+    .describe(R"code(Converts each element of the input array from radians to degrees.
 
 .. math::
    degrees([0, \pi/2, \pi, 3\pi/2, 2\pi]) = [0, 90, 180, 270, 360]
@@ -330,14 +370,14 @@ The storage type of ``degrees`` output depends upon the input storage type:
    - degrees(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_degrees" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_degrees"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_degrees,
                                                   unary_bwd<mshadow_op::degrees_grad>);
 
 // radians
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(radians, cpu, mshadow_op::radians)
-.describe(R"code(Converts each element of the input array from degrees to radians.
+    .describe(R"code(Converts each element of the input array from degrees to radians.
 
 .. math::
    radians([0, 90, 180, 270, 360]) = [0, \pi/2, \pi, 3\pi/2, 2\pi]
@@ -349,15 +389,15 @@ The storage type of ``radians`` output depends upon the input storage type:
    - radians(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_radians" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_radians"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_radians,
                                                   unary_bwd<mshadow_op::radians_grad>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 // sinh
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(sinh, cpu, mshadow_op::sinh)
-.describe(R"code(Returns the hyperbolic sine of the input array, computed element-wise.
+    .describe(R"code(Returns the hyperbolic sine of the input array, computed element-wise.
 
 .. math::
    sinh(x) = 0.5\times(exp(x) - exp(-x))
@@ -369,37 +409,47 @@ The storage type of ``sinh`` output depends upon the input storage type:
    - sinh(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_sinh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_sinh"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_sinh, unary_bwd<mshadow_op::sinh_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseUseIn)
-      // f(x) = sinh(x)
-      // f'(x) = cosh(x)
-      // f''(x) = sinh(x)
-      auto dydx = MakeNode("cosh", n->attrs.name + "_dydx",
-                             {n->inputs[1]}, nullptr, &n);
-      auto d2ydx2 = MakeNode("sinh", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n);
-
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_mid",
-                                    {n->inputs[0], nnvm::NodeEntry{d2ydx2}}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseUseIn)
+          // f(x) = sinh(x)
+          // f'(x) = cosh(x)
+          // f''(x) = sinh(x)
+          auto dydx = MakeNode("cosh", n->attrs.name + "_dydx", {n->inputs[1]}, nullptr, &n);
+          auto d2ydx2 =
+              MakeNode("sinh", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n);
+
+          auto grad_grad_mid = MakeNode("elemwise_mul",
+                                        n->attrs.name + "backward_grad_grad_mid",
+                                        {n->inputs[0], nnvm::NodeEntry{d2ydx2}},
+                                        nullptr,
+                                        &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // cosh
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(cosh, cpu, mshadow_op::cosh)
 MXNET_ADD_SPARSE_OP_ALIAS(cosh)
-.describe(R"code(Returns the hyperbolic cosine  of the input array, computed element-wise.
+    .describe(R"code(Returns the hyperbolic cosine  of the input array, computed element-wise.
 
 .. math::
    cosh(x) = 0.5\times(exp(x) + exp(-x))
@@ -407,37 +457,46 @@ MXNET_ADD_SPARSE_OP_ALIAS(cosh)
 The storage type of ``cosh`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_cosh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_cosh"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU(_backward_cosh, unary_bwd<mshadow_op::cosh_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseUseIn)
-      // f(x) = cosh(x)
-      // f'(x) = sinh(x)
-      // f''(x) = cosh(x)
-      auto dydx = MakeNode("sinh", n->attrs.name + "_dydx",
-                             {n->inputs[1]}, nullptr, &n);
-      auto d2ydx2 = MakeNode("cosh", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n);
-
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_mid",
-                                    {n->inputs[0], nnvm::NodeEntry{d2ydx2}}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "_backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-    });
-
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseUseIn)
+          // f(x) = cosh(x)
+          // f'(x) = sinh(x)
+          // f''(x) = cosh(x)
+          auto dydx = MakeNode("sinh", n->attrs.name + "_dydx", {n->inputs[1]}, nullptr, &n);
+          auto d2ydx2 =
+              MakeNode("cosh", n->attrs.name + "_grad_grad_mid", {n->inputs[1]}, nullptr, &n);
+
+          auto grad_grad_mid = MakeNode("elemwise_mul",
+                                        n->attrs.name + "backward_grad_grad_mid",
+                                        {n->inputs[0], nnvm::NodeEntry{d2ydx2}},
+                                        nullptr,
+                                        &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "_backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // tanh
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(tanh, cpu, mshadow_op::tanh)
-.describe(R"code(Returns the hyperbolic tangent of the input array, computed element-wise.
+    .describe(R"code(Returns the hyperbolic tangent of the input array, computed element-wise.
 
 .. math::
    tanh(x) = sinh(x) / cosh(x)
@@ -449,40 +508,53 @@ The storage type of ``tanh`` output depends upon the input storage type:
    - tanh(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{ "_backward_tanh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_tanh"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_tanh, unary_bwd<mshadow_op::tanh_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // NodeEntry{n} : y_grad * f'(x)
-      // n->inputs[0] : y_grad (dL/dy)
-      // n->inputs[1] : y = f(x) = tanh(x) (ElemwiseGradUseOut)
-      // ograds[0] : head_grads dL/dxgrad
-      // f'(x) = sech^2(x)
-      // f''(x) = -2 * f'(x) * f(x)
-      //
-      // Note: when building gradient graph, the backward node of n->inputs[1] will be
-      // added to the graph again, therefore f`(x) will be multiplied
-      // So we need to compute only -> -2 * f(x) * dL/dy_grad * y_grad
-      const std::unordered_map<std::string, std::string> args = {{"scalar", "-2.0"}};
-      auto neg_two_y = MakeNode("_mul_scalar", n->attrs.name + "_mul_neg_two",
-                                {n->inputs[1]}, &args, &n);
-      auto grad_grad_mid = MakeNode("elemwise_mul", n->attrs.name + "_grad_mul",
-                                    {n->inputs[0], nnvm::NodeEntry{neg_two_y}}, nullptr, &n);
-      auto dydx = MakeNode("elemwise_div", n->attrs.name + "_grad_div",
-                           {nnvm::NodeEntry{n}, n->inputs[0]}, nullptr, &n);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad",
-                                {ograds[0], nnvm::NodeEntry{dydx}}, nullptr, &n));
-      ret.emplace_back(MakeNode("elemwise_mul", n->attrs.name + "backward_grad_grad_in",
-                                {ograds[0], nnvm::NodeEntry{grad_grad_mid}}, nullptr, &n));
-      return ret;
-  });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // NodeEntry{n} : y_grad * f'(x)
+          // n->inputs[0] : y_grad (dL/dy)
+          // n->inputs[1] : y = f(x) = tanh(x) (ElemwiseGradUseOut)
+          // ograds[0] : head_grads dL/dxgrad
+          // f'(x) = sech^2(x)
+          // f''(x) = -2 * f'(x) * f(x)
+          //
+          // Note: when building gradient graph, the backward node of n->inputs[1] will be
+          // added to the graph again, therefore f`(x) will be multiplied
+          // So we need to compute only -> -2 * f(x) * dL/dy_grad * y_grad
+          const std::unordered_map<std::string, std::string> args = {{"scalar", "-2.0"}};
+          auto neg_two_y =
+              MakeNode("_mul_scalar", n->attrs.name + "_mul_neg_two", {n->inputs[1]}, &args, &n);
+          auto grad_grad_mid = MakeNode("elemwise_mul",
+                                        n->attrs.name + "_grad_mul",
+                                        {n->inputs[0], nnvm::NodeEntry{neg_two_y}},
+                                        nullptr,
+                                        &n);
+          auto dydx          = MakeNode("elemwise_div",
+                               n->attrs.name + "_grad_div",
+                               {nnvm::NodeEntry{n}, n->inputs[0]},
+                               nullptr,
+                               &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad",
+                                    {ograds[0], nnvm::NodeEntry{dydx}},
+                                    nullptr,
+                                    &n));
+          ret.emplace_back(MakeNode("elemwise_mul",
+                                    n->attrs.name + "backward_grad_grad_in",
+                                    {ograds[0], nnvm::NodeEntry{grad_grad_mid}},
+                                    nullptr,
+                                    &n));
+          return ret;
+        });
 
 // arcsinh
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(arcsinh, cpu, mshadow_op::arcsinh)
-.describe(R"code(Returns the element-wise inverse hyperbolic sine of the input array, \
+    .describe(R"code(Returns the element-wise inverse hyperbolic sine of the input array, \
 computed element-wise.
 
 The storage type of ``arcsinh`` output depends upon the input storage type:
@@ -492,82 +564,82 @@ The storage type of ``arcsinh`` output depends upon the input storage type:
    - arcsinh(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_arcsinh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_arcsinh"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_arcsinh,
                                                   unary_bwd<mshadow_op::arcsinh_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseGradUseIn)
-      // f(x) = arcsinh(x)
-      // n: f'(x) = 1/(x^2 + 1)^1/2
-      // f''(x) = f'(x) * x/(x^2 + 1) = x/(x^2 + 1)^(3/2)
-      // Note: x/(x^2 + 1) = x * f'(x)^2
-      auto dydx = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dydx_mul_grad_x = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto ones = op.ones_like(x);
-      auto grad_x = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_arcsinh",
-                                                   n->attrs.name + "_backward_arcsinh",
-                                                   {ones, x}, nullptr, &n)};
-      auto grad_x_square = op.square(grad_x);
-      auto grad_x_square_mul_x = op.mul(grad_x_square, x);
-      auto grad_grad_x = op.mul(dydx_mul_grad_x, grad_x_square_mul_x);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], grad_x));
-      ret.emplace_back(op.mul(ograds[0], grad_grad_x));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = arcsinh(x)
+          // n: f'(x) = 1/(x^2 + 1)^1/2
+          // f''(x) = f'(x) * x/(x^2 + 1) = x/(x^2 + 1)^(3/2)
+          // Note: x/(x^2 + 1) = x * f'(x)^2
+          auto dydx            = n->inputs[0];
+          auto x               = n->inputs[1];
+          auto dydx_mul_grad_x = nnvm::NodeEntry{n};
+          auto op              = mxnet::util::NodeOpGen{n};
+
+          auto ones                = op.ones_like(x);
+          auto grad_x              = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_arcsinh", n->attrs.name + "_backward_arcsinh", {ones, x}, nullptr, &n)};
+          auto grad_x_square       = op.square(grad_x);
+          auto grad_x_square_mul_x = op.mul(grad_x_square, x);
+          auto grad_grad_x         = op.mul(dydx_mul_grad_x, grad_x_square_mul_x);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(op.mul(ograds[0], grad_x));
+          ret.emplace_back(op.mul(ograds[0], grad_grad_x));
+          return ret;
+        });
 
 // arccosh
 MXNET_OPERATOR_REGISTER_UNARY_WITH_SPARSE_DR(arccosh, cpu, mshadow_op::arccosh)
 MXNET_ADD_SPARSE_OP_ALIAS(arccosh)
-.describe(R"code(Returns the element-wise inverse hyperbolic cosine of the input array, \
+    .describe(R"code(Returns the element-wise inverse hyperbolic cosine of the input array, \
 computed element-wise.
 
 The storage type of ``arccosh`` output is always dense
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_arccosh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_arccosh"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_arccosh,
                                                   unary_bwd<mshadow_op::arccosh_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseGradUseIn)
-      // f(x) = arccosh(x)
-      // n: f'(x) = 1/((x - 1)^1/2 * (x + 1)^1/2)
-      // f''(x) = f'(x) * x/((x + 1)*(x - 1)) = x/((x-1)^1/2 * (x+1)^1/2 * (x-1) * (x+1))
-      // Note: x/((x-1)*(x+1)) = x * f'(x)^2
-      auto dydx = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dydx_mul_grad_x = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto ones = op.ones_like(x);
-      auto grad_x = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_arccosh",
-                                                   n->attrs.name + "_backward_arccosh",
-                                                   {ones, x}, nullptr, &n)};
-      auto grad_x_square = op.square(grad_x);
-      auto grad_x_square_mul_x = op.mul(grad_x_square, x);
-      auto grad_grad_x = op.mul(dydx_mul_grad_x, grad_x_square_mul_x);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], grad_x));
-      ret.emplace_back(op.mul(ograds[0], grad_grad_x));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // f(x) = arccosh(x)
+          // n: f'(x) = 1/((x - 1)^1/2 * (x + 1)^1/2)
+          // f''(x) = f'(x) * x/((x + 1)*(x - 1)) = x/((x-1)^1/2 * (x+1)^1/2 * (x-1) * (x+1))
+          // Note: x/((x-1)*(x+1)) = x * f'(x)^2
+          auto dydx            = n->inputs[0];
+          auto x               = n->inputs[1];
+          auto dydx_mul_grad_x = nnvm::NodeEntry{n};
+          auto op              = mxnet::util::NodeOpGen{n};
+
+          auto ones                = op.ones_like(x);
+          auto grad_x              = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_arccosh", n->attrs.name + "_backward_arccosh", {ones, x}, nullptr, &n)};
+          auto grad_x_square       = op.square(grad_x);
+          auto grad_x_square_mul_x = op.mul(grad_x_square, x);
+          auto grad_grad_x         = op.mul(dydx_mul_grad_x, grad_x_square_mul_x);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(op.mul(ograds[0], grad_x));
+          ret.emplace_back(op.mul(ograds[0], grad_grad_x));
+          return ret;
+        });
 
 // arctanh
 MXNET_OPERATOR_REGISTER_UNARY_WITH_RSP_CSR(arctanh, cpu, mshadow_op::arctanh)
-.describe(R"code(Returns the element-wise inverse hyperbolic tangent of the input array, \
+    .describe(R"code(Returns the element-wise inverse hyperbolic tangent of the input array, \
 computed element-wise.
 
 The storage type of ``arctanh`` output depends upon the input storage type:
@@ -577,41 +649,41 @@ The storage type of ``arctanh`` output depends upon the input storage type:
    - arctanh(csr) = csr
 
 )code" ADD_FILELINE)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_arctanh" });
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_arctanh"});
 
 MXNET_OPERATOR_REGISTER_BINARY_WITH_SPARSE_CPU_DR(_backward_arctanh,
                                                   unary_bwd<mshadow_op::arctanh_grad>)
-.set_attr<nnvm::FGradient>("FGradient",
-    [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      // ograds[0]: head_grad_grads (dL/dxgrad)
-      // inputs[0]: dL/dy
-      // inputs[1]: x (ElemwiseGradUseIn)
-      // n: dL/dy * dy/dx
-      // f(x) = arctanh(x)
-      // dy/dx = f'(x) = 1/(1-x^2)
-      // f''(x) = f'(x) * f'(x) * 2 * x = (2 * x) / (1 - x^2)^2
-      // return:
-      //     0: dL/dy_grad * dy/dx
-      //     1: dL/dy_grad * dL/dy * f''(x)
-      auto dldy = n->inputs[0];
-      auto x = n->inputs[1];
-      auto dldy_mul_dydx = nnvm::NodeEntry{n};
-      auto op = mxnet::util::NodeOpGen{n};
-
-      auto ones = op.ones_like(x);
-      auto x_grad = nnvm::NodeEntry{mxnet::op::MakeNode("_backward_arctanh",
-                                                   n->attrs.name + "_backward_arctanh",
-                                                   {ones, x}, nullptr, &n)};
-      auto x_grad_square = op.square(x_grad);
-      auto x_grad_square_mul_x = op.mul(x_grad_square, x);
-      auto x_grad_square_mul_2_x = op.mul(2.0, x_grad_square_mul_x);
-      auto grad_grad_x = op.mul(dldy, x_grad_square_mul_2_x);
-
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(op.mul(ograds[0], x_grad));
-      ret.emplace_back(op.mul(ograds[0], grad_grad_x));
-      return ret;
-    });
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          // ograds[0]: head_grad_grads (dL/dxgrad)
+          // inputs[0]: dL/dy
+          // inputs[1]: x (ElemwiseGradUseIn)
+          // n: dL/dy * dy/dx
+          // f(x) = arctanh(x)
+          // dy/dx = f'(x) = 1/(1-x^2)
+          // f''(x) = f'(x) * f'(x) * 2 * x = (2 * x) / (1 - x^2)^2
+          // return:
+          //     0: dL/dy_grad * dy/dx
+          //     1: dL/dy_grad * dL/dy * f''(x)
+          auto dldy          = n->inputs[0];
+          auto x             = n->inputs[1];
+          auto dldy_mul_dydx = nnvm::NodeEntry{n};
+          auto op            = mxnet::util::NodeOpGen{n};
+
+          auto ones                  = op.ones_like(x);
+          auto x_grad                = nnvm::NodeEntry{mxnet::op::MakeNode(
+              "_backward_arctanh", n->attrs.name + "_backward_arctanh", {ones, x}, nullptr, &n)};
+          auto x_grad_square         = op.square(x_grad);
+          auto x_grad_square_mul_x   = op.mul(x_grad_square, x);
+          auto x_grad_square_mul_2_x = op.mul(2.0, x_grad_square_mul_x);
+          auto grad_grad_x           = op.mul(dldy, x_grad_square_mul_2_x);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(op.mul(ograds[0], x_grad));
+          ret.emplace_back(op.mul(ograds[0], grad_grad_x));
+          return ret;
+        });
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/elemwise_unary_op_trig.cu b/src/operator/tensor/elemwise_unary_op_trig.cu
index 8adf6b6ea260..df0c02cbf254 100644
--- a/src/operator/tensor/elemwise_unary_op_trig.cu
+++ b/src/operator/tensor/elemwise_unary_op_trig.cu
@@ -29,111 +29,107 @@ namespace op {
 
 // sin
 NNVM_REGISTER_OP(sin)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sin"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sin"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sin"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sin"});
 
 NNVM_REGISTER_OP(_backward_sin)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sin"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sin"});
 
 // cos
-NNVM_REGISTER_OP(cos)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"cos"});
+NNVM_REGISTER_OP(cos).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"cos"});
 
 NNVM_REGISTER_OP(_backward_cos)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cos"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cos"});
 
 // tan
 NNVM_REGISTER_OP(tan)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"tan"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"tan"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"tan"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"tan"});
 
 NNVM_REGISTER_OP(_backward_tan)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_tan"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_tan"});
 
 // arcsin
 NNVM_REGISTER_OP(arcsin)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arcsin"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arcsin"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arcsin"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arcsin"});
 
 NNVM_REGISTER_OP(_backward_arcsin)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsin"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsin"});
 
 // arccos
-NNVM_REGISTER_OP(arccos)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arccos"});
+NNVM_REGISTER_OP(arccos).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arccos"});
 
 NNVM_REGISTER_OP(_backward_arccos)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccos"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccos"});
 
 // arctan
 NNVM_REGISTER_OP(arctan)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arctan"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arctan"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arctan"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arctan"});
 
 NNVM_REGISTER_OP(_backward_arctan)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctan"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctan"});
 
 // degrees
 NNVM_REGISTER_OP(degrees)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"degrees"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"degrees"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"degrees"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"degrees"});
 
 NNVM_REGISTER_OP(_backward_degrees)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_degrees"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_degrees"});
 
 // radians
 NNVM_REGISTER_OP(radians)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"radians"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"radians"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"radians"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"radians"});
 
 NNVM_REGISTER_OP(_backward_radians)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_radians"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_radians"});
 
 // cosh
-NNVM_REGISTER_OP(cosh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"cosh"});
+NNVM_REGISTER_OP(cosh).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"cosh"});
 
 NNVM_REGISTER_OP(_backward_cosh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cosh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_cosh"});
 
 // sinh
 NNVM_REGISTER_OP(sinh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sinh"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sinh"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"sinh"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"sinh"});
 
 NNVM_REGISTER_OP(_backward_sinh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sinh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_sinh"});
 
 // tanh
 NNVM_REGISTER_OP(tanh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"tanh"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"tanh"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"tanh"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"tanh"});
 
 NNVM_REGISTER_OP(_backward_tanh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_tanh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_tanh"});
 
 // arcsinh
 NNVM_REGISTER_OP(arcsinh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arcsinh"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arcsinh"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arcsinh"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arcsinh"});
 
 NNVM_REGISTER_OP(_backward_arcsinh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsinh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arcsinh"});
 
 // arccosh
-NNVM_REGISTER_OP(arccosh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arccosh"});
+NNVM_REGISTER_OP(arccosh).set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arccosh"});
 
 NNVM_REGISTER_OP(_backward_arccosh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccosh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arccosh"});
 
 // arctanh
 NNVM_REGISTER_OP(arctanh)
-.set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arctanh"})
-.set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arctanh"});
+    .set_attr<FCompute>("FCompute<gpu>", UnaryRTCCompute{"arctanh"})
+    .set_attr<FComputeEx>("FComputeEx<gpu>", UnaryRTCCompute{"arctanh"});
 
 NNVM_REGISTER_OP(_backward_arctanh)
-.set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctanh"});
+    .set_attr<FCompute>("FCompute<gpu>", ElemwiseBinaryRTCCompute{"backward_arctanh"});
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/histogram-inl.h b/src/operator/tensor/histogram-inl.h
index 29b27c6d659d..f2f4257527f3 100644
--- a/src/operator/tensor/histogram-inl.h
+++ b/src/operator/tensor/histogram-inl.h
@@ -20,7 +20,7 @@
 /*!
  * \file histogram-inl.h
  * \brief Function definition of histogram operator
-*/
+ */
 #ifndef MXNET_OPERATOR_TENSOR_HISTOGRAM_INL_H_
 #define MXNET_OPERATOR_TENSOR_HISTOGRAM_INL_H_
 
@@ -51,17 +51,18 @@ struct HistogramParam : public dmlc::Parameter<HistogramParam> {
   dmlc::optional<mxnet::Tuple<double>> range;
   DMLC_DECLARE_PARAMETER(HistogramParam) {
     DMLC_DECLARE_FIELD(bin_cnt)
-      .set_default(dmlc::optional<int>())
-      .describe("Number of bins for uniform case");
+        .set_default(dmlc::optional<int>())
+        .describe("Number of bins for uniform case");
     DMLC_DECLARE_FIELD(range)
-      .set_default(dmlc::optional<mxnet::Tuple<double>>())
-      .describe("The lower and upper range of the bins. if not provided, "
-                "range is simply (a.min(), a.max()). values outside the "
-                "range are ignored. the first element of the range must be "
-                "less than or equal to the second. range affects the automatic "
-                "bin computation as well. while bin width is computed to be "
-                "optimal based on the actual data within range, the bin count "
-                "will fill the entire range including portions containing no data.");
+        .set_default(dmlc::optional<mxnet::Tuple<double>>())
+        .describe(
+            "The lower and upper range of the bins. if not provided, "
+            "range is simply (a.min(), a.max()). values outside the "
+            "range are ignored. the first element of the range must be "
+            "less than or equal to the second. range affects the automatic "
+            "bin computation as well. while bin width is computed to be "
+            "optimal based on the actual data within range, the bin count "
+            "will fill the entire range including portions containing no data.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -69,12 +70,12 @@ struct HistogramParam : public dmlc::Parameter<HistogramParam> {
     bin_cnt_s << bin_cnt;
     range_s << range;
     (*dict)["bin_cnt"] = bin_cnt_s.str();
-    (*dict)["range"] = range_s.str();
+    (*dict)["range"]   = range_s.str();
   }
 };
 
 struct FillBinBoundsKernel {
-  template<typename DType>
+  template <typename DType>
   static MSHADOW_XINLINE void Map(int i, DType* bin_bounds, int bin_cnt, double min, double max) {
     if (i <= bin_cnt) {
       bin_bounds[i] = DType((max * i + (bin_cnt - i) * min) / bin_cnt);
@@ -85,9 +86,9 @@ struct FillBinBoundsKernel {
 inline bool HistogramOpShape(const nnvm::NodeAttrs& attrs,
                              mxnet::ShapeVector* in_attrs,
                              mxnet::ShapeVector* out_attrs) {
-  HistogramParam param = nnvm::get<HistogramParam>(attrs.parsed);
-  const bool has_cnt = param.bin_cnt.has_value();
-  const bool has_range = param.range.has_value();
+  HistogramParam param   = nnvm::get<HistogramParam>(attrs.parsed);
+  const bool has_cnt     = param.bin_cnt.has_value();
+  const bool has_range   = param.range.has_value();
   const bool legal_param = (has_cnt && has_range) || (!has_cnt && !has_range);
   CHECK_EQ(in_attrs->size(), has_cnt ? 1U : 2U);
   CHECK_EQ(out_attrs->size(), 2U);
@@ -125,14 +126,14 @@ inline bool HistogramOpType(const nnvm::NodeAttrs& attrs,
   return !type_is_none(out_attrs->at(0)) && !type_is_none(out_attrs->at(1));
 }
 
-template<typename xpu>
+template <typename xpu>
 void HistogramForwardImpl(const OpContext& ctx,
                           const TBlob& in_data,
                           const TBlob& bin_bounds,
                           const TBlob& out_data,
                           const TBlob& out_bins);
 
-template<typename xpu>
+template <typename xpu>
 void HistogramForwardImpl(const OpContext& ctx,
                           const TBlob& in_data,
                           const TBlob& out_data,
@@ -141,7 +142,7 @@ void HistogramForwardImpl(const OpContext& ctx,
                           const double min,
                           const double max);
 
-template<typename xpu>
+template <typename xpu>
 void HistogramOpForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -151,22 +152,22 @@ void HistogramOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req[0], kWriteTo);
   CHECK_EQ(req[1], kWriteTo);
   const HistogramParam& param = nnvm::get<HistogramParam>(attrs.parsed);
-  const bool has_cnt = param.bin_cnt.has_value();
-  const bool has_range = param.range.has_value();
-  const bool legal_params = (has_cnt && has_range) || (!has_cnt && !has_range);
+  const bool has_cnt          = param.bin_cnt.has_value();
+  const bool has_range        = param.range.has_value();
+  const bool legal_params     = (has_cnt && has_range) || (!has_cnt && !has_range);
   CHECK(legal_params) << "width and range should both or neither be specified";
 
-  const TBlob& in_data = inputs[0];
+  const TBlob& in_data  = inputs[0];
   const TBlob& out_data = outputs[0];
   const TBlob& out_bins = outputs[1];
 
   if (has_cnt) {
     CHECK((param.range.value().ndim() == 2U)) << "range should be a tuple with only 2 elements";
     CHECK(param.range.value()[0] <= param.range.value()[1])
-      << "left hand side of range(" << param.range.value()[0]
-      << ")should be less than or equal to right hand side(" << param.range.value()[1] << ")";
-    double max = param.range.value()[1];
-    double min = param.range.value()[0];
+        << "left hand side of range(" << param.range.value()[0]
+        << ")should be less than or equal to right hand side(" << param.range.value()[1] << ")";
+    double max        = param.range.value()[1];
+    double min        = param.range.value()[0];
     const int bin_cnt = param.bin_cnt.value();
     if (min == max) {
       min -= 0.5f;
@@ -180,7 +181,7 @@ void HistogramOpForward(const nnvm::NodeAttrs& attrs,
   }
 }
 
-}   // namespace op
-}   // namespace mxnet
+}  // namespace op
+}  // namespace mxnet
 
 #endif  // MXNET_OPERATOR_TENSOR_HISTOGRAM_INL_H_
diff --git a/src/operator/tensor/histogram.cc b/src/operator/tensor/histogram.cc
index cf9e86685939..faa709c76e0d 100644
--- a/src/operator/tensor/histogram.cc
+++ b/src/operator/tensor/histogram.cc
@@ -20,16 +20,21 @@
 /*!
  * \file histogram.cc
  * \brief CPU implementation of histogram operator
-*/
+ */
 #include "./histogram-inl.h"
 
 namespace mxnet {
 namespace op {
 
 struct ComputeBinKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType* in_data, const DType* bin_bounds,
-                                  int* bin_indices, int bin_cnt, double min, double max) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* in_data,
+                                  const DType* bin_bounds,
+                                  int* bin_indices,
+                                  int bin_cnt,
+                                  double min,
+                                  double max) {
     DType data = in_data[i];
     int target = -1;
     if (data >= min && data <= max) {
@@ -41,9 +46,12 @@ struct ComputeBinKernel {
     bin_indices[i] = target;
   }
 
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, const DType* in_data, int* bin_indices,
-                                   const DType* bin_bounds, int num_bins) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const DType* in_data,
+                                  int* bin_indices,
+                                  const DType* bin_bounds,
+                                  int num_bins) {
     DType data = in_data[i];
     int target = -1;
     if (data >= bin_bounds[0] && data <= bin_bounds[num_bins]) {
@@ -57,7 +65,7 @@ struct ComputeBinKernel {
   }
 };
 
-template<typename CType>
+template <typename CType>
 void ComputeHistogram(const int* bin_indices, CType* out_data, size_t input_size) {
   for (size_t i = 0; i < input_size; ++i) {
     int target = bin_indices[i];
@@ -67,7 +75,7 @@ void ComputeHistogram(const int* bin_indices, CType* out_data, size_t input_size
   }
 }
 
-template<>
+template <>
 void HistogramForwardImpl<cpu>(const OpContext& ctx,
                                const TBlob& in_data,
                                const TBlob& bin_bounds,
@@ -75,17 +83,20 @@ void HistogramForwardImpl<cpu>(const OpContext& ctx,
                                const TBlob& out_bins) {
   using namespace mshadow;
   using namespace mxnet_op;
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   Tensor<cpu, 1, int> bin_indices =
-    ctx.requested[0].get_space_typed<cpu, 1, int>(Shape1(in_data.Size()), s);
+      ctx.requested[0].get_space_typed<cpu, 1, int>(Shape1(in_data.Size()), s);
   const int bin_cnt = out_data.Size();
 
   MSHADOW_TYPE_SWITCH(in_data.type_flag_, DType, {
-    Kernel<ComputeBinKernel, cpu>::Launch(
-      s, in_data.Size(), in_data.dptr<DType>(), bin_indices.dptr_, bin_bounds.dptr<DType>(),
-      bin_cnt);
+    Kernel<ComputeBinKernel, cpu>::Launch(s,
+                                          in_data.Size(),
+                                          in_data.dptr<DType>(),
+                                          bin_indices.dptr_,
+                                          bin_bounds.dptr<DType>(),
+                                          bin_cnt);
     Kernel<op_with_req<mshadow_op::identity, kWriteTo>, cpu>::Launch(
-      s, bin_bounds.Size(), out_bins.dptr<DType>(), bin_bounds.dptr<DType>());
+        s, bin_bounds.Size(), out_bins.dptr<DType>(), bin_bounds.dptr<DType>());
   });
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, CType, {
     Kernel<set_zero, cpu>::Launch(s, bin_cnt, out_data.dptr<CType>());
@@ -93,7 +104,7 @@ void HistogramForwardImpl<cpu>(const OpContext& ctx,
   });
 }
 
-template<>
+template <>
 void HistogramForwardImpl<cpu>(const OpContext& ctx,
                                const TBlob& in_data,
                                const TBlob& out_data,
@@ -103,16 +114,21 @@ void HistogramForwardImpl<cpu>(const OpContext& ctx,
                                const double max) {
   using namespace mshadow;
   using namespace mxnet_op;
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   Tensor<cpu, 1, int> bin_indices =
-    ctx.requested[0].get_space_typed<cpu, 1, int>(Shape1(in_data.Size()), s);
+      ctx.requested[0].get_space_typed<cpu, 1, int>(Shape1(in_data.Size()), s);
 
   MSHADOW_TYPE_SWITCH(in_data.type_flag_, DType, {
     Kernel<FillBinBoundsKernel, cpu>::Launch(
-      s, bin_cnt+1, out_bins.dptr<DType>(), bin_cnt, min, max);
-    Kernel<ComputeBinKernel, cpu>::Launch(
-      s, in_data.Size(), in_data.dptr<DType>(), out_bins.dptr<DType>(), bin_indices.dptr_,
-      bin_cnt, min, max);
+        s, bin_cnt + 1, out_bins.dptr<DType>(), bin_cnt, min, max);
+    Kernel<ComputeBinKernel, cpu>::Launch(s,
+                                          in_data.Size(),
+                                          in_data.dptr<DType>(),
+                                          out_bins.dptr<DType>(),
+                                          bin_indices.dptr_,
+                                          bin_cnt,
+                                          min,
+                                          max);
   });
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, CType, {
     Kernel<set_zero, cpu>::Launch(s, bin_cnt, out_data.dptr<CType>());
@@ -123,8 +139,8 @@ void HistogramForwardImpl<cpu>(const OpContext& ctx,
 DMLC_REGISTER_PARAMETER(HistogramParam);
 
 NNVM_REGISTER_OP(_histogram)
-.add_alias("_npi_histogram")
-.describe(R"code(This operators implements the histogram function.
+    .add_alias("_npi_histogram")
+    .describe(R"code(This operators implements the histogram function.
 
 Example::
   x = [[0, 1], [2, 2], [3, 4]]
@@ -135,31 +151,31 @@ Example::
   histo = [4, 1]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<HistogramParam>)
-.set_num_inputs([](const NodeAttrs& attrs) {
-    const HistogramParam& params = nnvm::get<HistogramParam>(attrs.parsed);
-    return params.bin_cnt.has_value() ? 1 : 2;
-})
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    const HistogramParam& params = nnvm::get<HistogramParam>(attrs.parsed);
-    return params.bin_cnt.has_value() ?
-           std::vector<std::string>{"data"} :
-           std::vector<std::string>{"data", "bins"};
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", HistogramOpShape)
-.set_attr<nnvm::FInferType>("FInferType", HistogramOpType)
-.set_attr<FCompute>("FCompute<cpu>", HistogramOpForward<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("bins", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(HistogramParam::__FIELDS__());
+    .set_attr_parser(ParamParser<HistogramParam>)
+    .set_num_inputs([](const NodeAttrs& attrs) {
+      const HistogramParam& params = nnvm::get<HistogramParam>(attrs.parsed);
+      return params.bin_cnt.has_value() ? 1 : 2;
+    })
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       const HistogramParam& params =
+                                           nnvm::get<HistogramParam>(attrs.parsed);
+                                       return params.bin_cnt.has_value()
+                                                  ? std::vector<std::string>{"data"}
+                                                  : std::vector<std::string>{"data", "bins"};
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", HistogramOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", HistogramOpType)
+    .set_attr<FCompute>("FCompute<cpu>", HistogramOpForward<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("bins", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(HistogramParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/tensor/histogram.cu b/src/operator/tensor/histogram.cu
index b811aba46493..b2916ed8c182 100644
--- a/src/operator/tensor/histogram.cu
+++ b/src/operator/tensor/histogram.cu
@@ -20,7 +20,7 @@
 /*!
  * \file histogram.cu
  * \brief GPU implementation of histogram operator
-*/
+ */
 #include "./histogram-inl.h"
 #include "./util/tensor_util-inl.cuh"
 
@@ -28,9 +28,14 @@ namespace mxnet {
 namespace op {
 
 struct HistogramFusedKernel {
-  template<typename DType, typename CType>
-  static MSHADOW_XINLINE void Map(int i, const DType* in_data, const DType* bin_bounds, CType* bins,
-                                  const int bin_cnt, const double min, const double max) {
+  template <typename DType, typename CType>
+  static MSHADOW_XINLINE void Map(int i,
+                                  const DType* in_data,
+                                  const DType* bin_bounds,
+                                  CType* bins,
+                                  const int bin_cnt,
+                                  const double min,
+                                  const double max) {
     DType data = in_data[i];
     int target = -1;
     if (data >= min && data <= max) {
@@ -44,8 +49,11 @@ struct HistogramFusedKernel {
     }
   }
 
-  template<typename DType, typename CType>
-  static MSHADOW_XINLINE void Map(int i, const DType* in_data, const DType* bin_bounds, CType* bins,
+  template <typename DType, typename CType>
+  static MSHADOW_XINLINE void Map(int i,
+                                  const DType* in_data,
+                                  const DType* bin_bounds,
+                                  CType* bins,
                                   const int bin_cnt) {
     DType data = in_data[i];
     int target = -1;
@@ -62,7 +70,7 @@ struct HistogramFusedKernel {
   }
 };
 
-template<>
+template <>
 void HistogramForwardImpl<gpu>(const OpContext& ctx,
                                const TBlob& in_data,
                                const TBlob& bin_bounds,
@@ -70,21 +78,24 @@ void HistogramForwardImpl<gpu>(const OpContext& ctx,
                                const TBlob& out_bins) {
   using namespace mshadow;
   using namespace mxnet_op;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_TYPE_SWITCH(in_data.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(out_data.type_flag_, CType, {
       int bin_cnt = out_bins.Size() - 1;
       Kernel<set_zero, gpu>::Launch(s, bin_cnt, out_data.dptr<CType>());
-      Kernel<HistogramFusedKernel, gpu>::Launch(
-        s, in_data.Size(), in_data.dptr<DType>(), bin_bounds.dptr<DType>(),
-        out_data.dptr<CType>(), bin_cnt);
+      Kernel<HistogramFusedKernel, gpu>::Launch(s,
+                                                in_data.Size(),
+                                                in_data.dptr<DType>(),
+                                                bin_bounds.dptr<DType>(),
+                                                out_data.dptr<CType>(),
+                                                bin_cnt);
       Kernel<op_with_req<mshadow_op::identity, kWriteTo>, gpu>::Launch(
-        s, bin_bounds.Size(), out_bins.dptr<DType>(), bin_bounds.dptr<DType>());
+          s, bin_bounds.Size(), out_bins.dptr<DType>(), bin_bounds.dptr<DType>());
     });
   });
 }
 
-template<>
+template <>
 void HistogramForwardImpl<gpu>(const OpContext& ctx,
                                const TBlob& in_data,
                                const TBlob& out_data,
@@ -94,22 +105,25 @@ void HistogramForwardImpl<gpu>(const OpContext& ctx,
                                const double max) {
   using namespace mshadow;
   using namespace mxnet_op;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_TYPE_SWITCH(in_data.type_flag_, DType, {
     MSHADOW_IDX_TYPE_SWITCH(out_data.type_flag_, CType, {
       Kernel<set_zero, gpu>::Launch(s, bin_cnt, out_data.dptr<CType>());
       Kernel<FillBinBoundsKernel, gpu>::Launch(
-        s, bin_cnt+1, out_bins.dptr<DType>(), bin_cnt, min, max);
-      Kernel<HistogramFusedKernel, gpu>::Launch(
-        s, in_data.Size(), in_data.dptr<DType>(), out_bins.dptr<DType>(), out_data.dptr<CType>(),
-        bin_cnt, min, max);
+          s, bin_cnt + 1, out_bins.dptr<DType>(), bin_cnt, min, max);
+      Kernel<HistogramFusedKernel, gpu>::Launch(s,
+                                                in_data.Size(),
+                                                in_data.dptr<DType>(),
+                                                out_bins.dptr<DType>(),
+                                                out_data.dptr<CType>(),
+                                                bin_cnt,
+                                                min,
+                                                max);
     });
   });
 }
 
-NNVM_REGISTER_OP(_histogram)
-.set_attr<FCompute>("FCompute<gpu>", HistogramOpForward<gpu>);
-
-}   // namespace op
-}   // namespace mxnet
+NNVM_REGISTER_OP(_histogram).set_attr<FCompute>("FCompute<gpu>", HistogramOpForward<gpu>);
 
+}  // namespace op
+}  // namespace mxnet
diff --git a/src/operator/tensor/index_add-inl.h b/src/operator/tensor/index_add-inl.h
index 122aa01eb528..77be8b23358c 100644
--- a/src/operator/tensor/index_add-inl.h
+++ b/src/operator/tensor/index_add-inl.h
@@ -20,7 +20,7 @@
 /*!
  * \file index_add-inl.h
  * \brief Function definition of index_add operator
-*/
+ */
 #ifndef MXNET_OPERATOR_TENSOR_INDEX_ADD_INL_H_
 #define MXNET_OPERATOR_TENSOR_INDEX_ADD_INL_H_
 
@@ -52,17 +52,17 @@ inline bool IndexModifyOpType(const nnvm::NodeAttrs& attrs,
   CHECK_NE((*in_attrs)[1], -1);
   CHECK_NE((*in_attrs)[2], -1);
   CHECK_EQ((*in_attrs)[0], (*in_attrs)[2])
-    << "index_add/index_update(a, ind, val) only support a.dtype == val.dtype";
-  CHECK((*in_attrs)[1] == mshadow::kInt64 ||
-        (*in_attrs)[1] == mshadow::kInt32)
-    << "'ind' only support int dtype.";
+      << "index_add/index_update(a, ind, val) only support a.dtype == val.dtype";
+  CHECK((*in_attrs)[1] == mshadow::kInt64 || (*in_attrs)[1] == mshadow::kInt32)
+      << "'ind' only support int dtype.";
   TYPE_ASSIGN_CHECK(*out_attrs, 0, (*in_attrs)[0]);
   return (*out_attrs)[0] != -1;
 }
 
-template<typename xpu, typename DType>
-void IndexAddForwardCalc(mshadow::Stream<xpu> *s,
-                         const int ind_num, DType* out,
+template <typename xpu, typename DType>
+void IndexAddForwardCalc(mshadow::Stream<xpu>* s,
+                         const int ind_num,
+                         DType* out,
                          const DType* val,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
@@ -70,10 +70,11 @@ void IndexAddForwardCalc(mshadow::Stream<xpu> *s,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
                          const int a_tail_size,
-                         const int ind_ndim, const int* ind,
+                         const int ind_ndim,
+                         const int* ind,
                          const int a_ndim);
 
-template<typename xpu>
+template <typename xpu>
 void IndexAddOpForward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -83,20 +84,19 @@ void IndexAddOpForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob a = inputs[0];
-  TBlob ind = inputs[1];
-  TBlob val = inputs[2];
-  TBlob out = outputs[0];
+  Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob a  = inputs[0];
+  TBlob ind      = inputs[1];
+  TBlob val      = inputs[2];
+  TBlob out      = outputs[0];
   CHECK_GT(a.shape_.ndim(), 0) << "The first input is saclar, please use '+' instead.";
   int a_ndim = a.shape_.ndim();
   CHECK_LE(a_ndim, MXNET_SPECIAL_MAX_NDIM)
-    << "ndim should less than "<< MXNET_SPECIAL_MAX_NDIM
-    << "but get " << a_ndim <<"\n";
+      << "ndim should less than " << MXNET_SPECIAL_MAX_NDIM << "but get " << a_ndim << "\n";
   int val_ndim = val.shape_.ndim();
   if (val_ndim == 0) {
     val.shape_ = Shape1(1);
-    val_ndim = 1;
+    val_ndim   = 1;
   }
   // ind=np.array([]), ind.shape_.ndim() = 1
   // ind=np.array(1), ind.shape_.ndim() = 0
@@ -109,22 +109,22 @@ void IndexAddOpForward(const nnvm::NodeAttrs& attrs,
     ind.shape_ = Shape2(1, ind.shape_[0]);
   }
   int ind_ndim = ind.shape_[0];
-  int ind_num = ind.shape_[1];
+  int ind_num  = ind.shape_[1];
   CHECK_LE(ind_ndim, a_ndim) << "IndexError: too many indices for array.";
 
   // check 'val' broadcast legality
   CHECK_LE(val_ndim, a_ndim - ind_ndim + 1)
-    << "The ndim of param 'val' is " << val_ndim
-    << ", but it should less than or equal to " << a_ndim - ind_ndim + 1;
-  for (int i = a_ndim - 1, j = val_ndim - 1; j >= 0 ; --i, --j) {
+      << "The ndim of param 'val' is " << val_ndim << ", but it should less than or equal to "
+      << a_ndim - ind_ndim + 1;
+  for (int i = a_ndim - 1, j = val_ndim - 1; j >= 0; --i, --j) {
     if ((j == 0) && (val_ndim == a_ndim - ind_ndim + 1)) {
       // val_ndim == a_ndim - ind_ndim + 1, check the first dim of input 'val'
       CHECK(val.shape_[j] == ind_num || val.shape_[j] == 1)
-        << "can not broadcast from " << val.shape_[j] << " to " << ind_num;
+          << "can not broadcast from " << val.shape_[j] << " to " << ind_num;
     } else {
       CHECK(val.shape_[j] == a.shape_[i] || val.shape_[j] == 1)
-        << "can not broadcast from " << val.shape_[j] << " to " << a.shape_[i]
-        << " in axis " << i;
+          << "can not broadcast from " << val.shape_[j] << " to " << a.shape_[i] << " in axis "
+          << i;
     }
   }
   int a_tail_size = static_cast<int>(a.shape_.ProdShape(ind_ndim, a_ndim));
@@ -146,22 +146,28 @@ void IndexAddOpForward(const nnvm::NodeAttrs& attrs,
     val_shape[i] = (j >= 0) ? val.shape_[j] : 1;
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride = calc_stride(a_pre_shape);
-  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride = calc_stride(val_shape);
+  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride   = calc_stride(val_shape);
   mxnet_op::copy(s, out, a);
-  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>
-                (Shape1(ind.shape_.Size()), s));
+  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(ind.shape_.Size()), s));
   mxnet_op::copy(s, t_ind, ind);
   MSHADOW_TYPE_SWITCH(a.type_flag_, DType, {
-    IndexAddForwardCalc<xpu, DType>(s, ind_num,
-                                    out.dptr<DType>(), val.dptr<DType>(),
-                                    a_tail_shape, a_pre_stride,
-                                    val_stride, val_shape, a_shape,
-                                    a_tail_size, ind_ndim,
-                                    t_ind.dptr<int>(), a_ndim);
+    IndexAddForwardCalc<xpu, DType>(s,
+                                    ind_num,
+                                    out.dptr<DType>(),
+                                    val.dptr<DType>(),
+                                    a_tail_shape,
+                                    a_pre_stride,
+                                    val_stride,
+                                    val_shape,
+                                    a_shape,
+                                    a_tail_size,
+                                    ind_ndim,
+                                    t_ind.dptr<int>(),
+                                    a_ndim);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void IndexAddOpBackwardValImpl(const OpContext& ctx,
                                const TBlob& grad_val,
                                const TBlob& ograd,
@@ -170,10 +176,12 @@ void IndexAddOpBackwardValImpl(const OpContext& ctx,
                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                               const int tail_size, const int ind_num, const int ind_ndim,
+                               const int tail_size,
+                               const int ind_num,
+                               const int ind_ndim,
                                const int ndim);
 
-template<typename xpu>
+template <typename xpu>
 inline void IndexAddOpBackwardVal(const nnvm::NodeAttrs& attrs,
                                   const OpContext& ctx,
                                   const std::vector<TBlob>& inputs,
@@ -186,19 +194,19 @@ inline void IndexAddOpBackwardVal(const nnvm::NodeAttrs& attrs,
   }
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  const TBlob& ograd = inputs[0];
-  TBlob ind = inputs[1];
-  const TBlob& grad_val = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& ograd      = inputs[0];
+  TBlob ind               = inputs[1];
+  const TBlob& grad_val   = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   // get the number of 'ind' index
   if (ind.shape_.ndim() == 0) {
     ind.shape_ = Shape2(1, 1);
   } else if (ind.shape_.ndim() == 1) {
     ind.shape_ = Shape2(1, ind.shape_[0]);
   }
-  int ind_ndim = ind.shape_[0];
-  int ind_num = ind.shape_[1];
-  int out_ndim = ograd.shape_.ndim();
+  int ind_ndim  = ind.shape_[0];
+  int ind_num   = ind.shape_[1];
+  int out_ndim  = ograd.shape_.ndim();
   int tail_size = static_cast<int>(ograd.shape_.ProdShape(ind_ndim, out_ndim));
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_shape, val_shape;
   for (int i = MXNET_SPECIAL_MAX_NDIM - 1, j = out_ndim - 1; i >= 0; --i, --j) {
@@ -206,8 +214,7 @@ inline void IndexAddOpBackwardVal(const nnvm::NodeAttrs& attrs,
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_shape(ograd_shape);
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape(ograd_shape);
-  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>
-                (Shape1(ind.shape_.Size()), s));
+  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(ind.shape_.Size()), s));
   mxnet_op::copy(s, t_ind, ind);
   int seg = MXNET_SPECIAL_MAX_NDIM - out_ndim;
   for (int i = seg; i < seg + ind_ndim; ++i) {
@@ -220,12 +227,22 @@ inline void IndexAddOpBackwardVal(const nnvm::NodeAttrs& attrs,
     val_shape[i] = (j >= 0) ? grad_val.shape_[j] : 1;
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride = mxnet_op::calc_stride(ograd_pre_shape);
-  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride = mxnet_op::calc_stride(val_shape);
-  IndexAddOpBackwardValImpl<xpu>(ctx, grad_val, ograd, t_ind, ograd_tail_shape, ograd_pre_stride,
-                                 val_stride, val_shape, tail_size, ind_num, ind_ndim, out_ndim);
+  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride       = mxnet_op::calc_stride(val_shape);
+  IndexAddOpBackwardValImpl<xpu>(ctx,
+                                 grad_val,
+                                 ograd,
+                                 t_ind,
+                                 ograd_tail_shape,
+                                 ograd_pre_stride,
+                                 val_stride,
+                                 val_shape,
+                                 tail_size,
+                                 ind_num,
+                                 ind_ndim,
+                                 out_ndim);
 }
 
-}   // namespace op
-}   // namespace mxnet
+}  // namespace op
+}  // namespace mxnet
 
 #endif  // MXNET_OPERATOR_TENSOR_INDEX_ADD_INL_H_
diff --git a/src/operator/tensor/index_add_backward.cc b/src/operator/tensor/index_add_backward.cc
index 0fe10094512a..84bd4a5eee25 100644
--- a/src/operator/tensor/index_add_backward.cc
+++ b/src/operator/tensor/index_add_backward.cc
@@ -20,14 +20,14 @@
 /*!
  * \file index_add-inl.cc
  * \brief CPU implementation of index_add operator
-*/
+ */
 #include <vector>
 #include "./index_add-inl.h"
 
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 void IndexAddBackwardValCPUCompute(DType* grad_val,
                                    const DType* ograd,
                                    const int* ind_vec,
@@ -35,10 +35,12 @@ void IndexAddBackwardValCPUCompute(DType* grad_val,
                                    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                   const int ograd_tail_size, const int ind_num,
-                                   const int ind_ndim, const int out_ndim,
+                                   const int ograd_tail_size,
+                                   const int ind_num,
+                                   const int ind_ndim,
+                                   const int out_ndim,
                                    const int seg) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t i = 0; i < static_cast<index_t>(ind_num); ++i) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
@@ -47,7 +49,7 @@ void IndexAddBackwardValCPUCompute(DType* grad_val,
     id *= ograd_tail_size;
     for (int _i = 0; _i < ograd_tail_size; ++_i) {
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_id =
-        mxnet_op::unravel(_i, ograd_tail_shape);
+          mxnet_op::unravel(_i, ograd_tail_shape);
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_id;
       for (int _j = 0; _j < seg; ++_j) {
         val_id[_j] = 0;
@@ -56,16 +58,14 @@ void IndexAddBackwardValCPUCompute(DType* grad_val,
         val_id[_j] = (val_shape[_j] == 1) ? 0 : ograd_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
-      #pragma omp critical
-      {
-        grad_val[val_dest] += ograd[id + _i];
-      }
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
+#pragma omp critical
+      { grad_val[val_dest] += ograd[id + _i]; }
     }
   }
 }
 
-template<>
+template <>
 void IndexAddOpBackwardValImpl<cpu>(const OpContext& ctx,
                                     const TBlob& grad_val,
                                     const TBlob& ograd,
@@ -74,29 +74,38 @@ void IndexAddOpBackwardValImpl<cpu>(const OpContext& ctx,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                    const int tail_size, const int ind_num, const int ind_ndim,
+                                    const int tail_size,
+                                    const int ind_num,
+                                    const int ind_ndim,
                                     const int ndim) {
   using namespace mshadow;
   using namespace mxnet_op;
   int seg = MXNET_SPECIAL_MAX_NDIM - ndim;
   MSHADOW_TYPE_SWITCH(grad_val.type_flag_, DType, {
-    IndexAddBackwardValCPUCompute<DType>(
-      grad_val.dptr<DType>(), ograd.dptr<DType>(), t_ind.dptr<int>(),
-      ograd_tail_shape, ograd_pre_stride, val_stride, val_shape, tail_size,
-      ind_num, ind_ndim, ndim, seg);
+    IndexAddBackwardValCPUCompute<DType>(grad_val.dptr<DType>(),
+                                         ograd.dptr<DType>(),
+                                         t_ind.dptr<int>(),
+                                         ograd_tail_shape,
+                                         ograd_pre_stride,
+                                         val_stride,
+                                         val_shape,
+                                         tail_size,
+                                         ind_num,
+                                         ind_ndim,
+                                         ndim,
+                                         seg);
   });
 }
 
 NNVM_REGISTER_OP(_backward_index_add_val)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", IndexAddOpBackwardVal<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", IndexAddOpBackwardVal<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/tensor/index_add_backward.cu b/src/operator/tensor/index_add_backward.cu
index 5ce2f726afc0..016ff7953bcd 100644
--- a/src/operator/tensor/index_add_backward.cu
+++ b/src/operator/tensor/index_add_backward.cu
@@ -31,15 +31,20 @@ namespace mxnet {
 namespace op {
 
 struct IndexAddBackwardValGPUKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(size_t i, DType* grad_val,
-                                  const DType* ograd, const int* ind_vec,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* grad_val,
+                                  const DType* ograd,
+                                  const int* ind_vec,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                  const int ograd_tail_size, const int ind_num,
-                                  const int ind_ndim, const int out_ndim, const int seg) {
+                                  const int ograd_tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int out_ndim,
+                                  const int seg) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
       id += ograd_pre_stride[seg + dim] * ind_vec[dim * ind_num + i];
@@ -47,7 +52,7 @@ struct IndexAddBackwardValGPUKernel {
     id *= ograd_tail_size;
     for (int _i = 0; _i < ograd_tail_size; ++_i) {
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_id =
-        mxnet_op::unravel(_i, ograd_tail_shape);
+          mxnet_op::unravel(_i, ograd_tail_shape);
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_id;
       for (int _j = 0; _j < seg; ++_j) {
         val_id[_j] = 0;
@@ -56,13 +61,13 @@ struct IndexAddBackwardValGPUKernel {
         val_id[_j] = (val_shape[_j] == 1) ? 0 : ograd_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
       atomicAdd(&grad_val[val_dest], ograd[id + _i]);
     }
   }
 };
 
-template<>
+template <>
 void IndexAddOpBackwardValImpl<gpu>(const OpContext& ctx,
                                     const TBlob& grad_val,
                                     const TBlob& ograd,
@@ -71,23 +76,34 @@ void IndexAddOpBackwardValImpl<gpu>(const OpContext& ctx,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                    const int tail_size, const int ind_num, const int ind_ndim,
+                                    const int tail_size,
+                                    const int ind_num,
+                                    const int ind_ndim,
                                     const int ndim) {
   using namespace mshadow;
   using namespace mxnet_op;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  int seg = MXNET_SPECIAL_MAX_NDIM - ndim;
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  int seg                 = MXNET_SPECIAL_MAX_NDIM - ndim;
   MSHADOW_TYPE_SWITCH(grad_val.type_flag_, DType, {
-    Kernel<IndexAddBackwardValGPUKernel, gpu>::Launch(
-    s, ind_num, grad_val.dptr<DType>(), ograd.dptr<DType>(), t_ind.dptr<int>(),
-    ograd_tail_shape, ograd_pre_stride, val_stride, val_shape, tail_size,
-    ind_num, ind_ndim, ndim, seg);
+    Kernel<IndexAddBackwardValGPUKernel, gpu>::Launch(s,
+                                                      ind_num,
+                                                      grad_val.dptr<DType>(),
+                                                      ograd.dptr<DType>(),
+                                                      t_ind.dptr<int>(),
+                                                      ograd_tail_shape,
+                                                      ograd_pre_stride,
+                                                      val_stride,
+                                                      val_shape,
+                                                      tail_size,
+                                                      ind_num,
+                                                      ind_ndim,
+                                                      ndim,
+                                                      seg);
   });
 }
 
 NNVM_REGISTER_OP(_backward_index_add_val)
-.set_attr<FCompute>("FCompute<gpu>", IndexAddOpBackwardVal<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", IndexAddOpBackwardVal<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/tensor/index_add_forward.cc b/src/operator/tensor/index_add_forward.cc
index bd07e513b6a4..c1d39f8a952d 100644
--- a/src/operator/tensor/index_add_forward.cc
+++ b/src/operator/tensor/index_add_forward.cc
@@ -20,33 +20,35 @@
 /*!
  * \file index_add-inl.cc
  * \brief CPU implementation of index_add operator
-*/
+ */
 #include <vector>
 #include "./index_add-inl.h"
 
 namespace mxnet {
 namespace op {
-template<typename DType>
+template <typename DType>
 struct IndexAddForwardCPUKernel {
-  MSHADOW_XINLINE static void Map(size_t i, DType* out,
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* out,
                                   const DType* val,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
-                                  const int a_tail_size, const int ind_num,
-                                  const int ind_ndim, const int* ind,
-                                  const int a_ndim, const int seg) {
+                                  const int a_tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int* ind,
+                                  const int a_ndim,
+                                  const int seg) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
       CHECK_LT(ind[dim * ind_num + i], a_shape[seg + dim])
-        << "IndexError: index " << ind[dim * ind_num + i]
-        << " is out of bounds for axis " << dim
-        << " with size " << a_shape[seg + dim];
+          << "IndexError: index " << ind[dim * ind_num + i] << " is out of bounds for axis " << dim
+          << " with size " << a_shape[seg + dim];
       CHECK_GE(ind[dim * ind_num + i], 0)
-        << "IndexError: index " << ind[dim * ind_num + i]
-        << " should be greater or equal to 0.";
+          << "IndexError: index " << ind[dim * ind_num + i] << " should be greater or equal to 0.";
       id += a_pre_stride[seg + dim] * ind[dim * ind_num + i];
     }
     id *= a_tail_size;
@@ -60,73 +62,82 @@ struct IndexAddForwardCPUKernel {
         val_id[_j] = (val_shape[_j] == 1) ? 0 : a_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
-      #pragma omp critical
-      {
-        out[id + _i] += val[val_dest];
-      }
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
+#pragma omp critical
+      { out[id + _i] += val[val_dest]; }
     }
   }
 };
 
-template<typename xpu, typename DType>
-void IndexAddForwardCalc(mshadow::Stream<xpu> *s,
-                         const int ind_num, DType* out,
-                        const DType* val,
-                        const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
-                        const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
-                        const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
-                        const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                        const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
-                        const int a_tail_size,
-                        const int ind_ndim, const int* ind,
-                        const int a_ndim) {
+template <typename xpu, typename DType>
+void IndexAddForwardCalc(mshadow::Stream<xpu>* s,
+                         const int ind_num,
+                         DType* out,
+                         const DType* val,
+                         const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
+                         const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
+                         const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
+                         const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
+                         const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
+                         const int a_tail_size,
+                         const int ind_ndim,
+                         const int* ind,
+                         const int a_ndim) {
   using namespace mxnet_op;
   using namespace mshadow;
   int seg = MXNET_SPECIAL_MAX_NDIM - a_ndim;
-  Kernel<IndexAddForwardCPUKernel<DType>, xpu>::Launch(
-                                             s, ind_num, out, val,
-                                             a_tail_shape, a_pre_stride,
-                                             val_stride, val_shape, a_shape,
-                                             a_tail_size, ind_num,
-                                             ind_ndim, ind, a_ndim, seg);
+  Kernel<IndexAddForwardCPUKernel<DType>, xpu>::Launch(s,
+                                                       ind_num,
+                                                       out,
+                                                       val,
+                                                       a_tail_shape,
+                                                       a_pre_stride,
+                                                       val_stride,
+                                                       val_shape,
+                                                       a_shape,
+                                                       a_tail_size,
+                                                       ind_num,
+                                                       ind_ndim,
+                                                       ind,
+                                                       a_ndim,
+                                                       seg);
 }
 
-
-
 NNVM_REGISTER_OP(_npx_index_add)
-.describe(R"code(This operators implements the "+=" mimic function.
+    .describe(R"code(This operators implements the "+=" mimic function.
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "ind", "val"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", IndexModifyOpShape)
-.set_attr<nnvm::FInferType>("FInferType", IndexModifyOpType)
-.set_attr<FCompute>("FCompute<cpu>", IndexAddOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      auto a_grad = MakeNode("_copy", n->attrs.name + "_backward_a",
-                              {ograds[0]}, nullptr, &n);
-      auto idx_grad = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                              {n->inputs[1]}, nullptr, &n);
-      auto val_grad = MakeNode("_backward_index_add_val", n->attrs.name + "_backward_val",
-                              {ograds[0], n->inputs[1]}, nullptr, &n);
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(a_grad);
-      ret.emplace_back(idx_grad);
-      ret.emplace_back(val_grad);
-      return ret;
-  })
-.add_argument("a", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("ind", "NDArray-or-Symbol", "Index ndarray")
-.add_argument("val", "NDArray-or-Symbol", "Input ndarray");
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "ind", "val"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", IndexModifyOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", IndexModifyOpType)
+    .set_attr<FCompute>("FCompute<cpu>", IndexAddOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto a_grad = MakeNode("_copy", n->attrs.name + "_backward_a", {ograds[0]}, nullptr, &n);
+          auto idx_grad = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+          auto val_grad = MakeNode("_backward_index_add_val",
+                                   n->attrs.name + "_backward_val",
+                                   {ograds[0], n->inputs[1]},
+                                   nullptr,
+                                   &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(a_grad);
+          ret.emplace_back(idx_grad);
+          ret.emplace_back(val_grad);
+          return ret;
+        })
+    .add_argument("a", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("ind", "NDArray-or-Symbol", "Index ndarray")
+    .add_argument("val", "NDArray-or-Symbol", "Input ndarray");
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/tensor/index_add_forward.cu b/src/operator/tensor/index_add_forward.cu
index 08396d9dc349..91d5e66b9820 100644
--- a/src/operator/tensor/index_add_forward.cu
+++ b/src/operator/tensor/index_add_forward.cu
@@ -30,19 +30,22 @@
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 struct IndexAddForwardGPUKernel {
-  MSHADOW_XINLINE static void Map(size_t i, DType* out,
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* out,
                                   const DType* val,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                  const int a_tail_size, const int ind_num,
-                                  const int ind_ndim, const int* ind,
+                                  const int a_tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int* ind,
                                   const int a_ndim) {
     index_t id = 0;
-    int seg = MXNET_SPECIAL_MAX_NDIM - a_ndim;
+    int seg    = MXNET_SPECIAL_MAX_NDIM - a_ndim;
     for (int dim = 0; dim < ind_ndim; ++dim) {
       id += a_pre_stride[seg + dim] * ind[dim * ind_num + i];
     }
@@ -54,15 +57,16 @@ struct IndexAddForwardGPUKernel {
         val_id[_j] = (val_shape[_j] == 1) ? 0 : a_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
       atomicAdd(&out[id + _i], val[val_dest]);
     }
   }
 };
 
-template<typename xpu, typename DType>
-void IndexAddForwardCalc(mshadow::Stream<xpu> *s,
-                         const int ind_num, DType* out,
+template <typename xpu, typename DType>
+void IndexAddForwardCalc(mshadow::Stream<xpu>* s,
+                         const int ind_num,
+                         DType* out,
                          const DType* val,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
@@ -70,22 +74,27 @@ void IndexAddForwardCalc(mshadow::Stream<xpu> *s,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                          const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
                          const int a_tail_size,
-                         const int ind_ndim, const int* ind,
+                         const int ind_ndim,
+                         const int* ind,
                          const int a_ndim) {
   using namespace mxnet_op;
   using namespace mshadow;
-  Kernel<IndexAddForwardGPUKernel<DType>, xpu>::Launch(
-                                              s, ind_num, out, val,
-                                              a_tail_shape, a_pre_stride,
-                                              val_stride, val_shape,
-                                              a_tail_size, ind_num,
-                                              ind_ndim, ind, a_ndim);
+  Kernel<IndexAddForwardGPUKernel<DType>, xpu>::Launch(s,
+                                                       ind_num,
+                                                       out,
+                                                       val,
+                                                       a_tail_shape,
+                                                       a_pre_stride,
+                                                       val_stride,
+                                                       val_shape,
+                                                       a_tail_size,
+                                                       ind_num,
+                                                       ind_ndim,
+                                                       ind,
+                                                       a_ndim);
 }
 
-
-NNVM_REGISTER_OP(_npx_index_add)
-.set_attr<FCompute>("FCompute<gpu>", IndexAddOpForward<gpu>);
+NNVM_REGISTER_OP(_npx_index_add).set_attr<FCompute>("FCompute<gpu>", IndexAddOpForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
-
diff --git a/src/operator/tensor/index_update-inl.h b/src/operator/tensor/index_update-inl.h
index 8319647e327e..8d43f3e327c6 100644
--- a/src/operator/tensor/index_update-inl.h
+++ b/src/operator/tensor/index_update-inl.h
@@ -20,7 +20,7 @@
 /*!
  * \file index_update-inl.h
  * \brief Function definition of index_update operator
-*/
+ */
 #ifndef MXNET_OPERATOR_TENSOR_INDEX_UPDATE_INL_H_
 #define MXNET_OPERATOR_TENSOR_INDEX_UPDATE_INL_H_
 
@@ -36,9 +36,10 @@
 namespace mxnet {
 namespace op {
 
-template<typename xpu, typename DType>
-void IndexUpdateForwardCalc(mshadow::Stream<xpu> *s,
-                            const int ind_num, DType* out,
+template <typename xpu, typename DType>
+void IndexUpdateForwardCalc(mshadow::Stream<xpu>* s,
+                            const int ind_num,
+                            DType* out,
                             const DType* val,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
@@ -46,10 +47,11 @@ void IndexUpdateForwardCalc(mshadow::Stream<xpu> *s,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
                             const int a_tail_size,
-                            const int ind_ndim, const int* ind,
+                            const int ind_ndim,
+                            const int* ind,
                             const int a_ndim);
 
-template<typename xpu>
+template <typename xpu>
 void IndexUpdateOpForward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -59,20 +61,19 @@ void IndexUpdateOpForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 3U);
   CHECK_EQ(outputs.size(), 1U);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob a = inputs[0];
-  TBlob ind = inputs[1];
-  TBlob val = inputs[2];
-  TBlob out = outputs[0];
+  Stream<xpu>* s = ctx.get_stream<xpu>();
+  const TBlob a  = inputs[0];
+  TBlob ind      = inputs[1];
+  TBlob val      = inputs[2];
+  TBlob out      = outputs[0];
   CHECK_GT(a.shape_.ndim(), 0) << "The first input is saclar, please use '=' instead.";
   int a_ndim = a.shape_.ndim();
   CHECK_LE(a_ndim, MXNET_SPECIAL_MAX_NDIM)
-    << "ndim should less than "<< MXNET_SPECIAL_MAX_NDIM
-    << "but get " << a_ndim <<"\n";
+      << "ndim should less than " << MXNET_SPECIAL_MAX_NDIM << "but get " << a_ndim << "\n";
   int val_ndim = val.shape_.ndim();
   if (val_ndim == 0) {
     val.shape_ = Shape1(1);
-    val_ndim = 1;
+    val_ndim   = 1;
   }
   // ind=np.array([]), ind.shape_.ndim() = 1
   // ind=np.array(1), ind.shape_.ndim() = 0
@@ -85,22 +86,22 @@ void IndexUpdateOpForward(const nnvm::NodeAttrs& attrs,
     ind.shape_ = Shape2(1, ind.shape_[0]);
   }
   int ind_ndim = ind.shape_[0];
-  int ind_num = ind.shape_[1];
+  int ind_num  = ind.shape_[1];
   CHECK_LE(ind_ndim, a_ndim) << "IndexError: too many indices for array.";
 
   // check 'val' broadcast legality
   CHECK_LE(val_ndim, a_ndim - ind_ndim + 1)
-    << "The ndim of param 'val' is " << val_ndim
-    << ", but it should less than or equal to " << a_ndim - ind_ndim + 1;
-  for (int i = a_ndim - 1, j = val_ndim - 1; j >= 0 ; --i, --j) {
+      << "The ndim of param 'val' is " << val_ndim << ", but it should less than or equal to "
+      << a_ndim - ind_ndim + 1;
+  for (int i = a_ndim - 1, j = val_ndim - 1; j >= 0; --i, --j) {
     if ((j == 0) && (val_ndim == a_ndim - ind_ndim + 1)) {
       // val_ndim == a_ndim - ind_ndim + 1, check the first dim of input 'val'
       CHECK(val.shape_[j] == ind_num || val.shape_[j] == 1)
-        << "can not broadcast from " << val.shape_[j] << " to " << ind_num;
+          << "can not broadcast from " << val.shape_[j] << " to " << ind_num;
     } else {
       CHECK(val.shape_[j] == a.shape_[i] || val.shape_[j] == 1)
-        << "can not broadcast from " << val.shape_[j] << " to " << a.shape_[i]
-        << " in axis " << i;
+          << "can not broadcast from " << val.shape_[j] << " to " << a.shape_[i] << " in axis "
+          << i;
     }
   }
   int a_tail_size = static_cast<int>(a.shape_.ProdShape(ind_ndim, a_ndim));
@@ -122,22 +123,28 @@ void IndexUpdateOpForward(const nnvm::NodeAttrs& attrs,
     val_shape[i] = (j >= 0) ? val.shape_[j] : 1;
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride = calc_stride(a_pre_shape);
-  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride = calc_stride(val_shape);
+  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride   = calc_stride(val_shape);
   mxnet_op::copy(s, out, a);
-  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>
-                (Shape1(ind.shape_.Size()), s));
+  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(ind.shape_.Size()), s));
   mxnet_op::copy(s, t_ind, ind);
   MSHADOW_TYPE_SWITCH(a.type_flag_, DType, {
-    IndexUpdateForwardCalc<xpu, DType>(s, ind_num,
-                                       out.dptr<DType>(), val.dptr<DType>(),
-                                       a_tail_shape, a_pre_stride,
-                                       val_stride, val_shape, a_shape,
-                                       a_tail_size, ind_ndim,
-                                       t_ind.dptr<int>(), a_ndim);
+    IndexUpdateForwardCalc<xpu, DType>(s,
+                                       ind_num,
+                                       out.dptr<DType>(),
+                                       val.dptr<DType>(),
+                                       a_tail_shape,
+                                       a_pre_stride,
+                                       val_stride,
+                                       val_shape,
+                                       a_shape,
+                                       a_tail_size,
+                                       ind_ndim,
+                                       t_ind.dptr<int>(),
+                                       a_ndim);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void IndexUpdateOpBackwardValImpl(const OpContext& ctx,
                                   const TBlob& grad_val,
                                   const TBlob& ograd,
@@ -146,10 +153,12 @@ void IndexUpdateOpBackwardValImpl(const OpContext& ctx,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                  const int tail_size, const int ind_num, const int ind_ndim,
+                                  const int tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
                                   const int ndim);
 
-template<typename xpu>
+template <typename xpu>
 inline void IndexUpdateOpBackwardVal(const nnvm::NodeAttrs& attrs,
                                      const OpContext& ctx,
                                      const std::vector<TBlob>& inputs,
@@ -162,19 +171,19 @@ inline void IndexUpdateOpBackwardVal(const nnvm::NodeAttrs& attrs,
   }
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  const TBlob& ograd = inputs[0];
-  TBlob ind = inputs[1];
-  const TBlob& grad_val = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const TBlob& ograd      = inputs[0];
+  TBlob ind               = inputs[1];
+  const TBlob& grad_val   = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   // get the number of 'ind' index
   if (ind.shape_.ndim() == 0) {
     ind.shape_ = Shape2(1, 1);
   } else if (ind.shape_.ndim() == 1) {
     ind.shape_ = Shape2(1, ind.shape_[0]);
   }
-  int ind_ndim = ind.shape_[0];
-  int ind_num = ind.shape_[1];
-  int out_ndim = ograd.shape_.ndim();
+  int ind_ndim  = ind.shape_[0];
+  int ind_num   = ind.shape_[1];
+  int out_ndim  = ograd.shape_.ndim();
   int tail_size = static_cast<int>(ograd.shape_.ProdShape(ind_ndim, out_ndim));
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_shape, val_shape;
   for (int i = MXNET_SPECIAL_MAX_NDIM - 1, j = out_ndim - 1; i >= 0; --i, --j) {
@@ -182,8 +191,7 @@ inline void IndexUpdateOpBackwardVal(const nnvm::NodeAttrs& attrs,
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_shape(ograd_shape);
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape(ograd_shape);
-  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>
-                (Shape1(ind.shape_.Size()), s));
+  TBlob t_ind = TBlob(ctx.requested[0].get_space_typed<xpu, 1, int>(Shape1(ind.shape_.Size()), s));
   mxnet_op::copy(s, t_ind, ind);
   int seg = MXNET_SPECIAL_MAX_NDIM - out_ndim;
   for (int i = seg; i < seg + ind_ndim; ++i) {
@@ -196,28 +204,41 @@ inline void IndexUpdateOpBackwardVal(const nnvm::NodeAttrs& attrs,
     val_shape[i] = (j >= 0) ? grad_val.shape_[j] : 1;
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride = mxnet_op::calc_stride(ograd_pre_shape);
-  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride = mxnet_op::calc_stride(val_shape);
-  IndexUpdateOpBackwardValImpl<xpu>(ctx, grad_val, ograd, t_ind, ograd_tail_shape, ograd_pre_stride,
-                                    val_stride, val_shape, tail_size, ind_num, ind_ndim, out_ndim);
+  mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride       = mxnet_op::calc_stride(val_shape);
+  IndexUpdateOpBackwardValImpl<xpu>(ctx,
+                                    grad_val,
+                                    ograd,
+                                    t_ind,
+                                    ograd_tail_shape,
+                                    ograd_pre_stride,
+                                    val_stride,
+                                    val_shape,
+                                    tail_size,
+                                    ind_num,
+                                    ind_ndim,
+                                    out_ndim);
 }
 
-template<typename DType>
+template <typename DType>
 struct ReqCopy {
   MSHADOW_XINLINE static void Map(size_t i, DType* dest, const DType* src, const int req) {
     KERNEL_ASSIGN(dest[i], req, src[i]);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void IndexUpdateOpBackwardAImpl(const OpContext& ctx,
                                 const TBlob& grad_a,
                                 const TBlob& ograd,
                                 const TBlob& t_ind,
                                 const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_pre_stride,
-                                const int tail_size, const int ind_num, const int ind_ndim,
-                                const int seg, const int req);
+                                const int tail_size,
+                                const int ind_num,
+                                const int ind_ndim,
+                                const int seg,
+                                const int req);
 
-template<typename xpu>
+template <typename xpu>
 inline void IndexUpdateOpBackwardA(const nnvm::NodeAttrs& attrs,
                                    const OpContext& ctx,
                                    const std::vector<TBlob>& inputs,
@@ -230,19 +251,19 @@ inline void IndexUpdateOpBackwardA(const nnvm::NodeAttrs& attrs,
   }
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  TBlob ograd = inputs[0];
-  TBlob ind = inputs[1];
-  const TBlob& grad_a = outputs[0];
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  TBlob ograd             = inputs[0];
+  TBlob ind               = inputs[1];
+  const TBlob& grad_a     = outputs[0];
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   // get the number of 'ind' index
   if (ind.shape_.ndim() == 0) {
     ind.shape_ = Shape2(1, 1);
   } else if (ind.shape_.ndim() == 1) {
     ind.shape_ = Shape2(1, ind.shape_[0]);
   }
-  int ind_ndim = ind.shape_[0];
-  int ind_num = ind.shape_[1];
-  int out_ndim = ograd.shape_.ndim();
+  int ind_ndim  = ind.shape_[0];
+  int ind_num   = ind.shape_[1];
+  int out_ndim  = ograd.shape_.ndim();
   int tail_size = static_cast<int>(ograd.shape_.ProdShape(ind_ndim, out_ndim));
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_shape;
   for (int i = MXNET_SPECIAL_MAX_NDIM - 1, j = out_ndim - 1; i >= 0; --i, --j) {
@@ -254,11 +275,11 @@ inline void IndexUpdateOpBackwardA(const nnvm::NodeAttrs& attrs,
     grada_pre_shape[i] = 1;
   }
   mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_pre_stride = mxnet_op::calc_stride(grada_pre_shape);
-  IndexUpdateOpBackwardAImpl<xpu>(ctx, grad_a, ograd, ind, grada_pre_stride,
-                                  tail_size, ind_num, ind_ndim, seg, req[0]);
+  IndexUpdateOpBackwardAImpl<xpu>(
+      ctx, grad_a, ograd, ind, grada_pre_stride, tail_size, ind_num, ind_ndim, seg, req[0]);
 }
 
-}   // namespace op
-}   // namespace mxnet
+}  // namespace op
+}  // namespace mxnet
 
 #endif  // MXNET_OPERATOR_TENSOR_INDEX_UPDATE_INL_H_
diff --git a/src/operator/tensor/index_update.cc b/src/operator/tensor/index_update.cc
index ffd5d290bbb0..3169661ca782 100644
--- a/src/operator/tensor/index_update.cc
+++ b/src/operator/tensor/index_update.cc
@@ -20,34 +20,36 @@
 /*!
  * \file index_update-inl.cc
  * \brief implementation of index_update operator
-*/
+ */
 #include <vector>
 #include "./index_update-inl.h"
 
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 struct IndexUpdateForwardCPUKernel {
-  MSHADOW_XINLINE static void Map(size_t i, DType* out,
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* out,
                                   const DType* val,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
-                                  const int a_tail_size, const int ind_num,
-                                  const int ind_ndim, const int* ind,
-                                  const int a_ndim, const int seg) {
+                                  const int a_tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int* ind,
+                                  const int a_ndim,
+                                  const int seg) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
       CHECK_LT(ind[dim * ind_num + i], a_shape[seg + dim])
-        << "IndexError: index " << ind[dim * ind_num + i]
-        << " is out of bounds for axis " << dim
-        << " with size " << a_shape[seg + dim];
+          << "IndexError: index " << ind[dim * ind_num + i] << " is out of bounds for axis " << dim
+          << " with size " << a_shape[seg + dim];
       CHECK_GE(ind[dim * ind_num + i], 0)
-        << "IndexError: index " << ind[dim * ind_num + i]
-        << " should be greater or equal to 0.";
+          << "IndexError: index " << ind[dim * ind_num + i] << " should be greater or equal to 0.";
       id += a_pre_stride[seg + dim] * ind[dim * ind_num + i];
     }
     id *= a_tail_size;
@@ -61,15 +63,16 @@ struct IndexUpdateForwardCPUKernel {
         val_id[_j] = (val_shape[_j] == 1) ? 0 : a_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
-      out[id + _i] = val[val_dest];
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
+      out[id + _i]               = val[val_dest];
     }
   }
 };
 
-template<typename xpu, typename DType>
-void IndexUpdateForwardCalc(mshadow::Stream<xpu> *s,
-                            const int ind_num, DType* out,
+template <typename xpu, typename DType>
+void IndexUpdateForwardCalc(mshadow::Stream<xpu>* s,
+                            const int ind_num,
+                            DType* out,
                             const DType* val,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
@@ -77,19 +80,30 @@ void IndexUpdateForwardCalc(mshadow::Stream<xpu> *s,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
                             const int a_tail_size,
-                            const int ind_ndim, const int* ind,
+                            const int ind_ndim,
+                            const int* ind,
                             const int a_ndim) {
   using namespace mxnet_op;
   using namespace mshadow;
   int seg = MXNET_SPECIAL_MAX_NDIM - a_ndim;
-  Kernel<IndexUpdateForwardCPUKernel<DType>, xpu>::Launch(
-    s, ind_num, out, val, a_tail_shape, a_pre_stride,
-    val_stride, val_shape, a_shape, a_tail_size, ind_num,
-    ind_ndim, ind, a_ndim, seg);
+  Kernel<IndexUpdateForwardCPUKernel<DType>, xpu>::Launch(s,
+                                                          ind_num,
+                                                          out,
+                                                          val,
+                                                          a_tail_shape,
+                                                          a_pre_stride,
+                                                          val_stride,
+                                                          val_shape,
+                                                          a_shape,
+                                                          a_tail_size,
+                                                          ind_num,
+                                                          ind_ndim,
+                                                          ind,
+                                                          a_ndim,
+                                                          seg);
 }
 
-
-template<typename DType>
+template <typename DType>
 void IndexUpdateBackwardValCPUCompute(DType* grad_val,
                                       const DType* ograd,
                                       const int* ind_vec,
@@ -97,10 +111,12 @@ void IndexUpdateBackwardValCPUCompute(DType* grad_val,
                                       const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                       const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                       const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                      const int ograd_tail_size, const int ind_num,
-                                      const int ind_ndim, const int out_ndim,
+                                      const int ograd_tail_size,
+                                      const int ind_num,
+                                      const int ind_ndim,
+                                      const int out_ndim,
                                       const int seg) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t i = 0; i < static_cast<index_t>(ind_num); ++i) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
@@ -109,7 +125,7 @@ void IndexUpdateBackwardValCPUCompute(DType* grad_val,
     id *= ograd_tail_size;
     for (int _i = 0; _i < ograd_tail_size; ++_i) {
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_id =
-        mxnet_op::unravel(_i, ograd_tail_shape);
+          mxnet_op::unravel(_i, ograd_tail_shape);
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_id;
       for (int _j = 0; _j < seg; ++_j) {
         val_id[_j] = 0;
@@ -118,44 +134,56 @@ void IndexUpdateBackwardValCPUCompute(DType* grad_val,
         val_id[_j] = (val_shape[_j] == 1) ? 0 : ograd_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
-      #pragma omp critical
-      {
-        grad_val[val_dest] += ograd[id + _i];
-      }
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
+#pragma omp critical
+      { grad_val[val_dest] += ograd[id + _i]; }
     }
   }
 }
 
-template<>
-void IndexUpdateOpBackwardValImpl<cpu>(const OpContext& ctx,
-                                const TBlob& grad_val,
-                                const TBlob& ograd,
-                                const TBlob& t_ind,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                const int tail_size, const int ind_num, const int ind_ndim,
-                                const int ndim) {
+template <>
+void IndexUpdateOpBackwardValImpl<cpu>(
+    const OpContext& ctx,
+    const TBlob& grad_val,
+    const TBlob& ograd,
+    const TBlob& t_ind,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
+    const int tail_size,
+    const int ind_num,
+    const int ind_ndim,
+    const int ndim) {
   using namespace mshadow;
   using namespace mxnet_op;
   int seg = MXNET_SPECIAL_MAX_NDIM - ndim;
   MSHADOW_TYPE_SWITCH(grad_val.type_flag_, DType, {
-    IndexUpdateBackwardValCPUCompute<DType>(
-      grad_val.dptr<DType>(), ograd.dptr<DType>(), t_ind.dptr<int>(),
-      ograd_tail_shape, ograd_pre_stride, val_stride, val_shape, tail_size,
-      ind_num, ind_ndim, ndim, seg);
+    IndexUpdateBackwardValCPUCompute<DType>(grad_val.dptr<DType>(),
+                                            ograd.dptr<DType>(),
+                                            t_ind.dptr<int>(),
+                                            ograd_tail_shape,
+                                            ograd_pre_stride,
+                                            val_stride,
+                                            val_shape,
+                                            tail_size,
+                                            ind_num,
+                                            ind_ndim,
+                                            ndim,
+                                            seg);
   });
 }
 
-template<typename DType>
+template <typename DType>
 void IndexUpdateBackwardACPUCompute(DType* out_grad,
                                     const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_pre_stride,
-                                    const int tail_size, const int ind_num, const int ind_ndim,
-                                    const int32_t* ind, const int seg,
+                                    const int tail_size,
+                                    const int ind_num,
+                                    const int ind_ndim,
+                                    const int32_t* ind,
+                                    const int seg,
                                     const int req) {
-  #pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
+#pragma omp parallel for num_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount())
   for (index_t i = 0; i < static_cast<index_t>(ind_num); ++i) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
@@ -168,94 +196,108 @@ void IndexUpdateBackwardACPUCompute(DType* out_grad,
   }
 }
 
-template<>
+template <>
 void IndexUpdateOpBackwardAImpl<cpu>(const OpContext& ctx,
                                      const TBlob& grad_a,
                                      const TBlob& ograd,
                                      const TBlob& ind,
                                      const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_pre_stride,
-                                     const int tail_size, const int ind_num, const int ind_ndim,
-                                     const int seg, const int req) {
+                                     const int tail_size,
+                                     const int ind_num,
+                                     const int ind_ndim,
+                                     const int seg,
+                                     const int req) {
   using namespace mxnet_op;
   using namespace mshadow;
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   MSHADOW_TYPE_SWITCH(grad_a.type_flag_, DType, {
-    size_t temp_mem_size = ind.shape_.Size() * sizeof(int) +
-                           ograd.shape_.Size() * sizeof(DType);
+    size_t temp_mem_size = ind.shape_.Size() * sizeof(int) + ograd.shape_.Size() * sizeof(DType);
     Tensor<cpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<cpu, 1, char>(Shape1(temp_mem_size), s);
-    TBlob t_ograd = TBlob(temp_mem.dptr_, ograd.shape_, ograd.dev_mask(),
-                          ograd.type_flag_, ograd.dev_id());
-    TBlob t_ind = TBlob(temp_mem.dptr_ + ograd.Size() * sizeof(DType), ind.shape_, ind.dev_mask(),
-                        mshadow::kInt32, ind.dev_id());
+        ctx.requested[0].get_space_typed<cpu, 1, char>(Shape1(temp_mem_size), s);
+    TBlob t_ograd =
+        TBlob(temp_mem.dptr_, ograd.shape_, ograd.dev_mask(), ograd.type_flag_, ograd.dev_id());
+    TBlob t_ind = TBlob(temp_mem.dptr_ + ograd.Size() * sizeof(DType),
+                        ind.shape_,
+                        ind.dev_mask(),
+                        mshadow::kInt32,
+                        ind.dev_id());
     mxnet_op::copy(s, t_ograd, ograd);
     mxnet_op::copy(s, t_ind, ind);
     IndexUpdateBackwardACPUCompute<DType>(t_ograd.dptr<DType>(),
-                                          grada_pre_stride, tail_size,
-                                          ind_num, ind_ndim,
-                                          t_ind.dptr<int32_t>(), seg, req);
-    Kernel<ReqCopy<DType>, cpu>::Launch(s, grad_a.shape_.Size(), grad_a.dptr<DType>(),
-                                        t_ograd.dptr<DType>(), req);
+                                          grada_pre_stride,
+                                          tail_size,
+                                          ind_num,
+                                          ind_ndim,
+                                          t_ind.dptr<int32_t>(),
+                                          seg,
+                                          req);
+    Kernel<ReqCopy<DType>, cpu>::Launch(
+        s, grad_a.shape_.Size(), grad_a.dptr<DType>(), t_ograd.dptr<DType>(), req);
   });
 }
 
 NNVM_REGISTER_OP(_npx_index_update)
-.describe(R"code(This operators implements the "=" mimic function.
+    .describe(R"code(This operators implements the "=" mimic function.
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "ind", "val"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", IndexModifyOpShape)
-.set_attr<nnvm::FInferType>("FInferType", IndexModifyOpType)
-.set_attr<FCompute>("FCompute<cpu>", IndexUpdateOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-      auto a_grad = MakeNode("_backward_index_update_a", n->attrs.name + "_backward_a",
-                              {ograds[0], n->inputs[1]}, nullptr, &n);
-      auto idx_grad = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                              {n->inputs[1]}, nullptr, &n);
-      auto val_grad = MakeNode("_backward_index_update_val", n->attrs.name + "_backward_val",
-                              {ograds[0], n->inputs[1]}, nullptr, &n);
-      // auto val_grad = MakeNode("zeros_like", n->attrs.name + "_backward_val",
-      //                         {n->inputs[2]}, nullptr, &n);
-      std::vector<nnvm::NodeEntry> ret;
-      ret.emplace_back(a_grad);
-      ret.emplace_back(idx_grad);
-      ret.emplace_back(val_grad);
-      return ret;
-  })
-.add_argument("a", "NDArray-or-Symbol", "Input ndarray")
-.add_argument("ind", "NDArray-or-Symbol", "Index ndarray")
-.add_argument("val", "NDArray-or-Symbol", "Update ndarray");
-
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "ind", "val"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", IndexModifyOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", IndexModifyOpType)
+    .set_attr<FCompute>("FCompute<cpu>", IndexUpdateOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto a_grad   = MakeNode("_backward_index_update_a",
+                                 n->attrs.name + "_backward_a",
+                                 {ograds[0], n->inputs[1]},
+                                 nullptr,
+                                 &n);
+          auto idx_grad = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+          auto val_grad = MakeNode("_backward_index_update_val",
+                                   n->attrs.name + "_backward_val",
+                                   {ograds[0], n->inputs[1]},
+                                   nullptr,
+                                   &n);
+          // auto val_grad = MakeNode("zeros_like", n->attrs.name + "_backward_val",
+          //                         {n->inputs[2]}, nullptr, &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(a_grad);
+          ret.emplace_back(idx_grad);
+          ret.emplace_back(val_grad);
+          return ret;
+        })
+    .add_argument("a", "NDArray-or-Symbol", "Input ndarray")
+    .add_argument("ind", "NDArray-or-Symbol", "Index ndarray")
+    .add_argument("val", "NDArray-or-Symbol", "Update ndarray");
 
 NNVM_REGISTER_OP(_backward_index_update_a)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", IndexUpdateOpBackwardA<cpu>);
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", IndexUpdateOpBackwardA<cpu>);
 
 NNVM_REGISTER_OP(_backward_index_update_val)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", IndexUpdateOpBackwardVal<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", IndexUpdateOpBackwardVal<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/index_update.cu b/src/operator/tensor/index_update.cu
index 3ed788f350d1..266b0c8343cb 100644
--- a/src/operator/tensor/index_update.cu
+++ b/src/operator/tensor/index_update.cu
@@ -27,21 +27,24 @@
 #include "../tensor/util/tensor_util-inl.cuh"
 #include "../tensor/util/tensor_util-inl.h"
 
-
 namespace mxnet {
 namespace op {
 
-template<typename DType>
+template <typename DType>
 struct IndexUpdateForwardGPUKernel {
-  MSHADOW_XINLINE static void Map(size_t i, DType* out,
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* out,
                                   const DType* val,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                  const int a_tail_size, const int ind_num,
-                                  const int ind_ndim, const int* ind,
-                                  const int a_ndim, const int seg) {
+                                  const int a_tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int* ind,
+                                  const int a_ndim,
+                                  const int seg) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
       id += a_pre_stride[seg + dim] * ind[dim * ind_num + i];
@@ -57,15 +60,16 @@ struct IndexUpdateForwardGPUKernel {
         val_id[_j] = (val_shape[_j] == 1) ? 0 : a_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
-      out[id + _i] = val[val_dest];
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
+      out[id + _i]               = val[val_dest];
     }
   }
 };
 
-template<typename xpu, typename DType>
-void IndexUpdateForwardCalc(mshadow::Stream<xpu> *s,
-                            const int ind_num, DType* out,
+template <typename xpu, typename DType>
+void IndexUpdateForwardCalc(mshadow::Stream<xpu>* s,
+                            const int ind_num,
+                            DType* out,
                             const DType* val,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_tail_shape,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_pre_stride,
@@ -73,28 +77,43 @@ void IndexUpdateForwardCalc(mshadow::Stream<xpu> *s,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
                             const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> a_shape,
                             const int a_tail_size,
-                            const int ind_ndim, const int* ind,
+                            const int ind_ndim,
+                            const int* ind,
                             const int a_ndim) {
   using namespace mxnet_op;
   using namespace mshadow;
   int seg = MXNET_SPECIAL_MAX_NDIM - a_ndim;
-  Kernel<IndexUpdateForwardGPUKernel<DType>, xpu>::Launch(
-    s, ind_num, out, val, a_tail_shape, a_pre_stride,
-    val_stride, val_shape, a_tail_size, ind_num,
-    ind_ndim, ind, a_ndim, seg);
+  Kernel<IndexUpdateForwardGPUKernel<DType>, xpu>::Launch(s,
+                                                          ind_num,
+                                                          out,
+                                                          val,
+                                                          a_tail_shape,
+                                                          a_pre_stride,
+                                                          val_stride,
+                                                          val_shape,
+                                                          a_tail_size,
+                                                          ind_num,
+                                                          ind_ndim,
+                                                          ind,
+                                                          a_ndim,
+                                                          seg);
 }
 
-
 struct IndexUpdateBackwardValGPUKernel {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(size_t i, DType* grad_val,
-                                  const DType* ograd, const int* ind_vec,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* grad_val,
+                                  const DType* ograd,
+                                  const int* ind_vec,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                  const int ograd_tail_size, const int ind_num,
-                                  const int ind_ndim, const int out_ndim, const int seg) {
+                                  const int ograd_tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int out_ndim,
+                                  const int seg) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
       id += ograd_pre_stride[seg + dim] * ind_vec[dim * ind_num + i];
@@ -102,7 +121,7 @@ struct IndexUpdateBackwardValGPUKernel {
     id *= ograd_tail_size;
     for (int _i = 0; _i < ograd_tail_size; ++_i) {
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_id =
-        mxnet_op::unravel(_i, ograd_tail_shape);
+          mxnet_op::unravel(_i, ograd_tail_shape);
       mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_id;
       for (int _j = 0; _j < seg; ++_j) {
         val_id[_j] = 0;
@@ -111,41 +130,58 @@ struct IndexUpdateBackwardValGPUKernel {
         val_id[_j] = (val_shape[_j] == 1) ? 0 : ograd_tail_id[_j];
       }
       val_id[seg + ind_ndim - 1] = (val_shape[seg + ind_ndim - 1] == 1) ? 0 : i;
-      index_t val_dest = mxnet_op::dot(val_id, val_stride);
+      index_t val_dest           = mxnet_op::dot(val_id, val_stride);
       atomicAdd(&grad_val[val_dest], ograd[id + _i]);
     }
   }
 };
 
-template<>
-void IndexUpdateOpBackwardValImpl<gpu>(const OpContext& ctx,
-                                const TBlob& grad_val,
-                                const TBlob& ograd,
-                                const TBlob& t_ind,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
-                                const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
-                                const int tail_size, const int ind_num, const int ind_ndim,
-                                const int ndim) {
+template <>
+void IndexUpdateOpBackwardValImpl<gpu>(
+    const OpContext& ctx,
+    const TBlob& grad_val,
+    const TBlob& ograd,
+    const TBlob& t_ind,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_tail_shape,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> ograd_pre_stride,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_stride,
+    const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> val_shape,
+    const int tail_size,
+    const int ind_num,
+    const int ind_ndim,
+    const int ndim) {
   using namespace mshadow;
   using namespace mxnet_op;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  int seg = MXNET_SPECIAL_MAX_NDIM - ndim;
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  int seg                 = MXNET_SPECIAL_MAX_NDIM - ndim;
   MSHADOW_TYPE_SWITCH(grad_val.type_flag_, DType, {
-    Kernel<IndexUpdateBackwardValGPUKernel, gpu>::Launch(
-        s, ind_num, grad_val.dptr<DType>(), ograd.dptr<DType>(), t_ind.dptr<int>(),
-        ograd_tail_shape, ograd_pre_stride, val_stride, val_shape, tail_size,
-        ind_num, ind_ndim, ndim, seg);
+    Kernel<IndexUpdateBackwardValGPUKernel, gpu>::Launch(s,
+                                                         ind_num,
+                                                         grad_val.dptr<DType>(),
+                                                         ograd.dptr<DType>(),
+                                                         t_ind.dptr<int>(),
+                                                         ograd_tail_shape,
+                                                         ograd_pre_stride,
+                                                         val_stride,
+                                                         val_shape,
+                                                         tail_size,
+                                                         ind_num,
+                                                         ind_ndim,
+                                                         ndim,
+                                                         seg);
   });
 }
 
-template<typename DType>
+template <typename DType>
 struct IndexUpdateBackwardAGPUKernel {
-  MSHADOW_XINLINE static void Map(size_t i, DType* out_grad,
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  DType* out_grad,
                                   const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_pre_stride,
-                                  const int tail_size, const int ind_num, const int ind_ndim,
-                                  const int32_t* ind, const int seg,
+                                  const int tail_size,
+                                  const int ind_num,
+                                  const int ind_ndim,
+                                  const int32_t* ind,
+                                  const int seg,
                                   const int req) {
     index_t id = 0;
     for (int dim = 0; dim < ind_ndim; ++dim) {
@@ -158,47 +194,55 @@ struct IndexUpdateBackwardAGPUKernel {
   }
 };
 
-template<>
+template <>
 void IndexUpdateOpBackwardAImpl<gpu>(const OpContext& ctx,
                                      const TBlob& grad_a,
                                      const TBlob& ograd,
                                      const TBlob& ind,
                                      const mshadow::Shape<MXNET_SPECIAL_MAX_NDIM> grada_pre_stride,
-                                     const int tail_size, const int ind_num, const int ind_ndim,
-                                     const int seg, const int req) {
+                                     const int tail_size,
+                                     const int ind_num,
+                                     const int ind_ndim,
+                                     const int seg,
+                                     const int req) {
   using namespace mxnet_op;
   using namespace mshadow;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
   MSHADOW_TYPE_SWITCH(grad_a.type_flag_, DType, {
-    size_t alignment = std::max(sizeof(DType), sizeof(int32_t));
-    size_t id_size = PadBytes(sizeof(int32_t) * ind.Size(), alignment);
-    size_t ograd_size = PadBytes(sizeof(DType) * ograd.Size(), alignment);
+    size_t alignment     = std::max(sizeof(DType), sizeof(int32_t));
+    size_t id_size       = PadBytes(sizeof(int32_t) * ind.Size(), alignment);
+    size_t ograd_size    = PadBytes(sizeof(DType) * ograd.Size(), alignment);
     size_t temp_mem_size = id_size + ograd_size;
     Tensor<gpu, 1, char> temp_mem =
-      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_mem_size), s);
-    TBlob t_ograd = TBlob(temp_mem.dptr_, ograd.shape_, ograd.dev_mask(),
-                          ograd.type_flag_, ograd.dev_id());
-    TBlob t_ind = TBlob(temp_mem.dptr_ + ograd_size, ind.shape_, ind.dev_mask(),
-                        mshadow::kInt32, ind.dev_id());
+        ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_mem_size), s);
+    TBlob t_ograd =
+        TBlob(temp_mem.dptr_, ograd.shape_, ograd.dev_mask(), ograd.type_flag_, ograd.dev_id());
+    TBlob t_ind = TBlob(
+        temp_mem.dptr_ + ograd_size, ind.shape_, ind.dev_mask(), mshadow::kInt32, ind.dev_id());
     mxnet_op::copy(s, t_ograd, ograd);
     mxnet_op::copy(s, t_ind, ind);
-    Kernel<IndexUpdateBackwardAGPUKernel<DType>, gpu>::Launch(s, ind_num, t_ograd.dptr<DType>(),
-                                                           grada_pre_stride, tail_size,
-                                                           ind_num, ind_ndim,
-                                                           t_ind.dptr<int32_t>(), seg, req);
-    Kernel<ReqCopy<DType>, gpu>::Launch(s, grad_a.shape_.Size(), grad_a.dptr<DType>(),
-                                        t_ograd.dptr<DType>(), req);
+    Kernel<IndexUpdateBackwardAGPUKernel<DType>, gpu>::Launch(s,
+                                                              ind_num,
+                                                              t_ograd.dptr<DType>(),
+                                                              grada_pre_stride,
+                                                              tail_size,
+                                                              ind_num,
+                                                              ind_ndim,
+                                                              t_ind.dptr<int32_t>(),
+                                                              seg,
+                                                              req);
+    Kernel<ReqCopy<DType>, gpu>::Launch(
+        s, grad_a.shape_.Size(), grad_a.dptr<DType>(), t_ograd.dptr<DType>(), req);
   });
 }
 
-NNVM_REGISTER_OP(_npx_index_update)
-.set_attr<FCompute>("FCompute<gpu>", IndexUpdateOpForward<gpu>);
+NNVM_REGISTER_OP(_npx_index_update).set_attr<FCompute>("FCompute<gpu>", IndexUpdateOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_index_update_val)
-.set_attr<FCompute>("FCompute<gpu>", IndexUpdateOpBackwardVal<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", IndexUpdateOpBackwardVal<gpu>);
 
 NNVM_REGISTER_OP(_backward_index_update_a)
-.set_attr<FCompute>("FCompute<gpu>", IndexUpdateOpBackwardA<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", IndexUpdateOpBackwardA<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/indexing_op.cc b/src/operator/tensor/indexing_op.cc
index a3f10ae6b8f6..de61d20f75a3 100644
--- a/src/operator/tensor/indexing_op.cc
+++ b/src/operator/tensor/indexing_op.cc
@@ -22,26 +22,32 @@
  * \file indexing_op.cc
  * \brief CPU implementation of indexing operator
  * \author Siyi Li, Chi Zhang
-*/
+ */
 
 #include "./indexing_op.h"
 namespace mxnet {
 namespace op {
 
-template<bool clip = true>
+template <bool clip = true>
 struct TakeZeroAxisCPU {
   // assume that idx have been flattened to a 1-D tensor (N,)
   // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
   // M is the number of columns of in_data and out_data
   // K is the number of rows of in_data
   // i is the index of out_data
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const IType* idx, const size_t M, const int64_t K) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const size_t M,
+                                  const int64_t K) {
     int64_t j = static_cast<int64_t>(idx[i]);
     if (clip) {
-      if (j <= 0) j = 0;
-      else if (j >= K) j = K - 1;
+      if (j <= 0)
+        j = 0;
+      else if (j >= K)
+        j = K - 1;
     } else {
       j = j % K;
       j += (j < 0) ? K : 0;
@@ -62,9 +68,11 @@ struct TakeZeroAxisCPU {
  * \param min the expected min value for indices
  * \param max the expected max value for indices
  */
-template<typename DType>
-bool CheckIndexOutOfBound(const DType* data_ptr, size_t data_size,
-                          const DType min, const DType max) {
+template <typename DType>
+bool CheckIndexOutOfBound(const DType* data_ptr,
+                          size_t data_size,
+                          const DType min,
+                          const DType max) {
   bool is_valid = true;
   for (size_t i = 0; i < data_size; i++) {
     if (data_ptr[i] > max || data_ptr[i] < min) {
@@ -76,7 +84,7 @@ bool CheckIndexOutOfBound(const DType* data_ptr, size_t data_size,
 }
 
 // Embedding forward implementation with dense weight
-template<>
+template <>
 void EmbeddingOpForwardDnsImpl<cpu>(mshadow::Stream<cpu>* s,
                                     const TBlob& data,
                                     const TBlob& weight,
@@ -88,34 +96,39 @@ void EmbeddingOpForwardDnsImpl<cpu>(mshadow::Stream<cpu>* s,
 
   MSHADOW_TYPE_SWITCH(output.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(data.type_flag_, IType, {
-      Tensor<cpu, 1, IType> idx = data.get_with_shape<cpu, 1, IType>(
-        Shape1(ishape.ProdShape(0, ishape.ndim())), s);
+      Tensor<cpu, 1, IType> idx =
+          data.get_with_shape<cpu, 1, IType>(Shape1(ishape.ProdShape(0, ishape.ndim())), s);
       Tensor<cpu, 2, DType> wmat = weight.get<cpu, 2, DType>(s);
-      Tensor<cpu, 2, DType> out = output.get_with_shape<cpu, 2, DType>(
-        Shape2(oshape.ProdShape(0, oshape.ndim()-1), oshape[oshape.ndim()-1]), s);
-      Kernel<TakeZeroAxisCPU<true>, cpu>::Launch(s, oshape.Size() / wmat.shape_[1], out.dptr_,
-                                                 wmat.dptr_, idx.dptr_,
-                                                 wmat.shape_[1], wmat.shape_[0]);
+      Tensor<cpu, 2, DType> out  = output.get_with_shape<cpu, 2, DType>(
+          Shape2(oshape.ProdShape(0, oshape.ndim() - 1), oshape[oshape.ndim() - 1]), s);
+      Kernel<TakeZeroAxisCPU<true>, cpu>::Launch(s,
+                                                 oshape.Size() / wmat.shape_[1],
+                                                 out.dptr_,
+                                                 wmat.dptr_,
+                                                 idx.dptr_,
+                                                 wmat.shape_[1],
+                                                 wmat.shape_[0]);
     });
   });
 }
 
-template<>
+template <>
 void SparseEmbeddingOpForwardRspImpl<cpu>(const OpContext& ctx,
                                           const TBlob& data,
                                           const NDArray& weight,
                                           const OpReqType req,
                                           const TBlob& output) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   using namespace rowsparse;
   using namespace mxnet_op;
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
   // zeros weight
   if (req == kWriteTo && !weight.storage_initialized()) {
     size_t out_size = output.shape_.Size();
     MSHADOW_TYPE_SWITCH(output.type_flag_, DType, {
-      Fill<false>(s, TBlob(output.dptr<DType>(), mshadow::Shape1(out_size),
-          cpu::kDevMask), kWriteTo, 0);
+      Fill<false>(
+          s, TBlob(output.dptr<DType>(), mshadow::Shape1(out_size), cpu::kDevMask), kWriteTo, 0);
     })
     return;
   }
@@ -124,10 +137,9 @@ void SparseEmbeddingOpForwardRspImpl<cpu>(const OpContext& ctx,
     DType min = 0;
     DType max = static_cast<DType>(weight.shape()[0] - 1);
     // check with single thread is faster since data is small
-    DType* data_ptr = data.dptr<DType>();
+    DType* data_ptr  = data.dptr<DType>();
     size_t data_size = data.shape_.Size();
-    bool is_valid = CheckIndexOutOfBound(data_ptr, data_size,
-                                         min, max);
+    bool is_valid    = CheckIndexOutOfBound(data_ptr, data_size, min, max);
     CHECK(is_valid) << "SparseEmbedding input contains data out of bound";
   })
   // the weight is actually dense
@@ -138,7 +150,7 @@ void SparseEmbeddingOpForwardRspImpl<cpu>(const OpContext& ctx,
   }
 }
 
-template<bool clip>
+template <bool clip>
 struct CsrTakeDataKernel {
   /*!
    * \brief Map function for general case of take grad
@@ -151,16 +163,23 @@ struct CsrTakeDataKernel {
    * \param idx_ptr       ptr to indices
    * \param num_rows      maximum number of rows in src array
    */
-  template<typename IType, typename DType, typename RType>
-  MSHADOW_XINLINE static void Map(int tid, RType* out_idx, DType* out_data,
-                                  const RType* out_indptr, const RType* src_idx,
-                                  const DType* src_data, const RType* src_indptr,
-                                  const IType* idx_ptr, const nnvm::dim_t num_rows) {
+  template <typename IType, typename DType, typename RType>
+  MSHADOW_XINLINE static void Map(int tid,
+                                  RType* out_idx,
+                                  DType* out_data,
+                                  const RType* out_indptr,
+                                  const RType* src_idx,
+                                  const DType* src_data,
+                                  const RType* src_indptr,
+                                  const IType* idx_ptr,
+                                  const nnvm::dim_t num_rows) {
     nnvm::dim_t idx = static_cast<nnvm::dim_t>(idx_ptr[tid]);
     // clip mode
     if (clip) {
-      if (idx < 0) idx = 0;
-      if (idx >= num_rows) idx = num_rows - 1;
+      if (idx < 0)
+        idx = 0;
+      if (idx >= num_rows)
+        idx = num_rows - 1;
     } else {
       // wrap mode
       idx = idx % num_rows;
@@ -168,13 +187,13 @@ struct CsrTakeDataKernel {
     }
     int row_nnz = src_indptr[idx + 1] - src_indptr[idx];
     for (int i = 0; i < row_nnz; i++) {
-        out_data[out_indptr[tid] + i] = src_data[src_indptr[idx] + i];
-        out_idx[out_indptr[tid] + i] = src_idx[src_indptr[idx] + i];
+      out_data[out_indptr[tid] + i] = src_data[src_indptr[idx] + i];
+      out_idx[out_indptr[tid] + i]  = src_idx[src_indptr[idx] + i];
     }
   }
 };
 
-template<bool clip>
+template <bool clip>
 struct CsrTakeRowCountKernel {
   /*!
    * \brief Map function for general case of take grad
@@ -184,9 +203,11 @@ struct CsrTakeRowCountKernel {
    * \param idx_ptr       ptr to indices
    * \param num_rows      maximum number of rows in src array
    */
-  template<typename IType, typename RType>
-  MSHADOW_XINLINE static void Map(int tid, RType* out_indptr,
-                                  const RType* src_indptr, const IType* idx_ptr,
+  template <typename IType, typename RType>
+  MSHADOW_XINLINE static void Map(int tid,
+                                  RType* out_indptr,
+                                  const RType* src_indptr,
+                                  const IType* idx_ptr,
                                   const nnvm::dim_t num_rows) {
     if (tid == 0) {
       out_indptr[0] = 0;
@@ -195,8 +216,10 @@ struct CsrTakeRowCountKernel {
     nnvm::dim_t idx = static_cast<nnvm::dim_t>(idx_ptr[tid - 1]);
     // clip mode
     if (clip) {
-      if (idx < 0) idx = 0;
-      if (idx >= num_rows) idx = num_rows - 1;
+      if (idx < 0)
+        idx = 0;
+      if (idx >= num_rows)
+        idx = num_rows - 1;
     } else {
       // wrap mode
       idx = idx % num_rows;
@@ -206,7 +229,7 @@ struct CsrTakeRowCountKernel {
   }
 };
 
-template<>
+template <>
 void TakeOpForwardCsrImpl<cpu>(const TakeParam& params,
                                const OpContext& ctx,
                                const TBlob& idx,
@@ -216,42 +239,42 @@ void TakeOpForwardCsrImpl<cpu>(const TakeParam& params,
   using namespace csr;
   using namespace mxnet_op;
   using nnvm::dim_t;
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  if (req == kNullOp) return;
+  Stream<cpu>* s = ctx.get_stream<cpu>();
+  if (req == kNullOp)
+    return;
   if (!arr.storage_initialized()) {
     FillZerosCsrImpl(s, out);
     return;
   }
-  CHECK_EQ(idx.shape_.ndim(), 1U)
-          << "Take with CSR array only supports one-dimensional indices. "
-          << idx.shape_.ndim() << " dimensional input is given instead";
+  CHECK_EQ(idx.shape_.ndim(), 1U) << "Take with CSR array only supports one-dimensional indices. "
+                                  << idx.shape_.ndim() << " dimensional input is given instead";
   CHECK_EQ(req, kWriteTo) << "req = " << req << " is not supported for take(csr)";
   auto axis = params.axis;
   CHECK_EQ(axis, 0) << "axis = " << axis << " is not supported for take(csr)";
   CHECK(params.mode == take_::kClip || params.mode == take_::kWrap)
-    << "mode = " << params.mode << " is not supported";
-  const dim_t num_rows = out.shape()[0];
+      << "mode = " << params.mode << " is not supported";
+  const dim_t num_rows     = out.shape()[0];
   const dim_t max_num_rows = arr.shape()[0];
   out.CheckAndAllocAuxData(kIndPtr, {Shape1(num_rows + 1)});
 
   MSHADOW_TYPE_SWITCH(idx.type_flag_, IType, {
     MSHADOW_TYPE_SWITCH(arr.dtype(), DType, {
       MSHADOW_IDX_TYPE_SWITCH(out.aux_type(kIdx), RType, {
-        RType* out_indptr = out.aux_data(kIndPtr).dptr<RType>();
+        RType* out_indptr       = out.aux_data(kIndPtr).dptr<RType>();
         const RType* src_indptr = arr.aux_data(kIndPtr).dptr<RType>();
-        const IType* idx_ptr = idx.dptr<IType>();
+        const IType* idx_ptr    = idx.dptr<IType>();
         // gather per row nnz information for output
         bool clip = params.mode == take_::kClip;
         if (clip) {
-          Kernel<CsrTakeRowCountKernel<true>, cpu>::Launch(s, num_rows + 1,
-              out_indptr, src_indptr, idx_ptr, max_num_rows);
+          Kernel<CsrTakeRowCountKernel<true>, cpu>::Launch(
+              s, num_rows + 1, out_indptr, src_indptr, idx_ptr, max_num_rows);
         } else {
-          Kernel<CsrTakeRowCountKernel<false>, cpu>::Launch(s, num_rows + 1,
-              out_indptr, src_indptr, idx_ptr, max_num_rows);
+          Kernel<CsrTakeRowCountKernel<false>, cpu>::Launch(
+              s, num_rows + 1, out_indptr, src_indptr, idx_ptr, max_num_rows);
         }
         // calculate prefix sum with single thread
         for (dim_t i = 0; i < num_rows; i++) {
-           out_indptr[i + 1] += out_indptr[i];
+          out_indptr[i + 1] += out_indptr[i];
         }
         // total number of non-zero rows
         const dim_t nnz = out_indptr[num_rows];
@@ -261,70 +284,91 @@ void TakeOpForwardCsrImpl<cpu>(const TakeParam& params,
         }
         out.CheckAndAllocAuxData(kIdx, {Shape1(nnz)});
         out.CheckAndAllocData(Shape1(nnz));
-        RType* out_idx = out.aux_data(kIdx).dptr<RType>();
-        DType* out_data = out.data().dptr<DType>();
-        const RType* src_idx = arr.aux_data(kIdx).dptr<RType>();
+        RType* out_idx        = out.aux_data(kIdx).dptr<RType>();
+        DType* out_data       = out.data().dptr<DType>();
+        const RType* src_idx  = arr.aux_data(kIdx).dptr<RType>();
         const DType* src_data = arr.data().dptr<DType>();
         // copy indices and data for output
         if (clip) {
-          Kernel<CsrTakeDataKernel<true>, cpu>::Launch(s, num_rows, out_idx,
-              out_data, out_indptr, src_idx, src_data, src_indptr, idx_ptr, max_num_rows);
+          Kernel<CsrTakeDataKernel<true>, cpu>::Launch(s,
+                                                       num_rows,
+                                                       out_idx,
+                                                       out_data,
+                                                       out_indptr,
+                                                       src_idx,
+                                                       src_data,
+                                                       src_indptr,
+                                                       idx_ptr,
+                                                       max_num_rows);
         } else {
-          Kernel<CsrTakeDataKernel<false>, cpu>::Launch(s, num_rows, out_idx,
-              out_data, out_indptr, src_idx, src_data, src_indptr, idx_ptr, max_num_rows);
+          Kernel<CsrTakeDataKernel<false>, cpu>::Launch(s,
+                                                        num_rows,
+                                                        out_idx,
+                                                        out_data,
+                                                        out_indptr,
+                                                        src_idx,
+                                                        src_data,
+                                                        src_indptr,
+                                                        idx_ptr,
+                                                        max_num_rows);
         }
       });
     });
   });
 }
 
-template<>
+template <>
 void TakeOpForward<cpu>(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
                         const std::vector<OpReqType>& req,
                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  if (req[take_::kOut] == kNullOp) return;
+  if (req[take_::kOut] == kNullOp)
+    return;
   const TakeParam& param = nnvm::get<TakeParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
   const mxnet::TShape& idxshape = inputs[take_::kIdx].shape_;
   const mxnet::TShape& arrshape = inputs[take_::kArr].shape_;
-  const mxnet::TShape& oshape = outputs[take_::kOut].shape_;
+  const mxnet::TShape& oshape   = outputs[take_::kOut].shape_;
 
   if (idxshape.Size() == 0) {
     return;
   }
 
-  Stream<cpu> *s = ctx.get_stream<cpu>();
+  Stream<cpu>* s        = ctx.get_stream<cpu>();
   const int actual_axis = param.axis + ((param.axis < 0) ? arrshape.ndim() : 0);
 
-  MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[take_::kOut].type_flag_, DType, {  // output data type
+  MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[take_::kOut].type_flag_, DType, {   // output data type
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[take_::kIdx].type_flag_, IType, {  // index data type
       if (param.mode == take_::kRaise) {
         IType min = 0;
         IType max = static_cast<IType>(arrshape[actual_axis] - 1);
         // check with single thread is faster since data is small
-        IType* idx_ptr = inputs[take_::kIdx].dptr<IType>();
+        IType* idx_ptr  = inputs[take_::kIdx].dptr<IType>();
         size_t idx_size = idxshape.Size();
-        bool is_valid = CheckIndexOutOfBound(idx_ptr, idx_size, min, max);
+        bool is_valid   = CheckIndexOutOfBound(idx_ptr, idx_size, min, max);
         CHECK(is_valid) << "take operator contains indices out of bound";
       }
       if (actual_axis == 0) {
         if (param.mode == take_::kClip) {
-          Kernel<TakeZeroAxisCPU<true>, cpu>::Launch(s, idxshape.Size(),
+          Kernel<TakeZeroAxisCPU<true>, cpu>::Launch(s,
+                                                     idxshape.Size(),
                                                      outputs[take_::kOut].dptr<DType>(),
                                                      inputs[take_::kArr].dptr<DType>(),
                                                      inputs[take_::kIdx].dptr<IType>(),
-                                                     oshape.Size()/idxshape.Size(), arrshape[0]);
+                                                     oshape.Size() / idxshape.Size(),
+                                                     arrshape[0]);
         } else {
-          Kernel<TakeZeroAxisCPU<false>, cpu>::Launch(s, idxshape.Size(),
+          Kernel<TakeZeroAxisCPU<false>, cpu>::Launch(s,
+                                                      idxshape.Size(),
                                                       outputs[take_::kOut].dptr<DType>(),
                                                       inputs[take_::kArr].dptr<DType>(),
                                                       inputs[take_::kIdx].dptr<IType>(),
-                                                      oshape.Size()/idxshape.Size(), arrshape[0]);
+                                                      oshape.Size() / idxshape.Size(),
+                                                      arrshape[0]);
         }
       } else {
         mshadow::Shape<10> in_strides;
@@ -338,32 +382,40 @@ void TakeOpForward<cpu>(const nnvm::NodeAttrs& attrs,
           out_strides[i] = stride;
         }
         if (param.mode == take_::kClip) {
-          Kernel<TakeNonzeroAxis<true>, cpu>::Launch(s, oshape.Size(),
+          Kernel<TakeNonzeroAxis<true>, cpu>::Launch(s,
+                                                     oshape.Size(),
                                                      outputs[take_::kOut].dptr<DType>(),
                                                      inputs[take_::kArr].dptr<DType>(),
                                                      inputs[take_::kIdx].dptr<IType>(),
-                                                     out_strides[actual_axis-1],
-                                                     in_strides[actual_axis-1],
-                                                     in_strides[actual_axis], arrshape.ndim(),
-                                                     oshape.ndim(), idxshape.ndim(),
-                                                     arrshape[actual_axis], actual_axis);
+                                                     out_strides[actual_axis - 1],
+                                                     in_strides[actual_axis - 1],
+                                                     in_strides[actual_axis],
+                                                     arrshape.ndim(),
+                                                     oshape.ndim(),
+                                                     idxshape.ndim(),
+                                                     arrshape[actual_axis],
+                                                     actual_axis);
         } else {
-          Kernel<TakeNonzeroAxis<false>, cpu>::Launch(s, oshape.Size(),
+          Kernel<TakeNonzeroAxis<false>, cpu>::Launch(s,
+                                                      oshape.Size(),
                                                       outputs[take_::kOut].dptr<DType>(),
                                                       inputs[take_::kArr].dptr<DType>(),
                                                       inputs[take_::kIdx].dptr<IType>(),
-                                                      out_strides[actual_axis-1],
-                                                      in_strides[actual_axis-1],
-                                                      in_strides[actual_axis], arrshape.ndim(),
-                                                      oshape.ndim(), idxshape.ndim(),
-                                                      arrshape[actual_axis], actual_axis);
+                                                      out_strides[actual_axis - 1],
+                                                      in_strides[actual_axis - 1],
+                                                      in_strides[actual_axis],
+                                                      arrshape.ndim(),
+                                                      oshape.ndim(),
+                                                      idxshape.ndim(),
+                                                      arrshape[actual_axis],
+                                                      actual_axis);
         }
       }
     });
   });
 }
 
-template<>
+template <>
 inline void SparseEmbeddingOpBackwardRspImpl<cpu>(const bool deterministic,
                                                   const OpContext& ctx,
                                                   const TBlob& ograd,
@@ -375,22 +427,22 @@ inline void SparseEmbeddingOpBackwardRspImpl<cpu>(const bool deterministic,
   using namespace mshadow::expr;
   using namespace rowsparse;
   using nnvm::dim_t;
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteTo) << "SparseEmbedding layer doesn't support "
                           << "weight gradient calculation with req != write";
 
   // Request temporary storage for marking non-zero rows and prefix sum
-  Stream<cpu> *s = ctx.get_stream<cpu>();
-  dim_t num_rows = output.shape()[0];
-  dim_t row_length = output.shape()[1];
+  Stream<cpu>* s        = ctx.get_stream<cpu>();
+  dim_t num_rows        = output.shape()[0];
+  dim_t row_length      = output.shape()[1];
   size_t workspace_size = num_rows * sizeof(dim_t);
   Tensor<cpu, 1, char> workspace =
-    ctx.requested[embedding::kTempSpace].get_space_typed<cpu, 1, char>(
-      Shape1(workspace_size), s);
+      ctx.requested[embedding::kTempSpace].get_space_typed<cpu, 1, char>(Shape1(workspace_size), s);
   dim_t* row_flg = reinterpret_cast<dim_t*>(workspace.dptr_);
   // prefix sum array re-uses the row_flg array temp space
   dim_t* prefix_sum = row_flg;
-  dim_t data_size = static_cast<dim_t>(data.shape_.Size());
+  dim_t data_size   = static_cast<dim_t>(data.shape_.Size());
 
   MSHADOW_TYPE_SWITCH(data.type_flag_, IType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(ograd.type_flag_, DType, {
@@ -401,7 +453,7 @@ inline void SparseEmbeddingOpBackwardRspImpl<cpu>(const bool deterministic,
           IType max = static_cast<IType>(output.shape()[0] - 1);
           // check with single thread is faster since data is small
           IType* data_ptr = data.dptr<IType>();
-          bool is_valid = CheckIndexOutOfBound(data_ptr, data.shape_.Size(), min, max);
+          bool is_valid   = CheckIndexOutOfBound(data_ptr, data.shape_.Size(), min, max);
           CHECK(is_valid) << "Embedding input contains data out of bound";
         }
         // mark row flags
@@ -422,18 +474,22 @@ inline void SparseEmbeddingOpBackwardRspImpl<cpu>(const bool deterministic,
         output.CheckAndAlloc({Shape1(nnr)});
         RType* grad_row_idx = output.aux_data(kIdx).dptr<RType>();
         // fill row_idx array of output matrix, using the row_flg values
-        Kernel<FillRspRowIdxKernel, cpu>::Launch(s, num_rows,
-            grad_row_idx, prefix_sum, num_rows);
+        Kernel<FillRspRowIdxKernel, cpu>::Launch(s, num_rows, grad_row_idx, prefix_sum, num_rows);
         // prefill with zeros
         DType* grad_data = output.data().dptr<DType>();
-        Fill<false>(s, TBlob(grad_data, Shape1(nnr * row_length),
-            cpu::kDevMask), kWriteTo, 0);
+        Fill<false>(s, TBlob(grad_data, Shape1(nnr * row_length), cpu::kDevMask), kWriteTo, 0);
         // add the final gradients
         const int num_threads = engine::OpenMP::Get()->GetRecommendedOMPThreadCount();
-        dim_t segment_len = (nnr + num_threads - 1) / num_threads;
-        Kernel<AddTakeGradRspKernel, cpu>::Launch(s, num_threads, grad_data, prefix_sum,
-                                                  ograd.dptr<DType>(), row_length,
-                                                  data.dptr<IType>(), data_size, segment_len,
+        dim_t segment_len     = (nnr + num_threads - 1) / num_threads;
+        Kernel<AddTakeGradRspKernel, cpu>::Launch(s,
+                                                  num_threads,
+                                                  grad_data,
+                                                  prefix_sum,
+                                                  ograd.dptr<DType>(),
+                                                  row_length,
+                                                  data.dptr<IType>(),
+                                                  data_size,
+                                                  segment_len,
                                                   num_rows);
       });
     });
@@ -449,70 +505,85 @@ inline void SparseEmbeddingOpBackwardRspImpl<cpu>(const bool deterministic,
  * \param mshape the array that stores shape for each dimension
  * \param is_valid_dim_ptr the temparary workspace that contains out-of-bound indices
  */
-template<typename DType>
-void GatherNDCheckBoundCPU(mshadow::Stream<cpu> *s, const DType* idx_ptr, index_t N,
-                        index_t M, const mshadow::Shape<10> mshape, DType* is_valid_dim_ptr) {
+template <typename DType>
+void GatherNDCheckBoundCPU(mshadow::Stream<cpu>* s,
+                           const DType* idx_ptr,
+                           index_t N,
+                           index_t M,
+                           const mshadow::Shape<10> mshape,
+                           DType* is_valid_dim_ptr) {
   using namespace mxnet_op;
   Kernel<set_zero, cpu>::Launch(s, M, is_valid_dim_ptr);
   Kernel<is_valid_check_gather_nd, cpu>::Launch(s, M, is_valid_dim_ptr, idx_ptr, N, mshape);
   for (index_t m = 0; m < M; m++) {
-    if (is_valid_dim_ptr[m] > mshape[m] - 1 || is_valid_dim_ptr[m] < - mshape[m]) {
-      LOG(FATAL)<< "IndexError: index " << is_valid_dim_ptr[m] << " is out of bounds for axis "
-        << m << " with size " << mshape[m];
+    if (is_valid_dim_ptr[m] > mshape[m] - 1 || is_valid_dim_ptr[m] < -mshape[m]) {
+      LOG(FATAL) << "IndexError: index " << is_valid_dim_ptr[m] << " is out of bounds for axis "
+                 << m << " with size " << mshape[m];
     }
   }
 }
 
 void GatherNDForwardCPU(const nnvm::NodeAttrs& attrs,
-                     const OpContext& ctx,
-                     const std::vector<TBlob>& inputs,
-                     const std::vector<OpReqType>& req,
-                     const std::vector<TBlob>& outputs) {
+                        const OpContext& ctx,
+                        const std::vector<TBlob>& inputs,
+                        const std::vector<OpReqType>& req,
+                        const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<cpu> *s = ctx.get_stream<cpu>();
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<cpu>* s     = ctx.get_stream<cpu>();
   const mxnet::TShape& dshape = inputs[0].shape_;
   const mxnet::TShape& ishape = inputs[1].shape_;
-  index_t M = ishape[0];
-  index_t N = ishape.Size() / M;
-  index_t K = dshape.ProdShape(M, dshape.ndim());
+  index_t M                   = ishape[0];
+  index_t N                   = ishape.Size() / M;
+  index_t K                   = dshape.ProdShape(M, dshape.ndim());
   mshadow::Shape<10> strides;
   mshadow::Shape<10> mshape;
-  for (index_t i = M-1, stride = K; i >= 0; stride *= dshape[i], --i) {
+  for (index_t i = M - 1, stride = K; i >= 0; stride *= dshape[i], --i) {
     strides[i] = stride;
-    mshape[i] = dshape[i];
+    mshape[i]  = dshape[i];
   }
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {  // output data type switch
-    MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // indices data type switch
+    MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {          // indices data type switch
       // check whether indices are out of bound
       IType* idx_ptr = inputs[1].dptr<IType>();
       Tensor<cpu, 1, IType> workspace =
-        ctx.requested[0].get_space_typed<cpu, 1, IType>(Shape1(M), s);
+          ctx.requested[0].get_space_typed<cpu, 1, IType>(Shape1(M), s);
       IType* is_valid_dim_ptr = reinterpret_cast<IType*>(workspace.dptr_);
       GatherNDCheckBoundCPU(s, idx_ptr, N, M, mshape, is_valid_dim_ptr);
-      Kernel<gather_nd, cpu>::Launch(
-        s, N, req[0], N, M, K, strides, mshape, outputs[0].dptr<DType>(),
-        inputs[0].dptr<DType>(), inputs[1].dptr<IType>());
+      Kernel<gather_nd, cpu>::Launch(s,
+                                     N,
+                                     req[0],
+                                     N,
+                                     M,
+                                     K,
+                                     strides,
+                                     mshape,
+                                     outputs[0].dptr<DType>(),
+                                     inputs[0].dptr<DType>(),
+                                     inputs[1].dptr<IType>());
     });
   });
 }
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 inline typename std::enable_if<(!std::is_same<DType, mshadow::half::half_t>::value), void>::type
-GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+GatherNDBackwardImpl(index_t N,
+                     index_t M,
+                     index_t K,
                      const mshadow::Shape<10> strides,
                      DType* out,
                      const DType* data,
                      const IType* indices,
-                     mshadow::Stream<cpu> *s) {
+                     mshadow::Stream<cpu>* s) {
 #pragma omp parallel for
   for (index_t i = 0; i < N; i++) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<index_t>(indices[j*N + i]);
+      offset += strides[j] * static_cast<index_t>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
 #pragma omp atomic
@@ -521,18 +592,20 @@ GatherNDBackwardImpl(index_t N, index_t M, index_t K,
   }
 }
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 inline typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value, void>::type
-GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+GatherNDBackwardImpl(index_t N,
+                     index_t M,
+                     index_t K,
                      const mshadow::Shape<10> strides,
                      DType* out,
                      const DType* data,
                      const IType* indices,
-                     mshadow::Stream<cpu> *s) {
+                     mshadow::Stream<cpu>* s) {
   for (index_t i = 0; i < N; i++) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<index_t>(indices[j*N + i]);
+      offset += strides[j] * static_cast<index_t>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
       out[offset + j] += data[i * K + j];
@@ -547,8 +620,8 @@ DMLC_REGISTER_PARAMETER(ScatterNDParam);
 
 NNVM_REGISTER_OP(Embedding)
 MXNET_ADD_SPARSE_OP_ALIAS(Embedding)
-.add_alias("_npx_embedding")
-.describe(R"code(Maps integer indices to vector representations (embeddings).
+    .add_alias("_npx_embedding")
+    .describe(R"code(Maps integer indices to vector representations (embeddings).
 
 This operator maps words to real-valued vectors in a high-dimensional space,
 called word embeddings. These embeddings can capture semantic and syntactic properties of the words.
@@ -600,46 +673,47 @@ The storage type of weight can be either row_sparse or default.
     https://mxnet.apache.org/versions/master/api/python/docs/api/optimizer/index.html
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<EmbeddingParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "weight"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", EmbeddingOpShape<EmbeddingParam>)
-.set_attr<nnvm::FInferType>("FInferType", EmbeddingOpType<EmbeddingParam>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", EmbeddingOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    return MakeNonlossGradNode("_backward_Embedding", n, ograds,
-                               {n->inputs[0]}, n->attrs.dict);
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array to the embedding operator.")
-.add_argument("weight", "NDArray-or-Symbol", "The embedding weight matrix.")
-.add_arguments(EmbeddingParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<EmbeddingParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "weight"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", EmbeddingOpShape<EmbeddingParam>)
+    .set_attr<nnvm::FInferType>("FInferType", EmbeddingOpType<EmbeddingParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", EmbeddingOpForward<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          return MakeNonlossGradNode(
+              "_backward_Embedding", n, ograds, {n->inputs[0]}, n->attrs.dict);
+        })
+    .add_argument("data", "NDArray-or-Symbol", "The input array to the embedding operator.")
+    .add_argument("weight", "NDArray-or-Symbol", "The embedding weight matrix.")
+    .add_arguments(EmbeddingParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_Embedding)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<EmbeddingParam>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FInferStorageType>("FInferStorageType", EmbeddingOpBackwardStorageType)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", EmbeddingOpBackward<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", EmbeddingOpBackwardEx<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<EmbeddingParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FInferStorageType>("FInferStorageType", EmbeddingOpBackwardStorageType)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", EmbeddingOpBackward<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", EmbeddingOpBackwardEx<cpu>);
 
 NNVM_REGISTER_OP(take)
-.add_alias("_npi_take")
-.describe(R"code(Takes elements from an input array along the given axis.
+    .add_alias("_npi_take")
+    .describe(R"code(Takes elements from an input array along the given axis.
 
 This function slices the input array along a particular axis with the provided indices.
 
@@ -689,46 +763,46 @@ The storage type of ``take`` output depends upon the input storage type:
    - take(csr, default, axis=0) = csr
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<TakeParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TakeOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TakeOpType)
-.set_attr<FInferStorageType>("FInferStorageType", TakeOpForwardStorageType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", TakeOpForward<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", TakeOpForwardEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n,  const std::vector<nnvm::NodeEntry>& ograds) {
-    return MakeNonlossGradNode("_backward_take", n, ograds,
-                               {n->inputs[1]}, n->attrs.dict);
-  })
-.add_argument("a", "NDArray-or-Symbol", "The input array.")
-.add_argument("indices", "NDArray-or-Symbol", "The indices of the values to be extracted.")
-.add_arguments(TakeParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<TakeParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TakeOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TakeOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", TakeOpForwardStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", TakeOpForward<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", TakeOpForwardEx<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 return MakeNonlossGradNode(
+                                     "_backward_take", n, ograds, {n->inputs[1]}, n->attrs.dict);
+                               })
+    .add_argument("a", "NDArray-or-Symbol", "The input array.")
+    .add_argument("indices", "NDArray-or-Symbol", "The indices of the values to be extracted.")
+    .add_arguments(TakeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_take)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<TakeParam>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TakeOpBackward<cpu>);
-
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<TakeParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TakeOpBackward<cpu>);
 
 NNVM_REGISTER_OP(batch_take)
-.describe(R"code(Takes elements from a data batch.
+    .describe(R"code(Takes elements from a data batch.
 
 .. note::
   `batch_take` is deprecated. Use `pick` instead.
@@ -748,21 +822,21 @@ Examples::
   batch_take(x, [0,1,0]) = [ 1.  4.  5.]
 
 )code" ADD_FILELINE)
-.set_num_outputs(1)
-.set_num_inputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"a", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", BatchTakeOpShape)
-.set_attr<nnvm::FInferType>("FInferType", BatchTakeOpType)
-.set_attr<FCompute>("FCompute<cpu>", BatchTakeOpForward<cpu>)
-.add_argument("a", "NDArray-or-Symbol", "The input array")
-.add_argument("indices", "NDArray-or-Symbol", "The index array");
+    .set_num_outputs(1)
+    .set_num_inputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"a", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", BatchTakeOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", BatchTakeOpType)
+    .set_attr<FCompute>("FCompute<cpu>", BatchTakeOpForward<cpu>)
+    .add_argument("a", "NDArray-or-Symbol", "The input array")
+    .add_argument("indices", "NDArray-or-Symbol", "The index array");
 
 NNVM_REGISTER_OP(one_hot)
-.add_alias("_npx_one_hot")
-.describe(R"code(Returns a one-hot array.
+    .add_alias("_npx_one_hot")
+    .describe(R"code(Returns a one-hot array.
 
 The locations represented by `indices` take value `on_value`, while all
 other locations take value `off_value`.
@@ -795,25 +869,24 @@ Examples::
                                      [[ 0.  0.  1.]
                                       [ 1.  0.  0.]]]
 )code" ADD_FILELINE)
-.set_num_outputs(1)
-.set_num_inputs(1)
-.set_attr_parser(ParamParser<OneHotParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", OneHotOpShape)
-.set_attr<nnvm::FInferType>("FInferType", OneHotOpType)
-.set_attr<FCompute>("FCompute<cpu>", OneHotOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("indices", "NDArray-or-Symbol", "array of locations where to set on_value")
-.add_arguments(OneHotParam::__FIELDS__());
-
+    .set_num_outputs(1)
+    .set_num_inputs(1)
+    .set_attr_parser(ParamParser<OneHotParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", OneHotOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", OneHotOpType)
+    .set_attr<FCompute>("FCompute<cpu>", OneHotOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("indices", "NDArray-or-Symbol", "array of locations where to set on_value")
+    .add_arguments(OneHotParam::__FIELDS__());
 
 NNVM_REGISTER_OP(gather_nd)
-.add_alias("_npi_gather_nd")
-.add_alias("_npx_gather_nd")
-.describe(R"code(Gather elements or slices from `data` and store to a tensor whose
+    .add_alias("_npi_gather_nd")
+    .add_alias("_npx_gather_nd")
+    .describe(R"code(Gather elements or slices from `data` and store to a tensor whose
 shape is defined by `indices`.
 
 Given `data` with shape `(X_0, X_1, ..., X_{N-1})` and indices with shape
@@ -838,41 +911,42 @@ Examples::
   gather_nd(data, indices) = [[3, 4], [5, 6]]
 
 )code")
-.set_num_outputs(1)
-.set_num_inputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", GatherNDShape)
-.set_attr<nnvm::FInferType>("FInferType", GatherNDType)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<FCompute>("FCompute<cpu>", GatherNDForwardCPU)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("_backward_gather_nd");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->inputs.push_back(ograds[0]);
-    p->inputs.push_back(n->inputs[1]);
-    p->control_deps.emplace_back(n);
-    auto zero = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                         {n->inputs[1]}, nullptr, &n);
-
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(p);
-    ret.emplace_back(zero);
-    return ret;
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.add_argument("data", "NDArray-or-Symbol", "data")
-.add_argument("indices", "NDArray-or-Symbol", "indices");
+    .set_num_outputs(1)
+    .set_num_inputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", GatherNDShape)
+    .set_attr<nnvm::FInferType>("FInferType", GatherNDType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", GatherNDForwardCPU)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto p        = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("_backward_gather_nd");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->inputs.push_back(ograds[0]);
+          p->inputs.push_back(n->inputs[1]);
+          p->control_deps.emplace_back(n);
+          auto zero = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(p);
+          ret.emplace_back(zero);
+          return ret;
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .add_argument("data", "NDArray-or-Symbol", "data")
+    .add_argument("indices", "NDArray-or-Symbol", "indices");
 
 NNVM_REGISTER_OP(scatter_nd)
-.describe(R"code(Scatters data into a new tensor according to indices.
+    .describe(R"code(Scatters data into a new tensor according to indices.
 
 Given `data` with shape `(Y_0, ..., Y_{K-1}, X_M, ..., X_{N-1})` and indices with shape
 `(M, Y_0, ..., Y_{K-1})`, the output will have shape `(X_0, X_1, ..., X_{N-1})`,
@@ -916,38 +990,39 @@ Examples::
                                         [7, 8]]]]
 
 )code")
-.set_num_outputs(1)
-.set_num_inputs(2)
-.set_attr_parser(ParamParser<ScatterNDParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ScatterNDShape)
-.set_attr<nnvm::FInferType>("FInferType", ScatterNDType)
-.set_attr<FCompute>("FCompute<cpu>", ScatterNDForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("gather_nd");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->inputs.push_back(ograds[0]);
-    p->inputs.push_back(n->inputs[1]);
-    p->control_deps.emplace_back(n);
-    auto zero = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                         {n->inputs[1]}, nullptr, &n);
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(p);
-    ret.emplace_back(zero);
-    return ret;
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.add_argument("data", "NDArray-or-Symbol", "data")
-.add_argument("indices", "NDArray-or-Symbol", "indices")
-.add_arguments(ScatterNDParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(2)
+    .set_attr_parser(ParamParser<ScatterNDParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ScatterNDShape)
+    .set_attr<nnvm::FInferType>("FInferType", ScatterNDType)
+    .set_attr<FCompute>("FCompute<cpu>", ScatterNDForward<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto p        = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("gather_nd");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->inputs.push_back(ograds[0]);
+          p->inputs.push_back(n->inputs[1]);
+          p->control_deps.emplace_back(n);
+          auto zero = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(p);
+          ret.emplace_back(zero);
+          return ret;
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .add_argument("data", "NDArray-or-Symbol", "data")
+    .add_argument("indices", "NDArray-or-Symbol", "indices")
+    .add_arguments(ScatterNDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_gather_nd)
-.describe(R"code(Accumulates data according to indices and get the result. It's the backward of
+    .describe(R"code(Accumulates data according to indices and get the result. It's the backward of
 `gather_nd`.
 
 Given `data` with shape `(Y_0, ..., Y_{K-1}, X_M, ..., X_{N-1})` and indices with shape
@@ -979,39 +1054,40 @@ Examples::
   _backward_gather_nd(data, indices, shape) = [[0, 0], [0, 5]]
 
 )code")
-.set_num_outputs(1)
-.set_num_inputs(2)
-.set_attr_parser(ParamParser<ScatterNDParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", ScatterNDShape)
-.set_attr<nnvm::FInferType>("FInferType", ScatterNDType)
-.set_attr<FCompute>("FCompute<cpu>", GatherNDBackward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    auto p = nnvm::Node::Create();
-    p->attrs.op = nnvm::Op::Get("gather_nd");
-    p->attrs.name = n->attrs.name + "_backward";
-    p->inputs.push_back(ograds[0]);
-    p->inputs.push_back(n->inputs[1]);
-    p->control_deps.emplace_back(n);
-    auto zero = MakeNode("zeros_like", n->attrs.name + "_backward_indices",
-                         {n->inputs[1]}, nullptr, &n);
-    std::vector<nnvm::NodeEntry> ret;
-    ret.emplace_back(p);
-    ret.emplace_back(zero);
-    return ret;
-  })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.add_argument("data", "NDArray-or-Symbol", "data")
-.add_argument("indices", "NDArray-or-Symbol", "indices")
-.add_arguments(ScatterNDParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(2)
+    .set_attr_parser(ParamParser<ScatterNDParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ScatterNDShape)
+    .set_attr<nnvm::FInferType>("FInferType", ScatterNDType)
+    .set_attr<FCompute>("FCompute<cpu>", GatherNDBackward<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          auto p        = nnvm::Node::Create();
+          p->attrs.op   = nnvm::Op::Get("gather_nd");
+          p->attrs.name = n->attrs.name + "_backward";
+          p->inputs.push_back(ograds[0]);
+          p->inputs.push_back(n->inputs[1]);
+          p->control_deps.emplace_back(n);
+          auto zero = MakeNode(
+              "zeros_like", n->attrs.name + "_backward_indices", {n->inputs[1]}, nullptr, &n);
+          std::vector<nnvm::NodeEntry> ret;
+          ret.emplace_back(p);
+          ret.emplace_back(zero);
+          return ret;
+        })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .add_argument("data", "NDArray-or-Symbol", "data")
+    .add_argument("indices", "NDArray-or-Symbol", "indices")
+    .add_arguments(ScatterNDParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_scatter_set_nd)
-.add_alias("_npi_scatter_set_nd")
-.describe(R"code(This operator has the same functionality as scatter_nd
+    .add_alias("_npi_scatter_set_nd")
+    .describe(R"code(This operator has the same functionality as scatter_nd
 except that it does not reset the elements not indexed by the input
 index `NDArray` in the input data `NDArray`. output should be explicitly
 given and be the same as lhs.
@@ -1027,60 +1103,60 @@ Examples::
   out = [[0, 1], [2, 3]]
 
 )code")
-.set_num_outputs(1)
-.set_num_inputs(3)
-.set_attr_parser(ParamParser<ScatterNDParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape",
-  [](const nnvm::NodeAttrs& attrs,
-     mxnet::ShapeVector *in_attrs,
-     mxnet::ShapeVector *out_attrs) {
-    CHECK_EQ(in_attrs->size(), 3U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
-    SHAPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
-    mxnet::ShapeVector tmp_in_attrs = {in_attrs->at(1), in_attrs->at(2)};
-    if (!ScatterNDShape(attrs, &tmp_in_attrs, out_attrs)) {
-      return false;
-    }
-    SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_in_attrs[0]);
-    SHAPE_ASSIGN_CHECK(*in_attrs, 2, tmp_in_attrs[1]);
-    SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
-    return true;
-  })
-.set_attr<nnvm::FInferType>("FInferType",
-  [](const nnvm::NodeAttrs& attrs,
-     std::vector<int> *in_attrs,
-     std::vector<int> *out_attrs) {
-    CHECK_EQ(in_attrs->size(), 3U);
-    CHECK_EQ(out_attrs->size(), 1U);
-    TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
-    TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
-    std::vector<int> tmp_in_attrs = {in_attrs->at(1), in_attrs->at(2)};
-    if (!ScatterNDType(attrs, &tmp_in_attrs, out_attrs)) {
-      return false;
-    }
-    TYPE_ASSIGN_CHECK(*in_attrs, 1, tmp_in_attrs[0]);
-    TYPE_ASSIGN_CHECK(*in_attrs, 2, tmp_in_attrs[1]);
-    TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
-    return true;
-  })
-.set_attr<FCompute>("FCompute<cpu>", ScatterSetNDForward<cpu>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.add_argument("lhs", "NDArray-or-Symbol", "source input")
-.add_argument("rhs", "NDArray-or-Symbol", "value to assign")
-.add_argument("indices", "NDArray-or-Symbol", "indices")
-.add_arguments(ScatterNDParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(3)
+    .set_attr_parser(ParamParser<ScatterNDParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>(
+        "FInferShape",
+        [](const nnvm::NodeAttrs& attrs,
+           mxnet::ShapeVector* in_attrs,
+           mxnet::ShapeVector* out_attrs) {
+          CHECK_EQ(in_attrs->size(), 3U);
+          CHECK_EQ(out_attrs->size(), 1U);
+          SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
+          SHAPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
+          mxnet::ShapeVector tmp_in_attrs = {in_attrs->at(1), in_attrs->at(2)};
+          if (!ScatterNDShape(attrs, &tmp_in_attrs, out_attrs)) {
+            return false;
+          }
+          SHAPE_ASSIGN_CHECK(*in_attrs, 1, tmp_in_attrs[0]);
+          SHAPE_ASSIGN_CHECK(*in_attrs, 2, tmp_in_attrs[1]);
+          SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
+          return true;
+        })
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_attrs, std::vector<int>* out_attrs) {
+          CHECK_EQ(in_attrs->size(), 3U);
+          CHECK_EQ(out_attrs->size(), 1U);
+          TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
+          TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
+          std::vector<int> tmp_in_attrs = {in_attrs->at(1), in_attrs->at(2)};
+          if (!ScatterNDType(attrs, &tmp_in_attrs, out_attrs)) {
+            return false;
+          }
+          TYPE_ASSIGN_CHECK(*in_attrs, 1, tmp_in_attrs[0]);
+          TYPE_ASSIGN_CHECK(*in_attrs, 2, tmp_in_attrs[1]);
+          TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
+          return true;
+        })
+    .set_attr<FCompute>("FCompute<cpu>", ScatterSetNDForward<cpu>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .add_argument("lhs", "NDArray-or-Symbol", "source input")
+    .add_argument("rhs", "NDArray-or-Symbol", "value to assign")
+    .add_argument("indices", "NDArray-or-Symbol", "indices")
+    .add_arguments(ScatterNDParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/indexing_op.cu b/src/operator/tensor/indexing_op.cu
index f7fdfc2d9774..a47479d78aa4 100644
--- a/src/operator/tensor/indexing_op.cu
+++ b/src/operator/tensor/indexing_op.cu
@@ -22,7 +22,7 @@
  * \file indexing_op.cu
  * \brief GPU implementation of indexing operator
  * \author Siyi Li, Chi Zhang
-*/
+ */
 
 #include "./indexing_op.h"
 #include "./util/tensor_util-inl.cuh"
@@ -34,16 +34,19 @@ namespace op {
 /*! \brief If there are out-of-bound indices, out will be assigned to 1.
  */
 struct is_valid_check {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, char* out, const DType* data,
-                                  const DType min, const DType max) {
-    if (data[i] < min || data[i] > max) *out = 1;
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  char* out,
+                                  const DType* data,
+                                  const DType min,
+                                  const DType max) {
+    if (data[i] < min || data[i] > max)
+      *out = 1;
   }
 };
 
-
 struct AddTakeGradRspGPUKernel {
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   __device__ __forceinline__ static void Map(int tid,
                                              DType* out,
                                              const nnvm::dim_t* prefix_sum,
@@ -51,12 +54,12 @@ struct AddTakeGradRspGPUKernel {
                                              const DType* ograd,
                                              const nnvm::dim_t row_length) {
     using nnvm::dim_t;
-    const dim_t data_i = tid / row_length;
-    const dim_t grad_i = tid % row_length;
-    const dim_t irow = static_cast<dim_t>(data[data_i]);
+    const dim_t data_i  = tid / row_length;
+    const dim_t grad_i  = tid % row_length;
+    const dim_t irow    = static_cast<dim_t>(data[data_i]);
     const dim_t rsp_row = prefix_sum[irow] - 1;
-    const DType val = ograd[data_i * row_length + grad_i];
-    atomicAdd(static_cast<DType *>(&(out[rsp_row*row_length+grad_i])), val);
+    const DType val     = ograd[data_i * row_length + grad_i];
+    atomicAdd(static_cast<DType*>(&(out[rsp_row * row_length + grad_i])), val);
   }
 };
 
@@ -72,9 +75,9 @@ struct AddTakeGradRspGPUKernel {
  * \param num_threads_per_row the number of threads to process a row together
  * \param SZ the number of features a thread is responsible for
  */
-template<int SZ>
+template <int SZ>
 struct AddTakeGradRspDeterministicKernel {
-  template<typename DType>
+  template <typename DType>
   __device__ __forceinline__ static void Map(int thread_id,
                                              DType* out,
                                              const nnvm::dim_t* lookup_table,
@@ -85,23 +88,23 @@ struct AddTakeGradRspDeterministicKernel {
                                              const nnvm::dim_t row_length,
                                              const nnvm::dim_t num_threads_per_row) {
     using nnvm::dim_t;
-    int tid = thread_id / num_threads_per_row;
+    int tid                 = thread_id / num_threads_per_row;
     const int feature_start = thread_id % num_threads_per_row * SZ;
-    int num_features = SZ;
+    int num_features        = SZ;
     if (feature_start + num_features > row_length) {
       num_features = row_length - feature_start;
     }
     if (tid == 0 || sorted_data[tid - 1] != sorted_data[tid]) {
       DType acc[SZ];
-      #pragma unroll
+#pragma unroll
       for (int i = 0; i < SZ; i++) {
         acc[i] = 0;
       }
-      const dim_t data = sorted_data[tid];
-      const dim_t row_id = lookup_table[data];
+      const dim_t data       = sorted_data[tid];
+      const dim_t row_id     = lookup_table[data];
       const dim_t out_offset = row_id * row_length + feature_start;
       do {
-        const dim_t idx = original_idx[tid];
+        const dim_t idx          = original_idx[tid];
         const dim_t ograd_offset = idx * row_length + feature_start;
         for (int i = 0; i < num_features; i++) {
           acc[i] += ograd[ograd_offset + i];
@@ -115,20 +118,26 @@ struct AddTakeGradRspDeterministicKernel {
   }
 };
 
-template<bool clip = true>
+template <bool clip = true>
 struct TakeZeroAxisGPU {
   // assume that idx have been flattened to a 1-D tensor (N,)
   // assume that out_data and in_data have been flattened to 2-D tensors, (N, M) and (K, M)
   // M is the number of columns of in_data and out_data
   // K is the number of rows of in_data
   // i is the index of out_data
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, const DType* in_data,
-                                  const IType* idx, const int64_t M, const int64_t K) {
-    int64_t j = static_cast<int64_t>(idx[i/M]);
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const int64_t M,
+                                  const int64_t K) {
+    int64_t j = static_cast<int64_t>(idx[i / M]);
     if (clip) {
-      if (j <= 0) j = 0;
-      else if (j >= K) j = K - 1;
+      if (j <= 0)
+        j = 0;
+      else if (j >= K)
+        j = K - 1;
     } else {
       j = j % K;
       j += (j < 0) ? K : 0;
@@ -146,21 +155,28 @@ struct TakeZeroAxisGPU {
  * \param max the expected max value for indices
  * \param is_valid_ptr the temparary workspace
  */
-template<typename DType>
-bool CheckIndexOutOfBound(mshadow::Stream<gpu> *s, const DType* data_ptr, size_t data_size,
-                          const DType min, const DType max, char* is_valid_ptr) {
+template <typename DType>
+bool CheckIndexOutOfBound(mshadow::Stream<gpu>* s,
+                          const DType* data_ptr,
+                          size_t data_size,
+                          const DType min,
+                          const DType max,
+                          char* is_valid_ptr) {
   using namespace mxnet_op;
   int32_t is_valid = 0;
   Kernel<set_zero, gpu>::Launch(s, 1, is_valid_ptr);
   Kernel<is_valid_check, gpu>::Launch(s, data_size, is_valid_ptr, data_ptr, min, max);
-  CUDA_CALL(cudaMemcpyAsync(&is_valid, is_valid_ptr, sizeof(char),
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaMemcpyAsync(&is_valid,
+                            is_valid_ptr,
+                            sizeof(char),
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
   CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
   return is_valid == 0;
 }
 
 // Embedding forward implementation with dense weight
-template<>
+template <>
 void EmbeddingOpForwardDnsImpl<gpu>(mshadow::Stream<gpu>* s,
                                     const TBlob& data,
                                     const TBlob& weight,
@@ -172,24 +188,25 @@ void EmbeddingOpForwardDnsImpl<gpu>(mshadow::Stream<gpu>* s,
 
   MSHADOW_TYPE_SWITCH(output.type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(data.type_flag_, IType, {
-      Tensor<gpu, 1, IType> idx = data.get_with_shape<gpu, 1, IType>(
-        Shape1(ishape.ProdShape(0, ishape.ndim())), s);
+      Tensor<gpu, 1, IType> idx =
+          data.get_with_shape<gpu, 1, IType>(Shape1(ishape.ProdShape(0, ishape.ndim())), s);
       Tensor<gpu, 2, DType> wmat = weight.get<gpu, 2, DType>(s);
-      Tensor<gpu, 2, DType> out = output.get_with_shape<gpu, 2, DType>(
-        Shape2(oshape.ProdShape(0, oshape.ndim()-1), oshape[oshape.ndim()-1]), s);
-      Kernel<TakeZeroAxisGPU<true>, gpu>::Launch(s, oshape.Size(), out.dptr_, wmat.dptr_,
-                                                 idx.dptr_, wmat.shape_[1], wmat.shape_[0]);
+      Tensor<gpu, 2, DType> out  = output.get_with_shape<gpu, 2, DType>(
+          Shape2(oshape.ProdShape(0, oshape.ndim() - 1), oshape[oshape.ndim() - 1]), s);
+      Kernel<TakeZeroAxisGPU<true>, gpu>::Launch(
+          s, oshape.Size(), out.dptr_, wmat.dptr_, idx.dptr_, wmat.shape_[1], wmat.shape_[0]);
     });
   });
 }
 
-template<>
+template <>
 void SparseEmbeddingOpForwardRspImpl<gpu>(const OpContext& ctx,
                                           const TBlob& data,
                                           const NDArray& weight,
                                           const OpReqType req,
                                           const TBlob& output) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   using namespace rowsparse;
   using namespace mxnet_op;
   mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
@@ -197,20 +214,19 @@ void SparseEmbeddingOpForwardRspImpl<gpu>(const OpContext& ctx,
   if (req == kWriteTo && !weight.storage_initialized()) {
     size_t out_size = output.shape_.Size();
     MSHADOW_TYPE_SWITCH(output.type_flag_, DType, {
-      Fill<false>(s, TBlob(output.dptr<DType>(), mshadow::Shape1(out_size),
-          gpu::kDevMask), kWriteTo, 0);
+      Fill<false>(
+          s, TBlob(output.dptr<DType>(), mshadow::Shape1(out_size), gpu::kDevMask), kWriteTo, 0);
     })
     return;
   }
   // check out-of-bound indices
   MSHADOW_TYPE_SWITCH(data.type_flag_, DType, {
-    DType min = 0;
-    DType max = static_cast<DType>(weight.shape()[0] - 1);
-    DType* data_ptr = data.dptr<DType>();
-    size_t data_size = data.shape_.Size();
-    Tensor<gpu, 1, char> workspace = ctx.requested[0]
-        .get_space_typed<gpu, 1, char>(Shape1(1), s);
-    char* is_valid_ptr = reinterpret_cast<char*>(workspace.dptr_);
+    DType min                      = 0;
+    DType max                      = static_cast<DType>(weight.shape()[0] - 1);
+    DType* data_ptr                = data.dptr<DType>();
+    size_t data_size               = data.shape_.Size();
+    Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
+    char* is_valid_ptr             = reinterpret_cast<char*>(workspace.dptr_);
     bool is_valid = CheckIndexOutOfBound(s, data_ptr, data_size, min, max, is_valid_ptr);
     CHECK(is_valid) << "SparseEmbedding input contains data out of bound";
   })
@@ -222,7 +238,7 @@ void SparseEmbeddingOpForwardRspImpl<gpu>(const OpContext& ctx,
   }
 }
 
-template<typename IType, typename DType, typename RType>
+template <typename IType, typename DType, typename RType>
 void SparseEmbeddingDeterministicKernelLaunch(const OpContext& ctx,
                                               const TBlob& ograd,
                                               const TBlob& data,
@@ -233,51 +249,55 @@ void SparseEmbeddingDeterministicKernelLaunch(const OpContext& ctx,
   using namespace expr;
   using namespace rowsparse;
   using nnvm::dim_t;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  const dim_t num_rows = output.shape()[0];
-  const dim_t row_length = output.shape()[1];
-  const dim_t data_size = static_cast<dim_t>(data.shape_.Size());
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  const dim_t num_rows    = output.shape()[0];
+  const dim_t row_length  = output.shape()[1];
+  const dim_t data_size   = static_cast<dim_t>(data.shape_.Size());
   // temp resource declarations
   dim_t* lookup_table = nullptr;
-  void* temp_storage = nullptr;
-  dim_t* sorted_data = nullptr;
+  void* temp_storage  = nullptr;
+  dim_t* sorted_data  = nullptr;
   dim_t* original_idx = nullptr;
   // calculate number of bytes for temp resources
-  size_t lookup_table_bytes = num_rows * sizeof(dim_t);
-  size_t sorted_data_storage_bytes = data_size * sizeof(dim_t);
+  size_t lookup_table_bytes         = num_rows * sizeof(dim_t);
+  size_t sorted_data_storage_bytes  = data_size * sizeof(dim_t);
   size_t original_idx_storage_bytes = data_size * sizeof(dim_t);
-  size_t sort_workspace_size = SortByKeyWorkspaceSize<dim_t, dim_t, gpu>(data_size);
-  size_t unique_workspace_bytes = 0;
+  size_t sort_workspace_size        = SortByKeyWorkspaceSize<dim_t, dim_t, gpu>(data_size);
+  size_t unique_workspace_bytes     = 0;
   // estimate unique temp space
-  IType* data_ptr = data.dptr<IType>();
-  size_t *null_ptr = nullptr;
+  IType* data_ptr  = data.dptr<IType>();
+  size_t* null_ptr = nullptr;
   // unique operations will be applied on sorted data
-  cub::DeviceSelect::Unique(nullptr, unique_workspace_bytes, sorted_data, sorted_data,
-    null_ptr, data_size, Stream<gpu>::GetStream(s));
+  cub::DeviceSelect::Unique(nullptr,
+                            unique_workspace_bytes,
+                            sorted_data,
+                            sorted_data,
+                            null_ptr,
+                            data_size,
+                            Stream<gpu>::GetStream(s));
   // One more space reserved for unique count
-  size_t temp_workspace_bytes = std::max(unique_workspace_bytes,
-                                         sort_workspace_size);
-  size_t total_storage_bytes = lookup_table_bytes + sorted_data_storage_bytes +
+  size_t temp_workspace_bytes = std::max(unique_workspace_bytes, sort_workspace_size);
+  size_t total_storage_bytes  = lookup_table_bytes + sorted_data_storage_bytes +
                                original_idx_storage_bytes + temp_workspace_bytes;
 
   // request resource and split it. layout is:
   // lookup_table, sorted_data, original_idx, temp_storage
-  Tensor<gpu, 1, char> workspace = ctx.requested[0]
-      .get_space_typed<gpu, 1, char>(Shape1(total_storage_bytes), s);
+  Tensor<gpu, 1, char> workspace =
+      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(total_storage_bytes), s);
   lookup_table = reinterpret_cast<dim_t*>(workspace.dptr_);
-  sorted_data = reinterpret_cast<dim_t*>(workspace.dptr_ + lookup_table_bytes);
-  original_idx = reinterpret_cast<dim_t*>(workspace.dptr_ + lookup_table_bytes +
-                                          sorted_data_storage_bytes);
+  sorted_data  = reinterpret_cast<dim_t*>(workspace.dptr_ + lookup_table_bytes);
+  original_idx =
+      reinterpret_cast<dim_t*>(workspace.dptr_ + lookup_table_bytes + sorted_data_storage_bytes);
   temp_storage = workspace.dptr_ + total_storage_bytes - temp_workspace_bytes;
 
   // check out-of-bound indices
   {
-    IType min = 0;
-    IType max = static_cast<IType>(output.shape()[0] - 1);
-    IType* data_ptr = data.dptr<IType>();
+    IType min        = 0;
+    IType max        = static_cast<IType>(output.shape()[0] - 1);
+    IType* data_ptr  = data.dptr<IType>();
     size_t data_size = data.shape_.Size();
-    bool is_valid = CheckIndexOutOfBound(s, data_ptr, data_size, min, max,
-                                         reinterpret_cast<char*>(temp_storage));
+    bool is_valid    = CheckIndexOutOfBound(
+        s, data_ptr, data_size, min, max, reinterpret_cast<char*>(temp_storage));
     CHECK(is_valid) << "Embedding input contains data out of bound";
   }
 
@@ -288,27 +308,33 @@ void SparseEmbeddingDeterministicKernelLaunch(const OpContext& ctx,
 
   // generate original idx
   Tensor<gpu, 1, dim_t> original_idx_tensor(original_idx, Shape1(data_size), s);
-  Kernel<range_fwd, gpu>::Launch(s, data_size, 1, static_cast<dim_t>(0),
-                                 static_cast<dim_t>(1), kWriteTo, original_idx);
+  Kernel<range_fwd, gpu>::Launch(
+      s, data_size, 1, static_cast<dim_t>(0), static_cast<dim_t>(1), kWriteTo, original_idx);
   // sort data with its original idx
-  int num_bits = common::ilog2ui(num_rows - 1);
+  int num_bits           = common::ilog2ui(num_rows - 1);
   char* temp_storage_ptr = reinterpret_cast<char*>(temp_storage);
-  Tensor<gpu, 1, char> temp_storage_tensor(temp_storage_ptr,
-                                           Shape1(sort_workspace_size), s);
-  SortByKey(sorted_data_tensor, original_idx_tensor, true,
-            &temp_storage_tensor, 0, num_bits);
+  Tensor<gpu, 1, char> temp_storage_tensor(temp_storage_ptr, Shape1(sort_workspace_size), s);
+  SortByKey(sorted_data_tensor, original_idx_tensor, true, &temp_storage_tensor, 0, num_bits);
 
   // compute unique row ids based on sorted values.
   output.CheckAndAllocAuxData(kIdx, Shape1(data_size + 1));
 
   // fill row_idx array of output matrix, using the row_flg values
   RType* grad_row_idx = output.aux_data(kIdx).dptr<RType>();
-  cub::DeviceSelect::Unique(temp_storage_ptr, unique_workspace_bytes, sorted_data,
-      grad_row_idx, grad_row_idx + data_size, data_size, Stream<gpu>::GetStream(s));
+  cub::DeviceSelect::Unique(temp_storage_ptr,
+                            unique_workspace_bytes,
+                            sorted_data,
+                            grad_row_idx,
+                            grad_row_idx + data_size,
+                            data_size,
+                            Stream<gpu>::GetStream(s));
 
   dim_t nnr = 0;
-  CUDA_CALL(cudaMemcpyAsync(&nnr, grad_row_idx + data_size, sizeof(RType),
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaMemcpyAsync(&nnr,
+                            grad_row_idx + data_size,
+                            sizeof(RType),
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
   CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
   CHECK_EQ(output.shape().ndim(), 2) << "Unexcepted ndim";
   output.CheckAndAllocData(Shape2(nnr, output.shape()[1]));
@@ -319,13 +345,19 @@ void SparseEmbeddingDeterministicKernelLaunch(const OpContext& ctx,
 
   // accumulate gradients
   DType* grad_data = output.data().dptr<DType>();
-  Fill<false>(s, TBlob(grad_data, Shape1(nnr * row_length), gpu::kDevMask),
-              kWriteTo, 0);
-  const int SZ = 4;
+  Fill<false>(s, TBlob(grad_data, Shape1(nnr * row_length), gpu::kDevMask), kWriteTo, 0);
+  const int SZ                          = 4;
   const nnvm::dim_t num_threads_per_row = (row_length + SZ - 1) / SZ;
-  Kernel<AddTakeGradRspDeterministicKernel<SZ>, gpu>::Launch(s, data_size * num_threads_per_row,
-                     grad_data, lookup_table, sorted_data, data_size, original_idx,
-                     ograd.dptr<DType>(), row_length, num_threads_per_row);
+  Kernel<AddTakeGradRspDeterministicKernel<SZ>, gpu>::Launch(s,
+                                                             data_size * num_threads_per_row,
+                                                             grad_data,
+                                                             lookup_table,
+                                                             sorted_data,
+                                                             data_size,
+                                                             original_idx,
+                                                             ograd.dptr<DType>(),
+                                                             row_length,
+                                                             num_threads_per_row);
 }
 
 inline void SparseEmbeddingOpBackwardDeterministicRspImpl(const OpContext& ctx,
@@ -334,12 +366,13 @@ inline void SparseEmbeddingOpBackwardDeterministicRspImpl(const OpContext& ctx,
                                                           const OpReqType req,
                                                           const NDArray& output) {
   using nnvm::dim_t;
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteTo) << "SparseEmbedding layer doesn't support "
                           << "weight gradient calculation with req != write";
 
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
-  const dim_t data_size = static_cast<dim_t>(data.shape_.Size());
+  mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
+  const dim_t data_size   = static_cast<dim_t>(data.shape_.Size());
   if (data_size == 0) {
     FillZerosRspImpl(s, output);
     return;
@@ -348,15 +381,14 @@ inline void SparseEmbeddingOpBackwardDeterministicRspImpl(const OpContext& ctx,
   MSHADOW_TYPE_SWITCH(data.type_flag_, IType, {
     MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {
       MSHADOW_IDX_TYPE_SWITCH(output.aux_type(rowsparse::kIdx), RType, {
-        SparseEmbeddingDeterministicKernelLaunch<IType, DType, RType>(ctx, ograd, data,
-                                                                      req, output);
+        SparseEmbeddingDeterministicKernelLaunch<IType, DType, RType>(
+            ctx, ograd, data, req, output);
       });
     });
   });
 }
 
-
-template<>
+template <>
 inline void SparseEmbeddingOpBackwardRspImpl<gpu>(const bool deterministic,
                                                   const OpContext& ctx,
                                                   const TBlob& ograd,
@@ -372,22 +404,23 @@ inline void SparseEmbeddingOpBackwardRspImpl<gpu>(const bool deterministic,
   using namespace mshadow::expr;
   using namespace rowsparse;
   using nnvm::dim_t;
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteTo) << "SparseEmbedding layer doesn't support "
                           << "weight gradient calculation with req != write";
 
   // Request temporary storage for marking non-zero rows and prefix sum
-  Stream<gpu> *s = ctx.get_stream<gpu>();
-  dim_t num_rows = output.shape()[0];
+  Stream<gpu>* s   = ctx.get_stream<gpu>();
+  dim_t num_rows   = output.shape()[0];
   dim_t row_length = output.shape()[1];
-  dim_t data_size = static_cast<dim_t>(data.shape_.Size());
+  dim_t data_size  = static_cast<dim_t>(data.shape_.Size());
   dim_t num_threads;
 
   MSHADOW_TYPE_SWITCH(data.type_flag_, IType, {
     MSHADOW_SGL_DBL_TYPE_SWITCH(ograd.type_flag_, DType, {
       MSHADOW_IDX_TYPE_SWITCH(output.aux_type(kIdx), RType, {
-        dim_t* prefix_sum = nullptr;
-        void* d_temp_storage = nullptr;
+        dim_t* prefix_sum         = nullptr;
+        void* d_temp_storage      = nullptr;
         size_t temp_storage_bytes = 0;
         cub::DeviceScan::InclusiveSum(d_temp_storage,
                                       temp_storage_bytes,
@@ -395,12 +428,11 @@ inline void SparseEmbeddingOpBackwardRspImpl<gpu>(const bool deterministic,
                                       prefix_sum,
                                       num_rows,
                                       Stream<gpu>::GetStream(s));
-        Tensor<gpu, 1, char> workspace = ctx.requested[0]
-            .get_space_typed<gpu, 1, char>(Shape1(num_rows * sizeof(dim_t) +
-                                           temp_storage_bytes), s);
-        prefix_sum = reinterpret_cast<dim_t*>(workspace.dptr_);
-        d_temp_storage = workspace.dptr_ + num_rows*sizeof(dim_t);
-        num_threads = num_rows;
+        Tensor<gpu, 1, char> workspace = ctx.requested[0].get_space_typed<gpu, 1, char>(
+            Shape1(num_rows * sizeof(dim_t) + temp_storage_bytes), s);
+        prefix_sum     = reinterpret_cast<dim_t*>(workspace.dptr_);
+        d_temp_storage = workspace.dptr_ + num_rows * sizeof(dim_t);
+        num_threads    = num_rows;
         Fill<false>(s, TBlob(prefix_sum, Shape1(num_threads), gpu::kDevMask), kWriteTo, 0);
         Kernel<MarkRowFlgKernel, gpu>::Launch(s, data_size, prefix_sum, data.dptr<IType>());
 
@@ -411,8 +443,11 @@ inline void SparseEmbeddingOpBackwardRspImpl<gpu>(const bool deterministic,
                                       num_rows,
                                       mshadow::Stream<gpu>::GetStream(s));
         dim_t nnr = 0;
-        CUDA_CALL(cudaMemcpyAsync(&nnr, &prefix_sum[num_rows-1], sizeof(dim_t),
-                                  cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+        CUDA_CALL(cudaMemcpyAsync(&nnr,
+                                  &prefix_sum[num_rows - 1],
+                                  sizeof(dim_t),
+                                  cudaMemcpyDeviceToHost,
+                                  mshadow::Stream<gpu>::GetStream(s)));
         CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
         if (nnr == 0) {
           FillZerosRspImpl(s, output);
@@ -421,16 +456,19 @@ inline void SparseEmbeddingOpBackwardRspImpl<gpu>(const bool deterministic,
         output.CheckAndAlloc({Shape1(nnr)});
         RType* grad_row_idx = output.aux_data(kIdx).dptr<RType>();
         // fill row_idx array of output matrix, using the row_flg values
-        Kernel<FillRspRowIdxKernel, gpu>::Launch(s, num_rows,
-            grad_row_idx, prefix_sum, num_rows);
+        Kernel<FillRspRowIdxKernel, gpu>::Launch(s, num_rows, grad_row_idx, prefix_sum, num_rows);
         // prefill with zeros
         DType* grad_data = output.data().dptr<DType>();
-        Fill<false>(s, TBlob(grad_data, Shape1(nnr * row_length), gpu::kDevMask),
-            kWriteTo, 0);
+        Fill<false>(s, TBlob(grad_data, Shape1(nnr * row_length), gpu::kDevMask), kWriteTo, 0);
         // add the final gradients
         num_threads = row_length * data_size;
-        Kernel<AddTakeGradRspGPUKernel, gpu>::Launch(s, num_threads, grad_data, prefix_sum,
-            data.dptr<IType>(), ograd.dptr<DType>(), row_length);
+        Kernel<AddTakeGradRspGPUKernel, gpu>::Launch(s,
+                                                     num_threads,
+                                                     grad_data,
+                                                     prefix_sum,
+                                                     data.dptr<IType>(),
+                                                     ograd.dptr<DType>(),
+                                                     row_length);
       });
     });
   });
@@ -445,21 +483,28 @@ inline void SparseEmbeddingOpBackwardRspImpl<gpu>(const bool deterministic,
  * \param mshape the array that stores shape for each dimension
  * \param is_valid_dim_ptr the temparary workspace that contains out-of-bound indices
  */
-template<typename DType>
-void GatherNDCheckBoundGPU(mshadow::Stream<gpu> *s, const DType* idx_ptr, index_t N,
-                          index_t M, const mshadow::Shape<10> mshape, DType* is_valid_dim_ptr) {
+template <typename DType>
+void GatherNDCheckBoundGPU(mshadow::Stream<gpu>* s,
+                           const DType* idx_ptr,
+                           index_t N,
+                           index_t M,
+                           const mshadow::Shape<10> mshape,
+                           DType* is_valid_dim_ptr) {
   using namespace mxnet_op;
   Kernel<set_zero, gpu>::Launch(s, M, is_valid_dim_ptr);
   Kernel<is_valid_check_gather_nd, gpu>::Launch(s, M, is_valid_dim_ptr, idx_ptr, N, mshape);
 
   std::vector<DType> is_valid_dim(M);
-  CUDA_CALL(cudaMemcpyAsync(is_valid_dim.data(), is_valid_dim_ptr, sizeof(DType)*M,
-                            cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+  CUDA_CALL(cudaMemcpyAsync(is_valid_dim.data(),
+                            is_valid_dim_ptr,
+                            sizeof(DType) * M,
+                            cudaMemcpyDeviceToHost,
+                            mshadow::Stream<gpu>::GetStream(s)));
   CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
   for (int m = 0; m < M; m++) {
-    if (is_valid_dim[m] > mshape[m] - 1 || is_valid_dim[m] < - mshape[m]) {
-      LOG(FATAL)<< "IndexError: index " << is_valid_dim[m] << " is out of bounds for axis "
-        << m << " with size " << mshape[m];
+    if (is_valid_dim[m] > mshape[m] - 1 || is_valid_dim[m] < -mshape[m]) {
+      LOG(FATAL) << "IndexError: index " << is_valid_dim[m] << " is out of bounds for axis " << m
+                 << " with size " << mshape[m];
     }
   }
 }
@@ -473,43 +518,56 @@ void GatherNDForwardGPU(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<gpu> *s = ctx.get_stream<gpu>();
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<gpu>* s     = ctx.get_stream<gpu>();
   const mxnet::TShape& dshape = inputs[0].shape_;
   const mxnet::TShape& ishape = inputs[1].shape_;
-  int M = ishape[0];
-  int N = ishape.Size() / M;
-  int K = dshape.ProdShape(M, dshape.ndim());
+  int M                       = ishape[0];
+  int N                       = ishape.Size() / M;
+  int K                       = dshape.ProdShape(M, dshape.ndim());
   mshadow::Shape<10> strides;
   mshadow::Shape<10> mshape;
-  for (int i = M-1, stride = K; i >= 0; stride *= dshape[i], --i) {
+  for (int i = M - 1, stride = K; i >= 0; stride *= dshape[i], --i) {
     strides[i] = stride;
-    mshape[i] = dshape[i];
+    mshape[i]  = dshape[i];
   }
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {  // output data type switch
-    MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // indices data type switch
+    MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {          // indices data type switch
       // check whether indices are out of bound
       IType* idx_ptr = inputs[1].dptr<IType>();
       Tensor<gpu, 1, IType> workspace =
-        ctx.requested[0].get_space_typed<gpu, 1, IType>(Shape1(M), s);
+          ctx.requested[0].get_space_typed<gpu, 1, IType>(Shape1(M), s);
       IType* is_valid_dim_ptr = reinterpret_cast<IType*>(workspace.dptr_);
       GatherNDCheckBoundGPU(s, idx_ptr, N, M, mshape, is_valid_dim_ptr);
-      Kernel<gather_nd, gpu>::Launch(
-        s, N, req[0], N, M, K, strides, mshape, outputs[0].dptr<DType>(),
-        inputs[0].dptr<DType>(), inputs[1].dptr<IType>());
+      Kernel<gather_nd, gpu>::Launch(s,
+                                     N,
+                                     req[0],
+                                     N,
+                                     M,
+                                     K,
+                                     strides,
+                                     mshape,
+                                     outputs[0].dptr<DType>(),
+                                     inputs[0].dptr<DType>(),
+                                     inputs[1].dptr<IType>());
     });
   });
 }
 
 struct backward_gather_nd_gpu {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t N, index_t M, index_t K,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t N,
+                                  index_t M,
+                                  index_t K,
                                   const mshadow::Shape<10> strides,
-                                  DType* out, const DType* data,
+                                  DType* out,
+                                  const DType* data,
                                   const IType* indices) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<int>(indices[j*N + i]);
+      offset += strides[j] * static_cast<int>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
       atomicAdd(out + (offset + j), data[i * K + j]);
@@ -517,66 +575,73 @@ struct backward_gather_nd_gpu {
   }
 };
 
-template<typename DType, typename IType>
-inline void GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+template <typename DType, typename IType>
+inline void GatherNDBackwardImpl(index_t N,
+                                 index_t M,
+                                 index_t K,
                                  const mshadow::Shape<10> strides,
                                  DType* out,
                                  const DType* data,
                                  const IType* indices,
-                                 mshadow::Stream<gpu> *s) {
+                                 mshadow::Stream<gpu>* s) {
   mxnet_op::Kernel<backward_gather_nd_gpu, gpu>::Launch(s, N, N, M, K, strides, out, data, indices);
 }
 
-template<>
+template <>
 void TakeOpForward<gpu>(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
                         const std::vector<OpReqType>& req,
                         const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  if (req[take_::kOut] == kNullOp) return;
+  if (req[take_::kOut] == kNullOp)
+    return;
   const TakeParam& param = nnvm::get<TakeParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
 
   const mxnet::TShape& idxshape = inputs[take_::kIdx].shape_;
   const mxnet::TShape& arrshape = inputs[take_::kArr].shape_;
-  const mxnet::TShape& oshape = outputs[take_::kOut].shape_;
+  const mxnet::TShape& oshape   = outputs[take_::kOut].shape_;
 
   if (idxshape.Size() == 0) {
     return;
   }
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s        = ctx.get_stream<gpu>();
   const int actual_axis = param.axis + ((param.axis < 0) ? arrshape.ndim() : 0);
 
-  MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[take_::kOut].type_flag_, DType, {  // output data type
+  MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[take_::kOut].type_flag_, DType, {   // output data type
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[take_::kIdx].type_flag_, IType, {  // index data type
       if (param.mode == take_::kRaise) {
         // check out-of-bound indices
-        IType min = 0;
-        IType max = static_cast<IType>(arrshape[actual_axis] - 1);
-        IType* idx_ptr = inputs[take_::kIdx].dptr<IType>();
+        IType min       = 0;
+        IType max       = static_cast<IType>(arrshape[actual_axis] - 1);
+        IType* idx_ptr  = inputs[take_::kIdx].dptr<IType>();
         size_t idx_size = idxshape.Size();
         Tensor<gpu, 1, char> workspace =
-          ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
+            ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(1), s);
         char* is_valid_ptr = reinterpret_cast<char*>(workspace.dptr_);
-        bool is_valid = CheckIndexOutOfBound(s, idx_ptr, idx_size, min, max, is_valid_ptr);
+        bool is_valid      = CheckIndexOutOfBound(s, idx_ptr, idx_size, min, max, is_valid_ptr);
         CHECK(is_valid) << "Take indices contains indices out of bound";
       }
       if (actual_axis == 0) {
         if (param.mode == take_::kClip) {
-          Kernel<TakeZeroAxisGPU<true>, gpu>::Launch(s, oshape.Size(),
+          Kernel<TakeZeroAxisGPU<true>, gpu>::Launch(s,
+                                                     oshape.Size(),
                                                      outputs[take_::kOut].dptr<DType>(),
                                                      inputs[take_::kArr].dptr<DType>(),
                                                      inputs[take_::kIdx].dptr<IType>(),
-                                                     oshape.Size()/idxshape.Size(), arrshape[0]);
+                                                     oshape.Size() / idxshape.Size(),
+                                                     arrshape[0]);
         } else {
-          Kernel<TakeZeroAxisGPU<false>, gpu>::Launch(s, oshape.Size(),
+          Kernel<TakeZeroAxisGPU<false>, gpu>::Launch(s,
+                                                      oshape.Size(),
                                                       outputs[take_::kOut].dptr<DType>(),
                                                       inputs[take_::kArr].dptr<DType>(),
                                                       inputs[take_::kIdx].dptr<IType>(),
-                                                      oshape.Size()/idxshape.Size(), arrshape[0]);
+                                                      oshape.Size() / idxshape.Size(),
+                                                      arrshape[0]);
         }
       } else {
         mshadow::Shape<10> in_strides;
@@ -590,26 +655,32 @@ void TakeOpForward<gpu>(const nnvm::NodeAttrs& attrs,
           out_strides[i] = stride;
         }
         if (param.mode == take_::kClip) {
-          Kernel<TakeNonzeroAxis<true>, gpu>::Launch(s, oshape.Size(),
+          Kernel<TakeNonzeroAxis<true>, gpu>::Launch(s,
+                                                     oshape.Size(),
                                                      outputs[take_::kOut].dptr<DType>(),
                                                      inputs[take_::kArr].dptr<DType>(),
                                                      inputs[take_::kIdx].dptr<IType>(),
-                                                     out_strides[actual_axis-1],
-                                                     in_strides[actual_axis-1],
+                                                     out_strides[actual_axis - 1],
+                                                     in_strides[actual_axis - 1],
                                                      in_strides[actual_axis],
-                                                     arrshape.ndim(), oshape.ndim(),
-                                                     idxshape.ndim(), arrshape[actual_axis],
+                                                     arrshape.ndim(),
+                                                     oshape.ndim(),
+                                                     idxshape.ndim(),
+                                                     arrshape[actual_axis],
                                                      actual_axis);
         } else {
-          Kernel<TakeNonzeroAxis<false>, gpu>::Launch(s, oshape.Size(),
+          Kernel<TakeNonzeroAxis<false>, gpu>::Launch(s,
+                                                      oshape.Size(),
                                                       outputs[take_::kOut].dptr<DType>(),
                                                       inputs[take_::kArr].dptr<DType>(),
                                                       inputs[take_::kIdx].dptr<IType>(),
-                                                      out_strides[actual_axis-1],
-                                                      in_strides[actual_axis-1],
+                                                      out_strides[actual_axis - 1],
+                                                      in_strides[actual_axis - 1],
                                                       in_strides[actual_axis],
-                                                      arrshape.ndim(), oshape.ndim(),
-                                                      idxshape.ndim(), arrshape[actual_axis],
+                                                      arrshape.ndim(),
+                                                      oshape.ndim(),
+                                                      idxshape.ndim(),
+                                                      arrshape[actual_axis],
                                                       actual_axis);
         }
       }
@@ -618,30 +689,31 @@ void TakeOpForward<gpu>(const nnvm::NodeAttrs& attrs,
 }
 
 namespace {
-  /*
-  * \brief returns integer log2(a) rounded up
-  */
-  inline int ilog2(unsigned int a) {
-    int k = 1;
-    while (a >>= 1) k++;
-    return k;
-  }
+/*
+ * \brief returns integer log2(a) rounded up
+ */
+inline int ilog2(unsigned int a) {
+  int k = 1;
+  while (a >>= 1)
+    k++;
+  return k;
 }
+}  // namespace
 
 /*
- * \brief finds the lower and upper-bound positions of each unique element within a sorted input array
- * \param sorted_data input elements previously sorted
- * \param bounds output containing all lower-bound followed by all upper-bound positions
- * \param data_dim total number of elements in the input array
- * \param vocab_dim maximum number of unique elements
+ * \brief finds the lower and upper-bound positions of each unique element within a sorted input
+ * array \param sorted_data input elements previously sorted \param bounds output containing all
+ * lower-bound followed by all upper-bound positions \param data_dim total number of elements in the
+ * input array \param vocab_dim maximum number of unique elements
  */
 template <typename IType>
-__global__ void EmbeddingFindBounds(const IType *sorted_data,
-                                    IType *bounds,
+__global__ void EmbeddingFindBounds(const IType* sorted_data,
+                                    IType* bounds,
                                     const index_t data_dim,
                                     const index_t vocab_dim) {
   const index_t id = blockIdx.x * blockDim.x + threadIdx.x;
-  if (id >= vocab_dim) return;
+  if (id >= vocab_dim)
+    return;
 
   // Binary search to find lower bound: stored at bounds[0..vocab_dim-1]
   IType lower_bound = 0;
@@ -656,7 +728,7 @@ __global__ void EmbeddingFindBounds(const IType *sorted_data,
   }
   bool found_row = (sorted_data[lower_bound] == id);
   if (!found_row) {
-    bounds[id] = -1;
+    bounds[id]             = -1;
     bounds[vocab_dim + id] = -2;
     return;
   } else {
@@ -688,18 +760,18 @@ __global__ void EmbeddingFindBounds(const IType *sorted_data,
  * \param req write/add/null
  */
 template <typename AType, typename LType, typename DType, typename IType>
-__global__ void EmbeddingGradKernel(DType *grad_in,
-                                    const IType *original_index,
-                                    const IType *index_bounds,
-                                    const DType *grad_out,
+__global__ void EmbeddingGradKernel(DType* grad_in,
+                                    const IType* original_index,
+                                    const IType* index_bounds,
+                                    const DType* grad_out,
                                     const index_t embbedding_dim,
                                     const index_t vocab_dim,
                                     const int nelems_per_load,
                                     const int req) {
   extern __shared__ int sharedmem[];
-  AType* grad_in_row =  reinterpret_cast<AType *>(sharedmem);
-  const LType *aligned_grad_out = reinterpret_cast<const LType *>(grad_out);
-  LType *aligned_grad_in = reinterpret_cast<LType *>(grad_in);
+  AType* grad_in_row            = reinterpret_cast<AType*>(sharedmem);
+  const LType* aligned_grad_out = reinterpret_cast<const LType*>(grad_out);
+  LType* aligned_grad_in        = reinterpret_cast<LType*>(grad_in);
   const index_t aligned_emb_dim = embbedding_dim / nelems_per_load;
   LType load_value[1];
   DType* data_values = reinterpret_cast<DType*>(load_value);
@@ -709,9 +781,9 @@ __global__ void EmbeddingGradKernel(DType *grad_in,
     // Read lower and upper bounds for current row
     IType lower_bound = index_bounds[my_row];
     IType upper_bound = index_bounds[vocab_dim + my_row];
-    int nOccurrences = upper_bound - lower_bound + 1;
+    int nOccurrences  = upper_bound - lower_bound + 1;
 
-    for (index_t emb_id=threadIdx.x; emb_id < aligned_emb_dim; emb_id += blockDim.x) {
+    for (index_t emb_id = threadIdx.x; emb_id < aligned_emb_dim; emb_id += blockDim.x) {
       // Initialize grad_in
       if (req == kAddTo) {
         *load_value = aligned_grad_in[my_row * aligned_emb_dim + emb_id];
@@ -724,7 +796,7 @@ __global__ void EmbeddingGradKernel(DType *grad_in,
         }
       }
       // Add all rows from grad_out according to indices in data
-      for (index_t data_idx=lower_bound; data_idx < (lower_bound + nOccurrences); ++data_idx) {
+      for (index_t data_idx = lower_bound; data_idx < (lower_bound + nOccurrences); ++data_idx) {
         *load_value = aligned_grad_out[original_index[data_idx] * aligned_emb_dim + emb_id];
         for (index_t val_id = 0; val_id < nelems_per_load; val_id++) {
           grad_in_row[val_id * blockDim.x + threadIdx.x] += static_cast<AType>(data_values[val_id]);
@@ -739,52 +811,47 @@ __global__ void EmbeddingGradKernel(DType *grad_in,
   }
 }
 
-template<typename AType, typename IType, typename DType>
+template <typename AType, typename IType, typename DType>
 void EmbeddingGradKernelCaller(const OpContext& ctx,
                                mshadow::Tensor<gpu, 2, DType> grad_in,
                                const mshadow::Tensor<gpu, 1, IType>& index,
-                               const mshadow::Tensor<gpu, 2, DType> &grad_out,
+                               const mshadow::Tensor<gpu, 2, DType>& grad_out,
                                const std::vector<OpReqType>& req) {
   using namespace mxnet_op;
   using namespace mshadow::expr;
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
-  const index_t data_dim = index.shape_[0];
-  const index_t vocab_dim = grad_in.shape_[0];
+  Stream<gpu>* s               = ctx.get_stream<gpu>();
+  const index_t data_dim       = index.shape_[0];
+  const index_t vocab_dim      = grad_in.shape_[0];
   const index_t embbedding_dim = grad_in.shape_[1];
 
   // Calculate amount of temporary storage
-  size_t sort_workspace_size = mxnet::op::SortByKeyWorkspaceSize<int, int, gpu>
-    (data_dim);
-  size_t workspace_size = 2 * data_dim * sizeof(int) +
-      2 * vocab_dim * sizeof(int) + sort_workspace_size;
+  size_t sort_workspace_size = mxnet::op::SortByKeyWorkspaceSize<int, int, gpu>(data_dim);
+  size_t workspace_size =
+      2 * data_dim * sizeof(int) + 2 * vocab_dim * sizeof(int) + sort_workspace_size;
 
   // Request temporary storage
   Tensor<gpu, 1, char> workspace =
-    ctx.requested[embedding::kTempSpace].get_space_typed<gpu, 1, char>(
-      Shape1(workspace_size), s);
+      ctx.requested[embedding::kTempSpace].get_space_typed<gpu, 1, char>(Shape1(workspace_size), s);
 
   // Create tensors
   size_t pos = 0;
-  Tensor<gpu, 1, int> sorted_data(reinterpret_cast<int*>(&workspace[pos]),
-    Shape1(data_dim), s);
+  Tensor<gpu, 1, int> sorted_data(reinterpret_cast<int*>(&workspace[pos]), Shape1(data_dim), s);
   pos += data_dim * sizeof(int);
   // Reference to input data positions for each element of sorted_data
-  Tensor<gpu, 1, int> original_index(reinterpret_cast<int*>(&workspace[pos]),
-    Shape1(data_dim), s);
+  Tensor<gpu, 1, int> original_index(reinterpret_cast<int*>(&workspace[pos]), Shape1(data_dim), s);
   pos += data_dim * sizeof(int);
   // lower and upper bound positions of each index within sorted_data
-  Tensor<gpu, 1, int> bounds_index(reinterpret_cast<int*>(&workspace[pos]),
-    Shape1(2 * vocab_dim), s);
+  Tensor<gpu, 1, int> bounds_index(
+      reinterpret_cast<int*>(&workspace[pos]), Shape1(2 * vocab_dim), s);
   pos += 2 * vocab_dim * sizeof(int);
   Tensor<gpu, 1, char> Sort_temp_storage(&workspace[pos], Shape1(sort_workspace_size), s);
 
   // Clip indices [0, vocab_dim-1]
-  Kernel<tcast_clip, gpu>::Launch(s, data_dim, sorted_data.dptr_, index.dptr_,
-    static_cast<int>(vocab_dim));
+  Kernel<tcast_clip, gpu>::Launch(
+      s, data_dim, sorted_data.dptr_, index.dptr_, static_cast<int>(vocab_dim));
 
-  Kernel<range_fwd, gpu>::Launch(s, data_dim,
-    1, 0, 1, kWriteTo, original_index.dptr_);
+  Kernel<range_fwd, gpu>::Launch(s, data_dim, 1, 0, 1, kWriteTo, original_index.dptr_);
 
   // Sort indices array
   int num_bits = ilog2((vocab_dim - 1));
@@ -792,34 +859,37 @@ void EmbeddingGradKernelCaller(const OpContext& ctx,
 
   // Find lower & upper bounds of each possible index
   const int threads_block_bounds = 128;
-  const int nblocks_bounds = (vocab_dim + threads_block_bounds - 1) / threads_block_bounds;
+  const int nblocks_bounds       = (vocab_dim + threads_block_bounds - 1) / threads_block_bounds;
   EmbeddingFindBounds<<<nblocks_bounds, threads_block_bounds, 0, Stream<gpu>::GetStream(s)>>>(
-                  sorted_data.dptr_, bounds_index.dptr_, data_dim, vocab_dim);
+      sorted_data.dptr_, bounds_index.dptr_, data_dim, vocab_dim);
 
   // Compute Gradient
   int ltype = mxnet::common::cuda::get_load_type(embbedding_dim * sizeof(DType));
 
   MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
     CHECK_LE(sizeof(DType), sizeof(LType));
-    int nelems_per_load = sizeof(LType) / sizeof(DType);
+    int nelems_per_load    = sizeof(LType) / sizeof(DType);
     int threads_block_grad = 32;
-    int maxThreads = 1024;
-    while (threads_block_grad < (embbedding_dim/nelems_per_load) &&
-          (threads_block_grad < maxThreads))
+    int maxThreads         = 1024;
+    while (threads_block_grad < (embbedding_dim / nelems_per_load) &&
+           (threads_block_grad < maxThreads))
       threads_block_grad += 32;
     size_t required_shared = threads_block_grad * nelems_per_load * sizeof(AType);
     dim3 blocks(vocab_dim, 1);
-    EmbeddingGradKernel<AType, LType><<<blocks, threads_block_grad, required_shared,
-                  Stream<gpu>::GetStream(s)>>>(
-                  grad_in.dptr_, original_index.dptr_,
-                  bounds_index.dptr_, grad_out.dptr_,
-                  embbedding_dim, vocab_dim,
-                  nelems_per_load,
-                  req[embedding::kWeight]);
+    EmbeddingGradKernel<AType, LType>
+        <<<blocks, threads_block_grad, required_shared, Stream<gpu>::GetStream(s)>>>(
+            grad_in.dptr_,
+            original_index.dptr_,
+            bounds_index.dptr_,
+            grad_out.dptr_,
+            embbedding_dim,
+            vocab_dim,
+            nelems_per_load,
+            req[embedding::kWeight]);
   });
 }
 
-template<>
+template <>
 void EmbeddingOpBackward<gpu>(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<TBlob>& inputs,
@@ -830,7 +900,7 @@ void EmbeddingOpBackward<gpu>(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req[embedding::kData], kNullOp)
-          << "Embedding layer doesn't support calculate data gradient";
+      << "Embedding layer doesn't support calculate data gradient";
   if (req[embedding::kWeight] == kNullOp) {
     return;
   }
@@ -839,30 +909,31 @@ void EmbeddingOpBackward<gpu>(const nnvm::NodeAttrs& attrs,
   const mxnet::TShape& ishape = inputs[1].shape_;
   const mxnet::TShape& oshape = inputs[0].shape_;
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s = ctx.get_stream<gpu>();
 
   CHECK_NE(req[embedding::kWeight], kWriteInplace)
-    << "Backward of Embedding does not support writing in place.";
+      << "Backward of Embedding does not support writing in place.";
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && outputs[1].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for EmbeddingOpBackward "
-                    "with float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for EmbeddingOpBackward "
+        "with float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
   MXNET_REAL_ACC_TYPE_SWITCH(outputs[1].type_flag_, DType, AType, {
     MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {
-      Tensor < gpu, 1, IType > data = inputs[1].get_with_shape<gpu, 1, IType>(
-        Shape1(ishape.ProdShape(0, ishape.ndim())), s);
+      Tensor<gpu, 1, IType> data =
+          inputs[1].get_with_shape<gpu, 1, IType>(Shape1(ishape.ProdShape(0, ishape.ndim())), s);
       Tensor<gpu, 2, DType> grad_out = inputs[0].get_with_shape<gpu, 2, DType>(
-      Shape2(oshape.ProdShape(0, oshape.ndim()-1), oshape[oshape.ndim()-1]), s);
+          Shape2(oshape.ProdShape(0, oshape.ndim() - 1), oshape[oshape.ndim() - 1]), s);
       Tensor<gpu, 2, DType> grad_in = outputs[1].get<gpu, 2, DType>(s);
 
       if (req[embedding::kWeight] == kWriteTo || req[embedding::kWeight] == kAddTo) {
         if (safe_acc)
-            EmbeddingGradKernelCaller<AType>(ctx, grad_in, data, grad_out, req);
+          EmbeddingGradKernelCaller<AType>(ctx, grad_in, data, grad_out, req);
         else
-            EmbeddingGradKernelCaller<DType>(ctx, grad_in, data, grad_out, req);
+          EmbeddingGradKernelCaller<DType>(ctx, grad_in, data, grad_out, req);
       } else {
         LOG(FATAL) << "wrong req";
       }
@@ -870,35 +941,26 @@ void EmbeddingOpBackward<gpu>(const nnvm::NodeAttrs& attrs,
   });
 }
 
-NNVM_REGISTER_OP(Embedding)
-.set_attr<FCompute>("FCompute<gpu>", EmbeddingOpForward<gpu>);
+NNVM_REGISTER_OP(Embedding).set_attr<FCompute>("FCompute<gpu>", EmbeddingOpForward<gpu>);
 
 NNVM_REGISTER_OP(_backward_Embedding)
-.set_attr<FCompute>("FCompute<gpu>", EmbeddingOpBackward<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", EmbeddingOpBackwardEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", EmbeddingOpBackward<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", EmbeddingOpBackwardEx<gpu>);
 
-NNVM_REGISTER_OP(take)
-.set_attr<FCompute>("FCompute<gpu>", TakeOpForward<gpu>);
+NNVM_REGISTER_OP(take).set_attr<FCompute>("FCompute<gpu>", TakeOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_take)
-.set_attr<FCompute>("FCompute<gpu>", TakeOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_take).set_attr<FCompute>("FCompute<gpu>", TakeOpBackward<gpu>);
 
-NNVM_REGISTER_OP(batch_take)
-.set_attr<FCompute>("FCompute<gpu>", BatchTakeOpForward<gpu>);
+NNVM_REGISTER_OP(batch_take).set_attr<FCompute>("FCompute<gpu>", BatchTakeOpForward<gpu>);
 
-NNVM_REGISTER_OP(one_hot)
-.set_attr<FCompute>("FCompute<gpu>", OneHotOpForward<gpu>);
+NNVM_REGISTER_OP(one_hot).set_attr<FCompute>("FCompute<gpu>", OneHotOpForward<gpu>);
 
-NNVM_REGISTER_OP(gather_nd)
-.set_attr<FCompute>("FCompute<gpu>", GatherNDForwardGPU);
+NNVM_REGISTER_OP(gather_nd).set_attr<FCompute>("FCompute<gpu>", GatherNDForwardGPU);
 
-NNVM_REGISTER_OP(scatter_nd)
-.set_attr<FCompute>("FCompute<gpu>", ScatterNDForward<gpu>);
+NNVM_REGISTER_OP(scatter_nd).set_attr<FCompute>("FCompute<gpu>", ScatterNDForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_gather_nd)
-.set_attr<FCompute>("FCompute<gpu>", GatherNDBackward<gpu>);
+NNVM_REGISTER_OP(_backward_gather_nd).set_attr<FCompute>("FCompute<gpu>", GatherNDBackward<gpu>);
 
-NNVM_REGISTER_OP(_scatter_set_nd)
-.set_attr<FCompute>("FCompute<gpu>", ScatterSetNDForward<gpu>);
+NNVM_REGISTER_OP(_scatter_set_nd).set_attr<FCompute>("FCompute<gpu>", ScatterSetNDForward<gpu>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/indexing_op.h b/src/operator/tensor/indexing_op.h
index e0b1deb2d12d..e692d38c8b7e 100644
--- a/src/operator/tensor/indexing_op.h
+++ b/src/operator/tensor/indexing_op.h
@@ -22,7 +22,7 @@
  * \file indexing_op.h
  * \brief Function definition of indexing operator
  * \author Bing Xu, Siyi Li, Chi Zhang, Haibin Lin
-*/
+ */
 #ifndef MXNET_OPERATOR_TENSOR_INDEXING_OP_H_
 #define MXNET_OPERATOR_TENSOR_INDEXING_OP_H_
 
@@ -53,34 +53,35 @@ namespace mxnet {
 namespace op {
 
 namespace embedding {
-enum EmbeddingOpInputs {kData, kWeight};
-enum EmbeddingOpOutputs {kOut};
-enum EmbeddingOpResource {kTempSpace};
+enum EmbeddingOpInputs { kData, kWeight };
+enum EmbeddingOpOutputs { kOut };
+enum EmbeddingOpResource { kTempSpace };
 }  // namespace embedding
 
 namespace quantized_embedding {
-enum QuantizedEmbeddingOpInputs {kData, kWeight, kWeightMin, kWeightMax};
-enum QuantizedEmbeddingOpOutputs {kOut, kOutMin, kOutMax};
-enum QuantizedEmbeddingOpResource {kTempSpace};
+enum QuantizedEmbeddingOpInputs { kData, kWeight, kWeightMin, kWeightMax };
+enum QuantizedEmbeddingOpOutputs { kOut, kOutMin, kOutMax };
+enum QuantizedEmbeddingOpResource { kTempSpace };
 }  // namespace quantized_embedding
 
-
-struct EmbeddingParam: public dmlc::Parameter<EmbeddingParam> {
+struct EmbeddingParam : public dmlc::Parameter<EmbeddingParam> {
   index_t input_dim;
   index_t output_dim;
   int dtype;
   bool sparse_grad;
   DMLC_DECLARE_PARAMETER(EmbeddingParam) {
-    DMLC_DECLARE_FIELD(input_dim).set_lower_bound(1)
-    .describe("Vocabulary size of the input indices.");
-    DMLC_DECLARE_FIELD(output_dim).set_lower_bound(1)
-    .describe("Dimension of the embedding vectors.");
+    DMLC_DECLARE_FIELD(input_dim).set_lower_bound(1).describe(
+        "Vocabulary size of the input indices.");
+    DMLC_DECLARE_FIELD(output_dim)
+        .set_lower_bound(1)
+        .describe("Dimension of the embedding vectors.");
     DMLC_DECLARE_FIELD(dtype).set_default(mshadow::kFloat32)
-    MXNET_ADD_ALL_TYPES
-    .describe("Data type of weight.");
-    DMLC_DECLARE_FIELD(sparse_grad).set_default(false)
-    .describe("Compute row sparse gradient in the backward calculation. If set to True, "
-              "the grad's storage type is row_sparse.");
+        MXNET_ADD_ALL_TYPES.describe("Data type of weight.");
+    DMLC_DECLARE_FIELD(sparse_grad)
+        .set_default(false)
+        .describe(
+            "Compute row sparse gradient in the backward calculation. If set to True, "
+            "the grad's storage type is row_sparse.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream input_dim_s, output_dim_s, dtype_s, sparse_grad_s;
@@ -88,10 +89,10 @@ struct EmbeddingParam: public dmlc::Parameter<EmbeddingParam> {
     output_dim_s << output_dim;
     dtype_s << dtype;
     sparse_grad_s << sparse_grad;
-    (*dict)["input_dim"] = input_dim_s.str();
-    (*dict)["output_dim"] = output_dim_s.str();
+    (*dict)["input_dim"]   = input_dim_s.str();
+    (*dict)["output_dim"]  = output_dim_s.str();
     (*dict)["sparse_grad"] = sparse_grad_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]       = MXNetTypeWithBool2String(dtype);
   }
 };
 
@@ -123,29 +124,29 @@ AddTakeGradLargeBatchWorkspaceSize(size_t num_keys);
  * \param src source output
  * \param workspace (optional) temporary storage
  */
-template<typename IndexType, typename DType>
+template <typename IndexType, typename DType>
 inline void AddTakeGradLargeBatch(mshadow::Tensor<cpu, 2, DType> dst,
                                   const mshadow::Tensor<cpu, 1, IndexType>& sorted,
                                   const mshadow::Tensor<cpu, 1, IndexType>& index,
-                                  const mshadow::Tensor<cpu, 2, DType> &src,
+                                  const mshadow::Tensor<cpu, 2, DType>& src,
                                   mshadow::Tensor<cpu, 1, char>* workspace = nullptr) {
   for (index_t y = 0; y < sorted.size(0); ++y) {
     dst[sorted[y]] += src[index[y]];
   }
 }
-template<typename ParamType>
+template <typename ParamType>
 inline bool EmbeddingOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
-  const mxnet::TShape &dshape = (*in_attrs)[embedding::kData];
-  if (!ndim_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = (*in_attrs)[embedding::kData];
+  if (!ndim_is_known(dshape))
+    return false;
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
-  SHAPE_ASSIGN_CHECK(*in_attrs, embedding::kWeight, Shape2(param.input_dim,
-                                                           param.output_dim));
+  SHAPE_ASSIGN_CHECK(*in_attrs, embedding::kWeight, Shape2(param.input_dim, param.output_dim));
   out_attrs->clear();
 
-  mxnet::TShape oshape(dshape.ndim()+1, -1);
+  mxnet::TShape oshape(dshape.ndim() + 1, -1);
   for (int i = 0; i < dshape.ndim(); ++i) {
     oshape[i] = dshape[i];
   }
@@ -155,18 +156,18 @@ inline bool EmbeddingOpShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(oshape);
 }
 
-template<typename ParamType>
+template <typename ParamType>
 inline bool EmbeddingOpType(const nnvm::NodeAttrs& attrs,
-                            std::vector<int> *in_type,
-                            std::vector<int> *out_type) {
+                            std::vector<int>* in_type,
+                            std::vector<int>* out_type) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_type->size(), 2U);
   CHECK_GE(out_type->size(), 1U);
   int itype = (*in_type)[0];
   CHECK_NE(itype, -1) << "First input must have specified type";
-  int dtype_in = (*in_type)[1];
+  int dtype_in  = (*in_type)[1];
   int dtype_out = (*out_type)[0];
-  int dtype = param.dtype;
+  int dtype     = param.dtype;
   if (dtype_in != -1 && dtype_out != -1) {
     // Both types defined, make sure they are the same
     CHECK_EQ(dtype_in, dtype_out) << "Input and output weights must have same type";
@@ -175,7 +176,8 @@ inline bool EmbeddingOpType(const nnvm::NodeAttrs& attrs,
     // One of the types defined, choose the one that was defined
     dtype = (dtype_in != -1) ? dtype_in : dtype_out;
   }
-  if ((*in_type)[1] == -1) (*in_type)[1] = dtype;
+  if ((*in_type)[1] == -1)
+    (*in_type)[1] = dtype;
   out_type->clear();
   out_type->push_back(dtype);
   return true;
@@ -189,15 +191,15 @@ inline bool EmbeddingOpBackwardStorageType(const nnvm::NodeAttrs& attrs,
                                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 2U);
-  const bool sparse_grad = nnvm::get<EmbeddingParam>(attrs.parsed).sparse_grad;
+  const bool sparse_grad                = nnvm::get<EmbeddingParam>(attrs.parsed).sparse_grad;
   const NDArrayStorageType target_stype = sparse_grad ? kRowSparseStorage : kDefaultStorage;
   const auto target_mode = sparse_grad ? DispatchMode::kFComputeEx : DispatchMode::kFCompute;
 
-  const int ograd_stype = in_attrs->at(0);
-  const int data_stype = in_attrs->at(1);
-  int& data_grad_stype = out_attrs->at(0);
+  const int ograd_stype  = in_attrs->at(0);
+  const int data_stype   = in_attrs->at(1);
+  int& data_grad_stype   = out_attrs->at(0);
   int& weight_grad_stype = out_attrs->at(1);
-  bool dispatched = false;
+  bool dispatched        = false;
   if (!dispatched && ograd_stype == kDefaultStorage && data_stype == kDefaultStorage) {
     // dns, dns -> dns, dns/rsp
     if (type_assign(&data_grad_stype, kDefaultStorage) &&
@@ -217,7 +219,7 @@ inline bool EmbeddingOpBackwardStorageType(const nnvm::NodeAttrs& attrs,
 /*! \brief name the struct TakeNonzeroAxis for general take when
  *         axis is not zero, use TakeZeroAxisGPU or TakeZeroAxisCPU for axis zero
  */
-template<bool clip = true>
+template <bool clip = true>
 struct TakeNonzeroAxis {
   /*!
    * \brief Map function for take operator
@@ -231,19 +233,25 @@ struct TakeNonzeroAxis {
    * \param axis_dim    dim size of the axis dimension
    * \param axis        axis id
    */
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const IType* idx, const index_t out_prev_stride,
-                                  const index_t in_prev_stride, const index_t in_stride,
-                                  const int in_ndims, const int out_ndims, const int idx_ndims,
-                                  const int axis_dim, const int axis) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const IType* idx,
+                                  const index_t out_prev_stride,
+                                  const index_t in_prev_stride,
+                                  const index_t in_stride,
+                                  const int in_ndims,
+                                  const int out_ndims,
+                                  const int idx_ndims,
+                                  const int axis_dim,
+                                  const int axis) {
     // i is the global flattened index in the output
     const index_t out_head_index = i / out_prev_stride;
     const index_t out_rest_index = i % out_prev_stride;
-    const index_t out_mid_index = out_rest_index / in_stride;
-    const index_t out_tail_index = (axis == in_ndims - 1) ?
-                                   0 : (out_rest_index % in_stride);
-    index_t idx_index = static_cast<index_t>(idx[out_mid_index]);
+    const index_t out_mid_index  = out_rest_index / in_stride;
+    const index_t out_tail_index = (axis == in_ndims - 1) ? 0 : (out_rest_index % in_stride);
+    index_t idx_index            = static_cast<index_t>(idx[out_mid_index]);
     if (clip) {
       idx_index = (idx_index < 0) ? 0 : idx_index;
       idx_index = (idx_index > axis_dim - 1) ? (axis_dim - 1) : idx_index;
@@ -253,21 +261,21 @@ struct TakeNonzeroAxis {
     }
     const index_t in_tail_index = out_tail_index;
     const index_t in_head_index = out_head_index;
-    index_t in_src_index = in_tail_index + idx_index * in_stride;
+    index_t in_src_index        = in_tail_index + idx_index * in_stride;
     in_src_index += in_head_index * in_prev_stride;
     out_data[i] = in_data[in_src_index];
   }
 };
 
 // Embedding forward implementation with dense weight
-template<typename xpu>
+template <typename xpu>
 void EmbeddingOpForwardDnsImpl(mshadow::Stream<xpu>* s,
                                const TBlob& data,
                                const TBlob& weight,
                                const OpReqType req,
                                const TBlob& output);
 
-template<int req>
+template <int req>
 struct TakeRspKernel {
   /*!
    * \brief
@@ -279,7 +287,7 @@ struct TakeRspKernel {
    * \param row_length  number of elements per row
    * \param nnr         number of non-zero rows
    */
-  template<typename DType, typename IType, typename RType>
+  template <typename DType, typename IType, typename RType>
   MSHADOW_XINLINE static void Map(index_t i,
                                   const IType* data,
                                   DType* out,
@@ -288,16 +296,16 @@ struct TakeRspKernel {
                                   const nnvm::dim_t row_length,
                                   const nnvm::dim_t nnr) {
     using nnvm::dim_t;
-    const dim_t val = static_cast<dim_t>(data[i]);
+    const dim_t val  = static_cast<dim_t>(data[i]);
     const DType zero = 0;
     // Use binary search to find the lower_bound of val in weight_idx array
     // (adapted based on the binary search in dot kernel)
     const RType* first = weight_idx;
-    const RType* last = weight_idx + nnr;
+    const RType* last  = weight_idx + nnr;
     const RType* it;
     dim_t count = last - first, step;
     while (count > 0) {
-      it = first;
+      it   = first;
       step = count / 2;
       it += step;
       if (*it < val) {
@@ -308,8 +316,8 @@ struct TakeRspKernel {
       }
     }
     // end of binary search
-    const dim_t idx_offset = first - weight_idx;
-    const dim_t out_offset = i * row_length;
+    const dim_t idx_offset    = first - weight_idx;
+    const dim_t out_offset    = i * row_length;
     const dim_t weight_offset = idx_offset * row_length;
     // target idx might be missing in weight.idx. For example,
     // weight.idx = [5,10] and data = [3,7], so binary search fails to
@@ -327,7 +335,7 @@ struct TakeRspKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void EmbeddingOpForwardRspImpl(mshadow::Stream<xpu>* s,
                                       const TBlob& data,
                                       const NDArray& weight,
@@ -342,27 +350,29 @@ inline void EmbeddingOpForwardRspImpl(mshadow::Stream<xpu>* s,
           size_t data_size = data.shape_.Size();
           // only using the second dim since weight.ndim() == 2
           const nnvm::dim_t row_length = weight.shape()[1];
-          Kernel<TakeRspKernel<req_t>, xpu>::Launch(s, data_size, data.dptr<IType>(),
+          Kernel<TakeRspKernel<req_t>, xpu>::Launch(s,
+                                                    data_size,
+                                                    data.dptr<IType>(),
                                                     output.dptr<DType>(),
                                                     weight.aux_data(kIdx).dptr<RType>(),
                                                     weight.data().dptr<DType>(),
-                                                    row_length, weight.aux_shape(kIdx)[0]);
+                                                    row_length,
+                                                    weight.aux_shape(kIdx)[0]);
         });
       });
     });
   });
 }
 
-
 // Embedding forward implementation with row_sparse weight
-template<typename xpu>
+template <typename xpu>
 void SparseEmbeddingOpForwardRspImpl(const OpContext& ctx,
                                      const TBlob& data,
                                      const NDArray& weight,
                                      const OpReqType req,
                                      const TBlob& output);
 
-template<typename xpu>
+template <typename xpu>
 void EmbeddingOpForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -372,28 +382,31 @@ void EmbeddingOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(inputs[embedding::kWeight].ndim(), 2U)
-          << "Embedding layer expects its weight to be two-dimensional. "
-          << inputs[embedding::kWeight].ndim()
-          << " dimensional input is given instead";
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  EmbeddingOpForwardDnsImpl<xpu>(s, inputs[embedding::kData], inputs[embedding::kWeight],
-                                 req[embedding::kOut], outputs[embedding::kOut]);
+      << "Embedding layer expects its weight to be two-dimensional. "
+      << inputs[embedding::kWeight].ndim() << " dimensional input is given instead";
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  EmbeddingOpForwardDnsImpl<xpu>(s,
+                                 inputs[embedding::kData],
+                                 inputs[embedding::kWeight],
+                                 req[embedding::kOut],
+                                 outputs[embedding::kOut]);
 }
 
 /*! \brief cast to type and clip to range [0, K - 1]
  */
 struct tcast_clip {
-  template<typename OType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, OType* out_data, const IType* in_data,
-                                  const OType K) {
+  template <typename OType, typename IType>
+  MSHADOW_XINLINE static void Map(int i, OType* out_data, const IType* in_data, const OType K) {
     OType j = static_cast<OType>(in_data[i]);
-    if (j <= 0) j = 0;
-    else if (j >= K) j = K - 1;
+    if (j <= 0)
+      j = 0;
+    else if (j >= K)
+      j = K - 1;
     out_data[i] = j;
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void EmbeddingOpBackward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
@@ -404,27 +417,28 @@ void EmbeddingOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   CHECK_EQ(req[embedding::kData], kNullOp)
-          << "Embedding layer doesn't support calculate data gradient";
+      << "Embedding layer doesn't support calculate data gradient";
   CHECK_EQ(outputs[1].type_flag_, inputs[0].type_flag_);
 
   const mxnet::TShape& ishape = inputs[1].shape_;
   const mxnet::TShape& oshape = inputs[0].shape_;
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && outputs[1].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for EmbeddingOpBackward "
-                    "with float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for EmbeddingOpBackward "
+        "with float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
   MXNET_REAL_ACC_TYPE_SWITCH(outputs[1].type_flag_, DType, AType, {
     MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {
-      Tensor < xpu, 1, IType > data = inputs[1].get_with_shape<xpu, 1, IType>(
-        Shape1(ishape.ProdShape(0, ishape.ndim())), s);
+      Tensor<xpu, 1, IType> data =
+          inputs[1].get_with_shape<xpu, 1, IType>(Shape1(ishape.ProdShape(0, ishape.ndim())), s);
       Tensor<xpu, 2, DType> grad_out = inputs[0].get_with_shape<xpu, 2, DType>(
-        Shape2(oshape.ProdShape(0, oshape.ndim()-1), oshape[oshape.ndim()-1]), s);
+          Shape2(oshape.ProdShape(0, oshape.ndim() - 1), oshape[oshape.ndim() - 1]), s);
       Tensor<xpu, 2, DType> grad_in = outputs[1].get<xpu, 2, DType>(s);
 
       if (req[embedding::kWeight] == kWriteTo || req[embedding::kWeight] == kAddTo) {
@@ -435,10 +449,10 @@ void EmbeddingOpBackward(const nnvm::NodeAttrs& attrs,
           // Temporary storage for safe accumulation
           size_t temp_space_size = grad_in.size(0) * grad_in.size(1) * sizeof(AType);
           Tensor<xpu, 1, char> temp_space =
-            ctx.requested[embedding::kTempSpace].get_space_typed<xpu, 1, char>(
-              Shape1(temp_space_size), s);
-          Tensor<xpu, 2, AType> temp_grad_in(reinterpret_cast<AType*>(temp_space.dptr_),
-              grad_in.shape_, s);
+              ctx.requested[embedding::kTempSpace].get_space_typed<xpu, 1, char>(
+                  Shape1(temp_space_size), s);
+          Tensor<xpu, 2, AType> temp_grad_in(
+              reinterpret_cast<AType*>(temp_space.dptr_), grad_in.shape_, s);
           AddTakeGrad(grad_in, temp_grad_in, data, grad_out);
         } else {
           AddTakeGrad(grad_in, data, grad_out);
@@ -464,7 +478,7 @@ struct AddTakeGradRspKernel {
    * \param segment_length  the length of row segment to process for each thread
    * \param nnr             total number of non-zero rows of result gradient
    */
-  template<typename DType, typename IType>
+  template <typename DType, typename IType>
   MSHADOW_CINLINE static void Map(int tid,
                                   DType* grad,
                                   const nnvm::dim_t* prefix_sum,
@@ -476,15 +490,16 @@ struct AddTakeGradRspKernel {
                                   const nnvm::dim_t nnr) {
     using nnvm::dim_t;
     dim_t segment_start = tid * segment_length;
-    dim_t segment_end = std::min(nnr, segment_start + segment_length);
+    dim_t segment_end   = std::min(nnr, segment_start + segment_length);
     // scan all data
     for (dim_t data_i = 0; data_i < data_size; data_i++) {
-      dim_t data = static_cast<dim_t>(data_val[data_i]);
+      dim_t data        = static_cast<dim_t>(data_val[data_i]);
       dim_t grad_row_id = prefix_sum[data] - 1;
-      if (grad_row_id < segment_start || grad_row_id >= segment_end) continue;
+      if (grad_row_id < segment_start || grad_row_id >= segment_end)
+        continue;
       // no projection is performed
       dim_t ograd_i = data_i * row_length;
-      dim_t grad_i = grad_row_id * row_length;
+      dim_t grad_i  = grad_row_id * row_length;
       for (dim_t offset = 0; offset < row_length; offset++) {
         grad[grad_i + offset] += ograd[ograd_i + offset];
       }
@@ -492,7 +507,7 @@ struct AddTakeGradRspKernel {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void SparseEmbeddingOpBackwardRspImpl(const bool deterministic,
                                              const OpContext& ctx,
                                              const TBlob& ograd,
@@ -500,7 +515,7 @@ inline void SparseEmbeddingOpBackwardRspImpl(const bool deterministic,
                                              const OpReqType req,
                                              const NDArray& output);
 
-template<typename xpu>
+template <typename xpu>
 void EmbeddingOpBackwardEx(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<NDArray>& inputs,
@@ -509,48 +524,48 @@ void EmbeddingOpBackwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   const NDArray& weight_grad = outputs[1];
-  const NDArray& ograd = inputs[0];
-  const NDArray& data = inputs[1];
+  const NDArray& ograd       = inputs[0];
+  const NDArray& data        = inputs[1];
   // check dtype
   CHECK_EQ(weight_grad.dtype(), ograd.dtype());
   // check req
   CHECK_EQ(req[embedding::kData], kNullOp)
-          << "Embedding layer doesn't support calculate data gradient";
+      << "Embedding layer doesn't support calculate data gradient";
   if (data.storage_type() == kDefaultStorage && ograd.storage_type() == kDefaultStorage &&
       weight_grad.storage_type() == kRowSparseStorage) {
-    SparseEmbeddingOpBackwardRspImpl<xpu>(true, ctx, ograd.data(), data.data(),
-                                          req[embedding::kWeight], weight_grad);
+    SparseEmbeddingOpBackwardRspImpl<xpu>(
+        true, ctx, ograd.data(), data.data(), req[embedding::kWeight], weight_grad);
   } else {
     LogUnimplementedOp(attrs, ctx, inputs, req, outputs);
   }
 }
 
 namespace take_ {  // to avoid name conflict
-enum TakeOpInputs {kArr, kIdx};
-enum TakeOpOutputs {kOut};
-enum TakeOpResource {kTempSpace};
-enum TakeOpMode {kRaise, kWrap, kClip};
+enum TakeOpInputs { kArr, kIdx };
+enum TakeOpOutputs { kOut };
+enum TakeOpResource { kTempSpace };
+enum TakeOpMode { kRaise, kWrap, kClip };
 }  // namespace take_
 
 // TODO(somebody): behaviors specified by params
-struct TakeParam: public dmlc::Parameter<TakeParam> {
+struct TakeParam : public dmlc::Parameter<TakeParam> {
   int axis;
   int mode;
   DMLC_DECLARE_PARAMETER(TakeParam) {
-    DMLC_DECLARE_FIELD(axis)
-    .set_default(0)
-    .describe("The axis of input array to be taken."
-              "For input tensor of rank r, it could be in the range of [-r, r-1]");
+    DMLC_DECLARE_FIELD(axis).set_default(0).describe(
+        "The axis of input array to be taken."
+        "For input tensor of rank r, it could be in the range of [-r, r-1]");
     DMLC_DECLARE_FIELD(mode)
-    .add_enum("raise", take_::kRaise)
-    .add_enum("wrap", take_::kWrap)
-    .add_enum("clip", take_::kClip)
-    .set_default(take_::kClip)
-    .describe("Specify how out-of-bound indices bahave. Default is \"clip\"."
-              " \"clip\" means clip to the range. So, if all indices mentioned are too large,"
-              " they are replaced by the index that addresses the last element along an axis."
-              " \"wrap\" means to wrap around."
-              " \"raise\" means to raise an error when index out of range.");
+        .add_enum("raise", take_::kRaise)
+        .add_enum("wrap", take_::kWrap)
+        .add_enum("clip", take_::kClip)
+        .set_default(take_::kClip)
+        .describe(
+            "Specify how out-of-bound indices bahave. Default is \"clip\"."
+            " \"clip\" means clip to the range. So, if all indices mentioned are too large,"
+            " they are replaced by the index that addresses the last element along an axis."
+            " \"wrap\" means to wrap around."
+            " \"raise\" means to raise an error when index out of range.");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -576,15 +591,16 @@ struct TakeParam: public dmlc::Parameter<TakeParam> {
 };
 
 inline bool TakeOpShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   using namespace mshadow;
-  const mxnet::TShape &arrshape = (*in_attrs)[take_::kArr];
-  const mxnet::TShape &idxshape = (*in_attrs)[take_::kIdx];
-  if (!shape_is_known(idxshape)) return false;
+  const mxnet::TShape& arrshape = (*in_attrs)[take_::kArr];
+  const mxnet::TShape& idxshape = (*in_attrs)[take_::kIdx];
+  if (!shape_is_known(idxshape))
+    return false;
   const TakeParam& param = nnvm::get<TakeParam>(attrs.parsed);
   CHECK(param.axis >= -1 * arrshape.ndim() && param.axis < arrshape.ndim())
-    << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
+      << "Axis should be in the range of [-r, r-1] where r is the rank of input tensor";
 
   out_attrs->clear();
 
@@ -605,8 +621,8 @@ inline bool TakeOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool TakeOpType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                       std::vector<int>* in_attrs,
+                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK_NE((*in_attrs)[1], -1) << "Index type must be set for take operator";
@@ -624,21 +640,21 @@ inline bool TakeOpForwardStorageType(const nnvm::NodeAttrs& attrs,
                                      std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const int& idx_stype = in_attrs->at(take_::kIdx);
-  const int& arr_stype = in_attrs->at(take_::kArr);
-  int& out_stype = out_attrs->at(take_::kOut);
-  bool dispatched = false;
+  const int& idx_stype   = in_attrs->at(take_::kIdx);
+  const int& arr_stype   = in_attrs->at(take_::kArr);
+  int& out_stype         = out_attrs->at(take_::kOut);
+  bool dispatched        = false;
   const TakeParam& param = nnvm::get<TakeParam>(attrs.parsed);
   if (!dispatched && idx_stype == kDefaultStorage && arr_stype == kDefaultStorage) {
     // dns, dns -> dns
-    dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
-  if (!dispatched && idx_stype == kDefaultStorage && arr_stype == kCSRStorage &&
-      param.axis == 0 && (param.mode == take_::kWrap || param.mode == take_::kClip)) {
+  if (!dispatched && idx_stype == kDefaultStorage && arr_stype == kCSRStorage && param.axis == 0 &&
+      (param.mode == take_::kWrap || param.mode == take_::kClip)) {
     // take(dns, csr, axis=0) -> csr
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -646,8 +662,7 @@ inline bool TakeOpForwardStorageType(const nnvm::NodeAttrs& attrs,
   return dispatched;
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void TakeOpForwardCsrImpl(const TakeParam& params,
                           const OpContext& ctx,
                           const TBlob& idx,
@@ -655,8 +670,7 @@ void TakeOpForwardCsrImpl(const TakeParam& params,
                           OpReqType req,
                           const NDArray& output);
 
-
-template<typename xpu>
+template <typename xpu>
 void TakeOpForwardEx(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<NDArray>& inputs,
@@ -665,15 +679,14 @@ void TakeOpForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req[take_::kOut], kWriteTo);
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  const NDArray& idx = inputs[take_::kIdx];
-  const NDArray& arr = inputs[take_::kArr];
-  const NDArray& out = outputs[take_::kOut];
+  const NDArray& idx   = inputs[take_::kIdx];
+  const NDArray& arr   = inputs[take_::kArr];
+  const NDArray& out   = outputs[take_::kOut];
   const auto idx_stype = idx.storage_type();
   const auto arr_stype = arr.storage_type();
   const auto out_stype = out.storage_type();
-  const auto params = nnvm::get<TakeParam>(attrs.parsed);
-  if (idx_stype == kDefaultStorage && arr_stype == kCSRStorage &&
-      out_stype == kCSRStorage) {
+  const auto params    = nnvm::get<TakeParam>(attrs.parsed);
+  if (idx_stype == kDefaultStorage && arr_stype == kCSRStorage && out_stype == kCSRStorage) {
     // dns, csr -> csr
     TakeOpForwardCsrImpl<xpu>(params, ctx, idx.data(), arr, req[0], out);
   } else {
@@ -681,7 +694,7 @@ void TakeOpForwardEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void TakeOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -704,21 +717,27 @@ struct TakeGradGeneralKernel {
    * \param axis_dim      dim size of the axis dimension
    * \param axis          axis id
    */
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int tid, DType* arr_grad, const DType* ograd,
-                                  const IType* src_indptr, const IType* original_idx,
-                                  mshadow::Shape<10> in_strides, mshadow::Shape<10> out_strides,
-                                  const int in_ndims, const int out_ndims, const int idx_ndims,
-                                  const int axis, const int K) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int tid,
+                                  DType* arr_grad,
+                                  const DType* ograd,
+                                  const IType* src_indptr,
+                                  const IType* original_idx,
+                                  mshadow::Shape<10> in_strides,
+                                  mshadow::Shape<10> out_strides,
+                                  const int in_ndims,
+                                  const int out_ndims,
+                                  const int idx_ndims,
+                                  const int axis,
+                                  const int K) {
     const int in_head_index = (axis == 0) ? 0 : tid / in_strides[axis - 1];
     const int in_rest_index = (axis == 0) ? tid : tid % in_strides[axis - 1];
-    const int in_mid_index = in_rest_index / in_strides[axis];
-    const int in_tail_index = (axis == in_ndims - 1) ?
-                              0 : (in_rest_index % in_strides[axis]);
+    const int in_mid_index  = in_rest_index / in_strides[axis];
+    const int in_tail_index = (axis == in_ndims - 1) ? 0 : (in_rest_index % in_strides[axis]);
     for (IType i = src_indptr[in_mid_index]; i < src_indptr[in_mid_index + 1]; ++i) {
       int out_mid_index = original_idx[i];
-      out_mid_index = (out_mid_index < 0) ? out_mid_index + K : out_mid_index;
-      int target = in_tail_index + out_mid_index * in_strides[axis];
+      out_mid_index     = (out_mid_index < 0) ? out_mid_index + K : out_mid_index;
+      int target        = in_tail_index + out_mid_index * in_strides[axis];
       target += (axis == 0) ? 0 : in_head_index * out_strides[axis - 1];
       arr_grad[tid] += ograd[target];
     }
@@ -742,23 +761,29 @@ struct TakeGradGeneralKernelSafeAccumulation {
    * \param axis_dim      dim size of the axis dimension
    * \param axis          axis id
    */
-  template<typename DType, typename IType, typename AType>
-  MSHADOW_XINLINE static void Map(int tid, DType* arr_grad, AType* temp,
+  template <typename DType, typename IType, typename AType>
+  MSHADOW_XINLINE static void Map(int tid,
+                                  DType* arr_grad,
+                                  AType* temp,
                                   const DType* ograd,
-                                  const IType* src_indptr, const IType* original_idx,
-                                  mshadow::Shape<10> in_strides, mshadow::Shape<10> out_strides,
-                                  const int in_ndims, const int out_ndims, const int idx_ndims,
-                                  const int axis, const int K) {
+                                  const IType* src_indptr,
+                                  const IType* original_idx,
+                                  mshadow::Shape<10> in_strides,
+                                  mshadow::Shape<10> out_strides,
+                                  const int in_ndims,
+                                  const int out_ndims,
+                                  const int idx_ndims,
+                                  const int axis,
+                                  const int K) {
     const int in_head_index = (axis == 0) ? 0 : tid / in_strides[axis - 1];
     const int in_rest_index = (axis == 0) ? tid : tid % in_strides[axis - 1];
-    const int in_mid_index = in_rest_index / in_strides[axis];
-    const int in_tail_index = (axis == in_ndims - 1) ?
-                              0 : (in_rest_index % in_strides[axis]);
-    temp[tid] = static_cast<AType>(arr_grad[tid]);
+    const int in_mid_index  = in_rest_index / in_strides[axis];
+    const int in_tail_index = (axis == in_ndims - 1) ? 0 : (in_rest_index % in_strides[axis]);
+    temp[tid]               = static_cast<AType>(arr_grad[tid]);
     for (IType i = src_indptr[in_mid_index]; i < src_indptr[in_mid_index + 1]; ++i) {
       int out_mid_index = original_idx[i];
-      out_mid_index = (out_mid_index < 0) ? out_mid_index + K : out_mid_index;
-      int target = in_tail_index + out_mid_index * in_strides[axis];
+      out_mid_index     = (out_mid_index < 0) ? out_mid_index + K : out_mid_index;
+      int target        = in_tail_index + out_mid_index * in_strides[axis];
       target += (axis == 0) ? 0 : in_head_index * out_strides[axis - 1];
       temp[tid] += ograd[target];
     }
@@ -766,7 +791,7 @@ struct TakeGradGeneralKernelSafeAccumulation {
   }
 };
 
-template<bool clip = true, bool safe_acc = false, typename AType>
+template <bool clip = true, bool safe_acc = false, typename AType>
 void TakeOpBackwardImpl(mshadow::Stream<cpu>* s,
                         const OpContext& ctx,
                         const TBlob& arr,
@@ -778,44 +803,49 @@ void TakeOpBackwardImpl(mshadow::Stream<cpu>* s,
   CHECK(axis != 0) << "axis == 0 case should be dispatched to the legacy implementation";
   const mxnet::TShape& arrshape = arr.shape_;
   const mxnet::TShape& idxshape = idx.shape_;
-  const mxnet::TShape& oshape = ograd.shape_;
+  const mxnet::TShape& oshape   = ograd.shape_;
   MSHADOW_TYPE_SWITCH(idx.type_flag_, IType, {
     // get size of temporary storage for sort
-    int* src_indptr_ptr = nullptr;
-    size_t temp_storage_bytes = SortByKeyWorkspaceSize<int, int, cpu>(idxshape.Size());
-    size_t original_idx_bytes = idxshape.Size() * sizeof(int);
-    size_t src_indptr_bytes = (arrshape[axis] + 1) * sizeof(int);
+    int* src_indptr_ptr                    = nullptr;
+    size_t temp_storage_bytes              = SortByKeyWorkspaceSize<int, int, cpu>(idxshape.Size());
+    size_t original_idx_bytes              = idxshape.Size() * sizeof(int);
+    size_t src_indptr_bytes                = (arrshape[axis] + 1) * sizeof(int);
     size_t temp_accumulation_arrgrad_bytes = 0;
     if (safe_acc) {
-        temp_accumulation_arrgrad_bytes = arr.Size() * sizeof(AType);
+      temp_accumulation_arrgrad_bytes = arr.Size() * sizeof(AType);
     }
-    size_t workspace_bytes = src_indptr_bytes + 2 * original_idx_bytes +
-        temp_storage_bytes + temp_accumulation_arrgrad_bytes;
+    size_t workspace_bytes = src_indptr_bytes + 2 * original_idx_bytes + temp_storage_bytes +
+                             temp_accumulation_arrgrad_bytes;
     Tensor<cpu, 1, char> workspace =
-      ctx.requested[0].get_space_typed<cpu, 1, char>(Shape1(workspace_bytes), s);
+        ctx.requested[0].get_space_typed<cpu, 1, char>(Shape1(workspace_bytes), s);
     AType* temp_accum_arrgrad_ptr = reinterpret_cast<AType*>(workspace.dptr_);
     int* sorted_idx_ptr = reinterpret_cast<int*>(workspace.dptr_ + temp_accumulation_arrgrad_bytes);
     int* original_idx_ptr = reinterpret_cast<int*>(workspace.dptr_ + original_idx_bytes +
                                                    temp_accumulation_arrgrad_bytes);
-    src_indptr_ptr = reinterpret_cast<int*>(workspace.dptr_ + 2 * original_idx_bytes +
+    src_indptr_ptr        = reinterpret_cast<int*>(workspace.dptr_ + 2 * original_idx_bytes +
                                             temp_accumulation_arrgrad_bytes);
-    Tensor<cpu, 1, char> temp_storage(
-      workspace.dptr_ + 2 * original_idx_bytes + src_indptr_bytes + temp_accumulation_arrgrad_bytes,
-      Shape1(temp_storage_bytes), s);
+    Tensor<cpu, 1, char> temp_storage(workspace.dptr_ + 2 * original_idx_bytes + src_indptr_bytes +
+                                          temp_accumulation_arrgrad_bytes,
+                                      Shape1(temp_storage_bytes),
+                                      s);
     // Reset indptr to zero
     Kernel<set_zero, cpu>::Launch(s, arrshape[axis] + 1, src_indptr_ptr);
     // Fill original_idx
     Kernel<range_fwd, cpu>::Launch(s, idxshape.Size(), 1, 0, 1, kWriteTo, original_idx_ptr);
     // Fill sorted_idx_ptr with unsorted copy of idx
     Kernel<mshadow_op::identity_with_cast, cpu>::Launch(
-      s, idxshape.Size(), sorted_idx_ptr, idx.dptr<IType>());
+        s, idxshape.Size(), sorted_idx_ptr, idx.dptr<IType>());
     if (clip) {
       Kernel<op_with_req<mshadow_op::clip, kWriteTo>, cpu>::Launch(
-        s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr,
-        0, static_cast<int>(arrshape[axis] - 1));
+          s,
+          idxshape.Size(),
+          sorted_idx_ptr,
+          sorted_idx_ptr,
+          0,
+          static_cast<int>(arrshape[axis] - 1));
     } else {
       Kernel<op_with_req<mshadow_op::mod, kWriteTo>, cpu>::Launch(
-        s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr, static_cast<int>(arrshape[axis]));
+          s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr, static_cast<int>(arrshape[axis]));
     }
     Tensor<cpu, 1, int> original_idx(original_idx_ptr, Shape1(idxshape.Size()), s);
     int num_bits = common::ilog2ui(static_cast<unsigned int>(idxshape.Size()) - 1);
@@ -840,21 +870,41 @@ void TakeOpBackwardImpl(mshadow::Stream<cpu>* s,
     MSHADOW_TYPE_SWITCH(arr.type_flag_, DType, {
       if (safe_acc) {
         Kernel<TakeGradGeneralKernelSafeAccumulation, cpu>::Launch(
-          s, arrshape.Size(), arr.dptr<DType>(), temp_accum_arrgrad_ptr, ograd.dptr<DType>(),
-          src_indptr_ptr, original_idx_ptr, in_strides, out_strides,
-          arrshape.ndim(), oshape.ndim(), idxshape.ndim(), axis, static_cast<int>(arrshape[axis]));
+            s,
+            arrshape.Size(),
+            arr.dptr<DType>(),
+            temp_accum_arrgrad_ptr,
+            ograd.dptr<DType>(),
+            src_indptr_ptr,
+            original_idx_ptr,
+            in_strides,
+            out_strides,
+            arrshape.ndim(),
+            oshape.ndim(),
+            idxshape.ndim(),
+            axis,
+            static_cast<int>(arrshape[axis]));
       } else {
-        Kernel<TakeGradGeneralKernel, cpu>::Launch(
-          s, arrshape.Size(), arr.dptr<DType>(), ograd.dptr<DType>(),
-          src_indptr_ptr, original_idx_ptr, in_strides, out_strides,
-          arrshape.ndim(), oshape.ndim(), idxshape.ndim(), axis, static_cast<int>(arrshape[axis]));
+        Kernel<TakeGradGeneralKernel, cpu>::Launch(s,
+                                                   arrshape.Size(),
+                                                   arr.dptr<DType>(),
+                                                   ograd.dptr<DType>(),
+                                                   src_indptr_ptr,
+                                                   original_idx_ptr,
+                                                   in_strides,
+                                                   out_strides,
+                                                   arrshape.ndim(),
+                                                   oshape.ndim(),
+                                                   idxshape.ndim(),
+                                                   axis,
+                                                   static_cast<int>(arrshape[axis]));
       }
     });
   });
 }
 
 #ifdef __CUDACC__
-template<bool clip = true, bool safe_acc = false, typename AType>
+template <bool clip = true, bool safe_acc = false, typename AType>
 void TakeOpBackwardImpl(mshadow::Stream<gpu>* s,
                         const OpContext& ctx,
                         const TBlob& arr,
@@ -866,21 +916,21 @@ void TakeOpBackwardImpl(mshadow::Stream<gpu>* s,
   CHECK(axis != 0) << "axis == 0 case should be dispatched to the legacy implementation";
   const mxnet::TShape& arrshape = arr.shape_;
   const mxnet::TShape& idxshape = idx.shape_;
-  const mxnet::TShape& oshape = ograd.shape_;
+  const mxnet::TShape& oshape   = ograd.shape_;
   MSHADOW_TYPE_SWITCH(idx.type_flag_, IType, {
     // get size of temporary storage for sort
-    char* temp_storage_ptr = nullptr;
+    char* temp_storage_ptr         = nullptr;
     size_t scan_temp_storage_bytes = 0;
-    int* src_indptr_ptr = nullptr;
+    int* src_indptr_ptr            = nullptr;
     cub::DeviceScan::ExclusiveSum(temp_storage_ptr,
                                   scan_temp_storage_bytes,
                                   src_indptr_ptr,
                                   src_indptr_ptr,
                                   arrshape[axis] + 1,
                                   mshadow::Stream<gpu>::GetStream(s));
-    size_t sort_temp_storage_bytes = SortByKeyWorkspaceSize<int, int, gpu>(idxshape.Size());
+    size_t sort_temp_storage_bytes  = SortByKeyWorkspaceSize<int, int, gpu>(idxshape.Size());
     size_t histo_temp_storage_bytes = 0;
-    int* sorted_idx_ptr = nullptr;
+    int* sorted_idx_ptr             = nullptr;
     cub::DeviceHistogram::HistogramEven(temp_storage_ptr,
                                         histo_temp_storage_bytes,
                                         sorted_idx_ptr,
@@ -890,42 +940,46 @@ void TakeOpBackwardImpl(mshadow::Stream<gpu>* s,
                                         static_cast<int>(arrshape[axis] + 1),
                                         static_cast<int>(idxshape.Size()),
                                         mshadow::Stream<gpu>::GetStream(s));
-    size_t temp_storage_bytes = max(scan_temp_storage_bytes, sort_temp_storage_bytes);
-    temp_storage_bytes = max(temp_storage_bytes, histo_temp_storage_bytes);
-    size_t original_idx_bytes = idxshape.Size() * sizeof(int);
-    size_t src_indptr_bytes = (arrshape[axis] + 1) * sizeof(int);
+    size_t temp_storage_bytes            = max(scan_temp_storage_bytes, sort_temp_storage_bytes);
+    temp_storage_bytes                   = max(temp_storage_bytes, histo_temp_storage_bytes);
+    size_t original_idx_bytes            = idxshape.Size() * sizeof(int);
+    size_t src_indptr_bytes              = (arrshape[axis] + 1) * sizeof(int);
     size_t temp_accumulation_igrad_bytes = 0;
     if (safe_acc) {
-        temp_accumulation_igrad_bytes = arr.Size() * sizeof(AType);
+      temp_accumulation_igrad_bytes = arr.Size() * sizeof(AType);
     }
-    size_t workspace_bytes = src_indptr_bytes + 2 * original_idx_bytes +
-        temp_storage_bytes + temp_accumulation_igrad_bytes;
+    size_t workspace_bytes = src_indptr_bytes + 2 * original_idx_bytes + temp_storage_bytes +
+                             temp_accumulation_igrad_bytes;
     Tensor<gpu, 1, char> workspace =
-      ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_bytes), s);
+        ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(workspace_bytes), s);
     AType* temp_accum_igrad_ptr = reinterpret_cast<AType*>(workspace.dptr_);
-    sorted_idx_ptr = reinterpret_cast<int*>(workspace.dptr_ + temp_accumulation_igrad_bytes);
+    sorted_idx_ptr        = reinterpret_cast<int*>(workspace.dptr_ + temp_accumulation_igrad_bytes);
     int* original_idx_ptr = reinterpret_cast<int*>(workspace.dptr_ + original_idx_bytes +
                                                    temp_accumulation_igrad_bytes);
-    src_indptr_ptr = reinterpret_cast<int*>(workspace.dptr_ + 2 * original_idx_bytes +
+    src_indptr_ptr        = reinterpret_cast<int*>(workspace.dptr_ + 2 * original_idx_bytes +
                                             temp_accumulation_igrad_bytes);
-    temp_storage_ptr = workspace.dptr_ + 2 * original_idx_bytes + src_indptr_bytes +
-                       temp_accumulation_igrad_bytes;
+    temp_storage_ptr =
+        workspace.dptr_ + 2 * original_idx_bytes + src_indptr_bytes + temp_accumulation_igrad_bytes;
 
     // Reset indptr to zero
     Kernel<set_zero, gpu>::Launch(s, arrshape[axis] + 1, src_indptr_ptr);
     // Fill original_idx
-    Kernel<range_fwd, gpu>::Launch(
-      s, idxshape.Size(), 1, static_cast<int>(0), static_cast<int>(1),
-      kWriteTo, original_idx_ptr);
+    Kernel<range_fwd, gpu>::Launch(s,
+                                   idxshape.Size(),
+                                   1,
+                                   static_cast<int>(0),
+                                   static_cast<int>(1),
+                                   kWriteTo,
+                                   original_idx_ptr);
     // Fill sorted_idx_ptr with unsorted copy of idx
     Kernel<mshadow_op::identity_with_cast, gpu>::Launch(
-      s, idxshape.Size(), sorted_idx_ptr, idx.dptr<IType>());
+        s, idxshape.Size(), sorted_idx_ptr, idx.dptr<IType>());
     if (clip) {
       Kernel<op_with_req<mshadow_op::clip, kWriteTo>, gpu>::Launch(
-        s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr, 0, static_cast<int>(arrshape[axis]));
+          s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr, 0, static_cast<int>(arrshape[axis]));
     } else {
       Kernel<op_with_req<mshadow_op::mod, kWriteTo>, gpu>::Launch(
-        s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr, static_cast<int>(arrshape[axis]));
+          s, idxshape.Size(), sorted_idx_ptr, sorted_idx_ptr, static_cast<int>(arrshape[axis]));
     }
     Tensor<gpu, 1, int> original_idx(original_idx_ptr, Shape1(idxshape.Size()), s);
     Tensor<gpu, 1, char> temp_storage(temp_storage_ptr, Shape1(temp_storage_bytes), s);
@@ -960,24 +1014,42 @@ void TakeOpBackwardImpl(mshadow::Stream<gpu>* s,
     }
     MSHADOW_TYPE_SWITCH(arr.type_flag_, DType, {
       if (safe_acc) {
-          Kernel<TakeGradGeneralKernelSafeAccumulation, gpu>::Launch(
-            s, arrshape.Size(), arr.dptr<DType>(), temp_accum_igrad_ptr, ograd.dptr<DType>(),
-            src_indptr_ptr, original_idx_ptr, in_strides, out_strides,
-            arrshape.ndim(), oshape.ndim(), idxshape.ndim(), axis,
+        Kernel<TakeGradGeneralKernelSafeAccumulation, gpu>::Launch(
+            s,
+            arrshape.Size(),
+            arr.dptr<DType>(),
+            temp_accum_igrad_ptr,
+            ograd.dptr<DType>(),
+            src_indptr_ptr,
+            original_idx_ptr,
+            in_strides,
+            out_strides,
+            arrshape.ndim(),
+            oshape.ndim(),
+            idxshape.ndim(),
+            axis,
             static_cast<int>(arrshape[axis]));
       } else {
-          Kernel<TakeGradGeneralKernel, gpu>::Launch(
-            s, arrshape.Size(), arr.dptr<DType>(), ograd.dptr<DType>(),
-            src_indptr_ptr, original_idx_ptr, in_strides, out_strides,
-            arrshape.ndim(), oshape.ndim(), idxshape.ndim(), axis,
-            static_cast<int>(arrshape[axis]));
+        Kernel<TakeGradGeneralKernel, gpu>::Launch(s,
+                                                   arrshape.Size(),
+                                                   arr.dptr<DType>(),
+                                                   ograd.dptr<DType>(),
+                                                   src_indptr_ptr,
+                                                   original_idx_ptr,
+                                                   in_strides,
+                                                   out_strides,
+                                                   arrshape.ndim(),
+                                                   oshape.ndim(),
+                                                   idxshape.ndim(),
+                                                   axis,
+                                                   static_cast<int>(arrshape[axis]));
       }
     });
   });
 }
 #endif
 
-template<typename xpu>
+template <typename xpu>
 void TakeOpBackward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -988,20 +1060,21 @@ void TakeOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 2U);
   CHECK_NE(req[take_::kIdx], kAddTo)
-    << "take layer doesn't support gradient of req type kAddTo to index";
+      << "take layer doesn't support gradient of req type kAddTo to index";
 
   const TakeParam& param = nnvm::get<TakeParam>(attrs.parsed);
 
   // grad_out is the gradient of the outputs in the feed-forward
   // grad_in is the gradient of the inputs in the feed-forward
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   bool safe_acc = dmlc::GetEnv("MXNET_SAFE_ACCUMULATION", true);
   if (!safe_acc && outputs[0].type_flag_ == mshadow::kFloat16) {
-    common::LogOnce("MXNET_SAFE_ACCUMULATION=1 is recommended for TakeOpBackward "
-                    "with float16 inputs. "
-                    "See https://mxnet.apache.org/api/faq/env_var "
-                    "for more details.");
+    common::LogOnce(
+        "MXNET_SAFE_ACCUMULATION=1 is recommended for TakeOpBackward "
+        "with float16 inputs. "
+        "See https://mxnet.apache.org/api/faq/env_var "
+        "for more details.");
   }
   MXNET_REAL_ACC_TYPE_SWITCH(outputs[0].type_flag_, DType, AType, {
     MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // index data type
@@ -1010,7 +1083,7 @@ void TakeOpBackward(const nnvm::NodeAttrs& attrs,
       // outputs are the gradients of inputs in the feed-forward pass
       const mxnet::TShape& idxshape = inputs[1].shape_;
       const mxnet::TShape& arrshape = outputs[0].shape_;
-      const mxnet::TShape& oshape = inputs[0].shape_;
+      const mxnet::TShape& oshape   = inputs[0].shape_;
 
       if (idxshape.Size() == 0) {
         return;
@@ -1018,14 +1091,14 @@ void TakeOpBackward(const nnvm::NodeAttrs& attrs,
 
       if (req[take_::kIdx] != kNullOp) {
         mxnet_op::Kernel<mxnet_op::set_zero, xpu>::Launch(
-          s, idxshape.Size(), outputs[take_::kIdx].dptr<IType>());
+            s, idxshape.Size(), outputs[take_::kIdx].dptr<IType>());
       }
 
       const int actual_axis = param.axis + ((param.axis < 0) ? arrshape.ndim() : 0);
 
       int idxndim = idxshape.ndim();
-      Tensor<xpu, 1, IType> idx = inputs[1].get_with_shape<xpu, 1, IType>(
-          Shape1(idxshape.ProdShape(0, idxndim)), s);
+      Tensor<xpu, 1, IType> idx =
+          inputs[1].get_with_shape<xpu, 1, IType>(Shape1(idxshape.ProdShape(0, idxndim)), s);
       Tensor<xpu, 2, DType> grad_out = inputs[0].get_with_shape<xpu, 2, DType>(
           Shape2(oshape.ProdShape(0, idxndim), oshape.ProdShape(idxndim, oshape.ndim())), s);
       Tensor<xpu, 2, DType> grad_in = outputs[0].get_with_shape<xpu, 2, DType>(
@@ -1041,10 +1114,10 @@ void TakeOpBackward(const nnvm::NodeAttrs& attrs,
             // Temporary storage for safe accumulation
             size_t temp_space_size = grad_in.size(0) * grad_in.size(1) * sizeof(AType);
             Tensor<xpu, 1, char> temp_space =
-              ctx.requested[take_::kTempSpace].get_space_typed<xpu, 1, char>(
-                Shape1(temp_space_size), s);
-            Tensor<xpu, 2, AType> temp_grad_in(reinterpret_cast<AType*>(temp_space.dptr_),
-                grad_in.shape_, s);
+                ctx.requested[take_::kTempSpace].get_space_typed<xpu, 1, char>(
+                    Shape1(temp_space_size), s);
+            Tensor<xpu, 2, AType> temp_grad_in(
+                reinterpret_cast<AType*>(temp_space.dptr_), grad_in.shape_, s);
             if (param.mode == take_::kClip) {
               AddTakeGrad(grad_in, temp_grad_in, idx, grad_out);
             } else {
@@ -1060,10 +1133,10 @@ void TakeOpBackward(const nnvm::NodeAttrs& attrs,
         } else {
           LOG(FATAL) << "wrong req";
         }
-      // for all other cases
+        // for all other cases
       } else {
-        const TBlob& idx = inputs[1];
-        const TBlob& arr = outputs[0];
+        const TBlob& idx   = inputs[1];
+        const TBlob& arr   = outputs[0];
         const TBlob& ograd = inputs[0];
 
         if (safe_acc) {
@@ -1085,8 +1158,8 @@ void TakeOpBackward(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool BatchTakeOpShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                             mxnet::ShapeVector* in_attrs,
+                             mxnet::ShapeVector* out_attrs) {
   LOG(INFO) << "batch_take is deprecated. Please use pick instead.";
   CHECK_EQ(in_attrs->size(), 2U) << "BatchTake op requires two inputs";
   if ((*in_attrs)[1].ndim() != 0) {
@@ -1094,18 +1167,20 @@ inline bool BatchTakeOpShape(const nnvm::NodeAttrs& attrs,
   } else if ((*out_attrs)[0].ndim() != 0) {
     SHAPE_ASSIGN_CHECK(*in_attrs, 1, (*out_attrs)[0]);
   }
-  if ((*in_attrs)[0].ndim() == 0) return false;
+  if ((*in_attrs)[0].ndim() == 0)
+    return false;
   CHECK_GE((*in_attrs)[0].ndim(), 2) << "Data array must have at least 2 dimensional";
-  if ((*out_attrs)[0].ndim() == 0) return false;
-  CHECK_EQ((*in_attrs)[0].Size()/(*in_attrs)[0][(*in_attrs)[0].ndim()-1],
+  if ((*out_attrs)[0].ndim() == 0)
+    return false;
+  CHECK_EQ((*in_attrs)[0].Size() / (*in_attrs)[0][(*in_attrs)[0].ndim() - 1],
            (*out_attrs)[0].Size())
-    << "Index array's size must be the same as data array's size excluding the first dimension";
+      << "Index array's size must be the same as data array's size excluding the first dimension";
   return true;
 }
 
 inline bool BatchTakeOpType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_attrs,
-                          std::vector<int> *out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   if ((*in_attrs)[0] != -1) {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, (*in_attrs)[0]);
@@ -1117,19 +1192,20 @@ inline bool BatchTakeOpType(const nnvm::NodeAttrs& attrs,
 }
 
 /*! \brief take scalar value from 2d data array */
-template<int req>
+template <int req>
 struct batch_take {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out, const DType* a,
-                                  const int *idx, int M) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, DType* out, const DType* a, const int* idx, int M) {
     int j = idx[i];
-    if (j < 0) j = 0;
-    else if (j >= M) j = M-1;
-    KERNEL_ASSIGN(out[i], req, a[i*M+j]);
+    if (j < 0)
+      j = 0;
+    else if (j >= M)
+      j = M - 1;
+    KERNEL_ASSIGN(out[i], req, a[i * M + j]);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void BatchTakeOpForward(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<TBlob>& inputs,
@@ -1139,12 +1215,15 @@ void BatchTakeOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   using namespace mxnet_op;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<batch_take<req_type>, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
-                                                inputs[0].dptr<DType>(), inputs[1].dptr<int>(),
-                                                inputs[0].Size()/inputs[0].shape_[0]);
+      Kernel<batch_take<req_type>, xpu>::Launch(s,
+                                                outputs[0].Size(),
+                                                outputs[0].dptr<DType>(),
+                                                inputs[0].dptr<DType>(),
+                                                inputs[1].dptr<int>(),
+                                                inputs[0].Size() / inputs[0].shape_[0]);
     });
   });
 }
@@ -1159,17 +1238,13 @@ struct OneHotParam : public dmlc::Parameter<OneHotParam> {
   int axis;
   int dtype;
   DMLC_DECLARE_PARAMETER(OneHotParam) {
-    DMLC_DECLARE_FIELD(depth)
-      .describe("Depth of the one hot dimension.");
-    DMLC_DECLARE_FIELD(on_value)
-      .set_default(1.0f)
-      .describe("The value assigned to the locations represented by indices.");
-    DMLC_DECLARE_FIELD(off_value)
-      .set_default(0.0f)
-      .describe("The value assigned to the locations not represented by indices.");
+    DMLC_DECLARE_FIELD(depth).describe("Depth of the one hot dimension.");
+    DMLC_DECLARE_FIELD(on_value).set_default(1.0f).describe(
+        "The value assigned to the locations represented by indices.");
+    DMLC_DECLARE_FIELD(off_value).set_default(0.0f).describe(
+        "The value assigned to the locations not represented by indices.");
     DMLC_DECLARE_FIELD(dtype).set_default(mshadow::kFloat32)
-      MXNET_ADD_ALL_TYPES
-      .describe("DType of the output");
+        MXNET_ADD_ALL_TYPES.describe("DType of the output");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream depth_s, on_value_s, off_value_s, axis_s, dtype_s;
@@ -1177,43 +1252,47 @@ struct OneHotParam : public dmlc::Parameter<OneHotParam> {
     on_value_s << on_value;
     off_value_s << off_value;
     dtype_s << dtype;
-    (*dict)["depth"] = depth_s.str();
-    (*dict)["on_value"] = on_value_s.str();
+    (*dict)["depth"]     = depth_s.str();
+    (*dict)["on_value"]  = on_value_s.str();
     (*dict)["off_value"] = off_value_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]     = MXNetTypeWithBool2String(dtype);
   }
 };
 
-inline void GetOneHotParams(const OneHotParam& param, index_t* depth, double* on_value,
-                            double* off_value, int* dtype) {
+inline void GetOneHotParams(const OneHotParam& param,
+                            index_t* depth,
+                            double* on_value,
+                            double* off_value,
+                            int* dtype) {
   *depth = param.depth;
   CHECK_GE(*depth, 0) << "Dimension size, depth, must be a non-negative integer";
-  *on_value = param.on_value;
+  *on_value  = param.on_value;
   *off_value = param.off_value;
-  *dtype = param.dtype;
+  *dtype     = param.dtype;
 }
 
 inline bool OneHotOpShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   const OneHotParam& param = nnvm::get<OneHotParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   // The shape of indices
   const mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!shape_is_known(ishape)) return false;
+  if (!shape_is_known(ishape))
+    return false;
 
-  index_t depth = 0;
-  double on_value = 1.0;
+  index_t depth    = 0;
+  double on_value  = 1.0;
   double off_value = 0.0;
-  int dtype = mshadow::kFloat32;
+  int dtype        = mshadow::kFloat32;
   GetOneHotParams(param, &depth, &on_value, &off_value, &dtype);
 
   mxnet::TShape oshape(ishape.ndim() + 1, -1);
   for (index_t i = 0; i < ishape.ndim(); ++i) {
     oshape[i] = ishape[i];
   }
-  oshape[oshape.ndim()-1] = depth;
+  oshape[oshape.ndim() - 1] = depth;
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
   return shape_is_known(oshape);
 }
@@ -1224,10 +1303,10 @@ inline bool OneHotOpType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK_NE((*in_attrs)[0], -1) << "Index type must be set for one_hot operator";
-  index_t depth = 0;
-  double on_value = 1.0;
-  double off_value = 0.0;
-  int dtype = -1;
+  index_t depth            = 0;
+  double on_value          = 1.0;
+  double off_value         = 0.0;
+  int dtype                = -1;
   const OneHotParam& param = nnvm::get<OneHotParam>(attrs.parsed);
   GetOneHotParams(param, &depth, &on_value, &off_value, &dtype);
   TYPE_ASSIGN_CHECK(*out_attrs, 0, dtype);  // assign output type
@@ -1235,20 +1314,23 @@ inline bool OneHotOpType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<int req>
+template <int req>
 struct one_hot {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const IType* indices,
-                                  index_t depth, DType on_value) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const IType* indices,
+                                  index_t depth,
+                                  DType on_value) {
     index_t offset = i * depth;
-    index_t j = static_cast<index_t>(indices[i]);
+    index_t j      = static_cast<index_t>(indices[i]);
     if (j >= 0 && j < depth) {
-      KERNEL_ASSIGN(out[offset+j], req, on_value);
+      KERNEL_ASSIGN(out[offset + j], req, on_value);
     }
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void OneHotOpForward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -1259,23 +1341,27 @@ void OneHotOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(req.size(), 1U);
   // The following line is needed to guard the situation when
   // an output array is empty on GPU. In that case, out.dptr() = 0x0
-  if (outputs[0].Size() == 0) return;
-  index_t depth = 0;
-  double on_value = 1.0;
-  double off_value = 0.0;
-  int dtype = mshadow::kFloat32;
+  if (outputs[0].Size() == 0)
+    return;
+  index_t depth            = 0;
+  double on_value          = 1.0;
+  double off_value         = 0.0;
+  int dtype                = mshadow::kFloat32;
   const OneHotParam& param = nnvm::get<OneHotParam>(attrs.parsed);
   GetOneHotParams(param, &depth, &on_value, &off_value, &dtype);
   using namespace mxnet_op;
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {  // output data type switch
     mshadow::Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
     ASSIGN_DISPATCH(out, req[0], static_cast<DType>(off_value));
-    MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {  // request type switch
+    MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {           // request type switch
       MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, IType, {  // indices data type switch
-        Kernel<one_hot<req_type>, xpu>::Launch(s, inputs[0].Size(), outputs[0].dptr<DType>(),
-                                               inputs[0].dptr<IType>(), depth,
+        Kernel<one_hot<req_type>, xpu>::Launch(s,
+                                               inputs[0].Size(),
+                                               outputs[0].dptr<DType>(),
+                                               inputs[0].dptr<IType>(),
+                                               depth,
                                                static_cast<DType>(on_value));
       });
     });
@@ -1283,34 +1369,42 @@ void OneHotOpForward(const nnvm::NodeAttrs& attrs,
 }
 
 struct gather_nd {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, OpReqType req, index_t N, index_t M, index_t K,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  OpReqType req,
+                                  index_t N,
+                                  index_t M,
+                                  index_t K,
                                   const mshadow::Shape<10> strides,
                                   const mshadow::Shape<10> mshape,
-                                  DType* out, const DType* data,
+                                  DType* out,
+                                  const DType* data,
                                   const IType* indices) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * (static_cast<index_t>(indices[j*N + i] + mshape[j])%mshape[j]);
+      offset += strides[j] * (static_cast<index_t>(indices[j * N + i] + mshape[j]) % mshape[j]);
     }
     for (index_t j = 0; j < K; ++j) {
-      KERNEL_ASSIGN(out[i*K + j], req, data[offset+j]);
+      KERNEL_ASSIGN(out[i * K + j], req, data[offset + j]);
     }
   }
 };
 
 /*!
- * \brief If any index in a dimension is out of bound, 
+ * \brief If any index in a dimension is out of bound,
           then the value in this dimension will be set to be the out-of-bound index
  */
 struct is_valid_check_gather_nd {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* is_valid_dim_ptr, const DType* idx_ptr,
-                                  const index_t N, const mshadow::Shape<10> mshape) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* is_valid_dim_ptr,
+                                  const DType* idx_ptr,
+                                  const index_t N,
+                                  const mshadow::Shape<10> mshape) {
     index_t n = N - 1;
     while (n >= 0) {
-      if (idx_ptr[i*N + n] < -mshape[i] || idx_ptr[i*N + n] > mshape[i] - 1) {
-        is_valid_dim_ptr[i] = idx_ptr[i*N + n];
+      if (idx_ptr[i * N + n] < -mshape[i] || idx_ptr[i * N + n] > mshape[i] - 1) {
+        is_valid_dim_ptr[i] = idx_ptr[i * N + n];
         break;
       }
       n--;
@@ -1319,32 +1413,30 @@ struct is_valid_check_gather_nd {
 };
 
 inline bool GatherNDShape(const nnvm::NodeAttrs& attrs,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   // The shape of indices
   const mxnet::TShape& dshape = (*in_attrs)[0];
   const mxnet::TShape& ishape = (*in_attrs)[1];
 
-  if (shape_is_none(dshape) || shape_is_none(ishape)) return false;
+  if (shape_is_none(dshape) || shape_is_none(ishape))
+    return false;
 
-  CHECK_GT(ishape.ndim(), 1)
-    << "gather_nd requires index tensor to have at least 2 dimensions";
+  CHECK_GT(ishape.ndim(), 1) << "gather_nd requires index tensor to have at least 2 dimensions";
 
-  CHECK_LE(ishape[0], dshape.ndim())
-    << "Number of indices exceeds data dimension";
+  CHECK_LE(ishape[0], dshape.ndim()) << "Number of indices exceeds data dimension";
 
-  CHECK_LE(ishape[0], 10)
-    << "gather_nd supports indexing along at most 10 dimensions.";
+  CHECK_LE(ishape[0], 10) << "gather_nd supports indexing along at most 10 dimensions.";
 
   mxnet::TShape oshape(ishape.ndim() - 1 + dshape.ndim() - ishape[0], -1);
 
   for (int i = 0; i < ishape.ndim() - 1; ++i) {
-    oshape[i] = ishape[i+1];
+    oshape[i] = ishape[i + 1];
   }
   for (int i = 0; i < dshape.ndim() - ishape[0]; ++i) {
-    oshape[ishape.ndim()-1+i] = dshape[ishape[0] + i];
+    oshape[ishape.ndim() - 1 + i] = dshape[ishape[0] + i];
   }
 
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
@@ -1364,14 +1456,13 @@ inline bool GatherNDType(const nnvm::NodeAttrs& attrs,
 struct ScatterNDParam : public dmlc::Parameter<ScatterNDParam> {
   mxnet::TShape shape;
   DMLC_DECLARE_PARAMETER(ScatterNDParam) {
-    DMLC_DECLARE_FIELD(shape)
-      .describe("Shape of output.");
+    DMLC_DECLARE_FIELD(shape).describe("Shape of output.");
   }
 };
 
 inline bool ScatterNDShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const auto& params = dmlc::get<ScatterNDParam>(attrs.parsed);
@@ -1382,29 +1473,27 @@ inline bool ScatterNDShape(const nnvm::NodeAttrs& attrs,
   const mxnet::TShape& ishape = (*in_attrs)[1];
   const mxnet::TShape& oshape = (*out_attrs)[0];
 
-  if (shape_is_none(dshape) || shape_is_none(ishape) || shape_is_none(oshape)) return false;
+  if (shape_is_none(dshape) || shape_is_none(ishape) || shape_is_none(oshape))
+    return false;
 
-  CHECK_GT(ishape.ndim(), 1)
-    << "scatter_nd requires index tensor to have at least 2 dimensions";
+  CHECK_GT(ishape.ndim(), 1) << "scatter_nd requires index tensor to have at least 2 dimensions";
 
   CHECK_LE(ishape[0], oshape.ndim())
-    << "Number of indices exceeds output dimension in operator scatter_nd";
+      << "Number of indices exceeds output dimension in operator scatter_nd";
 
-  CHECK_LE(ishape[0], 10)
-    << "scatter_nd supports indexing along at most 10 dimensions.";
+  CHECK_LE(ishape[0], 10) << "scatter_nd supports indexing along at most 10 dimensions.";
 
   bool valid = dshape.ndim() == ishape.ndim() - 1 + oshape.ndim() - ishape[0];
 
   for (int i = 0; i < ishape.ndim() - 1; ++i) {
-    valid = valid && dshape[i] == ishape[i+1];
+    valid = valid && dshape[i] == ishape[i + 1];
   }
   for (int i = 0; i < oshape.ndim() - ishape[0]; ++i) {
-    valid = valid && dshape[ishape.ndim()-1+i] == oshape[ishape[0] + i];
+    valid = valid && dshape[ishape.ndim() - 1 + i] == oshape[ishape[0] + i];
   }
 
-  CHECK(valid)
-    << "Invalid data, indices, and output shape combination for scatter_nd: "
-    << dshape << ", " << ishape << ", " << oshape;
+  CHECK(valid) << "Invalid data, indices, and output shape combination for scatter_nd: " << dshape
+               << ", " << ishape << ", " << oshape;
 
   return true;
 }
@@ -1420,22 +1509,27 @@ inline bool ScatterNDType(const nnvm::NodeAttrs& attrs,
 }
 
 struct scatter_nd {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(index_t i, OpReqType req, index_t N, index_t M, index_t K,
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  OpReqType req,
+                                  index_t N,
+                                  index_t M,
+                                  index_t K,
                                   const mshadow::Shape<10> strides,
-                                  DType* out, const DType* data,
+                                  DType* out,
+                                  const DType* data,
                                   const IType* indices) {
     index_t offset = 0;
     for (index_t j = 0; j < M; ++j) {
-      offset += strides[j] * static_cast<index_t>(indices[j*N + i]);
+      offset += strides[j] * static_cast<index_t>(indices[j * N + i]);
     }
     for (index_t j = 0; j < K; ++j) {
-      KERNEL_ASSIGN(out[offset+j], req, data[i*K + j]);
+      KERNEL_ASSIGN(out[offset + j], req, data[i * K + j]);
     }
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void ScatterNDForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -1445,54 +1539,69 @@ void ScatterNDForward(const nnvm::NodeAttrs& attrs,
   using nnvm::dim_t;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
   const mxnet::TShape& oshape = outputs[0].shape_;
   const mxnet::TShape& ishape = inputs[1].shape_;
-  dim_t M = ishape[0];
-  dim_t N = ishape.Size() / M;
-  dim_t K = oshape.ProdShape(M, oshape.ndim());
+  dim_t M                     = ishape[0];
+  dim_t N                     = ishape.Size() / M;
+  dim_t K                     = oshape.ProdShape(M, oshape.ndim());
   mshadow::Shape<10> strides;
-  for (dim_t i = M-1, stride = K; i >= 0; stride *= oshape[i], --i) strides[i] = stride;
+  for (dim_t i = M - 1, stride = K; i >= 0; stride *= oshape[i], --i)
+    strides[i] = stride;
   if (kWriteTo == req[0]) {
     Fill<true>(s, outputs[0], req[0], 0);
   }
-  MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {  // output data type switch
+  MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {    // output data type switch
     MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[1].type_flag_, IType, {  // indices data type switch
-      mxnet_op::Kernel<scatter_nd, xpu>::Launch(
-        s, N, req[0], N, M, K, strides, outputs[0].dptr<DType>(),
-        inputs[0].dptr<DType>(), inputs[1].dptr<IType>());
+      mxnet_op::Kernel<scatter_nd, xpu>::Launch(s,
+                                                N,
+                                                req[0],
+                                                N,
+                                                M,
+                                                K,
+                                                strides,
+                                                outputs[0].dptr<DType>(),
+                                                inputs[0].dptr<DType>(),
+                                                inputs[1].dptr<IType>());
     });
   });
 }
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 inline typename std::enable_if<(!std::is_same<DType, mshadow::half::half_t>::value), void>::type
-GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+GatherNDBackwardImpl(index_t N,
+                     index_t M,
+                     index_t K,
                      const mshadow::Shape<10> strides,
                      DType* out,
                      const DType* data,
                      const IType* indices,
-                     mshadow::Stream<cpu> *s);
+                     mshadow::Stream<cpu>* s);
 
-template<typename DType, typename IType>
+template <typename DType, typename IType>
 inline typename std::enable_if<std::is_same<DType, mshadow::half::half_t>::value, void>::type
-GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+GatherNDBackwardImpl(index_t N,
+                     index_t M,
+                     index_t K,
                      const mshadow::Shape<10> strides,
                      DType* out,
                      const DType* data,
                      const IType* indices,
-                     mshadow::Stream<cpu> *s);
+                     mshadow::Stream<cpu>* s);
 
-template<typename DType, typename IType>
-inline void GatherNDBackwardImpl(index_t N, index_t M, index_t K,
+template <typename DType, typename IType>
+inline void GatherNDBackwardImpl(index_t N,
+                                 index_t M,
+                                 index_t K,
                                  const mshadow::Shape<10> strides,
                                  DType* out,
                                  const DType* data,
                                  const IType* indices,
-                                 mshadow::Stream<gpu> *s);
+                                 mshadow::Stream<gpu>* s);
 
-template<typename xpu>
+template <typename xpu>
 void GatherNDBackward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -1502,21 +1611,26 @@ void GatherNDBackward(const nnvm::NodeAttrs& attrs,
   using nnvm::dim_t;
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp)
+    return;
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
   const mxnet::TShape& oshape = outputs[0].shape_;
   const mxnet::TShape& ishape = inputs[1].shape_;
-  dim_t M = ishape[0];
-  dim_t N = ishape.Size() / M;
-  dim_t K = oshape.ProdShape(M, oshape.ndim());
+  dim_t M                     = ishape[0];
+  dim_t N                     = ishape.Size() / M;
+  dim_t K                     = oshape.ProdShape(M, oshape.ndim());
   mshadow::Shape<10> strides;
-  for (dim_t i = M-1, stride = K; i >= 0; stride *= oshape[i], --i) strides[i] = stride;
+  for (dim_t i = M - 1, stride = K; i >= 0; stride *= oshape[i], --i)
+    strides[i] = stride;
   if (kWriteTo == req[0]) {
     Fill<true>(s, outputs[0], req[0], 0);
   }
   MXNET_NO_INT8_TYPE_SWITCH(inputs[0].type_flag_, DType, {  // output data type switch
-    MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {  // indices data type switch
-      GatherNDBackwardImpl(N, M, K, strides,
+    MSHADOW_TYPE_SWITCH(inputs[1].type_flag_, IType, {      // indices data type switch
+      GatherNDBackwardImpl(N,
+                           M,
+                           K,
+                           strides,
                            outputs[0].dptr<DType>(),
                            inputs[0].dptr<DType>(),
                            inputs[1].dptr<IType>(),
@@ -1529,7 +1643,7 @@ void GatherNDBackward(const nnvm::NodeAttrs& attrs,
  * This is for internal use only.
  * DO NOT call this function unless you have to.
  */
-template<typename xpu>
+template <typename xpu>
 void ScatterSetNDForward(const nnvm::NodeAttrs& attrs,
                          const OpContext& ctx,
                          const std::vector<TBlob>& inputs,
diff --git a/src/operator/tensor/init_op.cc b/src/operator/tensor/init_op.cc
index aabd3f0eb7b2..97297e3134b0 100644
--- a/src/operator/tensor/init_op.cc
+++ b/src/operator/tensor/init_op.cc
@@ -37,73 +37,74 @@ DMLC_REGISTER_PARAMETER(EyeParam);
 DMLC_REGISTER_PARAMETER(LinspaceParam);
 
 NNVM_REGISTER_OP(_zeros_without_dtype)
-.describe("fill target with zeros without default dtype")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InitOpWithoutDTypeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpWithoutDTypeParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitType<InitOpWithoutDTypeParam>)
-.set_attr<FInferStorageType>("FInferStorageType",
-  InitStorageType<InitOpWithoutDTypeParam, true, true>)
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FillComputeZerosEx<cpu>)
-.add_arguments(InitOpWithoutDTypeParam::__FIELDS__());
+    .describe("fill target with zeros without default dtype")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpWithoutDTypeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpWithoutDTypeParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<InitOpWithoutDTypeParam>)
+    .set_attr<FInferStorageType>("FInferStorageType",
+                                 InitStorageType<InitOpWithoutDTypeParam, true, true>)
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FillComputeZerosEx<cpu>)
+    .add_arguments(InitOpWithoutDTypeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_zeros)
-.describe("fill target with zeros")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InitOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitType<InitOpParam>)
-.set_attr<FInferStorageType>("FInferStorageType", InitStorageType<InitOpParam, true, true>)
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FillComputeZerosEx<cpu>)
-.add_arguments(InitOpParam::__FIELDS__());
+    .describe("fill target with zeros")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<InitOpParam>)
+    .set_attr<FInferStorageType>("FInferStorageType", InitStorageType<InitOpParam, true, true>)
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FillComputeZerosEx<cpu>)
+    .add_arguments(InitOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_eye)
-.describe("Return a 2-D array with ones on the diagonal and zeros elsewhere.")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<EyeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitEyeShape<EyeParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitType<EyeParam>)
-.set_attr<FCompute>("FCompute<cpu>", EyeFill<cpu>)
-.add_arguments(EyeParam::__FIELDS__());
+    .describe("Return a 2-D array with ones on the diagonal and zeros elsewhere.")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<EyeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitEyeShape<EyeParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<EyeParam>)
+    .set_attr<FCompute>("FCompute<cpu>", EyeFill<cpu>)
+    .add_arguments(EyeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_ones)
-.describe("fill target with ones")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<InitOpParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
-.set_attr<nnvm::FInferType>("FInferType", InitType<InitOpParam>)
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 1>)
-.add_arguments(InitOpParam::__FIELDS__());
+    .describe("fill target with ones")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<InitOpParam>)
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 1>)
+    .add_arguments(InitOpParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_full)
-  .describe("fill target with a scalar value")
-  .set_num_inputs(0)
-  .set_num_outputs(1)
-  .set_attr_parser(ParamParser<InitOpWithScalarParam>)
-  .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpWithScalarParam>)
-  .set_attr<nnvm::FInferType>("FInferType", InitType<InitOpWithScalarParam>)
-  .set_attr<FCompute>("FCompute<cpu>", InitFillWithScalarCompute<cpu>)
-.add_arguments(InitOpWithScalarParam::__FIELDS__());
+    .describe("fill target with a scalar value")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<InitOpWithScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", InitShape<InitOpWithScalarParam>)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<InitOpWithScalarParam>)
+    .set_attr<FCompute>("FCompute<cpu>", InitFillWithScalarCompute<cpu>)
+    .add_arguments(InitOpWithScalarParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_arange)
-.describe("Return evenly spaced values within a given interval. Similar to Numpy")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(RangeParamParser)
-.set_attr<mxnet::FInferShape>("FInferShape", RangeShape)
-.set_attr<nnvm::FInferType>("FInferType", InitType<RangeParam>)
-.set_attr<FCompute>("FCompute<cpu>", RangeCompute<cpu, RangeParam>)
-.add_arguments(RangeParam::__FIELDS__());
+    .describe("Return evenly spaced values within a given interval. Similar to Numpy")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(RangeParamParser)
+    .set_attr<mxnet::FInferShape>("FInferShape", RangeShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<RangeParam>)
+    .set_attr<FCompute>("FCompute<cpu>", RangeCompute<cpu, RangeParam>)
+    .add_arguments(RangeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_contrib_arange_like)
-.add_alias("_npx_arange_like")
-.describe(R"code(Return an array with evenly spaced values. If axis is not given, the output will 
+    .add_alias("_npx_arange_like")
+    .describe(
+        R"code(Return an array with evenly spaced values. If axis is not given, the output will 
 have the same shape as the input array. Otherwise, the output will be a 1-D array with size of 
 the specified axis in input shape.
 
@@ -126,31 +127,33 @@ Examples::
     [0. 1. 2. 3.]
     <NDArray 4 @cpu(0)>
 )code")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RangeLikeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", RangeLikeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
-    [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 0); })
-.set_attr<FCompute>("FCompute<cpu>", RangeCompute<cpu, RangeLikeParam>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(RangeLikeParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RangeLikeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", RangeLikeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>(1, 0);
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", RangeCompute<cpu, RangeLikeParam>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(RangeLikeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_linspace)
-.describe("Return evenly spaced numbers over a specified interval. Similar to Numpy")
-.set_num_inputs(0)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LinspaceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", LinspaceShape)
-.set_attr<nnvm::FInferType>("FInferType", InitType<LinspaceParam>)
-.set_attr<FCompute>("FCompute<cpu>", LinspaceCompute<cpu>)
-.add_arguments(RangeParam::__FIELDS__());
+    .describe("Return evenly spaced numbers over a specified interval. Similar to Numpy")
+    .set_num_inputs(0)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LinspaceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", LinspaceShape)
+    .set_attr<nnvm::FInferType>("FInferType", InitType<LinspaceParam>)
+    .set_attr<FCompute>("FCompute<cpu>", LinspaceCompute<cpu>)
+    .add_arguments(RangeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(zeros_like)
 MXNET_ADD_SPARSE_OP_ALIAS(zeros_like)
-.describe(R"code(Return an array of zeros with the same shape, type and storage type
+    .describe(R"code(Return an array of zeros with the same shape, type and storage type
 as the input array.
 
 The storage type of ``zeros_like`` output depends on the storage type of the input
@@ -168,20 +171,22 @@ Examples::
                    [ 0.,  0.,  0.]]
 
 )code")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
-.set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
-    [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 0); })
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FillComputeZerosEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "The input");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FInferStorageType>("FInferStorageType", ElemwiseStorageType<1, 1, false, true, true>)
+    .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>(1, 0);
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 0>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FillComputeZerosEx<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "The input");
 
 NNVM_REGISTER_OP(ones_like)
-.describe(R"code(Return an array of ones with the same shape and type
+    .describe(R"code(Return an array of ones with the same shape and type
 as the input array.
 
 Examples::
@@ -193,15 +198,17 @@ Examples::
                   [ 1.,  1.,  1.]]
 
 )code")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
-    [](const NodeAttrs& attrs) { return std::vector<uint32_t>(1, 0); })
-.set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 1>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "The input");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FIgnoreInputs>("FIgnoreInputs",
+                                   [](const NodeAttrs& attrs) {
+                                     return std::vector<uint32_t>(1, 0);
+                                   })
+    .set_attr<FCompute>("FCompute<cpu>", FillCompute<cpu, 1>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "The input");
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/init_op.cu b/src/operator/tensor/init_op.cu
index ee6963bd87c0..99b2b136ca54 100644
--- a/src/operator/tensor/init_op.cu
+++ b/src/operator/tensor/init_op.cu
@@ -33,49 +33,43 @@ namespace op {
  * \param s - The device stream
  * \param dst - NDArray which is to be set to "all zeroes"
  */
-void FillZerosCsrImpl(mshadow::Stream<mshadow::gpu> *s, const NDArray& dst) {
+void FillZerosCsrImpl(mshadow::Stream<mshadow::gpu>* s, const NDArray& dst) {
   CHECK_EQ(dst.storage_type(), kCSRStorage) << "dst is not a CSR NDArray";
   dst.set_aux_shape(csr::kIdx, mshadow::Shape1(0));
   dst.CheckAndAllocAuxData(csr::kIndPtr, mshadow::Shape1(dst.shape()[0] + 1));
   TBlob indptr_data = dst.aux_data(csr::kIndPtr);
   MSHADOW_IDX_TYPE_SWITCH(dst.aux_type(csr::kIndPtr), IType, {
     mxnet_op::Kernel<mxnet_op::set_zero, mshadow::gpu>::Launch(
-      s, indptr_data.Size(), indptr_data.dptr<IType>());
+        s, indptr_data.Size(), indptr_data.dptr<IType>());
   });
 }
 
 NNVM_REGISTER_OP(_zeros_without_dtype)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", FillComputeZerosEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", FillComputeZerosEx<gpu>);
 
 NNVM_REGISTER_OP(_zeros)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", FillComputeZerosEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", FillComputeZerosEx<gpu>);
 
-NNVM_REGISTER_OP(_eye)
-.set_attr<FCompute>("FCompute<gpu>", EyeFill<gpu>);
+NNVM_REGISTER_OP(_eye).set_attr<FCompute>("FCompute<gpu>", EyeFill<gpu>);
 
-NNVM_REGISTER_OP(_ones)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 1>);
+NNVM_REGISTER_OP(_ones).set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 1>);
 
-NNVM_REGISTER_OP(_full)
-.set_attr<FCompute>("FCompute<gpu>", InitFillWithScalarCompute<gpu>);
+NNVM_REGISTER_OP(_full).set_attr<FCompute>("FCompute<gpu>", InitFillWithScalarCompute<gpu>);
 
-NNVM_REGISTER_OP(_arange)
-.set_attr<FCompute>("FCompute<gpu>", RangeCompute<gpu, RangeParam>);
+NNVM_REGISTER_OP(_arange).set_attr<FCompute>("FCompute<gpu>", RangeCompute<gpu, RangeParam>);
 
 NNVM_REGISTER_OP(_contrib_arange_like)
-.set_attr<FCompute>("FCompute<gpu>", RangeCompute<gpu, RangeLikeParam>);
+    .set_attr<FCompute>("FCompute<gpu>", RangeCompute<gpu, RangeLikeParam>);
 
-NNVM_REGISTER_OP(_linspace)
-.set_attr<FCompute>("FCompute<gpu>", LinspaceCompute<gpu>);
+NNVM_REGISTER_OP(_linspace).set_attr<FCompute>("FCompute<gpu>", LinspaceCompute<gpu>);
 
 NNVM_REGISTER_OP(zeros_like)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", FillComputeZerosEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 0>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", FillComputeZerosEx<gpu>);
 
-NNVM_REGISTER_OP(ones_like)
-.set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 1>);
+NNVM_REGISTER_OP(ones_like).set_attr<FCompute>("FCompute<gpu>", FillCompute<gpu, 1>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/init_op.h b/src/operator/tensor/init_op.h
index bc7b629287ed..a235bfc15776 100644
--- a/src/operator/tensor/init_op.h
+++ b/src/operator/tensor/init_op.h
@@ -43,7 +43,6 @@
 #include "../mshadow_op.h"
 #include "../../api/operator/op_utils.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -52,18 +51,12 @@ struct InitOpParam : public dmlc::Parameter<InitOpParam> {
   std::string ctx;
   int dtype;
   DMLC_DECLARE_PARAMETER(InitOpParam) {
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape(0, 1))
-    .describe("The shape of the output");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL
-    .describe("Target data type.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape(0, 1)).describe("The shape of the output");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL.describe("Target data type.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream shape_s;
@@ -80,16 +73,11 @@ struct InitOpWithoutDTypeParam : public dmlc::Parameter<InitOpWithoutDTypeParam>
   std::string ctx;
   int dtype;
   DMLC_DECLARE_PARAMETER(InitOpWithoutDTypeParam) {
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::TShape())
-    .describe("The shape of the output");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .describe("Target data type.");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("The shape of the output");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).describe("Target data type.");
   }
 };
 
@@ -98,16 +86,12 @@ struct FullLikeOpParam : public dmlc::Parameter<FullLikeOpParam> {
   std::string ctx;
   dmlc::optional<int> dtype;
   DMLC_DECLARE_PARAMETER(FullLikeOpParam) {
-    DMLC_DECLARE_FIELD(fill_value)
-      .describe("Value with which to fill newly created tensor");
-    DMLC_DECLARE_FIELD(ctx)
-      .set_default("")
-      .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-                "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-      .set_default(dmlc::optional<int>())
-      MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL
-      .describe("Target data type.");
+    DMLC_DECLARE_FIELD(fill_value).describe("Value with which to fill newly created tensor");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(dmlc::optional<int>())
+        MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL.describe("Target data type.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream fill_value_s, dtype_s;
@@ -123,10 +107,10 @@ struct FullLikeOpParam : public dmlc::Parameter<FullLikeOpParam> {
 };
 
 /*! \brief Infer type of FullLikeOpCompute*/
-template<typename ParamType>
+template <typename ParamType>
 inline bool FullLikeOpType(const nnvm::NodeAttrs& attrs,
-                           std::vector<int> *in_attrs,
-                           std::vector<int> *out_attrs) {
+                           std::vector<int>* in_attrs,
+                           std::vector<int>* out_attrs) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -135,7 +119,7 @@ inline bool FullLikeOpType(const nnvm::NodeAttrs& attrs,
   } else {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
   }
-  return out_attrs->at(0) != -1;;
+  return out_attrs->at(0) != -1;
 }
 
 struct EyeParam : public dmlc::Parameter<EyeParam> {
@@ -146,32 +130,25 @@ struct EyeParam : public dmlc::Parameter<EyeParam> {
   int dtype;
 
   DMLC_DECLARE_PARAMETER(EyeParam) {
-    DMLC_DECLARE_FIELD(N)
-    .describe("Number of rows in the output.");
-    DMLC_DECLARE_FIELD(M)
-    .set_default(0)
-    .describe("Number of columns in the output. If 0, defaults to N");
-    DMLC_DECLARE_FIELD(k)
-    .set_default(0)
-    .describe("Index of the diagonal. 0 (the default) refers to the main diagonal."
-              "A positive value refers to an upper diagonal."
-              "A negative value to a lower diagonal.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES
-    .describe("Target data type.");
+    DMLC_DECLARE_FIELD(N).describe("Number of rows in the output.");
+    DMLC_DECLARE_FIELD(M).set_default(0).describe(
+        "Number of columns in the output. If 0, defaults to N");
+    DMLC_DECLARE_FIELD(k).set_default(0).describe(
+        "Index of the diagonal. 0 (the default) refers to the main diagonal."
+        "A positive value refers to an upper diagonal."
+        "A negative value to a lower diagonal.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES.describe("Target data type.");
   }
 };
 
-template<typename ParamType>
+template <typename ParamType>
 inline bool InitEyeShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -179,18 +156,19 @@ inline bool InitEyeShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<int req>
+template <int req>
 struct eye_dns_fill {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
                                   const nnvm::dim_t init_col,
                                   const nnvm::dim_t k,
                                   const nnvm::dim_t num_cols) {
-    KERNEL_ASSIGN(out_data[(i+init_col-k)*num_cols+i+init_col], req, static_cast<DType>(1));
+    KERNEL_ASSIGN(
+        out_data[(i + init_col - k) * num_cols + i + init_col], req, static_cast<DType>(1));
   }
 };
 
-
 struct RangeParam : public dmlc::Parameter<RangeParam> {
   double start;
   dmlc::optional<double> stop;
@@ -200,33 +178,28 @@ struct RangeParam : public dmlc::Parameter<RangeParam> {
   std::string ctx;
   int dtype;
   DMLC_DECLARE_PARAMETER(RangeParam) {
-    DMLC_DECLARE_FIELD(start)
-    .describe("Start of interval. The interval includes this value. The default start value is 0.");
+    DMLC_DECLARE_FIELD(start).describe(
+        "Start of interval. The interval includes this value. The default start value is 0.");
     DMLC_DECLARE_FIELD(stop)
-    .set_default(dmlc::optional<double>())
-    .describe("End of interval. The interval does not include this value,"
-              " except in some cases where step is not an integer and"
-              " floating point round-off affects the length of out.");
-    DMLC_DECLARE_FIELD(step)
-    .set_default(1)
-    .describe("Spacing between values.");
-    DMLC_DECLARE_FIELD(repeat)
-    .set_default(1)
-    .describe("The repeating time of all elements."
-              " E.g repeat=3, the element a will be repeated three times --> a, a, a.");
+        .set_default(dmlc::optional<double>())
+        .describe(
+            "End of interval. The interval does not include this value,"
+            " except in some cases where step is not an integer and"
+            " floating point round-off affects the length of out.");
+    DMLC_DECLARE_FIELD(step).set_default(1).describe("Spacing between values.");
+    DMLC_DECLARE_FIELD(repeat).set_default(1).describe(
+        "The repeating time of all elements."
+        " E.g repeat=3, the element a will be repeated three times --> a, a, a.");
     DMLC_DECLARE_FIELD(infer_range)
-    .set_default(false)
-    .describe("When set to True, infer the stop position from the start, step, "
-              "repeat, and output tensor size.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES
-    .describe("Target data type.");
+        .set_default(false)
+        .describe(
+            "When set to True, infer the stop position from the start, step, "
+            "repeat, and output tensor size.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES.describe("Target data type.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream start_s, stop_s, step_s, repeat_s, infer_range_s, dtype_s;
@@ -236,12 +209,12 @@ struct RangeParam : public dmlc::Parameter<RangeParam> {
     repeat_s << repeat;
     infer_range_s << infer_range;
     dtype_s << dtype;
-    (*dict)["start"] = start_s.str();
-    (*dict)["stop"] = stop_s.str();
-    (*dict)["step"] = step_s.str();
-    (*dict)["repeat"] = repeat_s.str();
+    (*dict)["start"]       = start_s.str();
+    (*dict)["stop"]        = stop_s.str();
+    (*dict)["step"]        = step_s.str();
+    (*dict)["repeat"]      = repeat_s.str();
     (*dict)["infer_range"] = infer_range_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]       = MXNetTypeWithBool2String(dtype);
   }
 };
 
@@ -253,25 +226,21 @@ struct RangeLikeParam : public dmlc::Parameter<RangeLikeParam> {
   dmlc::optional<int> axis;
 
   DMLC_DECLARE_PARAMETER(RangeLikeParam) {
-    DMLC_DECLARE_FIELD(start)
-    .set_default(0)
-    .describe("Start of interval. The interval includes this value. The default start value is 0.");
-    DMLC_DECLARE_FIELD(step)
-    .set_default(1)
-    .describe("Spacing between values.");
-    DMLC_DECLARE_FIELD(repeat)
-    .set_default(1)
-    .describe("The repeating time of all elements."
-              " E.g repeat=3, the element a will be repeated three times --> a, a, a.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(start).set_default(0).describe(
+        "Start of interval. The interval includes this value. The default start value is 0.");
+    DMLC_DECLARE_FIELD(step).set_default(1).describe("Spacing between values.");
+    DMLC_DECLARE_FIELD(repeat).set_default(1).describe(
+        "The repeating time of all elements."
+        " E.g repeat=3, the element a will be repeated three times --> a, a, a.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<int>())
-    .describe("Arange elements according to the size of a certain axis of input array."
-              " The negative numbers are interpreted counting from the backward."
-              " If not provided, will arange elements according to the input shape.");
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "Arange elements according to the size of a certain axis of input array."
+            " The negative numbers are interpreted counting from the backward."
+            " If not provided, will arange elements according to the input shape.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream start_s, step_s, repeat_s, axis_s;
@@ -279,10 +248,10 @@ struct RangeLikeParam : public dmlc::Parameter<RangeLikeParam> {
     step_s << step;
     repeat_s << repeat;
     axis_s << axis;
-    (*dict)["start"] = start_s.str();
-    (*dict)["step"] = step_s.str();
+    (*dict)["start"]  = start_s.str();
+    (*dict)["step"]   = step_s.str();
     (*dict)["repeat"] = repeat_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]   = axis_s.str();
   }
 };
 
@@ -293,20 +262,13 @@ struct InitOpWithScalarParam : dmlc::Parameter<InitOpWithScalarParam> {
   int dtype;
   double value;
   DMLC_DECLARE_PARAMETER(InitOpWithScalarParam) {
-    DMLC_DECLARE_FIELD(shape)
-      .set_default(mxnet::TShape())
-      .describe("The shape of the output");
-    DMLC_DECLARE_FIELD(ctx)
-      .set_default("")
-      .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-                  "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-      .set_default(-1)
-      .add_enum("None", -1)
-      MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL
-      .describe("Target data type.");
-    DMLC_DECLARE_FIELD(value)
-      .describe("Value with which to fill newly created tensor");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::TShape()).describe("The shape of the output");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL.describe("Target data type.");
+    DMLC_DECLARE_FIELD(value).describe("Value with which to fill newly created tensor");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -327,7 +289,7 @@ inline void RangeParamParser(nnvm::NodeAttrs* attrs) {
   RangeParam param;
   param.Init(attrs->dict);
   if (!static_cast<bool>(param.infer_range) && !static_cast<bool>(param.stop)) {
-    param.stop = param.start;
+    param.stop  = param.start;
     param.start = 0;
   }
   attrs->parsed = std::move(param);
@@ -341,24 +303,16 @@ struct LinspaceParam : public dmlc::Parameter<LinspaceParam> {
   std::string ctx;
   int dtype;
   DMLC_DECLARE_PARAMETER(LinspaceParam) {
-    DMLC_DECLARE_FIELD(start)
-    .describe("The starting value of the sequence.");
-    DMLC_DECLARE_FIELD(stop)
-    .describe("The ending value of the sequence");
-    DMLC_DECLARE_FIELD(num)
-    .describe("Number of samples to generate. Must be non-negative.");
-    DMLC_DECLARE_FIELD(endpoint)
-    .set_default(true)
-    .describe("If True, stop is the last sample. Otherwise, it is not included.");
-    DMLC_DECLARE_FIELD(ctx)
-    .set_default("")
-    .describe("Context of output, in format [cpu|gpu|cpu_pinned](n)."
-              "Only used for imperative calls.");
-    DMLC_DECLARE_FIELD(dtype)
-    .set_default(-1)
-    .add_enum("None", -1)
-    MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL
-    .describe("Target data type.");
+    DMLC_DECLARE_FIELD(start).describe("The starting value of the sequence.");
+    DMLC_DECLARE_FIELD(stop).describe("The ending value of the sequence");
+    DMLC_DECLARE_FIELD(num).describe("Number of samples to generate. Must be non-negative.");
+    DMLC_DECLARE_FIELD(endpoint).set_default(true).describe(
+        "If True, stop is the last sample. Otherwise, it is not included.");
+    DMLC_DECLARE_FIELD(ctx).set_default("").describe(
+        "Context of output, in format [cpu|gpu|cpu_pinned](n)."
+        "Only used for imperative calls.");
+    DMLC_DECLARE_FIELD(dtype).set_default(-1).add_enum("None", -1)
+        MXNET_ADD_ALL_TYPES_EXT_WITH_BOOL.describe("Target data type.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream start_s, stop_s, num_s, endpoint_s, dtype_s;
@@ -367,35 +321,35 @@ struct LinspaceParam : public dmlc::Parameter<LinspaceParam> {
     num_s << num;
     endpoint_s << endpoint;
     dtype_s << dtype;
-    (*dict)["start"] = start_s.str();
-    (*dict)["stop"] = stop_s.str();
-    (*dict)["num"] = num_s.str();
+    (*dict)["start"]    = start_s.str();
+    (*dict)["stop"]     = stop_s.str();
+    (*dict)["num"]      = num_s.str();
     (*dict)["endpoint"] = endpoint_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]    = MXNetTypeWithBool2String(dtype);
   }
 };
 
-template<typename ParamType>
+template <typename ParamType>
 inline bool InitShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector *in_attrs,
-                      mxnet::ShapeVector *out_attrs) {
+                      mxnet::ShapeVector* in_attrs,
+                      mxnet::ShapeVector* out_attrs) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape param_shape = param.shape;
   if (shape_is_known(param_shape) && !features::is_enabled(features::INT64_TENSOR_SIZE)) {
-    CHECK_LT(param_shape.Size(), (int64_t{1} << 31) - 1) <<
-              "[InitShape-input] Size of tensor you are trying to allocate is larger than "
-              "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+    CHECK_LT(param_shape.Size(), (int64_t{1} << 31) - 1)
+        << "[InitShape-input] Size of tensor you are trying to allocate is larger than "
+           "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
   }
   if (!Imperative::Get()->is_np_shape()) {
     common::ConvertToNumpyShape(&param_shape);
   }
   if (shape_is_known((*out_attrs)[0]) && !shape_is_known(param_shape)) {
     if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
-      CHECK_LT(out_attrs->at(0).Size() , (int64_t{1} << 31) - 1) <<
-                "[InitShape-output] Size of tensor you are trying to allocate is larger than "
-                "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+      CHECK_LT(out_attrs->at(0).Size(), (int64_t{1} << 31) - 1)
+          << "[InitShape-output] Size of tensor you are trying to allocate is larger than "
+             "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
     }
     return true;
   }
@@ -403,10 +357,10 @@ inline bool InitShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(out_attrs->at(0));
 }
 
-template<typename ParamType, int num_in = 0U>
+template <typename ParamType, int num_in = 0U>
 inline bool InitType(const nnvm::NodeAttrs& attrs,
-                       std::vector<int> *in_attrs,
-                       std::vector<int> *out_attrs) {
+                     std::vector<int>* in_attrs,
+                     std::vector<int>* out_attrs) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), num_in);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -414,10 +368,10 @@ inline bool InitType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<typename ParamType, int num_in = 0U>
+template <typename ParamType, int num_in = 0U>
 inline bool InitNumpyType(const nnvm::NodeAttrs& attrs,
-                          std::vector<int> *in_attrs,
-                          std::vector<int> *out_attrs) {
+                          std::vector<int>* in_attrs,
+                          std::vector<int>* out_attrs) {
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), num_in);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -425,31 +379,31 @@ inline bool InitNumpyType(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<typename ParamType, bool rsp, bool csr>
+template <typename ParamType, bool rsp, bool csr>
 inline bool InitStorageType(const nnvm::NodeAttrs& attrs,
                             const int dev_mask,
                             DispatchMode* dispatch_mode,
-                            std::vector<int> *in_attrs,
-                            std::vector<int> *out_attrs) {
+                            std::vector<int>* in_attrs,
+                            std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
-  auto &out_stype = out_attrs->at(0);
+  auto& out_stype = out_attrs->at(0);
   bool dispatched = false;
   type_assign(&out_stype, kDefaultStorage);
   if (!dispatched && out_stype == kDefaultStorage) {
     // default
-    dispatched = storage_type_assign(out_attrs, kDefaultStorage,
-                                     dispatch_mode, DispatchMode::kFCompute);
+    dispatched =
+        storage_type_assign(out_attrs, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
   }
   if (!dispatched && rsp && out_stype == kRowSparseStorage) {
     // rsp
-    dispatched = storage_type_assign(out_attrs, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(out_attrs, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched && csr && out_stype == kCSRStorage) {
     // csr
-    dispatched = storage_type_assign(out_attrs, kCSRStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(out_attrs, kCSRStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched) {
     dispatched = dispatch_fallback(out_attrs, dispatch_mode);
@@ -468,28 +422,28 @@ inline bool InitStorageType(const nnvm::NodeAttrs& attrs,
  * \param val The value to use for the filling operation
  */
 template <bool is_integer = false, typename ValueType, typename xpu>
-void Fill(mshadow::Stream<xpu> *s, const TBlob& b, const OpReqType req, ValueType val) {
+void Fill(mshadow::Stream<xpu>* s, const TBlob& b, const OpReqType req, ValueType val) {
   // If b is a zero-size tensor, do nothing.
   if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
-    CHECK_LT(b.Size(), (int64_t{1} << 31) - 1) <<
-              "[Fill] Size of tensor you are trying to allocate is larger than "
-              "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+    CHECK_LT(b.Size(), (int64_t{1} << 31) - 1)
+        << "[Fill] Size of tensor you are trying to allocate is larger than "
+           "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
   }
-  if (b.Size() == 0) return;
+  if (b.Size() == 0)
+    return;
   if (req != kNullOp) {
     const size_t size = b.Size();
     if (val == 0) {
       if (req != kAddTo) {
         if (b.dev_mask() == cpu::kDevMask && size < 50000) {
-          MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(b.type_flag_, DType, {
-            memset(b.dptr_, 0, size * sizeof(DType));
-          });
+          MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(
+              b.type_flag_, DType, { memset(b.dptr_, 0, size * sizeof(DType)); });
         } else {
           // Optimize common use-case of filling with ones
           MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(b.type_flag_, DType, {
             MXNET_ASSIGN_REQ_SWITCH(req, Req, {
               mxnet_op::Kernel<mxnet_op::op_with_req<mxnet_op::set_to_int<0>, Req>, xpu>::Launch(
-                s, b.Size(), b.dptr<DType>());
+                  s, b.Size(), b.dptr<DType>());
             });
           });
         }
@@ -499,7 +453,7 @@ void Fill(mshadow::Stream<xpu> *s, const TBlob& b, const OpReqType req, ValueTyp
       MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(b.type_flag_, DType, {
         MXNET_ASSIGN_REQ_SWITCH(req, Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mxnet_op::set_one, Req>, xpu>::Launch(
-            s, b.Size(), b.dptr<DType>());
+              s, b.Size(), b.dptr<DType>());
         });
       });
     } else {
@@ -507,7 +461,7 @@ void Fill(mshadow::Stream<xpu> *s, const TBlob& b, const OpReqType req, ValueTyp
       MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(b.type_flag_, DType, {
         MXNET_ASSIGN_REQ_SWITCH(req, Req, {
           mxnet_op::Kernel<mxnet_op::op_with_req<mshadow_op::identity, Req>, xpu>::Launch(
-            s, b.Size(), b.dptr<DType>(), static_cast<DType>(val));
+              s, b.Size(), b.dptr<DType>(), static_cast<DType>(val));
         });
       });
     }
@@ -515,7 +469,7 @@ void Fill(mshadow::Stream<xpu> *s, const TBlob& b, const OpReqType req, ValueTyp
 }
 
 /*! \brief Fill output with a scalar integer value */
-template<typename xpu, int value>
+template <typename xpu, int value>
 void FillCompute(const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<TBlob>& inputs,
@@ -525,7 +479,7 @@ void FillCompute(const nnvm::NodeAttrs& attrs,
 }
 
 /*! \brief Fill output with a scalar integer value */
-template<typename xpu>
+template <typename xpu>
 void FullLikeOpCompute(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -538,12 +492,12 @@ void FullLikeOpCompute(const nnvm::NodeAttrs& attrs,
 }
 
 /*! \brief Fill output with an arbitrary value */
-template<typename xpu>
-void InitFillWithScalarCompute(const nnvm::NodeAttrs &attrs,
-                               const OpContext &ctx,
-                               const std::vector<TBlob> &inputs,
-                               const std::vector<OpReqType> &req,
-                               const std::vector<TBlob> &outputs) {
+template <typename xpu>
+void InitFillWithScalarCompute(const nnvm::NodeAttrs& attrs,
+                               const OpContext& ctx,
+                               const std::vector<TBlob>& inputs,
+                               const std::vector<OpReqType>& req,
+                               const std::vector<TBlob>& outputs) {
   CHECK_EQ(inputs.size(), 0);
   CHECK_EQ(outputs.size(), 1U);
   const auto& param = nnvm::get<InitOpWithScalarParam>(attrs.parsed);
@@ -551,7 +505,7 @@ void InitFillWithScalarCompute(const nnvm::NodeAttrs &attrs,
 }
 
 struct PopulateFullIdxRspKernel : public mxnet_op::tunable {
-  template<typename IType>
+  template <typename IType>
   MSHADOW_XINLINE static void Map(int i, IType* out) {
     KERNEL_ASSIGN(out[i], kWriteTo, i);
   }
@@ -559,8 +513,8 @@ struct PopulateFullIdxRspKernel : public mxnet_op::tunable {
 
 // Fill in the indices and values of a RowSparse NDArray to represent a zeros NDArray,
 // instead of the usual compact representation.
-template<typename xpu>
-inline void FillDnsZerosRspImpl(mshadow::Stream<xpu> *s, NDArray *dst) {
+template <typename xpu>
+inline void FillDnsZerosRspImpl(mshadow::Stream<xpu>* s, NDArray* dst) {
   using namespace rowsparse;
   using namespace mshadow::expr;
   using namespace mshadow;
@@ -581,8 +535,8 @@ inline void FillDnsZerosRspImpl(mshadow::Stream<xpu> *s, NDArray *dst) {
  * \param s - The device stream
  * \param dst - NDArray which is to be set to "all zeroes"
  */
-template<typename xpu>
-void FillZerosRspImpl(mshadow::Stream<xpu> *, const NDArray& dst) {
+template <typename xpu>
+void FillZerosRspImpl(mshadow::Stream<xpu>*, const NDArray& dst) {
   CHECK_EQ(dst.storage_type(), kRowSparseStorage) << "dst should be an RSP NDArray";
   if (dst.storage_initialized()) {
     // reset the shapes if it's not zeros (set_aux_shape() will set storage_shape to zero as well)
@@ -595,14 +549,14 @@ void FillZerosRspImpl(mshadow::Stream<xpu> *, const NDArray& dst) {
  * \param s - The device stream
  * \param dst - NDArray which is to be set to "all zeroes"
  */
-inline void FillZerosCsrImpl(mshadow::Stream<mshadow::cpu> *s, const NDArray& dst) {
+inline void FillZerosCsrImpl(mshadow::Stream<mshadow::cpu>* s, const NDArray& dst) {
   CHECK_EQ(dst.storage_type(), kCSRStorage) << "dst is not a CSR NDArray";
   dst.set_aux_shape(csr::kIdx, mshadow::Shape1(0));
   dst.CheckAndAllocAuxData(csr::kIndPtr, mshadow::Shape1(dst.shape()[0] + 1));
   TBlob indptr_data = dst.aux_data(csr::kIndPtr);
   Fill<true>(s, dst.aux_data(csr::kIndPtr), kWriteTo, 0);
 }
-void FillZerosCsrImpl(mshadow::Stream<mshadow::gpu> *s, const NDArray& dst);
+void FillZerosCsrImpl(mshadow::Stream<mshadow::gpu>* s, const NDArray& dst);
 
 /*!
  * \brief Fill an NDArray with zeros
@@ -613,7 +567,7 @@ void FillZerosCsrImpl(mshadow::Stream<mshadow::gpu> *s, const NDArray& dst);
  * \param req - Request type (i.e. kWrite, kNullOp, etc.)
  * \param outputs - Array which contains at position zero (0) the array to be set to zeros
  */
-template<typename xpu>
+template <typename xpu>
 void FillComputeZerosEx(const nnvm::NodeAttrs& attrs,
                         const OpContext& ctx,
                         const std::vector<NDArray>& inputs,
@@ -621,11 +575,12 @@ void FillComputeZerosEx(const nnvm::NodeAttrs& attrs,
                         const std::vector<NDArray>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(outputs.size(), 1);
   auto stype = outputs[0].storage_type();
   // x + 0 == x
-  if (req[0] == kNullOp || req[0] == kAddTo) return;
+  if (req[0] == kNullOp || req[0] == kAddTo)
+    return;
   if (stype == kRowSparseStorage) {
     FillZerosRspImpl(s, outputs[0]);
   } else if (stype == kCSRStorage) {
@@ -635,7 +590,7 @@ void FillComputeZerosEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void EyeFillImpl(const TBlob& out_data,
                         const OpContext& ctx,
                         const std::vector<OpReqType>& req,
@@ -643,23 +598,22 @@ inline void EyeFillImpl(const TBlob& out_data,
                         const nnvm::dim_t N,
                         const nnvm::dim_t k) {
   using namespace mxnet_op;
-  const nnvm::dim_t cnnz = std::max(num_cols - std::abs(k), (nnvm::dim_t)0);
-  const nnvm::dim_t rnnz = std::max(N - std::abs(k), (nnvm::dim_t)0);
-  const nnvm::dim_t nnz = k > 0 ? std::min(cnnz, N) :
-                          std::min(rnnz, num_cols);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  const nnvm::dim_t cnnz  = std::max(num_cols - std::abs(k), (nnvm::dim_t)0);
+  const nnvm::dim_t rnnz  = std::max(N - std::abs(k), (nnvm::dim_t)0);
+  const nnvm::dim_t nnz   = k > 0 ? std::min(cnnz, N) : std::min(rnnz, num_cols);
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_EXT(out_data.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-        Fill(s, out_data, req[0], static_cast<DType>(0));
-        if (nnz > 0) {
-          Kernel<eye_dns_fill<req_type>, xpu>::Launch(s, nnz, out_data.dptr<DType>(),
-            std::max(static_cast<nnvm::dim_t>(0), k), k, num_cols);
-        }
-      });
+    MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
+      Fill(s, out_data, req[0], static_cast<DType>(0));
+      if (nnz > 0) {
+        Kernel<eye_dns_fill<req_type>, xpu>::Launch(
+            s, nnz, out_data.dptr<DType>(), std::max(static_cast<nnvm::dim_t>(0), k), k, num_cols);
+      }
+    });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void EyeFill(const nnvm::NodeAttrs& attrs,
              const OpContext& ctx,
              const std::vector<TBlob>& inputs,
@@ -668,134 +622,131 @@ void EyeFill(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 0U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  const EyeParam& param = nnvm::get<EyeParam>(attrs.parsed);
-  const TBlob& out_data = outputs[0];
+  const EyeParam& param      = nnvm::get<EyeParam>(attrs.parsed);
+  const TBlob& out_data      = outputs[0];
   const nnvm::dim_t num_cols = param.M > 0 ? param.M : param.N;
   EyeFillImpl<xpu>(out_data, ctx, req, num_cols, param.N, param.k);
 }
 
-
 struct range_fwd {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t repeat, DType start, DType step,
-                                  int req, DType* out) {
-    KERNEL_ASSIGN(out[i], req, start + (i/repeat) * step);
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t repeat,
+                                  DType start,
+                                  DType step,
+                                  int req,
+                                  DType* out) {
+    KERNEL_ASSIGN(out[i], req, start + (i / repeat) * step);
   }
 };
 
-template<typename xpu, typename ParamType>
+template <typename xpu, typename ParamType>
 void RangeCompute(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
                   const std::vector<OpReqType>& req,
                   const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s         = ctx.get_stream<xpu>();
   const ParamType& param = nnvm::get<ParamType>(attrs.parsed);
   MSHADOW_TYPE_SWITCH_EXT(outputs[0].type_flag_, DType, {
-      // Force unsigned params to take two's complement form on ARM to ensure consistency with x86
-      // results.  Casting negative floats to unsigned types is undefined in the CPP standard.
-      auto step = std::is_signed<DType>() ? param.step : static_cast<index_t>(param.step);
-      auto start = std::is_signed<DType>() ? param.start : static_cast<index_t>(param.start);
-      Kernel<range_fwd, xpu>::Launch(s,
-                                     outputs[0].Size(),
-                                     static_cast<int>(param.repeat),
-                                     static_cast<DType>(start),
-                                     static_cast<DType>(step),
-                                     req[0],
-                                     outputs[0].dptr<DType>());
+    // Force unsigned params to take two's complement form on ARM to ensure consistency with x86
+    // results.  Casting negative floats to unsigned types is undefined in the CPP standard.
+    auto step  = std::is_signed<DType>() ? param.step : static_cast<index_t>(param.step);
+    auto start = std::is_signed<DType>() ? param.start : static_cast<index_t>(param.start);
+    Kernel<range_fwd, xpu>::Launch(s,
+                                   outputs[0].Size(),
+                                   static_cast<int>(param.repeat),
+                                   static_cast<DType>(start),
+                                   static_cast<DType>(step),
+                                   req[0],
+                                   outputs[0].dptr<DType>());
   });
 }
 
-
 inline bool RangeShape(const nnvm::NodeAttrs& attrs,
-                       mxnet::ShapeVector *in_attrs,
-                       mxnet::ShapeVector *out_attrs) {
+                       mxnet::ShapeVector* in_attrs,
+                       mxnet::ShapeVector* out_attrs) {
   const RangeParam& param = nnvm::get<RangeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
-  CHECK_NE(param.step, 0)
-    << "Range does not support step=0, received " << param.step;
-  CHECK(param.repeat > 0)
-    << "Range only supports repeat > 0, received " << param.repeat;
+  CHECK_NE(param.step, 0) << "Range does not support step=0, received " << param.step;
+  CHECK(param.repeat > 0) << "Range only supports repeat > 0, received " << param.repeat;
   if (param.infer_range && !param.stop.has_value()) {
     return false;
   }
   if (param.step > 0) {
     CHECK(param.start < param.stop.value())
-      << "Invalid range (start, stop, step) = "
-      << "(" << param.start << "," << param.stop.value() << "," << param.step << ")";
+        << "Invalid range (start, stop, step) = "
+        << "(" << param.start << "," << param.stop.value() << "," << param.step << ")";
   } else {
     CHECK(param.start > param.stop.value())
-      << "Invalid range (start, stop, step)= "
-      << "(" << param.start << "," << param.stop.value() << "," << param.step << ")";
+        << "Invalid range (start, stop, step)= "
+        << "(" << param.start << "," << param.stop.value() << "," << param.step << ")";
   }
-  const double out_size = std::ceil((param.stop.value() - param.start) / param.step)
-                          * param.repeat;
+  const double out_size = std::ceil((param.stop.value() - param.start) / param.step) * param.repeat;
   mxnet::TShape output_shape = mxnet::TShape({static_cast<nnvm::dim_t>(out_size)});
   if (!features::is_enabled(features::INT64_TENSOR_SIZE)) {
-    CHECK_LT(output_shape.Size(), (int64_t{1} << 31) - 1) <<
-              "[RangeShape] Size of tensor you are trying to allocate is larger than "
-              "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
+    CHECK_LT(output_shape.Size(), (int64_t{1} << 31) - 1)
+        << "[RangeShape] Size of tensor you are trying to allocate is larger than "
+           "2^31 elements. Please build with flag USE_INT64_TENSOR_SIZE=1";
   }
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, output_shape);
   return true;
 }
 
 struct linspace_fwd {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, double start, double stop, double step,
-                                  int req, DType* out) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  double start,
+                                  double stop,
+                                  double step,
+                                  int req,
+                                  DType* out) {
     KERNEL_ASSIGN(out[i], req, static_cast<DType>(start + step * i));
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void LinspaceCompute(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
                      const std::vector<OpReqType>& req,
                      const std::vector<TBlob>& outputs) {
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s             = ctx.get_stream<xpu>();
   const LinspaceParam& param = nnvm::get<LinspaceParam>(attrs.parsed);
   MSHADOW_TYPE_SWITCH_EXT_WITH_BOOL(outputs[0].type_flag_, DType, {
-      index_t step_num = param.endpoint ? param.num - 1 : param.num;
-      double step = step_num > 0 ? (param.stop - param.start) / step_num : 0.0f;
-      Kernel<linspace_fwd, xpu>::Launch(s,
-                                        outputs[0].Size(),
-                                        param.start,
-                                        param.stop,
-                                        step,
-                                        req[0],
-                                        outputs[0].dptr<DType>());
+    index_t step_num = param.endpoint ? param.num - 1 : param.num;
+    double step      = step_num > 0 ? (param.stop - param.start) / step_num : 0.0f;
+    Kernel<linspace_fwd, xpu>::Launch(
+        s, outputs[0].Size(), param.start, param.stop, step, req[0], outputs[0].dptr<DType>());
   });
 }
 
 inline bool LinspaceShape(const nnvm::NodeAttrs& attrs,
-                       mxnet::ShapeVector *in_attrs,
-                       mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   const LinspaceParam& param = nnvm::get<LinspaceParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 0U);
   CHECK_EQ(out_attrs->size(), 1U);
-  CHECK_GE(param.num, 0)
-    << "Number of sequence should be non-negative, received " << param.num;
+  CHECK_GE(param.num, 0) << "Number of sequence should be non-negative, received " << param.num;
   mxnet::TShape shape = mxnet::TShape({static_cast<nnvm::dim_t>(param.num)});
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, shape);
   return true;
 }
 
 inline bool RangeLikeShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   const RangeLikeParam& param = nnvm::get<RangeLikeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   int real_axis = -1;
   if (param.axis.has_value()) {
-    real_axis = param.axis.value() < 0 ?
-        (param.axis.value() + (*in_attrs)[0].ndim()) : param.axis.value();
-    CHECK(real_axis >=0 && real_axis < (*in_attrs)[0].ndim())
+    real_axis =
+        param.axis.value() < 0 ? (param.axis.value() + (*in_attrs)[0].ndim()) : param.axis.value();
+    CHECK(real_axis >= 0 && real_axis < (*in_attrs)[0].ndim())
         << "cannot handle param.axis " << param.axis.value() << ".";
   }
   if (real_axis == -1) {
diff --git a/src/operator/tensor/la_op-inl.h b/src/operator/tensor/la_op-inl.h
index b185c7b5b9d1..4958e104726d 100644
--- a/src/operator/tensor/la_op-inl.h
+++ b/src/operator/tensor/la_op-inl.h
@@ -35,32 +35,39 @@ using namespace mshadow;
 
 // Copies lower/upper triangular part to upper/lower, i.e. to the opposite side.
 struct CopyTriangularToOppositeSide {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, size_t matrix_size, index_t stride,
-                                  DType* data, bool to_lower) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  size_t matrix_size,
+                                  index_t stride,
+                                  DType* data,
+                                  bool to_lower) {
     // Below computation works even when we are dealing with a batch of matrices.
     const index_t row((i % matrix_size) / stride), col(i % stride);
     if (row > col) {
-       if (to_lower) {
-         data[i] = data[i + (col - row) * (stride - 1)];
-       } else {
-         data[i + (col - row) * (stride - 1)] = data[i];
-       }
+      if (to_lower) {
+        data[i] = data[i + (col - row) * (stride - 1)];
+      } else {
+        data[i + (col - row) * (stride - 1)] = data[i];
+      }
     }
   }
 };
 
 // Zero's lower/upper triangular part of a matrix.
 struct ZeroTriangular {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, size_t matrix_size, index_t stride,
-                                  DType* data, bool zero_lower) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  size_t matrix_size,
+                                  index_t stride,
+                                  DType* data,
+                                  bool zero_lower) {
     const index_t row((i % matrix_size) / stride), col(i % stride);
-    if ((!zero_lower && (row < col)) || (zero_lower && (row > col))) data[i] = 0;
+    if ((!zero_lower && (row < col)) || (zero_lower && (row > col)))
+      data[i] = 0;
   }
 };
 struct Scale {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, DType scale, DType* data) {
     data[i] *= scale;
   }
@@ -71,238 +78,295 @@ struct Scale {
 
 // D = gemm(A,B,C)
 struct gemm {
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& A, const Tensor<xpu, dim, DType>& B,
-                 const Tensor<xpu, dim, DType>& C, DType alpha, DType beta,
-                 bool tA, bool tB, Stream<xpu> *s) {
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 DType alpha,
+                 DType beta,
+                 bool tA,
+                 bool tB,
+                 Stream<xpu>* s) {
     linalg_batch_gemm(A, B, C, alpha, beta, tA, tB, s);
   }
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& A, const Tensor<xpu, dim, DType>& B,
-                 const Tensor<xpu, dim, DType>& C, const Tensor<xpu, dim, DType>& D,
-                 Stream<xpu> *s, const nnvm::NodeAttrs& attrs) {
-    if ( C.dptr_ != D.dptr_ ) Copy(D, C, s);
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 const Tensor<xpu, dim, DType>& D,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
+    if (C.dptr_ != D.dptr_)
+      Copy(D, C, s);
     const LaMatrixMacParam& param = nnvm::get<LaMatrixMacParam>(attrs.parsed);
-    op(A, B, D, DType(param.alpha), DType(param.beta), param.transpose_a,
-       param.transpose_b, s);
+    op(A, B, D, DType(param.alpha), DType(param.beta), param.transpose_a, param.transpose_b, s);
   }
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& A, const Tensor<xpu, dim, DType>& B,
-                 const Tensor<xpu, dim, DType>& C, const Tensor<xpu, dim, DType>& D,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 const Tensor<xpu, dim, DType>& D,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, C, D, s, attrs);
   }
 };
 
 // C = gemm2(A,B)
 struct gemm2 {
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& A, const Tensor<xpu, dim, DType>& B,
-                 const Tensor<xpu, dim, DType>& C, DType alpha, bool tA, bool tB,
-                 Stream<xpu> *s) {
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 DType alpha,
+                 bool tA,
+                 bool tB,
+                 Stream<xpu>* s) {
     gemm::op(A, B, C, DType(alpha), DType(0), tA, tB, s);
   }
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& A, const Tensor<xpu, dim, DType>& B,
-                 const Tensor<xpu, dim, DType>& C, Stream<xpu> *s,
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 Stream<xpu>* s,
                  const nnvm::NodeAttrs& attrs) {
     const LaMatrixMultParam& param = nnvm::get<LaMatrixMultParam>(attrs.parsed);
     op(A, B, C, DType(param.alpha), param.transpose_a, param.transpose_b, s);
   }
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& A, const Tensor<xpu, dim, DType>& B,
-                 const Tensor<xpu, dim, DType>& C, const OpContext& ctx,
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, C, s, attrs);
   }
 };
 
 // B = potrf(A).
 struct potrf {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 Stream<xpu> *s, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     const LaCholeskyParam& param = nnvm::get<LaCholeskyParam>(attrs.parsed);
     if (A.shape_.Size() == 0U) {
       return;
     }
-    if ( A.dptr_ != B.dptr_ ) Copy(B, A, s);
+    if (A.dptr_ != B.dptr_)
+      Copy(B, A, s);
     linalg_batch_potrf(B, param.lower, s);
     using namespace mxnet_op;
-    Kernel<ZeroTriangular, xpu>::Launch(s, B.MSize(), B.size(1)*B.stride_, B.stride_,
-                                   B.dptr_, !param.lower);
+    Kernel<ZeroTriangular, xpu>::Launch(
+        s, B.MSize(), B.size(1) * B.stride_, B.stride_, B.dptr_, !param.lower);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, s, attrs);
   }
 };
 
 // A = potri(B).
 struct potri {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& A,
-                 Stream<xpu> *s, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& A,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     const LaCholeskyParam& param = nnvm::get<LaCholeskyParam>(attrs.parsed);
-    if ( A.dptr_ != B.dptr_ ) Copy(A, B, s);
+    if (A.dptr_ != B.dptr_)
+      Copy(A, B, s);
     linalg_batch_potri(A, param.lower, s);
     using namespace mxnet_op;
-    Kernel<CopyTriangularToOppositeSide, xpu>::Launch(s, A.MSize(), A.size(1)*A.stride_, A.stride_,
-                                          A.dptr_, !param.lower);
+    Kernel<CopyTriangularToOppositeSide, xpu>::Launch(
+        s, A.MSize(), A.size(1) * A.stride_, A.stride_, A.dptr_, !param.lower);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& A,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& A,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(B, A, s, attrs);
   }
 };
 
 // C = trsm(A,B)
 struct trsm {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& C,
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& C,
+                 DType alpha,
+                 bool rightside,
+                 bool lower,
+                 bool transpose,
+                 Stream<xpu>* s) {
     linalg_batch_trsm(A, C, alpha, rightside, lower, transpose, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
                  const Tensor<xpu, 3, DType>& C,
-                 Stream<xpu> *s, const nnvm::NodeAttrs& attrs) {
-    if ( B.dptr_ != C.dptr_ ) Copy(C, B, s);
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
+    if (B.dptr_ != C.dptr_)
+      Copy(C, B, s);
     const LaTriangMatrixMultParam& param = nnvm::get<LaTriangMatrixMultParam>(attrs.parsed);
     op(A, C, DType(param.alpha), param.rightside, param.lower, param.transpose, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
                  const Tensor<xpu, 3, DType>& C,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, C, s, attrs);
   }
 };
 
 // C = trmm(A,B)
 struct trmm {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& C,
-                 DType alpha, bool rightside, bool lower, bool transpose, Stream<xpu> *s) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& C,
+                 DType alpha,
+                 bool rightside,
+                 bool lower,
+                 bool transpose,
+                 Stream<xpu>* s) {
     linalg_batch_trmm(A, C, alpha, rightside, lower, transpose, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 const Tensor<xpu, 3, DType>& C, Stream<xpu> *s,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& C,
+                 Stream<xpu>* s,
                  const nnvm::NodeAttrs& attrs) {
-    if ( B.dptr_ != C.dptr_ ) Copy(C, B, s);
+    if (B.dptr_ != C.dptr_)
+      Copy(C, B, s);
     const LaTriangMatrixMultParam& param = nnvm::get<LaTriangMatrixMultParam>(attrs.parsed);
     op(A, C, DType(param.alpha), param.rightside, param.lower, param.transpose, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 const Tensor<xpu, 3, DType>& C, const OpContext& ctx,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& C,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, C, s, attrs);
   }
 };
 
 // Useful operator that is not part of BLAS/LAPACK.
 struct ForwardSumLogDiag {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, int N, int stride, DType* A, DType* B) {
     DType sum(0);
     const int offset(i * N * stride);
-    for ( int j = 0; j < N; ++j ) {
-      sum += log(A[offset+j*(stride+1)]);
+    for (int j = 0; j < N; ++j) {
+      sum += log(A[offset + j * (stride + 1)]);
     }
     B[i] = sum;
   }
 };
 struct sumlogdiag {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 1, DType>& B,
-                 Stream<xpu> *s, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 1, DType>& B,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     CHECK_EQ(A.size(1), A.size(2)) << "sumlogdiag operator requires square matrices as input.";
     using namespace mxnet_op;
     Kernel<ForwardSumLogDiag, xpu>::Launch(s, A.size(0), A.size(1), A.stride_, A.dptr_, B.dptr_);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 1, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 1, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, s, attrs);
   }
 };
 
-template<bool forward>
+template <bool forward>
 struct CopyDiag {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, int k, int n, DType* A, DType* B) {
     // Index of the matrix from which the diagonal should be extracted.
-    const int matrix(i / (n-abs(k)));
+    const int matrix(i / (n - abs(k)));
     // Index of the diagonal element that should be extracted.
-    const int index(i % (n-abs(k)));
+    const int index(i % (n - abs(k)));
     // row/col that must be looked up.
-    const int row(index-(k < 0 ? k : 0)), col(index+(k > 0 ? k :0));
+    const int row(index - (k < 0 ? k : 0)), col(index + (k > 0 ? k : 0));
     if (forward) {
-      B[i] = A[(matrix*n+row)*n+col];
+      B[i] = A[(matrix * n + row) * n + col];
     } else {
-      B[(matrix*n+row)*n+col] = A[i];
+      B[(matrix * n + row) * n + col] = A[i];
     }
   }
 };
 
 struct copydiag {
   // Extracts diagonal from matrix.
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 2, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 2, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     using namespace mxnet_op;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s           = ctx.get_stream<xpu>();
     const LaDiagParam& param = nnvm::get<LaDiagParam>(attrs.parsed);
     Kernel<CopyDiag<true>, xpu>::Launch(s, B.MSize(), param.offset, A.size(1), A.dptr_, B.dptr_);
   }
   // Sets diagonal in matrix.
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 2, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     using namespace mxnet_op;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s           = ctx.get_stream<xpu>();
     const LaDiagParam& param = nnvm::get<LaDiagParam>(attrs.parsed);
     Kernel<set_zero, xpu>::Launch(s, B.MSize(), B.dptr_);
     Kernel<CopyDiag<false>, xpu>::Launch(s, A.MSize(), param.offset, B.size(1), A.dptr_, B.dptr_);
   }
 };
 
-template<bool forward>
+template <bool forward>
 struct CopyTrian {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, bool lower, int k, int n, DType* A, DType* B) {
     // Matrix that this index belongs to.
-    const int matrix(i/(n*n));
+    const int matrix(i / (n * n));
     // Row/Col that this index represents.
-    int row((i/n)%n), col(i%n);
+    int row((i / n) % n), col(i % n);
     if ((k > 0) || ((k == 0) && !lower)) {
-       // When working on upper triangle we switch to transposed coordinates for indexing.
-       int tmp(row);
-       row = col;
-       col = tmp;
+      // When working on upper triangle we switch to transposed coordinates for indexing.
+      int tmp(row);
+      row = col;
+      col = tmp;
     }
     // Actual row inside the lower triangular matrix after offset adjustment.
     row -= abs(k);
     if (row >= col) {
       // Index in the 1-dimensional array that holds the values of the triangle.
-      const int index((row*(row+1))/2+col);
+      const int index((row * (row + 1)) / 2 + col);
       // Total number of entries in the triangle.
-      const int m(((n-abs(k))*(n-abs(k)+1))/2);
+      const int m(((n - abs(k)) * (n - abs(k) + 1)) / 2);
       if (forward) {
-        B[m*matrix+index] = A[i];
+        B[m * matrix + index] = A[i];
       } else {
-        B[i] = A[m*matrix+index];
+        B[i] = A[m * matrix + index];
       }
     }
   }
@@ -310,49 +374,61 @@ struct CopyTrian {
 
 struct copytrian {
   // Extracts triangle from matrix.
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 2, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 2, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     using namespace mxnet_op;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s            = ctx.get_stream<xpu>();
     const LaTrianParam& param = nnvm::get<LaTrianParam>(attrs.parsed);
-    Kernel<CopyTrian<true>, xpu>::Launch(s, A.MSize(), param.lower, param.offset,
-                                         A.size(1), A.dptr_, B.dptr_);
+    Kernel<CopyTrian<true>, xpu>::Launch(
+        s, A.MSize(), param.lower, param.offset, A.size(1), A.dptr_, B.dptr_);
   }
   // Sets triangle in matrix.
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 2, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 2, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     using namespace mxnet_op;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s            = ctx.get_stream<xpu>();
     const LaTrianParam& param = nnvm::get<LaTrianParam>(attrs.parsed);
     Kernel<set_zero, xpu>::Launch(s, B.MSize(), B.dptr_);
-    Kernel<CopyTrian<false>, xpu>::Launch(s, B.MSize(), param.lower, param.offset,
-                                          B.size(1), A.dptr_, B.dptr_);
+    Kernel<CopyTrian<false>, xpu>::Launch(
+        s, B.MSize(), param.lower, param.offset, B.size(1), A.dptr_, B.dptr_);
   }
 };
 
 // B = syrk(A)
 struct syrk {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 DType alpha, DType beta, bool tA, Stream<xpu> *s) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 DType alpha,
+                 DType beta,
+                 bool tA,
+                 Stream<xpu>* s) {
     linalg_batch_syrk(A, B, alpha, beta, tA, s);
     // Symmetric B is in lower triangle: Copy to upper
     using namespace mxnet_op;
-    Kernel<CopyTriangularToOppositeSide, xpu>::Launch(s, B.MSize(), B.size(1)*B.stride_,
-                                          B.stride_, B.dptr_, false);
+    Kernel<CopyTriangularToOppositeSide, xpu>::Launch(
+        s, B.MSize(), B.size(1) * B.stride_, B.stride_, B.dptr_, false);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 Stream<xpu> *s, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     const LaSyrkParam& param = nnvm::get<LaSyrkParam>(attrs.parsed);
     op(A, B, DType(param.alpha), DType(0), param.transpose, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& B,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(A, B, s, attrs);
   }
 };
@@ -365,19 +441,22 @@ struct syrk {
 // - Two different LAPACK functions are called (the first, gelqf, returns an
 //   internal representation, which has to be converted into Q, L)
 struct gelqf {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& Q,
-                 const Tensor<xpu, 3, DType>& L, const OpContext& ctx,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& Q,
+                 const Tensor<xpu, 3, DType>& L,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    if (A.dptr_ != Q.dptr_) Copy(Q, A, s);
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+    if (A.dptr_ != Q.dptr_)
+      Copy(Q, A, s);
     // From here on, we work on Q only
     // Reserve workspace
     // The size is determined by workspace queries, done on the first items
     // of the batch
     int ws_size(linalg_gelqf_workspace_query(Q[0], s));
-    Tensor<xpu, 1, DType> work = ctx.requested[0]
-      .get_space_typed<xpu, 1, DType>(Shape1(ws_size), s);
+    Tensor<xpu, 1, DType> work =
+        ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(ws_size), s);
     // Loop over items in batch
     linalg_check_batch_size(A.size(0), Q.size(0), L.size(0));
     int m = Q.size(1);  // Q[i] has shape (m, n)
@@ -393,8 +472,8 @@ struct gelqf {
       Tensor<xpu, 2, DType> QLeft(Qi.dptr_, Shape2(m, m), Qi.stride_, s);
       Copy(Li, QLeft, s);
       using namespace mxnet_op;
-      Kernel<ZeroTriangular, xpu>::Launch(s, Li.MSize(), m*Li.stride_, Li.stride_,
-                                     Li.dptr_, false);
+      Kernel<ZeroTriangular, xpu>::Launch(
+          s, Li.MSize(), m * Li.stride_, Li.stride_, Li.dptr_, false);
       // Call orglq: Input is Qi and part of work. Overwrites Qi by final Q
       // matrix (conversion from internal representation)
       linalg_orglq(Qi, work, s);
@@ -407,9 +486,9 @@ struct gelqf {
 // If u denotes a row, we choose the sign s.t. u_k > 0, where k = argmax|u_j|. In case
 // of a tie, the smaller index k decides.
 struct SyevdEigenVecSigns {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, int n, DType* U, int ldu) {
-    DType* urow(U + (i*ldu));
+    DType* urow(U + (i * ldu));
     DType maxval(fabs(urow[0])), uval(0.0);
     int maxind(0);
     for (int i = 1; i < n; ++i) {
@@ -434,35 +513,39 @@ struct SyevdEigenVecSigns {
 // - Needs workspace (both DType and int), size of which is determined by a
 //   workspace query
 struct syevd {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& U,
-                 const Tensor<xpu, 2, DType>& L, const OpContext& ctx,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& U,
+                 const Tensor<xpu, 2, DType>& L,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    using IndexT = typename LapackIndex<xpu>::IndexT;
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+    using IndexT   = typename LapackIndex<xpu>::IndexT;
     linalg_check_batch_size(A.size(0), U.size(0), L.size(0));
-    if (A.dptr_ != U.dptr_) Copy(U, A, s);
+    if (A.dptr_ != U.dptr_)
+      Copy(U, A, s);
     // From here on, we work on U only
     // Reserve workspace (size determined by query)
     IndexT lwork(linalg_syevd_workspace_query(U[0], L[0], s));
-    Tensor<xpu, 1, DType> work = ctx.requested[0]
-      .get_space_typed<xpu, 1, DType>(Shape1(lwork), s);
+    Tensor<xpu, 1, DType> work = ctx.requested[0].get_space_typed<xpu, 1, DType>(Shape1(lwork), s);
     // Loop over items in batch
     for (index_t i = 0; i < U.size(0); ++i) {
       linalg_syevd(U[i], L[i], work, s);
     }
     // Set signs of eigenvectors in a deterministic way
     using namespace mxnet_op;
-    Kernel<SyevdEigenVecSigns, xpu>::Launch
-      (s, U.size(0)*U.size(1), U.size(1), U.dptr_, U.stride_);
+    Kernel<SyevdEigenVecSigns, xpu>::Launch(
+        s, U.size(0) * U.size(1), U.size(1), U.dptr_, U.stride_);
   }
 };
 
 // A = inverse(B).
 struct inverse {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& A,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& A,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     // Since inverse(A) = trans(inverse(trans(A))), so we don't need to transpose
     // A even if we are using the col-major version of getrf and getri routines.
     if (B.shape_.Size() == 0U) {
@@ -474,27 +557,31 @@ struct inverse {
 
 // this kernel computes sign(det(A)), log(abs(det(A))) from LU decomposition
 struct SignedLogDet {
-  template<typename DType, typename IndexT>
-  MSHADOW_XINLINE static void Map(size_t i, size_t N, IndexT* pivot,
-                                  DType *LU, DType* sign, DType *logdet) {
+  template <typename DType, typename IndexT>
+  MSHADOW_XINLINE static void Map(size_t i,
+                                  size_t N,
+                                  IndexT* pivot,
+                                  DType* LU,
+                                  DType* sign,
+                                  DType* logdet) {
     IndexT changes(0);
     DType diag_sign(1);
     DType diag_logsum(0);
-    IndexT *pivot_mat = pivot + i * N;
-    DType *LU_mat = LU + i * N * N;
+    IndexT* pivot_mat = pivot + i * N;
+    DType* LU_mat     = LU + i * N * N;
     for (IndexT j = 0; j < N; ++j) {
       changes += (pivot_mat[j] != (j + 1));
       DType diag = LU_mat[j * (N + 1)];
       diag_sign *= ((DType(0) < diag) - (diag < DType(0)));
       diag_logsum += std::log(std::abs(diag));
     }
-    sign[i] = (changes % 2 == 1 ? DType(-1) : DType(1)) * diag_sign;
+    sign[i]   = (changes % 2 == 1 ? DType(-1) : DType(1)) * diag_sign;
     logdet[i] = diag_logsum;
   }
 };
 
 struct CopyArray {
-  template<typename SType, typename DType>
+  template <typename SType, typename DType>
   MSHADOW_XINLINE static void Map(size_t i, SType* src, DType* dest) {
     dest[i] = src[i];
   }
@@ -507,16 +594,18 @@ struct CopyArray {
 //     det(U) = prod(diag(U))
 // LU and pivot store the LU decomposition output which will be used in computing gradient
 struct det {
-  template<typename xpu, typename DType, typename IndexT>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 1, DType>& det,
-                 const Tensor<xpu, 3, DType>& LU, const Tensor<xpu, 2, IndexT>& pivot,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType, typename IndexT>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 1, DType>& det,
+                 const Tensor<xpu, 3, DType>& LU,
+                 const Tensor<xpu, 2, IndexT>& pivot,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     if (A.shape_.Size() == 0U) {
       return;
     }
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 1, DType> sign = ctx.requested[0]
-      .get_space_typed<xpu, 1, DType>(det.shape_, s);
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
+    Tensor<xpu, 1, DType> sign = ctx.requested[0].get_space_typed<xpu, 1, DType>(det.shape_, s);
     Copy(LU, A, s);
     // since det(A) = det(trans(A)), so we'll use col-major blas routines here
     using namespace mxnet_op;
@@ -532,8 +621,8 @@ struct det {
       linalg_batch_getrf(LU, pivot, false, s);
     }
 
-    Kernel<SignedLogDet, xpu>::Launch(s, pivot.size(0), pivot.size(1), pivot.dptr_,
-                                      LU.dptr_, sign.dptr_, det.dptr_);
+    Kernel<SignedLogDet, xpu>::Launch(
+        s, pivot.size(0), pivot.size(1), pivot.dptr_, LU.dptr_, sign.dptr_, det.dptr_);
     const_cast<Tensor<xpu, 1, DType>&>(det) = sign * F<mshadow_op::exp>(det);
   }
 };
@@ -541,15 +630,18 @@ struct det {
 // sign = sign(det(A))
 // logabsdet = log(abs(det(A)))
 struct slogdet {
-  template<typename xpu, typename DType, typename IndexT>
-  static void op(const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 1, DType>& sign,
-                 const Tensor<xpu, 1, DType>& logabsdet, const Tensor<xpu, 3, DType>& LU,
-                 const Tensor<xpu, 2, IndexT>& pivot, const OpContext& ctx,
+  template <typename xpu, typename DType, typename IndexT>
+  static void op(const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 1, DType>& sign,
+                 const Tensor<xpu, 1, DType>& logabsdet,
+                 const Tensor<xpu, 3, DType>& LU,
+                 const Tensor<xpu, 2, IndexT>& pivot,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
     if (A.shape_.Size() == 0U) {
       return;
     }
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     Copy(LU, A, s);
     using namespace mxnet_op;
     using namespace mshadow::expr;
@@ -563,20 +655,24 @@ struct slogdet {
     } else {
       linalg_batch_getrf(LU, pivot, false, s);
     }
-    Kernel<SignedLogDet, xpu>::Launch(s, pivot.size(0), pivot.size(1), pivot.dptr_,
-                                      LU.dptr_, sign.dptr_, logabsdet.dptr_);
+    Kernel<SignedLogDet, xpu>::Launch(
+        s, pivot.size(0), pivot.size(1), pivot.dptr_, LU.dptr_, sign.dptr_, logabsdet.dptr_);
   }
 };
 
 // Backward operators (always using batch processing)
 
 struct gemm_backward {
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& dD, const Tensor<xpu, dim, DType>& A,
-                 const Tensor<xpu, dim, DType>& B, const Tensor<xpu, dim, DType>& C,
-                 const Tensor<xpu, dim, DType>& dA, const Tensor<xpu, dim, DType>& dB,
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& dD,
+                 const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 const Tensor<xpu, dim, DType>& dA,
+                 const Tensor<xpu, dim, DType>& dB,
                  const Tensor<xpu, dim, DType>& dC,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     const LaMatrixMacParam& param = nnvm::get<LaMatrixMacParam>(attrs.parsed);
     bool tA(param.transpose_a), tB(param.transpose_b);
     (tA ? gemm::op(B, dD, dA, DType(param.alpha), DType(0), tB, true, s)
@@ -587,23 +683,30 @@ struct gemm_backward {
     using namespace mxnet_op;
     Kernel<Scale, xpu>::Launch(s, dC.MSize(), DType(param.beta), dC.dptr_);
   }
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& dD, const Tensor<xpu, dim, DType>& A,
-                 const Tensor<xpu, dim, DType>& B, const Tensor<xpu, dim, DType>& C,
-                 const Tensor<xpu, dim, DType>& dA, const Tensor<xpu, dim, DType>& dB,
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& dD,
+                 const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& C,
+                 const Tensor<xpu, dim, DType>& dA,
+                 const Tensor<xpu, dim, DType>& dB,
                  const Tensor<xpu, dim, DType>& dC,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dD, A, B, C, dA, dB, dC, s, attrs);
   }
 };
 
 struct gemm2_backward {
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& dC, const Tensor<xpu, dim, DType>& A,
-                 const Tensor<xpu, dim, DType>& B, const Tensor<xpu, dim, DType>& dA,
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& dC,
+                 const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& dA,
                  const Tensor<xpu, dim, DType>& dB,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     const LaMatrixMultParam& param = nnvm::get<LaMatrixMultParam>(attrs.parsed);
     bool tA(param.transpose_a), tB(param.transpose_b);
     (tA ? gemm::op(B, dC, dA, DType(param.alpha), DType(0), tB, true, s)
@@ -611,21 +714,26 @@ struct gemm2_backward {
     (tB ? gemm::op(dC, A, dB, DType(param.alpha), DType(0), true, tA, s)
         : gemm::op(A, dC, dB, DType(param.alpha), DType(0), !tA, false, s));
   }
-  template<typename xpu, int dim, typename DType>
-  static void op(const Tensor<xpu, dim, DType>& dC, const Tensor<xpu, dim, DType>& A,
-                 const Tensor<xpu, dim, DType>& B, const Tensor<xpu, dim, DType>& dA,
+  template <typename xpu, int dim, typename DType>
+  static void op(const Tensor<xpu, dim, DType>& dC,
+                 const Tensor<xpu, dim, DType>& A,
+                 const Tensor<xpu, dim, DType>& B,
+                 const Tensor<xpu, dim, DType>& dA,
                  const Tensor<xpu, dim, DType>& dB,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dC, A, B, dA, dB, s, attrs);
   }
 };
 
 struct potrf_backward {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dB, const Tensor<xpu, 3, DType>& B,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dB,
+                 const Tensor<xpu, 3, DType>& B,
                  const Tensor<xpu, 3, DType>& dA,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of B = potrf(A).
     //   dA = 0.5 * B**(-T) * copyLTU(B**T * dB) * B**(-1)
     // Here, copyLTU(M) creates a symmetric matrix from the square matrix M
@@ -637,30 +745,35 @@ struct potrf_backward {
     if (dA.shape_.Size() == 0U) {
       return;
     }
-    if ( dB.dptr_ != dA.dptr_ ) {
+    if (dB.dptr_ != dA.dptr_) {
       Copy(dA, dB, s);
     }
     trmm::op(B, dA, DType(1.0), !param.lower, param.lower, true, s);
     using namespace mxnet_op;
-    Kernel<CopyTriangularToOppositeSide, xpu>::Launch
-           (s, dA.MSize(), dA.size(1)*dA.stride_, dA.stride_, dA.dptr_, !param.lower);
+    Kernel<CopyTriangularToOppositeSide, xpu>::Launch(
+        s, dA.MSize(), dA.size(1) * dA.stride_, dA.stride_, dA.dptr_, !param.lower);
     trsm::op(B, dA, DType(1.0), false, param.lower, param.lower, s);
     trsm::op(B, dA, DType(0.5), true, param.lower, !param.lower, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dB, const Tensor<xpu, 3, DType>& B,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dB,
+                 const Tensor<xpu, 3, DType>& B,
                  const Tensor<xpu, 3, DType>& dA,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dB, B, dA, s, attrs);
   }
 };
 
 struct potri_backward {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dA, const Tensor<xpu, 3, DType>& B,
-                 const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& dB,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dA,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& dB,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of A = potri(B).
     // dB = -tril( A * (dA + dA**T) * B**(-T)), where tril() extracts lower triangle
     // and diagonal. We must not assume that dA is symmetric.
@@ -678,53 +791,68 @@ struct potri_backward {
     }
     trsm::op(B, dB, DType(-1.), param.lower, param.lower, true, s);
     using namespace mxnet_op;
-    Kernel<ZeroTriangular, xpu>::Launch(s, dB.MSize(), dB.size(1)*dB.stride_, dB.stride_,
-                                   dB.dptr_, !param.lower);
+    Kernel<ZeroTriangular, xpu>::Launch(
+        s, dB.MSize(), dB.size(1) * dB.stride_, dB.stride_, dB.dptr_, !param.lower);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dA, const Tensor<xpu, 3, DType>& B,
-                 const Tensor<xpu, 3, DType>& A, const Tensor<xpu, 3, DType>& dB,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dA,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& dB,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dA, B, A, dB, s, attrs);
   }
 };
 
 struct trsm_backward {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dC, const Tensor<xpu, 3, DType>& A,
-                 const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& C,
-                 const Tensor<xpu, 3, DType>& dA, const Tensor<xpu, 3, DType>& dB,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dC,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& C,
+                 const Tensor<xpu, 3, DType>& dA,
+                 const Tensor<xpu, 3, DType>& dB,
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of C = trsm(A,B).
     const LaTriangMatrixMultParam& param = nnvm::get<LaTriangMatrixMultParam>(attrs.parsed);
     // Compute dB
-    if ( dB.dptr_ != dC.dptr_ ) Copy(dB, dC, s);
+    if (dB.dptr_ != dC.dptr_)
+      Copy(dB, dC, s);
     trsm::op(A, dB, DType(param.alpha), param.rightside, param.lower, !param.transpose, s);
     // Compute dA
     const bool da_left(param.rightside == param.transpose);
-    DType scale(-1.0/param.alpha);
+    DType scale(-1.0 / param.alpha);
     (da_left ? gemm::op(dB, C, dA, scale, DType(0), param.transpose, !param.transpose, s)
              : gemm::op(C, dB, dA, scale, DType(0), !param.transpose, param.transpose, s));
     using namespace mxnet_op;
-    Kernel<ZeroTriangular, xpu>::Launch(s, dA.MSize(), dA.size(1)*dA.stride_, dA.stride_,
-                                   dA.dptr_, !param.lower);
+    Kernel<ZeroTriangular, xpu>::Launch(
+        s, dA.MSize(), dA.size(1) * dA.stride_, dA.stride_, dA.dptr_, !param.lower);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dC, const Tensor<xpu, 3, DType>& A,
-                 const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& C,
-                 const Tensor<xpu, 3, DType>& dA, const Tensor<xpu, 3, DType>& dB,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dC,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& C,
+                 const Tensor<xpu, 3, DType>& dA,
+                 const Tensor<xpu, 3, DType>& dB,
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dC, A, B, C, dA, dB, s, attrs);
   }
 };
 
 struct trmm_backward {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dC, const Tensor<xpu, 3, DType>& A,
-                 const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& dA,
-                 const Tensor<xpu, 3, DType>& dB, Stream<xpu>* s,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dC,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& dA,
+                 const Tensor<xpu, 3, DType>& dB,
+                 Stream<xpu>* s,
                  const nnvm::NodeAttrs& attrs) {
     // Backward of C = trmm(A,B).
     const LaTriangMatrixMultParam& param = nnvm::get<LaTriangMatrixMultParam>(attrs.parsed);
@@ -736,34 +864,40 @@ struct trmm_backward {
       gemm::op(B, dC, dA, scale, DType(0.), !param.transpose, param.transpose, s);
     }
     using namespace mxnet_op;
-    Kernel<ZeroTriangular, xpu>::Launch(s, dA.MSize(), dA.size(1)*dA.stride_, dA.stride_,
-                                   dA.dptr_, !param.lower);
+    Kernel<ZeroTriangular, xpu>::Launch(
+        s, dA.MSize(), dA.size(1) * dA.stride_, dA.stride_, dA.dptr_, !param.lower);
     // Compute dB
-    if (dB.dptr_ != dC.dptr_) Copy(dB, dC, s);
+    if (dB.dptr_ != dC.dptr_)
+      Copy(dB, dC, s);
     trmm::op(A, dB, scale, param.rightside, param.lower, !param.transpose, s);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dC, const Tensor<xpu, 3, DType>& A,
-                 const Tensor<xpu, 3, DType>& B, const Tensor<xpu, 3, DType>& dA,
-                 const Tensor<xpu, 3, DType>& dB, const OpContext& ctx,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dC,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& B,
+                 const Tensor<xpu, 3, DType>& dA,
+                 const Tensor<xpu, 3, DType>& dB,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dC, A, B, dA, dB, s, attrs);
   }
 };
 
 struct BackwardSumLogDiag {
-  template<typename DType>
+  template <typename DType>
   MSHADOW_XINLINE static void Map(int i, int M, int stride, DType* dB, DType* A, DType* dA) {
     const int matrix(i / M), row((i % M) / stride), col(i % stride);
-    dA[i] = (row == col ? dB[matrix]/A[i] : DType(0));
+    dA[i] = (row == col ? dB[matrix] / A[i] : DType(0));
   }
 };
 struct sumlogdiag_backward {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dB, const Tensor<xpu, 3, DType>& A,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dB,
+                 const Tensor<xpu, 3, DType>& A,
                  const Tensor<xpu, 3, DType>& dA,
-                 Stream<xpu>* s, const nnvm::NodeAttrs& attrs) {
+                 Stream<xpu>* s,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of B = sumlogdiag(A).
     // dB is actually a 1-d tensor but we convert it to a 3-D one before calling
     // this function as the LaOpCaller-adapters can only deal with a uniform
@@ -771,22 +905,26 @@ struct sumlogdiag_backward {
     // it correctly internally in this function.
     // Note that A and dA may point to the same memory.
     using namespace mxnet_op;
-    Kernel<BackwardSumLogDiag, xpu>::Launch
-         (s, dA.MSize(), dA.size(1)*dA.stride_, dA.stride_, dB.dptr_, A.dptr_, dA.dptr_);
+    Kernel<BackwardSumLogDiag, xpu>::Launch(
+        s, dA.MSize(), dA.size(1) * dA.stride_, dA.stride_, dB.dptr_, A.dptr_, dA.dptr_);
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dB, const Tensor<xpu, 3, DType>& A,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dB,
+                 const Tensor<xpu, 3, DType>& A,
                  const Tensor<xpu, 3, DType>& dA,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dB, A, dA, s, attrs);
   }
 };
 
 struct syrk_backward {
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dB, const Tensor<xpu, 3, DType>& A,
-                 const Tensor<xpu, 3, DType>& dA, Stream<xpu>* s,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dB,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& dA,
+                 Stream<xpu>* s,
                  const nnvm::NodeAttrs& attrs) {
     const LaSyrkParam& param = nnvm::get<LaSyrkParam>(attrs.parsed);
     // Note: Calling gemm twice is a bit wasteful, but the symmetrization of dB
@@ -799,41 +937,43 @@ struct syrk_backward {
       gemm::op(dB, A, dA, DType(param.alpha), DType(1.), true, false, s);
     }
   }
-  template<typename xpu, typename DType>
-  static void op(const Tensor<xpu, 3, DType>& dB, const Tensor<xpu, 3, DType>& A,
-                 const Tensor<xpu, 3, DType>& dA, const OpContext& ctx,
+  template <typename xpu, typename DType>
+  static void op(const Tensor<xpu, 3, DType>& dB,
+                 const Tensor<xpu, 3, DType>& A,
+                 const Tensor<xpu, 3, DType>& dA,
+                 const OpContext& ctx,
                  const nnvm::NodeAttrs& attrs) {
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     op(dB, A, dA, s, attrs);
   }
 };
 
 // Have to reserve temporary storage tempM, same shape as dL
 struct gelqf_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dQ,
                  const Tensor<xpu, 3, DType>& dL,
                  const Tensor<xpu, 3, DType>& Q,
                  const Tensor<xpu, 3, DType>& L,
                  const Tensor<xpu, 3, DType>& dA,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of (Q, L) = gelqf(A):
     //   dA = L**(-T) * (dQ + copyLTU(M) * Q), M = L**T * dL - dQ * Q**T
     // Here, copyLTU(M) creates a symmetric matrix from the square matrix M
     // by setting the upper triangle to be equal to the lower triangle, leaving
     // lower triangle and diagonal unchanged.
     using namespace mxnet_op;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    if (dQ.dptr_ != dA.dptr_) Copy(dA, dQ, s);
+    Stream<xpu>* s = ctx.get_stream<xpu>();
+    if (dQ.dptr_ != dA.dptr_)
+      Copy(dA, dQ, s);
     // Need temporal space, same shape as dL
-    Tensor<xpu, 3, DType> tempM = ctx.requested[0]
-      .get_space_typed<xpu, 3, DType>(dL.shape_, s);
+    Tensor<xpu, 3, DType> tempM = ctx.requested[0].get_space_typed<xpu, 3, DType>(dL.shape_, s);
     Copy(tempM, dL, s);
     trmm::op(L, tempM, DType(1.0), false, true, true, s);
     gemm::op(dA, Q, tempM, DType(-1.0), DType(1.0), false, true, s);
-    Kernel<CopyTriangularToOppositeSide, xpu>::Launch
-           (s, tempM.MSize(), tempM.size(1)*tempM.stride_, tempM.stride_,
-            tempM.dptr_, false);
+    Kernel<CopyTriangularToOppositeSide, xpu>::Launch(
+        s, tempM.MSize(), tempM.size(1) * tempM.stride_, tempM.stride_, tempM.dptr_, false);
     gemm::op(tempM, Q, dA, DType(1.0), DType(1.0), false, false, s);
     trsm::op(L, dA, DType(1.0), false, true, true, s);
   }
@@ -841,43 +981,43 @@ struct gelqf_backward {
 
 // Helper for syevd_backward. See technical report for details
 // Note: Could be parallelized more, but this is subdominant anyway
-template<typename DType>
+template <typename DType>
 DType syevd_back_helper_eps(DType* X);
 
-template<>
+template <>
 MSHADOW_XINLINE float syevd_back_helper_eps(float* X) {
   return 1e-30;
 }
 
-template<>
+template <>
 MSHADOW_XINLINE double syevd_back_helper_eps(double* X) {
   return 1e-100;
 }
 
 struct SyevdBackHelper {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int k, int n, DType* X, int ldx, DType* L,
-                                  int ldl, DType* dL, int lddl, DType* Y,
-                                  int ldy) {
-    const int offx(k*n*ldx);
-    const int offy(k*n*ldy);
-    const int offl(k*ldl);
-    const int offdl(k*lddl);
+  template <typename DType>
+  MSHADOW_XINLINE static void
+  Map(int k, int n, DType* X, int ldx, DType* L, int ldl, DType* dL, int lddl, DType* Y, int ldy) {
+    const int offx(k * n * ldx);
+    const int offy(k * n * ldy);
+    const int offl(k * ldl);
+    const int offdl(k * lddl);
     DType denom(0.0), elem(0.0);
     const DType eps(syevd_back_helper_eps(X));
     // Lower and upper triangle: Loop i > j
     for (int i = 1; i < n; ++i) {
       for (int j = 0; j < i; ++j) {
-        denom = L[offl+i] - L[offl+j];  // Must be >=0
-        if (denom < eps) denom = eps;
+        denom = L[offl + i] - L[offl + j];  // Must be >=0
+        if (denom < eps)
+          denom = eps;
         denom *= 2.0;
-        elem = (X[offx+i*ldx+j] - X[offx+j*ldx+i])/denom;
-        Y[offy+i*ldy+j] = Y[offy+j*ldy+i] = elem;
+        elem                  = (X[offx + i * ldx + j] - X[offx + j * ldx + i]) / denom;
+        Y[offy + i * ldy + j] = Y[offy + j * ldy + i] = elem;
       }
     }
     // Diagonal
     for (int i = 0; i < n; ++i) {
-      Y[offy+i*(ldy+1)] = dL[offdl+i];
+      Y[offy + i * (ldy + 1)] = dL[offdl + i];
     }
   }
 };
@@ -885,46 +1025,54 @@ struct SyevdBackHelper {
 // Have to reserve temporary storage tempM, same shape as dA.
 // dA may overwrite dU
 struct syevd_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dU,
                  const Tensor<xpu, 2, DType>& dL,
                  const Tensor<xpu, 3, DType>& U,
                  const Tensor<xpu, 2, DType>& L,
                  const Tensor<xpu, 3, DType>& dA,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of (U, L) = syevd(A):
     //   dA = U**T * SyevdBackHelper(dU * U**T, L, dL) * U
     using namespace mxnet_op;
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s = ctx.get_stream<xpu>();
     // Need temporal space, same shape as dA
-    Tensor<xpu, 3, DType> tempM = ctx.requested[0]
-      .get_space_typed<xpu, 3, DType>(dA.shape_, s);
+    Tensor<xpu, 3, DType> tempM = ctx.requested[0].get_space_typed<xpu, 3, DType>(dA.shape_, s);
     // This copy is just to make sure there are no invalid values (NaN, infinity) in
     // tempM. gemm multiplies tempM with 0, instead of setting entries to 0.
     Copy(tempM, dU, s);
     gemm::op(dU, U, tempM, DType(1.0), DType(0.0), false, true, s);
     // SyevdBackHelper: tempM => dA
-    Kernel<SyevdBackHelper, xpu>::Launch
-      (s, dA.size(0), dA.size(1), tempM.dptr_, tempM.stride_, L.dptr_,
-       L.stride_, dL.dptr_, dL.stride_, dA.dptr_, dA.stride_);
+    Kernel<SyevdBackHelper, xpu>::Launch(s,
+                                         dA.size(0),
+                                         dA.size(1),
+                                         tempM.dptr_,
+                                         tempM.stride_,
+                                         L.dptr_,
+                                         L.stride_,
+                                         dL.dptr_,
+                                         dL.stride_,
+                                         dA.dptr_,
+                                         dA.stride_);
     gemm::op(U, dA, tempM, DType(1.0), DType(0.0), true, false, s);
     gemm::op(tempM, U, dA, DType(1.0), DType(0.0), false, false, s);
   }
 };
 
 struct inverse_backward {
-  template<typename xpu, typename DType>
+  template <typename xpu, typename DType>
   static void op(const Tensor<xpu, 3, DType>& dA,
                  const Tensor<xpu, 3, DType>& A,
                  const Tensor<xpu, 3, DType>& dB,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     // Backward of A = inverse(B)
     if (dB.shape_.Size() == 0U) {
       return;
     }
-    Stream<xpu> *s = ctx.get_stream<xpu>();
-    Tensor<xpu, 3, DType> temp = ctx.requested[0]
-      .get_space_typed<xpu, 3, DType>(A.shape_, s);
+    Stream<xpu>* s             = ctx.get_stream<xpu>();
+    Tensor<xpu, 3, DType> temp = ctx.requested[0].get_space_typed<xpu, 3, DType>(A.shape_, s);
     gemm2::op(dA, A, temp, DType(1), false, true, s);
     gemm2::op(A, temp, dB, DType(-1), true, false, s);
   }
@@ -932,8 +1080,8 @@ struct inverse_backward {
 
 // Here we set grad to zero if det = 0
 struct StopZeroDetGrad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, int grad_step, DType *grad, DType *det, DType zero_det) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i, int grad_step, DType* grad, DType* det, DType zero_det) {
     int batch_ind = i / grad_step;
     if (det[batch_ind] == zero_det) {
       grad[i] = DType(0);
@@ -945,13 +1093,14 @@ struct StopZeroDetGrad {
 // The closed form solution is pretty easy when A is invertible.
 // For non-invertible A, grad is not backwarded.
 struct det_backward {
-  template<typename xpu, typename DType, typename IndexT>
+  template <typename xpu, typename DType, typename IndexT>
   static void op(const Tensor<xpu, 1, DType>& ddet,
                  const Tensor<xpu, 1, DType>& det,
                  const Tensor<xpu, 3, DType>& LU,
                  const Tensor<xpu, 2, IndexT>& pivot,
                  const Tensor<xpu, 3, DType>& dA,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     using namespace mshadow;
     using namespace mshadow::expr;
     using namespace mxnet_op;
@@ -959,7 +1108,7 @@ struct det_backward {
       return;
     }
     // compute inverse(A) and stores it to LU
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s       = ctx.get_stream<xpu>();
     using IndexInternalT = typename LapackIndex<xpu>::IndexT;
     if (std::is_same<xpu, gpu>::value && !std::is_same<IndexT, IndexInternalT>::value) {
       // Calculations on the GPU path are internally done on int type.
@@ -970,12 +1119,12 @@ struct det_backward {
     } else {
       linalg_batch_det_backward_helper(LU, pivot, det, dA, DType(0), ctx);
     }
-    const_cast<Tensor<xpu, 3, DType>&>(dA) = broadcast_to(reshape(det * ddet, \
-      Shape3(det.size(0), 1, 1)), mxnet::TShape(LU.shape_)) * \
-      transpose(LU, Shape3(0, 2, 1));
+    const_cast<Tensor<xpu, 3, DType>&>(dA) =
+        broadcast_to(reshape(det * ddet, Shape3(det.size(0), 1, 1)), mxnet::TShape(LU.shape_)) *
+        transpose(LU, Shape3(0, 2, 1));
     // stop grad for zero det temporarily
-    Kernel<StopZeroDetGrad, xpu>::Launch(s, dA.shape_.Size(), dA.size(1) * dA.size(2), \
-                                         dA.dptr_, det.dptr_, DType(0));
+    Kernel<StopZeroDetGrad, xpu>::Launch(
+        s, dA.shape_.Size(), dA.size(1) * dA.size(2), dA.dptr_, det.dptr_, DType(0));
   }
 };
 
@@ -984,14 +1133,15 @@ struct det_backward {
 // For non-invertible A, grad is not backwarded.
 // Grad is not properly defined on sign, so it's not backwarded either.
 struct slogdet_backward {
-  template<typename xpu, typename DType, typename IndexT>
+  template <typename xpu, typename DType, typename IndexT>
   static void op(const Tensor<xpu, 1, DType>& dlogabsdet,
                  const Tensor<xpu, 1, DType>& sign,
                  const Tensor<xpu, 1, DType>& logabsdet,
                  const Tensor<xpu, 3, DType>& LU,
                  const Tensor<xpu, 2, IndexT>& pivot,
                  const Tensor<xpu, 3, DType>& dA,
-                 const OpContext& ctx, const nnvm::NodeAttrs& attrs) {
+                 const OpContext& ctx,
+                 const nnvm::NodeAttrs& attrs) {
     using namespace mshadow;
     using namespace mshadow::expr;
     using namespace mxnet_op;
@@ -999,7 +1149,7 @@ struct slogdet_backward {
       return;
     }
     // compute inverse(A) and stores it to LU
-    Stream<xpu> *s = ctx.get_stream<xpu>();
+    Stream<xpu>* s       = ctx.get_stream<xpu>();
     using IndexInternalT = typename LapackIndex<xpu>::IndexT;
     if (std::is_same<xpu, gpu>::value && !std::is_same<IndexT, IndexInternalT>::value) {
       // Calculations on the GPU path are internally done on int type.
@@ -1010,12 +1160,13 @@ struct slogdet_backward {
     } else {
       linalg_batch_det_backward_helper(LU, pivot, logabsdet, dA, DType(-INFINITY), ctx);
     }
-    const_cast<Tensor<xpu, 3, DType>&>(dA) = broadcast_to(reshape(dlogabsdet, \
-      Shape3(logabsdet.size(0), 1, 1)), mxnet::TShape(LU.shape_)) * \
-      transpose(LU, Shape3(0, 2, 1));
+    const_cast<Tensor<xpu, 3, DType>&>(dA) =
+        broadcast_to(reshape(dlogabsdet, Shape3(logabsdet.size(0), 1, 1)),
+                     mxnet::TShape(LU.shape_)) *
+        transpose(LU, Shape3(0, 2, 1));
     // stop grad for zero det
-    Kernel<StopZeroDetGrad, xpu>::Launch(s, dA.shape_.Size(), dA.size(1) * dA.size(2), \
-                                         dA.dptr_, logabsdet.dptr_, DType(-INFINITY));
+    Kernel<StopZeroDetGrad, xpu>::Launch(
+        s, dA.shape_.Size(), dA.size(1) * dA.size(2), dA.dptr_, logabsdet.dptr_, DType(-INFINITY));
   }
 };
 
diff --git a/src/operator/tensor/la_op.cc b/src/operator/tensor/la_op.cc
index 0b62c1e326b6..35c1a36ce4e9 100644
--- a/src/operator/tensor/la_op.cc
+++ b/src/operator/tensor/la_op.cc
@@ -38,8 +38,8 @@ DMLC_REGISTER_PARAMETER(LaTrianParam);
 DMLC_REGISTER_PARAMETER(LaSyrkParam);
 
 NNVM_REGISTER_OP(_linalg_gemm)
-.add_alias("linalg_gemm")
-.describe(R"code(Performs general matrix multiplication and accumulation.
+    .add_alias("linalg_gemm")
+    .describe(R"code(Performs general matrix multiplication and accumulation.
 Input are tensors *A*, *B*, *C*, each of dimension *n >= 2* and having the same shape
 on the leading *n-2* dimensions.
 
@@ -87,36 +87,44 @@ Examples::
    gemm(A, B, C, transpose_b=True, alpha=2.0 , beta=10.0)
            = [[[104.0]], [[0.14]]]
 )code" ADD_FILELINE)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaMatrixMacParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A", "B", "C"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaMatrixMultMacOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{2, 0}}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpGemmForward<cpu, 2, 2, 3, 1, gemm>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_gemm"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices")
-.add_argument("B", "NDArray-or-Symbol", "Tensor of input matrices")
-.add_argument("C", "NDArray-or-Symbol", "Tensor of input matrices")
-.add_arguments(LaMatrixMacParam::__FIELDS__());
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaMatrixMacParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "B", "C"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaMatrixMultMacOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<3, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{2, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpGemmForward<cpu, 2, 2, 3, 1, gemm>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_gemm"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices")
+    .add_argument("B", "NDArray-or-Symbol", "Tensor of input matrices")
+    .add_argument("C", "NDArray-or-Symbol", "Tensor of input matrices")
+    .add_arguments(LaMatrixMacParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_gemm)
-.set_num_inputs(4)
-.set_num_outputs(3)
-.set_attr_parser(ParamParser<LaMatrixMacParam>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{2, 1}, {3, 2}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpGemmBackward<cpu, 2, 2, 4, 3, gemm_backward>);
+    .set_num_inputs(4)
+    .set_num_outputs(3)
+    .set_attr_parser(ParamParser<LaMatrixMacParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{2, 1}, {3, 2}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpGemmBackward<cpu, 2, 2, 4, 3, gemm_backward>);
 
 NNVM_REGISTER_OP(_linalg_gemm2)
-.add_alias("linalg_gemm2")
-.describe(R"code(Performs general matrix multiplication.
+    .add_alias("linalg_gemm2")
+    .describe(R"code(Performs general matrix multiplication.
 Input are tensors *A*, *B*, each of dimension *n >= 2* and having the same shape
 on the leading *n-2* dimensions.
 
@@ -161,33 +169,39 @@ Examples::
    gemm2(A, B, transpose_b=True, alpha=2.0)
            = [[[4.0]], [[0.04 ]]]
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaMatrixMultParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A", "B"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaMatrixMultMacOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpGemmForward<cpu, 2, 2, 2, 1, gemm2>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_gemm2"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices")
-.add_argument("B", "NDArray-or-Symbol", "Tensor of input matrices")
-.add_arguments(LaMatrixMultParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaMatrixMultParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "B"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaMatrixMultMacOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpGemmForward<cpu, 2, 2, 2, 1, gemm2>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_gemm2"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices")
+    .add_argument("B", "NDArray-or-Symbol", "Tensor of input matrices")
+    .add_arguments(LaMatrixMultParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_gemm2)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<LaMatrixMultParam>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{2, 1}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpGemmBackward<cpu, 2, 2, 3, 2, gemm2_backward>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<LaMatrixMultParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{2, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpGemmBackward<cpu, 2, 2, 3, 2, gemm2_backward>);
 
 NNVM_REGISTER_OP(_linalg_potrf)
-.add_alias("linalg_potrf")
-.describe(R"code(Performs Cholesky factorization of a symmetric positive-definite matrix.
+    .add_alias("linalg_potrf")
+    .describe(R"code(Performs Cholesky factorization of a symmetric positive-definite matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, the Cholesky factor *B* of the symmetric, positive definite matrix *A* is
@@ -212,34 +226,41 @@ Examples::
    A = [[[4.0, 1.0], [1.0, 4.25]], [[16.0, 4.0], [4.0, 17.0]]]
    potrf(A) = [[[2.0, 0], [0.5, 2.0]], [[4.0, 0], [1.0, 4.0]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaCholeskyParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{0, 0}}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, potrf>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_potrf"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be decomposed");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaCholeskyParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, potrf>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_potrf"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be decomposed");
 
 NNVM_REGISTER_OP(_backward_linalg_potrf)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaCholeskyParam>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, potrf_backward>);
-
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaCholeskyParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, potrf_backward>);
 
 NNVM_REGISTER_OP(_linalg_potri)
-.add_alias("linalg_potri")
-.describe(R"code(Performs matrix inversion from a Cholesky factorization.
+    .add_alias("linalg_potri")
+    .describe(R"code(Performs matrix inversion from a Cholesky factorization.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, *A* is a triangular matrix (entries of upper or lower triangle are all zero)
@@ -273,31 +294,37 @@ Examples::
    potri(A) = [[[0.26563, -0.0625], [-0.0625, 0.25]],
                [[0.06641, -0.01562], [-0.01562, 0,0625]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaCholeskyParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{0, 0}}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, potri>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_linalg_potri"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of lower triangular matrices");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaCholeskyParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, potri>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_linalg_potri"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of lower triangular matrices");
 
 NNVM_REGISTER_OP(_backward_linalg_potri)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaCholeskyParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 3, 1, potri_backward>);
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaCholeskyParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 3, 1, potri_backward>);
 
 NNVM_REGISTER_OP(_linalg_trmm)
-.add_alias("linalg_trmm")
-.describe(R"code(Performs multiplication with a lower triangular matrix.
+    .add_alias("linalg_trmm")
+    .describe(R"code(Performs multiplication with a lower triangular matrix.
 Input are tensors *A*, *B*, each of dimension *n >= 2* and having the same shape
 on the leading *n-2* dimensions.
 
@@ -331,35 +358,43 @@ Examples::
    trmm(A, B, alpha=2.0) = [[[2.0, 2.0, 2.0], [4.0, 4.0, 4.0]],
                             [[1.0, 1.0, 1.0], [2.0, 2.0, 2.0]]]
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A", "B"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaTriangMatrixMultOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{1, 0}}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 2, 1, trmm>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_trmm"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of lower triangular matrices")
-.add_argument("B", "NDArray-or-Symbol", "Tensor of matrices")
-.add_arguments(LaTriangMatrixMultParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "B"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaTriangMatrixMultOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{1, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 2, 1, trmm>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_trmm"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of lower triangular matrices")
+    .add_argument("B", "NDArray-or-Symbol", "Tensor of matrices")
+    .add_arguments(LaTriangMatrixMultParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_trmm)
-.set_num_inputs(3)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{0, 1}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 3, 2, trmm_backward>);
+    .set_num_inputs(3)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 1}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 3, 2, trmm_backward>);
 
 NNVM_REGISTER_OP(_linalg_trsm)
-.add_alias("linalg_trsm")
-.describe(R"code(Solves matrix equation involving a lower triangular matrix.
+    .add_alias("linalg_trsm")
+    .describe(R"code(Solves matrix equation involving a lower triangular matrix.
 Input are tensors *A*, *B*, each of dimension *n >= 2* and having the same shape
 on the leading *n-2* dimensions.
 
@@ -394,35 +429,43 @@ Examples::
    trsm(A, B, alpha=0.5) = [[[1.0, 1.0, 1.0], [1.0, 1.0, 1.0]],
                             [[2.0, 2.0, 2.0], [2.0, 2.0, 2.0]]]
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A", "B"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaTriangMatrixMultOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{1, 0}}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 2, 1, trsm>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_linalg_trsm"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of lower triangular matrices")
-.add_argument("B", "NDArray-or-Symbol", "Tensor of matrices")
-.add_arguments(LaTriangMatrixMultParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A", "B"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaTriangMatrixMultOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{1, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 2, 1, trsm>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseInOut{"_backward_linalg_trsm"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of lower triangular matrices")
+    .add_argument("B", "NDArray-or-Symbol", "Tensor of matrices")
+    .add_arguments(LaTriangMatrixMultParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_trsm)
-.set_num_inputs(4)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{0, 1}, {1, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 4, 2, trsm_backward>);
+    .set_num_inputs(4)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<LaTriangMatrixMultParam>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 1}, {1, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 4, 2, trsm_backward>);
 
 NNVM_REGISTER_OP(_linalg_sumlogdiag)
-.add_alias("linalg_sumlogdiag")
-.describe(R"code(Computes the sum of the logarithms of the diagonal elements of a square matrix.
+    .add_alias("linalg_sumlogdiag")
+    .describe(R"code(Computes the sum of the logarithms of the diagonal elements of a square matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, *A* must be square with positive diagonal entries. We sum the natural
@@ -443,29 +486,35 @@ Examples::
    A = [[[1.0, 1.0], [1.0, 7.0]], [[3.0, 0], [0, 17.0]]]
    sumlogdiag(A) = [1.9459, 3.9318]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaReduceShape<2>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 0, 1, 1, sumlogdiag>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_sumlogdiag"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrices");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaReduceShape<2>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 0, 1, 1, sumlogdiag>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_sumlogdiag"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrices");
 
 NNVM_REGISTER_OP(_backward_linalg_sumlogdiag)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{1, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, sumlogdiag_backward>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{1, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, sumlogdiag_backward>);
 
 NNVM_REGISTER_OP(_linalg_extractdiag)
-.add_alias("linalg_extractdiag")
-.describe(R"code(Extracts the diagonal entries of a square matrix.
+    .add_alias("linalg_extractdiag")
+    .describe(R"code(Extracts the diagonal entries of a square matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, then *A* represents a single square matrix which diagonal elements get extracted as a 1-dimensional tensor.
@@ -493,30 +542,34 @@ Examples::
     extractdiag(A) = [[1.0, 4.0],
                       [5.0, 8.0]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaDiagParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<true, true>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 1, 1, 1, copydiag>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_extractdiag"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrices")
-.add_arguments(LaDiagParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaDiagParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<true, true>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 1, 1, 1, copydiag>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_extractdiag"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrices")
+    .add_arguments(LaDiagParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_extractdiag)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaDiagParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 1, 2, 1, 1, copydiag>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaDiagParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 1, 2, 1, 1, copydiag>);
 
 NNVM_REGISTER_OP(_linalg_makediag)
-.add_alias("linalg_makediag")
-.describe(R"code(Constructs a square matrix with the input as diagonal.
+    .add_alias("linalg_makediag")
+    .describe(R"code(Constructs a square matrix with the input as diagonal.
 Input is a tensor *A* of dimension *n >= 1*.
 
 If *n=1*, then *A* represents the diagonal entries of a single square matrix. This matrix will be returned as a 2-dimensional tensor.
@@ -545,30 +598,34 @@ Examples::
                    [[3.0, 0.0],
                     [0.0, 4.0]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaDiagParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<true, false>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 1, 2, 1, 1, copydiag>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_makediag"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of diagonal entries")
-.add_arguments(LaDiagParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaDiagParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<true, false>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 1, 2, 1, 1, copydiag>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_makediag"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of diagonal entries")
+    .add_arguments(LaDiagParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_makediag)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaDiagParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 1, 1, 1, copydiag>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaDiagParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 1, 1, 1, copydiag>);
 
 NNVM_REGISTER_OP(_linalg_extracttrian)
-.add_alias("linalg_extracttrian")
-.describe(R"code(Extracts a triangular sub-matrix from a square matrix.
+    .add_alias("linalg_extracttrian")
+    .describe(R"code(Extracts a triangular sub-matrix from a square matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, then *A* represents a single square matrix from which a triangular sub-matrix is extracted as a 1-dimensional tensor.
@@ -603,30 +660,35 @@ Examples::
     extracttrian(A) = [[1.0, 3.0, 4.0],
                        [5.0, 7.0, 8.0]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaTrianParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<false, true>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 1, 1, 1, copytrian>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_extracttrian"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrices")
-.add_arguments(LaTrianParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaTrianParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<false, true>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 1, 1, 1, copytrian>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_extracttrian"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrices")
+    .add_arguments(LaTrianParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_extracttrian)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaTrianParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 1, 2, 1, 1, copytrian>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaTrianParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 1, 2, 1, 1, copytrian>);
 
 NNVM_REGISTER_OP(_linalg_maketrian)
-.add_alias("linalg_maketrian")
-.describe(R"code(Constructs a square matrix with the input representing a specific triangular sub-matrix.
+    .add_alias("linalg_maketrian")
+    .describe(
+        R"code(Constructs a square matrix with the input representing a specific triangular sub-matrix.
 This is basically the inverse of *linalg.extracttrian*. Input is a tensor *A* of dimension *n >= 1*.
 
 If *n=1*, then *A* represents the entries of a triangular matrix which is lower triangular if *offset<0* or *offset=0*, *lower=true*. The resulting matrix is derived by first constructing the square
@@ -671,30 +733,34 @@ Examples::
                                [0.0, 0.0, 6.0],
                                [0.0, 0.0, 0.0]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaTrianParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<false, false>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 1, 2, 1, 1, copytrian>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_maketrian"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of triangular matrices stored as vectors")
-.add_arguments(LaTrianParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaTrianParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaDiagTrianShape<false, false>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 1, 2, 1, 1, copytrian>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_linalg_maketrian"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of triangular matrices stored as vectors")
+    .add_arguments(LaTrianParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_maketrian)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaTrianParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 1, 1, 1, copytrian>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaTrianParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 1, 1, 1, copytrian>);
 
 NNVM_REGISTER_OP(_linalg_syrk)
-.add_alias("linalg_syrk")
-.describe(R"code(Multiplication of matrix with its transpose.
+    .add_alias("linalg_syrk")
+    .describe(R"code(Multiplication of matrix with its transpose.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, the operator performs the BLAS3 function *syrk*:
@@ -728,30 +794,34 @@ Examples::
    A = [[[1., 1.]], [[0.1, 0.1]]]
    syrk(A, alpha=2., transpose=False) = [[[4.]], [[0.04]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaSyrkParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaSyrkShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, syrk>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_syrk"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices")
-.add_arguments(LaSyrkParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaSyrkParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaSyrkShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, syrk>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_linalg_syrk"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices")
+    .add_arguments(LaSyrkParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_linalg_syrk)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<LaSyrkParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, syrk_backward>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<LaSyrkParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, syrk_backward>);
 
 NNVM_REGISTER_OP(_linalg_gelqf)
-.add_alias("linalg_gelqf")
-.describe(R"code(LQ factorization for general matrix.
+    .add_alias("linalg_gelqf")
+    .describe(R"code(LQ factorization for general matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, we compute the LQ factorization (LAPACK *gelqf*, followed by *orglq*). *A*
@@ -796,33 +866,43 @@ Examples::
         [[-13.92838828, 0.],
          [-19.09768702, 0.52758934]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaLQFactShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 2, gelqf>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_gelqf"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be factorized");
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaLQFactShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 2, gelqf>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_gelqf"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be factorized");
 
 NNVM_REGISTER_OP(_backward_linalg_gelqf)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 4, 1, gelqf_backward>);
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 4, 1, gelqf_backward>);
 
 NNVM_REGISTER_OP(_linalg_syevd)
-.describe(R"code(Eigendecomposition for symmetric matrix.
+    .describe(R"code(Eigendecomposition for symmetric matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, *A* must be symmetric, of shape *(x, x)*. We compute the eigendecomposition,
@@ -866,35 +946,45 @@ Examples::
    L = [[0., 5.],
         [0.17157288, 5.82842712]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", LaEigFactShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForwSyevd<cpu, syevd>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_syevd"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be factorized");
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", LaEigFactShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 2>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForwSyevd<cpu, syevd>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_syevd"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of input matrices to be factorized");
 
 NNVM_REGISTER_OP(_backward_linalg_syevd)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackwSyevd<cpu, syevd_backward>);
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackwSyevd<cpu, syevd_backward>);
 
 NNVM_REGISTER_OP(_linalg_inverse)
-.add_alias("linalg_inverse")
-.add_alias("_npi_inv")
-.describe(R"code(Compute the inverse of a matrix.
+    .add_alias("linalg_inverse")
+    .add_alias("_npi_inv")
+    .describe(R"code(Compute the inverse of a matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, *A* is a square matrix. We compute:
@@ -918,35 +1008,45 @@ Examples::
    inverse(A) = [[[-0.6, 0.8], [0.4, -0.2]],
                  [[-2., 1.5], [1., -0.5]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", InverseShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int>>{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, inverse>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_inverse"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", InverseShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpForward<cpu, 2, 2, 1, 1, inverse>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseOut{"_backward_linalg_inverse"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
 
 NNVM_REGISTER_OP(_backward_linalg_inverse)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption", [](const NodeAttrs& attrs)
-  { return std::vector<std::pair<int, int> >{{0, 0}}; })
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, inverse_backward>);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int>>{{0, 0}};
+                                    })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpBackward<cpu, 2, 2, 2, 1, inverse_backward>);
 
 NNVM_REGISTER_OP(_linalg_det)
-.add_alias("linalg_det")
-.add_alias("_npi_det")
-.describe(R"code(Compute the determinant of a matrix.
+    .add_alias("linalg_det")
+    .add_alias("_npi_det")
+    .describe(R"code(Compute the determinant of a matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, *A* is a square matrix. We compute:
@@ -973,33 +1073,39 @@ Examples::
         [[2., 3.], [1., 4.]]]
    det(A) = [-5., 5.]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(3)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; })
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", [](const NodeAttrs& attrs) {
-  return 1; })
-.set_attr<mxnet::FInferShape>("FInferShape", DetShape<1>)
-.set_attr<nnvm::FInferType>("FInferType", DetType<1>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpDetForward<cpu, 1, det>)
-.set_attr<nnvm::FGradient>("FGradient", ReduceDetGrad<1>{"_backward_linalg_det"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
+    .set_num_inputs(1)
+    .set_num_outputs(3)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<mxnet::FInferShape>("FInferShape", DetShape<1>)
+    .set_attr<nnvm::FInferType>("FInferType", DetType<1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpDetForward<cpu, 1, det>)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceDetGrad<1>{"_backward_linalg_det"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
 
 NNVM_REGISTER_OP(_backward_linalg_det)
-.set_num_inputs(4)
-.set_num_outputs(1)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpDetBackward<cpu, 1, det_backward>);
+    .set_num_inputs(4)
+    .set_num_outputs(1)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpDetBackward<cpu, 1, det_backward>);
 
 NNVM_REGISTER_OP(_linalg_slogdet)
-.add_alias("linalg_slogdet")
-.add_alias("_npi_slogdet")
-.describe(R"code(Compute the sign and log of the determinant of a matrix.
+    .add_alias("linalg_slogdet")
+    .add_alias("_npi_slogdet")
+    .describe(R"code(Compute the sign and log of the determinant of a matrix.
 Input is a tensor *A* of dimension *n >= 2*.
 
 If *n=2*, *A* is a square matrix. We compute:
@@ -1032,27 +1138,33 @@ Examples::
    sign = [1., 0., -1.]
    logabsdet = [1.609438, -inf, 1.609438]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(4)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"A"}; })
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", [](const NodeAttrs& attrs) {
-  return 2; })
-.set_attr<mxnet::FInferShape>("FInferShape", DetShape<2>)
-.set_attr<nnvm::FInferType>("FInferType", DetType<2>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<FCompute>("FCompute<cpu>", LaOpDetForward<cpu, 2, slogdet>)
-.set_attr<nnvm::FGradient>("FGradient", ReduceDetGrad<2>{"_backward_linalg_slogdet"})
-.add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
+    .set_num_inputs(1)
+    .set_num_outputs(4)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"A"};
+                                     })
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 2; })
+    .set_attr<mxnet::FInferShape>("FInferShape", DetShape<2>)
+    .set_attr<nnvm::FInferType>("FInferType", DetType<2>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", LaOpDetForward<cpu, 2, slogdet>)
+    .set_attr<nnvm::FGradient>("FGradient", ReduceDetGrad<2>{"_backward_linalg_slogdet"})
+    .add_argument("A", "NDArray-or-Symbol", "Tensor of square matrix");
 
 NNVM_REGISTER_OP(_backward_linalg_slogdet)
-.set_num_inputs(5)
-.set_num_outputs(1)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", LaOpDetBackward<cpu, 2, slogdet_backward>);
+    .set_num_inputs(5)
+    .set_num_outputs(1)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", LaOpDetBackward<cpu, 2, slogdet_backward>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/la_op.cu b/src/operator/tensor/la_op.cu
index 68c33180e3d5..1f16e2d58251 100644
--- a/src/operator/tensor/la_op.cu
+++ b/src/operator/tensor/la_op.cu
@@ -28,108 +28,106 @@ namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_linalg_gemm)
-.set_attr<FCompute>("FCompute<gpu>", LaOpGemmForward<gpu, 2, 2, 3, 1, gemm>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpGemmForward<gpu, 2, 2, 3, 1, gemm>);
 
 NNVM_REGISTER_OP(_backward_linalg_gemm)
-.set_attr<FCompute>("FCompute<gpu>", LaOpGemmBackward<gpu, 2, 2, 4, 3, gemm_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpGemmBackward<gpu, 2, 2, 4, 3, gemm_backward>);
 
 NNVM_REGISTER_OP(_linalg_gemm2)
-.set_attr<FCompute>("FCompute<gpu>", LaOpGemmForward<gpu, 2, 2, 2, 1, gemm2>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpGemmForward<gpu, 2, 2, 2, 1, gemm2>);
 
 NNVM_REGISTER_OP(_backward_linalg_gemm2)
-.set_attr<FCompute>("FCompute<gpu>", LaOpGemmBackward<gpu, 2, 2, 3, 2, gemm2_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpGemmBackward<gpu, 2, 2, 3, 2, gemm2_backward>);
 
 NNVM_REGISTER_OP(_linalg_trmm)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 2, 1, trmm>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 2, 1, trmm>);
 
 NNVM_REGISTER_OP(_backward_linalg_trmm)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 3, 2, trmm_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 3, 2, trmm_backward>);
 
 NNVM_REGISTER_OP(_linalg_trsm)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 2, 1, trsm>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 2, 1, trsm>);
 
 NNVM_REGISTER_OP(_backward_linalg_trsm)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 4, 2, trsm_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 4, 2, trsm_backward>);
 
 NNVM_REGISTER_OP(_linalg_syrk)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, syrk>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, syrk>);
 
 NNVM_REGISTER_OP(_backward_linalg_syrk)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, syrk_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, syrk_backward>);
 
 NNVM_REGISTER_OP(_linalg_sumlogdiag)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 0, 1, 1, sumlogdiag>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 0, 1, 1, sumlogdiag>);
 
 NNVM_REGISTER_OP(_backward_linalg_sumlogdiag)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, sumlogdiag_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, sumlogdiag_backward>);
 
 NNVM_REGISTER_OP(_linalg_extractdiag)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 1, 1, 1, copydiag>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 1, 1, 1, copydiag>);
 
 NNVM_REGISTER_OP(_backward_linalg_extractdiag)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 1, 2, 1, 1, copydiag>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 1, 2, 1, 1, copydiag>);
 
 NNVM_REGISTER_OP(_linalg_makediag)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 1, 2, 1, 1, copydiag>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 1, 2, 1, 1, copydiag>);
 
 NNVM_REGISTER_OP(_backward_linalg_makediag)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 1, 1, 1, copydiag>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 1, 1, 1, copydiag>);
 
 NNVM_REGISTER_OP(_linalg_extracttrian)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 1, 1, 1, copytrian>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 1, 1, 1, copytrian>);
 
 NNVM_REGISTER_OP(_backward_linalg_extracttrian)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 1, 2, 1, 1, copytrian>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 1, 2, 1, 1, copytrian>);
 
 NNVM_REGISTER_OP(_linalg_maketrian)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 1, 2, 1, 1, copytrian>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 1, 2, 1, 1, copytrian>);
 
 NNVM_REGISTER_OP(_backward_linalg_maketrian)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 1, 1, 1, copytrian>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 1, 1, 1, copytrian>);
 
 NNVM_REGISTER_OP(_linalg_potri)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, potri>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, potri>);
 
 NNVM_REGISTER_OP(_backward_linalg_potri)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 3, 1, potri_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 3, 1, potri_backward>);
 
 NNVM_REGISTER_OP(_linalg_inverse)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, inverse>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, inverse>);
 
 NNVM_REGISTER_OP(_backward_linalg_inverse)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, inverse_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, inverse_backward>);
 
-NNVM_REGISTER_OP(_linalg_det)
-.set_attr<FCompute>("FCompute<gpu>", LaOpDetForward<gpu, 1, det>);
+NNVM_REGISTER_OP(_linalg_det).set_attr<FCompute>("FCompute<gpu>", LaOpDetForward<gpu, 1, det>);
 
 NNVM_REGISTER_OP(_backward_linalg_det)
-.set_attr<FCompute>("FCompute<gpu>", LaOpDetBackward<gpu, 1, det_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpDetBackward<gpu, 1, det_backward>);
 
 NNVM_REGISTER_OP(_linalg_slogdet)
-.set_attr<FCompute>("FCompute<gpu>", LaOpDetForward<gpu, 2, slogdet>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpDetForward<gpu, 2, slogdet>);
 
 NNVM_REGISTER_OP(_backward_linalg_slogdet)
-.set_attr<FCompute>("FCompute<gpu>", LaOpDetBackward<gpu, 2, slogdet_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpDetBackward<gpu, 2, slogdet_backward>);
 
 #if MXNET_USE_CUSOLVER == 1
 
 NNVM_REGISTER_OP(_linalg_potrf)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, potrf>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 1, potrf>);
 
 NNVM_REGISTER_OP(_backward_linalg_potrf)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, potrf_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 2, 1, potrf_backward>);
 
 NNVM_REGISTER_OP(_linalg_gelqf)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 2, gelqf>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpForward<gpu, 2, 2, 1, 2, gelqf>);
 
 NNVM_REGISTER_OP(_backward_linalg_gelqf)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 4, 1, gelqf_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackward<gpu, 2, 2, 4, 1, gelqf_backward>);
 
-NNVM_REGISTER_OP(_linalg_syevd)
-.set_attr<FCompute>("FCompute<gpu>", LaOpForwSyevd<gpu, syevd>);
+NNVM_REGISTER_OP(_linalg_syevd).set_attr<FCompute>("FCompute<gpu>", LaOpForwSyevd<gpu, syevd>);
 
 NNVM_REGISTER_OP(_backward_linalg_syevd)
-.set_attr<FCompute>("FCompute<gpu>", LaOpBackwSyevd<gpu, syevd_backward>);
+    .set_attr<FCompute>("FCompute<gpu>", LaOpBackwSyevd<gpu, syevd_backward>);
 
 #endif
 
diff --git a/src/operator/tensor/la_op.h b/src/operator/tensor/la_op.h
index 960e6761f6f4..9955d481d33d 100644
--- a/src/operator/tensor/la_op.h
+++ b/src/operator/tensor/la_op.h
@@ -45,20 +45,14 @@ struct LaMatrixMacParam : public dmlc::Parameter<LaMatrixMacParam> {
   int axis;
   DMLC_DECLARE_PARAMETER(LaMatrixMacParam) {
     DMLC_DECLARE_FIELD(transpose_a)
-      .set_default(false)
-      .describe("Multiply with transposed of first input (A).");
+        .set_default(false)
+        .describe("Multiply with transposed of first input (A).");
     DMLC_DECLARE_FIELD(transpose_b)
-      .set_default(false)
-      .describe("Multiply with transposed of second input (B).");
-    DMLC_DECLARE_FIELD(alpha)
-      .set_default(1.0)
-      .describe("Scalar factor multiplied with A*B.");
-    DMLC_DECLARE_FIELD(beta)
-      .set_default(1.0)
-      .describe("Scalar factor multiplied with C.");
-    DMLC_DECLARE_FIELD(axis)
-      .set_default(-2)
-      .describe("Axis corresponding to the matrix rows.");
+        .set_default(false)
+        .describe("Multiply with transposed of second input (B).");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0).describe("Scalar factor multiplied with A*B.");
+    DMLC_DECLARE_FIELD(beta).set_default(1.0).describe("Scalar factor multiplied with C.");
+    DMLC_DECLARE_FIELD(axis).set_default(-2).describe("Axis corresponding to the matrix rows.");
   }
 };
 
@@ -69,17 +63,14 @@ struct LaMatrixMultParam : public dmlc::Parameter<LaMatrixMultParam> {
   int axis;
   DMLC_DECLARE_PARAMETER(LaMatrixMultParam) {
     DMLC_DECLARE_FIELD(transpose_a)
-      .set_default(false)
-      .describe("Multiply with transposed of first input (A).");
+        .set_default(false)
+        .describe("Multiply with transposed of first input (A).");
     DMLC_DECLARE_FIELD(transpose_b)
-      .set_default(false)
-      .describe("Multiply with transposed of second input (B).");
-    DMLC_DECLARE_FIELD(alpha)
-      .set_default(1.0)
-      .describe("Scalar factor multiplied with A*B.");
-    DMLC_DECLARE_FIELD(axis)
-      .set_default(-2)
-      .describe("Axis corresponding to the matrix row indices.");
+        .set_default(false)
+        .describe("Multiply with transposed of second input (B).");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0).describe("Scalar factor multiplied with A*B.");
+    DMLC_DECLARE_FIELD(axis).set_default(-2).describe(
+        "Axis corresponding to the matrix row indices.");
   }
 };
 
@@ -87,10 +78,8 @@ struct LaMatrixMultParam : public dmlc::Parameter<LaMatrixMultParam> {
 struct LaCholeskyParam : public dmlc::Parameter<LaCholeskyParam> {
   bool lower;
   DMLC_DECLARE_PARAMETER(LaCholeskyParam) {
-    DMLC_DECLARE_FIELD(lower)
-      .set_default(true)
-      .describe
-         ("True if the triangular matrix is lower triangular, false if it is upper triangular.");
+    DMLC_DECLARE_FIELD(lower).set_default(true).describe(
+        "True if the triangular matrix is lower triangular, false if it is upper triangular.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream lower_s;
@@ -106,19 +95,14 @@ struct LaTriangMatrixMultParam : public dmlc::Parameter<LaTriangMatrixMultParam>
   bool lower;
   double alpha;
   DMLC_DECLARE_PARAMETER(LaTriangMatrixMultParam) {
-    DMLC_DECLARE_FIELD(transpose)
-      .set_default(false)
-      .describe("Use transposed of the triangular matrix");
-    DMLC_DECLARE_FIELD(rightside)
-      .set_default(false)
-      .describe("Multiply triangular matrix from the right to non-triangular one.");
-    DMLC_DECLARE_FIELD(lower)
-      .set_default(true)
-      .describe
-         ("True if the triangular matrix is lower triangular, false if it is upper triangular.");
-    DMLC_DECLARE_FIELD(alpha)
-      .set_default(1.0)
-      .describe("Scalar factor to be applied to the result.");
+    DMLC_DECLARE_FIELD(transpose).set_default(false).describe(
+        "Use transposed of the triangular matrix");
+    DMLC_DECLARE_FIELD(rightside).set_default(false).describe(
+        "Multiply triangular matrix from the right to non-triangular one.");
+    DMLC_DECLARE_FIELD(lower).set_default(true).describe(
+        "True if the triangular matrix is lower triangular, false if it is upper triangular.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0).describe(
+        "Scalar factor to be applied to the result.");
   }
 };
 
@@ -127,12 +111,9 @@ struct LaSyrkParam : public dmlc::Parameter<LaSyrkParam> {
   bool transpose;
   double alpha;
   DMLC_DECLARE_PARAMETER(LaSyrkParam) {
-    DMLC_DECLARE_FIELD(transpose)
-      .set_default(false)
-      .describe("Use transpose of input matrix.");
-    DMLC_DECLARE_FIELD(alpha)
-      .set_default(1.0)
-      .describe("Scalar factor to be applied to the result.");
+    DMLC_DECLARE_FIELD(transpose).set_default(false).describe("Use transpose of input matrix.");
+    DMLC_DECLARE_FIELD(alpha).set_default(1.0).describe(
+        "Scalar factor to be applied to the result.");
   }
 };
 
@@ -140,26 +121,23 @@ struct LaSyrkParam : public dmlc::Parameter<LaSyrkParam> {
 struct LaDiagParam : public dmlc::Parameter<LaDiagParam> {
   int offset;
   DMLC_DECLARE_PARAMETER(LaDiagParam) {
-    DMLC_DECLARE_FIELD(offset)
-      .set_default(0)
-      .describe("Offset of the diagonal versus the main diagonal. 0 corresponds to the main "
-                "diagonal, a negative/positive value to diagonals below/above the main diagonal.");
+    DMLC_DECLARE_FIELD(offset).set_default(0).describe(
+        "Offset of the diagonal versus the main diagonal. 0 corresponds to the main "
+        "diagonal, a negative/positive value to diagonals below/above the main diagonal.");
   }
 };
 
 // Parameters for trian extraction/creation.
 struct LaTrianParam : public dmlc::Parameter<LaTrianParam> {
-  int  offset;
+  int offset;
   bool lower;
   DMLC_DECLARE_PARAMETER(LaTrianParam) {
-    DMLC_DECLARE_FIELD(offset)
-      .set_default(0)
-      .describe("Offset of the diagonal versus the main diagonal. 0 corresponds to the main "
-                "diagonal, a negative/positive value to diagonals below/above the main diagonal.");
-    DMLC_DECLARE_FIELD(lower)
-      .set_default(true)
-      .describe("Refer to the lower triangular matrix if lower=true, refer to the upper otherwise."
-                 " Only relevant when offset=0");
+    DMLC_DECLARE_FIELD(offset).set_default(0).describe(
+        "Offset of the diagonal versus the main diagonal. 0 corresponds to the main "
+        "diagonal, a negative/positive value to diagonals below/above the main diagonal.");
+    DMLC_DECLARE_FIELD(lower).set_default(true).describe(
+        "Refer to the lower triangular matrix if lower=true, refer to the upper otherwise."
+        " Only relevant when offset=0");
   }
 };
 
@@ -171,41 +149,40 @@ inline bool LaMatrixMultMacOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1);
   bool transpose_a(false), transpose_b(false);
   int axis_param(-2);
-  if ( in_attrs->size() == 2 ) {
-     // Matrix-Matrix mult
-     transpose_a = nnvm::get<LaMatrixMultParam>(attrs.parsed).transpose_a;
-     transpose_b = nnvm::get<LaMatrixMultParam>(attrs.parsed).transpose_b;
-     axis_param  = nnvm::get<LaMatrixMultParam>(attrs.parsed).axis;
+  if (in_attrs->size() == 2) {
+    // Matrix-Matrix mult
+    transpose_a = nnvm::get<LaMatrixMultParam>(attrs.parsed).transpose_a;
+    transpose_b = nnvm::get<LaMatrixMultParam>(attrs.parsed).transpose_b;
+    axis_param  = nnvm::get<LaMatrixMultParam>(attrs.parsed).axis;
   } else {
-     // Matrix-Matrix mac
-     transpose_a = nnvm::get<LaMatrixMacParam>(attrs.parsed).transpose_a;
-     transpose_b = nnvm::get<LaMatrixMacParam>(attrs.parsed).transpose_b;
-     axis_param  = nnvm::get<LaMatrixMacParam>(attrs.parsed).axis;
+    // Matrix-Matrix mac
+    transpose_a = nnvm::get<LaMatrixMacParam>(attrs.parsed).transpose_a;
+    transpose_b = nnvm::get<LaMatrixMacParam>(attrs.parsed).transpose_b;
+    axis_param  = nnvm::get<LaMatrixMacParam>(attrs.parsed).axis;
   }
-  if ( (*in_attrs)[0].ndim() >= 2 && (*in_attrs)[0].ndim() == (*in_attrs)[1].ndim() ) {
+  if ((*in_attrs)[0].ndim() >= 2 && (*in_attrs)[0].ndim() == (*in_attrs)[1].ndim()) {
     // Forward shape inference.
     const int ndim((*in_attrs)[0].ndim()), axis(axis_param < 0 ? ndim + axis_param : axis_param);
-    CHECK(axis >= 0 && axis < ndim-1)
-      << "Invalid row axis (" << axis_param << ")";
+    CHECK(axis >= 0 && axis < ndim - 1) << "Invalid row axis (" << axis_param << ")";
     std::vector<int> oshape(ndim);
-    for ( int i = 0; i < ndim-1; ++i ) {
+    for (int i = 0; i < ndim - 1; ++i) {
       if (i != axis) {
         // Both inputs must have same shape except for row/col dimensions.
         CHECK_EQ((*in_attrs)[0][i], (*in_attrs)[1][i])
-          << "Shapes of inputs 0, 1 must be the same, except on row/col axis";
+            << "Shapes of inputs 0, 1 must be the same, except on row/col axis";
       }
       oshape[i] = (*in_attrs)[0][i];
     }
-    CHECK_EQ((transpose_a ? (*in_attrs)[0][axis] : (*in_attrs)[0][ndim-1]),
-             (transpose_b ? (*in_attrs)[1][ndim-1] : (*in_attrs)[1][axis]))
-             << "Incompatible matrix dimensions for multiplication";
-    oshape[axis] = (transpose_a ? (*in_attrs)[0][ndim-1] : (*in_attrs)[0][axis]);
-    oshape[ndim-1] = (transpose_b ? (*in_attrs)[1][axis] : (*in_attrs)[1][ndim-1]);
+    CHECK_EQ((transpose_a ? (*in_attrs)[0][axis] : (*in_attrs)[0][ndim - 1]),
+             (transpose_b ? (*in_attrs)[1][ndim - 1] : (*in_attrs)[1][axis]))
+        << "Incompatible matrix dimensions for multiplication";
+    oshape[axis]     = (transpose_a ? (*in_attrs)[0][ndim - 1] : (*in_attrs)[0][axis]);
+    oshape[ndim - 1] = (transpose_b ? (*in_attrs)[1][axis] : (*in_attrs)[1][ndim - 1]);
     mxnet::TShape tshape(oshape.begin(), oshape.end());
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, tshape);
-    if ( in_attrs->size() > 2 ) {
-       // Infer/check shape of third operand of a mac.
-       SHAPE_ASSIGN_CHECK(*in_attrs, 2, tshape);
+    if (in_attrs->size() > 2) {
+      // Infer/check shape of third operand of a mac.
+      SHAPE_ASSIGN_CHECK(*in_attrs, 2, tshape);
     }
     return true;
   }
@@ -219,50 +196,50 @@ inline bool LaTriangMatrixMultOpShape(const nnvm::NodeAttrs& attrs,
   const LaTriangMatrixMultParam& param = nnvm::get<LaTriangMatrixMultParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 2);
   CHECK_EQ(out_attrs->size(), 1);
-  if ( (*in_attrs)[0].ndim() >= 2 && (*in_attrs)[0].ndim() == (*in_attrs)[1].ndim() ) {
+  if ((*in_attrs)[0].ndim() >= 2 && (*in_attrs)[0].ndim() == (*in_attrs)[1].ndim()) {
     // Forward shape inference.
     const int ndim((*in_attrs)[0].ndim());
-    CHECK_EQ((*in_attrs)[0][ndim-2], (*in_attrs)[0][ndim-1])
-      << "First operand must be a tensor of square matrices";
+    CHECK_EQ((*in_attrs)[0][ndim - 2], (*in_attrs)[0][ndim - 1])
+        << "First operand must be a tensor of square matrices";
     std::vector<int> oshape(ndim);
-    for ( int i = 0; i < ndim-2; ++i ) {
+    for (int i = 0; i < ndim - 2; ++i) {
       // Must have same shape except for last two dimensions.
       CHECK_EQ((*in_attrs)[0][i], (*in_attrs)[1][i])
-        << "Shapes of inputs 0, 1 must be the same, except on last two dimensions";
+          << "Shapes of inputs 0, 1 must be the same, except on last two dimensions";
       oshape[i] = (*in_attrs)[0][i];
     }
-    if ( param.rightside ) {
+    if (param.rightside) {
       // We compute B * A where A is the first and B the second input.
-      CHECK_EQ((*in_attrs)[0][ndim-2], (*in_attrs)[1][ndim-1])
-        << "Incompatible matrix dimensions for multiplication";
-      oshape[ndim-2] = (*in_attrs)[1][ndim-2];
-      oshape[ndim-1] = (param.transpose ? (*in_attrs)[0][ndim-2] : (*in_attrs)[0][ndim-1]);
+      CHECK_EQ((*in_attrs)[0][ndim - 2], (*in_attrs)[1][ndim - 1])
+          << "Incompatible matrix dimensions for multiplication";
+      oshape[ndim - 2] = (*in_attrs)[1][ndim - 2];
+      oshape[ndim - 1] = (param.transpose ? (*in_attrs)[0][ndim - 2] : (*in_attrs)[0][ndim - 1]);
     } else {
       // We compute A * B where A is the first and B the second input.
-      CHECK_EQ((*in_attrs)[1][ndim-2], (*in_attrs)[0][ndim-1])
-        << "Incompatible matrix dimensions for multiplication";
-      oshape[ndim-2] = (param.transpose ? (*in_attrs)[0][ndim-1] : (*in_attrs)[0][ndim-2]);
-      oshape[ndim-1] = (*in_attrs)[1][ndim-1];
+      CHECK_EQ((*in_attrs)[1][ndim - 2], (*in_attrs)[0][ndim - 1])
+          << "Incompatible matrix dimensions for multiplication";
+      oshape[ndim - 2] = (param.transpose ? (*in_attrs)[0][ndim - 1] : (*in_attrs)[0][ndim - 2]);
+      oshape[ndim - 1] = (*in_attrs)[1][ndim - 1];
     }
     mxnet::TShape tshape(oshape.begin(), oshape.end());
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, tshape);
     return true;
   }
-  if ( (*out_attrs)[0].ndim() >= 2 ) {
+  if ((*out_attrs)[0].ndim() >= 2) {
     // Backward shape inference.
     const int odim((*out_attrs)[0].ndim());
     std::vector<int> ishape1(odim), ishape2(odim);
-    for ( int i = 0; i < odim-2; ++i ) {
+    for (int i = 0; i < odim - 2; ++i) {
       ishape1[i] = ishape2[i] = (*out_attrs)[0][i];
     }
-    if ( param.rightside ) {
+    if (param.rightside) {
       // We compute B * A where A is the first and B the second input.
-      ishape2[odim-2] = (*out_attrs)[0][odim-2];
-      ishape1[odim-2] = ishape1[odim-1] = ishape2[odim-1] = (*out_attrs)[0][odim-1];
+      ishape2[odim - 2] = (*out_attrs)[0][odim - 2];
+      ishape1[odim - 2] = ishape1[odim - 1] = ishape2[odim - 1] = (*out_attrs)[0][odim - 1];
     } else {
       // We compute A * B where A is the first and B the second input.
-      ishape2[odim-1] = (*out_attrs)[0][odim-1];
-      ishape1[odim-2] = ishape1[odim-1] = ishape2[odim-2] = (*out_attrs)[0][odim-2];
+      ishape2[odim - 1] = (*out_attrs)[0][odim - 1];
+      ishape1[odim - 2] = ishape1[odim - 1] = ishape2[odim - 2] = (*out_attrs)[0][odim - 2];
     }
     mxnet::TShape tshape1(ishape1.begin(), ishape1.end());
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, tshape1);
@@ -273,7 +250,7 @@ inline bool LaTriangMatrixMultOpShape(const nnvm::NodeAttrs& attrs,
   return false;
 }
 
-template<int dim>
+template <int dim>
 inline bool LaReduceShape(const nnvm::NodeAttrs& attrs,
                           mxnet::ShapeVector* in_attrs,
                           mxnet::ShapeVector* out_attrs) {
@@ -285,9 +262,9 @@ inline bool LaReduceShape(const nnvm::NodeAttrs& attrs,
   if (ndim < dim) {
     return false;
   }
-  std::vector<int> oshape(std::max(1, ndim-dim));
+  std::vector<int> oshape(std::max(1, ndim - dim));
   oshape[0] = 1;
-  for ( int i = 0; i < ndim - dim; ++i ) {
+  for (int i = 0; i < ndim - dim; ++i) {
     oshape[i] = (*in_attrs)[0][i];
   }
   // Will reduce all matrices/vectors to a scalar.
@@ -296,7 +273,7 @@ inline bool LaReduceShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<bool diag, bool extract>
+template <bool diag, bool extract>
 inline bool LaDiagTrianShape(const nnvm::NodeAttrs& attrs,
                              mxnet::ShapeVector* in_attrs,
                              mxnet::ShapeVector* out_attrs) {
@@ -309,28 +286,26 @@ inline bool LaDiagTrianShape(const nnvm::NodeAttrs& attrs,
   }
   const int offset = (diag ? nnvm::get<LaDiagParam>(attrs.parsed).offset
                            : nnvm::get<LaTrianParam>(attrs.parsed).offset);
-  std::vector<int> oshape(extract ? ndim-1 : ndim+1);
-  for (int i = 0; i < ndim-1; ++i) {
+  std::vector<int> oshape(extract ? ndim - 1 : ndim + 1);
+  for (int i = 0; i < ndim - 1; ++i) {
     oshape[i] = (*in_attrs)[0][i];
   }
   if (extract) {
-    CHECK_GE(ndim, 2)
-      << "Input operand must be a tensor of matrices";
-    CHECK_EQ((*in_attrs)[0][ndim-2], (*in_attrs)[0][ndim-1])
-      << "Input operand must be a tensor of square matrices";
-    const int n((*in_attrs)[0][ndim-1]-abs(offset));
-    CHECK_GT(n, 0)
-      << "Illegal offset " << offset << " for diag/trian extraction of matrix with dimension "
-      << ndim;
-    oshape[ndim-2] = (diag ? n : (n*(n+1))/2);
+    CHECK_GE(ndim, 2) << "Input operand must be a tensor of matrices";
+    CHECK_EQ((*in_attrs)[0][ndim - 2], (*in_attrs)[0][ndim - 1])
+        << "Input operand must be a tensor of square matrices";
+    const int n((*in_attrs)[0][ndim - 1] - abs(offset));
+    CHECK_GT(n, 0) << "Illegal offset " << offset
+                   << " for diag/trian extraction of matrix with dimension " << ndim;
+    oshape[ndim - 2] = (diag ? n : (n * (n + 1)) / 2);
   } else if (diag) {
-    oshape[ndim] = oshape[ndim-1] = (*in_attrs)[0][ndim-1]+abs(offset);
+    oshape[ndim] = oshape[ndim - 1] = (*in_attrs)[0][ndim - 1] + abs(offset);
   } else {
-    const int n((*in_attrs)[0][ndim-1]);
-    const int m(std::floor(0.5+(std::sqrt(8*n+1)-1.0)*0.5));
-    CHECK_EQ((m*(m+1))/2, n)
-      << "Input tensor of maketrian has an invalid dimension for the last axis.";
-    oshape[ndim] = oshape[ndim-1] = m+abs(offset);
+    const int n((*in_attrs)[0][ndim - 1]);
+    const int m(std::floor(0.5 + (std::sqrt(8 * n + 1) - 1.0) * 0.5));
+    CHECK_EQ((m * (m + 1)) / 2, n)
+        << "Input tensor of maketrian has an invalid dimension for the last axis.";
+    oshape[ndim] = oshape[ndim - 1] = m + abs(offset);
   }
   mxnet::TShape tshape(oshape.begin(), oshape.end());
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, tshape);
@@ -344,16 +319,16 @@ inline bool LaSyrkShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   const mxnet::TShape& in_attr = (*in_attrs)[0];
-  bool transpose = nnvm::get<LaSyrkParam>(attrs.parsed).transpose;
-  const int ndim = in_attr.ndim();
-  if ( ndim >= 2 ) {
+  bool transpose               = nnvm::get<LaSyrkParam>(attrs.parsed).transpose;
+  const int ndim               = in_attr.ndim();
+  if (ndim >= 2) {
     // Forward shape inference.
     std::vector<int> oshape(ndim);
-    for ( int i = 0; i < ndim-2; ++i ) {
+    for (int i = 0; i < ndim - 2; ++i) {
       oshape[i] = in_attr[i];
     }
-    oshape[ndim-2] = (transpose ? in_attr[ndim-1] : in_attr[ndim-2]);
-    oshape[ndim-1] = oshape[ndim-2];
+    oshape[ndim - 2] = (transpose ? in_attr[ndim - 1] : in_attr[ndim - 2]);
+    oshape[ndim - 1] = oshape[ndim - 2];
     mxnet::TShape tshape(oshape.begin(), oshape.end());
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, tshape);
     return true;
@@ -369,36 +344,35 @@ inline bool LaLQFactShape(const nnvm::NodeAttrs& attrs,
                           mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 2);
-  const mxnet::TShape& in_a = (*in_attrs)[0];
+  const mxnet::TShape& in_a  = (*in_attrs)[0];
   const mxnet::TShape& out_q = (*out_attrs)[0];
   const mxnet::TShape& out_l = (*out_attrs)[1];
-  if ( in_a.ndim() >= 2 ) {
+  if (in_a.ndim() >= 2) {
     // Forward shape inference.
     const int ndim(in_a.ndim());
-    CHECK_LE(in_a[ndim-2], in_a[ndim-1])
-      << "Input A shape wrong: Last dimension must be >= than second to last";
+    CHECK_LE(in_a[ndim - 2], in_a[ndim - 1])
+        << "Input A shape wrong: Last dimension must be >= than second to last";
     // Q must have same shape as A
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, in_a);
     std::vector<int> oshape_l(ndim);
-    for ( int i = 0; i < ndim-1; ++i ) {
+    for (int i = 0; i < ndim - 1; ++i) {
       oshape_l[i] = in_a[i];
     }
-    oshape_l[ndim-1] = in_a[ndim-2];
+    oshape_l[ndim - 1] = in_a[ndim - 2];
     mxnet::TShape tshape_l(oshape_l.begin(), oshape_l.end());
     SHAPE_ASSIGN_CHECK(*out_attrs, 1, tshape_l);
     return true;
   }
-  if ( out_q.ndim() >= 2 && out_q.ndim() == out_l.ndim() ) {
+  if (out_q.ndim() >= 2 && out_q.ndim() == out_l.ndim()) {
     // Backward shape inference.
     const int ndim(out_q.ndim());
-    for ( int i = 0; i < ndim-1; ++i ) {
-      CHECK_EQ(out_q[i], out_l[i])
-        << "Outputs Q, L must have same dimensions except for last";
+    for (int i = 0; i < ndim - 1; ++i) {
+      CHECK_EQ(out_q[i], out_l[i]) << "Outputs Q, L must have same dimensions except for last";
     }
-    CHECK_LE(out_q[ndim-2], out_q[ndim-1])
-      << "Output Q shape wrong: Last dimension must be >= than second to last";
-    CHECK_EQ(out_l[ndim-2], out_l[ndim-1])
-      << "Output L shape wrong: Last two dimensions must be equal";
+    CHECK_LE(out_q[ndim - 2], out_q[ndim - 1])
+        << "Output Q shape wrong: Last dimension must be >= than second to last";
+    CHECK_EQ(out_l[ndim - 2], out_l[ndim - 1])
+        << "Output L shape wrong: Last two dimensions must be equal";
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_q);
     return true;
   }
@@ -413,26 +387,28 @@ inline bool InverseShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   const mxnet::TShape& in = (*in_attrs)[0];
-  if (!ndim_is_known(in)) return false;
+  if (!ndim_is_known(in))
+    return false;
   const int ndim(in.ndim());
   CHECK_GE(ndim, 2) << "Input A's dimension must be >= 2";
-  CHECK_EQ(in[ndim-2], in[ndim-1]) << "Input A's last two dimension must be equal";
+  CHECK_EQ(in[ndim - 2], in[ndim - 1]) << "Input A's last two dimension must be equal";
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, in);
   return shape_is_known(in);
 }
 
 // Shape inference function for det functions in linalg
-template<int onum>
+template <int onum>
 inline bool DetShape(const nnvm::NodeAttrs& attrs,
                      mxnet::ShapeVector* in_attrs,
                      mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), onum + 2);
   const mxnet::TShape& in = (*in_attrs)[0];
-  if (!ndim_is_known(in)) return false;
+  if (!ndim_is_known(in))
+    return false;
   const int ndim(in.ndim());
   CHECK_GE(ndim, 2) << "Input A's dimension must be >= 2";
-  CHECK_EQ(in[ndim-2], in[ndim-1]) << "Input A's last two dimension must be equal";
+  CHECK_EQ(in[ndim - 2], in[ndim - 1]) << "Input A's last two dimension must be equal";
   mxnet::TShape out;
   if (ndim == 2) {
     if (Imperative::Get()->is_np_shape() || in.Size() == 0U) {
@@ -446,13 +422,13 @@ inline bool DetShape(const nnvm::NodeAttrs& attrs,
   for (int i = 0; i < onum; ++i) {
     SHAPE_ASSIGN_CHECK(*out_attrs, i, out); /* sign or det or logdet */
   }
-  SHAPE_ASSIGN_CHECK(*out_attrs, onum, in); /* LU */
+  SHAPE_ASSIGN_CHECK(*out_attrs, onum, in);                                          /* LU */
   SHAPE_ASSIGN_CHECK(*out_attrs, onum + 1, mxnet::TShape(in.begin(), in.end() - 1)); /* pivot */
   return shape_is_known(in);
 }
 
 // Type inference function for det functions in linalg
-template<int onum>
+template <int onum>
 inline bool DetType(const nnvm::NodeAttrs& attrs,
                     std::vector<int>* in_type,
                     std::vector<int>* out_type) {
@@ -460,13 +436,14 @@ inline bool DetType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_type->size(), 1);
   CHECK_EQ(out_type->size(), onum + 2);
   const int dtype = (*in_type)[0];
-  if (dtype == -1) return false;
+  if (dtype == -1)
+    return false;
   CHECK(dtype == kFloat32 || dtype == kFloat64)
-    << "This operation only supports 32-bit and 64-bit floating point";
+      << "This operation only supports 32-bit and 64-bit floating point";
   for (int i = 0; i < onum; ++i) {
-    TYPE_ASSIGN_CHECK(*out_type, i, dtype);  /* sign or det or logdet */
+    TYPE_ASSIGN_CHECK(*out_type, i, dtype); /* sign or det or logdet */
   }
-  TYPE_ASSIGN_CHECK(*out_type, onum, dtype);  /* LU */
+  TYPE_ASSIGN_CHECK(*out_type, onum, dtype);               /* LU */
   TYPE_ASSIGN_CHECK(*out_type, onum + 1, index_type_flag); /* pivot */
   return true;
 }
@@ -478,33 +455,32 @@ inline bool LaEigFactShape(const nnvm::NodeAttrs& attrs,
                            mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 2);
-  const mxnet::TShape& in_a = (*in_attrs)[0];
+  const mxnet::TShape& in_a  = (*in_attrs)[0];
   const mxnet::TShape& out_u = (*out_attrs)[0];
   const mxnet::TShape& out_l = (*out_attrs)[1];
-  if ( in_a.ndim() >= 2 ) {
+  if (in_a.ndim() >= 2) {
     // Forward shape inference.
     const int ndim(in_a.ndim());
-    CHECK_EQ(in_a[ndim-2], in_a[ndim-1])
-      << "Input A shape wrong: Last two dimensions must be equal";
+    CHECK_EQ(in_a[ndim - 2], in_a[ndim - 1])
+        << "Input A shape wrong: Last two dimensions must be equal";
     // U must have same shape as A
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, in_a);
-    std::vector<int> oshape_l(ndim-1);
-    for ( int i = 0; i < ndim-1; ++i ) {
+    std::vector<int> oshape_l(ndim - 1);
+    for (int i = 0; i < ndim - 1; ++i) {
       oshape_l[i] = in_a[i];
     }
     mxnet::TShape tshape_l(oshape_l.begin(), oshape_l.end());
     SHAPE_ASSIGN_CHECK(*out_attrs, 1, tshape_l);
     return true;
   }
-  if ( out_u.ndim() >= 2 && out_u.ndim() == out_l.ndim()+1 ) {
+  if (out_u.ndim() >= 2 && out_u.ndim() == out_l.ndim() + 1) {
     // Backward shape inference.
     const int ndim(out_u.ndim());
-    for ( int i = 0; i < ndim-1; ++i ) {
-      CHECK_EQ(out_u[i], out_l[i])
-        << "Outputs U, L must have same dimensions except for last";
+    for (int i = 0; i < ndim - 1; ++i) {
+      CHECK_EQ(out_u[i], out_l[i]) << "Outputs U, L must have same dimensions except for last";
     }
-    CHECK_EQ(out_u[ndim-2], out_u[ndim-1])
-      << "Output U shape wrong: Last two dimensions must be equal";
+    CHECK_EQ(out_u[ndim - 2], out_u[ndim - 1])
+        << "Output U shape wrong: Last two dimensions must be equal";
     // A must have same shape as U
     SHAPE_ASSIGN_CHECK(*in_attrs, 0, out_u);
     return true;
@@ -513,13 +489,14 @@ inline bool LaEigFactShape(const nnvm::NodeAttrs& attrs,
 }
 
 // Flattener for following adaptors.
-template<typename xpu, int dim, typename DType>
+template <typename xpu, int dim, typename DType>
 mshadow::Tensor<xpu, dim, DType> LaOpFlatten(const TBlob& blob,
-                                             mshadow::Stream<xpu> *s, int axis = -2) {
+                                             mshadow::Stream<xpu>* s,
+                                             int axis = -2) {
   if (axis < 0) {
     axis = blob.ndim() + axis;
   }
-  if (axis >= blob.ndim()-2) {
+  if (axis >= blob.ndim() - 2) {
     // Leave highest axis, collapse rest.
     return blob.FlatToKD<xpu, dim, DType>(s);
   }
@@ -532,134 +509,158 @@ mshadow::Tensor<xpu, dim, DType> LaOpFlatten(const TBlob& blob,
   }
   shape[1] = blob.shape_[axis];
   shape[2] = 1;
-  for (int i = axis+1; i < blob.ndim()-1; ++i) {
+  for (int i = axis + 1; i < blob.ndim() - 1; ++i) {
     shape[2] *= blob.shape_[i];
   }
-  shape[3] = blob.shape_[blob.ndim()-1];
+  shape[3] = blob.shape_[blob.ndim() - 1];
   return blob.get_with_shape<xpu, dim, DType>(shape.get<dim>(), s);
 }
 
 // Adapters for calling the various operators with appropriate signatures.
 
-template<typename xpu, typename DType, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, typename DType, int idim, int odim, int inum, int onum, typename laop>
 struct LaOpCaller {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
+                 const OpContext& ctx,
+                 int axis = -2) {
     CHECK(false) << "no specialized LaOpCaller defined for template parameters";
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 1, 1, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 1, 2, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[1], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[1], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 2, 1, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[1], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[1], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 3, 1, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[1], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[2], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[1], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[2], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 3, 2, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[1], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[2], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[1], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[1], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[2], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[1], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 4, 1, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[1], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[2], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[3], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[1], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[2], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[3], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 4, 2, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[1], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[2], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[3], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[1], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[1], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[2], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[3], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[1], s, axis),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, int idim, int odim, typename laop>
+template <typename xpu, typename DType, int idim, int odim, typename laop>
 struct LaOpCaller<xpu, DType, idim, odim, 4, 3, laop> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
-                 const OpContext& ctx, int axis = -2) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-    laop::op(LaOpFlatten<xpu, idim+1, DType>(inputs[0], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[1], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[2], s, axis),
-             LaOpFlatten<xpu, idim+1, DType>(inputs[3], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[0], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[1], s, axis),
-             LaOpFlatten<xpu, odim+1, DType>(outputs[2], s, axis), ctx, attrs);
+                 const OpContext& ctx,
+                 int axis = -2) {
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+    laop::op(LaOpFlatten<xpu, idim + 1, DType>(inputs[0], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[1], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[2], s, axis),
+             LaOpFlatten<xpu, idim + 1, DType>(inputs[3], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[0], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[1], s, axis),
+             LaOpFlatten<xpu, odim + 1, DType>(outputs[2], s, axis),
+             ctx,
+             attrs);
   }
 };
 
-
-template<typename xpu, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, int idim, int odim, int inum, int onum, typename laop>
 void LaOpForward(const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx,
                  const std::vector<TBlob>& inputs,
@@ -669,33 +670,31 @@ void LaOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), inum);
   CHECK_EQ(outputs.size(), onum);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, outputs,
-                                                             attrs, ctx);
+    LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, outputs, attrs, ctx);
   });
 }
 
-template<typename xpu, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, int idim, int odim, int inum, int onum, typename laop>
 void LaOpBackward(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
                   const std::vector<OpReqType>& req,
                   const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), inum);
   CHECK_EQ(outputs.size(), onum);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
     std::vector<TBlob> tspace(outputs);
-    for ( int i = 0; i < onum; ++i ) {
-      if ( req[i] == kAddTo ) {
-        tspace[i].dptr_ = ctx.requested[0]
-                             .get_space_typed<xpu, 1, OType>(Shape1(outputs[i].Size()), s).dptr_;
+    for (int i = 0; i < onum; ++i) {
+      if (req[i] == kAddTo) {
+        tspace[i].dptr_ =
+            ctx.requested[0].get_space_typed<xpu, 1, OType>(Shape1(outputs[i].Size()), s).dptr_;
       }
     }
-    LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, tspace,
-                                                             attrs, ctx);
-    for ( int i = 0; i < onum; ++i ) {
-      if ( req[i] == kAddTo ) {
+    LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, tspace, attrs, ctx);
+    for (int i = 0; i < onum; ++i) {
+      if (req[i] == kAddTo) {
         Tensor<xpu, 1, OType> out = outputs[i].FlatTo1D<xpu, OType>(s);
         out += tspace[i].FlatTo1D<xpu, OType>(s);
       }
@@ -703,7 +702,7 @@ void LaOpBackward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, int idim, int odim, int inum, int onum, typename laop>
 void LaOpGemmForward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -715,45 +714,43 @@ void LaOpGemmForward(const nnvm::NodeAttrs& attrs,
   const int axis(inputs.size() == 2 ? nnvm::get<LaMatrixMultParam>(attrs.parsed).axis
                                     : nnvm::get<LaMatrixMacParam>(attrs.parsed).axis);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    if (axis == -2 || axis == inputs[0].ndim()-2) {
-      LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, outputs,
-                                                               attrs, ctx);
+    if (axis == -2 || axis == inputs[0].ndim() - 2) {
+      LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, outputs, attrs, ctx);
     } else {
-      LaOpCaller<xpu, OType, idim+1, odim+1, inum, onum, laop>::op(inputs, outputs,
-                                                                   attrs, ctx, axis);
+      LaOpCaller<xpu, OType, idim + 1, odim + 1, inum, onum, laop>::op(
+          inputs, outputs, attrs, ctx, axis);
     }
   });
 }
 
-template<typename xpu, int idim, int odim, int inum, int onum, typename laop>
+template <typename xpu, int idim, int odim, int inum, int onum, typename laop>
 void LaOpGemmBackward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), inum);
   CHECK_EQ(outputs.size(), onum);
   const int axis(inputs.size() == 3 ? nnvm::get<LaMatrixMultParam>(attrs.parsed).axis
                                     : nnvm::get<LaMatrixMacParam>(attrs.parsed).axis);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
     std::vector<TBlob> tspace(outputs);
-    for ( int i = 0; i < onum; ++i ) {
-      if ( req[i] == kAddTo ) {
-        tspace[i].dptr_ = ctx.requested[0]
-                             .get_space_typed<xpu, 1, OType>(Shape1(outputs[i].Size()), s).dptr_;
+    for (int i = 0; i < onum; ++i) {
+      if (req[i] == kAddTo) {
+        tspace[i].dptr_ =
+            ctx.requested[0].get_space_typed<xpu, 1, OType>(Shape1(outputs[i].Size()), s).dptr_;
       }
     }
-    if (axis == -2 || axis == inputs[0].ndim()-2) {
-      LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, outputs,
-                                                               attrs, ctx);
+    if (axis == -2 || axis == inputs[0].ndim() - 2) {
+      LaOpCaller<xpu, OType, idim, odim, inum, onum, laop>::op(inputs, outputs, attrs, ctx);
     } else {
-      LaOpCaller<xpu, OType, idim+1, odim+1, inum, onum, laop>::op(inputs, outputs,
-                                                                   attrs, ctx, axis);
+      LaOpCaller<xpu, OType, idim + 1, odim + 1, inum, onum, laop>::op(
+          inputs, outputs, attrs, ctx, axis);
     }
-    for ( int i = 0; i < onum; ++i ) {
-      if ( req[i] == kAddTo ) {
+    for (int i = 0; i < onum; ++i) {
+      if (req[i] == kAddTo) {
         Tensor<xpu, 1, OType> out = outputs[i].FlatTo1D<xpu, OType>(s);
         out += tspace[i].FlatTo1D<xpu, OType>(s);
       }
@@ -765,7 +762,7 @@ void LaOpGemmBackward(const nnvm::NodeAttrs& attrs,
 // different dimensionality than L
 
 // (A) => (U, L)
-template<typename xpu, typename laop>
+template <typename xpu, typename laop>
 void LaOpForwSyevd(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -775,80 +772,87 @@ void LaOpForwSyevd(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1);
   CHECK_EQ(outputs.size(), 2);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     laop::op(inputs[0].FlatToKD<xpu, 3, OType>(s),
              outputs[0].FlatToKD<xpu, 3, OType>(s),
-             outputs[1].FlatToKD<xpu, 2, OType>(s), ctx, attrs);
+             outputs[1].FlatToKD<xpu, 2, OType>(s),
+             ctx,
+             attrs);
   });
 }
 
 // (dU, dL, U, L) => (dA)
-template<typename xpu, typename laop>
+template <typename xpu, typename laop>
 void LaOpBackwSyevd(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
                     const std::vector<OpReqType>& req,
                     const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), 4);
   CHECK_EQ(outputs.size(), 1);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
     std::vector<TBlob> tspace(outputs);
-    if ( req[0] == kAddTo ) {
-      tspace[0].dptr_ = ctx.requested[0]
-        .get_space_typed<xpu, 1, OType>(Shape1(outputs[0].Size()), s).dptr_;
+    if (req[0] == kAddTo) {
+      tspace[0].dptr_ =
+          ctx.requested[0].get_space_typed<xpu, 1, OType>(Shape1(outputs[0].Size()), s).dptr_;
     }
     laop::op(inputs[0].FlatToKD<xpu, 3, OType>(s),
              inputs[1].FlatToKD<xpu, 2, OType>(s),
              inputs[2].FlatToKD<xpu, 3, OType>(s),
              inputs[3].FlatToKD<xpu, 2, OType>(s),
-             tspace[0].FlatToKD<xpu, 3, OType>(s), ctx, attrs);
-    if ( req[0] == kAddTo ) {
+             tspace[0].FlatToKD<xpu, 3, OType>(s),
+             ctx,
+             attrs);
+    if (req[0] == kAddTo) {
       Tensor<xpu, 1, OType> out = outputs[0].FlatTo1D<xpu, OType>(s);
       out += tspace[0].FlatTo1D<xpu, OType>(s);
     }
   });
 }
 
-
-template<typename xpu, typename DType, int onum, typename laop, typename IndexT>
+template <typename xpu, typename DType, int onum, typename laop, typename IndexT>
 struct LaOpDetForwardCaller {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx) {
-      CHECK(false) << "no specialized LaOpDetForward defined for template parameters";
+    CHECK(false) << "no specialized LaOpDetForward defined for template parameters";
   }
 };
-template<typename xpu, typename DType, typename laop, typename IndexT>
+template <typename xpu, typename DType, typename laop, typename IndexT>
 struct LaOpDetForwardCaller<xpu, DType, 1, laop, IndexT> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     laop::op(inputs[0].FlatToKD<xpu, 3, DType>(s),
              outputs[0].FlatToKD<xpu, 1, DType>(s),
              outputs[1].FlatToKD<xpu, 3, DType>(s),
-             outputs[2].FlatToKD<xpu, 2, IndexT>(s), ctx, attrs);
+             outputs[2].FlatToKD<xpu, 2, IndexT>(s),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, typename laop, typename IndexT>
+template <typename xpu, typename DType, typename laop, typename IndexT>
 struct LaOpDetForwardCaller<xpu, DType, 2, laop, IndexT> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     laop::op(inputs[0].FlatToKD<xpu, 3, DType>(s),
              outputs[0].FlatToKD<xpu, 1, DType>(s),
              outputs[1].FlatToKD<xpu, 1, DType>(s),
              outputs[2].FlatToKD<xpu, 3, DType>(s),
-             outputs[3].FlatToKD<xpu, 2, IndexT>(s), ctx, attrs);
+             outputs[3].FlatToKD<xpu, 2, IndexT>(s),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, int onum, typename laop>
+template <typename xpu, int onum, typename laop>
 void LaOpDetForward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -863,45 +867,49 @@ void LaOpDetForward(const nnvm::NodeAttrs& attrs,
   });
 }
 
-template<typename xpu, typename DType, int onum, typename laop, typename IndexT>
+template <typename xpu, typename DType, int onum, typename laop, typename IndexT>
 struct LaOpDetBackwardCaller {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx) {
-      CHECK(false) << "no specialized LaOpDetBackward defined for template parameters";
+    CHECK(false) << "no specialized LaOpDetBackward defined for template parameters";
   }
 };
-template<typename xpu, typename DType, typename laop, typename IndexT>
+template <typename xpu, typename DType, typename laop, typename IndexT>
 struct LaOpDetBackwardCaller<xpu, DType, 1, laop, IndexT> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     laop::op(inputs[0].FlatToKD<xpu, 1, DType>(s),
              inputs[1].FlatToKD<xpu, 1, DType>(s),
              inputs[2].FlatToKD<xpu, 3, DType>(s),
              inputs[3].FlatToKD<xpu, 2, IndexT>(s),
-             outputs[0].FlatToKD<xpu, 3, DType>(s), ctx, attrs);
+             outputs[0].FlatToKD<xpu, 3, DType>(s),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, typename DType, typename laop, typename IndexT>
+template <typename xpu, typename DType, typename laop, typename IndexT>
 struct LaOpDetBackwardCaller<xpu, DType, 2, laop, IndexT> {
   static void op(const std::vector<TBlob>& inputs,
                  const std::vector<TBlob>& outputs,
                  const nnvm::NodeAttrs& attrs,
                  const OpContext& ctx) {
-    mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+    mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
     laop::op(inputs[0].FlatToKD<xpu, 1, DType>(s),
              inputs[1].FlatToKD<xpu, 1, DType>(s),
              inputs[2].FlatToKD<xpu, 1, DType>(s),
              inputs[3].FlatToKD<xpu, 3, DType>(s),
              inputs[4].FlatToKD<xpu, 2, IndexT>(s),
-             outputs[0].FlatToKD<xpu, 3, DType>(s), ctx, attrs);
+             outputs[0].FlatToKD<xpu, 3, DType>(s),
+             ctx,
+             attrs);
   }
 };
-template<typename xpu, int onum, typename laop>
+template <typename xpu, int onum, typename laop>
 void LaOpDetBackward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -912,20 +920,20 @@ void LaOpDetBackward(const nnvm::NodeAttrs& attrs,
   if (outputs[0].shape_.Size() == 0U) {
     return;
   }
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   CHECK_EQ(inputs.size(), onum + 3);
   CHECK_EQ(outputs.size(), 1);
   MSHADOW_SGL_DBL_TYPE_SWITCH(outputs[0].type_flag_, OType, {
     std::vector<TBlob> tspace(outputs);
-    for ( size_t i = 0; i < outputs.size(); ++i ) {
-      if ( req[i] == kAddTo ) {
-        tspace[i].dptr_ = ctx.requested[0]
-                             .get_space_typed<xpu, 1, OType>(Shape1(outputs[i].Size()), s).dptr_;
+    for (size_t i = 0; i < outputs.size(); ++i) {
+      if (req[i] == kAddTo) {
+        tspace[i].dptr_ =
+            ctx.requested[0].get_space_typed<xpu, 1, OType>(Shape1(outputs[i].Size()), s).dptr_;
       }
     }
     LaOpDetBackwardCaller<xpu, OType, onum, laop, IndexT>::op(inputs, tspace, attrs, ctx);
-    for ( size_t i = 0; i < outputs.size(); ++i ) {
-      if ( req[i] == kAddTo ) {
+    for (size_t i = 0; i < outputs.size(); ++i) {
+      if (req[i] == kAddTo) {
         Tensor<xpu, 1, OType> out = outputs[i].FlatTo1D<xpu, OType>(s);
         out += tspace[i].FlatTo1D<xpu, OType>(s);
       }
@@ -934,9 +942,9 @@ void LaOpDetBackward(const nnvm::NodeAttrs& attrs,
 }
 
 // Only transfer ddet and outputs to gradient
-template<int onum>
+template <int onum>
 struct ReduceDetGrad {
-  const char *op_name;
+  const char* op_name;
   std::vector<nnvm::NodeEntry> operator()(const nnvm::ObjectPtr& n,
                                           const std::vector<nnvm::NodeEntry>& ograds) {
     std::vector<nnvm::NodeEntry> heads;
diff --git a/src/operator/tensor/matrix_op-inl.h b/src/operator/tensor/matrix_op-inl.h
index 24d6ca8af6d2..697d85e8eb1d 100644
--- a/src/operator/tensor/matrix_op-inl.h
+++ b/src/operator/tensor/matrix_op-inl.h
@@ -48,7 +48,6 @@
 #include "./pseudo2DTranspose_op-inl.cuh"
 #endif
 
-
 namespace mxnet {
 namespace op {
 
@@ -58,34 +57,33 @@ struct ReshapeParam : public dmlc::Parameter<ReshapeParam> {
   mxnet::Tuple<int> shape;
   bool reverse;
   DMLC_DECLARE_PARAMETER(ReshapeParam) {
-    DMLC_DECLARE_FIELD(shape)
-    .set_default(mxnet::Tuple<int>())
-    .describe("The target shape");
-    DMLC_DECLARE_FIELD(reverse)
-    .set_default(false)
-    .describe("If true then the special values are inferred from right to left");
+    DMLC_DECLARE_FIELD(shape).set_default(mxnet::Tuple<int>()).describe("The target shape");
+    DMLC_DECLARE_FIELD(reverse).set_default(false).describe(
+        "If true then the special values are inferred from right to left");
     DMLC_DECLARE_FIELD(target_shape)
-    .set_default(mxnet::TShape(0, -1))
-    .describe("(Deprecated! Use ``shape`` instead.) "
-              "Target new shape. One and only one dim can be 0, "
-              "in which case it will be inferred from the rest of dims");
-    DMLC_DECLARE_FIELD(keep_highest).set_default(false)
-    .describe("(Deprecated! Use ``shape`` instead.) Whether keep the highest dim unchanged."
-              "If set to true, then the first dim in target_shape is ignored,"
-              "and always fixed as input");
-  }
-
-  bool operator==(const ReshapeParam &other) const {
-    return this->target_shape == other.target_shape &&
-           this->keep_highest == other.keep_highest &&
-           this->shape == other.shape &&
-           this->reverse == other.reverse;
+        .set_default(mxnet::TShape(0, -1))
+        .describe(
+            "(Deprecated! Use ``shape`` instead.) "
+            "Target new shape. One and only one dim can be 0, "
+            "in which case it will be inferred from the rest of dims");
+    DMLC_DECLARE_FIELD(keep_highest)
+        .set_default(false)
+        .describe(
+            "(Deprecated! Use ``shape`` instead.) Whether keep the highest dim unchanged."
+            "If set to true, then the first dim in target_shape is ignored,"
+            "and always fixed as input");
+  }
+
+  bool operator==(const ReshapeParam& other) const {
+    return this->target_shape == other.target_shape && this->keep_highest == other.keep_highest &&
+           this->shape == other.shape && this->reverse == other.reverse;
   }
 };
 
-template<typename IType>
+template <typename IType>
 inline mxnet::TShape InferReshapeShape(const mxnet::Tuple<IType>& shape,
-                                       const mxnet::TShape& dshape, bool reverse) {
+                                       const mxnet::TShape& dshape,
+                                       bool reverse) {
   std::vector<IType> dshape_vec;
   std::vector<IType> param_shape_vec(shape.begin(), shape.end());
   for (int i = 0; i < dshape.ndim(); ++i) {
@@ -93,7 +91,7 @@ inline mxnet::TShape InferReshapeShape(const mxnet::Tuple<IType>& shape,
   }
   std::vector<IType> tmp;
   size_t src_idx = 0;
-  int inf_idx = -1;
+  int inf_idx    = -1;
   if (reverse) {
     std::reverse(dshape_vec.begin(), dshape_vec.end());
     std::reverse(param_shape_vec.begin(), param_shape_vec.end());
@@ -120,7 +118,7 @@ inline mxnet::TShape InferReshapeShape(const mxnet::Tuple<IType>& shape,
       }
     } else if (proposed_dim == -3) {
       // merge two dims from source
-      CHECK_LT(src_idx, dshape_len-1);
+      CHECK_LT(src_idx, dshape_len - 1);
       const int d1 = dshape_vec[src_idx++];
       const int d2 = dshape_vec[src_idx++];
       if (!mxnet::dim_size_is_known(d1) || !mxnet::dim_size_is_known(d2)) {
@@ -134,13 +132,15 @@ inline mxnet::TShape InferReshapeShape(const mxnet::Tuple<IType>& shape,
       CHECK_LT(i + 2, params_len);
       CHECK_LT(src_idx, dshape_len);
       const int d0 = dshape_vec[src_idx++];
-      IType d1 = param_shape_vec[++i];
-      IType d2 = param_shape_vec[++i];
+      IType d1     = param_shape_vec[++i];
+      IType d2     = param_shape_vec[++i];
       CHECK(d1 != -1 || d2 != -1) << "Split dims cannot both be -1.";
-      if (d1 == -1 && d0 >= 0) d1 = d0 / d2;  // d0 must be known to do this
-      if (d2 == -1 && d0 >= 0) d2 = d0 / d1;  // d0 must be known to do this
-      CHECK(d1 * d2 == static_cast<IType>(d0) || static_cast<IType>(d0) == IType(-1)) <<
-        "Split dims " << d1 << ", " << d2 << " do not divide original dim " << d0;
+      if (d1 == -1 && d0 >= 0)
+        d1 = d0 / d2;  // d0 must be known to do this
+      if (d2 == -1 && d0 >= 0)
+        d2 = d0 / d1;  // d0 must be known to do this
+      CHECK(d1 * d2 == static_cast<IType>(d0) || static_cast<IType>(d0) == IType(-1))
+          << "Split dims " << d1 << ", " << d2 << " do not divide original dim " << d0;
       tmp.push_back(d1);
       tmp.push_back(d2);
     } else {
@@ -153,7 +153,8 @@ inline mxnet::TShape InferReshapeShape(const mxnet::Tuple<IType>& shape,
   if (inf_idx >= 0) {
     if (shape_is_known(dshape)) {
       IType new_size = 1;
-      for (IType x : tmp) new_size *= x;
+      for (IType x : tmp)
+        new_size *= x;
       tmp[inf_idx] = dshape.Size() / new_size;
     } else {
       tmp[inf_idx] = -1;
@@ -168,13 +169,13 @@ inline mxnet::TShape InferReshapeShape(const mxnet::Tuple<IType>& shape,
   return oshape;
 }
 
-inline bool ReverseReshapeInferShape(mxnet::TShape *in, const mxnet::TShape& out) {
+inline bool ReverseReshapeInferShape(mxnet::TShape* in, const mxnet::TShape& out) {
   if (shape_is_known(*in) && shape_is_known(out)) {
     return true;
   } else if (!shape_is_known(out)) {
     return false;
   } else {
-    int zero_axis = -1;
+    int zero_axis           = -1;
     int known_dim_size_prod = 1;
     for (int i = 0; i < in->ndim(); i++) {
       if (!mxnet::dim_size_is_known(*in, i)) {
@@ -192,21 +193,22 @@ inline bool ReverseReshapeInferShape(mxnet::TShape *in, const mxnet::TShape& out
 }
 
 inline bool ReshapeShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   const ReshapeParam& param_ = nnvm::get<ReshapeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U) << "Input: [data]";
   CHECK_EQ(out_attrs->size(), 1U);
-  mxnet::TShape &dshape = (*in_attrs)[0];
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  mxnet::TShape& dshape = (*in_attrs)[0];
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   mxnet::TShape oshape;
   if (param_.shape.ndim() != 0) {
     oshape = InferReshapeShape(param_.shape, dshape, param_.reverse);
   } else if (param_.target_shape.ndim() != -1) {
     LOG(INFO) << "Using target_shape will be deprecated.";
-    oshape = param_.target_shape;
-    int neg_count = 0;
-    index_t inf_idx = 0;
+    oshape            = param_.target_shape;
+    int neg_count     = 0;
+    index_t inf_idx   = 0;
     index_t start_idx = param_.keep_highest ? 1 : 0;
     if (param_.keep_highest) {
       oshape[0] = dshape[0];
@@ -222,8 +224,8 @@ inline bool ReshapeShape(const nnvm::NodeAttrs& attrs,
       oshape[inf_idx] = dshape.Size() / oshape.Size();
     }
   } else {
-    return shape_is_known((*out_attrs)[0])
-           && ReverseReshapeInferShape(&(*in_attrs)[0], (*out_attrs)[0]);
+    return shape_is_known((*out_attrs)[0]) &&
+           ReverseReshapeInferShape(&(*in_attrs)[0], (*out_attrs)[0]);
   }
   ReverseReshapeInferShape(&dshape, oshape);
 #if 0
@@ -237,12 +239,13 @@ inline bool ReshapeShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool FlattenShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U) << "Input: [data]";
   CHECK_EQ(out_attrs->size(), 1U);
-  const mxnet::TShape &dshape = (*in_attrs)[0];
-  if (!shape_is_known(dshape)) return false;
+  const mxnet::TShape& dshape = (*in_attrs)[0];
+  if (!shape_is_known(dshape))
+    return false;
   size_t target_dim = 1;
   for (int i = 1; i < dshape.ndim(); ++i) {
     target_dim *= dshape[i];
@@ -254,16 +257,16 @@ inline bool FlattenShape(const nnvm::NodeAttrs& attrs,
 struct TransposeParam : public dmlc::Parameter<TransposeParam> {
   mxnet::TShape axes;
   DMLC_DECLARE_PARAMETER(TransposeParam) {
-    DMLC_DECLARE_FIELD(axes).set_default(mxnet::TShape(0, -1))
-    .describe("Target axis order. By default the axes will be inverted.");
+    DMLC_DECLARE_FIELD(axes)
+        .set_default(mxnet::TShape(0, -1))
+        .describe("Target axis order. By default the axes will be inverted.");
   }
 
-  bool operator==(const TransposeParam &other) const {
+  bool operator==(const TransposeParam& other) const {
     return this->axes == other.axes;
   }
 };
 
-
 /*!
  * \brief This function performs transpose operation on a 2D matrix by utilizing the L1 cache
  * \param in  input tensor
@@ -273,8 +276,8 @@ struct TransposeParam : public dmlc::Parameter<TransposeParam> {
  * \tparam DType Data type
  * \tparam is_addto
  */
-template<typename DType, bool is_addto>
-MSHADOW_XINLINE void Transpose2D(const DType *in, DType *out, index_t row, index_t col) {
+template <typename DType, bool is_addto>
+MSHADOW_XINLINE void Transpose2D(const DType* in, DType* out, index_t row, index_t col) {
   // ensure cache line hits and prevent cache miss for any configuration
   // L1 cache size to be utilized = 32kb = 2^15
   // Largest size of a single unit of any dtype <= 8 byte = 2^3
@@ -287,15 +290,15 @@ MSHADOW_XINLINE void Transpose2D(const DType *in, DType *out, index_t row, index
   // Instead of explicit unroll, let compiler figure out optimal unroll factor
   const index_t blocksize = 32;
 
-  // collapse 2 parallelizes 2 for loops
-  // inner 2 for loops aren't parallelized to prevent cache miss
+// collapse 2 parallelizes 2 for loops
+// inner 2 for loops aren't parallelized to prevent cache miss
 
-  // Microsoft Visual C++ compiler does not support omp collapse
-  #ifdef _MSC_VER
-    #pragma omp parallel for
-  #else
-    #pragma omp parallel for collapse(2)
-  #endif  // _MSC_VER
+// Microsoft Visual C++ compiler does not support omp collapse
+#ifdef _MSC_VER
+#pragma omp parallel for
+#else
+#pragma omp parallel for collapse(2)
+#endif  // _MSC_VER
 
   for (index_t i = 0; i < row; i += blocksize) {
     for (index_t j = 0; j < col; j += blocksize) {
@@ -315,38 +318,39 @@ MSHADOW_XINLINE void Transpose2D(const DType *in, DType *out, index_t row, index
 
 inline bool IsIdentityTranspose(const TShape& axes) {
   for (dim_t i = 0; i < axes.ndim(); i++) {
-    if (axes[i] != i) return false;
+    if (axes[i] != i)
+      return false;
   }
   return true;
 }
 
-template<typename xpu, bool is_addto = false>
+template <typename xpu, bool is_addto = false>
 bool TransposeCommonImpl(RunContext ctx,
-                   const TBlob& src,
-                   const TBlob& ret,
-                   const mxnet::TShape& axes) {
+                         const TBlob& src,
+                         const TBlob& ret,
+                         const mxnet::TShape& axes) {
   // return true when running successfully, otherwise false
   using namespace mshadow;
   using namespace mshadow::expr;
   CHECK_EQ(src.type_flag_, ret.type_flag_);
   // zero-size tensor, no need to compute
-  if (src.shape_.Size() == 0U) return true;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (src.shape_.Size() == 0U)
+    return true;
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 #ifdef __CUDACC__
   // This transpose can be used only if there exist n and m such that:
   // params = (0, ..., n-1, n+m, ..., params.size, n, ..., n+m-1)
   // Example: (0, 2, 3, 1) or (0, 3, 1, 2), but not (0, 2, 1, 3).
   if (isPseudo2DTranspose(axes)) {
-    MSHADOW_TYPE_SWITCH(ret.type_flag_, DType, {
-      transpose_pseudo2D<DType, is_addto>(ret, src, axes, s);
-    });
+    MSHADOW_TYPE_SWITCH(
+        ret.type_flag_, DType, { transpose_pseudo2D<DType, is_addto>(ret, src, axes, s); });
     return true;
   }
 #endif
   // Special handle the identity case
   if (IsIdentityTranspose(axes)) {
     MSHADOW_TYPE_SWITCH(ret.type_flag_, DType, {
-      Tensor<xpu, 1, DType> in = src.get_with_shape<xpu, 1, DType>(mshadow::Shape1(src.Size()), s);
+      Tensor<xpu, 1, DType> in  = src.get_with_shape<xpu, 1, DType>(mshadow::Shape1(src.Size()), s);
       Tensor<xpu, 1, DType> out = ret.get_with_shape<xpu, 1, DType>(mshadow::Shape1(ret.Size()), s);
       if (!is_addto) {
         // Use memcpy to accelerate the speed
@@ -361,75 +365,72 @@ bool TransposeCommonImpl(RunContext ctx,
   // Handle the general transpose case
   MSHADOW_TYPE_SWITCH(ret.type_flag_, DType, {
     switch (axes.ndim()) {
-     case 2: {
-      Tensor<xpu, 2, DType> in = src.get<xpu, 2, DType>(s);
-      Tensor<xpu, 2, DType> out = ret.get<xpu, 2, DType>(s);
-      if (ctx.get_ctx().dev_mask() == cpu::kDevMask) {
-        Transpose2D<DType, is_addto>(in.dptr_, out.dptr_, in.shape_[0], in.shape_[1]);
-      } else {
-        LOG(FATAL) << "Not Implemented. We should never reach here because the 2D case "
-                      "in GPU has been covered by transpose_pseudo2D."
-                      " Report an issue in Github.";
+      case 2: {
+        Tensor<xpu, 2, DType> in  = src.get<xpu, 2, DType>(s);
+        Tensor<xpu, 2, DType> out = ret.get<xpu, 2, DType>(s);
+        if (ctx.get_ctx().dev_mask() == cpu::kDevMask) {
+          Transpose2D<DType, is_addto>(in.dptr_, out.dptr_, in.shape_[0], in.shape_[1]);
+        } else {
+          LOG(FATAL) << "Not Implemented. We should never reach here because the 2D case "
+                        "in GPU has been covered by transpose_pseudo2D."
+                        " Report an issue in Github.";
+        }
+        break;
       }
-      break;
-     }
-     case 3: {
-      Tensor<xpu, 3, DType> in = src.get<xpu, 3, DType>(s);
-      Tensor<xpu, 3, DType> out = ret.get<xpu, 3, DType>(s);
-      if (!is_addto) {
-        out = transpose(in, axes.get<3>());
-      } else {
-        out += transpose(in, axes.get<3>());
+      case 3: {
+        Tensor<xpu, 3, DType> in  = src.get<xpu, 3, DType>(s);
+        Tensor<xpu, 3, DType> out = ret.get<xpu, 3, DType>(s);
+        if (!is_addto) {
+          out = transpose(in, axes.get<3>());
+        } else {
+          out += transpose(in, axes.get<3>());
+        }
+        break;
       }
-      break;
-     }
-     case 4: {
-      Tensor<xpu, 4, DType> in = src.get<xpu, 4, DType>(s);
-      Tensor<xpu, 4, DType> out = ret.get<xpu, 4, DType>(s);
-      if (!is_addto) {
-        out = transpose(in, axes.get<4>());
-      } else {
-        out += transpose(in, axes.get<4>());
+      case 4: {
+        Tensor<xpu, 4, DType> in  = src.get<xpu, 4, DType>(s);
+        Tensor<xpu, 4, DType> out = ret.get<xpu, 4, DType>(s);
+        if (!is_addto) {
+          out = transpose(in, axes.get<4>());
+        } else {
+          out += transpose(in, axes.get<4>());
+        }
+        break;
       }
-      break;
-     }
-     case 5: {
-      Tensor<xpu, 5, DType> in = src.get<xpu, 5, DType>(s);
-      Tensor<xpu, 5, DType> out = ret.get<xpu, 5, DType>(s);
-      if (!is_addto) {
-        out = transpose(in, axes.get<5>());
-      } else {
-        out += transpose(in, axes.get<5>());
+      case 5: {
+        Tensor<xpu, 5, DType> in  = src.get<xpu, 5, DType>(s);
+        Tensor<xpu, 5, DType> out = ret.get<xpu, 5, DType>(s);
+        if (!is_addto) {
+          out = transpose(in, axes.get<5>());
+        } else {
+          out += transpose(in, axes.get<5>());
+        }
+        break;
       }
-      break;
-     }
-     case 6: {
-      Tensor<xpu, 6, DType> in = src.get<xpu, 6, DType>(s);
-      Tensor<xpu, 6, DType> out = ret.get<xpu, 6, DType>(s);
-      if (!is_addto) {
-        out = transpose(in, axes.get<6>());
-      } else {
-        out += transpose(in, axes.get<6>());
+      case 6: {
+        Tensor<xpu, 6, DType> in  = src.get<xpu, 6, DType>(s);
+        Tensor<xpu, 6, DType> out = ret.get<xpu, 6, DType>(s);
+        if (!is_addto) {
+          out = transpose(in, axes.get<6>());
+        } else {
+          out += transpose(in, axes.get<6>());
+        }
+        break;
       }
-      break;
-     }
-     default:
-      // return false when dimensions > 6
-      return false;
-      break;
+      default:
+        // return false when dimensions > 6
+        return false;
+        break;
     }
   });
   return true;
 }
 
-template<typename xpu, bool is_addto = false>
-void TransposeImpl(RunContext ctx,
-                   const TBlob& src,
-                   const TBlob& ret,
-                   const mxnet::TShape& axes) {
+template <typename xpu, bool is_addto = false>
+void TransposeImpl(RunContext ctx, const TBlob& src, const TBlob& ret, const mxnet::TShape& axes) {
   CHECK_LE(axes.ndim(), 6) << "TransposeImpl supports at most 6 dimensions";
-  CHECK((TransposeCommonImpl<xpu, is_addto>(ctx, src, ret, axes))) <<
-    "Failed to execute TransposeImpl Operator";
+  CHECK((TransposeCommonImpl<xpu, is_addto>(ctx, src, ret, axes)))
+      << "Failed to execute TransposeImpl Operator";
 }
 
 template <bool is_addto>
@@ -444,15 +445,14 @@ struct TransposeExKernel {
    */
   template <typename DType>
   MSHADOW_XINLINE static void Map(index_t tid,
-      DType *out_data,
-      const DType *in_data,
-      const dim_t *strides,
-      const int ndim
-      ) {
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const dim_t* strides,
+                                  const int ndim) {
     // tid is the index of input data
     const dim_t* const out_strides = strides + ndim;
-    index_t k = tid;
-    index_t out_id = 0;
+    index_t k                      = tid;
+    index_t out_id                 = 0;
     for (int i = 0; i < ndim; ++i) {
       out_id += (k / strides[i]) * out_strides[i];
       k %= strides[i];
@@ -464,81 +464,77 @@ struct TransposeExKernel {
   }
 };
 
-template<typename xpu, bool is_addto = false>
+template <typename xpu, bool is_addto = false>
 void TransposeExImpl(RunContext ctx,
-                   const TBlob& src,
-                   const TBlob& ret,
-                   const mxnet::TShape& axes,
-                   mshadow::Tensor<xpu, 1, dim_t>& strides_xpu
-                   ) {
+                     const TBlob& src,
+                     const TBlob& ret,
+                     const mxnet::TShape& axes,
+                     mshadow::Tensor<xpu, 1, dim_t>& strides_xpu) {  // NOLINT(*)
   /*
    * If ndim <= 6, it is not necessary to allocate any space for `strides_xpu`
    * If ndim > 6, `strides_xpu` should be allocated `ndim * 2` elements
    */
   using namespace mshadow;
   using namespace mshadow::expr;
-  if (TransposeCommonImpl<xpu, is_addto>(ctx, src, ret, axes)) return;
-  CHECK_GT(axes.ndim(), 6) <<
-    "Failed to execute TransposeExImpl when axes.ndim() <= 6";
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (TransposeCommonImpl<xpu, is_addto>(ctx, src, ret, axes))
+    return;
+  CHECK_GT(axes.ndim(), 6) << "Failed to execute TransposeExImpl when axes.ndim() <= 6";
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(ret.type_flag_, DType, {
-      CHECK_EQ(strides_xpu.MSize(), axes.ndim() * 2) << \
-        "If ndim > 6, `strides_xpu` should be allocated `ndim * 2` elements";
-
-      const mxnet::TShape &in_shape = src.shape_;
-      // strides: in_strides and out_strides
-      const int ndim = axes.ndim();
-      std::vector<dim_t> strides(ndim * 2);
-      // compute in_strides
-      strides[ndim - 1] = 1;
-      for (int i = ndim - 2; i >= 0; --i) {
-        strides[i] = strides[i + 1] * in_shape[i + 1];
-      }
-      // compute out_strides
-      std::vector<dim_t> tmp_strides(ndim);
-      tmp_strides[ndim - 1] = 1;
-      for (int i = ndim - 2; i >= 0; --i) {
-        tmp_strides[i] = tmp_strides[i + 1] * in_shape[axes[i + 1]];
-      }
-      // reorder tmp_strides to out_strides
-      dim_t * const out_strides = &strides[ndim];
-      for (int i = 0; i < ndim; ++i) {
-        out_strides[axes[i]] = tmp_strides[i];
-      }
-      Shape<1> strides_shape;
-      strides_shape[0] = ndim * 2;
-      Tensor<cpu, 1, dim_t> strides_cpu(strides.data(), strides_shape);
-      // copy arguments into xpu context
-      Copy(strides_xpu, strides_cpu, s);
-      const DType *in = src.dptr<DType>();
-      DType *out = ret.dptr<DType>();
-      if (is_addto) {
-        mxnet_op::Kernel<TransposeExKernel<true>, xpu>::Launch(s,
-            in_shape.Size(), out, in, strides_xpu.dptr_, ndim);
-      } else {
-        mxnet_op::Kernel<TransposeExKernel<false>, xpu>::Launch(s,
-            in_shape.Size(), out, in, strides_xpu.dptr_, ndim);
-      }
+    CHECK_EQ(strides_xpu.MSize(), axes.ndim() * 2)
+        << "If ndim > 6, `strides_xpu` should be allocated `ndim * 2` elements";
+
+    const mxnet::TShape& in_shape = src.shape_;
+    // strides: in_strides and out_strides
+    const int ndim = axes.ndim();
+    std::vector<dim_t> strides(ndim * 2);
+    // compute in_strides
+    strides[ndim - 1] = 1;
+    for (int i = ndim - 2; i >= 0; --i) {
+      strides[i] = strides[i + 1] * in_shape[i + 1];
+    }
+    // compute out_strides
+    std::vector<dim_t> tmp_strides(ndim);
+    tmp_strides[ndim - 1] = 1;
+    for (int i = ndim - 2; i >= 0; --i) {
+      tmp_strides[i] = tmp_strides[i + 1] * in_shape[axes[i + 1]];
+    }
+    // reorder tmp_strides to out_strides
+    dim_t* const out_strides = &strides[ndim];
+    for (int i = 0; i < ndim; ++i) {
+      out_strides[axes[i]] = tmp_strides[i];
+    }
+    Shape<1> strides_shape;
+    strides_shape[0] = ndim * 2;
+    Tensor<cpu, 1, dim_t> strides_cpu(strides.data(), strides_shape);
+    // copy arguments into xpu context
+    Copy(strides_xpu, strides_cpu, s);
+    const DType* in = src.dptr<DType>();
+    DType* out      = ret.dptr<DType>();
+    if (is_addto) {
+      mxnet_op::Kernel<TransposeExKernel<true>, xpu>::Launch(
+          s, in_shape.Size(), out, in, strides_xpu.dptr_, ndim);
+    } else {
+      mxnet_op::Kernel<TransposeExKernel<false>, xpu>::Launch(
+          s, in_shape.Size(), out, in, strides_xpu.dptr_, ndim);
+    }
   });
 }
 
-template<typename xpu>
-mshadow::Tensor<xpu, 1, dim_t> GetTransposeExWorkspace(
-      const OpContext& ctx,
-      const mxnet::TShape& axes
-    ) {
+template <typename xpu>
+mshadow::Tensor<xpu, 1, dim_t> GetTransposeExWorkspace(const OpContext& ctx,
+                                                       const mxnet::TShape& axes) {
   if (axes.ndim() > 6) {
     // allocate workspace when axes.ndim() > 6
     mshadow::Shape<1> strides_shape;
     strides_shape[0] = axes.ndim() * 2;
-    return ctx.requested[0].get_space_typed<xpu, 1, dim_t>(
-        strides_shape, ctx.get_stream<xpu>());
+    return ctx.requested[0].get_space_typed<xpu, 1, dim_t>(strides_shape, ctx.get_stream<xpu>());
   }
   return {};
 }
 
 // matrix transpose
-template<typename xpu>
+template <typename xpu>
 void Transpose(const nnvm::NodeAttrs& attrs,
                const OpContext& ctx,
                const std::vector<TBlob>& inputs,
@@ -549,7 +545,7 @@ void Transpose(const nnvm::NodeAttrs& attrs,
   }
   const TransposeParam& param = nnvm::get<TransposeParam>(attrs.parsed);
   CHECK(req[0] == kWriteTo || req[0] == kAddTo)
-       << "Transpose only supports kNullOp, kWriteTo and kAddTo";
+      << "Transpose only supports kNullOp, kWriteTo and kAddTo";
   mxnet::TShape axes;
   if (param.axes.ndim() == 0) {
     axes = mxnet::TShape(inputs[0].ndim(), -1);
@@ -560,24 +556,21 @@ void Transpose(const nnvm::NodeAttrs& attrs,
     axes = common::CanonicalizeAxes(param.axes);
   }
 
-  mshadow::Tensor<xpu, 1, dim_t> workspace =
-    GetTransposeExWorkspace<xpu>(ctx, axes);
+  mshadow::Tensor<xpu, 1, dim_t> workspace = GetTransposeExWorkspace<xpu>(ctx, axes);
   if (req[0] == kAddTo) {
-    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, true>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   } else {
-    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0],
-        axes, workspace);
+    TransposeExImpl<xpu, false>(ctx.run_ctx, inputs[0], outputs[0], axes, workspace);
   }
 }
 
 inline bool TransposeShape(const nnvm::NodeAttrs& attrs,
-                             mxnet::ShapeVector *in_attrs,
-                             mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   const TransposeParam& param = nnvm::get<TransposeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  mxnet::TShape& shp = (*in_attrs)[0];
+  mxnet::TShape& shp     = (*in_attrs)[0];
   mxnet::TShape& out_shp = (*out_attrs)[0];
   if (!mxnet::ndim_is_known(shp) && !mxnet::ndim_is_known(out_shp))
     return false;  // none of the shapes is known
@@ -587,10 +580,10 @@ inline bool TransposeShape(const nnvm::NodeAttrs& attrs,
   mxnet::TShape ret(std::max(shp.ndim(), out_shp.ndim()), -1);
   if (param.axes.ndim() == 0) {
     for (int i = 0; i < shp.ndim(); ++i) {
-      ret[i] = shp[shp.ndim()-1-i];
+      ret[i] = shp[shp.ndim() - 1 - i];
     }
     for (int i = 0; i < out_shp.ndim(); ++i) {
-      get[shp.ndim()-1-i] = out_shp[i];
+      get[shp.ndim() - 1 - i] = out_shp[i];
     }
   } else {
     CHECK_EQ(std::max(shp.ndim(), out_shp.ndim()), param.axes.ndim());
@@ -607,17 +600,16 @@ inline bool TransposeShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(ret);
 }
 
-
 struct ExpandDimParam : public dmlc::Parameter<ExpandDimParam> {
   int axis;
   DMLC_DECLARE_PARAMETER(ExpandDimParam) {
-    DMLC_DECLARE_FIELD(axis)
-    .describe("Position where new axis is to be inserted. Suppose that "
-              "the input `NDArray`'s dimension is `ndim`, the range of "
-              "the inserted axis is `[-ndim, ndim]`");
+    DMLC_DECLARE_FIELD(axis).describe(
+        "Position where new axis is to be inserted. Suppose that "
+        "the input `NDArray`'s dimension is `ndim`, the range of "
+        "the inserted axis is `[-ndim, ndim]`");
   }
 
-  bool operator==(const ExpandDimParam &other) const {
+  bool operator==(const ExpandDimParam& other) const {
     return this->axis == other.axis;
   }
 
@@ -628,10 +620,9 @@ struct ExpandDimParam : public dmlc::Parameter<ExpandDimParam> {
   }
 };
 
-
 inline bool ExpandDimShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   const ExpandDimParam& param = nnvm::get<ExpandDimParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -641,10 +632,10 @@ inline bool ExpandDimShape(const nnvm::NodeAttrs& attrs,
     return false;
   }
 
-  int indim = ishape.ndim();
+  int indim           = ishape.ndim();
   bool unknown_ishape = false;
   if (-1 == indim) {
-    indim = oshape.ndim() - 1;
+    indim          = oshape.ndim() - 1;
     unknown_ishape = true;
   }
 
@@ -652,29 +643,31 @@ inline bool ExpandDimShape(const nnvm::NodeAttrs& attrs,
   if (axis < 0) {
     axis += indim + 1;
   }
-  CHECK(axis >= 0 && axis <= indim)
-      << "axis must be in the range [" << -indim << ", " << indim << "] ("
-      << param.axis << " provided)";
+  CHECK(axis >= 0 && axis <= indim) << "axis must be in the range [" << -indim << ", " << indim
+                                    << "] (" << param.axis << " provided)";
   mxnet::TShape ret(indim + 1, -1);
   for (int i = 0; i < axis; ++i) {
-    ret[i] = (unknown_ishape? -1 : ishape[i]);
+    ret[i] = (unknown_ishape ? -1 : ishape[i]);
   }
   ret[axis] = 1;
-  for (int i = axis+1; i < indim+1; ++i) {
-    ret[i] = (unknown_ishape? -1 : ishape[i-1]);
+  for (int i = axis + 1; i < indim + 1; ++i) {
+    ret[i] = (unknown_ishape ? -1 : ishape[i - 1]);
   }
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, ret);
 
   ret = mxnet::TShape(indim, -1);
-  for (int i = 0; i < axis; ++i) ret[i] = oshape[i];
-  for (int i = axis+1; i < indim+1; ++i) ret[i-1] = oshape[i];
+  for (int i = 0; i < axis; ++i)
+    ret[i] = oshape[i];
+  for (int i = axis + 1; i < indim + 1; ++i)
+    ret[i - 1] = oshape[i];
   SHAPE_ASSIGN_CHECK(*in_attrs, 0, ret);
   return shape_is_known(in_attrs->at(0)) && shape_is_known(out_attrs->at(0));
 }
 
 // Currently MKLDNN only supports step = 1 or step has no value
 inline bool SupportMKLDNNSlice(const SliceParam& param) {
-  if (param.step.ndim() == 0U) return true;
+  if (param.step.ndim() == 0U)
+    return true;
   for (int i = 0; i < param.step.ndim(); ++i) {
     if (param.step[i].has_value() && param.step[i].value() != 1)
       return false;
@@ -690,36 +683,33 @@ inline bool SliceForwardInferStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
-  const auto& in_stype = in_attrs->at(0);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
-  const auto dispatch_ex = DispatchMode::kFComputeEx;
+  const auto& in_stype    = in_attrs->at(0);
+  auto& out_stype         = out_attrs->at(0);
+  bool dispatched         = false;
+  const auto dispatch_ex  = DispatchMode::kFComputeEx;
   // If step = 1, no need to fallback; otherwise fallback to dense
   bool trivial_step = false;
   if (param.step.ndim() == 0U) {
     trivial_step = true;
-  } else if (param.step.ndim() == 1U
-      && (!param.step[0].has_value() || param.step[0].value() == 1)) {
+  } else if (param.step.ndim() == 1U &&
+             (!param.step[0].has_value() || param.step[0].value() == 1)) {
     trivial_step = true;
   }
 
   if (in_stype == kDefaultStorage) {
 #if MXNET_USE_ONEDNN == 1
-    if (dev_mask == Context::kCPU && MKLDNNEnvSet()
-        && SupportMKLDNNSlice(param)) {
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                       dispatch_mode, dispatch_ex);
+    if (dev_mask == Context::kCPU && MKLDNNEnvSet() && SupportMKLDNNSlice(param)) {
+      dispatched = storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, dispatch_ex);
     }
 #endif
     if (!dispatched) {
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFCompute);
+      dispatched =
+          storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFCompute);
     }
   }
 
   if (!dispatched && in_stype == kCSRStorage && trivial_step) {
-    dispatched = storage_type_assign(&out_stype, kCSRStorage,
-                                     dispatch_mode, dispatch_ex);
+    dispatched = storage_type_assign(&out_stype, kCSRStorage, dispatch_mode, dispatch_ex);
   }
 
   if (!dispatched) {
@@ -731,7 +721,7 @@ inline bool SliceForwardInferStorageType(const nnvm::NodeAttrs& attrs,
 
 // slice the indptr of a csr
 struct SliceCsrIndPtr {
-  template<typename IType>
+  template <typename IType>
   MSHADOW_XINLINE static void Map(int i, IType* out, const IType* in, const IType* base) {
     KERNEL_ASSIGN(out[i], kWriteTo, in[i] - *base);
   }
@@ -741,12 +731,15 @@ struct SliceCsrIndPtr {
  * a wrapper to launch SliceCsrIndPtr kernel.
  * slice [src[begin] .. src[end]) and store in dst[0, end - begin)
  */
-template<typename xpu, typename IType>
-void SliceCsrIndPtrImpl(const int begin, const int end, RunContext ctx,
-                        const IType* src, IType* dst) {
+template <typename xpu, typename IType>
+void SliceCsrIndPtrImpl(const int begin,
+                        const int end,
+                        RunContext ctx,
+                        const IType* src,
+                        IType* dst) {
   using namespace mshadow;
   using namespace mxnet_op;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   int indptr_len = end - begin + 1;
   Kernel<SliceCsrIndPtr, xpu>::Launch(s, indptr_len, dst, src + begin, src + begin);
 }
@@ -754,25 +747,28 @@ void SliceCsrIndPtrImpl(const int begin, const int end, RunContext ctx,
 /*
  * Slice a CSR NDArray for first dimension
  */
-template<typename xpu>
-void SliceDimOneCsrImpl(const mxnet::TShape &begin, const mxnet::TShape &end, const OpContext& ctx,
-                        const NDArray &in, const NDArray &out) {
+template <typename xpu>
+void SliceDimOneCsrImpl(const mxnet::TShape& begin,
+                        const mxnet::TShape& end,
+                        const OpContext& ctx,
+                        const NDArray& in,
+                        const NDArray& out) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace csr;
-  nnvm::dim_t begin_row = begin[0];
-  nnvm::dim_t end_row = end[0];
+  nnvm::dim_t begin_row  = begin[0];
+  nnvm::dim_t end_row    = end[0];
   nnvm::dim_t indptr_len = end_row - begin_row + 1;
   out.CheckAndAllocAuxData(kIndPtr, Shape1(indptr_len));
   // assume idx indptr share the same type
   MSHADOW_IDX_TYPE_SWITCH(in.aux_type(kIndPtr), RType, {
     MSHADOW_IDX_TYPE_SWITCH(in.aux_type(kIdx), IType, {
       MSHADOW_TYPE_SWITCH(in.dtype(), DType, {
-        RType* in_indptr = in.aux_data(kIndPtr).dptr<RType>();
+        RType* in_indptr  = in.aux_data(kIndPtr).dptr<RType>();
         RType* out_indptr = out.aux_data(kIndPtr).dptr<RType>();
         SliceCsrIndPtrImpl<xpu, RType>(begin_row, end_row, ctx.run_ctx, in_indptr, out_indptr);
 
-        Stream<xpu> *s = ctx.get_stream<xpu>();
+        Stream<xpu>* s = ctx.get_stream<xpu>();
 
         RType nnz = 0;
         mshadow::Copy(Tensor<cpu, 1, RType>(&nnz, Shape1(1)),
@@ -785,9 +781,9 @@ void SliceDimOneCsrImpl(const mxnet::TShape &begin, const mxnet::TShape &end, co
         // copy indices and values
         out.CheckAndAllocAuxData(kIdx, Shape1(nnz));
         out.CheckAndAllocData(Shape1(nnz));
-        IType* in_idx = in.aux_data(kIdx).dptr<IType>();
-        IType* out_idx = out.aux_data(kIdx).dptr<IType>();
-        DType* in_data = in.data().dptr<DType>();
+        IType* in_idx   = in.aux_data(kIdx).dptr<IType>();
+        IType* out_idx  = out.aux_data(kIdx).dptr<IType>();
+        DType* in_data  = in.data().dptr<DType>();
         DType* out_data = out.data().dptr<DType>();
 
         RType offset = 0;
@@ -795,9 +791,11 @@ void SliceDimOneCsrImpl(const mxnet::TShape &begin, const mxnet::TShape &end, co
                       Tensor<xpu, 1, RType>(in_indptr + begin_row, Shape1(1), s));
 
         mshadow::Copy(Tensor<xpu, 1, IType>(out_idx, Shape1(nnz), s),
-                      Tensor<xpu, 1, IType>(in_idx + offset, Shape1(nnz), s), s);
+                      Tensor<xpu, 1, IType>(in_idx + offset, Shape1(nnz), s),
+                      s);
         mshadow::Copy(Tensor<xpu, 1, DType>(out_data, Shape1(nnz), s),
-                      Tensor<xpu, 1, DType>(in_data + offset, Shape1(nnz), s), s);
+                      Tensor<xpu, 1, DType>(in_data + offset, Shape1(nnz), s),
+                      s);
       });
     });
   });
@@ -819,20 +817,23 @@ struct SliceDimTwoCsrAssign {
    * \param begin_col   begin column indice
    * \param end_col     end column indice
    */
-  template<typename IType, typename RType, typename DType>
+  template <typename IType, typename RType, typename DType>
   MSHADOW_XINLINE static void Map(int i,
-                                  IType* out_idx, DType* out_data,
+                                  IType* out_idx,
+                                  DType* out_data,
                                   const RType* out_indptr,
-                                  const IType* in_idx, const DType* in_data,
+                                  const IType* in_idx,
+                                  const DType* in_data,
                                   const RType* in_indptr,
-                                  const int begin_col, const int end_col) {
+                                  const int begin_col,
+                                  const int end_col) {
     RType ind = out_indptr[i];
-    for (RType j = in_indptr[i]; j < in_indptr[i+1]; j++) {
+    for (RType j = in_indptr[i]; j < in_indptr[i + 1]; j++) {
       // indices of CSRNDArray are in ascending order per row
       if (in_idx[j] >= end_col) {
         break;
       } else if (in_idx[j] >= begin_col) {
-        out_idx[ind] = in_idx[j] - begin_col;
+        out_idx[ind]  = in_idx[j] - begin_col;
         out_data[ind] = in_data[j];
         ind++;
       }
@@ -843,15 +844,21 @@ struct SliceDimTwoCsrAssign {
 /*
  * Slice a CSR NDArray for two dimensions
  */
-template<typename xpu>
-void SliceDimTwoCsrImpl(const mxnet::TShape &begin, const mxnet::TShape &end, const OpContext& ctx,
-                        const NDArray &in, const NDArray &out);
-
-
-template<typename xpu>
-void SliceCsrImpl(const SliceParam &param, const OpContext& ctx,
-                  const NDArray &in, OpReqType req, const NDArray &out) {
-  if (req == kNullOp) return;
+template <typename xpu>
+void SliceDimTwoCsrImpl(const mxnet::TShape& begin,
+                        const mxnet::TShape& end,
+                        const OpContext& ctx,
+                        const NDArray& in,
+                        const NDArray& out);
+
+template <typename xpu>
+void SliceCsrImpl(const SliceParam& param,
+                  const OpContext& ctx,
+                  const NDArray& in,
+                  OpReqType req,
+                  const NDArray& out) {
+  if (req == kNullOp)
+    return;
   CHECK_NE(req, kAddTo) << "kAddTo for Slice on CSR input is not supported";
   CHECK_NE(req, kWriteInplace) << "kWriteInplace for Slice on CSR input is not supported";
 
@@ -864,10 +871,11 @@ void SliceCsrImpl(const SliceParam &param, const OpContext& ctx,
     int s = 0;
     if (i < param.begin.ndim() && param.begin[i]) {
       s = *param.begin[i];
-      if (s < 0) s += ishape[i];
+      if (s < 0)
+        s += ishape[i];
     }
     begin[i] = s;
-    end[i] = s + oshape[i];
+    end[i]   = s + oshape[i];
   }
   switch (N) {
     case 1: {
@@ -884,7 +892,7 @@ void SliceCsrImpl(const SliceParam &param, const OpContext& ctx,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void SliceEx(const nnvm::NodeAttrs& attrs,
              const OpContext& ctx,
              const std::vector<NDArray>& inputs,
@@ -893,7 +901,7 @@ void SliceEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1);
   CHECK_EQ(outputs.size(), 1);
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
-  auto in_stype = inputs[0].storage_type();
+  auto in_stype           = inputs[0].storage_type();
   if (in_stype == kCSRStorage) {
     SliceCsrImpl<xpu>(param, ctx, inputs[0], req[0], outputs[0]);
   } else {
@@ -901,7 +909,7 @@ void SliceEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<int ndim>
+template <int ndim>
 inline bool GetIndexRange(const mxnet::TShape& dshape,
                           const mxnet::Tuple<dmlc::optional<index_t>>& param_begin,
                           const mxnet::Tuple<dmlc::optional<index_t>>& param_end,
@@ -912,19 +920,14 @@ inline bool GetIndexRange(const mxnet::TShape& dshape,
   // Function returns false if output is zero-sized, true otherwise.
   bool zero_size_shape = false;
   CHECK_NE(dshape.ndim(), 0U);
-  CHECK_LE(param_begin.ndim(), dshape.ndim())
-    << "Slicing axis exceeds data dimensions";
-  CHECK_LE(param_end.ndim(), dshape.ndim())
-    << "Slicing axis exceeds data dimensions";
-  CHECK_EQ(param_begin.ndim(), param_end.ndim())
-    << "begin and end must have the same length";
-  CHECK_EQ(ndim, dshape.ndim())
-    << "Static array size=" << ndim
-    << " is not equal to data shape ndim=" << dshape.ndim();
+  CHECK_LE(param_begin.ndim(), dshape.ndim()) << "Slicing axis exceeds data dimensions";
+  CHECK_LE(param_end.ndim(), dshape.ndim()) << "Slicing axis exceeds data dimensions";
+  CHECK_EQ(param_begin.ndim(), param_end.ndim()) << "begin and end must have the same length";
+  CHECK_EQ(ndim, dshape.ndim()) << "Static array size=" << ndim
+                                << " is not equal to data shape ndim=" << dshape.ndim();
 
   if (param_step.ndim() > 0) {
-    CHECK_EQ(param_step.ndim(), param_begin.ndim())
-      << "step and begin must have the same length";
+    CHECK_EQ(param_step.ndim(), param_begin.ndim()) << "step and begin must have the same length";
   }
 
   for (int i = 0; i < param_begin.ndim(); ++i) {
@@ -957,8 +960,8 @@ inline bool GetIndexRange(const mxnet::TShape& dshape,
     }
 
     (*begin)[i] = b;
-    (*end)[i] = e;
-    (*step)[i] = s;
+    (*end)[i]   = e;
+    (*step)[i]  = s;
     // checking begin==end
     if (b == e) {
       zero_size_shape = true;
@@ -967,16 +970,18 @@ inline bool GetIndexRange(const mxnet::TShape& dshape,
 
   for (int i = param_begin.ndim(); i < dshape.ndim(); ++i) {
     (*begin)[i] = 0;
-    (*end)[i] = dshape[i];
-    (*step)[i] = 1;
+    (*end)[i]   = dshape[i];
+    (*step)[i]  = 1;
   }
 
   return zero_size_shape;
 }
 
 inline void SetSliceOpOutputDimSize(const mxnet::TShape& dshape,
-                                    const index_t i, const index_t b,
-                                    const index_t e, const index_t s,
+                                    const index_t i,
+                                    const index_t b,
+                                    const index_t e,
+                                    const index_t s,
                                     mxnet::TShape* oshape) {
   if (!mxnet::dim_size_is_known(dshape, i)) {
     (*oshape)[i] = -1;
@@ -989,7 +994,7 @@ inline void SetSliceOpOutputDimSize(const mxnet::TShape& dshape,
       (*oshape)[i] = e < b ? (b - e - 1) / (-s) + 1 : 0;
     }
   } else {
-      (*oshape)[i] = 0;
+    (*oshape)[i] = 0;
   }
 }
 
@@ -999,10 +1004,11 @@ inline bool SliceOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& dshape = (*in_attrs)[0];
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   CHECK_GT(dshape.ndim(), 0) << "slice only works for ndim > 0";
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
-  mxnet::TShape oshape = dshape;
+  mxnet::TShape oshape    = dshape;
 
   MXNET_NDIM_SWITCH(dshape.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
@@ -1017,68 +1023,73 @@ inline bool SliceOpShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(dshape) && shape_is_known(oshape);
 }
 
-template<int ndim, int req, typename xpu>
+template <int ndim, int req, typename xpu>
 struct slice_forward;
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct slice_forward<ndim, req, gpu> {
   // i is the i-th row after flattening out into 2D tensor
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
                                   const mshadow::Shape<ndim> dshape,
                                   const mshadow::Shape<ndim> oshape,
                                   const common::StaticArray<index_t, ndim> begin,
                                   const common::StaticArray<index_t, ndim> step) {
-    const index_t data_last_dim_size = dshape[ndim-1];
-    const index_t out_last_dim_size = oshape[ndim-1];
-    const index_t step_last_dim = step[ndim-1];
-    const index_t begin_last_dim = begin[ndim-1];
-    const index_t j = i % out_last_dim_size;
-    index_t irow = 0;  // row id of flattend 2D data
-    index_t stride = 1;
-    index_t idx = i / out_last_dim_size;
-    #pragma unroll
+    const index_t data_last_dim_size = dshape[ndim - 1];
+    const index_t out_last_dim_size  = oshape[ndim - 1];
+    const index_t step_last_dim      = step[ndim - 1];
+    const index_t begin_last_dim     = begin[ndim - 1];
+    const index_t j                  = i % out_last_dim_size;
+    index_t irow                     = 0;  // row id of flattend 2D data
+    index_t stride                   = 1;
+    index_t idx                      = i / out_last_dim_size;
+#pragma unroll
     for (int k = ndim - 2; k >= 0; --k) {
       irow += stride * ((idx % oshape[k]) * step[k] + begin[k]);
       idx /= oshape[k];
       stride *= dshape[k];
     }
-    KERNEL_ASSIGN(out[i], req,
-                  data[irow * data_last_dim_size + j * step_last_dim + begin_last_dim]);
+    KERNEL_ASSIGN(
+        out[i], req, data[irow * data_last_dim_size + j * step_last_dim + begin_last_dim]);
   }
 };
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct slice_forward<ndim, req, cpu> {
   // i is the i-th row after flattening out into 2D tensor
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* data,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* data,
                                   const mshadow::Shape<ndim> dshape,
                                   const mshadow::Shape<ndim> oshape,
                                   const common::StaticArray<index_t, ndim> begin,
                                   const common::StaticArray<index_t, ndim> step) {
-    const index_t data_last_dim_size = dshape[ndim-1];
-    const index_t out_last_dim_size = oshape[ndim-1];
-    const index_t step_last_dim = step[ndim-1];
-    const index_t begin_last_dim = begin[ndim-1];
-    index_t out_offset = i * out_last_dim_size;
+    const index_t data_last_dim_size = dshape[ndim - 1];
+    const index_t out_last_dim_size  = oshape[ndim - 1];
+    const index_t step_last_dim      = step[ndim - 1];
+    const index_t begin_last_dim     = begin[ndim - 1];
+    index_t out_offset               = i * out_last_dim_size;
     for (index_t j = 0; j < out_last_dim_size; ++j) {
-      index_t irow = 0;  // row id of flattend 2D data
+      index_t irow   = 0;  // row id of flattend 2D data
       index_t stride = 1;
-      index_t idx = i;
-      #pragma unroll
+      index_t idx    = i;
+#pragma unroll
       for (int k = ndim - 2; k >= 0; --k) {
         irow += stride * ((idx % oshape[k]) * step[k] + begin[k]);
         idx /= oshape[k];
         stride *= dshape[k];
       }
-      KERNEL_ASSIGN(out[out_offset++], req,
+      KERNEL_ASSIGN(out[out_offset++],
+                    req,
                     data[irow * data_last_dim_size + j * step_last_dim + begin_last_dim]);
     }
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void SliceOpForward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -1087,92 +1098,101 @@ void SliceOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   using namespace mshadow;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob& data = inputs[0];
-  const TBlob& out = outputs[0];
-  if (out.Size() == 0) return;
+  const TBlob& out  = outputs[0];
+  if (out.Size() == 0)
+    return;
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
   MXNET_NDIM_SWITCH(data.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
     GetIndexRange(data.shape_, param.begin, param.end, param.step, &begin, &end, &step);
-    MSHADOW_TYPE_SWITCH_WITH_BOOL(out.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        size_t num_threads = out.shape_.FlatTo2D()[0];
-        if (std::is_same<xpu, gpu>::value) {
-          num_threads *= out.shape_.get<ndim>()[ndim - 1];
-        }
-        mxnet_op::Kernel<slice_forward<ndim, Req, xpu>, xpu>::Launch(s, num_threads,
-            out.dptr<DType>(), data.dptr<DType>(),
-            data.shape_.get<ndim>(), out.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH_WITH_BOOL(out.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                                    size_t num_threads = out.shape_.FlatTo2D()[0];
+                                    if (std::is_same<xpu, gpu>::value) {
+                                      num_threads *= out.shape_.get<ndim>()[ndim - 1];
+                                    }
+                                    mxnet_op::Kernel<slice_forward<ndim, Req, xpu>, xpu>::Launch(
+                                        s,
+                                        num_threads,
+                                        out.dptr<DType>(),
+                                        data.dptr<DType>(),
+                                        data.shape_.get<ndim>(),
+                                        out.shape_.get<ndim>(),
+                                        begin,
+                                        step);
+                                  })})
   })
 }
 
-template<int ndim, int req, typename xpu>
+template <int ndim, int req, typename xpu>
 struct slice_assign;
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct slice_assign<ndim, req, cpu> {
   // i is the i-th row after flattening out into 2D tensor
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* val,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* val,
                                   const mshadow::Shape<ndim> oshape,
                                   const mshadow::Shape<ndim> vshape,
                                   const common::StaticArray<index_t, ndim> begin,
                                   const common::StaticArray<index_t, ndim> step) {
-    const index_t data_last_dim_size = oshape[ndim-1];
-    const index_t out_last_dim_size = vshape[ndim-1];
-    const index_t step_last_dim = step[ndim-1];
-    const index_t begin_last_dim = begin[ndim-1];
-    index_t offset = i * out_last_dim_size;
+    const index_t data_last_dim_size = oshape[ndim - 1];
+    const index_t out_last_dim_size  = vshape[ndim - 1];
+    const index_t step_last_dim      = step[ndim - 1];
+    const index_t begin_last_dim     = begin[ndim - 1];
+    index_t offset                   = i * out_last_dim_size;
     for (index_t j = 0; j < out_last_dim_size; ++j) {
-      index_t irow = 0;  // row id of flattend 2D out
+      index_t irow   = 0;  // row id of flattend 2D out
       index_t stride = 1;
-      index_t idx = i;
-      #pragma unroll
+      index_t idx    = i;
+#pragma unroll
       for (int k = ndim - 2; k >= 0; --k) {
         irow += stride * ((idx % vshape[k]) * step[k] + begin[k]);
         idx /= vshape[k];
         stride *= oshape[k];
       }
-      KERNEL_ASSIGN(out[irow * data_last_dim_size + j * step_last_dim + begin_last_dim],
-                    req, val[offset++]);
+      KERNEL_ASSIGN(
+          out[irow * data_last_dim_size + j * step_last_dim + begin_last_dim], req, val[offset++]);
     }
   }
 };
 
-template<int ndim, int req>
+template <int ndim, int req>
 struct slice_assign<ndim, req, gpu> {
   // i is the i-th row after flattening out into 2D tensor
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* val,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* val,
                                   const mshadow::Shape<ndim> oshape,
                                   const mshadow::Shape<ndim> vshape,
                                   const common::StaticArray<index_t, ndim> begin,
                                   const common::StaticArray<index_t, ndim> step) {
-    const index_t data_last_dim_size = oshape[ndim-1];
-    const index_t out_last_dim_size = vshape[ndim-1];
-    const index_t step_last_dim = step[ndim-1];
-    const index_t begin_last_dim = begin[ndim-1];
-    const index_t j = i % out_last_dim_size;
-    index_t irow = 0;  // row id of flattend 2D out
-    index_t stride = 1;
-    index_t idx = i / out_last_dim_size;
-    #pragma unroll
+    const index_t data_last_dim_size = oshape[ndim - 1];
+    const index_t out_last_dim_size  = vshape[ndim - 1];
+    const index_t step_last_dim      = step[ndim - 1];
+    const index_t begin_last_dim     = begin[ndim - 1];
+    const index_t j                  = i % out_last_dim_size;
+    index_t irow                     = 0;  // row id of flattend 2D out
+    index_t stride                   = 1;
+    index_t idx                      = i / out_last_dim_size;
+#pragma unroll
     for (int k = ndim - 2; k >= 0; --k) {
       irow += stride * ((idx % vshape[k]) * step[k] + begin[k]);
       idx /= vshape[k];
       stride *= oshape[k];
     }
-    KERNEL_ASSIGN(out[irow * data_last_dim_size + j * step_last_dim + begin_last_dim],
-                  req, val[i]);
+    KERNEL_ASSIGN(out[irow * data_last_dim_size + j * step_last_dim + begin_last_dim], req, val[i]);
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void SliceOpBackward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -1181,43 +1201,50 @@ void SliceOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[0] == kNullOp) return;
+  if (req[0] == kNullOp)
+    return;
   using namespace mshadow;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
-  const TBlob& ograd = inputs[0];
-  const TBlob& igrad = outputs[0];
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
+  const TBlob& ograd      = inputs[0];
+  const TBlob& igrad      = outputs[0];
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
   if (req[0] == kWriteTo) {
     Fill(s, igrad, req[0], 0);
   } else if (req[0] == kWriteInplace) {
     LOG(FATAL) << "_slice_backward does not support kWriteInplace";
   }
-  if (ograd.Size() == 0) return;
+  if (ograd.Size() == 0)
+    return;
   MXNET_NDIM_SWITCH(ograd.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
     GetIndexRange(igrad.shape_, param.begin, param.end, param.step, &begin, &end, &step);
-    MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-      int num_threads = ograd.shape_.FlatTo2D()[0];
-      if (std::is_same<xpu, gpu>::value) {
-        num_threads *= ograd.shape_.get<ndim>()[ndim - 1];
-      }
-      mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(s, num_threads,
-          igrad.dptr<DType>(), ograd.dptr<DType>(),
-          igrad.shape_.get<ndim>(), ograd.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                          int num_threads = ograd.shape_.FlatTo2D()[0];
+                          if (std::is_same<xpu, gpu>::value) {
+                            num_threads *= ograd.shape_.get<ndim>()[ndim - 1];
+                          }
+                          mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(
+                              s,
+                              num_threads,
+                              igrad.dptr<DType>(),
+                              ograd.dptr<DType>(),
+                              igrad.shape_.get<ndim>(),
+                              ograd.shape_.get<ndim>(),
+                              begin,
+                              step);
+                        })})
   })
 }
 
 inline bool SliceAssignOpShape(const nnvm::NodeAttrs& attrs,
-                               mxnet::ShapeVector *in_attrs,
-                               mxnet::ShapeVector *out_attrs) {
+                               mxnet::ShapeVector* in_attrs,
+                               mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& dshape = (*in_attrs)[0];
-  if (!mxnet::ndim_is_known(dshape)) return false;
-  mxnet::TShape vshape = dshape;  // vshape is the value shape on the right hand side
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
+  mxnet::TShape vshape    = dshape;  // vshape is the value shape on the right hand side
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
   MXNET_NDIM_SWITCH(dshape.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
@@ -1232,7 +1259,7 @@ inline bool SliceAssignOpShape(const nnvm::NodeAttrs& attrs,
   return true;
 }
 
-template<typename xpu>
+template <typename xpu>
 void SliceAssignOpForward(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<TBlob>& inputs,
@@ -1241,14 +1268,15 @@ void SliceAssignOpForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   CHECK_EQ(inputs.size(), 2U);  // data[index] = val, data and val are two inputs
   CHECK_EQ(outputs.size(), 1U);
-  if (req[0] == kNullOp) return;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  if (req[0] == kNullOp)
+    return;
+  Stream<xpu>* s    = ctx.get_stream<xpu>();
   const TBlob& data = inputs[0];
-  const TBlob& val = inputs[1];
-  const TBlob& out = outputs[0];
+  const TBlob& val  = inputs[1];
+  const TBlob& out  = outputs[0];
   if (req[0] == kWriteTo) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Tensor<xpu, 1, DType> in = inputs[0].FlatTo1D<xpu, DType>(s);
+      Tensor<xpu, 1, DType> in  = inputs[0].FlatTo1D<xpu, DType>(s);
       Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
       Copy(out, in, s);
     });
@@ -1259,22 +1287,26 @@ void SliceAssignOpForward(const nnvm::NodeAttrs& attrs,
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
   MXNET_NDIM_SWITCH(data.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
-    bool zero_size_shape = GetIndexRange(data.shape_, param.begin, param.end, param.step,
-                                        &begin, &end, &step);
+    bool zero_size_shape =
+        GetIndexRange(data.shape_, param.begin, param.end, param.step, &begin, &end, &step);
     if (zero_size_shape) {
       return;  // slice_assign of zero-sized subspace needs no operation.
     }
-    MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        index_t num_threads = val.shape_.FlatTo2D()[0];
-        if (std::is_same<xpu, gpu>::value) {
-          num_threads *= val.shape_.get<ndim>()[ndim - 1];
-        }
-        mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(s, num_threads,
-            out.dptr<DType>(), val.dptr<DType>(),
-            out.shape_.get<ndim>(), val.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                          index_t num_threads = val.shape_.FlatTo2D()[0];
+                          if (std::is_same<xpu, gpu>::value) {
+                            num_threads *= val.shape_.get<ndim>()[ndim - 1];
+                          }
+                          mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(
+                              s,
+                              num_threads,
+                              out.dptr<DType>(),
+                              val.dptr<DType>(),
+                              out.shape_.get<ndim>(),
+                              val.shape_.get<ndim>(),
+                              begin,
+                              step);
+                        })})
   })
 }
 
@@ -1283,49 +1315,50 @@ struct SliceAssignScalarParam : public dmlc::Parameter<SliceAssignScalarParam> {
   mxnet::Tuple<dmlc::optional<index_t>> begin, end;
   mxnet::Tuple<dmlc::optional<index_t>> step;
   DMLC_DECLARE_PARAMETER(SliceAssignScalarParam) {
-    DMLC_DECLARE_FIELD(scalar)
-    .set_default(0)
-    .describe("The scalar value for assignment.");
-    DMLC_DECLARE_FIELD(begin)
-    .describe("starting indices for the slice operation, supports negative indices.");
-    DMLC_DECLARE_FIELD(end)
-    .describe("ending indices for the slice operation, supports negative indices.");
+    DMLC_DECLARE_FIELD(scalar).set_default(0).describe("The scalar value for assignment.");
+    DMLC_DECLARE_FIELD(begin).describe(
+        "starting indices for the slice operation, supports negative indices.");
+    DMLC_DECLARE_FIELD(end).describe(
+        "ending indices for the slice operation, supports negative indices.");
     DMLC_DECLARE_FIELD(step)
-    .set_default(mxnet::Tuple<dmlc::optional<index_t>>())
-    .describe("step for the slice operation, supports negative values.");
+        .set_default(mxnet::Tuple<dmlc::optional<index_t>>())
+        .describe("step for the slice operation, supports negative values.");
   }
 };
 
 inline bool SliceAssignScalarOpShape(const nnvm::NodeAttrs& attrs,
-                                    mxnet::ShapeVector *in_attrs,
-                                    mxnet::ShapeVector *out_attrs) {
+                                     mxnet::ShapeVector* in_attrs,
+                                     mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& dshape = (*in_attrs)[0];
-  if (!shape_is_known(dshape)) return false;
+  if (!shape_is_known(dshape))
+    return false;
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, dshape);
   return true;
 }
 
-template<int ndim>
+template <int ndim>
 struct slice_assign_scalar {
   // i is the i-th row after flattening out into 2D tensor
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType val,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType val,
                                   const OpReqType req,
                                   const mshadow::Shape<ndim> oshape,
                                   const mshadow::Shape<ndim> vshape,
                                   const common::StaticArray<index_t, ndim> begin,
                                   const common::StaticArray<index_t, ndim> step) {
-    const index_t data_last_dim_size = oshape[ndim-1];
-    const index_t out_last_dim_size = vshape[ndim-1];
-    const index_t step_last_dim = step[ndim-1];
-    const index_t begin_last_dim = begin[ndim-1];
+    const index_t data_last_dim_size = oshape[ndim - 1];
+    const index_t out_last_dim_size  = vshape[ndim - 1];
+    const index_t step_last_dim      = step[ndim - 1];
+    const index_t begin_last_dim     = begin[ndim - 1];
     for (index_t j = 0; j < out_last_dim_size; ++j) {
-      index_t irow = 0;  // row id of flattend 2D out
+      index_t irow   = 0;  // row id of flattend 2D out
       index_t stride = 1;
-      index_t idx = i;
-      #pragma unroll
+      index_t idx    = i;
+#pragma unroll
       for (int k = ndim - 2; k >= 0; --k) {
         irow += stride * ((idx % vshape[k]) * step[k] + begin[k]);
         idx /= vshape[k];
@@ -1336,7 +1369,7 @@ struct slice_assign_scalar {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void SliceAssignScalarOpForward(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -1346,13 +1379,13 @@ void SliceAssignScalarOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   const TBlob& data = inputs[0];
-  const TBlob& out = outputs[0];
+  const TBlob& out  = outputs[0];
   if (req[0] == kWriteTo) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-      Tensor<xpu, 1, DType> in = inputs[0].FlatTo1D<xpu, DType>(s);
+      Tensor<xpu, 1, DType> in  = inputs[0].FlatTo1D<xpu, DType>(s);
       Tensor<xpu, 1, DType> out = outputs[0].FlatTo1D<xpu, DType>(s);
       Copy(out, in, s);
     });
@@ -1360,12 +1393,12 @@ void SliceAssignScalarOpForward(const nnvm::NodeAttrs& attrs,
     LOG(FATAL) << "_crop_assign_scalar only supports kWriteTo and kWriteInplace";
   }
 
-  mxnet::TShape vshape = data.shape_;
+  mxnet::TShape vshape                = data.shape_;
   const SliceAssignScalarParam& param = nnvm::get<SliceAssignScalarParam>(attrs.parsed);
   MXNET_NDIM_SWITCH(data.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
-    bool zero_size_shape = GetIndexRange(data.shape_, param.begin, param.end, param.step,
-                                        &begin, &end, &step);
+    bool zero_size_shape =
+        GetIndexRange(data.shape_, param.begin, param.end, param.step, &begin, &end, &step);
     if (zero_size_shape) {
       return;  // slice_assign of zero-sized subspaced needs no operation.
     }
@@ -1374,9 +1407,15 @@ void SliceAssignScalarOpForward(const nnvm::NodeAttrs& attrs,
       SetSliceOpOutputDimSize(data.shape_, i, b, e, s, &vshape);
     }
     MSHADOW_TYPE_SWITCH_WITH_BOOL(out.type_flag_, DType, {
-      mxnet_op::Kernel<slice_assign_scalar<ndim>, xpu>::Launch(s, vshape.FlatTo2D()[0],
-          out.dptr<DType>(), static_cast<DType>(param.scalar), req[0],
-          out.shape_.get<ndim>(), vshape.get<ndim>(), begin, step);
+      mxnet_op::Kernel<slice_assign_scalar<ndim>, xpu>::Launch(s,
+                                                               vshape.FlatTo2D()[0],
+                                                               out.dptr<DType>(),
+                                                               static_cast<DType>(param.scalar),
+                                                               req[0],
+                                                               out.shape_.get<ndim>(),
+                                                               vshape.get<ndim>(),
+                                                               begin,
+                                                               step);
     })
   })
 }
@@ -1386,29 +1425,32 @@ struct SliceAxisParam : public dmlc::Parameter<SliceAxisParam> {
   index_t begin;
   dmlc::optional<index_t> end;
   DMLC_DECLARE_PARAMETER(SliceAxisParam) {
-    DMLC_DECLARE_FIELD(axis)
-      .describe("Axis along which to be sliced, supports negative indexes.");
-    DMLC_DECLARE_FIELD(begin)
-      .describe("The beginning index along the axis to be sliced, "
-                " supports negative indexes.");
-    DMLC_DECLARE_FIELD(end)
-      .describe("The ending index along the axis to be sliced, "
-                " supports negative indexes.");
+    DMLC_DECLARE_FIELD(axis).describe("Axis along which to be sliced, supports negative indexes.");
+    DMLC_DECLARE_FIELD(begin).describe(
+        "The beginning index along the axis to be sliced, "
+        " supports negative indexes.");
+    DMLC_DECLARE_FIELD(end).describe(
+        "The ending index along the axis to be sliced, "
+        " supports negative indexes.");
   }
 };
 
-inline void GetSliceAxisParams(const SliceAxisParam& param, const mxnet::TShape& ishape,
-                           int* axis, index_t* begin, index_t* end) {
+inline void GetSliceAxisParams(const SliceAxisParam& param,
+                               const mxnet::TShape& ishape,
+                               int* axis,
+                               index_t* begin,
+                               index_t* end) {
   *axis = param.axis;
   if (*axis < 0) {
     *axis += ishape.ndim();
   }
-  CHECK(*axis < ishape.ndim() && *axis >= 0) <<
-    "Transformed axis must be smaller than the source ndim and larger than zero! Recieved axis=" <<
-    param.axis << ", src_ndim=" << ishape.ndim() << ", transformed axis=" << *axis;
+  CHECK(*axis < ishape.ndim() && *axis >= 0)
+      << "Transformed axis must be smaller than the source ndim and larger than zero! Recieved "
+         "axis="
+      << param.axis << ", src_ndim=" << ishape.ndim() << ", transformed axis=" << *axis;
   index_t axis_size = static_cast<index_t>(ishape[*axis]);
-  *begin = param.begin;
-  *end = -1;
+  *begin            = param.begin;
+  *end              = -1;
   if (*begin < 0) {
     *begin += axis_size;
   }
@@ -1422,25 +1464,25 @@ inline void GetSliceAxisParams(const SliceAxisParam& param, const mxnet::TShape&
       }
     }
     CHECK(*end <= axis_size) << "Invalid end for end=" << *end << " as axis_size is " << axis_size;
-    CHECK((*begin < *end))
-      << "Invalid begin, end, get begin=" << param.begin << ", end=" << param.end;
+    CHECK((*begin < *end)) << "Invalid begin, end, get begin=" << param.begin
+                           << ", end=" << param.end;
   } else {
     *begin = 0;
-    *end = 0;
+    *end   = 0;
   }
-  CHECK(*end >= 0)
-    << "Invalid begin, end, get begin=" << param.begin << ", end=" << param.end;
+  CHECK(*end >= 0) << "Invalid begin, end, get begin=" << param.begin << ", end=" << param.end;
   CHECK(*begin >= 0) << "Invalid begin for begin=" << param.begin;
 }
 
 inline bool SliceAxisShape(const nnvm::NodeAttrs& attrs,
-                       mxnet::ShapeVector *in_attrs,
-                       mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   const SliceAxisParam& param = nnvm::get<SliceAxisParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   mxnet::TShape& ishape = (*in_attrs)[0];
-  if (!mxnet::ndim_is_known(ishape)) return false;
+  if (!mxnet::ndim_is_known(ishape))
+    return false;
   int axis;
   index_t begin, end;
   GetSliceAxisParams(param, ishape, &axis, &begin, &end);
@@ -1460,16 +1502,15 @@ inline bool SliceAxisShape(const nnvm::NodeAttrs& attrs,
   return shape_is_known(shape);
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void SliceAxis(const nnvm::NodeAttrs& attrs,
-           const OpContext& ctx,
-           const std::vector<TBlob>& inputs,
-           const std::vector<OpReqType>& req,
-           const std::vector<TBlob>& outputs) {
+               const OpContext& ctx,
+               const std::vector<TBlob>& inputs,
+               const std::vector<OpReqType>& req,
+               const std::vector<TBlob>& outputs) {
   using namespace mshadow::expr;
   const SliceAxisParam& param = nnvm::get<SliceAxisParam>(attrs.parsed);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s     = ctx.get_stream<xpu>();
   int axis;
   index_t begin, end;
   GetSliceAxisParams(param, inputs[0].shape_, &axis, &begin, &end);
@@ -1477,103 +1518,97 @@ void SliceAxis(const nnvm::NodeAttrs& attrs,
 
   if (axis + 1 == ndim) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        mshadow::Tensor<xpu, 2, DType> in =
-            inputs[0].FlatTo2D<xpu, DType>(s);
-        mshadow::Tensor<xpu, 2, DType> out =
-            outputs[0].FlatTo2D<xpu, DType>(s);
-        ASSIGN_DISPATCH(out, req[0], slice<1>(in, begin, end));
-      });
+      mshadow::Tensor<xpu, 2, DType> in  = inputs[0].FlatTo2D<xpu, DType>(s);
+      mshadow::Tensor<xpu, 2, DType> out = outputs[0].FlatTo2D<xpu, DType>(s);
+      ASSIGN_DISPATCH(out, req[0], slice<1>(in, begin, end));
+    });
   } else {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        mshadow::Tensor<xpu, 3, DType> in =
-            inputs[0].FlatTo3D<xpu, DType>(axis, s);
-        mshadow::Tensor<xpu, 3, DType> out =
-            outputs[0].FlatTo3D<xpu, DType>(axis, s);
-        ASSIGN_DISPATCH(out, req[0], slice<1>(in, begin, end));
-      });
+      mshadow::Tensor<xpu, 3, DType> in  = inputs[0].FlatTo3D<xpu, DType>(axis, s);
+      mshadow::Tensor<xpu, 3, DType> out = outputs[0].FlatTo3D<xpu, DType>(axis, s);
+      ASSIGN_DISPATCH(out, req[0], slice<1>(in, begin, end));
+    });
   }
 }
 
 // Backward pass of broadcast over the given axis
-template<typename xpu>
+template <typename xpu>
 void SliceAxisGrad_(const nnvm::NodeAttrs& attrs,
-                const OpContext& ctx,
-                const std::vector<TBlob>& inputs,
-                const std::vector<OpReqType>& req,
-                const std::vector<TBlob>& outputs) {
+                    const OpContext& ctx,
+                    const std::vector<TBlob>& inputs,
+                    const std::vector<OpReqType>& req,
+                    const std::vector<TBlob>& outputs) {
   if (outputs[0].shape_.Size() == 0) {
     return;
   }
   const SliceAxisParam& param = nnvm::get<SliceAxisParam>(attrs.parsed);
   using namespace mshadow::op;
   using namespace mshadow::expr;
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
   int axis;
   index_t begin, end;
   GetSliceAxisParams(param, outputs[0].shape_, &axis, &begin, &end);
   int ndim = outputs[0].shape_.ndim();
   if (axis + 1 == ndim) {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        mshadow::Tensor<xpu, 2, DType> ograd =
-            inputs[0].FlatTo2D<xpu, DType>(s);
-        mshadow::Tensor<xpu, 2, DType> igrad =
-            outputs[0].FlatTo2D<xpu, DType>(s);
-        if (req[0] == kAddTo) {
-          slice<1>(igrad, begin, end) += F<identity>(ograd);
-        } else if (req[0] == kWriteTo) {
-          igrad = 0.0f;
-          slice<1>(igrad, begin, end) = F<identity>(ograd);
-        } else {
-          CHECK_EQ(req[0], kNullOp);
-        }
-      });
+      mshadow::Tensor<xpu, 2, DType> ograd = inputs[0].FlatTo2D<xpu, DType>(s);
+      mshadow::Tensor<xpu, 2, DType> igrad = outputs[0].FlatTo2D<xpu, DType>(s);
+      if (req[0] == kAddTo) {
+        slice<1>(igrad, begin, end) += F<identity>(ograd);
+      } else if (req[0] == kWriteTo) {
+        igrad                       = 0.0f;
+        slice<1>(igrad, begin, end) = F<identity>(ograd);
+      } else {
+        CHECK_EQ(req[0], kNullOp);
+      }
+    });
   } else {
     MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-        mshadow::Tensor<xpu, 3, DType> ograd =
-            inputs[0].FlatTo3D<xpu, DType>(axis, s);
-        mshadow::Tensor<xpu, 3, DType> igrad =
-            outputs[0].FlatTo3D<xpu, DType>(axis, s);
-        if (req[0] == kAddTo) {
-          slice<1>(igrad, begin, end) += F<identity>(ograd);
-        } else if (req[0] == kWriteTo) {
-          igrad = 0.0f;
-          slice<1>(igrad, begin, end) = F<identity>(ograd);
-        } else {
-          CHECK_EQ(req[0], kNullOp);
-        }
-      });
+      mshadow::Tensor<xpu, 3, DType> ograd = inputs[0].FlatTo3D<xpu, DType>(axis, s);
+      mshadow::Tensor<xpu, 3, DType> igrad = outputs[0].FlatTo3D<xpu, DType>(axis, s);
+      if (req[0] == kAddTo) {
+        slice<1>(igrad, begin, end) += F<identity>(ograd);
+      } else if (req[0] == kWriteTo) {
+        igrad                       = 0.0f;
+        slice<1>(igrad, begin, end) = F<identity>(ograd);
+      } else {
+        CHECK_EQ(req[0], kNullOp);
+      }
+    });
   }
 }
 
 struct SliceLikeParam : public dmlc::Parameter<SliceLikeParam> {
   mxnet::Tuple<int> axes;
   DMLC_DECLARE_PARAMETER(SliceLikeParam) {
-    DMLC_DECLARE_FIELD(axes).set_default(mxnet::Tuple<int>())
-    .describe("List of axes on which input data will be sliced according to the "
-              "corresponding size of the second input. By default will slice on "
-              "all axes. Negative axes are supported.");
+    DMLC_DECLARE_FIELD(axes)
+        .set_default(mxnet::Tuple<int>())
+        .describe(
+            "List of axes on which input data will be sliced according to the "
+            "corresponding size of the second input. By default will slice on "
+            "all axes. Negative axes are supported.");
   }
 };
 
 inline bool SliceLikeShape(const nnvm::NodeAttrs& attrs,
-                           mxnet::ShapeVector *in_attrs,
-                           mxnet::ShapeVector *out_attrs) {
+                           mxnet::ShapeVector* in_attrs,
+                           mxnet::ShapeVector* out_attrs) {
   const SliceLikeParam& param = nnvm::get<SliceLikeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
-  mxnet::TShape& ishape = (*in_attrs)[0];
+  mxnet::TShape& ishape     = (*in_attrs)[0];
   mxnet::TShape& from_shape = (*in_attrs)[1];
   if (!mxnet::ndim_is_known(ishape) || !mxnet::ndim_is_known(from_shape)) {
     return false;
   }
   if (param.axes.ndim() == 0) {
     CHECK_EQ(ishape.ndim(), from_shape.ndim())
-      << "By default slice_axis performs slice on all axes, but ndim mismatch "
-         "for inputs: " << ishape.ndim() << " vs. " << from_shape.ndim();
+        << "By default slice_axis performs slice on all axes, but ndim mismatch "
+           "for inputs: "
+        << ishape.ndim() << " vs. " << from_shape.ndim();
     for (int i = 0; i < ishape.ndim(); ++i) {
-      CHECK_GE(ishape[i], from_shape[i])
-        << "Slice axis " << i << " with size " << from_shape[i]
-        << "exceeds limit of input with size " << ishape[i];
+      CHECK_GE(ishape[i], from_shape[i]) << "Slice axis " << i << " with size " << from_shape[i]
+                                         << "exceeds limit of input with size " << ishape[i];
     }
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, from_shape);
   } else {
@@ -1583,16 +1618,15 @@ inline bool SliceLikeShape(const nnvm::NodeAttrs& attrs,
       if (axis < 0) {
         axis += ishape.ndim();
       }
-      CHECK_GE(axis, 0)
-        << "Slice axis: " << param.axes[i] << " too small";
+      CHECK_GE(axis, 0) << "Slice axis: " << param.axes[i] << " too small";
       CHECK_GT(ishape.ndim(), axis)
-        << "Slice axis: " << axis << " exceeds first input: " << ishape.ndim();
+          << "Slice axis: " << axis << " exceeds first input: " << ishape.ndim();
       CHECK_GT(from_shape.ndim(), axis)
-        << "Slice axis: " << axis << " exceeds second input: " << from_shape.ndim();
+          << "Slice axis: " << axis << " exceeds second input: " << from_shape.ndim();
       shape[axis] = from_shape[axis];
       CHECK_GE(ishape[axis], from_shape[axis])
-        << "Slice axis " << axis << " with size " << from_shape[axis]
-        << "exceeds limit of input with size " << ishape[axis];
+          << "Slice axis " << axis << " with size " << from_shape[axis]
+          << "exceeds limit of input with size " << ishape[axis];
     }
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, shape);
   }
@@ -1620,23 +1654,22 @@ inline void SliceLikeInferRanges(const mxnet::TShape& dshape,
       if (axis < 0) {
         axis += dshape.ndim();
       }
-      CHECK_GE(axis, 0)
-        << "Slice axis: " << axes[i] << " too small";
+      CHECK_GE(axis, 0) << "Slice axis: " << axes[i] << " too small";
       CHECK_LT(axis, dshape.ndim())
-        << "Slice axis: " << axis << " exceeds first input: " << dshape.ndim();
+          << "Slice axis: " << axis << " exceeds first input: " << dshape.ndim();
       CHECK_LT(axis, fshape.ndim())
-        << "Slice axis: " << axis << " exceeds first input: " << fshape.ndim();
+          << "Slice axis: " << axis << " exceeds first input: " << fshape.ndim();
       pb[axis] = 0;
       pe[axis] = fshape[axis];
       ps[axis] = 1;
     }
   }
   *param_begin = mxnet::Tuple<dmlc::optional<index_t>>(pb.begin(), pb.end());
-  *param_end = mxnet::Tuple<dmlc::optional<index_t>>(pe.begin(), pe.end());
-  *param_step = mxnet::Tuple<dmlc::optional<index_t>>(ps.begin(), ps.end());
+  *param_end   = mxnet::Tuple<dmlc::optional<index_t>>(pe.begin(), pe.end());
+  *param_step  = mxnet::Tuple<dmlc::optional<index_t>>(ps.begin(), ps.end());
 }
 
-template<typename xpu>
+template <typename xpu>
 void SliceLikeForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -1646,11 +1679,11 @@ void SliceLikeForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
   using namespace mshadow::expr;
-  const SliceLikeParam& param = nnvm::get<SliceLikeParam>(attrs.parsed);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& data = inputs[0];
-  const TBlob& out = outputs[0];
-  const mxnet::TShape& ishape = data.shape_;
+  const SliceLikeParam& param     = nnvm::get<SliceLikeParam>(attrs.parsed);
+  mshadow::Stream<xpu>* s         = ctx.get_stream<xpu>();
+  const TBlob& data               = inputs[0];
+  const TBlob& out                = outputs[0];
+  const mxnet::TShape& ishape     = data.shape_;
   const mxnet::TShape& from_shape = inputs[1].shape_;
   mxnet::Tuple<dmlc::optional<index_t>> param_begin;
   mxnet::Tuple<dmlc::optional<index_t>> param_end;
@@ -1660,21 +1693,25 @@ void SliceLikeForward(const nnvm::NodeAttrs& attrs,
   MXNET_NDIM_SWITCH(data.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
     GetIndexRange(data.shape_, param_begin, param_end, param_step, &begin, &end, &step);
-    MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        int num_threads = out.shape_.FlatTo2D()[0];
-        if (std::is_same<xpu, gpu>::value) {
-          num_threads *= out.shape_.get<ndim>()[ndim - 1];
-        }
-        mxnet_op::Kernel<slice_forward<ndim, Req, xpu>, xpu>::Launch(s,
-            num_threads, out.dptr<DType>(), data.dptr<DType>(),
-            data.shape_.get<ndim>(), out.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(out.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                          int num_threads = out.shape_.FlatTo2D()[0];
+                          if (std::is_same<xpu, gpu>::value) {
+                            num_threads *= out.shape_.get<ndim>()[ndim - 1];
+                          }
+                          mxnet_op::Kernel<slice_forward<ndim, Req, xpu>, xpu>::Launch(
+                              s,
+                              num_threads,
+                              out.dptr<DType>(),
+                              data.dptr<DType>(),
+                              data.shape_.get<ndim>(),
+                              out.shape_.get<ndim>(),
+                              begin,
+                              step);
+                        })})
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void SliceLikeBackward(const nnvm::NodeAttrs& attrs,
                        const OpContext& ctx,
                        const std::vector<TBlob>& inputs,
@@ -1688,9 +1725,10 @@ void SliceLikeBackward(const nnvm::NodeAttrs& attrs,
   if (req[1] != kNullOp && req[1] != kAddTo) {
     Fill(s, outputs[1], req[1], 0);  // Second input not relavant to gradients.
   }
-  if (req[0] == kNullOp) return;
-  const TBlob& ograd = inputs[0];
-  const TBlob& igrad = outputs[0];
+  if (req[0] == kNullOp)
+    return;
+  const TBlob& ograd          = inputs[0];
+  const TBlob& igrad          = outputs[0];
   const SliceLikeParam& param = nnvm::get<SliceLikeParam>(attrs.parsed);
   if (req[0] == kWriteTo) {
     Fill(s, igrad, req[0], 0);
@@ -1698,7 +1736,7 @@ void SliceLikeBackward(const nnvm::NodeAttrs& attrs,
     LOG(FATAL) << "_slice_like_backward does not support kWriteInplace";
   }
 
-  const mxnet::TShape& ishape = ograd.shape_;
+  const mxnet::TShape& ishape     = ograd.shape_;
   const mxnet::TShape& from_shape = outputs[1].shape_;
   mxnet::Tuple<dmlc::optional<index_t>> param_begin;
   mxnet::Tuple<dmlc::optional<index_t>> param_end;
@@ -1708,27 +1746,29 @@ void SliceLikeBackward(const nnvm::NodeAttrs& attrs,
   MXNET_NDIM_SWITCH(ograd.ndim(), ndim, {
     common::StaticArray<index_t, ndim> begin, end, step;
     GetIndexRange(ograd.shape_, param_begin, param_end, param_step, &begin, &end, &step);
-    MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
-        int num_threads = ograd.shape_.FlatTo2D()[0];
-        if (std::is_same<xpu, gpu>::value) {
-          num_threads *= ograd.shape_.get<ndim>()[ndim - 1];
-        }
-        mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(s, num_threads,
-            igrad.dptr<DType>(), ograd.dptr<DType>(),
-            igrad.shape_.get<ndim>(), ograd.shape_.get<ndim>(), begin, step);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(ograd.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req[0], Req, {
+                          int num_threads = ograd.shape_.FlatTo2D()[0];
+                          if (std::is_same<xpu, gpu>::value) {
+                            num_threads *= ograd.shape_.get<ndim>()[ndim - 1];
+                          }
+                          mxnet_op::Kernel<slice_assign<ndim, Req, xpu>, xpu>::Launch(
+                              s,
+                              num_threads,
+                              igrad.dptr<DType>(),
+                              ograd.dptr<DType>(),
+                              igrad.shape_.get<ndim>(),
+                              ograd.shape_.get<ndim>(),
+                              begin,
+                              step);
+                        })})
   })
 }
 
 struct ClipParam : public dmlc::Parameter<ClipParam> {
   real_t a_min, a_max;
   DMLC_DECLARE_PARAMETER(ClipParam) {
-    DMLC_DECLARE_FIELD(a_min)
-    .describe("Minimum value");
-    DMLC_DECLARE_FIELD(a_max)
-    .describe("Maximum value");
+    DMLC_DECLARE_FIELD(a_min).describe("Minimum value");
+    DMLC_DECLARE_FIELD(a_max).describe("Maximum value");
   }
 
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
@@ -1740,11 +1780,13 @@ struct ClipParam : public dmlc::Parameter<ClipParam> {
   }
 };
 
-
 struct clip {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* datas,
-                                  const float a_min, const float a_max) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* datas,
+                                  const float a_min,
+                                  const float a_max) {
     DType data = datas[i];
     if (data > a_max) {
       out[i] = a_max;
@@ -1756,11 +1798,14 @@ struct clip {
   }
 };
 
-
 struct clip_grad {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out, const DType* grad, const DType* datas,
-                                  const float a_min, const float a_max) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out,
+                                  const DType* grad,
+                                  const DType* datas,
+                                  const float a_min,
+                                  const float a_max) {
     DType data = datas[i];
     if (data > a_max) {
       out[i] = 0;
@@ -1772,8 +1817,7 @@ struct clip_grad {
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void Clip(const nnvm::NodeAttrs& attrs,
           const OpContext& ctx,
           const std::vector<TBlob>& inputs,
@@ -1782,16 +1826,19 @@ void Clip(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   const ClipParam& param = nnvm::get<ClipParam>(attrs.parsed);
   CHECK_EQ(inputs[0].type_flag_, outputs[0].type_flag_);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    mxnet_op::Kernel<mxnet::op::clip, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
+    mxnet_op::Kernel<mxnet::op::clip, xpu>::Launch(s,
+                                                   outputs[0].Size(),
+                                                   outputs[0].dptr<DType>(),
                                                    inputs[0].dptr<DType>(),
-                                                   param.a_min, param.a_max);
+                                                   param.a_min,
+                                                   param.a_max);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void ClipEx(const nnvm::NodeAttrs& attrs,
             const OpContext& ctx,
             const std::vector<NDArray>& inputs,
@@ -1803,7 +1850,7 @@ void ClipEx(const nnvm::NodeAttrs& attrs,
   UnaryOp::MapToFCompute<xpu>(attrs, ctx, inputs, req, outputs, Clip<xpu>);
 }
 
-template<typename xpu>
+template <typename xpu>
 void ClipGrad_(const nnvm::NodeAttrs& attrs,
                const OpContext& ctx,
                const std::vector<TBlob>& inputs,
@@ -1813,10 +1860,15 @@ void ClipGrad_(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   const ClipParam& param = nnvm::get<ClipParam>(attrs.parsed);
   CHECK_EQ(inputs[0].type_flag_, outputs[0].type_flag_);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Kernel<clip_grad, xpu>::Launch(s, outputs[0].Size(), outputs[0].dptr<DType>(),
-    inputs[0].dptr<DType>(), inputs[1].dptr<DType>(), param.a_min, param.a_max);
+    Kernel<clip_grad, xpu>::Launch(s,
+                                   outputs[0].Size(),
+                                   outputs[0].dptr<DType>(),
+                                   inputs[0].dptr<DType>(),
+                                   inputs[1].dptr<DType>(),
+                                   param.a_min,
+                                   param.a_max);
   });
 }
 
@@ -1830,21 +1882,21 @@ struct RepeatParam : public dmlc::Parameter<RepeatParam> {
   int repeats = 1;
   dmlc::optional<int> axis;
   DMLC_DECLARE_PARAMETER(RepeatParam) {
-    DMLC_DECLARE_FIELD(repeats)
-      .describe("The number of repetitions for each element.");
+    DMLC_DECLARE_FIELD(repeats).describe("The number of repetitions for each element.");
     DMLC_DECLARE_FIELD(axis)
-      .set_default(dmlc::optional<int>())
-      .describe("The axis along which to repeat values."
-                " The negative numbers are interpreted counting from the backward."
-                " By default, use the flattened input array,"
-                " and return a flat output array.");
+        .set_default(dmlc::optional<int>())
+        .describe(
+            "The axis along which to repeat values."
+            " The negative numbers are interpreted counting from the backward."
+            " By default, use the flattened input array,"
+            " and return a flat output array.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream repeats_s, axis_s;
     repeats_s << repeats;
     axis_s << axis;
     (*dict)["repeats"] = repeats_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]    = axis_s.str();
   }
 };
 
@@ -1852,14 +1904,16 @@ struct RepeatParam : public dmlc::Parameter<RepeatParam> {
  * \brief Helper function for getting user input params for the operator repeat.
  * Sanity check the user input values.
  */
-inline void GetRepeatParams(const RepeatParam& param, const mxnet::TShape& ishape,
-                            int* repeats, dmlc::optional<int>* axisOpt) {
+inline void GetRepeatParams(const RepeatParam& param,
+                            const mxnet::TShape& ishape,
+                            int* repeats,
+                            dmlc::optional<int>* axisOpt) {
   *repeats = param.repeats;
   CHECK_GE(*repeats, 0) << "repeats cannot be a negative number";
   *axisOpt = param.axis;
   if (static_cast<bool>(*axisOpt)) {
     int ndims = ishape.ndim();
-    int axis = axisOpt->value();
+    int axis  = axisOpt->value();
     if (axis < 0) {
       axis += ndims;
     }
@@ -1868,8 +1922,8 @@ inline void GetRepeatParams(const RepeatParam& param, const mxnet::TShape& ishap
 }
 
 inline bool RepeatOpShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   const RepeatParam& param = nnvm::get<RepeatParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
@@ -1889,7 +1943,7 @@ inline bool RepeatOpShape(const nnvm::NodeAttrs& attrs,
   // If repeats > 0, multiply the size of the corresponding axis by repeats
   if (static_cast<bool>(axisOpt)) {
     int ndims = ishape.ndim();
-    int axis = axisOpt.value();
+    int axis  = axisOpt.value();
     if (axis < 0) {
       axis += ndims;
     }
@@ -1929,19 +1983,19 @@ inline bool RepeatOpType(const nnvm::NodeAttrs& attrs,
  * input shape, second is the reshaped output shape.
  */
 inline std::pair<mxnet::TShape, mxnet::TShape> ReshapeInputOutputForRepeatOp(
-  const mxnet::TShape& ishape,
-  const dmlc::optional<int>& axisOpt,
-  const int repeats) {
+    const mxnet::TShape& ishape,
+    const dmlc::optional<int>& axisOpt,
+    const int repeats) {
   if (static_cast<bool>(axisOpt)) {
     int axis = axisOpt.value();
     int ndim = ishape.ndim();
-    if (axis < 0)  {
+    if (axis < 0) {
       axis += ndim;
     }
     CHECK(axis >= 0 && axis < ishape.ndim()) << "Invalid input of axis";
 
     // reshape the input tensor by adding a dim at the (axis+1)-th dim
-    mxnet::TShape rshape(ishape.ndim()+1, 1);
+    mxnet::TShape rshape(ishape.ndim() + 1, 1);
     // the shape we want to broadcast to
     mxnet::TShape bshape(rshape.ndim(), 1);
     int i = 0;
@@ -1952,8 +2006,8 @@ inline std::pair<mxnet::TShape, mxnet::TShape> ReshapeInputOutputForRepeatOp(
     rshape[i] = 1;
     bshape[i] = repeats;
     while (i < ishape.ndim()) {
-      rshape[i+1] = ishape[i];
-      bshape[i+1] = ishape[i];
+      rshape[i + 1] = ishape[i];
+      bshape[i + 1] = ishape[i];
       ++i;
     }
     return std::make_pair(rshape, bshape);
@@ -1973,33 +2027,41 @@ inline std::pair<mxnet::TShape, mxnet::TShape> ReshapeInputOutputForRepeatOp(
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void RepeatOpForward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
                      const std::vector<OpReqType>& req,
                      const std::vector<TBlob>& outputs) {
-  const TBlob& iTBlob = inputs[0];
+  const TBlob& iTBlob         = inputs[0];
   const mxnet::TShape& ishape = iTBlob.shape_;
-  if (!shape_is_known(ishape)) return;
+  if (!shape_is_known(ishape))
+    return;
 
   int repeats = 0;
   dmlc::optional<int> axisOpt;
   const RepeatParam& param = nnvm::get<RepeatParam>(attrs.parsed);
   GetRepeatParams(param, ishape, &repeats, &axisOpt);
-  if (0 == repeats) return;
+  if (0 == repeats)
+    return;
 
-  std::pair<mxnet::TShape, mxnet::TShape> rshapes = \
-    ReshapeInputOutputForRepeatOp(ishape, axisOpt, repeats);
+  std::pair<mxnet::TShape, mxnet::TShape> rshapes =
+      ReshapeInputOutputForRepeatOp(ishape, axisOpt, repeats);
 
   // reshaped input tblob
-  TBlob iblob(inputs[0].dptr_, rshapes.first, inputs[0].dev_mask(),
-    inputs[0].type_flag_, inputs[0].dev_id());
+  TBlob iblob(inputs[0].dptr_,
+              rshapes.first,
+              inputs[0].dev_mask(),
+              inputs[0].type_flag_,
+              inputs[0].dev_id());
   std::vector<TBlob> newInputs = {iblob};
 
   // reshaped output tblob
-  TBlob oblob(outputs[0].dptr_, rshapes.second, outputs[0].dev_mask(),
-    outputs[0].type_flag_, outputs[0].dev_id());
+  TBlob oblob(outputs[0].dptr_,
+              rshapes.second,
+              outputs[0].dev_mask(),
+              outputs[0].type_flag_,
+              outputs[0].dev_id());
   std::vector<TBlob> newOutputs = {oblob};
 
   BroadcastCompute<xpu>(attrs, ctx, newInputs, req, newOutputs);
@@ -2015,7 +2077,7 @@ void RepeatOpForward(const nnvm::NodeAttrs& attrs,
  * \param outputs the gradient of the loss function
  * with respect to the inputs of the operator
  */
-template<typename xpu>
+template <typename xpu>
 void RepeatOpBackward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -2025,45 +2087,53 @@ void RepeatOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(outputs.size(), 1U);
 
   const mxnet::TShape& oshape = outputs[0].shape_;
-  if (!shape_is_known(oshape)) return;
+  if (!shape_is_known(oshape))
+    return;
 
   int repeats = 0;
   dmlc::optional<int> axisOpt;
   const RepeatParam& param = nnvm::get<RepeatParam>(attrs.parsed);
   GetRepeatParams(param, oshape, &repeats, &axisOpt);
-  if (0 == repeats) return;
+  if (0 == repeats)
+    return;
 
   std::pair<mxnet::TShape, mxnet::TShape> rshapes =
-    ReshapeInputOutputForRepeatOp(oshape, axisOpt, repeats);
+      ReshapeInputOutputForRepeatOp(oshape, axisOpt, repeats);
 
   // reshaped output grad tblob
-  TBlob oblob(outputs[0].dptr_, rshapes.first, outputs[0].dev_mask(),
-    outputs[0].type_flag_, outputs[0].dev_id());
+  TBlob oblob(outputs[0].dptr_,
+              rshapes.first,
+              outputs[0].dev_mask(),
+              outputs[0].type_flag_,
+              outputs[0].dev_id());
   std::vector<TBlob> newOutputs = {oblob};
 
   // reshaped input grad tblob
-  TBlob iblob(inputs[0].dptr_, rshapes.second, inputs[0].dev_mask(),
-    inputs[0].type_flag_, inputs[0].dev_id());
+  TBlob iblob(inputs[0].dptr_,
+              rshapes.second,
+              inputs[0].dev_mask(),
+              inputs[0].type_flag_,
+              inputs[0].dev_id());
   std::vector<TBlob> newInputs = {iblob};
 
 #if !defined(__CUDACC__)
   ReduceAxesComputeImpl<xpu, mshadow::red::sum, false, false>(
       ctx, newInputs, req, newOutputs, rshapes.first);
 #else
-  ReduceAxesRTCComputeImpl(ctx, newInputs, req, newOutputs, rshapes.first,
-                           "red::sum{}", nullptr, false);
+  ReduceAxesRTCComputeImpl(
+      ctx, newInputs, req, newOutputs, rshapes.first, "red::sum{}", nullptr, false);
 #endif
 }
 
 struct TileParam : public dmlc::Parameter<TileParam> {
   mxnet::Tuple<int> reps;
   DMLC_DECLARE_PARAMETER(TileParam) {
-    DMLC_DECLARE_FIELD(reps)
-      .describe("The number of times for repeating the tensor a. Each dim size of reps"
-                " must be a positive integer."
-                " If reps has length d, the result will have dimension of max(d, a.ndim);"
-                " If a.ndim < d, a is promoted to be d-dimensional by prepending new axes."
-                " If a.ndim > d, reps is promoted to a.ndim by pre-pending 1's to it.");
+    DMLC_DECLARE_FIELD(reps).describe(
+        "The number of times for repeating the tensor a. Each dim size of reps"
+        " must be a positive integer."
+        " If reps has length d, the result will have dimension of max(d, a.ndim);"
+        " If a.ndim < d, a is promoted to be d-dimensional by prepending new axes."
+        " If a.ndim > d, reps is promoted to a.ndim by pre-pending 1's to it.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream reps_s;
@@ -2073,11 +2143,11 @@ struct TileParam : public dmlc::Parameter<TileParam> {
 };
 
 inline bool TileOpShape(const nnvm::NodeAttrs& attrs,
-                        mxnet::ShapeVector *in_attrs,
-                        mxnet::ShapeVector *out_attrs) {
+                        mxnet::ShapeVector* in_attrs,
+                        mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  const TileParam& param = nnvm::get<TileParam>(attrs.parsed);
+  const TileParam& param      = nnvm::get<TileParam>(attrs.parsed);
   const mxnet::TShape& ishape = (*in_attrs)[0];
   if (!shape_is_known(ishape)) {
     return false;
@@ -2129,8 +2199,8 @@ inline bool TileOpType(const nnvm::NodeAttrs& attrs,
  * input shape, second is the reshaped output shape.
  */
 inline std::pair<mxnet::TShape, mxnet::TShape> ReshapeInputOutputForTileOp(
-  const mxnet::TShape& ishape,
-  const mxnet::Tuple<int>& reps) {
+    const mxnet::TShape& ishape,
+    const mxnet::Tuple<int>& reps) {
   if (reps.ndim() == 0) {
     return std::make_pair(ishape, ishape);
   }
@@ -2145,10 +2215,10 @@ inline std::pair<mxnet::TShape, mxnet::TShape> ReshapeInputOutputForTileOp(
   int i2 = reps.ndim() - 1;
   for (int i = bshape.ndim() - 1; i >= 0; --i) {
     if (0 == (i & 1)) {
-      bshape[i] = (i2 >= 0? reps[i2--] : 1);
+      bshape[i] = (i2 >= 0 ? reps[i2--] : 1);
       rshape[i] = 1;
     } else {
-      rshape[i] = bshape[i] = (i1 >= 0? ishape[i1--] : 1);
+      rshape[i] = bshape[i] = (i1 >= 0 ? ishape[i1--] : 1);
     }
   }
 
@@ -2172,7 +2242,7 @@ inline std::pair<mxnet::TShape, mxnet::TShape> ReshapeInputOutputForTileOp(
  * the new tensor to shape (2, 2, 8, 3, 9, 4, 3, 5). The final
  * output tensor would have shape (2*2, 8*3, 9*4, 3*5).
  */
-template<typename xpu>
+template <typename xpu>
 void TileOpForward(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -2181,24 +2251,32 @@ void TileOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
 
-  if (inputs[0].Size() == 0) return;
-  const mxnet::TShape& ishape = inputs[0].shape_;
+  if (inputs[0].Size() == 0)
+    return;
+  const mxnet::TShape& ishape   = inputs[0].shape_;
   const mxnet::Tuple<int>& reps = nnvm::get<TileParam>(attrs.parsed).reps;
 
   // If any one of the number in reps is zero, return immediately
   for (int i = 0; i < reps.ndim(); ++i) {
-    if (0 == reps[i]) return;
+    if (0 == reps[i])
+      return;
   }
 
   std::pair<mxnet::TShape, mxnet::TShape> rshapes = ReshapeInputOutputForTileOp(ishape, reps);
 
   // reshaped input tblob
-  TBlob iblob(inputs[0].dptr_, rshapes.first, inputs[0].dev_mask(),
-    inputs[0].type_flag_, inputs[0].dev_id());
+  TBlob iblob(inputs[0].dptr_,
+              rshapes.first,
+              inputs[0].dev_mask(),
+              inputs[0].type_flag_,
+              inputs[0].dev_id());
   std::vector<TBlob> newInputs = {iblob};
   // reshaped output tblob
-  TBlob oblob(outputs[0].dptr_, rshapes.second, outputs[0].dev_mask(),
-    outputs[0].type_flag_, outputs[0].dev_id());
+  TBlob oblob(outputs[0].dptr_,
+              rshapes.second,
+              outputs[0].dev_mask(),
+              outputs[0].type_flag_,
+              outputs[0].dev_id());
   std::vector<TBlob> newOutputs = {oblob};
 
   BroadcastCompute<xpu>(attrs, ctx, newInputs, req, newOutputs);
@@ -2214,7 +2292,7 @@ void TileOpForward(const nnvm::NodeAttrs& attrs,
  * \param outputs the gradient of the loss function
  * with respect to the inputs of the operator
  */
-template<typename xpu>
+template <typename xpu>
 void TileOpBackward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -2223,89 +2301,100 @@ void TileOpBackward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
 
-  if (inputs[0].Size() == 0) return;
-  const mxnet::TShape& oshape = outputs[0].shape_;
+  if (inputs[0].Size() == 0)
+    return;
+  const mxnet::TShape& oshape   = outputs[0].shape_;
   const mxnet::Tuple<int>& reps = nnvm::get<TileParam>(attrs.parsed).reps;
 
   // If any one of the number in reps is zero, return immediately
   for (int i = 0; i < reps.ndim(); ++i) {
-    if (0 == reps[i]) return;
+    if (0 == reps[i])
+      return;
   }
 
   std::pair<mxnet::TShape, mxnet::TShape> rshapes = ReshapeInputOutputForTileOp(oshape, reps);
 
   // reshaped output grad tblob
-  TBlob oblob(outputs[0].dptr_, rshapes.first, outputs[0].dev_mask(),
-    outputs[0].type_flag_, outputs[0].dev_id());
+  TBlob oblob(outputs[0].dptr_,
+              rshapes.first,
+              outputs[0].dev_mask(),
+              outputs[0].type_flag_,
+              outputs[0].dev_id());
   std::vector<TBlob> newOutputs = {oblob};
   // reshaped input grad tblob
-  TBlob iblob(inputs[0].dptr_, rshapes.second, inputs[0].dev_mask(),
-    inputs[0].type_flag_, inputs[0].dev_id());
+  TBlob iblob(inputs[0].dptr_,
+              rshapes.second,
+              inputs[0].dev_mask(),
+              inputs[0].type_flag_,
+              inputs[0].dev_id());
   std::vector<TBlob> newInputs = {iblob};
 
 #if !defined(__CUDACC__)
   ReduceAxesComputeImpl<xpu, mshadow::red::sum, false, false>(
       ctx, newInputs, req, newOutputs, rshapes.first);
 #else
-  ReduceAxesRTCComputeImpl(ctx, newInputs, req, newOutputs, rshapes.first,
-                           "red::sum{}", nullptr, false);
+  ReduceAxesRTCComputeImpl(
+      ctx, newInputs, req, newOutputs, rshapes.first, "red::sum{}", nullptr, false);
 #endif
 }
 
 struct ReverseParam : public dmlc::Parameter<ReverseParam> {
   mxnet::Tuple<int> axis;
   DMLC_DECLARE_PARAMETER(ReverseParam) {
-    DMLC_DECLARE_FIELD(axis)
-    .describe("The axis which to reverse elements.");
+    DMLC_DECLARE_FIELD(axis).describe("The axis which to reverse elements.");
   }
 };
 
-
 #define REVERSE_MAX_DIM 10U
 
 struct reverse {
   MSHADOW_XINLINE static index_t ReverseIndex(index_t idx,
                                               index_t nreversedim,
-                                              const index_t * stride_,
-                                              const index_t * trailing_) {
+                                              const index_t* stride_,
+                                              const index_t* trailing_) {
     index_t outputIndex = idx;
     for (index_t i = 0; i < nreversedim; ++i) {
       const index_t low = outputIndex % trailing_[i];
-      index_t high = outputIndex / trailing_[i];
-      const index_t x = high%stride_[i];
+      index_t high      = outputIndex / trailing_[i];
+      const index_t x   = high % stride_[i];
       high /= stride_[i];
-      outputIndex = (high*stride_[i] + stride_[i] - 1 - x)*trailing_[i] + low;
+      outputIndex = (high * stride_[i] + stride_[i] - 1 - x) * trailing_[i] + low;
     }
     return outputIndex;
   }
 #ifdef __CUDACC__
-  template<typename DType>
-  __device__  static void Map(index_t index, index_t nreversedim, const DType *src, DType *dst,
-                              const index_t * stride_,
-                              const index_t * trailing_) {
+  template <typename DType>
+  __device__ static void Map(index_t index,
+                             index_t nreversedim,
+                             const DType* src,
+                             DType* dst,
+                             const index_t* stride_,
+                             const index_t* trailing_) {
     __shared__ index_t stride_share[REVERSE_MAX_DIM];
     __shared__ index_t trailing_share[REVERSE_MAX_DIM];
     if (threadIdx.x < REVERSE_MAX_DIM) {
-      stride_share[threadIdx.x] = stride_[threadIdx.x];
+      stride_share[threadIdx.x]   = stride_[threadIdx.x];
       trailing_share[threadIdx.x] = trailing_[threadIdx.x];
     }
     __syncthreads();
     index_t new_idx = ReverseIndex(index, nreversedim, stride_share, trailing_share);
-    dst[new_idx] = src[index];
+    dst[new_idx]    = src[index];
   }
 #else
-  template<typename DType>
-  MSHADOW_XINLINE  static void Map(index_t index, index_t nreversedim, const DType *src, DType *dst,
-                                   const index_t * stride_,
-                                   const index_t * trailing_) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t index,
+                                  index_t nreversedim,
+                                  const DType* src,
+                                  DType* dst,
+                                  const index_t* stride_,
+                                  const index_t* trailing_) {
     index_t new_idx = ReverseIndex(index, nreversedim, stride_, trailing_);
-    dst[new_idx] = src[index];
+    dst[new_idx]    = src[index];
   }
 #endif
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void ReverseOpForward(const nnvm::NodeAttrs& attrs,
                       const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
@@ -2316,16 +2405,16 @@ void ReverseOpForward(const nnvm::NodeAttrs& attrs,
   const ReverseParam& param = nnvm::get<ReverseParam>(attrs.parsed);
   CHECK_EQ(inputs[0].type_flag_, outputs[0].type_flag_);
   CHECK_LT(param.axis.ndim(), REVERSE_MAX_DIM);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
 
   const mxnet::TShape& ishape = inputs[0].shape_;
 
   std::vector<index_t> stride_(param.axis.ndim());
-  std::vector<index_t>  trailing_(param.axis.ndim());
+  std::vector<index_t> trailing_(param.axis.ndim());
   index_t reverse_index = 0;
   for (int axis : param.axis) {
     CHECK_LT(axis, ishape.ndim());
-    stride_[reverse_index] = ishape[axis];
+    stride_[reverse_index]   = ishape[axis];
     trailing_[reverse_index] = 1;
     for (int i2 = axis + 1; i2 < ishape.ndim(); ++i2) {
       trailing_[reverse_index] *= ishape[i2];
@@ -2334,68 +2423,76 @@ void ReverseOpForward(const nnvm::NodeAttrs& attrs,
   }
 
 #ifdef __CUDACC__
-  mshadow::Tensor<xpu, 1, uint8_t> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, uint8_t>(
+  mshadow::Tensor<xpu, 1, uint8_t> workspace = ctx.requested[0].get_space_typed<xpu, 1, uint8_t>(
       mshadow::Shape1(reverse_index * sizeof(index_t) * 2), s);
 
-  auto stride_workspace = workspace.dptr_;
+  auto stride_workspace   = workspace.dptr_;
   auto trailing_workspace = workspace.dptr_ + reverse_index * sizeof(index_t);
 
-  cudaMemcpyAsync(stride_workspace, thrust::raw_pointer_cast(stride_.data()),
+  cudaMemcpyAsync(stride_workspace,
+                  thrust::raw_pointer_cast(stride_.data()),
                   stride_.size() * sizeof(index_t),
-                  cudaMemcpyHostToDevice, mshadow::Stream<gpu>::GetStream(s));
-  cudaMemcpyAsync(trailing_workspace, thrust::raw_pointer_cast(trailing_.data()),
+                  cudaMemcpyHostToDevice,
+                  mshadow::Stream<gpu>::GetStream(s));
+  cudaMemcpyAsync(trailing_workspace,
+                  thrust::raw_pointer_cast(trailing_.data()),
                   trailing_.size() * sizeof(index_t),
-                  cudaMemcpyHostToDevice, mshadow::Stream<gpu>::GetStream(s));
+                  cudaMemcpyHostToDevice,
+                  mshadow::Stream<gpu>::GetStream(s));
 
 #endif
 
 #ifdef __CUDACC__
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Kernel<reverse, xpu>::Launch(s, inputs[0].Size(), reverse_index,
-    inputs[0].dptr<DType>(), outputs[0].dptr<DType>(),
-    reinterpret_cast<index_t*>(stride_workspace), reinterpret_cast<index_t*>(trailing_workspace));
+    Kernel<reverse, xpu>::Launch(s,
+                                 inputs[0].Size(),
+                                 reverse_index,
+                                 inputs[0].dptr<DType>(),
+                                 outputs[0].dptr<DType>(),
+                                 reinterpret_cast<index_t*>(stride_workspace),
+                                 reinterpret_cast<index_t*>(trailing_workspace));
   });
 #else
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, DType, {
-    Kernel<reverse, xpu>::Launch(s, inputs[0].Size(), reverse_index,
-    inputs[0].dptr<DType>(), outputs[0].dptr<DType>(),
-    stride_.data(), trailing_.data());
+    Kernel<reverse, xpu>::Launch(s,
+                                 inputs[0].Size(),
+                                 reverse_index,
+                                 inputs[0].dptr<DType>(),
+                                 outputs[0].dptr<DType>(),
+                                 stride_.data(),
+                                 trailing_.data());
   });
 #endif
 }
 
-
 struct StackParam : public dmlc::Parameter<StackParam> {
   int axis;
   int num_args;
   DMLC_DECLARE_PARAMETER(StackParam) {
-    DMLC_DECLARE_FIELD(axis)
-    .set_default(0)
-    .describe("The axis in the result array along which the input arrays are stacked.");
-    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1)
-    .describe("Number of inputs to be stacked.");
+    DMLC_DECLARE_FIELD(axis).set_default(0).describe(
+        "The axis in the result array along which the input arrays are stacked.");
+    DMLC_DECLARE_FIELD(num_args).set_lower_bound(1).describe("Number of inputs to be stacked.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, num_args_s;
     axis_s << axis;
     num_args_s << num_args;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]     = axis_s.str();
     (*dict)["num_args"] = num_args_s.str();
   }
 };
 
-
 inline bool StackOpShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
 
   mxnet::TShape dshape;
   for (const mxnet::TShape& i : (*in_attrs)) {
     shape_assign(&dshape, i);
   }
-  if (!shape_is_known(dshape)) return false;
+  if (!shape_is_known(dshape))
+    return false;
 
   mxnet::TShape oshape(dshape.ndim() + 1, -1);
   int axis = CheckAxis(param.axis, oshape.ndim());
@@ -2404,15 +2501,14 @@ inline bool StackOpShape(const nnvm::NodeAttrs& attrs,
   }
   oshape[axis] = param.num_args;
   for (index_t i = axis + 1; i < oshape.ndim(); ++i) {
-    oshape[i] = dshape[i-1];
+    oshape[i] = dshape[i - 1];
   }
   SHAPE_ASSIGN_CHECK(*out_attrs, 0, oshape);
 
   return shape_is_known(oshape);
 }
 
-
-template<typename xpu>
+template <typename xpu>
 void StackOpForward(const nnvm::NodeAttrs& attrs,
                     const OpContext& ctx,
                     const std::vector<TBlob>& inputs,
@@ -2421,11 +2517,11 @@ void StackOpForward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, outputs[0].ndim());
+  int axis                = CheckAxis(param.axis, outputs[0].ndim());
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(outputs[0].type_flag_, DType, {
-    std::vector<Tensor<xpu, 3, DType> > data(inputs.size());
+    std::vector<Tensor<xpu, 3, DType>> data(inputs.size());
     Tensor<xpu, 3, DType> out;
     size_t leading = 1, trailing = 1;
     for (int i = 0; i < axis; ++i) {
@@ -2434,19 +2530,19 @@ void StackOpForward(const nnvm::NodeAttrs& attrs,
     for (int i = axis + 1; i < outputs[0].ndim(); ++i) {
       trailing *= outputs[0].shape_[i];
     }
-    size_t mid = outputs[0].shape_[axis];
+    size_t mid      = outputs[0].shape_[axis];
     Shape<3> oshape = Shape3(leading, mid, trailing);
-    out = outputs[0].get_with_shape<xpu, 3, DType>(oshape, s);
+    out             = outputs[0].get_with_shape<xpu, 3, DType>(oshape, s);
 
     for (size_t i = 0; i < inputs.size(); ++i) {
       Shape<3> dshape = Shape3(leading, 1, trailing);
-      data[i] = inputs[i].get_with_shape<xpu, 3, DType>(dshape, s);
+      data[i]         = inputs[i].get_with_shape<xpu, 3, DType>(dshape, s);
     }
     Concatenate(data, &out, 1, req[0]);
   })
 }
 
-template<typename xpu>
+template <typename xpu>
 void StackOpBackward(const nnvm::NodeAttrs& attrs,
                      const OpContext& ctx,
                      const std::vector<TBlob>& inputs,
@@ -2455,11 +2551,11 @@ void StackOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mshadow;
   using namespace mshadow::expr;
   const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
-  int axis = CheckAxis(param.axis, inputs[0].ndim());
+  int axis                = CheckAxis(param.axis, inputs[0].ndim());
 
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   MSHADOW_TYPE_SWITCH_WITH_BOOL(inputs[0].type_flag_, DType, {
-    std::vector<Tensor<xpu, 3, DType> > grad_in(outputs.size());
+    std::vector<Tensor<xpu, 3, DType>> grad_in(outputs.size());
     Tensor<xpu, 3, DType> grad;
     size_t leading = 1, trailing = 1;
     for (int i = 0; i < axis; ++i) {
@@ -2468,13 +2564,13 @@ void StackOpBackward(const nnvm::NodeAttrs& attrs,
     for (int i = axis + 1; i < inputs[0].ndim(); ++i) {
       trailing *= inputs[0].shape_[i];
     }
-    size_t mid = inputs[0].shape_[axis];
+    size_t mid      = inputs[0].shape_[axis];
     Shape<3> oshape = Shape3(leading, mid, trailing);
-    grad = inputs[0].get_with_shape<xpu, 3, DType>(oshape, s);
+    grad            = inputs[0].get_with_shape<xpu, 3, DType>(oshape, s);
 
     for (size_t i = 0; i < outputs.size(); ++i) {
       Shape<3> dshape = Shape3(leading, 1, trailing);
-      grad_in[i] = outputs[i].get_with_shape<xpu, 3, DType>(dshape, s);
+      grad_in[i]      = outputs[i].get_with_shape<xpu, 3, DType>(dshape, s);
     }
     Split(grad, &grad_in, 1, req);
   })
@@ -2484,9 +2580,10 @@ struct SqueezeParam : public dmlc::Parameter<SqueezeParam> {
   dmlc::optional<mxnet::Tuple<int>> axis;
   DMLC_DECLARE_PARAMETER(SqueezeParam) {
     DMLC_DECLARE_FIELD(axis)
-    .set_default(dmlc::optional<mxnet::Tuple<int>>())
-    .describe("Selects a subset of the single-dimensional entries in the shape."
-              " If an axis is selected with shape entry greater than one, an error is raised.");
+        .set_default(dmlc::optional<mxnet::Tuple<int>>())
+        .describe(
+            "Selects a subset of the single-dimensional entries in the shape."
+            " If an axis is selected with shape entry greater than one, an error is raised.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s;
@@ -2506,21 +2603,22 @@ inline size_t SqueezeShapeHelper(mxnet::TShape* shape) {
     if ((*shape)[i] == -1) {
       ++count;
     } else {
-      std::swap((*shape)[i], (*shape)[i-count]);
+      std::swap((*shape)[i], (*shape)[i - count]);
     }
   }
   return shape->ndim() - count;
 }
 
 inline bool SqueezeShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   const SqueezeParam& param = nnvm::get<SqueezeParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U) << "Input: [data]";
   CHECK_EQ(out_attrs->size(), 1U);
   const mxnet::TShape& dshape = in_attrs->at(0);
-  const int dndim = dshape.ndim();
-  if (!shape_is_known(dshape)) return false;
+  const int dndim             = dshape.ndim();
+  if (!shape_is_known(dshape))
+    return false;
   mxnet::TShape oshape = dshape;
   if (param.axis.has_value()) {
     // preprocess axis
@@ -2528,36 +2626,36 @@ inline bool SqueezeShape(const nnvm::NodeAttrs& attrs,
     for (int i = 0; i < axes.ndim(); ++i) {
       if (axes[i] < 0) {
         axes[i] += dndim;
-        CHECK_GE(axes[i], 0)
-          << "axis " << axes[i] - dndim << " is out of bounds for array of dimension " << dndim;
+        CHECK_GE(axes[i], 0) << "axis " << axes[i] - dndim
+                             << " is out of bounds for array of dimension " << dndim;
       }
-      CHECK_LT(axes[i], dndim)
-        << "axis " << axes[i] << " is out of bounds for array of dimension " << dndim;
+      CHECK_LT(axes[i], dndim) << "axis " << axes[i] << " is out of bounds for array of dimension "
+                               << dndim;
       CHECK_EQ(dshape[axes[i]], 1)
-        << "cannot select an axis to squeeze out which has size="
-        << dshape[axes[i]] << " not equal to one";
+          << "cannot select an axis to squeeze out which has size=" << dshape[axes[i]]
+          << " not equal to one";
       CHECK_NE(oshape[axes[i]], -1) << "duplicate value in axis";
       oshape[axes[i]] = -1;
     }
   } else {
     for (int i = 0; i < oshape.ndim(); ++i) {
-      if (oshape[i] == 1) oshape[i] = -1;
+      if (oshape[i] == 1)
+        oshape[i] = -1;
     }
   }
   size_t oshape_size = SqueezeShapeHelper(&oshape);
   if (oshape_size == 0) {  // corner case when dshape is (1, 1, 1, 1)
-    oshape[0] = 1;
+    oshape[0]   = 1;
     oshape_size = 1;
   }
-  SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(oshape.data(), oshape.data()+oshape_size));
+  SHAPE_ASSIGN_CHECK(*out_attrs, 0, mxnet::TShape(oshape.data(), oshape.data() + oshape_size));
   return true;
 }
 
 struct DepthToSpaceParam : public dmlc::Parameter<DepthToSpaceParam> {
   int block_size;
   DMLC_DECLARE_PARAMETER(DepthToSpaceParam) {
-    DMLC_DECLARE_FIELD(block_size)
-      .describe("Blocks of [block_size. block_size] are moved");
+    DMLC_DECLARE_FIELD(block_size).describe("Blocks of [block_size. block_size] are moved");
   }
 };
 
@@ -2579,18 +2677,15 @@ inline bool DepthToSpaceOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_NE(block, 0) << "block_size must be a positive integer value";
   CHECK_NE(in_shape[1], 0) << "Depth dimension:1 cannot be 0";
   CHECK_EQ(in_shape[1] % (block * block), 0)
-    << "Cannot perform Depth To Space operation on the specified tensor."
-       " Dimension:1(depth dimension) should be a multiple of 'block^2'";
-  CHECK_NE(in_shape[0], 0)
-    << "Operation requires a 4D tensor. Size of dimension:0 cannot be 0";
-  CHECK_NE(in_shape[2], 0)
-    << "Operation requires a 4D tensor. Size of dimension:2 cannot be 0";
-  CHECK_NE(in_shape[3], 0)
-    << "Operation requires a 4D tensor. Size of dimension:3 cannot be 0";
+      << "Cannot perform Depth To Space operation on the specified tensor."
+         " Dimension:1(depth dimension) should be a multiple of 'block^2'";
+  CHECK_NE(in_shape[0], 0) << "Operation requires a 4D tensor. Size of dimension:0 cannot be 0";
+  CHECK_NE(in_shape[2], 0) << "Operation requires a 4D tensor. Size of dimension:2 cannot be 0";
+  CHECK_NE(in_shape[3], 0) << "Operation requires a 4D tensor. Size of dimension:3 cannot be 0";
 
   expected_out[0] = in_shape[0];
   expected_out[1] = in_shape[1] / (block * block);
-  int i = 2;
+  int i           = 2;
   while (i < expected_out.ndim()) {
     expected_out[i] = in_shape[i] * block;
     ++i;
@@ -2620,8 +2715,11 @@ inline bool DepthToSpaceOpType(const nnvm::NodeAttrs& attrs,
  * \param inp_index         index within input tensor from where value is retrieved
  * \param offset_arr        array containing the linear offset of input tensor
  */
-MSHADOW_XINLINE void update_index(index_t index_position, index_t dim_size, index_t *idx,
-                                  index_t *inp_index, const index_t* offset_arr) {
+MSHADOW_XINLINE void update_index(index_t index_position,
+                                  index_t dim_size,
+                                  index_t* idx,
+                                  index_t* inp_index,
+                                  const index_t* offset_arr) {
   index_t next_idx_val = *idx / dim_size;
   *inp_index += (*idx - next_idx_val * dim_size) * offset_arr[index_position];
   *idx = next_idx_val;
@@ -2638,11 +2736,15 @@ MSHADOW_XINLINE void update_index(index_t index_position, index_t dim_size, inde
  * \param size        array containing the size of each dimension of input tensor
  * \param offset_arr  array containing the linear offset of input tensor
  */
-template<int req>
+template <int req>
 struct depth_to_space_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data,
-                                  const int block, const index_t* size, const index_t* offset_arr) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const int block,
+                                  const index_t* size,
+                                  const index_t* offset_arr) {
     index_t inp_index = 0, idx = i, dim_size;
     dim_size = block;
     update_index(2, dim_size, &idx, &inp_index, offset_arr);
@@ -2673,11 +2775,16 @@ struct depth_to_space_forward {
  * \param size2       size of Dim 2 of input tensor
  * \param size3       size of Dim 3 of input tensor
  */
-template<int req>
+template <int req>
 struct compute_offset_for_depth_to_space {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* offset_arr, DType* size, const int block,
-                                  const index_t size0, const index_t size1, const index_t size2,
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* offset_arr,
+                                  DType* size,
+                                  const int block,
+                                  const index_t size0,
+                                  const index_t size1,
+                                  const index_t size2,
                                   const index_t size3) {
     size[0] = size0;
     size[1] = size1;
@@ -2693,7 +2800,7 @@ struct compute_offset_for_depth_to_space {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void DepthToSpaceOpForward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -2702,28 +2809,38 @@ void DepthToSpaceOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  mshadow::Stream<xpu>* s        = ctx.get_stream<xpu>();
+  const TBlob& in_data           = inputs[0];
+  const TBlob& out_data          = outputs[0];
   const DepthToSpaceParam& param = nnvm::get<DepthToSpaceParam>(attrs.parsed);
   using namespace mxnet_op;
   int block = param.block_size;
 
   mshadow::Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(mshadow::Shape1(sizeof(index_t) * 10), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(mshadow::Shape1(sizeof(index_t) * 10), s);
   char* workspace_curr_ptr = workspace.dptr_;
-  index_t* offset_arr = reinterpret_cast<index_t*>(workspace_curr_ptr);
-  index_t* size = reinterpret_cast<index_t*>(workspace_curr_ptr + sizeof(index_t) * 6);
+  index_t* offset_arr      = reinterpret_cast<index_t*>(workspace_curr_ptr);
+  index_t* size            = reinterpret_cast<index_t*>(workspace_curr_ptr + sizeof(index_t) * 6);
 
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<compute_offset_for_depth_to_space<req_type>, xpu>::Launch(
-          s, 1, offset_arr, size, block, in_data.shape_[0], in_data.shape_[1],
-          in_data.shape_[2], in_data.shape_[3]);
-
-      Kernel<depth_to_space_forward<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-          block, size, offset_arr);
+      Kernel<compute_offset_for_depth_to_space<req_type>, xpu>::Launch(s,
+                                                                       1,
+                                                                       offset_arr,
+                                                                       size,
+                                                                       block,
+                                                                       in_data.shape_[0],
+                                                                       in_data.shape_[1],
+                                                                       in_data.shape_[2],
+                                                                       in_data.shape_[3]);
+
+      Kernel<depth_to_space_forward<req_type>, xpu>::Launch(s,
+                                                            out_data.Size(),
+                                                            out_data.dptr<DType>(),
+                                                            in_data.dptr<DType>(),
+                                                            block,
+                                                            size,
+                                                            offset_arr);
     });
   });
 }
@@ -2744,23 +2861,20 @@ inline bool SpaceToDepthOpShape(const nnvm::NodeAttrs& attrs,
   }
   int block = param.block_size;
   CHECK_NE(block, 0) << "block_size must be a positive integer value";
-  CHECK_NE(in_shape[0], 0)
-    << "Operation requires a 4D tensor. Size of dimension:0 cannot be 0";
+  CHECK_NE(in_shape[0], 0) << "Operation requires a 4D tensor. Size of dimension:0 cannot be 0";
   CHECK_NE(in_shape[1], 0) << "Depth dimension:1 cannot be 0";
-  CHECK_NE(in_shape[2], 0)
-    << "Operation requires a 4D tensor. Size of dimension:2 cannot be 0";
+  CHECK_NE(in_shape[2], 0) << "Operation requires a 4D tensor. Size of dimension:2 cannot be 0";
   CHECK_EQ(in_shape[2] % block, 0)
-    << "Cannot perform Depth To Space operation on the specified tensor."
-       " Dimension:2(1st Space dimension) should be a multiple of 'block' ";
-  CHECK_NE(in_shape[3], 0)
-    << "Operation requires a 4D tensor. Size of dimension:3 cannot be 0";
+      << "Cannot perform Depth To Space operation on the specified tensor."
+         " Dimension:2(1st Space dimension) should be a multiple of 'block' ";
+  CHECK_NE(in_shape[3], 0) << "Operation requires a 4D tensor. Size of dimension:3 cannot be 0";
   CHECK_EQ(in_shape[3] % block, 0)
-    << "Cannot perform Depth To Space operation on the specified tensor."
-       " Dimension:3(2nd space dimension) should be a multiple of 'block' ";
+      << "Cannot perform Depth To Space operation on the specified tensor."
+         " Dimension:3(2nd space dimension) should be a multiple of 'block' ";
 
   expected_out[0] = in_shape[0];
   expected_out[1] = in_shape[1] * block * block;
-  int i = 2;
+  int i           = 2;
   while (i < expected_out.ndim()) {
     expected_out[i] = in_shape[i] / block;
     ++i;
@@ -2792,11 +2906,15 @@ inline bool SpaceToDepthOpType(const nnvm::NodeAttrs& attrs,
  * \param size        array containing the size of each dimension of input tensor
  * \param offset_arr  array containing the linear offset of input tensor
  */
-template<int req>
+template <int req>
 struct space_to_depth_forward {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* out_data, const DType* in_data, const int block,
-                                  const index_t* size, const index_t* offset_arr) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const int block,
+                                  const index_t* size,
+                                  const index_t* offset_arr) {
     index_t inp_index = 0, idx = i, dim_size;
     dim_size = size[3] / block;
     update_index(4, dim_size, &idx, &inp_index, offset_arr);
@@ -2827,12 +2945,17 @@ struct space_to_depth_forward {
  * \param size2       size of Dim 2 of input tensor
  * \param size3       size of Dim 3 of input tensor
  */
-template<int req>
+template <int req>
 struct compute_offset_for_space_to_depth {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, DType* offset_arr, DType* size, const int block,
-                                  const index_t size0, const index_t size1,
-                                  const index_t size2, const index_t size3) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  DType* offset_arr,
+                                  DType* size,
+                                  const int block,
+                                  const index_t size0,
+                                  const index_t size1,
+                                  const index_t size2,
+                                  const index_t size3) {
     size[0] = size0;
     size[1] = size1;
     size[2] = size2;
@@ -2847,7 +2970,7 @@ struct compute_offset_for_space_to_depth {
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void SpaceToDepthOpForward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -2856,33 +2979,43 @@ void SpaceToDepthOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu> *s = ctx.get_stream<xpu>();
-  const TBlob& in_data = inputs[0];
-  const TBlob& out_data = outputs[0];
+  mshadow::Stream<xpu>* s        = ctx.get_stream<xpu>();
+  const TBlob& in_data           = inputs[0];
+  const TBlob& out_data          = outputs[0];
   const DepthToSpaceParam& param = nnvm::get<DepthToSpaceParam>(attrs.parsed);
   using namespace mxnet_op;
   int block = param.block_size;
 
   mshadow::Tensor<xpu, 1, char> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, char>(mshadow::Shape1(sizeof(index_t) * 10), s);
+      ctx.requested[0].get_space_typed<xpu, 1, char>(mshadow::Shape1(sizeof(index_t) * 10), s);
   char* workspace_curr_ptr = workspace.dptr_;
-  index_t* offset_arr = reinterpret_cast<index_t*>(workspace_curr_ptr);
-  index_t* size = reinterpret_cast<index_t*>(workspace_curr_ptr + sizeof(index_t) * 6);
+  index_t* offset_arr      = reinterpret_cast<index_t*>(workspace_curr_ptr);
+  index_t* size            = reinterpret_cast<index_t*>(workspace_curr_ptr + sizeof(index_t) * 6);
 
   MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
     MXNET_ASSIGN_REQ_SWITCH(req[0], req_type, {
-      Kernel<compute_offset_for_space_to_depth<req_type>, xpu>::Launch(
-          s, 1, offset_arr, size, block, in_data.shape_[0], in_data.shape_[1],
-          in_data.shape_[2], in_data.shape_[3]);
-      Kernel<space_to_depth_forward<req_type>, xpu>::Launch(
-          s, out_data.Size(), out_data.dptr<DType>(), in_data.dptr<DType>(),
-          block, size, offset_arr);
+      Kernel<compute_offset_for_space_to_depth<req_type>, xpu>::Launch(s,
+                                                                       1,
+                                                                       offset_arr,
+                                                                       size,
+                                                                       block,
+                                                                       in_data.shape_[0],
+                                                                       in_data.shape_[1],
+                                                                       in_data.shape_[2],
+                                                                       in_data.shape_[3]);
+      Kernel<space_to_depth_forward<req_type>, xpu>::Launch(s,
+                                                            out_data.Size(),
+                                                            out_data.dptr<DType>(),
+                                                            in_data.dptr<DType>(),
+                                                            block,
+                                                            size,
+                                                            offset_arr);
     });
   });
 }
 
 namespace split_enum {
-enum SplitOpInputs {kData};
+enum SplitOpInputs { kData };
 }  // namespace split_enum
 
 struct SplitParam : public dmlc::Parameter<SplitParam> {
@@ -2891,19 +3024,20 @@ struct SplitParam : public dmlc::Parameter<SplitParam> {
   bool squeeze_axis;
   int sections;
   DMLC_DECLARE_PARAMETER(SplitParam) {
-    DMLC_DECLARE_FIELD(indices)
-    .describe("Indices of splits. The elements should denote the boundaries of at which split"
-              " is performed along the `axis`.");
-    DMLC_DECLARE_FIELD(axis).set_default(1)
-    .describe("Axis along which to split.");
-    DMLC_DECLARE_FIELD(squeeze_axis).set_default(0)
-    .describe("If true, Removes the axis with length 1 from the shapes of the output arrays."
-              " **Note** that setting `squeeze_axis` to ``true`` removes axis with length 1"
-              " only along the `axis` which it is split."
-              " Also `squeeze_axis` can be set to ``true``"
-              " only if ``input.shape[axis] == num_outputs``.");
-    DMLC_DECLARE_FIELD(sections).set_default(0)
-    .describe("Number of sections if equally splitted. Default to 0 which means split by indices.");
+    DMLC_DECLARE_FIELD(indices).describe(
+        "Indices of splits. The elements should denote the boundaries of at which split"
+        " is performed along the `axis`.");
+    DMLC_DECLARE_FIELD(axis).set_default(1).describe("Axis along which to split.");
+    DMLC_DECLARE_FIELD(squeeze_axis)
+        .set_default(0)
+        .describe(
+            "If true, Removes the axis with length 1 from the shapes of the output arrays."
+            " **Note** that setting `squeeze_axis` to ``true`` removes axis with length 1"
+            " only along the `axis` which it is split."
+            " Also `squeeze_axis` can be set to ``true``"
+            " only if ``input.shape[axis] == num_outputs``.");
+    DMLC_DECLARE_FIELD(sections).set_default(0).describe(
+        "Number of sections if equally splitted. Default to 0 which means split by indices.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream indices_s, axis_s, squeeze_axis_s, sections_s;
@@ -2911,24 +3045,24 @@ struct SplitParam : public dmlc::Parameter<SplitParam> {
     axis_s << axis;
     squeeze_axis_s << squeeze_axis;
     sections_s << sections;
-    (*dict)["indices"] = indices_s.str();
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["indices"]      = indices_s.str();
+    (*dict)["axis"]         = axis_s.str();
     (*dict)["squeeze_axis"] = squeeze_axis_s.str();
-    (*dict)["sections"] = sections_s.str();
+    (*dict)["sections"]     = sections_s.str();
   }
 };  // struct SplitParam
 
 inline mxnet::TShape GetSplitIndices(const mxnet::TShape& ishape, int axis, int sections) {
-  mxnet::TShape indices(sections+1, -1);
-  indices[0] = 0;
-  int64_t section_size_b = (int64_t) (ishape[axis] / sections);
+  mxnet::TShape indices(sections + 1, -1);
+  indices[0]             = 0;
+  int64_t section_size_b = (int64_t)(ishape[axis] / sections);
   int64_t section_size_a = section_size_b + 1;
-  int section_a = ishape[axis] % sections;
+  int section_a          = ishape[axis] % sections;
   for (int i = 0; i < sections; ++i) {
-    if ( i < section_a ) {
-      indices[i+1] = section_size_a * (i + 1);
+    if (i < section_a) {
+      indices[i + 1] = section_size_a * (i + 1);
     } else {
-      indices[i+1] = section_size_b + indices[i];
+      indices[i + 1] = section_size_b + indices[i];
     }
   }
   return indices;
@@ -2955,28 +3089,29 @@ inline bool SplitOpShapeImpl(const nnvm::NodeAttrs& attrs,
                              const int real_axis) {
   using namespace mshadow;
   const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
-  mxnet::TShape dshape = in_attrs->at(split_enum::kData);
-  mxnet::TShape ishape = in_attrs->at(split_enum::kData);
+  mxnet::TShape dshape    = in_attrs->at(split_enum::kData);
+  mxnet::TShape ishape    = in_attrs->at(split_enum::kData);
   const mxnet::TShape indices =
-    (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
+      (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
   int num_outputs = (param.sections > 0) ? indices.ndim() - 1 : indices.ndim();
   // Pre-compute squeezed output shape for future usage
   mxnet::TShape squeezed_dshape = dshape;
   for (int d = real_axis; d < squeezed_dshape.ndim() - 1; ++d) {
-    squeezed_dshape[d] = squeezed_dshape[d+1];
+    squeezed_dshape[d] = squeezed_dshape[d + 1];
   }
-  squeezed_dshape = mxnet::TShape(&squeezed_dshape[0], &squeezed_dshape[squeezed_dshape.ndim()-1]);
+  squeezed_dshape =
+      mxnet::TShape(&squeezed_dshape[0], &squeezed_dshape[squeezed_dshape.ndim() - 1]);
   // Assign shape to every output
   for (int i = 0; i < num_outputs; ++i) {
     index_t start = indices[i];
-    index_t end = (i < num_outputs - 1) ? indices[i + 1] : ishape[real_axis];
+    index_t end   = (i < num_outputs - 1) ? indices[i + 1] : ishape[real_axis];
     if (ishape[real_axis] == 0U) {
       end = start;
     } else {
-      CHECK(start <= end)
-        << "start " << start << " is not less than end " << end << "for subarray " << i;
+      CHECK(start <= end) << "start " << start << " is not less than end " << end << "for subarray "
+                          << i;
       CHECK(end <= ishape[real_axis])
-        << "end " << end << " is no less than the size of the axis " << ishape[real_axis];
+          << "end " << end << " is no less than the size of the axis " << ishape[real_axis];
     }
     dshape[real_axis] = (end - start);
     if (param.squeeze_axis) {
@@ -2987,7 +3122,7 @@ inline bool SplitOpShapeImpl(const nnvm::NodeAttrs& attrs,
     }
   }
   mxnet::TShape back_calculate_dshape = ishape;
-  back_calculate_dshape[real_axis] = 0;
+  back_calculate_dshape[real_axis]    = 0;
   for (int d = 0; d < real_axis; ++d) {
     back_calculate_dshape[d] = (*out_attrs)[0][d];
   }
@@ -3016,7 +3151,8 @@ inline bool SplitOpShape(const nnvm::NodeAttrs& attrs,
   const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
   CHECK_EQ(in_attrs->size(), 1U);
   mxnet::TShape dshape = in_attrs->at(split_enum::kData);
-  if (!mxnet::ndim_is_known(dshape)) return false;
+  if (!mxnet::ndim_is_known(dshape))
+    return false;
   if (param.axis >= 0) {
     CHECK_LT(param.axis, dshape.ndim());
   } else {
@@ -3040,23 +3176,26 @@ struct SplitKernel {
    * \param axis_size      size of axis to be splitted on
    * \param trailing_size  step size within the data buffer of the axis to be splitted on
    */
-  template<typename DType>
+  template <typename DType>
   static MSHADOW_XINLINE void Map(size_t i,
-                                  const DType *in_data, DType** out_data, const size_t* indices,
-                                  const size_t num_sections, const size_t axis_size,
+                                  const DType* in_data,
+                                  DType** out_data,
+                                  const size_t* indices,
+                                  const size_t num_sections,
+                                  const size_t axis_size,
                                   const size_t trailing_size) {
-    size_t idx = i / trailing_size % axis_size;
+    size_t idx    = i / trailing_size % axis_size;
     size_t target = 0;
-    for (size_t section = 0;
-         section < num_sections && indices[section] <= idx;
-         target = section++) {}
-    DType* target_data = out_data[target];
-    const size_t mid_idx = idx - indices[target];
-    const size_t head_idx = i / (trailing_size * axis_size);
-    const size_t tail_idx = i % trailing_size;
+    for (size_t section = 0; section < num_sections && indices[section] <= idx;
+         target         = section++) {
+    }
+    DType* target_data        = out_data[target];
+    const size_t mid_idx      = idx - indices[target];
+    const size_t head_idx     = i / (trailing_size * axis_size);
+    const size_t tail_idx     = i % trailing_size;
     const size_t section_size = indices[target + 1] - indices[target];
     const size_t target_idx =
-      head_idx * trailing_size * section_size + mid_idx * trailing_size + tail_idx;
+        head_idx * trailing_size * section_size + mid_idx * trailing_size + tail_idx;
     target_data[target_idx] = in_data[i];
   }
 };
@@ -3072,28 +3211,30 @@ struct ConcatenateKernel {
    * \param axis_size      size of axis to be splitted on
    * \param trailing_size  step size within the data buffer of the axis to be splitted on
    */
-  template<typename DType>
+  template <typename DType>
   static MSHADOW_XINLINE void Map(size_t i,
-                                  DType** out_grad, DType* in_grad, const size_t* indices,
-                                  const size_t num_sections, const size_t axis_size,
+                                  DType** out_grad,
+                                  DType* in_grad,
+                                  const size_t* indices,
+                                  const size_t num_sections,
+                                  const size_t axis_size,
                                   const size_t trailing_size) {
     size_t idx = i / trailing_size % axis_size;
     size_t src = 0;
-    for (size_t section = 0;
-         section < num_sections && indices[section] <= idx;
-         src = section++) {}
-    DType* src_grad = out_grad[src];
-    const size_t mid_idx = idx - indices[src];
-    const size_t head_idx = i / (trailing_size * axis_size);
-    const size_t tail_idx = i % trailing_size;
+    for (size_t section = 0; section < num_sections && indices[section] <= idx; src = section++) {
+    }
+    DType* src_grad           = out_grad[src];
+    const size_t mid_idx      = idx - indices[src];
+    const size_t head_idx     = i / (trailing_size * axis_size);
+    const size_t tail_idx     = i % trailing_size;
     const size_t section_size = indices[src + 1] - indices[src];
     const size_t src_idx =
-      head_idx * trailing_size * section_size + mid_idx * trailing_size + tail_idx;
+        head_idx * trailing_size * section_size + mid_idx * trailing_size + tail_idx;
     in_grad[i] = src_grad[src_idx];
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 inline void SplitOpForwardImpl(const nnvm::NodeAttrs& attrs,
                                const OpContext& ctx,
                                const std::vector<TBlob>& inputs,
@@ -3104,7 +3245,7 @@ inline void SplitOpForwardImpl(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   using namespace mxnet_op;
   const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
   const TBlob& input_data = inputs[split_enum::kData];
   size_t leading = 1, trailing = 1;
   CHECK_LT(real_axis, input_data.ndim());
@@ -3116,10 +3257,10 @@ inline void SplitOpForwardImpl(const nnvm::NodeAttrs& attrs,
     trailing *= input_data.shape_[i];
   }
 
-  size_t workspace_size = 0;
+  size_t workspace_size       = 0;
   const mxnet::TShape& ishape = input_data.shape_;
   const mxnet::TShape split_pts =
-    (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
+      (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
   std::vector<size_t> indices;
   for (const auto& section : split_pts) {
     indices.push_back(section);
@@ -3135,23 +3276,28 @@ inline void SplitOpForwardImpl(const nnvm::NodeAttrs& attrs,
     }
     workspace_size += output_data.size() * sizeof(DType*);
     Tensor<xpu, 1, char> workspace =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
     Tensor<cpu, 1, size_t> indices_cpu_tensor(indices.data(), Shape1(indices.size()));
-    Tensor<xpu, 1, size_t> indices_xpu_tensor(
-      reinterpret_cast<size_t*>(workspace.dptr_), Shape1(indices.size()));
+    Tensor<xpu, 1, size_t> indices_xpu_tensor(reinterpret_cast<size_t*>(workspace.dptr_),
+                                              Shape1(indices.size()));
     Tensor<cpu, 1, DType*> ptrs_cpu_tensor(output_data.data(), Shape1(output_data.size()));
     Tensor<xpu, 1, DType*> ptrs_xpu_tensor(
-      reinterpret_cast<DType**>(workspace.dptr_ + indices.size() * sizeof(size_t)),
-      Shape1(output_data.size()));
+        reinterpret_cast<DType**>(workspace.dptr_ + indices.size() * sizeof(size_t)),
+        Shape1(output_data.size()));
     mshadow::Copy(indices_xpu_tensor, indices_cpu_tensor, s);
     mshadow::Copy(ptrs_xpu_tensor, ptrs_cpu_tensor, s);
-    Kernel<SplitKernel, xpu>::Launch(
-      s, input_data.Size(), input_data.dptr<DType>(), ptrs_xpu_tensor.dptr_,
-      indices_xpu_tensor.dptr_, indices.size() - 1, mid, trailing);
+    Kernel<SplitKernel, xpu>::Launch(s,
+                                     input_data.Size(),
+                                     input_data.dptr<DType>(),
+                                     ptrs_xpu_tensor.dptr_,
+                                     indices_xpu_tensor.dptr_,
+                                     indices.size() - 1,
+                                     mid,
+                                     trailing);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void SplitOpForward(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<TBlob>& inputs,
@@ -3164,14 +3310,14 @@ inline void SplitOpForward(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), (param.sections > 0) ? param.sections : param.indices.ndim());
   const TBlob& input_data = inputs[split_enum::kData];
-  int real_axis = param.axis;
+  int real_axis           = param.axis;
   if (real_axis < 0) {
     real_axis += input_data.ndim();
   }
   SplitOpForwardImpl<xpu>(attrs, ctx, inputs, req, outputs, real_axis);
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void SplitOpBackwardImpl(const nnvm::NodeAttrs& attrs,
                                 const OpContext& ctx,
                                 const std::vector<TBlob>& inputs,
@@ -3182,8 +3328,8 @@ inline void SplitOpBackwardImpl(const nnvm::NodeAttrs& attrs,
   using namespace mshadow::expr;
   using namespace mxnet_op;
   const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
-  Stream<xpu> *s = ctx.get_stream<xpu>();
-  TBlob input_grad = outputs[split_enum::kData];
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
+  TBlob input_grad        = outputs[split_enum::kData];
   size_t leading = 1, trailing = 1;
   CHECK_LT(real_axis, input_grad.ndim());
   size_t mid = input_grad.shape_[real_axis];
@@ -3194,10 +3340,10 @@ inline void SplitOpBackwardImpl(const nnvm::NodeAttrs& attrs,
     trailing *= input_grad.shape_[i];
   }
 
-  size_t workspace_size = 0;
+  size_t workspace_size       = 0;
   const mxnet::TShape& ishape = input_grad.shape_;
   const mxnet::TShape split_pts =
-    (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
+      (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
   std::vector<size_t> indices;
   for (const auto& section : split_pts) {
     indices.push_back(section);
@@ -3213,23 +3359,28 @@ inline void SplitOpBackwardImpl(const nnvm::NodeAttrs& attrs,
     }
     workspace_size += out_grads.size() * sizeof(DType*);
     Tensor<xpu, 1, char> workspace =
-      ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+        ctx.requested[0].get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
     Tensor<cpu, 1, size_t> indices_cpu_tensor(indices.data(), Shape1(indices.size()));
-    Tensor<xpu, 1, size_t> indices_xpu_tensor(
-      reinterpret_cast<size_t*>(workspace.dptr_), Shape1(indices.size()));
+    Tensor<xpu, 1, size_t> indices_xpu_tensor(reinterpret_cast<size_t*>(workspace.dptr_),
+                                              Shape1(indices.size()));
     Tensor<cpu, 1, DType*> ptrs_cpu_tensor(out_grads.data(), Shape1(inputs.size()));
     Tensor<xpu, 1, DType*> ptrs_xpu_tensor(
-      reinterpret_cast<DType**>(workspace.dptr_ + indices.size() * sizeof(size_t)),
-      Shape1(inputs.size()));
+        reinterpret_cast<DType**>(workspace.dptr_ + indices.size() * sizeof(size_t)),
+        Shape1(inputs.size()));
     mshadow::Copy(indices_xpu_tensor, indices_cpu_tensor, s);
     mshadow::Copy(ptrs_xpu_tensor, ptrs_cpu_tensor, s);
-    Kernel<ConcatenateKernel, xpu>::Launch(
-      s, input_grad.Size(), ptrs_xpu_tensor.dptr_, input_grad.dptr<DType>(),
-      indices_xpu_tensor.dptr_, indices.size() - 1, mid, trailing);
+    Kernel<ConcatenateKernel, xpu>::Launch(s,
+                                           input_grad.Size(),
+                                           ptrs_xpu_tensor.dptr_,
+                                           input_grad.dptr<DType>(),
+                                           indices_xpu_tensor.dptr_,
+                                           indices.size() - 1,
+                                           mid,
+                                           trailing);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 inline void SplitOpBackward(const nnvm::NodeAttrs& attrs,
                             const OpContext& ctx,
                             const std::vector<TBlob>& inputs,
@@ -3240,11 +3391,11 @@ inline void SplitOpBackward(const nnvm::NodeAttrs& attrs,
   using namespace mxnet_op;
   const SplitParam& param = nnvm::get<SplitParam>(attrs.parsed);
   CHECK_EQ(inputs.size(), (param.sections > 0) ? param.sections : param.indices.ndim())
-    << "out grad vector size mush match the output size";
+      << "out grad vector size mush match the output size";
   CHECK_EQ(outputs.size(), 1U);
   int real_axis = param.axis;
   if (real_axis < 0) {
-      real_axis += outputs[split_enum::kData].ndim();
+    real_axis += outputs[split_enum::kData].ndim();
   }
   SplitOpBackwardImpl<xpu>(attrs, ctx, inputs, req, outputs, real_axis);
 }
@@ -3258,32 +3409,32 @@ inline uint32_t SplitNumOutputs(const NodeAttrs& attrs) {
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::TransposeParam> {
   size_t operator()(const mxnet::op::TransposeParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.axes);
+    ret        = dmlc::HashCombine(ret, val.axes);
     return ret;
   }
 };
 
-template<>
+template <>
 struct hash<mxnet::op::ReshapeParam> {
   size_t operator()(const mxnet::op::ReshapeParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.target_shape);
-    ret = dmlc::HashCombine(ret, val.keep_highest);
-    ret = dmlc::HashCombine(ret, val.shape);
-    ret = dmlc::HashCombine(ret, val.reverse);
+    ret        = dmlc::HashCombine(ret, val.target_shape);
+    ret        = dmlc::HashCombine(ret, val.keep_highest);
+    ret        = dmlc::HashCombine(ret, val.shape);
+    ret        = dmlc::HashCombine(ret, val.reverse);
     return ret;
   }
 };
 
-template<>
+template <>
 struct hash<mxnet::op::ExpandDimParam> {
   size_t operator()(const mxnet::op::ExpandDimParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.axis);
+    ret        = dmlc::HashCombine(ret, val.axis);
     return ret;
   }
 };
diff --git a/src/operator/tensor/matrix_op.cc b/src/operator/tensor/matrix_op.cc
index ab05cd1bc79d..958e9a3e35b9 100644
--- a/src/operator/tensor/matrix_op.cc
+++ b/src/operator/tensor/matrix_op.cc
@@ -34,10 +34,12 @@
 namespace mxnet {
 namespace op {
 
-
-template<>
-void SliceDimTwoCsrImpl<cpu>(const mxnet::TShape &begin, const mxnet::TShape &end,
-                             const OpContext& ctx, const NDArray &in, const NDArray &out) {
+template <>
+void SliceDimTwoCsrImpl<cpu>(const mxnet::TShape& begin,
+                             const mxnet::TShape& end,
+                             const OpContext& ctx,
+                             const NDArray& in,
+                             const NDArray& out) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace csr;
@@ -49,23 +51,22 @@ void SliceDimTwoCsrImpl<cpu>(const mxnet::TShape &begin, const mxnet::TShape &en
   MSHADOW_IDX_TYPE_SWITCH(in.aux_type(kIndPtr), RType, {
     MSHADOW_IDX_TYPE_SWITCH(in.aux_type(kIdx), IType, {
       MSHADOW_TYPE_SWITCH(in.dtype(), DType, {
-        RType *in_indptr = in.aux_data(kIndPtr).dptr<RType>();
-        IType *in_idx = in.aux_data(kIdx).dptr<IType>();
-        DType *in_data = in.data().dptr<DType>();
+        RType* in_indptr = in.aux_data(kIndPtr).dptr<RType>();
+        IType* in_idx    = in.aux_data(kIdx).dptr<IType>();
+        DType* in_data   = in.data().dptr<DType>();
         // retrieve nnz (CPU implementation)
-        RType *out_indptr = out.aux_data(kIndPtr).dptr<RType>();
-        int nnz = 0;
-        out_indptr[0] = 0;
+        RType* out_indptr = out.aux_data(kIndPtr).dptr<RType>();
+        int nnz           = 0;
+        out_indptr[0]     = 0;
         // loop through indptr array and corresponding indices to count for nnz
         for (nnvm::dim_t i = 0; i < indptr_len - 1; i++) {
-          out_indptr[i+1] = out_indptr[i];
-          for (RType j = in_indptr[i + begin_row];
-               j < in_indptr[i + begin_row + 1]; j++) {
+          out_indptr[i + 1] = out_indptr[i];
+          for (RType j = in_indptr[i + begin_row]; j < in_indptr[i + begin_row + 1]; j++) {
             // indices of CSRNDArray are in ascending order per row
             if (in_idx[j] >= end_col) {
               break;
             } else if (in_idx[j] >= begin_col) {
-              out_indptr[i+1]++;
+              out_indptr[i + 1]++;
               nnz++;
             }
           }
@@ -77,20 +78,25 @@ void SliceDimTwoCsrImpl<cpu>(const mxnet::TShape &begin, const mxnet::TShape &en
         }
         out.CheckAndAllocAuxData(kIdx, Shape1(nnz));
         out.CheckAndAllocData(Shape1(nnz));
-        IType *out_idx = out.aux_data(kIdx).dptr<IType>();
-        DType *out_data = out.data().dptr<DType>();
-
-        Stream<cpu> *s = ctx.get_stream<cpu>();
-        Kernel<SliceDimTwoCsrAssign, cpu>::Launch(s, indptr_len - 1, out_idx, out_data,
-                                                  out_indptr, in_idx, in_data,
+        IType* out_idx  = out.aux_data(kIdx).dptr<IType>();
+        DType* out_data = out.data().dptr<DType>();
+
+        Stream<cpu>* s = ctx.get_stream<cpu>();
+        Kernel<SliceDimTwoCsrAssign, cpu>::Launch(s,
+                                                  indptr_len - 1,
+                                                  out_idx,
+                                                  out_data,
+                                                  out_indptr,
+                                                  in_idx,
+                                                  in_data,
                                                   in_indptr + begin_row,
-                                                  begin_col, end_col);
+                                                  begin_col,
+                                                  end_col);
       });
     });
   });
 }
 
-
 DMLC_REGISTER_PARAMETER(ReshapeParam);
 DMLC_REGISTER_PARAMETER(TransposeParam);
 DMLC_REGISTER_PARAMETER(ExpandDimParam);
@@ -128,14 +134,13 @@ inline static bool ReshapeStorageType(const nnvm::NodeAttrs& attrs,
                                       std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 #endif
 
 NNVM_REGISTER_OP(Reshape)
-.add_alias("reshape")
-.describe(R"code(Reshapes the input array.
+    .add_alias("reshape")
+    .describe(R"code(Reshapes the input array.
 .. note:: ``Reshape`` is deprecated, use ``reshape``
 Given an array and a shape, this function returns a copy of the array in the new shape.
 The shape is a tuple of integers such as (2,3,4). The size of the new shape should be same as the size of the input array.
@@ -184,32 +189,33 @@ If the argument `reverse` is set to 1, then the special values are inferred from
       - with reverse=1, output shape will be (50,4).
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ReshapeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ReshapeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ReshapeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ReshapeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ReshapeComputeExCPU)
-.set_attr<FInferStorageType>("FInferStorageType", ReshapeStorageType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ReshapeComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", ReshapeStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "Input data to reshape.")
-.add_arguments(ReshapeParam::__FIELDS__());
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "Input data to reshape.")
+    .add_arguments(ReshapeParam::__FIELDS__());
 
 #if MXNET_USE_ONEDNN == 1
 static void FlattenEx(const nnvm::NodeAttrs& attrs,
@@ -228,19 +234,18 @@ static void FlattenEx(const nnvm::NodeAttrs& attrs,
 static inline bool FlattenStorageType(const nnvm::NodeAttrs& attrs,
                                       const int dev_mask,
                                       DispatchMode* dispatch_mode,
-                                      std::vector<int> *in_attrs,
-                                      std::vector<int> *out_attrs) {
+                                      std::vector<int>* in_attrs,
+                                      std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
-  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs,
-                           out_attrs);
+  return MKLDNNStorageType(attrs, dev_mask, true, dispatch_mode, in_attrs, out_attrs);
 }
 #endif
 
 NNVM_REGISTER_OP(Flatten)
-.add_alias("flatten")
-.add_alias("_npx_batch_flatten")
-.describe(R"code(Flattens the input array into a 2-D array by collapsing the higher dimensions.
+    .add_alias("flatten")
+    .add_alias("_npx_batch_flatten")
+    .describe(R"code(Flattens the input array into a 2-D array by collapsing the higher dimensions.
 .. note:: `Flatten` is deprecated. Use `flatten` instead.
 For an input array with shape ``(d1, d2, ..., dk)``, `flatten` operation reshapes
 the input array into an output array of shape ``(d1, d2*...*dk)``.
@@ -260,30 +265,31 @@ Example::
     flatten(x) = [[ 1.,  2.,  3.,  4.,  5.,  6.,  7.,  8.,  9.],
        [ 1.,  2.,  3.,  4.,  5.,  6.,  7.,  8.,  9.]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<mxnet::FInferShape>("FInferShape", FlattenShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_backward_copy" })
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<mxnet::FInferShape>("FInferShape", FlattenShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_copy"})
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", FlattenEx)
-.set_attr<FInferStorageType>("FInferStorageType", FlattenStorageType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", FlattenEx)
+    .set_attr<FInferStorageType>("FInferStorageType", FlattenStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "Input array.");
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "Input array.");
 
 #if MXNET_USE_ONEDNN == 1
 static void TransposeComputeExCPU(const nnvm::NodeAttrs& attrs,
@@ -295,8 +301,8 @@ static void TransposeComputeExCPU(const nnvm::NodeAttrs& attrs,
     return;
   }
   const TransposeParam& param = nnvm::get<TransposeParam>(attrs.parsed);
-  CHECK(req[0] == kWriteTo || req[0] == kAddTo) <<
-      "Transpose only supports kNullOp, kWriteTo and kAddTo";
+  CHECK(req[0] == kWriteTo || req[0] == kAddTo)
+      << "Transpose only supports kNullOp, kWriteTo and kAddTo";
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
 
@@ -319,7 +325,7 @@ inline static bool TransposeStorageType(const nnvm::NodeAttrs& attrs,
 #endif
 
 NNVM_REGISTER_OP(transpose)
-.describe(R"code(Permutes the dimensions of an array.
+    .describe(R"code(Permutes the dimensions of an array.
 Examples::
 
   x = [[ 1, 2],
@@ -339,43 +345,40 @@ Examples::
                                 [[ 3.,  4.],
                                  [ 7.,  8.]]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<TransposeParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TransposeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    const TransposeParam& param = nnvm::get<TransposeParam>(n->attrs.parsed);
-    if (param.axes.ndim() == 0) {
-      return MakeNonlossGradNode(
-          "transpose", n, ograds, {},
-          std::unordered_map<std::string, std::string>());
-    } else {
-      mxnet::TShape axes = mxnet::TShape(param.axes.ndim(), -1);
-      for (int i = 0; i < axes.ndim(); ++i) {
-        axes[param.axes[i]] = i;
-      }
-      std::ostringstream os;
-      os << axes;
-      return MakeNonlossGradNode(
-          "transpose", n, ograds,
-          {}, {{"axes", os.str()}});
-    }
-  })
-.set_attr<FCompute>("FCompute<cpu>", Transpose<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<TransposeParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TransposeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const TransposeParam& param = nnvm::get<TransposeParam>(n->attrs.parsed);
+          if (param.axes.ndim() == 0) {
+            return MakeNonlossGradNode(
+                "transpose", n, ograds, {}, std::unordered_map<std::string, std::string>());
+          } else {
+            mxnet::TShape axes = mxnet::TShape(param.axes.ndim(), -1);
+            for (int i = 0; i < axes.ndim(); ++i) {
+              axes[param.axes[i]] = i;
+            }
+            std::ostringstream os;
+            os << axes;
+            return MakeNonlossGradNode("transpose", n, ograds, {}, {{"axes", os.str()}});
+          }
+        })
+    .set_attr<FCompute>("FCompute<cpu>", Transpose<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", TransposeComputeExCPU)
-.set_attr<FInferStorageType>("FInferStorageType", TransposeStorageType)
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", TransposeComputeExCPU)
+    .set_attr<FInferStorageType>("FInferStorageType", TransposeStorageType)
 #endif
-.add_argument("data", "NDArray-or-Symbol", "Source input")
-.add_arguments(TransposeParam::__FIELDS__());
-
+    .add_argument("data", "NDArray-or-Symbol", "Source input")
+    .add_arguments(TransposeParam::__FIELDS__());
 
 #if MXNET_USE_ONEDNN == 1
 static void ExpandDimEx(const nnvm::NodeAttrs& attrs,
@@ -386,7 +389,8 @@ static void ExpandDimEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   // skip zero-size tensor
-  if (inputs[0].shape().Size() == 0U) return;
+  if (inputs[0].shape().Size() == 0U)
+    return;
   // If inputs are supposed to be in MKLDNN format and
   // MKLDNN support the data type or the shape. Then convert
   // it to the output format and shape
@@ -405,36 +409,37 @@ inline static bool ExpandDimStorageType(const nnvm::NodeAttrs& attrs,
 #endif
 
 NNVM_REGISTER_OP(expand_dims)
-.add_alias("_npi_expand_dims")
-.describe(R"code(Inserts a new axis of size 1 into the array shape
+    .add_alias("_npi_expand_dims")
+    .describe(R"code(Inserts a new axis of size 1 into the array shape
 For example, given ``x`` with shape ``(2,3,4)``, then ``expand_dims(x, axis=1)``
 will return a new array with shape ``(2,1,3,4)``.
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ExpandDimParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ExpandDimShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
-  [](const NodeAttrs& attrs){
-    return std::vector<bool>{true};
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ExpandDimParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ExpandDimShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<nnvm::FInplaceIdentity>("FInplaceIdentity",
+                                      [](const NodeAttrs& attrs) {
+                                        return std::vector<bool>{true};
+                                      })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reshape"})
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ExpandDimEx)
-.set_attr<FInferStorageType>("FInferStorageType", ExpandDimStorageType)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& n) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
+    .set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ExpandDimEx)
+    .set_attr<FInferStorageType>("FInferStorageType", ExpandDimStorageType)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
 #endif
-.add_argument("data", "NDArray-or-Symbol", "Source input")
-.add_arguments(ExpandDimParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Source input")
+    .add_arguments(ExpandDimParam::__FIELDS__());
 
 void SliceExCPU(const nnvm::NodeAttrs& attrs,
                 const OpContext& ctx,
@@ -444,7 +449,7 @@ void SliceExCPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1);
   CHECK_EQ(outputs.size(), 1);
   const SliceParam& param = nnvm::get<SliceParam>(attrs.parsed);
-  auto in_stype = inputs[0].storage_type();
+  auto in_stype           = inputs[0].storage_type();
   if (in_stype == kCSRStorage) {
     SliceCsrImpl<cpu>(param, ctx, inputs[0], req[0], outputs[0]);
 #if MXNET_USE_ONEDNN == 1
@@ -462,8 +467,8 @@ void SliceExCPU(const nnvm::NodeAttrs& attrs,
 
 NNVM_REGISTER_OP(slice)
 MXNET_ADD_SPARSE_OP_ALIAS(slice)
-.add_alias("crop")
-.describe(R"code(Slices a region of the array.
+    .add_alias("crop")
+    .describe(R"code(Slices a region of the array.
 
 .. note:: ``crop`` is deprecated. Use ``slice`` instead.
 
@@ -504,80 +509,82 @@ Example::
                                                             [5.,  7.],
                                                             [1.,  3.]]
 )code" ADD_FILELINE)
-.add_alias("_npx_slice")
-.add_alias("_npi_slice")
-.set_attr_parser(ParamParser<SliceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", SliceOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FInferStorageType>("FInferStorageType", SliceForwardInferStorageType)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_slice"})
-.set_attr<FCompute>("FCompute<cpu>", SliceOpForward<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SliceExCPU)
+    .add_alias("_npx_slice")
+    .add_alias("_npi_slice")
+    .set_attr_parser(ParamParser<SliceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", SliceOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FInferStorageType>("FInferStorageType", SliceForwardInferStorageType)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_slice"})
+    .set_attr<FCompute>("FCompute<cpu>", SliceOpForward<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SliceExCPU)
 #if MXNET_USE_ONEDNN == 1
-.set_attr<bool>("TIsMKLDNN", true)
+    .set_attr<bool>("TIsMKLDNN", true)
 #endif
-.add_argument("data", "NDArray-or-Symbol", "Source input")
-.add_arguments(SliceParam::__FIELDS__());
+    .add_argument("data", "NDArray-or-Symbol", "Source input")
+    .add_arguments(SliceParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_slice)
-.set_attr_parser(ParamParser<SliceParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", SliceOpBackward<cpu>);
+    .set_attr_parser(ParamParser<SliceParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", SliceOpBackward<cpu>);
 
 NNVM_REGISTER_OP(_slice_assign)
-.add_alias("_crop_assign")
-.add_alias("_npi_slice_assign")
-.MXNET_DESCRIBE("Assign the rhs to a cropped subset of lhs.\n\n"
-"Requirements\n"
-"------------\n"
-"- output should be explicitly given and be the same as lhs.\n"
-"- lhs and rhs are of the same data type, and on the same device.\n")
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"lhs", "rhs"};
-  })
-.set_attr_parser(ParamParser<SliceParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", SliceAssignOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", SliceAssignOpForward<cpu>)
-.add_argument("lhs", "NDArray-or-Symbol", "Source input")
-.add_argument("rhs", "NDArray-or-Symbol", "value to assign")
-.add_arguments(SliceParam::__FIELDS__());
+    .add_alias("_crop_assign")
+    .add_alias("_npi_slice_assign")
+    .MXNET_DESCRIBE(
+        "Assign the rhs to a cropped subset of lhs.\n\n"
+        "Requirements\n"
+        "------------\n"
+        "- output should be explicitly given and be the same as lhs.\n"
+        "- lhs and rhs are of the same data type, and on the same device.\n")
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"lhs", "rhs"};
+                                     })
+    .set_attr_parser(ParamParser<SliceParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", SliceAssignOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<2, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", SliceAssignOpForward<cpu>)
+    .add_argument("lhs", "NDArray-or-Symbol", "Source input")
+    .add_argument("rhs", "NDArray-or-Symbol", "value to assign")
+    .add_arguments(SliceParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_slice_assign_scalar)
-.add_alias("_crop_assign_scalar")
-.add_alias("_npi_slice_assign_scalar")
-.MXNET_DESCRIBE("(Assign the scalar to a cropped subset of the input.\n\n"
-"Requirements\n"
-"------------\n"
-"- output should be explicitly given and be the same as input\n"
-")")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SliceAssignScalarParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", SliceAssignScalarOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<nnvm::FInplaceOption>("FInplaceOption",
-  [](const NodeAttrs& attrs){
-    return std::vector<std::pair<int, int> >{{0, 0}};
-  })
-.set_attr<FCompute>("FCompute<cpu>", SliceAssignScalarOpForward<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Source input")
-.add_arguments(SliceAssignScalarParam::__FIELDS__());
+    .add_alias("_crop_assign_scalar")
+    .add_alias("_npi_slice_assign_scalar")
+    .MXNET_DESCRIBE(
+        "(Assign the scalar to a cropped subset of the input.\n\n"
+        "Requirements\n"
+        "------------\n"
+        "- output should be explicitly given and be the same as input\n"
+        ")")
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SliceAssignScalarParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", SliceAssignScalarOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<nnvm::FInplaceOption>("FInplaceOption",
+                                    [](const NodeAttrs& attrs) {
+                                      return std::vector<std::pair<int, int> >{{0, 0}};
+                                    })
+    .set_attr<FCompute>("FCompute<cpu>", SliceAssignScalarOpForward<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "Source input")
+    .add_arguments(SliceAssignScalarParam::__FIELDS__());
 
 NNVM_REGISTER_OP(slice_axis)
-.describe(R"code(Slices along a given axis.
+    .describe(R"code(Slices along a given axis.
 Returns an array slice along a given `axis` starting from the `begin` index
 to the `end` index.
 Examples::
@@ -594,26 +601,26 @@ Examples::
                                              [  6.,   7.],
                                              [ 10.,  11.]]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SliceAxisParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", SliceAxisShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", SliceAxis<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_slice_axis"})
-.add_argument("data", "NDArray-or-Symbol", "Source input")
-.add_arguments(SliceAxisParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SliceAxisParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", SliceAxisShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", SliceAxis<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_slice_axis"})
+    .add_argument("data", "NDArray-or-Symbol", "Source input")
+    .add_arguments(SliceAxisParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_slice_axis)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SliceAxisParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", SliceAxisGrad_<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SliceAxisParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", SliceAxisGrad_<cpu>);
 
 NNVM_REGISTER_OP(slice_like)
-.add_alias("_npx_slice_like")
-.describe(R"code(Slices a region of the array like the shape of another array.
+    .add_alias("_npx_slice_like")
+    .describe(R"code(Slices a region of the array like the shape of another array.
 This function is similar to ``slice``, however, the `begin` are always `0`s
 and `end` of specific axes are inferred from the second input `shape_like`.
 Given the second `shape_like` input of ``shape=(d_0, d_1, ..., d_n-1)``,
@@ -650,41 +657,41 @@ Example::
                                  [  5.,   6.,   7.]
                                  [  9.,  10.,  11.]]
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SliceLikeParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "shape_like"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", SliceLikeShape)
-.set_attr<nnvm::FInferType>("FInferType", [](const nnvm::NodeAttrs& attrs,
-                                             std::vector<int> *in_attrs,
-                                             std::vector<int> *out_attrs) {
-    CHECK_EQ(in_attrs->size(), 2) << " in operator " << attrs.name;
-    std::vector<int> checked_in_attrs = { (*in_attrs)[0] };
-    bool ret = !type_is_none((*in_attrs)[1]) &&
-               ElemwiseType<1, 1>(attrs, &checked_in_attrs, out_attrs);
-    (*in_attrs)[0] = checked_in_attrs[0];
-    return ret;
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_slice_like"})
-.set_attr<FCompute>("FCompute<cpu>", SliceLikeForward<cpu>)
-.add_argument("data", "NDArray-or-Symbol", "Source input")
-.add_argument("shape_like", "NDArray-or-Symbol", "Shape like input")
-.add_arguments(SliceLikeParam::__FIELDS__());
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SliceLikeParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "shape_like"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", SliceLikeShape)
+    .set_attr<nnvm::FInferType>(
+        "FInferType",
+        [](const nnvm::NodeAttrs& attrs, std::vector<int>* in_attrs, std::vector<int>* out_attrs) {
+          CHECK_EQ(in_attrs->size(), 2) << " in operator " << attrs.name;
+          std::vector<int> checked_in_attrs = {(*in_attrs)[0]};
+          bool ret                          = !type_is_none((*in_attrs)[1]) &&
+                     ElemwiseType<1, 1>(attrs, &checked_in_attrs, out_attrs);
+          (*in_attrs)[0] = checked_in_attrs[0];
+          return ret;
+        })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_slice_like"})
+    .set_attr<FCompute>("FCompute<cpu>", SliceLikeForward<cpu>)
+    .add_argument("data", "NDArray-or-Symbol", "Source input")
+    .add_argument("shape_like", "NDArray-or-Symbol", "Shape like input")
+    .add_arguments(SliceLikeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_slice_like)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<SliceLikeParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", SliceLikeBackward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<SliceLikeParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", SliceLikeBackward<cpu>);
 
 NNVM_REGISTER_OP(clip)
 MXNET_ADD_SPARSE_OP_ALIAS(clip)
-.add_alias("_npi_clip")
-.describe(R"code(Clips (limits) the values in an array.
+    .add_alias("_npi_clip")
+    .describe(R"code(Clips (limits) the values in an array.
 Given an interval, values outside the interval are clipped to the interval edges.
 Clipping ``x`` between `a_min` and `a_max` would be
 .. math::
@@ -706,58 +713,66 @@ parameter values:
 * clip(csr, a_min < 0, a_max < 0) = csr
 * clip(csr, a_min > 0, a_max > 0) = csr
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ClipParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", Clip<cpu>)
-.set_attr<FComputeEx>("FComputeEx<cpu>", ClipEx<cpu>)
-.set_attr<FInferStorageType>("FInferStorageType", [](const nnvm::NodeAttrs& attrs,
-                                                     const int dev_mask,
-                                                     DispatchMode* dispatch_mode,
-                                                     std::vector<int> *in_attrs,
-                                                     std::vector<int> *out_attrs) {
-    bool dispatched = false;
-    // For clipping ranges that cross zero, sparse output is possible
-    CHECK_EQ(in_attrs->size(), 1U) << " in operator " << attrs.name;
-    CHECK_EQ(out_attrs->size(), 1U) << " in operator " << attrs.name;
-    if ((*in_attrs)[0] == kDefaultStorage) {
-      dispatched = storage_type_assign(&out_attrs[0], kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFCompute);
-    }
-    const auto& param = nnvm::get<ClipParam>(attrs.parsed);
-    if (!dispatched && param.a_min <= 0.0 && param.a_max >= 0.0) {
-      const int this_stype = (*in_attrs)[0];
-      if (this_stype != kUndefinedStorage) {
-        dispatched = storage_type_assign(&(*out_attrs)[0], mxnet::NDArrayStorageType(this_stype),
-                                         dispatch_mode, DispatchMode::kFComputeEx);
-      }
-    }
-    if (!dispatched) {
-      // otherwise, output is dense (print warning anyway)
-      if (!storage_type_assign(&(*out_attrs)[0], kDefaultStorage,
-                              dispatch_mode, DispatchMode::kFComputeFallback)) {
-        dispatched = dispatch_fallback(out_attrs, dispatch_mode);
-      }
-    }
-    return dispatched;
-  })
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{ "_backward_clip" })
-.add_argument("data", "NDArray-or-Symbol", "Input array.")
-.add_arguments(ClipParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ClipParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", Clip<cpu>)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", ClipEx<cpu>)
+    .set_attr<FInferStorageType>("FInferStorageType",
+                                 [](const nnvm::NodeAttrs& attrs,
+                                    const int dev_mask,
+                                    DispatchMode* dispatch_mode,
+                                    std::vector<int>* in_attrs,
+                                    std::vector<int>* out_attrs) {
+                                   bool dispatched = false;
+                                   // For clipping ranges that cross zero, sparse output is possible
+                                   CHECK_EQ(in_attrs->size(), 1U) << " in operator " << attrs.name;
+                                   CHECK_EQ(out_attrs->size(), 1U) << " in operator " << attrs.name;
+                                   if ((*in_attrs)[0] == kDefaultStorage) {
+                                     dispatched = storage_type_assign(&out_attrs[0],
+                                                                      kDefaultStorage,
+                                                                      dispatch_mode,
+                                                                      DispatchMode::kFCompute);
+                                   }
+                                   const auto& param = nnvm::get<ClipParam>(attrs.parsed);
+                                   if (!dispatched && param.a_min <= 0.0 && param.a_max >= 0.0) {
+                                     const int this_stype = (*in_attrs)[0];
+                                     if (this_stype != kUndefinedStorage) {
+                                       dispatched = storage_type_assign(
+                                           &(*out_attrs)[0],
+                                           mxnet::NDArrayStorageType(this_stype),
+                                           dispatch_mode,
+                                           DispatchMode::kFComputeEx);
+                                     }
+                                   }
+                                   if (!dispatched) {
+                                     // otherwise, output is dense (print warning anyway)
+                                     if (!storage_type_assign(&(*out_attrs)[0],
+                                                              kDefaultStorage,
+                                                              dispatch_mode,
+                                                              DispatchMode::kFComputeFallback)) {
+                                       dispatched = dispatch_fallback(out_attrs, dispatch_mode);
+                                     }
+                                   }
+                                   return dispatched;
+                                 })
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_clip"})
+    .add_argument("data", "NDArray-or-Symbol", "Input array.")
+    .add_arguments(ClipParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_clip)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ClipParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", ClipGrad_<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ClipParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", ClipGrad_<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes);
 
 NNVM_REGISTER_OP(repeat)
-.add_alias("_npi_repeat")
-.describe(R"code(Repeats elements of an array.
+    .add_alias("_npi_repeat")
+    .describe(R"code(Repeats elements of an array.
 By default, ``repeat`` flattens the input array into 1-D and then repeats the
 elements::
 
@@ -777,34 +792,33 @@ The parameter ``axis`` specifies the axis along which to perform repeat::
                                    [ 3.,  3.,  4.,  4.]]
 
 )code" ADD_FILELINE)
-.set_num_outputs(1)
-.set_num_inputs(1)
-.set_attr_parser(ParamParser<RepeatParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", RepeatOpShape)
-.set_attr<nnvm::FInferType>("FInferType", RepeatOpType)
-.set_attr<FCompute>("FCompute<cpu>", RepeatOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_repeat"})
-.add_argument("data", "NDArray-or-Symbol", "Input data array")
-.add_arguments(RepeatParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(1)
+    .set_attr_parser(ParamParser<RepeatParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", RepeatOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", RepeatOpType)
+    .set_attr<FCompute>("FCompute<cpu>", RepeatOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_repeat"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data array")
+    .add_arguments(RepeatParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_repeat)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RepeatParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", RepeatOpBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest> {ResourceRequest::kTempSpace};
-});
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RepeatParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", RepeatOpBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(tile)
-.add_alias("_npi_tile")
-.describe(R"code(Repeats the whole array multiple times.
+    .add_alias("_npi_tile")
+    .describe(R"code(Repeats the whole array multiple times.
 If ``reps`` has length *d*, and input array has dimension of *n*. There are
 three cases:
 - **n=d**. Repeat *i*-th dimension of the input by ``reps[i]`` times::
@@ -835,33 +849,32 @@ three cases:
                               [ 3.,  4.,  3.,  4.,  3.,  4.]]]
 
 )code" ADD_FILELINE)
-.set_num_outputs(1)
-.set_num_inputs(1)
-.set_attr_parser(ParamParser<TileParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", TileOpShape)
-.set_attr<nnvm::FInferType>("FInferType", TileOpType)
-.set_attr<FCompute>("FCompute<cpu>", TileOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_tile"})
-.add_argument("data", "NDArray-or-Symbol", "Input data array")
-.add_arguments(TileParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(1)
+    .set_attr_parser(ParamParser<TileParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", TileOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", TileOpType)
+    .set_attr<FCompute>("FCompute<cpu>", TileOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_tile"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data array")
+    .add_arguments(TileParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_tile)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<TileParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TileOpBackward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest> {ResourceRequest::kTempSpace};
-});
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<TileParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TileOpBackward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(reverse)
-.describe(R"code(Reverses the order of elements along given axis while preserving array shape.
+    .describe(R"code(Reverses the order of elements along given axis while preserving array shape.
 Note: reverse and flip are equivalent. We use reverse in the following examples.
 Examples::
 
@@ -873,39 +886,39 @@ Examples::
                         [ 9.,  8.,  7.,  6.,  5.]]
 
 )code" ADD_FILELINE)
-.set_num_outputs(1)
-.set_num_inputs(1)
-.add_alias("flip")
-.set_attr_parser(ParamParser<ReverseParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-[](const NodeAttrs& attrs) {
-  return std::vector<std::string> {"data"};
-})
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest> {ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", ReverseOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{ "_backward_reverse" })
-.add_argument("data", "NDArray-or-Symbol", "Input data array")
-.add_arguments(ReverseParam::__FIELDS__());
+    .set_num_outputs(1)
+    .set_num_inputs(1)
+    .add_alias("flip")
+    .set_attr_parser(ParamParser<ReverseParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<mxnet::FInferShape>("FInferShape", ElemwiseShape<1, 1>)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", ReverseOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_reverse"})
+    .add_argument("data", "NDArray-or-Symbol", "Input data array")
+    .add_arguments(ReverseParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_reverse)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ReverseParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-[](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest> {ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", ReverseOpForward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ReverseParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", ReverseOpForward<cpu>);
 
 NNVM_REGISTER_OP(stack)
-.describe(R"code(Join a sequence of arrays along a new axis.
+    .describe(R"code(Join a sequence of arrays along a new axis.
 The axis parameter specifies the index of the new axis in the dimensions of the
 result. For example, if axis=0 it will be the first dimension and if axis=-1 it
 will be the last dimension.
@@ -919,41 +932,42 @@ Examples::
                          [2, 4]]
 
 )code")
-.set_num_inputs([](const nnvm::NodeAttrs& attrs) {
-    const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_args);
-  })
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<StackParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    uint32_t num_args = dmlc::get<StackParam>(attrs.parsed).num_args;
-    std::vector<std::string> ret;
-    for (uint32_t i = 0; i < num_args; ++i) {
-      ret.push_back(std::string("arg") + std::to_string(i));
-    }
-    return ret;
-  })
-.set_attr<std::string>("key_var_num_args", "num_args")
-.set_attr<mxnet::FInferShape>("FInferShape", StackOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", StackOpForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_stack"})
-.add_argument("data", "NDArray-or-Symbol[]", "List of arrays to stack")
-.add_arguments(StackParam::__FIELDS__());
+    .set_num_inputs([](const nnvm::NodeAttrs& attrs) {
+      const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<StackParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       uint32_t num_args =
+                                           dmlc::get<StackParam>(attrs.parsed).num_args;
+                                       std::vector<std::string> ret;
+                                       for (uint32_t i = 0; i < num_args; ++i) {
+                                         ret.push_back(std::string("arg") + std::to_string(i));
+                                       }
+                                       return ret;
+                                     })
+    .set_attr<std::string>("key_var_num_args", "num_args")
+    .set_attr<mxnet::FInferShape>("FInferShape", StackOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<-1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", StackOpForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_stack"})
+    .add_argument("data", "NDArray-or-Symbol[]", "List of arrays to stack")
+    .add_arguments(StackParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_stack)
-.set_num_inputs(1)
-.set_num_outputs([](const nnvm::NodeAttrs& attrs) {
-    const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
-    return static_cast<uint32_t>(param.num_args);
-  })
-.set_attr_parser(ParamParser<StackParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", StackOpBackward<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs([](const nnvm::NodeAttrs& attrs) {
+      const StackParam& param = dmlc::get<StackParam>(attrs.parsed);
+      return static_cast<uint32_t>(param.num_args);
+    })
+    .set_attr_parser(ParamParser<StackParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", StackOpBackward<cpu>);
 
 NNVM_REGISTER_OP(squeeze)
-.describe(R"code(Remove single-dimensional entries from the shape of an array.
+    .describe(R"code(Remove single-dimensional entries from the shape of an array.
 Same behavior of defining the output tensor shape as numpy.squeeze for the most of cases.
 See the following note for exception.
 Examples::
@@ -967,29 +981,29 @@ Examples::
 .. note:: The output of this operator will keep at least one dimension not removed. For example,
   squeeze([[[4]]]) = [4], while in numpy.squeeze, the output will become a scalar.
 )code")
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SqueezeParam>)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", SqueezeShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_squeeze"})
-.add_argument("data", "NDArray-or-Symbol", "data to squeeze")
-.add_arguments(SqueezeParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SqueezeParam>)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", SqueezeShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_backward_squeeze"})
+    .add_argument("data", "NDArray-or-Symbol", "data to squeeze")
+    .add_arguments(SqueezeParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_squeeze)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<SqueezeParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>);
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<SqueezeParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", UnaryOp::IdentityCompute<cpu>);
 
 NNVM_REGISTER_OP(depth_to_space)
-.describe(R"code(Rearranges(permutes) data from depth into blocks of spatial data.
+    .describe(R"code(Rearranges(permutes) data from depth into blocks of spatial data.
 Similar to ONNX DepthToSpace operator:
 https://github.com/onnx/onnx/blob/master/docs/Operators.md#user-content-depthtospace.
 The output is a new tensor where the values from depth dimension are moved in spatial blocks
@@ -1021,27 +1035,27 @@ Example::
                             [15, 21, 16, 22, 17, 23]]]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<DepthToSpaceParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", DepthToSpaceOpShape)
-.set_attr<nnvm::FInferType>("FInferType", DepthToSpaceOpType)
-.set_attr<FCompute>("FCompute<cpu>", DepthToSpaceOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"space_to_depth"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(DepthToSpaceParam::__FIELDS__());
+    .set_attr_parser(ParamParser<DepthToSpaceParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", DepthToSpaceOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", DepthToSpaceOpType)
+    .set_attr<FCompute>("FCompute<cpu>", DepthToSpaceOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"space_to_depth"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(DepthToSpaceParam::__FIELDS__());
 
 NNVM_REGISTER_OP(space_to_depth)
-.describe(R"code(Rearranges(permutes) blocks of spatial data into depth.
+    .describe(R"code(Rearranges(permutes) blocks of spatial data into depth.
 Similar to ONNX SpaceToDepth operator:
 https://github.com/onnx/onnx/blob/master/docs/Operators.md#user-content-spacetodepth
 The output is a new tensor where the values from height and width dimension are
@@ -1072,29 +1086,29 @@ Example::
                             [21, 22, 23]]]]
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<DepthToSpaceParam>)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", SpaceToDepthOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SpaceToDepthOpType)
-.set_attr<FCompute>("FCompute<cpu>", SpaceToDepthOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"depth_to_space"})
-.add_argument("data", "NDArray-or-Symbol", "Input ndarray")
-.add_arguments(DepthToSpaceParam::__FIELDS__());
+    .set_attr_parser(ParamParser<DepthToSpaceParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", SpaceToDepthOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SpaceToDepthOpType)
+    .set_attr<FCompute>("FCompute<cpu>", SpaceToDepthOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"depth_to_space"})
+    .add_argument("data", "NDArray-or-Symbol", "Input ndarray")
+    .add_arguments(DepthToSpaceParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_split_v2)
-.add_alias("_npi_split")
-.add_alias("_npi_array_split")
-.describe(R"code(Splits an array along a particular axis into multiple sub-arrays.
+    .add_alias("_npi_split")
+    .add_alias("_npi_array_split")
+    .describe(R"code(Splits an array along a particular axis into multiple sub-arrays.
 Example::
 
    x  = [[[ 1.]
@@ -1146,36 +1160,35 @@ Example::
    z[0].shape = (2, 1)
 
 )code" ADD_FILELINE)
-.set_attr_parser(ParamParser<SplitParam>)
-.set_num_inputs(1)
-.set_num_outputs(SplitNumOutputs)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", SplitOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SplitOpType)
-.set_attr<FCompute>("FCompute<cpu>", SplitOpForward<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_split_v2_backward"})
-.add_argument("data", "NDArray-or-Symbol", "The input")
-.add_arguments(SplitParam::__FIELDS__());
+    .set_attr_parser(ParamParser<SplitParam>)
+    .set_num_inputs(1)
+    .set_num_outputs(SplitNumOutputs)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", SplitOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SplitOpType)
+    .set_attr<FCompute>("FCompute<cpu>", SplitOpForward<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseNone{"_split_v2_backward"})
+    .add_argument("data", "NDArray-or-Symbol", "The input")
+    .add_arguments(SplitParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_split_v2_backward)
-.set_attr_parser(ParamParser<SplitParam>)
-.set_num_inputs(SplitNumOutputs)
-.set_num_outputs(1)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& n) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-})
-.set_attr<FCompute>("FCompute<cpu>", SplitOpBackward<cpu>);
-
+    .set_attr_parser(ParamParser<SplitParam>)
+    .set_num_inputs(SplitNumOutputs)
+    .set_num_outputs(1)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& n) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<FCompute>("FCompute<cpu>", SplitOpBackward<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/matrix_op.cu b/src/operator/tensor/matrix_op.cu
index d5e17da0c41b..9e1c64435005 100644
--- a/src/operator/tensor/matrix_op.cu
+++ b/src/operator/tensor/matrix_op.cu
@@ -26,7 +26,6 @@
 #include "./matrix_op-inl.h"
 #include "./elemwise_unary_op.h"
 
-
 namespace mxnet {
 namespace op {
 
@@ -43,17 +42,18 @@ struct SliceMarkCsrIndPtr {
    * \param begin_col   starting indice
    * \param end_col     ending indice
    */
-  template<typename IType, typename RType>
+  template <typename IType, typename RType>
   MSHADOW_XINLINE static void Map(int i,
                                   RType* prefix_sum,
                                   const IType* in_idx,
                                   const RType* in_indptr,
-                                  const int begin_col, const int end_col) {
+                                  const int begin_col,
+                                  const int end_col) {
     if (i == 0) {
       prefix_sum[0] = 0;
     }
     RType size = 0;
-    for (RType j = in_indptr[i]; j < in_indptr[i+1]; j++) {
+    for (RType j = in_indptr[i]; j < in_indptr[i + 1]; j++) {
       // indices of CSRNDArray are in ascending order per row
       if (in_idx[j] >= end_col) {
         break;
@@ -61,19 +61,21 @@ struct SliceMarkCsrIndPtr {
         size++;
       }
     }
-    prefix_sum[i+1] = size;
+    prefix_sum[i + 1] = size;
   }
 };
 
-
-template<>
-void SliceDimTwoCsrImpl<gpu>(const mxnet::TShape &begin, const mxnet::TShape &end,
-                             const OpContext& ctx, const NDArray &in, const NDArray &out) {
+template <>
+void SliceDimTwoCsrImpl<gpu>(const mxnet::TShape& begin,
+                             const mxnet::TShape& end,
+                             const OpContext& ctx,
+                             const NDArray& in,
+                             const NDArray& out) {
   using namespace mshadow;
   using namespace mxnet_op;
   using namespace csr;
 
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  Stream<gpu>* s = ctx.get_stream<gpu>();
 
   nnvm::dim_t begin_row = begin[0], end_row = end[0];
   nnvm::dim_t begin_col = begin[1], end_col = end[1];
@@ -83,18 +85,15 @@ void SliceDimTwoCsrImpl<gpu>(const mxnet::TShape &begin, const mxnet::TShape &en
   MSHADOW_IDX_TYPE_SWITCH(in.aux_type(kIndPtr), RType, {
     MSHADOW_IDX_TYPE_SWITCH(in.aux_type(kIdx), IType, {
       MSHADOW_TYPE_SWITCH(in.dtype(), DType, {
-        RType *in_indptr = in.aux_data(kIndPtr).dptr<RType>();
-        IType *in_idx = in.aux_data(kIdx).dptr<IType>();
-        DType *in_data = in.data().dptr<DType>();
-
-        RType *out_indptr = out.aux_data(kIndPtr).dptr<RType>();
-
-        Kernel<SliceMarkCsrIndPtr, gpu>::Launch(s, indptr_len - 1,
-                                                out_indptr,
-                                                in_idx,
-                                                in_indptr + begin_row,
-                                                begin_col, end_col);
-        void* d_temp_storage = nullptr;
+        RType* in_indptr = in.aux_data(kIndPtr).dptr<RType>();
+        IType* in_idx    = in.aux_data(kIdx).dptr<IType>();
+        DType* in_data   = in.data().dptr<DType>();
+
+        RType* out_indptr = out.aux_data(kIndPtr).dptr<RType>();
+
+        Kernel<SliceMarkCsrIndPtr, gpu>::Launch(
+            s, indptr_len - 1, out_indptr, in_idx, in_indptr + begin_row, begin_col, end_col);
+        void* d_temp_storage      = nullptr;
         size_t temp_storage_bytes = 0;
         cub::DeviceScan::InclusiveSum(d_temp_storage,
                                       temp_storage_bytes,
@@ -102,8 +101,8 @@ void SliceDimTwoCsrImpl<gpu>(const mxnet::TShape &begin, const mxnet::TShape &en
                                       out_indptr,
                                       indptr_len,
                                       Stream<gpu>::GetStream(s));
-        Tensor<gpu, 1, char> workspace = ctx.requested[0]
-            .get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
+        Tensor<gpu, 1, char> workspace =
+            ctx.requested[0].get_space_typed<gpu, 1, char>(Shape1(temp_storage_bytes), s);
         d_temp_storage = workspace.dptr_;
 
         cub::DeviceScan::InclusiveSum(d_temp_storage,
@@ -114,8 +113,11 @@ void SliceDimTwoCsrImpl<gpu>(const mxnet::TShape &begin, const mxnet::TShape &en
                                       Stream<gpu>::GetStream(s));
         // retrieve nnr
         RType nnr = 0;
-        CUDA_CALL(cudaMemcpyAsync(&nnr, &out_indptr[indptr_len-1], sizeof(RType),
-                                  cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
+        CUDA_CALL(cudaMemcpyAsync(&nnr,
+                                  &out_indptr[indptr_len - 1],
+                                  sizeof(RType),
+                                  cudaMemcpyDeviceToHost,
+                                  mshadow::Stream<gpu>::GetStream(s)));
         CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
 
         // returns zeros in csr format if nnr = 0
@@ -125,13 +127,19 @@ void SliceDimTwoCsrImpl<gpu>(const mxnet::TShape &begin, const mxnet::TShape &en
         }
         out.CheckAndAllocAuxData(kIdx, Shape1(nnr));
         out.CheckAndAllocData(Shape1(nnr));
-        IType *out_idx = out.aux_data(kIdx).dptr<IType>();
-        DType *out_data = out.data().dptr<DType>();
-
-        Kernel<SliceDimTwoCsrAssign, gpu>::Launch(s, indptr_len - 1, out_idx, out_data,
-                                                  out_indptr, in_idx, in_data,
+        IType* out_idx  = out.aux_data(kIdx).dptr<IType>();
+        DType* out_data = out.data().dptr<DType>();
+
+        Kernel<SliceDimTwoCsrAssign, gpu>::Launch(s,
+                                                  indptr_len - 1,
+                                                  out_idx,
+                                                  out_data,
+                                                  out_indptr,
+                                                  in_idx,
+                                                  in_data,
                                                   in_indptr + begin_row,
-                                                  begin_col, end_col);
+                                                  begin_col,
+                                                  end_col);
       });
     });
   });
@@ -142,7 +150,7 @@ struct split_tensor_data {
   static const int MaxSections = 128;
   size_t num_sections;
   DType* outputs[MaxSections];
-  size_t indices[MaxSections+1];
+  size_t indices[MaxSections + 1];
   DType* inputs[1];
 };
 
@@ -153,51 +161,49 @@ __global__ void split_tensor_kernel(size_t input_size,
                                     size_t tail_size,
                                     size_t last_axis_size,
                                     size_t blocks_last_axis) {
-  const int entries_per_load = sizeof(LType)/sizeof(DType);
-  const LType* in_aligned = reinterpret_cast<const LType*>(params.inputs[0]);
-  const size_t last_axis_size_aligned = entries_per_load > 0 ?
-                                        last_axis_size / entries_per_load : last_axis_size;
+  const int entries_per_load = sizeof(LType) / sizeof(DType);
+  const LType* in_aligned    = reinterpret_cast<const LType*>(params.inputs[0]);
+  const size_t last_axis_size_aligned =
+      entries_per_load > 0 ? last_axis_size / entries_per_load : last_axis_size;
   if (split_last_axis) {
     size_t input_offset_leading = (blockIdx.x / blocks_last_axis) * last_axis_size_aligned;
-    size_t position_last_axis = (blockIdx.x % blocks_last_axis) * blockDim.x * entries_per_load +
-                                 params.indices[0] + threadIdx.x * entries_per_load;
+    size_t position_last_axis   = (blockIdx.x % blocks_last_axis) * blockDim.x * entries_per_load +
+                                params.indices[0] + threadIdx.x * entries_per_load;
     if (position_last_axis < params.indices[params.num_sections]) {
-      size_t position_last_axis_aligned = entries_per_load > 0 ?
-                                          position_last_axis / entries_per_load :
-                                          position_last_axis;
+      size_t position_last_axis_aligned =
+          entries_per_load > 0 ? position_last_axis / entries_per_load : position_last_axis;
       LType input_data = in_aligned[input_offset_leading + position_last_axis_aligned];
       // Binary search to find section of each thread
       size_t lower = 0;
       size_t upper = params.num_sections - 1;
       while (lower < upper) {
         size_t mid = (lower + upper + 1) / 2;
-        if (position_last_axis >=  params.indices[mid])
+        if (position_last_axis >= params.indices[mid])
           lower = mid;
         else
           upper = mid - 1;
       }
-      size_t section = upper;
+      size_t section      = upper;
       size_t section_size = params.indices[section + 1] - params.indices[section];
-      LType* out_aligned = reinterpret_cast<LType*>(params.outputs[section]);
-      size_t section_size_aligned = entries_per_load > 0 ? section_size / entries_per_load :
-                                                           section_size;
-      size_t index_aligned = entries_per_load > 0 ? params.indices[section] / entries_per_load :
-                                                    params.indices[section];
+      LType* out_aligned  = reinterpret_cast<LType*>(params.outputs[section]);
+      size_t section_size_aligned =
+          entries_per_load > 0 ? section_size / entries_per_load : section_size;
+      size_t index_aligned = entries_per_load > 0 ? params.indices[section] / entries_per_load
+                                                  : params.indices[section];
       size_t output_offset_leading = (blockIdx.x / blocks_last_axis) * section_size_aligned;
       size_t output_position = output_offset_leading + position_last_axis_aligned - index_aligned;
       out_aligned[output_position] = input_data;
     }
   } else {
-    size_t split_axis_size_iter = params.indices[params.num_sections] - params.indices[0];
+    size_t split_axis_size_iter   = params.indices[params.num_sections] - params.indices[0];
     size_t blocks_per_leading_dim = (split_axis_size_iter * tail_size * blocks_last_axis);
     // input offsets: leading (axes pre-split-axis), at split-axis, tail, and blocks_last_axis
-    size_t input_offset_leading = (blockIdx.x / blocks_per_leading_dim) *
-                                   split_axis_size * tail_size * last_axis_size_aligned;
-    size_t pos_in_split_axis = (blockIdx.x / (tail_size * blocks_last_axis)) %
-                               split_axis_size_iter + params.indices[0];
+    size_t input_offset_leading = (blockIdx.x / blocks_per_leading_dim) * split_axis_size *
+                                  tail_size * last_axis_size_aligned;
+    size_t pos_in_split_axis =
+        (blockIdx.x / (tail_size * blocks_last_axis)) % split_axis_size_iter + params.indices[0];
     size_t input_offset_split_axis = pos_in_split_axis * tail_size * last_axis_size_aligned;
-    size_t offset_tail = ((blockIdx.x / blocks_last_axis) % tail_size) *
-                         last_axis_size_aligned;
+    size_t offset_tail  = ((blockIdx.x / blocks_last_axis) % tail_size) * last_axis_size_aligned;
     size_t input_offset = input_offset_leading + input_offset_split_axis + offset_tail +
                           (blockIdx.x % blocks_last_axis) * blockDim.x;
     // Binary search to find section for this block
@@ -205,24 +211,25 @@ __global__ void split_tensor_kernel(size_t input_size,
     size_t upper = params.num_sections - 1;
     while (lower < upper) {
       size_t mid = (lower + upper + 1) / 2;
-      if (pos_in_split_axis >=  params.indices[mid])
+      if (pos_in_split_axis >= params.indices[mid])
         lower = mid;
       else
         upper = mid - 1;
     }
-    size_t section = upper;
+    size_t section      = upper;
     size_t section_size = params.indices[section + 1] - params.indices[section];
-    LType* out_aligned = reinterpret_cast<LType*>(params.outputs[section]);
+    LType* out_aligned  = reinterpret_cast<LType*>(params.outputs[section]);
     // output offsets: leading (axes pre-split-axis), at split-axis,and blocks_last_axis
-    size_t output_offset_leading = (blockIdx.x / blocks_per_leading_dim) *
-                                   section_size * tail_size * last_axis_size_aligned;
-    size_t output_offset_split_axis = ((blockIdx.x % blocks_per_leading_dim) / blocks_last_axis -
-                                      ((params.indices[section] - params.indices[0]) * tail_size)) *
-                                      last_axis_size_aligned;
+    size_t output_offset_leading =
+        (blockIdx.x / blocks_per_leading_dim) * section_size * tail_size * last_axis_size_aligned;
+    size_t output_offset_split_axis =
+        ((blockIdx.x % blocks_per_leading_dim) / blocks_last_axis -
+         ((params.indices[section] - params.indices[0]) * tail_size)) *
+        last_axis_size_aligned;
     size_t output_offset = output_offset_leading + output_offset_split_axis +
                            (blockIdx.x % blocks_last_axis) * blockDim.x;
     if (threadIdx.x < last_axis_size_aligned) {
-      LType input_data = in_aligned[input_offset + threadIdx.x];
+      LType input_data                         = in_aligned[input_offset + threadIdx.x];
       out_aligned[output_offset + threadIdx.x] = input_data;
     }
   }
@@ -237,7 +244,7 @@ int get_load_type_split(size_t last_axis_size,
   int sections_largest_multiple = 8;
   if (splitting_last_axis) {
     for (size_t i = 0; i < n_sections; ++i) {
-      size_t size_section = indices[i+1] - indices[i];
+      size_t size_section = indices[i + 1] - indices[i];
       if (size_section * sizeof(DType) % 8)
         sections_largest_multiple = std::min(sections_largest_multiple, 4);
       if (size_section * sizeof(DType) % 4)
@@ -258,10 +265,10 @@ int get_load_type_split(size_t last_axis_size,
 }
 
 inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
-                           const OpContext& ctx,
-                           const std::vector<TBlob>& inputs,
-                           const std::vector<OpReqType>& req,
-                           const std::vector<TBlob>& outputs) {
+                              const OpContext& ctx,
+                              const std::vector<TBlob>& inputs,
+                              const std::vector<OpReqType>& req,
+                              const std::vector<TBlob>& outputs) {
   using namespace mshadow;
   using namespace mshadow::expr;
   using namespace mxnet_op;
@@ -269,25 +276,25 @@ inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), (param.sections > 0) ? param.sections : param.indices.ndim());
   const TBlob& input_data = inputs[split_enum::kData];
-  int real_axis = param.axis;
+  int real_axis           = param.axis;
   if (real_axis < 0) {
     real_axis += input_data.ndim();
   }
-  size_t last_axis_size = input_data.shape_[inputs[0].ndim()-1];
+  size_t last_axis_size  = input_data.shape_[inputs[0].ndim() - 1];
   size_t split_axis_size = input_data.shape_[real_axis];
-  size_t tail_size = 1;  // does not include last dim
-  for (int i = real_axis + 1; i < input_data.ndim()-1; ++i) {
+  size_t tail_size       = 1;  // does not include last dim
+  for (int i = real_axis + 1; i < input_data.ndim() - 1; ++i) {
     tail_size *= input_data.shape_[i];
   }
   if (last_axis_size < 128) {
     // custom kernel will not be efficient with less than 128 elemnts in last axis
     SplitOpForwardImpl<gpu>(attrs, ctx, inputs, req, outputs, real_axis);
   } else {
-    Stream<gpu> *s = ctx.get_stream<gpu>();
+    Stream<gpu>* s = ctx.get_stream<gpu>();
     CHECK_LT(real_axis, input_data.ndim());
     const mxnet::TShape& ishape = input_data.shape_;
     const mxnet::TShape split_pts =
-      (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
+        (param.sections > 0) ? GetSplitIndices(ishape, real_axis, param.sections) : param.indices;
     std::vector<size_t> indices;
     for (const auto& split_pos : split_pts) {
       indices.push_back(split_pos);
@@ -295,7 +302,7 @@ inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
     if (param.sections == 0) {
       indices.push_back(ishape[real_axis]);
     }
-    size_t n_sections = indices.size() - 1;
+    size_t n_sections        = indices.size() - 1;
     bool splitting_last_axis = (real_axis == inputs[0].ndim() - 1);
 
     for (size_t sections_processed = 0; sections_processed < n_sections;) {
@@ -304,7 +311,7 @@ inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
         // set parameters
         split_tensor_data<DType> params{};
         params.num_sections = std::min<size_t>(remaining_sections, params.MaxSections);
-        params.inputs[0] = input_data.dptr<DType>();
+        params.inputs[0]    = input_data.dptr<DType>();
         for (size_t i = 0; i < params.num_sections; ++i) {
           params.outputs[i] = outputs[sections_processed + i].dptr<DType>();
           params.indices[i] = indices[sections_processed + i];
@@ -312,25 +319,28 @@ inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
         params.indices[params.num_sections] = indices[sections_processed + params.num_sections];
         // load type: we need to check that last axis size is multiple of ltype
         // and if splitting_last_axis, all section sizes as well
-        int ltype = get_load_type_split<DType>(last_axis_size, splitting_last_axis,
-                                               params.num_sections, params.indices);
+        int ltype = get_load_type_split<DType>(
+            last_axis_size, splitting_last_axis, params.num_sections, params.indices);
         MXNET_LOAD_TYPE_SWITCH(ltype, LType, {
           CHECK_LE(sizeof(DType), sizeof(LType));
           const size_t entries_per_load = sizeof(LType) / sizeof(DType);
-          size_t block_size = 32;
-          size_t max_threads_block = 256;
-          size_t last_axis_elements = entries_per_load > 0 ? (last_axis_size / entries_per_load): 0;
+          size_t block_size             = 32;
+          size_t max_threads_block      = 256;
+          size_t last_axis_elements =
+              entries_per_load > 0 ? (last_axis_size / entries_per_load) : 0;
           if (splitting_last_axis) {
             // may not be possible to include whole axis if too many sections
-            last_axis_elements = entries_per_load > 0 ?
-                ((params.indices[params.num_sections] - params.indices[0]) / entries_per_load): 0;
+            last_axis_elements =
+                entries_per_load > 0
+                    ? ((params.indices[params.num_sections] - params.indices[0]) / entries_per_load)
+                    : 0;
           }
           while (block_size < last_axis_elements && (block_size < max_threads_block)) {
             block_size += 32;
           }
           size_t blocks_last_axis = (last_axis_elements + block_size - 1) / block_size;
-          size_t n_blocks = blocks_last_axis;
-          for (int i = 0 ; i < input_data.ndim() - 1; ++i) {
+          size_t n_blocks         = blocks_last_axis;
+          for (int i = 0; i < input_data.ndim() - 1; ++i) {
             if (i == real_axis) {
               // may not be possible to include all sections if too many
               n_blocks *= (params.indices[params.num_sections] - params.indices[0]);
@@ -339,13 +349,21 @@ inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
             }
           }
           if (splitting_last_axis) {
-            split_tensor_kernel<true, LType><<<n_blocks, block_size, 0, s->stream_>>>
-              (input_data.Size(), params, split_axis_size, tail_size,
-               last_axis_size, blocks_last_axis);
+            split_tensor_kernel<true, LType>
+                <<<n_blocks, block_size, 0, s->stream_>>>(input_data.Size(),
+                                                          params,
+                                                          split_axis_size,
+                                                          tail_size,
+                                                          last_axis_size,
+                                                          blocks_last_axis);
           } else {
-            split_tensor_kernel<false, LType><<<n_blocks, block_size, 0, s->stream_>>>
-              (input_data.Size(), params, split_axis_size, tail_size,
-               last_axis_size, blocks_last_axis);
+            split_tensor_kernel<false, LType>
+                <<<n_blocks, block_size, 0, s->stream_>>>(input_data.Size(),
+                                                          params,
+                                                          split_axis_size,
+                                                          tail_size,
+                                                          last_axis_size,
+                                                          blocks_last_axis);
           }
         });
         sections_processed += params.num_sections;
@@ -354,91 +372,67 @@ inline void SplitOpForwardGPU(const nnvm::NodeAttrs& attrs,
   }
 }
 
-NNVM_REGISTER_OP(Reshape)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(Reshape).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(Flatten)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(Flatten).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(transpose)
-.set_attr<FCompute>("FCompute<gpu>", Transpose<gpu>);
+NNVM_REGISTER_OP(transpose).set_attr<FCompute>("FCompute<gpu>", Transpose<gpu>);
 
-NNVM_REGISTER_OP(expand_dims)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(expand_dims).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 NNVM_REGISTER_OP(slice)
-.set_attr<FCompute>("FCompute<gpu>", SliceOpForward<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SliceEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SliceOpForward<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SliceEx<gpu>);
 
-NNVM_REGISTER_OP(_backward_slice)
-.set_attr<FCompute>("FCompute<gpu>", SliceOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_slice).set_attr<FCompute>("FCompute<gpu>", SliceOpBackward<gpu>);
 
-NNVM_REGISTER_OP(_slice_assign)
-.set_attr<FCompute>("FCompute<gpu>", SliceAssignOpForward<gpu>);
+NNVM_REGISTER_OP(_slice_assign).set_attr<FCompute>("FCompute<gpu>", SliceAssignOpForward<gpu>);
 
 NNVM_REGISTER_OP(_slice_assign_scalar)
-.set_attr<FCompute>("FCompute<gpu>", SliceAssignScalarOpForward<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", SliceAssignScalarOpForward<gpu>);
 
-NNVM_REGISTER_OP(slice_axis)
-.set_attr<FCompute>("FCompute<gpu>", SliceAxis<gpu>);
+NNVM_REGISTER_OP(slice_axis).set_attr<FCompute>("FCompute<gpu>", SliceAxis<gpu>);
 
-NNVM_REGISTER_OP(_backward_slice_axis)
-.set_attr<FCompute>("FCompute<gpu>", SliceAxisGrad_<gpu>);
+NNVM_REGISTER_OP(_backward_slice_axis).set_attr<FCompute>("FCompute<gpu>", SliceAxisGrad_<gpu>);
 
-NNVM_REGISTER_OP(slice_like)
-.set_attr<FCompute>("FCompute<gpu>", SliceLikeForward<gpu>);
+NNVM_REGISTER_OP(slice_like).set_attr<FCompute>("FCompute<gpu>", SliceLikeForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_slice_like)
-.set_attr<FCompute>("FCompute<gpu>", SliceLikeBackward<gpu>);
+NNVM_REGISTER_OP(_backward_slice_like).set_attr<FCompute>("FCompute<gpu>", SliceLikeBackward<gpu>);
 
 NNVM_REGISTER_OP(clip)
-.set_attr<FCompute>("FCompute<gpu>", Clip<gpu>)
-.set_attr<FComputeEx>("FComputeEx<gpu>", ClipEx<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", Clip<gpu>)
+    .set_attr<FComputeEx>("FComputeEx<gpu>", ClipEx<gpu>);
 
-NNVM_REGISTER_OP(_backward_clip)
-.set_attr<FCompute>("FCompute<gpu>", ClipGrad_<gpu>);
+NNVM_REGISTER_OP(_backward_clip).set_attr<FCompute>("FCompute<gpu>", ClipGrad_<gpu>);
 
-NNVM_REGISTER_OP(repeat)
-.set_attr<FCompute>("FCompute<gpu>", RepeatOpForward<gpu>);
+NNVM_REGISTER_OP(repeat).set_attr<FCompute>("FCompute<gpu>", RepeatOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_repeat)
-.set_attr<FCompute>("FCompute<gpu>", RepeatOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_repeat).set_attr<FCompute>("FCompute<gpu>", RepeatOpBackward<gpu>);
 
-NNVM_REGISTER_OP(tile)
-.set_attr<FCompute>("FCompute<gpu>", TileOpForward<gpu>);
+NNVM_REGISTER_OP(tile).set_attr<FCompute>("FCompute<gpu>", TileOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_tile)
-.set_attr<FCompute>("FCompute<gpu>", TileOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_tile).set_attr<FCompute>("FCompute<gpu>", TileOpBackward<gpu>);
 
-NNVM_REGISTER_OP(reverse)
-.set_attr<FCompute>("FCompute<gpu>", ReverseOpForward<gpu>);
+NNVM_REGISTER_OP(reverse).set_attr<FCompute>("FCompute<gpu>", ReverseOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_reverse)
-.set_attr<FCompute>("FCompute<gpu>", ReverseOpForward<gpu>);
+NNVM_REGISTER_OP(_backward_reverse).set_attr<FCompute>("FCompute<gpu>", ReverseOpForward<gpu>);
 
-NNVM_REGISTER_OP(stack)
-.set_attr<FCompute>("FCompute<gpu>", StackOpForward<gpu>);
+NNVM_REGISTER_OP(stack).set_attr<FCompute>("FCompute<gpu>", StackOpForward<gpu>);
 
-NNVM_REGISTER_OP(_backward_stack)
-.set_attr<FCompute>("FCompute<gpu>", StackOpBackward<gpu>);
+NNVM_REGISTER_OP(_backward_stack).set_attr<FCompute>("FCompute<gpu>", StackOpBackward<gpu>);
 
-NNVM_REGISTER_OP(squeeze)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+NNVM_REGISTER_OP(squeeze).set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
 NNVM_REGISTER_OP(_backward_squeeze)
-.set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
+    .set_attr<FCompute>("FCompute<gpu>", UnaryOp::IdentityCompute<gpu>);
 
-NNVM_REGISTER_OP(depth_to_space)
-.set_attr<FCompute>("FCompute<gpu>", DepthToSpaceOpForward<gpu>);
+NNVM_REGISTER_OP(depth_to_space).set_attr<FCompute>("FCompute<gpu>", DepthToSpaceOpForward<gpu>);
 
-NNVM_REGISTER_OP(space_to_depth)
-.set_attr<FCompute>("FCompute<gpu>", SpaceToDepthOpForward<gpu>);
+NNVM_REGISTER_OP(space_to_depth).set_attr<FCompute>("FCompute<gpu>", SpaceToDepthOpForward<gpu>);
 
-NNVM_REGISTER_OP(_split_v2)
-.set_attr<FCompute>("FCompute<gpu>", SplitOpForwardGPU);
+NNVM_REGISTER_OP(_split_v2).set_attr<FCompute>("FCompute<gpu>", SplitOpForwardGPU);
 
-NNVM_REGISTER_OP(_split_v2_backward)
-.set_attr<FCompute>("FCompute<gpu>", SplitOpBackward<gpu>);
+NNVM_REGISTER_OP(_split_v2_backward).set_attr<FCompute>("FCompute<gpu>", SplitOpBackward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/ordering_op-inl.h b/src/operator/tensor/ordering_op-inl.h
index db8d0625949b..36691fee1f67 100644
--- a/src/operator/tensor/ordering_op-inl.h
+++ b/src/operator/tensor/ordering_op-inl.h
@@ -39,21 +39,20 @@
 #include "../../api/operator/op_utils.h"
 
 namespace mshadow {
-template<typename xpu, int src_dim, typename DType, int dst_dim>
+template <typename xpu, int src_dim, typename DType, int dst_dim>
 inline Tensor<xpu, dst_dim, DType> inplace_reshape(Tensor<xpu, src_dim, DType> src,
                                                    Shape<dst_dim> target_shape) {
   CHECK_EQ(src.CheckContiguous(), true);
   return Tensor<xpu, dst_dim, DType>(src.dptr_, target_shape, src.stream_);
 }
-};
-
+};  // namespace mshadow
 
 namespace mxnet {
 namespace op {
 // These enums are only visible within this header
 namespace topk_enum {
-enum TopKReturnType {kReturnValue, kReturnIndices, kReturnMask, kReturnBoth};
-}  // topk_enum
+enum TopKReturnType { kReturnValue, kReturnIndices, kReturnMask, kReturnBoth };
+}  // namespace topk_enum
 
 struct TopKParam : public dmlc::Parameter<TopKParam> {
   dmlc::optional<int> axis;
@@ -62,38 +61,43 @@ struct TopKParam : public dmlc::Parameter<TopKParam> {
   bool is_ascend;
   int dtype;
   DMLC_DECLARE_PARAMETER(TopKParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<int>(-1))
-    .describe("Axis along which to choose the top k indices."
-              " If not given, the flattened array is used. Default is -1.");
-    DMLC_DECLARE_FIELD(k).set_default(1)
-    .describe("Number of top elements to select,"
-              " should be always smaller than or equal to the element number in the given axis."
-              " A global sort is performed if set k < 1.");
-    DMLC_DECLARE_FIELD(ret_typ).set_default(topk_enum::kReturnIndices)
-    .add_enum("value", topk_enum::kReturnValue)
-    .add_enum("indices", topk_enum::kReturnIndices)
-    .add_enum("mask", topk_enum::kReturnMask)
-    .add_enum("both", topk_enum::kReturnBoth)
-    .describe("The return type.\n"
-        " \"value\" means to return the top k values,"
-        " \"indices\" means to return the indices of the top k values,"
-        " \"mask\" means to return a mask array containing 0 and 1. 1 means the top k values."
-        " \"both\" means to return a list of both values and indices of top k elements.");
-    DMLC_DECLARE_FIELD(is_ascend).set_default(false)
-      .describe("Whether to choose k largest or k smallest elements."
-                " Top K largest elements will be chosen if set to false.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<int>(-1))
+        .describe(
+            "Axis along which to choose the top k indices."
+            " If not given, the flattened array is used. Default is -1.");
+    DMLC_DECLARE_FIELD(k).set_default(1).describe(
+        "Number of top elements to select,"
+        " should be always smaller than or equal to the element number in the given axis."
+        " A global sort is performed if set k < 1.");
+    DMLC_DECLARE_FIELD(ret_typ)
+        .set_default(topk_enum::kReturnIndices)
+        .add_enum("value", topk_enum::kReturnValue)
+        .add_enum("indices", topk_enum::kReturnIndices)
+        .add_enum("mask", topk_enum::kReturnMask)
+        .add_enum("both", topk_enum::kReturnBoth)
+        .describe(
+            "The return type.\n"
+            " \"value\" means to return the top k values,"
+            " \"indices\" means to return the indices of the top k values,"
+            " \"mask\" means to return a mask array containing 0 and 1. 1 means the top k values."
+            " \"both\" means to return a list of both values and indices of top k elements.");
+    DMLC_DECLARE_FIELD(is_ascend).set_default(false).describe(
+        "Whether to choose k largest or k smallest elements."
+        " Top K largest elements will be chosen if set to false.");
     DMLC_DECLARE_FIELD(dtype)
-    // TODO(srivrohi): remove support for real data type in mxnet-2.0
-    .add_enum("uint8", mshadow::kUint8)
-    .add_enum("int32", mshadow::kInt32)
-    .add_enum("int64", mshadow::kInt64)
-    .add_enum("float16", mshadow::kFloat16)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .set_default(mshadow::kFloat32)
-    .describe("DType of the output indices when ret_typ is \"indices\" or \"both\". "
-              "An error will be raised if the selected data type cannot precisely represent the "
-              "indices.");
+        // TODO(srivrohi): remove support for real data type in mxnet-2.0
+        .add_enum("uint8", mshadow::kUint8)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int64", mshadow::kInt64)
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .set_default(mshadow::kFloat32)
+        .describe(
+            "DType of the output indices when ret_typ is \"indices\" or \"both\". "
+            "An error will be raised if the selected data type cannot precisely represent the "
+            "indices.");
   }
   std::string ReturnType2String(int ret_typ) {
     switch (ret_typ) {
@@ -118,11 +122,11 @@ struct TopKParam : public dmlc::Parameter<TopKParam> {
     dtype_s << dtype;
     ret_typ_s << ret_typ;
     is_ascend_s << is_ascend;
-    (*dict)["axis"] = axis_s.str();
-    (*dict)["k"] = k_s.str();
-    (*dict)["ret_typ"] = ReturnType2String(ret_typ);
+    (*dict)["axis"]      = axis_s.str();
+    (*dict)["k"]         = k_s.str();
+    (*dict)["ret_typ"]   = ReturnType2String(ret_typ);
     (*dict)["is_ascend"] = is_ascend_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]     = MXNetTypeWithBool2String(dtype);
   }
 };
 
@@ -130,17 +134,19 @@ struct SortParam : public dmlc::Parameter<SortParam> {
   dmlc::optional<int> axis;
   bool is_ascend;
   DMLC_DECLARE_PARAMETER(SortParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<int>(-1))
-    .describe("Axis along which to choose sort the input tensor."
-              " If not given, the flattened array is used. Default is -1.");
-    DMLC_DECLARE_FIELD(is_ascend).set_default(true)
-      .describe("Whether to sort in ascending or descending order.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<int>(-1))
+        .describe(
+            "Axis along which to choose sort the input tensor."
+            " If not given, the flattened array is used. Default is -1.");
+    DMLC_DECLARE_FIELD(is_ascend).set_default(true).describe(
+        "Whether to sort in ascending or descending order.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, is_ascend_s;
     axis_s << axis;
     is_ascend_s << is_ascend;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]        = axis_s.str();
     (*dict)["is_ascend_s"] = is_ascend_s.str();
   }
 };
@@ -150,52 +156,55 @@ struct ArgSortParam : public dmlc::Parameter<ArgSortParam> {
   bool is_ascend;
   int dtype;
   DMLC_DECLARE_PARAMETER(ArgSortParam) {
-    DMLC_DECLARE_FIELD(axis).set_default(dmlc::optional<int>(-1))
-    .describe("Axis along which to sort the input tensor."
-              " If not given, the flattened array is used. Default is -1.");
-    DMLC_DECLARE_FIELD(is_ascend).set_default(true)
-      .describe("Whether to sort in ascending or descending order.");
+    DMLC_DECLARE_FIELD(axis)
+        .set_default(dmlc::optional<int>(-1))
+        .describe(
+            "Axis along which to sort the input tensor."
+            " If not given, the flattened array is used. Default is -1.");
+    DMLC_DECLARE_FIELD(is_ascend).set_default(true).describe(
+        "Whether to sort in ascending or descending order.");
     DMLC_DECLARE_FIELD(dtype)
-    // TODO(srivrohi): remove support for real data type in mxnet-2.0
-    .add_enum("uint8", mshadow::kUint8)
-    .add_enum("int32", mshadow::kInt32)
-    .add_enum("int64", mshadow::kInt64)
-    .add_enum("float16", mshadow::kFloat16)
-    .add_enum("float32", mshadow::kFloat32)
-    .add_enum("float64", mshadow::kFloat64)
-    .set_default(mshadow::kFloat32)
-    .describe("DType of the output indices. It is only valid when ret_typ is \"indices\" or"
-              " \"both\". An error will be raised if the selected data type cannot precisely "
-              "represent the indices.");
+        // TODO(srivrohi): remove support for real data type in mxnet-2.0
+        .add_enum("uint8", mshadow::kUint8)
+        .add_enum("int32", mshadow::kInt32)
+        .add_enum("int64", mshadow::kInt64)
+        .add_enum("float16", mshadow::kFloat16)
+        .add_enum("float32", mshadow::kFloat32)
+        .add_enum("float64", mshadow::kFloat64)
+        .set_default(mshadow::kFloat32)
+        .describe(
+            "DType of the output indices. It is only valid when ret_typ is \"indices\" or"
+            " \"both\". An error will be raised if the selected data type cannot precisely "
+            "represent the indices.");
   }
   void SetAttrDict(std::unordered_map<std::string, std::string>* dict) {
     std::ostringstream axis_s, is_ascend_s, dtype_s;
     axis_s << axis;
     is_ascend_s << is_ascend;
     dtype_s << dtype;
-    (*dict)["axis"] = axis_s.str();
+    (*dict)["axis"]        = axis_s.str();
     (*dict)["is_ascend_s"] = is_ascend_s.str();
-    (*dict)["dtype"] = MXNetTypeWithBool2String(dtype);
+    (*dict)["dtype"]       = MXNetTypeWithBool2String(dtype);
   }
 };
 
-template<typename IDXType = index_t>
+template <typename IDXType = index_t>
 inline void ParseTopKParam(const TShape& src_shape,
                            const TopKParam& param,
-                           TShape *target_shape,
-                           size_t *batch_size,
-                           IDXType *element_num,
-                           int *axis,
-                           IDXType *k,
-                           bool *do_transpose,
-                           bool *is_ascend) {
+                           TShape* target_shape,
+                           size_t* batch_size,
+                           IDXType* element_num,
+                           int* axis,
+                           IDXType* k,
+                           bool* do_transpose,
+                           bool* is_ascend) {
   *do_transpose = false;
-  *k = param.k;
-  *is_ascend = param.is_ascend;
+  *k            = param.k;
+  *is_ascend    = param.is_ascend;
   // get batch_size, axis and element_num
   if (!static_cast<bool>(param.axis)) {  // No axis given
-    *axis = 0;
-    *batch_size = 1;
+    *axis        = 0;
+    *batch_size  = 1;
     *element_num = src_shape.Size();
   } else {
     *axis = param.axis.value();
@@ -203,8 +212,8 @@ inline void ParseTopKParam(const TShape& src_shape,
       *axis += src_shape.ndim();
     }
     CHECK(*axis >= 0 && *axis < static_cast<int>(src_shape.ndim()))
-                                                  << "Invalid axis! axis should be between 0 and "
-                                                  << src_shape.ndim() << ", found axis=" << *axis;
+        << "Invalid axis! axis should be between 0 and " << src_shape.ndim()
+        << ", found axis=" << *axis;
     if (src_shape[*axis] != 0) {
       *batch_size = src_shape.Size() / src_shape[*axis];
     }
@@ -230,64 +239,70 @@ inline void ParseTopKParam(const TShape& src_shape,
       (*target_shape)[*axis] = *k;
     }
   }
-  CHECK(*k >= 0 && *k <= *element_num) << "k must be smaller than "
-                                      << *element_num << ", get k = " << *k;
+  CHECK(*k >= 0 && *k <= *element_num)
+      << "k must be smaller than " << *element_num << ", get k = " << *k;
 }
 
 using namespace mshadow;
 
-
 struct fill_ind_to_one {
-  template<typename DType, typename IDXType>
+  template <typename DType, typename IDXType>
   MSHADOW_XINLINE static void Map(index_t i, const IDXType* indices, DType* out) {
     out[indices[i]] = static_cast<DType>(1);
   }
 };
 
 struct fill_ind {
-  template<typename DType, typename IDXType>
-  MSHADOW_XINLINE static void Map(index_t i, const IDXType* indices, const DType* val,
-                                  int req, DType* out) {
+  template <typename DType, typename IDXType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  const IDXType* indices,
+                                  const DType* val,
+                                  int req,
+                                  DType* out) {
     KERNEL_ASSIGN(out[indices[i]], req, val[i]);
   }
 };
 
-template<typename DType, typename IDXType>
+template <typename DType, typename IDXType>
 MSHADOW_FORCE_INLINE void TopKSort(const Tensor<cpu, 1, DType>& dat,
                                    const Tensor<cpu, 1, IDXType>& ind,
                                    const Tensor<cpu, 1, char>& work,
-                                   IDXType K, IDXType N, bool is_ascend,
-                                   Stream<cpu> *s) {
+                                   IDXType K,
+                                   IDXType N,
+                                   bool is_ascend,
+                                   Stream<cpu>* s) {
   // Use full sort when K is relatively large.
-  const bool full_sort(K*8 > N);
+  const bool full_sort(K * 8 > N);
   // Batch size.
-  const size_t M(work.size(0)/(sizeof(DType)*N));
+  const size_t M(work.size(0) / (sizeof(DType) * N));
   const int omp_threads(engine::OpenMP::Get()->GetRecommendedOMPThreadCount());
-  #pragma omp parallel for num_threads(omp_threads)
+#pragma omp parallel for num_threads(omp_threads)
   for (index_t i = 0; i < static_cast<index_t>(M); ++i) {
     // Tensor `work` stores the flattened source data, while `dat` stores the sorted result.
-    DType *vals = reinterpret_cast<DType*>(work.dptr_);
-    DType *sorted_vals = dat.dptr_+i*N;
-    IDXType *indices = ind.dptr_+i*N;
+    DType* vals        = reinterpret_cast<DType*>(work.dptr_);
+    DType* sorted_vals = dat.dptr_ + i * N;
+    IDXType* indices   = ind.dptr_ + i * N;
     if (is_ascend) {
       if (full_sort) {
-        std::sort(indices, indices+N,
-                  [&](const IDXType& i1, const IDXType& i2){
-          return vals[i1] < vals[i2]; });
+        std::sort(indices, indices + N, [&](const IDXType& i1, const IDXType& i2) {
+          return vals[i1] < vals[i2];
+        });
       } else {
-        std::partial_sort(indices, indices+K, indices+N,
-                          [&](const IDXType& i1, const IDXType& i2){
-          return vals[i1] < vals[i2]; });
+        std::partial_sort(
+            indices, indices + K, indices + N, [&](const IDXType& i1, const IDXType& i2) {
+              return vals[i1] < vals[i2];
+            });
       }
     } else {
       if (full_sort) {
-        std::sort(indices, indices+N,
-                  [&](const IDXType& i1, const IDXType& i2){
-          return vals[i1] > vals[i2]; });
+        std::sort(indices, indices + N, [&](const IDXType& i1, const IDXType& i2) {
+          return vals[i1] > vals[i2];
+        });
       } else {
-        std::partial_sort(indices, indices+K, indices+N,
-                          [&](const IDXType& i1, const IDXType& i2){
-          return vals[i1] > vals[i2]; });
+        std::partial_sort(
+            indices, indices + K, indices + N, [&](const IDXType& i1, const IDXType& i2) {
+              return vals[i1] > vals[i2];
+            });
       }
     }
     for (IDXType j = 0; j < K; ++j) {
@@ -298,19 +313,26 @@ MSHADOW_FORCE_INLINE void TopKSort(const Tensor<cpu, 1, DType>& dat,
 
 #ifdef __CUDACC__
 
-template<typename DType, typename IDXType>
-MSHADOW_XINLINE bool TopKCompare(DType val1, IDXType ind1, DType val2, IDXType ind2,
+template <typename DType, typename IDXType>
+MSHADOW_XINLINE bool TopKCompare(DType val1,
+                                 IDXType ind1,
+                                 DType val2,
+                                 IDXType ind2,
                                  bool is_ascend) {
   // Negative indices denote undefined values which are considered arbitrary small resp. large.
   return (ind2 < 0) || (ind1 >= 0 && ((is_ascend && val1 < val2) || (!is_ascend && val1 > val2)));
 }
 
-template<typename DType, typename IDXType>
-MSHADOW_XINLINE void MergeTopK(IDXType K, DType *val1, IDXType *ind1, DType *val2, IDXType *ind2,
+template <typename DType, typename IDXType>
+MSHADOW_XINLINE void MergeTopK(IDXType K,
+                               DType* val1,
+                               IDXType* ind1,
+                               DType* val2,
+                               IDXType* ind2,
                                bool is_ascend) {
   // In-place merge of two sorted top-K lists into val1/ind1. First determine the intervals
   // [0,..,i1], [0,..i2] of the two lists that will be part of the merged list.
-  IDXType i1(K-1), i2(K-1);
+  IDXType i1(K - 1), i2(K - 1);
   for (IDXType i = 0; i < K; ++i) {
     if (TopKCompare(val1[i1], ind1[i1], val2[i2], ind2[i2], is_ascend)) {
       --i2;
@@ -332,17 +354,16 @@ MSHADOW_XINLINE void MergeTopK(IDXType K, DType *val1, IDXType *ind1, DType *val
   }
 }
 
-template<typename DType, typename IDXType>
-__global__ void PartialSortSmallK(IDXType K, IDXType N, DType *val, IDXType *ind, bool is_ascend) {
+template <typename DType, typename IDXType>
+__global__ void PartialSortSmallK(IDXType K, IDXType N, DType* val, IDXType* ind, bool is_ascend) {
   // Buffer for pairwise reduction.
   extern __shared__ __align__(sizeof(IDXType)) unsigned char temp_smem[];
-  IDXType *buff = reinterpret_cast<IDXType *>(temp_smem);
-
+  IDXType* buff = reinterpret_cast<IDXType*>(temp_smem);
 
   // Start of buffer sections associated with this thread.
-  const IDXType offset(threadIdx.x*K);
-  IDXType *ind_buff = reinterpret_cast<IDXType*>(&buff[offset]);
-  DType *val_buff = reinterpret_cast<DType*>(&buff[blockDim.x*K])+offset;
+  const IDXType offset(threadIdx.x * K);
+  IDXType* ind_buff = reinterpret_cast<IDXType*>(&buff[offset]);
+  DType* val_buff   = reinterpret_cast<DType*>(&buff[blockDim.x * K]) + offset;
   // Initialize top-K values for this thread.
   for (IDXType i = 0; i < K; ++i) {
     ind_buff[i] = -1;
@@ -351,17 +372,17 @@ __global__ void PartialSortSmallK(IDXType K, IDXType N, DType *val, IDXType *ind
   // a different batch item (i.e. a different set of ind/val where we
   // have to select the top-K elements). All threads within the same
   // block work on the same batch item.
-  const IDXType first(blockIdx.x*N+threadIdx.x), last((blockIdx.x+1)*N);
+  const IDXType first(blockIdx.x * N + threadIdx.x), last((blockIdx.x + 1) * N);
   // Select top-K from this range and store it sorted in the buffer.
   // We assume a small K, so linear insertion is o.k.
   for (IDXType i = first; i < last; i += blockDim.x) {
     DType cur_val(val[i]);
     IDXType cur_ind(ind[i]);
-    for (IDXType j = K; j-- && TopKCompare(cur_val, cur_ind, val_buff[j],
-                                           ind_buff[j], is_ascend); ) {
-      if (j+1 < K) {
-        val_buff[j+1] = val_buff[j];
-        ind_buff[j+1] = ind_buff[j];
+    for (IDXType j = K;
+         j-- && TopKCompare(cur_val, cur_ind, val_buff[j], ind_buff[j], is_ascend);) {
+      if (j + 1 < K) {
+        val_buff[j + 1] = val_buff[j];
+        ind_buff[j + 1] = ind_buff[j];
       }
       val_buff[j] = cur_val;
       ind_buff[j] = cur_ind;
@@ -369,40 +390,42 @@ __global__ void PartialSortSmallK(IDXType K, IDXType N, DType *val, IDXType *ind
   }
   // Recursive merge of sorted lists for this thread block. Note that blockDim.x is not
   // necessary a power of two, therefore the additional checks for last_s.
-  for (IDXType s = (blockDim.x+1)/2, last_s = blockDim.x;
-       last_s > 1; last_s = s, s = (s+1)/2) {
+  for (IDXType s = (blockDim.x + 1) / 2, last_s = blockDim.x; last_s > 1;
+       last_s = s, s = (s + 1) / 2) {
     __syncthreads();
-    if (threadIdx.x < s && threadIdx.x+s < last_s) {
-      MergeTopK(K, val_buff, ind_buff, val_buff+s*K, ind_buff+s*K, is_ascend);
+    if (threadIdx.x < s && threadIdx.x + s < last_s) {
+      MergeTopK(K, val_buff, ind_buff, val_buff + s * K, ind_buff + s * K, is_ascend);
     }
   }
   // Final updates on master thread.
   if (threadIdx.x == 0) {
     for (IDXType i = 0; i < K; ++i) {
-      ind[blockIdx.x*N+i] = ind_buff[i];
-      val[blockIdx.x*N+i] = val_buff[i];
+      ind[blockIdx.x * N + i] = ind_buff[i];
+      val[blockIdx.x * N + i] = val_buff[i];
     }
   }
 }
 
-template<typename DType, typename IDXType>
+template <typename DType, typename IDXType>
 MSHADOW_FORCE_INLINE void TopKSort(const Tensor<gpu, 1, DType>& dat,
                                    const Tensor<gpu, 1, IDXType>& ind,
                                    const Tensor<gpu, 1, char>& work,
-                                   IDXType K, IDXType N, bool is_ascend,
-                                   Stream<gpu> *s) {
+                                   IDXType K,
+                                   IDXType N,
+                                   bool is_ascend,
+                                   Stream<gpu>* s) {
   // Use full sort for all but very small K for which we
   // can do a partial sort entirely within shared memory.
   const bool full_sort(K > 5);
   // Batch size.
-  const size_t M(dat.size(0)/N);
+  const size_t M(dat.size(0) / N);
   if (full_sort) {
     // Divide workspace into two parts. The first one is needed to store batch ids.
     size_t alignment = std::max(sizeof(DType), sizeof(IDXType));
-    size_t id_size = PadBytes(sizeof(IDXType) * ind.size(0), alignment);
-    Tensor<gpu, 1, IDXType> batch_id(reinterpret_cast<IDXType*>(work.dptr_),
-                                     Shape1(ind.size(0)), s);
-    Tensor<gpu, 1, char> sort_work(work.dptr_+id_size, Shape1(work.size(0)-id_size), s);
+    size_t id_size   = PadBytes(sizeof(IDXType) * ind.size(0), alignment);
+    Tensor<gpu, 1, IDXType> batch_id(
+        reinterpret_cast<IDXType*>(work.dptr_), Shape1(ind.size(0)), s);
+    Tensor<gpu, 1, char> sort_work(work.dptr_ + id_size, Shape1(work.size(0) - id_size), s);
     mxnet::op::SortByKey(dat, ind, is_ascend, &sort_work);
     if (M > 1) {
       // Back to back sorting. Note that mxnet::op::SortByKey is a stable sort.
@@ -413,31 +436,32 @@ MSHADOW_FORCE_INLINE void TopKSort(const Tensor<gpu, 1, DType>& dat,
     }
   } else {
     const IDXType nthreads(mshadow::cuda::kBaseThreadNum);
-    PartialSortSmallK<<<M, nthreads, nthreads*K*(sizeof(IDXType)+sizeof(DType)),
-                        mshadow::Stream<gpu>::GetStream(s)>>>
-                        (K, N, dat.dptr_, ind.dptr_, is_ascend);
+    PartialSortSmallK<<<M,
+                        nthreads,
+                        nthreads * K*(sizeof(IDXType) + sizeof(DType)),
+                        mshadow::Stream<gpu>::GetStream(s)>>>(
+        K, N, dat.dptr_, ind.dptr_, is_ascend);
   }
 }
 
 #endif
 
-
 /*!
-   * \brief Implementation of the TopK operation
-   *
-   *
-   * \param ctx the running context
-   * \param resource temporary resource handler
-   * \param src the Source blob
-   * \param ret the destination blobs
-   * \param param the topk parameters
-   * \tparam xpu the device type.
-   * \tparam DType type of the output value/mask.
-   * \tparam IDType type of the output indices.
-   */
-template<typename xpu, typename DType, typename IDType, typename IDXType>
-void TopKImpl(const RunContext &ctx,
-              const Resource &resource,
+ * \brief Implementation of the TopK operation
+ *
+ *
+ * \param ctx the running context
+ * \param resource temporary resource handler
+ * \param src the Source blob
+ * \param ret the destination blobs
+ * \param param the topk parameters
+ * \tparam xpu the device type.
+ * \tparam DType type of the output value/mask.
+ * \tparam IDType type of the output indices.
+ */
+template <typename xpu, typename DType, typename IDType, typename IDXType>
+void TopKImpl(const RunContext& ctx,
+              const Resource& resource,
               const std::vector<OpReqType>& req,
               const TBlob& src,
               const std::vector<TBlob>& ret,
@@ -445,58 +469,66 @@ void TopKImpl(const RunContext &ctx,
   using namespace mshadow;
   using namespace mshadow::expr;
   // 0. If input shape is 0-shape, directly return
-  if (src.Size() == 0) return;
+  if (src.Size() == 0)
+    return;
   // 1. Parse and initialize information
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.get_stream<xpu>();
   Tensor<xpu, 1, char> workspace;
   Tensor<xpu, 1, char> temp_workspace;
   Tensor<xpu, 1, DType> sorted_dat;
   Tensor<xpu, 1, IDXType> indices, sel_indices;
-  size_t batch_size = 0;
+  size_t batch_size   = 0;
   IDXType element_num = 0;  // number of batches + the size of each batch
-  int axis = 0;
-  bool do_transpose = false;
-  bool is_ascend = false;
-  IDXType k = 0;
-  size_t alignment = std::max(sizeof(DType), sizeof(IDXType));
+  int axis            = 0;
+  bool do_transpose   = false;
+  bool is_ascend      = false;
+  IDXType k           = 0;
+  size_t alignment    = std::max(sizeof(DType), sizeof(IDXType));
   mxnet::TShape target_shape;
-  ParseTopKParam(src.shape_, param,
-                 &target_shape, &batch_size, &element_num, &axis, &k, &do_transpose, &is_ascend);
+  ParseTopKParam(src.shape_,
+                 param,
+                 &target_shape,
+                 &batch_size,
+                 &element_num,
+                 &axis,
+                 &k,
+                 &do_transpose,
+                 &is_ascend);
   CHECK_LE(element_num, mxnet::common::MaxIntegerValue<IDXType>())
-    << "'index_t' does not have a sufficient precision to represent "
-    << "the indices of the input array. The total element_num is "
-    << element_num << ", but the selected index_t can only represent "
-    << mxnet::common::MaxIntegerValue<IDXType>() << " elements";
+      << "'index_t' does not have a sufficient precision to represent "
+      << "the indices of the input array. The total element_num is " << element_num
+      << ", but the selected index_t can only represent "
+      << mxnet::common::MaxIntegerValue<IDXType>() << " elements";
   Tensor<xpu, 3, DType> dat = src.FlatTo3D<xpu, DType>(axis, axis, s);
   // Temp space needed by the full sorts.
-  size_t temp_size = std::max(
-      mxnet::op::SortByKeyWorkspaceSize<IDXType, DType, xpu>(src.Size()),
-      mxnet::op::SortByKeyWorkspaceSize<DType, IDXType, xpu>(src.Size()));
+  size_t temp_size = std::max(mxnet::op::SortByKeyWorkspaceSize<IDXType, DType, xpu>(src.Size()),
+                              mxnet::op::SortByKeyWorkspaceSize<DType, IDXType, xpu>(src.Size()));
 
-  temp_size = std::max(temp_size,
-      mxnet::op::SortByKeyWorkspaceSize<IDXType, IDXType, xpu>(src.Size()));
+  temp_size =
+      std::max(temp_size, mxnet::op::SortByKeyWorkspaceSize<IDXType, IDXType, xpu>(src.Size()));
   // Additional temp space for gpu full sorts for batch ids.
   temp_size += PadBytes(sizeof(IDXType) * src.Size(), alignment);
   // Temp space for cpu sorts.
   temp_size = std::max(temp_size, sizeof(DType) * src.Size());
 
-  size_t workspace_size = temp_size + PadBytes(sizeof(DType) * src.Size(), alignment)
-                                    + PadBytes(sizeof(IDXType) * src.Size(), alignment);
+  size_t workspace_size = temp_size + PadBytes(sizeof(DType) * src.Size(), alignment) +
+                          PadBytes(sizeof(IDXType) * src.Size(), alignment);
   if (param.ret_typ == topk_enum::kReturnMask) {
     workspace_size += PadBytes(sizeof(IDXType) * batch_size * k, alignment);
   }
-  workspace = resource.get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
+  workspace                = resource.get_space_typed<xpu, 1, char>(Shape1(workspace_size), s);
   char* workspace_curr_ptr = workspace.dptr_;
-  sorted_dat = Tensor<xpu, 1, DType>(reinterpret_cast<DType*>(workspace_curr_ptr),
-      Shape1(src.Size()), s);  // contain sorted dat
+  sorted_dat               = Tensor<xpu, 1, DType>(
+      reinterpret_cast<DType*>(workspace_curr_ptr), Shape1(src.Size()), s);  // contain sorted dat
   workspace_curr_ptr += PadBytes(sizeof(DType) * src.Size(), alignment);
   indices = Tensor<xpu, 1, IDXType>(reinterpret_cast<IDXType*>(workspace_curr_ptr),
-      Shape1(src.Size()), s);  // indices in the original matrix
+                                    Shape1(src.Size()),
+                                    s);  // indices in the original matrix
   workspace_curr_ptr += PadBytes(sizeof(IDXType) * src.Size(), alignment);
 
   if (param.ret_typ == topk_enum::kReturnMask) {
-    sel_indices = Tensor<xpu, 1, IDXType>(reinterpret_cast<IDXType*>(workspace_curr_ptr),
-                                      Shape1(batch_size * k), s);
+    sel_indices = Tensor<xpu, 1, IDXType>(
+        reinterpret_cast<IDXType*>(workspace_curr_ptr), Shape1(batch_size * k), s);
     workspace_curr_ptr += PadBytes(sizeof(IDXType) * batch_size * k, alignment);
     CHECK_EQ(sel_indices.CheckContiguous(), true);
   }
@@ -504,8 +536,8 @@ void TopKImpl(const RunContext &ctx,
   if (std::is_same<xpu, cpu>::value) {
     Tensor<xpu, 1, DType> flattened_data;
     if (do_transpose) {
-      flattened_data = Tensor<xpu, 1, DType>(reinterpret_cast<DType*>(workspace_curr_ptr),
-                                              Shape1(src.Size()), s);
+      flattened_data = Tensor<xpu, 1, DType>(
+          reinterpret_cast<DType*>(workspace_curr_ptr), Shape1(src.Size()), s);
       workspace_curr_ptr += sizeof(DType) * src.Size();
       flattened_data = reshape(transpose(dat, Shape3(0, 2, 1)), Shape1(src.Size()));
       CHECK_EQ(flattened_data.CheckContiguous(), true);
@@ -513,8 +545,8 @@ void TopKImpl(const RunContext &ctx,
       flattened_data = src.FlatTo1D<xpu, DType>(s);
     }
     // `temp_workspace` stores the flattened data
-    temp_workspace = Tensor<xpu, 1, char>(reinterpret_cast<char*>(flattened_data.dptr_),
-                                          Shape1(sizeof(DType)*src.Size()), s);
+    temp_workspace = Tensor<xpu, 1, char>(
+        reinterpret_cast<char*>(flattened_data.dptr_), Shape1(sizeof(DType) * src.Size()), s);
     CHECK_EQ(temp_workspace.CheckContiguous(), true);
   } else {
     if (do_transpose) {
@@ -527,8 +559,13 @@ void TopKImpl(const RunContext &ctx,
     workspace_curr_ptr += temp_size;
   }
 
-  mxnet_op::Kernel<range_fwd, xpu>::Launch(s, batch_size * element_num, 1, IDXType{0}, IDXType{1},
-    kWriteTo, reinterpret_cast<IDXType*>(indices.dptr_));
+  mxnet_op::Kernel<range_fwd, xpu>::Launch(s,
+                                           batch_size * element_num,
+                                           1,
+                                           IDXType{0},
+                                           IDXType{1},
+                                           kWriteTo,
+                                           reinterpret_cast<IDXType*>(indices.dptr_));
   CHECK_EQ(indices.CheckContiguous(), true);
 
   // 2. Perform inplace batch sort.
@@ -545,154 +582,186 @@ void TopKImpl(const RunContext &ctx,
   // is large enough.
   if (param.ret_typ == topk_enum::kReturnMask) {
     Tensor<xpu, 1, DType> ret_mask = ret[0].FlatTo1D<xpu, DType>(s);
-    ret_mask = scalar<DType>(0);
-    sel_indices = reshape(slice<1>(
-                              inplace_reshape(indices,
-                                              Shape2(batch_size,
-                                                     element_num)), 0, k),
-                              Shape1(batch_size * k));
+    ret_mask                       = scalar<DType>(0);
+    sel_indices = reshape(slice<1>(inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
+                          Shape1(batch_size * k));
     if (do_transpose) {
       mxnet::TShape src_shape = src.shape_.FlatTo3D(axis);
       CHECK_EQ(sel_indices.CheckContiguous(), true);
-      sel_indices = transpose_indices(sel_indices, Shape3(src_shape[0], src_shape[2], src_shape[1]),
-                                      Shape3(0, 2, 1));
+      sel_indices = transpose_indices(
+          sel_indices, Shape3(src_shape[0], src_shape[2], src_shape[1]), Shape3(0, 2, 1));
     }
     if (req[0] == kNullOp) {
       return;
     } else if (req[0] == kWriteTo) {
-      mxnet_op::Kernel<fill_ind_to_one, xpu>::Launch(s, batch_size * k,
-                                                     sel_indices.dptr_, ret_mask.dptr_);
+      mxnet_op::Kernel<fill_ind_to_one, xpu>::Launch(
+          s, batch_size * k, sel_indices.dptr_, ret_mask.dptr_);
     } else {
       LOG(FATAL) << "req=" << req[0] << " is not supported yet.";
     }
   } else if (param.ret_typ == topk_enum::kReturnIndices) {
     if (do_transpose) {
       Tensor<xpu, 3, IDType> ret_indices = ret[0].FlatTo3D<xpu, IDType>(axis, axis, s);
-      ASSIGN_DISPATCH(ret_indices, req[0], tcast<IDType>(F<mshadow_op::mod>(transpose(
-                      slice<2>(inplace_reshape(indices,
-                                               Shape3(ret_indices.shape_[0],
-                                                      ret_indices.shape_[2],
-                                                      element_num)),
-                          0, k),
-                      Shape3(0, 2, 1)), element_num)));
+      ASSIGN_DISPATCH(
+          ret_indices,
+          req[0],
+          tcast<IDType>(F<mshadow_op::mod>(
+              transpose(
+                  slice<2>(inplace_reshape(
+                               indices,
+                               Shape3(ret_indices.shape_[0], ret_indices.shape_[2], element_num)),
+                           0,
+                           k),
+                  Shape3(0, 2, 1)),
+              element_num)));
     } else {
       Tensor<xpu, 2, IDType> ret_indices =
-        ret[0].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
-      ASSIGN_DISPATCH(ret_indices, req[0], tcast<IDType>(F<mshadow_op::mod>(slice<1>(
-                      inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
-                      element_num)));
+          ret[0].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
+      ASSIGN_DISPATCH(ret_indices,
+                      req[0],
+                      tcast<IDType>(F<mshadow_op::mod>(
+                          slice<1>(inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
+                          element_num)));
     }
   } else {
     if (do_transpose) {
-      Tensor<xpu, 3, DType> ret_value = ret[0].FlatTo3D<xpu, DType>(axis, axis, s);
+      Tensor<xpu, 3, DType> ret_value    = ret[0].FlatTo3D<xpu, DType>(axis, axis, s);
       Tensor<xpu, 3, IDType> ret_indices = ret[1].FlatTo3D<xpu, IDType>(axis, axis, s);
-      ASSIGN_DISPATCH(ret_value, req[0], transpose(
-                   slice<2>(inplace_reshape(sorted_dat,
-                                    Shape3(ret_value.shape_[0], ret_value.shape_[2], element_num)),
-                            0, k), Shape3(0, 2, 1)));
-      ASSIGN_DISPATCH(ret_indices, req[1], tcast<IDType>(F<mshadow_op::mod>(transpose(
-                      slice<2>(inplace_reshape(indices,
-                                               Shape3(ret_indices.shape_[0],
-                                                      ret_indices.shape_[2],
-                                                      element_num)),
-                               0, k), Shape3(0, 2, 1)), element_num)));
+      ASSIGN_DISPATCH(
+          ret_value,
+          req[0],
+          transpose(slice<2>(inplace_reshape(
+                                 sorted_dat,
+                                 Shape3(ret_value.shape_[0], ret_value.shape_[2], element_num)),
+                             0,
+                             k),
+                    Shape3(0, 2, 1)));
+      ASSIGN_DISPATCH(
+          ret_indices,
+          req[1],
+          tcast<IDType>(F<mshadow_op::mod>(
+              transpose(
+                  slice<2>(inplace_reshape(
+                               indices,
+                               Shape3(ret_indices.shape_[0], ret_indices.shape_[2], element_num)),
+                           0,
+                           k),
+                  Shape3(0, 2, 1)),
+              element_num)));
     } else {
       Tensor<xpu, 2, DType> ret_value =
-        ret[0].get_with_shape<xpu, 2, DType>(Shape2(batch_size, k), s);
+          ret[0].get_with_shape<xpu, 2, DType>(Shape2(batch_size, k), s);
       Tensor<xpu, 2, IDType> ret_indices =
-        ret[1].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
-      ASSIGN_DISPATCH(ret_value, req[0],
-             slice<1>(inplace_reshape(sorted_dat, Shape2(batch_size, element_num)), 0, k));
-      ASSIGN_DISPATCH(ret_indices, req[1], tcast<IDType>(F<mshadow_op::mod>(slice<1>(
-                 inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k), element_num)));
+          ret[1].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
+      ASSIGN_DISPATCH(ret_value,
+                      req[0],
+                      slice<1>(inplace_reshape(sorted_dat, Shape2(batch_size, element_num)), 0, k));
+      ASSIGN_DISPATCH(ret_indices,
+                      req[1],
+                      tcast<IDType>(F<mshadow_op::mod>(
+                          slice<1>(inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
+                          element_num)));
     }
   }
 }
 
-template<typename xpu, typename DType>
-size_t TopKWorkspaceSize(const TBlob& src,
-                         const TopKParam& param,
-                         size_t *temp_size_ptr) {
+template <typename xpu, typename DType>
+size_t TopKWorkspaceSize(const TBlob& src, const TopKParam& param, size_t* temp_size_ptr) {
   using namespace mshadow;
   using namespace mshadow::expr;
 
   size_t batch_size = 0;
   size_t temp_size;
   index_t element_num = 0;  // number of batches + the size of each batch
-  int axis = 0;
-  bool do_transpose = false;
-  bool is_ascend = false;
-  index_t k = 0;
-  size_t alignment = std::max(sizeof(DType), sizeof(index_t));
+  int axis            = 0;
+  bool do_transpose   = false;
+  bool is_ascend      = false;
+  index_t k           = 0;
+  size_t alignment    = std::max(sizeof(DType), sizeof(index_t));
   mxnet::TShape target_shape;
-  ParseTopKParam(src.shape_, param,
-                 &target_shape, &batch_size, &element_num, &axis, &k, &do_transpose, &is_ascend);
+  ParseTopKParam(src.shape_,
+                 param,
+                 &target_shape,
+                 &batch_size,
+                 &element_num,
+                 &axis,
+                 &k,
+                 &do_transpose,
+                 &is_ascend);
 
   // Temp space needed by the full sorts.
-  temp_size = std::max(
-      mxnet::op::SortByKeyWorkspaceSize<index_t, DType, xpu>(src.Size()),
-      mxnet::op::SortByKeyWorkspaceSize<DType, index_t, xpu>(src.Size()));
+  temp_size = std::max(mxnet::op::SortByKeyWorkspaceSize<index_t, DType, xpu>(src.Size()),
+                       mxnet::op::SortByKeyWorkspaceSize<DType, index_t, xpu>(src.Size()));
 
-  temp_size = std::max(temp_size,
-      mxnet::op::SortByKeyWorkspaceSize<index_t, index_t, xpu>(src.Size()));
+  temp_size =
+      std::max(temp_size, mxnet::op::SortByKeyWorkspaceSize<index_t, index_t, xpu>(src.Size()));
   // Additional temp space for gpu full sorts for batch ids.
   temp_size += PadBytes(sizeof(index_t) * src.Size(), alignment);
   // Temp space for cpu sorts.
-  temp_size = std::max(temp_size, sizeof(DType) * src.Size());
+  temp_size      = std::max(temp_size, sizeof(DType) * src.Size());
   *temp_size_ptr = temp_size;
 
-  size_t workspace_size = temp_size + PadBytes(sizeof(DType) * src.Size(), alignment)
-                                    + PadBytes(sizeof(index_t) * src.Size(), alignment);
+  size_t workspace_size = temp_size + PadBytes(sizeof(DType) * src.Size(), alignment) +
+                          PadBytes(sizeof(index_t) * src.Size(), alignment);
   if (param.ret_typ == topk_enum::kReturnMask) {
     workspace_size += PadBytes(sizeof(index_t) * batch_size * k, alignment);
   }
   return workspace_size;
 }
 
-template<typename xpu, typename DType, typename IDType>
-void TopKImplwithWorkspace(const RunContext &ctx,
+template <typename xpu, typename DType, typename IDType>
+void TopKImplwithWorkspace(const RunContext& ctx,
                            const std::vector<OpReqType>& req,
                            const TBlob& src,
                            const std::vector<TBlob>& ret,
                            const TopKParam& param,
                            char* workspace_curr_ptr,
-                           const size_t &temp_size,
+                           const size_t& temp_size,
                            Stream<xpu>* s) {
   using namespace mshadow;
   using namespace mshadow::expr;
   // 0. If input shape is 0-shape, directly return
-  if (src.Size() == 0) return;
+  if (src.Size() == 0)
+    return;
   // 1. Parse and initialize information
   Tensor<xpu, 1, char> workspace;
   Tensor<xpu, 1, char> temp_workspace;
   Tensor<xpu, 1, DType> sorted_dat;
   Tensor<xpu, 1, index_t> indices, sel_indices;
-  size_t batch_size = 0;
+  size_t batch_size   = 0;
   index_t element_num = 0;  // number of batches + the size of each batch
-  int axis = 0;
-  bool do_transpose = false;
-  bool is_ascend = false;
-  index_t k = 0;
-  size_t alignment = std::max(sizeof(DType), sizeof(index_t));
+  int axis            = 0;
+  bool do_transpose   = false;
+  bool is_ascend      = false;
+  index_t k           = 0;
+  size_t alignment    = std::max(sizeof(DType), sizeof(index_t));
   mxnet::TShape target_shape;
-  ParseTopKParam(src.shape_, param,
-                 &target_shape, &batch_size, &element_num, &axis, &k, &do_transpose, &is_ascend);
+  ParseTopKParam(src.shape_,
+                 param,
+                 &target_shape,
+                 &batch_size,
+                 &element_num,
+                 &axis,
+                 &k,
+                 &do_transpose,
+                 &is_ascend);
   CHECK_LE(element_num, mxnet::common::MaxIntegerValue<index_t>())
-    << "'index_t' does not have a sufficient precision to represent "
-    << "the indices of the input array. The total element_num is "
-    << element_num << ", but the selected index_t can only represent "
-    << mxnet::common::MaxIntegerValue<index_t>() << " elements";
+      << "'index_t' does not have a sufficient precision to represent "
+      << "the indices of the input array. The total element_num is " << element_num
+      << ", but the selected index_t can only represent "
+      << mxnet::common::MaxIntegerValue<index_t>() << " elements";
   Tensor<xpu, 3, DType> dat = src.FlatTo3D<xpu, DType>(axis, axis, s);
-  sorted_dat = Tensor<xpu, 1, DType>(reinterpret_cast<DType*>(workspace_curr_ptr),
-      Shape1(src.Size()), s);  // contain sorted dat
+  sorted_dat                = Tensor<xpu, 1, DType>(
+      reinterpret_cast<DType*>(workspace_curr_ptr), Shape1(src.Size()), s);  // contain sorted dat
   workspace_curr_ptr += PadBytes(sizeof(DType) * src.Size(), alignment);
   indices = Tensor<xpu, 1, index_t>(reinterpret_cast<index_t*>(workspace_curr_ptr),
-      Shape1(src.Size()), s);  // indices in the original matrix
+                                    Shape1(src.Size()),
+                                    s);  // indices in the original matrix
   workspace_curr_ptr += PadBytes(sizeof(index_t) * src.Size(), alignment);
 
   if (param.ret_typ == topk_enum::kReturnMask) {
-    sel_indices = Tensor<xpu, 1, index_t>(reinterpret_cast<index_t*>(workspace_curr_ptr),
-                                      Shape1(batch_size * k), s);
+    sel_indices = Tensor<xpu, 1, index_t>(
+        reinterpret_cast<index_t*>(workspace_curr_ptr), Shape1(batch_size * k), s);
     workspace_curr_ptr += PadBytes(sizeof(index_t) * batch_size * k, alignment);
     CHECK_EQ(sel_indices.CheckContiguous(), true);
   }
@@ -700,8 +769,8 @@ void TopKImplwithWorkspace(const RunContext &ctx,
   if (std::is_same<xpu, cpu>::value) {
     Tensor<xpu, 1, DType> flattened_data;
     if (do_transpose) {
-      flattened_data = Tensor<xpu, 1, DType>(reinterpret_cast<DType*>(workspace_curr_ptr),
-                                              Shape1(src.Size()), s);
+      flattened_data = Tensor<xpu, 1, DType>(
+          reinterpret_cast<DType*>(workspace_curr_ptr), Shape1(src.Size()), s);
       workspace_curr_ptr += sizeof(DType) * src.Size();
       flattened_data = reshape(transpose(dat, Shape3(0, 2, 1)), Shape1(src.Size()));
       CHECK_EQ(flattened_data.CheckContiguous(), true);
@@ -709,8 +778,8 @@ void TopKImplwithWorkspace(const RunContext &ctx,
       flattened_data = src.FlatTo1D<xpu, DType>(s);
     }
     // `temp_workspace` stores the flattened data
-    temp_workspace = Tensor<xpu, 1, char>(reinterpret_cast<char*>(flattened_data.dptr_),
-                                          Shape1(sizeof(DType)*src.Size()), s);
+    temp_workspace = Tensor<xpu, 1, char>(
+        reinterpret_cast<char*>(flattened_data.dptr_), Shape1(sizeof(DType) * src.Size()), s);
     CHECK_EQ(temp_workspace.CheckContiguous(), true);
   } else {
     if (do_transpose) {
@@ -723,8 +792,8 @@ void TopKImplwithWorkspace(const RunContext &ctx,
     workspace_curr_ptr += temp_size;
   }
 
-  mxnet_op::Kernel<range_fwd, xpu>::Launch(s, batch_size * element_num, 1, index_t{0}, index_t{1},
-    kWriteTo, indices.dptr_);
+  mxnet_op::Kernel<range_fwd, xpu>::Launch(
+      s, batch_size * element_num, 1, index_t{0}, index_t{1}, kWriteTo, indices.dptr_);
   CHECK_EQ(indices.CheckContiguous(), true);
 
   // 2. Perform inplace batch sort.
@@ -741,71 +810,90 @@ void TopKImplwithWorkspace(const RunContext &ctx,
   // is large enough.
   if (param.ret_typ == topk_enum::kReturnMask) {
     Tensor<xpu, 1, DType> ret_mask = ret[0].FlatTo1D<xpu, DType>(s);
-    ret_mask = scalar<DType>(0);
-    sel_indices = reshape(slice<1>(
-                              inplace_reshape(indices,
-                                              Shape2(batch_size,
-                                                     element_num)), 0, k),
-                              Shape1(batch_size * k));
+    ret_mask                       = scalar<DType>(0);
+    sel_indices = reshape(slice<1>(inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
+                          Shape1(batch_size * k));
     if (do_transpose) {
       mxnet::TShape src_shape = src.shape_.FlatTo3D(axis);
       CHECK_EQ(sel_indices.CheckContiguous(), true);
-      sel_indices = transpose_indices(sel_indices, Shape3(src_shape[0], src_shape[2], src_shape[1]),
-                                      Shape3(0, 2, 1));
+      sel_indices = transpose_indices(
+          sel_indices, Shape3(src_shape[0], src_shape[2], src_shape[1]), Shape3(0, 2, 1));
     }
     if (req[0] == kNullOp) {
       return;
     } else if (req[0] == kWriteTo) {
-      mxnet_op::Kernel<fill_ind_to_one, xpu>::Launch(s, batch_size * k,
-                                                     sel_indices.dptr_, ret_mask.dptr_);
+      mxnet_op::Kernel<fill_ind_to_one, xpu>::Launch(
+          s, batch_size * k, sel_indices.dptr_, ret_mask.dptr_);
     } else {
       LOG(FATAL) << "req=" << req[0] << " is not supported yet.";
     }
   } else if (param.ret_typ == topk_enum::kReturnIndices) {
     if (do_transpose) {
       Tensor<xpu, 3, IDType> ret_indices = ret[0].FlatTo3D<xpu, IDType>(axis, axis, s);
-      ASSIGN_DISPATCH(ret_indices, req[0], tcast<IDType>(F<mshadow_op::mod>(transpose(
-                      slice<2>(inplace_reshape(indices,
-                                               Shape3(ret_indices.shape_[0],
-                                                      ret_indices.shape_[2],
-                                                      element_num)),
-                               0, k),
-                      Shape3(0, 2, 1)), element_num)));
+      ASSIGN_DISPATCH(
+          ret_indices,
+          req[0],
+          tcast<IDType>(F<mshadow_op::mod>(
+              transpose(
+                  slice<2>(inplace_reshape(
+                               indices,
+                               Shape3(ret_indices.shape_[0], ret_indices.shape_[2], element_num)),
+                           0,
+                           k),
+                  Shape3(0, 2, 1)),
+              element_num)));
     } else {
       Tensor<xpu, 2, IDType> ret_indices =
-        ret[0].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
-      ASSIGN_DISPATCH(ret_indices, req[0], tcast<IDType>(F<mshadow_op::mod>(slice<1>(
-                      inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
-                      element_num)));
+          ret[0].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
+      ASSIGN_DISPATCH(ret_indices,
+                      req[0],
+                      tcast<IDType>(F<mshadow_op::mod>(
+                          slice<1>(inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
+                          element_num)));
     }
   } else {
     if (do_transpose) {
-      Tensor<xpu, 3, DType> ret_value = ret[0].FlatTo3D<xpu, DType>(axis, axis, s);
+      Tensor<xpu, 3, DType> ret_value    = ret[0].FlatTo3D<xpu, DType>(axis, axis, s);
       Tensor<xpu, 3, IDType> ret_indices = ret[1].FlatTo3D<xpu, IDType>(axis, axis, s);
-      ASSIGN_DISPATCH(ret_value, req[0], transpose(
-                   slice<2>(inplace_reshape(sorted_dat,
-                                    Shape3(ret_value.shape_[0], ret_value.shape_[2], element_num)),
-                            0, k), Shape3(0, 2, 1)));
-      ASSIGN_DISPATCH(ret_indices, req[1], tcast<IDType>(F<mshadow_op::mod>(transpose(
-                      slice<2>(inplace_reshape(indices,
-                                               Shape3(ret_indices.shape_[0],
-                                                      ret_indices.shape_[2],
-                                                      element_num)),
-                               0, k), Shape3(0, 2, 1)), element_num)));
+      ASSIGN_DISPATCH(
+          ret_value,
+          req[0],
+          transpose(slice<2>(inplace_reshape(
+                                 sorted_dat,
+                                 Shape3(ret_value.shape_[0], ret_value.shape_[2], element_num)),
+                             0,
+                             k),
+                    Shape3(0, 2, 1)));
+      ASSIGN_DISPATCH(
+          ret_indices,
+          req[1],
+          tcast<IDType>(F<mshadow_op::mod>(
+              transpose(
+                  slice<2>(inplace_reshape(
+                               indices,
+                               Shape3(ret_indices.shape_[0], ret_indices.shape_[2], element_num)),
+                           0,
+                           k),
+                  Shape3(0, 2, 1)),
+              element_num)));
     } else {
       Tensor<xpu, 2, DType> ret_value =
-        ret[0].get_with_shape<xpu, 2, DType>(Shape2(batch_size, k), s);
+          ret[0].get_with_shape<xpu, 2, DType>(Shape2(batch_size, k), s);
       Tensor<xpu, 2, IDType> ret_indices =
-        ret[1].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
-      ASSIGN_DISPATCH(ret_value, req[0],
-             slice<1>(inplace_reshape(sorted_dat, Shape2(batch_size, element_num)), 0, k));
-      ASSIGN_DISPATCH(ret_indices, req[1], tcast<IDType>(F<mshadow_op::mod>(slice<1>(
-                 inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k), element_num)));
+          ret[1].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
+      ASSIGN_DISPATCH(ret_value,
+                      req[0],
+                      slice<1>(inplace_reshape(sorted_dat, Shape2(batch_size, element_num)), 0, k));
+      ASSIGN_DISPATCH(ret_indices,
+                      req[1],
+                      tcast<IDType>(F<mshadow_op::mod>(
+                          slice<1>(inplace_reshape(indices, Shape2(batch_size, element_num)), 0, k),
+                          element_num)));
     }
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void TopK(const nnvm::NodeAttrs& attrs,
           const OpContext& ctx,
           const std::vector<TBlob>& inputs,
@@ -817,28 +905,28 @@ void TopK(const nnvm::NodeAttrs& attrs,
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
       MXNET_NO_BFLOAT16_TYPE_SWITCH(param.dtype, IDType, {
         if (inputs[0].Size() >= INT_MAX) {
-          TopKImpl<xpu, DType, IDType, index_t>(ctx.run_ctx, ctx.requested[0], req,
-                                                inputs[0], outputs, param);
+          TopKImpl<xpu, DType, IDType, index_t>(
+              ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, param);
         } else {
-          TopKImpl<xpu, DType, IDType, int32_t>(ctx.run_ctx, ctx.requested[0], req,
-                                                inputs[0], outputs, param);
+          TopKImpl<xpu, DType, IDType, int32_t>(
+              ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, param);
         }
       });
     });
   } else {
     MSHADOW_TYPE_SWITCH(inputs[0].type_flag_, DType, {
       if (inputs[0].Size() >= INT_MAX) {
-        TopKImpl<xpu, DType, index_t, index_t>(ctx.run_ctx, ctx.requested[0], req,
-                                               inputs[0], outputs, param);
+        TopKImpl<xpu, DType, index_t, index_t>(
+            ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, param);
       } else {
-        TopKImpl<xpu, DType, index_t, int32_t>(ctx.run_ctx, ctx.requested[0], req,
-                                               inputs[0], outputs, param);
+        TopKImpl<xpu, DType, index_t, int32_t>(
+            ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, param);
       }
     });
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void Sort(const nnvm::NodeAttrs& attrs,
           const OpContext& ctx,
           const std::vector<TBlob>& inputs,
@@ -846,22 +934,22 @@ void Sort(const nnvm::NodeAttrs& attrs,
           const std::vector<TBlob>& outputs) {
   const SortParam& param = nnvm::get<SortParam>(attrs.parsed);
   TopKParam topk_param;
-  topk_param.axis = param.axis;
+  topk_param.axis      = param.axis;
   topk_param.is_ascend = param.is_ascend;
-  topk_param.k = 0;
-  topk_param.ret_typ = topk_enum::kReturnValue;
+  topk_param.k         = 0;
+  topk_param.ret_typ   = topk_enum::kReturnValue;
   MXNET_NO_FLOAT16_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     if (inputs[0].Size() >= INT_MAX) {
-      TopKImpl<xpu, DType, index_t, index_t>(ctx.run_ctx, ctx.requested[0], req, inputs[0],
-                                    outputs, topk_param);
+      TopKImpl<xpu, DType, index_t, index_t>(
+          ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, topk_param);
     } else {
-      TopKImpl<xpu, DType, index_t, int32_t>(ctx.run_ctx, ctx.requested[0], req, inputs[0],
-                                    outputs, topk_param);
+      TopKImpl<xpu, DType, index_t, int32_t>(
+          ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, topk_param);
     }
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void ArgSort(const nnvm::NodeAttrs& attrs,
              const OpContext& ctx,
              const std::vector<TBlob>& inputs,
@@ -869,26 +957,26 @@ void ArgSort(const nnvm::NodeAttrs& attrs,
              const std::vector<TBlob>& outputs) {
   const ArgSortParam& param = nnvm::get<ArgSortParam>(attrs.parsed);
   TopKParam topk_param;
-  topk_param.axis = param.axis;
+  topk_param.axis      = param.axis;
   topk_param.is_ascend = param.is_ascend;
-  topk_param.k = 0;
-  topk_param.dtype = param.dtype;
-  topk_param.ret_typ = topk_enum::kReturnIndices;
+  topk_param.k         = 0;
+  topk_param.dtype     = param.dtype;
+  topk_param.ret_typ   = topk_enum::kReturnIndices;
   MXNET_NO_FLOAT16_TYPE_SWITCH(inputs[0].type_flag_, DType, {
     MSHADOW_TYPE_SWITCH(param.dtype, IDType, {
       if (inputs[0].Size() >= INT_MAX) {
-        TopKImpl<xpu, DType, IDType, index_t>(ctx.run_ctx,
-                                     ctx.requested[0], req, inputs[0], outputs, topk_param);
+        TopKImpl<xpu, DType, IDType, index_t>(
+            ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, topk_param);
       } else {
-        TopKImpl<xpu, DType, IDType, int32_t>(ctx.run_ctx,
-                                     ctx.requested[0], req, inputs[0], outputs, topk_param);
+        TopKImpl<xpu, DType, IDType, int32_t>(
+            ctx.run_ctx, ctx.requested[0], req, inputs[0], outputs, topk_param);
       }
     });
   });
 }
 
-template<typename xpu, typename DType, typename IDType, typename IDXType>
-void TopKBackwardImpl(const OpContext &ctx,
+template <typename xpu, typename DType, typename IDType, typename IDXType>
+void TopKBackwardImpl(const OpContext& ctx,
                       const std::vector<TBlob>& inputs,
                       const std::vector<OpReqType>& req,
                       const std::vector<TBlob>& outputs,
@@ -896,71 +984,74 @@ void TopKBackwardImpl(const OpContext &ctx,
   CHECK_NE(req[0], kWriteInplace);
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu> *s = ctx.run_ctx.get_stream<xpu>();
+  Stream<xpu>* s = ctx.run_ctx.get_stream<xpu>();
   CHECK(param.ret_typ == topk_enum::kReturnValue || param.ret_typ == topk_enum::kReturnBoth);
-  size_t batch_size = 0;
+  size_t batch_size   = 0;
   IDXType element_num = 0;  // number of batches + the size of each batch
-  int axis = 0;
-  bool do_transpose = false;
-  bool is_ascend = false;
-  IDXType k = 0;
+  int axis            = 0;
+  bool do_transpose   = false;
+  bool is_ascend      = false;
+  IDXType k           = 0;
   mxnet::TShape target_shape;
-  ParseTopKParam(outputs[0].shape_, param,
-                 &target_shape, &batch_size, &element_num, &axis, &k, &do_transpose, &is_ascend);
+  ParseTopKParam(outputs[0].shape_,
+                 param,
+                 &target_shape,
+                 &batch_size,
+                 &element_num,
+                 &axis,
+                 &k,
+                 &do_transpose,
+                 &is_ascend);
   CHECK_LE(element_num, mxnet::common::MaxIntegerValue<IDXType>())
-    << "'IDType' does not have a sufficient precision to represent "
-    << "the indices of the input array. The total element_num is " << element_num
-    << ", but the selected index_t can only represent "
-    << mxnet::common::MaxIntegerValue<IDXType>() << " elements";
+      << "'IDType' does not have a sufficient precision to represent "
+      << "the indices of the input array. The total element_num is " << element_num
+      << ", but the selected index_t can only represent "
+      << mxnet::common::MaxIntegerValue<IDXType>() << " elements";
   Tensor<xpu, 1, IDXType> workspace =
-    ctx.requested[0].get_space_typed<xpu, 1, IDXType>(Shape1(batch_size * k + batch_size), s);
+      ctx.requested[0].get_space_typed<xpu, 1, IDXType>(Shape1(batch_size * k + batch_size), s);
   Tensor<xpu, 1, IDXType> sel_indices =
-    Tensor<xpu, 1, IDXType>(workspace.dptr_, Shape1(batch_size * k), s);
+      Tensor<xpu, 1, IDXType>(workspace.dptr_, Shape1(batch_size * k), s);
   Tensor<xpu, 1, IDXType> batch_shift =
-    Tensor<xpu, 1, IDXType>(workspace.dptr_ + batch_size * k, Shape1(batch_size), s);
+      Tensor<xpu, 1, IDXType>(workspace.dptr_ + batch_size * k, Shape1(batch_size), s);
 
   Tensor<xpu, 2, DType> out_grad =
-    inputs[0].get_with_shape<xpu, 2, DType>(Shape2(inputs[0].shape_.Size(), 1), s);
+      inputs[0].get_with_shape<xpu, 2, DType>(Shape2(inputs[0].shape_.Size(), 1), s);
   Tensor<xpu, 2, DType> in_grad =
-    outputs[0].get_with_shape<xpu, 2, DType>(Shape2(outputs[0].shape_.Size(), 1), s);
-  mxnet_op::Kernel<range_fwd, xpu>::Launch(s, batch_size, 1, IDXType{0}, element_num, kWriteTo,
-                                           batch_shift.dptr_);
+      outputs[0].get_with_shape<xpu, 2, DType>(Shape2(outputs[0].shape_.Size(), 1), s);
+  mxnet_op::Kernel<range_fwd, xpu>::Launch(
+      s, batch_size, 1, IDXType{0}, element_num, kWriteTo, batch_shift.dptr_);
   if (do_transpose) {
     Tensor<xpu, 1, IDType> indices = inputs[2].FlatTo1D<xpu, IDType>(s);
-    mxnet::TShape src_shape = outputs[0].shape_.FlatTo3D(axis);
-    sel_indices = reshape(transpose(
-                            broadcast_to(inplace_reshape(batch_shift,
-                                                         Shape3(src_shape[0], src_shape[2], 1)),
-                                         mxnet::TShape(Shape3(src_shape[0], src_shape[2], k))),
-                            Shape3(0, 2, 1)),
-                          Shape1(batch_size * k));
+    mxnet::TShape src_shape        = outputs[0].shape_.FlatTo3D(axis);
+    sel_indices                    = reshape(
+        transpose(broadcast_to(inplace_reshape(batch_shift, Shape3(src_shape[0], src_shape[2], 1)),
+                               mxnet::TShape(Shape3(src_shape[0], src_shape[2], k))),
+                  Shape3(0, 2, 1)),
+        Shape1(batch_size * k));
     sel_indices += tcast<IDXType>(indices);
-    sel_indices = transpose_indices(sel_indices, Shape3(src_shape[0], src_shape[2], src_shape[1]),
-                                    Shape3(0, 2, 1));
+    sel_indices = transpose_indices(
+        sel_indices, Shape3(src_shape[0], src_shape[2], src_shape[1]), Shape3(0, 2, 1));
   } else {
     Tensor<xpu, 2, IDType> indices =
-      inputs[2].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
-    sel_indices = reshape(tcast<IDXType>(indices) +
-                          broadcast_to(inplace_reshape(batch_shift, Shape2(batch_size, 1)),
-                                       mxnet::TShape(Shape2(batch_size, k))),
-                          Shape1(batch_size * k));
+        inputs[2].get_with_shape<xpu, 2, IDType>(Shape2(batch_size, k), s);
+    sel_indices = reshape(
+        tcast<IDXType>(indices) + broadcast_to(inplace_reshape(batch_shift, Shape2(batch_size, 1)),
+                                               mxnet::TShape(Shape2(batch_size, k))),
+        Shape1(batch_size * k));
   }
   CHECK_EQ(sel_indices.CheckContiguous(), true);
   if (kWriteTo == req[0] || kAddTo == req[0]) {
     if (kWriteTo == req[0]) {
       in_grad = scalar<DType>(0);
     }
-    mxnet_op::Kernel<fill_ind, xpu>::Launch(s, batch_size * k,
-                                            sel_indices.dptr_,
-                                            out_grad.dptr_,
-                                            req[0],
-                                            in_grad.dptr_);
+    mxnet_op::Kernel<fill_ind, xpu>::Launch(
+        s, batch_size * k, sel_indices.dptr_, out_grad.dptr_, req[0], in_grad.dptr_);
   } else {
     LOG(FATAL) << "Not Implemented!";
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void TopKBackward_(const nnvm::NodeAttrs& attrs,
                    const OpContext& ctx,
                    const std::vector<TBlob>& inputs,
@@ -992,8 +1083,7 @@ void TopKBackward_(const nnvm::NodeAttrs& attrs,
 
 inline uint32_t TopKNumOutputs(const NodeAttrs& attrs) {
   const TopKParam& param = nnvm::get<TopKParam>(attrs.parsed);
-  if (param.ret_typ == topk_enum::kReturnIndices ||
-    param.ret_typ == topk_enum::kReturnMask) {
+  if (param.ret_typ == topk_enum::kReturnIndices || param.ret_typ == topk_enum::kReturnMask) {
     return static_cast<uint32_t>(1);
   } else {
     return static_cast<uint32_t>(2);
@@ -1010,11 +1100,11 @@ inline uint32_t TopKNumVisibleOutputs(const NodeAttrs& attrs) {
 }
 
 inline bool TopKType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_attrs,
-                     std::vector<int> *out_attrs) {
+                     std::vector<int>* in_attrs,
+                     std::vector<int>* out_attrs) {
   const TopKParam& param = nnvm::get<TopKParam>(attrs.parsed);
-  size_t in_size = in_attrs->size();
-  size_t out_size = out_attrs->size();
+  size_t in_size         = in_attrs->size();
+  size_t out_size        = out_attrs->size();
   CHECK_EQ(in_size, 1);
   CHECK(out_size == 1 || out_size == 2);
   //  out_attr[0] -> stores value
@@ -1028,13 +1118,11 @@ inline bool TopKType(const nnvm::NodeAttrs& attrs,
 #endif
           << "Failed to set the type of ret_indices.";
     } else {
-      CHECK(type_assign(&(*out_attrs)[1], param.dtype))
-          << "Failed to set the type of ret_indices.";
+      CHECK(type_assign(&(*out_attrs)[1], param.dtype)) << "Failed to set the type of ret_indices.";
     }
   }
   if (param.ret_typ == topk_enum::kReturnIndices) {
-    CHECK(type_assign(&(*out_attrs)[0], param.dtype))
-            << "Failed to set the type of ret_indices.";
+    CHECK(type_assign(&(*out_attrs)[0], param.dtype)) << "Failed to set the type of ret_indices.";
   } else {
     TYPE_ASSIGN_CHECK(*out_attrs, 0, in_attrs->at(0));
     TYPE_ASSIGN_CHECK(*in_attrs, 0, out_attrs->at(0));
@@ -1044,27 +1132,32 @@ inline bool TopKType(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool TopKShapeImpl(const TopKParam& param,
-                          mxnet::ShapeVector *in_attrs,
-                          mxnet::ShapeVector *out_attrs) {
+                          mxnet::ShapeVector* in_attrs,
+                          mxnet::ShapeVector* out_attrs) {
   CHECK_EQ(in_attrs->size(), 1U);
-  if (param.ret_typ == topk_enum::kReturnIndices ||
-    param.ret_typ == topk_enum::kReturnMask) {
+  if (param.ret_typ == topk_enum::kReturnIndices || param.ret_typ == topk_enum::kReturnMask) {
     CHECK_EQ(out_attrs->size(), 1U);
   } else {
     CHECK_EQ(out_attrs->size(), 2U);
   }
   mxnet::TShape& in_shape = (*in_attrs)[0];
-  size_t batch_size = 0;
-  index_t element_num = 0;  // number of batches + the size of each batch
-  int axis = 0;
-  bool do_transpose = false;
-  bool is_ascend = false;
-  index_t k = 0;
+  size_t batch_size       = 0;
+  index_t element_num     = 0;  // number of batches + the size of each batch
+  int axis                = 0;
+  bool do_transpose       = false;
+  bool is_ascend          = false;
+  index_t k               = 0;
   mxnet::TShape target_shape;
-  ParseTopKParam(in_shape, param,
-    &target_shape, &batch_size, &element_num, &axis, &k, &do_transpose, &is_ascend);
-  if (param.ret_typ == topk_enum::kReturnIndices ||
-    param.ret_typ == topk_enum::kReturnMask) {
+  ParseTopKParam(in_shape,
+                 param,
+                 &target_shape,
+                 &batch_size,
+                 &element_num,
+                 &axis,
+                 &k,
+                 &do_transpose,
+                 &is_ascend);
+  if (param.ret_typ == topk_enum::kReturnIndices || param.ret_typ == topk_enum::kReturnMask) {
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, target_shape);
   } else {
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, target_shape);
@@ -1074,17 +1167,17 @@ inline bool TopKShapeImpl(const TopKParam& param,
 }
 
 inline bool TopKShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector *in_attrs,
-                      mxnet::ShapeVector *out_attrs) {
+                      mxnet::ShapeVector* in_attrs,
+                      mxnet::ShapeVector* out_attrs) {
   const TopKParam& param = nnvm::get<TopKParam>(attrs.parsed);
   return TopKShapeImpl(param, in_attrs, out_attrs);
 }
 
 inline bool SortType(const nnvm::NodeAttrs& attrs,
-                     std::vector<int> *in_attrs,
-                     std::vector<int> *out_attrs) {
-  int data_type = -1;
-  size_t in_size = in_attrs->size();
+                     std::vector<int>* in_attrs,
+                     std::vector<int>* out_attrs) {
+  int data_type   = -1;
+  size_t in_size  = in_attrs->size();
   size_t out_size = out_attrs->size();
   CHECK_EQ(in_size, 1);
   CHECK_EQ(out_size, 2);
@@ -1094,48 +1187,48 @@ inline bool SortType(const nnvm::NodeAttrs& attrs,
   CHECK(type_assign(&(*out_attrs)[1], mshadow::kInt32))
 #endif
       << "Failed to set the type of ret_indices";
-  CHECK(type_assign(&data_type, (*in_attrs)[0])) << "Incompatible dtype of input, in_attrs[0]="
-                                                 << (*in_attrs)[0];
-  CHECK(type_assign(&data_type, (*out_attrs)[0])) << "Incompatible dtype of output, out_attrs[0]="
-                                                  << (*out_attrs)[0];
-  CHECK(type_assign(&(*in_attrs)[0], data_type)) << "Incompatible dtype of input, in_attrs[0]="
-                                                 << (*in_attrs)[0];
-  CHECK(type_assign(&(*out_attrs)[0], data_type)) << "Incompatible dtype of output, out_attrs[0]="
-                                                  << (*out_attrs)[0];
-  if (data_type == -1) return false;
+  CHECK(type_assign(&data_type, (*in_attrs)[0]))
+      << "Incompatible dtype of input, in_attrs[0]=" << (*in_attrs)[0];
+  CHECK(type_assign(&data_type, (*out_attrs)[0]))
+      << "Incompatible dtype of output, out_attrs[0]=" << (*out_attrs)[0];
+  CHECK(type_assign(&(*in_attrs)[0], data_type))
+      << "Incompatible dtype of input, in_attrs[0]=" << (*in_attrs)[0];
+  CHECK(type_assign(&(*out_attrs)[0], data_type))
+      << "Incompatible dtype of output, out_attrs[0]=" << (*out_attrs)[0];
+  if (data_type == -1)
+    return false;
   return true;
 }
 
 inline bool SortShape(const nnvm::NodeAttrs& attrs,
-                      mxnet::ShapeVector *in_attrs,
-                      mxnet::ShapeVector *out_attrs) {
+                      mxnet::ShapeVector* in_attrs,
+                      mxnet::ShapeVector* out_attrs) {
   const SortParam& param = nnvm::get<SortParam>(attrs.parsed);
   TopKParam topk_param;
-  topk_param.axis = param.axis;
+  topk_param.axis      = param.axis;
   topk_param.is_ascend = param.is_ascend;
-  topk_param.k = 0;
-  topk_param.ret_typ = topk_enum::kReturnValue;
+  topk_param.k         = 0;
+  topk_param.ret_typ   = topk_enum::kReturnValue;
   return TopKShapeImpl(topk_param, in_attrs, out_attrs);
 }
 
 inline bool ArgSortType(const nnvm::NodeAttrs& attrs,
-                        std::vector<int> *in_attrs,
-                        std::vector<int> *out_attrs) {
+                        std::vector<int>* in_attrs,
+                        std::vector<int>* out_attrs) {
   const ArgSortParam& param = nnvm::get<ArgSortParam>(attrs.parsed);
-  CHECK(type_assign(&(*out_attrs)[0], param.dtype))
-      << "Failed to set the type of ret_indices.";
+  CHECK(type_assign(&(*out_attrs)[0], param.dtype)) << "Failed to set the type of ret_indices.";
   return true;
 }
 
 inline bool ArgSortShape(const nnvm::NodeAttrs& attrs,
-                         mxnet::ShapeVector *in_attrs,
-                         mxnet::ShapeVector *out_attrs) {
+                         mxnet::ShapeVector* in_attrs,
+                         mxnet::ShapeVector* out_attrs) {
   const ArgSortParam& param = nnvm::get<ArgSortParam>(attrs.parsed);
   TopKParam topk_param;
-  topk_param.axis = param.axis;
+  topk_param.axis      = param.axis;
   topk_param.is_ascend = param.is_ascend;
-  topk_param.k = 0;
-  topk_param.ret_typ = topk_enum::kReturnIndices;
+  topk_param.k         = 0;
+  topk_param.ret_typ   = topk_enum::kReturnIndices;
   return TopKShapeImpl(topk_param, in_attrs, out_attrs);
 }
 }  // namespace op
diff --git a/src/operator/tensor/ordering_op.cc b/src/operator/tensor/ordering_op.cc
index 20147e13f4a9..ec3a07edc4e2 100644
--- a/src/operator/tensor/ordering_op.cc
+++ b/src/operator/tensor/ordering_op.cc
@@ -26,7 +26,6 @@
 #include "./ordering_op-inl.h"
 #include "./elemwise_unary_op.h"
 
-
 namespace mxnet {
 namespace op {
 DMLC_REGISTER_PARAMETER(TopKParam);
@@ -34,8 +33,8 @@ DMLC_REGISTER_PARAMETER(SortParam);
 DMLC_REGISTER_PARAMETER(ArgSortParam);
 
 NNVM_REGISTER_OP(topk)
-.add_alias("_npx_topk")
-.describe(R"code(Returns the indices of the top *k* elements in an input array along the given
+    .add_alias("_npx_topk")
+    .describe(R"code(Returns the indices of the top *k* elements in an input array along the given
  axis (by default).
  If ret_type is set to 'value' returns the value of top *k* elements (instead of indices).
  In case of ret_type = 'both', both value and index would be returned.
@@ -66,49 +65,49 @@ Examples::
   topk(x, ret_typ='both', k=2) = [[[ 0.4,  0.3], [ 0.3,  0.2]] ,  [[ 2.,  0.], [ 1.,  2.]]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(TopKNumOutputs)
-.set_attr_parser(ParamParser<TopKParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", TopKShape)
-.set_attr<nnvm::FInferType>("FInferType", TopKType)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", TopKNumVisibleOutputs)
-.set_attr<FCompute>("FCompute<cpu>", TopK<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    const TopKParam& param = nnvm::get<TopKParam>(n->attrs.parsed);
-    if (param.ret_typ == topk_enum::kReturnValue || param.ret_typ == topk_enum::kReturnBoth) {
-      std::vector<nnvm::NodeEntry> inputs;
-      uint32_t n_out = n->num_outputs();
-      for (uint32_t i = 0; i < n_out; ++i) {
-        inputs.emplace_back(n, i, 0);
-      }
-      return MakeNonlossGradNode("_backward_topk", n, {ograds[0]}, inputs, n->attrs.dict);
-    } else {
-      return MakeZeroGradNodes(n, ograds);
-    }
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "The input array")
-.add_arguments(TopKParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(TopKNumOutputs)
+    .set_attr_parser(ParamParser<TopKParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", TopKShape)
+    .set_attr<nnvm::FInferType>("FInferType", TopKType)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", TopKNumVisibleOutputs)
+    .set_attr<FCompute>("FCompute<cpu>", TopK<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          const TopKParam& param = nnvm::get<TopKParam>(n->attrs.parsed);
+          if (param.ret_typ == topk_enum::kReturnValue || param.ret_typ == topk_enum::kReturnBoth) {
+            std::vector<nnvm::NodeEntry> inputs;
+            uint32_t n_out = n->num_outputs();
+            for (uint32_t i = 0; i < n_out; ++i) {
+              inputs.emplace_back(n, i, 0);
+            }
+            return MakeNonlossGradNode("_backward_topk", n, {ograds[0]}, inputs, n->attrs.dict);
+          } else {
+            return MakeZeroGradNodes(n, ograds);
+          }
+        })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "The input array")
+    .add_arguments(TopKParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_backward_topk)
-.set_num_inputs(3)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<TopKParam>)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FCompute>("FCompute<cpu>", TopKBackward_<cpu>)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-});
+    .set_num_inputs(3)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<TopKParam>)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FCompute>("FCompute<cpu>", TopKBackward_<cpu>)
+    .set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs) {
+      return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+    });
 
 NNVM_REGISTER_OP(sort)
-.add_alias("_npi_sort")
-.describe(R"code(Returns a sorted copy of an input array along the given axis.
+    .add_alias("_npi_sort")
+    .describe(R"code(Returns a sorted copy of an input array along the given axis.
 
 Examples::
 
@@ -131,38 +130,44 @@ Examples::
                           [ 3.,  1.]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(2)
-.set_attr_parser(ParamParser<SortParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", SortShape)
-.set_attr<nnvm::FInferType>("FInferType", SortType)
-.set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs", [](const NodeAttrs& attrs) { return 1; })
-.set_attr<FCompute>("FCompute<cpu>", Sort<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    const SortParam& param = nnvm::get<SortParam>(n->attrs.parsed);
-    std::vector<nnvm::NodeEntry> inputs;
-    uint32_t n_out = n->num_outputs();
-    for (uint32_t i = 0; i < n_out; ++i) {
-      inputs.emplace_back(n, i, 0);
-    }
-    return MakeNonlossGradNode("_backward_topk", n, {ograds[0]}, inputs,
-                               {{"axis", n->attrs.dict["axis"]},
-                                {"k", "0"},
-                                {"ret_typ", "value"},
-                                {"is_ascend", std::to_string(param.is_ascend)}});
-  })
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "The input array")
-.add_arguments(SortParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(2)
+    .set_attr_parser(ParamParser<SortParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", SortShape)
+    .set_attr<nnvm::FInferType>("FInferType", SortType)
+    .set_attr<nnvm::FNumVisibleOutputs>("FNumVisibleOutputs",
+                                        [](const NodeAttrs& attrs) { return 1; })
+    .set_attr<FCompute>("FCompute<cpu>", Sort<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient",
+                               [](const nnvm::ObjectPtr& n,
+                                  const std::vector<nnvm::NodeEntry>& ograds) {
+                                 const SortParam& param = nnvm::get<SortParam>(n->attrs.parsed);
+                                 std::vector<nnvm::NodeEntry> inputs;
+                                 uint32_t n_out = n->num_outputs();
+                                 for (uint32_t i = 0; i < n_out; ++i) {
+                                   inputs.emplace_back(n, i, 0);
+                                 }
+                                 return MakeNonlossGradNode(
+                                     "_backward_topk",
+                                     n,
+                                     {ograds[0]},
+                                     inputs,
+                                     {{"axis", n->attrs.dict["axis"]},
+                                      {"k", "0"},
+                                      {"ret_typ", "value"},
+                                      {"is_ascend", std::to_string(param.is_ascend)}});
+                               })
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "The input array")
+    .add_arguments(SortParam::__FIELDS__());
 
 NNVM_REGISTER_OP(argsort)
-.add_alias("_npi_argsort")
-.describe(R"code(Returns the indices that would sort an input array along the given axis.
+    .add_alias("_npi_argsort")
+    .describe(R"code(Returns the indices that would sort an input array along the given axis.
 
 This function performs sorting along the given axis and returns an array of indices having same shape
 as an input array that index data in sorted order.
@@ -183,19 +188,19 @@ Examples::
   // flatten and then sort
   argsort(x, axis=None) = [ 3.,  1.,  5.,  0.,  4.,  2.]
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<ArgSortParam>)
-.set_attr<mxnet::FInferShape>("FInferShape", ArgSortShape)
-.set_attr<nnvm::FInferType>("FInferType", ArgSortType)
-.set_attr<FCompute>("FCompute<cpu>", ArgSort<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.add_argument("data", "NDArray-or-Symbol", "The input array")
-.add_arguments(ArgSortParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<ArgSortParam>)
+    .set_attr<mxnet::FInferShape>("FInferShape", ArgSortShape)
+    .set_attr<nnvm::FInferType>("FInferType", ArgSortType)
+    .set_attr<FCompute>("FCompute<cpu>", ArgSort<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .add_argument("data", "NDArray-or-Symbol", "The input array")
+    .add_arguments(ArgSortParam::__FIELDS__());
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/ordering_op.cu b/src/operator/tensor/ordering_op.cu
index db47913e9f8d..b1e47dbd75f5 100644
--- a/src/operator/tensor/ordering_op.cu
+++ b/src/operator/tensor/ordering_op.cu
@@ -25,19 +25,14 @@
 // this will be invoked by gcc and compile GPU version
 #include "./ordering_op-inl.h"
 
-
 namespace mxnet {
 namespace op {
-NNVM_REGISTER_OP(topk)
-.set_attr<FCompute>("FCompute<gpu>", TopK<gpu>);
+NNVM_REGISTER_OP(topk).set_attr<FCompute>("FCompute<gpu>", TopK<gpu>);
 
-NNVM_REGISTER_OP(_backward_topk)
-.set_attr<FCompute>("FCompute<gpu>", TopKBackward_<gpu>);
+NNVM_REGISTER_OP(_backward_topk).set_attr<FCompute>("FCompute<gpu>", TopKBackward_<gpu>);
 
-NNVM_REGISTER_OP(sort)
-.set_attr<FCompute>("FCompute<gpu>", Sort<gpu>);
+NNVM_REGISTER_OP(sort).set_attr<FCompute>("FCompute<gpu>", Sort<gpu>);
 
-NNVM_REGISTER_OP(argsort)
-.set_attr<FCompute>("FCompute<gpu>", ArgSort<gpu>);
+NNVM_REGISTER_OP(argsort).set_attr<FCompute>("FCompute<gpu>", ArgSort<gpu>);
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/ravel.cc b/src/operator/tensor/ravel.cc
index e7cd303b8502..69df46a67cef 100644
--- a/src/operator/tensor/ravel.cc
+++ b/src/operator/tensor/ravel.cc
@@ -30,8 +30,9 @@ namespace op {
 DMLC_REGISTER_PARAMETER(RavelParam);
 
 NNVM_REGISTER_OP(_ravel_multi_index)
-.add_alias("ravel_multi_index")
-.describe(R"code(Converts a batch of index arrays into an array of flat indices. The operator follows numpy conventions so a single multi index is given by a column of the input matrix. The leading dimension may be left unspecified by using -1 as placeholder.  
+    .add_alias("ravel_multi_index")
+    .describe(
+        R"code(Converts a batch of index arrays into an array of flat indices. The operator follows numpy conventions so a single multi index is given by a column of the input matrix. The leading dimension may be left unspecified by using -1 as placeholder.  
 
 Examples::
    
@@ -40,24 +41,29 @@ Examples::
    ravel(A, shape=(-1,6)) = [22,41,37]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RavelParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"data"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", RavelOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", RavelForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Batch of multi-indices")
-.add_arguments(RavelParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RavelParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", RavelOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", RavelForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Batch of multi-indices")
+    .add_arguments(RavelParam::__FIELDS__());
 
 NNVM_REGISTER_OP(_unravel_index)
-.add_alias("unravel_index")
-.describe(R"code(Converts an array of flat indices into a batch of index arrays. The operator follows numpy conventions so a single multi index is given by a column of the output matrix. The leading dimension may be left unspecified by using -1 as placeholder.  
+    .add_alias("unravel_index")
+    .describe(
+        R"code(Converts an array of flat indices into a batch of index arrays. The operator follows numpy conventions so a single multi index is given by a column of the output matrix. The leading dimension may be left unspecified by using -1 as placeholder.  
 
 Examples::
 
@@ -74,20 +80,24 @@ Examples::
                                      [[4,5,1],[4,5,3]]]
 
 )code" ADD_FILELINE)
-.set_num_inputs(1)
-.set_num_outputs(1)
-.set_attr_parser(ParamParser<RavelParam>)
-.set_attr<FResourceRequest>("FResourceRequest", [](const NodeAttrs& attrs)
-  { return std::vector<ResourceRequest>{ResourceRequest::kTempSpace}; })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<nnvm::FListInputNames>("FListInputNames", [](const NodeAttrs& attrs)
-  { return std::vector<std::string>{"data"}; } )
-.set_attr<mxnet::FInferShape>("FInferShape", UnravelOpShape)
-.set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
-.set_attr<FCompute>("FCompute<cpu>", UnravelForward<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
-.add_argument("data", "NDArray-or-Symbol", "Array of flat indices")
-.add_arguments(RavelParam::__FIELDS__());
+    .set_num_inputs(1)
+    .set_num_outputs(1)
+    .set_attr_parser(ParamParser<RavelParam>)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", UnravelOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", ElemwiseType<1, 1>)
+    .set_attr<FCompute>("FCompute<cpu>", UnravelForward<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", MakeZeroGradNodes)
+    .add_argument("data", "NDArray-or-Symbol", "Array of flat indices")
+    .add_arguments(RavelParam::__FIELDS__());
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/ravel.cu b/src/operator/tensor/ravel.cu
index 860fd2378238..a0a1cf88fdaa 100644
--- a/src/operator/tensor/ravel.cu
+++ b/src/operator/tensor/ravel.cu
@@ -26,11 +26,9 @@
 namespace mxnet {
 namespace op {
 
-NNVM_REGISTER_OP(_ravel_multi_index)
-.set_attr<FCompute>("FCompute<gpu>", RavelForward<gpu>);
+NNVM_REGISTER_OP(_ravel_multi_index).set_attr<FCompute>("FCompute<gpu>", RavelForward<gpu>);
 
-NNVM_REGISTER_OP(_unravel_index)
-.set_attr<FCompute>("FCompute<gpu>", UnravelForward<gpu>);
+NNVM_REGISTER_OP(_unravel_index).set_attr<FCompute>("FCompute<gpu>", UnravelForward<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/ravel.h b/src/operator/tensor/ravel.h
index abf9383e4ece..3eee02c4a5a8 100644
--- a/src/operator/tensor/ravel.h
+++ b/src/operator/tensor/ravel.h
@@ -40,8 +40,8 @@ struct RavelParam : public dmlc::Parameter<RavelParam> {
   mxnet::TShape shape;
   DMLC_DECLARE_PARAMETER(RavelParam) {
     DMLC_DECLARE_FIELD(shape)
-      .set_default(mxnet::TShape())
-      .describe("Shape of the array into which the multi-indices apply.");
+        .set_default(mxnet::TShape())
+        .describe("Shape of the array into which the multi-indices apply.");
   }
 };
 
@@ -54,10 +54,9 @@ inline bool RavelOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(out_attrs->size(), 1);
   CHECK_GT(shape.ndim(), 0) << "Empty shape parameter for ravel operator.";
   if ((*in_attrs)[0].ndim() > 0) {
-    CHECK_EQ((*in_attrs)[0].ndim(), 2)
-      << "Input to ravel operator must be two-dimensional.";
+    CHECK_EQ((*in_attrs)[0].ndim(), 2) << "Input to ravel operator must be two-dimensional.";
     CHECK_EQ((*in_attrs)[0][0], shape.ndim())
-      << "First dimension of input of ravel operator does not match shape parameter dimension.";
+        << "First dimension of input of ravel operator does not match shape parameter dimension.";
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, Shape1((*in_attrs)[0][1]));
     return true;
   }
@@ -76,97 +75,103 @@ inline bool UnravelOpShape(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1);
   CHECK_EQ(out_attrs->size(), 1);
   CHECK_GT(shape.ndim(), 0) << "Empty shape parameter for unravel operator.";
-  const mxnet::TShape &in_shape = (*in_attrs)[0];
+  const mxnet::TShape& in_shape = (*in_attrs)[0];
   if (in_shape.ndim() > 0) {
     mxnet::TShape out_shape(in_shape.ndim() + 1, -1);
     out_shape[0] = shape.ndim();
     for (int i = 0; i < in_shape.ndim(); ++i) {
-      out_shape[i+1] = in_shape[i];
+      out_shape[i + 1] = in_shape[i];
     }
     SHAPE_ASSIGN_CHECK(*out_attrs, 0, out_shape);
     return true;
   }
   if ((*out_attrs)[0].ndim() > 0) {
-    const mxnet::TShape &out_shape = (*out_attrs)[0];
-    CHECK_EQ((*out_attrs)[0].ndim(), 2)
-      << "Output of unravel operator must be two-dimensional.";
+    const mxnet::TShape& out_shape = (*out_attrs)[0];
+    CHECK_EQ((*out_attrs)[0].ndim(), 2) << "Output of unravel operator must be two-dimensional.";
     CHECK_EQ((*out_attrs)[0][0], shape.ndim())
-      << "First dimension of output of ravel operator does not match shape parameter dimension.";
-    SHAPE_ASSIGN_CHECK(*in_attrs, 0, mxnet::TShape(
-          out_shape.data() + 1, out_shape.data() + out_shape.ndim()));
+        << "First dimension of output of ravel operator does not match shape parameter dimension.";
+    SHAPE_ASSIGN_CHECK(
+        *in_attrs, 0, mxnet::TShape(out_shape.data() + 1, out_shape.data() + out_shape.ndim()));
     return true;
   }
   return false;
 }
 
 struct ravel_index {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(index_t i, index_t N, index_t ndim, index_t *shape,
-                                  DType *unravelled, DType *ravelled) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(index_t i,
+                                  index_t N,
+                                  index_t ndim,
+                                  index_t* shape,
+                                  DType* unravelled,
+                                  DType* ravelled) {
     index_t ret = 0;
-    #pragma unroll
+#pragma unroll
     for (index_t j = 0; j < ndim; ++j) {
-      ret = ret * shape[j] + unravelled[i+j*N];
+      ret = ret * shape[j] + unravelled[i + j * N];
     }
     ravelled[i] = ret;
   }
 };
 
 struct unravel_index {
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int i, index_t N, index_t ndim, index_t *shape,
-                                  DType *unravelled, DType *ravelled) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  index_t N,
+                                  index_t ndim,
+                                  index_t* shape,
+                                  DType* unravelled,
+                                  DType* ravelled) {
     index_t idx(ravelled[i]);
-    #pragma unroll
-    for (int j = ndim-1; j > 0; --j) {
-      index_t tmp = idx / shape[j];
-      unravelled[i+j*N] = idx - tmp*shape[j];
-      idx = tmp;
+#pragma unroll
+    for (int j = ndim - 1; j > 0; --j) {
+      index_t tmp           = idx / shape[j];
+      unravelled[i + j * N] = idx - tmp * shape[j];
+      idx                   = tmp;
     }
     unravelled[i] = idx;
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void RavelForward(const nnvm::NodeAttrs& attrs,
                   const OpContext& ctx,
                   const std::vector<TBlob>& inputs,
                   const std::vector<OpReqType>& req,
                   const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s             = ctx.get_stream<xpu>();
   const mxnet::TShape& shape = nnvm::get<RavelParam>(attrs.parsed).shape;
-  std::vector<index_t> buffer(shape.data(), shape.data()+shape.ndim());
-  Tensor<xpu, 1, index_t> work
-    = ctx.requested[0].get_space_typed<xpu, 1, index_t>(Shape1(shape.ndim()), s);
+  std::vector<index_t> buffer(shape.data(), shape.data() + shape.ndim());
+  Tensor<xpu, 1, index_t> work =
+      ctx.requested[0].get_space_typed<xpu, 1, index_t>(Shape1(shape.ndim()), s);
   Copy(work, Tensor<cpu, 1, index_t>(&buffer[0], Shape1(buffer.size()), 0), s);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    Tensor<xpu, 1, OType> in = inputs[0].FlatTo1D<xpu, OType>(s);
+    Tensor<xpu, 1, OType> in  = inputs[0].FlatTo1D<xpu, OType>(s);
     Tensor<xpu, 1, OType> out = outputs[0].FlatTo1D<xpu, OType>(s);
-    mxnet_op::Kernel<ravel_index, xpu>::Launch(s, out.size(0), out.size(0), in.size(0)/out.size(0),
-                                               work.dptr_, in.dptr_, out.dptr_);
+    mxnet_op::Kernel<ravel_index, xpu>::Launch(
+        s, out.size(0), out.size(0), in.size(0) / out.size(0), work.dptr_, in.dptr_, out.dptr_);
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void UnravelForward(const nnvm::NodeAttrs& attrs,
-                  const OpContext& ctx,
-                  const std::vector<TBlob>& inputs,
-                  const std::vector<OpReqType>& req,
-                  const std::vector<TBlob>& outputs) {
+                    const OpContext& ctx,
+                    const std::vector<TBlob>& inputs,
+                    const std::vector<OpReqType>& req,
+                    const std::vector<TBlob>& outputs) {
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s             = ctx.get_stream<xpu>();
   const mxnet::TShape& shape = nnvm::get<RavelParam>(attrs.parsed).shape;
-  std::vector<index_t> buffer(shape.data(), shape.data()+shape.ndim());
-  Tensor<xpu, 1, index_t> work
-    = ctx.requested[0].get_space_typed<xpu, 1, index_t>(Shape1(shape.ndim()), s);
+  std::vector<index_t> buffer(shape.data(), shape.data() + shape.ndim());
+  Tensor<xpu, 1, index_t> work =
+      ctx.requested[0].get_space_typed<xpu, 1, index_t>(Shape1(shape.ndim()), s);
   Copy(work, Tensor<cpu, 1, index_t>(&buffer[0], Shape1(buffer.size()), 0), s);
   MSHADOW_TYPE_SWITCH(outputs[0].type_flag_, OType, {
-    Tensor<xpu, 1, OType> in = inputs[0].FlatTo1D<xpu, OType>(s);
+    Tensor<xpu, 1, OType> in  = inputs[0].FlatTo1D<xpu, OType>(s);
     Tensor<xpu, 1, OType> out = outputs[0].FlatTo1D<xpu, OType>(s);
     mxnet_op::Kernel<unravel_index, xpu>::Launch(
-        s, in.shape_.Size(), in.shape_.Size(), shape.ndim(),
-        work.dptr_, out.dptr_, in.dptr_);
+        s, in.shape_.Size(), in.shape_.Size(), shape.ndim(), work.dptr_, out.dptr_, in.dptr_);
   });
 }
 
diff --git a/src/operator/tensor/reduce_rtc.cc b/src/operator/tensor/reduce_rtc.cc
index ac39f6f09dc7..5b6d89ebf774 100644
--- a/src/operator/tensor/reduce_rtc.cc
+++ b/src/operator/tensor/reduce_rtc.cc
@@ -281,12 +281,18 @@ __global__ void reduce_lines_kernel(const index_t N, const index_t M,
 }
 )code";
 
-void RTCReduceImpl(Stream<gpu> *s, const TBlob& small, const bool addto,
-                const TBlob& big, const Tensor<gpu, 1, char>& workspace,
-                const ReduceImplConfig& config, const int ndim,
-                const std::string &common_code, int dev_id,
-                const TBlob *lhs = nullptr, const TBlob *rhs = nullptr,
-                const bool use_index = false) {
+void RTCReduceImpl(Stream<gpu>* s,
+                   const TBlob& small,
+                   const bool addto,
+                   const TBlob& big,
+                   const Tensor<gpu, 1, char>& workspace,
+                   const ReduceImplConfig& config,
+                   const int ndim,
+                   const std::string& common_code,
+                   int dev_id,
+                   const TBlob* lhs     = nullptr,
+                   const TBlob* rhs     = nullptr,
+                   const bool use_index = false) {
   using namespace common::cuda::rtc;
   void* small_dptr = small.dptr_;
   if (config.Mnext > 1) {
@@ -298,55 +304,49 @@ void RTCReduceImpl(Stream<gpu> *s, const TBlob& small, const bool addto,
     CHECK_GE(workspace.size(0), config.workspace_size);
   }
 
-  const int by = (config.kernel_1.do_transpose) ?
-    config.kernel_1.blockDim.x : config.kernel_1.blockDim.y;
-  const bool do_unroll = (config.M / (by*config.Mnext) >= unroll_reduce);
-  std::string code = common_code +
-                     "#define UNROLL " +
-                     (do_unroll ? std::to_string(unroll_reduce) : "1") +
-                     "\n"
-                     "const bool do_transpose = " +
-                     (config.kernel_1.do_transpose ? "true" : "false") +
-                     ";\n"
-                     "using InputType0 = " +
-                     common::mshadow_type_info(big.type_flag_).name +
-                     ";\n"
-                     "using OutputType0 = " +
-                     common::mshadow_type_info(small.type_flag_).name +
-                     ";\n"
-                     "using InputType1 = " +
-                     ((lhs != nullptr)
-                     ? common::mshadow_type_info(lhs->type_flag_).name
-                     : "float32") +
-                     ";\n"
-                     "using InputType2 = " +
-                     ((rhs != nullptr)
-                     ? common::mshadow_type_info(rhs->type_flag_).name
-                     : "float32") +
-                     ";\n";
+  const int by =
+      (config.kernel_1.do_transpose) ? config.kernel_1.blockDim.x : config.kernel_1.blockDim.y;
+  const bool do_unroll = (config.M / (by * config.Mnext) >= unroll_reduce);
+  std::string code =
+      common_code + "#define UNROLL " + (do_unroll ? std::to_string(unroll_reduce) : "1") +
+      "\n"
+      "const bool do_transpose = " +
+      (config.kernel_1.do_transpose ? "true" : "false") +
+      ";\n"
+      "using InputType0 = " +
+      common::mshadow_type_info(big.type_flag_).name +
+      ";\n"
+      "using OutputType0 = " +
+      common::mshadow_type_info(small.type_flag_).name +
+      ";\n"
+      "using InputType1 = " +
+      ((lhs != nullptr) ? common::mshadow_type_info(lhs->type_flag_).name : "float32") +
+      ";\n"
+      "using InputType2 = " +
+      ((rhs != nullptr) ? common::mshadow_type_info(rhs->type_flag_).name : "float32") + ";\n";
   if (lhs != nullptr) {
     code += "const bool use_input = true;";
   } else {
     code += "const bool use_input = false;";
   }
 
-  reduce_kernel_params param {};
+  reduce_kernel_params param{};
   for (int i = 0; i < ndim; ++i) {
-    param.big_shape[i] = big.shape_[i];
+    param.big_shape[i]   = big.shape_[i];
     param.small_shape[i] = small.shape_[i];
-    param.rshape[i] = config.rshape[i];
-    param.rstride[i] = config.rstride[i];
+    param.rshape[i]      = config.rshape[i];
+    param.rstride[i]     = config.rstride[i];
     if (lhs != nullptr) {
       param.lhs_shape0[i] = lhs->shape_[i];
       param.rhs_shape0[i] = rhs->shape_[i];
-      param.lhs_shape[i] = config.lhs_shape[i];
-      param.rhs_shape[i] = config.rhs_shape[i];
+      param.lhs_shape[i]  = config.lhs_shape[i];
+      param.rhs_shape[i]  = config.rhs_shape[i];
       param.lhs_stride[i] = config.lhs_stride[i];
       param.rhs_stride[i] = config.rhs_stride[i];
     }
   }
 
-  void *null_ptr = nullptr;
+  void* null_ptr = nullptr;
   std::vector<const void*> args;
   args.emplace_back(&config.N);
   args.emplace_back(&config.M);
@@ -362,17 +362,18 @@ void RTCReduceImpl(Stream<gpu> *s, const TBlob& small, const bool addto,
   args.emplace_back(&param);
   args.emplace_back(&config.Mnext);
 
-  const auto &function_code = (lhs == nullptr)
-                            ? (use_index ? reduce_function_index_code : reduce_function_code)
-                            : reduce_function_use_input_code;
-  const auto& kernel_name = (config.Mnext > 1) ? "reduce_kernel_multi" : "reduce_kernel_single";
-  auto reduce_kernel_func = get_function(code + function_code,
-                                         kernel_name,
-                                         reduce_kernel_code,
-                                         dev_id);
-  launch(reduce_kernel_func, config.kernel_1.gridDim,
+  const auto& function_code = (lhs == nullptr)
+                                  ? (use_index ? reduce_function_index_code : reduce_function_code)
+                                  : reduce_function_use_input_code;
+  const auto& kernel_name   = (config.Mnext > 1) ? "reduce_kernel_multi" : "reduce_kernel_single";
+  auto reduce_kernel_func =
+      get_function(code + function_code, kernel_name, reduce_kernel_code, dev_id);
+  launch(reduce_kernel_func,
+         config.kernel_1.gridDim,
          config.kernel_1.blockDim,
-         config.kernel_1.shMemSize, s, &args);
+         config.kernel_1.shMemSize,
+         s,
+         &args);
 
   if (config.Mnext > 1) {
     args.resize(0);
@@ -382,12 +383,10 @@ void RTCReduceImpl(Stream<gpu> *s, const TBlob& small, const bool addto,
     args.emplace_back(&small_dptr);
     args.emplace_back(&small.dptr_);
 
-    auto reduce_lines_kernel_func = get_function(code + function_code,
-                                                 "reduce_lines_kernel",
-                                                 reduce_lines_kernel_code,
-                                                 dev_id);
-    launch(reduce_lines_kernel_func, config.kernel_2.gridSize,
-           config.kernel_2.blockSize, 0, s, &args);
+    auto reduce_lines_kernel_func =
+        get_function(code + function_code, "reduce_lines_kernel", reduce_lines_kernel_code, dev_id);
+    launch(
+        reduce_lines_kernel_func, config.kernel_2.gridSize, config.kernel_2.blockSize, 0, s, &args);
   }
 }
 
@@ -445,39 +444,38 @@ __global__ void reduce_kernel_M1(const int N,
 }
 )code";
 
-void RTCReduceM1Impl(Stream<gpu> *s, const TBlob &small, const TBlob &big,
-                     const TBlob *lhs, const TBlob *rhs,
-                     const ReduceImplConfig &config, const int ndim,
-                     const std::string &common_code, int dev_id,
+void RTCReduceM1Impl(Stream<gpu>* s,
+                     const TBlob& small,
+                     const TBlob& big,
+                     const TBlob* lhs,
+                     const TBlob* rhs,
+                     const ReduceImplConfig& config,
+                     const int ndim,
+                     const std::string& common_code,
+                     int dev_id,
                      const bool use_index = false) {
   using namespace common::cuda::rtc;
 
-  std::string code = common_code +
-                     "using InputType0 = " +
-                     common::mshadow_type_info(big.type_flag_).name +
-                     ";\n"
-                     "using InputType1 = " +
-                     ((lhs != nullptr)
-                     ? common::mshadow_type_info(lhs->type_flag_).name
-                     : "float32") +
-                     ";\n"
-                     "using InputType2 = " +
-                     ((rhs != nullptr)
-                     ? common::mshadow_type_info(rhs->type_flag_).name
-                     : "float32") +
-                     ";\n"
-                     "using OutputType0 = " +
-                     common::mshadow_type_info(small.type_flag_).name +
-                     ";\n";
+  std::string code =
+      common_code + "using InputType0 = " + common::mshadow_type_info(big.type_flag_).name +
+      ";\n"
+      "using InputType1 = " +
+      ((lhs != nullptr) ? common::mshadow_type_info(lhs->type_flag_).name : "float32") +
+      ";\n"
+      "using InputType2 = " +
+      ((rhs != nullptr) ? common::mshadow_type_info(rhs->type_flag_).name : "float32") +
+      ";\n"
+      "using OutputType0 = " +
+      common::mshadow_type_info(small.type_flag_).name + ";\n";
   if (lhs != nullptr) {
     code += "const bool use_input = true;";
   } else {
     code += "const bool use_input = false;";
   }
 
-  reduce_kernel_M1_params param {};
+  reduce_kernel_M1_params param{};
   for (int i = 0; i < ndim; ++i) {
-    param.big_shape[i] = big.shape_[i];
+    param.big_shape[i]   = big.shape_[i];
     param.small_shape[i] = small.shape_[i];
     if (lhs != nullptr) {
       param.lhs_shape[i] = lhs->shape_[i];
@@ -485,7 +483,7 @@ void RTCReduceM1Impl(Stream<gpu> *s, const TBlob &small, const TBlob &big,
     }
   }
 
-  void *null_ptr = nullptr;
+  void* null_ptr = nullptr;
   std::vector<const void*> args;
   args.emplace_back(&config.N);
   args.emplace_back(&big.dptr_);
@@ -499,16 +497,12 @@ void RTCReduceM1Impl(Stream<gpu> *s, const TBlob &small, const TBlob &big,
   args.emplace_back(&small.dptr_);
   args.emplace_back(&param);
 
-  const auto &function_code = (lhs == nullptr)
-                            ? (use_index ? reduce_function_index_code : reduce_function_code)
-                            : reduce_function_use_input_code;
-  auto reduce_kernel_M1_func = get_function(code + function_code,
-                                            "reduce_kernel_M1",
-                                            reduce_kernel_M1_code,
-                                            dev_id);
-  launch(reduce_kernel_M1_func, config.kernel_1.gridDim,
-         config.kernel_1.blockDim,
-         0, s, &args);
+  const auto& function_code = (lhs == nullptr)
+                                  ? (use_index ? reduce_function_index_code : reduce_function_code)
+                                  : reduce_function_use_input_code;
+  auto reduce_kernel_M1_func =
+      get_function(code + function_code, "reduce_kernel_M1", reduce_kernel_M1_code, dev_id);
+  launch(reduce_kernel_M1_func, config.kernel_1.gridDim, config.kernel_1.blockDim, 0, s, &args);
 }
 
 }  // namespace
@@ -523,11 +517,11 @@ void RTCReduce(const OpContext& ctx,
                const std::string& OP,
                const bool use_index) {
   using namespace mxnet::common::cuda::rtc;
-  if (req == kNullOp) return;
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  if (req == kNullOp)
+    return;
+  Stream<gpu>* s = ctx.get_stream<gpu>();
   ReduceImplConfig config(small.shape_, big.shape_, nullptr, nullptr);
-  std::string common_code = std::string("const OpReqType req = ") +
-                            util::to_string(req) +
+  std::string common_code = std::string("const OpReqType req = ") + util::to_string(req) +
                             ";\n"
                             "#define OP op::" +
                             OP +
@@ -536,16 +530,31 @@ void RTCReduce(const OpContext& ctx,
                             reducer +
                             "\n"
                             "const int ndim = " +
-                            std::to_string(ndim) +
-                            ";\n";
+                            std::to_string(ndim) + ";\n";
   if (config.M == 1) {
-    RTCReduceM1Impl(s, small, big, nullptr, nullptr, config,
-                    ndim, common_code, ctx.run_ctx.ctx.dev_id,
+    RTCReduceM1Impl(s,
+                    small,
+                    big,
+                    nullptr,
+                    nullptr,
+                    config,
+                    ndim,
+                    common_code,
+                    ctx.run_ctx.ctx.dev_id,
                     use_index);
   } else {
-    RTCReduceImpl(s, small, req == kAddTo, big, workspace, config,
-                  ndim, common_code, ctx.run_ctx.ctx.dev_id,
-                  nullptr, nullptr, use_index);
+    RTCReduceImpl(s,
+                  small,
+                  req == kAddTo,
+                  big,
+                  workspace,
+                  config,
+                  ndim,
+                  common_code,
+                  ctx.run_ctx.ctx.dev_id,
+                  nullptr,
+                  nullptr,
+                  use_index);
   }
 }
 
@@ -554,18 +563,18 @@ void RTCReduce(const OpContext& ctx,
                const OpReqType req,
                const Tensor<gpu, 1, char>& workspace,
                const TBlob& big,
-               const TBlob &lhs,
-               const TBlob &rhs,
+               const TBlob& lhs,
+               const TBlob& rhs,
                const std::string& reducer,
                int ndim,
                const std::string& OP1,
                const std::string& OP2) {
   using namespace mxnet::common::cuda::rtc;
-  if (req == kNullOp) return;
-  Stream<gpu> *s = ctx.get_stream<gpu>();
+  if (req == kNullOp)
+    return;
+  Stream<gpu>* s = ctx.get_stream<gpu>();
   ReduceImplConfig config(small.shape_, big.shape_, &lhs.shape_, &rhs.shape_);
-  std::string common_code = std::string("const OpReqType req = ") +
-                            util::to_string(req) +
+  std::string common_code = std::string("const OpReqType req = ") + util::to_string(req) +
                             ";\n"
                             "#define OP1 op::" +
                             OP1 +
@@ -577,13 +586,21 @@ void RTCReduce(const OpContext& ctx,
                             reducer +
                             "\n"
                             "const int ndim = " +
-                            std::to_string(ndim) +
-                            ";\n";
+                            std::to_string(ndim) + ";\n";
   if (config.M == 1) {
     RTCReduceM1Impl(s, small, big, &lhs, &rhs, config, ndim, common_code, ctx.run_ctx.ctx.dev_id);
   } else {
-    RTCReduceImpl(s, small, req == kAddTo, big, workspace, config,
-                  ndim, common_code, ctx.run_ctx.ctx.dev_id, &lhs, &rhs);
+    RTCReduceImpl(s,
+                  small,
+                  req == kAddTo,
+                  big,
+                  workspace,
+                  config,
+                  ndim,
+                  common_code,
+                  ctx.run_ctx.ctx.dev_id,
+                  &lhs,
+                  &rhs);
   }
 }
 
diff --git a/src/operator/tensor/slice-inl.h b/src/operator/tensor/slice-inl.h
index 7450e466440a..870f0c63d687 100644
--- a/src/operator/tensor/slice-inl.h
+++ b/src/operator/tensor/slice-inl.h
@@ -21,7 +21,7 @@
  * \file slice-inl.h
  * \brief
  * \author Zhiyuan Huang
-*/
+ */
 
 #ifndef MXNET_OPERATOR_TENSOR_SLICE_INL_H_
 #define MXNET_OPERATOR_TENSOR_SLICE_INL_H_
@@ -37,18 +37,16 @@ struct SliceParam : public dmlc::Parameter<SliceParam> {
   mxnet::Tuple<dmlc::optional<index_t>> begin, end;
   mxnet::Tuple<dmlc::optional<index_t>> step;
   DMLC_DECLARE_PARAMETER(SliceParam) {
-    DMLC_DECLARE_FIELD(begin)
-    .describe("starting indices for the slice operation, supports negative indices.");
-    DMLC_DECLARE_FIELD(end)
-    .describe("ending indices for the slice operation, supports negative indices.");
+    DMLC_DECLARE_FIELD(begin).describe(
+        "starting indices for the slice operation, supports negative indices.");
+    DMLC_DECLARE_FIELD(end).describe(
+        "ending indices for the slice operation, supports negative indices.");
     DMLC_DECLARE_FIELD(step)
-    .set_default(mxnet::Tuple<dmlc::optional<index_t>>())
-    .describe("step for the slice operation, supports negative values.");
+        .set_default(mxnet::Tuple<dmlc::optional<index_t>>())
+        .describe("step for the slice operation, supports negative values.");
   }
   bool operator==(const SliceParam& other) const {
-    return this->begin == other.begin &&
-           this->end == other.end &&
-           this->step == other.step;
+    return this->begin == other.begin && this->end == other.end && this->step == other.step;
   }
 };
 
@@ -56,13 +54,13 @@ struct SliceParam : public dmlc::Parameter<SliceParam> {
 }  // namespace mxnet
 
 namespace std {
-template<>
+template <>
 struct hash<mxnet::op::SliceParam> {
   size_t operator()(const mxnet::op::SliceParam& val) {
     size_t ret = 0;
-    ret = dmlc::HashCombine(ret, val.begin);
-    ret = dmlc::HashCombine(ret, val.end);
-    ret = dmlc::HashCombine(ret, val.step);
+    ret        = dmlc::HashCombine(ret, val.begin);
+    ret        = dmlc::HashCombine(ret, val.end);
+    ret        = dmlc::HashCombine(ret, val.step);
     return ret;
   }
 };
diff --git a/src/operator/tensor/sort_op.h b/src/operator/tensor/sort_op.h
index 9d5ad84ef568..df3dd1ef7086 100644
--- a/src/operator/tensor/sort_op.h
+++ b/src/operator/tensor/sort_op.h
@@ -50,21 +50,24 @@ namespace op {
  * \param values the values that sorts w.r.t the key
  * \param is_ascend whether to sort key in ascending order
  * \param begin_bit The beginning bit of the different values in keys. Default 0.
- * \param end_bit The ending bit of the different values in keys. Default to 8 * sizeof(dtype of key).
- * \param sorted_keys If specified, keys will be sorted out of place.
- * \param sorted_values If specified, values will be sorted out of place.
+ * \param end_bit The ending bit of the different values in keys. Default to 8 * sizeof(dtype of
+ * key). \param sorted_keys If specified, keys will be sorted out of place. \param sorted_values If
+ * specified, values will be sorted out of place.
  */
-template<typename KDType, typename VDType>
-inline void SortByKey(mshadow::Tensor<cpu, 1, KDType> keys, mshadow::Tensor<cpu, 1, VDType> values,
-                      bool is_ascend = true, mshadow::Tensor<cpu, 1, char>* workspace = nullptr,
-                      const int begin_bit = 0, const int end_bit = sizeof(KDType)*8,
-                      mshadow::Tensor<cpu, 1, KDType>* sorted_keys = nullptr,
+template <typename KDType, typename VDType>
+inline void SortByKey(mshadow::Tensor<cpu, 1, KDType> keys,
+                      mshadow::Tensor<cpu, 1, VDType> values,
+                      bool is_ascend                                 = true,
+                      mshadow::Tensor<cpu, 1, char>* workspace       = nullptr,
+                      const int begin_bit                            = 0,
+                      const int end_bit                              = sizeof(KDType) * 8,
+                      mshadow::Tensor<cpu, 1, KDType>* sorted_keys   = nullptr,
                       mshadow::Tensor<cpu, 1, VDType>* sorted_values = nullptr) {
   CHECK_EQ(keys.CheckContiguous(), true);
   CHECK_EQ(values.CheckContiguous(), true);
   CHECK_EQ(keys.size(0), values.size(0))
-    << "The sizes of key/value are not equal! keys_size: " << keys.size(0)
-    << "values_size: " << values.size(0);
+      << "The sizes of key/value are not equal! keys_size: " << keys.size(0)
+      << "values_size: " << values.size(0);
   std::vector<size_t> idx(keys.size(0));
   std::vector<KDType> keys_vec(keys.size(0));
   std::vector<VDType> values_vec(values.size(0));
@@ -75,21 +78,21 @@ inline void SortByKey(mshadow::Tensor<cpu, 1, KDType> keys, mshadow::Tensor<cpu,
     sorted_values = &values;
   }
   for (index_t i = 0; i < keys.size(0); i++) {
-    idx[i] = i;
-    keys_vec[i] = keys[i];
+    idx[i]        = i;
+    keys_vec[i]   = keys[i];
     values_vec[i] = values[i];
   }
   if (is_ascend) {
-    std::stable_sort(idx.begin(), idx.end(),
-                     [&keys_vec](size_t i1, size_t i2)
-                       {return keys_vec[i1] < keys_vec[i2]; });
+    std::stable_sort(idx.begin(), idx.end(), [&keys_vec](size_t i1, size_t i2) {
+      return keys_vec[i1] < keys_vec[i2];
+    });
   } else {
-    std::stable_sort(idx.begin(), idx.end(),
-                     [&keys_vec](size_t i1, size_t i2)
-                       {return keys_vec[i1] > keys_vec[i2]; });
+    std::stable_sort(idx.begin(), idx.end(), [&keys_vec](size_t i1, size_t i2) {
+      return keys_vec[i1] > keys_vec[i2];
+    });
   }
   for (index_t i = 0; i < values.size(0); i++) {
-    (*sorted_keys)[i] = keys_vec[idx[i]];
+    (*sorted_keys)[i]   = keys_vec[idx[i]];
     (*sorted_values)[i] = values_vec[idx[i]];
   }
 }
@@ -107,10 +110,10 @@ inline void SortByKey(mshadow::Tensor<cpu, 1, KDType> keys, mshadow::Tensor<cpu,
  *                        sorted_values parameter.
  */
 template <typename KDType, typename VDType, typename xpu>
-inline typename std::enable_if<std::is_same<xpu, cpu>::value, size_t>::type
-SortByKeyWorkspaceSize(const size_t num_keys,
-                       const bool keys_in_place = true,
-                       const bool values_in_place = true) {
+inline typename std::enable_if<std::is_same<xpu, cpu>::value, size_t>::type SortByKeyWorkspaceSize(
+    const size_t num_keys,
+    const bool keys_in_place   = true,
+    const bool values_in_place = true) {
   return 0;
 }
 
@@ -120,15 +123,18 @@ SortByKeyWorkspaceSize(const size_t num_keys,
  * \param values the values that sorts w.r.t the key
  * \param is_ascend whether to sort key in ascending order
  * \param begin_bit The beginning bit of the different values in keys. Default 0.
- * \param end_bit The ending bit of the different values in keys. Default to 8 * sizeof(dtype of key).
- * \param sorted_keys If specified, keys will be sorted out of place.
- * \param sorted_values If specified, values will be sorted out of place.
+ * \param end_bit The ending bit of the different values in keys. Default to 8 * sizeof(dtype of
+ * key). \param sorted_keys If specified, keys will be sorted out of place. \param sorted_values If
+ * specified, values will be sorted out of place.
  */
-template<typename KDType, typename VDType>
-inline void SortByKey(mshadow::Tensor<gpu, 1, KDType> keys, mshadow::Tensor<gpu, 1, VDType> values,
-                      bool is_ascend = true, mshadow::Tensor<gpu, 1, char>* workspace = nullptr,
-                      const int begin_bit = 0, const int end_bit = sizeof(KDType)*8,
-                      mshadow::Tensor<gpu, 1, KDType>* sorted_keys = nullptr,
+template <typename KDType, typename VDType>
+inline void SortByKey(mshadow::Tensor<gpu, 1, KDType> keys,
+                      mshadow::Tensor<gpu, 1, VDType> values,
+                      bool is_ascend                                 = true,
+                      mshadow::Tensor<gpu, 1, char>* workspace       = nullptr,
+                      const int begin_bit                            = 0,
+                      const int end_bit                              = sizeof(KDType) * 8,
+                      mshadow::Tensor<gpu, 1, KDType>* sorted_keys   = nullptr,
                       mshadow::Tensor<gpu, 1, VDType>* sorted_values = nullptr);
 /*!
  * \brief CPU/GPU: Return the amount of temporary storage in bytes required for SortByKey
@@ -143,10 +149,10 @@ inline void SortByKey(mshadow::Tensor<gpu, 1, KDType> keys, mshadow::Tensor<gpu,
  *                        sorted_values parameter.
  */
 template <typename KDType, typename VDType, typename xpu>
-inline typename std::enable_if<std::is_same<xpu, gpu>::value, size_t>::type
-SortByKeyWorkspaceSize(const size_t num_keys,
-                       const bool keys_in_place = true,
-                       const bool values_in_place = true);
+inline typename std::enable_if<std::is_same<xpu, gpu>::value, size_t>::type SortByKeyWorkspaceSize(
+    const size_t num_keys,
+    const bool keys_in_place   = true,
+    const bool values_in_place = true);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/sparse_retain-inl.h b/src/operator/tensor/sparse_retain-inl.h
index 04860e6f369f..64ca40dc68bc 100644
--- a/src/operator/tensor/sparse_retain-inl.h
+++ b/src/operator/tensor/sparse_retain-inl.h
@@ -20,7 +20,7 @@
 /*!
  * \file sparse_retain-inl.h
  * \brief Function definition of sparse_retain operator
-*/
+ */
 #ifndef MXNET_OPERATOR_TENSOR_SPARSE_RETAIN_INL_H_
 #define MXNET_OPERATOR_TENSOR_SPARSE_RETAIN_INL_H_
 
@@ -39,15 +39,15 @@ namespace op {
  * \brief sparse retain namespace
  */
 namespace sr {
-enum SparseRetainOpInputs {kArr, kIdx};
-enum SparseRetainOpOutputs {kOut};
+enum SparseRetainOpInputs { kArr, kIdx };
+enum SparseRetainOpOutputs { kOut };
 }  // namespace sr
 
 inline bool SparseRetainOpShape(const nnvm::NodeAttrs& attrs,
-                                mxnet::ShapeVector *in_attrs,
-                                mxnet::ShapeVector *out_attrs) {
-  CHECK_EQ(in_attrs->size(), 2U)
-    << "sparse_retain operator takes 2 arguments (" << in_attrs->size() << " given)";
+                                mxnet::ShapeVector* in_attrs,
+                                mxnet::ShapeVector* out_attrs) {
+  CHECK_EQ(in_attrs->size(), 2U) << "sparse_retain operator takes 2 arguments (" << in_attrs->size()
+                                 << " given)";
   CHECK_EQ(out_attrs->size(), 1U);
 
   mxnet::TShape tshape((*in_attrs)[sr::kArr]);
@@ -58,8 +58,8 @@ inline bool SparseRetainOpShape(const nnvm::NodeAttrs& attrs,
 }
 
 inline bool SparseRetainOpType(const nnvm::NodeAttrs& attrs,
-                               std::vector<int> *in_attrs,
-                               std::vector<int> *out_attrs) {
+                               std::vector<int>* in_attrs,
+                               std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   CHECK_NE((*in_attrs)[sr::kIdx], -1) << "Index type must be set for sparse_retain operator";
@@ -72,18 +72,18 @@ inline bool SparseRetainOpType(const nnvm::NodeAttrs& attrs,
 inline bool SparseRetainForwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                                 const int dev_mask,
                                                 DispatchMode* dispatch_mode,
-                                                std::vector<int> *in_attrs,
-                                                std::vector<int> *out_attrs) {
+                                                std::vector<int>* in_attrs,
+                                                std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   bool dispatched = false;
-  auto &arr_stype = in_attrs->at(sr::kArr);
-  auto &idx_stype = in_attrs->at(sr::kIdx);
-  auto &out_stype = out_attrs->at(sr::kOut);
+  auto& arr_stype = in_attrs->at(sr::kArr);
+  auto& idx_stype = in_attrs->at(sr::kIdx);
+  auto& out_stype = out_attrs->at(sr::kOut);
   if (!dispatched && arr_stype == kRowSparseStorage && idx_stype == kDefaultStorage) {
     // rsp, dns -> rsp
-    dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        &out_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
@@ -91,15 +91,15 @@ inline bool SparseRetainForwardInferStorageType(const nnvm::NodeAttrs& attrs,
 inline bool SparseRetainBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
                                                  const int dev_mask,
                                                  DispatchMode* dispatch_mode,
-                                                 std::vector<int> *in_attrs,
-                                                 std::vector<int> *out_attrs) {
+                                                 std::vector<int>* in_attrs,
+                                                 std::vector<int>* out_attrs) {
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 2U);
-  bool dispatched = false;
-  const auto &ograd_stype = in_attrs->at(sr::kOut);
-  const auto &idx_stype = in_attrs->at(sr::kArr);
-  auto &arr_grad_stype = out_attrs->at(sr::kArr);
-  auto &idx_grad_stype = out_attrs->at(sr::kIdx);
+  bool dispatched         = false;
+  const auto& ograd_stype = in_attrs->at(sr::kOut);
+  const auto& idx_stype   = in_attrs->at(sr::kArr);
+  auto& arr_grad_stype    = out_attrs->at(sr::kArr);
+  auto& idx_grad_stype    = out_attrs->at(sr::kIdx);
   if (!dispatched && ograd_stype == kDefaultStorage && idx_stype == kDefaultStorage) {
     if (type_assign(&arr_grad_stype, kRowSparseStorage) &&
         type_assign(&idx_grad_stype, kDefaultStorage)) {
@@ -119,15 +119,19 @@ inline bool SparseRetainBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
  * where each thread only perform binary search once.
  */
 struct SparseRetainRspThreadKernel {
-  template<typename DType, typename RType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, RType* out_idx,
-                                  const DType* in_data, const RType* in_idx,
-                                  const IType* idx, const size_t nnr,
+  template <typename DType, typename RType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  RType* out_idx,
+                                  const DType* in_data,
+                                  const RType* in_idx,
+                                  const IType* idx,
+                                  const size_t nnr,
                                   const size_t row_length) {
     const RType irow = idx[i];
     int j = -1, left = 0, right = nnr - 1;
     while (left <= right) {
-      int m = left + (right - left) / 2;
+      int m               = left + (right - left) / 2;
       const auto in_idx_m = in_idx[m];
       if (in_idx_m == irow) {
         j = m;
@@ -140,10 +144,10 @@ struct SparseRetainRspThreadKernel {
     }
     out_idx[i] = idx[i];
     if (j >= 0) {
-      const size_t in_offset = j * row_length;
+      const size_t in_offset  = j * row_length;
       const size_t out_offset = i * row_length;
       for (size_t k = 0; k < row_length; ++k) {
-        out_data[out_offset+k] = in_data[in_offset+k];
+        out_data[out_offset + k] = in_data[in_offset + k];
       }
     }
   }
@@ -160,26 +164,32 @@ struct SparseRetainRspThreadKernel {
  * that idx has been sorted in ascending order.
  */
 struct SparseRetainRspRowBlockKernel {
-  template<typename DType, typename RType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, RType* out_idx,
-                                  const DType* in_data, const RType* in_idx,
-                                  const IType* idx, const size_t num_indices,
-                                  const size_t nnr, const size_t row_length,
+  template <typename DType, typename RType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  RType* out_idx,
+                                  const DType* in_data,
+                                  const RType* in_idx,
+                                  const IType* idx,
+                                  const size_t num_indices,
+                                  const size_t nnr,
+                                  const size_t row_length,
                                   const size_t seg_len) {
     const size_t seg_start = i * seg_len;
-    if (seg_start >= num_indices) return;
-    const size_t seg_end = (seg_start+seg_len < num_indices? seg_start+seg_len : num_indices);
+    if (seg_start >= num_indices)
+      return;
+    const size_t seg_end = (seg_start + seg_len < num_indices ? seg_start + seg_len : num_indices);
     for (size_t j = seg_start; j < seg_end; ++j) {
       out_idx[j] = idx[j];
     }
     // use binary search to find the lower bound of idx[seg_start] in in_idx
     const RType* first = in_idx;
-    const RType* last = in_idx + nnr;
-    const auto val = idx[seg_start];
+    const RType* last  = in_idx + nnr;
+    const auto val     = idx[seg_start];
     const RType* it;
     int count = last - first, step;
     while (count > 0) {
-      it = first;
+      it   = first;
       step = count / 2;
       it += step;
       if (*it < val) {
@@ -191,16 +201,16 @@ struct SparseRetainRspRowBlockKernel {
     }
     size_t cur_row_idx = first - in_idx;
     // end of binary search
-    if (cur_row_idx == nnr ||  in_idx[cur_row_idx] > idx[seg_end-1]) {
+    if (cur_row_idx == nnr || in_idx[cur_row_idx] > idx[seg_end - 1]) {
       return;
     }
     size_t cur_idx = seg_start;
     while (cur_row_idx < nnr && cur_idx < seg_end) {
       if (in_idx[cur_row_idx] == idx[cur_idx]) {
-        const size_t in_offset = cur_row_idx * row_length;
+        const size_t in_offset  = cur_row_idx * row_length;
         const size_t out_offset = cur_idx * row_length;
         for (size_t k = 0; k < row_length; ++k) {
-          out_data[out_offset+k] = in_data[in_offset+k];
+          out_data[out_offset + k] = in_data[in_offset + k];
         }
         ++cur_row_idx;
         ++cur_idx;
@@ -218,7 +228,7 @@ struct SparseRetainRspRowBlockKernel {
  * Only used when input rsp is dense.
  */
 struct SparseRetainCopyIndices {
-  template<typename RType, typename IType>
+  template <typename RType, typename IType>
   MSHADOW_XINLINE static void Map(int i, RType* out_idx, IType* idx) {
     out_idx[i] = idx[i];
   }
@@ -232,12 +242,15 @@ struct SparseRetainCopyIndices {
  * instead of rows.
  */
 struct SparseRetainCopyRetainedRowsFromDnsPerElem {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_rows, const DType* in_rows,
-                                  const IType* idx, const size_t row_length) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_rows,
+                                  const DType* in_rows,
+                                  const IType* idx,
+                                  const size_t row_length) {
     const size_t irow = i / row_length;
     const size_t icol = i % row_length;
-    out_rows[i] = in_rows[static_cast<size_t>(idx[irow]) * row_length + icol];
+    out_rows[i]       = in_rows[static_cast<size_t>(idx[irow]) * row_length + icol];
   }
 };
 
@@ -248,9 +261,12 @@ struct SparseRetainCopyRetainedRowsFromDnsPerElem {
  * So it's parallelized by out_rows' rows instead of elements.
  */
 struct SparseRetainCopyRetainedRowsFromDnsPerRow {
-  template<typename DType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_rows, const DType* in_rows,
-                                  const IType* idx, const size_t row_length) {
+  template <typename DType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_rows,
+                                  const DType* in_rows,
+                                  const IType* idx,
+                                  const size_t row_length) {
     const size_t dst_offset = i * row_length;
     const size_t src_offset = static_cast<size_t>(idx[i]) * row_length;
     for (size_t j = 0; j < row_length; j++) {
@@ -259,18 +275,19 @@ struct SparseRetainCopyRetainedRowsFromDnsPerRow {
   }
 };
 
-template<typename xpu>
-void SparseRetainOpForwardRspImpl(mshadow::Stream<xpu> *s,
+template <typename xpu>
+void SparseRetainOpForwardRspImpl(mshadow::Stream<xpu>* s,
                                   const NDArray& input_nd,
                                   const TBlob& idx_data,
                                   const OpReqType req,
                                   NDArray* output_nd) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   CHECK_EQ(req, kWriteTo) << "SparseRetainOpForwardRspImpl only support req = kWriteTo now";
   CHECK_EQ(input_nd.storage_type(), kRowSparseStorage)
-    << "SparseRetainOpForwardRspImpl operator only takes row sparse NDArray as input";
+      << "SparseRetainOpForwardRspImpl operator only takes row sparse NDArray as input";
   CHECK_EQ(output_nd->storage_type(), kRowSparseStorage)
-    << "SparseRetainOpForwardRspImpl operator only outputs row sparse NDArray";
+      << "SparseRetainOpForwardRspImpl operator only outputs row sparse NDArray";
 
   if (!input_nd.storage_initialized() || idx_data.Size() == 0U || input_nd.shape()[0] == 0) {
     FillZerosRspImpl(s, *output_nd);
@@ -278,51 +295,65 @@ void SparseRetainOpForwardRspImpl(mshadow::Stream<xpu> *s,
   }
 
   const TBlob input_data = input_nd.data();
-  const TBlob input_idx = input_nd.aux_data(rowsparse::kIdx);
+  const TBlob input_idx  = input_nd.aux_data(rowsparse::kIdx);
 
   output_nd->CheckAndAlloc({mshadow::Shape1(idx_data.Size())});
-  TBlob output_data = output_nd->data();
-  TBlob output_idx = output_nd->aux_data(rowsparse::kIdx);
+  TBlob output_data     = output_nd->data();
+  TBlob output_idx      = output_nd->aux_data(rowsparse::kIdx);
   const auto row_length = input_data.shape_.ProdShape(1, input_data.shape_.ndim());
 
   using namespace mxnet_op;
   MSHADOW_TYPE_SWITCH(output_data.type_flag_, DType, {  // output data type
     Kernel<set_zero, xpu>::Launch(s, output_data.Size(), output_data.dptr<DType>());
     MSHADOW_IDX_TYPE_SWITCH(output_idx.type_flag_, RType, {  // row index data type
-      MSHADOW_TYPE_SWITCH(idx_data.type_flag_, IType, {  // index array data type
+      MSHADOW_TYPE_SWITCH(idx_data.type_flag_, IType, {      // index array data type
         if (input_idx.Size() == static_cast<size_t>(input_nd.shape()[0])) {  // input rsp is dense
           using namespace mshadow;
           // copy indices
           Tensor<xpu, 1, RType> output_idx_tensor = output_idx.FlatTo1D<xpu, RType>(s);
-          const size_t num_rows_retained = output_idx.Size();
+          const size_t num_rows_retained          = output_idx.Size();
           if (output_idx.type_flag_ == idx_data.type_flag_) {  // same type, use Copy
             const Tensor<xpu, 1, RType> idx_tensor = idx_data.FlatTo1D<xpu, RType>(s);
             Copy(output_idx_tensor, idx_tensor, s);
           } else {  // different index types, use Kernel::Launch
-            Kernel<SparseRetainCopyIndices, xpu>::Launch(s, num_rows_retained,
-                output_idx.dptr<RType>(), idx_data.dptr<IType>());
+            Kernel<SparseRetainCopyIndices, xpu>::Launch(
+                s, num_rows_retained, output_idx.dptr<RType>(), idx_data.dptr<IType>());
           }
           // copy data
           if (std::is_same<xpu, cpu>::value) {  // For cpu, parallelize by rows
-            Kernel<SparseRetainCopyRetainedRowsFromDnsPerRow, xpu>::Launch(s, idx_data.Size(),
-              output_data.dptr<DType>(), input_data.dptr<DType>(),
-              idx_data.dptr<IType>(), row_length);
+            Kernel<SparseRetainCopyRetainedRowsFromDnsPerRow, xpu>::Launch(
+                s,
+                idx_data.Size(),
+                output_data.dptr<DType>(),
+                input_data.dptr<DType>(),
+                idx_data.dptr<IType>(),
+                row_length);
           } else {  // For gpu, parallelize by elements
-            Kernel<SparseRetainCopyRetainedRowsFromDnsPerElem, xpu>::Launch(s, output_data.Size(),
-              output_data.dptr<DType>(), input_data.dptr<DType>(),
-              idx_data.dptr<IType>(), row_length);
+            Kernel<SparseRetainCopyRetainedRowsFromDnsPerElem, xpu>::Launch(
+                s,
+                output_data.Size(),
+                output_data.dptr<DType>(),
+                input_data.dptr<DType>(),
+                idx_data.dptr<IType>(),
+                row_length);
           }
         } else {  // input rsp is not dense
-          Kernel<SparseRetainRspThreadKernel, xpu>::Launch(s, idx_data.Size(),
-              output_data.dptr<DType>(), output_idx.dptr<RType>(), input_data.dptr<DType>(),
-              input_idx.dptr<RType>(), idx_data.dptr<IType>(), input_data.shape_[0], row_length);
+          Kernel<SparseRetainRspThreadKernel, xpu>::Launch(s,
+                                                           idx_data.Size(),
+                                                           output_data.dptr<DType>(),
+                                                           output_idx.dptr<RType>(),
+                                                           input_data.dptr<DType>(),
+                                                           input_idx.dptr<RType>(),
+                                                           idx_data.dptr<IType>(),
+                                                           input_data.shape_[0],
+                                                           row_length);
         }
       });
     });
   });
 }
 
-template<typename xpu>
+template <typename xpu>
 void SparseRetainOpForwardEx(const nnvm::NodeAttrs& attrs,
                              const OpContext& ctx,
                              const std::vector<NDArray>& inputs,
@@ -331,36 +362,43 @@ void SparseRetainOpForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 2U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  if (req[sr::kOut] == kNullOp) return;
+  if (req[sr::kOut] == kNullOp)
+    return;
   CHECK_EQ(req[sr::kOut], kWriteTo) << "sparse_retain only supports req=\'write\'";
   CHECK_EQ(inputs[sr::kIdx].storage_type(), kDefaultStorage)
-    << "sparse_retain operator only takes default NDArray as its index array";
+      << "sparse_retain operator only takes default NDArray as its index array";
   if (inputs[sr::kArr].storage_type() == kRowSparseStorage) {
     NDArray output_nd = outputs[sr::kOut];
-    SparseRetainOpForwardRspImpl<xpu>(ctx.get_stream<xpu>(), inputs[sr::kArr],
-        inputs[sr::kIdx].data(), req[sr::kOut], &output_nd);
+    SparseRetainOpForwardRspImpl<xpu>(ctx.get_stream<xpu>(),
+                                      inputs[sr::kArr],
+                                      inputs[sr::kIdx].data(),
+                                      req[sr::kOut],
+                                      &output_nd);
   } else {
     LOG(FATAL) << "sparse_retain op only supports row-sparse ndarrays as input";
   }
 }
 
-template<int req>
+template <int req>
 struct SparseRetainRspGradKernel {
-  template<typename DType, typename RType, typename IType>
-  MSHADOW_XINLINE static void Map(int i, DType* in_grad, RType* in_grad_idx,
-                                  const DType* out_grad, const IType* idx,
+  template <typename DType, typename RType, typename IType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* in_grad,
+                                  RType* in_grad_idx,
+                                  const DType* out_grad,
+                                  const IType* idx,
                                   const size_t row_length) {
-    const RType irow = idx[i];
-    in_grad_idx[i] = irow;
+    const RType irow        = idx[i];
+    in_grad_idx[i]          = irow;
     const size_t out_offset = irow * row_length;
-    const size_t in_offset = i * row_length;
+    const size_t in_offset  = i * row_length;
     for (size_t j = 0; j < row_length; ++j) {
-      KERNEL_ASSIGN(in_grad[in_offset+j], req, out_grad[out_offset+j]);
+      KERNEL_ASSIGN(in_grad[in_offset + j], req, out_grad[out_offset + j]);
     }
   }
 };
 
-template<typename xpu>
+template <typename xpu>
 void SparseRetainOpBackwardEx(const nnvm::NodeAttrs& attrs,
                               const OpContext& ctx,
                               const std::vector<NDArray>& inputs,
@@ -368,23 +406,23 @@ void SparseRetainOpBackwardEx(const nnvm::NodeAttrs& attrs,
                               const std::vector<NDArray>& outputs) {
   CHECK_EQ(req.size(), 2U);
   CHECK_EQ(req[sr::kIdx], kNullOp);
-  if (req[sr::kArr] == kNullOp) return;
+  if (req[sr::kArr] == kNullOp)
+    return;
   CHECK_EQ(req[sr::kArr], kWriteTo);
 
   CHECK_EQ(inputs.size(), 2U);
-  CHECK_EQ(outputs.size(), 2U)
-    << "sparse_retain does not support calculating gradients of indices";
+  CHECK_EQ(outputs.size(), 2U) << "sparse_retain does not support calculating gradients of indices";
 
   CHECK_EQ(inputs[sr::kOut].storage_type(), kDefaultStorage)
-    << "sparse_retain backward only takes default NDArray as ograd";
+      << "sparse_retain backward only takes default NDArray as ograd";
   CHECK_EQ(inputs[sr::kIdx].storage_type(), kDefaultStorage)
-    << "sparse_retain backward only takes default NDArray as its index array";
+      << "sparse_retain backward only takes default NDArray as its index array";
   CHECK_EQ(outputs[sr::kArr].storage_type(), kRowSparseStorage)
-    << "sparse_retain backward only outputs row sparse NDArray as grad of input";
+      << "sparse_retain backward only outputs row sparse NDArray as grad of input";
 
   using namespace mxnet_op;
   using namespace mshadow;
-  Stream<xpu> *s = ctx.get_stream<xpu>();
+  Stream<xpu>* s       = ctx.get_stream<xpu>();
   const TBlob idx_data = inputs[sr::kIdx].data();
   if (idx_data.Size() == 0U) {
     FillZerosRspImpl(s, outputs[sr::kArr]);
@@ -395,24 +433,27 @@ void SparseRetainOpBackwardEx(const nnvm::NodeAttrs& attrs,
 
   NDArray in_grad_nd = outputs[sr::kArr];
   in_grad_nd.CheckAndAlloc({mshadow::Shape1(idx_data.Size())});
-  TBlob in_grad_data = in_grad_nd.data();
-  TBlob in_grad_idx = in_grad_nd.aux_data(rowsparse::kIdx);
+  TBlob in_grad_data    = in_grad_nd.data();
+  TBlob in_grad_idx     = in_grad_nd.aux_data(rowsparse::kIdx);
   const auto row_length = out_grad_data.shape_.ProdShape(1, out_grad_data.shape_.ndim());
 
-  MSHADOW_TYPE_SWITCH(out_grad_data.type_flag_, DType, {  // output data type
+  MSHADOW_TYPE_SWITCH(out_grad_data.type_flag_, DType, {      // output data type
     MSHADOW_IDX_TYPE_SWITCH(in_grad_idx.type_flag_, RType, {  // row index data type
-      MSHADOW_TYPE_SWITCH(idx_data.type_flag_, IType, {  // index array data type
+      MSHADOW_TYPE_SWITCH(idx_data.type_flag_, IType, {       // index array data type
         MXNET_ASSIGN_REQ_SWITCH(req[sr::kArr], req_type, {
-          Kernel<SparseRetainRspGradKernel<req_type>, xpu>::Launch(
-              s, in_grad_idx.Size(), in_grad_data.dptr<DType>(), in_grad_idx.dptr<RType>(),
-              out_grad_data.dptr<DType>(), idx_data.dptr<IType>(), row_length);
+          Kernel<SparseRetainRspGradKernel<req_type>, xpu>::Launch(s,
+                                                                   in_grad_idx.Size(),
+                                                                   in_grad_data.dptr<DType>(),
+                                                                   in_grad_idx.dptr<RType>(),
+                                                                   out_grad_data.dptr<DType>(),
+                                                                   idx_data.dptr<IType>(),
+                                                                   row_length);
         });
       });
     });
   });
 }
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/tensor/sparse_retain.cc b/src/operator/tensor/sparse_retain.cc
index d0db53b8ffa1..e109733150f2 100644
--- a/src/operator/tensor/sparse_retain.cc
+++ b/src/operator/tensor/sparse_retain.cc
@@ -20,7 +20,7 @@
 /*!
  * \file sparse_retain.cc
  * \brief CPU implementation of sparse_retain operator
-*/
+ */
 
 #include "./sparse_retain-inl.h"
 namespace mxnet {
@@ -31,7 +31,7 @@ namespace op {
 // accepts row-sparse format ndarrays. It will be registered
 // under mxnet.ndarray.sparse with name retain.
 NNVM_REGISTER_OP(_sparse_retain)
-.describe(R"code(Pick rows specified by user input index array from a row sparse matrix
+    .describe(R"code(Pick rows specified by user input index array from a row sparse matrix
 and save them in the output sparse matrix.
 
 Example::
@@ -51,30 +51,33 @@ The storage type of ``retain`` output depends on storage types of inputs
 - otherwise, ``retain`` is not supported
 
 )code" ADD_FILELINE)
-.set_num_inputs(2)
-.set_num_outputs(1)
-.set_attr<nnvm::FListInputNames>("FListInputNames",
-  [](const NodeAttrs& attrs) {
-    return std::vector<std::string>{"data", "indices"};
-  })
-.set_attr<mxnet::FInferShape>("FInferShape", SparseRetainOpShape)
-.set_attr<nnvm::FInferType>("FInferType", SparseRetainOpType)
-.set_attr<FInferStorageType>("FInferStorageType", SparseRetainForwardInferStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SparseRetainOpForwardEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient",
-  [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
-    return MakeNonlossGradNode("_backward_sparse_retain", n, ograds,
-                               {n->inputs[sr::kIdx]}, n->attrs.dict);
-  })
-.add_argument("data", "NDArray-or-Symbol", "The input array for sparse_retain operator.")
-.add_argument("indices", "NDArray-or-Symbol", "The index array of rows ids that will be retained.");
+    .set_num_inputs(2)
+    .set_num_outputs(1)
+    .set_attr<nnvm::FListInputNames>("FListInputNames",
+                                     [](const NodeAttrs& attrs) {
+                                       return std::vector<std::string>{"data", "indices"};
+                                     })
+    .set_attr<mxnet::FInferShape>("FInferShape", SparseRetainOpShape)
+    .set_attr<nnvm::FInferType>("FInferType", SparseRetainOpType)
+    .set_attr<FInferStorageType>("FInferStorageType", SparseRetainForwardInferStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SparseRetainOpForwardEx<cpu>)
+    .set_attr<nnvm::FGradient>(
+        "FGradient",
+        [](const nnvm::ObjectPtr& n, const std::vector<nnvm::NodeEntry>& ograds) {
+          return MakeNonlossGradNode(
+              "_backward_sparse_retain", n, ograds, {n->inputs[sr::kIdx]}, n->attrs.dict);
+        })
+    .add_argument("data", "NDArray-or-Symbol", "The input array for sparse_retain operator.")
+    .add_argument("indices",
+                  "NDArray-or-Symbol",
+                  "The index array of rows ids that will be retained.");
 
 NNVM_REGISTER_OP(_backward_sparse_retain)
-.set_num_inputs(2)
-.set_num_outputs(2)
-.set_attr<nnvm::TIsBackward>("TIsBackward", true)
-.set_attr<FInferStorageType>("FInferStorageType", SparseRetainBackwardInferStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SparseRetainOpBackwardEx<cpu>);
+    .set_num_inputs(2)
+    .set_num_outputs(2)
+    .set_attr<nnvm::TIsBackward>("TIsBackward", true)
+    .set_attr<FInferStorageType>("FInferStorageType", SparseRetainBackwardInferStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SparseRetainOpBackwardEx<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/sparse_retain.cu b/src/operator/tensor/sparse_retain.cu
index bff8b8b12fcf..1577a9f35f5a 100644
--- a/src/operator/tensor/sparse_retain.cu
+++ b/src/operator/tensor/sparse_retain.cu
@@ -20,17 +20,17 @@
 /*!
  * \file sparse_retain.cu
  * \brief GPU implementation of sparse_retain operator
-*/
+ */
 
 #include "./sparse_retain-inl.h"
 namespace mxnet {
 namespace op {
 
 NNVM_REGISTER_OP(_sparse_retain)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SparseRetainOpForwardEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SparseRetainOpForwardEx<gpu>);
 
 NNVM_REGISTER_OP(_backward_sparse_retain)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SparseRetainOpBackwardEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SparseRetainOpBackwardEx<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/square_sum-inl.h b/src/operator/tensor/square_sum-inl.h
index c2e3182c6a1e..799c389dc0b0 100644
--- a/src/operator/tensor/square_sum-inl.h
+++ b/src/operator/tensor/square_sum-inl.h
@@ -50,20 +50,20 @@ inline bool SquareSumForwardInferStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 1U);
   CHECK_EQ(out_attrs->size(), 1U);
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
-  const auto& in_stype = in_attrs->at(0);
-  auto& out_stype = out_attrs->at(0);
-  bool dispatched = false;
-  const mxnet::TShape axis = param.axis.has_value() ? param.axis.value() : mxnet::TShape();
-  if (!dispatched && in_stype == kRowSparseStorage &&
-      axis.ndim() > 0 && axis[0] == 1 && param.keepdims) {
+  const auto& in_stype         = in_attrs->at(0);
+  auto& out_stype              = out_attrs->at(0);
+  bool dispatched              = false;
+  const mxnet::TShape axis     = param.axis.has_value() ? param.axis.value() : mxnet::TShape();
+  if (!dispatched && in_stype == kRowSparseStorage && axis.ndim() > 0 && axis[0] == 1 &&
+      param.keepdims) {
     // sum per row and keep dims
-    dispatched = storage_type_assign(&out_stype, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        &out_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   if (!dispatched && in_stype == kRowSparseStorage && axis.ndim() > 0 &&
       (axis[0] == 0 || (axis[0] == 1 && !param.keepdims))) {
-      dispatched = storage_type_assign(&out_stype, kDefaultStorage,
-                                       dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched =
+        storage_type_assign(&out_stype, kDefaultStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
@@ -77,13 +77,13 @@ inline bool SquareSumBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(in_attrs->size(), 2U);
   CHECK_EQ(out_attrs->size(), 1U);
   const auto& ograd_stype = in_attrs->at(0);
-  const auto& in_stype = in_attrs->at(1);
-  auto& grad_stype = out_attrs->at(0);
-  bool dispatched = false;
+  const auto& in_stype    = in_attrs->at(1);
+  auto& grad_stype        = out_attrs->at(0);
+  bool dispatched         = false;
   if (!dispatched && (ograd_stype == kDefaultStorage || ograd_stype == kRowSparseStorage) &&
       in_stype == kRowSparseStorage) {
-    dispatched = storage_type_assign(&grad_stype, kRowSparseStorage,
-                                     dispatch_mode, DispatchMode::kFComputeEx);
+    dispatched = storage_type_assign(
+        &grad_stype, kRowSparseStorage, dispatch_mode, DispatchMode::kFComputeEx);
   }
   return dispatched;
 }
@@ -95,24 +95,27 @@ inline bool SquareSumBackwardInferStorageType(const nnvm::NodeAttrs& attrs,
  * if axis = 1, same as mx.nd.sum(tensor*tensor, axis=1)
  * where tensor*tensor is elemwise multiplication of two ndarrays.
  */
-template<int req, int axis, bool keepdim>
+template <int req, int axis, bool keepdim>
 struct SquareSumRspKernel;
 
 /*!
  * \brief square sum of a rsp on axis=0 without keeping the dim
  */
-template<int req>
+template <int req>
 struct SquareSumRspKernel<req, 0, false> {
   /*!
    * \param j the element index in out_data and column id of in_data
    */
-  template<typename DType>
-  MSHADOW_XINLINE static void Map(int j, DType* out_data, const DType* in_data,
-                                  const int64_t nnr, const int64_t num_cols) {
+  template <typename DType>
+  MSHADOW_XINLINE static void Map(int j,
+                                  DType* out_data,
+                                  const DType* in_data,
+                                  const int64_t nnr,
+                                  const int64_t num_cols) {
     DType sum, residual;
     mshadow::red::sum::SetInitValue(sum, residual);
     for (int64_t i = 0; i < nnr; ++i) {
-      const DType val = in_data[i*num_cols+j] * in_data[i*num_cols+j];
+      const DType val = in_data[i * num_cols + j] * in_data[i * num_cols + j];
       mshadow::red::sum::Reduce(sum, val, residual);
     }
     KERNEL_ASSIGN(out_data[j], req, sum);
@@ -122,19 +125,22 @@ struct SquareSumRspKernel<req, 0, false> {
 /*!
  * \brief square sum of a rsp on axis=1 without keeping the dim
  */
-template<int req>
+template <int req>
 struct SquareSumRspKernel<req, 1, false> {
   /*!
    * \param i the i-th non-zero row of in_data
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, DType* out_data, const IType* in_row_idx,
-                                  const DType* in_data, const int64_t num_cols) {
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  DType* out_data,
+                                  const IType* in_row_idx,
+                                  const DType* in_data,
+                                  const int64_t num_cols) {
     DType sum, residual;
     mshadow::red::sum::SetInitValue(sum, residual);
     const int64_t offset = i * num_cols;
     for (int64_t j = 0; j < num_cols; ++j) {
-      const DType val = in_data[offset+j] * in_data[offset+j];
+      const DType val = in_data[offset + j] * in_data[offset + j];
       mshadow::red::sum::Reduce(sum, val, residual);
     }
     KERNEL_ASSIGN(out_data[in_row_idx[i]], req, sum);
@@ -144,31 +150,34 @@ struct SquareSumRspKernel<req, 1, false> {
 /*!
  * \brief square sum of a rsp on axis=1 keeping the dim
  */
-template<int req>
+template <int req>
 struct SquareSumRspKernel<req, 1, true> {
   /*!
    * \param i the i-th non-zero row of in_data
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, IType* out_row_idx, DType* out_data,
-                                  const IType* in_row_idx, const DType* in_data,
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  IType* out_row_idx,
+                                  DType* out_data,
+                                  const IType* in_row_idx,
+                                  const DType* in_data,
                                   const int64_t num_cols) {
     DType sum, residual;
     mshadow::red::sum::SetInitValue(sum, residual);
-    out_row_idx[i] = in_row_idx[i];
+    out_row_idx[i]       = in_row_idx[i];
     const int64_t offset = i * num_cols;
     for (int64_t j = 0; j < num_cols; ++j) {
-      const DType val = in_data[offset+j] * in_data[offset+j];
+      const DType val = in_data[offset + j] * in_data[offset + j];
       mshadow::red::sum::Reduce(sum, val, residual);
     }
     KERNEL_ASSIGN(out_data[i], req, sum);
   }
 };
 
-template<int req, int axis, int ograd_stype = kDefaultStorage, bool is_data_full_rsp = false>
+template <int req, int axis, int ograd_stype = kDefaultStorage, bool is_data_full_rsp = false>
 struct SquareSumRspGradKernel;
 
-template<int req>
+template <int req>
 struct SquareSumRspGradKernel<req, 0> {
   /*!
    * \param i element index in in_grad and in_data
@@ -178,17 +187,21 @@ struct SquareSumRspGradKernel<req, 0> {
    * \param in_row_idx row idx of the op's input
    * \param in_data op's input
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, IType* in_grad_row_idx, DType* in_grad,
-                                  const DType* out_grad, const IType* in_row_idx,
-                                  const DType* in_data, const int64_t num_cols) {
-    const int64_t row = i / num_cols;
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  IType* in_grad_row_idx,
+                                  DType* in_grad,
+                                  const DType* out_grad,
+                                  const IType* in_row_idx,
+                                  const DType* in_data,
+                                  const int64_t num_cols) {
+    const int64_t row    = i / num_cols;
     in_grad_row_idx[row] = in_row_idx[row];
-    KERNEL_ASSIGN(in_grad[i], req, 2*in_data[i]*out_grad[i%num_cols]);
+    KERNEL_ASSIGN(in_grad[i], req, 2 * in_data[i] * out_grad[i % num_cols]);
   }
 };
 
-template<int req>
+template <int req>
 struct SquareSumRspGradKernel<req, 1> {
   /*!
    * \param i element index in in_grad and in_data
@@ -198,13 +211,17 @@ struct SquareSumRspGradKernel<req, 1> {
    * \param in_row_idx row idx of the op's input
    * \param in_data op's input
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, IType* in_grad_row_idx, DType* in_grad,
-                                  const DType* out_grad, const IType* in_row_idx,
-                                  const DType* in_data, const int64_t num_cols) {
-    const int64_t row = i / num_cols;
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  IType* in_grad_row_idx,
+                                  DType* in_grad,
+                                  const DType* out_grad,
+                                  const IType* in_row_idx,
+                                  const DType* in_data,
+                                  const int64_t num_cols) {
+    const int64_t row    = i / num_cols;
     in_grad_row_idx[row] = in_row_idx[row];
-    KERNEL_ASSIGN(in_grad[i], req, 2*in_data[i]*out_grad[in_row_idx[row]]);
+    KERNEL_ASSIGN(in_grad[i], req, 2 * in_data[i] * out_grad[in_row_idx[row]]);
   }
 };
 
@@ -212,7 +229,7 @@ struct SquareSumRspGradKernel<req, 1> {
  * Note: This kernel assumes that the ograd and in_data
  * are all rsp and have equal row_idx array.
  */
-template<int req>
+template <int req>
 struct SquareSumRspGradKernel<req, 1, kRowSparseStorage, false> {
   /*!
    * \param i index of igrad.data()
@@ -222,11 +239,15 @@ struct SquareSumRspGradKernel<req, 1, kRowSparseStorage, false> {
    * \param out_grad gradient of the op's output
    * \param in_data op's input
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, IType* in_grad_row_idx, DType* in_grad,
-                                  const IType* out_grad_row_idx, const DType* out_grad,
-                                  const DType* in_data, const int64_t num_cols) {
-    const int64_t row = i / num_cols;
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  IType* in_grad_row_idx,
+                                  DType* in_grad,
+                                  const IType* out_grad_row_idx,
+                                  const DType* out_grad,
+                                  const DType* in_data,
+                                  const int64_t num_cols) {
+    const int64_t row    = i / num_cols;
     in_grad_row_idx[row] = out_grad_row_idx[row];
     KERNEL_ASSIGN(in_grad[i], req, 2 * in_data[i] * out_grad[row]);
   }
@@ -236,7 +257,7 @@ struct SquareSumRspGradKernel<req, 1, kRowSparseStorage, false> {
  * Note: This kernel assumes that the ograd and in_data
  * are all rsp and in_data is a full rsp.
  */
-template<int req>
+template <int req>
 struct SquareSumRspGradKernel<req, 1, kRowSparseStorage, true> {
   /*!
    * \param i index of igrad.data()
@@ -246,33 +267,36 @@ struct SquareSumRspGradKernel<req, 1, kRowSparseStorage, true> {
    * \param out_grad gradient of the op's output
    * \param in_data op's input
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int i, IType* in_grad_row_idx, DType* in_grad,
-                                  const IType* out_grad_row_idx, const DType* out_grad,
-                                  const DType* in_data, const int64_t num_cols) {
-    const int64_t row = i / num_cols;
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int i,
+                                  IType* in_grad_row_idx,
+                                  DType* in_grad,
+                                  const IType* out_grad_row_idx,
+                                  const DType* out_grad,
+                                  const DType* in_data,
+                                  const int64_t num_cols) {
+    const int64_t row     = i / num_cols;
     const int64_t row_dns = out_grad_row_idx[row];
-    in_grad_row_idx[row] = row_dns;
-    KERNEL_ASSIGN(in_grad[i], req, 2 * in_data[row_dns*num_cols+i%num_cols] * out_grad[row]);
+    in_grad_row_idx[row]  = row_dns;
+    KERNEL_ASSIGN(in_grad[i], req, 2 * in_data[row_dns * num_cols + i % num_cols] * out_grad[row]);
   }
 };
 
-
-template<typename xpu>
+template <typename xpu>
 void SquareSumRspImpl(const nnvm::NodeAttrs& attrs,
                       mshadow::Stream<xpu>* s,
                       const NDArray& input,
                       const OpReqType req,
                       NDArray* output) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
   CHECK(param.axis.has_value());
   const mxnet::TShape axis = param.axis.value();
   CHECK_EQ(axis.ndim(), 1U) << "_square_sum(row_sparse_matrix) only supports axis=0 or 1";
-  CHECK(axis[0] == 0 || axis[0] == 1)
-    << "_square_sum(row_sparse_matrix) only supports axis=0 or 1";
+  CHECK(axis[0] == 0 || axis[0] == 1) << "_square_sum(row_sparse_matrix) only supports axis=0 or 1";
   CHECK_EQ(input.storage_type(), kRowSparseStorage)
-    << "_square_sum op only supports row-sparse matrix as input";
+      << "_square_sum op only supports row-sparse matrix as input";
   int64_t out_data_size = 0;
   if (axis[0] == 0) {  // axis = 0
     CHECK_EQ(output->storage_type(), kDefaultStorage);
@@ -305,44 +329,53 @@ void SquareSumRspImpl(const nnvm::NodeAttrs& attrs,
   if (output->storage_type() == kRowSparseStorage) {
     output->CheckAndAlloc({input.aux_shape(rowsparse::kIdx)});
   }
-  const TBlob& out_data = output->data();
-  const int64_t nnr = input.storage_shape()[0];
+  const TBlob& out_data  = output->data();
+  const int64_t nnr      = input.storage_shape()[0];
   const int64_t num_cols = input.storage_shape()[1];
-  const TBlob& in_data = input.data();
+  const TBlob& in_data   = input.data();
   if (0 == axis[0]) {  // axis = 0, output is dense
-    MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
-      MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-        Kernel<SquareSumRspKernel<req_type, 0, false>, xpu>::Launch(s, num_cols,
-            out_data.dptr<DType>(), input.data().dptr<DType>(), nnr, num_cols);
-      })
-    })
+    MSHADOW_TYPE_SWITCH(
+        out_data.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
+          Kernel<SquareSumRspKernel<req_type, 0, false>, xpu>::Launch(
+              s, num_cols, out_data.dptr<DType>(), input.data().dptr<DType>(), nnr, num_cols);
+        })})
   } else {  // axis = 1
     const TBlob in_row_idx = input.aux_data(rowsparse::kIdx);
     if (param.keepdims) {  // output is rsp
       const TBlob out_row_idx = output->aux_data(rowsparse::kIdx);
-      MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
-        MSHADOW_IDX_TYPE_SWITCH(in_row_idx.type_flag_, IType, {
-          MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-            Kernel<SquareSumRspKernel<req_type, 1, true>, xpu>::Launch(s, nnr,
-                out_row_idx.dptr<IType>(), out_data.dptr<DType>(), in_row_idx.dptr<IType>(),
-                in_data.dptr<DType>(), num_cols);
-          })
-        })
-      })
+      MSHADOW_TYPE_SWITCH(
+          out_data.type_flag_,
+          DType,
+          {MSHADOW_IDX_TYPE_SWITCH(
+              in_row_idx.type_flag_, IType, {MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
+                Kernel<SquareSumRspKernel<req_type, 1, true>, xpu>::Launch(
+                    s,
+                    nnr,
+                    out_row_idx.dptr<IType>(),
+                    out_data.dptr<DType>(),
+                    in_row_idx.dptr<IType>(),
+                    in_data.dptr<DType>(),
+                    num_cols);
+              })})})
     } else {  // output is dense
       if (req == kWriteTo) {
         MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
           Kernel<set_zero, xpu>::Launch(s, out_data_size, out_data.dptr<DType>());
         })
       }
-      MSHADOW_TYPE_SWITCH(out_data.type_flag_, DType, {
-        MSHADOW_IDX_TYPE_SWITCH(in_row_idx.type_flag_, IType, {
-          MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-            Kernel<SquareSumRspKernel<req_type, 1, false>, xpu>::Launch(s, nnr,
-                out_data.dptr<DType>(), in_row_idx.dptr<IType>(), in_data.dptr<DType>(), num_cols);
-          })
-        })
-      })
+      MSHADOW_TYPE_SWITCH(
+          out_data.type_flag_,
+          DType,
+          {MSHADOW_IDX_TYPE_SWITCH(
+              in_row_idx.type_flag_, IType, {MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
+                Kernel<SquareSumRspKernel<req_type, 1, false>, xpu>::Launch(
+                    s,
+                    nnr,
+                    out_data.dptr<DType>(),
+                    in_row_idx.dptr<IType>(),
+                    in_data.dptr<DType>(),
+                    num_cols);
+              })})})
     }
   }
 }
@@ -351,20 +384,16 @@ void SquareSumRspImpl(const nnvm::NodeAttrs& attrs,
  * \brief check the indices of ograd and input are the same.
  */
 struct CheckSameIdxKernel {
-  template<typename IType>
-  MSHADOW_XINLINE static void Map(int i, IType* ograd_idx,
-                                  IType* in_idx, int32_t* is_diff) {
-    if (ograd_idx[i] != in_idx[i]){
+  template <typename IType>
+  MSHADOW_XINLINE static void Map(int i, IType* ograd_idx, IType* in_idx, int32_t* is_diff) {
+    if (ograd_idx[i] != in_idx[i]) {
       *is_diff = 1;
     }
   }
 };
 
-
-template<typename xpu>
-void CheckSameIdx(const OpContext& ctx,
-                  const TBlob& ograd_row_idx,
-                  const TBlob& in_row_idx);
+template <typename xpu>
+void CheckSameIdx(const OpContext& ctx, const TBlob& ograd_row_idx, const TBlob& in_row_idx);
 
 /*!\brief
  * This function only supports the following three situations:
@@ -372,62 +401,72 @@ void CheckSameIdx(const OpContext& ctx,
  * 2. ograd and input are both rsp and have the same row_idx array
  * 3. ograd and input are both rsp and input is a full rsp
  */
-template<typename xpu>
+template <typename xpu>
 void SquareSumRspGradImpl(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const NDArray& ograd,
                           const NDArray& input,
                           const OpReqType req,
                           NDArray* igrad) {
-  if (req == kNullOp) return;
+  if (req == kNullOp)
+    return;
   const ReduceAxesParam& param = nnvm::get<ReduceAxesParam>(attrs.parsed);
   CHECK(param.axis.has_value());
   const mxnet::TShape axis = param.axis.value();
   CHECK_EQ(axis.ndim(), 1U) << "_square_sum(row_sparse_matrix) only supports axis=0/1";
-  CHECK(axis[0] == 0 || axis[0] == 1)
-    << "_square_sum(row_sparse_matrix) only supports axis=0 or 1";
+  CHECK(axis[0] == 0 || axis[0] == 1) << "_square_sum(row_sparse_matrix) only supports axis=0 or 1";
   CHECK(ograd.storage_type() == kDefaultStorage || ograd.storage_type() == kRowSparseStorage);
   CHECK_EQ(input.storage_type(), kRowSparseStorage);
   CHECK_EQ(igrad->storage_type(), kRowSparseStorage);
   CHECK_EQ(req, kWriteTo);
   mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
-  if (!input.storage_initialized()
-      || (ograd.storage_type() == kRowSparseStorage && !ograd.storage_initialized())) {
+  if (!input.storage_initialized() ||
+      (ograd.storage_type() == kRowSparseStorage && !ograd.storage_initialized())) {
     FillZerosRspImpl(s, *igrad);
     return;
   }
 
   using namespace mxnet_op;
-  const int64_t num_cols = input.storage_shape()[1];
+  const int64_t num_cols  = input.storage_shape()[1];
   const TBlob& ograd_data = ograd.data();
-  const TBlob& in_data = input.data();
-  const TBlob in_row_idx = input.aux_data(rowsparse::kIdx);
+  const TBlob& in_data    = input.data();
+  const TBlob in_row_idx  = input.aux_data(rowsparse::kIdx);
   if (ograd.storage_type() == kDefaultStorage) {
     igrad->CheckAndAlloc({input.aux_shape(rowsparse::kIdx)});
-    const TBlob& igrad_data = igrad->data();
+    const TBlob& igrad_data   = igrad->data();
     const TBlob igrad_row_idx = igrad->aux_data(rowsparse::kIdx);
     if (0 == axis[0]) {  // forward is sum per column
-      MSHADOW_TYPE_SWITCH(igrad_data.type_flag_, DType, {
-        MSHADOW_IDX_TYPE_SWITCH(igrad_row_idx.type_flag_, IType, {
-          MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-            Kernel<SquareSumRspGradKernel<req_type, 0, kDefaultStorage>, xpu>::Launch(
-                s, igrad_data.Size(), igrad_row_idx.dptr<IType>(),
-                igrad_data.dptr<DType>(), ograd_data.dptr<DType>(),
-                in_row_idx.dptr<IType>(), in_data.dptr<DType>(), num_cols);
-          })
-        })
-      })
+      MSHADOW_TYPE_SWITCH(
+          igrad_data.type_flag_,
+          DType,
+          {MSHADOW_IDX_TYPE_SWITCH(
+              igrad_row_idx.type_flag_, IType, {MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
+                Kernel<SquareSumRspGradKernel<req_type, 0, kDefaultStorage>, xpu>::Launch(
+                    s,
+                    igrad_data.Size(),
+                    igrad_row_idx.dptr<IType>(),
+                    igrad_data.dptr<DType>(),
+                    ograd_data.dptr<DType>(),
+                    in_row_idx.dptr<IType>(),
+                    in_data.dptr<DType>(),
+                    num_cols);
+              })})})
     } else {  // forward is sum per row
-      MSHADOW_TYPE_SWITCH(igrad_data.type_flag_, DType, {
-        MSHADOW_IDX_TYPE_SWITCH(igrad_row_idx.type_flag_, IType, {
-          MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-            Kernel<SquareSumRspGradKernel<req_type, 1, kDefaultStorage>, xpu>::Launch(
-                s, igrad_data.Size(), igrad_row_idx.dptr<IType>(),
-                igrad_data.dptr<DType>(), ograd_data.dptr<DType>(),
-                in_row_idx.dptr<IType>(), in_data.dptr<DType>(), num_cols);
-          })
-        })
-      })
+      MSHADOW_TYPE_SWITCH(
+          igrad_data.type_flag_,
+          DType,
+          {MSHADOW_IDX_TYPE_SWITCH(
+              igrad_row_idx.type_flag_, IType, {MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
+                Kernel<SquareSumRspGradKernel<req_type, 1, kDefaultStorage>, xpu>::Launch(
+                    s,
+                    igrad_data.Size(),
+                    igrad_row_idx.dptr<IType>(),
+                    igrad_data.dptr<DType>(),
+                    ograd_data.dptr<DType>(),
+                    in_row_idx.dptr<IType>(),
+                    in_data.dptr<DType>(),
+                    num_cols);
+              })})})
     }
   } else if (ograd.storage_type() == kRowSparseStorage) {
     CHECK_EQ(1, axis[0]) << "SquareSumRspGradImpl only supports axis = 1"
@@ -437,13 +476,13 @@ void SquareSumRspGradImpl(const nnvm::NodeAttrs& attrs,
     CHECK(ograd_row_idx.Size() == in_row_idx.Size() ||
           in_row_idx.Size() == static_cast<size_t>(in_data.shape_[0]));
     igrad->CheckAndAlloc({ograd.aux_shape(rowsparse::kIdx)});
-    const TBlob& igrad_data = igrad->data();
+    const TBlob& igrad_data   = igrad->data();
     const TBlob igrad_row_idx = igrad->aux_data(rowsparse::kIdx);
     MSHADOW_IDX_TYPE_SWITCH(igrad_row_idx.type_flag_, IType, {
       // when ograd_row_idx and in_row_idx have the same size and input is not a full rsp
       // ograd_row_idx and in_row_idx are expected to have the same elements
       if (in_row_idx.Size() != static_cast<size_t>(input.shape()[0])) {
-          // if input data is not a full rsp
+        // if input data is not a full rsp
         CHECK_EQ(ograd_row_idx.Size(), in_row_idx.Size()) << "SquareSumRspGradImpl only supports"
                                                              " equal ograd_row_idx and"
                                                              " input_row_idx when ograd and"
@@ -452,22 +491,31 @@ void SquareSumRspGradImpl(const nnvm::NodeAttrs& attrs,
                                                              " row-sparse matrix";
         CheckSameIdx<xpu>(ctx, ograd_row_idx, in_row_idx);
       }
-      MSHADOW_TYPE_SWITCH(igrad_data.type_flag_, DType, {
-        MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
-          if (in_row_idx.Size() != static_cast<size_t>(input.shape()[0])) {
+      MSHADOW_TYPE_SWITCH(
+          igrad_data.type_flag_, DType, {MXNET_ASSIGN_REQ_SWITCH(req, req_type, {
+            if (in_row_idx.Size() != static_cast<size_t>(input.shape()[0])) {
               // input data is not a full rsp
-            Kernel<SquareSumRspGradKernel<req_type, 1, kRowSparseStorage, false>, xpu>::Launch(
-                s, igrad_data.Size(), igrad_row_idx.dptr<IType>(),
-                igrad_data.dptr<DType>(), ograd_row_idx.dptr<IType>(),
-                ograd_data.dptr<DType>(), in_data.dptr<DType>(), num_cols);
-          } else {  // input data is a full rsp
-            Kernel<SquareSumRspGradKernel<req_type, 1, kRowSparseStorage, true>, xpu>::Launch(
-                s, igrad_data.Size(), igrad_row_idx.dptr<IType>(),
-                igrad_data.dptr<DType>(), ograd_row_idx.dptr<IType>(),
-                ograd_data.dptr<DType>(), in_data.dptr<DType>(), num_cols);
-          }
-        })
-      })
+              Kernel<SquareSumRspGradKernel<req_type, 1, kRowSparseStorage, false>, xpu>::Launch(
+                  s,
+                  igrad_data.Size(),
+                  igrad_row_idx.dptr<IType>(),
+                  igrad_data.dptr<DType>(),
+                  ograd_row_idx.dptr<IType>(),
+                  ograd_data.dptr<DType>(),
+                  in_data.dptr<DType>(),
+                  num_cols);
+            } else {  // input data is a full rsp
+              Kernel<SquareSumRspGradKernel<req_type, 1, kRowSparseStorage, true>, xpu>::Launch(
+                  s,
+                  igrad_data.Size(),
+                  igrad_row_idx.dptr<IType>(),
+                  igrad_data.dptr<DType>(),
+                  ograd_row_idx.dptr<IType>(),
+                  ograd_data.dptr<DType>(),
+                  in_data.dptr<DType>(),
+                  num_cols);
+            }
+          })})
     })
   } else {
     LOG(FATAL) << "SquareSumRspGradImpl only supports ograd_stype"
@@ -475,7 +523,7 @@ void SquareSumRspGradImpl(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void SquareSumOpForwardEx(const nnvm::NodeAttrs& attrs,
                           const OpContext& ctx,
                           const std::vector<NDArray>& inputs,
@@ -484,7 +532,7 @@ void SquareSumOpForwardEx(const nnvm::NodeAttrs& attrs,
   CHECK_EQ(inputs.size(), 1U);
   CHECK_EQ(outputs.size(), 1U);
   CHECK_EQ(req.size(), 1U);
-  mshadow::Stream<xpu>* s = ctx.get_stream<xpu>();
+  mshadow::Stream<xpu>* s         = ctx.get_stream<xpu>();
   const NDArrayStorageType istype = inputs[0].storage_type();
   if (istype == kRowSparseStorage) {
     CHECK_EQ(inputs[0].shape().ndim(), 2U) << "_square_sum op only supports"
@@ -496,7 +544,7 @@ void SquareSumOpForwardEx(const nnvm::NodeAttrs& attrs,
   }
 }
 
-template<typename xpu>
+template <typename xpu>
 void SquareSumOpBackwardEx(const nnvm::NodeAttrs& attrs,
                            const OpContext& ctx,
                            const std::vector<NDArray>& inputs,
diff --git a/src/operator/tensor/square_sum.cc b/src/operator/tensor/square_sum.cc
index 255ec5bb8032..0ce48c6843f5 100644
--- a/src/operator/tensor/square_sum.cc
+++ b/src/operator/tensor/square_sum.cc
@@ -26,29 +26,28 @@
 namespace mxnet {
 namespace op {
 
-template<>
-void CheckSameIdx<cpu>(const OpContext& ctx,
-                       const TBlob& ograd_row_idx,
-                       const TBlob& in_row_idx) {
-  MSHADOW_IDX_TYPE_SWITCH(ograd_row_idx.type_flag_, IType, {
-    mshadow::Stream<cpu>* s = ctx.get_stream<cpu>();
-    const IType* ograd_idx = ograd_row_idx.dptr<IType>();
-    const IType* in_idx = in_row_idx.dptr<IType>();
-    const nnvm::dim_t idx_size = ograd_row_idx.Size();
-    int32_t is_different = 0;
-    mxnet_op::Kernel<CheckSameIdxKernel, cpu>::Launch(s, idx_size,
-      ograd_idx, in_idx, &is_different);
-    CHECK_EQ(is_different, 0) << "SquareSumRspGradImpl only supports"
-                                 " equal ograd_row_idx and input_row_idx"
-                                 " when ograd and input are both"
-                                 " row-sparse and input data is not a full"
-                                 " row-sparse matrix";
-  })
-}
-
+template <>
+void CheckSameIdx<cpu>(const OpContext& ctx, const TBlob& ograd_row_idx, const TBlob& in_row_idx) {
+    MSHADOW_IDX_TYPE_SWITCH(ograd_row_idx.type_flag_,
+                            IType,
+                            {
+                              mshadow::Stream<cpu>* s    = ctx.get_stream<cpu>();
+                              const IType* ograd_idx     = ograd_row_idx.dptr<IType>();
+                              const IType* in_idx        = in_row_idx.dptr<IType>();
+                              const nnvm::dim_t idx_size = ograd_row_idx.Size();
+                              int32_t is_different       = 0;
+                              mxnet_op::Kernel<CheckSameIdxKernel, cpu>::Launch(
+                                  s, idx_size, ograd_idx, in_idx, &is_different);
+                              CHECK_EQ(is_different, 0)
+                                  << "SquareSumRspGradImpl only supports"
+                                     " equal ograd_row_idx and input_row_idx"
+                                     " when ograd and input are both"
+                                     " row-sparse and input data is not a full"
+                                     " row-sparse matrix";
+                            })}
 
 MXNET_OPERATOR_REGISTER_REDUCE(_square_sum)
-.describe(R"code(Computes the square sum of array elements over a given axis
+    .describe(R"code(Computes the square sum of array elements over a given axis
 for row-sparse matrix. This is a temporary solution for fusing ops square and
 sum together for row-sparse matrix to save memory for storing gradients.
 It will become deprecated once the functionality of fusing operators is finished
@@ -61,19 +60,19 @@ Example::
   sum = mx.nd._internal._square_sum(rsp, axis=1)
   sum = [0, 5, 0, 25, 0]
 )code" ADD_FILELINE)
-.set_attr<FInferStorageType>("FInferStorageType", SquareSumForwardInferStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SquareSumOpForwardEx<cpu>)
-.set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square_sum"});
+    .set_attr<FInferStorageType>("FInferStorageType", SquareSumForwardInferStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SquareSumOpForwardEx<cpu>)
+    .set_attr<nnvm::FGradient>("FGradient", ElemwiseGradUseIn{"_backward_square_sum"});
 
 MXNET_OPERATOR_REGISTER_REDUCE_BACKWARD(_backward_square_sum)
-.set_num_inputs(2)
-.set_attr<FResourceRequest>("FResourceRequest",
-  [](const NodeAttrs& attrs) {
-    return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
-  })
-.set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
-.set_attr<FInferStorageType>("FInferStorageType", SquareSumBackwardInferStorageType)
-.set_attr<FComputeEx>("FComputeEx<cpu>", SquareSumOpBackwardEx<cpu>);
+    .set_num_inputs(2)
+    .set_attr<FResourceRequest>("FResourceRequest",
+                                [](const NodeAttrs& attrs) {
+                                  return std::vector<ResourceRequest>{ResourceRequest::kTempSpace};
+                                })
+    .set_attr<THasDeterministicOutput>("THasDeterministicOutput", true)
+    .set_attr<FInferStorageType>("FInferStorageType", SquareSumBackwardInferStorageType)
+    .set_attr<FComputeEx>("FComputeEx<cpu>", SquareSumOpBackwardEx<cpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/square_sum.cu b/src/operator/tensor/square_sum.cu
index 83287e0de3a9..92042e54206e 100644
--- a/src/operator/tensor/square_sum.cu
+++ b/src/operator/tensor/square_sum.cu
@@ -26,39 +26,41 @@
 namespace mxnet {
 namespace op {
 
-template<>
-void CheckSameIdx<gpu>(const OpContext& ctx,
-                       const TBlob& ograd_row_idx,
-                       const TBlob& in_row_idx) {
-  MSHADOW_IDX_TYPE_SWITCH(ograd_row_idx.type_flag_, IType, {
-    mshadow::Stream<gpu>* s = ctx.get_stream<gpu>();
-    const IType* ograd_idx = ograd_row_idx.dptr<IType>();
-    const IType* in_idx = in_row_idx.dptr<IType>();
-    const nnvm::dim_t idx_size = ograd_row_idx.Size();
-    int32_t is_diff = 0;
-    mshadow::Tensor<gpu, 1, char> workspace = ctx.requested[0]
-        .get_space_typed<gpu, 1, char>(mshadow::Shape1(sizeof(int32_t)), s);
-    int32_t* is_diff_ptr = reinterpret_cast<int32_t*>(workspace.dptr_);
-    mxnet_op::Kernel<mxnet_op::set_zero, gpu>::Launch(s, 1, is_diff_ptr);
-    mxnet_op::Kernel<CheckSameIdxKernel, gpu>::Launch(s, idx_size,
-      ograd_idx, in_idx, is_diff_ptr);
-    CUDA_CALL(cudaMemcpyAsync(&is_diff, is_diff_ptr, sizeof(int32_t),
-                              cudaMemcpyDeviceToHost, mshadow::Stream<gpu>::GetStream(s)));
-    CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
-    CHECK_EQ(is_diff, 0) << "SquareSumRspGradImpl only supports"
-                            " equal ograd_row_idx and input_row_idx"
-                            " when ograd and input are both"
-                            " row-sparse and input data is not a full"
-                            " row-sparse matrix";
-  })
-}
-
+template <>
+void CheckSameIdx<gpu>(const OpContext& ctx, const TBlob& ograd_row_idx, const TBlob& in_row_idx) {
+    MSHADOW_IDX_TYPE_SWITCH(ograd_row_idx.type_flag_,
+                            IType,
+                            {
+                              mshadow::Stream<gpu>* s    = ctx.get_stream<gpu>();
+                              const IType* ograd_idx     = ograd_row_idx.dptr<IType>();
+                              const IType* in_idx        = in_row_idx.dptr<IType>();
+                              const nnvm::dim_t idx_size = ograd_row_idx.Size();
+                              int32_t is_diff            = 0;
+                              mshadow::Tensor<gpu, 1, char> workspace =
+                                  ctx.requested[0].get_space_typed<gpu, 1, char>(
+                                      mshadow::Shape1(sizeof(int32_t)), s);
+                              int32_t* is_diff_ptr = reinterpret_cast<int32_t*>(workspace.dptr_);
+                              mxnet_op::Kernel<mxnet_op::set_zero, gpu>::Launch(s, 1, is_diff_ptr);
+                              mxnet_op::Kernel<CheckSameIdxKernel, gpu>::Launch(
+                                  s, idx_size, ograd_idx, in_idx, is_diff_ptr);
+                              CUDA_CALL(cudaMemcpyAsync(&is_diff,
+                                                        is_diff_ptr,
+                                                        sizeof(int32_t),
+                                                        cudaMemcpyDeviceToHost,
+                                                        mshadow::Stream<gpu>::GetStream(s)));
+                              CUDA_CALL(cudaStreamSynchronize(mshadow::Stream<gpu>::GetStream(s)));
+                              CHECK_EQ(is_diff, 0) << "SquareSumRspGradImpl only supports"
+                                                      " equal ograd_row_idx and input_row_idx"
+                                                      " when ograd and input are both"
+                                                      " row-sparse and input data is not a full"
+                                                      " row-sparse matrix";
+                            })}
 
 NNVM_REGISTER_OP(_square_sum)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SquareSumOpForwardEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SquareSumOpForwardEx<gpu>);
 
 NNVM_REGISTER_OP(_backward_square_sum)
-.set_attr<FComputeEx>("FComputeEx<gpu>", SquareSumOpBackwardEx<gpu>);
+    .set_attr<FComputeEx>("FComputeEx<gpu>", SquareSumOpBackwardEx<gpu>);
 
 }  // namespace op
 }  // namespace mxnet
diff --git a/src/operator/tensor/util/tensor_util-inl.h b/src/operator/tensor/util/tensor_util-inl.h
index 24602f22922e..d3bec593fd39 100644
--- a/src/operator/tensor/util/tensor_util-inl.h
+++ b/src/operator/tensor/util/tensor_util-inl.h
@@ -41,12 +41,10 @@ struct MarkRowFlgKernel {
    * \param row_flg  flag array for indices
    * \param row_idx  row index array storing indices of rows
    */
-  template<typename IType, typename DType>
-  MSHADOW_XINLINE static void Map(int tid,
-                                  DType* row_flg,
-                                  const IType* row_idx) {
+  template <typename IType, typename DType>
+  MSHADOW_XINLINE static void Map(int tid, DType* row_flg, const IType* row_idx) {
     nnvm::dim_t idx = static_cast<nnvm::dim_t>(row_idx[tid]);
-    row_flg[idx] = 1;
+    row_flg[idx]    = 1;
   }
 };
 
@@ -62,13 +60,13 @@ struct FillRspRowIdxKernel {
    * \param row_flg_sum  inclusive prefix sum array over 0/1 marked row flag array
    * \param num_rows     rsp tensor number of rows (shape)
    */
-  template<typename RType>
+  template <typename RType>
   MSHADOW_XINLINE static void Map(int tid,
                                   RType* row_idx,
                                   const nnvm::dim_t* row_flg_sum,
                                   const nnvm::dim_t num_rows) {
     if (tid < num_rows) {
-      nnvm::dim_t prev = (tid == 0) ? 0 : row_flg_sum[tid-1];
+      nnvm::dim_t prev = (tid == 0) ? 0 : row_flg_sum[tid - 1];
       if (row_flg_sum[tid] > prev) {
         row_idx[prev] = static_cast<RType>(tid);
       }
@@ -83,13 +81,12 @@ struct FillRspRowIdxKernel {
  * \param data the input row id in sorted order
  */
 struct MarkLookupTable {
-  template<typename IType, typename DType>
+  template <typename IType, typename DType>
   MSHADOW_XINLINE static void Map(int i, IType* out, const DType* data) {
     out[static_cast<nnvm::dim_t>(data[i])] = i;
   }
 };
 
-
 }  // namespace op
 }  // namespace mxnet
 
diff --git a/src/operator/tvmop/op_module.cc b/src/operator/tvmop/op_module.cc
index 05125726a283..35b810a3d78a 100644
--- a/src/operator/tvmop/op_module.cc
+++ b/src/operator/tvmop/op_module.cc
@@ -32,18 +32,18 @@
 #include "op_module.h"
 
 namespace dmlc {
-  DMLC_REGISTRY_ENABLE(::tvm::runtime::TVMOpConfig);
+DMLC_REGISTRY_ENABLE(::tvm::runtime::TVMOpConfig);
 }  // namespace dmlc
 
 namespace tvm {
 namespace runtime {
 
-void TVMOpModule::Load(const std::string &filepath) {
-  static const PackedFunc *f_load = Registry::Get("runtime.ModuleLoadFromFile");
+void TVMOpModule::Load(const std::string& filepath) {
+  static const PackedFunc* f_load = Registry::Get("runtime.ModuleLoadFromFile");
   std::lock_guard<std::mutex> lock(mutex_);
   Module module = (*f_load)(filepath, "");
-  module_ptr_ = std::make_shared<Module>();
-  *module_ptr_ = module;
+  module_ptr_   = std::make_shared<Module>();
+  *module_ptr_  = module;
 }
 
 void TVMOpModule::Import(const TVMOpModule& module) {
@@ -52,12 +52,12 @@ void TVMOpModule::Import(const TVMOpModule& module) {
   module_ptr_->Import(*(module.module_ptr_));
 }
 
-PackedFunc GetFunction(const std::shared_ptr<Module> &module,
-                       const std::string &op_name,
-                       const std::vector<mxnet::TBlob> &args) {
+PackedFunc GetFunction(const std::shared_ptr<Module>& module,
+                       const std::string& op_name,
+                       const std::vector<mxnet::TBlob>& args) {
   std::ostringstream func_name;
   func_name << op_name;
-  for (const auto &arg : args) {
+  for (const auto& arg : args) {
     switch (arg.type_flag_) {
       case mshadow::kFloat32:
         func_name << "float32";
@@ -103,17 +103,17 @@ PackedFunc GetFunction(const std::shared_ptr<Module> &module,
   return module->GetFunction(func_name.str(), false);
 }
 
-void TVMOpModule::Call(const std::string &func_name,
+void TVMOpModule::Call(const std::string& func_name,
                        const mxnet::OpContext& ctx,
-                       const std::vector<mxnet::TBlob> &args) const {
+                       const std::vector<mxnet::TBlob>& args) const {
   std::vector<int> type_codes;
   std::vector<TVMValue> values;
 
   type_codes.resize(args.size());
   values.resize(args.size());
   for (size_t i = 0; i < args.size(); ++i) {
-    type_codes[i] = kTVMDLTensorHandle;
-    values[i].v_handle = const_cast<DLTensor *>(&(args[i].dltensor()));
+    type_codes[i]      = kTVMDLTensorHandle;
+    values[i].v_handle = const_cast<DLTensor*>(&(args[i].dltensor()));
   }
 
   TVMArgs tvm_args(&values[0], &type_codes[0], args.size());
@@ -121,9 +121,9 @@ void TVMOpModule::Call(const std::string &func_name,
 
 #if MXNET_USE_CUDA
   int dev_type = (ctx.run_ctx.ctx.dev_type == mxnet::Context::DeviceType::kGPU) ? kDLGPU : kDLCPU;
-  int dev_id = ctx.run_ctx.ctx.dev_id;
+  int dev_id   = ctx.run_ctx.ctx.dev_id;
   if (dev_type == kDLGPU) {
-    void *stream = static_cast<void *>(ctx.run_ctx.get_stream<mxnet::gpu>()->stream_);
+    void* stream = static_cast<void*>(ctx.run_ctx.get_stream<mxnet::gpu>()->stream_);
     TVMSetStream(dev_type, dev_id, stream);
   }
 #endif
@@ -135,7 +135,7 @@ void TVMOpModule::Call(const std::string &func_name,
 #endif
 }
 
-void TVMOpModule::CallEx(const std::string &func_name,
+void TVMOpModule::CallEx(const std::string& func_name,
                          const mxnet::OpContext& ctx,
                          const std::vector<mxnet::TBlob>& tblobs,
                          TVMArgs tvm_args) const {
@@ -143,9 +143,9 @@ void TVMOpModule::CallEx(const std::string &func_name,
 
 #if MXNET_USE_CUDA
   int dev_type = (ctx.run_ctx.ctx.dev_type == mxnet::Context::DeviceType::kGPU) ? kDLGPU : kDLCPU;
-  int dev_id = ctx.run_ctx.ctx.dev_id;
+  int dev_id   = ctx.run_ctx.ctx.dev_id;
   if (dev_type == kDLGPU) {
-    void *stream = static_cast<void *>(ctx.run_ctx.get_stream<mxnet::gpu>()->stream_);
+    void* stream = static_cast<void*>(ctx.run_ctx.get_stream<mxnet::gpu>()->stream_);
     TVMSetStream(dev_type, dev_id, stream);
   }
 #endif
@@ -159,8 +159,7 @@ void TVMOpModule::CallEx(const std::string &func_name,
 
 const TVMOpConfig& GetOpConfig(const std::string& name) {
   const TVMOpConfig* ret = ::dmlc::Registry<TVMOpConfig>::Get()->Find(name);
-  CHECK(ret != nullptr)
-    << "op " << name << "does not exist.";
+  CHECK(ret != nullptr) << "op " << name << "does not exist.";
   return *ret;
 }
 
diff --git a/src/operator/tvmop/op_module.h b/src/operator/tvmop/op_module.h
index 8a25b3b9951e..738da857dbc2 100644
--- a/src/operator/tvmop/op_module.h
+++ b/src/operator/tvmop/op_module.h
@@ -60,12 +60,12 @@ class TVMOpModule {
    * a unique kernel.
    * \param tvm_args Arguments to be passed to kernel function.
    */
-  void CallEx(const std::string &func_name,
+  void CallEx(const std::string& func_name,
               const mxnet::OpContext& ctx,
               const std::vector<mxnet::TBlob>& tblobs,
               TVMArgs tvm_args) const;
 
-  static TVMOpModule *Get() {
+  static TVMOpModule* Get() {
     static TVMOpModule inst;
     return &inst;
   }
@@ -77,11 +77,12 @@ class TVMOpModule {
 
 class OtherOptionEntity {
  public:
-  explicit OtherOptionEntity(int val): val_(val) {}
-  OtherOptionEntity(): val_(0) {}
+  explicit OtherOptionEntity(int val) : val_(val) {}
+  OtherOptionEntity() : val_(0) {}
   inline int get_val() const {
     return val_;
   }
+
  private:
   int val_;
 };
@@ -97,11 +98,11 @@ class OtherOptionSpace {
 
   OtherOptionSpace() {}
 
-  inline OtherOptionEntity &operator[] (int idx) {
+  inline OtherOptionEntity& operator[](int idx) {
     return entities_[idx];
   }
 
-  inline const OtherOptionEntity &operator[] (int idx) const {
+  inline const OtherOptionEntity& operator[](int idx) const {
     return entities_[idx];
   }
 
@@ -118,8 +119,8 @@ class TVMOpConfig {
   std::string name;
 
   inline TVMOpConfig& add_space(const std::string& name, const std::vector<int>& val) {
-    int size = val.size();
-    space_map_[name] = OtherOptionSpace(val);
+    int size          = val.size();
+    space_map_[name]  = OtherOptionSpace(val);
     weight_map_[name] = weight_acc_;
     weight_acc_ *= size;
     return *this;
@@ -129,7 +130,7 @@ class TVMOpConfig {
     return *this;
   }
 
-  TVMOpConfig(): weight_acc_(1) {}
+  TVMOpConfig() : weight_acc_(1) {}
 
   inline const OtherOptionSpace& get_space(const std::string& name) const {
     return space_map_.at(name);
diff --git a/src/optimizer/sgd-inl.h b/src/optimizer/sgd-inl.h
index 00afe2ad079a..752f5e5c08d2 100644
--- a/src/optimizer/sgd-inl.h
+++ b/src/optimizer/sgd-inl.h
@@ -43,22 +43,19 @@ struct SGDParam : public dmlc::Parameter<SGDParam> {
   float rescale_grad;
   float clip_gradient;
   DMLC_DECLARE_PARAMETER(SGDParam) {
-    DMLC_DECLARE_FIELD(momentum)
-    .set_range(0.0f, 1.0f)
-    .set_default(0.0f)
-    .describe("momentum");
+    DMLC_DECLARE_FIELD(momentum).set_range(0.0f, 1.0f).set_default(0.0f).describe("momentum");
     DMLC_DECLARE_FIELD(rescale_grad)
-    .set_default(1.0f)
-    .describe("rescale gradient as grad = rescale_grad*grad.");
+        .set_default(1.0f)
+        .describe("rescale gradient as grad = rescale_grad*grad.");
     DMLC_DECLARE_FIELD(clip_gradient)
-    .set_default(-1.0f)
-    .describe("If greater than 0, clip gradient to "
-              "grad = max(min(grad, -clip_gradient), clip_gradient). "
-              "Otherwise turned off.");
+        .set_default(-1.0f)
+        .describe(
+            "If greater than 0, clip gradient to "
+            "grad = max(min(grad, -clip_gradient), clip_gradient). "
+            "Otherwise turned off.");
   }
 };
 
-
 struct sgd_clip {
   MSHADOW_XINLINE static real_t Map(real_t x, real_t bound) {
     if (x > bound) {
@@ -71,49 +68,76 @@ struct sgd_clip {
   }
 };
 
-template<typename xpu>
-void sgd_mom_update(RunContext ctx, TBlob weight, const TBlob grad, TBlob mom,
-                float lr, float wd, const SGDParam& param) {
+template <typename xpu>
+void sgd_mom_update(RunContext ctx,
+                    TBlob weight,
+                    const TBlob grad,
+                    TBlob mom,
+                    float lr,
+                    float wd,
+                    const SGDParam& param) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
   Tensor<xpu, 2> weight2d = weight.FlatTo2D<xpu, real_t>(s);
-  Tensor<xpu, 2> mom2d = mom.FlatTo2D<xpu, real_t>(s);
-  Tensor<xpu, 2> grad2d = grad.FlatTo2D<xpu, real_t>(s);
+  Tensor<xpu, 2> mom2d    = mom.FlatTo2D<xpu, real_t>(s);
+  Tensor<xpu, 2> grad2d   = grad.FlatTo2D<xpu, real_t>(s);
   if (param.clip_gradient > 0.0f) {
-    mom2d = param.momentum*mom2d -
-            lr*(F<sgd_clip>(param.rescale_grad * grad2d, param.clip_gradient) + wd*weight2d);
+    mom2d = param.momentum * mom2d -
+            lr * (F<sgd_clip>(param.rescale_grad * grad2d, param.clip_gradient) + wd * weight2d);
   } else {
-    mom2d = param.momentum*mom2d - lr*(param.rescale_grad*grad2d + wd*weight2d);
+    mom2d = param.momentum * mom2d - lr * (param.rescale_grad * grad2d + wd * weight2d);
   }
   weight2d += mom2d;
 }
 
-template<typename xpu>
-void sgd_update(RunContext ctx, TBlob weight, const TBlob grad,
-                float lr, float wd, const SGDParam& param) {
+template <typename xpu>
+void sgd_update(RunContext ctx,
+                TBlob weight,
+                const TBlob grad,
+                float lr,
+                float wd,
+                const SGDParam& param) {
   using namespace mshadow;
   using namespace mshadow::expr;
-  Stream<xpu>* s = ctx.get_stream<xpu>();
+  Stream<xpu>* s          = ctx.get_stream<xpu>();
   Tensor<xpu, 2> weight2d = weight.FlatTo2D<xpu, real_t>(s);
-  Tensor<xpu, 2> grad2d = grad.FlatTo2D<xpu, real_t>(s);
+  Tensor<xpu, 2> grad2d   = grad.FlatTo2D<xpu, real_t>(s);
   if (param.clip_gradient >= 0.0f) {
-    weight2d -= lr*(F<sgd_clip>(param.rescale_grad * grad2d, param.clip_gradient) +
-                wd*weight2d);
+    weight2d -=
+        lr * (F<sgd_clip>(param.rescale_grad * grad2d, param.clip_gradient) + wd * weight2d);
   } else {
-    weight2d -= lr*(param.rescale_grad*grad2d + wd*weight2d);
+    weight2d -= lr * (param.rescale_grad * grad2d + wd * weight2d);
   }
 }
 
-void call_sgd_mom_update_cpu(RunContext ctx, TBlob weight, const TBlob grad, TBlob mom,
-                float lr, float wd, const SGDParam& param);
-void call_sgd_update_cpu(RunContext ctx, TBlob weight, const TBlob grad,
-                float lr, float wd, const SGDParam& param);
+void call_sgd_mom_update_cpu(RunContext ctx,
+                             TBlob weight,
+                             const TBlob grad,
+                             TBlob mom,
+                             float lr,
+                             float wd,
+                             const SGDParam& param);
+void call_sgd_update_cpu(RunContext ctx,
+                         TBlob weight,
+                         const TBlob grad,
+                         float lr,
+                         float wd,
+                         const SGDParam& param);
 #if MXNET_USE_CUDA
-void call_sgd_mom_update_gpu(RunContext ctx, TBlob weight, const TBlob grad, TBlob mom,
-                float lr, float wd, const SGDParam& param);
-void call_sgd_update_gpu(RunContext ctx, TBlob weight, const TBlob grad,
-                float lr, float wd, const SGDParam& param);
+void call_sgd_mom_update_gpu(RunContext ctx,
+                             TBlob weight,
+                             const TBlob grad,
+                             TBlob mom,
+                             float lr,
+                             float wd,
+                             const SGDParam& param);
+void call_sgd_update_gpu(RunContext ctx,
+                         TBlob weight,
+                         const TBlob grad,
+                         float lr,
+                         float wd,
+                         const SGDParam& param);
 #endif  // MXNET_USE_CUDA
 
 #if DMLC_USE_CXX11
@@ -124,51 +148,78 @@ class SGDOpt : public Optimizer {
     param_.Init(kwargs);
   }
 
-  void CreateState(const int index, const NDArray *weight) override {
+  void CreateState(const int index, const NDArray* weight) override {
     if (param_.momentum > 0.0f && mom.find(index) == mom.end()) {
       mom[index] = NDArray(weight->shape(), weight->ctx());
       mom[index] = 0.0f;
     }
   }
 
-  void Update(const int index, NDArray *weight,
-              const NDArray *grad, const float lr, const float wd) override {
+  void Update(const int index,
+              NDArray* weight,
+              const NDArray* grad,
+              const float lr,
+              const float wd) override {
     NDArray w = *weight, g = *grad;
     CreateState(index, weight);
     switch (w.ctx().dev_type) {
-     case Context::kCPU:
-     case Context::kCPUPinned:
-      if (param_.momentum > 0.0f) {
-        Engine::Get()->PushSync([this, index, w, g, lr, wd](RunContext ctx) {
-          call_sgd_mom_update_cpu(ctx, w.data(), g.data(), mom[index].data(), lr, wd, param_);
-        }, w.ctx(), {g.var()}, {w.var(), mom[index].var()},
-        FnProperty::kNormal, 0, "SGDOptUpdate");
-      } else {
-        Engine::Get()->PushSync([this, index, w, g, lr, wd](RunContext ctx) {
-          call_sgd_update_cpu(ctx, w.data(), g.data(), lr, wd, param_);
-        }, w.ctx(), {g.var()}, {w.var()},
-        FnProperty::kNormal, 0, "SGDOptUpdate");
-      }
-      break;
-     case Context::kGPU:
+      case Context::kCPU:
+      case Context::kCPUPinned:
+        if (param_.momentum > 0.0f) {
+          Engine::Get()->PushSync(
+              [this, index, w, g, lr, wd](RunContext ctx) {
+                call_sgd_mom_update_cpu(ctx, w.data(), g.data(), mom[index].data(), lr, wd, param_);
+              },
+              w.ctx(),
+              {g.var()},
+              {w.var(), mom[index].var()},
+              FnProperty::kNormal,
+              0,
+              "SGDOptUpdate");
+        } else {
+          Engine::Get()->PushSync(
+              [this, index, w, g, lr, wd](RunContext ctx) {
+                call_sgd_update_cpu(ctx, w.data(), g.data(), lr, wd, param_);
+              },
+              w.ctx(),
+              {g.var()},
+              {w.var()},
+              FnProperty::kNormal,
+              0,
+              "SGDOptUpdate");
+        }
+        break;
+      case Context::kGPU:
 #if MXNET_USE_CUDA
-      if (param_.momentum > 0.0f) {
-        Engine::Get()->PushSync([this, index, w, g, lr, wd](RunContext ctx) {
-          call_sgd_mom_update_gpu(ctx, w.data(), g.data(), mom[index].data(), lr, wd, param_);
-        }, w.ctx(), {g.var()}, {w.var(), mom[index].var()},
-        FnProperty::kNormal, 0, "SGDOptUpdate");
-      } else {
-        Engine::Get()->PushSync([this, index, w, g, lr, wd](RunContext ctx) {
-          call_sgd_update_gpu(ctx, w.data(), g.data(), lr, wd, param_);
-        }, w.ctx(), {g.var()}, {w.var()},
-        FnProperty::kNormal, 0, "SGDOptUpdate");
-      }
-      break;
+        if (param_.momentum > 0.0f) {
+          Engine::Get()->PushSync(
+              [this, index, w, g, lr, wd](RunContext ctx) {
+                call_sgd_mom_update_gpu(ctx, w.data(), g.data(), mom[index].data(), lr, wd, param_);
+              },
+              w.ctx(),
+              {g.var()},
+              {w.var(), mom[index].var()},
+              FnProperty::kNormal,
+              0,
+              "SGDOptUpdate");
+        } else {
+          Engine::Get()->PushSync(
+              [this, index, w, g, lr, wd](RunContext ctx) {
+                call_sgd_update_gpu(ctx, w.data(), g.data(), lr, wd, param_);
+              },
+              w.ctx(),
+              {g.var()},
+              {w.var()},
+              FnProperty::kNormal,
+              0,
+              "SGDOptUpdate");
+        }
+        break;
 #else
         LOG(FATAL) << "Please compile with CUDA enabled for cuda features";
 #endif  // MXNET_USE_CUDA
-     default:
-      LOG(FATAL) << "Unsupported device type for sgd optimizer: " << w.ctx().dev_type;
+      default:
+        LOG(FATAL) << "Unsupported device type for sgd optimizer: " << w.ctx().dev_type;
     }
   }
 
diff --git a/src/profiler/aggregate_stats.cc b/src/profiler/aggregate_stats.cc
index 9d56dd35d6c2..87bcdd12c513 100644
--- a/src/profiler/aggregate_stats.cc
+++ b/src/profiler/aggregate_stats.cc
@@ -37,24 +37,25 @@ namespace profiler {
 
 using pi = std::pair<double, std::string>;
 
-template<typename DType>
+template <typename DType>
 inline float MicroToMilli(const DType micro) {
   return static_cast<float>(static_cast<double>(micro) / 1000);
 }
 
-template<typename DType>
+template <typename DType>
 inline float ByteToKilobyte(const DType byte) {
   return static_cast<float>(static_cast<double>(byte) / 1000);
 }
 
-inline std::priority_queue<pi>
-  BuildHeap(const std::unordered_map<std::string, AggregateStats::StatData>& map,
-            int sort_by, int ascending) {
+inline std::priority_queue<pi> BuildHeap(
+    const std::unordered_map<std::string, AggregateStats::StatData>& map,
+    int sort_by,
+    int ascending) {
   std::priority_queue<pi> heap;
   for (const auto& iter : map) {
-    const std::string& name = iter.first;
+    const std::string& name              = iter.first;
     const AggregateStats::StatData& data = iter.second;
-    double value = 0;
+    double value                         = 0;
     switch (static_cast<AggregateStats::SortBy>(sort_by)) {
       case AggregateStats::SortBy::Total:
         value = data.total_aggregate_;
@@ -63,8 +64,7 @@ inline std::priority_queue<pi>
         if (data.type_ == AggregateStats::StatData::kCounter)
           value = (data.max_aggregate_ - data.min_aggregate_) / 2;
         else
-          value = static_cast<double>(data.total_aggregate_)
-                                / data.total_count_;
+          value = static_cast<double>(data.total_aggregate_) / data.total_count_;
         break;
       case AggregateStats::SortBy::Min:
         value = data.min_aggregate_;
@@ -98,65 +98,43 @@ void AggregateStats::DumpTable(std::ostream& os, int sort_by, int ascending) {
   state.copyfmt(os);
   os << std::endl
      << "Profile Statistics:" << std::endl
-     << "\tNote the difference in units for different entries."
-     << std::endl;
+     << "\tNote the difference in units for different entries." << std::endl;
   std::unique_lock<std::mutex> lk(m_);
   for (const auto& stat : stats_) {
-    const std::string& type = stat.first;
+    const std::string& type                             = stat.first;
     const std::unordered_map<std::string, StatData>& mm = stat.second;
-    bool is_memory = (type == "Device Storage"  || type == "Pool Memory");
+    bool is_memory = (type == "Device Storage" || type == "Pool Memory");
     os << type << std::endl << "=================" << std::endl;
-    os << std::setw(25) << std::left  << "Name"
-        << std::setw(16) << std::right << "Total Count"
-        << " "
-        << (is_memory ? std::setw(0) : std::setw(16)) << std::right
-        << (is_memory ? "" : "Time (ms)")
-        << (is_memory ? "" : " ")
-        << std::setw(16) << std::right
-        << (is_memory ? "Min Use  (kB)" : "Min Time (ms)")
-        << " "
-        << std::setw(16) << std::right
-        << (is_memory ? "Max Use  (kB)" : "Max Time (ms)")
-        << " "
-        << std::setw(16) << std::right
-        << (is_memory ? "Avg Use  (kB)" : "Avg Time (ms)")
-        << std::endl;
-    os << std::setw(25) << std::left  << "----"
-        << std::setw(16) << std::right << "-----------"
-        << " "
-        << (is_memory ? std::setw(0) : std::setw(16)) << std::right
-        << (is_memory ? "" : "---------")
-        << (is_memory ? "" : " ")
-        << std::setw(16) << std::right
-        << "-------------"
-        << " "
-        << std::setw(16) << std::right
-        << "-------------"
-        << " "
-        << std::setw(16) << std::right
-        << "-------------"
-        << std::endl;
+    os << std::setw(25) << std::left << "Name" << std::setw(16) << std::right << "Total Count"
+       << " " << (is_memory ? std::setw(0) : std::setw(16)) << std::right
+       << (is_memory ? "" : "Time (ms)") << (is_memory ? "" : " ") << std::setw(16) << std::right
+       << (is_memory ? "Min Use  (kB)" : "Min Time (ms)") << " " << std::setw(16) << std::right
+       << (is_memory ? "Max Use  (kB)" : "Max Time (ms)") << " " << std::setw(16) << std::right
+       << (is_memory ? "Avg Use  (kB)" : "Avg Time (ms)") << std::endl;
+    os << std::setw(25) << std::left << "----" << std::setw(16) << std::right << "-----------"
+       << " " << (is_memory ? std::setw(0) : std::setw(16)) << std::right
+       << (is_memory ? "" : "---------") << (is_memory ? "" : " ") << std::setw(16) << std::right
+       << "-------------"
+       << " " << std::setw(16) << std::right << "-------------"
+       << " " << std::setw(16) << std::right << "-------------" << std::endl;
     auto heap = BuildHeap(mm, sort_by, ascending);
     while (!heap.empty()) {
       const std::string& name = heap.top().second;
-      const StatData &data = mm.at(name);
+      const StatData& data    = mm.at(name);
       if (data.type_ == StatData::kDuration || data.type_ == StatData::kCounter) {
-        os << std::setw(25) << std::left << name
-           << std::setw(16) << std::right << data.total_count_ << " "
-           << std::fixed << (is_memory ? std::setw(0) : std::setw(16))
+        os << std::setw(25) << std::left << name << std::setw(16) << std::right << data.total_count_
+           << " " << std::fixed << (is_memory ? std::setw(0) : std::setw(16))
            << std::setprecision(4) << std::right;
         if (!is_memory)
           os << MicroToMilli(data.total_aggregate_) << " ";
         os << std::fixed << std::setw(16) << std::setprecision(4) << std::right
            << (is_memory ? ByteToKilobyte(data.min_aggregate_) : MicroToMilli(data.min_aggregate_))
-           << " "
-           << std::fixed << std::setw(16) << std::setprecision(4) << std::right
+           << " " << std::fixed << std::setw(16) << std::setprecision(4) << std::right
            << (is_memory ? ByteToKilobyte(data.max_aggregate_) : MicroToMilli(data.max_aggregate_))
-           << " "
-           << std::fixed << std::setw(16) << std::setprecision(4) << std::right
-           << (data.type_ == AggregateStats::StatData::kCounter ?
-                    ByteToKilobyte((data.max_aggregate_ - data.min_aggregate_) / 2) :
-                    MicroToMilli(static_cast<double>(data.total_aggregate_)/ data.total_count_));
+           << " " << std::fixed << std::setw(16) << std::setprecision(4) << std::right
+           << (data.type_ == AggregateStats::StatData::kCounter
+                   ? ByteToKilobyte((data.max_aggregate_ - data.min_aggregate_) / 2)
+                   : MicroToMilli(static_cast<double>(data.total_aggregate_) / data.total_count_));
         os << std::endl;
       }
       heap.pop();
@@ -173,51 +151,40 @@ void AggregateStats::DumpJson(std::ostream& os, int sort_by, int ascending) {
   std::unique_lock<std::mutex> lk(m_);
   std::stringstream memory_ss;
   std::stringstream time_ss;
-  std::stringstream *ss;
+  std::stringstream* ss;
   for (const auto& stat : stats_) {
-    const std::string& type = stat.first;
+    const std::string& type                             = stat.first;
     const std::unordered_map<std::string, StatData>& mm = stat.second;
-    bool is_memory = (type == "Device Storage"  || type == "Pool Memory");
-    ss = is_memory ? &memory_ss : &time_ss;
+    bool is_memory = (type == "Device Storage" || type == "Pool Memory");
+    ss             = is_memory ? &memory_ss : &time_ss;
     if (ss->tellp() != std::streampos(0))
       *ss << "        ," << std::endl;
     *ss << "        \"" << type << "\": {" << std::endl;
-    auto heap = BuildHeap(mm, sort_by, ascending);
+    auto heap       = BuildHeap(mm, sort_by, ascending);
     bool first_pass = true;
     while (!heap.empty()) {
       const std::string& name = heap.top().second;
-      const StatData &data = mm.at(name);
+      const StatData& data    = mm.at(name);
       if (data.type_ == AggregateStats::StatData::kDuration ||
           data.type_ == AggregateStats::StatData::kCounter) {
         if (!first_pass)
           *ss << "            ," << std::endl;
         first_pass = false;
         *ss << "            \"" << name << "\": {" << std::endl
-            << "                \"Count\": "
-            << data.total_count_
-            << "," << std::endl;
+            << "                \"Count\": " << data.total_count_ << "," << std::endl;
         if (!is_memory)
-          *ss << "                \"Total\": "
-              << std::setprecision(4)
-              << MicroToMilli(data.total_aggregate_)
-              << "," << std::endl;
-        *ss << "                \"Min\": "
-            << std::setprecision(4)
-            << (is_memory ?
-                ByteToKilobyte(data.min_aggregate_) :
-                MicroToMilli(data.min_aggregate_))
+          *ss << "                \"Total\": " << std::setprecision(4)
+              << MicroToMilli(data.total_aggregate_) << "," << std::endl;
+        *ss << "                \"Min\": " << std::setprecision(4)
+            << (is_memory ? ByteToKilobyte(data.min_aggregate_) : MicroToMilli(data.min_aggregate_))
             << "," << std::endl
-            << "                \"Max\": "
-            << std::setprecision(4)
-            << (is_memory ?
-                ByteToKilobyte(data.max_aggregate_) :
-                MicroToMilli(data.max_aggregate_))
+            << "                \"Max\": " << std::setprecision(4)
+            << (is_memory ? ByteToKilobyte(data.max_aggregate_) : MicroToMilli(data.max_aggregate_))
             << "," << std::endl
-            << "                \"Avg\": "
-            << std::setprecision(4)
-            << (data.type_ == AggregateStats::StatData::kCounter ?
-                 ByteToKilobyte((data.max_aggregate_ - data.min_aggregate_) / 2) :
-                 MicroToMilli(static_cast<double>(data.total_aggregate_) /  data.total_count_))
+            << "                \"Avg\": " << std::setprecision(4)
+            << (data.type_ == AggregateStats::StatData::kCounter
+                    ? ByteToKilobyte((data.max_aggregate_ - data.min_aggregate_) / 2)
+                    : MicroToMilli(static_cast<double>(data.total_aggregate_) / data.total_count_))
             << std::endl
             << "            }" << std::endl;
       }
@@ -227,12 +194,10 @@ void AggregateStats::DumpJson(std::ostream& os, int sort_by, int ascending) {
   }
   os << "{" << std::endl
      << "    \"Time\": {" << std::endl
-     << time_ss.str()
-     << "    }" << std::endl
+     << time_ss.str() << "    }" << std::endl
      << "    ," << std::endl
      << "    \"Memory\": {" << std::endl
-     << memory_ss.str()
-     << "    }" << std::endl
+     << memory_ss.str() << "    }" << std::endl
      << "," << std::endl
      << "    \"Unit\": {" << std::endl
      << R"(        "Time": "ms",)" << std::endl
diff --git a/src/profiler/aggregate_stats.h b/src/profiler/aggregate_stats.h
index fe7521adc544..fc5c640739b6 100644
--- a/src/profiler/aggregate_stats.h
+++ b/src/profiler/aggregate_stats.h
@@ -38,17 +38,13 @@ class AggregateStats {
     /*!
      * \brief Types that the console printer knows how to format
      */
-    enum StatType {
-      kDuration = 1,
-      kCounter = 2,
-      kOther = 4
-    };
+    enum StatType { kDuration = 1, kCounter = 2, kOther = 4 };
 
-    StatType  type_ = kOther;
-    size_t    total_count_ = 0;
-    uint64_t  total_aggregate_ = 0;
-    uint64_t  max_aggregate_ = 0;
-    uint64_t  min_aggregate_ = INT_MAX;
+    StatType type_            = kOther;
+    size_t total_count_       = 0;
+    uint64_t total_aggregate_ = 0;
+    uint64_t max_aggregate_   = 0;
+    uint64_t min_aggregate_   = INT_MAX;
   };
 
   /*!
@@ -73,9 +69,7 @@ class AggregateStats {
    */
   void clear();
   /* !\brief by which stat to sort */
-  enum class SortBy {
-    Total, Avg, Min, Max, Count
-  };
+  enum class SortBy { Total, Avg, Min, Max, Count };
 
  private:
   /*! \brief Should rarely collide, so most locks should occur only in user-space (futex) */
diff --git a/src/profiler/custom_op_profiler.h b/src/profiler/custom_op_profiler.h
index 9449e5b84a3a..10f0db0fb9e9 100644
--- a/src/profiler/custom_op_profiler.h
+++ b/src/profiler/custom_op_profiler.h
@@ -1,21 +1,21 @@
 /*
-* Licensed to the Apache Software Foundation (ASF) under one
-* or more contributor license agreements.  See the NOTICE file
-* distributed with this work for additional information
-* regarding copyright ownership.  The ASF licenses this file
-* to you under the Apache License, Version 2.0 (the
-* "License"); you may not use this file except in compliance
-* with the License.  You may obtain a copy of the License at
-*
-*   http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing,
-* software distributed under the License is distributed on an
-* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-* KIND, either express or implied.  See the License for the
-* specific language governing permissions and limitations
-* under the License.
-*/
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
 #ifndef MXNET_PROFILER_CUSTOM_OP_PROFILER_H_
 #define MXNET_PROFILER_CUSTOM_OP_PROFILER_H_
 
@@ -28,13 +28,13 @@
 namespace mxnet {
 namespace profiler {
 
-using Tid = std::thread::id;
+using Tid     = std::thread::id;
 using TaskPtr = std::unique_ptr<ProfileTask>;
 
-  /*!
-   * \brief Singleton class to assist profiling python callback of custom operators
-   * and to assist linking sub-operators to custom operators
-   */
+/*!
+ * \brief Singleton class to assist profiling python callback of custom operators
+ * and to assist linking sub-operators to custom operators
+ */
 class CustomOpProfiler {
  public:
   static CustomOpProfiler* Get() {
@@ -48,21 +48,21 @@ class CustomOpProfiler {
     return prof.get();
   }
   /*!
-   * \brief Called before the callback of custom operators to start a profile task for python 
+   * \brief Called before the callback of custom operators to start a profile task for python
    * code execution time
    * \param op_type The registed name of the custom operator
    */
   void OnCustomBegin(const std::string& op_type) {
-    const Tid tid = std::this_thread::get_id();
+    const Tid tid               = std::this_thread::get_id();
     const std::string task_name = MakePythonCodeName(op_type);
     std::lock_guard<std::mutex> lock(mutex_);
     tid_to_op_type_[tid] = op_type;
-    tasks_[tid] = std::make_unique<ProfileTask>(task_name.c_str(), &custom_op_domain);
+    tasks_[tid]          = std::make_unique<ProfileTask>(task_name.c_str(), &custom_op_domain);
     tasks_[tid]->start();
   }
 
   /*!
-   * \brief Called after the callback of custom operators to stop the profile task for python 
+   * \brief Called after the callback of custom operators to stop the profile task for python
    * code execution time
    */
   void OnCustomEnd() {
@@ -70,15 +70,16 @@ class CustomOpProfiler {
     std::lock_guard<std::mutex> lock(mutex_);
     tid_to_op_type_.erase(tid);
     // this should never fail
-    CHECK(tasks_.find(tid) != tasks_.end()) << "thread_id not found. " <<
-        "Please use OnCustomBegin() and OnCustomEnd() in pairs.";
+    CHECK(tasks_.find(tid) != tasks_.end())
+        << "thread_id not found. "
+        << "Please use OnCustomBegin() and OnCustomEnd() in pairs.";
     tasks_[tid]->stop();
     tasks_.erase(tid);
   }
 
   /*!
    * \brief Generate a display name for sub-operators, which is the name used for OprBlock
-   * and later by profiler, and store it in a unordered_set so that it can be referenced 
+   * and later by profiler, and store it in a unordered_set so that it can be referenced
    * in the future.
    * Notice if the operator is not a sub-operator, just return the char pointer back.
    * \param op_type The registed name of the operator
diff --git a/src/profiler/nvtx.cc b/src/profiler/nvtx.cc
index 9151873aa82a..c21abe5b4036 100644
--- a/src/profiler/nvtx.cc
+++ b/src/profiler/nvtx.cc
@@ -17,5 +17,4 @@
  * under the License.
  */
 
-
 #include "nvtx.h"
diff --git a/src/profiler/nvtx.h b/src/profiler/nvtx.h
index c36bb50d4703..8577d5feb62a 100644
--- a/src/profiler/nvtx.h
+++ b/src/profiler/nvtx.h
@@ -17,7 +17,6 @@
  * under the License.
  */
 
-
 #ifndef MXNET_PROFILER_NVTX_H_
 #define MXNET_PROFILER_NVTX_H_
 
@@ -33,8 +32,7 @@ namespace nvtx {
 
 class NVTXDuration {
  public:
-  explicit NVTXDuration(const char *name) noexcept
-      : range_id_(0), name_(name) {}
+  explicit NVTXDuration(const char* name) noexcept : range_id_(0), name_(name) {}
 
   inline void start() {
     range_id_ = nvtxRangeStartA(name_);
@@ -46,11 +44,9 @@ class NVTXDuration {
 
  private:
   nvtxRangeId_t range_id_;
-  const char *name_;
+  const char* name_;
 };
 
-
-
 }  // namespace nvtx
 }  // namespace profiler
 }  // namespace mxnet
diff --git a/src/profiler/profiler.cc b/src/profiler/profiler.cc
index 107c171107d6..e9f48b5403a8 100644
--- a/src/profiler/profiler.cc
+++ b/src/profiler/profiler.cc
@@ -44,10 +44,10 @@ namespace profiler {
 ProfileDomain ProfileOperator::domain_("operator");
 
 Profiler::Profiler()
-  : state_(kNotRunning)
-    , enable_output_(false)
-    , filename_("profile.json")
-    , profile_dump_count_(0) {
+    : state_(kNotRunning),
+      enable_output_(false),
+      filename_("profile.json"),
+      profile_dump_count_(0) {
   this->init_time_ = ProfileStat::NowInMicrosec();
 
   this->cpu_num_ = 0;
@@ -62,7 +62,7 @@ Profiler::Profiler()
   }
 #if MXNET_USE_CUDA
   int kMaxNumGpus = 32;
-  this->gpu_num_ = kMaxNumGpus;
+  this->gpu_num_  = kMaxNumGpus;
 #else
   this->gpu_num_ = 0;
 #endif
@@ -80,7 +80,7 @@ Profiler::Profiler()
 
   this->mode_ = dmlc::GetEnv("MXNET_PROFILER_MODE", this->mode_);
   if (dmlc::GetEnv("MXNET_PROFILER_AUTOSTART", 0)) {
-    this->state_ = ProfilerState::kRunning;
+    this->state_         = ProfilerState::kRunning;
     this->enable_output_ = true;
     // Since we want to avoid interfering with pure-VTune analysis runs, for not set,
     // vtune will be recording based upon whether "Start" or "STart Paused" was selected
@@ -97,7 +97,7 @@ Profiler::~Profiler() {
   }
 }
 
-Profiler* Profiler::Get(std::shared_ptr<Profiler> *sp) {
+Profiler* Profiler::Get(std::shared_ptr<Profiler>* sp) {
   static std::mutex mtx;
   static std::shared_ptr<Profiler> prof = nullptr;
   if (!prof) {
@@ -131,7 +131,7 @@ void Profiler::SetConfig(int mode,
                          bool aggregate_stats) {
   CHECK(!continuous_dump || dump_period > 0);
   std::lock_guard<std::recursive_mutex> lock{this->m_};
-  this->mode_ = mode;
+  this->mode_     = mode;
   this->filename_ = output_filename;
   // Remove the output file to start
   if (!this->filename_.empty()) {
@@ -152,9 +152,9 @@ void Profiler::SetConfig(int mode,
  * Docs for tracing format:
  * https://docs.google.com/document/d/1CvAClvFfyA5R-PhYUmn5OOQtYMH4h6I0nSsKchNAySU/preview
  */
-void Profiler::EmitPid(std::ostream *os, const std::string& name, size_t pid) {
+void Profiler::EmitPid(std::ostream* os, const std::string& name, size_t pid) {
   (*os) << "        {\n"
-        << R"(            "ph": ")" << static_cast<char>(ProfileStat::kMetadata) <<  "\",\n"
+        << R"(            "ph": ")" << static_cast<char>(ProfileStat::kMetadata) << "\",\n"
         << "            \"args\": {\n"
         << R"(                "name": ")" << name << "\"\n"
         << "            },\n"
@@ -173,11 +173,11 @@ void Profiler::DumpProfile(bool perform_cleanup) {
   }
   std::ofstream file;
   const bool first_pass = ++profile_dump_count_ == 1;
-  const bool last_pass = perform_cleanup || !continuous_dump_;
+  const bool last_pass  = perform_cleanup || !continuous_dump_;
   if (!first_pass && continuous_dump_) {
-    file.open(filename_, std::ios::app|std::ios::out);
+    file.open(filename_, std::ios::app | std::ios::out);
   } else {
-    file.open(filename_, std::ios::trunc|std::ios::out);
+    file.open(filename_, std::ios::trunc | std::ios::out);
   }
   if (first_pass || !continuous_dump_) {
     file << "{" << std::endl;
@@ -188,10 +188,10 @@ void Profiler::DumpProfile(bool perform_cleanup) {
 
   if (first_pass) {
     for (uint32_t pid = 0; pid < dev_num; ++pid) {
-       if (pid) {
-         file << ",\n";
-       }
-      const DeviceStats &d = profile_stat[pid];
+      if (pid) {
+        file << ",\n";
+      }
+      const DeviceStats& d = profile_stat[pid];
       this->EmitPid(&file, d.dev_name_, pid);
       process_ids_.emplace(pid);
     }
@@ -199,11 +199,11 @@ void Profiler::DumpProfile(bool perform_cleanup) {
 
   // Hold ref in case SetConfig() resets aggregate_stats_
   // If aggregate stats aren't enabled, this won't cause a locked instruction
-  std::shared_ptr<AggregateStats> ptr_aggregate_stats = aggregate_stats_.get()
-                                                        ? aggregate_stats_ : nullptr;
+  std::shared_ptr<AggregateStats> ptr_aggregate_stats =
+      aggregate_stats_.get() ? aggregate_stats_ : nullptr;
   for (uint32_t i = 0; i < dev_num; ++i) {
-    DeviceStats &d = profile_stat[i];
-    ProfileStat *_opr_stat;
+    DeviceStats& d = profile_stat[i];
+    ProfileStat* _opr_stat;
     while (d.opr_exec_stats_->try_dequeue(_opr_stat)) {
       CHECK_NOTNULL(_opr_stat);
       std::unique_ptr<ProfileStat> opr_stat(_opr_stat);  // manage lifecycle
@@ -218,7 +218,7 @@ void Profiler::DumpProfile(bool perform_cleanup) {
   }
 
   // Now do the non-device items
-  ProfileStat *_profile_stat;
+  ProfileStat* _profile_stat;
   while (general_stats_.opr_exec_stats_->try_dequeue(_profile_stat)) {
     CHECK_NOTNULL(_profile_stat);
     file << ",";
@@ -229,8 +229,8 @@ void Profiler::DumpProfile(bool perform_cleanup) {
     if (iter == category_to_pid_.end()) {
       static std::hash<std::string> hash_fn;
       const size_t this_pid = hash_fn(profile_stat->categories_.c_str());
-      iter = category_to_pid_.emplace(std::make_pair(profile_stat->categories_.c_str(),
-                                                     this_pid)).first;
+      iter = category_to_pid_.emplace(std::make_pair(profile_stat->categories_.c_str(), this_pid))
+                 .first;
       EmitPid(&file, profile_stat->categories_.c_str(), iter->second);
       file << ",\n";
     }
@@ -261,7 +261,7 @@ void Profiler::SetContinuousProfileDump(bool continuous_dump, float delay_in_sec
     this->continuous_dump_ = true;  // Continuous doesn't make sense without append mode
     DumpProfile(false);
     std::shared_ptr<dmlc::ThreadGroup::Thread> old_thread =
-      thread_group_->thread_by_name(TIMER_THREAD_NAME);
+        thread_group_->thread_by_name(TIMER_THREAD_NAME);
     if (old_thread && old_thread->is_shutdown_requested()) {
       // This should never happen unless someone is doing something malicious
       // At any rate, wait for its shutdown to complete
@@ -275,18 +275,17 @@ void Profiler::SetContinuousProfileDump(bool continuous_dump, float delay_in_sec
       old_thread.reset();
     }
     if (!old_thread) {
-      dmlc::CreateTimer(
-        TIMER_THREAD_NAME,
-        std::chrono::milliseconds(static_cast<size_t>(delay_in_seconds * 1000.0f)),
-        thread_group_.get(),
-        [this]() -> int {
-          DumpProfile(false);
-          return 0;
-        });
+      dmlc::CreateTimer(TIMER_THREAD_NAME,
+                        std::chrono::milliseconds(static_cast<size_t>(delay_in_seconds * 1000.0f)),
+                        thread_group_.get(),
+                        [this]() -> int {
+                          DumpProfile(false);
+                          return 0;
+                        });
     }
   } else {
     std::shared_ptr<dmlc::ThreadGroup::Thread> old_thread =
-      thread_group_->thread_by_name(TIMER_THREAD_NAME);
+        thread_group_->thread_by_name(TIMER_THREAD_NAME);
     if (old_thread) {
       // Signal it to finish asynchronously
       old_thread->request_shutdown();
diff --git a/src/profiler/profiler.h b/src/profiler/profiler.h
index 6dc3cf46c895..77b3f735927c 100644
--- a/src/profiler/profiler.h
+++ b/src/profiler/profiler.h
@@ -38,22 +38,25 @@
 #include "./nvtx.h"
 #include "../common/utils.h"
 
-
 namespace mxnet {
 namespace profiler {
 
-
-
 /*!
  * \brief Constant-sized character array class with simple string API to avoid allocations
  * \tparam string_size Maximum size of the string (including zero-terminator)
  */
-template<size_t string_size>
+template <size_t string_size>
 struct static_string {
-  inline static_string() { string_[0] = '\0'; }
-  inline explicit static_string(const char *s) { set(s); }
-  inline const char *c_str() const { return &string_[0]; }
-  inline void set(const char *s) {
+  inline static_string() {
+    string_[0] = '\0';
+  }
+  inline explicit static_string(const char* s) {
+    set(s);
+  }
+  inline const char* c_str() const {
+    return &string_[0];
+  }
+  inline void set(const char* s) {
 #pragma GCC diagnostic push
 #if __GNUC__ >= 8
 #pragma GCC diagnostic ignored "-Wstringop-truncation"
@@ -62,13 +65,14 @@ struct static_string {
 #pragma GCC diagnostic pop
     string_[string_size - 1] = '\0';
   }
-  inline void append(const char *s) {
+  inline void append(const char* s) {
     const size_t l = strlen(&string_[0]);
     if (l < string_size - 1) {
       strncpy(&string_[0] + l, s, string_size - l - 1);
       string_[string_size - 1] = '\0';
     }
   }
+
  private:
   /*! \brief The actual character array */
   std::array<char, string_size> string_;
@@ -82,31 +86,33 @@ using profile_stat_string = static_string<128>;
 struct ProfileStat {
   /*!
    * \brief Event type as used for chrome://tracing support
-   * \note Tracing formats: https://docs.google.com/document/d/1CvAClvFfyA5R-PhYUmn5OOQtYMH4h6I0nSsKchNAySU/preview NOLINT(*)
+   * \note Tracing formats:
+   * https://docs.google.com/document/d/1CvAClvFfyA5R-PhYUmn5OOQtYMH4h6I0nSsKchNAySU/preview
+   * NOLINT(*)
    */
   enum EventType {
-    kDurationBegin = 'B',
-    kDurationEnd = 'E',
-    kComplete = 'X',
-    kInstant = 'i',
-    kCounter = 'C',
-    kAsyncNestableStart = 'b',
+    kDurationBegin        = 'B',
+    kDurationEnd          = 'E',
+    kComplete             = 'X',
+    kInstant              = 'i',
+    kCounter              = 'C',
+    kAsyncNestableStart   = 'b',
     kAsyncNestableInstant = 'n',
-    kAsyncNestableEnd = 'e',
-    kFlowStart = 's',
-    kFlowStep = 't',
-    kFlowEnd = 'f',
-    kSample = 'P',
-    kObjectCreated = 'N',
-    kObjectSnapshot = 'O',
-    kObjectDestroyed = 'D',
-    kMetadata = 'M',
-    kMemoryDumpGlobal = 'V',
-    kMemoryDumpProcess = 'v',
-    kMark = 'R',
-    kClockSync = 'c',
-    kContextEnter = '(',
-    kContextLeave = ')'
+    kAsyncNestableEnd     = 'e',
+    kFlowStart            = 's',
+    kFlowStep             = 't',
+    kFlowEnd              = 'f',
+    kSample               = 'P',
+    kObjectCreated        = 'N',
+    kObjectSnapshot       = 'O',
+    kObjectDestroyed      = 'D',
+    kMetadata             = 'M',
+    kMemoryDumpGlobal     = 'V',
+    kMemoryDumpProcess    = 'v',
+    kMark                 = 'R',
+    kClockSync            = 'c',
+    kContextEnter         = '(',
+    kContextLeave         = ')'
   };
 
   struct SubEvent {
@@ -151,7 +157,8 @@ struct ProfileStat {
     return counter.QuadPart * 1000000 / frequency.QuadPart;
 #else
     return std::chrono::duration_cast<std::chrono::microseconds>(
-      std::chrono::high_resolution_clock::now().time_since_epoch()).count();
+               std::chrono::high_resolution_clock::now().time_since_epoch())
+        .count();
 #endif
   }
 
@@ -160,7 +167,7 @@ struct ProfileStat {
    * \param os Output stream to write the data
    * \note Emits all sub-even statistics
    */
-  void EmitEvents(std::ostream *os) {
+  void EmitEvents(std::ostream* os) {
     size_t count = 0;
     for (size_t i = 0; i < sizeof(items_) / sizeof(items_[0]); ++i) {
       if (items_[i].enabled_) {
@@ -182,7 +189,7 @@ struct ProfileStat {
    * \brief Save aggregate data for this stat
    * \param data Stat data
    */
-  virtual void SaveAggregate(AggregateStats::StatData *data) const {
+  virtual void SaveAggregate(AggregateStats::StatData* data) const {
     if (data) {
       data->type_ = AggregateStats::StatData::kOther;
     }
@@ -194,19 +201,20 @@ struct ProfileStat {
    * \param os Output stream to write data to
    * \param idx Sub-even index (index into items_) to write
    */
-  virtual void EmitExtra(std::ostream *os, size_t idx) {}
+  virtual void EmitExtra(std::ostream* os, size_t idx) {}
 
   /*!
    * \brief Emit sub-event statistics
    * \param os Output stream
    * \param idx Sub-even index (index into items_) to write
    */
-  void EmitSubEvent(std::ostream *os, size_t idx) {
-    const SubEvent &ev = items_[idx];
+  void EmitSubEvent(std::ostream* os, size_t idx) {
+    const SubEvent& ev = items_[idx];
     if (ev.enabled_) {
       *os << "    {\n"
           << "        \"name\": \"" << name_.c_str() << "\",\n"
-          << "        \"cat\": " << "\"" << categories_.c_str() << "\",\n"
+          << "        \"cat\": "
+          << "\"" << categories_.c_str() << "\",\n"
           << "        \"ph\": \"" << static_cast<char>(ev.event_type_) << "\",\n"
           << "        \"ts\": " << ev.timestamp_ << ",\n";
       EmitExtra(os, idx);
@@ -221,14 +229,14 @@ struct ProfileStat {
  * \brief Device statistics
  */
 struct DeviceStats {
-  using TQueue = dmlc::moodycamel::ConcurrentQueue<ProfileStat *>;
+  using TQueue = dmlc::moodycamel::ConcurrentQueue<ProfileStat*>;
   /*!
    * \brief Destructor, clean up allocated objects
    */
   ~DeviceStats() {
     std::shared_ptr<TQueue> es = opr_exec_stats_;
     if (es) {
-      ProfileStat *stat = nullptr;
+      ProfileStat* stat = nullptr;
       while (es->try_dequeue(stat)) {
         delete stat;
       }
@@ -255,16 +263,8 @@ struct DeviceStats {
  */
 class Profiler {
  public:
-  enum ProfilerMode {
-      kSymbolic = 1,
-      kImperative = 2,
-      kAPI = 4,
-      kMemory = 8
-  };
-  enum ProfilerState {
-      kNotRunning = 0,
-      kRunning = 1
-  };
+  enum ProfilerMode { kSymbolic = 1, kImperative = 2, kAPI = 4, kMemory = 8 };
+  enum ProfilerState { kNotRunning = 0, kRunning = 1 };
 
   /*! \brief set state of profiler */
   void SetState(ProfilerState state);
@@ -279,7 +279,8 @@ class Profiler {
    * \param continuous_dump true if profile information should be periodically dumped
    * \param dump_period Period (in seconds) of profile info dumping
    */
-  void SetConfig(int mode, std::string output_filename,
+  void SetConfig(int mode,
+                 std::string output_filename,
                  bool continuous_dump,
                  float dump_period,
                  bool aggregate_stats);
@@ -319,7 +320,7 @@ class Profiler {
    *       callback.  Another option is to use the CreateProfileStat()/AddProfileStat() pair,
    *       adding it only after
    */
-  template<typename StatType, typename SetExtraInfoFunction, typename ...Args>
+  template <typename StatType, typename SetExtraInfoFunction, typename... Args>
   void AddNewProfileStat(SetExtraInfoFunction set_extra_info_function, Args... args) {
     if (!paused_) {
       std::unique_ptr<StatType> stat = CreateProfileStat<StatType>(args...);
@@ -341,7 +342,7 @@ class Profiler {
    * \return Profiler singleton
    * \param sp Profiler shared pointer, only use for singleton ownership
    */
-  static Profiler* Get(std::shared_ptr<Profiler> *sp = nullptr);
+  static Profiler* Get(std::shared_ptr<Profiler>* sp = nullptr);
 
   /*!
    * \brief Set whether statistic collection is to be paused
@@ -349,14 +350,18 @@ class Profiler {
    * resume statistic collection
    * \note Pause/Resume is not recursive
    */
-  void set_paused(bool paused) { paused_ = paused; }
+  void set_paused(bool paused) {
+    paused_ = paused;
+  }
 
   /*!
    * \brief Get the calculated device count (numb er of devices to track in profile data).
    * \return Device count
    * \note Number of CPU's + Number of GPU's + One for CPU-Pinned
    */
-  size_t DeviceCount() const { return cpu_num_ + gpu_num_ + 2; }
+  size_t DeviceCount() const {
+    return cpu_num_ + gpu_num_ + 2;
+  }
 
   /*!
    * \brief Compute device index given device type and id
@@ -372,8 +377,7 @@ class Profiler {
    * \param dev_id Device ID
    * \return Character pointer to device name
    */
-  const char *DeviceName(mxnet::Context::DeviceType dev_type, int32_t dev_id);
-
+  const char* DeviceName(mxnet::Context::DeviceType dev_type, int32_t dev_id);
 
   /*!
    * \brief Device name
@@ -381,7 +385,7 @@ class Profiler {
    * \param dev_id Device ID
    * \return Character pointer to device name
    */
-  const char *DeviceName(const size_t index);
+  const char* DeviceName(const size_t index);
 
   /*!
    * \brief Whether aggregate stats are being collected
@@ -418,9 +422,10 @@ class Profiler {
    * \param args Arguments to pass to the new object's constructor
    * \return A unique_ptr to the new statistic object
    */
-  template<typename StatType, typename ...Args>
-  static std::unique_ptr<typename std::enable_if<std::is_base_of<ProfileStat, StatType>::value,
-    StatType>::type> CreateProfileStat(Args... args) {
+  template <typename StatType, typename... Args>
+  static std::unique_ptr<
+      typename std::enable_if<std::is_base_of<ProfileStat, StatType>::value, StatType>::type>
+  CreateProfileStat(Args... args) {
     return std::unique_ptr<StatType>(new StatType(args...));
   }
 
@@ -429,13 +434,13 @@ class Profiler {
    * \tparam StatType Type of the statistic object
    * \param stat The statistic object
    */
-  template<typename StatType>
-  inline void AddProfileStat(std::unique_ptr<StatType> *stat) {
+  template <typename StatType>
+  inline void AddProfileStat(std::unique_ptr<StatType>* stat) {
     general_stats_.opr_exec_stats_->enqueue(stat->release());
   }
 
   /*! \brief generate device information following chrome profile file format */
-  void EmitPid(std::ostream *os, const std::string& name, size_t pid);
+  void EmitPid(std::ostream* os, const std::string& name, size_t pid);
 
   /*!
    * \brief Set continuous asynchronous profile dump
@@ -457,7 +462,7 @@ class Profiler {
   /*! \brief profile statistics consist of multiple device statistics */
   std::unique_ptr<DeviceStats[]> profile_stat;
   /*! \brief Stats not associated directly with a device */
-  DeviceStats  general_stats_;
+  DeviceStats general_stats_;
   /*! \brief Map category -> pid */
   std::unordered_map<std::string, size_t> category_to_pid_;
   /*! \brief cpu number on the machine */
@@ -484,15 +489,15 @@ class Profiler {
 };
 
 #ifdef MXNET_USE_VTUNE
-#define VTUNE_ONLY_CODE(...) __VA_ARGS__  /* This is undefined at the bottom of this file */
+#define VTUNE_ONLY_CODE(...) __VA_ARGS__ /* This is undefined at the bottom of this file */
 #else
-#define VTUNE_ONLY_CODE(...) /* */        /* This is undefined at the bottom of this file */
+#define VTUNE_ONLY_CODE(...) /* */ /* This is undefined at the bottom of this file */
 #endif
 
 #ifdef MXNET_USE_NVTX
-#define NVTX_ONLY_CODE(...) __VA_ARGS__  /* This is undefined at the bottom of this file */
+#define NVTX_ONLY_CODE(...) __VA_ARGS__ /* This is undefined at the bottom of this file */
 #else
-#define NVTX_ONLY_CODE(...) /* */        /* This is undefined at the bottom of this file */
+#define NVTX_ONLY_CODE(...) /* */ /* This is undefined at the bottom of this file */
 #endif
 
 /**
@@ -506,13 +511,7 @@ class Profiler {
  *                                       |___/             |__/
  */
 
-enum ProfileObjectType {
-  kDomain,
-  kCounter,
-  kTask,
-  kEvent,
-  kFrame
-};
+enum ProfileObjectType { kDomain, kCounter, kTask, kEvent, kFrame };
 
 class ProfileObject {
  public:
@@ -536,8 +535,7 @@ struct ProfileDomain : public ProfileObject {
    * \brief Constructor
    * \param name Name of the domain
    */
-  explicit ProfileDomain(const char *name) noexcept
-    : name_(name) {
+  explicit ProfileDomain(const char* name) noexcept : name_(name) {
     CHECK_NOTNULL(name);
     CHECK_NE(name[0], '\0');
     VTUNE_ONLY_CODE(vtune_domain_.reset(new vtune::VTuneDomain(name)));
@@ -546,9 +544,14 @@ struct ProfileDomain : public ProfileObject {
    * \brief Get domain name
    * \return Domain name
    */
-  const char *name() const { return name_.c_str(); }
-  ProfileObjectType type() const override { return kDomain; }
-  VTUNE_ONLY_CODE(inline vtune::VTuneDomain *dom() { return vtune_domain_.get(); });
+  const char* name() const {
+    return name_.c_str();
+  }
+  ProfileObjectType type() const override {
+    return kDomain;
+  }
+  VTUNE_ONLY_CODE(inline vtune::VTuneDomain* dom() { return vtune_domain_.get(); });
+
  private:
   /*! \brief Name of the domain */
   profile_stat_string name_;
@@ -565,38 +568,36 @@ struct ProfileCounter : public ProfileObject {
    * \param name Counter name
    * \param domain Counter domain
    */
-  ProfileCounter(const char *name, ProfileDomain *domain) noexcept
-    : name_(name)
-      , domain_(domain)
-      , value_(0) {
+  ProfileCounter(const char* name, ProfileDomain* domain) noexcept
+      : name_(name), domain_(domain), value_(0) {
     CHECK_NOTNULL(domain);
     VTUNE_ONLY_CODE(vtune_.reset(new vtune::VTuneCounter(name, domain->dom())));
   }
   ~ProfileCounter() {}
   /*! \brief operator: ++object */
-  inline uint64_t operator ++() {
+  inline uint64_t operator++() {
     return IncrementValue(1);
   }
   /*! \brief operator: object++ */
-  inline uint64_t operator ++(int) {
+  inline uint64_t operator++(int) {
     const uint64_t old = value_;
     IncrementValue(1);
     return old;
   }
   /*! \brief operator: --object */
-  inline uint64_t operator --() {
+  inline uint64_t operator--() {
     CHECK_GT(value_, 0);
     return DecrementValue(1);
   }
   /*! \brief operator: object-- */
-  inline uint64_t operator --(int) {
+  inline uint64_t operator--(int) {
     CHECK_GT(value_, 0);
     const uint64_t old = value_;
     DecrementValue(1);
     return old;
   }
   /*! \brief operator: object += v */
-  inline uint64_t operator +=(int64_t v) {
+  inline uint64_t operator+=(int64_t v) {
     if (v >= 0) {
       return IncrementValue(static_cast<uint64_t>(v));
     } else {
@@ -605,7 +606,7 @@ struct ProfileCounter : public ProfileObject {
     }
   }
   /*! \brief operator: object -= v */
-  inline uint64_t operator -=(int64_t v) {
+  inline uint64_t operator-=(int64_t v) {
     CHECK_GE(value_, static_cast<uint64_t>(v));
     if (v >= 0) {
       return DecrementValue(static_cast<uint64_t>(v));
@@ -615,18 +616,20 @@ struct ProfileCounter : public ProfileObject {
     }
   }
 
-  inline bool operator >=(int64_t v) {
-      CHECK_GE(v, 0);
-      return value_ >= static_cast<uint64_t>(v);
+  inline bool operator>=(int64_t v) {
+    CHECK_GE(v, 0);
+    return value_ >= static_cast<uint64_t>(v);
   }
 
   /*! \brief operator: object = v */
-  inline ProfileCounter& operator = (uint64_t v) {
+  inline ProfileCounter& operator=(uint64_t v) {
     SetValue(v);
     return *this;
   }
 
-  ProfileObjectType type() const override { return kCounter; }
+  ProfileObjectType type() const override {
+    return kCounter;
+  }
 
  protected:
   /*!
@@ -634,10 +637,10 @@ struct ProfileCounter : public ProfileObject {
    */
   struct ProfileCounterStat : public ProfileStat {
     uint64_t value_;
-    explicit ProfileCounterStat(const char *name, uint64_t value) : value_(value) {
-      items_[0].enabled_ = true;
+    explicit ProfileCounterStat(const char* name, uint64_t value) : value_(value) {
+      items_[0].enabled_    = true;
       items_[0].event_type_ = kCounter;
-      items_->timestamp_ = NowInMicrosec();
+      items_->timestamp_    = NowInMicrosec();
       name_.set(name);
     }
 
@@ -646,7 +649,7 @@ struct ProfileCounter : public ProfileObject {
      * \param os Output stream to write data to
      * \param idx Sub-even index (index into items_) to write
      */
-    void EmitExtra(std::ostream *os, size_t idx) override {
+    void EmitExtra(std::ostream* os, size_t idx) override {
       ProfileStat::EmitExtra(os, idx);
       *os << "        \"args\": { \"" << name_.c_str() << "\": " << value_ << " },\n";
     }
@@ -655,7 +658,7 @@ struct ProfileCounter : public ProfileObject {
      * \brief Save aggregate data for this stat
      * \param data Stat data
      */
-    void SaveAggregate(AggregateStats::StatData *data) const override {
+    void SaveAggregate(AggregateStats::StatData* data) const override {
       if (data) {
         data->type_ = AggregateStats::StatData::kCounter;
         ++data->total_count_;
@@ -675,11 +678,10 @@ struct ProfileCounter : public ProfileObject {
    * \brief Send this object's statistical datapoint to the profiler
    */
   inline void SendStat(uint64_t value) {
-    Profiler::Get()->AddNewProfileStat<ProfileCounterStat>([this](ProfileCounterStat *stat) {
-                                                             stat->categories_.set(domain_->name());
-                                                           },
-                                                           name_.c_str(),
-                                                           value);
+    Profiler::Get()->AddNewProfileStat<ProfileCounterStat>(
+        [this](ProfileCounterStat* stat) { stat->categories_.set(domain_->name()); },
+        name_.c_str(),
+        value);
   }
 
   /*!
@@ -713,9 +715,9 @@ struct ProfileCounter : public ProfileObject {
   /*! \brief Name of the counter */
   profile_stat_string name_;
   /*! \brief Domain of the counter */
-  ProfileDomain *domain_;
+  ProfileDomain* domain_;
   /*! \brief Value of the counter */
-  std::atomic<uint64_t>  value_;
+  std::atomic<uint64_t> value_;
   /*! \brief VTune counter object */
   VTUNE_ONLY_CODE(std::unique_ptr<vtune::VTuneCounter> vtune_);
 };
@@ -723,33 +725,31 @@ struct ProfileCounter : public ProfileObject {
 class ProfileDuration : public ProfileObject {
  public:
   virtual void start() = 0;
-  virtual void stop() = 0;
+  virtual void stop()  = 0;
 
  protected:
   /*!
    * \brief Basic duration statistic (start time, stop time)
    */
   struct DurationStat : public ProfileStat {
-    enum DurationStatIndex {
-      kStart, kStop
-    };
+    enum DurationStatIndex { kStart, kStop };
     /*!
      * \brief Constructor
      * \param begin_event Event type for start point (default is kDurationBegin)
      * \param end_event Event type for stop point (default is kDurationEnd)
      */
     DurationStat(ProfileStat::EventType begin_event = ProfileStat::kDurationBegin,
-                 ProfileStat::EventType end_event = ProfileStat::kDurationEnd) {
+                 ProfileStat::EventType end_event   = ProfileStat::kDurationEnd) {
       items_[kStart].enabled_ = items_[kStop].enabled_ = true;
-      items_[kStart].event_type_ = begin_event;
-      items_[kStop].event_type_ = end_event;
+      items_[kStart].event_type_                       = begin_event;
+      items_[kStop].event_type_                        = end_event;
     }
 
     /*!
      * \brief Save aggregate data for this stat
      * \param data Stat data
      */
-    void SaveAggregate(AggregateStats::StatData *data) const override {
+    void SaveAggregate(AggregateStats::StatData* data) const override {
       if (data) {
         data->type_ = AggregateStats::StatData::kDuration;
         ++data->total_count_;
@@ -776,9 +776,7 @@ struct ProfileTask : public ProfileDuration {
    * \param name Name of the task
    * \param domain Domain of the task
    */
-  ProfileTask(const char *name, ProfileDomain *domain)
-    : name_(name)
-      , domain_(domain) {
+  ProfileTask(const char* name, ProfileDomain* domain) : name_(name), domain_(domain) {
     CHECK_NOTNULL(domain);
     categories_.set(domain_->name());
     categories_.append(",task");
@@ -811,7 +809,9 @@ struct ProfileTask : public ProfileDuration {
     SendStat();
   }
 
-  ProfileObjectType type() const override { return kTask; }
+  ProfileObjectType type() const override {
+    return kTask;
+  }
 
   /*!
    * \brief Whether to add stat to AggregateStats
@@ -825,13 +825,13 @@ struct ProfileTask : public ProfileDuration {
    * \brief Task statistic object
    */
   struct ProfileTaskStat : public DurationStat {
-    explicit ProfileTaskStat(const char *name, uint64_t start_time, uint64_t stop_time)
-      : DurationStat(ProfileStat::kAsyncNestableStart, ProfileStat::kAsyncNestableEnd) {
+    explicit ProfileTaskStat(const char* name, uint64_t start_time, uint64_t stop_time)
+        : DurationStat(ProfileStat::kAsyncNestableStart, ProfileStat::kAsyncNestableEnd) {
       name_.set(name);
       items_[0].timestamp_ = start_time;
       items_[1].timestamp_ = stop_time;
     }
-    void EmitExtra(std::ostream *os, size_t idx) override {
+    void EmitExtra(std::ostream* os, size_t idx) override {
       DurationStat::EmitExtra(os, idx);
       *os << "        \"id\": " << std::hash<std::thread::id>{}(thread_id_) << ",\n";
     }
@@ -842,17 +842,21 @@ struct ProfileTask : public ProfileDuration {
    * \brief Send this object's statistical datapoint to the profiler
    */
   inline void SendStat() {
-    Profiler::Get()->AddNewProfileStat<ProfileTaskStat>([this](ProfileTaskStat *stat) {
-      stat->categories_.set(domain_->name());
-      stat->enable_aggregate_ = enable_aggregate_;
-    }, name_.c_str(), start_time_, ProfileStat::NowInMicrosec());
+    Profiler::Get()->AddNewProfileStat<ProfileTaskStat>(
+        [this](ProfileTaskStat* stat) {
+          stat->categories_.set(domain_->name());
+          stat->enable_aggregate_ = enable_aggregate_;
+        },
+        name_.c_str(),
+        start_time_,
+        ProfileStat::NowInMicrosec());
   }
   /*! \brief Task name */
-  const profile_stat_string  name_;
+  const profile_stat_string name_;
   /*! \brief Task categories */
   profile_stat_string categories_;
   /*! \brief domain */
-  ProfileDomain *domain_;
+  ProfileDomain* domain_;
   /*! \brief VTune task object */
   VTUNE_ONLY_CODE(std::unique_ptr<vtune::VTuneTask> vtune_task_);
   /*! \brief NVTX duration object */
@@ -868,14 +872,12 @@ struct ProfileTask : public ProfileDuration {
 /*!
  * \brief Event - Thread-granular time block
  */
-struct ProfileEvent  : public ProfileDuration {
+struct ProfileEvent : public ProfileDuration {
   /*!
    * \brief Constructor
    * \param name Name of the event
    */
-  explicit inline ProfileEvent(const char *name)
-    : name_(name)
-      , categories_("event") {
+  explicit inline ProfileEvent(const char* name) : name_(name), categories_("event") {
     VTUNE_ONLY_CODE(vtune_event_ = vtune::VTuneEvent::registry_.get(name));
     NVTX_ONLY_CODE(nvtx_duration_.reset(new nvtx::NVTXDuration(name)));
   }
@@ -901,19 +903,21 @@ struct ProfileEvent  : public ProfileDuration {
    * \brief Set catagories (used for chrome tracing)
    * \param categories Comma-delimited categories
    */
-  void SetCategories(const char *categories) {
+  void SetCategories(const char* categories) {
     categories_.set(categories);
   }
 
-  ProfileObjectType type() const override { return kEvent; }
+  ProfileObjectType type() const override {
+    return kEvent;
+  }
 
  protected:
   /*!
    * \brief Event statistic object
    */
   struct ProfileEventStat : public DurationStat {
-    explicit ProfileEventStat(const char *name, uint64_t start_time, uint64_t stop_time)
-      : DurationStat(ProfileStat::kDurationBegin, ProfileStat::kDurationEnd) {
+    explicit ProfileEventStat(const char* name, uint64_t start_time, uint64_t stop_time)
+        : DurationStat(ProfileStat::kDurationBegin, ProfileStat::kDurationEnd) {
       name_.set(name);
       items_[0].timestamp_ = start_time;
       items_[1].timestamp_ = stop_time;
@@ -925,16 +929,18 @@ struct ProfileEvent  : public ProfileDuration {
    * \brief Send this object's statistical datapoint to the profiler
    */
   virtual void SendStat() {
-    Profiler::Get()->AddNewProfileStat<ProfileEventStat>([this](ProfileEventStat *stat) {
-      stat->categories_.set(categories_.c_str());
-    }, name_.c_str(), start_time_, ProfileStat::NowInMicrosec());
+    Profiler::Get()->AddNewProfileStat<ProfileEventStat>(
+        [this](ProfileEventStat* stat) { stat->categories_.set(categories_.c_str()); },
+        name_.c_str(),
+        start_time_,
+        ProfileStat::NowInMicrosec());
   }
   /*! \brief Event name */
-  const profile_stat_string  name_;
+  const profile_stat_string name_;
   /*! \brief Event categories (comma-delimited) */
   profile_stat_string categories_;
   /*! \brief VTune event object */
-  VTUNE_ONLY_CODE(vtune::VTuneEvent *vtune_event_);
+  VTUNE_ONLY_CODE(vtune::VTuneEvent* vtune_event_);
   /*! \brief NVTX duration object */
   NVTX_ONLY_CODE(std::unique_ptr<nvtx::NVTXDuration> nvtx_duration_;);
 
@@ -952,9 +958,7 @@ struct ProfileFrame : public ProfileDuration {
    * \param name Name of the frame
    * \param domain Domain of the frame
    */
-  ProfileFrame(const char *name, ProfileDomain *domain)
-    : name_(name)
-      , domain_(domain) {
+  ProfileFrame(const char* name, ProfileDomain* domain) : name_(name), domain_(domain) {
     CHECK_NOTNULL(domain);
     categories_.set(domain_->name());
     categories_.append(",frame");
@@ -979,15 +983,17 @@ struct ProfileFrame : public ProfileDuration {
     SendStat();
   }
 
-  ProfileObjectType type() const override { return kFrame; }
+  ProfileObjectType type() const override {
+    return kFrame;
+  }
 
  protected:
   /*!
    * \brief Frame statistic object
    */
   struct ProfileFrameStat : public DurationStat {
-    explicit ProfileFrameStat(const char *name, uint64_t start_time, uint64_t stop_time)
-      : DurationStat(ProfileStat::kContextEnter, ProfileStat::kContextLeave) {
+    explicit ProfileFrameStat(const char* name, uint64_t start_time, uint64_t stop_time)
+        : DurationStat(ProfileStat::kContextEnter, ProfileStat::kContextLeave) {
       name_.set(name);
       items_[0].timestamp_ = start_time;
       items_[1].timestamp_ = stop_time;
@@ -999,16 +1005,18 @@ struct ProfileFrame : public ProfileDuration {
    * \brief Send this object's statistical datapoint to the profiler
    */
   inline void SendStat() {
-    Profiler::Get()->AddNewProfileStat<ProfileFrameStat>([this](ProfileFrameStat *stat) {
-      stat->categories_.set(categories_.c_str());
-    }, name_.c_str(), start_time_, ProfileStat::NowInMicrosec());
+    Profiler::Get()->AddNewProfileStat<ProfileFrameStat>(
+        [this](ProfileFrameStat* stat) { stat->categories_.set(categories_.c_str()); },
+        name_.c_str(),
+        start_time_,
+        ProfileStat::NowInMicrosec());
   }
   /*! \brief Frame name */
-  const profile_stat_string  name_;
+  const profile_stat_string name_;
   /*! \brief Frame categories (comma-delimited) */
   profile_stat_string categories_;
   /*! \brief Pointer to the domain */
-  ProfileDomain *domain_;
+  ProfileDomain* domain_;
   /*! \brief VTune Frame object */
   VTUNE_ONLY_CODE(std::unique_ptr<vtune::VTuneFrame> vtune_frame_);
   /*! \brief NVTX duration object */
@@ -1024,7 +1032,12 @@ struct ProfileFrame : public ProfileDuration {
  */
 struct ProfileMarker {
   enum MarkerScope {  // Should equal VTune values
-    kUnknown, kGlobal, kProcess, kThread, kTask, kMarker
+    kUnknown,
+    kGlobal,
+    kProcess,
+    kThread,
+    kTask,
+    kMarker
   };
 
   /*!
@@ -1034,18 +1047,15 @@ struct ProfileMarker {
    * \param scope Scope of the instant marker
    * \param nestable true if the instant marker is nestable
    */
-  ProfileMarker(const char *name,
-                       ProfileDomain *domain,
-                       const MarkerScope scope,
-                       bool nestable = true)
-    : name_(name)
-      , domain_(domain)
-      , scope_(scope)
-      , nestable_(nestable) {
+  ProfileMarker(const char* name,
+                ProfileDomain* domain,
+                const MarkerScope scope,
+                bool nestable = true)
+      : name_(name), domain_(domain), scope_(scope), nestable_(nestable) {
     categories_.set(domain_->name());
     categories_.append(",instant_marker");
     VTUNE_ONLY_CODE(vtune_instant_marker_.reset(
-      new vtune::VTuneInstantMarker(name, domain->dom(), static_cast<__itt_scope>(scope))));
+        new vtune::VTuneInstantMarker(name, domain->dom(), static_cast<__itt_scope>(scope))));
   }
 
   /*!
@@ -1061,14 +1071,14 @@ struct ProfileMarker {
    * \brief Instant-marker statistic object
    */
   struct ProfileMarkerStat : public ProfileStat {
-    explicit ProfileMarkerStat(const char *name, const char scope_char, bool nestable)
-    : scope_char_(scope_char) {
-      items_[0].enabled_ = true;
+    explicit ProfileMarkerStat(const char* name, const char scope_char, bool nestable)
+        : scope_char_(scope_char) {
+      items_[0].enabled_    = true;
       items_[0].event_type_ = nestable ? kAsyncNestableInstant : kInstant;
-      items_->timestamp_ = NowInMicrosec();
+      items_->timestamp_    = NowInMicrosec();
       name_.set(name);
     }
-    virtual void EmitExtra(std::ostream *os, size_t idx) {
+    virtual void EmitExtra(std::ostream* os, size_t idx) {
       ProfileStat::EmitExtra(os, idx);
       *os << "        \"s\": \"" << scope_char_ << "\",\n";
     }
@@ -1080,9 +1090,11 @@ struct ProfileMarker {
    * \brief Send this object's statistical datapoint to the profiler
    */
   virtual void SendStat() {
-    Profiler::Get()->AddNewProfileStat<ProfileMarkerStat>([this](ProfileMarkerStat *stat) {
-      stat->categories_.set(categories_.c_str());
-    }, name_.c_str(), vtune_scope_to_chrome_scope(scope_), nestable_);
+    Profiler::Get()->AddNewProfileStat<ProfileMarkerStat>(
+        [this](ProfileMarkerStat* stat) { stat->categories_.set(categories_.c_str()); },
+        name_.c_str(),
+        vtune_scope_to_chrome_scope(scope_),
+        nestable_);
   }
 
   static char vtune_scope_to_chrome_scope(const MarkerScope scope) {
@@ -1105,7 +1117,7 @@ struct ProfileMarker {
   /*! \brief Categories of the instant marker (comma-delimited) */
   profile_stat_string categories_;
   /*! \brief Pointer to the domain of this instant marker */
-  ProfileDomain *domain_;
+  ProfileDomain* domain_;
   /*! \brief VTune scope */
   const MarkerScope scope_;
   /*! \brief Whether this marker is nestabe */
@@ -1151,7 +1163,7 @@ struct ProfileOperator : public ProfileEvent {
         ss << "]";
       }
       if (!attr_.empty()) {
-        for (const auto &tt : attr_) {
+        for (const auto& tt : attr_) {
           ss << " (" << tt.first << "=" << tt.second << ")";
         }
       }
@@ -1163,12 +1175,12 @@ struct ProfileOperator : public ProfileEvent {
    * \brief Constructor
    * \param name Name of the operator
    */
-  explicit inline ProfileOperator(const char *name, Attributes *attributes)
-    : ProfileEvent(name)
-      , as_task_(name, &domain_)
-      , name_(name)
-      , attributes_(attributes)
-      , profiling_(!IsDeprecatedOperator(name)) {
+  explicit inline ProfileOperator(const char* name, Attributes* attributes)
+      : ProfileEvent(name),
+        as_task_(name, &domain_),
+        name_(name),
+        attributes_(attributes),
+        profiling_(!IsDeprecatedOperator(name)) {
     if (IsSubOperatorOfCustom(name)) {
       as_task_.setDomain(&custom_op_domain);
       SetCategories(custom_op_domain.name());
@@ -1185,7 +1197,7 @@ struct ProfileOperator : public ProfileEvent {
    */
   void startForDevice(mxnet::Context::DeviceType dev_type, uint32_t dev_id) {
     dev_type_ = dev_type;
-    dev_id_ = dev_id;
+    dev_id_   = dev_id;
     if (profiling_) {
       ProfileEvent::start();
       as_task_.start();
@@ -1213,12 +1225,15 @@ struct ProfileOperator : public ProfileEvent {
      * \param start_time Time when operator starts
      * \param stop_time Time when operator completes
      */
-    inline OprExecStat(const char *name, mxnet::Context::DeviceType dev_type, uint32_t dev_id,
-                       uint64_t start_time, uint64_t stop_time,
-                       const Attributes *attributes)
-      : DurationStat(ProfileStat::kDurationBegin, ProfileStat::kDurationEnd)
-        , dev_type_(dev_type)
-        , dev_id_(dev_id) {
+    inline OprExecStat(const char* name,
+                       mxnet::Context::DeviceType dev_type,
+                       uint32_t dev_id,
+                       uint64_t start_time,
+                       uint64_t stop_time,
+                       const Attributes* attributes)
+        : DurationStat(ProfileStat::kDurationBegin, ProfileStat::kDurationEnd),
+          dev_type_(dev_type),
+          dev_id_(dev_id) {
       name_.set(name);
       if (attributes) {
         name_.append(attributes->to_string().c_str());
@@ -1229,7 +1244,7 @@ struct ProfileOperator : public ProfileEvent {
         categories_.set("operator");
       }
       items_[kStart].timestamp_ = start_time;
-      items_[kStop].timestamp_ = stop_time;
+      items_[kStop].timestamp_  = stop_time;
     }
     /*! \brief device type: CPU: 1, GPU: 2, CPUPinned: 3 */
     mxnet::Context::DeviceType dev_type_;
@@ -1242,18 +1257,21 @@ struct ProfileOperator : public ProfileEvent {
    * \brief Send this object's statistical datapoint to the profiler
    */
   void SendStat() override {
-    Profiler::Get()->AddNewProfileStat<OprExecStat>(
-      [](OprExecStat *stat) {}, name_.c_str(), dev_type_, dev_id_,
-      start_time_, ProfileStat::NowInMicrosec(),
-      attributes_.get());
+    Profiler::Get()->AddNewProfileStat<OprExecStat>([](OprExecStat* stat) {},
+                                                    name_.c_str(),
+                                                    dev_type_,
+                                                    dev_id_,
+                                                    start_time_,
+                                                    ProfileStat::NowInMicrosec(),
+                                                    attributes_.get());
   }
   /*!
    * \brief Check if this operator is no longer profiled
    * Notice that this operator may still be used for e.g synchronization
    */
   inline static bool IsDeprecatedOperator(const char* name) {
-    return strcmp(name, "CustomOperatorWait") == 0 ||
-           strcmp(name, "Custom") == 0 || strcmp(name, "_backward_Custom") == 0;
+    return strcmp(name, "CustomOperatorWait") == 0 || strcmp(name, "Custom") == 0 ||
+           strcmp(name, "_backward_Custom") == 0;
   }
   /*!
    * \brief Check if this operator a sub-operator of a custom operator
@@ -1280,11 +1298,11 @@ struct ProfileOperator : public ProfileEvent {
 /*
  * Profiler inline functions
  */
-inline const char *Profiler::DeviceName(mxnet::Context::DeviceType dev_type, int32_t dev_id) {
+inline const char* Profiler::DeviceName(mxnet::Context::DeviceType dev_type, int32_t dev_id) {
   return profile_stat[DeviceIndex(dev_type, dev_id)].dev_name_.c_str();
 }
 
-inline const char *Profiler::DeviceName(const size_t index) {
+inline const char* Profiler::DeviceName(const size_t index) {
   return profile_stat[index].dev_name_.c_str();
 }
 
@@ -1308,9 +1326,9 @@ inline size_t Profiler::DeviceIndex(mxnet::Context::DeviceType dev_type, int32_t
  * \brief Explicit 'Profiler::AddProfileStat' override for 'OprExecStat'
  * \param opr_stat Unique pointer to the operator statistic
  */
-template<>
+template <>
 inline void Profiler::AddProfileStat<ProfileOperator::OprExecStat>(
-  std::unique_ptr<ProfileOperator::OprExecStat> *opr_stat) {
+    std::unique_ptr<ProfileOperator::OprExecStat>* opr_stat) {
   const size_t idx = DeviceIndex((*opr_stat)->dev_type_, (*opr_stat)->dev_id_);
   CHECK_LT(idx, DeviceCount());
   DeviceStats& dev_stat = profile_stat[idx];
@@ -1327,6 +1345,7 @@ class ProfilerScope {
   void SetCurrentProfilerScope(const std::string& scope);
   /*! \brief Get the current profiler scope */
   std::string GetCurrentProfilerScope() const;
+
  private:
   std::string current_profiler_scope_ = MXNET_STORAGE_DEFAULT_PROFILER_SCOPE_CSTR;
 };
diff --git a/src/profiler/storage_profiler.cc b/src/profiler/storage_profiler.cc
index 4969813bc3df..373ea9c05235 100644
--- a/src/profiler/storage_profiler.cc
+++ b/src/profiler/storage_profiler.cc
@@ -47,8 +47,7 @@ GpuDeviceStorageProfiler* GpuDeviceStorageProfiler::Get() {
 
 void GpuDeviceStorageProfiler::DumpProfile() const {
   size_t current_pid = common::current_process_id();
-  std::ofstream fout((filename_prefix_ + "-pid_" + std::to_string(current_pid)
-                      + ".csv").c_str());
+  std::ofstream fout((filename_prefix_ + "-pid_" + std::to_string(current_pid) + ".csv").c_str());
   if (!fout.is_open()) {
     return;
   }
@@ -62,30 +61,29 @@ void GpuDeviceStorageProfiler::DumpProfile() const {
   std::multimap<std::string, AllocEntryDumpFmt> gpu_mem_ordered_alloc_entries;
   // map the GPU device ID to the total amount of allocations
   std::unordered_map<int, size_t> gpu_dev_id_total_alloc_map;
-  std::regex gluon_param_regex("([0-9a-fA-F]{8})_([0-9a-fA-F]{4})_"
-                               "([0-9a-fA-F]{4})_([0-9a-fA-F]{4})_"
-                               "([0-9a-fA-F]{12})_([^ ]*)");
+  std::regex gluon_param_regex(
+      "([0-9a-fA-F]{8})_([0-9a-fA-F]{4})_"
+      "([0-9a-fA-F]{4})_([0-9a-fA-F]{4})_"
+      "([0-9a-fA-F]{12})_([^ ]*)");
 
-  for (const std::pair<void *const, AllocEntry>& alloc_entry :
-       gpu_mem_alloc_entries_) {
-    std::string alloc_entry_name
-        = std::regex_replace(alloc_entry.second.name, gluon_param_regex, "$6");
+  for (const std::pair<void* const, AllocEntry>& alloc_entry : gpu_mem_alloc_entries_) {
+    std::string alloc_entry_name =
+        std::regex_replace(alloc_entry.second.name, gluon_param_regex, "$6");
     if (alloc_entry_name == "") {
       // If the entry name becomes none after the regex replacement, we revert
       // back to the original.
       alloc_entry_name = alloc_entry.second.name;
     }
-    gpu_mem_ordered_alloc_entries.emplace(
-        alloc_entry.second.profiler_scope + alloc_entry_name,
-        AllocEntryDumpFmt{
-          alloc_entry.second.requested_size,
-          alloc_entry.second.dev_id,
-          alloc_entry.second.actual_size,
-          alloc_entry.second.reuse});
+    gpu_mem_ordered_alloc_entries.emplace(alloc_entry.second.profiler_scope + alloc_entry_name,
+                                          AllocEntryDumpFmt{alloc_entry.second.requested_size,
+                                                            alloc_entry.second.dev_id,
+                                                            alloc_entry.second.actual_size,
+                                                            alloc_entry.second.reuse});
     gpu_dev_id_total_alloc_map[alloc_entry.second.dev_id] = 0;
   }
   fout << "\"Attribute Name\",\"Requested Size\","
-          "\"Device\",\"Actual Size\",\"Reuse?\"" << std::endl;
+          "\"Device\",\"Actual Size\",\"Reuse?\""
+       << std::endl;
   for (const std::pair<const std::string, AllocEntryDumpFmt>& alloc_entry :
        gpu_mem_ordered_alloc_entries) {
     fout << "\"" << alloc_entry.first << "\","
@@ -93,16 +91,14 @@ void GpuDeviceStorageProfiler::DumpProfile() const {
          << "\"" << alloc_entry.second.dev_id << "\","
          << "\"" << alloc_entry.second.actual_size << "\","
          << "\"" << alloc_entry.second.reuse << "\"" << std::endl;
-    gpu_dev_id_total_alloc_map[alloc_entry.second.dev_id] +=
-        alloc_entry.second.actual_size;
+    gpu_dev_id_total_alloc_map[alloc_entry.second.dev_id] += alloc_entry.second.actual_size;
   }
 #if MXNET_USE_NVML
   // If NVML has been enabled, add amend term to the GPU memory profile.
   nvmlDevice_t nvml_device;
 
   NVML_CALL(nvmlInit());
-  for (std::pair<const int, size_t>& dev_id_total_alloc_pair :
-       gpu_dev_id_total_alloc_map) {
+  for (std::pair<const int, size_t>& dev_id_total_alloc_pair : gpu_dev_id_total_alloc_map) {
     unsigned info_count = 0;
     std::vector<nvmlProcessInfo_t> infos(info_count);
 
@@ -119,7 +115,9 @@ void GpuDeviceStorageProfiler::DumpProfile() const {
     for (unsigned i = 0; i < info_count; ++i) {
       if (current_pid == infos[i].pid) {
         amend_made = true;
-        fout << "\"" << "nvml_amend" << "\","
+        fout << "\""
+             << "nvml_amend"
+             << "\","
              << "\"" << infos[i].usedGpuMemory - dev_id_total_alloc_pair.second << "\","
              << "\"" << dev_id_total_alloc_pair.first << "\","
              << "\"" << infos[i].usedGpuMemory - dev_id_total_alloc_pair.second << "\","
@@ -132,7 +130,7 @@ void GpuDeviceStorageProfiler::DumpProfile() const {
                    "since it is unable to locate the current process ID. "
                    "Are you working in Docker without setting --pid=host?";
     }
-  }  // for (dev_id_total_alloc_pair : gpu_dev_id_total_alloc_map)
+  }     // for (dev_id_total_alloc_pair : gpu_dev_id_total_alloc_map)
 #endif  // MXNET_USE_NVML
 }
 
diff --git a/src/profiler/storage_profiler.h b/src/profiler/storage_profiler.h
index b2213e3b94fd..02e6abaf6c5e 100644
--- a/src/profiler/storage_profiler.h
+++ b/src/profiler/storage_profiler.h
@@ -40,17 +40,16 @@ class DeviceStorageProfiler {
   /*!
    * \brief Constructor
    */
-  explicit DeviceStorageProfiler(const char *domain_name = "Device Storage")
-    : domain_(domain_name) {
-  }
+  explicit DeviceStorageProfiler(const char* domain_name = "Device Storage")
+      : domain_(domain_name) {}
 
   /*!
    * \brief Called when memory has been allocated in order to record the allocation size
    * \param handle Handle to the allocated storage
    */
-  void OnAlloc(const Storage::Handle &handle) {
+  void OnAlloc(const Storage::Handle& handle) {
     if (handle.size > 0) {
-      profiler::Profiler *prof = profiler::Profiler::Get();
+      profiler::Profiler* prof = profiler::Profiler::Get();
       if (prof->IsProfiling(profiler::Profiler::kMemory)) {
         Init();
         const size_t idx = prof->DeviceIndex(handle.ctx.dev_type, handle.ctx.dev_id);
@@ -70,9 +69,9 @@ class DeviceStorageProfiler {
    * \brief Called when memory has been freed in order to record the deallocation size
    * \param handle Handle to the allocated storage
    */
-  void OnFree(const Storage::Handle &handle) {
+  void OnFree(const Storage::Handle& handle) {
     if (handle.size > 0) {
-      profiler::Profiler *prof = profiler::Profiler::Get();
+      profiler::Profiler* prof = profiler::Profiler::Get();
       if (prof->IsProfiling(profiler::Profiler::kMemory)) {
         Init();  // In case of bug which tries to free first
         const size_t idx = prof->DeviceIndex(handle.ctx.dev_type, handle.ctx.dev_id);
@@ -84,9 +83,9 @@ class DeviceStorageProfiler {
         }
         CHECK_LT(idx, mem_counters_.size()) << "Invalid device index: " << idx;
         if (*mem_counters_[idx] >= handle.size) {
-            *mem_counters_[idx] -= handle.size;
+          *mem_counters_[idx] -= handle.size;
         } else {
-            *mem_counters_[idx] = 0;
+          *mem_counters_[idx] = 0;
         }
       }
     }
@@ -102,14 +101,14 @@ class DeviceStorageProfiler {
       std::unique_lock<std::mutex> lk(init_mutex_);
       // Check again in case of collision and someone else filled it
       if (mem_counters_.empty()) {
-        profiler::Profiler *prof = profiler::Profiler::Get();
+        profiler::Profiler* prof  = profiler::Profiler::Get();
         const size_t device_count = prof->DeviceCount();
         mem_counters_.reserve(device_count);
         for (size_t i = 0, n = device_count; i < n; ++i) {
           std::string name = "Memory: ";
           name += prof->DeviceName(i);
-          mem_counters_.emplace_back(std::make_shared<profiler::ProfileCounter>(name.c_str(),
-                                                                              &domain_));
+          mem_counters_.emplace_back(
+              std::make_shared<profiler::ProfileCounter>(name.c_str(), &domain_));
         }
       }
     }
@@ -134,56 +133,47 @@ class GpuDeviceStorageProfiler {
   static GpuDeviceStorageProfiler* Get();
   /*!
    * \brief Similar functions to the `DeviceStorageProfiler` methods above.
-   *        However, in the case of the `GpuDeviceStorageProfiler`, we are 
+   *        However, in the case of the `GpuDeviceStorageProfiler`, we are
    *        recording extra piece of information on the actual allocation size
    *        and whether the allocation is a reuse or not.
    */
-  void OnAlloc(const Storage::Handle &handle,
-               const size_t actual_size, const bool reuse) {
+  void OnAlloc(const Storage::Handle& handle, const size_t actual_size, const bool reuse) {
     if (handle.size > 0) {
-      profiler::Profiler *prof = profiler::Profiler::Get();
+      profiler::Profiler* prof = profiler::Profiler::Get();
       if (prof->IsProfiling(profiler::Profiler::kMemory)) {
 #ifdef _MSC_VER
         gpu_mem_alloc_entries_[handle.dptr] = AllocEntry{
-            handle.profiler_scope,
-            handle.name,
-            handle.size,
-            handle.ctx.dev_id,
-            actual_size, reuse};
+            handle.profiler_scope, handle.name, handle.size, handle.ctx.dev_id, actual_size, reuse};
 #else
         gpu_mem_alloc_entries_[handle.dptr] = {
-            handle.profiler_scope,
-            handle.name,
-            handle.size,
-            handle.ctx.dev_id,
-            actual_size, reuse};
+            handle.profiler_scope, handle.name, handle.size, handle.ctx.dev_id, actual_size, reuse};
 #endif
       }
     }
   }
 
-  inline void OnFree(void *dptr) {
+  inline void OnFree(void* dptr) {
     // In case of bug which tries to free first
     if (gpu_mem_alloc_entries_.find(dptr) != gpu_mem_alloc_entries_.end())
       gpu_mem_alloc_entries_.erase(dptr);
   }
 
-  void OnFree(const Storage::Handle &handle) {
+  void OnFree(const Storage::Handle& handle) {
     if (handle.size > 0) {
-      profiler::Profiler *prof = profiler::Profiler::Get();
+      profiler::Profiler* prof = profiler::Profiler::Get();
       if (prof->IsProfiling(profiler::Profiler::kMemory))
         OnFree(handle.dptr);
     }
   }
 
-  void UpdateStorageInfo(const Storage::Handle &handle) {
+  void UpdateStorageInfo(const Storage::Handle& handle) {
     if (handle.size > 0) {
-      profiler::Profiler *prof = profiler::Profiler::Get();
+      profiler::Profiler* prof = profiler::Profiler::Get();
       if (prof->IsProfiling(profiler::Profiler::kMemory)) {
         auto entry_iter = gpu_mem_alloc_entries_.find(handle.dptr);
         if (entry_iter != gpu_mem_alloc_entries_.end()) {
           entry_iter->second.profiler_scope = handle.profiler_scope;
-          entry_iter->second.name = handle.name;
+          entry_iter->second.name           = handle.name;
         }
       }
     }
@@ -197,7 +187,7 @@ class GpuDeviceStorageProfiler {
   void DumpProfile() const;
 
   bool inline IsProfiling() const {
-    profiler::Profiler *prof = profiler::Profiler::Get();
+    profiler::Profiler* prof = profiler::Profiler::Get();
     return prof->IsProfiling(profiler::Profiler::kMemory);
   }
 
diff --git a/src/profiler/vtune.h b/src/profiler/vtune.h
index d048d6c4ff83..225cd0871736 100644
--- a/src/profiler/vtune.h
+++ b/src/profiler/vtune.h
@@ -79,24 +79,30 @@ struct VTuneResume {
 
 /*
  * Intel VTune APIs. For API meanings, see:
- * https://software.intel.com/en-us/vtune-amplifier-help-instrumentation-and-tracing-technology-api-reference NOLINT()
+ * https://software.intel.com/en-us/vtune-amplifier-help-instrumentation-and-tracing-technology-api-reference
+ * NOLINT()
  */
 class VTuneDomain {
  public:
-  inline explicit VTuneDomain(const char *name) throw()
-    : domain_(__itt_domain_create(name)) {
+  inline explicit VTuneDomain(const char* name) throw() : domain_(__itt_domain_create(name)) {
     CHECK_NOTNULL(domain_);
     domain_->flags = 1;
   }
 
-  inline operator __itt_domain *() { return domain_; }
+  inline operator __itt_domain*() {
+    return domain_;
+  }
 
-  inline __itt_domain *dom() { return domain_; }
+  inline __itt_domain* dom() {
+    return domain_;
+  }
 
-  inline const char *name() const { return domain_->nameA; }
+  inline const char* name() const {
+    return domain_->nameA;
+  }
 
  private:
-  __itt_domain *domain_;
+  __itt_domain* domain_;
 };
 
 /*!
@@ -105,7 +111,7 @@ class VTuneDomain {
  * \note Some objects are expensive to create, such as VTuneEvent, so it's more desirable to
  *       do the mutex lock and reuse
  */
-template<typename VTuneObject>
+template <typename VTuneObject>
 class VTuneRegistry {
  public:
   /*!
@@ -115,14 +121,14 @@ class VTuneRegistry {
    * \param args Arguments to pass to constructor after 'name'
    * \return Pointer to the cached or new VTuneObject
    */
-  template<typename ...Args>
-  inline VTuneObject *get(const char *name, Args... args) {
+  template <typename... Args>
+  inline VTuneObject* get(const char* name, Args... args) {
     dmlc::ReadLock read_lock(m_);
     auto iter = registry_.find(name);
     if (iter == registry_.end()) {
       dmlc::WriteLock write_lock(m_);
-      iter = registry_.emplace(name, std::unique_ptr<VTuneObject>(
-        new VTuneObject(name, args...))).first;
+      iter = registry_.emplace(name, std::unique_ptr<VTuneObject>(new VTuneObject(name, args...)))
+                 .first;
     }
     return iter->second.get();
   }
@@ -135,15 +141,18 @@ class VTuneRegistry {
    * \param args Arguments to pass to constructor after 'domain'
    * \return Pointer to the cached or new VTuneObject
    */
-  template<typename ...Args>
-  inline VTuneObject *get(const char *name, const VTuneDomain *domain, Args... args) {
+  template <typename... Args>
+  inline VTuneObject* get(const char* name, const VTuneDomain* domain, Args... args) {
     dmlc::ReadLock read_lock(m_);
     auto iter = registry_.find(name);
     if (iter == registry_.end()) {
       dmlc::WriteLock write_lock(m_);
       std::unique_ptr<VTuneObject> ev(new VTuneObject(name, domain, args...));
-      iter = registry_.emplace(name, std::unique_ptr<VTuneObject>(
-        new VTuneObject(make_key(name, domain), args...))).first;
+      iter = registry_
+                 .emplace(
+                     name,
+                     std::unique_ptr<VTuneObject>(new VTuneObject(make_key(name, domain), args...)))
+                 .first;
     }
     return iter->second.get();
   }
@@ -155,7 +164,7 @@ class VTuneRegistry {
    * \param domain Domain of the object
    * \return String key created form the name and domain names
    */
-  static inline std::string make_key(const char *name, const VTuneDomain *domain) {
+  static inline std::string make_key(const char* name, const VTuneDomain* domain) {
     return std::string(domain->name()) + "::" + std::string(name);
   }
 
@@ -170,12 +179,16 @@ class VTuneRegistry {
  */
 class VTuneEvent {
  public:
-  inline explicit VTuneEvent(const char *name) throw()
-    : itt_event_(__itt_event_create(name, strlen(name))) {}
+  inline explicit VTuneEvent(const char* name) throw()
+      : itt_event_(__itt_event_create(name, strlen(name))) {}
 
-  inline void start() { __itt_event_start(itt_event_); }
+  inline void start() {
+    __itt_event_start(itt_event_);
+  }
 
-  inline void stop() { __itt_event_end(itt_event_); }
+  inline void stop() {
+    __itt_event_end(itt_event_);
+  }
 
   static VTuneRegistry<VTuneEvent> registry_;
 
@@ -190,22 +203,28 @@ class VTuneEvent {
  */
 class VTuneTask {
  public:
-  inline VTuneTask(const char *name, VTuneDomain *domain) throw()
-    : name_(__itt_string_handle_create(name))
-      , domain_(domain) {
-  }
+  inline VTuneTask(const char* name, VTuneDomain* domain) throw()
+      : name_(__itt_string_handle_create(name)), domain_(domain) {}
 
-  inline void start() { __itt_task_begin(domain()->dom(), __itt_null, __itt_null, name_); }
+  inline void start() {
+    __itt_task_begin(domain()->dom(), __itt_null, __itt_null, name_);
+  }
 
-  inline void stop() { __itt_task_end(domain()->dom()); }
+  inline void stop() {
+    __itt_task_end(domain()->dom());
+  }
 
-  inline VTuneDomain *domain() { return domain_; }
+  inline VTuneDomain* domain() {
+    return domain_;
+  }
 
-  const char *name() const { return name_->strA; }
+  const char* name() const {
+    return name_->strA;
+  }
 
  private:
-  __itt_string_handle *name_;
-  VTuneDomain *domain_;
+  __itt_string_handle* name_;
+  VTuneDomain* domain_;
 };
 
 /*!
@@ -215,8 +234,7 @@ class VTuneTask {
  */
 class VTuneFrame {
  public:
-  inline explicit VTuneFrame(VTuneDomain *domain) throw()
-    : domain_(domain) {
+  inline explicit VTuneFrame(VTuneDomain* domain) throw() : domain_(domain) {
     id_ = __itt_id_make(this, 0);
     __itt_id_create(domain->dom(), id_);
   }
@@ -225,24 +243,36 @@ class VTuneFrame {
     __itt_id_destroy(domain_->dom(), id_);
   }
 
-#ifdef  MXNET_VTUNE_FRAME_GENERATE_ID
-  inline void start() { __itt_frame_begin_v3(domain()->dom(), nullptr); }
-  inline void stop()  { __itt_frame_end_v3(domain()->dom(), nullptr); }
+#ifdef MXNET_VTUNE_FRAME_GENERATE_ID
+  inline void start() {
+    __itt_frame_begin_v3(domain()->dom(), nullptr);
+  }
+  inline void stop() {
+    __itt_frame_end_v3(domain()->dom(), nullptr);
+  }
 #else
 
-  inline void start() { __itt_frame_begin_v3(domain()->dom(), &id_); }
+  inline void start() {
+    __itt_frame_begin_v3(domain()->dom(), &id_);
+  }
 
-  inline void stop() { __itt_frame_end_v3(domain()->dom(), &id_); }
+  inline void stop() {
+    __itt_frame_end_v3(domain()->dom(), &id_);
+  }
 
 #endif
 
-  inline operator __itt_id *() { return &id_; }
+  inline operator __itt_id*() {
+    return &id_;
+  }
 
-  inline VTuneDomain *domain() { return domain_; }
+  inline VTuneDomain* domain() {
+    return domain_;
+  }
 
  private:
   __itt_id id_;
-  VTuneDomain *domain_;
+  VTuneDomain* domain_;
 };
 
 /*!
@@ -252,10 +282,8 @@ class VTuneFrame {
  */
 class VTuneCounter {
  public:
-  inline VTuneCounter(const char *name, VTuneDomain *domain) throw()
-    : name_(name)
-      , domain_(domain)
-      , counter_(__itt_counter_create(name, domain->name())) {
+  inline VTuneCounter(const char* name, VTuneDomain* domain) throw()
+      : name_(name), domain_(domain), counter_(__itt_counter_create(name, domain->name())) {
     CHECK_NOTNULL(counter_);
   }
 
@@ -263,13 +291,21 @@ class VTuneCounter {
     __itt_counter_destroy(counter_);
   }
 
-  inline void operator++() { __itt_counter_inc_delta(counter_, 1); }
+  inline void operator++() {
+    __itt_counter_inc_delta(counter_, 1);
+  }
 
-  inline void operator++(int) { __itt_counter_inc_delta(counter_, 1); }
+  inline void operator++(int) {
+    __itt_counter_inc_delta(counter_, 1);
+  }
 
-  inline void operator--() { __itt_counter_dec_delta(counter_, 1); }
+  inline void operator--() {
+    __itt_counter_dec_delta(counter_, 1);
+  }
 
-  inline void operator--(int) { __itt_counter_dec_delta(counter_, 1); }
+  inline void operator--(int) {
+    __itt_counter_dec_delta(counter_, 1);
+  }
 
   inline void operator+=(int64_t v) {
     if (v > 0) {
@@ -279,16 +315,18 @@ class VTuneCounter {
     }
   }
 
-  inline void operator-=(int64_t v) { this->operator+=(-v); }
+  inline void operator-=(int64_t v) {
+    this->operator+=(-v);
+  }
 
-  inline VTuneCounter &operator=(uint64_t v) {
+  inline VTuneCounter& operator=(uint64_t v) {
     __itt_counter_set_value(counter_, &v);
     return *this;
   }
 
  private:
-  const char *name_;
-  VTuneDomain *domain_;
+  const char* name_;
+  VTuneDomain* domain_;
   __itt_counter counter_;
 };
 
@@ -298,19 +336,18 @@ class VTuneCounter {
  */
 class VTuneInstantMarker {
  public:
-  inline VTuneInstantMarker(const char *name,
-                            VTuneDomain *domain,
+  inline VTuneInstantMarker(const char* name,
+                            VTuneDomain* domain,
                             __itt_scope scope = __itt_scope_global) throw()
-    : name_(__itt_string_handle_create(name))
-      , domain_(domain)
-      , scope_(scope) {
-  }
+      : name_(__itt_string_handle_create(name)), domain_(domain), scope_(scope) {}
 
-  void signal() { __itt_marker(domain_->dom(), __itt_null, name_, scope_); }
+  void signal() {
+    __itt_marker(domain_->dom(), __itt_null, name_, scope_);
+  }
 
  private:
-  __itt_string_handle *name_;
-  VTuneDomain *domain_;
+  __itt_string_handle* name_;
+  VTuneDomain* domain_;
   __itt_scope scope_;
 };
 
diff --git a/src/resource.cc b/src/resource.cc
index c76c7293b4a9..fcc4a5828604 100644
--- a/src/resource.cc
+++ b/src/resource.cc
@@ -50,8 +50,8 @@ struct SpaceAllocator {
   Storage::Handle host_handle;
 
   SpaceAllocator() {
-    handle.dptr = nullptr;
-    handle.size = 0;
+    handle.dptr      = nullptr;
+    handle.size      = 0;
     host_handle.dptr = nullptr;
     host_handle.size = 0;
   }
@@ -66,13 +66,14 @@ struct SpaceAllocator {
     host_handle.size = 0;
   }
 
-  inline void* GetSpace(size_t size, const std::string &name) {
-    if (handle.size >= size) return handle.dptr;
+  inline void* GetSpace(size_t size, const std::string& name) {
+    if (handle.size >= size)
+      return handle.dptr;
 
     Storage::Get()->DirectFree(handle);
-    handle = Storage::Get()->Alloc(size, ctx);
+    handle                = Storage::Get()->Alloc(size, ctx);
     handle.profiler_scope = "resource:";
-    handle.name = name;
+    handle.name           = name;
 #if MXNET_USE_CUDA
     profiler::GpuDeviceStorageProfiler::Get()->UpdateStorageInfo(handle);
 #endif  // MXNET_USE_CUDA
@@ -80,7 +81,8 @@ struct SpaceAllocator {
   }
 
   inline void* GetHostSpace(size_t size) {
-    if (host_handle.size >= size) return host_handle.dptr;
+    if (host_handle.size >= size)
+      return host_handle.dptr;
 
     Storage::Get()->DirectFree(host_handle);
     host_handle = Storage::Get()->Alloc(size, Context());
@@ -88,23 +90,21 @@ struct SpaceAllocator {
   }
 };
 
-
 // Implements resource manager
 class ResourceManagerImpl : public ResourceManager {
  public:
   ResourceManagerImpl() noexcept(false) {
-    cpu_temp_space_copy_ = dmlc::GetEnv("MXNET_CPU_TEMP_COPY", 4);
-    gpu_temp_space_copy_ = dmlc::GetEnv("MXNET_GPU_TEMP_COPY", 1);
+    cpu_temp_space_copy_  = dmlc::GetEnv("MXNET_CPU_TEMP_COPY", 4);
+    gpu_temp_space_copy_  = dmlc::GetEnv("MXNET_GPU_TEMP_COPY", 1);
     cpu_native_rand_copy_ = dmlc::GetEnv("MXNET_CPU_PARALLEL_RAND_COPY", 1);
     gpu_native_rand_copy_ = dmlc::GetEnv("MXNET_GPU_PARALLEL_RAND_COPY", 1);
 #if MXNET_USE_CUDNN == 1
     gpu_cudnn_dropout_state_copy_ = dmlc::GetEnv("MXNET_GPU_CUDNN_DROPOUT_STATE_COPY", 1);
 #endif  // MXNET_USE_CUDNN == 1
-    engine_ref_ = Engine::_GetSharedRef();
+    engine_ref_  = Engine::_GetSharedRef();
     storage_ref_ = Storage::_GetSharedRef();
-    cpu_rand_ = std::make_unique<ResourceRandom<cpu>>(
-        Context::CPU(), global_seed_);
-    cpu_space_ = std::make_unique<ResourceTempSpace<ResourceRequest::kTempSpace>>(
+    cpu_rand_    = std::make_unique<ResourceRandom<cpu>>(Context::CPU(), global_seed_);
+    cpu_space_   = std::make_unique<ResourceTempSpace<ResourceRequest::kTempSpace>>(
         Context::CPU(), cpu_temp_space_copy_);
     cpu_parallel_rand_ = std::make_unique<ResourceParallelRandom<cpu>>(
         Context::CPU(), cpu_native_rand_copy_, global_seed_);
@@ -131,42 +131,58 @@ class ResourceManagerImpl : public ResourceManager {
   }
 
   // request resources
-  Resource Request(Context ctx, const ResourceRequest &req) override {
+  Resource Request(Context ctx, const ResourceRequest& req) override {
     if (ctx.dev_mask() == Context::kCPU) {
       switch (req.type) {
-        case ResourceRequest::kRandom: return cpu_rand_->resource;
-        case ResourceRequest::kTempSpace: return cpu_space_->GetNext();
-        case ResourceRequest::kParallelRandom: return cpu_parallel_rand_->GetNext();
-        default: LOG(FATAL) << "Unknown supported type " << req.type;
+        case ResourceRequest::kRandom:
+          return cpu_rand_->resource;
+        case ResourceRequest::kTempSpace:
+          return cpu_space_->GetNext();
+        case ResourceRequest::kParallelRandom:
+          return cpu_parallel_rand_->GetNext();
+        default:
+          LOG(FATAL) << "Unknown supported type " << req.type;
       }
     } else {
       CHECK_EQ(ctx.dev_mask(), Context::kGPU);
 #if MSHADOW_USE_CUDA
       switch (req.type) {
         case ResourceRequest::kRandom: {
-          return gpu_rand_.Get(ctx.dev_id, [ctx, this]() {
-              return new ResourceRandom<gpu>(ctx, global_seed_);
-            })->resource;
+          return gpu_rand_
+              .Get(ctx.dev_id, [ctx, this]() { return new ResourceRandom<gpu>(ctx, global_seed_); })
+              ->resource;
         }
         case ResourceRequest::kTempSpace: {
-          return gpu_space_.Get(ctx.dev_id, [ctx, this]() {
-              return new ResourceTempSpace<ResourceRequest::kTempSpace>(ctx, gpu_temp_space_copy_);
-            })->GetNext();
+          return gpu_space_
+              .Get(ctx.dev_id,
+                   [ctx, this]() {
+                     return new ResourceTempSpace<ResourceRequest::kTempSpace>(
+                         ctx, gpu_temp_space_copy_);
+                   })
+              ->GetNext();
         }
         case ResourceRequest::kParallelRandom: {
-          return gpu_parallel_rand_.Get(ctx.dev_id, [ctx, this]() {
-            return new ResourceParallelRandom<gpu>(ctx, gpu_native_rand_copy_, global_seed_);
-          })->GetNext();
+          return gpu_parallel_rand_
+              .Get(ctx.dev_id,
+                   [ctx, this]() {
+                     return new ResourceParallelRandom<gpu>(
+                         ctx, gpu_native_rand_copy_, global_seed_);
+                   })
+              ->GetNext();
         }
 #if MXNET_USE_CUDNN == 1
         case ResourceRequest::kCuDNNDropoutDesc: {
-          return gpu_cudnn_dropout_state_.Get(ctx.dev_id, [ctx, this]() {
-            return new ResourceCUDNNDropout(
-                ctx, gpu_cudnn_dropout_state_copy_, global_seed_);
-          })->GetNext();
+          return gpu_cudnn_dropout_state_
+              .Get(ctx.dev_id,
+                   [ctx, this]() {
+                     return new ResourceCUDNNDropout(
+                         ctx, gpu_cudnn_dropout_state_copy_, global_seed_);
+                   })
+              ->GetNext();
         }
 #endif  // MXNET_USE_CUDNN == 1
-        default: LOG(FATAL) << "Unknown supported type " << req.type;
+        default:
+          LOG(FATAL) << "Unknown supported type " << req.type;
       }
 #else
       LOG(FATAL) << MXNET_GPU_NOT_ENABLED_ERROR;
@@ -181,16 +197,12 @@ class ResourceManagerImpl : public ResourceManager {
     cpu_rand_->SeedWithDeviceID(global_seed_);
     cpu_parallel_rand_->SeedWithDeviceID(global_seed_);
 #if MXNET_USE_CUDA
-    gpu_rand_.ForEach([seed](size_t i, ResourceRandom<gpu> *p) {
-        p->SeedWithDeviceID(seed);
-      });
-    gpu_parallel_rand_.ForEach([seed](size_t i, ResourceParallelRandom<gpu> *p) {
-      p->SeedWithDeviceID(seed);
-    });
+    gpu_rand_.ForEach([seed](size_t i, ResourceRandom<gpu>* p) { p->SeedWithDeviceID(seed); });
+    gpu_parallel_rand_.ForEach(
+        [seed](size_t i, ResourceParallelRandom<gpu>* p) { p->SeedWithDeviceID(seed); });
 #if MXNET_USE_CUDNN == 1
-    gpu_cudnn_dropout_state_.ForEach([seed](size_t i,
-                                            ResourceCUDNNDropout *p) {
-        ResourceManagerImpl::SeedCUDNNDropout(p, seed);
+    gpu_cudnn_dropout_state_.ForEach([seed](size_t i, ResourceCUDNNDropout* p) {
+      ResourceManagerImpl::SeedCUDNNDropout(p, seed);
     });
 #endif  // MXNET_USE_CUDNN
 #endif  // MXNET_USE_CUDA
@@ -201,16 +213,18 @@ class ResourceManagerImpl : public ResourceManager {
     cpu_parallel_rand_->Seed(seed);
 #if MXNET_USE_CUDA
     if (ctx.dev_type == Context::kGPU) {
-      gpu_rand_.Get(ctx.dev_id, [ctx, seed, this]() {
-        return new ResourceRandom<gpu>(ctx, seed);
-      })->Seed(seed);
-      gpu_parallel_rand_.Get(ctx.dev_id, [ctx, seed, this]() {
-        return new ResourceParallelRandom<gpu>(ctx, gpu_native_rand_copy_, seed);
-      })->Seed(seed);
+      gpu_rand_.Get(ctx.dev_id, [ctx, seed, this]() { return new ResourceRandom<gpu>(ctx, seed); })
+          ->Seed(seed);
+      gpu_parallel_rand_
+          .Get(ctx.dev_id,
+               [ctx, seed, this]() {
+                 return new ResourceParallelRandom<gpu>(ctx, gpu_native_rand_copy_, seed);
+               })
+          ->Seed(seed);
 #if MXNET_USE_CUDNN == 1
       auto dropout_state = gpu_cudnn_dropout_state_.Get(ctx.dev_id, [ctx, seed, this]() {
         return new ResourceCUDNNDropout(ctx, gpu_cudnn_dropout_state_copy_, seed);
-        });
+      });
       ResourceManagerImpl::SeedCUDNNDropout(dropout_state.get(), seed);
 #endif  // MXNET_USE_CUDNN
     }
@@ -224,29 +238,26 @@ class ResourceManagerImpl : public ResourceManager {
   /*! \brief Random number magic number to seed different random numbers */
   static constexpr uint32_t kRandMagic = 127UL;
   // the random number resources
-  template<typename xpu>
+  template <typename xpu>
   struct ResourceRandom {
     /*! \brief the context of the PRNG */
     Context ctx;
     /*! \brief pointer to PRNG */
-    mshadow::Random<xpu> *prnd;
+    mshadow::Random<xpu>* prnd;
     /*! \brief resource representation */
     Resource resource;
     /*! \brief constructor */
-    explicit ResourceRandom(Context ctx, uint32_t global_seed)
-        : ctx(ctx) {
+    explicit ResourceRandom(Context ctx, uint32_t global_seed) : ctx(ctx) {
       mshadow::SetDevice<xpu>(ctx.dev_id);
-      resource.var = Engine::Get()->NewVariable();
-      prnd = new mshadow::Random<xpu>(ctx.dev_id + global_seed * kRandMagic);
+      resource.var  = Engine::Get()->NewVariable();
+      prnd          = new mshadow::Random<xpu>(ctx.dev_id + global_seed * kRandMagic);
       resource.ptr_ = prnd;
-      resource.req = ResourceRequest(ResourceRequest::kRandom);
+      resource.req  = ResourceRequest(ResourceRequest::kRandom);
     }
     ~ResourceRandom() {
-      mshadow::Random<xpu> *r = prnd;
+      mshadow::Random<xpu>* r = prnd;
       Engine::Get()->DeleteVariable(
-          [r](RunContext rctx) {
-            MSHADOW_CATCH_ERROR(delete r);
-          }, ctx, resource.var);
+          [r](RunContext rctx) { MSHADOW_CATCH_ERROR(delete r); }, ctx, resource.var);
     }
     // set seed to a PRNG using global_seed and device id
     inline void SeedWithDeviceID(uint32_t global_seed) {
@@ -254,19 +265,24 @@ class ResourceManagerImpl : public ResourceManager {
     }
     // set seed to a PRNG
     inline void Seed(uint32_t seed) {
-      mshadow::Random<xpu> *r = prnd;
+      mshadow::Random<xpu>* r = prnd;
       Engine::Get()->PushAsync(
-        [r, seed](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-          r->set_stream(rctx.get_stream<xpu>());
-          r->Seed(seed);
-          on_complete();
-        }, ctx, {}, {resource.var},
-        FnProperty::kNormal, 0, "ResourceRandomSetSeed");
+          [r, seed](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            r->set_stream(rctx.get_stream<xpu>());
+            r->Seed(seed);
+            on_complete();
+          },
+          ctx,
+          {},
+          {resource.var},
+          FnProperty::kNormal,
+          0,
+          "ResourceRandomSetSeed");
     }
   };
 
   // temporary space resource.
-  template<ResourceRequest::Type req>
+  template <ResourceRequest::Type req>
   struct ResourceTempSpace {
     /*! \brief the context of the device */
     Context ctx;
@@ -280,11 +296,11 @@ class ResourceManagerImpl : public ResourceManager {
     explicit ResourceTempSpace(Context ctx, size_t ncopy)
         : ctx(ctx), space(ncopy), resource(ncopy), curr_ptr(0) {
       for (size_t i = 0; i < space.size(); ++i) {
-        resource[i].var = Engine::Get()->NewVariable();
-        resource[i].id = static_cast<int32_t>(i);
+        resource[i].var  = Engine::Get()->NewVariable();
+        resource[i].id   = static_cast<int32_t>(i);
         resource[i].ptr_ = &space[i];
-        resource[i].req = ResourceRequest(req);
-        space[i].ctx = ctx;
+        resource[i].req  = ResourceRequest(req);
+        space[i].ctx     = ctx;
         CHECK_EQ(space[i].handle.size, 0U);
       }
     }
@@ -292,16 +308,18 @@ class ResourceManagerImpl : public ResourceManager {
       for (size_t i = 0; i < space.size(); ++i) {
         SpaceAllocator r = space[i];
         Engine::Get()->DeleteVariable(
-            [r](RunContext rctx){
+            [r](RunContext rctx) {
               SpaceAllocator rcpy = r;
               MSHADOW_CATCH_ERROR(rcpy.ReleaseAll());
-            }, ctx, resource[i].var);
+            },
+            ctx,
+            resource[i].var);
       }
     }
     // get next resource in round roubin matter
     inline Resource GetNext() {
       const size_t kMaxDigit = std::numeric_limits<size_t>::max() / 2;
-      size_t ptr = ++curr_ptr;
+      size_t ptr             = ++curr_ptr;
       // reset ptr to avoid undefined behavior during overflow
       // usually this won't happen
       if (ptr > kMaxDigit) {
@@ -313,44 +331,50 @@ class ResourceManagerImpl : public ResourceManager {
 
 #if MXNET_USE_CUDNN == 1
   struct ResourceCUDNNDropout : public ResourceTempSpace<ResourceRequest::kCuDNNDropoutDesc> {
-    explicit ResourceCUDNNDropout(Context ctx, size_t ncopy, uint32_t global_seed) :
-      ResourceTempSpace<ResourceRequest::kCuDNNDropoutDesc>(ctx, ncopy) {
-        ResourceManagerImpl::SeedCUDNNDropout(this, global_seed);
+    explicit ResourceCUDNNDropout(Context ctx, size_t ncopy, uint32_t global_seed)
+        : ResourceTempSpace<ResourceRequest::kCuDNNDropoutDesc>(ctx, ncopy) {
+      ResourceManagerImpl::SeedCUDNNDropout(this, global_seed);
     }
   };
 
-  static void SeedCUDNNDropout(ResourceCUDNNDropout *p, uint32_t seed) {
+  static void SeedCUDNNDropout(ResourceCUDNNDropout* p, uint32_t seed) {
     for (size_t i = 0; i < p->space.size(); ++i) {
       uint32_t current_seed = p->ctx.dev_id + i * kMaxNumGPUs + seed * kRandMagic;
-      Resource* r = &(p->resource[i]);
+      Resource* r           = &(p->resource[i]);
       Engine::Get()->PushAsync(
-      [r, current_seed](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-        auto state_space = static_cast<resource::SpaceAllocator*>(r->ptr_);
-        mshadow::Stream<gpu>* stream = rctx.get_stream<gpu>();
-        CHECK_EQ(state_space->ctx.dev_id, stream->dev_id)
-          << "The device id of cudnn dropout state space doesn't match that from stream.";
-        if (!state_space->handle.size) {
-          // not allocated yet
-          size_t dropout_state_size;
-          CUDNN_CALL(cudnnDropoutGetStatesSize(stream->dnn_handle_, &dropout_state_size));
-          // reserve GPU space
-          Storage::Get()->DirectFree(
-            Storage::Get()->Alloc(dropout_state_size, state_space->ctx));
-          state_space->GetSpace(dropout_state_size, "cudnn_dropout_state");
-        }
-        cudnnDropoutDescriptor_t temp_descriptor;
-        CUDNN_CALL(cudnnCreateDropoutDescriptor(&temp_descriptor));
-        CUDNN_CALL(cudnnSetDropoutDescriptor(temp_descriptor, stream->dnn_handle_,
-                                             0.5,
-                                             state_space->handle.dptr,
-                                             state_space->handle.size,
-                                             current_seed));
-        CUDNN_CALL(cudnnDestroyDropoutDescriptor(temp_descriptor));
-        cudaStream_t cuda_stream = mshadow::Stream<gpu>::GetStream(stream);
-        cudaStreamSynchronize(cuda_stream);
-        on_complete();
-      }, p->ctx, {}, {r->var}, FnProperty::kNormal, 0,
-      "CUDNNDropoutDescriptorSeed");
+          [r, current_seed](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            auto state_space             = static_cast<resource::SpaceAllocator*>(r->ptr_);
+            mshadow::Stream<gpu>* stream = rctx.get_stream<gpu>();
+            CHECK_EQ(state_space->ctx.dev_id, stream->dev_id)
+                << "The device id of cudnn dropout state space doesn't match that from stream.";
+            if (!state_space->handle.size) {
+              // not allocated yet
+              size_t dropout_state_size;
+              CUDNN_CALL(cudnnDropoutGetStatesSize(stream->dnn_handle_, &dropout_state_size));
+              // reserve GPU space
+              Storage::Get()->DirectFree(
+                  Storage::Get()->Alloc(dropout_state_size, state_space->ctx));
+              state_space->GetSpace(dropout_state_size, "cudnn_dropout_state");
+            }
+            cudnnDropoutDescriptor_t temp_descriptor;
+            CUDNN_CALL(cudnnCreateDropoutDescriptor(&temp_descriptor));
+            CUDNN_CALL(cudnnSetDropoutDescriptor(temp_descriptor,
+                                                 stream->dnn_handle_,
+                                                 0.5,
+                                                 state_space->handle.dptr,
+                                                 state_space->handle.size,
+                                                 current_seed));
+            CUDNN_CALL(cudnnDestroyDropoutDescriptor(temp_descriptor));
+            cudaStream_t cuda_stream = mshadow::Stream<gpu>::GetStream(stream);
+            cudaStreamSynchronize(cuda_stream);
+            on_complete();
+          },
+          p->ctx,
+          {},
+          {r->var},
+          FnProperty::kNormal,
+          0,
+          "CUDNNDropoutDescriptorSeed");
     }
 
     p->curr_ptr.store(0);
@@ -360,12 +384,12 @@ class ResourceManagerImpl : public ResourceManager {
 
   // the parallel random sampler resources
   // it use device API for GPU
-  template<typename xpu>
+  template <typename xpu>
   struct ResourceParallelRandom {
     /*! \brief the context of the PRNG */
     Context ctx;
     /*! \brief pointers to sampler */
-    std::vector<common::random::RandGenerator<xpu> *> sampler;
+    std::vector<common::random::RandGenerator<xpu>*> sampler;
     /*! \brief resource representation */
     std::vector<Resource> resource;
     /*! \brief current pointer to the round roubin allocator */
@@ -375,27 +399,34 @@ class ResourceManagerImpl : public ResourceManager {
         : ctx(ctx), sampler(ncopy), resource(ncopy), curr_ptr(0) {
       for (size_t i = 0; i < sampler.size(); ++i) {
         const uint32_t seed = ctx.dev_id + i * kMaxNumGPUs + global_seed * kRandMagic;
-        resource[i].var = Engine::Get()->NewVariable();
-        common::random::RandGenerator<xpu> *r = new common::random::RandGenerator<xpu>();
+        resource[i].var     = Engine::Get()->NewVariable();
+        common::random::RandGenerator<xpu>* r = new common::random::RandGenerator<xpu>();
         Engine::Get()->PushSync(
-        [r, seed](RunContext rctx) {
-          common::random::RandGenerator<xpu>::AllocState(r);
-          r->Seed(rctx.get_stream<xpu>(), seed);
-        }, ctx, {}, {resource[i].var},
-        FnProperty::kNormal, 0, "ResourceParallelRandomSetSeed");
-        sampler[i] = r;
+            [r, seed](RunContext rctx) {
+              common::random::RandGenerator<xpu>::AllocState(r);
+              r->Seed(rctx.get_stream<xpu>(), seed);
+            },
+            ctx,
+            {},
+            {resource[i].var},
+            FnProperty::kNormal,
+            0,
+            "ResourceParallelRandomSetSeed");
+        sampler[i]       = r;
         resource[i].ptr_ = sampler[i];
-        resource[i].req = ResourceRequest(ResourceRequest::kParallelRandom);
+        resource[i].req  = ResourceRequest(ResourceRequest::kParallelRandom);
       }
     }
     ~ResourceParallelRandom() {
       for (size_t i = 0; i < sampler.size(); ++i) {
-        common::random::RandGenerator<xpu> *r = sampler[i];
+        common::random::RandGenerator<xpu>* r = sampler[i];
         Engine::Get()->DeleteVariable(
-        [r](RunContext rctx) {
-          MSHADOW_CATCH_ERROR(common::random::RandGenerator<xpu>::FreeState(r));
-          MSHADOW_CATCH_ERROR(delete r);
-        }, ctx, resource[i].var);
+            [r](RunContext rctx) {
+              MSHADOW_CATCH_ERROR(common::random::RandGenerator<xpu>::FreeState(r));
+              MSHADOW_CATCH_ERROR(delete r);
+            },
+            ctx,
+            resource[i].var);
       }
     }
     // set seed to a sampler using global_seed and device id
@@ -416,18 +447,23 @@ class ResourceManagerImpl : public ResourceManager {
     }
     // set seed to a sampler
     inline void SeedOne(size_t i, uint32_t seed) {
-      common::random::RandGenerator<xpu> *r = sampler[i];
+      common::random::RandGenerator<xpu>* r = sampler[i];
       Engine::Get()->PushAsync(
-      [r, seed](RunContext rctx, Engine::CallbackOnComplete on_complete) {
-        r->Seed(rctx.get_stream<xpu>(), seed);
-        on_complete();
-      }, ctx, {}, {resource[i].var},
-      FnProperty::kNormal, 0, "ResourceNativeRandomSetSeed");
+          [r, seed](RunContext rctx, Engine::CallbackOnComplete on_complete) {
+            r->Seed(rctx.get_stream<xpu>(), seed);
+            on_complete();
+          },
+          ctx,
+          {},
+          {resource[i].var},
+          FnProperty::kNormal,
+          0,
+          "ResourceNativeRandomSetSeed");
     }
     // get next resource in round roubin matter
     inline Resource GetNext() {
       const size_t kMaxDigit = std::numeric_limits<size_t>::max() / 2;
-      size_t ptr = ++curr_ptr;
+      size_t ptr             = ++curr_ptr;
       // reset ptr to avoid undefined behavior during overflow
       // usually this won't happen
       if (ptr > kMaxDigit) {
@@ -452,31 +488,29 @@ class ResourceManagerImpl : public ResourceManager {
   /*! \brief internal seed to the random number generator */
   uint32_t global_seed_{0};
   /*! \brief CPU random number resources */
-  std::unique_ptr<ResourceRandom<cpu> > cpu_rand_;
+  std::unique_ptr<ResourceRandom<cpu>> cpu_rand_;
   /*! \brief CPU temp space resources */
   std::unique_ptr<ResourceTempSpace<ResourceRequest::kTempSpace>> cpu_space_;
   /*! \brief CPU parallel random number resources */
-  std::unique_ptr<ResourceParallelRandom<cpu> > cpu_parallel_rand_;
+  std::unique_ptr<ResourceParallelRandom<cpu>> cpu_parallel_rand_;
 #if MXNET_USE_CUDA
   /*! \brief random number generator for GPU */
-  common::LazyAllocArray<ResourceRandom<gpu> > gpu_rand_;
+  common::LazyAllocArray<ResourceRandom<gpu>> gpu_rand_;
   /*! \brief temp space for GPU */
   common::LazyAllocArray<ResourceTempSpace<ResourceRequest::kTempSpace>> gpu_space_;
   /*! \brief GPU parallel (on device) random number resources */
-  common::LazyAllocArray<ResourceParallelRandom<gpu> > gpu_parallel_rand_;
+  common::LazyAllocArray<ResourceParallelRandom<gpu>> gpu_parallel_rand_;
 #if MXNET_USE_CUDNN == 1
   /*! \brief number of copies in GPU cudnn dropout descriptor resources */
   int gpu_cudnn_dropout_state_copy_;
   /*! \brief GPU parallel (on device) random number resources */
-  common::LazyAllocArray<ResourceCUDNNDropout>
-    gpu_cudnn_dropout_state_;
+  common::LazyAllocArray<ResourceCUDNNDropout> gpu_cudnn_dropout_state_;
 #endif  // MXNET_USE_CUDNN == 1
 #endif
 };
 }  // namespace resource
 
-void* Resource::get_space_internal(size_t size,
-    const std::string &name) const {
+void* Resource::get_space_internal(size_t size, const std::string& name) const {
   return static_cast<resource::SpaceAllocator*>(ptr_)->GetSpace(size, name);
 }
 
@@ -485,27 +519,23 @@ void* Resource::get_host_space_internal(size_t size) const {
 }
 
 #if MXNET_USE_CUDNN == 1
-void Resource::get_cudnn_dropout_desc(
-    cudnnDropoutDescriptor_t *dropout_desc,
-    mshadow::Stream<gpu> *stream,
-    const float dropout,
-    const std::string &name) const {
-
+void Resource::get_cudnn_dropout_desc(cudnnDropoutDescriptor_t* dropout_desc,
+                                      mshadow::Stream<gpu>* stream,
+                                      const float dropout,
+                                      const std::string& name) const {
   CHECK_EQ(req.type, ResourceRequest::kCuDNNDropoutDesc);
   auto state_space = static_cast<resource::SpaceAllocator*>(ptr_);
   CHECK_EQ(state_space->ctx.dev_id, stream->dev_id)
-    << "The device id of cudnn dropout state space doesn't match that from stream.";
+      << "The device id of cudnn dropout state space doesn't match that from stream.";
   if (dropout <= 0) {
-    CUDNN_CALL(cudnnSetDropoutDescriptor(*dropout_desc, stream->dnn_handle_,
-                                         dropout,
-                                         nullptr,
-                                         0, 0));
+    CUDNN_CALL(
+        cudnnSetDropoutDescriptor(*dropout_desc, stream->dnn_handle_, dropout, nullptr, 0, 0));
   } else {
-    CHECK(state_space->handle.size > 0)
-      << "CUDNN dropout descriptor was not initialized yet!";
+    CHECK(state_space->handle.size > 0) << "CUDNN dropout descriptor was not initialized yet!";
     // cudnnRestoreDropoutDescriptor() introduced with cuDNN v7
     STATIC_ASSERT_CUDNN_VERSION_GE(7000);
-    CUDNN_CALL(cudnnRestoreDropoutDescriptor(*dropout_desc, stream->dnn_handle_,
+    CUDNN_CALL(cudnnRestoreDropoutDescriptor(*dropout_desc,
+                                             stream->dnn_handle_,
                                              dropout,
                                              state_space->handle.dptr,
                                              state_space->handle.size,
diff --git a/src/runtime/c_runtime_api.cc b/src/runtime/c_runtime_api.cc
index dbc3b6cd0c6e..c35b2bb49122 100644
--- a/src/runtime/c_runtime_api.cc
+++ b/src/runtime/c_runtime_api.cc
@@ -44,7 +44,6 @@ struct MXNetRuntimeEntry {
   std::string last_error;
 };
 
-
 typedef dmlc::ThreadLocalStore<MXNetRuntimeEntry> MXNetAPIRuntimeStore;
 
 int MXNetFuncFree(MXNetFunctionHandle func) {
@@ -61,17 +60,16 @@ int MXNetFuncCall(MXNetFunctionHandle func,
                   int* ret_type_code) {
   API_BEGIN();
   MXNetRetValue rv;
-  (*static_cast<const PackedFunc*>(func)).CallPacked(
-      MXNetArgs(args, arg_type_codes, num_args), &rv);
+  (*static_cast<const PackedFunc*>(func))
+      .CallPacked(MXNetArgs(args, arg_type_codes, num_args), &rv);
   // handle return string.
-  if (rv.type_code() == kStr ||
-      rv.type_code() == kBytes) {
+  if (rv.type_code() == kStr || rv.type_code() == kBytes) {
     MXNetRuntimeEntry* e = MXNetAPIRuntimeStore::Get();
-    e->ret_str = *rv.ptr<std::string>();
+    e->ret_str           = *rv.ptr<std::string>();
     if (rv.type_code() == kBytes) {
       e->ret_bytes.data = e->ret_str.c_str();
       e->ret_bytes.size = e->ret_str.length();
-      *ret_type_code = kBytes;
+      *ret_type_code    = kBytes;
       ret_val->v_handle = &(e->ret_bytes);
     } else {
       *ret_type_code = kStr;
@@ -141,38 +139,47 @@ std::string NormalizeError(std::string err_msg) {
       getline(is, line);
       return true;
     }
-    if (!(is >> line)) return false;
+    if (!(is >> line))
+      return false;
     // get filename
-    while (is.peek() == ' ') is.get();
+    while (is.peek() == ' ')
+      is.get();
     if (!getline(is, file_name, ':')) {
       return false;
     } else {
       if (is.peek() == '\\' || is.peek() == '/') {
         // windows path
-        if (!getline(is, line, ':')) return false;
+        if (!getline(is, line, ':'))
+          return false;
         file_name = file_name + ':' + line;
       }
     }
     // get line number
-    if (!(is >> line_number)) return false;
+    if (!(is >> line_number))
+      return false;
     // get rest of the message.
-    while (is.peek() == ' ' || is.peek() == ':') is.get();
-    if (!getline(is, line)) return false;
+    while (is.peek() == ' ' || is.peek() == ':')
+      is.get();
+    if (!getline(is, line))
+      return false;
     // detect check message, rewrite to remote extra :
     if (line.compare(0, 13, "Check failed:") == 0) {
       size_t end_pos = line.find(':', 13);
-      if (end_pos == std::string::npos) return false;
+      if (end_pos == std::string::npos)
+        return false;
       check_msg = line.substr(0, end_pos + 1) + ' ';
-      line = line.substr(end_pos + 1);
+      line      = line.substr(end_pos + 1);
     }
     return true;
   };
   // if not in correct format, do not do any rewrite.
-  if (!parse_log_header()) return err_msg;
+  if (!parse_log_header())
+    return err_msg;
   // Parse error type.
   {
     size_t start_pos = 0, end_pos;
-    for (; start_pos < line.length() && line[start_pos] == ' '; ++start_pos) {}
+    for (; start_pos < line.length() && line[start_pos] == ' '; ++start_pos) {
+    }
     for (end_pos = start_pos; end_pos < line.length(); ++end_pos) {
       char ch = line[end_pos];
       if (ch == ':') {
@@ -180,16 +187,18 @@ std::string NormalizeError(std::string err_msg) {
         break;
       }
       // [A-Z0-9a-z_.]
-      if (!std::isalpha(ch) && !std::isdigit(ch) && ch != '_' && ch != '.') break;
+      if (!std::isalpha(ch) && !std::isdigit(ch) && ch != '_' && ch != '.')
+        break;
     }
     if (error_type.length() != 0) {
       // if we successfully detected error_type: trim the following space.
-      for (start_pos = end_pos + 1;
-           start_pos < line.length() && line[start_pos] == ' '; ++start_pos) {}
+      for (start_pos = end_pos + 1; start_pos < line.length() && line[start_pos] == ' ';
+           ++start_pos) {
+      }
       line = line.substr(start_pos);
     } else {
       // did not detect error_type, use default value.
-      line = line.substr(start_pos);
+      line       = line.substr(start_pos);
       error_type = "MXNetError";
     }
   }
@@ -206,7 +215,8 @@ std::string NormalizeError(std::string err_msg) {
       } else {
         trace_mode = false;
         // remove EOL trailing stacktrace.
-        if (line.length() == 0) continue;
+        if (line.length() == 0)
+          continue;
       }
     }
     if (!trace_mode) {
@@ -250,12 +260,12 @@ std::string NormalizeError(std::string err_msg) {
 }
 #endif
 
-int MXAPIHandleException(const std::exception &e) {
+int MXAPIHandleException(const std::exception& e) {
   MXAPISetLastError(NormalizeError(e.what()).c_str());
   return -1;
 }
 
-const char *MXGetLastError() {
+const char* MXGetLastError() {
   return MXNetAPIRuntimeStore::Get()->last_error.c_str();
 }
 
diff --git a/src/runtime/container.cc b/src/runtime/container.cc
index db3db30cf980..50a284af56f7 100644
--- a/src/runtime/container.cc
+++ b/src/runtime/container.cc
@@ -31,33 +31,28 @@
 namespace mxnet {
 namespace runtime {
 
-MXNET_REGISTER_GLOBAL("container._GetADTTag")
-.set_body([](MXNetArgs args, MXNetRetValue* rv) {
-  ObjectRef obj = args[0];
+MXNET_REGISTER_GLOBAL("container._GetADTTag").set_body([](MXNetArgs args, MXNetRetValue* rv) {
+  ObjectRef obj   = args[0];
   const auto& adt = Downcast<ADT>(obj);
-  *rv = static_cast<int64_t>(adt.tag());
+  *rv             = static_cast<int64_t>(adt.tag());
 });
 
-MXNET_REGISTER_GLOBAL("container._GetADTSize")
-.set_body([](MXNetArgs args, MXNetRetValue* rv) {
-  ObjectRef obj = args[0];
+MXNET_REGISTER_GLOBAL("container._GetADTSize").set_body([](MXNetArgs args, MXNetRetValue* rv) {
+  ObjectRef obj   = args[0];
   const auto& adt = Downcast<ADT>(obj);
-  *rv = static_cast<int64_t>(adt.size());
+  *rv             = static_cast<int64_t>(adt.size());
 });
 
-
-MXNET_REGISTER_GLOBAL("container._GetADTFields")
-.set_body([](MXNetArgs args, MXNetRetValue* rv) {
-  ObjectRef obj = args[0];
-  int idx = args[1];
+MXNET_REGISTER_GLOBAL("container._GetADTFields").set_body([](MXNetArgs args, MXNetRetValue* rv) {
+  ObjectRef obj   = args[0];
+  int idx         = args[1];
   const auto& adt = Downcast<ADT>(obj);
   CHECK_LT(idx, adt.size());
   *rv = adt[idx];
 });
 
-MXNET_REGISTER_GLOBAL("container._ADT")
-.set_body([](MXNetArgs args, MXNetRetValue* rv) {
-  int itag = args[0];
+MXNET_REGISTER_GLOBAL("container._ADT").set_body([](MXNetArgs args, MXNetRetValue* rv) {
+  int itag   = args[0];
   size_t tag = static_cast<size_t>(itag);
   std::vector<ObjectRef> fields;
   for (int i = 1; i < args.size(); i++) {
@@ -66,8 +61,7 @@ MXNET_REGISTER_GLOBAL("container._ADT")
   *rv = ADT(tag, fields);
 });
 
-MXNET_REGISTER_GLOBAL("container._Map")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._Map").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   CHECK_EQ(args.size() % 2, 0);
   std::unordered_map<ObjectRef, ObjectRef, ObjectHash, ObjectEqual> data;
   for (int i = 0; i < args.num_args; i += 2) {
@@ -75,8 +69,8 @@ MXNET_REGISTER_GLOBAL("container._Map")
         String::CanConvertFrom(args[i]) ? args[i].operator String() : args[i].operator ObjectRef();
     ObjectRef v;
     if (args[i + 1].type_code() == kNDArrayHandle) {
-      mxnet::NDArray *array = args[i + 1].operator mxnet::NDArray*();
-      v = NDArrayHandle(array);
+      mxnet::NDArray* array = args[i + 1].operator mxnet::NDArray*();
+      v                     = NDArrayHandle(array);
     } else {
       v = args[i + 1];
     }
@@ -85,17 +79,15 @@ MXNET_REGISTER_GLOBAL("container._Map")
   *rv = Map<ObjectRef, ObjectRef>(data);
 });
 
-MXNET_REGISTER_GLOBAL("container._MapSize")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._MapSize").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   CHECK_EQ(args[0].type_code(), kObjectHandle);
   Object* ptr = static_cast<Object*>(args[0].value().v_handle);
   CHECK(ptr->IsInstance<MapObj>());
   auto* n = static_cast<const MapObj*>(ptr);
-  *rv = static_cast<int64_t>(n->size());
+  *rv     = static_cast<int64_t>(n->size());
 });
 
-MXNET_REGISTER_GLOBAL("container._MapGetItem")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._MapGetItem").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   CHECK_EQ(args[0].type_code(), kObjectHandle);
   Object* ptr = static_cast<Object*>(args[0].value().v_handle);
   CHECK(ptr->IsInstance<MapObj>());
@@ -107,11 +99,10 @@ MXNET_REGISTER_GLOBAL("container._MapGetItem")
   *rv = (*it).second;
 });
 
-MXNET_REGISTER_GLOBAL("container._MapItems")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._MapItems").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   CHECK_EQ(args[0].type_code(), kObjectHandle);
   Object* ptr = static_cast<Object*>(args[0].value().v_handle);
-  auto* n = static_cast<const MapObj*>(ptr);
+  auto* n     = static_cast<const MapObj*>(ptr);
   std::vector<ObjectRef> rkvs;
   for (const auto& kv : *n) {
     if (kv.first->IsInstance<StringObj>()) {
@@ -124,28 +115,25 @@ MXNET_REGISTER_GLOBAL("container._MapItems")
   *rv = ADT(0, rkvs.begin(), rkvs.end());
 });
 
-MXNET_REGISTER_GLOBAL("container._MapCount")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._MapCount").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   CHECK_EQ(args[0].type_code(), kObjectHandle);
   Object* ptr = static_cast<Object*>(args[0].value().v_handle);
   CHECK(ptr->IsInstance<MapObj>());
   const MapObj* n = static_cast<const MapObj*>(ptr);
-  auto key = String::CanConvertFrom(args[1]) ? args[1].operator String()
-                                             : args[1].operator ObjectRef();
+  auto key =
+      String::CanConvertFrom(args[1]) ? args[1].operator String() : args[1].operator ObjectRef();
   int64_t cnt = n->count(key);
-  *rv = cnt;
+  *rv         = cnt;
 });
 
-MXNET_REGISTER_GLOBAL("container._String")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._String").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   std::string str = args[0].operator std::string();
-  *rv = String(std::move(str));
+  *rv             = String(std::move(str));
 });
 
-MXNET_REGISTER_GLOBAL("container._GetFFIString")
-.set_body([] (MXNetArgs args, MXNetRetValue* rv) {
+MXNET_REGISTER_GLOBAL("container._GetFFIString").set_body([](MXNetArgs args, MXNetRetValue* rv) {
   String str = args[0].operator String();
-  *rv = std::string(str);
+  *rv        = std::string(str);
 });
 
 MXNET_REGISTER_OBJECT_TYPE(ADTObj);
diff --git a/src/runtime/ndarray_handle.cc b/src/runtime/ndarray_handle.cc
index d745b78c3cc6..a517afd6e6b8 100644
--- a/src/runtime/ndarray_handle.cc
+++ b/src/runtime/ndarray_handle.cc
@@ -30,11 +30,11 @@ namespace mxnet {
 namespace runtime {
 
 MXNET_REGISTER_GLOBAL("ndarray_handle._GetNDArrayHandleValue")
-.set_body([](MXNetArgs args, MXNetRetValue* rv) {
-  ObjectRef obj = args[0];
-  const auto& handle = Downcast<NDArrayHandle>(obj);
-  *rv = &(handle->value);
-});
+    .set_body([](MXNetArgs args, MXNetRetValue* rv) {
+      ObjectRef obj      = args[0];
+      const auto& handle = Downcast<NDArrayHandle>(obj);
+      *rv                = &(handle->value);
+    });
 
 MXNET_REGISTER_OBJECT_TYPE(NDArrayHandleObj);
 
diff --git a/src/runtime/object.cc b/src/runtime/object.cc
index ee7ed74ecb88..8d92e699f383 100644
--- a/src/runtime/object.cc
+++ b/src/runtime/object.cc
@@ -66,8 +66,10 @@ class TypeContext {
   // Most types are already checked by the fast-path via reserved slot checking.
   bool DerivedFrom(uint32_t child_tindex, uint32_t parent_tindex) {
     // invariance: child's type index is always bigger than its parent.
-    if (child_tindex < parent_tindex) return false;
-    if (child_tindex == parent_tindex) return true;
+    if (child_tindex < parent_tindex)
+      return false;
+    if (child_tindex == parent_tindex)
+      return true;
     {
       std::lock_guard<std::mutex> lock(mutex_);
       CHECK_LT(child_tindex, type_table_.size());
@@ -107,10 +109,8 @@ class TypeContext {
       allocated_tindex = static_tindex;
       CHECK_LT(static_tindex, type_table_.size());
       CHECK_EQ(type_table_[allocated_tindex].allocated_slots, 0U)
-          << "Conflicting static index " << static_tindex
-          << " between " << type_table_[allocated_tindex].name
-          << " and "
-          << skey;
+          << "Conflicting static index " << static_tindex << " between "
+          << type_table_[allocated_tindex].name << " and " << skey;
     } else if (pinfo.allocated_slots + num_slots < pinfo.num_slots) {
       // allocate the slot from parent's reserved pool
       allocated_tindex = parent_tindex + pinfo.allocated_slots;
@@ -127,14 +127,13 @@ class TypeContext {
     }
     CHECK_GT(allocated_tindex, parent_tindex);
     // initialize the slot.
-    type_table_[allocated_tindex].index = allocated_tindex;
-    type_table_[allocated_tindex].parent_index = parent_tindex;
-    type_table_[allocated_tindex].num_slots = num_slots;
-    type_table_[allocated_tindex].allocated_slots = 1;
-    type_table_[allocated_tindex].child_slots_can_overflow =
-        child_slots_can_overflow;
-    type_table_[allocated_tindex].name = skey;
-    type_table_[allocated_tindex].name_hash = std::hash<std::string>()(skey);
+    type_table_[allocated_tindex].index                    = allocated_tindex;
+    type_table_[allocated_tindex].parent_index             = parent_tindex;
+    type_table_[allocated_tindex].num_slots                = num_slots;
+    type_table_[allocated_tindex].allocated_slots          = 1;
+    type_table_[allocated_tindex].child_slots_can_overflow = child_slots_can_overflow;
+    type_table_[allocated_tindex].name                     = skey;
+    type_table_[allocated_tindex].name_hash                = std::hash<std::string>()(skey);
     // update the key2index mapping.
     type_key2index_[skey] = allocated_tindex;
     return allocated_tindex;
@@ -142,24 +141,21 @@ class TypeContext {
 
   std::string TypeIndex2Key(uint32_t tindex) {
     std::lock_guard<std::mutex> lock(mutex_);
-    CHECK(tindex < type_table_.size() &&
-          type_table_[tindex].allocated_slots != 0)
+    CHECK(tindex < type_table_.size() && type_table_[tindex].allocated_slots != 0)
         << "Unknown type index " << tindex;
     return type_table_[tindex].name;
   }
 
   size_t TypeIndex2KeyHash(uint32_t tindex) {
     std::lock_guard<std::mutex> lock(mutex_);
-    CHECK(tindex < type_table_.size() &&
-          type_table_[tindex].allocated_slots != 0)
+    CHECK(tindex < type_table_.size() && type_table_[tindex].allocated_slots != 0)
         << "Unknown type index " << tindex;
     return type_table_[tindex].name_hash;
   }
 
   uint32_t TypeKey2Index(const std::string& skey) {
     auto it = type_key2index_.find(skey);
-    CHECK(it != type_key2index_.end())
-        << "Cannot find type " << skey;
+    CHECK(it != type_key2index_.end()) << "Cannot find type " << skey;
     return it->second;
   }
 
@@ -189,8 +185,7 @@ uint32_t Object::GetOrAllocRuntimeTypeIndex(const std::string& key,
 }
 
 bool Object::DerivedFrom(uint32_t parent_tindex) const {
-  return TypeContext::Global()->DerivedFrom(
-      this->type_index_, parent_tindex);
+  return TypeContext::Global()->DerivedFrom(this->type_index_, parent_tindex);
 }
 
 std::string Object::TypeIndex2Key(uint32_t tindex) {
@@ -223,7 +218,6 @@ int MXNetObjectGetTypeIndex(MXNetObjectHandle obj, unsigned* out_tindex) {
 
 int MXNetObjectTypeKey2Index(const char* type_key, unsigned* out_tindex) {
   API_BEGIN();
-  out_tindex[0] = mxnet::runtime::ObjectInternal::ObjectTypeKey2Index(
-      type_key);
+  out_tindex[0] = mxnet::runtime::ObjectInternal::ObjectTypeKey2Index(type_key);
   API_END();
 }
diff --git a/src/runtime/object_internal.h b/src/runtime/object_internal.h
index 7252bace9491..b171a75fa14d 100644
--- a/src/runtime/object_internal.h
+++ b/src/runtime/object_internal.h
@@ -59,4 +59,4 @@ class ObjectInternal {
 
 }  // namespace runtime
 }  // namespace mxnet
-#endif   // MXNET_RUNTIME_OBJECT_INTERNAL_H_
+#endif  // MXNET_RUNTIME_OBJECT_INTERNAL_H_
diff --git a/src/runtime/registry.cc b/src/runtime/registry.cc
index d1511806aa27..ab2f143ae090 100644
--- a/src/runtime/registry.cc
+++ b/src/runtime/registry.cc
@@ -6,9 +6,9 @@
  * to you under the Apache License, Version 2.0 (the
  * "License"); you may not use this file except in compliance
  * with the License.  You may obtain a copy of the License at
- * 
+ *
  *   http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing,
  * software distributed under the License is distributed on an
  * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
@@ -65,13 +65,12 @@ Registry& Registry::Register(const std::string& name, bool override) {  // NOLIN
   std::lock_guard<std::mutex> lock(m->mutex);
   auto it = m->fmap.find(name);
   if (it == m->fmap.end()) {
-    Registry* r = new Registry();
-    r->name_ = name;
+    Registry* r   = new Registry();
+    r->name_      = name;
     m->fmap[name] = r;
     return *r;
   } else {
-    CHECK(override)
-      << "Global PackedFunc " << name << " is already registered";
+    CHECK(override) << "Global PackedFunc " << name << " is already registered";
     return *it->second;
   }
 }
@@ -80,7 +79,8 @@ bool Registry::Remove(const std::string& name) {
   Manager* m = Manager::Global();
   std::lock_guard<std::mutex> lock(m->mutex);
   auto it = m->fmap.find(name);
-  if (it == m->fmap.end()) return false;
+  if (it == m->fmap.end())
+    return false;
   m->fmap.erase(it);
   return true;
 }
@@ -89,7 +89,8 @@ const PackedFunc* Registry::Get(const std::string& name) {
   Manager* m = Manager::Global();
   std::lock_guard<std::mutex> lock(m->mutex);
   auto it = m->fmap.find(name);
-  if (it == m->fmap.end()) return nullptr;
+  if (it == m->fmap.end())
+    return nullptr;
   return &(it->second->func_);
 }
 
@@ -98,7 +99,7 @@ std::vector<std::string> Registry::ListNames() {
   std::lock_guard<std::mutex> lock(m->mutex);
   std::vector<std::string> keys;
   keys.reserve(m->fmap.size());
-  for (const auto &kv : m->fmap) {
+  for (const auto& kv : m->fmap) {
     keys.push_back(kv.first);
   }
   return keys;
@@ -112,7 +113,7 @@ struct MXNetFuncThreadLocalEntry {
   /*! \brief result holder for returning strings */
   std::vector<std::string> ret_vec_str;
   /*! \brief result holder for returning string pointers */
-  std::vector<const char *> ret_vec_charp;
+  std::vector<const char*> ret_vec_charp;
 };
 
 /*! \brief Thread local store that can be used to hold return values. */
@@ -120,8 +121,7 @@ typedef dmlc::ThreadLocalStore<MXNetFuncThreadLocalEntry> MXNetFuncThreadLocalSt
 
 int MXNetFuncGetGlobal(const char* name, MXNetFunctionHandle* out) {
   API_BEGIN();
-  const mxnet::runtime::PackedFunc* fp =
-      mxnet::runtime::Registry::Get(name);
+  const mxnet::runtime::PackedFunc* fp = mxnet::runtime::Registry::Get(name);
   if (fp != nullptr) {
     *out = new mxnet::runtime::PackedFunc(*fp);  // NOLINT(*)
   } else {
@@ -130,16 +130,15 @@ int MXNetFuncGetGlobal(const char* name, MXNetFunctionHandle* out) {
   API_END();
 }
 
-int MXNetFuncListGlobalNames(int *out_size,
-                             const char*** out_array) {
+int MXNetFuncListGlobalNames(int* out_size, const char*** out_array) {
   API_BEGIN();
-  MXNetFuncThreadLocalEntry *ret = MXNetFuncThreadLocalStore::Get();
-  ret->ret_vec_str = mxnet::runtime::Registry::ListNames();
+  MXNetFuncThreadLocalEntry* ret = MXNetFuncThreadLocalStore::Get();
+  ret->ret_vec_str               = mxnet::runtime::Registry::ListNames();
   ret->ret_vec_charp.clear();
   for (size_t i = 0; i < ret->ret_vec_str.size(); ++i) {
     ret->ret_vec_charp.push_back(ret->ret_vec_str[i].c_str());
   }
   *out_array = dmlc::BeginPtr(ret->ret_vec_charp);
-  *out_size = static_cast<int>(ret->ret_vec_str.size());
+  *out_size  = static_cast<int>(ret->ret_vec_str.size());
   API_END();
 }
diff --git a/src/serialization/cnpy.cc b/src/serialization/cnpy.cc
index fc895d1bd22a..0c1917b9a8d5 100644
--- a/src/serialization/cnpy.cc
+++ b/src/serialization/cnpy.cc
@@ -39,7 +39,6 @@
 #include <stdexcept>
 #include <typeinfo>
 
-
 namespace mxnet {
 
 void fortran_order_transpose_prepare(std::vector<dim_t>& shape) {  // NOLINT(runtime/references)
@@ -51,9 +50,9 @@ NDArray fortran_order_transpose(std::vector<dim_t>& shape, int type_flag, NDArra
   std::reverse(std::begin(shape), std::end(shape));
   TShape tshape(shape);
   NDArray transposed(tshape, Context::CPU(), false, type_flag);
-  const std::vector<NDArray*> inputs {&array};
-  const std::vector<NDArray*> outputs {&transposed};
-  const std::vector<OpReqType> reqs {kWriteTo};  // Transpose does not support kWriteInplace
+  const std::vector<NDArray*> inputs{&array};
+  const std::vector<NDArray*> outputs{&transposed};
+  const std::vector<OpReqType> reqs{kWriteTo};  // Transpose does not support kWriteInplace
   nnvm::NodeAttrs attrs;
   if (!Imperative::Get()->is_np_shape()) {
     attrs.op = nnvm::Op::Get("transpose");
@@ -61,24 +60,23 @@ NDArray fortran_order_transpose(std::vector<dim_t>& shape, int type_flag, NDArra
     attrs.op = nnvm::Op::Get("_npi_transpose");
   }
   attrs.op->attr_parser(&attrs);
-  Imperative::Get()->InvokeOp(Context::CPU(), attrs, inputs, outputs,
-                              reqs, DispatchMode::kFCompute, OpStatePtr());
+  Imperative::Get()->InvokeOp(
+      Context::CPU(), attrs, inputs, outputs, reqs, DispatchMode::kFCompute, OpStatePtr());
   return transposed;
 }
 
-
 namespace npy {
 
 #if (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && \
      __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
-#define MXNET_BYTEORDER "<"
+#define MXNET_BYTEORDER      "<"
 #define MXNET_BYTEORDER_CHAR '<'
 #elif defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && \
     __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#define MXNET_BYTEORDER ">"
+#define MXNET_BYTEORDER      ">"
 #define MXNET_BYTEORDER_CHAR '>'
 #elif defined(_WIN32)
-#define MXNET_BYTEORDER "<"
+#define MXNET_BYTEORDER      "<"
 #define MXNET_BYTEORDER_CHAR '<'
 #else
 #error "endian detection needs to be set up for your compiler"
@@ -86,19 +84,32 @@ namespace npy {
 
 std::string dtype_descr(const TBlob& blob) {
   switch (blob.type_flag_) {
-    case mshadow::kFloat16: return "'" MXNET_BYTEORDER "f2'";
-    case mshadow::kFloat32: return "'" MXNET_BYTEORDER "f4'";
-    case mshadow::kFloat64: return "'" MXNET_BYTEORDER "f8'";
-    case mshadow::kInt8: return "'|i1'";
-    case mshadow::kInt16: return "'" MXNET_BYTEORDER "i2'";
-    case mshadow::kInt32: return "'" MXNET_BYTEORDER "i4'";
-    case mshadow::kInt64: return "'" MXNET_BYTEORDER "i8'";
-    case mshadow::kBool: return "'|b1'";
-    case mshadow::kUint8: return "'|u1'";
-    case mshadow::kUint16: return "'" MXNET_BYTEORDER "u2'";
-    case mshadow::kUint32: return "'" MXNET_BYTEORDER "u4'";
-    case mshadow::kUint64: return "'" MXNET_BYTEORDER "u8'";
-    case mshadow::kBfloat16: return "[('bfloat16', '" MXNET_BYTEORDER "u2')]";
+    case mshadow::kFloat16:
+      return "'" MXNET_BYTEORDER "f2'";
+    case mshadow::kFloat32:
+      return "'" MXNET_BYTEORDER "f4'";
+    case mshadow::kFloat64:
+      return "'" MXNET_BYTEORDER "f8'";
+    case mshadow::kInt8:
+      return "'|i1'";
+    case mshadow::kInt16:
+      return "'" MXNET_BYTEORDER "i2'";
+    case mshadow::kInt32:
+      return "'" MXNET_BYTEORDER "i4'";
+    case mshadow::kInt64:
+      return "'" MXNET_BYTEORDER "i8'";
+    case mshadow::kBool:
+      return "'|b1'";
+    case mshadow::kUint8:
+      return "'|u1'";
+    case mshadow::kUint16:
+      return "'" MXNET_BYTEORDER "u2'";
+    case mshadow::kUint32:
+      return "'" MXNET_BYTEORDER "u4'";
+    case mshadow::kUint64:
+      return "'" MXNET_BYTEORDER "u8'";
+    case mshadow::kBfloat16:
+      return "[('bfloat16', '" MXNET_BYTEORDER "u2')]";
     default: {
       LOG(FATAL) << "Unknown dtype type " << blob.type_flag_ << "encountered.";
       return "";
@@ -106,24 +117,36 @@ std::string dtype_descr(const TBlob& blob) {
   }
 }
 
-
 int dtype_descr(const std::string& dtype_descr) {
-    if (dtype_descr.find("f2'") != std::string::npos) return mshadow::kFloat16;
-    else if (dtype_descr.find("f4'") != std::string::npos) return mshadow::kFloat32;
-    else if (dtype_descr.find("f8'") != std::string::npos) return mshadow::kFloat64;
-    else if (dtype_descr.find("|i1'") != std::string::npos) return mshadow::kInt8;
-    else if (dtype_descr.find("i2'") != std::string::npos) return mshadow::kInt16;
-    else if (dtype_descr.find("i4'") != std::string::npos) return mshadow::kInt32;
-    else if (dtype_descr.find("i8'") != std::string::npos) return mshadow::kInt64;
-    else if (dtype_descr.find("|b1'") != std::string::npos) return mshadow::kBool;
-    else if (dtype_descr.find("|u1'") != std::string::npos) return mshadow::kUint8;
-    else if (dtype_descr.find("u2'") != std::string::npos) return mshadow::kUint16;
-    else if (dtype_descr.find("u4'") != std::string::npos) return mshadow::kUint32;
-    else if (dtype_descr.find("u8'") != std::string::npos) return mshadow::kUint64;
-    else if (dtype_descr.find("bfloat16'") != std::string::npos) return mshadow::kBfloat16;
-    else
-      LOG(FATAL) << "Unknown dtype descriptor " << dtype_descr << "encountered.";
-    return -1;
+  if (dtype_descr.find("f2'") != std::string::npos)
+    return mshadow::kFloat16;
+  else if (dtype_descr.find("f4'") != std::string::npos)
+    return mshadow::kFloat32;
+  else if (dtype_descr.find("f8'") != std::string::npos)
+    return mshadow::kFloat64;
+  else if (dtype_descr.find("|i1'") != std::string::npos)
+    return mshadow::kInt8;
+  else if (dtype_descr.find("i2'") != std::string::npos)
+    return mshadow::kInt16;
+  else if (dtype_descr.find("i4'") != std::string::npos)
+    return mshadow::kInt32;
+  else if (dtype_descr.find("i8'") != std::string::npos)
+    return mshadow::kInt64;
+  else if (dtype_descr.find("|b1'") != std::string::npos)
+    return mshadow::kBool;
+  else if (dtype_descr.find("|u1'") != std::string::npos)
+    return mshadow::kUint8;
+  else if (dtype_descr.find("u2'") != std::string::npos)
+    return mshadow::kUint16;
+  else if (dtype_descr.find("u4'") != std::string::npos)
+    return mshadow::kUint32;
+  else if (dtype_descr.find("u8'") != std::string::npos)
+    return mshadow::kUint64;
+  else if (dtype_descr.find("bfloat16'") != std::string::npos)
+    return mshadow::kBfloat16;
+  else
+    LOG(FATAL) << "Unknown dtype descriptor " << dtype_descr << "encountered.";
+  return -1;
 }
 
 std::string create_npy_header(const TBlob& blob) {
@@ -210,11 +233,11 @@ std::tuple<int, int, std::vector<dim_t>> parse_npy_header_descr(const std::strin
   bool fortran_order = (header.substr(loc + 16, 4) == "True" ? true : false);
 
   // Shape
-  loc = header.find('(');
+  loc                            = header.find('(');
   std::string::size_type end_loc = header.find(')');
   CHECK_NE(loc, std::string::npos) << "failed to find NPY header keyword: '('";
   CHECK_NE(end_loc, std::string::npos) << "failed to find NPY header keyword: ')'";
-  std::string shape_str = header.substr(loc+1, end_loc-loc-1);
+  std::string shape_str = header.substr(loc + 1, end_loc - loc - 1);
   std::regex num_regex("[0-9][0-9]*");
   std::smatch sm;
   std::vector<dim_t> shape;
@@ -229,16 +252,15 @@ std::tuple<int, int, std::vector<dim_t>> parse_npy_header_descr(const std::strin
   CHECK_NE(loc, std::string::npos) << "failed to find NPY header keyword: 'descr'";
   // May use https://github.com/numpy/numpy/blob/38275835/numpy/core/src/multiarray/ctors.c#L365
   CHECK(header[loc + 9] == MXNET_BYTEORDER_CHAR || header[loc + 9] == '|')
-    << "Loading files with non-native endianness "
-    << "is not yet supported. Please open the file "
-    << "with numpy.load, use byteswap method to "
-    << "convert endianness and re-save the file.";
+      << "Loading files with non-native endianness "
+      << "is not yet supported. Please open the file "
+      << "with numpy.load, use byteswap method to "
+      << "convert endianness and re-save the file.";
 
   int type_flag = dtype_descr(header);
   return std::tuple(type_flag, fortran_order, shape);
 }
 
-
 void save_array(const std::string& fname, const NDArray& array_) {
   NDArray array;  // a copy on cpu
   if (array_.ctx().dev_mask() != cpu::kDevMask) {
@@ -256,13 +278,13 @@ void save_array(const std::string& fname, const NDArray& array_) {
 
   CHECK_EQ(array.storage_type(), kDefaultStorage);
 
-  const TBlob& blob = array.data();
+  const TBlob& blob      = array.data();
   std::string npy_header = create_npy_header(blob);
 
   std::ofstream output(fname, std::ios::binary);
   output.write(npy_header.data(), npy_header.size());
-  output.write(static_cast<const char*>(blob.dptr_), blob.Size() *
-               mshadow::mshadow_sizeof(blob.type_flag_));
+  output.write(static_cast<const char*>(blob.dptr_),
+               blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_));
 }
 
 NDArray load_array(const std::string& fname) {
@@ -274,7 +296,7 @@ NDArray load_array(const std::string& fname) {
   uint32_t header_len = parse_npy_header_len(strm);
   std::string header(header_len, ' ');
   strm.read(header.data(), header_len);
-  auto[type_flag, fortran_order, shape] = parse_npy_header_descr(header);
+  auto [type_flag, fortran_order, shape] = parse_npy_header_descr(header);  // NOLINT
 
   if (fortran_order) {
     fortran_order_transpose_prepare(shape);
@@ -283,8 +305,8 @@ NDArray load_array(const std::string& fname) {
   TShape tshape(shape);
   NDArray array(tshape, Context::CPU(), false, type_flag);
   const TBlob& blob = array.data();
-  strm.read(reinterpret_cast<char*>(blob.dptr_), blob.Size() *
-            mshadow::mshadow_sizeof(blob.type_flag_));
+  strm.read(reinterpret_cast<char*>(blob.dptr_),
+            blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_));
 
   if (fortran_order) {
     array = fortran_order_transpose(shape, type_flag, array);
@@ -297,49 +319,58 @@ NDArray load_array(const std::string& fname) {
 
 namespace npz {
 
-size_t npy_header_blob_read_callback(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n) {
-    auto[npy_header, blob] = *static_cast<std::tuple<const std::string*, const TBlob*>*>(pOpaque);
-
-    if (file_ofs < npy_header->size() && file_ofs + n < npy_header->size()) {
-        // Read n bytes from npy_header
-        const void* pSrc = static_cast<const void*>(npy_header->data() + file_ofs);
-        std::memcpy(pBuf, pSrc, n);
-    } else if (file_ofs < npy_header->size()) {
-        // Read npy_header->size() - file_ofs bytes from npy_header
-        const void* pSrc = static_cast<const void*>(npy_header->data() + file_ofs);
-        const size_t npy_header_n = npy_header->size() - file_ofs;
-        std::memcpy(pBuf, pSrc, npy_header_n);
-
-        // Read n - (npy_header->size() - file_ofs) bytes from blob
-        void* pBuf_blob = static_cast<void*>(static_cast<char*>(pBuf) + npy_header_n);
-        std::memcpy(pBuf_blob, blob->dptr_, n - npy_header_n);
-    } else {
-        // Read n bytes from blob
-        const void* pSrc = static_cast<const void*>(
-            static_cast<char*>(blob->dptr_) + file_ofs - npy_header->size());
-        std::memcpy(pBuf, pSrc, n);
-    }
-    return n;
+size_t npy_header_blob_read_callback(void* pOpaque, mz_uint64 file_ofs, void* pBuf, size_t n) {
+  auto [npy_header, blob] =                                                  // NOLINT
+      *static_cast<std::tuple<const std::string*, const TBlob*>*>(pOpaque);  // NOLINT
+
+  if (file_ofs < npy_header->size() && file_ofs + n < npy_header->size()) {
+    // Read n bytes from npy_header
+    const void* pSrc = static_cast<const void*>(npy_header->data() + file_ofs);
+    std::memcpy(pBuf, pSrc, n);
+  } else if (file_ofs < npy_header->size()) {
+    // Read npy_header->size() - file_ofs bytes from npy_header
+    const void* pSrc          = static_cast<const void*>(npy_header->data() + file_ofs);
+    const size_t npy_header_n = npy_header->size() - file_ofs;
+    std::memcpy(pBuf, pSrc, npy_header_n);
+
+    // Read n - (npy_header->size() - file_ofs) bytes from blob
+    void* pBuf_blob = static_cast<void*>(static_cast<char*>(pBuf) + npy_header_n);
+    std::memcpy(pBuf_blob, blob->dptr_, n - npy_header_n);
+  } else {
+    // Read n bytes from blob
+    const void* pSrc =
+        static_cast<const void*>(static_cast<char*>(blob->dptr_) + file_ofs - npy_header->size());
+    std::memcpy(pBuf, pSrc, n);
+  }
+  return n;
 }
 
-
 void save_blob(mz_zip_archive* archive, const std::string& blob_name, const TBlob& blob) {
   const std::string npy_header = npy::create_npy_header(blob);
 
   const std::string blob_name_npy = blob_name + ".npy";
-  mz_uint64 size_to_add = npy_header.size();
+  mz_uint64 size_to_add           = npy_header.size();
   size_to_add += blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
   auto callback_data = std::tuple(&npy_header, &blob);
-  CHECK(mz_zip_writer_add_read_buf_callback(archive, blob_name_npy.data(),
-                                           npy_header_blob_read_callback,
-                                           static_cast<void*>(&callback_data), size_to_add, nullptr,
-                                           nullptr, 0, MZ_NO_COMPRESSION, nullptr, 0, nullptr, 0))
+  CHECK(mz_zip_writer_add_read_buf_callback(archive,
+                                            blob_name_npy.data(),
+                                            npy_header_blob_read_callback,
+                                            static_cast<void*>(&callback_data),
+                                            size_to_add,
+                                            nullptr,
+                                            nullptr,
+                                            0,
+                                            MZ_NO_COMPRESSION,
+                                            nullptr,
+                                            0,
+                                            nullptr,
+                                            0))
       << mz_zip_get_error_string(mz_zip_get_last_error(archive));
 }
 
-
 // Save shape of sparse ndarray in to scipy compatible shape.npy with int64 data
-void save_shape_array(mz_zip_archive* archive, const std::string& blob_name,
+void save_shape_array(mz_zip_archive* archive,
+                      const std::string& blob_name,
                       const mxnet::TShape& shape) {
   // Special case of create_npy_header for TShape data
   std::string dict;
@@ -358,43 +389,42 @@ void save_shape_array(mz_zip_archive* archive, const std::string& blob_name,
   std::string::size_type size = dict.size();
   CHECK(size <= std::numeric_limits<uint32_t>::max()) << "Shape too large for NPY serialization";
   if (size <= std::numeric_limits<uint16_t>::max()) {
-      npy += static_cast<char>(0x01);  // major version of numpy format
-      npy += static_cast<char>(0x00);  // minor version of numpy format
-      uint16_t size_ = dict.size();
-      npy += static_cast<char>(size_ & 0xFF);
-      npy += static_cast<char>(size_ >> 8);
+    npy += static_cast<char>(0x01);  // major version of numpy format
+    npy += static_cast<char>(0x00);  // minor version of numpy format
+    uint16_t size_ = dict.size();
+    npy += static_cast<char>(size_ & 0xFF);
+    npy += static_cast<char>(size_ >> 8);
   } else {
-      npy += static_cast<char>(0x02);  // major version of numpy format
-      npy += static_cast<char>(0x00);  // minor version of numpy format
-      uint32_t size_ = dict.size();
-      npy += static_cast<char>(size_ & 0xFF);
-      npy += static_cast<char>((size_ >> 8) & 0xFF);
-      npy += static_cast<char>((size_ >> 16) & 0xFF);
-      npy += static_cast<char>((size_ >> 24) & 0xFF);
+    npy += static_cast<char>(0x02);  // major version of numpy format
+    npy += static_cast<char>(0x00);  // minor version of numpy format
+    uint32_t size_ = dict.size();
+    npy += static_cast<char>(size_ & 0xFF);
+    npy += static_cast<char>((size_ >> 8) & 0xFF);
+    npy += static_cast<char>((size_ >> 16) & 0xFF);
+    npy += static_cast<char>((size_ >> 24) & 0xFF);
   }
   npy += dict;
 
   // Add shape data
   for (const uint64_t value : shape) {
-      npy += static_cast<char>(value & 0xFF);
-      npy += static_cast<char>((value >> 8) & 0xFF);
-      npy += static_cast<char>((value >> 16) & 0xFF);
-      npy += static_cast<char>((value >> 24) & 0xFF);
-      npy += static_cast<char>((value >> 32) & 0xFF);
-      npy += static_cast<char>((value >> 40) & 0xFF);
-      npy += static_cast<char>((value >> 48) & 0xFF);
-      npy += static_cast<char>((value >> 56) & 0xFF);
+    npy += static_cast<char>(value & 0xFF);
+    npy += static_cast<char>((value >> 8) & 0xFF);
+    npy += static_cast<char>((value >> 16) & 0xFF);
+    npy += static_cast<char>((value >> 24) & 0xFF);
+    npy += static_cast<char>((value >> 32) & 0xFF);
+    npy += static_cast<char>((value >> 40) & 0xFF);
+    npy += static_cast<char>((value >> 48) & 0xFF);
+    npy += static_cast<char>((value >> 56) & 0xFF);
   }
 
-
   const std::string blob_name_npy = blob_name + ".npy";
-  CHECK(mz_zip_writer_add_mem(archive, blob_name_npy.data(), npy.data(),
-                              npy.size(), MZ_NO_COMPRESSION))
+  CHECK(mz_zip_writer_add_mem(
+      archive, blob_name_npy.data(), npy.data(), npy.size(), MZ_NO_COMPRESSION))
       << mz_zip_get_error_string(mz_zip_get_last_error(archive));
 }
 
-
-void save_format_array(mz_zip_archive* archive, const std::string& blob_name,
+void save_format_array(mz_zip_archive* archive,
+                       const std::string& blob_name,
                        const std::string_view& format) {
   // Special case of create_npy_header for TShape data
   std::string dict;
@@ -413,31 +443,30 @@ void save_format_array(mz_zip_archive* archive, const std::string& blob_name,
   std::string::size_type size = dict.size();
   CHECK(size <= std::numeric_limits<uint32_t>::max());
   if (size <= std::numeric_limits<uint16_t>::max()) {
-      npy += static_cast<char>(0x01);  // major version of numpy format
-      npy += static_cast<char>(0x00);  // minor version of numpy format
-      uint16_t size_ = dict.size();
-      npy += static_cast<char>(size_ & 0xFF);
-      npy += static_cast<char>(size_ >> 8);
+    npy += static_cast<char>(0x01);  // major version of numpy format
+    npy += static_cast<char>(0x00);  // minor version of numpy format
+    uint16_t size_ = dict.size();
+    npy += static_cast<char>(size_ & 0xFF);
+    npy += static_cast<char>(size_ >> 8);
   } else {
-      npy += static_cast<char>(0x02);  // major version of numpy format
-      npy += static_cast<char>(0x00);  // minor version of numpy format
-      uint32_t size_ = dict.size();
-      npy += static_cast<char>(size_ & 0xFF);
-      npy += static_cast<char>((size_ >> 8) & 0xFF);
-      npy += static_cast<char>((size_ >> 16) & 0xFF);
-      npy += static_cast<char>((size_ >> 24) & 0xFF);
+    npy += static_cast<char>(0x02);  // major version of numpy format
+    npy += static_cast<char>(0x00);  // minor version of numpy format
+    uint32_t size_ = dict.size();
+    npy += static_cast<char>(size_ & 0xFF);
+    npy += static_cast<char>((size_ >> 8) & 0xFF);
+    npy += static_cast<char>((size_ >> 16) & 0xFF);
+    npy += static_cast<char>((size_ >> 24) & 0xFF);
   }
   npy += dict;
 
   npy += format;
 
   const std::string blob_name_npy = blob_name + ".npy";
-  CHECK(mz_zip_writer_add_mem(archive, blob_name_npy.data(), npy.data(),
-                              npy.size(), MZ_NO_COMPRESSION))
+  CHECK(mz_zip_writer_add_mem(
+      archive, blob_name_npy.data(), npy.data(), npy.size(), MZ_NO_COMPRESSION))
       << mz_zip_get_error_string(mz_zip_get_last_error(archive));
 }
 
-
 void save_array(mz_zip_archive* archive, const std::string& array_name, const NDArray& array_) {
   NDArray array;  // a copy on cpu
   if (array_.ctx().dev_mask() != cpu::kDevMask) {
@@ -454,35 +483,36 @@ void save_array(mz_zip_archive* archive, const std::string& array_name, const ND
   }
 
   switch (array.storage_type()) {
-  case kDefaultStorage: {
-    save_blob(archive, array_name, array.data());
-    break;
-  }
-  case kCSRStorage: {
-    save_blob(archive, array_name + "/data", array.data());
-    save_blob(archive, array_name + "/indptr", array.aux_data(csr::kIndPtr));
-    save_blob(archive, array_name + "/indices", array.aux_data(csr::kIdx));
-    save_shape_array(archive, array_name + "/shape", array.shape());
-    save_format_array(archive, array_name + "/format", "csr");
-    break;
-  }
-  case kRowSparseStorage: {
-    save_blob(archive, array_name + "/data", array.data());
-    save_blob(archive, array_name + "/indices", array.aux_data(rowsparse::kIdx));
-    save_shape_array(archive, array_name + "/shape", array.shape());
-    save_format_array(archive, array_name + "/format", "row_sparse");
-    break;
-  }
-  default: LOG(FATAL) << "Unknown storage type " << array.storage_type() << "encountered.";
+    case kDefaultStorage: {
+      save_blob(archive, array_name, array.data());
+      break;
+    }
+    case kCSRStorage: {
+      save_blob(archive, array_name + "/data", array.data());
+      save_blob(archive, array_name + "/indptr", array.aux_data(csr::kIndPtr));
+      save_blob(archive, array_name + "/indices", array.aux_data(csr::kIdx));
+      save_shape_array(archive, array_name + "/shape", array.shape());
+      save_format_array(archive, array_name + "/format", "csr");
+      break;
+    }
+    case kRowSparseStorage: {
+      save_blob(archive, array_name + "/data", array.data());
+      save_blob(archive, array_name + "/indices", array.aux_data(rowsparse::kIdx));
+      save_shape_array(archive, array_name + "/shape", array.shape());
+      save_format_array(archive, array_name + "/format", "row_sparse");
+      break;
+    }
+    default:
+      LOG(FATAL) << "Unknown storage type " << array.storage_type() << "encountered.";
   }
 }
 
-
 uint32_t parse_npy_header_len(mz_zip_reader_extract_iter_state* state,
-                              const std::string_view& fname, const std::string& zip_fname) {
+                              const std::string_view& fname,
+                              const std::string& zip_fname) {
   std::array<char, 12> buffer;
   CHECK_EQ(mz_zip_reader_extract_iter_read(state, buffer.data(), 10), 10)
-    << "Failed to read from " << fname << " member of " << zip_fname;
+      << "Failed to read from " << fname << " member of " << zip_fname;
   CHECK_EQ(buffer[0], (char)0x93);
   CHECK_EQ(buffer[1], 'N');
   CHECK_EQ(buffer[2], 'U');
@@ -497,17 +527,16 @@ uint32_t parse_npy_header_len(mz_zip_reader_extract_iter_state* state,
   header_len += buffer[9] >> 8;
   if (major_version == 0x02) {
     CHECK_EQ(mz_zip_reader_extract_iter_read(state, &buffer[10], 2), 2)
-      << "Failed to read from " << fname << " member of " << zip_fname;
+        << "Failed to read from " << fname << " member of " << zip_fname;
     header_len += buffer[10] >> 16;
     header_len += buffer[11] >> 24;
   }
   return header_len;
 }
 
-
-std::pair<std::vector<NDArray>, std::vector<std::string>>
-load_arrays(const std::string& zip_fname) {
-  mz_zip_archive archive {};
+std::pair<std::vector<NDArray>, std::vector<std::string>> load_arrays(
+    const std::string& zip_fname) {
+  mz_zip_archive archive{};
   CHECK(mz_zip_reader_init_file(&archive, zip_fname.data(), 0))
       << "Failed to open archive " << zip_fname << ": "
       << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
@@ -522,19 +551,20 @@ load_arrays(const std::string& zip_fname) {
     mz_uint filename_length = mz_zip_reader_get_filename(&archive, i, nullptr, 0);
     std::string entry_name;
     entry_name.resize(filename_length);  // filename_length includes the \0 terminator
-    CHECK_EQ(filename_length, mz_zip_reader_get_filename(&archive, i, entry_name.data(),
-                                                         filename_length));
-    std::string_view entry_name_v {entry_name.data(), entry_name.size() - 1};  // -1 due to \0
-    if (entry_name_v.substr(entry_name_v.size() - 4).compare(".npy") != 0) continue;  // only .npy
+    CHECK_EQ(filename_length,
+             mz_zip_reader_get_filename(&archive, i, entry_name.data(), filename_length));
+    std::string_view entry_name_v{entry_name.data(), entry_name.size() - 1};  // -1 due to \0
+    if (entry_name_v.substr(entry_name_v.size() - 4).compare(".npy") != 0)
+      continue;  // only .npy
 
     auto dir_sep_search = entry_name_v.rfind("/");
-    if (dir_sep_search == std::string::npos) {  // top level file
-      [[maybe_unused]] auto[iter, inserted] = names[""].emplace(entry_name_v);
+    if (dir_sep_search == std::string::npos) {                                   // top level file
+      [[maybe_unused]] auto [iter, inserted] = names[""].emplace(entry_name_v);  // NOLINT
       CHECK(inserted);
     } else {  // file inside a folder
-      std::string dirname {entry_name_v.substr(0, dir_sep_search + 1)};
-      std::string fname {entry_name_v.substr(dir_sep_search + 1)};
-      [[maybe_unused]] auto[iter, inserted] = names[dirname].insert(fname);
+      std::string dirname{entry_name_v.substr(0, dir_sep_search + 1)};
+      std::string fname{entry_name_v.substr(dir_sep_search + 1)};
+      [[maybe_unused]] auto [iter, inserted] = names[dirname].insert(fname);  // NOLINT
       CHECK(inserted);
     }
   }
@@ -544,21 +574,20 @@ load_arrays(const std::string& zip_fname) {
   std::vector<std::string> return_names;
 
   // Patterns used by SciPy to save respective sparse matrix formats to a file
-  const std::set<std::string> bsr_csr_csc_pattern
-    {"data.npy", "indices.npy", "indptr.npy", "format.npy", "shape.npy"};
+  const std::set<std::string> bsr_csr_csc_pattern{
+      "data.npy", "indices.npy", "indptr.npy", "format.npy", "shape.npy"};
   const std::set<std::string> row_sparse_pattern  // MXNet specific format not part of SciPy
-    {"data.npy", "indices.npy", "format.npy", "shape.npy"};
-  const std::set<std::string> coo_pattern
-    {"data.npy", "row.npy", "col.npy", "format.npy", "shape.npy"};
-  const std::set<std::string> dia_pattern
-    {"data.npy", "offsets.npy", "format.npy", "shape.npy"};
+      {"data.npy", "indices.npy", "format.npy", "shape.npy"};
+  const std::set<std::string> coo_pattern{
+      "data.npy", "row.npy", "col.npy", "format.npy", "shape.npy"};
+  const std::set<std::string> dia_pattern{"data.npy", "offsets.npy", "format.npy", "shape.npy"};
   for (const auto& [dirname, dircontents] : names) {
     if (dircontents == bsr_csr_csc_pattern) {
       // Check format
       std::string fname(dirname);
       fname += "format.npy";
-      mz_zip_reader_extract_iter_state* format_file = mz_zip_reader_extract_file_iter_new(
-          &archive, fname.data(), 0);
+      mz_zip_reader_extract_iter_state* format_file =
+          mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
       CHECK(nullptr != format_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
 
       // In the special case of format.npy we ignore the header as it
@@ -580,16 +609,16 @@ load_arrays(const std::string& zip_fname) {
         // Prepare reading storage data array
         fname = dirname;
         fname += "data.npy";
-        mz_zip_reader_extract_iter_state* data_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* data_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != data_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(data_file, fname, zip_fname);
         header.resize(header_len);
         CHECK_EQ(mz_zip_reader_extract_iter_read(data_file, header.data(), header_len), header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[storage_type_flag, storage_fortran_order, storage_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [storage_type_flag, storage_fortran_order, storage_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (storage_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -598,8 +627,8 @@ load_arrays(const std::string& zip_fname) {
         // Prepare reading indptr aux array
         fname = dirname;
         fname += "indptr.npy";
-        mz_zip_reader_extract_iter_state* indptr_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* indptr_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != indptr_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(indptr_file, fname, zip_fname);
         header.resize(header_len);
@@ -607,8 +636,8 @@ load_arrays(const std::string& zip_fname) {
                  header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[indptr_type_flag, indptr_fortran_order, indptr_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [indptr_type_flag, indptr_fortran_order, indptr_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (indptr_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -617,8 +646,8 @@ load_arrays(const std::string& zip_fname) {
         // Prepare reading indices aux array
         fname = dirname;
         fname += "indices.npy";
-        mz_zip_reader_extract_iter_state* indices_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* indices_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != indices_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(indices_file, fname, zip_fname);
         header.resize(header_len);
@@ -626,8 +655,8 @@ load_arrays(const std::string& zip_fname) {
                  header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[indices_type_flag, indices_fortran_order, indices_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [indices_type_flag, indices_fortran_order, indices_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (indices_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -636,16 +665,16 @@ load_arrays(const std::string& zip_fname) {
         // Read shape data array
         fname = dirname;
         fname += "shape.npy";
-        mz_zip_reader_extract_iter_state* shape_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* shape_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != shape_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(shape_file, fname, zip_fname);
         header.resize(header_len);
         CHECK_EQ(mz_zip_reader_extract_iter_read(shape_file, header.data(), header_len), header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[shape_type_flag, shape_fortran_order, shape_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [shape_type_flag, shape_fortran_order, shape_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (shape_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -675,16 +704,22 @@ load_arrays(const std::string& zip_fname) {
         // Construct aux datastructures
         static_assert(csr::CSRAuxType::kIndPtr == 0);
         static_assert(csr::CSRAuxType::kIdx == 1);
-        const std::vector<int> aux_types {indptr_type_flag, indices_type_flag};
-        const mxnet::ShapeVector aux_shapes {indptr_tshape, indices_tshape};
+        const std::vector<int> aux_types{indptr_type_flag, indices_type_flag};
+        const mxnet::ShapeVector aux_shapes{indptr_tshape, indices_tshape};
 
         // Allocate NDArray
-        NDArray array(NDArrayStorageType::kCSRStorage, tshape, Context::CPU(), false,
-                      storage_type_flag, aux_types, aux_shapes, storage_tshape);
+        NDArray array(NDArrayStorageType::kCSRStorage,
+                      tshape,
+                      Context::CPU(),
+                      false,
+                      storage_type_flag,
+                      aux_types,
+                      aux_shapes,
+                      storage_tshape);
 
         // Read data array
         const TBlob& blob = array.data();
-        size_t nbytes = blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
+        size_t nbytes     = blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
         CHECK_EQ(mz_zip_reader_extract_iter_read(data_file, blob.dptr_, nbytes), nbytes)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
@@ -707,8 +742,9 @@ load_arrays(const std::string& zip_fname) {
         CHECK(mz_zip_reader_extract_iter_free(indices_file));
 
         arrays.push_back(array);
-        return_names.emplace_back(dirname.size() ?   // Exclude "/"
-                                  dirname.substr(0, dirname.size() - 1) : dirname);
+        return_names.emplace_back(dirname.size() ?  // Exclude "/"
+                                      dirname.substr(0, dirname.size() - 1)
+                                                 : dirname);
 
       } else {
         throw std::runtime_error("Loading " + format + " sparse matrix format is unsupported.");
@@ -717,8 +753,8 @@ load_arrays(const std::string& zip_fname) {
       // Check format
       std::string fname(dirname);
       fname += "format.npy";
-      mz_zip_reader_extract_iter_state* format_file = mz_zip_reader_extract_file_iter_new(
-          &archive, fname.data(), 0);
+      mz_zip_reader_extract_iter_state* format_file =
+          mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
       CHECK(nullptr != format_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
 
       // In the special case of format.npy we ignore the header as it
@@ -739,16 +775,16 @@ load_arrays(const std::string& zip_fname) {
         // Prepare reading storage data array
         fname = dirname;
         fname += "data.npy";
-        mz_zip_reader_extract_iter_state* data_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* data_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != data_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(data_file, fname, zip_fname);
         header.resize(header_len);
         CHECK_EQ(mz_zip_reader_extract_iter_read(data_file, header.data(), header_len), header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[storage_type_flag, storage_fortran_order, storage_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [storage_type_flag, storage_fortran_order, storage_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (storage_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -757,8 +793,8 @@ load_arrays(const std::string& zip_fname) {
         // Prepare reading indices aux array
         fname = dirname;
         fname += "indices.npy";
-        mz_zip_reader_extract_iter_state* indices_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* indices_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != indices_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(indices_file, fname, zip_fname);
         header.resize(header_len);
@@ -766,8 +802,8 @@ load_arrays(const std::string& zip_fname) {
                  header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[indices_type_flag, indices_fortran_order, indices_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [indices_type_flag, indices_fortran_order, indices_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (indices_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -776,16 +812,16 @@ load_arrays(const std::string& zip_fname) {
         // Read shape data array
         fname = dirname;
         fname += "shape.npy";
-        mz_zip_reader_extract_iter_state* shape_file = mz_zip_reader_extract_file_iter_new(
-            &archive, fname.data(), 0);
+        mz_zip_reader_extract_iter_state* shape_file =
+            mz_zip_reader_extract_file_iter_new(&archive, fname.data(), 0);
         CHECK(nullptr != shape_file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
         header_len = parse_npy_header_len(shape_file, fname, zip_fname);
         header.resize(header_len);
         CHECK_EQ(mz_zip_reader_extract_iter_read(shape_file, header.data(), header_len), header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[shape_type_flag, shape_fortran_order, shape_shape] = \
-          npy::parse_npy_header_descr(header);
+        auto [shape_type_flag, shape_fortran_order, shape_shape] =  // NOLINT
+            npy::parse_npy_header_descr(header);
         if (shape_fortran_order) {
           LOG(FATAL) << "Reading fortran order data for sparse arrays not yet implemented.";
         }
@@ -814,16 +850,22 @@ load_arrays(const std::string& zip_fname) {
 
         // Construct aux datastructures
         static_assert(rowsparse::RowSparseAuxType::kIdx == 0);
-        const std::vector<int> aux_types {indices_type_flag};
-        const mxnet::ShapeVector aux_shapes {indices_tshape};
+        const std::vector<int> aux_types{indices_type_flag};
+        const mxnet::ShapeVector aux_shapes{indices_tshape};
 
         // Allocate NDArray
-        NDArray array(NDArrayStorageType::kRowSparseStorage, tshape, Context::CPU(), false,
-                      storage_type_flag, aux_types, aux_shapes, storage_tshape);
+        NDArray array(NDArrayStorageType::kRowSparseStorage,
+                      tshape,
+                      Context::CPU(),
+                      false,
+                      storage_type_flag,
+                      aux_types,
+                      aux_shapes,
+                      storage_tshape);
 
         // Read data array
         const TBlob& blob = array.data();
-        size_t nbytes = blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
+        size_t nbytes     = blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
         CHECK_EQ(mz_zip_reader_extract_iter_read(data_file, blob.dptr_, nbytes), nbytes)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
@@ -838,8 +880,9 @@ load_arrays(const std::string& zip_fname) {
         CHECK(mz_zip_reader_extract_iter_free(indices_file));
 
         arrays.push_back(array);
-        return_names.emplace_back(dirname.size() ?   // Exclude "/"
-                                  dirname.substr(0, dirname.size() - 1) : dirname);
+        return_names.emplace_back(dirname.size() ?  // Exclude "/"
+                                      dirname.substr(0, dirname.size() - 1)
+                                                 : dirname);
 
       } else {
         throw std::runtime_error("Loading " + format + " sparse matrix format is unsupported.");
@@ -852,8 +895,8 @@ load_arrays(const std::string& zip_fname) {
       for (const std::string& fname : dircontents) {
         std::string path(dirname);
         path += fname;
-        mz_zip_reader_extract_iter_state* file = mz_zip_reader_extract_file_iter_new(
-            &archive, path.data(), 0);
+        mz_zip_reader_extract_iter_state* file =
+            mz_zip_reader_extract_file_iter_new(&archive, path.data(), 0);
         CHECK(nullptr != file) << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
 
         uint32_t header_len = parse_npy_header_len(file, path, zip_fname);
@@ -862,7 +905,7 @@ load_arrays(const std::string& zip_fname) {
         CHECK_EQ(mz_zip_reader_extract_iter_read(file, header.data(), header_len), header_len)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
-        auto[type_flag, fortran_order, shape] = npy::parse_npy_header_descr(header);
+        auto [type_flag, fortran_order, shape] = npy::parse_npy_header_descr(header);  // NOLINT
 
         if (fortran_order) {
           fortran_order_transpose_prepare(shape);
@@ -871,7 +914,7 @@ load_arrays(const std::string& zip_fname) {
         TShape tshape(shape);
         NDArray array(tshape, Context::CPU(), false, type_flag);
         const TBlob& blob = array.data();
-        size_t nbytes = blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
+        size_t nbytes     = blob.Size() * mshadow::mshadow_sizeof(blob.type_flag_);
         CHECK_EQ(mz_zip_reader_extract_iter_read(file, blob.dptr_, nbytes), nbytes)
             << "Failed to read from " << fname << " member of " << zip_fname << ": "
             << mz_zip_get_error_string(mz_zip_get_last_error(&archive));
diff --git a/src/serialization/cnpy.h b/src/serialization/cnpy.h
index 8ee68de0e0e3..70bcc80d4397 100644
--- a/src/serialization/cnpy.h
+++ b/src/serialization/cnpy.h
@@ -38,14 +38,14 @@ namespace npy {
 void save_array(const std::string& fname, const NDArray& array);
 NDArray load_array(const std::string& fname);
 
-}
+}  // namespace npy
 
 namespace npz {
 
 void save_array(mz_zip_archive* archive, const std::string& array_name, const NDArray& array);
 
-std::pair<std::vector<NDArray>, std::vector<std::string>>  load_arrays(const std::string& fname);
+std::pair<std::vector<NDArray>, std::vector<std::string>> load_arrays(const std::string& fname);
 
-}
+}  // namespace npz
 }  // namespace mxnet
 #endif  // MXNET_SERIALIZATION_CNPY_H_
diff --git a/src/storage/cpu_device_storage.h b/src/storage/cpu_device_storage.h
index 07c1fca148ff..fd53c302036a 100644
--- a/src/storage/cpu_device_storage.h
+++ b/src/storage/cpu_device_storage.h
@@ -61,7 +61,8 @@ class CPUDeviceStorage {
 
 inline void CPUDeviceStorage::Alloc(Storage::Handle* handle) {
   bool success = mxnet::common::AlignedMemAlloc(&(handle->dptr), handle->size, alignment_);
-  if (!success) LOG(FATAL) << "Failed to allocate CPU Memory";
+  if (!success)
+    LOG(FATAL) << "Failed to allocate CPU Memory";
 }
 
 inline void CPUDeviceStorage::Free(Storage::Handle handle) {
diff --git a/src/storage/cpu_shared_storage_manager.h b/src/storage/cpu_shared_storage_manager.h
index e9407b05917d..890306a8e881 100644
--- a/src/storage/cpu_shared_storage_manager.h
+++ b/src/storage/cpu_shared_storage_manager.h
@@ -70,14 +70,14 @@ class CPUSharedStorageManager final : public StorageManager {
   }
 
   void IncrementRefCount(const Storage::Handle& handle) {
-    std::atomic<int>* counter = reinterpret_cast<std::atomic<int>*>(
-        static_cast<char*>(handle.dptr) - alignment_);
+    std::atomic<int>* counter =
+        reinterpret_cast<std::atomic<int>*>(static_cast<char*>(handle.dptr) - alignment_);
     ++(*counter);
   }
 
   int DecrementRefCount(const Storage::Handle& handle) {
-    std::atomic<int>* counter = reinterpret_cast<std::atomic<int>*>(
-        static_cast<char*>(handle.dptr) - alignment_);
+    std::atomic<int>* counter =
+        reinterpret_cast<std::atomic<int>*>(static_cast<char*>(handle.dptr) - alignment_);
     return --(*counter);
   }
 
@@ -112,90 +112,87 @@ void CPUSharedStorageManager::Alloc(Storage::Handle* handle) {
   std::string filename;
   bool is_new = false;
   size_t size = handle->size + alignment_;
-  void* ptr = nullptr;
+  void* ptr   = nullptr;
 #ifdef _WIN32
   CheckAndRealFree();
   HANDLE map_handle = nullptr;
-  uint32_t error = 0;
+  uint32_t error    = 0;
   if (handle->shared_id == -1 && handle->shared_pid == -1) {
-    is_new = true;
+    is_new             = true;
     handle->shared_pid = _getpid();
     for (int i = 0; i < 10; ++i) {
       handle->shared_id = dis(rand_gen_);
-      filename = SharedHandleToString(handle->shared_pid, handle->shared_id);
-      map_handle = CreateFileMapping(INVALID_HANDLE_VALUE,
-                                     nullptr, PAGE_READWRITE, 0, size, filename.c_str());
+      filename          = SharedHandleToString(handle->shared_pid, handle->shared_id);
+      map_handle        = CreateFileMapping(
+          INVALID_HANDLE_VALUE, nullptr, PAGE_READWRITE, 0, size, filename.c_str());
       if ((error = GetLastError()) == ERROR_SUCCESS) {
         break;
       }
     }
   } else {
-    filename = SharedHandleToString(handle->shared_pid, handle->shared_id);
-    map_handle = OpenFileMapping(FILE_MAP_READ | FILE_MAP_WRITE,
-                                 FALSE, filename.c_str());
-    error = GetLastError();
+    filename   = SharedHandleToString(handle->shared_pid, handle->shared_id);
+    map_handle = OpenFileMapping(FILE_MAP_READ | FILE_MAP_WRITE, FALSE, filename.c_str());
+    error      = GetLastError();
   }
 
   if (error != ERROR_SUCCESS && map_handle == nullptr) {
-    LOG(FATAL) << "Failed to open shared memory. CreateFileMapping failed with error "
-               << error;
+    LOG(FATAL) << "Failed to open shared memory. CreateFileMapping failed with error " << error;
   }
 
   ptr = MapViewOfFile(map_handle, FILE_MAP_READ | FILE_MAP_WRITE, 0, 0, 0);
-  CHECK_NE(ptr, (void *)0)
-      << "Failed to map shared memory. MapViewOfFile failed with error " << GetLastError();
+  CHECK_NE(ptr, (void*)0) << "Failed to map shared memory. MapViewOfFile failed with error "
+                          << GetLastError();
   map_handle_map_[ptr] = map_handle;
 #else
   if (handle->shared_id == -1 && handle->shared_pid == -1) {
-    is_new = true;
+    is_new             = true;
     handle->shared_pid = getpid();
     for (int i = 0; i < 10; ++i) {
       handle->shared_id = dis(rand_gen_);
-      filename = SharedHandleToString(handle->shared_pid, handle->shared_id);
-      fid = shm_open(filename.c_str(), O_EXCL|O_CREAT|O_RDWR, 0666);
-      if (fid != -1) break;
+      filename          = SharedHandleToString(handle->shared_pid, handle->shared_id);
+      fid               = shm_open(filename.c_str(), O_EXCL | O_CREAT | O_RDWR, 0666);
+      if (fid != -1)
+        break;
     }
   } else {
 #ifdef __linux__
     fid = handle->shared_id;
 #else
     filename = SharedHandleToString(handle->shared_pid, handle->shared_id);
-    fid = shm_open(filename.c_str(), O_RDWR, 0666);
+    fid      = shm_open(filename.c_str(), O_RDWR, 0666);
 #endif  // __linux__
   }
 
   if (fid == -1) {
     if (is_new) {
-      LOG(FATAL) << "Failed to open shared memory. shm_open failed with error "
-                 << strerror(errno);
+      LOG(FATAL) << "Failed to open shared memory. shm_open failed with error " << strerror(errno);
     } else {
       LOG(FATAL) << "Invalid file descriptor from shared array.";
     }
   }
 
-  if (is_new) CHECK_EQ(ftruncate(fid, size), 0);
+  if (is_new)
+    CHECK_EQ(ftruncate(fid, size), 0);
 
-  ptr = mmap(nullptr, size, PROT_READ|PROT_WRITE, MAP_SHARED, fid, 0);
-  CHECK_NE(ptr, MAP_FAILED)
-      << "Failed to map shared memory. mmap failed with error " << strerror(errno);
+  ptr = mmap(nullptr, size, PROT_READ | PROT_WRITE, MAP_SHARED, fid, 0);
+  CHECK_NE(ptr, MAP_FAILED) << "Failed to map shared memory. mmap failed with error "
+                            << strerror(errno);
 #ifdef __linux__
   handle->shared_id = fid;
   if (is_new) {
     CHECK_EQ(shm_unlink(filename.c_str()), 0)
-      << "Failed to unlink shared memory. shm_unlink failed with error "
-      << strerror(errno);
+        << "Failed to unlink shared memory. shm_unlink failed with error " << strerror(errno);
   }
 #else
-  CHECK_EQ(close(fid), 0)
-      << "Failed to close shared memory. close failed with error "
-      << strerror(errno);
+  CHECK_EQ(close(fid), 0) << "Failed to close shared memory. close failed with error "
+                          << strerror(errno);
 #endif  // __linux__
 #endif  // _WIN32
 
   if (is_new) {
     new (ptr) std::atomic<int>(1);
   }
-  handle->dptr = static_cast<char*>(ptr) + alignment_;
+  handle->dptr        = static_cast<char*>(ptr) + alignment_;
   pool_[handle->dptr] = *handle;
 }
 
@@ -205,23 +202,19 @@ void CPUSharedStorageManager::FreeImpl(const Storage::Handle& handle) {
 #ifdef _WIN32
   is_free_[handle.dptr] = handle;
 #else
-  CHECK_EQ(munmap(static_cast<char*>(handle.dptr) - alignment_,
-                  handle.size + alignment_), 0)
-      << "Failed to unmap shared memory. munmap failed with error "
-      << strerror(errno);
+  CHECK_EQ(munmap(static_cast<char*>(handle.dptr) - alignment_, handle.size + alignment_), 0)
+      << "Failed to unmap shared memory. munmap failed with error " << strerror(errno);
 
 #ifdef __linux__
   if (handle.shared_id != -1) {
-  CHECK_EQ(close(handle.shared_id), 0)
-      << "Failed to close shared memory. close failed with error "
-      << strerror(errno);
+    CHECK_EQ(close(handle.shared_id), 0)
+        << "Failed to close shared memory. close failed with error " << strerror(errno);
   }
 #else
   if (count == 0) {
     auto filename = SharedHandleToString(handle.shared_pid, handle.shared_id);
     CHECK_EQ(shm_unlink(filename.c_str()), 0)
-        << "Failed to unlink shared memory. shm_unlink failed with error "
-        << strerror(errno);
+        << "Failed to unlink shared memory. shm_unlink failed with error " << strerror(errno);
   }
 #endif  // __linux__
 #endif  // _WIN32
@@ -232,13 +225,11 @@ inline void CPUSharedStorageManager::CheckAndRealFree() {
   std::lock_guard<std::recursive_mutex> lock(mutex_);
   for (auto it = std::begin(is_free_); it != std::end(is_free_);) {
     void* ptr = static_cast<char*>(it->second.dptr) - alignment_;
-    std::atomic<int>* counter = reinterpret_cast<std::atomic<int>*>(
-      static_cast<char*>(it->second.dptr) - alignment_);
+    std::atomic<int>* counter =
+        reinterpret_cast<std::atomic<int>*>(static_cast<char*>(it->second.dptr) - alignment_);
     if ((*counter) == 0) {
-      CHECK_NE(UnmapViewOfFile(ptr), 0)
-        << "Failed to UnmapViewOfFile shared memory ";
-      CHECK_NE(CloseHandle(map_handle_map_[ptr]), 0)
-        << "Failed to CloseHandle shared memory ";
+      CHECK_NE(UnmapViewOfFile(ptr), 0) << "Failed to UnmapViewOfFile shared memory ";
+      CHECK_NE(CloseHandle(map_handle_map_[ptr]), 0) << "Failed to CloseHandle shared memory ";
       map_handle_map_.erase(ptr);
       it = is_free_.erase(it);
     } else {
diff --git a/src/storage/pooled_storage_manager.h b/src/storage/pooled_storage_manager.h
index 194a1a2455ba..9bdffc1689c5 100644
--- a/src/storage/pooled_storage_manager.h
+++ b/src/storage/pooled_storage_manager.h
@@ -33,7 +33,6 @@
 #include "./storage_manager.h"
 #include "../profiler/storage_profiler.h"
 
-
 namespace mxnet {
 namespace storage {
 
@@ -49,15 +48,19 @@ const std::string env_var_name(const char* dev_type, env_var_type type);
 
 #if MXNET_USE_CUDA
 #define SET_DEVICE(device_store, contextHelper, ctx, flag) \
-      const auto *device_store = flag? contextHelper.get()->SetCurrentDevice(ctx) : nullptr;
-#define UNSET_DEVICE(device_store)    delete device_store
+  const auto* device_store = flag ? contextHelper.get()->SetCurrentDevice(ctx) : nullptr;
+#define UNSET_DEVICE(device_store) delete device_store
 
-#define SET_GPU_PROFILER(prof, contextHelper)                          \
-      auto prof = contextHelper->contextGPU()?                         \
-                  profiler::GpuDeviceStorageProfiler::Get() : nullptr; \
-      if (!prof->IsProfiling()) prof = nullptr
+#define SET_GPU_PROFILER(prof, contextHelper)                                                    \
+  auto prof = contextHelper->contextGPU() ? profiler::GpuDeviceStorageProfiler::Get() : nullptr; \
+  if (!prof->IsProfiling()) {                                                                    \
+    prof = nullptr;                                                                              \
+  }
 
-#define GPU_PROFILER_ON_FREE(prof, pntr)    if (prof) prof->OnFree(pntr)
+#define GPU_PROFILER_ON_FREE(prof, pntr) \
+  if (prof) {                            \
+    prof->OnFree(pntr);                  \
+  }
 #else
 // empty macros when MxNet is compiled without CUDA support
 #define SET_DEVICE(...)
@@ -74,30 +77,34 @@ const std::string env_var_name(const char* dev_type, env_var_type type);
  * Allocation/freeing of memory is done by contextHelper_, which is the pointer
  * to one of memory specific instance of the class, derived from ContextHelper
  */
-template<typename BucketingStrategy, typename StoringMethod>
-class PooledStorageManager : public StorageManager,
-             public BucketingStrategy, public StoringMethod {
+template <typename BucketingStrategy, typename StoringMethod>
+class PooledStorageManager : public StorageManager, public BucketingStrategy, public StoringMethod {
  public:
-  explicit PooledStorageManager(const Context &ctx, int num_gpu_device) {
-    const char *dev_type = nullptr;
+  explicit PooledStorageManager(const Context& ctx, int num_gpu_device) {
+    const char* dev_type = nullptr;
     switch (dev_type_ = ctx.dev_type) {
 #if MXNET_USE_CUDA
-      case Context::kGPU:       contextHelper_ = std::make_unique<ContextHelperGPU>();
-                                dev_type = "GPU";
-                                break;
-      case Context::kCPUPinned: dev_type = "CPU_PINNED";
-                                if (num_gpu_device > 1) {
-                                  contextHelper_ = std::make_unique<ContextHelperPinned>();
-                                  dev_type_ = Context::kGPU;
-                                  break;
-                                }
+      case Context::kGPU:
+        contextHelper_ = std::make_unique<ContextHelperGPU>();
+        dev_type       = "GPU";
+        break;
+      case Context::kCPUPinned:
+        dev_type = "CPU_PINNED";
+        if (num_gpu_device > 1) {
+          contextHelper_ = std::make_unique<ContextHelperPinned>();
+          dev_type_      = Context::kGPU;
+          break;
+        }
 #else
-      case Context::kCPUPinned: dev_type = "CPU_PINNED";
+      case Context::kCPUPinned:
+        dev_type = "CPU_PINNED";
 #endif
-                                dev_type_ = Context::kCPU;
-      case Context::kCPU:       contextHelper_ = std::make_unique<ContextHelperCPU>();
-                                dev_type = "CPU";
-      default:                  break;
+        dev_type_ = Context::kCPU;
+      case Context::kCPU:
+        contextHelper_ = std::make_unique<ContextHelperCPU>();
+        dev_type       = "CPU";
+      default:
+        break;
     }
 
     BucketingStrategy::InitRoundHelper(dev_type);
@@ -106,9 +113,9 @@ class PooledStorageManager : public StorageManager,
 
     // percentage of reserved memory
     if (dev_type) {
-      const auto env_var = env_var_name(dev_type, pool_reserve);
-      const size_t reserve = dmlc::GetEnv(env_var.c_str(), 5);
-      const size_t total = std::get<1>(contextHelper_->getMemoryInfo());
+      const auto env_var       = env_var_name(dev_type, pool_reserve);
+      const size_t reserve     = dmlc::GetEnv(env_var.c_str(), 5);
+      const size_t total       = std::get<1>(contextHelper_->getMemoryInfo());
       memory_allocation_limit_ = total * reserve / 100;
     }
   }
@@ -163,20 +170,20 @@ class PooledStorageManager : public StorageManager,
   std::unique_ptr<ContextHelper> contextHelper_;
 };
 
-template<typename BucketingStrategy, typename StoringMethod>
+template <typename BucketingStrategy, typename StoringMethod>
 void PooledStorageManager<BucketingStrategy, StoringMethod>::Alloc(Storage::Handle* handle) {
   std::lock_guard<std::mutex> lock(Storage::Get()->GetMutex(dev_type_));
   const auto bucket_id = BucketingStrategy::get_bucket(handle->size);
-  size_t roundSize = 0;
-  auto reuse_pool = StoringMethod::GetMemStorage(bucket_id);
+  size_t roundSize     = 0;
+  auto reuse_pool      = StoringMethod::GetMemStorage(bucket_id);
   if (!reuse_pool) {
     SET_DEVICE(device_store, contextHelper_, handle->ctx, true);
     roundSize = BucketingStrategy::RoundAllocSizeForBucket(bucket_id);
     if (!MemoryIsAvalable(roundSize))
       ReleaseAllNoLock(false);
 
-    void *ret = nullptr;
-    auto e = contextHelper_->Malloc(&ret, roundSize);
+    void* ret = nullptr;
+    auto e    = contextHelper_->Malloc(&ret, roundSize);
     if (e) {
       // retry in case of fragmentation
       ReleaseAllNoLock(false);
@@ -184,10 +191,9 @@ void PooledStorageManager<BucketingStrategy, StoringMethod>::Alloc(Storage::Hand
       if (e) {
         const std::string err(
 #if MXNET_USE_CUDA
-        dev_type_ == Context::kGPU?
-           cudaGetErrorString(static_cast<cudaError_t>(e)) :
+            dev_type_ == Context::kGPU ? cudaGetErrorString(static_cast<cudaError_t>(e)) :
 #endif
-           std::strerror(errno));
+                                       std::strerror(errno));
 
         LOG(FATAL) << "Memory allocation failed " << err;
       }
@@ -214,24 +220,25 @@ void PooledStorageManager<BucketingStrategy, StoringMethod>::Alloc(Storage::Hand
 #endif
 }
 
-
 /*!
  * \brief Base class for Rounding Method classes.
  */
 class RoundHelper {
  public:
-  virtual size_t get_size(size_t  /*bucket*/) const { return 0; }
+  virtual size_t get_size(size_t /*bucket*/) const {
+    return 0;
+  }
   virtual std::tuple<size_t, size_t> getContainerParam() const {
-     return std::tuple<size_t, size_t>(0, 0);
+    return std::tuple<size_t, size_t>(0, 0);
   }
 
  protected:
   void InitRoundHelper(const char* dev_type) {
     const auto env_var = env_var_name(dev_type, pool_page_size);
-    page_size_ = dmlc::GetEnv(env_var.c_str(), 4096);
+    page_size_         = dmlc::GetEnv(env_var.c_str(), 4096);
     if (page_size_ < NDEV) {
-      LOG(FATAL) << env_var << " cannot be set to a value smaller than " << NDEV \
-                    << ". Got " << page_size_ << ".";
+      LOG(FATAL) << env_var << " cannot be set to a value smaller than " << NDEV << ". Got "
+                 << page_size_ << ".";
     }
   }
 
@@ -249,13 +256,12 @@ class RoundHelper {
  */
 class RoundMultiple : protected RoundHelper {
  protected:
-  void InitRoundHelper(const char *dev_type) {
+  void InitRoundHelper(const char* dev_type) {
     RoundHelper::InitRoundHelper(dev_type);
-    const auto env_var = env_var_name(dev_type, large_alloc_size);
-    large_alloc_round_size_ = dmlc::GetEnv(env_var.c_str(), 2*1024*1024);
+    const auto env_var      = env_var_name(dev_type, large_alloc_size);
+    large_alloc_round_size_ = dmlc::GetEnv(env_var.c_str(), 2 * 1024 * 1024);
     if (large_alloc_round_size_ <= 0) {
-      LOG(FATAL) << env_var << " cannot be set to a value <= 0, found: "
-                 << large_alloc_round_size_;
+      LOG(FATAL) << env_var << " cannot be set to a value <= 0, found: " << large_alloc_round_size_;
     }
   }
 
@@ -265,10 +271,14 @@ class RoundMultiple : protected RoundHelper {
     // To ensure proper freeing under some driver variants, make sure
     // large allocs entirely occupy their slabs, which cannot then be
     // locked by smaller permanent allocations sharing the slab.
-    return  size > large_alloc_round_size_? RoundToMultiple(size, large_alloc_round_size_) : size;
+    return size > large_alloc_round_size_ ? RoundToMultiple(size, large_alloc_round_size_) : size;
+  }
+  inline size_t get_bucket(size_t size) const {
+    return RoundAllocSize(size);
+  }
+  inline size_t RoundAllocSizeForBucket(size_t bucket_id) const {
+    return bucket_id;
   }
-  inline size_t get_bucket(size_t size) const                   { return RoundAllocSize(size); }
-  inline size_t RoundAllocSizeForBucket(size_t bucket_id) const { return bucket_id; }
 
  private:
   // Round a value 'x' up to the next multiple of 'multiple'
@@ -298,30 +308,30 @@ class RoundMultiple : protected RoundHelper {
 class RoundPower2 : public RoundHelper {
  public:
   size_t get_size(size_t bucket) const override {
-    return bucket <= cut_off_? 1ul << bucket : (bucket - cut_off_ + 1) << cut_off_;
+    return bucket <= cut_off_ ? 1ul << bucket : (bucket - cut_off_ + 1) << cut_off_;
   }
 
  protected:
-  void InitRoundHelper(const char *dev_type) {
+  void InitRoundHelper(const char* dev_type) {
     RoundHelper::InitRoundHelper(dev_type);
     const auto log_pager_size = common::ilog2ul(page_size_ - 1);
     if (page_size_ != 1ul << log_pager_size) {
-      LOG(FATAL) << env_var_name(dev_type, pool_page_size) \
+      LOG(FATAL) << env_var_name(dev_type, pool_page_size)
                  << " must be a power of 2. Got: " << page_size_ << ".";
     }
     page_size_ = log_pager_size;
 
     const auto linear_cutoff = env_var_name(dev_type, round_linear_cutoff);
-    cut_off_ = dmlc::GetEnv(linear_cutoff.c_str(), 24);
+    cut_off_                 = dmlc::GetEnv(linear_cutoff.c_str(), 24);
     if (cut_off_ < 20 || cut_off_ > LOG2_MAX_MEM) {
-      LOG(FATAL) << linear_cutoff << " cannot be set to a value " \
-                 << "smaller than 20 or greater than " << LOG2_MAX_MEM << ". Got: " \
-                 << cut_off_ << ".";
+      LOG(FATAL) << linear_cutoff << " cannot be set to a value "
+                 << "smaller than 20 or greater than " << LOG2_MAX_MEM << ". Got: " << cut_off_
+                 << ".";
     }
     if (cut_off_ < page_size_) {
-      LOG(FATAL) << linear_cutoff << " cannot be set to a value smaller than log2 of " \
-                 << env_var_name(dev_type, pool_page_size) << ". Got: " \
-                 << cut_off_ << " vs " << page_size_ << ".";
+      LOG(FATAL) << linear_cutoff << " cannot be set to a value smaller than log2 of "
+                 << env_var_name(dev_type, pool_page_size) << ". Got: " << cut_off_ << " vs "
+                 << page_size_ << ".";
     }
   }
 
@@ -333,11 +343,15 @@ class RoundPower2 : public RoundHelper {
     return std::max(log_size, page_size_);
   }
 
-  inline size_t RoundAllocSizeForBucket(size_t bucket_id) const { return get_size(bucket_id); }
-  inline size_t RoundAllocSize(size_t size) const { return get_size(get_bucket(size)); }
+  inline size_t RoundAllocSizeForBucket(size_t bucket_id) const {
+    return get_size(bucket_id);
+  }
+  inline size_t RoundAllocSize(size_t size) const {
+    return get_size(get_bucket(size));
+  }
   std::tuple<size_t, size_t> getContainerParam() const override {
     return std::make_tuple((1ul << (LOG2_MAX_MEM - cut_off_)) + cut_off_,
-                       get_bucket(page_size_) - 1);
+                           get_bucket(page_size_) - 1);
   }
 
  private:
@@ -355,7 +369,6 @@ class RoundPower2 : public RoundHelper {
   size_t cut_off_ = 0;
 };  // class RoundPower2
 
-
 /*!
  * \brief Unordered map based storage container.
  *  The pointers to the portions of same rounded sizes memory
@@ -365,15 +378,17 @@ class RoundPower2 : public RoundHelper {
  */
 class UnorderedMapContainer {
  protected:
-  inline void InitContainer(const RoundHelper *p)   {}
-  inline void InsertInCache(size_t key, void *dptr) { memory_pool_[key].push_back(dptr); }
+  inline void InitContainer(const RoundHelper* p) {}
+  inline void InsertInCache(size_t key, void* dptr) {
+    memory_pool_[key].push_back(dptr);
+  }
 
-  inline std::vector<void*> *GetMemStorage(size_t key) {
+  inline std::vector<void*>* GetMemStorage(size_t key) {
     auto&& reuse_it = memory_pool_.find(key);
-    return reuse_it != memory_pool_.end() && reuse_it->second.size()? &reuse_it->second : nullptr;
+    return reuse_it != memory_pool_.end() && reuse_it->second.size() ? &reuse_it->second : nullptr;
   }
 
-  size_t ReleaseAllNoLock(const ContextHelper *contextHelper, const RoundHelper * /*rndHelper*/) {
+  size_t ReleaseAllNoLock(const ContextHelper* contextHelper, const RoundHelper* /*rndHelper*/) {
     SET_GPU_PROFILER(profilerGPU, contextHelper);
     size_t released_memory = 0;
     for (auto&& i : memory_pool_) {
@@ -389,7 +404,7 @@ class UnorderedMapContainer {
   }
 
  private:
-  std::unordered_map<size_t, std::vector<void *>> memory_pool_;
+  std::unordered_map<size_t, std::vector<void*>> memory_pool_;
 };  // class UnorderedMapContainer
 
 /*!
@@ -402,27 +417,29 @@ class UnorderedMapContainer {
  */
 class VectorContainer {
  protected:
-  inline void InitContainer(const RoundHelper *p) {
+  inline void InitContainer(const RoundHelper* p) {
     size_t vector_size;
     std::tie(vector_size, first_bucket_) = p->getContainerParam();
-    memory_pool_ .resize(vector_size);
+    memory_pool_.resize(vector_size);
   }
 
-  inline void InsertInCache(size_t idx, void *dptr) { memory_pool_[idx].push_back(dptr); }
+  inline void InsertInCache(size_t idx, void* dptr) {
+    memory_pool_[idx].push_back(dptr);
+  }
 
-  std::vector<void*> *GetMemStorage(size_t idx) {
-    auto &&reuse_pool = memory_pool_[idx];
+  std::vector<void*>* GetMemStorage(size_t idx) {
+    auto&& reuse_pool = memory_pool_[idx];
     return reuse_pool.size() ? &reuse_pool : nullptr;
   }
 
-  size_t ReleaseAllNoLock(const ContextHelper *contextHelper, const RoundHelper *rndHelper) {
+  size_t ReleaseAllNoLock(const ContextHelper* contextHelper, const RoundHelper* rndHelper) {
     SET_GPU_PROFILER(profilerGPU, contextHelper);
     size_t released_memory = 0;
     for (size_t i = first_bucket_; i < memory_pool_.size(); i++) {
       if (!memory_pool_[i].size())
         continue;
 
-      for (auto &j : memory_pool_[i]) {
+      for (auto& j : memory_pool_[i]) {
         contextHelper->Free(j);
         GPU_PROFILER_ON_FREE(profilerGPU, j);
       }
diff --git a/src/storage/storage.cc b/src/storage/storage.cc
index d83860cf9fcc..d4d76cbb9746 100644
--- a/src/storage/storage.cc
+++ b/src/storage/storage.cc
@@ -40,20 +40,21 @@ class StorageImpl : public Storage {
   void Alloc(Handle* handle) override;
   void Free(Handle handle) override;
   void DirectFree(Handle handle) override;
-  void ReleaseAll(Context ctx) override   { storage_manager(ctx)->ReleaseAll(); }
+  void ReleaseAll(Context ctx) override {
+    storage_manager(ctx)->ReleaseAll();
+  }
 
   void SharedIncrementRefCount(Handle handle) override;
-  StorageImpl() = default;
+  StorageImpl()           = default;
   ~StorageImpl() override = default;
 
  private:
-  std::shared_ptr<StorageManager> storage_manager(const Context &ctx) {
-    auto &&device = storage_managers_.at(ctx.dev_type);
-    std::shared_ptr<StorageManager> manager = device.Get(
-      ctx.real_dev_id(), []() {
+  std::shared_ptr<StorageManager> storage_manager(const Context& ctx) {
+    auto&& device                           = storage_managers_.at(ctx.dev_type);
+    std::shared_ptr<StorageManager> manager = device.Get(ctx.real_dev_id(), []() {
       LOG(FATAL) << "Cannot Free space to a device you have not allocated";
       return nullptr;
-      });
+    });
     return manager;
   }
 
@@ -63,16 +64,18 @@ class StorageImpl : public Storage {
   profiler::DeviceStorageProfiler profiler_;
 };  // struct Storage::Impl
 
-StorageManager *CreateStorageManager(const Context &ctx, const char *context,
-                                     int num_gpu_device, std::string *pStrategy) {
+StorageManager* CreateStorageManager(const Context& ctx,
+                                     const char* context,
+                                     int num_gpu_device,
+                                     std::string* pStrategy) {
   const auto env_var = env_var_name(context, pool_type);
-  const char *type = getenv(env_var.c_str());
+  const char* type   = getenv(env_var.c_str());
   if (type == nullptr) {
-    type = "Naive";   // default pool
+    type = "Naive";  // default pool
   }
 
-  *pStrategy = type;
-  StorageManager *ptr = nullptr;
+  *pStrategy          = type;
+  StorageManager* ptr = nullptr;
   if (*pStrategy == "Round") {
     ptr = new PooledStorageManager<RoundPower2, VectorContainer>(ctx, num_gpu_device);
   } else if (*pStrategy == "Naive") {
@@ -83,14 +86,14 @@ StorageManager *CreateStorageManager(const Context &ctx, const char *context,
 #if MXNET_USE_CUDA
     else if (ctx.dev_type == Context::kGPU)
       ptr = new NaiveStorageManager<GPUDeviceStorage>();
-    else              // Context::kCPUPinned
+    else  // Context::kCPUPinned
       ptr = new NaiveStorageManager<PinnedMemoryStorage>();
 #endif
   }
   return ptr;
 }
 
-void StorageImpl::Alloc(Storage::Handle *handle) {
+void StorageImpl::Alloc(Storage::Handle* handle) {
   // Set dptr to nullptr when handle size is 0.
   if (handle->size == 0) {
     handle->dptr = nullptr;
@@ -98,11 +101,10 @@ void StorageImpl::Alloc(Storage::Handle *handle) {
   }
 
   // space already recycled, ignore request
-  auto &&device = storage_managers_.at(handle->ctx.dev_type);
-  std::shared_ptr<StorageManager> manager = device.Get(
-    handle->ctx.real_dev_id(), [handle]() {
+  auto&& device                           = storage_managers_.at(handle->ctx.dev_type);
+  std::shared_ptr<StorageManager> manager = device.Get(handle->ctx.real_dev_id(), [handle]() {
     const auto dev_type = handle->ctx.dev_type;
-    int num_gpu_device = 0;
+    int num_gpu_device  = 0;
 #if MXNET_USE_CUDA
     switch (dev_type) {
       case Context::kGPU:
@@ -114,7 +116,7 @@ void StorageImpl::Alloc(Storage::Handle *handle) {
     }
 #endif
 
-    const char *context = nullptr;
+    const char* context = nullptr;
     switch (dev_type) {
       case Context::kCPU:
         context = "CPU";
@@ -134,7 +136,7 @@ void StorageImpl::Alloc(Storage::Handle *handle) {
         // We will not generate the log messages for CPUShared
         // It could be as many of them as the number of "workers".
 #if !defined(ANDROID) && !defined(__ANDROID__)
-        break;   // For Android shared memory is not implemented
+        break;  // For Android shared memory is not implemented
 #endif
       default:
         LOG(FATAL) << "Unimplemented device " << dev_type;
@@ -147,39 +149,43 @@ void StorageImpl::Alloc(Storage::Handle *handle) {
       // following dev_type's, we will also use the naive storage managers
       switch (dev_type) {
 #if MXNET_USE_CUDA
-        case Context::kCPUPinned: if (num_gpu_device > 0)
-                                     break;
+        case Context::kCPUPinned:
+          if (num_gpu_device > 0)
+            break;
 #endif
-        case Context::kCPUShared:  naive_storage_manager = true;
-        default:                   break;
+        case Context::kCPUShared:
+          naive_storage_manager = true;
+        default:
+          break;
       }
     }
 
-    StorageManager *ptr = nullptr;
+    StorageManager* ptr = nullptr;
     std::string strategy, storage_manager_type;
     if (naive_storage_manager) {
       storage_manager_type = "Naive";
       switch (dev_type) {
 #if MXNET_USE_CUDA
         case Context::kGPU:
-              ptr = new NaiveStorageManager<GPUDeviceStorage>();
-              break;
+          ptr = new NaiveStorageManager<GPUDeviceStorage>();
+          break;
         case Context::kCPUPinned:
-              if (num_gpu_device > 0) {
-                ptr = new NaiveStorageManager<PinnedMemoryStorage>();
-                break;
-              }
+          if (num_gpu_device > 0) {
+            ptr = new NaiveStorageManager<PinnedMemoryStorage>();
+            break;
+          }
 #else
         case Context::kCPUPinned:
 #endif
         case Context::kCPU:
-              ptr = new NaiveStorageManager<CPUDeviceStorage>();
-              break;
+          ptr = new NaiveStorageManager<CPUDeviceStorage>();
+          break;
 #if !defined(ANDROID) && !defined(__ANDROID__)
         case Context::kCPUShared:
-              ptr = new CPUSharedStorageManager();
+          ptr = new CPUSharedStorageManager();
 #endif
-        default: break;
+        default:
+          break;
       }
     } else {
       // Some Pooled Storage Manager will be used
@@ -208,7 +214,8 @@ void StorageImpl::Alloc(Storage::Handle *handle) {
 void StorageImpl::Free(Storage::Handle handle) {
   // Do nothing if dtpr is nullptr because the handle may have already
   // been freed or have not been allocated memory yet.
-  if (handle.dptr == nullptr) return;
+  if (handle.dptr == nullptr)
+    return;
 
   storage_manager(handle.ctx)->Free(handle);
   profiler_.OnFree(handle);
@@ -217,7 +224,8 @@ void StorageImpl::Free(Storage::Handle handle) {
 void StorageImpl::DirectFree(Storage::Handle handle) {
   // Do nothing if dtpr is nullptr because the handle may have already
   // been freed or have not been allocated memory yet.
-  if (handle.dptr == nullptr) return;
+  if (handle.dptr == nullptr)
+    return;
 
   storage_manager(handle.ctx)->DirectFree(handle);
   profiler_.OnFree(handle);
@@ -226,10 +234,10 @@ void StorageImpl::DirectFree(Storage::Handle handle) {
 void StorageImpl::SharedIncrementRefCount(Storage::Handle handle) {
   CHECK_EQ(handle.ctx.dev_type, Context::kCPUShared);
   auto&& device = storage_managers_.at(Context::kCPUShared);
-  auto manager = device.Get(0, []() {
-      LOG(FATAL) << "Cannot increment ref count before allocating any shared memory.";
-      return nullptr;
-    });
+  auto manager  = device.Get(0, []() {
+    LOG(FATAL) << "Cannot increment ref count before allocating any shared memory.";
+    return nullptr;
+  });
 #if !defined(ANDROID) && !defined(__ANDROID__)
   dynamic_cast<CPUSharedStorageManager*>(manager.get())->IncrementRefCount(handle);
 #else
@@ -239,12 +247,12 @@ void StorageImpl::SharedIncrementRefCount(Storage::Handle handle) {
 
 const std::string env_var_name(const char* dev_type, env_var_type type) {
   static const std::array<std::string, 5> name = {
-                        "MEM_POOL_TYPE",
-                        "POOL_PAGE_SIZE",
-                        "MEM_LARGE_ALLOC_ROUND_SIZE",
-                        "MEM_POOL_ROUND_LINEAR_CUTOFF",
-                        "MEM_POOL_RESERVE",
-                        };
+      "MEM_POOL_TYPE",
+      "POOL_PAGE_SIZE",
+      "MEM_LARGE_ALLOC_ROUND_SIZE",
+      "MEM_POOL_ROUND_LINEAR_CUTOFF",
+      "MEM_POOL_RESERVE",
+  };
 
   return std::string("MXNET_") + dev_type + "_" + name[type];
 }
@@ -255,14 +263,14 @@ std::shared_ptr<Storage> Storage::_GetSharedRef() {
 #ifdef __MXNET_JS__
   // dummy code needed for emscripten code to pass
   // do not know why, the new will be NULLPTR
-  static int *q = new int();
+  static int* q = new int();
 #endif
   static std::shared_ptr<Storage> inst(new storage::StorageImpl());
   return inst;
 }
 
 Storage* Storage::Get() {
-  static Storage *ptr = _GetSharedRef().get();
+  static Storage* ptr = _GetSharedRef().get();
   return ptr;
 }
 }  // namespace mxnet
diff --git a/src/storage/storage_manager.h b/src/storage/storage_manager.h
index 48077aad548f..362075d88db2 100644
--- a/src/storage/storage_manager.h
+++ b/src/storage/storage_manager.h
@@ -53,12 +53,12 @@ class StorageManager {
    */
   virtual void DirectFree(Storage::Handle handle) = 0;
   /*!
-  * \brief Release all memory if using a pool storage manager
-  *
-  * This release all memory from pool storage managers such as
-  * GPUPooledStorageManager and GPUPooledRoundedStorageManager.
-  * For non-pool memory managers this has no effect.
-  */
+   * \brief Release all memory if using a pool storage manager
+   *
+   * This release all memory from pool storage managers such as
+   * GPUPooledStorageManager and GPUPooledRoundedStorageManager.
+   * For non-pool memory managers this has no effect.
+   */
   virtual void ReleaseAll() {}
   /*!
    * \brief Destructor.
diff --git a/src/storage/storage_manager_helpers.h b/src/storage/storage_manager_helpers.h
index 2732b68df623..7c2f60dab63d 100644
--- a/src/storage/storage_manager_helpers.h
+++ b/src/storage/storage_manager_helpers.h
@@ -24,7 +24,7 @@
 #include <cuda_runtime.h>
 #include "../common/cuda/utils.h"
 #include "../profiler/storage_profiler.h"
-typedef  mxnet::common::cuda::DeviceStore CudaDeviceStore;
+typedef mxnet::common::cuda::DeviceStore CudaDeviceStore;
 #endif  // MXNET_USE_CUDA
 
 #ifndef _WIN32
@@ -52,18 +52,28 @@ namespace storage {
  */
 class ContextHelper {
  public:
-  virtual ~ContextHelper()                              {}
+  virtual ~ContextHelper() {}
 
-  inline void set_initilal_context(const Context &ctx)  { initilal_context_ = ctx; }
-  inline const Context &initilal_context() const        { return initilal_context_; }
+  inline void set_initilal_context(const Context& ctx) {
+    initilal_context_ = ctx;
+  }
+  inline const Context& initilal_context() const {
+    return initilal_context_;
+  }
   virtual std::tuple<size_t, size_t> getMemoryInfo() const = 0;
-  virtual int Malloc(void **ppNtr, size_t size) const = 0;
-  virtual void Free(void *dptr) const = 0;
-  inline size_t freeMemorySize() const                  { return std::get<0>(getMemoryInfo()); }
+  virtual int Malloc(void** ppNtr, size_t size) const      = 0;
+  virtual void Free(void* dptr) const                      = 0;
+  inline size_t freeMemorySize() const {
+    return std::get<0>(getMemoryInfo());
+  }
 
 #if MXNET_USE_CUDA
-  virtual bool contextGPU() const                       { return false; }
-  virtual const CudaDeviceStore *SetCurrentDevice(const Context &/*ctx*/) const { return nullptr; }
+  virtual bool contextGPU() const {
+    return false;
+  }
+  virtual const CudaDeviceStore* SetCurrentDevice(const Context& /*ctx*/) const {
+    return nullptr;
+  }
 #endif
 
  private:
@@ -86,22 +96,22 @@ class ContextHelperCPU : public ContextHelper {
     vm_size_t page_size;
     vm_statistics64_data_t vm_stats;
 
-    mach_port_t mach_port = mach_host_self();
+    mach_port_t mach_port        = mach_host_self();
     mach_msg_type_number_t count = sizeof(vm_stats) / sizeof(natural_t);
     if (KERN_SUCCESS != host_page_size(mach_port, &page_size) ||
-        KERN_SUCCESS != host_statistics64(mach_port, HOST_VM_INFO,
-                                          (host_info64_t)&vm_stats, &count)) {
+        KERN_SUCCESS !=
+            host_statistics64(mach_port, HOST_VM_INFO, (host_info64_t)&vm_stats, &count)) {
       LOG(FATAL) << "Cannot get memory information";
     }
 
     const size_t free_memory = (uint64_t)vm_stats.free_count * (uint64_t)page_size;
 
     const size_t used_memory = ((uint64_t)vm_stats.active_count +
-                                (uint64_t)vm_stats.inactive_count +
-                                (uint64_t)vm_stats.wire_count) *  (uint64_t)page_size;
+                                (uint64_t)vm_stats.inactive_count + (uint64_t)vm_stats.wire_count) *
+                               (uint64_t)page_size;
 
     return std::make_tuple(free_memory, used_memory + free_memory);
-#else   // Linux
+#else  // Linux
     struct sysinfo info = {};
     if (sysinfo(&info) < 0)
       LOG(FATAL) << "Error: sysinfo failed";
@@ -110,12 +120,12 @@ class ContextHelperCPU : public ContextHelper {
 #endif
   }
 
-  int Malloc(void **ppNtr, size_t size) const override {
+  int Malloc(void** ppNtr, size_t size) const override {
     bool success = mxnet::common::AlignedMemAlloc(ppNtr, size, alignment_);
     return success ? 0 : -1;
   }
 
-  void Free(void *dptr) const override {
+  void Free(void* dptr) const override {
     mxnet::common::AlignedMemFree(dptr);
   }
 
@@ -143,11 +153,17 @@ class ContextHelperGPU : public ContextHelper {
     return std::make_tuple(free, total);
   }
 
-  bool contextGPU() const override                      { return true; }
-  int Malloc(void **ppPntr, size_t size) const override { return cudaMalloc(ppPntr, size); }
-  void Free(void *dptr) const override                  { CUDA_CALL(cudaFree(dptr)); }
+  bool contextGPU() const override {
+    return true;
+  }
+  int Malloc(void** ppPntr, size_t size) const override {
+    return cudaMalloc(ppPntr, size);
+  }
+  void Free(void* dptr) const override {
+    CUDA_CALL(cudaFree(dptr));
+  }
 
-  const CudaDeviceStore *SetCurrentDevice(const Context &ctx) const override {
+  const CudaDeviceStore* SetCurrentDevice(const Context& ctx) const override {
     return new CudaDeviceStore(ctx.real_dev_id(), true);
   }
 };
@@ -158,15 +174,17 @@ class ContextHelperGPU : public ContextHelper {
  */
 class ContextHelperPinned : public ContextHelperGPU {
  public:
-  int Malloc(void **ppPntr, size_t size) const override {
+  int Malloc(void** ppPntr, size_t size) const override {
     // make the memory available across all devices
     return cudaHostAlloc(ppPntr, size, cudaHostAllocPortable);
   }
-  void Free(void *dptr) const override                  { CUDA_CALL(cudaFreeHost(dptr)); }
+  void Free(void* dptr) const override {
+    CUDA_CALL(cudaFreeHost(dptr));
+  }
 };
 
 #else
-typedef  ContextHelperCPU ContextHelperPinned;
+typedef ContextHelperCPU ContextHelperPinned;
 #endif
 }  // namespace storage
 }  // namespace mxnet